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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 Invensense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/regulator/consumer.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include "inv_icm42600.h"
#include "inv_icm42600_buffer.h"
static const struct regmap_range_cfg inv_icm42600_regmap_ranges[] = {
{
.name = "user banks",
.range_min = 0x0000,
.range_max = 0x4FFF,
.selector_reg = INV_ICM42600_REG_BANK_SEL,
.selector_mask = INV_ICM42600_BANK_SEL_MASK,
.selector_shift = 0,
.window_start = 0,
.window_len = 0x1000,
},
};
const struct regmap_config inv_icm42600_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x4FFF,
.ranges = inv_icm42600_regmap_ranges,
.num_ranges = ARRAY_SIZE(inv_icm42600_regmap_ranges),
};
EXPORT_SYMBOL_NS_GPL(inv_icm42600_regmap_config, IIO_ICM42600);
struct inv_icm42600_hw {
uint8_t whoami;
const char *name;
const struct inv_icm42600_conf *conf;
};
/* chip initial default configuration */
static const struct inv_icm42600_conf inv_icm42600_default_conf = {
.gyro = {
.mode = INV_ICM42600_SENSOR_MODE_OFF,
.fs = INV_ICM42600_GYRO_FS_2000DPS,
.odr = INV_ICM42600_ODR_50HZ,
.filter = INV_ICM42600_FILTER_BW_ODR_DIV_2,
},
.accel = {
.mode = INV_ICM42600_SENSOR_MODE_OFF,
.fs = INV_ICM42600_ACCEL_FS_16G,
.odr = INV_ICM42600_ODR_50HZ,
.filter = INV_ICM42600_FILTER_BW_ODR_DIV_2,
},
.temp_en = false,
};
static const struct inv_icm42600_hw inv_icm42600_hw[INV_CHIP_NB] = {
[INV_CHIP_ICM42600] = {
.whoami = INV_ICM42600_WHOAMI_ICM42600,
.name = "icm42600",
.conf = &inv_icm42600_default_conf,
},
[INV_CHIP_ICM42602] = {
.whoami = INV_ICM42600_WHOAMI_ICM42602,
.name = "icm42602",
.conf = &inv_icm42600_default_conf,
},
[INV_CHIP_ICM42605] = {
.whoami = INV_ICM42600_WHOAMI_ICM42605,
.name = "icm42605",
.conf = &inv_icm42600_default_conf,
},
[INV_CHIP_ICM42622] = {
.whoami = INV_ICM42600_WHOAMI_ICM42622,
.name = "icm42622",
.conf = &inv_icm42600_default_conf,
},
[INV_CHIP_ICM42631] = {
.whoami = INV_ICM42600_WHOAMI_ICM42631,
.name = "icm42631",
.conf = &inv_icm42600_default_conf,
},
};
const struct iio_mount_matrix *
inv_icm42600_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
const struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
return &st->orientation;
}
uint32_t inv_icm42600_odr_to_period(enum inv_icm42600_odr odr)
{
static uint32_t odr_periods[INV_ICM42600_ODR_NB] = {
/* reserved values */
0, 0, 0,
/* 8kHz */
125000,
/* 4kHz */
250000,
/* 2kHz */
500000,
/* 1kHz */
1000000,
/* 200Hz */
5000000,
/* 100Hz */
10000000,
/* 50Hz */
20000000,
/* 25Hz */
40000000,
/* 12.5Hz */
80000000,
/* 6.25Hz */
160000000,
/* 3.125Hz */
320000000,
/* 1.5625Hz */
640000000,
/* 500Hz */
2000000,
};
return odr_periods[odr];
}
static int inv_icm42600_set_pwr_mgmt0(struct inv_icm42600_state *st,
enum inv_icm42600_sensor_mode gyro,
enum inv_icm42600_sensor_mode accel,
bool temp, unsigned int *sleep_ms)
{
enum inv_icm42600_sensor_mode oldgyro = st->conf.gyro.mode;
enum inv_icm42600_sensor_mode oldaccel = st->conf.accel.mode;
bool oldtemp = st->conf.temp_en;
unsigned int sleepval;
unsigned int val;
int ret;
/* if nothing changed, exit */
if (gyro == oldgyro && accel == oldaccel && temp == oldtemp)
return 0;
val = INV_ICM42600_PWR_MGMT0_GYRO(gyro) |
INV_ICM42600_PWR_MGMT0_ACCEL(accel);
if (!temp)
val |= INV_ICM42600_PWR_MGMT0_TEMP_DIS;
ret = regmap_write(st->map, INV_ICM42600_REG_PWR_MGMT0, val);
if (ret)
return ret;
st->conf.gyro.mode = gyro;
st->conf.accel.mode = accel;
st->conf.temp_en = temp;
/* compute required wait time for sensors to stabilize */
sleepval = 0;
/* temperature stabilization time */
if (temp && !oldtemp) {
if (sleepval < INV_ICM42600_TEMP_STARTUP_TIME_MS)
sleepval = INV_ICM42600_TEMP_STARTUP_TIME_MS;
}
/* accel startup time */
if (accel != oldaccel && oldaccel == INV_ICM42600_SENSOR_MODE_OFF) {
/* block any register write for at least 200 µs */
usleep_range(200, 300);
if (sleepval < INV_ICM42600_ACCEL_STARTUP_TIME_MS)
sleepval = INV_ICM42600_ACCEL_STARTUP_TIME_MS;
}
if (gyro != oldgyro) {
/* gyro startup time */
if (oldgyro == INV_ICM42600_SENSOR_MODE_OFF) {
/* block any register write for at least 200 µs */
usleep_range(200, 300);
if (sleepval < INV_ICM42600_GYRO_STARTUP_TIME_MS)
sleepval = INV_ICM42600_GYRO_STARTUP_TIME_MS;
/* gyro stop time */
} else if (gyro == INV_ICM42600_SENSOR_MODE_OFF) {
if (sleepval < INV_ICM42600_GYRO_STOP_TIME_MS)
sleepval = INV_ICM42600_GYRO_STOP_TIME_MS;
}
}
/* deferred sleep value if sleep pointer is provided or direct sleep */
if (sleep_ms)
*sleep_ms = sleepval;
else if (sleepval)
msleep(sleepval);
return 0;
}
int inv_icm42600_set_accel_conf(struct inv_icm42600_state *st,
struct inv_icm42600_sensor_conf *conf,
unsigned int *sleep_ms)
{
struct inv_icm42600_sensor_conf *oldconf = &st->conf.accel;
unsigned int val;
int ret;
/* Sanitize missing values with current values */
if (conf->mode < 0)
conf->mode = oldconf->mode;
if (conf->fs < 0)
conf->fs = oldconf->fs;
if (conf->odr < 0)
conf->odr = oldconf->odr;
if (conf->filter < 0)
conf->filter = oldconf->filter;
/* set ACCEL_CONFIG0 register (accel fullscale & odr) */
if (conf->fs != oldconf->fs || conf->odr != oldconf->odr) {
val = INV_ICM42600_ACCEL_CONFIG0_FS(conf->fs) |
INV_ICM42600_ACCEL_CONFIG0_ODR(conf->odr);
ret = regmap_write(st->map, INV_ICM42600_REG_ACCEL_CONFIG0, val);
if (ret)
return ret;
oldconf->fs = conf->fs;
oldconf->odr = conf->odr;
}
/* set GYRO_ACCEL_CONFIG0 register (accel filter) */
if (conf->filter != oldconf->filter) {
val = INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(conf->filter) |
INV_ICM42600_GYRO_ACCEL_CONFIG0_GYRO_FILT(st->conf.gyro.filter);
ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_ACCEL_CONFIG0, val);
if (ret)
return ret;
oldconf->filter = conf->filter;
}
/* set PWR_MGMT0 register (accel sensor mode) */
return inv_icm42600_set_pwr_mgmt0(st, st->conf.gyro.mode, conf->mode,
st->conf.temp_en, sleep_ms);
}
int inv_icm42600_set_gyro_conf(struct inv_icm42600_state *st,
struct inv_icm42600_sensor_conf *conf,
unsigned int *sleep_ms)
{
struct inv_icm42600_sensor_conf *oldconf = &st->conf.gyro;
unsigned int val;
int ret;
/* sanitize missing values with current values */
if (conf->mode < 0)
conf->mode = oldconf->mode;
if (conf->fs < 0)
conf->fs = oldconf->fs;
if (conf->odr < 0)
conf->odr = oldconf->odr;
if (conf->filter < 0)
conf->filter = oldconf->filter;
/* set GYRO_CONFIG0 register (gyro fullscale & odr) */
if (conf->fs != oldconf->fs || conf->odr != oldconf->odr) {
val = INV_ICM42600_GYRO_CONFIG0_FS(conf->fs) |
INV_ICM42600_GYRO_CONFIG0_ODR(conf->odr);
ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_CONFIG0, val);
if (ret)
return ret;
oldconf->fs = conf->fs;
oldconf->odr = conf->odr;
}
/* set GYRO_ACCEL_CONFIG0 register (gyro filter) */
if (conf->filter != oldconf->filter) {
val = INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(st->conf.accel.filter) |
INV_ICM42600_GYRO_ACCEL_CONFIG0_GYRO_FILT(conf->filter);
ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_ACCEL_CONFIG0, val);
if (ret)
return ret;
oldconf->filter = conf->filter;
}
/* set PWR_MGMT0 register (gyro sensor mode) */
return inv_icm42600_set_pwr_mgmt0(st, conf->mode, st->conf.accel.mode,
st->conf.temp_en, sleep_ms);
return 0;
}
int inv_icm42600_set_temp_conf(struct inv_icm42600_state *st, bool enable,
unsigned int *sleep_ms)
{
return inv_icm42600_set_pwr_mgmt0(st, st->conf.gyro.mode,
st->conf.accel.mode, enable,
sleep_ms);
}
int inv_icm42600_debugfs_reg(struct iio_dev *indio_dev, unsigned int reg,
unsigned int writeval, unsigned int *readval)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
mutex_lock(&st->lock);
if (readval)
ret = regmap_read(st->map, reg, readval);
else
ret = regmap_write(st->map, reg, writeval);
mutex_unlock(&st->lock);
return ret;
}
static int inv_icm42600_set_conf(struct inv_icm42600_state *st,
const struct inv_icm42600_conf *conf)
{
unsigned int val;
int ret;
/* set PWR_MGMT0 register (gyro & accel sensor mode, temp enabled) */
val = INV_ICM42600_PWR_MGMT0_GYRO(conf->gyro.mode) |
INV_ICM42600_PWR_MGMT0_ACCEL(conf->accel.mode);
if (!conf->temp_en)
val |= INV_ICM42600_PWR_MGMT0_TEMP_DIS;
ret = regmap_write(st->map, INV_ICM42600_REG_PWR_MGMT0, val);
if (ret)
return ret;
/* set GYRO_CONFIG0 register (gyro fullscale & odr) */
val = INV_ICM42600_GYRO_CONFIG0_FS(conf->gyro.fs) |
INV_ICM42600_GYRO_CONFIG0_ODR(conf->gyro.odr);
ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_CONFIG0, val);
if (ret)
return ret;
/* set ACCEL_CONFIG0 register (accel fullscale & odr) */
val = INV_ICM42600_ACCEL_CONFIG0_FS(conf->accel.fs) |
INV_ICM42600_ACCEL_CONFIG0_ODR(conf->accel.odr);
ret = regmap_write(st->map, INV_ICM42600_REG_ACCEL_CONFIG0, val);
if (ret)
return ret;
/* set GYRO_ACCEL_CONFIG0 register (gyro & accel filters) */
val = INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(conf->accel.filter) |
INV_ICM42600_GYRO_ACCEL_CONFIG0_GYRO_FILT(conf->gyro.filter);
ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_ACCEL_CONFIG0, val);
if (ret)
return ret;
/* update internal conf */
st->conf = *conf;
return 0;
}
/**
* inv_icm42600_setup() - check and setup chip
* @st: driver internal state
* @bus_setup: callback for setting up bus specific registers
*
* Returns 0 on success, a negative error code otherwise.
*/
static int inv_icm42600_setup(struct inv_icm42600_state *st,
inv_icm42600_bus_setup bus_setup)
{
const struct inv_icm42600_hw *hw = &inv_icm42600_hw[st->chip];
const struct device *dev = regmap_get_device(st->map);
unsigned int val;
int ret;
/* check chip self-identification value */
ret = regmap_read(st->map, INV_ICM42600_REG_WHOAMI, &val);
if (ret)
return ret;
if (val != hw->whoami) {
dev_err(dev, "invalid whoami %#02x expected %#02x (%s)\n",
val, hw->whoami, hw->name);
return -ENODEV;
}
st->name = hw->name;
/* reset to make sure previous state are not there */
ret = regmap_write(st->map, INV_ICM42600_REG_DEVICE_CONFIG,
INV_ICM42600_DEVICE_CONFIG_SOFT_RESET);
if (ret)
return ret;
msleep(INV_ICM42600_RESET_TIME_MS);
ret = regmap_read(st->map, INV_ICM42600_REG_INT_STATUS, &val);
if (ret)
return ret;
if (!(val & INV_ICM42600_INT_STATUS_RESET_DONE)) {
dev_err(dev, "reset error, reset done bit not set\n");
return -ENODEV;
}
/* set chip bus configuration */
ret = bus_setup(st);
if (ret)
return ret;
/* sensor data in big-endian (default) */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN,
INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN);
if (ret)
return ret;
return inv_icm42600_set_conf(st, hw->conf);
}
static irqreturn_t inv_icm42600_irq_timestamp(int irq, void *_data)
{
struct inv_icm42600_state *st = _data;
st->timestamp.gyro = iio_get_time_ns(st->indio_gyro);
st->timestamp.accel = iio_get_time_ns(st->indio_accel);
return IRQ_WAKE_THREAD;
}
static irqreturn_t inv_icm42600_irq_handler(int irq, void *_data)
{
struct inv_icm42600_state *st = _data;
struct device *dev = regmap_get_device(st->map);
unsigned int status;
int ret;
mutex_lock(&st->lock);
ret = regmap_read(st->map, INV_ICM42600_REG_INT_STATUS, &status);
if (ret)
goto out_unlock;
/* FIFO full */
if (status & INV_ICM42600_INT_STATUS_FIFO_FULL)
dev_warn(dev, "FIFO full data lost!\n");
/* FIFO threshold reached */
if (status & INV_ICM42600_INT_STATUS_FIFO_THS) {
ret = inv_icm42600_buffer_fifo_read(st, 0);
if (ret) {
dev_err(dev, "FIFO read error %d\n", ret);
goto out_unlock;
}
ret = inv_icm42600_buffer_fifo_parse(st);
if (ret)
dev_err(dev, "FIFO parsing error %d\n", ret);
}
out_unlock:
mutex_unlock(&st->lock);
return IRQ_HANDLED;
}
/**
* inv_icm42600_irq_init() - initialize int pin and interrupt handler
* @st: driver internal state
* @irq: irq number
* @irq_type: irq trigger type
* @open_drain: true if irq is open drain, false for push-pull
*
* Returns 0 on success, a negative error code otherwise.
*/
static int inv_icm42600_irq_init(struct inv_icm42600_state *st, int irq,
int irq_type, bool open_drain)
{
struct device *dev = regmap_get_device(st->map);
unsigned int val;
int ret;
/* configure INT1 interrupt: default is active low on edge */
switch (irq_type) {
case IRQF_TRIGGER_RISING:
case IRQF_TRIGGER_HIGH:
val = INV_ICM42600_INT_CONFIG_INT1_ACTIVE_HIGH;
break;
default:
val = INV_ICM42600_INT_CONFIG_INT1_ACTIVE_LOW;
break;
}
switch (irq_type) {
case IRQF_TRIGGER_LOW:
case IRQF_TRIGGER_HIGH:
val |= INV_ICM42600_INT_CONFIG_INT1_LATCHED;
break;
default:
break;
}
if (!open_drain)
val |= INV_ICM42600_INT_CONFIG_INT1_PUSH_PULL;
ret = regmap_write(st->map, INV_ICM42600_REG_INT_CONFIG, val);
if (ret)
return ret;
/* Deassert async reset for proper INT pin operation (cf datasheet) */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_CONFIG1,
INV_ICM42600_INT_CONFIG1_ASYNC_RESET, 0);
if (ret)
return ret;
return devm_request_threaded_irq(dev, irq, inv_icm42600_irq_timestamp,
inv_icm42600_irq_handler, irq_type,
"inv_icm42600", st);
}
static int inv_icm42600_timestamp_setup(struct inv_icm42600_state *st)
{
unsigned int val;
/* enable timestamp register */
val = INV_ICM42600_TMST_CONFIG_TMST_TO_REGS_EN |
INV_ICM42600_TMST_CONFIG_TMST_EN;
return regmap_update_bits(st->map, INV_ICM42600_REG_TMST_CONFIG,
INV_ICM42600_TMST_CONFIG_MASK, val);
}
static int inv_icm42600_enable_regulator_vddio(struct inv_icm42600_state *st)
{
int ret;
ret = regulator_enable(st->vddio_supply);
if (ret)
return ret;
/* wait a little for supply ramp */
usleep_range(3000, 4000);
return 0;
}
static void inv_icm42600_disable_vdd_reg(void *_data)
{
struct inv_icm42600_state *st = _data;
const struct device *dev = regmap_get_device(st->map);
int ret;
ret = regulator_disable(st->vdd_supply);
if (ret)
dev_err(dev, "failed to disable vdd error %d\n", ret);
}
static void inv_icm42600_disable_vddio_reg(void *_data)
{
struct inv_icm42600_state *st = _data;
const struct device *dev = regmap_get_device(st->map);
int ret;
ret = regulator_disable(st->vddio_supply);
if (ret)
dev_err(dev, "failed to disable vddio error %d\n", ret);
}
static void inv_icm42600_disable_pm(void *_data)
{
struct device *dev = _data;
pm_runtime_put_sync(dev);
pm_runtime_disable(dev);
}
int inv_icm42600_core_probe(struct regmap *regmap, int chip, int irq,
inv_icm42600_bus_setup bus_setup)
{
struct device *dev = regmap_get_device(regmap);
struct inv_icm42600_state *st;
struct irq_data *irq_desc;
int irq_type;
bool open_drain;
int ret;
if (chip <= INV_CHIP_INVALID || chip >= INV_CHIP_NB) {
dev_err(dev, "invalid chip = %d\n", chip);
return -ENODEV;
}
/* get irq properties, set trigger falling by default */
irq_desc = irq_get_irq_data(irq);
if (!irq_desc) {
dev_err(dev, "could not find IRQ %d\n", irq);
return -EINVAL;
}
irq_type = irqd_get_trigger_type(irq_desc);
if (!irq_type)
irq_type = IRQF_TRIGGER_FALLING;
open_drain = device_property_read_bool(dev, "drive-open-drain");
st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
dev_set_drvdata(dev, st);
mutex_init(&st->lock);
st->chip = chip;
st->map = regmap;
ret = iio_read_mount_matrix(dev, &st->orientation);
if (ret) {
dev_err(dev, "failed to retrieve mounting matrix %d\n", ret);
return ret;
}
st->vdd_supply = devm_regulator_get(dev, "vdd");
if (IS_ERR(st->vdd_supply))
return PTR_ERR(st->vdd_supply);
st->vddio_supply = devm_regulator_get(dev, "vddio");
if (IS_ERR(st->vddio_supply))
return PTR_ERR(st->vddio_supply);
ret = regulator_enable(st->vdd_supply);
if (ret)
return ret;
msleep(INV_ICM42600_POWER_UP_TIME_MS);
ret = devm_add_action_or_reset(dev, inv_icm42600_disable_vdd_reg, st);
if (ret)
return ret;
ret = inv_icm42600_enable_regulator_vddio(st);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, inv_icm42600_disable_vddio_reg, st);
if (ret)
return ret;
/* setup chip registers */
ret = inv_icm42600_setup(st, bus_setup);
if (ret)
return ret;
ret = inv_icm42600_timestamp_setup(st);
if (ret)
return ret;
ret = inv_icm42600_buffer_init(st);
if (ret)
return ret;
st->indio_gyro = inv_icm42600_gyro_init(st);
if (IS_ERR(st->indio_gyro))
return PTR_ERR(st->indio_gyro);
st->indio_accel = inv_icm42600_accel_init(st);
if (IS_ERR(st->indio_accel))
return PTR_ERR(st->indio_accel);
ret = inv_icm42600_irq_init(st, irq, irq_type, open_drain);
if (ret)
return ret;
/* setup runtime power management */
ret = pm_runtime_set_active(dev);
if (ret)
return ret;
pm_runtime_get_noresume(dev);
pm_runtime_enable(dev);
pm_runtime_set_autosuspend_delay(dev, INV_ICM42600_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
return devm_add_action_or_reset(dev, inv_icm42600_disable_pm, dev);
}
EXPORT_SYMBOL_NS_GPL(inv_icm42600_core_probe, IIO_ICM42600);
/*
* Suspend saves sensors state and turns everything off.
* Check first if runtime suspend has not already done the job.
*/
static int inv_icm42600_suspend(struct device *dev)
{
struct inv_icm42600_state *st = dev_get_drvdata(dev);
int ret;
mutex_lock(&st->lock);
st->suspended.gyro = st->conf.gyro.mode;
st->suspended.accel = st->conf.accel.mode;
st->suspended.temp = st->conf.temp_en;
if (pm_runtime_suspended(dev)) {
ret = 0;
goto out_unlock;
}
/* disable FIFO data streaming */
if (st->fifo.on) {
ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG,
INV_ICM42600_FIFO_CONFIG_BYPASS);
if (ret)
goto out_unlock;
}
ret = inv_icm42600_set_pwr_mgmt0(st, INV_ICM42600_SENSOR_MODE_OFF,
INV_ICM42600_SENSOR_MODE_OFF, false,
NULL);
if (ret)
goto out_unlock;
regulator_disable(st->vddio_supply);
out_unlock:
mutex_unlock(&st->lock);
return ret;
}
/*
* System resume gets the system back on and restores the sensors state.
* Manually put runtime power management in system active state.
*/
static int inv_icm42600_resume(struct device *dev)
{
struct inv_icm42600_state *st = dev_get_drvdata(dev);
int ret;
mutex_lock(&st->lock);
ret = inv_icm42600_enable_regulator_vddio(st);
if (ret)
goto out_unlock;
pm_runtime_disable(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
/* restore sensors state */
ret = inv_icm42600_set_pwr_mgmt0(st, st->suspended.gyro,
st->suspended.accel,
st->suspended.temp, NULL);
if (ret)
goto out_unlock;
/* restore FIFO data streaming */
if (st->fifo.on)
ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG,
INV_ICM42600_FIFO_CONFIG_STREAM);
out_unlock:
mutex_unlock(&st->lock);
return ret;
}
/* Runtime suspend will turn off sensors that are enabled by iio devices. */
static int inv_icm42600_runtime_suspend(struct device *dev)
{
struct inv_icm42600_state *st = dev_get_drvdata(dev);
int ret;
mutex_lock(&st->lock);
/* disable all sensors */
ret = inv_icm42600_set_pwr_mgmt0(st, INV_ICM42600_SENSOR_MODE_OFF,
INV_ICM42600_SENSOR_MODE_OFF, false,
NULL);
if (ret)
goto error_unlock;
regulator_disable(st->vddio_supply);
error_unlock:
mutex_unlock(&st->lock);
return ret;
}
/* Sensors are enabled by iio devices, no need to turn them back on here. */
static int inv_icm42600_runtime_resume(struct device *dev)
{
struct inv_icm42600_state *st = dev_get_drvdata(dev);
int ret;
mutex_lock(&st->lock);
ret = inv_icm42600_enable_regulator_vddio(st);
mutex_unlock(&st->lock);
return ret;
}
EXPORT_NS_GPL_DEV_PM_OPS(inv_icm42600_pm_ops, IIO_ICM42600) = {
SYSTEM_SLEEP_PM_OPS(inv_icm42600_suspend, inv_icm42600_resume)
RUNTIME_PM_OPS(inv_icm42600_runtime_suspend,
inv_icm42600_runtime_resume, NULL)
};
MODULE_AUTHOR("InvenSense, Inc.");
MODULE_DESCRIPTION("InvenSense ICM-426xx device driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_INV_SENSORS_TIMESTAMP);
| linux-master | drivers/iio/imu/inv_icm42600/inv_icm42600_core.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 InvenSense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/property.h>
#include "inv_icm42600.h"
static int inv_icm42600_i2c_bus_setup(struct inv_icm42600_state *st)
{
unsigned int mask, val;
int ret;
/*
* setup interface registers
* This register write to REG_INTF_CONFIG6 enables a spike filter that
* is impacting the line and can prevent the I2C ACK to be seen by the
* controller. So we don't test the return value.
*/
regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6,
INV_ICM42600_INTF_CONFIG6_MASK,
INV_ICM42600_INTF_CONFIG6_I3C_EN);
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0);
if (ret)
return ret;
/* set slew rates for I2C and SPI */
mask = INV_ICM42600_DRIVE_CONFIG_I2C_MASK |
INV_ICM42600_DRIVE_CONFIG_SPI_MASK;
val = INV_ICM42600_DRIVE_CONFIG_I2C(INV_ICM42600_SLEW_RATE_12_36NS) |
INV_ICM42600_DRIVE_CONFIG_SPI(INV_ICM42600_SLEW_RATE_12_36NS);
ret = regmap_update_bits(st->map, INV_ICM42600_REG_DRIVE_CONFIG,
mask, val);
if (ret)
return ret;
/* disable SPI bus */
return regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK,
INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_SPI_DIS);
}
static int inv_icm42600_probe(struct i2c_client *client)
{
const void *match;
enum inv_icm42600_chip chip;
struct regmap *regmap;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
return -ENOTSUPP;
match = device_get_match_data(&client->dev);
if (!match)
return -EINVAL;
chip = (uintptr_t)match;
regmap = devm_regmap_init_i2c(client, &inv_icm42600_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return inv_icm42600_core_probe(regmap, chip, client->irq,
inv_icm42600_i2c_bus_setup);
}
static const struct of_device_id inv_icm42600_of_matches[] = {
{
.compatible = "invensense,icm42600",
.data = (void *)INV_CHIP_ICM42600,
}, {
.compatible = "invensense,icm42602",
.data = (void *)INV_CHIP_ICM42602,
}, {
.compatible = "invensense,icm42605",
.data = (void *)INV_CHIP_ICM42605,
}, {
.compatible = "invensense,icm42622",
.data = (void *)INV_CHIP_ICM42622,
}, {
.compatible = "invensense,icm42631",
.data = (void *)INV_CHIP_ICM42631,
},
{}
};
MODULE_DEVICE_TABLE(of, inv_icm42600_of_matches);
static struct i2c_driver inv_icm42600_driver = {
.driver = {
.name = "inv-icm42600-i2c",
.of_match_table = inv_icm42600_of_matches,
.pm = pm_ptr(&inv_icm42600_pm_ops),
},
.probe = inv_icm42600_probe,
};
module_i2c_driver(inv_icm42600_driver);
MODULE_AUTHOR("InvenSense, Inc.");
MODULE_DESCRIPTION("InvenSense ICM-426xx I2C driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_ICM42600);
| linux-master | drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 Invensense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include "inv_icm42600.h"
#include "inv_icm42600_temp.h"
static int inv_icm42600_temp_read(struct inv_icm42600_state *st, int16_t *temp)
{
struct device *dev = regmap_get_device(st->map);
__be16 *raw;
int ret;
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
ret = inv_icm42600_set_temp_conf(st, true, NULL);
if (ret)
goto exit;
raw = (__be16 *)&st->buffer[0];
ret = regmap_bulk_read(st->map, INV_ICM42600_REG_TEMP_DATA, raw, sizeof(*raw));
if (ret)
goto exit;
*temp = (int16_t)be16_to_cpup(raw);
if (*temp == INV_ICM42600_DATA_INVALID)
ret = -EINVAL;
exit:
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
int inv_icm42600_temp_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int16_t temp;
int ret;
if (chan->type != IIO_TEMP)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = inv_icm42600_temp_read(st, &temp);
iio_device_release_direct_mode(indio_dev);
if (ret)
return ret;
*val = temp;
return IIO_VAL_INT;
/*
* T°C = (temp / 132.48) + 25
* Tm°C = 1000 * ((temp * 100 / 13248) + 25)
* scale: 100000 / 13248 ~= 7.548309
* offset: 25000
*/
case IIO_CHAN_INFO_SCALE:
*val = 7;
*val2 = 548309;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_OFFSET:
*val = 25000;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
| linux-master | drivers/iio/imu/inv_icm42600/inv_icm42600_temp.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 Invensense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/delay.h>
#include <linux/math64.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include "inv_icm42600.h"
#include "inv_icm42600_temp.h"
#include "inv_icm42600_buffer.h"
#define INV_ICM42600_GYRO_CHAN(_modifier, _index, _ext_info) \
{ \
.type = IIO_ANGL_VEL, \
.modified = 1, \
.channel2 = _modifier, \
.info_mask_separate = \
BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_all = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_all_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
.ext_info = _ext_info, \
}
enum inv_icm42600_gyro_scan {
INV_ICM42600_GYRO_SCAN_X,
INV_ICM42600_GYRO_SCAN_Y,
INV_ICM42600_GYRO_SCAN_Z,
INV_ICM42600_GYRO_SCAN_TEMP,
INV_ICM42600_GYRO_SCAN_TIMESTAMP,
};
static const struct iio_chan_spec_ext_info inv_icm42600_gyro_ext_infos[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42600_get_mount_matrix),
{},
};
static const struct iio_chan_spec inv_icm42600_gyro_channels[] = {
INV_ICM42600_GYRO_CHAN(IIO_MOD_X, INV_ICM42600_GYRO_SCAN_X,
inv_icm42600_gyro_ext_infos),
INV_ICM42600_GYRO_CHAN(IIO_MOD_Y, INV_ICM42600_GYRO_SCAN_Y,
inv_icm42600_gyro_ext_infos),
INV_ICM42600_GYRO_CHAN(IIO_MOD_Z, INV_ICM42600_GYRO_SCAN_Z,
inv_icm42600_gyro_ext_infos),
INV_ICM42600_TEMP_CHAN(INV_ICM42600_GYRO_SCAN_TEMP),
IIO_CHAN_SOFT_TIMESTAMP(INV_ICM42600_GYRO_SCAN_TIMESTAMP),
};
/*
* IIO buffer data: size must be a power of 2 and timestamp aligned
* 16 bytes: 6 bytes angular velocity, 2 bytes temperature, 8 bytes timestamp
*/
struct inv_icm42600_gyro_buffer {
struct inv_icm42600_fifo_sensor_data gyro;
int16_t temp;
int64_t timestamp __aligned(8);
};
#define INV_ICM42600_SCAN_MASK_GYRO_3AXIS \
(BIT(INV_ICM42600_GYRO_SCAN_X) | \
BIT(INV_ICM42600_GYRO_SCAN_Y) | \
BIT(INV_ICM42600_GYRO_SCAN_Z))
#define INV_ICM42600_SCAN_MASK_TEMP BIT(INV_ICM42600_GYRO_SCAN_TEMP)
static const unsigned long inv_icm42600_gyro_scan_masks[] = {
/* 3-axis gyro + temperature */
INV_ICM42600_SCAN_MASK_GYRO_3AXIS | INV_ICM42600_SCAN_MASK_TEMP,
0,
};
/* enable gyroscope sensor and FIFO write */
static int inv_icm42600_gyro_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *scan_mask)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct inv_sensors_timestamp *ts = iio_priv(indio_dev);
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
unsigned int fifo_en = 0;
unsigned int sleep_gyro = 0;
unsigned int sleep_temp = 0;
unsigned int sleep;
int ret;
mutex_lock(&st->lock);
if (*scan_mask & INV_ICM42600_SCAN_MASK_TEMP) {
/* enable temp sensor */
ret = inv_icm42600_set_temp_conf(st, true, &sleep_temp);
if (ret)
goto out_unlock;
fifo_en |= INV_ICM42600_SENSOR_TEMP;
}
if (*scan_mask & INV_ICM42600_SCAN_MASK_GYRO_3AXIS) {
/* enable gyro sensor */
conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
ret = inv_icm42600_set_gyro_conf(st, &conf, &sleep_gyro);
if (ret)
goto out_unlock;
fifo_en |= INV_ICM42600_SENSOR_GYRO;
}
/* update data FIFO write */
inv_sensors_timestamp_apply_odr(ts, 0, 0, 0);
ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en);
if (ret)
goto out_unlock;
ret = inv_icm42600_buffer_update_watermark(st);
out_unlock:
mutex_unlock(&st->lock);
/* sleep maximum required time */
if (sleep_gyro > sleep_temp)
sleep = sleep_gyro;
else
sleep = sleep_temp;
if (sleep)
msleep(sleep);
return ret;
}
static int inv_icm42600_gyro_read_sensor(struct inv_icm42600_state *st,
struct iio_chan_spec const *chan,
int16_t *val)
{
struct device *dev = regmap_get_device(st->map);
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
unsigned int reg;
__be16 *data;
int ret;
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
reg = INV_ICM42600_REG_GYRO_DATA_X;
break;
case IIO_MOD_Y:
reg = INV_ICM42600_REG_GYRO_DATA_Y;
break;
case IIO_MOD_Z:
reg = INV_ICM42600_REG_GYRO_DATA_Z;
break;
default:
return -EINVAL;
}
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
/* enable gyro sensor */
conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
ret = inv_icm42600_set_gyro_conf(st, &conf, NULL);
if (ret)
goto exit;
/* read gyro register data */
data = (__be16 *)&st->buffer[0];
ret = regmap_bulk_read(st->map, reg, data, sizeof(*data));
if (ret)
goto exit;
*val = (int16_t)be16_to_cpup(data);
if (*val == INV_ICM42600_DATA_INVALID)
ret = -EINVAL;
exit:
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
/* IIO format int + nano */
static const int inv_icm42600_gyro_scale[] = {
/* +/- 2000dps => 0.001065264 rad/s */
[2 * INV_ICM42600_GYRO_FS_2000DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_2000DPS + 1] = 1065264,
/* +/- 1000dps => 0.000532632 rad/s */
[2 * INV_ICM42600_GYRO_FS_1000DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_1000DPS + 1] = 532632,
/* +/- 500dps => 0.000266316 rad/s */
[2 * INV_ICM42600_GYRO_FS_500DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_500DPS + 1] = 266316,
/* +/- 250dps => 0.000133158 rad/s */
[2 * INV_ICM42600_GYRO_FS_250DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_250DPS + 1] = 133158,
/* +/- 125dps => 0.000066579 rad/s */
[2 * INV_ICM42600_GYRO_FS_125DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_125DPS + 1] = 66579,
/* +/- 62.5dps => 0.000033290 rad/s */
[2 * INV_ICM42600_GYRO_FS_62_5DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_62_5DPS + 1] = 33290,
/* +/- 31.25dps => 0.000016645 rad/s */
[2 * INV_ICM42600_GYRO_FS_31_25DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_31_25DPS + 1] = 16645,
/* +/- 15.625dps => 0.000008322 rad/s */
[2 * INV_ICM42600_GYRO_FS_15_625DPS] = 0,
[2 * INV_ICM42600_GYRO_FS_15_625DPS + 1] = 8322,
};
static int inv_icm42600_gyro_read_scale(struct inv_icm42600_state *st,
int *val, int *val2)
{
unsigned int idx;
idx = st->conf.gyro.fs;
*val = inv_icm42600_gyro_scale[2 * idx];
*val2 = inv_icm42600_gyro_scale[2 * idx + 1];
return IIO_VAL_INT_PLUS_NANO;
}
static int inv_icm42600_gyro_write_scale(struct inv_icm42600_state *st,
int val, int val2)
{
struct device *dev = regmap_get_device(st->map);
unsigned int idx;
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
int ret;
for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_gyro_scale); idx += 2) {
if (val == inv_icm42600_gyro_scale[idx] &&
val2 == inv_icm42600_gyro_scale[idx + 1])
break;
}
if (idx >= ARRAY_SIZE(inv_icm42600_gyro_scale))
return -EINVAL;
conf.fs = idx / 2;
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
ret = inv_icm42600_set_gyro_conf(st, &conf, NULL);
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
/* IIO format int + micro */
static const int inv_icm42600_gyro_odr[] = {
/* 12.5Hz */
12, 500000,
/* 25Hz */
25, 0,
/* 50Hz */
50, 0,
/* 100Hz */
100, 0,
/* 200Hz */
200, 0,
/* 1kHz */
1000, 0,
/* 2kHz */
2000, 0,
/* 4kHz */
4000, 0,
};
static const int inv_icm42600_gyro_odr_conv[] = {
INV_ICM42600_ODR_12_5HZ,
INV_ICM42600_ODR_25HZ,
INV_ICM42600_ODR_50HZ,
INV_ICM42600_ODR_100HZ,
INV_ICM42600_ODR_200HZ,
INV_ICM42600_ODR_1KHZ_LN,
INV_ICM42600_ODR_2KHZ_LN,
INV_ICM42600_ODR_4KHZ_LN,
};
static int inv_icm42600_gyro_read_odr(struct inv_icm42600_state *st,
int *val, int *val2)
{
unsigned int odr;
unsigned int i;
odr = st->conf.gyro.odr;
for (i = 0; i < ARRAY_SIZE(inv_icm42600_gyro_odr_conv); ++i) {
if (inv_icm42600_gyro_odr_conv[i] == odr)
break;
}
if (i >= ARRAY_SIZE(inv_icm42600_gyro_odr_conv))
return -EINVAL;
*val = inv_icm42600_gyro_odr[2 * i];
*val2 = inv_icm42600_gyro_odr[2 * i + 1];
return IIO_VAL_INT_PLUS_MICRO;
}
static int inv_icm42600_gyro_write_odr(struct iio_dev *indio_dev,
int val, int val2)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct inv_sensors_timestamp *ts = iio_priv(indio_dev);
struct device *dev = regmap_get_device(st->map);
unsigned int idx;
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
int ret;
for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_gyro_odr); idx += 2) {
if (val == inv_icm42600_gyro_odr[idx] &&
val2 == inv_icm42600_gyro_odr[idx + 1])
break;
}
if (idx >= ARRAY_SIZE(inv_icm42600_gyro_odr))
return -EINVAL;
conf.odr = inv_icm42600_gyro_odr_conv[idx / 2];
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
ret = inv_sensors_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr),
iio_buffer_enabled(indio_dev));
if (ret)
goto out_unlock;
ret = inv_icm42600_set_gyro_conf(st, &conf, NULL);
if (ret)
goto out_unlock;
inv_icm42600_buffer_update_fifo_period(st);
inv_icm42600_buffer_update_watermark(st);
out_unlock:
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
/*
* Calibration bias values, IIO range format int + nano.
* Value is limited to +/-64dps coded on 12 bits signed. Step is 1/32 dps.
*/
static int inv_icm42600_gyro_calibbias[] = {
-1, 117010721, /* min: -1.117010721 rad/s */
0, 545415, /* step: 0.000545415 rad/s */
1, 116465306, /* max: 1.116465306 rad/s */
};
static int inv_icm42600_gyro_read_offset(struct inv_icm42600_state *st,
struct iio_chan_spec const *chan,
int *val, int *val2)
{
struct device *dev = regmap_get_device(st->map);
int64_t val64;
int32_t bias;
unsigned int reg;
int16_t offset;
uint8_t data[2];
int ret;
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
reg = INV_ICM42600_REG_OFFSET_USER0;
break;
case IIO_MOD_Y:
reg = INV_ICM42600_REG_OFFSET_USER1;
break;
case IIO_MOD_Z:
reg = INV_ICM42600_REG_OFFSET_USER3;
break;
default:
return -EINVAL;
}
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
ret = regmap_bulk_read(st->map, reg, st->buffer, sizeof(data));
memcpy(data, st->buffer, sizeof(data));
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
if (ret)
return ret;
/* 12 bits signed value */
switch (chan->channel2) {
case IIO_MOD_X:
offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11);
break;
case IIO_MOD_Y:
offset = sign_extend32(((data[0] & 0xF0) << 4) | data[1], 11);
break;
case IIO_MOD_Z:
offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11);
break;
default:
return -EINVAL;
}
/*
* convert raw offset to dps then to rad/s
* 12 bits signed raw max 64 to dps: 64 / 2048
* dps to rad: Pi / 180
* result in nano (1000000000)
* (offset * 64 * Pi * 1000000000) / (2048 * 180)
*/
val64 = (int64_t)offset * 64LL * 3141592653LL;
/* for rounding, add + or - divisor (2048 * 180) divided by 2 */
if (val64 >= 0)
val64 += 2048 * 180 / 2;
else
val64 -= 2048 * 180 / 2;
bias = div_s64(val64, 2048 * 180);
*val = bias / 1000000000L;
*val2 = bias % 1000000000L;
return IIO_VAL_INT_PLUS_NANO;
}
static int inv_icm42600_gyro_write_offset(struct inv_icm42600_state *st,
struct iio_chan_spec const *chan,
int val, int val2)
{
struct device *dev = regmap_get_device(st->map);
int64_t val64, min, max;
unsigned int reg, regval;
int16_t offset;
int ret;
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
reg = INV_ICM42600_REG_OFFSET_USER0;
break;
case IIO_MOD_Y:
reg = INV_ICM42600_REG_OFFSET_USER1;
break;
case IIO_MOD_Z:
reg = INV_ICM42600_REG_OFFSET_USER3;
break;
default:
return -EINVAL;
}
/* inv_icm42600_gyro_calibbias: min - step - max in nano */
min = (int64_t)inv_icm42600_gyro_calibbias[0] * 1000000000LL +
(int64_t)inv_icm42600_gyro_calibbias[1];
max = (int64_t)inv_icm42600_gyro_calibbias[4] * 1000000000LL +
(int64_t)inv_icm42600_gyro_calibbias[5];
val64 = (int64_t)val * 1000000000LL + (int64_t)val2;
if (val64 < min || val64 > max)
return -EINVAL;
/*
* convert rad/s to dps then to raw value
* rad to dps: 180 / Pi
* dps to raw 12 bits signed, max 64: 2048 / 64
* val in nano (1000000000)
* val * 180 * 2048 / (Pi * 1000000000 * 64)
*/
val64 = val64 * 180LL * 2048LL;
/* for rounding, add + or - divisor (3141592653 * 64) divided by 2 */
if (val64 >= 0)
val64 += 3141592653LL * 64LL / 2LL;
else
val64 -= 3141592653LL * 64LL / 2LL;
offset = div64_s64(val64, 3141592653LL * 64LL);
/* clamp value limited to 12 bits signed */
if (offset < -2048)
offset = -2048;
else if (offset > 2047)
offset = 2047;
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
switch (chan->channel2) {
case IIO_MOD_X:
/* OFFSET_USER1 register is shared */
ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER1,
®val);
if (ret)
goto out_unlock;
st->buffer[0] = offset & 0xFF;
st->buffer[1] = (regval & 0xF0) | ((offset & 0xF00) >> 8);
break;
case IIO_MOD_Y:
/* OFFSET_USER1 register is shared */
ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER1,
®val);
if (ret)
goto out_unlock;
st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F);
st->buffer[1] = offset & 0xFF;
break;
case IIO_MOD_Z:
/* OFFSET_USER4 register is shared */
ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER4,
®val);
if (ret)
goto out_unlock;
st->buffer[0] = offset & 0xFF;
st->buffer[1] = (regval & 0xF0) | ((offset & 0xF00) >> 8);
break;
default:
ret = -EINVAL;
goto out_unlock;
}
ret = regmap_bulk_write(st->map, reg, st->buffer, 2);
out_unlock:
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
static int inv_icm42600_gyro_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int16_t data;
int ret;
switch (chan->type) {
case IIO_ANGL_VEL:
break;
case IIO_TEMP:
return inv_icm42600_temp_read_raw(indio_dev, chan, val, val2, mask);
default:
return -EINVAL;
}
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = inv_icm42600_gyro_read_sensor(st, chan, &data);
iio_device_release_direct_mode(indio_dev);
if (ret)
return ret;
*val = data;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
return inv_icm42600_gyro_read_scale(st, val, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
return inv_icm42600_gyro_read_odr(st, val, val2);
case IIO_CHAN_INFO_CALIBBIAS:
return inv_icm42600_gyro_read_offset(st, chan, val, val2);
default:
return -EINVAL;
}
}
static int inv_icm42600_gyro_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals,
int *type, int *length, long mask)
{
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*vals = inv_icm42600_gyro_scale;
*type = IIO_VAL_INT_PLUS_NANO;
*length = ARRAY_SIZE(inv_icm42600_gyro_scale);
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = inv_icm42600_gyro_odr;
*type = IIO_VAL_INT_PLUS_MICRO;
*length = ARRAY_SIZE(inv_icm42600_gyro_odr);
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_CALIBBIAS:
*vals = inv_icm42600_gyro_calibbias;
*type = IIO_VAL_INT_PLUS_NANO;
return IIO_AVAIL_RANGE;
default:
return -EINVAL;
}
}
static int inv_icm42600_gyro_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = inv_icm42600_gyro_write_scale(st, val, val2);
iio_device_release_direct_mode(indio_dev);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
return inv_icm42600_gyro_write_odr(indio_dev, val, val2);
case IIO_CHAN_INFO_CALIBBIAS:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = inv_icm42600_gyro_write_offset(st, chan, val, val2);
iio_device_release_direct_mode(indio_dev);
return ret;
default:
return -EINVAL;
}
}
static int inv_icm42600_gyro_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
return IIO_VAL_INT_PLUS_NANO;
case IIO_CHAN_INFO_SAMP_FREQ:
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBBIAS:
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static int inv_icm42600_gyro_hwfifo_set_watermark(struct iio_dev *indio_dev,
unsigned int val)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
mutex_lock(&st->lock);
st->fifo.watermark.gyro = val;
ret = inv_icm42600_buffer_update_watermark(st);
mutex_unlock(&st->lock);
return ret;
}
static int inv_icm42600_gyro_hwfifo_flush(struct iio_dev *indio_dev,
unsigned int count)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
if (count == 0)
return 0;
mutex_lock(&st->lock);
ret = inv_icm42600_buffer_hwfifo_flush(st, count);
if (!ret)
ret = st->fifo.nb.gyro;
mutex_unlock(&st->lock);
return ret;
}
static const struct iio_info inv_icm42600_gyro_info = {
.read_raw = inv_icm42600_gyro_read_raw,
.read_avail = inv_icm42600_gyro_read_avail,
.write_raw = inv_icm42600_gyro_write_raw,
.write_raw_get_fmt = inv_icm42600_gyro_write_raw_get_fmt,
.debugfs_reg_access = inv_icm42600_debugfs_reg,
.update_scan_mode = inv_icm42600_gyro_update_scan_mode,
.hwfifo_set_watermark = inv_icm42600_gyro_hwfifo_set_watermark,
.hwfifo_flush_to_buffer = inv_icm42600_gyro_hwfifo_flush,
};
struct iio_dev *inv_icm42600_gyro_init(struct inv_icm42600_state *st)
{
struct device *dev = regmap_get_device(st->map);
const char *name;
struct inv_sensors_timestamp_chip ts_chip;
struct inv_sensors_timestamp *ts;
struct iio_dev *indio_dev;
int ret;
name = devm_kasprintf(dev, GFP_KERNEL, "%s-gyro", st->name);
if (!name)
return ERR_PTR(-ENOMEM);
indio_dev = devm_iio_device_alloc(dev, sizeof(*ts));
if (!indio_dev)
return ERR_PTR(-ENOMEM);
/*
* clock period is 32kHz (31250ns)
* jitter is +/- 2% (20 per mille)
*/
ts_chip.clock_period = 31250;
ts_chip.jitter = 20;
ts_chip.init_period = inv_icm42600_odr_to_period(st->conf.accel.odr);
ts = iio_priv(indio_dev);
inv_sensors_timestamp_init(ts, &ts_chip);
iio_device_set_drvdata(indio_dev, st);
indio_dev->name = name;
indio_dev->info = &inv_icm42600_gyro_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = inv_icm42600_gyro_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_icm42600_gyro_channels);
indio_dev->available_scan_masks = inv_icm42600_gyro_scan_masks;
indio_dev->setup_ops = &inv_icm42600_buffer_ops;
ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
&inv_icm42600_buffer_ops);
if (ret)
return ERR_PTR(ret);
ret = devm_iio_device_register(dev, indio_dev);
if (ret)
return ERR_PTR(ret);
return indio_dev;
}
int inv_icm42600_gyro_parse_fifo(struct iio_dev *indio_dev)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct inv_sensors_timestamp *ts = iio_priv(indio_dev);
ssize_t i, size;
unsigned int no;
const void *accel, *gyro, *timestamp;
const int8_t *temp;
unsigned int odr;
int64_t ts_val;
struct inv_icm42600_gyro_buffer buffer;
/* parse all fifo packets */
for (i = 0, no = 0; i < st->fifo.count; i += size, ++no) {
size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i],
&accel, &gyro, &temp, ×tamp, &odr);
/* quit if error or FIFO is empty */
if (size <= 0)
return size;
/* skip packet if no gyro data or data is invalid */
if (gyro == NULL || !inv_icm42600_fifo_is_data_valid(gyro))
continue;
/* update odr */
if (odr & INV_ICM42600_SENSOR_GYRO)
inv_sensors_timestamp_apply_odr(ts, st->fifo.period,
st->fifo.nb.total, no);
/* buffer is copied to userspace, zeroing it to avoid any data leak */
memset(&buffer, 0, sizeof(buffer));
memcpy(&buffer.gyro, gyro, sizeof(buffer.gyro));
/* convert 8 bits FIFO temperature in high resolution format */
buffer.temp = temp ? (*temp * 64) : 0;
ts_val = inv_sensors_timestamp_pop(ts);
iio_push_to_buffers_with_timestamp(indio_dev, &buffer, ts_val);
}
return 0;
}
| linux-master | drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c |
// SPDX-License-Identifier: GPL-2.0
/*
* BMI160 - Bosch IMU, I2C bits
*
* Copyright (c) 2016, Intel Corporation.
*
* 7-bit I2C slave address is:
* - 0x68 if SDO is pulled to GND
* - 0x69 if SDO is pulled to VDDIO
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "bmi160.h"
static int bmi160_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
const char *name;
regmap = devm_regmap_init_i2c(client, &bmi160_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
if (id)
name = id->name;
else
name = dev_name(&client->dev);
return bmi160_core_probe(&client->dev, regmap, name, false);
}
static const struct i2c_device_id bmi160_i2c_id[] = {
{"bmi160", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, bmi160_i2c_id);
static const struct acpi_device_id bmi160_acpi_match[] = {
{"BMI0160", 0},
{ },
};
MODULE_DEVICE_TABLE(acpi, bmi160_acpi_match);
static const struct of_device_id bmi160_of_match[] = {
{ .compatible = "bosch,bmi160" },
{ },
};
MODULE_DEVICE_TABLE(of, bmi160_of_match);
static struct i2c_driver bmi160_i2c_driver = {
.driver = {
.name = "bmi160_i2c",
.acpi_match_table = bmi160_acpi_match,
.of_match_table = bmi160_of_match,
},
.probe = bmi160_i2c_probe,
.id_table = bmi160_i2c_id,
};
module_i2c_driver(bmi160_i2c_driver);
MODULE_AUTHOR("Daniel Baluta <[email protected]>");
MODULE_DESCRIPTION("BMI160 I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_BMI160);
| linux-master | drivers/iio/imu/bmi160/bmi160_i2c.c |
// SPDX-License-Identifier: GPL-2.0
/*
* BMI160 - Bosch IMU, SPI bits
*
* Copyright (c) 2016, Intel Corporation.
*
*/
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "bmi160.h"
static int bmi160_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
const struct spi_device_id *id = spi_get_device_id(spi);
const char *name;
regmap = devm_regmap_init_spi(spi, &bmi160_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
if (id)
name = id->name;
else
name = dev_name(&spi->dev);
return bmi160_core_probe(&spi->dev, regmap, name, true);
}
static const struct spi_device_id bmi160_spi_id[] = {
{"bmi160", 0},
{}
};
MODULE_DEVICE_TABLE(spi, bmi160_spi_id);
static const struct acpi_device_id bmi160_acpi_match[] = {
{"BMI0160", 0},
{ },
};
MODULE_DEVICE_TABLE(acpi, bmi160_acpi_match);
static const struct of_device_id bmi160_of_match[] = {
{ .compatible = "bosch,bmi160" },
{ },
};
MODULE_DEVICE_TABLE(of, bmi160_of_match);
static struct spi_driver bmi160_spi_driver = {
.probe = bmi160_spi_probe,
.id_table = bmi160_spi_id,
.driver = {
.acpi_match_table = bmi160_acpi_match,
.of_match_table = bmi160_of_match,
.name = "bmi160_spi",
},
};
module_spi_driver(bmi160_spi_driver);
MODULE_AUTHOR("Daniel Baluta <[email protected]");
MODULE_DESCRIPTION("Bosch BMI160 SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_BMI160);
| linux-master | drivers/iio/imu/bmi160/bmi160_spi.c |
// SPDX-License-Identifier: GPL-2.0
/*
* BMI160 - Bosch IMU (accel, gyro plus external magnetometer)
*
* Copyright (c) 2016, Intel Corporation.
* Copyright (c) 2019, Martin Kelly.
*
* IIO core driver for BMI160, with support for I2C/SPI busses
*
* TODO: magnetometer, hardware FIFO
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/property.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/iio.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/buffer.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include "bmi160.h"
#define BMI160_REG_CHIP_ID 0x00
#define BMI160_CHIP_ID_VAL 0xD1
#define BMI160_REG_PMU_STATUS 0x03
/* X axis data low byte address, the rest can be obtained using axis offset */
#define BMI160_REG_DATA_MAGN_XOUT_L 0x04
#define BMI160_REG_DATA_GYRO_XOUT_L 0x0C
#define BMI160_REG_DATA_ACCEL_XOUT_L 0x12
#define BMI160_REG_ACCEL_CONFIG 0x40
#define BMI160_ACCEL_CONFIG_ODR_MASK GENMASK(3, 0)
#define BMI160_ACCEL_CONFIG_BWP_MASK GENMASK(6, 4)
#define BMI160_REG_ACCEL_RANGE 0x41
#define BMI160_ACCEL_RANGE_2G 0x03
#define BMI160_ACCEL_RANGE_4G 0x05
#define BMI160_ACCEL_RANGE_8G 0x08
#define BMI160_ACCEL_RANGE_16G 0x0C
#define BMI160_REG_GYRO_CONFIG 0x42
#define BMI160_GYRO_CONFIG_ODR_MASK GENMASK(3, 0)
#define BMI160_GYRO_CONFIG_BWP_MASK GENMASK(5, 4)
#define BMI160_REG_GYRO_RANGE 0x43
#define BMI160_GYRO_RANGE_2000DPS 0x00
#define BMI160_GYRO_RANGE_1000DPS 0x01
#define BMI160_GYRO_RANGE_500DPS 0x02
#define BMI160_GYRO_RANGE_250DPS 0x03
#define BMI160_GYRO_RANGE_125DPS 0x04
#define BMI160_REG_CMD 0x7E
#define BMI160_CMD_ACCEL_PM_SUSPEND 0x10
#define BMI160_CMD_ACCEL_PM_NORMAL 0x11
#define BMI160_CMD_ACCEL_PM_LOW_POWER 0x12
#define BMI160_CMD_GYRO_PM_SUSPEND 0x14
#define BMI160_CMD_GYRO_PM_NORMAL 0x15
#define BMI160_CMD_GYRO_PM_FAST_STARTUP 0x17
#define BMI160_CMD_SOFTRESET 0xB6
#define BMI160_REG_INT_EN 0x51
#define BMI160_DRDY_INT_EN BIT(4)
#define BMI160_REG_INT_OUT_CTRL 0x53
#define BMI160_INT_OUT_CTRL_MASK 0x0f
#define BMI160_INT1_OUT_CTRL_SHIFT 0
#define BMI160_INT2_OUT_CTRL_SHIFT 4
#define BMI160_EDGE_TRIGGERED BIT(0)
#define BMI160_ACTIVE_HIGH BIT(1)
#define BMI160_OPEN_DRAIN BIT(2)
#define BMI160_OUTPUT_EN BIT(3)
#define BMI160_REG_INT_LATCH 0x54
#define BMI160_INT1_LATCH_MASK BIT(4)
#define BMI160_INT2_LATCH_MASK BIT(5)
/* INT1 and INT2 are in the opposite order as in INT_OUT_CTRL! */
#define BMI160_REG_INT_MAP 0x56
#define BMI160_INT1_MAP_DRDY_EN 0x80
#define BMI160_INT2_MAP_DRDY_EN 0x08
#define BMI160_REG_DUMMY 0x7F
#define BMI160_NORMAL_WRITE_USLEEP 2
#define BMI160_SUSPENDED_WRITE_USLEEP 450
#define BMI160_ACCEL_PMU_MIN_USLEEP 3800
#define BMI160_GYRO_PMU_MIN_USLEEP 80000
#define BMI160_SOFTRESET_USLEEP 1000
#define BMI160_CHANNEL(_type, _axis, _index) { \
.type = _type, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
.ext_info = bmi160_ext_info, \
}
/* scan indexes follow DATA register order */
enum bmi160_scan_axis {
BMI160_SCAN_EXT_MAGN_X = 0,
BMI160_SCAN_EXT_MAGN_Y,
BMI160_SCAN_EXT_MAGN_Z,
BMI160_SCAN_RHALL,
BMI160_SCAN_GYRO_X,
BMI160_SCAN_GYRO_Y,
BMI160_SCAN_GYRO_Z,
BMI160_SCAN_ACCEL_X,
BMI160_SCAN_ACCEL_Y,
BMI160_SCAN_ACCEL_Z,
BMI160_SCAN_TIMESTAMP,
};
enum bmi160_sensor_type {
BMI160_ACCEL = 0,
BMI160_GYRO,
BMI160_EXT_MAGN,
BMI160_NUM_SENSORS /* must be last */
};
enum bmi160_int_pin {
BMI160_PIN_INT1,
BMI160_PIN_INT2
};
const struct regmap_config bmi160_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
EXPORT_SYMBOL_NS(bmi160_regmap_config, IIO_BMI160);
struct bmi160_regs {
u8 data; /* LSB byte register for X-axis */
u8 config;
u8 config_odr_mask;
u8 config_bwp_mask;
u8 range;
u8 pmu_cmd_normal;
u8 pmu_cmd_suspend;
};
static struct bmi160_regs bmi160_regs[] = {
[BMI160_ACCEL] = {
.data = BMI160_REG_DATA_ACCEL_XOUT_L,
.config = BMI160_REG_ACCEL_CONFIG,
.config_odr_mask = BMI160_ACCEL_CONFIG_ODR_MASK,
.config_bwp_mask = BMI160_ACCEL_CONFIG_BWP_MASK,
.range = BMI160_REG_ACCEL_RANGE,
.pmu_cmd_normal = BMI160_CMD_ACCEL_PM_NORMAL,
.pmu_cmd_suspend = BMI160_CMD_ACCEL_PM_SUSPEND,
},
[BMI160_GYRO] = {
.data = BMI160_REG_DATA_GYRO_XOUT_L,
.config = BMI160_REG_GYRO_CONFIG,
.config_odr_mask = BMI160_GYRO_CONFIG_ODR_MASK,
.config_bwp_mask = BMI160_GYRO_CONFIG_BWP_MASK,
.range = BMI160_REG_GYRO_RANGE,
.pmu_cmd_normal = BMI160_CMD_GYRO_PM_NORMAL,
.pmu_cmd_suspend = BMI160_CMD_GYRO_PM_SUSPEND,
},
};
static unsigned long bmi160_pmu_time[] = {
[BMI160_ACCEL] = BMI160_ACCEL_PMU_MIN_USLEEP,
[BMI160_GYRO] = BMI160_GYRO_PMU_MIN_USLEEP,
};
struct bmi160_scale {
u8 bits;
int uscale;
};
struct bmi160_odr {
u8 bits;
int odr;
int uodr;
};
static const struct bmi160_scale bmi160_accel_scale[] = {
{ BMI160_ACCEL_RANGE_2G, 598},
{ BMI160_ACCEL_RANGE_4G, 1197},
{ BMI160_ACCEL_RANGE_8G, 2394},
{ BMI160_ACCEL_RANGE_16G, 4788},
};
static const struct bmi160_scale bmi160_gyro_scale[] = {
{ BMI160_GYRO_RANGE_2000DPS, 1065},
{ BMI160_GYRO_RANGE_1000DPS, 532},
{ BMI160_GYRO_RANGE_500DPS, 266},
{ BMI160_GYRO_RANGE_250DPS, 133},
{ BMI160_GYRO_RANGE_125DPS, 66},
};
struct bmi160_scale_item {
const struct bmi160_scale *tbl;
int num;
};
static const struct bmi160_scale_item bmi160_scale_table[] = {
[BMI160_ACCEL] = {
.tbl = bmi160_accel_scale,
.num = ARRAY_SIZE(bmi160_accel_scale),
},
[BMI160_GYRO] = {
.tbl = bmi160_gyro_scale,
.num = ARRAY_SIZE(bmi160_gyro_scale),
},
};
static const struct bmi160_odr bmi160_accel_odr[] = {
{0x01, 0, 781250},
{0x02, 1, 562500},
{0x03, 3, 125000},
{0x04, 6, 250000},
{0x05, 12, 500000},
{0x06, 25, 0},
{0x07, 50, 0},
{0x08, 100, 0},
{0x09, 200, 0},
{0x0A, 400, 0},
{0x0B, 800, 0},
{0x0C, 1600, 0},
};
static const struct bmi160_odr bmi160_gyro_odr[] = {
{0x06, 25, 0},
{0x07, 50, 0},
{0x08, 100, 0},
{0x09, 200, 0},
{0x0A, 400, 0},
{0x0B, 800, 0},
{0x0C, 1600, 0},
{0x0D, 3200, 0},
};
struct bmi160_odr_item {
const struct bmi160_odr *tbl;
int num;
};
static const struct bmi160_odr_item bmi160_odr_table[] = {
[BMI160_ACCEL] = {
.tbl = bmi160_accel_odr,
.num = ARRAY_SIZE(bmi160_accel_odr),
},
[BMI160_GYRO] = {
.tbl = bmi160_gyro_odr,
.num = ARRAY_SIZE(bmi160_gyro_odr),
},
};
static const struct iio_mount_matrix *
bmi160_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct bmi160_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info bmi160_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmi160_get_mount_matrix),
{ }
};
static const struct iio_chan_spec bmi160_channels[] = {
BMI160_CHANNEL(IIO_ACCEL, X, BMI160_SCAN_ACCEL_X),
BMI160_CHANNEL(IIO_ACCEL, Y, BMI160_SCAN_ACCEL_Y),
BMI160_CHANNEL(IIO_ACCEL, Z, BMI160_SCAN_ACCEL_Z),
BMI160_CHANNEL(IIO_ANGL_VEL, X, BMI160_SCAN_GYRO_X),
BMI160_CHANNEL(IIO_ANGL_VEL, Y, BMI160_SCAN_GYRO_Y),
BMI160_CHANNEL(IIO_ANGL_VEL, Z, BMI160_SCAN_GYRO_Z),
IIO_CHAN_SOFT_TIMESTAMP(BMI160_SCAN_TIMESTAMP),
};
static enum bmi160_sensor_type bmi160_to_sensor(enum iio_chan_type iio_type)
{
switch (iio_type) {
case IIO_ACCEL:
return BMI160_ACCEL;
case IIO_ANGL_VEL:
return BMI160_GYRO;
default:
return -EINVAL;
}
}
static
int bmi160_set_mode(struct bmi160_data *data, enum bmi160_sensor_type t,
bool mode)
{
int ret;
u8 cmd;
if (mode)
cmd = bmi160_regs[t].pmu_cmd_normal;
else
cmd = bmi160_regs[t].pmu_cmd_suspend;
ret = regmap_write(data->regmap, BMI160_REG_CMD, cmd);
if (ret)
return ret;
usleep_range(bmi160_pmu_time[t], bmi160_pmu_time[t] + 1000);
return 0;
}
static
int bmi160_set_scale(struct bmi160_data *data, enum bmi160_sensor_type t,
int uscale)
{
int i;
for (i = 0; i < bmi160_scale_table[t].num; i++)
if (bmi160_scale_table[t].tbl[i].uscale == uscale)
break;
if (i == bmi160_scale_table[t].num)
return -EINVAL;
return regmap_write(data->regmap, bmi160_regs[t].range,
bmi160_scale_table[t].tbl[i].bits);
}
static
int bmi160_get_scale(struct bmi160_data *data, enum bmi160_sensor_type t,
int *uscale)
{
int i, ret, val;
ret = regmap_read(data->regmap, bmi160_regs[t].range, &val);
if (ret)
return ret;
for (i = 0; i < bmi160_scale_table[t].num; i++)
if (bmi160_scale_table[t].tbl[i].bits == val) {
*uscale = bmi160_scale_table[t].tbl[i].uscale;
return 0;
}
return -EINVAL;
}
static int bmi160_get_data(struct bmi160_data *data, int chan_type,
int axis, int *val)
{
u8 reg;
int ret;
__le16 sample;
enum bmi160_sensor_type t = bmi160_to_sensor(chan_type);
reg = bmi160_regs[t].data + (axis - IIO_MOD_X) * sizeof(sample);
ret = regmap_bulk_read(data->regmap, reg, &sample, sizeof(sample));
if (ret)
return ret;
*val = sign_extend32(le16_to_cpu(sample), 15);
return 0;
}
static
int bmi160_set_odr(struct bmi160_data *data, enum bmi160_sensor_type t,
int odr, int uodr)
{
int i;
for (i = 0; i < bmi160_odr_table[t].num; i++)
if (bmi160_odr_table[t].tbl[i].odr == odr &&
bmi160_odr_table[t].tbl[i].uodr == uodr)
break;
if (i >= bmi160_odr_table[t].num)
return -EINVAL;
return regmap_update_bits(data->regmap,
bmi160_regs[t].config,
bmi160_regs[t].config_odr_mask,
bmi160_odr_table[t].tbl[i].bits);
}
static int bmi160_get_odr(struct bmi160_data *data, enum bmi160_sensor_type t,
int *odr, int *uodr)
{
int i, val, ret;
ret = regmap_read(data->regmap, bmi160_regs[t].config, &val);
if (ret)
return ret;
val &= bmi160_regs[t].config_odr_mask;
for (i = 0; i < bmi160_odr_table[t].num; i++)
if (val == bmi160_odr_table[t].tbl[i].bits)
break;
if (i >= bmi160_odr_table[t].num)
return -EINVAL;
*odr = bmi160_odr_table[t].tbl[i].odr;
*uodr = bmi160_odr_table[t].tbl[i].uodr;
return 0;
}
static irqreturn_t bmi160_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct bmi160_data *data = iio_priv(indio_dev);
int i, ret, j = 0, base = BMI160_REG_DATA_MAGN_XOUT_L;
__le16 sample;
for_each_set_bit(i, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = regmap_bulk_read(data->regmap, base + i * sizeof(sample),
&sample, sizeof(sample));
if (ret)
goto done;
data->buf[j++] = sample;
}
iio_push_to_buffers_with_timestamp(indio_dev, data->buf, pf->timestamp);
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int bmi160_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret;
struct bmi160_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = bmi160_get_data(data, chan->type, chan->channel2, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
ret = bmi160_get_scale(data,
bmi160_to_sensor(chan->type), val2);
return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = bmi160_get_odr(data, bmi160_to_sensor(chan->type),
val, val2);
return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
return 0;
}
static int bmi160_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bmi160_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
return bmi160_set_scale(data,
bmi160_to_sensor(chan->type), val2);
case IIO_CHAN_INFO_SAMP_FREQ:
return bmi160_set_odr(data, bmi160_to_sensor(chan->type),
val, val2);
default:
return -EINVAL;
}
return 0;
}
static
IIO_CONST_ATTR(in_accel_sampling_frequency_available,
"0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600");
static
IIO_CONST_ATTR(in_anglvel_sampling_frequency_available,
"25 50 100 200 400 800 1600 3200");
static
IIO_CONST_ATTR(in_accel_scale_available,
"0.000598 0.001197 0.002394 0.004788");
static
IIO_CONST_ATTR(in_anglvel_scale_available,
"0.001065 0.000532 0.000266 0.000133 0.000066");
static struct attribute *bmi160_attrs[] = {
&iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_anglvel_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group bmi160_attrs_group = {
.attrs = bmi160_attrs,
};
static const struct iio_info bmi160_info = {
.read_raw = bmi160_read_raw,
.write_raw = bmi160_write_raw,
.attrs = &bmi160_attrs_group,
};
static int bmi160_write_conf_reg(struct regmap *regmap, unsigned int reg,
unsigned int mask, unsigned int bits,
unsigned int write_usleep)
{
int ret;
unsigned int val;
ret = regmap_read(regmap, reg, &val);
if (ret)
return ret;
val = (val & ~mask) | bits;
ret = regmap_write(regmap, reg, val);
if (ret)
return ret;
/*
* We need to wait after writing before we can write again. See the
* datasheet, page 93.
*/
usleep_range(write_usleep, write_usleep + 1000);
return 0;
}
static int bmi160_config_pin(struct regmap *regmap, enum bmi160_int_pin pin,
bool open_drain, u8 irq_mask,
unsigned long write_usleep)
{
int ret;
struct device *dev = regmap_get_device(regmap);
u8 int_out_ctrl_shift;
u8 int_latch_mask;
u8 int_map_mask;
u8 int_out_ctrl_mask;
u8 int_out_ctrl_bits;
const char *pin_name;
switch (pin) {
case BMI160_PIN_INT1:
int_out_ctrl_shift = BMI160_INT1_OUT_CTRL_SHIFT;
int_latch_mask = BMI160_INT1_LATCH_MASK;
int_map_mask = BMI160_INT1_MAP_DRDY_EN;
break;
case BMI160_PIN_INT2:
int_out_ctrl_shift = BMI160_INT2_OUT_CTRL_SHIFT;
int_latch_mask = BMI160_INT2_LATCH_MASK;
int_map_mask = BMI160_INT2_MAP_DRDY_EN;
break;
}
int_out_ctrl_mask = BMI160_INT_OUT_CTRL_MASK << int_out_ctrl_shift;
/*
* Enable the requested pin with the right settings:
* - Push-pull/open-drain
* - Active low/high
* - Edge/level triggered
*/
int_out_ctrl_bits = BMI160_OUTPUT_EN;
if (open_drain)
/* Default is push-pull. */
int_out_ctrl_bits |= BMI160_OPEN_DRAIN;
int_out_ctrl_bits |= irq_mask;
int_out_ctrl_bits <<= int_out_ctrl_shift;
ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_OUT_CTRL,
int_out_ctrl_mask, int_out_ctrl_bits,
write_usleep);
if (ret)
return ret;
/* Set the pin to input mode with no latching. */
ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_LATCH,
int_latch_mask, int_latch_mask,
write_usleep);
if (ret)
return ret;
/* Map interrupts to the requested pin. */
ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_MAP,
int_map_mask, int_map_mask,
write_usleep);
if (ret) {
switch (pin) {
case BMI160_PIN_INT1:
pin_name = "INT1";
break;
case BMI160_PIN_INT2:
pin_name = "INT2";
break;
}
dev_err(dev, "Failed to configure %s IRQ pin", pin_name);
}
return ret;
}
int bmi160_enable_irq(struct regmap *regmap, bool enable)
{
unsigned int enable_bit = 0;
if (enable)
enable_bit = BMI160_DRDY_INT_EN;
return bmi160_write_conf_reg(regmap, BMI160_REG_INT_EN,
BMI160_DRDY_INT_EN, enable_bit,
BMI160_NORMAL_WRITE_USLEEP);
}
EXPORT_SYMBOL_NS(bmi160_enable_irq, IIO_BMI160);
static int bmi160_get_irq(struct fwnode_handle *fwnode, enum bmi160_int_pin *pin)
{
int irq;
/* Use INT1 if possible, otherwise fall back to INT2. */
irq = fwnode_irq_get_byname(fwnode, "INT1");
if (irq > 0) {
*pin = BMI160_PIN_INT1;
return irq;
}
irq = fwnode_irq_get_byname(fwnode, "INT2");
if (irq > 0)
*pin = BMI160_PIN_INT2;
return irq;
}
static int bmi160_config_device_irq(struct iio_dev *indio_dev, int irq_type,
enum bmi160_int_pin pin)
{
bool open_drain;
u8 irq_mask;
struct bmi160_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
/* Level-triggered, active-low is the default if we set all zeroes. */
if (irq_type == IRQF_TRIGGER_RISING)
irq_mask = BMI160_ACTIVE_HIGH | BMI160_EDGE_TRIGGERED;
else if (irq_type == IRQF_TRIGGER_FALLING)
irq_mask = BMI160_EDGE_TRIGGERED;
else if (irq_type == IRQF_TRIGGER_HIGH)
irq_mask = BMI160_ACTIVE_HIGH;
else if (irq_type == IRQF_TRIGGER_LOW)
irq_mask = 0;
else {
dev_err(&indio_dev->dev,
"Invalid interrupt type 0x%x specified\n", irq_type);
return -EINVAL;
}
open_drain = device_property_read_bool(dev, "drive-open-drain");
return bmi160_config_pin(data->regmap, pin, open_drain, irq_mask,
BMI160_NORMAL_WRITE_USLEEP);
}
static int bmi160_setup_irq(struct iio_dev *indio_dev, int irq,
enum bmi160_int_pin pin)
{
struct irq_data *desc;
u32 irq_type;
int ret;
desc = irq_get_irq_data(irq);
if (!desc) {
dev_err(&indio_dev->dev, "Could not find IRQ %d\n", irq);
return -EINVAL;
}
irq_type = irqd_get_trigger_type(desc);
ret = bmi160_config_device_irq(indio_dev, irq_type, pin);
if (ret)
return ret;
return bmi160_probe_trigger(indio_dev, irq, irq_type);
}
static int bmi160_chip_init(struct bmi160_data *data, bool use_spi)
{
int ret;
unsigned int val;
struct device *dev = regmap_get_device(data->regmap);
ret = regulator_bulk_enable(ARRAY_SIZE(data->supplies), data->supplies);
if (ret) {
dev_err(dev, "Failed to enable regulators: %d\n", ret);
return ret;
}
ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET);
if (ret)
goto disable_regulator;
usleep_range(BMI160_SOFTRESET_USLEEP, BMI160_SOFTRESET_USLEEP + 1);
/*
* CS rising edge is needed before starting SPI, so do a dummy read
* See Section 3.2.1, page 86 of the datasheet
*/
if (use_spi) {
ret = regmap_read(data->regmap, BMI160_REG_DUMMY, &val);
if (ret)
goto disable_regulator;
}
ret = regmap_read(data->regmap, BMI160_REG_CHIP_ID, &val);
if (ret) {
dev_err(dev, "Error reading chip id\n");
goto disable_regulator;
}
if (val != BMI160_CHIP_ID_VAL) {
dev_err(dev, "Wrong chip id, got %x expected %x\n",
val, BMI160_CHIP_ID_VAL);
ret = -ENODEV;
goto disable_regulator;
}
ret = bmi160_set_mode(data, BMI160_ACCEL, true);
if (ret)
goto disable_regulator;
ret = bmi160_set_mode(data, BMI160_GYRO, true);
if (ret)
goto disable_accel;
return 0;
disable_accel:
bmi160_set_mode(data, BMI160_ACCEL, false);
disable_regulator:
regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies);
return ret;
}
static int bmi160_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool enable)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct bmi160_data *data = iio_priv(indio_dev);
return bmi160_enable_irq(data->regmap, enable);
}
static const struct iio_trigger_ops bmi160_trigger_ops = {
.set_trigger_state = &bmi160_data_rdy_trigger_set_state,
};
int bmi160_probe_trigger(struct iio_dev *indio_dev, int irq, u32 irq_type)
{
struct bmi160_data *data = iio_priv(indio_dev);
int ret;
data->trig = devm_iio_trigger_alloc(&indio_dev->dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (data->trig == NULL)
return -ENOMEM;
ret = devm_request_irq(&indio_dev->dev, irq,
&iio_trigger_generic_data_rdy_poll,
irq_type, "bmi160", data->trig);
if (ret)
return ret;
data->trig->dev.parent = regmap_get_device(data->regmap);
data->trig->ops = &bmi160_trigger_ops;
iio_trigger_set_drvdata(data->trig, indio_dev);
ret = devm_iio_trigger_register(&indio_dev->dev, data->trig);
if (ret)
return ret;
indio_dev->trig = iio_trigger_get(data->trig);
return 0;
}
static void bmi160_chip_uninit(void *data)
{
struct bmi160_data *bmi_data = data;
struct device *dev = regmap_get_device(bmi_data->regmap);
int ret;
bmi160_set_mode(bmi_data, BMI160_GYRO, false);
bmi160_set_mode(bmi_data, BMI160_ACCEL, false);
ret = regulator_bulk_disable(ARRAY_SIZE(bmi_data->supplies),
bmi_data->supplies);
if (ret)
dev_err(dev, "Failed to disable regulators: %d\n", ret);
}
int bmi160_core_probe(struct device *dev, struct regmap *regmap,
const char *name, bool use_spi)
{
struct iio_dev *indio_dev;
struct bmi160_data *data;
int irq;
enum bmi160_int_pin int_pin;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->regmap = regmap;
data->supplies[0].supply = "vdd";
data->supplies[1].supply = "vddio";
ret = devm_regulator_bulk_get(dev,
ARRAY_SIZE(data->supplies),
data->supplies);
if (ret) {
dev_err(dev, "Failed to get regulators: %d\n", ret);
return ret;
}
ret = iio_read_mount_matrix(dev, &data->orientation);
if (ret)
return ret;
ret = bmi160_chip_init(data, use_spi);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, bmi160_chip_uninit, data);
if (ret)
return ret;
indio_dev->channels = bmi160_channels;
indio_dev->num_channels = ARRAY_SIZE(bmi160_channels);
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bmi160_info;
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
iio_pollfunc_store_time,
bmi160_trigger_handler, NULL);
if (ret)
return ret;
irq = bmi160_get_irq(dev_fwnode(dev), &int_pin);
if (irq > 0) {
ret = bmi160_setup_irq(indio_dev, irq, int_pin);
if (ret)
dev_err(&indio_dev->dev, "Failed to setup IRQ %d\n",
irq);
} else {
dev_info(&indio_dev->dev, "Not setting up IRQ trigger\n");
}
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(bmi160_core_probe, IIO_BMI160);
MODULE_AUTHOR("Daniel Baluta <[email protected]>");
MODULE_DESCRIPTION("Bosch BMI160 driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/imu/bmi160/bmi160_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics st_lsm6dsx i2c driver
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include "st_lsm6dsx.h"
static const struct regmap_config st_lsm6dsx_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int st_lsm6dsx_i2c_probe(struct i2c_client *client)
{
int hw_id;
struct regmap *regmap;
hw_id = (kernel_ulong_t)device_get_match_data(&client->dev);
if (!hw_id)
hw_id = i2c_client_get_device_id(client)->driver_data;
if (!hw_id)
return -EINVAL;
regmap = devm_regmap_init_i2c(client, &st_lsm6dsx_i2c_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap %ld\n", PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return st_lsm6dsx_probe(&client->dev, client->irq, hw_id, regmap);
}
static const struct of_device_id st_lsm6dsx_i2c_of_match[] = {
{
.compatible = "st,lsm6ds3",
.data = (void *)ST_LSM6DS3_ID,
},
{
.compatible = "st,lsm6ds3h",
.data = (void *)ST_LSM6DS3H_ID,
},
{
.compatible = "st,lsm6dsl",
.data = (void *)ST_LSM6DSL_ID,
},
{
.compatible = "st,lsm6dsm",
.data = (void *)ST_LSM6DSM_ID,
},
{
.compatible = "st,ism330dlc",
.data = (void *)ST_ISM330DLC_ID,
},
{
.compatible = "st,lsm6dso",
.data = (void *)ST_LSM6DSO_ID,
},
{
.compatible = "st,asm330lhh",
.data = (void *)ST_ASM330LHH_ID,
},
{
.compatible = "st,lsm6dsox",
.data = (void *)ST_LSM6DSOX_ID,
},
{
.compatible = "st,lsm6dsr",
.data = (void *)ST_LSM6DSR_ID,
},
{
.compatible = "st,lsm6ds3tr-c",
.data = (void *)ST_LSM6DS3TRC_ID,
},
{
.compatible = "st,ism330dhcx",
.data = (void *)ST_ISM330DHCX_ID,
},
{
.compatible = "st,lsm9ds1-imu",
.data = (void *)ST_LSM9DS1_ID,
},
{
.compatible = "st,lsm6ds0",
.data = (void *)ST_LSM6DS0_ID,
},
{
.compatible = "st,lsm6dsrx",
.data = (void *)ST_LSM6DSRX_ID,
},
{
.compatible = "st,lsm6dst",
.data = (void *)ST_LSM6DST_ID,
},
{
.compatible = "st,lsm6dsop",
.data = (void *)ST_LSM6DSOP_ID,
},
{
.compatible = "st,asm330lhhx",
.data = (void *)ST_ASM330LHHX_ID,
},
{
.compatible = "st,lsm6dstx",
.data = (void *)ST_LSM6DSTX_ID,
},
{
.compatible = "st,lsm6dsv",
.data = (void *)ST_LSM6DSV_ID,
},
{
.compatible = "st,lsm6dsv16x",
.data = (void *)ST_LSM6DSV16X_ID,
},
{
.compatible = "st,lsm6dso16is",
.data = (void *)ST_LSM6DSO16IS_ID,
},
{
.compatible = "st,ism330is",
.data = (void *)ST_ISM330IS_ID,
},
{
.compatible = "st,asm330lhb",
.data = (void *)ST_ASM330LHB_ID,
},
{},
};
MODULE_DEVICE_TABLE(of, st_lsm6dsx_i2c_of_match);
static const struct acpi_device_id st_lsm6dsx_i2c_acpi_match[] = {
{ "SMO8B30", ST_LSM6DS3TRC_ID, },
{}
};
MODULE_DEVICE_TABLE(acpi, st_lsm6dsx_i2c_acpi_match);
static const struct i2c_device_id st_lsm6dsx_i2c_id_table[] = {
{ ST_LSM6DS3_DEV_NAME, ST_LSM6DS3_ID },
{ ST_LSM6DS3H_DEV_NAME, ST_LSM6DS3H_ID },
{ ST_LSM6DSL_DEV_NAME, ST_LSM6DSL_ID },
{ ST_LSM6DSM_DEV_NAME, ST_LSM6DSM_ID },
{ ST_ISM330DLC_DEV_NAME, ST_ISM330DLC_ID },
{ ST_LSM6DSO_DEV_NAME, ST_LSM6DSO_ID },
{ ST_ASM330LHH_DEV_NAME, ST_ASM330LHH_ID },
{ ST_LSM6DSOX_DEV_NAME, ST_LSM6DSOX_ID },
{ ST_LSM6DSR_DEV_NAME, ST_LSM6DSR_ID },
{ ST_LSM6DS3TRC_DEV_NAME, ST_LSM6DS3TRC_ID },
{ ST_ISM330DHCX_DEV_NAME, ST_ISM330DHCX_ID },
{ ST_LSM9DS1_DEV_NAME, ST_LSM9DS1_ID },
{ ST_LSM6DS0_DEV_NAME, ST_LSM6DS0_ID },
{ ST_LSM6DSRX_DEV_NAME, ST_LSM6DSRX_ID },
{ ST_LSM6DST_DEV_NAME, ST_LSM6DST_ID },
{ ST_LSM6DSOP_DEV_NAME, ST_LSM6DSOP_ID },
{ ST_ASM330LHHX_DEV_NAME, ST_ASM330LHHX_ID },
{ ST_LSM6DSTX_DEV_NAME, ST_LSM6DSTX_ID },
{ ST_LSM6DSV_DEV_NAME, ST_LSM6DSV_ID },
{ ST_LSM6DSV16X_DEV_NAME, ST_LSM6DSV16X_ID },
{ ST_LSM6DSO16IS_DEV_NAME, ST_LSM6DSO16IS_ID },
{ ST_ISM330IS_DEV_NAME, ST_ISM330IS_ID },
{ ST_ASM330LHB_DEV_NAME, ST_ASM330LHB_ID },
{},
};
MODULE_DEVICE_TABLE(i2c, st_lsm6dsx_i2c_id_table);
static struct i2c_driver st_lsm6dsx_driver = {
.driver = {
.name = "st_lsm6dsx_i2c",
.pm = pm_sleep_ptr(&st_lsm6dsx_pm_ops),
.of_match_table = st_lsm6dsx_i2c_of_match,
.acpi_match_table = st_lsm6dsx_i2c_acpi_match,
},
.probe = st_lsm6dsx_i2c_probe,
.id_table = st_lsm6dsx_i2c_id_table,
};
module_i2c_driver(st_lsm6dsx_driver);
MODULE_AUTHOR("Lorenzo Bianconi <[email protected]>");
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_LSM6DSX);
| linux-master | drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
*
* Author: Vitor Soares <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/i3c/device.h>
#include <linux/i3c/master.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include "st_lsm6dsx.h"
static const struct i3c_device_id st_lsm6dsx_i3c_ids[] = {
I3C_DEVICE(0x0104, 0x006C, (void *)ST_LSM6DSO_ID),
I3C_DEVICE(0x0104, 0x006B, (void *)ST_LSM6DSR_ID),
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(i3c, st_lsm6dsx_i3c_ids);
static int st_lsm6dsx_i3c_probe(struct i3c_device *i3cdev)
{
struct regmap_config st_lsm6dsx_i3c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
const struct i3c_device_id *id = i3c_device_match_id(i3cdev,
st_lsm6dsx_i3c_ids);
struct regmap *regmap;
regmap = devm_regmap_init_i3c(i3cdev, &st_lsm6dsx_i3c_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&i3cdev->dev, "Failed to register i3c regmap %ld\n", PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return st_lsm6dsx_probe(&i3cdev->dev, 0, (uintptr_t)id->data, regmap);
}
static struct i3c_driver st_lsm6dsx_driver = {
.driver = {
.name = "st_lsm6dsx_i3c",
.pm = pm_sleep_ptr(&st_lsm6dsx_pm_ops),
},
.probe = st_lsm6dsx_i3c_probe,
.id_table = st_lsm6dsx_i3c_ids,
};
module_i3c_driver(st_lsm6dsx_driver);
MODULE_AUTHOR("Vitor Soares <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx i3c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_LSM6DSX);
| linux-master | drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i3c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics st_lsm6dsx spi driver
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include "st_lsm6dsx.h"
static const struct regmap_config st_lsm6dsx_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int st_lsm6dsx_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
int hw_id = id->driver_data;
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &st_lsm6dsx_spi_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap %ld\n", PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return st_lsm6dsx_probe(&spi->dev, spi->irq, hw_id, regmap);
}
static const struct of_device_id st_lsm6dsx_spi_of_match[] = {
{
.compatible = "st,lsm6ds3",
.data = (void *)ST_LSM6DS3_ID,
},
{
.compatible = "st,lsm6ds3h",
.data = (void *)ST_LSM6DS3H_ID,
},
{
.compatible = "st,lsm6dsl",
.data = (void *)ST_LSM6DSL_ID,
},
{
.compatible = "st,lsm6dsm",
.data = (void *)ST_LSM6DSM_ID,
},
{
.compatible = "st,ism330dlc",
.data = (void *)ST_ISM330DLC_ID,
},
{
.compatible = "st,lsm6dso",
.data = (void *)ST_LSM6DSO_ID,
},
{
.compatible = "st,asm330lhh",
.data = (void *)ST_ASM330LHH_ID,
},
{
.compatible = "st,lsm6dsox",
.data = (void *)ST_LSM6DSOX_ID,
},
{
.compatible = "st,lsm6dsr",
.data = (void *)ST_LSM6DSR_ID,
},
{
.compatible = "st,lsm6ds3tr-c",
.data = (void *)ST_LSM6DS3TRC_ID,
},
{
.compatible = "st,ism330dhcx",
.data = (void *)ST_ISM330DHCX_ID,
},
{
.compatible = "st,lsm9ds1-imu",
.data = (void *)ST_LSM9DS1_ID,
},
{
.compatible = "st,lsm6ds0",
.data = (void *)ST_LSM6DS0_ID,
},
{
.compatible = "st,lsm6dsrx",
.data = (void *)ST_LSM6DSRX_ID,
},
{
.compatible = "st,lsm6dst",
.data = (void *)ST_LSM6DST_ID,
},
{
.compatible = "st,lsm6dsop",
.data = (void *)ST_LSM6DSOP_ID,
},
{
.compatible = "st,asm330lhhx",
.data = (void *)ST_ASM330LHHX_ID,
},
{
.compatible = "st,lsm6dstx",
.data = (void *)ST_LSM6DSTX_ID,
},
{
.compatible = "st,lsm6dsv",
.data = (void *)ST_LSM6DSV_ID,
},
{
.compatible = "st,lsm6dsv16x",
.data = (void *)ST_LSM6DSV16X_ID,
},
{
.compatible = "st,lsm6dso16is",
.data = (void *)ST_LSM6DSO16IS_ID,
},
{
.compatible = "st,ism330is",
.data = (void *)ST_ISM330IS_ID,
},
{
.compatible = "st,asm330lhb",
.data = (void *)ST_ASM330LHB_ID,
},
{},
};
MODULE_DEVICE_TABLE(of, st_lsm6dsx_spi_of_match);
static const struct spi_device_id st_lsm6dsx_spi_id_table[] = {
{ ST_LSM6DS3_DEV_NAME, ST_LSM6DS3_ID },
{ ST_LSM6DS3H_DEV_NAME, ST_LSM6DS3H_ID },
{ ST_LSM6DSL_DEV_NAME, ST_LSM6DSL_ID },
{ ST_LSM6DSM_DEV_NAME, ST_LSM6DSM_ID },
{ ST_ISM330DLC_DEV_NAME, ST_ISM330DLC_ID },
{ ST_LSM6DSO_DEV_NAME, ST_LSM6DSO_ID },
{ ST_ASM330LHH_DEV_NAME, ST_ASM330LHH_ID },
{ ST_LSM6DSOX_DEV_NAME, ST_LSM6DSOX_ID },
{ ST_LSM6DSR_DEV_NAME, ST_LSM6DSR_ID },
{ ST_LSM6DS3TRC_DEV_NAME, ST_LSM6DS3TRC_ID },
{ ST_ISM330DHCX_DEV_NAME, ST_ISM330DHCX_ID },
{ ST_LSM9DS1_DEV_NAME, ST_LSM9DS1_ID },
{ ST_LSM6DS0_DEV_NAME, ST_LSM6DS0_ID },
{ ST_LSM6DSRX_DEV_NAME, ST_LSM6DSRX_ID },
{ ST_LSM6DST_DEV_NAME, ST_LSM6DST_ID },
{ ST_LSM6DSOP_DEV_NAME, ST_LSM6DSOP_ID },
{ ST_ASM330LHHX_DEV_NAME, ST_ASM330LHHX_ID },
{ ST_LSM6DSTX_DEV_NAME, ST_LSM6DSTX_ID },
{ ST_LSM6DSV_DEV_NAME, ST_LSM6DSV_ID },
{ ST_LSM6DSV16X_DEV_NAME, ST_LSM6DSV16X_ID },
{ ST_LSM6DSO16IS_DEV_NAME, ST_LSM6DSO16IS_ID },
{ ST_ISM330IS_DEV_NAME, ST_ISM330IS_ID },
{ ST_ASM330LHB_DEV_NAME, ST_ASM330LHB_ID },
{},
};
MODULE_DEVICE_TABLE(spi, st_lsm6dsx_spi_id_table);
static struct spi_driver st_lsm6dsx_driver = {
.driver = {
.name = "st_lsm6dsx_spi",
.pm = pm_sleep_ptr(&st_lsm6dsx_pm_ops),
.of_match_table = st_lsm6dsx_spi_of_match,
},
.probe = st_lsm6dsx_spi_probe,
.id_table = st_lsm6dsx_spi_id_table,
};
module_spi_driver(st_lsm6dsx_driver);
MODULE_AUTHOR("Lorenzo Bianconi <[email protected]>");
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_LSM6DSX);
| linux-master | drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics st_lsm6dsx FIFO buffer library driver
*
* LSM6DS3/LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
* The FIFO buffer can be configured to store data from gyroscope and
* accelerometer. Samples are queued without any tag according to a
* specific pattern based on 'FIFO data sets' (6 bytes each):
* - 1st data set is reserved for gyroscope data
* - 2nd data set is reserved for accelerometer data
* The FIFO pattern changes depending on the ODRs and decimation factors
* assigned to the FIFO data sets. The first sequence of data stored in FIFO
* buffer contains the data of all the enabled FIFO data sets
* (e.g. Gx, Gy, Gz, Ax, Ay, Az), then data are repeated depending on the
* value of the decimation factor and ODR set for each FIFO data set.
*
* LSM6DSO/LSM6DSOX/ASM330LHH/ASM330LHHX/LSM6DSR/LSM6DSRX/ISM330DHCX/
* LSM6DST/LSM6DSOP/LSM6DSTX/LSM6DSV/ASM330LHB:
* The FIFO buffer can be configured to store data from gyroscope and
* accelerometer. Each sample is queued with a tag (1B) indicating data
* source (gyroscope, accelerometer, hw timer).
*
* FIFO supported modes:
* - BYPASS: FIFO disabled
* - CONTINUOUS: FIFO enabled. When the buffer is full, the FIFO index
* restarts from the beginning and the oldest sample is overwritten
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
* Denis Ciocca <[email protected]>
*/
#include <linux/module.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/regmap.h>
#include <linux/bitfield.h>
#include <linux/platform_data/st_sensors_pdata.h>
#include "st_lsm6dsx.h"
#define ST_LSM6DSX_REG_FIFO_MODE_ADDR 0x0a
#define ST_LSM6DSX_FIFO_MODE_MASK GENMASK(2, 0)
#define ST_LSM6DSX_FIFO_ODR_MASK GENMASK(6, 3)
#define ST_LSM6DSX_FIFO_EMPTY_MASK BIT(12)
#define ST_LSM6DSX_REG_FIFO_OUTL_ADDR 0x3e
#define ST_LSM6DSX_REG_FIFO_OUT_TAG_ADDR 0x78
#define ST_LSM6DSX_REG_TS_RESET_ADDR 0x42
#define ST_LSM6DSX_MAX_FIFO_ODR_VAL 0x08
#define ST_LSM6DSX_TS_RESET_VAL 0xaa
struct st_lsm6dsx_decimator_entry {
u8 decimator;
u8 val;
};
enum st_lsm6dsx_fifo_tag {
ST_LSM6DSX_GYRO_TAG = 0x01,
ST_LSM6DSX_ACC_TAG = 0x02,
ST_LSM6DSX_TS_TAG = 0x04,
ST_LSM6DSX_EXT0_TAG = 0x0f,
ST_LSM6DSX_EXT1_TAG = 0x10,
ST_LSM6DSX_EXT2_TAG = 0x11,
};
static const
struct st_lsm6dsx_decimator_entry st_lsm6dsx_decimator_table[] = {
{ 0, 0x0 },
{ 1, 0x1 },
{ 2, 0x2 },
{ 3, 0x3 },
{ 4, 0x4 },
{ 8, 0x5 },
{ 16, 0x6 },
{ 32, 0x7 },
};
static int
st_lsm6dsx_get_decimator_val(struct st_lsm6dsx_sensor *sensor, u32 max_odr)
{
const int max_size = ARRAY_SIZE(st_lsm6dsx_decimator_table);
u32 decimator = max_odr / sensor->odr;
int i;
if (decimator > 1)
decimator = round_down(decimator, 2);
for (i = 0; i < max_size; i++) {
if (st_lsm6dsx_decimator_table[i].decimator == decimator)
break;
}
sensor->decimator = decimator;
return i == max_size ? 0 : st_lsm6dsx_decimator_table[i].val;
}
static void st_lsm6dsx_get_max_min_odr(struct st_lsm6dsx_hw *hw,
u32 *max_odr, u32 *min_odr)
{
struct st_lsm6dsx_sensor *sensor;
int i;
*max_odr = 0, *min_odr = ~0;
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i])
continue;
sensor = iio_priv(hw->iio_devs[i]);
if (!(hw->enable_mask & BIT(sensor->id)))
continue;
*max_odr = max_t(u32, *max_odr, sensor->odr);
*min_odr = min_t(u32, *min_odr, sensor->odr);
}
}
static u8 st_lsm6dsx_get_sip(struct st_lsm6dsx_sensor *sensor, u32 min_odr)
{
u8 sip = sensor->odr / min_odr;
return sip > 1 ? round_down(sip, 2) : sip;
}
static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw)
{
const struct st_lsm6dsx_reg *ts_dec_reg;
struct st_lsm6dsx_sensor *sensor;
u16 sip = 0, ts_sip = 0;
u32 max_odr, min_odr;
int err = 0, i;
u8 data;
st_lsm6dsx_get_max_min_odr(hw, &max_odr, &min_odr);
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
const struct st_lsm6dsx_reg *dec_reg;
if (!hw->iio_devs[i])
continue;
sensor = iio_priv(hw->iio_devs[i]);
/* update fifo decimators and sample in pattern */
if (hw->enable_mask & BIT(sensor->id)) {
sensor->sip = st_lsm6dsx_get_sip(sensor, min_odr);
data = st_lsm6dsx_get_decimator_val(sensor, max_odr);
} else {
sensor->sip = 0;
data = 0;
}
ts_sip = max_t(u16, ts_sip, sensor->sip);
dec_reg = &hw->settings->decimator[sensor->id];
if (dec_reg->addr) {
int val = ST_LSM6DSX_SHIFT_VAL(data, dec_reg->mask);
err = st_lsm6dsx_update_bits_locked(hw, dec_reg->addr,
dec_reg->mask,
val);
if (err < 0)
return err;
}
sip += sensor->sip;
}
hw->sip = sip + ts_sip;
hw->ts_sip = ts_sip;
/*
* update hw ts decimator if necessary. Decimator for hw timestamp
* is always 1 or 0 in order to have a ts sample for each data
* sample in FIFO
*/
ts_dec_reg = &hw->settings->ts_settings.decimator;
if (ts_dec_reg->addr) {
int val, ts_dec = !!hw->ts_sip;
val = ST_LSM6DSX_SHIFT_VAL(ts_dec, ts_dec_reg->mask);
err = st_lsm6dsx_update_bits_locked(hw, ts_dec_reg->addr,
ts_dec_reg->mask, val);
}
return err;
}
static int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw,
enum st_lsm6dsx_fifo_mode fifo_mode)
{
unsigned int data;
data = FIELD_PREP(ST_LSM6DSX_FIFO_MODE_MASK, fifo_mode);
return st_lsm6dsx_update_bits_locked(hw, ST_LSM6DSX_REG_FIFO_MODE_ADDR,
ST_LSM6DSX_FIFO_MODE_MASK, data);
}
static int st_lsm6dsx_set_fifo_odr(struct st_lsm6dsx_sensor *sensor,
bool enable)
{
struct st_lsm6dsx_hw *hw = sensor->hw;
const struct st_lsm6dsx_reg *batch_reg;
u8 data;
batch_reg = &hw->settings->batch[sensor->id];
if (batch_reg->addr) {
int val;
if (enable) {
int err;
err = st_lsm6dsx_check_odr(sensor, sensor->odr,
&data);
if (err < 0)
return err;
} else {
data = 0;
}
val = ST_LSM6DSX_SHIFT_VAL(data, batch_reg->mask);
return st_lsm6dsx_update_bits_locked(hw, batch_reg->addr,
batch_reg->mask, val);
} else {
data = hw->enable_mask ? ST_LSM6DSX_MAX_FIFO_ODR_VAL : 0;
return st_lsm6dsx_update_bits_locked(hw,
ST_LSM6DSX_REG_FIFO_MODE_ADDR,
ST_LSM6DSX_FIFO_ODR_MASK,
FIELD_PREP(ST_LSM6DSX_FIFO_ODR_MASK,
data));
}
}
int st_lsm6dsx_update_watermark(struct st_lsm6dsx_sensor *sensor, u16 watermark)
{
u16 fifo_watermark = ~0, cur_watermark, fifo_th_mask;
struct st_lsm6dsx_hw *hw = sensor->hw;
struct st_lsm6dsx_sensor *cur_sensor;
int i, err, data;
__le16 wdata;
if (!hw->sip)
return 0;
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i])
continue;
cur_sensor = iio_priv(hw->iio_devs[i]);
if (!(hw->enable_mask & BIT(cur_sensor->id)))
continue;
cur_watermark = (cur_sensor == sensor) ? watermark
: cur_sensor->watermark;
fifo_watermark = min_t(u16, fifo_watermark, cur_watermark);
}
fifo_watermark = max_t(u16, fifo_watermark, hw->sip);
fifo_watermark = (fifo_watermark / hw->sip) * hw->sip;
fifo_watermark = fifo_watermark * hw->settings->fifo_ops.th_wl;
mutex_lock(&hw->page_lock);
err = regmap_read(hw->regmap, hw->settings->fifo_ops.fifo_th.addr + 1,
&data);
if (err < 0)
goto out;
fifo_th_mask = hw->settings->fifo_ops.fifo_th.mask;
fifo_watermark = ((data << 8) & ~fifo_th_mask) |
(fifo_watermark & fifo_th_mask);
wdata = cpu_to_le16(fifo_watermark);
err = regmap_bulk_write(hw->regmap,
hw->settings->fifo_ops.fifo_th.addr,
&wdata, sizeof(wdata));
out:
mutex_unlock(&hw->page_lock);
return err;
}
static int st_lsm6dsx_reset_hw_ts(struct st_lsm6dsx_hw *hw)
{
struct st_lsm6dsx_sensor *sensor;
int i, err;
/* reset hw ts counter */
err = st_lsm6dsx_write_locked(hw, ST_LSM6DSX_REG_TS_RESET_ADDR,
ST_LSM6DSX_TS_RESET_VAL);
if (err < 0)
return err;
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i])
continue;
sensor = iio_priv(hw->iio_devs[i]);
/*
* store enable buffer timestamp as reference for
* hw timestamp
*/
sensor->ts_ref = iio_get_time_ns(hw->iio_devs[i]);
}
return 0;
}
int st_lsm6dsx_resume_fifo(struct st_lsm6dsx_hw *hw)
{
int err;
/* reset hw ts counter */
err = st_lsm6dsx_reset_hw_ts(hw);
if (err < 0)
return err;
return st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
}
/*
* Set max bulk read to ST_LSM6DSX_MAX_WORD_LEN/ST_LSM6DSX_MAX_TAGGED_WORD_LEN
* in order to avoid a kmalloc for each bus access
*/
static inline int st_lsm6dsx_read_block(struct st_lsm6dsx_hw *hw, u8 addr,
u8 *data, unsigned int data_len,
unsigned int max_word_len)
{
unsigned int word_len, read_len = 0;
int err;
while (read_len < data_len) {
word_len = min_t(unsigned int, data_len - read_len,
max_word_len);
err = st_lsm6dsx_read_locked(hw, addr, data + read_len,
word_len);
if (err < 0)
return err;
read_len += word_len;
}
return 0;
}
#define ST_LSM6DSX_IIO_BUFF_SIZE (ALIGN(ST_LSM6DSX_SAMPLE_SIZE, \
sizeof(s64)) + sizeof(s64))
/**
* st_lsm6dsx_read_fifo() - hw FIFO read routine
* @hw: Pointer to instance of struct st_lsm6dsx_hw.
*
* Read samples from the hw FIFO and push them to IIO buffers.
*
* Return: Number of bytes read from the FIFO
*/
int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw)
{
struct st_lsm6dsx_sensor *acc_sensor, *gyro_sensor, *ext_sensor = NULL;
int err, sip, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset;
u16 fifo_len, pattern_len = hw->sip * ST_LSM6DSX_SAMPLE_SIZE;
u16 fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask;
bool reset_ts = false;
__le16 fifo_status;
s64 ts = 0;
err = st_lsm6dsx_read_locked(hw,
hw->settings->fifo_ops.fifo_diff.addr,
&fifo_status, sizeof(fifo_status));
if (err < 0) {
dev_err(hw->dev, "failed to read fifo status (err=%d)\n",
err);
return err;
}
if (fifo_status & cpu_to_le16(ST_LSM6DSX_FIFO_EMPTY_MASK))
return 0;
fifo_len = (le16_to_cpu(fifo_status) & fifo_diff_mask) *
ST_LSM6DSX_CHAN_SIZE;
fifo_len = (fifo_len / pattern_len) * pattern_len;
acc_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
gyro_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_GYRO]);
if (hw->iio_devs[ST_LSM6DSX_ID_EXT0])
ext_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_EXT0]);
for (read_len = 0; read_len < fifo_len; read_len += pattern_len) {
err = st_lsm6dsx_read_block(hw, ST_LSM6DSX_REG_FIFO_OUTL_ADDR,
hw->buff, pattern_len,
ST_LSM6DSX_MAX_WORD_LEN);
if (err < 0) {
dev_err(hw->dev,
"failed to read pattern from fifo (err=%d)\n",
err);
return err;
}
/*
* Data are written to the FIFO with a specific pattern
* depending on the configured ODRs. The first sequence of data
* stored in FIFO contains the data of all enabled sensors
* (e.g. Gx, Gy, Gz, Ax, Ay, Az, Ts), then data are repeated
* depending on the value of the decimation factor set for each
* sensor.
*
* Supposing the FIFO is storing data from gyroscope and
* accelerometer at different ODRs:
* - gyroscope ODR = 208Hz, accelerometer ODR = 104Hz
* Since the gyroscope ODR is twice the accelerometer one, the
* following pattern is repeated every 9 samples:
* - Gx, Gy, Gz, Ax, Ay, Az, Ts, Gx, Gy, Gz, Ts, Gx, ..
*/
ext_sip = ext_sensor ? ext_sensor->sip : 0;
gyro_sip = gyro_sensor->sip;
acc_sip = acc_sensor->sip;
ts_sip = hw->ts_sip;
offset = 0;
sip = 0;
while (acc_sip > 0 || gyro_sip > 0 || ext_sip > 0) {
if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
memcpy(hw->scan[ST_LSM6DSX_ID_GYRO].channels,
&hw->buff[offset],
sizeof(hw->scan[ST_LSM6DSX_ID_GYRO].channels));
offset += sizeof(hw->scan[ST_LSM6DSX_ID_GYRO].channels);
}
if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
memcpy(hw->scan[ST_LSM6DSX_ID_ACC].channels,
&hw->buff[offset],
sizeof(hw->scan[ST_LSM6DSX_ID_ACC].channels));
offset += sizeof(hw->scan[ST_LSM6DSX_ID_ACC].channels);
}
if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
memcpy(hw->scan[ST_LSM6DSX_ID_EXT0].channels,
&hw->buff[offset],
sizeof(hw->scan[ST_LSM6DSX_ID_EXT0].channels));
offset += sizeof(hw->scan[ST_LSM6DSX_ID_EXT0].channels);
}
if (ts_sip-- > 0) {
u8 data[ST_LSM6DSX_SAMPLE_SIZE];
memcpy(data, &hw->buff[offset], sizeof(data));
/*
* hw timestamp is 3B long and it is stored
* in FIFO using 6B as 4th FIFO data set
* according to this schema:
* B0 = ts[15:8], B1 = ts[23:16], B3 = ts[7:0]
*/
ts = data[1] << 16 | data[0] << 8 | data[3];
/*
* check if hw timestamp engine is going to
* reset (the sensor generates an interrupt
* to signal the hw timestamp will reset in
* 1.638s)
*/
if (!reset_ts && ts >= 0xff0000)
reset_ts = true;
ts *= hw->ts_gain;
offset += ST_LSM6DSX_SAMPLE_SIZE;
}
if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
/*
* We need to discards gyro samples during
* filters settling time
*/
if (gyro_sensor->samples_to_discard > 0)
gyro_sensor->samples_to_discard--;
else
iio_push_to_buffers_with_timestamp(
hw->iio_devs[ST_LSM6DSX_ID_GYRO],
&hw->scan[ST_LSM6DSX_ID_GYRO],
gyro_sensor->ts_ref + ts);
gyro_sip--;
}
if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
/*
* We need to discards accel samples during
* filters settling time
*/
if (acc_sensor->samples_to_discard > 0)
acc_sensor->samples_to_discard--;
else
iio_push_to_buffers_with_timestamp(
hw->iio_devs[ST_LSM6DSX_ID_ACC],
&hw->scan[ST_LSM6DSX_ID_ACC],
acc_sensor->ts_ref + ts);
acc_sip--;
}
if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
iio_push_to_buffers_with_timestamp(
hw->iio_devs[ST_LSM6DSX_ID_EXT0],
&hw->scan[ST_LSM6DSX_ID_EXT0],
ext_sensor->ts_ref + ts);
ext_sip--;
}
sip++;
}
}
if (unlikely(reset_ts)) {
err = st_lsm6dsx_reset_hw_ts(hw);
if (err < 0) {
dev_err(hw->dev, "failed to reset hw ts (err=%d)\n",
err);
return err;
}
}
return read_len;
}
#define ST_LSM6DSX_INVALID_SAMPLE 0x7ffd
static int
st_lsm6dsx_push_tagged_data(struct st_lsm6dsx_hw *hw, u8 tag,
u8 *data, s64 ts)
{
s16 val = le16_to_cpu(*(__le16 *)data);
struct st_lsm6dsx_sensor *sensor;
struct iio_dev *iio_dev;
/* invalid sample during bootstrap phase */
if (val >= ST_LSM6DSX_INVALID_SAMPLE)
return -EINVAL;
/*
* EXT_TAG are managed in FIFO fashion so ST_LSM6DSX_EXT0_TAG
* corresponds to the first enabled channel, ST_LSM6DSX_EXT1_TAG
* to the second one and ST_LSM6DSX_EXT2_TAG to the last enabled
* channel
*/
switch (tag) {
case ST_LSM6DSX_GYRO_TAG:
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_GYRO];
break;
case ST_LSM6DSX_ACC_TAG:
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_ACC];
break;
case ST_LSM6DSX_EXT0_TAG:
if (hw->enable_mask & BIT(ST_LSM6DSX_ID_EXT0))
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_EXT0];
else if (hw->enable_mask & BIT(ST_LSM6DSX_ID_EXT1))
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_EXT1];
else
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_EXT2];
break;
case ST_LSM6DSX_EXT1_TAG:
if ((hw->enable_mask & BIT(ST_LSM6DSX_ID_EXT0)) &&
(hw->enable_mask & BIT(ST_LSM6DSX_ID_EXT1)))
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_EXT1];
else
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_EXT2];
break;
case ST_LSM6DSX_EXT2_TAG:
iio_dev = hw->iio_devs[ST_LSM6DSX_ID_EXT2];
break;
default:
return -EINVAL;
}
sensor = iio_priv(iio_dev);
iio_push_to_buffers_with_timestamp(iio_dev, data,
ts + sensor->ts_ref);
return 0;
}
/**
* st_lsm6dsx_read_tagged_fifo() - tagged hw FIFO read routine
* @hw: Pointer to instance of struct st_lsm6dsx_hw.
*
* Read samples from the hw FIFO and push them to IIO buffers.
*
* Return: Number of bytes read from the FIFO
*/
int st_lsm6dsx_read_tagged_fifo(struct st_lsm6dsx_hw *hw)
{
u16 pattern_len = hw->sip * ST_LSM6DSX_TAGGED_SAMPLE_SIZE;
u16 fifo_len, fifo_diff_mask;
/*
* Alignment needed as this can ultimately be passed to a
* call to iio_push_to_buffers_with_timestamp() which
* must be passed a buffer that is aligned to 8 bytes so
* as to allow insertion of a naturally aligned timestamp.
*/
u8 iio_buff[ST_LSM6DSX_IIO_BUFF_SIZE] __aligned(8);
u8 tag;
bool reset_ts = false;
int i, err, read_len;
__le16 fifo_status;
s64 ts = 0;
err = st_lsm6dsx_read_locked(hw,
hw->settings->fifo_ops.fifo_diff.addr,
&fifo_status, sizeof(fifo_status));
if (err < 0) {
dev_err(hw->dev, "failed to read fifo status (err=%d)\n",
err);
return err;
}
fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask;
fifo_len = (le16_to_cpu(fifo_status) & fifo_diff_mask) *
ST_LSM6DSX_TAGGED_SAMPLE_SIZE;
if (!fifo_len)
return 0;
for (read_len = 0; read_len < fifo_len; read_len += pattern_len) {
err = st_lsm6dsx_read_block(hw,
ST_LSM6DSX_REG_FIFO_OUT_TAG_ADDR,
hw->buff, pattern_len,
ST_LSM6DSX_MAX_TAGGED_WORD_LEN);
if (err < 0) {
dev_err(hw->dev,
"failed to read pattern from fifo (err=%d)\n",
err);
return err;
}
for (i = 0; i < pattern_len;
i += ST_LSM6DSX_TAGGED_SAMPLE_SIZE) {
memcpy(iio_buff, &hw->buff[i + ST_LSM6DSX_TAG_SIZE],
ST_LSM6DSX_SAMPLE_SIZE);
tag = hw->buff[i] >> 3;
if (tag == ST_LSM6DSX_TS_TAG) {
/*
* hw timestamp is 4B long and it is stored
* in FIFO according to this schema:
* B0 = ts[7:0], B1 = ts[15:8], B2 = ts[23:16],
* B3 = ts[31:24]
*/
ts = le32_to_cpu(*((__le32 *)iio_buff));
/*
* check if hw timestamp engine is going to
* reset (the sensor generates an interrupt
* to signal the hw timestamp will reset in
* 1.638s)
*/
if (!reset_ts && ts >= 0xffff0000)
reset_ts = true;
ts *= hw->ts_gain;
} else {
st_lsm6dsx_push_tagged_data(hw, tag, iio_buff,
ts);
}
}
}
if (unlikely(reset_ts)) {
err = st_lsm6dsx_reset_hw_ts(hw);
if (err < 0)
return err;
}
return read_len;
}
int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw)
{
int err;
if (!hw->settings->fifo_ops.read_fifo)
return -ENOTSUPP;
mutex_lock(&hw->fifo_lock);
hw->settings->fifo_ops.read_fifo(hw);
err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_BYPASS);
mutex_unlock(&hw->fifo_lock);
return err;
}
static void
st_lsm6dsx_update_samples_to_discard(struct st_lsm6dsx_sensor *sensor)
{
const struct st_lsm6dsx_samples_to_discard *data;
struct st_lsm6dsx_hw *hw = sensor->hw;
int i;
if (sensor->id != ST_LSM6DSX_ID_GYRO &&
sensor->id != ST_LSM6DSX_ID_ACC)
return;
/* check if drdy mask is supported in hw */
if (hw->settings->drdy_mask.addr)
return;
data = &hw->settings->samples_to_discard[sensor->id];
for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) {
if (data->val[i].milli_hz == sensor->odr) {
sensor->samples_to_discard = data->val[i].samples;
return;
}
}
}
int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable)
{
struct st_lsm6dsx_hw *hw = sensor->hw;
u8 fifo_mask;
int err;
mutex_lock(&hw->conf_lock);
if (enable)
fifo_mask = hw->fifo_mask | BIT(sensor->id);
else
fifo_mask = hw->fifo_mask & ~BIT(sensor->id);
if (hw->fifo_mask) {
err = st_lsm6dsx_flush_fifo(hw);
if (err < 0)
goto out;
}
if (enable)
st_lsm6dsx_update_samples_to_discard(sensor);
err = st_lsm6dsx_device_set_enable(sensor, enable);
if (err < 0)
goto out;
err = st_lsm6dsx_set_fifo_odr(sensor, enable);
if (err < 0)
goto out;
err = st_lsm6dsx_update_decimators(hw);
if (err < 0)
goto out;
err = st_lsm6dsx_update_watermark(sensor, sensor->watermark);
if (err < 0)
goto out;
if (fifo_mask) {
err = st_lsm6dsx_resume_fifo(hw);
if (err < 0)
goto out;
}
hw->fifo_mask = fifo_mask;
out:
mutex_unlock(&hw->conf_lock);
return err;
}
static int st_lsm6dsx_buffer_preenable(struct iio_dev *iio_dev)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
if (!hw->settings->fifo_ops.update_fifo)
return -ENOTSUPP;
return hw->settings->fifo_ops.update_fifo(sensor, true);
}
static int st_lsm6dsx_buffer_postdisable(struct iio_dev *iio_dev)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
if (!hw->settings->fifo_ops.update_fifo)
return -ENOTSUPP;
return hw->settings->fifo_ops.update_fifo(sensor, false);
}
static const struct iio_buffer_setup_ops st_lsm6dsx_buffer_ops = {
.preenable = st_lsm6dsx_buffer_preenable,
.postdisable = st_lsm6dsx_buffer_postdisable,
};
int st_lsm6dsx_fifo_setup(struct st_lsm6dsx_hw *hw)
{
int i, ret;
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i])
continue;
ret = devm_iio_kfifo_buffer_setup(hw->dev, hw->iio_devs[i],
&st_lsm6dsx_buffer_ops);
if (ret)
return ret;
}
return 0;
}
| linux-master | drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c |
/*
* STMicroelectronics st_lsm6dsx i2c controller driver
*
* i2c controller embedded in lsm6dx series can connect up to four
* slave devices using accelerometer sensor as trigger for i2c
* read/write operations. Current implementation relies on SLV0 channel
* for slave configuration and SLV{1,2,3} to read data and push them into
* the hw FIFO
*
* Copyright (C) 2018 Lorenzo Bianconi <[email protected]>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/bitfield.h>
#include "st_lsm6dsx.h"
#define ST_LSM6DSX_SLV_ADDR(n, base) ((base) + (n) * 3)
#define ST_LSM6DSX_SLV_SUB_ADDR(n, base) ((base) + 1 + (n) * 3)
#define ST_LSM6DSX_SLV_CONFIG(n, base) ((base) + 2 + (n) * 3)
#define ST_LS6DSX_READ_OP_MASK GENMASK(2, 0)
static const struct st_lsm6dsx_ext_dev_settings st_lsm6dsx_ext_dev_table[] = {
/* LIS2MDL */
{
.i2c_addr = { 0x1e },
.wai = {
.addr = 0x4f,
.val = 0x40,
},
.id = ST_LSM6DSX_ID_MAGN,
.odr_table = {
.reg = {
.addr = 0x60,
.mask = GENMASK(3, 2),
},
.odr_avl[0] = { 10000, 0x0 },
.odr_avl[1] = { 20000, 0x1 },
.odr_avl[2] = { 50000, 0x2 },
.odr_avl[3] = { 100000, 0x3 },
.odr_len = 4,
},
.fs_table = {
.fs_avl[0] = {
.gain = 1500,
.val = 0x0,
}, /* 1500 uG/LSB */
.fs_len = 1,
},
.temp_comp = {
.addr = 0x60,
.mask = BIT(7),
},
.pwr_table = {
.reg = {
.addr = 0x60,
.mask = GENMASK(1, 0),
},
.off_val = 0x2,
.on_val = 0x0,
},
.off_canc = {
.addr = 0x61,
.mask = BIT(1),
},
.bdu = {
.addr = 0x62,
.mask = BIT(4),
},
.out = {
.addr = 0x68,
.len = 6,
},
},
/* LIS3MDL */
{
.i2c_addr = { 0x1e },
.wai = {
.addr = 0x0f,
.val = 0x3d,
},
.id = ST_LSM6DSX_ID_MAGN,
.odr_table = {
.reg = {
.addr = 0x20,
.mask = GENMASK(4, 2),
},
.odr_avl[0] = { 1000, 0x0 },
.odr_avl[1] = { 2000, 0x1 },
.odr_avl[2] = { 3000, 0x2 },
.odr_avl[3] = { 5000, 0x3 },
.odr_avl[4] = { 10000, 0x4 },
.odr_avl[5] = { 20000, 0x5 },
.odr_avl[6] = { 40000, 0x6 },
.odr_avl[7] = { 80000, 0x7 },
.odr_len = 8,
},
.fs_table = {
.reg = {
.addr = 0x21,
.mask = GENMASK(6, 5),
},
.fs_avl[0] = {
.gain = 146,
.val = 0x00,
}, /* 4000 uG/LSB */
.fs_avl[1] = {
.gain = 292,
.val = 0x01,
}, /* 8000 uG/LSB */
.fs_avl[2] = {
.gain = 438,
.val = 0x02,
}, /* 12000 uG/LSB */
.fs_avl[3] = {
.gain = 584,
.val = 0x03,
}, /* 16000 uG/LSB */
.fs_len = 4,
},
.pwr_table = {
.reg = {
.addr = 0x22,
.mask = GENMASK(1, 0),
},
.off_val = 0x2,
.on_val = 0x0,
},
.bdu = {
.addr = 0x24,
.mask = BIT(6),
},
.out = {
.addr = 0x28,
.len = 6,
},
},
};
static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw)
{
struct st_lsm6dsx_sensor *sensor;
u32 odr, timeout;
sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
odr = (hw->enable_mask & BIT(ST_LSM6DSX_ID_ACC)) ? sensor->odr : 12500;
/* set 10ms as minimum timeout for i2c slave configuration */
timeout = max_t(u32, 2000000U / odr + 1, 10);
msleep(timeout);
}
/*
* st_lsm6dsx_shub_read_output - read i2c controller register
*
* Read st_lsm6dsx i2c controller register
*/
int st_lsm6dsx_shub_read_output(struct st_lsm6dsx_hw *hw, u8 *data, int len)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
int err;
mutex_lock(&hw->page_lock);
hub_settings = &hw->settings->shub_settings;
if (hub_settings->shub_out.sec_page) {
err = st_lsm6dsx_set_page(hw, true);
if (err < 0)
goto out;
}
err = regmap_bulk_read(hw->regmap, hub_settings->shub_out.addr,
data, len);
if (hub_settings->shub_out.sec_page)
st_lsm6dsx_set_page(hw, false);
out:
mutex_unlock(&hw->page_lock);
return err;
}
/*
* st_lsm6dsx_shub_write_reg - write i2c controller register
*
* Write st_lsm6dsx i2c controller register
*/
static int st_lsm6dsx_shub_write_reg(struct st_lsm6dsx_hw *hw, u8 addr,
u8 *data, int len)
{
int err;
mutex_lock(&hw->page_lock);
err = st_lsm6dsx_set_page(hw, true);
if (err < 0)
goto out;
err = regmap_bulk_write(hw->regmap, addr, data, len);
st_lsm6dsx_set_page(hw, false);
out:
mutex_unlock(&hw->page_lock);
return err;
}
static int
st_lsm6dsx_shub_write_reg_with_mask(struct st_lsm6dsx_hw *hw, u8 addr,
u8 mask, u8 val)
{
int err;
mutex_lock(&hw->page_lock);
err = st_lsm6dsx_set_page(hw, true);
if (err < 0)
goto out;
err = regmap_update_bits(hw->regmap, addr, mask, val);
st_lsm6dsx_set_page(hw, false);
out:
mutex_unlock(&hw->page_lock);
return err;
}
static int st_lsm6dsx_shub_master_enable(struct st_lsm6dsx_sensor *sensor,
bool enable)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
struct st_lsm6dsx_hw *hw = sensor->hw;
unsigned int data;
int err;
/* enable acc sensor as trigger */
err = st_lsm6dsx_sensor_set_enable(sensor, enable);
if (err < 0)
return err;
mutex_lock(&hw->page_lock);
hub_settings = &hw->settings->shub_settings;
if (hub_settings->master_en.sec_page) {
err = st_lsm6dsx_set_page(hw, true);
if (err < 0)
goto out;
}
data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->master_en.mask);
err = regmap_update_bits(hw->regmap, hub_settings->master_en.addr,
hub_settings->master_en.mask, data);
if (hub_settings->master_en.sec_page)
st_lsm6dsx_set_page(hw, false);
out:
mutex_unlock(&hw->page_lock);
return err;
}
/*
* st_lsm6dsx_shub_read - read data from slave device register
*
* Read data from slave device register. SLV0 is used for
* one-shot read operation
*/
static int
st_lsm6dsx_shub_read(struct st_lsm6dsx_sensor *sensor, u8 addr,
u8 *data, int len)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
u8 config[3], slv_addr, slv_config = 0;
struct st_lsm6dsx_hw *hw = sensor->hw;
const struct st_lsm6dsx_reg *aux_sens;
int err;
hub_settings = &hw->settings->shub_settings;
slv_addr = ST_LSM6DSX_SLV_ADDR(0, hub_settings->slv0_addr);
aux_sens = &hw->settings->shub_settings.aux_sens;
/* do not overwrite aux_sens */
if (slv_addr + 2 == aux_sens->addr)
slv_config = ST_LSM6DSX_SHIFT_VAL(3, aux_sens->mask);
config[0] = (sensor->ext_info.addr << 1) | 1;
config[1] = addr;
config[2] = (len & ST_LS6DSX_READ_OP_MASK) | slv_config;
err = st_lsm6dsx_shub_write_reg(hw, slv_addr, config,
sizeof(config));
if (err < 0)
return err;
err = st_lsm6dsx_shub_master_enable(sensor, true);
if (err < 0)
return err;
st_lsm6dsx_shub_wait_complete(hw);
err = st_lsm6dsx_shub_read_output(hw, data,
len & ST_LS6DSX_READ_OP_MASK);
if (err < 0)
return err;
st_lsm6dsx_shub_master_enable(sensor, false);
config[0] = hub_settings->pause;
config[1] = 0;
config[2] = slv_config;
return st_lsm6dsx_shub_write_reg(hw, slv_addr, config,
sizeof(config));
}
/*
* st_lsm6dsx_shub_write - write data to slave device register
*
* Write data from slave device register. SLV0 is used for
* one-shot write operation
*/
static int
st_lsm6dsx_shub_write(struct st_lsm6dsx_sensor *sensor, u8 addr,
u8 *data, int len)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
struct st_lsm6dsx_hw *hw = sensor->hw;
u8 config[2], slv_addr;
int err, i;
hub_settings = &hw->settings->shub_settings;
if (hub_settings->wr_once.addr) {
unsigned int data;
data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->wr_once.mask);
err = st_lsm6dsx_shub_write_reg_with_mask(hw,
hub_settings->wr_once.addr,
hub_settings->wr_once.mask,
data);
if (err < 0)
return err;
}
slv_addr = ST_LSM6DSX_SLV_ADDR(0, hub_settings->slv0_addr);
config[0] = sensor->ext_info.addr << 1;
for (i = 0 ; i < len; i++) {
config[1] = addr + i;
err = st_lsm6dsx_shub_write_reg(hw, slv_addr, config,
sizeof(config));
if (err < 0)
return err;
err = st_lsm6dsx_shub_write_reg(hw, hub_settings->dw_slv0_addr,
&data[i], 1);
if (err < 0)
return err;
err = st_lsm6dsx_shub_master_enable(sensor, true);
if (err < 0)
return err;
st_lsm6dsx_shub_wait_complete(hw);
st_lsm6dsx_shub_master_enable(sensor, false);
}
config[0] = hub_settings->pause;
config[1] = 0;
return st_lsm6dsx_shub_write_reg(hw, slv_addr, config, sizeof(config));
}
static int
st_lsm6dsx_shub_write_with_mask(struct st_lsm6dsx_sensor *sensor,
u8 addr, u8 mask, u8 val)
{
int err;
u8 data;
err = st_lsm6dsx_shub_read(sensor, addr, &data, sizeof(data));
if (err < 0)
return err;
data = ((data & ~mask) | (val << __ffs(mask) & mask));
return st_lsm6dsx_shub_write(sensor, addr, &data, sizeof(data));
}
static int
st_lsm6dsx_shub_get_odr_val(struct st_lsm6dsx_sensor *sensor,
u32 odr, u16 *val)
{
const struct st_lsm6dsx_ext_dev_settings *settings;
int i;
settings = sensor->ext_info.settings;
for (i = 0; i < settings->odr_table.odr_len; i++) {
if (settings->odr_table.odr_avl[i].milli_hz == odr)
break;
}
if (i == settings->odr_table.odr_len)
return -EINVAL;
*val = settings->odr_table.odr_avl[i].val;
return 0;
}
static int
st_lsm6dsx_shub_set_odr(struct st_lsm6dsx_sensor *sensor, u32 odr)
{
const struct st_lsm6dsx_ext_dev_settings *settings;
u16 val;
int err;
err = st_lsm6dsx_shub_get_odr_val(sensor, odr, &val);
if (err < 0)
return err;
settings = sensor->ext_info.settings;
return st_lsm6dsx_shub_write_with_mask(sensor,
settings->odr_table.reg.addr,
settings->odr_table.reg.mask,
val);
}
/* use SLV{1,2,3} for FIFO read operations */
static int
st_lsm6dsx_shub_config_channels(struct st_lsm6dsx_sensor *sensor,
bool enable)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
const struct st_lsm6dsx_ext_dev_settings *settings;
u8 config[9] = {}, enable_mask, slv_addr;
struct st_lsm6dsx_hw *hw = sensor->hw;
struct st_lsm6dsx_sensor *cur_sensor;
int i, j = 0;
hub_settings = &hw->settings->shub_settings;
if (enable)
enable_mask = hw->enable_mask | BIT(sensor->id);
else
enable_mask = hw->enable_mask & ~BIT(sensor->id);
for (i = ST_LSM6DSX_ID_EXT0; i <= ST_LSM6DSX_ID_EXT2; i++) {
if (!hw->iio_devs[i])
continue;
cur_sensor = iio_priv(hw->iio_devs[i]);
if (!(enable_mask & BIT(cur_sensor->id)))
continue;
settings = cur_sensor->ext_info.settings;
config[j] = (sensor->ext_info.addr << 1) | 1;
config[j + 1] = settings->out.addr;
config[j + 2] = (settings->out.len & ST_LS6DSX_READ_OP_MASK) |
hub_settings->batch_en;
j += 3;
}
slv_addr = ST_LSM6DSX_SLV_ADDR(1, hub_settings->slv0_addr);
return st_lsm6dsx_shub_write_reg(hw, slv_addr, config,
sizeof(config));
}
int st_lsm6dsx_shub_set_enable(struct st_lsm6dsx_sensor *sensor, bool enable)
{
const struct st_lsm6dsx_ext_dev_settings *settings;
int err;
err = st_lsm6dsx_shub_config_channels(sensor, enable);
if (err < 0)
return err;
settings = sensor->ext_info.settings;
if (enable) {
err = st_lsm6dsx_shub_set_odr(sensor,
sensor->ext_info.slv_odr);
if (err < 0)
return err;
} else {
err = st_lsm6dsx_shub_write_with_mask(sensor,
settings->odr_table.reg.addr,
settings->odr_table.reg.mask, 0);
if (err < 0)
return err;
}
if (settings->pwr_table.reg.addr) {
u8 val;
val = enable ? settings->pwr_table.on_val
: settings->pwr_table.off_val;
err = st_lsm6dsx_shub_write_with_mask(sensor,
settings->pwr_table.reg.addr,
settings->pwr_table.reg.mask, val);
if (err < 0)
return err;
}
return st_lsm6dsx_shub_master_enable(sensor, enable);
}
static int
st_lsm6dsx_shub_read_oneshot(struct st_lsm6dsx_sensor *sensor,
struct iio_chan_spec const *ch,
int *val)
{
int err, delay, len;
u8 data[4];
err = st_lsm6dsx_shub_set_enable(sensor, true);
if (err < 0)
return err;
delay = 1000000000 / sensor->ext_info.slv_odr;
usleep_range(delay, 2 * delay);
len = min_t(int, sizeof(data), ch->scan_type.realbits >> 3);
err = st_lsm6dsx_shub_read(sensor, ch->address, data, len);
if (err < 0)
return err;
err = st_lsm6dsx_shub_set_enable(sensor, false);
if (err < 0)
return err;
switch (len) {
case 2:
*val = (s16)le16_to_cpu(*((__le16 *)data));
break;
default:
return -EINVAL;
}
return IIO_VAL_INT;
}
static int
st_lsm6dsx_shub_read_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *ch,
int *val, int *val2, long mask)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(iio_dev);
if (ret)
break;
ret = st_lsm6dsx_shub_read_oneshot(sensor, ch, val);
iio_device_release_direct_mode(iio_dev);
break;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = sensor->ext_info.slv_odr / 1000;
*val2 = (sensor->ext_info.slv_odr % 1000) * 1000;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = sensor->gain;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static int
st_lsm6dsx_shub_set_full_scale(struct st_lsm6dsx_sensor *sensor,
u32 gain)
{
const struct st_lsm6dsx_fs_table_entry *fs_table;
int i, err;
fs_table = &sensor->ext_info.settings->fs_table;
if (!fs_table->reg.addr)
return -ENOTSUPP;
for (i = 0; i < fs_table->fs_len; i++) {
if (fs_table->fs_avl[i].gain == gain)
break;
}
if (i == fs_table->fs_len)
return -EINVAL;
err = st_lsm6dsx_shub_write_with_mask(sensor, fs_table->reg.addr,
fs_table->reg.mask,
fs_table->fs_avl[i].val);
if (err < 0)
return err;
sensor->gain = gain;
return 0;
}
static int
st_lsm6dsx_shub_write_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
int err;
err = iio_device_claim_direct_mode(iio_dev);
if (err)
return err;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ: {
u16 data;
val = val * 1000 + val2 / 1000;
err = st_lsm6dsx_shub_get_odr_val(sensor, val, &data);
if (!err) {
struct st_lsm6dsx_hw *hw = sensor->hw;
struct st_lsm6dsx_sensor *ref_sensor;
u8 odr_val;
int odr;
ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
odr = st_lsm6dsx_check_odr(ref_sensor, val, &odr_val);
if (odr < 0) {
err = odr;
goto release;
}
sensor->ext_info.slv_odr = val;
sensor->odr = odr;
}
break;
}
case IIO_CHAN_INFO_SCALE:
err = st_lsm6dsx_shub_set_full_scale(sensor, val2);
break;
default:
err = -EINVAL;
break;
}
release:
iio_device_release_direct_mode(iio_dev);
return err;
}
static ssize_t
st_lsm6dsx_shub_sampling_freq_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
const struct st_lsm6dsx_ext_dev_settings *settings;
int i, len = 0;
settings = sensor->ext_info.settings;
for (i = 0; i < settings->odr_table.odr_len; i++) {
u32 val = settings->odr_table.odr_avl[i].milli_hz;
len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
val / 1000, val % 1000);
}
buf[len - 1] = '\n';
return len;
}
static ssize_t st_lsm6dsx_shub_scale_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
const struct st_lsm6dsx_ext_dev_settings *settings;
int i, len = 0;
settings = sensor->ext_info.settings;
for (i = 0; i < settings->fs_table.fs_len; i++)
len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ",
settings->fs_table.fs_avl[i].gain);
buf[len - 1] = '\n';
return len;
}
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_shub_sampling_freq_avail);
static IIO_DEVICE_ATTR(in_scale_available, 0444,
st_lsm6dsx_shub_scale_avail, NULL, 0);
static struct attribute *st_lsm6dsx_shub_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group st_lsm6dsx_shub_attribute_group = {
.attrs = st_lsm6dsx_shub_attributes,
};
static const struct iio_info st_lsm6dsx_shub_info = {
.attrs = &st_lsm6dsx_shub_attribute_group,
.read_raw = st_lsm6dsx_shub_read_raw,
.write_raw = st_lsm6dsx_shub_write_raw,
.hwfifo_set_watermark = st_lsm6dsx_set_watermark,
};
static struct iio_dev *
st_lsm6dsx_shub_alloc_iiodev(struct st_lsm6dsx_hw *hw,
enum st_lsm6dsx_sensor_id id,
const struct st_lsm6dsx_ext_dev_settings *info,
u8 i2c_addr, const char *name)
{
enum st_lsm6dsx_sensor_id ref_id = ST_LSM6DSX_ID_ACC;
struct iio_chan_spec *ext_channels;
struct st_lsm6dsx_sensor *sensor;
struct iio_dev *iio_dev;
iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
if (!iio_dev)
return NULL;
iio_dev->modes = INDIO_DIRECT_MODE;
iio_dev->info = &st_lsm6dsx_shub_info;
sensor = iio_priv(iio_dev);
sensor->id = id;
sensor->hw = hw;
sensor->odr = hw->settings->odr_table[ref_id].odr_avl[0].milli_hz;
sensor->ext_info.slv_odr = info->odr_table.odr_avl[0].milli_hz;
sensor->gain = info->fs_table.fs_avl[0].gain;
sensor->ext_info.settings = info;
sensor->ext_info.addr = i2c_addr;
sensor->watermark = 1;
switch (info->id) {
case ST_LSM6DSX_ID_MAGN: {
const struct iio_chan_spec magn_channels[] = {
ST_LSM6DSX_CHANNEL(IIO_MAGN, info->out.addr,
IIO_MOD_X, 0),
ST_LSM6DSX_CHANNEL(IIO_MAGN, info->out.addr + 2,
IIO_MOD_Y, 1),
ST_LSM6DSX_CHANNEL(IIO_MAGN, info->out.addr + 4,
IIO_MOD_Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
ext_channels = devm_kzalloc(hw->dev, sizeof(magn_channels),
GFP_KERNEL);
if (!ext_channels)
return NULL;
memcpy(ext_channels, magn_channels, sizeof(magn_channels));
iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
iio_dev->channels = ext_channels;
iio_dev->num_channels = ARRAY_SIZE(magn_channels);
scnprintf(sensor->name, sizeof(sensor->name), "%s_magn",
name);
break;
}
default:
return NULL;
}
iio_dev->name = sensor->name;
return iio_dev;
}
static int st_lsm6dsx_shub_init_device(struct st_lsm6dsx_sensor *sensor)
{
const struct st_lsm6dsx_ext_dev_settings *settings;
int err;
settings = sensor->ext_info.settings;
if (settings->bdu.addr) {
err = st_lsm6dsx_shub_write_with_mask(sensor,
settings->bdu.addr,
settings->bdu.mask, 1);
if (err < 0)
return err;
}
if (settings->temp_comp.addr) {
err = st_lsm6dsx_shub_write_with_mask(sensor,
settings->temp_comp.addr,
settings->temp_comp.mask, 1);
if (err < 0)
return err;
}
if (settings->off_canc.addr) {
err = st_lsm6dsx_shub_write_with_mask(sensor,
settings->off_canc.addr,
settings->off_canc.mask, 1);
if (err < 0)
return err;
}
return 0;
}
static int
st_lsm6dsx_shub_check_wai(struct st_lsm6dsx_hw *hw, u8 *i2c_addr,
const struct st_lsm6dsx_ext_dev_settings *settings)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
u8 config[3], data, slv_addr, slv_config = 0;
const struct st_lsm6dsx_reg *aux_sens;
struct st_lsm6dsx_sensor *sensor;
bool found = false;
int i, err;
sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
hub_settings = &hw->settings->shub_settings;
aux_sens = &hw->settings->shub_settings.aux_sens;
slv_addr = ST_LSM6DSX_SLV_ADDR(0, hub_settings->slv0_addr);
/* do not overwrite aux_sens */
if (slv_addr + 2 == aux_sens->addr)
slv_config = ST_LSM6DSX_SHIFT_VAL(3, aux_sens->mask);
for (i = 0; i < ARRAY_SIZE(settings->i2c_addr); i++) {
if (!settings->i2c_addr[i])
continue;
/* read wai slave register */
config[0] = (settings->i2c_addr[i] << 1) | 0x1;
config[1] = settings->wai.addr;
config[2] = 0x1 | slv_config;
err = st_lsm6dsx_shub_write_reg(hw, slv_addr, config,
sizeof(config));
if (err < 0)
return err;
err = st_lsm6dsx_shub_master_enable(sensor, true);
if (err < 0)
return err;
st_lsm6dsx_shub_wait_complete(hw);
err = st_lsm6dsx_shub_read_output(hw, &data, sizeof(data));
st_lsm6dsx_shub_master_enable(sensor, false);
if (err < 0)
return err;
if (data != settings->wai.val)
continue;
*i2c_addr = settings->i2c_addr[i];
found = true;
break;
}
/* reset SLV0 channel */
config[0] = hub_settings->pause;
config[1] = 0;
config[2] = slv_config;
err = st_lsm6dsx_shub_write_reg(hw, slv_addr, config,
sizeof(config));
if (err < 0)
return err;
return found ? 0 : -ENODEV;
}
int st_lsm6dsx_shub_probe(struct st_lsm6dsx_hw *hw, const char *name)
{
enum st_lsm6dsx_sensor_id id = ST_LSM6DSX_ID_EXT0;
struct st_lsm6dsx_sensor *sensor;
int err, i, num_ext_dev = 0;
u8 i2c_addr = 0;
for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_ext_dev_table); i++) {
err = st_lsm6dsx_shub_check_wai(hw, &i2c_addr,
&st_lsm6dsx_ext_dev_table[i]);
if (err == -ENODEV)
continue;
else if (err < 0)
return err;
hw->iio_devs[id] = st_lsm6dsx_shub_alloc_iiodev(hw, id,
&st_lsm6dsx_ext_dev_table[i],
i2c_addr, name);
if (!hw->iio_devs[id])
return -ENOMEM;
sensor = iio_priv(hw->iio_devs[id]);
err = st_lsm6dsx_shub_init_device(sensor);
if (err < 0)
return err;
if (++num_ext_dev >= hw->settings->shub_settings.num_ext_dev)
break;
id++;
}
return 0;
}
| linux-master | drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics st_lsm6dsx sensor driver
*
* The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
* and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
* interface standard output.
* LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
* acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
* +-125/+-245/+-500/+-1000/+-2000 dps
* LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
* allowing dynamic batching of sensor data.
* LSM9DSx series is similar but includes an additional magnetometer, handled
* by a different driver.
*
* Supported sensors:
* - LSM6DS3:
* - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
* - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
* - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
* - FIFO size: 8KB
*
* - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
* - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
* - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
* - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
* - FIFO size: 4KB
*
* - LSM6DSO/LSM6DSOX/ASM330LHH/ASM330LHHX/LSM6DSR/ISM330DHCX/LSM6DST/LSM6DSOP/
* LSM6DSTX/LSM6DSO16IS/ISM330IS:
* - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
* 833
* - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
* - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
* - FIFO size: 3KB
*
* - LSM6DSV/LSM6DSV16X:
* - Accelerometer/Gyroscope supported ODR [Hz]: 7.5, 15, 30, 60, 120, 240,
* 480, 960
* - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
* - Gyroscope supported full-scale [dps]: +-125/+-250/+-500/+-1000/+-2000
* - FIFO size: 3KB
*
* - LSM9DS1/LSM6DS0:
* - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
* - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
* - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
* - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
* - FIFO size: 32
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/minmax.h>
#include <linux/pm.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/bitfield.h>
#include <linux/platform_data/st_sensors_pdata.h>
#include "st_lsm6dsx.h"
#define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
#define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */
static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
{
.reset = {
.addr = 0x22,
.mask = BIT(0),
},
.boot = {
.addr = 0x22,
.mask = BIT(7),
},
.bdu = {
.addr = 0x22,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_LSM9DS1_ID,
.name = ST_LSM9DS1_DEV_NAME,
.wai = 0x68,
}, {
.hw_id = ST_LSM6DS0_ID,
.name = ST_LSM6DS0_DEV_NAME,
.wai = 0x68,
},
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6ds0_gyro_channels,
.len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
},
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x20,
.mask = GENMASK(7, 5),
},
.odr_avl[0] = { 10000, 0x01 },
.odr_avl[1] = { 50000, 0x02 },
.odr_avl[2] = { 119000, 0x03 },
.odr_avl[3] = { 238000, 0x04 },
.odr_avl[4] = { 476000, 0x05 },
.odr_avl[5] = { 952000, 0x06 },
.odr_len = 6,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(7, 5),
},
.odr_avl[0] = { 14900, 0x01 },
.odr_avl[1] = { 59500, 0x02 },
.odr_avl[2] = { 119000, 0x03 },
.odr_avl[3] = { 238000, 0x04 },
.odr_avl[4] = { 476000, 0x05 },
.odr_avl[5] = { 952000, 0x06 },
.odr_len = 6,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x20,
.mask = GENMASK(4, 3),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
.fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(4, 3),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
.fs_len = 3,
},
},
.irq_config = {
.irq1 = {
.addr = 0x0c,
.mask = BIT(3),
},
.irq2 = {
.addr = 0x0d,
.mask = BIT(3),
},
.hla = {
.addr = 0x22,
.mask = BIT(5),
},
.od = {
.addr = 0x22,
.mask = BIT(4),
},
},
.fifo_ops = {
.max_size = 32,
},
},
{
.reset = {
.addr = 0x12,
.mask = BIT(0),
},
.boot = {
.addr = 0x12,
.mask = BIT(7),
},
.bdu = {
.addr = 0x12,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_LSM6DS3_ID,
.name = ST_LSM6DS3_DEV_NAME,
.wai = 0x69,
},
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6dsx_gyro_channels,
.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
},
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_len = 6,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_len = 6,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
.fs_len = 4,
},
},
.irq_config = {
.irq1 = {
.addr = 0x0d,
.mask = BIT(3),
},
.irq2 = {
.addr = 0x0e,
.mask = BIT(3),
},
.lir = {
.addr = 0x58,
.mask = BIT(0),
},
.irq1_func = {
.addr = 0x5e,
.mask = BIT(5),
},
.irq2_func = {
.addr = 0x5f,
.mask = BIT(5),
},
.hla = {
.addr = 0x12,
.mask = BIT(5),
},
.od = {
.addr = 0x12,
.mask = BIT(4),
},
},
.decimator = {
[ST_LSM6DSX_ID_ACC] = {
.addr = 0x08,
.mask = GENMASK(2, 0),
},
[ST_LSM6DSX_ID_GYRO] = {
.addr = 0x08,
.mask = GENMASK(5, 3),
},
},
.fifo_ops = {
.update_fifo = st_lsm6dsx_update_fifo,
.read_fifo = st_lsm6dsx_read_fifo,
.fifo_th = {
.addr = 0x06,
.mask = GENMASK(11, 0),
},
.fifo_diff = {
.addr = 0x3a,
.mask = GENMASK(11, 0),
},
.max_size = 1365,
.th_wl = 3, /* 1LSB = 2B */
},
.ts_settings = {
.timer_en = {
.addr = 0x58,
.mask = BIT(7),
},
.hr_timer = {
.addr = 0x5c,
.mask = BIT(4),
},
.fifo_en = {
.addr = 0x07,
.mask = BIT(7),
},
.decimator = {
.addr = 0x09,
.mask = GENMASK(5, 3),
},
},
.event_settings = {
.wakeup_reg = {
.addr = 0x5B,
.mask = GENMASK(5, 0),
},
.wakeup_src_reg = 0x1b,
.wakeup_src_status_mask = BIT(3),
.wakeup_src_z_mask = BIT(0),
.wakeup_src_y_mask = BIT(1),
.wakeup_src_x_mask = BIT(2),
},
},
{
.reset = {
.addr = 0x12,
.mask = BIT(0),
},
.boot = {
.addr = 0x12,
.mask = BIT(7),
},
.bdu = {
.addr = 0x12,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_LSM6DS3H_ID,
.name = ST_LSM6DS3H_DEV_NAME,
.wai = 0x69,
},
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6dsx_gyro_channels,
.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
},
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_len = 6,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_len = 6,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
.fs_len = 4,
},
},
.irq_config = {
.irq1 = {
.addr = 0x0d,
.mask = BIT(3),
},
.irq2 = {
.addr = 0x0e,
.mask = BIT(3),
},
.lir = {
.addr = 0x58,
.mask = BIT(0),
},
.irq1_func = {
.addr = 0x5e,
.mask = BIT(5),
},
.irq2_func = {
.addr = 0x5f,
.mask = BIT(5),
},
.hla = {
.addr = 0x12,
.mask = BIT(5),
},
.od = {
.addr = 0x12,
.mask = BIT(4),
},
},
.decimator = {
[ST_LSM6DSX_ID_ACC] = {
.addr = 0x08,
.mask = GENMASK(2, 0),
},
[ST_LSM6DSX_ID_GYRO] = {
.addr = 0x08,
.mask = GENMASK(5, 3),
},
},
.fifo_ops = {
.update_fifo = st_lsm6dsx_update_fifo,
.read_fifo = st_lsm6dsx_read_fifo,
.fifo_th = {
.addr = 0x06,
.mask = GENMASK(11, 0),
},
.fifo_diff = {
.addr = 0x3a,
.mask = GENMASK(11, 0),
},
.max_size = 682,
.th_wl = 3, /* 1LSB = 2B */
},
.ts_settings = {
.timer_en = {
.addr = 0x58,
.mask = BIT(7),
},
.hr_timer = {
.addr = 0x5c,
.mask = BIT(4),
},
.fifo_en = {
.addr = 0x07,
.mask = BIT(7),
},
.decimator = {
.addr = 0x09,
.mask = GENMASK(5, 3),
},
},
.event_settings = {
.wakeup_reg = {
.addr = 0x5B,
.mask = GENMASK(5, 0),
},
.wakeup_src_reg = 0x1b,
.wakeup_src_status_mask = BIT(3),
.wakeup_src_z_mask = BIT(0),
.wakeup_src_y_mask = BIT(1),
.wakeup_src_x_mask = BIT(2),
},
},
{
.reset = {
.addr = 0x12,
.mask = BIT(0),
},
.boot = {
.addr = 0x12,
.mask = BIT(7),
},
.bdu = {
.addr = 0x12,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_LSM6DSL_ID,
.name = ST_LSM6DSL_DEV_NAME,
.wai = 0x6a,
}, {
.hw_id = ST_LSM6DSM_ID,
.name = ST_LSM6DSM_DEV_NAME,
.wai = 0x6a,
}, {
.hw_id = ST_ISM330DLC_ID,
.name = ST_ISM330DLC_DEV_NAME,
.wai = 0x6a,
}, {
.hw_id = ST_LSM6DS3TRC_ID,
.name = ST_LSM6DS3TRC_DEV_NAME,
.wai = 0x6a,
},
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6dsx_gyro_channels,
.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
},
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_len = 6,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_len = 6,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
.fs_len = 4,
},
},
.samples_to_discard = {
[ST_LSM6DSX_ID_ACC] = {
.val[0] = { 12500, 1 },
.val[1] = { 26000, 1 },
.val[2] = { 52000, 1 },
.val[3] = { 104000, 2 },
.val[4] = { 208000, 2 },
.val[5] = { 416000, 2 },
},
[ST_LSM6DSX_ID_GYRO] = {
.val[0] = { 12500, 2 },
.val[1] = { 26000, 5 },
.val[2] = { 52000, 7 },
.val[3] = { 104000, 12 },
.val[4] = { 208000, 20 },
.val[5] = { 416000, 36 },
},
},
.irq_config = {
.irq1 = {
.addr = 0x0d,
.mask = BIT(3),
},
.irq2 = {
.addr = 0x0e,
.mask = BIT(3),
},
.lir = {
.addr = 0x58,
.mask = BIT(0),
},
.irq1_func = {
.addr = 0x5e,
.mask = BIT(5),
},
.irq2_func = {
.addr = 0x5f,
.mask = BIT(5),
},
.hla = {
.addr = 0x12,
.mask = BIT(5),
},
.od = {
.addr = 0x12,
.mask = BIT(4),
},
},
.decimator = {
[ST_LSM6DSX_ID_ACC] = {
.addr = 0x08,
.mask = GENMASK(2, 0),
},
[ST_LSM6DSX_ID_GYRO] = {
.addr = 0x08,
.mask = GENMASK(5, 3),
},
[ST_LSM6DSX_ID_EXT0] = {
.addr = 0x09,
.mask = GENMASK(2, 0),
},
},
.fifo_ops = {
.update_fifo = st_lsm6dsx_update_fifo,
.read_fifo = st_lsm6dsx_read_fifo,
.fifo_th = {
.addr = 0x06,
.mask = GENMASK(10, 0),
},
.fifo_diff = {
.addr = 0x3a,
.mask = GENMASK(10, 0),
},
.max_size = 682,
.th_wl = 3, /* 1LSB = 2B */
},
.ts_settings = {
.timer_en = {
.addr = 0x19,
.mask = BIT(5),
},
.hr_timer = {
.addr = 0x5c,
.mask = BIT(4),
},
.fifo_en = {
.addr = 0x07,
.mask = BIT(7),
},
.decimator = {
.addr = 0x09,
.mask = GENMASK(5, 3),
},
},
.shub_settings = {
.page_mux = {
.addr = 0x01,
.mask = BIT(7),
},
.master_en = {
.addr = 0x1a,
.mask = BIT(0),
},
.pullup_en = {
.addr = 0x1a,
.mask = BIT(3),
},
.aux_sens = {
.addr = 0x04,
.mask = GENMASK(5, 4),
},
.wr_once = {
.addr = 0x07,
.mask = BIT(5),
},
.emb_func = {
.addr = 0x19,
.mask = BIT(2),
},
.num_ext_dev = 1,
.shub_out = {
.addr = 0x2e,
},
.slv0_addr = 0x02,
.dw_slv0_addr = 0x0e,
.pause = 0x7,
},
.event_settings = {
.enable_reg = {
.addr = 0x58,
.mask = BIT(7),
},
.wakeup_reg = {
.addr = 0x5B,
.mask = GENMASK(5, 0),
},
.wakeup_src_reg = 0x1b,
.wakeup_src_status_mask = BIT(3),
.wakeup_src_z_mask = BIT(0),
.wakeup_src_y_mask = BIT(1),
.wakeup_src_x_mask = BIT(2),
},
},
{
.reset = {
.addr = 0x12,
.mask = BIT(0),
},
.boot = {
.addr = 0x12,
.mask = BIT(7),
},
.bdu = {
.addr = 0x12,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_LSM6DSR_ID,
.name = ST_LSM6DSR_DEV_NAME,
.wai = 0x6b,
}, {
.hw_id = ST_ISM330DHCX_ID,
.name = ST_ISM330DHCX_DEV_NAME,
.wai = 0x6b,
}, {
.hw_id = ST_LSM6DSRX_ID,
.name = ST_LSM6DSRX_DEV_NAME,
.wai = 0x6b,
}, {
.hw_id = ST_LSM6DSO_ID,
.name = ST_LSM6DSO_DEV_NAME,
.wai = 0x6c,
}, {
.hw_id = ST_LSM6DSOX_ID,
.name = ST_LSM6DSOX_DEV_NAME,
.wai = 0x6c,
}, {
.hw_id = ST_LSM6DST_ID,
.name = ST_LSM6DST_DEV_NAME,
.wai = 0x6d,
}, {
.hw_id = ST_ASM330LHHX_ID,
.name = ST_ASM330LHHX_DEV_NAME,
.wai = 0x6b,
}, {
.hw_id = ST_LSM6DSTX_ID,
.name = ST_LSM6DSTX_DEV_NAME,
.wai = 0x6d,
},
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6dsx_gyro_channels,
.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
},
},
.drdy_mask = {
.addr = 0x13,
.mask = BIT(3),
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_avl[6] = { 833000, 0x07 },
.odr_len = 7,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_avl[6] = { 833000, 0x07 },
.odr_len = 7,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
.fs_len = 4,
},
},
.irq_config = {
.irq1 = {
.addr = 0x0d,
.mask = BIT(3),
},
.irq2 = {
.addr = 0x0e,
.mask = BIT(3),
},
.lir = {
.addr = 0x56,
.mask = BIT(0),
},
.clear_on_read = {
.addr = 0x56,
.mask = BIT(6),
},
.irq1_func = {
.addr = 0x5e,
.mask = BIT(5),
},
.irq2_func = {
.addr = 0x5f,
.mask = BIT(5),
},
.hla = {
.addr = 0x12,
.mask = BIT(5),
},
.od = {
.addr = 0x12,
.mask = BIT(4),
},
},
.batch = {
[ST_LSM6DSX_ID_ACC] = {
.addr = 0x09,
.mask = GENMASK(3, 0),
},
[ST_LSM6DSX_ID_GYRO] = {
.addr = 0x09,
.mask = GENMASK(7, 4),
},
},
.fifo_ops = {
.update_fifo = st_lsm6dsx_update_fifo,
.read_fifo = st_lsm6dsx_read_tagged_fifo,
.fifo_th = {
.addr = 0x07,
.mask = GENMASK(8, 0),
},
.fifo_diff = {
.addr = 0x3a,
.mask = GENMASK(9, 0),
},
.max_size = 512,
.th_wl = 1,
},
.ts_settings = {
.timer_en = {
.addr = 0x19,
.mask = BIT(5),
},
.decimator = {
.addr = 0x0a,
.mask = GENMASK(7, 6),
},
.freq_fine = 0x63,
},
.shub_settings = {
.page_mux = {
.addr = 0x01,
.mask = BIT(6),
},
.master_en = {
.sec_page = true,
.addr = 0x14,
.mask = BIT(2),
},
.pullup_en = {
.sec_page = true,
.addr = 0x14,
.mask = BIT(3),
},
.aux_sens = {
.addr = 0x14,
.mask = GENMASK(1, 0),
},
.wr_once = {
.addr = 0x14,
.mask = BIT(6),
},
.num_ext_dev = 3,
.shub_out = {
.sec_page = true,
.addr = 0x02,
},
.slv0_addr = 0x15,
.dw_slv0_addr = 0x21,
.batch_en = BIT(3),
},
.event_settings = {
.enable_reg = {
.addr = 0x58,
.mask = BIT(7),
},
.wakeup_reg = {
.addr = 0x5b,
.mask = GENMASK(5, 0),
},
.wakeup_src_reg = 0x1b,
.wakeup_src_status_mask = BIT(3),
.wakeup_src_z_mask = BIT(0),
.wakeup_src_y_mask = BIT(1),
.wakeup_src_x_mask = BIT(2),
},
},
{
.reset = {
.addr = 0x12,
.mask = BIT(0),
},
.boot = {
.addr = 0x12,
.mask = BIT(7),
},
.bdu = {
.addr = 0x12,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_ASM330LHH_ID,
.name = ST_ASM330LHH_DEV_NAME,
.wai = 0x6b,
}, {
.hw_id = ST_LSM6DSOP_ID,
.name = ST_LSM6DSOP_DEV_NAME,
.wai = 0x6c,
}, {
.hw_id = ST_ASM330LHB_ID,
.name = ST_ASM330LHB_DEV_NAME,
.wai = 0x6b,
},
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6dsx_gyro_channels,
.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
},
},
.drdy_mask = {
.addr = 0x13,
.mask = BIT(3),
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_avl[6] = { 833000, 0x07 },
.odr_len = 7,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_avl[6] = { 833000, 0x07 },
.odr_len = 7,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
.fs_len = 4,
},
},
.irq_config = {
.irq1 = {
.addr = 0x0d,
.mask = BIT(3),
},
.irq2 = {
.addr = 0x0e,
.mask = BIT(3),
},
.lir = {
.addr = 0x56,
.mask = BIT(0),
},
.clear_on_read = {
.addr = 0x56,
.mask = BIT(6),
},
.irq1_func = {
.addr = 0x5e,
.mask = BIT(5),
},
.irq2_func = {
.addr = 0x5f,
.mask = BIT(5),
},
.hla = {
.addr = 0x12,
.mask = BIT(5),
},
.od = {
.addr = 0x12,
.mask = BIT(4),
},
},
.batch = {
[ST_LSM6DSX_ID_ACC] = {
.addr = 0x09,
.mask = GENMASK(3, 0),
},
[ST_LSM6DSX_ID_GYRO] = {
.addr = 0x09,
.mask = GENMASK(7, 4),
},
},
.fifo_ops = {
.update_fifo = st_lsm6dsx_update_fifo,
.read_fifo = st_lsm6dsx_read_tagged_fifo,
.fifo_th = {
.addr = 0x07,
.mask = GENMASK(8, 0),
},
.fifo_diff = {
.addr = 0x3a,
.mask = GENMASK(9, 0),
},
.max_size = 512,
.th_wl = 1,
},
.ts_settings = {
.timer_en = {
.addr = 0x19,
.mask = BIT(5),
},
.decimator = {
.addr = 0x0a,
.mask = GENMASK(7, 6),
},
.freq_fine = 0x63,
},
.event_settings = {
.enable_reg = {
.addr = 0x58,
.mask = BIT(7),
},
.wakeup_reg = {
.addr = 0x5B,
.mask = GENMASK(5, 0),
},
.wakeup_src_reg = 0x1b,
.wakeup_src_status_mask = BIT(3),
.wakeup_src_z_mask = BIT(0),
.wakeup_src_y_mask = BIT(1),
.wakeup_src_x_mask = BIT(2),
},
},
{
.reset = {
.addr = 0x12,
.mask = BIT(0),
},
.boot = {
.addr = 0x12,
.mask = BIT(7),
},
.bdu = {
.addr = 0x12,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_LSM6DSV_ID,
.name = ST_LSM6DSV_DEV_NAME,
.wai = 0x70,
}, {
.hw_id = ST_LSM6DSV16X_ID,
.name = ST_LSM6DSV16X_DEV_NAME,
.wai = 0x70,
},
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6dsx_gyro_channels,
.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
},
},
.drdy_mask = {
.addr = 0x13,
.mask = BIT(3),
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(3, 0),
},
.odr_avl[0] = { 7500, 0x02 },
.odr_avl[1] = { 15000, 0x03 },
.odr_avl[2] = { 30000, 0x04 },
.odr_avl[3] = { 60000, 0x05 },
.odr_avl[4] = { 120000, 0x06 },
.odr_avl[5] = { 240000, 0x07 },
.odr_avl[6] = { 480000, 0x08 },
.odr_avl[7] = { 960000, 0x09 },
.odr_len = 8,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(3, 0),
},
.odr_avl[0] = { 7500, 0x02 },
.odr_avl[1] = { 15000, 0x03 },
.odr_avl[2] = { 30000, 0x04 },
.odr_avl[3] = { 60000, 0x05 },
.odr_avl[4] = { 120000, 0x06 },
.odr_avl[5] = { 240000, 0x07 },
.odr_avl[6] = { 480000, 0x08 },
.odr_avl[7] = { 960000, 0x09 },
.odr_len = 8,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x17,
.mask = GENMASK(1, 0),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x1 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x2 },
.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x3 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x15,
.mask = GENMASK(3, 0),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x1 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x2 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x3 },
.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x4 },
.fs_len = 4,
},
},
.irq_config = {
.irq1 = {
.addr = 0x0d,
.mask = BIT(3),
},
.irq2 = {
.addr = 0x0e,
.mask = BIT(3),
},
.lir = {
.addr = 0x56,
.mask = BIT(0),
},
.irq1_func = {
.addr = 0x5e,
.mask = BIT(5),
},
.irq2_func = {
.addr = 0x5f,
.mask = BIT(5),
},
.hla = {
.addr = 0x03,
.mask = BIT(4),
},
.od = {
.addr = 0x03,
.mask = BIT(3),
},
},
.batch = {
[ST_LSM6DSX_ID_ACC] = {
.addr = 0x09,
.mask = GENMASK(3, 0),
},
[ST_LSM6DSX_ID_GYRO] = {
.addr = 0x09,
.mask = GENMASK(7, 4),
},
},
.fifo_ops = {
.update_fifo = st_lsm6dsx_update_fifo,
.read_fifo = st_lsm6dsx_read_tagged_fifo,
.fifo_th = {
.addr = 0x07,
.mask = GENMASK(7, 0),
},
.fifo_diff = {
.addr = 0x1b,
.mask = GENMASK(8, 0),
},
.max_size = 512,
.th_wl = 1,
},
.ts_settings = {
.timer_en = {
.addr = 0x50,
.mask = BIT(6),
},
.decimator = {
.addr = 0x0a,
.mask = GENMASK(7, 6),
},
.freq_fine = 0x4f,
},
.shub_settings = {
.page_mux = {
.addr = 0x01,
.mask = BIT(6),
},
.master_en = {
.sec_page = true,
.addr = 0x14,
.mask = BIT(2),
},
.pullup_en = {
.addr = 0x03,
.mask = BIT(6),
},
.aux_sens = {
.addr = 0x14,
.mask = GENMASK(1, 0),
},
.wr_once = {
.addr = 0x14,
.mask = BIT(6),
},
.num_ext_dev = 3,
.shub_out = {
.sec_page = true,
.addr = 0x02,
},
.slv0_addr = 0x15,
.dw_slv0_addr = 0x21,
.batch_en = BIT(3),
},
.event_settings = {
.enable_reg = {
.addr = 0x50,
.mask = BIT(7),
},
.wakeup_reg = {
.addr = 0x5b,
.mask = GENMASK(5, 0),
},
.wakeup_src_reg = 0x45,
.wakeup_src_status_mask = BIT(3),
.wakeup_src_z_mask = BIT(0),
.wakeup_src_y_mask = BIT(1),
.wakeup_src_x_mask = BIT(2),
},
},
{
.reset = {
.addr = 0x12,
.mask = BIT(0),
},
.boot = {
.addr = 0x12,
.mask = BIT(7),
},
.bdu = {
.addr = 0x12,
.mask = BIT(6),
},
.id = {
{
.hw_id = ST_LSM6DSO16IS_ID,
.name = ST_LSM6DSO16IS_DEV_NAME,
.wai = 0x22,
}, {
.hw_id = ST_ISM330IS_ID,
.name = ST_ISM330IS_DEV_NAME,
.wai = 0x22,
}
},
.channels = {
[ST_LSM6DSX_ID_ACC] = {
.chan = st_lsm6dsx_acc_channels,
.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
},
[ST_LSM6DSX_ID_GYRO] = {
.chan = st_lsm6dsx_gyro_channels,
.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
},
},
.odr_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_avl[6] = { 833000, 0x07 },
.odr_len = 7,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(7, 4),
},
.odr_avl[0] = { 12500, 0x01 },
.odr_avl[1] = { 26000, 0x02 },
.odr_avl[2] = { 52000, 0x03 },
.odr_avl[3] = { 104000, 0x04 },
.odr_avl[4] = { 208000, 0x05 },
.odr_avl[5] = { 416000, 0x06 },
.odr_avl[6] = { 833000, 0x07 },
.odr_len = 7,
},
},
.fs_table = {
[ST_LSM6DSX_ID_ACC] = {
.reg = {
.addr = 0x10,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
.fs_len = 4,
},
[ST_LSM6DSX_ID_GYRO] = {
.reg = {
.addr = 0x11,
.mask = GENMASK(3, 2),
},
.fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
.fs_len = 4,
},
},
.irq_config = {
.hla = {
.addr = 0x12,
.mask = BIT(5),
},
.od = {
.addr = 0x12,
.mask = BIT(4),
},
},
.shub_settings = {
.page_mux = {
.addr = 0x01,
.mask = BIT(6),
},
.master_en = {
.sec_page = true,
.addr = 0x14,
.mask = BIT(2),
},
.pullup_en = {
.sec_page = true,
.addr = 0x14,
.mask = BIT(3),
},
.aux_sens = {
.addr = 0x14,
.mask = GENMASK(1, 0),
},
.wr_once = {
.addr = 0x14,
.mask = BIT(6),
},
.num_ext_dev = 3,
.shub_out = {
.sec_page = true,
.addr = 0x02,
},
.slv0_addr = 0x15,
.dw_slv0_addr = 0x21,
},
},
};
int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
unsigned int data;
int err;
hub_settings = &hw->settings->shub_settings;
data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
hub_settings->page_mux.mask, data);
usleep_range(100, 150);
return err;
}
static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
const char **name)
{
int err, i, j, data;
for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
if (st_lsm6dsx_sensor_settings[i].id[j].name &&
id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
break;
}
if (j < ST_LSM6DSX_MAX_ID)
break;
}
if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
return -ENODEV;
}
err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
if (err < 0) {
dev_err(hw->dev, "failed to read whoami register\n");
return err;
}
if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
return -ENODEV;
}
*name = st_lsm6dsx_sensor_settings[i].id[j].name;
hw->settings = &st_lsm6dsx_sensor_settings[i];
return 0;
}
static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
u32 gain)
{
const struct st_lsm6dsx_fs_table_entry *fs_table;
unsigned int data;
int i, err;
fs_table = &sensor->hw->settings->fs_table[sensor->id];
for (i = 0; i < fs_table->fs_len; i++) {
if (fs_table->fs_avl[i].gain == gain)
break;
}
if (i == fs_table->fs_len)
return -EINVAL;
data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
fs_table->reg.mask);
err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
fs_table->reg.mask, data);
if (err < 0)
return err;
sensor->gain = gain;
return 0;
}
int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
{
const struct st_lsm6dsx_odr_table_entry *odr_table;
int i;
odr_table = &sensor->hw->settings->odr_table[sensor->id];
for (i = 0; i < odr_table->odr_len; i++) {
/*
* ext devices can run at different odr respect to
* accel sensor
*/
if (odr_table->odr_avl[i].milli_hz >= odr)
break;
}
if (i == odr_table->odr_len)
return -EINVAL;
*val = odr_table->odr_avl[i].val;
return odr_table->odr_avl[i].milli_hz;
}
static int
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
enum st_lsm6dsx_sensor_id id)
{
struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
if (odr > 0) {
if (hw->enable_mask & BIT(id))
return max_t(u32, ref->odr, odr);
else
return odr;
} else {
return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
}
}
static int
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
{
struct st_lsm6dsx_sensor *ref_sensor = sensor;
struct st_lsm6dsx_hw *hw = sensor->hw;
const struct st_lsm6dsx_reg *reg;
unsigned int data;
u8 val = 0;
int err;
switch (sensor->id) {
case ST_LSM6DSX_ID_GYRO:
break;
case ST_LSM6DSX_ID_EXT0:
case ST_LSM6DSX_ID_EXT1:
case ST_LSM6DSX_ID_EXT2:
case ST_LSM6DSX_ID_ACC: {
u32 odr;
int i;
/*
* i2c embedded controller relies on the accelerometer sensor as
* bus read/write trigger so we need to enable accel device
* at odr = max(accel_odr, ext_odr) in order to properly
* communicate with i2c slave devices
*/
ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i] || i == sensor->id)
continue;
odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
if (odr != req_odr)
/* device already configured */
return 0;
}
break;
}
default: /* should never occur */
return -EINVAL;
}
if (req_odr > 0) {
err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
if (err < 0)
return err;
}
reg = &hw->settings->odr_table[ref_sensor->id].reg;
data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
}
static int
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
bool enable)
{
struct st_lsm6dsx_hw *hw = sensor->hw;
u32 odr = enable ? sensor->odr : 0;
int err;
err = st_lsm6dsx_set_odr(sensor, odr);
if (err < 0)
return err;
if (enable)
hw->enable_mask |= BIT(sensor->id);
else
hw->enable_mask &= ~BIT(sensor->id);
return 0;
}
static int
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
{
struct st_lsm6dsx_hw *hw = sensor->hw;
if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
return 0;
return hw->enable_event;
}
int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
bool enable)
{
if (st_lsm6dsx_check_events(sensor, enable))
return 0;
return __st_lsm6dsx_sensor_set_enable(sensor, enable);
}
static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
u8 addr, int *val)
{
struct st_lsm6dsx_hw *hw = sensor->hw;
int err, delay;
__le16 data;
err = st_lsm6dsx_sensor_set_enable(sensor, true);
if (err < 0)
return err;
/*
* we need to wait for sensor settling time before
* reading data in order to avoid corrupted samples
*/
delay = 1000000000 / sensor->odr;
usleep_range(3 * delay, 4 * delay);
err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
if (err < 0)
return err;
if (!hw->enable_event) {
err = st_lsm6dsx_sensor_set_enable(sensor, false);
if (err < 0)
return err;
}
*val = (s16)le16_to_cpu(data);
return IIO_VAL_INT;
}
static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *ch,
int *val, int *val2, long mask)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(iio_dev);
if (ret)
break;
ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
iio_device_release_direct_mode(iio_dev);
break;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = sensor->odr / 1000;
*val2 = (sensor->odr % 1000) * 1000;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = sensor->gain;
ret = IIO_VAL_INT_PLUS_NANO;
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
int err;
err = iio_device_claim_direct_mode(iio_dev);
if (err)
return err;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
err = st_lsm6dsx_set_full_scale(sensor, val2);
break;
case IIO_CHAN_INFO_SAMP_FREQ: {
u8 data;
val = val * 1000 + val2 / 1000;
val = st_lsm6dsx_check_odr(sensor, val, &data);
if (val < 0)
err = val;
else
sensor->odr = val;
break;
}
default:
err = -EINVAL;
break;
}
iio_device_release_direct_mode(iio_dev);
return err;
}
static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state)
{
const struct st_lsm6dsx_reg *reg;
unsigned int data;
int err;
if (!hw->settings->irq_config.irq1_func.addr)
return -ENOTSUPP;
reg = &hw->settings->event_settings.enable_reg;
if (reg->addr) {
data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
reg->mask, data);
if (err < 0)
return err;
}
/* Enable wakeup interrupt */
data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
hw->irq_routing->mask, data);
}
static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
*val2 = 0;
*val = hw->event_threshold;
return IIO_VAL_INT;
}
static int
st_lsm6dsx_write_event(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
const struct st_lsm6dsx_reg *reg;
unsigned int data;
int err;
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
if (val < 0 || val > 31)
return -EINVAL;
reg = &hw->settings->event_settings.wakeup_reg;
data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
reg->mask, data);
if (err < 0)
return -EINVAL;
hw->event_threshold = val;
return 0;
}
static int
st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
return !!(hw->enable_event & BIT(chan->channel2));
}
static int
st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir, int state)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
u8 enable_event;
int err;
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
if (state) {
enable_event = hw->enable_event | BIT(chan->channel2);
/* do not enable events if they are already enabled */
if (hw->enable_event)
goto out;
} else {
enable_event = hw->enable_event & ~BIT(chan->channel2);
/* only turn off sensor if no events is enabled */
if (enable_event)
goto out;
}
/* stop here if no changes have been made */
if (hw->enable_event == enable_event)
return 0;
err = st_lsm6dsx_event_setup(hw, state);
if (err < 0)
return err;
mutex_lock(&hw->conf_lock);
if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
err = __st_lsm6dsx_sensor_set_enable(sensor, state);
mutex_unlock(&hw->conf_lock);
if (err < 0)
return err;
out:
hw->enable_event = enable_event;
return 0;
}
int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
int err;
val = clamp_val(val, 1, hw->settings->fifo_ops.max_size);
mutex_lock(&hw->conf_lock);
err = st_lsm6dsx_update_watermark(sensor, val);
mutex_unlock(&hw->conf_lock);
if (err < 0)
return err;
sensor->watermark = val;
return 0;
}
static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
const struct st_lsm6dsx_odr_table_entry *odr_table;
int i, len = 0;
odr_table = &sensor->hw->settings->odr_table[sensor->id];
for (i = 0; i < odr_table->odr_len; i++)
len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
odr_table->odr_avl[i].milli_hz / 1000,
odr_table->odr_avl[i].milli_hz % 1000);
buf[len - 1] = '\n';
return len;
}
static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
const struct st_lsm6dsx_fs_table_entry *fs_table;
struct st_lsm6dsx_hw *hw = sensor->hw;
int i, len = 0;
fs_table = &hw->settings->fs_table[sensor->id];
for (i = 0; i < fs_table->fs_len; i++)
len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ",
fs_table->fs_avl[i].gain);
buf[len - 1] = '\n';
return len;
}
static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
case IIO_ACCEL:
return IIO_VAL_INT_PLUS_NANO;
default:
return IIO_VAL_INT_PLUS_MICRO;
}
default:
return IIO_VAL_INT_PLUS_MICRO;
}
}
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
st_lsm6dsx_sysfs_scale_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
st_lsm6dsx_sysfs_scale_avail, NULL, 0);
static struct attribute *st_lsm6dsx_acc_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
.attrs = st_lsm6dsx_acc_attributes,
};
static const struct iio_info st_lsm6dsx_acc_info = {
.attrs = &st_lsm6dsx_acc_attribute_group,
.read_raw = st_lsm6dsx_read_raw,
.write_raw = st_lsm6dsx_write_raw,
.read_event_value = st_lsm6dsx_read_event,
.write_event_value = st_lsm6dsx_write_event,
.read_event_config = st_lsm6dsx_read_event_config,
.write_event_config = st_lsm6dsx_write_event_config,
.hwfifo_set_watermark = st_lsm6dsx_set_watermark,
.write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
};
static struct attribute *st_lsm6dsx_gyro_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
.attrs = st_lsm6dsx_gyro_attributes,
};
static const struct iio_info st_lsm6dsx_gyro_info = {
.attrs = &st_lsm6dsx_gyro_attribute_group,
.read_raw = st_lsm6dsx_read_raw,
.write_raw = st_lsm6dsx_write_raw,
.hwfifo_set_watermark = st_lsm6dsx_set_watermark,
.write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
};
static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
{
struct device *dev = hw->dev;
if (!dev_fwnode(dev))
return -EINVAL;
return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin);
}
static int
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
const struct st_lsm6dsx_reg **drdy_reg)
{
int err = 0, drdy_pin;
if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) {
struct st_sensors_platform_data *pdata;
struct device *dev = hw->dev;
pdata = (struct st_sensors_platform_data *)dev->platform_data;
drdy_pin = pdata ? pdata->drdy_int_pin : 1;
}
switch (drdy_pin) {
case 1:
hw->irq_routing = &hw->settings->irq_config.irq1_func;
*drdy_reg = &hw->settings->irq_config.irq1;
break;
case 2:
hw->irq_routing = &hw->settings->irq_config.irq2_func;
*drdy_reg = &hw->settings->irq_config.irq2;
break;
default:
dev_err(hw->dev, "unsupported data ready pin\n");
err = -EINVAL;
break;
}
return err;
}
static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
{
const struct st_lsm6dsx_shub_settings *hub_settings;
struct st_sensors_platform_data *pdata;
struct device *dev = hw->dev;
unsigned int data;
int err = 0;
hub_settings = &hw->settings->shub_settings;
pdata = (struct st_sensors_platform_data *)dev->platform_data;
if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) ||
(pdata && pdata->pullups)) {
if (hub_settings->pullup_en.sec_page) {
err = st_lsm6dsx_set_page(hw, true);
if (err < 0)
return err;
}
data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
err = regmap_update_bits(hw->regmap,
hub_settings->pullup_en.addr,
hub_settings->pullup_en.mask, data);
if (hub_settings->pullup_en.sec_page)
st_lsm6dsx_set_page(hw, false);
if (err < 0)
return err;
}
if (hub_settings->aux_sens.addr) {
/* configure aux sensors */
err = st_lsm6dsx_set_page(hw, true);
if (err < 0)
return err;
data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
err = regmap_update_bits(hw->regmap,
hub_settings->aux_sens.addr,
hub_settings->aux_sens.mask, data);
st_lsm6dsx_set_page(hw, false);
if (err < 0)
return err;
}
if (hub_settings->emb_func.addr) {
data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
err = regmap_update_bits(hw->regmap,
hub_settings->emb_func.addr,
hub_settings->emb_func.mask, data);
}
return err;
}
static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
{
const struct st_lsm6dsx_hw_ts_settings *ts_settings;
int err, val;
ts_settings = &hw->settings->ts_settings;
/* enable hw timestamp generation if necessary */
if (ts_settings->timer_en.addr) {
val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
err = regmap_update_bits(hw->regmap,
ts_settings->timer_en.addr,
ts_settings->timer_en.mask, val);
if (err < 0)
return err;
}
/* enable high resolution for hw ts timer if necessary */
if (ts_settings->hr_timer.addr) {
val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
err = regmap_update_bits(hw->regmap,
ts_settings->hr_timer.addr,
ts_settings->hr_timer.mask, val);
if (err < 0)
return err;
}
/* enable ts queueing in FIFO if necessary */
if (ts_settings->fifo_en.addr) {
val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
err = regmap_update_bits(hw->regmap,
ts_settings->fifo_en.addr,
ts_settings->fifo_en.mask, val);
if (err < 0)
return err;
}
/* calibrate timestamp sensitivity */
hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY;
if (ts_settings->freq_fine) {
err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
if (err < 0)
return err;
/*
* linearize the AN5192 formula:
* 1 / (1 + x) ~= 1 - x (Taylor’s Series)
* ttrim[s] = 1 / (40000 * (1 + 0.0015 * val))
* ttrim[ns] ~= 25000 - 37.5 * val
* ttrim[ns] ~= 25000 - (37500 * val) / 1000
*/
hw->ts_gain -= ((s8)val * 37500) / 1000;
}
return 0;
}
static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
{
const struct st_lsm6dsx_reg *reg;
int err;
/*
* flush hw FIFO before device reset in order to avoid
* possible races on interrupt line 1. If the first interrupt
* line is asserted during hw reset the device will work in
* I3C-only mode (if it is supported)
*/
err = st_lsm6dsx_flush_fifo(hw);
if (err < 0 && err != -ENOTSUPP)
return err;
/* device sw reset */
reg = &hw->settings->reset;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
msleep(50);
/* reload trimming parameter */
reg = &hw->settings->boot;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
msleep(50);
return 0;
}
static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
{
const struct st_lsm6dsx_reg *reg;
int err;
err = st_lsm6dsx_reset_device(hw);
if (err < 0)
return err;
/* enable Block Data Update */
reg = &hw->settings->bdu;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
/* enable FIFO watermak interrupt */
err = st_lsm6dsx_get_drdy_reg(hw, ®);
if (err < 0)
return err;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
/* enable Latched interrupts for device events */
if (hw->settings->irq_config.lir.addr) {
reg = &hw->settings->irq_config.lir;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
/* enable clear on read for latched interrupts */
if (hw->settings->irq_config.clear_on_read.addr) {
reg = &hw->settings->irq_config.clear_on_read;
err = regmap_update_bits(hw->regmap,
reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
}
}
/* enable drdy-mas if available */
if (hw->settings->drdy_mask.addr) {
reg = &hw->settings->drdy_mask;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
}
err = st_lsm6dsx_init_shub(hw);
if (err < 0)
return err;
return st_lsm6dsx_init_hw_timer(hw);
}
static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
enum st_lsm6dsx_sensor_id id,
const char *name)
{
struct st_lsm6dsx_sensor *sensor;
struct iio_dev *iio_dev;
iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
if (!iio_dev)
return NULL;
iio_dev->modes = INDIO_DIRECT_MODE;
iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
iio_dev->channels = hw->settings->channels[id].chan;
iio_dev->num_channels = hw->settings->channels[id].len;
sensor = iio_priv(iio_dev);
sensor->id = id;
sensor->hw = hw;
sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
sensor->watermark = 1;
switch (id) {
case ST_LSM6DSX_ID_ACC:
iio_dev->info = &st_lsm6dsx_acc_info;
scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
name);
break;
case ST_LSM6DSX_ID_GYRO:
iio_dev->info = &st_lsm6dsx_gyro_info;
scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
name);
break;
default:
return NULL;
}
iio_dev->name = sensor->name;
return iio_dev;
}
static bool
st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
{
const struct st_lsm6dsx_event_settings *event_settings;
int err, data;
s64 timestamp;
if (!hw->enable_event)
return false;
event_settings = &hw->settings->event_settings;
err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
&data, sizeof(data));
if (err < 0)
return false;
timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
(hw->enable_event & BIT(IIO_MOD_Z)))
iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_EITHER),
timestamp);
if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
(hw->enable_event & BIT(IIO_MOD_Y)))
iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_EITHER),
timestamp);
if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
(hw->enable_event & BIT(IIO_MOD_X)))
iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_EITHER),
timestamp);
return data & event_settings->wakeup_src_status_mask;
}
static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
{
struct st_lsm6dsx_hw *hw = private;
int fifo_len = 0, len;
bool event;
event = st_lsm6dsx_report_motion_event(hw);
if (!hw->settings->fifo_ops.read_fifo)
return event ? IRQ_HANDLED : IRQ_NONE;
/*
* If we are using edge IRQs, new samples can arrive while
* processing current interrupt since there are no hw
* guarantees the irq line stays "low" long enough to properly
* detect the new interrupt. In this case the new sample will
* be missed.
* Polling FIFO status register allow us to read new
* samples even if the interrupt arrives while processing
* previous data and the timeslot where the line is "low" is
* too short to be properly detected.
*/
do {
mutex_lock(&hw->fifo_lock);
len = hw->settings->fifo_ops.read_fifo(hw);
mutex_unlock(&hw->fifo_lock);
if (len > 0)
fifo_len += len;
} while (len > 0);
return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
}
static irqreturn_t st_lsm6dsx_sw_trigger_handler_thread(int irq,
void *private)
{
struct iio_poll_func *pf = private;
struct iio_dev *iio_dev = pf->indio_dev;
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
struct st_lsm6dsx_hw *hw = sensor->hw;
if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
sensor->id == ST_LSM6DSX_ID_EXT1 ||
sensor->id == ST_LSM6DSX_ID_EXT2)
st_lsm6dsx_shub_read_output(hw,
(u8 *)hw->scan[sensor->id].channels,
sizeof(hw->scan[sensor->id].channels));
else
st_lsm6dsx_read_locked(hw, iio_dev->channels[0].address,
hw->scan[sensor->id].channels,
sizeof(hw->scan[sensor->id].channels));
iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan[sensor->id],
iio_get_time_ns(iio_dev));
iio_trigger_notify_done(iio_dev->trig);
return IRQ_HANDLED;
}
static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
{
struct st_sensors_platform_data *pdata;
const struct st_lsm6dsx_reg *reg;
struct device *dev = hw->dev;
unsigned long irq_type;
bool irq_active_low;
int err;
irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
switch (irq_type) {
case IRQF_TRIGGER_HIGH:
case IRQF_TRIGGER_RISING:
irq_active_low = false;
break;
case IRQF_TRIGGER_LOW:
case IRQF_TRIGGER_FALLING:
irq_active_low = true;
break;
default:
dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
return -EINVAL;
}
reg = &hw->settings->irq_config.hla;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(irq_active_low,
reg->mask));
if (err < 0)
return err;
pdata = (struct st_sensors_platform_data *)dev->platform_data;
if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) ||
(pdata && pdata->open_drain)) {
reg = &hw->settings->irq_config.od;
err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
if (err < 0)
return err;
irq_type |= IRQF_SHARED;
}
err = devm_request_threaded_irq(hw->dev, hw->irq,
NULL,
st_lsm6dsx_handler_thread,
irq_type | IRQF_ONESHOT,
"lsm6dsx", hw);
if (err) {
dev_err(hw->dev, "failed to request trigger irq %d\n",
hw->irq);
return err;
}
return 0;
}
static int st_lsm6dsx_sw_buffer_preenable(struct iio_dev *iio_dev)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
return st_lsm6dsx_device_set_enable(sensor, true);
}
static int st_lsm6dsx_sw_buffer_postdisable(struct iio_dev *iio_dev)
{
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
return st_lsm6dsx_device_set_enable(sensor, false);
}
static const struct iio_buffer_setup_ops st_lsm6dsx_sw_buffer_ops = {
.preenable = st_lsm6dsx_sw_buffer_preenable,
.postdisable = st_lsm6dsx_sw_buffer_postdisable,
};
static int st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw *hw)
{
int i;
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
int err;
if (!hw->iio_devs[i])
continue;
err = devm_iio_triggered_buffer_setup(hw->dev,
hw->iio_devs[i], NULL,
st_lsm6dsx_sw_trigger_handler_thread,
&st_lsm6dsx_sw_buffer_ops);
if (err)
return err;
}
return 0;
}
static int st_lsm6dsx_init_regulators(struct device *dev)
{
/* vdd-vddio power regulators */
static const char * const regulators[] = { "vdd", "vddio" };
int err;
err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
regulators);
if (err)
return dev_err_probe(dev, err, "failed to enable regulators\n");
msleep(50);
return 0;
}
#ifdef CONFIG_ACPI
static int lsm6dsx_get_acpi_mount_matrix(struct device *dev,
struct iio_mount_matrix *orientation)
{
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
struct acpi_device *adev = ACPI_COMPANION(dev);
union acpi_object *obj, *elements;
acpi_status status;
int i, j, val[3];
char *str;
if (!has_acpi_companion(dev))
return -EINVAL;
if (!acpi_has_method(adev->handle, "ROTM"))
return -EINVAL;
status = acpi_evaluate_object(adev->handle, "ROTM", NULL, &buffer);
if (ACPI_FAILURE(status)) {
dev_warn(dev, "Failed to get ACPI mount matrix: %d\n", status);
return -EINVAL;
}
obj = buffer.pointer;
if (obj->type != ACPI_TYPE_PACKAGE || obj->package.count != 3)
goto unknown_format;
elements = obj->package.elements;
for (i = 0; i < 3; i++) {
if (elements[i].type != ACPI_TYPE_STRING)
goto unknown_format;
str = elements[i].string.pointer;
if (sscanf(str, "%d %d %d", &val[0], &val[1], &val[2]) != 3)
goto unknown_format;
for (j = 0; j < 3; j++) {
switch (val[j]) {
case -1: str = "-1"; break;
case 0: str = "0"; break;
case 1: str = "1"; break;
default: goto unknown_format;
}
orientation->rotation[i * 3 + j] = str;
}
}
kfree(buffer.pointer);
return 0;
unknown_format:
dev_warn(dev, "Unknown ACPI mount matrix format, ignoring\n");
kfree(buffer.pointer);
return -EINVAL;
}
#else
static int lsm6dsx_get_acpi_mount_matrix(struct device *dev,
struct iio_mount_matrix *orientation)
{
return -EOPNOTSUPP;
}
#endif
int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
struct regmap *regmap)
{
struct st_sensors_platform_data *pdata = dev->platform_data;
const struct st_lsm6dsx_shub_settings *hub_settings;
struct st_lsm6dsx_hw *hw;
const char *name = NULL;
int i, err;
hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
if (!hw)
return -ENOMEM;
dev_set_drvdata(dev, (void *)hw);
mutex_init(&hw->fifo_lock);
mutex_init(&hw->conf_lock);
mutex_init(&hw->page_lock);
err = st_lsm6dsx_init_regulators(dev);
if (err)
return err;
hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
if (!hw->buff)
return -ENOMEM;
hw->dev = dev;
hw->irq = irq;
hw->regmap = regmap;
err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
if (err < 0)
return err;
for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
if (!hw->iio_devs[i])
return -ENOMEM;
}
err = st_lsm6dsx_init_device(hw);
if (err < 0)
return err;
hub_settings = &hw->settings->shub_settings;
if (hub_settings->master_en.addr &&
(!dev_fwnode(dev) ||
!device_property_read_bool(dev, "st,disable-sensor-hub"))) {
err = st_lsm6dsx_shub_probe(hw, name);
if (err < 0)
return err;
}
if (hw->irq > 0) {
err = st_lsm6dsx_irq_setup(hw);
if (err < 0)
return err;
err = st_lsm6dsx_fifo_setup(hw);
if (err < 0)
return err;
}
if (!hw->irq || !hw->settings->fifo_ops.read_fifo) {
/*
* Rely on sw triggers (e.g. hr-timers) if irq pin is not
* connected of if the device does not support HW FIFO
*/
err = st_lsm6dsx_sw_buffers_setup(hw);
if (err)
return err;
}
err = lsm6dsx_get_acpi_mount_matrix(hw->dev, &hw->orientation);
if (err) {
err = iio_read_mount_matrix(hw->dev, &hw->orientation);
if (err)
return err;
}
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i])
continue;
err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
if (err)
return err;
}
if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) ||
(pdata && pdata->wakeup_source))
device_init_wakeup(dev, true);
return 0;
}
EXPORT_SYMBOL_NS(st_lsm6dsx_probe, IIO_LSM6DSX);
static int st_lsm6dsx_suspend(struct device *dev)
{
struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
struct st_lsm6dsx_sensor *sensor;
int i, err = 0;
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i])
continue;
sensor = iio_priv(hw->iio_devs[i]);
if (!(hw->enable_mask & BIT(sensor->id)))
continue;
if (device_may_wakeup(dev) &&
sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
/* Enable wake from IRQ */
enable_irq_wake(hw->irq);
continue;
}
err = st_lsm6dsx_device_set_enable(sensor, false);
if (err < 0)
return err;
hw->suspend_mask |= BIT(sensor->id);
}
if (hw->fifo_mask)
err = st_lsm6dsx_flush_fifo(hw);
return err;
}
static int st_lsm6dsx_resume(struct device *dev)
{
struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
struct st_lsm6dsx_sensor *sensor;
int i, err = 0;
for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
if (!hw->iio_devs[i])
continue;
sensor = iio_priv(hw->iio_devs[i]);
if (device_may_wakeup(dev) &&
sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
disable_irq_wake(hw->irq);
if (!(hw->suspend_mask & BIT(sensor->id)))
continue;
err = st_lsm6dsx_device_set_enable(sensor, true);
if (err < 0)
return err;
hw->suspend_mask &= ~BIT(sensor->id);
}
if (hw->fifo_mask)
err = st_lsm6dsx_resume_fifo(hw);
return err;
}
EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend,
st_lsm6dsx_resume, IIO_LSM6DSX);
MODULE_AUTHOR("Lorenzo Bianconi <[email protected]>");
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Sensortek STK8BA50 3-Axis Accelerometer
*
* Copyright (c) 2015, Intel Corporation.
*
* STK8BA50 7-bit I2C address: 0x18.
*/
#include <linux/acpi.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define STK8BA50_REG_XOUT 0x02
#define STK8BA50_REG_YOUT 0x04
#define STK8BA50_REG_ZOUT 0x06
#define STK8BA50_REG_RANGE 0x0F
#define STK8BA50_REG_BWSEL 0x10
#define STK8BA50_REG_POWMODE 0x11
#define STK8BA50_REG_SWRST 0x14
#define STK8BA50_REG_INTEN2 0x17
#define STK8BA50_REG_INTMAP2 0x1A
#define STK8BA50_MODE_NORMAL 0
#define STK8BA50_MODE_SUSPEND 1
#define STK8BA50_MODE_POWERBIT BIT(7)
#define STK8BA50_DATA_SHIFT 6
#define STK8BA50_RESET_CMD 0xB6
#define STK8BA50_SR_1792HZ_IDX 7
#define STK8BA50_DREADY_INT_MASK 0x10
#define STK8BA50_DREADY_INT_MAP 0x81
#define STK8BA50_ALL_CHANNEL_MASK 7
#define STK8BA50_ALL_CHANNEL_SIZE 6
#define STK8BA50_DRIVER_NAME "stk8ba50"
#define STK8BA50_IRQ_NAME "stk8ba50_event"
#define STK8BA50_SCALE_AVAIL "0.0384 0.0767 0.1534 0.3069"
/*
* The accelerometer has four measurement ranges:
* +/-2g; +/-4g; +/-8g; +/-16g
*
* Acceleration values are 10-bit, 2's complement.
* Scales are calculated as following:
*
* scale1 = (2 + 2) * 9.81 / (2^10 - 1) = 0.0384
* scale2 = (4 + 4) * 9.81 / (2^10 - 1) = 0.0767
* etc.
*
* Scales are stored in this format:
* { <register value>, <scale value> }
*
* Locally, the range is stored as a table index.
*/
static const struct {
u8 reg_val;
u32 scale_val;
} stk8ba50_scale_table[] = {
{3, 38400}, {5, 76700}, {8, 153400}, {12, 306900}
};
/* Sample rates are stored as { <register value>, <Hz value> } */
static const struct {
u8 reg_val;
u16 samp_freq;
} stk8ba50_samp_freq_table[] = {
{0x08, 14}, {0x09, 25}, {0x0A, 56}, {0x0B, 112},
{0x0C, 224}, {0x0D, 448}, {0x0E, 896}, {0x0F, 1792}
};
/* Used to map scan mask bits to their corresponding channel register. */
static const int stk8ba50_channel_table[] = {
STK8BA50_REG_XOUT,
STK8BA50_REG_YOUT,
STK8BA50_REG_ZOUT
};
struct stk8ba50_data {
struct i2c_client *client;
struct mutex lock;
int range;
u8 sample_rate_idx;
struct iio_trigger *dready_trig;
bool dready_trigger_on;
/* Ensure timestamp is naturally aligned */
struct {
s16 chans[3];
s64 timetamp __aligned(8);
} scan;
};
#define STK8BA50_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 10, \
.storagebits = 16, \
.shift = STK8BA50_DATA_SHIFT, \
.endianness = IIO_CPU, \
}, \
}
static const struct iio_chan_spec stk8ba50_channels[] = {
STK8BA50_ACCEL_CHANNEL(0, STK8BA50_REG_XOUT, X),
STK8BA50_ACCEL_CHANNEL(1, STK8BA50_REG_YOUT, Y),
STK8BA50_ACCEL_CHANNEL(2, STK8BA50_REG_ZOUT, Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static IIO_CONST_ATTR(in_accel_scale_available, STK8BA50_SCALE_AVAIL);
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("14 25 56 112 224 448 896 1792");
static struct attribute *stk8ba50_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group stk8ba50_attribute_group = {
.attrs = stk8ba50_attributes
};
static int stk8ba50_read_accel(struct stk8ba50_data *data, u8 reg)
{
int ret;
struct i2c_client *client = data->client;
ret = i2c_smbus_read_word_data(client, reg);
if (ret < 0) {
dev_err(&client->dev, "register read failed\n");
return ret;
}
return ret;
}
static int stk8ba50_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct stk8ba50_data *data = iio_priv(indio_dev);
int ret;
if (state)
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_INTEN2, STK8BA50_DREADY_INT_MASK);
else
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_INTEN2, 0x00);
if (ret < 0)
dev_err(&data->client->dev, "failed to set trigger state\n");
else
data->dready_trigger_on = state;
return ret;
}
static const struct iio_trigger_ops stk8ba50_trigger_ops = {
.set_trigger_state = stk8ba50_data_rdy_trigger_set_state,
};
static int stk8ba50_set_power(struct stk8ba50_data *data, bool mode)
{
int ret;
u8 masked_reg;
struct i2c_client *client = data->client;
ret = i2c_smbus_read_byte_data(client, STK8BA50_REG_POWMODE);
if (ret < 0)
goto exit_err;
if (mode)
masked_reg = ret | STK8BA50_MODE_POWERBIT;
else
masked_reg = ret & (~STK8BA50_MODE_POWERBIT);
ret = i2c_smbus_write_byte_data(client, STK8BA50_REG_POWMODE,
masked_reg);
if (ret < 0)
goto exit_err;
return ret;
exit_err:
dev_err(&client->dev, "failed to change sensor mode\n");
return ret;
}
static int stk8ba50_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct stk8ba50_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
mutex_lock(&data->lock);
ret = stk8ba50_set_power(data, STK8BA50_MODE_NORMAL);
if (ret < 0) {
mutex_unlock(&data->lock);
return -EINVAL;
}
ret = stk8ba50_read_accel(data, chan->address);
if (ret < 0) {
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
mutex_unlock(&data->lock);
return -EINVAL;
}
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
mutex_unlock(&data->lock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = stk8ba50_scale_table[data->range].scale_val;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = stk8ba50_samp_freq_table
[data->sample_rate_idx].samp_freq;
*val2 = 0;
return IIO_VAL_INT;
}
return -EINVAL;
}
static int stk8ba50_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int ret;
int i;
int index = -1;
struct stk8ba50_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (val != 0)
return -EINVAL;
for (i = 0; i < ARRAY_SIZE(stk8ba50_scale_table); i++)
if (val2 == stk8ba50_scale_table[i].scale_val) {
index = i;
break;
}
if (index < 0)
return -EINVAL;
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_RANGE,
stk8ba50_scale_table[index].reg_val);
if (ret < 0)
dev_err(&data->client->dev,
"failed to set measurement range\n");
else
data->range = index;
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
for (i = 0; i < ARRAY_SIZE(stk8ba50_samp_freq_table); i++)
if (val == stk8ba50_samp_freq_table[i].samp_freq) {
index = i;
break;
}
if (index < 0)
return -EINVAL;
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_BWSEL,
stk8ba50_samp_freq_table[index].reg_val);
if (ret < 0)
dev_err(&data->client->dev,
"failed to set sampling rate\n");
else
data->sample_rate_idx = index;
return ret;
}
return -EINVAL;
}
static const struct iio_info stk8ba50_info = {
.read_raw = stk8ba50_read_raw,
.write_raw = stk8ba50_write_raw,
.attrs = &stk8ba50_attribute_group,
};
static irqreturn_t stk8ba50_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct stk8ba50_data *data = iio_priv(indio_dev);
int bit, ret, i = 0;
mutex_lock(&data->lock);
/*
* Do a bulk read if all channels are requested,
* from 0x02 (XOUT1) to 0x07 (ZOUT2)
*/
if (*(indio_dev->active_scan_mask) == STK8BA50_ALL_CHANNEL_MASK) {
ret = i2c_smbus_read_i2c_block_data(data->client,
STK8BA50_REG_XOUT,
STK8BA50_ALL_CHANNEL_SIZE,
(u8 *)data->scan.chans);
if (ret < STK8BA50_ALL_CHANNEL_SIZE) {
dev_err(&data->client->dev, "register read failed\n");
goto err;
}
} else {
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = stk8ba50_read_accel(data,
stk8ba50_channel_table[bit]);
if (ret < 0)
goto err;
data->scan.chans[i++] = ret;
}
}
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
pf->timestamp);
err:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t stk8ba50_data_rdy_trig_poll(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct stk8ba50_data *data = iio_priv(indio_dev);
if (data->dready_trigger_on)
iio_trigger_poll(data->dready_trig);
return IRQ_HANDLED;
}
static int stk8ba50_buffer_preenable(struct iio_dev *indio_dev)
{
struct stk8ba50_data *data = iio_priv(indio_dev);
return stk8ba50_set_power(data, STK8BA50_MODE_NORMAL);
}
static int stk8ba50_buffer_postdisable(struct iio_dev *indio_dev)
{
struct stk8ba50_data *data = iio_priv(indio_dev);
return stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
}
static const struct iio_buffer_setup_ops stk8ba50_buffer_setup_ops = {
.preenable = stk8ba50_buffer_preenable,
.postdisable = stk8ba50_buffer_postdisable,
};
static int stk8ba50_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct stk8ba50_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev) {
dev_err(&client->dev, "iio allocation failed!\n");
return -ENOMEM;
}
data = iio_priv(indio_dev);
data->client = client;
i2c_set_clientdata(client, indio_dev);
mutex_init(&data->lock);
indio_dev->info = &stk8ba50_info;
indio_dev->name = STK8BA50_DRIVER_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = stk8ba50_channels;
indio_dev->num_channels = ARRAY_SIZE(stk8ba50_channels);
/* Reset all registers on startup */
ret = i2c_smbus_write_byte_data(client,
STK8BA50_REG_SWRST, STK8BA50_RESET_CMD);
if (ret < 0) {
dev_err(&client->dev, "failed to reset sensor\n");
goto err_power_off;
}
/* The default range is +/-2g */
data->range = 0;
/* The default sampling rate is 1792 Hz (maximum) */
data->sample_rate_idx = STK8BA50_SR_1792HZ_IDX;
/* Set up interrupts */
ret = i2c_smbus_write_byte_data(client,
STK8BA50_REG_INTEN2, STK8BA50_DREADY_INT_MASK);
if (ret < 0) {
dev_err(&client->dev, "failed to set up interrupts\n");
goto err_power_off;
}
ret = i2c_smbus_write_byte_data(client,
STK8BA50_REG_INTMAP2, STK8BA50_DREADY_INT_MAP);
if (ret < 0) {
dev_err(&client->dev, "failed to set up interrupts\n");
goto err_power_off;
}
if (client->irq > 0) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
stk8ba50_data_rdy_trig_poll,
NULL,
IRQF_TRIGGER_RISING |
IRQF_ONESHOT,
STK8BA50_IRQ_NAME,
indio_dev);
if (ret < 0) {
dev_err(&client->dev, "request irq %d failed\n",
client->irq);
goto err_power_off;
}
data->dready_trig = devm_iio_trigger_alloc(&client->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig) {
ret = -ENOMEM;
goto err_power_off;
}
data->dready_trig->ops = &stk8ba50_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);
if (ret) {
dev_err(&client->dev, "iio trigger register failed\n");
goto err_power_off;
}
}
ret = iio_triggered_buffer_setup(indio_dev,
iio_pollfunc_store_time,
stk8ba50_trigger_handler,
&stk8ba50_buffer_setup_ops);
if (ret < 0) {
dev_err(&client->dev, "iio triggered buffer setup failed\n");
goto err_trigger_unregister;
}
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
goto err_buffer_cleanup;
}
return ret;
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
err_power_off:
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
return ret;
}
static void stk8ba50_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct stk8ba50_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
}
static int stk8ba50_suspend(struct device *dev)
{
struct stk8ba50_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
}
static int stk8ba50_resume(struct device *dev)
{
struct stk8ba50_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8ba50_set_power(data, STK8BA50_MODE_NORMAL);
}
static DEFINE_SIMPLE_DEV_PM_OPS(stk8ba50_pm_ops, stk8ba50_suspend,
stk8ba50_resume);
static const struct i2c_device_id stk8ba50_i2c_id[] = {
{"stk8ba50", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, stk8ba50_i2c_id);
static const struct acpi_device_id stk8ba50_acpi_id[] = {
{"STK8BA50", 0},
{}
};
MODULE_DEVICE_TABLE(acpi, stk8ba50_acpi_id);
static struct i2c_driver stk8ba50_driver = {
.driver = {
.name = "stk8ba50",
.pm = pm_sleep_ptr(&stk8ba50_pm_ops),
.acpi_match_table = ACPI_PTR(stk8ba50_acpi_id),
},
.probe = stk8ba50_probe,
.remove = stk8ba50_remove,
.id_table = stk8ba50_i2c_id,
};
module_i2c_driver(stk8ba50_driver);
MODULE_AUTHOR("Tiberiu Breana <[email protected]>");
MODULE_DESCRIPTION("STK8BA50 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/stk8ba50.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/common/st_sensors.h>
#include "st_accel.h"
int st_accel_trig_set_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
return st_sensors_set_dataready_irq(indio_dev, state);
}
static int st_accel_buffer_postenable(struct iio_dev *indio_dev)
{
int err;
err = st_sensors_set_axis_enable(indio_dev, indio_dev->active_scan_mask[0]);
if (err < 0)
return err;
err = st_sensors_set_enable(indio_dev, true);
if (err < 0)
goto st_accel_buffer_enable_all_axis;
return 0;
st_accel_buffer_enable_all_axis:
st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS);
return err;
}
static int st_accel_buffer_predisable(struct iio_dev *indio_dev)
{
int err;
err = st_sensors_set_enable(indio_dev, false);
if (err < 0)
return err;
return st_sensors_set_axis_enable(indio_dev,
ST_SENSORS_ENABLE_ALL_AXIS);
}
static const struct iio_buffer_setup_ops st_accel_buffer_setup_ops = {
.postenable = &st_accel_buffer_postenable,
.predisable = &st_accel_buffer_predisable,
};
int st_accel_allocate_ring(struct iio_dev *indio_dev)
{
return devm_iio_triggered_buffer_setup(indio_dev->dev.parent, indio_dev,
NULL, &st_sensors_trigger_handler, &st_accel_buffer_setup_ops);
}
| linux-master | drivers/iio/accel/st_accel_buffer.c |
// SPDX-License-Identifier: GPL-2.0
/*
* NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver
*
* Copyright 2021 Connected Cars A/S
*
* Datasheet:
* https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf
* https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf
*
* Errata:
* https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf
*/
#include <linux/bits.h>
#include <linux/bitfield.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/of_irq.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/regmap.h>
#include <linux/iio/buffer.h>
#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/sysfs.h>
#include "fxls8962af.h"
#define FXLS8962AF_INT_STATUS 0x00
#define FXLS8962AF_INT_STATUS_SRC_BOOT BIT(0)
#define FXLS8962AF_INT_STATUS_SRC_SDCD_OT BIT(4)
#define FXLS8962AF_INT_STATUS_SRC_BUF BIT(5)
#define FXLS8962AF_INT_STATUS_SRC_DRDY BIT(7)
#define FXLS8962AF_TEMP_OUT 0x01
#define FXLS8962AF_VECM_LSB 0x02
#define FXLS8962AF_OUT_X_LSB 0x04
#define FXLS8962AF_OUT_Y_LSB 0x06
#define FXLS8962AF_OUT_Z_LSB 0x08
#define FXLS8962AF_BUF_STATUS 0x0b
#define FXLS8962AF_BUF_STATUS_BUF_CNT GENMASK(5, 0)
#define FXLS8962AF_BUF_STATUS_BUF_OVF BIT(6)
#define FXLS8962AF_BUF_STATUS_BUF_WMRK BIT(7)
#define FXLS8962AF_BUF_X_LSB 0x0c
#define FXLS8962AF_BUF_Y_LSB 0x0e
#define FXLS8962AF_BUF_Z_LSB 0x10
#define FXLS8962AF_PROD_REV 0x12
#define FXLS8962AF_WHO_AM_I 0x13
#define FXLS8962AF_SYS_MODE 0x14
#define FXLS8962AF_SENS_CONFIG1 0x15
#define FXLS8962AF_SENS_CONFIG1_ACTIVE BIT(0)
#define FXLS8962AF_SENS_CONFIG1_RST BIT(7)
#define FXLS8962AF_SC1_FSR_MASK GENMASK(2, 1)
#define FXLS8962AF_SC1_FSR_PREP(x) FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))
#define FXLS8962AF_SC1_FSR_GET(x) FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))
#define FXLS8962AF_SENS_CONFIG2 0x16
#define FXLS8962AF_SENS_CONFIG3 0x17
#define FXLS8962AF_SC3_WAKE_ODR_MASK GENMASK(7, 4)
#define FXLS8962AF_SC3_WAKE_ODR_PREP(x) FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
#define FXLS8962AF_SC3_WAKE_ODR_GET(x) FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
#define FXLS8962AF_SENS_CONFIG4 0x18
#define FXLS8962AF_SC4_INT_PP_OD_MASK BIT(1)
#define FXLS8962AF_SC4_INT_PP_OD_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))
#define FXLS8962AF_SC4_INT_POL_MASK BIT(0)
#define FXLS8962AF_SC4_INT_POL_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))
#define FXLS8962AF_SENS_CONFIG5 0x19
#define FXLS8962AF_WAKE_IDLE_LSB 0x1b
#define FXLS8962AF_SLEEP_IDLE_LSB 0x1c
#define FXLS8962AF_ASLP_COUNT_LSB 0x1e
#define FXLS8962AF_INT_EN 0x20
#define FXLS8962AF_INT_EN_SDCD_OT_EN BIT(5)
#define FXLS8962AF_INT_EN_BUF_EN BIT(6)
#define FXLS8962AF_INT_PIN_SEL 0x21
#define FXLS8962AF_INT_PIN_SEL_MASK GENMASK(7, 0)
#define FXLS8962AF_INT_PIN_SEL_INT1 0x00
#define FXLS8962AF_INT_PIN_SEL_INT2 GENMASK(7, 0)
#define FXLS8962AF_OFF_X 0x22
#define FXLS8962AF_OFF_Y 0x23
#define FXLS8962AF_OFF_Z 0x24
#define FXLS8962AF_BUF_CONFIG1 0x26
#define FXLS8962AF_BC1_BUF_MODE_MASK GENMASK(6, 5)
#define FXLS8962AF_BC1_BUF_MODE_PREP(x) FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))
#define FXLS8962AF_BUF_CONFIG2 0x27
#define FXLS8962AF_BUF_CONFIG2_BUF_WMRK GENMASK(5, 0)
#define FXLS8962AF_ORIENT_STATUS 0x28
#define FXLS8962AF_ORIENT_CONFIG 0x29
#define FXLS8962AF_ORIENT_DBCOUNT 0x2a
#define FXLS8962AF_ORIENT_BF_ZCOMP 0x2b
#define FXLS8962AF_ORIENT_THS_REG 0x2c
#define FXLS8962AF_SDCD_INT_SRC1 0x2d
#define FXLS8962AF_SDCD_INT_SRC1_X_OT BIT(5)
#define FXLS8962AF_SDCD_INT_SRC1_X_POL BIT(4)
#define FXLS8962AF_SDCD_INT_SRC1_Y_OT BIT(3)
#define FXLS8962AF_SDCD_INT_SRC1_Y_POL BIT(2)
#define FXLS8962AF_SDCD_INT_SRC1_Z_OT BIT(1)
#define FXLS8962AF_SDCD_INT_SRC1_Z_POL BIT(0)
#define FXLS8962AF_SDCD_INT_SRC2 0x2e
#define FXLS8962AF_SDCD_CONFIG1 0x2f
#define FXLS8962AF_SDCD_CONFIG1_Z_OT_EN BIT(3)
#define FXLS8962AF_SDCD_CONFIG1_Y_OT_EN BIT(4)
#define FXLS8962AF_SDCD_CONFIG1_X_OT_EN BIT(5)
#define FXLS8962AF_SDCD_CONFIG1_OT_ELE BIT(7)
#define FXLS8962AF_SDCD_CONFIG2 0x30
#define FXLS8962AF_SDCD_CONFIG2_SDCD_EN BIT(7)
#define FXLS8962AF_SC2_REF_UPDM_AC GENMASK(6, 5)
#define FXLS8962AF_SDCD_OT_DBCNT 0x31
#define FXLS8962AF_SDCD_WT_DBCNT 0x32
#define FXLS8962AF_SDCD_LTHS_LSB 0x33
#define FXLS8962AF_SDCD_UTHS_LSB 0x35
#define FXLS8962AF_SELF_TEST_CONFIG1 0x37
#define FXLS8962AF_SELF_TEST_CONFIG2 0x38
#define FXLS8962AF_MAX_REG 0x38
#define FXLS8962AF_DEVICE_ID 0x62
#define FXLS8964AF_DEVICE_ID 0x84
/* Raw temp channel offset */
#define FXLS8962AF_TEMP_CENTER_VAL 25
#define FXLS8962AF_AUTO_SUSPEND_DELAY_MS 2000
#define FXLS8962AF_FIFO_LENGTH 32
#define FXLS8962AF_SCALE_TABLE_LEN 4
#define FXLS8962AF_SAMP_FREQ_TABLE_LEN 13
static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {
{0, IIO_G_TO_M_S_2(980000)},
{0, IIO_G_TO_M_S_2(1950000)},
{0, IIO_G_TO_M_S_2(3910000)},
{0, IIO_G_TO_M_S_2(7810000)},
};
static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {
{3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},
{50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},
{1, 563000}, {0, 781000},
};
struct fxls8962af_chip_info {
const char *name;
const struct iio_chan_spec *channels;
int num_channels;
u8 chip_id;
};
struct fxls8962af_data {
struct regmap *regmap;
const struct fxls8962af_chip_info *chip_info;
struct {
__le16 channels[3];
s64 ts __aligned(8);
} scan;
int64_t timestamp, old_timestamp; /* Only used in hw fifo mode. */
struct iio_mount_matrix orientation;
int irq;
u8 watermark;
u8 enable_event;
u16 lower_thres;
u16 upper_thres;
};
const struct regmap_config fxls8962af_i2c_regmap_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = FXLS8962AF_MAX_REG,
};
EXPORT_SYMBOL_NS_GPL(fxls8962af_i2c_regmap_conf, IIO_FXLS8962AF);
const struct regmap_config fxls8962af_spi_regmap_conf = {
.reg_bits = 8,
.pad_bits = 8,
.val_bits = 8,
.max_register = FXLS8962AF_MAX_REG,
};
EXPORT_SYMBOL_NS_GPL(fxls8962af_spi_regmap_conf, IIO_FXLS8962AF);
enum {
fxls8962af_idx_x,
fxls8962af_idx_y,
fxls8962af_idx_z,
fxls8962af_idx_ts,
};
enum fxls8962af_int_pin {
FXLS8962AF_PIN_INT1,
FXLS8962AF_PIN_INT2,
};
static int fxls8962af_power_on(struct fxls8962af_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
ret = pm_runtime_resume_and_get(dev);
if (ret)
dev_err(dev, "failed to power on\n");
return ret;
}
static int fxls8962af_power_off(struct fxls8962af_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
pm_runtime_mark_last_busy(dev);
ret = pm_runtime_put_autosuspend(dev);
if (ret)
dev_err(dev, "failed to power off\n");
return ret;
}
static int fxls8962af_standby(struct fxls8962af_data *data)
{
return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
FXLS8962AF_SENS_CONFIG1_ACTIVE, 0);
}
static int fxls8962af_active(struct fxls8962af_data *data)
{
return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);
}
static int fxls8962af_is_active(struct fxls8962af_data *data)
{
unsigned int reg;
int ret;
ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
if (ret)
return ret;
return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;
}
static int fxls8962af_get_out(struct fxls8962af_data *data,
struct iio_chan_spec const *chan, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
__le16 raw_val;
int is_active;
int ret;
is_active = fxls8962af_is_active(data);
if (!is_active) {
ret = fxls8962af_power_on(data);
if (ret)
return ret;
}
ret = regmap_bulk_read(data->regmap, chan->address,
&raw_val, sizeof(data->lower_thres));
if (!is_active)
fxls8962af_power_off(data);
if (ret) {
dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);
return ret;
}
*val = sign_extend32(le16_to_cpu(raw_val),
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
}
static int fxls8962af_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*type = IIO_VAL_INT_PLUS_NANO;
*vals = (int *)fxls8962af_scale_table;
*length = ARRAY_SIZE(fxls8962af_scale_table) * 2;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SAMP_FREQ:
*type = IIO_VAL_INT_PLUS_MICRO;
*vals = (int *)fxls8962af_samp_freq_table;
*length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
return IIO_VAL_INT_PLUS_NANO;
case IIO_CHAN_INFO_SAMP_FREQ:
return IIO_VAL_INT_PLUS_MICRO;
default:
return IIO_VAL_INT_PLUS_NANO;
}
}
static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,
u8 mask, u8 val)
{
int ret;
int is_active;
is_active = fxls8962af_is_active(data);
if (is_active) {
ret = fxls8962af_standby(data);
if (ret)
return ret;
}
ret = regmap_update_bits(data->regmap, reg, mask, val);
if (ret)
return ret;
if (is_active) {
ret = fxls8962af_active(data);
if (ret)
return ret;
}
return 0;
}
static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)
{
int i;
for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)
if (scale == fxls8962af_scale_table[i][1])
break;
if (i == ARRAY_SIZE(fxls8962af_scale_table))
return -EINVAL;
return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,
FXLS8962AF_SC1_FSR_MASK,
FXLS8962AF_SC1_FSR_PREP(i));
}
static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,
int *val)
{
int ret;
unsigned int reg;
u8 range_idx;
ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
if (ret)
return ret;
range_idx = FXLS8962AF_SC1_FSR_GET(reg);
*val = fxls8962af_scale_table[range_idx][1];
return IIO_VAL_INT_PLUS_NANO;
}
static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,
u32 val2)
{
int i;
for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)
if (val == fxls8962af_samp_freq_table[i][0] &&
val2 == fxls8962af_samp_freq_table[i][1])
break;
if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))
return -EINVAL;
return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,
FXLS8962AF_SC3_WAKE_ODR_MASK,
FXLS8962AF_SC3_WAKE_ODR_PREP(i));
}
static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,
int *val, int *val2)
{
int ret;
unsigned int reg;
u8 range_idx;
ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, ®);
if (ret)
return ret;
range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);
*val = fxls8962af_samp_freq_table[range_idx][0];
*val2 = fxls8962af_samp_freq_table[range_idx][1];
return IIO_VAL_INT_PLUS_MICRO;
}
static int fxls8962af_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
case IIO_ACCEL:
return fxls8962af_get_out(data, chan, val);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
if (chan->type != IIO_TEMP)
return -EINVAL;
*val = FXLS8962AF_TEMP_CENTER_VAL;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
return fxls8962af_read_full_scale(data, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
return fxls8962af_read_samp_freq(data, val, val2);
default:
return -EINVAL;
}
}
static int fxls8962af_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (val != 0)
return -EINVAL;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = fxls8962af_set_full_scale(data, val2);
iio_device_release_direct_mode(indio_dev);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = fxls8962af_set_samp_freq(data, val, val2);
iio_device_release_direct_mode(indio_dev);
return ret;
default:
return -EINVAL;
}
}
static int fxls8962af_event_setup(struct fxls8962af_data *data, int state)
{
/* Enable wakeup interrupt */
int mask = FXLS8962AF_INT_EN_SDCD_OT_EN;
int value = state ? mask : 0;
return regmap_update_bits(data->regmap, FXLS8962AF_INT_EN, mask, value);
}
static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
if (val > FXLS8962AF_FIFO_LENGTH)
val = FXLS8962AF_FIFO_LENGTH;
data->watermark = val;
return 0;
}
static int __fxls8962af_set_thresholds(struct fxls8962af_data *data,
const struct iio_chan_spec *chan,
enum iio_event_direction dir,
int val)
{
switch (dir) {
case IIO_EV_DIR_FALLING:
data->lower_thres = val;
return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
&data->lower_thres, sizeof(data->lower_thres));
case IIO_EV_DIR_RISING:
data->upper_thres = val;
return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
&data->upper_thres, sizeof(data->upper_thres));
default:
return -EINVAL;
}
}
static int fxls8962af_read_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
int ret;
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
switch (dir) {
case IIO_EV_DIR_FALLING:
ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
&data->lower_thres, sizeof(data->lower_thres));
if (ret)
return ret;
*val = sign_extend32(data->lower_thres, chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_EV_DIR_RISING:
ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
&data->upper_thres, sizeof(data->upper_thres));
if (ret)
return ret;
*val = sign_extend32(data->upper_thres, chan->scan_type.realbits - 1);
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int fxls8962af_write_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
int ret, val_masked;
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
if (val < -2048 || val > 2047)
return -EINVAL;
if (data->enable_event)
return -EBUSY;
val_masked = val & GENMASK(11, 0);
if (fxls8962af_is_active(data)) {
ret = fxls8962af_standby(data);
if (ret)
return ret;
ret = __fxls8962af_set_thresholds(data, chan, dir, val_masked);
if (ret)
return ret;
return fxls8962af_active(data);
} else {
return __fxls8962af_set_thresholds(data, chan, dir, val_masked);
}
}
static int
fxls8962af_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
return !!(FXLS8962AF_SDCD_CONFIG1_X_OT_EN & data->enable_event);
case IIO_MOD_Y:
return !!(FXLS8962AF_SDCD_CONFIG1_Y_OT_EN & data->enable_event);
case IIO_MOD_Z:
return !!(FXLS8962AF_SDCD_CONFIG1_Z_OT_EN & data->enable_event);
default:
return -EINVAL;
}
}
static int
fxls8962af_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir, int state)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
u8 enable_event, enable_bits;
int ret, value;
if (type != IIO_EV_TYPE_THRESH)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
enable_bits = FXLS8962AF_SDCD_CONFIG1_X_OT_EN;
break;
case IIO_MOD_Y:
enable_bits = FXLS8962AF_SDCD_CONFIG1_Y_OT_EN;
break;
case IIO_MOD_Z:
enable_bits = FXLS8962AF_SDCD_CONFIG1_Z_OT_EN;
break;
default:
return -EINVAL;
}
if (state)
enable_event = data->enable_event | enable_bits;
else
enable_event = data->enable_event & ~enable_bits;
if (data->enable_event == enable_event)
return 0;
ret = fxls8962af_standby(data);
if (ret)
return ret;
/* Enable events */
value = enable_event | FXLS8962AF_SDCD_CONFIG1_OT_ELE;
ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG1, value);
if (ret)
return ret;
/*
* Enable update of SDCD_REF_X/Y/Z values with the current decimated and
* trimmed X/Y/Z acceleration input data. This allows for acceleration
* slope detection with Data(n) to Data(n–1) always used as the input
* to the window comparator.
*/
value = enable_event ?
FXLS8962AF_SDCD_CONFIG2_SDCD_EN | FXLS8962AF_SC2_REF_UPDM_AC :
0x00;
ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG2, value);
if (ret)
return ret;
ret = fxls8962af_event_setup(data, state);
if (ret)
return ret;
data->enable_event = enable_event;
if (data->enable_event) {
fxls8962af_active(data);
ret = fxls8962af_power_on(data);
} else {
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
/* Not in buffered mode so disable power */
ret = fxls8962af_power_off(data);
iio_device_release_direct_mode(indio_dev);
}
return ret;
}
static const struct iio_event_spec fxls8962af_event[] = {
{
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_EITHER,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
},
{
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_FALLING,
.mask_separate = BIT(IIO_EV_INFO_VALUE),
},
{
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_VALUE),
},
};
#define FXLS8962AF_CHANNEL(axis, reg, idx) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = idx, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
.event_spec = fxls8962af_event, \
.num_event_specs = ARRAY_SIZE(fxls8962af_event), \
}
#define FXLS8962AF_TEMP_CHANNEL { \
.type = IIO_TEMP, \
.address = FXLS8962AF_TEMP_OUT, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_OFFSET),\
.scan_index = -1, \
.scan_type = { \
.realbits = 8, \
.storagebits = 8, \
}, \
}
static const struct iio_chan_spec fxls8962af_channels[] = {
FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),
FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),
FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),
IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),
FXLS8962AF_TEMP_CHANNEL,
};
static const struct fxls8962af_chip_info fxls_chip_info_table[] = {
[fxls8962af] = {
.chip_id = FXLS8962AF_DEVICE_ID,
.name = "fxls8962af",
.channels = fxls8962af_channels,
.num_channels = ARRAY_SIZE(fxls8962af_channels),
},
[fxls8964af] = {
.chip_id = FXLS8964AF_DEVICE_ID,
.name = "fxls8964af",
.channels = fxls8962af_channels,
.num_channels = ARRAY_SIZE(fxls8962af_channels),
},
};
static const struct iio_info fxls8962af_info = {
.read_raw = &fxls8962af_read_raw,
.write_raw = &fxls8962af_write_raw,
.write_raw_get_fmt = fxls8962af_write_raw_get_fmt,
.read_event_value = fxls8962af_read_event,
.write_event_value = fxls8962af_write_event,
.read_event_config = fxls8962af_read_event_config,
.write_event_config = fxls8962af_write_event_config,
.read_avail = fxls8962af_read_avail,
.hwfifo_set_watermark = fxls8962af_set_watermark,
};
static int fxls8962af_reset(struct fxls8962af_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
unsigned int reg;
int ret;
ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
FXLS8962AF_SENS_CONFIG1_RST,
FXLS8962AF_SENS_CONFIG1_RST);
if (ret)
return ret;
/* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */
ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,
(reg & FXLS8962AF_INT_STATUS_SRC_BOOT),
1000, 18000);
if (ret == -ETIMEDOUT)
dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);
return ret;
}
static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)
{
int ret;
/* Enable watermark at max fifo size */
ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,
FXLS8962AF_BUF_CONFIG2_BUF_WMRK,
data->watermark);
if (ret)
return ret;
return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,
FXLS8962AF_BC1_BUF_MODE_MASK,
FXLS8962AF_BC1_BUF_MODE_PREP(onoff));
}
static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)
{
return fxls8962af_power_on(iio_priv(indio_dev));
}
static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
int ret;
fxls8962af_standby(data);
/* Enable buffer interrupt */
ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
FXLS8962AF_INT_EN_BUF_EN,
FXLS8962AF_INT_EN_BUF_EN);
if (ret)
return ret;
ret = __fxls8962af_fifo_set_mode(data, true);
fxls8962af_active(data);
return ret;
}
static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
int ret;
fxls8962af_standby(data);
/* Disable buffer interrupt */
ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
FXLS8962AF_INT_EN_BUF_EN, 0);
if (ret)
return ret;
ret = __fxls8962af_fifo_set_mode(data, false);
if (data->enable_event)
fxls8962af_active(data);
return ret;
}
static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
if (!data->enable_event)
fxls8962af_power_off(data);
return 0;
}
static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {
.preenable = fxls8962af_buffer_preenable,
.postenable = fxls8962af_buffer_postenable,
.predisable = fxls8962af_buffer_predisable,
.postdisable = fxls8962af_buffer_postdisable,
};
static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,
u16 *buffer, int samples,
int sample_length)
{
int i, ret;
for (i = 0; i < samples; i++) {
ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,
&buffer[i * 3], sample_length);
if (ret)
return ret;
}
return 0;
}
static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,
u16 *buffer, int samples)
{
struct device *dev = regmap_get_device(data->regmap);
int sample_length = 3 * sizeof(*buffer);
int total_length = samples * sample_length;
int ret;
if (i2c_verify_client(dev) &&
data->chip_info->chip_id == FXLS8962AF_DEVICE_ID)
/*
* Due to errata bug (only applicable on fxls8962af):
* E3: FIFO burst read operation error using I2C interface
* We have to avoid burst reads on I2C..
*/
ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,
sample_length);
else
ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,
total_length);
if (ret)
dev_err(dev, "Error transferring data from fifo: %d\n", ret);
return ret;
}
static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];
uint64_t sample_period;
unsigned int reg;
int64_t tstamp;
int ret, i;
u8 count;
ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, ®);
if (ret)
return ret;
if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {
dev_err(dev, "Buffer overflow");
return -EOVERFLOW;
}
count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;
if (!count)
return 0;
data->old_timestamp = data->timestamp;
data->timestamp = iio_get_time_ns(indio_dev);
/*
* Approximate timestamps for each of the sample based on the sampling,
* frequency, timestamp for last sample and number of samples.
*/
sample_period = (data->timestamp - data->old_timestamp);
do_div(sample_period, count);
tstamp = data->timestamp - (count - 1) * sample_period;
ret = fxls8962af_fifo_transfer(data, buffer, count);
if (ret)
return ret;
/* Demux hw FIFO into kfifo. */
for (i = 0; i < count; i++) {
int j, bit;
j = 0;
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
sizeof(data->scan.channels[0]));
}
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
tstamp);
tstamp += sample_period;
}
return count;
}
static int fxls8962af_event_interrupt(struct iio_dev *indio_dev)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
s64 ts = iio_get_time_ns(indio_dev);
unsigned int reg;
u64 ev_code;
int ret;
ret = regmap_read(data->regmap, FXLS8962AF_SDCD_INT_SRC1, ®);
if (ret)
return ret;
if (reg & FXLS8962AF_SDCD_INT_SRC1_X_OT) {
ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_X_POL ?
IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
IIO_EV_TYPE_THRESH, ev_code), ts);
}
if (reg & FXLS8962AF_SDCD_INT_SRC1_Y_OT) {
ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Y_POL ?
IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
IIO_EV_TYPE_THRESH, ev_code), ts);
}
if (reg & FXLS8962AF_SDCD_INT_SRC1_Z_OT) {
ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Z_POL ?
IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
IIO_EV_TYPE_THRESH, ev_code), ts);
}
return 0;
}
static irqreturn_t fxls8962af_interrupt(int irq, void *p)
{
struct iio_dev *indio_dev = p;
struct fxls8962af_data *data = iio_priv(indio_dev);
unsigned int reg;
int ret;
ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, ®);
if (ret)
return IRQ_NONE;
if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {
ret = fxls8962af_fifo_flush(indio_dev);
if (ret < 0)
return IRQ_NONE;
return IRQ_HANDLED;
}
if (reg & FXLS8962AF_INT_STATUS_SRC_SDCD_OT) {
ret = fxls8962af_event_interrupt(indio_dev);
if (ret < 0)
return IRQ_NONE;
return IRQ_HANDLED;
}
return IRQ_NONE;
}
static void fxls8962af_pm_disable(void *dev_ptr)
{
struct device *dev = dev_ptr;
struct iio_dev *indio_dev = dev_get_drvdata(dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
pm_runtime_put_noidle(dev);
fxls8962af_standby(iio_priv(indio_dev));
}
static void fxls8962af_get_irq(struct device_node *of_node,
enum fxls8962af_int_pin *pin)
{
int irq;
irq = of_irq_get_byname(of_node, "INT2");
if (irq > 0) {
*pin = FXLS8962AF_PIN_INT2;
return;
}
*pin = FXLS8962AF_PIN_INT1;
}
static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)
{
struct fxls8962af_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
unsigned long irq_type;
bool irq_active_high;
enum fxls8962af_int_pin int_pin;
u8 int_pin_sel;
int ret;
fxls8962af_get_irq(dev->of_node, &int_pin);
switch (int_pin) {
case FXLS8962AF_PIN_INT1:
int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;
break;
case FXLS8962AF_PIN_INT2:
int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;
break;
default:
dev_err(dev, "unsupported int pin selected\n");
return -EINVAL;
}
ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,
FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);
if (ret)
return ret;
irq_type = irqd_get_trigger_type(irq_get_irq_data(irq));
switch (irq_type) {
case IRQF_TRIGGER_HIGH:
case IRQF_TRIGGER_RISING:
irq_active_high = true;
break;
case IRQF_TRIGGER_LOW:
case IRQF_TRIGGER_FALLING:
irq_active_high = false;
break;
default:
dev_info(dev, "mode %lx unsupported\n", irq_type);
return -EINVAL;
}
ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
FXLS8962AF_SC4_INT_POL_MASK,
FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));
if (ret)
return ret;
if (device_property_read_bool(dev, "drive-open-drain")) {
ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
FXLS8962AF_SC4_INT_PP_OD_MASK,
FXLS8962AF_SC4_INT_PP_OD_PREP(1));
if (ret)
return ret;
irq_type |= IRQF_SHARED;
}
return devm_request_threaded_irq(dev,
irq,
NULL, fxls8962af_interrupt,
irq_type | IRQF_ONESHOT,
indio_dev->name, indio_dev);
}
int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)
{
struct fxls8962af_data *data;
struct iio_dev *indio_dev;
unsigned int reg;
int ret, i;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->regmap = regmap;
data->irq = irq;
ret = iio_read_mount_matrix(dev, &data->orientation);
if (ret)
return ret;
ret = devm_regulator_get_enable(dev, "vdd");
if (ret)
return dev_err_probe(dev, ret,
"Failed to get vdd regulator\n");
ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, ®);
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {
if (fxls_chip_info_table[i].chip_id == reg) {
data->chip_info = &fxls_chip_info_table[i];
break;
}
}
if (i == ARRAY_SIZE(fxls_chip_info_table)) {
dev_err(dev, "failed to match device in table\n");
return -ENXIO;
}
indio_dev->channels = data->chip_info->channels;
indio_dev->num_channels = data->chip_info->num_channels;
indio_dev->name = data->chip_info->name;
indio_dev->info = &fxls8962af_info;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = fxls8962af_reset(data);
if (ret)
return ret;
if (irq) {
ret = fxls8962af_irq_setup(indio_dev, irq);
if (ret)
return ret;
ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
&fxls8962af_buffer_ops);
if (ret)
return ret;
}
ret = pm_runtime_set_active(dev);
if (ret)
return ret;
pm_runtime_enable(dev);
pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(dev);
ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);
if (ret)
return ret;
if (device_property_read_bool(dev, "wakeup-source"))
device_init_wakeup(dev, true);
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(fxls8962af_core_probe, IIO_FXLS8962AF);
static int fxls8962af_runtime_suspend(struct device *dev)
{
struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
int ret;
ret = fxls8962af_standby(data);
if (ret) {
dev_err(dev, "powering off device failed\n");
return ret;
}
return 0;
}
static int fxls8962af_runtime_resume(struct device *dev)
{
struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
return fxls8962af_active(data);
}
static int fxls8962af_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct fxls8962af_data *data = iio_priv(indio_dev);
if (device_may_wakeup(dev) && data->enable_event) {
enable_irq_wake(data->irq);
/*
* Disable buffer, as the buffer is so small the device will wake
* almost immediately.
*/
if (iio_buffer_enabled(indio_dev))
fxls8962af_buffer_predisable(indio_dev);
} else {
fxls8962af_runtime_suspend(dev);
}
return 0;
}
static int fxls8962af_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct fxls8962af_data *data = iio_priv(indio_dev);
if (device_may_wakeup(dev) && data->enable_event) {
disable_irq_wake(data->irq);
if (iio_buffer_enabled(indio_dev))
fxls8962af_buffer_postenable(indio_dev);
} else {
fxls8962af_runtime_resume(dev);
}
return 0;
}
EXPORT_NS_GPL_DEV_PM_OPS(fxls8962af_pm_ops, IIO_FXLS8962AF) = {
SYSTEM_SLEEP_PM_OPS(fxls8962af_suspend, fxls8962af_resume)
RUNTIME_PM_OPS(fxls8962af_runtime_suspend, fxls8962af_runtime_resume, NULL)
};
MODULE_AUTHOR("Sean Nyekjaer <[email protected]>");
MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/fxls8962af-core.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 Analog Devices, Inc.
* Author: Cosmin Tanislav <[email protected]>
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/iio/buffer.h>
#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/sysfs.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <asm/unaligned.h>
#include "adxl367.h"
#define ADXL367_REG_DEVID 0x00
#define ADXL367_DEVID_AD 0xAD
#define ADXL367_REG_STATUS 0x0B
#define ADXL367_STATUS_INACT_MASK BIT(5)
#define ADXL367_STATUS_ACT_MASK BIT(4)
#define ADXL367_STATUS_FIFO_FULL_MASK BIT(2)
#define ADXL367_FIFO_ENT_H_MASK GENMASK(1, 0)
#define ADXL367_REG_X_DATA_H 0x0E
#define ADXL367_REG_Y_DATA_H 0x10
#define ADXL367_REG_Z_DATA_H 0x12
#define ADXL367_REG_TEMP_DATA_H 0x14
#define ADXL367_REG_EX_ADC_DATA_H 0x16
#define ADXL367_DATA_MASK GENMASK(15, 2)
#define ADXL367_TEMP_25C 165
#define ADXL367_TEMP_PER_C 54
#define ADXL367_VOLTAGE_OFFSET 8192
#define ADXL367_VOLTAGE_MAX_MV 1000
#define ADXL367_VOLTAGE_MAX_RAW GENMASK(13, 0)
#define ADXL367_REG_RESET 0x1F
#define ADXL367_RESET_CODE 0x52
#define ADXL367_REG_THRESH_ACT_H 0x20
#define ADXL367_REG_THRESH_INACT_H 0x23
#define ADXL367_THRESH_MAX GENMASK(12, 0)
#define ADXL367_THRESH_VAL_H_MASK GENMASK(12, 6)
#define ADXL367_THRESH_H_MASK GENMASK(6, 0)
#define ADXL367_THRESH_VAL_L_MASK GENMASK(5, 0)
#define ADXL367_THRESH_L_MASK GENMASK(7, 2)
#define ADXL367_REG_TIME_ACT 0x22
#define ADXL367_REG_TIME_INACT_H 0x25
#define ADXL367_TIME_ACT_MAX GENMASK(7, 0)
#define ADXL367_TIME_INACT_MAX GENMASK(15, 0)
#define ADXL367_TIME_INACT_VAL_H_MASK GENMASK(15, 8)
#define ADXL367_TIME_INACT_H_MASK GENMASK(7, 0)
#define ADXL367_TIME_INACT_VAL_L_MASK GENMASK(7, 0)
#define ADXL367_TIME_INACT_L_MASK GENMASK(7, 0)
#define ADXL367_REG_ACT_INACT_CTL 0x27
#define ADXL367_ACT_EN_MASK GENMASK(1, 0)
#define ADXL367_ACT_LINKLOOP_MASK GENMASK(5, 4)
#define ADXL367_REG_FIFO_CTL 0x28
#define ADXL367_FIFO_CTL_FORMAT_MASK GENMASK(6, 3)
#define ADXL367_FIFO_CTL_MODE_MASK GENMASK(1, 0)
#define ADXL367_REG_FIFO_SAMPLES 0x29
#define ADXL367_FIFO_SIZE 512
#define ADXL367_FIFO_MAX_WATERMARK 511
#define ADXL367_SAMPLES_VAL_H_MASK BIT(8)
#define ADXL367_SAMPLES_H_MASK BIT(2)
#define ADXL367_SAMPLES_VAL_L_MASK GENMASK(7, 0)
#define ADXL367_SAMPLES_L_MASK GENMASK(7, 0)
#define ADXL367_REG_INT1_MAP 0x2A
#define ADXL367_INT_INACT_MASK BIT(5)
#define ADXL367_INT_ACT_MASK BIT(4)
#define ADXL367_INT_FIFO_WATERMARK_MASK BIT(2)
#define ADXL367_REG_FILTER_CTL 0x2C
#define ADXL367_FILTER_CTL_RANGE_MASK GENMASK(7, 6)
#define ADXL367_2G_RANGE_1G 4095
#define ADXL367_2G_RANGE_100MG 409
#define ADXL367_FILTER_CTL_ODR_MASK GENMASK(2, 0)
#define ADXL367_REG_POWER_CTL 0x2D
#define ADXL367_POWER_CTL_MODE_MASK GENMASK(1, 0)
#define ADXL367_REG_ADC_CTL 0x3C
#define ADXL367_REG_TEMP_CTL 0x3D
#define ADXL367_ADC_EN_MASK BIT(0)
enum adxl367_range {
ADXL367_2G_RANGE,
ADXL367_4G_RANGE,
ADXL367_8G_RANGE,
};
enum adxl367_fifo_mode {
ADXL367_FIFO_MODE_DISABLED = 0b00,
ADXL367_FIFO_MODE_STREAM = 0b10,
};
enum adxl367_fifo_format {
ADXL367_FIFO_FORMAT_XYZ,
ADXL367_FIFO_FORMAT_X,
ADXL367_FIFO_FORMAT_Y,
ADXL367_FIFO_FORMAT_Z,
ADXL367_FIFO_FORMAT_XYZT,
ADXL367_FIFO_FORMAT_XT,
ADXL367_FIFO_FORMAT_YT,
ADXL367_FIFO_FORMAT_ZT,
ADXL367_FIFO_FORMAT_XYZA,
ADXL367_FIFO_FORMAT_XA,
ADXL367_FIFO_FORMAT_YA,
ADXL367_FIFO_FORMAT_ZA,
};
enum adxl367_op_mode {
ADXL367_OP_STANDBY = 0b00,
ADXL367_OP_MEASURE = 0b10,
};
enum adxl367_act_proc_mode {
ADXL367_LOOPED = 0b11,
};
enum adxl367_act_en_mode {
ADXL367_ACT_DISABLED = 0b00,
ADCL367_ACT_REF_ENABLED = 0b11,
};
enum adxl367_activity_type {
ADXL367_ACTIVITY,
ADXL367_INACTIVITY,
};
enum adxl367_odr {
ADXL367_ODR_12P5HZ,
ADXL367_ODR_25HZ,
ADXL367_ODR_50HZ,
ADXL367_ODR_100HZ,
ADXL367_ODR_200HZ,
ADXL367_ODR_400HZ,
};
struct adxl367_state {
const struct adxl367_ops *ops;
void *context;
struct device *dev;
struct regmap *regmap;
/*
* Synchronize access to members of driver state, and ensure atomicity
* of consecutive regmap operations.
*/
struct mutex lock;
enum adxl367_odr odr;
enum adxl367_range range;
unsigned int act_threshold;
unsigned int act_time_ms;
unsigned int inact_threshold;
unsigned int inact_time_ms;
unsigned int fifo_set_size;
unsigned int fifo_watermark;
__be16 fifo_buf[ADXL367_FIFO_SIZE] __aligned(IIO_DMA_MINALIGN);
__be16 sample_buf;
u8 act_threshold_buf[2];
u8 inact_time_buf[2];
u8 status_buf[3];
};
static const unsigned int adxl367_threshold_h_reg_tbl[] = {
[ADXL367_ACTIVITY] = ADXL367_REG_THRESH_ACT_H,
[ADXL367_INACTIVITY] = ADXL367_REG_THRESH_INACT_H,
};
static const unsigned int adxl367_act_en_shift_tbl[] = {
[ADXL367_ACTIVITY] = 0,
[ADXL367_INACTIVITY] = 2,
};
static const unsigned int adxl367_act_int_mask_tbl[] = {
[ADXL367_ACTIVITY] = ADXL367_INT_ACT_MASK,
[ADXL367_INACTIVITY] = ADXL367_INT_INACT_MASK,
};
static const int adxl367_samp_freq_tbl[][2] = {
[ADXL367_ODR_12P5HZ] = {12, 500000},
[ADXL367_ODR_25HZ] = {25, 0},
[ADXL367_ODR_50HZ] = {50, 0},
[ADXL367_ODR_100HZ] = {100, 0},
[ADXL367_ODR_200HZ] = {200, 0},
[ADXL367_ODR_400HZ] = {400, 0},
};
/* (g * 2) * 9.80665 * 1000000 / (2^14 - 1) */
static const int adxl367_range_scale_tbl[][2] = {
[ADXL367_2G_RANGE] = {0, 2394347},
[ADXL367_4G_RANGE] = {0, 4788695},
[ADXL367_8G_RANGE] = {0, 9577391},
};
static const int adxl367_range_scale_factor_tbl[] = {
[ADXL367_2G_RANGE] = 1,
[ADXL367_4G_RANGE] = 2,
[ADXL367_8G_RANGE] = 4,
};
enum {
ADXL367_X_CHANNEL_INDEX,
ADXL367_Y_CHANNEL_INDEX,
ADXL367_Z_CHANNEL_INDEX,
ADXL367_TEMP_CHANNEL_INDEX,
ADXL367_EX_ADC_CHANNEL_INDEX
};
#define ADXL367_X_CHANNEL_MASK BIT(ADXL367_X_CHANNEL_INDEX)
#define ADXL367_Y_CHANNEL_MASK BIT(ADXL367_Y_CHANNEL_INDEX)
#define ADXL367_Z_CHANNEL_MASK BIT(ADXL367_Z_CHANNEL_INDEX)
#define ADXL367_TEMP_CHANNEL_MASK BIT(ADXL367_TEMP_CHANNEL_INDEX)
#define ADXL367_EX_ADC_CHANNEL_MASK BIT(ADXL367_EX_ADC_CHANNEL_INDEX)
static const enum adxl367_fifo_format adxl367_fifo_formats[] = {
ADXL367_FIFO_FORMAT_X,
ADXL367_FIFO_FORMAT_Y,
ADXL367_FIFO_FORMAT_Z,
ADXL367_FIFO_FORMAT_XT,
ADXL367_FIFO_FORMAT_YT,
ADXL367_FIFO_FORMAT_ZT,
ADXL367_FIFO_FORMAT_XA,
ADXL367_FIFO_FORMAT_YA,
ADXL367_FIFO_FORMAT_ZA,
ADXL367_FIFO_FORMAT_XYZ,
ADXL367_FIFO_FORMAT_XYZT,
ADXL367_FIFO_FORMAT_XYZA,
};
static const unsigned long adxl367_channel_masks[] = {
ADXL367_X_CHANNEL_MASK,
ADXL367_Y_CHANNEL_MASK,
ADXL367_Z_CHANNEL_MASK,
ADXL367_X_CHANNEL_MASK | ADXL367_TEMP_CHANNEL_MASK,
ADXL367_Y_CHANNEL_MASK | ADXL367_TEMP_CHANNEL_MASK,
ADXL367_Z_CHANNEL_MASK | ADXL367_TEMP_CHANNEL_MASK,
ADXL367_X_CHANNEL_MASK | ADXL367_EX_ADC_CHANNEL_MASK,
ADXL367_Y_CHANNEL_MASK | ADXL367_EX_ADC_CHANNEL_MASK,
ADXL367_Z_CHANNEL_MASK | ADXL367_EX_ADC_CHANNEL_MASK,
ADXL367_X_CHANNEL_MASK | ADXL367_Y_CHANNEL_MASK | ADXL367_Z_CHANNEL_MASK,
ADXL367_X_CHANNEL_MASK | ADXL367_Y_CHANNEL_MASK | ADXL367_Z_CHANNEL_MASK |
ADXL367_TEMP_CHANNEL_MASK,
ADXL367_X_CHANNEL_MASK | ADXL367_Y_CHANNEL_MASK | ADXL367_Z_CHANNEL_MASK |
ADXL367_EX_ADC_CHANNEL_MASK,
0,
};
static int adxl367_set_measure_en(struct adxl367_state *st, bool en)
{
enum adxl367_op_mode op_mode = en ? ADXL367_OP_MEASURE
: ADXL367_OP_STANDBY;
int ret;
ret = regmap_update_bits(st->regmap, ADXL367_REG_POWER_CTL,
ADXL367_POWER_CTL_MODE_MASK,
FIELD_PREP(ADXL367_POWER_CTL_MODE_MASK,
op_mode));
if (ret)
return ret;
/*
* Wait for acceleration output to settle after entering
* measure mode.
*/
if (en)
msleep(100);
return 0;
}
static void adxl367_scale_act_thresholds(struct adxl367_state *st,
enum adxl367_range old_range,
enum adxl367_range new_range)
{
st->act_threshold = st->act_threshold
* adxl367_range_scale_factor_tbl[old_range]
/ adxl367_range_scale_factor_tbl[new_range];
st->inact_threshold = st->inact_threshold
* adxl367_range_scale_factor_tbl[old_range]
/ adxl367_range_scale_factor_tbl[new_range];
}
static int _adxl367_set_act_threshold(struct adxl367_state *st,
enum adxl367_activity_type act,
unsigned int threshold)
{
u8 reg = adxl367_threshold_h_reg_tbl[act];
int ret;
if (threshold > ADXL367_THRESH_MAX)
return -EINVAL;
st->act_threshold_buf[0] = FIELD_PREP(ADXL367_THRESH_H_MASK,
FIELD_GET(ADXL367_THRESH_VAL_H_MASK,
threshold));
st->act_threshold_buf[1] = FIELD_PREP(ADXL367_THRESH_L_MASK,
FIELD_GET(ADXL367_THRESH_VAL_L_MASK,
threshold));
ret = regmap_bulk_write(st->regmap, reg, st->act_threshold_buf,
sizeof(st->act_threshold_buf));
if (ret)
return ret;
if (act == ADXL367_ACTIVITY)
st->act_threshold = threshold;
else
st->inact_threshold = threshold;
return 0;
}
static int adxl367_set_act_threshold(struct adxl367_state *st,
enum adxl367_activity_type act,
unsigned int threshold)
{
int ret;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = _adxl367_set_act_threshold(st, act, threshold);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
out:
mutex_unlock(&st->lock);
return ret;
}
static int adxl367_set_act_proc_mode(struct adxl367_state *st,
enum adxl367_act_proc_mode mode)
{
return regmap_update_bits(st->regmap, ADXL367_REG_ACT_INACT_CTL,
ADXL367_ACT_LINKLOOP_MASK,
FIELD_PREP(ADXL367_ACT_LINKLOOP_MASK,
mode));
}
static int adxl367_set_act_interrupt_en(struct adxl367_state *st,
enum adxl367_activity_type act,
bool en)
{
unsigned int mask = adxl367_act_int_mask_tbl[act];
return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP,
mask, en ? mask : 0);
}
static int adxl367_get_act_interrupt_en(struct adxl367_state *st,
enum adxl367_activity_type act,
bool *en)
{
unsigned int mask = adxl367_act_int_mask_tbl[act];
unsigned int val;
int ret;
ret = regmap_read(st->regmap, ADXL367_REG_INT1_MAP, &val);
if (ret)
return ret;
*en = !!(val & mask);
return 0;
}
static int adxl367_set_act_en(struct adxl367_state *st,
enum adxl367_activity_type act,
enum adxl367_act_en_mode en)
{
unsigned int ctl_shift = adxl367_act_en_shift_tbl[act];
return regmap_update_bits(st->regmap, ADXL367_REG_ACT_INACT_CTL,
ADXL367_ACT_EN_MASK << ctl_shift,
en << ctl_shift);
}
static int adxl367_set_fifo_watermark_interrupt_en(struct adxl367_state *st,
bool en)
{
return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP,
ADXL367_INT_FIFO_WATERMARK_MASK,
en ? ADXL367_INT_FIFO_WATERMARK_MASK : 0);
}
static int adxl367_get_fifo_mode(struct adxl367_state *st,
enum adxl367_fifo_mode *fifo_mode)
{
unsigned int val;
int ret;
ret = regmap_read(st->regmap, ADXL367_REG_FIFO_CTL, &val);
if (ret)
return ret;
*fifo_mode = FIELD_GET(ADXL367_FIFO_CTL_MODE_MASK, val);
return 0;
}
static int adxl367_set_fifo_mode(struct adxl367_state *st,
enum adxl367_fifo_mode fifo_mode)
{
return regmap_update_bits(st->regmap, ADXL367_REG_FIFO_CTL,
ADXL367_FIFO_CTL_MODE_MASK,
FIELD_PREP(ADXL367_FIFO_CTL_MODE_MASK,
fifo_mode));
}
static int adxl367_set_fifo_format(struct adxl367_state *st,
enum adxl367_fifo_format fifo_format)
{
return regmap_update_bits(st->regmap, ADXL367_REG_FIFO_CTL,
ADXL367_FIFO_CTL_FORMAT_MASK,
FIELD_PREP(ADXL367_FIFO_CTL_FORMAT_MASK,
fifo_format));
}
static int adxl367_set_fifo_watermark(struct adxl367_state *st,
unsigned int fifo_watermark)
{
unsigned int fifo_samples = fifo_watermark * st->fifo_set_size;
unsigned int fifo_samples_h, fifo_samples_l;
int ret;
if (fifo_samples > ADXL367_FIFO_MAX_WATERMARK)
fifo_samples = ADXL367_FIFO_MAX_WATERMARK;
fifo_samples /= st->fifo_set_size;
fifo_samples_h = FIELD_PREP(ADXL367_SAMPLES_H_MASK,
FIELD_GET(ADXL367_SAMPLES_VAL_H_MASK,
fifo_samples));
fifo_samples_l = FIELD_PREP(ADXL367_SAMPLES_L_MASK,
FIELD_GET(ADXL367_SAMPLES_VAL_L_MASK,
fifo_samples));
ret = regmap_update_bits(st->regmap, ADXL367_REG_FIFO_CTL,
ADXL367_SAMPLES_H_MASK, fifo_samples_h);
if (ret)
return ret;
ret = regmap_update_bits(st->regmap, ADXL367_REG_FIFO_SAMPLES,
ADXL367_SAMPLES_L_MASK, fifo_samples_l);
if (ret)
return ret;
st->fifo_watermark = fifo_watermark;
return 0;
}
static int adxl367_set_range(struct iio_dev *indio_dev,
enum adxl367_range range)
{
struct adxl367_state *st = iio_priv(indio_dev);
int ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = regmap_update_bits(st->regmap, ADXL367_REG_FILTER_CTL,
ADXL367_FILTER_CTL_RANGE_MASK,
FIELD_PREP(ADXL367_FILTER_CTL_RANGE_MASK,
range));
if (ret)
goto out;
adxl367_scale_act_thresholds(st, st->range, range);
/* Activity thresholds depend on range */
ret = _adxl367_set_act_threshold(st, ADXL367_ACTIVITY,
st->act_threshold);
if (ret)
goto out;
ret = _adxl367_set_act_threshold(st, ADXL367_INACTIVITY,
st->inact_threshold);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
if (ret)
goto out;
st->range = range;
out:
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret;
}
static int adxl367_time_ms_to_samples(struct adxl367_state *st, unsigned int ms)
{
int freq_hz = adxl367_samp_freq_tbl[st->odr][0];
int freq_microhz = adxl367_samp_freq_tbl[st->odr][1];
/* Scale to decihertz to prevent precision loss in 12.5Hz case. */
int freq_dhz = freq_hz * 10 + freq_microhz / 100000;
return DIV_ROUND_CLOSEST(ms * freq_dhz, 10000);
}
static int _adxl367_set_act_time_ms(struct adxl367_state *st, unsigned int ms)
{
unsigned int val = adxl367_time_ms_to_samples(st, ms);
int ret;
if (val > ADXL367_TIME_ACT_MAX)
val = ADXL367_TIME_ACT_MAX;
ret = regmap_write(st->regmap, ADXL367_REG_TIME_ACT, val);
if (ret)
return ret;
st->act_time_ms = ms;
return 0;
}
static int _adxl367_set_inact_time_ms(struct adxl367_state *st, unsigned int ms)
{
unsigned int val = adxl367_time_ms_to_samples(st, ms);
int ret;
if (val > ADXL367_TIME_INACT_MAX)
val = ADXL367_TIME_INACT_MAX;
st->inact_time_buf[0] = FIELD_PREP(ADXL367_TIME_INACT_H_MASK,
FIELD_GET(ADXL367_TIME_INACT_VAL_H_MASK,
val));
st->inact_time_buf[1] = FIELD_PREP(ADXL367_TIME_INACT_L_MASK,
FIELD_GET(ADXL367_TIME_INACT_VAL_L_MASK,
val));
ret = regmap_bulk_write(st->regmap, ADXL367_REG_TIME_INACT_H,
st->inact_time_buf, sizeof(st->inact_time_buf));
if (ret)
return ret;
st->inact_time_ms = ms;
return 0;
}
static int adxl367_set_act_time_ms(struct adxl367_state *st,
enum adxl367_activity_type act,
unsigned int ms)
{
int ret;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
if (act == ADXL367_ACTIVITY)
ret = _adxl367_set_act_time_ms(st, ms);
else
ret = _adxl367_set_inact_time_ms(st, ms);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
out:
mutex_unlock(&st->lock);
return ret;
}
static int _adxl367_set_odr(struct adxl367_state *st, enum adxl367_odr odr)
{
int ret;
ret = regmap_update_bits(st->regmap, ADXL367_REG_FILTER_CTL,
ADXL367_FILTER_CTL_ODR_MASK,
FIELD_PREP(ADXL367_FILTER_CTL_ODR_MASK,
odr));
if (ret)
return ret;
/* Activity timers depend on ODR */
ret = _adxl367_set_act_time_ms(st, st->act_time_ms);
if (ret)
return ret;
ret = _adxl367_set_inact_time_ms(st, st->inact_time_ms);
if (ret)
return ret;
st->odr = odr;
return 0;
}
static int adxl367_set_odr(struct iio_dev *indio_dev, enum adxl367_odr odr)
{
struct adxl367_state *st = iio_priv(indio_dev);
int ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = _adxl367_set_odr(st, odr);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
out:
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret;
}
static int adxl367_set_temp_adc_en(struct adxl367_state *st, unsigned int reg,
bool en)
{
return regmap_update_bits(st->regmap, reg, ADXL367_ADC_EN_MASK,
en ? ADXL367_ADC_EN_MASK : 0);
}
static int adxl367_set_temp_adc_reg_en(struct adxl367_state *st,
unsigned int reg, bool en)
{
int ret;
switch (reg) {
case ADXL367_REG_TEMP_DATA_H:
ret = adxl367_set_temp_adc_en(st, ADXL367_REG_TEMP_CTL, en);
break;
case ADXL367_REG_EX_ADC_DATA_H:
ret = adxl367_set_temp_adc_en(st, ADXL367_REG_ADC_CTL, en);
break;
default:
return 0;
}
if (ret)
return ret;
if (en)
msleep(100);
return 0;
}
static int adxl367_set_temp_adc_mask_en(struct adxl367_state *st,
const unsigned long *active_scan_mask,
bool en)
{
if (*active_scan_mask & ADXL367_TEMP_CHANNEL_MASK)
return adxl367_set_temp_adc_en(st, ADXL367_REG_TEMP_CTL, en);
else if (*active_scan_mask & ADXL367_EX_ADC_CHANNEL_MASK)
return adxl367_set_temp_adc_en(st, ADXL367_REG_ADC_CTL, en);
return 0;
}
static int adxl367_find_odr(struct adxl367_state *st, int val, int val2,
enum adxl367_odr *odr)
{
size_t size = ARRAY_SIZE(adxl367_samp_freq_tbl);
int i;
for (i = 0; i < size; i++)
if (val == adxl367_samp_freq_tbl[i][0] &&
val2 == adxl367_samp_freq_tbl[i][1])
break;
if (i == size)
return -EINVAL;
*odr = i;
return 0;
}
static int adxl367_find_range(struct adxl367_state *st, int val, int val2,
enum adxl367_range *range)
{
size_t size = ARRAY_SIZE(adxl367_range_scale_tbl);
int i;
for (i = 0; i < size; i++)
if (val == adxl367_range_scale_tbl[i][0] &&
val2 == adxl367_range_scale_tbl[i][1])
break;
if (i == size)
return -EINVAL;
*range = i;
return 0;
}
static int adxl367_read_sample(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val)
{
struct adxl367_state *st = iio_priv(indio_dev);
u16 sample;
int ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
ret = adxl367_set_temp_adc_reg_en(st, chan->address, true);
if (ret)
goto out;
ret = regmap_bulk_read(st->regmap, chan->address, &st->sample_buf,
sizeof(st->sample_buf));
if (ret)
goto out;
sample = FIELD_GET(ADXL367_DATA_MASK, be16_to_cpu(st->sample_buf));
*val = sign_extend32(sample, chan->scan_type.realbits - 1);
ret = adxl367_set_temp_adc_reg_en(st, chan->address, false);
out:
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret ?: IIO_VAL_INT;
}
static int adxl367_get_status(struct adxl367_state *st, u8 *status,
u16 *fifo_entries)
{
int ret;
/* Read STATUS, FIFO_ENT_L and FIFO_ENT_H */
ret = regmap_bulk_read(st->regmap, ADXL367_REG_STATUS,
st->status_buf, sizeof(st->status_buf));
if (ret)
return ret;
st->status_buf[2] &= ADXL367_FIFO_ENT_H_MASK;
*status = st->status_buf[0];
*fifo_entries = get_unaligned_le16(&st->status_buf[1]);
return 0;
}
static bool adxl367_push_event(struct iio_dev *indio_dev, u8 status)
{
unsigned int ev_dir;
if (FIELD_GET(ADXL367_STATUS_ACT_MASK, status))
ev_dir = IIO_EV_DIR_RISING;
else if (FIELD_GET(ADXL367_STATUS_INACT_MASK, status))
ev_dir = IIO_EV_DIR_FALLING;
else
return false;
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X_OR_Y_OR_Z,
IIO_EV_TYPE_THRESH, ev_dir),
iio_get_time_ns(indio_dev));
return true;
}
static bool adxl367_push_fifo_data(struct iio_dev *indio_dev, u8 status,
u16 fifo_entries)
{
struct adxl367_state *st = iio_priv(indio_dev);
int ret;
int i;
if (!FIELD_GET(ADXL367_STATUS_FIFO_FULL_MASK, status))
return false;
fifo_entries -= fifo_entries % st->fifo_set_size;
ret = st->ops->read_fifo(st->context, st->fifo_buf, fifo_entries);
if (ret) {
dev_err(st->dev, "Failed to read FIFO: %d\n", ret);
return true;
}
for (i = 0; i < fifo_entries; i += st->fifo_set_size)
iio_push_to_buffers(indio_dev, &st->fifo_buf[i]);
return true;
}
static irqreturn_t adxl367_irq_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct adxl367_state *st = iio_priv(indio_dev);
u16 fifo_entries;
bool handled;
u8 status;
int ret;
ret = adxl367_get_status(st, &status, &fifo_entries);
if (ret)
return IRQ_NONE;
handled = adxl367_push_event(indio_dev, status);
handled |= adxl367_push_fifo_data(indio_dev, status, fifo_entries);
return handled ? IRQ_HANDLED : IRQ_NONE;
}
static int adxl367_reg_access(struct iio_dev *indio_dev,
unsigned int reg,
unsigned int writeval,
unsigned int *readval)
{
struct adxl367_state *st = iio_priv(indio_dev);
if (readval)
return regmap_read(st->regmap, reg, readval);
else
return regmap_write(st->regmap, reg, writeval);
}
static int adxl367_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long info)
{
struct adxl367_state *st = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_RAW:
return adxl367_read_sample(indio_dev, chan, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
mutex_lock(&st->lock);
*val = adxl367_range_scale_tbl[st->range][0];
*val2 = adxl367_range_scale_tbl[st->range][1];
mutex_unlock(&st->lock);
return IIO_VAL_INT_PLUS_NANO;
case IIO_TEMP:
*val = 1000;
*val2 = ADXL367_TEMP_PER_C;
return IIO_VAL_FRACTIONAL;
case IIO_VOLTAGE:
*val = ADXL367_VOLTAGE_MAX_MV;
*val2 = ADXL367_VOLTAGE_MAX_RAW;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
*val = 25 * ADXL367_TEMP_PER_C - ADXL367_TEMP_25C;
return IIO_VAL_INT;
case IIO_VOLTAGE:
*val = ADXL367_VOLTAGE_OFFSET;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&st->lock);
*val = adxl367_samp_freq_tbl[st->odr][0];
*val2 = adxl367_samp_freq_tbl[st->odr][1];
mutex_unlock(&st->lock);
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int adxl367_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long info)
{
struct adxl367_state *st = iio_priv(indio_dev);
int ret;
switch (info) {
case IIO_CHAN_INFO_SAMP_FREQ: {
enum adxl367_odr odr;
ret = adxl367_find_odr(st, val, val2, &odr);
if (ret)
return ret;
return adxl367_set_odr(indio_dev, odr);
}
case IIO_CHAN_INFO_SCALE: {
enum adxl367_range range;
ret = adxl367_find_range(st, val, val2, &range);
if (ret)
return ret;
return adxl367_set_range(indio_dev, range);
}
default:
return -EINVAL;
}
}
static int adxl367_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long info)
{
switch (info) {
case IIO_CHAN_INFO_SCALE:
if (chan->type != IIO_ACCEL)
return -EINVAL;
return IIO_VAL_INT_PLUS_NANO;
default:
return IIO_VAL_INT_PLUS_MICRO;
}
}
static int adxl367_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long info)
{
switch (info) {
case IIO_CHAN_INFO_SCALE:
if (chan->type != IIO_ACCEL)
return -EINVAL;
*vals = (int *)adxl367_range_scale_tbl;
*type = IIO_VAL_INT_PLUS_NANO;
*length = ARRAY_SIZE(adxl367_range_scale_tbl) * 2;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = (int *)adxl367_samp_freq_tbl;
*type = IIO_VAL_INT_PLUS_MICRO;
*length = ARRAY_SIZE(adxl367_samp_freq_tbl) * 2;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int adxl367_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct adxl367_state *st = iio_priv(indio_dev);
switch (info) {
case IIO_EV_INFO_VALUE: {
switch (dir) {
case IIO_EV_DIR_RISING:
mutex_lock(&st->lock);
*val = st->act_threshold;
mutex_unlock(&st->lock);
return IIO_VAL_INT;
case IIO_EV_DIR_FALLING:
mutex_lock(&st->lock);
*val = st->inact_threshold;
mutex_unlock(&st->lock);
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
case IIO_EV_INFO_PERIOD:
switch (dir) {
case IIO_EV_DIR_RISING:
mutex_lock(&st->lock);
*val = st->act_time_ms;
mutex_unlock(&st->lock);
*val2 = 1000;
return IIO_VAL_FRACTIONAL;
case IIO_EV_DIR_FALLING:
mutex_lock(&st->lock);
*val = st->inact_time_ms;
mutex_unlock(&st->lock);
*val2 = 1000;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int adxl367_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct adxl367_state *st = iio_priv(indio_dev);
switch (info) {
case IIO_EV_INFO_VALUE:
if (val < 0)
return -EINVAL;
switch (dir) {
case IIO_EV_DIR_RISING:
return adxl367_set_act_threshold(st, ADXL367_ACTIVITY, val);
case IIO_EV_DIR_FALLING:
return adxl367_set_act_threshold(st, ADXL367_INACTIVITY, val);
default:
return -EINVAL;
}
case IIO_EV_INFO_PERIOD:
if (val < 0)
return -EINVAL;
val = val * 1000 + DIV_ROUND_UP(val2, 1000);
switch (dir) {
case IIO_EV_DIR_RISING:
return adxl367_set_act_time_ms(st, ADXL367_ACTIVITY, val);
case IIO_EV_DIR_FALLING:
return adxl367_set_act_time_ms(st, ADXL367_INACTIVITY, val);
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int adxl367_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct adxl367_state *st = iio_priv(indio_dev);
bool en;
int ret;
switch (dir) {
case IIO_EV_DIR_RISING:
ret = adxl367_get_act_interrupt_en(st, ADXL367_ACTIVITY, &en);
return ret ?: en;
case IIO_EV_DIR_FALLING:
ret = adxl367_get_act_interrupt_en(st, ADXL367_INACTIVITY, &en);
return ret ?: en;
default:
return -EINVAL;
}
}
static int adxl367_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct adxl367_state *st = iio_priv(indio_dev);
enum adxl367_activity_type act;
int ret;
switch (dir) {
case IIO_EV_DIR_RISING:
act = ADXL367_ACTIVITY;
break;
case IIO_EV_DIR_FALLING:
act = ADXL367_INACTIVITY;
break;
default:
return -EINVAL;
}
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = adxl367_set_act_interrupt_en(st, act, state);
if (ret)
goto out;
ret = adxl367_set_act_en(st, act, state ? ADCL367_ACT_REF_ENABLED
: ADXL367_ACT_DISABLED);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
out:
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret;
}
static ssize_t adxl367_get_fifo_enabled(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct adxl367_state *st = iio_priv(dev_to_iio_dev(dev));
enum adxl367_fifo_mode fifo_mode;
int ret;
ret = adxl367_get_fifo_mode(st, &fifo_mode);
if (ret)
return ret;
return sysfs_emit(buf, "%d\n", fifo_mode != ADXL367_FIFO_MODE_DISABLED);
}
static ssize_t adxl367_get_fifo_watermark(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct adxl367_state *st = iio_priv(dev_to_iio_dev(dev));
unsigned int fifo_watermark;
mutex_lock(&st->lock);
fifo_watermark = st->fifo_watermark;
mutex_unlock(&st->lock);
return sysfs_emit(buf, "%d\n", fifo_watermark);
}
IIO_STATIC_CONST_DEVICE_ATTR(hwfifo_watermark_min, "1");
IIO_STATIC_CONST_DEVICE_ATTR(hwfifo_watermark_max,
__stringify(ADXL367_FIFO_MAX_WATERMARK));
static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,
adxl367_get_fifo_watermark, NULL, 0);
static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,
adxl367_get_fifo_enabled, NULL, 0);
static const struct iio_dev_attr *adxl367_fifo_attributes[] = {
&iio_dev_attr_hwfifo_watermark_min,
&iio_dev_attr_hwfifo_watermark_max,
&iio_dev_attr_hwfifo_watermark,
&iio_dev_attr_hwfifo_enabled,
NULL,
};
static int adxl367_set_watermark(struct iio_dev *indio_dev, unsigned int val)
{
struct adxl367_state *st = iio_priv(indio_dev);
int ret;
if (val > ADXL367_FIFO_MAX_WATERMARK)
return -EINVAL;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = adxl367_set_fifo_watermark(st, val);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
out:
mutex_unlock(&st->lock);
return ret;
}
static bool adxl367_find_mask_fifo_format(const unsigned long *scan_mask,
enum adxl367_fifo_format *fifo_format)
{
size_t size = ARRAY_SIZE(adxl367_fifo_formats);
int i;
for (i = 0; i < size; i++)
if (*scan_mask == adxl367_channel_masks[i])
break;
if (i == size)
return false;
*fifo_format = adxl367_fifo_formats[i];
return true;
}
static int adxl367_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *active_scan_mask)
{
struct adxl367_state *st = iio_priv(indio_dev);
enum adxl367_fifo_format fifo_format;
int ret;
if (!adxl367_find_mask_fifo_format(active_scan_mask, &fifo_format))
return -EINVAL;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = adxl367_set_fifo_format(st, fifo_format);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
if (ret)
goto out;
st->fifo_set_size = bitmap_weight(active_scan_mask,
indio_dev->masklength);
out:
mutex_unlock(&st->lock);
return ret;
}
static int adxl367_buffer_postenable(struct iio_dev *indio_dev)
{
struct adxl367_state *st = iio_priv(indio_dev);
int ret;
mutex_lock(&st->lock);
ret = adxl367_set_temp_adc_mask_en(st, indio_dev->active_scan_mask,
true);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = adxl367_set_fifo_watermark_interrupt_en(st, true);
if (ret)
goto out;
ret = adxl367_set_fifo_mode(st, ADXL367_FIFO_MODE_STREAM);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
out:
mutex_unlock(&st->lock);
return ret;
}
static int adxl367_buffer_predisable(struct iio_dev *indio_dev)
{
struct adxl367_state *st = iio_priv(indio_dev);
int ret;
mutex_lock(&st->lock);
ret = adxl367_set_measure_en(st, false);
if (ret)
goto out;
ret = adxl367_set_fifo_mode(st, ADXL367_FIFO_MODE_DISABLED);
if (ret)
goto out;
ret = adxl367_set_fifo_watermark_interrupt_en(st, false);
if (ret)
goto out;
ret = adxl367_set_measure_en(st, true);
if (ret)
goto out;
ret = adxl367_set_temp_adc_mask_en(st, indio_dev->active_scan_mask,
false);
out:
mutex_unlock(&st->lock);
return ret;
}
static const struct iio_buffer_setup_ops adxl367_buffer_ops = {
.postenable = adxl367_buffer_postenable,
.predisable = adxl367_buffer_predisable,
};
static const struct iio_info adxl367_info = {
.read_raw = adxl367_read_raw,
.write_raw = adxl367_write_raw,
.write_raw_get_fmt = adxl367_write_raw_get_fmt,
.read_avail = adxl367_read_avail,
.read_event_config = adxl367_read_event_config,
.write_event_config = adxl367_write_event_config,
.read_event_value = adxl367_read_event_value,
.write_event_value = adxl367_write_event_value,
.debugfs_reg_access = adxl367_reg_access,
.hwfifo_set_watermark = adxl367_set_watermark,
.update_scan_mode = adxl367_update_scan_mode,
};
static const struct iio_event_spec adxl367_events[] = {
{
.type = IIO_EV_TYPE_MAG_REFERENCED,
.dir = IIO_EV_DIR_RISING,
.mask_shared_by_type = BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_PERIOD) |
BIT(IIO_EV_INFO_VALUE),
},
{
.type = IIO_EV_TYPE_MAG_REFERENCED,
.dir = IIO_EV_DIR_FALLING,
.mask_shared_by_type = BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_PERIOD) |
BIT(IIO_EV_INFO_VALUE),
},
};
#define ADXL367_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = (reg), \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_all_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.event_spec = adxl367_events, \
.num_event_specs = ARRAY_SIZE(adxl367_events), \
.scan_index = (index), \
.scan_type = { \
.sign = 's', \
.realbits = 14, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
#define ADXL367_CHANNEL(index, reg, _type) { \
.type = (_type), \
.address = (reg), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_OFFSET) | \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = (index), \
.scan_type = { \
.sign = 's', \
.realbits = 14, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec adxl367_channels[] = {
ADXL367_ACCEL_CHANNEL(ADXL367_X_CHANNEL_INDEX, ADXL367_REG_X_DATA_H, X),
ADXL367_ACCEL_CHANNEL(ADXL367_Y_CHANNEL_INDEX, ADXL367_REG_Y_DATA_H, Y),
ADXL367_ACCEL_CHANNEL(ADXL367_Z_CHANNEL_INDEX, ADXL367_REG_Z_DATA_H, Z),
ADXL367_CHANNEL(ADXL367_TEMP_CHANNEL_INDEX, ADXL367_REG_TEMP_DATA_H,
IIO_TEMP),
ADXL367_CHANNEL(ADXL367_EX_ADC_CHANNEL_INDEX, ADXL367_REG_EX_ADC_DATA_H,
IIO_VOLTAGE),
};
static int adxl367_verify_devid(struct adxl367_state *st)
{
unsigned int val;
int ret;
ret = regmap_read_poll_timeout(st->regmap, ADXL367_REG_DEVID, val,
val == ADXL367_DEVID_AD, 1000, 10000);
if (ret)
return dev_err_probe(st->dev, -ENODEV,
"Invalid dev id 0x%02X, expected 0x%02X\n",
val, ADXL367_DEVID_AD);
return 0;
}
static int adxl367_setup(struct adxl367_state *st)
{
int ret;
ret = _adxl367_set_act_threshold(st, ADXL367_ACTIVITY,
ADXL367_2G_RANGE_1G);
if (ret)
return ret;
ret = _adxl367_set_act_threshold(st, ADXL367_INACTIVITY,
ADXL367_2G_RANGE_100MG);
if (ret)
return ret;
ret = adxl367_set_act_proc_mode(st, ADXL367_LOOPED);
if (ret)
return ret;
ret = _adxl367_set_odr(st, ADXL367_ODR_400HZ);
if (ret)
return ret;
ret = _adxl367_set_act_time_ms(st, 10);
if (ret)
return ret;
ret = _adxl367_set_inact_time_ms(st, 10000);
if (ret)
return ret;
return adxl367_set_measure_en(st, true);
}
int adxl367_probe(struct device *dev, const struct adxl367_ops *ops,
void *context, struct regmap *regmap, int irq)
{
static const char * const regulator_names[] = { "vdd", "vddio" };
struct iio_dev *indio_dev;
struct adxl367_state *st;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->dev = dev;
st->regmap = regmap;
st->context = context;
st->ops = ops;
mutex_init(&st->lock);
indio_dev->channels = adxl367_channels;
indio_dev->num_channels = ARRAY_SIZE(adxl367_channels);
indio_dev->available_scan_masks = adxl367_channel_masks;
indio_dev->name = "adxl367";
indio_dev->info = &adxl367_info;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = devm_regulator_bulk_get_enable(st->dev,
ARRAY_SIZE(regulator_names),
regulator_names);
if (ret)
return dev_err_probe(st->dev, ret,
"Failed to get regulators\n");
ret = regmap_write(st->regmap, ADXL367_REG_RESET, ADXL367_RESET_CODE);
if (ret)
return ret;
ret = adxl367_verify_devid(st);
if (ret)
return ret;
ret = adxl367_setup(st);
if (ret)
return ret;
ret = devm_iio_kfifo_buffer_setup_ext(st->dev, indio_dev,
&adxl367_buffer_ops,
adxl367_fifo_attributes);
if (ret)
return ret;
ret = devm_request_threaded_irq(st->dev, irq, NULL,
adxl367_irq_handler, IRQF_ONESHOT,
indio_dev->name, indio_dev);
if (ret)
return dev_err_probe(st->dev, ret, "Failed to request irq\n");
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(adxl367_probe, IIO_ADXL367);
MODULE_AUTHOR("Cosmin Tanislav <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADXL367 3-axis accelerometer driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/adxl367.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Freescale MMA9553L Intelligent Pedometer driver
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>
#include <linux/pm_runtime.h>
#include "mma9551_core.h"
#define MMA9553_DRV_NAME "mma9553"
#define MMA9553_IRQ_NAME "mma9553_event"
/* Pedometer configuration registers (R/W) */
#define MMA9553_REG_CONF_SLEEPMIN 0x00
#define MMA9553_REG_CONF_SLEEPMAX 0x02
#define MMA9553_REG_CONF_SLEEPTHD 0x04
#define MMA9553_MASK_CONF_WORD GENMASK(15, 0)
#define MMA9553_REG_CONF_CONF_STEPLEN 0x06
#define MMA9553_MASK_CONF_CONFIG BIT(15)
#define MMA9553_MASK_CONF_ACT_DBCNTM BIT(14)
#define MMA9553_MASK_CONF_SLP_DBCNTM BIT(13)
#define MMA9553_MASK_CONF_STEPLEN GENMASK(7, 0)
#define MMA9553_REG_CONF_HEIGHT_WEIGHT 0x08
#define MMA9553_MASK_CONF_HEIGHT GENMASK(15, 8)
#define MMA9553_MASK_CONF_WEIGHT GENMASK(7, 0)
#define MMA9553_REG_CONF_FILTER 0x0A
#define MMA9553_MASK_CONF_FILTSTEP GENMASK(15, 8)
#define MMA9553_MASK_CONF_MALE BIT(7)
#define MMA9553_MASK_CONF_FILTTIME GENMASK(6, 0)
#define MMA9553_REG_CONF_SPEED_STEP 0x0C
#define MMA9553_MASK_CONF_SPDPRD GENMASK(15, 8)
#define MMA9553_MASK_CONF_STEPCOALESCE GENMASK(7, 0)
#define MMA9553_REG_CONF_ACTTHD 0x0E
#define MMA9553_MAX_ACTTHD GENMASK(15, 0)
/* Pedometer status registers (R-only) */
#define MMA9553_REG_STATUS 0x00
#define MMA9553_MASK_STATUS_MRGFL BIT(15)
#define MMA9553_MASK_STATUS_SUSPCHG BIT(14)
#define MMA9553_MASK_STATUS_STEPCHG BIT(13)
#define MMA9553_MASK_STATUS_ACTCHG BIT(12)
#define MMA9553_MASK_STATUS_SUSP BIT(11)
#define MMA9553_MASK_STATUS_ACTIVITY GENMASK(10, 8)
#define MMA9553_MASK_STATUS_VERSION GENMASK(7, 0)
#define MMA9553_REG_STEPCNT 0x02
#define MMA9553_REG_DISTANCE 0x04
#define MMA9553_REG_SPEED 0x06
#define MMA9553_REG_CALORIES 0x08
#define MMA9553_REG_SLEEPCNT 0x0A
/* Pedometer events are always mapped to this pin. */
#define MMA9553_DEFAULT_GPIO_PIN mma9551_gpio6
#define MMA9553_DEFAULT_GPIO_POLARITY 0
/* Bitnum used for GPIO configuration = bit number in high status byte */
#define MMA9553_STATUS_TO_BITNUM(bit) (ffs(bit) - 9)
#define MMA9553_MAX_BITNUM MMA9553_STATUS_TO_BITNUM(BIT(16))
#define MMA9553_DEFAULT_SAMPLE_RATE 30 /* Hz */
/*
* The internal activity level must be stable for ACTTHD samples before
* ACTIVITY is updated. The ACTIVITY variable contains the current activity
* level and is updated every time a step is detected or once a second
* if there are no steps.
*/
#define MMA9553_ACTIVITY_THD_TO_SEC(thd) ((thd) / MMA9553_DEFAULT_SAMPLE_RATE)
#define MMA9553_ACTIVITY_SEC_TO_THD(sec) ((sec) * MMA9553_DEFAULT_SAMPLE_RATE)
/*
* Autonomously suspend pedometer if acceleration vector magnitude
* is near 1g (4096 at 0.244 mg/LSB resolution) for 30 seconds.
*/
#define MMA9553_DEFAULT_SLEEPMIN 3688 /* 0,9 g */
#define MMA9553_DEFAULT_SLEEPMAX 4508 /* 1,1 g */
#define MMA9553_DEFAULT_SLEEPTHD (MMA9553_DEFAULT_SAMPLE_RATE * 30)
#define MMA9553_CONFIG_RETRIES 2
/* Status register - activity field */
enum activity_level {
ACTIVITY_UNKNOWN,
ACTIVITY_REST,
ACTIVITY_WALKING,
ACTIVITY_JOGGING,
ACTIVITY_RUNNING,
};
static struct mma9553_event_info {
enum iio_chan_type type;
enum iio_modifier mod;
enum iio_event_direction dir;
} mma9553_events_info[] = {
{
.type = IIO_STEPS,
.mod = IIO_NO_MOD,
.dir = IIO_EV_DIR_NONE,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_STILL,
.dir = IIO_EV_DIR_RISING,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_STILL,
.dir = IIO_EV_DIR_FALLING,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_WALKING,
.dir = IIO_EV_DIR_RISING,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_WALKING,
.dir = IIO_EV_DIR_FALLING,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_JOGGING,
.dir = IIO_EV_DIR_RISING,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_JOGGING,
.dir = IIO_EV_DIR_FALLING,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_RUNNING,
.dir = IIO_EV_DIR_RISING,
},
{
.type = IIO_ACTIVITY,
.mod = IIO_MOD_RUNNING,
.dir = IIO_EV_DIR_FALLING,
},
};
#define MMA9553_EVENTS_INFO_SIZE ARRAY_SIZE(mma9553_events_info)
struct mma9553_event {
struct mma9553_event_info *info;
bool enabled;
};
struct mma9553_conf_regs {
u16 sleepmin;
u16 sleepmax;
u16 sleepthd;
u16 config;
u16 height_weight;
u16 filter;
u16 speed_step;
u16 actthd;
} __packed;
struct mma9553_data {
struct i2c_client *client;
/*
* 1. Serialize access to HW (requested by mma9551_core API).
* 2. Serialize sequences that power on/off the device and access HW.
*/
struct mutex mutex;
struct mma9553_conf_regs conf;
struct mma9553_event events[MMA9553_EVENTS_INFO_SIZE];
int num_events;
u8 gpio_bitnum;
/*
* This is used for all features that depend on step count:
* step count, distance, speed, calories.
*/
bool stepcnt_enabled;
u16 stepcnt;
u8 activity;
s64 timestamp;
};
static u8 mma9553_get_bits(u16 val, u16 mask)
{
return (val & mask) >> (ffs(mask) - 1);
}
static u16 mma9553_set_bits(u16 current_val, u16 val, u16 mask)
{
return (current_val & ~mask) | (val << (ffs(mask) - 1));
}
static enum iio_modifier mma9553_activity_to_mod(enum activity_level activity)
{
switch (activity) {
case ACTIVITY_RUNNING:
return IIO_MOD_RUNNING;
case ACTIVITY_JOGGING:
return IIO_MOD_JOGGING;
case ACTIVITY_WALKING:
return IIO_MOD_WALKING;
case ACTIVITY_REST:
return IIO_MOD_STILL;
case ACTIVITY_UNKNOWN:
default:
return IIO_NO_MOD;
}
}
static void mma9553_init_events(struct mma9553_data *data)
{
int i;
data->num_events = MMA9553_EVENTS_INFO_SIZE;
for (i = 0; i < data->num_events; i++) {
data->events[i].info = &mma9553_events_info[i];
data->events[i].enabled = false;
}
}
static struct mma9553_event *mma9553_get_event(struct mma9553_data *data,
enum iio_chan_type type,
enum iio_modifier mod,
enum iio_event_direction dir)
{
int i;
for (i = 0; i < data->num_events; i++)
if (data->events[i].info->type == type &&
data->events[i].info->mod == mod &&
data->events[i].info->dir == dir)
return &data->events[i];
return NULL;
}
static bool mma9553_is_any_event_enabled(struct mma9553_data *data,
bool check_type,
enum iio_chan_type type)
{
int i;
for (i = 0; i < data->num_events; i++)
if ((check_type && data->events[i].info->type == type &&
data->events[i].enabled) ||
(!check_type && data->events[i].enabled))
return true;
return false;
}
static int mma9553_set_config(struct mma9553_data *data, u16 reg,
u16 *p_reg_val, u16 val, u16 mask)
{
int ret, retries;
u16 reg_val, config;
reg_val = *p_reg_val;
if (val == mma9553_get_bits(reg_val, mask))
return 0;
reg_val = mma9553_set_bits(reg_val, val, mask);
ret = mma9551_write_config_word(data->client, MMA9551_APPID_PEDOMETER,
reg, reg_val);
if (ret < 0) {
dev_err(&data->client->dev,
"error writing config register 0x%x\n", reg);
return ret;
}
*p_reg_val = reg_val;
/* Reinitializes the pedometer with current configuration values */
config = mma9553_set_bits(data->conf.config, 1,
MMA9553_MASK_CONF_CONFIG);
ret = mma9551_write_config_word(data->client, MMA9551_APPID_PEDOMETER,
MMA9553_REG_CONF_CONF_STEPLEN, config);
if (ret < 0) {
dev_err(&data->client->dev,
"error writing config register 0x%x\n",
MMA9553_REG_CONF_CONF_STEPLEN);
return ret;
}
retries = MMA9553_CONFIG_RETRIES;
do {
mma9551_sleep(MMA9553_DEFAULT_SAMPLE_RATE);
ret = mma9551_read_config_word(data->client,
MMA9551_APPID_PEDOMETER,
MMA9553_REG_CONF_CONF_STEPLEN,
&config);
if (ret < 0)
return ret;
} while (mma9553_get_bits(config, MMA9553_MASK_CONF_CONFIG) &&
--retries > 0);
return 0;
}
static int mma9553_read_activity_stepcnt(struct mma9553_data *data,
u8 *activity, u16 *stepcnt)
{
u16 buf[2];
int ret;
ret = mma9551_read_status_words(data->client, MMA9551_APPID_PEDOMETER,
MMA9553_REG_STATUS, ARRAY_SIZE(buf),
buf);
if (ret < 0) {
dev_err(&data->client->dev,
"error reading status and stepcnt\n");
return ret;
}
*activity = mma9553_get_bits(buf[0], MMA9553_MASK_STATUS_ACTIVITY);
*stepcnt = buf[1];
return 0;
}
static int mma9553_conf_gpio(struct mma9553_data *data)
{
u8 bitnum = 0, appid = MMA9551_APPID_PEDOMETER;
int ret;
struct mma9553_event *ev_step_detect;
bool activity_enabled;
activity_enabled = mma9553_is_any_event_enabled(data, true,
IIO_ACTIVITY);
ev_step_detect = mma9553_get_event(data, IIO_STEPS, IIO_NO_MOD,
IIO_EV_DIR_NONE);
/*
* If both step detector and activity are enabled, use the MRGFL bit.
* This bit is the logical OR of the SUSPCHG, STEPCHG, and ACTCHG flags.
*/
if (activity_enabled && ev_step_detect->enabled)
bitnum = MMA9553_STATUS_TO_BITNUM(MMA9553_MASK_STATUS_MRGFL);
else if (ev_step_detect->enabled)
bitnum = MMA9553_STATUS_TO_BITNUM(MMA9553_MASK_STATUS_STEPCHG);
else if (activity_enabled)
bitnum = MMA9553_STATUS_TO_BITNUM(MMA9553_MASK_STATUS_ACTCHG);
else /* Reset */
appid = MMA9551_APPID_NONE;
if (data->gpio_bitnum == bitnum)
return 0;
/* Save initial values for activity and stepcnt */
if (activity_enabled || ev_step_detect->enabled) {
ret = mma9553_read_activity_stepcnt(data, &data->activity,
&data->stepcnt);
if (ret < 0)
return ret;
}
ret = mma9551_gpio_config(data->client, MMA9553_DEFAULT_GPIO_PIN, appid,
bitnum, MMA9553_DEFAULT_GPIO_POLARITY);
if (ret < 0)
return ret;
data->gpio_bitnum = bitnum;
return 0;
}
static int mma9553_init(struct mma9553_data *data)
{
int ret;
ret = mma9551_read_version(data->client);
if (ret)
return ret;
/*
* Read all the pedometer configuration registers. This is used as
* a device identification command to differentiate the MMA9553L
* from the MMA9550L.
*/
ret = mma9551_read_config_words(data->client, MMA9551_APPID_PEDOMETER,
MMA9553_REG_CONF_SLEEPMIN,
sizeof(data->conf) / sizeof(u16),
(u16 *)&data->conf);
if (ret < 0) {
dev_err(&data->client->dev,
"failed to read configuration registers\n");
return ret;
}
/* Reset GPIO */
data->gpio_bitnum = MMA9553_MAX_BITNUM;
ret = mma9553_conf_gpio(data);
if (ret < 0)
return ret;
ret = mma9551_app_reset(data->client, MMA9551_RSC_PED);
if (ret < 0)
return ret;
/* Init config registers */
data->conf.sleepmin = MMA9553_DEFAULT_SLEEPMIN;
data->conf.sleepmax = MMA9553_DEFAULT_SLEEPMAX;
data->conf.sleepthd = MMA9553_DEFAULT_SLEEPTHD;
data->conf.config = mma9553_set_bits(data->conf.config, 1,
MMA9553_MASK_CONF_CONFIG);
/*
* Clear the activity debounce counter when the activity level changes,
* so that the confidence level applies for any activity level.
*/
data->conf.config = mma9553_set_bits(data->conf.config, 1,
MMA9553_MASK_CONF_ACT_DBCNTM);
ret = mma9551_write_config_words(data->client, MMA9551_APPID_PEDOMETER,
MMA9553_REG_CONF_SLEEPMIN,
sizeof(data->conf) / sizeof(u16),
(u16 *)&data->conf);
if (ret < 0) {
dev_err(&data->client->dev,
"failed to write configuration registers\n");
return ret;
}
return mma9551_set_device_state(data->client, true);
}
static int mma9553_read_status_word(struct mma9553_data *data, u16 reg,
u16 *tmp)
{
bool powered_on;
int ret;
/*
* The HW only counts steps and other dependent
* parameters (speed, distance, calories, activity)
* if power is on (from enabling an event or the
* step counter).
*/
powered_on = mma9553_is_any_event_enabled(data, false, 0) ||
data->stepcnt_enabled;
if (!powered_on) {
dev_err(&data->client->dev, "No channels enabled\n");
return -EINVAL;
}
mutex_lock(&data->mutex);
ret = mma9551_read_status_word(data->client, MMA9551_APPID_PEDOMETER,
reg, tmp);
mutex_unlock(&data->mutex);
return ret;
}
static int mma9553_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma9553_data *data = iio_priv(indio_dev);
int ret;
u16 tmp;
u8 activity;
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
switch (chan->type) {
case IIO_STEPS:
ret = mma9553_read_status_word(data,
MMA9553_REG_STEPCNT,
&tmp);
if (ret < 0)
return ret;
*val = tmp;
return IIO_VAL_INT;
case IIO_DISTANCE:
ret = mma9553_read_status_word(data,
MMA9553_REG_DISTANCE,
&tmp);
if (ret < 0)
return ret;
*val = tmp;
return IIO_VAL_INT;
case IIO_ACTIVITY:
ret = mma9553_read_status_word(data,
MMA9553_REG_STATUS,
&tmp);
if (ret < 0)
return ret;
activity =
mma9553_get_bits(tmp, MMA9553_MASK_STATUS_ACTIVITY);
/*
* The device does not support confidence value levels,
* so we will always have 100% for current activity and
* 0% for the others.
*/
if (chan->channel2 == mma9553_activity_to_mod(activity))
*val = 100;
else
*val = 0;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_VELOCITY: /* m/h */
if (chan->channel2 != IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z)
return -EINVAL;
ret = mma9553_read_status_word(data,
MMA9553_REG_SPEED,
&tmp);
if (ret < 0)
return ret;
*val = tmp;
return IIO_VAL_INT;
case IIO_ENERGY: /* Cal or kcal */
ret = mma9553_read_status_word(data,
MMA9553_REG_CALORIES,
&tmp);
if (ret < 0)
return ret;
*val = tmp;
return IIO_VAL_INT;
case IIO_ACCEL:
mutex_lock(&data->mutex);
ret = mma9551_read_accel_chan(data->client,
chan, val, val2);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_VELOCITY: /* m/h to m/s */
if (chan->channel2 != IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z)
return -EINVAL;
*val = 0;
*val2 = 277; /* 0.000277 */
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ENERGY: /* Cal or kcal to J */
*val = 4184;
return IIO_VAL_INT;
case IIO_ACCEL:
return mma9551_read_accel_scale(val, val2);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_ENABLE:
*val = data->stepcnt_enabled;
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBHEIGHT:
tmp = mma9553_get_bits(data->conf.height_weight,
MMA9553_MASK_CONF_HEIGHT);
*val = tmp / 100; /* cm to m */
*val2 = (tmp % 100) * 10000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBWEIGHT:
*val = mma9553_get_bits(data->conf.height_weight,
MMA9553_MASK_CONF_WEIGHT);
return IIO_VAL_INT;
case IIO_CHAN_INFO_DEBOUNCE_COUNT:
switch (chan->type) {
case IIO_STEPS:
*val = mma9553_get_bits(data->conf.filter,
MMA9553_MASK_CONF_FILTSTEP);
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_DEBOUNCE_TIME:
switch (chan->type) {
case IIO_STEPS:
*val = mma9553_get_bits(data->conf.filter,
MMA9553_MASK_CONF_FILTTIME);
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_INT_TIME:
switch (chan->type) {
case IIO_VELOCITY:
if (chan->channel2 != IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z)
return -EINVAL;
*val = mma9553_get_bits(data->conf.speed_step,
MMA9553_MASK_CONF_SPDPRD);
return IIO_VAL_INT;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma9553_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct mma9553_data *data = iio_priv(indio_dev);
int ret, tmp;
switch (mask) {
case IIO_CHAN_INFO_ENABLE:
if (data->stepcnt_enabled == !!val)
return 0;
mutex_lock(&data->mutex);
ret = mma9551_set_power_state(data->client, val);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
data->stepcnt_enabled = val;
mutex_unlock(&data->mutex);
return 0;
case IIO_CHAN_INFO_CALIBHEIGHT:
/* m to cm */
tmp = val * 100 + val2 / 10000;
if (tmp < 0 || tmp > 255)
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data,
MMA9553_REG_CONF_HEIGHT_WEIGHT,
&data->conf.height_weight,
tmp, MMA9553_MASK_CONF_HEIGHT);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_CALIBWEIGHT:
if (val < 0 || val > 255)
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data,
MMA9553_REG_CONF_HEIGHT_WEIGHT,
&data->conf.height_weight,
val, MMA9553_MASK_CONF_WEIGHT);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_DEBOUNCE_COUNT:
switch (chan->type) {
case IIO_STEPS:
/*
* Set to 0 to disable step filtering. If the value
* specified is greater than 6, then 6 will be used.
*/
if (val < 0)
return -EINVAL;
if (val > 6)
val = 6;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data, MMA9553_REG_CONF_FILTER,
&data->conf.filter, val,
MMA9553_MASK_CONF_FILTSTEP);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_DEBOUNCE_TIME:
switch (chan->type) {
case IIO_STEPS:
if (val < 0 || val > 127)
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data, MMA9553_REG_CONF_FILTER,
&data->conf.filter, val,
MMA9553_MASK_CONF_FILTTIME);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_INT_TIME:
switch (chan->type) {
case IIO_VELOCITY:
if (chan->channel2 != IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z)
return -EINVAL;
/*
* If set to a value greater than 5, then 5 will be
* used. Warning: Do not set SPDPRD to 0 or 1 as
* this may cause undesirable behavior.
*/
if (val < 2)
return -EINVAL;
if (val > 5)
val = 5;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data,
MMA9553_REG_CONF_SPEED_STEP,
&data->conf.speed_step, val,
MMA9553_MASK_CONF_SPDPRD);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma9553_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct mma9553_data *data = iio_priv(indio_dev);
struct mma9553_event *event;
event = mma9553_get_event(data, chan->type, chan->channel2, dir);
if (!event)
return -EINVAL;
return event->enabled;
}
static int mma9553_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir, int state)
{
struct mma9553_data *data = iio_priv(indio_dev);
struct mma9553_event *event;
int ret;
event = mma9553_get_event(data, chan->type, chan->channel2, dir);
if (!event)
return -EINVAL;
if (event->enabled == state)
return 0;
mutex_lock(&data->mutex);
ret = mma9551_set_power_state(data->client, state);
if (ret < 0)
goto err_out;
event->enabled = state;
ret = mma9553_conf_gpio(data);
if (ret < 0)
goto err_conf_gpio;
mutex_unlock(&data->mutex);
return 0;
err_conf_gpio:
if (state) {
event->enabled = false;
mma9551_set_power_state(data->client, false);
}
err_out:
mutex_unlock(&data->mutex);
return ret;
}
static int mma9553_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct mma9553_data *data = iio_priv(indio_dev);
*val2 = 0;
switch (info) {
case IIO_EV_INFO_VALUE:
switch (chan->type) {
case IIO_STEPS:
*val = mma9553_get_bits(data->conf.speed_step,
MMA9553_MASK_CONF_STEPCOALESCE);
return IIO_VAL_INT;
case IIO_ACTIVITY:
/*
* The device does not support confidence value levels.
* We set an average of 50%.
*/
*val = 50;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_EV_INFO_PERIOD:
switch (chan->type) {
case IIO_ACTIVITY:
*val = MMA9553_ACTIVITY_THD_TO_SEC(data->conf.actthd);
return IIO_VAL_INT;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma9553_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct mma9553_data *data = iio_priv(indio_dev);
int ret;
switch (info) {
case IIO_EV_INFO_VALUE:
switch (chan->type) {
case IIO_STEPS:
if (val < 0 || val > 255)
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data,
MMA9553_REG_CONF_SPEED_STEP,
&data->conf.speed_step, val,
MMA9553_MASK_CONF_STEPCOALESCE);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_EV_INFO_PERIOD:
switch (chan->type) {
case IIO_ACTIVITY:
if (val < 0 || val > MMA9553_ACTIVITY_THD_TO_SEC(
MMA9553_MAX_ACTTHD))
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data, MMA9553_REG_CONF_ACTTHD,
&data->conf.actthd,
MMA9553_ACTIVITY_SEC_TO_THD
(val), MMA9553_MASK_CONF_WORD);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma9553_get_calibgender_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct mma9553_data *data = iio_priv(indio_dev);
u8 gender;
gender = mma9553_get_bits(data->conf.filter, MMA9553_MASK_CONF_MALE);
/*
* HW expects 0 for female and 1 for male,
* while iio index is 0 for male and 1 for female.
*/
return !gender;
}
static int mma9553_set_calibgender_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
unsigned int mode)
{
struct mma9553_data *data = iio_priv(indio_dev);
u8 gender = !mode;
int ret;
if ((mode != 0) && (mode != 1))
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9553_set_config(data, MMA9553_REG_CONF_FILTER,
&data->conf.filter, gender,
MMA9553_MASK_CONF_MALE);
mutex_unlock(&data->mutex);
return ret;
}
static const struct iio_event_spec mma9553_step_event = {
.type = IIO_EV_TYPE_CHANGE,
.dir = IIO_EV_DIR_NONE,
.mask_separate = BIT(IIO_EV_INFO_ENABLE) | BIT(IIO_EV_INFO_VALUE),
};
static const struct iio_event_spec mma9553_activity_events[] = {
{
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD),
},
{
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_FALLING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD),
},
};
static const char * const mma9553_calibgender_modes[] = { "male", "female" };
static const struct iio_enum mma9553_calibgender_enum = {
.items = mma9553_calibgender_modes,
.num_items = ARRAY_SIZE(mma9553_calibgender_modes),
.get = mma9553_get_calibgender_mode,
.set = mma9553_set_calibgender_mode,
};
static const struct iio_chan_spec_ext_info mma9553_ext_info[] = {
IIO_ENUM("calibgender", IIO_SHARED_BY_TYPE, &mma9553_calibgender_enum),
IIO_ENUM_AVAILABLE("calibgender", IIO_SHARED_BY_TYPE, &mma9553_calibgender_enum),
{},
};
#define MMA9553_PEDOMETER_CHANNEL(_type, _mask) { \
.type = _type, \
.info_mask_separate = BIT(IIO_CHAN_INFO_ENABLE) | \
BIT(IIO_CHAN_INFO_CALIBHEIGHT) | \
_mask, \
.ext_info = mma9553_ext_info, \
}
#define MMA9553_ACTIVITY_CHANNEL(_chan2) { \
.type = IIO_ACTIVITY, \
.modified = 1, \
.channel2 = _chan2, \
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBHEIGHT) | \
BIT(IIO_CHAN_INFO_ENABLE), \
.event_spec = mma9553_activity_events, \
.num_event_specs = ARRAY_SIZE(mma9553_activity_events), \
.ext_info = mma9553_ext_info, \
}
static const struct iio_chan_spec mma9553_channels[] = {
MMA9551_ACCEL_CHANNEL(IIO_MOD_X),
MMA9551_ACCEL_CHANNEL(IIO_MOD_Y),
MMA9551_ACCEL_CHANNEL(IIO_MOD_Z),
{
.type = IIO_STEPS,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_ENABLE) |
BIT(IIO_CHAN_INFO_DEBOUNCE_COUNT) |
BIT(IIO_CHAN_INFO_DEBOUNCE_TIME),
.event_spec = &mma9553_step_event,
.num_event_specs = 1,
},
MMA9553_PEDOMETER_CHANNEL(IIO_DISTANCE, BIT(IIO_CHAN_INFO_PROCESSED)),
{
.type = IIO_VELOCITY,
.modified = 1,
.channel2 = IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_INT_TIME) |
BIT(IIO_CHAN_INFO_ENABLE),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBHEIGHT),
.ext_info = mma9553_ext_info,
},
MMA9553_PEDOMETER_CHANNEL(IIO_ENERGY, BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_CALIBWEIGHT)),
MMA9553_ACTIVITY_CHANNEL(IIO_MOD_RUNNING),
MMA9553_ACTIVITY_CHANNEL(IIO_MOD_JOGGING),
MMA9553_ACTIVITY_CHANNEL(IIO_MOD_WALKING),
MMA9553_ACTIVITY_CHANNEL(IIO_MOD_STILL),
};
static const struct iio_info mma9553_info = {
.read_raw = mma9553_read_raw,
.write_raw = mma9553_write_raw,
.read_event_config = mma9553_read_event_config,
.write_event_config = mma9553_write_event_config,
.read_event_value = mma9553_read_event_value,
.write_event_value = mma9553_write_event_value,
};
static irqreturn_t mma9553_irq_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct mma9553_data *data = iio_priv(indio_dev);
data->timestamp = iio_get_time_ns(indio_dev);
/*
* Since we only configure the interrupt pin when an
* event is enabled, we are sure we have at least
* one event enabled at this point.
*/
return IRQ_WAKE_THREAD;
}
static irqreturn_t mma9553_event_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct mma9553_data *data = iio_priv(indio_dev);
u16 stepcnt;
u8 activity;
struct mma9553_event *ev_activity, *ev_prev_activity, *ev_step_detect;
int ret;
mutex_lock(&data->mutex);
ret = mma9553_read_activity_stepcnt(data, &activity, &stepcnt);
if (ret < 0) {
mutex_unlock(&data->mutex);
return IRQ_HANDLED;
}
ev_prev_activity = mma9553_get_event(data, IIO_ACTIVITY,
mma9553_activity_to_mod(
data->activity),
IIO_EV_DIR_FALLING);
ev_activity = mma9553_get_event(data, IIO_ACTIVITY,
mma9553_activity_to_mod(activity),
IIO_EV_DIR_RISING);
ev_step_detect = mma9553_get_event(data, IIO_STEPS, IIO_NO_MOD,
IIO_EV_DIR_NONE);
if (ev_step_detect->enabled && (stepcnt != data->stepcnt)) {
data->stepcnt = stepcnt;
iio_push_event(indio_dev,
IIO_EVENT_CODE(IIO_STEPS, 0, IIO_NO_MOD,
IIO_EV_DIR_NONE,
IIO_EV_TYPE_CHANGE, 0, 0, 0),
data->timestamp);
}
if (activity != data->activity) {
data->activity = activity;
/* ev_activity can be NULL if activity == ACTIVITY_UNKNOWN */
if (ev_prev_activity && ev_prev_activity->enabled)
iio_push_event(indio_dev,
IIO_EVENT_CODE(IIO_ACTIVITY, 0,
ev_prev_activity->info->mod,
IIO_EV_DIR_FALLING,
IIO_EV_TYPE_THRESH, 0, 0,
0),
data->timestamp);
if (ev_activity && ev_activity->enabled)
iio_push_event(indio_dev,
IIO_EVENT_CODE(IIO_ACTIVITY, 0,
ev_activity->info->mod,
IIO_EV_DIR_RISING,
IIO_EV_TYPE_THRESH, 0, 0,
0),
data->timestamp);
}
mutex_unlock(&data->mutex);
return IRQ_HANDLED;
}
static const char *mma9553_match_acpi_device(struct device *dev)
{
const struct acpi_device_id *id;
id = acpi_match_device(dev->driver->acpi_match_table, dev);
if (!id)
return NULL;
return dev_name(dev);
}
static int mma9553_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct mma9553_data *data;
struct iio_dev *indio_dev;
const char *name = NULL;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
if (id)
name = id->name;
else if (ACPI_HANDLE(&client->dev))
name = mma9553_match_acpi_device(&client->dev);
else
return -ENOSYS;
mutex_init(&data->mutex);
mma9553_init_events(data);
ret = mma9553_init(data);
if (ret < 0)
return ret;
indio_dev->channels = mma9553_channels;
indio_dev->num_channels = ARRAY_SIZE(mma9553_channels);
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mma9553_info;
if (client->irq > 0) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
mma9553_irq_handler,
mma9553_event_handler,
IRQF_TRIGGER_RISING,
MMA9553_IRQ_NAME, indio_dev);
if (ret < 0) {
dev_err(&client->dev, "request irq %d failed\n",
client->irq);
goto out_poweroff;
}
}
ret = pm_runtime_set_active(&client->dev);
if (ret < 0)
goto out_poweroff;
pm_runtime_enable(&client->dev);
pm_runtime_set_autosuspend_delay(&client->dev,
MMA9551_AUTO_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(&client->dev);
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "unable to register iio device\n");
goto err_pm_cleanup;
}
dev_dbg(&indio_dev->dev, "Registered device %s\n", name);
return 0;
err_pm_cleanup:
pm_runtime_dont_use_autosuspend(&client->dev);
pm_runtime_disable(&client->dev);
out_poweroff:
mma9551_set_device_state(client, false);
return ret;
}
static void mma9553_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct mma9553_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(&client->dev);
pm_runtime_set_suspended(&client->dev);
mutex_lock(&data->mutex);
mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
}
static int mma9553_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9553_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
if (ret < 0) {
dev_err(&data->client->dev, "powering off device failed\n");
return -EAGAIN;
}
return 0;
}
static int mma9553_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9553_data *data = iio_priv(indio_dev);
int ret;
ret = mma9551_set_device_state(data->client, true);
if (ret < 0)
return ret;
mma9551_sleep(MMA9553_DEFAULT_SAMPLE_RATE);
return 0;
}
static int mma9553_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9553_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
return ret;
}
static int mma9553_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9553_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, true);
mutex_unlock(&data->mutex);
return ret;
}
static const struct dev_pm_ops mma9553_pm_ops = {
SYSTEM_SLEEP_PM_OPS(mma9553_suspend, mma9553_resume)
RUNTIME_PM_OPS(mma9553_runtime_suspend, mma9553_runtime_resume, NULL)
};
static const struct acpi_device_id mma9553_acpi_match[] = {
{"MMA9553", 0},
{},
};
MODULE_DEVICE_TABLE(acpi, mma9553_acpi_match);
static const struct i2c_device_id mma9553_id[] = {
{"mma9553", 0},
{},
};
MODULE_DEVICE_TABLE(i2c, mma9553_id);
static struct i2c_driver mma9553_driver = {
.driver = {
.name = MMA9553_DRV_NAME,
.acpi_match_table = ACPI_PTR(mma9553_acpi_match),
.pm = pm_ptr(&mma9553_pm_ops),
},
.probe = mma9553_probe,
.remove = mma9553_remove,
.id_table = mma9553_id,
};
module_i2c_driver(mma9553_driver);
MODULE_AUTHOR("Irina Tirdea <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("MMA9553L pedometer platform driver");
MODULE_IMPORT_NS(IIO_MMA9551);
| linux-master | drivers/iio/accel/mma9553.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* kxsd9.c simple support for the Kionix KXSD9 3D
* accelerometer.
*
* Copyright (c) 2008-2009 Jonathan Cameron <[email protected]>
*
* The i2c interface is very similar, so shouldn't be a problem once
* I have a suitable wire made up.
*
* TODO: Support the motion detector
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/regulator/consumer.h>
#include <linux/pm_runtime.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include "kxsd9.h"
#define KXSD9_REG_X 0x00
#define KXSD9_REG_Y 0x02
#define KXSD9_REG_Z 0x04
#define KXSD9_REG_AUX 0x06
#define KXSD9_REG_RESET 0x0a
#define KXSD9_REG_CTRL_C 0x0c
#define KXSD9_CTRL_C_FS_MASK 0x03
#define KXSD9_CTRL_C_FS_8G 0x00
#define KXSD9_CTRL_C_FS_6G 0x01
#define KXSD9_CTRL_C_FS_4G 0x02
#define KXSD9_CTRL_C_FS_2G 0x03
#define KXSD9_CTRL_C_MOT_LAT BIT(3)
#define KXSD9_CTRL_C_MOT_LEV BIT(4)
#define KXSD9_CTRL_C_LP_MASK 0xe0
#define KXSD9_CTRL_C_LP_NONE 0x00
#define KXSD9_CTRL_C_LP_2000HZC BIT(5)
#define KXSD9_CTRL_C_LP_2000HZB BIT(6)
#define KXSD9_CTRL_C_LP_2000HZA (BIT(5)|BIT(6))
#define KXSD9_CTRL_C_LP_1000HZ BIT(7)
#define KXSD9_CTRL_C_LP_500HZ (BIT(7)|BIT(5))
#define KXSD9_CTRL_C_LP_100HZ (BIT(7)|BIT(6))
#define KXSD9_CTRL_C_LP_50HZ (BIT(7)|BIT(6)|BIT(5))
#define KXSD9_REG_CTRL_B 0x0d
#define KXSD9_CTRL_B_CLK_HLD BIT(7)
#define KXSD9_CTRL_B_ENABLE BIT(6)
#define KXSD9_CTRL_B_ST BIT(5) /* Self-test */
#define KXSD9_REG_CTRL_A 0x0e
/**
* struct kxsd9_state - device related storage
* @dev: pointer to the parent device
* @map: regmap to the device
* @orientation: mounting matrix, flipped axis etc
* @regs: regulators for this device, VDD and IOVDD
* @scale: the current scaling setting
*/
struct kxsd9_state {
struct device *dev;
struct regmap *map;
struct iio_mount_matrix orientation;
struct regulator_bulk_data regs[2];
u8 scale;
};
#define KXSD9_SCALE_2G "0.011978"
#define KXSD9_SCALE_4G "0.023927"
#define KXSD9_SCALE_6G "0.035934"
#define KXSD9_SCALE_8G "0.047853"
/* reverse order */
static const int kxsd9_micro_scales[4] = { 47853, 35934, 23927, 11978 };
#define KXSD9_ZERO_G_OFFSET -2048
/*
* Regulator names
*/
static const char kxsd9_reg_vdd[] = "vdd";
static const char kxsd9_reg_iovdd[] = "iovdd";
static int kxsd9_write_scale(struct iio_dev *indio_dev, int micro)
{
int ret, i;
struct kxsd9_state *st = iio_priv(indio_dev);
bool foundit = false;
for (i = 0; i < 4; i++)
if (micro == kxsd9_micro_scales[i]) {
foundit = true;
break;
}
if (!foundit)
return -EINVAL;
ret = regmap_update_bits(st->map,
KXSD9_REG_CTRL_C,
KXSD9_CTRL_C_FS_MASK,
i);
if (ret < 0)
goto error_ret;
/* Cached scale when the sensor is powered down */
st->scale = i;
error_ret:
return ret;
}
static IIO_CONST_ATTR(accel_scale_available,
KXSD9_SCALE_2G " "
KXSD9_SCALE_4G " "
KXSD9_SCALE_6G " "
KXSD9_SCALE_8G);
static struct attribute *kxsd9_attributes[] = {
&iio_const_attr_accel_scale_available.dev_attr.attr,
NULL,
};
static int kxsd9_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
int ret = -EINVAL;
struct kxsd9_state *st = iio_priv(indio_dev);
pm_runtime_get_sync(st->dev);
if (mask == IIO_CHAN_INFO_SCALE) {
/* Check no integer component */
if (val)
return -EINVAL;
ret = kxsd9_write_scale(indio_dev, val2);
}
pm_runtime_mark_last_busy(st->dev);
pm_runtime_put_autosuspend(st->dev);
return ret;
}
static int kxsd9_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret = -EINVAL;
struct kxsd9_state *st = iio_priv(indio_dev);
unsigned int regval;
__be16 raw_val;
u16 nval;
pm_runtime_get_sync(st->dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = regmap_bulk_read(st->map, chan->address, &raw_val,
sizeof(raw_val));
if (ret)
goto error_ret;
nval = be16_to_cpu(raw_val);
/* Only 12 bits are valid */
nval >>= 4;
*val = nval;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_OFFSET:
/* This has a bias of -2048 */
*val = KXSD9_ZERO_G_OFFSET;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
ret = regmap_read(st->map,
KXSD9_REG_CTRL_C,
®val);
if (ret < 0)
goto error_ret;
*val = 0;
*val2 = kxsd9_micro_scales[regval & KXSD9_CTRL_C_FS_MASK];
ret = IIO_VAL_INT_PLUS_MICRO;
break;
}
error_ret:
pm_runtime_mark_last_busy(st->dev);
pm_runtime_put_autosuspend(st->dev);
return ret;
};
static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
{
const struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct kxsd9_state *st = iio_priv(indio_dev);
/*
* Ensure correct positioning and alignment of timestamp.
* No need to zero initialize as all elements written.
*/
struct {
__be16 chan[4];
s64 ts __aligned(8);
} hw_values;
int ret;
ret = regmap_bulk_read(st->map,
KXSD9_REG_X,
hw_values.chan,
sizeof(hw_values.chan));
if (ret) {
dev_err(st->dev, "error reading data: %d\n", ret);
goto out;
}
iio_push_to_buffers_with_timestamp(indio_dev,
&hw_values,
iio_get_time_ns(indio_dev));
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int kxsd9_buffer_preenable(struct iio_dev *indio_dev)
{
struct kxsd9_state *st = iio_priv(indio_dev);
pm_runtime_get_sync(st->dev);
return 0;
}
static int kxsd9_buffer_postdisable(struct iio_dev *indio_dev)
{
struct kxsd9_state *st = iio_priv(indio_dev);
pm_runtime_mark_last_busy(st->dev);
pm_runtime_put_autosuspend(st->dev);
return 0;
}
static const struct iio_buffer_setup_ops kxsd9_buffer_setup_ops = {
.preenable = kxsd9_buffer_preenable,
.postdisable = kxsd9_buffer_postdisable,
};
static const struct iio_mount_matrix *
kxsd9_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct kxsd9_state *st = iio_priv(indio_dev);
return &st->orientation;
}
static const struct iio_chan_spec_ext_info kxsd9_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxsd9_get_mount_matrix),
{ },
};
#define KXSD9_ACCEL_CHAN(axis, index) \
{ \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OFFSET), \
.ext_info = kxsd9_ext_info, \
.address = KXSD9_REG_##axis, \
.scan_index = index, \
.scan_type = { \
.sign = 'u', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec kxsd9_channels[] = {
KXSD9_ACCEL_CHAN(X, 0),
KXSD9_ACCEL_CHAN(Y, 1),
KXSD9_ACCEL_CHAN(Z, 2),
{
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.indexed = 1,
.address = KXSD9_REG_AUX,
.scan_index = 3,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
.shift = 4,
.endianness = IIO_BE,
},
},
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct attribute_group kxsd9_attribute_group = {
.attrs = kxsd9_attributes,
};
static int kxsd9_power_up(struct kxsd9_state *st)
{
int ret;
/* Enable the regulators */
ret = regulator_bulk_enable(ARRAY_SIZE(st->regs), st->regs);
if (ret) {
dev_err(st->dev, "Cannot enable regulators\n");
return ret;
}
/* Power up */
ret = regmap_write(st->map,
KXSD9_REG_CTRL_B,
KXSD9_CTRL_B_ENABLE);
if (ret)
return ret;
/*
* Set 1000Hz LPF, 2g fullscale, motion wakeup threshold 1g,
* latched wakeup
*/
ret = regmap_write(st->map,
KXSD9_REG_CTRL_C,
KXSD9_CTRL_C_LP_1000HZ |
KXSD9_CTRL_C_MOT_LEV |
KXSD9_CTRL_C_MOT_LAT |
st->scale);
if (ret)
return ret;
/*
* Power-up time depends on the LPF setting, but typ 15.9 ms, let's
* set 20 ms to allow for some slack.
*/
msleep(20);
return 0;
};
static int kxsd9_power_down(struct kxsd9_state *st)
{
int ret;
/*
* Set into low power mode - since there may be more users of the
* regulators this is the first step of the power saving: it will
* make sure we conserve power even if there are others users on the
* regulators.
*/
ret = regmap_update_bits(st->map,
KXSD9_REG_CTRL_B,
KXSD9_CTRL_B_ENABLE,
0);
if (ret)
return ret;
/* Disable the regulators */
ret = regulator_bulk_disable(ARRAY_SIZE(st->regs), st->regs);
if (ret) {
dev_err(st->dev, "Cannot disable regulators\n");
return ret;
}
return 0;
}
static const struct iio_info kxsd9_info = {
.read_raw = &kxsd9_read_raw,
.write_raw = &kxsd9_write_raw,
.attrs = &kxsd9_attribute_group,
};
/* Four channels apart from timestamp, scan mask = 0x0f */
static const unsigned long kxsd9_scan_masks[] = { 0xf, 0 };
int kxsd9_common_probe(struct device *dev,
struct regmap *map,
const char *name)
{
struct iio_dev *indio_dev;
struct kxsd9_state *st;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->dev = dev;
st->map = map;
indio_dev->channels = kxsd9_channels;
indio_dev->num_channels = ARRAY_SIZE(kxsd9_channels);
indio_dev->name = name;
indio_dev->info = &kxsd9_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->available_scan_masks = kxsd9_scan_masks;
/* Read the mounting matrix, if present */
ret = iio_read_mount_matrix(dev, &st->orientation);
if (ret)
return ret;
/* Fetch and turn on regulators */
st->regs[0].supply = kxsd9_reg_vdd;
st->regs[1].supply = kxsd9_reg_iovdd;
ret = devm_regulator_bulk_get(dev,
ARRAY_SIZE(st->regs),
st->regs);
if (ret) {
dev_err(dev, "Cannot get regulators\n");
return ret;
}
/* Default scaling */
st->scale = KXSD9_CTRL_C_FS_2G;
kxsd9_power_up(st);
ret = iio_triggered_buffer_setup(indio_dev,
iio_pollfunc_store_time,
kxsd9_trigger_handler,
&kxsd9_buffer_setup_ops);
if (ret) {
dev_err(dev, "triggered buffer setup failed\n");
goto err_power_down;
}
ret = iio_device_register(indio_dev);
if (ret)
goto err_cleanup_buffer;
dev_set_drvdata(dev, indio_dev);
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
/*
* Set autosuspend to two orders of magnitude larger than the
* start-up time. 20ms start-up time means 2000ms autosuspend,
* i.e. 2 seconds.
*/
pm_runtime_set_autosuspend_delay(dev, 2000);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
return 0;
err_cleanup_buffer:
iio_triggered_buffer_cleanup(indio_dev);
err_power_down:
kxsd9_power_down(st);
return ret;
}
EXPORT_SYMBOL_NS(kxsd9_common_probe, IIO_KXSD9);
void kxsd9_common_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct kxsd9_state *st = iio_priv(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_get_sync(dev);
pm_runtime_put_noidle(dev);
pm_runtime_disable(dev);
kxsd9_power_down(st);
}
EXPORT_SYMBOL_NS(kxsd9_common_remove, IIO_KXSD9);
static int kxsd9_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct kxsd9_state *st = iio_priv(indio_dev);
return kxsd9_power_down(st);
}
static int kxsd9_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct kxsd9_state *st = iio_priv(indio_dev);
return kxsd9_power_up(st);
}
EXPORT_NS_RUNTIME_DEV_PM_OPS(kxsd9_dev_pm_ops, kxsd9_runtime_suspend,
kxsd9_runtime_resume, NULL, IIO_KXSD9);
MODULE_AUTHOR("Jonathan Cameron <[email protected]>");
MODULE_DESCRIPTION("Kionix KXSD9 driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/kxsd9.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2022 ROHM Semiconductors
*
* ROHM/KIONIX KX022A accelerometer driver
*/
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "kionix-kx022a.h"
static int kx022a_spi_probe(struct spi_device *spi)
{
struct device *dev = &spi->dev;
struct regmap *regmap;
if (!spi->irq) {
dev_err(dev, "No IRQ configured\n");
return -EINVAL;
}
regmap = devm_regmap_init_spi(spi, &kx022a_regmap);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap),
"Failed to initialize Regmap\n");
return kx022a_probe_internal(dev);
}
static const struct spi_device_id kx022a_id[] = {
{ "kx022a" },
{ }
};
MODULE_DEVICE_TABLE(spi, kx022a_id);
static const struct of_device_id kx022a_of_match[] = {
{ .compatible = "kionix,kx022a", },
{ }
};
MODULE_DEVICE_TABLE(of, kx022a_of_match);
static struct spi_driver kx022a_spi_driver = {
.driver = {
.name = "kx022a-spi",
.of_match_table = kx022a_of_match,
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
.probe = kx022a_spi_probe,
.id_table = kx022a_id,
};
module_spi_driver(kx022a_spi_driver);
MODULE_DESCRIPTION("ROHM/Kionix kx022A accelerometer driver");
MODULE_AUTHOR("Matti Vaittinen <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_KX022A);
| linux-master | drivers/iio/accel/kionix-kx022a-spi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* 3-axis accelerometer driver supporting SPI Bosch-Sensortec accelerometer chip
* Copyright © 2015 Pengutronix, Markus Pargmann <[email protected]>
*/
#include <linux/device.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "bmc150-accel.h"
static int bmc150_accel_probe(struct spi_device *spi)
{
struct regmap *regmap;
const char *name = NULL;
enum bmc150_type type = BOSCH_UNKNOWN;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init_spi(spi, &bmc150_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to initialize spi regmap\n");
return PTR_ERR(regmap);
}
if (id) {
name = id->name;
type = id->driver_data;
}
return bmc150_accel_core_probe(&spi->dev, regmap, spi->irq, type, name,
true);
}
static void bmc150_accel_remove(struct spi_device *spi)
{
bmc150_accel_core_remove(&spi->dev);
}
static const struct acpi_device_id bmc150_accel_acpi_match[] = {
{"BMA0255"},
{"BMA0280"},
{"BMA222"},
{"BMA222E"},
{"BMA250E"},
{"BMC150A"},
{"BMI055A"},
{"BSBA0150"},
{ },
};
MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
static const struct spi_device_id bmc150_accel_id[] = {
{"bma222"},
{"bma222e"},
{"bma250e"},
{"bma253"},
{"bma255"},
{"bma280"},
{"bmc150_accel"},
{"bmc156_accel", BOSCH_BMC156},
{"bmi055_accel"},
{}
};
MODULE_DEVICE_TABLE(spi, bmc150_accel_id);
static struct spi_driver bmc150_accel_driver = {
.driver = {
.name = "bmc150_accel_spi",
.acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
.pm = &bmc150_accel_pm_ops,
},
.probe = bmc150_accel_probe,
.remove = bmc150_accel_remove,
.id_table = bmc150_accel_id,
};
module_spi_driver(bmc150_accel_driver);
MODULE_AUTHOR("Markus Pargmann <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMC150 SPI accelerometer driver");
MODULE_IMPORT_NS(IIO_BMC150);
| linux-master | drivers/iio/accel/bmc150-accel-spi.c |
// SPDX-License-Identifier: GPL-2.0
/*
* NXP FXLS8962AF/FXLS8964AF Accelerometer SPI Driver
*
* Copyright 2021 Connected Cars A/S
*/
#include <linux/dev_printk.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/spi/spi.h>
#include <linux/regmap.h>
#include "fxls8962af.h"
static int fxls8962af_probe(struct spi_device *spi)
{
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &fxls8962af_spi_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to initialize spi regmap\n");
return PTR_ERR(regmap);
}
return fxls8962af_core_probe(&spi->dev, regmap, spi->irq);
}
static const struct of_device_id fxls8962af_spi_of_match[] = {
{ .compatible = "nxp,fxls8962af" },
{ .compatible = "nxp,fxls8964af" },
{}
};
MODULE_DEVICE_TABLE(of, fxls8962af_spi_of_match);
static const struct spi_device_id fxls8962af_spi_id_table[] = {
{ "fxls8962af", fxls8962af },
{ "fxls8964af", fxls8964af },
{}
};
MODULE_DEVICE_TABLE(spi, fxls8962af_spi_id_table);
static struct spi_driver fxls8962af_driver = {
.driver = {
.name = "fxls8962af_spi",
.pm = pm_ptr(&fxls8962af_pm_ops),
.of_match_table = fxls8962af_spi_of_match,
},
.probe = fxls8962af_probe,
.id_table = fxls8962af_spi_id_table,
};
module_spi_driver(fxls8962af_driver);
MODULE_AUTHOR("Sean Nyekjaer <[email protected]>");
MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_FXLS8962AF);
| linux-master | drivers/iio/accel/fxls8962af-spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* 3-axis accelerometer driver for MXC4005XC Memsic sensor
*
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/acpi.h>
#include <linux/regmap.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define MXC4005_DRV_NAME "mxc4005"
#define MXC4005_IRQ_NAME "mxc4005_event"
#define MXC4005_REGMAP_NAME "mxc4005_regmap"
#define MXC4005_REG_XOUT_UPPER 0x03
#define MXC4005_REG_XOUT_LOWER 0x04
#define MXC4005_REG_YOUT_UPPER 0x05
#define MXC4005_REG_YOUT_LOWER 0x06
#define MXC4005_REG_ZOUT_UPPER 0x07
#define MXC4005_REG_ZOUT_LOWER 0x08
#define MXC4005_REG_INT_MASK1 0x0B
#define MXC4005_REG_INT_MASK1_BIT_DRDYE 0x01
#define MXC4005_REG_INT_CLR1 0x01
#define MXC4005_REG_INT_CLR1_BIT_DRDYC 0x01
#define MXC4005_REG_CONTROL 0x0D
#define MXC4005_REG_CONTROL_MASK_FSR GENMASK(6, 5)
#define MXC4005_CONTROL_FSR_SHIFT 5
#define MXC4005_REG_DEVICE_ID 0x0E
enum mxc4005_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
};
enum mxc4005_range {
MXC4005_RANGE_2G,
MXC4005_RANGE_4G,
MXC4005_RANGE_8G,
};
struct mxc4005_data {
struct device *dev;
struct mutex mutex;
struct regmap *regmap;
struct iio_trigger *dready_trig;
/* Ensure timestamp is naturally aligned */
struct {
__be16 chans[3];
s64 timestamp __aligned(8);
} scan;
bool trigger_enabled;
};
/*
* MXC4005 can operate in the following ranges:
* +/- 2G, 4G, 8G (the default +/-2G)
*
* (2 + 2) * 9.81 / (2^12 - 1) = 0.009582
* (4 + 4) * 9.81 / (2^12 - 1) = 0.019164
* (8 + 8) * 9.81 / (2^12 - 1) = 0.038329
*/
static const struct {
u8 range;
int scale;
} mxc4005_scale_table[] = {
{MXC4005_RANGE_2G, 9582},
{MXC4005_RANGE_4G, 19164},
{MXC4005_RANGE_8G, 38329},
};
static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019164 0.038329");
static struct attribute *mxc4005_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group mxc4005_attrs_group = {
.attrs = mxc4005_attributes,
};
static bool mxc4005_is_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MXC4005_REG_XOUT_UPPER:
case MXC4005_REG_XOUT_LOWER:
case MXC4005_REG_YOUT_UPPER:
case MXC4005_REG_YOUT_LOWER:
case MXC4005_REG_ZOUT_UPPER:
case MXC4005_REG_ZOUT_LOWER:
case MXC4005_REG_DEVICE_ID:
case MXC4005_REG_CONTROL:
return true;
default:
return false;
}
}
static bool mxc4005_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MXC4005_REG_INT_CLR1:
case MXC4005_REG_INT_MASK1:
case MXC4005_REG_CONTROL:
return true;
default:
return false;
}
}
static const struct regmap_config mxc4005_regmap_config = {
.name = MXC4005_REGMAP_NAME,
.reg_bits = 8,
.val_bits = 8,
.max_register = MXC4005_REG_DEVICE_ID,
.readable_reg = mxc4005_is_readable_reg,
.writeable_reg = mxc4005_is_writeable_reg,
};
static int mxc4005_read_xyz(struct mxc4005_data *data)
{
int ret;
ret = regmap_bulk_read(data->regmap, MXC4005_REG_XOUT_UPPER,
data->scan.chans, sizeof(data->scan.chans));
if (ret < 0) {
dev_err(data->dev, "failed to read axes\n");
return ret;
}
return 0;
}
static int mxc4005_read_axis(struct mxc4005_data *data,
unsigned int addr)
{
__be16 reg;
int ret;
ret = regmap_bulk_read(data->regmap, addr, ®, sizeof(reg));
if (ret < 0) {
dev_err(data->dev, "failed to read reg %02x\n", addr);
return ret;
}
return be16_to_cpu(reg);
}
static int mxc4005_read_scale(struct mxc4005_data *data)
{
unsigned int reg;
int ret;
int i;
ret = regmap_read(data->regmap, MXC4005_REG_CONTROL, ®);
if (ret < 0) {
dev_err(data->dev, "failed to read reg_control\n");
return ret;
}
i = reg >> MXC4005_CONTROL_FSR_SHIFT;
if (i < 0 || i >= ARRAY_SIZE(mxc4005_scale_table))
return -EINVAL;
return mxc4005_scale_table[i].scale;
}
static int mxc4005_set_scale(struct mxc4005_data *data, int val)
{
unsigned int reg;
int i;
int ret;
for (i = 0; i < ARRAY_SIZE(mxc4005_scale_table); i++) {
if (mxc4005_scale_table[i].scale == val) {
reg = i << MXC4005_CONTROL_FSR_SHIFT;
ret = regmap_update_bits(data->regmap,
MXC4005_REG_CONTROL,
MXC4005_REG_CONTROL_MASK_FSR,
reg);
if (ret < 0)
dev_err(data->dev,
"failed to write reg_control\n");
return ret;
}
}
return -EINVAL;
}
static int mxc4005_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mxc4005_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_ACCEL:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
ret = mxc4005_read_axis(data, chan->address);
if (ret < 0)
return ret;
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
ret = mxc4005_read_scale(data);
if (ret < 0)
return ret;
*val = 0;
*val2 = ret;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int mxc4005_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct mxc4005_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (val != 0)
return -EINVAL;
return mxc4005_set_scale(data, val2);
default:
return -EINVAL;
}
}
static const struct iio_info mxc4005_info = {
.read_raw = mxc4005_read_raw,
.write_raw = mxc4005_write_raw,
.attrs = &mxc4005_attrs_group,
};
static const unsigned long mxc4005_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0
};
#define MXC4005_CHANNEL(_axis, _addr) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.address = _addr, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec mxc4005_channels[] = {
MXC4005_CHANNEL(X, MXC4005_REG_XOUT_UPPER),
MXC4005_CHANNEL(Y, MXC4005_REG_YOUT_UPPER),
MXC4005_CHANNEL(Z, MXC4005_REG_ZOUT_UPPER),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static irqreturn_t mxc4005_trigger_handler(int irq, void *private)
{
struct iio_poll_func *pf = private;
struct iio_dev *indio_dev = pf->indio_dev;
struct mxc4005_data *data = iio_priv(indio_dev);
int ret;
ret = mxc4005_read_xyz(data);
if (ret < 0)
goto err;
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
pf->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static void mxc4005_clr_intr(struct mxc4005_data *data)
{
int ret;
/* clear interrupt */
ret = regmap_write(data->regmap, MXC4005_REG_INT_CLR1,
MXC4005_REG_INT_CLR1_BIT_DRDYC);
if (ret < 0)
dev_err(data->dev, "failed to write to reg_int_clr1\n");
}
static int mxc4005_set_trigger_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mxc4005_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
if (state) {
ret = regmap_write(data->regmap, MXC4005_REG_INT_MASK1,
MXC4005_REG_INT_MASK1_BIT_DRDYE);
} else {
ret = regmap_write(data->regmap, MXC4005_REG_INT_MASK1,
~MXC4005_REG_INT_MASK1_BIT_DRDYE);
}
if (ret < 0) {
mutex_unlock(&data->mutex);
dev_err(data->dev, "failed to update reg_int_mask1");
return ret;
}
data->trigger_enabled = state;
mutex_unlock(&data->mutex);
return 0;
}
static void mxc4005_trigger_reen(struct iio_trigger *trig)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mxc4005_data *data = iio_priv(indio_dev);
if (!data->dready_trig)
return;
mxc4005_clr_intr(data);
}
static const struct iio_trigger_ops mxc4005_trigger_ops = {
.set_trigger_state = mxc4005_set_trigger_state,
.reenable = mxc4005_trigger_reen,
};
static int mxc4005_chip_init(struct mxc4005_data *data)
{
int ret;
unsigned int reg;
ret = regmap_read(data->regmap, MXC4005_REG_DEVICE_ID, ®);
if (ret < 0) {
dev_err(data->dev, "failed to read chip id\n");
return ret;
}
dev_dbg(data->dev, "MXC4005 chip id %02x\n", reg);
return 0;
}
static int mxc4005_probe(struct i2c_client *client)
{
struct mxc4005_data *data;
struct iio_dev *indio_dev;
struct regmap *regmap;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
regmap = devm_regmap_init_i2c(client, &mxc4005_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "failed to initialize regmap\n");
return PTR_ERR(regmap);
}
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->dev = &client->dev;
data->regmap = regmap;
ret = mxc4005_chip_init(data);
if (ret < 0) {
dev_err(&client->dev, "failed to initialize chip\n");
return ret;
}
mutex_init(&data->mutex);
indio_dev->channels = mxc4005_channels;
indio_dev->num_channels = ARRAY_SIZE(mxc4005_channels);
indio_dev->available_scan_masks = mxc4005_scan_masks;
indio_dev->name = MXC4005_DRV_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mxc4005_info;
ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev,
iio_pollfunc_store_time,
mxc4005_trigger_handler,
NULL);
if (ret < 0) {
dev_err(&client->dev,
"failed to setup iio triggered buffer\n");
return ret;
}
if (client->irq > 0) {
data->dready_trig = devm_iio_trigger_alloc(&client->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig)
return -ENOMEM;
ret = devm_request_threaded_irq(&client->dev, client->irq,
iio_trigger_generic_data_rdy_poll,
NULL,
IRQF_TRIGGER_FALLING |
IRQF_ONESHOT,
MXC4005_IRQ_NAME,
data->dready_trig);
if (ret) {
dev_err(&client->dev,
"failed to init threaded irq\n");
return ret;
}
data->dready_trig->ops = &mxc4005_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = devm_iio_trigger_register(&client->dev,
data->dready_trig);
if (ret) {
dev_err(&client->dev,
"failed to register trigger\n");
return ret;
}
indio_dev->trig = iio_trigger_get(data->dready_trig);
}
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct acpi_device_id mxc4005_acpi_match[] = {
{"MXC4005", 0},
{"MXC6655", 0},
{ },
};
MODULE_DEVICE_TABLE(acpi, mxc4005_acpi_match);
static const struct i2c_device_id mxc4005_id[] = {
{"mxc4005", 0},
{"mxc6655", 0},
{ },
};
MODULE_DEVICE_TABLE(i2c, mxc4005_id);
static struct i2c_driver mxc4005_driver = {
.driver = {
.name = MXC4005_DRV_NAME,
.acpi_match_table = ACPI_PTR(mxc4005_acpi_match),
},
.probe = mxc4005_probe,
.id_table = mxc4005_id,
};
module_i2c_driver(mxc4005_driver);
MODULE_AUTHOR("Teodora Baluta <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("MXC4005 3-axis accelerometer driver");
| linux-master | drivers/iio/accel/mxc4005.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* ADXL372 3-Axis Digital Accelerometer I2C driver
*
* Copyright 2018 Analog Devices Inc.
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl372.h"
static const struct regmap_config adxl372_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.readable_noinc_reg = adxl372_readable_noinc_reg,
};
static int adxl372_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
unsigned int regval;
int ret;
regmap = devm_regmap_init_i2c(client, &adxl372_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
ret = regmap_read(regmap, ADXL372_REVID, ®val);
if (ret < 0)
return ret;
/* Starting with the 3rd revision an I2C chip bug was fixed */
if (regval < 3)
dev_warn(&client->dev,
"I2C might not work properly with other devices on the bus");
return adxl372_probe(&client->dev, regmap, client->irq, id->name);
}
static const struct i2c_device_id adxl372_i2c_id[] = {
{ "adxl372", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, adxl372_i2c_id);
static const struct of_device_id adxl372_of_match[] = {
{ .compatible = "adi,adxl372" },
{ }
};
MODULE_DEVICE_TABLE(of, adxl372_of_match);
static struct i2c_driver adxl372_i2c_driver = {
.driver = {
.name = "adxl372_i2c",
.of_match_table = adxl372_of_match,
},
.probe = adxl372_i2c_probe,
.id_table = adxl372_i2c_id,
};
module_i2c_driver(adxl372_i2c_driver);
MODULE_AUTHOR("Stefan Popa <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer I2C driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_ADXL372);
| linux-master | drivers/iio/accel/adxl372_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors.h>
#include <linux/iio/common/st_sensors_spi.h>
#include "st_accel.h"
/*
* For new single-chip sensors use <device_name> as compatible string.
* For old single-chip devices keep <device_name>-accel to maintain
* compatibility
*/
static const struct of_device_id st_accel_of_match[] = {
{
/* An older compatible */
.compatible = "st,lis302dl-spi",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3lv02dl-accel",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3dh-accel",
.data = LIS3DH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330d-accel",
.data = LSM330D_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dl-accel",
.data = LSM330DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dlc-accel",
.data = LSM330DLC_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dlh-accel",
.data = LIS331DLH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330-accel",
.data = LSM330_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303agr-accel",
.data = LSM303AGR_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dh12-accel",
.data = LIS2DH12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3l02dq",
.data = LIS3L02DQ_ACCEL_DEV_NAME,
},
{
.compatible = "st,lng2dm-accel",
.data = LNG2DM_ACCEL_DEV_NAME,
},
{
.compatible = "st,h3lis331dl-accel",
.data = H3LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dl-accel",
.data = LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dw12",
.data = LIS2DW12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3dhh",
.data = LIS3DHH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3de",
.data = LIS3DE_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis302dl",
.data = LIS302DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303c-accel",
.data = LSM303C_ACCEL_DEV_NAME,
},
{
.compatible = "st,iis328dq",
.data = IIS328DQ_ACCEL_DEV_NAME,
},
{}
};
MODULE_DEVICE_TABLE(of, st_accel_of_match);
static int st_accel_spi_probe(struct spi_device *spi)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *adata;
struct iio_dev *indio_dev;
int err;
st_sensors_dev_name_probe(&spi->dev, spi->modalias, sizeof(spi->modalias));
settings = st_accel_get_settings(spi->modalias);
if (!settings) {
dev_err(&spi->dev, "device name %s not recognized.\n",
spi->modalias);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adata));
if (!indio_dev)
return -ENOMEM;
adata = iio_priv(indio_dev);
adata->sensor_settings = (struct st_sensor_settings *)settings;
err = st_sensors_spi_configure(indio_dev, spi);
if (err < 0)
return err;
err = st_sensors_power_enable(indio_dev);
if (err)
return err;
return st_accel_common_probe(indio_dev);
}
static const struct spi_device_id st_accel_id_table[] = {
{ LIS3DH_ACCEL_DEV_NAME },
{ LSM330D_ACCEL_DEV_NAME },
{ LSM330DL_ACCEL_DEV_NAME },
{ LSM330DLC_ACCEL_DEV_NAME },
{ LIS331DLH_ACCEL_DEV_NAME },
{ LSM330_ACCEL_DEV_NAME },
{ LSM303AGR_ACCEL_DEV_NAME },
{ LIS2DH12_ACCEL_DEV_NAME },
{ LIS3L02DQ_ACCEL_DEV_NAME },
{ LNG2DM_ACCEL_DEV_NAME },
{ H3LIS331DL_ACCEL_DEV_NAME },
{ LIS331DL_ACCEL_DEV_NAME },
{ LIS3LV02DL_ACCEL_DEV_NAME },
{ LIS2DW12_ACCEL_DEV_NAME },
{ LIS3DHH_ACCEL_DEV_NAME },
{ LIS3DE_ACCEL_DEV_NAME },
{ LIS302DL_ACCEL_DEV_NAME },
{ LSM303C_ACCEL_DEV_NAME },
{ IIS328DQ_ACCEL_DEV_NAME },
{},
};
MODULE_DEVICE_TABLE(spi, st_accel_id_table);
static struct spi_driver st_accel_driver = {
.driver = {
.name = "st-accel-spi",
.of_match_table = st_accel_of_match,
},
.probe = st_accel_spi_probe,
.id_table = st_accel_id_table,
};
module_spi_driver(st_accel_driver);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics accelerometers spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/accel/st_accel_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL355 3-Axis Digital Accelerometer SPI driver
*
* Copyright (c) 2021 Puranjay Mohan <[email protected]>
*/
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/property.h>
#include "adxl355.h"
static const struct regmap_config adxl355_spi_regmap_config = {
.reg_bits = 7,
.pad_bits = 1,
.val_bits = 8,
.read_flag_mask = BIT(0),
.max_register = 0x2F,
.rd_table = &adxl355_readable_regs_tbl,
.wr_table = &adxl355_writeable_regs_tbl,
};
static int adxl355_spi_probe(struct spi_device *spi)
{
const struct adxl355_chip_info *chip_data;
struct regmap *regmap;
chip_data = device_get_match_data(&spi->dev);
if (!chip_data) {
chip_data = (void *)spi_get_device_id(spi)->driver_data;
if (!chip_data)
return -EINVAL;
}
regmap = devm_regmap_init_spi(spi, &adxl355_spi_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Error initializing spi regmap: %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return adxl355_core_probe(&spi->dev, regmap, chip_data);
}
static const struct spi_device_id adxl355_spi_id[] = {
{ "adxl355", (kernel_ulong_t)&adxl35x_chip_info[ADXL355] },
{ "adxl359", (kernel_ulong_t)&adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl355_spi_id);
static const struct of_device_id adxl355_of_match[] = {
{ .compatible = "adi,adxl355", .data = &adxl35x_chip_info[ADXL355] },
{ .compatible = "adi,adxl359", .data = &adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl355_of_match);
static struct spi_driver adxl355_spi_driver = {
.driver = {
.name = "adxl355_spi",
.of_match_table = adxl355_of_match,
},
.probe = adxl355_spi_probe,
.id_table = adxl355_spi_id,
};
module_spi_driver(adxl355_spi_driver);
MODULE_AUTHOR("Puranjay Mohan <[email protected]>");
MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADXL355);
| linux-master | drivers/iio/accel/adxl355_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* KXCJK-1013 3-axis accelerometer driver
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/acpi.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/events.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/accel/kxcjk_1013.h>
#define KXCJK1013_DRV_NAME "kxcjk1013"
#define KXCJK1013_IRQ_NAME "kxcjk1013_event"
#define KXTF9_REG_HP_XOUT_L 0x00
#define KXTF9_REG_HP_XOUT_H 0x01
#define KXTF9_REG_HP_YOUT_L 0x02
#define KXTF9_REG_HP_YOUT_H 0x03
#define KXTF9_REG_HP_ZOUT_L 0x04
#define KXTF9_REG_HP_ZOUT_H 0x05
#define KXCJK1013_REG_XOUT_L 0x06
/*
* From low byte X axis register, all the other addresses of Y and Z can be
* obtained by just applying axis offset. The following axis defines are just
* provide clarity, but not used.
*/
#define KXCJK1013_REG_XOUT_H 0x07
#define KXCJK1013_REG_YOUT_L 0x08
#define KXCJK1013_REG_YOUT_H 0x09
#define KXCJK1013_REG_ZOUT_L 0x0A
#define KXCJK1013_REG_ZOUT_H 0x0B
#define KXCJK1013_REG_DCST_RESP 0x0C
#define KXCJK1013_REG_WHO_AM_I 0x0F
#define KXTF9_REG_TILT_POS_CUR 0x10
#define KXTF9_REG_TILT_POS_PREV 0x11
#define KXTF9_REG_INT_SRC1 0x15
#define KXTF9_REG_INT_SRC2 0x16
#define KXCJK1013_REG_INT_SRC1 0x16
#define KXCJK1013_REG_INT_SRC2 0x17
#define KXCJK1013_REG_STATUS_REG 0x18
#define KXCJK1013_REG_INT_REL 0x1A
#define KXCJK1013_REG_CTRL1 0x1B
#define KXTF9_REG_CTRL2 0x1C
#define KXTF9_REG_CTRL3 0x1D
#define KXCJK1013_REG_CTRL2 0x1D
#define KXCJK1013_REG_INT_CTRL1 0x1E
#define KXCJK1013_REG_INT_CTRL2 0x1F
#define KXTF9_REG_INT_CTRL3 0x20
#define KXCJK1013_REG_DATA_CTRL 0x21
#define KXTF9_REG_TILT_TIMER 0x28
#define KXCJK1013_REG_WAKE_TIMER 0x29
#define KXTF9_REG_TDT_TIMER 0x2B
#define KXTF9_REG_TDT_THRESH_H 0x2C
#define KXTF9_REG_TDT_THRESH_L 0x2D
#define KXTF9_REG_TDT_TAP_TIMER 0x2E
#define KXTF9_REG_TDT_TOTAL_TIMER 0x2F
#define KXTF9_REG_TDT_LATENCY_TIMER 0x30
#define KXTF9_REG_TDT_WINDOW_TIMER 0x31
#define KXCJK1013_REG_SELF_TEST 0x3A
#define KXTF9_REG_WAKE_THRESH 0x5A
#define KXTF9_REG_TILT_ANGLE 0x5C
#define KXTF9_REG_HYST_SET 0x5F
#define KXCJK1013_REG_WAKE_THRES 0x6A
/* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */
#define KX023_REG_INS1 0x12
#define KX023_REG_INS2 0x13
#define KX023_REG_INS3 0x14
#define KX023_REG_STAT 0x15
#define KX023_REG_INT_REL 0x17
#define KX023_REG_CNTL1 0x18
#define KX023_REG_CNTL2 0x19
#define KX023_REG_CNTL3 0x1A
#define KX023_REG_ODCNTL 0x1B
#define KX023_REG_INC1 0x1C
#define KX023_REG_INC2 0x1D
#define KX023_REG_INC3 0x1E
#define KX023_REG_INC4 0x1F
#define KX023_REG_INC5 0x20
#define KX023_REG_INC6 0x21
#define KX023_REG_TILT_TIMER 0x22
#define KX023_REG_WUFC 0x23
#define KX023_REG_TDTRC 0x24
#define KX023_REG_TDTC 0x25
#define KX023_REG_TTH 0x26
#define KX023_REG_TTL 0x27
#define KX023_REG_FTD 0x28
#define KX023_REG_STD 0x29
#define KX023_REG_TLT 0x2A
#define KX023_REG_TWS 0x2B
#define KX023_REG_ATH 0x30
#define KX023_REG_TILT_ANGLE_LL 0x32
#define KX023_REG_TILT_ANGLE_HL 0x33
#define KX023_REG_HYST_SET 0x34
#define KX023_REG_LP_CNTL 0x35
#define KX023_REG_BUF_CNTL1 0x3A
#define KX023_REG_BUF_CNTL2 0x3B
#define KX023_REG_BUF_STATUS_1 0x3C
#define KX023_REG_BUF_STATUS_2 0x3D
#define KX023_REG_BUF_CLEAR 0x3E
#define KX023_REG_BUF_READ 0x3F
#define KX023_REG_SELF_TEST 0x60
#define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
#define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
#define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
#define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
#define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
#define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
#define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */
#define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3)
#define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4)
#define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5)
#define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5)
#define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4)
#define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3)
#define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2)
#define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1)
#define KXTF9_REG_TILT_BIT_FACE_UP BIT(0)
#define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
#define KXCJK1013_MAX_STARTUP_TIME_US 100000
#define KXCJK1013_SLEEP_DELAY_MS 2000
#define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */
#define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1)
#define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */
#define KXCJK1013_REG_INT_SRC1_TAP_NONE 0
#define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2)
#define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3)
#define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4)
/* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */
#define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
#define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
#define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
#define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
#define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
#define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
/* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */
#define KX023_REG_INC4_BFI1 BIT(6)
#define KX023_REG_INC4_WMI1 BIT(5)
#define KX023_REG_INC4_DRDY1 BIT(4)
#define KX023_REG_INC4_TDTI1 BIT(2)
#define KX023_REG_INC4_WUFI1 BIT(1)
#define KX023_REG_INC4_TPI1 BIT(0)
#define KXCJK1013_DEFAULT_WAKE_THRES 1
enum kx_chipset {
KXCJK1013,
KXCJ91008,
KXTJ21009,
KXTF9,
KX0231025,
KX_MAX_CHIPS /* this must be last */
};
enum kx_acpi_type {
ACPI_GENERIC,
ACPI_SMO8500,
ACPI_KIOX010A,
};
struct kx_chipset_regs {
u8 int_src1;
u8 int_src2;
u8 int_rel;
u8 ctrl1;
u8 wuf_ctrl;
u8 int_ctrl1;
u8 data_ctrl;
u8 wake_timer;
u8 wake_thres;
};
static const struct kx_chipset_regs kxcjk1013_regs = {
.int_src1 = KXCJK1013_REG_INT_SRC1,
.int_src2 = KXCJK1013_REG_INT_SRC2,
.int_rel = KXCJK1013_REG_INT_REL,
.ctrl1 = KXCJK1013_REG_CTRL1,
.wuf_ctrl = KXCJK1013_REG_CTRL2,
.int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
.data_ctrl = KXCJK1013_REG_DATA_CTRL,
.wake_timer = KXCJK1013_REG_WAKE_TIMER,
.wake_thres = KXCJK1013_REG_WAKE_THRES,
};
static const struct kx_chipset_regs kxtf9_regs = {
/* .int_src1 was moved to INT_SRC2 on KXTF9 */
.int_src1 = KXTF9_REG_INT_SRC2,
/* .int_src2 is not available */
.int_rel = KXCJK1013_REG_INT_REL,
.ctrl1 = KXCJK1013_REG_CTRL1,
.wuf_ctrl = KXTF9_REG_CTRL3,
.int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
.data_ctrl = KXCJK1013_REG_DATA_CTRL,
.wake_timer = KXCJK1013_REG_WAKE_TIMER,
.wake_thres = KXTF9_REG_WAKE_THRESH,
};
/* The registers have totally different names but the bits are compatible */
static const struct kx_chipset_regs kx0231025_regs = {
.int_src1 = KX023_REG_INS2,
.int_src2 = KX023_REG_INS3,
.int_rel = KX023_REG_INT_REL,
.ctrl1 = KX023_REG_CNTL1,
.wuf_ctrl = KX023_REG_CNTL3,
.int_ctrl1 = KX023_REG_INC1,
.data_ctrl = KX023_REG_ODCNTL,
.wake_timer = KX023_REG_WUFC,
.wake_thres = KX023_REG_ATH,
};
enum kxcjk1013_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
AXIS_MAX
};
struct kxcjk1013_data {
struct i2c_client *client;
struct iio_trigger *dready_trig;
struct iio_trigger *motion_trig;
struct iio_mount_matrix orientation;
struct mutex mutex;
/* Ensure timestamp naturally aligned */
struct {
s16 chans[AXIS_MAX];
s64 timestamp __aligned(8);
} scan;
u8 odr_bits;
u8 range;
int wake_thres;
int wake_dur;
bool active_high_intr;
bool dready_trigger_on;
int ev_enable_state;
bool motion_trigger_on;
int64_t timestamp;
enum kx_chipset chipset;
enum kx_acpi_type acpi_type;
const struct kx_chipset_regs *regs;
};
enum kxcjk1013_mode {
STANDBY,
OPERATION,
};
enum kxcjk1013_range {
KXCJK1013_RANGE_2G,
KXCJK1013_RANGE_4G,
KXCJK1013_RANGE_8G,
};
struct kx_odr_map {
int val;
int val2;
int odr_bits;
int wuf_bits;
};
static const struct kx_odr_map samp_freq_table[] = {
{ 0, 781000, 0x08, 0x00 },
{ 1, 563000, 0x09, 0x01 },
{ 3, 125000, 0x0A, 0x02 },
{ 6, 250000, 0x0B, 0x03 },
{ 12, 500000, 0x00, 0x04 },
{ 25, 0, 0x01, 0x05 },
{ 50, 0, 0x02, 0x06 },
{ 100, 0, 0x03, 0x06 },
{ 200, 0, 0x04, 0x06 },
{ 400, 0, 0x05, 0x06 },
{ 800, 0, 0x06, 0x06 },
{ 1600, 0, 0x07, 0x06 },
};
static const char *const kxcjk1013_samp_freq_avail =
"0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
static const struct kx_odr_map kxtf9_samp_freq_table[] = {
{ 25, 0, 0x01, 0x00 },
{ 50, 0, 0x02, 0x01 },
{ 100, 0, 0x03, 0x01 },
{ 200, 0, 0x04, 0x01 },
{ 400, 0, 0x05, 0x01 },
{ 800, 0, 0x06, 0x01 },
};
static const char *const kxtf9_samp_freq_avail =
"25 50 100 200 400 800";
/* Refer to section 4 of the specification */
static __maybe_unused const struct {
int odr_bits;
int usec;
} odr_start_up_times[KX_MAX_CHIPS][12] = {
/* KXCJK-1013 */
{
{0x08, 100000},
{0x09, 100000},
{0x0A, 100000},
{0x0B, 100000},
{0, 80000},
{0x01, 41000},
{0x02, 21000},
{0x03, 11000},
{0x04, 6400},
{0x05, 3900},
{0x06, 2700},
{0x07, 2100},
},
/* KXCJ9-1008 */
{
{0x08, 100000},
{0x09, 100000},
{0x0A, 100000},
{0x0B, 100000},
{0, 80000},
{0x01, 41000},
{0x02, 21000},
{0x03, 11000},
{0x04, 6400},
{0x05, 3900},
{0x06, 2700},
{0x07, 2100},
},
/* KXCTJ2-1009 */
{
{0x08, 1240000},
{0x09, 621000},
{0x0A, 309000},
{0x0B, 151000},
{0, 80000},
{0x01, 41000},
{0x02, 21000},
{0x03, 11000},
{0x04, 6000},
{0x05, 4000},
{0x06, 3000},
{0x07, 2000},
},
/* KXTF9 */
{
{0x01, 81000},
{0x02, 41000},
{0x03, 21000},
{0x04, 11000},
{0x05, 5100},
{0x06, 2700},
},
/* KX023-1025 */
{
/* First 4 are not in datasheet, taken from KXCTJ2-1009 */
{0x08, 1240000},
{0x09, 621000},
{0x0A, 309000},
{0x0B, 151000},
{0, 81000},
{0x01, 40000},
{0x02, 22000},
{0x03, 12000},
{0x04, 7000},
{0x05, 4400},
{0x06, 3000},
{0x07, 3000},
},
};
static const struct {
u16 scale;
u8 gsel_0;
u8 gsel_1;
} KXCJK1013_scale_table[] = { {9582, 0, 0},
{19163, 1, 0},
{38326, 0, 1} };
#ifdef CONFIG_ACPI
enum kiox010a_fn_index {
KIOX010A_SET_LAPTOP_MODE = 1,
KIOX010A_SET_TABLET_MODE = 2,
};
static int kiox010a_dsm(struct device *dev, int fn_index)
{
acpi_handle handle = ACPI_HANDLE(dev);
guid_t kiox010a_dsm_guid;
union acpi_object *obj;
if (!handle)
return -ENODEV;
guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
if (!obj)
return -EIO;
ACPI_FREE(obj);
return 0;
}
#endif
static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
enum kxcjk1013_mode mode)
{
int ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
if (mode == STANDBY)
ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
else
ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
return ret;
}
return 0;
}
static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
enum kxcjk1013_mode *mode)
{
int ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
*mode = OPERATION;
else
*mode = STANDBY;
return 0;
}
static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
{
int ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
KXCJK1013_REG_CTRL1_BIT_GSEL1);
ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
return ret;
}
data->range = range_index;
return 0;
}
static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
{
int ret;
#ifdef CONFIG_ACPI
if (data->acpi_type == ACPI_KIOX010A) {
/* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
}
#endif
ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading who_am_i\n");
return ret;
}
dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
ret = kxcjk1013_set_mode(data, STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
/* Set 12 bit mode */
ret |= KXCJK1013_REG_CTRL1_BIT_RES;
ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl\n");
return ret;
}
/* Setting range to 4G */
ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
return ret;
}
data->odr_bits = ret;
/* Set up INT polarity */
ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
return ret;
}
if (data->active_high_intr)
ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
else
ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
return ret;
}
/* On KX023, route all used interrupts to INT1 for now */
if (data->chipset == KX0231025 && data->client->irq > 0) {
ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4,
KX023_REG_INC4_DRDY1 |
KX023_REG_INC4_WUFI1);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_inc4\n");
return ret;
}
}
ret = kxcjk1013_set_mode(data, OPERATION);
if (ret < 0)
return ret;
data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
return 0;
}
#ifdef CONFIG_PM
static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
{
int i;
int idx = data->chipset;
for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
return odr_start_up_times[idx][i].usec;
}
return KXCJK1013_MAX_STARTUP_TIME_US;
}
#endif
static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
{
#ifdef CONFIG_PM
int ret;
if (on)
ret = pm_runtime_resume_and_get(&data->client->dev);
else {
pm_runtime_mark_last_busy(&data->client->dev);
ret = pm_runtime_put_autosuspend(&data->client->dev);
}
if (ret < 0) {
dev_err(&data->client->dev,
"Failed: %s for %d\n", __func__, on);
return ret;
}
#endif
return 0;
}
static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
{
int ret;
ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer,
data->wake_dur);
if (ret < 0) {
dev_err(&data->client->dev,
"Error writing reg_wake_timer\n");
return ret;
}
ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres,
data->wake_thres);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
return ret;
}
return 0;
}
static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
bool status)
{
int ret;
enum kxcjk1013_mode store_mode;
ret = kxcjk1013_get_mode(data, &store_mode);
if (ret < 0)
return ret;
/* This is requirement by spec to change state to STANDBY */
ret = kxcjk1013_set_mode(data, STANDBY);
if (ret < 0)
return ret;
ret = kxcjk1013_chip_update_thresholds(data);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
return ret;
}
if (status)
ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
else
ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
return ret;
}
ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
if (status)
ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
else
ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
return ret;
}
if (store_mode == OPERATION) {
ret = kxcjk1013_set_mode(data, OPERATION);
if (ret < 0)
return ret;
}
return 0;
}
static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
bool status)
{
int ret;
enum kxcjk1013_mode store_mode;
ret = kxcjk1013_get_mode(data, &store_mode);
if (ret < 0)
return ret;
/* This is requirement by spec to change state to STANDBY */
ret = kxcjk1013_set_mode(data, STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
return ret;
}
if (status)
ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
else
ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
return ret;
}
ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
if (status)
ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
else
ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
return ret;
}
if (store_mode == OPERATION) {
ret = kxcjk1013_set_mode(data, OPERATION);
if (ret < 0)
return ret;
}
return 0;
}
static const struct kx_odr_map *kxcjk1013_find_odr_value(
const struct kx_odr_map *map, size_t map_size, int val, int val2)
{
int i;
for (i = 0; i < map_size; ++i) {
if (map[i].val == val && map[i].val2 == val2)
return &map[i];
}
return ERR_PTR(-EINVAL);
}
static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
size_t map_size, int odr_bits,
int *val, int *val2)
{
int i;
for (i = 0; i < map_size; ++i) {
if (map[i].odr_bits == odr_bits) {
*val = map[i].val;
*val2 = map[i].val2;
return IIO_VAL_INT_PLUS_MICRO;
}
}
return -EINVAL;
}
static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
{
int ret;
enum kxcjk1013_mode store_mode;
const struct kx_odr_map *odr_setting;
ret = kxcjk1013_get_mode(data, &store_mode);
if (ret < 0)
return ret;
if (data->chipset == KXTF9)
odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
ARRAY_SIZE(kxtf9_samp_freq_table),
val, val2);
else
odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
ARRAY_SIZE(samp_freq_table),
val, val2);
if (IS_ERR(odr_setting))
return PTR_ERR(odr_setting);
/* To change ODR, the chip must be set to STANDBY as per spec */
ret = kxcjk1013_set_mode(data, STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl,
odr_setting->odr_bits);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing data_ctrl\n");
return ret;
}
data->odr_bits = odr_setting->odr_bits;
ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl,
odr_setting->wuf_bits);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
return ret;
}
if (store_mode == OPERATION) {
ret = kxcjk1013_set_mode(data, OPERATION);
if (ret < 0)
return ret;
}
return 0;
}
static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
{
if (data->chipset == KXTF9)
return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
ARRAY_SIZE(kxtf9_samp_freq_table),
data->odr_bits, val, val2);
else
return kxcjk1013_convert_odr_value(samp_freq_table,
ARRAY_SIZE(samp_freq_table),
data->odr_bits, val, val2);
}
static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
{
u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
int ret;
ret = i2c_smbus_read_word_data(data->client, reg);
if (ret < 0) {
dev_err(&data->client->dev,
"failed to read accel_%c registers\n", 'x' + axis);
return ret;
}
return ret;
}
static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
{
int ret, i;
enum kxcjk1013_mode store_mode;
for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
if (KXCJK1013_scale_table[i].scale == val) {
ret = kxcjk1013_get_mode(data, &store_mode);
if (ret < 0)
return ret;
ret = kxcjk1013_set_mode(data, STANDBY);
if (ret < 0)
return ret;
ret = kxcjk1013_set_range(data, i);
if (ret < 0)
return ret;
if (store_mode == OPERATION) {
ret = kxcjk1013_set_mode(data, OPERATION);
if (ret)
return ret;
}
return 0;
}
}
return -EINVAL;
}
static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&data->mutex);
if (iio_buffer_enabled(indio_dev))
ret = -EBUSY;
else {
ret = kxcjk1013_set_power_state(data, true);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
if (ret < 0) {
kxcjk1013_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
ret = kxcjk1013_set_power_state(data, false);
}
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = KXCJK1013_scale_table[data->range].scale;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&data->mutex);
ret = kxcjk1013_get_odr(data, val, val2);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&data->mutex);
ret = kxcjk1013_set_odr(data, val, val2);
mutex_unlock(&data->mutex);
break;
case IIO_CHAN_INFO_SCALE:
if (val)
return -EINVAL;
mutex_lock(&data->mutex);
ret = kxcjk1013_set_scale(data, val2);
mutex_unlock(&data->mutex);
break;
default:
ret = -EINVAL;
}
return ret;
}
static int kxcjk1013_read_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
*val2 = 0;
switch (info) {
case IIO_EV_INFO_VALUE:
*val = data->wake_thres;
break;
case IIO_EV_INFO_PERIOD:
*val = data->wake_dur;
break;
default:
return -EINVAL;
}
return IIO_VAL_INT;
}
static int kxcjk1013_write_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
if (data->ev_enable_state)
return -EBUSY;
switch (info) {
case IIO_EV_INFO_VALUE:
data->wake_thres = val;
break;
case IIO_EV_INFO_PERIOD:
data->wake_dur = val;
break;
default:
return -EINVAL;
}
return 0;
}
static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
return data->ev_enable_state;
}
static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
if (state && data->ev_enable_state)
return 0;
mutex_lock(&data->mutex);
if (!state && data->motion_trigger_on) {
data->ev_enable_state = 0;
mutex_unlock(&data->mutex);
return 0;
}
/*
* We will expect the enable and disable to do operation in
* reverse order. This will happen here anyway as our
* resume operation uses sync mode runtime pm calls, the
* suspend operation will be delayed by autosuspend delay
* So the disable operation will still happen in reverse of
* enable operation. When runtime pm is disabled the mode
* is always on so sequence doesn't matter
*/
ret = kxcjk1013_set_power_state(data, state);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = kxcjk1013_setup_any_motion_interrupt(data, state);
if (ret < 0) {
kxcjk1013_set_power_state(data, false);
data->ev_enable_state = 0;
mutex_unlock(&data->mutex);
return ret;
}
data->ev_enable_state = state;
mutex_unlock(&data->mutex);
return 0;
}
static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
return kxcjk1013_set_power_state(data, true);
}
static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
return kxcjk1013_set_power_state(data, false);
}
static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct kxcjk1013_data *data = iio_priv(indio_dev);
const char *str;
if (data->chipset == KXTF9)
str = kxtf9_samp_freq_avail;
else
str = kxcjk1013_samp_freq_avail;
return sprintf(buf, "%s\n", str);
}
static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
kxcjk1013_get_samp_freq_avail, NULL, 0);
static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
static struct attribute *kxcjk1013_attributes[] = {
&iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group kxcjk1013_attrs_group = {
.attrs = kxcjk1013_attributes,
};
static const struct iio_event_spec kxcjk1013_event = {
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_EITHER,
.mask_separate = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_PERIOD)
};
static const struct iio_mount_matrix *
kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix),
{ }
};
#define KXCJK1013_CHANNEL(_axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_LE, \
}, \
.event_spec = &kxcjk1013_event, \
.ext_info = kxcjk1013_ext_info, \
.num_event_specs = 1 \
}
static const struct iio_chan_spec kxcjk1013_channels[] = {
KXCJK1013_CHANNEL(X),
KXCJK1013_CHANNEL(Y),
KXCJK1013_CHANNEL(Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
.preenable = kxcjk1013_buffer_preenable,
.postdisable = kxcjk1013_buffer_postdisable,
};
static const struct iio_info kxcjk1013_info = {
.attrs = &kxcjk1013_attrs_group,
.read_raw = kxcjk1013_read_raw,
.write_raw = kxcjk1013_write_raw,
.read_event_value = kxcjk1013_read_event,
.write_event_value = kxcjk1013_write_event,
.write_event_config = kxcjk1013_write_event_config,
.read_event_config = kxcjk1013_read_event_config,
};
static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
KXCJK1013_REG_XOUT_L,
AXIS_MAX * 2,
(u8 *)data->scan.chans);
mutex_unlock(&data->mutex);
if (ret < 0)
goto err;
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
data->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static void kxcjk1013_trig_reen(struct iio_trigger *trig)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
if (ret < 0)
dev_err(&data->client->dev, "Error reading reg_int_rel\n");
}
static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
if (!state && data->ev_enable_state && data->motion_trigger_on) {
data->motion_trigger_on = false;
mutex_unlock(&data->mutex);
return 0;
}
ret = kxcjk1013_set_power_state(data, state);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
if (data->motion_trig == trig)
ret = kxcjk1013_setup_any_motion_interrupt(data, state);
else
ret = kxcjk1013_setup_new_data_interrupt(data, state);
if (ret < 0) {
kxcjk1013_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
if (data->motion_trig == trig)
data->motion_trigger_on = state;
else
data->dready_trigger_on = state;
mutex_unlock(&data->mutex);
return 0;
}
static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
.set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
.reenable = kxcjk1013_trig_reen,
};
static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
{
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_int_src2\n");
return;
}
if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_FALLING),
data->timestamp);
if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_RISING),
data->timestamp);
if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_FALLING),
data->timestamp);
if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_RISING),
data->timestamp);
if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_FALLING),
data->timestamp);
if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_RISING),
data->timestamp);
}
static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_int_src1\n");
goto ack_intr;
}
if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
if (data->chipset == KXTF9)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X_AND_Y_AND_Z,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_RISING),
data->timestamp);
else
kxcjk1013_report_motion_event(indio_dev);
}
ack_intr:
if (data->dready_trigger_on)
return IRQ_HANDLED;
ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
if (ret < 0)
dev_err(&data->client->dev, "Error reading reg_int_rel\n");
return IRQ_HANDLED;
}
static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct kxcjk1013_data *data = iio_priv(indio_dev);
data->timestamp = iio_get_time_ns(indio_dev);
if (data->dready_trigger_on)
iio_trigger_poll(data->dready_trig);
else if (data->motion_trigger_on)
iio_trigger_poll(data->motion_trig);
if (data->ev_enable_state)
return IRQ_WAKE_THREAD;
else
return IRQ_HANDLED;
}
static const char *kxcjk1013_match_acpi_device(struct device *dev,
enum kx_chipset *chipset,
enum kx_acpi_type *acpi_type,
const char **label)
{
const struct acpi_device_id *id;
id = acpi_match_device(dev->driver->acpi_match_table, dev);
if (!id)
return NULL;
if (strcmp(id->id, "SMO8500") == 0) {
*acpi_type = ACPI_SMO8500;
} else if (strcmp(id->id, "KIOX010A") == 0) {
*acpi_type = ACPI_KIOX010A;
*label = "accel-display";
} else if (strcmp(id->id, "KIOX020A") == 0) {
*label = "accel-base";
}
*chipset = (enum kx_chipset)id->driver_data;
return dev_name(dev);
}
static int kxcjk1013_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
static const char * const regulator_names[] = { "vdd", "vddio" };
struct kxcjk1013_data *data;
struct iio_dev *indio_dev;
struct kxcjk_1013_platform_data *pdata;
const char *name;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
pdata = dev_get_platdata(&client->dev);
if (pdata) {
data->active_high_intr = pdata->active_high_intr;
data->orientation = pdata->orientation;
} else {
data->active_high_intr = true; /* default polarity */
ret = iio_read_mount_matrix(&client->dev, &data->orientation);
if (ret)
return ret;
}
ret = devm_regulator_bulk_get_enable(&client->dev,
ARRAY_SIZE(regulator_names),
regulator_names);
if (ret)
return dev_err_probe(&client->dev, ret, "Failed to get regulators\n");
/*
* A typical delay of 10ms is required for powering up
* according to the data sheets of supported chips.
* Hence double that to play safe.
*/
msleep(20);
if (id) {
data->chipset = (enum kx_chipset)(id->driver_data);
name = id->name;
} else if (ACPI_HANDLE(&client->dev)) {
name = kxcjk1013_match_acpi_device(&client->dev,
&data->chipset,
&data->acpi_type,
&indio_dev->label);
} else
return -ENODEV;
switch (data->chipset) {
case KXCJK1013:
case KXCJ91008:
case KXTJ21009:
data->regs = &kxcjk1013_regs;
break;
case KXTF9:
data->regs = &kxtf9_regs;
break;
case KX0231025:
data->regs = &kx0231025_regs;
break;
default:
return -EINVAL;
}
ret = kxcjk1013_chip_init(data);
if (ret < 0)
return ret;
mutex_init(&data->mutex);
indio_dev->channels = kxcjk1013_channels;
indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
indio_dev->available_scan_masks = kxcjk1013_scan_masks;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &kxcjk1013_info;
if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
kxcjk1013_data_rdy_trig_poll,
kxcjk1013_event_handler,
IRQF_TRIGGER_RISING,
KXCJK1013_IRQ_NAME,
indio_dev);
if (ret)
goto err_poweroff;
data->dready_trig = devm_iio_trigger_alloc(&client->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig) {
ret = -ENOMEM;
goto err_poweroff;
}
data->motion_trig = devm_iio_trigger_alloc(&client->dev,
"%s-any-motion-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->motion_trig) {
ret = -ENOMEM;
goto err_poweroff;
}
data->dready_trig->ops = &kxcjk1013_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);
if (ret)
goto err_poweroff;
indio_dev->trig = iio_trigger_get(data->dready_trig);
data->motion_trig->ops = &kxcjk1013_trigger_ops;
iio_trigger_set_drvdata(data->motion_trig, indio_dev);
ret = iio_trigger_register(data->motion_trig);
if (ret) {
data->motion_trig = NULL;
goto err_trigger_unregister;
}
}
ret = iio_triggered_buffer_setup(indio_dev,
&iio_pollfunc_store_time,
kxcjk1013_trigger_handler,
&kxcjk1013_buffer_setup_ops);
if (ret < 0) {
dev_err(&client->dev, "iio triggered buffer setup failed\n");
goto err_trigger_unregister;
}
ret = pm_runtime_set_active(&client->dev);
if (ret)
goto err_buffer_cleanup;
pm_runtime_enable(&client->dev);
pm_runtime_set_autosuspend_delay(&client->dev,
KXCJK1013_SLEEP_DELAY_MS);
pm_runtime_use_autosuspend(&client->dev);
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "unable to register iio device\n");
goto err_pm_cleanup;
}
return 0;
err_pm_cleanup:
pm_runtime_dont_use_autosuspend(&client->dev);
pm_runtime_disable(&client->dev);
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
if (data->motion_trig)
iio_trigger_unregister(data->motion_trig);
err_poweroff:
kxcjk1013_set_mode(data, STANDBY);
return ret;
}
static void kxcjk1013_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct kxcjk1013_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(&client->dev);
pm_runtime_set_suspended(&client->dev);
iio_triggered_buffer_cleanup(indio_dev);
if (data->dready_trig) {
iio_trigger_unregister(data->dready_trig);
iio_trigger_unregister(data->motion_trig);
}
mutex_lock(&data->mutex);
kxcjk1013_set_mode(data, STANDBY);
mutex_unlock(&data->mutex);
}
#ifdef CONFIG_PM_SLEEP
static int kxcjk1013_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = kxcjk1013_set_mode(data, STANDBY);
mutex_unlock(&data->mutex);
return ret;
}
static int kxcjk1013_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret = 0;
mutex_lock(&data->mutex);
ret = kxcjk1013_set_mode(data, OPERATION);
if (ret == 0)
ret = kxcjk1013_set_range(data, data->range);
mutex_unlock(&data->mutex);
return ret;
}
#endif
#ifdef CONFIG_PM
static int kxcjk1013_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
ret = kxcjk1013_set_mode(data, STANDBY);
if (ret < 0) {
dev_err(&data->client->dev, "powering off device failed\n");
return -EAGAIN;
}
return 0;
}
static int kxcjk1013_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct kxcjk1013_data *data = iio_priv(indio_dev);
int ret;
int sleep_val;
ret = kxcjk1013_set_mode(data, OPERATION);
if (ret < 0)
return ret;
sleep_val = kxcjk1013_get_startup_times(data);
if (sleep_val < 20000)
usleep_range(sleep_val, 20000);
else
msleep_interruptible(sleep_val/1000);
return 0;
}
#endif
static const struct dev_pm_ops kxcjk1013_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
kxcjk1013_runtime_resume, NULL)
};
static const struct acpi_device_id kx_acpi_match[] = {
{"KXCJ1013", KXCJK1013},
{"KXCJ1008", KXCJ91008},
{"KXCJ9000", KXCJ91008},
{"KIOX0008", KXCJ91008},
{"KIOX0009", KXTJ21009},
{"KIOX000A", KXCJ91008},
{"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */
{"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */
{"KXTJ1009", KXTJ21009},
{"KXJ2109", KXTJ21009},
{"SMO8500", KXCJ91008},
{ },
};
MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
static const struct i2c_device_id kxcjk1013_id[] = {
{"kxcjk1013", KXCJK1013},
{"kxcj91008", KXCJ91008},
{"kxtj21009", KXTJ21009},
{"kxtf9", KXTF9},
{"kx023-1025", KX0231025},
{"SMO8500", KXCJ91008},
{}
};
MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
static const struct of_device_id kxcjk1013_of_match[] = {
{ .compatible = "kionix,kxcjk1013", },
{ .compatible = "kionix,kxcj91008", },
{ .compatible = "kionix,kxtj21009", },
{ .compatible = "kionix,kxtf9", },
{ .compatible = "kionix,kx023-1025", },
{ }
};
MODULE_DEVICE_TABLE(of, kxcjk1013_of_match);
static struct i2c_driver kxcjk1013_driver = {
.driver = {
.name = KXCJK1013_DRV_NAME,
.acpi_match_table = ACPI_PTR(kx_acpi_match),
.of_match_table = kxcjk1013_of_match,
.pm = &kxcjk1013_pm_ops,
},
.probe = kxcjk1013_probe,
.remove = kxcjk1013_remove,
.id_table = kxcjk1013_id,
};
module_i2c_driver(kxcjk1013_driver);
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");
| linux-master | drivers/iio/accel/kxcjk-1013.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL313 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Lucas Stankus <[email protected]>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl313.h"
static const struct regmap_config adxl31x_i2c_regmap_config[] = {
[ADXL312] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl312_readable_regs_table,
.wr_table = &adxl312_writable_regs_table,
.max_register = 0x39,
},
[ADXL313] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl313_readable_regs_table,
.wr_table = &adxl313_writable_regs_table,
.max_register = 0x39,
},
[ADXL314] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl314_readable_regs_table,
.wr_table = &adxl314_writable_regs_table,
.max_register = 0x39,
},
};
static const struct i2c_device_id adxl313_i2c_id[] = {
{ .name = "adxl312", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL312] },
{ .name = "adxl313", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL313] },
{ .name = "adxl314", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl313_i2c_id);
static const struct of_device_id adxl313_of_match[] = {
{ .compatible = "adi,adxl312", .data = &adxl31x_chip_info[ADXL312] },
{ .compatible = "adi,adxl313", .data = &adxl31x_chip_info[ADXL313] },
{ .compatible = "adi,adxl314", .data = &adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl313_of_match);
static int adxl313_i2c_probe(struct i2c_client *client)
{
const struct adxl313_chip_info *chip_data;
struct regmap *regmap;
/*
* Retrieves device specific data as a pointer to a
* adxl313_chip_info structure
*/
chip_data = i2c_get_match_data(client);
regmap = devm_regmap_init_i2c(client,
&adxl31x_i2c_regmap_config[chip_data->type]);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Error initializing i2c regmap: %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return adxl313_core_probe(&client->dev, regmap, chip_data, NULL);
}
static struct i2c_driver adxl313_i2c_driver = {
.driver = {
.name = "adxl313_i2c",
.of_match_table = adxl313_of_match,
},
.probe = adxl313_i2c_probe,
.id_table = adxl313_i2c_id,
};
module_i2c_driver(adxl313_i2c_driver);
MODULE_AUTHOR("Lucas Stankus <[email protected]>");
MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADXL313);
| linux-master | drivers/iio/accel/adxl313_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Murata SCA3300 3-axis industrial accelerometer
*
* Copyright (c) 2021 Vaisala Oyj. All rights reserved.
*/
#include <linux/bitops.h>
#include <linux/crc8.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <asm/unaligned.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#define SCA3300_ALIAS "sca3300"
#define SCA3300_CRC8_POLYNOMIAL 0x1d
/* Device mode register */
#define SCA3300_REG_MODE 0xd
#define SCA3300_MODE_SW_RESET 0x20
/* Last register in map */
#define SCA3300_REG_SELBANK 0x1f
/* Device status and mask */
#define SCA3300_REG_STATUS 0x6
#define SCA3300_STATUS_MASK GENMASK(8, 0)
/* Device ID */
#define SCA3300_REG_WHOAMI 0x10
#define SCA3300_WHOAMI_ID 0x51
#define SCL3300_WHOAMI_ID 0xC1
/* Device return status and mask */
#define SCA3300_VALUE_RS_ERROR 0x3
#define SCA3300_MASK_RS_STATUS GENMASK(1, 0)
#define SCL3300_REG_ANG_CTRL 0x0C
#define SCL3300_ANG_ENABLE 0x1F
enum sca3300_scan_indexes {
SCA3300_ACC_X = 0,
SCA3300_ACC_Y,
SCA3300_ACC_Z,
SCA3300_TEMP,
SCA3300_INCLI_X,
SCA3300_INCLI_Y,
SCA3300_INCLI_Z,
SCA3300_SCAN_MAX
};
/*
* Buffer size max case:
* Three accel channels, two bytes per channel.
* Temperature channel, two bytes.
* Three incli channels, two bytes per channel.
* Timestamp channel, eight bytes.
*/
#define SCA3300_MAX_BUFFER_SIZE (ALIGN(sizeof(s16) * SCA3300_SCAN_MAX, sizeof(s64)) + sizeof(s64))
#define SCA3300_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_CPU, \
}, \
}
#define SCA3300_INCLI_CHANNEL(index, reg, axis) { \
.type = IIO_INCLI, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_CPU, \
}, \
}
#define SCA3300_TEMP_CHANNEL(index, reg) { \
.type = IIO_TEMP, \
.address = reg, \
.scan_index = index, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_CPU, \
}, \
}
static const struct iio_chan_spec sca3300_channels[] = {
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_X, 0x1, X),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Y, 0x2, Y),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Z, 0x3, Z),
SCA3300_TEMP_CHANNEL(SCA3300_TEMP, 0x05),
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const int sca3300_lp_freq[] = {70, 10};
static const int sca3300_lp_freq_map[] = {0, 0, 0, 1};
static const int scl3300_lp_freq[] = {40, 70, 10};
static const int scl3300_lp_freq_map[] = {0, 1, 2};
static const int sca3300_accel_scale[][2] = {{0, 370}, {0, 741}, {0, 185}};
static const int sca3300_accel_scale_map[] = {0, 1, 2, 2};
static const int scl3300_accel_scale[][2] = {{0, 167}, {0, 333}, {0, 83}};
static const int scl3300_accel_scale_map[] = {0, 1, 2};
static const int scl3300_incli_scale[][2] = {{0, 5495}};
static const int scl3300_incli_scale_map[] = {0, 0, 0};
static const int sca3300_avail_modes_map[] = {0, 1, 2, 3};
static const int scl3300_avail_modes_map[] = {0, 1, 3};
static const struct iio_chan_spec scl3300_channels[] = {
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_X, 0x1, X),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Y, 0x2, Y),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Z, 0x3, Z),
SCA3300_TEMP_CHANNEL(SCA3300_TEMP, 0x05),
SCA3300_INCLI_CHANNEL(SCA3300_INCLI_X, 0x09, X),
SCA3300_INCLI_CHANNEL(SCA3300_INCLI_Y, 0x0A, Y),
SCA3300_INCLI_CHANNEL(SCA3300_INCLI_Z, 0x0B, Z),
IIO_CHAN_SOFT_TIMESTAMP(7),
};
static const unsigned long sca3300_scan_masks[] = {
BIT(SCA3300_ACC_X) | BIT(SCA3300_ACC_Y) | BIT(SCA3300_ACC_Z) |
BIT(SCA3300_TEMP),
0
};
static const unsigned long scl3300_scan_masks[] = {
BIT(SCA3300_ACC_X) | BIT(SCA3300_ACC_Y) | BIT(SCA3300_ACC_Z) |
BIT(SCA3300_TEMP) |
BIT(SCA3300_INCLI_X) | BIT(SCA3300_INCLI_Y) | BIT(SCA3300_INCLI_Z),
0
};
struct sca3300_chip_info {
const char *name;
const unsigned long *scan_masks;
const struct iio_chan_spec *channels;
u8 num_channels;
u8 num_accel_scales;
const int (*accel_scale)[2];
const int *accel_scale_map;
const int (*incli_scale)[2];
const int *incli_scale_map;
u8 num_incli_scales;
u8 num_freqs;
const int *freq_table;
const int *freq_map;
const int *avail_modes_table;
u8 num_avail_modes;
u8 chip_id;
bool angle_supported;
};
/**
* struct sca3300_data - device data
* @spi: SPI device structure
* @lock: Data buffer lock
* @chip: Sensor chip specific information
* @buffer: Triggered buffer:
* -SCA3300: 4 channel 16-bit data + 64-bit timestamp
* -SCL3300: 7 channel 16-bit data + 64-bit timestamp
* @txbuf: Transmit buffer
* @rxbuf: Receive buffer
*/
struct sca3300_data {
struct spi_device *spi;
struct mutex lock;
const struct sca3300_chip_info *chip;
u8 buffer[SCA3300_MAX_BUFFER_SIZE] __aligned(sizeof(s64));
u8 txbuf[4] __aligned(IIO_DMA_MINALIGN);
u8 rxbuf[4];
};
static const struct sca3300_chip_info sca3300_chip_tbl[] = {
{
.name = "sca3300",
.scan_masks = sca3300_scan_masks,
.channels = sca3300_channels,
.num_channels = ARRAY_SIZE(sca3300_channels),
.num_accel_scales = ARRAY_SIZE(sca3300_accel_scale)*2,
.accel_scale = sca3300_accel_scale,
.accel_scale_map = sca3300_accel_scale_map,
.num_freqs = ARRAY_SIZE(sca3300_lp_freq),
.freq_table = sca3300_lp_freq,
.freq_map = sca3300_lp_freq_map,
.avail_modes_table = sca3300_avail_modes_map,
.num_avail_modes = 4,
.chip_id = SCA3300_WHOAMI_ID,
.angle_supported = false,
},
{
.name = "scl3300",
.scan_masks = scl3300_scan_masks,
.channels = scl3300_channels,
.num_channels = ARRAY_SIZE(scl3300_channels),
.num_accel_scales = ARRAY_SIZE(scl3300_accel_scale)*2,
.accel_scale = scl3300_accel_scale,
.accel_scale_map = scl3300_accel_scale_map,
.incli_scale = scl3300_incli_scale,
.incli_scale_map = scl3300_incli_scale_map,
.num_incli_scales = ARRAY_SIZE(scl3300_incli_scale)*2,
.num_freqs = ARRAY_SIZE(scl3300_lp_freq),
.freq_table = scl3300_lp_freq,
.freq_map = scl3300_lp_freq_map,
.avail_modes_table = scl3300_avail_modes_map,
.num_avail_modes = 3,
.chip_id = SCL3300_WHOAMI_ID,
.angle_supported = true,
},
};
DECLARE_CRC8_TABLE(sca3300_crc_table);
static int sca3300_transfer(struct sca3300_data *sca_data, int *val)
{
/* Consecutive requests min. 10 us delay (Datasheet section 5.1.2) */
struct spi_delay delay = { .value = 10, .unit = SPI_DELAY_UNIT_USECS };
int32_t ret;
int rs;
u8 crc;
struct spi_transfer xfers[2] = {
{
.tx_buf = sca_data->txbuf,
.len = ARRAY_SIZE(sca_data->txbuf),
.delay = delay,
.cs_change = 1,
},
{
.rx_buf = sca_data->rxbuf,
.len = ARRAY_SIZE(sca_data->rxbuf),
.delay = delay,
}
};
/* inverted crc value as described in device data sheet */
crc = ~crc8(sca3300_crc_table, &sca_data->txbuf[0], 3, CRC8_INIT_VALUE);
sca_data->txbuf[3] = crc;
ret = spi_sync_transfer(sca_data->spi, xfers, ARRAY_SIZE(xfers));
if (ret) {
dev_err(&sca_data->spi->dev,
"transfer error, error: %d\n", ret);
return -EIO;
}
crc = ~crc8(sca3300_crc_table, &sca_data->rxbuf[0], 3, CRC8_INIT_VALUE);
if (sca_data->rxbuf[3] != crc) {
dev_err(&sca_data->spi->dev, "CRC checksum mismatch");
return -EIO;
}
/* get return status */
rs = sca_data->rxbuf[0] & SCA3300_MASK_RS_STATUS;
if (rs == SCA3300_VALUE_RS_ERROR)
ret = -EINVAL;
*val = sign_extend32(get_unaligned_be16(&sca_data->rxbuf[1]), 15);
return ret;
}
static int sca3300_error_handler(struct sca3300_data *sca_data)
{
int ret;
int val;
mutex_lock(&sca_data->lock);
sca_data->txbuf[0] = SCA3300_REG_STATUS << 2;
ret = sca3300_transfer(sca_data, &val);
mutex_unlock(&sca_data->lock);
/*
* Return status error is cleared after reading status register once,
* expect EINVAL here.
*/
if (ret != -EINVAL) {
dev_err(&sca_data->spi->dev,
"error reading device status: %d\n", ret);
return ret;
}
dev_err(&sca_data->spi->dev, "device status: 0x%lx\n",
val & SCA3300_STATUS_MASK);
return 0;
}
static int sca3300_read_reg(struct sca3300_data *sca_data, u8 reg, int *val)
{
int ret;
mutex_lock(&sca_data->lock);
sca_data->txbuf[0] = reg << 2;
ret = sca3300_transfer(sca_data, val);
mutex_unlock(&sca_data->lock);
if (ret != -EINVAL)
return ret;
return sca3300_error_handler(sca_data);
}
static int sca3300_write_reg(struct sca3300_data *sca_data, u8 reg, int val)
{
int reg_val = 0;
int ret;
mutex_lock(&sca_data->lock);
/* BIT(7) for write operation */
sca_data->txbuf[0] = BIT(7) | (reg << 2);
put_unaligned_be16(val, &sca_data->txbuf[1]);
ret = sca3300_transfer(sca_data, ®_val);
mutex_unlock(&sca_data->lock);
if (ret != -EINVAL)
return ret;
return sca3300_error_handler(sca_data);
}
static int sca3300_set_op_mode(struct sca3300_data *sca_data, int index)
{
if ((index < 0) || (index >= sca_data->chip->num_avail_modes))
return -EINVAL;
return sca3300_write_reg(sca_data, SCA3300_REG_MODE,
sca_data->chip->avail_modes_table[index]);
}
static int sca3300_get_op_mode(struct sca3300_data *sca_data, int *index)
{
int reg_val;
int ret;
int i;
ret = sca3300_read_reg(sca_data, SCA3300_REG_MODE, ®_val);
if (ret)
return ret;
for (i = 0; i < sca_data->chip->num_avail_modes; i++) {
if (sca_data->chip->avail_modes_table[i] == reg_val)
break;
}
if (i == sca_data->chip->num_avail_modes)
return -EINVAL;
*index = i;
return 0;
}
static int sca3300_set_frequency(struct sca3300_data *data, int val)
{
const struct sca3300_chip_info *chip = data->chip;
unsigned int index;
int *opmode_scale;
int *new_scale;
unsigned int i;
if (sca3300_get_op_mode(data, &index))
return -EINVAL;
/*
* Find a mode in which the requested sampling frequency is available
* and the scaling currently set is retained.
*/
opmode_scale = (int *)chip->accel_scale[chip->accel_scale_map[index]];
for (i = 0; i < chip->num_avail_modes; i++) {
new_scale = (int *)chip->accel_scale[chip->accel_scale_map[i]];
if ((val == chip->freq_table[chip->freq_map[i]]) &&
(opmode_scale[1] == new_scale[1]) &&
(opmode_scale[0] == new_scale[0]))
break;
}
if (i == chip->num_avail_modes)
return -EINVAL;
return sca3300_set_op_mode(data, i);
}
static int sca3300_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct sca3300_data *data = iio_priv(indio_dev);
int index;
int i;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (chan->type != IIO_ACCEL)
return -EINVAL;
/*
* Letting scale take priority over sampling frequency.
* That makes sense given we can only ever end up increasing
* the sampling frequency which is unlikely to be a problem.
*/
for (i = 0; i < data->chip->num_avail_modes; i++) {
index = data->chip->accel_scale_map[i];
if ((val == data->chip->accel_scale[index][0]) &&
(val2 == data->chip->accel_scale[index][1]))
return sca3300_set_op_mode(data, i);
}
return -EINVAL;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return sca3300_set_frequency(data, val);
default:
return -EINVAL;
}
}
static int sca3300_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct sca3300_data *data = iio_priv(indio_dev);
int index;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = sca3300_read_reg(data, chan->address, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = sca3300_get_op_mode(data, &index);
if (ret)
return ret;
switch (chan->type) {
case IIO_INCLI:
index = data->chip->incli_scale_map[index];
*val = data->chip->incli_scale[index][0];
*val2 = data->chip->incli_scale[index][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
index = data->chip->accel_scale_map[index];
*val = data->chip->accel_scale[index][0];
*val2 = data->chip->accel_scale[index][1];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
ret = sca3300_get_op_mode(data, &index);
if (ret)
return ret;
index = data->chip->freq_map[index];
*val = data->chip->freq_table[index];
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static irqreturn_t sca3300_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct sca3300_data *data = iio_priv(indio_dev);
int bit, ret, val, i = 0;
s16 *channels = (s16 *)data->buffer;
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = sca3300_read_reg(data, indio_dev->channels[bit].address, &val);
if (ret) {
dev_err_ratelimited(&data->spi->dev,
"failed to read register, error: %d\n", ret);
/* handled, but bailing out due to errors */
goto out;
}
channels[i++] = val;
}
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
iio_get_time_ns(indio_dev));
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
/*
* sca3300_init - Device init sequence. See datasheet rev 2 section
* 4.2 Start-Up Sequence for details.
*/
static int sca3300_init(struct sca3300_data *sca_data,
struct iio_dev *indio_dev)
{
int value = 0;
int ret;
int i;
ret = sca3300_write_reg(sca_data, SCA3300_REG_MODE,
SCA3300_MODE_SW_RESET);
if (ret)
return ret;
/*
* Wait 1ms after SW-reset command.
* Wait for the settling of signal paths,
* 15ms for SCA3300 and 25ms for SCL3300,
*/
usleep_range(26e3, 50e3);
ret = sca3300_read_reg(sca_data, SCA3300_REG_WHOAMI, &value);
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(sca3300_chip_tbl); i++) {
if (sca3300_chip_tbl[i].chip_id == value)
break;
}
if (i == ARRAY_SIZE(sca3300_chip_tbl)) {
dev_err(&sca_data->spi->dev, "unknown chip id %x\n", value);
return -ENODEV;
}
sca_data->chip = &sca3300_chip_tbl[i];
if (sca_data->chip->angle_supported) {
ret = sca3300_write_reg(sca_data, SCL3300_REG_ANG_CTRL,
SCL3300_ANG_ENABLE);
if (ret)
return ret;
}
return 0;
}
static int sca3300_debugfs_reg_access(struct iio_dev *indio_dev,
unsigned int reg, unsigned int writeval,
unsigned int *readval)
{
struct sca3300_data *data = iio_priv(indio_dev);
int value;
int ret;
if (reg > SCA3300_REG_SELBANK)
return -EINVAL;
if (!readval)
return sca3300_write_reg(data, reg, writeval);
ret = sca3300_read_reg(data, reg, &value);
if (ret)
return ret;
*readval = value;
return 0;
}
static int sca3300_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct sca3300_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_INCLI:
*vals = (const int *)data->chip->incli_scale;
*length = data->chip->num_incli_scales;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
case IIO_ACCEL:
*vals = (const int *)data->chip->accel_scale;
*length = data->chip->num_accel_scales;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*vals = (const int *)data->chip->freq_table;
*length = data->chip->num_freqs;
*type = IIO_VAL_INT;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static const struct iio_info sca3300_info = {
.read_raw = sca3300_read_raw,
.write_raw = sca3300_write_raw,
.debugfs_reg_access = &sca3300_debugfs_reg_access,
.read_avail = sca3300_read_avail,
};
static int sca3300_probe(struct spi_device *spi)
{
struct sca3300_data *sca_data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*sca_data));
if (!indio_dev)
return -ENOMEM;
sca_data = iio_priv(indio_dev);
mutex_init(&sca_data->lock);
sca_data->spi = spi;
crc8_populate_msb(sca3300_crc_table, SCA3300_CRC8_POLYNOMIAL);
indio_dev->info = &sca3300_info;
ret = sca3300_init(sca_data, indio_dev);
if (ret) {
dev_err(&spi->dev, "failed to init device, error: %d\n", ret);
return ret;
}
indio_dev->name = sca_data->chip->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = sca_data->chip->channels;
indio_dev->num_channels = sca_data->chip->num_channels;
indio_dev->available_scan_masks = sca_data->chip->scan_masks;
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
iio_pollfunc_store_time,
sca3300_trigger_handler, NULL);
if (ret) {
dev_err(&spi->dev,
"iio triggered buffer setup failed, error: %d\n", ret);
return ret;
}
ret = devm_iio_device_register(&spi->dev, indio_dev);
if (ret) {
dev_err(&spi->dev, "iio device register failed, error: %d\n",
ret);
}
return ret;
}
static const struct of_device_id sca3300_dt_ids[] = {
{ .compatible = "murata,sca3300"},
{ .compatible = "murata,scl3300"},
{}
};
MODULE_DEVICE_TABLE(of, sca3300_dt_ids);
static const struct spi_device_id sca3300_ids[] = {
{ "sca3300" },
{ "scl3300" },
{}
};
MODULE_DEVICE_TABLE(spi, sca3300_ids);
static struct spi_driver sca3300_driver = {
.driver = {
.name = SCA3300_ALIAS,
.of_match_table = sca3300_dt_ids,
},
.probe = sca3300_probe,
.id_table = sca3300_ids,
};
module_spi_driver(sca3300_driver);
MODULE_AUTHOR("Tomas Melin <[email protected]>");
MODULE_DESCRIPTION("Murata SCA3300 SPI Accelerometer");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/sca3300.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* BMA220 Digital triaxial acceleration sensor driver
*
* Copyright (c) 2016,2020 Intel Corporation.
*/
#include <linux/bits.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#define BMA220_REG_ID 0x00
#define BMA220_REG_ACCEL_X 0x02
#define BMA220_REG_ACCEL_Y 0x03
#define BMA220_REG_ACCEL_Z 0x04
#define BMA220_REG_RANGE 0x11
#define BMA220_REG_SUSPEND 0x18
#define BMA220_CHIP_ID 0xDD
#define BMA220_READ_MASK BIT(7)
#define BMA220_RANGE_MASK GENMASK(1, 0)
#define BMA220_SUSPEND_SLEEP 0xFF
#define BMA220_SUSPEND_WAKE 0x00
#define BMA220_DEVICE_NAME "bma220"
#define BMA220_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 6, \
.storagebits = 8, \
.shift = 2, \
.endianness = IIO_CPU, \
}, \
}
enum bma220_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
};
static const int bma220_scale_table[][2] = {
{0, 623000}, {1, 248000}, {2, 491000}, {4, 983000},
};
struct bma220_data {
struct spi_device *spi_device;
struct mutex lock;
struct {
s8 chans[3];
/* Ensure timestamp is naturally aligned. */
s64 timestamp __aligned(8);
} scan;
u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
};
static const struct iio_chan_spec bma220_channels[] = {
BMA220_ACCEL_CHANNEL(0, BMA220_REG_ACCEL_X, X),
BMA220_ACCEL_CHANNEL(1, BMA220_REG_ACCEL_Y, Y),
BMA220_ACCEL_CHANNEL(2, BMA220_REG_ACCEL_Z, Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static inline int bma220_read_reg(struct spi_device *spi, u8 reg)
{
return spi_w8r8(spi, reg | BMA220_READ_MASK);
}
static const unsigned long bma220_accel_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0
};
static irqreturn_t bma220_trigger_handler(int irq, void *p)
{
int ret;
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct bma220_data *data = iio_priv(indio_dev);
struct spi_device *spi = data->spi_device;
mutex_lock(&data->lock);
data->tx_buf[0] = BMA220_REG_ACCEL_X | BMA220_READ_MASK;
ret = spi_write_then_read(spi, data->tx_buf, 1, &data->scan.chans,
ARRAY_SIZE(bma220_channels) - 1);
if (ret < 0)
goto err;
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
pf->timestamp);
err:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int bma220_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret;
u8 range_idx;
struct bma220_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = bma220_read_reg(data->spi_device, chan->address);
if (ret < 0)
return -EINVAL;
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = bma220_read_reg(data->spi_device, BMA220_REG_RANGE);
if (ret < 0)
return ret;
range_idx = ret & BMA220_RANGE_MASK;
*val = bma220_scale_table[range_idx][0];
*val2 = bma220_scale_table[range_idx][1];
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static int bma220_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int i;
int ret;
int index = -1;
struct bma220_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
for (i = 0; i < ARRAY_SIZE(bma220_scale_table); i++)
if (val == bma220_scale_table[i][0] &&
val2 == bma220_scale_table[i][1]) {
index = i;
break;
}
if (index < 0)
return -EINVAL;
mutex_lock(&data->lock);
data->tx_buf[0] = BMA220_REG_RANGE;
data->tx_buf[1] = index;
ret = spi_write(data->spi_device, data->tx_buf,
sizeof(data->tx_buf));
if (ret < 0)
dev_err(&data->spi_device->dev,
"failed to set measurement range\n");
mutex_unlock(&data->lock);
return 0;
}
return -EINVAL;
}
static int bma220_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*vals = (int *)bma220_scale_table;
*type = IIO_VAL_INT_PLUS_MICRO;
*length = ARRAY_SIZE(bma220_scale_table) * 2;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static const struct iio_info bma220_info = {
.read_raw = bma220_read_raw,
.write_raw = bma220_write_raw,
.read_avail = bma220_read_avail,
};
static int bma220_init(struct spi_device *spi)
{
int ret;
ret = bma220_read_reg(spi, BMA220_REG_ID);
if (ret != BMA220_CHIP_ID)
return -ENODEV;
/* Make sure the chip is powered on */
ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);
if (ret == BMA220_SUSPEND_WAKE)
ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);
if (ret < 0)
return ret;
if (ret == BMA220_SUSPEND_WAKE)
return -EBUSY;
return 0;
}
static int bma220_power(struct spi_device *spi, bool up)
{
int i, ret;
/**
* The chip can be suspended/woken up by a simple register read.
* So, we need up to 2 register reads of the suspend register
* to make sure that the device is in the desired state.
*/
for (i = 0; i < 2; i++) {
ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);
if (ret < 0)
return ret;
if (up && ret == BMA220_SUSPEND_SLEEP)
return 0;
if (!up && ret == BMA220_SUSPEND_WAKE)
return 0;
}
return -EBUSY;
}
static void bma220_deinit(void *spi)
{
bma220_power(spi, false);
}
static int bma220_probe(struct spi_device *spi)
{
int ret;
struct iio_dev *indio_dev;
struct bma220_data *data;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*data));
if (!indio_dev) {
dev_err(&spi->dev, "iio allocation failed!\n");
return -ENOMEM;
}
data = iio_priv(indio_dev);
data->spi_device = spi;
mutex_init(&data->lock);
indio_dev->info = &bma220_info;
indio_dev->name = BMA220_DEVICE_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = bma220_channels;
indio_dev->num_channels = ARRAY_SIZE(bma220_channels);
indio_dev->available_scan_masks = bma220_accel_scan_masks;
ret = bma220_init(data->spi_device);
if (ret)
return ret;
ret = devm_add_action_or_reset(&spi->dev, bma220_deinit, spi);
if (ret)
return ret;
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
iio_pollfunc_store_time,
bma220_trigger_handler, NULL);
if (ret < 0) {
dev_err(&spi->dev, "iio triggered buffer setup failed\n");
return ret;
}
return devm_iio_device_register(&spi->dev, indio_dev);
}
static int bma220_suspend(struct device *dev)
{
struct spi_device *spi = to_spi_device(dev);
return bma220_power(spi, false);
}
static int bma220_resume(struct device *dev)
{
struct spi_device *spi = to_spi_device(dev);
return bma220_power(spi, true);
}
static DEFINE_SIMPLE_DEV_PM_OPS(bma220_pm_ops, bma220_suspend, bma220_resume);
static const struct spi_device_id bma220_spi_id[] = {
{"bma220", 0},
{}
};
static const struct acpi_device_id bma220_acpi_id[] = {
{"BMA0220", 0},
{}
};
MODULE_DEVICE_TABLE(spi, bma220_spi_id);
static struct spi_driver bma220_driver = {
.driver = {
.name = "bma220_spi",
.pm = pm_sleep_ptr(&bma220_pm_ops),
.acpi_match_table = bma220_acpi_id,
},
.probe = bma220_probe,
.id_table = bma220_spi_id,
};
module_spi_driver(bma220_driver);
MODULE_AUTHOR("Tiberiu Breana <[email protected]>");
MODULE_DESCRIPTION("BMA220 acceleration sensor driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/bma220_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO accel core driver for Freescale MMA7455L 3-axis 10-bit accelerometer
* Copyright 2015 Joachim Eastwood <[email protected]>
*
* UNSUPPORTED hardware features:
* - 8-bit mode with different scales
* - INT1/INT2 interrupts
* - Offset calibration
* - Events
*/
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "mma7455.h"
#define MMA7455_REG_XOUTL 0x00
#define MMA7455_REG_XOUTH 0x01
#define MMA7455_REG_YOUTL 0x02
#define MMA7455_REG_YOUTH 0x03
#define MMA7455_REG_ZOUTL 0x04
#define MMA7455_REG_ZOUTH 0x05
#define MMA7455_REG_STATUS 0x09
#define MMA7455_STATUS_DRDY BIT(0)
#define MMA7455_REG_WHOAMI 0x0f
#define MMA7455_WHOAMI_ID 0x55
#define MMA7455_REG_MCTL 0x16
#define MMA7455_MCTL_MODE_STANDBY 0x00
#define MMA7455_MCTL_MODE_MEASURE 0x01
#define MMA7455_REG_CTL1 0x18
#define MMA7455_CTL1_DFBW_MASK BIT(7)
#define MMA7455_CTL1_DFBW_125HZ BIT(7)
#define MMA7455_CTL1_DFBW_62_5HZ 0
#define MMA7455_REG_TW 0x1e
/*
* When MMA7455 is used in 10-bit it has a fullscale of -8g
* corresponding to raw value -512. The userspace interface
* uses m/s^2 and we declare micro units.
* So scale factor is given by:
* g * 8 * 1e6 / 512 = 153228.90625, with g = 9.80665
*/
#define MMA7455_10BIT_SCALE 153229
struct mma7455_data {
struct regmap *regmap;
/*
* Used to reorganize data. Will ensure correct alignment of
* the timestamp if present
*/
struct {
__le16 channels[3];
s64 ts __aligned(8);
} scan;
};
static int mma7455_drdy(struct mma7455_data *mma7455)
{
struct device *dev = regmap_get_device(mma7455->regmap);
unsigned int reg;
int tries = 3;
int ret;
while (tries-- > 0) {
ret = regmap_read(mma7455->regmap, MMA7455_REG_STATUS, ®);
if (ret)
return ret;
if (reg & MMA7455_STATUS_DRDY)
return 0;
msleep(20);
}
dev_warn(dev, "data not ready\n");
return -EIO;
}
static irqreturn_t mma7455_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct mma7455_data *mma7455 = iio_priv(indio_dev);
int ret;
ret = mma7455_drdy(mma7455);
if (ret)
goto done;
ret = regmap_bulk_read(mma7455->regmap, MMA7455_REG_XOUTL,
mma7455->scan.channels,
sizeof(mma7455->scan.channels));
if (ret)
goto done;
iio_push_to_buffers_with_timestamp(indio_dev, &mma7455->scan,
iio_get_time_ns(indio_dev));
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int mma7455_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma7455_data *mma7455 = iio_priv(indio_dev);
unsigned int reg;
__le16 data;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
ret = mma7455_drdy(mma7455);
if (ret)
return ret;
ret = regmap_bulk_read(mma7455->regmap, chan->address, &data,
sizeof(data));
if (ret)
return ret;
*val = sign_extend32(le16_to_cpu(data),
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = MMA7455_10BIT_SCALE;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = regmap_read(mma7455->regmap, MMA7455_REG_CTL1, ®);
if (ret)
return ret;
if (reg & MMA7455_CTL1_DFBW_MASK)
*val = 250;
else
*val = 125;
return IIO_VAL_INT;
}
return -EINVAL;
}
static int mma7455_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct mma7455_data *mma7455 = iio_priv(indio_dev);
int i;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (val == 250 && val2 == 0)
i = MMA7455_CTL1_DFBW_125HZ;
else if (val == 125 && val2 == 0)
i = MMA7455_CTL1_DFBW_62_5HZ;
else
return -EINVAL;
return regmap_update_bits(mma7455->regmap, MMA7455_REG_CTL1,
MMA7455_CTL1_DFBW_MASK, i);
case IIO_CHAN_INFO_SCALE:
/* In 10-bit mode there is only one scale available */
if (val == 0 && val2 == MMA7455_10BIT_SCALE)
return 0;
break;
}
return -EINVAL;
}
static IIO_CONST_ATTR(sampling_frequency_available, "125 250");
static struct attribute *mma7455_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL
};
static const struct attribute_group mma7455_group = {
.attrs = mma7455_attributes,
};
static const struct iio_info mma7455_info = {
.attrs = &mma7455_group,
.read_raw = mma7455_read_raw,
.write_raw = mma7455_write_raw,
};
#define MMA7455_CHANNEL(axis, idx) { \
.type = IIO_ACCEL, \
.modified = 1, \
.address = MMA7455_REG_##axis##OUTL,\
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = idx, \
.scan_type = { \
.sign = 's', \
.realbits = 10, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
}
static const struct iio_chan_spec mma7455_channels[] = {
MMA7455_CHANNEL(X, 0),
MMA7455_CHANNEL(Y, 1),
MMA7455_CHANNEL(Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const unsigned long mma7455_scan_masks[] = {0x7, 0};
const struct regmap_config mma7455_core_regmap = {
.reg_bits = 8,
.val_bits = 8,
.max_register = MMA7455_REG_TW,
};
EXPORT_SYMBOL_NS_GPL(mma7455_core_regmap, IIO_MMA7455);
int mma7455_core_probe(struct device *dev, struct regmap *regmap,
const char *name)
{
struct mma7455_data *mma7455;
struct iio_dev *indio_dev;
unsigned int reg;
int ret;
ret = regmap_read(regmap, MMA7455_REG_WHOAMI, ®);
if (ret) {
dev_err(dev, "unable to read reg\n");
return ret;
}
if (reg != MMA7455_WHOAMI_ID) {
dev_err(dev, "device id mismatch\n");
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(dev, sizeof(*mma7455));
if (!indio_dev)
return -ENOMEM;
dev_set_drvdata(dev, indio_dev);
mma7455 = iio_priv(indio_dev);
mma7455->regmap = regmap;
indio_dev->info = &mma7455_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mma7455_channels;
indio_dev->num_channels = ARRAY_SIZE(mma7455_channels);
indio_dev->available_scan_masks = mma7455_scan_masks;
regmap_write(mma7455->regmap, MMA7455_REG_MCTL,
MMA7455_MCTL_MODE_MEASURE);
ret = iio_triggered_buffer_setup(indio_dev, NULL,
mma7455_trigger_handler, NULL);
if (ret) {
dev_err(dev, "unable to setup triggered buffer\n");
return ret;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(dev, "unable to register device\n");
iio_triggered_buffer_cleanup(indio_dev);
return ret;
}
return 0;
}
EXPORT_SYMBOL_NS_GPL(mma7455_core_probe, IIO_MMA7455);
void mma7455_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct mma7455_data *mma7455 = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
regmap_write(mma7455->regmap, MMA7455_REG_MCTL,
MMA7455_MCTL_MODE_STANDBY);
}
EXPORT_SYMBOL_NS_GPL(mma7455_core_remove, IIO_MMA7455);
MODULE_AUTHOR("Joachim Eastwood <[email protected]>");
MODULE_DESCRIPTION("Freescale MMA7455L core accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/mma7455_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL345 3-Axis Digital Accelerometer IIO core driver
*
* Copyright (c) 2017 Eva Rachel Retuya <[email protected]>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL345.pdf
*/
#include <linux/module.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/units.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include "adxl345.h"
#define ADXL345_REG_DEVID 0x00
#define ADXL345_REG_OFSX 0x1e
#define ADXL345_REG_OFSY 0x1f
#define ADXL345_REG_OFSZ 0x20
#define ADXL345_REG_OFS_AXIS(index) (ADXL345_REG_OFSX + (index))
#define ADXL345_REG_BW_RATE 0x2C
#define ADXL345_REG_POWER_CTL 0x2D
#define ADXL345_REG_DATA_FORMAT 0x31
#define ADXL345_REG_DATAX0 0x32
#define ADXL345_REG_DATAY0 0x34
#define ADXL345_REG_DATAZ0 0x36
#define ADXL345_REG_DATA_AXIS(index) \
(ADXL345_REG_DATAX0 + (index) * sizeof(__le16))
#define ADXL345_BW_RATE GENMASK(3, 0)
#define ADXL345_BASE_RATE_NANO_HZ 97656250LL
#define ADXL345_POWER_CTL_MEASURE BIT(3)
#define ADXL345_POWER_CTL_STANDBY 0x00
#define ADXL345_DATA_FORMAT_FULL_RES BIT(3) /* Up to 13-bits resolution */
#define ADXL345_DATA_FORMAT_2G 0
#define ADXL345_DATA_FORMAT_4G 1
#define ADXL345_DATA_FORMAT_8G 2
#define ADXL345_DATA_FORMAT_16G 3
#define ADXL345_DEVID 0xE5
/*
* In full-resolution mode, scale factor is maintained at ~4 mg/LSB
* in all g ranges.
*
* At +/- 16g with 13-bit resolution, scale is computed as:
* (16 + 16) * 9.81 / (2^13 - 1) = 0.0383
*/
static const int adxl345_uscale = 38300;
/*
* The Datasheet lists a resolution of Resolution is ~49 mg per LSB. That's
* ~480mm/s**2 per LSB.
*/
static const int adxl375_uscale = 480000;
struct adxl345_data {
struct regmap *regmap;
u8 data_range;
enum adxl345_device_type type;
};
#define ADXL345_CHANNEL(index, axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.address = index, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
}
static const struct iio_chan_spec adxl345_channels[] = {
ADXL345_CHANNEL(0, X),
ADXL345_CHANNEL(1, Y),
ADXL345_CHANNEL(2, Z),
};
static int adxl345_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct adxl345_data *data = iio_priv(indio_dev);
__le16 accel;
long long samp_freq_nhz;
unsigned int regval;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* Data is stored in adjacent registers:
* ADXL345_REG_DATA(X0/Y0/Z0) contain the least significant byte
* and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significant byte
*/
ret = regmap_bulk_read(data->regmap,
ADXL345_REG_DATA_AXIS(chan->address),
&accel, sizeof(accel));
if (ret < 0)
return ret;
*val = sign_extend32(le16_to_cpu(accel), 12);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
switch (data->type) {
case ADXL345:
*val2 = adxl345_uscale;
break;
case ADXL375:
*val2 = adxl375_uscale;
break;
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBBIAS:
ret = regmap_read(data->regmap,
ADXL345_REG_OFS_AXIS(chan->address), ®val);
if (ret < 0)
return ret;
/*
* 8-bit resolution at +/- 2g, that is 4x accel data scale
* factor
*/
*val = sign_extend32(regval, 7) * 4;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = regmap_read(data->regmap, ADXL345_REG_BW_RATE, ®val);
if (ret < 0)
return ret;
samp_freq_nhz = ADXL345_BASE_RATE_NANO_HZ <<
(regval & ADXL345_BW_RATE);
*val = div_s64_rem(samp_freq_nhz, NANOHZ_PER_HZ, val2);
return IIO_VAL_INT_PLUS_NANO;
}
return -EINVAL;
}
static int adxl345_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct adxl345_data *data = iio_priv(indio_dev);
s64 n;
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
/*
* 8-bit resolution at +/- 2g, that is 4x accel data scale
* factor
*/
return regmap_write(data->regmap,
ADXL345_REG_OFS_AXIS(chan->address),
val / 4);
case IIO_CHAN_INFO_SAMP_FREQ:
n = div_s64(val * NANOHZ_PER_HZ + val2,
ADXL345_BASE_RATE_NANO_HZ);
return regmap_update_bits(data->regmap, ADXL345_REG_BW_RATE,
ADXL345_BW_RATE,
clamp_val(ilog2(n), 0,
ADXL345_BW_RATE));
}
return -EINVAL;
}
static int adxl345_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
"0.09765625 0.1953125 0.390625 0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600 3200"
);
static struct attribute *adxl345_attrs[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL
};
static const struct attribute_group adxl345_attrs_group = {
.attrs = adxl345_attrs,
};
static const struct iio_info adxl345_info = {
.attrs = &adxl345_attrs_group,
.read_raw = adxl345_read_raw,
.write_raw = adxl345_write_raw,
.write_raw_get_fmt = adxl345_write_raw_get_fmt,
};
static int adxl345_powerup(void *regmap)
{
return regmap_write(regmap, ADXL345_REG_POWER_CTL, ADXL345_POWER_CTL_MEASURE);
}
static void adxl345_powerdown(void *regmap)
{
regmap_write(regmap, ADXL345_REG_POWER_CTL, ADXL345_POWER_CTL_STANDBY);
}
int adxl345_core_probe(struct device *dev, struct regmap *regmap)
{
enum adxl345_device_type type;
struct adxl345_data *data;
struct iio_dev *indio_dev;
const char *name;
u32 regval;
int ret;
type = (uintptr_t)device_get_match_data(dev);
switch (type) {
case ADXL345:
name = "adxl345";
break;
case ADXL375:
name = "adxl375";
break;
default:
return -EINVAL;
}
ret = regmap_read(regmap, ADXL345_REG_DEVID, ®val);
if (ret < 0)
return dev_err_probe(dev, ret, "Error reading device ID\n");
if (regval != ADXL345_DEVID)
return dev_err_probe(dev, -ENODEV, "Invalid device ID: %x, expected %x\n",
regval, ADXL345_DEVID);
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->regmap = regmap;
data->type = type;
/* Enable full-resolution mode */
data->data_range = ADXL345_DATA_FORMAT_FULL_RES;
ret = regmap_write(data->regmap, ADXL345_REG_DATA_FORMAT,
data->data_range);
if (ret < 0)
return dev_err_probe(dev, ret, "Failed to set data range\n");
indio_dev->name = name;
indio_dev->info = &adxl345_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = adxl345_channels;
indio_dev->num_channels = ARRAY_SIZE(adxl345_channels);
/* Enable measurement mode */
ret = adxl345_powerup(data->regmap);
if (ret < 0)
return dev_err_probe(dev, ret, "Failed to enable measurement mode\n");
ret = devm_add_action_or_reset(dev, adxl345_powerdown, data->regmap);
if (ret < 0)
return ret;
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(adxl345_core_probe, IIO_ADXL345);
MODULE_AUTHOR("Eva Rachel Retuya <[email protected]>");
MODULE_DESCRIPTION("ADXL345 3-Axis Digital Accelerometer core driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/adxl345_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* sca3000_core.c -- support VTI sca3000 series accelerometers via SPI
*
* Copyright (c) 2009 Jonathan Cameron <[email protected]>
*
* See industrialio/accels/sca3000.h for comments.
*/
#include <linux/interrupt.h>
#include <linux/fs.h>
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/sysfs.h>
#include <linux/module.h>
#include <linux/uaccess.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02)
#define SCA3000_READ_REG(a) ((a) << 2)
#define SCA3000_REG_REVID_ADDR 0x00
#define SCA3000_REG_REVID_MAJOR_MASK GENMASK(8, 4)
#define SCA3000_REG_REVID_MINOR_MASK GENMASK(3, 0)
#define SCA3000_REG_STATUS_ADDR 0x02
#define SCA3000_LOCKED BIT(5)
#define SCA3000_EEPROM_CS_ERROR BIT(1)
#define SCA3000_SPI_FRAME_ERROR BIT(0)
/* All reads done using register decrement so no need to directly access LSBs */
#define SCA3000_REG_X_MSB_ADDR 0x05
#define SCA3000_REG_Y_MSB_ADDR 0x07
#define SCA3000_REG_Z_MSB_ADDR 0x09
#define SCA3000_REG_RING_OUT_ADDR 0x0f
/* Temp read untested - the e05 doesn't have the sensor */
#define SCA3000_REG_TEMP_MSB_ADDR 0x13
#define SCA3000_REG_MODE_ADDR 0x14
#define SCA3000_MODE_PROT_MASK 0x28
#define SCA3000_REG_MODE_RING_BUF_ENABLE BIT(7)
#define SCA3000_REG_MODE_RING_BUF_8BIT BIT(6)
/*
* Free fall detection triggers an interrupt if the acceleration
* is below a threshold for equivalent of 25cm drop
*/
#define SCA3000_REG_MODE_FREE_FALL_DETECT BIT(4)
#define SCA3000_REG_MODE_MEAS_MODE_NORMAL 0x00
#define SCA3000_REG_MODE_MEAS_MODE_OP_1 0x01
#define SCA3000_REG_MODE_MEAS_MODE_OP_2 0x02
/*
* In motion detection mode the accelerations are band pass filtered
* (approx 1 - 25Hz) and then a programmable threshold used to trigger
* and interrupt.
*/
#define SCA3000_REG_MODE_MEAS_MODE_MOT_DET 0x03
#define SCA3000_REG_MODE_MODE_MASK 0x03
#define SCA3000_REG_BUF_COUNT_ADDR 0x15
#define SCA3000_REG_INT_STATUS_ADDR 0x16
#define SCA3000_REG_INT_STATUS_THREE_QUARTERS BIT(7)
#define SCA3000_REG_INT_STATUS_HALF BIT(6)
#define SCA3000_INT_STATUS_FREE_FALL BIT(3)
#define SCA3000_INT_STATUS_Y_TRIGGER BIT(2)
#define SCA3000_INT_STATUS_X_TRIGGER BIT(1)
#define SCA3000_INT_STATUS_Z_TRIGGER BIT(0)
/* Used to allow access to multiplexed registers */
#define SCA3000_REG_CTRL_SEL_ADDR 0x18
/* Only available for SCA3000-D03 and SCA3000-D01 */
#define SCA3000_REG_CTRL_SEL_I2C_DISABLE 0x01
#define SCA3000_REG_CTRL_SEL_MD_CTRL 0x02
#define SCA3000_REG_CTRL_SEL_MD_Y_TH 0x03
#define SCA3000_REG_CTRL_SEL_MD_X_TH 0x04
#define SCA3000_REG_CTRL_SEL_MD_Z_TH 0x05
/*
* BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device
* will not function
*/
#define SCA3000_REG_CTRL_SEL_OUT_CTRL 0x0B
#define SCA3000_REG_OUT_CTRL_PROT_MASK 0xE0
#define SCA3000_REG_OUT_CTRL_BUF_X_EN 0x10
#define SCA3000_REG_OUT_CTRL_BUF_Y_EN 0x08
#define SCA3000_REG_OUT_CTRL_BUF_Z_EN 0x04
#define SCA3000_REG_OUT_CTRL_BUF_DIV_MASK 0x03
#define SCA3000_REG_OUT_CTRL_BUF_DIV_4 0x02
#define SCA3000_REG_OUT_CTRL_BUF_DIV_2 0x01
/*
* Control which motion detector interrupts are on.
* For now only OR combinations are supported.
*/
#define SCA3000_MD_CTRL_PROT_MASK 0xC0
#define SCA3000_MD_CTRL_OR_Y BIT(0)
#define SCA3000_MD_CTRL_OR_X BIT(1)
#define SCA3000_MD_CTRL_OR_Z BIT(2)
/* Currently unsupported */
#define SCA3000_MD_CTRL_AND_Y BIT(3)
#define SCA3000_MD_CTRL_AND_X BIT(4)
#define SCA3000_MD_CTRL_AND_Z BIT(5)
/*
* Some control registers of complex access methods requiring this register to
* be used to remove a lock.
*/
#define SCA3000_REG_UNLOCK_ADDR 0x1e
#define SCA3000_REG_INT_MASK_ADDR 0x21
#define SCA3000_REG_INT_MASK_PROT_MASK 0x1C
#define SCA3000_REG_INT_MASK_RING_THREE_QUARTER BIT(7)
#define SCA3000_REG_INT_MASK_RING_HALF BIT(6)
#define SCA3000_REG_INT_MASK_ALL_INTS 0x02
#define SCA3000_REG_INT_MASK_ACTIVE_HIGH 0x01
#define SCA3000_REG_INT_MASK_ACTIVE_LOW 0x00
/* Values of multiplexed registers (write to ctrl_data after select) */
#define SCA3000_REG_CTRL_DATA_ADDR 0x22
/*
* Measurement modes available on some sca3000 series chips. Code assumes others
* may become available in the future.
*
* Bypass - Bypass the low-pass filter in the signal channel so as to increase
* signal bandwidth.
*
* Narrow - Narrow low-pass filtering of the signal channel and half output
* data rate by decimation.
*
* Wide - Widen low-pass filtering of signal channel to increase bandwidth
*/
#define SCA3000_OP_MODE_BYPASS 0x01
#define SCA3000_OP_MODE_NARROW 0x02
#define SCA3000_OP_MODE_WIDE 0x04
#define SCA3000_MAX_TX 6
#define SCA3000_MAX_RX 2
/**
* struct sca3000_state - device instance state information
* @us: the associated spi device
* @info: chip variant information
* @last_timestamp: the timestamp of the last event
* @mo_det_use_count: reference counter for the motion detection unit
* @lock: lock used to protect elements of sca3000_state
* and the underlying device state.
* @tx: dma-able transmit buffer
* @rx: dma-able receive buffer
**/
struct sca3000_state {
struct spi_device *us;
const struct sca3000_chip_info *info;
s64 last_timestamp;
int mo_det_use_count;
struct mutex lock;
/* Can these share a cacheline ? */
u8 rx[384] __aligned(IIO_DMA_MINALIGN);
u8 tx[6] __aligned(IIO_DMA_MINALIGN);
};
/**
* struct sca3000_chip_info - model dependent parameters
* @scale: scale * 10^-6
* @temp_output: some devices have temperature sensors.
* @measurement_mode_freq: normal mode sampling frequency
* @measurement_mode_3db_freq: 3db cutoff frequency of the low pass filter for
* the normal measurement mode.
* @option_mode_1: first optional mode. Not all models have one
* @option_mode_1_freq: option mode 1 sampling frequency
* @option_mode_1_3db_freq: 3db cutoff frequency of the low pass filter for
* the first option mode.
* @option_mode_2: second optional mode. Not all chips have one
* @option_mode_2_freq: option mode 2 sampling frequency
* @option_mode_2_3db_freq: 3db cutoff frequency of the low pass filter for
* the second option mode.
* @mot_det_mult_xz: Bit wise multipliers to calculate the threshold
* for motion detection in the x and z axis.
* @mot_det_mult_y: Bit wise multipliers to calculate the threshold
* for motion detection in the y axis.
*
* This structure is used to hold information about the functionality of a given
* sca3000 variant.
**/
struct sca3000_chip_info {
unsigned int scale;
bool temp_output;
int measurement_mode_freq;
int measurement_mode_3db_freq;
int option_mode_1;
int option_mode_1_freq;
int option_mode_1_3db_freq;
int option_mode_2;
int option_mode_2_freq;
int option_mode_2_3db_freq;
int mot_det_mult_xz[6];
int mot_det_mult_y[7];
};
enum sca3000_variant {
d01,
e02,
e04,
e05,
};
/*
* Note where option modes are not defined, the chip simply does not
* support any.
* Other chips in the sca3000 series use i2c and are not included here.
*
* Some of these devices are only listed in the family data sheet and
* do not actually appear to be available.
*/
static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = {
[d01] = {
.scale = 7357,
.temp_output = true,
.measurement_mode_freq = 250,
.measurement_mode_3db_freq = 45,
.option_mode_1 = SCA3000_OP_MODE_BYPASS,
.option_mode_1_freq = 250,
.option_mode_1_3db_freq = 70,
.mot_det_mult_xz = {50, 100, 200, 350, 650, 1300},
.mot_det_mult_y = {50, 100, 150, 250, 450, 850, 1750},
},
[e02] = {
.scale = 9810,
.measurement_mode_freq = 125,
.measurement_mode_3db_freq = 40,
.option_mode_1 = SCA3000_OP_MODE_NARROW,
.option_mode_1_freq = 63,
.option_mode_1_3db_freq = 11,
.mot_det_mult_xz = {100, 150, 300, 550, 1050, 2050},
.mot_det_mult_y = {50, 100, 200, 350, 700, 1350, 2700},
},
[e04] = {
.scale = 19620,
.measurement_mode_freq = 100,
.measurement_mode_3db_freq = 38,
.option_mode_1 = SCA3000_OP_MODE_NARROW,
.option_mode_1_freq = 50,
.option_mode_1_3db_freq = 9,
.option_mode_2 = SCA3000_OP_MODE_WIDE,
.option_mode_2_freq = 400,
.option_mode_2_3db_freq = 70,
.mot_det_mult_xz = {200, 300, 600, 1100, 2100, 4100},
.mot_det_mult_y = {100, 200, 400, 7000, 1400, 2700, 54000},
},
[e05] = {
.scale = 61313,
.measurement_mode_freq = 200,
.measurement_mode_3db_freq = 60,
.option_mode_1 = SCA3000_OP_MODE_NARROW,
.option_mode_1_freq = 50,
.option_mode_1_3db_freq = 9,
.option_mode_2 = SCA3000_OP_MODE_WIDE,
.option_mode_2_freq = 400,
.option_mode_2_3db_freq = 75,
.mot_det_mult_xz = {600, 900, 1700, 3200, 6100, 11900},
.mot_det_mult_y = {300, 600, 1200, 2000, 4100, 7800, 15600},
},
};
static int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val)
{
st->tx[0] = SCA3000_WRITE_REG(address);
st->tx[1] = val;
return spi_write(st->us, st->tx, 2);
}
static int sca3000_read_data_short(struct sca3000_state *st,
u8 reg_address_high,
int len)
{
struct spi_transfer xfer[2] = {
{
.len = 1,
.tx_buf = st->tx,
}, {
.len = len,
.rx_buf = st->rx,
}
};
st->tx[0] = SCA3000_READ_REG(reg_address_high);
return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
}
/**
* sca3000_reg_lock_on() - test if the ctrl register lock is on
* @st: Driver specific device instance data.
*
* Lock must be held.
**/
static int sca3000_reg_lock_on(struct sca3000_state *st)
{
int ret;
ret = sca3000_read_data_short(st, SCA3000_REG_STATUS_ADDR, 1);
if (ret < 0)
return ret;
return !(st->rx[0] & SCA3000_LOCKED);
}
/**
* __sca3000_unlock_reg_lock() - unlock the control registers
* @st: Driver specific device instance data.
*
* Note the device does not appear to support doing this in a single transfer.
* This should only ever be used as part of ctrl reg read.
* Lock must be held before calling this
*/
static int __sca3000_unlock_reg_lock(struct sca3000_state *st)
{
struct spi_transfer xfer[3] = {
{
.len = 2,
.cs_change = 1,
.tx_buf = st->tx,
}, {
.len = 2,
.cs_change = 1,
.tx_buf = st->tx + 2,
}, {
.len = 2,
.tx_buf = st->tx + 4,
},
};
st->tx[0] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
st->tx[1] = 0x00;
st->tx[2] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
st->tx[3] = 0x50;
st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
st->tx[5] = 0xA0;
return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
}
/**
* sca3000_write_ctrl_reg() - write to a lock protect ctrl register
* @st: Driver specific device instance data.
* @sel: selects which registers we wish to write to
* @val: the value to be written
*
* Certain control registers are protected against overwriting by the lock
* register and use a shared write address. This function allows writing of
* these registers.
* Lock must be held.
*/
static int sca3000_write_ctrl_reg(struct sca3000_state *st,
u8 sel,
uint8_t val)
{
int ret;
ret = sca3000_reg_lock_on(st);
if (ret < 0)
goto error_ret;
if (ret) {
ret = __sca3000_unlock_reg_lock(st);
if (ret)
goto error_ret;
}
/* Set the control select register */
ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, sel);
if (ret)
goto error_ret;
/* Write the actual value into the register */
ret = sca3000_write_reg(st, SCA3000_REG_CTRL_DATA_ADDR, val);
error_ret:
return ret;
}
/**
* sca3000_read_ctrl_reg() - read from lock protected control register.
* @st: Driver specific device instance data.
* @ctrl_reg: Which ctrl register do we want to read.
*
* Lock must be held.
*/
static int sca3000_read_ctrl_reg(struct sca3000_state *st,
u8 ctrl_reg)
{
int ret;
ret = sca3000_reg_lock_on(st);
if (ret < 0)
goto error_ret;
if (ret) {
ret = __sca3000_unlock_reg_lock(st);
if (ret)
goto error_ret;
}
/* Set the control select register */
ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, ctrl_reg);
if (ret)
goto error_ret;
ret = sca3000_read_data_short(st, SCA3000_REG_CTRL_DATA_ADDR, 1);
if (ret)
goto error_ret;
return st->rx[0];
error_ret:
return ret;
}
/**
* sca3000_print_rev() - sysfs interface to read the chip revision number
* @indio_dev: Device instance specific generic IIO data.
* Driver specific device instance data can be obtained via
* iio_priv(indio_dev)
*/
static int sca3000_print_rev(struct iio_dev *indio_dev)
{
int ret;
struct sca3000_state *st = iio_priv(indio_dev);
mutex_lock(&st->lock);
ret = sca3000_read_data_short(st, SCA3000_REG_REVID_ADDR, 1);
if (ret < 0)
goto error_ret;
dev_info(&indio_dev->dev,
"sca3000 revision major=%lu, minor=%lu\n",
st->rx[0] & SCA3000_REG_REVID_MAJOR_MASK,
st->rx[0] & SCA3000_REG_REVID_MINOR_MASK);
error_ret:
mutex_unlock(&st->lock);
return ret;
}
static ssize_t
sca3000_show_available_3db_freqs(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct sca3000_state *st = iio_priv(indio_dev);
int len;
len = sprintf(buf, "%d", st->info->measurement_mode_3db_freq);
if (st->info->option_mode_1)
len += sprintf(buf + len, " %d",
st->info->option_mode_1_3db_freq);
if (st->info->option_mode_2)
len += sprintf(buf + len, " %d",
st->info->option_mode_2_3db_freq);
len += sprintf(buf + len, "\n");
return len;
}
static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
S_IRUGO, sca3000_show_available_3db_freqs,
NULL, 0);
static const struct iio_event_spec sca3000_event = {
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE),
};
/*
* Note the hack in the number of bits to pretend we have 2 more than
* we do in the fifo.
*/
#define SCA3000_CHAN(index, mod) \
{ \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = mod, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |\
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),\
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
.address = index, \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 13, \
.storagebits = 16, \
.shift = 3, \
.endianness = IIO_BE, \
}, \
.event_spec = &sca3000_event, \
.num_event_specs = 1, \
}
static const struct iio_event_spec sca3000_freefall_event_spec = {
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_FALLING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_PERIOD),
};
static const struct iio_chan_spec sca3000_channels[] = {
SCA3000_CHAN(0, IIO_MOD_X),
SCA3000_CHAN(1, IIO_MOD_Y),
SCA3000_CHAN(2, IIO_MOD_Z),
{
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_X_AND_Y_AND_Z,
.scan_index = -1, /* Fake channel */
.event_spec = &sca3000_freefall_event_spec,
.num_event_specs = 1,
},
};
static const struct iio_chan_spec sca3000_channels_with_temp[] = {
SCA3000_CHAN(0, IIO_MOD_X),
SCA3000_CHAN(1, IIO_MOD_Y),
SCA3000_CHAN(2, IIO_MOD_Z),
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
/* No buffer support */
.scan_index = -1,
.scan_type = {
.sign = 'u',
.realbits = 9,
.storagebits = 16,
.shift = 5,
.endianness = IIO_BE,
},
},
{
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_X_AND_Y_AND_Z,
.scan_index = -1, /* Fake channel */
.event_spec = &sca3000_freefall_event_spec,
.num_event_specs = 1,
},
};
static u8 sca3000_addresses[3][3] = {
[0] = {SCA3000_REG_X_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_X_TH,
SCA3000_MD_CTRL_OR_X},
[1] = {SCA3000_REG_Y_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Y_TH,
SCA3000_MD_CTRL_OR_Y},
[2] = {SCA3000_REG_Z_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Z_TH,
SCA3000_MD_CTRL_OR_Z},
};
/**
* __sca3000_get_base_freq() - obtain mode specific base frequency
* @st: Private driver specific device instance specific state.
* @info: chip type specific information.
* @base_freq: Base frequency for the current measurement mode.
*
* lock must be held
*/
static inline int __sca3000_get_base_freq(struct sca3000_state *st,
const struct sca3000_chip_info *info,
int *base_freq)
{
int ret;
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
goto error_ret;
switch (SCA3000_REG_MODE_MODE_MASK & st->rx[0]) {
case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
*base_freq = info->measurement_mode_freq;
break;
case SCA3000_REG_MODE_MEAS_MODE_OP_1:
*base_freq = info->option_mode_1_freq;
break;
case SCA3000_REG_MODE_MEAS_MODE_OP_2:
*base_freq = info->option_mode_2_freq;
break;
default:
ret = -EINVAL;
}
error_ret:
return ret;
}
/**
* sca3000_read_raw_samp_freq() - read_raw handler for IIO_CHAN_INFO_SAMP_FREQ
* @st: Private driver specific device instance specific state.
* @val: The frequency read back.
*
* lock must be held
**/
static int sca3000_read_raw_samp_freq(struct sca3000_state *st, int *val)
{
int ret;
ret = __sca3000_get_base_freq(st, st->info, val);
if (ret)
return ret;
ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
if (ret < 0)
return ret;
if (*val > 0) {
ret &= SCA3000_REG_OUT_CTRL_BUF_DIV_MASK;
switch (ret) {
case SCA3000_REG_OUT_CTRL_BUF_DIV_2:
*val /= 2;
break;
case SCA3000_REG_OUT_CTRL_BUF_DIV_4:
*val /= 4;
break;
}
}
return 0;
}
/**
* sca3000_write_raw_samp_freq() - write_raw handler for IIO_CHAN_INFO_SAMP_FREQ
* @st: Private driver specific device instance specific state.
* @val: The frequency desired.
*
* lock must be held
*/
static int sca3000_write_raw_samp_freq(struct sca3000_state *st, int val)
{
int ret, base_freq, ctrlval;
ret = __sca3000_get_base_freq(st, st->info, &base_freq);
if (ret)
return ret;
ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
if (ret < 0)
return ret;
ctrlval = ret & ~SCA3000_REG_OUT_CTRL_BUF_DIV_MASK;
if (val == base_freq / 2)
ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_2;
if (val == base_freq / 4)
ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_4;
else if (val != base_freq)
return -EINVAL;
return sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
ctrlval);
}
static int sca3000_read_3db_freq(struct sca3000_state *st, int *val)
{
int ret;
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
return ret;
/* mask bottom 2 bits - only ones that are relevant */
st->rx[0] &= SCA3000_REG_MODE_MODE_MASK;
switch (st->rx[0]) {
case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
*val = st->info->measurement_mode_3db_freq;
return IIO_VAL_INT;
case SCA3000_REG_MODE_MEAS_MODE_MOT_DET:
return -EBUSY;
case SCA3000_REG_MODE_MEAS_MODE_OP_1:
*val = st->info->option_mode_1_3db_freq;
return IIO_VAL_INT;
case SCA3000_REG_MODE_MEAS_MODE_OP_2:
*val = st->info->option_mode_2_3db_freq;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int sca3000_write_3db_freq(struct sca3000_state *st, int val)
{
int ret;
int mode;
if (val == st->info->measurement_mode_3db_freq)
mode = SCA3000_REG_MODE_MEAS_MODE_NORMAL;
else if (st->info->option_mode_1 &&
(val == st->info->option_mode_1_3db_freq))
mode = SCA3000_REG_MODE_MEAS_MODE_OP_1;
else if (st->info->option_mode_2 &&
(val == st->info->option_mode_2_3db_freq))
mode = SCA3000_REG_MODE_MEAS_MODE_OP_2;
else
return -EINVAL;
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
return ret;
st->rx[0] &= ~SCA3000_REG_MODE_MODE_MASK;
st->rx[0] |= (mode & SCA3000_REG_MODE_MODE_MASK);
return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, st->rx[0]);
}
static int sca3000_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long mask)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret;
u8 address;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&st->lock);
if (chan->type == IIO_ACCEL) {
if (st->mo_det_use_count) {
mutex_unlock(&st->lock);
return -EBUSY;
}
address = sca3000_addresses[chan->address][0];
ret = sca3000_read_data_short(st, address, 2);
if (ret < 0) {
mutex_unlock(&st->lock);
return ret;
}
*val = sign_extend32(be16_to_cpup((__be16 *)st->rx) >>
chan->scan_type.shift,
chan->scan_type.realbits - 1);
} else {
/* get the temperature when available */
ret = sca3000_read_data_short(st,
SCA3000_REG_TEMP_MSB_ADDR,
2);
if (ret < 0) {
mutex_unlock(&st->lock);
return ret;
}
*val = (be16_to_cpup((__be16 *)st->rx) >>
chan->scan_type.shift) &
GENMASK(chan->scan_type.realbits - 1, 0);
}
mutex_unlock(&st->lock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
if (chan->type == IIO_ACCEL)
*val2 = st->info->scale;
else /* temperature */
*val2 = 555556;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_OFFSET:
*val = -214;
*val2 = 600000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&st->lock);
ret = sca3000_read_raw_samp_freq(st, val);
mutex_unlock(&st->lock);
return ret ? ret : IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
mutex_lock(&st->lock);
ret = sca3000_read_3db_freq(st, val);
mutex_unlock(&st->lock);
return ret;
default:
return -EINVAL;
}
}
static int sca3000_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (val2)
return -EINVAL;
mutex_lock(&st->lock);
ret = sca3000_write_raw_samp_freq(st, val);
mutex_unlock(&st->lock);
return ret;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
if (val2)
return -EINVAL;
mutex_lock(&st->lock);
ret = sca3000_write_3db_freq(st, val);
mutex_unlock(&st->lock);
return ret;
default:
return -EINVAL;
}
return ret;
}
/**
* sca3000_read_av_freq() - sysfs function to get available frequencies
* @dev: Device structure for this device.
* @attr: Description of the attribute.
* @buf: Incoming string
*
* The later modes are only relevant to the ring buffer - and depend on current
* mode. Note that data sheet gives rather wide tolerances for these so integer
* division will give good enough answer and not all chips have them specified
* at all.
**/
static ssize_t sca3000_read_av_freq(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct sca3000_state *st = iio_priv(indio_dev);
int len = 0, ret, val;
mutex_lock(&st->lock);
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
val = st->rx[0];
mutex_unlock(&st->lock);
if (ret)
goto error_ret;
switch (val & SCA3000_REG_MODE_MODE_MASK) {
case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
len += sprintf(buf + len, "%d %d %d\n",
st->info->measurement_mode_freq,
st->info->measurement_mode_freq / 2,
st->info->measurement_mode_freq / 4);
break;
case SCA3000_REG_MODE_MEAS_MODE_OP_1:
len += sprintf(buf + len, "%d %d %d\n",
st->info->option_mode_1_freq,
st->info->option_mode_1_freq / 2,
st->info->option_mode_1_freq / 4);
break;
case SCA3000_REG_MODE_MEAS_MODE_OP_2:
len += sprintf(buf + len, "%d %d %d\n",
st->info->option_mode_2_freq,
st->info->option_mode_2_freq / 2,
st->info->option_mode_2_freq / 4);
break;
}
return len;
error_ret:
return ret;
}
/*
* Should only really be registered if ring buffer support is compiled in.
* Does no harm however and doing it right would add a fair bit of complexity
*/
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq);
/*
* sca3000_read_event_value() - query of a threshold or period
*/
static int sca3000_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct sca3000_state *st = iio_priv(indio_dev);
long ret;
int i;
switch (info) {
case IIO_EV_INFO_VALUE:
mutex_lock(&st->lock);
ret = sca3000_read_ctrl_reg(st,
sca3000_addresses[chan->address][1]);
mutex_unlock(&st->lock);
if (ret < 0)
return ret;
*val = 0;
if (chan->channel2 == IIO_MOD_Y)
for_each_set_bit(i, &ret,
ARRAY_SIZE(st->info->mot_det_mult_y))
*val += st->info->mot_det_mult_y[i];
else
for_each_set_bit(i, &ret,
ARRAY_SIZE(st->info->mot_det_mult_xz))
*val += st->info->mot_det_mult_xz[i];
return IIO_VAL_INT;
case IIO_EV_INFO_PERIOD:
*val = 0;
*val2 = 226000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
/**
* sca3000_write_event_value() - control of threshold and period
* @indio_dev: Device instance specific IIO information.
* @chan: Description of the channel for which the event is being
* configured.
* @type: The type of event being configured, here magnitude rising
* as everything else is read only.
* @dir: Direction of the event (here rising)
* @info: What information about the event are we configuring.
* Here the threshold only.
* @val: Integer part of the value being written..
* @val2: Non integer part of the value being written. Here always 0.
*/
static int sca3000_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret;
int i;
u8 nonlinear = 0;
if (chan->channel2 == IIO_MOD_Y) {
i = ARRAY_SIZE(st->info->mot_det_mult_y);
while (i > 0)
if (val >= st->info->mot_det_mult_y[--i]) {
nonlinear |= (1 << i);
val -= st->info->mot_det_mult_y[i];
}
} else {
i = ARRAY_SIZE(st->info->mot_det_mult_xz);
while (i > 0)
if (val >= st->info->mot_det_mult_xz[--i]) {
nonlinear |= (1 << i);
val -= st->info->mot_det_mult_xz[i];
}
}
mutex_lock(&st->lock);
ret = sca3000_write_ctrl_reg(st,
sca3000_addresses[chan->address][1],
nonlinear);
mutex_unlock(&st->lock);
return ret;
}
static struct attribute *sca3000_attributes[] = {
&iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr,
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group sca3000_attribute_group = {
.attrs = sca3000_attributes,
};
static int sca3000_read_data(struct sca3000_state *st,
u8 reg_address_high,
u8 *rx,
int len)
{
int ret;
struct spi_transfer xfer[2] = {
{
.len = 1,
.tx_buf = st->tx,
}, {
.len = len,
.rx_buf = rx,
}
};
st->tx[0] = SCA3000_READ_REG(reg_address_high);
ret = spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
if (ret) {
dev_err(&st->us->dev, "problem reading register\n");
return ret;
}
return 0;
}
/**
* sca3000_ring_int_process() - ring specific interrupt handling.
* @val: Value of the interrupt status register.
* @indio_dev: Device instance specific IIO device structure.
*/
static void sca3000_ring_int_process(u8 val, struct iio_dev *indio_dev)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret, i, num_available;
mutex_lock(&st->lock);
if (val & SCA3000_REG_INT_STATUS_HALF) {
ret = sca3000_read_data_short(st, SCA3000_REG_BUF_COUNT_ADDR,
1);
if (ret)
goto error_ret;
num_available = st->rx[0];
/*
* num_available is the total number of samples available
* i.e. number of time points * number of channels.
*/
ret = sca3000_read_data(st, SCA3000_REG_RING_OUT_ADDR, st->rx,
num_available * 2);
if (ret)
goto error_ret;
for (i = 0; i < num_available / 3; i++) {
/*
* Dirty hack to cover for 11 bit in fifo, 13 bit
* direct reading.
*
* In theory the bottom two bits are undefined.
* In reality they appear to always be 0.
*/
iio_push_to_buffers(indio_dev, st->rx + i * 3 * 2);
}
}
error_ret:
mutex_unlock(&st->lock);
}
/**
* sca3000_event_handler() - handling ring and non ring events
* @irq: The irq being handled.
* @private: struct iio_device pointer for the device.
*
* Ring related interrupt handler. Depending on event, push to
* the ring buffer event chrdev or the event one.
*
* This function is complicated by the fact that the devices can signify ring
* and non ring events via the same interrupt line and they can only
* be distinguished via a read of the relevant status register.
*/
static irqreturn_t sca3000_event_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct sca3000_state *st = iio_priv(indio_dev);
int ret, val;
s64 last_timestamp = iio_get_time_ns(indio_dev);
/*
* Could lead if badly timed to an extra read of status reg,
* but ensures no interrupt is missed.
*/
mutex_lock(&st->lock);
ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
val = st->rx[0];
mutex_unlock(&st->lock);
if (ret)
goto done;
sca3000_ring_int_process(val, indio_dev);
if (val & SCA3000_INT_STATUS_FREE_FALL)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X_AND_Y_AND_Z,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_FALLING),
last_timestamp);
if (val & SCA3000_INT_STATUS_Y_TRIGGER)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
last_timestamp);
if (val & SCA3000_INT_STATUS_X_TRIGGER)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
last_timestamp);
if (val & SCA3000_INT_STATUS_Z_TRIGGER)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
last_timestamp);
done:
return IRQ_HANDLED;
}
/*
* sca3000_read_event_config() what events are enabled
*/
static int sca3000_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret;
/* read current value of mode register */
mutex_lock(&st->lock);
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
goto error_ret;
switch (chan->channel2) {
case IIO_MOD_X_AND_Y_AND_Z:
ret = !!(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT);
break;
case IIO_MOD_X:
case IIO_MOD_Y:
case IIO_MOD_Z:
/*
* Motion detection mode cannot run at the same time as
* acceleration data being read.
*/
if ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
!= SCA3000_REG_MODE_MEAS_MODE_MOT_DET) {
ret = 0;
} else {
ret = sca3000_read_ctrl_reg(st,
SCA3000_REG_CTRL_SEL_MD_CTRL);
if (ret < 0)
goto error_ret;
/* only supporting logical or's for now */
ret = !!(ret & sca3000_addresses[chan->address][2]);
}
break;
default:
ret = -EINVAL;
}
error_ret:
mutex_unlock(&st->lock);
return ret;
}
static int sca3000_freefall_set_state(struct iio_dev *indio_dev, int state)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret;
/* read current value of mode register */
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
return ret;
/* if off and should be on */
if (state && !(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
st->rx[0] | SCA3000_REG_MODE_FREE_FALL_DETECT);
/* if on and should be off */
else if (!state && (st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
st->rx[0] & ~SCA3000_REG_MODE_FREE_FALL_DETECT);
else
return 0;
}
static int sca3000_motion_detect_set_state(struct iio_dev *indio_dev, int axis,
int state)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret, ctrlval;
/*
* First read the motion detector config to find out if
* this axis is on
*/
ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
if (ret < 0)
return ret;
ctrlval = ret;
/* if off and should be on */
if (state && !(ctrlval & sca3000_addresses[axis][2])) {
ret = sca3000_write_ctrl_reg(st,
SCA3000_REG_CTRL_SEL_MD_CTRL,
ctrlval |
sca3000_addresses[axis][2]);
if (ret)
return ret;
st->mo_det_use_count++;
} else if (!state && (ctrlval & sca3000_addresses[axis][2])) {
ret = sca3000_write_ctrl_reg(st,
SCA3000_REG_CTRL_SEL_MD_CTRL,
ctrlval &
~(sca3000_addresses[axis][2]));
if (ret)
return ret;
st->mo_det_use_count--;
}
/* read current value of mode register */
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
return ret;
/* if off and should be on */
if ((st->mo_det_use_count) &&
((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
!= SCA3000_REG_MODE_MEAS_MODE_MOT_DET))
return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
(st->rx[0] & ~SCA3000_REG_MODE_MODE_MASK)
| SCA3000_REG_MODE_MEAS_MODE_MOT_DET);
/* if on and should be off */
else if (!(st->mo_det_use_count) &&
((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
== SCA3000_REG_MODE_MEAS_MODE_MOT_DET))
return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
st->rx[0] & SCA3000_REG_MODE_MODE_MASK);
else
return 0;
}
/**
* sca3000_write_event_config() - simple on off control for motion detector
* @indio_dev: IIO device instance specific structure. Data specific to this
* particular driver may be accessed via iio_priv(indio_dev).
* @chan: Description of the channel whose event we are configuring.
* @type: The type of event.
* @dir: The direction of the event.
* @state: Desired state of event being configured.
*
* This is a per axis control, but enabling any will result in the
* motion detector unit being enabled.
* N.B. enabling motion detector stops normal data acquisition.
* There is a complexity in knowing which mode to return to when
* this mode is disabled. Currently normal mode is assumed.
**/
static int sca3000_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret;
mutex_lock(&st->lock);
switch (chan->channel2) {
case IIO_MOD_X_AND_Y_AND_Z:
ret = sca3000_freefall_set_state(indio_dev, state);
break;
case IIO_MOD_X:
case IIO_MOD_Y:
case IIO_MOD_Z:
ret = sca3000_motion_detect_set_state(indio_dev,
chan->address,
state);
break;
default:
ret = -EINVAL;
break;
}
mutex_unlock(&st->lock);
return ret;
}
static inline
int __sca3000_hw_ring_state_set(struct iio_dev *indio_dev, bool state)
{
struct sca3000_state *st = iio_priv(indio_dev);
int ret;
mutex_lock(&st->lock);
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
goto error_ret;
if (state) {
dev_info(&indio_dev->dev, "supposedly enabling ring buffer\n");
ret = sca3000_write_reg(st,
SCA3000_REG_MODE_ADDR,
(st->rx[0] | SCA3000_REG_MODE_RING_BUF_ENABLE));
} else
ret = sca3000_write_reg(st,
SCA3000_REG_MODE_ADDR,
(st->rx[0] & ~SCA3000_REG_MODE_RING_BUF_ENABLE));
error_ret:
mutex_unlock(&st->lock);
return ret;
}
/**
* sca3000_hw_ring_preenable() - hw ring buffer preenable function
* @indio_dev: structure representing the IIO device. Device instance
* specific state can be accessed via iio_priv(indio_dev).
*
* Very simple enable function as the chip will allows normal reads
* during ring buffer operation so as long as it is indeed running
* before we notify the core, the precise ordering does not matter.
*/
static int sca3000_hw_ring_preenable(struct iio_dev *indio_dev)
{
int ret;
struct sca3000_state *st = iio_priv(indio_dev);
mutex_lock(&st->lock);
/* Enable the 50% full interrupt */
ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
if (ret)
goto error_unlock;
ret = sca3000_write_reg(st,
SCA3000_REG_INT_MASK_ADDR,
st->rx[0] | SCA3000_REG_INT_MASK_RING_HALF);
if (ret)
goto error_unlock;
mutex_unlock(&st->lock);
return __sca3000_hw_ring_state_set(indio_dev, 1);
error_unlock:
mutex_unlock(&st->lock);
return ret;
}
static int sca3000_hw_ring_postdisable(struct iio_dev *indio_dev)
{
int ret;
struct sca3000_state *st = iio_priv(indio_dev);
ret = __sca3000_hw_ring_state_set(indio_dev, 0);
if (ret)
return ret;
/* Disable the 50% full interrupt */
mutex_lock(&st->lock);
ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
if (ret)
goto unlock;
ret = sca3000_write_reg(st,
SCA3000_REG_INT_MASK_ADDR,
st->rx[0] & ~SCA3000_REG_INT_MASK_RING_HALF);
unlock:
mutex_unlock(&st->lock);
return ret;
}
static const struct iio_buffer_setup_ops sca3000_ring_setup_ops = {
.preenable = &sca3000_hw_ring_preenable,
.postdisable = &sca3000_hw_ring_postdisable,
};
/**
* sca3000_clean_setup() - get the device into a predictable state
* @st: Device instance specific private data structure
*
* Devices use flash memory to store many of the register values
* and hence can come up in somewhat unpredictable states.
* Hence reset everything on driver load.
*/
static int sca3000_clean_setup(struct sca3000_state *st)
{
int ret;
mutex_lock(&st->lock);
/* Ensure all interrupts have been acknowledged */
ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
if (ret)
goto error_ret;
/* Turn off all motion detection channels */
ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
if (ret < 0)
goto error_ret;
ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL,
ret & SCA3000_MD_CTRL_PROT_MASK);
if (ret)
goto error_ret;
/* Disable ring buffer */
ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
if (ret < 0)
goto error_ret;
ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
(ret & SCA3000_REG_OUT_CTRL_PROT_MASK)
| SCA3000_REG_OUT_CTRL_BUF_X_EN
| SCA3000_REG_OUT_CTRL_BUF_Y_EN
| SCA3000_REG_OUT_CTRL_BUF_Z_EN
| SCA3000_REG_OUT_CTRL_BUF_DIV_4);
if (ret)
goto error_ret;
/* Enable interrupts, relevant to mode and set up as active low */
ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
if (ret)
goto error_ret;
ret = sca3000_write_reg(st,
SCA3000_REG_INT_MASK_ADDR,
(ret & SCA3000_REG_INT_MASK_PROT_MASK)
| SCA3000_REG_INT_MASK_ACTIVE_LOW);
if (ret)
goto error_ret;
/*
* Select normal measurement mode, free fall off, ring off
* Ring in 12 bit mode - it is fine to overwrite reserved bits 3,5
* as that occurs in one of the example on the datasheet
*/
ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
if (ret)
goto error_ret;
ret = sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
(st->rx[0] & SCA3000_MODE_PROT_MASK));
error_ret:
mutex_unlock(&st->lock);
return ret;
}
static const struct iio_info sca3000_info = {
.attrs = &sca3000_attribute_group,
.read_raw = &sca3000_read_raw,
.write_raw = &sca3000_write_raw,
.read_event_value = &sca3000_read_event_value,
.write_event_value = &sca3000_write_event_value,
.read_event_config = &sca3000_read_event_config,
.write_event_config = &sca3000_write_event_config,
};
static int sca3000_probe(struct spi_device *spi)
{
int ret;
struct sca3000_state *st;
struct iio_dev *indio_dev;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
spi_set_drvdata(spi, indio_dev);
st->us = spi;
mutex_init(&st->lock);
st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi)
->driver_data];
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->info = &sca3000_info;
if (st->info->temp_output) {
indio_dev->channels = sca3000_channels_with_temp;
indio_dev->num_channels =
ARRAY_SIZE(sca3000_channels_with_temp);
} else {
indio_dev->channels = sca3000_channels;
indio_dev->num_channels = ARRAY_SIZE(sca3000_channels);
}
indio_dev->modes = INDIO_DIRECT_MODE;
ret = devm_iio_kfifo_buffer_setup(&spi->dev, indio_dev,
&sca3000_ring_setup_ops);
if (ret)
return ret;
if (spi->irq) {
ret = request_threaded_irq(spi->irq,
NULL,
&sca3000_event_handler,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
"sca3000",
indio_dev);
if (ret)
return ret;
}
ret = sca3000_clean_setup(st);
if (ret)
goto error_free_irq;
ret = sca3000_print_rev(indio_dev);
if (ret)
goto error_free_irq;
return iio_device_register(indio_dev);
error_free_irq:
if (spi->irq)
free_irq(spi->irq, indio_dev);
return ret;
}
static int sca3000_stop_all_interrupts(struct sca3000_state *st)
{
int ret;
mutex_lock(&st->lock);
ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
if (ret)
goto error_ret;
ret = sca3000_write_reg(st, SCA3000_REG_INT_MASK_ADDR,
(st->rx[0] &
~(SCA3000_REG_INT_MASK_RING_THREE_QUARTER |
SCA3000_REG_INT_MASK_RING_HALF |
SCA3000_REG_INT_MASK_ALL_INTS)));
error_ret:
mutex_unlock(&st->lock);
return ret;
}
static void sca3000_remove(struct spi_device *spi)
{
struct iio_dev *indio_dev = spi_get_drvdata(spi);
struct sca3000_state *st = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
/* Must ensure no interrupts can be generated after this! */
sca3000_stop_all_interrupts(st);
if (spi->irq)
free_irq(spi->irq, indio_dev);
}
static const struct spi_device_id sca3000_id[] = {
{"sca3000_d01", d01},
{"sca3000_e02", e02},
{"sca3000_e04", e04},
{"sca3000_e05", e05},
{}
};
MODULE_DEVICE_TABLE(spi, sca3000_id);
static struct spi_driver sca3000_driver = {
.driver = {
.name = "sca3000",
},
.probe = sca3000_probe,
.remove = sca3000_remove,
.id_table = sca3000_id,
};
module_spi_driver(sca3000_driver);
MODULE_AUTHOR("Jonathan Cameron <[email protected]>");
MODULE_DESCRIPTION("VTI SCA3000 Series Accelerometers SPI driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/sca3000.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2022 ROHM Semiconductors
*
* ROHM/KIONIX KX022A accelerometer driver
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/mutex.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/string_helpers.h>
#include <linux/units.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include "kionix-kx022a.h"
/*
* The KX022A has FIFO which can store 43 samples of HiRes data from 2
* channels. This equals to 43 (samples) * 3 (channels) * 2 (bytes/sample) to
* 258 bytes of sample data. The quirk to know is that the amount of bytes in
* the FIFO is advertised via 8 bit register (max value 255). The thing to note
* is that full 258 bytes of data is indicated using the max value 255.
*/
#define KX022A_FIFO_LENGTH 43
#define KX022A_FIFO_FULL_VALUE 255
#define KX022A_SOFT_RESET_WAIT_TIME_US (5 * USEC_PER_MSEC)
#define KX022A_SOFT_RESET_TOTAL_WAIT_TIME_US (500 * USEC_PER_MSEC)
/* 3 axis, 2 bytes of data for each of the axis */
#define KX022A_FIFO_SAMPLES_SIZE_BYTES 6
#define KX022A_FIFO_MAX_BYTES \
(KX022A_FIFO_LENGTH * KX022A_FIFO_SAMPLES_SIZE_BYTES)
enum {
KX022A_STATE_SAMPLE,
KX022A_STATE_FIFO,
};
/* Regmap configs */
static const struct regmap_range kx022a_volatile_ranges[] = {
{
.range_min = KX022A_REG_XHP_L,
.range_max = KX022A_REG_COTR,
}, {
.range_min = KX022A_REG_TSCP,
.range_max = KX022A_REG_INT_REL,
}, {
/* The reset bit will be cleared by sensor */
.range_min = KX022A_REG_CNTL2,
.range_max = KX022A_REG_CNTL2,
}, {
.range_min = KX022A_REG_BUF_STATUS_1,
.range_max = KX022A_REG_BUF_READ,
},
};
static const struct regmap_access_table kx022a_volatile_regs = {
.yes_ranges = &kx022a_volatile_ranges[0],
.n_yes_ranges = ARRAY_SIZE(kx022a_volatile_ranges),
};
static const struct regmap_range kx022a_precious_ranges[] = {
{
.range_min = KX022A_REG_INT_REL,
.range_max = KX022A_REG_INT_REL,
},
};
static const struct regmap_access_table kx022a_precious_regs = {
.yes_ranges = &kx022a_precious_ranges[0],
.n_yes_ranges = ARRAY_SIZE(kx022a_precious_ranges),
};
/*
* The HW does not set WHO_AM_I reg as read-only but we don't want to write it
* so we still include it in the read-only ranges.
*/
static const struct regmap_range kx022a_read_only_ranges[] = {
{
.range_min = KX022A_REG_XHP_L,
.range_max = KX022A_REG_INT_REL,
}, {
.range_min = KX022A_REG_BUF_STATUS_1,
.range_max = KX022A_REG_BUF_STATUS_2,
}, {
.range_min = KX022A_REG_BUF_READ,
.range_max = KX022A_REG_BUF_READ,
},
};
static const struct regmap_access_table kx022a_ro_regs = {
.no_ranges = &kx022a_read_only_ranges[0],
.n_no_ranges = ARRAY_SIZE(kx022a_read_only_ranges),
};
static const struct regmap_range kx022a_write_only_ranges[] = {
{
.range_min = KX022A_REG_BTS_WUF_TH,
.range_max = KX022A_REG_BTS_WUF_TH,
}, {
.range_min = KX022A_REG_MAN_WAKE,
.range_max = KX022A_REG_MAN_WAKE,
}, {
.range_min = KX022A_REG_SELF_TEST,
.range_max = KX022A_REG_SELF_TEST,
}, {
.range_min = KX022A_REG_BUF_CLEAR,
.range_max = KX022A_REG_BUF_CLEAR,
},
};
static const struct regmap_access_table kx022a_wo_regs = {
.no_ranges = &kx022a_write_only_ranges[0],
.n_no_ranges = ARRAY_SIZE(kx022a_write_only_ranges),
};
static const struct regmap_range kx022a_noinc_read_ranges[] = {
{
.range_min = KX022A_REG_BUF_READ,
.range_max = KX022A_REG_BUF_READ,
},
};
static const struct regmap_access_table kx022a_nir_regs = {
.yes_ranges = &kx022a_noinc_read_ranges[0],
.n_yes_ranges = ARRAY_SIZE(kx022a_noinc_read_ranges),
};
const struct regmap_config kx022a_regmap = {
.reg_bits = 8,
.val_bits = 8,
.volatile_table = &kx022a_volatile_regs,
.rd_table = &kx022a_wo_regs,
.wr_table = &kx022a_ro_regs,
.rd_noinc_table = &kx022a_nir_regs,
.precious_table = &kx022a_precious_regs,
.max_register = KX022A_MAX_REGISTER,
.cache_type = REGCACHE_RBTREE,
};
EXPORT_SYMBOL_NS_GPL(kx022a_regmap, IIO_KX022A);
struct kx022a_data {
struct regmap *regmap;
struct iio_trigger *trig;
struct device *dev;
struct iio_mount_matrix orientation;
int64_t timestamp, old_timestamp;
int irq;
int inc_reg;
int ien_reg;
unsigned int state;
unsigned int odr_ns;
bool trigger_enabled;
/*
* Prevent toggling the sensor stby/active state (PC1 bit) in the
* middle of a configuration, or when the fifo is enabled. Also,
* protect the data stored/retrieved from this structure from
* concurrent accesses.
*/
struct mutex mutex;
u8 watermark;
/* 3 x 16bit accel data + timestamp */
__le16 buffer[8] __aligned(IIO_DMA_MINALIGN);
struct {
__le16 channels[3];
s64 ts __aligned(8);
} scan;
};
static const struct iio_mount_matrix *
kx022a_get_mount_matrix(const struct iio_dev *idev,
const struct iio_chan_spec *chan)
{
struct kx022a_data *data = iio_priv(idev);
return &data->orientation;
}
enum {
AXIS_X,
AXIS_Y,
AXIS_Z,
AXIS_MAX
};
static const unsigned long kx022a_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z), 0
};
static const struct iio_chan_spec_ext_info kx022a_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kx022a_get_mount_matrix),
{ }
};
#define KX022A_ACCEL_CHAN(axis, index) \
{ \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.ext_info = kx022a_ext_info, \
.address = KX022A_REG_##axis##OUT_L, \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
}
static const struct iio_chan_spec kx022a_channels[] = {
KX022A_ACCEL_CHAN(X, 0),
KX022A_ACCEL_CHAN(Y, 1),
KX022A_ACCEL_CHAN(Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
/*
* The sensor HW can support ODR up to 1600 Hz, which is beyond what most of the
* Linux CPUs can handle without dropping samples. Also, the low power mode is
* not available for higher sample rates. Thus, the driver only supports 200 Hz
* and slower ODRs. The slowest is 0.78 Hz.
*/
static const int kx022a_accel_samp_freq_table[][2] = {
{ 0, 780000 },
{ 1, 563000 },
{ 3, 125000 },
{ 6, 250000 },
{ 12, 500000 },
{ 25, 0 },
{ 50, 0 },
{ 100, 0 },
{ 200, 0 },
};
static const unsigned int kx022a_odrs[] = {
1282051282,
639795266,
320 * MEGA,
160 * MEGA,
80 * MEGA,
40 * MEGA,
20 * MEGA,
10 * MEGA,
5 * MEGA,
};
/*
* range is typically +-2G/4G/8G/16G, distributed over the amount of bits.
* The scale table can be calculated using
* (range / 2^bits) * g = (range / 2^bits) * 9.80665 m/s^2
* => KX022A uses 16 bit (HiRes mode - assume the low 8 bits are zeroed
* in low-power mode(?) )
* => +/-2G => 4 / 2^16 * 9,80665 * 10^6 (to scale to micro)
* => +/-2G - 598.550415
* +/-4G - 1197.10083
* +/-8G - 2394.20166
* +/-16G - 4788.40332
*/
static const int kx022a_scale_table[][2] = {
{ 598, 550415 },
{ 1197, 100830 },
{ 2394, 201660 },
{ 4788, 403320 },
};
static int kx022a_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = (const int *)kx022a_accel_samp_freq_table;
*length = ARRAY_SIZE(kx022a_accel_samp_freq_table) *
ARRAY_SIZE(kx022a_accel_samp_freq_table[0]);
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SCALE:
*vals = (const int *)kx022a_scale_table;
*length = ARRAY_SIZE(kx022a_scale_table) *
ARRAY_SIZE(kx022a_scale_table[0]);
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
#define KX022A_DEFAULT_PERIOD_NS (20 * NSEC_PER_MSEC)
static void kx022a_reg2freq(unsigned int val, int *val1, int *val2)
{
*val1 = kx022a_accel_samp_freq_table[val & KX022A_MASK_ODR][0];
*val2 = kx022a_accel_samp_freq_table[val & KX022A_MASK_ODR][1];
}
static void kx022a_reg2scale(unsigned int val, unsigned int *val1,
unsigned int *val2)
{
val &= KX022A_MASK_GSEL;
val >>= KX022A_GSEL_SHIFT;
*val1 = kx022a_scale_table[val][0];
*val2 = kx022a_scale_table[val][1];
}
static int kx022a_turn_on_off_unlocked(struct kx022a_data *data, bool on)
{
int ret;
if (on)
ret = regmap_set_bits(data->regmap, KX022A_REG_CNTL,
KX022A_MASK_PC1);
else
ret = regmap_clear_bits(data->regmap, KX022A_REG_CNTL,
KX022A_MASK_PC1);
if (ret)
dev_err(data->dev, "Turn %s fail %d\n", str_on_off(on), ret);
return ret;
}
static int kx022a_turn_off_lock(struct kx022a_data *data)
{
int ret;
mutex_lock(&data->mutex);
ret = kx022a_turn_on_off_unlocked(data, false);
if (ret)
mutex_unlock(&data->mutex);
return ret;
}
static int kx022a_turn_on_unlock(struct kx022a_data *data)
{
int ret;
ret = kx022a_turn_on_off_unlocked(data, true);
mutex_unlock(&data->mutex);
return ret;
}
static int kx022a_write_raw(struct iio_dev *idev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct kx022a_data *data = iio_priv(idev);
int ret, n;
/*
* We should not allow changing scale or frequency when FIFO is running
* as it will mess the timestamp/scale for samples existing in the
* buffer. If this turns out to be an issue we can later change logic
* to internally flush the fifo before reconfiguring so the samples in
* fifo keep matching the freq/scale settings. (Such setup could cause
* issues if users trust the watermark to be reached within known
* time-limit).
*/
ret = iio_device_claim_direct_mode(idev);
if (ret)
return ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
n = ARRAY_SIZE(kx022a_accel_samp_freq_table);
while (n--)
if (val == kx022a_accel_samp_freq_table[n][0] &&
val2 == kx022a_accel_samp_freq_table[n][1])
break;
if (n < 0) {
ret = -EINVAL;
goto unlock_out;
}
ret = kx022a_turn_off_lock(data);
if (ret)
break;
ret = regmap_update_bits(data->regmap,
KX022A_REG_ODCNTL,
KX022A_MASK_ODR, n);
data->odr_ns = kx022a_odrs[n];
kx022a_turn_on_unlock(data);
break;
case IIO_CHAN_INFO_SCALE:
n = ARRAY_SIZE(kx022a_scale_table);
while (n-- > 0)
if (val == kx022a_scale_table[n][0] &&
val2 == kx022a_scale_table[n][1])
break;
if (n < 0) {
ret = -EINVAL;
goto unlock_out;
}
ret = kx022a_turn_off_lock(data);
if (ret)
break;
ret = regmap_update_bits(data->regmap, KX022A_REG_CNTL,
KX022A_MASK_GSEL,
n << KX022A_GSEL_SHIFT);
kx022a_turn_on_unlock(data);
break;
default:
ret = -EINVAL;
break;
}
unlock_out:
iio_device_release_direct_mode(idev);
return ret;
}
static int kx022a_fifo_set_wmi(struct kx022a_data *data)
{
u8 threshold;
threshold = data->watermark;
return regmap_update_bits(data->regmap, KX022A_REG_BUF_CNTL1,
KX022A_MASK_WM_TH, threshold);
}
static int kx022a_get_axis(struct kx022a_data *data,
struct iio_chan_spec const *chan,
int *val)
{
int ret;
ret = regmap_bulk_read(data->regmap, chan->address, &data->buffer[0],
sizeof(__le16));
if (ret)
return ret;
*val = le16_to_cpu(data->buffer[0]);
return IIO_VAL_INT;
}
static int kx022a_read_raw(struct iio_dev *idev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct kx022a_data *data = iio_priv(idev);
unsigned int regval;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(idev);
if (ret)
return ret;
mutex_lock(&data->mutex);
ret = kx022a_get_axis(data, chan, val);
mutex_unlock(&data->mutex);
iio_device_release_direct_mode(idev);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = regmap_read(data->regmap, KX022A_REG_ODCNTL, ®val);
if (ret)
return ret;
if ((regval & KX022A_MASK_ODR) >
ARRAY_SIZE(kx022a_accel_samp_freq_table)) {
dev_err(data->dev, "Invalid ODR\n");
return -EINVAL;
}
kx022a_reg2freq(regval, val, val2);
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SCALE:
ret = regmap_read(data->regmap, KX022A_REG_CNTL, ®val);
if (ret < 0)
return ret;
kx022a_reg2scale(regval, val, val2);
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
};
static int kx022a_set_watermark(struct iio_dev *idev, unsigned int val)
{
struct kx022a_data *data = iio_priv(idev);
if (val > KX022A_FIFO_LENGTH)
val = KX022A_FIFO_LENGTH;
mutex_lock(&data->mutex);
data->watermark = val;
mutex_unlock(&data->mutex);
return 0;
}
static ssize_t hwfifo_enabled_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *idev = dev_to_iio_dev(dev);
struct kx022a_data *data = iio_priv(idev);
bool state;
mutex_lock(&data->mutex);
state = data->state;
mutex_unlock(&data->mutex);
return sysfs_emit(buf, "%d\n", state);
}
static ssize_t hwfifo_watermark_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *idev = dev_to_iio_dev(dev);
struct kx022a_data *data = iio_priv(idev);
int wm;
mutex_lock(&data->mutex);
wm = data->watermark;
mutex_unlock(&data->mutex);
return sysfs_emit(buf, "%d\n", wm);
}
static IIO_DEVICE_ATTR_RO(hwfifo_enabled, 0);
static IIO_DEVICE_ATTR_RO(hwfifo_watermark, 0);
static const struct iio_dev_attr *kx022a_fifo_attributes[] = {
&iio_dev_attr_hwfifo_watermark,
&iio_dev_attr_hwfifo_enabled,
NULL
};
static int kx022a_drop_fifo_contents(struct kx022a_data *data)
{
/*
* We must clear the old time-stamp to avoid computing the timestamps
* based on samples acquired when buffer was last enabled.
*
* We don't need to protect the timestamp as long as we are only
* called from fifo-disable where we can guarantee the sensor is not
* triggering interrupts and where the mutex is locked to prevent the
* user-space access.
*/
data->timestamp = 0;
return regmap_write(data->regmap, KX022A_REG_BUF_CLEAR, 0x0);
}
static int __kx022a_fifo_flush(struct iio_dev *idev, unsigned int samples,
bool irq)
{
struct kx022a_data *data = iio_priv(idev);
struct device *dev = regmap_get_device(data->regmap);
__le16 buffer[KX022A_FIFO_LENGTH * 3];
uint64_t sample_period;
int count, fifo_bytes;
bool renable = false;
int64_t tstamp;
int ret, i;
ret = regmap_read(data->regmap, KX022A_REG_BUF_STATUS_1, &fifo_bytes);
if (ret) {
dev_err(dev, "Error reading buffer status\n");
return ret;
}
/* Let's not overflow if we for some reason get bogus value from i2c */
if (fifo_bytes == KX022A_FIFO_FULL_VALUE)
fifo_bytes = KX022A_FIFO_MAX_BYTES;
if (fifo_bytes % KX022A_FIFO_SAMPLES_SIZE_BYTES)
dev_warn(data->dev, "Bad FIFO alignment. Data may be corrupt\n");
count = fifo_bytes / KX022A_FIFO_SAMPLES_SIZE_BYTES;
if (!count)
return 0;
/*
* If we are being called from IRQ handler we know the stored timestamp
* is fairly accurate for the last stored sample. Otherwise, if we are
* called as a result of a read operation from userspace and hence
* before the watermark interrupt was triggered, take a timestamp
* now. We can fall anywhere in between two samples so the error in this
* case is at most one sample period.
*/
if (!irq) {
/*
* We need to have the IRQ disabled or we risk of messing-up
* the timestamps. If we are ran from IRQ, then the
* IRQF_ONESHOT has us covered - but if we are ran by the
* user-space read we need to disable the IRQ to be on a safe
* side. We do this usng synchronous disable so that if the
* IRQ thread is being ran on other CPU we wait for it to be
* finished.
*/
disable_irq(data->irq);
renable = true;
data->old_timestamp = data->timestamp;
data->timestamp = iio_get_time_ns(idev);
}
/*
* Approximate timestamps for each of the sample based on the sampling
* frequency, timestamp for last sample and number of samples.
*
* We'd better not use the current bandwidth settings to compute the
* sample period. The real sample rate varies with the device and
* small variation adds when we store a large number of samples.
*
* To avoid this issue we compute the actual sample period ourselves
* based on the timestamp delta between the last two flush operations.
*/
if (data->old_timestamp) {
sample_period = data->timestamp - data->old_timestamp;
do_div(sample_period, count);
} else {
sample_period = data->odr_ns;
}
tstamp = data->timestamp - (count - 1) * sample_period;
if (samples && count > samples) {
/*
* Here we leave some old samples to the buffer. We need to
* adjust the timestamp to match the first sample in the buffer
* or we will miscalculate the sample_period at next round.
*/
data->timestamp -= (count - samples) * sample_period;
count = samples;
}
fifo_bytes = count * KX022A_FIFO_SAMPLES_SIZE_BYTES;
ret = regmap_noinc_read(data->regmap, KX022A_REG_BUF_READ,
&buffer[0], fifo_bytes);
if (ret)
goto renable_out;
for (i = 0; i < count; i++) {
__le16 *sam = &buffer[i * 3];
__le16 *chs;
int bit;
chs = &data->scan.channels[0];
for_each_set_bit(bit, idev->active_scan_mask, AXIS_MAX)
chs[bit] = sam[bit];
iio_push_to_buffers_with_timestamp(idev, &data->scan, tstamp);
tstamp += sample_period;
}
ret = count;
renable_out:
if (renable)
enable_irq(data->irq);
return ret;
}
static int kx022a_fifo_flush(struct iio_dev *idev, unsigned int samples)
{
struct kx022a_data *data = iio_priv(idev);
int ret;
mutex_lock(&data->mutex);
ret = __kx022a_fifo_flush(idev, samples, false);
mutex_unlock(&data->mutex);
return ret;
}
static const struct iio_info kx022a_info = {
.read_raw = &kx022a_read_raw,
.write_raw = &kx022a_write_raw,
.read_avail = &kx022a_read_avail,
.validate_trigger = iio_validate_own_trigger,
.hwfifo_set_watermark = kx022a_set_watermark,
.hwfifo_flush_to_buffer = kx022a_fifo_flush,
};
static int kx022a_set_drdy_irq(struct kx022a_data *data, bool en)
{
if (en)
return regmap_set_bits(data->regmap, KX022A_REG_CNTL,
KX022A_MASK_DRDY);
return regmap_clear_bits(data->regmap, KX022A_REG_CNTL,
KX022A_MASK_DRDY);
}
static int kx022a_prepare_irq_pin(struct kx022a_data *data)
{
/* Enable IRQ1 pin. Set polarity to active low */
int mask = KX022A_MASK_IEN | KX022A_MASK_IPOL |
KX022A_MASK_ITYP;
int val = KX022A_MASK_IEN | KX022A_IPOL_LOW |
KX022A_ITYP_LEVEL;
int ret;
ret = regmap_update_bits(data->regmap, data->inc_reg, mask, val);
if (ret)
return ret;
/* We enable WMI to IRQ pin only at buffer_enable */
mask = KX022A_MASK_INS2_DRDY;
return regmap_set_bits(data->regmap, data->ien_reg, mask);
}
static int kx022a_fifo_disable(struct kx022a_data *data)
{
int ret = 0;
ret = kx022a_turn_off_lock(data);
if (ret)
return ret;
ret = regmap_clear_bits(data->regmap, data->ien_reg, KX022A_MASK_WMI);
if (ret)
goto unlock_out;
ret = regmap_clear_bits(data->regmap, KX022A_REG_BUF_CNTL2,
KX022A_MASK_BUF_EN);
if (ret)
goto unlock_out;
data->state &= ~KX022A_STATE_FIFO;
kx022a_drop_fifo_contents(data);
return kx022a_turn_on_unlock(data);
unlock_out:
mutex_unlock(&data->mutex);
return ret;
}
static int kx022a_buffer_predisable(struct iio_dev *idev)
{
struct kx022a_data *data = iio_priv(idev);
if (iio_device_get_current_mode(idev) == INDIO_BUFFER_TRIGGERED)
return 0;
return kx022a_fifo_disable(data);
}
static int kx022a_fifo_enable(struct kx022a_data *data)
{
int ret;
ret = kx022a_turn_off_lock(data);
if (ret)
return ret;
/* Update watermark to HW */
ret = kx022a_fifo_set_wmi(data);
if (ret)
goto unlock_out;
/* Enable buffer */
ret = regmap_set_bits(data->regmap, KX022A_REG_BUF_CNTL2,
KX022A_MASK_BUF_EN);
if (ret)
goto unlock_out;
data->state |= KX022A_STATE_FIFO;
ret = regmap_set_bits(data->regmap, data->ien_reg,
KX022A_MASK_WMI);
if (ret)
goto unlock_out;
return kx022a_turn_on_unlock(data);
unlock_out:
mutex_unlock(&data->mutex);
return ret;
}
static int kx022a_buffer_postenable(struct iio_dev *idev)
{
struct kx022a_data *data = iio_priv(idev);
/*
* If we use data-ready trigger, then the IRQ masks should be handled by
* trigger enable and the hardware buffer is not used but we just update
* results to the IIO fifo when data-ready triggers.
*/
if (iio_device_get_current_mode(idev) == INDIO_BUFFER_TRIGGERED)
return 0;
return kx022a_fifo_enable(data);
}
static const struct iio_buffer_setup_ops kx022a_buffer_ops = {
.postenable = kx022a_buffer_postenable,
.predisable = kx022a_buffer_predisable,
};
static irqreturn_t kx022a_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *idev = pf->indio_dev;
struct kx022a_data *data = iio_priv(idev);
int ret;
ret = regmap_bulk_read(data->regmap, KX022A_REG_XOUT_L, data->buffer,
KX022A_FIFO_SAMPLES_SIZE_BYTES);
if (ret < 0)
goto err_read;
iio_push_to_buffers_with_timestamp(idev, data->buffer, data->timestamp);
err_read:
iio_trigger_notify_done(idev->trig);
return IRQ_HANDLED;
}
/* Get timestamps and wake the thread if we need to read data */
static irqreturn_t kx022a_irq_handler(int irq, void *private)
{
struct iio_dev *idev = private;
struct kx022a_data *data = iio_priv(idev);
data->old_timestamp = data->timestamp;
data->timestamp = iio_get_time_ns(idev);
if (data->state & KX022A_STATE_FIFO || data->trigger_enabled)
return IRQ_WAKE_THREAD;
return IRQ_NONE;
}
/*
* WMI and data-ready IRQs are acked when results are read. If we add
* TILT/WAKE or other IRQs - then we may need to implement the acking
* (which is racy).
*/
static irqreturn_t kx022a_irq_thread_handler(int irq, void *private)
{
struct iio_dev *idev = private;
struct kx022a_data *data = iio_priv(idev);
irqreturn_t ret = IRQ_NONE;
mutex_lock(&data->mutex);
if (data->trigger_enabled) {
iio_trigger_poll_nested(data->trig);
ret = IRQ_HANDLED;
}
if (data->state & KX022A_STATE_FIFO) {
int ok;
ok = __kx022a_fifo_flush(idev, KX022A_FIFO_LENGTH, true);
if (ok > 0)
ret = IRQ_HANDLED;
}
mutex_unlock(&data->mutex);
return ret;
}
static int kx022a_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct kx022a_data *data = iio_trigger_get_drvdata(trig);
int ret = 0;
mutex_lock(&data->mutex);
if (data->trigger_enabled == state)
goto unlock_out;
if (data->state & KX022A_STATE_FIFO) {
dev_warn(data->dev, "Can't set trigger when FIFO enabled\n");
ret = -EBUSY;
goto unlock_out;
}
ret = kx022a_turn_on_off_unlocked(data, false);
if (ret)
goto unlock_out;
data->trigger_enabled = state;
ret = kx022a_set_drdy_irq(data, state);
if (ret)
goto unlock_out;
ret = kx022a_turn_on_off_unlocked(data, true);
unlock_out:
mutex_unlock(&data->mutex);
return ret;
}
static const struct iio_trigger_ops kx022a_trigger_ops = {
.set_trigger_state = kx022a_trigger_set_state,
};
static int kx022a_chip_init(struct kx022a_data *data)
{
int ret, val;
/* Reset the senor */
ret = regmap_write(data->regmap, KX022A_REG_CNTL2, KX022A_MASK_SRST);
if (ret)
return ret;
/*
* I've seen I2C read failures if we poll too fast after the sensor
* reset. Slight delay gives I2C block the time to recover.
*/
msleep(1);
ret = regmap_read_poll_timeout(data->regmap, KX022A_REG_CNTL2, val,
!(val & KX022A_MASK_SRST),
KX022A_SOFT_RESET_WAIT_TIME_US,
KX022A_SOFT_RESET_TOTAL_WAIT_TIME_US);
if (ret) {
dev_err(data->dev, "Sensor reset %s\n",
val & KX022A_MASK_SRST ? "timeout" : "fail#");
return ret;
}
ret = regmap_reinit_cache(data->regmap, &kx022a_regmap);
if (ret) {
dev_err(data->dev, "Failed to reinit reg cache\n");
return ret;
}
/* set data res 16bit */
ret = regmap_set_bits(data->regmap, KX022A_REG_BUF_CNTL2,
KX022A_MASK_BRES16);
if (ret) {
dev_err(data->dev, "Failed to set data resolution\n");
return ret;
}
return kx022a_prepare_irq_pin(data);
}
int kx022a_probe_internal(struct device *dev)
{
static const char * const regulator_names[] = {"io-vdd", "vdd"};
struct iio_trigger *indio_trig;
struct fwnode_handle *fwnode;
struct kx022a_data *data;
struct regmap *regmap;
unsigned int chip_id;
struct iio_dev *idev;
int ret, irq;
char *name;
regmap = dev_get_regmap(dev, NULL);
if (!regmap) {
dev_err(dev, "no regmap\n");
return -EINVAL;
}
fwnode = dev_fwnode(dev);
if (!fwnode)
return -ENODEV;
idev = devm_iio_device_alloc(dev, sizeof(*data));
if (!idev)
return -ENOMEM;
data = iio_priv(idev);
/*
* VDD is the analog and digital domain voltage supply and
* IO_VDD is the digital I/O voltage supply.
*/
ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulator_names),
regulator_names);
if (ret && ret != -ENODEV)
return dev_err_probe(dev, ret, "failed to enable regulator\n");
ret = regmap_read(regmap, KX022A_REG_WHO, &chip_id);
if (ret)
return dev_err_probe(dev, ret, "Failed to access sensor\n");
if (chip_id != KX022A_ID) {
dev_err(dev, "unsupported device 0x%x\n", chip_id);
return -EINVAL;
}
irq = fwnode_irq_get_byname(fwnode, "INT1");
if (irq > 0) {
data->inc_reg = KX022A_REG_INC1;
data->ien_reg = KX022A_REG_INC4;
} else {
irq = fwnode_irq_get_byname(fwnode, "INT2");
if (irq < 0)
return dev_err_probe(dev, irq, "No suitable IRQ\n");
data->inc_reg = KX022A_REG_INC5;
data->ien_reg = KX022A_REG_INC6;
}
data->regmap = regmap;
data->dev = dev;
data->irq = irq;
data->odr_ns = KX022A_DEFAULT_PERIOD_NS;
mutex_init(&data->mutex);
idev->channels = kx022a_channels;
idev->num_channels = ARRAY_SIZE(kx022a_channels);
idev->name = "kx022-accel";
idev->info = &kx022a_info;
idev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
idev->available_scan_masks = kx022a_scan_masks;
/* Read the mounting matrix, if present */
ret = iio_read_mount_matrix(dev, &data->orientation);
if (ret)
return ret;
/* The sensor must be turned off for configuration */
ret = kx022a_turn_off_lock(data);
if (ret)
return ret;
ret = kx022a_chip_init(data);
if (ret) {
mutex_unlock(&data->mutex);
return ret;
}
ret = kx022a_turn_on_unlock(data);
if (ret)
return ret;
ret = devm_iio_triggered_buffer_setup_ext(dev, idev,
&iio_pollfunc_store_time,
kx022a_trigger_handler,
IIO_BUFFER_DIRECTION_IN,
&kx022a_buffer_ops,
kx022a_fifo_attributes);
if (ret)
return dev_err_probe(data->dev, ret,
"iio_triggered_buffer_setup_ext FAIL\n");
indio_trig = devm_iio_trigger_alloc(dev, "%sdata-rdy-dev%d", idev->name,
iio_device_id(idev));
if (!indio_trig)
return -ENOMEM;
data->trig = indio_trig;
indio_trig->ops = &kx022a_trigger_ops;
iio_trigger_set_drvdata(indio_trig, data);
/*
* No need to check for NULL. request_threaded_irq() defaults to
* dev_name() should the alloc fail.
*/
name = devm_kasprintf(data->dev, GFP_KERNEL, "%s-kx022a",
dev_name(data->dev));
ret = devm_request_threaded_irq(data->dev, irq, kx022a_irq_handler,
&kx022a_irq_thread_handler,
IRQF_ONESHOT, name, idev);
if (ret)
return dev_err_probe(data->dev, ret, "Could not request IRQ\n");
ret = devm_iio_trigger_register(dev, indio_trig);
if (ret)
return dev_err_probe(data->dev, ret,
"Trigger registration failed\n");
ret = devm_iio_device_register(data->dev, idev);
if (ret < 0)
return dev_err_probe(dev, ret,
"Unable to register iio device\n");
return ret;
}
EXPORT_SYMBOL_NS_GPL(kx022a_probe_internal, IIO_KX022A);
MODULE_DESCRIPTION("ROHM/Kionix KX022A accelerometer driver");
MODULE_AUTHOR("Matti Vaittinen <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/kionix-kx022a.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* bma180.c - IIO driver for Bosch BMA180 triaxial acceleration sensor
*
* Copyright 2013 Oleksandr Kravchenko <[email protected]>
*
* Support for BMA250 (c) Peter Meerwald <[email protected]>
*
* SPI is not supported by driver
* BMA023/BMA150/SMB380: 7-bit I2C slave address 0x38
* BMA180: 7-bit I2C slave address 0x40 or 0x41
* BMA250: 7-bit I2C slave address 0x18 or 0x19
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/bitops.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#define BMA180_DRV_NAME "bma180"
#define BMA180_IRQ_NAME "bma180_event"
enum chip_ids {
BMA023,
BMA150,
BMA180,
BMA250,
};
struct bma180_data;
struct bma180_part_info {
u8 chip_id;
const struct iio_chan_spec *channels;
unsigned int num_channels;
const int *scale_table;
unsigned int num_scales;
const int *bw_table;
unsigned int num_bw;
int temp_offset;
u8 int_reset_reg, int_reset_mask;
u8 sleep_reg, sleep_mask;
u8 bw_reg, bw_mask, bw_offset;
u8 scale_reg, scale_mask;
u8 power_reg, power_mask, lowpower_val;
u8 int_enable_reg, int_enable_mask;
u8 softreset_reg, softreset_val;
int (*chip_config)(struct bma180_data *data);
void (*chip_disable)(struct bma180_data *data);
};
/* Register set */
#define BMA023_CTRL_REG0 0x0a
#define BMA023_CTRL_REG1 0x0b
#define BMA023_CTRL_REG2 0x14
#define BMA023_CTRL_REG3 0x15
#define BMA023_RANGE_MASK GENMASK(4, 3) /* Range of accel values */
#define BMA023_BW_MASK GENMASK(2, 0) /* Accel bandwidth */
#define BMA023_SLEEP BIT(0)
#define BMA023_INT_RESET_MASK BIT(6)
#define BMA023_NEW_DATA_INT BIT(5) /* Intr every new accel data is ready */
#define BMA023_RESET_VAL BIT(1)
#define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */
#define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */
#define BMA180_TEMP 0x08
#define BMA180_CTRL_REG0 0x0d
#define BMA180_RESET 0x10
#define BMA180_BW_TCS 0x20
#define BMA180_CTRL_REG3 0x21
#define BMA180_TCO_Z 0x30
#define BMA180_OFFSET_LSB1 0x35
/* BMA180_CTRL_REG0 bits */
#define BMA180_DIS_WAKE_UP BIT(0) /* Disable wake up mode */
#define BMA180_SLEEP BIT(1) /* 1 - chip will sleep */
#define BMA180_EE_W BIT(4) /* Unlock writing to addr from 0x20 */
#define BMA180_RESET_INT BIT(6) /* Reset pending interrupts */
/* BMA180_CTRL_REG3 bits */
#define BMA180_NEW_DATA_INT BIT(1) /* Intr every new accel data is ready */
/* BMA180_OFFSET_LSB1 skipping mode bit */
#define BMA180_SMP_SKIP BIT(0)
/* Bit masks for registers bit fields */
#define BMA180_RANGE 0x0e /* Range of measured accel values */
#define BMA180_BW 0xf0 /* Accel bandwidth */
#define BMA180_MODE_CONFIG 0x03 /* Config operation modes */
/* We have to write this value in reset register to do soft reset */
#define BMA180_RESET_VAL 0xb6
#define BMA023_ID_REG_VAL 0x02
#define BMA180_ID_REG_VAL 0x03
#define BMA250_ID_REG_VAL 0x03
/* Chip power modes */
#define BMA180_LOW_POWER 0x03
#define BMA250_RANGE_REG 0x0f
#define BMA250_BW_REG 0x10
#define BMA250_POWER_REG 0x11
#define BMA250_RESET_REG 0x14
#define BMA250_INT_ENABLE_REG 0x17
#define BMA250_INT_MAP_REG 0x1a
#define BMA250_INT_RESET_REG 0x21
#define BMA250_RANGE_MASK GENMASK(3, 0) /* Range of accel values */
#define BMA250_BW_MASK GENMASK(4, 0) /* Accel bandwidth */
#define BMA250_BW_OFFSET 8
#define BMA250_SUSPEND_MASK BIT(7) /* chip will sleep */
#define BMA250_LOWPOWER_MASK BIT(6)
#define BMA250_DATA_INTEN_MASK BIT(4)
#define BMA250_INT1_DATA_MASK BIT(0)
#define BMA250_INT_RESET_MASK BIT(7) /* Reset pending interrupts */
struct bma180_data {
struct regulator *vdd_supply;
struct regulator *vddio_supply;
struct i2c_client *client;
struct iio_trigger *trig;
const struct bma180_part_info *part_info;
struct iio_mount_matrix orientation;
struct mutex mutex;
bool sleep_state;
int scale;
int bw;
bool pmode;
/* Ensure timestamp is naturally aligned */
struct {
s16 chan[4];
s64 timestamp __aligned(8);
} scan;
};
enum bma180_chan {
AXIS_X,
AXIS_Y,
AXIS_Z,
TEMP
};
static int bma023_bw_table[] = { 25, 50, 100, 190, 375, 750, 1500 }; /* Hz */
static int bma023_scale_table[] = { 2452, 4903, 9709, };
static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */
static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
static int bma250_bw_table[] = { 8, 16, 31, 63, 125, 250, 500, 1000 }; /* Hz */
static int bma250_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0,
0, 0, 306458 };
static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan)
{
int ret;
if (data->sleep_state)
return -EBUSY;
switch (chan) {
case TEMP:
ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP);
if (ret < 0)
dev_err(&data->client->dev, "failed to read temp register\n");
break;
default:
ret = i2c_smbus_read_word_data(data->client,
BMA180_ACC_X_LSB + chan * 2);
if (ret < 0)
dev_err(&data->client->dev,
"failed to read accel_%c register\n",
'x' + chan);
}
return ret;
}
static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val)
{
int ret = i2c_smbus_read_byte_data(data->client, reg);
u8 reg_val = (ret & ~mask) | (val << (ffs(mask) - 1));
if (ret < 0)
return ret;
return i2c_smbus_write_byte_data(data->client, reg, reg_val);
}
static int bma180_reset_intr(struct bma180_data *data)
{
int ret = bma180_set_bits(data, data->part_info->int_reset_reg,
data->part_info->int_reset_mask, 1);
if (ret)
dev_err(&data->client->dev, "failed to reset interrupt\n");
return ret;
}
static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state)
{
int ret = bma180_set_bits(data, data->part_info->int_enable_reg,
data->part_info->int_enable_mask, state);
if (ret)
goto err;
ret = bma180_reset_intr(data);
if (ret)
goto err;
return 0;
err:
dev_err(&data->client->dev,
"failed to set new data interrupt state %d\n", state);
return ret;
}
static int bma180_set_sleep_state(struct bma180_data *data, bool state)
{
int ret = bma180_set_bits(data, data->part_info->sleep_reg,
data->part_info->sleep_mask, state);
if (ret) {
dev_err(&data->client->dev,
"failed to set sleep state %d\n", state);
return ret;
}
data->sleep_state = state;
return 0;
}
static int bma180_set_ee_writing_state(struct bma180_data *data, bool state)
{
int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state);
if (ret)
dev_err(&data->client->dev,
"failed to set ee writing state %d\n", state);
return ret;
}
static int bma180_set_bw(struct bma180_data *data, int val)
{
int ret, i;
if (data->sleep_state)
return -EBUSY;
for (i = 0; i < data->part_info->num_bw; ++i) {
if (data->part_info->bw_table[i] == val) {
ret = bma180_set_bits(data, data->part_info->bw_reg,
data->part_info->bw_mask,
i + data->part_info->bw_offset);
if (ret) {
dev_err(&data->client->dev,
"failed to set bandwidth\n");
return ret;
}
data->bw = val;
return 0;
}
}
return -EINVAL;
}
static int bma180_set_scale(struct bma180_data *data, int val)
{
int ret, i;
if (data->sleep_state)
return -EBUSY;
for (i = 0; i < data->part_info->num_scales; ++i)
if (data->part_info->scale_table[i] == val) {
ret = bma180_set_bits(data, data->part_info->scale_reg,
data->part_info->scale_mask, i);
if (ret) {
dev_err(&data->client->dev,
"failed to set scale\n");
return ret;
}
data->scale = val;
return 0;
}
return -EINVAL;
}
static int bma180_set_pmode(struct bma180_data *data, bool mode)
{
u8 reg_val = mode ? data->part_info->lowpower_val : 0;
int ret = bma180_set_bits(data, data->part_info->power_reg,
data->part_info->power_mask, reg_val);
if (ret) {
dev_err(&data->client->dev, "failed to set power mode\n");
return ret;
}
data->pmode = mode;
return 0;
}
static int bma180_soft_reset(struct bma180_data *data)
{
int ret = i2c_smbus_write_byte_data(data->client,
data->part_info->softreset_reg,
data->part_info->softreset_val);
if (ret)
dev_err(&data->client->dev, "failed to reset the chip\n");
return ret;
}
static int bma180_chip_init(struct bma180_data *data)
{
/* Try to read chip_id register. It must return 0x03. */
int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID);
if (ret < 0)
return ret;
if (ret != data->part_info->chip_id) {
dev_err(&data->client->dev, "wrong chip ID %d expected %d\n",
ret, data->part_info->chip_id);
return -ENODEV;
}
ret = bma180_soft_reset(data);
if (ret)
return ret;
/*
* No serial transaction should occur within minimum 10 us
* after soft_reset command
*/
msleep(20);
return bma180_set_new_data_intr_state(data, false);
}
static int bma023_chip_config(struct bma180_data *data)
{
int ret = bma180_chip_init(data);
if (ret)
goto err;
ret = bma180_set_bw(data, 50); /* 50 Hz */
if (ret)
goto err;
ret = bma180_set_scale(data, 2452); /* 2 G */
if (ret)
goto err;
return 0;
err:
dev_err(&data->client->dev, "failed to config the chip\n");
return ret;
}
static int bma180_chip_config(struct bma180_data *data)
{
int ret = bma180_chip_init(data);
if (ret)
goto err;
ret = bma180_set_pmode(data, false);
if (ret)
goto err;
ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1);
if (ret)
goto err;
ret = bma180_set_ee_writing_state(data, true);
if (ret)
goto err;
ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1);
if (ret)
goto err;
ret = bma180_set_bw(data, 20); /* 20 Hz */
if (ret)
goto err;
ret = bma180_set_scale(data, 2452); /* 2 G */
if (ret)
goto err;
return 0;
err:
dev_err(&data->client->dev, "failed to config the chip\n");
return ret;
}
static int bma250_chip_config(struct bma180_data *data)
{
int ret = bma180_chip_init(data);
if (ret)
goto err;
ret = bma180_set_pmode(data, false);
if (ret)
goto err;
ret = bma180_set_bw(data, 16); /* 16 Hz */
if (ret)
goto err;
ret = bma180_set_scale(data, 38344); /* 2 G */
if (ret)
goto err;
/*
* This enables dataready interrupt on the INT1 pin
* FIXME: support using the INT2 pin
*/
ret = bma180_set_bits(data, BMA250_INT_MAP_REG, BMA250_INT1_DATA_MASK, 1);
if (ret)
goto err;
return 0;
err:
dev_err(&data->client->dev, "failed to config the chip\n");
return ret;
}
static void bma023_chip_disable(struct bma180_data *data)
{
if (bma180_set_sleep_state(data, true))
goto err;
return;
err:
dev_err(&data->client->dev, "failed to disable the chip\n");
}
static void bma180_chip_disable(struct bma180_data *data)
{
if (bma180_set_new_data_intr_state(data, false))
goto err;
if (bma180_set_ee_writing_state(data, false))
goto err;
if (bma180_set_sleep_state(data, true))
goto err;
return;
err:
dev_err(&data->client->dev, "failed to disable the chip\n");
}
static void bma250_chip_disable(struct bma180_data *data)
{
if (bma180_set_new_data_intr_state(data, false))
goto err;
if (bma180_set_sleep_state(data, true))
goto err;
return;
err:
dev_err(&data->client->dev, "failed to disable the chip\n");
}
static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned int n,
bool micros)
{
size_t len = 0;
int i;
for (i = 0; i < n; i++) {
if (!vals[i])
continue;
len += scnprintf(buf + len, PAGE_SIZE - len,
micros ? "0.%06d " : "%d ", vals[i]);
}
buf[len - 1] = '\n';
return len;
}
static ssize_t bma180_show_filter_freq_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
return bma180_show_avail(buf, data->part_info->bw_table,
data->part_info->num_bw, false);
}
static ssize_t bma180_show_scale_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
return bma180_show_avail(buf, data->part_info->scale_table,
data->part_info->num_scales, true);
}
static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
S_IRUGO, bma180_show_filter_freq_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_accel_scale_available,
S_IRUGO, bma180_show_scale_avail, NULL, 0);
static struct attribute *bma180_attributes[] = {
&iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.
dev_attr.attr,
&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group bma180_attrs_group = {
.attrs = bma180_attributes,
};
static int bma180_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2,
long mask)
{
struct bma180_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&data->mutex);
ret = bma180_get_data_reg(data, chan->scan_index);
mutex_unlock(&data->mutex);
iio_device_release_direct_mode(indio_dev);
if (ret < 0)
return ret;
if (chan->scan_type.sign == 's') {
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
} else {
*val = ret;
}
return IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*val = data->bw;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
*val = 0;
*val2 = data->scale;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = 500;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
*val = data->part_info->temp_offset;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int bma180_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2, long mask)
{
struct bma180_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (val)
return -EINVAL;
mutex_lock(&data->mutex);
ret = bma180_set_scale(data, val2);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
if (val2)
return -EINVAL;
mutex_lock(&data->mutex);
ret = bma180_set_bw(data, val);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static const struct iio_info bma180_info = {
.attrs = &bma180_attrs_group,
.read_raw = bma180_read_raw,
.write_raw = bma180_write_raw,
};
static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
static int bma180_get_power_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct bma180_data *data = iio_priv(indio_dev);
return data->pmode;
}
static int bma180_set_power_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, unsigned int mode)
{
struct bma180_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = bma180_set_pmode(data, mode);
mutex_unlock(&data->mutex);
return ret;
}
static const struct iio_mount_matrix *
bma180_accel_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct bma180_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_enum bma180_power_mode_enum = {
.items = bma180_power_modes,
.num_items = ARRAY_SIZE(bma180_power_modes),
.get = bma180_get_power_mode,
.set = bma180_set_power_mode,
};
static const struct iio_chan_spec_ext_info bma023_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
{ }
};
static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
IIO_ENUM("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
IIO_ENUM_AVAILABLE("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
{ }
};
#define BMA023_ACC_CHANNEL(_axis, _bits) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = _bits, \
.storagebits = 16, \
.shift = 16 - _bits, \
}, \
.ext_info = bma023_ext_info, \
}
#define BMA150_TEMP_CHANNEL { \
.type = IIO_TEMP, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
.scan_index = TEMP, \
.scan_type = { \
.sign = 'u', \
.realbits = 8, \
.storagebits = 16, \
}, \
}
#define BMA180_ACC_CHANNEL(_axis, _bits) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = _bits, \
.storagebits = 16, \
.shift = 16 - _bits, \
}, \
.ext_info = bma180_ext_info, \
}
#define BMA180_TEMP_CHANNEL { \
.type = IIO_TEMP, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
.scan_index = TEMP, \
.scan_type = { \
.sign = 's', \
.realbits = 8, \
.storagebits = 16, \
}, \
}
static const struct iio_chan_spec bma023_channels[] = {
BMA023_ACC_CHANNEL(X, 10),
BMA023_ACC_CHANNEL(Y, 10),
BMA023_ACC_CHANNEL(Z, 10),
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct iio_chan_spec bma150_channels[] = {
BMA023_ACC_CHANNEL(X, 10),
BMA023_ACC_CHANNEL(Y, 10),
BMA023_ACC_CHANNEL(Z, 10),
BMA150_TEMP_CHANNEL,
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct iio_chan_spec bma180_channels[] = {
BMA180_ACC_CHANNEL(X, 14),
BMA180_ACC_CHANNEL(Y, 14),
BMA180_ACC_CHANNEL(Z, 14),
BMA180_TEMP_CHANNEL,
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct iio_chan_spec bma250_channels[] = {
BMA180_ACC_CHANNEL(X, 10),
BMA180_ACC_CHANNEL(Y, 10),
BMA180_ACC_CHANNEL(Z, 10),
BMA180_TEMP_CHANNEL,
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct bma180_part_info bma180_part_info[] = {
[BMA023] = {
.chip_id = BMA023_ID_REG_VAL,
.channels = bma023_channels,
.num_channels = ARRAY_SIZE(bma023_channels),
.scale_table = bma023_scale_table,
.num_scales = ARRAY_SIZE(bma023_scale_table),
.bw_table = bma023_bw_table,
.num_bw = ARRAY_SIZE(bma023_bw_table),
/* No temperature channel */
.temp_offset = 0,
.int_reset_reg = BMA023_CTRL_REG0,
.int_reset_mask = BMA023_INT_RESET_MASK,
.sleep_reg = BMA023_CTRL_REG0,
.sleep_mask = BMA023_SLEEP,
.bw_reg = BMA023_CTRL_REG2,
.bw_mask = BMA023_BW_MASK,
.scale_reg = BMA023_CTRL_REG2,
.scale_mask = BMA023_RANGE_MASK,
/* No power mode on bma023 */
.power_reg = 0,
.power_mask = 0,
.lowpower_val = 0,
.int_enable_reg = BMA023_CTRL_REG3,
.int_enable_mask = BMA023_NEW_DATA_INT,
.softreset_reg = BMA023_CTRL_REG0,
.softreset_val = BMA023_RESET_VAL,
.chip_config = bma023_chip_config,
.chip_disable = bma023_chip_disable,
},
[BMA150] = {
.chip_id = BMA023_ID_REG_VAL,
.channels = bma150_channels,
.num_channels = ARRAY_SIZE(bma150_channels),
.scale_table = bma023_scale_table,
.num_scales = ARRAY_SIZE(bma023_scale_table),
.bw_table = bma023_bw_table,
.num_bw = ARRAY_SIZE(bma023_bw_table),
.temp_offset = -60, /* 0 LSB @ -30 degree C */
.int_reset_reg = BMA023_CTRL_REG0,
.int_reset_mask = BMA023_INT_RESET_MASK,
.sleep_reg = BMA023_CTRL_REG0,
.sleep_mask = BMA023_SLEEP,
.bw_reg = BMA023_CTRL_REG2,
.bw_mask = BMA023_BW_MASK,
.scale_reg = BMA023_CTRL_REG2,
.scale_mask = BMA023_RANGE_MASK,
/* No power mode on bma150 */
.power_reg = 0,
.power_mask = 0,
.lowpower_val = 0,
.int_enable_reg = BMA023_CTRL_REG3,
.int_enable_mask = BMA023_NEW_DATA_INT,
.softreset_reg = BMA023_CTRL_REG0,
.softreset_val = BMA023_RESET_VAL,
.chip_config = bma023_chip_config,
.chip_disable = bma023_chip_disable,
},
[BMA180] = {
.chip_id = BMA180_ID_REG_VAL,
.channels = bma180_channels,
.num_channels = ARRAY_SIZE(bma180_channels),
.scale_table = bma180_scale_table,
.num_scales = ARRAY_SIZE(bma180_scale_table),
.bw_table = bma180_bw_table,
.num_bw = ARRAY_SIZE(bma180_bw_table),
.temp_offset = 48, /* 0 LSB @ 24 degree C */
.int_reset_reg = BMA180_CTRL_REG0,
.int_reset_mask = BMA180_RESET_INT,
.sleep_reg = BMA180_CTRL_REG0,
.sleep_mask = BMA180_SLEEP,
.bw_reg = BMA180_BW_TCS,
.bw_mask = BMA180_BW,
.scale_reg = BMA180_OFFSET_LSB1,
.scale_mask = BMA180_RANGE,
.power_reg = BMA180_TCO_Z,
.power_mask = BMA180_MODE_CONFIG,
.lowpower_val = BMA180_LOW_POWER,
.int_enable_reg = BMA180_CTRL_REG3,
.int_enable_mask = BMA180_NEW_DATA_INT,
.softreset_reg = BMA180_RESET,
.softreset_val = BMA180_RESET_VAL,
.chip_config = bma180_chip_config,
.chip_disable = bma180_chip_disable,
},
[BMA250] = {
.chip_id = BMA250_ID_REG_VAL,
.channels = bma250_channels,
.num_channels = ARRAY_SIZE(bma250_channels),
.scale_table = bma250_scale_table,
.num_scales = ARRAY_SIZE(bma250_scale_table),
.bw_table = bma250_bw_table,
.num_bw = ARRAY_SIZE(bma250_bw_table),
.temp_offset = 48, /* 0 LSB @ 24 degree C */
.int_reset_reg = BMA250_INT_RESET_REG,
.int_reset_mask = BMA250_INT_RESET_MASK,
.sleep_reg = BMA250_POWER_REG,
.sleep_mask = BMA250_SUSPEND_MASK,
.bw_reg = BMA250_BW_REG,
.bw_mask = BMA250_BW_MASK,
.bw_offset = BMA250_BW_OFFSET,
.scale_reg = BMA250_RANGE_REG,
.scale_mask = BMA250_RANGE_MASK,
.power_reg = BMA250_POWER_REG,
.power_mask = BMA250_LOWPOWER_MASK,
.lowpower_val = 1,
.int_enable_reg = BMA250_INT_ENABLE_REG,
.int_enable_mask = BMA250_DATA_INTEN_MASK,
.softreset_reg = BMA250_RESET_REG,
.softreset_val = BMA180_RESET_VAL,
.chip_config = bma250_chip_config,
.chip_disable = bma250_chip_disable,
},
};
static irqreturn_t bma180_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct bma180_data *data = iio_priv(indio_dev);
s64 time_ns = iio_get_time_ns(indio_dev);
int bit, ret, i = 0;
mutex_lock(&data->mutex);
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = bma180_get_data_reg(data, bit);
if (ret < 0) {
mutex_unlock(&data->mutex);
goto err;
}
data->scan.chan[i++] = ret;
}
mutex_unlock(&data->mutex);
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, time_ns);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int bma180_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct bma180_data *data = iio_priv(indio_dev);
return bma180_set_new_data_intr_state(data, state);
}
static void bma180_trig_reen(struct iio_trigger *trig)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct bma180_data *data = iio_priv(indio_dev);
int ret;
ret = bma180_reset_intr(data);
if (ret)
dev_err(&data->client->dev, "failed to reset interrupt\n");
}
static const struct iio_trigger_ops bma180_trigger_ops = {
.set_trigger_state = bma180_data_rdy_trigger_set_state,
.reenable = bma180_trig_reen,
};
static int bma180_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct device *dev = &client->dev;
struct bma180_data *data;
struct iio_dev *indio_dev;
enum chip_ids chip;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
if (client->dev.of_node)
chip = (uintptr_t)of_device_get_match_data(dev);
else
chip = id->driver_data;
data->part_info = &bma180_part_info[chip];
ret = iio_read_mount_matrix(dev, &data->orientation);
if (ret)
return ret;
data->vdd_supply = devm_regulator_get(dev, "vdd");
if (IS_ERR(data->vdd_supply))
return dev_err_probe(dev, PTR_ERR(data->vdd_supply),
"Failed to get vdd regulator\n");
data->vddio_supply = devm_regulator_get(dev, "vddio");
if (IS_ERR(data->vddio_supply))
return dev_err_probe(dev, PTR_ERR(data->vddio_supply),
"Failed to get vddio regulator\n");
/* Typical voltage 2.4V these are min and max */
ret = regulator_set_voltage(data->vdd_supply, 1620000, 3600000);
if (ret)
return ret;
ret = regulator_set_voltage(data->vddio_supply, 1200000, 3600000);
if (ret)
return ret;
ret = regulator_enable(data->vdd_supply);
if (ret) {
dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
return ret;
}
ret = regulator_enable(data->vddio_supply);
if (ret) {
dev_err(dev, "Failed to enable vddio regulator: %d\n", ret);
goto err_disable_vdd;
}
/* Wait to make sure we started up properly (3 ms at least) */
usleep_range(3000, 5000);
ret = data->part_info->chip_config(data);
if (ret < 0)
goto err_chip_disable;
mutex_init(&data->mutex);
indio_dev->channels = data->part_info->channels;
indio_dev->num_channels = data->part_info->num_channels;
indio_dev->name = id->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bma180_info;
if (client->irq > 0) {
data->trig = iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name,
iio_device_id(indio_dev));
if (!data->trig) {
ret = -ENOMEM;
goto err_chip_disable;
}
ret = devm_request_irq(dev, client->irq,
iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING,
"bma180_event", data->trig);
if (ret) {
dev_err(dev, "unable to request IRQ\n");
goto err_trigger_free;
}
data->trig->ops = &bma180_trigger_ops;
iio_trigger_set_drvdata(data->trig, indio_dev);
ret = iio_trigger_register(data->trig);
if (ret)
goto err_trigger_free;
indio_dev->trig = iio_trigger_get(data->trig);
}
ret = iio_triggered_buffer_setup(indio_dev, NULL,
bma180_trigger_handler, NULL);
if (ret < 0) {
dev_err(dev, "unable to setup iio triggered buffer\n");
goto err_trigger_unregister;
}
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(dev, "unable to register iio device\n");
goto err_buffer_cleanup;
}
return 0;
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
if (data->trig)
iio_trigger_unregister(data->trig);
err_trigger_free:
iio_trigger_free(data->trig);
err_chip_disable:
data->part_info->chip_disable(data);
regulator_disable(data->vddio_supply);
err_disable_vdd:
regulator_disable(data->vdd_supply);
return ret;
}
static void bma180_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct bma180_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
if (data->trig) {
iio_trigger_unregister(data->trig);
iio_trigger_free(data->trig);
}
mutex_lock(&data->mutex);
data->part_info->chip_disable(data);
mutex_unlock(&data->mutex);
regulator_disable(data->vddio_supply);
regulator_disable(data->vdd_supply);
}
static int bma180_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct bma180_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = bma180_set_sleep_state(data, true);
mutex_unlock(&data->mutex);
return ret;
}
static int bma180_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct bma180_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = bma180_set_sleep_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
static DEFINE_SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
static const struct i2c_device_id bma180_ids[] = {
{ "bma023", BMA023 },
{ "bma150", BMA150 },
{ "bma180", BMA180 },
{ "bma250", BMA250 },
{ "smb380", BMA150 },
{ }
};
MODULE_DEVICE_TABLE(i2c, bma180_ids);
static const struct of_device_id bma180_of_match[] = {
{
.compatible = "bosch,bma023",
.data = (void *)BMA023
},
{
.compatible = "bosch,bma150",
.data = (void *)BMA150
},
{
.compatible = "bosch,bma180",
.data = (void *)BMA180
},
{
.compatible = "bosch,bma250",
.data = (void *)BMA250
},
{
.compatible = "bosch,smb380",
.data = (void *)BMA150
},
{ }
};
MODULE_DEVICE_TABLE(of, bma180_of_match);
static struct i2c_driver bma180_driver = {
.driver = {
.name = "bma180",
.pm = pm_sleep_ptr(&bma180_pm_ops),
.of_match_table = bma180_of_match,
},
.probe = bma180_probe,
.remove = bma180_remove,
.id_table = bma180_ids,
};
module_i2c_driver(bma180_driver);
MODULE_AUTHOR("Kravchenko Oleksandr <[email protected]>");
MODULE_AUTHOR("Texas Instruments, Inc.");
MODULE_DESCRIPTION("Bosch BMA023/BMA1x0/BMA250 triaxial acceleration sensor");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/bma180.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for Domintech DMARD06 accelerometer
*
* Copyright (C) 2016 Aleksei Mamlin <[email protected]>
*/
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#define DMARD06_DRV_NAME "dmard06"
/* Device data registers */
#define DMARD06_CHIP_ID_REG 0x0f
#define DMARD06_TOUT_REG 0x40
#define DMARD06_XOUT_REG 0x41
#define DMARD06_YOUT_REG 0x42
#define DMARD06_ZOUT_REG 0x43
#define DMARD06_CTRL1_REG 0x44
/* Device ID value */
#define DMARD05_CHIP_ID 0x05
#define DMARD06_CHIP_ID 0x06
#define DMARD07_CHIP_ID 0x07
/* Device values */
#define DMARD05_AXIS_SCALE_VAL 15625
#define DMARD06_AXIS_SCALE_VAL 31250
#define DMARD06_TEMP_CENTER_VAL 25
#define DMARD06_SIGN_BIT 7
/* Device power modes */
#define DMARD06_MODE_NORMAL 0x27
#define DMARD06_MODE_POWERDOWN 0x00
/* Device channels */
#define DMARD06_ACCEL_CHANNEL(_axis, _reg) { \
.type = IIO_ACCEL, \
.address = _reg, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.modified = 1, \
}
#define DMARD06_TEMP_CHANNEL(_reg) { \
.type = IIO_TEMP, \
.address = _reg, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_OFFSET), \
}
struct dmard06_data {
struct i2c_client *client;
u8 chip_id;
};
static const struct iio_chan_spec dmard06_channels[] = {
DMARD06_ACCEL_CHANNEL(X, DMARD06_XOUT_REG),
DMARD06_ACCEL_CHANNEL(Y, DMARD06_YOUT_REG),
DMARD06_ACCEL_CHANNEL(Z, DMARD06_ZOUT_REG),
DMARD06_TEMP_CHANNEL(DMARD06_TOUT_REG),
};
static int dmard06_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct dmard06_data *dmard06 = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_byte_data(dmard06->client,
chan->address);
if (ret < 0) {
dev_err(&dmard06->client->dev,
"Error reading data: %d\n", ret);
return ret;
}
*val = sign_extend32(ret, DMARD06_SIGN_BIT);
if (dmard06->chip_id == DMARD06_CHIP_ID)
*val = *val >> 1;
switch (chan->type) {
case IIO_ACCEL:
return IIO_VAL_INT;
case IIO_TEMP:
if (dmard06->chip_id != DMARD06_CHIP_ID)
*val = *val / 2;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
*val = DMARD06_TEMP_CENTER_VAL;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
*val = 0;
if (dmard06->chip_id == DMARD06_CHIP_ID)
*val2 = DMARD06_AXIS_SCALE_VAL;
else
*val2 = DMARD05_AXIS_SCALE_VAL;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static const struct iio_info dmard06_info = {
.read_raw = dmard06_read_raw,
};
static int dmard06_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct dmard06_data *dmard06;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "I2C check functionality failed\n");
return -ENXIO;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*dmard06));
if (!indio_dev) {
dev_err(&client->dev, "Failed to allocate iio device\n");
return -ENOMEM;
}
dmard06 = iio_priv(indio_dev);
dmard06->client = client;
ret = i2c_smbus_read_byte_data(dmard06->client, DMARD06_CHIP_ID_REG);
if (ret < 0) {
dev_err(&client->dev, "Error reading chip id: %d\n", ret);
return ret;
}
if (ret != DMARD05_CHIP_ID && ret != DMARD06_CHIP_ID &&
ret != DMARD07_CHIP_ID) {
dev_err(&client->dev, "Invalid chip id: %02d\n", ret);
return -ENODEV;
}
dmard06->chip_id = ret;
i2c_set_clientdata(client, indio_dev);
indio_dev->name = DMARD06_DRV_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = dmard06_channels;
indio_dev->num_channels = ARRAY_SIZE(dmard06_channels);
indio_dev->info = &dmard06_info;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int dmard06_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct dmard06_data *dmard06 = iio_priv(indio_dev);
int ret;
ret = i2c_smbus_write_byte_data(dmard06->client, DMARD06_CTRL1_REG,
DMARD06_MODE_POWERDOWN);
if (ret < 0)
return ret;
return 0;
}
static int dmard06_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct dmard06_data *dmard06 = iio_priv(indio_dev);
int ret;
ret = i2c_smbus_write_byte_data(dmard06->client, DMARD06_CTRL1_REG,
DMARD06_MODE_NORMAL);
if (ret < 0)
return ret;
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(dmard06_pm_ops, dmard06_suspend,
dmard06_resume);
static const struct i2c_device_id dmard06_id[] = {
{ "dmard05", 0 },
{ "dmard06", 0 },
{ "dmard07", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, dmard06_id);
static const struct of_device_id dmard06_of_match[] = {
{ .compatible = "domintech,dmard05" },
{ .compatible = "domintech,dmard06" },
{ .compatible = "domintech,dmard07" },
{ }
};
MODULE_DEVICE_TABLE(of, dmard06_of_match);
static struct i2c_driver dmard06_driver = {
.probe = dmard06_probe,
.id_table = dmard06_id,
.driver = {
.name = DMARD06_DRV_NAME,
.of_match_table = dmard06_of_match,
.pm = pm_sleep_ptr(&dmard06_pm_ops),
},
};
module_i2c_driver(dmard06_driver);
MODULE_AUTHOR("Aleksei Mamlin <[email protected]>");
MODULE_DESCRIPTION("Domintech DMARD06 accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/dmard06.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* 3-axis accelerometer driver supporting many I2C Bosch-Sensortec chips
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/mod_devicetable.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include <linux/regmap.h>
#include "bmc150-accel.h"
#ifdef CONFIG_ACPI
static const struct acpi_device_id bmc150_acpi_dual_accel_ids[] = {
{"BOSC0200"},
{"DUAL250E"},
{ }
};
/*
* The DUAL250E ACPI device for 360° hinges type 2-in-1s with 1 accelerometer
* in the display and 1 in the hinge has an ACPI-method (DSM) to tell the
* ACPI code about the angle between the 2 halves. This will make the ACPI
* code enable/disable the keyboard and touchpad. We need to call this to avoid
* the keyboard being disabled when the 2-in-1 is turned-on or resumed while
* fully folded into tablet mode (which gets detected with a HALL-sensor).
* If we don't call this then the keyboard won't work even when the 2-in-1 is
* changed to be used in laptop mode after the power-on / resume.
*
* This DSM takes 2 angles, selected by setting aux0 to 0 or 1, these presumably
* define the angle between the gravity vector measured by the accelerometer in
* the display (aux0=0) resp. the base (aux0=1) and some reference vector.
* The 2 angles get subtracted from each other so the reference vector does
* not matter and we can simply leave the second angle at 0.
*/
#define BMC150_DSM_GUID "7681541e-8827-4239-8d9d-36be7fe12542"
#define DUAL250E_SET_ANGLE_FN_INDEX 3
struct dual250e_set_angle_args {
u32 aux0;
u32 ang0;
u32 rawx;
u32 rawy;
u32 rawz;
} __packed;
static bool bmc150_acpi_set_angle_dsm(struct i2c_client *client, u32 aux0, u32 ang0)
{
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
struct dual250e_set_angle_args args = {
.aux0 = aux0,
.ang0 = ang0,
};
union acpi_object args_obj, *obj;
guid_t guid;
if (!acpi_dev_hid_uid_match(adev, "DUAL250E", NULL))
return false;
guid_parse(BMC150_DSM_GUID, &guid);
if (!acpi_check_dsm(adev->handle, &guid, 0, BIT(DUAL250E_SET_ANGLE_FN_INDEX)))
return false;
/*
* Note this triggers the following warning:
* "ACPI Warning: \_SB.PCI0.I2C2.ACC1._DSM: Argument #4 type mismatch -
* Found [Buffer], ACPI requires [Package]"
* This is unavoidable since the _DSM implementation expects a "naked"
* buffer, so wrapping it in a package will _not_ work.
*/
args_obj.type = ACPI_TYPE_BUFFER;
args_obj.buffer.length = sizeof(args);
args_obj.buffer.pointer = (u8 *)&args;
obj = acpi_evaluate_dsm(adev->handle, &guid, 0, DUAL250E_SET_ANGLE_FN_INDEX, &args_obj);
if (!obj) {
dev_err(&client->dev, "Failed to call DSM to enable keyboard and touchpad\n");
return false;
}
ACPI_FREE(obj);
return true;
}
static bool bmc150_acpi_enable_keyboard(struct i2c_client *client)
{
/*
* The EC must see a change for it to re-enable the kbd, so first
* set the angle to 270° (tent/stand mode) and then change it to
* 90° (laptop mode).
*/
if (!bmc150_acpi_set_angle_dsm(client, 0, 270))
return false;
/* The EC needs some time to notice the angle being changed */
msleep(100);
return bmc150_acpi_set_angle_dsm(client, 0, 90);
}
static void bmc150_acpi_resume_work(struct work_struct *work)
{
struct bmc150_accel_data *data =
container_of(work, struct bmc150_accel_data, resume_work.work);
bmc150_acpi_enable_keyboard(data->second_device);
}
static void bmc150_acpi_resume_handler(struct device *dev)
{
struct bmc150_accel_data *data = iio_priv(dev_get_drvdata(dev));
/*
* Delay the bmc150_acpi_enable_keyboard() call till after the system
* resume has completed, otherwise it will not work.
*/
schedule_delayed_work(&data->resume_work, msecs_to_jiffies(1000));
}
/*
* Some acpi_devices describe 2 accelerometers in a single ACPI device,
* try instantiating a second i2c_client for an I2cSerialBusV2 ACPI resource
* with index 1.
*/
static void bmc150_acpi_dual_accel_probe(struct i2c_client *client)
{
struct bmc150_accel_data *data = iio_priv(i2c_get_clientdata(client));
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
char dev_name[16];
struct i2c_board_info board_info = {
.type = "bmc150_accel",
.dev_name = dev_name,
.fwnode = client->dev.fwnode,
};
if (acpi_match_device_ids(adev, bmc150_acpi_dual_accel_ids))
return;
/*
* The 2nd accel sits in the base of 2-in-1s. The suffix is static, as
* there should never be more then 1 ACPI node with 2 accelerometers.
*/
snprintf(dev_name, sizeof(dev_name), "%s:base", acpi_device_hid(adev));
board_info.irq = acpi_dev_gpio_irq_get(adev, 1);
data->second_device = i2c_acpi_new_device(&client->dev, 1, &board_info);
if (!IS_ERR(data->second_device) && bmc150_acpi_enable_keyboard(data->second_device)) {
INIT_DELAYED_WORK(&data->resume_work, bmc150_acpi_resume_work);
data->resume_callback = bmc150_acpi_resume_handler;
}
}
static void bmc150_acpi_dual_accel_remove(struct i2c_client *client)
{
struct bmc150_accel_data *data = iio_priv(i2c_get_clientdata(client));
if (data->resume_callback)
cancel_delayed_work_sync(&data->resume_work);
i2c_unregister_device(data->second_device);
}
#else
static void bmc150_acpi_dual_accel_probe(struct i2c_client *client) {}
static void bmc150_acpi_dual_accel_remove(struct i2c_client *client) {}
#endif
static int bmc150_accel_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
const char *name = NULL;
enum bmc150_type type = BOSCH_UNKNOWN;
bool block_supported =
i2c_check_functionality(client->adapter, I2C_FUNC_I2C) ||
i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_I2C_BLOCK);
int ret;
regmap = devm_regmap_init_i2c(client, &bmc150_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to initialize i2c regmap\n");
return PTR_ERR(regmap);
}
if (id) {
name = id->name;
type = id->driver_data;
}
ret = bmc150_accel_core_probe(&client->dev, regmap, client->irq,
type, name, block_supported);
if (ret)
return ret;
/*
* The !id check avoids recursion when probe() gets called
* for the second client.
*/
if (!id && has_acpi_companion(&client->dev))
bmc150_acpi_dual_accel_probe(client);
return 0;
}
static void bmc150_accel_remove(struct i2c_client *client)
{
bmc150_acpi_dual_accel_remove(client);
bmc150_accel_core_remove(&client->dev);
}
static const struct acpi_device_id bmc150_accel_acpi_match[] = {
{"BMA0255"},
{"BMA0280"},
{"BMA222"},
{"BMA222E"},
{"BMA250E"},
{"BMC150A"},
{"BMI055A"},
{"BOSC0200"},
{"BSBA0150"},
{"DUAL250E"},
{ },
};
MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
static const struct i2c_device_id bmc150_accel_id[] = {
{"bma222"},
{"bma222e"},
{"bma250e"},
{"bma253"},
{"bma254"},
{"bma255"},
{"bma280"},
{"bmc150_accel"},
{"bmc156_accel", BOSCH_BMC156},
{"bmi055_accel"},
{}
};
MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
static const struct of_device_id bmc150_accel_of_match[] = {
{ .compatible = "bosch,bma222" },
{ .compatible = "bosch,bma222e" },
{ .compatible = "bosch,bma250e" },
{ .compatible = "bosch,bma253" },
{ .compatible = "bosch,bma254" },
{ .compatible = "bosch,bma255" },
{ .compatible = "bosch,bma280" },
{ .compatible = "bosch,bmc150_accel" },
{ .compatible = "bosch,bmc156_accel" },
{ .compatible = "bosch,bmi055_accel" },
{ },
};
MODULE_DEVICE_TABLE(of, bmc150_accel_of_match);
static struct i2c_driver bmc150_accel_driver = {
.driver = {
.name = "bmc150_accel_i2c",
.of_match_table = bmc150_accel_of_match,
.acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
.pm = &bmc150_accel_pm_ops,
},
.probe = bmc150_accel_probe,
.remove = bmc150_accel_remove,
.id_table = bmc150_accel_id,
};
module_i2c_driver(bmc150_accel_driver);
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMC150 I2C accelerometer driver");
MODULE_IMPORT_NS(IIO_BMC150);
| linux-master | drivers/iio/accel/bmc150-accel-i2c.c |
// SPDX-License-Identifier: GPL-2.0
/*
* NXP FXLS8962AF/FXLS8964AF Accelerometer I2C Driver
*
* Copyright 2021 Connected Cars A/S
*/
#include <linux/dev_printk.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "fxls8962af.h"
static int fxls8962af_probe(struct i2c_client *client)
{
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &fxls8962af_i2c_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to initialize i2c regmap\n");
return PTR_ERR(regmap);
}
return fxls8962af_core_probe(&client->dev, regmap, client->irq);
}
static const struct i2c_device_id fxls8962af_id[] = {
{ "fxls8962af", fxls8962af },
{ "fxls8964af", fxls8964af },
{}
};
MODULE_DEVICE_TABLE(i2c, fxls8962af_id);
static const struct of_device_id fxls8962af_of_match[] = {
{ .compatible = "nxp,fxls8962af" },
{ .compatible = "nxp,fxls8964af" },
{}
};
MODULE_DEVICE_TABLE(of, fxls8962af_of_match);
static struct i2c_driver fxls8962af_driver = {
.driver = {
.name = "fxls8962af_i2c",
.of_match_table = fxls8962af_of_match,
.pm = pm_ptr(&fxls8962af_pm_ops),
},
.probe = fxls8962af_probe,
.id_table = fxls8962af_id,
};
module_i2c_driver(fxls8962af_driver);
MODULE_AUTHOR("Sean Nyekjaer <[email protected]>");
MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_FXLS8962AF);
| linux-master | drivers/iio/accel/fxls8962af-i2c.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer
*
* Copyright 2010 Analog Devices Inc.
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#define ADIS16209_STARTUP_DELAY_MS 220
#define ADIS16209_FLASH_CNT_REG 0x00
/* Data Output Register Definitions */
#define ADIS16209_SUPPLY_OUT_REG 0x02
#define ADIS16209_XACCL_OUT_REG 0x04
#define ADIS16209_YACCL_OUT_REG 0x06
/* Output, auxiliary ADC input */
#define ADIS16209_AUX_ADC_REG 0x08
/* Output, temperature */
#define ADIS16209_TEMP_OUT_REG 0x0A
/* Output, +/- 90 degrees X-axis inclination */
#define ADIS16209_XINCL_OUT_REG 0x0C
#define ADIS16209_YINCL_OUT_REG 0x0E
/* Output, +/-180 vertical rotational position */
#define ADIS16209_ROT_OUT_REG 0x10
/*
* Calibration Register Definitions.
* Acceleration, inclination or rotation offset null.
*/
#define ADIS16209_XACCL_NULL_REG 0x12
#define ADIS16209_YACCL_NULL_REG 0x14
#define ADIS16209_XINCL_NULL_REG 0x16
#define ADIS16209_YINCL_NULL_REG 0x18
#define ADIS16209_ROT_NULL_REG 0x1A
/* Alarm Register Definitions */
#define ADIS16209_ALM_MAG1_REG 0x20
#define ADIS16209_ALM_MAG2_REG 0x22
#define ADIS16209_ALM_SMPL1_REG 0x24
#define ADIS16209_ALM_SMPL2_REG 0x26
#define ADIS16209_ALM_CTRL_REG 0x28
#define ADIS16209_AUX_DAC_REG 0x30
#define ADIS16209_GPIO_CTRL_REG 0x32
#define ADIS16209_SMPL_PRD_REG 0x36
#define ADIS16209_AVG_CNT_REG 0x38
#define ADIS16209_SLP_CNT_REG 0x3A
#define ADIS16209_MSC_CTRL_REG 0x34
#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST BIT(10)
#define ADIS16209_MSC_CTRL_SELF_TEST_EN BIT(8)
#define ADIS16209_MSC_CTRL_DATA_RDY_EN BIT(2)
/* Data-ready polarity: 1 = active high, 0 = active low */
#define ADIS16209_MSC_CTRL_ACTIVE_HIGH BIT(1)
#define ADIS16209_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
#define ADIS16209_STAT_REG 0x3C
#define ADIS16209_STAT_ALARM2 BIT(9)
#define ADIS16209_STAT_ALARM1 BIT(8)
#define ADIS16209_STAT_SELFTEST_FAIL_BIT 5
#define ADIS16209_STAT_SPI_FAIL_BIT 3
#define ADIS16209_STAT_FLASH_UPT_FAIL_BIT 2
/* Power supply above 3.625 V */
#define ADIS16209_STAT_POWER_HIGH_BIT 1
/* Power supply below 2.975 V */
#define ADIS16209_STAT_POWER_LOW_BIT 0
#define ADIS16209_CMD_REG 0x3E
#define ADIS16209_CMD_SW_RESET BIT(7)
#define ADIS16209_CMD_CLEAR_STAT BIT(4)
#define ADIS16209_CMD_FACTORY_CAL BIT(1)
#define ADIS16209_ERROR_ACTIVE BIT(14)
enum adis16209_scan {
ADIS16209_SCAN_SUPPLY,
ADIS16209_SCAN_ACC_X,
ADIS16209_SCAN_ACC_Y,
ADIS16209_SCAN_AUX_ADC,
ADIS16209_SCAN_TEMP,
ADIS16209_SCAN_INCLI_X,
ADIS16209_SCAN_INCLI_Y,
ADIS16209_SCAN_ROT,
};
static const u8 adis16209_addresses[8][1] = {
[ADIS16209_SCAN_SUPPLY] = { },
[ADIS16209_SCAN_AUX_ADC] = { },
[ADIS16209_SCAN_ACC_X] = { ADIS16209_XACCL_NULL_REG },
[ADIS16209_SCAN_ACC_Y] = { ADIS16209_YACCL_NULL_REG },
[ADIS16209_SCAN_INCLI_X] = { ADIS16209_XINCL_NULL_REG },
[ADIS16209_SCAN_INCLI_Y] = { ADIS16209_YINCL_NULL_REG },
[ADIS16209_SCAN_ROT] = { },
[ADIS16209_SCAN_TEMP] = { },
};
static int adis16209_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int m;
if (mask != IIO_CHAN_INFO_CALIBBIAS)
return -EINVAL;
switch (chan->type) {
case IIO_ACCEL:
case IIO_INCLI:
m = GENMASK(13, 0);
break;
default:
return -EINVAL;
}
return adis_write_reg_16(st, adis16209_addresses[chan->scan_index][0],
val & m);
}
static int adis16209_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int ret;
int bits;
u8 addr;
s16 val16;
switch (mask) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan,
ADIS16209_ERROR_ACTIVE, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_VOLTAGE:
*val = 0;
switch (chan->channel) {
case 0:
*val2 = 305180; /* 0.30518 mV */
break;
case 1:
*val2 = 610500; /* 0.6105 mV */
break;
default:
return -EINVAL;
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = -470;
*val2 = 0;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
/*
* IIO base unit for sensitivity of accelerometer
* is milli g.
* 1 LSB represents 0.244 mg.
*/
*val = 0;
*val2 = IIO_G_TO_M_S_2(244140);
return IIO_VAL_INT_PLUS_NANO;
case IIO_INCLI:
case IIO_ROT:
/*
* IIO base units for rotation are degrees.
* 1 LSB represents 0.025 milli degrees.
*/
*val = 0;
*val2 = 25000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_OFFSET:
/*
* The raw ADC value is 0x4FE when the temperature
* is 45 degrees and the scale factor per milli
* degree celcius is -470.
*/
*val = 25000 / -470 - 0x4FE;
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBBIAS:
switch (chan->type) {
case IIO_ACCEL:
bits = 14;
break;
default:
return -EINVAL;
}
addr = adis16209_addresses[chan->scan_index][0];
ret = adis_read_reg_16(st, addr, &val16);
if (ret)
return ret;
*val = sign_extend32(val16, bits - 1);
return IIO_VAL_INT;
}
return -EINVAL;
}
static const struct iio_chan_spec adis16209_channels[] = {
ADIS_SUPPLY_CHAN(ADIS16209_SUPPLY_OUT_REG, ADIS16209_SCAN_SUPPLY,
0, 14),
ADIS_TEMP_CHAN(ADIS16209_TEMP_OUT_REG, ADIS16209_SCAN_TEMP, 0, 12),
ADIS_ACCEL_CHAN(X, ADIS16209_XACCL_OUT_REG, ADIS16209_SCAN_ACC_X,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_ACCEL_CHAN(Y, ADIS16209_YACCL_OUT_REG, ADIS16209_SCAN_ACC_Y,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_AUX_ADC_CHAN(ADIS16209_AUX_ADC_REG, ADIS16209_SCAN_AUX_ADC, 0, 12),
ADIS_INCLI_CHAN(X, ADIS16209_XINCL_OUT_REG, ADIS16209_SCAN_INCLI_X,
0, 0, 14),
ADIS_INCLI_CHAN(Y, ADIS16209_YINCL_OUT_REG, ADIS16209_SCAN_INCLI_Y,
0, 0, 14),
ADIS_ROT_CHAN(X, ADIS16209_ROT_OUT_REG, ADIS16209_SCAN_ROT, 0, 0, 14),
IIO_CHAN_SOFT_TIMESTAMP(8)
};
static const struct iio_info adis16209_info = {
.read_raw = adis16209_read_raw,
.write_raw = adis16209_write_raw,
.update_scan_mode = adis_update_scan_mode,
};
static const char * const adis16209_status_error_msgs[] = {
[ADIS16209_STAT_SELFTEST_FAIL_BIT] = "Self test failure",
[ADIS16209_STAT_SPI_FAIL_BIT] = "SPI failure",
[ADIS16209_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
[ADIS16209_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
[ADIS16209_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
};
static const struct adis_timeout adis16209_timeouts = {
.reset_ms = ADIS16209_STARTUP_DELAY_MS,
.self_test_ms = ADIS16209_STARTUP_DELAY_MS,
.sw_reset_ms = ADIS16209_STARTUP_DELAY_MS,
};
static const struct adis_data adis16209_data = {
.read_delay = 30,
.msc_ctrl_reg = ADIS16209_MSC_CTRL_REG,
.glob_cmd_reg = ADIS16209_CMD_REG,
.diag_stat_reg = ADIS16209_STAT_REG,
.self_test_mask = ADIS16209_MSC_CTRL_SELF_TEST_EN,
.self_test_reg = ADIS16209_MSC_CTRL_REG,
.self_test_no_autoclear = true,
.timeouts = &adis16209_timeouts,
.status_error_msgs = adis16209_status_error_msgs,
.status_error_mask = BIT(ADIS16209_STAT_SELFTEST_FAIL_BIT) |
BIT(ADIS16209_STAT_SPI_FAIL_BIT) |
BIT(ADIS16209_STAT_FLASH_UPT_FAIL_BIT) |
BIT(ADIS16209_STAT_POWER_HIGH_BIT) |
BIT(ADIS16209_STAT_POWER_LOW_BIT),
};
static int adis16209_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adis *st;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
indio_dev->name = spi->dev.driver->name;
indio_dev->info = &adis16209_info;
indio_dev->channels = adis16209_channels;
indio_dev->num_channels = ARRAY_SIZE(adis16209_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
ret = adis_init(st, indio_dev, spi, &adis16209_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
if (ret)
return ret;
ret = __adis_initial_startup(st);
if (ret)
return ret;
return devm_iio_device_register(&spi->dev, indio_dev);
}
static struct spi_driver adis16209_driver = {
.driver = {
.name = "adis16209",
},
.probe = adis16209_probe,
};
module_spi_driver(adis16209_driver);
MODULE_AUTHOR("Barry Song <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:adis16209");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/accel/adis16209.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Freescale MMA7660FC 3-Axis Accelerometer
*
* Copyright (c) 2016, Intel Corporation.
*
* IIO driver for Freescale MMA7660FC; 7-bit I2C address: 0x4c.
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define MMA7660_DRIVER_NAME "mma7660"
#define MMA7660_REG_XOUT 0x00
#define MMA7660_REG_YOUT 0x01
#define MMA7660_REG_ZOUT 0x02
#define MMA7660_REG_OUT_BIT_ALERT BIT(6)
#define MMA7660_REG_MODE 0x07
#define MMA7660_REG_MODE_BIT_MODE BIT(0)
#define MMA7660_REG_MODE_BIT_TON BIT(2)
#define MMA7660_I2C_READ_RETRIES 5
/*
* The accelerometer has one measurement range:
*
* -1.5g - +1.5g (6-bit, signed)
*
* scale = (1.5 + 1.5) * 9.81 / (2^6 - 1) = 0.467142857
*/
#define MMA7660_SCALE_AVAIL "0.467142857"
static const int mma7660_nscale = 467142857;
#define MMA7660_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec mma7660_channels[] = {
MMA7660_CHANNEL(MMA7660_REG_XOUT, X),
MMA7660_CHANNEL(MMA7660_REG_YOUT, Y),
MMA7660_CHANNEL(MMA7660_REG_ZOUT, Z),
};
enum mma7660_mode {
MMA7660_MODE_STANDBY,
MMA7660_MODE_ACTIVE
};
struct mma7660_data {
struct i2c_client *client;
struct mutex lock;
enum mma7660_mode mode;
};
static IIO_CONST_ATTR(in_accel_scale_available, MMA7660_SCALE_AVAIL);
static struct attribute *mma7660_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group mma7660_attribute_group = {
.attrs = mma7660_attributes
};
static int mma7660_set_mode(struct mma7660_data *data,
enum mma7660_mode mode)
{
int ret;
struct i2c_client *client = data->client;
if (mode == data->mode)
return 0;
ret = i2c_smbus_read_byte_data(client, MMA7660_REG_MODE);
if (ret < 0) {
dev_err(&client->dev, "failed to read sensor mode\n");
return ret;
}
if (mode == MMA7660_MODE_ACTIVE) {
ret &= ~MMA7660_REG_MODE_BIT_TON;
ret |= MMA7660_REG_MODE_BIT_MODE;
} else {
ret &= ~MMA7660_REG_MODE_BIT_TON;
ret &= ~MMA7660_REG_MODE_BIT_MODE;
}
ret = i2c_smbus_write_byte_data(client, MMA7660_REG_MODE, ret);
if (ret < 0) {
dev_err(&client->dev, "failed to change sensor mode\n");
return ret;
}
data->mode = mode;
return ret;
}
static int mma7660_read_accel(struct mma7660_data *data, u8 address)
{
int ret, retries = MMA7660_I2C_READ_RETRIES;
struct i2c_client *client = data->client;
/*
* Read data. If the Alert bit is set, the register was read at
* the same time as the device was attempting to update the content.
* The solution is to read the register again. Do this only
* MMA7660_I2C_READ_RETRIES times to avoid spending too much time
* in the kernel.
*/
do {
ret = i2c_smbus_read_byte_data(client, address);
if (ret < 0) {
dev_err(&client->dev, "register read failed\n");
return ret;
}
} while (retries-- > 0 && ret & MMA7660_REG_OUT_BIT_ALERT);
if (ret & MMA7660_REG_OUT_BIT_ALERT) {
dev_err(&client->dev, "all register read retries failed\n");
return -ETIMEDOUT;
}
return ret;
}
static int mma7660_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma7660_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&data->lock);
ret = mma7660_read_accel(data, chan->address);
mutex_unlock(&data->lock);
if (ret < 0)
return ret;
*val = sign_extend32(ret, 5);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = mma7660_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
return -EINVAL;
}
static const struct iio_info mma7660_info = {
.read_raw = mma7660_read_raw,
.attrs = &mma7660_attribute_group,
};
static int mma7660_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct mma7660_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev) {
dev_err(&client->dev, "iio allocation failed!\n");
return -ENOMEM;
}
data = iio_priv(indio_dev);
data->client = client;
i2c_set_clientdata(client, indio_dev);
mutex_init(&data->lock);
data->mode = MMA7660_MODE_STANDBY;
indio_dev->info = &mma7660_info;
indio_dev->name = MMA7660_DRIVER_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mma7660_channels;
indio_dev->num_channels = ARRAY_SIZE(mma7660_channels);
ret = mma7660_set_mode(data, MMA7660_MODE_ACTIVE);
if (ret < 0)
return ret;
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
mma7660_set_mode(data, MMA7660_MODE_STANDBY);
}
return ret;
}
static void mma7660_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
int ret;
iio_device_unregister(indio_dev);
ret = mma7660_set_mode(iio_priv(indio_dev), MMA7660_MODE_STANDBY);
if (ret)
dev_warn(&client->dev, "Failed to put device in stand-by mode (%pe), ignoring\n",
ERR_PTR(ret));
}
static int mma7660_suspend(struct device *dev)
{
struct mma7660_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mma7660_set_mode(data, MMA7660_MODE_STANDBY);
}
static int mma7660_resume(struct device *dev)
{
struct mma7660_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mma7660_set_mode(data, MMA7660_MODE_ACTIVE);
}
static DEFINE_SIMPLE_DEV_PM_OPS(mma7660_pm_ops, mma7660_suspend,
mma7660_resume);
static const struct i2c_device_id mma7660_i2c_id[] = {
{"mma7660", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, mma7660_i2c_id);
static const struct of_device_id mma7660_of_match[] = {
{ .compatible = "fsl,mma7660" },
{ }
};
MODULE_DEVICE_TABLE(of, mma7660_of_match);
static const struct acpi_device_id mma7660_acpi_id[] = {
{"MMA7660", 0},
{}
};
MODULE_DEVICE_TABLE(acpi, mma7660_acpi_id);
static struct i2c_driver mma7660_driver = {
.driver = {
.name = "mma7660",
.pm = pm_sleep_ptr(&mma7660_pm_ops),
.of_match_table = mma7660_of_match,
.acpi_match_table = mma7660_acpi_id,
},
.probe = mma7660_probe,
.remove = mma7660_remove,
.id_table = mma7660_i2c_id,
};
module_i2c_driver(mma7660_driver);
MODULE_AUTHOR("Constantin Musca <[email protected]>");
MODULE_DESCRIPTION("Freescale MMA7660FC 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/mma7660.c |
// SPDX-License-Identifier: GPL-2.0
/*
* 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
* - BMI088
*
* Copyright (c) 2018-2020, Topic Embedded Products
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include "bmi088-accel.h"
static int bmi088_regmap_spi_write(void *context, const void *data, size_t count)
{
struct spi_device *spi = context;
/* Write register is same as generic SPI */
return spi_write(spi, data, count);
}
static int bmi088_regmap_spi_read(void *context, const void *reg,
size_t reg_size, void *val, size_t val_size)
{
struct spi_device *spi = context;
u8 addr[2];
addr[0] = *(u8 *)reg;
addr[0] |= BIT(7); /* Set RW = '1' */
addr[1] = 0; /* Read requires a dummy byte transfer */
return spi_write_then_read(spi, addr, sizeof(addr), val, val_size);
}
static struct regmap_bus bmi088_regmap_bus = {
.write = bmi088_regmap_spi_write,
.read = bmi088_regmap_spi_read,
};
static int bmi088_accel_probe(struct spi_device *spi)
{
struct regmap *regmap;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init(&spi->dev, &bmi088_regmap_bus,
spi, &bmi088_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to initialize spi regmap\n");
return PTR_ERR(regmap);
}
return bmi088_accel_core_probe(&spi->dev, regmap, spi->irq,
id->driver_data);
}
static void bmi088_accel_remove(struct spi_device *spi)
{
bmi088_accel_core_remove(&spi->dev);
}
static const struct of_device_id bmi088_of_match[] = {
{ .compatible = "bosch,bmi085-accel" },
{ .compatible = "bosch,bmi088-accel" },
{ .compatible = "bosch,bmi090l-accel" },
{}
};
MODULE_DEVICE_TABLE(of, bmi088_of_match);
static const struct spi_device_id bmi088_accel_id[] = {
{"bmi085-accel", BOSCH_BMI085},
{"bmi088-accel", BOSCH_BMI088},
{"bmi090l-accel", BOSCH_BMI090L},
{}
};
MODULE_DEVICE_TABLE(spi, bmi088_accel_id);
static struct spi_driver bmi088_accel_driver = {
.driver = {
.name = "bmi088_accel_spi",
.pm = pm_ptr(&bmi088_accel_pm_ops),
.of_match_table = bmi088_of_match,
},
.probe = bmi088_accel_probe,
.remove = bmi088_accel_remove,
.id_table = bmi088_accel_id,
};
module_spi_driver(bmi088_accel_driver);
MODULE_AUTHOR("Niek van Agt <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMI088 accelerometer driver (SPI)");
MODULE_IMPORT_NS(IIO_BMI088);
| linux-master | drivers/iio/accel/bmi088-accel-spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2022 ROHM Semiconductors
*
* ROHM/KIONIX KX022A accelerometer driver
*/
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "kionix-kx022a.h"
static int kx022a_i2c_probe(struct i2c_client *i2c)
{
struct device *dev = &i2c->dev;
struct regmap *regmap;
if (!i2c->irq) {
dev_err(dev, "No IRQ configured\n");
return -EINVAL;
}
regmap = devm_regmap_init_i2c(i2c, &kx022a_regmap);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap),
"Failed to initialize Regmap\n");
return kx022a_probe_internal(dev);
}
static const struct of_device_id kx022a_of_match[] = {
{ .compatible = "kionix,kx022a", },
{ }
};
MODULE_DEVICE_TABLE(of, kx022a_of_match);
static struct i2c_driver kx022a_i2c_driver = {
.driver = {
.name = "kx022a-i2c",
.of_match_table = kx022a_of_match,
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
.probe = kx022a_i2c_probe,
};
module_i2c_driver(kx022a_i2c_driver);
MODULE_DESCRIPTION("ROHM/Kionix KX022A accelerometer driver");
MODULE_AUTHOR("Matti Vaittinen <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_KX022A);
| linux-master | drivers/iio/accel/kionix-kx022a-i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Core IIO driver for Bosch BMA400 triaxial acceleration sensor.
*
* Copyright 2019 Dan Robertson <[email protected]>
*
* TODO:
* - Support for power management
* - Support events and interrupts
* - Create channel for step count
* - Create channel for sensor time
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <asm/unaligned.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/events.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include "bma400.h"
/*
* The G-range selection may be one of 2g, 4g, 8, or 16g. The scale may
* be selected with the acc_range bits of the ACC_CONFIG1 register.
* NB: This buffer is populated in the device init.
*/
static int bma400_scales[8];
/*
* See the ACC_CONFIG1 section of the datasheet.
* NB: This buffer is populated in the device init.
*/
static int bma400_sample_freqs[14];
static const int bma400_osr_range[] = { 0, 1, 3 };
static int tap_reset_timeout[BMA400_TAP_TIM_LIST_LEN] = {
300000,
400000,
500000,
600000
};
static int tap_max2min_time[BMA400_TAP_TIM_LIST_LEN] = {
30000,
45000,
60000,
90000
};
static int double_tap2_min_delay[BMA400_TAP_TIM_LIST_LEN] = {
20000,
40000,
60000,
80000
};
/* See the ACC_CONFIG0 section of the datasheet */
enum bma400_power_mode {
POWER_MODE_SLEEP = 0x00,
POWER_MODE_LOW = 0x01,
POWER_MODE_NORMAL = 0x02,
POWER_MODE_INVALID = 0x03,
};
enum bma400_scan {
BMA400_ACCL_X,
BMA400_ACCL_Y,
BMA400_ACCL_Z,
BMA400_TEMP,
};
struct bma400_sample_freq {
int hz;
int uhz;
};
enum bma400_activity {
BMA400_STILL,
BMA400_WALKING,
BMA400_RUNNING,
};
struct bma400_data {
struct device *dev;
struct regmap *regmap;
struct mutex mutex; /* data register lock */
struct iio_mount_matrix orientation;
enum bma400_power_mode power_mode;
struct bma400_sample_freq sample_freq;
int oversampling_ratio;
int scale;
struct iio_trigger *trig;
int steps_enabled;
bool step_event_en;
bool activity_event_en;
unsigned int generic_event_en;
unsigned int tap_event_en_bitmask;
/* Correct time stamp alignment */
struct {
__le16 buff[3];
u8 temperature;
s64 ts __aligned(8);
} buffer __aligned(IIO_DMA_MINALIGN);
__le16 status;
__be16 duration;
};
static bool bma400_is_writable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMA400_CHIP_ID_REG:
case BMA400_ERR_REG:
case BMA400_STATUS_REG:
case BMA400_X_AXIS_LSB_REG:
case BMA400_X_AXIS_MSB_REG:
case BMA400_Y_AXIS_LSB_REG:
case BMA400_Y_AXIS_MSB_REG:
case BMA400_Z_AXIS_LSB_REG:
case BMA400_Z_AXIS_MSB_REG:
case BMA400_SENSOR_TIME0:
case BMA400_SENSOR_TIME1:
case BMA400_SENSOR_TIME2:
case BMA400_EVENT_REG:
case BMA400_INT_STAT0_REG:
case BMA400_INT_STAT1_REG:
case BMA400_INT_STAT2_REG:
case BMA400_TEMP_DATA_REG:
case BMA400_FIFO_LENGTH0_REG:
case BMA400_FIFO_LENGTH1_REG:
case BMA400_FIFO_DATA_REG:
case BMA400_STEP_CNT0_REG:
case BMA400_STEP_CNT1_REG:
case BMA400_STEP_CNT3_REG:
case BMA400_STEP_STAT_REG:
return false;
default:
return true;
}
}
static bool bma400_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMA400_ERR_REG:
case BMA400_STATUS_REG:
case BMA400_X_AXIS_LSB_REG:
case BMA400_X_AXIS_MSB_REG:
case BMA400_Y_AXIS_LSB_REG:
case BMA400_Y_AXIS_MSB_REG:
case BMA400_Z_AXIS_LSB_REG:
case BMA400_Z_AXIS_MSB_REG:
case BMA400_SENSOR_TIME0:
case BMA400_SENSOR_TIME1:
case BMA400_SENSOR_TIME2:
case BMA400_EVENT_REG:
case BMA400_INT_STAT0_REG:
case BMA400_INT_STAT1_REG:
case BMA400_INT_STAT2_REG:
case BMA400_TEMP_DATA_REG:
case BMA400_FIFO_LENGTH0_REG:
case BMA400_FIFO_LENGTH1_REG:
case BMA400_FIFO_DATA_REG:
case BMA400_STEP_CNT0_REG:
case BMA400_STEP_CNT1_REG:
case BMA400_STEP_CNT3_REG:
case BMA400_STEP_STAT_REG:
return true;
default:
return false;
}
}
const struct regmap_config bma400_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = BMA400_CMD_REG,
.cache_type = REGCACHE_RBTREE,
.writeable_reg = bma400_is_writable_reg,
.volatile_reg = bma400_is_volatile_reg,
};
EXPORT_SYMBOL_NS(bma400_regmap_config, IIO_BMA400);
static const struct iio_mount_matrix *
bma400_accel_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct bma400_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info bma400_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma400_accel_get_mount_matrix),
{ }
};
static const struct iio_event_spec bma400_step_detect_event = {
.type = IIO_EV_TYPE_CHANGE,
.dir = IIO_EV_DIR_NONE,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
};
static const struct iio_event_spec bma400_activity_event = {
.type = IIO_EV_TYPE_CHANGE,
.dir = IIO_EV_DIR_NONE,
.mask_shared_by_type = BIT(IIO_EV_INFO_ENABLE),
};
static const struct iio_event_spec bma400_accel_event[] = {
{
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_FALLING,
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD) |
BIT(IIO_EV_INFO_HYSTERESIS) |
BIT(IIO_EV_INFO_ENABLE),
},
{
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_RISING,
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD) |
BIT(IIO_EV_INFO_HYSTERESIS) |
BIT(IIO_EV_INFO_ENABLE),
},
{
.type = IIO_EV_TYPE_GESTURE,
.dir = IIO_EV_DIR_SINGLETAP,
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_RESET_TIMEOUT),
},
{
.type = IIO_EV_TYPE_GESTURE,
.dir = IIO_EV_DIR_DOUBLETAP,
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_RESET_TIMEOUT) |
BIT(IIO_EV_INFO_TAP2_MIN_DELAY),
},
};
static int usec_to_tapreg_raw(int usec, const int *time_list)
{
int index;
for (index = 0; index < BMA400_TAP_TIM_LIST_LEN; index++) {
if (usec == time_list[index])
return index;
}
return -EINVAL;
}
static ssize_t in_accel_gesture_tap_maxtomin_time_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct bma400_data *data = iio_priv(indio_dev);
int ret, reg_val, raw, vals[2];
ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1, ®_val);
if (ret)
return ret;
raw = FIELD_GET(BMA400_TAP_TICSTH_MSK, reg_val);
vals[0] = 0;
vals[1] = tap_max2min_time[raw];
return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
}
static ssize_t in_accel_gesture_tap_maxtomin_time_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct bma400_data *data = iio_priv(indio_dev);
int ret, val_int, val_fract, raw;
ret = iio_str_to_fixpoint(buf, 100000, &val_int, &val_fract);
if (ret)
return ret;
raw = usec_to_tapreg_raw(val_fract, tap_max2min_time);
if (raw < 0)
return -EINVAL;
ret = regmap_update_bits(data->regmap, BMA400_TAP_CONFIG1,
BMA400_TAP_TICSTH_MSK,
FIELD_PREP(BMA400_TAP_TICSTH_MSK, raw));
if (ret)
return ret;
return len;
}
static IIO_DEVICE_ATTR_RW(in_accel_gesture_tap_maxtomin_time, 0);
/*
* Tap interrupts works with 200 Hz input data rate and the time based tap
* controls are in the terms of data samples so the below calculation is
* used to convert the configuration values into seconds.
* e.g.:
* 60 data samples * 0.005 ms = 0.3 seconds.
* 80 data samples * 0.005 ms = 0.4 seconds.
*/
/* quiet configuration values in seconds */
static IIO_CONST_ATTR(in_accel_gesture_tap_reset_timeout_available,
"0.3 0.4 0.5 0.6");
/* tics_th configuration values in seconds */
static IIO_CONST_ATTR(in_accel_gesture_tap_maxtomin_time_available,
"0.03 0.045 0.06 0.09");
/* quiet_dt configuration values in seconds */
static IIO_CONST_ATTR(in_accel_gesture_doubletap_tap2_min_delay_available,
"0.02 0.04 0.06 0.08");
/* List of sensitivity values available to configure tap interrupts */
static IIO_CONST_ATTR(in_accel_gesture_tap_value_available, "0 1 2 3 4 5 6 7");
static struct attribute *bma400_event_attributes[] = {
&iio_const_attr_in_accel_gesture_tap_value_available.dev_attr.attr,
&iio_const_attr_in_accel_gesture_tap_reset_timeout_available.dev_attr.attr,
&iio_const_attr_in_accel_gesture_tap_maxtomin_time_available.dev_attr.attr,
&iio_const_attr_in_accel_gesture_doubletap_tap2_min_delay_available.dev_attr.attr,
&iio_dev_attr_in_accel_gesture_tap_maxtomin_time.dev_attr.attr,
NULL
};
static const struct attribute_group bma400_event_attribute_group = {
.attrs = bma400_event_attributes,
};
#define BMA400_ACC_CHANNEL(_index, _axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
.ext_info = bma400_ext_info, \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
.event_spec = bma400_accel_event, \
.num_event_specs = ARRAY_SIZE(bma400_accel_event) \
}
#define BMA400_ACTIVITY_CHANNEL(_chan2) { \
.type = IIO_ACTIVITY, \
.modified = 1, \
.channel2 = _chan2, \
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
.scan_index = -1, /* No buffer support */ \
.event_spec = &bma400_activity_event, \
.num_event_specs = 1, \
}
static const struct iio_chan_spec bma400_channels[] = {
BMA400_ACC_CHANNEL(0, X),
BMA400_ACC_CHANNEL(1, Y),
BMA400_ACC_CHANNEL(2, Z),
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.scan_index = 3,
.scan_type = {
.sign = 's',
.realbits = 8,
.storagebits = 8,
.endianness = IIO_LE,
},
},
{
.type = IIO_STEPS,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_ENABLE),
.scan_index = -1, /* No buffer support */
.event_spec = &bma400_step_detect_event,
.num_event_specs = 1,
},
BMA400_ACTIVITY_CHANNEL(IIO_MOD_STILL),
BMA400_ACTIVITY_CHANNEL(IIO_MOD_WALKING),
BMA400_ACTIVITY_CHANNEL(IIO_MOD_RUNNING),
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static int bma400_get_temp_reg(struct bma400_data *data, int *val, int *val2)
{
unsigned int raw_temp;
int host_temp;
int ret;
if (data->power_mode == POWER_MODE_SLEEP)
return -EBUSY;
ret = regmap_read(data->regmap, BMA400_TEMP_DATA_REG, &raw_temp);
if (ret)
return ret;
host_temp = sign_extend32(raw_temp, 7);
/*
* The formula for the TEMP_DATA register in the datasheet
* is: x * 0.5 + 23
*/
*val = (host_temp >> 1) + 23;
*val2 = (host_temp & 0x1) * 500000;
return IIO_VAL_INT_PLUS_MICRO;
}
static int bma400_get_accel_reg(struct bma400_data *data,
const struct iio_chan_spec *chan,
int *val)
{
__le16 raw_accel;
int lsb_reg;
int ret;
if (data->power_mode == POWER_MODE_SLEEP)
return -EBUSY;
switch (chan->channel2) {
case IIO_MOD_X:
lsb_reg = BMA400_X_AXIS_LSB_REG;
break;
case IIO_MOD_Y:
lsb_reg = BMA400_Y_AXIS_LSB_REG;
break;
case IIO_MOD_Z:
lsb_reg = BMA400_Z_AXIS_LSB_REG;
break;
default:
dev_err(data->dev, "invalid axis channel modifier\n");
return -EINVAL;
}
/* bulk read two registers, with the base being the LSB register */
ret = regmap_bulk_read(data->regmap, lsb_reg, &raw_accel,
sizeof(raw_accel));
if (ret)
return ret;
*val = sign_extend32(le16_to_cpu(raw_accel), 11);
return IIO_VAL_INT;
}
static void bma400_output_data_rate_from_raw(int raw, unsigned int *val,
unsigned int *val2)
{
*val = BMA400_ACC_ODR_MAX_HZ >> (BMA400_ACC_ODR_MAX_RAW - raw);
if (raw > BMA400_ACC_ODR_MIN_RAW)
*val2 = 0;
else
*val2 = 500000;
}
static int bma400_get_accel_output_data_rate(struct bma400_data *data)
{
unsigned int val;
unsigned int odr;
int ret;
switch (data->power_mode) {
case POWER_MODE_LOW:
/*
* Runs at a fixed rate in low-power mode. See section 4.3
* in the datasheet.
*/
bma400_output_data_rate_from_raw(BMA400_ACC_ODR_LP_RAW,
&data->sample_freq.hz,
&data->sample_freq.uhz);
return 0;
case POWER_MODE_NORMAL:
/*
* In normal mode the ODR can be found in the ACC_CONFIG1
* register.
*/
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
if (ret)
goto error;
odr = val & BMA400_ACC_ODR_MASK;
if (odr < BMA400_ACC_ODR_MIN_RAW ||
odr > BMA400_ACC_ODR_MAX_RAW) {
ret = -EINVAL;
goto error;
}
bma400_output_data_rate_from_raw(odr, &data->sample_freq.hz,
&data->sample_freq.uhz);
return 0;
case POWER_MODE_SLEEP:
data->sample_freq.hz = 0;
data->sample_freq.uhz = 0;
return 0;
default:
ret = 0;
goto error;
}
error:
data->sample_freq.hz = -1;
data->sample_freq.uhz = -1;
return ret;
}
static int bma400_set_accel_output_data_rate(struct bma400_data *data,
int hz, int uhz)
{
unsigned int idx;
unsigned int odr;
unsigned int val;
int ret;
if (hz >= BMA400_ACC_ODR_MIN_WHOLE_HZ) {
if (uhz || hz > BMA400_ACC_ODR_MAX_HZ)
return -EINVAL;
/* Note this works because MIN_WHOLE_HZ is odd */
idx = __ffs(hz);
if (hz >> idx != BMA400_ACC_ODR_MIN_WHOLE_HZ)
return -EINVAL;
idx += BMA400_ACC_ODR_MIN_RAW + 1;
} else if (hz == BMA400_ACC_ODR_MIN_HZ && uhz == 500000) {
idx = BMA400_ACC_ODR_MIN_RAW;
} else {
return -EINVAL;
}
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
if (ret)
return ret;
/* preserve the range and normal mode osr */
odr = (~BMA400_ACC_ODR_MASK & val) | idx;
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG, odr);
if (ret)
return ret;
bma400_output_data_rate_from_raw(idx, &data->sample_freq.hz,
&data->sample_freq.uhz);
return 0;
}
static int bma400_get_accel_oversampling_ratio(struct bma400_data *data)
{
unsigned int val;
unsigned int osr;
int ret;
/*
* The oversampling ratio is stored in a different register
* based on the power-mode. In normal mode the OSR is stored
* in ACC_CONFIG1. In low-power mode it is stored in
* ACC_CONFIG0.
*/
switch (data->power_mode) {
case POWER_MODE_LOW:
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val);
if (ret) {
data->oversampling_ratio = -1;
return ret;
}
osr = (val & BMA400_LP_OSR_MASK) >> BMA400_LP_OSR_SHIFT;
data->oversampling_ratio = osr;
return 0;
case POWER_MODE_NORMAL:
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
if (ret) {
data->oversampling_ratio = -1;
return ret;
}
osr = (val & BMA400_NP_OSR_MASK) >> BMA400_NP_OSR_SHIFT;
data->oversampling_ratio = osr;
return 0;
case POWER_MODE_SLEEP:
data->oversampling_ratio = 0;
return 0;
default:
data->oversampling_ratio = -1;
return -EINVAL;
}
}
static int bma400_set_accel_oversampling_ratio(struct bma400_data *data,
int val)
{
unsigned int acc_config;
int ret;
if (val & ~BMA400_TWO_BITS_MASK)
return -EINVAL;
/*
* The oversampling ratio is stored in a different register
* based on the power-mode.
*/
switch (data->power_mode) {
case POWER_MODE_LOW:
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG,
&acc_config);
if (ret)
return ret;
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG,
(acc_config & ~BMA400_LP_OSR_MASK) |
(val << BMA400_LP_OSR_SHIFT));
if (ret) {
dev_err(data->dev, "Failed to write out OSR\n");
return ret;
}
data->oversampling_ratio = val;
return 0;
case POWER_MODE_NORMAL:
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG,
&acc_config);
if (ret)
return ret;
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
(acc_config & ~BMA400_NP_OSR_MASK) |
(val << BMA400_NP_OSR_SHIFT));
if (ret) {
dev_err(data->dev, "Failed to write out OSR\n");
return ret;
}
data->oversampling_ratio = val;
return 0;
default:
return -EINVAL;
}
return ret;
}
static int bma400_accel_scale_to_raw(struct bma400_data *data,
unsigned int val)
{
int raw;
if (val == 0)
return -EINVAL;
/* Note this works because BMA400_SCALE_MIN is odd */
raw = __ffs(val);
if (val >> raw != BMA400_SCALE_MIN)
return -EINVAL;
return raw;
}
static int bma400_get_accel_scale(struct bma400_data *data)
{
unsigned int raw_scale;
unsigned int val;
int ret;
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
if (ret)
return ret;
raw_scale = (val & BMA400_ACC_SCALE_MASK) >> BMA400_SCALE_SHIFT;
if (raw_scale > BMA400_TWO_BITS_MASK)
return -EINVAL;
data->scale = BMA400_SCALE_MIN << raw_scale;
return 0;
}
static int bma400_set_accel_scale(struct bma400_data *data, unsigned int val)
{
unsigned int acc_config;
int raw;
int ret;
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &acc_config);
if (ret)
return ret;
raw = bma400_accel_scale_to_raw(data, val);
if (raw < 0)
return raw;
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
(acc_config & ~BMA400_ACC_SCALE_MASK) |
(raw << BMA400_SCALE_SHIFT));
if (ret)
return ret;
data->scale = val;
return 0;
}
static int bma400_get_power_mode(struct bma400_data *data)
{
unsigned int val;
int ret;
ret = regmap_read(data->regmap, BMA400_STATUS_REG, &val);
if (ret) {
dev_err(data->dev, "Failed to read status register\n");
return ret;
}
data->power_mode = (val >> 1) & BMA400_TWO_BITS_MASK;
return 0;
}
static int bma400_set_power_mode(struct bma400_data *data,
enum bma400_power_mode mode)
{
unsigned int val;
int ret;
ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val);
if (ret)
return ret;
if (data->power_mode == mode)
return 0;
if (mode == POWER_MODE_INVALID)
return -EINVAL;
/* Preserve the low-power oversample ratio etc */
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG,
mode | (val & ~BMA400_TWO_BITS_MASK));
if (ret) {
dev_err(data->dev, "Failed to write to power-mode\n");
return ret;
}
data->power_mode = mode;
/*
* Update our cached osr and odr based on the new
* power-mode.
*/
bma400_get_accel_output_data_rate(data);
bma400_get_accel_oversampling_ratio(data);
return 0;
}
static int bma400_enable_steps(struct bma400_data *data, int val)
{
int ret;
if (data->steps_enabled == val)
return 0;
ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG1_REG,
BMA400_STEP_INT_MSK,
FIELD_PREP(BMA400_STEP_INT_MSK, val ? 1 : 0));
if (ret)
return ret;
data->steps_enabled = val;
return ret;
}
static int bma400_get_steps_reg(struct bma400_data *data, int *val)
{
u8 *steps_raw;
int ret;
steps_raw = kmalloc(BMA400_STEP_RAW_LEN, GFP_KERNEL);
if (!steps_raw)
return -ENOMEM;
ret = regmap_bulk_read(data->regmap, BMA400_STEP_CNT0_REG,
steps_raw, BMA400_STEP_RAW_LEN);
if (ret) {
kfree(steps_raw);
return ret;
}
*val = get_unaligned_le24(steps_raw);
kfree(steps_raw);
return IIO_VAL_INT;
}
static void bma400_init_tables(void)
{
int raw;
int i;
for (i = 0; i + 1 < ARRAY_SIZE(bma400_sample_freqs); i += 2) {
raw = (i / 2) + 5;
bma400_output_data_rate_from_raw(raw, &bma400_sample_freqs[i],
&bma400_sample_freqs[i + 1]);
}
for (i = 0; i + 1 < ARRAY_SIZE(bma400_scales); i += 2) {
raw = i / 2;
bma400_scales[i] = 0;
bma400_scales[i + 1] = BMA400_SCALE_MIN << raw;
}
}
static void bma400_power_disable(void *data_ptr)
{
struct bma400_data *data = data_ptr;
int ret;
mutex_lock(&data->mutex);
ret = bma400_set_power_mode(data, POWER_MODE_SLEEP);
mutex_unlock(&data->mutex);
if (ret)
dev_warn(data->dev, "Failed to put device into sleep mode (%pe)\n",
ERR_PTR(ret));
}
static enum iio_modifier bma400_act_to_mod(enum bma400_activity activity)
{
switch (activity) {
case BMA400_STILL:
return IIO_MOD_STILL;
case BMA400_WALKING:
return IIO_MOD_WALKING;
case BMA400_RUNNING:
return IIO_MOD_RUNNING;
default:
return IIO_NO_MOD;
}
}
static int bma400_init(struct bma400_data *data)
{
static const char * const regulator_names[] = { "vdd", "vddio" };
unsigned int val;
int ret;
ret = devm_regulator_bulk_get_enable(data->dev,
ARRAY_SIZE(regulator_names),
regulator_names);
if (ret)
return dev_err_probe(data->dev, ret, "Failed to get regulators\n");
/* Try to read chip_id register. It must return 0x90. */
ret = regmap_read(data->regmap, BMA400_CHIP_ID_REG, &val);
if (ret) {
dev_err(data->dev, "Failed to read chip id register\n");
return ret;
}
if (val != BMA400_ID_REG_VAL) {
dev_err(data->dev, "Chip ID mismatch\n");
return -ENODEV;
}
ret = bma400_get_power_mode(data);
if (ret) {
dev_err(data->dev, "Failed to get the initial power-mode\n");
return ret;
}
if (data->power_mode != POWER_MODE_NORMAL) {
ret = bma400_set_power_mode(data, POWER_MODE_NORMAL);
if (ret) {
dev_err(data->dev, "Failed to wake up the device\n");
return ret;
}
/*
* TODO: The datasheet waits 1500us here in the example, but
* lists 2/ODR as the wakeup time.
*/
usleep_range(1500, 2000);
}
ret = devm_add_action_or_reset(data->dev, bma400_power_disable, data);
if (ret)
return ret;
bma400_init_tables();
ret = bma400_get_accel_output_data_rate(data);
if (ret)
return ret;
ret = bma400_get_accel_oversampling_ratio(data);
if (ret)
return ret;
ret = bma400_get_accel_scale(data);
if (ret)
return ret;
/* Configure INT1 pin to open drain */
ret = regmap_write(data->regmap, BMA400_INT_IO_CTRL_REG, 0x06);
if (ret)
return ret;
/*
* Once the interrupt engine is supported we might use the
* data_src_reg, but for now ensure this is set to the
* variable ODR filter selectable by the sample frequency
* channel.
*/
return regmap_write(data->regmap, BMA400_ACC_CONFIG2_REG, 0x00);
}
static int bma400_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct bma400_data *data = iio_priv(indio_dev);
unsigned int activity;
int ret;
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
switch (chan->type) {
case IIO_TEMP:
mutex_lock(&data->mutex);
ret = bma400_get_temp_reg(data, val, val2);
mutex_unlock(&data->mutex);
return ret;
case IIO_STEPS:
return bma400_get_steps_reg(data, val);
case IIO_ACTIVITY:
ret = regmap_read(data->regmap, BMA400_STEP_STAT_REG,
&activity);
if (ret)
return ret;
/*
* The device does not support confidence value levels,
* so we will always have 100% for current activity and
* 0% for the others.
*/
if (chan->channel2 == bma400_act_to_mod(activity))
*val = 100;
else
*val = 0;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_RAW:
mutex_lock(&data->mutex);
ret = bma400_get_accel_reg(data, chan, val);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
switch (chan->type) {
case IIO_ACCEL:
if (data->sample_freq.hz < 0)
return -EINVAL;
*val = data->sample_freq.hz;
*val2 = data->sample_freq.uhz;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
/*
* Runs at a fixed sampling frequency. See Section 4.4
* of the datasheet.
*/
*val = 6;
*val2 = 250000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = data->scale;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
/*
* TODO: We could avoid this logic and returning -EINVAL here if
* we set both the low-power and normal mode OSR registers when
* we configure the device.
*/
if (data->oversampling_ratio < 0)
return -EINVAL;
*val = data->oversampling_ratio;
return IIO_VAL_INT;
case IIO_CHAN_INFO_ENABLE:
*val = data->steps_enabled;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int bma400_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*type = IIO_VAL_INT_PLUS_MICRO;
*vals = bma400_scales;
*length = ARRAY_SIZE(bma400_scales);
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
*type = IIO_VAL_INT;
*vals = bma400_osr_range;
*length = ARRAY_SIZE(bma400_osr_range);
return IIO_AVAIL_RANGE;
case IIO_CHAN_INFO_SAMP_FREQ:
*type = IIO_VAL_INT_PLUS_MICRO;
*vals = bma400_sample_freqs;
*length = ARRAY_SIZE(bma400_sample_freqs);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int bma400_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2,
long mask)
{
struct bma400_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
/*
* The sample frequency is readonly for the temperature
* register and a fixed value in low-power mode.
*/
if (chan->type != IIO_ACCEL)
return -EINVAL;
mutex_lock(&data->mutex);
ret = bma400_set_accel_output_data_rate(data, val, val2);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_SCALE:
if (val != 0 ||
val2 < BMA400_SCALE_MIN || val2 > BMA400_SCALE_MAX)
return -EINVAL;
mutex_lock(&data->mutex);
ret = bma400_set_accel_scale(data, val2);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
mutex_lock(&data->mutex);
ret = bma400_set_accel_oversampling_ratio(data, val);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_ENABLE:
mutex_lock(&data->mutex);
ret = bma400_enable_steps(data, val);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int bma400_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SCALE:
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
return IIO_VAL_INT;
case IIO_CHAN_INFO_ENABLE:
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int bma400_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct bma400_data *data = iio_priv(indio_dev);
switch (chan->type) {
case IIO_ACCEL:
switch (dir) {
case IIO_EV_DIR_RISING:
return FIELD_GET(BMA400_INT_GEN1_MSK,
data->generic_event_en);
case IIO_EV_DIR_FALLING:
return FIELD_GET(BMA400_INT_GEN2_MSK,
data->generic_event_en);
case IIO_EV_DIR_SINGLETAP:
return FIELD_GET(BMA400_S_TAP_MSK,
data->tap_event_en_bitmask);
case IIO_EV_DIR_DOUBLETAP:
return FIELD_GET(BMA400_D_TAP_MSK,
data->tap_event_en_bitmask);
default:
return -EINVAL;
}
case IIO_STEPS:
return data->step_event_en;
case IIO_ACTIVITY:
return data->activity_event_en;
default:
return -EINVAL;
}
}
static int bma400_steps_event_enable(struct bma400_data *data, int state)
{
int ret;
ret = bma400_enable_steps(data, 1);
if (ret)
return ret;
ret = regmap_update_bits(data->regmap, BMA400_INT12_MAP_REG,
BMA400_STEP_INT_MSK,
FIELD_PREP(BMA400_STEP_INT_MSK,
state));
if (ret)
return ret;
data->step_event_en = state;
return 0;
}
static int bma400_activity_event_en(struct bma400_data *data,
enum iio_event_direction dir,
int state)
{
int ret, reg, msk, value;
int field_value = 0;
switch (dir) {
case IIO_EV_DIR_RISING:
reg = BMA400_GEN1INT_CONFIG0;
msk = BMA400_INT_GEN1_MSK;
value = 2;
set_mask_bits(&field_value, BMA400_INT_GEN1_MSK,
FIELD_PREP(BMA400_INT_GEN1_MSK, state));
break;
case IIO_EV_DIR_FALLING:
reg = BMA400_GEN2INT_CONFIG0;
msk = BMA400_INT_GEN2_MSK;
value = 0;
set_mask_bits(&field_value, BMA400_INT_GEN2_MSK,
FIELD_PREP(BMA400_INT_GEN2_MSK, state));
break;
default:
return -EINVAL;
}
/* Enabling all axis for interrupt evaluation */
ret = regmap_write(data->regmap, reg, 0xF8);
if (ret)
return ret;
/* OR combination of all axis for interrupt evaluation */
ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG1_OFF, value);
if (ret)
return ret;
/* Initial value to avoid interrupts while enabling*/
ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG2_OFF, 0x0A);
if (ret)
return ret;
/* Initial duration value to avoid interrupts while enabling*/
ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG31_OFF, 0x0F);
if (ret)
return ret;
ret = regmap_update_bits(data->regmap, BMA400_INT1_MAP_REG, msk,
field_value);
if (ret)
return ret;
ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG0_REG, msk,
field_value);
if (ret)
return ret;
set_mask_bits(&data->generic_event_en, msk, field_value);
return 0;
}
static int bma400_tap_event_en(struct bma400_data *data,
enum iio_event_direction dir, int state)
{
unsigned int mask, field_value;
int ret;
/*
* Tap interrupts can be configured only in normal mode.
* See table in section 4.3 "Power modes - performance modes" of
* datasheet v1.2.
*/
if (data->power_mode != POWER_MODE_NORMAL)
return -EINVAL;
/*
* Tap interrupts are operating with a data rate of 200Hz.
* See section 4.7 "Tap sensing interrupt" in datasheet v1.2.
*/
if (data->sample_freq.hz != 200 && state) {
dev_err(data->dev, "Invalid data rate for tap interrupts.\n");
return -EINVAL;
}
ret = regmap_update_bits(data->regmap, BMA400_INT12_MAP_REG,
BMA400_S_TAP_MSK,
FIELD_PREP(BMA400_S_TAP_MSK, state));
if (ret)
return ret;
switch (dir) {
case IIO_EV_DIR_SINGLETAP:
mask = BMA400_S_TAP_MSK;
set_mask_bits(&field_value, BMA400_S_TAP_MSK,
FIELD_PREP(BMA400_S_TAP_MSK, state));
break;
case IIO_EV_DIR_DOUBLETAP:
mask = BMA400_D_TAP_MSK;
set_mask_bits(&field_value, BMA400_D_TAP_MSK,
FIELD_PREP(BMA400_D_TAP_MSK, state));
break;
default:
return -EINVAL;
}
ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG1_REG, mask,
field_value);
if (ret)
return ret;
set_mask_bits(&data->tap_event_en_bitmask, mask, field_value);
return 0;
}
static int bma400_disable_adv_interrupt(struct bma400_data *data)
{
int ret;
ret = regmap_write(data->regmap, BMA400_INT_CONFIG0_REG, 0);
if (ret)
return ret;
ret = regmap_write(data->regmap, BMA400_INT_CONFIG1_REG, 0);
if (ret)
return ret;
data->tap_event_en_bitmask = 0;
data->generic_event_en = 0;
data->step_event_en = false;
data->activity_event_en = false;
return 0;
}
static int bma400_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir, int state)
{
struct bma400_data *data = iio_priv(indio_dev);
int ret;
switch (chan->type) {
case IIO_ACCEL:
switch (type) {
case IIO_EV_TYPE_MAG:
mutex_lock(&data->mutex);
ret = bma400_activity_event_en(data, dir, state);
mutex_unlock(&data->mutex);
return ret;
case IIO_EV_TYPE_GESTURE:
mutex_lock(&data->mutex);
ret = bma400_tap_event_en(data, dir, state);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_STEPS:
mutex_lock(&data->mutex);
ret = bma400_steps_event_enable(data, state);
mutex_unlock(&data->mutex);
return ret;
case IIO_ACTIVITY:
mutex_lock(&data->mutex);
if (!data->step_event_en) {
ret = bma400_steps_event_enable(data, true);
if (ret) {
mutex_unlock(&data->mutex);
return ret;
}
}
data->activity_event_en = state;
mutex_unlock(&data->mutex);
return 0;
default:
return -EINVAL;
}
}
static int get_gen_config_reg(enum iio_event_direction dir)
{
switch (dir) {
case IIO_EV_DIR_FALLING:
return BMA400_GEN2INT_CONFIG0;
case IIO_EV_DIR_RISING:
return BMA400_GEN1INT_CONFIG0;
default:
return -EINVAL;
}
}
static int bma400_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct bma400_data *data = iio_priv(indio_dev);
int ret, reg, reg_val, raw;
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (type) {
case IIO_EV_TYPE_MAG:
reg = get_gen_config_reg(dir);
if (reg < 0)
return -EINVAL;
*val2 = 0;
switch (info) {
case IIO_EV_INFO_VALUE:
ret = regmap_read(data->regmap,
reg + BMA400_GEN_CONFIG2_OFF,
val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_EV_INFO_PERIOD:
mutex_lock(&data->mutex);
ret = regmap_bulk_read(data->regmap,
reg + BMA400_GEN_CONFIG3_OFF,
&data->duration,
sizeof(data->duration));
if (ret) {
mutex_unlock(&data->mutex);
return ret;
}
*val = be16_to_cpu(data->duration);
mutex_unlock(&data->mutex);
return IIO_VAL_INT;
case IIO_EV_INFO_HYSTERESIS:
ret = regmap_read(data->regmap, reg, val);
if (ret)
return ret;
*val = FIELD_GET(BMA400_GEN_HYST_MSK, *val);
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_EV_TYPE_GESTURE:
switch (info) {
case IIO_EV_INFO_VALUE:
ret = regmap_read(data->regmap, BMA400_TAP_CONFIG,
®_val);
if (ret)
return ret;
*val = FIELD_GET(BMA400_TAP_SEN_MSK, reg_val);
return IIO_VAL_INT;
case IIO_EV_INFO_RESET_TIMEOUT:
ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1,
®_val);
if (ret)
return ret;
raw = FIELD_GET(BMA400_TAP_QUIET_MSK, reg_val);
*val = 0;
*val2 = tap_reset_timeout[raw];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_EV_INFO_TAP2_MIN_DELAY:
ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1,
®_val);
if (ret)
return ret;
raw = FIELD_GET(BMA400_TAP_QUIETDT_MSK, reg_val);
*val = 0;
*val2 = double_tap2_min_delay[raw];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int bma400_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct bma400_data *data = iio_priv(indio_dev);
int reg, ret, raw;
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (type) {
case IIO_EV_TYPE_MAG:
reg = get_gen_config_reg(dir);
if (reg < 0)
return -EINVAL;
switch (info) {
case IIO_EV_INFO_VALUE:
if (val < 1 || val > 255)
return -EINVAL;
return regmap_write(data->regmap,
reg + BMA400_GEN_CONFIG2_OFF,
val);
case IIO_EV_INFO_PERIOD:
if (val < 1 || val > 65535)
return -EINVAL;
mutex_lock(&data->mutex);
put_unaligned_be16(val, &data->duration);
ret = regmap_bulk_write(data->regmap,
reg + BMA400_GEN_CONFIG3_OFF,
&data->duration,
sizeof(data->duration));
mutex_unlock(&data->mutex);
return ret;
case IIO_EV_INFO_HYSTERESIS:
if (val < 0 || val > 3)
return -EINVAL;
return regmap_update_bits(data->regmap, reg,
BMA400_GEN_HYST_MSK,
FIELD_PREP(BMA400_GEN_HYST_MSK,
val));
default:
return -EINVAL;
}
case IIO_EV_TYPE_GESTURE:
switch (info) {
case IIO_EV_INFO_VALUE:
if (val < 0 || val > 7)
return -EINVAL;
return regmap_update_bits(data->regmap,
BMA400_TAP_CONFIG,
BMA400_TAP_SEN_MSK,
FIELD_PREP(BMA400_TAP_SEN_MSK,
val));
case IIO_EV_INFO_RESET_TIMEOUT:
raw = usec_to_tapreg_raw(val2, tap_reset_timeout);
if (raw < 0)
return -EINVAL;
return regmap_update_bits(data->regmap,
BMA400_TAP_CONFIG1,
BMA400_TAP_QUIET_MSK,
FIELD_PREP(BMA400_TAP_QUIET_MSK,
raw));
case IIO_EV_INFO_TAP2_MIN_DELAY:
raw = usec_to_tapreg_raw(val2, double_tap2_min_delay);
if (raw < 0)
return -EINVAL;
return regmap_update_bits(data->regmap,
BMA400_TAP_CONFIG1,
BMA400_TAP_QUIETDT_MSK,
FIELD_PREP(BMA400_TAP_QUIETDT_MSK,
raw));
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int bma400_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct bma400_data *data = iio_priv(indio_dev);
int ret;
ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG0_REG,
BMA400_INT_DRDY_MSK,
FIELD_PREP(BMA400_INT_DRDY_MSK, state));
if (ret)
return ret;
return regmap_update_bits(data->regmap, BMA400_INT1_MAP_REG,
BMA400_INT_DRDY_MSK,
FIELD_PREP(BMA400_INT_DRDY_MSK, state));
}
static const unsigned long bma400_avail_scan_masks[] = {
BIT(BMA400_ACCL_X) | BIT(BMA400_ACCL_Y) | BIT(BMA400_ACCL_Z),
BIT(BMA400_ACCL_X) | BIT(BMA400_ACCL_Y) | BIT(BMA400_ACCL_Z)
| BIT(BMA400_TEMP),
0
};
static const struct iio_info bma400_info = {
.read_raw = bma400_read_raw,
.read_avail = bma400_read_avail,
.write_raw = bma400_write_raw,
.write_raw_get_fmt = bma400_write_raw_get_fmt,
.read_event_config = bma400_read_event_config,
.write_event_config = bma400_write_event_config,
.write_event_value = bma400_write_event_value,
.read_event_value = bma400_read_event_value,
.event_attrs = &bma400_event_attribute_group,
};
static const struct iio_trigger_ops bma400_trigger_ops = {
.set_trigger_state = &bma400_data_rdy_trigger_set_state,
.validate_device = &iio_trigger_validate_own_device,
};
static irqreturn_t bma400_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct bma400_data *data = iio_priv(indio_dev);
int ret, temp;
/* Lock to protect the data->buffer */
mutex_lock(&data->mutex);
/* bulk read six registers, with the base being the LSB register */
ret = regmap_bulk_read(data->regmap, BMA400_X_AXIS_LSB_REG,
&data->buffer.buff, sizeof(data->buffer.buff));
if (ret)
goto unlock_err;
if (test_bit(BMA400_TEMP, indio_dev->active_scan_mask)) {
ret = regmap_read(data->regmap, BMA400_TEMP_DATA_REG, &temp);
if (ret)
goto unlock_err;
data->buffer.temperature = temp;
}
iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
iio_get_time_ns(indio_dev));
mutex_unlock(&data->mutex);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
unlock_err:
mutex_unlock(&data->mutex);
return IRQ_NONE;
}
static irqreturn_t bma400_interrupt(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct bma400_data *data = iio_priv(indio_dev);
s64 timestamp = iio_get_time_ns(indio_dev);
unsigned int act, ev_dir = IIO_EV_DIR_NONE;
int ret;
/* Lock to protect the data->status */
mutex_lock(&data->mutex);
ret = regmap_bulk_read(data->regmap, BMA400_INT_STAT0_REG,
&data->status,
sizeof(data->status));
/*
* if none of the bit is set in the status register then it is
* spurious interrupt.
*/
if (ret || !data->status)
goto unlock_err;
/*
* Disable all advance interrupts if interrupt engine overrun occurs.
* See section 4.7 "Interrupt engine overrun" in datasheet v1.2.
*/
if (FIELD_GET(BMA400_INT_ENG_OVRUN_MSK, le16_to_cpu(data->status))) {
bma400_disable_adv_interrupt(data);
dev_err(data->dev, "Interrupt engine overrun\n");
goto unlock_err;
}
if (FIELD_GET(BMA400_INT_S_TAP_MSK, le16_to_cpu(data->status)))
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
IIO_MOD_X_OR_Y_OR_Z,
IIO_EV_TYPE_GESTURE,
IIO_EV_DIR_SINGLETAP),
timestamp);
if (FIELD_GET(BMA400_INT_D_TAP_MSK, le16_to_cpu(data->status)))
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
IIO_MOD_X_OR_Y_OR_Z,
IIO_EV_TYPE_GESTURE,
IIO_EV_DIR_DOUBLETAP),
timestamp);
if (FIELD_GET(BMA400_INT_GEN1_MSK, le16_to_cpu(data->status)))
ev_dir = IIO_EV_DIR_RISING;
if (FIELD_GET(BMA400_INT_GEN2_MSK, le16_to_cpu(data->status)))
ev_dir = IIO_EV_DIR_FALLING;
if (ev_dir != IIO_EV_DIR_NONE) {
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
IIO_MOD_X_OR_Y_OR_Z,
IIO_EV_TYPE_MAG, ev_dir),
timestamp);
}
if (FIELD_GET(BMA400_STEP_STAT_MASK, le16_to_cpu(data->status))) {
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_STEPS, 0, IIO_NO_MOD,
IIO_EV_TYPE_CHANGE,
IIO_EV_DIR_NONE),
timestamp);
if (data->activity_event_en) {
ret = regmap_read(data->regmap, BMA400_STEP_STAT_REG,
&act);
if (ret)
goto unlock_err;
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACTIVITY, 0,
bma400_act_to_mod(act),
IIO_EV_TYPE_CHANGE,
IIO_EV_DIR_NONE),
timestamp);
}
}
if (FIELD_GET(BMA400_INT_DRDY_MSK, le16_to_cpu(data->status))) {
mutex_unlock(&data->mutex);
iio_trigger_poll_nested(data->trig);
return IRQ_HANDLED;
}
mutex_unlock(&data->mutex);
return IRQ_HANDLED;
unlock_err:
mutex_unlock(&data->mutex);
return IRQ_NONE;
}
int bma400_probe(struct device *dev, struct regmap *regmap, int irq,
const char *name)
{
struct iio_dev *indio_dev;
struct bma400_data *data;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->regmap = regmap;
data->dev = dev;
ret = bma400_init(data);
if (ret)
return ret;
ret = iio_read_mount_matrix(dev, &data->orientation);
if (ret)
return ret;
mutex_init(&data->mutex);
indio_dev->name = name;
indio_dev->info = &bma400_info;
indio_dev->channels = bma400_channels;
indio_dev->num_channels = ARRAY_SIZE(bma400_channels);
indio_dev->available_scan_masks = bma400_avail_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
if (irq > 0) {
data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->trig)
return -ENOMEM;
data->trig->ops = &bma400_trigger_ops;
iio_trigger_set_drvdata(data->trig, indio_dev);
ret = devm_iio_trigger_register(data->dev, data->trig);
if (ret)
return dev_err_probe(data->dev, ret,
"iio trigger register fail\n");
indio_dev->trig = iio_trigger_get(data->trig);
ret = devm_request_threaded_irq(dev, irq, NULL,
&bma400_interrupt,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
indio_dev->name, indio_dev);
if (ret)
return dev_err_probe(data->dev, ret,
"request irq %d failed\n", irq);
}
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
&bma400_trigger_handler, NULL);
if (ret)
return dev_err_probe(data->dev, ret,
"iio triggered buffer setup failed\n");
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS(bma400_probe, IIO_BMA400);
MODULE_AUTHOR("Dan Robertson <[email protected]>");
MODULE_AUTHOR("Jagath Jog J <[email protected]>");
MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor core");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/bma400_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL355 3-Axis Digital Accelerometer I2C driver
*
* Copyright (c) 2021 Puranjay Mohan <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include "adxl355.h"
static const struct regmap_config adxl355_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x2F,
.rd_table = &adxl355_readable_regs_tbl,
.wr_table = &adxl355_writeable_regs_tbl,
};
static int adxl355_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
const struct adxl355_chip_info *chip_data;
chip_data = i2c_get_match_data(client);
if (!chip_data)
return -ENODEV;
regmap = devm_regmap_init_i2c(client, &adxl355_i2c_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Error initializing i2c regmap: %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return adxl355_core_probe(&client->dev, regmap, chip_data);
}
static const struct i2c_device_id adxl355_i2c_id[] = {
{ "adxl355", (kernel_ulong_t)&adxl35x_chip_info[ADXL355] },
{ "adxl359", (kernel_ulong_t)&adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl355_i2c_id);
static const struct of_device_id adxl355_of_match[] = {
{ .compatible = "adi,adxl355", .data = &adxl35x_chip_info[ADXL355] },
{ .compatible = "adi,adxl359", .data = &adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl355_of_match);
static struct i2c_driver adxl355_i2c_driver = {
.driver = {
.name = "adxl355_i2c",
.of_match_table = adxl355_of_match,
},
.probe = adxl355_i2c_probe,
.id_table = adxl355_i2c_id,
};
module_i2c_driver(adxl355_i2c_driver);
MODULE_AUTHOR("Puranjay Mohan <[email protected]>");
MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADXL355);
| linux-master | drivers/iio/accel/adxl355_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL313 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Lucas Stankus <[email protected]>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf
*/
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/property.h>
#include "adxl313.h"
static const struct regmap_config adxl31x_spi_regmap_config[] = {
[ADXL312] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl312_readable_regs_table,
.wr_table = &adxl312_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
},
[ADXL313] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl313_readable_regs_table,
.wr_table = &adxl313_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
},
[ADXL314] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl314_readable_regs_table,
.wr_table = &adxl314_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
},
};
static int adxl313_spi_setup(struct device *dev, struct regmap *regmap)
{
struct spi_device *spi = container_of(dev, struct spi_device, dev);
int ret;
if (spi->mode & SPI_3WIRE) {
ret = regmap_write(regmap, ADXL313_REG_DATA_FORMAT,
ADXL313_SPI_3WIRE);
if (ret)
return ret;
}
return regmap_update_bits(regmap, ADXL313_REG_POWER_CTL,
ADXL313_I2C_DISABLE, ADXL313_I2C_DISABLE);
}
static int adxl313_spi_probe(struct spi_device *spi)
{
const struct adxl313_chip_info *chip_data;
struct regmap *regmap;
int ret;
spi->mode |= SPI_MODE_3;
ret = spi_setup(spi);
if (ret)
return ret;
/*
* Retrieves device specific data as a pointer to a
* adxl313_chip_info structure
*/
chip_data = device_get_match_data(&spi->dev);
if (!chip_data)
chip_data = (const struct adxl313_chip_info *)spi_get_device_id(spi)->driver_data;
regmap = devm_regmap_init_spi(spi,
&adxl31x_spi_regmap_config[chip_data->type]);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Error initializing spi regmap: %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return adxl313_core_probe(&spi->dev, regmap,
chip_data, &adxl313_spi_setup);
}
static const struct spi_device_id adxl313_spi_id[] = {
{ .name = "adxl312", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL312] },
{ .name = "adxl313", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL313] },
{ .name = "adxl314", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl313_spi_id);
static const struct of_device_id adxl313_of_match[] = {
{ .compatible = "adi,adxl312", .data = &adxl31x_chip_info[ADXL312] },
{ .compatible = "adi,adxl313", .data = &adxl31x_chip_info[ADXL313] },
{ .compatible = "adi,adxl314", .data = &adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl313_of_match);
static struct spi_driver adxl313_spi_driver = {
.driver = {
.name = "adxl313_spi",
.of_match_table = adxl313_of_match,
},
.probe = adxl313_spi_probe,
.id_table = adxl313_spi_id,
};
module_spi_driver(adxl313_spi_driver);
MODULE_AUTHOR("Lucas Stankus <[email protected]>");
MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADXL313);
| linux-master | drivers/iio/accel/adxl313_spi.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* ADXL372 3-Axis Digital Accelerometer SPI driver
*
* Copyright 2018 Analog Devices Inc.
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/of.h>
#include <linux/spi/spi.h>
#include "adxl372.h"
static const struct regmap_config adxl372_spi_regmap_config = {
.reg_bits = 7,
.pad_bits = 1,
.val_bits = 8,
.read_flag_mask = BIT(0),
.readable_noinc_reg = adxl372_readable_noinc_reg,
};
static int adxl372_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &adxl372_spi_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adxl372_probe(&spi->dev, regmap, spi->irq, id->name);
}
static const struct spi_device_id adxl372_spi_id[] = {
{ "adxl372", 0 },
{}
};
MODULE_DEVICE_TABLE(spi, adxl372_spi_id);
static const struct of_device_id adxl372_of_match[] = {
{ .compatible = "adi,adxl372" },
{ }
};
MODULE_DEVICE_TABLE(of, adxl372_of_match);
static struct spi_driver adxl372_spi_driver = {
.driver = {
.name = "adxl372_spi",
.of_match_table = adxl372_of_match,
},
.probe = adxl372_spi_probe,
.id_table = adxl372_spi_id,
};
module_spi_driver(adxl372_spi_driver);
MODULE_AUTHOR("Stefan Popa <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer SPI driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_ADXL372);
| linux-master | drivers/iio/accel/adxl372_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL355 3-Axis Digital Accelerometer IIO core driver
*
* Copyright (c) 2021 Puranjay Mohan <[email protected]>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adxl354_adxl355.pdf
*/
#include <linux/bits.h>
#include <linux/bitfield.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/limits.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/units.h>
#include <asm/unaligned.h>
#include "adxl355.h"
/* ADXL355 Register Definitions */
#define ADXL355_DEVID_AD_REG 0x00
#define ADXL355_DEVID_MST_REG 0x01
#define ADXL355_PARTID_REG 0x02
#define ADXL355_STATUS_REG 0x04
#define ADXL355_FIFO_ENTRIES_REG 0x05
#define ADXL355_TEMP2_REG 0x06
#define ADXL355_XDATA3_REG 0x08
#define ADXL355_YDATA3_REG 0x0B
#define ADXL355_ZDATA3_REG 0x0E
#define ADXL355_FIFO_DATA_REG 0x11
#define ADXL355_OFFSET_X_H_REG 0x1E
#define ADXL355_OFFSET_Y_H_REG 0x20
#define ADXL355_OFFSET_Z_H_REG 0x22
#define ADXL355_ACT_EN_REG 0x24
#define ADXL355_ACT_THRESH_H_REG 0x25
#define ADXL355_ACT_THRESH_L_REG 0x26
#define ADXL355_ACT_COUNT_REG 0x27
#define ADXL355_FILTER_REG 0x28
#define ADXL355_FILTER_ODR_MSK GENMASK(3, 0)
#define ADXL355_FILTER_HPF_MSK GENMASK(6, 4)
#define ADXL355_FIFO_SAMPLES_REG 0x29
#define ADXL355_INT_MAP_REG 0x2A
#define ADXL355_SYNC_REG 0x2B
#define ADXL355_RANGE_REG 0x2C
#define ADXL355_POWER_CTL_REG 0x2D
#define ADXL355_POWER_CTL_MODE_MSK GENMASK(1, 0)
#define ADXL355_POWER_CTL_DRDY_MSK BIT(2)
#define ADXL355_SELF_TEST_REG 0x2E
#define ADXL355_RESET_REG 0x2F
#define ADXL355_DEVID_AD_VAL 0xAD
#define ADXL355_DEVID_MST_VAL 0x1D
#define ADXL355_PARTID_VAL 0xED
#define ADXL359_PARTID_VAL 0xE9
#define ADXL355_RESET_CODE 0x52
static const struct regmap_range adxl355_read_reg_range[] = {
regmap_reg_range(ADXL355_DEVID_AD_REG, ADXL355_FIFO_DATA_REG),
regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_SELF_TEST_REG),
};
const struct regmap_access_table adxl355_readable_regs_tbl = {
.yes_ranges = adxl355_read_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl355_read_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl355_readable_regs_tbl, IIO_ADXL355);
static const struct regmap_range adxl355_write_reg_range[] = {
regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_RESET_REG),
};
const struct regmap_access_table adxl355_writeable_regs_tbl = {
.yes_ranges = adxl355_write_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl355_write_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl355_writeable_regs_tbl, IIO_ADXL355);
const struct adxl355_chip_info adxl35x_chip_info[] = {
[ADXL355] = {
.name = "adxl355",
.part_id = ADXL355_PARTID_VAL,
/*
* At +/- 2g with 20-bit resolution, scale is given in datasheet
* as 3.9ug/LSB = 0.0000039 * 9.80665 = 0.00003824593 m/s^2.
*/
.accel_scale = {
.integer = 0,
.decimal = 38245,
},
/*
* The datasheet defines an intercept of 1885 LSB at 25 degC
* and a slope of -9.05 LSB/C. The following formula can be used
* to find the temperature:
* Temp = ((RAW - 1885)/(-9.05)) + 25 but this doesn't follow
* the format of the IIO which is Temp = (RAW + OFFSET) * SCALE.
* Hence using some rearranging we get the scale as -110.497238
* and offset as -2111.25.
*/
.temp_offset = {
.integer = -2111,
.decimal = 250000,
},
},
[ADXL359] = {
.name = "adxl359",
.part_id = ADXL359_PARTID_VAL,
/*
* At +/- 10g with 20-bit resolution, scale is given in datasheet
* as 19.5ug/LSB = 0.0000195 * 9.80665 = 0.0.00019122967 m/s^2.
*/
.accel_scale = {
.integer = 0,
.decimal = 191229,
},
/*
* The datasheet defines an intercept of 1852 LSB at 25 degC
* and a slope of -9.05 LSB/C. The following formula can be used
* to find the temperature:
* Temp = ((RAW - 1852)/(-9.05)) + 25 but this doesn't follow
* the format of the IIO which is Temp = (RAW + OFFSET) * SCALE.
* Hence using some rearranging we get the scale as -110.497238
* and offset as -2079.25.
*/
.temp_offset = {
.integer = -2079,
.decimal = 250000,
},
},
};
EXPORT_SYMBOL_NS_GPL(adxl35x_chip_info, IIO_ADXL355);
enum adxl355_op_mode {
ADXL355_MEASUREMENT,
ADXL355_STANDBY,
ADXL355_TEMP_OFF,
};
enum adxl355_odr {
ADXL355_ODR_4000HZ,
ADXL355_ODR_2000HZ,
ADXL355_ODR_1000HZ,
ADXL355_ODR_500HZ,
ADXL355_ODR_250HZ,
ADXL355_ODR_125HZ,
ADXL355_ODR_62_5HZ,
ADXL355_ODR_31_25HZ,
ADXL355_ODR_15_625HZ,
ADXL355_ODR_7_813HZ,
ADXL355_ODR_3_906HZ,
};
enum adxl355_hpf_3db {
ADXL355_HPF_OFF,
ADXL355_HPF_24_7,
ADXL355_HPF_6_2084,
ADXL355_HPF_1_5545,
ADXL355_HPF_0_3862,
ADXL355_HPF_0_0954,
ADXL355_HPF_0_0238,
};
static const int adxl355_odr_table[][2] = {
[0] = {4000, 0},
[1] = {2000, 0},
[2] = {1000, 0},
[3] = {500, 0},
[4] = {250, 0},
[5] = {125, 0},
[6] = {62, 500000},
[7] = {31, 250000},
[8] = {15, 625000},
[9] = {7, 813000},
[10] = {3, 906000},
};
static const int adxl355_hpf_3db_multipliers[] = {
0,
247000,
62084,
15545,
3862,
954,
238,
};
enum adxl355_chans {
chan_x, chan_y, chan_z,
};
struct adxl355_chan_info {
u8 data_reg;
u8 offset_reg;
};
static const struct adxl355_chan_info adxl355_chans[] = {
[chan_x] = {
.data_reg = ADXL355_XDATA3_REG,
.offset_reg = ADXL355_OFFSET_X_H_REG
},
[chan_y] = {
.data_reg = ADXL355_YDATA3_REG,
.offset_reg = ADXL355_OFFSET_Y_H_REG
},
[chan_z] = {
.data_reg = ADXL355_ZDATA3_REG,
.offset_reg = ADXL355_OFFSET_Z_H_REG
},
};
struct adxl355_data {
const struct adxl355_chip_info *chip_info;
struct regmap *regmap;
struct device *dev;
struct mutex lock; /* lock to protect op_mode */
enum adxl355_op_mode op_mode;
enum adxl355_odr odr;
enum adxl355_hpf_3db hpf_3db;
int calibbias[3];
int adxl355_hpf_3db_table[7][2];
struct iio_trigger *dready_trig;
union {
u8 transf_buf[3];
struct {
u8 buf[14];
s64 ts;
} buffer;
} __aligned(IIO_DMA_MINALIGN);
};
static int adxl355_set_op_mode(struct adxl355_data *data,
enum adxl355_op_mode op_mode)
{
int ret;
if (data->op_mode == op_mode)
return 0;
ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
ADXL355_POWER_CTL_MODE_MSK, op_mode);
if (ret)
return ret;
data->op_mode = op_mode;
return ret;
}
static int adxl355_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
ADXL355_POWER_CTL_DRDY_MSK,
FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK,
state ? 0 : 1));
mutex_unlock(&data->lock);
return ret;
}
static void adxl355_fill_3db_frequency_table(struct adxl355_data *data)
{
u32 multiplier;
u64 div, rem;
u64 odr;
int i;
odr = mul_u64_u32_shr(adxl355_odr_table[data->odr][0], MEGA, 0) +
adxl355_odr_table[data->odr][1];
for (i = 0; i < ARRAY_SIZE(adxl355_hpf_3db_multipliers); i++) {
multiplier = adxl355_hpf_3db_multipliers[i];
div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0),
TERA * 100, &rem);
data->adxl355_hpf_3db_table[i][0] = div;
data->adxl355_hpf_3db_table[i][1] = div_u64(rem, MEGA * 100);
}
}
static int adxl355_setup(struct adxl355_data *data)
{
unsigned int regval;
int ret;
ret = regmap_read(data->regmap, ADXL355_DEVID_AD_REG, ®val);
if (ret)
return ret;
if (regval != ADXL355_DEVID_AD_VAL) {
dev_err(data->dev, "Invalid ADI ID 0x%02x\n", regval);
return -ENODEV;
}
ret = regmap_read(data->regmap, ADXL355_DEVID_MST_REG, ®val);
if (ret)
return ret;
if (regval != ADXL355_DEVID_MST_VAL) {
dev_err(data->dev, "Invalid MEMS ID 0x%02x\n", regval);
return -ENODEV;
}
ret = regmap_read(data->regmap, ADXL355_PARTID_REG, ®val);
if (ret)
return ret;
if (regval != ADXL355_PARTID_VAL)
dev_warn(data->dev, "Invalid DEV ID 0x%02x\n", regval);
/*
* Perform a software reset to make sure the device is in a consistent
* state after start-up.
*/
ret = regmap_write(data->regmap, ADXL355_RESET_REG, ADXL355_RESET_CODE);
if (ret)
return ret;
ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
ADXL355_POWER_CTL_DRDY_MSK,
FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK, 1));
if (ret)
return ret;
adxl355_fill_3db_frequency_table(data);
return adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
}
static int adxl355_get_temp_data(struct adxl355_data *data, u8 addr)
{
return regmap_bulk_read(data->regmap, addr, data->transf_buf, 2);
}
static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
{
int ret;
ret = regmap_bulk_read(data->regmap, addr, data->transf_buf,
ARRAY_SIZE(data->transf_buf));
if (ret)
return ret;
return get_unaligned_be24(data->transf_buf);
}
static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
const int val, const int val2)
{
int i;
for (i = 0; i < n; i++) {
if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
return i;
}
return -EINVAL;
}
static int adxl355_set_odr(struct adxl355_data *data,
enum adxl355_odr odr)
{
int ret;
mutex_lock(&data->lock);
if (data->odr == odr) {
mutex_unlock(&data->lock);
return 0;
}
ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
if (ret)
goto err_unlock;
ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
ADXL355_FILTER_ODR_MSK,
FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
if (ret)
goto err_set_opmode;
data->odr = odr;
adxl355_fill_3db_frequency_table(data);
ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
if (ret)
goto err_set_opmode;
mutex_unlock(&data->lock);
return 0;
err_set_opmode:
adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int adxl355_set_hpf_3db(struct adxl355_data *data,
enum adxl355_hpf_3db hpf)
{
int ret;
mutex_lock(&data->lock);
if (data->hpf_3db == hpf) {
mutex_unlock(&data->lock);
return 0;
}
ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
if (ret)
goto err_unlock;
ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
ADXL355_FILTER_HPF_MSK,
FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
if (ret)
goto err_set_opmode;
data->hpf_3db = hpf;
ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
if (ret)
goto err_set_opmode;
mutex_unlock(&data->lock);
return 0;
err_set_opmode:
adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int adxl355_set_calibbias(struct adxl355_data *data,
enum adxl355_chans chan, int calibbias)
{
int ret;
mutex_lock(&data->lock);
ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
if (ret)
goto err_unlock;
put_unaligned_be16(calibbias, data->transf_buf);
ret = regmap_bulk_write(data->regmap,
adxl355_chans[chan].offset_reg,
data->transf_buf, 2);
if (ret)
goto err_set_opmode;
data->calibbias[chan] = calibbias;
ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
if (ret)
goto err_set_opmode;
mutex_unlock(&data->lock);
return 0;
err_set_opmode:
adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int adxl355_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
ret = adxl355_get_temp_data(data, chan->address);
if (ret < 0)
return ret;
*val = get_unaligned_be16(data->transf_buf);
return IIO_VAL_INT;
case IIO_ACCEL:
ret = adxl355_read_axis(data, adxl355_chans[
chan->address].data_reg);
if (ret < 0)
return ret;
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
/*
* Temperature scale is -110.497238.
* See the detailed explanation in adxl35x_chip_info
* definition above.
*/
*val = -110;
*val2 = 497238;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
*val = data->chip_info->accel_scale.integer;
*val2 = data->chip_info->accel_scale.decimal;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
*val = data->chip_info->temp_offset.integer;
*val2 = data->chip_info->temp_offset.decimal;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBBIAS:
*val = sign_extend32(data->calibbias[chan->address], 15);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = adxl355_odr_table[data->odr][0];
*val2 = adxl355_odr_table[data->odr][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
*val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
*val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int adxl355_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct adxl355_data *data = iio_priv(indio_dev);
int odr_idx, hpf_idx, calibbias;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
odr_idx = adxl355_find_match(adxl355_odr_table,
ARRAY_SIZE(adxl355_odr_table),
val, val2);
if (odr_idx < 0)
return odr_idx;
return adxl355_set_odr(data, odr_idx);
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
hpf_idx = adxl355_find_match(data->adxl355_hpf_3db_table,
ARRAY_SIZE(data->adxl355_hpf_3db_table),
val, val2);
if (hpf_idx < 0)
return hpf_idx;
return adxl355_set_hpf_3db(data, hpf_idx);
case IIO_CHAN_INFO_CALIBBIAS:
calibbias = clamp_t(int, val, S16_MIN, S16_MAX);
return adxl355_set_calibbias(data, chan->address, calibbias);
default:
return -EINVAL;
}
}
static int adxl355_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct adxl355_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = (const int *)adxl355_odr_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* Values are stored in a 2D matrix */
*length = ARRAY_SIZE(adxl355_odr_table) * 2;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
*vals = (const int *)data->adxl355_hpf_3db_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* Values are stored in a 2D matrix */
*length = ARRAY_SIZE(data->adxl355_hpf_3db_table) * 2;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static const unsigned long adxl355_avail_scan_masks[] = {
GENMASK(3, 0),
0
};
static const struct iio_info adxl355_info = {
.read_raw = adxl355_read_raw,
.write_raw = adxl355_write_raw,
.read_avail = &adxl355_read_avail,
};
static const struct iio_trigger_ops adxl355_trigger_ops = {
.set_trigger_state = &adxl355_data_rdy_trigger_set_state,
.validate_device = &iio_trigger_validate_own_device,
};
static irqreturn_t adxl355_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->lock);
/*
* data->buffer is used both for triggered buffer support
* and read/write_raw(), hence, it has to be zeroed here before usage.
*/
data->buffer.buf[0] = 0;
/*
* The acceleration data is 24 bits and big endian. It has to be saved
* in 32 bits, hence, it is saved in the 2nd byte of the 4 byte buffer.
* The buf array is 14 bytes as it includes 3x4=12 bytes for
* accelaration data of x, y, and z axis. It also includes 2 bytes for
* temperature data.
*/
ret = regmap_bulk_read(data->regmap, ADXL355_XDATA3_REG,
&data->buffer.buf[1], 3);
if (ret)
goto out_unlock_notify;
ret = regmap_bulk_read(data->regmap, ADXL355_YDATA3_REG,
&data->buffer.buf[5], 3);
if (ret)
goto out_unlock_notify;
ret = regmap_bulk_read(data->regmap, ADXL355_ZDATA3_REG,
&data->buffer.buf[9], 3);
if (ret)
goto out_unlock_notify;
ret = regmap_bulk_read(data->regmap, ADXL355_TEMP2_REG,
&data->buffer.buf[12], 2);
if (ret)
goto out_unlock_notify;
iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
pf->timestamp);
out_unlock_notify:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
#define ADXL355_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 20, \
.storagebits = 32, \
.shift = 4, \
.endianness = IIO_BE, \
} \
}
static const struct iio_chan_spec adxl355_channels[] = {
ADXL355_ACCEL_CHANNEL(0, chan_x, X),
ADXL355_ACCEL_CHANNEL(1, chan_y, Y),
ADXL355_ACCEL_CHANNEL(2, chan_z, Z),
{
.type = IIO_TEMP,
.address = ADXL355_TEMP2_REG,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = 3,
.scan_type = {
.sign = 's',
.realbits = 12,
.storagebits = 16,
.endianness = IIO_BE,
},
},
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static int adxl355_probe_trigger(struct iio_dev *indio_dev, int irq)
{
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
data->dready_trig = devm_iio_trigger_alloc(data->dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig)
return -ENOMEM;
data->dready_trig->ops = &adxl355_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = devm_request_irq(data->dev, irq,
&iio_trigger_generic_data_rdy_poll,
IRQF_ONESHOT, "adxl355_irq", data->dready_trig);
if (ret)
return dev_err_probe(data->dev, ret, "request irq %d failed\n",
irq);
ret = devm_iio_trigger_register(data->dev, data->dready_trig);
if (ret) {
dev_err(data->dev, "iio trigger register failed\n");
return ret;
}
indio_dev->trig = iio_trigger_get(data->dready_trig);
return 0;
}
int adxl355_core_probe(struct device *dev, struct regmap *regmap,
const struct adxl355_chip_info *chip_info)
{
struct adxl355_data *data;
struct iio_dev *indio_dev;
int ret;
int irq;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->regmap = regmap;
data->dev = dev;
data->op_mode = ADXL355_STANDBY;
data->chip_info = chip_info;
mutex_init(&data->lock);
indio_dev->name = chip_info->name;
indio_dev->info = &adxl355_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = adxl355_channels;
indio_dev->num_channels = ARRAY_SIZE(adxl355_channels);
indio_dev->available_scan_masks = adxl355_avail_scan_masks;
ret = adxl355_setup(data);
if (ret) {
dev_err(dev, "ADXL355 setup failed\n");
return ret;
}
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
&iio_pollfunc_store_time,
&adxl355_trigger_handler, NULL);
if (ret) {
dev_err(dev, "iio triggered buffer setup failed\n");
return ret;
}
irq = fwnode_irq_get_byname(dev_fwnode(dev), "DRDY");
if (irq > 0) {
ret = adxl355_probe_trigger(indio_dev, irq);
if (ret)
return ret;
}
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(adxl355_core_probe, IIO_ADXL355);
MODULE_AUTHOR("Puranjay Mohan <[email protected]>");
MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer core driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/adxl355_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/acpi.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors_i2c.h>
#include "st_accel.h"
static const struct of_device_id st_accel_of_match[] = {
{
/* An older compatible */
.compatible = "st,lis3lv02d",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3lv02dl-accel",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dlh-accel",
.data = LSM303DLH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dlhc-accel",
.data = LSM303DLHC_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3dh-accel",
.data = LIS3DH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330d-accel",
.data = LSM330D_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dl-accel",
.data = LSM330DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dlc-accel",
.data = LSM330DLC_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dl-accel",
.data = LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dlh-accel",
.data = LIS331DLH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dl-accel",
.data = LSM303DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dlm-accel",
.data = LSM303DLM_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330-accel",
.data = LSM330_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303agr-accel",
.data = LSM303AGR_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dh12-accel",
.data = LIS2DH12_ACCEL_DEV_NAME,
},
{
.compatible = "st,h3lis331dl-accel",
.data = H3LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3l02dq",
.data = LIS3L02DQ_ACCEL_DEV_NAME,
},
{
.compatible = "st,lng2dm-accel",
.data = LNG2DM_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dw12",
.data = LIS2DW12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3de",
.data = LIS3DE_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2de12",
.data = LIS2DE12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2hh12",
.data = LIS2HH12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis302dl",
.data = LIS302DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303c-accel",
.data = LSM303C_ACCEL_DEV_NAME,
},
{
.compatible = "silan,sc7a20",
.data = SC7A20_ACCEL_DEV_NAME,
},
{
.compatible = "st,iis328dq",
.data = IIS328DQ_ACCEL_DEV_NAME,
},
{},
};
MODULE_DEVICE_TABLE(of, st_accel_of_match);
#ifdef CONFIG_ACPI
static const struct acpi_device_id st_accel_acpi_match[] = {
{"SMO8840", (kernel_ulong_t)LIS2DH12_ACCEL_DEV_NAME},
{"SMO8A90", (kernel_ulong_t)LNG2DM_ACCEL_DEV_NAME},
{ },
};
MODULE_DEVICE_TABLE(acpi, st_accel_acpi_match);
#endif
static const struct i2c_device_id st_accel_id_table[] = {
{ LSM303DLH_ACCEL_DEV_NAME },
{ LSM303DLHC_ACCEL_DEV_NAME },
{ LIS3DH_ACCEL_DEV_NAME },
{ LSM330D_ACCEL_DEV_NAME },
{ LSM330DL_ACCEL_DEV_NAME },
{ LSM330DLC_ACCEL_DEV_NAME },
{ LIS331DLH_ACCEL_DEV_NAME },
{ LSM303DL_ACCEL_DEV_NAME },
{ LSM303DLM_ACCEL_DEV_NAME },
{ LSM330_ACCEL_DEV_NAME },
{ LSM303AGR_ACCEL_DEV_NAME },
{ LIS2DH12_ACCEL_DEV_NAME },
{ LIS3L02DQ_ACCEL_DEV_NAME },
{ LNG2DM_ACCEL_DEV_NAME },
{ H3LIS331DL_ACCEL_DEV_NAME },
{ LIS331DL_ACCEL_DEV_NAME },
{ LIS3LV02DL_ACCEL_DEV_NAME },
{ LIS2DW12_ACCEL_DEV_NAME },
{ LIS3DE_ACCEL_DEV_NAME },
{ LIS2DE12_ACCEL_DEV_NAME },
{ LIS2HH12_ACCEL_DEV_NAME },
{ LIS302DL_ACCEL_DEV_NAME },
{ LSM303C_ACCEL_DEV_NAME },
{ SC7A20_ACCEL_DEV_NAME },
{ IIS328DQ_ACCEL_DEV_NAME },
{},
};
MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
static int st_accel_i2c_probe(struct i2c_client *client)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *adata;
struct iio_dev *indio_dev;
int ret;
st_sensors_dev_name_probe(&client->dev, client->name, sizeof(client->name));
settings = st_accel_get_settings(client->name);
if (!settings) {
dev_err(&client->dev, "device name %s not recognized.\n",
client->name);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adata));
if (!indio_dev)
return -ENOMEM;
adata = iio_priv(indio_dev);
adata->sensor_settings = (struct st_sensor_settings *)settings;
ret = st_sensors_i2c_configure(indio_dev, client);
if (ret < 0)
return ret;
ret = st_sensors_power_enable(indio_dev);
if (ret)
return ret;
return st_accel_common_probe(indio_dev);
}
static struct i2c_driver st_accel_driver = {
.driver = {
.name = "st-accel-i2c",
.of_match_table = st_accel_of_match,
.acpi_match_table = ACPI_PTR(st_accel_acpi_match),
},
.probe = st_accel_i2c_probe,
.id_table = st_accel_id_table,
};
module_i2c_driver(st_accel_driver);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics accelerometers i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/accel/st_accel_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Freescale MMA9551L Intelligent Motion-Sensing Platform driver
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>
#include <linux/pm_runtime.h>
#include "mma9551_core.h"
#define MMA9551_DRV_NAME "mma9551"
#define MMA9551_IRQ_NAME "mma9551_event"
#define MMA9551_GPIO_COUNT 4
/* Tilt application (inclination in IIO terms). */
#define MMA9551_TILT_XZ_ANG_REG 0x00
#define MMA9551_TILT_YZ_ANG_REG 0x01
#define MMA9551_TILT_XY_ANG_REG 0x02
#define MMA9551_TILT_ANGFLG BIT(7)
#define MMA9551_TILT_QUAD_REG 0x03
#define MMA9551_TILT_XY_QUAD_SHIFT 0
#define MMA9551_TILT_YZ_QUAD_SHIFT 2
#define MMA9551_TILT_XZ_QUAD_SHIFT 4
#define MMA9551_TILT_CFG_REG 0x01
#define MMA9551_TILT_ANG_THRESH_MASK GENMASK(3, 0)
#define MMA9551_DEFAULT_SAMPLE_RATE 122 /* Hz */
/* Tilt events are mapped to the first three GPIO pins. */
enum mma9551_tilt_axis {
mma9551_x = 0,
mma9551_y,
mma9551_z,
};
struct mma9551_data {
struct i2c_client *client;
struct mutex mutex;
int event_enabled[3];
int irqs[MMA9551_GPIO_COUNT];
};
static int mma9551_read_incli_chan(struct i2c_client *client,
const struct iio_chan_spec *chan,
int *val)
{
u8 quad_shift, angle, quadrant;
u16 reg_addr;
int ret;
switch (chan->channel2) {
case IIO_MOD_X:
reg_addr = MMA9551_TILT_YZ_ANG_REG;
quad_shift = MMA9551_TILT_YZ_QUAD_SHIFT;
break;
case IIO_MOD_Y:
reg_addr = MMA9551_TILT_XZ_ANG_REG;
quad_shift = MMA9551_TILT_XZ_QUAD_SHIFT;
break;
case IIO_MOD_Z:
reg_addr = MMA9551_TILT_XY_ANG_REG;
quad_shift = MMA9551_TILT_XY_QUAD_SHIFT;
break;
default:
return -EINVAL;
}
ret = mma9551_set_power_state(client, true);
if (ret < 0)
return ret;
ret = mma9551_read_status_byte(client, MMA9551_APPID_TILT,
reg_addr, &angle);
if (ret < 0)
goto out_poweroff;
ret = mma9551_read_status_byte(client, MMA9551_APPID_TILT,
MMA9551_TILT_QUAD_REG, &quadrant);
if (ret < 0)
goto out_poweroff;
angle &= ~MMA9551_TILT_ANGFLG;
quadrant = (quadrant >> quad_shift) & 0x03;
if (quadrant == 1 || quadrant == 3)
*val = 90 * (quadrant + 1) - angle;
else
*val = angle + 90 * quadrant;
ret = IIO_VAL_INT;
out_poweroff:
mma9551_set_power_state(client, false);
return ret;
}
static int mma9551_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
switch (chan->type) {
case IIO_INCLI:
mutex_lock(&data->mutex);
ret = mma9551_read_incli_chan(data->client, chan, val);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_ACCEL:
mutex_lock(&data->mutex);
ret = mma9551_read_accel_chan(data->client,
chan, val, val2);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
return mma9551_read_accel_scale(val, val2);
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma9551_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct mma9551_data *data = iio_priv(indio_dev);
switch (chan->type) {
case IIO_INCLI:
/* IIO counts axes from 1, because IIO_NO_MOD is 0. */
return data->event_enabled[chan->channel2 - 1];
default:
return -EINVAL;
}
}
static int mma9551_config_incli_event(struct iio_dev *indio_dev,
enum iio_modifier axis,
int state)
{
struct mma9551_data *data = iio_priv(indio_dev);
enum mma9551_tilt_axis mma_axis;
int ret;
/* IIO counts axes from 1, because IIO_NO_MOD is 0. */
mma_axis = axis - 1;
if (data->event_enabled[mma_axis] == state)
return 0;
if (state == 0) {
ret = mma9551_gpio_config(data->client,
(enum mma9551_gpio_pin)mma_axis,
MMA9551_APPID_NONE, 0, 0);
if (ret < 0)
return ret;
ret = mma9551_set_power_state(data->client, false);
if (ret < 0)
return ret;
} else {
int bitnum;
/* Bit 7 of each angle register holds the angle flag. */
switch (axis) {
case IIO_MOD_X:
bitnum = 7 + 8 * MMA9551_TILT_YZ_ANG_REG;
break;
case IIO_MOD_Y:
bitnum = 7 + 8 * MMA9551_TILT_XZ_ANG_REG;
break;
case IIO_MOD_Z:
bitnum = 7 + 8 * MMA9551_TILT_XY_ANG_REG;
break;
default:
return -EINVAL;
}
ret = mma9551_set_power_state(data->client, true);
if (ret < 0)
return ret;
ret = mma9551_gpio_config(data->client,
(enum mma9551_gpio_pin)mma_axis,
MMA9551_APPID_TILT, bitnum, 0);
if (ret < 0) {
mma9551_set_power_state(data->client, false);
return ret;
}
}
data->event_enabled[mma_axis] = state;
return ret;
}
static int mma9551_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
switch (chan->type) {
case IIO_INCLI:
mutex_lock(&data->mutex);
ret = mma9551_config_incli_event(indio_dev,
chan->channel2, state);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int mma9551_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
switch (chan->type) {
case IIO_INCLI:
if (val2 != 0 || val < 1 || val > 10)
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9551_update_config_bits(data->client,
MMA9551_APPID_TILT,
MMA9551_TILT_CFG_REG,
MMA9551_TILT_ANG_THRESH_MASK,
val);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int mma9551_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
u8 tmp;
switch (chan->type) {
case IIO_INCLI:
mutex_lock(&data->mutex);
ret = mma9551_read_config_byte(data->client,
MMA9551_APPID_TILT,
MMA9551_TILT_CFG_REG, &tmp);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
*val = tmp & MMA9551_TILT_ANG_THRESH_MASK;
*val2 = 0;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static const struct iio_event_spec mma9551_incli_event = {
.type = IIO_EV_TYPE_ROC,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE),
};
#define MMA9551_INCLI_CHANNEL(axis) { \
.type = IIO_INCLI, \
.modified = 1, \
.channel2 = axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
.event_spec = &mma9551_incli_event, \
.num_event_specs = 1, \
}
static const struct iio_chan_spec mma9551_channels[] = {
MMA9551_ACCEL_CHANNEL(IIO_MOD_X),
MMA9551_ACCEL_CHANNEL(IIO_MOD_Y),
MMA9551_ACCEL_CHANNEL(IIO_MOD_Z),
MMA9551_INCLI_CHANNEL(IIO_MOD_X),
MMA9551_INCLI_CHANNEL(IIO_MOD_Y),
MMA9551_INCLI_CHANNEL(IIO_MOD_Z),
};
static const struct iio_info mma9551_info = {
.read_raw = mma9551_read_raw,
.read_event_config = mma9551_read_event_config,
.write_event_config = mma9551_write_event_config,
.read_event_value = mma9551_read_event_value,
.write_event_value = mma9551_write_event_value,
};
static irqreturn_t mma9551_event_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct mma9551_data *data = iio_priv(indio_dev);
int i, ret, mma_axis = -1;
u16 reg;
u8 val;
mutex_lock(&data->mutex);
for (i = 0; i < 3; i++)
if (irq == data->irqs[i]) {
mma_axis = i;
break;
}
if (mma_axis == -1) {
/* IRQ was triggered on 4th line, which we don't use. */
dev_warn(&data->client->dev,
"irq triggered on unused line %d\n", data->irqs[3]);
goto out;
}
switch (mma_axis) {
case mma9551_x:
reg = MMA9551_TILT_YZ_ANG_REG;
break;
case mma9551_y:
reg = MMA9551_TILT_XZ_ANG_REG;
break;
case mma9551_z:
reg = MMA9551_TILT_XY_ANG_REG;
break;
}
/*
* Read the angle even though we don't use it, otherwise we
* won't get any further interrupts.
*/
ret = mma9551_read_status_byte(data->client, MMA9551_APPID_TILT,
reg, &val);
if (ret < 0) {
dev_err(&data->client->dev,
"error %d reading tilt register in IRQ\n", ret);
goto out;
}
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_INCLI, 0, (mma_axis + 1),
IIO_EV_TYPE_ROC, IIO_EV_DIR_RISING),
iio_get_time_ns(indio_dev));
out:
mutex_unlock(&data->mutex);
return IRQ_HANDLED;
}
static int mma9551_init(struct mma9551_data *data)
{
int ret;
ret = mma9551_read_version(data->client);
if (ret)
return ret;
return mma9551_set_device_state(data->client, true);
}
static int mma9551_gpio_probe(struct iio_dev *indio_dev)
{
struct gpio_desc *gpio;
int i, ret;
struct mma9551_data *data = iio_priv(indio_dev);
struct device *dev = &data->client->dev;
for (i = 0; i < MMA9551_GPIO_COUNT; i++) {
gpio = devm_gpiod_get_index(dev, NULL, i, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
ret = gpiod_to_irq(gpio);
if (ret < 0)
return ret;
data->irqs[i] = ret;
ret = devm_request_threaded_irq(dev, data->irqs[i],
NULL, mma9551_event_handler,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
MMA9551_IRQ_NAME, indio_dev);
if (ret < 0) {
dev_err(dev, "request irq %d failed\n", data->irqs[i]);
return ret;
}
dev_dbg(dev, "gpio resource, no:%d irq:%d\n",
desc_to_gpio(gpio), data->irqs[i]);
}
return 0;
}
static const char *mma9551_match_acpi_device(struct device *dev)
{
const struct acpi_device_id *id;
id = acpi_match_device(dev->driver->acpi_match_table, dev);
if (!id)
return NULL;
return dev_name(dev);
}
static int mma9551_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct mma9551_data *data;
struct iio_dev *indio_dev;
const char *name = NULL;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
if (id)
name = id->name;
else if (ACPI_HANDLE(&client->dev))
name = mma9551_match_acpi_device(&client->dev);
ret = mma9551_init(data);
if (ret < 0)
return ret;
mutex_init(&data->mutex);
indio_dev->channels = mma9551_channels;
indio_dev->num_channels = ARRAY_SIZE(mma9551_channels);
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mma9551_info;
ret = mma9551_gpio_probe(indio_dev);
if (ret < 0)
goto out_poweroff;
ret = pm_runtime_set_active(&client->dev);
if (ret < 0)
goto out_poweroff;
pm_runtime_enable(&client->dev);
pm_runtime_set_autosuspend_delay(&client->dev,
MMA9551_AUTO_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(&client->dev);
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "unable to register iio device\n");
goto err_pm_cleanup;
}
return 0;
err_pm_cleanup:
pm_runtime_dont_use_autosuspend(&client->dev);
pm_runtime_disable(&client->dev);
out_poweroff:
mma9551_set_device_state(client, false);
return ret;
}
static void mma9551_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct mma9551_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(&client->dev);
pm_runtime_set_suspended(&client->dev);
mutex_lock(&data->mutex);
mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
}
static int mma9551_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
if (ret < 0) {
dev_err(&data->client->dev, "powering off device failed\n");
return -EAGAIN;
}
return 0;
}
static int mma9551_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
ret = mma9551_set_device_state(data->client, true);
if (ret < 0)
return ret;
mma9551_sleep(MMA9551_DEFAULT_SAMPLE_RATE);
return 0;
}
static int mma9551_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
return ret;
}
static int mma9551_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, true);
mutex_unlock(&data->mutex);
return ret;
}
static const struct dev_pm_ops mma9551_pm_ops = {
SYSTEM_SLEEP_PM_OPS(mma9551_suspend, mma9551_resume)
RUNTIME_PM_OPS(mma9551_runtime_suspend, mma9551_runtime_resume, NULL)
};
static const struct acpi_device_id mma9551_acpi_match[] = {
{"MMA9551", 0},
{},
};
MODULE_DEVICE_TABLE(acpi, mma9551_acpi_match);
static const struct i2c_device_id mma9551_id[] = {
{"mma9551", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, mma9551_id);
static struct i2c_driver mma9551_driver = {
.driver = {
.name = MMA9551_DRV_NAME,
.acpi_match_table = ACPI_PTR(mma9551_acpi_match),
.pm = pm_ptr(&mma9551_pm_ops),
},
.probe = mma9551_probe,
.remove = mma9551_remove,
.id_table = mma9551_id,
};
module_i2c_driver(mma9551_driver);
MODULE_AUTHOR("Irina Tirdea <[email protected]>");
MODULE_AUTHOR("Vlad Dogaru <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("MMA9551L motion-sensing platform driver");
MODULE_IMPORT_NS(IIO_MMA9551);
| linux-master | drivers/iio/accel/mma9551.c |
// SPDX-License-Identifier: GPL-2.0
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/regmap.h>
#include "kxsd9.h"
static int kxsd9_i2c_probe(struct i2c_client *i2c)
{
static const struct regmap_config config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x0e,
};
struct regmap *regmap;
regmap = devm_regmap_init_i2c(i2c, &config);
if (IS_ERR(regmap)) {
dev_err(&i2c->dev, "Failed to register i2c regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
return kxsd9_common_probe(&i2c->dev,
regmap,
i2c->name);
}
static void kxsd9_i2c_remove(struct i2c_client *client)
{
kxsd9_common_remove(&client->dev);
}
static const struct of_device_id kxsd9_of_match[] = {
{ .compatible = "kionix,kxsd9", },
{ },
};
MODULE_DEVICE_TABLE(of, kxsd9_of_match);
static const struct i2c_device_id kxsd9_i2c_id[] = {
{"kxsd9", 0},
{ },
};
MODULE_DEVICE_TABLE(i2c, kxsd9_i2c_id);
static struct i2c_driver kxsd9_i2c_driver = {
.driver = {
.name = "kxsd9",
.of_match_table = kxsd9_of_match,
.pm = pm_ptr(&kxsd9_dev_pm_ops),
},
.probe = kxsd9_i2c_probe,
.remove = kxsd9_i2c_remove,
.id_table = kxsd9_i2c_id,
};
module_i2c_driver(kxsd9_i2c_driver);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("KXSD9 accelerometer I2C interface");
MODULE_IMPORT_NS(IIO_KXSD9);
| linux-master | drivers/iio/accel/kxsd9-i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the MiraMEMS DA217 and DA280 3-axis accelerometer and
* IIO driver for the MiraMEMS DA226 2-axis accelerometer
*
* Copyright (c) 2016 Hans de Goede <[email protected]>
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/acpi.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/byteorder/generic.h>
#define DA280_REG_CHIP_ID 0x01
#define DA280_REG_ACC_X_LSB 0x02
#define DA280_REG_ACC_Y_LSB 0x04
#define DA280_REG_ACC_Z_LSB 0x06
#define DA280_REG_MODE_BW 0x11
#define DA280_CHIP_ID 0x13
#define DA280_MODE_ENABLE 0x1e
#define DA280_MODE_DISABLE 0x9e
enum da280_chipset { da217, da226, da280 };
/*
* a value of + or -4096 corresponds to + or - 1G
* scale = 9.81 / 4096 = 0.002395019
*/
static const int da280_nscale = 2395019;
#define DA280_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec da280_channels[] = {
DA280_CHANNEL(DA280_REG_ACC_X_LSB, X),
DA280_CHANNEL(DA280_REG_ACC_Y_LSB, Y),
DA280_CHANNEL(DA280_REG_ACC_Z_LSB, Z),
};
struct da280_data {
struct i2c_client *client;
};
static int da280_enable(struct i2c_client *client, bool enable)
{
u8 data = enable ? DA280_MODE_ENABLE : DA280_MODE_DISABLE;
return i2c_smbus_write_byte_data(client, DA280_REG_MODE_BW, data);
}
static int da280_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct da280_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_word_data(data->client, chan->address);
if (ret < 0)
return ret;
/*
* Values are 14 bits, stored as 16 bits with the 2
* least significant bits always 0.
*/
*val = (short)ret >> 2;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = da280_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info da280_info = {
.read_raw = da280_read_raw,
};
static enum da280_chipset da280_match_acpi_device(struct device *dev)
{
const struct acpi_device_id *id;
id = acpi_match_device(dev->driver->acpi_match_table, dev);
if (!id)
return -EINVAL;
return (enum da280_chipset) id->driver_data;
}
static void da280_disable(void *client)
{
da280_enable(client, false);
}
static int da280_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
int ret;
struct iio_dev *indio_dev;
struct da280_data *data;
enum da280_chipset chip;
ret = i2c_smbus_read_byte_data(client, DA280_REG_CHIP_ID);
if (ret != DA280_CHIP_ID)
return (ret < 0) ? ret : -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
indio_dev->info = &da280_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = da280_channels;
if (ACPI_HANDLE(&client->dev)) {
chip = da280_match_acpi_device(&client->dev);
} else {
chip = id->driver_data;
}
if (chip == da217) {
indio_dev->name = "da217";
indio_dev->num_channels = 3;
} else if (chip == da226) {
indio_dev->name = "da226";
indio_dev->num_channels = 2;
} else {
indio_dev->name = "da280";
indio_dev->num_channels = 3;
}
ret = da280_enable(client, true);
if (ret < 0)
return ret;
ret = devm_add_action_or_reset(&client->dev, da280_disable, client);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int da280_suspend(struct device *dev)
{
return da280_enable(to_i2c_client(dev), false);
}
static int da280_resume(struct device *dev)
{
return da280_enable(to_i2c_client(dev), true);
}
static DEFINE_SIMPLE_DEV_PM_OPS(da280_pm_ops, da280_suspend, da280_resume);
static const struct acpi_device_id da280_acpi_match[] = {
{"NSA2513", da217},
{"MIRAACC", da280},
{},
};
MODULE_DEVICE_TABLE(acpi, da280_acpi_match);
static const struct i2c_device_id da280_i2c_id[] = {
{ "da217", da217 },
{ "da226", da226 },
{ "da280", da280 },
{}
};
MODULE_DEVICE_TABLE(i2c, da280_i2c_id);
static struct i2c_driver da280_driver = {
.driver = {
.name = "da280",
.acpi_match_table = ACPI_PTR(da280_acpi_match),
.pm = pm_sleep_ptr(&da280_pm_ops),
},
.probe = da280_probe,
.id_table = da280_i2c_id,
};
module_i2c_driver(da280_driver);
MODULE_AUTHOR("Hans de Goede <[email protected]>");
MODULE_DESCRIPTION("MiraMEMS DA280 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/da280.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2012, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/slab.h>
#include <linux/hid-sensor-hub.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include "../common/hid-sensors/hid-sensor-trigger.h"
enum accel_3d_channel {
CHANNEL_SCAN_INDEX_X,
CHANNEL_SCAN_INDEX_Y,
CHANNEL_SCAN_INDEX_Z,
ACCEL_3D_CHANNEL_MAX,
};
#define CHANNEL_SCAN_INDEX_TIMESTAMP ACCEL_3D_CHANNEL_MAX
struct accel_3d_state {
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info accel[ACCEL_3D_CHANNEL_MAX];
/* Ensure timestamp is naturally aligned */
struct {
u32 accel_val[3];
s64 timestamp __aligned(8);
} scan;
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
int64_t timestamp;
};
static const u32 accel_3d_addresses[ACCEL_3D_CHANNEL_MAX] = {
HID_USAGE_SENSOR_ACCEL_X_AXIS,
HID_USAGE_SENSOR_ACCEL_Y_AXIS,
HID_USAGE_SENSOR_ACCEL_Z_AXIS
};
static const u32 accel_3d_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ACCELERATION,
};
/* Channel definitions */
static const struct iio_chan_spec accel_3d_channels[] = {
{
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_X,
}, {
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_Y,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Y,
}, {
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Z,
},
IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP)
};
/* Channel definitions */
static const struct iio_chan_spec gravity_channels[] = {
{
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_X,
}, {
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_Y,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Y,
}, {
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Z,
},
IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP),
};
/* Adjust channel real bits based on report descriptor */
static void accel_3d_adjust_channel_bit_mask(struct iio_chan_spec *channels,
int channel, int size)
{
channels[channel].scan_type.sign = 's';
/* Real storage bits will change based on the report desc. */
channels[channel].scan_type.realbits = size * 8;
/* Maximum size of a sample to capture is u32 */
channels[channel].scan_type.storagebits = sizeof(u32) * 8;
}
/* Channel read_raw handler */
static int accel_3d_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct accel_3d_state *accel_state = iio_priv(indio_dev);
int report_id = -1;
u32 address;
int ret_type;
s32 min;
struct hid_sensor_hub_device *hsdev =
accel_state->common_attributes.hsdev;
*val = 0;
*val2 = 0;
switch (mask) {
case IIO_CHAN_INFO_RAW:
hid_sensor_power_state(&accel_state->common_attributes, true);
report_id = accel_state->accel[chan->scan_index].report_id;
min = accel_state->accel[chan->scan_index].logical_minimum;
address = accel_3d_addresses[chan->scan_index];
if (report_id >= 0)
*val = sensor_hub_input_attr_get_raw_value(
accel_state->common_attributes.hsdev,
hsdev->usage, address, report_id,
SENSOR_HUB_SYNC,
min < 0);
else {
*val = 0;
hid_sensor_power_state(&accel_state->common_attributes,
false);
return -EINVAL;
}
hid_sensor_power_state(&accel_state->common_attributes, false);
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
*val = accel_state->scale_pre_decml;
*val2 = accel_state->scale_post_decml;
ret_type = accel_state->scale_precision;
break;
case IIO_CHAN_INFO_OFFSET:
*val = accel_state->value_offset;
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SAMP_FREQ:
ret_type = hid_sensor_read_samp_freq_value(
&accel_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret_type = hid_sensor_read_raw_hyst_value(
&accel_state->common_attributes, val, val2);
break;
default:
ret_type = -EINVAL;
break;
}
return ret_type;
}
/* Channel write_raw handler */
static int accel_3d_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct accel_3d_state *accel_state = iio_priv(indio_dev);
int ret = 0;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = hid_sensor_write_samp_freq_value(
&accel_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret = hid_sensor_write_raw_hyst_value(
&accel_state->common_attributes, val, val2);
break;
default:
ret = -EINVAL;
}
return ret;
}
static const struct iio_info accel_3d_info = {
.read_raw = &accel_3d_read_raw,
.write_raw = &accel_3d_write_raw,
};
/* Function to push data to buffer */
static void hid_sensor_push_data(struct iio_dev *indio_dev, void *data,
int len, int64_t timestamp)
{
dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
iio_push_to_buffers_with_timestamp(indio_dev, data, timestamp);
}
/* Callback handler to send event after all samples are received and captured */
static int accel_3d_proc_event(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct accel_3d_state *accel_state = iio_priv(indio_dev);
dev_dbg(&indio_dev->dev, "accel_3d_proc_event\n");
if (atomic_read(&accel_state->common_attributes.data_ready)) {
if (!accel_state->timestamp)
accel_state->timestamp = iio_get_time_ns(indio_dev);
hid_sensor_push_data(indio_dev,
&accel_state->scan,
sizeof(accel_state->scan),
accel_state->timestamp);
accel_state->timestamp = 0;
}
return 0;
}
/* Capture samples in local storage */
static int accel_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
size_t raw_len, char *raw_data,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct accel_3d_state *accel_state = iio_priv(indio_dev);
int offset;
int ret = -EINVAL;
switch (usage_id) {
case HID_USAGE_SENSOR_ACCEL_X_AXIS:
case HID_USAGE_SENSOR_ACCEL_Y_AXIS:
case HID_USAGE_SENSOR_ACCEL_Z_AXIS:
offset = usage_id - HID_USAGE_SENSOR_ACCEL_X_AXIS;
accel_state->scan.accel_val[CHANNEL_SCAN_INDEX_X + offset] =
*(u32 *)raw_data;
ret = 0;
break;
case HID_USAGE_SENSOR_TIME_TIMESTAMP:
accel_state->timestamp =
hid_sensor_convert_timestamp(
&accel_state->common_attributes,
*(int64_t *)raw_data);
ret = 0;
break;
default:
break;
}
return ret;
}
/* Parse report which is specific to an usage id*/
static int accel_3d_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
struct iio_chan_spec *channels,
unsigned usage_id,
struct accel_3d_state *st)
{
int ret;
int i;
for (i = 0; i <= CHANNEL_SCAN_INDEX_Z; ++i) {
ret = sensor_hub_input_get_attribute_info(hsdev,
HID_INPUT_REPORT,
usage_id,
HID_USAGE_SENSOR_ACCEL_X_AXIS + i,
&st->accel[CHANNEL_SCAN_INDEX_X + i]);
if (ret < 0)
break;
accel_3d_adjust_channel_bit_mask(channels,
CHANNEL_SCAN_INDEX_X + i,
st->accel[CHANNEL_SCAN_INDEX_X + i].size);
}
dev_dbg(&pdev->dev, "accel_3d %x:%x, %x:%x, %x:%x\n",
st->accel[0].index,
st->accel[0].report_id,
st->accel[1].index, st->accel[1].report_id,
st->accel[2].index, st->accel[2].report_id);
st->scale_precision = hid_sensor_format_scale(
hsdev->usage,
&st->accel[CHANNEL_SCAN_INDEX_X],
&st->scale_pre_decml, &st->scale_post_decml);
return ret;
}
/* Function to initialize the processing for usage id */
static int hid_accel_3d_probe(struct platform_device *pdev)
{
int ret = 0;
const char *name;
struct iio_dev *indio_dev;
struct accel_3d_state *accel_state;
const struct iio_chan_spec *channel_spec;
int channel_size;
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
indio_dev = devm_iio_device_alloc(&pdev->dev,
sizeof(struct accel_3d_state));
if (indio_dev == NULL)
return -ENOMEM;
platform_set_drvdata(pdev, indio_dev);
accel_state = iio_priv(indio_dev);
accel_state->common_attributes.hsdev = hsdev;
accel_state->common_attributes.pdev = pdev;
if (hsdev->usage == HID_USAGE_SENSOR_ACCEL_3D) {
name = "accel_3d";
channel_spec = accel_3d_channels;
channel_size = sizeof(accel_3d_channels);
indio_dev->num_channels = ARRAY_SIZE(accel_3d_channels);
} else {
name = "gravity";
channel_spec = gravity_channels;
channel_size = sizeof(gravity_channels);
indio_dev->num_channels = ARRAY_SIZE(gravity_channels);
}
ret = hid_sensor_parse_common_attributes(hsdev,
hsdev->usage,
&accel_state->common_attributes,
accel_3d_sensitivity_addresses,
ARRAY_SIZE(accel_3d_sensitivity_addresses));
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;
}
indio_dev->channels = devm_kmemdup(&pdev->dev, channel_spec,
channel_size, GFP_KERNEL);
if (!indio_dev->channels) {
dev_err(&pdev->dev, "failed to duplicate channels\n");
return -ENOMEM;
}
ret = accel_3d_parse_report(pdev, hsdev,
(struct iio_chan_spec *)indio_dev->channels,
hsdev->usage, accel_state);
if (ret) {
dev_err(&pdev->dev, "failed to setup attributes\n");
return ret;
}
indio_dev->info = &accel_3d_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
atomic_set(&accel_state->common_attributes.data_ready, 0);
ret = hid_sensor_setup_trigger(indio_dev, name,
&accel_state->common_attributes);
if (ret < 0) {
dev_err(&pdev->dev, "trigger setup failed\n");
return ret;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&pdev->dev, "device register failed\n");
goto error_remove_trigger;
}
accel_state->callbacks.send_event = accel_3d_proc_event;
accel_state->callbacks.capture_sample = accel_3d_capture_sample;
accel_state->callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, hsdev->usage,
&accel_state->callbacks);
if (ret < 0) {
dev_err(&pdev->dev, "callback reg failed\n");
goto error_iio_unreg;
}
return ret;
error_iio_unreg:
iio_device_unregister(indio_dev);
error_remove_trigger:
hid_sensor_remove_trigger(indio_dev, &accel_state->common_attributes);
return ret;
}
/* Function to deinitialize the processing for usage id */
static int hid_accel_3d_remove(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct accel_3d_state *accel_state = iio_priv(indio_dev);
sensor_hub_remove_callback(hsdev, hsdev->usage);
iio_device_unregister(indio_dev);
hid_sensor_remove_trigger(indio_dev, &accel_state->common_attributes);
return 0;
}
static const struct platform_device_id hid_accel_3d_ids[] = {
{
/* Format: HID-SENSOR-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-200073",
},
{ /* gravity sensor */
.name = "HID-SENSOR-20007b",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, hid_accel_3d_ids);
static struct platform_driver hid_accel_3d_platform_driver = {
.id_table = hid_accel_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.pm = &hid_sensor_pm_ops,
},
.probe = hid_accel_3d_probe,
.remove = hid_accel_3d_remove,
};
module_platform_driver(hid_accel_3d_platform_driver);
MODULE_DESCRIPTION("HID Sensor Accel 3D");
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_HID);
| linux-master | drivers/iio/accel/hid-sensor-accel-3d.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 Analog Devices, Inc.
* Author: Cosmin Tanislav <[email protected]>
*/
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include "adxl367.h"
#define ADXL367_SPI_WRITE_COMMAND 0x0A
#define ADXL367_SPI_READ_COMMAND 0x0B
#define ADXL367_SPI_FIFO_COMMAND 0x0D
struct adxl367_spi_state {
struct spi_device *spi;
struct spi_message reg_write_msg;
struct spi_transfer reg_write_xfer[2];
struct spi_message reg_read_msg;
struct spi_transfer reg_read_xfer[2];
struct spi_message fifo_msg;
struct spi_transfer fifo_xfer[2];
/*
* DMA (thus cache coherency maintenance) may require the
* transfer buffers live in their own cache lines.
*/
u8 reg_write_tx_buf[1] __aligned(IIO_DMA_MINALIGN);
u8 reg_read_tx_buf[2];
u8 fifo_tx_buf[1];
};
static int adxl367_read_fifo(void *context, __be16 *fifo_buf,
unsigned int fifo_entries)
{
struct adxl367_spi_state *st = context;
st->fifo_xfer[1].rx_buf = fifo_buf;
st->fifo_xfer[1].len = fifo_entries * sizeof(*fifo_buf);
return spi_sync(st->spi, &st->fifo_msg);
}
static int adxl367_read(void *context, const void *reg_buf, size_t reg_size,
void *val_buf, size_t val_size)
{
struct adxl367_spi_state *st = context;
u8 reg = ((const u8 *)reg_buf)[0];
st->reg_read_tx_buf[1] = reg;
st->reg_read_xfer[1].rx_buf = val_buf;
st->reg_read_xfer[1].len = val_size;
return spi_sync(st->spi, &st->reg_read_msg);
}
static int adxl367_write(void *context, const void *val_buf, size_t val_size)
{
struct adxl367_spi_state *st = context;
st->reg_write_xfer[1].tx_buf = val_buf;
st->reg_write_xfer[1].len = val_size;
return spi_sync(st->spi, &st->reg_write_msg);
}
static struct regmap_bus adxl367_spi_regmap_bus = {
.read = adxl367_read,
.write = adxl367_write,
};
static const struct regmap_config adxl367_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static const struct adxl367_ops adxl367_spi_ops = {
.read_fifo = adxl367_read_fifo,
};
static int adxl367_spi_probe(struct spi_device *spi)
{
struct adxl367_spi_state *st;
struct regmap *regmap;
st = devm_kzalloc(&spi->dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
st->spi = spi;
/*
* Xfer: [XFR1] [ XFR2 ]
* Master: 0x0A ADDR DATA0 DATA1 ... DATAN
* Slave: .... ..........................
*/
st->reg_write_tx_buf[0] = ADXL367_SPI_WRITE_COMMAND;
st->reg_write_xfer[0].tx_buf = st->reg_write_tx_buf;
st->reg_write_xfer[0].len = sizeof(st->reg_write_tx_buf);
spi_message_init_with_transfers(&st->reg_write_msg,
st->reg_write_xfer, 2);
/*
* Xfer: [ XFR1 ] [ XFR2 ]
* Master: 0x0B ADDR .....................
* Slave: ......... DATA0 DATA1 ... DATAN
*/
st->reg_read_tx_buf[0] = ADXL367_SPI_READ_COMMAND;
st->reg_read_xfer[0].tx_buf = st->reg_read_tx_buf;
st->reg_read_xfer[0].len = sizeof(st->reg_read_tx_buf);
spi_message_init_with_transfers(&st->reg_read_msg,
st->reg_read_xfer, 2);
/*
* Xfer: [XFR1] [ XFR2 ]
* Master: 0x0D .....................
* Slave: .... DATA0 DATA1 ... DATAN
*/
st->fifo_tx_buf[0] = ADXL367_SPI_FIFO_COMMAND;
st->fifo_xfer[0].tx_buf = st->fifo_tx_buf;
st->fifo_xfer[0].len = sizeof(st->fifo_tx_buf);
spi_message_init_with_transfers(&st->fifo_msg, st->fifo_xfer, 2);
regmap = devm_regmap_init(&spi->dev, &adxl367_spi_regmap_bus, st,
&adxl367_spi_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adxl367_probe(&spi->dev, &adxl367_spi_ops, st, regmap, spi->irq);
}
static const struct spi_device_id adxl367_spi_id[] = {
{ "adxl367", 0 },
{ },
};
MODULE_DEVICE_TABLE(spi, adxl367_spi_id);
static const struct of_device_id adxl367_of_match[] = {
{ .compatible = "adi,adxl367" },
{ },
};
MODULE_DEVICE_TABLE(of, adxl367_of_match);
static struct spi_driver adxl367_spi_driver = {
.driver = {
.name = "adxl367_spi",
.of_match_table = adxl367_of_match,
},
.probe = adxl367_spi_probe,
.id_table = adxl367_spi_id,
};
module_spi_driver(adxl367_spi_driver);
MODULE_IMPORT_NS(IIO_ADXL367);
MODULE_AUTHOR("Cosmin Tanislav <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADXL367 3-axis accelerometer SPI driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/adxl367_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO accel SPI driver for Freescale MMA7455L 3-axis 10-bit accelerometer
* Copyright 2015 Joachim Eastwood <[email protected]>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "mma7455.h"
static int mma7455_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &mma7455_core_regmap);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return mma7455_core_probe(&spi->dev, regmap, id->name);
}
static void mma7455_spi_remove(struct spi_device *spi)
{
mma7455_core_remove(&spi->dev);
}
static const struct spi_device_id mma7455_spi_ids[] = {
{ "mma7455", 0 },
{ "mma7456", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, mma7455_spi_ids);
static struct spi_driver mma7455_spi_driver = {
.probe = mma7455_spi_probe,
.remove = mma7455_spi_remove,
.id_table = mma7455_spi_ids,
.driver = {
.name = "mma7455-spi",
},
};
module_spi_driver(mma7455_spi_driver);
MODULE_AUTHOR("Joachim Eastwood <[email protected]>");
MODULE_DESCRIPTION("Freescale MMA7455L SPI accelerometer driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_MMA7455);
| linux-master | drivers/iio/accel/mma7455_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* 3-axis accelerometer driver supporting many Bosch-Sensortec chips
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/of_irq.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/events.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include "bmc150-accel.h"
#define BMC150_ACCEL_DRV_NAME "bmc150_accel"
#define BMC150_ACCEL_IRQ_NAME "bmc150_accel_event"
#define BMC150_ACCEL_REG_CHIP_ID 0x00
#define BMC150_ACCEL_REG_INT_STATUS_2 0x0B
#define BMC150_ACCEL_ANY_MOTION_MASK 0x07
#define BMC150_ACCEL_ANY_MOTION_BIT_X BIT(0)
#define BMC150_ACCEL_ANY_MOTION_BIT_Y BIT(1)
#define BMC150_ACCEL_ANY_MOTION_BIT_Z BIT(2)
#define BMC150_ACCEL_ANY_MOTION_BIT_SIGN BIT(3)
#define BMC150_ACCEL_REG_PMU_LPW 0x11
#define BMC150_ACCEL_PMU_MODE_MASK 0xE0
#define BMC150_ACCEL_PMU_MODE_SHIFT 5
#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK 0x17
#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT 1
#define BMC150_ACCEL_REG_PMU_RANGE 0x0F
#define BMC150_ACCEL_DEF_RANGE_2G 0x03
#define BMC150_ACCEL_DEF_RANGE_4G 0x05
#define BMC150_ACCEL_DEF_RANGE_8G 0x08
#define BMC150_ACCEL_DEF_RANGE_16G 0x0C
/* Default BW: 125Hz */
#define BMC150_ACCEL_REG_PMU_BW 0x10
#define BMC150_ACCEL_DEF_BW 125
#define BMC150_ACCEL_REG_RESET 0x14
#define BMC150_ACCEL_RESET_VAL 0xB6
#define BMC150_ACCEL_REG_INT_MAP_0 0x19
#define BMC150_ACCEL_INT_MAP_0_BIT_INT1_SLOPE BIT(2)
#define BMC150_ACCEL_REG_INT_MAP_1 0x1A
#define BMC150_ACCEL_INT_MAP_1_BIT_INT1_DATA BIT(0)
#define BMC150_ACCEL_INT_MAP_1_BIT_INT1_FWM BIT(1)
#define BMC150_ACCEL_INT_MAP_1_BIT_INT1_FFULL BIT(2)
#define BMC150_ACCEL_INT_MAP_1_BIT_INT2_FFULL BIT(5)
#define BMC150_ACCEL_INT_MAP_1_BIT_INT2_FWM BIT(6)
#define BMC150_ACCEL_INT_MAP_1_BIT_INT2_DATA BIT(7)
#define BMC150_ACCEL_REG_INT_MAP_2 0x1B
#define BMC150_ACCEL_INT_MAP_2_BIT_INT2_SLOPE BIT(2)
#define BMC150_ACCEL_REG_INT_RST_LATCH 0x21
#define BMC150_ACCEL_INT_MODE_LATCH_RESET 0x80
#define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
#define BMC150_ACCEL_INT_MODE_NON_LATCH_INT 0x00
#define BMC150_ACCEL_REG_INT_EN_0 0x16
#define BMC150_ACCEL_INT_EN_BIT_SLP_X BIT(0)
#define BMC150_ACCEL_INT_EN_BIT_SLP_Y BIT(1)
#define BMC150_ACCEL_INT_EN_BIT_SLP_Z BIT(2)
#define BMC150_ACCEL_REG_INT_EN_1 0x17
#define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
#define BMC150_ACCEL_INT_EN_BIT_FFULL_EN BIT(5)
#define BMC150_ACCEL_INT_EN_BIT_FWM_EN BIT(6)
#define BMC150_ACCEL_REG_INT_OUT_CTRL 0x20
#define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL BIT(0)
#define BMC150_ACCEL_INT_OUT_CTRL_INT2_LVL BIT(2)
#define BMC150_ACCEL_REG_INT_5 0x27
#define BMC150_ACCEL_SLOPE_DUR_MASK 0x03
#define BMC150_ACCEL_REG_INT_6 0x28
#define BMC150_ACCEL_SLOPE_THRES_MASK 0xFF
/* Slope duration in terms of number of samples */
#define BMC150_ACCEL_DEF_SLOPE_DURATION 1
/* in terms of multiples of g's/LSB, based on range */
#define BMC150_ACCEL_DEF_SLOPE_THRESHOLD 1
#define BMC150_ACCEL_REG_XOUT_L 0x02
#define BMC150_ACCEL_MAX_STARTUP_TIME_MS 100
/* Sleep Duration values */
#define BMC150_ACCEL_SLEEP_500_MICRO 0x05
#define BMC150_ACCEL_SLEEP_1_MS 0x06
#define BMC150_ACCEL_SLEEP_2_MS 0x07
#define BMC150_ACCEL_SLEEP_4_MS 0x08
#define BMC150_ACCEL_SLEEP_6_MS 0x09
#define BMC150_ACCEL_SLEEP_10_MS 0x0A
#define BMC150_ACCEL_SLEEP_25_MS 0x0B
#define BMC150_ACCEL_SLEEP_50_MS 0x0C
#define BMC150_ACCEL_SLEEP_100_MS 0x0D
#define BMC150_ACCEL_SLEEP_500_MS 0x0E
#define BMC150_ACCEL_SLEEP_1_SEC 0x0F
#define BMC150_ACCEL_REG_TEMP 0x08
#define BMC150_ACCEL_TEMP_CENTER_VAL 23
#define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
#define BMC150_AUTO_SUSPEND_DELAY_MS 2000
#define BMC150_ACCEL_REG_FIFO_STATUS 0x0E
#define BMC150_ACCEL_REG_FIFO_CONFIG0 0x30
#define BMC150_ACCEL_REG_FIFO_CONFIG1 0x3E
#define BMC150_ACCEL_REG_FIFO_DATA 0x3F
#define BMC150_ACCEL_FIFO_LENGTH 32
enum bmc150_accel_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
AXIS_MAX,
};
enum bmc150_power_modes {
BMC150_ACCEL_SLEEP_MODE_NORMAL,
BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
BMC150_ACCEL_SLEEP_MODE_LPM,
BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
};
struct bmc150_scale_info {
int scale;
u8 reg_range;
};
struct bmc150_accel_chip_info {
const char *name;
u8 chip_id;
const struct iio_chan_spec *channels;
int num_channels;
const struct bmc150_scale_info scale_table[4];
};
static const struct {
int val;
int val2;
u8 bw_bits;
} bmc150_accel_samp_freq_table[] = { {15, 620000, 0x08},
{31, 260000, 0x09},
{62, 500000, 0x0A},
{125, 0, 0x0B},
{250, 0, 0x0C},
{500, 0, 0x0D},
{1000, 0, 0x0E},
{2000, 0, 0x0F} };
static __maybe_unused const struct {
int bw_bits;
int msec;
} bmc150_accel_sample_upd_time[] = { {0x08, 64},
{0x09, 32},
{0x0A, 16},
{0x0B, 8},
{0x0C, 4},
{0x0D, 2},
{0x0E, 1},
{0x0F, 1} };
static const struct {
int sleep_dur;
u8 reg_value;
} bmc150_accel_sleep_value_table[] = { {0, 0},
{500, BMC150_ACCEL_SLEEP_500_MICRO},
{1000, BMC150_ACCEL_SLEEP_1_MS},
{2000, BMC150_ACCEL_SLEEP_2_MS},
{4000, BMC150_ACCEL_SLEEP_4_MS},
{6000, BMC150_ACCEL_SLEEP_6_MS},
{10000, BMC150_ACCEL_SLEEP_10_MS},
{25000, BMC150_ACCEL_SLEEP_25_MS},
{50000, BMC150_ACCEL_SLEEP_50_MS},
{100000, BMC150_ACCEL_SLEEP_100_MS},
{500000, BMC150_ACCEL_SLEEP_500_MS},
{1000000, BMC150_ACCEL_SLEEP_1_SEC} };
const struct regmap_config bmc150_regmap_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x3f,
};
EXPORT_SYMBOL_NS_GPL(bmc150_regmap_conf, IIO_BMC150);
static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
enum bmc150_power_modes mode,
int dur_us)
{
struct device *dev = regmap_get_device(data->regmap);
int i;
int ret;
u8 lpw_bits;
int dur_val = -1;
if (dur_us > 0) {
for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
++i) {
if (bmc150_accel_sleep_value_table[i].sleep_dur ==
dur_us)
dur_val =
bmc150_accel_sleep_value_table[i].reg_value;
}
} else {
dur_val = 0;
}
if (dur_val < 0)
return -EINVAL;
lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
dev_dbg(dev, "Set Mode bits %x\n", lpw_bits);
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
if (ret < 0) {
dev_err(dev, "Error writing reg_pmu_lpw\n");
return ret;
}
return 0;
}
static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
int val2)
{
int i;
int ret;
for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
if (bmc150_accel_samp_freq_table[i].val == val &&
bmc150_accel_samp_freq_table[i].val2 == val2) {
ret = regmap_write(data->regmap,
BMC150_ACCEL_REG_PMU_BW,
bmc150_accel_samp_freq_table[i].bw_bits);
if (ret < 0)
return ret;
data->bw_bits =
bmc150_accel_samp_freq_table[i].bw_bits;
return 0;
}
}
return -EINVAL;
}
static int bmc150_accel_update_slope(struct bmc150_accel_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_6,
data->slope_thres);
if (ret < 0) {
dev_err(dev, "Error writing reg_int_6\n");
return ret;
}
ret = regmap_update_bits(data->regmap, BMC150_ACCEL_REG_INT_5,
BMC150_ACCEL_SLOPE_DUR_MASK, data->slope_dur);
if (ret < 0) {
dev_err(dev, "Error updating reg_int_5\n");
return ret;
}
dev_dbg(dev, "%x %x\n", data->slope_thres, data->slope_dur);
return ret;
}
static int bmc150_accel_any_motion_setup(struct bmc150_accel_trigger *t,
bool state)
{
if (state)
return bmc150_accel_update_slope(t->data);
return 0;
}
static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
int *val2)
{
int i;
for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
*val = bmc150_accel_samp_freq_table[i].val;
*val2 = bmc150_accel_samp_freq_table[i].val2;
return IIO_VAL_INT_PLUS_MICRO;
}
}
return -EINVAL;
}
#ifdef CONFIG_PM
static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
{
int i;
for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
return bmc150_accel_sample_upd_time[i].msec;
}
return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
}
static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
if (on) {
ret = pm_runtime_resume_and_get(dev);
} else {
pm_runtime_mark_last_busy(dev);
ret = pm_runtime_put_autosuspend(dev);
}
if (ret < 0) {
dev_err(dev,
"Failed: %s for %d\n", __func__, on);
return ret;
}
return 0;
}
#else
static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
{
return 0;
}
#endif
#ifdef CONFIG_ACPI
/*
* Support for getting accelerometer information from BOSC0200 ACPI nodes.
*
* There are 2 variants of the BOSC0200 ACPI node. Some 2-in-1s with 360 degree
* hinges declare 2 I2C ACPI-resources for 2 accelerometers, 1 in the display
* and 1 in the base of the 2-in-1. On these 2-in-1s the ROMS ACPI object
* contains the mount-matrix for the sensor in the display and ROMK contains
* the mount-matrix for the sensor in the base. On devices using a single
* sensor there is a ROTM ACPI object which contains the mount-matrix.
*
* Here is an incomplete list of devices known to use 1 of these setups:
*
* Yoga devices with 2 accelerometers using ROMS + ROMK for the mount-matrices:
* Lenovo Thinkpad Yoga 11e 3th gen
* Lenovo Thinkpad Yoga 11e 4th gen
*
* Tablets using a single accelerometer using ROTM for the mount-matrix:
* Chuwi Hi8 Pro (CWI513)
* Chuwi Vi8 Plus (CWI519)
* Chuwi Hi13
* Irbis TW90
* Jumper EZpad mini 3
* Onda V80 plus
* Predia Basic Tablet
*/
static bool bmc150_apply_bosc0200_acpi_orientation(struct device *dev,
struct iio_mount_matrix *orientation)
{
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct acpi_device *adev = ACPI_COMPANION(dev);
char *name, *alt_name, *label, *str;
union acpi_object *obj, *elements;
acpi_status status;
int i, j, val[3];
if (strcmp(dev_name(dev), "i2c-BOSC0200:base") == 0) {
alt_name = "ROMK";
label = "accel-base";
} else {
alt_name = "ROMS";
label = "accel-display";
}
if (acpi_has_method(adev->handle, "ROTM")) {
name = "ROTM";
} else if (acpi_has_method(adev->handle, alt_name)) {
name = alt_name;
indio_dev->label = label;
} else {
return false;
}
status = acpi_evaluate_object(adev->handle, name, NULL, &buffer);
if (ACPI_FAILURE(status)) {
dev_warn(dev, "Failed to get ACPI mount matrix: %d\n", status);
return false;
}
obj = buffer.pointer;
if (obj->type != ACPI_TYPE_PACKAGE || obj->package.count != 3)
goto unknown_format;
elements = obj->package.elements;
for (i = 0; i < 3; i++) {
if (elements[i].type != ACPI_TYPE_STRING)
goto unknown_format;
str = elements[i].string.pointer;
if (sscanf(str, "%d %d %d", &val[0], &val[1], &val[2]) != 3)
goto unknown_format;
for (j = 0; j < 3; j++) {
switch (val[j]) {
case -1: str = "-1"; break;
case 0: str = "0"; break;
case 1: str = "1"; break;
default: goto unknown_format;
}
orientation->rotation[i * 3 + j] = str;
}
}
kfree(buffer.pointer);
return true;
unknown_format:
dev_warn(dev, "Unknown ACPI mount matrix format, ignoring\n");
kfree(buffer.pointer);
return false;
}
static bool bmc150_apply_dual250e_acpi_orientation(struct device *dev,
struct iio_mount_matrix *orientation)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
if (strcmp(dev_name(dev), "i2c-DUAL250E:base") == 0)
indio_dev->label = "accel-base";
else
indio_dev->label = "accel-display";
return false; /* DUAL250E fwnodes have no mount matrix info */
}
static bool bmc150_apply_acpi_orientation(struct device *dev,
struct iio_mount_matrix *orientation)
{
struct acpi_device *adev = ACPI_COMPANION(dev);
if (adev && acpi_dev_hid_uid_match(adev, "BOSC0200", NULL))
return bmc150_apply_bosc0200_acpi_orientation(dev, orientation);
if (adev && acpi_dev_hid_uid_match(adev, "DUAL250E", NULL))
return bmc150_apply_dual250e_acpi_orientation(dev, orientation);
return false;
}
#else
static bool bmc150_apply_acpi_orientation(struct device *dev,
struct iio_mount_matrix *orientation)
{
return false;
}
#endif
struct bmc150_accel_interrupt_info {
u8 map_reg;
u8 map_bitmask;
u8 en_reg;
u8 en_bitmask;
};
static const struct bmc150_accel_interrupt_info
bmc150_accel_interrupts_int1[BMC150_ACCEL_INTERRUPTS] = {
{ /* data ready interrupt */
.map_reg = BMC150_ACCEL_REG_INT_MAP_1,
.map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_INT1_DATA,
.en_reg = BMC150_ACCEL_REG_INT_EN_1,
.en_bitmask = BMC150_ACCEL_INT_EN_BIT_DATA_EN,
},
{ /* motion interrupt */
.map_reg = BMC150_ACCEL_REG_INT_MAP_0,
.map_bitmask = BMC150_ACCEL_INT_MAP_0_BIT_INT1_SLOPE,
.en_reg = BMC150_ACCEL_REG_INT_EN_0,
.en_bitmask = BMC150_ACCEL_INT_EN_BIT_SLP_X |
BMC150_ACCEL_INT_EN_BIT_SLP_Y |
BMC150_ACCEL_INT_EN_BIT_SLP_Z
},
{ /* fifo watermark interrupt */
.map_reg = BMC150_ACCEL_REG_INT_MAP_1,
.map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_INT1_FWM,
.en_reg = BMC150_ACCEL_REG_INT_EN_1,
.en_bitmask = BMC150_ACCEL_INT_EN_BIT_FWM_EN,
},
};
static const struct bmc150_accel_interrupt_info
bmc150_accel_interrupts_int2[BMC150_ACCEL_INTERRUPTS] = {
{ /* data ready interrupt */
.map_reg = BMC150_ACCEL_REG_INT_MAP_1,
.map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_INT2_DATA,
.en_reg = BMC150_ACCEL_REG_INT_EN_1,
.en_bitmask = BMC150_ACCEL_INT_EN_BIT_DATA_EN,
},
{ /* motion interrupt */
.map_reg = BMC150_ACCEL_REG_INT_MAP_2,
.map_bitmask = BMC150_ACCEL_INT_MAP_2_BIT_INT2_SLOPE,
.en_reg = BMC150_ACCEL_REG_INT_EN_0,
.en_bitmask = BMC150_ACCEL_INT_EN_BIT_SLP_X |
BMC150_ACCEL_INT_EN_BIT_SLP_Y |
BMC150_ACCEL_INT_EN_BIT_SLP_Z
},
{ /* fifo watermark interrupt */
.map_reg = BMC150_ACCEL_REG_INT_MAP_1,
.map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_INT2_FWM,
.en_reg = BMC150_ACCEL_REG_INT_EN_1,
.en_bitmask = BMC150_ACCEL_INT_EN_BIT_FWM_EN,
},
};
static void bmc150_accel_interrupts_setup(struct iio_dev *indio_dev,
struct bmc150_accel_data *data, int irq)
{
const struct bmc150_accel_interrupt_info *irq_info = NULL;
struct device *dev = regmap_get_device(data->regmap);
int i;
/*
* For now we map all interrupts to the same output pin.
* However, some boards may have just INT2 (and not INT1) connected,
* so we try to detect which IRQ it is based on the interrupt-names.
* Without interrupt-names, we assume the irq belongs to INT1.
*/
irq_info = bmc150_accel_interrupts_int1;
if (data->type == BOSCH_BMC156 ||
irq == of_irq_get_byname(dev->of_node, "INT2"))
irq_info = bmc150_accel_interrupts_int2;
for (i = 0; i < BMC150_ACCEL_INTERRUPTS; i++)
data->interrupts[i].info = &irq_info[i];
}
static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data, int i,
bool state)
{
struct device *dev = regmap_get_device(data->regmap);
struct bmc150_accel_interrupt *intr = &data->interrupts[i];
const struct bmc150_accel_interrupt_info *info = intr->info;
int ret;
if (state) {
if (atomic_inc_return(&intr->users) > 1)
return 0;
} else {
if (atomic_dec_return(&intr->users) > 0)
return 0;
}
/*
* We will expect the enable and disable to do operation in reverse
* order. This will happen here anyway, as our resume operation uses
* sync mode runtime pm calls. The suspend operation will be delayed
* by autosuspend delay.
* So the disable operation will still happen in reverse order of
* enable operation. When runtime pm is disabled the mode is always on,
* so sequence doesn't matter.
*/
ret = bmc150_accel_set_power_state(data, state);
if (ret < 0)
return ret;
/* map the interrupt to the appropriate pins */
ret = regmap_update_bits(data->regmap, info->map_reg, info->map_bitmask,
(state ? info->map_bitmask : 0));
if (ret < 0) {
dev_err(dev, "Error updating reg_int_map\n");
goto out_fix_power_state;
}
/* enable/disable the interrupt */
ret = regmap_update_bits(data->regmap, info->en_reg, info->en_bitmask,
(state ? info->en_bitmask : 0));
if (ret < 0) {
dev_err(dev, "Error updating reg_int_en\n");
goto out_fix_power_state;
}
return 0;
out_fix_power_state:
bmc150_accel_set_power_state(data, false);
return ret;
}
static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret, i;
for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) {
if (data->chip_info->scale_table[i].scale == val) {
ret = regmap_write(data->regmap,
BMC150_ACCEL_REG_PMU_RANGE,
data->chip_info->scale_table[i].reg_range);
if (ret < 0) {
dev_err(dev, "Error writing pmu_range\n");
return ret;
}
data->range = data->chip_info->scale_table[i].reg_range;
return 0;
}
}
return -EINVAL;
}
static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
unsigned int value;
mutex_lock(&data->mutex);
ret = regmap_read(data->regmap, BMC150_ACCEL_REG_TEMP, &value);
if (ret < 0) {
dev_err(dev, "Error reading reg_temp\n");
mutex_unlock(&data->mutex);
return ret;
}
*val = sign_extend32(value, 7);
mutex_unlock(&data->mutex);
return IIO_VAL_INT;
}
static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
struct iio_chan_spec const *chan,
int *val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
int axis = chan->scan_index;
__le16 raw_val;
mutex_lock(&data->mutex);
ret = bmc150_accel_set_power_state(data, true);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = regmap_bulk_read(data->regmap, BMC150_ACCEL_AXIS_TO_REG(axis),
&raw_val, sizeof(raw_val));
if (ret < 0) {
dev_err(dev, "Error reading axis %d\n", axis);
bmc150_accel_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
*val = sign_extend32(le16_to_cpu(raw_val) >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
ret = bmc150_accel_set_power_state(data, false);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
return IIO_VAL_INT;
}
static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
return bmc150_accel_get_temp(data, val);
case IIO_ACCEL:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
else
return bmc150_accel_get_axis(data, chan, val);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
if (chan->type == IIO_TEMP) {
*val = BMC150_ACCEL_TEMP_CENTER_VAL;
return IIO_VAL_INT;
} else {
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
*val = 0;
switch (chan->type) {
case IIO_TEMP:
*val2 = 500000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
{
int i;
const struct bmc150_scale_info *si;
int st_size = ARRAY_SIZE(data->chip_info->scale_table);
for (i = 0; i < st_size; ++i) {
si = &data->chip_info->scale_table[i];
if (si->reg_range == data->range) {
*val2 = si->scale;
return IIO_VAL_INT_PLUS_MICRO;
}
}
return -EINVAL;
}
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&data->mutex);
ret = bmc150_accel_get_bw(data, val, val2);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&data->mutex);
ret = bmc150_accel_set_bw(data, val, val2);
mutex_unlock(&data->mutex);
break;
case IIO_CHAN_INFO_SCALE:
if (val)
return -EINVAL;
mutex_lock(&data->mutex);
ret = bmc150_accel_set_scale(data, val2);
mutex_unlock(&data->mutex);
return ret;
default:
ret = -EINVAL;
}
return ret;
}
static int bmc150_accel_read_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
*val2 = 0;
switch (info) {
case IIO_EV_INFO_VALUE:
*val = data->slope_thres;
break;
case IIO_EV_INFO_PERIOD:
*val = data->slope_dur;
break;
default:
return -EINVAL;
}
return IIO_VAL_INT;
}
static int bmc150_accel_write_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
if (data->ev_enable_state)
return -EBUSY;
switch (info) {
case IIO_EV_INFO_VALUE:
data->slope_thres = val & BMC150_ACCEL_SLOPE_THRES_MASK;
break;
case IIO_EV_INFO_PERIOD:
data->slope_dur = val & BMC150_ACCEL_SLOPE_DUR_MASK;
break;
default:
return -EINVAL;
}
return 0;
}
static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
return data->ev_enable_state;
}
static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
if (state == data->ev_enable_state)
return 0;
mutex_lock(&data->mutex);
ret = bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_ANY_MOTION,
state);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
data->ev_enable_state = state;
mutex_unlock(&data->mutex);
return 0;
}
static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
struct iio_trigger *trig)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
int i;
for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) {
if (data->triggers[i].indio_trig == trig)
return 0;
}
return -EINVAL;
}
static ssize_t bmc150_accel_get_fifo_watermark(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct bmc150_accel_data *data = iio_priv(indio_dev);
int wm;
mutex_lock(&data->mutex);
wm = data->watermark;
mutex_unlock(&data->mutex);
return sprintf(buf, "%d\n", wm);
}
static ssize_t bmc150_accel_get_fifo_state(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct bmc150_accel_data *data = iio_priv(indio_dev);
bool state;
mutex_lock(&data->mutex);
state = data->fifo_mode;
mutex_unlock(&data->mutex);
return sprintf(buf, "%d\n", state);
}
static const struct iio_mount_matrix *
bmc150_accel_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info bmc150_accel_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_accel_get_mount_matrix),
{ }
};
IIO_STATIC_CONST_DEVICE_ATTR(hwfifo_watermark_min, "1");
IIO_STATIC_CONST_DEVICE_ATTR(hwfifo_watermark_max,
__stringify(BMC150_ACCEL_FIFO_LENGTH));
static IIO_DEVICE_ATTR(hwfifo_enabled, S_IRUGO,
bmc150_accel_get_fifo_state, NULL, 0);
static IIO_DEVICE_ATTR(hwfifo_watermark, S_IRUGO,
bmc150_accel_get_fifo_watermark, NULL, 0);
static const struct iio_dev_attr *bmc150_accel_fifo_attributes[] = {
&iio_dev_attr_hwfifo_watermark_min,
&iio_dev_attr_hwfifo_watermark_max,
&iio_dev_attr_hwfifo_watermark,
&iio_dev_attr_hwfifo_enabled,
NULL,
};
static int bmc150_accel_set_watermark(struct iio_dev *indio_dev, unsigned val)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
if (val > BMC150_ACCEL_FIFO_LENGTH)
val = BMC150_ACCEL_FIFO_LENGTH;
mutex_lock(&data->mutex);
data->watermark = val;
mutex_unlock(&data->mutex);
return 0;
}
/*
* We must read at least one full frame in one burst, otherwise the rest of the
* frame data is discarded.
*/
static int bmc150_accel_fifo_transfer(struct bmc150_accel_data *data,
char *buffer, int samples)
{
struct device *dev = regmap_get_device(data->regmap);
int sample_length = 3 * 2;
int ret;
int total_length = samples * sample_length;
ret = regmap_raw_read(data->regmap, BMC150_ACCEL_REG_FIFO_DATA,
buffer, total_length);
if (ret)
dev_err(dev,
"Error transferring data from fifo: %d\n", ret);
return ret;
}
static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev,
unsigned samples, bool irq)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret, i;
u8 count;
u16 buffer[BMC150_ACCEL_FIFO_LENGTH * 3];
int64_t tstamp;
uint64_t sample_period;
unsigned int val;
ret = regmap_read(data->regmap, BMC150_ACCEL_REG_FIFO_STATUS, &val);
if (ret < 0) {
dev_err(dev, "Error reading reg_fifo_status\n");
return ret;
}
count = val & 0x7F;
if (!count)
return 0;
/*
* If we getting called from IRQ handler we know the stored timestamp is
* fairly accurate for the last stored sample. Otherwise, if we are
* called as a result of a read operation from userspace and hence
* before the watermark interrupt was triggered, take a timestamp
* now. We can fall anywhere in between two samples so the error in this
* case is at most one sample period.
*/
if (!irq) {
data->old_timestamp = data->timestamp;
data->timestamp = iio_get_time_ns(indio_dev);
}
/*
* Approximate timestamps for each of the sample based on the sampling
* frequency, timestamp for last sample and number of samples.
*
* Note that we can't use the current bandwidth settings to compute the
* sample period because the sample rate varies with the device
* (e.g. between 31.70ms to 32.20ms for a bandwidth of 15.63HZ). That
* small variation adds when we store a large number of samples and
* creates significant jitter between the last and first samples in
* different batches (e.g. 32ms vs 21ms).
*
* To avoid this issue we compute the actual sample period ourselves
* based on the timestamp delta between the last two flush operations.
*/
sample_period = (data->timestamp - data->old_timestamp);
do_div(sample_period, count);
tstamp = data->timestamp - (count - 1) * sample_period;
if (samples && count > samples)
count = samples;
ret = bmc150_accel_fifo_transfer(data, (u8 *)buffer, count);
if (ret)
return ret;
/*
* Ideally we want the IIO core to handle the demux when running in fifo
* mode but not when running in triggered buffer mode. Unfortunately
* this does not seem to be possible, so stick with driver demux for
* now.
*/
for (i = 0; i < count; i++) {
int j, bit;
j = 0;
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength)
memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
sizeof(data->scan.channels[0]));
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
tstamp);
tstamp += sample_period;
}
return count;
}
static int bmc150_accel_fifo_flush(struct iio_dev *indio_dev, unsigned samples)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = __bmc150_accel_fifo_flush(indio_dev, samples, false);
mutex_unlock(&data->mutex);
return ret;
}
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
"15.620000 31.260000 62.50000 125 250 500 1000 2000");
static struct attribute *bmc150_accel_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group bmc150_accel_attrs_group = {
.attrs = bmc150_accel_attributes,
};
static const struct iio_event_spec bmc150_accel_event = {
.type = IIO_EV_TYPE_ROC,
.dir = IIO_EV_DIR_EITHER,
.mask_separate = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_PERIOD)
};
#define BMC150_ACCEL_CHANNEL(_axis, bits) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 16 - (bits), \
.endianness = IIO_LE, \
}, \
.ext_info = bmc150_accel_ext_info, \
.event_spec = &bmc150_accel_event, \
.num_event_specs = 1 \
}
#define BMC150_ACCEL_CHANNELS(bits) { \
{ \
.type = IIO_TEMP, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OFFSET), \
.scan_index = -1, \
}, \
BMC150_ACCEL_CHANNEL(X, bits), \
BMC150_ACCEL_CHANNEL(Y, bits), \
BMC150_ACCEL_CHANNEL(Z, bits), \
IIO_CHAN_SOFT_TIMESTAMP(3), \
}
static const struct iio_chan_spec bma222e_accel_channels[] =
BMC150_ACCEL_CHANNELS(8);
static const struct iio_chan_spec bma250e_accel_channels[] =
BMC150_ACCEL_CHANNELS(10);
static const struct iio_chan_spec bmc150_accel_channels[] =
BMC150_ACCEL_CHANNELS(12);
static const struct iio_chan_spec bma280_accel_channels[] =
BMC150_ACCEL_CHANNELS(14);
/*
* The range for the Bosch sensors is typically +-2g/4g/8g/16g, distributed
* over the amount of bits (see above). The scale table can be calculated using
* (range / 2^bits) * g = (range / 2^bits) * 9.80665 m/s^2
* e.g. for +-2g and 12 bits: (4 / 2^12) * 9.80665 m/s^2 = 0.0095768... m/s^2
* Multiply 10^6 and round to get the values listed below.
*/
static const struct bmc150_accel_chip_info bmc150_accel_chip_info_tbl[] = {
{
.name = "BMA222",
.chip_id = 0x03,
.channels = bma222e_accel_channels,
.num_channels = ARRAY_SIZE(bma222e_accel_channels),
.scale_table = { {153229, BMC150_ACCEL_DEF_RANGE_2G},
{306458, BMC150_ACCEL_DEF_RANGE_4G},
{612916, BMC150_ACCEL_DEF_RANGE_8G},
{1225831, BMC150_ACCEL_DEF_RANGE_16G} },
},
{
.name = "BMA222E",
.chip_id = 0xF8,
.channels = bma222e_accel_channels,
.num_channels = ARRAY_SIZE(bma222e_accel_channels),
.scale_table = { {153229, BMC150_ACCEL_DEF_RANGE_2G},
{306458, BMC150_ACCEL_DEF_RANGE_4G},
{612916, BMC150_ACCEL_DEF_RANGE_8G},
{1225831, BMC150_ACCEL_DEF_RANGE_16G} },
},
{
.name = "BMA250E",
.chip_id = 0xF9,
.channels = bma250e_accel_channels,
.num_channels = ARRAY_SIZE(bma250e_accel_channels),
.scale_table = { {38307, BMC150_ACCEL_DEF_RANGE_2G},
{76614, BMC150_ACCEL_DEF_RANGE_4G},
{153229, BMC150_ACCEL_DEF_RANGE_8G},
{306458, BMC150_ACCEL_DEF_RANGE_16G} },
},
{
.name = "BMA253/BMA254/BMA255/BMC150/BMC156/BMI055",
.chip_id = 0xFA,
.channels = bmc150_accel_channels,
.num_channels = ARRAY_SIZE(bmc150_accel_channels),
.scale_table = { {9577, BMC150_ACCEL_DEF_RANGE_2G},
{19154, BMC150_ACCEL_DEF_RANGE_4G},
{38307, BMC150_ACCEL_DEF_RANGE_8G},
{76614, BMC150_ACCEL_DEF_RANGE_16G} },
},
{
.name = "BMA280",
.chip_id = 0xFB,
.channels = bma280_accel_channels,
.num_channels = ARRAY_SIZE(bma280_accel_channels),
.scale_table = { {2394, BMC150_ACCEL_DEF_RANGE_2G},
{4788, BMC150_ACCEL_DEF_RANGE_4G},
{9577, BMC150_ACCEL_DEF_RANGE_8G},
{19154, BMC150_ACCEL_DEF_RANGE_16G} },
},
};
static const struct iio_info bmc150_accel_info = {
.attrs = &bmc150_accel_attrs_group,
.read_raw = bmc150_accel_read_raw,
.write_raw = bmc150_accel_write_raw,
.read_event_value = bmc150_accel_read_event,
.write_event_value = bmc150_accel_write_event,
.write_event_config = bmc150_accel_write_event_config,
.read_event_config = bmc150_accel_read_event_config,
};
static const struct iio_info bmc150_accel_info_fifo = {
.attrs = &bmc150_accel_attrs_group,
.read_raw = bmc150_accel_read_raw,
.write_raw = bmc150_accel_write_raw,
.read_event_value = bmc150_accel_read_event,
.write_event_value = bmc150_accel_write_event,
.write_event_config = bmc150_accel_write_event_config,
.read_event_config = bmc150_accel_read_event_config,
.validate_trigger = bmc150_accel_validate_trigger,
.hwfifo_set_watermark = bmc150_accel_set_watermark,
.hwfifo_flush_to_buffer = bmc150_accel_fifo_flush,
};
static const unsigned long bmc150_accel_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0};
static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = regmap_bulk_read(data->regmap, BMC150_ACCEL_REG_XOUT_L,
data->buffer, AXIS_MAX * 2);
mutex_unlock(&data->mutex);
if (ret < 0)
goto err_read;
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
pf->timestamp);
err_read:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static void bmc150_accel_trig_reen(struct iio_trigger *trig)
{
struct bmc150_accel_trigger *t = iio_trigger_get_drvdata(trig);
struct bmc150_accel_data *data = t->data;
struct device *dev = regmap_get_device(data->regmap);
int ret;
/* new data interrupts don't need ack */
if (t == &t->data->triggers[BMC150_ACCEL_TRIGGER_DATA_READY])
return;
mutex_lock(&data->mutex);
/* clear any latched interrupt */
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
BMC150_ACCEL_INT_MODE_LATCH_INT |
BMC150_ACCEL_INT_MODE_LATCH_RESET);
mutex_unlock(&data->mutex);
if (ret < 0)
dev_err(dev, "Error writing reg_int_rst_latch\n");
}
static int bmc150_accel_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct bmc150_accel_trigger *t = iio_trigger_get_drvdata(trig);
struct bmc150_accel_data *data = t->data;
int ret;
mutex_lock(&data->mutex);
if (t->enabled == state) {
mutex_unlock(&data->mutex);
return 0;
}
if (t->setup) {
ret = t->setup(t, state);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
}
ret = bmc150_accel_set_interrupt(data, t->intr, state);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
t->enabled = state;
mutex_unlock(&data->mutex);
return ret;
}
static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
.set_trigger_state = bmc150_accel_trigger_set_state,
.reenable = bmc150_accel_trig_reen,
};
static int bmc150_accel_handle_roc_event(struct iio_dev *indio_dev)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int dir;
int ret;
unsigned int val;
ret = regmap_read(data->regmap, BMC150_ACCEL_REG_INT_STATUS_2, &val);
if (ret < 0) {
dev_err(dev, "Error reading reg_int_status_2\n");
return ret;
}
if (val & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
dir = IIO_EV_DIR_FALLING;
else
dir = IIO_EV_DIR_RISING;
if (val & BMC150_ACCEL_ANY_MOTION_BIT_X)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_ROC,
dir),
data->timestamp);
if (val & BMC150_ACCEL_ANY_MOTION_BIT_Y)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_ROC,
dir),
data->timestamp);
if (val & BMC150_ACCEL_ANY_MOTION_BIT_Z)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_ROC,
dir),
data->timestamp);
return ret;
}
static irqreturn_t bmc150_accel_irq_thread_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct bmc150_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
bool ack = false;
int ret;
mutex_lock(&data->mutex);
if (data->fifo_mode) {
ret = __bmc150_accel_fifo_flush(indio_dev,
BMC150_ACCEL_FIFO_LENGTH, true);
if (ret > 0)
ack = true;
}
if (data->ev_enable_state) {
ret = bmc150_accel_handle_roc_event(indio_dev);
if (ret > 0)
ack = true;
}
if (ack) {
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
BMC150_ACCEL_INT_MODE_LATCH_INT |
BMC150_ACCEL_INT_MODE_LATCH_RESET);
if (ret)
dev_err(dev, "Error writing reg_int_rst_latch\n");
ret = IRQ_HANDLED;
} else {
ret = IRQ_NONE;
}
mutex_unlock(&data->mutex);
return ret;
}
static irqreturn_t bmc150_accel_irq_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct bmc150_accel_data *data = iio_priv(indio_dev);
bool ack = false;
int i;
data->old_timestamp = data->timestamp;
data->timestamp = iio_get_time_ns(indio_dev);
for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) {
if (data->triggers[i].enabled) {
iio_trigger_poll(data->triggers[i].indio_trig);
ack = true;
break;
}
}
if (data->ev_enable_state || data->fifo_mode)
return IRQ_WAKE_THREAD;
if (ack)
return IRQ_HANDLED;
return IRQ_NONE;
}
static const struct {
int intr;
const char *name;
int (*setup)(struct bmc150_accel_trigger *t, bool state);
} bmc150_accel_triggers[BMC150_ACCEL_TRIGGERS] = {
{
.intr = 0,
.name = "%s-dev%d",
},
{
.intr = 1,
.name = "%s-any-motion-dev%d",
.setup = bmc150_accel_any_motion_setup,
},
};
static void bmc150_accel_unregister_triggers(struct bmc150_accel_data *data,
int from)
{
int i;
for (i = from; i >= 0; i--) {
if (data->triggers[i].indio_trig) {
iio_trigger_unregister(data->triggers[i].indio_trig);
data->triggers[i].indio_trig = NULL;
}
}
}
static int bmc150_accel_triggers_setup(struct iio_dev *indio_dev,
struct bmc150_accel_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
int i, ret;
for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) {
struct bmc150_accel_trigger *t = &data->triggers[i];
t->indio_trig = devm_iio_trigger_alloc(dev,
bmc150_accel_triggers[i].name,
indio_dev->name,
iio_device_id(indio_dev));
if (!t->indio_trig) {
ret = -ENOMEM;
break;
}
t->indio_trig->ops = &bmc150_accel_trigger_ops;
t->intr = bmc150_accel_triggers[i].intr;
t->data = data;
t->setup = bmc150_accel_triggers[i].setup;
iio_trigger_set_drvdata(t->indio_trig, t);
ret = iio_trigger_register(t->indio_trig);
if (ret)
break;
}
if (ret)
bmc150_accel_unregister_triggers(data, i - 1);
return ret;
}
#define BMC150_ACCEL_FIFO_MODE_STREAM 0x80
#define BMC150_ACCEL_FIFO_MODE_FIFO 0x40
#define BMC150_ACCEL_FIFO_MODE_BYPASS 0x00
static int bmc150_accel_fifo_set_mode(struct bmc150_accel_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
u8 reg = BMC150_ACCEL_REG_FIFO_CONFIG1;
int ret;
ret = regmap_write(data->regmap, reg, data->fifo_mode);
if (ret < 0) {
dev_err(dev, "Error writing reg_fifo_config1\n");
return ret;
}
if (!data->fifo_mode)
return 0;
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_FIFO_CONFIG0,
data->watermark);
if (ret < 0)
dev_err(dev, "Error writing reg_fifo_config0\n");
return ret;
}
static int bmc150_accel_buffer_preenable(struct iio_dev *indio_dev)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
return bmc150_accel_set_power_state(data, true);
}
static int bmc150_accel_buffer_postenable(struct iio_dev *indio_dev)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret = 0;
if (iio_device_get_current_mode(indio_dev) == INDIO_BUFFER_TRIGGERED)
return 0;
mutex_lock(&data->mutex);
if (!data->watermark)
goto out;
ret = bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK,
true);
if (ret)
goto out;
data->fifo_mode = BMC150_ACCEL_FIFO_MODE_FIFO;
ret = bmc150_accel_fifo_set_mode(data);
if (ret) {
data->fifo_mode = 0;
bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK,
false);
}
out:
mutex_unlock(&data->mutex);
return ret;
}
static int bmc150_accel_buffer_predisable(struct iio_dev *indio_dev)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
if (iio_device_get_current_mode(indio_dev) == INDIO_BUFFER_TRIGGERED)
return 0;
mutex_lock(&data->mutex);
if (!data->fifo_mode)
goto out;
bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK, false);
__bmc150_accel_fifo_flush(indio_dev, BMC150_ACCEL_FIFO_LENGTH, false);
data->fifo_mode = 0;
bmc150_accel_fifo_set_mode(data);
out:
mutex_unlock(&data->mutex);
return 0;
}
static int bmc150_accel_buffer_postdisable(struct iio_dev *indio_dev)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
return bmc150_accel_set_power_state(data, false);
}
static const struct iio_buffer_setup_ops bmc150_accel_buffer_ops = {
.preenable = bmc150_accel_buffer_preenable,
.postenable = bmc150_accel_buffer_postenable,
.predisable = bmc150_accel_buffer_predisable,
.postdisable = bmc150_accel_buffer_postdisable,
};
static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
int ret, i;
unsigned int val;
/*
* Reset chip to get it in a known good state. A delay of 1.8ms after
* reset is required according to the data sheets of supported chips.
*/
regmap_write(data->regmap, BMC150_ACCEL_REG_RESET,
BMC150_ACCEL_RESET_VAL);
usleep_range(1800, 2500);
ret = regmap_read(data->regmap, BMC150_ACCEL_REG_CHIP_ID, &val);
if (ret < 0) {
dev_err(dev, "Error: Reading chip id\n");
return ret;
}
dev_dbg(dev, "Chip Id %x\n", val);
for (i = 0; i < ARRAY_SIZE(bmc150_accel_chip_info_tbl); i++) {
if (bmc150_accel_chip_info_tbl[i].chip_id == val) {
data->chip_info = &bmc150_accel_chip_info_tbl[i];
break;
}
}
if (!data->chip_info) {
dev_err(dev, "Invalid chip %x\n", val);
return -ENODEV;
}
ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
if (ret < 0)
return ret;
/* Set Bandwidth */
ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
if (ret < 0)
return ret;
/* Set Default Range */
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_PMU_RANGE,
BMC150_ACCEL_DEF_RANGE_4G);
if (ret < 0) {
dev_err(dev, "Error writing reg_pmu_range\n");
return ret;
}
data->range = BMC150_ACCEL_DEF_RANGE_4G;
/* Set default slope duration and thresholds */
data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
data->slope_dur = BMC150_ACCEL_DEF_SLOPE_DURATION;
ret = bmc150_accel_update_slope(data);
if (ret < 0)
return ret;
/* Set default as latched interrupts */
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
BMC150_ACCEL_INT_MODE_LATCH_INT |
BMC150_ACCEL_INT_MODE_LATCH_RESET);
if (ret < 0) {
dev_err(dev, "Error writing reg_int_rst_latch\n");
return ret;
}
return 0;
}
int bmc150_accel_core_probe(struct device *dev, struct regmap *regmap, int irq,
enum bmc150_type type, const char *name,
bool block_supported)
{
const struct iio_dev_attr **fifo_attrs;
struct bmc150_accel_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->regmap = regmap;
data->type = type;
if (!bmc150_apply_acpi_orientation(dev, &data->orientation)) {
ret = iio_read_mount_matrix(dev, &data->orientation);
if (ret)
return ret;
}
/*
* VDD is the analog and digital domain voltage supply
* VDDIO is the digital I/O voltage supply
*/
data->regulators[0].supply = "vdd";
data->regulators[1].supply = "vddio";
ret = devm_regulator_bulk_get(dev,
ARRAY_SIZE(data->regulators),
data->regulators);
if (ret)
return dev_err_probe(dev, ret, "failed to get regulators\n");
ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
data->regulators);
if (ret) {
dev_err(dev, "failed to enable regulators: %d\n", ret);
return ret;
}
/*
* 2ms or 3ms power-on time according to datasheets, let's better
* be safe than sorry and set this delay to 5ms.
*/
msleep(5);
ret = bmc150_accel_chip_init(data);
if (ret < 0)
goto err_disable_regulators;
mutex_init(&data->mutex);
indio_dev->channels = data->chip_info->channels;
indio_dev->num_channels = data->chip_info->num_channels;
indio_dev->name = name ? name : data->chip_info->name;
indio_dev->available_scan_masks = bmc150_accel_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bmc150_accel_info;
if (block_supported) {
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
indio_dev->info = &bmc150_accel_info_fifo;
fifo_attrs = bmc150_accel_fifo_attributes;
} else {
fifo_attrs = NULL;
}
ret = iio_triggered_buffer_setup_ext(indio_dev,
&iio_pollfunc_store_time,
bmc150_accel_trigger_handler,
IIO_BUFFER_DIRECTION_IN,
&bmc150_accel_buffer_ops,
fifo_attrs);
if (ret < 0) {
dev_err(dev, "Failed: iio triggered buffer setup\n");
goto err_disable_regulators;
}
if (irq > 0) {
ret = devm_request_threaded_irq(dev, irq,
bmc150_accel_irq_handler,
bmc150_accel_irq_thread_handler,
IRQF_TRIGGER_RISING,
BMC150_ACCEL_IRQ_NAME,
indio_dev);
if (ret)
goto err_buffer_cleanup;
/*
* Set latched mode interrupt. While certain interrupts are
* non-latched regardless of this settings (e.g. new data) we
* want to use latch mode when we can to prevent interrupt
* flooding.
*/
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
BMC150_ACCEL_INT_MODE_LATCH_RESET);
if (ret < 0) {
dev_err(dev, "Error writing reg_int_rst_latch\n");
goto err_buffer_cleanup;
}
bmc150_accel_interrupts_setup(indio_dev, data, irq);
ret = bmc150_accel_triggers_setup(indio_dev, data);
if (ret)
goto err_buffer_cleanup;
}
ret = pm_runtime_set_active(dev);
if (ret)
goto err_trigger_unregister;
pm_runtime_enable(dev);
pm_runtime_set_autosuspend_delay(dev, BMC150_AUTO_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(dev);
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(dev, "Unable to register iio device\n");
goto err_pm_cleanup;
}
return 0;
err_pm_cleanup:
pm_runtime_dont_use_autosuspend(dev);
pm_runtime_disable(dev);
err_trigger_unregister:
bmc150_accel_unregister_triggers(data, BMC150_ACCEL_TRIGGERS - 1);
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_disable_regulators:
regulator_bulk_disable(ARRAY_SIZE(data->regulators),
data->regulators);
return ret;
}
EXPORT_SYMBOL_NS_GPL(bmc150_accel_core_probe, IIO_BMC150);
void bmc150_accel_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmc150_accel_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
bmc150_accel_unregister_triggers(data, BMC150_ACCEL_TRIGGERS - 1);
iio_triggered_buffer_cleanup(indio_dev);
mutex_lock(&data->mutex);
bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
mutex_unlock(&data->mutex);
regulator_bulk_disable(ARRAY_SIZE(data->regulators),
data->regulators);
}
EXPORT_SYMBOL_NS_GPL(bmc150_accel_core_remove, IIO_BMC150);
#ifdef CONFIG_PM_SLEEP
static int bmc150_accel_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmc150_accel_data *data = iio_priv(indio_dev);
mutex_lock(&data->mutex);
bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
mutex_unlock(&data->mutex);
return 0;
}
static int bmc150_accel_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmc150_accel_data *data = iio_priv(indio_dev);
mutex_lock(&data->mutex);
bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
bmc150_accel_fifo_set_mode(data);
mutex_unlock(&data->mutex);
if (data->resume_callback)
data->resume_callback(dev);
return 0;
}
#endif
#ifdef CONFIG_PM
static int bmc150_accel_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
if (ret < 0)
return -EAGAIN;
return 0;
}
static int bmc150_accel_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
int sleep_val;
ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
if (ret < 0)
return ret;
ret = bmc150_accel_fifo_set_mode(data);
if (ret < 0)
return ret;
sleep_val = bmc150_accel_get_startup_times(data);
if (sleep_val < 20)
usleep_range(sleep_val * 1000, 20000);
else
msleep_interruptible(sleep_val);
return 0;
}
#endif
const struct dev_pm_ops bmc150_accel_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
bmc150_accel_runtime_resume, NULL)
};
EXPORT_SYMBOL_NS_GPL(bmc150_accel_pm_ops, IIO_BMC150);
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMC150 accelerometer driver");
| linux-master | drivers/iio/accel/bmc150-accel-core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* I2C IIO driver for Bosch BMA400 triaxial acceleration sensor.
*
* Copyright 2019 Dan Robertson <[email protected]>
*
* I2C address is either 0x14 or 0x15 depending on SDO
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "bma400.h"
static int bma400_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &bma400_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "failed to create regmap\n");
return PTR_ERR(regmap);
}
return bma400_probe(&client->dev, regmap, client->irq, id->name);
}
static const struct i2c_device_id bma400_i2c_ids[] = {
{ "bma400", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, bma400_i2c_ids);
static const struct of_device_id bma400_of_i2c_match[] = {
{ .compatible = "bosch,bma400" },
{ }
};
MODULE_DEVICE_TABLE(of, bma400_of_i2c_match);
static struct i2c_driver bma400_i2c_driver = {
.driver = {
.name = "bma400",
.of_match_table = bma400_of_i2c_match,
},
.probe = bma400_i2c_probe,
.id_table = bma400_i2c_ids,
};
module_i2c_driver(bma400_i2c_driver);
MODULE_AUTHOR("Dan Robertson <[email protected]>");
MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor (I2C)");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_BMA400);
| linux-master | drivers/iio/accel/bma400_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/common/st_sensors.h>
#include "st_accel.h"
#define ST_ACCEL_NUMBER_DATA_CHANNELS 3
/* DEFAULT VALUE FOR SENSORS */
#define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
#define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
#define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
/* FULLSCALE */
#define ST_ACCEL_FS_AVL_2G 2
#define ST_ACCEL_FS_AVL_4G 4
#define ST_ACCEL_FS_AVL_6G 6
#define ST_ACCEL_FS_AVL_8G 8
#define ST_ACCEL_FS_AVL_16G 16
#define ST_ACCEL_FS_AVL_100G 100
#define ST_ACCEL_FS_AVL_200G 200
#define ST_ACCEL_FS_AVL_400G 400
static const struct iio_mount_matrix *
st_accel_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct st_sensor_data *adata = iio_priv(indio_dev);
return &adata->mount_matrix;
}
static const struct iio_chan_spec_ext_info st_accel_mount_matrix_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, st_accel_get_mount_matrix),
{ }
};
static const struct iio_chan_spec st_accel_8bit_channels[] = {
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1,
st_accel_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1,
st_accel_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1,
st_accel_mount_matrix_ext_info),
IIO_CHAN_SOFT_TIMESTAMP(3)
};
static const struct iio_chan_spec st_accel_12bit_channels[] = {
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
ST_ACCEL_DEFAULT_OUT_X_L_ADDR,
st_accel_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
ST_ACCEL_DEFAULT_OUT_Y_L_ADDR,
st_accel_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
ST_ACCEL_DEFAULT_OUT_Z_L_ADDR,
st_accel_mount_matrix_ext_info),
IIO_CHAN_SOFT_TIMESTAMP(3)
};
static const struct iio_chan_spec st_accel_16bit_channels[] = {
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
ST_ACCEL_DEFAULT_OUT_X_L_ADDR,
st_accel_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
ST_ACCEL_DEFAULT_OUT_Y_L_ADDR,
st_accel_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
ST_ACCEL_DEFAULT_OUT_Z_L_ADDR,
st_accel_mount_matrix_ext_info),
IIO_CHAN_SOFT_TIMESTAMP(3)
};
static const struct st_sensor_settings st_accel_sensors_settings[] = {
{
.wai = 0x33,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS3DH_ACCEL_DEV_NAME,
[1] = LSM303DLHC_ACCEL_DEV_NAME,
[2] = LSM330D_ACCEL_DEV_NAME,
[3] = LSM330DL_ACCEL_DEV_NAME,
[4] = LSM330DLC_ACCEL_DEV_NAME,
[5] = LSM303AGR_ACCEL_DEV_NAME,
[6] = LIS2DH12_ACCEL_DEV_NAME,
[7] = LIS3DE_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xf0,
.odr_avl = {
{ .hz = 1, .value = 0x01, },
{ .hz = 10, .value = 0x02, },
{ .hz = 25, .value = 0x03, },
{ .hz = 50, .value = 0x04, },
{ .hz = 100, .value = 0x05, },
{ .hz = 200, .value = 0x06, },
{ .hz = 400, .value = 0x07, },
{ .hz = 1600, .value = 0x08, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xf0,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(1000),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(2000),
},
[2] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(4000),
},
[3] = {
.num = ST_ACCEL_FS_AVL_16G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(12000),
},
},
},
.bdu = {
.addr = 0x23,
.mask = 0x80,
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x10,
},
.addr_ihl = 0x25,
.mask_ihl = 0x02,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0x32,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS331DLH_ACCEL_DEV_NAME,
[1] = LSM303DL_ACCEL_DEV_NAME,
[2] = LSM303DLH_ACCEL_DEV_NAME,
[3] = LSM303DLM_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
.odr = {
.addr = 0x20,
.mask = 0x18,
.odr_avl = {
{ .hz = 50, .value = 0x00, },
{ .hz = 100, .value = 0x01, },
{ .hz = 400, .value = 0x02, },
{ .hz = 1000, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xe0,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(1000),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(2000),
},
[2] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(3900),
},
},
},
.bdu = {
.addr = 0x23,
.mask = 0x80,
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x02,
.addr_od = 0x22,
.mask_od = 0x40,
},
.int2 = {
.addr = 0x22,
.mask = 0x10,
.addr_od = 0x22,
.mask_od = 0x40,
},
.addr_ihl = 0x22,
.mask_ihl = 0x80,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0x40,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LSM330_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_16bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xf0,
.odr_avl = {
{ .hz = 3, .value = 0x01, },
{ .hz = 6, .value = 0x02, },
{ .hz = 12, .value = 0x03, },
{ .hz = 25, .value = 0x04, },
{ .hz = 50, .value = 0x05, },
{ .hz = 100, .value = 0x06, },
{ .hz = 200, .value = 0x07, },
{ .hz = 400, .value = 0x08, },
{ .hz = 800, .value = 0x09, },
{ .hz = 1600, .value = 0x0a, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xf0,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x24,
.mask = 0x38,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(61),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(122),
},
[2] = {
.num = ST_ACCEL_FS_AVL_6G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(183),
},
[3] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(244),
},
[4] = {
.num = ST_ACCEL_FS_AVL_16G,
.value = 0x04,
.gain = IIO_G_TO_M_S_2(732),
},
},
},
.bdu = {
.addr = 0x20,
.mask = 0x08,
},
.drdy_irq = {
.int1 = {
.addr = 0x23,
.mask = 0x80,
},
.addr_ihl = 0x23,
.mask_ihl = 0x40,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
.ig1 = {
.en_addr = 0x23,
.en_mask = 0x08,
},
},
.sim = {
.addr = 0x24,
.value = BIT(0),
},
.multi_read_bit = false,
.bootime = 2,
},
{
.wai = 0x3a,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS3LV02DL_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
.odr = {
.addr = 0x20,
.mask = 0x30, /* DF1 and DF0 */
.odr_avl = {
{ .hz = 40, .value = 0x00, },
{ .hz = 160, .value = 0x01, },
{ .hz = 640, .value = 0x02, },
{ .hz = 2560, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xc0,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x21,
.mask = 0x80,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(1000),
},
[1] = {
.num = ST_ACCEL_FS_AVL_6G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(3000),
},
},
},
.bdu = {
.addr = 0x21,
.mask = 0x40,
},
/*
* Data Alignment Setting - needs to be set to get
* left-justified data like all other sensors.
*/
.das = {
.addr = 0x21,
.mask = 0x01,
},
.drdy_irq = {
.int1 = {
.addr = 0x21,
.mask = 0x04,
},
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x21,
.value = BIT(1),
},
.multi_read_bit = true,
.bootime = 2, /* guess */
},
{
.wai = 0x3b,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS331DL_ACCEL_DEV_NAME,
[1] = LIS302DL_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_8bit_channels,
.odr = {
.addr = 0x20,
.mask = 0x80,
.odr_avl = {
{ .hz = 100, .value = 0x00, },
{ .hz = 400, .value = 0x01, },
},
},
.pw = {
.addr = 0x20,
.mask = 0x40,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x20,
.mask = 0x20,
/*
* TODO: check these resulting gain settings, these are
* not in the datsheet
*/
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(18000),
},
[1] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(72000),
},
},
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x04,
.addr_od = 0x22,
.mask_od = 0x40,
},
.int2 = {
.addr = 0x22,
.mask = 0x20,
.addr_od = 0x22,
.mask_od = 0x40,
},
.addr_ihl = 0x22,
.mask_ihl = 0x80,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x21,
.value = BIT(7),
},
.multi_read_bit = false,
.bootime = 2, /* guess */
},
{
.wai = 0x32,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = H3LIS331DL_ACCEL_DEV_NAME,
[1] = IIS328DQ_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
.odr = {
.addr = 0x20,
.mask = 0x18,
.odr_avl = {
{ .hz = 50, .value = 0x00, },
{ .hz = 100, .value = 0x01, },
{ .hz = 400, .value = 0x02, },
{ .hz = 1000, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = 0x20,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_100G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(49000),
},
[1] = {
.num = ST_ACCEL_FS_AVL_200G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(98000),
},
[2] = {
.num = ST_ACCEL_FS_AVL_400G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(195000),
},
},
},
.bdu = {
.addr = 0x23,
.mask = 0x80,
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x02,
},
.int2 = {
.addr = 0x22,
.mask = 0x10,
},
.addr_ihl = 0x22,
.mask_ihl = 0x80,
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
/* No WAI register present */
.sensors_supported = {
[0] = LIS3L02DQ_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
.odr = {
.addr = 0x20,
.mask = 0x30,
.odr_avl = {
{ .hz = 280, .value = 0x00, },
{ .hz = 560, .value = 0x01, },
{ .hz = 1120, .value = 0x02, },
{ .hz = 4480, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xc0,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.gain = IIO_G_TO_M_S_2(488),
},
},
},
/*
* The part has a BDU bit but if set the data is never
* updated so don't set it.
*/
.bdu = {
},
.drdy_irq = {
.int1 = {
.addr = 0x21,
.mask = 0x04,
},
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x21,
.value = BIT(1),
},
.multi_read_bit = false,
.bootime = 2,
},
{
.wai = 0x33,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LNG2DM_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_8bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xf0,
.odr_avl = {
{ .hz = 1, .value = 0x01, },
{ .hz = 10, .value = 0x02, },
{ .hz = 25, .value = 0x03, },
{ .hz = 50, .value = 0x04, },
{ .hz = 100, .value = 0x05, },
{ .hz = 200, .value = 0x06, },
{ .hz = 400, .value = 0x07, },
{ .hz = 1600, .value = 0x08, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xf0,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(15600),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(31200),
},
[2] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(62500),
},
[3] = {
.num = ST_ACCEL_FS_AVL_16G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(187500),
},
},
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x10,
},
.addr_ihl = 0x25,
.mask_ihl = 0x02,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0x44,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS2DW12_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xf0,
.odr_avl = {
{ .hz = 1, .value = 0x01, },
{ .hz = 12, .value = 0x02, },
{ .hz = 25, .value = 0x03, },
{ .hz = 50, .value = 0x04, },
{ .hz = 100, .value = 0x05, },
{ .hz = 200, .value = 0x06, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xf0,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.addr = 0x25,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(976),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(1952),
},
[2] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(3904),
},
[3] = {
.num = ST_ACCEL_FS_AVL_16G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(7808),
},
},
},
.bdu = {
.addr = 0x21,
.mask = 0x08,
},
.drdy_irq = {
.int1 = {
.addr = 0x23,
.mask = 0x01,
.addr_od = 0x22,
.mask_od = 0x20,
},
.int2 = {
.addr = 0x24,
.mask = 0x01,
.addr_od = 0x22,
.mask_od = 0x20,
},
.addr_ihl = 0x22,
.mask_ihl = 0x08,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x01,
},
},
.sim = {
.addr = 0x21,
.value = BIT(0),
},
.multi_read_bit = false,
.bootime = 2,
},
{
.wai = 0x11,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS3DHH_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_16bit_channels,
.odr = {
/* just ODR = 1100Hz available */
.odr_avl = {
{ .hz = 1100, .value = 0x00, },
},
},
.pw = {
.addr = 0x20,
.mask = 0x80,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.gain = IIO_G_TO_M_S_2(76),
},
},
},
.bdu = {
.addr = 0x20,
.mask = 0x01,
},
.drdy_irq = {
.int1 = {
.addr = 0x21,
.mask = 0x80,
.addr_od = 0x23,
.mask_od = 0x04,
},
.int2 = {
.addr = 0x22,
.mask = 0x80,
.addr_od = 0x23,
.mask_od = 0x08,
},
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.multi_read_bit = false,
.bootime = 2,
},
{
.wai = 0x33,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS2DE12_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_8bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xf0,
.odr_avl = {
{ .hz = 1, .value = 0x01, },
{ .hz = 10, .value = 0x02, },
{ .hz = 25, .value = 0x03, },
{ .hz = 50, .value = 0x04, },
{ .hz = 100, .value = 0x05, },
{ .hz = 200, .value = 0x06, },
{ .hz = 400, .value = 0x07, },
{ .hz = 1620, .value = 0x08, },
{ .hz = 5376, .value = 0x09, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xf0,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(15600),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(31200),
},
[2] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(62500),
},
[3] = {
.num = ST_ACCEL_FS_AVL_16G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(187500),
},
},
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x10,
},
.addr_ihl = 0x25,
.mask_ihl = 0x02,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0x41,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LIS2HH12_ACCEL_DEV_NAME,
[1] = LSM303C_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_16bit_channels,
.odr = {
.addr = 0x20,
.mask = 0x70,
.odr_avl = {
{ .hz = 10, .value = 0x01, },
{ .hz = 50, .value = 0x02, },
{ .hz = 100, .value = 0x03, },
{ .hz = 200, .value = 0x04, },
{ .hz = 400, .value = 0x05, },
{ .hz = 800, .value = 0x06, },
},
},
.pw = {
.addr = 0x20,
.mask = 0x70,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(61),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(122),
},
[2] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(244),
},
},
},
.bdu = {
.addr = 0x20,
.mask = 0x08,
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x01,
},
.int2 = {
.addr = 0x25,
.mask = 0x01,
},
.addr_ihl = 0x24,
.mask_ihl = 0x02,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0x49,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LSM9DS0_IMU_DEV_NAME,
[1] = LSM303D_IMU_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_16bit_channels,
.odr = {
.addr = 0x20,
.mask = GENMASK(7, 4),
.odr_avl = {
{ 3, 0x01, },
{ 6, 0x02, },
{ 12, 0x03, },
{ 25, 0x04, },
{ 50, 0x05, },
{ 100, 0x06, },
{ 200, 0x07, },
{ 400, 0x08, },
{ 800, 0x09, },
{ 1600, 0x0a, },
},
},
.pw = {
.addr = 0x20,
.mask = GENMASK(7, 4),
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x21,
.mask = GENMASK(5, 3),
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(61),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(122),
},
[2] = {
.num = ST_ACCEL_FS_AVL_6G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(183),
},
[3] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(244),
},
[4] = {
.num = ST_ACCEL_FS_AVL_16G,
.value = 0x04,
.gain = IIO_G_TO_M_S_2(732),
},
},
},
.bdu = {
.addr = 0x20,
.mask = BIT(3),
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = BIT(2),
},
.int2 = {
.addr = 0x23,
.mask = BIT(3),
},
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = GENMASK(2, 0),
},
},
.sim = {
.addr = 0x21,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
/*
* Not an ST part. Register-compatible with the LIS2DH, even
* though the WAI value is different.
*/
.wai = 0x11,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = SC7A20_ACCEL_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xf0,
.odr_avl = {
{ .hz = 1, .value = 0x01, },
{ .hz = 10, .value = 0x02, },
{ .hz = 25, .value = 0x03, },
{ .hz = 50, .value = 0x04, },
{ .hz = 100, .value = 0x05, },
{ .hz = 200, .value = 0x06, },
{ .hz = 400, .value = 0x07, },
{ .hz = 1600, .value = 0x08, },
},
},
.pw = {
.addr = 0x20,
.mask = 0xf0,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_ACCEL_FS_AVL_2G,
.value = 0x00,
.gain = IIO_G_TO_M_S_2(1000),
},
[1] = {
.num = ST_ACCEL_FS_AVL_4G,
.value = 0x01,
.gain = IIO_G_TO_M_S_2(2000),
},
[2] = {
.num = ST_ACCEL_FS_AVL_8G,
.value = 0x02,
.gain = IIO_G_TO_M_S_2(4000),
},
[3] = {
.num = ST_ACCEL_FS_AVL_16G,
.value = 0x03,
.gain = IIO_G_TO_M_S_2(12000),
},
},
},
.bdu = {
.addr = 0x23,
.mask = 0x80,
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x10,
},
.addr_ihl = 0x25,
.mask_ihl = 0x02,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
};
/* Default accel DRDY is available on INT1 pin */
static const struct st_sensors_platform_data default_accel_pdata = {
.drdy_int_pin = 1,
};
static int st_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *ch, int *val,
int *val2, long mask)
{
int err;
struct st_sensor_data *adata = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
err = st_sensors_read_info_raw(indio_dev, ch, val);
if (err < 0)
goto read_error;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = adata->current_fullscale->gain / 1000000;
*val2 = adata->current_fullscale->gain % 1000000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = adata->odr;
return IIO_VAL_INT;
default:
return -EINVAL;
}
read_error:
return err;
}
static int st_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2, long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE: {
int gain;
gain = val * 1000000 + val2;
return st_sensors_set_fullscale_by_gain(indio_dev, gain);
}
case IIO_CHAN_INFO_SAMP_FREQ:
if (val2)
return -EINVAL;
return st_sensors_set_odr(indio_dev, val);
default:
return -EINVAL;
}
}
static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
static struct attribute *st_accel_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group st_accel_attribute_group = {
.attrs = st_accel_attributes,
};
static const struct iio_info accel_info = {
.attrs = &st_accel_attribute_group,
.read_raw = &st_accel_read_raw,
.write_raw = &st_accel_write_raw,
.debugfs_reg_access = &st_sensors_debugfs_reg_access,
};
#ifdef CONFIG_IIO_TRIGGER
static const struct iio_trigger_ops st_accel_trigger_ops = {
.set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
.validate_device = st_sensors_validate_device,
};
#define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
#else
#define ST_ACCEL_TRIGGER_OPS NULL
#endif
#ifdef CONFIG_ACPI
/* Read ST-specific _ONT orientation data from ACPI and generate an
* appropriate mount matrix.
*/
static int apply_acpi_orientation(struct iio_dev *indio_dev)
{
struct st_sensor_data *adata = iio_priv(indio_dev);
struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
struct acpi_device *adev;
union acpi_object *ont;
union acpi_object *elements;
acpi_status status;
int ret = -EINVAL;
unsigned int val;
int i, j;
int final_ont[3][3] = { { 0 }, };
/* For some reason, ST's _ONT translation does not apply directly
* to the data read from the sensor. Another translation must be
* performed first, as described by the matrix below. Perhaps
* ST required this specific translation for the first product
* where the device was mounted?
*/
const int default_ont[3][3] = {
{ 0, 1, 0 },
{ -1, 0, 0 },
{ 0, 0, -1 },
};
adev = ACPI_COMPANION(indio_dev->dev.parent);
if (!adev)
return -ENXIO;
/* Read _ONT data, which should be a package of 6 integers. */
status = acpi_evaluate_object(adev->handle, "_ONT", NULL, &buffer);
if (status == AE_NOT_FOUND) {
return -ENXIO;
} else if (ACPI_FAILURE(status)) {
dev_warn(&indio_dev->dev, "failed to execute _ONT: %d\n",
status);
return status;
}
ont = buffer.pointer;
if (ont->type != ACPI_TYPE_PACKAGE || ont->package.count != 6)
goto out;
/* The first 3 integers provide axis order information.
* e.g. 0 1 2 would indicate normal X,Y,Z ordering.
* e.g. 1 0 2 indicates that data arrives in order Y,X,Z.
*/
elements = ont->package.elements;
for (i = 0; i < 3; i++) {
if (elements[i].type != ACPI_TYPE_INTEGER)
goto out;
val = elements[i].integer.value;
if (val > 2)
goto out;
/* Avoiding full matrix multiplication, we simply reorder the
* columns in the default_ont matrix according to the
* ordering provided by _ONT.
*/
final_ont[0][i] = default_ont[0][val];
final_ont[1][i] = default_ont[1][val];
final_ont[2][i] = default_ont[2][val];
}
/* The final 3 integers provide sign flip information.
* 0 means no change, 1 means flip.
* e.g. 0 0 1 means that Z data should be sign-flipped.
* This is applied after the axis reordering from above.
*/
elements += 3;
for (i = 0; i < 3; i++) {
if (elements[i].type != ACPI_TYPE_INTEGER)
goto out;
val = elements[i].integer.value;
if (val != 0 && val != 1)
goto out;
if (!val)
continue;
/* Flip the values in the indicated column */
final_ont[0][i] *= -1;
final_ont[1][i] *= -1;
final_ont[2][i] *= -1;
}
/* Convert our integer matrix to a string-based iio_mount_matrix */
for (i = 0; i < 3; i++) {
for (j = 0; j < 3; j++) {
int matrix_val = final_ont[i][j];
char *str_value;
switch (matrix_val) {
case -1:
str_value = "-1";
break;
case 0:
str_value = "0";
break;
case 1:
str_value = "1";
break;
default:
goto out;
}
adata->mount_matrix.rotation[i * 3 + j] = str_value;
}
}
ret = 0;
dev_info(&indio_dev->dev, "computed mount matrix from ACPI\n");
out:
kfree(buffer.pointer);
if (ret)
dev_dbg(&indio_dev->dev,
"failed to apply ACPI orientation data: %d\n", ret);
return ret;
}
#else /* !CONFIG_ACPI */
static int apply_acpi_orientation(struct iio_dev *indio_dev)
{
return -EINVAL;
}
#endif
/*
* st_accel_get_settings() - get sensor settings from device name
* @name: device name buffer reference.
*
* Return: valid reference on success, NULL otherwise.
*/
const struct st_sensor_settings *st_accel_get_settings(const char *name)
{
int index = st_sensors_get_settings_index(name,
st_accel_sensors_settings,
ARRAY_SIZE(st_accel_sensors_settings));
if (index < 0)
return NULL;
return &st_accel_sensors_settings[index];
}
EXPORT_SYMBOL_NS(st_accel_get_settings, IIO_ST_SENSORS);
int st_accel_common_probe(struct iio_dev *indio_dev)
{
struct st_sensor_data *adata = iio_priv(indio_dev);
struct device *parent = indio_dev->dev.parent;
struct st_sensors_platform_data *pdata = dev_get_platdata(parent);
int err;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &accel_info;
err = st_sensors_verify_id(indio_dev);
if (err < 0)
return err;
adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
indio_dev->channels = adata->sensor_settings->ch;
indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
/*
* First try specific ACPI methods to retrieve orientation then try the
* generic function.
*/
err = apply_acpi_orientation(indio_dev);
if (err) {
err = iio_read_mount_matrix(parent, &adata->mount_matrix);
if (err)
return err;
}
adata->current_fullscale = &adata->sensor_settings->fs.fs_avl[0];
adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
if (!pdata)
pdata = (struct st_sensors_platform_data *)&default_accel_pdata;
err = st_sensors_init_sensor(indio_dev, pdata);
if (err < 0)
return err;
err = st_accel_allocate_ring(indio_dev);
if (err < 0)
return err;
if (adata->irq > 0) {
err = st_sensors_allocate_trigger(indio_dev,
ST_ACCEL_TRIGGER_OPS);
if (err < 0)
return err;
}
return devm_iio_device_register(parent, indio_dev);
}
EXPORT_SYMBOL_NS(st_accel_common_probe, IIO_ST_SENSORS);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/accel/st_accel_core.c |
// SPDX-License-Identifier: GPL-2.0
/*
* 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
* - BMI088
*
* Copyright (c) 2018-2021, Topic Embedded Products
*/
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <asm/unaligned.h>
#include "bmi088-accel.h"
#define BMI088_ACCEL_REG_CHIP_ID 0x00
#define BMI088_ACCEL_REG_ERROR 0x02
#define BMI088_ACCEL_REG_INT_STATUS 0x1D
#define BMI088_ACCEL_INT_STATUS_BIT_DRDY BIT(7)
#define BMI088_ACCEL_REG_RESET 0x7E
#define BMI088_ACCEL_RESET_VAL 0xB6
#define BMI088_ACCEL_REG_PWR_CTRL 0x7D
#define BMI088_ACCEL_REG_PWR_CONF 0x7C
#define BMI088_ACCEL_REG_INT_MAP_DATA 0x58
#define BMI088_ACCEL_INT_MAP_DATA_BIT_INT1_DRDY BIT(2)
#define BMI088_ACCEL_INT_MAP_DATA_BIT_INT2_FWM BIT(5)
#define BMI088_ACCEL_REG_INT1_IO_CONF 0x53
#define BMI088_ACCEL_INT1_IO_CONF_BIT_ENABLE_OUT BIT(3)
#define BMI088_ACCEL_INT1_IO_CONF_BIT_LVL BIT(1)
#define BMI088_ACCEL_REG_INT2_IO_CONF 0x54
#define BMI088_ACCEL_INT2_IO_CONF_BIT_ENABLE_OUT BIT(3)
#define BMI088_ACCEL_INT2_IO_CONF_BIT_LVL BIT(1)
#define BMI088_ACCEL_REG_ACC_CONF 0x40
#define BMI088_ACCEL_MODE_ODR_MASK 0x0f
#define BMI088_ACCEL_REG_ACC_RANGE 0x41
#define BMI088_ACCEL_RANGE_3G 0x00
#define BMI088_ACCEL_RANGE_6G 0x01
#define BMI088_ACCEL_RANGE_12G 0x02
#define BMI088_ACCEL_RANGE_24G 0x03
#define BMI088_ACCEL_REG_TEMP 0x22
#define BMI088_ACCEL_REG_TEMP_SHIFT 5
#define BMI088_ACCEL_TEMP_UNIT 125
#define BMI088_ACCEL_TEMP_OFFSET 23000
#define BMI088_ACCEL_REG_XOUT_L 0x12
#define BMI088_ACCEL_AXIS_TO_REG(axis) \
(BMI088_ACCEL_REG_XOUT_L + (axis * 2))
#define BMI088_ACCEL_MAX_STARTUP_TIME_US 1000
#define BMI088_AUTO_SUSPEND_DELAY_MS 2000
#define BMI088_ACCEL_REG_FIFO_STATUS 0x0E
#define BMI088_ACCEL_REG_FIFO_CONFIG0 0x48
#define BMI088_ACCEL_REG_FIFO_CONFIG1 0x49
#define BMI088_ACCEL_REG_FIFO_DATA 0x3F
#define BMI088_ACCEL_FIFO_LENGTH 100
#define BMI088_ACCEL_FIFO_MODE_FIFO 0x40
#define BMI088_ACCEL_FIFO_MODE_STREAM 0x80
#define BMIO088_ACCEL_ACC_RANGE_MSK GENMASK(1, 0)
enum bmi088_accel_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
};
static const int bmi088_sample_freqs[] = {
12, 500000,
25, 0,
50, 0,
100, 0,
200, 0,
400, 0,
800, 0,
1600, 0,
};
/* Available OSR (over sampling rate) sets the 3dB cut-off frequency */
enum bmi088_osr_modes {
BMI088_ACCEL_MODE_OSR_NORMAL = 0xA,
BMI088_ACCEL_MODE_OSR_2 = 0x9,
BMI088_ACCEL_MODE_OSR_4 = 0x8,
};
/* Available ODR (output data rates) in Hz */
enum bmi088_odr_modes {
BMI088_ACCEL_MODE_ODR_12_5 = 0x5,
BMI088_ACCEL_MODE_ODR_25 = 0x6,
BMI088_ACCEL_MODE_ODR_50 = 0x7,
BMI088_ACCEL_MODE_ODR_100 = 0x8,
BMI088_ACCEL_MODE_ODR_200 = 0x9,
BMI088_ACCEL_MODE_ODR_400 = 0xa,
BMI088_ACCEL_MODE_ODR_800 = 0xb,
BMI088_ACCEL_MODE_ODR_1600 = 0xc,
};
struct bmi088_scale_info {
int scale;
u8 reg_range;
};
struct bmi088_accel_chip_info {
const char *name;
u8 chip_id;
const struct iio_chan_spec *channels;
int num_channels;
const int scale_table[4][2];
};
struct bmi088_accel_data {
struct regmap *regmap;
const struct bmi088_accel_chip_info *chip_info;
u8 buffer[2] __aligned(IIO_DMA_MINALIGN); /* shared DMA safe buffer */
};
static const struct regmap_range bmi088_volatile_ranges[] = {
/* All registers below 0x40 are volatile, except the CHIP ID. */
regmap_reg_range(BMI088_ACCEL_REG_ERROR, 0x3f),
/* Mark the RESET as volatile too, it is self-clearing */
regmap_reg_range(BMI088_ACCEL_REG_RESET, BMI088_ACCEL_REG_RESET),
};
static const struct regmap_access_table bmi088_volatile_table = {
.yes_ranges = bmi088_volatile_ranges,
.n_yes_ranges = ARRAY_SIZE(bmi088_volatile_ranges),
};
const struct regmap_config bmi088_regmap_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x7E,
.volatile_table = &bmi088_volatile_table,
.cache_type = REGCACHE_RBTREE,
};
EXPORT_SYMBOL_NS_GPL(bmi088_regmap_conf, IIO_BMI088);
static int bmi088_accel_power_up(struct bmi088_accel_data *data)
{
int ret;
/* Enable accelerometer and temperature sensor */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x4);
if (ret)
return ret;
/* Datasheet recommends to wait at least 5ms before communication */
usleep_range(5000, 6000);
/* Disable suspend mode */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x0);
if (ret)
return ret;
/* Recommended at least 1ms before further communication */
usleep_range(1000, 1200);
return 0;
}
static int bmi088_accel_power_down(struct bmi088_accel_data *data)
{
int ret;
/* Enable suspend mode */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x3);
if (ret)
return ret;
/* Recommended at least 1ms before further communication */
usleep_range(1000, 1200);
/* Disable accelerometer and temperature sensor */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x0);
if (ret)
return ret;
/* Datasheet recommends to wait at least 5ms before communication */
usleep_range(5000, 6000);
return 0;
}
static int bmi088_accel_get_sample_freq(struct bmi088_accel_data *data,
int *val, int *val2)
{
unsigned int value;
int ret;
ret = regmap_read(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
&value);
if (ret)
return ret;
value &= BMI088_ACCEL_MODE_ODR_MASK;
value -= BMI088_ACCEL_MODE_ODR_12_5;
value <<= 1;
if (value >= ARRAY_SIZE(bmi088_sample_freqs) - 1)
return -EINVAL;
*val = bmi088_sample_freqs[value];
*val2 = bmi088_sample_freqs[value + 1];
return IIO_VAL_INT_PLUS_MICRO;
}
static int bmi088_accel_set_sample_freq(struct bmi088_accel_data *data, int val)
{
unsigned int regval;
int index = 0;
while (index < ARRAY_SIZE(bmi088_sample_freqs) &&
bmi088_sample_freqs[index] != val)
index += 2;
if (index >= ARRAY_SIZE(bmi088_sample_freqs))
return -EINVAL;
regval = (index >> 1) + BMI088_ACCEL_MODE_ODR_12_5;
return regmap_update_bits(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
BMI088_ACCEL_MODE_ODR_MASK, regval);
}
static int bmi088_accel_set_scale(struct bmi088_accel_data *data, int val, int val2)
{
unsigned int i;
for (i = 0; i < 4; i++)
if (val == data->chip_info->scale_table[i][0] &&
val2 == data->chip_info->scale_table[i][1])
break;
if (i == 4)
return -EINVAL;
return regmap_write(data->regmap, BMI088_ACCEL_REG_ACC_RANGE, i);
}
static int bmi088_accel_get_temp(struct bmi088_accel_data *data, int *val)
{
int ret;
s16 temp;
ret = regmap_bulk_read(data->regmap, BMI088_ACCEL_REG_TEMP,
&data->buffer, sizeof(__be16));
if (ret)
return ret;
/* data->buffer is cacheline aligned */
temp = be16_to_cpu(*(__be16 *)data->buffer);
*val = temp >> BMI088_ACCEL_REG_TEMP_SHIFT;
return IIO_VAL_INT;
}
static int bmi088_accel_get_axis(struct bmi088_accel_data *data,
struct iio_chan_spec const *chan,
int *val)
{
int ret;
s16 raw_val;
ret = regmap_bulk_read(data->regmap,
BMI088_ACCEL_AXIS_TO_REG(chan->scan_index),
data->buffer, sizeof(__le16));
if (ret)
return ret;
raw_val = le16_to_cpu(*(__le16 *)data->buffer);
*val = raw_val;
return IIO_VAL_INT;
}
static int bmi088_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
int reg;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_get_temp(data, val);
goto out_read_raw_pm_put;
case IIO_ACCEL:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
goto out_read_raw_pm_put;
ret = bmi088_accel_get_axis(data, chan, val);
iio_device_release_direct_mode(indio_dev);
if (!ret)
ret = IIO_VAL_INT;
goto out_read_raw_pm_put;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
/* Offset applies before scale */
*val = BMI088_ACCEL_TEMP_OFFSET/BMI088_ACCEL_TEMP_UNIT;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
/* 0.125 degrees per LSB */
*val = BMI088_ACCEL_TEMP_UNIT;
return IIO_VAL_INT;
case IIO_ACCEL:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = regmap_read(data->regmap,
BMI088_ACCEL_REG_ACC_RANGE, ®);
if (ret)
goto out_read_raw_pm_put;
reg = FIELD_GET(BMIO088_ACCEL_ACC_RANGE_MSK, reg);
*val = data->chip_info->scale_table[reg][0];
*val2 = data->chip_info->scale_table[reg][1];
ret = IIO_VAL_INT_PLUS_MICRO;
goto out_read_raw_pm_put;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_get_sample_freq(data, val, val2);
goto out_read_raw_pm_put;
default:
break;
}
return -EINVAL;
out_read_raw_pm_put:
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
static int bmi088_accel_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*vals = (const int *)data->chip_info->scale_table;
*length = 8;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SAMP_FREQ:
*type = IIO_VAL_INT_PLUS_MICRO;
*vals = bmi088_sample_freqs;
*length = ARRAY_SIZE(bmi088_sample_freqs);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int bmi088_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_set_scale(data, val, val2);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_set_sample_freq(data, val);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
default:
return -EINVAL;
}
}
#define BMI088_ACCEL_CHANNEL(_axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = AXIS_##_axis, \
}
static const struct iio_chan_spec bmi088_accel_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = -1,
},
BMI088_ACCEL_CHANNEL(X),
BMI088_ACCEL_CHANNEL(Y),
BMI088_ACCEL_CHANNEL(Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct bmi088_accel_chip_info bmi088_accel_chip_info_tbl[] = {
[BOSCH_BMI085] = {
.name = "bmi085-accel",
.chip_id = 0x1F,
.channels = bmi088_accel_channels,
.num_channels = ARRAY_SIZE(bmi088_accel_channels),
.scale_table = {{0, 598}, {0, 1196}, {0, 2393}, {0, 4785}},
},
[BOSCH_BMI088] = {
.name = "bmi088-accel",
.chip_id = 0x1E,
.channels = bmi088_accel_channels,
.num_channels = ARRAY_SIZE(bmi088_accel_channels),
.scale_table = {{0, 897}, {0, 1794}, {0, 3589}, {0, 7178}},
},
[BOSCH_BMI090L] = {
.name = "bmi090l-accel",
.chip_id = 0x1A,
.channels = bmi088_accel_channels,
.num_channels = ARRAY_SIZE(bmi088_accel_channels),
.scale_table = {{0, 897}, {0, 1794}, {0, 3589}, {0, 7178}},
},
};
static const struct iio_info bmi088_accel_info = {
.read_raw = bmi088_accel_read_raw,
.write_raw = bmi088_accel_write_raw,
.read_avail = bmi088_accel_read_avail,
};
static const unsigned long bmi088_accel_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0
};
static int bmi088_accel_chip_init(struct bmi088_accel_data *data, enum bmi_device_type type)
{
struct device *dev = regmap_get_device(data->regmap);
int ret, i;
unsigned int val;
if (type >= BOSCH_UNKNOWN)
return -ENODEV;
/* Do a dummy read to enable SPI interface, won't harm I2C */
regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
/*
* Reset chip to get it in a known good state. A delay of 1ms after
* reset is required according to the data sheet
*/
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_RESET,
BMI088_ACCEL_RESET_VAL);
if (ret)
return ret;
usleep_range(1000, 2000);
/* Do a dummy read again after a reset to enable the SPI interface */
regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
/* Read chip ID */
ret = regmap_read(data->regmap, BMI088_ACCEL_REG_CHIP_ID, &val);
if (ret) {
dev_err(dev, "Error: Reading chip id\n");
return ret;
}
/* Validate chip ID */
for (i = 0; i < ARRAY_SIZE(bmi088_accel_chip_info_tbl); i++)
if (bmi088_accel_chip_info_tbl[i].chip_id == val)
break;
if (i == ARRAY_SIZE(bmi088_accel_chip_info_tbl))
data->chip_info = &bmi088_accel_chip_info_tbl[type];
else
data->chip_info = &bmi088_accel_chip_info_tbl[i];
if (i != type)
dev_warn(dev, "unexpected chip id 0x%X\n", val);
return 0;
}
int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap,
int irq, enum bmi_device_type type)
{
struct bmi088_accel_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->regmap = regmap;
ret = bmi088_accel_chip_init(data, type);
if (ret)
return ret;
indio_dev->channels = data->chip_info->channels;
indio_dev->num_channels = data->chip_info->num_channels;
indio_dev->name = data->chip_info->name;
indio_dev->available_scan_masks = bmi088_accel_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bmi088_accel_info;
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_suspended(dev);
pm_runtime_enable(dev);
/* We need ~6ms to startup, so set the delay to 6 seconds */
pm_runtime_set_autosuspend_delay(dev, 6000);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
ret = iio_device_register(indio_dev);
if (ret)
dev_err(dev, "Unable to register iio device\n");
return ret;
}
EXPORT_SYMBOL_NS_GPL(bmi088_accel_core_probe, IIO_BMI088);
void bmi088_accel_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
bmi088_accel_power_down(data);
}
EXPORT_SYMBOL_NS_GPL(bmi088_accel_core_remove, IIO_BMI088);
static int bmi088_accel_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
return bmi088_accel_power_down(data);
}
static int bmi088_accel_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
return bmi088_accel_power_up(data);
}
EXPORT_NS_GPL_RUNTIME_DEV_PM_OPS(bmi088_accel_pm_ops,
bmi088_accel_runtime_suspend,
bmi088_accel_runtime_resume, NULL,
IIO_BMI088);
MODULE_AUTHOR("Niek van Agt <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMI088 accelerometer driver (core)");
| linux-master | drivers/iio/accel/bmi088-accel-core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL345 3-Axis Digital Accelerometer SPI driver
*
* Copyright (c) 2017 Eva Rachel Retuya <[email protected]>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "adxl345.h"
#define ADXL345_MAX_SPI_FREQ_HZ 5000000
static const struct regmap_config adxl345_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
};
static int adxl345_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
/* Bail out if max_speed_hz exceeds 5 MHz */
if (spi->max_speed_hz > ADXL345_MAX_SPI_FREQ_HZ)
return dev_err_probe(&spi->dev, -EINVAL, "SPI CLK, %d Hz exceeds 5 MHz\n",
spi->max_speed_hz);
regmap = devm_regmap_init_spi(spi, &adxl345_spi_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&spi->dev, PTR_ERR(regmap), "Error initializing regmap\n");
return adxl345_core_probe(&spi->dev, regmap);
}
static const struct spi_device_id adxl345_spi_id[] = {
{ "adxl345", ADXL345 },
{ "adxl375", ADXL375 },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl345_spi_id);
static const struct of_device_id adxl345_of_match[] = {
{ .compatible = "adi,adxl345", .data = (const void *)ADXL345 },
{ .compatible = "adi,adxl375", .data = (const void *)ADXL375 },
{ }
};
MODULE_DEVICE_TABLE(of, adxl345_of_match);
static const struct acpi_device_id adxl345_acpi_match[] = {
{ "ADS0345", ADXL345 },
{ }
};
MODULE_DEVICE_TABLE(acpi, adxl345_acpi_match);
static struct spi_driver adxl345_spi_driver = {
.driver = {
.name = "adxl345_spi",
.of_match_table = adxl345_of_match,
.acpi_match_table = adxl345_acpi_match,
},
.probe = adxl345_spi_probe,
.id_table = adxl345_spi_id,
};
module_spi_driver(adxl345_spi_driver);
MODULE_AUTHOR("Eva Rachel Retuya <[email protected]>");
MODULE_DESCRIPTION("ADXL345 3-Axis Digital Accelerometer SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADXL345);
| linux-master | drivers/iio/accel/adxl345_spi.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for older Chrome OS EC accelerometer
*
* Copyright 2017 Google, Inc
*
* This driver uses the memory mapper cros-ec interface to communicate
* with the Chrome OS EC about accelerometer data or older commands.
* Accelerometer access is presented through iio sysfs.
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/cros_ec_sensors_core.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_data/cros_ec_commands.h>
#include <linux/platform_data/cros_ec_proto.h>
#include <linux/platform_device.h>
#define DRV_NAME "cros-ec-accel-legacy"
#define CROS_EC_SENSOR_LEGACY_NUM 2
/*
* Sensor scale hard coded at 10 bits per g, computed as:
* g / (2^10 - 1) = 0.009586168; with g = 9.80665 m.s^-2
*/
#define ACCEL_LEGACY_NSCALE 9586168
/*
* Sensor frequency is hard-coded to 10Hz.
*/
static const int cros_ec_legacy_sample_freq[] = { 10, 0 };
static int cros_ec_accel_legacy_read_cmd(struct iio_dev *indio_dev,
unsigned long scan_mask, s16 *data)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int ret;
unsigned int i;
u8 sensor_num;
/*
* Read all sensor data through a command.
* Save sensor_num, it is assumed to stay.
*/
sensor_num = st->param.info.sensor_num;
st->param.cmd = MOTIONSENSE_CMD_DUMP;
st->param.dump.max_sensor_count = CROS_EC_SENSOR_LEGACY_NUM;
ret = cros_ec_motion_send_host_cmd(st,
sizeof(st->resp->dump) + CROS_EC_SENSOR_LEGACY_NUM *
sizeof(struct ec_response_motion_sensor_data));
st->param.info.sensor_num = sensor_num;
if (ret != 0) {
dev_warn(&indio_dev->dev, "Unable to read sensor data\n");
return ret;
}
for_each_set_bit(i, &scan_mask, indio_dev->masklength) {
*data = st->resp->dump.sensor[sensor_num].data[i] *
st->sign[i];
data++;
}
return 0;
}
static int cros_ec_accel_legacy_read(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
s16 data = 0;
int ret;
int idx = chan->scan_index;
mutex_lock(&st->cmd_lock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = st->read_ec_sensors_data(indio_dev, 1 << idx, &data);
if (ret < 0)
break;
ret = IIO_VAL_INT;
*val = data;
break;
case IIO_CHAN_INFO_SCALE:
WARN_ON(st->type != MOTIONSENSE_TYPE_ACCEL);
*val = 0;
*val2 = ACCEL_LEGACY_NSCALE;
ret = IIO_VAL_INT_PLUS_NANO;
break;
case IIO_CHAN_INFO_CALIBBIAS:
/* Calibration not supported. */
*val = 0;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = cros_ec_legacy_sample_freq[0];
*val2 = cros_ec_legacy_sample_freq[1];
ret = IIO_VAL_INT_PLUS_MICRO;
break;
default:
ret = cros_ec_sensors_core_read(st, chan, val, val2,
mask);
break;
}
mutex_unlock(&st->cmd_lock);
return ret;
}
static int cros_ec_accel_legacy_write(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
/*
* Do nothing but don't return an error code to allow calibration
* script to work.
*/
if (mask == IIO_CHAN_INFO_CALIBBIAS)
return 0;
return -EINVAL;
}
/**
* cros_ec_accel_legacy_read_avail() - get available values
* @indio_dev: pointer to state information for device
* @chan: channel specification structure table
* @vals: list of available values
* @type: type of data returned
* @length: number of data returned in the array
* @mask: specifies which values to be requested
*
* Return: an error code or IIO_AVAIL_LIST
*/
static int cros_ec_accel_legacy_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals,
int *type,
int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*length = ARRAY_SIZE(cros_ec_legacy_sample_freq);
*vals = cros_ec_legacy_sample_freq;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
}
return -EINVAL;
}
static const struct iio_info cros_ec_accel_legacy_info = {
.read_raw = &cros_ec_accel_legacy_read,
.write_raw = &cros_ec_accel_legacy_write,
.read_avail = &cros_ec_accel_legacy_read_avail,
};
/*
* Present the channel using HTML5 standard:
* need to invert X and Y and invert some lid axis.
*/
#define CROS_EC_ACCEL_ROTATE_AXIS(_axis) \
((_axis) == CROS_EC_SENSOR_Z ? CROS_EC_SENSOR_Z : \
((_axis) == CROS_EC_SENSOR_X ? CROS_EC_SENSOR_Y : \
CROS_EC_SENSOR_X))
#define CROS_EC_ACCEL_LEGACY_CHAN(_axis) \
{ \
.type = IIO_ACCEL, \
.channel2 = IIO_MOD_X + (_axis), \
.modified = 1, \
.info_mask_separate = \
BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_all = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_all_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.ext_info = cros_ec_sensors_ext_info, \
.scan_type = { \
.sign = 's', \
.realbits = CROS_EC_SENSOR_BITS, \
.storagebits = CROS_EC_SENSOR_BITS, \
}, \
.scan_index = CROS_EC_ACCEL_ROTATE_AXIS(_axis), \
} \
static const struct iio_chan_spec cros_ec_accel_legacy_channels[] = {
CROS_EC_ACCEL_LEGACY_CHAN(CROS_EC_SENSOR_X),
CROS_EC_ACCEL_LEGACY_CHAN(CROS_EC_SENSOR_Y),
CROS_EC_ACCEL_LEGACY_CHAN(CROS_EC_SENSOR_Z),
IIO_CHAN_SOFT_TIMESTAMP(CROS_EC_SENSOR_MAX_AXIS)
};
static int cros_ec_accel_legacy_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct iio_dev *indio_dev;
struct cros_ec_sensors_core_state *state;
int ret;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*state));
if (!indio_dev)
return -ENOMEM;
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
cros_ec_sensors_capture);
if (ret)
return ret;
indio_dev->info = &cros_ec_accel_legacy_info;
state = iio_priv(indio_dev);
if (state->ec->cmd_readmem != NULL)
state->read_ec_sensors_data = cros_ec_sensors_read_lpc;
else
state->read_ec_sensors_data = cros_ec_accel_legacy_read_cmd;
indio_dev->channels = cros_ec_accel_legacy_channels;
indio_dev->num_channels = ARRAY_SIZE(cros_ec_accel_legacy_channels);
/* The lid sensor needs to be presented inverted. */
if (!strcmp(indio_dev->label, "accel-display")) {
state->sign[CROS_EC_SENSOR_X] = -1;
state->sign[CROS_EC_SENSOR_Z] = -1;
}
return cros_ec_sensors_core_register(dev, indio_dev, NULL);
}
static struct platform_driver cros_ec_accel_platform_driver = {
.driver = {
.name = DRV_NAME,
},
.probe = cros_ec_accel_legacy_probe,
};
module_platform_driver(cros_ec_accel_platform_driver);
MODULE_DESCRIPTION("ChromeOS EC legacy accelerometer driver");
MODULE_AUTHOR("Gwendal Grignou <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" DRV_NAME);
| linux-master | drivers/iio/accel/cros_ec_accel_legacy.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the 3-axis accelerometer Domintech DMARD09.
*
* Copyright (c) 2016, Jelle van der Waa <[email protected]>
*/
#include <asm/unaligned.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#define DMARD09_DRV_NAME "dmard09"
#define DMARD09_REG_CHIPID 0x18
#define DMARD09_REG_STAT 0x0A
#define DMARD09_REG_X 0x0C
#define DMARD09_REG_Y 0x0E
#define DMARD09_REG_Z 0x10
#define DMARD09_CHIPID 0x95
#define DMARD09_BUF_LEN 8
#define DMARD09_AXIS_X 0
#define DMARD09_AXIS_Y 1
#define DMARD09_AXIS_Z 2
#define DMARD09_AXIS_X_OFFSET ((DMARD09_AXIS_X + 1) * 2)
#define DMARD09_AXIS_Y_OFFSET ((DMARD09_AXIS_Y + 1) * 2)
#define DMARD09_AXIS_Z_OFFSET ((DMARD09_AXIS_Z + 1) * 2)
struct dmard09_data {
struct i2c_client *client;
};
#define DMARD09_CHANNEL(_axis, offset) { \
.type = IIO_ACCEL, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.modified = 1, \
.address = offset, \
.channel2 = IIO_MOD_##_axis, \
}
static const struct iio_chan_spec dmard09_channels[] = {
DMARD09_CHANNEL(X, DMARD09_AXIS_X_OFFSET),
DMARD09_CHANNEL(Y, DMARD09_AXIS_Y_OFFSET),
DMARD09_CHANNEL(Z, DMARD09_AXIS_Z_OFFSET),
};
static int dmard09_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct dmard09_data *data = iio_priv(indio_dev);
u8 buf[DMARD09_BUF_LEN];
int ret;
s16 accel;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* Read from the DMAR09_REG_STAT register, since the chip
* caches reads from the individual X, Y, Z registers.
*/
ret = i2c_smbus_read_i2c_block_data(data->client,
DMARD09_REG_STAT,
DMARD09_BUF_LEN, buf);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg %d\n",
DMARD09_REG_STAT);
return ret;
}
accel = get_unaligned_le16(&buf[chan->address]);
/* Remove lower 3 bits and sign extend */
accel <<= 4;
accel >>= 7;
*val = accel;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static const struct iio_info dmard09_info = {
.read_raw = dmard09_read_raw,
};
static int dmard09_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct dmard09_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev) {
dev_err(&client->dev, "iio allocation failed\n");
return -ENOMEM;
}
data = iio_priv(indio_dev);
data->client = client;
ret = i2c_smbus_read_byte_data(data->client, DMARD09_REG_CHIPID);
if (ret < 0) {
dev_err(&client->dev, "Error reading chip id %d\n", ret);
return ret;
}
if (ret != DMARD09_CHIPID) {
dev_err(&client->dev, "Invalid chip id %d\n", ret);
return -ENODEV;
}
i2c_set_clientdata(client, indio_dev);
indio_dev->name = DMARD09_DRV_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = dmard09_channels;
indio_dev->num_channels = ARRAY_SIZE(dmard09_channels);
indio_dev->info = &dmard09_info;
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id dmard09_id[] = {
{ "dmard09", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, dmard09_id);
static struct i2c_driver dmard09_driver = {
.driver = {
.name = DMARD09_DRV_NAME
},
.probe = dmard09_probe,
.id_table = dmard09_id,
};
module_i2c_driver(dmard09_driver);
MODULE_AUTHOR("Jelle van der Waa <[email protected]>");
MODULE_DESCRIPTION("DMARD09 3-axis accelerometer driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/dmard09.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the 3-axis accelerometer Domintech ARD10.
*
* Copyright (c) 2016 Hans de Goede <[email protected]>
* Copyright (c) 2012 Domintech Technology Co., Ltd
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/byteorder/generic.h>
#define DMARD10_REG_ACTR 0x00
#define DMARD10_REG_AFEM 0x0c
#define DMARD10_REG_STADR 0x12
#define DMARD10_REG_STAINT 0x1c
#define DMARD10_REG_MISC2 0x1f
#define DMARD10_REG_PD 0x21
#define DMARD10_MODE_OFF 0x00
#define DMARD10_MODE_STANDBY 0x02
#define DMARD10_MODE_ACTIVE 0x06
#define DMARD10_MODE_READ_OTP 0x12
#define DMARD10_MODE_RESET_DATA_PATH 0x82
/* AFEN set 1, ATM[2:0]=b'000 (normal), EN_Z/Y/X/T=1 */
#define DMARD10_VALUE_AFEM_AFEN_NORMAL 0x8f
/* ODR[3:0]=b'0111 (100Hz), CCK[3:0]=b'0100 (204.8kHZ) */
#define DMARD10_VALUE_CKSEL_ODR_100_204 0x74
/* INTC[6:5]=b'00 */
#define DMARD10_VALUE_INTC 0x00
/* TAP1/TAP2 Average 2 */
#define DMARD10_VALUE_TAPNS_AVE_2 0x11
#define DMARD10_VALUE_STADR 0x55
#define DMARD10_VALUE_STAINT 0xaa
#define DMARD10_VALUE_MISC2_OSCA_EN 0x08
#define DMARD10_VALUE_PD_RST 0x52
/* Offsets into the buffer read in dmard10_read_raw() */
#define DMARD10_X_OFFSET 1
#define DMARD10_Y_OFFSET 2
#define DMARD10_Z_OFFSET 3
/*
* a value of + or -128 corresponds to + or - 1G
* scale = 9.81 / 128 = 0.076640625
*/
static const int dmard10_nscale = 76640625;
#define DMARD10_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec dmard10_channels[] = {
DMARD10_CHANNEL(DMARD10_X_OFFSET, X),
DMARD10_CHANNEL(DMARD10_Y_OFFSET, Y),
DMARD10_CHANNEL(DMARD10_Z_OFFSET, Z),
};
struct dmard10_data {
struct i2c_client *client;
};
/* Init sequence taken from the android driver */
static int dmard10_reset(struct i2c_client *client)
{
unsigned char buffer[7];
int ret;
/* 1. Powerdown reset */
ret = i2c_smbus_write_byte_data(client, DMARD10_REG_PD,
DMARD10_VALUE_PD_RST);
if (ret < 0)
return ret;
/*
* 2. ACTR => Standby mode => Download OTP to parameter reg =>
* Standby mode => Reset data path => Standby mode
*/
buffer[0] = DMARD10_REG_ACTR;
buffer[1] = DMARD10_MODE_STANDBY;
buffer[2] = DMARD10_MODE_READ_OTP;
buffer[3] = DMARD10_MODE_STANDBY;
buffer[4] = DMARD10_MODE_RESET_DATA_PATH;
buffer[5] = DMARD10_MODE_STANDBY;
ret = i2c_master_send(client, buffer, 6);
if (ret < 0)
return ret;
/* 3. OSCA_EN = 1, TSTO = b'000 (INT1 = normal, TEST0 = normal) */
ret = i2c_smbus_write_byte_data(client, DMARD10_REG_MISC2,
DMARD10_VALUE_MISC2_OSCA_EN);
if (ret < 0)
return ret;
/* 4. AFEN = 1 (AFE will powerdown after ADC) */
buffer[0] = DMARD10_REG_AFEM;
buffer[1] = DMARD10_VALUE_AFEM_AFEN_NORMAL;
buffer[2] = DMARD10_VALUE_CKSEL_ODR_100_204;
buffer[3] = DMARD10_VALUE_INTC;
buffer[4] = DMARD10_VALUE_TAPNS_AVE_2;
buffer[5] = 0x00; /* DLYC, no delay timing */
buffer[6] = 0x07; /* INTD=1 push-pull, INTA=1 active high, AUTOT=1 */
ret = i2c_master_send(client, buffer, 7);
if (ret < 0)
return ret;
/* 5. Activation mode */
ret = i2c_smbus_write_byte_data(client, DMARD10_REG_ACTR,
DMARD10_MODE_ACTIVE);
if (ret < 0)
return ret;
return 0;
}
/* Shutdown sequence taken from the android driver */
static int dmard10_shutdown(struct i2c_client *client)
{
unsigned char buffer[3];
buffer[0] = DMARD10_REG_ACTR;
buffer[1] = DMARD10_MODE_STANDBY;
buffer[2] = DMARD10_MODE_OFF;
return i2c_master_send(client, buffer, 3);
}
static int dmard10_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct dmard10_data *data = iio_priv(indio_dev);
__le16 buf[4];
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* Read 8 bytes starting at the REG_STADR register, trying to
* read the individual X, Y, Z registers will always read 0.
*/
ret = i2c_smbus_read_i2c_block_data(data->client,
DMARD10_REG_STADR,
sizeof(buf), (u8 *)buf);
if (ret < 0)
return ret;
ret = le16_to_cpu(buf[chan->address]);
*val = sign_extend32(ret, 12);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = dmard10_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info dmard10_info = {
.read_raw = dmard10_read_raw,
};
static void dmard10_shutdown_cleanup(void *client)
{
dmard10_shutdown(client);
}
static int dmard10_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct dmard10_data *data;
/* These 2 registers have special POR reset values used for id */
ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STADR);
if (ret != DMARD10_VALUE_STADR)
return (ret < 0) ? ret : -ENODEV;
ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STAINT);
if (ret != DMARD10_VALUE_STAINT)
return (ret < 0) ? ret : -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev) {
dev_err(&client->dev, "iio allocation failed!\n");
return -ENOMEM;
}
data = iio_priv(indio_dev);
data->client = client;
indio_dev->info = &dmard10_info;
indio_dev->name = "dmard10";
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = dmard10_channels;
indio_dev->num_channels = ARRAY_SIZE(dmard10_channels);
ret = dmard10_reset(client);
if (ret < 0)
return ret;
ret = devm_add_action_or_reset(&client->dev, dmard10_shutdown_cleanup,
client);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int dmard10_suspend(struct device *dev)
{
return dmard10_shutdown(to_i2c_client(dev));
}
static int dmard10_resume(struct device *dev)
{
return dmard10_reset(to_i2c_client(dev));
}
static DEFINE_SIMPLE_DEV_PM_OPS(dmard10_pm_ops, dmard10_suspend,
dmard10_resume);
static const struct i2c_device_id dmard10_i2c_id[] = {
{"dmard10", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, dmard10_i2c_id);
static struct i2c_driver dmard10_driver = {
.driver = {
.name = "dmard10",
.pm = pm_sleep_ptr(&dmard10_pm_ops),
},
.probe = dmard10_probe,
.id_table = dmard10_i2c_id,
};
module_i2c_driver(dmard10_driver);
MODULE_AUTHOR("Hans de Goede <[email protected]>");
MODULE_DESCRIPTION("Domintech ARD10 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/dmard10.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 Analog Devices, Inc.
* Author: Cosmin Tanislav <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl367.h"
#define ADXL367_I2C_FIFO_DATA 0x42
struct adxl367_i2c_state {
struct regmap *regmap;
};
static bool adxl367_readable_noinc_reg(struct device *dev, unsigned int reg)
{
return reg == ADXL367_I2C_FIFO_DATA;
}
static int adxl367_i2c_read_fifo(void *context, __be16 *fifo_buf,
unsigned int fifo_entries)
{
struct adxl367_i2c_state *st = context;
return regmap_noinc_read(st->regmap, ADXL367_I2C_FIFO_DATA, fifo_buf,
fifo_entries * sizeof(*fifo_buf));
}
static const struct regmap_config adxl367_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.readable_noinc_reg = adxl367_readable_noinc_reg,
};
static const struct adxl367_ops adxl367_i2c_ops = {
.read_fifo = adxl367_i2c_read_fifo,
};
static int adxl367_i2c_probe(struct i2c_client *client)
{
struct adxl367_i2c_state *st;
struct regmap *regmap;
st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
regmap = devm_regmap_init_i2c(client, &adxl367_i2c_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
st->regmap = regmap;
return adxl367_probe(&client->dev, &adxl367_i2c_ops, st, regmap,
client->irq);
}
static const struct i2c_device_id adxl367_i2c_id[] = {
{ "adxl367", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, adxl367_i2c_id);
static const struct of_device_id adxl367_of_match[] = {
{ .compatible = "adi,adxl367" },
{ },
};
MODULE_DEVICE_TABLE(of, adxl367_of_match);
static struct i2c_driver adxl367_i2c_driver = {
.driver = {
.name = "adxl367_i2c",
.of_match_table = adxl367_of_match,
},
.probe = adxl367_i2c_probe,
.id_table = adxl367_i2c_id,
};
module_i2c_driver(adxl367_i2c_driver);
MODULE_IMPORT_NS(IIO_ADXL367);
MODULE_AUTHOR("Cosmin Tanislav <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADXL367 3-axis accelerometer I2C driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/adxl367_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include "kxsd9.h"
static int kxsd9_spi_probe(struct spi_device *spi)
{
static const struct regmap_config config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x0e,
};
struct regmap *regmap;
spi->mode = SPI_MODE_0;
regmap = devm_regmap_init_spi(spi, &config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
__func__, PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return kxsd9_common_probe(&spi->dev,
regmap,
spi_get_device_id(spi)->name);
}
static void kxsd9_spi_remove(struct spi_device *spi)
{
kxsd9_common_remove(&spi->dev);
}
static const struct spi_device_id kxsd9_spi_id[] = {
{"kxsd9", 0},
{ },
};
MODULE_DEVICE_TABLE(spi, kxsd9_spi_id);
static const struct of_device_id kxsd9_of_match[] = {
{ .compatible = "kionix,kxsd9" },
{ }
};
MODULE_DEVICE_TABLE(of, kxsd9_of_match);
static struct spi_driver kxsd9_spi_driver = {
.driver = {
.name = "kxsd9",
.pm = pm_ptr(&kxsd9_dev_pm_ops),
.of_match_table = kxsd9_of_match,
},
.probe = kxsd9_spi_probe,
.remove = kxsd9_spi_remove,
.id_table = kxsd9_spi_id,
};
module_spi_driver(kxsd9_spi_driver);
MODULE_AUTHOR("Jonathan Cameron <[email protected]>");
MODULE_DESCRIPTION("Kionix KXSD9 SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_KXSD9);
| linux-master | drivers/iio/accel/kxsd9-spi.c |
// SPDX-License-Identifier: GPL-2.0
/*
* MEMSensing digital 3-Axis accelerometer
*
* MSA311 is a tri-axial, low-g accelerometer with I2C digital output for
* sensitivity consumer applications. It has dynamic user-selectable full
* scales range of +-2g/+-4g/+-8g/+-16g and allows acceleration measurements
* with output data rates from 1Hz to 1000Hz.
*
* MSA311 is available in an ultra small (2mm x 2mm, height 0.95mm) LGA package
* and is guaranteed to operate over -40C to +85C.
*
* This driver supports following MSA311 features:
* - IIO interface
* - Different power modes: NORMAL, SUSPEND
* - ODR (Output Data Rate) selection
* - Scale selection
* - IIO triggered buffer
* - NEW_DATA interrupt + trigger
*
* Below features to be done:
* - Motion Events: ACTIVE, TAP, ORIENT, FREEFALL
* - Low Power mode
*
* Copyright (c) 2022, SberDevices. All Rights Reserved.
*
* Author: Dmitry Rokosov <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/string_helpers.h>
#include <linux/units.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#define MSA311_SOFT_RESET_REG 0x00
#define MSA311_PARTID_REG 0x01
#define MSA311_ACC_X_REG 0x02
#define MSA311_ACC_Y_REG 0x04
#define MSA311_ACC_Z_REG 0x06
#define MSA311_MOTION_INT_REG 0x09
#define MSA311_DATA_INT_REG 0x0A
#define MSA311_TAP_ACTIVE_STS_REG 0x0B
#define MSA311_ORIENT_STS_REG 0x0C
#define MSA311_RANGE_REG 0x0F
#define MSA311_ODR_REG 0x10
#define MSA311_PWR_MODE_REG 0x11
#define MSA311_SWAP_POLARITY_REG 0x12
#define MSA311_INT_SET_0_REG 0x16
#define MSA311_INT_SET_1_REG 0x17
#define MSA311_INT_MAP_0_REG 0x19
#define MSA311_INT_MAP_1_REG 0x1A
#define MSA311_INT_CONFIG_REG 0x20
#define MSA311_INT_LATCH_REG 0x21
#define MSA311_FREEFALL_DUR_REG 0x22
#define MSA311_FREEFALL_TH_REG 0x23
#define MSA311_FREEFALL_HY_REG 0x24
#define MSA311_ACTIVE_DUR_REG 0x27
#define MSA311_ACTIVE_TH_REG 0x28
#define MSA311_TAP_DUR_REG 0x2A
#define MSA311_TAP_TH_REG 0x2B
#define MSA311_ORIENT_HY_REG 0x2C
#define MSA311_Z_BLOCK_REG 0x2D
#define MSA311_OFFSET_X_REG 0x38
#define MSA311_OFFSET_Y_REG 0x39
#define MSA311_OFFSET_Z_REG 0x3A
enum msa311_fields {
/* Soft_Reset */
F_SOFT_RESET_I2C, F_SOFT_RESET_SPI,
/* Motion_Interrupt */
F_ORIENT_INT, F_S_TAP_INT, F_D_TAP_INT, F_ACTIVE_INT, F_FREEFALL_INT,
/* Data_Interrupt */
F_NEW_DATA_INT,
/* Tap_Active_Status */
F_TAP_SIGN, F_TAP_FIRST_X, F_TAP_FIRST_Y, F_TAP_FIRST_Z, F_ACTV_SIGN,
F_ACTV_FIRST_X, F_ACTV_FIRST_Y, F_ACTV_FIRST_Z,
/* Orientation_Status */
F_ORIENT_Z, F_ORIENT_X_Y,
/* Range */
F_FS,
/* ODR */
F_X_AXIS_DIS, F_Y_AXIS_DIS, F_Z_AXIS_DIS, F_ODR,
/* Power Mode/Bandwidth */
F_PWR_MODE, F_LOW_POWER_BW,
/* Swap_Polarity */
F_X_POLARITY, F_Y_POLARITY, F_Z_POLARITY, F_X_Y_SWAP,
/* Int_Set_0 */
F_ORIENT_INT_EN, F_S_TAP_INT_EN, F_D_TAP_INT_EN, F_ACTIVE_INT_EN_Z,
F_ACTIVE_INT_EN_Y, F_ACTIVE_INT_EN_X,
/* Int_Set_1 */
F_NEW_DATA_INT_EN, F_FREEFALL_INT_EN,
/* Int_Map_0 */
F_INT1_ORIENT, F_INT1_S_TAP, F_INT1_D_TAP, F_INT1_ACTIVE,
F_INT1_FREEFALL,
/* Int_Map_1 */
F_INT1_NEW_DATA,
/* Int_Config */
F_INT1_OD, F_INT1_LVL,
/* Int_Latch */
F_RESET_INT, F_LATCH_INT,
/* Freefall_Hy */
F_FREEFALL_MODE, F_FREEFALL_HY,
/* Active_Dur */
F_ACTIVE_DUR,
/* Tap_Dur */
F_TAP_QUIET, F_TAP_SHOCK, F_TAP_DUR,
/* Tap_Th */
F_TAP_TH,
/* Orient_Hy */
F_ORIENT_HYST, F_ORIENT_BLOCKING, F_ORIENT_MODE,
/* Z_Block */
F_Z_BLOCKING,
/* End of register map */
F_MAX_FIELDS,
};
static const struct reg_field msa311_reg_fields[] = {
/* Soft_Reset */
[F_SOFT_RESET_I2C] = REG_FIELD(MSA311_SOFT_RESET_REG, 2, 2),
[F_SOFT_RESET_SPI] = REG_FIELD(MSA311_SOFT_RESET_REG, 5, 5),
/* Motion_Interrupt */
[F_ORIENT_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 6, 6),
[F_S_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 5, 5),
[F_D_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 4, 4),
[F_ACTIVE_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 2, 2),
[F_FREEFALL_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 0, 0),
/* Data_Interrupt */
[F_NEW_DATA_INT] = REG_FIELD(MSA311_DATA_INT_REG, 0, 0),
/* Tap_Active_Status */
[F_TAP_SIGN] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 7, 7),
[F_TAP_FIRST_X] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 6, 6),
[F_TAP_FIRST_Y] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 5, 5),
[F_TAP_FIRST_Z] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 4, 4),
[F_ACTV_SIGN] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 3, 3),
[F_ACTV_FIRST_X] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 2, 2),
[F_ACTV_FIRST_Y] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 1, 1),
[F_ACTV_FIRST_Z] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 0, 0),
/* Orientation_Status */
[F_ORIENT_Z] = REG_FIELD(MSA311_ORIENT_STS_REG, 6, 6),
[F_ORIENT_X_Y] = REG_FIELD(MSA311_ORIENT_STS_REG, 4, 5),
/* Range */
[F_FS] = REG_FIELD(MSA311_RANGE_REG, 0, 1),
/* ODR */
[F_X_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 7, 7),
[F_Y_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 6, 6),
[F_Z_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 5, 5),
[F_ODR] = REG_FIELD(MSA311_ODR_REG, 0, 3),
/* Power Mode/Bandwidth */
[F_PWR_MODE] = REG_FIELD(MSA311_PWR_MODE_REG, 6, 7),
[F_LOW_POWER_BW] = REG_FIELD(MSA311_PWR_MODE_REG, 1, 4),
/* Swap_Polarity */
[F_X_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 3, 3),
[F_Y_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 2, 2),
[F_Z_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 1, 1),
[F_X_Y_SWAP] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 0, 0),
/* Int_Set_0 */
[F_ORIENT_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 6, 6),
[F_S_TAP_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 5, 5),
[F_D_TAP_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 4, 4),
[F_ACTIVE_INT_EN_Z] = REG_FIELD(MSA311_INT_SET_0_REG, 2, 2),
[F_ACTIVE_INT_EN_Y] = REG_FIELD(MSA311_INT_SET_0_REG, 1, 1),
[F_ACTIVE_INT_EN_X] = REG_FIELD(MSA311_INT_SET_0_REG, 0, 0),
/* Int_Set_1 */
[F_NEW_DATA_INT_EN] = REG_FIELD(MSA311_INT_SET_1_REG, 4, 4),
[F_FREEFALL_INT_EN] = REG_FIELD(MSA311_INT_SET_1_REG, 3, 3),
/* Int_Map_0 */
[F_INT1_ORIENT] = REG_FIELD(MSA311_INT_MAP_0_REG, 6, 6),
[F_INT1_S_TAP] = REG_FIELD(MSA311_INT_MAP_0_REG, 5, 5),
[F_INT1_D_TAP] = REG_FIELD(MSA311_INT_MAP_0_REG, 4, 4),
[F_INT1_ACTIVE] = REG_FIELD(MSA311_INT_MAP_0_REG, 2, 2),
[F_INT1_FREEFALL] = REG_FIELD(MSA311_INT_MAP_0_REG, 0, 0),
/* Int_Map_1 */
[F_INT1_NEW_DATA] = REG_FIELD(MSA311_INT_MAP_1_REG, 0, 0),
/* Int_Config */
[F_INT1_OD] = REG_FIELD(MSA311_INT_CONFIG_REG, 1, 1),
[F_INT1_LVL] = REG_FIELD(MSA311_INT_CONFIG_REG, 0, 0),
/* Int_Latch */
[F_RESET_INT] = REG_FIELD(MSA311_INT_LATCH_REG, 7, 7),
[F_LATCH_INT] = REG_FIELD(MSA311_INT_LATCH_REG, 0, 3),
/* Freefall_Hy */
[F_FREEFALL_MODE] = REG_FIELD(MSA311_FREEFALL_HY_REG, 2, 2),
[F_FREEFALL_HY] = REG_FIELD(MSA311_FREEFALL_HY_REG, 0, 1),
/* Active_Dur */
[F_ACTIVE_DUR] = REG_FIELD(MSA311_ACTIVE_DUR_REG, 0, 1),
/* Tap_Dur */
[F_TAP_QUIET] = REG_FIELD(MSA311_TAP_DUR_REG, 7, 7),
[F_TAP_SHOCK] = REG_FIELD(MSA311_TAP_DUR_REG, 6, 6),
[F_TAP_DUR] = REG_FIELD(MSA311_TAP_DUR_REG, 0, 2),
/* Tap_Th */
[F_TAP_TH] = REG_FIELD(MSA311_TAP_TH_REG, 0, 4),
/* Orient_Hy */
[F_ORIENT_HYST] = REG_FIELD(MSA311_ORIENT_HY_REG, 4, 6),
[F_ORIENT_BLOCKING] = REG_FIELD(MSA311_ORIENT_HY_REG, 2, 3),
[F_ORIENT_MODE] = REG_FIELD(MSA311_ORIENT_HY_REG, 0, 1),
/* Z_Block */
[F_Z_BLOCKING] = REG_FIELD(MSA311_Z_BLOCK_REG, 0, 3),
};
#define MSA311_WHO_AM_I 0x13
/*
* Possible Full Scale ranges
*
* Axis data is 12-bit signed value, so
*
* fs0 = (2 + 2) * 9.81 / (2^11) = 0.009580
* fs1 = (4 + 4) * 9.81 / (2^11) = 0.019160
* fs2 = (8 + 8) * 9.81 / (2^11) = 0.038320
* fs3 = (16 + 16) * 9.81 / (2^11) = 0.076641
*/
enum {
MSA311_FS_2G,
MSA311_FS_4G,
MSA311_FS_8G,
MSA311_FS_16G,
};
struct iio_decimal_fract {
int integral;
int microfract;
};
static const struct iio_decimal_fract msa311_fs_table[] = {
{0, 9580}, {0, 19160}, {0, 38320}, {0, 76641},
};
/* Possible Output Data Rate values */
enum {
MSA311_ODR_1_HZ,
MSA311_ODR_1_95_HZ,
MSA311_ODR_3_9_HZ,
MSA311_ODR_7_81_HZ,
MSA311_ODR_15_63_HZ,
MSA311_ODR_31_25_HZ,
MSA311_ODR_62_5_HZ,
MSA311_ODR_125_HZ,
MSA311_ODR_250_HZ,
MSA311_ODR_500_HZ,
MSA311_ODR_1000_HZ,
};
static const struct iio_decimal_fract msa311_odr_table[] = {
{1, 0}, {1, 950000}, {3, 900000}, {7, 810000}, {15, 630000},
{31, 250000}, {62, 500000}, {125, 0}, {250, 0}, {500, 0}, {1000, 0},
};
/* All supported power modes */
#define MSA311_PWR_MODE_NORMAL 0b00
#define MSA311_PWR_MODE_LOW 0b01
#define MSA311_PWR_MODE_UNKNOWN 0b10
#define MSA311_PWR_MODE_SUSPEND 0b11
static const char * const msa311_pwr_modes[] = {
[MSA311_PWR_MODE_NORMAL] = "normal",
[MSA311_PWR_MODE_LOW] = "low",
[MSA311_PWR_MODE_UNKNOWN] = "unknown",
[MSA311_PWR_MODE_SUSPEND] = "suspend",
};
/* Autosuspend delay */
#define MSA311_PWR_SLEEP_DELAY_MS 2000
/* Possible INT1 types and levels */
enum {
MSA311_INT1_OD_PUSH_PULL,
MSA311_INT1_OD_OPEN_DRAIN,
};
enum {
MSA311_INT1_LVL_LOW,
MSA311_INT1_LVL_HIGH,
};
/* Latch INT modes */
#define MSA311_LATCH_INT_NOT_LATCHED 0b0000
#define MSA311_LATCH_INT_250MS 0b0001
#define MSA311_LATCH_INT_500MS 0b0010
#define MSA311_LATCH_INT_1S 0b0011
#define MSA311_LATCH_INT_2S 0b0100
#define MSA311_LATCH_INT_4S 0b0101
#define MSA311_LATCH_INT_8S 0b0110
#define MSA311_LATCH_INT_1MS 0b1010
#define MSA311_LATCH_INT_2MS 0b1011
#define MSA311_LATCH_INT_25MS 0b1100
#define MSA311_LATCH_INT_50MS 0b1101
#define MSA311_LATCH_INT_100MS 0b1110
#define MSA311_LATCH_INT_LATCHED 0b0111
static const struct regmap_range msa311_readonly_registers[] = {
regmap_reg_range(MSA311_PARTID_REG, MSA311_ORIENT_STS_REG),
};
static const struct regmap_access_table msa311_writeable_table = {
.no_ranges = msa311_readonly_registers,
.n_no_ranges = ARRAY_SIZE(msa311_readonly_registers),
};
static const struct regmap_range msa311_writeonly_registers[] = {
regmap_reg_range(MSA311_SOFT_RESET_REG, MSA311_SOFT_RESET_REG),
};
static const struct regmap_access_table msa311_readable_table = {
.no_ranges = msa311_writeonly_registers,
.n_no_ranges = ARRAY_SIZE(msa311_writeonly_registers),
};
static const struct regmap_range msa311_volatile_registers[] = {
regmap_reg_range(MSA311_ACC_X_REG, MSA311_ORIENT_STS_REG),
};
static const struct regmap_access_table msa311_volatile_table = {
.yes_ranges = msa311_volatile_registers,
.n_yes_ranges = ARRAY_SIZE(msa311_volatile_registers),
};
static const struct regmap_config msa311_regmap_config = {
.name = "msa311",
.reg_bits = 8,
.val_bits = 8,
.max_register = MSA311_OFFSET_Z_REG,
.wr_table = &msa311_writeable_table,
.rd_table = &msa311_readable_table,
.volatile_table = &msa311_volatile_table,
.cache_type = REGCACHE_RBTREE,
};
#define MSA311_GENMASK(field) ({ \
typeof(&(msa311_reg_fields)[0]) _field; \
_field = &msa311_reg_fields[(field)]; \
GENMASK(_field->msb, _field->lsb); \
})
/**
* struct msa311_priv - MSA311 internal private state
* @regs: Underlying I2C bus adapter used to abstract slave
* register accesses
* @fields: Abstract objects for each registers fields access
* @dev: Device handler associated with appropriate bus client
* @lock: Protects msa311 device state between setup and data access routines
* (power transitions, samp_freq/scale tune, retrieving axes data, etc)
* @chip_name: Chip name in the format "msa311-%02x" % partid
* @new_data_trig: Optional NEW_DATA interrupt driven trigger used
* to notify external consumers a new sample is ready
*/
struct msa311_priv {
struct regmap *regs;
struct regmap_field *fields[F_MAX_FIELDS];
struct device *dev;
struct mutex lock;
char *chip_name;
struct iio_trigger *new_data_trig;
};
enum msa311_si {
MSA311_SI_X,
MSA311_SI_Y,
MSA311_SI_Z,
MSA311_SI_TIMESTAMP,
};
#define MSA311_ACCEL_CHANNEL(axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = MSA311_SI_##axis, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_LE, \
}, \
.datasheet_name = "ACC_"#axis, \
}
static const struct iio_chan_spec msa311_channels[] = {
MSA311_ACCEL_CHANNEL(X),
MSA311_ACCEL_CHANNEL(Y),
MSA311_ACCEL_CHANNEL(Z),
IIO_CHAN_SOFT_TIMESTAMP(MSA311_SI_TIMESTAMP),
};
/**
* msa311_get_odr() - Read Output Data Rate (ODR) value from MSA311 accel
* @msa311: MSA311 internal private state
* @odr: output ODR value
*
* This function should be called under msa311->lock.
*
* Return: 0 on success, -ERRNO in other failures
*/
static int msa311_get_odr(struct msa311_priv *msa311, unsigned int *odr)
{
int err;
err = regmap_field_read(msa311->fields[F_ODR], odr);
if (err)
return err;
/*
* Filter the same 1000Hz ODR register values based on datasheet info.
* ODR can be equal to 1010-1111 for 1000Hz, but function returns 1010
* all the time.
*/
if (*odr > MSA311_ODR_1000_HZ)
*odr = MSA311_ODR_1000_HZ;
return 0;
}
/**
* msa311_set_odr() - Setup Output Data Rate (ODR) value for MSA311 accel
* @msa311: MSA311 internal private state
* @odr: requested ODR value
*
* This function should be called under msa311->lock. Possible ODR values:
* - 1Hz (not available in normal mode)
* - 1.95Hz (not available in normal mode)
* - 3.9Hz
* - 7.81Hz
* - 15.63Hz
* - 31.25Hz
* - 62.5Hz
* - 125Hz
* - 250Hz
* - 500Hz
* - 1000Hz
*
* Return: 0 on success, -EINVAL for bad ODR value in the certain power mode,
* -ERRNO in other failures
*/
static int msa311_set_odr(struct msa311_priv *msa311, unsigned int odr)
{
struct device *dev = msa311->dev;
unsigned int pwr_mode;
bool good_odr;
int err;
err = regmap_field_read(msa311->fields[F_PWR_MODE], &pwr_mode);
if (err)
return err;
/* Filter bad ODR values */
if (pwr_mode == MSA311_PWR_MODE_NORMAL)
good_odr = (odr > MSA311_ODR_1_95_HZ);
else
good_odr = false;
if (!good_odr) {
dev_err(dev,
"can't set odr %u.%06uHz, not available in %s mode\n",
msa311_odr_table[odr].integral,
msa311_odr_table[odr].microfract,
msa311_pwr_modes[pwr_mode]);
return -EINVAL;
}
return regmap_field_write(msa311->fields[F_ODR], odr);
}
/**
* msa311_wait_for_next_data() - Wait next accel data available after resume
* @msa311: MSA311 internal private state
*
* Return: 0 on success, -EINTR if msleep() was interrupted,
* -ERRNO in other failures
*/
static int msa311_wait_for_next_data(struct msa311_priv *msa311)
{
static const unsigned int unintr_thresh_ms = 20;
struct device *dev = msa311->dev;
unsigned long freq_uhz;
unsigned long wait_ms;
unsigned int odr;
int err;
err = msa311_get_odr(msa311, &odr);
if (err) {
dev_err(dev, "can't get actual frequency (%pe)\n",
ERR_PTR(err));
return err;
}
/*
* After msa311 resuming is done, we need to wait for data
* to be refreshed by accel logic.
* A certain timeout is calculated based on the current ODR value.
* If requested timeout isn't so long (let's assume 20ms),
* we can wait for next data in uninterruptible sleep.
*/
freq_uhz = msa311_odr_table[odr].integral * MICROHZ_PER_HZ +
msa311_odr_table[odr].microfract;
wait_ms = (MICROHZ_PER_HZ / freq_uhz) * MSEC_PER_SEC;
if (wait_ms < unintr_thresh_ms)
usleep_range(wait_ms * USEC_PER_MSEC,
unintr_thresh_ms * USEC_PER_MSEC);
else if (msleep_interruptible(wait_ms))
return -EINTR;
return 0;
}
/**
* msa311_set_pwr_mode() - Install certain MSA311 power mode
* @msa311: MSA311 internal private state
* @mode: Power mode can be equal to NORMAL or SUSPEND
*
* This function should be called under msa311->lock.
*
* Return: 0 on success, -ERRNO on failure
*/
static int msa311_set_pwr_mode(struct msa311_priv *msa311, unsigned int mode)
{
struct device *dev = msa311->dev;
unsigned int prev_mode;
int err;
if (mode >= ARRAY_SIZE(msa311_pwr_modes))
return -EINVAL;
dev_dbg(dev, "transition to %s mode\n", msa311_pwr_modes[mode]);
err = regmap_field_read(msa311->fields[F_PWR_MODE], &prev_mode);
if (err)
return err;
err = regmap_field_write(msa311->fields[F_PWR_MODE], mode);
if (err)
return err;
/* Wait actual data if we wake up */
if (prev_mode == MSA311_PWR_MODE_SUSPEND &&
mode == MSA311_PWR_MODE_NORMAL)
return msa311_wait_for_next_data(msa311);
return 0;
}
/**
* msa311_get_axis() - Read MSA311 accel data for certain IIO channel axis spec
* @msa311: MSA311 internal private state
* @chan: IIO channel specification
* @axis: Output accel axis data for requested IIO channel spec
*
* This function should be called under msa311->lock.
*
* Return: 0 on success, -EINVAL for unknown IIO channel specification,
* -ERRNO in other failures
*/
static int msa311_get_axis(struct msa311_priv *msa311,
const struct iio_chan_spec * const chan,
__le16 *axis)
{
struct device *dev = msa311->dev;
unsigned int axis_reg;
if (chan->scan_index < MSA311_SI_X || chan->scan_index > MSA311_SI_Z) {
dev_err(dev, "invalid scan_index value [%d]\n",
chan->scan_index);
return -EINVAL;
}
/* Axes data layout has 2 byte gap for each axis starting from X axis */
axis_reg = MSA311_ACC_X_REG + (chan->scan_index << 1);
return regmap_bulk_read(msa311->regs, axis_reg, axis, sizeof(*axis));
}
static int msa311_read_raw_data(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
__le16 axis;
int err;
err = pm_runtime_resume_and_get(dev);
if (err)
return err;
err = iio_device_claim_direct_mode(indio_dev);
if (err)
return err;
mutex_lock(&msa311->lock);
err = msa311_get_axis(msa311, chan, &axis);
mutex_unlock(&msa311->lock);
iio_device_release_direct_mode(indio_dev);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
if (err) {
dev_err(dev, "can't get axis %s (%pe)\n",
chan->datasheet_name, ERR_PTR(err));
return err;
}
/*
* Axis data format is:
* ACC_X = (ACC_X_MSB[7:0] << 4) | ACC_X_LSB[7:4]
*/
*val = sign_extend32(le16_to_cpu(axis) >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
}
static int msa311_read_scale(struct iio_dev *indio_dev, int *val, int *val2)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
unsigned int fs;
int err;
mutex_lock(&msa311->lock);
err = regmap_field_read(msa311->fields[F_FS], &fs);
mutex_unlock(&msa311->lock);
if (err) {
dev_err(dev, "can't get actual scale (%pe)\n", ERR_PTR(err));
return err;
}
*val = msa311_fs_table[fs].integral;
*val2 = msa311_fs_table[fs].microfract;
return IIO_VAL_INT_PLUS_MICRO;
}
static int msa311_read_samp_freq(struct iio_dev *indio_dev,
int *val, int *val2)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
unsigned int odr;
int err;
mutex_lock(&msa311->lock);
err = msa311_get_odr(msa311, &odr);
mutex_unlock(&msa311->lock);
if (err) {
dev_err(dev, "can't get actual frequency (%pe)\n",
ERR_PTR(err));
return err;
}
*val = msa311_odr_table[odr].integral;
*val2 = msa311_odr_table[odr].microfract;
return IIO_VAL_INT_PLUS_MICRO;
}
static int msa311_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
switch (mask) {
case IIO_CHAN_INFO_RAW:
return msa311_read_raw_data(indio_dev, chan, val, val2);
case IIO_CHAN_INFO_SCALE:
return msa311_read_scale(indio_dev, val, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
return msa311_read_samp_freq(indio_dev, val, val2);
default:
return -EINVAL;
}
}
static int msa311_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type,
int *length, long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = (int *)msa311_odr_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* ODR value has 2 ints (integer and fractional parts) */
*length = ARRAY_SIZE(msa311_odr_table) * 2;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SCALE:
*vals = (int *)msa311_fs_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* FS value has 2 ints (integer and fractional parts) */
*length = ARRAY_SIZE(msa311_fs_table) * 2;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int msa311_write_scale(struct iio_dev *indio_dev, int val, int val2)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
unsigned int fs;
int err;
/* We do not have fs >= 1, so skip such values */
if (val)
return 0;
err = pm_runtime_resume_and_get(dev);
if (err)
return err;
err = -EINVAL;
for (fs = 0; fs < ARRAY_SIZE(msa311_fs_table); fs++)
/* Do not check msa311_fs_table[fs].integral, it's always 0 */
if (val2 == msa311_fs_table[fs].microfract) {
mutex_lock(&msa311->lock);
err = regmap_field_write(msa311->fields[F_FS], fs);
mutex_unlock(&msa311->lock);
break;
}
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
if (err)
dev_err(dev, "can't update scale (%pe)\n", ERR_PTR(err));
return err;
}
static int msa311_write_samp_freq(struct iio_dev *indio_dev, int val, int val2)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
unsigned int odr;
int err;
err = pm_runtime_resume_and_get(dev);
if (err)
return err;
/*
* Sampling frequency changing is prohibited when buffer mode is
* enabled, because sometimes MSA311 chip returns outliers during
* frequency values growing up in the read operation moment.
*/
err = iio_device_claim_direct_mode(indio_dev);
if (err)
return err;
err = -EINVAL;
for (odr = 0; odr < ARRAY_SIZE(msa311_odr_table); odr++)
if (val == msa311_odr_table[odr].integral &&
val2 == msa311_odr_table[odr].microfract) {
mutex_lock(&msa311->lock);
err = msa311_set_odr(msa311, odr);
mutex_unlock(&msa311->lock);
break;
}
iio_device_release_direct_mode(indio_dev);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
if (err)
dev_err(dev, "can't update frequency (%pe)\n", ERR_PTR(err));
return err;
}
static int msa311_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
return msa311_write_scale(indio_dev, val, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
return msa311_write_samp_freq(indio_dev, val, val2);
default:
return -EINVAL;
}
}
static int msa311_debugfs_reg_access(struct iio_dev *indio_dev,
unsigned int reg, unsigned int writeval,
unsigned int *readval)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
int err;
if (reg > regmap_get_max_register(msa311->regs))
return -EINVAL;
err = pm_runtime_resume_and_get(dev);
if (err)
return err;
mutex_lock(&msa311->lock);
if (readval)
err = regmap_read(msa311->regs, reg, readval);
else
err = regmap_write(msa311->regs, reg, writeval);
mutex_unlock(&msa311->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
if (err)
dev_err(dev, "can't %s register %u from debugfs (%pe)\n",
str_read_write(readval), reg, ERR_PTR(err));
return err;
}
static int msa311_buffer_preenable(struct iio_dev *indio_dev)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
return pm_runtime_resume_and_get(dev);
}
static int msa311_buffer_postdisable(struct iio_dev *indio_dev)
{
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return 0;
}
static int msa311_set_new_data_trig_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct msa311_priv *msa311 = iio_priv(indio_dev);
struct device *dev = msa311->dev;
int err;
mutex_lock(&msa311->lock);
err = regmap_field_write(msa311->fields[F_NEW_DATA_INT_EN], state);
mutex_unlock(&msa311->lock);
if (err)
dev_err(dev,
"can't %s buffer due to new_data_int failure (%pe)\n",
str_enable_disable(state), ERR_PTR(err));
return err;
}
static int msa311_validate_device(struct iio_trigger *trig,
struct iio_dev *indio_dev)
{
return iio_trigger_get_drvdata(trig) == indio_dev ? 0 : -EINVAL;
}
static irqreturn_t msa311_buffer_thread(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct msa311_priv *msa311 = iio_priv(pf->indio_dev);
struct iio_dev *indio_dev = pf->indio_dev;
const struct iio_chan_spec *chan;
struct device *dev = msa311->dev;
int bit, err, i = 0;
__le16 axis;
struct {
__le16 channels[MSA311_SI_Z + 1];
s64 ts __aligned(8);
} buf;
memset(&buf, 0, sizeof(buf));
mutex_lock(&msa311->lock);
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
chan = &msa311_channels[bit];
err = msa311_get_axis(msa311, chan, &axis);
if (err) {
mutex_unlock(&msa311->lock);
dev_err(dev, "can't get axis %s (%pe)\n",
chan->datasheet_name, ERR_PTR(err));
goto notify_done;
}
buf.channels[i++] = axis;
}
mutex_unlock(&msa311->lock);
iio_push_to_buffers_with_timestamp(indio_dev, &buf,
iio_get_time_ns(indio_dev));
notify_done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t msa311_irq_thread(int irq, void *p)
{
struct msa311_priv *msa311 = iio_priv(p);
unsigned int new_data_int_enabled;
struct device *dev = msa311->dev;
int err;
mutex_lock(&msa311->lock);
/*
* We do not check NEW_DATA int status, because based on the
* specification it's cleared automatically after a fixed time.
* So just check that is enabled by driver logic.
*/
err = regmap_field_read(msa311->fields[F_NEW_DATA_INT_EN],
&new_data_int_enabled);
mutex_unlock(&msa311->lock);
if (err) {
dev_err(dev, "can't read new_data interrupt state (%pe)\n",
ERR_PTR(err));
return IRQ_NONE;
}
if (new_data_int_enabled)
iio_trigger_poll_nested(msa311->new_data_trig);
return IRQ_HANDLED;
}
static const struct iio_info msa311_info = {
.read_raw = msa311_read_raw,
.read_avail = msa311_read_avail,
.write_raw = msa311_write_raw,
.debugfs_reg_access = msa311_debugfs_reg_access,
};
static const struct iio_buffer_setup_ops msa311_buffer_setup_ops = {
.preenable = msa311_buffer_preenable,
.postdisable = msa311_buffer_postdisable,
};
static const struct iio_trigger_ops msa311_new_data_trig_ops = {
.set_trigger_state = msa311_set_new_data_trig_state,
.validate_device = msa311_validate_device,
};
static int msa311_check_partid(struct msa311_priv *msa311)
{
struct device *dev = msa311->dev;
unsigned int partid;
int err;
err = regmap_read(msa311->regs, MSA311_PARTID_REG, &partid);
if (err)
return dev_err_probe(dev, err, "failed to read partid\n");
if (partid != MSA311_WHO_AM_I)
dev_warn(dev, "invalid partid (%#x), expected (%#x)\n",
partid, MSA311_WHO_AM_I);
msa311->chip_name = devm_kasprintf(dev, GFP_KERNEL,
"msa311-%02x", partid);
if (!msa311->chip_name)
return dev_err_probe(dev, -ENOMEM, "can't alloc chip name\n");
return 0;
}
static int msa311_soft_reset(struct msa311_priv *msa311)
{
struct device *dev = msa311->dev;
int err;
err = regmap_write(msa311->regs, MSA311_SOFT_RESET_REG,
MSA311_GENMASK(F_SOFT_RESET_I2C) |
MSA311_GENMASK(F_SOFT_RESET_SPI));
if (err)
return dev_err_probe(dev, err, "can't soft reset all logic\n");
return 0;
}
static int msa311_chip_init(struct msa311_priv *msa311)
{
struct device *dev = msa311->dev;
const char zero_bulk[2] = { };
int err;
err = regmap_write(msa311->regs, MSA311_RANGE_REG, MSA311_FS_16G);
if (err)
return dev_err_probe(dev, err, "failed to setup accel range\n");
/* Disable all interrupts by default */
err = regmap_bulk_write(msa311->regs, MSA311_INT_SET_0_REG,
zero_bulk, sizeof(zero_bulk));
if (err)
return dev_err_probe(dev, err,
"can't disable set0/set1 interrupts\n");
/* Unmap all INT1 interrupts by default */
err = regmap_bulk_write(msa311->regs, MSA311_INT_MAP_0_REG,
zero_bulk, sizeof(zero_bulk));
if (err)
return dev_err_probe(dev, err,
"failed to unmap map0/map1 interrupts\n");
/* Disable all axes by default */
err = regmap_update_bits(msa311->regs, MSA311_ODR_REG,
MSA311_GENMASK(F_X_AXIS_DIS) |
MSA311_GENMASK(F_Y_AXIS_DIS) |
MSA311_GENMASK(F_Z_AXIS_DIS), 0);
if (err)
return dev_err_probe(dev, err, "can't enable all axes\n");
err = msa311_set_odr(msa311, MSA311_ODR_125_HZ);
if (err)
return dev_err_probe(dev, err,
"failed to set accel frequency\n");
return 0;
}
static int msa311_setup_interrupts(struct msa311_priv *msa311)
{
struct device *dev = msa311->dev;
struct i2c_client *i2c = to_i2c_client(dev);
struct iio_dev *indio_dev = i2c_get_clientdata(i2c);
struct iio_trigger *trig;
int err;
/* Keep going without interrupts if no initialized I2C IRQ */
if (i2c->irq <= 0)
return 0;
err = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
msa311_irq_thread, IRQF_ONESHOT,
msa311->chip_name, indio_dev);
if (err)
return dev_err_probe(dev, err, "failed to request IRQ\n");
trig = devm_iio_trigger_alloc(dev, "%s-new-data", msa311->chip_name);
if (!trig)
return dev_err_probe(dev, -ENOMEM,
"can't allocate newdata trigger\n");
msa311->new_data_trig = trig;
msa311->new_data_trig->ops = &msa311_new_data_trig_ops;
iio_trigger_set_drvdata(msa311->new_data_trig, indio_dev);
err = devm_iio_trigger_register(dev, msa311->new_data_trig);
if (err)
return dev_err_probe(dev, err,
"can't register newdata trigger\n");
err = regmap_field_write(msa311->fields[F_INT1_OD],
MSA311_INT1_OD_PUSH_PULL);
if (err)
return dev_err_probe(dev, err,
"can't enable push-pull interrupt\n");
err = regmap_field_write(msa311->fields[F_INT1_LVL],
MSA311_INT1_LVL_HIGH);
if (err)
return dev_err_probe(dev, err,
"can't set active interrupt level\n");
err = regmap_field_write(msa311->fields[F_LATCH_INT],
MSA311_LATCH_INT_LATCHED);
if (err)
return dev_err_probe(dev, err,
"can't latch interrupt\n");
err = regmap_field_write(msa311->fields[F_RESET_INT], 1);
if (err)
return dev_err_probe(dev, err,
"can't reset interrupt\n");
err = regmap_field_write(msa311->fields[F_INT1_NEW_DATA], 1);
if (err)
return dev_err_probe(dev, err,
"can't map new data interrupt\n");
return 0;
}
static int msa311_regmap_init(struct msa311_priv *msa311)
{
struct regmap_field **fields = msa311->fields;
struct device *dev = msa311->dev;
struct i2c_client *i2c = to_i2c_client(dev);
struct regmap *regmap;
int i;
regmap = devm_regmap_init_i2c(i2c, &msa311_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap),
"failed to register i2c regmap\n");
msa311->regs = regmap;
for (i = 0; i < F_MAX_FIELDS; i++) {
fields[i] = devm_regmap_field_alloc(dev,
msa311->regs,
msa311_reg_fields[i]);
if (IS_ERR(msa311->fields[i]))
return dev_err_probe(dev, PTR_ERR(msa311->fields[i]),
"can't alloc field[%d]\n", i);
}
return 0;
}
static void msa311_powerdown(void *msa311)
{
msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_SUSPEND);
}
static int msa311_probe(struct i2c_client *i2c)
{
struct device *dev = &i2c->dev;
struct msa311_priv *msa311;
struct iio_dev *indio_dev;
int err;
indio_dev = devm_iio_device_alloc(dev, sizeof(*msa311));
if (!indio_dev)
return dev_err_probe(dev, -ENOMEM,
"IIO device allocation failed\n");
msa311 = iio_priv(indio_dev);
msa311->dev = dev;
i2c_set_clientdata(i2c, indio_dev);
err = msa311_regmap_init(msa311);
if (err)
return err;
mutex_init(&msa311->lock);
err = devm_regulator_get_enable(dev, "vdd");
if (err)
return dev_err_probe(dev, err, "can't get vdd supply\n");
err = msa311_check_partid(msa311);
if (err)
return err;
err = msa311_soft_reset(msa311);
if (err)
return err;
err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_NORMAL);
if (err)
return dev_err_probe(dev, err, "failed to power on device\n");
/*
* Register powerdown deferred callback which suspends the chip
* after module unloaded.
*
* MSA311 should be in SUSPEND mode in the two cases:
* 1) When driver is loaded, but we do not have any data or
* configuration requests to it (we are solving it using
* autosuspend feature).
* 2) When driver is unloaded and device is not used (devm action is
* used in this case).
*/
err = devm_add_action_or_reset(dev, msa311_powerdown, msa311);
if (err)
return dev_err_probe(dev, err, "can't add powerdown action\n");
err = pm_runtime_set_active(dev);
if (err)
return err;
err = devm_pm_runtime_enable(dev);
if (err)
return err;
pm_runtime_get_noresume(dev);
pm_runtime_set_autosuspend_delay(dev, MSA311_PWR_SLEEP_DELAY_MS);
pm_runtime_use_autosuspend(dev);
err = msa311_chip_init(msa311);
if (err)
return err;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = msa311_channels;
indio_dev->num_channels = ARRAY_SIZE(msa311_channels);
indio_dev->name = msa311->chip_name;
indio_dev->info = &msa311_info;
err = devm_iio_triggered_buffer_setup(dev, indio_dev,
iio_pollfunc_store_time,
msa311_buffer_thread,
&msa311_buffer_setup_ops);
if (err)
return dev_err_probe(dev, err,
"can't setup IIO trigger buffer\n");
err = msa311_setup_interrupts(msa311);
if (err)
return err;
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
err = devm_iio_device_register(dev, indio_dev);
if (err)
return dev_err_probe(dev, err, "IIO device register failed\n");
return 0;
}
static int msa311_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct msa311_priv *msa311 = iio_priv(indio_dev);
int err;
mutex_lock(&msa311->lock);
err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_SUSPEND);
mutex_unlock(&msa311->lock);
if (err)
dev_err(dev, "failed to power off device (%pe)\n",
ERR_PTR(err));
return err;
}
static int msa311_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct msa311_priv *msa311 = iio_priv(indio_dev);
int err;
mutex_lock(&msa311->lock);
err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_NORMAL);
mutex_unlock(&msa311->lock);
if (err)
dev_err(dev, "failed to power on device (%pe)\n",
ERR_PTR(err));
return err;
}
static DEFINE_RUNTIME_DEV_PM_OPS(msa311_pm_ops, msa311_runtime_suspend,
msa311_runtime_resume, NULL);
static const struct i2c_device_id msa311_i2c_id[] = {
{ .name = "msa311" },
{ }
};
MODULE_DEVICE_TABLE(i2c, msa311_i2c_id);
static const struct of_device_id msa311_of_match[] = {
{ .compatible = "memsensing,msa311" },
{ }
};
MODULE_DEVICE_TABLE(of, msa311_of_match);
static struct i2c_driver msa311_driver = {
.driver = {
.name = "msa311",
.of_match_table = msa311_of_match,
.pm = pm_ptr(&msa311_pm_ops),
},
.probe = msa311_probe,
.id_table = msa311_i2c_id,
};
module_i2c_driver(msa311_driver);
MODULE_AUTHOR("Dmitry Rokosov <[email protected]>");
MODULE_DESCRIPTION("MEMSensing MSA311 3-axis accelerometer driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/msa311.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO accel I2C driver for Freescale MMA7455L 3-axis 10-bit accelerometer
* Copyright 2015 Joachim Eastwood <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "mma7455.h"
static int mma7455_i2c_probe(struct i2c_client *i2c)
{
const struct i2c_device_id *id = i2c_client_get_device_id(i2c);
struct regmap *regmap;
const char *name = NULL;
regmap = devm_regmap_init_i2c(i2c, &mma7455_core_regmap);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
if (id)
name = id->name;
return mma7455_core_probe(&i2c->dev, regmap, name);
}
static void mma7455_i2c_remove(struct i2c_client *i2c)
{
mma7455_core_remove(&i2c->dev);
}
static const struct i2c_device_id mma7455_i2c_ids[] = {
{ "mma7455", 0 },
{ "mma7456", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, mma7455_i2c_ids);
static const struct of_device_id mma7455_of_match[] = {
{ .compatible = "fsl,mma7455" },
{ .compatible = "fsl,mma7456" },
{ }
};
MODULE_DEVICE_TABLE(of, mma7455_of_match);
static struct i2c_driver mma7455_i2c_driver = {
.probe = mma7455_i2c_probe,
.remove = mma7455_i2c_remove,
.id_table = mma7455_i2c_ids,
.driver = {
.name = "mma7455-i2c",
.of_match_table = mma7455_of_match,
},
};
module_i2c_driver(mma7455_i2c_driver);
MODULE_AUTHOR("Joachim Eastwood <[email protected]>");
MODULE_DESCRIPTION("Freescale MMA7455L I2C accelerometer driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_MMA7455);
| linux-master | drivers/iio/accel/mma7455_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* SPI IIO driver for Bosch BMA400 triaxial acceleration sensor.
*
* Copyright 2020 Dan Robertson <[email protected]>
*
*/
#include <linux/bits.h>
#include <linux/init.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "bma400.h"
#define BMA400_MAX_SPI_READ 2
#define BMA400_SPI_READ_BUFFER_SIZE (BMA400_MAX_SPI_READ + 1)
static int bma400_regmap_spi_read(void *context,
const void *reg, size_t reg_size,
void *val, size_t val_size)
{
struct device *dev = context;
struct spi_device *spi = to_spi_device(dev);
u8 result[BMA400_SPI_READ_BUFFER_SIZE];
ssize_t status;
if (val_size > BMA400_MAX_SPI_READ)
return -EINVAL;
status = spi_write_then_read(spi, reg, 1, result, val_size + 1);
if (status)
return status;
/*
* From the BMA400 datasheet:
*
* > For a basic read operation two bytes have to be read and the first
* > has to be dropped and the second byte must be interpreted.
*/
memcpy(val, result + 1, val_size);
return 0;
}
static int bma400_regmap_spi_write(void *context, const void *data,
size_t count)
{
struct device *dev = context;
struct spi_device *spi = to_spi_device(dev);
return spi_write(spi, data, count);
}
static struct regmap_bus bma400_regmap_bus = {
.read = bma400_regmap_spi_read,
.write = bma400_regmap_spi_write,
.read_flag_mask = BIT(7),
.max_raw_read = BMA400_MAX_SPI_READ,
};
static int bma400_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct regmap *regmap;
unsigned int val;
int ret;
regmap = devm_regmap_init(&spi->dev, &bma400_regmap_bus,
&spi->dev, &bma400_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "failed to create regmap\n");
return PTR_ERR(regmap);
}
/*
* Per the bma400 datasheet, the first SPI read may
* return garbage. As the datasheet recommends, the
* chip ID register will be read here and checked
* again in the following probe.
*/
ret = regmap_read(regmap, BMA400_CHIP_ID_REG, &val);
if (ret)
dev_err(&spi->dev, "Failed to read chip id register\n");
return bma400_probe(&spi->dev, regmap, spi->irq, id->name);
}
static const struct spi_device_id bma400_spi_ids[] = {
{ "bma400", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, bma400_spi_ids);
static const struct of_device_id bma400_of_spi_match[] = {
{ .compatible = "bosch,bma400" },
{ }
};
MODULE_DEVICE_TABLE(of, bma400_of_spi_match);
static struct spi_driver bma400_spi_driver = {
.driver = {
.name = "bma400",
.of_match_table = bma400_of_spi_match,
},
.probe = bma400_spi_probe,
.id_table = bma400_spi_ids,
};
module_spi_driver(bma400_spi_driver);
MODULE_AUTHOR("Dan Robertson <[email protected]>");
MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor (SPI)");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_BMA400);
| linux-master | drivers/iio/accel/bma400_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* MXC6255 - MEMSIC orientation sensing accelerometer
*
* Copyright (c) 2015, Intel Corporation.
*
* IIO driver for MXC6255 (7-bit I2C slave address 0x15).
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/iio/iio.h>
#include <linux/delay.h>
#include <linux/acpi.h>
#include <linux/regmap.h>
#include <linux/iio/sysfs.h>
#define MXC6255_DRV_NAME "mxc6255"
#define MXC6255_REGMAP_NAME "mxc6255_regmap"
#define MXC6255_REG_XOUT 0x00
#define MXC6255_REG_YOUT 0x01
#define MXC6255_REG_CHIP_ID 0x08
#define MXC6255_CHIP_ID 0x05
/*
* MXC6255 has only one measurement range: +/- 2G.
* The acceleration output is an 8-bit value.
*
* Scale is calculated as follows:
* (2 + 2) * 9.80665 / (2^8 - 1) = 0.153829
*
* Scale value for +/- 2G measurement range
*/
#define MXC6255_SCALE 153829
enum mxc6255_axis {
AXIS_X,
AXIS_Y,
};
struct mxc6255_data {
struct i2c_client *client;
struct regmap *regmap;
};
static int mxc6255_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mxc6255_data *data = iio_priv(indio_dev);
unsigned int reg;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = regmap_read(data->regmap, chan->address, ®);
if (ret < 0) {
dev_err(&data->client->dev,
"Error reading reg %lu\n", chan->address);
return ret;
}
*val = sign_extend32(reg, 7);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = MXC6255_SCALE;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static const struct iio_info mxc6255_info = {
.read_raw = mxc6255_read_raw,
};
#define MXC6255_CHANNEL(_axis, reg) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.address = reg, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec mxc6255_channels[] = {
MXC6255_CHANNEL(X, MXC6255_REG_XOUT),
MXC6255_CHANNEL(Y, MXC6255_REG_YOUT),
};
static bool mxc6255_is_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MXC6255_REG_XOUT:
case MXC6255_REG_YOUT:
case MXC6255_REG_CHIP_ID:
return true;
default:
return false;
}
}
static const struct regmap_config mxc6255_regmap_config = {
.name = MXC6255_REGMAP_NAME,
.reg_bits = 8,
.val_bits = 8,
.readable_reg = mxc6255_is_readable_reg,
};
static int mxc6255_probe(struct i2c_client *client)
{
struct mxc6255_data *data;
struct iio_dev *indio_dev;
struct regmap *regmap;
unsigned int chip_id;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
regmap = devm_regmap_init_i2c(client, &mxc6255_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Error initializing regmap\n");
return PTR_ERR(regmap);
}
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
data->regmap = regmap;
indio_dev->name = MXC6255_DRV_NAME;
indio_dev->channels = mxc6255_channels;
indio_dev->num_channels = ARRAY_SIZE(mxc6255_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mxc6255_info;
ret = regmap_read(data->regmap, MXC6255_REG_CHIP_ID, &chip_id);
if (ret < 0) {
dev_err(&client->dev, "Error reading chip id %d\n", ret);
return ret;
}
if ((chip_id & 0x1f) != MXC6255_CHIP_ID) {
dev_err(&client->dev, "Invalid chip id %x\n", chip_id);
return -ENODEV;
}
dev_dbg(&client->dev, "Chip id %x\n", chip_id);
ret = devm_iio_device_register(&client->dev, indio_dev);
if (ret < 0) {
dev_err(&client->dev, "Could not register IIO device\n");
return ret;
}
return 0;
}
static const struct acpi_device_id mxc6255_acpi_match[] = {
{"MXC6225", 0},
{"MXC6255", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, mxc6255_acpi_match);
static const struct i2c_device_id mxc6255_id[] = {
{"mxc6225", 0},
{"mxc6255", 0},
{ }
};
MODULE_DEVICE_TABLE(i2c, mxc6255_id);
static struct i2c_driver mxc6255_driver = {
.driver = {
.name = MXC6255_DRV_NAME,
.acpi_match_table = ACPI_PTR(mxc6255_acpi_match),
},
.probe = mxc6255_probe,
.id_table = mxc6255_id,
};
module_i2c_driver(mxc6255_driver);
MODULE_AUTHOR("Teodora Baluta <[email protected]>");
MODULE_DESCRIPTION("MEMSIC MXC6255 orientation sensing accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/mxc6255.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer
*
* Copyright 2010 Analog Devices Inc.
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#define ADIS16201_STARTUP_DELAY_MS 220
#define ADIS16201_FLASH_CNT 0x00
/* Data Output Register Information */
#define ADIS16201_SUPPLY_OUT_REG 0x02
#define ADIS16201_XACCL_OUT_REG 0x04
#define ADIS16201_YACCL_OUT_REG 0x06
#define ADIS16201_AUX_ADC_REG 0x08
#define ADIS16201_TEMP_OUT_REG 0x0A
#define ADIS16201_XINCL_OUT_REG 0x0C
#define ADIS16201_YINCL_OUT_REG 0x0E
/* Calibration Register Definition */
#define ADIS16201_XACCL_OFFS_REG 0x10
#define ADIS16201_YACCL_OFFS_REG 0x12
#define ADIS16201_XACCL_SCALE_REG 0x14
#define ADIS16201_YACCL_SCALE_REG 0x16
#define ADIS16201_XINCL_OFFS_REG 0x18
#define ADIS16201_YINCL_OFFS_REG 0x1A
#define ADIS16201_XINCL_SCALE_REG 0x1C
#define ADIS16201_YINCL_SCALE_REG 0x1E
/* Alarm Register Definition */
#define ADIS16201_ALM_MAG1_REG 0x20
#define ADIS16201_ALM_MAG2_REG 0x22
#define ADIS16201_ALM_SMPL1_REG 0x24
#define ADIS16201_ALM_SMPL2_REG 0x26
#define ADIS16201_ALM_CTRL_REG 0x28
#define ADIS16201_AUX_DAC_REG 0x30
#define ADIS16201_GPIO_CTRL_REG 0x32
#define ADIS16201_SMPL_PRD_REG 0x36
/* Operation, filter configuration */
#define ADIS16201_AVG_CNT_REG 0x38
#define ADIS16201_SLP_CNT_REG 0x3A
/* Miscellaneous Control Register Definition */
#define ADIS16201_MSC_CTRL_REG 0x34
#define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8)
/* Data-ready enable: 1 = enabled, 0 = disabled */
#define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2)
/* Data-ready polarity: 1 = active high, 0 = active low */
#define ADIS16201_MSC_CTRL_ACTIVE_DATA_RDY_HIGH BIT(1)
/* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0)
/* Diagnostics System Status Register Definition */
#define ADIS16201_DIAG_STAT_REG 0x3C
#define ADIS16201_DIAG_STAT_ALARM2 BIT(9)
#define ADIS16201_DIAG_STAT_ALARM1 BIT(8)
#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3
#define ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT 2
/* Power supply above 3.625 V */
#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1
/* Power supply below 2.975 V */
#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0
/* System Command Register Definition */
#define ADIS16201_GLOB_CMD_REG 0x3E
#define ADIS16201_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16201_GLOB_CMD_FACTORY_RESET BIT(1)
#define ADIS16201_ERROR_ACTIVE BIT(14)
enum adis16201_scan {
ADIS16201_SCAN_ACC_X,
ADIS16201_SCAN_ACC_Y,
ADIS16201_SCAN_INCLI_X,
ADIS16201_SCAN_INCLI_Y,
ADIS16201_SCAN_SUPPLY,
ADIS16201_SCAN_AUX_ADC,
ADIS16201_SCAN_TEMP,
};
static const u8 adis16201_addresses[] = {
[ADIS16201_SCAN_ACC_X] = ADIS16201_XACCL_OFFS_REG,
[ADIS16201_SCAN_ACC_Y] = ADIS16201_YACCL_OFFS_REG,
[ADIS16201_SCAN_INCLI_X] = ADIS16201_XINCL_OFFS_REG,
[ADIS16201_SCAN_INCLI_Y] = ADIS16201_YINCL_OFFS_REG,
};
static int adis16201_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int ret;
int bits;
u8 addr;
s16 val16;
switch (mask) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan,
ADIS16201_ERROR_ACTIVE, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_VOLTAGE:
if (chan->channel == 0) {
/* Voltage base units are mV hence 1.22 mV */
*val = 1;
*val2 = 220000;
} else {
/* Voltage base units are mV hence 0.61 mV */
*val = 0;
*val2 = 610000;
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = -470;
*val2 = 0;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
/*
* IIO base unit for sensitivity of accelerometer
* is milli g.
* 1 LSB represents 0.244 mg.
*/
*val = 0;
*val2 = IIO_G_TO_M_S_2(462400);
return IIO_VAL_INT_PLUS_NANO;
case IIO_INCLI:
*val = 0;
*val2 = 100000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_OFFSET:
/*
* The raw ADC value is 1278 when the temperature
* is 25 degrees and the scale factor per milli
* degree celcius is -470.
*/
*val = 25000 / -470 - 1278;
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBBIAS:
switch (chan->type) {
case IIO_ACCEL:
bits = 12;
break;
case IIO_INCLI:
bits = 9;
break;
default:
return -EINVAL;
}
addr = adis16201_addresses[chan->scan_index];
ret = adis_read_reg_16(st, addr, &val16);
if (ret)
return ret;
*val = sign_extend32(val16, bits - 1);
return IIO_VAL_INT;
}
return -EINVAL;
}
static int adis16201_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int m;
if (mask != IIO_CHAN_INFO_CALIBBIAS)
return -EINVAL;
switch (chan->type) {
case IIO_ACCEL:
m = GENMASK(11, 0);
break;
case IIO_INCLI:
m = GENMASK(8, 0);
break;
default:
return -EINVAL;
}
return adis_write_reg_16(st, adis16201_addresses[chan->scan_index],
val & m);
}
static const struct iio_chan_spec adis16201_channels[] = {
ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT_REG, ADIS16201_SCAN_SUPPLY, 0,
12),
ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT_REG, ADIS16201_SCAN_TEMP, 0, 12),
ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT_REG, ADIS16201_SCAN_ACC_X,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT_REG, ADIS16201_SCAN_ACC_Y,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC_REG, ADIS16201_SCAN_AUX_ADC, 0, 12),
ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT_REG, ADIS16201_SCAN_INCLI_X,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_INCLI_CHAN(Y, ADIS16201_YINCL_OUT_REG, ADIS16201_SCAN_INCLI_Y,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
IIO_CHAN_SOFT_TIMESTAMP(7)
};
static const struct iio_info adis16201_info = {
.read_raw = adis16201_read_raw,
.write_raw = adis16201_write_raw,
.update_scan_mode = adis_update_scan_mode,
};
static const char * const adis16201_status_error_msgs[] = {
[ADIS16201_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
[ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
[ADIS16201_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
[ADIS16201_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
};
static const struct adis_timeout adis16201_timeouts = {
.reset_ms = ADIS16201_STARTUP_DELAY_MS,
.sw_reset_ms = ADIS16201_STARTUP_DELAY_MS,
.self_test_ms = ADIS16201_STARTUP_DELAY_MS,
};
static const struct adis_data adis16201_data = {
.read_delay = 20,
.msc_ctrl_reg = ADIS16201_MSC_CTRL_REG,
.glob_cmd_reg = ADIS16201_GLOB_CMD_REG,
.diag_stat_reg = ADIS16201_DIAG_STAT_REG,
.self_test_mask = ADIS16201_MSC_CTRL_SELF_TEST_EN,
.self_test_reg = ADIS16201_MSC_CTRL_REG,
.self_test_no_autoclear = true,
.timeouts = &adis16201_timeouts,
.status_error_msgs = adis16201_status_error_msgs,
.status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) |
BIT(ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT) |
BIT(ADIS16201_DIAG_STAT_POWER_HIGH_BIT) |
BIT(ADIS16201_DIAG_STAT_POWER_LOW_BIT),
};
static int adis16201_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adis *st;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
indio_dev->name = spi->dev.driver->name;
indio_dev->info = &adis16201_info;
indio_dev->channels = adis16201_channels;
indio_dev->num_channels = ARRAY_SIZE(adis16201_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
ret = adis_init(st, indio_dev, spi, &adis16201_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
if (ret)
return ret;
ret = __adis_initial_startup(st);
if (ret)
return ret;
return devm_iio_device_register(&spi->dev, indio_dev);
}
static struct spi_driver adis16201_driver = {
.driver = {
.name = "adis16201",
},
.probe = adis16201_probe,
};
module_spi_driver(adis16201_driver);
MODULE_AUTHOR("Barry Song <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:adis16201");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/accel/adis16201.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* ADXL372 3-Axis Digital Accelerometer core driver
*
* Copyright 2018 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/events.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include "adxl372.h"
/* ADXL372 registers definition */
#define ADXL372_DEVID 0x00
#define ADXL372_DEVID_MST 0x01
#define ADXL372_PARTID 0x02
#define ADXL372_STATUS_1 0x04
#define ADXL372_STATUS_2 0x05
#define ADXL372_FIFO_ENTRIES_2 0x06
#define ADXL372_FIFO_ENTRIES_1 0x07
#define ADXL372_X_DATA_H 0x08
#define ADXL372_X_DATA_L 0x09
#define ADXL372_Y_DATA_H 0x0A
#define ADXL372_Y_DATA_L 0x0B
#define ADXL372_Z_DATA_H 0x0C
#define ADXL372_Z_DATA_L 0x0D
#define ADXL372_X_MAXPEAK_H 0x15
#define ADXL372_X_MAXPEAK_L 0x16
#define ADXL372_Y_MAXPEAK_H 0x17
#define ADXL372_Y_MAXPEAK_L 0x18
#define ADXL372_Z_MAXPEAK_H 0x19
#define ADXL372_Z_MAXPEAK_L 0x1A
#define ADXL372_OFFSET_X 0x20
#define ADXL372_OFFSET_Y 0x21
#define ADXL372_OFFSET_Z 0x22
#define ADXL372_X_THRESH_ACT_H 0x23
#define ADXL372_X_THRESH_ACT_L 0x24
#define ADXL372_Y_THRESH_ACT_H 0x25
#define ADXL372_Y_THRESH_ACT_L 0x26
#define ADXL372_Z_THRESH_ACT_H 0x27
#define ADXL372_Z_THRESH_ACT_L 0x28
#define ADXL372_TIME_ACT 0x29
#define ADXL372_X_THRESH_INACT_H 0x2A
#define ADXL372_X_THRESH_INACT_L 0x2B
#define ADXL372_Y_THRESH_INACT_H 0x2C
#define ADXL372_Y_THRESH_INACT_L 0x2D
#define ADXL372_Z_THRESH_INACT_H 0x2E
#define ADXL372_Z_THRESH_INACT_L 0x2F
#define ADXL372_TIME_INACT_H 0x30
#define ADXL372_TIME_INACT_L 0x31
#define ADXL372_X_THRESH_ACT2_H 0x32
#define ADXL372_X_THRESH_ACT2_L 0x33
#define ADXL372_Y_THRESH_ACT2_H 0x34
#define ADXL372_Y_THRESH_ACT2_L 0x35
#define ADXL372_Z_THRESH_ACT2_H 0x36
#define ADXL372_Z_THRESH_ACT2_L 0x37
#define ADXL372_HPF 0x38
#define ADXL372_FIFO_SAMPLES 0x39
#define ADXL372_FIFO_CTL 0x3A
#define ADXL372_INT1_MAP 0x3B
#define ADXL372_INT2_MAP 0x3C
#define ADXL372_TIMING 0x3D
#define ADXL372_MEASURE 0x3E
#define ADXL372_POWER_CTL 0x3F
#define ADXL372_SELF_TEST 0x40
#define ADXL372_RESET 0x41
#define ADXL372_FIFO_DATA 0x42
#define ADXL372_DEVID_VAL 0xAD
#define ADXL372_PARTID_VAL 0xFA
#define ADXL372_RESET_CODE 0x52
/* ADXL372_POWER_CTL */
#define ADXL372_POWER_CTL_MODE_MSK GENMASK_ULL(1, 0)
#define ADXL372_POWER_CTL_MODE(x) (((x) & 0x3) << 0)
/* ADXL372_MEASURE */
#define ADXL372_MEASURE_LINKLOOP_MSK GENMASK_ULL(5, 4)
#define ADXL372_MEASURE_LINKLOOP_MODE(x) (((x) & 0x3) << 4)
#define ADXL372_MEASURE_BANDWIDTH_MSK GENMASK_ULL(2, 0)
#define ADXL372_MEASURE_BANDWIDTH_MODE(x) (((x) & 0x7) << 0)
/* ADXL372_TIMING */
#define ADXL372_TIMING_ODR_MSK GENMASK_ULL(7, 5)
#define ADXL372_TIMING_ODR_MODE(x) (((x) & 0x7) << 5)
/* ADXL372_FIFO_CTL */
#define ADXL372_FIFO_CTL_FORMAT_MSK GENMASK(5, 3)
#define ADXL372_FIFO_CTL_FORMAT_MODE(x) (((x) & 0x7) << 3)
#define ADXL372_FIFO_CTL_MODE_MSK GENMASK(2, 1)
#define ADXL372_FIFO_CTL_MODE_MODE(x) (((x) & 0x3) << 1)
#define ADXL372_FIFO_CTL_SAMPLES_MSK BIT(1)
#define ADXL372_FIFO_CTL_SAMPLES_MODE(x) (((x) > 0xFF) ? 1 : 0)
/* ADXL372_STATUS_1 */
#define ADXL372_STATUS_1_DATA_RDY(x) (((x) >> 0) & 0x1)
#define ADXL372_STATUS_1_FIFO_RDY(x) (((x) >> 1) & 0x1)
#define ADXL372_STATUS_1_FIFO_FULL(x) (((x) >> 2) & 0x1)
#define ADXL372_STATUS_1_FIFO_OVR(x) (((x) >> 3) & 0x1)
#define ADXL372_STATUS_1_USR_NVM_BUSY(x) (((x) >> 5) & 0x1)
#define ADXL372_STATUS_1_AWAKE(x) (((x) >> 6) & 0x1)
#define ADXL372_STATUS_1_ERR_USR_REGS(x) (((x) >> 7) & 0x1)
/* ADXL372_STATUS_2 */
#define ADXL372_STATUS_2_INACT(x) (((x) >> 4) & 0x1)
#define ADXL372_STATUS_2_ACT(x) (((x) >> 5) & 0x1)
#define ADXL372_STATUS_2_AC2(x) (((x) >> 6) & 0x1)
/* ADXL372_INT1_MAP */
#define ADXL372_INT1_MAP_DATA_RDY_MSK BIT(0)
#define ADXL372_INT1_MAP_DATA_RDY_MODE(x) (((x) & 0x1) << 0)
#define ADXL372_INT1_MAP_FIFO_RDY_MSK BIT(1)
#define ADXL372_INT1_MAP_FIFO_RDY_MODE(x) (((x) & 0x1) << 1)
#define ADXL372_INT1_MAP_FIFO_FULL_MSK BIT(2)
#define ADXL372_INT1_MAP_FIFO_FULL_MODE(x) (((x) & 0x1) << 2)
#define ADXL372_INT1_MAP_FIFO_OVR_MSK BIT(3)
#define ADXL372_INT1_MAP_FIFO_OVR_MODE(x) (((x) & 0x1) << 3)
#define ADXL372_INT1_MAP_INACT_MSK BIT(4)
#define ADXL372_INT1_MAP_INACT_MODE(x) (((x) & 0x1) << 4)
#define ADXL372_INT1_MAP_ACT_MSK BIT(5)
#define ADXL372_INT1_MAP_ACT_MODE(x) (((x) & 0x1) << 5)
#define ADXL372_INT1_MAP_AWAKE_MSK BIT(6)
#define ADXL372_INT1_MAP_AWAKE_MODE(x) (((x) & 0x1) << 6)
#define ADXL372_INT1_MAP_LOW_MSK BIT(7)
#define ADXL372_INT1_MAP_LOW_MODE(x) (((x) & 0x1) << 7)
/* ADX372_THRESH */
#define ADXL372_THRESH_VAL_H_MSK GENMASK(10, 3)
#define ADXL372_THRESH_VAL_H_SEL(x) FIELD_GET(ADXL372_THRESH_VAL_H_MSK, x)
#define ADXL372_THRESH_VAL_L_MSK GENMASK(2, 0)
#define ADXL372_THRESH_VAL_L_SEL(x) FIELD_GET(ADXL372_THRESH_VAL_L_MSK, x)
/* The ADXL372 includes a deep, 512 sample FIFO buffer */
#define ADXL372_FIFO_SIZE 512
#define ADXL372_X_AXIS_EN(x) ((x) & BIT(0))
#define ADXL372_Y_AXIS_EN(x) ((x) & BIT(1))
#define ADXL372_Z_AXIS_EN(x) ((x) & BIT(2))
/*
* At +/- 200g with 12-bit resolution, scale is computed as:
* (200 + 200) * 9.81 / (2^12 - 1) = 0.958241
*/
#define ADXL372_USCALE 958241
enum adxl372_op_mode {
ADXL372_STANDBY,
ADXL372_WAKE_UP,
ADXL372_INSTANT_ON,
ADXL372_FULL_BW_MEASUREMENT,
};
enum adxl372_act_proc_mode {
ADXL372_DEFAULT,
ADXL372_LINKED,
ADXL372_LOOPED,
};
enum adxl372_th_activity {
ADXL372_ACTIVITY,
ADXL372_ACTIVITY2,
ADXL372_INACTIVITY,
};
enum adxl372_odr {
ADXL372_ODR_400HZ,
ADXL372_ODR_800HZ,
ADXL372_ODR_1600HZ,
ADXL372_ODR_3200HZ,
ADXL372_ODR_6400HZ,
};
enum adxl372_bandwidth {
ADXL372_BW_200HZ,
ADXL372_BW_400HZ,
ADXL372_BW_800HZ,
ADXL372_BW_1600HZ,
ADXL372_BW_3200HZ,
};
static const unsigned int adxl372_th_reg_high_addr[3] = {
[ADXL372_ACTIVITY] = ADXL372_X_THRESH_ACT_H,
[ADXL372_ACTIVITY2] = ADXL372_X_THRESH_ACT2_H,
[ADXL372_INACTIVITY] = ADXL372_X_THRESH_INACT_H,
};
enum adxl372_fifo_format {
ADXL372_XYZ_FIFO,
ADXL372_X_FIFO,
ADXL372_Y_FIFO,
ADXL372_XY_FIFO,
ADXL372_Z_FIFO,
ADXL372_XZ_FIFO,
ADXL372_YZ_FIFO,
ADXL372_XYZ_PEAK_FIFO,
};
enum adxl372_fifo_mode {
ADXL372_FIFO_BYPASSED,
ADXL372_FIFO_STREAMED,
ADXL372_FIFO_TRIGGERED,
ADXL372_FIFO_OLD_SAVED
};
static const int adxl372_samp_freq_tbl[5] = {
400, 800, 1600, 3200, 6400,
};
static const int adxl372_bw_freq_tbl[5] = {
200, 400, 800, 1600, 3200,
};
struct adxl372_axis_lookup {
unsigned int bits;
enum adxl372_fifo_format fifo_format;
};
static const struct adxl372_axis_lookup adxl372_axis_lookup_table[] = {
{ BIT(0), ADXL372_X_FIFO },
{ BIT(1), ADXL372_Y_FIFO },
{ BIT(2), ADXL372_Z_FIFO },
{ BIT(0) | BIT(1), ADXL372_XY_FIFO },
{ BIT(0) | BIT(2), ADXL372_XZ_FIFO },
{ BIT(1) | BIT(2), ADXL372_YZ_FIFO },
{ BIT(0) | BIT(1) | BIT(2), ADXL372_XYZ_FIFO },
};
static const struct iio_event_spec adxl372_events[] = {
{
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_VALUE),
.mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD) | BIT(IIO_EV_INFO_ENABLE),
}, {
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_FALLING,
.mask_separate = BIT(IIO_EV_INFO_VALUE),
.mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD) | BIT(IIO_EV_INFO_ENABLE),
},
};
#define ADXL372_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_BE, \
}, \
.event_spec = adxl372_events, \
.num_event_specs = ARRAY_SIZE(adxl372_events) \
}
static const struct iio_chan_spec adxl372_channels[] = {
ADXL372_ACCEL_CHANNEL(0, ADXL372_X_DATA_H, X),
ADXL372_ACCEL_CHANNEL(1, ADXL372_Y_DATA_H, Y),
ADXL372_ACCEL_CHANNEL(2, ADXL372_Z_DATA_H, Z),
};
struct adxl372_state {
int irq;
struct device *dev;
struct regmap *regmap;
struct iio_trigger *dready_trig;
struct iio_trigger *peak_datardy_trig;
enum adxl372_fifo_mode fifo_mode;
enum adxl372_fifo_format fifo_format;
unsigned int fifo_axis_mask;
enum adxl372_op_mode op_mode;
enum adxl372_act_proc_mode act_proc_mode;
enum adxl372_odr odr;
enum adxl372_bandwidth bw;
u32 act_time_ms;
u32 inact_time_ms;
u8 fifo_set_size;
unsigned long int1_bitmask;
unsigned long int2_bitmask;
u16 watermark;
__be16 fifo_buf[ADXL372_FIFO_SIZE];
bool peak_fifo_mode_en;
struct mutex threshold_m; /* lock for threshold */
};
static const unsigned long adxl372_channel_masks[] = {
BIT(0), BIT(1), BIT(2),
BIT(0) | BIT(1),
BIT(0) | BIT(2),
BIT(1) | BIT(2),
BIT(0) | BIT(1) | BIT(2),
0
};
static ssize_t adxl372_read_threshold_value(struct iio_dev *indio_dev, unsigned int addr,
u16 *threshold)
{
struct adxl372_state *st = iio_priv(indio_dev);
__be16 raw_regval;
u16 regval;
int ret;
ret = regmap_bulk_read(st->regmap, addr, &raw_regval, sizeof(raw_regval));
if (ret < 0)
return ret;
regval = be16_to_cpu(raw_regval);
regval >>= 5;
*threshold = regval;
return 0;
}
static ssize_t adxl372_write_threshold_value(struct iio_dev *indio_dev, unsigned int addr,
u16 threshold)
{
struct adxl372_state *st = iio_priv(indio_dev);
int ret;
mutex_lock(&st->threshold_m);
ret = regmap_write(st->regmap, addr, ADXL372_THRESH_VAL_H_SEL(threshold));
if (ret < 0)
goto unlock;
ret = regmap_update_bits(st->regmap, addr + 1, GENMASK(7, 5),
ADXL372_THRESH_VAL_L_SEL(threshold) << 5);
unlock:
mutex_unlock(&st->threshold_m);
return ret;
}
static int adxl372_read_axis(struct adxl372_state *st, u8 addr)
{
__be16 regval;
int ret;
ret = regmap_bulk_read(st->regmap, addr, ®val, sizeof(regval));
if (ret < 0)
return ret;
return be16_to_cpu(regval);
}
static int adxl372_set_op_mode(struct adxl372_state *st,
enum adxl372_op_mode op_mode)
{
int ret;
ret = regmap_update_bits(st->regmap, ADXL372_POWER_CTL,
ADXL372_POWER_CTL_MODE_MSK,
ADXL372_POWER_CTL_MODE(op_mode));
if (ret < 0)
return ret;
st->op_mode = op_mode;
return ret;
}
static int adxl372_set_odr(struct adxl372_state *st,
enum adxl372_odr odr)
{
int ret;
ret = regmap_update_bits(st->regmap, ADXL372_TIMING,
ADXL372_TIMING_ODR_MSK,
ADXL372_TIMING_ODR_MODE(odr));
if (ret < 0)
return ret;
st->odr = odr;
return ret;
}
static int adxl372_find_closest_match(const int *array,
unsigned int size, int val)
{
int i;
for (i = 0; i < size; i++) {
if (val <= array[i])
return i;
}
return size - 1;
}
static int adxl372_set_bandwidth(struct adxl372_state *st,
enum adxl372_bandwidth bw)
{
int ret;
ret = regmap_update_bits(st->regmap, ADXL372_MEASURE,
ADXL372_MEASURE_BANDWIDTH_MSK,
ADXL372_MEASURE_BANDWIDTH_MODE(bw));
if (ret < 0)
return ret;
st->bw = bw;
return ret;
}
static int adxl372_set_act_proc_mode(struct adxl372_state *st,
enum adxl372_act_proc_mode mode)
{
int ret;
ret = regmap_update_bits(st->regmap,
ADXL372_MEASURE,
ADXL372_MEASURE_LINKLOOP_MSK,
ADXL372_MEASURE_LINKLOOP_MODE(mode));
if (ret < 0)
return ret;
st->act_proc_mode = mode;
return ret;
}
static int adxl372_set_activity_threshold(struct adxl372_state *st,
enum adxl372_th_activity act,
bool ref_en, bool enable,
unsigned int threshold)
{
unsigned char buf[6];
unsigned char th_reg_high_val, th_reg_low_val, th_reg_high_addr;
/* scale factor is 100 mg/code */
th_reg_high_val = (threshold / 100) >> 3;
th_reg_low_val = ((threshold / 100) << 5) | (ref_en << 1) | enable;
th_reg_high_addr = adxl372_th_reg_high_addr[act];
buf[0] = th_reg_high_val;
buf[1] = th_reg_low_val;
buf[2] = th_reg_high_val;
buf[3] = th_reg_low_val;
buf[4] = th_reg_high_val;
buf[5] = th_reg_low_val;
return regmap_bulk_write(st->regmap, th_reg_high_addr,
buf, ARRAY_SIZE(buf));
}
static int adxl372_set_activity_time_ms(struct adxl372_state *st,
unsigned int act_time_ms)
{
unsigned int reg_val, scale_factor;
int ret;
/*
* 3.3 ms per code is the scale factor of the TIME_ACT register for
* ODR = 6400 Hz. It is 6.6 ms per code for ODR = 3200 Hz and below.
*/
if (st->odr == ADXL372_ODR_6400HZ)
scale_factor = 3300;
else
scale_factor = 6600;
reg_val = DIV_ROUND_CLOSEST(act_time_ms * 1000, scale_factor);
/* TIME_ACT register is 8 bits wide */
if (reg_val > 0xFF)
reg_val = 0xFF;
ret = regmap_write(st->regmap, ADXL372_TIME_ACT, reg_val);
if (ret < 0)
return ret;
st->act_time_ms = act_time_ms;
return ret;
}
static int adxl372_set_inactivity_time_ms(struct adxl372_state *st,
unsigned int inact_time_ms)
{
unsigned int reg_val_h, reg_val_l, res, scale_factor;
int ret;
/*
* 13 ms per code is the scale factor of the TIME_INACT register for
* ODR = 6400 Hz. It is 26 ms per code for ODR = 3200 Hz and below.
*/
if (st->odr == ADXL372_ODR_6400HZ)
scale_factor = 13;
else
scale_factor = 26;
res = DIV_ROUND_CLOSEST(inact_time_ms, scale_factor);
reg_val_h = (res >> 8) & 0xFF;
reg_val_l = res & 0xFF;
ret = regmap_write(st->regmap, ADXL372_TIME_INACT_H, reg_val_h);
if (ret < 0)
return ret;
ret = regmap_write(st->regmap, ADXL372_TIME_INACT_L, reg_val_l);
if (ret < 0)
return ret;
st->inact_time_ms = inact_time_ms;
return ret;
}
static int adxl372_set_interrupts(struct adxl372_state *st,
unsigned long int1_bitmask,
unsigned long int2_bitmask)
{
int ret;
ret = regmap_write(st->regmap, ADXL372_INT1_MAP, int1_bitmask);
if (ret < 0)
return ret;
return regmap_write(st->regmap, ADXL372_INT2_MAP, int2_bitmask);
}
static int adxl372_configure_fifo(struct adxl372_state *st)
{
unsigned int fifo_samples, fifo_ctl;
int ret;
/* FIFO must be configured while in standby mode */
ret = adxl372_set_op_mode(st, ADXL372_STANDBY);
if (ret < 0)
return ret;
/*
* watermark stores the number of sets; we need to write the FIFO
* registers with the number of samples
*/
fifo_samples = (st->watermark * st->fifo_set_size);
fifo_ctl = ADXL372_FIFO_CTL_FORMAT_MODE(st->fifo_format) |
ADXL372_FIFO_CTL_MODE_MODE(st->fifo_mode) |
ADXL372_FIFO_CTL_SAMPLES_MODE(fifo_samples);
ret = regmap_write(st->regmap,
ADXL372_FIFO_SAMPLES, fifo_samples & 0xFF);
if (ret < 0)
return ret;
ret = regmap_write(st->regmap, ADXL372_FIFO_CTL, fifo_ctl);
if (ret < 0)
return ret;
return adxl372_set_op_mode(st, ADXL372_FULL_BW_MEASUREMENT);
}
static int adxl372_get_status(struct adxl372_state *st,
u8 *status1, u8 *status2,
u16 *fifo_entries)
{
__be32 buf;
u32 val;
int ret;
/* STATUS1, STATUS2, FIFO_ENTRIES2 and FIFO_ENTRIES are adjacent regs */
ret = regmap_bulk_read(st->regmap, ADXL372_STATUS_1,
&buf, sizeof(buf));
if (ret < 0)
return ret;
val = be32_to_cpu(buf);
*status1 = (val >> 24) & 0x0F;
*status2 = (val >> 16) & 0x0F;
/*
* FIFO_ENTRIES contains the least significant byte, and FIFO_ENTRIES2
* contains the two most significant bits
*/
*fifo_entries = val & 0x3FF;
return ret;
}
static void adxl372_arrange_axis_data(struct adxl372_state *st, __be16 *sample)
{
__be16 axis_sample[3];
int i = 0;
memset(axis_sample, 0, 3 * sizeof(__be16));
if (ADXL372_X_AXIS_EN(st->fifo_axis_mask))
axis_sample[i++] = sample[0];
if (ADXL372_Y_AXIS_EN(st->fifo_axis_mask))
axis_sample[i++] = sample[1];
if (ADXL372_Z_AXIS_EN(st->fifo_axis_mask))
axis_sample[i++] = sample[2];
memcpy(sample, axis_sample, 3 * sizeof(__be16));
}
static void adxl372_push_event(struct iio_dev *indio_dev, s64 timestamp, u8 status2)
{
unsigned int ev_dir = IIO_EV_DIR_NONE;
if (ADXL372_STATUS_2_ACT(status2))
ev_dir = IIO_EV_DIR_RISING;
if (ADXL372_STATUS_2_INACT(status2))
ev_dir = IIO_EV_DIR_FALLING;
if (ev_dir != IIO_EV_DIR_NONE)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X_OR_Y_OR_Z,
IIO_EV_TYPE_THRESH, ev_dir),
timestamp);
}
static irqreturn_t adxl372_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adxl372_state *st = iio_priv(indio_dev);
u8 status1, status2;
u16 fifo_entries;
int i, ret;
ret = adxl372_get_status(st, &status1, &status2, &fifo_entries);
if (ret < 0)
goto err;
adxl372_push_event(indio_dev, iio_get_time_ns(indio_dev), status2);
if (st->fifo_mode != ADXL372_FIFO_BYPASSED &&
ADXL372_STATUS_1_FIFO_FULL(status1)) {
/*
* When reading data from multiple axes from the FIFO,
* to ensure that data is not overwritten and stored out
* of order at least one sample set must be left in the
* FIFO after every read.
*/
fifo_entries -= st->fifo_set_size;
/* Read data from the FIFO */
ret = regmap_noinc_read(st->regmap, ADXL372_FIFO_DATA,
st->fifo_buf,
fifo_entries * sizeof(u16));
if (ret < 0)
goto err;
/* Each sample is 2 bytes */
for (i = 0; i < fifo_entries; i += st->fifo_set_size) {
/* filter peak detection data */
if (st->peak_fifo_mode_en)
adxl372_arrange_axis_data(st, &st->fifo_buf[i]);
iio_push_to_buffers(indio_dev, &st->fifo_buf[i]);
}
}
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int adxl372_setup(struct adxl372_state *st)
{
unsigned int regval;
int ret;
ret = regmap_read(st->regmap, ADXL372_DEVID, ®val);
if (ret < 0)
return ret;
if (regval != ADXL372_DEVID_VAL) {
dev_err(st->dev, "Invalid chip id %x\n", regval);
return -ENODEV;
}
/*
* Perform a software reset to make sure the device is in a consistent
* state after start up.
*/
ret = regmap_write(st->regmap, ADXL372_RESET, ADXL372_RESET_CODE);
if (ret < 0)
return ret;
ret = adxl372_set_op_mode(st, ADXL372_STANDBY);
if (ret < 0)
return ret;
/* Set threshold for activity detection to 1g */
ret = adxl372_set_activity_threshold(st, ADXL372_ACTIVITY,
true, true, 1000);
if (ret < 0)
return ret;
/* Set threshold for inactivity detection to 100mg */
ret = adxl372_set_activity_threshold(st, ADXL372_INACTIVITY,
true, true, 100);
if (ret < 0)
return ret;
/* Set activity processing in Looped mode */
ret = adxl372_set_act_proc_mode(st, ADXL372_LOOPED);
if (ret < 0)
return ret;
ret = adxl372_set_odr(st, ADXL372_ODR_6400HZ);
if (ret < 0)
return ret;
ret = adxl372_set_bandwidth(st, ADXL372_BW_3200HZ);
if (ret < 0)
return ret;
/* Set activity timer to 1ms */
ret = adxl372_set_activity_time_ms(st, 1);
if (ret < 0)
return ret;
/* Set inactivity timer to 10s */
ret = adxl372_set_inactivity_time_ms(st, 10000);
if (ret < 0)
return ret;
/* Set the mode of operation to full bandwidth measurement mode */
return adxl372_set_op_mode(st, ADXL372_FULL_BW_MEASUREMENT);
}
static int adxl372_reg_access(struct iio_dev *indio_dev,
unsigned int reg,
unsigned int writeval,
unsigned int *readval)
{
struct adxl372_state *st = iio_priv(indio_dev);
if (readval)
return regmap_read(st->regmap, reg, readval);
else
return regmap_write(st->regmap, reg, writeval);
}
static int adxl372_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long info)
{
struct adxl372_state *st = iio_priv(indio_dev);
int ret;
switch (info) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = adxl372_read_axis(st, chan->address);
iio_device_release_direct_mode(indio_dev);
if (ret < 0)
return ret;
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = ADXL372_USCALE;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = adxl372_samp_freq_tbl[st->odr];
return IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*val = adxl372_bw_freq_tbl[st->bw];
return IIO_VAL_INT;
}
return -EINVAL;
}
static int adxl372_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long info)
{
struct adxl372_state *st = iio_priv(indio_dev);
int odr_index, bw_index, ret;
switch (info) {
case IIO_CHAN_INFO_SAMP_FREQ:
odr_index = adxl372_find_closest_match(adxl372_samp_freq_tbl,
ARRAY_SIZE(adxl372_samp_freq_tbl),
val);
ret = adxl372_set_odr(st, odr_index);
if (ret < 0)
return ret;
/*
* The timer period depends on the ODR selected.
* At 3200 Hz and below, it is 6.6 ms; at 6400 Hz, it is 3.3 ms
*/
ret = adxl372_set_activity_time_ms(st, st->act_time_ms);
if (ret < 0)
return ret;
/*
* The timer period depends on the ODR selected.
* At 3200 Hz and below, it is 26 ms; at 6400 Hz, it is 13 ms
*/
ret = adxl372_set_inactivity_time_ms(st, st->inact_time_ms);
if (ret < 0)
return ret;
/*
* The maximum bandwidth is constrained to at most half of
* the ODR to ensure that the Nyquist criteria is not violated
*/
if (st->bw > odr_index)
ret = adxl372_set_bandwidth(st, odr_index);
return ret;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
bw_index = adxl372_find_closest_match(adxl372_bw_freq_tbl,
ARRAY_SIZE(adxl372_bw_freq_tbl),
val);
return adxl372_set_bandwidth(st, bw_index);
default:
return -EINVAL;
}
}
static int adxl372_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan,
enum iio_event_type type, enum iio_event_direction dir,
enum iio_event_info info, int *val, int *val2)
{
struct adxl372_state *st = iio_priv(indio_dev);
unsigned int addr;
u16 raw_value;
int ret;
switch (info) {
case IIO_EV_INFO_VALUE:
switch (dir) {
case IIO_EV_DIR_RISING:
addr = ADXL372_X_THRESH_ACT_H + 2 * chan->scan_index;
ret = adxl372_read_threshold_value(indio_dev, addr, &raw_value);
if (ret < 0)
return ret;
*val = raw_value * ADXL372_USCALE;
*val2 = 1000000;
return IIO_VAL_FRACTIONAL;
case IIO_EV_DIR_FALLING:
addr = ADXL372_X_THRESH_INACT_H + 2 * chan->scan_index;
ret = adxl372_read_threshold_value(indio_dev, addr, &raw_value);
if (ret < 0)
return ret;
*val = raw_value * ADXL372_USCALE;
*val2 = 1000000;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_EV_INFO_PERIOD:
switch (dir) {
case IIO_EV_DIR_RISING:
*val = st->act_time_ms;
*val2 = 1000;
return IIO_VAL_FRACTIONAL;
case IIO_EV_DIR_FALLING:
*val = st->inact_time_ms;
*val2 = 1000;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int adxl372_write_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan,
enum iio_event_type type, enum iio_event_direction dir,
enum iio_event_info info, int val, int val2)
{
struct adxl372_state *st = iio_priv(indio_dev);
unsigned int val_ms;
unsigned int addr;
u16 raw_val;
switch (info) {
case IIO_EV_INFO_VALUE:
raw_val = DIV_ROUND_UP(val * 1000000, ADXL372_USCALE);
switch (dir) {
case IIO_EV_DIR_RISING:
addr = ADXL372_X_THRESH_ACT_H + 2 * chan->scan_index;
return adxl372_write_threshold_value(indio_dev, addr, raw_val);
case IIO_EV_DIR_FALLING:
addr = ADXL372_X_THRESH_INACT_H + 2 * chan->scan_index;
return adxl372_write_threshold_value(indio_dev, addr, raw_val);
default:
return -EINVAL;
}
case IIO_EV_INFO_PERIOD:
val_ms = val * 1000 + DIV_ROUND_UP(val2, 1000);
switch (dir) {
case IIO_EV_DIR_RISING:
return adxl372_set_activity_time_ms(st, val_ms);
case IIO_EV_DIR_FALLING:
return adxl372_set_inactivity_time_ms(st, val_ms);
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int adxl372_read_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan,
enum iio_event_type type, enum iio_event_direction dir)
{
struct adxl372_state *st = iio_priv(indio_dev);
switch (dir) {
case IIO_EV_DIR_RISING:
return FIELD_GET(ADXL372_INT1_MAP_ACT_MSK, st->int1_bitmask);
case IIO_EV_DIR_FALLING:
return FIELD_GET(ADXL372_INT1_MAP_INACT_MSK, st->int1_bitmask);
default:
return -EINVAL;
}
}
static int adxl372_write_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan,
enum iio_event_type type, enum iio_event_direction dir,
int state)
{
struct adxl372_state *st = iio_priv(indio_dev);
switch (dir) {
case IIO_EV_DIR_RISING:
set_mask_bits(&st->int1_bitmask, ADXL372_INT1_MAP_ACT_MSK,
ADXL372_INT1_MAP_ACT_MODE(state));
break;
case IIO_EV_DIR_FALLING:
set_mask_bits(&st->int1_bitmask, ADXL372_INT1_MAP_INACT_MSK,
ADXL372_INT1_MAP_INACT_MODE(state));
break;
default:
return -EINVAL;
}
return adxl372_set_interrupts(st, st->int1_bitmask, 0);
}
static ssize_t adxl372_show_filter_freq_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adxl372_state *st = iio_priv(indio_dev);
int i;
size_t len = 0;
for (i = 0; i <= st->odr; i++)
len += scnprintf(buf + len, PAGE_SIZE - len,
"%d ", adxl372_bw_freq_tbl[i]);
buf[len - 1] = '\n';
return len;
}
static ssize_t adxl372_get_fifo_enabled(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adxl372_state *st = iio_priv(indio_dev);
return sprintf(buf, "%d\n", st->fifo_mode);
}
static ssize_t adxl372_get_fifo_watermark(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adxl372_state *st = iio_priv(indio_dev);
return sprintf(buf, "%d\n", st->watermark);
}
IIO_STATIC_CONST_DEVICE_ATTR(hwfifo_watermark_min, "1");
IIO_STATIC_CONST_DEVICE_ATTR(hwfifo_watermark_max,
__stringify(ADXL372_FIFO_SIZE));
static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,
adxl372_get_fifo_watermark, NULL, 0);
static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,
adxl372_get_fifo_enabled, NULL, 0);
static const struct iio_dev_attr *adxl372_fifo_attributes[] = {
&iio_dev_attr_hwfifo_watermark_min,
&iio_dev_attr_hwfifo_watermark_max,
&iio_dev_attr_hwfifo_watermark,
&iio_dev_attr_hwfifo_enabled,
NULL,
};
static int adxl372_set_watermark(struct iio_dev *indio_dev, unsigned int val)
{
struct adxl372_state *st = iio_priv(indio_dev);
if (val > ADXL372_FIFO_SIZE)
val = ADXL372_FIFO_SIZE;
st->watermark = val;
return 0;
}
static int adxl372_buffer_postenable(struct iio_dev *indio_dev)
{
struct adxl372_state *st = iio_priv(indio_dev);
unsigned int mask;
int i, ret;
st->int1_bitmask |= ADXL372_INT1_MAP_FIFO_FULL_MSK;
ret = adxl372_set_interrupts(st, st->int1_bitmask, 0);
if (ret < 0)
return ret;
mask = *indio_dev->active_scan_mask;
for (i = 0; i < ARRAY_SIZE(adxl372_axis_lookup_table); i++) {
if (mask == adxl372_axis_lookup_table[i].bits)
break;
}
if (i == ARRAY_SIZE(adxl372_axis_lookup_table))
return -EINVAL;
st->fifo_format = adxl372_axis_lookup_table[i].fifo_format;
st->fifo_axis_mask = adxl372_axis_lookup_table[i].bits;
st->fifo_set_size = bitmap_weight(indio_dev->active_scan_mask,
indio_dev->masklength);
/* Configure the FIFO to store sets of impact event peak. */
if (st->peak_fifo_mode_en) {
st->fifo_set_size = 3;
st->fifo_format = ADXL372_XYZ_PEAK_FIFO;
}
/*
* The 512 FIFO samples can be allotted in several ways, such as:
* 170 sample sets of concurrent 3-axis data
* 256 sample sets of concurrent 2-axis data (user selectable)
* 512 sample sets of single-axis data
* 170 sets of impact event peak (x, y, z)
*/
if ((st->watermark * st->fifo_set_size) > ADXL372_FIFO_SIZE)
st->watermark = (ADXL372_FIFO_SIZE / st->fifo_set_size);
st->fifo_mode = ADXL372_FIFO_STREAMED;
ret = adxl372_configure_fifo(st);
if (ret < 0) {
st->fifo_mode = ADXL372_FIFO_BYPASSED;
st->int1_bitmask &= ~ADXL372_INT1_MAP_FIFO_FULL_MSK;
adxl372_set_interrupts(st, st->int1_bitmask, 0);
return ret;
}
return 0;
}
static int adxl372_buffer_predisable(struct iio_dev *indio_dev)
{
struct adxl372_state *st = iio_priv(indio_dev);
st->int1_bitmask &= ~ADXL372_INT1_MAP_FIFO_FULL_MSK;
adxl372_set_interrupts(st, st->int1_bitmask, 0);
st->fifo_mode = ADXL372_FIFO_BYPASSED;
adxl372_configure_fifo(st);
return 0;
}
static const struct iio_buffer_setup_ops adxl372_buffer_ops = {
.postenable = adxl372_buffer_postenable,
.predisable = adxl372_buffer_predisable,
};
static int adxl372_dready_trig_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct adxl372_state *st = iio_priv(indio_dev);
if (state)
st->int1_bitmask |= ADXL372_INT1_MAP_FIFO_FULL_MSK;
return adxl372_set_interrupts(st, st->int1_bitmask, 0);
}
static int adxl372_validate_trigger(struct iio_dev *indio_dev,
struct iio_trigger *trig)
{
struct adxl372_state *st = iio_priv(indio_dev);
if (st->dready_trig != trig && st->peak_datardy_trig != trig)
return -EINVAL;
return 0;
}
static const struct iio_trigger_ops adxl372_trigger_ops = {
.validate_device = &iio_trigger_validate_own_device,
.set_trigger_state = adxl372_dready_trig_set_state,
};
static int adxl372_peak_dready_trig_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct adxl372_state *st = iio_priv(indio_dev);
if (state)
st->int1_bitmask |= ADXL372_INT1_MAP_FIFO_FULL_MSK;
st->peak_fifo_mode_en = state;
return adxl372_set_interrupts(st, st->int1_bitmask, 0);
}
static const struct iio_trigger_ops adxl372_peak_data_trigger_ops = {
.validate_device = &iio_trigger_validate_own_device,
.set_trigger_state = adxl372_peak_dready_trig_set_state,
};
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("400 800 1600 3200 6400");
static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
0444, adxl372_show_filter_freq_avail, NULL, 0);
static struct attribute *adxl372_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group adxl372_attrs_group = {
.attrs = adxl372_attributes,
};
static const struct iio_info adxl372_info = {
.validate_trigger = &adxl372_validate_trigger,
.attrs = &adxl372_attrs_group,
.read_raw = adxl372_read_raw,
.write_raw = adxl372_write_raw,
.read_event_config = adxl372_read_event_config,
.write_event_config = adxl372_write_event_config,
.read_event_value = adxl372_read_event_value,
.write_event_value = adxl372_write_event_value,
.debugfs_reg_access = &adxl372_reg_access,
.hwfifo_set_watermark = adxl372_set_watermark,
};
bool adxl372_readable_noinc_reg(struct device *dev, unsigned int reg)
{
return (reg == ADXL372_FIFO_DATA);
}
EXPORT_SYMBOL_NS_GPL(adxl372_readable_noinc_reg, IIO_ADXL372);
int adxl372_probe(struct device *dev, struct regmap *regmap,
int irq, const char *name)
{
struct iio_dev *indio_dev;
struct adxl372_state *st;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
st->dev = dev;
st->regmap = regmap;
st->irq = irq;
mutex_init(&st->threshold_m);
indio_dev->channels = adxl372_channels;
indio_dev->num_channels = ARRAY_SIZE(adxl372_channels);
indio_dev->available_scan_masks = adxl372_channel_masks;
indio_dev->name = name;
indio_dev->info = &adxl372_info;
indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
ret = adxl372_setup(st);
if (ret < 0) {
dev_err(dev, "ADXL372 setup failed\n");
return ret;
}
ret = devm_iio_triggered_buffer_setup_ext(dev,
indio_dev, NULL,
adxl372_trigger_handler,
IIO_BUFFER_DIRECTION_IN,
&adxl372_buffer_ops,
adxl372_fifo_attributes);
if (ret < 0)
return ret;
if (st->irq) {
st->dready_trig = devm_iio_trigger_alloc(dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (st->dready_trig == NULL)
return -ENOMEM;
st->peak_datardy_trig = devm_iio_trigger_alloc(dev,
"%s-dev%d-peak",
indio_dev->name,
iio_device_id(indio_dev));
if (!st->peak_datardy_trig)
return -ENOMEM;
st->dready_trig->ops = &adxl372_trigger_ops;
st->peak_datardy_trig->ops = &adxl372_peak_data_trigger_ops;
iio_trigger_set_drvdata(st->dready_trig, indio_dev);
iio_trigger_set_drvdata(st->peak_datardy_trig, indio_dev);
ret = devm_iio_trigger_register(dev, st->dready_trig);
if (ret < 0)
return ret;
ret = devm_iio_trigger_register(dev, st->peak_datardy_trig);
if (ret < 0)
return ret;
indio_dev->trig = iio_trigger_get(st->dready_trig);
ret = devm_request_threaded_irq(dev, st->irq,
iio_trigger_generic_data_rdy_poll,
NULL,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
indio_dev->name, st->dready_trig);
if (ret < 0)
return ret;
}
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(adxl372_probe, IIO_ADXL372);
MODULE_AUTHOR("Stefan Popa <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/adxl372.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL313 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Lucas Stankus <[email protected]>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf
*/
#include <linux/bitfield.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl313.h"
static const struct regmap_range adxl312_readable_reg_range[] = {
regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_DEVID0),
regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS),
};
static const struct regmap_range adxl313_readable_reg_range[] = {
regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_XID),
regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET),
regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS),
};
const struct regmap_access_table adxl312_readable_regs_table = {
.yes_ranges = adxl312_readable_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl312_readable_regs_table, IIO_ADXL313);
const struct regmap_access_table adxl313_readable_regs_table = {
.yes_ranges = adxl313_readable_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl313_readable_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl313_readable_regs_table, IIO_ADXL313);
const struct regmap_access_table adxl314_readable_regs_table = {
.yes_ranges = adxl312_readable_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl314_readable_regs_table, IIO_ADXL313);
static int adxl312_check_id(struct device *dev,
struct adxl313_data *data)
{
unsigned int regval;
int ret;
ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val);
if (ret)
return ret;
if (regval != ADXL313_DEVID0_ADXL312_314)
dev_warn(dev, "Invalid manufacturer ID: %#02x\n", regval);
return 0;
}
static int adxl313_check_id(struct device *dev,
struct adxl313_data *data)
{
unsigned int regval;
int ret;
ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val);
if (ret)
return ret;
if (regval != ADXL313_DEVID0)
dev_warn(dev, "Invalid manufacturer ID: 0x%02x\n", regval);
/* Check DEVID1 and PARTID */
if (regval == ADXL313_DEVID0) {
ret = regmap_read(data->regmap, ADXL313_REG_DEVID1, ®val);
if (ret)
return ret;
if (regval != ADXL313_DEVID1)
dev_warn(dev, "Invalid mems ID: 0x%02x\n", regval);
ret = regmap_read(data->regmap, ADXL313_REG_PARTID, ®val);
if (ret)
return ret;
if (regval != ADXL313_PARTID)
dev_warn(dev, "Invalid device ID: 0x%02x\n", regval);
}
return 0;
}
const struct adxl313_chip_info adxl31x_chip_info[] = {
[ADXL312] = {
.name = "adxl312",
.type = ADXL312,
.scale_factor = 28425072,
.variable_range = true,
.soft_reset = false,
.check_id = &adxl312_check_id,
},
[ADXL313] = {
.name = "adxl313",
.type = ADXL313,
.scale_factor = 9576806,
.variable_range = true,
.soft_reset = true,
.check_id = &adxl313_check_id,
},
[ADXL314] = {
.name = "adxl314",
.type = ADXL314,
.scale_factor = 478858719,
.variable_range = false,
.soft_reset = false,
.check_id = &adxl312_check_id,
},
};
EXPORT_SYMBOL_NS_GPL(adxl31x_chip_info, IIO_ADXL313);
static const struct regmap_range adxl312_writable_reg_range[] = {
regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP),
regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT),
regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL),
};
static const struct regmap_range adxl313_writable_reg_range[] = {
regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET),
regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP),
regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT),
regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL),
};
const struct regmap_access_table adxl312_writable_regs_table = {
.yes_ranges = adxl312_writable_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl312_writable_regs_table, IIO_ADXL313);
const struct regmap_access_table adxl313_writable_regs_table = {
.yes_ranges = adxl313_writable_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl313_writable_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl313_writable_regs_table, IIO_ADXL313);
const struct regmap_access_table adxl314_writable_regs_table = {
.yes_ranges = adxl312_writable_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl314_writable_regs_table, IIO_ADXL313);
static const int adxl313_odr_freqs[][2] = {
[0] = { 6, 250000 },
[1] = { 12, 500000 },
[2] = { 25, 0 },
[3] = { 50, 0 },
[4] = { 100, 0 },
[5] = { 200, 0 },
[6] = { 400, 0 },
[7] = { 800, 0 },
[8] = { 1600, 0 },
[9] = { 3200, 0 },
};
#define ADXL313_ACCEL_CHANNEL(index, axis) { \
.type = IIO_ACCEL, \
.address = index, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_type = { \
.realbits = 13, \
}, \
}
static const struct iio_chan_spec adxl313_channels[] = {
ADXL313_ACCEL_CHANNEL(0, X),
ADXL313_ACCEL_CHANNEL(1, Y),
ADXL313_ACCEL_CHANNEL(2, Z),
};
static int adxl313_set_odr(struct adxl313_data *data,
unsigned int freq1, unsigned int freq2)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE(adxl313_odr_freqs); i++) {
if (adxl313_odr_freqs[i][0] == freq1 &&
adxl313_odr_freqs[i][1] == freq2)
break;
}
if (i == ARRAY_SIZE(adxl313_odr_freqs))
return -EINVAL;
return regmap_update_bits(data->regmap, ADXL313_REG_BW_RATE,
ADXL313_RATE_MSK,
FIELD_PREP(ADXL313_RATE_MSK, ADXL313_RATE_BASE + i));
}
static int adxl313_read_axis(struct adxl313_data *data,
struct iio_chan_spec const *chan)
{
int ret;
mutex_lock(&data->lock);
ret = regmap_bulk_read(data->regmap,
ADXL313_REG_DATA_AXIS(chan->address),
&data->transf_buf, sizeof(data->transf_buf));
if (ret)
goto unlock_ret;
ret = le16_to_cpu(data->transf_buf);
unlock_ret:
mutex_unlock(&data->lock);
return ret;
}
static int adxl313_read_freq_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = (const int *)adxl313_odr_freqs;
*length = ARRAY_SIZE(adxl313_odr_freqs) * 2;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int adxl313_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct adxl313_data *data = iio_priv(indio_dev);
unsigned int regval;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = adxl313_read_axis(data, chan);
if (ret < 0)
return ret;
*val = sign_extend32(ret, chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = data->chip_info->scale_factor;
return IIO_VAL_INT_PLUS_NANO;
case IIO_CHAN_INFO_CALIBBIAS:
ret = regmap_read(data->regmap,
ADXL313_REG_OFS_AXIS(chan->address), ®val);
if (ret)
return ret;
/*
* 8-bit resolution at minimum range, that is 4x accel data scale
* factor at full resolution
*/
*val = sign_extend32(regval, 7) * 4;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = regmap_read(data->regmap, ADXL313_REG_BW_RATE, ®val);
if (ret)
return ret;
ret = FIELD_GET(ADXL313_RATE_MSK, regval) - ADXL313_RATE_BASE;
*val = adxl313_odr_freqs[ret][0];
*val2 = adxl313_odr_freqs[ret][1];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int adxl313_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct adxl313_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
/*
* 8-bit resolution at minimum range, that is 4x accel data scale
* factor at full resolution
*/
if (clamp_val(val, -128 * 4, 127 * 4) != val)
return -EINVAL;
return regmap_write(data->regmap,
ADXL313_REG_OFS_AXIS(chan->address),
val / 4);
case IIO_CHAN_INFO_SAMP_FREQ:
return adxl313_set_odr(data, val, val2);
default:
return -EINVAL;
}
}
static const struct iio_info adxl313_info = {
.read_raw = adxl313_read_raw,
.write_raw = adxl313_write_raw,
.read_avail = adxl313_read_freq_avail,
};
static int adxl313_setup(struct device *dev, struct adxl313_data *data,
int (*setup)(struct device *, struct regmap *))
{
int ret;
/*
* If sw reset available, ensures the device is in a consistent
* state after start up
*/
if (data->chip_info->soft_reset) {
ret = regmap_write(data->regmap, ADXL313_REG_SOFT_RESET,
ADXL313_SOFT_RESET);
if (ret)
return ret;
}
if (setup) {
ret = setup(dev, data->regmap);
if (ret)
return ret;
}
ret = data->chip_info->check_id(dev, data);
if (ret)
return ret;
/* Sets the range to maximum, full resolution, if applicable */
if (data->chip_info->variable_range) {
ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT,
ADXL313_RANGE_MSK,
FIELD_PREP(ADXL313_RANGE_MSK, ADXL313_RANGE_MAX));
if (ret)
return ret;
/* Enables full resolution */
ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT,
ADXL313_FULL_RES, ADXL313_FULL_RES);
if (ret)
return ret;
}
/* Enables measurement mode */
return regmap_update_bits(data->regmap, ADXL313_REG_POWER_CTL,
ADXL313_POWER_CTL_MSK,
ADXL313_MEASUREMENT_MODE);
}
/**
* adxl313_core_probe() - probe and setup for adxl313 accelerometer
* @dev: Driver model representation of the device
* @regmap: Register map of the device
* @chip_info: Structure containing device specific data
* @setup: Setup routine to be executed right before the standard device
* setup, can also be set to NULL if not required
*
* Return: 0 on success, negative errno on error cases
*/
int adxl313_core_probe(struct device *dev,
struct regmap *regmap,
const struct adxl313_chip_info *chip_info,
int (*setup)(struct device *, struct regmap *))
{
struct adxl313_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->regmap = regmap;
data->chip_info = chip_info;
mutex_init(&data->lock);
indio_dev->name = chip_info->name;
indio_dev->info = &adxl313_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = adxl313_channels;
indio_dev->num_channels = ARRAY_SIZE(adxl313_channels);
ret = adxl313_setup(dev, data, setup);
if (ret) {
dev_err(dev, "ADXL313 setup failed\n");
return ret;
}
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(adxl313_core_probe, IIO_ADXL313);
MODULE_AUTHOR("Lucas Stankus <[email protected]>");
MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer core driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/adxl313_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL345 3-Axis Digital Accelerometer I2C driver
*
* Copyright (c) 2017 Eva Rachel Retuya <[email protected]>
*
* 7-bit I2C slave address: 0x1D (ALT ADDRESS pin tied to VDDIO) or
* 0x53 (ALT ADDRESS pin grounded)
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl345.h"
static const struct regmap_config adxl345_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int adxl345_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &adxl345_i2c_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&client->dev, PTR_ERR(regmap), "Error initializing regmap\n");
return adxl345_core_probe(&client->dev, regmap);
}
static const struct i2c_device_id adxl345_i2c_id[] = {
{ "adxl345", ADXL345 },
{ "adxl375", ADXL375 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl345_i2c_id);
static const struct of_device_id adxl345_of_match[] = {
{ .compatible = "adi,adxl345", .data = (const void *)ADXL345 },
{ .compatible = "adi,adxl375", .data = (const void *)ADXL375 },
{ }
};
MODULE_DEVICE_TABLE(of, adxl345_of_match);
static const struct acpi_device_id adxl345_acpi_match[] = {
{ "ADS0345", ADXL345 },
{ }
};
MODULE_DEVICE_TABLE(acpi, adxl345_acpi_match);
static struct i2c_driver adxl345_i2c_driver = {
.driver = {
.name = "adxl345_i2c",
.of_match_table = adxl345_of_match,
.acpi_match_table = adxl345_acpi_match,
},
.probe = adxl345_i2c_probe,
.id_table = adxl345_i2c_id,
};
module_i2c_driver(adxl345_i2c_driver);
MODULE_AUTHOR("Eva Rachel Retuya <[email protected]>");
MODULE_DESCRIPTION("ADXL345 3-Axis Digital Accelerometer I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADXL345);
| linux-master | drivers/iio/accel/adxl345_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the MiraMEMS DA311 3-axis accelerometer
*
* Copyright (c) 2016 Hans de Goede <[email protected]>
* Copyright (c) 2011-2013 MiraMEMS Sensing Technology Co., Ltd.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/byteorder/generic.h>
#define DA311_CHIP_ID 0x13
/*
* Note register addressed go from 0 - 0x3f and then wrap.
* For some reason there are 2 banks with 0 - 0x3f addresses,
* rather then a single 0-0x7f bank.
*/
/* Bank 0 regs */
#define DA311_REG_BANK 0x0000
#define DA311_REG_LDO_REG 0x0006
#define DA311_REG_CHIP_ID 0x000f
#define DA311_REG_TEMP_CFG_REG 0x001f
#define DA311_REG_CTRL_REG1 0x0020
#define DA311_REG_CTRL_REG3 0x0022
#define DA311_REG_CTRL_REG4 0x0023
#define DA311_REG_CTRL_REG5 0x0024
#define DA311_REG_CTRL_REG6 0x0025
#define DA311_REG_STATUS_REG 0x0027
#define DA311_REG_OUT_X_L 0x0028
#define DA311_REG_OUT_X_H 0x0029
#define DA311_REG_OUT_Y_L 0x002a
#define DA311_REG_OUT_Y_H 0x002b
#define DA311_REG_OUT_Z_L 0x002c
#define DA311_REG_OUT_Z_H 0x002d
#define DA311_REG_INT1_CFG 0x0030
#define DA311_REG_INT1_SRC 0x0031
#define DA311_REG_INT1_THS 0x0032
#define DA311_REG_INT1_DURATION 0x0033
#define DA311_REG_INT2_CFG 0x0034
#define DA311_REG_INT2_SRC 0x0035
#define DA311_REG_INT2_THS 0x0036
#define DA311_REG_INT2_DURATION 0x0037
#define DA311_REG_CLICK_CFG 0x0038
#define DA311_REG_CLICK_SRC 0x0039
#define DA311_REG_CLICK_THS 0x003a
#define DA311_REG_TIME_LIMIT 0x003b
#define DA311_REG_TIME_LATENCY 0x003c
#define DA311_REG_TIME_WINDOW 0x003d
/* Bank 1 regs */
#define DA311_REG_SOFT_RESET 0x0105
#define DA311_REG_OTP_XOFF_L 0x0110
#define DA311_REG_OTP_XOFF_H 0x0111
#define DA311_REG_OTP_YOFF_L 0x0112
#define DA311_REG_OTP_YOFF_H 0x0113
#define DA311_REG_OTP_ZOFF_L 0x0114
#define DA311_REG_OTP_ZOFF_H 0x0115
#define DA311_REG_OTP_XSO 0x0116
#define DA311_REG_OTP_YSO 0x0117
#define DA311_REG_OTP_ZSO 0x0118
#define DA311_REG_OTP_TRIM_OSC 0x011b
#define DA311_REG_LPF_ABSOLUTE 0x011c
#define DA311_REG_TEMP_OFF1 0x0127
#define DA311_REG_TEMP_OFF2 0x0128
#define DA311_REG_TEMP_OFF3 0x0129
#define DA311_REG_OTP_TRIM_THERM_H 0x011a
/*
* a value of + or -1024 corresponds to + or - 1G
* scale = 9.81 / 1024 = 0.009580078
*/
static const int da311_nscale = 9580078;
#define DA311_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec da311_channels[] = {
/* | 0x80 comes from the android driver */
DA311_CHANNEL(DA311_REG_OUT_X_L | 0x80, X),
DA311_CHANNEL(DA311_REG_OUT_Y_L | 0x80, Y),
DA311_CHANNEL(DA311_REG_OUT_Z_L | 0x80, Z),
};
struct da311_data {
struct i2c_client *client;
};
static int da311_register_mask_write(struct i2c_client *client, u16 addr,
u8 mask, u8 data)
{
int ret;
u8 tmp_data = 0;
if (addr & 0xff00) {
/* Select bank 1 */
ret = i2c_smbus_write_byte_data(client, DA311_REG_BANK, 0x01);
if (ret < 0)
return ret;
}
if (mask != 0xff) {
ret = i2c_smbus_read_byte_data(client, addr);
if (ret < 0)
return ret;
tmp_data = ret;
}
tmp_data &= ~mask;
tmp_data |= data & mask;
ret = i2c_smbus_write_byte_data(client, addr & 0xff, tmp_data);
if (ret < 0)
return ret;
if (addr & 0xff00) {
/* Back to bank 0 */
ret = i2c_smbus_write_byte_data(client, DA311_REG_BANK, 0x00);
if (ret < 0)
return ret;
}
return 0;
}
/* Init sequence taken from the android driver */
static int da311_reset(struct i2c_client *client)
{
static const struct {
u16 addr;
u8 mask;
u8 data;
} init_data[] = {
{ DA311_REG_TEMP_CFG_REG, 0xff, 0x08 },
{ DA311_REG_CTRL_REG5, 0xff, 0x80 },
{ DA311_REG_CTRL_REG4, 0x30, 0x00 },
{ DA311_REG_CTRL_REG1, 0xff, 0x6f },
{ DA311_REG_TEMP_CFG_REG, 0xff, 0x88 },
{ DA311_REG_LDO_REG, 0xff, 0x02 },
{ DA311_REG_OTP_TRIM_OSC, 0xff, 0x27 },
{ DA311_REG_LPF_ABSOLUTE, 0xff, 0x30 },
{ DA311_REG_TEMP_OFF1, 0xff, 0x3f },
{ DA311_REG_TEMP_OFF2, 0xff, 0xff },
{ DA311_REG_TEMP_OFF3, 0xff, 0x0f },
};
int i, ret;
/* Reset */
ret = da311_register_mask_write(client, DA311_REG_SOFT_RESET,
0xff, 0xaa);
if (ret < 0)
return ret;
for (i = 0; i < ARRAY_SIZE(init_data); i++) {
ret = da311_register_mask_write(client,
init_data[i].addr,
init_data[i].mask,
init_data[i].data);
if (ret < 0)
return ret;
}
return 0;
}
static int da311_enable(struct i2c_client *client, bool enable)
{
u8 data = enable ? 0x00 : 0x20;
return da311_register_mask_write(client, DA311_REG_TEMP_CFG_REG,
0x20, data);
}
static int da311_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct da311_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_word_data(data->client, chan->address);
if (ret < 0)
return ret;
/*
* Values are 12 bits, stored as 16 bits with the 4
* least significant bits always 0.
*/
*val = (short)ret >> 4;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = da311_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info da311_info = {
.read_raw = da311_read_raw,
};
static void da311_disable(void *client)
{
da311_enable(client, false);
}
static int da311_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct da311_data *data;
ret = i2c_smbus_read_byte_data(client, DA311_REG_CHIP_ID);
if (ret != DA311_CHIP_ID)
return (ret < 0) ? ret : -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
indio_dev->info = &da311_info;
indio_dev->name = "da311";
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = da311_channels;
indio_dev->num_channels = ARRAY_SIZE(da311_channels);
ret = da311_reset(client);
if (ret < 0)
return ret;
ret = da311_enable(client, true);
if (ret < 0)
return ret;
ret = devm_add_action_or_reset(&client->dev, da311_disable, client);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int da311_suspend(struct device *dev)
{
return da311_enable(to_i2c_client(dev), false);
}
static int da311_resume(struct device *dev)
{
return da311_enable(to_i2c_client(dev), true);
}
static DEFINE_SIMPLE_DEV_PM_OPS(da311_pm_ops, da311_suspend, da311_resume);
static const struct i2c_device_id da311_i2c_id[] = {
{"da311", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, da311_i2c_id);
static struct i2c_driver da311_driver = {
.driver = {
.name = "da311",
.pm = pm_sleep_ptr(&da311_pm_ops),
},
.probe = da311_probe,
.id_table = da311_i2c_id,
};
module_i2c_driver(da311_driver);
MODULE_AUTHOR("Hans de Goede <[email protected]>");
MODULE_DESCRIPTION("MiraMEMS DA311 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/da311.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2014, Samsung Electronics Co. Ltd. All Rights Reserved.
*/
#include <linux/iio/common/ssp_sensors.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include "../common/ssp_sensors/ssp_iio_sensor.h"
#define SSP_CHANNEL_COUNT 3
#define SSP_ACCEL_NAME "ssp-accelerometer"
static const char ssp_accel_device_name[] = SSP_ACCEL_NAME;
enum ssp_accel_3d_channel {
SSP_CHANNEL_SCAN_INDEX_X,
SSP_CHANNEL_SCAN_INDEX_Y,
SSP_CHANNEL_SCAN_INDEX_Z,
SSP_CHANNEL_SCAN_INDEX_TIME,
};
static int ssp_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
u32 t;
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
t = ssp_get_sensor_delay(data, SSP_ACCELEROMETER_SENSOR);
ssp_convert_to_freq(t, val, val2);
return IIO_VAL_INT_PLUS_MICRO;
default:
break;
}
return -EINVAL;
}
static int ssp_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
int ret;
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = ssp_convert_to_time(val, val2);
ret = ssp_change_delay(data, SSP_ACCELEROMETER_SENSOR, ret);
if (ret < 0)
dev_err(&indio_dev->dev, "accel sensor enable fail\n");
return ret;
default:
break;
}
return -EINVAL;
}
static const struct iio_info ssp_accel_iio_info = {
.read_raw = &ssp_accel_read_raw,
.write_raw = &ssp_accel_write_raw,
};
static const unsigned long ssp_accel_scan_mask[] = { 0x7, 0, };
static const struct iio_chan_spec ssp_acc_channels[] = {
SSP_CHANNEL_AG(IIO_ACCEL, IIO_MOD_X, SSP_CHANNEL_SCAN_INDEX_X),
SSP_CHANNEL_AG(IIO_ACCEL, IIO_MOD_Y, SSP_CHANNEL_SCAN_INDEX_Y),
SSP_CHANNEL_AG(IIO_ACCEL, IIO_MOD_Z, SSP_CHANNEL_SCAN_INDEX_Z),
SSP_CHAN_TIMESTAMP(SSP_CHANNEL_SCAN_INDEX_TIME),
};
static int ssp_process_accel_data(struct iio_dev *indio_dev, void *buf,
int64_t timestamp)
{
return ssp_common_process_data(indio_dev, buf, SSP_ACCELEROMETER_SIZE,
timestamp);
}
static const struct iio_buffer_setup_ops ssp_accel_buffer_ops = {
.postenable = &ssp_common_buffer_postenable,
.postdisable = &ssp_common_buffer_postdisable,
};
static int ssp_accel_probe(struct platform_device *pdev)
{
int ret;
struct iio_dev *indio_dev;
struct ssp_sensor_data *spd;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*spd));
if (!indio_dev)
return -ENOMEM;
spd = iio_priv(indio_dev);
spd->process_data = ssp_process_accel_data;
spd->type = SSP_ACCELEROMETER_SENSOR;
indio_dev->name = ssp_accel_device_name;
indio_dev->info = &ssp_accel_iio_info;
indio_dev->channels = ssp_acc_channels;
indio_dev->num_channels = ARRAY_SIZE(ssp_acc_channels);
indio_dev->available_scan_masks = ssp_accel_scan_mask;
ret = devm_iio_kfifo_buffer_setup(&pdev->dev, indio_dev,
&ssp_accel_buffer_ops);
if (ret)
return ret;
platform_set_drvdata(pdev, indio_dev);
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret < 0)
return ret;
/* ssp registering should be done after all iio setup */
ssp_register_consumer(indio_dev, SSP_ACCELEROMETER_SENSOR);
return 0;
}
static struct platform_driver ssp_accel_driver = {
.driver = {
.name = SSP_ACCEL_NAME,
},
.probe = ssp_accel_probe,
};
module_platform_driver(ssp_accel_driver);
MODULE_AUTHOR("Karol Wrona <[email protected]>");
MODULE_DESCRIPTION("Samsung sensorhub accelerometers driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_SSP_SENSORS);
| linux-master | drivers/iio/accel/ssp_accel_sensor.c |
// SPDX-License-Identifier: GPL-2.0
/*
* mma8452.c - Support for following Freescale / NXP 3-axis accelerometers:
*
* device name digital output 7-bit I2C slave address (pin selectable)
* ---------------------------------------------------------------------
* MMA8451Q 14 bit 0x1c / 0x1d
* MMA8452Q 12 bit 0x1c / 0x1d
* MMA8453Q 10 bit 0x1c / 0x1d
* MMA8652FC 12 bit 0x1d
* MMA8653FC 10 bit 0x1d
* FXLS8471Q 14 bit 0x1e / 0x1d / 0x1c / 0x1f
*
* Copyright 2015 Martin Kepplinger <[email protected]>
* Copyright 2014 Peter Meerwald <[email protected]>
*
*
* TODO: orientation events
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/events.h>
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#define MMA8452_STATUS 0x00
#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
#define MMA8452_OUT_X 0x01 /* MSB first */
#define MMA8452_OUT_Y 0x03
#define MMA8452_OUT_Z 0x05
#define MMA8452_INT_SRC 0x0c
#define MMA8452_WHO_AM_I 0x0d
#define MMA8452_DATA_CFG 0x0e
#define MMA8452_DATA_CFG_FS_MASK GENMASK(1, 0)
#define MMA8452_DATA_CFG_FS_2G 0
#define MMA8452_DATA_CFG_FS_4G 1
#define MMA8452_DATA_CFG_FS_8G 2
#define MMA8452_DATA_CFG_HPF_MASK BIT(4)
#define MMA8452_HP_FILTER_CUTOFF 0x0f
#define MMA8452_HP_FILTER_CUTOFF_SEL_MASK GENMASK(1, 0)
#define MMA8452_FF_MT_CFG 0x15
#define MMA8452_FF_MT_CFG_OAE BIT(6)
#define MMA8452_FF_MT_CFG_ELE BIT(7)
#define MMA8452_FF_MT_SRC 0x16
#define MMA8452_FF_MT_SRC_XHE BIT(1)
#define MMA8452_FF_MT_SRC_YHE BIT(3)
#define MMA8452_FF_MT_SRC_ZHE BIT(5)
#define MMA8452_FF_MT_THS 0x17
#define MMA8452_FF_MT_THS_MASK 0x7f
#define MMA8452_FF_MT_COUNT 0x18
#define MMA8452_FF_MT_CHAN_SHIFT 3
#define MMA8452_TRANSIENT_CFG 0x1d
#define MMA8452_TRANSIENT_CFG_CHAN(chan) BIT(chan + 1)
#define MMA8452_TRANSIENT_CFG_HPF_BYP BIT(0)
#define MMA8452_TRANSIENT_CFG_ELE BIT(4)
#define MMA8452_TRANSIENT_SRC 0x1e
#define MMA8452_TRANSIENT_SRC_XTRANSE BIT(1)
#define MMA8452_TRANSIENT_SRC_YTRANSE BIT(3)
#define MMA8452_TRANSIENT_SRC_ZTRANSE BIT(5)
#define MMA8452_TRANSIENT_THS 0x1f
#define MMA8452_TRANSIENT_THS_MASK GENMASK(6, 0)
#define MMA8452_TRANSIENT_COUNT 0x20
#define MMA8452_TRANSIENT_CHAN_SHIFT 1
#define MMA8452_CTRL_REG1 0x2a
#define MMA8452_CTRL_ACTIVE BIT(0)
#define MMA8452_CTRL_DR_MASK GENMASK(5, 3)
#define MMA8452_CTRL_DR_SHIFT 3
#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
#define MMA8452_CTRL_REG2 0x2b
#define MMA8452_CTRL_REG2_RST BIT(6)
#define MMA8452_CTRL_REG2_MODS_SHIFT 3
#define MMA8452_CTRL_REG2_MODS_MASK 0x1b
#define MMA8452_CTRL_REG4 0x2d
#define MMA8452_CTRL_REG5 0x2e
#define MMA8452_OFF_X 0x2f
#define MMA8452_OFF_Y 0x30
#define MMA8452_OFF_Z 0x31
#define MMA8452_MAX_REG 0x31
#define MMA8452_INT_DRDY BIT(0)
#define MMA8452_INT_FF_MT BIT(2)
#define MMA8452_INT_TRANS BIT(5)
#define MMA8451_DEVICE_ID 0x1a
#define MMA8452_DEVICE_ID 0x2a
#define MMA8453_DEVICE_ID 0x3a
#define MMA8652_DEVICE_ID 0x4a
#define MMA8653_DEVICE_ID 0x5a
#define FXLS8471_DEVICE_ID 0x6a
#define MMA8452_AUTO_SUSPEND_DELAY_MS 2000
struct mma8452_data {
struct i2c_client *client;
struct mutex lock;
struct iio_mount_matrix orientation;
u8 ctrl_reg1;
u8 data_cfg;
const struct mma_chip_info *chip_info;
int sleep_val;
struct regulator *vdd_reg;
struct regulator *vddio_reg;
/* Ensure correct alignment of time stamp when present */
struct {
__be16 channels[3];
s64 ts __aligned(8);
} buffer;
};
/**
* struct mma8452_event_regs - chip specific data related to events
* @ev_cfg: event config register address
* @ev_cfg_ele: latch bit in event config register
* @ev_cfg_chan_shift: number of the bit to enable events in X
* direction; in event config register
* @ev_src: event source register address
* @ev_ths: event threshold register address
* @ev_ths_mask: mask for the threshold value
* @ev_count: event count (period) register address
*
* Since not all chips supported by the driver support comparing high pass
* filtered data for events (interrupts), different interrupt sources are
* used for different chips and the relevant registers are included here.
*/
struct mma8452_event_regs {
u8 ev_cfg;
u8 ev_cfg_ele;
u8 ev_cfg_chan_shift;
u8 ev_src;
u8 ev_ths;
u8 ev_ths_mask;
u8 ev_count;
};
static const struct mma8452_event_regs ff_mt_ev_regs = {
.ev_cfg = MMA8452_FF_MT_CFG,
.ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_FF_MT_CHAN_SHIFT,
.ev_src = MMA8452_FF_MT_SRC,
.ev_ths = MMA8452_FF_MT_THS,
.ev_ths_mask = MMA8452_FF_MT_THS_MASK,
.ev_count = MMA8452_FF_MT_COUNT
};
static const struct mma8452_event_regs trans_ev_regs = {
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_TRANSIENT_CHAN_SHIFT,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
};
/**
* struct mma_chip_info - chip specific data
* @name: part number of device reported via 'name' attr
* @chip_id: WHO_AM_I register's value
* @channels: struct iio_chan_spec matching the device's
* capabilities
* @num_channels: number of channels
* @mma_scales: scale factors for converting register values
* to m/s^2; 3 modes: 2g, 4g, 8g; 2 integers
* per mode: m/s^2 and micro m/s^2
* @all_events: all events supported by this chip
* @enabled_events: event flags enabled and handled by this driver
*/
struct mma_chip_info {
const char *name;
u8 chip_id;
const struct iio_chan_spec *channels;
int num_channels;
const int mma_scales[3][2];
int all_events;
int enabled_events;
};
enum {
idx_x,
idx_y,
idx_z,
idx_ts,
};
static int mma8452_drdy(struct mma8452_data *data)
{
int tries = 150;
while (tries-- > 0) {
int ret = i2c_smbus_read_byte_data(data->client,
MMA8452_STATUS);
if (ret < 0)
return ret;
if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
return 0;
if (data->sleep_val <= 20)
usleep_range(data->sleep_val * 250,
data->sleep_val * 500);
else
msleep(20);
}
dev_err(&data->client->dev, "data not ready\n");
return -EIO;
}
static int mma8452_set_runtime_pm_state(struct i2c_client *client, bool on)
{
#ifdef CONFIG_PM
int ret;
if (on) {
ret = pm_runtime_resume_and_get(&client->dev);
} else {
pm_runtime_mark_last_busy(&client->dev);
ret = pm_runtime_put_autosuspend(&client->dev);
}
if (ret < 0) {
dev_err(&client->dev,
"failed to change power state to %d\n", on);
return ret;
}
#endif
return 0;
}
static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
{
int ret = mma8452_drdy(data);
if (ret < 0)
return ret;
ret = mma8452_set_runtime_pm_state(data->client, true);
if (ret)
return ret;
ret = i2c_smbus_read_i2c_block_data(data->client, MMA8452_OUT_X,
3 * sizeof(__be16), (u8 *)buf);
ret = mma8452_set_runtime_pm_state(data->client, false);
return ret;
}
static ssize_t mma8452_show_int_plus_micros(char *buf, const int (*vals)[2],
int n)
{
size_t len = 0;
while (n-- > 0)
len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
vals[n][0], vals[n][1]);
/* replace trailing space by newline */
buf[len - 1] = '\n';
return len;
}
static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
int val, int val2)
{
while (n-- > 0)
if (val == vals[n][0] && val2 == vals[n][1])
return n;
return -EINVAL;
}
static unsigned int mma8452_get_odr_index(struct mma8452_data *data)
{
return (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
MMA8452_CTRL_DR_SHIFT;
}
static const int mma8452_samp_freq[8][2] = {
{800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
{6, 250000}, {1, 560000}
};
/* Datasheet table: step time "Relationship with the ODR" (sample frequency) */
static const unsigned int mma8452_time_step_us[4][8] = {
{ 1250, 2500, 5000, 10000, 20000, 20000, 20000, 20000 }, /* normal */
{ 1250, 2500, 5000, 10000, 20000, 80000, 80000, 80000 }, /* l p l n */
{ 1250, 2500, 2500, 2500, 2500, 2500, 2500, 2500 }, /* high res*/
{ 1250, 2500, 5000, 10000, 20000, 80000, 160000, 160000 } /* l p */
};
/* Datasheet table "High-Pass Filter Cutoff Options" */
static const int mma8452_hp_filter_cutoff[4][8][4][2] = {
{ /* normal */
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} }, /* 800 Hz sample */
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} }, /* 400 Hz sample */
{ {8, 0}, {4, 0}, {2, 0}, {1, 0} }, /* 200 Hz sample */
{ {4, 0}, {2, 0}, {1, 0}, {0, 500000} }, /* 100 Hz sample */
{ {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 50 Hz sample */
{ {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 12.5 Hz sample */
{ {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 6.25 Hz sample */
{ {2, 0}, {1, 0}, {0, 500000}, {0, 250000} } /* 1.56 Hz sample */
},
{ /* low noise low power */
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {8, 0}, {4, 0}, {2, 0}, {1, 0} },
{ {4, 0}, {2, 0}, {1, 0}, {0, 500000} },
{ {2, 0}, {1, 0}, {0, 500000}, {0, 250000} },
{ {0, 500000}, {0, 250000}, {0, 125000}, {0, 063000} },
{ {0, 500000}, {0, 250000}, {0, 125000}, {0, 063000} },
{ {0, 500000}, {0, 250000}, {0, 125000}, {0, 063000} }
},
{ /* high resolution */
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} }
},
{ /* low power */
{ {16, 0}, {8, 0}, {4, 0}, {2, 0} },
{ {8, 0}, {4, 0}, {2, 0}, {1, 0} },
{ {4, 0}, {2, 0}, {1, 0}, {0, 500000} },
{ {2, 0}, {1, 0}, {0, 500000}, {0, 250000} },
{ {1, 0}, {0, 500000}, {0, 250000}, {0, 125000} },
{ {0, 250000}, {0, 125000}, {0, 063000}, {0, 031000} },
{ {0, 250000}, {0, 125000}, {0, 063000}, {0, 031000} },
{ {0, 250000}, {0, 125000}, {0, 063000}, {0, 031000} }
}
};
/* Datasheet table "MODS Oversampling modes averaging values at each ODR" */
static const u16 mma8452_os_ratio[4][8] = {
/* 800 Hz, 400 Hz, ... , 1.56 Hz */
{ 2, 4, 4, 4, 4, 16, 32, 128 }, /* normal */
{ 2, 4, 4, 4, 4, 4, 8, 32 }, /* low power low noise */
{ 2, 4, 8, 16, 32, 128, 256, 1024 }, /* high resolution */
{ 2, 2, 2, 2, 2, 2, 4, 16 } /* low power */
};
static int mma8452_get_power_mode(struct mma8452_data *data)
{
int reg;
reg = i2c_smbus_read_byte_data(data->client,
MMA8452_CTRL_REG2);
if (reg < 0)
return reg;
return ((reg & MMA8452_CTRL_REG2_MODS_MASK) >>
MMA8452_CTRL_REG2_MODS_SHIFT);
}
static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
ARRAY_SIZE(mma8452_samp_freq));
}
static ssize_t mma8452_show_scale_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct mma8452_data *data = iio_priv(indio_dev);
return mma8452_show_int_plus_micros(buf, data->chip_info->mma_scales,
ARRAY_SIZE(data->chip_info->mma_scales));
}
static ssize_t mma8452_show_hp_cutoff_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct mma8452_data *data = iio_priv(indio_dev);
int i, j;
i = mma8452_get_odr_index(data);
j = mma8452_get_power_mode(data);
if (j < 0)
return j;
return mma8452_show_int_plus_micros(buf, mma8452_hp_filter_cutoff[j][i],
ARRAY_SIZE(mma8452_hp_filter_cutoff[0][0]));
}
static ssize_t mma8452_show_os_ratio_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct mma8452_data *data = iio_priv(indio_dev);
int i = mma8452_get_odr_index(data);
int j;
u16 val = 0;
size_t len = 0;
for (j = 0; j < ARRAY_SIZE(mma8452_os_ratio); j++) {
if (val == mma8452_os_ratio[j][i])
continue;
val = mma8452_os_ratio[j][i];
len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", val);
}
buf[len - 1] = '\n';
return len;
}
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
mma8452_show_scale_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_accel_filter_high_pass_3db_frequency_available,
0444, mma8452_show_hp_cutoff_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_accel_oversampling_ratio_available, 0444,
mma8452_show_os_ratio_avail, NULL, 0);
static int mma8452_get_samp_freq_index(struct mma8452_data *data,
int val, int val2)
{
return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
ARRAY_SIZE(mma8452_samp_freq),
val, val2);
}
static int mma8452_get_scale_index(struct mma8452_data *data, int val, int val2)
{
return mma8452_get_int_plus_micros_index(data->chip_info->mma_scales,
ARRAY_SIZE(data->chip_info->mma_scales), val, val2);
}
static int mma8452_get_hp_filter_index(struct mma8452_data *data,
int val, int val2)
{
int i, j;
i = mma8452_get_odr_index(data);
j = mma8452_get_power_mode(data);
if (j < 0)
return j;
return mma8452_get_int_plus_micros_index(mma8452_hp_filter_cutoff[j][i],
ARRAY_SIZE(mma8452_hp_filter_cutoff[0][0]), val, val2);
}
static int mma8452_read_hp_filter(struct mma8452_data *data, int *hz, int *uHz)
{
int j, i, ret;
ret = i2c_smbus_read_byte_data(data->client, MMA8452_HP_FILTER_CUTOFF);
if (ret < 0)
return ret;
i = mma8452_get_odr_index(data);
j = mma8452_get_power_mode(data);
if (j < 0)
return j;
ret &= MMA8452_HP_FILTER_CUTOFF_SEL_MASK;
*hz = mma8452_hp_filter_cutoff[j][i][ret][0];
*uHz = mma8452_hp_filter_cutoff[j][i][ret][1];
return 0;
}
static int mma8452_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma8452_data *data = iio_priv(indio_dev);
__be16 buffer[3];
int i, ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&data->lock);
ret = mma8452_read(data, buffer);
mutex_unlock(&data->lock);
iio_device_release_direct_mode(indio_dev);
if (ret < 0)
return ret;
*val = sign_extend32(be16_to_cpu(
buffer[chan->scan_index]) >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
*val = data->chip_info->mma_scales[i][0];
*val2 = data->chip_info->mma_scales[i][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
i = mma8452_get_odr_index(data);
*val = mma8452_samp_freq[i][0];
*val2 = mma8452_samp_freq[i][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBBIAS:
ret = i2c_smbus_read_byte_data(data->client,
MMA8452_OFF_X +
chan->scan_index);
if (ret < 0)
return ret;
*val = sign_extend32(ret, 7);
return IIO_VAL_INT;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
if (data->data_cfg & MMA8452_DATA_CFG_HPF_MASK) {
ret = mma8452_read_hp_filter(data, val, val2);
if (ret < 0)
return ret;
} else {
*val = 0;
*val2 = 0;
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
ret = mma8452_get_power_mode(data);
if (ret < 0)
return ret;
i = mma8452_get_odr_index(data);
*val = mma8452_os_ratio[ret][i];
return IIO_VAL_INT;
}
return -EINVAL;
}
static int mma8452_calculate_sleep(struct mma8452_data *data)
{
int ret, i = mma8452_get_odr_index(data);
if (mma8452_samp_freq[i][0] > 0)
ret = 1000 / mma8452_samp_freq[i][0];
else
ret = 1000;
return ret == 0 ? 1 : ret;
}
static int mma8452_standby(struct mma8452_data *data)
{
return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
}
static int mma8452_active(struct mma8452_data *data)
{
return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
data->ctrl_reg1);
}
/* returns >0 if active, 0 if in standby and <0 on error */
static int mma8452_is_active(struct mma8452_data *data)
{
int reg;
reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG1);
if (reg < 0)
return reg;
return reg & MMA8452_CTRL_ACTIVE;
}
static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
{
int ret;
int is_active;
mutex_lock(&data->lock);
is_active = mma8452_is_active(data);
if (is_active < 0) {
ret = is_active;
goto fail;
}
/* config can only be changed when in standby */
if (is_active > 0) {
ret = mma8452_standby(data);
if (ret < 0)
goto fail;
}
ret = i2c_smbus_write_byte_data(data->client, reg, val);
if (ret < 0)
goto fail;
if (is_active > 0) {
ret = mma8452_active(data);
if (ret < 0)
goto fail;
}
ret = 0;
fail:
mutex_unlock(&data->lock);
return ret;
}
static int mma8452_set_power_mode(struct mma8452_data *data, u8 mode)
{
int reg;
reg = i2c_smbus_read_byte_data(data->client,
MMA8452_CTRL_REG2);
if (reg < 0)
return reg;
reg &= ~MMA8452_CTRL_REG2_MODS_MASK;
reg |= mode << MMA8452_CTRL_REG2_MODS_SHIFT;
return mma8452_change_config(data, MMA8452_CTRL_REG2, reg);
}
/* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */
static int mma8452_freefall_mode_enabled(struct mma8452_data *data)
{
int val;
val = i2c_smbus_read_byte_data(data->client, MMA8452_FF_MT_CFG);
if (val < 0)
return val;
return !(val & MMA8452_FF_MT_CFG_OAE);
}
static int mma8452_set_freefall_mode(struct mma8452_data *data, bool state)
{
int val;
if ((state && mma8452_freefall_mode_enabled(data)) ||
(!state && !(mma8452_freefall_mode_enabled(data))))
return 0;
val = i2c_smbus_read_byte_data(data->client, MMA8452_FF_MT_CFG);
if (val < 0)
return val;
if (state) {
val |= BIT(idx_x + MMA8452_FF_MT_CHAN_SHIFT);
val |= BIT(idx_y + MMA8452_FF_MT_CHAN_SHIFT);
val |= BIT(idx_z + MMA8452_FF_MT_CHAN_SHIFT);
val &= ~MMA8452_FF_MT_CFG_OAE;
} else {
val &= ~BIT(idx_x + MMA8452_FF_MT_CHAN_SHIFT);
val &= ~BIT(idx_y + MMA8452_FF_MT_CHAN_SHIFT);
val &= ~BIT(idx_z + MMA8452_FF_MT_CHAN_SHIFT);
val |= MMA8452_FF_MT_CFG_OAE;
}
return mma8452_change_config(data, MMA8452_FF_MT_CFG, val);
}
static int mma8452_set_hp_filter_frequency(struct mma8452_data *data,
int val, int val2)
{
int i, reg;
i = mma8452_get_hp_filter_index(data, val, val2);
if (i < 0)
return i;
reg = i2c_smbus_read_byte_data(data->client,
MMA8452_HP_FILTER_CUTOFF);
if (reg < 0)
return reg;
reg &= ~MMA8452_HP_FILTER_CUTOFF_SEL_MASK;
reg |= i;
return mma8452_change_config(data, MMA8452_HP_FILTER_CUTOFF, reg);
}
static int mma8452_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct mma8452_data *data = iio_priv(indio_dev);
int i, ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
i = mma8452_get_samp_freq_index(data, val, val2);
if (i < 0) {
ret = i;
break;
}
data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
data->sleep_val = mma8452_calculate_sleep(data);
ret = mma8452_change_config(data, MMA8452_CTRL_REG1,
data->ctrl_reg1);
break;
case IIO_CHAN_INFO_SCALE:
i = mma8452_get_scale_index(data, val, val2);
if (i < 0) {
ret = i;
break;
}
data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
data->data_cfg |= i;
ret = mma8452_change_config(data, MMA8452_DATA_CFG,
data->data_cfg);
break;
case IIO_CHAN_INFO_CALIBBIAS:
if (val < -128 || val > 127) {
ret = -EINVAL;
break;
}
ret = mma8452_change_config(data,
MMA8452_OFF_X + chan->scan_index,
val);
break;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
if (val == 0 && val2 == 0) {
data->data_cfg &= ~MMA8452_DATA_CFG_HPF_MASK;
} else {
data->data_cfg |= MMA8452_DATA_CFG_HPF_MASK;
ret = mma8452_set_hp_filter_frequency(data, val, val2);
if (ret < 0)
break;
}
ret = mma8452_change_config(data, MMA8452_DATA_CFG,
data->data_cfg);
break;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
ret = mma8452_get_odr_index(data);
for (i = 0; i < ARRAY_SIZE(mma8452_os_ratio); i++) {
if (mma8452_os_ratio[i][ret] == val) {
ret = mma8452_set_power_mode(data, i);
break;
}
}
break;
default:
ret = -EINVAL;
break;
}
iio_device_release_direct_mode(indio_dev);
return ret;
}
static int mma8452_get_event_regs(struct mma8452_data *data,
const struct iio_chan_spec *chan, enum iio_event_direction dir,
const struct mma8452_event_regs **ev_reg)
{
if (!chan)
return -EINVAL;
switch (chan->type) {
case IIO_ACCEL:
switch (dir) {
case IIO_EV_DIR_RISING:
if ((data->chip_info->all_events
& MMA8452_INT_TRANS) &&
(data->chip_info->enabled_events
& MMA8452_INT_TRANS))
*ev_reg = &trans_ev_regs;
else
*ev_reg = &ff_mt_ev_regs;
return 0;
case IIO_EV_DIR_FALLING:
*ev_reg = &ff_mt_ev_regs;
return 0;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma8452_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct mma8452_data *data = iio_priv(indio_dev);
int ret, us, power_mode;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
switch (info) {
case IIO_EV_INFO_VALUE:
ret = i2c_smbus_read_byte_data(data->client, ev_regs->ev_ths);
if (ret < 0)
return ret;
*val = ret & ev_regs->ev_ths_mask;
return IIO_VAL_INT;
case IIO_EV_INFO_PERIOD:
ret = i2c_smbus_read_byte_data(data->client, ev_regs->ev_count);
if (ret < 0)
return ret;
power_mode = mma8452_get_power_mode(data);
if (power_mode < 0)
return power_mode;
us = ret * mma8452_time_step_us[power_mode][
mma8452_get_odr_index(data)];
*val = us / USEC_PER_SEC;
*val2 = us % USEC_PER_SEC;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_EV_INFO_HIGH_PASS_FILTER_3DB:
ret = i2c_smbus_read_byte_data(data->client,
MMA8452_TRANSIENT_CFG);
if (ret < 0)
return ret;
if (ret & MMA8452_TRANSIENT_CFG_HPF_BYP) {
*val = 0;
*val2 = 0;
} else {
ret = mma8452_read_hp_filter(data, val, val2);
if (ret < 0)
return ret;
}
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int mma8452_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct mma8452_data *data = iio_priv(indio_dev);
int ret, reg, steps;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
switch (info) {
case IIO_EV_INFO_VALUE:
if (val < 0 || val > ev_regs->ev_ths_mask)
return -EINVAL;
return mma8452_change_config(data, ev_regs->ev_ths, val);
case IIO_EV_INFO_PERIOD:
ret = mma8452_get_power_mode(data);
if (ret < 0)
return ret;
steps = (val * USEC_PER_SEC + val2) /
mma8452_time_step_us[ret][
mma8452_get_odr_index(data)];
if (steps < 0 || steps > 0xff)
return -EINVAL;
return mma8452_change_config(data, ev_regs->ev_count, steps);
case IIO_EV_INFO_HIGH_PASS_FILTER_3DB:
reg = i2c_smbus_read_byte_data(data->client,
MMA8452_TRANSIENT_CFG);
if (reg < 0)
return reg;
if (val == 0 && val2 == 0) {
reg |= MMA8452_TRANSIENT_CFG_HPF_BYP;
} else {
reg &= ~MMA8452_TRANSIENT_CFG_HPF_BYP;
ret = mma8452_set_hp_filter_frequency(data, val, val2);
if (ret < 0)
return ret;
}
return mma8452_change_config(data, MMA8452_TRANSIENT_CFG, reg);
default:
return -EINVAL;
}
}
static int mma8452_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct mma8452_data *data = iio_priv(indio_dev);
int ret;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
switch (dir) {
case IIO_EV_DIR_FALLING:
return mma8452_freefall_mode_enabled(data);
case IIO_EV_DIR_RISING:
ret = i2c_smbus_read_byte_data(data->client,
ev_regs->ev_cfg);
if (ret < 0)
return ret;
return !!(ret & BIT(chan->scan_index +
ev_regs->ev_cfg_chan_shift));
default:
return -EINVAL;
}
}
static int mma8452_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct mma8452_data *data = iio_priv(indio_dev);
int val, ret;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
ret = mma8452_set_runtime_pm_state(data->client, state);
if (ret)
return ret;
switch (dir) {
case IIO_EV_DIR_FALLING:
return mma8452_set_freefall_mode(data, state);
case IIO_EV_DIR_RISING:
val = i2c_smbus_read_byte_data(data->client, ev_regs->ev_cfg);
if (val < 0)
return val;
if (state) {
if (mma8452_freefall_mode_enabled(data)) {
val &= ~BIT(idx_x + ev_regs->ev_cfg_chan_shift);
val &= ~BIT(idx_y + ev_regs->ev_cfg_chan_shift);
val &= ~BIT(idx_z + ev_regs->ev_cfg_chan_shift);
val |= MMA8452_FF_MT_CFG_OAE;
}
val |= BIT(chan->scan_index +
ev_regs->ev_cfg_chan_shift);
} else {
if (mma8452_freefall_mode_enabled(data))
return 0;
val &= ~BIT(chan->scan_index +
ev_regs->ev_cfg_chan_shift);
}
val |= ev_regs->ev_cfg_ele;
return mma8452_change_config(data, ev_regs->ev_cfg, val);
default:
return -EINVAL;
}
}
static void mma8452_transient_interrupt(struct iio_dev *indio_dev)
{
struct mma8452_data *data = iio_priv(indio_dev);
s64 ts = iio_get_time_ns(indio_dev);
int src;
src = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_SRC);
if (src < 0)
return;
if (src & MMA8452_TRANSIENT_SRC_XTRANSE)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
ts);
if (src & MMA8452_TRANSIENT_SRC_YTRANSE)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
ts);
if (src & MMA8452_TRANSIENT_SRC_ZTRANSE)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
ts);
}
static irqreturn_t mma8452_interrupt(int irq, void *p)
{
struct iio_dev *indio_dev = p;
struct mma8452_data *data = iio_priv(indio_dev);
irqreturn_t ret = IRQ_NONE;
int src;
src = i2c_smbus_read_byte_data(data->client, MMA8452_INT_SRC);
if (src < 0)
return IRQ_NONE;
if (!(src & (data->chip_info->enabled_events | MMA8452_INT_DRDY)))
return IRQ_NONE;
if (src & MMA8452_INT_DRDY) {
iio_trigger_poll_nested(indio_dev->trig);
ret = IRQ_HANDLED;
}
if (src & MMA8452_INT_FF_MT) {
if (mma8452_freefall_mode_enabled(data)) {
s64 ts = iio_get_time_ns(indio_dev);
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
IIO_MOD_X_AND_Y_AND_Z,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_FALLING),
ts);
}
ret = IRQ_HANDLED;
}
if (src & MMA8452_INT_TRANS) {
mma8452_transient_interrupt(indio_dev);
ret = IRQ_HANDLED;
}
return ret;
}
static irqreturn_t mma8452_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct mma8452_data *data = iio_priv(indio_dev);
int ret;
ret = mma8452_read(data, data->buffer.channels);
if (ret < 0)
goto done;
iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
iio_get_time_ns(indio_dev));
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int mma8452_reg_access_dbg(struct iio_dev *indio_dev,
unsigned int reg, unsigned int writeval,
unsigned int *readval)
{
int ret;
struct mma8452_data *data = iio_priv(indio_dev);
if (reg > MMA8452_MAX_REG)
return -EINVAL;
if (!readval)
return mma8452_change_config(data, reg, writeval);
ret = i2c_smbus_read_byte_data(data->client, reg);
if (ret < 0)
return ret;
*readval = ret;
return 0;
}
static const struct iio_event_spec mma8452_freefall_event[] = {
{
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_FALLING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD) |
BIT(IIO_EV_INFO_HIGH_PASS_FILTER_3DB)
},
};
static const struct iio_event_spec mma8652_freefall_event[] = {
{
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_FALLING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD)
},
};
static const struct iio_event_spec mma8452_transient_event[] = {
{
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD) |
BIT(IIO_EV_INFO_HIGH_PASS_FILTER_3DB)
},
};
static const struct iio_event_spec mma8452_motion_event[] = {
{
.type = IIO_EV_TYPE_MAG,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_PERIOD)
},
};
/*
* Threshold is configured in fixed 8G/127 steps regardless of
* currently selected scale for measurement.
*/
static IIO_CONST_ATTR_NAMED(accel_transient_scale, in_accel_scale, "0.617742");
static struct attribute *mma8452_event_attributes[] = {
&iio_const_attr_accel_transient_scale.dev_attr.attr,
NULL,
};
static const struct attribute_group mma8452_event_attribute_group = {
.attrs = mma8452_event_attributes,
};
static const struct iio_mount_matrix *
mma8452_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct mma8452_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info mma8452_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, mma8452_get_mount_matrix),
{ }
};
#define MMA8452_FREEFALL_CHANNEL(modifier) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = modifier, \
.scan_index = -1, \
.event_spec = mma8452_freefall_event, \
.num_event_specs = ARRAY_SIZE(mma8452_freefall_event), \
}
#define MMA8652_FREEFALL_CHANNEL(modifier) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = modifier, \
.scan_index = -1, \
.event_spec = mma8652_freefall_event, \
.num_event_specs = ARRAY_SIZE(mma8652_freefall_event), \
}
#define MMA8452_CHANNEL(axis, idx, bits) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY) | \
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
.scan_index = idx, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 16 - (bits), \
.endianness = IIO_BE, \
}, \
.event_spec = mma8452_transient_event, \
.num_event_specs = ARRAY_SIZE(mma8452_transient_event), \
.ext_info = mma8452_ext_info, \
}
#define MMA8652_CHANNEL(axis, idx, bits) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
.scan_index = idx, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 16 - (bits), \
.endianness = IIO_BE, \
}, \
.event_spec = mma8452_motion_event, \
.num_event_specs = ARRAY_SIZE(mma8452_motion_event), \
.ext_info = mma8452_ext_info, \
}
static const struct iio_chan_spec mma8451_channels[] = {
MMA8452_CHANNEL(X, idx_x, 14),
MMA8452_CHANNEL(Y, idx_y, 14),
MMA8452_CHANNEL(Z, idx_z, 14),
IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
};
static const struct iio_chan_spec mma8452_channels[] = {
MMA8452_CHANNEL(X, idx_x, 12),
MMA8452_CHANNEL(Y, idx_y, 12),
MMA8452_CHANNEL(Z, idx_z, 12),
IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
};
static const struct iio_chan_spec mma8453_channels[] = {
MMA8452_CHANNEL(X, idx_x, 10),
MMA8452_CHANNEL(Y, idx_y, 10),
MMA8452_CHANNEL(Z, idx_z, 10),
IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
};
static const struct iio_chan_spec mma8652_channels[] = {
MMA8652_CHANNEL(X, idx_x, 12),
MMA8652_CHANNEL(Y, idx_y, 12),
MMA8652_CHANNEL(Z, idx_z, 12),
IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
MMA8652_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
};
static const struct iio_chan_spec mma8653_channels[] = {
MMA8652_CHANNEL(X, idx_x, 10),
MMA8652_CHANNEL(Y, idx_y, 10),
MMA8652_CHANNEL(Z, idx_z, 10),
IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
MMA8652_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
};
enum {
mma8451,
mma8452,
mma8453,
mma8652,
mma8653,
fxls8471,
};
static const struct mma_chip_info mma_chip_info_table[] = {
[mma8451] = {
.name = "mma8451",
.chip_id = MMA8451_DEVICE_ID,
.channels = mma8451_channels,
.num_channels = ARRAY_SIZE(mma8451_channels),
/*
* Hardware has fullscale of -2G, -4G, -8G corresponding to
* raw value -8192 for 14 bit, -2048 for 12 bit or -512 for 10
* bit.
* The userspace interface uses m/s^2 and we declare micro units
* So scale factor for 12 bit here is given by:
* g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665
*/
.mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} },
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
[mma8452] = {
.name = "mma8452",
.chip_id = MMA8452_DEVICE_ID,
.channels = mma8452_channels,
.num_channels = ARRAY_SIZE(mma8452_channels),
.mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} },
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
[mma8453] = {
.name = "mma8453",
.chip_id = MMA8453_DEVICE_ID,
.channels = mma8453_channels,
.num_channels = ARRAY_SIZE(mma8453_channels),
.mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} },
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
[mma8652] = {
.name = "mma8652",
.chip_id = MMA8652_DEVICE_ID,
.channels = mma8652_channels,
.num_channels = ARRAY_SIZE(mma8652_channels),
.mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} },
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_FF_MT,
},
[mma8653] = {
.name = "mma8653",
.chip_id = MMA8653_DEVICE_ID,
.channels = mma8653_channels,
.num_channels = ARRAY_SIZE(mma8653_channels),
.mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} },
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_FF_MT,
},
[fxls8471] = {
.name = "fxls8471",
.chip_id = FXLS8471_DEVICE_ID,
.channels = mma8451_channels,
.num_channels = ARRAY_SIZE(mma8451_channels),
.mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} },
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
};
static struct attribute *mma8452_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
&iio_dev_attr_in_accel_filter_high_pass_3db_frequency_available.dev_attr.attr,
&iio_dev_attr_in_accel_oversampling_ratio_available.dev_attr.attr,
NULL
};
static const struct attribute_group mma8452_group = {
.attrs = mma8452_attributes,
};
static const struct iio_info mma8452_info = {
.attrs = &mma8452_group,
.read_raw = &mma8452_read_raw,
.write_raw = &mma8452_write_raw,
.event_attrs = &mma8452_event_attribute_group,
.read_event_value = &mma8452_read_event_value,
.write_event_value = &mma8452_write_event_value,
.read_event_config = &mma8452_read_event_config,
.write_event_config = &mma8452_write_event_config,
.debugfs_reg_access = &mma8452_reg_access_dbg,
};
static const unsigned long mma8452_scan_masks[] = {0x7, 0};
static int mma8452_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mma8452_data *data = iio_priv(indio_dev);
int reg, ret;
ret = mma8452_set_runtime_pm_state(data->client, state);
if (ret)
return ret;
reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG4);
if (reg < 0)
return reg;
if (state)
reg |= MMA8452_INT_DRDY;
else
reg &= ~MMA8452_INT_DRDY;
return mma8452_change_config(data, MMA8452_CTRL_REG4, reg);
}
static const struct iio_trigger_ops mma8452_trigger_ops = {
.set_trigger_state = mma8452_data_rdy_trigger_set_state,
.validate_device = iio_trigger_validate_own_device,
};
static int mma8452_trigger_setup(struct iio_dev *indio_dev)
{
struct mma8452_data *data = iio_priv(indio_dev);
struct iio_trigger *trig;
int ret;
trig = devm_iio_trigger_alloc(&data->client->dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!trig)
return -ENOMEM;
trig->ops = &mma8452_trigger_ops;
iio_trigger_set_drvdata(trig, indio_dev);
ret = iio_trigger_register(trig);
if (ret)
return ret;
indio_dev->trig = iio_trigger_get(trig);
return 0;
}
static void mma8452_trigger_cleanup(struct iio_dev *indio_dev)
{
if (indio_dev->trig)
iio_trigger_unregister(indio_dev->trig);
}
static int mma8452_reset(struct i2c_client *client)
{
int i;
int ret;
/*
* Find on fxls8471, after config reset bit, it reset immediately,
* and will not give ACK, so here do not check the return value.
* The following code will read the reset register, and check whether
* this reset works.
*/
i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
MMA8452_CTRL_REG2_RST);
for (i = 0; i < 10; i++) {
usleep_range(100, 200);
ret = i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG2);
if (ret == -EIO)
continue; /* I2C comm reset */
if (ret < 0)
return ret;
if (!(ret & MMA8452_CTRL_REG2_RST))
return 0;
}
return -ETIMEDOUT;
}
static const struct of_device_id mma8452_dt_ids[] = {
{ .compatible = "fsl,mma8451", .data = &mma_chip_info_table[mma8451] },
{ .compatible = "fsl,mma8452", .data = &mma_chip_info_table[mma8452] },
{ .compatible = "fsl,mma8453", .data = &mma_chip_info_table[mma8453] },
{ .compatible = "fsl,mma8652", .data = &mma_chip_info_table[mma8652] },
{ .compatible = "fsl,mma8653", .data = &mma_chip_info_table[mma8653] },
{ .compatible = "fsl,fxls8471", .data = &mma_chip_info_table[fxls8471] },
{ }
};
MODULE_DEVICE_TABLE(of, mma8452_dt_ids);
static int mma8452_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct mma8452_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
mutex_init(&data->lock);
data->chip_info = device_get_match_data(&client->dev);
if (!data->chip_info) {
if (id) {
data->chip_info = &mma_chip_info_table[id->driver_data];
} else {
dev_err(&client->dev, "unknown device model\n");
return -ENODEV;
}
}
ret = iio_read_mount_matrix(&client->dev, &data->orientation);
if (ret)
return ret;
data->vdd_reg = devm_regulator_get(&client->dev, "vdd");
if (IS_ERR(data->vdd_reg))
return dev_err_probe(&client->dev, PTR_ERR(data->vdd_reg),
"failed to get VDD regulator!\n");
data->vddio_reg = devm_regulator_get(&client->dev, "vddio");
if (IS_ERR(data->vddio_reg))
return dev_err_probe(&client->dev, PTR_ERR(data->vddio_reg),
"failed to get VDDIO regulator!\n");
ret = regulator_enable(data->vdd_reg);
if (ret) {
dev_err(&client->dev, "failed to enable VDD regulator!\n");
return ret;
}
ret = regulator_enable(data->vddio_reg);
if (ret) {
dev_err(&client->dev, "failed to enable VDDIO regulator!\n");
goto disable_regulator_vdd;
}
ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
if (ret < 0)
goto disable_regulators;
switch (ret) {
case MMA8451_DEVICE_ID:
case MMA8452_DEVICE_ID:
case MMA8453_DEVICE_ID:
case MMA8652_DEVICE_ID:
case MMA8653_DEVICE_ID:
case FXLS8471_DEVICE_ID:
if (ret == data->chip_info->chip_id)
break;
fallthrough;
default:
ret = -ENODEV;
goto disable_regulators;
}
dev_info(&client->dev, "registering %s accelerometer; ID 0x%x\n",
data->chip_info->name, data->chip_info->chip_id);
i2c_set_clientdata(client, indio_dev);
indio_dev->info = &mma8452_info;
indio_dev->name = data->chip_info->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = data->chip_info->channels;
indio_dev->num_channels = data->chip_info->num_channels;
indio_dev->available_scan_masks = mma8452_scan_masks;
ret = mma8452_reset(client);
if (ret < 0)
goto disable_regulators;
data->data_cfg = MMA8452_DATA_CFG_FS_2G;
ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
data->data_cfg);
if (ret < 0)
goto disable_regulators;
/*
* By default set transient threshold to max to avoid events if
* enabling without configuring threshold.
*/
ret = i2c_smbus_write_byte_data(client, MMA8452_TRANSIENT_THS,
MMA8452_TRANSIENT_THS_MASK);
if (ret < 0)
goto disable_regulators;
if (client->irq) {
int irq2;
irq2 = of_irq_get_byname(client->dev.of_node, "INT2");
if (irq2 == client->irq) {
dev_dbg(&client->dev, "using interrupt line INT2\n");
} else {
ret = i2c_smbus_write_byte_data(client,
MMA8452_CTRL_REG5,
data->chip_info->all_events);
if (ret < 0)
goto disable_regulators;
dev_dbg(&client->dev, "using interrupt line INT1\n");
}
ret = i2c_smbus_write_byte_data(client,
MMA8452_CTRL_REG4,
data->chip_info->enabled_events);
if (ret < 0)
goto disable_regulators;
ret = mma8452_trigger_setup(indio_dev);
if (ret < 0)
goto disable_regulators;
}
data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
(MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
data->sleep_val = mma8452_calculate_sleep(data);
ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
data->ctrl_reg1);
if (ret < 0)
goto trigger_cleanup;
ret = iio_triggered_buffer_setup(indio_dev, NULL,
mma8452_trigger_handler, NULL);
if (ret < 0)
goto trigger_cleanup;
if (client->irq) {
ret = devm_request_threaded_irq(&client->dev,
client->irq,
NULL, mma8452_interrupt,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
client->name, indio_dev);
if (ret)
goto buffer_cleanup;
}
ret = pm_runtime_set_active(&client->dev);
if (ret < 0)
goto buffer_cleanup;
pm_runtime_enable(&client->dev);
pm_runtime_set_autosuspend_delay(&client->dev,
MMA8452_AUTO_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(&client->dev);
ret = iio_device_register(indio_dev);
if (ret < 0)
goto buffer_cleanup;
ret = mma8452_set_freefall_mode(data, false);
if (ret < 0)
goto unregister_device;
return 0;
unregister_device:
iio_device_unregister(indio_dev);
buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
trigger_cleanup:
mma8452_trigger_cleanup(indio_dev);
disable_regulators:
regulator_disable(data->vddio_reg);
disable_regulator_vdd:
regulator_disable(data->vdd_reg);
return ret;
}
static void mma8452_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct mma8452_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(&client->dev);
pm_runtime_set_suspended(&client->dev);
iio_triggered_buffer_cleanup(indio_dev);
mma8452_trigger_cleanup(indio_dev);
mma8452_standby(iio_priv(indio_dev));
regulator_disable(data->vddio_reg);
regulator_disable(data->vdd_reg);
}
#ifdef CONFIG_PM
static int mma8452_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma8452_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->lock);
ret = mma8452_standby(data);
mutex_unlock(&data->lock);
if (ret < 0) {
dev_err(&data->client->dev, "powering off device failed\n");
return -EAGAIN;
}
ret = regulator_disable(data->vddio_reg);
if (ret) {
dev_err(dev, "failed to disable VDDIO regulator\n");
return ret;
}
ret = regulator_disable(data->vdd_reg);
if (ret) {
dev_err(dev, "failed to disable VDD regulator\n");
return ret;
}
return 0;
}
static int mma8452_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma8452_data *data = iio_priv(indio_dev);
int ret, sleep_val;
ret = regulator_enable(data->vdd_reg);
if (ret) {
dev_err(dev, "failed to enable VDD regulator\n");
return ret;
}
ret = regulator_enable(data->vddio_reg);
if (ret) {
dev_err(dev, "failed to enable VDDIO regulator\n");
regulator_disable(data->vdd_reg);
return ret;
}
ret = mma8452_active(data);
if (ret < 0)
goto runtime_resume_failed;
ret = mma8452_get_odr_index(data);
sleep_val = 1000 / mma8452_samp_freq[ret][0];
if (sleep_val < 20)
usleep_range(sleep_val * 1000, 20000);
else
msleep_interruptible(sleep_val);
return 0;
runtime_resume_failed:
regulator_disable(data->vddio_reg);
regulator_disable(data->vdd_reg);
return ret;
}
#endif
static const struct dev_pm_ops mma8452_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
SET_RUNTIME_PM_OPS(mma8452_runtime_suspend,
mma8452_runtime_resume, NULL)
};
static const struct i2c_device_id mma8452_id[] = {
{ "mma8451", mma8451 },
{ "mma8452", mma8452 },
{ "mma8453", mma8453 },
{ "mma8652", mma8652 },
{ "mma8653", mma8653 },
{ "fxls8471", fxls8471 },
{ }
};
MODULE_DEVICE_TABLE(i2c, mma8452_id);
static struct i2c_driver mma8452_driver = {
.driver = {
.name = "mma8452",
.of_match_table = mma8452_dt_ids,
.pm = &mma8452_pm_ops,
},
.probe = mma8452_probe,
.remove = mma8452_remove,
.id_table = mma8452_id,
};
module_i2c_driver(mma8452_driver);
MODULE_AUTHOR("Peter Meerwald <[email protected]>");
MODULE_DESCRIPTION("Freescale / NXP MMA8452 accelerometer driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/accel/mma8452.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Common code for Freescale MMA955x Intelligent Sensor Platform drivers
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/pm_runtime.h>
#include "mma9551_core.h"
/* Command masks for mailbox write command */
#define MMA9551_CMD_READ_VERSION_INFO 0x00
#define MMA9551_CMD_READ_CONFIG 0x10
#define MMA9551_CMD_WRITE_CONFIG 0x20
#define MMA9551_CMD_READ_STATUS 0x30
/* Mailbox read command */
#define MMA9551_RESPONSE_COCO BIT(7)
/* Error-Status codes returned in mailbox read command */
#define MMA9551_MCI_ERROR_NONE 0x00
#define MMA9551_MCI_ERROR_PARAM 0x04
#define MMA9551_MCI_INVALID_COUNT 0x19
#define MMA9551_MCI_ERROR_COMMAND 0x1C
#define MMA9551_MCI_ERROR_INVALID_LENGTH 0x21
#define MMA9551_MCI_ERROR_FIFO_BUSY 0x22
#define MMA9551_MCI_ERROR_FIFO_ALLOCATED 0x23
#define MMA9551_MCI_ERROR_FIFO_OVERSIZE 0x24
/* GPIO Application */
#define MMA9551_GPIO_POL_MSB 0x08
#define MMA9551_GPIO_POL_LSB 0x09
/* Sleep/Wake application */
#define MMA9551_SLEEP_CFG 0x06
#define MMA9551_SLEEP_CFG_SNCEN BIT(0)
#define MMA9551_SLEEP_CFG_FLEEN BIT(1)
#define MMA9551_SLEEP_CFG_SCHEN BIT(2)
/* AFE application */
#define MMA9551_AFE_X_ACCEL_REG 0x00
#define MMA9551_AFE_Y_ACCEL_REG 0x02
#define MMA9551_AFE_Z_ACCEL_REG 0x04
/* Reset/Suspend/Clear application */
#define MMA9551_RSC_RESET 0x00
#define MMA9551_RSC_OFFSET(mask) (3 - (ffs(mask) - 1) / 8)
#define MMA9551_RSC_VAL(mask) (mask >> (((ffs(mask) - 1) / 8) * 8))
/*
* A response is composed of:
* - control registers: MB0-3
* - data registers: MB4-31
*
* A request is composed of:
* - mbox to write to (always 0)
* - control registers: MB1-4
* - data registers: MB5-31
*/
#define MMA9551_MAILBOX_CTRL_REGS 4
#define MMA9551_MAX_MAILBOX_DATA_REGS 28
#define MMA9551_MAILBOX_REGS 32
#define MMA9551_I2C_READ_RETRIES 5
#define MMA9551_I2C_READ_DELAY 50 /* us */
struct mma9551_mbox_request {
u8 start_mbox; /* Always 0. */
u8 app_id;
/*
* See Section 5.3.1 of the MMA955xL Software Reference Manual.
*
* Bit 7: reserved, always 0
* Bits 6-4: command
* Bits 3-0: upper bits of register offset
*/
u8 cmd_off;
u8 lower_off;
u8 nbytes;
u8 buf[MMA9551_MAX_MAILBOX_DATA_REGS - 1];
} __packed;
struct mma9551_mbox_response {
u8 app_id;
/*
* See Section 5.3.3 of the MMA955xL Software Reference Manual.
*
* Bit 7: COCO
* Bits 6-0: Error code.
*/
u8 coco_err;
u8 nbytes;
u8 req_bytes;
u8 buf[MMA9551_MAX_MAILBOX_DATA_REGS];
} __packed;
struct mma9551_version_info {
__be32 device_id;
u8 rom_version[2];
u8 fw_version[2];
u8 hw_version[2];
u8 fw_build[2];
};
static int mma9551_transfer(struct i2c_client *client,
u8 app_id, u8 command, u16 offset,
u8 *inbytes, int num_inbytes,
u8 *outbytes, int num_outbytes)
{
struct mma9551_mbox_request req;
struct mma9551_mbox_response rsp;
struct i2c_msg in, out;
u8 req_len, err_code;
int ret, retries;
if (offset >= 1 << 12) {
dev_err(&client->dev, "register offset too large\n");
return -EINVAL;
}
req_len = 1 + MMA9551_MAILBOX_CTRL_REGS + num_inbytes;
req.start_mbox = 0;
req.app_id = app_id;
req.cmd_off = command | (offset >> 8);
req.lower_off = offset;
if (command == MMA9551_CMD_WRITE_CONFIG)
req.nbytes = num_inbytes;
else
req.nbytes = num_outbytes;
if (num_inbytes)
memcpy(req.buf, inbytes, num_inbytes);
out.addr = client->addr;
out.flags = 0;
out.len = req_len;
out.buf = (u8 *)&req;
ret = i2c_transfer(client->adapter, &out, 1);
if (ret < 0) {
dev_err(&client->dev, "i2c write failed\n");
return ret;
}
retries = MMA9551_I2C_READ_RETRIES;
do {
udelay(MMA9551_I2C_READ_DELAY);
in.addr = client->addr;
in.flags = I2C_M_RD;
in.len = sizeof(rsp);
in.buf = (u8 *)&rsp;
ret = i2c_transfer(client->adapter, &in, 1);
if (ret < 0) {
dev_err(&client->dev, "i2c read failed\n");
return ret;
}
if (rsp.coco_err & MMA9551_RESPONSE_COCO)
break;
} while (--retries > 0);
if (retries == 0) {
dev_err(&client->dev,
"timed out while waiting for command response\n");
return -ETIMEDOUT;
}
if (rsp.app_id != app_id) {
dev_err(&client->dev,
"app_id mismatch in response got %02x expected %02x\n",
rsp.app_id, app_id);
return -EINVAL;
}
err_code = rsp.coco_err & ~MMA9551_RESPONSE_COCO;
if (err_code != MMA9551_MCI_ERROR_NONE) {
dev_err(&client->dev, "read returned error %x\n", err_code);
return -EINVAL;
}
if (rsp.nbytes != rsp.req_bytes) {
dev_err(&client->dev,
"output length mismatch got %d expected %d\n",
rsp.nbytes, rsp.req_bytes);
return -EINVAL;
}
if (num_outbytes)
memcpy(outbytes, rsp.buf, num_outbytes);
return 0;
}
/**
* mma9551_read_config_byte() - read 1 configuration byte
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one configuration byte from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed
* by one or more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_config_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 *val)
{
return mma9551_transfer(client, app_id, MMA9551_CMD_READ_CONFIG,
reg, NULL, 0, val, 1);
}
EXPORT_SYMBOL_NS(mma9551_read_config_byte, IIO_MMA9551);
/**
* mma9551_write_config_byte() - write 1 configuration byte
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Value to write
*
* Write one configuration byte from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_write_config_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 val)
{
return mma9551_transfer(client, app_id, MMA9551_CMD_WRITE_CONFIG, reg,
&val, 1, NULL, 0);
}
EXPORT_SYMBOL_NS(mma9551_write_config_byte, IIO_MMA9551);
/**
* mma9551_read_status_byte() - read 1 status byte
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one status byte from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_status_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 *val)
{
return mma9551_transfer(client, app_id, MMA9551_CMD_READ_STATUS,
reg, NULL, 0, val, 1);
}
EXPORT_SYMBOL_NS(mma9551_read_status_byte, IIO_MMA9551);
/**
* mma9551_read_config_word() - read 1 config word
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one configuration word from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_config_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 *val)
{
int ret;
__be16 v;
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_CONFIG,
reg, NULL, 0, (u8 *)&v, 2);
if (ret < 0)
return ret;
*val = be16_to_cpu(v);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_config_word, IIO_MMA9551);
/**
* mma9551_write_config_word() - write 1 config word
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Value to write
*
* Write one configuration word from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_write_config_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 val)
{
__be16 v = cpu_to_be16(val);
return mma9551_transfer(client, app_id, MMA9551_CMD_WRITE_CONFIG, reg,
(u8 *)&v, 2, NULL, 0);
}
EXPORT_SYMBOL_NS(mma9551_write_config_word, IIO_MMA9551);
/**
* mma9551_read_status_word() - read 1 status word
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one status word from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_status_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 *val)
{
int ret;
__be16 v;
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_STATUS,
reg, NULL, 0, (u8 *)&v, 2);
if (ret < 0)
return ret;
*val = be16_to_cpu(v);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_status_word, IIO_MMA9551);
/**
* mma9551_read_config_words() - read multiple config words
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @len: Length of array to read (in words)
* @buf: Array of words to read
*
* Read multiple configuration registers (word-sized registers).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_config_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf)
{
int ret, i;
__be16 be_buf[MMA9551_MAX_MAILBOX_DATA_REGS / 2];
if (len > ARRAY_SIZE(be_buf)) {
dev_err(&client->dev, "Invalid buffer size %d\n", len);
return -EINVAL;
}
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_CONFIG,
reg, NULL, 0, (u8 *)be_buf, len * sizeof(u16));
if (ret < 0)
return ret;
for (i = 0; i < len; i++)
buf[i] = be16_to_cpu(be_buf[i]);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_config_words, IIO_MMA9551);
/**
* mma9551_read_status_words() - read multiple status words
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @len: Length of array to read (in words)
* @buf: Array of words to read
*
* Read multiple status registers (word-sized registers).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_status_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf)
{
int ret, i;
__be16 be_buf[MMA9551_MAX_MAILBOX_DATA_REGS / 2];
if (len > ARRAY_SIZE(be_buf)) {
dev_err(&client->dev, "Invalid buffer size %d\n", len);
return -EINVAL;
}
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_STATUS,
reg, NULL, 0, (u8 *)be_buf, len * sizeof(u16));
if (ret < 0)
return ret;
for (i = 0; i < len; i++)
buf[i] = be16_to_cpu(be_buf[i]);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_status_words, IIO_MMA9551);
/**
* mma9551_write_config_words() - write multiple config words
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @len: Length of array to write (in words)
* @buf: Array of words to write
*
* Write multiple configuration registers (word-sized registers).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_write_config_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf)
{
int i;
__be16 be_buf[(MMA9551_MAX_MAILBOX_DATA_REGS - 1) / 2];
if (len > ARRAY_SIZE(be_buf)) {
dev_err(&client->dev, "Invalid buffer size %d\n", len);
return -EINVAL;
}
for (i = 0; i < len; i++)
be_buf[i] = cpu_to_be16(buf[i]);
return mma9551_transfer(client, app_id, MMA9551_CMD_WRITE_CONFIG,
reg, (u8 *)be_buf, len * sizeof(u16), NULL, 0);
}
EXPORT_SYMBOL_NS(mma9551_write_config_words, IIO_MMA9551);
/**
* mma9551_update_config_bits() - update bits in register
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @mask: Mask for the bits to update
* @val: Value of the bits to update
*
* Update bits in the given register using a bit mask.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_update_config_bits(struct i2c_client *client, u8 app_id,
u16 reg, u8 mask, u8 val)
{
int ret;
u8 tmp, orig;
ret = mma9551_read_config_byte(client, app_id, reg, &orig);
if (ret < 0)
return ret;
tmp = orig & ~mask;
tmp |= val & mask;
if (tmp == orig)
return 0;
return mma9551_write_config_byte(client, app_id, reg, tmp);
}
EXPORT_SYMBOL_NS(mma9551_update_config_bits, IIO_MMA9551);
/**
* mma9551_gpio_config() - configure gpio
* @client: I2C client
* @pin: GPIO pin to configure
* @app_id: Application ID
* @bitnum: Bit number of status register being assigned to the GPIO pin.
* @polarity: The polarity parameter is described in section 6.2.2, page 66,
* of the Software Reference Manual. Basically, polarity=0 means
* the interrupt line has the same value as the selected bit,
* while polarity=1 means the line is inverted.
*
* Assign a bit from an application’s status register to a specific GPIO pin.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_gpio_config(struct i2c_client *client, enum mma9551_gpio_pin pin,
u8 app_id, u8 bitnum, int polarity)
{
u8 reg, pol_mask, pol_val;
int ret;
if (pin > mma9551_gpio_max) {
dev_err(&client->dev, "bad GPIO pin\n");
return -EINVAL;
}
/*
* Pin 6 is configured by regs 0x00 and 0x01, pin 7 by 0x02 and
* 0x03, and so on.
*/
reg = pin * 2;
ret = mma9551_write_config_byte(client, MMA9551_APPID_GPIO,
reg, app_id);
if (ret < 0) {
dev_err(&client->dev, "error setting GPIO app_id\n");
return ret;
}
ret = mma9551_write_config_byte(client, MMA9551_APPID_GPIO,
reg + 1, bitnum);
if (ret < 0) {
dev_err(&client->dev, "error setting GPIO bit number\n");
return ret;
}
switch (pin) {
case mma9551_gpio6:
reg = MMA9551_GPIO_POL_LSB;
pol_mask = 1 << 6;
break;
case mma9551_gpio7:
reg = MMA9551_GPIO_POL_LSB;
pol_mask = 1 << 7;
break;
case mma9551_gpio8:
reg = MMA9551_GPIO_POL_MSB;
pol_mask = 1 << 0;
break;
case mma9551_gpio9:
reg = MMA9551_GPIO_POL_MSB;
pol_mask = 1 << 1;
break;
}
pol_val = polarity ? pol_mask : 0;
ret = mma9551_update_config_bits(client, MMA9551_APPID_GPIO, reg,
pol_mask, pol_val);
if (ret < 0)
dev_err(&client->dev, "error setting GPIO polarity\n");
return ret;
}
EXPORT_SYMBOL_NS(mma9551_gpio_config, IIO_MMA9551);
/**
* mma9551_read_version() - read device version information
* @client: I2C client
*
* Read version information and print device id and firmware version.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_version(struct i2c_client *client)
{
struct mma9551_version_info info;
int ret;
ret = mma9551_transfer(client, MMA9551_APPID_VERSION, 0x00, 0x00,
NULL, 0, (u8 *)&info, sizeof(info));
if (ret < 0)
return ret;
dev_info(&client->dev, "device ID 0x%x, firmware version %02x.%02x\n",
be32_to_cpu(info.device_id), info.fw_version[0],
info.fw_version[1]);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_version, IIO_MMA9551);
/**
* mma9551_set_device_state() - sets HW power mode
* @client: I2C client
* @enable: Use true to power on device, false to cause the device
* to enter sleep.
*
* Set power on/off for device using the Sleep/Wake Application.
* When enable is true, power on chip and enable doze mode.
* When enable is false, enter sleep mode (device remains in the
* lowest-power mode).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_set_device_state(struct i2c_client *client, bool enable)
{
return mma9551_update_config_bits(client, MMA9551_APPID_SLEEP_WAKE,
MMA9551_SLEEP_CFG,
MMA9551_SLEEP_CFG_SNCEN |
MMA9551_SLEEP_CFG_FLEEN |
MMA9551_SLEEP_CFG_SCHEN,
enable ? MMA9551_SLEEP_CFG_SCHEN |
MMA9551_SLEEP_CFG_FLEEN :
MMA9551_SLEEP_CFG_SNCEN);
}
EXPORT_SYMBOL_NS(mma9551_set_device_state, IIO_MMA9551);
/**
* mma9551_set_power_state() - sets runtime PM state
* @client: I2C client
* @on: Use true to power on device, false to power off
*
* Resume or suspend the device using Runtime PM.
* The device will suspend after the autosuspend delay.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_set_power_state(struct i2c_client *client, bool on)
{
#ifdef CONFIG_PM
int ret;
if (on)
ret = pm_runtime_resume_and_get(&client->dev);
else {
pm_runtime_mark_last_busy(&client->dev);
ret = pm_runtime_put_autosuspend(&client->dev);
}
if (ret < 0) {
dev_err(&client->dev,
"failed to change power state to %d\n", on);
return ret;
}
#endif
return 0;
}
EXPORT_SYMBOL_NS(mma9551_set_power_state, IIO_MMA9551);
/**
* mma9551_sleep() - sleep
* @freq: Application frequency
*
* Firmware applications run at a certain frequency on the
* device. Sleep for one application cycle to make sure the
* application had time to run once and initialize set values.
*/
void mma9551_sleep(int freq)
{
int sleep_val = 1000 / freq;
if (sleep_val < 20)
usleep_range(sleep_val * 1000, 20000);
else
msleep_interruptible(sleep_val);
}
EXPORT_SYMBOL_NS(mma9551_sleep, IIO_MMA9551);
/**
* mma9551_read_accel_chan() - read accelerometer channel
* @client: I2C client
* @chan: IIO channel
* @val: Pointer to the accelerometer value read
* @val2: Unused
*
* Read accelerometer value for the specified channel.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: IIO_VAL_INT on success, negative value on failure.
*/
int mma9551_read_accel_chan(struct i2c_client *client,
const struct iio_chan_spec *chan,
int *val, int *val2)
{
u16 reg_addr;
s16 raw_accel;
int ret;
switch (chan->channel2) {
case IIO_MOD_X:
reg_addr = MMA9551_AFE_X_ACCEL_REG;
break;
case IIO_MOD_Y:
reg_addr = MMA9551_AFE_Y_ACCEL_REG;
break;
case IIO_MOD_Z:
reg_addr = MMA9551_AFE_Z_ACCEL_REG;
break;
default:
return -EINVAL;
}
ret = mma9551_set_power_state(client, true);
if (ret < 0)
return ret;
ret = mma9551_read_status_word(client, MMA9551_APPID_AFE,
reg_addr, &raw_accel);
if (ret < 0)
goto out_poweroff;
*val = raw_accel;
ret = IIO_VAL_INT;
out_poweroff:
mma9551_set_power_state(client, false);
return ret;
}
EXPORT_SYMBOL_NS(mma9551_read_accel_chan, IIO_MMA9551);
/**
* mma9551_read_accel_scale() - read accelerometer scale
* @val: Pointer to the accelerometer scale (int value)
* @val2: Pointer to the accelerometer scale (micro value)
*
* Read accelerometer scale.
*
* Returns: IIO_VAL_INT_PLUS_MICRO.
*/
int mma9551_read_accel_scale(int *val, int *val2)
{
*val = 0;
*val2 = 2440;
return IIO_VAL_INT_PLUS_MICRO;
}
EXPORT_SYMBOL_NS(mma9551_read_accel_scale, IIO_MMA9551);
/**
* mma9551_app_reset() - reset application
* @client: I2C client
* @app_mask: Application to reset
*
* Reset the given application (using the Reset/Suspend/Clear
* Control Application)
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_app_reset(struct i2c_client *client, u32 app_mask)
{
return mma9551_write_config_byte(client, MMA9551_APPID_RSC,
MMA9551_RSC_RESET +
MMA9551_RSC_OFFSET(app_mask),
MMA9551_RSC_VAL(app_mask));
}
EXPORT_SYMBOL_NS(mma9551_app_reset, IIO_MMA9551);
MODULE_AUTHOR("Irina Tirdea <[email protected]>");
MODULE_AUTHOR("Vlad Dogaru <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("MMA955xL sensors core");
| linux-master | drivers/iio/accel/mma9551_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Sensortek STK8312 3-Axis Accelerometer
*
* Copyright (c) 2015, Intel Corporation.
*
* IIO driver for STK8312; 7-bit I2C address: 0x3D.
*/
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define STK8312_REG_XOUT 0x00
#define STK8312_REG_YOUT 0x01
#define STK8312_REG_ZOUT 0x02
#define STK8312_REG_INTSU 0x06
#define STK8312_REG_MODE 0x07
#define STK8312_REG_SR 0x08
#define STK8312_REG_STH 0x13
#define STK8312_REG_RESET 0x20
#define STK8312_REG_AFECTRL 0x24
#define STK8312_REG_OTPADDR 0x3D
#define STK8312_REG_OTPDATA 0x3E
#define STK8312_REG_OTPCTRL 0x3F
#define STK8312_MODE_ACTIVE BIT(0)
#define STK8312_MODE_STANDBY 0x00
#define STK8312_MODE_INT_AH_PP 0xC0 /* active-high, push-pull */
#define STK8312_DREADY_BIT BIT(4)
#define STK8312_RNG_6G 1
#define STK8312_RNG_SHIFT 6
#define STK8312_RNG_MASK GENMASK(7, 6)
#define STK8312_SR_MASK GENMASK(2, 0)
#define STK8312_SR_400HZ_IDX 0
#define STK8312_ALL_CHANNEL_MASK GENMASK(2, 0)
#define STK8312_ALL_CHANNEL_SIZE 3
#define STK8312_DRIVER_NAME "stk8312"
#define STK8312_IRQ_NAME "stk8312_event"
/*
* The accelerometer has two measurement ranges:
*
* -6g - +6g (8-bit, signed)
* -16g - +16g (8-bit, signed)
*
* scale1 = (6 + 6) * 9.81 / (2^8 - 1) = 0.4616
* scale2 = (16 + 16) * 9.81 / (2^8 - 1) = 1.2311
*/
#define STK8312_SCALE_AVAIL "0.4616 1.2311"
static const int stk8312_scale_table[][2] = {
{0, 461600}, {1, 231100}
};
static const struct {
int val;
int val2;
} stk8312_samp_freq_table[] = {
{400, 0}, {200, 0}, {100, 0}, {50, 0}, {25, 0},
{12, 500000}, {6, 250000}, {3, 125000}
};
#define STK8312_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 8, \
.storagebits = 8, \
.endianness = IIO_CPU, \
}, \
}
static const struct iio_chan_spec stk8312_channels[] = {
STK8312_ACCEL_CHANNEL(0, STK8312_REG_XOUT, X),
STK8312_ACCEL_CHANNEL(1, STK8312_REG_YOUT, Y),
STK8312_ACCEL_CHANNEL(2, STK8312_REG_ZOUT, Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
struct stk8312_data {
struct i2c_client *client;
struct mutex lock;
u8 range;
u8 sample_rate_idx;
u8 mode;
struct iio_trigger *dready_trig;
bool dready_trigger_on;
/* Ensure timestamp is naturally aligned */
struct {
s8 chans[3];
s64 timestamp __aligned(8);
} scan;
};
static IIO_CONST_ATTR(in_accel_scale_available, STK8312_SCALE_AVAIL);
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("3.125 6.25 12.5 25 50 100 200 400");
static struct attribute *stk8312_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group stk8312_attribute_group = {
.attrs = stk8312_attributes
};
static int stk8312_otp_init(struct stk8312_data *data)
{
int ret;
int count = 10;
struct i2c_client *client = data->client;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPADDR, 0x70);
if (ret < 0)
goto exit_err;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPCTRL, 0x02);
if (ret < 0)
goto exit_err;
do {
usleep_range(1000, 5000);
ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPCTRL);
if (ret < 0)
goto exit_err;
count--;
} while (!(ret & BIT(7)) && count > 0);
if (count == 0) {
ret = -ETIMEDOUT;
goto exit_err;
}
ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPDATA);
if (ret == 0)
ret = -EINVAL;
if (ret < 0)
goto exit_err;
ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_AFECTRL, ret);
if (ret < 0)
goto exit_err;
msleep(150);
return 0;
exit_err:
dev_err(&client->dev, "failed to initialize sensor\n");
return ret;
}
static int stk8312_set_mode(struct stk8312_data *data, u8 mode)
{
int ret;
struct i2c_client *client = data->client;
if (mode == data->mode)
return 0;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_MODE, mode);
if (ret < 0) {
dev_err(&client->dev, "failed to change sensor mode\n");
return ret;
}
data->mode = mode;
if (mode & STK8312_MODE_ACTIVE) {
/* Need to run OTP sequence before entering active mode */
usleep_range(1000, 5000);
ret = stk8312_otp_init(data);
}
return ret;
}
static int stk8312_set_interrupts(struct stk8312_data *data, u8 int_mask)
{
int ret;
u8 mode;
struct i2c_client *client = data->client;
mode = data->mode;
/* We need to go in standby mode to modify registers */
ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_INTSU, int_mask);
if (ret < 0) {
dev_err(&client->dev, "failed to set interrupts\n");
stk8312_set_mode(data, mode);
return ret;
}
return stk8312_set_mode(data, mode);
}
static int stk8312_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct stk8312_data *data = iio_priv(indio_dev);
int ret;
if (state)
ret = stk8312_set_interrupts(data, STK8312_DREADY_BIT);
else
ret = stk8312_set_interrupts(data, 0x00);
if (ret < 0) {
dev_err(&data->client->dev, "failed to set trigger state\n");
return ret;
}
data->dready_trigger_on = state;
return 0;
}
static const struct iio_trigger_ops stk8312_trigger_ops = {
.set_trigger_state = stk8312_data_rdy_trigger_set_state,
};
static int stk8312_set_sample_rate(struct stk8312_data *data, u8 rate)
{
int ret;
u8 masked_reg;
u8 mode;
struct i2c_client *client = data->client;
if (rate == data->sample_rate_idx)
return 0;
mode = data->mode;
/* We need to go in standby mode to modify registers */
ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(client, STK8312_REG_SR);
if (ret < 0)
goto err_activate;
masked_reg = (ret & (~STK8312_SR_MASK)) | rate;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_SR, masked_reg);
if (ret < 0)
goto err_activate;
data->sample_rate_idx = rate;
return stk8312_set_mode(data, mode);
err_activate:
dev_err(&client->dev, "failed to set sampling rate\n");
stk8312_set_mode(data, mode);
return ret;
}
static int stk8312_set_range(struct stk8312_data *data, u8 range)
{
int ret;
u8 masked_reg;
u8 mode;
struct i2c_client *client = data->client;
if (range != 1 && range != 2)
return -EINVAL;
else if (range == data->range)
return 0;
mode = data->mode;
/* We need to go in standby mode to modify registers */
ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(client, STK8312_REG_STH);
if (ret < 0)
goto err_activate;
masked_reg = ret & (~STK8312_RNG_MASK);
masked_reg |= range << STK8312_RNG_SHIFT;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_STH, masked_reg);
if (ret < 0)
goto err_activate;
data->range = range;
return stk8312_set_mode(data, mode);
err_activate:
dev_err(&client->dev, "failed to change sensor range\n");
stk8312_set_mode(data, mode);
return ret;
}
static int stk8312_read_accel(struct stk8312_data *data, u8 address)
{
int ret;
struct i2c_client *client = data->client;
if (address > 2)
return -EINVAL;
ret = i2c_smbus_read_byte_data(client, address);
if (ret < 0)
dev_err(&client->dev, "register read failed\n");
return ret;
}
static int stk8312_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct stk8312_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
mutex_lock(&data->lock);
ret = stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
if (ret < 0) {
mutex_unlock(&data->lock);
return ret;
}
ret = stk8312_read_accel(data, chan->address);
if (ret < 0) {
stk8312_set_mode(data,
data->mode & (~STK8312_MODE_ACTIVE));
mutex_unlock(&data->lock);
return ret;
}
*val = sign_extend32(ret, chan->scan_type.realbits - 1);
ret = stk8312_set_mode(data,
data->mode & (~STK8312_MODE_ACTIVE));
mutex_unlock(&data->lock);
if (ret < 0)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = stk8312_scale_table[data->range - 1][0];
*val2 = stk8312_scale_table[data->range - 1][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = stk8312_samp_freq_table[data->sample_rate_idx].val;
*val2 = stk8312_samp_freq_table[data->sample_rate_idx].val2;
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static int stk8312_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int i;
int index = -1;
int ret;
struct stk8312_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
for (i = 0; i < ARRAY_SIZE(stk8312_scale_table); i++)
if (val == stk8312_scale_table[i][0] &&
val2 == stk8312_scale_table[i][1]) {
index = i + 1;
break;
}
if (index < 0)
return -EINVAL;
mutex_lock(&data->lock);
ret = stk8312_set_range(data, index);
mutex_unlock(&data->lock);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
for (i = 0; i < ARRAY_SIZE(stk8312_samp_freq_table); i++)
if (val == stk8312_samp_freq_table[i].val &&
val2 == stk8312_samp_freq_table[i].val2) {
index = i;
break;
}
if (index < 0)
return -EINVAL;
mutex_lock(&data->lock);
ret = stk8312_set_sample_rate(data, index);
mutex_unlock(&data->lock);
return ret;
}
return -EINVAL;
}
static const struct iio_info stk8312_info = {
.read_raw = stk8312_read_raw,
.write_raw = stk8312_write_raw,
.attrs = &stk8312_attribute_group,
};
static irqreturn_t stk8312_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct stk8312_data *data = iio_priv(indio_dev);
int bit, ret, i = 0;
mutex_lock(&data->lock);
/*
* Do a bulk read if all channels are requested,
* from 0x00 (XOUT) to 0x02 (ZOUT)
*/
if (*(indio_dev->active_scan_mask) == STK8312_ALL_CHANNEL_MASK) {
ret = i2c_smbus_read_i2c_block_data(data->client,
STK8312_REG_XOUT,
STK8312_ALL_CHANNEL_SIZE,
data->scan.chans);
if (ret < STK8312_ALL_CHANNEL_SIZE) {
dev_err(&data->client->dev, "register read failed\n");
mutex_unlock(&data->lock);
goto err;
}
} else {
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = stk8312_read_accel(data, bit);
if (ret < 0) {
mutex_unlock(&data->lock);
goto err;
}
data->scan.chans[i++] = ret;
}
}
mutex_unlock(&data->lock);
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
pf->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t stk8312_data_rdy_trig_poll(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct stk8312_data *data = iio_priv(indio_dev);
if (data->dready_trigger_on)
iio_trigger_poll(data->dready_trig);
return IRQ_HANDLED;
}
static int stk8312_buffer_preenable(struct iio_dev *indio_dev)
{
struct stk8312_data *data = iio_priv(indio_dev);
return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
}
static int stk8312_buffer_postdisable(struct iio_dev *indio_dev)
{
struct stk8312_data *data = iio_priv(indio_dev);
return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
}
static const struct iio_buffer_setup_ops stk8312_buffer_setup_ops = {
.preenable = stk8312_buffer_preenable,
.postdisable = stk8312_buffer_postdisable,
};
static int stk8312_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct stk8312_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev) {
dev_err(&client->dev, "iio allocation failed!\n");
return -ENOMEM;
}
data = iio_priv(indio_dev);
data->client = client;
i2c_set_clientdata(client, indio_dev);
mutex_init(&data->lock);
indio_dev->info = &stk8312_info;
indio_dev->name = STK8312_DRIVER_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = stk8312_channels;
indio_dev->num_channels = ARRAY_SIZE(stk8312_channels);
/* A software reset is recommended at power-on */
ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_RESET, 0x00);
if (ret < 0) {
dev_err(&client->dev, "failed to reset sensor\n");
return ret;
}
data->sample_rate_idx = STK8312_SR_400HZ_IDX;
ret = stk8312_set_range(data, STK8312_RNG_6G);
if (ret < 0)
return ret;
ret = stk8312_set_mode(data,
STK8312_MODE_INT_AH_PP | STK8312_MODE_ACTIVE);
if (ret < 0)
return ret;
if (client->irq > 0) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
stk8312_data_rdy_trig_poll,
NULL,
IRQF_TRIGGER_RISING |
IRQF_ONESHOT,
STK8312_IRQ_NAME,
indio_dev);
if (ret < 0) {
dev_err(&client->dev, "request irq %d failed\n",
client->irq);
goto err_power_off;
}
data->dready_trig = devm_iio_trigger_alloc(&client->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig) {
ret = -ENOMEM;
goto err_power_off;
}
data->dready_trig->ops = &stk8312_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);
if (ret) {
dev_err(&client->dev, "iio trigger register failed\n");
goto err_power_off;
}
}
ret = iio_triggered_buffer_setup(indio_dev,
iio_pollfunc_store_time,
stk8312_trigger_handler,
&stk8312_buffer_setup_ops);
if (ret < 0) {
dev_err(&client->dev, "iio triggered buffer setup failed\n");
goto err_trigger_unregister;
}
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
goto err_buffer_cleanup;
}
return 0;
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
err_power_off:
stk8312_set_mode(data, STK8312_MODE_STANDBY);
return ret;
}
static void stk8312_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct stk8312_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
stk8312_set_mode(data, STK8312_MODE_STANDBY);
}
static int stk8312_suspend(struct device *dev)
{
struct stk8312_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
}
static int stk8312_resume(struct device *dev)
{
struct stk8312_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
}
static DEFINE_SIMPLE_DEV_PM_OPS(stk8312_pm_ops, stk8312_suspend,
stk8312_resume);
static const struct i2c_device_id stk8312_i2c_id[] = {
/* Deprecated in favour of lowercase form */
{ "STK8312", 0 },
{ "stk8312", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, stk8312_i2c_id);
static struct i2c_driver stk8312_driver = {
.driver = {
.name = STK8312_DRIVER_NAME,
.pm = pm_sleep_ptr(&stk8312_pm_ops),
},
.probe = stk8312_probe,
.remove = stk8312_remove,
.id_table = stk8312_i2c_id,
};
module_i2c_driver(stk8312_driver);
MODULE_AUTHOR("Tiberiu Breana <[email protected]>");
MODULE_DESCRIPTION("STK8312 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/stk8312.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* mCube MC3230 3-Axis Accelerometer
*
* Copyright (c) 2016 Hans de Goede <[email protected]>
*
* IIO driver for mCube MC3230; 7-bit I2C address: 0x4c.
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define MC3230_REG_XOUT 0x00
#define MC3230_REG_YOUT 0x01
#define MC3230_REG_ZOUT 0x02
#define MC3230_REG_MODE 0x07
#define MC3230_MODE_OPCON_MASK 0x03
#define MC3230_MODE_OPCON_WAKE 0x01
#define MC3230_MODE_OPCON_STANDBY 0x03
#define MC3230_REG_CHIP_ID 0x18
#define MC3230_CHIP_ID 0x01
#define MC3230_REG_PRODUCT_CODE 0x3b
#define MC3230_PRODUCT_CODE 0x19
/*
* The accelerometer has one measurement range:
*
* -1.5g - +1.5g (8-bit, signed)
*
* scale = (1.5 + 1.5) * 9.81 / (2^8 - 1) = 0.115411765
*/
static const int mc3230_nscale = 115411765;
#define MC3230_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec mc3230_channels[] = {
MC3230_CHANNEL(MC3230_REG_XOUT, X),
MC3230_CHANNEL(MC3230_REG_YOUT, Y),
MC3230_CHANNEL(MC3230_REG_ZOUT, Z),
};
struct mc3230_data {
struct i2c_client *client;
};
static int mc3230_set_opcon(struct mc3230_data *data, int opcon)
{
int ret;
struct i2c_client *client = data->client;
ret = i2c_smbus_read_byte_data(client, MC3230_REG_MODE);
if (ret < 0) {
dev_err(&client->dev, "failed to read mode reg: %d\n", ret);
return ret;
}
ret &= ~MC3230_MODE_OPCON_MASK;
ret |= opcon;
ret = i2c_smbus_write_byte_data(client, MC3230_REG_MODE, ret);
if (ret < 0) {
dev_err(&client->dev, "failed to write mode reg: %d\n", ret);
return ret;
}
return 0;
}
static int mc3230_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mc3230_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_byte_data(data->client, chan->address);
if (ret < 0)
return ret;
*val = sign_extend32(ret, 7);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = mc3230_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info mc3230_info = {
.read_raw = mc3230_read_raw,
};
static int mc3230_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct mc3230_data *data;
/* First check chip-id and product-id */
ret = i2c_smbus_read_byte_data(client, MC3230_REG_CHIP_ID);
if (ret != MC3230_CHIP_ID)
return (ret < 0) ? ret : -ENODEV;
ret = i2c_smbus_read_byte_data(client, MC3230_REG_PRODUCT_CODE);
if (ret != MC3230_PRODUCT_CODE)
return (ret < 0) ? ret : -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev) {
dev_err(&client->dev, "iio allocation failed!\n");
return -ENOMEM;
}
data = iio_priv(indio_dev);
data->client = client;
i2c_set_clientdata(client, indio_dev);
indio_dev->info = &mc3230_info;
indio_dev->name = "mc3230";
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mc3230_channels;
indio_dev->num_channels = ARRAY_SIZE(mc3230_channels);
ret = mc3230_set_opcon(data, MC3230_MODE_OPCON_WAKE);
if (ret < 0)
return ret;
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
mc3230_set_opcon(data, MC3230_MODE_OPCON_STANDBY);
}
return ret;
}
static void mc3230_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
iio_device_unregister(indio_dev);
mc3230_set_opcon(iio_priv(indio_dev), MC3230_MODE_OPCON_STANDBY);
}
static int mc3230_suspend(struct device *dev)
{
struct mc3230_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mc3230_set_opcon(data, MC3230_MODE_OPCON_STANDBY);
}
static int mc3230_resume(struct device *dev)
{
struct mc3230_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mc3230_set_opcon(data, MC3230_MODE_OPCON_WAKE);
}
static DEFINE_SIMPLE_DEV_PM_OPS(mc3230_pm_ops, mc3230_suspend, mc3230_resume);
static const struct i2c_device_id mc3230_i2c_id[] = {
{"mc3230", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, mc3230_i2c_id);
static struct i2c_driver mc3230_driver = {
.driver = {
.name = "mc3230",
.pm = pm_sleep_ptr(&mc3230_pm_ops),
},
.probe = mc3230_probe,
.remove = mc3230_remove,
.id_table = mc3230_i2c_id,
};
module_i2c_driver(mc3230_driver);
MODULE_AUTHOR("Hans de Goede <[email protected]>");
MODULE_DESCRIPTION("mCube MC3230 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/accel/mc3230.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 Invensense, Inc.
*/
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
/* compute jitter, min and max following jitter in per mille */
#define INV_SENSORS_TIMESTAMP_JITTER(_val, _jitter) \
(div_s64((_val) * (_jitter), 1000))
#define INV_SENSORS_TIMESTAMP_MIN(_val, _jitter) \
(((_val) * (1000 - (_jitter))) / 1000)
#define INV_SENSORS_TIMESTAMP_MAX(_val, _jitter) \
(((_val) * (1000 + (_jitter))) / 1000)
/* Add a new value inside an accumulator and update the estimate value */
static void inv_update_acc(struct inv_sensors_timestamp_acc *acc, uint32_t val)
{
uint64_t sum = 0;
size_t i;
acc->values[acc->idx++] = val;
if (acc->idx >= ARRAY_SIZE(acc->values))
acc->idx = 0;
/* compute the mean of all stored values, use 0 as empty slot */
for (i = 0; i < ARRAY_SIZE(acc->values); ++i) {
if (acc->values[i] == 0)
break;
sum += acc->values[i];
}
acc->val = div_u64(sum, i);
}
void inv_sensors_timestamp_init(struct inv_sensors_timestamp *ts,
const struct inv_sensors_timestamp_chip *chip)
{
memset(ts, 0, sizeof(*ts));
/* save chip parameters and compute min and max clock period */
ts->chip = *chip;
ts->min_period = INV_SENSORS_TIMESTAMP_MIN(chip->clock_period, chip->jitter);
ts->max_period = INV_SENSORS_TIMESTAMP_MAX(chip->clock_period, chip->jitter);
/* current multiplier and period values after reset */
ts->mult = chip->init_period / chip->clock_period;
ts->period = chip->init_period;
/* use theoretical value for chip period */
inv_update_acc(&ts->chip_period, chip->clock_period);
}
EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_init, IIO_INV_SENSORS_TIMESTAMP);
int inv_sensors_timestamp_update_odr(struct inv_sensors_timestamp *ts,
uint32_t period, bool fifo)
{
/* when FIFO is on, prevent odr change if one is already pending */
if (fifo && ts->new_mult != 0)
return -EAGAIN;
ts->new_mult = period / ts->chip.clock_period;
return 0;
}
EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_update_odr, IIO_INV_SENSORS_TIMESTAMP);
static bool inv_validate_period(struct inv_sensors_timestamp *ts, uint32_t period, uint32_t mult)
{
uint32_t period_min, period_max;
/* check that period is acceptable */
period_min = ts->min_period * mult;
period_max = ts->max_period * mult;
if (period > period_min && period < period_max)
return true;
else
return false;
}
static bool inv_update_chip_period(struct inv_sensors_timestamp *ts,
uint32_t mult, uint32_t period)
{
uint32_t new_chip_period;
if (!inv_validate_period(ts, period, mult))
return false;
/* update chip internal period estimation */
new_chip_period = period / mult;
inv_update_acc(&ts->chip_period, new_chip_period);
ts->period = ts->mult * ts->chip_period.val;
return true;
}
static void inv_align_timestamp_it(struct inv_sensors_timestamp *ts)
{
int64_t delta, jitter;
int64_t adjust;
/* delta time between last sample and last interrupt */
delta = ts->it.lo - ts->timestamp;
/* adjust timestamp while respecting jitter */
jitter = INV_SENSORS_TIMESTAMP_JITTER((int64_t)ts->period, ts->chip.jitter);
if (delta > jitter)
adjust = jitter;
else if (delta < -jitter)
adjust = -jitter;
else
adjust = 0;
ts->timestamp += adjust;
}
void inv_sensors_timestamp_interrupt(struct inv_sensors_timestamp *ts,
uint32_t fifo_period, size_t fifo_nb,
size_t sensor_nb, int64_t timestamp)
{
struct inv_sensors_timestamp_interval *it;
int64_t delta, interval;
const uint32_t fifo_mult = fifo_period / ts->chip.clock_period;
uint32_t period = ts->period;
bool valid = false;
if (fifo_nb == 0)
return;
/* update interrupt timestamp and compute chip and sensor periods */
it = &ts->it;
it->lo = it->up;
it->up = timestamp;
delta = it->up - it->lo;
if (it->lo != 0) {
/* compute period: delta time divided by number of samples */
period = div_s64(delta, fifo_nb);
valid = inv_update_chip_period(ts, fifo_mult, period);
}
/* no previous data, compute theoritical value from interrupt */
if (ts->timestamp == 0) {
/* elapsed time: sensor period * sensor samples number */
interval = (int64_t)ts->period * (int64_t)sensor_nb;
ts->timestamp = it->up - interval;
return;
}
/* if interrupt interval is valid, sync with interrupt timestamp */
if (valid)
inv_align_timestamp_it(ts);
}
EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_interrupt, IIO_INV_SENSORS_TIMESTAMP);
void inv_sensors_timestamp_apply_odr(struct inv_sensors_timestamp *ts,
uint32_t fifo_period, size_t fifo_nb,
unsigned int fifo_no)
{
int64_t interval;
uint32_t fifo_mult;
if (ts->new_mult == 0)
return;
/* update to new multiplier and update period */
ts->mult = ts->new_mult;
ts->new_mult = 0;
ts->period = ts->mult * ts->chip_period.val;
/*
* After ODR change the time interval with the previous sample is
* undertermined (depends when the change occures). So we compute the
* timestamp from the current interrupt using the new FIFO period, the
* total number of samples and the current sample numero.
*/
if (ts->timestamp != 0) {
/* compute measured fifo period */
fifo_mult = fifo_period / ts->chip.clock_period;
fifo_period = fifo_mult * ts->chip_period.val;
/* computes time interval between interrupt and this sample */
interval = (int64_t)(fifo_nb - fifo_no) * (int64_t)fifo_period;
ts->timestamp = ts->it.up - interval;
}
}
EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_apply_odr, IIO_INV_SENSORS_TIMESTAMP);
MODULE_AUTHOR("InvenSense, Inc.");
MODULE_DESCRIPTION("InvenSense sensors timestamp module");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/common/inv_sensors/inv_sensors_timestamp.c |
// SPDX-License-Identifier: GPL-2.0
/*
* cros_ec_sensors - Driver for Chrome OS Embedded Controller sensors.
*
* Copyright (C) 2016 Google, Inc
*
* This driver uses the cros-ec interface to communicate with the Chrome OS
* EC about sensors data. Data access is presented through iio sysfs.
*/
#include <linux/device.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/cros_ec_sensors_core.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_data/cros_ec_commands.h>
#include <linux/platform_data/cros_ec_proto.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#define CROS_EC_SENSORS_MAX_CHANNELS 4
/* State data for ec_sensors iio driver. */
struct cros_ec_sensors_state {
/* Shared by all sensors */
struct cros_ec_sensors_core_state core;
struct iio_chan_spec channels[CROS_EC_SENSORS_MAX_CHANNELS];
};
static int cros_ec_sensors_read(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct cros_ec_sensors_state *st = iio_priv(indio_dev);
s16 data = 0;
s64 val64;
int i;
int ret;
int idx = chan->scan_index;
mutex_lock(&st->core.cmd_lock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = st->core.read_ec_sensors_data(indio_dev, 1 << idx, &data);
if (ret < 0)
break;
ret = IIO_VAL_INT;
*val = data;
break;
case IIO_CHAN_INFO_CALIBBIAS:
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_OFFSET;
st->core.param.sensor_offset.flags = 0;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
if (ret < 0)
break;
/* Save values */
for (i = CROS_EC_SENSOR_X; i < CROS_EC_SENSOR_MAX_AXIS; i++)
st->core.calib[i].offset =
st->core.resp->sensor_offset.offset[i];
ret = IIO_VAL_INT;
*val = st->core.calib[idx].offset;
break;
case IIO_CHAN_INFO_CALIBSCALE:
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_SCALE;
st->core.param.sensor_offset.flags = 0;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
if (ret == -EPROTO || ret == -EOPNOTSUPP) {
/* Reading calibscale is not supported on older EC. */
*val = 1;
*val2 = 0;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
} else if (ret) {
break;
}
/* Save values */
for (i = CROS_EC_SENSOR_X; i < CROS_EC_SENSOR_MAX_AXIS; i++)
st->core.calib[i].scale =
st->core.resp->sensor_scale.scale[i];
*val = st->core.calib[idx].scale >> 15;
*val2 = ((st->core.calib[idx].scale & 0x7FFF) * 1000000LL) /
MOTION_SENSE_DEFAULT_SCALE;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
case IIO_CHAN_INFO_SCALE:
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_RANGE;
st->core.param.sensor_range.data = EC_MOTION_SENSE_NO_VALUE;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
if (ret < 0)
break;
val64 = st->core.resp->sensor_range.ret;
switch (st->core.type) {
case MOTIONSENSE_TYPE_ACCEL:
/*
* EC returns data in g, iio exepects m/s^2.
* Do not use IIO_G_TO_M_S_2 to avoid precision loss.
*/
*val = div_s64(val64 * 980665, 10);
*val2 = 10000 << (CROS_EC_SENSOR_BITS - 1);
ret = IIO_VAL_FRACTIONAL;
break;
case MOTIONSENSE_TYPE_GYRO:
/*
* EC returns data in dps, iio expects rad/s.
* Do not use IIO_DEGREE_TO_RAD to avoid precision
* loss. Round to the nearest integer.
*/
*val = 0;
*val2 = div_s64(val64 * 3141592653ULL,
180 << (CROS_EC_SENSOR_BITS - 1));
ret = IIO_VAL_INT_PLUS_NANO;
break;
case MOTIONSENSE_TYPE_MAG:
/*
* EC returns data in 16LSB / uT,
* iio expects Gauss
*/
*val = val64;
*val2 = 100 << (CROS_EC_SENSOR_BITS - 1);
ret = IIO_VAL_FRACTIONAL;
break;
default:
ret = -EINVAL;
}
break;
default:
ret = cros_ec_sensors_core_read(&st->core, chan, val, val2,
mask);
break;
}
mutex_unlock(&st->core.cmd_lock);
return ret;
}
static int cros_ec_sensors_write(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct cros_ec_sensors_state *st = iio_priv(indio_dev);
int i;
int ret;
int idx = chan->scan_index;
mutex_lock(&st->core.cmd_lock);
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
st->core.calib[idx].offset = val;
/* Send to EC for each axis, even if not complete */
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_OFFSET;
st->core.param.sensor_offset.flags =
MOTION_SENSE_SET_OFFSET;
for (i = CROS_EC_SENSOR_X; i < CROS_EC_SENSOR_MAX_AXIS; i++)
st->core.param.sensor_offset.offset[i] =
st->core.calib[i].offset;
st->core.param.sensor_offset.temp =
EC_MOTION_SENSE_INVALID_CALIB_TEMP;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
break;
case IIO_CHAN_INFO_CALIBSCALE:
st->core.calib[idx].scale = val;
/* Send to EC for each axis, even if not complete */
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_SCALE;
st->core.param.sensor_offset.flags =
MOTION_SENSE_SET_OFFSET;
for (i = CROS_EC_SENSOR_X; i < CROS_EC_SENSOR_MAX_AXIS; i++)
st->core.param.sensor_scale.scale[i] =
st->core.calib[i].scale;
st->core.param.sensor_scale.temp =
EC_MOTION_SENSE_INVALID_CALIB_TEMP;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
break;
case IIO_CHAN_INFO_SCALE:
if (st->core.type == MOTIONSENSE_TYPE_MAG) {
ret = -EINVAL;
break;
}
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_RANGE;
st->core.param.sensor_range.data = val;
/* Always roundup, so caller gets at least what it asks for. */
st->core.param.sensor_range.roundup = 1;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
if (ret == 0) {
st->core.range_updated = true;
st->core.curr_range = val;
}
break;
default:
ret = cros_ec_sensors_core_write(
&st->core, chan, val, val2, mask);
break;
}
mutex_unlock(&st->core.cmd_lock);
return ret;
}
static const struct iio_info ec_sensors_info = {
.read_raw = &cros_ec_sensors_read,
.write_raw = &cros_ec_sensors_write,
.read_avail = &cros_ec_sensors_core_read_avail,
};
static int cros_ec_sensors_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct iio_dev *indio_dev;
struct cros_ec_sensors_state *state;
struct iio_chan_spec *channel;
int ret, i;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*state));
if (!indio_dev)
return -ENOMEM;
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
cros_ec_sensors_capture);
if (ret)
return ret;
indio_dev->info = &ec_sensors_info;
state = iio_priv(indio_dev);
for (channel = state->channels, i = CROS_EC_SENSOR_X;
i < CROS_EC_SENSOR_MAX_AXIS; i++, channel++) {
/* Common part */
channel->info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_CALIBBIAS) |
BIT(IIO_CHAN_INFO_CALIBSCALE);
channel->info_mask_shared_by_all =
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ);
channel->info_mask_shared_by_all_available =
BIT(IIO_CHAN_INFO_SAMP_FREQ);
channel->scan_type.realbits = CROS_EC_SENSOR_BITS;
channel->scan_type.storagebits = CROS_EC_SENSOR_BITS;
channel->scan_index = i;
channel->ext_info = cros_ec_sensors_ext_info;
channel->modified = 1;
channel->channel2 = IIO_MOD_X + i;
channel->scan_type.sign = 's';
/* Sensor specific */
switch (state->core.type) {
case MOTIONSENSE_TYPE_ACCEL:
channel->type = IIO_ACCEL;
break;
case MOTIONSENSE_TYPE_GYRO:
channel->type = IIO_ANGL_VEL;
break;
case MOTIONSENSE_TYPE_MAG:
channel->type = IIO_MAGN;
break;
default:
dev_err(&pdev->dev, "Unknown motion sensor\n");
return -EINVAL;
}
}
/* Timestamp */
channel->type = IIO_TIMESTAMP;
channel->channel = -1;
channel->scan_index = CROS_EC_SENSOR_MAX_AXIS;
channel->scan_type.sign = 's';
channel->scan_type.realbits = 64;
channel->scan_type.storagebits = 64;
indio_dev->channels = state->channels;
indio_dev->num_channels = CROS_EC_SENSORS_MAX_CHANNELS;
/* There is only enough room for accel and gyro in the io space */
if ((state->core.ec->cmd_readmem != NULL) &&
(state->core.type != MOTIONSENSE_TYPE_MAG))
state->core.read_ec_sensors_data = cros_ec_sensors_read_lpc;
else
state->core.read_ec_sensors_data = cros_ec_sensors_read_cmd;
return cros_ec_sensors_core_register(dev, indio_dev,
cros_ec_sensors_push_data);
}
static const struct platform_device_id cros_ec_sensors_ids[] = {
{
.name = "cros-ec-accel",
},
{
.name = "cros-ec-gyro",
},
{
.name = "cros-ec-mag",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, cros_ec_sensors_ids);
static struct platform_driver cros_ec_sensors_platform_driver = {
.driver = {
.name = "cros-ec-sensors",
.pm = &cros_ec_sensors_pm_ops,
},
.probe = cros_ec_sensors_probe,
.id_table = cros_ec_sensors_ids,
};
module_platform_driver(cros_ec_sensors_platform_driver);
MODULE_DESCRIPTION("ChromeOS EC 3-axis sensors driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/cros_ec_sensors/cros_ec_sensors.c |
// SPDX-License-Identifier: GPL-2.0
/*
* cros_ec_lid_angle - Driver for CrOS EC lid angle sensor.
*
* Copyright 2018 Google, Inc
*
* This driver uses the cros-ec interface to communicate with the Chrome OS
* EC about counter sensors. Counters are presented through
* iio sysfs.
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/cros_ec_sensors_core.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_data/cros_ec_commands.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#define DRV_NAME "cros-ec-lid-angle"
/*
* One channel for the lid angle, the other for timestamp.
*/
static const struct iio_chan_spec cros_ec_lid_angle_channels[] = {
{
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.scan_type.realbits = CROS_EC_SENSOR_BITS,
.scan_type.storagebits = CROS_EC_SENSOR_BITS,
.scan_type.sign = 'u',
.type = IIO_ANGL
},
IIO_CHAN_SOFT_TIMESTAMP(1)
};
/* State data for ec_sensors iio driver. */
struct cros_ec_lid_angle_state {
/* Shared by all sensors */
struct cros_ec_sensors_core_state core;
};
static int cros_ec_sensors_read_lid_angle(struct iio_dev *indio_dev,
unsigned long scan_mask, s16 *data)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int ret;
st->param.cmd = MOTIONSENSE_CMD_LID_ANGLE;
ret = cros_ec_motion_send_host_cmd(st, sizeof(st->resp->lid_angle));
if (ret) {
dev_warn(&indio_dev->dev, "Unable to read lid angle\n");
return ret;
}
*data = st->resp->lid_angle.value;
return 0;
}
static int cros_ec_lid_angle_read(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct cros_ec_lid_angle_state *st = iio_priv(indio_dev);
s16 data;
int ret;
mutex_lock(&st->core.cmd_lock);
ret = cros_ec_sensors_read_lid_angle(indio_dev, 1, &data);
if (ret == 0) {
*val = data;
ret = IIO_VAL_INT;
}
mutex_unlock(&st->core.cmd_lock);
return ret;
}
static const struct iio_info cros_ec_lid_angle_info = {
.read_raw = &cros_ec_lid_angle_read,
};
static int cros_ec_lid_angle_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct iio_dev *indio_dev;
struct cros_ec_lid_angle_state *state;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*state));
if (!indio_dev)
return -ENOMEM;
ret = cros_ec_sensors_core_init(pdev, indio_dev, false, NULL);
if (ret)
return ret;
indio_dev->info = &cros_ec_lid_angle_info;
state = iio_priv(indio_dev);
indio_dev->channels = cros_ec_lid_angle_channels;
indio_dev->num_channels = ARRAY_SIZE(cros_ec_lid_angle_channels);
state->core.read_ec_sensors_data = cros_ec_sensors_read_lid_angle;
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
cros_ec_sensors_capture, NULL);
if (ret)
return ret;
return cros_ec_sensors_core_register(dev, indio_dev, NULL);
}
static const struct platform_device_id cros_ec_lid_angle_ids[] = {
{
.name = DRV_NAME,
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, cros_ec_lid_angle_ids);
static struct platform_driver cros_ec_lid_angle_platform_driver = {
.driver = {
.name = DRV_NAME,
},
.probe = cros_ec_lid_angle_probe,
.id_table = cros_ec_lid_angle_ids,
};
module_platform_driver(cros_ec_lid_angle_platform_driver);
MODULE_DESCRIPTION("ChromeOS EC driver for reporting convertible lid angle.");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/cros_ec_sensors/cros_ec_lid_angle.c |
// SPDX-License-Identifier: GPL-2.0
/*
* cros_ec_sensors_core - Common function for Chrome OS EC sensor driver.
*
* Copyright (C) 2016 Google, Inc
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/cros_ec_sensors_core.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_data/cros_ec_commands.h>
#include <linux/platform_data/cros_ec_proto.h>
#include <linux/platform_data/cros_ec_sensorhub.h>
#include <linux/platform_device.h>
/*
* Hard coded to the first device to support sensor fifo. The EC has a 2048
* byte fifo and will trigger an interrupt when fifo is 2/3 full.
*/
#define CROS_EC_FIFO_SIZE (2048 * 2 / 3)
static int cros_ec_get_host_cmd_version_mask(struct cros_ec_device *ec_dev,
u16 cmd_offset, u16 cmd, u32 *mask)
{
int ret;
struct {
struct cros_ec_command msg;
union {
struct ec_params_get_cmd_versions params;
struct ec_response_get_cmd_versions resp;
};
} __packed buf = {
.msg = {
.command = EC_CMD_GET_CMD_VERSIONS + cmd_offset,
.insize = sizeof(struct ec_response_get_cmd_versions),
.outsize = sizeof(struct ec_params_get_cmd_versions)
},
.params = {.cmd = cmd}
};
ret = cros_ec_cmd_xfer_status(ec_dev, &buf.msg);
if (ret >= 0)
*mask = buf.resp.version_mask;
return ret;
}
static void get_default_min_max_freq(enum motionsensor_type type,
u32 *min_freq,
u32 *max_freq,
u32 *max_fifo_events)
{
/*
* We don't know fifo size, set to size previously used by older
* hardware.
*/
*max_fifo_events = CROS_EC_FIFO_SIZE;
switch (type) {
case MOTIONSENSE_TYPE_ACCEL:
*min_freq = 12500;
*max_freq = 100000;
break;
case MOTIONSENSE_TYPE_GYRO:
*min_freq = 25000;
*max_freq = 100000;
break;
case MOTIONSENSE_TYPE_MAG:
*min_freq = 5000;
*max_freq = 25000;
break;
case MOTIONSENSE_TYPE_PROX:
case MOTIONSENSE_TYPE_LIGHT:
*min_freq = 100;
*max_freq = 50000;
break;
case MOTIONSENSE_TYPE_BARO:
*min_freq = 250;
*max_freq = 20000;
break;
case MOTIONSENSE_TYPE_ACTIVITY:
default:
*min_freq = 0;
*max_freq = 0;
break;
}
}
static int cros_ec_sensor_set_ec_rate(struct cros_ec_sensors_core_state *st,
int rate)
{
int ret;
if (rate > U16_MAX)
rate = U16_MAX;
mutex_lock(&st->cmd_lock);
st->param.cmd = MOTIONSENSE_CMD_EC_RATE;
st->param.ec_rate.data = rate;
ret = cros_ec_motion_send_host_cmd(st, 0);
mutex_unlock(&st->cmd_lock);
return ret;
}
static ssize_t cros_ec_sensor_set_report_latency(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int integer, fract, ret;
int latency;
ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
if (ret)
return ret;
/* EC rate is in ms. */
latency = integer * 1000 + fract / 1000;
ret = cros_ec_sensor_set_ec_rate(st, latency);
if (ret < 0)
return ret;
return len;
}
static ssize_t cros_ec_sensor_get_report_latency(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int latency, ret;
mutex_lock(&st->cmd_lock);
st->param.cmd = MOTIONSENSE_CMD_EC_RATE;
st->param.ec_rate.data = EC_MOTION_SENSE_NO_VALUE;
ret = cros_ec_motion_send_host_cmd(st, 0);
latency = st->resp->ec_rate.ret;
mutex_unlock(&st->cmd_lock);
if (ret < 0)
return ret;
return sprintf(buf, "%d.%06u\n",
latency / 1000,
(latency % 1000) * 1000);
}
static IIO_DEVICE_ATTR(hwfifo_timeout, 0644,
cros_ec_sensor_get_report_latency,
cros_ec_sensor_set_report_latency, 0);
static ssize_t hwfifo_watermark_max_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
return sprintf(buf, "%d\n", st->fifo_max_event_count);
}
static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
static const struct iio_dev_attr *cros_ec_sensor_fifo_attributes[] = {
&iio_dev_attr_hwfifo_timeout,
&iio_dev_attr_hwfifo_watermark_max,
NULL,
};
int cros_ec_sensors_push_data(struct iio_dev *indio_dev,
s16 *data,
s64 timestamp)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
s16 *out;
s64 delta;
unsigned int i;
/*
* Ignore samples if the buffer is not set: it is needed if the ODR is
* set but the buffer is not enabled yet.
*/
if (!iio_buffer_enabled(indio_dev))
return 0;
out = (s16 *)st->samples;
for_each_set_bit(i,
indio_dev->active_scan_mask,
indio_dev->masklength) {
*out = data[i];
out++;
}
if (iio_device_get_clock(indio_dev) != CLOCK_BOOTTIME)
delta = iio_get_time_ns(indio_dev) - cros_ec_get_time_ns();
else
delta = 0;
iio_push_to_buffers_with_timestamp(indio_dev, st->samples,
timestamp + delta);
return 0;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_push_data);
static void cros_ec_sensors_core_clean(void *arg)
{
struct platform_device *pdev = (struct platform_device *)arg;
struct cros_ec_sensorhub *sensor_hub =
dev_get_drvdata(pdev->dev.parent);
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
u8 sensor_num = st->param.info.sensor_num;
cros_ec_sensorhub_unregister_push_data(sensor_hub, sensor_num);
}
/**
* cros_ec_sensors_core_init() - basic initialization of the core structure
* @pdev: platform device created for the sensor
* @indio_dev: iio device structure of the device
* @physical_device: true if the device refers to a physical device
* @trigger_capture: function pointer to call buffer is triggered,
* for backward compatibility.
*
* Return: 0 on success, -errno on failure.
*/
int cros_ec_sensors_core_init(struct platform_device *pdev,
struct iio_dev *indio_dev,
bool physical_device,
cros_ec_sensors_capture_t trigger_capture)
{
struct device *dev = &pdev->dev;
struct cros_ec_sensors_core_state *state = iio_priv(indio_dev);
struct cros_ec_sensorhub *sensor_hub = dev_get_drvdata(dev->parent);
struct cros_ec_dev *ec = sensor_hub->ec;
struct cros_ec_sensor_platform *sensor_platform = dev_get_platdata(dev);
u32 ver_mask, temp;
int frequencies[ARRAY_SIZE(state->frequencies) / 2] = { 0 };
int ret, i;
platform_set_drvdata(pdev, indio_dev);
state->ec = ec->ec_dev;
state->msg = devm_kzalloc(&pdev->dev, sizeof(*state->msg) +
max((u16)sizeof(struct ec_params_motion_sense),
state->ec->max_response), GFP_KERNEL);
if (!state->msg)
return -ENOMEM;
state->resp = (struct ec_response_motion_sense *)state->msg->data;
mutex_init(&state->cmd_lock);
ret = cros_ec_get_host_cmd_version_mask(state->ec,
ec->cmd_offset,
EC_CMD_MOTION_SENSE_CMD,
&ver_mask);
if (ret < 0)
return ret;
/* Set up the host command structure. */
state->msg->version = fls(ver_mask) - 1;
state->msg->command = EC_CMD_MOTION_SENSE_CMD + ec->cmd_offset;
state->msg->outsize = sizeof(struct ec_params_motion_sense);
indio_dev->name = pdev->name;
if (physical_device) {
enum motionsensor_location loc;
state->param.cmd = MOTIONSENSE_CMD_INFO;
state->param.info.sensor_num = sensor_platform->sensor_num;
ret = cros_ec_motion_send_host_cmd(state, 0);
if (ret) {
dev_warn(dev, "Can not access sensor info\n");
return ret;
}
state->type = state->resp->info.type;
loc = state->resp->info.location;
if (loc == MOTIONSENSE_LOC_BASE)
indio_dev->label = "accel-base";
else if (loc == MOTIONSENSE_LOC_LID)
indio_dev->label = "accel-display";
else if (loc == MOTIONSENSE_LOC_CAMERA)
indio_dev->label = "accel-camera";
/* Set sign vector, only used for backward compatibility. */
memset(state->sign, 1, CROS_EC_SENSOR_MAX_AXIS);
for (i = CROS_EC_SENSOR_X; i < CROS_EC_SENSOR_MAX_AXIS; i++)
state->calib[i].scale = MOTION_SENSE_DEFAULT_SCALE;
/* 0 is a correct value used to stop the device */
if (state->msg->version < 3) {
get_default_min_max_freq(state->resp->info.type,
&frequencies[1],
&frequencies[2],
&state->fifo_max_event_count);
} else {
if (state->resp->info_3.max_frequency == 0) {
get_default_min_max_freq(state->resp->info.type,
&frequencies[1],
&frequencies[2],
&temp);
} else {
frequencies[1] = state->resp->info_3.min_frequency;
frequencies[2] = state->resp->info_3.max_frequency;
}
state->fifo_max_event_count = state->resp->info_3.fifo_max_event_count;
}
for (i = 0; i < ARRAY_SIZE(frequencies); i++) {
state->frequencies[2 * i] = frequencies[i] / 1000;
state->frequencies[2 * i + 1] =
(frequencies[i] % 1000) * 1000;
}
if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO)) {
/*
* Create a software buffer, feed by the EC FIFO.
* We can not use trigger here, as events are generated
* as soon as sample_frequency is set.
*/
ret = devm_iio_kfifo_buffer_setup_ext(dev, indio_dev, NULL,
cros_ec_sensor_fifo_attributes);
if (ret)
return ret;
/* Timestamp coming from FIFO are in ns since boot. */
ret = iio_device_set_clock(indio_dev, CLOCK_BOOTTIME);
if (ret)
return ret;
} else {
/*
* The only way to get samples in buffer is to set a
* software trigger (systrig, hrtimer).
*/
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
NULL, trigger_capture, NULL);
if (ret)
return ret;
}
}
return 0;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_core_init);
/**
* cros_ec_sensors_core_register() - Register callback to FIFO and IIO when
* sensor is ready.
* It must be called at the end of the sensor probe routine.
* @dev: device created for the sensor
* @indio_dev: iio device structure of the device
* @push_data: function to call when cros_ec_sensorhub receives
* a sample for that sensor.
*
* Return: 0 on success, -errno on failure.
*/
int cros_ec_sensors_core_register(struct device *dev,
struct iio_dev *indio_dev,
cros_ec_sensorhub_push_data_cb_t push_data)
{
struct cros_ec_sensor_platform *sensor_platform = dev_get_platdata(dev);
struct cros_ec_sensorhub *sensor_hub = dev_get_drvdata(dev->parent);
struct platform_device *pdev = to_platform_device(dev);
struct cros_ec_dev *ec = sensor_hub->ec;
int ret;
ret = devm_iio_device_register(dev, indio_dev);
if (ret)
return ret;
if (!push_data ||
!cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO))
return 0;
ret = cros_ec_sensorhub_register_push_data(
sensor_hub, sensor_platform->sensor_num,
indio_dev, push_data);
if (ret)
return ret;
return devm_add_action_or_reset(
dev, cros_ec_sensors_core_clean, pdev);
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_core_register);
/**
* cros_ec_motion_send_host_cmd() - send motion sense host command
* @state: pointer to state information for device
* @opt_length: optional length to reduce the response size, useful on the data
* path. Otherwise, the maximal allowed response size is used
*
* When called, the sub-command is assumed to be set in param->cmd.
*
* Return: 0 on success, -errno on failure.
*/
int cros_ec_motion_send_host_cmd(struct cros_ec_sensors_core_state *state,
u16 opt_length)
{
int ret;
if (opt_length)
state->msg->insize = min(opt_length, state->ec->max_response);
else
state->msg->insize = state->ec->max_response;
memcpy(state->msg->data, &state->param, sizeof(state->param));
ret = cros_ec_cmd_xfer_status(state->ec, state->msg);
if (ret < 0)
return ret;
if (ret &&
state->resp != (struct ec_response_motion_sense *)state->msg->data)
memcpy(state->resp, state->msg->data, ret);
return 0;
}
EXPORT_SYMBOL_GPL(cros_ec_motion_send_host_cmd);
static ssize_t cros_ec_sensors_calibrate(struct iio_dev *indio_dev,
uintptr_t private, const struct iio_chan_spec *chan,
const char *buf, size_t len)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int ret, i;
bool calibrate;
ret = kstrtobool(buf, &calibrate);
if (ret < 0)
return ret;
if (!calibrate)
return -EINVAL;
mutex_lock(&st->cmd_lock);
st->param.cmd = MOTIONSENSE_CMD_PERFORM_CALIB;
ret = cros_ec_motion_send_host_cmd(st, 0);
if (ret != 0) {
dev_warn(&indio_dev->dev, "Unable to calibrate sensor\n");
} else {
/* Save values */
for (i = CROS_EC_SENSOR_X; i < CROS_EC_SENSOR_MAX_AXIS; i++)
st->calib[i].offset = st->resp->perform_calib.offset[i];
}
mutex_unlock(&st->cmd_lock);
return ret ? ret : len;
}
static ssize_t cros_ec_sensors_id(struct iio_dev *indio_dev,
uintptr_t private,
const struct iio_chan_spec *chan, char *buf)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
return snprintf(buf, PAGE_SIZE, "%d\n", st->param.info.sensor_num);
}
const struct iio_chan_spec_ext_info cros_ec_sensors_ext_info[] = {
{
.name = "calibrate",
.shared = IIO_SHARED_BY_ALL,
.write = cros_ec_sensors_calibrate
},
{
.name = "id",
.shared = IIO_SHARED_BY_ALL,
.read = cros_ec_sensors_id
},
{ },
};
EXPORT_SYMBOL_GPL(cros_ec_sensors_ext_info);
/**
* cros_ec_sensors_idx_to_reg - convert index into offset in shared memory
* @st: pointer to state information for device
* @idx: sensor index (should be element of enum sensor_index)
*
* Return: address to read at
*/
static unsigned int cros_ec_sensors_idx_to_reg(
struct cros_ec_sensors_core_state *st,
unsigned int idx)
{
/*
* When using LPC interface, only space for 2 Accel and one Gyro.
* First halfword of MOTIONSENSE_TYPE_ACCEL is used by angle.
*/
if (st->type == MOTIONSENSE_TYPE_ACCEL)
return EC_MEMMAP_ACC_DATA + sizeof(u16) *
(1 + idx + st->param.info.sensor_num *
CROS_EC_SENSOR_MAX_AXIS);
return EC_MEMMAP_GYRO_DATA + sizeof(u16) * idx;
}
static int cros_ec_sensors_cmd_read_u8(struct cros_ec_device *ec,
unsigned int offset, u8 *dest)
{
return ec->cmd_readmem(ec, offset, 1, dest);
}
static int cros_ec_sensors_cmd_read_u16(struct cros_ec_device *ec,
unsigned int offset, u16 *dest)
{
__le16 tmp;
int ret = ec->cmd_readmem(ec, offset, 2, &tmp);
if (ret >= 0)
*dest = le16_to_cpu(tmp);
return ret;
}
/**
* cros_ec_sensors_read_until_not_busy() - read until is not busy
*
* @st: pointer to state information for device
*
* Read from EC status byte until it reads not busy.
* Return: 8-bit status if ok, -errno on failure.
*/
static int cros_ec_sensors_read_until_not_busy(
struct cros_ec_sensors_core_state *st)
{
struct cros_ec_device *ec = st->ec;
u8 status;
int ret, attempts = 0;
ret = cros_ec_sensors_cmd_read_u8(ec, EC_MEMMAP_ACC_STATUS, &status);
if (ret < 0)
return ret;
while (status & EC_MEMMAP_ACC_STATUS_BUSY_BIT) {
/* Give up after enough attempts, return error. */
if (attempts++ >= 50)
return -EIO;
/* Small delay every so often. */
if (attempts % 5 == 0)
msleep(25);
ret = cros_ec_sensors_cmd_read_u8(ec, EC_MEMMAP_ACC_STATUS,
&status);
if (ret < 0)
return ret;
}
return status;
}
/**
* cros_ec_sensors_read_data_unsafe() - read acceleration data from EC shared memory
* @indio_dev: pointer to IIO device
* @scan_mask: bitmap of the sensor indices to scan
* @data: location to store data
*
* This is the unsafe function for reading the EC data. It does not guarantee
* that the EC will not modify the data as it is being read in.
*
* Return: 0 on success, -errno on failure.
*/
static int cros_ec_sensors_read_data_unsafe(struct iio_dev *indio_dev,
unsigned long scan_mask, s16 *data)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
struct cros_ec_device *ec = st->ec;
unsigned int i;
int ret;
/* Read all sensors enabled in scan_mask. Each value is 2 bytes. */
for_each_set_bit(i, &scan_mask, indio_dev->masklength) {
ret = cros_ec_sensors_cmd_read_u16(ec,
cros_ec_sensors_idx_to_reg(st, i),
data);
if (ret < 0)
return ret;
*data *= st->sign[i];
data++;
}
return 0;
}
/**
* cros_ec_sensors_read_lpc() - read acceleration data from EC shared memory.
* @indio_dev: pointer to IIO device.
* @scan_mask: bitmap of the sensor indices to scan.
* @data: location to store data.
*
* Note: this is the safe function for reading the EC data. It guarantees
* that the data sampled was not modified by the EC while being read.
*
* Return: 0 on success, -errno on failure.
*/
int cros_ec_sensors_read_lpc(struct iio_dev *indio_dev,
unsigned long scan_mask, s16 *data)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
struct cros_ec_device *ec = st->ec;
u8 samp_id = 0xff, status = 0;
int ret, attempts = 0;
/*
* Continually read all data from EC until the status byte after
* all reads reflects that the EC is not busy and the sample id
* matches the sample id from before all reads. This guarantees
* that data read in was not modified by the EC while reading.
*/
while ((status & (EC_MEMMAP_ACC_STATUS_BUSY_BIT |
EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK)) != samp_id) {
/* If we have tried to read too many times, return error. */
if (attempts++ >= 5)
return -EIO;
/* Read status byte until EC is not busy. */
ret = cros_ec_sensors_read_until_not_busy(st);
if (ret < 0)
return ret;
/*
* Store the current sample id so that we can compare to the
* sample id after reading the data.
*/
samp_id = ret & EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK;
/* Read all EC data, format it, and store it into data. */
ret = cros_ec_sensors_read_data_unsafe(indio_dev, scan_mask,
data);
if (ret < 0)
return ret;
/* Read status byte. */
ret = cros_ec_sensors_cmd_read_u8(ec, EC_MEMMAP_ACC_STATUS,
&status);
if (ret < 0)
return ret;
}
return 0;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_read_lpc);
/**
* cros_ec_sensors_read_cmd() - retrieve data using the EC command protocol
* @indio_dev: pointer to IIO device
* @scan_mask: bitmap of the sensor indices to scan
* @data: location to store data
*
* Return: 0 on success, -errno on failure.
*/
int cros_ec_sensors_read_cmd(struct iio_dev *indio_dev,
unsigned long scan_mask, s16 *data)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int ret;
unsigned int i;
/* Read all sensor data through a command. */
st->param.cmd = MOTIONSENSE_CMD_DATA;
ret = cros_ec_motion_send_host_cmd(st, sizeof(st->resp->data));
if (ret != 0) {
dev_warn(&indio_dev->dev, "Unable to read sensor data\n");
return ret;
}
for_each_set_bit(i, &scan_mask, indio_dev->masklength) {
*data = st->resp->data.data[i];
data++;
}
return 0;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_read_cmd);
/**
* cros_ec_sensors_capture() - the trigger handler function
* @irq: the interrupt number.
* @p: a pointer to the poll function.
*
* On a trigger event occurring, if the pollfunc is attached then this
* handler is called as a threaded interrupt (and hence may sleep). It
* is responsible for grabbing data from the device and pushing it into
* the associated buffer.
*
* Return: IRQ_HANDLED
*/
irqreturn_t cros_ec_sensors_capture(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int ret;
mutex_lock(&st->cmd_lock);
/* Clear capture data. */
memset(st->samples, 0, indio_dev->scan_bytes);
/* Read data based on which channels are enabled in scan mask. */
ret = st->read_ec_sensors_data(indio_dev,
*(indio_dev->active_scan_mask),
(s16 *)st->samples);
if (ret < 0)
goto done;
iio_push_to_buffers_with_timestamp(indio_dev, st->samples,
iio_get_time_ns(indio_dev));
done:
/*
* Tell the core we are done with this trigger and ready for the
* next one.
*/
iio_trigger_notify_done(indio_dev->trig);
mutex_unlock(&st->cmd_lock);
return IRQ_HANDLED;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_capture);
/**
* cros_ec_sensors_core_read() - function to request a value from the sensor
* @st: pointer to state information for device
* @chan: channel specification structure table
* @val: will contain one element making up the returned value
* @val2: will contain another element making up the returned value
* @mask: specifies which values to be requested
*
* Return: the type of value returned by the device
*/
int cros_ec_sensors_core_read(struct cros_ec_sensors_core_state *st,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret, frequency;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
st->param.cmd = MOTIONSENSE_CMD_SENSOR_ODR;
st->param.sensor_odr.data =
EC_MOTION_SENSE_NO_VALUE;
ret = cros_ec_motion_send_host_cmd(st, 0);
if (ret)
break;
frequency = st->resp->sensor_odr.ret;
*val = frequency / 1000;
*val2 = (frequency % 1000) * 1000;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_core_read);
/**
* cros_ec_sensors_core_read_avail() - get available values
* @indio_dev: pointer to state information for device
* @chan: channel specification structure table
* @vals: list of available values
* @type: type of data returned
* @length: number of data returned in the array
* @mask: specifies which values to be requested
*
* Return: an error code, IIO_AVAIL_RANGE or IIO_AVAIL_LIST
*/
int cros_ec_sensors_core_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals,
int *type,
int *length,
long mask)
{
struct cros_ec_sensors_core_state *state = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*length = ARRAY_SIZE(state->frequencies);
*vals = (const int *)&state->frequencies;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
}
return -EINVAL;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_core_read_avail);
/**
* cros_ec_sensors_core_write() - function to write a value to the sensor
* @st: pointer to state information for device
* @chan: channel specification structure table
* @val: first part of value to write
* @val2: second part of value to write
* @mask: specifies which values to write
*
* Return: the type of value returned by the device
*/
int cros_ec_sensors_core_write(struct cros_ec_sensors_core_state *st,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int ret, frequency;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
frequency = val * 1000 + val2 / 1000;
st->param.cmd = MOTIONSENSE_CMD_SENSOR_ODR;
st->param.sensor_odr.data = frequency;
/* Always roundup, so caller gets at least what it asks for. */
st->param.sensor_odr.roundup = 1;
ret = cros_ec_motion_send_host_cmd(st, 0);
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
EXPORT_SYMBOL_GPL(cros_ec_sensors_core_write);
static int __maybe_unused cros_ec_sensors_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int ret = 0;
if (st->range_updated) {
mutex_lock(&st->cmd_lock);
st->param.cmd = MOTIONSENSE_CMD_SENSOR_RANGE;
st->param.sensor_range.data = st->curr_range;
st->param.sensor_range.roundup = 1;
ret = cros_ec_motion_send_host_cmd(st, 0);
mutex_unlock(&st->cmd_lock);
}
return ret;
}
SIMPLE_DEV_PM_OPS(cros_ec_sensors_pm_ops, NULL, cros_ec_sensors_resume);
EXPORT_SYMBOL_GPL(cros_ec_sensors_pm_ops);
MODULE_DESCRIPTION("ChromeOS EC sensor hub core functions");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c |
// SPDX-License-Identifier: GPL-2.0
/*
* System Control and Management Interface(SCMI) based IIO sensor driver
*
* Copyright (C) 2021 Google LLC
*/
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/sysfs.h>
#include <linux/kernel.h>
#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/scmi_protocol.h>
#include <linux/time.h>
#include <linux/types.h>
#include <linux/units.h>
#define SCMI_IIO_NUM_OF_AXIS 3
struct scmi_iio_priv {
const struct scmi_sensor_proto_ops *sensor_ops;
struct scmi_protocol_handle *ph;
const struct scmi_sensor_info *sensor_info;
struct iio_dev *indio_dev;
/* lock to protect against multiple access to the device */
struct mutex lock;
/* adding one additional channel for timestamp */
s64 iio_buf[SCMI_IIO_NUM_OF_AXIS + 1];
struct notifier_block sensor_update_nb;
u32 *freq_avail;
};
static int scmi_iio_sensor_update_cb(struct notifier_block *nb,
unsigned long event, void *data)
{
struct scmi_sensor_update_report *sensor_update = data;
struct iio_dev *scmi_iio_dev;
struct scmi_iio_priv *sensor;
s8 tstamp_scale;
u64 time, time_ns;
int i;
if (sensor_update->readings_count == 0)
return NOTIFY_DONE;
sensor = container_of(nb, struct scmi_iio_priv, sensor_update_nb);
for (i = 0; i < sensor_update->readings_count; i++)
sensor->iio_buf[i] = sensor_update->readings[i].value;
if (!sensor->sensor_info->timestamped) {
time_ns = ktime_to_ns(sensor_update->timestamp);
} else {
/*
* All the axes are supposed to have the same value for timestamp.
* We are just using the values from the Axis 0 here.
*/
time = sensor_update->readings[0].timestamp;
/*
* Timestamp returned by SCMI is in seconds and is equal to
* time * power-of-10 multiplier(tstamp_scale) seconds.
* Converting the timestamp to nanoseconds below.
*/
tstamp_scale = sensor->sensor_info->tstamp_scale +
const_ilog2(NSEC_PER_SEC) / const_ilog2(10);
if (tstamp_scale < 0) {
do_div(time, int_pow(10, abs(tstamp_scale)));
time_ns = time;
} else {
time_ns = time * int_pow(10, tstamp_scale);
}
}
scmi_iio_dev = sensor->indio_dev;
iio_push_to_buffers_with_timestamp(scmi_iio_dev, sensor->iio_buf,
time_ns);
return NOTIFY_OK;
}
static int scmi_iio_buffer_preenable(struct iio_dev *iio_dev)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u32 sensor_config = 0;
int err;
if (sensor->sensor_info->timestamped)
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_TSTAMP_ENABLED_MASK,
SCMI_SENS_CFG_TSTAMP_ENABLE);
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,
SCMI_SENS_CFG_SENSOR_ENABLE);
err = sensor->sensor_ops->config_set(sensor->ph,
sensor->sensor_info->id,
sensor_config);
if (err)
dev_err(&iio_dev->dev, "Error in enabling sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
static int scmi_iio_buffer_postdisable(struct iio_dev *iio_dev)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u32 sensor_config = 0;
int err;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,
SCMI_SENS_CFG_SENSOR_DISABLE);
err = sensor->sensor_ops->config_set(sensor->ph,
sensor->sensor_info->id,
sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in disabling sensor %s with err %d",
sensor->sensor_info->name, err);
}
return err;
}
static const struct iio_buffer_setup_ops scmi_iio_buffer_ops = {
.preenable = scmi_iio_buffer_preenable,
.postdisable = scmi_iio_buffer_postdisable,
};
static int scmi_iio_set_odr_val(struct iio_dev *iio_dev, int val, int val2)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u64 sec, mult, uHz, sf;
u32 sensor_config;
char buf[32];
int err = sensor->sensor_ops->config_get(sensor->ph,
sensor->sensor_info->id,
&sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in getting sensor config for sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
uHz = val * MICROHZ_PER_HZ + val2;
/*
* The seconds field in the sensor interval in SCMI is 16 bits long
* Therefore seconds = 1/Hz <= 0xFFFF. As floating point calculations are
* discouraged in the kernel driver code, to calculate the scale factor (sf)
* (1* 1000000 * sf)/uHz <= 0xFFFF. Therefore, sf <= (uHz * 0xFFFF)/1000000
* To calculate the multiplier,we convert the sf into char string and
* count the number of characters
*/
sf = (u64)uHz * 0xFFFF;
do_div(sf, MICROHZ_PER_HZ);
mult = scnprintf(buf, sizeof(buf), "%llu", sf) - 1;
sec = int_pow(10, mult) * MICROHZ_PER_HZ;
do_div(sec, uHz);
if (sec == 0) {
dev_err(&iio_dev->dev,
"Trying to set invalid sensor update value for sensor %s",
sensor->sensor_info->name);
return -EINVAL;
}
sensor_config &= ~SCMI_SENS_CFG_UPDATE_SECS_MASK;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_UPDATE_SECS_MASK, sec);
sensor_config &= ~SCMI_SENS_CFG_UPDATE_EXP_MASK;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_UPDATE_EXP_MASK, -mult);
if (sensor->sensor_info->timestamped) {
sensor_config &= ~SCMI_SENS_CFG_TSTAMP_ENABLED_MASK;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_TSTAMP_ENABLED_MASK,
SCMI_SENS_CFG_TSTAMP_ENABLE);
}
sensor_config &= ~SCMI_SENS_CFG_ROUND_MASK;
sensor_config |=
FIELD_PREP(SCMI_SENS_CFG_ROUND_MASK, SCMI_SENS_CFG_ROUND_AUTO);
err = sensor->sensor_ops->config_set(sensor->ph,
sensor->sensor_info->id,
sensor_config);
if (err)
dev_err(&iio_dev->dev,
"Error in setting sensor update interval for sensor %s value %u err %d",
sensor->sensor_info->name, sensor_config, err);
return err;
}
static int scmi_iio_write_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
int err;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&sensor->lock);
err = scmi_iio_set_odr_val(iio_dev, val, val2);
mutex_unlock(&sensor->lock);
return err;
default:
return -EINVAL;
}
}
static int scmi_iio_read_avail(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = sensor->freq_avail;
*type = IIO_VAL_INT_PLUS_MICRO;
*length = sensor->sensor_info->intervals.count * 2;
if (sensor->sensor_info->intervals.segmented)
return IIO_AVAIL_RANGE;
else
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static void convert_ns_to_freq(u64 interval_ns, u64 *hz, u64 *uhz)
{
u64 rem, freq;
freq = NSEC_PER_SEC;
rem = do_div(freq, interval_ns);
*hz = freq;
*uhz = rem * 1000000UL;
do_div(*uhz, interval_ns);
}
static int scmi_iio_get_odr_val(struct iio_dev *iio_dev, int *val, int *val2)
{
u64 sensor_update_interval, sensor_interval_mult, hz, uhz;
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u32 sensor_config;
int mult;
int err = sensor->sensor_ops->config_get(sensor->ph,
sensor->sensor_info->id,
&sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in getting sensor config for sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
sensor_update_interval =
SCMI_SENS_CFG_GET_UPDATE_SECS(sensor_config) * NSEC_PER_SEC;
mult = SCMI_SENS_CFG_GET_UPDATE_EXP(sensor_config);
if (mult < 0) {
sensor_interval_mult = int_pow(10, abs(mult));
do_div(sensor_update_interval, sensor_interval_mult);
} else {
sensor_interval_mult = int_pow(10, mult);
sensor_update_interval =
sensor_update_interval * sensor_interval_mult;
}
convert_ns_to_freq(sensor_update_interval, &hz, &uhz);
*val = hz;
*val2 = uhz;
return 0;
}
static int scmi_iio_read_channel_data(struct iio_dev *iio_dev,
struct iio_chan_spec const *ch, int *val, int *val2)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u32 sensor_config;
struct scmi_sensor_reading readings[SCMI_IIO_NUM_OF_AXIS];
int err;
sensor_config = FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,
SCMI_SENS_CFG_SENSOR_ENABLE);
err = sensor->sensor_ops->config_set(
sensor->ph, sensor->sensor_info->id, sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in enabling sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
err = sensor->sensor_ops->reading_get_timestamped(
sensor->ph, sensor->sensor_info->id,
sensor->sensor_info->num_axis, readings);
if (err) {
dev_err(&iio_dev->dev,
"Error in reading raw attribute for sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
sensor_config = FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,
SCMI_SENS_CFG_SENSOR_DISABLE);
err = sensor->sensor_ops->config_set(
sensor->ph, sensor->sensor_info->id, sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in disabling sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
*val = lower_32_bits(readings[ch->scan_index].value);
*val2 = upper_32_bits(readings[ch->scan_index].value);
return IIO_VAL_INT_64;
}
static int scmi_iio_read_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *ch, int *val,
int *val2, long mask)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
s8 scale;
int ret;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
scale = sensor->sensor_info->axis[ch->scan_index].scale;
if (scale < 0) {
*val = 1;
*val2 = int_pow(10, abs(scale));
return IIO_VAL_FRACTIONAL;
}
*val = int_pow(10, scale);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = scmi_iio_get_odr_val(iio_dev, val, val2);
return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(iio_dev);
if (ret)
return ret;
ret = scmi_iio_read_channel_data(iio_dev, ch, val, val2);
iio_device_release_direct_mode(iio_dev);
return ret;
default:
return -EINVAL;
}
}
static const struct iio_info scmi_iio_info = {
.read_raw = scmi_iio_read_raw,
.read_avail = scmi_iio_read_avail,
.write_raw = scmi_iio_write_raw,
};
static ssize_t scmi_iio_get_raw_available(struct iio_dev *iio_dev,
uintptr_t private,
const struct iio_chan_spec *chan,
char *buf)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u64 resolution, rem;
s64 min_range, max_range;
s8 exponent, scale;
int len = 0;
/*
* All the axes are supposed to have the same value for range and resolution.
* We are just using the values from the Axis 0 here.
*/
if (sensor->sensor_info->axis[0].extended_attrs) {
min_range = sensor->sensor_info->axis[0].attrs.min_range;
max_range = sensor->sensor_info->axis[0].attrs.max_range;
resolution = sensor->sensor_info->axis[0].resolution;
exponent = sensor->sensor_info->axis[0].exponent;
scale = sensor->sensor_info->axis[0].scale;
/*
* To provide the raw value for the resolution to the userspace,
* need to divide the resolution exponent by the sensor scale
*/
exponent = exponent - scale;
if (exponent < 0) {
rem = do_div(resolution,
int_pow(10, abs(exponent))
);
len = sysfs_emit(buf,
"[%lld %llu.%llu %lld]\n", min_range,
resolution, rem, max_range);
} else {
resolution = resolution * int_pow(10, exponent);
len = sysfs_emit(buf, "[%lld %llu %lld]\n",
min_range, resolution, max_range);
}
}
return len;
}
static const struct iio_chan_spec_ext_info scmi_iio_ext_info[] = {
{
.name = "raw_available",
.read = scmi_iio_get_raw_available,
.shared = IIO_SHARED_BY_TYPE,
},
{},
};
static void scmi_iio_set_timestamp_channel(struct iio_chan_spec *iio_chan,
int scan_index)
{
iio_chan->type = IIO_TIMESTAMP;
iio_chan->channel = -1;
iio_chan->scan_index = scan_index;
iio_chan->scan_type.sign = 'u';
iio_chan->scan_type.realbits = 64;
iio_chan->scan_type.storagebits = 64;
}
static void scmi_iio_set_data_channel(struct iio_chan_spec *iio_chan,
enum iio_chan_type type,
enum iio_modifier mod, int scan_index)
{
iio_chan->type = type;
iio_chan->modified = 1;
iio_chan->channel2 = mod;
iio_chan->info_mask_separate =
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_RAW);
iio_chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ);
iio_chan->info_mask_shared_by_type_available =
BIT(IIO_CHAN_INFO_SAMP_FREQ);
iio_chan->scan_index = scan_index;
iio_chan->scan_type.sign = 's';
iio_chan->scan_type.realbits = 64;
iio_chan->scan_type.storagebits = 64;
iio_chan->scan_type.endianness = IIO_LE;
iio_chan->ext_info = scmi_iio_ext_info;
}
static int scmi_iio_get_chan_modifier(const char *name,
enum iio_modifier *modifier)
{
char *pch, mod;
if (!name)
return -EINVAL;
pch = strrchr(name, '_');
if (!pch)
return -EINVAL;
mod = *(pch + 1);
switch (mod) {
case 'X':
*modifier = IIO_MOD_X;
return 0;
case 'Y':
*modifier = IIO_MOD_Y;
return 0;
case 'Z':
*modifier = IIO_MOD_Z;
return 0;
default:
return -EINVAL;
}
}
static int scmi_iio_get_chan_type(u8 scmi_type, enum iio_chan_type *iio_type)
{
switch (scmi_type) {
case METERS_SEC_SQUARED:
*iio_type = IIO_ACCEL;
return 0;
case RADIANS_SEC:
*iio_type = IIO_ANGL_VEL;
return 0;
default:
return -EINVAL;
}
}
static u64 scmi_iio_convert_interval_to_ns(u32 val)
{
u64 sensor_update_interval =
SCMI_SENS_INTVL_GET_SECS(val) * NSEC_PER_SEC;
u64 sensor_interval_mult;
int mult;
mult = SCMI_SENS_INTVL_GET_EXP(val);
if (mult < 0) {
sensor_interval_mult = int_pow(10, abs(mult));
do_div(sensor_update_interval, sensor_interval_mult);
} else {
sensor_interval_mult = int_pow(10, mult);
sensor_update_interval =
sensor_update_interval * sensor_interval_mult;
}
return sensor_update_interval;
}
static int scmi_iio_set_sampling_freq_avail(struct iio_dev *iio_dev)
{
u64 cur_interval_ns, low_interval_ns, high_interval_ns, step_size_ns,
hz, uhz;
unsigned int cur_interval, low_interval, high_interval, step_size;
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
int i;
sensor->freq_avail =
devm_kzalloc(&iio_dev->dev,
sizeof(*sensor->freq_avail) *
(sensor->sensor_info->intervals.count * 2),
GFP_KERNEL);
if (!sensor->freq_avail)
return -ENOMEM;
if (sensor->sensor_info->intervals.segmented) {
low_interval = sensor->sensor_info->intervals
.desc[SCMI_SENS_INTVL_SEGMENT_LOW];
low_interval_ns = scmi_iio_convert_interval_to_ns(low_interval);
convert_ns_to_freq(low_interval_ns, &hz, &uhz);
sensor->freq_avail[0] = hz;
sensor->freq_avail[1] = uhz;
step_size = sensor->sensor_info->intervals
.desc[SCMI_SENS_INTVL_SEGMENT_STEP];
step_size_ns = scmi_iio_convert_interval_to_ns(step_size);
convert_ns_to_freq(step_size_ns, &hz, &uhz);
sensor->freq_avail[2] = hz;
sensor->freq_avail[3] = uhz;
high_interval = sensor->sensor_info->intervals
.desc[SCMI_SENS_INTVL_SEGMENT_HIGH];
high_interval_ns =
scmi_iio_convert_interval_to_ns(high_interval);
convert_ns_to_freq(high_interval_ns, &hz, &uhz);
sensor->freq_avail[4] = hz;
sensor->freq_avail[5] = uhz;
} else {
for (i = 0; i < sensor->sensor_info->intervals.count; i++) {
cur_interval = sensor->sensor_info->intervals.desc[i];
cur_interval_ns =
scmi_iio_convert_interval_to_ns(cur_interval);
convert_ns_to_freq(cur_interval_ns, &hz, &uhz);
sensor->freq_avail[i * 2] = hz;
sensor->freq_avail[i * 2 + 1] = uhz;
}
}
return 0;
}
static struct iio_dev *
scmi_alloc_iiodev(struct scmi_device *sdev,
const struct scmi_sensor_proto_ops *ops,
struct scmi_protocol_handle *ph,
const struct scmi_sensor_info *sensor_info)
{
struct iio_chan_spec *iio_channels;
struct scmi_iio_priv *sensor;
enum iio_modifier modifier;
enum iio_chan_type type;
struct iio_dev *iiodev;
struct device *dev = &sdev->dev;
const struct scmi_handle *handle = sdev->handle;
int i, ret;
iiodev = devm_iio_device_alloc(dev, sizeof(*sensor));
if (!iiodev)
return ERR_PTR(-ENOMEM);
iiodev->modes = INDIO_DIRECT_MODE;
sensor = iio_priv(iiodev);
sensor->sensor_ops = ops;
sensor->ph = ph;
sensor->sensor_info = sensor_info;
sensor->sensor_update_nb.notifier_call = scmi_iio_sensor_update_cb;
sensor->indio_dev = iiodev;
mutex_init(&sensor->lock);
/* adding one additional channel for timestamp */
iiodev->num_channels = sensor_info->num_axis + 1;
iiodev->name = sensor_info->name;
iiodev->info = &scmi_iio_info;
iio_channels =
devm_kzalloc(dev,
sizeof(*iio_channels) * (iiodev->num_channels),
GFP_KERNEL);
if (!iio_channels)
return ERR_PTR(-ENOMEM);
ret = scmi_iio_set_sampling_freq_avail(iiodev);
if (ret < 0)
return ERR_PTR(ret);
for (i = 0; i < sensor_info->num_axis; i++) {
ret = scmi_iio_get_chan_type(sensor_info->axis[i].type, &type);
if (ret < 0)
return ERR_PTR(ret);
ret = scmi_iio_get_chan_modifier(sensor_info->axis[i].name,
&modifier);
if (ret < 0)
return ERR_PTR(ret);
scmi_iio_set_data_channel(&iio_channels[i], type, modifier,
sensor_info->axis[i].id);
}
ret = handle->notify_ops->devm_event_notifier_register(sdev,
SCMI_PROTOCOL_SENSOR, SCMI_EVENT_SENSOR_UPDATE,
&sensor->sensor_info->id,
&sensor->sensor_update_nb);
if (ret) {
dev_err(&iiodev->dev,
"Error in registering sensor update notifier for sensor %s err %d",
sensor->sensor_info->name, ret);
return ERR_PTR(ret);
}
scmi_iio_set_timestamp_channel(&iio_channels[i], i);
iiodev->channels = iio_channels;
return iiodev;
}
static int scmi_iio_dev_probe(struct scmi_device *sdev)
{
const struct scmi_sensor_info *sensor_info;
struct scmi_handle *handle = sdev->handle;
const struct scmi_sensor_proto_ops *sensor_ops;
struct scmi_protocol_handle *ph;
struct device *dev = &sdev->dev;
struct iio_dev *scmi_iio_dev;
u16 nr_sensors;
int err = -ENODEV, i;
if (!handle)
return -ENODEV;
sensor_ops = handle->devm_protocol_get(sdev, SCMI_PROTOCOL_SENSOR, &ph);
if (IS_ERR(sensor_ops)) {
dev_err(dev, "SCMI device has no sensor interface\n");
return PTR_ERR(sensor_ops);
}
nr_sensors = sensor_ops->count_get(ph);
if (!nr_sensors) {
dev_dbg(dev, "0 sensors found via SCMI bus\n");
return -ENODEV;
}
for (i = 0; i < nr_sensors; i++) {
sensor_info = sensor_ops->info_get(ph, i);
if (!sensor_info) {
dev_err(dev, "SCMI sensor %d has missing info\n", i);
return -EINVAL;
}
/* This driver only supports 3-axis accel and gyro, skipping other sensors */
if (sensor_info->num_axis != SCMI_IIO_NUM_OF_AXIS)
continue;
/* This driver only supports 3-axis accel and gyro, skipping other sensors */
if (sensor_info->axis[0].type != METERS_SEC_SQUARED &&
sensor_info->axis[0].type != RADIANS_SEC)
continue;
scmi_iio_dev = scmi_alloc_iiodev(sdev, sensor_ops, ph,
sensor_info);
if (IS_ERR(scmi_iio_dev)) {
dev_err(dev,
"failed to allocate IIO device for sensor %s: %ld\n",
sensor_info->name, PTR_ERR(scmi_iio_dev));
return PTR_ERR(scmi_iio_dev);
}
err = devm_iio_kfifo_buffer_setup(&scmi_iio_dev->dev,
scmi_iio_dev,
&scmi_iio_buffer_ops);
if (err < 0) {
dev_err(dev,
"IIO buffer setup error at sensor %s: %d\n",
sensor_info->name, err);
return err;
}
err = devm_iio_device_register(dev, scmi_iio_dev);
if (err) {
dev_err(dev,
"IIO device registration failed at sensor %s: %d\n",
sensor_info->name, err);
return err;
}
}
return err;
}
static const struct scmi_device_id scmi_id_table[] = {
{ SCMI_PROTOCOL_SENSOR, "iiodev" },
{},
};
MODULE_DEVICE_TABLE(scmi, scmi_id_table);
static struct scmi_driver scmi_iiodev_driver = {
.name = "scmi-sensor-iiodev",
.probe = scmi_iio_dev_probe,
.id_table = scmi_id_table,
};
module_scmi_driver(scmi_iiodev_driver);
MODULE_AUTHOR("Jyoti Bhayana <[email protected]>");
MODULE_DESCRIPTION("SCMI IIO Driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/scmi_sensors/scmi_iio.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Measurements Specialties driver common i2c functions
*
* Copyright (c) 2015 Measurement-Specialties
*/
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/device.h>
#include <linux/delay.h>
#include "ms_sensors_i2c.h"
/* Conversion times in us */
static const u16 ms_sensors_ht_t_conversion_time[] = { 50000, 25000,
13000, 7000 };
static const u16 ms_sensors_ht_h_conversion_time[] = { 16000, 3000,
5000, 8000 };
static const u16 ms_sensors_tp_conversion_time[] = { 500, 1100, 2100,
4100, 8220, 16440 };
#define MS_SENSORS_SERIAL_READ_MSB 0xFA0F
#define MS_SENSORS_SERIAL_READ_LSB 0xFCC9
#define MS_SENSORS_CONFIG_REG_WRITE 0xE6
#define MS_SENSORS_CONFIG_REG_READ 0xE7
#define MS_SENSORS_HT_T_CONVERSION_START 0xF3
#define MS_SENSORS_HT_H_CONVERSION_START 0xF5
#define MS_SENSORS_TP_PROM_READ 0xA0
#define MS_SENSORS_TP_T_CONVERSION_START 0x50
#define MS_SENSORS_TP_P_CONVERSION_START 0x40
#define MS_SENSORS_TP_ADC_READ 0x00
#define MS_SENSORS_NO_READ_CMD 0xFF
/**
* ms_sensors_reset() - Reset function
* @cli: pointer to device client
* @cmd: reset cmd. Depends on device in use
* @delay: usleep minimal delay after reset command is issued
*
* Generic I2C reset function for Measurement Specialties devices.
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_reset(void *cli, u8 cmd, unsigned int delay)
{
int ret;
struct i2c_client *client = cli;
ret = i2c_smbus_write_byte(client, cmd);
if (ret) {
dev_err(&client->dev, "Failed to reset device\n");
return ret;
}
usleep_range(delay, delay + 1000);
return 0;
}
EXPORT_SYMBOL_NS(ms_sensors_reset, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_read_prom_word() - PROM word read function
* @cli: pointer to device client
* @cmd: PROM read cmd. Depends on device and prom id
* @word: pointer to word destination value
*
* Generic i2c prom word read function for Measurement Specialties devices.
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_read_prom_word(void *cli, int cmd, u16 *word)
{
int ret;
struct i2c_client *client = cli;
ret = i2c_smbus_read_word_swapped(client, cmd);
if (ret < 0) {
dev_err(&client->dev, "Failed to read prom word\n");
return ret;
}
*word = ret;
return 0;
}
EXPORT_SYMBOL_NS(ms_sensors_read_prom_word, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_convert_and_read() - ADC conversion & read function
* @cli: pointer to device client
* @conv: ADC conversion command. Depends on device in use
* @rd: ADC read command. Depends on device in use
* @delay: usleep minimal delay after conversion command is issued
* @adc: pointer to ADC destination value
*
* Generic ADC conversion & read function for Measurement Specialties
* devices.
* The function will issue conversion command, sleep appopriate delay, and
* issue command to read ADC.
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_convert_and_read(void *cli, u8 conv, u8 rd,
unsigned int delay, u32 *adc)
{
int ret;
__be32 buf = 0;
struct i2c_client *client = cli;
/* Trigger conversion */
ret = i2c_smbus_write_byte(client, conv);
if (ret)
goto err;
usleep_range(delay, delay + 1000);
/* Retrieve ADC value */
if (rd != MS_SENSORS_NO_READ_CMD)
ret = i2c_smbus_read_i2c_block_data(client, rd, 3, (u8 *)&buf);
else
ret = i2c_master_recv(client, (u8 *)&buf, 3);
if (ret < 0)
goto err;
dev_dbg(&client->dev, "ADC raw value : %x\n", be32_to_cpu(buf) >> 8);
*adc = be32_to_cpu(buf) >> 8;
return 0;
err:
dev_err(&client->dev, "Unable to make sensor adc conversion\n");
return ret;
}
EXPORT_SYMBOL_NS(ms_sensors_convert_and_read, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_crc_valid() - CRC check function
* @value: input and CRC compare value
*
* Cyclic Redundancy Check function used in TSYS02D, HTU21, MS8607.
* This function performs a x^8 + x^5 + x^4 + 1 polynomial CRC.
* The argument contains CRC value in LSB byte while the bytes 1 and 2
* are used for CRC computation.
*
* Return: 1 if CRC is valid, 0 otherwise.
*/
static bool ms_sensors_crc_valid(u32 value)
{
u32 polynom = 0x988000; /* x^8 + x^5 + x^4 + 1 */
u32 msb = 0x800000;
u32 mask = 0xFF8000;
u32 result = value & 0xFFFF00;
u8 crc = value & 0xFF;
while (msb != 0x80) {
if (result & msb)
result = ((result ^ polynom) & mask)
| (result & ~mask);
msb >>= 1;
mask >>= 1;
polynom >>= 1;
}
return result == crc;
}
/**
* ms_sensors_read_serial() - Serial number read function
* @client: pointer to i2c client
* @sn: pointer to 64-bits destination value
*
* Generic i2c serial number read function for Measurement Specialties devices.
* This function is used for TSYS02d, HTU21, MS8607 chipset.
* Refer to datasheet:
* http://www.meas-spec.com/downloads/HTU2X_Serial_Number_Reading.pdf
*
* Sensor raw MSB serial number format is the following :
* [ SNB3, CRC, SNB2, CRC, SNB1, CRC, SNB0, CRC]
* Sensor raw LSB serial number format is the following :
* [ X, X, SNC1, SNC0, CRC, SNA1, SNA0, CRC]
* The resulting serial number is following :
* [ SNA1, SNA0, SNB3, SNB2, SNB1, SNB0, SNC1, SNC0]
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_read_serial(struct i2c_client *client, u64 *sn)
{
u8 i;
__be64 rcv_buf = 0;
u64 rcv_val;
__be16 send_buf;
int ret;
struct i2c_msg msg[2] = {
{
.addr = client->addr,
.flags = client->flags,
.len = 2,
.buf = (__u8 *)&send_buf,
},
{
.addr = client->addr,
.flags = client->flags | I2C_M_RD,
.buf = (__u8 *)&rcv_buf,
},
};
/* Read MSB part of serial number */
send_buf = cpu_to_be16(MS_SENSORS_SERIAL_READ_MSB);
msg[1].len = 8;
ret = i2c_transfer(client->adapter, msg, 2);
if (ret < 0) {
dev_err(&client->dev, "Unable to read device serial number");
return ret;
}
rcv_val = be64_to_cpu(rcv_buf);
dev_dbg(&client->dev, "Serial MSB raw : %llx\n", rcv_val);
for (i = 0; i < 64; i += 16) {
if (!ms_sensors_crc_valid((rcv_val >> i) & 0xFFFF))
return -ENODEV;
}
*sn = (((rcv_val >> 32) & 0xFF000000) |
((rcv_val >> 24) & 0x00FF0000) |
((rcv_val >> 16) & 0x0000FF00) |
((rcv_val >> 8) & 0x000000FF)) << 16;
/* Read LSB part of serial number */
send_buf = cpu_to_be16(MS_SENSORS_SERIAL_READ_LSB);
msg[1].len = 6;
rcv_buf = 0;
ret = i2c_transfer(client->adapter, msg, 2);
if (ret < 0) {
dev_err(&client->dev, "Unable to read device serial number");
return ret;
}
rcv_val = be64_to_cpu(rcv_buf) >> 16;
dev_dbg(&client->dev, "Serial MSB raw : %llx\n", rcv_val);
for (i = 0; i < 48; i += 24) {
if (!ms_sensors_crc_valid((rcv_val >> i) & 0xFFFFFF))
return -ENODEV;
}
*sn |= (rcv_val & 0xFFFF00) << 40 | (rcv_val >> 32);
return 0;
}
EXPORT_SYMBOL_NS(ms_sensors_read_serial, IIO_MEAS_SPEC_SENSORS);
static int ms_sensors_read_config_reg(struct i2c_client *client,
u8 *config_reg)
{
int ret;
ret = i2c_smbus_write_byte(client, MS_SENSORS_CONFIG_REG_READ);
if (ret) {
dev_err(&client->dev, "Unable to read config register");
return ret;
}
ret = i2c_master_recv(client, config_reg, 1);
if (ret < 0) {
dev_err(&client->dev, "Unable to read config register");
return ret;
}
dev_dbg(&client->dev, "Config register :%x\n", *config_reg);
return 0;
}
/**
* ms_sensors_write_resolution() - Set resolution function
* @dev_data: pointer to temperature/humidity device data
* @i: resolution index to set
*
* This function will program the appropriate resolution based on the index
* provided when user space will set samp_freq channel.
* This function is used for TSYS02D, HTU21 and MS8607 chipsets.
*
* Return: 0 on success, negative errno otherwise.
*/
ssize_t ms_sensors_write_resolution(struct ms_ht_dev *dev_data,
u8 i)
{
u8 config_reg;
int ret;
ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
if (ret)
return ret;
config_reg &= 0x7E;
config_reg |= ((i & 1) << 7) + ((i & 2) >> 1);
return i2c_smbus_write_byte_data(dev_data->client,
MS_SENSORS_CONFIG_REG_WRITE,
config_reg);
}
EXPORT_SYMBOL_NS(ms_sensors_write_resolution, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_show_battery_low() - Show device battery low indicator
* @dev_data: pointer to temperature/humidity device data
* @buf: pointer to char buffer to write result
*
* This function will read battery indicator value in the device and
* return 1 if the device voltage is below 2.25V.
* This function is used for TSYS02D, HTU21 and MS8607 chipsets.
*
* Return: length of sprintf on success, negative errno otherwise.
*/
ssize_t ms_sensors_show_battery_low(struct ms_ht_dev *dev_data,
char *buf)
{
int ret;
u8 config_reg;
mutex_lock(&dev_data->lock);
ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
mutex_unlock(&dev_data->lock);
if (ret)
return ret;
return sysfs_emit(buf, "%d\n", (config_reg & 0x40) >> 6);
}
EXPORT_SYMBOL_NS(ms_sensors_show_battery_low, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_show_heater() - Show device heater
* @dev_data: pointer to temperature/humidity device data
* @buf: pointer to char buffer to write result
*
* This function will read heater enable value in the device and
* return 1 if the heater is enabled.
* This function is used for HTU21 and MS8607 chipsets.
*
* Return: length of sprintf on success, negative errno otherwise.
*/
ssize_t ms_sensors_show_heater(struct ms_ht_dev *dev_data,
char *buf)
{
u8 config_reg;
int ret;
mutex_lock(&dev_data->lock);
ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
mutex_unlock(&dev_data->lock);
if (ret)
return ret;
return sysfs_emit(buf, "%d\n", (config_reg & 0x4) >> 2);
}
EXPORT_SYMBOL_NS(ms_sensors_show_heater, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_write_heater() - Write device heater
* @dev_data: pointer to temperature/humidity device data
* @buf: pointer to char buffer from user space
* @len: length of buf
*
* This function will write 1 or 0 value in the device
* to enable or disable heater.
* This function is used for HTU21 and MS8607 chipsets.
*
* Return: length of buffer, negative errno otherwise.
*/
ssize_t ms_sensors_write_heater(struct ms_ht_dev *dev_data,
const char *buf, size_t len)
{
u8 val, config_reg;
int ret;
ret = kstrtou8(buf, 10, &val);
if (ret)
return ret;
if (val > 1)
return -EINVAL;
mutex_lock(&dev_data->lock);
ret = ms_sensors_read_config_reg(dev_data->client, &config_reg);
if (ret) {
mutex_unlock(&dev_data->lock);
return ret;
}
config_reg &= 0xFB;
config_reg |= val << 2;
ret = i2c_smbus_write_byte_data(dev_data->client,
MS_SENSORS_CONFIG_REG_WRITE,
config_reg);
mutex_unlock(&dev_data->lock);
if (ret) {
dev_err(&dev_data->client->dev, "Unable to write config register\n");
return ret;
}
return len;
}
EXPORT_SYMBOL_NS(ms_sensors_write_heater, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_ht_read_temperature() - Read temperature
* @dev_data: pointer to temperature/humidity device data
* @temperature:pointer to temperature destination value
*
* This function will get temperature ADC value from the device,
* check the CRC and compute the temperature value.
* This function is used for TSYS02D, HTU21 and MS8607 chipsets.
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_ht_read_temperature(struct ms_ht_dev *dev_data,
s32 *temperature)
{
int ret;
u32 adc;
u16 delay;
mutex_lock(&dev_data->lock);
delay = ms_sensors_ht_t_conversion_time[dev_data->res_index];
ret = ms_sensors_convert_and_read(dev_data->client,
MS_SENSORS_HT_T_CONVERSION_START,
MS_SENSORS_NO_READ_CMD,
delay, &adc);
mutex_unlock(&dev_data->lock);
if (ret)
return ret;
if (!ms_sensors_crc_valid(adc)) {
dev_err(&dev_data->client->dev,
"Temperature read crc check error\n");
return -ENODEV;
}
/* Temperature algorithm */
*temperature = (((s64)(adc >> 8) * 175720) >> 16) - 46850;
return 0;
}
EXPORT_SYMBOL_NS(ms_sensors_ht_read_temperature, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_ht_read_humidity() - Read humidity
* @dev_data: pointer to temperature/humidity device data
* @humidity: pointer to humidity destination value
*
* This function will get humidity ADC value from the device,
* check the CRC and compute the temperature value.
* This function is used for HTU21 and MS8607 chipsets.
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_ht_read_humidity(struct ms_ht_dev *dev_data,
u32 *humidity)
{
int ret;
u32 adc;
u16 delay;
mutex_lock(&dev_data->lock);
delay = ms_sensors_ht_h_conversion_time[dev_data->res_index];
ret = ms_sensors_convert_and_read(dev_data->client,
MS_SENSORS_HT_H_CONVERSION_START,
MS_SENSORS_NO_READ_CMD,
delay, &adc);
mutex_unlock(&dev_data->lock);
if (ret)
return ret;
if (!ms_sensors_crc_valid(adc)) {
dev_err(&dev_data->client->dev,
"Humidity read crc check error\n");
return -ENODEV;
}
/* Humidity algorithm */
*humidity = (((s32)(adc >> 8) * 12500) >> 16) * 10 - 6000;
if (*humidity >= 100000)
*humidity = 100000;
return 0;
}
EXPORT_SYMBOL_NS(ms_sensors_ht_read_humidity, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_tp_crc4() - Calculate PROM CRC for
* Temperature and pressure devices.
* This function is only used when reading PROM coefficients
*
* @prom: pointer to PROM coefficients array
*
* Return: CRC.
*/
static u8 ms_sensors_tp_crc4(u16 *prom)
{
unsigned int cnt, n_bit;
u16 n_rem = 0x0000;
for (cnt = 0; cnt < MS_SENSORS_TP_PROM_WORDS_NB * 2; cnt++) {
if (cnt % 2 == 1)
n_rem ^= prom[cnt >> 1] & 0x00FF;
else
n_rem ^= prom[cnt >> 1] >> 8;
for (n_bit = 8; n_bit > 0; n_bit--) {
if (n_rem & 0x8000)
n_rem = (n_rem << 1) ^ 0x3000;
else
n_rem <<= 1;
}
}
return n_rem >> 12;
}
/**
* ms_sensors_tp_crc_valid_112() - CRC check function for
* Temperature and pressure devices for 112bit PROM.
* This function is only used when reading PROM coefficients
*
* @prom: pointer to PROM coefficients array
*
* Return: True if CRC is ok.
*/
static bool ms_sensors_tp_crc_valid_112(u16 *prom)
{
u16 w0 = prom[0], crc_read = (w0 & 0xF000) >> 12;
u8 crc;
prom[0] &= 0x0FFF; /* Clear the CRC computation part */
prom[MS_SENSORS_TP_PROM_WORDS_NB - 1] = 0;
crc = ms_sensors_tp_crc4(prom);
prom[0] = w0;
return crc == crc_read;
}
/**
* ms_sensors_tp_crc_valid_128() - CRC check function for
* Temperature and pressure devices for 128bit PROM.
* This function is only used when reading PROM coefficients
*
* @prom: pointer to PROM coefficients array
*
* Return: True if CRC is ok.
*/
static bool ms_sensors_tp_crc_valid_128(u16 *prom)
{
u16 w7 = prom[7], crc_read = w7 & 0x000F;
u8 crc;
prom[7] &= 0xFF00; /* Clear the CRC and LSB part */
crc = ms_sensors_tp_crc4(prom);
prom[7] = w7;
return crc == crc_read;
}
/**
* ms_sensors_tp_read_prom() - prom coeff read function
* @dev_data: pointer to temperature/pressure device data
*
* This function will read prom coefficients and check CRC.
* This function is used for MS5637 and MS8607 chipsets.
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_tp_read_prom(struct ms_tp_dev *dev_data)
{
int i, ret;
bool valid;
for (i = 0; i < dev_data->hw->prom_len; i++) {
ret = ms_sensors_read_prom_word(
dev_data->client,
MS_SENSORS_TP_PROM_READ + (i << 1),
&dev_data->prom[i]);
if (ret)
return ret;
}
if (dev_data->hw->prom_len == 8)
valid = ms_sensors_tp_crc_valid_128(dev_data->prom);
else
valid = ms_sensors_tp_crc_valid_112(dev_data->prom);
if (!valid) {
dev_err(&dev_data->client->dev,
"Calibration coefficients crc check error\n");
return -ENODEV;
}
return 0;
}
EXPORT_SYMBOL_NS(ms_sensors_tp_read_prom, IIO_MEAS_SPEC_SENSORS);
/**
* ms_sensors_read_temp_and_pressure() - read temp and pressure
* @dev_data: pointer to temperature/pressure device data
* @temperature:pointer to temperature destination value
* @pressure: pointer to pressure destination value
*
* This function will read ADC and compute pressure and temperature value.
* This function is used for MS5637 and MS8607 chipsets.
*
* Return: 0 on success, negative errno otherwise.
*/
int ms_sensors_read_temp_and_pressure(struct ms_tp_dev *dev_data,
int *temperature,
unsigned int *pressure)
{
int ret;
u32 t_adc, p_adc;
s32 dt, temp;
s64 off, sens, t2, off2, sens2;
u16 *prom = dev_data->prom, delay;
mutex_lock(&dev_data->lock);
delay = ms_sensors_tp_conversion_time[dev_data->res_index];
ret = ms_sensors_convert_and_read(
dev_data->client,
MS_SENSORS_TP_T_CONVERSION_START +
dev_data->res_index * 2,
MS_SENSORS_TP_ADC_READ,
delay, &t_adc);
if (ret) {
mutex_unlock(&dev_data->lock);
return ret;
}
ret = ms_sensors_convert_and_read(
dev_data->client,
MS_SENSORS_TP_P_CONVERSION_START +
dev_data->res_index * 2,
MS_SENSORS_TP_ADC_READ,
delay, &p_adc);
mutex_unlock(&dev_data->lock);
if (ret)
return ret;
dt = (s32)t_adc - (prom[5] << 8);
/* Actual temperature = 2000 + dT * TEMPSENS */
temp = 2000 + (((s64)dt * prom[6]) >> 23);
/* Second order temperature compensation */
if (temp < 2000) {
s64 tmp = (s64)temp - 2000;
t2 = (3 * ((s64)dt * (s64)dt)) >> 33;
off2 = (61 * tmp * tmp) >> 4;
sens2 = (29 * tmp * tmp) >> 4;
if (temp < -1500) {
s64 tmp = (s64)temp + 1500;
off2 += 17 * tmp * tmp;
sens2 += 9 * tmp * tmp;
}
} else {
t2 = (5 * ((s64)dt * (s64)dt)) >> 38;
off2 = 0;
sens2 = 0;
}
/* OFF = OFF_T1 + TCO * dT */
off = (((s64)prom[2]) << 17) + ((((s64)prom[4]) * (s64)dt) >> 6);
off -= off2;
/* Sensitivity at actual temperature = SENS_T1 + TCS * dT */
sens = (((s64)prom[1]) << 16) + (((s64)prom[3] * dt) >> 7);
sens -= sens2;
/* Temperature compensated pressure = D1 * SENS - OFF */
*temperature = (temp - t2) * 10;
*pressure = (u32)(((((s64)p_adc * sens) >> 21) - off) >> 15);
return 0;
}
EXPORT_SYMBOL_NS(ms_sensors_read_temp_and_pressure, IIO_MEAS_SPEC_SENSORS);
MODULE_DESCRIPTION("Measurement-Specialties common i2c driver");
MODULE_AUTHOR("William Markezana <[email protected]>");
MODULE_AUTHOR("Ludovic Tancerel <[email protected]>");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/ms_sensors/ms_sensors_i2c.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2014, Samsung Electronics Co. Ltd. All Rights Reserved.
*/
#include <linux/iio/iio.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/mfd/core.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/property.h>
#include "ssp.h"
#define SSP_WDT_TIME 10000
#define SSP_LIMIT_RESET_CNT 20
#define SSP_LIMIT_TIMEOUT_CNT 3
/* It is possible that it is max clk rate for version 1.0 of bootcode */
#define SSP_BOOT_SPI_HZ 400000
/*
* These fields can look enigmatic but this structure is used mainly to flat
* some values and depends on command type.
*/
struct ssp_instruction {
__le32 a;
__le32 b;
u8 c;
} __attribute__((__packed__));
static const u8 ssp_magnitude_table[] = {110, 85, 171, 71, 203, 195, 0, 67,
208, 56, 175, 244, 206, 213, 0, 92, 250, 0, 55, 48, 189, 252, 171,
243, 13, 45, 250};
static const struct ssp_sensorhub_info ssp_rinato_info = {
.fw_name = "ssp_B2.fw",
.fw_crashed_name = "ssp_crashed.fw",
.fw_rev = 14052300,
.mag_table = ssp_magnitude_table,
.mag_length = ARRAY_SIZE(ssp_magnitude_table),
};
static const struct ssp_sensorhub_info ssp_thermostat_info = {
.fw_name = "thermostat_B2.fw",
.fw_crashed_name = "ssp_crashed.fw",
.fw_rev = 14080600,
.mag_table = ssp_magnitude_table,
.mag_length = ARRAY_SIZE(ssp_magnitude_table),
};
static const struct mfd_cell sensorhub_sensor_devs[] = {
{
.name = "ssp-accelerometer",
},
{
.name = "ssp-gyroscope",
},
};
static void ssp_toggle_mcu_reset_gpio(struct ssp_data *data)
{
gpiod_set_value(data->mcu_reset_gpiod, 0);
usleep_range(1000, 1200);
gpiod_set_value(data->mcu_reset_gpiod, 1);
msleep(50);
}
static void ssp_sync_available_sensors(struct ssp_data *data)
{
int i, ret;
for (i = 0; i < SSP_SENSOR_MAX; ++i) {
if (data->available_sensors & BIT(i)) {
ret = ssp_enable_sensor(data, i, data->delay_buf[i]);
if (ret < 0) {
dev_err(&data->spi->dev,
"Sync sensor nr: %d fail\n", i);
continue;
}
}
}
ret = ssp_command(data, SSP_MSG2SSP_AP_MCU_SET_DUMPMODE,
data->mcu_dump_mode);
if (ret < 0)
dev_err(&data->spi->dev,
"SSP_MSG2SSP_AP_MCU_SET_DUMPMODE failed\n");
}
static void ssp_enable_mcu(struct ssp_data *data, bool enable)
{
dev_info(&data->spi->dev, "current shutdown = %d, old = %d\n", enable,
data->shut_down);
if (enable && data->shut_down) {
data->shut_down = false;
enable_irq(data->spi->irq);
enable_irq_wake(data->spi->irq);
} else if (!enable && !data->shut_down) {
data->shut_down = true;
disable_irq(data->spi->irq);
disable_irq_wake(data->spi->irq);
} else {
dev_warn(&data->spi->dev, "current shutdown = %d, old = %d\n",
enable, data->shut_down);
}
}
/*
* This function is the first one which communicates with the mcu so it is
* possible that the first attempt will fail
*/
static int ssp_check_fwbl(struct ssp_data *data)
{
int retries = 0;
while (retries++ < 5) {
data->cur_firm_rev = ssp_get_firmware_rev(data);
if (data->cur_firm_rev == SSP_INVALID_REVISION ||
data->cur_firm_rev == SSP_INVALID_REVISION2) {
dev_warn(&data->spi->dev,
"Invalid revision, trying %d time\n", retries);
} else {
break;
}
}
if (data->cur_firm_rev == SSP_INVALID_REVISION ||
data->cur_firm_rev == SSP_INVALID_REVISION2) {
dev_err(&data->spi->dev, "SSP_INVALID_REVISION\n");
return SSP_FW_DL_STATE_NEED_TO_SCHEDULE;
}
dev_info(&data->spi->dev,
"MCU Firm Rev : Old = %8u, New = %8u\n",
data->cur_firm_rev,
data->sensorhub_info->fw_rev);
if (data->cur_firm_rev != data->sensorhub_info->fw_rev)
return SSP_FW_DL_STATE_NEED_TO_SCHEDULE;
return SSP_FW_DL_STATE_NONE;
}
static void ssp_reset_mcu(struct ssp_data *data)
{
ssp_enable_mcu(data, false);
ssp_clean_pending_list(data);
ssp_toggle_mcu_reset_gpio(data);
ssp_enable_mcu(data, true);
}
static void ssp_wdt_work_func(struct work_struct *work)
{
struct ssp_data *data = container_of(work, struct ssp_data, work_wdt);
dev_err(&data->spi->dev, "%s - Sensor state: 0x%x, RC: %u, CC: %u\n",
__func__, data->available_sensors, data->reset_cnt,
data->com_fail_cnt);
ssp_reset_mcu(data);
data->com_fail_cnt = 0;
data->timeout_cnt = 0;
}
static void ssp_wdt_timer_func(struct timer_list *t)
{
struct ssp_data *data = from_timer(data, t, wdt_timer);
switch (data->fw_dl_state) {
case SSP_FW_DL_STATE_FAIL:
case SSP_FW_DL_STATE_DOWNLOADING:
case SSP_FW_DL_STATE_SYNC:
goto _mod;
}
if (data->timeout_cnt > SSP_LIMIT_TIMEOUT_CNT ||
data->com_fail_cnt > SSP_LIMIT_RESET_CNT)
queue_work(system_power_efficient_wq, &data->work_wdt);
_mod:
mod_timer(&data->wdt_timer, jiffies + msecs_to_jiffies(SSP_WDT_TIME));
}
static void ssp_enable_wdt_timer(struct ssp_data *data)
{
mod_timer(&data->wdt_timer, jiffies + msecs_to_jiffies(SSP_WDT_TIME));
}
static void ssp_disable_wdt_timer(struct ssp_data *data)
{
del_timer_sync(&data->wdt_timer);
cancel_work_sync(&data->work_wdt);
}
/**
* ssp_get_sensor_delay() - gets sensor data acquisition period
* @data: sensorhub structure
* @type: SSP sensor type
*
* Returns acquisition period in ms
*/
u32 ssp_get_sensor_delay(struct ssp_data *data, enum ssp_sensor_type type)
{
return data->delay_buf[type];
}
EXPORT_SYMBOL_NS(ssp_get_sensor_delay, IIO_SSP_SENSORS);
/**
* ssp_enable_sensor() - enables data acquisition for sensor
* @data: sensorhub structure
* @type: SSP sensor type
* @delay: delay in ms
*
* Returns 0 or negative value in case of error
*/
int ssp_enable_sensor(struct ssp_data *data, enum ssp_sensor_type type,
u32 delay)
{
int ret;
struct ssp_instruction to_send;
to_send.a = cpu_to_le32(delay);
to_send.b = cpu_to_le32(data->batch_latency_buf[type]);
to_send.c = data->batch_opt_buf[type];
switch (data->check_status[type]) {
case SSP_INITIALIZATION_STATE:
/* do calibration step, now just enable */
case SSP_ADD_SENSOR_STATE:
ret = ssp_send_instruction(data,
SSP_MSG2SSP_INST_BYPASS_SENSOR_ADD,
type,
(u8 *)&to_send, sizeof(to_send));
if (ret < 0) {
dev_err(&data->spi->dev, "Enabling sensor failed\n");
data->check_status[type] = SSP_NO_SENSOR_STATE;
goto derror;
}
data->sensor_enable |= BIT(type);
data->check_status[type] = SSP_RUNNING_SENSOR_STATE;
break;
case SSP_RUNNING_SENSOR_STATE:
ret = ssp_send_instruction(data,
SSP_MSG2SSP_INST_CHANGE_DELAY, type,
(u8 *)&to_send, sizeof(to_send));
if (ret < 0) {
dev_err(&data->spi->dev,
"Changing sensor delay failed\n");
goto derror;
}
break;
default:
data->check_status[type] = SSP_ADD_SENSOR_STATE;
break;
}
data->delay_buf[type] = delay;
if (atomic_inc_return(&data->enable_refcount) == 1)
ssp_enable_wdt_timer(data);
return 0;
derror:
return ret;
}
EXPORT_SYMBOL_NS(ssp_enable_sensor, IIO_SSP_SENSORS);
/**
* ssp_change_delay() - changes data acquisition for sensor
* @data: sensorhub structure
* @type: SSP sensor type
* @delay: delay in ms
*
* Returns 0 or negative value in case of error
*/
int ssp_change_delay(struct ssp_data *data, enum ssp_sensor_type type,
u32 delay)
{
int ret;
struct ssp_instruction to_send;
to_send.a = cpu_to_le32(delay);
to_send.b = cpu_to_le32(data->batch_latency_buf[type]);
to_send.c = data->batch_opt_buf[type];
ret = ssp_send_instruction(data, SSP_MSG2SSP_INST_CHANGE_DELAY, type,
(u8 *)&to_send, sizeof(to_send));
if (ret < 0) {
dev_err(&data->spi->dev, "Changing sensor delay failed\n");
return ret;
}
data->delay_buf[type] = delay;
return 0;
}
EXPORT_SYMBOL_NS(ssp_change_delay, IIO_SSP_SENSORS);
/**
* ssp_disable_sensor() - disables sensor
*
* @data: sensorhub structure
* @type: SSP sensor type
*
* Returns 0 or negative value in case of error
*/
int ssp_disable_sensor(struct ssp_data *data, enum ssp_sensor_type type)
{
int ret;
__le32 command;
if (data->sensor_enable & BIT(type)) {
command = cpu_to_le32(data->delay_buf[type]);
ret = ssp_send_instruction(data,
SSP_MSG2SSP_INST_BYPASS_SENSOR_RM,
type, (u8 *)&command,
sizeof(command));
if (ret < 0) {
dev_err(&data->spi->dev, "Remove sensor fail\n");
return ret;
}
data->sensor_enable &= ~BIT(type);
}
data->check_status[type] = SSP_ADD_SENSOR_STATE;
if (atomic_dec_and_test(&data->enable_refcount))
ssp_disable_wdt_timer(data);
return 0;
}
EXPORT_SYMBOL_NS(ssp_disable_sensor, IIO_SSP_SENSORS);
static irqreturn_t ssp_irq_thread_fn(int irq, void *dev_id)
{
struct ssp_data *data = dev_id;
/*
* This wrapper is done to preserve error path for ssp_irq_msg, also
* it is defined in different file.
*/
ssp_irq_msg(data);
return IRQ_HANDLED;
}
static int ssp_initialize_mcu(struct ssp_data *data)
{
int ret;
ssp_clean_pending_list(data);
ret = ssp_get_chipid(data);
if (ret != SSP_DEVICE_ID) {
dev_err(&data->spi->dev, "%s - MCU %s ret = %d\n", __func__,
ret < 0 ? "is not working" : "identification failed",
ret);
return ret < 0 ? ret : -ENODEV;
}
dev_info(&data->spi->dev, "MCU device ID = %d\n", ret);
/*
* needs clarification, for now do not want to export all transfer
* methods to sensors' drivers
*/
ret = ssp_set_magnetic_matrix(data);
if (ret < 0) {
dev_err(&data->spi->dev,
"%s - ssp_set_magnetic_matrix failed\n", __func__);
return ret;
}
data->available_sensors = ssp_get_sensor_scanning_info(data);
if (data->available_sensors == 0) {
dev_err(&data->spi->dev,
"%s - ssp_get_sensor_scanning_info failed\n", __func__);
return -EIO;
}
data->cur_firm_rev = ssp_get_firmware_rev(data);
dev_info(&data->spi->dev, "MCU Firm Rev : New = %8u\n",
data->cur_firm_rev);
return ssp_command(data, SSP_MSG2SSP_AP_MCU_DUMP_CHECK, 0);
}
/*
* sensorhub can request its reinitialization as some brutal and rare error
* handling. It can be requested from the MCU.
*/
static void ssp_refresh_task(struct work_struct *work)
{
struct ssp_data *data = container_of((struct delayed_work *)work,
struct ssp_data, work_refresh);
dev_info(&data->spi->dev, "refreshing\n");
data->reset_cnt++;
if (ssp_initialize_mcu(data) >= 0) {
ssp_sync_available_sensors(data);
if (data->last_ap_state != 0)
ssp_command(data, data->last_ap_state, 0);
if (data->last_resume_state != 0)
ssp_command(data, data->last_resume_state, 0);
data->timeout_cnt = 0;
data->com_fail_cnt = 0;
}
}
int ssp_queue_ssp_refresh_task(struct ssp_data *data, unsigned int delay)
{
cancel_delayed_work_sync(&data->work_refresh);
return queue_delayed_work(system_power_efficient_wq,
&data->work_refresh,
msecs_to_jiffies(delay));
}
static const struct of_device_id ssp_of_match[] = {
{
.compatible = "samsung,sensorhub-rinato",
.data = &ssp_rinato_info,
}, {
.compatible = "samsung,sensorhub-thermostat",
.data = &ssp_thermostat_info,
},
{},
};
MODULE_DEVICE_TABLE(of, ssp_of_match);
static struct ssp_data *ssp_parse_dt(struct device *dev)
{
struct ssp_data *data;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return NULL;
data->mcu_ap_gpiod = devm_gpiod_get(dev, "mcu-ap", GPIOD_IN);
if (IS_ERR(data->mcu_ap_gpiod))
return NULL;
data->ap_mcu_gpiod = devm_gpiod_get(dev, "ap-mcu", GPIOD_OUT_HIGH);
if (IS_ERR(data->ap_mcu_gpiod))
return NULL;
data->mcu_reset_gpiod = devm_gpiod_get(dev, "mcu-reset",
GPIOD_OUT_HIGH);
if (IS_ERR(data->mcu_reset_gpiod))
return NULL;
data->sensorhub_info = device_get_match_data(dev);
dev_set_drvdata(dev, data);
return data;
}
/**
* ssp_register_consumer() - registers iio consumer in ssp framework
*
* @indio_dev: consumer iio device
* @type: ssp sensor type
*/
void ssp_register_consumer(struct iio_dev *indio_dev, enum ssp_sensor_type type)
{
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
data->sensor_devs[type] = indio_dev;
}
EXPORT_SYMBOL_NS(ssp_register_consumer, IIO_SSP_SENSORS);
static int ssp_probe(struct spi_device *spi)
{
int ret, i;
struct ssp_data *data;
data = ssp_parse_dt(&spi->dev);
if (!data) {
dev_err(&spi->dev, "Failed to find platform data\n");
return -ENODEV;
}
ret = mfd_add_devices(&spi->dev, PLATFORM_DEVID_NONE,
sensorhub_sensor_devs,
ARRAY_SIZE(sensorhub_sensor_devs), NULL, 0, NULL);
if (ret < 0) {
dev_err(&spi->dev, "mfd add devices fail\n");
return ret;
}
spi->mode = SPI_MODE_1;
ret = spi_setup(spi);
if (ret < 0) {
dev_err(&spi->dev, "Failed to setup spi\n");
return ret;
}
data->fw_dl_state = SSP_FW_DL_STATE_NONE;
data->spi = spi;
spi_set_drvdata(spi, data);
mutex_init(&data->comm_lock);
for (i = 0; i < SSP_SENSOR_MAX; ++i) {
data->delay_buf[i] = SSP_DEFAULT_POLLING_DELAY;
data->batch_latency_buf[i] = 0;
data->batch_opt_buf[i] = 0;
data->check_status[i] = SSP_INITIALIZATION_STATE;
}
data->delay_buf[SSP_BIO_HRM_LIB] = 100;
data->time_syncing = true;
mutex_init(&data->pending_lock);
INIT_LIST_HEAD(&data->pending_list);
atomic_set(&data->enable_refcount, 0);
INIT_WORK(&data->work_wdt, ssp_wdt_work_func);
INIT_DELAYED_WORK(&data->work_refresh, ssp_refresh_task);
timer_setup(&data->wdt_timer, ssp_wdt_timer_func, 0);
ret = request_threaded_irq(data->spi->irq, NULL,
ssp_irq_thread_fn,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
"SSP_Int", data);
if (ret < 0) {
dev_err(&spi->dev, "Irq request fail\n");
goto err_setup_irq;
}
/* Let's start with enabled one so irq balance could be ok */
data->shut_down = false;
/* just to avoid unbalanced irq set wake up */
enable_irq_wake(data->spi->irq);
data->fw_dl_state = ssp_check_fwbl(data);
if (data->fw_dl_state == SSP_FW_DL_STATE_NONE) {
ret = ssp_initialize_mcu(data);
if (ret < 0) {
dev_err(&spi->dev, "Initialize_mcu failed\n");
goto err_read_reg;
}
} else {
dev_err(&spi->dev, "Firmware version not supported\n");
ret = -EPERM;
goto err_read_reg;
}
return 0;
err_read_reg:
free_irq(data->spi->irq, data);
err_setup_irq:
mutex_destroy(&data->pending_lock);
mutex_destroy(&data->comm_lock);
dev_err(&spi->dev, "Probe failed!\n");
return ret;
}
static void ssp_remove(struct spi_device *spi)
{
struct ssp_data *data = spi_get_drvdata(spi);
if (ssp_command(data, SSP_MSG2SSP_AP_STATUS_SHUTDOWN, 0) < 0)
dev_err(&data->spi->dev,
"SSP_MSG2SSP_AP_STATUS_SHUTDOWN failed\n");
ssp_enable_mcu(data, false);
ssp_disable_wdt_timer(data);
ssp_clean_pending_list(data);
free_irq(data->spi->irq, data);
del_timer_sync(&data->wdt_timer);
cancel_work_sync(&data->work_wdt);
mutex_destroy(&data->comm_lock);
mutex_destroy(&data->pending_lock);
mfd_remove_devices(&spi->dev);
}
static int ssp_suspend(struct device *dev)
{
int ret;
struct ssp_data *data = spi_get_drvdata(to_spi_device(dev));
data->last_resume_state = SSP_MSG2SSP_AP_STATUS_SUSPEND;
if (atomic_read(&data->enable_refcount) > 0)
ssp_disable_wdt_timer(data);
ret = ssp_command(data, SSP_MSG2SSP_AP_STATUS_SUSPEND, 0);
if (ret < 0) {
dev_err(&data->spi->dev,
"%s SSP_MSG2SSP_AP_STATUS_SUSPEND failed\n", __func__);
ssp_enable_wdt_timer(data);
return ret;
}
data->time_syncing = false;
disable_irq(data->spi->irq);
return 0;
}
static int ssp_resume(struct device *dev)
{
int ret;
struct ssp_data *data = spi_get_drvdata(to_spi_device(dev));
enable_irq(data->spi->irq);
if (atomic_read(&data->enable_refcount) > 0)
ssp_enable_wdt_timer(data);
ret = ssp_command(data, SSP_MSG2SSP_AP_STATUS_RESUME, 0);
if (ret < 0) {
dev_err(&data->spi->dev,
"%s SSP_MSG2SSP_AP_STATUS_RESUME failed\n", __func__);
ssp_disable_wdt_timer(data);
return ret;
}
/* timesyncing is set by MCU */
data->last_resume_state = SSP_MSG2SSP_AP_STATUS_RESUME;
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(ssp_pm_ops, ssp_suspend, ssp_resume);
static struct spi_driver ssp_driver = {
.probe = ssp_probe,
.remove = ssp_remove,
.driver = {
.pm = pm_sleep_ptr(&ssp_pm_ops),
.of_match_table = ssp_of_match,
.name = "sensorhub"
},
};
module_spi_driver(ssp_driver);
MODULE_DESCRIPTION("ssp sensorhub driver");
MODULE_AUTHOR("Samsung Electronics");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/common/ssp_sensors/ssp_dev.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2014, Samsung Electronics Co. Ltd. All Rights Reserved.
*/
#include <linux/iio/common/ssp_sensors.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/module.h>
#include <linux/slab.h>
#include "ssp_iio_sensor.h"
/**
* ssp_common_buffer_postenable() - generic postenable callback for ssp buffer
*
* @indio_dev: iio device
*
* Returns 0 or negative value in case of error
*/
int ssp_common_buffer_postenable(struct iio_dev *indio_dev)
{
struct ssp_sensor_data *spd = iio_priv(indio_dev);
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
/* the allocation is made in post because scan size is known in this
* moment
* */
spd->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL | GFP_DMA);
if (!spd->buffer)
return -ENOMEM;
return ssp_enable_sensor(data, spd->type,
ssp_get_sensor_delay(data, spd->type));
}
EXPORT_SYMBOL_NS(ssp_common_buffer_postenable, IIO_SSP_SENSORS);
/**
* ssp_common_buffer_postdisable() - generic postdisable callback for ssp buffer
*
* @indio_dev: iio device
*
* Returns 0 or negative value in case of error
*/
int ssp_common_buffer_postdisable(struct iio_dev *indio_dev)
{
int ret;
struct ssp_sensor_data *spd = iio_priv(indio_dev);
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
ret = ssp_disable_sensor(data, spd->type);
if (ret < 0)
return ret;
kfree(spd->buffer);
return ret;
}
EXPORT_SYMBOL_NS(ssp_common_buffer_postdisable, IIO_SSP_SENSORS);
/**
* ssp_common_process_data() - Common process data callback for ssp sensors
*
* @indio_dev: iio device
* @buf: source buffer
* @len: sensor data length
* @timestamp: system timestamp
*
* Returns 0 or negative value in case of error
*/
int ssp_common_process_data(struct iio_dev *indio_dev, void *buf,
unsigned int len, int64_t timestamp)
{
__le32 time;
int64_t calculated_time = 0;
struct ssp_sensor_data *spd = iio_priv(indio_dev);
if (indio_dev->scan_bytes == 0)
return 0;
/*
* it always sends full set of samples, remember about available masks
*/
memcpy(spd->buffer, buf, len);
if (indio_dev->scan_timestamp) {
memcpy(&time, &((char *)buf)[len], SSP_TIME_SIZE);
calculated_time =
timestamp + (int64_t)le32_to_cpu(time) * 1000000;
}
return iio_push_to_buffers_with_timestamp(indio_dev, spd->buffer,
calculated_time);
}
EXPORT_SYMBOL_NS(ssp_common_process_data, IIO_SSP_SENSORS);
MODULE_AUTHOR("Karol Wrona <[email protected]>");
MODULE_DESCRIPTION("Samsung sensorhub commons");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_SSP_SENSORS);
| linux-master | drivers/iio/common/ssp_sensors/ssp_iio.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2014, Samsung Electronics Co. Ltd. All Rights Reserved.
*/
#include "ssp.h"
#define SSP_DEV (&data->spi->dev)
#define SSP_GET_MESSAGE_TYPE(data) (data & (3 << SSP_RW))
/*
* SSP -> AP Instruction
* They tell what packet type can be expected. In the future there will
* be less of them. BYPASS means common sensor packets with accel, gyro,
* hrm etc. data. LIBRARY and META are mock-up's for now.
*/
#define SSP_MSG2AP_INST_BYPASS_DATA 0x37
#define SSP_MSG2AP_INST_LIBRARY_DATA 0x01
#define SSP_MSG2AP_INST_DEBUG_DATA 0x03
#define SSP_MSG2AP_INST_BIG_DATA 0x04
#define SSP_MSG2AP_INST_META_DATA 0x05
#define SSP_MSG2AP_INST_TIME_SYNC 0x06
#define SSP_MSG2AP_INST_RESET 0x07
#define SSP_UNIMPLEMENTED -1
struct ssp_msg_header {
u8 cmd;
__le16 length;
__le16 options;
__le32 data;
} __attribute__((__packed__));
struct ssp_msg {
u16 length;
u16 options;
struct list_head list;
struct completion *done;
struct ssp_msg_header *h;
char *buffer;
};
static const int ssp_offset_map[SSP_SENSOR_MAX] = {
[SSP_ACCELEROMETER_SENSOR] = SSP_ACCELEROMETER_SIZE +
SSP_TIME_SIZE,
[SSP_GYROSCOPE_SENSOR] = SSP_GYROSCOPE_SIZE +
SSP_TIME_SIZE,
[SSP_GEOMAGNETIC_UNCALIB_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_GEOMAGNETIC_RAW] = SSP_UNIMPLEMENTED,
[SSP_GEOMAGNETIC_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_PRESSURE_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_GESTURE_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_PROXIMITY_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_TEMPERATURE_HUMIDITY_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_LIGHT_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_PROXIMITY_RAW] = SSP_UNIMPLEMENTED,
[SSP_ORIENTATION_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_STEP_DETECTOR] = SSP_UNIMPLEMENTED,
[SSP_SIG_MOTION_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_GYRO_UNCALIB_SENSOR] = SSP_UNIMPLEMENTED,
[SSP_GAME_ROTATION_VECTOR] = SSP_UNIMPLEMENTED,
[SSP_ROTATION_VECTOR] = SSP_UNIMPLEMENTED,
[SSP_STEP_COUNTER] = SSP_UNIMPLEMENTED,
[SSP_BIO_HRM_RAW] = SSP_BIO_HRM_RAW_SIZE +
SSP_TIME_SIZE,
[SSP_BIO_HRM_RAW_FAC] = SSP_BIO_HRM_RAW_FAC_SIZE +
SSP_TIME_SIZE,
[SSP_BIO_HRM_LIB] = SSP_BIO_HRM_LIB_SIZE +
SSP_TIME_SIZE,
};
#define SSP_HEADER_SIZE (sizeof(struct ssp_msg_header))
#define SSP_HEADER_SIZE_ALIGNED (ALIGN(SSP_HEADER_SIZE, 4))
static struct ssp_msg *ssp_create_msg(u8 cmd, u16 len, u16 opt, u32 data)
{
struct ssp_msg_header h;
struct ssp_msg *msg;
msg = kzalloc(sizeof(*msg), GFP_KERNEL);
if (!msg)
return NULL;
h.cmd = cmd;
h.length = cpu_to_le16(len);
h.options = cpu_to_le16(opt);
h.data = cpu_to_le32(data);
msg->buffer = kzalloc(SSP_HEADER_SIZE_ALIGNED + len,
GFP_KERNEL | GFP_DMA);
if (!msg->buffer) {
kfree(msg);
return NULL;
}
msg->length = len;
msg->options = opt;
memcpy(msg->buffer, &h, SSP_HEADER_SIZE);
return msg;
}
/*
* It is a bit heavy to do it this way but often the function is used to compose
* the message from smaller chunks which are placed on the stack. Often the
* chunks are small so memcpy should be optimalized.
*/
static inline void ssp_fill_buffer(struct ssp_msg *m, unsigned int offset,
const void *src, unsigned int len)
{
memcpy(&m->buffer[SSP_HEADER_SIZE_ALIGNED + offset], src, len);
}
static inline void ssp_get_buffer(struct ssp_msg *m, unsigned int offset,
void *dest, unsigned int len)
{
memcpy(dest, &m->buffer[SSP_HEADER_SIZE_ALIGNED + offset], len);
}
#define SSP_GET_BUFFER_AT_INDEX(m, index) \
(m->buffer[SSP_HEADER_SIZE_ALIGNED + index])
#define SSP_SET_BUFFER_AT_INDEX(m, index, val) \
(m->buffer[SSP_HEADER_SIZE_ALIGNED + index] = val)
static void ssp_clean_msg(struct ssp_msg *m)
{
kfree(m->buffer);
kfree(m);
}
static int ssp_print_mcu_debug(char *data_frame, int *data_index,
int received_len)
{
int length = data_frame[(*data_index)++];
if (length > received_len - *data_index || length <= 0) {
ssp_dbg("[SSP]: MSG From MCU-invalid debug length(%d/%d)\n",
length, received_len);
return -EPROTO;
}
ssp_dbg("[SSP]: MSG From MCU - %s\n", &data_frame[*data_index]);
*data_index += length;
return 0;
}
/*
* It was designed that way - additional lines to some kind of handshake,
* please do not ask why - only the firmware guy can know it.
*/
static int ssp_check_lines(struct ssp_data *data, bool state)
{
int delay_cnt = 0;
gpiod_set_value_cansleep(data->ap_mcu_gpiod, state);
while (gpiod_get_value_cansleep(data->mcu_ap_gpiod) != state) {
usleep_range(3000, 3500);
if (data->shut_down || delay_cnt++ > 500) {
dev_err(SSP_DEV, "%s:timeout, hw ack wait fail %d\n",
__func__, state);
if (!state)
gpiod_set_value_cansleep(data->ap_mcu_gpiod, 1);
return -ETIMEDOUT;
}
}
return 0;
}
static int ssp_do_transfer(struct ssp_data *data, struct ssp_msg *msg,
struct completion *done, int timeout)
{
int status;
/*
* check if this is a short one way message or the whole transfer has
* second part after an interrupt
*/
const bool use_no_irq = msg->length == 0;
if (data->shut_down)
return -EPERM;
msg->done = done;
mutex_lock(&data->comm_lock);
status = ssp_check_lines(data, false);
if (status < 0)
goto _error_locked;
status = spi_write(data->spi, msg->buffer, SSP_HEADER_SIZE);
if (status < 0) {
gpiod_set_value_cansleep(data->ap_mcu_gpiod, 1);
dev_err(SSP_DEV, "%s spi_write fail\n", __func__);
goto _error_locked;
}
if (!use_no_irq) {
mutex_lock(&data->pending_lock);
list_add_tail(&msg->list, &data->pending_list);
mutex_unlock(&data->pending_lock);
}
status = ssp_check_lines(data, true);
if (status < 0) {
if (!use_no_irq) {
mutex_lock(&data->pending_lock);
list_del(&msg->list);
mutex_unlock(&data->pending_lock);
}
goto _error_locked;
}
mutex_unlock(&data->comm_lock);
if (!use_no_irq && done)
if (wait_for_completion_timeout(done,
msecs_to_jiffies(timeout)) ==
0) {
mutex_lock(&data->pending_lock);
list_del(&msg->list);
mutex_unlock(&data->pending_lock);
data->timeout_cnt++;
return -ETIMEDOUT;
}
return 0;
_error_locked:
mutex_unlock(&data->comm_lock);
data->timeout_cnt++;
return status;
}
static inline int ssp_spi_sync_command(struct ssp_data *data,
struct ssp_msg *msg)
{
return ssp_do_transfer(data, msg, NULL, 0);
}
static int ssp_spi_sync(struct ssp_data *data, struct ssp_msg *msg,
int timeout)
{
DECLARE_COMPLETION_ONSTACK(done);
if (WARN_ON(!msg->length))
return -EPERM;
return ssp_do_transfer(data, msg, &done, timeout);
}
static int ssp_handle_big_data(struct ssp_data *data, char *dataframe, int *idx)
{
/* mock-up, it will be changed with adding another sensor types */
*idx += 8;
return 0;
}
static int ssp_parse_dataframe(struct ssp_data *data, char *dataframe, int len)
{
int idx, sd;
struct ssp_sensor_data *spd;
struct iio_dev **indio_devs = data->sensor_devs;
for (idx = 0; idx < len;) {
switch (dataframe[idx++]) {
case SSP_MSG2AP_INST_BYPASS_DATA:
if (idx >= len)
return -EPROTO;
sd = dataframe[idx++];
if (sd < 0 || sd >= SSP_SENSOR_MAX) {
dev_err(SSP_DEV,
"Mcu data frame1 error %d\n", sd);
return -EPROTO;
}
if (indio_devs[sd]) {
spd = iio_priv(indio_devs[sd]);
if (spd->process_data) {
if (idx >= len)
return -EPROTO;
spd->process_data(indio_devs[sd],
&dataframe[idx],
data->timestamp);
}
} else {
dev_err(SSP_DEV, "no client for frame\n");
}
idx += ssp_offset_map[sd];
break;
case SSP_MSG2AP_INST_DEBUG_DATA:
if (idx >= len)
return -EPROTO;
sd = ssp_print_mcu_debug(dataframe, &idx, len);
if (sd) {
dev_err(SSP_DEV,
"Mcu data frame3 error %d\n", sd);
return sd;
}
break;
case SSP_MSG2AP_INST_LIBRARY_DATA:
idx += len;
break;
case SSP_MSG2AP_INST_BIG_DATA:
ssp_handle_big_data(data, dataframe, &idx);
break;
case SSP_MSG2AP_INST_TIME_SYNC:
data->time_syncing = true;
break;
case SSP_MSG2AP_INST_RESET:
ssp_queue_ssp_refresh_task(data, 0);
break;
}
}
if (data->time_syncing)
data->timestamp = ktime_get_real_ns();
return 0;
}
/* threaded irq */
int ssp_irq_msg(struct ssp_data *data)
{
char *buffer;
u8 msg_type;
int ret;
u16 length, msg_options;
struct ssp_msg *msg = NULL, *iter, *n;
ret = spi_read(data->spi, data->header_buffer, SSP_HEADER_BUFFER_SIZE);
if (ret < 0) {
dev_err(SSP_DEV, "header read fail\n");
return ret;
}
length = le16_to_cpu(data->header_buffer[1]);
msg_options = le16_to_cpu(data->header_buffer[0]);
if (length == 0) {
dev_err(SSP_DEV, "length received from mcu is 0\n");
return -EINVAL;
}
msg_type = SSP_GET_MESSAGE_TYPE(msg_options);
switch (msg_type) {
case SSP_AP2HUB_READ:
case SSP_AP2HUB_WRITE:
/*
* this is a small list, a few elements - the packets can be
* received with no order
*/
mutex_lock(&data->pending_lock);
list_for_each_entry_safe(iter, n, &data->pending_list, list) {
if (iter->options == msg_options) {
list_del(&iter->list);
msg = iter;
break;
}
}
if (!msg) {
/*
* here can be implemented dead messages handling
* but the slave should not send such ones - it is to
* check but let's handle this
*/
buffer = kmalloc(length, GFP_KERNEL | GFP_DMA);
if (!buffer) {
ret = -ENOMEM;
goto _unlock;
}
/* got dead packet so it is always an error */
ret = spi_read(data->spi, buffer, length);
if (ret >= 0)
ret = -EPROTO;
kfree(buffer);
dev_err(SSP_DEV, "No match error %x\n",
msg_options);
goto _unlock;
}
if (msg_type == SSP_AP2HUB_READ)
ret = spi_read(data->spi,
&msg->buffer[SSP_HEADER_SIZE_ALIGNED],
msg->length);
if (msg_type == SSP_AP2HUB_WRITE) {
ret = spi_write(data->spi,
&msg->buffer[SSP_HEADER_SIZE_ALIGNED],
msg->length);
if (msg_options & SSP_AP2HUB_RETURN) {
msg->options =
SSP_AP2HUB_READ | SSP_AP2HUB_RETURN;
msg->length = 1;
list_add_tail(&msg->list, &data->pending_list);
goto _unlock;
}
}
if (msg->done)
if (!completion_done(msg->done))
complete(msg->done);
_unlock:
mutex_unlock(&data->pending_lock);
break;
case SSP_HUB2AP_WRITE:
buffer = kzalloc(length, GFP_KERNEL | GFP_DMA);
if (!buffer)
return -ENOMEM;
ret = spi_read(data->spi, buffer, length);
if (ret < 0) {
dev_err(SSP_DEV, "spi read fail\n");
kfree(buffer);
break;
}
ret = ssp_parse_dataframe(data, buffer, length);
kfree(buffer);
break;
default:
dev_err(SSP_DEV, "unknown msg type\n");
return -EPROTO;
}
return ret;
}
void ssp_clean_pending_list(struct ssp_data *data)
{
struct ssp_msg *msg, *n;
mutex_lock(&data->pending_lock);
list_for_each_entry_safe(msg, n, &data->pending_list, list) {
list_del(&msg->list);
if (msg->done)
if (!completion_done(msg->done))
complete(msg->done);
}
mutex_unlock(&data->pending_lock);
}
int ssp_command(struct ssp_data *data, char command, int arg)
{
int ret;
struct ssp_msg *msg;
msg = ssp_create_msg(command, 0, SSP_AP2HUB_WRITE, arg);
if (!msg)
return -ENOMEM;
ssp_dbg("%s - command 0x%x %d\n", __func__, command, arg);
ret = ssp_spi_sync_command(data, msg);
ssp_clean_msg(msg);
return ret;
}
int ssp_send_instruction(struct ssp_data *data, u8 inst, u8 sensor_type,
u8 *send_buf, u8 length)
{
int ret;
struct ssp_msg *msg;
if (data->fw_dl_state == SSP_FW_DL_STATE_DOWNLOADING) {
dev_err(SSP_DEV, "%s - Skip Inst! DL state = %d\n",
__func__, data->fw_dl_state);
return -EBUSY;
} else if (!(data->available_sensors & BIT(sensor_type)) &&
(inst <= SSP_MSG2SSP_INST_CHANGE_DELAY)) {
dev_err(SSP_DEV, "%s - Bypass Inst Skip! - %u\n",
__func__, sensor_type);
return -EIO; /* just fail */
}
msg = ssp_create_msg(inst, length + 2, SSP_AP2HUB_WRITE, 0);
if (!msg)
return -ENOMEM;
ssp_fill_buffer(msg, 0, &sensor_type, 1);
ssp_fill_buffer(msg, 1, send_buf, length);
ssp_dbg("%s - Inst = 0x%x, Sensor Type = 0x%x, data = %u\n",
__func__, inst, sensor_type, send_buf[1]);
ret = ssp_spi_sync(data, msg, 1000);
ssp_clean_msg(msg);
return ret;
}
int ssp_get_chipid(struct ssp_data *data)
{
int ret;
char buffer;
struct ssp_msg *msg;
msg = ssp_create_msg(SSP_MSG2SSP_AP_WHOAMI, 1, SSP_AP2HUB_READ, 0);
if (!msg)
return -ENOMEM;
ret = ssp_spi_sync(data, msg, 1000);
buffer = SSP_GET_BUFFER_AT_INDEX(msg, 0);
ssp_clean_msg(msg);
return ret < 0 ? ret : buffer;
}
int ssp_set_magnetic_matrix(struct ssp_data *data)
{
int ret;
struct ssp_msg *msg;
msg = ssp_create_msg(SSP_MSG2SSP_AP_SET_MAGNETIC_STATIC_MATRIX,
data->sensorhub_info->mag_length, SSP_AP2HUB_WRITE,
0);
if (!msg)
return -ENOMEM;
ssp_fill_buffer(msg, 0, data->sensorhub_info->mag_table,
data->sensorhub_info->mag_length);
ret = ssp_spi_sync(data, msg, 1000);
ssp_clean_msg(msg);
return ret;
}
unsigned int ssp_get_sensor_scanning_info(struct ssp_data *data)
{
int ret;
__le32 result;
u32 cpu_result = 0;
struct ssp_msg *msg = ssp_create_msg(SSP_MSG2SSP_AP_SENSOR_SCANNING, 4,
SSP_AP2HUB_READ, 0);
if (!msg)
return 0;
ret = ssp_spi_sync(data, msg, 1000);
if (ret < 0) {
dev_err(SSP_DEV, "%s - spi read fail %d\n", __func__, ret);
goto _exit;
}
ssp_get_buffer(msg, 0, &result, 4);
cpu_result = le32_to_cpu(result);
dev_info(SSP_DEV, "%s state: 0x%08x\n", __func__, cpu_result);
_exit:
ssp_clean_msg(msg);
return cpu_result;
}
unsigned int ssp_get_firmware_rev(struct ssp_data *data)
{
int ret;
__le32 result;
struct ssp_msg *msg = ssp_create_msg(SSP_MSG2SSP_AP_FIRMWARE_REV, 4,
SSP_AP2HUB_READ, 0);
if (!msg)
return SSP_INVALID_REVISION;
ret = ssp_spi_sync(data, msg, 1000);
if (ret < 0) {
dev_err(SSP_DEV, "%s - transfer fail %d\n", __func__, ret);
ret = SSP_INVALID_REVISION;
goto _exit;
}
ssp_get_buffer(msg, 0, &result, 4);
ret = le32_to_cpu(result);
_exit:
ssp_clean_msg(msg);
return ret;
}
| linux-master | drivers/iio/common/ssp_sensors/ssp_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics sensors spi library driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/iio/common/st_sensors_spi.h>
#define ST_SENSORS_SPI_MULTIREAD 0xc0
static const struct regmap_config st_sensors_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static const struct regmap_config st_sensors_spi_regmap_multiread_bit_config = {
.reg_bits = 8,
.val_bits = 8,
.read_flag_mask = ST_SENSORS_SPI_MULTIREAD,
};
/*
* st_sensors_is_spi_3_wire() - check if SPI 3-wire mode has been selected
* @spi: spi device reference.
*
* Return: true if SPI 3-wire mode is selected, false otherwise.
*/
static bool st_sensors_is_spi_3_wire(struct spi_device *spi)
{
struct st_sensors_platform_data *pdata;
struct device *dev = &spi->dev;
if (device_property_read_bool(dev, "spi-3wire"))
return true;
pdata = dev_get_platdata(dev);
if (pdata && pdata->spi_3wire)
return true;
return false;
}
/*
* st_sensors_configure_spi_3_wire() - configure SPI 3-wire if needed
* @spi: spi device reference.
* @settings: sensor specific settings reference.
*
* Return: 0 on success, else a negative error code.
*/
static int st_sensors_configure_spi_3_wire(struct spi_device *spi,
struct st_sensor_settings *settings)
{
if (settings->sim.addr) {
u8 buffer[] = {
settings->sim.addr,
settings->sim.value
};
return spi_write(spi, buffer, 2);
}
return 0;
}
/*
* st_sensors_spi_configure() - configure SPI interface
* @indio_dev: IIO device reference.
* @spi: spi device reference.
*
* Return: 0 on success, else a negative error code.
*/
int st_sensors_spi_configure(struct iio_dev *indio_dev,
struct spi_device *spi)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
const struct regmap_config *config;
int err;
if (st_sensors_is_spi_3_wire(spi)) {
err = st_sensors_configure_spi_3_wire(spi,
sdata->sensor_settings);
if (err < 0)
return err;
}
if (sdata->sensor_settings->multi_read_bit)
config = &st_sensors_spi_regmap_multiread_bit_config;
else
config = &st_sensors_spi_regmap_config;
sdata->regmap = devm_regmap_init_spi(spi, config);
if (IS_ERR(sdata->regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap (%ld)\n",
PTR_ERR(sdata->regmap));
return PTR_ERR(sdata->regmap);
}
spi_set_drvdata(spi, indio_dev);
indio_dev->name = spi->modalias;
sdata->irq = spi->irq;
return 0;
}
EXPORT_SYMBOL_NS(st_sensors_spi_configure, IIO_ST_SENSORS);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics ST-sensors spi driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/st_sensors/st_sensors_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics sensors trigger library driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/interrupt.h>
#include <linux/regmap.h>
#include <linux/iio/common/st_sensors.h>
#include "st_sensors_core.h"
/**
* st_sensors_new_samples_available() - check if more samples came in
* @indio_dev: IIO device reference.
* @sdata: Sensor data.
*
* returns:
* false - no new samples available or read error
* true - new samples available
*/
static bool st_sensors_new_samples_available(struct iio_dev *indio_dev,
struct st_sensor_data *sdata)
{
int ret, status;
/* How would I know if I can't check it? */
if (!sdata->sensor_settings->drdy_irq.stat_drdy.addr)
return true;
/* No scan mask, no interrupt */
if (!indio_dev->active_scan_mask)
return false;
ret = regmap_read(sdata->regmap,
sdata->sensor_settings->drdy_irq.stat_drdy.addr,
&status);
if (ret < 0) {
dev_err(indio_dev->dev.parent,
"error checking samples available\n");
return false;
}
return !!(status & sdata->sensor_settings->drdy_irq.stat_drdy.mask);
}
/**
* st_sensors_irq_handler() - top half of the IRQ-based triggers
* @irq: irq number
* @p: private handler data
*/
static irqreturn_t st_sensors_irq_handler(int irq, void *p)
{
struct iio_trigger *trig = p;
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct st_sensor_data *sdata = iio_priv(indio_dev);
/* Get the time stamp as close in time as possible */
sdata->hw_timestamp = iio_get_time_ns(indio_dev);
return IRQ_WAKE_THREAD;
}
/**
* st_sensors_irq_thread() - bottom half of the IRQ-based triggers
* @irq: irq number
* @p: private handler data
*/
static irqreturn_t st_sensors_irq_thread(int irq, void *p)
{
struct iio_trigger *trig = p;
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct st_sensor_data *sdata = iio_priv(indio_dev);
/*
* If this trigger is backed by a hardware interrupt and we have a
* status register, check if this IRQ came from us. Notice that
* we will process also if st_sensors_new_samples_available()
* returns negative: if we can't check status, then poll
* unconditionally.
*/
if (sdata->hw_irq_trigger &&
st_sensors_new_samples_available(indio_dev, sdata)) {
iio_trigger_poll_nested(p);
} else {
dev_dbg(indio_dev->dev.parent, "spurious IRQ\n");
return IRQ_NONE;
}
/*
* If we have proper level IRQs the handler will be re-entered if
* the line is still active, so return here and come back in through
* the top half if need be.
*/
if (!sdata->edge_irq)
return IRQ_HANDLED;
/*
* If we are using edge IRQs, new samples arrived while processing
* the IRQ and those may be missed unless we pick them here, so poll
* again. If the sensor delivery frequency is very high, this thread
* turns into a polled loop handler.
*/
while (sdata->hw_irq_trigger &&
st_sensors_new_samples_available(indio_dev, sdata)) {
dev_dbg(indio_dev->dev.parent,
"more samples came in during polling\n");
sdata->hw_timestamp = iio_get_time_ns(indio_dev);
iio_trigger_poll_nested(p);
}
return IRQ_HANDLED;
}
int st_sensors_allocate_trigger(struct iio_dev *indio_dev,
const struct iio_trigger_ops *trigger_ops)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
struct device *parent = indio_dev->dev.parent;
unsigned long irq_trig;
int err;
sdata->trig = devm_iio_trigger_alloc(parent, "%s-trigger",
indio_dev->name);
if (sdata->trig == NULL) {
dev_err(&indio_dev->dev, "failed to allocate iio trigger.\n");
return -ENOMEM;
}
iio_trigger_set_drvdata(sdata->trig, indio_dev);
sdata->trig->ops = trigger_ops;
irq_trig = irqd_get_trigger_type(irq_get_irq_data(sdata->irq));
/*
* If the IRQ is triggered on falling edge, we need to mark the
* interrupt as active low, if the hardware supports this.
*/
switch(irq_trig) {
case IRQF_TRIGGER_FALLING:
case IRQF_TRIGGER_LOW:
if (!sdata->sensor_settings->drdy_irq.addr_ihl) {
dev_err(&indio_dev->dev,
"falling/low specified for IRQ but hardware supports only rising/high: will request rising/high\n");
if (irq_trig == IRQF_TRIGGER_FALLING)
irq_trig = IRQF_TRIGGER_RISING;
if (irq_trig == IRQF_TRIGGER_LOW)
irq_trig = IRQF_TRIGGER_HIGH;
} else {
/* Set up INT active low i.e. falling edge */
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->drdy_irq.addr_ihl,
sdata->sensor_settings->drdy_irq.mask_ihl, 1);
if (err < 0)
return err;
dev_info(&indio_dev->dev,
"interrupts on the falling edge or active low level\n");
}
break;
case IRQF_TRIGGER_RISING:
dev_info(&indio_dev->dev,
"interrupts on the rising edge\n");
break;
case IRQF_TRIGGER_HIGH:
dev_info(&indio_dev->dev,
"interrupts active high level\n");
break;
default:
/* This is the most preferred mode, if possible */
dev_err(&indio_dev->dev,
"unsupported IRQ trigger specified (%lx), enforce rising edge\n", irq_trig);
irq_trig = IRQF_TRIGGER_RISING;
}
/* Tell the interrupt handler that we're dealing with edges */
if (irq_trig == IRQF_TRIGGER_FALLING ||
irq_trig == IRQF_TRIGGER_RISING) {
if (!sdata->sensor_settings->drdy_irq.stat_drdy.addr) {
dev_err(&indio_dev->dev,
"edge IRQ not supported w/o stat register.\n");
return -EOPNOTSUPP;
}
sdata->edge_irq = true;
} else {
/*
* If we're not using edges (i.e. level interrupts) we
* just mask off the IRQ, handle one interrupt, then
* if the line is still low, we return to the
* interrupt handler top half again and start over.
*/
irq_trig |= IRQF_ONESHOT;
}
/*
* If the interrupt pin is Open Drain, by definition this
* means that the interrupt line may be shared with other
* peripherals. But to do this we also need to have a status
* register and mask to figure out if this sensor was firing
* the IRQ or not, so we can tell the interrupt handle that
* it was "our" interrupt.
*/
if (sdata->int_pin_open_drain &&
sdata->sensor_settings->drdy_irq.stat_drdy.addr)
irq_trig |= IRQF_SHARED;
err = devm_request_threaded_irq(parent,
sdata->irq,
st_sensors_irq_handler,
st_sensors_irq_thread,
irq_trig,
sdata->trig->name,
sdata->trig);
if (err) {
dev_err(&indio_dev->dev, "failed to request trigger IRQ.\n");
return err;
}
err = devm_iio_trigger_register(parent, sdata->trig);
if (err < 0) {
dev_err(&indio_dev->dev, "failed to register iio trigger.\n");
return err;
}
indio_dev->trig = iio_trigger_get(sdata->trig);
return 0;
}
EXPORT_SYMBOL_NS(st_sensors_allocate_trigger, IIO_ST_SENSORS);
int st_sensors_validate_device(struct iio_trigger *trig,
struct iio_dev *indio_dev)
{
struct iio_dev *indio = iio_trigger_get_drvdata(trig);
if (indio != indio_dev)
return -EINVAL;
return 0;
}
EXPORT_SYMBOL_NS(st_sensors_validate_device, IIO_ST_SENSORS);
| linux-master | drivers/iio/common/st_sensors/st_sensors_trigger.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics sensors i2c library driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/regmap.h>
#include <linux/iio/common/st_sensors_i2c.h>
#define ST_SENSORS_I2C_MULTIREAD 0x80
static const struct regmap_config st_sensors_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static const struct regmap_config st_sensors_i2c_regmap_multiread_bit_config = {
.reg_bits = 8,
.val_bits = 8,
.read_flag_mask = ST_SENSORS_I2C_MULTIREAD,
};
/*
* st_sensors_i2c_configure() - configure I2C interface
* @indio_dev: IIO device reference.
* @client: i2c client reference.
*
* Return: 0 on success, else a negative error code.
*/
int st_sensors_i2c_configure(struct iio_dev *indio_dev,
struct i2c_client *client)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
const struct regmap_config *config;
if (sdata->sensor_settings->multi_read_bit)
config = &st_sensors_i2c_regmap_multiread_bit_config;
else
config = &st_sensors_i2c_regmap_config;
sdata->regmap = devm_regmap_init_i2c(client, config);
if (IS_ERR(sdata->regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap (%ld)\n",
PTR_ERR(sdata->regmap));
return PTR_ERR(sdata->regmap);
}
i2c_set_clientdata(client, indio_dev);
indio_dev->name = client->name;
sdata->irq = client->irq;
return 0;
}
EXPORT_SYMBOL_NS(st_sensors_i2c_configure, IIO_ST_SENSORS);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics ST-sensors i2c driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/st_sensors/st_sensors_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics sensors core library driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/mutex.h>
#include <linux/property.h>
#include <linux/regulator/consumer.h>
#include <linux/regmap.h>
#include <asm/unaligned.h>
#include <linux/iio/common/st_sensors.h>
#include "st_sensors_core.h"
int st_sensors_write_data_with_mask(struct iio_dev *indio_dev,
u8 reg_addr, u8 mask, u8 data)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
return regmap_update_bits(sdata->regmap,
reg_addr, mask, data << __ffs(mask));
}
int st_sensors_debugfs_reg_access(struct iio_dev *indio_dev,
unsigned reg, unsigned writeval,
unsigned *readval)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
int err;
if (!readval)
return regmap_write(sdata->regmap, reg, writeval);
err = regmap_read(sdata->regmap, reg, readval);
if (err < 0)
return err;
return 0;
}
EXPORT_SYMBOL_NS(st_sensors_debugfs_reg_access, IIO_ST_SENSORS);
static int st_sensors_match_odr(struct st_sensor_settings *sensor_settings,
unsigned int odr, struct st_sensor_odr_avl *odr_out)
{
int i, ret = -EINVAL;
for (i = 0; i < ST_SENSORS_ODR_LIST_MAX; i++) {
if (sensor_settings->odr.odr_avl[i].hz == 0)
goto st_sensors_match_odr_error;
if (sensor_settings->odr.odr_avl[i].hz == odr) {
odr_out->hz = sensor_settings->odr.odr_avl[i].hz;
odr_out->value = sensor_settings->odr.odr_avl[i].value;
ret = 0;
break;
}
}
st_sensors_match_odr_error:
return ret;
}
int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr)
{
int err = 0;
struct st_sensor_odr_avl odr_out = {0, 0};
struct st_sensor_data *sdata = iio_priv(indio_dev);
mutex_lock(&sdata->odr_lock);
if (!sdata->sensor_settings->odr.mask)
goto unlock_mutex;
err = st_sensors_match_odr(sdata->sensor_settings, odr, &odr_out);
if (err < 0)
goto unlock_mutex;
if ((sdata->sensor_settings->odr.addr ==
sdata->sensor_settings->pw.addr) &&
(sdata->sensor_settings->odr.mask ==
sdata->sensor_settings->pw.mask)) {
if (sdata->enabled == true) {
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->odr.addr,
sdata->sensor_settings->odr.mask,
odr_out.value);
} else {
err = 0;
}
} else {
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->odr.addr,
sdata->sensor_settings->odr.mask,
odr_out.value);
}
if (err >= 0)
sdata->odr = odr_out.hz;
unlock_mutex:
mutex_unlock(&sdata->odr_lock);
return err;
}
EXPORT_SYMBOL_NS(st_sensors_set_odr, IIO_ST_SENSORS);
static int st_sensors_match_fs(struct st_sensor_settings *sensor_settings,
unsigned int fs, int *index_fs_avl)
{
int i, ret = -EINVAL;
for (i = 0; i < ST_SENSORS_FULLSCALE_AVL_MAX; i++) {
if (sensor_settings->fs.fs_avl[i].num == 0)
return ret;
if (sensor_settings->fs.fs_avl[i].num == fs) {
*index_fs_avl = i;
ret = 0;
break;
}
}
return ret;
}
static int st_sensors_set_fullscale(struct iio_dev *indio_dev, unsigned int fs)
{
int err, i = 0;
struct st_sensor_data *sdata = iio_priv(indio_dev);
if (sdata->sensor_settings->fs.addr == 0)
return 0;
err = st_sensors_match_fs(sdata->sensor_settings, fs, &i);
if (err < 0)
goto st_accel_set_fullscale_error;
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->fs.addr,
sdata->sensor_settings->fs.mask,
sdata->sensor_settings->fs.fs_avl[i].value);
if (err < 0)
goto st_accel_set_fullscale_error;
sdata->current_fullscale = &sdata->sensor_settings->fs.fs_avl[i];
return err;
st_accel_set_fullscale_error:
dev_err(&indio_dev->dev, "failed to set new fullscale.\n");
return err;
}
int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable)
{
u8 tmp_value;
int err = -EINVAL;
bool found = false;
struct st_sensor_odr_avl odr_out = {0, 0};
struct st_sensor_data *sdata = iio_priv(indio_dev);
if (enable) {
tmp_value = sdata->sensor_settings->pw.value_on;
if ((sdata->sensor_settings->odr.addr ==
sdata->sensor_settings->pw.addr) &&
(sdata->sensor_settings->odr.mask ==
sdata->sensor_settings->pw.mask)) {
err = st_sensors_match_odr(sdata->sensor_settings,
sdata->odr, &odr_out);
if (err < 0)
goto set_enable_error;
tmp_value = odr_out.value;
found = true;
}
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->pw.addr,
sdata->sensor_settings->pw.mask, tmp_value);
if (err < 0)
goto set_enable_error;
sdata->enabled = true;
if (found)
sdata->odr = odr_out.hz;
} else {
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->pw.addr,
sdata->sensor_settings->pw.mask,
sdata->sensor_settings->pw.value_off);
if (err < 0)
goto set_enable_error;
sdata->enabled = false;
}
set_enable_error:
return err;
}
EXPORT_SYMBOL_NS(st_sensors_set_enable, IIO_ST_SENSORS);
int st_sensors_set_axis_enable(struct iio_dev *indio_dev, u8 axis_enable)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
int err = 0;
if (sdata->sensor_settings->enable_axis.addr)
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->enable_axis.addr,
sdata->sensor_settings->enable_axis.mask,
axis_enable);
return err;
}
EXPORT_SYMBOL_NS(st_sensors_set_axis_enable, IIO_ST_SENSORS);
int st_sensors_power_enable(struct iio_dev *indio_dev)
{
static const char * const regulator_names[] = { "vdd", "vddio" };
struct device *parent = indio_dev->dev.parent;
int err;
/* Regulators not mandatory, but if requested we should enable them. */
err = devm_regulator_bulk_get_enable(parent,
ARRAY_SIZE(regulator_names),
regulator_names);
if (err)
return dev_err_probe(&indio_dev->dev, err,
"unable to enable supplies\n");
return 0;
}
EXPORT_SYMBOL_NS(st_sensors_power_enable, IIO_ST_SENSORS);
static int st_sensors_set_drdy_int_pin(struct iio_dev *indio_dev,
struct st_sensors_platform_data *pdata)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
/* Sensor does not support interrupts */
if (!sdata->sensor_settings->drdy_irq.int1.addr &&
!sdata->sensor_settings->drdy_irq.int2.addr) {
if (pdata->drdy_int_pin)
dev_info(&indio_dev->dev,
"DRDY on pin INT%d specified, but sensor does not support interrupts\n",
pdata->drdy_int_pin);
return 0;
}
switch (pdata->drdy_int_pin) {
case 1:
if (!sdata->sensor_settings->drdy_irq.int1.mask) {
dev_err(&indio_dev->dev,
"DRDY on INT1 not available.\n");
return -EINVAL;
}
sdata->drdy_int_pin = 1;
break;
case 2:
if (!sdata->sensor_settings->drdy_irq.int2.mask) {
dev_err(&indio_dev->dev,
"DRDY on INT2 not available.\n");
return -EINVAL;
}
sdata->drdy_int_pin = 2;
break;
default:
dev_err(&indio_dev->dev, "DRDY on pdata not valid.\n");
return -EINVAL;
}
if (pdata->open_drain) {
if (!sdata->sensor_settings->drdy_irq.int1.addr_od &&
!sdata->sensor_settings->drdy_irq.int2.addr_od)
dev_err(&indio_dev->dev,
"open drain requested but unsupported.\n");
else
sdata->int_pin_open_drain = true;
}
return 0;
}
static struct st_sensors_platform_data *st_sensors_dev_probe(struct device *dev,
struct st_sensors_platform_data *defdata)
{
struct st_sensors_platform_data *pdata;
u32 val;
if (!dev_fwnode(dev))
return NULL;
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return ERR_PTR(-ENOMEM);
if (!device_property_read_u32(dev, "st,drdy-int-pin", &val) && (val <= 2))
pdata->drdy_int_pin = (u8) val;
else
pdata->drdy_int_pin = defdata ? defdata->drdy_int_pin : 0;
pdata->open_drain = device_property_read_bool(dev, "drive-open-drain");
return pdata;
}
/**
* st_sensors_dev_name_probe() - device probe for ST sensor name
* @dev: driver model representation of the device.
* @name: device name buffer reference.
* @len: device name buffer length.
*
* In effect this function matches an ID to an internal kernel
* name for a certain sensor device, so that the rest of the autodetection can
* rely on that name from this point on. I2C/SPI devices will be renamed
* to match the internal kernel convention.
*/
void st_sensors_dev_name_probe(struct device *dev, char *name, int len)
{
const void *match;
match = device_get_match_data(dev);
if (!match)
return;
/* The name from the match takes precedence if present */
strscpy(name, match, len);
}
EXPORT_SYMBOL_NS(st_sensors_dev_name_probe, IIO_ST_SENSORS);
int st_sensors_init_sensor(struct iio_dev *indio_dev,
struct st_sensors_platform_data *pdata)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
struct st_sensors_platform_data *of_pdata;
int err = 0;
mutex_init(&sdata->odr_lock);
/* If OF/DT pdata exists, it will take precedence of anything else */
of_pdata = st_sensors_dev_probe(indio_dev->dev.parent, pdata);
if (IS_ERR(of_pdata))
return PTR_ERR(of_pdata);
if (of_pdata)
pdata = of_pdata;
if (pdata) {
err = st_sensors_set_drdy_int_pin(indio_dev, pdata);
if (err < 0)
return err;
}
err = st_sensors_set_enable(indio_dev, false);
if (err < 0)
return err;
/* Disable DRDY, this might be still be enabled after reboot. */
err = st_sensors_set_dataready_irq(indio_dev, false);
if (err < 0)
return err;
if (sdata->current_fullscale) {
err = st_sensors_set_fullscale(indio_dev,
sdata->current_fullscale->num);
if (err < 0)
return err;
} else
dev_info(&indio_dev->dev, "Full-scale not possible\n");
err = st_sensors_set_odr(indio_dev, sdata->odr);
if (err < 0)
return err;
/* set BDU */
if (sdata->sensor_settings->bdu.addr) {
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->bdu.addr,
sdata->sensor_settings->bdu.mask, true);
if (err < 0)
return err;
}
/* set DAS */
if (sdata->sensor_settings->das.addr) {
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->das.addr,
sdata->sensor_settings->das.mask, 1);
if (err < 0)
return err;
}
if (sdata->int_pin_open_drain) {
u8 addr, mask;
if (sdata->drdy_int_pin == 1) {
addr = sdata->sensor_settings->drdy_irq.int1.addr_od;
mask = sdata->sensor_settings->drdy_irq.int1.mask_od;
} else {
addr = sdata->sensor_settings->drdy_irq.int2.addr_od;
mask = sdata->sensor_settings->drdy_irq.int2.mask_od;
}
dev_info(&indio_dev->dev,
"set interrupt line to open drain mode on pin %d\n",
sdata->drdy_int_pin);
err = st_sensors_write_data_with_mask(indio_dev, addr,
mask, 1);
if (err < 0)
return err;
}
err = st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS);
return err;
}
EXPORT_SYMBOL_NS(st_sensors_init_sensor, IIO_ST_SENSORS);
int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable)
{
int err;
u8 drdy_addr, drdy_mask;
struct st_sensor_data *sdata = iio_priv(indio_dev);
if (!sdata->sensor_settings->drdy_irq.int1.addr &&
!sdata->sensor_settings->drdy_irq.int2.addr) {
/*
* there are some devices (e.g. LIS3MDL) where drdy line is
* routed to a given pin and it is not possible to select a
* different one. Take into account irq status register
* to understand if irq trigger can be properly supported
*/
if (sdata->sensor_settings->drdy_irq.stat_drdy.addr)
sdata->hw_irq_trigger = enable;
return 0;
}
/* Enable/Disable the interrupt generator 1. */
if (sdata->sensor_settings->drdy_irq.ig1.en_addr > 0) {
err = st_sensors_write_data_with_mask(indio_dev,
sdata->sensor_settings->drdy_irq.ig1.en_addr,
sdata->sensor_settings->drdy_irq.ig1.en_mask,
(int)enable);
if (err < 0)
goto st_accel_set_dataready_irq_error;
}
if (sdata->drdy_int_pin == 1) {
drdy_addr = sdata->sensor_settings->drdy_irq.int1.addr;
drdy_mask = sdata->sensor_settings->drdy_irq.int1.mask;
} else {
drdy_addr = sdata->sensor_settings->drdy_irq.int2.addr;
drdy_mask = sdata->sensor_settings->drdy_irq.int2.mask;
}
/* Flag to the poll function that the hardware trigger is in use */
sdata->hw_irq_trigger = enable;
/* Enable/Disable the interrupt generator for data ready. */
err = st_sensors_write_data_with_mask(indio_dev, drdy_addr,
drdy_mask, (int)enable);
st_accel_set_dataready_irq_error:
return err;
}
EXPORT_SYMBOL_NS(st_sensors_set_dataready_irq, IIO_ST_SENSORS);
int st_sensors_set_fullscale_by_gain(struct iio_dev *indio_dev, int scale)
{
int err = -EINVAL, i;
struct st_sensor_data *sdata = iio_priv(indio_dev);
for (i = 0; i < ST_SENSORS_FULLSCALE_AVL_MAX; i++) {
if ((sdata->sensor_settings->fs.fs_avl[i].gain == scale) &&
(sdata->sensor_settings->fs.fs_avl[i].gain != 0)) {
err = 0;
break;
}
}
if (err < 0)
goto st_sensors_match_scale_error;
err = st_sensors_set_fullscale(indio_dev,
sdata->sensor_settings->fs.fs_avl[i].num);
st_sensors_match_scale_error:
return err;
}
EXPORT_SYMBOL_NS(st_sensors_set_fullscale_by_gain, IIO_ST_SENSORS);
static int st_sensors_read_axis_data(struct iio_dev *indio_dev,
struct iio_chan_spec const *ch, int *data)
{
int err;
u8 *outdata;
struct st_sensor_data *sdata = iio_priv(indio_dev);
unsigned int byte_for_channel;
byte_for_channel = DIV_ROUND_UP(ch->scan_type.realbits +
ch->scan_type.shift, 8);
outdata = kmalloc(byte_for_channel, GFP_DMA | GFP_KERNEL);
if (!outdata)
return -ENOMEM;
err = regmap_bulk_read(sdata->regmap, ch->address,
outdata, byte_for_channel);
if (err < 0)
goto st_sensors_free_memory;
if (byte_for_channel == 1)
*data = (s8)*outdata;
else if (byte_for_channel == 2)
*data = (s16)get_unaligned_le16(outdata);
else if (byte_for_channel == 3)
*data = (s32)sign_extend32(get_unaligned_le24(outdata), 23);
st_sensors_free_memory:
kfree(outdata);
return err;
}
int st_sensors_read_info_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *ch, int *val)
{
int err;
struct st_sensor_data *sdata = iio_priv(indio_dev);
err = iio_device_claim_direct_mode(indio_dev);
if (err)
return err;
mutex_lock(&sdata->odr_lock);
err = st_sensors_set_enable(indio_dev, true);
if (err < 0)
goto out;
msleep((sdata->sensor_settings->bootime * 1000) / sdata->odr);
err = st_sensors_read_axis_data(indio_dev, ch, val);
if (err < 0)
goto out;
*val = *val >> ch->scan_type.shift;
err = st_sensors_set_enable(indio_dev, false);
out:
mutex_unlock(&sdata->odr_lock);
iio_device_release_direct_mode(indio_dev);
return err;
}
EXPORT_SYMBOL_NS(st_sensors_read_info_raw, IIO_ST_SENSORS);
/*
* st_sensors_get_settings_index() - get index of the sensor settings for a
* specific device from list of settings
* @name: device name buffer reference.
* @list: sensor settings list.
* @list_length: length of sensor settings list.
*
* Return: non negative number on success (valid index),
* negative error code otherwise.
*/
int st_sensors_get_settings_index(const char *name,
const struct st_sensor_settings *list,
const int list_length)
{
int i, n;
for (i = 0; i < list_length; i++) {
for (n = 0; n < ST_SENSORS_MAX_4WAI; n++) {
if (strcmp(name, list[i].sensors_supported[n]) == 0)
return i;
}
}
return -ENODEV;
}
EXPORT_SYMBOL_NS(st_sensors_get_settings_index, IIO_ST_SENSORS);
/*
* st_sensors_verify_id() - verify sensor ID (WhoAmI) is matching with the
* expected value
* @indio_dev: IIO device reference.
*
* Return: 0 on success (valid sensor ID), else a negative error code.
*/
int st_sensors_verify_id(struct iio_dev *indio_dev)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
int wai, err;
if (sdata->sensor_settings->wai_addr) {
err = regmap_read(sdata->regmap,
sdata->sensor_settings->wai_addr, &wai);
if (err < 0) {
dev_err(&indio_dev->dev,
"failed to read Who-Am-I register.\n");
return err;
}
if (sdata->sensor_settings->wai != wai) {
dev_err(&indio_dev->dev,
"%s: WhoAmI mismatch (0x%x).\n",
indio_dev->name, wai);
return -EINVAL;
}
}
return 0;
}
EXPORT_SYMBOL_NS(st_sensors_verify_id, IIO_ST_SENSORS);
ssize_t st_sensors_sysfs_sampling_frequency_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
int i, len = 0;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct st_sensor_data *sdata = iio_priv(indio_dev);
for (i = 0; i < ST_SENSORS_ODR_LIST_MAX; i++) {
if (sdata->sensor_settings->odr.odr_avl[i].hz == 0)
break;
len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
sdata->sensor_settings->odr.odr_avl[i].hz);
}
buf[len - 1] = '\n';
return len;
}
EXPORT_SYMBOL_NS(st_sensors_sysfs_sampling_frequency_avail, IIO_ST_SENSORS);
ssize_t st_sensors_sysfs_scale_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
int i, len = 0, q, r;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct st_sensor_data *sdata = iio_priv(indio_dev);
for (i = 0; i < ST_SENSORS_FULLSCALE_AVL_MAX; i++) {
if (sdata->sensor_settings->fs.fs_avl[i].num == 0)
break;
q = sdata->sensor_settings->fs.fs_avl[i].gain / 1000000;
r = sdata->sensor_settings->fs.fs_avl[i].gain % 1000000;
len += scnprintf(buf + len, PAGE_SIZE - len, "%u.%06u ", q, r);
}
buf[len - 1] = '\n';
return len;
}
EXPORT_SYMBOL_NS(st_sensors_sysfs_scale_avail, IIO_ST_SENSORS);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics ST-sensors core");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/common/st_sensors/st_sensors_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics sensors buffer library driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/interrupt.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/irqreturn.h>
#include <linux/regmap.h>
#include <linux/iio/common/st_sensors.h>
static int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf)
{
struct st_sensor_data *sdata = iio_priv(indio_dev);
unsigned int num_data_channels = sdata->num_data_channels;
int i;
for_each_set_bit(i, indio_dev->active_scan_mask, num_data_channels) {
const struct iio_chan_spec *channel = &indio_dev->channels[i];
unsigned int bytes_to_read =
DIV_ROUND_UP(channel->scan_type.realbits +
channel->scan_type.shift, 8);
unsigned int storage_bytes =
channel->scan_type.storagebits >> 3;
buf = PTR_ALIGN(buf, storage_bytes);
if (regmap_bulk_read(sdata->regmap, channel->address,
buf, bytes_to_read) < 0)
return -EIO;
/* Advance the buffer pointer */
buf += storage_bytes;
}
return 0;
}
irqreturn_t st_sensors_trigger_handler(int irq, void *p)
{
int len;
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct st_sensor_data *sdata = iio_priv(indio_dev);
s64 timestamp;
/*
* If we do timestamping here, do it before reading the values, because
* once we've read the values, new interrupts can occur (when using
* the hardware trigger) and the hw_timestamp may get updated.
* By storing it in a local variable first, we are safe.
*/
if (iio_trigger_using_own(indio_dev))
timestamp = sdata->hw_timestamp;
else
timestamp = iio_get_time_ns(indio_dev);
len = st_sensors_get_buffer_element(indio_dev, sdata->buffer_data);
if (len < 0)
goto st_sensors_get_buffer_element_error;
iio_push_to_buffers_with_timestamp(indio_dev, sdata->buffer_data,
timestamp);
st_sensors_get_buffer_element_error:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
EXPORT_SYMBOL_NS(st_sensors_trigger_handler, IIO_ST_SENSORS);
| linux-master | drivers/iio/common/st_sensors/st_sensors_buffer.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2012, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/time.h>
#include <linux/units.h>
#include <linux/hid-sensor-hub.h>
#include <linux/iio/iio.h>
static struct {
u32 usage_id;
int unit; /* 0 for default others from HID sensor spec */
int scale_val0; /* scale, whole number */
int scale_val1; /* scale, fraction in nanos */
} unit_conversion[] = {
{HID_USAGE_SENSOR_ACCEL_3D, 0, 9, 806650000},
{HID_USAGE_SENSOR_ACCEL_3D,
HID_USAGE_SENSOR_UNITS_METERS_PER_SEC_SQRD, 1, 0},
{HID_USAGE_SENSOR_ACCEL_3D,
HID_USAGE_SENSOR_UNITS_G, 9, 806650000},
{HID_USAGE_SENSOR_GRAVITY_VECTOR, 0, 9, 806650000},
{HID_USAGE_SENSOR_GRAVITY_VECTOR,
HID_USAGE_SENSOR_UNITS_METERS_PER_SEC_SQRD, 1, 0},
{HID_USAGE_SENSOR_GRAVITY_VECTOR,
HID_USAGE_SENSOR_UNITS_G, 9, 806650000},
{HID_USAGE_SENSOR_GYRO_3D, 0, 0, 17453293},
{HID_USAGE_SENSOR_GYRO_3D,
HID_USAGE_SENSOR_UNITS_RADIANS_PER_SECOND, 1, 0},
{HID_USAGE_SENSOR_GYRO_3D,
HID_USAGE_SENSOR_UNITS_DEGREES_PER_SECOND, 0, 17453293},
{HID_USAGE_SENSOR_COMPASS_3D, 0, 0, 1000000},
{HID_USAGE_SENSOR_COMPASS_3D, HID_USAGE_SENSOR_UNITS_GAUSS, 1, 0},
{HID_USAGE_SENSOR_INCLINOMETER_3D, 0, 0, 17453293},
{HID_USAGE_SENSOR_INCLINOMETER_3D,
HID_USAGE_SENSOR_UNITS_DEGREES, 0, 17453293},
{HID_USAGE_SENSOR_INCLINOMETER_3D,
HID_USAGE_SENSOR_UNITS_RADIANS, 1, 0},
{HID_USAGE_SENSOR_ALS, 0, 1, 0},
{HID_USAGE_SENSOR_ALS, HID_USAGE_SENSOR_UNITS_LUX, 1, 0},
{HID_USAGE_SENSOR_PRESSURE, 0, 100, 0},
{HID_USAGE_SENSOR_PRESSURE, HID_USAGE_SENSOR_UNITS_PASCAL, 0, 1000000},
{HID_USAGE_SENSOR_TIME_TIMESTAMP, 0, 1000000000, 0},
{HID_USAGE_SENSOR_TIME_TIMESTAMP, HID_USAGE_SENSOR_UNITS_MILLISECOND,
1000000, 0},
{HID_USAGE_SENSOR_DEVICE_ORIENTATION, 0, 1, 0},
{HID_USAGE_SENSOR_RELATIVE_ORIENTATION, 0, 1, 0},
{HID_USAGE_SENSOR_GEOMAGNETIC_ORIENTATION, 0, 1, 0},
{HID_USAGE_SENSOR_TEMPERATURE, 0, 1000, 0},
{HID_USAGE_SENSOR_TEMPERATURE, HID_USAGE_SENSOR_UNITS_DEGREES, 1000, 0},
{HID_USAGE_SENSOR_HUMIDITY, 0, 1000, 0},
{HID_USAGE_SENSOR_HINGE, 0, 0, 17453293},
{HID_USAGE_SENSOR_HINGE, HID_USAGE_SENSOR_UNITS_DEGREES, 0, 17453293},
};
static void simple_div(int dividend, int divisor, int *whole,
int *micro_frac)
{
int rem;
int exp = 0;
*micro_frac = 0;
if (divisor == 0) {
*whole = 0;
return;
}
*whole = dividend/divisor;
rem = dividend % divisor;
if (rem) {
while (rem <= divisor) {
rem *= 10;
exp++;
}
*micro_frac = (rem / divisor) * int_pow(10, 6 - exp);
}
}
static void split_micro_fraction(unsigned int no, int exp, int *val1, int *val2)
{
int divisor = int_pow(10, exp);
*val1 = no / divisor;
*val2 = no % divisor * int_pow(10, 6 - exp);
}
/*
VTF format uses exponent and variable size format.
For example if the size is 2 bytes
0x0067 with VTF16E14 format -> +1.03
To convert just change to 0x67 to decimal and use two decimal as E14 stands
for 10^-2.
Negative numbers are 2's complement
*/
static void convert_from_vtf_format(u32 value, int size, int exp,
int *val1, int *val2)
{
int sign = 1;
if (value & BIT(size*8 - 1)) {
value = ((1LL << (size * 8)) - value);
sign = -1;
}
exp = hid_sensor_convert_exponent(exp);
if (exp >= 0) {
*val1 = sign * value * int_pow(10, exp);
*val2 = 0;
} else {
split_micro_fraction(value, -exp, val1, val2);
if (*val1)
*val1 = sign * (*val1);
else
*val2 = sign * (*val2);
}
}
static u32 convert_to_vtf_format(int size, int exp, int val1, int val2)
{
int divisor;
u32 value;
int sign = 1;
if (val1 < 0 || val2 < 0)
sign = -1;
exp = hid_sensor_convert_exponent(exp);
if (exp < 0) {
divisor = int_pow(10, 6 + exp);
value = abs(val1) * int_pow(10, -exp);
value += abs(val2) / divisor;
} else {
divisor = int_pow(10, exp);
value = abs(val1) / divisor;
}
if (sign < 0)
value = ((1LL << (size * 8)) - value);
return value;
}
s32 hid_sensor_read_poll_value(struct hid_sensor_common *st)
{
s32 value = 0;
int ret;
ret = sensor_hub_get_feature(st->hsdev,
st->poll.report_id,
st->poll.index, sizeof(value), &value);
if (ret < 0 || value < 0) {
return -EINVAL;
} else {
if (st->poll.units == HID_USAGE_SENSOR_UNITS_SECOND)
value = value * 1000;
}
return value;
}
EXPORT_SYMBOL_NS(hid_sensor_read_poll_value, IIO_HID_ATTRIBUTES);
int hid_sensor_read_samp_freq_value(struct hid_sensor_common *st,
int *val1, int *val2)
{
s32 value;
int ret;
ret = sensor_hub_get_feature(st->hsdev,
st->poll.report_id,
st->poll.index, sizeof(value), &value);
if (ret < 0 || value < 0) {
*val1 = *val2 = 0;
return -EINVAL;
} else {
if (st->poll.units == HID_USAGE_SENSOR_UNITS_MILLISECOND)
simple_div(1000, value, val1, val2);
else if (st->poll.units == HID_USAGE_SENSOR_UNITS_SECOND)
simple_div(1, value, val1, val2);
else {
*val1 = *val2 = 0;
return -EINVAL;
}
}
return IIO_VAL_INT_PLUS_MICRO;
}
EXPORT_SYMBOL_NS(hid_sensor_read_samp_freq_value, IIO_HID);
int hid_sensor_write_samp_freq_value(struct hid_sensor_common *st,
int val1, int val2)
{
s32 value;
int ret;
if (val1 < 0 || val2 < 0)
return -EINVAL;
value = val1 * HZ_PER_MHZ + val2;
if (value) {
if (st->poll.units == HID_USAGE_SENSOR_UNITS_MILLISECOND)
value = NSEC_PER_SEC / value;
else if (st->poll.units == HID_USAGE_SENSOR_UNITS_SECOND)
value = USEC_PER_SEC / value;
else
value = 0;
}
ret = sensor_hub_set_feature(st->hsdev, st->poll.report_id,
st->poll.index, sizeof(value), &value);
if (ret < 0 || value < 0)
return -EINVAL;
ret = sensor_hub_get_feature(st->hsdev,
st->poll.report_id,
st->poll.index, sizeof(value), &value);
if (ret < 0 || value < 0)
return -EINVAL;
st->poll_interval = value;
return 0;
}
EXPORT_SYMBOL_NS(hid_sensor_write_samp_freq_value, IIO_HID);
int hid_sensor_read_raw_hyst_value(struct hid_sensor_common *st,
int *val1, int *val2)
{
s32 value;
int ret;
ret = sensor_hub_get_feature(st->hsdev,
st->sensitivity.report_id,
st->sensitivity.index, sizeof(value),
&value);
if (ret < 0 || value < 0) {
*val1 = *val2 = 0;
return -EINVAL;
} else {
convert_from_vtf_format(value, st->sensitivity.size,
st->sensitivity.unit_expo,
val1, val2);
}
return IIO_VAL_INT_PLUS_MICRO;
}
EXPORT_SYMBOL_NS(hid_sensor_read_raw_hyst_value, IIO_HID);
int hid_sensor_read_raw_hyst_rel_value(struct hid_sensor_common *st, int *val1,
int *val2)
{
s32 value;
int ret;
ret = sensor_hub_get_feature(st->hsdev,
st->sensitivity_rel.report_id,
st->sensitivity_rel.index, sizeof(value),
&value);
if (ret < 0 || value < 0) {
*val1 = *val2 = 0;
return -EINVAL;
}
convert_from_vtf_format(value, st->sensitivity_rel.size,
st->sensitivity_rel.unit_expo, val1, val2);
return IIO_VAL_INT_PLUS_MICRO;
}
EXPORT_SYMBOL_NS(hid_sensor_read_raw_hyst_rel_value, IIO_HID);
int hid_sensor_write_raw_hyst_value(struct hid_sensor_common *st,
int val1, int val2)
{
s32 value;
int ret;
if (val1 < 0 || val2 < 0)
return -EINVAL;
value = convert_to_vtf_format(st->sensitivity.size,
st->sensitivity.unit_expo,
val1, val2);
ret = sensor_hub_set_feature(st->hsdev, st->sensitivity.report_id,
st->sensitivity.index, sizeof(value),
&value);
if (ret < 0 || value < 0)
return -EINVAL;
ret = sensor_hub_get_feature(st->hsdev,
st->sensitivity.report_id,
st->sensitivity.index, sizeof(value),
&value);
if (ret < 0 || value < 0)
return -EINVAL;
st->raw_hystersis = value;
return 0;
}
EXPORT_SYMBOL_NS(hid_sensor_write_raw_hyst_value, IIO_HID);
int hid_sensor_write_raw_hyst_rel_value(struct hid_sensor_common *st,
int val1, int val2)
{
s32 value;
int ret;
if (val1 < 0 || val2 < 0)
return -EINVAL;
value = convert_to_vtf_format(st->sensitivity_rel.size,
st->sensitivity_rel.unit_expo,
val1, val2);
ret = sensor_hub_set_feature(st->hsdev, st->sensitivity_rel.report_id,
st->sensitivity_rel.index, sizeof(value),
&value);
if (ret < 0 || value < 0)
return -EINVAL;
ret = sensor_hub_get_feature(st->hsdev,
st->sensitivity_rel.report_id,
st->sensitivity_rel.index, sizeof(value),
&value);
if (ret < 0 || value < 0)
return -EINVAL;
st->raw_hystersis = value;
return 0;
}
EXPORT_SYMBOL_NS(hid_sensor_write_raw_hyst_rel_value, IIO_HID);
/*
* This fuction applies the unit exponent to the scale.
* For example:
* 9.806650000 ->exp:2-> val0[980]val1[665000000]
* 9.000806000 ->exp:2-> val0[900]val1[80600000]
* 0.174535293 ->exp:2-> val0[17]val1[453529300]
* 1.001745329 ->exp:0-> val0[1]val1[1745329]
* 1.001745329 ->exp:2-> val0[100]val1[174532900]
* 1.001745329 ->exp:4-> val0[10017]val1[453290000]
* 9.806650000 ->exp:-2-> val0[0]val1[98066500]
*/
static void adjust_exponent_nano(int *val0, int *val1, int scale0,
int scale1, int exp)
{
int divisor;
int i;
int x;
int res;
int rem;
if (exp > 0) {
*val0 = scale0 * int_pow(10, exp);
res = 0;
if (exp > 9) {
*val1 = 0;
return;
}
for (i = 0; i < exp; ++i) {
divisor = int_pow(10, 8 - i);
x = scale1 / divisor;
res += int_pow(10, exp - 1 - i) * x;
scale1 = scale1 % divisor;
}
*val0 += res;
*val1 = scale1 * int_pow(10, exp);
} else if (exp < 0) {
exp = abs(exp);
if (exp > 9) {
*val0 = *val1 = 0;
return;
}
divisor = int_pow(10, exp);
*val0 = scale0 / divisor;
rem = scale0 % divisor;
res = 0;
for (i = 0; i < (9 - exp); ++i) {
divisor = int_pow(10, 8 - i);
x = scale1 / divisor;
res += int_pow(10, 8 - exp - i) * x;
scale1 = scale1 % divisor;
}
*val1 = rem * int_pow(10, 9 - exp) + res;
} else {
*val0 = scale0;
*val1 = scale1;
}
}
int hid_sensor_format_scale(u32 usage_id,
struct hid_sensor_hub_attribute_info *attr_info,
int *val0, int *val1)
{
int i;
int exp;
*val0 = 1;
*val1 = 0;
for (i = 0; i < ARRAY_SIZE(unit_conversion); ++i) {
if (unit_conversion[i].usage_id == usage_id &&
unit_conversion[i].unit == attr_info->units) {
exp = hid_sensor_convert_exponent(
attr_info->unit_expo);
adjust_exponent_nano(val0, val1,
unit_conversion[i].scale_val0,
unit_conversion[i].scale_val1, exp);
break;
}
}
return IIO_VAL_INT_PLUS_NANO;
}
EXPORT_SYMBOL_NS(hid_sensor_format_scale, IIO_HID);
int64_t hid_sensor_convert_timestamp(struct hid_sensor_common *st,
int64_t raw_value)
{
return st->timestamp_ns_scale * raw_value;
}
EXPORT_SYMBOL_NS(hid_sensor_convert_timestamp, IIO_HID);
static
int hid_sensor_get_reporting_interval(struct hid_sensor_hub_device *hsdev,
u32 usage_id,
struct hid_sensor_common *st)
{
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_PROP_REPORT_INTERVAL,
&st->poll);
/* Default unit of measure is milliseconds */
if (st->poll.units == 0)
st->poll.units = HID_USAGE_SENSOR_UNITS_MILLISECOND;
st->poll_interval = -1;
return 0;
}
static void hid_sensor_get_report_latency_info(struct hid_sensor_hub_device *hsdev,
u32 usage_id,
struct hid_sensor_common *st)
{
sensor_hub_input_get_attribute_info(hsdev, HID_FEATURE_REPORT,
usage_id,
HID_USAGE_SENSOR_PROP_REPORT_LATENCY,
&st->report_latency);
hid_dbg(hsdev->hdev, "Report latency attributes: %x:%x\n",
st->report_latency.index, st->report_latency.report_id);
}
int hid_sensor_get_report_latency(struct hid_sensor_common *st)
{
int ret;
int value;
ret = sensor_hub_get_feature(st->hsdev, st->report_latency.report_id,
st->report_latency.index, sizeof(value),
&value);
if (ret < 0)
return ret;
return value;
}
EXPORT_SYMBOL_NS(hid_sensor_get_report_latency, IIO_HID_ATTRIBUTES);
int hid_sensor_set_report_latency(struct hid_sensor_common *st, int latency_ms)
{
return sensor_hub_set_feature(st->hsdev, st->report_latency.report_id,
st->report_latency.index,
sizeof(latency_ms), &latency_ms);
}
EXPORT_SYMBOL_NS(hid_sensor_set_report_latency, IIO_HID_ATTRIBUTES);
bool hid_sensor_batch_mode_supported(struct hid_sensor_common *st)
{
return st->report_latency.index > 0 && st->report_latency.report_id > 0;
}
EXPORT_SYMBOL_NS(hid_sensor_batch_mode_supported, IIO_HID_ATTRIBUTES);
int hid_sensor_parse_common_attributes(struct hid_sensor_hub_device *hsdev,
u32 usage_id,
struct hid_sensor_common *st,
const u32 *sensitivity_addresses,
u32 sensitivity_addresses_len)
{
struct hid_sensor_hub_attribute_info timestamp;
s32 value;
int ret;
int i;
hid_sensor_get_reporting_interval(hsdev, usage_id, st);
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_PROP_REPORT_STATE,
&st->report_state);
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_PROY_POWER_STATE,
&st->power_state);
st->power_state.logical_minimum = 1;
st->report_state.logical_minimum = 1;
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_PROP_SENSITIVITY_ABS,
&st->sensitivity);
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_PROP_SENSITIVITY_REL_PCT,
&st->sensitivity_rel);
/*
* Set Sensitivity field ids, when there is no individual modifier, will
* check absolute sensitivity and relative sensitivity of data field
*/
for (i = 0; i < sensitivity_addresses_len; i++) {
if (st->sensitivity.index < 0)
sensor_hub_input_get_attribute_info(
hsdev, HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
sensitivity_addresses[i],
&st->sensitivity);
if (st->sensitivity_rel.index < 0)
sensor_hub_input_get_attribute_info(
hsdev, HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_REL_PCT |
sensitivity_addresses[i],
&st->sensitivity_rel);
}
st->raw_hystersis = -1;
sensor_hub_input_get_attribute_info(hsdev,
HID_INPUT_REPORT, usage_id,
HID_USAGE_SENSOR_TIME_TIMESTAMP,
×tamp);
if (timestamp.index >= 0 && timestamp.report_id) {
int val0, val1;
hid_sensor_format_scale(HID_USAGE_SENSOR_TIME_TIMESTAMP,
×tamp, &val0, &val1);
st->timestamp_ns_scale = val0;
} else
st->timestamp_ns_scale = 1000000000;
hid_sensor_get_report_latency_info(hsdev, usage_id, st);
hid_dbg(hsdev->hdev, "common attributes: %x:%x, %x:%x, %x:%x %x:%x %x:%x\n",
st->poll.index, st->poll.report_id,
st->report_state.index, st->report_state.report_id,
st->power_state.index, st->power_state.report_id,
st->sensitivity.index, st->sensitivity.report_id,
timestamp.index, timestamp.report_id);
ret = sensor_hub_get_feature(hsdev,
st->power_state.report_id,
st->power_state.index, sizeof(value), &value);
if (ret < 0)
return ret;
if (value < 0)
return -EINVAL;
return 0;
}
EXPORT_SYMBOL_NS(hid_sensor_parse_common_attributes, IIO_HID);
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_DESCRIPTION("HID Sensor common attribute processing");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/common/hid-sensors/hid-sensor-attributes.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2012, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/hid-sensor-hub.h>
#include <linux/workqueue.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/sysfs.h>
#include "hid-sensor-trigger.h"
static ssize_t _hid_sensor_set_report_latency(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct hid_sensor_common *attrb = iio_device_get_drvdata(indio_dev);
int integer, fract, ret;
int latency;
ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
if (ret)
return ret;
latency = integer * 1000 + fract / 1000;
ret = hid_sensor_set_report_latency(attrb, latency);
if (ret < 0)
return len;
attrb->latency_ms = hid_sensor_get_report_latency(attrb);
return len;
}
static ssize_t _hid_sensor_get_report_latency(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct hid_sensor_common *attrb = iio_device_get_drvdata(indio_dev);
int latency;
latency = hid_sensor_get_report_latency(attrb);
if (latency < 0)
return latency;
return sprintf(buf, "%d.%06u\n", latency / 1000, (latency % 1000) * 1000);
}
static ssize_t _hid_sensor_get_fifo_state(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct hid_sensor_common *attrb = iio_device_get_drvdata(indio_dev);
int latency;
latency = hid_sensor_get_report_latency(attrb);
if (latency < 0)
return latency;
return sprintf(buf, "%d\n", !!latency);
}
static IIO_DEVICE_ATTR(hwfifo_timeout, 0644,
_hid_sensor_get_report_latency,
_hid_sensor_set_report_latency, 0);
static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,
_hid_sensor_get_fifo_state, NULL, 0);
static const struct iio_dev_attr *hid_sensor_fifo_attributes[] = {
&iio_dev_attr_hwfifo_timeout,
&iio_dev_attr_hwfifo_enabled,
NULL,
};
static int _hid_sensor_power_state(struct hid_sensor_common *st, bool state)
{
int state_val;
int report_val;
s32 poll_value = 0;
if (state) {
if (sensor_hub_device_open(st->hsdev))
return -EIO;
atomic_inc(&st->data_ready);
state_val = hid_sensor_get_usage_index(st->hsdev,
st->power_state.report_id,
st->power_state.index,
HID_USAGE_SENSOR_PROP_POWER_STATE_D0_FULL_POWER_ENUM);
report_val = hid_sensor_get_usage_index(st->hsdev,
st->report_state.report_id,
st->report_state.index,
HID_USAGE_SENSOR_PROP_REPORTING_STATE_ALL_EVENTS_ENUM);
poll_value = hid_sensor_read_poll_value(st);
} else {
int val;
val = atomic_dec_if_positive(&st->data_ready);
if (val < 0)
return 0;
sensor_hub_device_close(st->hsdev);
state_val = hid_sensor_get_usage_index(st->hsdev,
st->power_state.report_id,
st->power_state.index,
HID_USAGE_SENSOR_PROP_POWER_STATE_D4_POWER_OFF_ENUM);
report_val = hid_sensor_get_usage_index(st->hsdev,
st->report_state.report_id,
st->report_state.index,
HID_USAGE_SENSOR_PROP_REPORTING_STATE_NO_EVENTS_ENUM);
}
if (state_val >= 0) {
state_val += st->power_state.logical_minimum;
sensor_hub_set_feature(st->hsdev, st->power_state.report_id,
st->power_state.index, sizeof(state_val),
&state_val);
}
if (report_val >= 0) {
report_val += st->report_state.logical_minimum;
sensor_hub_set_feature(st->hsdev, st->report_state.report_id,
st->report_state.index,
sizeof(report_val),
&report_val);
}
pr_debug("HID_SENSOR %s set power_state %d report_state %d\n",
st->pdev->name, state_val, report_val);
sensor_hub_get_feature(st->hsdev, st->power_state.report_id,
st->power_state.index,
sizeof(state_val), &state_val);
if (state && poll_value)
msleep_interruptible(poll_value * 2);
return 0;
}
EXPORT_SYMBOL_NS(hid_sensor_power_state, IIO_HID);
int hid_sensor_power_state(struct hid_sensor_common *st, bool state)
{
#ifdef CONFIG_PM
int ret;
if (atomic_add_unless(&st->runtime_pm_enable, 1, 1))
pm_runtime_enable(&st->pdev->dev);
if (state) {
atomic_inc(&st->user_requested_state);
ret = pm_runtime_resume_and_get(&st->pdev->dev);
} else {
atomic_dec(&st->user_requested_state);
pm_runtime_mark_last_busy(&st->pdev->dev);
pm_runtime_use_autosuspend(&st->pdev->dev);
ret = pm_runtime_put_autosuspend(&st->pdev->dev);
}
if (ret < 0)
return ret;
return 0;
#else
atomic_set(&st->user_requested_state, state);
return _hid_sensor_power_state(st, state);
#endif
}
static void hid_sensor_set_power_work(struct work_struct *work)
{
struct hid_sensor_common *attrb = container_of(work,
struct hid_sensor_common,
work);
if (attrb->poll_interval >= 0)
sensor_hub_set_feature(attrb->hsdev, attrb->poll.report_id,
attrb->poll.index,
sizeof(attrb->poll_interval),
&attrb->poll_interval);
if (attrb->raw_hystersis >= 0)
sensor_hub_set_feature(attrb->hsdev,
attrb->sensitivity.report_id,
attrb->sensitivity.index,
sizeof(attrb->raw_hystersis),
&attrb->raw_hystersis);
if (attrb->latency_ms > 0)
hid_sensor_set_report_latency(attrb, attrb->latency_ms);
if (atomic_read(&attrb->user_requested_state))
_hid_sensor_power_state(attrb, true);
}
static int hid_sensor_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
return hid_sensor_power_state(iio_trigger_get_drvdata(trig), state);
}
void hid_sensor_remove_trigger(struct iio_dev *indio_dev,
struct hid_sensor_common *attrb)
{
if (atomic_read(&attrb->runtime_pm_enable))
pm_runtime_disable(&attrb->pdev->dev);
pm_runtime_set_suspended(&attrb->pdev->dev);
cancel_work_sync(&attrb->work);
iio_trigger_unregister(attrb->trigger);
iio_trigger_free(attrb->trigger);
iio_triggered_buffer_cleanup(indio_dev);
}
EXPORT_SYMBOL_NS(hid_sensor_remove_trigger, IIO_HID);
static const struct iio_trigger_ops hid_sensor_trigger_ops = {
.set_trigger_state = &hid_sensor_data_rdy_trigger_set_state,
};
int hid_sensor_setup_trigger(struct iio_dev *indio_dev, const char *name,
struct hid_sensor_common *attrb)
{
const struct iio_dev_attr **fifo_attrs;
int ret;
struct iio_trigger *trig;
if (hid_sensor_batch_mode_supported(attrb))
fifo_attrs = hid_sensor_fifo_attributes;
else
fifo_attrs = NULL;
ret = iio_triggered_buffer_setup_ext(indio_dev,
&iio_pollfunc_store_time, NULL,
IIO_BUFFER_DIRECTION_IN,
NULL, fifo_attrs);
if (ret) {
dev_err(&indio_dev->dev, "Triggered Buffer Setup Failed\n");
return ret;
}
trig = iio_trigger_alloc(indio_dev->dev.parent,
"%s-dev%d", name, iio_device_id(indio_dev));
if (trig == NULL) {
dev_err(&indio_dev->dev, "Trigger Allocate Failed\n");
ret = -ENOMEM;
goto error_triggered_buffer_cleanup;
}
iio_trigger_set_drvdata(trig, attrb);
trig->ops = &hid_sensor_trigger_ops;
ret = iio_trigger_register(trig);
if (ret) {
dev_err(&indio_dev->dev, "Trigger Register Failed\n");
goto error_free_trig;
}
attrb->trigger = trig;
indio_dev->trig = iio_trigger_get(trig);
ret = pm_runtime_set_active(&indio_dev->dev);
if (ret)
goto error_unreg_trigger;
iio_device_set_drvdata(indio_dev, attrb);
INIT_WORK(&attrb->work, hid_sensor_set_power_work);
pm_suspend_ignore_children(&attrb->pdev->dev, true);
/* Default to 3 seconds, but can be changed from sysfs */
pm_runtime_set_autosuspend_delay(&attrb->pdev->dev,
3000);
return ret;
error_unreg_trigger:
iio_trigger_unregister(trig);
error_free_trig:
iio_trigger_free(trig);
error_triggered_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
return ret;
}
EXPORT_SYMBOL_NS(hid_sensor_setup_trigger, IIO_HID);
static int __maybe_unused hid_sensor_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct hid_sensor_common *attrb = iio_device_get_drvdata(indio_dev);
return _hid_sensor_power_state(attrb, false);
}
static int __maybe_unused hid_sensor_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct hid_sensor_common *attrb = iio_device_get_drvdata(indio_dev);
schedule_work(&attrb->work);
return 0;
}
static int __maybe_unused hid_sensor_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct hid_sensor_common *attrb = iio_device_get_drvdata(indio_dev);
return _hid_sensor_power_state(attrb, true);
}
const struct dev_pm_ops hid_sensor_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(hid_sensor_suspend, hid_sensor_resume)
SET_RUNTIME_PM_OPS(hid_sensor_suspend,
hid_sensor_runtime_resume, NULL)
};
EXPORT_SYMBOL_NS(hid_sensor_pm_ops, IIO_HID);
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_DESCRIPTION("HID Sensor trigger processing");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_HID_ATTRIBUTES);
| linux-master | drivers/iio/common/hid-sensors/hid-sensor-trigger.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* mag3110.c - Support for Freescale MAG3110 magnetometer sensor
*
* Copyright (c) 2013 Peter Meerwald <[email protected]>
*
* (7-bit I2C slave address 0x0e)
*
* TODO: irq, user offset, oversampling, continuous mode
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/delay.h>
#include <linux/regulator/consumer.h>
#define MAG3110_STATUS 0x00
#define MAG3110_OUT_X 0x01 /* MSB first */
#define MAG3110_OUT_Y 0x03
#define MAG3110_OUT_Z 0x05
#define MAG3110_WHO_AM_I 0x07
#define MAG3110_SYSMOD 0x08
#define MAG3110_OFF_X 0x09 /* MSB first */
#define MAG3110_OFF_Y 0x0b
#define MAG3110_OFF_Z 0x0d
#define MAG3110_DIE_TEMP 0x0f
#define MAG3110_CTRL_REG1 0x10
#define MAG3110_CTRL_REG2 0x11
#define MAG3110_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
#define MAG3110_CTRL_DR_MASK (BIT(7) | BIT(6) | BIT(5))
#define MAG3110_CTRL_DR_SHIFT 5
#define MAG3110_CTRL_DR_DEFAULT 0
#define MAG3110_SYSMOD_MODE_MASK GENMASK(1, 0)
#define MAG3110_CTRL_TM BIT(1) /* trigger single measurement */
#define MAG3110_CTRL_AC BIT(0) /* continuous measurements */
#define MAG3110_CTRL_AUTO_MRST_EN BIT(7) /* magnetic auto-reset */
#define MAG3110_CTRL_RAW BIT(5) /* measurements not user-offset corrected */
#define MAG3110_DEVICE_ID 0xc4
/* Each client has this additional data */
struct mag3110_data {
struct i2c_client *client;
struct mutex lock;
u8 ctrl_reg1;
int sleep_val;
struct regulator *vdd_reg;
struct regulator *vddio_reg;
/* Ensure natural alignment of timestamp */
struct {
__be16 channels[3];
u8 temperature;
s64 ts __aligned(8);
} scan;
};
static int mag3110_request(struct mag3110_data *data)
{
int ret, tries = 150;
if ((data->ctrl_reg1 & MAG3110_CTRL_AC) == 0) {
/* trigger measurement */
ret = i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
data->ctrl_reg1 | MAG3110_CTRL_TM);
if (ret < 0)
return ret;
}
while (tries-- > 0) {
ret = i2c_smbus_read_byte_data(data->client, MAG3110_STATUS);
if (ret < 0)
return ret;
/* wait for data ready */
if ((ret & MAG3110_STATUS_DRDY) == MAG3110_STATUS_DRDY)
break;
if (data->sleep_val <= 20)
usleep_range(data->sleep_val * 250, data->sleep_val * 500);
else
msleep(20);
}
if (tries < 0) {
dev_err(&data->client->dev, "data not ready\n");
return -EIO;
}
return 0;
}
static int mag3110_read(struct mag3110_data *data, __be16 buf[3])
{
int ret;
mutex_lock(&data->lock);
ret = mag3110_request(data);
if (ret < 0) {
mutex_unlock(&data->lock);
return ret;
}
ret = i2c_smbus_read_i2c_block_data(data->client,
MAG3110_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
mutex_unlock(&data->lock);
return ret;
}
static ssize_t mag3110_show_int_plus_micros(char *buf,
const int (*vals)[2], int n)
{
size_t len = 0;
while (n-- > 0)
len += scnprintf(buf + len, PAGE_SIZE - len,
"%d.%06d ", vals[n][0], vals[n][1]);
/* replace trailing space by newline */
buf[len - 1] = '\n';
return len;
}
static int mag3110_get_int_plus_micros_index(const int (*vals)[2], int n,
int val, int val2)
{
while (n-- > 0)
if (val == vals[n][0] && val2 == vals[n][1])
return n;
return -EINVAL;
}
static const int mag3110_samp_freq[8][2] = {
{80, 0}, {40, 0}, {20, 0}, {10, 0}, {5, 0}, {2, 500000},
{1, 250000}, {0, 625000}
};
static ssize_t mag3110_show_samp_freq_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
return mag3110_show_int_plus_micros(buf, mag3110_samp_freq, 8);
}
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mag3110_show_samp_freq_avail);
static int mag3110_get_samp_freq_index(struct mag3110_data *data,
int val, int val2)
{
return mag3110_get_int_plus_micros_index(mag3110_samp_freq, 8, val,
val2);
}
static int mag3110_calculate_sleep(struct mag3110_data *data)
{
int ret, i = data->ctrl_reg1 >> MAG3110_CTRL_DR_SHIFT;
if (mag3110_samp_freq[i][0] > 0)
ret = 1000 / mag3110_samp_freq[i][0];
else
ret = 1000;
return ret == 0 ? 1 : ret;
}
static int mag3110_standby(struct mag3110_data *data)
{
return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
data->ctrl_reg1 & ~MAG3110_CTRL_AC);
}
static int mag3110_wait_standby(struct mag3110_data *data)
{
int ret, tries = 30;
/*
* Takes up to 1/ODR to come out of active mode into stby
* Longest expected period is 12.5seconds.
* We'll sleep for 500ms between checks
*/
while (tries-- > 0) {
ret = i2c_smbus_read_byte_data(data->client, MAG3110_SYSMOD);
if (ret < 0) {
dev_err(&data->client->dev, "i2c error\n");
return ret;
}
/* wait for standby */
if ((ret & MAG3110_SYSMOD_MODE_MASK) == 0)
break;
msleep_interruptible(500);
}
if (tries < 0) {
dev_err(&data->client->dev, "device not entering standby mode\n");
return -EIO;
}
return 0;
}
static int mag3110_active(struct mag3110_data *data)
{
return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
data->ctrl_reg1);
}
/* returns >0 if active, 0 if in standby and <0 on error */
static int mag3110_is_active(struct mag3110_data *data)
{
int reg;
reg = i2c_smbus_read_byte_data(data->client, MAG3110_CTRL_REG1);
if (reg < 0)
return reg;
return reg & MAG3110_CTRL_AC;
}
static int mag3110_change_config(struct mag3110_data *data, u8 reg, u8 val)
{
int ret;
int is_active;
mutex_lock(&data->lock);
is_active = mag3110_is_active(data);
if (is_active < 0) {
ret = is_active;
goto fail;
}
/* config can only be changed when in standby */
if (is_active > 0) {
ret = mag3110_standby(data);
if (ret < 0)
goto fail;
}
/*
* After coming out of active we must wait for the part
* to transition to STBY. This can take up to 1 /ODR to occur
*/
ret = mag3110_wait_standby(data);
if (ret < 0)
goto fail;
ret = i2c_smbus_write_byte_data(data->client, reg, val);
if (ret < 0)
goto fail;
if (is_active > 0) {
ret = mag3110_active(data);
if (ret < 0)
goto fail;
}
ret = 0;
fail:
mutex_unlock(&data->lock);
return ret;
}
static int mag3110_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mag3110_data *data = iio_priv(indio_dev);
__be16 buffer[3];
int i, ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
switch (chan->type) {
case IIO_MAGN: /* in 0.1 uT / LSB */
ret = mag3110_read(data, buffer);
if (ret < 0)
goto release;
*val = sign_extend32(
be16_to_cpu(buffer[chan->scan_index]),
chan->scan_type.realbits - 1);
ret = IIO_VAL_INT;
break;
case IIO_TEMP: /* in 1 C / LSB */
mutex_lock(&data->lock);
ret = mag3110_request(data);
if (ret < 0) {
mutex_unlock(&data->lock);
goto release;
}
ret = i2c_smbus_read_byte_data(data->client,
MAG3110_DIE_TEMP);
mutex_unlock(&data->lock);
if (ret < 0)
goto release;
*val = sign_extend32(ret,
chan->scan_type.realbits - 1);
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
}
release:
iio_device_release_direct_mode(indio_dev);
return ret;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_MAGN:
*val = 0;
*val2 = 1000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = 1000;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
i = data->ctrl_reg1 >> MAG3110_CTRL_DR_SHIFT;
*val = mag3110_samp_freq[i][0];
*val2 = mag3110_samp_freq[i][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBBIAS:
ret = i2c_smbus_read_word_swapped(data->client,
MAG3110_OFF_X + 2 * chan->scan_index);
if (ret < 0)
return ret;
*val = sign_extend32(ret >> 1, 14);
return IIO_VAL_INT;
}
return -EINVAL;
}
static int mag3110_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct mag3110_data *data = iio_priv(indio_dev);
int rate, ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
rate = mag3110_get_samp_freq_index(data, val, val2);
if (rate < 0) {
ret = -EINVAL;
break;
}
data->ctrl_reg1 &= 0xff & ~MAG3110_CTRL_DR_MASK
& ~MAG3110_CTRL_AC;
data->ctrl_reg1 |= rate << MAG3110_CTRL_DR_SHIFT;
data->sleep_val = mag3110_calculate_sleep(data);
if (data->sleep_val < 40)
data->ctrl_reg1 |= MAG3110_CTRL_AC;
ret = mag3110_change_config(data, MAG3110_CTRL_REG1,
data->ctrl_reg1);
break;
case IIO_CHAN_INFO_CALIBBIAS:
if (val < -10000 || val > 10000) {
ret = -EINVAL;
break;
}
ret = i2c_smbus_write_word_swapped(data->client,
MAG3110_OFF_X + 2 * chan->scan_index, val << 1);
break;
default:
ret = -EINVAL;
break;
}
iio_device_release_direct_mode(indio_dev);
return ret;
}
static irqreturn_t mag3110_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct mag3110_data *data = iio_priv(indio_dev);
int ret;
ret = mag3110_read(data, data->scan.channels);
if (ret < 0)
goto done;
if (test_bit(3, indio_dev->active_scan_mask)) {
ret = i2c_smbus_read_byte_data(data->client,
MAG3110_DIE_TEMP);
if (ret < 0)
goto done;
data->scan.temperature = ret;
}
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
iio_get_time_ns(indio_dev));
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
#define MAG3110_CHANNEL(axis, idx) { \
.type = IIO_MAGN, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = idx, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec mag3110_channels[] = {
MAG3110_CHANNEL(X, 0),
MAG3110_CHANNEL(Y, 1),
MAG3110_CHANNEL(Z, 2),
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.scan_index = 3,
.scan_type = {
.sign = 's',
.realbits = 8,
.storagebits = 8,
},
},
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static struct attribute *mag3110_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
NULL
};
static const struct attribute_group mag3110_group = {
.attrs = mag3110_attributes,
};
static const struct iio_info mag3110_info = {
.attrs = &mag3110_group,
.read_raw = &mag3110_read_raw,
.write_raw = &mag3110_write_raw,
};
static const unsigned long mag3110_scan_masks[] = {0x7, 0xf, 0};
static int mag3110_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct mag3110_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->vdd_reg = devm_regulator_get(&client->dev, "vdd");
if (IS_ERR(data->vdd_reg))
return dev_err_probe(&client->dev, PTR_ERR(data->vdd_reg),
"failed to get VDD regulator!\n");
data->vddio_reg = devm_regulator_get(&client->dev, "vddio");
if (IS_ERR(data->vddio_reg))
return dev_err_probe(&client->dev, PTR_ERR(data->vddio_reg),
"failed to get VDDIO regulator!\n");
ret = regulator_enable(data->vdd_reg);
if (ret) {
dev_err(&client->dev, "failed to enable VDD regulator!\n");
return ret;
}
ret = regulator_enable(data->vddio_reg);
if (ret) {
dev_err(&client->dev, "failed to enable VDDIO regulator!\n");
goto disable_regulator_vdd;
}
ret = i2c_smbus_read_byte_data(client, MAG3110_WHO_AM_I);
if (ret < 0)
goto disable_regulators;
if (ret != MAG3110_DEVICE_ID) {
ret = -ENODEV;
goto disable_regulators;
}
data->client = client;
mutex_init(&data->lock);
i2c_set_clientdata(client, indio_dev);
indio_dev->info = &mag3110_info;
indio_dev->name = id->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mag3110_channels;
indio_dev->num_channels = ARRAY_SIZE(mag3110_channels);
indio_dev->available_scan_masks = mag3110_scan_masks;
data->ctrl_reg1 = MAG3110_CTRL_DR_DEFAULT << MAG3110_CTRL_DR_SHIFT;
data->sleep_val = mag3110_calculate_sleep(data);
if (data->sleep_val < 40)
data->ctrl_reg1 |= MAG3110_CTRL_AC;
ret = mag3110_change_config(data, MAG3110_CTRL_REG1, data->ctrl_reg1);
if (ret < 0)
goto disable_regulators;
ret = i2c_smbus_write_byte_data(client, MAG3110_CTRL_REG2,
MAG3110_CTRL_AUTO_MRST_EN);
if (ret < 0)
goto standby_on_error;
ret = iio_triggered_buffer_setup(indio_dev, NULL,
mag3110_trigger_handler, NULL);
if (ret < 0)
goto standby_on_error;
ret = iio_device_register(indio_dev);
if (ret < 0)
goto buffer_cleanup;
return 0;
buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
standby_on_error:
mag3110_standby(iio_priv(indio_dev));
disable_regulators:
regulator_disable(data->vddio_reg);
disable_regulator_vdd:
regulator_disable(data->vdd_reg);
return ret;
}
static void mag3110_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct mag3110_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
mag3110_standby(iio_priv(indio_dev));
regulator_disable(data->vddio_reg);
regulator_disable(data->vdd_reg);
}
static int mag3110_suspend(struct device *dev)
{
struct mag3110_data *data = iio_priv(i2c_get_clientdata(
to_i2c_client(dev)));
int ret;
ret = mag3110_standby(iio_priv(i2c_get_clientdata(
to_i2c_client(dev))));
if (ret)
return ret;
ret = regulator_disable(data->vddio_reg);
if (ret) {
dev_err(dev, "failed to disable VDDIO regulator\n");
return ret;
}
ret = regulator_disable(data->vdd_reg);
if (ret) {
dev_err(dev, "failed to disable VDD regulator\n");
return ret;
}
return 0;
}
static int mag3110_resume(struct device *dev)
{
struct mag3110_data *data = iio_priv(i2c_get_clientdata(
to_i2c_client(dev)));
int ret;
ret = regulator_enable(data->vdd_reg);
if (ret) {
dev_err(dev, "failed to enable VDD regulator\n");
return ret;
}
ret = regulator_enable(data->vddio_reg);
if (ret) {
dev_err(dev, "failed to enable VDDIO regulator\n");
regulator_disable(data->vdd_reg);
return ret;
}
return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
data->ctrl_reg1);
}
static DEFINE_SIMPLE_DEV_PM_OPS(mag3110_pm_ops, mag3110_suspend,
mag3110_resume);
static const struct i2c_device_id mag3110_id[] = {
{ "mag3110", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, mag3110_id);
static const struct of_device_id mag3110_of_match[] = {
{ .compatible = "fsl,mag3110" },
{ }
};
MODULE_DEVICE_TABLE(of, mag3110_of_match);
static struct i2c_driver mag3110_driver = {
.driver = {
.name = "mag3110",
.of_match_table = mag3110_of_match,
.pm = pm_sleep_ptr(&mag3110_pm_ops),
},
.probe = mag3110_probe,
.remove = mag3110_remove,
.id_table = mag3110_id,
};
module_i2c_driver(mag3110_driver);
MODULE_AUTHOR("Peter Meerwald <[email protected]>");
MODULE_DESCRIPTION("Freescale MAG3110 magnetometer driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/magnetometer/mag3110.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* 3-axis magnetometer driver support following SPI Bosch-Sensortec chips:
* - BMC150
* - BMC156
* - BMM150
*
* Copyright (c) 2016, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/spi/spi.h>
#include <linux/acpi.h>
#include <linux/regmap.h>
#include "bmc150_magn.h"
static int bmc150_magn_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init_spi(spi, &bmc150_magn_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
return bmc150_magn_probe(&spi->dev, regmap, spi->irq, id->name);
}
static void bmc150_magn_spi_remove(struct spi_device *spi)
{
bmc150_magn_remove(&spi->dev);
}
static const struct spi_device_id bmc150_magn_spi_id[] = {
{"bmc150_magn", 0},
{"bmc156_magn", 0},
{"bmm150_magn", 0},
{}
};
MODULE_DEVICE_TABLE(spi, bmc150_magn_spi_id);
static const struct acpi_device_id bmc150_magn_acpi_match[] = {
{"BMC150B", 0},
{"BMC156B", 0},
{"BMM150B", 0},
{},
};
MODULE_DEVICE_TABLE(acpi, bmc150_magn_acpi_match);
static struct spi_driver bmc150_magn_spi_driver = {
.probe = bmc150_magn_spi_probe,
.remove = bmc150_magn_spi_remove,
.id_table = bmc150_magn_spi_id,
.driver = {
.acpi_match_table = ACPI_PTR(bmc150_magn_acpi_match),
.name = "bmc150_magn_spi",
},
};
module_spi_driver(bmc150_magn_spi_driver);
MODULE_AUTHOR("Daniel Baluta <[email protected]");
MODULE_DESCRIPTION("BMC150 magnetometer SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_BMC150_MAGN);
| linux-master | drivers/iio/magnetometer/bmc150_magn_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2012, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/hid-sensor-hub.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include "../common/hid-sensors/hid-sensor-trigger.h"
enum magn_3d_channel {
CHANNEL_SCAN_INDEX_X,
CHANNEL_SCAN_INDEX_Y,
CHANNEL_SCAN_INDEX_Z,
CHANNEL_SCAN_INDEX_NORTH_MAGN_TILT_COMP,
CHANNEL_SCAN_INDEX_NORTH_TRUE_TILT_COMP,
CHANNEL_SCAN_INDEX_NORTH_MAGN,
CHANNEL_SCAN_INDEX_NORTH_TRUE,
CHANNEL_SCAN_INDEX_TIMESTAMP,
MAGN_3D_CHANNEL_MAX,
};
struct common_attributes {
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
};
struct magn_3d_state {
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common magn_flux_attributes;
struct hid_sensor_common rot_attributes;
struct hid_sensor_hub_attribute_info magn[MAGN_3D_CHANNEL_MAX];
/* dynamically sized array to hold sensor values */
u32 *iio_vals;
/* array of pointers to sensor value */
u32 *magn_val_addr[MAGN_3D_CHANNEL_MAX];
struct common_attributes magn_flux_attr;
struct common_attributes rot_attr;
s64 timestamp;
};
static const u32 magn_3d_addresses[MAGN_3D_CHANNEL_MAX] = {
HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS,
HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS,
HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS,
HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH,
HID_USAGE_SENSOR_ORIENT_COMP_TRUE_NORTH,
HID_USAGE_SENSOR_ORIENT_MAGN_NORTH,
HID_USAGE_SENSOR_ORIENT_TRUE_NORTH,
HID_USAGE_SENSOR_TIME_TIMESTAMP,
};
static const u32 magn_3d_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ORIENTATION,
HID_USAGE_SENSOR_ORIENT_MAGN_FLUX,
};
/* Channel definitions */
static const struct iio_chan_spec magn_3d_channels[] = {
{
.type = IIO_MAGN,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
}, {
.type = IIO_MAGN,
.modified = 1,
.channel2 = IIO_MOD_Y,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
}, {
.type = IIO_MAGN,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
}, {
.type = IIO_ROT,
.modified = 1,
.channel2 = IIO_MOD_NORTH_MAGN_TILT_COMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
}, {
.type = IIO_ROT,
.modified = 1,
.channel2 = IIO_MOD_NORTH_TRUE_TILT_COMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
}, {
.type = IIO_ROT,
.modified = 1,
.channel2 = IIO_MOD_NORTH_MAGN,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
}, {
.type = IIO_ROT,
.modified = 1,
.channel2 = IIO_MOD_NORTH_TRUE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
},
IIO_CHAN_SOFT_TIMESTAMP(7)
};
/* Adjust channel real bits based on report descriptor */
static void magn_3d_adjust_channel_bit_mask(struct iio_chan_spec *channels,
int channel, int size)
{
channels[channel].scan_type.sign = 's';
/* Real storage bits will change based on the report desc. */
channels[channel].scan_type.realbits = size * 8;
/* Maximum size of a sample to capture is u32 */
channels[channel].scan_type.storagebits = sizeof(u32) * 8;
}
/* Channel read_raw handler */
static int magn_3d_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct magn_3d_state *magn_state = iio_priv(indio_dev);
int report_id = -1;
u32 address;
int ret_type;
s32 min;
*val = 0;
*val2 = 0;
switch (mask) {
case IIO_CHAN_INFO_RAW:
hid_sensor_power_state(&magn_state->magn_flux_attributes, true);
report_id = magn_state->magn[chan->address].report_id;
min = magn_state->magn[chan->address].logical_minimum;
address = magn_3d_addresses[chan->address];
if (report_id >= 0)
*val = sensor_hub_input_attr_get_raw_value(
magn_state->magn_flux_attributes.hsdev,
HID_USAGE_SENSOR_COMPASS_3D, address,
report_id,
SENSOR_HUB_SYNC,
min < 0);
else {
*val = 0;
hid_sensor_power_state(
&magn_state->magn_flux_attributes,
false);
return -EINVAL;
}
hid_sensor_power_state(&magn_state->magn_flux_attributes,
false);
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_MAGN:
*val = magn_state->magn_flux_attr.scale_pre_decml;
*val2 = magn_state->magn_flux_attr.scale_post_decml;
ret_type = magn_state->magn_flux_attr.scale_precision;
break;
case IIO_ROT:
*val = magn_state->rot_attr.scale_pre_decml;
*val2 = magn_state->rot_attr.scale_post_decml;
ret_type = magn_state->rot_attr.scale_precision;
break;
default:
ret_type = -EINVAL;
}
break;
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_MAGN:
*val = magn_state->magn_flux_attr.value_offset;
ret_type = IIO_VAL_INT;
break;
case IIO_ROT:
*val = magn_state->rot_attr.value_offset;
ret_type = IIO_VAL_INT;
break;
default:
ret_type = -EINVAL;
}
break;
case IIO_CHAN_INFO_SAMP_FREQ:
ret_type = hid_sensor_read_samp_freq_value(
&magn_state->magn_flux_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
switch (chan->type) {
case IIO_MAGN:
ret_type = hid_sensor_read_raw_hyst_value(
&magn_state->magn_flux_attributes, val, val2);
break;
case IIO_ROT:
ret_type = hid_sensor_read_raw_hyst_value(
&magn_state->rot_attributes, val, val2);
break;
default:
ret_type = -EINVAL;
}
break;
default:
ret_type = -EINVAL;
break;
}
return ret_type;
}
/* Channel write_raw handler */
static int magn_3d_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct magn_3d_state *magn_state = iio_priv(indio_dev);
int ret = 0;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = hid_sensor_write_samp_freq_value(
&magn_state->magn_flux_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
switch (chan->type) {
case IIO_MAGN:
ret = hid_sensor_write_raw_hyst_value(
&magn_state->magn_flux_attributes, val, val2);
break;
case IIO_ROT:
ret = hid_sensor_write_raw_hyst_value(
&magn_state->rot_attributes, val, val2);
break;
default:
ret = -EINVAL;
}
break;
default:
ret = -EINVAL;
}
return ret;
}
static const struct iio_info magn_3d_info = {
.read_raw = &magn_3d_read_raw,
.write_raw = &magn_3d_write_raw,
};
/* Callback handler to send event after all samples are received and captured */
static int magn_3d_proc_event(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct magn_3d_state *magn_state = iio_priv(indio_dev);
dev_dbg(&indio_dev->dev, "magn_3d_proc_event\n");
if (atomic_read(&magn_state->magn_flux_attributes.data_ready)) {
if (!magn_state->timestamp)
magn_state->timestamp = iio_get_time_ns(indio_dev);
iio_push_to_buffers_with_timestamp(indio_dev,
magn_state->iio_vals,
magn_state->timestamp);
magn_state->timestamp = 0;
}
return 0;
}
/* Capture samples in local storage */
static int magn_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
size_t raw_len, char *raw_data,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct magn_3d_state *magn_state = iio_priv(indio_dev);
int offset;
int ret = 0;
u32 *iio_val = NULL;
switch (usage_id) {
case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS:
case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS:
case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS:
offset = (usage_id - HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS)
+ CHANNEL_SCAN_INDEX_X;
break;
case HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH:
case HID_USAGE_SENSOR_ORIENT_COMP_TRUE_NORTH:
case HID_USAGE_SENSOR_ORIENT_MAGN_NORTH:
case HID_USAGE_SENSOR_ORIENT_TRUE_NORTH:
offset = (usage_id - HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH)
+ CHANNEL_SCAN_INDEX_NORTH_MAGN_TILT_COMP;
break;
case HID_USAGE_SENSOR_TIME_TIMESTAMP:
magn_state->timestamp =
hid_sensor_convert_timestamp(&magn_state->magn_flux_attributes,
*(s64 *)raw_data);
return ret;
default:
return -EINVAL;
}
iio_val = magn_state->magn_val_addr[offset];
if (iio_val != NULL)
*iio_val = *((u32 *)raw_data);
else
ret = -EINVAL;
return ret;
}
/* Parse report which is specific to an usage id*/
static int magn_3d_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
struct iio_chan_spec **channels,
int *chan_count,
unsigned usage_id,
struct magn_3d_state *st)
{
int i;
int attr_count = 0;
struct iio_chan_spec *_channels;
/* Scan for each usage attribute supported */
for (i = 0; i < MAGN_3D_CHANNEL_MAX; i++) {
int status;
u32 address = magn_3d_addresses[i];
/* Check if usage attribute exists in the sensor hub device */
status = sensor_hub_input_get_attribute_info(hsdev,
HID_INPUT_REPORT,
usage_id,
address,
&(st->magn[i]));
if (!status)
attr_count++;
}
if (attr_count <= 0) {
dev_err(&pdev->dev,
"failed to find any supported usage attributes in report\n");
return -EINVAL;
}
dev_dbg(&pdev->dev, "magn_3d Found %d usage attributes\n",
attr_count);
dev_dbg(&pdev->dev, "magn_3d X: %x:%x Y: %x:%x Z: %x:%x\n",
st->magn[0].index,
st->magn[0].report_id,
st->magn[1].index, st->magn[1].report_id,
st->magn[2].index, st->magn[2].report_id);
/* Setup IIO channel array */
_channels = devm_kcalloc(&pdev->dev, attr_count,
sizeof(struct iio_chan_spec),
GFP_KERNEL);
if (!_channels) {
dev_err(&pdev->dev,
"failed to allocate space for iio channels\n");
return -ENOMEM;
}
/* attr_count include timestamp channel, and the iio_vals should be aligned to 8byte */
st->iio_vals = devm_kcalloc(&pdev->dev,
((attr_count + 1) % 2 + (attr_count + 1) / 2) * 2,
sizeof(u32), GFP_KERNEL);
if (!st->iio_vals) {
dev_err(&pdev->dev,
"failed to allocate space for iio values array\n");
return -ENOMEM;
}
for (i = 0, *chan_count = 0;
i < MAGN_3D_CHANNEL_MAX && *chan_count < attr_count;
i++){
if (st->magn[i].index >= 0) {
/* Setup IIO channel struct */
(_channels[*chan_count]) = magn_3d_channels[i];
(_channels[*chan_count]).scan_index = *chan_count;
(_channels[*chan_count]).address = i;
if (i != CHANNEL_SCAN_INDEX_TIMESTAMP) {
/* Set magn_val_addr to iio value address */
st->magn_val_addr[i] = &st->iio_vals[*chan_count];
magn_3d_adjust_channel_bit_mask(_channels,
*chan_count,
st->magn[i].size);
}
(*chan_count)++;
}
}
if (*chan_count <= 0) {
dev_err(&pdev->dev,
"failed to find any magnetic channels setup\n");
return -EINVAL;
}
*channels = _channels;
dev_dbg(&pdev->dev, "magn_3d Setup %d IIO channels\n",
*chan_count);
st->magn_flux_attr.scale_precision = hid_sensor_format_scale(
HID_USAGE_SENSOR_COMPASS_3D,
&st->magn[CHANNEL_SCAN_INDEX_X],
&st->magn_flux_attr.scale_pre_decml,
&st->magn_flux_attr.scale_post_decml);
st->rot_attr.scale_precision
= hid_sensor_format_scale(
HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH,
&st->magn[CHANNEL_SCAN_INDEX_NORTH_MAGN_TILT_COMP],
&st->rot_attr.scale_pre_decml,
&st->rot_attr.scale_post_decml);
if (st->rot_attributes.sensitivity.index < 0) {
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH,
&st->rot_attributes.sensitivity);
dev_dbg(&pdev->dev, "Sensitivity index:report %d:%d\n",
st->rot_attributes.sensitivity.index,
st->rot_attributes.sensitivity.report_id);
}
return 0;
}
/* Function to initialize the processing for usage id */
static int hid_magn_3d_probe(struct platform_device *pdev)
{
int ret = 0;
static char *name = "magn_3d";
struct iio_dev *indio_dev;
struct magn_3d_state *magn_state;
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
struct iio_chan_spec *channels;
int chan_count = 0;
indio_dev = devm_iio_device_alloc(&pdev->dev,
sizeof(struct magn_3d_state));
if (indio_dev == NULL)
return -ENOMEM;
platform_set_drvdata(pdev, indio_dev);
magn_state = iio_priv(indio_dev);
magn_state->magn_flux_attributes.hsdev = hsdev;
magn_state->magn_flux_attributes.pdev = pdev;
ret = hid_sensor_parse_common_attributes(hsdev,
HID_USAGE_SENSOR_COMPASS_3D,
&magn_state->magn_flux_attributes,
magn_3d_sensitivity_addresses,
ARRAY_SIZE(magn_3d_sensitivity_addresses));
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;
}
magn_state->rot_attributes = magn_state->magn_flux_attributes;
/* sensitivity of rot_attribute is not the same as magn_flux_attributes */
magn_state->rot_attributes.sensitivity.index = -1;
ret = magn_3d_parse_report(pdev, hsdev,
&channels, &chan_count,
HID_USAGE_SENSOR_COMPASS_3D, magn_state);
if (ret) {
dev_err(&pdev->dev, "failed to parse report\n");
return ret;
}
indio_dev->channels = channels;
indio_dev->num_channels = chan_count;
indio_dev->info = &magn_3d_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
atomic_set(&magn_state->magn_flux_attributes.data_ready, 0);
ret = hid_sensor_setup_trigger(indio_dev, name,
&magn_state->magn_flux_attributes);
if (ret < 0) {
dev_err(&pdev->dev, "trigger setup failed\n");
return ret;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&pdev->dev, "device register failed\n");
goto error_remove_trigger;
}
magn_state->callbacks.send_event = magn_3d_proc_event;
magn_state->callbacks.capture_sample = magn_3d_capture_sample;
magn_state->callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, HID_USAGE_SENSOR_COMPASS_3D,
&magn_state->callbacks);
if (ret < 0) {
dev_err(&pdev->dev, "callback reg failed\n");
goto error_iio_unreg;
}
return ret;
error_iio_unreg:
iio_device_unregister(indio_dev);
error_remove_trigger:
hid_sensor_remove_trigger(indio_dev, &magn_state->magn_flux_attributes);
return ret;
}
/* Function to deinitialize the processing for usage id */
static int hid_magn_3d_remove(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct magn_3d_state *magn_state = iio_priv(indio_dev);
sensor_hub_remove_callback(hsdev, HID_USAGE_SENSOR_COMPASS_3D);
iio_device_unregister(indio_dev);
hid_sensor_remove_trigger(indio_dev, &magn_state->magn_flux_attributes);
return 0;
}
static const struct platform_device_id hid_magn_3d_ids[] = {
{
/* Format: HID-SENSOR-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-200083",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, hid_magn_3d_ids);
static struct platform_driver hid_magn_3d_platform_driver = {
.id_table = hid_magn_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.pm = &hid_sensor_pm_ops,
},
.probe = hid_magn_3d_probe,
.remove = hid_magn_3d_remove,
};
module_platform_driver(hid_magn_3d_platform_driver);
MODULE_DESCRIPTION("HID Sensor Magnetometer 3D");
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_HID);
| linux-master | drivers/iio/magnetometer/hid-sensor-magn-3d.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* MMC35240 - MEMSIC 3-axis Magnetic Sensor
*
* Copyright (c) 2015, Intel Corporation.
*
* IIO driver for MMC35240 (7-bit I2C slave address 0x30).
*
* TODO: offset, ACPI, continuous measurement mode, PM
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/regmap.h>
#include <linux/acpi.h>
#include <linux/pm.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define MMC35240_DRV_NAME "mmc35240"
#define MMC35240_REGMAP_NAME "mmc35240_regmap"
#define MMC35240_REG_XOUT_L 0x00
#define MMC35240_REG_XOUT_H 0x01
#define MMC35240_REG_YOUT_L 0x02
#define MMC35240_REG_YOUT_H 0x03
#define MMC35240_REG_ZOUT_L 0x04
#define MMC35240_REG_ZOUT_H 0x05
#define MMC35240_REG_STATUS 0x06
#define MMC35240_REG_CTRL0 0x07
#define MMC35240_REG_CTRL1 0x08
#define MMC35240_REG_ID 0x20
#define MMC35240_STATUS_MEAS_DONE_BIT BIT(0)
#define MMC35240_CTRL0_REFILL_BIT BIT(7)
#define MMC35240_CTRL0_RESET_BIT BIT(6)
#define MMC35240_CTRL0_SET_BIT BIT(5)
#define MMC35240_CTRL0_CMM_BIT BIT(1)
#define MMC35240_CTRL0_TM_BIT BIT(0)
/* output resolution bits */
#define MMC35240_CTRL1_BW0_BIT BIT(0)
#define MMC35240_CTRL1_BW1_BIT BIT(1)
#define MMC35240_CTRL1_BW_MASK (MMC35240_CTRL1_BW0_BIT | \
MMC35240_CTRL1_BW1_BIT)
#define MMC35240_CTRL1_BW_SHIFT 0
#define MMC35240_WAIT_CHARGE_PUMP 50000 /* us */
#define MMC35240_WAIT_SET_RESET 1000 /* us */
/*
* Memsic OTP process code piece is put here for reference:
*
* #define OTP_CONVERT(REG) ((float)((REG) >=32 ? (32 - (REG)) : (REG)) * 0.006
* 1) For X axis, the COEFFICIENT is always 1.
* 2) For Y axis, the COEFFICIENT is as below:
* f_OTP_matrix[4] = OTP_CONVERT(((reg_data[1] & 0x03) << 4) |
* (reg_data[2] >> 4)) + 1.0;
* 3) For Z axis, the COEFFICIENT is as below:
* f_OTP_matrix[8] = (OTP_CONVERT(reg_data[3] & 0x3f) + 1) * 1.35;
* We implemented the OTP logic into driver.
*/
/* scale = 1000 here for Y otp */
#define MMC35240_OTP_CONVERT_Y(REG) (((REG) >= 32 ? (32 - (REG)) : (REG)) * 6)
/* 0.6 * 1.35 = 0.81, scale 10000 for Z otp */
#define MMC35240_OTP_CONVERT_Z(REG) (((REG) >= 32 ? (32 - (REG)) : (REG)) * 81)
#define MMC35240_X_COEFF(x) (x)
#define MMC35240_Y_COEFF(y) (y + 1000)
#define MMC35240_Z_COEFF(z) (z + 13500)
#define MMC35240_OTP_START_ADDR 0x1B
enum mmc35240_resolution {
MMC35240_16_BITS_SLOW = 0, /* 7.92 ms */
MMC35240_16_BITS_FAST, /* 4.08 ms */
MMC35240_14_BITS, /* 2.16 ms */
MMC35240_12_BITS, /* 1.20 ms */
};
enum mmc35240_axis {
AXIS_X = 0,
AXIS_Y,
AXIS_Z,
};
static const struct {
int sens[3]; /* sensitivity per X, Y, Z axis */
int nfo; /* null field output */
} mmc35240_props_table[] = {
/* 16 bits, 125Hz ODR */
{
{1024, 1024, 1024},
32768,
},
/* 16 bits, 250Hz ODR */
{
{1024, 1024, 770},
32768,
},
/* 14 bits, 450Hz ODR */
{
{256, 256, 193},
8192,
},
/* 12 bits, 800Hz ODR */
{
{64, 64, 48},
2048,
},
};
struct mmc35240_data {
struct i2c_client *client;
struct mutex mutex;
struct regmap *regmap;
enum mmc35240_resolution res;
/* OTP compensation */
int axis_coef[3];
int axis_scale[3];
};
static const struct {
int val;
int val2;
} mmc35240_samp_freq[] = { {1, 500000},
{13, 0},
{25, 0},
{50, 0} };
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1.5 13 25 50");
#define MMC35240_CHANNEL(_axis) { \
.type = IIO_MAGN, \
.modified = 1, \
.channel2 = IIO_MOD_ ## _axis, \
.address = AXIS_ ## _axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec mmc35240_channels[] = {
MMC35240_CHANNEL(X),
MMC35240_CHANNEL(Y),
MMC35240_CHANNEL(Z),
};
static struct attribute *mmc35240_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL
};
static const struct attribute_group mmc35240_attribute_group = {
.attrs = mmc35240_attributes,
};
static int mmc35240_get_samp_freq_index(struct mmc35240_data *data,
int val, int val2)
{
int i;
for (i = 0; i < ARRAY_SIZE(mmc35240_samp_freq); i++)
if (mmc35240_samp_freq[i].val == val &&
mmc35240_samp_freq[i].val2 == val2)
return i;
return -EINVAL;
}
static int mmc35240_hw_set(struct mmc35240_data *data, bool set)
{
int ret;
u8 coil_bit;
/*
* Recharge the capacitor at VCAP pin, requested to be issued
* before a SET/RESET command.
*/
ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL0,
MMC35240_CTRL0_REFILL_BIT,
MMC35240_CTRL0_REFILL_BIT);
if (ret < 0)
return ret;
usleep_range(MMC35240_WAIT_CHARGE_PUMP, MMC35240_WAIT_CHARGE_PUMP + 1);
if (set)
coil_bit = MMC35240_CTRL0_SET_BIT;
else
coil_bit = MMC35240_CTRL0_RESET_BIT;
return regmap_update_bits(data->regmap, MMC35240_REG_CTRL0,
coil_bit, coil_bit);
}
static int mmc35240_init(struct mmc35240_data *data)
{
int ret, y_convert, z_convert;
unsigned int reg_id;
u8 otp_data[6];
ret = regmap_read(data->regmap, MMC35240_REG_ID, ®_id);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading product id\n");
return ret;
}
dev_dbg(&data->client->dev, "MMC35240 chip id %x\n", reg_id);
/*
* make sure we restore sensor characteristics, by doing
* a SET/RESET sequence, the axis polarity being naturally
* aligned after RESET
*/
ret = mmc35240_hw_set(data, true);
if (ret < 0)
return ret;
usleep_range(MMC35240_WAIT_SET_RESET, MMC35240_WAIT_SET_RESET + 1);
ret = mmc35240_hw_set(data, false);
if (ret < 0)
return ret;
/* set default sampling frequency */
ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL1,
MMC35240_CTRL1_BW_MASK,
data->res << MMC35240_CTRL1_BW_SHIFT);
if (ret < 0)
return ret;
ret = regmap_bulk_read(data->regmap, MMC35240_OTP_START_ADDR,
otp_data, sizeof(otp_data));
if (ret < 0)
return ret;
y_convert = MMC35240_OTP_CONVERT_Y(((otp_data[1] & 0x03) << 4) |
(otp_data[2] >> 4));
z_convert = MMC35240_OTP_CONVERT_Z(otp_data[3] & 0x3f);
data->axis_coef[0] = MMC35240_X_COEFF(1);
data->axis_coef[1] = MMC35240_Y_COEFF(y_convert);
data->axis_coef[2] = MMC35240_Z_COEFF(z_convert);
data->axis_scale[0] = 1;
data->axis_scale[1] = 1000;
data->axis_scale[2] = 10000;
return 0;
}
static int mmc35240_take_measurement(struct mmc35240_data *data)
{
int ret, tries = 100;
unsigned int reg_status;
ret = regmap_write(data->regmap, MMC35240_REG_CTRL0,
MMC35240_CTRL0_TM_BIT);
if (ret < 0)
return ret;
while (tries-- > 0) {
ret = regmap_read(data->regmap, MMC35240_REG_STATUS,
®_status);
if (ret < 0)
return ret;
if (reg_status & MMC35240_STATUS_MEAS_DONE_BIT)
break;
/* minimum wait time to complete measurement is 10 ms */
usleep_range(10000, 11000);
}
if (tries < 0) {
dev_err(&data->client->dev, "data not ready\n");
return -EIO;
}
return 0;
}
static int mmc35240_read_measurement(struct mmc35240_data *data, __le16 buf[3])
{
int ret;
ret = mmc35240_take_measurement(data);
if (ret < 0)
return ret;
return regmap_bulk_read(data->regmap, MMC35240_REG_XOUT_L, buf,
3 * sizeof(__le16));
}
/**
* mmc35240_raw_to_mgauss - convert raw readings to milli gauss. Also apply
* compensation for output value.
*
* @data: device private data
* @index: axis index for which we want the conversion
* @buf: raw data to be converted, 2 bytes in little endian format
* @val: compensated output reading (unit is milli gauss)
*
* Returns: 0 in case of success, -EINVAL when @index is not valid
*/
static int mmc35240_raw_to_mgauss(struct mmc35240_data *data, int index,
__le16 buf[], int *val)
{
int raw[3];
int sens[3];
int nfo;
raw[AXIS_X] = le16_to_cpu(buf[AXIS_X]);
raw[AXIS_Y] = le16_to_cpu(buf[AXIS_Y]);
raw[AXIS_Z] = le16_to_cpu(buf[AXIS_Z]);
sens[AXIS_X] = mmc35240_props_table[data->res].sens[AXIS_X];
sens[AXIS_Y] = mmc35240_props_table[data->res].sens[AXIS_Y];
sens[AXIS_Z] = mmc35240_props_table[data->res].sens[AXIS_Z];
nfo = mmc35240_props_table[data->res].nfo;
switch (index) {
case AXIS_X:
*val = (raw[AXIS_X] - nfo) * 1000 / sens[AXIS_X];
break;
case AXIS_Y:
*val = (raw[AXIS_Y] - nfo) * 1000 / sens[AXIS_Y] -
(raw[AXIS_Z] - nfo) * 1000 / sens[AXIS_Z];
break;
case AXIS_Z:
*val = (raw[AXIS_Y] - nfo) * 1000 / sens[AXIS_Y] +
(raw[AXIS_Z] - nfo) * 1000 / sens[AXIS_Z];
break;
default:
return -EINVAL;
}
/* apply OTP compensation */
*val = (*val) * data->axis_coef[index] / data->axis_scale[index];
return 0;
}
static int mmc35240_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct mmc35240_data *data = iio_priv(indio_dev);
int ret, i;
unsigned int reg;
__le16 buf[3];
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&data->mutex);
ret = mmc35240_read_measurement(data, buf);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
ret = mmc35240_raw_to_mgauss(data, chan->address, buf, val);
if (ret < 0)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = 1000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&data->mutex);
ret = regmap_read(data->regmap, MMC35240_REG_CTRL1, ®);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
i = (reg & MMC35240_CTRL1_BW_MASK) >> MMC35240_CTRL1_BW_SHIFT;
if (i < 0 || i >= ARRAY_SIZE(mmc35240_samp_freq))
return -EINVAL;
*val = mmc35240_samp_freq[i].val;
*val2 = mmc35240_samp_freq[i].val2;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int mmc35240_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
struct mmc35240_data *data = iio_priv(indio_dev);
int i, ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
i = mmc35240_get_samp_freq_index(data, val, val2);
if (i < 0)
return -EINVAL;
mutex_lock(&data->mutex);
ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL1,
MMC35240_CTRL1_BW_MASK,
i << MMC35240_CTRL1_BW_SHIFT);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static const struct iio_info mmc35240_info = {
.read_raw = mmc35240_read_raw,
.write_raw = mmc35240_write_raw,
.attrs = &mmc35240_attribute_group,
};
static bool mmc35240_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MMC35240_REG_CTRL0:
case MMC35240_REG_CTRL1:
return true;
default:
return false;
}
}
static bool mmc35240_is_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MMC35240_REG_XOUT_L:
case MMC35240_REG_XOUT_H:
case MMC35240_REG_YOUT_L:
case MMC35240_REG_YOUT_H:
case MMC35240_REG_ZOUT_L:
case MMC35240_REG_ZOUT_H:
case MMC35240_REG_STATUS:
case MMC35240_REG_ID:
return true;
default:
return false;
}
}
static bool mmc35240_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MMC35240_REG_CTRL0:
case MMC35240_REG_CTRL1:
return false;
default:
return true;
}
}
static const struct reg_default mmc35240_reg_defaults[] = {
{ MMC35240_REG_CTRL0, 0x00 },
{ MMC35240_REG_CTRL1, 0x00 },
};
static const struct regmap_config mmc35240_regmap_config = {
.name = MMC35240_REGMAP_NAME,
.reg_bits = 8,
.val_bits = 8,
.max_register = MMC35240_REG_ID,
.cache_type = REGCACHE_FLAT,
.writeable_reg = mmc35240_is_writeable_reg,
.readable_reg = mmc35240_is_readable_reg,
.volatile_reg = mmc35240_is_volatile_reg,
.reg_defaults = mmc35240_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(mmc35240_reg_defaults),
};
static int mmc35240_probe(struct i2c_client *client)
{
struct mmc35240_data *data;
struct iio_dev *indio_dev;
struct regmap *regmap;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
regmap = devm_regmap_init_i2c(client, &mmc35240_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "regmap initialization failed\n");
return PTR_ERR(regmap);
}
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
data->regmap = regmap;
data->res = MMC35240_16_BITS_SLOW;
mutex_init(&data->mutex);
indio_dev->info = &mmc35240_info;
indio_dev->name = MMC35240_DRV_NAME;
indio_dev->channels = mmc35240_channels;
indio_dev->num_channels = ARRAY_SIZE(mmc35240_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
ret = mmc35240_init(data);
if (ret < 0) {
dev_err(&client->dev, "mmc35240 chip init failed\n");
return ret;
}
return devm_iio_device_register(&client->dev, indio_dev);
}
static int mmc35240_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mmc35240_data *data = iio_priv(indio_dev);
regcache_cache_only(data->regmap, true);
return 0;
}
static int mmc35240_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mmc35240_data *data = iio_priv(indio_dev);
int ret;
regcache_mark_dirty(data->regmap);
ret = regcache_sync_region(data->regmap, MMC35240_REG_CTRL0,
MMC35240_REG_CTRL1);
if (ret < 0)
dev_err(dev, "Failed to restore control registers\n");
regcache_cache_only(data->regmap, false);
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(mmc35240_pm_ops, mmc35240_suspend,
mmc35240_resume);
static const struct of_device_id mmc35240_of_match[] = {
{ .compatible = "memsic,mmc35240", },
{ }
};
MODULE_DEVICE_TABLE(of, mmc35240_of_match);
static const struct acpi_device_id mmc35240_acpi_match[] = {
{"MMC35240", 0},
{ },
};
MODULE_DEVICE_TABLE(acpi, mmc35240_acpi_match);
static const struct i2c_device_id mmc35240_id[] = {
{"mmc35240", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, mmc35240_id);
static struct i2c_driver mmc35240_driver = {
.driver = {
.name = MMC35240_DRV_NAME,
.of_match_table = mmc35240_of_match,
.pm = pm_sleep_ptr(&mmc35240_pm_ops),
.acpi_match_table = ACPI_PTR(mmc35240_acpi_match),
},
.probe = mmc35240_probe,
.id_table = mmc35240_id,
};
module_i2c_driver(mmc35240_driver);
MODULE_AUTHOR("Daniel Baluta <[email protected]>");
MODULE_DESCRIPTION("MEMSIC MMC35240 magnetic sensor driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/magnetometer/mmc35240.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics magnetometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/common/st_sensors.h>
#include "st_magn.h"
int st_magn_trig_set_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
return st_sensors_set_dataready_irq(indio_dev, state);
}
static int st_magn_buffer_postenable(struct iio_dev *indio_dev)
{
return st_sensors_set_enable(indio_dev, true);
}
static int st_magn_buffer_predisable(struct iio_dev *indio_dev)
{
return st_sensors_set_enable(indio_dev, false);
}
static const struct iio_buffer_setup_ops st_magn_buffer_setup_ops = {
.postenable = &st_magn_buffer_postenable,
.predisable = &st_magn_buffer_predisable,
};
int st_magn_allocate_ring(struct iio_dev *indio_dev)
{
return devm_iio_triggered_buffer_setup(indio_dev->dev.parent, indio_dev,
NULL, &st_sensors_trigger_handler, &st_magn_buffer_setup_ops);
}
| linux-master | drivers/iio/magnetometer/st_magn_buffer.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* A sensor driver for the magnetometer AK8975.
*
* Magnetic compass sensor driver for monitoring magnetic flux information.
*
* Copyright (c) 2010, NVIDIA Corporation.
*/
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
#include <linux/pm_runtime.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
/*
* Register definitions, as well as various shifts and masks to get at the
* individual fields of the registers.
*/
#define AK8975_REG_WIA 0x00
#define AK8975_DEVICE_ID 0x48
#define AK8975_REG_INFO 0x01
#define AK8975_REG_ST1 0x02
#define AK8975_REG_ST1_DRDY_SHIFT 0
#define AK8975_REG_ST1_DRDY_MASK (1 << AK8975_REG_ST1_DRDY_SHIFT)
#define AK8975_REG_HXL 0x03
#define AK8975_REG_HXH 0x04
#define AK8975_REG_HYL 0x05
#define AK8975_REG_HYH 0x06
#define AK8975_REG_HZL 0x07
#define AK8975_REG_HZH 0x08
#define AK8975_REG_ST2 0x09
#define AK8975_REG_ST2_DERR_SHIFT 2
#define AK8975_REG_ST2_DERR_MASK (1 << AK8975_REG_ST2_DERR_SHIFT)
#define AK8975_REG_ST2_HOFL_SHIFT 3
#define AK8975_REG_ST2_HOFL_MASK (1 << AK8975_REG_ST2_HOFL_SHIFT)
#define AK8975_REG_CNTL 0x0A
#define AK8975_REG_CNTL_MODE_SHIFT 0
#define AK8975_REG_CNTL_MODE_MASK (0xF << AK8975_REG_CNTL_MODE_SHIFT)
#define AK8975_REG_CNTL_MODE_POWER_DOWN 0x00
#define AK8975_REG_CNTL_MODE_ONCE 0x01
#define AK8975_REG_CNTL_MODE_SELF_TEST 0x08
#define AK8975_REG_CNTL_MODE_FUSE_ROM 0x0F
#define AK8975_REG_RSVC 0x0B
#define AK8975_REG_ASTC 0x0C
#define AK8975_REG_TS1 0x0D
#define AK8975_REG_TS2 0x0E
#define AK8975_REG_I2CDIS 0x0F
#define AK8975_REG_ASAX 0x10
#define AK8975_REG_ASAY 0x11
#define AK8975_REG_ASAZ 0x12
#define AK8975_MAX_REGS AK8975_REG_ASAZ
/*
* AK09912 Register definitions
*/
#define AK09912_REG_WIA1 0x00
#define AK09912_REG_WIA2 0x01
#define AK09916_DEVICE_ID 0x09
#define AK09912_DEVICE_ID 0x04
#define AK09911_DEVICE_ID 0x05
#define AK09911_REG_INFO1 0x02
#define AK09911_REG_INFO2 0x03
#define AK09912_REG_ST1 0x10
#define AK09912_REG_ST1_DRDY_SHIFT 0
#define AK09912_REG_ST1_DRDY_MASK (1 << AK09912_REG_ST1_DRDY_SHIFT)
#define AK09912_REG_HXL 0x11
#define AK09912_REG_HXH 0x12
#define AK09912_REG_HYL 0x13
#define AK09912_REG_HYH 0x14
#define AK09912_REG_HZL 0x15
#define AK09912_REG_HZH 0x16
#define AK09912_REG_TMPS 0x17
#define AK09912_REG_ST2 0x18
#define AK09912_REG_ST2_HOFL_SHIFT 3
#define AK09912_REG_ST2_HOFL_MASK (1 << AK09912_REG_ST2_HOFL_SHIFT)
#define AK09912_REG_CNTL1 0x30
#define AK09912_REG_CNTL2 0x31
#define AK09912_REG_CNTL_MODE_POWER_DOWN 0x00
#define AK09912_REG_CNTL_MODE_ONCE 0x01
#define AK09912_REG_CNTL_MODE_SELF_TEST 0x10
#define AK09912_REG_CNTL_MODE_FUSE_ROM 0x1F
#define AK09912_REG_CNTL2_MODE_SHIFT 0
#define AK09912_REG_CNTL2_MODE_MASK (0x1F << AK09912_REG_CNTL2_MODE_SHIFT)
#define AK09912_REG_CNTL3 0x32
#define AK09912_REG_TS1 0x33
#define AK09912_REG_TS2 0x34
#define AK09912_REG_TS3 0x35
#define AK09912_REG_I2CDIS 0x36
#define AK09912_REG_TS4 0x37
#define AK09912_REG_ASAX 0x60
#define AK09912_REG_ASAY 0x61
#define AK09912_REG_ASAZ 0x62
#define AK09912_MAX_REGS AK09912_REG_ASAZ
/*
* Miscellaneous values.
*/
#define AK8975_MAX_CONVERSION_TIMEOUT 500
#define AK8975_CONVERSION_DONE_POLL_TIME 10
#define AK8975_DATA_READY_TIMEOUT ((100*HZ)/1000)
/*
* Precalculate scale factor (in Gauss units) for each axis and
* store in the device data.
*
* This scale factor is axis-dependent, and is derived from 3 calibration
* factors ASA(x), ASA(y), and ASA(z).
*
* These ASA values are read from the sensor device at start of day, and
* cached in the device context struct.
*
* Adjusting the flux value with the sensitivity adjustment value should be
* done via the following formula:
*
* Hadj = H * ( ( ( (ASA-128)*0.5 ) / 128 ) + 1 )
* where H is the raw value, ASA is the sensitivity adjustment, and Hadj
* is the resultant adjusted value.
*
* We reduce the formula to:
*
* Hadj = H * (ASA + 128) / 256
*
* H is in the range of -4096 to 4095. The magnetometer has a range of
* +-1229uT. To go from the raw value to uT is:
*
* HuT = H * 1229/4096, or roughly, 3/10.
*
* Since 1uT = 0.01 gauss, our final scale factor becomes:
*
* Hadj = H * ((ASA + 128) / 256) * 3/10 * 1/100
* Hadj = H * ((ASA + 128) * 0.003) / 256
*
* Since ASA doesn't change, we cache the resultant scale factor into the
* device context in ak8975_setup().
*
* Given we use IIO_VAL_INT_PLUS_MICRO bit when displaying the scale, we
* multiply the stored scale value by 1e6.
*/
static long ak8975_raw_to_gauss(u16 data)
{
return (((long)data + 128) * 3000) / 256;
}
/*
* For AK8963 and AK09911, same calculation, but the device is less sensitive:
*
* H is in the range of +-8190. The magnetometer has a range of
* +-4912uT. To go from the raw value to uT is:
*
* HuT = H * 4912/8190, or roughly, 6/10, instead of 3/10.
*/
static long ak8963_09911_raw_to_gauss(u16 data)
{
return (((long)data + 128) * 6000) / 256;
}
/*
* For AK09912, same calculation, except the device is more sensitive:
*
* H is in the range of -32752 to 32752. The magnetometer has a range of
* +-4912uT. To go from the raw value to uT is:
*
* HuT = H * 4912/32752, or roughly, 3/20, instead of 3/10.
*/
static long ak09912_raw_to_gauss(u16 data)
{
return (((long)data + 128) * 1500) / 256;
}
/* Compatible Asahi Kasei Compass parts */
enum asahi_compass_chipset {
AKXXXX = 0,
AK8975,
AK8963,
AK09911,
AK09912,
AK09916,
};
enum ak_ctrl_reg_addr {
ST1,
ST2,
CNTL,
ASA_BASE,
MAX_REGS,
REGS_END,
};
enum ak_ctrl_reg_mask {
ST1_DRDY,
ST2_HOFL,
ST2_DERR,
CNTL_MODE,
MASK_END,
};
enum ak_ctrl_mode {
POWER_DOWN,
MODE_ONCE,
SELF_TEST,
FUSE_ROM,
MODE_END,
};
struct ak_def {
enum asahi_compass_chipset type;
long (*raw_to_gauss)(u16 data);
u16 range;
u8 ctrl_regs[REGS_END];
u8 ctrl_masks[MASK_END];
u8 ctrl_modes[MODE_END];
u8 data_regs[3];
};
static const struct ak_def ak_def_array[] = {
{
.type = AK8975,
.raw_to_gauss = ak8975_raw_to_gauss,
.range = 4096,
.ctrl_regs = {
AK8975_REG_ST1,
AK8975_REG_ST2,
AK8975_REG_CNTL,
AK8975_REG_ASAX,
AK8975_MAX_REGS},
.ctrl_masks = {
AK8975_REG_ST1_DRDY_MASK,
AK8975_REG_ST2_HOFL_MASK,
AK8975_REG_ST2_DERR_MASK,
AK8975_REG_CNTL_MODE_MASK},
.ctrl_modes = {
AK8975_REG_CNTL_MODE_POWER_DOWN,
AK8975_REG_CNTL_MODE_ONCE,
AK8975_REG_CNTL_MODE_SELF_TEST,
AK8975_REG_CNTL_MODE_FUSE_ROM},
.data_regs = {
AK8975_REG_HXL,
AK8975_REG_HYL,
AK8975_REG_HZL},
},
{
.type = AK8963,
.raw_to_gauss = ak8963_09911_raw_to_gauss,
.range = 8190,
.ctrl_regs = {
AK8975_REG_ST1,
AK8975_REG_ST2,
AK8975_REG_CNTL,
AK8975_REG_ASAX,
AK8975_MAX_REGS},
.ctrl_masks = {
AK8975_REG_ST1_DRDY_MASK,
AK8975_REG_ST2_HOFL_MASK,
0,
AK8975_REG_CNTL_MODE_MASK},
.ctrl_modes = {
AK8975_REG_CNTL_MODE_POWER_DOWN,
AK8975_REG_CNTL_MODE_ONCE,
AK8975_REG_CNTL_MODE_SELF_TEST,
AK8975_REG_CNTL_MODE_FUSE_ROM},
.data_regs = {
AK8975_REG_HXL,
AK8975_REG_HYL,
AK8975_REG_HZL},
},
{
.type = AK09911,
.raw_to_gauss = ak8963_09911_raw_to_gauss,
.range = 8192,
.ctrl_regs = {
AK09912_REG_ST1,
AK09912_REG_ST2,
AK09912_REG_CNTL2,
AK09912_REG_ASAX,
AK09912_MAX_REGS},
.ctrl_masks = {
AK09912_REG_ST1_DRDY_MASK,
AK09912_REG_ST2_HOFL_MASK,
0,
AK09912_REG_CNTL2_MODE_MASK},
.ctrl_modes = {
AK09912_REG_CNTL_MODE_POWER_DOWN,
AK09912_REG_CNTL_MODE_ONCE,
AK09912_REG_CNTL_MODE_SELF_TEST,
AK09912_REG_CNTL_MODE_FUSE_ROM},
.data_regs = {
AK09912_REG_HXL,
AK09912_REG_HYL,
AK09912_REG_HZL},
},
{
.type = AK09912,
.raw_to_gauss = ak09912_raw_to_gauss,
.range = 32752,
.ctrl_regs = {
AK09912_REG_ST1,
AK09912_REG_ST2,
AK09912_REG_CNTL2,
AK09912_REG_ASAX,
AK09912_MAX_REGS},
.ctrl_masks = {
AK09912_REG_ST1_DRDY_MASK,
AK09912_REG_ST2_HOFL_MASK,
0,
AK09912_REG_CNTL2_MODE_MASK},
.ctrl_modes = {
AK09912_REG_CNTL_MODE_POWER_DOWN,
AK09912_REG_CNTL_MODE_ONCE,
AK09912_REG_CNTL_MODE_SELF_TEST,
AK09912_REG_CNTL_MODE_FUSE_ROM},
.data_regs = {
AK09912_REG_HXL,
AK09912_REG_HYL,
AK09912_REG_HZL},
},
{
.type = AK09916,
.raw_to_gauss = ak09912_raw_to_gauss,
.range = 32752,
.ctrl_regs = {
AK09912_REG_ST1,
AK09912_REG_ST2,
AK09912_REG_CNTL2,
AK09912_REG_ASAX,
AK09912_MAX_REGS},
.ctrl_masks = {
AK09912_REG_ST1_DRDY_MASK,
AK09912_REG_ST2_HOFL_MASK,
0,
AK09912_REG_CNTL2_MODE_MASK},
.ctrl_modes = {
AK09912_REG_CNTL_MODE_POWER_DOWN,
AK09912_REG_CNTL_MODE_ONCE,
AK09912_REG_CNTL_MODE_SELF_TEST,
AK09912_REG_CNTL_MODE_FUSE_ROM},
.data_regs = {
AK09912_REG_HXL,
AK09912_REG_HYL,
AK09912_REG_HZL},
}
};
/*
* Per-instance context data for the device.
*/
struct ak8975_data {
struct i2c_client *client;
const struct ak_def *def;
struct mutex lock;
u8 asa[3];
long raw_to_gauss[3];
struct gpio_desc *eoc_gpiod;
struct gpio_desc *reset_gpiod;
int eoc_irq;
wait_queue_head_t data_ready_queue;
unsigned long flags;
u8 cntl_cache;
struct iio_mount_matrix orientation;
struct regulator *vdd;
struct regulator *vid;
/* Ensure natural alignment of timestamp */
struct {
s16 channels[3];
s64 ts __aligned(8);
} scan;
};
/* Enable attached power regulator if any. */
static int ak8975_power_on(const struct ak8975_data *data)
{
int ret;
ret = regulator_enable(data->vdd);
if (ret) {
dev_warn(&data->client->dev,
"Failed to enable specified Vdd supply\n");
return ret;
}
ret = regulator_enable(data->vid);
if (ret) {
dev_warn(&data->client->dev,
"Failed to enable specified Vid supply\n");
regulator_disable(data->vdd);
return ret;
}
gpiod_set_value_cansleep(data->reset_gpiod, 0);
/*
* According to the datasheet the power supply rise time is 200us
* and the minimum wait time before mode setting is 100us, in
* total 300us. Add some margin and say minimum 500us here.
*/
usleep_range(500, 1000);
return 0;
}
/* Disable attached power regulator if any. */
static void ak8975_power_off(const struct ak8975_data *data)
{
gpiod_set_value_cansleep(data->reset_gpiod, 1);
regulator_disable(data->vid);
regulator_disable(data->vdd);
}
/*
* Return 0 if the i2c device is the one we expect.
* return a negative error number otherwise
*/
static int ak8975_who_i_am(struct i2c_client *client,
enum asahi_compass_chipset type)
{
u8 wia_val[2];
int ret;
/*
* Signature for each device:
* Device | WIA1 | WIA2
* AK09916 | DEVICE_ID_| AK09916_DEVICE_ID
* AK09912 | DEVICE_ID | AK09912_DEVICE_ID
* AK09911 | DEVICE_ID | AK09911_DEVICE_ID
* AK8975 | DEVICE_ID | NA
* AK8963 | DEVICE_ID | NA
*/
ret = i2c_smbus_read_i2c_block_data_or_emulated(
client, AK09912_REG_WIA1, 2, wia_val);
if (ret < 0) {
dev_err(&client->dev, "Error reading WIA\n");
return ret;
}
if (wia_val[0] != AK8975_DEVICE_ID)
return -ENODEV;
switch (type) {
case AK8975:
case AK8963:
return 0;
case AK09911:
if (wia_val[1] == AK09911_DEVICE_ID)
return 0;
break;
case AK09912:
if (wia_val[1] == AK09912_DEVICE_ID)
return 0;
break;
case AK09916:
if (wia_val[1] == AK09916_DEVICE_ID)
return 0;
break;
default:
dev_err(&client->dev, "Type %d unknown\n", type);
}
return -ENODEV;
}
/*
* Helper function to write to CNTL register.
*/
static int ak8975_set_mode(struct ak8975_data *data, enum ak_ctrl_mode mode)
{
u8 regval;
int ret;
regval = (data->cntl_cache & ~data->def->ctrl_masks[CNTL_MODE]) |
data->def->ctrl_modes[mode];
ret = i2c_smbus_write_byte_data(data->client,
data->def->ctrl_regs[CNTL], regval);
if (ret < 0) {
return ret;
}
data->cntl_cache = regval;
/* After mode change wait atleast 100us */
usleep_range(100, 500);
return 0;
}
/*
* Handle data ready irq
*/
static irqreturn_t ak8975_irq_handler(int irq, void *data)
{
struct ak8975_data *ak8975 = data;
set_bit(0, &ak8975->flags);
wake_up(&ak8975->data_ready_queue);
return IRQ_HANDLED;
}
/*
* Install data ready interrupt handler
*/
static int ak8975_setup_irq(struct ak8975_data *data)
{
struct i2c_client *client = data->client;
int rc;
int irq;
init_waitqueue_head(&data->data_ready_queue);
clear_bit(0, &data->flags);
if (client->irq)
irq = client->irq;
else
irq = gpiod_to_irq(data->eoc_gpiod);
rc = devm_request_irq(&client->dev, irq, ak8975_irq_handler,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
dev_name(&client->dev), data);
if (rc < 0) {
dev_err(&client->dev, "irq %d request failed: %d\n", irq, rc);
return rc;
}
data->eoc_irq = irq;
return rc;
}
/*
* Perform some start-of-day setup, including reading the asa calibration
* values and caching them.
*/
static int ak8975_setup(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct ak8975_data *data = iio_priv(indio_dev);
int ret;
/* Write the fused rom access mode. */
ret = ak8975_set_mode(data, FUSE_ROM);
if (ret < 0) {
dev_err(&client->dev, "Error in setting fuse access mode\n");
return ret;
}
/* Get asa data and store in the device data. */
ret = i2c_smbus_read_i2c_block_data_or_emulated(
client, data->def->ctrl_regs[ASA_BASE],
3, data->asa);
if (ret < 0) {
dev_err(&client->dev, "Not able to read asa data\n");
return ret;
}
/* After reading fuse ROM data set power-down mode */
ret = ak8975_set_mode(data, POWER_DOWN);
if (ret < 0) {
dev_err(&client->dev, "Error in setting power-down mode\n");
return ret;
}
if (data->eoc_gpiod || client->irq > 0) {
ret = ak8975_setup_irq(data);
if (ret < 0) {
dev_err(&client->dev,
"Error setting data ready interrupt\n");
return ret;
}
}
data->raw_to_gauss[0] = data->def->raw_to_gauss(data->asa[0]);
data->raw_to_gauss[1] = data->def->raw_to_gauss(data->asa[1]);
data->raw_to_gauss[2] = data->def->raw_to_gauss(data->asa[2]);
return 0;
}
static int wait_conversion_complete_gpio(struct ak8975_data *data)
{
struct i2c_client *client = data->client;
u32 timeout_ms = AK8975_MAX_CONVERSION_TIMEOUT;
int ret;
/* Wait for the conversion to complete. */
while (timeout_ms) {
msleep(AK8975_CONVERSION_DONE_POLL_TIME);
if (gpiod_get_value(data->eoc_gpiod))
break;
timeout_ms -= AK8975_CONVERSION_DONE_POLL_TIME;
}
if (!timeout_ms) {
dev_err(&client->dev, "Conversion timeout happened\n");
return -EINVAL;
}
ret = i2c_smbus_read_byte_data(client, data->def->ctrl_regs[ST1]);
if (ret < 0)
dev_err(&client->dev, "Error in reading ST1\n");
return ret;
}
static int wait_conversion_complete_polled(struct ak8975_data *data)
{
struct i2c_client *client = data->client;
u8 read_status;
u32 timeout_ms = AK8975_MAX_CONVERSION_TIMEOUT;
int ret;
/* Wait for the conversion to complete. */
while (timeout_ms) {
msleep(AK8975_CONVERSION_DONE_POLL_TIME);
ret = i2c_smbus_read_byte_data(client,
data->def->ctrl_regs[ST1]);
if (ret < 0) {
dev_err(&client->dev, "Error in reading ST1\n");
return ret;
}
read_status = ret;
if (read_status)
break;
timeout_ms -= AK8975_CONVERSION_DONE_POLL_TIME;
}
if (!timeout_ms) {
dev_err(&client->dev, "Conversion timeout happened\n");
return -EINVAL;
}
return read_status;
}
/* Returns 0 if the end of conversion interrupt occured or -ETIME otherwise */
static int wait_conversion_complete_interrupt(struct ak8975_data *data)
{
int ret;
ret = wait_event_timeout(data->data_ready_queue,
test_bit(0, &data->flags),
AK8975_DATA_READY_TIMEOUT);
clear_bit(0, &data->flags);
return ret > 0 ? 0 : -ETIME;
}
static int ak8975_start_read_axis(struct ak8975_data *data,
const struct i2c_client *client)
{
/* Set up the device for taking a sample. */
int ret = ak8975_set_mode(data, MODE_ONCE);
if (ret < 0) {
dev_err(&client->dev, "Error in setting operating mode\n");
return ret;
}
/* Wait for the conversion to complete. */
if (data->eoc_irq)
ret = wait_conversion_complete_interrupt(data);
else if (data->eoc_gpiod)
ret = wait_conversion_complete_gpio(data);
else
ret = wait_conversion_complete_polled(data);
if (ret < 0)
return ret;
/* This will be executed only for non-interrupt based waiting case */
if (ret & data->def->ctrl_masks[ST1_DRDY]) {
ret = i2c_smbus_read_byte_data(client,
data->def->ctrl_regs[ST2]);
if (ret < 0) {
dev_err(&client->dev, "Error in reading ST2\n");
return ret;
}
if (ret & (data->def->ctrl_masks[ST2_DERR] |
data->def->ctrl_masks[ST2_HOFL])) {
dev_err(&client->dev, "ST2 status error 0x%x\n", ret);
return -EINVAL;
}
}
return 0;
}
/* Retrieve raw flux value for one of the x, y, or z axis. */
static int ak8975_read_axis(struct iio_dev *indio_dev, int index, int *val)
{
struct ak8975_data *data = iio_priv(indio_dev);
const struct i2c_client *client = data->client;
const struct ak_def *def = data->def;
__le16 rval;
u16 buff;
int ret;
pm_runtime_get_sync(&data->client->dev);
mutex_lock(&data->lock);
ret = ak8975_start_read_axis(data, client);
if (ret)
goto exit;
ret = i2c_smbus_read_i2c_block_data_or_emulated(
client, def->data_regs[index],
sizeof(rval), (u8*)&rval);
if (ret < 0)
goto exit;
mutex_unlock(&data->lock);
pm_runtime_mark_last_busy(&data->client->dev);
pm_runtime_put_autosuspend(&data->client->dev);
/* Swap bytes and convert to valid range. */
buff = le16_to_cpu(rval);
*val = clamp_t(s16, buff, -def->range, def->range);
return IIO_VAL_INT;
exit:
mutex_unlock(&data->lock);
dev_err(&client->dev, "Error in reading axis\n");
return ret;
}
static int ak8975_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct ak8975_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
return ak8975_read_axis(indio_dev, chan->address, val);
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = data->raw_to_gauss[chan->address];
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static const struct iio_mount_matrix *
ak8975_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct ak8975_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info ak8975_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, ak8975_get_mount_matrix),
{ }
};
#define AK8975_CHANNEL(axis, index) \
{ \
.type = IIO_MAGN, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE), \
.address = index, \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_CPU \
}, \
.ext_info = ak8975_ext_info, \
}
static const struct iio_chan_spec ak8975_channels[] = {
AK8975_CHANNEL(X, 0), AK8975_CHANNEL(Y, 1), AK8975_CHANNEL(Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const unsigned long ak8975_scan_masks[] = { 0x7, 0 };
static const struct iio_info ak8975_info = {
.read_raw = &ak8975_read_raw,
};
static const struct acpi_device_id ak_acpi_match[] = {
{"AK8975", AK8975},
{"AK8963", AK8963},
{"INVN6500", AK8963},
{"AK009911", AK09911},
{"AK09911", AK09911},
{"AKM9911", AK09911},
{"AK09912", AK09912},
{ }
};
MODULE_DEVICE_TABLE(acpi, ak_acpi_match);
static void ak8975_fill_buffer(struct iio_dev *indio_dev)
{
struct ak8975_data *data = iio_priv(indio_dev);
const struct i2c_client *client = data->client;
const struct ak_def *def = data->def;
int ret;
__le16 fval[3];
mutex_lock(&data->lock);
ret = ak8975_start_read_axis(data, client);
if (ret)
goto unlock;
/*
* For each axis, read the flux value from the appropriate register
* (the register is specified in the iio device attributes).
*/
ret = i2c_smbus_read_i2c_block_data_or_emulated(client,
def->data_regs[0],
3 * sizeof(fval[0]),
(u8 *)fval);
if (ret < 0)
goto unlock;
mutex_unlock(&data->lock);
/* Clamp to valid range. */
data->scan.channels[0] = clamp_t(s16, le16_to_cpu(fval[0]), -def->range, def->range);
data->scan.channels[1] = clamp_t(s16, le16_to_cpu(fval[1]), -def->range, def->range);
data->scan.channels[2] = clamp_t(s16, le16_to_cpu(fval[2]), -def->range, def->range);
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
iio_get_time_ns(indio_dev));
return;
unlock:
mutex_unlock(&data->lock);
dev_err(&client->dev, "Error in reading axes block\n");
}
static irqreturn_t ak8975_handle_trigger(int irq, void *p)
{
const struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
ak8975_fill_buffer(indio_dev);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int ak8975_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct ak8975_data *data;
struct iio_dev *indio_dev;
struct gpio_desc *eoc_gpiod;
struct gpio_desc *reset_gpiod;
const void *match;
unsigned int i;
int err;
enum asahi_compass_chipset chipset;
const char *name = NULL;
/*
* Grab and set up the supplied GPIO.
* We may not have a GPIO based IRQ to scan, that is fine, we will
* poll if so.
*/
eoc_gpiod = devm_gpiod_get_optional(&client->dev, NULL, GPIOD_IN);
if (IS_ERR(eoc_gpiod))
return PTR_ERR(eoc_gpiod);
if (eoc_gpiod)
gpiod_set_consumer_name(eoc_gpiod, "ak_8975");
/*
* According to AK09911 datasheet, if reset GPIO is provided then
* deassert reset on ak8975_power_on() and assert reset on
* ak8975_power_off().
*/
reset_gpiod = devm_gpiod_get_optional(&client->dev,
"reset", GPIOD_OUT_HIGH);
if (IS_ERR(reset_gpiod))
return PTR_ERR(reset_gpiod);
/* Register with IIO */
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (indio_dev == NULL)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
data->eoc_gpiod = eoc_gpiod;
data->reset_gpiod = reset_gpiod;
data->eoc_irq = 0;
err = iio_read_mount_matrix(&client->dev, &data->orientation);
if (err)
return err;
/* id will be NULL when enumerated via ACPI */
match = device_get_match_data(&client->dev);
if (match) {
chipset = (uintptr_t)match;
name = dev_name(&client->dev);
} else if (id) {
chipset = (enum asahi_compass_chipset)(id->driver_data);
name = id->name;
} else
return -ENOSYS;
for (i = 0; i < ARRAY_SIZE(ak_def_array); i++)
if (ak_def_array[i].type == chipset)
break;
if (i == ARRAY_SIZE(ak_def_array)) {
dev_err(&client->dev, "AKM device type unsupported: %d\n",
chipset);
return -ENODEV;
}
data->def = &ak_def_array[i];
/* Fetch the regulators */
data->vdd = devm_regulator_get(&client->dev, "vdd");
if (IS_ERR(data->vdd))
return PTR_ERR(data->vdd);
data->vid = devm_regulator_get(&client->dev, "vid");
if (IS_ERR(data->vid))
return PTR_ERR(data->vid);
err = ak8975_power_on(data);
if (err)
return err;
err = ak8975_who_i_am(client, data->def->type);
if (err < 0) {
dev_err(&client->dev, "Unexpected device\n");
goto power_off;
}
dev_dbg(&client->dev, "Asahi compass chip %s\n", name);
/* Perform some basic start-of-day setup of the device. */
err = ak8975_setup(client);
if (err < 0) {
dev_err(&client->dev, "%s initialization fails\n", name);
goto power_off;
}
mutex_init(&data->lock);
indio_dev->channels = ak8975_channels;
indio_dev->num_channels = ARRAY_SIZE(ak8975_channels);
indio_dev->info = &ak8975_info;
indio_dev->available_scan_masks = ak8975_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->name = name;
err = iio_triggered_buffer_setup(indio_dev, NULL, ak8975_handle_trigger,
NULL);
if (err) {
dev_err(&client->dev, "triggered buffer setup failed\n");
goto power_off;
}
err = iio_device_register(indio_dev);
if (err) {
dev_err(&client->dev, "device register failed\n");
goto cleanup_buffer;
}
/* Enable runtime PM */
pm_runtime_get_noresume(&client->dev);
pm_runtime_set_active(&client->dev);
pm_runtime_enable(&client->dev);
/*
* The device comes online in 500us, so add two orders of magnitude
* of delay before autosuspending: 50 ms.
*/
pm_runtime_set_autosuspend_delay(&client->dev, 50);
pm_runtime_use_autosuspend(&client->dev);
pm_runtime_put(&client->dev);
return 0;
cleanup_buffer:
iio_triggered_buffer_cleanup(indio_dev);
power_off:
ak8975_power_off(data);
return err;
}
static void ak8975_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct ak8975_data *data = iio_priv(indio_dev);
pm_runtime_get_sync(&client->dev);
pm_runtime_put_noidle(&client->dev);
pm_runtime_disable(&client->dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
ak8975_set_mode(data, POWER_DOWN);
ak8975_power_off(data);
}
static int ak8975_runtime_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct ak8975_data *data = iio_priv(indio_dev);
int ret;
/* Set the device in power down if it wasn't already */
ret = ak8975_set_mode(data, POWER_DOWN);
if (ret < 0) {
dev_err(&client->dev, "Error in setting power-down mode\n");
return ret;
}
/* Next cut the regulators */
ak8975_power_off(data);
return 0;
}
static int ak8975_runtime_resume(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct ak8975_data *data = iio_priv(indio_dev);
int ret;
/* Take up the regulators */
ak8975_power_on(data);
/*
* We come up in powered down mode, the reading routines will
* put us in the mode to read values later.
*/
ret = ak8975_set_mode(data, POWER_DOWN);
if (ret < 0) {
dev_err(&client->dev, "Error in setting power-down mode\n");
return ret;
}
return 0;
}
static DEFINE_RUNTIME_DEV_PM_OPS(ak8975_dev_pm_ops, ak8975_runtime_suspend,
ak8975_runtime_resume, NULL);
static const struct i2c_device_id ak8975_id[] = {
{"ak8975", AK8975},
{"ak8963", AK8963},
{"AK8963", AK8963},
{"ak09911", AK09911},
{"ak09912", AK09912},
{"ak09916", AK09916},
{}
};
MODULE_DEVICE_TABLE(i2c, ak8975_id);
static const struct of_device_id ak8975_of_match[] = {
{ .compatible = "asahi-kasei,ak8975", },
{ .compatible = "ak8975", },
{ .compatible = "asahi-kasei,ak8963", },
{ .compatible = "ak8963", },
{ .compatible = "asahi-kasei,ak09911", },
{ .compatible = "ak09911", },
{ .compatible = "asahi-kasei,ak09912", },
{ .compatible = "ak09912", },
{ .compatible = "asahi-kasei,ak09916", },
{ .compatible = "ak09916", },
{}
};
MODULE_DEVICE_TABLE(of, ak8975_of_match);
static struct i2c_driver ak8975_driver = {
.driver = {
.name = "ak8975",
.pm = pm_ptr(&ak8975_dev_pm_ops),
.of_match_table = ak8975_of_match,
.acpi_match_table = ak_acpi_match,
},
.probe = ak8975_probe,
.remove = ak8975_remove,
.id_table = ak8975_id,
};
module_i2c_driver(ak8975_driver);
MODULE_AUTHOR("Laxman Dewangan <[email protected]>");
MODULE_DESCRIPTION("AK8975 magnetometer driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/magnetometer/ak8975.c |
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