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// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics hts221 i2c driver
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include "hts221.h"
#define HTS221_I2C_AUTO_INCREMENT BIT(7)
static const struct regmap_config hts221_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.write_flag_mask = HTS221_I2C_AUTO_INCREMENT,
.read_flag_mask = HTS221_I2C_AUTO_INCREMENT,
};
static int hts221_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &hts221_i2c_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return hts221_probe(&client->dev, client->irq,
client->name, regmap);
}
static const struct acpi_device_id hts221_acpi_match[] = {
{"SMO9100", 0},
{ },
};
MODULE_DEVICE_TABLE(acpi, hts221_acpi_match);
static const struct of_device_id hts221_i2c_of_match[] = {
{ .compatible = "st,hts221", },
{},
};
MODULE_DEVICE_TABLE(of, hts221_i2c_of_match);
static const struct i2c_device_id hts221_i2c_id_table[] = {
{ HTS221_DEV_NAME },
{},
};
MODULE_DEVICE_TABLE(i2c, hts221_i2c_id_table);
static struct i2c_driver hts221_driver = {
.driver = {
.name = "hts221_i2c",
.pm = pm_sleep_ptr(&hts221_pm_ops),
.of_match_table = hts221_i2c_of_match,
.acpi_match_table = ACPI_PTR(hts221_acpi_match),
},
.probe = hts221_i2c_probe,
.id_table = hts221_i2c_id_table,
};
module_i2c_driver(hts221_driver);
MODULE_AUTHOR("Lorenzo Bianconi <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics hts221 i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_HTS221);
| linux-master | drivers/iio/humidity/hts221_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics hts221 sensor driver
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/irqreturn.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/bitfield.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/iio/events.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/buffer.h>
#include <linux/platform_data/st_sensors_pdata.h>
#include "hts221.h"
#define HTS221_REG_DRDY_HL_ADDR 0x22
#define HTS221_REG_DRDY_HL_MASK BIT(7)
#define HTS221_REG_DRDY_PP_OD_ADDR 0x22
#define HTS221_REG_DRDY_PP_OD_MASK BIT(6)
#define HTS221_REG_DRDY_EN_ADDR 0x22
#define HTS221_REG_DRDY_EN_MASK BIT(2)
#define HTS221_REG_STATUS_ADDR 0x27
#define HTS221_RH_DRDY_MASK BIT(1)
#define HTS221_TEMP_DRDY_MASK BIT(0)
static int hts221_trig_set_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *iio_dev = iio_trigger_get_drvdata(trig);
struct hts221_hw *hw = iio_priv(iio_dev);
return regmap_update_bits(hw->regmap, HTS221_REG_DRDY_EN_ADDR,
HTS221_REG_DRDY_EN_MASK,
FIELD_PREP(HTS221_REG_DRDY_EN_MASK, state));
}
static const struct iio_trigger_ops hts221_trigger_ops = {
.set_trigger_state = hts221_trig_set_state,
};
static irqreturn_t hts221_trigger_handler_thread(int irq, void *private)
{
struct hts221_hw *hw = private;
int err, status;
err = regmap_read(hw->regmap, HTS221_REG_STATUS_ADDR, &status);
if (err < 0)
return IRQ_HANDLED;
/*
* H_DA bit (humidity data available) is routed to DRDY line.
* Humidity sample is computed after temperature one.
* Here we can assume data channels are both available if H_DA bit
* is set in status register
*/
if (!(status & HTS221_RH_DRDY_MASK))
return IRQ_NONE;
iio_trigger_poll_nested(hw->trig);
return IRQ_HANDLED;
}
int hts221_allocate_trigger(struct iio_dev *iio_dev)
{
struct hts221_hw *hw = iio_priv(iio_dev);
struct st_sensors_platform_data *pdata = dev_get_platdata(hw->dev);
bool irq_active_low = false, open_drain = false;
unsigned long irq_type;
int err;
irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
switch (irq_type) {
case IRQF_TRIGGER_HIGH:
case IRQF_TRIGGER_RISING:
break;
case IRQF_TRIGGER_LOW:
case IRQF_TRIGGER_FALLING:
irq_active_low = true;
break;
default:
dev_info(hw->dev,
"mode %lx unsupported, using IRQF_TRIGGER_RISING\n",
irq_type);
irq_type = IRQF_TRIGGER_RISING;
break;
}
err = regmap_update_bits(hw->regmap, HTS221_REG_DRDY_HL_ADDR,
HTS221_REG_DRDY_HL_MASK,
FIELD_PREP(HTS221_REG_DRDY_HL_MASK,
irq_active_low));
if (err < 0)
return err;
if (device_property_read_bool(hw->dev, "drive-open-drain") ||
(pdata && pdata->open_drain)) {
irq_type |= IRQF_SHARED;
open_drain = true;
}
err = regmap_update_bits(hw->regmap, HTS221_REG_DRDY_PP_OD_ADDR,
HTS221_REG_DRDY_PP_OD_MASK,
FIELD_PREP(HTS221_REG_DRDY_PP_OD_MASK,
open_drain));
if (err < 0)
return err;
err = devm_request_threaded_irq(hw->dev, hw->irq, NULL,
hts221_trigger_handler_thread,
irq_type | IRQF_ONESHOT,
hw->name, hw);
if (err) {
dev_err(hw->dev, "failed to request trigger irq %d\n",
hw->irq);
return err;
}
hw->trig = devm_iio_trigger_alloc(hw->dev, "%s-trigger",
iio_dev->name);
if (!hw->trig)
return -ENOMEM;
iio_trigger_set_drvdata(hw->trig, iio_dev);
hw->trig->ops = &hts221_trigger_ops;
err = devm_iio_trigger_register(hw->dev, hw->trig);
iio_dev->trig = iio_trigger_get(hw->trig);
return err;
}
static int hts221_buffer_preenable(struct iio_dev *iio_dev)
{
return hts221_set_enable(iio_priv(iio_dev), true);
}
static int hts221_buffer_postdisable(struct iio_dev *iio_dev)
{
return hts221_set_enable(iio_priv(iio_dev), false);
}
static const struct iio_buffer_setup_ops hts221_buffer_ops = {
.preenable = hts221_buffer_preenable,
.postdisable = hts221_buffer_postdisable,
};
static irqreturn_t hts221_buffer_handler_thread(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *iio_dev = pf->indio_dev;
struct hts221_hw *hw = iio_priv(iio_dev);
struct iio_chan_spec const *ch;
int err;
/* humidity data */
ch = &iio_dev->channels[HTS221_SENSOR_H];
err = regmap_bulk_read(hw->regmap, ch->address,
&hw->scan.channels[0],
sizeof(hw->scan.channels[0]));
if (err < 0)
goto out;
/* temperature data */
ch = &iio_dev->channels[HTS221_SENSOR_T];
err = regmap_bulk_read(hw->regmap, ch->address,
&hw->scan.channels[1],
sizeof(hw->scan.channels[1]));
if (err < 0)
goto out;
iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan,
iio_get_time_ns(iio_dev));
out:
iio_trigger_notify_done(hw->trig);
return IRQ_HANDLED;
}
int hts221_allocate_buffers(struct iio_dev *iio_dev)
{
struct hts221_hw *hw = iio_priv(iio_dev);
return devm_iio_triggered_buffer_setup(hw->dev, iio_dev,
NULL, hts221_buffer_handler_thread,
&hts221_buffer_ops);
}
MODULE_AUTHOR("Lorenzo Bianconi <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics hts221 buffer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/humidity/hts221_buffer.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2017, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/hid-sensor-hub.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include "hid-sensor-trigger.h"
struct hid_humidity_state {
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info humidity_attr;
struct {
s32 humidity_data;
u64 timestamp __aligned(8);
} scan;
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
};
static const u32 humidity_sensitivity_addresses[] = {
HID_USAGE_SENSOR_ATMOSPHERIC_HUMIDITY,
};
/* Channel definitions */
static const struct iio_chan_spec humidity_channels[] = {
{
.type = IIO_HUMIDITYRELATIVE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
},
IIO_CHAN_SOFT_TIMESTAMP(1)
};
/* Adjust channel real bits based on report descriptor */
static void humidity_adjust_channel_bit_mask(struct iio_chan_spec *channels,
int channel, int size)
{
channels[channel].scan_type.sign = 's';
/* Real storage bits will change based on the report desc. */
channels[channel].scan_type.realbits = size * 8;
/* Maximum size of a sample to capture is s32 */
channels[channel].scan_type.storagebits = sizeof(s32) * 8;
}
static int humidity_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct hid_humidity_state *humid_st = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (chan->type != IIO_HUMIDITYRELATIVE)
return -EINVAL;
hid_sensor_power_state(&humid_st->common_attributes, true);
*val = sensor_hub_input_attr_get_raw_value(
humid_st->common_attributes.hsdev,
HID_USAGE_SENSOR_HUMIDITY,
HID_USAGE_SENSOR_ATMOSPHERIC_HUMIDITY,
humid_st->humidity_attr.report_id,
SENSOR_HUB_SYNC,
humid_st->humidity_attr.logical_minimum < 0);
hid_sensor_power_state(&humid_st->common_attributes, false);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = humid_st->scale_pre_decml;
*val2 = humid_st->scale_post_decml;
return humid_st->scale_precision;
case IIO_CHAN_INFO_OFFSET:
*val = humid_st->value_offset;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
return hid_sensor_read_samp_freq_value(
&humid_st->common_attributes, val, val2);
case IIO_CHAN_INFO_HYSTERESIS:
return hid_sensor_read_raw_hyst_value(
&humid_st->common_attributes, val, val2);
default:
return -EINVAL;
}
}
static int humidity_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct hid_humidity_state *humid_st = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
return hid_sensor_write_samp_freq_value(
&humid_st->common_attributes, val, val2);
case IIO_CHAN_INFO_HYSTERESIS:
return hid_sensor_write_raw_hyst_value(
&humid_st->common_attributes, val, val2);
default:
return -EINVAL;
}
}
static const struct iio_info humidity_info = {
.read_raw = &humidity_read_raw,
.write_raw = &humidity_write_raw,
};
/* Callback handler to send event after all samples are received and captured */
static int humidity_proc_event(struct hid_sensor_hub_device *hsdev,
unsigned int usage_id, void *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct hid_humidity_state *humid_st = iio_priv(indio_dev);
if (atomic_read(&humid_st->common_attributes.data_ready))
iio_push_to_buffers_with_timestamp(indio_dev, &humid_st->scan,
iio_get_time_ns(indio_dev));
return 0;
}
/* Capture samples in local storage */
static int humidity_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned int usage_id, size_t raw_len,
char *raw_data, void *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct hid_humidity_state *humid_st = iio_priv(indio_dev);
switch (usage_id) {
case HID_USAGE_SENSOR_ATMOSPHERIC_HUMIDITY:
humid_st->scan.humidity_data = *(s32 *)raw_data;
return 0;
default:
return -EINVAL;
}
}
/* Parse report which is specific to an usage id */
static int humidity_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
struct iio_chan_spec *channels,
unsigned int usage_id,
struct hid_humidity_state *st)
{
int ret;
ret = sensor_hub_input_get_attribute_info(hsdev, HID_INPUT_REPORT,
usage_id,
HID_USAGE_SENSOR_ATMOSPHERIC_HUMIDITY,
&st->humidity_attr);
if (ret < 0)
return ret;
humidity_adjust_channel_bit_mask(channels, 0, st->humidity_attr.size);
st->scale_precision = hid_sensor_format_scale(
HID_USAGE_SENSOR_HUMIDITY,
&st->humidity_attr,
&st->scale_pre_decml,
&st->scale_post_decml);
return ret;
}
static struct hid_sensor_hub_callbacks humidity_callbacks = {
.send_event = &humidity_proc_event,
.capture_sample = &humidity_capture_sample,
};
/* Function to initialize the processing for usage id */
static int hid_humidity_probe(struct platform_device *pdev)
{
static const char *name = "humidity";
struct iio_dev *indio_dev;
struct hid_humidity_state *humid_st;
struct iio_chan_spec *humid_chans;
struct hid_sensor_hub_device *hsdev = dev_get_platdata(&pdev->dev);
int ret;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*humid_st));
if (!indio_dev)
return -ENOMEM;
humid_st = iio_priv(indio_dev);
humid_st->common_attributes.hsdev = hsdev;
humid_st->common_attributes.pdev = pdev;
ret = hid_sensor_parse_common_attributes(hsdev,
HID_USAGE_SENSOR_HUMIDITY,
&humid_st->common_attributes,
humidity_sensitivity_addresses,
ARRAY_SIZE(humidity_sensitivity_addresses));
if (ret)
return ret;
humid_chans = devm_kmemdup(&indio_dev->dev, humidity_channels,
sizeof(humidity_channels), GFP_KERNEL);
if (!humid_chans)
return -ENOMEM;
ret = humidity_parse_report(pdev, hsdev, humid_chans,
HID_USAGE_SENSOR_HUMIDITY, humid_st);
if (ret)
return ret;
indio_dev->channels = humid_chans;
indio_dev->num_channels = ARRAY_SIZE(humidity_channels);
indio_dev->info = &humidity_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
atomic_set(&humid_st->common_attributes.data_ready, 0);
ret = hid_sensor_setup_trigger(indio_dev, name,
&humid_st->common_attributes);
if (ret)
return ret;
platform_set_drvdata(pdev, indio_dev);
humidity_callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, HID_USAGE_SENSOR_HUMIDITY,
&humidity_callbacks);
if (ret)
goto error_remove_trigger;
ret = iio_device_register(indio_dev);
if (ret)
goto error_remove_callback;
return ret;
error_remove_callback:
sensor_hub_remove_callback(hsdev, HID_USAGE_SENSOR_HUMIDITY);
error_remove_trigger:
hid_sensor_remove_trigger(indio_dev, &humid_st->common_attributes);
return ret;
}
/* Function to deinitialize the processing for usage id */
static int hid_humidity_remove(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = dev_get_platdata(&pdev->dev);
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct hid_humidity_state *humid_st = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
sensor_hub_remove_callback(hsdev, HID_USAGE_SENSOR_HUMIDITY);
hid_sensor_remove_trigger(indio_dev, &humid_st->common_attributes);
return 0;
}
static const struct platform_device_id hid_humidity_ids[] = {
{
/* Format: HID-SENSOR-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-200032",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, hid_humidity_ids);
static struct platform_driver hid_humidity_platform_driver = {
.id_table = hid_humidity_ids,
.driver = {
.name = KBUILD_MODNAME,
.pm = &hid_sensor_pm_ops,
},
.probe = hid_humidity_probe,
.remove = hid_humidity_remove,
};
module_platform_driver(hid_humidity_platform_driver);
MODULE_DESCRIPTION("HID Environmental humidity sensor");
MODULE_AUTHOR("Song Hongyan <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_HID);
| linux-master | drivers/iio/humidity/hid-sensor-humidity.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics hts221 spi driver
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include "hts221.h"
#define HTS221_SPI_READ BIT(7)
#define HTS221_SPI_AUTO_INCREMENT BIT(6)
static const struct regmap_config hts221_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.write_flag_mask = HTS221_SPI_AUTO_INCREMENT,
.read_flag_mask = HTS221_SPI_READ | HTS221_SPI_AUTO_INCREMENT,
};
static int hts221_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &hts221_spi_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return hts221_probe(&spi->dev, spi->irq,
spi->modalias, regmap);
}
static const struct of_device_id hts221_spi_of_match[] = {
{ .compatible = "st,hts221", },
{},
};
MODULE_DEVICE_TABLE(of, hts221_spi_of_match);
static const struct spi_device_id hts221_spi_id_table[] = {
{ HTS221_DEV_NAME },
{},
};
MODULE_DEVICE_TABLE(spi, hts221_spi_id_table);
static struct spi_driver hts221_driver = {
.driver = {
.name = "hts221_spi",
.pm = pm_sleep_ptr(&hts221_pm_ops),
.of_match_table = hts221_spi_of_match,
},
.probe = hts221_spi_probe,
.id_table = hts221_spi_id_table,
};
module_spi_driver(hts221_driver);
MODULE_AUTHOR("Lorenzo Bianconi <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics hts221 spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_HTS221);
| linux-master | drivers/iio/humidity/hts221_spi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* DHT11/DHT22 bit banging GPIO driver
*
* Copyright (c) Harald Geyer <[email protected]>
*/
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/printk.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/wait.h>
#include <linux/bitops.h>
#include <linux/completion.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/timekeeping.h>
#include <linux/iio/iio.h>
#define DRIVER_NAME "dht11"
#define DHT11_DATA_VALID_TIME 2000000000 /* 2s in ns */
#define DHT11_EDGES_PREAMBLE 2
#define DHT11_BITS_PER_READ 40
/*
* Note that when reading the sensor actually 84 edges are detected, but
* since the last edge is not significant, we only store 83:
*/
#define DHT11_EDGES_PER_READ (2 * DHT11_BITS_PER_READ + \
DHT11_EDGES_PREAMBLE + 1)
/*
* Data transmission timing:
* Data bits are encoded as pulse length (high time) on the data line.
* 0-bit: 22-30uS -- typically 26uS (AM2302)
* 1-bit: 68-75uS -- typically 70uS (AM2302)
* The acutal timings also depend on the properties of the cable, with
* longer cables typically making pulses shorter.
*
* Our decoding depends on the time resolution of the system:
* timeres > 34uS ... don't know what a 1-tick pulse is
* 34uS > timeres > 30uS ... no problem (30kHz and 32kHz clocks)
* 30uS > timeres > 23uS ... don't know what a 2-tick pulse is
* timeres < 23uS ... no problem
*
* Luckily clocks in the 33-44kHz range are quite uncommon, so we can
* support most systems if the threshold for decoding a pulse as 1-bit
* is chosen carefully. If somebody really wants to support clocks around
* 40kHz, where this driver is most unreliable, there are two options.
* a) select an implementation using busy loop polling on those systems
* b) use the checksum to do some probabilistic decoding
*/
#define DHT11_START_TRANSMISSION_MIN 18000 /* us */
#define DHT11_START_TRANSMISSION_MAX 20000 /* us */
#define DHT11_MIN_TIMERES 34000 /* ns */
#define DHT11_THRESHOLD 49000 /* ns */
#define DHT11_AMBIG_LOW 23000 /* ns */
#define DHT11_AMBIG_HIGH 30000 /* ns */
struct dht11 {
struct device *dev;
struct gpio_desc *gpiod;
int irq;
struct completion completion;
/* The iio sysfs interface doesn't prevent concurrent reads: */
struct mutex lock;
s64 timestamp;
int temperature;
int humidity;
/* num_edges: -1 means "no transmission in progress" */
int num_edges;
struct {s64 ts; int value; } edges[DHT11_EDGES_PER_READ];
};
#ifdef CONFIG_DYNAMIC_DEBUG
/*
* dht11_edges_print: show the data as actually received by the
* driver.
*/
static void dht11_edges_print(struct dht11 *dht11)
{
int i;
dev_dbg(dht11->dev, "%d edges detected:\n", dht11->num_edges);
for (i = 1; i < dht11->num_edges; ++i) {
dev_dbg(dht11->dev, "%d: %lld ns %s\n", i,
dht11->edges[i].ts - dht11->edges[i - 1].ts,
dht11->edges[i - 1].value ? "high" : "low");
}
}
#endif /* CONFIG_DYNAMIC_DEBUG */
static unsigned char dht11_decode_byte(char *bits)
{
unsigned char ret = 0;
int i;
for (i = 0; i < 8; ++i) {
ret <<= 1;
if (bits[i])
++ret;
}
return ret;
}
static int dht11_decode(struct dht11 *dht11, int offset)
{
int i, t;
char bits[DHT11_BITS_PER_READ];
unsigned char temp_int, temp_dec, hum_int, hum_dec, checksum;
for (i = 0; i < DHT11_BITS_PER_READ; ++i) {
t = dht11->edges[offset + 2 * i + 2].ts -
dht11->edges[offset + 2 * i + 1].ts;
if (!dht11->edges[offset + 2 * i + 1].value) {
dev_dbg(dht11->dev,
"lost synchronisation at edge %d\n",
offset + 2 * i + 1);
return -EIO;
}
bits[i] = t > DHT11_THRESHOLD;
}
hum_int = dht11_decode_byte(bits);
hum_dec = dht11_decode_byte(&bits[8]);
temp_int = dht11_decode_byte(&bits[16]);
temp_dec = dht11_decode_byte(&bits[24]);
checksum = dht11_decode_byte(&bits[32]);
if (((hum_int + hum_dec + temp_int + temp_dec) & 0xff) != checksum) {
dev_dbg(dht11->dev, "invalid checksum\n");
return -EIO;
}
dht11->timestamp = ktime_get_boottime_ns();
if (hum_int < 4) { /* DHT22: 100000 = (3*256+232)*100 */
dht11->temperature = (((temp_int & 0x7f) << 8) + temp_dec) *
((temp_int & 0x80) ? -100 : 100);
dht11->humidity = ((hum_int << 8) + hum_dec) * 100;
} else if (temp_dec == 0 && hum_dec == 0) { /* DHT11 */
dht11->temperature = temp_int * 1000;
dht11->humidity = hum_int * 1000;
} else {
dev_err(dht11->dev,
"Don't know how to decode data: %d %d %d %d\n",
hum_int, hum_dec, temp_int, temp_dec);
return -EIO;
}
return 0;
}
/*
* IRQ handler called on GPIO edges
*/
static irqreturn_t dht11_handle_irq(int irq, void *data)
{
struct iio_dev *iio = data;
struct dht11 *dht11 = iio_priv(iio);
if (dht11->num_edges < DHT11_EDGES_PER_READ && dht11->num_edges >= 0) {
dht11->edges[dht11->num_edges].ts = ktime_get_boottime_ns();
dht11->edges[dht11->num_edges++].value =
gpiod_get_value(dht11->gpiod);
if (dht11->num_edges >= DHT11_EDGES_PER_READ)
complete(&dht11->completion);
}
return IRQ_HANDLED;
}
static int dht11_read_raw(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
int *val, int *val2, long m)
{
struct dht11 *dht11 = iio_priv(iio_dev);
int ret, timeres, offset;
mutex_lock(&dht11->lock);
if (dht11->timestamp + DHT11_DATA_VALID_TIME < ktime_get_boottime_ns()) {
timeres = ktime_get_resolution_ns();
dev_dbg(dht11->dev, "current timeresolution: %dns\n", timeres);
if (timeres > DHT11_MIN_TIMERES) {
dev_err(dht11->dev, "timeresolution %dns too low\n",
timeres);
/* In theory a better clock could become available
* at some point ... and there is no error code
* that really fits better.
*/
ret = -EAGAIN;
goto err;
}
if (timeres > DHT11_AMBIG_LOW && timeres < DHT11_AMBIG_HIGH)
dev_warn(dht11->dev,
"timeresolution: %dns - decoding ambiguous\n",
timeres);
reinit_completion(&dht11->completion);
dht11->num_edges = 0;
ret = gpiod_direction_output(dht11->gpiod, 0);
if (ret)
goto err;
usleep_range(DHT11_START_TRANSMISSION_MIN,
DHT11_START_TRANSMISSION_MAX);
ret = gpiod_direction_input(dht11->gpiod);
if (ret)
goto err;
ret = request_irq(dht11->irq, dht11_handle_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
iio_dev->name, iio_dev);
if (ret)
goto err;
ret = wait_for_completion_killable_timeout(&dht11->completion,
HZ);
free_irq(dht11->irq, iio_dev);
#ifdef CONFIG_DYNAMIC_DEBUG
dht11_edges_print(dht11);
#endif
if (ret == 0 && dht11->num_edges < DHT11_EDGES_PER_READ - 1) {
dev_err(dht11->dev, "Only %d signal edges detected\n",
dht11->num_edges);
ret = -ETIMEDOUT;
}
if (ret < 0)
goto err;
offset = DHT11_EDGES_PREAMBLE +
dht11->num_edges - DHT11_EDGES_PER_READ;
for (; offset >= 0; --offset) {
ret = dht11_decode(dht11, offset);
if (!ret)
break;
}
if (ret)
goto err;
}
ret = IIO_VAL_INT;
if (chan->type == IIO_TEMP)
*val = dht11->temperature;
else if (chan->type == IIO_HUMIDITYRELATIVE)
*val = dht11->humidity;
else
ret = -EINVAL;
err:
dht11->num_edges = -1;
mutex_unlock(&dht11->lock);
return ret;
}
static const struct iio_info dht11_iio_info = {
.read_raw = dht11_read_raw,
};
static const struct iio_chan_spec dht11_chan_spec[] = {
{ .type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), },
{ .type = IIO_HUMIDITYRELATIVE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), }
};
static const struct of_device_id dht11_dt_ids[] = {
{ .compatible = "dht11", },
{ }
};
MODULE_DEVICE_TABLE(of, dht11_dt_ids);
static int dht11_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct dht11 *dht11;
struct iio_dev *iio;
iio = devm_iio_device_alloc(dev, sizeof(*dht11));
if (!iio) {
dev_err(dev, "Failed to allocate IIO device\n");
return -ENOMEM;
}
dht11 = iio_priv(iio);
dht11->dev = dev;
dht11->gpiod = devm_gpiod_get(dev, NULL, GPIOD_IN);
if (IS_ERR(dht11->gpiod))
return PTR_ERR(dht11->gpiod);
dht11->irq = gpiod_to_irq(dht11->gpiod);
if (dht11->irq < 0) {
dev_err(dev, "GPIO %d has no interrupt\n", desc_to_gpio(dht11->gpiod));
return -EINVAL;
}
dht11->timestamp = ktime_get_boottime_ns() - DHT11_DATA_VALID_TIME - 1;
dht11->num_edges = -1;
platform_set_drvdata(pdev, iio);
init_completion(&dht11->completion);
mutex_init(&dht11->lock);
iio->name = pdev->name;
iio->info = &dht11_iio_info;
iio->modes = INDIO_DIRECT_MODE;
iio->channels = dht11_chan_spec;
iio->num_channels = ARRAY_SIZE(dht11_chan_spec);
return devm_iio_device_register(dev, iio);
}
static struct platform_driver dht11_driver = {
.driver = {
.name = DRIVER_NAME,
.of_match_table = dht11_dt_ids,
},
.probe = dht11_probe,
};
module_platform_driver(dht11_driver);
MODULE_AUTHOR("Harald Geyer <[email protected]>");
MODULE_DESCRIPTION("DHT11 humidity/temperature sensor driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/humidity/dht11.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics hts221 sensor driver
*
* Copyright 2016 STMicroelectronics Inc.
*
* Lorenzo Bianconi <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/iio/sysfs.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/bitfield.h>
#include "hts221.h"
#define HTS221_REG_WHOAMI_ADDR 0x0f
#define HTS221_REG_WHOAMI_VAL 0xbc
#define HTS221_REG_CNTRL1_ADDR 0x20
#define HTS221_REG_CNTRL2_ADDR 0x21
#define HTS221_ODR_MASK 0x03
#define HTS221_BDU_MASK BIT(2)
#define HTS221_ENABLE_MASK BIT(7)
/* calibration registers */
#define HTS221_REG_0RH_CAL_X_H 0x36
#define HTS221_REG_1RH_CAL_X_H 0x3a
#define HTS221_REG_0RH_CAL_Y_H 0x30
#define HTS221_REG_1RH_CAL_Y_H 0x31
#define HTS221_REG_0T_CAL_X_L 0x3c
#define HTS221_REG_1T_CAL_X_L 0x3e
#define HTS221_REG_0T_CAL_Y_H 0x32
#define HTS221_REG_1T_CAL_Y_H 0x33
#define HTS221_REG_T1_T0_CAL_Y_H 0x35
struct hts221_odr {
u8 hz;
u8 val;
};
#define HTS221_AVG_DEPTH 8
struct hts221_avg {
u8 addr;
u8 mask;
u16 avg_avl[HTS221_AVG_DEPTH];
};
static const struct hts221_odr hts221_odr_table[] = {
{ 1, 0x01 }, /* 1Hz */
{ 7, 0x02 }, /* 7Hz */
{ 13, 0x03 }, /* 12.5Hz */
};
static const struct hts221_avg hts221_avg_list[] = {
{
.addr = 0x10,
.mask = 0x07,
.avg_avl = {
4, /* 0.4 %RH */
8, /* 0.3 %RH */
16, /* 0.2 %RH */
32, /* 0.15 %RH */
64, /* 0.1 %RH */
128, /* 0.07 %RH */
256, /* 0.05 %RH */
512, /* 0.03 %RH */
},
},
{
.addr = 0x10,
.mask = 0x38,
.avg_avl = {
2, /* 0.08 degC */
4, /* 0.05 degC */
8, /* 0.04 degC */
16, /* 0.03 degC */
32, /* 0.02 degC */
64, /* 0.015 degC */
128, /* 0.01 degC */
256, /* 0.007 degC */
},
},
};
static const struct iio_chan_spec hts221_channels[] = {
{
.type = IIO_HUMIDITYRELATIVE,
.address = 0x28,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_LE,
},
},
{
.type = IIO_TEMP,
.address = 0x2a,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.scan_index = 1,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_LE,
},
},
IIO_CHAN_SOFT_TIMESTAMP(2),
};
static int hts221_check_whoami(struct hts221_hw *hw)
{
int err, data;
err = regmap_read(hw->regmap, HTS221_REG_WHOAMI_ADDR, &data);
if (err < 0) {
dev_err(hw->dev, "failed to read whoami register\n");
return err;
}
if (data != HTS221_REG_WHOAMI_VAL) {
dev_err(hw->dev, "wrong whoami {%02x vs %02x}\n",
data, HTS221_REG_WHOAMI_VAL);
return -ENODEV;
}
return 0;
}
static int hts221_update_odr(struct hts221_hw *hw, u8 odr)
{
int i, err;
for (i = 0; i < ARRAY_SIZE(hts221_odr_table); i++)
if (hts221_odr_table[i].hz == odr)
break;
if (i == ARRAY_SIZE(hts221_odr_table))
return -EINVAL;
err = regmap_update_bits(hw->regmap, HTS221_REG_CNTRL1_ADDR,
HTS221_ODR_MASK,
FIELD_PREP(HTS221_ODR_MASK,
hts221_odr_table[i].val));
if (err < 0)
return err;
hw->odr = odr;
return 0;
}
static int hts221_update_avg(struct hts221_hw *hw,
enum hts221_sensor_type type,
u16 val)
{
const struct hts221_avg *avg = &hts221_avg_list[type];
int i, err, data;
for (i = 0; i < HTS221_AVG_DEPTH; i++)
if (avg->avg_avl[i] == val)
break;
if (i == HTS221_AVG_DEPTH)
return -EINVAL;
data = ((i << __ffs(avg->mask)) & avg->mask);
err = regmap_update_bits(hw->regmap, avg->addr,
avg->mask, data);
if (err < 0)
return err;
hw->sensors[type].cur_avg_idx = i;
return 0;
}
static ssize_t hts221_sysfs_sampling_freq(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int i;
ssize_t len = 0;
for (i = 0; i < ARRAY_SIZE(hts221_odr_table); i++)
len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
hts221_odr_table[i].hz);
buf[len - 1] = '\n';
return len;
}
static ssize_t
hts221_sysfs_rh_oversampling_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
const struct hts221_avg *avg = &hts221_avg_list[HTS221_SENSOR_H];
ssize_t len = 0;
int i;
for (i = 0; i < ARRAY_SIZE(avg->avg_avl); i++)
len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
avg->avg_avl[i]);
buf[len - 1] = '\n';
return len;
}
static ssize_t
hts221_sysfs_temp_oversampling_avail(struct device *dev,
struct device_attribute *attr,
char *buf)
{
const struct hts221_avg *avg = &hts221_avg_list[HTS221_SENSOR_T];
ssize_t len = 0;
int i;
for (i = 0; i < ARRAY_SIZE(avg->avg_avl); i++)
len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
avg->avg_avl[i]);
buf[len - 1] = '\n';
return len;
}
int hts221_set_enable(struct hts221_hw *hw, bool enable)
{
int err;
err = regmap_update_bits(hw->regmap, HTS221_REG_CNTRL1_ADDR,
HTS221_ENABLE_MASK,
FIELD_PREP(HTS221_ENABLE_MASK, enable));
if (err < 0)
return err;
hw->enabled = enable;
return 0;
}
static int hts221_parse_temp_caldata(struct hts221_hw *hw)
{
int err, *slope, *b_gen, cal0, cal1;
s16 cal_x0, cal_x1, cal_y0, cal_y1;
__le16 val;
err = regmap_read(hw->regmap, HTS221_REG_0T_CAL_Y_H, &cal0);
if (err < 0)
return err;
err = regmap_read(hw->regmap, HTS221_REG_T1_T0_CAL_Y_H, &cal1);
if (err < 0)
return err;
cal_y0 = ((cal1 & 0x3) << 8) | cal0;
err = regmap_read(hw->regmap, HTS221_REG_1T_CAL_Y_H, &cal0);
if (err < 0)
return err;
cal_y1 = (((cal1 & 0xc) >> 2) << 8) | cal0;
err = regmap_bulk_read(hw->regmap, HTS221_REG_0T_CAL_X_L,
&val, sizeof(val));
if (err < 0)
return err;
cal_x0 = le16_to_cpu(val);
err = regmap_bulk_read(hw->regmap, HTS221_REG_1T_CAL_X_L,
&val, sizeof(val));
if (err < 0)
return err;
cal_x1 = le16_to_cpu(val);
slope = &hw->sensors[HTS221_SENSOR_T].slope;
b_gen = &hw->sensors[HTS221_SENSOR_T].b_gen;
*slope = ((cal_y1 - cal_y0) * 8000) / (cal_x1 - cal_x0);
*b_gen = (((s32)cal_x1 * cal_y0 - (s32)cal_x0 * cal_y1) * 1000) /
(cal_x1 - cal_x0);
*b_gen *= 8;
return 0;
}
static int hts221_parse_rh_caldata(struct hts221_hw *hw)
{
int err, *slope, *b_gen, data;
s16 cal_x0, cal_x1, cal_y0, cal_y1;
__le16 val;
err = regmap_read(hw->regmap, HTS221_REG_0RH_CAL_Y_H, &data);
if (err < 0)
return err;
cal_y0 = data;
err = regmap_read(hw->regmap, HTS221_REG_1RH_CAL_Y_H, &data);
if (err < 0)
return err;
cal_y1 = data;
err = regmap_bulk_read(hw->regmap, HTS221_REG_0RH_CAL_X_H,
&val, sizeof(val));
if (err < 0)
return err;
cal_x0 = le16_to_cpu(val);
err = regmap_bulk_read(hw->regmap, HTS221_REG_1RH_CAL_X_H,
&val, sizeof(val));
if (err < 0)
return err;
cal_x1 = le16_to_cpu(val);
slope = &hw->sensors[HTS221_SENSOR_H].slope;
b_gen = &hw->sensors[HTS221_SENSOR_H].b_gen;
*slope = ((cal_y1 - cal_y0) * 8000) / (cal_x1 - cal_x0);
*b_gen = (((s32)cal_x1 * cal_y0 - (s32)cal_x0 * cal_y1) * 1000) /
(cal_x1 - cal_x0);
*b_gen *= 8;
return 0;
}
static int hts221_get_sensor_scale(struct hts221_hw *hw,
enum iio_chan_type ch_type,
int *val, int *val2)
{
s64 tmp;
s32 rem, div, data;
switch (ch_type) {
case IIO_HUMIDITYRELATIVE:
data = hw->sensors[HTS221_SENSOR_H].slope;
div = (1 << 4) * 1000;
break;
case IIO_TEMP:
data = hw->sensors[HTS221_SENSOR_T].slope;
div = (1 << 6) * 1000;
break;
default:
return -EINVAL;
}
tmp = div_s64(data * 1000000000LL, div);
tmp = div_s64_rem(tmp, 1000000000LL, &rem);
*val = tmp;
*val2 = rem;
return IIO_VAL_INT_PLUS_NANO;
}
static int hts221_get_sensor_offset(struct hts221_hw *hw,
enum iio_chan_type ch_type,
int *val, int *val2)
{
s64 tmp;
s32 rem, div, data;
switch (ch_type) {
case IIO_HUMIDITYRELATIVE:
data = hw->sensors[HTS221_SENSOR_H].b_gen;
div = hw->sensors[HTS221_SENSOR_H].slope;
break;
case IIO_TEMP:
data = hw->sensors[HTS221_SENSOR_T].b_gen;
div = hw->sensors[HTS221_SENSOR_T].slope;
break;
default:
return -EINVAL;
}
tmp = div_s64(data * 1000000000LL, div);
tmp = div_s64_rem(tmp, 1000000000LL, &rem);
*val = tmp;
*val2 = rem;
return IIO_VAL_INT_PLUS_NANO;
}
static int hts221_read_oneshot(struct hts221_hw *hw, u8 addr, int *val)
{
__le16 data;
int err;
err = hts221_set_enable(hw, true);
if (err < 0)
return err;
msleep(50);
err = regmap_bulk_read(hw->regmap, addr, &data, sizeof(data));
if (err < 0)
return err;
hts221_set_enable(hw, false);
*val = (s16)le16_to_cpu(data);
return IIO_VAL_INT;
}
static int hts221_read_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *ch,
int *val, int *val2, long mask)
{
struct hts221_hw *hw = iio_priv(iio_dev);
int ret;
ret = iio_device_claim_direct_mode(iio_dev);
if (ret)
return ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = hts221_read_oneshot(hw, ch->address, val);
break;
case IIO_CHAN_INFO_SCALE:
ret = hts221_get_sensor_scale(hw, ch->type, val, val2);
break;
case IIO_CHAN_INFO_OFFSET:
ret = hts221_get_sensor_offset(hw, ch->type, val, val2);
break;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = hw->odr;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO: {
u8 idx;
const struct hts221_avg *avg;
switch (ch->type) {
case IIO_HUMIDITYRELATIVE:
avg = &hts221_avg_list[HTS221_SENSOR_H];
idx = hw->sensors[HTS221_SENSOR_H].cur_avg_idx;
*val = avg->avg_avl[idx];
ret = IIO_VAL_INT;
break;
case IIO_TEMP:
avg = &hts221_avg_list[HTS221_SENSOR_T];
idx = hw->sensors[HTS221_SENSOR_T].cur_avg_idx;
*val = avg->avg_avl[idx];
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
break;
}
break;
}
default:
ret = -EINVAL;
break;
}
iio_device_release_direct_mode(iio_dev);
return ret;
}
static int hts221_write_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct hts221_hw *hw = iio_priv(iio_dev);
int ret;
ret = iio_device_claim_direct_mode(iio_dev);
if (ret)
return ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = hts221_update_odr(hw, val);
break;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
switch (chan->type) {
case IIO_HUMIDITYRELATIVE:
ret = hts221_update_avg(hw, HTS221_SENSOR_H, val);
break;
case IIO_TEMP:
ret = hts221_update_avg(hw, HTS221_SENSOR_T, val);
break;
default:
ret = -EINVAL;
break;
}
break;
default:
ret = -EINVAL;
break;
}
iio_device_release_direct_mode(iio_dev);
return ret;
}
static int hts221_validate_trigger(struct iio_dev *iio_dev,
struct iio_trigger *trig)
{
struct hts221_hw *hw = iio_priv(iio_dev);
return hw->trig == trig ? 0 : -EINVAL;
}
static IIO_DEVICE_ATTR(in_humidity_oversampling_ratio_available, S_IRUGO,
hts221_sysfs_rh_oversampling_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_temp_oversampling_ratio_available, S_IRUGO,
hts221_sysfs_temp_oversampling_avail, NULL, 0);
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(hts221_sysfs_sampling_freq);
static struct attribute *hts221_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_humidity_oversampling_ratio_available.dev_attr.attr,
&iio_dev_attr_in_temp_oversampling_ratio_available.dev_attr.attr,
NULL,
};
static const struct attribute_group hts221_attribute_group = {
.attrs = hts221_attributes,
};
static const struct iio_info hts221_info = {
.attrs = &hts221_attribute_group,
.read_raw = hts221_read_raw,
.write_raw = hts221_write_raw,
.validate_trigger = hts221_validate_trigger,
};
static const unsigned long hts221_scan_masks[] = {0x3, 0x0};
static int hts221_init_regulators(struct device *dev)
{
int err;
err = devm_regulator_get_enable(dev, "vdd");
if (err)
return dev_err_probe(dev, err, "failed to get vdd regulator\n");
msleep(50);
return 0;
}
int hts221_probe(struct device *dev, int irq, const char *name,
struct regmap *regmap)
{
struct iio_dev *iio_dev;
struct hts221_hw *hw;
int err;
u8 data;
iio_dev = devm_iio_device_alloc(dev, sizeof(*hw));
if (!iio_dev)
return -ENOMEM;
dev_set_drvdata(dev, (void *)iio_dev);
hw = iio_priv(iio_dev);
hw->name = name;
hw->dev = dev;
hw->irq = irq;
hw->regmap = regmap;
err = hts221_init_regulators(dev);
if (err)
return err;
err = hts221_check_whoami(hw);
if (err < 0)
return err;
iio_dev->modes = INDIO_DIRECT_MODE;
iio_dev->available_scan_masks = hts221_scan_masks;
iio_dev->channels = hts221_channels;
iio_dev->num_channels = ARRAY_SIZE(hts221_channels);
iio_dev->name = HTS221_DEV_NAME;
iio_dev->info = &hts221_info;
/* enable Block Data Update */
err = regmap_update_bits(hw->regmap, HTS221_REG_CNTRL1_ADDR,
HTS221_BDU_MASK,
FIELD_PREP(HTS221_BDU_MASK, 1));
if (err < 0)
return err;
err = hts221_update_odr(hw, hts221_odr_table[0].hz);
if (err < 0)
return err;
/* configure humidity sensor */
err = hts221_parse_rh_caldata(hw);
if (err < 0) {
dev_err(hw->dev, "failed to get rh calibration data\n");
return err;
}
data = hts221_avg_list[HTS221_SENSOR_H].avg_avl[3];
err = hts221_update_avg(hw, HTS221_SENSOR_H, data);
if (err < 0) {
dev_err(hw->dev, "failed to set rh oversampling ratio\n");
return err;
}
/* configure temperature sensor */
err = hts221_parse_temp_caldata(hw);
if (err < 0) {
dev_err(hw->dev,
"failed to get temperature calibration data\n");
return err;
}
data = hts221_avg_list[HTS221_SENSOR_T].avg_avl[3];
err = hts221_update_avg(hw, HTS221_SENSOR_T, data);
if (err < 0) {
dev_err(hw->dev,
"failed to set temperature oversampling ratio\n");
return err;
}
if (hw->irq > 0) {
err = hts221_allocate_buffers(iio_dev);
if (err < 0)
return err;
err = hts221_allocate_trigger(iio_dev);
if (err)
return err;
}
return devm_iio_device_register(hw->dev, iio_dev);
}
EXPORT_SYMBOL_NS(hts221_probe, IIO_HTS221);
static int hts221_suspend(struct device *dev)
{
struct iio_dev *iio_dev = dev_get_drvdata(dev);
struct hts221_hw *hw = iio_priv(iio_dev);
return regmap_update_bits(hw->regmap, HTS221_REG_CNTRL1_ADDR,
HTS221_ENABLE_MASK,
FIELD_PREP(HTS221_ENABLE_MASK, false));
}
static int hts221_resume(struct device *dev)
{
struct iio_dev *iio_dev = dev_get_drvdata(dev);
struct hts221_hw *hw = iio_priv(iio_dev);
int err = 0;
if (hw->enabled)
err = regmap_update_bits(hw->regmap, HTS221_REG_CNTRL1_ADDR,
HTS221_ENABLE_MASK,
FIELD_PREP(HTS221_ENABLE_MASK,
true));
return err;
}
EXPORT_NS_SIMPLE_DEV_PM_OPS(hts221_pm_ops, hts221_suspend, hts221_resume,
IIO_HTS221);
MODULE_AUTHOR("Lorenzo Bianconi <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics hts221 sensor driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/humidity/hts221_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* si7020.c - Silicon Labs Si7013/20/21 Relative Humidity and Temp Sensors
* Copyright (c) 2013,2014 Uplogix, Inc.
* David Barksdale <[email protected]>
*/
/*
* The Silicon Labs Si7013/20/21 Relative Humidity and Temperature Sensors
* are i2c devices which have an identical programming interface for
* measuring relative humidity and temperature. The Si7013 has an additional
* temperature input which this driver does not support.
*
* Data Sheets:
* Si7013: http://www.silabs.com/Support%20Documents/TechnicalDocs/Si7013.pdf
* Si7020: http://www.silabs.com/Support%20Documents/TechnicalDocs/Si7020.pdf
* Si7021: http://www.silabs.com/Support%20Documents/TechnicalDocs/Si7021.pdf
*/
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
/* Measure Relative Humidity, Hold Master Mode */
#define SI7020CMD_RH_HOLD 0xE5
/* Measure Temperature, Hold Master Mode */
#define SI7020CMD_TEMP_HOLD 0xE3
/* Software Reset */
#define SI7020CMD_RESET 0xFE
static int si7020_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct i2c_client **client = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_word_swapped(*client,
chan->type == IIO_TEMP ?
SI7020CMD_TEMP_HOLD :
SI7020CMD_RH_HOLD);
if (ret < 0)
return ret;
*val = ret >> 2;
/*
* Humidity values can slightly exceed the 0-100%RH
* range and should be corrected by software
*/
if (chan->type == IIO_HUMIDITYRELATIVE)
*val = clamp_val(*val, 786, 13893);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
if (chan->type == IIO_TEMP)
*val = 175720; /* = 175.72 * 1000 */
else
*val = 125 * 1000;
*val2 = 65536 >> 2;
return IIO_VAL_FRACTIONAL;
case IIO_CHAN_INFO_OFFSET:
/*
* Since iio_convert_raw_to_processed_unlocked assumes offset
* is an integer we have to round these values and lose
* accuracy.
* Relative humidity will be 0.0032959% too high and
* temperature will be 0.00277344 degrees too high.
* This is no big deal because it's within the accuracy of the
* sensor.
*/
if (chan->type == IIO_TEMP)
*val = -4368; /* = -46.85 * (65536 >> 2) / 175.72 */
else
*val = -786; /* = -6 * (65536 >> 2) / 125 */
return IIO_VAL_INT;
default:
break;
}
return -EINVAL;
}
static const struct iio_chan_spec si7020_channels[] = {
{
.type = IIO_HUMIDITYRELATIVE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET),
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET),
}
};
static const struct iio_info si7020_info = {
.read_raw = si7020_read_raw,
};
static int si7020_probe(struct i2c_client *client)
{
struct iio_dev *indio_dev;
struct i2c_client **data;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WRITE_BYTE |
I2C_FUNC_SMBUS_READ_WORD_DATA))
return -EOPNOTSUPP;
/* Reset device, loads default settings. */
ret = i2c_smbus_write_byte(client, SI7020CMD_RESET);
if (ret < 0)
return ret;
/* Wait the maximum power-up time after software reset. */
msleep(15);
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
*data = client;
indio_dev->name = dev_name(&client->dev);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &si7020_info;
indio_dev->channels = si7020_channels;
indio_dev->num_channels = ARRAY_SIZE(si7020_channels);
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id si7020_id[] = {
{ "si7020", 0 },
{ "th06", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, si7020_id);
static const struct of_device_id si7020_dt_ids[] = {
{ .compatible = "silabs,si7020" },
{ }
};
MODULE_DEVICE_TABLE(of, si7020_dt_ids);
static struct i2c_driver si7020_driver = {
.driver = {
.name = "si7020",
.of_match_table = si7020_dt_ids,
},
.probe = si7020_probe,
.id_table = si7020_id,
};
module_i2c_driver(si7020_driver);
MODULE_DESCRIPTION("Silicon Labs Si7013/20/21 Relative Humidity and Temperature Sensors");
MODULE_AUTHOR("David Barksdale <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/humidity/si7020.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* si7005.c - Support for Silabs Si7005 humidity and temperature sensor
*
* Copyright (c) 2014 Peter Meerwald <[email protected]>
*
* (7-bit I2C slave address 0x40)
*
* TODO: heater, fast mode, processed mode (temp. / linearity compensation)
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define SI7005_STATUS 0x00
#define SI7005_DATA 0x01 /* 16-bit, MSB */
#define SI7005_CONFIG 0x03
#define SI7005_ID 0x11
#define SI7005_STATUS_NRDY BIT(0)
#define SI7005_CONFIG_TEMP BIT(4)
#define SI7005_CONFIG_START BIT(0)
#define SI7005_ID_7005 0x50
#define SI7005_ID_7015 0xf0
struct si7005_data {
struct i2c_client *client;
struct mutex lock;
u8 config;
};
static int si7005_read_measurement(struct si7005_data *data, bool temp)
{
int tries = 50;
int ret;
mutex_lock(&data->lock);
ret = i2c_smbus_write_byte_data(data->client, SI7005_CONFIG,
data->config | SI7005_CONFIG_START |
(temp ? SI7005_CONFIG_TEMP : 0));
if (ret < 0)
goto done;
while (tries-- > 0) {
msleep(20);
ret = i2c_smbus_read_byte_data(data->client, SI7005_STATUS);
if (ret < 0)
goto done;
if (!(ret & SI7005_STATUS_NRDY))
break;
}
if (tries < 0) {
ret = -EIO;
goto done;
}
ret = i2c_smbus_read_word_swapped(data->client, SI7005_DATA);
done:
mutex_unlock(&data->lock);
return ret;
}
static int si7005_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct si7005_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = si7005_read_measurement(data, chan->type == IIO_TEMP);
if (ret < 0)
return ret;
*val = ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
if (chan->type == IIO_TEMP) {
*val = 7;
*val2 = 812500;
} else {
*val = 3;
*val2 = 906250;
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_OFFSET:
if (chan->type == IIO_TEMP)
*val = -50 * 32 * 4;
else
*val = -24 * 16 * 16;
return IIO_VAL_INT;
default:
break;
}
return -EINVAL;
}
static const struct iio_chan_spec si7005_channels[] = {
{
.type = IIO_HUMIDITYRELATIVE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET),
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET),
}
};
static const struct iio_info si7005_info = {
.read_raw = si7005_read_raw,
};
static int si7005_probe(struct i2c_client *client)
{
struct iio_dev *indio_dev;
struct si7005_data *data;
int ret;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
return -EOPNOTSUPP;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
mutex_init(&data->lock);
indio_dev->name = dev_name(&client->dev);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &si7005_info;
indio_dev->channels = si7005_channels;
indio_dev->num_channels = ARRAY_SIZE(si7005_channels);
ret = i2c_smbus_read_byte_data(client, SI7005_ID);
if (ret < 0)
return ret;
if (ret != SI7005_ID_7005 && ret != SI7005_ID_7015)
return -ENODEV;
ret = i2c_smbus_read_byte_data(client, SI7005_CONFIG);
if (ret < 0)
return ret;
data->config = ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id si7005_id[] = {
{ "si7005", 0 },
{ "th02", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, si7005_id);
static struct i2c_driver si7005_driver = {
.driver = {
.name = "si7005",
},
.probe = si7005_probe,
.id_table = si7005_id,
};
module_i2c_driver(si7005_driver);
MODULE_AUTHOR("Peter Meerwald <[email protected]>");
MODULE_DESCRIPTION("Silabs Si7005 humidity and temperature sensor driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/humidity/si7005.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* htu21.c - Support for Measurement-Specialties
* htu21 temperature & humidity sensor
* and humidity part of MS8607 sensor
*
* Copyright (c) 2014 Measurement-Specialties
*
* (7-bit I2C slave address 0x40)
*
* Datasheet:
* http://www.meas-spec.com/downloads/HTU21D.pdf
* Datasheet:
* http://www.meas-spec.com/downloads/MS8607-02BA01.pdf
*/
#include <linux/init.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/stat.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include "../common/ms_sensors/ms_sensors_i2c.h"
#define HTU21_RESET 0xFE
enum {
HTU21,
MS8607
};
static const int htu21_samp_freq[4] = { 20, 40, 70, 120 };
/* String copy of the above const for readability purpose */
static const char htu21_show_samp_freq[] = "20 40 70 120";
static int htu21_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *channel, int *val,
int *val2, long mask)
{
int ret, temperature;
unsigned int humidity;
struct ms_ht_dev *dev_data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
switch (channel->type) {
case IIO_TEMP: /* in milli °C */
ret = ms_sensors_ht_read_temperature(dev_data,
&temperature);
if (ret)
return ret;
*val = temperature;
return IIO_VAL_INT;
case IIO_HUMIDITYRELATIVE: /* in milli %RH */
ret = ms_sensors_ht_read_humidity(dev_data,
&humidity);
if (ret)
return ret;
*val = humidity;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
*val = htu21_samp_freq[dev_data->res_index];
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int htu21_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct ms_ht_dev *dev_data = iio_priv(indio_dev);
int i, ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
i = ARRAY_SIZE(htu21_samp_freq);
while (i-- > 0)
if (val == htu21_samp_freq[i])
break;
if (i < 0)
return -EINVAL;
mutex_lock(&dev_data->lock);
dev_data->res_index = i;
ret = ms_sensors_write_resolution(dev_data, i);
mutex_unlock(&dev_data->lock);
return ret;
default:
return -EINVAL;
}
}
static const struct iio_chan_spec htu21_channels[] = {
{
.type = IIO_TEMP,
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_PROCESSED),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
{
.type = IIO_HUMIDITYRELATIVE,
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_PROCESSED),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
}
};
/*
* Meas Spec recommendation is to not read temperature
* on this driver part for MS8607
*/
static const struct iio_chan_spec ms8607_channels[] = {
{
.type = IIO_HUMIDITYRELATIVE,
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_PROCESSED),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
}
};
static ssize_t htu21_show_battery_low(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ms_ht_dev *dev_data = iio_priv(indio_dev);
return ms_sensors_show_battery_low(dev_data, buf);
}
static ssize_t htu21_show_heater(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ms_ht_dev *dev_data = iio_priv(indio_dev);
return ms_sensors_show_heater(dev_data, buf);
}
static ssize_t htu21_write_heater(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ms_ht_dev *dev_data = iio_priv(indio_dev);
return ms_sensors_write_heater(dev_data, buf, len);
}
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(htu21_show_samp_freq);
static IIO_DEVICE_ATTR(battery_low, S_IRUGO,
htu21_show_battery_low, NULL, 0);
static IIO_DEVICE_ATTR(heater_enable, S_IRUGO | S_IWUSR,
htu21_show_heater, htu21_write_heater, 0);
static struct attribute *htu21_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_battery_low.dev_attr.attr,
&iio_dev_attr_heater_enable.dev_attr.attr,
NULL,
};
static const struct attribute_group htu21_attribute_group = {
.attrs = htu21_attributes,
};
static const struct iio_info htu21_info = {
.read_raw = htu21_read_raw,
.write_raw = htu21_write_raw,
.attrs = &htu21_attribute_group,
};
static int htu21_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct ms_ht_dev *dev_data;
struct iio_dev *indio_dev;
int ret;
u64 serial_number;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WRITE_BYTE_DATA |
I2C_FUNC_SMBUS_WRITE_BYTE |
I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
dev_err(&client->dev,
"Adapter does not support some i2c transaction\n");
return -EOPNOTSUPP;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*dev_data));
if (!indio_dev)
return -ENOMEM;
dev_data = iio_priv(indio_dev);
dev_data->client = client;
dev_data->res_index = 0;
mutex_init(&dev_data->lock);
indio_dev->info = &htu21_info;
indio_dev->name = id->name;
indio_dev->modes = INDIO_DIRECT_MODE;
if (id->driver_data == MS8607) {
indio_dev->channels = ms8607_channels;
indio_dev->num_channels = ARRAY_SIZE(ms8607_channels);
} else {
indio_dev->channels = htu21_channels;
indio_dev->num_channels = ARRAY_SIZE(htu21_channels);
}
i2c_set_clientdata(client, indio_dev);
ret = ms_sensors_reset(client, HTU21_RESET, 15000);
if (ret)
return ret;
ret = ms_sensors_read_serial(client, &serial_number);
if (ret)
return ret;
dev_info(&client->dev, "Serial number : %llx", serial_number);
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id htu21_id[] = {
{"htu21", HTU21},
{"ms8607-humidity", MS8607},
{}
};
MODULE_DEVICE_TABLE(i2c, htu21_id);
static const struct of_device_id htu21_of_match[] = {
{ .compatible = "meas,htu21", },
{ .compatible = "meas,ms8607-humidity", },
{ },
};
MODULE_DEVICE_TABLE(of, htu21_of_match);
static struct i2c_driver htu21_driver = {
.probe = htu21_probe,
.id_table = htu21_id,
.driver = {
.name = "htu21",
.of_match_table = htu21_of_match,
},
};
module_i2c_driver(htu21_driver);
MODULE_DESCRIPTION("Measurement-Specialties htu21 temperature and humidity driver");
MODULE_AUTHOR("William Markezana <[email protected]>");
MODULE_AUTHOR("Ludovic Tancerel <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_MEAS_SPEC_SENSORS);
| linux-master | drivers/iio/humidity/htu21.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* hdc100x.c - Support for the TI HDC100x temperature + humidity sensors
*
* Copyright (C) 2015, 2018
* Author: Matt Ranostay <[email protected]>
*
* Datasheets:
* https://www.ti.com/product/HDC1000/datasheet
* https://www.ti.com/product/HDC1008/datasheet
* https://www.ti.com/product/HDC1010/datasheet
* https://www.ti.com/product/HDC1050/datasheet
* https://www.ti.com/product/HDC1080/datasheet
*/
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/time.h>
#define HDC100X_REG_TEMP 0x00
#define HDC100X_REG_HUMIDITY 0x01
#define HDC100X_REG_CONFIG 0x02
#define HDC100X_REG_CONFIG_ACQ_MODE BIT(12)
#define HDC100X_REG_CONFIG_HEATER_EN BIT(13)
struct hdc100x_data {
struct i2c_client *client;
struct mutex lock;
u16 config;
/* integration time of the sensor */
int adc_int_us[2];
/* Ensure natural alignment of timestamp */
struct {
__be16 channels[2];
s64 ts __aligned(8);
} scan;
};
/* integration time in us */
static const int hdc100x_int_time[][3] = {
{ 6350, 3650, 0 }, /* IIO_TEMP channel*/
{ 6500, 3850, 2500 }, /* IIO_HUMIDITYRELATIVE channel */
};
/* HDC100X_REG_CONFIG shift and mask values */
static const struct {
int shift;
int mask;
} hdc100x_resolution_shift[2] = {
{ /* IIO_TEMP channel */
.shift = 10,
.mask = 1
},
{ /* IIO_HUMIDITYRELATIVE channel */
.shift = 8,
.mask = 3,
},
};
static IIO_CONST_ATTR(temp_integration_time_available,
"0.00365 0.00635");
static IIO_CONST_ATTR(humidityrelative_integration_time_available,
"0.0025 0.00385 0.0065");
static IIO_CONST_ATTR(out_current_heater_raw_available,
"0 1");
static struct attribute *hdc100x_attributes[] = {
&iio_const_attr_temp_integration_time_available.dev_attr.attr,
&iio_const_attr_humidityrelative_integration_time_available.dev_attr.attr,
&iio_const_attr_out_current_heater_raw_available.dev_attr.attr,
NULL
};
static const struct attribute_group hdc100x_attribute_group = {
.attrs = hdc100x_attributes,
};
static const struct iio_chan_spec hdc100x_channels[] = {
{
.type = IIO_TEMP,
.address = HDC100X_REG_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_INT_TIME) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
},
{
.type = IIO_HUMIDITYRELATIVE,
.address = HDC100X_REG_HUMIDITY,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_INT_TIME),
.scan_index = 1,
.scan_type = {
.sign = 'u',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
},
{
.type = IIO_CURRENT,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.extend_name = "heater",
.output = 1,
.scan_index = -1,
},
IIO_CHAN_SOFT_TIMESTAMP(2),
};
static const unsigned long hdc100x_scan_masks[] = {0x3, 0};
static int hdc100x_update_config(struct hdc100x_data *data, int mask, int val)
{
int tmp = (~mask & data->config) | val;
int ret;
ret = i2c_smbus_write_word_swapped(data->client,
HDC100X_REG_CONFIG, tmp);
if (!ret)
data->config = tmp;
return ret;
}
static int hdc100x_set_it_time(struct hdc100x_data *data, int chan, int val2)
{
int shift = hdc100x_resolution_shift[chan].shift;
int ret = -EINVAL;
int i;
for (i = 0; i < ARRAY_SIZE(hdc100x_int_time[chan]); i++) {
if (val2 && val2 == hdc100x_int_time[chan][i]) {
ret = hdc100x_update_config(data,
hdc100x_resolution_shift[chan].mask << shift,
i << shift);
if (!ret)
data->adc_int_us[chan] = val2;
break;
}
}
return ret;
}
static int hdc100x_get_measurement(struct hdc100x_data *data,
struct iio_chan_spec const *chan)
{
struct i2c_client *client = data->client;
int delay = data->adc_int_us[chan->address] + 1*USEC_PER_MSEC;
int ret;
__be16 val;
/* start measurement */
ret = i2c_smbus_write_byte(client, chan->address);
if (ret < 0) {
dev_err(&client->dev, "cannot start measurement");
return ret;
}
/* wait for integration time to pass */
usleep_range(delay, delay + 1000);
/* read measurement */
ret = i2c_master_recv(data->client, (char *)&val, sizeof(val));
if (ret < 0) {
dev_err(&client->dev, "cannot read sensor data\n");
return ret;
}
return be16_to_cpu(val);
}
static int hdc100x_get_heater_status(struct hdc100x_data *data)
{
return !!(data->config & HDC100X_REG_CONFIG_HEATER_EN);
}
static int hdc100x_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct hdc100x_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW: {
int ret;
mutex_lock(&data->lock);
if (chan->type == IIO_CURRENT) {
*val = hdc100x_get_heater_status(data);
ret = IIO_VAL_INT;
} else {
ret = iio_device_claim_direct_mode(indio_dev);
if (ret) {
mutex_unlock(&data->lock);
return ret;
}
ret = hdc100x_get_measurement(data, chan);
iio_device_release_direct_mode(indio_dev);
if (ret >= 0) {
*val = ret;
ret = IIO_VAL_INT;
}
}
mutex_unlock(&data->lock);
return ret;
}
case IIO_CHAN_INFO_INT_TIME:
*val = 0;
*val2 = data->adc_int_us[chan->address];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SCALE:
if (chan->type == IIO_TEMP) {
*val = 165000;
*val2 = 65536;
return IIO_VAL_FRACTIONAL;
} else {
*val = 100000;
*val2 = 65536;
return IIO_VAL_FRACTIONAL;
}
break;
case IIO_CHAN_INFO_OFFSET:
*val = -15887;
*val2 = 515151;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int hdc100x_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct hdc100x_data *data = iio_priv(indio_dev);
int ret = -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_INT_TIME:
if (val != 0)
return -EINVAL;
mutex_lock(&data->lock);
ret = hdc100x_set_it_time(data, chan->address, val2);
mutex_unlock(&data->lock);
return ret;
case IIO_CHAN_INFO_RAW:
if (chan->type != IIO_CURRENT || val2 != 0)
return -EINVAL;
mutex_lock(&data->lock);
ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_HEATER_EN,
val ? HDC100X_REG_CONFIG_HEATER_EN : 0);
mutex_unlock(&data->lock);
return ret;
default:
return -EINVAL;
}
}
static int hdc100x_buffer_postenable(struct iio_dev *indio_dev)
{
struct hdc100x_data *data = iio_priv(indio_dev);
int ret;
/* Buffer is enabled. First set ACQ Mode, then attach poll func */
mutex_lock(&data->lock);
ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE,
HDC100X_REG_CONFIG_ACQ_MODE);
mutex_unlock(&data->lock);
return ret;
}
static int hdc100x_buffer_predisable(struct iio_dev *indio_dev)
{
struct hdc100x_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->lock);
ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0);
mutex_unlock(&data->lock);
return ret;
}
static const struct iio_buffer_setup_ops hdc_buffer_setup_ops = {
.postenable = hdc100x_buffer_postenable,
.predisable = hdc100x_buffer_predisable,
};
static irqreturn_t hdc100x_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct hdc100x_data *data = iio_priv(indio_dev);
struct i2c_client *client = data->client;
int delay = data->adc_int_us[0] + data->adc_int_us[1] + 2*USEC_PER_MSEC;
int ret;
/* dual read starts at temp register */
mutex_lock(&data->lock);
ret = i2c_smbus_write_byte(client, HDC100X_REG_TEMP);
if (ret < 0) {
dev_err(&client->dev, "cannot start measurement\n");
goto err;
}
usleep_range(delay, delay + 1000);
ret = i2c_master_recv(client, (u8 *)data->scan.channels, 4);
if (ret < 0) {
dev_err(&client->dev, "cannot read sensor data\n");
goto err;
}
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
iio_get_time_ns(indio_dev));
err:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static const struct iio_info hdc100x_info = {
.read_raw = hdc100x_read_raw,
.write_raw = hdc100x_write_raw,
.attrs = &hdc100x_attribute_group,
};
static int hdc100x_probe(struct i2c_client *client)
{
struct iio_dev *indio_dev;
struct hdc100x_data *data;
int ret;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA |
I2C_FUNC_SMBUS_BYTE | I2C_FUNC_I2C))
return -EOPNOTSUPP;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
mutex_init(&data->lock);
indio_dev->name = dev_name(&client->dev);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &hdc100x_info;
indio_dev->channels = hdc100x_channels;
indio_dev->num_channels = ARRAY_SIZE(hdc100x_channels);
indio_dev->available_scan_masks = hdc100x_scan_masks;
/* be sure we are in a known state */
hdc100x_set_it_time(data, 0, hdc100x_int_time[0][0]);
hdc100x_set_it_time(data, 1, hdc100x_int_time[1][0]);
hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0);
ret = devm_iio_triggered_buffer_setup(&client->dev,
indio_dev, NULL,
hdc100x_trigger_handler,
&hdc_buffer_setup_ops);
if (ret < 0) {
dev_err(&client->dev, "iio triggered buffer setup failed\n");
return ret;
}
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id hdc100x_id[] = {
{ "hdc100x", 0 },
{ "hdc1000", 0 },
{ "hdc1008", 0 },
{ "hdc1010", 0 },
{ "hdc1050", 0 },
{ "hdc1080", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, hdc100x_id);
static const struct of_device_id hdc100x_dt_ids[] = {
{ .compatible = "ti,hdc1000" },
{ .compatible = "ti,hdc1008" },
{ .compatible = "ti,hdc1010" },
{ .compatible = "ti,hdc1050" },
{ .compatible = "ti,hdc1080" },
{ }
};
MODULE_DEVICE_TABLE(of, hdc100x_dt_ids);
static const struct acpi_device_id hdc100x_acpi_match[] = {
{ "TXNW1010" },
{ }
};
MODULE_DEVICE_TABLE(acpi, hdc100x_acpi_match);
static struct i2c_driver hdc100x_driver = {
.driver = {
.name = "hdc100x",
.of_match_table = hdc100x_dt_ids,
.acpi_match_table = hdc100x_acpi_match,
},
.probe = hdc100x_probe,
.id_table = hdc100x_id,
};
module_i2c_driver(hdc100x_driver);
MODULE_AUTHOR("Matt Ranostay <[email protected]>");
MODULE_DESCRIPTION("TI HDC100x humidity and temperature sensor driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/humidity/hdc100x.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2022 Analog Devices, Inc.
* Author: Cosmin Tanislav <[email protected]>
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/crc8.h>
#include <linux/device.h>
#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
#include <linux/units.h>
#include <asm/unaligned.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#define AD74115_NAME "ad74115"
#define AD74115_CH_FUNC_SETUP_REG 0x01
#define AD74115_ADC_CONFIG_REG 0x02
#define AD74115_ADC_CONFIG_CONV2_RATE_MASK GENMASK(15, 13)
#define AD74115_ADC_CONFIG_CONV1_RATE_MASK GENMASK(12, 10)
#define AD74115_ADC_CONFIG_CONV2_RANGE_MASK GENMASK(9, 7)
#define AD74115_ADC_CONFIG_CONV1_RANGE_MASK GENMASK(6, 4)
#define AD74115_PWR_OPTIM_CONFIG_REG 0x03
#define AD74115_DIN_CONFIG1_REG 0x04
#define AD74115_DIN_COMPARATOR_EN_MASK BIT(13)
#define AD74115_DIN_SINK_MASK GENMASK(11, 7)
#define AD74115_DIN_DEBOUNCE_MASK GENMASK(4, 0)
#define AD74115_DIN_CONFIG2_REG 0x05
#define AD74115_COMP_THRESH_MASK GENMASK(6, 0)
#define AD74115_OUTPUT_CONFIG_REG 0x06
#define AD74115_OUTPUT_SLEW_EN_MASK GENMASK(6, 5)
#define AD74115_OUTPUT_SLEW_LIN_STEP_MASK GENMASK(4, 3)
#define AD74115_OUTPUT_SLEW_LIN_RATE_MASK GENMASK(2, 1)
#define AD74115_RTD3W4W_CONFIG_REG 0x07
#define AD74115_BURNOUT_CONFIG_REG 0x0a
#define AD74115_BURNOUT_EXT2_EN_MASK BIT(10)
#define AD74115_BURNOUT_EXT1_EN_MASK BIT(5)
#define AD74115_BURNOUT_VIOUT_EN_MASK BIT(0)
#define AD74115_DAC_CODE_REG 0x0b
#define AD74115_DAC_ACTIVE_REG 0x0d
#define AD74115_GPIO_CONFIG_X_REG(x) (0x35 + (x))
#define AD74115_GPIO_CONFIG_GPI_DATA BIT(5)
#define AD74115_GPIO_CONFIG_GPO_DATA BIT(4)
#define AD74115_GPIO_CONFIG_SELECT_MASK GENMASK(2, 0)
#define AD74115_CHARGE_PUMP_REG 0x3a
#define AD74115_ADC_CONV_CTRL_REG 0x3b
#define AD74115_ADC_CONV_SEQ_MASK GENMASK(13, 12)
#define AD74115_DIN_COMP_OUT_REG 0x40
#define AD74115_LIVE_STATUS_REG 0x42
#define AD74115_ADC_DATA_RDY_MASK BIT(3)
#define AD74115_READ_SELECT_REG 0x64
#define AD74115_CMD_KEY_REG 0x78
#define AD74115_CMD_KEY_RESET1 0x15fa
#define AD74115_CMD_KEY_RESET2 0xaf51
#define AD74115_CRC_POLYNOMIAL 0x7
DECLARE_CRC8_TABLE(ad74115_crc8_table);
#define AD74115_ADC_CODE_MAX ((int)GENMASK(15, 0))
#define AD74115_ADC_CODE_HALF (AD74115_ADC_CODE_MAX / 2)
#define AD74115_DAC_VOLTAGE_MAX 12000
#define AD74115_DAC_CURRENT_MAX 25
#define AD74115_DAC_CODE_MAX ((int)GENMASK(13, 0))
#define AD74115_DAC_CODE_HALF (AD74115_DAC_CODE_MAX / 2)
#define AD74115_COMP_THRESH_MAX 98
#define AD74115_SENSE_RESISTOR_OHMS 100
#define AD74115_REF_RESISTOR_OHMS 2100
#define AD74115_DIN_SINK_LOW_STEP 120
#define AD74115_DIN_SINK_HIGH_STEP 240
#define AD74115_DIN_SINK_MAX 31
#define AD74115_FRAME_SIZE 4
#define AD74115_GPIO_NUM 4
#define AD74115_CONV_TIME_US 1000000
enum ad74115_dac_ch {
AD74115_DAC_CH_MAIN,
AD74115_DAC_CH_COMPARATOR,
};
enum ad74115_adc_ch {
AD74115_ADC_CH_CONV1,
AD74115_ADC_CH_CONV2,
AD74115_ADC_CH_NUM
};
enum ad74115_ch_func {
AD74115_CH_FUNC_HIGH_IMPEDANCE,
AD74115_CH_FUNC_VOLTAGE_OUTPUT,
AD74115_CH_FUNC_CURRENT_OUTPUT,
AD74115_CH_FUNC_VOLTAGE_INPUT,
AD74115_CH_FUNC_CURRENT_INPUT_EXT_POWER,
AD74115_CH_FUNC_CURRENT_INPUT_LOOP_POWER,
AD74115_CH_FUNC_2_WIRE_RESISTANCE_INPUT,
AD74115_CH_FUNC_3_4_WIRE_RESISTANCE_INPUT,
AD74115_CH_FUNC_DIGITAL_INPUT_LOGIC,
AD74115_CH_FUNC_DIGITAL_INPUT_LOOP_POWER,
AD74115_CH_FUNC_CURRENT_OUTPUT_HART,
AD74115_CH_FUNC_CURRENT_INPUT_EXT_POWER_HART,
AD74115_CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART,
AD74115_CH_FUNC_MAX = AD74115_CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART,
AD74115_CH_FUNC_NUM
};
enum ad74115_adc_range {
AD74115_ADC_RANGE_12V,
AD74115_ADC_RANGE_12V_BIPOLAR,
AD74115_ADC_RANGE_2_5V_BIPOLAR,
AD74115_ADC_RANGE_2_5V_NEG,
AD74115_ADC_RANGE_2_5V,
AD74115_ADC_RANGE_0_625V,
AD74115_ADC_RANGE_104MV_BIPOLAR,
AD74115_ADC_RANGE_12V_OTHER,
AD74115_ADC_RANGE_MAX = AD74115_ADC_RANGE_12V_OTHER,
AD74115_ADC_RANGE_NUM
};
enum ad74115_adc_conv_seq {
AD74115_ADC_CONV_SEQ_STANDBY = 0b00,
AD74115_ADC_CONV_SEQ_SINGLE = 0b01,
AD74115_ADC_CONV_SEQ_CONTINUOUS = 0b10,
};
enum ad74115_din_threshold_mode {
AD74115_DIN_THRESHOLD_MODE_AVDD,
AD74115_DIN_THRESHOLD_MODE_FIXED,
AD74115_DIN_THRESHOLD_MODE_MAX = AD74115_DIN_THRESHOLD_MODE_FIXED,
};
enum ad74115_slew_mode {
AD74115_SLEW_MODE_DISABLED,
AD74115_SLEW_MODE_LINEAR,
AD74115_SLEW_MODE_HART,
};
enum ad74115_slew_step {
AD74115_SLEW_STEP_0_8_PERCENT,
AD74115_SLEW_STEP_1_5_PERCENT,
AD74115_SLEW_STEP_6_1_PERCENT,
AD74115_SLEW_STEP_22_2_PERCENT,
};
enum ad74115_slew_rate {
AD74115_SLEW_RATE_4KHZ,
AD74115_SLEW_RATE_64KHZ,
AD74115_SLEW_RATE_150KHZ,
AD74115_SLEW_RATE_240KHZ,
};
enum ad74115_gpio_config {
AD74115_GPIO_CONFIG_OUTPUT_BUFFERED = 0b010,
AD74115_GPIO_CONFIG_INPUT = 0b011,
};
enum ad74115_gpio_mode {
AD74115_GPIO_MODE_LOGIC = 1,
AD74115_GPIO_MODE_SPECIAL = 2,
};
struct ad74115_channels {
struct iio_chan_spec *channels;
unsigned int num_channels;
};
struct ad74115_state {
struct spi_device *spi;
struct regmap *regmap;
struct iio_trigger *trig;
struct regulator *avdd;
/*
* Synchronize consecutive operations when doing a one-shot
* conversion and when updating the ADC samples SPI message.
*/
struct mutex lock;
struct gpio_chip gc;
struct gpio_chip comp_gc;
int irq;
unsigned int avdd_mv;
unsigned long gpio_valid_mask;
bool dac_bipolar;
bool dac_hart_slew;
bool rtd_mode_4_wire;
enum ad74115_ch_func ch_func;
enum ad74115_din_threshold_mode din_threshold_mode;
struct completion adc_data_completion;
struct spi_message adc_samples_msg;
struct spi_transfer adc_samples_xfer[AD74115_ADC_CH_NUM + 1];
/*
* DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache lines.
*/
u8 reg_tx_buf[AD74115_FRAME_SIZE] __aligned(IIO_DMA_MINALIGN);
u8 reg_rx_buf[AD74115_FRAME_SIZE];
u8 adc_samples_tx_buf[AD74115_FRAME_SIZE * AD74115_ADC_CH_NUM];
u8 adc_samples_rx_buf[AD74115_FRAME_SIZE * AD74115_ADC_CH_NUM];
};
struct ad74115_fw_prop {
const char *name;
bool is_boolean;
bool negate;
unsigned int max;
unsigned int reg;
unsigned int mask;
const unsigned int *lookup_tbl;
unsigned int lookup_tbl_len;
};
#define AD74115_FW_PROP(_name, _max, _reg, _mask) \
{ \
.name = (_name), \
.max = (_max), \
.reg = (_reg), \
.mask = (_mask), \
}
#define AD74115_FW_PROP_TBL(_name, _tbl, _reg, _mask) \
{ \
.name = (_name), \
.reg = (_reg), \
.mask = (_mask), \
.lookup_tbl = (_tbl), \
.lookup_tbl_len = ARRAY_SIZE(_tbl), \
}
#define AD74115_FW_PROP_BOOL(_name, _reg, _mask) \
{ \
.name = (_name), \
.is_boolean = true, \
.reg = (_reg), \
.mask = (_mask), \
}
#define AD74115_FW_PROP_BOOL_NEG(_name, _reg, _mask) \
{ \
.name = (_name), \
.is_boolean = true, \
.negate = true, \
.reg = (_reg), \
.mask = (_mask), \
}
static const int ad74115_dac_rate_tbl[] = {
0,
4 * 8,
4 * 15,
4 * 61,
4 * 222,
64 * 8,
64 * 15,
64 * 61,
64 * 222,
150 * 8,
150 * 15,
150 * 61,
150 * 222,
240 * 8,
240 * 15,
240 * 61,
240 * 222,
};
static const unsigned int ad74115_dac_rate_step_tbl[][3] = {
{ AD74115_SLEW_MODE_DISABLED },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_0_8_PERCENT, AD74115_SLEW_RATE_4KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_1_5_PERCENT, AD74115_SLEW_RATE_4KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_6_1_PERCENT, AD74115_SLEW_RATE_4KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_22_2_PERCENT, AD74115_SLEW_RATE_4KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_0_8_PERCENT, AD74115_SLEW_RATE_64KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_1_5_PERCENT, AD74115_SLEW_RATE_64KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_6_1_PERCENT, AD74115_SLEW_RATE_64KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_22_2_PERCENT, AD74115_SLEW_RATE_64KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_0_8_PERCENT, AD74115_SLEW_RATE_150KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_1_5_PERCENT, AD74115_SLEW_RATE_150KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_6_1_PERCENT, AD74115_SLEW_RATE_150KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_22_2_PERCENT, AD74115_SLEW_RATE_150KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_0_8_PERCENT, AD74115_SLEW_RATE_240KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_1_5_PERCENT, AD74115_SLEW_RATE_240KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_6_1_PERCENT, AD74115_SLEW_RATE_240KHZ },
{ AD74115_SLEW_MODE_LINEAR, AD74115_SLEW_STEP_22_2_PERCENT, AD74115_SLEW_RATE_240KHZ },
};
static const unsigned int ad74115_rtd_excitation_current_ua_tbl[] = {
250, 500, 750, 1000
};
static const unsigned int ad74115_burnout_current_na_tbl[] = {
0, 50, 0, 500, 1000, 0, 10000, 0
};
static const unsigned int ad74115_viout_burnout_current_na_tbl[] = {
0, 0, 0, 0, 1000, 0, 10000, 0
};
static const unsigned int ad74115_gpio_mode_tbl[] = {
0, 0, 0, 1, 2, 3, 4, 5
};
static const unsigned int ad74115_adc_conv_rate_tbl[] = {
10, 20, 1200, 4800, 9600
};
static const unsigned int ad74115_debounce_tbl[] = {
0, 13, 18, 24, 32, 42, 56, 75,
100, 130, 180, 240, 320, 420, 560, 750,
1000, 1300, 1800, 2400, 3200, 4200, 5600, 7500,
10000, 13000, 18000, 24000, 32000, 42000, 56000, 75000,
};
static const unsigned int ad74115_adc_ch_data_regs_tbl[] = {
[AD74115_ADC_CH_CONV1] = 0x44,
[AD74115_ADC_CH_CONV2] = 0x46,
};
static const unsigned int ad74115_adc_ch_en_bit_tbl[] = {
[AD74115_ADC_CH_CONV1] = BIT(0),
[AD74115_ADC_CH_CONV2] = BIT(1),
};
static const bool ad74115_adc_bipolar_tbl[AD74115_ADC_RANGE_NUM] = {
[AD74115_ADC_RANGE_12V_BIPOLAR] = true,
[AD74115_ADC_RANGE_2_5V_BIPOLAR] = true,
[AD74115_ADC_RANGE_104MV_BIPOLAR] = true,
};
static const unsigned int ad74115_adc_conv_mul_tbl[AD74115_ADC_RANGE_NUM] = {
[AD74115_ADC_RANGE_12V] = 12000,
[AD74115_ADC_RANGE_12V_BIPOLAR] = 24000,
[AD74115_ADC_RANGE_2_5V_BIPOLAR] = 5000,
[AD74115_ADC_RANGE_2_5V_NEG] = 2500,
[AD74115_ADC_RANGE_2_5V] = 2500,
[AD74115_ADC_RANGE_0_625V] = 625,
[AD74115_ADC_RANGE_104MV_BIPOLAR] = 208,
[AD74115_ADC_RANGE_12V_OTHER] = 12000,
};
static const unsigned int ad74115_adc_gain_tbl[AD74115_ADC_RANGE_NUM][2] = {
[AD74115_ADC_RANGE_12V] = { 5, 24 },
[AD74115_ADC_RANGE_12V_BIPOLAR] = { 5, 24 },
[AD74115_ADC_RANGE_2_5V_BIPOLAR] = { 1, 1 },
[AD74115_ADC_RANGE_2_5V_NEG] = { 1, 1 },
[AD74115_ADC_RANGE_2_5V] = { 1, 1 },
[AD74115_ADC_RANGE_0_625V] = { 4, 1 },
[AD74115_ADC_RANGE_104MV_BIPOLAR] = { 24, 1 },
[AD74115_ADC_RANGE_12V_OTHER] = { 5, 24 },
};
static const int ad74115_adc_range_tbl[AD74115_ADC_RANGE_NUM][2] = {
[AD74115_ADC_RANGE_12V] = { 0, 12000000 },
[AD74115_ADC_RANGE_12V_BIPOLAR] = { -12000000, 12000000 },
[AD74115_ADC_RANGE_2_5V_BIPOLAR] = { -2500000, 2500000 },
[AD74115_ADC_RANGE_2_5V_NEG] = { -2500000, 0 },
[AD74115_ADC_RANGE_2_5V] = { 0, 2500000 },
[AD74115_ADC_RANGE_0_625V] = { 0, 625000 },
[AD74115_ADC_RANGE_104MV_BIPOLAR] = { -104000, 104000 },
[AD74115_ADC_RANGE_12V_OTHER] = { 0, 12000000 },
};
static int _ad74115_find_tbl_index(const unsigned int *tbl, unsigned int tbl_len,
unsigned int val, unsigned int *index)
{
unsigned int i;
for (i = 0; i < tbl_len; i++)
if (val == tbl[i]) {
*index = i;
return 0;
}
return -EINVAL;
}
#define ad74115_find_tbl_index(tbl, val, index) \
_ad74115_find_tbl_index(tbl, ARRAY_SIZE(tbl), val, index)
static int ad74115_crc(u8 *buf)
{
return crc8(ad74115_crc8_table, buf, 3, 0);
}
static void ad74115_format_reg_write(u8 reg, u16 val, u8 *buf)
{
buf[0] = reg;
put_unaligned_be16(val, &buf[1]);
buf[3] = ad74115_crc(buf);
}
static int ad74115_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct ad74115_state *st = context;
ad74115_format_reg_write(reg, val, st->reg_tx_buf);
return spi_write(st->spi, st->reg_tx_buf, AD74115_FRAME_SIZE);
}
static int ad74115_crc_check(struct ad74115_state *st, u8 *buf)
{
struct device *dev = &st->spi->dev;
u8 expected_crc = ad74115_crc(buf);
if (buf[3] != expected_crc) {
dev_err(dev, "Bad CRC %02x for %02x%02x%02x, expected %02x\n",
buf[3], buf[0], buf[1], buf[2], expected_crc);
return -EINVAL;
}
return 0;
}
static int ad74115_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct ad74115_state *st = context;
struct spi_transfer reg_read_xfer[] = {
{
.tx_buf = st->reg_tx_buf,
.len = sizeof(st->reg_tx_buf),
.cs_change = 1,
},
{
.rx_buf = st->reg_rx_buf,
.len = sizeof(st->reg_rx_buf),
},
};
int ret;
ad74115_format_reg_write(AD74115_READ_SELECT_REG, reg, st->reg_tx_buf);
ret = spi_sync_transfer(st->spi, reg_read_xfer, ARRAY_SIZE(reg_read_xfer));
if (ret)
return ret;
ret = ad74115_crc_check(st, st->reg_rx_buf);
if (ret)
return ret;
*val = get_unaligned_be16(&st->reg_rx_buf[1]);
return 0;
}
static const struct regmap_config ad74115_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.reg_read = ad74115_reg_read,
.reg_write = ad74115_reg_write,
};
static int ad74115_gpio_config_set(struct ad74115_state *st, unsigned int offset,
enum ad74115_gpio_config cfg)
{
return regmap_update_bits(st->regmap, AD74115_GPIO_CONFIG_X_REG(offset),
AD74115_GPIO_CONFIG_SELECT_MASK,
FIELD_PREP(AD74115_GPIO_CONFIG_SELECT_MASK, cfg));
}
static int ad74115_gpio_init_valid_mask(struct gpio_chip *gc,
unsigned long *valid_mask,
unsigned int ngpios)
{
struct ad74115_state *st = gpiochip_get_data(gc);
*valid_mask = st->gpio_valid_mask;
return 0;
}
static int ad74115_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
{
struct ad74115_state *st = gpiochip_get_data(gc);
unsigned int val;
int ret;
ret = regmap_read(st->regmap, AD74115_GPIO_CONFIG_X_REG(offset), &val);
if (ret)
return ret;
return FIELD_GET(AD74115_GPIO_CONFIG_SELECT_MASK, val) == AD74115_GPIO_CONFIG_INPUT;
}
static int ad74115_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
{
struct ad74115_state *st = gpiochip_get_data(gc);
return ad74115_gpio_config_set(st, offset, AD74115_GPIO_CONFIG_INPUT);
}
static int ad74115_gpio_direction_output(struct gpio_chip *gc, unsigned int offset,
int value)
{
struct ad74115_state *st = gpiochip_get_data(gc);
return ad74115_gpio_config_set(st, offset, AD74115_GPIO_CONFIG_OUTPUT_BUFFERED);
}
static int ad74115_gpio_get(struct gpio_chip *gc, unsigned int offset)
{
struct ad74115_state *st = gpiochip_get_data(gc);
unsigned int val;
int ret;
ret = regmap_read(st->regmap, AD74115_GPIO_CONFIG_X_REG(offset), &val);
if (ret)
return ret;
return FIELD_GET(AD74115_GPIO_CONFIG_GPI_DATA, val);
}
static void ad74115_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
{
struct ad74115_state *st = gpiochip_get_data(gc);
struct device *dev = &st->spi->dev;
int ret;
ret = regmap_update_bits(st->regmap, AD74115_GPIO_CONFIG_X_REG(offset),
AD74115_GPIO_CONFIG_GPO_DATA,
FIELD_PREP(AD74115_GPIO_CONFIG_GPO_DATA, value));
if (ret)
dev_err(dev, "Failed to set GPIO %u output value, err: %d\n",
offset, ret);
}
static int ad74115_set_comp_debounce(struct ad74115_state *st, unsigned int val)
{
unsigned int len = ARRAY_SIZE(ad74115_debounce_tbl);
unsigned int i;
for (i = 0; i < len; i++)
if (val <= ad74115_debounce_tbl[i])
break;
if (i == len)
i = len - 1;
return regmap_update_bits(st->regmap, AD74115_DIN_CONFIG1_REG,
AD74115_DIN_DEBOUNCE_MASK,
FIELD_PREP(AD74115_DIN_DEBOUNCE_MASK, val));
}
static int ad74115_comp_gpio_get_direction(struct gpio_chip *chip,
unsigned int offset)
{
return GPIO_LINE_DIRECTION_IN;
}
static int ad74115_comp_gpio_set_config(struct gpio_chip *chip,
unsigned int offset,
unsigned long config)
{
struct ad74115_state *st = gpiochip_get_data(chip);
u32 param = pinconf_to_config_param(config);
u32 arg = pinconf_to_config_argument(config);
switch (param) {
case PIN_CONFIG_INPUT_DEBOUNCE:
return ad74115_set_comp_debounce(st, arg);
default:
return -ENOTSUPP;
}
}
static int ad74115_comp_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct ad74115_state *st = gpiochip_get_data(chip);
unsigned int val;
int ret;
ret = regmap_read(st->regmap, AD74115_DIN_COMP_OUT_REG, &val);
if (ret)
return ret;
return !!val;
}
static irqreturn_t ad74115_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct ad74115_state *st = iio_priv(indio_dev);
int ret;
ret = spi_sync(st->spi, &st->adc_samples_msg);
if (ret)
goto out;
iio_push_to_buffers(indio_dev, st->adc_samples_rx_buf);
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t ad74115_adc_data_interrupt(int irq, void *data)
{
struct iio_dev *indio_dev = data;
struct ad74115_state *st = iio_priv(indio_dev);
if (iio_buffer_enabled(indio_dev))
iio_trigger_poll(st->trig);
else
complete(&st->adc_data_completion);
return IRQ_HANDLED;
}
static int ad74115_set_adc_ch_en(struct ad74115_state *st,
enum ad74115_adc_ch channel, bool status)
{
unsigned int mask = ad74115_adc_ch_en_bit_tbl[channel];
return regmap_update_bits(st->regmap, AD74115_ADC_CONV_CTRL_REG, mask,
status ? mask : 0);
}
static int ad74115_set_adc_conv_seq(struct ad74115_state *st,
enum ad74115_adc_conv_seq conv_seq)
{
return regmap_update_bits(st->regmap, AD74115_ADC_CONV_CTRL_REG,
AD74115_ADC_CONV_SEQ_MASK,
FIELD_PREP(AD74115_ADC_CONV_SEQ_MASK, conv_seq));
}
static int ad74115_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *active_scan_mask)
{
struct ad74115_state *st = iio_priv(indio_dev);
struct spi_transfer *xfer = st->adc_samples_xfer;
u8 *rx_buf = st->adc_samples_rx_buf;
u8 *tx_buf = st->adc_samples_tx_buf;
unsigned int i;
int ret = 0;
mutex_lock(&st->lock);
spi_message_init(&st->adc_samples_msg);
for_each_clear_bit(i, active_scan_mask, AD74115_ADC_CH_NUM) {
ret = ad74115_set_adc_ch_en(st, i, false);
if (ret)
goto out;
}
/*
* The read select register is used to select which register's value
* will be sent by the slave on the next SPI frame.
*
* Create an SPI message that, on each step, writes to the read select
* register to select the ADC result of the next enabled channel, and
* reads the ADC result of the previous enabled channel.
*
* Example:
* W: [WCH1] [WCH2] [WCH2] [WCH3] [ ]
* R: [ ] [RCH1] [RCH2] [RCH3] [RCH4]
*/
for_each_set_bit(i, active_scan_mask, AD74115_ADC_CH_NUM) {
ret = ad74115_set_adc_ch_en(st, i, true);
if (ret)
goto out;
if (xfer == st->adc_samples_xfer)
xfer->rx_buf = NULL;
else
xfer->rx_buf = rx_buf;
xfer->tx_buf = tx_buf;
xfer->len = AD74115_FRAME_SIZE;
xfer->cs_change = 1;
ad74115_format_reg_write(AD74115_READ_SELECT_REG,
ad74115_adc_ch_data_regs_tbl[i], tx_buf);
spi_message_add_tail(xfer, &st->adc_samples_msg);
tx_buf += AD74115_FRAME_SIZE;
if (xfer != st->adc_samples_xfer)
rx_buf += AD74115_FRAME_SIZE;
xfer++;
}
xfer->rx_buf = rx_buf;
xfer->tx_buf = NULL;
xfer->len = AD74115_FRAME_SIZE;
xfer->cs_change = 0;
spi_message_add_tail(xfer, &st->adc_samples_msg);
out:
mutex_unlock(&st->lock);
return ret;
}
static int ad74115_buffer_postenable(struct iio_dev *indio_dev)
{
struct ad74115_state *st = iio_priv(indio_dev);
return ad74115_set_adc_conv_seq(st, AD74115_ADC_CONV_SEQ_CONTINUOUS);
}
static int ad74115_buffer_predisable(struct iio_dev *indio_dev)
{
struct ad74115_state *st = iio_priv(indio_dev);
unsigned int i;
int ret;
mutex_lock(&st->lock);
ret = ad74115_set_adc_conv_seq(st, AD74115_ADC_CONV_SEQ_STANDBY);
if (ret)
goto out;
/*
* update_scan_mode() is not called in the disable path, disable all
* channels here.
*/
for (i = 0; i < AD74115_ADC_CH_NUM; i++) {
ret = ad74115_set_adc_ch_en(st, i, false);
if (ret)
goto out;
}
out:
mutex_unlock(&st->lock);
return ret;
}
static const struct iio_buffer_setup_ops ad74115_buffer_ops = {
.postenable = &ad74115_buffer_postenable,
.predisable = &ad74115_buffer_predisable,
};
static const struct iio_trigger_ops ad74115_trigger_ops = {
.validate_device = iio_trigger_validate_own_device,
};
static int ad74115_get_adc_rate(struct ad74115_state *st,
enum ad74115_adc_ch channel, int *val)
{
unsigned int i;
int ret;
ret = regmap_read(st->regmap, AD74115_ADC_CONFIG_REG, &i);
if (ret)
return ret;
if (channel == AD74115_ADC_CH_CONV1)
i = FIELD_GET(AD74115_ADC_CONFIG_CONV1_RATE_MASK, i);
else
i = FIELD_GET(AD74115_ADC_CONFIG_CONV2_RATE_MASK, i);
*val = ad74115_adc_conv_rate_tbl[i];
return IIO_VAL_INT;
}
static int _ad74115_get_adc_code(struct ad74115_state *st,
enum ad74115_adc_ch channel, int *val)
{
unsigned int uval;
int ret;
reinit_completion(&st->adc_data_completion);
ret = ad74115_set_adc_ch_en(st, channel, true);
if (ret)
return ret;
ret = ad74115_set_adc_conv_seq(st, AD74115_ADC_CONV_SEQ_SINGLE);
if (ret)
return ret;
if (st->irq) {
ret = wait_for_completion_timeout(&st->adc_data_completion,
msecs_to_jiffies(1000));
if (!ret)
return -ETIMEDOUT;
} else {
unsigned int regval, wait_time;
int rate;
ret = ad74115_get_adc_rate(st, channel, &rate);
if (ret < 0)
return ret;
wait_time = DIV_ROUND_CLOSEST(AD74115_CONV_TIME_US, rate);
ret = regmap_read_poll_timeout(st->regmap, AD74115_LIVE_STATUS_REG,
regval, regval & AD74115_ADC_DATA_RDY_MASK,
wait_time, 5 * wait_time);
if (ret)
return ret;
/*
* The ADC_DATA_RDY bit is W1C.
* See datasheet page 98, Table 62. Bit Descriptions for
* LIVE_STATUS.
* Although the datasheet mentions that the bit will auto-clear
* when writing to the ADC_CONV_CTRL register, this does not
* seem to happen.
*/
ret = regmap_write_bits(st->regmap, AD74115_LIVE_STATUS_REG,
AD74115_ADC_DATA_RDY_MASK,
FIELD_PREP(AD74115_ADC_DATA_RDY_MASK, 1));
if (ret)
return ret;
}
ret = regmap_read(st->regmap, ad74115_adc_ch_data_regs_tbl[channel], &uval);
if (ret)
return ret;
ret = ad74115_set_adc_conv_seq(st, AD74115_ADC_CONV_SEQ_STANDBY);
if (ret)
return ret;
ret = ad74115_set_adc_ch_en(st, channel, false);
if (ret)
return ret;
*val = uval;
return IIO_VAL_INT;
}
static int ad74115_get_adc_code(struct iio_dev *indio_dev,
enum ad74115_adc_ch channel, int *val)
{
struct ad74115_state *st = iio_priv(indio_dev);
int ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
ret = _ad74115_get_adc_code(st, channel, val);
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret;
}
static int ad74115_adc_code_to_resistance(int code, int *val, int *val2)
{
if (code == AD74115_ADC_CODE_MAX)
code--;
*val = code * AD74115_REF_RESISTOR_OHMS;
*val2 = AD74115_ADC_CODE_MAX - code;
return IIO_VAL_FRACTIONAL;
}
static int ad74115_set_dac_code(struct ad74115_state *st,
enum ad74115_dac_ch channel, int val)
{
if (val < 0)
return -EINVAL;
if (channel == AD74115_DAC_CH_COMPARATOR) {
if (val > AD74115_COMP_THRESH_MAX)
return -EINVAL;
return regmap_update_bits(st->regmap, AD74115_DIN_CONFIG2_REG,
AD74115_COMP_THRESH_MASK,
FIELD_PREP(AD74115_COMP_THRESH_MASK, val));
}
if (val > AD74115_DAC_CODE_MAX)
return -EINVAL;
return regmap_write(st->regmap, AD74115_DAC_CODE_REG, val);
}
static int ad74115_get_dac_code(struct ad74115_state *st,
enum ad74115_dac_ch channel, int *val)
{
unsigned int uval;
int ret;
if (channel == AD74115_DAC_CH_COMPARATOR)
return -EINVAL;
ret = regmap_read(st->regmap, AD74115_DAC_ACTIVE_REG, &uval);
if (ret)
return ret;
*val = uval;
return IIO_VAL_INT;
}
static int ad74115_set_adc_rate(struct ad74115_state *st,
enum ad74115_adc_ch channel, int val)
{
unsigned int i;
int ret;
ret = ad74115_find_tbl_index(ad74115_adc_conv_rate_tbl, val, &i);
if (ret)
return ret;
if (channel == AD74115_ADC_CH_CONV1)
return regmap_update_bits(st->regmap, AD74115_ADC_CONFIG_REG,
AD74115_ADC_CONFIG_CONV1_RATE_MASK,
FIELD_PREP(AD74115_ADC_CONFIG_CONV1_RATE_MASK, i));
return regmap_update_bits(st->regmap, AD74115_ADC_CONFIG_REG,
AD74115_ADC_CONFIG_CONV2_RATE_MASK,
FIELD_PREP(AD74115_ADC_CONFIG_CONV2_RATE_MASK, i));
}
static int ad74115_get_dac_rate(struct ad74115_state *st, int *val)
{
unsigned int i, en_val, step_val, rate_val, tmp;
int ret;
ret = regmap_read(st->regmap, AD74115_OUTPUT_CONFIG_REG, &tmp);
if (ret)
return ret;
en_val = FIELD_GET(AD74115_OUTPUT_SLEW_EN_MASK, tmp);
step_val = FIELD_GET(AD74115_OUTPUT_SLEW_LIN_STEP_MASK, tmp);
rate_val = FIELD_GET(AD74115_OUTPUT_SLEW_LIN_RATE_MASK, tmp);
for (i = 0; i < ARRAY_SIZE(ad74115_dac_rate_step_tbl); i++)
if (en_val == ad74115_dac_rate_step_tbl[i][0] &&
step_val == ad74115_dac_rate_step_tbl[i][1] &&
rate_val == ad74115_dac_rate_step_tbl[i][2])
break;
if (i == ARRAY_SIZE(ad74115_dac_rate_step_tbl))
return -EINVAL;
*val = ad74115_dac_rate_tbl[i];
return IIO_VAL_INT;
}
static int ad74115_set_dac_rate(struct ad74115_state *st, int val)
{
unsigned int i, en_val, step_val, rate_val, mask, tmp;
int ret;
ret = ad74115_find_tbl_index(ad74115_dac_rate_tbl, val, &i);
if (ret)
return ret;
en_val = ad74115_dac_rate_step_tbl[i][0];
step_val = ad74115_dac_rate_step_tbl[i][1];
rate_val = ad74115_dac_rate_step_tbl[i][2];
mask = AD74115_OUTPUT_SLEW_EN_MASK;
mask |= AD74115_OUTPUT_SLEW_LIN_STEP_MASK;
mask |= AD74115_OUTPUT_SLEW_LIN_RATE_MASK;
tmp = FIELD_PREP(AD74115_OUTPUT_SLEW_EN_MASK, en_val);
tmp |= FIELD_PREP(AD74115_OUTPUT_SLEW_LIN_STEP_MASK, step_val);
tmp |= FIELD_PREP(AD74115_OUTPUT_SLEW_LIN_RATE_MASK, rate_val);
return regmap_update_bits(st->regmap, AD74115_OUTPUT_CONFIG_REG, mask, tmp);
}
static int ad74115_get_dac_scale(struct ad74115_state *st,
struct iio_chan_spec const *chan,
int *val, int *val2)
{
if (chan->channel == AD74115_DAC_CH_MAIN) {
if (chan->type == IIO_VOLTAGE) {
*val = AD74115_DAC_VOLTAGE_MAX;
if (st->dac_bipolar)
*val *= 2;
} else {
*val = AD74115_DAC_CURRENT_MAX;
}
*val2 = AD74115_DAC_CODE_MAX;
} else {
if (st->din_threshold_mode == AD74115_DIN_THRESHOLD_MODE_AVDD) {
*val = 196 * st->avdd_mv;
*val2 = 10 * AD74115_COMP_THRESH_MAX;
} else {
*val = 49000;
*val2 = AD74115_COMP_THRESH_MAX;
}
}
return IIO_VAL_FRACTIONAL;
}
static int ad74115_get_dac_offset(struct ad74115_state *st,
struct iio_chan_spec const *chan, int *val)
{
if (chan->channel == AD74115_DAC_CH_MAIN) {
if (chan->type == IIO_VOLTAGE && st->dac_bipolar)
*val = -AD74115_DAC_CODE_HALF;
else
*val = 0;
} else {
if (st->din_threshold_mode == AD74115_DIN_THRESHOLD_MODE_AVDD)
*val = -48;
else
*val = -38;
}
return IIO_VAL_INT;
}
static int ad74115_get_adc_range(struct ad74115_state *st,
enum ad74115_adc_ch channel, unsigned int *val)
{
int ret;
ret = regmap_read(st->regmap, AD74115_ADC_CONFIG_REG, val);
if (ret)
return ret;
if (channel == AD74115_ADC_CH_CONV1)
*val = FIELD_GET(AD74115_ADC_CONFIG_CONV1_RANGE_MASK, *val);
else
*val = FIELD_GET(AD74115_ADC_CONFIG_CONV2_RANGE_MASK, *val);
return 0;
}
static int ad74115_get_adc_resistance_scale(struct ad74115_state *st,
unsigned int range,
int *val, int *val2)
{
*val = ad74115_adc_gain_tbl[range][1] * AD74115_REF_RESISTOR_OHMS;
*val2 = ad74115_adc_gain_tbl[range][0];
if (ad74115_adc_bipolar_tbl[range])
*val2 *= AD74115_ADC_CODE_HALF;
else
*val2 *= AD74115_ADC_CODE_MAX;
return IIO_VAL_FRACTIONAL;
}
static int ad74115_get_adc_scale(struct ad74115_state *st,
struct iio_chan_spec const *chan,
int *val, int *val2)
{
unsigned int range;
int ret;
ret = ad74115_get_adc_range(st, chan->channel, &range);
if (ret)
return ret;
if (chan->type == IIO_RESISTANCE)
return ad74115_get_adc_resistance_scale(st, range, val, val2);
*val = ad74115_adc_conv_mul_tbl[range];
*val2 = AD74115_ADC_CODE_MAX;
if (chan->type == IIO_CURRENT)
*val2 *= AD74115_SENSE_RESISTOR_OHMS;
return IIO_VAL_FRACTIONAL;
}
static int ad74115_get_adc_resistance_offset(struct ad74115_state *st,
unsigned int range,
int *val, int *val2)
{
unsigned int d = 10 * AD74115_REF_RESISTOR_OHMS
* ad74115_adc_gain_tbl[range][1];
*val = 5;
if (ad74115_adc_bipolar_tbl[range])
*val -= AD74115_ADC_CODE_HALF;
*val *= d;
if (!st->rtd_mode_4_wire) {
/* Add 0.2 Ohm to the final result for 3-wire RTD. */
unsigned int v = 2 * ad74115_adc_gain_tbl[range][0];
if (ad74115_adc_bipolar_tbl[range])
v *= AD74115_ADC_CODE_HALF;
else
v *= AD74115_ADC_CODE_MAX;
*val += v;
}
*val2 = d;
return IIO_VAL_FRACTIONAL;
}
static int ad74115_get_adc_offset(struct ad74115_state *st,
struct iio_chan_spec const *chan,
int *val, int *val2)
{
unsigned int range;
int ret;
ret = ad74115_get_adc_range(st, chan->channel, &range);
if (ret)
return ret;
if (chan->type == IIO_RESISTANCE)
return ad74115_get_adc_resistance_offset(st, range, val, val2);
if (ad74115_adc_bipolar_tbl[range])
*val = -AD74115_ADC_CODE_HALF;
else if (range == AD74115_ADC_RANGE_2_5V_NEG)
*val = -AD74115_ADC_CODE_MAX;
else
*val = 0;
return IIO_VAL_INT;
}
static int ad74115_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long info)
{
struct ad74115_state *st = iio_priv(indio_dev);
int ret;
switch (info) {
case IIO_CHAN_INFO_RAW:
if (chan->output)
return ad74115_get_dac_code(st, chan->channel, val);
return ad74115_get_adc_code(indio_dev, chan->channel, val);
case IIO_CHAN_INFO_PROCESSED:
ret = ad74115_get_adc_code(indio_dev, chan->channel, val);
if (ret)
return ret;
return ad74115_adc_code_to_resistance(*val, val, val2);
case IIO_CHAN_INFO_SCALE:
if (chan->output)
return ad74115_get_dac_scale(st, chan, val, val2);
return ad74115_get_adc_scale(st, chan, val, val2);
case IIO_CHAN_INFO_OFFSET:
if (chan->output)
return ad74115_get_dac_offset(st, chan, val);
return ad74115_get_adc_offset(st, chan, val, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
if (chan->output)
return ad74115_get_dac_rate(st, val);
return ad74115_get_adc_rate(st, chan->channel, val);
default:
return -EINVAL;
}
}
static int ad74115_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2,
long info)
{
struct ad74115_state *st = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_RAW:
if (!chan->output)
return -EINVAL;
return ad74115_set_dac_code(st, chan->channel, val);
case IIO_CHAN_INFO_SAMP_FREQ:
if (chan->output)
return ad74115_set_dac_rate(st, val);
return ad74115_set_adc_rate(st, chan->channel, val);
default:
return -EINVAL;
}
}
static int ad74115_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length, long info)
{
switch (info) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (chan->output) {
*vals = ad74115_dac_rate_tbl;
*length = ARRAY_SIZE(ad74115_dac_rate_tbl);
} else {
*vals = ad74115_adc_conv_rate_tbl;
*length = ARRAY_SIZE(ad74115_adc_conv_rate_tbl);
}
*type = IIO_VAL_INT;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int ad74115_reg_access(struct iio_dev *indio_dev, unsigned int reg,
unsigned int writeval, unsigned int *readval)
{
struct ad74115_state *st = iio_priv(indio_dev);
if (readval)
return regmap_read(st->regmap, reg, readval);
return regmap_write(st->regmap, reg, writeval);
}
static const struct iio_info ad74115_info = {
.read_raw = ad74115_read_raw,
.write_raw = ad74115_write_raw,
.read_avail = ad74115_read_avail,
.update_scan_mode = ad74115_update_scan_mode,
.debugfs_reg_access = ad74115_reg_access,
};
#define AD74115_DAC_CHANNEL(_type, index) \
{ \
.type = (_type), \
.channel = (index), \
.indexed = 1, \
.output = 1, \
.scan_index = -1, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
| BIT(IIO_CHAN_INFO_SCALE) \
| BIT(IIO_CHAN_INFO_OFFSET), \
}
#define _AD74115_ADC_CHANNEL(_type, index, extra_mask_separate) \
{ \
.type = (_type), \
.channel = (index), \
.indexed = 1, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
| BIT(IIO_CHAN_INFO_SAMP_FREQ) \
| (extra_mask_separate), \
.info_mask_separate_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = index, \
.scan_type = { \
.sign = 'u', \
.realbits = 16, \
.storagebits = 32, \
.shift = 8, \
.endianness = IIO_BE, \
}, \
}
#define AD74115_ADC_CHANNEL(_type, index) \
_AD74115_ADC_CHANNEL(_type, index, BIT(IIO_CHAN_INFO_SCALE) \
| BIT(IIO_CHAN_INFO_OFFSET))
static struct iio_chan_spec ad74115_voltage_input_channels[] = {
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV1),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
static struct iio_chan_spec ad74115_voltage_output_channels[] = {
AD74115_DAC_CHANNEL(IIO_VOLTAGE, AD74115_DAC_CH_MAIN),
AD74115_ADC_CHANNEL(IIO_CURRENT, AD74115_ADC_CH_CONV1),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
static struct iio_chan_spec ad74115_current_input_channels[] = {
AD74115_ADC_CHANNEL(IIO_CURRENT, AD74115_ADC_CH_CONV1),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
static struct iio_chan_spec ad74115_current_output_channels[] = {
AD74115_DAC_CHANNEL(IIO_CURRENT, AD74115_DAC_CH_MAIN),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV1),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
static struct iio_chan_spec ad74115_2_wire_resistance_input_channels[] = {
_AD74115_ADC_CHANNEL(IIO_RESISTANCE, AD74115_ADC_CH_CONV1,
BIT(IIO_CHAN_INFO_PROCESSED)),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
static struct iio_chan_spec ad74115_3_4_wire_resistance_input_channels[] = {
AD74115_ADC_CHANNEL(IIO_RESISTANCE, AD74115_ADC_CH_CONV1),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
static struct iio_chan_spec ad74115_digital_input_logic_channels[] = {
AD74115_DAC_CHANNEL(IIO_VOLTAGE, AD74115_DAC_CH_COMPARATOR),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV1),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
static struct iio_chan_spec ad74115_digital_input_loop_channels[] = {
AD74115_DAC_CHANNEL(IIO_CURRENT, AD74115_DAC_CH_MAIN),
AD74115_DAC_CHANNEL(IIO_VOLTAGE, AD74115_DAC_CH_COMPARATOR),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV1),
AD74115_ADC_CHANNEL(IIO_VOLTAGE, AD74115_ADC_CH_CONV2),
};
#define _AD74115_CHANNELS(_channels) \
{ \
.channels = _channels, \
.num_channels = ARRAY_SIZE(_channels), \
}
#define AD74115_CHANNELS(name) \
_AD74115_CHANNELS(ad74115_ ## name ## _channels)
static const struct ad74115_channels ad74115_channels_map[AD74115_CH_FUNC_NUM] = {
[AD74115_CH_FUNC_HIGH_IMPEDANCE] = AD74115_CHANNELS(voltage_input),
[AD74115_CH_FUNC_VOLTAGE_INPUT] = AD74115_CHANNELS(voltage_input),
[AD74115_CH_FUNC_VOLTAGE_OUTPUT] = AD74115_CHANNELS(voltage_output),
[AD74115_CH_FUNC_CURRENT_INPUT_EXT_POWER] = AD74115_CHANNELS(current_input),
[AD74115_CH_FUNC_CURRENT_INPUT_LOOP_POWER] = AD74115_CHANNELS(current_input),
[AD74115_CH_FUNC_CURRENT_INPUT_EXT_POWER_HART] = AD74115_CHANNELS(current_input),
[AD74115_CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART] = AD74115_CHANNELS(current_input),
[AD74115_CH_FUNC_CURRENT_OUTPUT] = AD74115_CHANNELS(current_output),
[AD74115_CH_FUNC_CURRENT_OUTPUT_HART] = AD74115_CHANNELS(current_output),
[AD74115_CH_FUNC_2_WIRE_RESISTANCE_INPUT] = AD74115_CHANNELS(2_wire_resistance_input),
[AD74115_CH_FUNC_3_4_WIRE_RESISTANCE_INPUT] = AD74115_CHANNELS(3_4_wire_resistance_input),
[AD74115_CH_FUNC_DIGITAL_INPUT_LOGIC] = AD74115_CHANNELS(digital_input_logic),
[AD74115_CH_FUNC_DIGITAL_INPUT_LOOP_POWER] = AD74115_CHANNELS(digital_input_loop),
};
#define AD74115_GPIO_MODE_FW_PROP(i) \
{ \
.name = "adi,gpio" __stringify(i) "-mode", \
.reg = AD74115_GPIO_CONFIG_X_REG(i), \
.mask = AD74115_GPIO_CONFIG_SELECT_MASK, \
.lookup_tbl = ad74115_gpio_mode_tbl, \
.lookup_tbl_len = ARRAY_SIZE(ad74115_gpio_mode_tbl), \
}
static const struct ad74115_fw_prop ad74115_gpio_mode_fw_props[] = {
AD74115_GPIO_MODE_FW_PROP(0),
AD74115_GPIO_MODE_FW_PROP(1),
AD74115_GPIO_MODE_FW_PROP(2),
AD74115_GPIO_MODE_FW_PROP(3),
};
static const struct ad74115_fw_prop ad74115_din_threshold_mode_fw_prop =
AD74115_FW_PROP_BOOL("adi,digital-input-threshold-mode-fixed",
AD74115_DIN_CONFIG2_REG, BIT(7));
static const struct ad74115_fw_prop ad74115_dac_bipolar_fw_prop =
AD74115_FW_PROP_BOOL("adi,dac-bipolar", AD74115_OUTPUT_CONFIG_REG, BIT(7));
static const struct ad74115_fw_prop ad74115_ch_func_fw_prop =
AD74115_FW_PROP("adi,ch-func", AD74115_CH_FUNC_MAX,
AD74115_CH_FUNC_SETUP_REG, GENMASK(3, 0));
static const struct ad74115_fw_prop ad74115_rtd_mode_fw_prop =
AD74115_FW_PROP_BOOL("adi,4-wire-rtd", AD74115_RTD3W4W_CONFIG_REG, BIT(3));
static const struct ad74115_fw_prop ad74115_din_range_fw_prop =
AD74115_FW_PROP_BOOL("adi,digital-input-sink-range-high",
AD74115_DIN_CONFIG1_REG, BIT(12));
static const struct ad74115_fw_prop ad74115_ext2_burnout_current_fw_prop =
AD74115_FW_PROP_TBL("adi,ext2-burnout-current-nanoamp",
ad74115_burnout_current_na_tbl,
AD74115_BURNOUT_CONFIG_REG, GENMASK(14, 12));
static const struct ad74115_fw_prop ad74115_ext1_burnout_current_fw_prop =
AD74115_FW_PROP_TBL("adi,ext1-burnout-current-nanoamp",
ad74115_burnout_current_na_tbl,
AD74115_BURNOUT_CONFIG_REG, GENMASK(9, 7));
static const struct ad74115_fw_prop ad74115_viout_burnout_current_fw_prop =
AD74115_FW_PROP_TBL("adi,viout-burnout-current-nanoamp",
ad74115_viout_burnout_current_na_tbl,
AD74115_BURNOUT_CONFIG_REG, GENMASK(4, 2));
static const struct ad74115_fw_prop ad74115_fw_props[] = {
AD74115_FW_PROP("adi,conv2-mux", 3,
AD74115_ADC_CONFIG_REG, GENMASK(3, 2)),
AD74115_FW_PROP_BOOL_NEG("adi,sense-agnd-buffer-low-power",
AD74115_PWR_OPTIM_CONFIG_REG, BIT(4)),
AD74115_FW_PROP_BOOL_NEG("adi,lf-buffer-low-power",
AD74115_PWR_OPTIM_CONFIG_REG, BIT(3)),
AD74115_FW_PROP_BOOL_NEG("adi,hf-buffer-low-power",
AD74115_PWR_OPTIM_CONFIG_REG, BIT(2)),
AD74115_FW_PROP_BOOL_NEG("adi,ext2-buffer-low-power",
AD74115_PWR_OPTIM_CONFIG_REG, BIT(1)),
AD74115_FW_PROP_BOOL_NEG("adi,ext1-buffer-low-power",
AD74115_PWR_OPTIM_CONFIG_REG, BIT(0)),
AD74115_FW_PROP_BOOL("adi,comparator-invert",
AD74115_DIN_CONFIG1_REG, BIT(14)),
AD74115_FW_PROP_BOOL("adi,digital-input-debounce-mode-counter-reset",
AD74115_DIN_CONFIG1_REG, BIT(6)),
AD74115_FW_PROP_BOOL("adi,digital-input-unbuffered",
AD74115_DIN_CONFIG2_REG, BIT(10)),
AD74115_FW_PROP_BOOL("adi,digital-input-short-circuit-detection",
AD74115_DIN_CONFIG2_REG, BIT(9)),
AD74115_FW_PROP_BOOL("adi,digital-input-open-circuit-detection",
AD74115_DIN_CONFIG2_REG, BIT(8)),
AD74115_FW_PROP_BOOL("adi,dac-current-limit-low",
AD74115_OUTPUT_CONFIG_REG, BIT(0)),
AD74115_FW_PROP_BOOL("adi,3-wire-rtd-excitation-swap",
AD74115_RTD3W4W_CONFIG_REG, BIT(2)),
AD74115_FW_PROP_TBL("adi,rtd-excitation-current-microamp",
ad74115_rtd_excitation_current_ua_tbl,
AD74115_RTD3W4W_CONFIG_REG, GENMASK(1, 0)),
AD74115_FW_PROP_BOOL("adi,ext2-burnout-current-polarity-sourcing",
AD74115_BURNOUT_CONFIG_REG, BIT(11)),
AD74115_FW_PROP_BOOL("adi,ext1-burnout-current-polarity-sourcing",
AD74115_BURNOUT_CONFIG_REG, BIT(6)),
AD74115_FW_PROP_BOOL("adi,viout-burnout-current-polarity-sourcing",
AD74115_BURNOUT_CONFIG_REG, BIT(1)),
AD74115_FW_PROP_BOOL("adi,charge-pump",
AD74115_CHARGE_PUMP_REG, BIT(0)),
};
static int ad74115_apply_fw_prop(struct ad74115_state *st,
const struct ad74115_fw_prop *prop, u32 *retval)
{
struct device *dev = &st->spi->dev;
u32 val = 0;
int ret;
if (prop->is_boolean) {
val = device_property_read_bool(dev, prop->name);
} else {
ret = device_property_read_u32(dev, prop->name, &val);
if (ret && prop->lookup_tbl)
val = prop->lookup_tbl[0];
}
*retval = val;
if (prop->negate)
val = !val;
if (prop->lookup_tbl)
ret = _ad74115_find_tbl_index(prop->lookup_tbl,
prop->lookup_tbl_len, val, &val);
else if (prop->max && val > prop->max)
ret = -EINVAL;
else
ret = 0;
if (ret)
return dev_err_probe(dev, -EINVAL,
"Invalid value %u for prop %s\n",
val, prop->name);
WARN(!prop->mask, "Prop %s mask is empty\n", prop->name);
val = (val << __ffs(prop->mask)) & prop->mask;
return regmap_update_bits(st->regmap, prop->reg, prop->mask, val);
}
static int ad74115_setup_adc_conv2_range(struct ad74115_state *st)
{
unsigned int tbl_len = ARRAY_SIZE(ad74115_adc_range_tbl);
const char *prop_name = "adi,conv2-range-microvolt";
s32 vals[2] = {
ad74115_adc_range_tbl[0][0],
ad74115_adc_range_tbl[0][1],
};
struct device *dev = &st->spi->dev;
unsigned int i;
device_property_read_u32_array(dev, prop_name, vals, 2);
for (i = 0; i < tbl_len; i++)
if (vals[0] == ad74115_adc_range_tbl[i][0] &&
vals[1] == ad74115_adc_range_tbl[i][1])
break;
if (i == tbl_len)
return dev_err_probe(dev, -EINVAL,
"Invalid value %d, %d for prop %s\n",
vals[0], vals[1], prop_name);
return regmap_update_bits(st->regmap, AD74115_ADC_CONFIG_REG,
AD74115_ADC_CONFIG_CONV2_RANGE_MASK,
FIELD_PREP(AD74115_ADC_CONFIG_CONV2_RANGE_MASK, i));
}
static int ad74115_setup_iio_channels(struct iio_dev *indio_dev)
{
struct ad74115_state *st = iio_priv(indio_dev);
struct device *dev = &st->spi->dev;
struct iio_chan_spec *channels;
channels = devm_kcalloc(dev, sizeof(*channels),
indio_dev->num_channels, GFP_KERNEL);
if (!channels)
return -ENOMEM;
indio_dev->channels = channels;
memcpy(channels, ad74115_channels_map[st->ch_func].channels,
sizeof(*channels) * ad74115_channels_map[st->ch_func].num_channels);
if (channels[0].output && channels[0].channel == AD74115_DAC_CH_MAIN &&
channels[0].type == IIO_VOLTAGE && !st->dac_hart_slew) {
channels[0].info_mask_separate |= BIT(IIO_CHAN_INFO_SAMP_FREQ);
channels[0].info_mask_separate_available |= BIT(IIO_CHAN_INFO_SAMP_FREQ);
}
return 0;
}
static int ad74115_setup_gpio_chip(struct ad74115_state *st)
{
struct device *dev = &st->spi->dev;
if (!st->gpio_valid_mask)
return 0;
st->gc = (struct gpio_chip) {
.owner = THIS_MODULE,
.label = AD74115_NAME,
.base = -1,
.ngpio = AD74115_GPIO_NUM,
.parent = dev,
.can_sleep = true,
.init_valid_mask = ad74115_gpio_init_valid_mask,
.get_direction = ad74115_gpio_get_direction,
.direction_input = ad74115_gpio_direction_input,
.direction_output = ad74115_gpio_direction_output,
.get = ad74115_gpio_get,
.set = ad74115_gpio_set,
};
return devm_gpiochip_add_data(dev, &st->gc, st);
}
static int ad74115_setup_comp_gpio_chip(struct ad74115_state *st)
{
struct device *dev = &st->spi->dev;
u32 val;
int ret;
ret = regmap_read(st->regmap, AD74115_DIN_CONFIG1_REG, &val);
if (ret)
return ret;
if (!(val & AD74115_DIN_COMPARATOR_EN_MASK))
return 0;
st->comp_gc = (struct gpio_chip) {
.owner = THIS_MODULE,
.label = AD74115_NAME,
.base = -1,
.ngpio = 1,
.parent = dev,
.can_sleep = true,
.get_direction = ad74115_comp_gpio_get_direction,
.get = ad74115_comp_gpio_get,
.set_config = ad74115_comp_gpio_set_config,
};
return devm_gpiochip_add_data(dev, &st->comp_gc, st);
}
static int ad74115_setup(struct iio_dev *indio_dev)
{
struct ad74115_state *st = iio_priv(indio_dev);
struct device *dev = &st->spi->dev;
u32 val, din_range_high;
unsigned int i;
int ret;
ret = ad74115_apply_fw_prop(st, &ad74115_ch_func_fw_prop, &val);
if (ret)
return ret;
indio_dev->num_channels += ad74115_channels_map[val].num_channels;
st->ch_func = val;
ret = ad74115_setup_adc_conv2_range(st);
if (ret)
return ret;
val = device_property_read_bool(dev, "adi,dac-hart-slew");
if (val) {
st->dac_hart_slew = val;
ret = regmap_update_bits(st->regmap, AD74115_OUTPUT_CONFIG_REG,
AD74115_OUTPUT_SLEW_EN_MASK,
FIELD_PREP(AD74115_OUTPUT_SLEW_EN_MASK,
AD74115_SLEW_MODE_HART));
if (ret)
return ret;
}
ret = ad74115_apply_fw_prop(st, &ad74115_din_range_fw_prop,
&din_range_high);
if (ret)
return ret;
ret = device_property_read_u32(dev, "adi,digital-input-sink-microamp", &val);
if (!ret) {
if (din_range_high)
val = DIV_ROUND_CLOSEST(val, AD74115_DIN_SINK_LOW_STEP);
else
val = DIV_ROUND_CLOSEST(val, AD74115_DIN_SINK_HIGH_STEP);
if (val > AD74115_DIN_SINK_MAX)
val = AD74115_DIN_SINK_MAX;
ret = regmap_update_bits(st->regmap, AD74115_DIN_CONFIG1_REG,
AD74115_DIN_SINK_MASK,
FIELD_PREP(AD74115_DIN_SINK_MASK, val));
if (ret)
return ret;
}
ret = ad74115_apply_fw_prop(st, &ad74115_din_threshold_mode_fw_prop, &val);
if (ret)
return ret;
if (val == AD74115_DIN_THRESHOLD_MODE_AVDD) {
ret = regulator_get_voltage(st->avdd);
if (ret < 0)
return ret;
st->avdd_mv = ret / 1000;
}
st->din_threshold_mode = val;
ret = ad74115_apply_fw_prop(st, &ad74115_dac_bipolar_fw_prop, &val);
if (ret)
return ret;
st->dac_bipolar = val;
ret = ad74115_apply_fw_prop(st, &ad74115_rtd_mode_fw_prop, &val);
if (ret)
return ret;
st->rtd_mode_4_wire = val;
ret = ad74115_apply_fw_prop(st, &ad74115_ext2_burnout_current_fw_prop, &val);
if (ret)
return ret;
if (val) {
ret = regmap_update_bits(st->regmap, AD74115_BURNOUT_CONFIG_REG,
AD74115_BURNOUT_EXT2_EN_MASK,
FIELD_PREP(AD74115_BURNOUT_EXT2_EN_MASK, 1));
if (ret)
return ret;
}
ret = ad74115_apply_fw_prop(st, &ad74115_ext1_burnout_current_fw_prop, &val);
if (ret)
return ret;
if (val) {
ret = regmap_update_bits(st->regmap, AD74115_BURNOUT_CONFIG_REG,
AD74115_BURNOUT_EXT1_EN_MASK,
FIELD_PREP(AD74115_BURNOUT_EXT1_EN_MASK, 1));
if (ret)
return ret;
}
ret = ad74115_apply_fw_prop(st, &ad74115_viout_burnout_current_fw_prop, &val);
if (ret)
return ret;
if (val) {
ret = regmap_update_bits(st->regmap, AD74115_BURNOUT_CONFIG_REG,
AD74115_BURNOUT_VIOUT_EN_MASK,
FIELD_PREP(AD74115_BURNOUT_VIOUT_EN_MASK, 1));
if (ret)
return ret;
}
for (i = 0; i < AD74115_GPIO_NUM; i++) {
ret = ad74115_apply_fw_prop(st, &ad74115_gpio_mode_fw_props[i], &val);
if (ret)
return ret;
if (val == AD74115_GPIO_MODE_LOGIC)
st->gpio_valid_mask |= BIT(i);
}
for (i = 0; i < ARRAY_SIZE(ad74115_fw_props); i++) {
ret = ad74115_apply_fw_prop(st, &ad74115_fw_props[i], &val);
if (ret)
return ret;
}
ret = ad74115_setup_gpio_chip(st);
if (ret)
return ret;
ret = ad74115_setup_comp_gpio_chip(st);
if (ret)
return ret;
return ad74115_setup_iio_channels(indio_dev);
}
static int ad74115_reset(struct ad74115_state *st)
{
struct device *dev = &st->spi->dev;
struct gpio_desc *reset_gpio;
int ret;
reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(reset_gpio))
return dev_err_probe(dev, PTR_ERR(reset_gpio),
"Failed to find reset GPIO\n");
if (reset_gpio) {
fsleep(100);
gpiod_set_value_cansleep(reset_gpio, 0);
} else {
ret = regmap_write(st->regmap, AD74115_CMD_KEY_REG,
AD74115_CMD_KEY_RESET1);
if (ret)
return ret;
ret = regmap_write(st->regmap, AD74115_CMD_KEY_REG,
AD74115_CMD_KEY_RESET2);
if (ret)
return ret;
}
fsleep(1000);
return 0;
}
static void ad74115_regulator_disable(void *data)
{
regulator_disable(data);
}
static int ad74115_setup_trigger(struct iio_dev *indio_dev)
{
struct ad74115_state *st = iio_priv(indio_dev);
struct device *dev = &st->spi->dev;
int ret;
st->irq = fwnode_irq_get_byname(dev_fwnode(dev), "adc_rdy");
if (st->irq == -EPROBE_DEFER)
return -EPROBE_DEFER;
if (st->irq < 0) {
st->irq = 0;
return 0;
}
ret = devm_request_irq(dev, st->irq, ad74115_adc_data_interrupt,
0, AD74115_NAME, indio_dev);
if (ret)
return ret;
st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", AD74115_NAME,
iio_device_id(indio_dev));
if (!st->trig)
return -ENOMEM;
st->trig->ops = &ad74115_trigger_ops;
iio_trigger_set_drvdata(st->trig, st);
ret = devm_iio_trigger_register(dev, st->trig);
if (ret)
return ret;
indio_dev->trig = iio_trigger_get(st->trig);
return 0;
}
static int ad74115_probe(struct spi_device *spi)
{
static const char * const regulator_names[] = {
"avcc", "dvcc", "dovdd", "refin",
};
struct device *dev = &spi->dev;
struct ad74115_state *st;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->spi = spi;
mutex_init(&st->lock);
init_completion(&st->adc_data_completion);
indio_dev->name = AD74115_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &ad74115_info;
st->avdd = devm_regulator_get(dev, "avdd");
if (IS_ERR(st->avdd))
return PTR_ERR(st->avdd);
ret = regulator_enable(st->avdd);
if (ret) {
dev_err(dev, "Failed to enable avdd regulator\n");
return ret;
}
ret = devm_add_action_or_reset(dev, ad74115_regulator_disable, st->avdd);
if (ret)
return ret;
ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulator_names),
regulator_names);
if (ret)
return ret;
st->regmap = devm_regmap_init(dev, NULL, st, &ad74115_regmap_config);
if (IS_ERR(st->regmap))
return PTR_ERR(st->regmap);
ret = ad74115_reset(st);
if (ret)
return ret;
ret = ad74115_setup(indio_dev);
if (ret)
return ret;
ret = ad74115_setup_trigger(indio_dev);
if (ret)
return ret;
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
ad74115_trigger_handler,
&ad74115_buffer_ops);
if (ret)
return ret;
return devm_iio_device_register(dev, indio_dev);
}
static int ad74115_unregister_driver(struct spi_driver *spi)
{
spi_unregister_driver(spi);
return 0;
}
static int __init ad74115_register_driver(struct spi_driver *spi)
{
crc8_populate_msb(ad74115_crc8_table, AD74115_CRC_POLYNOMIAL);
return spi_register_driver(spi);
}
static const struct spi_device_id ad74115_spi_id[] = {
{ "ad74115h" },
{ }
};
MODULE_DEVICE_TABLE(spi, ad74115_spi_id);
static const struct of_device_id ad74115_dt_id[] = {
{ .compatible = "adi,ad74115h" },
{ }
};
MODULE_DEVICE_TABLE(of, ad74115_dt_id);
static struct spi_driver ad74115_driver = {
.driver = {
.name = "ad74115",
.of_match_table = ad74115_dt_id,
},
.probe = ad74115_probe,
.id_table = ad74115_spi_id,
};
module_driver(ad74115_driver,
ad74115_register_driver, ad74115_unregister_driver);
MODULE_AUTHOR("Cosmin Tanislav <[email protected]>");
MODULE_DESCRIPTION("Analog Devices AD74115 ADDAC");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/addac/ad74115.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the Apex Embedded Systems STX104
* Copyright (C) 2016 William Breathitt Gray
*/
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gpio/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/types.h>
#include <linux/isa.h>
#include <linux/kernel.h>
#include <linux/limits.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/types.h>
#define STX104_OUT_CHAN(chan) { \
.type = IIO_VOLTAGE, \
.channel = chan, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.indexed = 1, \
.output = 1 \
}
#define STX104_IN_CHAN(chan, diff) { \
.type = IIO_VOLTAGE, \
.channel = chan, \
.channel2 = chan, \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_HARDWAREGAIN) | \
BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.indexed = 1, \
.differential = diff \
}
#define STX104_NUM_OUT_CHAN 2
#define STX104_EXTENT 16
static unsigned int base[max_num_isa_dev(STX104_EXTENT)];
static unsigned int num_stx104;
module_param_hw_array(base, uint, ioport, &num_stx104, 0);
MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses");
#define STX104_AIO_BASE 0x0
#define STX104_SOFTWARE_STROBE STX104_AIO_BASE
#define STX104_ADC_DATA STX104_AIO_BASE
#define STX104_ADC_CHANNEL (STX104_AIO_BASE + 0x2)
#define STX104_DIO_REG (STX104_AIO_BASE + 0x3)
#define STX104_DAC_BASE (STX104_AIO_BASE + 0x4)
#define STX104_ADC_STATUS (STX104_AIO_BASE + 0x8)
#define STX104_ADC_CONTROL (STX104_AIO_BASE + 0x9)
#define STX104_ADC_CONFIGURATION (STX104_AIO_BASE + 0x11)
#define STX104_AIO_DATA_STRIDE 2
#define STX104_DAC_OFFSET(_channel) (STX104_DAC_BASE + STX104_AIO_DATA_STRIDE * (_channel))
/* ADC Channel */
#define STX104_FC GENMASK(3, 0)
#define STX104_LC GENMASK(7, 4)
#define STX104_SINGLE_CHANNEL(_channel) \
(u8_encode_bits(_channel, STX104_FC) | u8_encode_bits(_channel, STX104_LC))
/* ADC Status */
#define STX104_SD BIT(5)
#define STX104_CNV BIT(7)
#define STX104_DIFFERENTIAL 1
/* ADC Control */
#define STX104_ALSS GENMASK(1, 0)
#define STX104_SOFTWARE_TRIGGER u8_encode_bits(0x0, STX104_ALSS)
/* ADC Configuration */
#define STX104_GAIN GENMASK(1, 0)
#define STX104_ADBU BIT(2)
#define STX104_BIPOLAR 0
#define STX104_GAIN_X1 0
#define STX104_GAIN_X2 1
#define STX104_GAIN_X4 2
#define STX104_GAIN_X8 3
/**
* struct stx104_iio - IIO device private data structure
* @lock: synchronization lock to prevent I/O race conditions
* @aio_data_map: Regmap for analog I/O data
* @aio_ctl_map: Regmap for analog I/O control
*/
struct stx104_iio {
struct mutex lock;
struct regmap *aio_data_map;
struct regmap *aio_ctl_map;
};
static const struct regmap_range aio_ctl_wr_ranges[] = {
regmap_reg_range(0x0, 0x0), regmap_reg_range(0x2, 0x2), regmap_reg_range(0x9, 0x9),
regmap_reg_range(0x11, 0x11),
};
static const struct regmap_range aio_ctl_rd_ranges[] = {
regmap_reg_range(0x2, 0x2), regmap_reg_range(0x8, 0x9), regmap_reg_range(0x11, 0x11),
};
static const struct regmap_range aio_ctl_volatile_ranges[] = {
regmap_reg_range(0x8, 0x8),
};
static const struct regmap_access_table aio_ctl_wr_table = {
.yes_ranges = aio_ctl_wr_ranges,
.n_yes_ranges = ARRAY_SIZE(aio_ctl_wr_ranges),
};
static const struct regmap_access_table aio_ctl_rd_table = {
.yes_ranges = aio_ctl_rd_ranges,
.n_yes_ranges = ARRAY_SIZE(aio_ctl_rd_ranges),
};
static const struct regmap_access_table aio_ctl_volatile_table = {
.yes_ranges = aio_ctl_volatile_ranges,
.n_yes_ranges = ARRAY_SIZE(aio_ctl_volatile_ranges),
};
static const struct regmap_config aio_ctl_regmap_config = {
.name = "aio_ctl",
.reg_bits = 8,
.reg_stride = 1,
.reg_base = STX104_AIO_BASE,
.val_bits = 8,
.io_port = true,
.wr_table = &aio_ctl_wr_table,
.rd_table = &aio_ctl_rd_table,
.volatile_table = &aio_ctl_volatile_table,
.cache_type = REGCACHE_FLAT,
};
static const struct regmap_range aio_data_wr_ranges[] = {
regmap_reg_range(0x4, 0x6),
};
static const struct regmap_range aio_data_rd_ranges[] = {
regmap_reg_range(0x0, 0x0),
};
static const struct regmap_access_table aio_data_wr_table = {
.yes_ranges = aio_data_wr_ranges,
.n_yes_ranges = ARRAY_SIZE(aio_data_wr_ranges),
};
static const struct regmap_access_table aio_data_rd_table = {
.yes_ranges = aio_data_rd_ranges,
.n_yes_ranges = ARRAY_SIZE(aio_data_rd_ranges),
};
static const struct regmap_config aio_data_regmap_config = {
.name = "aio_data",
.reg_bits = 16,
.reg_stride = STX104_AIO_DATA_STRIDE,
.reg_base = STX104_AIO_BASE,
.val_bits = 16,
.io_port = true,
.wr_table = &aio_data_wr_table,
.rd_table = &aio_data_rd_table,
.volatile_table = &aio_data_rd_table,
.cache_type = REGCACHE_FLAT,
};
static const struct regmap_config dio_regmap_config = {
.name = "dio",
.reg_bits = 8,
.reg_stride = 1,
.reg_base = STX104_DIO_REG,
.val_bits = 8,
.io_port = true,
};
static int stx104_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2, long mask)
{
struct stx104_iio *const priv = iio_priv(indio_dev);
int err;
unsigned int adc_config;
unsigned int value;
unsigned int adc_status;
switch (mask) {
case IIO_CHAN_INFO_HARDWAREGAIN:
err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config);
if (err)
return err;
*val = BIT(u8_get_bits(adc_config, STX104_GAIN));
return IIO_VAL_INT;
case IIO_CHAN_INFO_RAW:
if (chan->output) {
err = regmap_read(priv->aio_data_map, STX104_DAC_OFFSET(chan->channel),
&value);
if (err)
return err;
*val = value;
return IIO_VAL_INT;
}
mutex_lock(&priv->lock);
/* select ADC channel */
err = regmap_write(priv->aio_ctl_map, STX104_ADC_CHANNEL,
STX104_SINGLE_CHANNEL(chan->channel));
if (err) {
mutex_unlock(&priv->lock);
return err;
}
/*
* Trigger ADC sample capture by writing to the 8-bit Software Strobe Register and
* wait for completion; the conversion time range is 5 microseconds to 53.68 seconds
* in steps of 25 nanoseconds. The actual Analog Input Frame Timer time interval is
* calculated as:
* ai_time_frame_ns = ( AIFT + 1 ) * ( 25 nanoseconds ).
* Where 0 <= AIFT <= 2147483648.
*/
err = regmap_write(priv->aio_ctl_map, STX104_SOFTWARE_STROBE, 0);
if (err) {
mutex_unlock(&priv->lock);
return err;
}
err = regmap_read_poll_timeout(priv->aio_ctl_map, STX104_ADC_STATUS, adc_status,
!u8_get_bits(adc_status, STX104_CNV), 0, 53687092);
if (err) {
mutex_unlock(&priv->lock);
return err;
}
err = regmap_read(priv->aio_data_map, STX104_ADC_DATA, &value);
if (err) {
mutex_unlock(&priv->lock);
return err;
}
*val = value;
mutex_unlock(&priv->lock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_OFFSET:
/* get ADC bipolar/unipolar configuration */
err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config);
if (err)
return err;
*val = (u8_get_bits(adc_config, STX104_ADBU) == STX104_BIPOLAR) ? -32768 : 0;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
/* get ADC bipolar/unipolar and gain configuration */
err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config);
if (err)
return err;
*val = 5;
*val2 = (u8_get_bits(adc_config, STX104_ADBU) == STX104_BIPOLAR) ? 14 : 15;
*val2 += u8_get_bits(adc_config, STX104_GAIN);
return IIO_VAL_FRACTIONAL_LOG2;
}
return -EINVAL;
}
static int stx104_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2, long mask)
{
struct stx104_iio *const priv = iio_priv(indio_dev);
u8 gain;
switch (mask) {
case IIO_CHAN_INFO_HARDWAREGAIN:
/* Only four gain states (x1, x2, x4, x8) */
switch (val) {
case 1:
gain = STX104_GAIN_X1;
break;
case 2:
gain = STX104_GAIN_X2;
break;
case 4:
gain = STX104_GAIN_X4;
break;
case 8:
gain = STX104_GAIN_X8;
break;
default:
return -EINVAL;
}
return regmap_write(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, gain);
case IIO_CHAN_INFO_RAW:
if (!chan->output)
return -EINVAL;
if (val < 0 || val > U16_MAX)
return -EINVAL;
return regmap_write(priv->aio_data_map, STX104_DAC_OFFSET(chan->channel), val);
}
return -EINVAL;
}
static const struct iio_info stx104_info = {
.read_raw = stx104_read_raw,
.write_raw = stx104_write_raw
};
/* single-ended input channels configuration */
static const struct iio_chan_spec stx104_channels_sing[] = {
STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
STX104_IN_CHAN(0, 0), STX104_IN_CHAN(1, 0), STX104_IN_CHAN(2, 0),
STX104_IN_CHAN(3, 0), STX104_IN_CHAN(4, 0), STX104_IN_CHAN(5, 0),
STX104_IN_CHAN(6, 0), STX104_IN_CHAN(7, 0), STX104_IN_CHAN(8, 0),
STX104_IN_CHAN(9, 0), STX104_IN_CHAN(10, 0), STX104_IN_CHAN(11, 0),
STX104_IN_CHAN(12, 0), STX104_IN_CHAN(13, 0), STX104_IN_CHAN(14, 0),
STX104_IN_CHAN(15, 0)
};
/* differential input channels configuration */
static const struct iio_chan_spec stx104_channels_diff[] = {
STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
STX104_IN_CHAN(0, 1), STX104_IN_CHAN(1, 1), STX104_IN_CHAN(2, 1),
STX104_IN_CHAN(3, 1), STX104_IN_CHAN(4, 1), STX104_IN_CHAN(5, 1),
STX104_IN_CHAN(6, 1), STX104_IN_CHAN(7, 1)
};
static int stx104_reg_mask_xlate(struct gpio_regmap *const gpio, const unsigned int base,
unsigned int offset, unsigned int *const reg,
unsigned int *const mask)
{
/* Output lines are located at same register bit offsets as input lines */
if (offset >= 4)
offset -= 4;
*reg = base;
*mask = BIT(offset);
return 0;
}
#define STX104_NGPIO 8
static const char *stx104_names[STX104_NGPIO] = {
"DIN0", "DIN1", "DIN2", "DIN3", "DOUT0", "DOUT1", "DOUT2", "DOUT3"
};
static int stx104_init_hw(struct stx104_iio *const priv)
{
int err;
/* configure device for software trigger operation */
err = regmap_write(priv->aio_ctl_map, STX104_ADC_CONTROL, STX104_SOFTWARE_TRIGGER);
if (err)
return err;
/* initialize gain setting to x1 */
err = regmap_write(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, STX104_GAIN_X1);
if (err)
return err;
/* initialize DAC outputs to 0V */
err = regmap_write(priv->aio_data_map, STX104_DAC_BASE, 0);
if (err)
return err;
err = regmap_write(priv->aio_data_map, STX104_DAC_BASE + STX104_AIO_DATA_STRIDE, 0);
if (err)
return err;
return 0;
}
static int stx104_probe(struct device *dev, unsigned int id)
{
struct iio_dev *indio_dev;
struct stx104_iio *priv;
struct gpio_regmap_config gpio_config;
void __iomem *stx104_base;
struct regmap *aio_ctl_map;
struct regmap *aio_data_map;
struct regmap *dio_map;
int err;
unsigned int adc_status;
indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
if (!indio_dev)
return -ENOMEM;
if (!devm_request_region(dev, base[id], STX104_EXTENT,
dev_name(dev))) {
dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
base[id], base[id] + STX104_EXTENT);
return -EBUSY;
}
stx104_base = devm_ioport_map(dev, base[id], STX104_EXTENT);
if (!stx104_base)
return -ENOMEM;
aio_ctl_map = devm_regmap_init_mmio(dev, stx104_base, &aio_ctl_regmap_config);
if (IS_ERR(aio_ctl_map))
return dev_err_probe(dev, PTR_ERR(aio_ctl_map),
"Unable to initialize aio_ctl register map\n");
aio_data_map = devm_regmap_init_mmio(dev, stx104_base, &aio_data_regmap_config);
if (IS_ERR(aio_data_map))
return dev_err_probe(dev, PTR_ERR(aio_data_map),
"Unable to initialize aio_data register map\n");
dio_map = devm_regmap_init_mmio(dev, stx104_base, &dio_regmap_config);
if (IS_ERR(dio_map))
return dev_err_probe(dev, PTR_ERR(dio_map),
"Unable to initialize dio register map\n");
priv = iio_priv(indio_dev);
priv->aio_ctl_map = aio_ctl_map;
priv->aio_data_map = aio_data_map;
indio_dev->info = &stx104_info;
indio_dev->modes = INDIO_DIRECT_MODE;
err = regmap_read(aio_ctl_map, STX104_ADC_STATUS, &adc_status);
if (err)
return err;
if (u8_get_bits(adc_status, STX104_SD) == STX104_DIFFERENTIAL) {
indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff);
indio_dev->channels = stx104_channels_diff;
} else {
indio_dev->num_channels = ARRAY_SIZE(stx104_channels_sing);
indio_dev->channels = stx104_channels_sing;
}
indio_dev->name = dev_name(dev);
mutex_init(&priv->lock);
err = stx104_init_hw(priv);
if (err)
return err;
err = devm_iio_device_register(dev, indio_dev);
if (err)
return err;
gpio_config = (struct gpio_regmap_config) {
.parent = dev,
.regmap = dio_map,
.ngpio = STX104_NGPIO,
.names = stx104_names,
.reg_dat_base = GPIO_REGMAP_ADDR(STX104_DIO_REG),
.reg_set_base = GPIO_REGMAP_ADDR(STX104_DIO_REG),
.ngpio_per_reg = STX104_NGPIO,
.reg_mask_xlate = stx104_reg_mask_xlate,
.drvdata = dio_map,
};
return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config));
}
static struct isa_driver stx104_driver = {
.probe = stx104_probe,
.driver = {
.name = "stx104"
},
};
module_isa_driver(stx104_driver, num_stx104);
MODULE_AUTHOR("William Breathitt Gray <[email protected]>");
MODULE_DESCRIPTION("Apex Embedded Systems STX104 IIO driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/addac/stx104.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2021 Analog Devices, Inc.
* Author: Cosmin Tanislav <[email protected]>
*/
#include <asm/unaligned.h>
#include <linux/bitfield.h>
#include <linux/crc8.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/interrupt.h>
#include <linux/mod_devicetable.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
#include <dt-bindings/iio/addac/adi,ad74413r.h>
#define AD74413R_CRC_POLYNOMIAL 0x7
DECLARE_CRC8_TABLE(ad74413r_crc8_table);
#define AD74413R_CHANNEL_MAX 4
#define AD74413R_FRAME_SIZE 4
struct ad74413r_chip_info {
const char *name;
bool hart_support;
};
struct ad74413r_channel_config {
u32 func;
u32 drive_strength;
bool gpo_comparator;
bool initialized;
};
struct ad74413r_channels {
struct iio_chan_spec *channels;
unsigned int num_channels;
};
struct ad74413r_state {
struct ad74413r_channel_config channel_configs[AD74413R_CHANNEL_MAX];
unsigned int gpo_gpio_offsets[AD74413R_CHANNEL_MAX];
unsigned int comp_gpio_offsets[AD74413R_CHANNEL_MAX];
struct gpio_chip gpo_gpiochip;
struct gpio_chip comp_gpiochip;
struct completion adc_data_completion;
unsigned int num_gpo_gpios;
unsigned int num_comparator_gpios;
u32 sense_resistor_ohms;
/*
* Synchronize consecutive operations when doing a one-shot
* conversion and when updating the ADC samples SPI message.
*/
struct mutex lock;
const struct ad74413r_chip_info *chip_info;
struct spi_device *spi;
struct regulator *refin_reg;
struct regmap *regmap;
struct device *dev;
struct iio_trigger *trig;
struct gpio_desc *reset_gpio;
size_t adc_active_channels;
struct spi_message adc_samples_msg;
struct spi_transfer adc_samples_xfer[AD74413R_CHANNEL_MAX + 1];
/*
* DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache lines.
*/
struct {
u8 rx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
s64 timestamp;
} adc_samples_buf __aligned(IIO_DMA_MINALIGN);
u8 adc_samples_tx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
u8 reg_tx_buf[AD74413R_FRAME_SIZE];
u8 reg_rx_buf[AD74413R_FRAME_SIZE];
};
#define AD74413R_REG_NOP 0x00
#define AD74413R_REG_CH_FUNC_SETUP_X(x) (0x01 + (x))
#define AD74413R_CH_FUNC_SETUP_MASK GENMASK(3, 0)
#define AD74413R_REG_ADC_CONFIG_X(x) (0x05 + (x))
#define AD74413R_ADC_CONFIG_RANGE_MASK GENMASK(7, 5)
#define AD74413R_ADC_CONFIG_REJECTION_MASK GENMASK(4, 3)
#define AD74413R_ADC_CONFIG_CH_200K_TO_GND BIT(2)
#define AD74413R_ADC_RANGE_10V 0b000
#define AD74413R_ADC_RANGE_2P5V_EXT_POW 0b001
#define AD74413R_ADC_RANGE_2P5V_INT_POW 0b010
#define AD74413R_ADC_RANGE_5V_BI_DIR 0b011
#define AD74413R_ADC_REJECTION_50_60 0b00
#define AD74413R_ADC_REJECTION_NONE 0b01
#define AD74413R_ADC_REJECTION_50_60_HART 0b10
#define AD74413R_ADC_REJECTION_HART 0b11
#define AD74413R_REG_DIN_CONFIG_X(x) (0x09 + (x))
#define AD74413R_DIN_DEBOUNCE_MASK GENMASK(4, 0)
#define AD74413R_DIN_DEBOUNCE_LEN BIT(5)
#define AD74413R_DIN_SINK_MASK GENMASK(9, 6)
#define AD74413R_REG_DAC_CODE_X(x) (0x16 + (x))
#define AD74413R_DAC_CODE_MAX GENMASK(12, 0)
#define AD74413R_DAC_VOLTAGE_MAX 11000
#define AD74413R_REG_GPO_PAR_DATA 0x0d
#define AD74413R_REG_GPO_CONFIG_X(x) (0x0e + (x))
#define AD74413R_GPO_CONFIG_DATA_MASK BIT(3)
#define AD74413R_GPO_CONFIG_SELECT_MASK GENMASK(2, 0)
#define AD74413R_GPO_CONFIG_100K_PULL_DOWN 0b000
#define AD74413R_GPO_CONFIG_LOGIC 0b001
#define AD74413R_GPO_CONFIG_LOGIC_PARALLEL 0b010
#define AD74413R_GPO_CONFIG_COMPARATOR 0b011
#define AD74413R_GPO_CONFIG_HIGH_IMPEDANCE 0b100
#define AD74413R_REG_ADC_CONV_CTRL 0x23
#define AD74413R_CONV_SEQ_MASK GENMASK(9, 8)
#define AD74413R_CONV_SEQ_ON 0b00
#define AD74413R_CONV_SEQ_SINGLE 0b01
#define AD74413R_CONV_SEQ_CONTINUOUS 0b10
#define AD74413R_CONV_SEQ_OFF 0b11
#define AD74413R_CH_EN_MASK(x) BIT(x)
#define AD74413R_REG_DIN_COMP_OUT 0x25
#define AD74413R_REG_ADC_RESULT_X(x) (0x26 + (x))
#define AD74413R_ADC_RESULT_MAX GENMASK(15, 0)
#define AD74413R_REG_READ_SELECT 0x41
#define AD74413R_REG_CMD_KEY 0x44
#define AD74413R_CMD_KEY_LDAC 0x953a
#define AD74413R_CMD_KEY_RESET1 0x15fa
#define AD74413R_CMD_KEY_RESET2 0xaf51
static const int ad74413r_adc_sampling_rates[] = {
20, 4800,
};
static const int ad74413r_adc_sampling_rates_hart[] = {
10, 20, 1200, 4800,
};
static int ad74413r_crc(u8 *buf)
{
return crc8(ad74413r_crc8_table, buf, 3, 0);
}
static void ad74413r_format_reg_write(u8 reg, u16 val, u8 *buf)
{
buf[0] = reg;
put_unaligned_be16(val, &buf[1]);
buf[3] = ad74413r_crc(buf);
}
static int ad74413r_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct ad74413r_state *st = context;
ad74413r_format_reg_write(reg, val, st->reg_tx_buf);
return spi_write(st->spi, st->reg_tx_buf, AD74413R_FRAME_SIZE);
}
static int ad74413r_crc_check(struct ad74413r_state *st, u8 *buf)
{
u8 expected_crc = ad74413r_crc(buf);
if (buf[3] != expected_crc) {
dev_err(st->dev, "Bad CRC %02x for %02x%02x%02x\n",
buf[3], buf[0], buf[1], buf[2]);
return -EINVAL;
}
return 0;
}
static int ad74413r_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct ad74413r_state *st = context;
struct spi_transfer reg_read_xfer[] = {
{
.tx_buf = st->reg_tx_buf,
.len = AD74413R_FRAME_SIZE,
.cs_change = 1,
},
{
.rx_buf = st->reg_rx_buf,
.len = AD74413R_FRAME_SIZE,
},
};
int ret;
ad74413r_format_reg_write(AD74413R_REG_READ_SELECT, reg,
st->reg_tx_buf);
ret = spi_sync_transfer(st->spi, reg_read_xfer,
ARRAY_SIZE(reg_read_xfer));
if (ret)
return ret;
ret = ad74413r_crc_check(st, st->reg_rx_buf);
if (ret)
return ret;
*val = get_unaligned_be16(&st->reg_rx_buf[1]);
return 0;
}
static const struct regmap_config ad74413r_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.reg_read = ad74413r_reg_read,
.reg_write = ad74413r_reg_write,
};
static int ad74413r_set_gpo_config(struct ad74413r_state *st,
unsigned int offset, u8 mode)
{
return regmap_update_bits(st->regmap, AD74413R_REG_GPO_CONFIG_X(offset),
AD74413R_GPO_CONFIG_SELECT_MASK, mode);
}
static const unsigned int ad74413r_debounce_map[AD74413R_DIN_DEBOUNCE_LEN] = {
0, 13, 18, 24, 32, 42, 56, 75,
100, 130, 180, 240, 320, 420, 560, 750,
1000, 1300, 1800, 2400, 3200, 4200, 5600, 7500,
10000, 13000, 18000, 24000, 32000, 42000, 56000, 75000,
};
static int ad74413r_set_comp_debounce(struct ad74413r_state *st,
unsigned int offset,
unsigned int debounce)
{
unsigned int val = AD74413R_DIN_DEBOUNCE_LEN - 1;
unsigned int i;
for (i = 0; i < AD74413R_DIN_DEBOUNCE_LEN; i++)
if (debounce <= ad74413r_debounce_map[i]) {
val = i;
break;
}
return regmap_update_bits(st->regmap,
AD74413R_REG_DIN_CONFIG_X(offset),
AD74413R_DIN_DEBOUNCE_MASK,
val);
}
static int ad74413r_set_comp_drive_strength(struct ad74413r_state *st,
unsigned int offset,
unsigned int strength)
{
strength = min(strength, 1800U);
return regmap_update_bits(st->regmap, AD74413R_REG_DIN_CONFIG_X(offset),
AD74413R_DIN_SINK_MASK,
FIELD_PREP(AD74413R_DIN_SINK_MASK, strength / 120));
}
static void ad74413r_gpio_set(struct gpio_chip *chip,
unsigned int offset, int val)
{
struct ad74413r_state *st = gpiochip_get_data(chip);
unsigned int real_offset = st->gpo_gpio_offsets[offset];
int ret;
ret = ad74413r_set_gpo_config(st, real_offset,
AD74413R_GPO_CONFIG_LOGIC);
if (ret)
return;
regmap_update_bits(st->regmap, AD74413R_REG_GPO_CONFIG_X(real_offset),
AD74413R_GPO_CONFIG_DATA_MASK,
val ? AD74413R_GPO_CONFIG_DATA_MASK : 0);
}
static void ad74413r_gpio_set_multiple(struct gpio_chip *chip,
unsigned long *mask,
unsigned long *bits)
{
struct ad74413r_state *st = gpiochip_get_data(chip);
unsigned long real_mask = 0;
unsigned long real_bits = 0;
unsigned int offset;
int ret;
for_each_set_bit(offset, mask, chip->ngpio) {
unsigned int real_offset = st->gpo_gpio_offsets[offset];
ret = ad74413r_set_gpo_config(st, real_offset,
AD74413R_GPO_CONFIG_LOGIC_PARALLEL);
if (ret)
return;
real_mask |= BIT(real_offset);
if (*bits & offset)
real_bits |= BIT(real_offset);
}
regmap_update_bits(st->regmap, AD74413R_REG_GPO_PAR_DATA,
real_mask, real_bits);
}
static int ad74413r_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct ad74413r_state *st = gpiochip_get_data(chip);
unsigned int real_offset = st->comp_gpio_offsets[offset];
unsigned int status;
int ret;
ret = regmap_read(st->regmap, AD74413R_REG_DIN_COMP_OUT, &status);
if (ret)
return ret;
status &= BIT(real_offset);
return status ? 1 : 0;
}
static int ad74413r_gpio_get_multiple(struct gpio_chip *chip,
unsigned long *mask,
unsigned long *bits)
{
struct ad74413r_state *st = gpiochip_get_data(chip);
unsigned int offset;
unsigned int val;
int ret;
ret = regmap_read(st->regmap, AD74413R_REG_DIN_COMP_OUT, &val);
if (ret)
return ret;
for_each_set_bit(offset, mask, chip->ngpio) {
unsigned int real_offset = st->comp_gpio_offsets[offset];
__assign_bit(offset, bits, val & BIT(real_offset));
}
return ret;
}
static int ad74413r_gpio_get_gpo_direction(struct gpio_chip *chip,
unsigned int offset)
{
return GPIO_LINE_DIRECTION_OUT;
}
static int ad74413r_gpio_get_comp_direction(struct gpio_chip *chip,
unsigned int offset)
{
return GPIO_LINE_DIRECTION_IN;
}
static int ad74413r_gpio_set_gpo_config(struct gpio_chip *chip,
unsigned int offset,
unsigned long config)
{
struct ad74413r_state *st = gpiochip_get_data(chip);
unsigned int real_offset = st->gpo_gpio_offsets[offset];
switch (pinconf_to_config_param(config)) {
case PIN_CONFIG_BIAS_PULL_DOWN:
return ad74413r_set_gpo_config(st, real_offset,
AD74413R_GPO_CONFIG_100K_PULL_DOWN);
case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
return ad74413r_set_gpo_config(st, real_offset,
AD74413R_GPO_CONFIG_HIGH_IMPEDANCE);
default:
return -ENOTSUPP;
}
}
static int ad74413r_gpio_set_comp_config(struct gpio_chip *chip,
unsigned int offset,
unsigned long config)
{
struct ad74413r_state *st = gpiochip_get_data(chip);
unsigned int real_offset = st->comp_gpio_offsets[offset];
switch (pinconf_to_config_param(config)) {
case PIN_CONFIG_INPUT_DEBOUNCE:
return ad74413r_set_comp_debounce(st, real_offset,
pinconf_to_config_argument(config));
default:
return -ENOTSUPP;
}
}
static int ad74413r_reset(struct ad74413r_state *st)
{
int ret;
if (st->reset_gpio) {
gpiod_set_value_cansleep(st->reset_gpio, 1);
fsleep(50);
gpiod_set_value_cansleep(st->reset_gpio, 0);
return 0;
}
ret = regmap_write(st->regmap, AD74413R_REG_CMD_KEY,
AD74413R_CMD_KEY_RESET1);
if (ret)
return ret;
return regmap_write(st->regmap, AD74413R_REG_CMD_KEY,
AD74413R_CMD_KEY_RESET2);
}
static int ad74413r_set_channel_dac_code(struct ad74413r_state *st,
unsigned int channel, int dac_code)
{
struct reg_sequence reg_seq[2] = {
{ AD74413R_REG_DAC_CODE_X(channel), dac_code },
{ AD74413R_REG_CMD_KEY, AD74413R_CMD_KEY_LDAC },
};
return regmap_multi_reg_write(st->regmap, reg_seq, 2);
}
static int ad74413r_set_channel_function(struct ad74413r_state *st,
unsigned int channel, u8 func)
{
int ret;
ret = regmap_update_bits(st->regmap,
AD74413R_REG_CH_FUNC_SETUP_X(channel),
AD74413R_CH_FUNC_SETUP_MASK, func);
if (ret)
return ret;
if (func == CH_FUNC_CURRENT_INPUT_LOOP_POWER)
ret = regmap_set_bits(st->regmap,
AD74413R_REG_ADC_CONFIG_X(channel),
AD74413R_ADC_CONFIG_CH_200K_TO_GND);
return ret;
}
static int ad74413r_set_adc_conv_seq(struct ad74413r_state *st,
unsigned int status)
{
int ret;
/*
* These bits do not clear when a conversion completes.
* To enable a subsequent conversion, repeat the write.
*/
ret = regmap_write_bits(st->regmap, AD74413R_REG_ADC_CONV_CTRL,
AD74413R_CONV_SEQ_MASK,
FIELD_PREP(AD74413R_CONV_SEQ_MASK, status));
if (ret)
return ret;
/*
* Wait 100us before starting conversions.
*/
usleep_range(100, 120);
return 0;
}
static int ad74413r_set_adc_channel_enable(struct ad74413r_state *st,
unsigned int channel,
bool status)
{
return regmap_update_bits(st->regmap, AD74413R_REG_ADC_CONV_CTRL,
AD74413R_CH_EN_MASK(channel),
status ? AD74413R_CH_EN_MASK(channel) : 0);
}
static int ad74413r_get_adc_range(struct ad74413r_state *st,
unsigned int channel,
unsigned int *val)
{
int ret;
ret = regmap_read(st->regmap, AD74413R_REG_ADC_CONFIG_X(channel), val);
if (ret)
return ret;
*val = FIELD_GET(AD74413R_ADC_CONFIG_RANGE_MASK, *val);
return 0;
}
static int ad74413r_get_adc_rejection(struct ad74413r_state *st,
unsigned int channel,
unsigned int *val)
{
int ret;
ret = regmap_read(st->regmap, AD74413R_REG_ADC_CONFIG_X(channel), val);
if (ret)
return ret;
*val = FIELD_GET(AD74413R_ADC_CONFIG_REJECTION_MASK, *val);
return 0;
}
static int ad74413r_set_adc_rejection(struct ad74413r_state *st,
unsigned int channel,
unsigned int val)
{
return regmap_update_bits(st->regmap,
AD74413R_REG_ADC_CONFIG_X(channel),
AD74413R_ADC_CONFIG_REJECTION_MASK,
FIELD_PREP(AD74413R_ADC_CONFIG_REJECTION_MASK,
val));
}
static int ad74413r_rejection_to_rate(struct ad74413r_state *st,
unsigned int rej, int *val)
{
switch (rej) {
case AD74413R_ADC_REJECTION_50_60:
*val = 20;
return 0;
case AD74413R_ADC_REJECTION_NONE:
*val = 4800;
return 0;
case AD74413R_ADC_REJECTION_50_60_HART:
*val = 10;
return 0;
case AD74413R_ADC_REJECTION_HART:
*val = 1200;
return 0;
default:
dev_err(st->dev, "ADC rejection invalid\n");
return -EINVAL;
}
}
static int ad74413r_rate_to_rejection(struct ad74413r_state *st,
int rate, unsigned int *val)
{
switch (rate) {
case 20:
*val = AD74413R_ADC_REJECTION_50_60;
return 0;
case 4800:
*val = AD74413R_ADC_REJECTION_NONE;
return 0;
case 10:
*val = AD74413R_ADC_REJECTION_50_60_HART;
return 0;
case 1200:
*val = AD74413R_ADC_REJECTION_HART;
return 0;
default:
dev_err(st->dev, "ADC rate invalid\n");
return -EINVAL;
}
}
static int ad74413r_range_to_voltage_range(struct ad74413r_state *st,
unsigned int range, int *val)
{
switch (range) {
case AD74413R_ADC_RANGE_10V:
*val = 10000;
return 0;
case AD74413R_ADC_RANGE_2P5V_EXT_POW:
case AD74413R_ADC_RANGE_2P5V_INT_POW:
*val = 2500;
return 0;
case AD74413R_ADC_RANGE_5V_BI_DIR:
*val = 5000;
return 0;
default:
dev_err(st->dev, "ADC range invalid\n");
return -EINVAL;
}
}
static int ad74413r_range_to_voltage_offset(struct ad74413r_state *st,
unsigned int range, int *val)
{
switch (range) {
case AD74413R_ADC_RANGE_10V:
case AD74413R_ADC_RANGE_2P5V_EXT_POW:
*val = 0;
return 0;
case AD74413R_ADC_RANGE_2P5V_INT_POW:
case AD74413R_ADC_RANGE_5V_BI_DIR:
*val = -2500;
return 0;
default:
dev_err(st->dev, "ADC range invalid\n");
return -EINVAL;
}
}
static int ad74413r_range_to_voltage_offset_raw(struct ad74413r_state *st,
unsigned int range, int *val)
{
switch (range) {
case AD74413R_ADC_RANGE_10V:
case AD74413R_ADC_RANGE_2P5V_EXT_POW:
*val = 0;
return 0;
case AD74413R_ADC_RANGE_2P5V_INT_POW:
*val = -((int)AD74413R_ADC_RESULT_MAX);
return 0;
case AD74413R_ADC_RANGE_5V_BI_DIR:
*val = -((int)AD74413R_ADC_RESULT_MAX / 2);
return 0;
default:
dev_err(st->dev, "ADC range invalid\n");
return -EINVAL;
}
}
static int ad74413r_get_output_voltage_scale(struct ad74413r_state *st,
int *val, int *val2)
{
*val = AD74413R_DAC_VOLTAGE_MAX;
*val2 = AD74413R_DAC_CODE_MAX;
return IIO_VAL_FRACTIONAL;
}
static int ad74413r_get_output_current_scale(struct ad74413r_state *st,
int *val, int *val2)
{
*val = regulator_get_voltage(st->refin_reg);
*val2 = st->sense_resistor_ohms * AD74413R_DAC_CODE_MAX * 1000;
return IIO_VAL_FRACTIONAL;
}
static int ad74413r_get_input_voltage_scale(struct ad74413r_state *st,
unsigned int channel,
int *val, int *val2)
{
unsigned int range;
int ret;
ret = ad74413r_get_adc_range(st, channel, &range);
if (ret)
return ret;
ret = ad74413r_range_to_voltage_range(st, range, val);
if (ret)
return ret;
*val2 = AD74413R_ADC_RESULT_MAX;
return IIO_VAL_FRACTIONAL;
}
static int ad74413r_get_input_voltage_offset(struct ad74413r_state *st,
unsigned int channel, int *val)
{
unsigned int range;
int ret;
ret = ad74413r_get_adc_range(st, channel, &range);
if (ret)
return ret;
ret = ad74413r_range_to_voltage_offset_raw(st, range, val);
if (ret)
return ret;
return IIO_VAL_INT;
}
static int ad74413r_get_input_current_scale(struct ad74413r_state *st,
unsigned int channel, int *val,
int *val2)
{
unsigned int range;
int ret;
ret = ad74413r_get_adc_range(st, channel, &range);
if (ret)
return ret;
ret = ad74413r_range_to_voltage_range(st, range, val);
if (ret)
return ret;
*val2 = AD74413R_ADC_RESULT_MAX * st->sense_resistor_ohms;
return IIO_VAL_FRACTIONAL;
}
static int ad74413_get_input_current_offset(struct ad74413r_state *st,
unsigned int channel, int *val)
{
unsigned int range;
int voltage_range;
int voltage_offset;
int ret;
ret = ad74413r_get_adc_range(st, channel, &range);
if (ret)
return ret;
ret = ad74413r_range_to_voltage_range(st, range, &voltage_range);
if (ret)
return ret;
ret = ad74413r_range_to_voltage_offset(st, range, &voltage_offset);
if (ret)
return ret;
*val = voltage_offset * (int)AD74413R_ADC_RESULT_MAX / voltage_range;
return IIO_VAL_INT;
}
static int ad74413r_get_adc_rate(struct ad74413r_state *st,
unsigned int channel, int *val)
{
unsigned int rejection;
int ret;
ret = ad74413r_get_adc_rejection(st, channel, &rejection);
if (ret)
return ret;
ret = ad74413r_rejection_to_rate(st, rejection, val);
if (ret)
return ret;
return IIO_VAL_INT;
}
static int ad74413r_set_adc_rate(struct ad74413r_state *st,
unsigned int channel, int val)
{
unsigned int rejection;
int ret;
ret = ad74413r_rate_to_rejection(st, val, &rejection);
if (ret)
return ret;
return ad74413r_set_adc_rejection(st, channel, rejection);
}
static irqreturn_t ad74413r_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct ad74413r_state *st = iio_priv(indio_dev);
u8 *rx_buf = st->adc_samples_buf.rx_buf;
unsigned int i;
int ret;
ret = spi_sync(st->spi, &st->adc_samples_msg);
if (ret)
goto out;
for (i = 0; i < st->adc_active_channels; i++)
ad74413r_crc_check(st, &rx_buf[i * AD74413R_FRAME_SIZE]);
iio_push_to_buffers_with_timestamp(indio_dev, &st->adc_samples_buf,
iio_get_time_ns(indio_dev));
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t ad74413r_adc_data_interrupt(int irq, void *data)
{
struct iio_dev *indio_dev = data;
struct ad74413r_state *st = iio_priv(indio_dev);
if (iio_buffer_enabled(indio_dev))
iio_trigger_poll(st->trig);
else
complete(&st->adc_data_completion);
return IRQ_HANDLED;
}
static int _ad74413r_get_single_adc_result(struct ad74413r_state *st,
unsigned int channel, int *val)
{
unsigned int uval;
int ret;
reinit_completion(&st->adc_data_completion);
ret = ad74413r_set_adc_channel_enable(st, channel, true);
if (ret)
return ret;
ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_SINGLE);
if (ret)
return ret;
ret = wait_for_completion_timeout(&st->adc_data_completion,
msecs_to_jiffies(1000));
if (!ret) {
ret = -ETIMEDOUT;
return ret;
}
ret = regmap_read(st->regmap, AD74413R_REG_ADC_RESULT_X(channel),
&uval);
if (ret)
return ret;
ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
if (ret)
return ret;
ret = ad74413r_set_adc_channel_enable(st, channel, false);
if (ret)
return ret;
*val = uval;
return IIO_VAL_INT;
}
static int ad74413r_get_single_adc_result(struct iio_dev *indio_dev,
unsigned int channel, int *val)
{
struct ad74413r_state *st = iio_priv(indio_dev);
int ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
ret = _ad74413r_get_single_adc_result(st, channel, val);
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret;
}
static void ad74413r_adc_to_resistance_result(int adc_result, int *val)
{
if (adc_result == AD74413R_ADC_RESULT_MAX)
adc_result = AD74413R_ADC_RESULT_MAX - 1;
*val = DIV_ROUND_CLOSEST(adc_result * 2100,
AD74413R_ADC_RESULT_MAX - adc_result);
}
static int ad74413r_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *active_scan_mask)
{
struct ad74413r_state *st = iio_priv(indio_dev);
struct spi_transfer *xfer = st->adc_samples_xfer;
u8 *rx_buf = st->adc_samples_buf.rx_buf;
u8 *tx_buf = st->adc_samples_tx_buf;
unsigned int channel;
int ret = -EINVAL;
mutex_lock(&st->lock);
spi_message_init(&st->adc_samples_msg);
st->adc_active_channels = 0;
for_each_clear_bit(channel, active_scan_mask, AD74413R_CHANNEL_MAX) {
ret = ad74413r_set_adc_channel_enable(st, channel, false);
if (ret)
goto out;
}
if (*active_scan_mask == 0)
goto out;
/*
* The read select register is used to select which register's value
* will be sent by the slave on the next SPI frame.
*
* Create an SPI message that, on each step, writes to the read select
* register to select the ADC result of the next enabled channel, and
* reads the ADC result of the previous enabled channel.
*
* Example:
* W: [WCH1] [WCH2] [WCH2] [WCH3] [ ]
* R: [ ] [RCH1] [RCH2] [RCH3] [RCH4]
*/
for_each_set_bit(channel, active_scan_mask, AD74413R_CHANNEL_MAX) {
ret = ad74413r_set_adc_channel_enable(st, channel, true);
if (ret)
goto out;
st->adc_active_channels++;
if (xfer == st->adc_samples_xfer)
xfer->rx_buf = NULL;
else
xfer->rx_buf = rx_buf;
xfer->tx_buf = tx_buf;
xfer->len = AD74413R_FRAME_SIZE;
xfer->cs_change = 1;
ad74413r_format_reg_write(AD74413R_REG_READ_SELECT,
AD74413R_REG_ADC_RESULT_X(channel),
tx_buf);
spi_message_add_tail(xfer, &st->adc_samples_msg);
tx_buf += AD74413R_FRAME_SIZE;
if (xfer != st->adc_samples_xfer)
rx_buf += AD74413R_FRAME_SIZE;
xfer++;
}
xfer->rx_buf = rx_buf;
xfer->tx_buf = NULL;
xfer->len = AD74413R_FRAME_SIZE;
xfer->cs_change = 0;
spi_message_add_tail(xfer, &st->adc_samples_msg);
out:
mutex_unlock(&st->lock);
return ret;
}
static int ad74413r_buffer_postenable(struct iio_dev *indio_dev)
{
struct ad74413r_state *st = iio_priv(indio_dev);
return ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_CONTINUOUS);
}
static int ad74413r_buffer_predisable(struct iio_dev *indio_dev)
{
struct ad74413r_state *st = iio_priv(indio_dev);
return ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
}
static int ad74413r_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long info)
{
struct ad74413r_state *st = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_VOLTAGE:
if (chan->output)
return ad74413r_get_output_voltage_scale(st,
val, val2);
else
return ad74413r_get_input_voltage_scale(st,
chan->channel, val, val2);
case IIO_CURRENT:
if (chan->output)
return ad74413r_get_output_current_scale(st,
val, val2);
else
return ad74413r_get_input_current_scale(st,
chan->channel, val, val2);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_VOLTAGE:
return ad74413r_get_input_voltage_offset(st,
chan->channel, val);
case IIO_CURRENT:
return ad74413_get_input_current_offset(st,
chan->channel, val);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_RAW:
if (chan->output)
return -EINVAL;
return ad74413r_get_single_adc_result(indio_dev, chan->channel,
val);
case IIO_CHAN_INFO_PROCESSED: {
int ret;
ret = ad74413r_get_single_adc_result(indio_dev, chan->channel,
val);
if (ret < 0)
return ret;
ad74413r_adc_to_resistance_result(*val, val);
return ret;
}
case IIO_CHAN_INFO_SAMP_FREQ:
return ad74413r_get_adc_rate(st, chan->channel, val);
default:
return -EINVAL;
}
}
static int ad74413r_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long info)
{
struct ad74413r_state *st = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_RAW:
if (!chan->output)
return -EINVAL;
if (val < 0 || val > AD74413R_DAC_CODE_MAX) {
dev_err(st->dev, "Invalid DAC code\n");
return -EINVAL;
}
return ad74413r_set_channel_dac_code(st, chan->channel, val);
case IIO_CHAN_INFO_SAMP_FREQ:
return ad74413r_set_adc_rate(st, chan->channel, val);
default:
return -EINVAL;
}
}
static int ad74413r_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long info)
{
struct ad74413r_state *st = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (st->chip_info->hart_support) {
*vals = ad74413r_adc_sampling_rates_hart;
*length = ARRAY_SIZE(ad74413r_adc_sampling_rates_hart);
} else {
*vals = ad74413r_adc_sampling_rates;
*length = ARRAY_SIZE(ad74413r_adc_sampling_rates);
}
*type = IIO_VAL_INT;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static const struct iio_buffer_setup_ops ad74413r_buffer_ops = {
.postenable = &ad74413r_buffer_postenable,
.predisable = &ad74413r_buffer_predisable,
};
static const struct iio_trigger_ops ad74413r_trigger_ops = {
.validate_device = iio_trigger_validate_own_device,
};
static const struct iio_info ad74413r_info = {
.read_raw = &ad74413r_read_raw,
.write_raw = &ad74413r_write_raw,
.read_avail = &ad74413r_read_avail,
.update_scan_mode = &ad74413r_update_scan_mode,
};
#define AD74413R_DAC_CHANNEL(_type, extra_mask_separate) \
{ \
.type = (_type), \
.indexed = 1, \
.output = 1, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
| (extra_mask_separate), \
}
#define AD74413R_ADC_CHANNEL(_type, extra_mask_separate) \
{ \
.type = (_type), \
.indexed = 1, \
.output = 0, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
| BIT(IIO_CHAN_INFO_SAMP_FREQ) \
| (extra_mask_separate), \
.info_mask_separate_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_type = { \
.sign = 'u', \
.realbits = 16, \
.storagebits = 32, \
.shift = 8, \
.endianness = IIO_BE, \
}, \
}
#define AD74413R_ADC_VOLTAGE_CHANNEL \
AD74413R_ADC_CHANNEL(IIO_VOLTAGE, BIT(IIO_CHAN_INFO_SCALE) \
| BIT(IIO_CHAN_INFO_OFFSET))
#define AD74413R_ADC_CURRENT_CHANNEL \
AD74413R_ADC_CHANNEL(IIO_CURRENT, BIT(IIO_CHAN_INFO_SCALE) \
| BIT(IIO_CHAN_INFO_OFFSET))
static struct iio_chan_spec ad74413r_voltage_output_channels[] = {
AD74413R_DAC_CHANNEL(IIO_VOLTAGE, BIT(IIO_CHAN_INFO_SCALE)),
AD74413R_ADC_CURRENT_CHANNEL,
};
static struct iio_chan_spec ad74413r_current_output_channels[] = {
AD74413R_DAC_CHANNEL(IIO_CURRENT, BIT(IIO_CHAN_INFO_SCALE)),
AD74413R_ADC_VOLTAGE_CHANNEL,
};
static struct iio_chan_spec ad74413r_voltage_input_channels[] = {
AD74413R_ADC_VOLTAGE_CHANNEL,
};
static struct iio_chan_spec ad74413r_current_input_channels[] = {
AD74413R_ADC_CURRENT_CHANNEL,
};
static struct iio_chan_spec ad74413r_current_input_loop_channels[] = {
AD74413R_DAC_CHANNEL(IIO_CURRENT, BIT(IIO_CHAN_INFO_SCALE)),
AD74413R_ADC_CURRENT_CHANNEL,
};
static struct iio_chan_spec ad74413r_resistance_input_channels[] = {
AD74413R_ADC_CHANNEL(IIO_RESISTANCE, BIT(IIO_CHAN_INFO_PROCESSED)),
};
static struct iio_chan_spec ad74413r_digital_input_channels[] = {
AD74413R_ADC_VOLTAGE_CHANNEL,
};
#define _AD74413R_CHANNELS(_channels) \
{ \
.channels = _channels, \
.num_channels = ARRAY_SIZE(_channels), \
}
#define AD74413R_CHANNELS(name) \
_AD74413R_CHANNELS(ad74413r_ ## name ## _channels)
static const struct ad74413r_channels ad74413r_channels_map[] = {
[CH_FUNC_HIGH_IMPEDANCE] = AD74413R_CHANNELS(voltage_input),
[CH_FUNC_VOLTAGE_OUTPUT] = AD74413R_CHANNELS(voltage_output),
[CH_FUNC_CURRENT_OUTPUT] = AD74413R_CHANNELS(current_output),
[CH_FUNC_VOLTAGE_INPUT] = AD74413R_CHANNELS(voltage_input),
[CH_FUNC_CURRENT_INPUT_EXT_POWER] = AD74413R_CHANNELS(current_input),
[CH_FUNC_CURRENT_INPUT_LOOP_POWER] = AD74413R_CHANNELS(current_input_loop),
[CH_FUNC_RESISTANCE_INPUT] = AD74413R_CHANNELS(resistance_input),
[CH_FUNC_DIGITAL_INPUT_LOGIC] = AD74413R_CHANNELS(digital_input),
[CH_FUNC_DIGITAL_INPUT_LOOP_POWER] = AD74413R_CHANNELS(digital_input),
[CH_FUNC_CURRENT_INPUT_EXT_POWER_HART] = AD74413R_CHANNELS(current_input),
[CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART] = AD74413R_CHANNELS(current_input),
};
static int ad74413r_parse_channel_config(struct iio_dev *indio_dev,
struct fwnode_handle *channel_node)
{
struct ad74413r_state *st = iio_priv(indio_dev);
struct ad74413r_channel_config *config;
u32 index;
int ret;
ret = fwnode_property_read_u32(channel_node, "reg", &index);
if (ret) {
dev_err(st->dev, "Failed to read channel reg: %d\n", ret);
return ret;
}
if (index >= AD74413R_CHANNEL_MAX) {
dev_err(st->dev, "Channel index %u is too large\n", index);
return -EINVAL;
}
config = &st->channel_configs[index];
if (config->initialized) {
dev_err(st->dev, "Channel %u already initialized\n", index);
return -EINVAL;
}
config->func = CH_FUNC_HIGH_IMPEDANCE;
fwnode_property_read_u32(channel_node, "adi,ch-func", &config->func);
if (config->func < CH_FUNC_MIN || config->func > CH_FUNC_MAX) {
dev_err(st->dev, "Invalid channel function %u\n", config->func);
return -EINVAL;
}
if (!st->chip_info->hart_support &&
(config->func == CH_FUNC_CURRENT_INPUT_EXT_POWER_HART ||
config->func == CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART)) {
dev_err(st->dev, "Unsupported HART function %u\n", config->func);
return -EINVAL;
}
if (config->func == CH_FUNC_DIGITAL_INPUT_LOGIC ||
config->func == CH_FUNC_DIGITAL_INPUT_LOOP_POWER)
st->num_comparator_gpios++;
config->gpo_comparator = fwnode_property_read_bool(channel_node,
"adi,gpo-comparator");
fwnode_property_read_u32(channel_node, "drive-strength-microamp",
&config->drive_strength);
if (!config->gpo_comparator)
st->num_gpo_gpios++;
indio_dev->num_channels += ad74413r_channels_map[config->func].num_channels;
config->initialized = true;
return 0;
}
static int ad74413r_parse_channel_configs(struct iio_dev *indio_dev)
{
struct ad74413r_state *st = iio_priv(indio_dev);
struct fwnode_handle *channel_node = NULL;
int ret;
fwnode_for_each_available_child_node(dev_fwnode(st->dev), channel_node) {
ret = ad74413r_parse_channel_config(indio_dev, channel_node);
if (ret)
goto put_channel_node;
}
return 0;
put_channel_node:
fwnode_handle_put(channel_node);
return ret;
}
static int ad74413r_setup_channels(struct iio_dev *indio_dev)
{
struct ad74413r_state *st = iio_priv(indio_dev);
struct ad74413r_channel_config *config;
struct iio_chan_spec *channels, *chans;
unsigned int i, num_chans, chan_i;
int ret;
channels = devm_kcalloc(st->dev, sizeof(*channels),
indio_dev->num_channels, GFP_KERNEL);
if (!channels)
return -ENOMEM;
indio_dev->channels = channels;
for (i = 0; i < AD74413R_CHANNEL_MAX; i++) {
config = &st->channel_configs[i];
chans = ad74413r_channels_map[config->func].channels;
num_chans = ad74413r_channels_map[config->func].num_channels;
memcpy(channels, chans, num_chans * sizeof(*chans));
for (chan_i = 0; chan_i < num_chans; chan_i++) {
struct iio_chan_spec *chan = &channels[chan_i];
chan->channel = i;
if (chan->output)
chan->scan_index = -1;
else
chan->scan_index = i;
}
ret = ad74413r_set_channel_function(st, i, config->func);
if (ret)
return ret;
channels += num_chans;
}
return 0;
}
static int ad74413r_setup_gpios(struct ad74413r_state *st)
{
struct ad74413r_channel_config *config;
unsigned int comp_gpio_i = 0;
unsigned int gpo_gpio_i = 0;
unsigned int i;
u8 gpo_config;
u32 strength;
int ret;
for (i = 0; i < AD74413R_CHANNEL_MAX; i++) {
config = &st->channel_configs[i];
if (config->gpo_comparator) {
gpo_config = AD74413R_GPO_CONFIG_COMPARATOR;
} else {
gpo_config = AD74413R_GPO_CONFIG_LOGIC;
st->gpo_gpio_offsets[gpo_gpio_i++] = i;
}
if (config->func == CH_FUNC_DIGITAL_INPUT_LOGIC ||
config->func == CH_FUNC_DIGITAL_INPUT_LOOP_POWER) {
st->comp_gpio_offsets[comp_gpio_i++] = i;
strength = config->drive_strength;
ret = ad74413r_set_comp_drive_strength(st, i, strength);
if (ret)
return ret;
}
ret = ad74413r_set_gpo_config(st, i, gpo_config);
if (ret)
return ret;
}
return 0;
}
static void ad74413r_regulator_disable(void *regulator)
{
regulator_disable(regulator);
}
static int ad74413r_probe(struct spi_device *spi)
{
struct ad74413r_state *st;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->spi = spi;
st->dev = &spi->dev;
st->chip_info = device_get_match_data(&spi->dev);
if (!st->chip_info) {
const struct spi_device_id *id = spi_get_device_id(spi);
if (id)
st->chip_info =
(struct ad74413r_chip_info *)id->driver_data;
if (!st->chip_info)
return -EINVAL;
}
mutex_init(&st->lock);
init_completion(&st->adc_data_completion);
st->regmap = devm_regmap_init(st->dev, NULL, st,
&ad74413r_regmap_config);
if (IS_ERR(st->regmap))
return PTR_ERR(st->regmap);
st->reset_gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(st->reset_gpio))
return PTR_ERR(st->reset_gpio);
st->refin_reg = devm_regulator_get(st->dev, "refin");
if (IS_ERR(st->refin_reg))
return dev_err_probe(st->dev, PTR_ERR(st->refin_reg),
"Failed to get refin regulator\n");
ret = regulator_enable(st->refin_reg);
if (ret)
return ret;
ret = devm_add_action_or_reset(st->dev, ad74413r_regulator_disable,
st->refin_reg);
if (ret)
return ret;
st->sense_resistor_ohms = 100000000;
device_property_read_u32(st->dev, "shunt-resistor-micro-ohms",
&st->sense_resistor_ohms);
st->sense_resistor_ohms /= 1000000;
st->trig = devm_iio_trigger_alloc(st->dev, "%s-dev%d",
st->chip_info->name, iio_device_id(indio_dev));
if (!st->trig)
return -ENOMEM;
st->trig->ops = &ad74413r_trigger_ops;
iio_trigger_set_drvdata(st->trig, st);
ret = devm_iio_trigger_register(st->dev, st->trig);
if (ret)
return ret;
indio_dev->name = st->chip_info->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &ad74413r_info;
indio_dev->trig = iio_trigger_get(st->trig);
ret = ad74413r_reset(st);
if (ret)
return ret;
ret = ad74413r_parse_channel_configs(indio_dev);
if (ret)
return ret;
ret = ad74413r_setup_channels(indio_dev);
if (ret)
return ret;
ret = ad74413r_setup_gpios(st);
if (ret)
return ret;
if (st->num_gpo_gpios) {
st->gpo_gpiochip.owner = THIS_MODULE;
st->gpo_gpiochip.label = st->chip_info->name;
st->gpo_gpiochip.base = -1;
st->gpo_gpiochip.ngpio = st->num_gpo_gpios;
st->gpo_gpiochip.parent = st->dev;
st->gpo_gpiochip.can_sleep = true;
st->gpo_gpiochip.set = ad74413r_gpio_set;
st->gpo_gpiochip.set_multiple = ad74413r_gpio_set_multiple;
st->gpo_gpiochip.set_config = ad74413r_gpio_set_gpo_config;
st->gpo_gpiochip.get_direction =
ad74413r_gpio_get_gpo_direction;
ret = devm_gpiochip_add_data(st->dev, &st->gpo_gpiochip, st);
if (ret)
return ret;
}
if (st->num_comparator_gpios) {
st->comp_gpiochip.owner = THIS_MODULE;
st->comp_gpiochip.label = st->chip_info->name;
st->comp_gpiochip.base = -1;
st->comp_gpiochip.ngpio = st->num_comparator_gpios;
st->comp_gpiochip.parent = st->dev;
st->comp_gpiochip.can_sleep = true;
st->comp_gpiochip.get = ad74413r_gpio_get;
st->comp_gpiochip.get_multiple = ad74413r_gpio_get_multiple;
st->comp_gpiochip.set_config = ad74413r_gpio_set_comp_config;
st->comp_gpiochip.get_direction =
ad74413r_gpio_get_comp_direction;
ret = devm_gpiochip_add_data(st->dev, &st->comp_gpiochip, st);
if (ret)
return ret;
}
ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
if (ret)
return ret;
ret = devm_request_irq(st->dev, spi->irq, ad74413r_adc_data_interrupt,
0, st->chip_info->name, indio_dev);
if (ret)
return dev_err_probe(st->dev, ret, "Failed to request irq\n");
ret = devm_iio_triggered_buffer_setup(st->dev, indio_dev,
&iio_pollfunc_store_time,
&ad74413r_trigger_handler,
&ad74413r_buffer_ops);
if (ret)
return ret;
return devm_iio_device_register(st->dev, indio_dev);
}
static int ad74413r_unregister_driver(struct spi_driver *spi)
{
spi_unregister_driver(spi);
return 0;
}
static int __init ad74413r_register_driver(struct spi_driver *spi)
{
crc8_populate_msb(ad74413r_crc8_table, AD74413R_CRC_POLYNOMIAL);
return spi_register_driver(spi);
}
static const struct ad74413r_chip_info ad74412r_chip_info_data = {
.hart_support = false,
.name = "ad74412r",
};
static const struct ad74413r_chip_info ad74413r_chip_info_data = {
.hart_support = true,
.name = "ad74413r",
};
static const struct of_device_id ad74413r_dt_id[] = {
{
.compatible = "adi,ad74412r",
.data = &ad74412r_chip_info_data,
},
{
.compatible = "adi,ad74413r",
.data = &ad74413r_chip_info_data,
},
{},
};
MODULE_DEVICE_TABLE(of, ad74413r_dt_id);
static const struct spi_device_id ad74413r_spi_id[] = {
{ .name = "ad74412r", .driver_data = (kernel_ulong_t)&ad74412r_chip_info_data },
{ .name = "ad74413r", .driver_data = (kernel_ulong_t)&ad74413r_chip_info_data },
{}
};
MODULE_DEVICE_TABLE(spi, ad74413r_spi_id);
static struct spi_driver ad74413r_driver = {
.driver = {
.name = "ad74413r",
.of_match_table = ad74413r_dt_id,
},
.probe = ad74413r_probe,
.id_table = ad74413r_spi_id,
};
module_driver(ad74413r_driver,
ad74413r_register_driver,
ad74413r_unregister_driver);
MODULE_AUTHOR("Cosmin Tanislav <[email protected]>");
MODULE_DESCRIPTION("Analog Devices AD74413R ADDAC");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/addac/ad74413r.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2020, Intel Corporation.
*/
#include <linux/hid-sensor-hub.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include "../common/hid-sensors/hid-sensor-trigger.h"
enum hinge_channel {
CHANNEL_SCAN_INDEX_HINGE_ANGLE,
CHANNEL_SCAN_INDEX_SCREEN_ANGLE,
CHANNEL_SCAN_INDEX_KEYBOARD_ANGLE,
CHANNEL_SCAN_INDEX_MAX,
};
#define CHANNEL_SCAN_INDEX_TIMESTAMP CHANNEL_SCAN_INDEX_MAX
static const u32 hinge_addresses[CHANNEL_SCAN_INDEX_MAX] = {
HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(1),
HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(2),
HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(3)
};
static const char *const hinge_labels[CHANNEL_SCAN_INDEX_MAX] = { "hinge",
"screen",
"keyboard" };
struct hinge_state {
struct iio_dev *indio_dev;
struct hid_sensor_hub_attribute_info hinge[CHANNEL_SCAN_INDEX_MAX];
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common common_attributes;
const char *labels[CHANNEL_SCAN_INDEX_MAX];
struct {
u32 hinge_val[3];
u64 timestamp __aligned(8);
} scan;
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
u64 timestamp;
};
static const u32 hinge_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(1),
};
/* Channel definitions */
static const struct iio_chan_spec hinge_channels[] = {
{
.type = IIO_ANGL,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type =
BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) | BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_HINGE_ANGLE,
.scan_type = {
.sign = 's',
.storagebits = 32,
},
}, {
.type = IIO_ANGL,
.indexed = 1,
.channel = 1,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type =
BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) | BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_SCREEN_ANGLE,
.scan_type = {
.sign = 's',
.storagebits = 32,
},
}, {
.type = IIO_ANGL,
.indexed = 1,
.channel = 2,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type =
BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) | BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_KEYBOARD_ANGLE,
.scan_type = {
.sign = 's',
.storagebits = 32,
},
},
IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP)
};
/* Adjust channel real bits based on report descriptor */
static void hinge_adjust_channel_realbits(struct iio_chan_spec *channels,
int channel, int size)
{
channels[channel].scan_type.realbits = size * 8;
}
/* Channel read_raw handler */
static int hinge_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2,
long mask)
{
struct hinge_state *st = iio_priv(indio_dev);
struct hid_sensor_hub_device *hsdev;
int report_id;
s32 min;
hsdev = st->common_attributes.hsdev;
switch (mask) {
case IIO_CHAN_INFO_RAW:
hid_sensor_power_state(&st->common_attributes, true);
report_id = st->hinge[chan->scan_index].report_id;
min = st->hinge[chan->scan_index].logical_minimum;
if (report_id < 0) {
hid_sensor_power_state(&st->common_attributes, false);
return -EINVAL;
}
*val = sensor_hub_input_attr_get_raw_value(st->common_attributes.hsdev,
hsdev->usage,
hinge_addresses[chan->scan_index],
report_id,
SENSOR_HUB_SYNC, min < 0);
hid_sensor_power_state(&st->common_attributes, false);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = st->scale_pre_decml;
*val2 = st->scale_post_decml;
return st->scale_precision;
case IIO_CHAN_INFO_OFFSET:
*val = st->value_offset;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
return hid_sensor_read_samp_freq_value(&st->common_attributes,
val, val2);
case IIO_CHAN_INFO_HYSTERESIS:
return hid_sensor_read_raw_hyst_value(&st->common_attributes,
val, val2);
default:
return -EINVAL;
}
}
/* Channel write_raw handler */
static int hinge_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2,
long mask)
{
struct hinge_state *st = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
return hid_sensor_write_samp_freq_value(&st->common_attributes,
val, val2);
case IIO_CHAN_INFO_HYSTERESIS:
return hid_sensor_write_raw_hyst_value(&st->common_attributes,
val, val2);
default:
return -EINVAL;
}
}
static int hinge_read_label(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, char *label)
{
struct hinge_state *st = iio_priv(indio_dev);
return sprintf(label, "%s\n", st->labels[chan->channel]);
}
static const struct iio_info hinge_info = {
.read_raw = hinge_read_raw,
.write_raw = hinge_write_raw,
.read_label = hinge_read_label,
};
/*
* Callback handler to send event after all samples are received
* and captured.
*/
static int hinge_proc_event(struct hid_sensor_hub_device *hsdev,
unsigned int usage_id, void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct hinge_state *st = iio_priv(indio_dev);
if (atomic_read(&st->common_attributes.data_ready)) {
if (!st->timestamp)
st->timestamp = iio_get_time_ns(indio_dev);
iio_push_to_buffers_with_timestamp(indio_dev, &st->scan,
st->timestamp);
st->timestamp = 0;
}
return 0;
}
/* Capture samples in local storage */
static int hinge_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned int usage_id, size_t raw_len,
char *raw_data, void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct hinge_state *st = iio_priv(indio_dev);
int offset;
switch (usage_id) {
case HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(1):
case HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(2):
case HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(3):
offset = usage_id - HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(1);
st->scan.hinge_val[offset] = *(u32 *)raw_data;
return 0;
case HID_USAGE_SENSOR_TIME_TIMESTAMP:
st->timestamp = hid_sensor_convert_timestamp(&st->common_attributes,
*(int64_t *)raw_data);
return 0;
default:
return -EINVAL;
}
}
/* Parse report which is specific to an usage id */
static int hinge_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
struct iio_chan_spec *channels,
unsigned int usage_id, struct hinge_state *st)
{
int ret;
int i;
for (i = 0; i < CHANNEL_SCAN_INDEX_MAX; ++i) {
ret = sensor_hub_input_get_attribute_info(hsdev,
HID_INPUT_REPORT,
usage_id,
hinge_addresses[i],
&st->hinge[i]);
if (ret < 0)
return ret;
hinge_adjust_channel_realbits(channels, i, st->hinge[i].size);
}
st->scale_precision = hid_sensor_format_scale(HID_USAGE_SENSOR_HINGE,
&st->hinge[CHANNEL_SCAN_INDEX_HINGE_ANGLE],
&st->scale_pre_decml, &st->scale_post_decml);
return ret;
}
/* Function to initialize the processing for usage id */
static int hid_hinge_probe(struct platform_device *pdev)
{
struct hinge_state *st;
struct iio_dev *indio_dev;
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
int ret;
int i;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
platform_set_drvdata(pdev, indio_dev);
st = iio_priv(indio_dev);
st->common_attributes.hsdev = hsdev;
st->common_attributes.pdev = pdev;
st->indio_dev = indio_dev;
for (i = 0; i < CHANNEL_SCAN_INDEX_MAX; i++)
st->labels[i] = hinge_labels[i];
ret = hid_sensor_parse_common_attributes(hsdev, hsdev->usage,
&st->common_attributes,
hinge_sensitivity_addresses,
ARRAY_SIZE(hinge_sensitivity_addresses));
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;
}
indio_dev->num_channels = ARRAY_SIZE(hinge_channels);
indio_dev->channels = devm_kmemdup(&indio_dev->dev, hinge_channels,
sizeof(hinge_channels), GFP_KERNEL);
if (!indio_dev->channels)
return -ENOMEM;
ret = hinge_parse_report(pdev, hsdev,
(struct iio_chan_spec *)indio_dev->channels,
hsdev->usage, st);
if (ret) {
dev_err(&pdev->dev, "failed to setup attributes\n");
return ret;
}
indio_dev->info = &hinge_info;
indio_dev->name = "hinge";
indio_dev->modes = INDIO_DIRECT_MODE;
atomic_set(&st->common_attributes.data_ready, 0);
ret = hid_sensor_setup_trigger(indio_dev, indio_dev->name,
&st->common_attributes);
if (ret < 0) {
dev_err(&pdev->dev, "trigger setup failed\n");
return ret;
}
st->callbacks.send_event = hinge_proc_event;
st->callbacks.capture_sample = hinge_capture_sample;
st->callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, hsdev->usage, &st->callbacks);
if (ret < 0) {
dev_err(&pdev->dev, "callback reg failed\n");
goto error_remove_trigger;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&pdev->dev, "device register failed\n");
goto error_remove_callback;
}
return ret;
error_remove_callback:
sensor_hub_remove_callback(hsdev, hsdev->usage);
error_remove_trigger:
hid_sensor_remove_trigger(indio_dev, &st->common_attributes);
return ret;
}
/* Function to deinitialize the processing for usage id */
static int hid_hinge_remove(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct hinge_state *st = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
sensor_hub_remove_callback(hsdev, hsdev->usage);
hid_sensor_remove_trigger(indio_dev, &st->common_attributes);
return 0;
}
static const struct platform_device_id hid_hinge_ids[] = {
{
/* Format: HID-SENSOR-INT-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-INT-020b",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, hid_hinge_ids);
static struct platform_driver hid_hinge_platform_driver = {
.id_table = hid_hinge_ids,
.driver = {
.name = KBUILD_MODNAME,
.pm = &hid_sensor_pm_ops,
},
.probe = hid_hinge_probe,
.remove = hid_hinge_remove,
};
module_platform_driver(hid_hinge_platform_driver);
MODULE_DESCRIPTION("HID Sensor INTEL Hinge");
MODULE_AUTHOR("Ye Xiang <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_HID);
| linux-master | drivers/iio/position/hid-sensor-custom-intel-hinge.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* Azoteq IQS624/625 Angular Position Sensors
*
* Copyright (C) 2019 Jeff LaBundy <[email protected]>
*/
#include <linux/device.h>
#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/kernel.h>
#include <linux/mfd/iqs62x.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/notifier.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#define IQS624_POS_DEG_OUT 0x16
#define IQS624_POS_SCALE1 (314159 / 180)
#define IQS624_POS_SCALE2 100000
struct iqs624_pos_private {
struct iqs62x_core *iqs62x;
struct iio_dev *indio_dev;
struct notifier_block notifier;
struct mutex lock;
bool angle_en;
u16 angle;
};
static int iqs624_pos_angle_en(struct iqs62x_core *iqs62x, bool angle_en)
{
unsigned int event_mask = IQS624_HALL_UI_WHL_EVENT;
/*
* The IQS625 reports angular position in the form of coarse intervals,
* so only interval change events are unmasked. Conversely, the IQS624
* reports angular position down to one degree of resolution, so wheel
* movement events are unmasked instead.
*/
if (iqs62x->dev_desc->prod_num == IQS625_PROD_NUM)
event_mask = IQS624_HALL_UI_INT_EVENT;
return regmap_update_bits(iqs62x->regmap, IQS624_HALL_UI, event_mask,
angle_en ? 0 : 0xFF);
}
static int iqs624_pos_notifier(struct notifier_block *notifier,
unsigned long event_flags, void *context)
{
struct iqs62x_event_data *event_data = context;
struct iqs624_pos_private *iqs624_pos;
struct iqs62x_core *iqs62x;
struct iio_dev *indio_dev;
u16 angle = event_data->ui_data;
s64 timestamp;
int ret;
iqs624_pos = container_of(notifier, struct iqs624_pos_private,
notifier);
indio_dev = iqs624_pos->indio_dev;
timestamp = iio_get_time_ns(indio_dev);
iqs62x = iqs624_pos->iqs62x;
if (iqs62x->dev_desc->prod_num == IQS625_PROD_NUM)
angle = event_data->interval;
mutex_lock(&iqs624_pos->lock);
if (event_flags & BIT(IQS62X_EVENT_SYS_RESET)) {
ret = iqs624_pos_angle_en(iqs62x, iqs624_pos->angle_en);
if (ret) {
dev_err(indio_dev->dev.parent,
"Failed to re-initialize device: %d\n", ret);
ret = NOTIFY_BAD;
} else {
ret = NOTIFY_OK;
}
} else if (iqs624_pos->angle_en && (angle != iqs624_pos->angle)) {
iio_push_event(indio_dev,
IIO_UNMOD_EVENT_CODE(IIO_ANGL, 0,
IIO_EV_TYPE_CHANGE,
IIO_EV_DIR_NONE),
timestamp);
iqs624_pos->angle = angle;
ret = NOTIFY_OK;
} else {
ret = NOTIFY_DONE;
}
mutex_unlock(&iqs624_pos->lock);
return ret;
}
static void iqs624_pos_notifier_unregister(void *context)
{
struct iqs624_pos_private *iqs624_pos = context;
struct iio_dev *indio_dev = iqs624_pos->indio_dev;
int ret;
ret = blocking_notifier_chain_unregister(&iqs624_pos->iqs62x->nh,
&iqs624_pos->notifier);
if (ret)
dev_err(indio_dev->dev.parent,
"Failed to unregister notifier: %d\n", ret);
}
static int iqs624_pos_angle_get(struct iqs62x_core *iqs62x, unsigned int *val)
{
int ret;
__le16 val_buf;
if (iqs62x->dev_desc->prod_num == IQS625_PROD_NUM)
return regmap_read(iqs62x->regmap, iqs62x->dev_desc->interval,
val);
ret = regmap_raw_read(iqs62x->regmap, IQS624_POS_DEG_OUT, &val_buf,
sizeof(val_buf));
if (ret)
return ret;
*val = le16_to_cpu(val_buf);
return 0;
}
static int iqs624_pos_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct iqs624_pos_private *iqs624_pos = iio_priv(indio_dev);
struct iqs62x_core *iqs62x = iqs624_pos->iqs62x;
unsigned int scale = 1;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iqs624_pos_angle_get(iqs62x, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
if (iqs62x->dev_desc->prod_num == IQS625_PROD_NUM) {
ret = regmap_read(iqs62x->regmap, IQS624_INTERVAL_DIV,
&scale);
if (ret)
return ret;
}
*val = scale * IQS624_POS_SCALE1;
*val2 = IQS624_POS_SCALE2;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
}
static int iqs624_pos_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct iqs624_pos_private *iqs624_pos = iio_priv(indio_dev);
int ret;
mutex_lock(&iqs624_pos->lock);
ret = iqs624_pos->angle_en;
mutex_unlock(&iqs624_pos->lock);
return ret;
}
static int iqs624_pos_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct iqs624_pos_private *iqs624_pos = iio_priv(indio_dev);
struct iqs62x_core *iqs62x = iqs624_pos->iqs62x;
unsigned int val;
int ret;
mutex_lock(&iqs624_pos->lock);
ret = iqs624_pos_angle_get(iqs62x, &val);
if (ret)
goto err_mutex;
ret = iqs624_pos_angle_en(iqs62x, state);
if (ret)
goto err_mutex;
iqs624_pos->angle = val;
iqs624_pos->angle_en = state;
err_mutex:
mutex_unlock(&iqs624_pos->lock);
return ret;
}
static const struct iio_info iqs624_pos_info = {
.read_raw = &iqs624_pos_read_raw,
.read_event_config = iqs624_pos_read_event_config,
.write_event_config = iqs624_pos_write_event_config,
};
static const struct iio_event_spec iqs624_pos_events[] = {
{
.type = IIO_EV_TYPE_CHANGE,
.dir = IIO_EV_DIR_NONE,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
},
};
static const struct iio_chan_spec iqs624_pos_channels[] = {
{
.type = IIO_ANGL,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.event_spec = iqs624_pos_events,
.num_event_specs = ARRAY_SIZE(iqs624_pos_events),
},
};
static int iqs624_pos_probe(struct platform_device *pdev)
{
struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent);
struct iqs624_pos_private *iqs624_pos;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*iqs624_pos));
if (!indio_dev)
return -ENOMEM;
iqs624_pos = iio_priv(indio_dev);
iqs624_pos->iqs62x = iqs62x;
iqs624_pos->indio_dev = indio_dev;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = iqs624_pos_channels;
indio_dev->num_channels = ARRAY_SIZE(iqs624_pos_channels);
indio_dev->name = iqs62x->dev_desc->dev_name;
indio_dev->info = &iqs624_pos_info;
mutex_init(&iqs624_pos->lock);
iqs624_pos->notifier.notifier_call = iqs624_pos_notifier;
ret = blocking_notifier_chain_register(&iqs624_pos->iqs62x->nh,
&iqs624_pos->notifier);
if (ret) {
dev_err(&pdev->dev, "Failed to register notifier: %d\n", ret);
return ret;
}
ret = devm_add_action_or_reset(&pdev->dev,
iqs624_pos_notifier_unregister,
iqs624_pos);
if (ret)
return ret;
return devm_iio_device_register(&pdev->dev, indio_dev);
}
static struct platform_driver iqs624_pos_platform_driver = {
.driver = {
.name = "iqs624-pos",
},
.probe = iqs624_pos_probe,
};
module_platform_driver(iqs624_pos_platform_driver);
MODULE_AUTHOR("Jeff LaBundy <[email protected]>");
MODULE_DESCRIPTION("Azoteq IQS624/625 Angular Position Sensors");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:iqs624-pos");
| linux-master | drivers/iio/position/iqs624-pos.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
*
* Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
* Andrew F. Davis <[email protected]>
*/
#include <linux/device.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/sysfs.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <asm/unaligned.h>
#include "afe440x.h"
#define AFE4403_DRIVER_NAME "afe4403"
/* AFE4403 Registers */
#define AFE4403_TIAGAIN 0x20
#define AFE4403_TIA_AMB_GAIN 0x21
enum afe4403_fields {
/* Gains */
F_RF_LED1, F_CF_LED1,
F_RF_LED, F_CF_LED,
/* LED Current */
F_ILED1, F_ILED2,
/* sentinel */
F_MAX_FIELDS
};
static const struct reg_field afe4403_reg_fields[] = {
/* Gains */
[F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2),
[F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7),
[F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2),
[F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7),
/* LED Current */
[F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7),
[F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15),
};
/**
* struct afe4403_data - AFE4403 device instance data
* @dev: Device structure
* @spi: SPI device handle
* @regmap: Register map of the device
* @fields: Register fields of the device
* @regulator: Pointer to the regulator for the IC
* @trig: IIO trigger for this device
* @irq: ADC_RDY line interrupt number
* @buffer: Used to construct data layout to push into IIO buffer.
*/
struct afe4403_data {
struct device *dev;
struct spi_device *spi;
struct regmap *regmap;
struct regmap_field *fields[F_MAX_FIELDS];
struct regulator *regulator;
struct iio_trigger *trig;
int irq;
/* Ensure suitable alignment for timestamp */
s32 buffer[8] __aligned(8);
};
enum afe4403_chan_id {
LED2 = 1,
ALED2,
LED1,
ALED1,
LED2_ALED2,
LED1_ALED1,
};
static const unsigned int afe4403_channel_values[] = {
[LED2] = AFE440X_LED2VAL,
[ALED2] = AFE440X_ALED2VAL,
[LED1] = AFE440X_LED1VAL,
[ALED1] = AFE440X_ALED1VAL,
[LED2_ALED2] = AFE440X_LED2_ALED2VAL,
[LED1_ALED1] = AFE440X_LED1_ALED1VAL,
};
static const unsigned int afe4403_channel_leds[] = {
[LED2] = F_ILED2,
[LED1] = F_ILED1,
};
static const struct iio_chan_spec afe4403_channels[] = {
/* ADC values */
AFE440X_INTENSITY_CHAN(LED2, 0),
AFE440X_INTENSITY_CHAN(ALED2, 0),
AFE440X_INTENSITY_CHAN(LED1, 0),
AFE440X_INTENSITY_CHAN(ALED1, 0),
AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
/* LED current */
AFE440X_CURRENT_CHAN(LED2),
AFE440X_CURRENT_CHAN(LED1),
};
static const struct afe440x_val_table afe4403_res_table[] = {
{ 500000 }, { 250000 }, { 100000 }, { 50000 },
{ 25000 }, { 10000 }, { 1000000 }, { 0 },
};
AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table);
static const struct afe440x_val_table afe4403_cap_table[] = {
{ 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 },
{ 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 },
{ 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 },
{ 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 },
{ 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 },
{ 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 },
{ 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 },
{ 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 },
};
AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table);
static ssize_t afe440x_show_register(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct afe4403_data *afe = iio_priv(indio_dev);
struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
unsigned int reg_val;
int vals[2];
int ret;
ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val);
if (ret)
return ret;
if (reg_val >= afe440x_attr->table_size)
return -EINVAL;
vals[0] = afe440x_attr->val_table[reg_val].integer;
vals[1] = afe440x_attr->val_table[reg_val].fract;
return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
}
static ssize_t afe440x_store_register(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct afe4403_data *afe = iio_priv(indio_dev);
struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
int val, integer, fract, ret;
ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
if (ret)
return ret;
for (val = 0; val < afe440x_attr->table_size; val++)
if (afe440x_attr->val_table[val].integer == integer &&
afe440x_attr->val_table[val].fract == fract)
break;
if (val == afe440x_attr->table_size)
return -EINVAL;
ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
if (ret)
return ret;
return count;
}
static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table);
static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table);
static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table);
static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table);
static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table);
static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table);
static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table);
static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table);
static struct attribute *afe440x_attributes[] = {
&dev_attr_in_intensity_resistance_available.attr,
&dev_attr_in_intensity_capacitance_available.attr,
&afe440x_attr_in_intensity1_resistance.dev_attr.attr,
&afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
&afe440x_attr_in_intensity2_resistance.dev_attr.attr,
&afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
&afe440x_attr_in_intensity3_resistance.dev_attr.attr,
&afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
&afe440x_attr_in_intensity4_resistance.dev_attr.attr,
&afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
NULL
};
static const struct attribute_group afe440x_attribute_group = {
.attrs = afe440x_attributes
};
static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val)
{
u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
u8 rx[3];
int ret;
/* Enable reading from the device */
ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
if (ret)
return ret;
ret = spi_write_then_read(afe->spi, ®, 1, rx, sizeof(rx));
if (ret)
return ret;
*val = get_unaligned_be24(&rx[0]);
/* Disable reading from the device */
tx[3] = AFE440X_CONTROL0_WRITE;
ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
if (ret)
return ret;
return 0;
}
static int afe4403_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct afe4403_data *afe = iio_priv(indio_dev);
unsigned int reg, field;
int ret;
switch (chan->type) {
case IIO_INTENSITY:
switch (mask) {
case IIO_CHAN_INFO_RAW:
reg = afe4403_channel_values[chan->address];
ret = afe4403_read(afe, reg, val);
if (ret)
return ret;
return IIO_VAL_INT;
}
break;
case IIO_CURRENT:
switch (mask) {
case IIO_CHAN_INFO_RAW:
field = afe4403_channel_leds[chan->address];
ret = regmap_field_read(afe->fields[field], val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = 800000;
return IIO_VAL_INT_PLUS_MICRO;
}
break;
default:
break;
}
return -EINVAL;
}
static int afe4403_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct afe4403_data *afe = iio_priv(indio_dev);
unsigned int field = afe4403_channel_leds[chan->address];
switch (chan->type) {
case IIO_CURRENT:
switch (mask) {
case IIO_CHAN_INFO_RAW:
return regmap_field_write(afe->fields[field], val);
}
break;
default:
break;
}
return -EINVAL;
}
static const struct iio_info afe4403_iio_info = {
.attrs = &afe440x_attribute_group,
.read_raw = afe4403_read_raw,
.write_raw = afe4403_write_raw,
};
static irqreturn_t afe4403_trigger_handler(int irq, void *private)
{
struct iio_poll_func *pf = private;
struct iio_dev *indio_dev = pf->indio_dev;
struct afe4403_data *afe = iio_priv(indio_dev);
int ret, bit, i = 0;
u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
u8 rx[3];
/* Enable reading from the device */
ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
if (ret)
goto err;
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = spi_write_then_read(afe->spi,
&afe4403_channel_values[bit], 1,
rx, sizeof(rx));
if (ret)
goto err;
afe->buffer[i++] = get_unaligned_be24(&rx[0]);
}
/* Disable reading from the device */
tx[3] = AFE440X_CONTROL0_WRITE;
ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
if (ret)
goto err;
iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
pf->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
#define AFE4403_TIMING_PAIRS \
{ AFE440X_LED2STC, 0x000050 }, \
{ AFE440X_LED2ENDC, 0x0003e7 }, \
{ AFE440X_LED1LEDSTC, 0x0007d0 }, \
{ AFE440X_LED1LEDENDC, 0x000bb7 }, \
{ AFE440X_ALED2STC, 0x000438 }, \
{ AFE440X_ALED2ENDC, 0x0007cf }, \
{ AFE440X_LED1STC, 0x000820 }, \
{ AFE440X_LED1ENDC, 0x000bb7 }, \
{ AFE440X_LED2LEDSTC, 0x000000 }, \
{ AFE440X_LED2LEDENDC, 0x0003e7 }, \
{ AFE440X_ALED1STC, 0x000c08 }, \
{ AFE440X_ALED1ENDC, 0x000f9f }, \
{ AFE440X_LED2CONVST, 0x0003ef }, \
{ AFE440X_LED2CONVEND, 0x0007cf }, \
{ AFE440X_ALED2CONVST, 0x0007d7 }, \
{ AFE440X_ALED2CONVEND, 0x000bb7 }, \
{ AFE440X_LED1CONVST, 0x000bbf }, \
{ AFE440X_LED1CONVEND, 0x009c3f }, \
{ AFE440X_ALED1CONVST, 0x000fa7 }, \
{ AFE440X_ALED1CONVEND, 0x001387 }, \
{ AFE440X_ADCRSTSTCT0, 0x0003e8 }, \
{ AFE440X_ADCRSTENDCT0, 0x0003eb }, \
{ AFE440X_ADCRSTSTCT1, 0x0007d0 }, \
{ AFE440X_ADCRSTENDCT1, 0x0007d3 }, \
{ AFE440X_ADCRSTSTCT2, 0x000bb8 }, \
{ AFE440X_ADCRSTENDCT2, 0x000bbb }, \
{ AFE440X_ADCRSTSTCT3, 0x000fa0 }, \
{ AFE440X_ADCRSTENDCT3, 0x000fa3 }, \
{ AFE440X_PRPCOUNT, 0x009c3f }, \
{ AFE440X_PDNCYCLESTC, 0x001518 }, \
{ AFE440X_PDNCYCLEENDC, 0x00991f }
static const struct reg_sequence afe4403_reg_sequences[] = {
AFE4403_TIMING_PAIRS,
{ AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
{ AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN },
};
static const struct regmap_range afe4403_yes_ranges[] = {
regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
};
static const struct regmap_access_table afe4403_volatile_table = {
.yes_ranges = afe4403_yes_ranges,
.n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges),
};
static const struct regmap_config afe4403_regmap_config = {
.reg_bits = 8,
.val_bits = 24,
.max_register = AFE440X_PDNCYCLEENDC,
.cache_type = REGCACHE_RBTREE,
.volatile_table = &afe4403_volatile_table,
};
static const struct of_device_id afe4403_of_match[] = {
{ .compatible = "ti,afe4403", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, afe4403_of_match);
static int afe4403_suspend(struct device *dev)
{
struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
struct afe4403_data *afe = iio_priv(indio_dev);
int ret;
ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
AFE440X_CONTROL2_PDN_AFE,
AFE440X_CONTROL2_PDN_AFE);
if (ret)
return ret;
ret = regulator_disable(afe->regulator);
if (ret) {
dev_err(dev, "Unable to disable regulator\n");
return ret;
}
return 0;
}
static int afe4403_resume(struct device *dev)
{
struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
struct afe4403_data *afe = iio_priv(indio_dev);
int ret;
ret = regulator_enable(afe->regulator);
if (ret) {
dev_err(dev, "Unable to enable regulator\n");
return ret;
}
ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
AFE440X_CONTROL2_PDN_AFE, 0);
if (ret)
return ret;
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend,
afe4403_resume);
static int afe4403_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct afe4403_data *afe;
int i, ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe));
if (!indio_dev)
return -ENOMEM;
afe = iio_priv(indio_dev);
spi_set_drvdata(spi, indio_dev);
afe->dev = &spi->dev;
afe->spi = spi;
afe->irq = spi->irq;
afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config);
if (IS_ERR(afe->regmap)) {
dev_err(afe->dev, "Unable to allocate register map\n");
return PTR_ERR(afe->regmap);
}
for (i = 0; i < F_MAX_FIELDS; i++) {
afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
afe4403_reg_fields[i]);
if (IS_ERR(afe->fields[i])) {
dev_err(afe->dev, "Unable to allocate regmap fields\n");
return PTR_ERR(afe->fields[i]);
}
}
afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
if (IS_ERR(afe->regulator))
return dev_err_probe(afe->dev, PTR_ERR(afe->regulator),
"Unable to get regulator\n");
ret = regulator_enable(afe->regulator);
if (ret) {
dev_err(afe->dev, "Unable to enable regulator\n");
return ret;
}
ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
AFE440X_CONTROL0_SW_RESET);
if (ret) {
dev_err(afe->dev, "Unable to reset device\n");
goto err_disable_reg;
}
ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences,
ARRAY_SIZE(afe4403_reg_sequences));
if (ret) {
dev_err(afe->dev, "Unable to set register defaults\n");
goto err_disable_reg;
}
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = afe4403_channels;
indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
indio_dev->name = AFE4403_DRIVER_NAME;
indio_dev->info = &afe4403_iio_info;
if (afe->irq > 0) {
afe->trig = devm_iio_trigger_alloc(afe->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!afe->trig) {
dev_err(afe->dev, "Unable to allocate IIO trigger\n");
ret = -ENOMEM;
goto err_disable_reg;
}
iio_trigger_set_drvdata(afe->trig, indio_dev);
ret = iio_trigger_register(afe->trig);
if (ret) {
dev_err(afe->dev, "Unable to register IIO trigger\n");
goto err_disable_reg;
}
ret = devm_request_threaded_irq(afe->dev, afe->irq,
iio_trigger_generic_data_rdy_poll,
NULL, IRQF_ONESHOT,
AFE4403_DRIVER_NAME,
afe->trig);
if (ret) {
dev_err(afe->dev, "Unable to request IRQ\n");
goto err_trig;
}
}
ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
afe4403_trigger_handler, NULL);
if (ret) {
dev_err(afe->dev, "Unable to setup buffer\n");
goto err_trig;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(afe->dev, "Unable to register IIO device\n");
goto err_buff;
}
return 0;
err_buff:
iio_triggered_buffer_cleanup(indio_dev);
err_trig:
if (afe->irq > 0)
iio_trigger_unregister(afe->trig);
err_disable_reg:
regulator_disable(afe->regulator);
return ret;
}
static void afe4403_remove(struct spi_device *spi)
{
struct iio_dev *indio_dev = spi_get_drvdata(spi);
struct afe4403_data *afe = iio_priv(indio_dev);
int ret;
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
if (afe->irq > 0)
iio_trigger_unregister(afe->trig);
ret = regulator_disable(afe->regulator);
if (ret)
dev_warn(afe->dev, "Unable to disable regulator\n");
}
static const struct spi_device_id afe4403_ids[] = {
{ "afe4403", 0 },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(spi, afe4403_ids);
static struct spi_driver afe4403_spi_driver = {
.driver = {
.name = AFE4403_DRIVER_NAME,
.of_match_table = afe4403_of_match,
.pm = pm_sleep_ptr(&afe4403_pm_ops),
},
.probe = afe4403_probe,
.remove = afe4403_remove,
.id_table = afe4403_ids,
};
module_spi_driver(afe4403_spi_driver);
MODULE_AUTHOR("Andrew F. Davis <[email protected]>");
MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/health/afe4403.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters
*
* Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
* Andrew F. Davis <[email protected]>
*/
#include <linux/device.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/sysfs.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include "afe440x.h"
#define AFE4404_DRIVER_NAME "afe4404"
/* AFE4404 registers */
#define AFE4404_TIA_GAIN_SEP 0x20
#define AFE4404_TIA_GAIN 0x21
#define AFE4404_PROG_TG_STC 0x34
#define AFE4404_PROG_TG_ENDC 0x35
#define AFE4404_LED3LEDSTC 0x36
#define AFE4404_LED3LEDENDC 0x37
#define AFE4404_CLKDIV_PRF 0x39
#define AFE4404_OFFDAC 0x3a
#define AFE4404_DEC 0x3d
#define AFE4404_AVG_LED2_ALED2VAL 0x3f
#define AFE4404_AVG_LED1_ALED1VAL 0x40
/* AFE4404 CONTROL2 register fields */
#define AFE440X_CONTROL2_OSC_ENABLE BIT(9)
enum afe4404_fields {
/* Gains */
F_TIA_GAIN_SEP, F_TIA_CF_SEP,
F_TIA_GAIN, TIA_CF,
/* LED Current */
F_ILED1, F_ILED2, F_ILED3,
/* Offset DAC */
F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2,
/* sentinel */
F_MAX_FIELDS
};
static const struct reg_field afe4404_reg_fields[] = {
/* Gains */
[F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2),
[F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5),
[F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2),
[TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5),
/* LED Current */
[F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5),
[F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11),
[F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17),
/* Offset DAC */
[F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4),
[F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9),
[F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14),
[F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19),
};
/**
* struct afe4404_data - AFE4404 device instance data
* @dev: Device structure
* @regmap: Register map of the device
* @fields: Register fields of the device
* @regulator: Pointer to the regulator for the IC
* @trig: IIO trigger for this device
* @irq: ADC_RDY line interrupt number
* @buffer: Used to construct a scan to push to the iio buffer.
*/
struct afe4404_data {
struct device *dev;
struct regmap *regmap;
struct regmap_field *fields[F_MAX_FIELDS];
struct regulator *regulator;
struct iio_trigger *trig;
int irq;
s32 buffer[10] __aligned(8);
};
enum afe4404_chan_id {
LED2 = 1,
ALED2,
LED1,
ALED1,
LED2_ALED2,
LED1_ALED1,
};
static const unsigned int afe4404_channel_values[] = {
[LED2] = AFE440X_LED2VAL,
[ALED2] = AFE440X_ALED2VAL,
[LED1] = AFE440X_LED1VAL,
[ALED1] = AFE440X_ALED1VAL,
[LED2_ALED2] = AFE440X_LED2_ALED2VAL,
[LED1_ALED1] = AFE440X_LED1_ALED1VAL,
};
static const unsigned int afe4404_channel_leds[] = {
[LED2] = F_ILED2,
[ALED2] = F_ILED3,
[LED1] = F_ILED1,
};
static const unsigned int afe4404_channel_offdacs[] = {
[LED2] = F_OFFDAC_LED2,
[ALED2] = F_OFFDAC_AMB2,
[LED1] = F_OFFDAC_LED1,
[ALED1] = F_OFFDAC_AMB1,
};
static const struct iio_chan_spec afe4404_channels[] = {
/* ADC values */
AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)),
AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)),
AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)),
AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)),
AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
/* LED current */
AFE440X_CURRENT_CHAN(LED2),
AFE440X_CURRENT_CHAN(ALED2),
AFE440X_CURRENT_CHAN(LED1),
};
static const struct afe440x_val_table afe4404_res_table[] = {
{ .integer = 500000, .fract = 0 },
{ .integer = 250000, .fract = 0 },
{ .integer = 100000, .fract = 0 },
{ .integer = 50000, .fract = 0 },
{ .integer = 25000, .fract = 0 },
{ .integer = 10000, .fract = 0 },
{ .integer = 1000000, .fract = 0 },
{ .integer = 2000000, .fract = 0 },
};
AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table);
static const struct afe440x_val_table afe4404_cap_table[] = {
{ .integer = 0, .fract = 5000 },
{ .integer = 0, .fract = 2500 },
{ .integer = 0, .fract = 10000 },
{ .integer = 0, .fract = 7500 },
{ .integer = 0, .fract = 20000 },
{ .integer = 0, .fract = 17500 },
{ .integer = 0, .fract = 25000 },
{ .integer = 0, .fract = 22500 },
};
AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table);
static ssize_t afe440x_show_register(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct afe4404_data *afe = iio_priv(indio_dev);
struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
unsigned int reg_val;
int vals[2];
int ret;
ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val);
if (ret)
return ret;
if (reg_val >= afe440x_attr->table_size)
return -EINVAL;
vals[0] = afe440x_attr->val_table[reg_val].integer;
vals[1] = afe440x_attr->val_table[reg_val].fract;
return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
}
static ssize_t afe440x_store_register(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct afe4404_data *afe = iio_priv(indio_dev);
struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
int val, integer, fract, ret;
ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
if (ret)
return ret;
for (val = 0; val < afe440x_attr->table_size; val++)
if (afe440x_attr->val_table[val].integer == integer &&
afe440x_attr->val_table[val].fract == fract)
break;
if (val == afe440x_attr->table_size)
return -EINVAL;
ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
if (ret)
return ret;
return count;
}
static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table);
static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table);
static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table);
static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table);
static struct attribute *afe440x_attributes[] = {
&dev_attr_in_intensity_resistance_available.attr,
&dev_attr_in_intensity_capacitance_available.attr,
&afe440x_attr_in_intensity1_resistance.dev_attr.attr,
&afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
&afe440x_attr_in_intensity2_resistance.dev_attr.attr,
&afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
&afe440x_attr_in_intensity3_resistance.dev_attr.attr,
&afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
&afe440x_attr_in_intensity4_resistance.dev_attr.attr,
&afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
NULL
};
static const struct attribute_group afe440x_attribute_group = {
.attrs = afe440x_attributes
};
static int afe4404_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct afe4404_data *afe = iio_priv(indio_dev);
unsigned int value_reg, led_field, offdac_field;
int ret;
switch (chan->type) {
case IIO_INTENSITY:
switch (mask) {
case IIO_CHAN_INFO_RAW:
value_reg = afe4404_channel_values[chan->address];
ret = regmap_read(afe->regmap, value_reg, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_OFFSET:
offdac_field = afe4404_channel_offdacs[chan->address];
ret = regmap_field_read(afe->fields[offdac_field], val);
if (ret)
return ret;
return IIO_VAL_INT;
}
break;
case IIO_CURRENT:
switch (mask) {
case IIO_CHAN_INFO_RAW:
led_field = afe4404_channel_leds[chan->address];
ret = regmap_field_read(afe->fields[led_field], val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = 800000;
return IIO_VAL_INT_PLUS_MICRO;
}
break;
default:
break;
}
return -EINVAL;
}
static int afe4404_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct afe4404_data *afe = iio_priv(indio_dev);
unsigned int led_field, offdac_field;
switch (chan->type) {
case IIO_INTENSITY:
switch (mask) {
case IIO_CHAN_INFO_OFFSET:
offdac_field = afe4404_channel_offdacs[chan->address];
return regmap_field_write(afe->fields[offdac_field], val);
}
break;
case IIO_CURRENT:
switch (mask) {
case IIO_CHAN_INFO_RAW:
led_field = afe4404_channel_leds[chan->address];
return regmap_field_write(afe->fields[led_field], val);
}
break;
default:
break;
}
return -EINVAL;
}
static const struct iio_info afe4404_iio_info = {
.attrs = &afe440x_attribute_group,
.read_raw = afe4404_read_raw,
.write_raw = afe4404_write_raw,
};
static irqreturn_t afe4404_trigger_handler(int irq, void *private)
{
struct iio_poll_func *pf = private;
struct iio_dev *indio_dev = pf->indio_dev;
struct afe4404_data *afe = iio_priv(indio_dev);
int ret, bit, i = 0;
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = regmap_read(afe->regmap, afe4404_channel_values[bit],
&afe->buffer[i++]);
if (ret)
goto err;
}
iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
pf->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
/* Default timings from data-sheet */
#define AFE4404_TIMING_PAIRS \
{ AFE440X_PRPCOUNT, 39999 }, \
{ AFE440X_LED2LEDSTC, 0 }, \
{ AFE440X_LED2LEDENDC, 398 }, \
{ AFE440X_LED2STC, 80 }, \
{ AFE440X_LED2ENDC, 398 }, \
{ AFE440X_ADCRSTSTCT0, 5600 }, \
{ AFE440X_ADCRSTENDCT0, 5606 }, \
{ AFE440X_LED2CONVST, 5607 }, \
{ AFE440X_LED2CONVEND, 6066 }, \
{ AFE4404_LED3LEDSTC, 400 }, \
{ AFE4404_LED3LEDENDC, 798 }, \
{ AFE440X_ALED2STC, 480 }, \
{ AFE440X_ALED2ENDC, 798 }, \
{ AFE440X_ADCRSTSTCT1, 6068 }, \
{ AFE440X_ADCRSTENDCT1, 6074 }, \
{ AFE440X_ALED2CONVST, 6075 }, \
{ AFE440X_ALED2CONVEND, 6534 }, \
{ AFE440X_LED1LEDSTC, 800 }, \
{ AFE440X_LED1LEDENDC, 1198 }, \
{ AFE440X_LED1STC, 880 }, \
{ AFE440X_LED1ENDC, 1198 }, \
{ AFE440X_ADCRSTSTCT2, 6536 }, \
{ AFE440X_ADCRSTENDCT2, 6542 }, \
{ AFE440X_LED1CONVST, 6543 }, \
{ AFE440X_LED1CONVEND, 7003 }, \
{ AFE440X_ALED1STC, 1280 }, \
{ AFE440X_ALED1ENDC, 1598 }, \
{ AFE440X_ADCRSTSTCT3, 7005 }, \
{ AFE440X_ADCRSTENDCT3, 7011 }, \
{ AFE440X_ALED1CONVST, 7012 }, \
{ AFE440X_ALED1CONVEND, 7471 }, \
{ AFE440X_PDNCYCLESTC, 7671 }, \
{ AFE440X_PDNCYCLEENDC, 39199 }
static const struct reg_sequence afe4404_reg_sequences[] = {
AFE4404_TIMING_PAIRS,
{ AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
{ AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN },
{ AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE },
};
static const struct regmap_range afe4404_yes_ranges[] = {
regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL),
};
static const struct regmap_access_table afe4404_volatile_table = {
.yes_ranges = afe4404_yes_ranges,
.n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges),
};
static const struct regmap_config afe4404_regmap_config = {
.reg_bits = 8,
.val_bits = 24,
.max_register = AFE4404_AVG_LED1_ALED1VAL,
.cache_type = REGCACHE_RBTREE,
.volatile_table = &afe4404_volatile_table,
};
static const struct of_device_id afe4404_of_match[] = {
{ .compatible = "ti,afe4404", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, afe4404_of_match);
static int afe4404_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct afe4404_data *afe = iio_priv(indio_dev);
int ret;
ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
AFE440X_CONTROL2_PDN_AFE,
AFE440X_CONTROL2_PDN_AFE);
if (ret)
return ret;
ret = regulator_disable(afe->regulator);
if (ret) {
dev_err(dev, "Unable to disable regulator\n");
return ret;
}
return 0;
}
static int afe4404_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct afe4404_data *afe = iio_priv(indio_dev);
int ret;
ret = regulator_enable(afe->regulator);
if (ret) {
dev_err(dev, "Unable to enable regulator\n");
return ret;
}
ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
AFE440X_CONTROL2_PDN_AFE, 0);
if (ret)
return ret;
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend,
afe4404_resume);
static int afe4404_probe(struct i2c_client *client)
{
struct iio_dev *indio_dev;
struct afe4404_data *afe;
int i, ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe));
if (!indio_dev)
return -ENOMEM;
afe = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
afe->dev = &client->dev;
afe->irq = client->irq;
afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config);
if (IS_ERR(afe->regmap)) {
dev_err(afe->dev, "Unable to allocate register map\n");
return PTR_ERR(afe->regmap);
}
for (i = 0; i < F_MAX_FIELDS; i++) {
afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
afe4404_reg_fields[i]);
if (IS_ERR(afe->fields[i])) {
dev_err(afe->dev, "Unable to allocate regmap fields\n");
return PTR_ERR(afe->fields[i]);
}
}
afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
if (IS_ERR(afe->regulator))
return dev_err_probe(afe->dev, PTR_ERR(afe->regulator),
"Unable to get regulator\n");
ret = regulator_enable(afe->regulator);
if (ret) {
dev_err(afe->dev, "Unable to enable regulator\n");
return ret;
}
ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
AFE440X_CONTROL0_SW_RESET);
if (ret) {
dev_err(afe->dev, "Unable to reset device\n");
goto disable_reg;
}
ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences,
ARRAY_SIZE(afe4404_reg_sequences));
if (ret) {
dev_err(afe->dev, "Unable to set register defaults\n");
goto disable_reg;
}
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = afe4404_channels;
indio_dev->num_channels = ARRAY_SIZE(afe4404_channels);
indio_dev->name = AFE4404_DRIVER_NAME;
indio_dev->info = &afe4404_iio_info;
if (afe->irq > 0) {
afe->trig = devm_iio_trigger_alloc(afe->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!afe->trig) {
dev_err(afe->dev, "Unable to allocate IIO trigger\n");
ret = -ENOMEM;
goto disable_reg;
}
iio_trigger_set_drvdata(afe->trig, indio_dev);
ret = iio_trigger_register(afe->trig);
if (ret) {
dev_err(afe->dev, "Unable to register IIO trigger\n");
goto disable_reg;
}
ret = devm_request_threaded_irq(afe->dev, afe->irq,
iio_trigger_generic_data_rdy_poll,
NULL, IRQF_ONESHOT,
AFE4404_DRIVER_NAME,
afe->trig);
if (ret) {
dev_err(afe->dev, "Unable to request IRQ\n");
goto disable_reg;
}
}
ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
afe4404_trigger_handler, NULL);
if (ret) {
dev_err(afe->dev, "Unable to setup buffer\n");
goto unregister_trigger;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(afe->dev, "Unable to register IIO device\n");
goto unregister_triggered_buffer;
}
return 0;
unregister_triggered_buffer:
iio_triggered_buffer_cleanup(indio_dev);
unregister_trigger:
if (afe->irq > 0)
iio_trigger_unregister(afe->trig);
disable_reg:
regulator_disable(afe->regulator);
return ret;
}
static void afe4404_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct afe4404_data *afe = iio_priv(indio_dev);
int ret;
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
if (afe->irq > 0)
iio_trigger_unregister(afe->trig);
ret = regulator_disable(afe->regulator);
if (ret)
dev_err(afe->dev, "Unable to disable regulator\n");
}
static const struct i2c_device_id afe4404_ids[] = {
{ "afe4404", 0 },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(i2c, afe4404_ids);
static struct i2c_driver afe4404_i2c_driver = {
.driver = {
.name = AFE4404_DRIVER_NAME,
.of_match_table = afe4404_of_match,
.pm = pm_sleep_ptr(&afe4404_pm_ops),
},
.probe = afe4404_probe,
.remove = afe4404_remove,
.id_table = afe4404_ids,
};
module_i2c_driver(afe4404_i2c_driver);
MODULE_AUTHOR("Andrew F. Davis <[email protected]>");
MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/health/afe4404.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
*
* Copyright (C) 2017 Matt Ranostay <[email protected]>
*
* Support for MAX30105 optical particle sensor
* Copyright (C) 2017 Peter Meerwald-Stadler <[email protected]>
*
* 7-bit I2C chip address: 0x57
* TODO: proximity power saving feature
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#define MAX30102_REGMAP_NAME "max30102_regmap"
#define MAX30102_DRV_NAME "max30102"
#define MAX30102_PART_NUMBER 0x15
enum max30102_chip_id {
max30102,
max30105,
};
enum max3012_led_idx {
MAX30102_LED_RED,
MAX30102_LED_IR,
MAX30105_LED_GREEN,
};
#define MAX30102_REG_INT_STATUS 0x00
#define MAX30102_REG_INT_STATUS_PWR_RDY BIT(0)
#define MAX30102_REG_INT_STATUS_PROX_INT BIT(4)
#define MAX30102_REG_INT_STATUS_ALC_OVF BIT(5)
#define MAX30102_REG_INT_STATUS_PPG_RDY BIT(6)
#define MAX30102_REG_INT_STATUS_FIFO_RDY BIT(7)
#define MAX30102_REG_INT_ENABLE 0x02
#define MAX30102_REG_INT_ENABLE_PROX_INT_EN BIT(4)
#define MAX30102_REG_INT_ENABLE_ALC_OVF_EN BIT(5)
#define MAX30102_REG_INT_ENABLE_PPG_EN BIT(6)
#define MAX30102_REG_INT_ENABLE_FIFO_EN BIT(7)
#define MAX30102_REG_INT_ENABLE_MASK 0xf0
#define MAX30102_REG_INT_ENABLE_MASK_SHIFT 4
#define MAX30102_REG_FIFO_WR_PTR 0x04
#define MAX30102_REG_FIFO_OVR_CTR 0x05
#define MAX30102_REG_FIFO_RD_PTR 0x06
#define MAX30102_REG_FIFO_DATA 0x07
#define MAX30102_REG_FIFO_DATA_BYTES 3
#define MAX30102_REG_FIFO_CONFIG 0x08
#define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES BIT(1)
#define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT 5
#define MAX30102_REG_FIFO_CONFIG_AFULL BIT(0)
#define MAX30102_REG_MODE_CONFIG 0x09
#define MAX30102_REG_MODE_CONFIG_MODE_NONE 0x00
#define MAX30102_REG_MODE_CONFIG_MODE_HR 0x02 /* red LED */
#define MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2 0x03 /* red + IR LED */
#define MAX30102_REG_MODE_CONFIG_MODE_MULTI 0x07 /* multi-LED mode */
#define MAX30102_REG_MODE_CONFIG_MODE_MASK GENMASK(2, 0)
#define MAX30102_REG_MODE_CONFIG_PWR BIT(7)
#define MAX30102_REG_MODE_CONTROL_SLOT21 0x11 /* multi-LED control */
#define MAX30102_REG_MODE_CONTROL_SLOT43 0x12
#define MAX30102_REG_MODE_CONTROL_SLOT_MASK (GENMASK(6, 4) | GENMASK(2, 0))
#define MAX30102_REG_MODE_CONTROL_SLOT_SHIFT 4
#define MAX30102_REG_SPO2_CONFIG 0x0a
#define MAX30102_REG_SPO2_CONFIG_PULSE_411_US 0x03
#define MAX30102_REG_SPO2_CONFIG_SR_400HZ 0x03
#define MAX30102_REG_SPO2_CONFIG_SR_MASK 0x07
#define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT 2
#define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0)
#define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5
#define MAX30102_REG_RED_LED_CONFIG 0x0c
#define MAX30102_REG_IR_LED_CONFIG 0x0d
#define MAX30105_REG_GREEN_LED_CONFIG 0x0e
#define MAX30102_REG_TEMP_CONFIG 0x21
#define MAX30102_REG_TEMP_CONFIG_TEMP_EN BIT(0)
#define MAX30102_REG_TEMP_INTEGER 0x1f
#define MAX30102_REG_TEMP_FRACTION 0x20
#define MAX30102_REG_REV_ID 0xfe
#define MAX30102_REG_PART_ID 0xff
struct max30102_data {
struct i2c_client *client;
struct iio_dev *indio_dev;
struct mutex lock;
struct regmap *regmap;
enum max30102_chip_id chip_id;
u8 buffer[12];
__be32 processed_buffer[3]; /* 3 x 18-bit (padded to 32-bits) */
};
static const struct regmap_config max30102_regmap_config = {
.name = MAX30102_REGMAP_NAME,
.reg_bits = 8,
.val_bits = 8,
};
static const unsigned long max30102_scan_masks[] = {
BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
0
};
static const unsigned long max30105_scan_masks[] = {
BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
BIT(MAX30105_LED_GREEN),
0
};
#define MAX30102_INTENSITY_CHANNEL(_si, _mod) { \
.type = IIO_INTENSITY, \
.channel2 = _mod, \
.modified = 1, \
.scan_index = _si, \
.scan_type = { \
.sign = 'u', \
.shift = 8, \
.realbits = 18, \
.storagebits = 32, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec max30102_channels[] = {
MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
{
.type = IIO_TEMP,
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.scan_index = -1,
},
};
static const struct iio_chan_spec max30105_channels[] = {
MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
MAX30102_INTENSITY_CHANNEL(MAX30105_LED_GREEN, IIO_MOD_LIGHT_GREEN),
{
.type = IIO_TEMP,
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.scan_index = -1,
},
};
static int max30102_set_power(struct max30102_data *data, bool en)
{
return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
MAX30102_REG_MODE_CONFIG_PWR,
en ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
}
static int max30102_set_powermode(struct max30102_data *data, u8 mode, bool en)
{
u8 reg = mode;
if (!en)
reg |= MAX30102_REG_MODE_CONFIG_PWR;
return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
MAX30102_REG_MODE_CONFIG_PWR |
MAX30102_REG_MODE_CONFIG_MODE_MASK, reg);
}
#define MAX30102_MODE_CONTROL_LED_SLOTS(slot2, slot1) \
((slot2 << MAX30102_REG_MODE_CONTROL_SLOT_SHIFT) | slot1)
static int max30102_buffer_postenable(struct iio_dev *indio_dev)
{
struct max30102_data *data = iio_priv(indio_dev);
int ret;
u8 reg;
switch (*indio_dev->active_scan_mask) {
case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR):
reg = MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2;
break;
case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
BIT(MAX30105_LED_GREEN):
ret = regmap_update_bits(data->regmap,
MAX30102_REG_MODE_CONTROL_SLOT21,
MAX30102_REG_MODE_CONTROL_SLOT_MASK,
MAX30102_MODE_CONTROL_LED_SLOTS(2, 1));
if (ret)
return ret;
ret = regmap_update_bits(data->regmap,
MAX30102_REG_MODE_CONTROL_SLOT43,
MAX30102_REG_MODE_CONTROL_SLOT_MASK,
MAX30102_MODE_CONTROL_LED_SLOTS(0, 3));
if (ret)
return ret;
reg = MAX30102_REG_MODE_CONFIG_MODE_MULTI;
break;
default:
return -EINVAL;
}
return max30102_set_powermode(data, reg, true);
}
static int max30102_buffer_predisable(struct iio_dev *indio_dev)
{
struct max30102_data *data = iio_priv(indio_dev);
return max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
false);
}
static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
.postenable = max30102_buffer_postenable,
.predisable = max30102_buffer_predisable,
};
static inline int max30102_fifo_count(struct max30102_data *data)
{
unsigned int val;
int ret;
ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
if (ret)
return ret;
/* FIFO has one sample slot left */
if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
return 1;
return 0;
}
#define MAX30102_COPY_DATA(i) \
memcpy(&data->processed_buffer[(i)], \
&buffer[(i) * MAX30102_REG_FIFO_DATA_BYTES], \
MAX30102_REG_FIFO_DATA_BYTES)
static int max30102_read_measurement(struct max30102_data *data,
unsigned int measurements)
{
int ret;
u8 *buffer = (u8 *) &data->buffer;
ret = i2c_smbus_read_i2c_block_data(data->client,
MAX30102_REG_FIFO_DATA,
measurements *
MAX30102_REG_FIFO_DATA_BYTES,
buffer);
switch (measurements) {
case 3:
MAX30102_COPY_DATA(2);
fallthrough;
case 2:
MAX30102_COPY_DATA(1);
fallthrough;
case 1:
MAX30102_COPY_DATA(0);
break;
default:
return -EINVAL;
}
return (ret == measurements * MAX30102_REG_FIFO_DATA_BYTES) ?
0 : -EINVAL;
}
static irqreturn_t max30102_interrupt_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct max30102_data *data = iio_priv(indio_dev);
unsigned int measurements = bitmap_weight(indio_dev->active_scan_mask,
indio_dev->masklength);
int ret, cnt = 0;
mutex_lock(&data->lock);
while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
ret = max30102_read_measurement(data, measurements);
if (ret)
break;
iio_push_to_buffers(data->indio_dev, data->processed_buffer);
cnt--;
}
mutex_unlock(&data->lock);
return IRQ_HANDLED;
}
static int max30102_get_current_idx(unsigned int val, int *reg)
{
/* each step is 0.200 mA */
*reg = val / 200;
return *reg > 0xff ? -EINVAL : 0;
}
static int max30102_led_init(struct max30102_data *data)
{
struct device *dev = &data->client->dev;
unsigned int val;
int reg, ret;
ret = device_property_read_u32(dev, "maxim,red-led-current-microamp", &val);
if (ret) {
dev_info(dev, "no red-led-current-microamp set\n");
/* Default to 7 mA RED LED */
val = 7000;
}
ret = max30102_get_current_idx(val, ®);
if (ret) {
dev_err(dev, "invalid RED LED current setting %d\n", val);
return ret;
}
ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
if (ret)
return ret;
if (data->chip_id == max30105) {
ret = device_property_read_u32(dev,
"maxim,green-led-current-microamp", &val);
if (ret) {
dev_info(dev, "no green-led-current-microamp set\n");
/* Default to 7 mA green LED */
val = 7000;
}
ret = max30102_get_current_idx(val, ®);
if (ret) {
dev_err(dev, "invalid green LED current setting %d\n",
val);
return ret;
}
ret = regmap_write(data->regmap, MAX30105_REG_GREEN_LED_CONFIG,
reg);
if (ret)
return ret;
}
ret = device_property_read_u32(dev, "maxim,ir-led-current-microamp", &val);
if (ret) {
dev_info(dev, "no ir-led-current-microamp set\n");
/* Default to 7 mA IR LED */
val = 7000;
}
ret = max30102_get_current_idx(val, ®);
if (ret) {
dev_err(dev, "invalid IR LED current setting %d\n", val);
return ret;
}
return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
}
static int max30102_chip_init(struct max30102_data *data)
{
int ret;
/* setup LED current settings */
ret = max30102_led_init(data);
if (ret)
return ret;
/* configure 18-bit HR + SpO2 readings at 400Hz */
ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
<< MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
(MAX30102_REG_SPO2_CONFIG_SR_400HZ
<< MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
if (ret)
return ret;
/* average 4 samples + generate FIFO interrupt */
ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
<< MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
MAX30102_REG_FIFO_CONFIG_AFULL);
if (ret)
return ret;
/* enable FIFO interrupt */
return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
MAX30102_REG_INT_ENABLE_MASK,
MAX30102_REG_INT_ENABLE_FIFO_EN);
}
static int max30102_read_temp(struct max30102_data *data, int *val)
{
int ret;
unsigned int reg;
ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, ®);
if (ret < 0)
return ret;
*val = reg << 4;
ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, ®);
if (ret < 0)
return ret;
*val |= reg & 0xf;
*val = sign_extend32(*val, 11);
return 0;
}
static int max30102_get_temp(struct max30102_data *data, int *val, bool en)
{
int ret;
if (en) {
ret = max30102_set_power(data, true);
if (ret)
return ret;
}
/* start acquisition */
ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
MAX30102_REG_TEMP_CONFIG_TEMP_EN,
MAX30102_REG_TEMP_CONFIG_TEMP_EN);
if (ret)
goto out;
msleep(35);
ret = max30102_read_temp(data, val);
out:
if (en)
max30102_set_power(data, false);
return ret;
}
static int max30102_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct max30102_data *data = iio_priv(indio_dev);
int ret = -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* Temperature reading can only be acquired when not in
* shutdown; leave shutdown briefly when buffer not running
*/
any_mode_retry:
if (iio_device_claim_buffer_mode(indio_dev)) {
/*
* This one is a *bit* hacky. If we cannot claim buffer
* mode, then try direct mode so that we make sure
* things cannot concurrently change. And we just keep
* trying until we get one of the modes...
*/
if (iio_device_claim_direct_mode(indio_dev))
goto any_mode_retry;
ret = max30102_get_temp(data, val, true);
iio_device_release_direct_mode(indio_dev);
} else {
ret = max30102_get_temp(data, val, false);
iio_device_release_buffer_mode(indio_dev);
}
if (ret)
return ret;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
*val = 1000; /* 62.5 */
*val2 = 16;
ret = IIO_VAL_FRACTIONAL;
break;
}
return ret;
}
static const struct iio_info max30102_info = {
.read_raw = max30102_read_raw,
};
static int max30102_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct max30102_data *data;
struct iio_dev *indio_dev;
int ret;
unsigned int reg;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
indio_dev->name = MAX30102_DRV_NAME;
indio_dev->info = &max30102_info;
indio_dev->modes = INDIO_DIRECT_MODE;
data = iio_priv(indio_dev);
data->indio_dev = indio_dev;
data->client = client;
data->chip_id = id->driver_data;
mutex_init(&data->lock);
i2c_set_clientdata(client, indio_dev);
switch (data->chip_id) {
case max30105:
indio_dev->channels = max30105_channels;
indio_dev->num_channels = ARRAY_SIZE(max30105_channels);
indio_dev->available_scan_masks = max30105_scan_masks;
break;
case max30102:
indio_dev->channels = max30102_channels;
indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
indio_dev->available_scan_masks = max30102_scan_masks;
break;
default:
return -ENODEV;
}
ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
&max30102_buffer_setup_ops);
if (ret)
return ret;
data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
if (IS_ERR(data->regmap)) {
dev_err(&client->dev, "regmap initialization failed\n");
return PTR_ERR(data->regmap);
}
/* check part ID */
ret = regmap_read(data->regmap, MAX30102_REG_PART_ID, ®);
if (ret)
return ret;
if (reg != MAX30102_PART_NUMBER)
return -ENODEV;
/* show revision ID */
ret = regmap_read(data->regmap, MAX30102_REG_REV_ID, ®);
if (ret)
return ret;
dev_dbg(&client->dev, "max3010x revision %02x\n", reg);
/* clear mode setting, chip shutdown */
ret = max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
false);
if (ret)
return ret;
ret = max30102_chip_init(data);
if (ret)
return ret;
if (client->irq <= 0) {
dev_err(&client->dev, "no valid irq defined\n");
return -EINVAL;
}
ret = devm_request_threaded_irq(&client->dev, client->irq,
NULL, max30102_interrupt_handler,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
"max30102_irq", indio_dev);
if (ret) {
dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
return ret;
}
return iio_device_register(indio_dev);
}
static void max30102_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct max30102_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
max30102_set_power(data, false);
}
static const struct i2c_device_id max30102_id[] = {
{ "max30102", max30102 },
{ "max30105", max30105 },
{}
};
MODULE_DEVICE_TABLE(i2c, max30102_id);
static const struct of_device_id max30102_dt_ids[] = {
{ .compatible = "maxim,max30102" },
{ .compatible = "maxim,max30105" },
{ }
};
MODULE_DEVICE_TABLE(of, max30102_dt_ids);
static struct i2c_driver max30102_driver = {
.driver = {
.name = MAX30102_DRV_NAME,
.of_match_table = max30102_dt_ids,
},
.probe = max30102_probe,
.remove = max30102_remove,
.id_table = max30102_id,
};
module_i2c_driver(max30102_driver);
MODULE_AUTHOR("Matt Ranostay <[email protected]>");
MODULE_DESCRIPTION("MAX30102 heart rate/pulse oximeter and MAX30105 particle sensor driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/health/max30102.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor
*
* Copyright (C) 2015, 2018
* Author: Matt Ranostay <[email protected]>
*
* TODO: enable pulse length controls via device tree properties
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#define MAX30100_REGMAP_NAME "max30100_regmap"
#define MAX30100_DRV_NAME "max30100"
#define MAX30100_REG_INT_STATUS 0x00
#define MAX30100_REG_INT_STATUS_PWR_RDY BIT(0)
#define MAX30100_REG_INT_STATUS_SPO2_RDY BIT(4)
#define MAX30100_REG_INT_STATUS_HR_RDY BIT(5)
#define MAX30100_REG_INT_STATUS_FIFO_RDY BIT(7)
#define MAX30100_REG_INT_ENABLE 0x01
#define MAX30100_REG_INT_ENABLE_SPO2_EN BIT(0)
#define MAX30100_REG_INT_ENABLE_HR_EN BIT(1)
#define MAX30100_REG_INT_ENABLE_FIFO_EN BIT(3)
#define MAX30100_REG_INT_ENABLE_MASK 0xf0
#define MAX30100_REG_INT_ENABLE_MASK_SHIFT 4
#define MAX30100_REG_FIFO_WR_PTR 0x02
#define MAX30100_REG_FIFO_OVR_CTR 0x03
#define MAX30100_REG_FIFO_RD_PTR 0x04
#define MAX30100_REG_FIFO_DATA 0x05
#define MAX30100_REG_FIFO_DATA_ENTRY_COUNT 16
#define MAX30100_REG_FIFO_DATA_ENTRY_LEN 4
#define MAX30100_REG_MODE_CONFIG 0x06
#define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0)
#define MAX30100_REG_MODE_CONFIG_MODE_HR_EN BIT(1)
#define MAX30100_REG_MODE_CONFIG_MODE_MASK 0x03
#define MAX30100_REG_MODE_CONFIG_TEMP_EN BIT(3)
#define MAX30100_REG_MODE_CONFIG_PWR BIT(7)
#define MAX30100_REG_SPO2_CONFIG 0x07
#define MAX30100_REG_SPO2_CONFIG_100HZ BIT(2)
#define MAX30100_REG_SPO2_CONFIG_HI_RES_EN BIT(6)
#define MAX30100_REG_SPO2_CONFIG_1600US 0x3
#define MAX30100_REG_LED_CONFIG 0x09
#define MAX30100_REG_LED_CONFIG_LED_MASK 0x0f
#define MAX30100_REG_LED_CONFIG_RED_LED_SHIFT 4
#define MAX30100_REG_LED_CONFIG_24MA 0x07
#define MAX30100_REG_LED_CONFIG_50MA 0x0f
#define MAX30100_REG_TEMP_INTEGER 0x16
#define MAX30100_REG_TEMP_FRACTION 0x17
struct max30100_data {
struct i2c_client *client;
struct iio_dev *indio_dev;
struct mutex lock;
struct regmap *regmap;
__be16 buffer[2]; /* 2 16-bit channels */
};
static bool max30100_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MAX30100_REG_INT_STATUS:
case MAX30100_REG_MODE_CONFIG:
case MAX30100_REG_FIFO_WR_PTR:
case MAX30100_REG_FIFO_OVR_CTR:
case MAX30100_REG_FIFO_RD_PTR:
case MAX30100_REG_FIFO_DATA:
case MAX30100_REG_TEMP_INTEGER:
case MAX30100_REG_TEMP_FRACTION:
return true;
default:
return false;
}
}
static const struct regmap_config max30100_regmap_config = {
.name = MAX30100_REGMAP_NAME,
.reg_bits = 8,
.val_bits = 8,
.max_register = MAX30100_REG_TEMP_FRACTION,
.cache_type = REGCACHE_FLAT,
.volatile_reg = max30100_is_volatile_reg,
};
static const unsigned int max30100_led_current_mapping[] = {
4400, 7600, 11000, 14200, 17400,
20800, 24000, 27100, 30600, 33800,
37000, 40200, 43600, 46800, 50000
};
static const unsigned long max30100_scan_masks[] = {0x3, 0};
static const struct iio_chan_spec max30100_channels[] = {
{
.type = IIO_INTENSITY,
.channel2 = IIO_MOD_LIGHT_IR,
.modified = 1,
.scan_index = 0,
.scan_type = {
.sign = 'u',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
},
{
.type = IIO_INTENSITY,
.channel2 = IIO_MOD_LIGHT_RED,
.modified = 1,
.scan_index = 1,
.scan_type = {
.sign = 'u',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
},
{
.type = IIO_TEMP,
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.scan_index = -1,
},
};
static int max30100_set_powermode(struct max30100_data *data, bool state)
{
return regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
MAX30100_REG_MODE_CONFIG_PWR,
state ? 0 : MAX30100_REG_MODE_CONFIG_PWR);
}
static int max30100_clear_fifo(struct max30100_data *data)
{
int ret;
ret = regmap_write(data->regmap, MAX30100_REG_FIFO_WR_PTR, 0);
if (ret)
return ret;
ret = regmap_write(data->regmap, MAX30100_REG_FIFO_OVR_CTR, 0);
if (ret)
return ret;
return regmap_write(data->regmap, MAX30100_REG_FIFO_RD_PTR, 0);
}
static int max30100_buffer_postenable(struct iio_dev *indio_dev)
{
struct max30100_data *data = iio_priv(indio_dev);
int ret;
ret = max30100_set_powermode(data, true);
if (ret)
return ret;
return max30100_clear_fifo(data);
}
static int max30100_buffer_predisable(struct iio_dev *indio_dev)
{
struct max30100_data *data = iio_priv(indio_dev);
return max30100_set_powermode(data, false);
}
static const struct iio_buffer_setup_ops max30100_buffer_setup_ops = {
.postenable = max30100_buffer_postenable,
.predisable = max30100_buffer_predisable,
};
static inline int max30100_fifo_count(struct max30100_data *data)
{
unsigned int val;
int ret;
ret = regmap_read(data->regmap, MAX30100_REG_INT_STATUS, &val);
if (ret)
return ret;
/* FIFO is almost full */
if (val & MAX30100_REG_INT_STATUS_FIFO_RDY)
return MAX30100_REG_FIFO_DATA_ENTRY_COUNT - 1;
return 0;
}
static int max30100_read_measurement(struct max30100_data *data)
{
int ret;
ret = i2c_smbus_read_i2c_block_data(data->client,
MAX30100_REG_FIFO_DATA,
MAX30100_REG_FIFO_DATA_ENTRY_LEN,
(u8 *) &data->buffer);
return (ret == MAX30100_REG_FIFO_DATA_ENTRY_LEN) ? 0 : ret;
}
static irqreturn_t max30100_interrupt_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct max30100_data *data = iio_priv(indio_dev);
int ret, cnt = 0;
mutex_lock(&data->lock);
while (cnt || (cnt = max30100_fifo_count(data)) > 0) {
ret = max30100_read_measurement(data);
if (ret)
break;
iio_push_to_buffers(data->indio_dev, data->buffer);
cnt--;
}
mutex_unlock(&data->lock);
return IRQ_HANDLED;
}
static int max30100_get_current_idx(unsigned int val, int *reg)
{
int idx;
/* LED turned off */
if (val == 0) {
*reg = 0;
return 0;
}
for (idx = 0; idx < ARRAY_SIZE(max30100_led_current_mapping); idx++) {
if (max30100_led_current_mapping[idx] == val) {
*reg = idx + 1;
return 0;
}
}
return -EINVAL;
}
static int max30100_led_init(struct max30100_data *data)
{
struct device *dev = &data->client->dev;
unsigned int val[2];
int reg, ret;
ret = device_property_read_u32_array(dev, "maxim,led-current-microamp",
(unsigned int *) &val, 2);
if (ret) {
/* Default to 24 mA RED LED, 50 mA IR LED */
reg = (MAX30100_REG_LED_CONFIG_24MA <<
MAX30100_REG_LED_CONFIG_RED_LED_SHIFT) |
MAX30100_REG_LED_CONFIG_50MA;
dev_warn(dev, "no led-current-microamp set");
return regmap_write(data->regmap, MAX30100_REG_LED_CONFIG, reg);
}
/* RED LED current */
ret = max30100_get_current_idx(val[0], ®);
if (ret) {
dev_err(dev, "invalid RED current setting %d", val[0]);
return ret;
}
ret = regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
MAX30100_REG_LED_CONFIG_LED_MASK <<
MAX30100_REG_LED_CONFIG_RED_LED_SHIFT,
reg << MAX30100_REG_LED_CONFIG_RED_LED_SHIFT);
if (ret)
return ret;
/* IR LED current */
ret = max30100_get_current_idx(val[1], ®);
if (ret) {
dev_err(dev, "invalid IR current setting %d", val[1]);
return ret;
}
return regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
MAX30100_REG_LED_CONFIG_LED_MASK, reg);
}
static int max30100_chip_init(struct max30100_data *data)
{
int ret;
/* setup LED current settings */
ret = max30100_led_init(data);
if (ret)
return ret;
/* enable hi-res SPO2 readings at 100Hz */
ret = regmap_write(data->regmap, MAX30100_REG_SPO2_CONFIG,
MAX30100_REG_SPO2_CONFIG_HI_RES_EN |
MAX30100_REG_SPO2_CONFIG_100HZ);
if (ret)
return ret;
/* enable SPO2 mode */
ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
MAX30100_REG_MODE_CONFIG_MODE_MASK,
MAX30100_REG_MODE_CONFIG_MODE_HR_EN |
MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN);
if (ret)
return ret;
/* enable FIFO interrupt */
return regmap_update_bits(data->regmap, MAX30100_REG_INT_ENABLE,
MAX30100_REG_INT_ENABLE_MASK,
MAX30100_REG_INT_ENABLE_FIFO_EN
<< MAX30100_REG_INT_ENABLE_MASK_SHIFT);
}
static int max30100_read_temp(struct max30100_data *data, int *val)
{
int ret;
unsigned int reg;
ret = regmap_read(data->regmap, MAX30100_REG_TEMP_INTEGER, ®);
if (ret < 0)
return ret;
*val = reg << 4;
ret = regmap_read(data->regmap, MAX30100_REG_TEMP_FRACTION, ®);
if (ret < 0)
return ret;
*val |= reg & 0xf;
*val = sign_extend32(*val, 11);
return 0;
}
static int max30100_get_temp(struct max30100_data *data, int *val)
{
int ret;
/* start acquisition */
ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
MAX30100_REG_MODE_CONFIG_TEMP_EN,
MAX30100_REG_MODE_CONFIG_TEMP_EN);
if (ret)
return ret;
msleep(35);
return max30100_read_temp(data, val);
}
static int max30100_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct max30100_data *data = iio_priv(indio_dev);
int ret = -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* Temperature reading can only be acquired while engine
* is running
*/
if (iio_device_claim_buffer_mode(indio_dev)) {
/*
* Replacing -EBUSY or other error code
* returned by iio_device_claim_buffer_mode()
* because user space may rely on the current
* one.
*/
ret = -EAGAIN;
} else {
ret = max30100_get_temp(data, val);
if (!ret)
ret = IIO_VAL_INT;
iio_device_release_buffer_mode(indio_dev);
}
break;
case IIO_CHAN_INFO_SCALE:
*val = 1; /* 0.0625 */
*val2 = 16;
ret = IIO_VAL_FRACTIONAL;
break;
}
return ret;
}
static const struct iio_info max30100_info = {
.read_raw = max30100_read_raw,
};
static int max30100_probe(struct i2c_client *client)
{
struct max30100_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
indio_dev->name = MAX30100_DRV_NAME;
indio_dev->channels = max30100_channels;
indio_dev->info = &max30100_info;
indio_dev->num_channels = ARRAY_SIZE(max30100_channels);
indio_dev->available_scan_masks = max30100_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
&max30100_buffer_setup_ops);
if (ret)
return ret;
data = iio_priv(indio_dev);
data->indio_dev = indio_dev;
data->client = client;
mutex_init(&data->lock);
i2c_set_clientdata(client, indio_dev);
data->regmap = devm_regmap_init_i2c(client, &max30100_regmap_config);
if (IS_ERR(data->regmap)) {
dev_err(&client->dev, "regmap initialization failed.\n");
return PTR_ERR(data->regmap);
}
max30100_set_powermode(data, false);
ret = max30100_chip_init(data);
if (ret)
return ret;
if (client->irq <= 0) {
dev_err(&client->dev, "no valid irq defined\n");
return -EINVAL;
}
ret = devm_request_threaded_irq(&client->dev, client->irq,
NULL, max30100_interrupt_handler,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
"max30100_irq", indio_dev);
if (ret) {
dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
return ret;
}
return iio_device_register(indio_dev);
}
static void max30100_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct max30100_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
max30100_set_powermode(data, false);
}
static const struct i2c_device_id max30100_id[] = {
{ "max30100", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, max30100_id);
static const struct of_device_id max30100_dt_ids[] = {
{ .compatible = "maxim,max30100" },
{ }
};
MODULE_DEVICE_TABLE(of, max30100_dt_ids);
static struct i2c_driver max30100_driver = {
.driver = {
.name = MAX30100_DRV_NAME,
.of_match_table = max30100_dt_ids,
},
.probe = max30100_probe,
.remove = max30100_remove,
.id_table = max30100_id,
};
module_i2c_driver(max30100_driver);
MODULE_AUTHOR("Matt Ranostay <[email protected]>");
MODULE_DESCRIPTION("MAX30100 heart rate and pulse oximeter sensor");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/health/max30100.c |
// SPDX-License-Identifier: GPL-2.0
/*
* IIO rescale driver
*
* Copyright (C) 2018 Axentia Technologies AB
* Copyright (C) 2022 Liam Beguin <[email protected]>
*
* Author: Peter Rosin <[email protected]>
*/
#include <linux/err.h>
#include <linux/gcd.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/iio/afe/rescale.h>
#include <linux/iio/consumer.h>
#include <linux/iio/iio.h>
int rescale_process_scale(struct rescale *rescale, int scale_type,
int *val, int *val2)
{
s64 tmp;
int _val, _val2;
s32 rem, rem2;
u32 mult;
u32 neg;
switch (scale_type) {
case IIO_VAL_INT:
*val *= rescale->numerator;
if (rescale->denominator == 1)
return scale_type;
*val2 = rescale->denominator;
return IIO_VAL_FRACTIONAL;
case IIO_VAL_FRACTIONAL:
/*
* When the product of both scales doesn't overflow, avoid
* potential accuracy loss (for in kernel consumers) by
* keeping a fractional representation.
*/
if (!check_mul_overflow(*val, rescale->numerator, &_val) &&
!check_mul_overflow(*val2, rescale->denominator, &_val2)) {
*val = _val;
*val2 = _val2;
return IIO_VAL_FRACTIONAL;
}
fallthrough;
case IIO_VAL_FRACTIONAL_LOG2:
tmp = (s64)*val * 1000000000LL;
tmp = div_s64(tmp, rescale->denominator);
tmp *= rescale->numerator;
tmp = div_s64_rem(tmp, 1000000000LL, &rem);
*val = tmp;
if (!rem)
return scale_type;
if (scale_type == IIO_VAL_FRACTIONAL)
tmp = *val2;
else
tmp = ULL(1) << *val2;
rem2 = *val % (int)tmp;
*val = *val / (int)tmp;
*val2 = rem / (int)tmp;
if (rem2)
*val2 += div_s64((s64)rem2 * 1000000000LL, tmp);
return IIO_VAL_INT_PLUS_NANO;
case IIO_VAL_INT_PLUS_NANO:
case IIO_VAL_INT_PLUS_MICRO:
mult = scale_type == IIO_VAL_INT_PLUS_NANO ? 1000000000L : 1000000L;
/*
* For IIO_VAL_INT_PLUS_{MICRO,NANO} scale types if either *val
* OR *val2 is negative the schan scale is negative, i.e.
* *val = 1 and *val2 = -0.5 yields -1.5 not -0.5.
*/
neg = *val < 0 || *val2 < 0;
tmp = (s64)abs(*val) * abs(rescale->numerator);
*val = div_s64_rem(tmp, abs(rescale->denominator), &rem);
tmp = (s64)rem * mult + (s64)abs(*val2) * abs(rescale->numerator);
tmp = div_s64(tmp, abs(rescale->denominator));
*val += div_s64_rem(tmp, mult, val2);
/*
* If only one of the rescaler elements or the schan scale is
* negative, the combined scale is negative.
*/
if (neg ^ ((rescale->numerator < 0) ^ (rescale->denominator < 0))) {
if (*val)
*val = -*val;
else
*val2 = -*val2;
}
return scale_type;
default:
return -EOPNOTSUPP;
}
}
EXPORT_SYMBOL_NS_GPL(rescale_process_scale, IIO_RESCALE);
int rescale_process_offset(struct rescale *rescale, int scale_type,
int scale, int scale2, int schan_off,
int *val, int *val2)
{
s64 tmp, tmp2;
switch (scale_type) {
case IIO_VAL_FRACTIONAL:
tmp = (s64)rescale->offset * scale2;
*val = div_s64(tmp, scale) + schan_off;
return IIO_VAL_INT;
case IIO_VAL_INT:
*val = div_s64(rescale->offset, scale) + schan_off;
return IIO_VAL_INT;
case IIO_VAL_FRACTIONAL_LOG2:
tmp = (s64)rescale->offset * (1 << scale2);
*val = div_s64(tmp, scale) + schan_off;
return IIO_VAL_INT;
case IIO_VAL_INT_PLUS_NANO:
tmp = (s64)rescale->offset * 1000000000LL;
tmp2 = ((s64)scale * 1000000000LL) + scale2;
*val = div64_s64(tmp, tmp2) + schan_off;
return IIO_VAL_INT;
case IIO_VAL_INT_PLUS_MICRO:
tmp = (s64)rescale->offset * 1000000LL;
tmp2 = ((s64)scale * 1000000LL) + scale2;
*val = div64_s64(tmp, tmp2) + schan_off;
return IIO_VAL_INT;
default:
return -EOPNOTSUPP;
}
}
EXPORT_SYMBOL_NS_GPL(rescale_process_offset, IIO_RESCALE);
static int rescale_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct rescale *rescale = iio_priv(indio_dev);
int scale, scale2;
int schan_off = 0;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (rescale->chan_processed)
/*
* When only processed channels are supported, we
* read the processed data and scale it by 1/1
* augmented with whatever the rescaler has calculated.
*/
return iio_read_channel_processed(rescale->source, val);
else
return iio_read_channel_raw(rescale->source, val);
case IIO_CHAN_INFO_SCALE:
if (rescale->chan_processed) {
/*
* Processed channels are scaled 1-to-1
*/
*val = 1;
*val2 = 1;
ret = IIO_VAL_FRACTIONAL;
} else {
ret = iio_read_channel_scale(rescale->source, val, val2);
}
return rescale_process_scale(rescale, ret, val, val2);
case IIO_CHAN_INFO_OFFSET:
/*
* Processed channels are scaled 1-to-1 and source offset is
* already taken into account.
*
* In other cases, real world measurement are expressed as:
*
* schan_scale * (raw + schan_offset)
*
* Given that the rescaler parameters are applied recursively:
*
* rescaler_scale * (schan_scale * (raw + schan_offset) +
* rescaler_offset)
*
* Or,
*
* (rescaler_scale * schan_scale) * (raw +
* (schan_offset + rescaler_offset / schan_scale)
*
* Thus, reusing the original expression the parameters exposed
* to userspace are:
*
* scale = schan_scale * rescaler_scale
* offset = schan_offset + rescaler_offset / schan_scale
*/
if (rescale->chan_processed) {
*val = rescale->offset;
return IIO_VAL_INT;
}
if (iio_channel_has_info(rescale->source->channel,
IIO_CHAN_INFO_OFFSET)) {
ret = iio_read_channel_offset(rescale->source,
&schan_off, NULL);
if (ret != IIO_VAL_INT)
return ret < 0 ? ret : -EOPNOTSUPP;
}
ret = iio_read_channel_scale(rescale->source, &scale, &scale2);
return rescale_process_offset(rescale, ret, scale, scale2,
schan_off, val, val2);
default:
return -EINVAL;
}
}
static int rescale_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct rescale *rescale = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
*type = IIO_VAL_INT;
return iio_read_avail_channel_raw(rescale->source,
vals, length);
default:
return -EINVAL;
}
}
static const struct iio_info rescale_info = {
.read_raw = rescale_read_raw,
.read_avail = rescale_read_avail,
};
static ssize_t rescale_read_ext_info(struct iio_dev *indio_dev,
uintptr_t private,
struct iio_chan_spec const *chan,
char *buf)
{
struct rescale *rescale = iio_priv(indio_dev);
return iio_read_channel_ext_info(rescale->source,
rescale->ext_info[private].name,
buf);
}
static ssize_t rescale_write_ext_info(struct iio_dev *indio_dev,
uintptr_t private,
struct iio_chan_spec const *chan,
const char *buf, size_t len)
{
struct rescale *rescale = iio_priv(indio_dev);
return iio_write_channel_ext_info(rescale->source,
rescale->ext_info[private].name,
buf, len);
}
static int rescale_configure_channel(struct device *dev,
struct rescale *rescale)
{
struct iio_chan_spec *chan = &rescale->chan;
struct iio_chan_spec const *schan = rescale->source->channel;
chan->indexed = 1;
chan->output = schan->output;
chan->ext_info = rescale->ext_info;
chan->type = rescale->cfg->type;
if (iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) &&
iio_channel_has_info(schan, IIO_CHAN_INFO_SCALE)) {
dev_info(dev, "using raw+scale source channel\n");
} else if (iio_channel_has_info(schan, IIO_CHAN_INFO_PROCESSED)) {
dev_info(dev, "using processed channel\n");
rescale->chan_processed = true;
} else {
dev_err(dev, "source channel is not supported\n");
return -EINVAL;
}
chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE);
if (rescale->offset)
chan->info_mask_separate |= BIT(IIO_CHAN_INFO_OFFSET);
/*
* Using .read_avail() is fringe to begin with and makes no sense
* whatsoever for processed channels, so we make sure that this cannot
* be called on a processed channel.
*/
if (iio_channel_has_available(schan, IIO_CHAN_INFO_RAW) &&
!rescale->chan_processed)
chan->info_mask_separate_available |= BIT(IIO_CHAN_INFO_RAW);
return 0;
}
static int rescale_current_sense_amplifier_props(struct device *dev,
struct rescale *rescale)
{
u32 sense;
u32 gain_mult = 1;
u32 gain_div = 1;
u32 factor;
int ret;
ret = device_property_read_u32(dev, "sense-resistor-micro-ohms",
&sense);
if (ret) {
dev_err(dev, "failed to read the sense resistance: %d\n", ret);
return ret;
}
device_property_read_u32(dev, "sense-gain-mult", &gain_mult);
device_property_read_u32(dev, "sense-gain-div", &gain_div);
/*
* Calculate the scaling factor, 1 / (gain * sense), or
* gain_div / (gain_mult * sense), while trying to keep the
* numerator/denominator from overflowing.
*/
factor = gcd(sense, 1000000);
rescale->numerator = 1000000 / factor;
rescale->denominator = sense / factor;
factor = gcd(rescale->numerator, gain_mult);
rescale->numerator /= factor;
rescale->denominator *= gain_mult / factor;
factor = gcd(rescale->denominator, gain_div);
rescale->numerator *= gain_div / factor;
rescale->denominator /= factor;
return 0;
}
static int rescale_current_sense_shunt_props(struct device *dev,
struct rescale *rescale)
{
u32 shunt;
u32 factor;
int ret;
ret = device_property_read_u32(dev, "shunt-resistor-micro-ohms",
&shunt);
if (ret) {
dev_err(dev, "failed to read the shunt resistance: %d\n", ret);
return ret;
}
factor = gcd(shunt, 1000000);
rescale->numerator = 1000000 / factor;
rescale->denominator = shunt / factor;
return 0;
}
static int rescale_voltage_divider_props(struct device *dev,
struct rescale *rescale)
{
int ret;
u32 factor;
ret = device_property_read_u32(dev, "output-ohms",
&rescale->denominator);
if (ret) {
dev_err(dev, "failed to read output-ohms: %d\n", ret);
return ret;
}
ret = device_property_read_u32(dev, "full-ohms",
&rescale->numerator);
if (ret) {
dev_err(dev, "failed to read full-ohms: %d\n", ret);
return ret;
}
factor = gcd(rescale->numerator, rescale->denominator);
rescale->numerator /= factor;
rescale->denominator /= factor;
return 0;
}
static int rescale_temp_sense_rtd_props(struct device *dev,
struct rescale *rescale)
{
u32 factor;
u32 alpha;
u32 iexc;
u32 tmp;
int ret;
u32 r0;
ret = device_property_read_u32(dev, "excitation-current-microamp",
&iexc);
if (ret) {
dev_err(dev, "failed to read excitation-current-microamp: %d\n",
ret);
return ret;
}
ret = device_property_read_u32(dev, "alpha-ppm-per-celsius", &alpha);
if (ret) {
dev_err(dev, "failed to read alpha-ppm-per-celsius: %d\n",
ret);
return ret;
}
ret = device_property_read_u32(dev, "r-naught-ohms", &r0);
if (ret) {
dev_err(dev, "failed to read r-naught-ohms: %d\n", ret);
return ret;
}
tmp = r0 * iexc * alpha / 1000000;
factor = gcd(tmp, 1000000);
rescale->numerator = 1000000 / factor;
rescale->denominator = tmp / factor;
rescale->offset = -1 * ((r0 * iexc) / 1000);
return 0;
}
static int rescale_temp_transducer_props(struct device *dev,
struct rescale *rescale)
{
s32 offset = 0;
s32 sense = 1;
s32 alpha;
int ret;
device_property_read_u32(dev, "sense-offset-millicelsius", &offset);
device_property_read_u32(dev, "sense-resistor-ohms", &sense);
ret = device_property_read_u32(dev, "alpha-ppm-per-celsius", &alpha);
if (ret) {
dev_err(dev, "failed to read alpha-ppm-per-celsius: %d\n", ret);
return ret;
}
rescale->numerator = 1000000;
rescale->denominator = alpha * sense;
rescale->offset = div_s64((s64)offset * rescale->denominator,
rescale->numerator);
return 0;
}
enum rescale_variant {
CURRENT_SENSE_AMPLIFIER,
CURRENT_SENSE_SHUNT,
VOLTAGE_DIVIDER,
TEMP_SENSE_RTD,
TEMP_TRANSDUCER,
};
static const struct rescale_cfg rescale_cfg[] = {
[CURRENT_SENSE_AMPLIFIER] = {
.type = IIO_CURRENT,
.props = rescale_current_sense_amplifier_props,
},
[CURRENT_SENSE_SHUNT] = {
.type = IIO_CURRENT,
.props = rescale_current_sense_shunt_props,
},
[VOLTAGE_DIVIDER] = {
.type = IIO_VOLTAGE,
.props = rescale_voltage_divider_props,
},
[TEMP_SENSE_RTD] = {
.type = IIO_TEMP,
.props = rescale_temp_sense_rtd_props,
},
[TEMP_TRANSDUCER] = {
.type = IIO_TEMP,
.props = rescale_temp_transducer_props,
},
};
static const struct of_device_id rescale_match[] = {
{ .compatible = "current-sense-amplifier",
.data = &rescale_cfg[CURRENT_SENSE_AMPLIFIER], },
{ .compatible = "current-sense-shunt",
.data = &rescale_cfg[CURRENT_SENSE_SHUNT], },
{ .compatible = "voltage-divider",
.data = &rescale_cfg[VOLTAGE_DIVIDER], },
{ .compatible = "temperature-sense-rtd",
.data = &rescale_cfg[TEMP_SENSE_RTD], },
{ .compatible = "temperature-transducer",
.data = &rescale_cfg[TEMP_TRANSDUCER], },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, rescale_match);
static int rescale_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct iio_dev *indio_dev;
struct iio_channel *source;
struct rescale *rescale;
int sizeof_ext_info;
int sizeof_priv;
int i;
int ret;
source = devm_iio_channel_get(dev, NULL);
if (IS_ERR(source))
return dev_err_probe(dev, PTR_ERR(source),
"failed to get source channel\n");
sizeof_ext_info = iio_get_channel_ext_info_count(source);
if (sizeof_ext_info) {
sizeof_ext_info += 1; /* one extra entry for the sentinel */
sizeof_ext_info *= sizeof(*rescale->ext_info);
}
sizeof_priv = sizeof(*rescale) + sizeof_ext_info;
indio_dev = devm_iio_device_alloc(dev, sizeof_priv);
if (!indio_dev)
return -ENOMEM;
rescale = iio_priv(indio_dev);
rescale->cfg = device_get_match_data(dev);
rescale->numerator = 1;
rescale->denominator = 1;
rescale->offset = 0;
ret = rescale->cfg->props(dev, rescale);
if (ret)
return ret;
if (!rescale->numerator || !rescale->denominator) {
dev_err(dev, "invalid scaling factor.\n");
return -EINVAL;
}
platform_set_drvdata(pdev, indio_dev);
rescale->source = source;
indio_dev->name = dev_name(dev);
indio_dev->info = &rescale_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = &rescale->chan;
indio_dev->num_channels = 1;
if (sizeof_ext_info) {
rescale->ext_info = devm_kmemdup(dev,
source->channel->ext_info,
sizeof_ext_info, GFP_KERNEL);
if (!rescale->ext_info)
return -ENOMEM;
for (i = 0; rescale->ext_info[i].name; ++i) {
struct iio_chan_spec_ext_info *ext_info =
&rescale->ext_info[i];
if (source->channel->ext_info[i].read)
ext_info->read = rescale_read_ext_info;
if (source->channel->ext_info[i].write)
ext_info->write = rescale_write_ext_info;
ext_info->private = i;
}
}
ret = rescale_configure_channel(dev, rescale);
if (ret)
return ret;
return devm_iio_device_register(dev, indio_dev);
}
static struct platform_driver rescale_driver = {
.probe = rescale_probe,
.driver = {
.name = "iio-rescale",
.of_match_table = rescale_match,
},
};
module_platform_driver(rescale_driver);
MODULE_DESCRIPTION("IIO rescale driver");
MODULE_AUTHOR("Peter Rosin <[email protected]>");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/afe/iio-rescale.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXRS450/ADXRS453 Digital Output Gyroscope Driver
*
* Copyright 2011 Analog Devices Inc.
*/
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define ADXRS450_STARTUP_DELAY 50 /* ms */
/* The MSB for the spi commands */
#define ADXRS450_SENSOR_DATA (0x20 << 24)
#define ADXRS450_WRITE_DATA (0x40 << 24)
#define ADXRS450_READ_DATA (0x80 << 24)
#define ADXRS450_RATE1 0x00 /* Rate Registers */
#define ADXRS450_TEMP1 0x02 /* Temperature Registers */
#define ADXRS450_LOCST1 0x04 /* Low CST Memory Registers */
#define ADXRS450_HICST1 0x06 /* High CST Memory Registers */
#define ADXRS450_QUAD1 0x08 /* Quad Memory Registers */
#define ADXRS450_FAULT1 0x0A /* Fault Registers */
#define ADXRS450_PID1 0x0C /* Part ID Register 1 */
#define ADXRS450_SNH 0x0E /* Serial Number Registers, 4 bytes */
#define ADXRS450_SNL 0x10
#define ADXRS450_DNC1 0x12 /* Dynamic Null Correction Registers */
/* Check bits */
#define ADXRS450_P 0x01
#define ADXRS450_CHK 0x02
#define ADXRS450_CST 0x04
#define ADXRS450_PWR 0x08
#define ADXRS450_POR 0x10
#define ADXRS450_NVM 0x20
#define ADXRS450_Q 0x40
#define ADXRS450_PLL 0x80
#define ADXRS450_UV 0x100
#define ADXRS450_OV 0x200
#define ADXRS450_AMP 0x400
#define ADXRS450_FAIL 0x800
#define ADXRS450_WRERR_MASK (0x7 << 29)
#define ADXRS450_MAX_RX 4
#define ADXRS450_MAX_TX 4
#define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
enum {
ID_ADXRS450,
ID_ADXRS453,
};
/**
* struct adxrs450_state - device instance specific data
* @us: actual spi_device
* @buf_lock: mutex to protect tx and rx
* @tx: transmit buffer
* @rx: receive buffer
**/
struct adxrs450_state {
struct spi_device *us;
struct mutex buf_lock;
__be32 tx __aligned(IIO_DMA_MINALIGN);
__be32 rx;
};
/**
* adxrs450_spi_read_reg_16() - read 2 bytes from a register pair
* @indio_dev: device associated with child of actual iio_dev
* @reg_address: the address of the lower of the two registers, which should be
* an even address, the second register's address is reg_address + 1.
* @val: somewhere to pass back the value read
**/
static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
u8 reg_address,
u16 *val)
{
struct adxrs450_state *st = iio_priv(indio_dev);
u32 tx;
int ret;
struct spi_transfer xfers[] = {
{
.tx_buf = &st->tx,
.bits_per_word = 8,
.len = sizeof(st->tx),
.cs_change = 1,
}, {
.rx_buf = &st->rx,
.bits_per_word = 8,
.len = sizeof(st->rx),
},
};
mutex_lock(&st->buf_lock);
tx = ADXRS450_READ_DATA | (reg_address << 17);
if (!(hweight32(tx) & 1))
tx |= ADXRS450_P;
st->tx = cpu_to_be32(tx);
ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
if (ret) {
dev_err(&st->us->dev, "problem while reading 16 bit register 0x%02x\n",
reg_address);
goto error_ret;
}
*val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
error_ret:
mutex_unlock(&st->buf_lock);
return ret;
}
/**
* adxrs450_spi_write_reg_16() - write 2 bytes data to a register pair
* @indio_dev: device associated with child of actual actual iio_dev
* @reg_address: the address of the lower of the two registers,which should be
* an even address, the second register's address is reg_address + 1.
* @val: value to be written.
**/
static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
u8 reg_address,
u16 val)
{
struct adxrs450_state *st = iio_priv(indio_dev);
u32 tx;
int ret;
mutex_lock(&st->buf_lock);
tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
if (!(hweight32(tx) & 1))
tx |= ADXRS450_P;
st->tx = cpu_to_be32(tx);
ret = spi_write(st->us, &st->tx, sizeof(st->tx));
if (ret)
dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
reg_address);
usleep_range(100, 1000); /* enforce sequential transfer delay 0.1ms */
mutex_unlock(&st->buf_lock);
return ret;
}
/**
* adxrs450_spi_sensor_data() - read 2 bytes sensor data
* @indio_dev: device associated with child of actual iio_dev
* @val: somewhere to pass back the value read
**/
static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
{
struct adxrs450_state *st = iio_priv(indio_dev);
int ret;
struct spi_transfer xfers[] = {
{
.tx_buf = &st->tx,
.bits_per_word = 8,
.len = sizeof(st->tx),
.cs_change = 1,
}, {
.rx_buf = &st->rx,
.bits_per_word = 8,
.len = sizeof(st->rx),
},
};
mutex_lock(&st->buf_lock);
st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
if (ret) {
dev_err(&st->us->dev, "Problem while reading sensor data\n");
goto error_ret;
}
*val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
error_ret:
mutex_unlock(&st->buf_lock);
return ret;
}
/**
* adxrs450_spi_initial() - use for initializing procedure.
* @st: device instance specific data
* @val: somewhere to pass back the value read
* @chk: Whether to perform fault check
**/
static int adxrs450_spi_initial(struct adxrs450_state *st,
u32 *val, char chk)
{
int ret;
u32 tx;
struct spi_transfer xfers = {
.tx_buf = &st->tx,
.rx_buf = &st->rx,
.bits_per_word = 8,
.len = sizeof(st->tx),
};
mutex_lock(&st->buf_lock);
tx = ADXRS450_SENSOR_DATA;
if (chk)
tx |= (ADXRS450_CHK | ADXRS450_P);
st->tx = cpu_to_be32(tx);
ret = spi_sync_transfer(st->us, &xfers, 1);
if (ret) {
dev_err(&st->us->dev, "Problem while reading initializing data\n");
goto error_ret;
}
*val = be32_to_cpu(st->rx);
error_ret:
mutex_unlock(&st->buf_lock);
return ret;
}
/* Recommended Startup Sequence by spec */
static int adxrs450_initial_setup(struct iio_dev *indio_dev)
{
u32 t;
u16 data;
int ret;
struct adxrs450_state *st = iio_priv(indio_dev);
msleep(ADXRS450_STARTUP_DELAY*2);
ret = adxrs450_spi_initial(st, &t, 1);
if (ret)
return ret;
if (t != 0x01)
dev_warn(&st->us->dev, "The initial power on response is not correct! Restart without reset?\n");
msleep(ADXRS450_STARTUP_DELAY);
ret = adxrs450_spi_initial(st, &t, 0);
if (ret)
return ret;
msleep(ADXRS450_STARTUP_DELAY);
ret = adxrs450_spi_initial(st, &t, 0);
if (ret)
return ret;
if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
dev_err(&st->us->dev, "The second response is not correct!\n");
return -EIO;
}
ret = adxrs450_spi_initial(st, &t, 0);
if (ret)
return ret;
if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
dev_err(&st->us->dev, "The third response is not correct!\n");
return -EIO;
}
ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_FAULT1, &data);
if (ret)
return ret;
if (data & 0x0fff) {
dev_err(&st->us->dev, "The device is not in normal status!\n");
return -EINVAL;
}
return 0;
}
static int adxrs450_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
int ret;
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
if (val < -0x400 || val >= 0x400)
return -EINVAL;
ret = adxrs450_spi_write_reg_16(indio_dev,
ADXRS450_DNC1, val);
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static int adxrs450_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long mask)
{
int ret;
s16 t;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_ANGL_VEL:
ret = adxrs450_spi_sensor_data(indio_dev, &t);
if (ret)
break;
*val = t;
ret = IIO_VAL_INT;
break;
case IIO_TEMP:
ret = adxrs450_spi_read_reg_16(indio_dev,
ADXRS450_TEMP1, &t);
if (ret)
break;
*val = (t >> 6) + 225;
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
break;
}
break;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = 0;
*val2 = 218166;
return IIO_VAL_INT_PLUS_NANO;
case IIO_TEMP:
*val = 200;
*val2 = 0;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
if (ret)
break;
*val = t;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_CALIBBIAS:
ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
if (ret)
break;
*val = sign_extend32(t, 9);
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static const struct iio_chan_spec adxrs450_channels[2][2] = {
[ID_ADXRS450] = {
{
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_CALIBBIAS) |
BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
}, {
.type = IIO_TEMP,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
}
},
[ID_ADXRS453] = {
{
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW),
}, {
.type = IIO_TEMP,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
}
},
};
static const struct iio_info adxrs450_info = {
.read_raw = &adxrs450_read_raw,
.write_raw = &adxrs450_write_raw,
};
static int adxrs450_probe(struct spi_device *spi)
{
int ret;
struct adxrs450_state *st;
struct iio_dev *indio_dev;
/* setup the industrialio driver allocated elements */
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->us = spi;
mutex_init(&st->buf_lock);
/* This is only used for removal purposes */
spi_set_drvdata(spi, indio_dev);
indio_dev->info = &adxrs450_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels =
adxrs450_channels[spi_get_device_id(spi)->driver_data];
indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
indio_dev->name = spi->dev.driver->name;
ret = devm_iio_device_register(&spi->dev, indio_dev);
if (ret)
return ret;
/* Get the device into a sane initial state */
ret = adxrs450_initial_setup(indio_dev);
if (ret)
return ret;
return 0;
}
static const struct spi_device_id adxrs450_id[] = {
{"adxrs450", ID_ADXRS450},
{"adxrs453", ID_ADXRS453},
{}
};
MODULE_DEVICE_TABLE(spi, adxrs450_id);
static struct spi_driver adxrs450_driver = {
.driver = {
.name = "adxrs450",
},
.probe = adxrs450_probe,
.id_table = adxrs450_id,
};
module_spi_driver(adxrs450_driver);
MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/gyro/adxrs450.c |
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/spi/spi.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/module.h>
#include "bmg160.h"
static const struct regmap_config bmg160_regmap_spi_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x3f,
};
static int bmg160_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init_spi(spi, &bmg160_regmap_spi_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
return bmg160_core_probe(&spi->dev, regmap, spi->irq, id->name);
}
static void bmg160_spi_remove(struct spi_device *spi)
{
bmg160_core_remove(&spi->dev);
}
static const struct spi_device_id bmg160_spi_id[] = {
{"bmg160", 0},
{"bmi055_gyro", 0},
{"bmi088_gyro", 0},
{}
};
MODULE_DEVICE_TABLE(spi, bmg160_spi_id);
static struct spi_driver bmg160_spi_driver = {
.driver = {
.name = "bmg160_spi",
.pm = &bmg160_pm_ops,
},
.probe = bmg160_spi_probe,
.remove = bmg160_spi_remove,
.id_table = bmg160_spi_id,
};
module_spi_driver(bmg160_spi_driver);
MODULE_AUTHOR("Markus Pargmann <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMG160 SPI Gyro driver");
| linux-master | drivers/iio/gyro/bmg160_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* BMG160 Gyro Sensor driver
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/events.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include "bmg160.h"
#define BMG160_IRQ_NAME "bmg160_event"
#define BMG160_REG_CHIP_ID 0x00
#define BMG160_CHIP_ID_VAL 0x0F
#define BMG160_REG_PMU_LPW 0x11
#define BMG160_MODE_NORMAL 0x00
#define BMG160_MODE_DEEP_SUSPEND 0x20
#define BMG160_MODE_SUSPEND 0x80
#define BMG160_REG_RANGE 0x0F
#define BMG160_RANGE_2000DPS 0
#define BMG160_RANGE_1000DPS 1
#define BMG160_RANGE_500DPS 2
#define BMG160_RANGE_250DPS 3
#define BMG160_RANGE_125DPS 4
#define BMG160_REG_PMU_BW 0x10
#define BMG160_NO_FILTER 0
#define BMG160_DEF_BW 100
#define BMG160_REG_PMU_BW_RES BIT(7)
#define BMG160_GYRO_REG_RESET 0x14
#define BMG160_GYRO_RESET_VAL 0xb6
#define BMG160_REG_INT_MAP_0 0x17
#define BMG160_INT_MAP_0_BIT_ANY BIT(1)
#define BMG160_REG_INT_MAP_1 0x18
#define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
#define BMG160_REG_INT_RST_LATCH 0x21
#define BMG160_INT_MODE_LATCH_RESET 0x80
#define BMG160_INT_MODE_LATCH_INT 0x0F
#define BMG160_INT_MODE_NON_LATCH_INT 0x00
#define BMG160_REG_INT_EN_0 0x15
#define BMG160_DATA_ENABLE_INT BIT(7)
#define BMG160_REG_INT_EN_1 0x16
#define BMG160_INT1_BIT_OD BIT(1)
#define BMG160_REG_XOUT_L 0x02
#define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
#define BMG160_REG_SLOPE_THRES 0x1B
#define BMG160_SLOPE_THRES_MASK 0x0F
#define BMG160_REG_MOTION_INTR 0x1C
#define BMG160_INT_MOTION_X BIT(0)
#define BMG160_INT_MOTION_Y BIT(1)
#define BMG160_INT_MOTION_Z BIT(2)
#define BMG160_ANY_DUR_MASK 0x30
#define BMG160_ANY_DUR_SHIFT 4
#define BMG160_REG_INT_STATUS_2 0x0B
#define BMG160_ANY_MOTION_MASK 0x07
#define BMG160_ANY_MOTION_BIT_X BIT(0)
#define BMG160_ANY_MOTION_BIT_Y BIT(1)
#define BMG160_ANY_MOTION_BIT_Z BIT(2)
#define BMG160_REG_TEMP 0x08
#define BMG160_TEMP_CENTER_VAL 23
#define BMG160_MAX_STARTUP_TIME_MS 80
#define BMG160_AUTO_SUSPEND_DELAY_MS 2000
struct bmg160_data {
struct regmap *regmap;
struct iio_trigger *dready_trig;
struct iio_trigger *motion_trig;
struct iio_mount_matrix orientation;
struct mutex mutex;
/* Ensure naturally aligned timestamp */
struct {
s16 chans[3];
s64 timestamp __aligned(8);
} scan;
u32 dps_range;
int ev_enable_state;
int slope_thres;
bool dready_trigger_on;
bool motion_trigger_on;
int irq;
};
enum bmg160_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
AXIS_MAX,
};
static const struct {
int odr;
int filter;
int bw_bits;
} bmg160_samp_freq_table[] = { {100, 32, 0x07},
{200, 64, 0x06},
{100, 12, 0x05},
{200, 23, 0x04},
{400, 47, 0x03},
{1000, 116, 0x02},
{2000, 230, 0x01} };
static const struct {
int scale;
int dps_range;
} bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
{ 532, BMG160_RANGE_1000DPS},
{ 266, BMG160_RANGE_500DPS},
{ 133, BMG160_RANGE_250DPS},
{ 66, BMG160_RANGE_125DPS} };
static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
ret = regmap_write(data->regmap, BMG160_REG_PMU_LPW, mode);
if (ret < 0) {
dev_err(dev, "Error writing reg_pmu_lpw\n");
return ret;
}
return 0;
}
static int bmg160_convert_freq_to_bit(int val)
{
int i;
for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
if (bmg160_samp_freq_table[i].odr == val)
return bmg160_samp_freq_table[i].bw_bits;
}
return -EINVAL;
}
static int bmg160_set_bw(struct bmg160_data *data, int val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
int bw_bits;
bw_bits = bmg160_convert_freq_to_bit(val);
if (bw_bits < 0)
return bw_bits;
ret = regmap_write(data->regmap, BMG160_REG_PMU_BW, bw_bits);
if (ret < 0) {
dev_err(dev, "Error writing reg_pmu_bw\n");
return ret;
}
return 0;
}
static int bmg160_get_filter(struct bmg160_data *data, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
int i;
unsigned int bw_bits;
ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
if (ret < 0) {
dev_err(dev, "Error reading reg_pmu_bw\n");
return ret;
}
/* Ignore the readonly reserved bit. */
bw_bits &= ~BMG160_REG_PMU_BW_RES;
for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
if (bmg160_samp_freq_table[i].bw_bits == bw_bits)
break;
}
*val = bmg160_samp_freq_table[i].filter;
return ret ? ret : IIO_VAL_INT;
}
static int bmg160_set_filter(struct bmg160_data *data, int val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
int i;
for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
if (bmg160_samp_freq_table[i].filter == val)
break;
}
ret = regmap_write(data->regmap, BMG160_REG_PMU_BW,
bmg160_samp_freq_table[i].bw_bits);
if (ret < 0) {
dev_err(dev, "Error writing reg_pmu_bw\n");
return ret;
}
return 0;
}
static int bmg160_chip_init(struct bmg160_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
unsigned int val;
/*
* Reset chip to get it in a known good state. A delay of 30ms after
* reset is required according to the datasheet.
*/
regmap_write(data->regmap, BMG160_GYRO_REG_RESET,
BMG160_GYRO_RESET_VAL);
usleep_range(30000, 30700);
ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val);
if (ret < 0) {
dev_err(dev, "Error reading reg_chip_id\n");
return ret;
}
dev_dbg(dev, "Chip Id %x\n", val);
if (val != BMG160_CHIP_ID_VAL) {
dev_err(dev, "invalid chip %x\n", val);
return -ENODEV;
}
ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
if (ret < 0)
return ret;
/* Wait upto 500 ms to be ready after changing mode */
usleep_range(500, 1000);
/* Set Bandwidth */
ret = bmg160_set_bw(data, BMG160_DEF_BW);
if (ret < 0)
return ret;
/* Set Default Range */
ret = regmap_write(data->regmap, BMG160_REG_RANGE, BMG160_RANGE_500DPS);
if (ret < 0) {
dev_err(dev, "Error writing reg_range\n");
return ret;
}
data->dps_range = BMG160_RANGE_500DPS;
ret = regmap_read(data->regmap, BMG160_REG_SLOPE_THRES, &val);
if (ret < 0) {
dev_err(dev, "Error reading reg_slope_thres\n");
return ret;
}
data->slope_thres = val;
/* Set default interrupt mode */
ret = regmap_update_bits(data->regmap, BMG160_REG_INT_EN_1,
BMG160_INT1_BIT_OD, 0);
if (ret < 0) {
dev_err(dev, "Error updating bits in reg_int_en_1\n");
return ret;
}
ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
BMG160_INT_MODE_LATCH_INT |
BMG160_INT_MODE_LATCH_RESET);
if (ret < 0) {
dev_err(dev,
"Error writing reg_motion_intr\n");
return ret;
}
return 0;
}
static int bmg160_set_power_state(struct bmg160_data *data, bool on)
{
#ifdef CONFIG_PM
struct device *dev = regmap_get_device(data->regmap);
int ret;
if (on)
ret = pm_runtime_get_sync(dev);
else {
pm_runtime_mark_last_busy(dev);
ret = pm_runtime_put_autosuspend(dev);
}
if (ret < 0) {
dev_err(dev, "Failed: bmg160_set_power_state for %d\n", on);
if (on)
pm_runtime_put_noidle(dev);
return ret;
}
#endif
return 0;
}
static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
bool status)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
/* Enable/Disable INT_MAP0 mapping */
ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_0,
BMG160_INT_MAP_0_BIT_ANY,
(status ? BMG160_INT_MAP_0_BIT_ANY : 0));
if (ret < 0) {
dev_err(dev, "Error updating bits reg_int_map0\n");
return ret;
}
/* Enable/Disable slope interrupts */
if (status) {
/* Update slope thres */
ret = regmap_write(data->regmap, BMG160_REG_SLOPE_THRES,
data->slope_thres);
if (ret < 0) {
dev_err(dev, "Error writing reg_slope_thres\n");
return ret;
}
ret = regmap_write(data->regmap, BMG160_REG_MOTION_INTR,
BMG160_INT_MOTION_X | BMG160_INT_MOTION_Y |
BMG160_INT_MOTION_Z);
if (ret < 0) {
dev_err(dev, "Error writing reg_motion_intr\n");
return ret;
}
/*
* New data interrupt is always non-latched,
* which will have higher priority, so no need
* to set latched mode, we will be flooded anyway with INTR
*/
if (!data->dready_trigger_on) {
ret = regmap_write(data->regmap,
BMG160_REG_INT_RST_LATCH,
BMG160_INT_MODE_LATCH_INT |
BMG160_INT_MODE_LATCH_RESET);
if (ret < 0) {
dev_err(dev, "Error writing reg_rst_latch\n");
return ret;
}
}
ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
BMG160_DATA_ENABLE_INT);
} else {
ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
}
if (ret < 0) {
dev_err(dev, "Error writing reg_int_en0\n");
return ret;
}
return 0;
}
static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
bool status)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
/* Enable/Disable INT_MAP1 mapping */
ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_1,
BMG160_INT_MAP_1_BIT_NEW_DATA,
(status ? BMG160_INT_MAP_1_BIT_NEW_DATA : 0));
if (ret < 0) {
dev_err(dev, "Error updating bits in reg_int_map1\n");
return ret;
}
if (status) {
ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
BMG160_INT_MODE_NON_LATCH_INT |
BMG160_INT_MODE_LATCH_RESET);
if (ret < 0) {
dev_err(dev, "Error writing reg_rst_latch\n");
return ret;
}
ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
BMG160_DATA_ENABLE_INT);
} else {
/* Restore interrupt mode */
ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
BMG160_INT_MODE_LATCH_INT |
BMG160_INT_MODE_LATCH_RESET);
if (ret < 0) {
dev_err(dev, "Error writing reg_rst_latch\n");
return ret;
}
ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
}
if (ret < 0) {
dev_err(dev, "Error writing reg_int_en0\n");
return ret;
}
return 0;
}
static int bmg160_get_bw(struct bmg160_data *data, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
int i;
unsigned int bw_bits;
int ret;
ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
if (ret < 0) {
dev_err(dev, "Error reading reg_pmu_bw\n");
return ret;
}
/* Ignore the readonly reserved bit. */
bw_bits &= ~BMG160_REG_PMU_BW_RES;
for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
if (bmg160_samp_freq_table[i].bw_bits == bw_bits) {
*val = bmg160_samp_freq_table[i].odr;
return IIO_VAL_INT;
}
}
return -EINVAL;
}
static int bmg160_set_scale(struct bmg160_data *data, int val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret, i;
for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
if (bmg160_scale_table[i].scale == val) {
ret = regmap_write(data->regmap, BMG160_REG_RANGE,
bmg160_scale_table[i].dps_range);
if (ret < 0) {
dev_err(dev, "Error writing reg_range\n");
return ret;
}
data->dps_range = bmg160_scale_table[i].dps_range;
return 0;
}
}
return -EINVAL;
}
static int bmg160_get_temp(struct bmg160_data *data, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
unsigned int raw_val;
mutex_lock(&data->mutex);
ret = bmg160_set_power_state(data, true);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = regmap_read(data->regmap, BMG160_REG_TEMP, &raw_val);
if (ret < 0) {
dev_err(dev, "Error reading reg_temp\n");
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
*val = sign_extend32(raw_val, 7);
ret = bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
return IIO_VAL_INT;
}
static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
int ret;
__le16 raw_val;
mutex_lock(&data->mutex);
ret = bmg160_set_power_state(data, true);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(axis), &raw_val,
sizeof(raw_val));
if (ret < 0) {
dev_err(dev, "Error reading axis %d\n", axis);
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
*val = sign_extend32(le16_to_cpu(raw_val), 15);
ret = bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
return IIO_VAL_INT;
}
static int bmg160_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct bmg160_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
return bmg160_get_temp(data, val);
case IIO_ANGL_VEL:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
else
return bmg160_get_axis(data, chan->scan_index,
val);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
if (chan->type == IIO_TEMP) {
*val = BMG160_TEMP_CENTER_VAL;
return IIO_VAL_INT;
} else
return -EINVAL;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return bmg160_get_filter(data, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
*val = 500;
return IIO_VAL_INT;
case IIO_ANGL_VEL:
{
int i;
for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
if (bmg160_scale_table[i].dps_range ==
data->dps_range) {
*val = 0;
*val2 = bmg160_scale_table[i].scale;
return IIO_VAL_INT_PLUS_MICRO;
}
}
return -EINVAL;
}
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
*val2 = 0;
mutex_lock(&data->mutex);
ret = bmg160_get_bw(data, val);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int bmg160_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bmg160_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&data->mutex);
/*
* Section 4.2 of spec
* In suspend mode, the only supported operations are reading
* registers as well as writing to the (0x14) softreset
* register. Since we will be in suspend mode by default, change
* mode to power on for other writes.
*/
ret = bmg160_set_power_state(data, true);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = bmg160_set_bw(data, val);
if (ret < 0) {
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
ret = bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
if (val2)
return -EINVAL;
mutex_lock(&data->mutex);
ret = bmg160_set_power_state(data, true);
if (ret < 0) {
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
ret = bmg160_set_filter(data, val);
if (ret < 0) {
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
ret = bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
case IIO_CHAN_INFO_SCALE:
if (val)
return -EINVAL;
mutex_lock(&data->mutex);
/* Refer to comments above for the suspend mode ops */
ret = bmg160_set_power_state(data, true);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = bmg160_set_scale(data, val2);
if (ret < 0) {
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
ret = bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
return -EINVAL;
}
static int bmg160_read_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct bmg160_data *data = iio_priv(indio_dev);
*val2 = 0;
switch (info) {
case IIO_EV_INFO_VALUE:
*val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
break;
default:
return -EINVAL;
}
return IIO_VAL_INT;
}
static int bmg160_write_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct bmg160_data *data = iio_priv(indio_dev);
switch (info) {
case IIO_EV_INFO_VALUE:
if (data->ev_enable_state)
return -EBUSY;
data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
break;
default:
return -EINVAL;
}
return 0;
}
static int bmg160_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct bmg160_data *data = iio_priv(indio_dev);
return data->ev_enable_state;
}
static int bmg160_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct bmg160_data *data = iio_priv(indio_dev);
int ret;
if (state && data->ev_enable_state)
return 0;
mutex_lock(&data->mutex);
if (!state && data->motion_trigger_on) {
data->ev_enable_state = 0;
mutex_unlock(&data->mutex);
return 0;
}
/*
* We will expect the enable and disable to do operation
* in reverse order. This will happen here anyway as our
* resume operation uses sync mode runtime pm calls, the
* suspend operation will be delayed by autosuspend delay
* So the disable operation will still happen in reverse of
* enable operation. When runtime pm is disabled the mode
* is always on so sequence doesn't matter
*/
ret = bmg160_set_power_state(data, state);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
ret = bmg160_setup_any_motion_interrupt(data, state);
if (ret < 0) {
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
data->ev_enable_state = state;
mutex_unlock(&data->mutex);
return 0;
}
static const struct iio_mount_matrix *
bmg160_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct bmg160_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info bmg160_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmg160_get_mount_matrix),
{ }
};
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
static IIO_CONST_ATTR(in_anglvel_scale_available,
"0.001065 0.000532 0.000266 0.000133 0.000066");
static struct attribute *bmg160_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group bmg160_attrs_group = {
.attrs = bmg160_attributes,
};
static const struct iio_event_spec bmg160_event = {
.type = IIO_EV_TYPE_ROC,
.dir = IIO_EV_DIR_EITHER,
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_ENABLE)
};
#define BMG160_CHANNEL(_axis) { \
.type = IIO_ANGL_VEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
.ext_info = bmg160_ext_info, \
.event_spec = &bmg160_event, \
.num_event_specs = 1 \
}
static const struct iio_chan_spec bmg160_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = -1,
},
BMG160_CHANNEL(X),
BMG160_CHANNEL(Y),
BMG160_CHANNEL(Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct iio_info bmg160_info = {
.attrs = &bmg160_attrs_group,
.read_raw = bmg160_read_raw,
.write_raw = bmg160_write_raw,
.read_event_value = bmg160_read_event,
.write_event_value = bmg160_write_event,
.write_event_config = bmg160_write_event_config,
.read_event_config = bmg160_read_event_config,
};
static const unsigned long bmg160_accel_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0};
static irqreturn_t bmg160_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct bmg160_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = regmap_bulk_read(data->regmap, BMG160_REG_XOUT_L,
data->scan.chans, AXIS_MAX * 2);
mutex_unlock(&data->mutex);
if (ret < 0)
goto err;
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
pf->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static void bmg160_trig_reen(struct iio_trigger *trig)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct bmg160_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
/* new data interrupts don't need ack */
if (data->dready_trigger_on)
return;
/* Set latched mode interrupt and clear any latched interrupt */
ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
BMG160_INT_MODE_LATCH_INT |
BMG160_INT_MODE_LATCH_RESET);
if (ret < 0)
dev_err(dev, "Error writing reg_rst_latch\n");
}
static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct bmg160_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
if (!state && data->ev_enable_state && data->motion_trigger_on) {
data->motion_trigger_on = false;
mutex_unlock(&data->mutex);
return 0;
}
/*
* Refer to comment in bmg160_write_event_config for
* enable/disable operation order
*/
ret = bmg160_set_power_state(data, state);
if (ret < 0) {
mutex_unlock(&data->mutex);
return ret;
}
if (data->motion_trig == trig)
ret = bmg160_setup_any_motion_interrupt(data, state);
else
ret = bmg160_setup_new_data_interrupt(data, state);
if (ret < 0) {
bmg160_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
if (data->motion_trig == trig)
data->motion_trigger_on = state;
else
data->dready_trigger_on = state;
mutex_unlock(&data->mutex);
return 0;
}
static const struct iio_trigger_ops bmg160_trigger_ops = {
.set_trigger_state = bmg160_data_rdy_trigger_set_state,
.reenable = bmg160_trig_reen,
};
static irqreturn_t bmg160_event_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct bmg160_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
int dir;
unsigned int val;
ret = regmap_read(data->regmap, BMG160_REG_INT_STATUS_2, &val);
if (ret < 0) {
dev_err(dev, "Error reading reg_int_status2\n");
goto ack_intr_status;
}
if (val & 0x08)
dir = IIO_EV_DIR_RISING;
else
dir = IIO_EV_DIR_FALLING;
if (val & BMG160_ANY_MOTION_BIT_X)
iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_ROC,
dir),
iio_get_time_ns(indio_dev));
if (val & BMG160_ANY_MOTION_BIT_Y)
iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_ROC,
dir),
iio_get_time_ns(indio_dev));
if (val & BMG160_ANY_MOTION_BIT_Z)
iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_ROC,
dir),
iio_get_time_ns(indio_dev));
ack_intr_status:
if (!data->dready_trigger_on) {
ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
BMG160_INT_MODE_LATCH_INT |
BMG160_INT_MODE_LATCH_RESET);
if (ret < 0)
dev_err(dev, "Error writing reg_rst_latch\n");
}
return IRQ_HANDLED;
}
static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct bmg160_data *data = iio_priv(indio_dev);
if (data->dready_trigger_on)
iio_trigger_poll(data->dready_trig);
else if (data->motion_trigger_on)
iio_trigger_poll(data->motion_trig);
if (data->ev_enable_state)
return IRQ_WAKE_THREAD;
else
return IRQ_HANDLED;
}
static int bmg160_buffer_preenable(struct iio_dev *indio_dev)
{
struct bmg160_data *data = iio_priv(indio_dev);
return bmg160_set_power_state(data, true);
}
static int bmg160_buffer_postdisable(struct iio_dev *indio_dev)
{
struct bmg160_data *data = iio_priv(indio_dev);
return bmg160_set_power_state(data, false);
}
static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = {
.preenable = bmg160_buffer_preenable,
.postdisable = bmg160_buffer_postdisable,
};
static const char *bmg160_match_acpi_device(struct device *dev)
{
const struct acpi_device_id *id;
id = acpi_match_device(dev->driver->acpi_match_table, dev);
if (!id)
return NULL;
return dev_name(dev);
}
int bmg160_core_probe(struct device *dev, struct regmap *regmap, int irq,
const char *name)
{
static const char * const regulators[] = { "vdd", "vddio" };
struct bmg160_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->irq = irq;
data->regmap = regmap;
ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
regulators);
if (ret)
return dev_err_probe(dev, ret, "Failed to get regulators\n");
ret = iio_read_mount_matrix(dev, &data->orientation);
if (ret)
return ret;
ret = bmg160_chip_init(data);
if (ret < 0)
return ret;
mutex_init(&data->mutex);
if (ACPI_HANDLE(dev))
name = bmg160_match_acpi_device(dev);
indio_dev->channels = bmg160_channels;
indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
indio_dev->name = name;
indio_dev->available_scan_masks = bmg160_accel_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bmg160_info;
if (data->irq > 0) {
ret = devm_request_threaded_irq(dev,
data->irq,
bmg160_data_rdy_trig_poll,
bmg160_event_handler,
IRQF_TRIGGER_RISING,
BMG160_IRQ_NAME,
indio_dev);
if (ret)
return ret;
data->dready_trig = devm_iio_trigger_alloc(dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig)
return -ENOMEM;
data->motion_trig = devm_iio_trigger_alloc(dev,
"%s-any-motion-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->motion_trig)
return -ENOMEM;
data->dready_trig->ops = &bmg160_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);
if (ret)
return ret;
data->motion_trig->ops = &bmg160_trigger_ops;
iio_trigger_set_drvdata(data->motion_trig, indio_dev);
ret = iio_trigger_register(data->motion_trig);
if (ret) {
data->motion_trig = NULL;
goto err_trigger_unregister;
}
}
ret = iio_triggered_buffer_setup(indio_dev,
iio_pollfunc_store_time,
bmg160_trigger_handler,
&bmg160_buffer_setup_ops);
if (ret < 0) {
dev_err(dev,
"iio triggered buffer setup failed\n");
goto err_trigger_unregister;
}
ret = pm_runtime_set_active(dev);
if (ret)
goto err_buffer_cleanup;
pm_runtime_enable(dev);
pm_runtime_set_autosuspend_delay(dev,
BMG160_AUTO_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(dev);
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(dev, "unable to register iio device\n");
goto err_pm_cleanup;
}
return 0;
err_pm_cleanup:
pm_runtime_dont_use_autosuspend(dev);
pm_runtime_disable(dev);
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
if (data->motion_trig)
iio_trigger_unregister(data->motion_trig);
return ret;
}
EXPORT_SYMBOL_GPL(bmg160_core_probe);
void bmg160_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmg160_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
pm_runtime_put_noidle(dev);
iio_triggered_buffer_cleanup(indio_dev);
if (data->dready_trig) {
iio_trigger_unregister(data->dready_trig);
iio_trigger_unregister(data->motion_trig);
}
mutex_lock(&data->mutex);
bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
mutex_unlock(&data->mutex);
}
EXPORT_SYMBOL_GPL(bmg160_core_remove);
#ifdef CONFIG_PM_SLEEP
static int bmg160_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmg160_data *data = iio_priv(indio_dev);
mutex_lock(&data->mutex);
bmg160_set_mode(data, BMG160_MODE_SUSPEND);
mutex_unlock(&data->mutex);
return 0;
}
static int bmg160_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmg160_data *data = iio_priv(indio_dev);
mutex_lock(&data->mutex);
if (data->dready_trigger_on || data->motion_trigger_on ||
data->ev_enable_state)
bmg160_set_mode(data, BMG160_MODE_NORMAL);
mutex_unlock(&data->mutex);
return 0;
}
#endif
#ifdef CONFIG_PM
static int bmg160_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmg160_data *data = iio_priv(indio_dev);
int ret;
ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
if (ret < 0) {
dev_err(dev, "set mode failed\n");
return -EAGAIN;
}
return 0;
}
static int bmg160_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmg160_data *data = iio_priv(indio_dev);
int ret;
ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
if (ret < 0)
return ret;
msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
return 0;
}
#endif
const struct dev_pm_ops bmg160_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
bmg160_runtime_resume, NULL)
};
EXPORT_SYMBOL_GPL(bmg160_pm_ops);
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMG160 Gyro driver");
| linux-master | drivers/iio/gyro/bmg160_core.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for NXP FXAS21002C Gyroscope - I2C
*
* Copyright (C) 2018 Linaro Ltd.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "fxas21002c.h"
static const struct regmap_config fxas21002c_regmap_i2c_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = FXAS21002C_REG_CTRL3,
};
static int fxas21002c_i2c_probe(struct i2c_client *i2c)
{
struct regmap *regmap;
regmap = devm_regmap_init_i2c(i2c, &fxas21002c_regmap_i2c_conf);
if (IS_ERR(regmap)) {
dev_err(&i2c->dev, "Failed to register i2c regmap: %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return fxas21002c_core_probe(&i2c->dev, regmap, i2c->irq, i2c->name);
}
static void fxas21002c_i2c_remove(struct i2c_client *i2c)
{
fxas21002c_core_remove(&i2c->dev);
}
static const struct i2c_device_id fxas21002c_i2c_id[] = {
{ "fxas21002c", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, fxas21002c_i2c_id);
static const struct of_device_id fxas21002c_i2c_of_match[] = {
{ .compatible = "nxp,fxas21002c", },
{ }
};
MODULE_DEVICE_TABLE(of, fxas21002c_i2c_of_match);
static struct i2c_driver fxas21002c_i2c_driver = {
.driver = {
.name = "fxas21002c_i2c",
.pm = pm_ptr(&fxas21002c_pm_ops),
.of_match_table = fxas21002c_i2c_of_match,
},
.probe = fxas21002c_i2c_probe,
.remove = fxas21002c_i2c_remove,
.id_table = fxas21002c_i2c_id,
};
module_i2c_driver(fxas21002c_i2c_driver);
MODULE_AUTHOR("Rui Miguel Silva <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("FXAS21002C I2C Gyro driver");
MODULE_IMPORT_NS(IIO_FXAS21002C);
| linux-master | drivers/iio/gyro/fxas21002c_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADIS16133/ADIS16135/ADIS16136 gyroscope driver
*
* Copyright 2012 Analog Devices Inc.
* Author: Lars-Peter Clausen <[email protected]>
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/sysfs.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/imu/adis.h>
#include <linux/debugfs.h>
#define ADIS16136_REG_FLASH_CNT 0x00
#define ADIS16136_REG_TEMP_OUT 0x02
#define ADIS16136_REG_GYRO_OUT2 0x04
#define ADIS16136_REG_GYRO_OUT 0x06
#define ADIS16136_REG_GYRO_OFF2 0x08
#define ADIS16136_REG_GYRO_OFF 0x0A
#define ADIS16136_REG_ALM_MAG1 0x10
#define ADIS16136_REG_ALM_MAG2 0x12
#define ADIS16136_REG_ALM_SAMPL1 0x14
#define ADIS16136_REG_ALM_SAMPL2 0x16
#define ADIS16136_REG_ALM_CTRL 0x18
#define ADIS16136_REG_GPIO_CTRL 0x1A
#define ADIS16136_REG_MSC_CTRL 0x1C
#define ADIS16136_REG_SMPL_PRD 0x1E
#define ADIS16136_REG_AVG_CNT 0x20
#define ADIS16136_REG_DEC_RATE 0x22
#define ADIS16136_REG_SLP_CTRL 0x24
#define ADIS16136_REG_DIAG_STAT 0x26
#define ADIS16136_REG_GLOB_CMD 0x28
#define ADIS16136_REG_LOT1 0x32
#define ADIS16136_REG_LOT2 0x34
#define ADIS16136_REG_LOT3 0x36
#define ADIS16136_REG_PROD_ID 0x38
#define ADIS16136_REG_SERIAL_NUM 0x3A
#define ADIS16136_DIAG_STAT_FLASH_UPDATE_FAIL 2
#define ADIS16136_DIAG_STAT_SPI_FAIL 3
#define ADIS16136_DIAG_STAT_SELF_TEST_FAIL 5
#define ADIS16136_DIAG_STAT_FLASH_CHKSUM_FAIL 6
#define ADIS16136_MSC_CTRL_MEMORY_TEST BIT(11)
#define ADIS16136_MSC_CTRL_SELF_TEST BIT(10)
struct adis16136_chip_info {
unsigned int precision;
unsigned int fullscale;
const struct adis_data adis_data;
};
struct adis16136 {
const struct adis16136_chip_info *chip_info;
struct adis adis;
};
#ifdef CONFIG_DEBUG_FS
static ssize_t adis16136_show_serial(struct file *file,
char __user *userbuf, size_t count, loff_t *ppos)
{
struct adis16136 *adis16136 = file->private_data;
uint16_t lot1, lot2, lot3, serial;
char buf[20];
size_t len;
int ret;
ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_SERIAL_NUM,
&serial);
if (ret)
return ret;
ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT1, &lot1);
if (ret)
return ret;
ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT2, &lot2);
if (ret)
return ret;
ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT3, &lot3);
if (ret)
return ret;
len = snprintf(buf, sizeof(buf), "%.4x%.4x%.4x-%.4x\n", lot1, lot2,
lot3, serial);
return simple_read_from_buffer(userbuf, count, ppos, buf, len);
}
static const struct file_operations adis16136_serial_fops = {
.open = simple_open,
.read = adis16136_show_serial,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static int adis16136_show_product_id(void *arg, u64 *val)
{
struct adis16136 *adis16136 = arg;
u16 prod_id;
int ret;
ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_PROD_ID,
&prod_id);
if (ret)
return ret;
*val = prod_id;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16136_product_id_fops,
adis16136_show_product_id, NULL, "%llu\n");
static int adis16136_show_flash_count(void *arg, u64 *val)
{
struct adis16136 *adis16136 = arg;
uint16_t flash_count;
int ret;
ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_FLASH_CNT,
&flash_count);
if (ret)
return ret;
*val = flash_count;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16136_flash_count_fops,
adis16136_show_flash_count, NULL, "%lld\n");
static int adis16136_debugfs_init(struct iio_dev *indio_dev)
{
struct adis16136 *adis16136 = iio_priv(indio_dev);
struct dentry *d = iio_get_debugfs_dentry(indio_dev);
debugfs_create_file_unsafe("serial_number", 0400,
d, adis16136, &adis16136_serial_fops);
debugfs_create_file_unsafe("product_id", 0400,
d, adis16136, &adis16136_product_id_fops);
debugfs_create_file_unsafe("flash_count", 0400,
d, adis16136, &adis16136_flash_count_fops);
return 0;
}
#else
static int adis16136_debugfs_init(struct iio_dev *indio_dev)
{
return 0;
}
#endif
static int adis16136_set_freq(struct adis16136 *adis16136, unsigned int freq)
{
unsigned int t;
t = 32768 / freq;
if (t < 0xf)
t = 0xf;
else if (t > 0xffff)
t = 0xffff;
else
t--;
return adis_write_reg_16(&adis16136->adis, ADIS16136_REG_SMPL_PRD, t);
}
static int __adis16136_get_freq(struct adis16136 *adis16136, unsigned int *freq)
{
uint16_t t;
int ret;
ret = __adis_read_reg_16(&adis16136->adis, ADIS16136_REG_SMPL_PRD, &t);
if (ret)
return ret;
*freq = 32768 / (t + 1);
return 0;
}
static ssize_t adis16136_write_frequency(struct device *dev,
struct device_attribute *attr, const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adis16136 *adis16136 = iio_priv(indio_dev);
unsigned int val;
int ret;
ret = kstrtouint(buf, 10, &val);
if (ret)
return ret;
if (val == 0)
return -EINVAL;
ret = adis16136_set_freq(adis16136, val);
return ret ? ret : len;
}
static ssize_t adis16136_read_frequency(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adis16136 *adis16136 = iio_priv(indio_dev);
unsigned int freq;
int ret;
adis_dev_lock(&adis16136->adis);
ret = __adis16136_get_freq(adis16136, &freq);
adis_dev_unlock(&adis16136->adis);
if (ret)
return ret;
return sprintf(buf, "%d\n", freq);
}
static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
adis16136_read_frequency,
adis16136_write_frequency);
static const unsigned adis16136_3db_divisors[] = {
[0] = 2, /* Special case */
[1] = 6,
[2] = 12,
[3] = 25,
[4] = 50,
[5] = 100,
[6] = 200,
[7] = 200, /* Not a valid setting */
};
static int adis16136_set_filter(struct iio_dev *indio_dev, int val)
{
struct adis16136 *adis16136 = iio_priv(indio_dev);
unsigned int freq;
int i, ret;
adis_dev_lock(&adis16136->adis);
ret = __adis16136_get_freq(adis16136, &freq);
if (ret)
goto out_unlock;
for (i = ARRAY_SIZE(adis16136_3db_divisors) - 1; i >= 1; i--) {
if (freq / adis16136_3db_divisors[i] >= val)
break;
}
ret = __adis_write_reg_16(&adis16136->adis, ADIS16136_REG_AVG_CNT, i);
out_unlock:
adis_dev_unlock(&adis16136->adis);
return ret;
}
static int adis16136_get_filter(struct iio_dev *indio_dev, int *val)
{
struct adis16136 *adis16136 = iio_priv(indio_dev);
unsigned int freq;
uint16_t val16;
int ret;
adis_dev_lock(&adis16136->adis);
ret = __adis_read_reg_16(&adis16136->adis, ADIS16136_REG_AVG_CNT,
&val16);
if (ret)
goto err_unlock;
ret = __adis16136_get_freq(adis16136, &freq);
if (ret)
goto err_unlock;
*val = freq / adis16136_3db_divisors[val16 & 0x07];
err_unlock:
adis_dev_unlock(&adis16136->adis);
return ret ? ret : IIO_VAL_INT;
}
static int adis16136_read_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int *val, int *val2, long info)
{
struct adis16136 *adis16136 = iio_priv(indio_dev);
uint32_t val32;
int ret;
switch (info) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan, 0, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = adis16136->chip_info->precision;
*val2 = (adis16136->chip_info->fullscale << 16);
return IIO_VAL_FRACTIONAL;
case IIO_TEMP:
*val = 10;
*val2 = 697000; /* 0.010697 degree Celsius */
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_CALIBBIAS:
ret = adis_read_reg_32(&adis16136->adis,
ADIS16136_REG_GYRO_OFF2, &val32);
if (ret)
return ret;
*val = sign_extend32(val32, 31);
return IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return adis16136_get_filter(indio_dev, val);
default:
return -EINVAL;
}
}
static int adis16136_write_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int val, int val2, long info)
{
struct adis16136 *adis16136 = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_CALIBBIAS:
return adis_write_reg_32(&adis16136->adis,
ADIS16136_REG_GYRO_OFF2, val);
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return adis16136_set_filter(indio_dev, val);
default:
break;
}
return -EINVAL;
}
enum {
ADIS16136_SCAN_GYRO,
ADIS16136_SCAN_TEMP,
};
static const struct iio_chan_spec adis16136_channels[] = {
{
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_CALIBBIAS) |
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
.address = ADIS16136_REG_GYRO_OUT2,
.scan_index = ADIS16136_SCAN_GYRO,
.scan_type = {
.sign = 's',
.realbits = 32,
.storagebits = 32,
.endianness = IIO_BE,
},
}, {
.type = IIO_TEMP,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.address = ADIS16136_REG_TEMP_OUT,
.scan_index = ADIS16136_SCAN_TEMP,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
},
IIO_CHAN_SOFT_TIMESTAMP(2),
};
static struct attribute *adis16136_attributes[] = {
&iio_dev_attr_sampling_frequency.dev_attr.attr,
NULL
};
static const struct attribute_group adis16136_attribute_group = {
.attrs = adis16136_attributes,
};
static const struct iio_info adis16136_info = {
.attrs = &adis16136_attribute_group,
.read_raw = &adis16136_read_raw,
.write_raw = &adis16136_write_raw,
.update_scan_mode = adis_update_scan_mode,
.debugfs_reg_access = adis_debugfs_reg_access,
};
static int adis16136_stop_device(struct iio_dev *indio_dev)
{
struct adis16136 *adis16136 = iio_priv(indio_dev);
int ret;
ret = adis_write_reg_16(&adis16136->adis, ADIS16136_REG_SLP_CTRL, 0xff);
if (ret)
dev_err(&indio_dev->dev,
"Could not power down device: %d\n", ret);
return ret;
}
static int adis16136_initial_setup(struct iio_dev *indio_dev)
{
struct adis16136 *adis16136 = iio_priv(indio_dev);
unsigned int device_id;
uint16_t prod_id;
int ret;
ret = __adis_initial_startup(&adis16136->adis);
if (ret)
return ret;
ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_PROD_ID,
&prod_id);
if (ret)
return ret;
ret = sscanf(indio_dev->name, "adis%u\n", &device_id);
if (ret != 1)
return -EINVAL;
if (prod_id != device_id)
dev_warn(&indio_dev->dev, "Device ID(%u) and product ID(%u) do not match.",
device_id, prod_id);
return 0;
}
static const char * const adis16136_status_error_msgs[] = {
[ADIS16136_DIAG_STAT_FLASH_UPDATE_FAIL] = "Flash update failed",
[ADIS16136_DIAG_STAT_SPI_FAIL] = "SPI failure",
[ADIS16136_DIAG_STAT_SELF_TEST_FAIL] = "Self test error",
[ADIS16136_DIAG_STAT_FLASH_CHKSUM_FAIL] = "Flash checksum error",
};
#define ADIS16136_DATA(_timeouts) \
{ \
.diag_stat_reg = ADIS16136_REG_DIAG_STAT, \
.glob_cmd_reg = ADIS16136_REG_GLOB_CMD, \
.msc_ctrl_reg = ADIS16136_REG_MSC_CTRL, \
.self_test_reg = ADIS16136_REG_MSC_CTRL, \
.self_test_mask = ADIS16136_MSC_CTRL_SELF_TEST, \
.read_delay = 10, \
.write_delay = 10, \
.status_error_msgs = adis16136_status_error_msgs, \
.status_error_mask = BIT(ADIS16136_DIAG_STAT_FLASH_UPDATE_FAIL) | \
BIT(ADIS16136_DIAG_STAT_SPI_FAIL) | \
BIT(ADIS16136_DIAG_STAT_SELF_TEST_FAIL) | \
BIT(ADIS16136_DIAG_STAT_FLASH_CHKSUM_FAIL), \
.timeouts = (_timeouts), \
}
enum adis16136_id {
ID_ADIS16133,
ID_ADIS16135,
ID_ADIS16136,
ID_ADIS16137,
};
static const struct adis_timeout adis16133_timeouts = {
.reset_ms = 75,
.sw_reset_ms = 75,
.self_test_ms = 50,
};
static const struct adis_timeout adis16136_timeouts = {
.reset_ms = 128,
.sw_reset_ms = 75,
.self_test_ms = 245,
};
static const struct adis16136_chip_info adis16136_chip_info[] = {
[ID_ADIS16133] = {
.precision = IIO_DEGREE_TO_RAD(1200),
.fullscale = 24000,
.adis_data = ADIS16136_DATA(&adis16133_timeouts),
},
[ID_ADIS16135] = {
.precision = IIO_DEGREE_TO_RAD(300),
.fullscale = 24000,
.adis_data = ADIS16136_DATA(&adis16133_timeouts),
},
[ID_ADIS16136] = {
.precision = IIO_DEGREE_TO_RAD(450),
.fullscale = 24623,
.adis_data = ADIS16136_DATA(&adis16136_timeouts),
},
[ID_ADIS16137] = {
.precision = IIO_DEGREE_TO_RAD(1000),
.fullscale = 24609,
.adis_data = ADIS16136_DATA(&adis16136_timeouts),
},
};
static void adis16136_stop(void *data)
{
adis16136_stop_device(data);
}
static int adis16136_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct adis16136 *adis16136;
struct iio_dev *indio_dev;
const struct adis_data *adis16136_data;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adis16136));
if (indio_dev == NULL)
return -ENOMEM;
spi_set_drvdata(spi, indio_dev);
adis16136 = iio_priv(indio_dev);
adis16136->chip_info = &adis16136_chip_info[id->driver_data];
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->channels = adis16136_channels;
indio_dev->num_channels = ARRAY_SIZE(adis16136_channels);
indio_dev->info = &adis16136_info;
indio_dev->modes = INDIO_DIRECT_MODE;
adis16136_data = &adis16136->chip_info->adis_data;
ret = adis_init(&adis16136->adis, indio_dev, spi, adis16136_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(&adis16136->adis, indio_dev, NULL);
if (ret)
return ret;
ret = adis16136_initial_setup(indio_dev);
if (ret)
return ret;
ret = devm_add_action_or_reset(&spi->dev, adis16136_stop, indio_dev);
if (ret)
return ret;
ret = devm_iio_device_register(&spi->dev, indio_dev);
if (ret)
return ret;
adis16136_debugfs_init(indio_dev);
return 0;
}
static const struct spi_device_id adis16136_ids[] = {
{ "adis16133", ID_ADIS16133 },
{ "adis16135", ID_ADIS16135 },
{ "adis16136", ID_ADIS16136 },
{ "adis16137", ID_ADIS16137 },
{ }
};
MODULE_DEVICE_TABLE(spi, adis16136_ids);
static struct spi_driver adis16136_driver = {
.driver = {
.name = "adis16136",
},
.id_table = adis16136_ids,
.probe = adis16136_probe,
};
module_spi_driver(adis16136_driver);
MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16133/ADIS16135/ADIS16136 gyroscope driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/gyro/adis16136.c |
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include "bmg160.h"
static const struct regmap_config bmg160_regmap_i2c_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x3f
};
static int bmg160_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
const char *name = NULL;
regmap = devm_regmap_init_i2c(client, &bmg160_regmap_i2c_conf);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
if (id)
name = id->name;
return bmg160_core_probe(&client->dev, regmap, client->irq, name);
}
static void bmg160_i2c_remove(struct i2c_client *client)
{
bmg160_core_remove(&client->dev);
}
static const struct acpi_device_id bmg160_acpi_match[] = {
{"BMG0160", 0},
{"BMI055B", 0},
{"BMI088B", 0},
{},
};
MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
static const struct i2c_device_id bmg160_i2c_id[] = {
{"bmg160", 0},
{"bmi055_gyro", 0},
{"bmi088_gyro", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, bmg160_i2c_id);
static const struct of_device_id bmg160_of_match[] = {
{ .compatible = "bosch,bmg160" },
{ .compatible = "bosch,bmi055_gyro" },
{ }
};
MODULE_DEVICE_TABLE(of, bmg160_of_match);
static struct i2c_driver bmg160_i2c_driver = {
.driver = {
.name = "bmg160_i2c",
.acpi_match_table = ACPI_PTR(bmg160_acpi_match),
.of_match_table = bmg160_of_match,
.pm = &bmg160_pm_ops,
},
.probe = bmg160_i2c_probe,
.remove = bmg160_i2c_remove,
.id_table = bmg160_i2c_id,
};
module_i2c_driver(bmg160_i2c_driver);
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMG160 I2C Gyro driver");
| linux-master | drivers/iio/gyro/bmg160_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* itg3200_buffer.c -- support InvenSense ITG3200
* Digital 3-Axis Gyroscope driver
*
* Copyright (c) 2011 Christian Strobel <[email protected]>
* Copyright (c) 2011 Manuel Stahl <[email protected]>
* Copyright (c) 2012 Thorsten Nowak <[email protected]>
*/
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/gyro/itg3200.h>
static int itg3200_read_all_channels(struct i2c_client *i2c, __be16 *buf)
{
u8 tx = 0x80 | ITG3200_REG_TEMP_OUT_H;
struct i2c_msg msg[2] = {
{
.addr = i2c->addr,
.flags = i2c->flags,
.len = 1,
.buf = &tx,
},
{
.addr = i2c->addr,
.flags = i2c->flags | I2C_M_RD,
.len = ITG3200_SCAN_ELEMENTS * sizeof(s16),
.buf = (char *)&buf,
},
};
return i2c_transfer(i2c->adapter, msg, 2);
}
static irqreturn_t itg3200_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct itg3200 *st = iio_priv(indio_dev);
/*
* Ensure correct alignment and padding including for the
* timestamp that may be inserted.
*/
struct {
__be16 buf[ITG3200_SCAN_ELEMENTS];
s64 ts __aligned(8);
} scan;
int ret = itg3200_read_all_channels(st->i2c, scan.buf);
if (ret < 0)
goto error_ret;
iio_push_to_buffers_with_timestamp(indio_dev, &scan, pf->timestamp);
error_ret:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
int itg3200_buffer_configure(struct iio_dev *indio_dev)
{
return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
itg3200_trigger_handler, NULL);
}
void itg3200_buffer_unconfigure(struct iio_dev *indio_dev)
{
iio_triggered_buffer_cleanup(indio_dev);
}
static int itg3200_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
int ret;
u8 msc;
ret = itg3200_read_reg_8(indio_dev, ITG3200_REG_IRQ_CONFIG, &msc);
if (ret)
goto error_ret;
if (state)
msc |= ITG3200_IRQ_DATA_RDY_ENABLE;
else
msc &= ~ITG3200_IRQ_DATA_RDY_ENABLE;
ret = itg3200_write_reg_8(indio_dev, ITG3200_REG_IRQ_CONFIG, msc);
if (ret)
goto error_ret;
error_ret:
return ret;
}
static const struct iio_trigger_ops itg3200_trigger_ops = {
.set_trigger_state = &itg3200_data_rdy_trigger_set_state,
};
int itg3200_probe_trigger(struct iio_dev *indio_dev)
{
int ret;
struct itg3200 *st = iio_priv(indio_dev);
st->trig = iio_trigger_alloc(&st->i2c->dev, "%s-dev%d", indio_dev->name,
iio_device_id(indio_dev));
if (!st->trig)
return -ENOMEM;
ret = request_irq(st->i2c->irq,
&iio_trigger_generic_data_rdy_poll,
IRQF_TRIGGER_RISING,
"itg3200_data_rdy",
st->trig);
if (ret)
goto error_free_trig;
st->trig->ops = &itg3200_trigger_ops;
iio_trigger_set_drvdata(st->trig, indio_dev);
ret = iio_trigger_register(st->trig);
if (ret)
goto error_free_irq;
/* select default trigger */
indio_dev->trig = iio_trigger_get(st->trig);
return 0;
error_free_irq:
free_irq(st->i2c->irq, st->trig);
error_free_trig:
iio_trigger_free(st->trig);
return ret;
}
void itg3200_remove_trigger(struct iio_dev *indio_dev)
{
struct itg3200 *st = iio_priv(indio_dev);
iio_trigger_unregister(st->trig);
free_irq(st->i2c->irq, st->trig);
iio_trigger_free(st->trig);
}
| linux-master | drivers/iio/gyro/itg3200_buffer.c |
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <linux/iio/iio.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/pm_runtime.h>
#include "mpu3050.h"
static const struct regmap_config mpu3050_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int mpu3050_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
{
struct mpu3050 *mpu3050 = i2c_mux_priv(mux);
/* Just power up the device, that is all that is needed */
pm_runtime_get_sync(mpu3050->dev);
return 0;
}
static int mpu3050_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
{
struct mpu3050 *mpu3050 = i2c_mux_priv(mux);
pm_runtime_mark_last_busy(mpu3050->dev);
pm_runtime_put_autosuspend(mpu3050->dev);
return 0;
}
static int mpu3050_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
const char *name;
struct mpu3050 *mpu3050;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_I2C_BLOCK))
return -EOPNOTSUPP;
if (id)
name = id->name;
else
return -ENODEV;
regmap = devm_regmap_init_i2c(client, &mpu3050_i2c_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
ret = mpu3050_common_probe(&client->dev, regmap, client->irq, name);
if (ret)
return ret;
/* The main driver is up, now register the I2C mux */
mpu3050 = iio_priv(dev_get_drvdata(&client->dev));
mpu3050->i2cmux = i2c_mux_alloc(client->adapter, &client->dev,
1, 0, I2C_MUX_LOCKED | I2C_MUX_GATE,
mpu3050_i2c_bypass_select,
mpu3050_i2c_bypass_deselect);
/* Just fail the mux, there is no point in killing the driver */
if (!mpu3050->i2cmux)
dev_err(&client->dev, "failed to allocate I2C mux\n");
else {
mpu3050->i2cmux->priv = mpu3050;
/* Ignore failure, not critical */
i2c_mux_add_adapter(mpu3050->i2cmux, 0, 0, 0);
}
return 0;
}
static void mpu3050_i2c_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = dev_get_drvdata(&client->dev);
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
if (mpu3050->i2cmux)
i2c_mux_del_adapters(mpu3050->i2cmux);
mpu3050_common_remove(&client->dev);
}
/*
* device id table is used to identify what device can be
* supported by this driver
*/
static const struct i2c_device_id mpu3050_i2c_id[] = {
{ "mpu3050" },
{}
};
MODULE_DEVICE_TABLE(i2c, mpu3050_i2c_id);
static const struct of_device_id mpu3050_i2c_of_match[] = {
{ .compatible = "invensense,mpu3050", .data = "mpu3050" },
/* Deprecated vendor ID from the Input driver */
{ .compatible = "invn,mpu3050", .data = "mpu3050" },
{ },
};
MODULE_DEVICE_TABLE(of, mpu3050_i2c_of_match);
static struct i2c_driver mpu3050_i2c_driver = {
.probe = mpu3050_i2c_probe,
.remove = mpu3050_i2c_remove,
.id_table = mpu3050_i2c_id,
.driver = {
.of_match_table = mpu3050_i2c_of_match,
.name = "mpu3050-i2c",
.pm = pm_ptr(&mpu3050_dev_pm_ops),
},
};
module_i2c_driver(mpu3050_i2c_driver);
MODULE_AUTHOR("Linus Walleij");
MODULE_DESCRIPTION("Invensense MPU3050 gyroscope driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/gyro/mpu3050-i2c.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2014, Samsung Electronics Co. Ltd. All Rights Reserved.
*/
#include <linux/iio/common/ssp_sensors.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include "../common/ssp_sensors/ssp_iio_sensor.h"
#define SSP_CHANNEL_COUNT 3
#define SSP_GYROSCOPE_NAME "ssp-gyroscope"
static const char ssp_gyro_name[] = SSP_GYROSCOPE_NAME;
enum ssp_gyro_3d_channel {
SSP_CHANNEL_SCAN_INDEX_X,
SSP_CHANNEL_SCAN_INDEX_Y,
SSP_CHANNEL_SCAN_INDEX_Z,
SSP_CHANNEL_SCAN_INDEX_TIME,
};
static int ssp_gyro_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
u32 t;
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
t = ssp_get_sensor_delay(data, SSP_GYROSCOPE_SENSOR);
ssp_convert_to_freq(t, val, val2);
return IIO_VAL_INT_PLUS_MICRO;
default:
break;
}
return -EINVAL;
}
static int ssp_gyro_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
int ret;
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = ssp_convert_to_time(val, val2);
ret = ssp_change_delay(data, SSP_GYROSCOPE_SENSOR, ret);
if (ret < 0)
dev_err(&indio_dev->dev, "gyro sensor enable fail\n");
return ret;
default:
break;
}
return -EINVAL;
}
static const struct iio_info ssp_gyro_iio_info = {
.read_raw = &ssp_gyro_read_raw,
.write_raw = &ssp_gyro_write_raw,
};
static const unsigned long ssp_gyro_scan_mask[] = { 0x07, 0, };
static const struct iio_chan_spec ssp_gyro_channels[] = {
SSP_CHANNEL_AG(IIO_ANGL_VEL, IIO_MOD_X, SSP_CHANNEL_SCAN_INDEX_X),
SSP_CHANNEL_AG(IIO_ANGL_VEL, IIO_MOD_Y, SSP_CHANNEL_SCAN_INDEX_Y),
SSP_CHANNEL_AG(IIO_ANGL_VEL, IIO_MOD_Z, SSP_CHANNEL_SCAN_INDEX_Z),
SSP_CHAN_TIMESTAMP(SSP_CHANNEL_SCAN_INDEX_TIME),
};
static int ssp_process_gyro_data(struct iio_dev *indio_dev, void *buf,
int64_t timestamp)
{
return ssp_common_process_data(indio_dev, buf, SSP_GYROSCOPE_SIZE,
timestamp);
}
static const struct iio_buffer_setup_ops ssp_gyro_buffer_ops = {
.postenable = &ssp_common_buffer_postenable,
.postdisable = &ssp_common_buffer_postdisable,
};
static int ssp_gyro_probe(struct platform_device *pdev)
{
int ret;
struct iio_dev *indio_dev;
struct ssp_sensor_data *spd;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*spd));
if (!indio_dev)
return -ENOMEM;
spd = iio_priv(indio_dev);
spd->process_data = ssp_process_gyro_data;
spd->type = SSP_GYROSCOPE_SENSOR;
indio_dev->name = ssp_gyro_name;
indio_dev->info = &ssp_gyro_iio_info;
indio_dev->channels = ssp_gyro_channels;
indio_dev->num_channels = ARRAY_SIZE(ssp_gyro_channels);
indio_dev->available_scan_masks = ssp_gyro_scan_mask;
ret = devm_iio_kfifo_buffer_setup(&pdev->dev, indio_dev,
&ssp_gyro_buffer_ops);
if (ret)
return ret;
platform_set_drvdata(pdev, indio_dev);
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret < 0)
return ret;
/* ssp registering should be done after all iio setup */
ssp_register_consumer(indio_dev, SSP_GYROSCOPE_SENSOR);
return 0;
}
static struct platform_driver ssp_gyro_driver = {
.driver = {
.name = SSP_GYROSCOPE_NAME,
},
.probe = ssp_gyro_probe,
};
module_platform_driver(ssp_gyro_driver);
MODULE_AUTHOR("Karol Wrona <[email protected]>");
MODULE_DESCRIPTION("Samsung sensorhub gyroscopes driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_SSP_SENSORS);
| linux-master | drivers/iio/gyro/ssp_gyro_sensor.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics gyroscopes driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/interrupt.h>
#include <linux/sysfs.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/common/st_sensors.h>
#include "st_gyro.h"
#define ST_GYRO_NUMBER_DATA_CHANNELS 3
/* DEFAULT VALUE FOR SENSORS */
#define ST_GYRO_DEFAULT_OUT_X_L_ADDR 0x28
#define ST_GYRO_DEFAULT_OUT_Y_L_ADDR 0x2a
#define ST_GYRO_DEFAULT_OUT_Z_L_ADDR 0x2c
/* FULLSCALE */
#define ST_GYRO_FS_AVL_245DPS 245
#define ST_GYRO_FS_AVL_250DPS 250
#define ST_GYRO_FS_AVL_500DPS 500
#define ST_GYRO_FS_AVL_2000DPS 2000
static const struct iio_mount_matrix *
st_gyro_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct st_sensor_data *gdata = iio_priv(indio_dev);
return &gdata->mount_matrix;
}
static const struct iio_chan_spec_ext_info st_gyro_mount_matrix_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, st_gyro_get_mount_matrix),
{ }
};
static const struct iio_chan_spec st_gyro_16bit_channels[] = {
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ANGL_VEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
ST_GYRO_DEFAULT_OUT_X_L_ADDR,
st_gyro_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ANGL_VEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
ST_GYRO_DEFAULT_OUT_Y_L_ADDR,
st_gyro_mount_matrix_ext_info),
ST_SENSORS_LSM_CHANNELS_EXT(IIO_ANGL_VEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
ST_GYRO_DEFAULT_OUT_Z_L_ADDR,
st_gyro_mount_matrix_ext_info),
IIO_CHAN_SOFT_TIMESTAMP(3)
};
static const struct st_sensor_settings st_gyro_sensors_settings[] = {
{
.wai = 0xd3,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = L3G4200D_GYRO_DEV_NAME,
[1] = LSM330DL_GYRO_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_gyro_16bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xc0,
.odr_avl = {
{ .hz = 100, .value = 0x00, },
{ .hz = 200, .value = 0x01, },
{ .hz = 400, .value = 0x02, },
{ .hz = 800, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = 0x08,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_GYRO_FS_AVL_250DPS,
.value = 0x00,
.gain = IIO_DEGREE_TO_RAD(8750),
},
[1] = {
.num = ST_GYRO_FS_AVL_500DPS,
.value = 0x01,
.gain = IIO_DEGREE_TO_RAD(17500),
},
[2] = {
.num = ST_GYRO_FS_AVL_2000DPS,
.value = 0x02,
.gain = IIO_DEGREE_TO_RAD(70000),
},
},
},
.bdu = {
.addr = 0x23,
.mask = 0x80,
},
.drdy_irq = {
.int2 = {
.addr = 0x22,
.mask = 0x08,
},
/*
* The sensor has IHL (active low) and open
* drain settings, but only for INT1 and not
* for the DRDY line on INT2.
*/
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0xd4,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = L3GD20_GYRO_DEV_NAME,
[1] = LSM330D_GYRO_DEV_NAME,
[2] = LSM330DLC_GYRO_DEV_NAME,
[3] = L3G4IS_GYRO_DEV_NAME,
[4] = LSM330_GYRO_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_gyro_16bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xc0,
.odr_avl = {
{ .hz = 95, .value = 0x00, },
{ .hz = 190, .value = 0x01, },
{ .hz = 380, .value = 0x02, },
{ .hz = 760, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = 0x08,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_GYRO_FS_AVL_250DPS,
.value = 0x00,
.gain = IIO_DEGREE_TO_RAD(8750),
},
[1] = {
.num = ST_GYRO_FS_AVL_500DPS,
.value = 0x01,
.gain = IIO_DEGREE_TO_RAD(17500),
},
[2] = {
.num = ST_GYRO_FS_AVL_2000DPS,
.value = 0x02,
.gain = IIO_DEGREE_TO_RAD(70000),
},
},
},
.bdu = {
.addr = 0x23,
.mask = 0x80,
},
.drdy_irq = {
.int2 = {
.addr = 0x22,
.mask = 0x08,
},
/*
* The sensor has IHL (active low) and open
* drain settings, but only for INT1 and not
* for the DRDY line on INT2.
*/
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0xd4,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LSM9DS0_GYRO_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_gyro_16bit_channels,
.odr = {
.addr = 0x20,
.mask = GENMASK(7, 6),
.odr_avl = {
{ .hz = 95, .value = 0x00, },
{ .hz = 190, .value = 0x01, },
{ .hz = 380, .value = 0x02, },
{ .hz = 760, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = BIT(3),
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = GENMASK(5, 4),
.fs_avl = {
[0] = {
.num = ST_GYRO_FS_AVL_245DPS,
.value = 0x00,
.gain = IIO_DEGREE_TO_RAD(8750),
},
[1] = {
.num = ST_GYRO_FS_AVL_500DPS,
.value = 0x01,
.gain = IIO_DEGREE_TO_RAD(17500),
},
[2] = {
.num = ST_GYRO_FS_AVL_2000DPS,
.value = 0x02,
.gain = IIO_DEGREE_TO_RAD(70000),
},
},
},
.bdu = {
.addr = 0x23,
.mask = BIT(7),
},
.drdy_irq = {
.int2 = {
.addr = 0x22,
.mask = BIT(3),
},
/*
* The sensor has IHL (active low) and open
* drain settings, but only for INT1 and not
* for the DRDY line on INT2.
*/
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = GENMASK(2, 0),
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
.wai = 0xd7,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = L3GD20H_GYRO_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_gyro_16bit_channels,
.odr = {
.addr = 0x20,
.mask = 0xc0,
.odr_avl = {
{ .hz = 100, .value = 0x00, },
{ .hz = 200, .value = 0x01, },
{ .hz = 400, .value = 0x02, },
{ .hz = 800, .value = 0x03, },
},
},
.pw = {
.addr = 0x20,
.mask = 0x08,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.enable_axis = {
.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
[0] = {
.num = ST_GYRO_FS_AVL_245DPS,
.value = 0x00,
.gain = IIO_DEGREE_TO_RAD(8750),
},
[1] = {
.num = ST_GYRO_FS_AVL_500DPS,
.value = 0x01,
.gain = IIO_DEGREE_TO_RAD(17500),
},
[2] = {
.num = ST_GYRO_FS_AVL_2000DPS,
.value = 0x02,
.gain = IIO_DEGREE_TO_RAD(70000),
},
},
},
.bdu = {
.addr = 0x23,
.mask = 0x80,
},
.drdy_irq = {
.int2 = {
.addr = 0x22,
.mask = 0x08,
},
/*
* The sensor has IHL (active low) and open
* drain settings, but only for INT1 and not
* for the DRDY line on INT2.
*/
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x07,
},
},
.sim = {
.addr = 0x23,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
};
/* DRDY on gyros is available only on INT2 pin */
static const struct st_sensors_platform_data gyro_pdata = {
.drdy_int_pin = 2,
};
static int st_gyro_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *ch, int *val,
int *val2, long mask)
{
int err;
struct st_sensor_data *gdata = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
err = st_sensors_read_info_raw(indio_dev, ch, val);
if (err < 0)
goto read_error;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = gdata->current_fullscale->gain;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = gdata->odr;
return IIO_VAL_INT;
default:
return -EINVAL;
}
read_error:
return err;
}
static int st_gyro_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2, long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
return st_sensors_set_fullscale_by_gain(indio_dev, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
if (val2)
return -EINVAL;
return st_sensors_set_odr(indio_dev, val);
default:
return -EINVAL;
}
}
static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_anglvel_scale_available);
static struct attribute *st_gyro_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
&iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group st_gyro_attribute_group = {
.attrs = st_gyro_attributes,
};
static const struct iio_info gyro_info = {
.attrs = &st_gyro_attribute_group,
.read_raw = &st_gyro_read_raw,
.write_raw = &st_gyro_write_raw,
.debugfs_reg_access = &st_sensors_debugfs_reg_access,
};
#ifdef CONFIG_IIO_TRIGGER
static const struct iio_trigger_ops st_gyro_trigger_ops = {
.set_trigger_state = ST_GYRO_TRIGGER_SET_STATE,
.validate_device = st_sensors_validate_device,
};
#define ST_GYRO_TRIGGER_OPS (&st_gyro_trigger_ops)
#else
#define ST_GYRO_TRIGGER_OPS NULL
#endif
/*
* st_gyro_get_settings() - get sensor settings from device name
* @name: device name buffer reference.
*
* Return: valid reference on success, NULL otherwise.
*/
const struct st_sensor_settings *st_gyro_get_settings(const char *name)
{
int index = st_sensors_get_settings_index(name,
st_gyro_sensors_settings,
ARRAY_SIZE(st_gyro_sensors_settings));
if (index < 0)
return NULL;
return &st_gyro_sensors_settings[index];
}
EXPORT_SYMBOL_NS(st_gyro_get_settings, IIO_ST_SENSORS);
int st_gyro_common_probe(struct iio_dev *indio_dev)
{
struct st_sensor_data *gdata = iio_priv(indio_dev);
struct st_sensors_platform_data *pdata;
struct device *parent = indio_dev->dev.parent;
int err;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &gyro_info;
err = st_sensors_verify_id(indio_dev);
if (err < 0)
return err;
gdata->num_data_channels = ST_GYRO_NUMBER_DATA_CHANNELS;
indio_dev->channels = gdata->sensor_settings->ch;
indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
err = iio_read_mount_matrix(parent, &gdata->mount_matrix);
if (err)
return err;
gdata->current_fullscale = &gdata->sensor_settings->fs.fs_avl[0];
gdata->odr = gdata->sensor_settings->odr.odr_avl[0].hz;
pdata = (struct st_sensors_platform_data *)&gyro_pdata;
err = st_sensors_init_sensor(indio_dev, pdata);
if (err < 0)
return err;
err = st_gyro_allocate_ring(indio_dev);
if (err < 0)
return err;
if (gdata->irq > 0) {
err = st_sensors_allocate_trigger(indio_dev,
ST_GYRO_TRIGGER_OPS);
if (err < 0)
return err;
}
return devm_iio_device_register(parent, indio_dev);
}
EXPORT_SYMBOL_NS(st_gyro_common_probe, IIO_ST_SENSORS);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics gyroscopes driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/gyro/st_gyro_core.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for NXP Fxas21002c Gyroscope - SPI
*
* Copyright (C) 2019 Linaro Ltd.
*/
#include <linux/err.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "fxas21002c.h"
static const struct regmap_config fxas21002c_regmap_spi_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = FXAS21002C_REG_CTRL3,
};
static int fxas21002c_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &fxas21002c_regmap_spi_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap: %ld\n",
PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return fxas21002c_core_probe(&spi->dev, regmap, spi->irq, id->name);
}
static void fxas21002c_spi_remove(struct spi_device *spi)
{
fxas21002c_core_remove(&spi->dev);
}
static const struct spi_device_id fxas21002c_spi_id[] = {
{ "fxas21002c", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, fxas21002c_spi_id);
static const struct of_device_id fxas21002c_spi_of_match[] = {
{ .compatible = "nxp,fxas21002c", },
{ }
};
MODULE_DEVICE_TABLE(of, fxas21002c_spi_of_match);
static struct spi_driver fxas21002c_spi_driver = {
.driver = {
.name = "fxas21002c_spi",
.pm = pm_ptr(&fxas21002c_pm_ops),
.of_match_table = fxas21002c_spi_of_match,
},
.probe = fxas21002c_spi_probe,
.remove = fxas21002c_spi_remove,
.id_table = fxas21002c_spi_id,
};
module_spi_driver(fxas21002c_spi_driver);
MODULE_AUTHOR("Rui Miguel Silva <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("FXAS21002C SPI Gyro driver");
MODULE_IMPORT_NS(IIO_FXAS21002C);
| linux-master | drivers/iio/gyro/fxas21002c_spi.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for NXP FXAS21002C Gyroscope - Core
*
* Copyright (C) 2019 Linaro Ltd.
*/
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include "fxas21002c.h"
#define FXAS21002C_CHIP_ID_1 0xD6
#define FXAS21002C_CHIP_ID_2 0xD7
enum fxas21002c_mode_state {
FXAS21002C_MODE_STANDBY,
FXAS21002C_MODE_READY,
FXAS21002C_MODE_ACTIVE,
};
#define FXAS21002C_STANDBY_ACTIVE_TIME_MS 62
#define FXAS21002C_READY_ACTIVE_TIME_MS 7
#define FXAS21002C_ODR_LIST_MAX 10
#define FXAS21002C_SCALE_FRACTIONAL 32
#define FXAS21002C_RANGE_LIMIT_DOUBLE 2000
#define FXAS21002C_AXIS_TO_REG(axis) (FXAS21002C_REG_OUT_X_MSB + ((axis) * 2))
static const struct reg_field fxas21002c_reg_fields[] = {
[F_DR_STATUS] = REG_FIELD(FXAS21002C_REG_STATUS, 0, 7),
[F_OUT_X_MSB] = REG_FIELD(FXAS21002C_REG_OUT_X_MSB, 0, 7),
[F_OUT_X_LSB] = REG_FIELD(FXAS21002C_REG_OUT_X_LSB, 0, 7),
[F_OUT_Y_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_MSB, 0, 7),
[F_OUT_Y_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_LSB, 0, 7),
[F_OUT_Z_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_MSB, 0, 7),
[F_OUT_Z_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_LSB, 0, 7),
[F_ZYX_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 7, 7),
[F_Z_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 6, 6),
[F_Y_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 5, 5),
[F_X_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 4, 4),
[F_ZYX_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 3, 3),
[F_Z_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 2, 2),
[F_Y_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 1, 1),
[F_X_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 0, 0),
[F_OVF] = REG_FIELD(FXAS21002C_REG_F_STATUS, 7, 7),
[F_WMKF] = REG_FIELD(FXAS21002C_REG_F_STATUS, 6, 6),
[F_CNT] = REG_FIELD(FXAS21002C_REG_F_STATUS, 0, 5),
[F_MODE] = REG_FIELD(FXAS21002C_REG_F_SETUP, 6, 7),
[F_WMRK] = REG_FIELD(FXAS21002C_REG_F_SETUP, 0, 5),
[F_EVENT] = REG_FIELD(FXAS21002C_REG_F_EVENT, 5, 5),
[FE_TIME] = REG_FIELD(FXAS21002C_REG_F_EVENT, 0, 4),
[F_BOOTEND] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 3, 3),
[F_SRC_FIFO] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 2, 2),
[F_SRC_RT] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 1, 1),
[F_SRC_DRDY] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 0, 0),
[F_WHO_AM_I] = REG_FIELD(FXAS21002C_REG_WHO_AM_I, 0, 7),
[F_BW] = REG_FIELD(FXAS21002C_REG_CTRL0, 6, 7),
[F_SPIW] = REG_FIELD(FXAS21002C_REG_CTRL0, 5, 5),
[F_SEL] = REG_FIELD(FXAS21002C_REG_CTRL0, 3, 4),
[F_HPF_EN] = REG_FIELD(FXAS21002C_REG_CTRL0, 2, 2),
[F_FS] = REG_FIELD(FXAS21002C_REG_CTRL0, 0, 1),
[F_ELE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 3, 3),
[F_ZTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 2, 2),
[F_YTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 1, 1),
[F_XTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 0, 0),
[F_EA] = REG_FIELD(FXAS21002C_REG_RT_SRC, 6, 6),
[F_ZRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 5, 5),
[F_ZRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 4, 4),
[F_YRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 3, 3),
[F_YRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 2, 2),
[F_XRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 1, 1),
[F_XRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 0),
[F_DBCNTM] = REG_FIELD(FXAS21002C_REG_RT_THS, 7, 7),
[F_THS] = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 6),
[F_RT_COUNT] = REG_FIELD(FXAS21002C_REG_RT_COUNT, 0, 7),
[F_TEMP] = REG_FIELD(FXAS21002C_REG_TEMP, 0, 7),
[F_RST] = REG_FIELD(FXAS21002C_REG_CTRL1, 6, 6),
[F_ST] = REG_FIELD(FXAS21002C_REG_CTRL1, 5, 5),
[F_DR] = REG_FIELD(FXAS21002C_REG_CTRL1, 2, 4),
[F_ACTIVE] = REG_FIELD(FXAS21002C_REG_CTRL1, 1, 1),
[F_READY] = REG_FIELD(FXAS21002C_REG_CTRL1, 0, 0),
[F_INT_CFG_FIFO] = REG_FIELD(FXAS21002C_REG_CTRL2, 7, 7),
[F_INT_EN_FIFO] = REG_FIELD(FXAS21002C_REG_CTRL2, 6, 6),
[F_INT_CFG_RT] = REG_FIELD(FXAS21002C_REG_CTRL2, 5, 5),
[F_INT_EN_RT] = REG_FIELD(FXAS21002C_REG_CTRL2, 4, 4),
[F_INT_CFG_DRDY] = REG_FIELD(FXAS21002C_REG_CTRL2, 3, 3),
[F_INT_EN_DRDY] = REG_FIELD(FXAS21002C_REG_CTRL2, 2, 2),
[F_IPOL] = REG_FIELD(FXAS21002C_REG_CTRL2, 1, 1),
[F_PP_OD] = REG_FIELD(FXAS21002C_REG_CTRL2, 0, 0),
[F_WRAPTOONE] = REG_FIELD(FXAS21002C_REG_CTRL3, 3, 3),
[F_EXTCTRLEN] = REG_FIELD(FXAS21002C_REG_CTRL3, 2, 2),
[F_FS_DOUBLE] = REG_FIELD(FXAS21002C_REG_CTRL3, 0, 0),
};
static const int fxas21002c_odr_values[] = {
800, 400, 200, 100, 50, 25, 12, 12
};
/*
* These values are taken from the low-pass filter cutoff frequency calculated
* ODR * 0.lpf_values. So, for ODR = 800Hz with a lpf value = 0.32
* => LPF cutoff frequency = 800 * 0.32 = 256 Hz
*/
static const int fxas21002c_lpf_values[] = {
32, 16, 8
};
/*
* These values are taken from the high-pass filter cutoff frequency calculated
* ODR * 0.0hpf_values. So, for ODR = 800Hz with a hpf value = 0.018750
* => HPF cutoff frequency = 800 * 0.018750 = 15 Hz
*/
static const int fxas21002c_hpf_values[] = {
18750, 9625, 4875, 2475
};
static const int fxas21002c_range_values[] = {
4000, 2000, 1000, 500, 250
};
struct fxas21002c_data {
u8 chip_id;
enum fxas21002c_mode_state mode;
enum fxas21002c_mode_state prev_mode;
struct mutex lock; /* serialize data access */
struct regmap *regmap;
struct regmap_field *regmap_fields[F_MAX_FIELDS];
struct iio_trigger *dready_trig;
s64 timestamp;
int irq;
struct regulator *vdd;
struct regulator *vddio;
/*
* DMA (thus cache coherency maintenance) may require the
* transfer buffers live in their own cache lines.
*/
s16 buffer[8] __aligned(IIO_DMA_MINALIGN);
};
enum fxas21002c_channel_index {
CHANNEL_SCAN_INDEX_X,
CHANNEL_SCAN_INDEX_Y,
CHANNEL_SCAN_INDEX_Z,
CHANNEL_SCAN_MAX,
};
static int fxas21002c_odr_hz_from_value(struct fxas21002c_data *data, u8 value)
{
int odr_value_max = ARRAY_SIZE(fxas21002c_odr_values) - 1;
value = min_t(u8, value, odr_value_max);
return fxas21002c_odr_values[value];
}
static int fxas21002c_odr_value_from_hz(struct fxas21002c_data *data,
unsigned int hz)
{
int odr_table_size = ARRAY_SIZE(fxas21002c_odr_values);
int i;
for (i = 0; i < odr_table_size; i++)
if (fxas21002c_odr_values[i] == hz)
return i;
return -EINVAL;
}
static int fxas21002c_lpf_bw_from_value(struct fxas21002c_data *data, u8 value)
{
int lpf_value_max = ARRAY_SIZE(fxas21002c_lpf_values) - 1;
value = min_t(u8, value, lpf_value_max);
return fxas21002c_lpf_values[value];
}
static int fxas21002c_lpf_value_from_bw(struct fxas21002c_data *data,
unsigned int hz)
{
int lpf_table_size = ARRAY_SIZE(fxas21002c_lpf_values);
int i;
for (i = 0; i < lpf_table_size; i++)
if (fxas21002c_lpf_values[i] == hz)
return i;
return -EINVAL;
}
static int fxas21002c_hpf_sel_from_value(struct fxas21002c_data *data, u8 value)
{
int hpf_value_max = ARRAY_SIZE(fxas21002c_hpf_values) - 1;
value = min_t(u8, value, hpf_value_max);
return fxas21002c_hpf_values[value];
}
static int fxas21002c_hpf_value_from_sel(struct fxas21002c_data *data,
unsigned int hz)
{
int hpf_table_size = ARRAY_SIZE(fxas21002c_hpf_values);
int i;
for (i = 0; i < hpf_table_size; i++)
if (fxas21002c_hpf_values[i] == hz)
return i;
return -EINVAL;
}
static int fxas21002c_range_fs_from_value(struct fxas21002c_data *data,
u8 value)
{
int range_value_max = ARRAY_SIZE(fxas21002c_range_values) - 1;
unsigned int fs_double;
int ret;
/* We need to check if FS_DOUBLE is enabled to offset the value */
ret = regmap_field_read(data->regmap_fields[F_FS_DOUBLE], &fs_double);
if (ret < 0)
return ret;
if (!fs_double)
value += 1;
value = min_t(u8, value, range_value_max);
return fxas21002c_range_values[value];
}
static int fxas21002c_range_value_from_fs(struct fxas21002c_data *data,
unsigned int range)
{
int range_table_size = ARRAY_SIZE(fxas21002c_range_values);
bool found = false;
int fs_double = 0;
int ret;
int i;
for (i = 0; i < range_table_size; i++)
if (fxas21002c_range_values[i] == range) {
found = true;
break;
}
if (!found)
return -EINVAL;
if (range > FXAS21002C_RANGE_LIMIT_DOUBLE)
fs_double = 1;
ret = regmap_field_write(data->regmap_fields[F_FS_DOUBLE], fs_double);
if (ret < 0)
return ret;
return i;
}
static int fxas21002c_mode_get(struct fxas21002c_data *data)
{
unsigned int active;
unsigned int ready;
int ret;
ret = regmap_field_read(data->regmap_fields[F_ACTIVE], &active);
if (ret < 0)
return ret;
if (active)
return FXAS21002C_MODE_ACTIVE;
ret = regmap_field_read(data->regmap_fields[F_READY], &ready);
if (ret < 0)
return ret;
if (ready)
return FXAS21002C_MODE_READY;
return FXAS21002C_MODE_STANDBY;
}
static int fxas21002c_mode_set(struct fxas21002c_data *data,
enum fxas21002c_mode_state mode)
{
int ret;
if (mode == data->mode)
return 0;
if (mode == FXAS21002C_MODE_READY)
ret = regmap_field_write(data->regmap_fields[F_READY], 1);
else
ret = regmap_field_write(data->regmap_fields[F_READY], 0);
if (ret < 0)
return ret;
if (mode == FXAS21002C_MODE_ACTIVE)
ret = regmap_field_write(data->regmap_fields[F_ACTIVE], 1);
else
ret = regmap_field_write(data->regmap_fields[F_ACTIVE], 0);
if (ret < 0)
return ret;
/* if going to active wait the setup times */
if (mode == FXAS21002C_MODE_ACTIVE &&
data->mode == FXAS21002C_MODE_STANDBY)
msleep_interruptible(FXAS21002C_STANDBY_ACTIVE_TIME_MS);
if (data->mode == FXAS21002C_MODE_READY)
msleep_interruptible(FXAS21002C_READY_ACTIVE_TIME_MS);
data->prev_mode = data->mode;
data->mode = mode;
return ret;
}
static int fxas21002c_write(struct fxas21002c_data *data,
enum fxas21002c_fields field, int bits)
{
int actual_mode;
int ret;
mutex_lock(&data->lock);
actual_mode = fxas21002c_mode_get(data);
if (actual_mode < 0) {
ret = actual_mode;
goto out_unlock;
}
ret = fxas21002c_mode_set(data, FXAS21002C_MODE_READY);
if (ret < 0)
goto out_unlock;
ret = regmap_field_write(data->regmap_fields[field], bits);
if (ret < 0)
goto out_unlock;
ret = fxas21002c_mode_set(data, data->prev_mode);
out_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int fxas21002c_pm_get(struct fxas21002c_data *data)
{
return pm_runtime_resume_and_get(regmap_get_device(data->regmap));
}
static int fxas21002c_pm_put(struct fxas21002c_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
pm_runtime_mark_last_busy(dev);
return pm_runtime_put_autosuspend(dev);
}
static int fxas21002c_temp_get(struct fxas21002c_data *data, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
unsigned int temp;
int ret;
mutex_lock(&data->lock);
ret = fxas21002c_pm_get(data);
if (ret < 0)
goto data_unlock;
ret = regmap_field_read(data->regmap_fields[F_TEMP], &temp);
if (ret < 0) {
dev_err(dev, "failed to read temp: %d\n", ret);
fxas21002c_pm_put(data);
goto data_unlock;
}
*val = sign_extend32(temp, 7);
ret = fxas21002c_pm_put(data);
if (ret < 0)
goto data_unlock;
ret = IIO_VAL_INT;
data_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int fxas21002c_axis_get(struct fxas21002c_data *data,
int index, int *val)
{
struct device *dev = regmap_get_device(data->regmap);
__be16 axis_be;
int ret;
mutex_lock(&data->lock);
ret = fxas21002c_pm_get(data);
if (ret < 0)
goto data_unlock;
ret = regmap_bulk_read(data->regmap, FXAS21002C_AXIS_TO_REG(index),
&axis_be, sizeof(axis_be));
if (ret < 0) {
dev_err(dev, "failed to read axis: %d: %d\n", index, ret);
fxas21002c_pm_put(data);
goto data_unlock;
}
*val = sign_extend32(be16_to_cpu(axis_be), 15);
ret = fxas21002c_pm_put(data);
if (ret < 0)
goto data_unlock;
ret = IIO_VAL_INT;
data_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int fxas21002c_odr_get(struct fxas21002c_data *data, int *odr)
{
unsigned int odr_bits;
int ret;
mutex_lock(&data->lock);
ret = regmap_field_read(data->regmap_fields[F_DR], &odr_bits);
if (ret < 0)
goto data_unlock;
*odr = fxas21002c_odr_hz_from_value(data, odr_bits);
ret = IIO_VAL_INT;
data_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int fxas21002c_odr_set(struct fxas21002c_data *data, int odr)
{
int odr_bits;
odr_bits = fxas21002c_odr_value_from_hz(data, odr);
if (odr_bits < 0)
return odr_bits;
return fxas21002c_write(data, F_DR, odr_bits);
}
static int fxas21002c_lpf_get(struct fxas21002c_data *data, int *val2)
{
unsigned int bw_bits;
int ret;
mutex_lock(&data->lock);
ret = regmap_field_read(data->regmap_fields[F_BW], &bw_bits);
if (ret < 0)
goto data_unlock;
*val2 = fxas21002c_lpf_bw_from_value(data, bw_bits) * 10000;
ret = IIO_VAL_INT_PLUS_MICRO;
data_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int fxas21002c_lpf_set(struct fxas21002c_data *data, int bw)
{
int bw_bits;
int odr;
int ret;
bw_bits = fxas21002c_lpf_value_from_bw(data, bw);
if (bw_bits < 0)
return bw_bits;
/*
* From table 33 of the device spec, for ODR = 25Hz and 12.5 value 0.08
* is not allowed and for ODR = 12.5 value 0.16 is also not allowed
*/
ret = fxas21002c_odr_get(data, &odr);
if (ret < 0)
return -EINVAL;
if ((odr == 25 && bw_bits > 0x01) || (odr == 12 && bw_bits > 0))
return -EINVAL;
return fxas21002c_write(data, F_BW, bw_bits);
}
static int fxas21002c_hpf_get(struct fxas21002c_data *data, int *val2)
{
unsigned int sel_bits;
int ret;
mutex_lock(&data->lock);
ret = regmap_field_read(data->regmap_fields[F_SEL], &sel_bits);
if (ret < 0)
goto data_unlock;
*val2 = fxas21002c_hpf_sel_from_value(data, sel_bits);
ret = IIO_VAL_INT_PLUS_MICRO;
data_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int fxas21002c_hpf_set(struct fxas21002c_data *data, int sel)
{
int sel_bits;
sel_bits = fxas21002c_hpf_value_from_sel(data, sel);
if (sel_bits < 0)
return sel_bits;
return fxas21002c_write(data, F_SEL, sel_bits);
}
static int fxas21002c_scale_get(struct fxas21002c_data *data, int *val)
{
int fs_bits;
int scale;
int ret;
mutex_lock(&data->lock);
ret = regmap_field_read(data->regmap_fields[F_FS], &fs_bits);
if (ret < 0)
goto data_unlock;
scale = fxas21002c_range_fs_from_value(data, fs_bits);
if (scale < 0) {
ret = scale;
goto data_unlock;
}
*val = scale;
data_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int fxas21002c_scale_set(struct fxas21002c_data *data, int range)
{
int fs_bits;
fs_bits = fxas21002c_range_value_from_fs(data, range);
if (fs_bits < 0)
return fs_bits;
return fxas21002c_write(data, F_FS, fs_bits);
}
static int fxas21002c_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct fxas21002c_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
return fxas21002c_temp_get(data, val);
case IIO_ANGL_VEL:
return fxas21002c_axis_get(data, chan->scan_index, val);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val2 = FXAS21002C_SCALE_FRACTIONAL;
ret = fxas21002c_scale_get(data, val);
if (ret < 0)
return ret;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*val = 0;
return fxas21002c_lpf_get(data, val2);
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
*val = 0;
return fxas21002c_hpf_get(data, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
*val2 = 0;
return fxas21002c_odr_get(data, val);
default:
return -EINVAL;
}
}
static int fxas21002c_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
struct fxas21002c_data *data = iio_priv(indio_dev);
int range;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (val2)
return -EINVAL;
return fxas21002c_odr_set(data, val);
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
if (val)
return -EINVAL;
val2 = val2 / 10000;
return fxas21002c_lpf_set(data, val2);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
range = (((val * 1000 + val2 / 1000) *
FXAS21002C_SCALE_FRACTIONAL) / 1000);
return fxas21002c_scale_set(data, range);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
return fxas21002c_hpf_set(data, val2);
default:
return -EINVAL;
}
}
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("12.5 25 50 100 200 400 800");
static IIO_CONST_ATTR(in_anglvel_filter_low_pass_3db_frequency_available,
"0.32 0.16 0.08");
static IIO_CONST_ATTR(in_anglvel_filter_high_pass_3db_frequency_available,
"0.018750 0.009625 0.004875 0.002475");
static IIO_CONST_ATTR(in_anglvel_scale_available,
"125.0 62.5 31.25 15.625 7.8125");
static struct attribute *fxas21002c_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_anglvel_filter_low_pass_3db_frequency_available.dev_attr.attr,
&iio_const_attr_in_anglvel_filter_high_pass_3db_frequency_available.dev_attr.attr,
&iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group fxas21002c_attrs_group = {
.attrs = fxas21002c_attributes,
};
#define FXAS21002C_CHANNEL(_axis) { \
.type = IIO_ANGL_VEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = CHANNEL_SCAN_INDEX_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec fxas21002c_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.scan_index = -1,
},
FXAS21002C_CHANNEL(X),
FXAS21002C_CHANNEL(Y),
FXAS21002C_CHANNEL(Z),
};
static const struct iio_info fxas21002c_info = {
.attrs = &fxas21002c_attrs_group,
.read_raw = &fxas21002c_read_raw,
.write_raw = &fxas21002c_write_raw,
};
static irqreturn_t fxas21002c_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct fxas21002c_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->lock);
ret = regmap_bulk_read(data->regmap, FXAS21002C_REG_OUT_X_MSB,
data->buffer, CHANNEL_SCAN_MAX * sizeof(s16));
if (ret < 0)
goto out_unlock;
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
data->timestamp);
out_unlock:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int fxas21002c_chip_init(struct fxas21002c_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
unsigned int chip_id;
int ret;
ret = regmap_field_read(data->regmap_fields[F_WHO_AM_I], &chip_id);
if (ret < 0)
return ret;
if (chip_id != FXAS21002C_CHIP_ID_1 &&
chip_id != FXAS21002C_CHIP_ID_2) {
dev_err(dev, "chip id 0x%02x is not supported\n", chip_id);
return -EINVAL;
}
data->chip_id = chip_id;
ret = fxas21002c_mode_set(data, FXAS21002C_MODE_STANDBY);
if (ret < 0)
return ret;
/* Set ODR to 200HZ as default */
ret = fxas21002c_odr_set(data, 200);
if (ret < 0)
dev_err(dev, "failed to set ODR: %d\n", ret);
return ret;
}
static int fxas21002c_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct fxas21002c_data *data = iio_priv(indio_dev);
return regmap_field_write(data->regmap_fields[F_INT_EN_DRDY], state);
}
static const struct iio_trigger_ops fxas21002c_trigger_ops = {
.set_trigger_state = &fxas21002c_data_rdy_trigger_set_state,
};
static irqreturn_t fxas21002c_data_rdy_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct fxas21002c_data *data = iio_priv(indio_dev);
data->timestamp = iio_get_time_ns(indio_dev);
return IRQ_WAKE_THREAD;
}
static irqreturn_t fxas21002c_data_rdy_thread(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct fxas21002c_data *data = iio_priv(indio_dev);
unsigned int data_ready;
int ret;
ret = regmap_field_read(data->regmap_fields[F_SRC_DRDY], &data_ready);
if (ret < 0)
return IRQ_NONE;
if (!data_ready)
return IRQ_NONE;
iio_trigger_poll_nested(data->dready_trig);
return IRQ_HANDLED;
}
static int fxas21002c_trigger_probe(struct fxas21002c_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
struct iio_dev *indio_dev = dev_get_drvdata(dev);
unsigned long irq_trig;
bool irq_open_drain;
int irq1;
int ret;
if (!data->irq)
return 0;
irq1 = fwnode_irq_get_byname(dev_fwnode(dev), "INT1");
if (irq1 == data->irq) {
dev_info(dev, "using interrupt line INT1\n");
ret = regmap_field_write(data->regmap_fields[F_INT_CFG_DRDY],
1);
if (ret < 0)
return ret;
}
dev_info(dev, "using interrupt line INT2\n");
irq_open_drain = device_property_read_bool(dev, "drive-open-drain");
data->dready_trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig)
return -ENOMEM;
irq_trig = irqd_get_trigger_type(irq_get_irq_data(data->irq));
if (irq_trig == IRQF_TRIGGER_RISING) {
ret = regmap_field_write(data->regmap_fields[F_IPOL], 1);
if (ret < 0)
return ret;
}
if (irq_open_drain)
irq_trig |= IRQF_SHARED;
ret = devm_request_threaded_irq(dev, data->irq,
fxas21002c_data_rdy_handler,
fxas21002c_data_rdy_thread,
irq_trig, "fxas21002c_data_ready",
indio_dev);
if (ret < 0)
return ret;
data->dready_trig->ops = &fxas21002c_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
return devm_iio_trigger_register(dev, data->dready_trig);
}
static int fxas21002c_power_enable(struct fxas21002c_data *data)
{
int ret;
ret = regulator_enable(data->vdd);
if (ret < 0)
return ret;
ret = regulator_enable(data->vddio);
if (ret < 0) {
regulator_disable(data->vdd);
return ret;
}
return 0;
}
static void fxas21002c_power_disable(struct fxas21002c_data *data)
{
regulator_disable(data->vdd);
regulator_disable(data->vddio);
}
static void fxas21002c_power_disable_action(void *_data)
{
struct fxas21002c_data *data = _data;
fxas21002c_power_disable(data);
}
static int fxas21002c_regulators_get(struct fxas21002c_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
data->vdd = devm_regulator_get(dev->parent, "vdd");
if (IS_ERR(data->vdd))
return PTR_ERR(data->vdd);
data->vddio = devm_regulator_get(dev->parent, "vddio");
return PTR_ERR_OR_ZERO(data->vddio);
}
int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq,
const char *name)
{
struct fxas21002c_data *data;
struct iio_dev *indio_dev;
struct regmap_field *f;
int i;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->irq = irq;
data->regmap = regmap;
for (i = 0; i < F_MAX_FIELDS; i++) {
f = devm_regmap_field_alloc(dev, data->regmap,
fxas21002c_reg_fields[i]);
if (IS_ERR(f))
return PTR_ERR(f);
data->regmap_fields[i] = f;
}
mutex_init(&data->lock);
ret = fxas21002c_regulators_get(data);
if (ret < 0)
return ret;
ret = fxas21002c_power_enable(data);
if (ret < 0)
return ret;
ret = devm_add_action_or_reset(dev, fxas21002c_power_disable_action,
data);
if (ret < 0)
return ret;
ret = fxas21002c_chip_init(data);
if (ret < 0)
return ret;
indio_dev->channels = fxas21002c_channels;
indio_dev->num_channels = ARRAY_SIZE(fxas21002c_channels);
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &fxas21002c_info;
ret = fxas21002c_trigger_probe(data);
if (ret < 0)
return ret;
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
fxas21002c_trigger_handler, NULL);
if (ret < 0)
return ret;
ret = pm_runtime_set_active(dev);
if (ret)
return ret;
pm_runtime_enable(dev);
pm_runtime_set_autosuspend_delay(dev, 2000);
pm_runtime_use_autosuspend(dev);
ret = iio_device_register(indio_dev);
if (ret < 0)
goto pm_disable;
return 0;
pm_disable:
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
return ret;
}
EXPORT_SYMBOL_NS_GPL(fxas21002c_core_probe, IIO_FXAS21002C);
void fxas21002c_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
}
EXPORT_SYMBOL_NS_GPL(fxas21002c_core_remove, IIO_FXAS21002C);
static int fxas21002c_suspend(struct device *dev)
{
struct fxas21002c_data *data = iio_priv(dev_get_drvdata(dev));
fxas21002c_mode_set(data, FXAS21002C_MODE_STANDBY);
fxas21002c_power_disable(data);
return 0;
}
static int fxas21002c_resume(struct device *dev)
{
struct fxas21002c_data *data = iio_priv(dev_get_drvdata(dev));
int ret;
ret = fxas21002c_power_enable(data);
if (ret < 0)
return ret;
return fxas21002c_mode_set(data, data->prev_mode);
}
static int fxas21002c_runtime_suspend(struct device *dev)
{
struct fxas21002c_data *data = iio_priv(dev_get_drvdata(dev));
return fxas21002c_mode_set(data, FXAS21002C_MODE_READY);
}
static int fxas21002c_runtime_resume(struct device *dev)
{
struct fxas21002c_data *data = iio_priv(dev_get_drvdata(dev));
return fxas21002c_mode_set(data, FXAS21002C_MODE_ACTIVE);
}
EXPORT_NS_GPL_DEV_PM_OPS(fxas21002c_pm_ops, IIO_FXAS21002C) = {
SYSTEM_SLEEP_PM_OPS(fxas21002c_suspend, fxas21002c_resume)
RUNTIME_PM_OPS(fxas21002c_runtime_suspend, fxas21002c_runtime_resume,
NULL)
};
MODULE_AUTHOR("Rui Miguel Silva <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("FXAS21002C Gyro driver");
| linux-master | drivers/iio/gyro/fxas21002c_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics gyroscopes driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors.h>
#include <linux/iio/common/st_sensors_spi.h>
#include "st_gyro.h"
/*
* For new single-chip sensors use <device_name> as compatible string.
* For old single-chip devices keep <device_name>-gyro to maintain
* compatibility
*/
static const struct of_device_id st_gyro_of_match[] = {
{
.compatible = "st,l3g4200d-gyro",
.data = L3G4200D_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330d-gyro",
.data = LSM330D_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330dl-gyro",
.data = LSM330DL_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330dlc-gyro",
.data = LSM330DLC_GYRO_DEV_NAME,
},
{
.compatible = "st,l3gd20-gyro",
.data = L3GD20_GYRO_DEV_NAME,
},
{
.compatible = "st,l3gd20h-gyro",
.data = L3GD20H_GYRO_DEV_NAME,
},
{
.compatible = "st,l3g4is-gyro",
.data = L3G4IS_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330-gyro",
.data = LSM330_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm9ds0-gyro",
.data = LSM9DS0_GYRO_DEV_NAME,
},
{},
};
MODULE_DEVICE_TABLE(of, st_gyro_of_match);
static int st_gyro_spi_probe(struct spi_device *spi)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *gdata;
struct iio_dev *indio_dev;
int err;
st_sensors_dev_name_probe(&spi->dev, spi->modalias, sizeof(spi->modalias));
settings = st_gyro_get_settings(spi->modalias);
if (!settings) {
dev_err(&spi->dev, "device name %s not recognized.\n",
spi->modalias);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*gdata));
if (!indio_dev)
return -ENOMEM;
gdata = iio_priv(indio_dev);
gdata->sensor_settings = (struct st_sensor_settings *)settings;
err = st_sensors_spi_configure(indio_dev, spi);
if (err < 0)
return err;
err = st_sensors_power_enable(indio_dev);
if (err)
return err;
return st_gyro_common_probe(indio_dev);
}
static const struct spi_device_id st_gyro_id_table[] = {
{ L3G4200D_GYRO_DEV_NAME },
{ LSM330D_GYRO_DEV_NAME },
{ LSM330DL_GYRO_DEV_NAME },
{ LSM330DLC_GYRO_DEV_NAME },
{ L3GD20_GYRO_DEV_NAME },
{ L3GD20H_GYRO_DEV_NAME },
{ L3G4IS_GYRO_DEV_NAME },
{ LSM330_GYRO_DEV_NAME },
{ LSM9DS0_GYRO_DEV_NAME },
{},
};
MODULE_DEVICE_TABLE(spi, st_gyro_id_table);
static struct spi_driver st_gyro_driver = {
.driver = {
.name = "st-gyro-spi",
.of_match_table = st_gyro_of_match,
},
.probe = st_gyro_spi_probe,
.id_table = st_gyro_id_table,
};
module_spi_driver(st_gyro_driver);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics gyroscopes spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/gyro/st_gyro_spi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADIS16080/100 Yaw Rate Gyroscope with SPI driver
*
* Copyright 2010 Analog Devices Inc.
*/
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define ADIS16080_DIN_GYRO (0 << 10) /* Gyroscope output */
#define ADIS16080_DIN_TEMP (1 << 10) /* Temperature output */
#define ADIS16080_DIN_AIN1 (2 << 10)
#define ADIS16080_DIN_AIN2 (3 << 10)
/*
* 1: Write contents on DIN to control register.
* 0: No changes to control register.
*/
#define ADIS16080_DIN_WRITE (1 << 15)
struct adis16080_chip_info {
int scale_val;
int scale_val2;
};
/**
* struct adis16080_state - device instance specific data
* @us: actual spi_device to write data
* @info: chip specific parameters
* @buf: transmit or receive buffer
* @lock: lock to protect buffer during reads
**/
struct adis16080_state {
struct spi_device *us;
const struct adis16080_chip_info *info;
struct mutex lock;
__be16 buf __aligned(IIO_DMA_MINALIGN);
};
static int adis16080_read_sample(struct iio_dev *indio_dev,
u16 addr, int *val)
{
struct adis16080_state *st = iio_priv(indio_dev);
int ret;
struct spi_transfer t[] = {
{
.tx_buf = &st->buf,
.len = 2,
.cs_change = 1,
}, {
.rx_buf = &st->buf,
.len = 2,
},
};
st->buf = cpu_to_be16(addr | ADIS16080_DIN_WRITE);
ret = spi_sync_transfer(st->us, t, ARRAY_SIZE(t));
if (ret == 0)
*val = sign_extend32(be16_to_cpu(st->buf), 11);
return ret;
}
static int adis16080_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long mask)
{
struct adis16080_state *st = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&st->lock);
ret = adis16080_read_sample(indio_dev, chan->address, val);
mutex_unlock(&st->lock);
return ret ? ret : IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = st->info->scale_val;
*val2 = st->info->scale_val2;
return IIO_VAL_FRACTIONAL;
case IIO_VOLTAGE:
/* VREF = 5V, 12 bits */
*val = 5000;
*val2 = 12;
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_TEMP:
/* 85 C = 585, 25 C = 0 */
*val = 85000 - 25000;
*val2 = 585;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_VOLTAGE:
/* 2.5 V = 0 */
*val = 2048;
return IIO_VAL_INT;
case IIO_TEMP:
/* 85 C = 585, 25 C = 0 */
*val = DIV_ROUND_CLOSEST(25 * 585, 85 - 25);
return IIO_VAL_INT;
default:
return -EINVAL;
}
default:
break;
}
return -EINVAL;
}
static const struct iio_chan_spec adis16080_channels[] = {
{
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.address = ADIS16080_DIN_GYRO,
}, {
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.address = ADIS16080_DIN_AIN1,
}, {
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = 1,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.address = ADIS16080_DIN_AIN2,
}, {
.type = IIO_TEMP,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.address = ADIS16080_DIN_TEMP,
}
};
static const struct iio_info adis16080_info = {
.read_raw = &adis16080_read_raw,
};
enum {
ID_ADIS16080,
ID_ADIS16100,
};
static const struct adis16080_chip_info adis16080_chip_info[] = {
[ID_ADIS16080] = {
/* 80 degree = 819, 819 rad = 46925 degree */
.scale_val = 80,
.scale_val2 = 46925,
},
[ID_ADIS16100] = {
/* 300 degree = 1230, 1230 rad = 70474 degree */
.scale_val = 300,
.scale_val2 = 70474,
},
};
static int adis16080_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct adis16080_state *st;
struct iio_dev *indio_dev;
/* setup the industrialio driver allocated elements */
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
mutex_init(&st->lock);
/* Allocate the comms buffers */
st->us = spi;
st->info = &adis16080_chip_info[id->driver_data];
indio_dev->name = spi->dev.driver->name;
indio_dev->channels = adis16080_channels;
indio_dev->num_channels = ARRAY_SIZE(adis16080_channels);
indio_dev->info = &adis16080_info;
indio_dev->modes = INDIO_DIRECT_MODE;
return devm_iio_device_register(&spi->dev, indio_dev);
}
static const struct spi_device_id adis16080_ids[] = {
{ "adis16080", ID_ADIS16080 },
{ "adis16100", ID_ADIS16100 },
{},
};
MODULE_DEVICE_TABLE(spi, adis16080_ids);
static struct spi_driver adis16080_driver = {
.driver = {
.name = "adis16080",
},
.probe = adis16080_probe,
.id_table = adis16080_ids,
};
module_spi_driver(adis16080_driver);
MODULE_AUTHOR("Barry Song <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16080/100 Yaw Rate Gyroscope Driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/gyro/adis16080.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADXRS290 SPI Gyroscope Driver
*
* Copyright (C) 2020 Nishant Malpani <[email protected]>
* Copyright (C) 2020 Analog Devices, Inc.
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define ADXRS290_ADI_ID 0xAD
#define ADXRS290_MEMS_ID 0x1D
#define ADXRS290_DEV_ID 0x92
#define ADXRS290_REG_ADI_ID 0x00
#define ADXRS290_REG_MEMS_ID 0x01
#define ADXRS290_REG_DEV_ID 0x02
#define ADXRS290_REG_REV_ID 0x03
#define ADXRS290_REG_SN0 0x04 /* Serial Number Registers, 4 bytes */
#define ADXRS290_REG_DATAX0 0x08 /* Roll Rate o/p Data Regs, 2 bytes */
#define ADXRS290_REG_DATAY0 0x0A /* Pitch Rate o/p Data Regs, 2 bytes */
#define ADXRS290_REG_TEMP0 0x0C
#define ADXRS290_REG_POWER_CTL 0x10
#define ADXRS290_REG_FILTER 0x11
#define ADXRS290_REG_DATA_RDY 0x12
#define ADXRS290_READ BIT(7)
#define ADXRS290_TSM BIT(0)
#define ADXRS290_MEASUREMENT BIT(1)
#define ADXRS290_DATA_RDY_OUT BIT(0)
#define ADXRS290_SYNC_MASK GENMASK(1, 0)
#define ADXRS290_SYNC(x) FIELD_PREP(ADXRS290_SYNC_MASK, x)
#define ADXRS290_LPF_MASK GENMASK(2, 0)
#define ADXRS290_LPF(x) FIELD_PREP(ADXRS290_LPF_MASK, x)
#define ADXRS290_HPF_MASK GENMASK(7, 4)
#define ADXRS290_HPF(x) FIELD_PREP(ADXRS290_HPF_MASK, x)
#define ADXRS290_READ_REG(reg) (ADXRS290_READ | (reg))
#define ADXRS290_MAX_TRANSITION_TIME_MS 100
enum adxrs290_mode {
ADXRS290_MODE_STANDBY,
ADXRS290_MODE_MEASUREMENT,
};
enum adxrs290_scan_index {
ADXRS290_IDX_X,
ADXRS290_IDX_Y,
ADXRS290_IDX_TEMP,
ADXRS290_IDX_TS,
};
struct adxrs290_state {
struct spi_device *spi;
/* Serialize reads and their subsequent processing */
struct mutex lock;
enum adxrs290_mode mode;
unsigned int lpf_3db_freq_idx;
unsigned int hpf_3db_freq_idx;
struct iio_trigger *dready_trig;
/* Ensure correct alignment of timestamp when present */
struct {
s16 channels[3];
s64 ts __aligned(8);
} buffer;
};
/*
* Available cut-off frequencies of the low pass filter in Hz.
* The integer part and fractional part are represented separately.
*/
static const int adxrs290_lpf_3db_freq_hz_table[][2] = {
[0] = {480, 0},
[1] = {320, 0},
[2] = {160, 0},
[3] = {80, 0},
[4] = {56, 600000},
[5] = {40, 0},
[6] = {28, 300000},
[7] = {20, 0},
};
/*
* Available cut-off frequencies of the high pass filter in Hz.
* The integer part and fractional part are represented separately.
*/
static const int adxrs290_hpf_3db_freq_hz_table[][2] = {
[0] = {0, 0},
[1] = {0, 11000},
[2] = {0, 22000},
[3] = {0, 44000},
[4] = {0, 87000},
[5] = {0, 175000},
[6] = {0, 350000},
[7] = {0, 700000},
[8] = {1, 400000},
[9] = {2, 800000},
[10] = {11, 300000},
};
static int adxrs290_get_rate_data(struct iio_dev *indio_dev, const u8 cmd, int *val)
{
struct adxrs290_state *st = iio_priv(indio_dev);
int ret = 0;
int temp;
mutex_lock(&st->lock);
temp = spi_w8r16(st->spi, cmd);
if (temp < 0) {
ret = temp;
goto err_unlock;
}
*val = sign_extend32(temp, 15);
err_unlock:
mutex_unlock(&st->lock);
return ret;
}
static int adxrs290_get_temp_data(struct iio_dev *indio_dev, int *val)
{
const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_TEMP0);
struct adxrs290_state *st = iio_priv(indio_dev);
int ret = 0;
int temp;
mutex_lock(&st->lock);
temp = spi_w8r16(st->spi, cmd);
if (temp < 0) {
ret = temp;
goto err_unlock;
}
/* extract lower 12 bits temperature reading */
*val = sign_extend32(temp, 11);
err_unlock:
mutex_unlock(&st->lock);
return ret;
}
static int adxrs290_get_3db_freq(struct iio_dev *indio_dev, u8 *val, u8 *val2)
{
const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_FILTER);
struct adxrs290_state *st = iio_priv(indio_dev);
int ret = 0;
short temp;
mutex_lock(&st->lock);
temp = spi_w8r8(st->spi, cmd);
if (temp < 0) {
ret = temp;
goto err_unlock;
}
*val = FIELD_GET(ADXRS290_LPF_MASK, temp);
*val2 = FIELD_GET(ADXRS290_HPF_MASK, temp);
err_unlock:
mutex_unlock(&st->lock);
return ret;
}
static int adxrs290_spi_write_reg(struct spi_device *spi, const u8 reg,
const u8 val)
{
u8 buf[2];
buf[0] = reg;
buf[1] = val;
return spi_write_then_read(spi, buf, ARRAY_SIZE(buf), NULL, 0);
}
static int adxrs290_find_match(const int (*freq_tbl)[2], const int n,
const int val, const int val2)
{
int i;
for (i = 0; i < n; i++) {
if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
return i;
}
return -EINVAL;
}
static int adxrs290_set_filter_freq(struct iio_dev *indio_dev,
const unsigned int lpf_idx,
const unsigned int hpf_idx)
{
struct adxrs290_state *st = iio_priv(indio_dev);
u8 val;
val = ADXRS290_HPF(hpf_idx) | ADXRS290_LPF(lpf_idx);
return adxrs290_spi_write_reg(st->spi, ADXRS290_REG_FILTER, val);
}
static int adxrs290_set_mode(struct iio_dev *indio_dev, enum adxrs290_mode mode)
{
struct adxrs290_state *st = iio_priv(indio_dev);
int val, ret;
if (st->mode == mode)
return 0;
mutex_lock(&st->lock);
ret = spi_w8r8(st->spi, ADXRS290_READ_REG(ADXRS290_REG_POWER_CTL));
if (ret < 0)
goto out_unlock;
val = ret;
switch (mode) {
case ADXRS290_MODE_STANDBY:
val &= ~ADXRS290_MEASUREMENT;
break;
case ADXRS290_MODE_MEASUREMENT:
val |= ADXRS290_MEASUREMENT;
break;
default:
ret = -EINVAL;
goto out_unlock;
}
ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_POWER_CTL, val);
if (ret < 0) {
dev_err(&st->spi->dev, "unable to set mode: %d\n", ret);
goto out_unlock;
}
/* update cached mode */
st->mode = mode;
out_unlock:
mutex_unlock(&st->lock);
return ret;
}
static void adxrs290_chip_off_action(void *data)
{
struct iio_dev *indio_dev = data;
adxrs290_set_mode(indio_dev, ADXRS290_MODE_STANDBY);
}
static int adxrs290_initial_setup(struct iio_dev *indio_dev)
{
struct adxrs290_state *st = iio_priv(indio_dev);
struct spi_device *spi = st->spi;
int ret;
ret = adxrs290_spi_write_reg(spi, ADXRS290_REG_POWER_CTL,
ADXRS290_MEASUREMENT | ADXRS290_TSM);
if (ret < 0)
return ret;
st->mode = ADXRS290_MODE_MEASUREMENT;
return devm_add_action_or_reset(&spi->dev, adxrs290_chip_off_action,
indio_dev);
}
static int adxrs290_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long mask)
{
struct adxrs290_state *st = iio_priv(indio_dev);
unsigned int t;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
switch (chan->type) {
case IIO_ANGL_VEL:
ret = adxrs290_get_rate_data(indio_dev,
ADXRS290_READ_REG(chan->address),
val);
if (ret < 0)
break;
ret = IIO_VAL_INT;
break;
case IIO_TEMP:
ret = adxrs290_get_temp_data(indio_dev, val);
if (ret < 0)
break;
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
break;
}
iio_device_release_direct_mode(indio_dev);
return ret;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
/* 1 LSB = 0.005 degrees/sec */
*val = 0;
*val2 = 87266;
return IIO_VAL_INT_PLUS_NANO;
case IIO_TEMP:
/* 1 LSB = 0.1 degrees Celsius */
*val = 100;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
switch (chan->type) {
case IIO_ANGL_VEL:
t = st->lpf_3db_freq_idx;
*val = adxrs290_lpf_3db_freq_hz_table[t][0];
*val2 = adxrs290_lpf_3db_freq_hz_table[t][1];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
switch (chan->type) {
case IIO_ANGL_VEL:
t = st->hpf_3db_freq_idx;
*val = adxrs290_hpf_3db_freq_hz_table[t][0];
*val2 = adxrs290_hpf_3db_freq_hz_table[t][1];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
return -EINVAL;
}
static int adxrs290_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct adxrs290_state *st = iio_priv(indio_dev);
int ret, lpf_idx, hpf_idx;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
switch (mask) {
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
lpf_idx = adxrs290_find_match(adxrs290_lpf_3db_freq_hz_table,
ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table),
val, val2);
if (lpf_idx < 0) {
ret = -EINVAL;
break;
}
/* caching the updated state of the low-pass filter */
st->lpf_3db_freq_idx = lpf_idx;
/* retrieving the current state of the high-pass filter */
hpf_idx = st->hpf_3db_freq_idx;
ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
break;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
hpf_idx = adxrs290_find_match(adxrs290_hpf_3db_freq_hz_table,
ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table),
val, val2);
if (hpf_idx < 0) {
ret = -EINVAL;
break;
}
/* caching the updated state of the high-pass filter */
st->hpf_3db_freq_idx = hpf_idx;
/* retrieving the current state of the low-pass filter */
lpf_idx = st->lpf_3db_freq_idx;
ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
break;
default:
ret = -EINVAL;
break;
}
iio_device_release_direct_mode(indio_dev);
return ret;
}
static int adxrs290_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*vals = (const int *)adxrs290_lpf_3db_freq_hz_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* Values are stored in a 2D matrix */
*length = ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table) * 2;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
*vals = (const int *)adxrs290_hpf_3db_freq_hz_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* Values are stored in a 2D matrix */
*length = ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table) * 2;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int adxrs290_reg_access_rw(struct spi_device *spi, unsigned int reg,
unsigned int *readval)
{
int ret;
ret = spi_w8r8(spi, ADXRS290_READ_REG(reg));
if (ret < 0)
return ret;
*readval = ret;
return 0;
}
static int adxrs290_reg_access(struct iio_dev *indio_dev, unsigned int reg,
unsigned int writeval, unsigned int *readval)
{
struct adxrs290_state *st = iio_priv(indio_dev);
if (readval)
return adxrs290_reg_access_rw(st->spi, reg, readval);
else
return adxrs290_spi_write_reg(st->spi, reg, writeval);
}
static int adxrs290_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct adxrs290_state *st = iio_priv(indio_dev);
int ret;
u8 val;
val = state ? ADXRS290_SYNC(ADXRS290_DATA_RDY_OUT) : 0;
ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_DATA_RDY, val);
if (ret < 0)
dev_err(&st->spi->dev, "failed to start data rdy interrupt\n");
return ret;
}
static void adxrs290_reset_trig(struct iio_trigger *trig)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
int val;
/*
* Data ready interrupt is reset after a read of the data registers.
* Here, we only read the 16b DATAY registers as that marks the end of
* a read of the data registers and initiates a reset for the interrupt
* line.
*/
adxrs290_get_rate_data(indio_dev,
ADXRS290_READ_REG(ADXRS290_REG_DATAY0), &val);
}
static const struct iio_trigger_ops adxrs290_trigger_ops = {
.set_trigger_state = &adxrs290_data_rdy_trigger_set_state,
.validate_device = &iio_trigger_validate_own_device,
.reenable = &adxrs290_reset_trig,
};
static irqreturn_t adxrs290_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adxrs290_state *st = iio_priv(indio_dev);
u8 tx = ADXRS290_READ_REG(ADXRS290_REG_DATAX0);
int ret;
mutex_lock(&st->lock);
/* exercise a bulk data capture starting from reg DATAX0... */
ret = spi_write_then_read(st->spi, &tx, sizeof(tx), st->buffer.channels,
sizeof(st->buffer.channels));
if (ret < 0)
goto out_unlock_notify;
iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer,
pf->timestamp);
out_unlock_notify:
mutex_unlock(&st->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
#define ADXRS290_ANGL_VEL_CHANNEL(reg, axis) { \
.type = IIO_ANGL_VEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = ADXRS290_IDX_##axis, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
}
static const struct iio_chan_spec adxrs290_channels[] = {
ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAX0, X),
ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAY0, Y),
{
.type = IIO_TEMP,
.address = ADXRS290_REG_TEMP0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.scan_index = ADXRS290_IDX_TEMP,
.scan_type = {
.sign = 's',
.realbits = 12,
.storagebits = 16,
.endianness = IIO_LE,
},
},
IIO_CHAN_SOFT_TIMESTAMP(ADXRS290_IDX_TS),
};
static const unsigned long adxrs290_avail_scan_masks[] = {
BIT(ADXRS290_IDX_X) | BIT(ADXRS290_IDX_Y) | BIT(ADXRS290_IDX_TEMP),
0
};
static const struct iio_info adxrs290_info = {
.read_raw = &adxrs290_read_raw,
.write_raw = &adxrs290_write_raw,
.read_avail = &adxrs290_read_avail,
.debugfs_reg_access = &adxrs290_reg_access,
};
static int adxrs290_probe_trigger(struct iio_dev *indio_dev)
{
struct adxrs290_state *st = iio_priv(indio_dev);
int ret;
if (!st->spi->irq) {
dev_info(&st->spi->dev, "no irq, using polling\n");
return 0;
}
st->dready_trig = devm_iio_trigger_alloc(&st->spi->dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!st->dready_trig)
return -ENOMEM;
st->dready_trig->ops = &adxrs290_trigger_ops;
iio_trigger_set_drvdata(st->dready_trig, indio_dev);
ret = devm_request_irq(&st->spi->dev, st->spi->irq,
&iio_trigger_generic_data_rdy_poll,
IRQF_ONESHOT, "adxrs290_irq", st->dready_trig);
if (ret < 0)
return dev_err_probe(&st->spi->dev, ret,
"request irq %d failed\n", st->spi->irq);
ret = devm_iio_trigger_register(&st->spi->dev, st->dready_trig);
if (ret) {
dev_err(&st->spi->dev, "iio trigger register failed\n");
return ret;
}
indio_dev->trig = iio_trigger_get(st->dready_trig);
return 0;
}
static int adxrs290_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adxrs290_state *st;
u8 val, val2;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->spi = spi;
indio_dev->name = "adxrs290";
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = adxrs290_channels;
indio_dev->num_channels = ARRAY_SIZE(adxrs290_channels);
indio_dev->info = &adxrs290_info;
indio_dev->available_scan_masks = adxrs290_avail_scan_masks;
mutex_init(&st->lock);
val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_ADI_ID));
if (val != ADXRS290_ADI_ID) {
dev_err(&spi->dev, "Wrong ADI ID 0x%02x\n", val);
return -ENODEV;
}
val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_MEMS_ID));
if (val != ADXRS290_MEMS_ID) {
dev_err(&spi->dev, "Wrong MEMS ID 0x%02x\n", val);
return -ENODEV;
}
val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_DEV_ID));
if (val != ADXRS290_DEV_ID) {
dev_err(&spi->dev, "Wrong DEV ID 0x%02x\n", val);
return -ENODEV;
}
/* default mode the gyroscope starts in */
st->mode = ADXRS290_MODE_STANDBY;
/* switch to measurement mode and switch on the temperature sensor */
ret = adxrs290_initial_setup(indio_dev);
if (ret < 0)
return ret;
/* max transition time to measurement mode */
msleep(ADXRS290_MAX_TRANSITION_TIME_MS);
ret = adxrs290_get_3db_freq(indio_dev, &val, &val2);
if (ret < 0)
return ret;
st->lpf_3db_freq_idx = val;
st->hpf_3db_freq_idx = val2;
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
&iio_pollfunc_store_time,
&adxrs290_trigger_handler, NULL);
if (ret < 0)
return dev_err_probe(&spi->dev, ret,
"iio triggered buffer setup failed\n");
ret = adxrs290_probe_trigger(indio_dev);
if (ret < 0)
return ret;
return devm_iio_device_register(&spi->dev, indio_dev);
}
static const struct of_device_id adxrs290_of_match[] = {
{ .compatible = "adi,adxrs290" },
{ }
};
MODULE_DEVICE_TABLE(of, adxrs290_of_match);
static struct spi_driver adxrs290_driver = {
.driver = {
.name = "adxrs290",
.of_match_table = adxrs290_of_match,
},
.probe = adxrs290_probe,
};
module_spi_driver(adxrs290_driver);
MODULE_AUTHOR("Nishant Malpani <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADXRS290 Gyroscope SPI driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/gyro/adxrs290.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2012, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/slab.h>
#include <linux/hid-sensor-hub.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include "../common/hid-sensors/hid-sensor-trigger.h"
enum gyro_3d_channel {
CHANNEL_SCAN_INDEX_X,
CHANNEL_SCAN_INDEX_Y,
CHANNEL_SCAN_INDEX_Z,
GYRO_3D_CHANNEL_MAX,
};
#define CHANNEL_SCAN_INDEX_TIMESTAMP GYRO_3D_CHANNEL_MAX
struct gyro_3d_state {
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info gyro[GYRO_3D_CHANNEL_MAX];
struct {
u32 gyro_val[GYRO_3D_CHANNEL_MAX];
u64 timestamp __aligned(8);
} scan;
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
s64 timestamp;
};
static const u32 gyro_3d_addresses[GYRO_3D_CHANNEL_MAX] = {
HID_USAGE_SENSOR_ANGL_VELOCITY_X_AXIS,
HID_USAGE_SENSOR_ANGL_VELOCITY_Y_AXIS,
HID_USAGE_SENSOR_ANGL_VELOCITY_Z_AXIS
};
static const u32 gryo_3d_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ANGL_VELOCITY,
};
/* Channel definitions */
static const struct iio_chan_spec gyro_3d_channels[] = {
{
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_X,
}, {
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_Y,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Y,
}, {
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Z,
},
IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP)
};
/* Adjust channel real bits based on report descriptor */
static void gyro_3d_adjust_channel_bit_mask(struct iio_chan_spec *channels,
int channel, int size)
{
channels[channel].scan_type.sign = 's';
/* Real storage bits will change based on the report desc. */
channels[channel].scan_type.realbits = size * 8;
/* Maximum size of a sample to capture is u32 */
channels[channel].scan_type.storagebits = sizeof(u32) * 8;
}
/* Channel read_raw handler */
static int gyro_3d_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct gyro_3d_state *gyro_state = iio_priv(indio_dev);
int report_id = -1;
u32 address;
int ret_type;
s32 min;
*val = 0;
*val2 = 0;
switch (mask) {
case IIO_CHAN_INFO_RAW:
hid_sensor_power_state(&gyro_state->common_attributes, true);
report_id = gyro_state->gyro[chan->scan_index].report_id;
min = gyro_state->gyro[chan->scan_index].logical_minimum;
address = gyro_3d_addresses[chan->scan_index];
if (report_id >= 0)
*val = sensor_hub_input_attr_get_raw_value(
gyro_state->common_attributes.hsdev,
HID_USAGE_SENSOR_GYRO_3D, address,
report_id,
SENSOR_HUB_SYNC,
min < 0);
else {
*val = 0;
hid_sensor_power_state(&gyro_state->common_attributes,
false);
return -EINVAL;
}
hid_sensor_power_state(&gyro_state->common_attributes, false);
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
*val = gyro_state->scale_pre_decml;
*val2 = gyro_state->scale_post_decml;
ret_type = gyro_state->scale_precision;
break;
case IIO_CHAN_INFO_OFFSET:
*val = gyro_state->value_offset;
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SAMP_FREQ:
ret_type = hid_sensor_read_samp_freq_value(
&gyro_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret_type = hid_sensor_read_raw_hyst_value(
&gyro_state->common_attributes, val, val2);
break;
default:
ret_type = -EINVAL;
break;
}
return ret_type;
}
/* Channel write_raw handler */
static int gyro_3d_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct gyro_3d_state *gyro_state = iio_priv(indio_dev);
int ret = 0;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = hid_sensor_write_samp_freq_value(
&gyro_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret = hid_sensor_write_raw_hyst_value(
&gyro_state->common_attributes, val, val2);
break;
default:
ret = -EINVAL;
}
return ret;
}
static const struct iio_info gyro_3d_info = {
.read_raw = &gyro_3d_read_raw,
.write_raw = &gyro_3d_write_raw,
};
/* Callback handler to send event after all samples are received and captured */
static int gyro_3d_proc_event(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct gyro_3d_state *gyro_state = iio_priv(indio_dev);
dev_dbg(&indio_dev->dev, "gyro_3d_proc_event\n");
if (atomic_read(&gyro_state->common_attributes.data_ready)) {
if (!gyro_state->timestamp)
gyro_state->timestamp = iio_get_time_ns(indio_dev);
iio_push_to_buffers_with_timestamp(indio_dev, &gyro_state->scan,
gyro_state->timestamp);
gyro_state->timestamp = 0;
}
return 0;
}
/* Capture samples in local storage */
static int gyro_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
size_t raw_len, char *raw_data,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct gyro_3d_state *gyro_state = iio_priv(indio_dev);
int offset;
int ret = -EINVAL;
switch (usage_id) {
case HID_USAGE_SENSOR_ANGL_VELOCITY_X_AXIS:
case HID_USAGE_SENSOR_ANGL_VELOCITY_Y_AXIS:
case HID_USAGE_SENSOR_ANGL_VELOCITY_Z_AXIS:
offset = usage_id - HID_USAGE_SENSOR_ANGL_VELOCITY_X_AXIS;
gyro_state->scan.gyro_val[CHANNEL_SCAN_INDEX_X + offset] =
*(u32 *)raw_data;
ret = 0;
break;
case HID_USAGE_SENSOR_TIME_TIMESTAMP:
gyro_state->timestamp =
hid_sensor_convert_timestamp(&gyro_state->common_attributes,
*(s64 *)raw_data);
ret = 0;
break;
default:
break;
}
return ret;
}
/* Parse report which is specific to an usage id*/
static int gyro_3d_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
struct iio_chan_spec *channels,
unsigned usage_id,
struct gyro_3d_state *st)
{
int ret;
int i;
for (i = 0; i <= CHANNEL_SCAN_INDEX_Z; ++i) {
ret = sensor_hub_input_get_attribute_info(hsdev,
HID_INPUT_REPORT,
usage_id,
HID_USAGE_SENSOR_ANGL_VELOCITY_X_AXIS + i,
&st->gyro[CHANNEL_SCAN_INDEX_X + i]);
if (ret < 0)
break;
gyro_3d_adjust_channel_bit_mask(channels,
CHANNEL_SCAN_INDEX_X + i,
st->gyro[CHANNEL_SCAN_INDEX_X + i].size);
}
dev_dbg(&pdev->dev, "gyro_3d %x:%x, %x:%x, %x:%x\n",
st->gyro[0].index,
st->gyro[0].report_id,
st->gyro[1].index, st->gyro[1].report_id,
st->gyro[2].index, st->gyro[2].report_id);
st->scale_precision = hid_sensor_format_scale(
HID_USAGE_SENSOR_GYRO_3D,
&st->gyro[CHANNEL_SCAN_INDEX_X],
&st->scale_pre_decml, &st->scale_post_decml);
return ret;
}
/* Function to initialize the processing for usage id */
static int hid_gyro_3d_probe(struct platform_device *pdev)
{
int ret = 0;
static const char *name = "gyro_3d";
struct iio_dev *indio_dev;
struct gyro_3d_state *gyro_state;
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*gyro_state));
if (!indio_dev)
return -ENOMEM;
platform_set_drvdata(pdev, indio_dev);
gyro_state = iio_priv(indio_dev);
gyro_state->common_attributes.hsdev = hsdev;
gyro_state->common_attributes.pdev = pdev;
ret = hid_sensor_parse_common_attributes(hsdev,
HID_USAGE_SENSOR_GYRO_3D,
&gyro_state->common_attributes,
gryo_3d_sensitivity_addresses,
ARRAY_SIZE(gryo_3d_sensitivity_addresses));
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;
}
indio_dev->channels = devm_kmemdup(&pdev->dev, gyro_3d_channels,
sizeof(gyro_3d_channels), GFP_KERNEL);
if (!indio_dev->channels) {
dev_err(&pdev->dev, "failed to duplicate channels\n");
return -ENOMEM;
}
ret = gyro_3d_parse_report(pdev, hsdev,
(struct iio_chan_spec *)indio_dev->channels,
HID_USAGE_SENSOR_GYRO_3D, gyro_state);
if (ret) {
dev_err(&pdev->dev, "failed to setup attributes\n");
return ret;
}
indio_dev->num_channels = ARRAY_SIZE(gyro_3d_channels);
indio_dev->info = &gyro_3d_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
atomic_set(&gyro_state->common_attributes.data_ready, 0);
ret = hid_sensor_setup_trigger(indio_dev, name,
&gyro_state->common_attributes);
if (ret < 0) {
dev_err(&pdev->dev, "trigger setup failed\n");
return ret;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&pdev->dev, "device register failed\n");
goto error_remove_trigger;
}
gyro_state->callbacks.send_event = gyro_3d_proc_event;
gyro_state->callbacks.capture_sample = gyro_3d_capture_sample;
gyro_state->callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, HID_USAGE_SENSOR_GYRO_3D,
&gyro_state->callbacks);
if (ret < 0) {
dev_err(&pdev->dev, "callback reg failed\n");
goto error_iio_unreg;
}
return ret;
error_iio_unreg:
iio_device_unregister(indio_dev);
error_remove_trigger:
hid_sensor_remove_trigger(indio_dev, &gyro_state->common_attributes);
return ret;
}
/* Function to deinitialize the processing for usage id */
static int hid_gyro_3d_remove(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct gyro_3d_state *gyro_state = iio_priv(indio_dev);
sensor_hub_remove_callback(hsdev, HID_USAGE_SENSOR_GYRO_3D);
iio_device_unregister(indio_dev);
hid_sensor_remove_trigger(indio_dev, &gyro_state->common_attributes);
return 0;
}
static const struct platform_device_id hid_gyro_3d_ids[] = {
{
/* Format: HID-SENSOR-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-200076",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, hid_gyro_3d_ids);
static struct platform_driver hid_gyro_3d_platform_driver = {
.id_table = hid_gyro_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.pm = &hid_sensor_pm_ops,
},
.probe = hid_gyro_3d_probe,
.remove = hid_gyro_3d_remove,
};
module_platform_driver(hid_gyro_3d_platform_driver);
MODULE_DESCRIPTION("HID Sensor Gyroscope 3D");
MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_HID);
| linux-master | drivers/iio/gyro/hid-sensor-gyro-3d.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* itg3200_core.c -- support InvenSense ITG3200
* Digital 3-Axis Gyroscope driver
*
* Copyright (c) 2011 Christian Strobel <[email protected]>
* Copyright (c) 2011 Manuel Stahl <[email protected]>
* Copyright (c) 2012 Thorsten Nowak <[email protected]>
*
* TODO:
* - Support digital low pass filter
* - Support power management
*/
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/stat.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>
#include <linux/iio/buffer.h>
#include <linux/iio/gyro/itg3200.h>
int itg3200_write_reg_8(struct iio_dev *indio_dev,
u8 reg_address, u8 val)
{
struct itg3200 *st = iio_priv(indio_dev);
return i2c_smbus_write_byte_data(st->i2c, 0x80 | reg_address, val);
}
int itg3200_read_reg_8(struct iio_dev *indio_dev,
u8 reg_address, u8 *val)
{
struct itg3200 *st = iio_priv(indio_dev);
int ret;
ret = i2c_smbus_read_byte_data(st->i2c, reg_address);
if (ret < 0)
return ret;
*val = ret;
return 0;
}
static int itg3200_read_reg_s16(struct iio_dev *indio_dev, u8 lower_reg_address,
int *val)
{
struct itg3200 *st = iio_priv(indio_dev);
struct i2c_client *client = st->i2c;
int ret;
s16 out;
struct i2c_msg msg[2] = {
{
.addr = client->addr,
.flags = client->flags,
.len = 1,
.buf = (char *)&lower_reg_address,
},
{
.addr = client->addr,
.flags = client->flags | I2C_M_RD,
.len = 2,
.buf = (char *)&out,
},
};
lower_reg_address |= 0x80;
ret = i2c_transfer(client->adapter, msg, 2);
be16_to_cpus(&out);
*val = out;
return (ret == 2) ? 0 : ret;
}
static int itg3200_read_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
int *val, int *val2, long info)
{
int ret = 0;
u8 reg;
u8 regval;
switch (info) {
case IIO_CHAN_INFO_RAW:
reg = (u8)chan->address;
ret = itg3200_read_reg_s16(indio_dev, reg, val);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
if (chan->type == IIO_TEMP)
*val2 = 1000000000/280;
else
*val2 = 1214142; /* (1 / 14,375) * (PI / 180) */
return IIO_VAL_INT_PLUS_NANO;
case IIO_CHAN_INFO_OFFSET:
/* Only the temperature channel has an offset */
*val = 23000;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = itg3200_read_reg_8(indio_dev, ITG3200_REG_DLPF, ®val);
if (ret)
return ret;
*val = (regval & ITG3200_DLPF_CFG_MASK) ? 1000 : 8000;
ret = itg3200_read_reg_8(indio_dev,
ITG3200_REG_SAMPLE_RATE_DIV,
®val);
if (ret)
return ret;
*val /= regval + 1;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int itg3200_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct itg3200 *st = iio_priv(indio_dev);
int ret;
u8 t;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (val == 0 || val2 != 0)
return -EINVAL;
mutex_lock(&st->lock);
ret = itg3200_read_reg_8(indio_dev, ITG3200_REG_DLPF, &t);
if (ret) {
mutex_unlock(&st->lock);
return ret;
}
t = ((t & ITG3200_DLPF_CFG_MASK) ? 1000u : 8000u) / val - 1;
ret = itg3200_write_reg_8(indio_dev,
ITG3200_REG_SAMPLE_RATE_DIV,
t);
mutex_unlock(&st->lock);
return ret;
default:
return -EINVAL;
}
}
/*
* Reset device and internal registers to the power-up-default settings
* Use the gyro clock as reference, as suggested by the datasheet
*/
static int itg3200_reset(struct iio_dev *indio_dev)
{
struct itg3200 *st = iio_priv(indio_dev);
int ret;
dev_dbg(&st->i2c->dev, "reset device");
ret = itg3200_write_reg_8(indio_dev,
ITG3200_REG_POWER_MANAGEMENT,
ITG3200_RESET);
if (ret) {
dev_err(&st->i2c->dev, "error resetting device");
goto error_ret;
}
/* Wait for PLL (1ms according to datasheet) */
udelay(1500);
ret = itg3200_write_reg_8(indio_dev,
ITG3200_REG_IRQ_CONFIG,
ITG3200_IRQ_ACTIVE_HIGH |
ITG3200_IRQ_PUSH_PULL |
ITG3200_IRQ_LATCH_50US_PULSE |
ITG3200_IRQ_LATCH_CLEAR_ANY);
if (ret)
dev_err(&st->i2c->dev, "error init device");
error_ret:
return ret;
}
/* itg3200_enable_full_scale() - Disables the digital low pass filter */
static int itg3200_enable_full_scale(struct iio_dev *indio_dev)
{
u8 val;
int ret;
ret = itg3200_read_reg_8(indio_dev, ITG3200_REG_DLPF, &val);
if (ret)
goto err_ret;
val |= ITG3200_DLPF_FS_SEL_2000;
return itg3200_write_reg_8(indio_dev, ITG3200_REG_DLPF, val);
err_ret:
return ret;
}
static int itg3200_initial_setup(struct iio_dev *indio_dev)
{
struct itg3200 *st = iio_priv(indio_dev);
int ret;
u8 val;
ret = itg3200_reset(indio_dev);
if (ret)
goto err_ret;
ret = itg3200_read_reg_8(indio_dev, ITG3200_REG_ADDRESS, &val);
if (ret)
goto err_ret;
if (((val >> 1) & 0x3f) != 0x34) {
dev_err(&st->i2c->dev, "invalid reg value 0x%02x", val);
ret = -ENXIO;
goto err_ret;
}
ret = itg3200_enable_full_scale(indio_dev);
err_ret:
return ret;
}
static const struct iio_mount_matrix *
itg3200_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct itg3200 *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info itg3200_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, itg3200_get_mount_matrix),
{ }
};
#define ITG3200_ST \
{ .sign = 's', .realbits = 16, .storagebits = 16, .endianness = IIO_BE }
#define ITG3200_GYRO_CHAN(_mod) { \
.type = IIO_ANGL_VEL, \
.modified = 1, \
.channel2 = IIO_MOD_ ## _mod, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = ITG3200_REG_GYRO_ ## _mod ## OUT_H, \
.scan_index = ITG3200_SCAN_GYRO_ ## _mod, \
.scan_type = ITG3200_ST, \
.ext_info = itg3200_ext_info, \
}
static const struct iio_chan_spec itg3200_channels[] = {
{
.type = IIO_TEMP,
.channel2 = IIO_NO_MOD,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.address = ITG3200_REG_TEMP_OUT_H,
.scan_index = ITG3200_SCAN_TEMP,
.scan_type = ITG3200_ST,
},
ITG3200_GYRO_CHAN(X),
ITG3200_GYRO_CHAN(Y),
ITG3200_GYRO_CHAN(Z),
IIO_CHAN_SOFT_TIMESTAMP(ITG3200_SCAN_ELEMENTS),
};
static const struct iio_info itg3200_info = {
.read_raw = &itg3200_read_raw,
.write_raw = &itg3200_write_raw,
};
static const unsigned long itg3200_available_scan_masks[] = { 0xffffffff, 0x0 };
static int itg3200_probe(struct i2c_client *client)
{
int ret;
struct itg3200 *st;
struct iio_dev *indio_dev;
dev_dbg(&client->dev, "probe I2C dev with IRQ %i", client->irq);
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
ret = iio_read_mount_matrix(&client->dev, &st->orientation);
if (ret)
return ret;
i2c_set_clientdata(client, indio_dev);
st->i2c = client;
indio_dev->name = client->dev.driver->name;
indio_dev->channels = itg3200_channels;
indio_dev->num_channels = ARRAY_SIZE(itg3200_channels);
indio_dev->available_scan_masks = itg3200_available_scan_masks;
indio_dev->info = &itg3200_info;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = itg3200_buffer_configure(indio_dev);
if (ret)
return ret;
if (client->irq) {
ret = itg3200_probe_trigger(indio_dev);
if (ret)
goto error_unconfigure_buffer;
}
ret = itg3200_initial_setup(indio_dev);
if (ret)
goto error_remove_trigger;
mutex_init(&st->lock);
ret = iio_device_register(indio_dev);
if (ret)
goto error_remove_trigger;
return 0;
error_remove_trigger:
if (client->irq)
itg3200_remove_trigger(indio_dev);
error_unconfigure_buffer:
itg3200_buffer_unconfigure(indio_dev);
return ret;
}
static void itg3200_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
iio_device_unregister(indio_dev);
if (client->irq)
itg3200_remove_trigger(indio_dev);
itg3200_buffer_unconfigure(indio_dev);
}
static int itg3200_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct itg3200 *st = iio_priv(indio_dev);
dev_dbg(&st->i2c->dev, "suspend device");
return itg3200_write_reg_8(indio_dev, ITG3200_REG_POWER_MANAGEMENT,
ITG3200_SLEEP);
}
static int itg3200_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
return itg3200_initial_setup(indio_dev);
}
static DEFINE_SIMPLE_DEV_PM_OPS(itg3200_pm_ops, itg3200_suspend,
itg3200_resume);
static const struct i2c_device_id itg3200_id[] = {
{ "itg3200", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, itg3200_id);
static const struct of_device_id itg3200_of_match[] = {
{ .compatible = "invensense,itg3200" },
{ }
};
MODULE_DEVICE_TABLE(of, itg3200_of_match);
static struct i2c_driver itg3200_driver = {
.driver = {
.name = "itg3200",
.of_match_table = itg3200_of_match,
.pm = pm_sleep_ptr(&itg3200_pm_ops),
},
.id_table = itg3200_id,
.probe = itg3200_probe,
.remove = itg3200_remove,
};
module_i2c_driver(itg3200_driver);
MODULE_AUTHOR("Christian Strobel <[email protected]>");
MODULE_DESCRIPTION("ITG3200 Gyroscope I2C driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/gyro/itg3200_core.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADIS16130 Digital Output, High Precision Angular Rate Sensor driver
*
* Copyright 2010 Analog Devices Inc.
*/
#include <linux/mutex.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <asm/unaligned.h>
#define ADIS16130_CON 0x0
#define ADIS16130_CON_RD (1 << 6)
#define ADIS16130_IOP 0x1
/* 1 = data-ready signal low when unread data on all channels; */
#define ADIS16130_IOP_ALL_RDY (1 << 3)
#define ADIS16130_IOP_SYNC (1 << 0) /* 1 = synchronization enabled */
#define ADIS16130_RATEDATA 0x8 /* Gyroscope output, rate of rotation */
#define ADIS16130_TEMPDATA 0xA /* Temperature output */
#define ADIS16130_RATECS 0x28 /* Gyroscope channel setup */
#define ADIS16130_RATECS_EN (1 << 3) /* 1 = channel enable; */
#define ADIS16130_TEMPCS 0x2A /* Temperature channel setup */
#define ADIS16130_TEMPCS_EN (1 << 3)
#define ADIS16130_RATECONV 0x30
#define ADIS16130_TEMPCONV 0x32
#define ADIS16130_MODE 0x38
#define ADIS16130_MODE_24BIT (1 << 1) /* 1 = 24-bit resolution; */
/**
* struct adis16130_state - device instance specific data
* @us: actual spi_device to write data
* @buf_lock: mutex to protect tx and rx
* @buf: unified tx/rx buffer
**/
struct adis16130_state {
struct spi_device *us;
struct mutex buf_lock;
u8 buf[4] __aligned(IIO_DMA_MINALIGN);
};
static int adis16130_spi_read(struct iio_dev *indio_dev, u8 reg_addr, u32 *val)
{
int ret;
struct adis16130_state *st = iio_priv(indio_dev);
struct spi_transfer xfer = {
.tx_buf = st->buf,
.rx_buf = st->buf,
.len = 4,
};
mutex_lock(&st->buf_lock);
st->buf[0] = ADIS16130_CON_RD | reg_addr;
st->buf[1] = st->buf[2] = st->buf[3] = 0;
ret = spi_sync_transfer(st->us, &xfer, 1);
if (ret == 0)
*val = get_unaligned_be24(&st->buf[1]);
mutex_unlock(&st->buf_lock);
return ret;
}
static int adis16130_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
int ret;
u32 temp;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/* Take the iio_dev status lock */
ret = adis16130_spi_read(indio_dev, chan->address, &temp);
if (ret)
return ret;
*val = temp;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
/* 0 degree = 838860, 250 degree = 14260608 */
*val = 250;
*val2 = 336440817; /* RAD_TO_DEGREE(14260608 - 8388608) */
return IIO_VAL_FRACTIONAL;
case IIO_TEMP:
/* 0C = 8036283, 105C = 9516048 */
*val = 105000;
*val2 = 9516048 - 8036283;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = -8388608;
return IIO_VAL_INT;
case IIO_TEMP:
*val = -8036283;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
return -EINVAL;
}
static const struct iio_chan_spec adis16130_channels[] = {
{
.type = IIO_ANGL_VEL,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.address = ADIS16130_RATEDATA,
}, {
.type = IIO_TEMP,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.address = ADIS16130_TEMPDATA,
}
};
static const struct iio_info adis16130_info = {
.read_raw = &adis16130_read_raw,
};
static int adis16130_probe(struct spi_device *spi)
{
struct adis16130_state *st;
struct iio_dev *indio_dev;
/* setup the industrialio driver allocated elements */
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
/* this is only used for removal purposes */
spi_set_drvdata(spi, indio_dev);
st->us = spi;
mutex_init(&st->buf_lock);
indio_dev->name = spi->dev.driver->name;
indio_dev->channels = adis16130_channels;
indio_dev->num_channels = ARRAY_SIZE(adis16130_channels);
indio_dev->info = &adis16130_info;
indio_dev->modes = INDIO_DIRECT_MODE;
return devm_iio_device_register(&spi->dev, indio_dev);
}
static struct spi_driver adis16130_driver = {
.driver = {
.name = "adis16130",
},
.probe = adis16130_probe,
};
module_spi_driver(adis16130_driver);
MODULE_AUTHOR("Barry Song <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16130 High Precision Angular Rate");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:adis16130");
| linux-master | drivers/iio/gyro/adis16130.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* MPU3050 gyroscope driver
*
* Copyright (C) 2016 Linaro Ltd.
* Author: Linus Walleij <[email protected]>
*
* Based on the input subsystem driver, Copyright (C) 2011 Wistron Co.Ltd
* Joseph Lai <[email protected]> and trimmed down by
* Alan Cox <[email protected]> in turn based on bma023.c.
* Device behaviour based on a misc driver posted by Nathan Royer in 2011.
*
* TODO: add support for setting up the low pass 3dB frequency.
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/random.h>
#include <linux/slab.h>
#include "mpu3050.h"
#define MPU3050_CHIP_ID 0x68
#define MPU3050_CHIP_ID_MASK 0x7E
/*
* Register map: anything suffixed *_H is a big-endian high byte and always
* followed by the corresponding low byte (*_L) even though these are not
* explicitly included in the register definitions.
*/
#define MPU3050_CHIP_ID_REG 0x00
#define MPU3050_PRODUCT_ID_REG 0x01
#define MPU3050_XG_OFFS_TC 0x05
#define MPU3050_YG_OFFS_TC 0x08
#define MPU3050_ZG_OFFS_TC 0x0B
#define MPU3050_X_OFFS_USR_H 0x0C
#define MPU3050_Y_OFFS_USR_H 0x0E
#define MPU3050_Z_OFFS_USR_H 0x10
#define MPU3050_FIFO_EN 0x12
#define MPU3050_AUX_VDDIO 0x13
#define MPU3050_SLV_ADDR 0x14
#define MPU3050_SMPLRT_DIV 0x15
#define MPU3050_DLPF_FS_SYNC 0x16
#define MPU3050_INT_CFG 0x17
#define MPU3050_AUX_ADDR 0x18
#define MPU3050_INT_STATUS 0x1A
#define MPU3050_TEMP_H 0x1B
#define MPU3050_XOUT_H 0x1D
#define MPU3050_YOUT_H 0x1F
#define MPU3050_ZOUT_H 0x21
#define MPU3050_DMP_CFG1 0x35
#define MPU3050_DMP_CFG2 0x36
#define MPU3050_BANK_SEL 0x37
#define MPU3050_MEM_START_ADDR 0x38
#define MPU3050_MEM_R_W 0x39
#define MPU3050_FIFO_COUNT_H 0x3A
#define MPU3050_FIFO_R 0x3C
#define MPU3050_USR_CTRL 0x3D
#define MPU3050_PWR_MGM 0x3E
/* MPU memory bank read options */
#define MPU3050_MEM_PRFTCH BIT(5)
#define MPU3050_MEM_USER_BANK BIT(4)
/* Bits 8-11 select memory bank */
#define MPU3050_MEM_RAM_BANK_0 0
#define MPU3050_MEM_RAM_BANK_1 1
#define MPU3050_MEM_RAM_BANK_2 2
#define MPU3050_MEM_RAM_BANK_3 3
#define MPU3050_MEM_OTP_BANK_0 4
#define MPU3050_AXIS_REGS(axis) (MPU3050_XOUT_H + (axis * 2))
/* Register bits */
/* FIFO Enable */
#define MPU3050_FIFO_EN_FOOTER BIT(0)
#define MPU3050_FIFO_EN_AUX_ZOUT BIT(1)
#define MPU3050_FIFO_EN_AUX_YOUT BIT(2)
#define MPU3050_FIFO_EN_AUX_XOUT BIT(3)
#define MPU3050_FIFO_EN_GYRO_ZOUT BIT(4)
#define MPU3050_FIFO_EN_GYRO_YOUT BIT(5)
#define MPU3050_FIFO_EN_GYRO_XOUT BIT(6)
#define MPU3050_FIFO_EN_TEMP_OUT BIT(7)
/*
* Digital Low Pass filter (DLPF)
* Full Scale (FS)
* and Synchronization
*/
#define MPU3050_EXT_SYNC_NONE 0x00
#define MPU3050_EXT_SYNC_TEMP 0x20
#define MPU3050_EXT_SYNC_GYROX 0x40
#define MPU3050_EXT_SYNC_GYROY 0x60
#define MPU3050_EXT_SYNC_GYROZ 0x80
#define MPU3050_EXT_SYNC_ACCELX 0xA0
#define MPU3050_EXT_SYNC_ACCELY 0xC0
#define MPU3050_EXT_SYNC_ACCELZ 0xE0
#define MPU3050_EXT_SYNC_MASK 0xE0
#define MPU3050_EXT_SYNC_SHIFT 5
#define MPU3050_FS_250DPS 0x00
#define MPU3050_FS_500DPS 0x08
#define MPU3050_FS_1000DPS 0x10
#define MPU3050_FS_2000DPS 0x18
#define MPU3050_FS_MASK 0x18
#define MPU3050_FS_SHIFT 3
#define MPU3050_DLPF_CFG_256HZ_NOLPF2 0x00
#define MPU3050_DLPF_CFG_188HZ 0x01
#define MPU3050_DLPF_CFG_98HZ 0x02
#define MPU3050_DLPF_CFG_42HZ 0x03
#define MPU3050_DLPF_CFG_20HZ 0x04
#define MPU3050_DLPF_CFG_10HZ 0x05
#define MPU3050_DLPF_CFG_5HZ 0x06
#define MPU3050_DLPF_CFG_2100HZ_NOLPF 0x07
#define MPU3050_DLPF_CFG_MASK 0x07
#define MPU3050_DLPF_CFG_SHIFT 0
/* Interrupt config */
#define MPU3050_INT_RAW_RDY_EN BIT(0)
#define MPU3050_INT_DMP_DONE_EN BIT(1)
#define MPU3050_INT_MPU_RDY_EN BIT(2)
#define MPU3050_INT_ANYRD_2CLEAR BIT(4)
#define MPU3050_INT_LATCH_EN BIT(5)
#define MPU3050_INT_OPEN BIT(6)
#define MPU3050_INT_ACTL BIT(7)
/* Interrupt status */
#define MPU3050_INT_STATUS_RAW_RDY BIT(0)
#define MPU3050_INT_STATUS_DMP_DONE BIT(1)
#define MPU3050_INT_STATUS_MPU_RDY BIT(2)
#define MPU3050_INT_STATUS_FIFO_OVFLW BIT(7)
/* USR_CTRL */
#define MPU3050_USR_CTRL_FIFO_EN BIT(6)
#define MPU3050_USR_CTRL_AUX_IF_EN BIT(5)
#define MPU3050_USR_CTRL_AUX_IF_RST BIT(3)
#define MPU3050_USR_CTRL_FIFO_RST BIT(1)
#define MPU3050_USR_CTRL_GYRO_RST BIT(0)
/* PWR_MGM */
#define MPU3050_PWR_MGM_PLL_X 0x01
#define MPU3050_PWR_MGM_PLL_Y 0x02
#define MPU3050_PWR_MGM_PLL_Z 0x03
#define MPU3050_PWR_MGM_CLKSEL_MASK 0x07
#define MPU3050_PWR_MGM_STBY_ZG BIT(3)
#define MPU3050_PWR_MGM_STBY_YG BIT(4)
#define MPU3050_PWR_MGM_STBY_XG BIT(5)
#define MPU3050_PWR_MGM_SLEEP BIT(6)
#define MPU3050_PWR_MGM_RESET BIT(7)
#define MPU3050_PWR_MGM_MASK 0xff
/*
* Fullscale precision is (for finest precision) +/- 250 deg/s, so the full
* scale is actually 500 deg/s. All 16 bits are then used to cover this scale,
* in two's complement.
*/
static unsigned int mpu3050_fs_precision[] = {
IIO_DEGREE_TO_RAD(250),
IIO_DEGREE_TO_RAD(500),
IIO_DEGREE_TO_RAD(1000),
IIO_DEGREE_TO_RAD(2000)
};
/*
* Regulator names
*/
static const char mpu3050_reg_vdd[] = "vdd";
static const char mpu3050_reg_vlogic[] = "vlogic";
static unsigned int mpu3050_get_freq(struct mpu3050 *mpu3050)
{
unsigned int freq;
if (mpu3050->lpf == MPU3050_DLPF_CFG_256HZ_NOLPF2)
freq = 8000;
else
freq = 1000;
freq /= (mpu3050->divisor + 1);
return freq;
}
static int mpu3050_start_sampling(struct mpu3050 *mpu3050)
{
__be16 raw_val[3];
int ret;
int i;
/* Reset */
ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
MPU3050_PWR_MGM_RESET, MPU3050_PWR_MGM_RESET);
if (ret)
return ret;
/* Turn on the Z-axis PLL */
ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
MPU3050_PWR_MGM_CLKSEL_MASK,
MPU3050_PWR_MGM_PLL_Z);
if (ret)
return ret;
/* Write calibration offset registers */
for (i = 0; i < 3; i++)
raw_val[i] = cpu_to_be16(mpu3050->calibration[i]);
ret = regmap_bulk_write(mpu3050->map, MPU3050_X_OFFS_USR_H, raw_val,
sizeof(raw_val));
if (ret)
return ret;
/* Set low pass filter (sample rate), sync and full scale */
ret = regmap_write(mpu3050->map, MPU3050_DLPF_FS_SYNC,
MPU3050_EXT_SYNC_NONE << MPU3050_EXT_SYNC_SHIFT |
mpu3050->fullscale << MPU3050_FS_SHIFT |
mpu3050->lpf << MPU3050_DLPF_CFG_SHIFT);
if (ret)
return ret;
/* Set up sampling frequency */
ret = regmap_write(mpu3050->map, MPU3050_SMPLRT_DIV, mpu3050->divisor);
if (ret)
return ret;
/*
* Max 50 ms start-up time after setting DLPF_FS_SYNC
* according to the data sheet, then wait for the next sample
* at this frequency T = 1000/f ms.
*/
msleep(50 + 1000 / mpu3050_get_freq(mpu3050));
return 0;
}
static int mpu3050_set_8khz_samplerate(struct mpu3050 *mpu3050)
{
int ret;
u8 divisor;
enum mpu3050_lpf lpf;
lpf = mpu3050->lpf;
divisor = mpu3050->divisor;
mpu3050->lpf = LPF_256_HZ_NOLPF; /* 8 kHz base frequency */
mpu3050->divisor = 0; /* Divide by 1 */
ret = mpu3050_start_sampling(mpu3050);
mpu3050->lpf = lpf;
mpu3050->divisor = divisor;
return ret;
}
static int mpu3050_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
int ret;
__be16 raw_val;
switch (mask) {
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
/*
* The temperature scaling is (x+23000)/280 Celsius
* for the "best fit straight line" temperature range
* of -30C..85C. The 23000 includes room temperature
* offset of +35C, 280 is the precision scale and x is
* the 16-bit signed integer reported by hardware.
*
* Temperature value itself represents temperature of
* the sensor die.
*/
*val = 23000;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_CALIBBIAS:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = mpu3050->calibration[chan->scan_index-1];
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
*val = mpu3050_get_freq(mpu3050);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
/* Millidegrees, see about temperature scaling above */
*val = 1000;
*val2 = 280;
return IIO_VAL_FRACTIONAL;
case IIO_ANGL_VEL:
/*
* Convert to the corresponding full scale in
* radians. All 16 bits are used with sign to
* span the available scale: to account for the one
* missing value if we multiply by 1/S16_MAX, instead
* multiply with 2/U16_MAX.
*/
*val = mpu3050_fs_precision[mpu3050->fullscale] * 2;
*val2 = U16_MAX;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_RAW:
/* Resume device */
pm_runtime_get_sync(mpu3050->dev);
mutex_lock(&mpu3050->lock);
ret = mpu3050_set_8khz_samplerate(mpu3050);
if (ret)
goto out_read_raw_unlock;
switch (chan->type) {
case IIO_TEMP:
ret = regmap_bulk_read(mpu3050->map, MPU3050_TEMP_H,
&raw_val, sizeof(raw_val));
if (ret) {
dev_err(mpu3050->dev,
"error reading temperature\n");
goto out_read_raw_unlock;
}
*val = (s16)be16_to_cpu(raw_val);
ret = IIO_VAL_INT;
goto out_read_raw_unlock;
case IIO_ANGL_VEL:
ret = regmap_bulk_read(mpu3050->map,
MPU3050_AXIS_REGS(chan->scan_index-1),
&raw_val,
sizeof(raw_val));
if (ret) {
dev_err(mpu3050->dev,
"error reading axis data\n");
goto out_read_raw_unlock;
}
*val = be16_to_cpu(raw_val);
ret = IIO_VAL_INT;
goto out_read_raw_unlock;
default:
ret = -EINVAL;
goto out_read_raw_unlock;
}
default:
break;
}
return -EINVAL;
out_read_raw_unlock:
mutex_unlock(&mpu3050->lock);
pm_runtime_mark_last_busy(mpu3050->dev);
pm_runtime_put_autosuspend(mpu3050->dev);
return ret;
}
static int mpu3050_write_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
int val, int val2, long mask)
{
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
/*
* Couldn't figure out a way to precalculate these at compile time.
*/
unsigned int fs250 =
DIV_ROUND_CLOSEST(mpu3050_fs_precision[0] * 1000000 * 2,
U16_MAX);
unsigned int fs500 =
DIV_ROUND_CLOSEST(mpu3050_fs_precision[1] * 1000000 * 2,
U16_MAX);
unsigned int fs1000 =
DIV_ROUND_CLOSEST(mpu3050_fs_precision[2] * 1000000 * 2,
U16_MAX);
unsigned int fs2000 =
DIV_ROUND_CLOSEST(mpu3050_fs_precision[3] * 1000000 * 2,
U16_MAX);
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
mpu3050->calibration[chan->scan_index-1] = val;
return 0;
case IIO_CHAN_INFO_SAMP_FREQ:
/*
* The max samplerate is 8000 Hz, the minimum
* 1000 / 256 ~= 4 Hz
*/
if (val < 4 || val > 8000)
return -EINVAL;
/*
* Above 1000 Hz we must turn off the digital low pass filter
* so we get a base frequency of 8kHz to the divider
*/
if (val > 1000) {
mpu3050->lpf = LPF_256_HZ_NOLPF;
mpu3050->divisor = DIV_ROUND_CLOSEST(8000, val) - 1;
return 0;
}
mpu3050->lpf = LPF_188_HZ;
mpu3050->divisor = DIV_ROUND_CLOSEST(1000, val) - 1;
return 0;
case IIO_CHAN_INFO_SCALE:
if (chan->type != IIO_ANGL_VEL)
return -EINVAL;
/*
* We support +/-250, +/-500, +/-1000 and +/2000 deg/s
* which means we need to round to the closest radians
* which will be roughly +/-4.3, +/-8.7, +/-17.5, +/-35
* rad/s. The scale is then for the 16 bits used to cover
* it 2/(2^16) of that.
*/
/* Just too large, set the max range */
if (val != 0) {
mpu3050->fullscale = FS_2000_DPS;
return 0;
}
/*
* Now we're dealing with fractions below zero in millirad/s
* do some integer interpolation and match with the closest
* fullscale in the table.
*/
if (val2 <= fs250 ||
val2 < ((fs500 + fs250) / 2))
mpu3050->fullscale = FS_250_DPS;
else if (val2 <= fs500 ||
val2 < ((fs1000 + fs500) / 2))
mpu3050->fullscale = FS_500_DPS;
else if (val2 <= fs1000 ||
val2 < ((fs2000 + fs1000) / 2))
mpu3050->fullscale = FS_1000_DPS;
else
/* Catch-all */
mpu3050->fullscale = FS_2000_DPS;
return 0;
default:
break;
}
return -EINVAL;
}
static irqreturn_t mpu3050_trigger_handler(int irq, void *p)
{
const struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
int ret;
struct {
__be16 chans[4];
s64 timestamp __aligned(8);
} scan;
s64 timestamp;
unsigned int datums_from_fifo = 0;
/*
* If we're using the hardware trigger, get the precise timestamp from
* the top half of the threaded IRQ handler. Otherwise get the
* timestamp here so it will be close in time to the actual values
* read from the registers.
*/
if (iio_trigger_using_own(indio_dev))
timestamp = mpu3050->hw_timestamp;
else
timestamp = iio_get_time_ns(indio_dev);
mutex_lock(&mpu3050->lock);
/* Using the hardware IRQ trigger? Check the buffer then. */
if (mpu3050->hw_irq_trigger) {
__be16 raw_fifocnt;
u16 fifocnt;
/* X, Y, Z + temperature */
unsigned int bytes_per_datum = 8;
bool fifo_overflow = false;
ret = regmap_bulk_read(mpu3050->map,
MPU3050_FIFO_COUNT_H,
&raw_fifocnt,
sizeof(raw_fifocnt));
if (ret)
goto out_trigger_unlock;
fifocnt = be16_to_cpu(raw_fifocnt);
if (fifocnt == 512) {
dev_info(mpu3050->dev,
"FIFO overflow! Emptying and resetting FIFO\n");
fifo_overflow = true;
/* Reset and enable the FIFO */
ret = regmap_update_bits(mpu3050->map,
MPU3050_USR_CTRL,
MPU3050_USR_CTRL_FIFO_EN |
MPU3050_USR_CTRL_FIFO_RST,
MPU3050_USR_CTRL_FIFO_EN |
MPU3050_USR_CTRL_FIFO_RST);
if (ret) {
dev_info(mpu3050->dev, "error resetting FIFO\n");
goto out_trigger_unlock;
}
mpu3050->pending_fifo_footer = false;
}
if (fifocnt)
dev_dbg(mpu3050->dev,
"%d bytes in the FIFO\n",
fifocnt);
while (!fifo_overflow && fifocnt > bytes_per_datum) {
unsigned int toread;
unsigned int offset;
__be16 fifo_values[5];
/*
* If there is a FIFO footer in the pipe, first clear
* that out. This follows the complex algorithm in the
* datasheet that states that you may never leave the
* FIFO empty after the first reading: you have to
* always leave two footer bytes in it. The footer is
* in practice just two zero bytes.
*/
if (mpu3050->pending_fifo_footer) {
toread = bytes_per_datum + 2;
offset = 0;
} else {
toread = bytes_per_datum;
offset = 1;
/* Put in some dummy value */
fifo_values[0] = cpu_to_be16(0xAAAA);
}
ret = regmap_bulk_read(mpu3050->map,
MPU3050_FIFO_R,
&fifo_values[offset],
toread);
if (ret)
goto out_trigger_unlock;
dev_dbg(mpu3050->dev,
"%04x %04x %04x %04x %04x\n",
fifo_values[0],
fifo_values[1],
fifo_values[2],
fifo_values[3],
fifo_values[4]);
/* Index past the footer (fifo_values[0]) and push */
iio_push_to_buffers_with_ts_unaligned(indio_dev,
&fifo_values[1],
sizeof(__be16) * 4,
timestamp);
fifocnt -= toread;
datums_from_fifo++;
mpu3050->pending_fifo_footer = true;
/*
* If we're emptying the FIFO, just make sure to
* check if something new appeared.
*/
if (fifocnt < bytes_per_datum) {
ret = regmap_bulk_read(mpu3050->map,
MPU3050_FIFO_COUNT_H,
&raw_fifocnt,
sizeof(raw_fifocnt));
if (ret)
goto out_trigger_unlock;
fifocnt = be16_to_cpu(raw_fifocnt);
}
if (fifocnt < bytes_per_datum)
dev_dbg(mpu3050->dev,
"%d bytes left in the FIFO\n",
fifocnt);
/*
* At this point, the timestamp that triggered the
* hardware interrupt is no longer valid for what
* we are reading (the interrupt likely fired for
* the value on the top of the FIFO), so set the
* timestamp to zero and let userspace deal with it.
*/
timestamp = 0;
}
}
/*
* If we picked some datums from the FIFO that's enough, else
* fall through and just read from the current value registers.
* This happens in two cases:
*
* - We are using some other trigger (external, like an HRTimer)
* than the sensor's own sample generator. In this case the
* sensor is just set to the max sampling frequency and we give
* the trigger a copy of the latest value every time we get here.
*
* - The hardware trigger is active but unused and we actually use
* another trigger which calls here with a frequency higher
* than what the device provides data. We will then just read
* duplicate values directly from the hardware registers.
*/
if (datums_from_fifo) {
dev_dbg(mpu3050->dev,
"read %d datums from the FIFO\n",
datums_from_fifo);
goto out_trigger_unlock;
}
ret = regmap_bulk_read(mpu3050->map, MPU3050_TEMP_H, scan.chans,
sizeof(scan.chans));
if (ret) {
dev_err(mpu3050->dev,
"error reading axis data\n");
goto out_trigger_unlock;
}
iio_push_to_buffers_with_timestamp(indio_dev, &scan, timestamp);
out_trigger_unlock:
mutex_unlock(&mpu3050->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int mpu3050_buffer_preenable(struct iio_dev *indio_dev)
{
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
pm_runtime_get_sync(mpu3050->dev);
/* Unless we have OUR trigger active, run at full speed */
if (!mpu3050->hw_irq_trigger)
return mpu3050_set_8khz_samplerate(mpu3050);
return 0;
}
static int mpu3050_buffer_postdisable(struct iio_dev *indio_dev)
{
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
pm_runtime_mark_last_busy(mpu3050->dev);
pm_runtime_put_autosuspend(mpu3050->dev);
return 0;
}
static const struct iio_buffer_setup_ops mpu3050_buffer_setup_ops = {
.preenable = mpu3050_buffer_preenable,
.postdisable = mpu3050_buffer_postdisable,
};
static const struct iio_mount_matrix *
mpu3050_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
return &mpu3050->orientation;
}
static const struct iio_chan_spec_ext_info mpu3050_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, mpu3050_get_mount_matrix),
{ },
};
#define MPU3050_AXIS_CHANNEL(axis, index) \
{ \
.type = IIO_ANGL_VEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
.ext_info = mpu3050_ext_info, \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec mpu3050_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
},
MPU3050_AXIS_CHANNEL(X, 1),
MPU3050_AXIS_CHANNEL(Y, 2),
MPU3050_AXIS_CHANNEL(Z, 3),
IIO_CHAN_SOFT_TIMESTAMP(4),
};
/* Four channels apart from timestamp, scan mask = 0x0f */
static const unsigned long mpu3050_scan_masks[] = { 0xf, 0 };
/*
* These are just the hardcoded factors resulting from the more elaborate
* calculations done with fractions in the scale raw get/set functions.
*/
static IIO_CONST_ATTR(anglevel_scale_available,
"0.000122070 "
"0.000274658 "
"0.000518798 "
"0.001068115");
static struct attribute *mpu3050_attributes[] = {
&iio_const_attr_anglevel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group mpu3050_attribute_group = {
.attrs = mpu3050_attributes,
};
static const struct iio_info mpu3050_info = {
.read_raw = mpu3050_read_raw,
.write_raw = mpu3050_write_raw,
.attrs = &mpu3050_attribute_group,
};
/**
* mpu3050_read_mem() - read MPU-3050 internal memory
* @mpu3050: device to read from
* @bank: target bank
* @addr: target address
* @len: number of bytes
* @buf: the buffer to store the read bytes in
*/
static int mpu3050_read_mem(struct mpu3050 *mpu3050,
u8 bank,
u8 addr,
u8 len,
u8 *buf)
{
int ret;
ret = regmap_write(mpu3050->map,
MPU3050_BANK_SEL,
bank);
if (ret)
return ret;
ret = regmap_write(mpu3050->map,
MPU3050_MEM_START_ADDR,
addr);
if (ret)
return ret;
return regmap_bulk_read(mpu3050->map,
MPU3050_MEM_R_W,
buf,
len);
}
static int mpu3050_hw_init(struct mpu3050 *mpu3050)
{
int ret;
__le64 otp_le;
u64 otp;
/* Reset */
ret = regmap_update_bits(mpu3050->map,
MPU3050_PWR_MGM,
MPU3050_PWR_MGM_RESET,
MPU3050_PWR_MGM_RESET);
if (ret)
return ret;
/* Turn on the PLL */
ret = regmap_update_bits(mpu3050->map,
MPU3050_PWR_MGM,
MPU3050_PWR_MGM_CLKSEL_MASK,
MPU3050_PWR_MGM_PLL_Z);
if (ret)
return ret;
/* Disable IRQs */
ret = regmap_write(mpu3050->map,
MPU3050_INT_CFG,
0);
if (ret)
return ret;
/* Read out the 8 bytes of OTP (one-time-programmable) memory */
ret = mpu3050_read_mem(mpu3050,
(MPU3050_MEM_PRFTCH |
MPU3050_MEM_USER_BANK |
MPU3050_MEM_OTP_BANK_0),
0,
sizeof(otp_le),
(u8 *)&otp_le);
if (ret)
return ret;
/* This is device-unique data so it goes into the entropy pool */
add_device_randomness(&otp_le, sizeof(otp_le));
otp = le64_to_cpu(otp_le);
dev_info(mpu3050->dev,
"die ID: %04llX, wafer ID: %02llX, A lot ID: %04llX, "
"W lot ID: %03llX, WP ID: %01llX, rev ID: %02llX\n",
/* Die ID, bits 0-12 */
FIELD_GET(GENMASK_ULL(12, 0), otp),
/* Wafer ID, bits 13-17 */
FIELD_GET(GENMASK_ULL(17, 13), otp),
/* A lot ID, bits 18-33 */
FIELD_GET(GENMASK_ULL(33, 18), otp),
/* W lot ID, bits 34-45 */
FIELD_GET(GENMASK_ULL(45, 34), otp),
/* WP ID, bits 47-49 */
FIELD_GET(GENMASK_ULL(49, 47), otp),
/* rev ID, bits 50-55 */
FIELD_GET(GENMASK_ULL(55, 50), otp));
return 0;
}
static int mpu3050_power_up(struct mpu3050 *mpu3050)
{
int ret;
ret = regulator_bulk_enable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs);
if (ret) {
dev_err(mpu3050->dev, "cannot enable regulators\n");
return ret;
}
/*
* 20-100 ms start-up time for register read/write according to
* the datasheet, be on the safe side and wait 200 ms.
*/
msleep(200);
/* Take device out of sleep mode */
ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
MPU3050_PWR_MGM_SLEEP, 0);
if (ret) {
regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs);
dev_err(mpu3050->dev, "error setting power mode\n");
return ret;
}
usleep_range(10000, 20000);
return 0;
}
static int mpu3050_power_down(struct mpu3050 *mpu3050)
{
int ret;
/*
* Put MPU-3050 into sleep mode before cutting regulators.
* This is important, because we may not be the sole user
* of the regulator so the power may stay on after this, and
* then we would be wasting power unless we go to sleep mode
* first.
*/
ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
MPU3050_PWR_MGM_SLEEP, MPU3050_PWR_MGM_SLEEP);
if (ret)
dev_err(mpu3050->dev, "error putting to sleep\n");
ret = regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs);
if (ret)
dev_err(mpu3050->dev, "error disabling regulators\n");
return 0;
}
static irqreturn_t mpu3050_irq_handler(int irq, void *p)
{
struct iio_trigger *trig = p;
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
if (!mpu3050->hw_irq_trigger)
return IRQ_NONE;
/* Get the time stamp as close in time as possible */
mpu3050->hw_timestamp = iio_get_time_ns(indio_dev);
return IRQ_WAKE_THREAD;
}
static irqreturn_t mpu3050_irq_thread(int irq, void *p)
{
struct iio_trigger *trig = p;
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
unsigned int val;
int ret;
/* ACK IRQ and check if it was from us */
ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val);
if (ret) {
dev_err(mpu3050->dev, "error reading IRQ status\n");
return IRQ_HANDLED;
}
if (!(val & MPU3050_INT_STATUS_RAW_RDY))
return IRQ_NONE;
iio_trigger_poll_nested(p);
return IRQ_HANDLED;
}
/**
* mpu3050_drdy_trigger_set_state() - set data ready interrupt state
* @trig: trigger instance
* @enable: true if trigger should be enabled, false to disable
*/
static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig,
bool enable)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
unsigned int val;
int ret;
/* Disabling trigger: disable interrupt and return */
if (!enable) {
/* Disable all interrupts */
ret = regmap_write(mpu3050->map,
MPU3050_INT_CFG,
0);
if (ret)
dev_err(mpu3050->dev, "error disabling IRQ\n");
/* Clear IRQ flag */
ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val);
if (ret)
dev_err(mpu3050->dev, "error clearing IRQ status\n");
/* Disable all things in the FIFO and reset it */
ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, 0);
if (ret)
dev_err(mpu3050->dev, "error disabling FIFO\n");
ret = regmap_write(mpu3050->map, MPU3050_USR_CTRL,
MPU3050_USR_CTRL_FIFO_RST);
if (ret)
dev_err(mpu3050->dev, "error resetting FIFO\n");
pm_runtime_mark_last_busy(mpu3050->dev);
pm_runtime_put_autosuspend(mpu3050->dev);
mpu3050->hw_irq_trigger = false;
return 0;
} else {
/* Else we're enabling the trigger from this point */
pm_runtime_get_sync(mpu3050->dev);
mpu3050->hw_irq_trigger = true;
/* Disable all things in the FIFO */
ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, 0);
if (ret)
return ret;
/* Reset and enable the FIFO */
ret = regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL,
MPU3050_USR_CTRL_FIFO_EN |
MPU3050_USR_CTRL_FIFO_RST,
MPU3050_USR_CTRL_FIFO_EN |
MPU3050_USR_CTRL_FIFO_RST);
if (ret)
return ret;
mpu3050->pending_fifo_footer = false;
/* Turn on the FIFO for temp+X+Y+Z */
ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN,
MPU3050_FIFO_EN_TEMP_OUT |
MPU3050_FIFO_EN_GYRO_XOUT |
MPU3050_FIFO_EN_GYRO_YOUT |
MPU3050_FIFO_EN_GYRO_ZOUT |
MPU3050_FIFO_EN_FOOTER);
if (ret)
return ret;
/* Configure the sample engine */
ret = mpu3050_start_sampling(mpu3050);
if (ret)
return ret;
/* Clear IRQ flag */
ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val);
if (ret)
dev_err(mpu3050->dev, "error clearing IRQ status\n");
/* Give us interrupts whenever there is new data ready */
val = MPU3050_INT_RAW_RDY_EN;
if (mpu3050->irq_actl)
val |= MPU3050_INT_ACTL;
if (mpu3050->irq_latch)
val |= MPU3050_INT_LATCH_EN;
if (mpu3050->irq_opendrain)
val |= MPU3050_INT_OPEN;
ret = regmap_write(mpu3050->map, MPU3050_INT_CFG, val);
if (ret)
return ret;
}
return 0;
}
static const struct iio_trigger_ops mpu3050_trigger_ops = {
.set_trigger_state = mpu3050_drdy_trigger_set_state,
};
static int mpu3050_trigger_probe(struct iio_dev *indio_dev, int irq)
{
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
struct device *dev = mpu3050->dev;
unsigned long irq_trig;
int ret;
mpu3050->trig = devm_iio_trigger_alloc(&indio_dev->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!mpu3050->trig)
return -ENOMEM;
/* Check if IRQ is open drain */
mpu3050->irq_opendrain = device_property_read_bool(dev, "drive-open-drain");
irq_trig = irqd_get_trigger_type(irq_get_irq_data(irq));
/*
* Configure the interrupt generator hardware to supply whatever
* the interrupt is configured for, edges low/high level low/high,
* we can provide it all.
*/
switch (irq_trig) {
case IRQF_TRIGGER_RISING:
dev_info(&indio_dev->dev,
"pulse interrupts on the rising edge\n");
break;
case IRQF_TRIGGER_FALLING:
mpu3050->irq_actl = true;
dev_info(&indio_dev->dev,
"pulse interrupts on the falling edge\n");
break;
case IRQF_TRIGGER_HIGH:
mpu3050->irq_latch = true;
dev_info(&indio_dev->dev,
"interrupts active high level\n");
/*
* With level IRQs, we mask the IRQ until it is processed,
* but with edge IRQs (pulses) we can queue several interrupts
* in the top half.
*/
irq_trig |= IRQF_ONESHOT;
break;
case IRQF_TRIGGER_LOW:
mpu3050->irq_latch = true;
mpu3050->irq_actl = true;
irq_trig |= IRQF_ONESHOT;
dev_info(&indio_dev->dev,
"interrupts active low level\n");
break;
default:
/* This is the most preferred mode, if possible */
dev_err(&indio_dev->dev,
"unsupported IRQ trigger specified (%lx), enforce "
"rising edge\n", irq_trig);
irq_trig = IRQF_TRIGGER_RISING;
break;
}
/* An open drain line can be shared with several devices */
if (mpu3050->irq_opendrain)
irq_trig |= IRQF_SHARED;
ret = request_threaded_irq(irq,
mpu3050_irq_handler,
mpu3050_irq_thread,
irq_trig,
mpu3050->trig->name,
mpu3050->trig);
if (ret) {
dev_err(dev, "can't get IRQ %d, error %d\n", irq, ret);
return ret;
}
mpu3050->irq = irq;
mpu3050->trig->dev.parent = dev;
mpu3050->trig->ops = &mpu3050_trigger_ops;
iio_trigger_set_drvdata(mpu3050->trig, indio_dev);
ret = iio_trigger_register(mpu3050->trig);
if (ret)
return ret;
indio_dev->trig = iio_trigger_get(mpu3050->trig);
return 0;
}
int mpu3050_common_probe(struct device *dev,
struct regmap *map,
int irq,
const char *name)
{
struct iio_dev *indio_dev;
struct mpu3050 *mpu3050;
unsigned int val;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*mpu3050));
if (!indio_dev)
return -ENOMEM;
mpu3050 = iio_priv(indio_dev);
mpu3050->dev = dev;
mpu3050->map = map;
mutex_init(&mpu3050->lock);
/* Default fullscale: 2000 degrees per second */
mpu3050->fullscale = FS_2000_DPS;
/* 1 kHz, divide by 100, default frequency = 10 Hz */
mpu3050->lpf = MPU3050_DLPF_CFG_188HZ;
mpu3050->divisor = 99;
/* Read the mounting matrix, if present */
ret = iio_read_mount_matrix(dev, &mpu3050->orientation);
if (ret)
return ret;
/* Fetch and turn on regulators */
mpu3050->regs[0].supply = mpu3050_reg_vdd;
mpu3050->regs[1].supply = mpu3050_reg_vlogic;
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(mpu3050->regs),
mpu3050->regs);
if (ret) {
dev_err(dev, "Cannot get regulators\n");
return ret;
}
ret = mpu3050_power_up(mpu3050);
if (ret)
return ret;
ret = regmap_read(map, MPU3050_CHIP_ID_REG, &val);
if (ret) {
dev_err(dev, "could not read device ID\n");
ret = -ENODEV;
goto err_power_down;
}
if ((val & MPU3050_CHIP_ID_MASK) != MPU3050_CHIP_ID) {
dev_err(dev, "unsupported chip id %02x\n",
(u8)(val & MPU3050_CHIP_ID_MASK));
ret = -ENODEV;
goto err_power_down;
}
ret = regmap_read(map, MPU3050_PRODUCT_ID_REG, &val);
if (ret) {
dev_err(dev, "could not read device ID\n");
ret = -ENODEV;
goto err_power_down;
}
dev_info(dev, "found MPU-3050 part no: %d, version: %d\n",
((val >> 4) & 0xf), (val & 0xf));
ret = mpu3050_hw_init(mpu3050);
if (ret)
goto err_power_down;
indio_dev->channels = mpu3050_channels;
indio_dev->num_channels = ARRAY_SIZE(mpu3050_channels);
indio_dev->info = &mpu3050_info;
indio_dev->available_scan_masks = mpu3050_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->name = name;
ret = iio_triggered_buffer_setup(indio_dev, iio_pollfunc_store_time,
mpu3050_trigger_handler,
&mpu3050_buffer_setup_ops);
if (ret) {
dev_err(dev, "triggered buffer setup failed\n");
goto err_power_down;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(dev, "device register failed\n");
goto err_cleanup_buffer;
}
dev_set_drvdata(dev, indio_dev);
/* Check if we have an assigned IRQ to use as trigger */
if (irq) {
ret = mpu3050_trigger_probe(indio_dev, irq);
if (ret)
dev_err(dev, "failed to register trigger\n");
}
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
/*
* Set autosuspend to two orders of magnitude larger than the
* start-up time. 100ms start-up time means 10000ms autosuspend,
* i.e. 10 seconds.
*/
pm_runtime_set_autosuspend_delay(dev, 10000);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
return 0;
err_cleanup_buffer:
iio_triggered_buffer_cleanup(indio_dev);
err_power_down:
mpu3050_power_down(mpu3050);
return ret;
}
void mpu3050_common_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct mpu3050 *mpu3050 = iio_priv(indio_dev);
pm_runtime_get_sync(dev);
pm_runtime_put_noidle(dev);
pm_runtime_disable(dev);
iio_triggered_buffer_cleanup(indio_dev);
if (mpu3050->irq)
free_irq(mpu3050->irq, mpu3050);
iio_device_unregister(indio_dev);
mpu3050_power_down(mpu3050);
}
static int mpu3050_runtime_suspend(struct device *dev)
{
return mpu3050_power_down(iio_priv(dev_get_drvdata(dev)));
}
static int mpu3050_runtime_resume(struct device *dev)
{
return mpu3050_power_up(iio_priv(dev_get_drvdata(dev)));
}
DEFINE_RUNTIME_DEV_PM_OPS(mpu3050_dev_pm_ops, mpu3050_runtime_suspend,
mpu3050_runtime_resume, NULL);
MODULE_AUTHOR("Linus Walleij");
MODULE_DESCRIPTION("MPU3050 gyroscope driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/gyro/mpu3050-core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics gyroscopes driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors.h>
#include <linux/iio/common/st_sensors_i2c.h>
#include "st_gyro.h"
static const struct of_device_id st_gyro_of_match[] = {
{
.compatible = "st,l3g4200d-gyro",
.data = L3G4200D_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330d-gyro",
.data = LSM330D_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330dl-gyro",
.data = LSM330DL_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330dlc-gyro",
.data = LSM330DLC_GYRO_DEV_NAME,
},
{
.compatible = "st,l3gd20-gyro",
.data = L3GD20_GYRO_DEV_NAME,
},
{
.compatible = "st,l3gd20h-gyro",
.data = L3GD20H_GYRO_DEV_NAME,
},
{
.compatible = "st,l3g4is-gyro",
.data = L3G4IS_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm330-gyro",
.data = LSM330_GYRO_DEV_NAME,
},
{
.compatible = "st,lsm9ds0-gyro",
.data = LSM9DS0_GYRO_DEV_NAME,
},
{},
};
MODULE_DEVICE_TABLE(of, st_gyro_of_match);
static int st_gyro_i2c_probe(struct i2c_client *client)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *gdata;
struct iio_dev *indio_dev;
int err;
st_sensors_dev_name_probe(&client->dev, client->name, sizeof(client->name));
settings = st_gyro_get_settings(client->name);
if (!settings) {
dev_err(&client->dev, "device name %s not recognized.\n",
client->name);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*gdata));
if (!indio_dev)
return -ENOMEM;
gdata = iio_priv(indio_dev);
gdata->sensor_settings = (struct st_sensor_settings *)settings;
err = st_sensors_i2c_configure(indio_dev, client);
if (err < 0)
return err;
err = st_sensors_power_enable(indio_dev);
if (err)
return err;
return st_gyro_common_probe(indio_dev);
}
static const struct i2c_device_id st_gyro_id_table[] = {
{ L3G4200D_GYRO_DEV_NAME },
{ LSM330D_GYRO_DEV_NAME },
{ LSM330DL_GYRO_DEV_NAME },
{ LSM330DLC_GYRO_DEV_NAME },
{ L3GD20_GYRO_DEV_NAME },
{ L3GD20H_GYRO_DEV_NAME },
{ L3G4IS_GYRO_DEV_NAME },
{ LSM330_GYRO_DEV_NAME },
{ LSM9DS0_GYRO_DEV_NAME },
{},
};
MODULE_DEVICE_TABLE(i2c, st_gyro_id_table);
static struct i2c_driver st_gyro_driver = {
.driver = {
.name = "st-gyro-i2c",
.of_match_table = st_gyro_of_match,
},
.probe = st_gyro_i2c_probe,
.id_table = st_gyro_id_table,
};
module_i2c_driver(st_gyro_driver);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics gyroscopes i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/gyro/st_gyro_i2c.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADIS16260/ADIS16265 Programmable Digital Gyroscope Sensor Driver
*
* Copyright 2010 Analog Devices Inc.
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#define ADIS16260_STARTUP_DELAY 220 /* ms */
#define ADIS16260_FLASH_CNT 0x00 /* Flash memory write count */
#define ADIS16260_SUPPLY_OUT 0x02 /* Power supply measurement */
#define ADIS16260_GYRO_OUT 0x04 /* X-axis gyroscope output */
#define ADIS16260_AUX_ADC 0x0A /* analog input channel measurement */
#define ADIS16260_TEMP_OUT 0x0C /* internal temperature measurement */
#define ADIS16260_ANGL_OUT 0x0E /* angle displacement */
#define ADIS16260_GYRO_OFF 0x14 /* Calibration, offset/bias adjustment */
#define ADIS16260_GYRO_SCALE 0x16 /* Calibration, scale adjustment */
#define ADIS16260_ALM_MAG1 0x20 /* Alarm 1 magnitude/polarity setting */
#define ADIS16260_ALM_MAG2 0x22 /* Alarm 2 magnitude/polarity setting */
#define ADIS16260_ALM_SMPL1 0x24 /* Alarm 1 dynamic rate of change setting */
#define ADIS16260_ALM_SMPL2 0x26 /* Alarm 2 dynamic rate of change setting */
#define ADIS16260_ALM_CTRL 0x28 /* Alarm control */
#define ADIS16260_AUX_DAC 0x30 /* Auxiliary DAC data */
#define ADIS16260_GPIO_CTRL 0x32 /* Control, digital I/O line */
#define ADIS16260_MSC_CTRL 0x34 /* Control, data ready, self-test settings */
#define ADIS16260_SMPL_PRD 0x36 /* Control, internal sample rate */
#define ADIS16260_SENS_AVG 0x38 /* Control, dynamic range, filtering */
#define ADIS16260_SLP_CNT 0x3A /* Control, sleep mode initiation */
#define ADIS16260_DIAG_STAT 0x3C /* Diagnostic, error flags */
#define ADIS16260_GLOB_CMD 0x3E /* Control, global commands */
#define ADIS16260_LOT_ID1 0x52 /* Lot Identification Code 1 */
#define ADIS16260_LOT_ID2 0x54 /* Lot Identification Code 2 */
#define ADIS16260_PROD_ID 0x56 /* Product identifier;
* convert to decimal = 16,265/16,260 */
#define ADIS16260_SERIAL_NUM 0x58 /* Serial number */
#define ADIS16260_ERROR_ACTIVE (1<<14)
#define ADIS16260_NEW_DATA (1<<15)
/* MSC_CTRL */
#define ADIS16260_MSC_CTRL_MEM_TEST (1<<11)
/* Internal self-test enable */
#define ADIS16260_MSC_CTRL_INT_SELF_TEST (1<<10)
#define ADIS16260_MSC_CTRL_NEG_SELF_TEST (1<<9)
#define ADIS16260_MSC_CTRL_POS_SELF_TEST (1<<8)
#define ADIS16260_MSC_CTRL_DATA_RDY_EN (1<<2)
#define ADIS16260_MSC_CTRL_DATA_RDY_POL_HIGH (1<<1)
#define ADIS16260_MSC_CTRL_DATA_RDY_DIO2 (1<<0)
/* SMPL_PRD */
/* Time base (tB): 0 = 1.953 ms, 1 = 60.54 ms */
#define ADIS16260_SMPL_PRD_TIME_BASE (1<<7)
#define ADIS16260_SMPL_PRD_DIV_MASK 0x7F
/* SLP_CNT */
#define ADIS16260_SLP_CNT_POWER_OFF 0x80
/* DIAG_STAT */
#define ADIS16260_DIAG_STAT_ALARM2 (1<<9)
#define ADIS16260_DIAG_STAT_ALARM1 (1<<8)
#define ADIS16260_DIAG_STAT_FLASH_CHK_BIT 6
#define ADIS16260_DIAG_STAT_SELF_TEST_BIT 5
#define ADIS16260_DIAG_STAT_OVERFLOW_BIT 4
#define ADIS16260_DIAG_STAT_SPI_FAIL_BIT 3
#define ADIS16260_DIAG_STAT_FLASH_UPT_BIT 2
#define ADIS16260_DIAG_STAT_POWER_HIGH_BIT 1
#define ADIS16260_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
#define ADIS16260_GLOB_CMD_SW_RESET (1<<7)
#define ADIS16260_GLOB_CMD_FLASH_UPD (1<<3)
#define ADIS16260_GLOB_CMD_DAC_LATCH (1<<2)
#define ADIS16260_GLOB_CMD_FAC_CALIB (1<<1)
#define ADIS16260_GLOB_CMD_AUTO_NULL (1<<0)
#define ADIS16260_SPI_SLOW (u32)(300 * 1000)
#define ADIS16260_SPI_BURST (u32)(1000 * 1000)
#define ADIS16260_SPI_FAST (u32)(2000 * 1000)
/* At the moment triggers are only used for ring buffer
* filling. This may change!
*/
#define ADIS16260_SCAN_GYRO 0
#define ADIS16260_SCAN_SUPPLY 1
#define ADIS16260_SCAN_AUX_ADC 2
#define ADIS16260_SCAN_TEMP 3
#define ADIS16260_SCAN_ANGL 4
struct adis16260_chip_info {
unsigned int gyro_max_val;
unsigned int gyro_max_scale;
const struct iio_chan_spec *channels;
unsigned int num_channels;
};
struct adis16260 {
const struct adis16260_chip_info *info;
struct adis adis;
};
enum adis16260_type {
ADIS16251,
ADIS16260,
ADIS16266,
};
static const struct iio_chan_spec adis16260_channels[] = {
ADIS_GYRO_CHAN(X, ADIS16260_GYRO_OUT, ADIS16260_SCAN_GYRO,
BIT(IIO_CHAN_INFO_CALIBBIAS) |
BIT(IIO_CHAN_INFO_CALIBSCALE),
BIT(IIO_CHAN_INFO_SAMP_FREQ), 14),
ADIS_INCLI_CHAN(X, ADIS16260_ANGL_OUT, ADIS16260_SCAN_ANGL, 0,
BIT(IIO_CHAN_INFO_SAMP_FREQ), 14),
ADIS_TEMP_CHAN(ADIS16260_TEMP_OUT, ADIS16260_SCAN_TEMP,
BIT(IIO_CHAN_INFO_SAMP_FREQ), 12),
ADIS_SUPPLY_CHAN(ADIS16260_SUPPLY_OUT, ADIS16260_SCAN_SUPPLY,
BIT(IIO_CHAN_INFO_SAMP_FREQ), 12),
ADIS_AUX_ADC_CHAN(ADIS16260_AUX_ADC, ADIS16260_SCAN_AUX_ADC,
BIT(IIO_CHAN_INFO_SAMP_FREQ), 12),
IIO_CHAN_SOFT_TIMESTAMP(5),
};
static const struct iio_chan_spec adis16266_channels[] = {
ADIS_GYRO_CHAN(X, ADIS16260_GYRO_OUT, ADIS16260_SCAN_GYRO,
BIT(IIO_CHAN_INFO_CALIBBIAS) |
BIT(IIO_CHAN_INFO_CALIBSCALE),
BIT(IIO_CHAN_INFO_SAMP_FREQ), 14),
ADIS_TEMP_CHAN(ADIS16260_TEMP_OUT, ADIS16260_SCAN_TEMP,
BIT(IIO_CHAN_INFO_SAMP_FREQ), 12),
ADIS_SUPPLY_CHAN(ADIS16260_SUPPLY_OUT, ADIS16260_SCAN_SUPPLY,
BIT(IIO_CHAN_INFO_SAMP_FREQ), 12),
ADIS_AUX_ADC_CHAN(ADIS16260_AUX_ADC, ADIS16260_SCAN_AUX_ADC,
BIT(IIO_CHAN_INFO_SAMP_FREQ), 12),
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct adis16260_chip_info adis16260_chip_info_table[] = {
[ADIS16251] = {
.gyro_max_scale = 80,
.gyro_max_val = IIO_RAD_TO_DEGREE(4368),
.channels = adis16260_channels,
.num_channels = ARRAY_SIZE(adis16260_channels),
},
[ADIS16260] = {
.gyro_max_scale = 320,
.gyro_max_val = IIO_RAD_TO_DEGREE(4368),
.channels = adis16260_channels,
.num_channels = ARRAY_SIZE(adis16260_channels),
},
[ADIS16266] = {
.gyro_max_scale = 14000,
.gyro_max_val = IIO_RAD_TO_DEGREE(3357),
.channels = adis16266_channels,
.num_channels = ARRAY_SIZE(adis16266_channels),
},
};
/* Power down the device */
static int adis16260_stop_device(struct iio_dev *indio_dev)
{
struct adis16260 *adis16260 = iio_priv(indio_dev);
int ret;
u16 val = ADIS16260_SLP_CNT_POWER_OFF;
ret = adis_write_reg_16(&adis16260->adis, ADIS16260_SLP_CNT, val);
if (ret)
dev_err(&indio_dev->dev, "problem with turning device off: SLP_CNT");
return ret;
}
static const u8 adis16260_addresses[][2] = {
[ADIS16260_SCAN_GYRO] = { ADIS16260_GYRO_OFF, ADIS16260_GYRO_SCALE },
};
static int adis16260_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct adis16260 *adis16260 = iio_priv(indio_dev);
const struct adis16260_chip_info *info = adis16260->info;
struct adis *adis = &adis16260->adis;
int ret;
u8 addr;
s16 val16;
switch (mask) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan,
ADIS16260_ERROR_ACTIVE, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = info->gyro_max_scale;
*val2 = info->gyro_max_val;
return IIO_VAL_FRACTIONAL;
case IIO_INCLI:
*val = 0;
*val2 = IIO_DEGREE_TO_RAD(36630);
return IIO_VAL_INT_PLUS_MICRO;
case IIO_VOLTAGE:
if (chan->channel == 0) {
*val = 1;
*val2 = 831500; /* 1.8315 mV */
} else {
*val = 0;
*val2 = 610500; /* 610.5 uV */
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = 145;
*val2 = 300000; /* 0.1453 C */
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
*val = 250000 / 1453; /* 25 C = 0x00 */
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBBIAS:
addr = adis16260_addresses[chan->scan_index][0];
ret = adis_read_reg_16(adis, addr, &val16);
if (ret)
return ret;
*val = sign_extend32(val16, 11);
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBSCALE:
addr = adis16260_addresses[chan->scan_index][1];
ret = adis_read_reg_16(adis, addr, &val16);
if (ret)
return ret;
*val = val16;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = adis_read_reg_16(adis, ADIS16260_SMPL_PRD, &val16);
if (ret)
return ret;
if (spi_get_device_id(adis->spi)->driver_data)
/* If an adis16251 */
*val = (val16 & ADIS16260_SMPL_PRD_TIME_BASE) ?
8 : 256;
else
*val = (val16 & ADIS16260_SMPL_PRD_TIME_BASE) ?
66 : 2048;
*val /= (val16 & ADIS16260_SMPL_PRD_DIV_MASK) + 1;
return IIO_VAL_INT;
}
return -EINVAL;
}
static int adis16260_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct adis16260 *adis16260 = iio_priv(indio_dev);
struct adis *adis = &adis16260->adis;
int ret;
u8 addr;
u8 t;
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
if (val < -2048 || val >= 2048)
return -EINVAL;
addr = adis16260_addresses[chan->scan_index][0];
return adis_write_reg_16(adis, addr, val);
case IIO_CHAN_INFO_CALIBSCALE:
if (val < 0 || val >= 4096)
return -EINVAL;
addr = adis16260_addresses[chan->scan_index][1];
return adis_write_reg_16(adis, addr, val);
case IIO_CHAN_INFO_SAMP_FREQ:
adis_dev_lock(adis);
if (spi_get_device_id(adis->spi)->driver_data)
t = 256 / val;
else
t = 2048 / val;
if (t > ADIS16260_SMPL_PRD_DIV_MASK)
t = ADIS16260_SMPL_PRD_DIV_MASK;
else if (t > 0)
t--;
if (t >= 0x0A)
adis->spi->max_speed_hz = ADIS16260_SPI_SLOW;
else
adis->spi->max_speed_hz = ADIS16260_SPI_FAST;
ret = __adis_write_reg_8(adis, ADIS16260_SMPL_PRD, t);
adis_dev_unlock(adis);
return ret;
}
return -EINVAL;
}
static const struct iio_info adis16260_info = {
.read_raw = &adis16260_read_raw,
.write_raw = &adis16260_write_raw,
.update_scan_mode = adis_update_scan_mode,
};
static const char * const adis1620_status_error_msgs[] = {
[ADIS16260_DIAG_STAT_FLASH_CHK_BIT] = "Flash checksum error",
[ADIS16260_DIAG_STAT_SELF_TEST_BIT] = "Self test error",
[ADIS16260_DIAG_STAT_OVERFLOW_BIT] = "Sensor overrange",
[ADIS16260_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
[ADIS16260_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
[ADIS16260_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 5.25",
[ADIS16260_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 4.75",
};
static const struct adis_timeout adis16260_timeouts = {
.reset_ms = ADIS16260_STARTUP_DELAY,
.sw_reset_ms = ADIS16260_STARTUP_DELAY,
.self_test_ms = ADIS16260_STARTUP_DELAY,
};
static const struct adis_data adis16260_data = {
.write_delay = 30,
.read_delay = 30,
.msc_ctrl_reg = ADIS16260_MSC_CTRL,
.glob_cmd_reg = ADIS16260_GLOB_CMD,
.diag_stat_reg = ADIS16260_DIAG_STAT,
.self_test_mask = ADIS16260_MSC_CTRL_MEM_TEST,
.self_test_reg = ADIS16260_MSC_CTRL,
.timeouts = &adis16260_timeouts,
.status_error_msgs = adis1620_status_error_msgs,
.status_error_mask = BIT(ADIS16260_DIAG_STAT_FLASH_CHK_BIT) |
BIT(ADIS16260_DIAG_STAT_SELF_TEST_BIT) |
BIT(ADIS16260_DIAG_STAT_OVERFLOW_BIT) |
BIT(ADIS16260_DIAG_STAT_SPI_FAIL_BIT) |
BIT(ADIS16260_DIAG_STAT_FLASH_UPT_BIT) |
BIT(ADIS16260_DIAG_STAT_POWER_HIGH_BIT) |
BIT(ADIS16260_DIAG_STAT_POWER_LOW_BIT),
};
static void adis16260_stop(void *data)
{
adis16260_stop_device(data);
}
static int adis16260_probe(struct spi_device *spi)
{
const struct spi_device_id *id;
struct adis16260 *adis16260;
struct iio_dev *indio_dev;
int ret;
id = spi_get_device_id(spi);
if (!id)
return -ENODEV;
/* setup the industrialio driver allocated elements */
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adis16260));
if (!indio_dev)
return -ENOMEM;
adis16260 = iio_priv(indio_dev);
/* this is only used for removal purposes */
spi_set_drvdata(spi, indio_dev);
adis16260->info = &adis16260_chip_info_table[id->driver_data];
indio_dev->name = id->name;
indio_dev->info = &adis16260_info;
indio_dev->channels = adis16260->info->channels;
indio_dev->num_channels = adis16260->info->num_channels;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = adis_init(&adis16260->adis, indio_dev, spi, &adis16260_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(&adis16260->adis, indio_dev, NULL);
if (ret)
return ret;
/* Get the device into a sane initial state */
ret = __adis_initial_startup(&adis16260->adis);
if (ret)
return ret;
ret = devm_add_action_or_reset(&spi->dev, adis16260_stop, indio_dev);
if (ret)
return ret;
return devm_iio_device_register(&spi->dev, indio_dev);
}
/*
* These parts do not need to be differentiated until someone adds
* support for the on chip filtering.
*/
static const struct spi_device_id adis16260_id[] = {
{"adis16260", ADIS16260},
{"adis16265", ADIS16260},
{"adis16266", ADIS16266},
{"adis16250", ADIS16260},
{"adis16255", ADIS16260},
{"adis16251", ADIS16251},
{}
};
MODULE_DEVICE_TABLE(spi, adis16260_id);
static struct spi_driver adis16260_driver = {
.driver = {
.name = "adis16260",
},
.probe = adis16260_probe,
.id_table = adis16260_id,
};
module_spi_driver(adis16260_driver);
MODULE_AUTHOR("Barry Song <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16260/5 Digital Gyroscope Sensor");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/gyro/adis16260.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics gyroscopes driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/common/st_sensors.h>
#include "st_gyro.h"
int st_gyro_trig_set_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
return st_sensors_set_dataready_irq(indio_dev, state);
}
static int st_gyro_buffer_postenable(struct iio_dev *indio_dev)
{
int err;
err = st_sensors_set_axis_enable(indio_dev, indio_dev->active_scan_mask[0]);
if (err < 0)
return err;
err = st_sensors_set_enable(indio_dev, true);
if (err < 0)
goto st_gyro_buffer_enable_all_axis;
return 0;
st_gyro_buffer_enable_all_axis:
st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS);
return err;
}
static int st_gyro_buffer_predisable(struct iio_dev *indio_dev)
{
int err;
err = st_sensors_set_enable(indio_dev, false);
if (err < 0)
return err;
return st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS);
}
static const struct iio_buffer_setup_ops st_gyro_buffer_setup_ops = {
.postenable = &st_gyro_buffer_postenable,
.predisable = &st_gyro_buffer_predisable,
};
int st_gyro_allocate_ring(struct iio_dev *indio_dev)
{
return devm_iio_triggered_buffer_setup(indio_dev->dev.parent, indio_dev,
NULL, &st_sensors_trigger_handler, &st_gyro_buffer_setup_ops);
}
| linux-master | drivers/iio/gyro/st_gyro_buffer.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Freescale MPL115A1 pressure/temperature sensor
*
* Copyright (c) 2016 Akinobu Mita <[email protected]>
*
* Datasheet: http://www.nxp.com/files/sensors/doc/data_sheet/MPL115A1.pdf
*/
#include <linux/module.h>
#include <linux/spi/spi.h>
#include "mpl115.h"
#define MPL115_SPI_WRITE(address) ((address) << 1)
#define MPL115_SPI_READ(address) (0x80 | (address) << 1)
struct mpl115_spi_buf {
u8 tx[4];
u8 rx[4];
};
static int mpl115_spi_init(struct device *dev)
{
struct spi_device *spi = to_spi_device(dev);
struct mpl115_spi_buf *buf;
buf = devm_kzalloc(dev, sizeof(*buf), GFP_KERNEL);
if (!buf)
return -ENOMEM;
spi_set_drvdata(spi, buf);
return 0;
}
static int mpl115_spi_read(struct device *dev, u8 address)
{
struct spi_device *spi = to_spi_device(dev);
struct mpl115_spi_buf *buf = spi_get_drvdata(spi);
struct spi_transfer xfer = {
.tx_buf = buf->tx,
.rx_buf = buf->rx,
.len = 4,
};
int ret;
buf->tx[0] = MPL115_SPI_READ(address);
buf->tx[2] = MPL115_SPI_READ(address + 1);
ret = spi_sync_transfer(spi, &xfer, 1);
if (ret)
return ret;
return (buf->rx[1] << 8) | buf->rx[3];
}
static int mpl115_spi_write(struct device *dev, u8 address, u8 value)
{
struct spi_device *spi = to_spi_device(dev);
struct mpl115_spi_buf *buf = spi_get_drvdata(spi);
struct spi_transfer xfer = {
.tx_buf = buf->tx,
.len = 2,
};
buf->tx[0] = MPL115_SPI_WRITE(address);
buf->tx[1] = value;
return spi_sync_transfer(spi, &xfer, 1);
}
static const struct mpl115_ops mpl115_spi_ops = {
.init = mpl115_spi_init,
.read = mpl115_spi_read,
.write = mpl115_spi_write,
};
static int mpl115_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
return mpl115_probe(&spi->dev, id->name, &mpl115_spi_ops);
}
static const struct spi_device_id mpl115_spi_ids[] = {
{ "mpl115", 0 },
{}
};
MODULE_DEVICE_TABLE(spi, mpl115_spi_ids);
static struct spi_driver mpl115_spi_driver = {
.driver = {
.name = "mpl115",
.pm = pm_ptr(&mpl115_dev_pm_ops),
},
.probe = mpl115_spi_probe,
.id_table = mpl115_spi_ids,
};
module_spi_driver(mpl115_spi_driver);
MODULE_AUTHOR("Akinobu Mita <[email protected]>");
MODULE_DESCRIPTION("Freescale MPL115A1 pressure/temperature driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_MPL115);
| linux-master | drivers/iio/pressure/mpl115_spi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 InvenSense, Inc.
*
* Driver for InvenSense ICP-1010xx barometric pressure and temperature sensor.
*
* Datasheet:
* http://www.invensense.com/wp-content/uploads/2018/01/DS-000186-ICP-101xx-v1.2.pdf
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/i2c.h>
#include <linux/pm_runtime.h>
#include <linux/crc8.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/log2.h>
#include <linux/math64.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/iio.h>
#define ICP10100_ID_REG_GET(_reg) ((_reg) & 0x003F)
#define ICP10100_ID_REG 0x08
#define ICP10100_RESPONSE_WORD_LENGTH 3
#define ICP10100_CRC8_WORD_LENGTH 2
#define ICP10100_CRC8_POLYNOMIAL 0x31
#define ICP10100_CRC8_INIT 0xFF
enum icp10100_mode {
ICP10100_MODE_LP, /* Low power mode: 1x sampling */
ICP10100_MODE_N, /* Normal mode: 2x sampling */
ICP10100_MODE_LN, /* Low noise mode: 4x sampling */
ICP10100_MODE_ULN, /* Ultra low noise mode: 8x sampling */
ICP10100_MODE_NB,
};
struct icp10100_state {
struct mutex lock;
struct i2c_client *client;
struct regulator *vdd;
enum icp10100_mode mode;
int16_t cal[4];
};
struct icp10100_command {
__be16 cmd;
unsigned long wait_us;
unsigned long wait_max_us;
size_t response_word_nb;
};
static const struct icp10100_command icp10100_cmd_soft_reset = {
.cmd = cpu_to_be16(0x805D),
.wait_us = 170,
.wait_max_us = 200,
.response_word_nb = 0,
};
static const struct icp10100_command icp10100_cmd_read_id = {
.cmd = cpu_to_be16(0xEFC8),
.wait_us = 0,
.response_word_nb = 1,
};
static const struct icp10100_command icp10100_cmd_read_otp = {
.cmd = cpu_to_be16(0xC7F7),
.wait_us = 0,
.response_word_nb = 1,
};
static const struct icp10100_command icp10100_cmd_measure[] = {
[ICP10100_MODE_LP] = {
.cmd = cpu_to_be16(0x401A),
.wait_us = 1800,
.wait_max_us = 2000,
.response_word_nb = 3,
},
[ICP10100_MODE_N] = {
.cmd = cpu_to_be16(0x48A3),
.wait_us = 6300,
.wait_max_us = 6500,
.response_word_nb = 3,
},
[ICP10100_MODE_LN] = {
.cmd = cpu_to_be16(0x5059),
.wait_us = 23800,
.wait_max_us = 24000,
.response_word_nb = 3,
},
[ICP10100_MODE_ULN] = {
.cmd = cpu_to_be16(0x58E0),
.wait_us = 94500,
.wait_max_us = 94700,
.response_word_nb = 3,
},
};
static const uint8_t icp10100_switch_mode_otp[] =
{0xC5, 0x95, 0x00, 0x66, 0x9c};
DECLARE_CRC8_TABLE(icp10100_crc8_table);
static inline int icp10100_i2c_xfer(struct i2c_adapter *adap,
struct i2c_msg *msgs, int num)
{
int ret;
ret = i2c_transfer(adap, msgs, num);
if (ret < 0)
return ret;
if (ret != num)
return -EIO;
return 0;
}
static int icp10100_send_cmd(struct icp10100_state *st,
const struct icp10100_command *cmd,
__be16 *buf, size_t buf_len)
{
size_t size = cmd->response_word_nb * ICP10100_RESPONSE_WORD_LENGTH;
uint8_t data[16];
uint8_t *ptr;
uint8_t *buf_ptr = (uint8_t *)buf;
struct i2c_msg msgs[2] = {
{
.addr = st->client->addr,
.flags = 0,
.len = 2,
.buf = (uint8_t *)&cmd->cmd,
}, {
.addr = st->client->addr,
.flags = I2C_M_RD,
.len = size,
.buf = data,
},
};
uint8_t crc;
unsigned int i;
int ret;
if (size > sizeof(data))
return -EINVAL;
if (cmd->response_word_nb > 0 &&
(buf == NULL || buf_len < (cmd->response_word_nb * 2)))
return -EINVAL;
dev_dbg(&st->client->dev, "sending cmd %#x\n", be16_to_cpu(cmd->cmd));
if (cmd->response_word_nb > 0 && cmd->wait_us == 0) {
/* direct command-response without waiting */
ret = icp10100_i2c_xfer(st->client->adapter, msgs,
ARRAY_SIZE(msgs));
if (ret)
return ret;
} else {
/* transfer command write */
ret = icp10100_i2c_xfer(st->client->adapter, &msgs[0], 1);
if (ret)
return ret;
if (cmd->wait_us > 0)
usleep_range(cmd->wait_us, cmd->wait_max_us);
/* transfer response read if needed */
if (cmd->response_word_nb > 0) {
ret = icp10100_i2c_xfer(st->client->adapter, &msgs[1], 1);
if (ret)
return ret;
} else {
return 0;
}
}
/* process read words with crc checking */
for (i = 0; i < cmd->response_word_nb; ++i) {
ptr = &data[i * ICP10100_RESPONSE_WORD_LENGTH];
crc = crc8(icp10100_crc8_table, ptr, ICP10100_CRC8_WORD_LENGTH,
ICP10100_CRC8_INIT);
if (crc != ptr[ICP10100_CRC8_WORD_LENGTH]) {
dev_err(&st->client->dev, "crc error recv=%#x calc=%#x\n",
ptr[ICP10100_CRC8_WORD_LENGTH], crc);
return -EIO;
}
*buf_ptr++ = ptr[0];
*buf_ptr++ = ptr[1];
}
return 0;
}
static int icp10100_read_cal_otp(struct icp10100_state *st)
{
__be16 val;
int i;
int ret;
/* switch into OTP read mode */
ret = i2c_master_send(st->client, icp10100_switch_mode_otp,
ARRAY_SIZE(icp10100_switch_mode_otp));
if (ret < 0)
return ret;
if (ret != ARRAY_SIZE(icp10100_switch_mode_otp))
return -EIO;
/* read 4 calibration values */
for (i = 0; i < 4; ++i) {
ret = icp10100_send_cmd(st, &icp10100_cmd_read_otp,
&val, sizeof(val));
if (ret)
return ret;
st->cal[i] = be16_to_cpu(val);
dev_dbg(&st->client->dev, "cal[%d] = %d\n", i, st->cal[i]);
}
return 0;
}
static int icp10100_init_chip(struct icp10100_state *st)
{
__be16 val;
uint16_t id;
int ret;
/* read and check id */
ret = icp10100_send_cmd(st, &icp10100_cmd_read_id, &val, sizeof(val));
if (ret)
return ret;
id = ICP10100_ID_REG_GET(be16_to_cpu(val));
if (id != ICP10100_ID_REG) {
dev_err(&st->client->dev, "invalid id %#x\n", id);
return -ENODEV;
}
/* read calibration data from OTP */
ret = icp10100_read_cal_otp(st);
if (ret)
return ret;
/* reset chip */
return icp10100_send_cmd(st, &icp10100_cmd_soft_reset, NULL, 0);
}
static int icp10100_get_measures(struct icp10100_state *st,
uint32_t *pressure, uint16_t *temperature)
{
const struct icp10100_command *cmd;
__be16 measures[3];
int ret;
ret = pm_runtime_resume_and_get(&st->client->dev);
if (ret < 0)
return ret;
mutex_lock(&st->lock);
cmd = &icp10100_cmd_measure[st->mode];
ret = icp10100_send_cmd(st, cmd, measures, sizeof(measures));
mutex_unlock(&st->lock);
if (ret)
goto error_measure;
*pressure = (be16_to_cpu(measures[0]) << 8) |
(be16_to_cpu(measures[1]) >> 8);
*temperature = be16_to_cpu(measures[2]);
pm_runtime_mark_last_busy(&st->client->dev);
error_measure:
pm_runtime_put_autosuspend(&st->client->dev);
return ret;
}
static uint32_t icp10100_get_pressure(struct icp10100_state *st,
uint32_t raw_pressure, uint16_t raw_temp)
{
static int32_t p_calib[] = {45000, 80000, 105000};
static int32_t lut_lower = 3670016;
static int32_t lut_upper = 12058624;
static int32_t inv_quadr_factor = 16777216;
static int32_t offset_factor = 2048;
int64_t val1, val2;
int32_t p_lut[3];
int32_t t, t_square;
int64_t a, b, c;
uint32_t pressure_mPa;
dev_dbg(&st->client->dev, "raw: pressure = %u, temp = %u\n",
raw_pressure, raw_temp);
/* compute p_lut values */
t = (int32_t)raw_temp - 32768;
t_square = t * t;
val1 = (int64_t)st->cal[0] * (int64_t)t_square;
p_lut[0] = lut_lower + (int32_t)div_s64(val1, inv_quadr_factor);
val1 = (int64_t)st->cal[1] * (int64_t)t_square;
p_lut[1] = offset_factor * st->cal[3] +
(int32_t)div_s64(val1, inv_quadr_factor);
val1 = (int64_t)st->cal[2] * (int64_t)t_square;
p_lut[2] = lut_upper + (int32_t)div_s64(val1, inv_quadr_factor);
dev_dbg(&st->client->dev, "p_lut = [%d, %d, %d]\n",
p_lut[0], p_lut[1], p_lut[2]);
/* compute a, b, c factors */
val1 = (int64_t)p_lut[0] * (int64_t)p_lut[1] *
(int64_t)(p_calib[0] - p_calib[1]) +
(int64_t)p_lut[1] * (int64_t)p_lut[2] *
(int64_t)(p_calib[1] - p_calib[2]) +
(int64_t)p_lut[2] * (int64_t)p_lut[0] *
(int64_t)(p_calib[2] - p_calib[0]);
val2 = (int64_t)p_lut[2] * (int64_t)(p_calib[0] - p_calib[1]) +
(int64_t)p_lut[0] * (int64_t)(p_calib[1] - p_calib[2]) +
(int64_t)p_lut[1] * (int64_t)(p_calib[2] - p_calib[0]);
c = div64_s64(val1, val2);
dev_dbg(&st->client->dev, "val1 = %lld, val2 = %lld, c = %lld\n",
val1, val2, c);
val1 = (int64_t)p_calib[0] * (int64_t)p_lut[0] -
(int64_t)p_calib[1] * (int64_t)p_lut[1] -
(int64_t)(p_calib[1] - p_calib[0]) * c;
val2 = (int64_t)p_lut[0] - (int64_t)p_lut[1];
a = div64_s64(val1, val2);
dev_dbg(&st->client->dev, "val1 = %lld, val2 = %lld, a = %lld\n",
val1, val2, a);
b = ((int64_t)p_calib[0] - a) * ((int64_t)p_lut[0] + c);
dev_dbg(&st->client->dev, "b = %lld\n", b);
/*
* pressure_Pa = a + (b / (c + raw_pressure))
* pressure_mPa = 1000 * pressure_Pa
*/
pressure_mPa = 1000LL * a + div64_s64(1000LL * b, c + raw_pressure);
return pressure_mPa;
}
static int icp10100_read_raw_measures(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2)
{
struct icp10100_state *st = iio_priv(indio_dev);
uint32_t raw_pressure;
uint16_t raw_temp;
uint32_t pressure_mPa;
int ret;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = icp10100_get_measures(st, &raw_pressure, &raw_temp);
if (ret)
goto error_release;
switch (chan->type) {
case IIO_PRESSURE:
pressure_mPa = icp10100_get_pressure(st, raw_pressure,
raw_temp);
/* mPa to kPa */
*val = pressure_mPa / 1000000;
*val2 = pressure_mPa % 1000000;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
case IIO_TEMP:
*val = raw_temp;
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
break;
}
error_release:
iio_device_release_direct_mode(indio_dev);
return ret;
}
static int icp10100_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct icp10100_state *st = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
case IIO_CHAN_INFO_PROCESSED:
return icp10100_read_raw_measures(indio_dev, chan, val, val2);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
/* 1000 * 175°C / 65536 in m°C */
*val = 2;
*val2 = 670288;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
/* 1000 * -45°C in m°C */
*val = -45000;
return IIO_VAL_INT;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
mutex_lock(&st->lock);
*val = 1 << st->mode;
mutex_unlock(&st->lock);
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int icp10100_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
static int oversamplings[] = {1, 2, 4, 8};
switch (mask) {
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
*vals = oversamplings;
*type = IIO_VAL_INT;
*length = ARRAY_SIZE(oversamplings);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int icp10100_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct icp10100_state *st = iio_priv(indio_dev);
unsigned int mode;
int ret;
switch (mask) {
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
/* oversampling is always positive and a power of 2 */
if (val <= 0 || !is_power_of_2(val))
return -EINVAL;
mode = ilog2(val);
if (mode >= ICP10100_MODE_NB)
return -EINVAL;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
st->mode = mode;
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return 0;
default:
return -EINVAL;
}
}
static int icp10100_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static const struct iio_info icp10100_info = {
.read_raw = icp10100_read_raw,
.read_avail = icp10100_read_avail,
.write_raw = icp10100_write_raw,
.write_raw_get_fmt = icp10100_write_raw_get_fmt,
};
static const struct iio_chan_spec icp10100_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
.info_mask_shared_by_all =
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all_available =
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
}, {
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.info_mask_shared_by_all =
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all_available =
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
},
};
static int icp10100_enable_regulator(struct icp10100_state *st)
{
int ret;
ret = regulator_enable(st->vdd);
if (ret)
return ret;
msleep(100);
return 0;
}
static void icp10100_disable_regulator_action(void *data)
{
struct icp10100_state *st = data;
int ret;
ret = regulator_disable(st->vdd);
if (ret)
dev_err(&st->client->dev, "error %d disabling vdd\n", ret);
}
static void icp10100_pm_disable(void *data)
{
struct device *dev = data;
pm_runtime_disable(dev);
}
static int icp10100_probe(struct i2c_client *client)
{
struct iio_dev *indio_dev;
struct icp10100_state *st;
int ret;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "plain i2c transactions not supported\n");
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
i2c_set_clientdata(client, indio_dev);
indio_dev->name = client->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = icp10100_channels;
indio_dev->num_channels = ARRAY_SIZE(icp10100_channels);
indio_dev->info = &icp10100_info;
st = iio_priv(indio_dev);
mutex_init(&st->lock);
st->client = client;
st->mode = ICP10100_MODE_N;
st->vdd = devm_regulator_get(&client->dev, "vdd");
if (IS_ERR(st->vdd))
return PTR_ERR(st->vdd);
ret = icp10100_enable_regulator(st);
if (ret)
return ret;
ret = devm_add_action_or_reset(&client->dev,
icp10100_disable_regulator_action, st);
if (ret)
return ret;
/* has to be done before the first i2c communication */
crc8_populate_msb(icp10100_crc8_table, ICP10100_CRC8_POLYNOMIAL);
ret = icp10100_init_chip(st);
if (ret) {
dev_err(&client->dev, "init chip error %d\n", ret);
return ret;
}
/* enable runtime pm with autosuspend delay of 2s */
pm_runtime_get_noresume(&client->dev);
pm_runtime_set_active(&client->dev);
pm_runtime_enable(&client->dev);
pm_runtime_set_autosuspend_delay(&client->dev, 2000);
pm_runtime_use_autosuspend(&client->dev);
pm_runtime_put(&client->dev);
ret = devm_add_action_or_reset(&client->dev, icp10100_pm_disable,
&client->dev);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int icp10100_suspend(struct device *dev)
{
struct icp10100_state *st = iio_priv(dev_get_drvdata(dev));
int ret;
mutex_lock(&st->lock);
ret = regulator_disable(st->vdd);
mutex_unlock(&st->lock);
return ret;
}
static int icp10100_resume(struct device *dev)
{
struct icp10100_state *st = iio_priv(dev_get_drvdata(dev));
int ret;
mutex_lock(&st->lock);
ret = icp10100_enable_regulator(st);
if (ret)
goto out_unlock;
/* reset chip */
ret = icp10100_send_cmd(st, &icp10100_cmd_soft_reset, NULL, 0);
out_unlock:
mutex_unlock(&st->lock);
return ret;
}
static DEFINE_RUNTIME_DEV_PM_OPS(icp10100_pm, icp10100_suspend, icp10100_resume,
NULL);
static const struct of_device_id icp10100_of_match[] = {
{
.compatible = "invensense,icp10100",
},
{ }
};
MODULE_DEVICE_TABLE(of, icp10100_of_match);
static const struct i2c_device_id icp10100_id[] = {
{ "icp10100", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, icp10100_id);
static struct i2c_driver icp10100_driver = {
.driver = {
.name = "icp10100",
.pm = pm_ptr(&icp10100_pm),
.of_match_table = icp10100_of_match,
},
.probe = icp10100_probe,
.id_table = icp10100_id,
};
module_i2c_driver(icp10100_driver);
MODULE_AUTHOR("InvenSense, Inc.");
MODULE_DESCRIPTION("InvenSense icp10100 driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/pressure/icp10100.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics pressures driver
*
* Copyright 2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors.h>
#include <linux/iio/common/st_sensors_spi.h>
#include "st_pressure.h"
/*
* For new single-chip sensors use <device_name> as compatible string.
* For old single-chip devices keep <device_name>-press to maintain
* compatibility
*/
static const struct of_device_id st_press_of_match[] = {
{
.compatible = "st,lps001wp-press",
.data = LPS001WP_PRESS_DEV_NAME,
},
{
.compatible = "st,lps25h-press",
.data = LPS25H_PRESS_DEV_NAME,
},
{
.compatible = "st,lps331ap-press",
.data = LPS331AP_PRESS_DEV_NAME,
},
{
.compatible = "st,lps22hb-press",
.data = LPS22HB_PRESS_DEV_NAME,
},
{
.compatible = "st,lps33hw",
.data = LPS33HW_PRESS_DEV_NAME,
},
{
.compatible = "st,lps35hw",
.data = LPS35HW_PRESS_DEV_NAME,
},
{
.compatible = "st,lps22hh",
.data = LPS22HH_PRESS_DEV_NAME,
},
{
.compatible = "st,lps22df",
.data = LPS22DF_PRESS_DEV_NAME,
},
{},
};
MODULE_DEVICE_TABLE(of, st_press_of_match);
static int st_press_spi_probe(struct spi_device *spi)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *press_data;
struct iio_dev *indio_dev;
int err;
st_sensors_dev_name_probe(&spi->dev, spi->modalias, sizeof(spi->modalias));
settings = st_press_get_settings(spi->modalias);
if (!settings) {
dev_err(&spi->dev, "device name %s not recognized.\n",
spi->modalias);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*press_data));
if (!indio_dev)
return -ENOMEM;
press_data = iio_priv(indio_dev);
press_data->sensor_settings = (struct st_sensor_settings *)settings;
err = st_sensors_spi_configure(indio_dev, spi);
if (err < 0)
return err;
err = st_sensors_power_enable(indio_dev);
if (err)
return err;
return st_press_common_probe(indio_dev);
}
static const struct spi_device_id st_press_id_table[] = {
{ LPS001WP_PRESS_DEV_NAME },
{ LPS25H_PRESS_DEV_NAME },
{ LPS331AP_PRESS_DEV_NAME },
{ LPS22HB_PRESS_DEV_NAME },
{ LPS33HW_PRESS_DEV_NAME },
{ LPS35HW_PRESS_DEV_NAME },
{ LPS22HH_PRESS_DEV_NAME },
{ LPS22DF_PRESS_DEV_NAME },
{ "lps001wp-press" },
{ "lps25h-press", },
{ "lps331ap-press" },
{ "lps22hb-press" },
{},
};
MODULE_DEVICE_TABLE(spi, st_press_id_table);
static struct spi_driver st_press_driver = {
.driver = {
.name = "st-press-spi",
.of_match_table = st_press_of_match,
},
.probe = st_press_spi_probe,
.id_table = st_press_id_table,
};
module_spi_driver(st_press_driver);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics pressures spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/pressure/st_pressure_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* t5403.c - Support for EPCOS T5403 pressure/temperature sensor
*
* Copyright (c) 2014 Peter Meerwald <[email protected]>
*
* (7-bit I2C slave address 0x77)
*
* TODO: end-of-conversion irq
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/delay.h>
#define T5403_DATA 0xf5 /* data, LSB first, 16 bit */
#define T5403_CALIB_DATA 0x8e /* 10 calibration coeff., LSB first, 16 bit */
#define T5403_SLAVE_ADDR 0x88 /* I2C slave address, 0x77 */
#define T5403_COMMAND 0xf1
/* command bits */
#define T5403_MODE_SHIFT 3 /* conversion time: 2, 8, 16, 66 ms */
#define T5403_PT BIT(1) /* 0 .. pressure, 1 .. temperature measurement */
#define T5403_SCO BIT(0) /* start conversion */
#define T5403_MODE_LOW 0
#define T5403_MODE_STANDARD 1
#define T5403_MODE_HIGH 2
#define T5403_MODE_ULTRA_HIGH 3
#define T5403_I2C_MASK (~BIT(7))
#define T5403_I2C_ADDR 0x77
static const int t5403_pressure_conv_ms[] = {2, 8, 16, 66};
struct t5403_data {
struct i2c_client *client;
struct mutex lock;
int mode;
__le16 c[10];
};
#define T5403_C_U16(i) le16_to_cpu(data->c[(i) - 1])
#define T5403_C(i) sign_extend32(T5403_C_U16(i), 15)
static int t5403_read(struct t5403_data *data, bool pressure)
{
int wait_time = 3; /* wakeup time in ms */
int ret = i2c_smbus_write_byte_data(data->client, T5403_COMMAND,
(pressure ? (data->mode << T5403_MODE_SHIFT) : T5403_PT) |
T5403_SCO);
if (ret < 0)
return ret;
wait_time += pressure ? t5403_pressure_conv_ms[data->mode] : 2;
msleep(wait_time);
return i2c_smbus_read_word_data(data->client, T5403_DATA);
}
static int t5403_comp_pressure(struct t5403_data *data, int *val, int *val2)
{
int ret;
s16 t_r;
u16 p_r;
s32 S, O, X;
mutex_lock(&data->lock);
ret = t5403_read(data, false);
if (ret < 0)
goto done;
t_r = ret;
ret = t5403_read(data, true);
if (ret < 0)
goto done;
p_r = ret;
/* see EPCOS application note */
S = T5403_C_U16(3) + (s32) T5403_C_U16(4) * t_r / 0x20000 +
T5403_C(5) * t_r / 0x8000 * t_r / 0x80000 +
T5403_C(9) * t_r / 0x8000 * t_r / 0x8000 * t_r / 0x10000;
O = T5403_C(6) * 0x4000 + T5403_C(7) * t_r / 8 +
T5403_C(8) * t_r / 0x8000 * t_r / 16 +
T5403_C(9) * t_r / 0x8000 * t_r / 0x10000 * t_r;
X = (S * p_r + O) / 0x4000;
X += ((X - 75000) * (X - 75000) / 0x10000 - 9537) *
T5403_C(10) / 0x10000;
*val = X / 1000;
*val2 = (X % 1000) * 1000;
done:
mutex_unlock(&data->lock);
return ret;
}
static int t5403_comp_temp(struct t5403_data *data, int *val)
{
int ret;
s16 t_r;
mutex_lock(&data->lock);
ret = t5403_read(data, false);
if (ret < 0)
goto done;
t_r = ret;
/* see EPCOS application note */
*val = ((s32) T5403_C_U16(1) * t_r / 0x100 +
(s32) T5403_C_U16(2) * 0x40) * 1000 / 0x10000;
done:
mutex_unlock(&data->lock);
return ret;
}
static int t5403_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct t5403_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
switch (chan->type) {
case IIO_PRESSURE:
ret = t5403_comp_pressure(data, val, val2);
if (ret < 0)
return ret;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
ret = t5403_comp_temp(data, val);
if (ret < 0)
return ret;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_INT_TIME:
*val = 0;
*val2 = t5403_pressure_conv_ms[data->mode] * 1000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int t5403_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct t5403_data *data = iio_priv(indio_dev);
int i;
switch (mask) {
case IIO_CHAN_INFO_INT_TIME:
if (val != 0)
return -EINVAL;
for (i = 0; i < ARRAY_SIZE(t5403_pressure_conv_ms); i++)
if (val2 == t5403_pressure_conv_ms[i] * 1000) {
mutex_lock(&data->lock);
data->mode = i;
mutex_unlock(&data->lock);
return 0;
}
return -EINVAL;
default:
return -EINVAL;
}
}
static const struct iio_chan_spec t5403_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_INT_TIME),
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
},
};
static IIO_CONST_ATTR_INT_TIME_AVAIL("0.002 0.008 0.016 0.066");
static struct attribute *t5403_attributes[] = {
&iio_const_attr_integration_time_available.dev_attr.attr,
NULL
};
static const struct attribute_group t5403_attribute_group = {
.attrs = t5403_attributes,
};
static const struct iio_info t5403_info = {
.read_raw = &t5403_read_raw,
.write_raw = &t5403_write_raw,
.attrs = &t5403_attribute_group,
};
static int t5403_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct t5403_data *data;
struct iio_dev *indio_dev;
int ret;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA |
I2C_FUNC_SMBUS_I2C_BLOCK))
return -EOPNOTSUPP;
ret = i2c_smbus_read_byte_data(client, T5403_SLAVE_ADDR);
if (ret < 0)
return ret;
if ((ret & T5403_I2C_MASK) != T5403_I2C_ADDR)
return -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
mutex_init(&data->lock);
i2c_set_clientdata(client, indio_dev);
indio_dev->info = &t5403_info;
indio_dev->name = id->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = t5403_channels;
indio_dev->num_channels = ARRAY_SIZE(t5403_channels);
data->mode = T5403_MODE_STANDARD;
ret = i2c_smbus_read_i2c_block_data(data->client, T5403_CALIB_DATA,
sizeof(data->c), (u8 *) data->c);
if (ret < 0)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id t5403_id[] = {
{ "t5403", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, t5403_id);
static struct i2c_driver t5403_driver = {
.driver = {
.name = "t5403",
},
.probe = t5403_probe,
.id_table = t5403_id,
};
module_i2c_driver(t5403_driver);
MODULE_AUTHOR("Peter Meerwald <[email protected]>");
MODULE_DESCRIPTION("EPCOS T5403 pressure/temperature sensor driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/pressure/t5403.c |
// SPDX-License-Identifier: GPL-2.0
/*
* MS5611 pressure and temperature sensor driver (SPI bus)
*
* Copyright (c) Tomasz Duszynski <[email protected]>
*
*/
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/mod_devicetable.h>
#include <asm/unaligned.h>
#include "ms5611.h"
static int ms5611_spi_reset(struct ms5611_state *st)
{
u8 cmd = MS5611_RESET;
return spi_write_then_read(st->client, &cmd, 1, NULL, 0);
}
static int ms5611_spi_read_prom_word(struct ms5611_state *st, int index,
u16 *word)
{
int ret;
ret = spi_w8r16be(st->client, MS5611_READ_PROM_WORD + (index << 1));
if (ret < 0)
return ret;
*word = ret;
return 0;
}
static int ms5611_spi_read_adc(struct ms5611_state *st, s32 *val)
{
int ret;
u8 buf[3] = { MS5611_READ_ADC };
ret = spi_write_then_read(st->client, buf, 1, buf, 3);
if (ret < 0)
return ret;
*val = get_unaligned_be24(&buf[0]);
return 0;
}
static int ms5611_spi_read_adc_temp_and_pressure(struct ms5611_state *st,
s32 *temp, s32 *pressure)
{
int ret;
const struct ms5611_osr *osr = st->temp_osr;
/*
* Warning: &osr->cmd MUST be aligned on a word boundary since used as
* 2nd argument (void*) of spi_write_then_read.
*/
ret = spi_write_then_read(st->client, &osr->cmd, 1, NULL, 0);
if (ret < 0)
return ret;
usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL));
ret = ms5611_spi_read_adc(st, temp);
if (ret < 0)
return ret;
osr = st->pressure_osr;
ret = spi_write_then_read(st->client, &osr->cmd, 1, NULL, 0);
if (ret < 0)
return ret;
usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL));
return ms5611_spi_read_adc(st, pressure);
}
static int ms5611_spi_probe(struct spi_device *spi)
{
int ret;
struct ms5611_state *st;
struct iio_dev *indio_dev;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
spi_set_drvdata(spi, indio_dev);
spi->mode = SPI_MODE_0;
spi->max_speed_hz = min(spi->max_speed_hz, 20000000U);
spi->bits_per_word = 8;
ret = spi_setup(spi);
if (ret < 0)
return ret;
st = iio_priv(indio_dev);
st->reset = ms5611_spi_reset;
st->read_prom_word = ms5611_spi_read_prom_word;
st->read_adc_temp_and_pressure = ms5611_spi_read_adc_temp_and_pressure;
st->client = spi;
return ms5611_probe(indio_dev, &spi->dev, spi_get_device_id(spi)->name,
spi_get_device_id(spi)->driver_data);
}
static const struct of_device_id ms5611_spi_matches[] = {
{ .compatible = "meas,ms5611" },
{ .compatible = "meas,ms5607" },
{ }
};
MODULE_DEVICE_TABLE(of, ms5611_spi_matches);
static const struct spi_device_id ms5611_id[] = {
{ "ms5611", MS5611 },
{ "ms5607", MS5607 },
{ }
};
MODULE_DEVICE_TABLE(spi, ms5611_id);
static struct spi_driver ms5611_driver = {
.driver = {
.name = "ms5611",
.of_match_table = ms5611_spi_matches
},
.id_table = ms5611_id,
.probe = ms5611_spi_probe,
};
module_spi_driver(ms5611_driver);
MODULE_AUTHOR("Tomasz Duszynski <[email protected]>");
MODULE_DESCRIPTION("MS5611 spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_MS5611);
| linux-master | drivers/iio/pressure/ms5611_spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Murata ZPA2326 SPI pressure and temperature sensor driver
*
* Copyright (c) 2016 Parrot S.A.
*
* Author: Gregor Boirie <[email protected]>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/mod_devicetable.h>
#include "zpa2326.h"
/*
* read_flag_mask:
* - address bit 7 must be set to request a register read operation
* - address bit 6 must be set to request register address auto increment
*/
static const struct regmap_config zpa2326_regmap_spi_config = {
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = zpa2326_isreg_writeable,
.readable_reg = zpa2326_isreg_readable,
.precious_reg = zpa2326_isreg_precious,
.max_register = ZPA2326_TEMP_OUT_H_REG,
.read_flag_mask = BIT(7) | BIT(6),
.cache_type = REGCACHE_NONE,
};
static int zpa2326_probe_spi(struct spi_device *spi)
{
struct regmap *regmap;
int err;
regmap = devm_regmap_init_spi(spi, &zpa2326_regmap_spi_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "failed to init registers map");
return PTR_ERR(regmap);
}
/*
* Enforce SPI slave settings to prevent from DT misconfiguration.
*
* Clock is idle high. Sampling happens on trailing edge, i.e., rising
* edge. Maximum bus frequency is 1 MHz. Registers are 8 bits wide.
*/
spi->mode = SPI_MODE_3;
spi->max_speed_hz = min(spi->max_speed_hz, 1000000U);
spi->bits_per_word = 8;
err = spi_setup(spi);
if (err < 0)
return err;
return zpa2326_probe(&spi->dev, spi_get_device_id(spi)->name,
spi->irq, ZPA2326_DEVICE_ID, regmap);
}
static void zpa2326_remove_spi(struct spi_device *spi)
{
zpa2326_remove(&spi->dev);
}
static const struct spi_device_id zpa2326_spi_ids[] = {
{ "zpa2326", 0 },
{ },
};
MODULE_DEVICE_TABLE(spi, zpa2326_spi_ids);
static const struct of_device_id zpa2326_spi_matches[] = {
{ .compatible = "murata,zpa2326" },
{ }
};
MODULE_DEVICE_TABLE(of, zpa2326_spi_matches);
static struct spi_driver zpa2326_spi_driver = {
.driver = {
.name = "zpa2326-spi",
.of_match_table = zpa2326_spi_matches,
.pm = ZPA2326_PM_OPS,
},
.probe = zpa2326_probe_spi,
.remove = zpa2326_remove_spi,
.id_table = zpa2326_spi_ids,
};
module_spi_driver(zpa2326_spi_driver);
MODULE_AUTHOR("Gregor Boirie <[email protected]>");
MODULE_DESCRIPTION("SPI driver for Murata ZPA2326 pressure sensor");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ZPA2326);
| linux-master | drivers/iio/pressure/zpa2326_spi.c |
// SPDX-License-Identifier: GPL-2.0
#include <linux/device.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "bmp280.h"
static bool bmp180_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP280_REG_CTRL_MEAS:
case BMP280_REG_RESET:
return true;
default:
return false;
}
}
static bool bmp180_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP180_REG_OUT_XLSB:
case BMP180_REG_OUT_LSB:
case BMP180_REG_OUT_MSB:
case BMP280_REG_CTRL_MEAS:
return true;
default:
return false;
}
}
const struct regmap_config bmp180_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = BMP180_REG_OUT_XLSB,
.cache_type = REGCACHE_RBTREE,
.writeable_reg = bmp180_is_writeable_reg,
.volatile_reg = bmp180_is_volatile_reg,
};
EXPORT_SYMBOL_NS(bmp180_regmap_config, IIO_BMP280);
static bool bmp280_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP280_REG_CONFIG:
case BMP280_REG_CTRL_HUMIDITY:
case BMP280_REG_CTRL_MEAS:
case BMP280_REG_RESET:
return true;
default:
return false;
}
}
static bool bmp280_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP280_REG_HUMIDITY_LSB:
case BMP280_REG_HUMIDITY_MSB:
case BMP280_REG_TEMP_XLSB:
case BMP280_REG_TEMP_LSB:
case BMP280_REG_TEMP_MSB:
case BMP280_REG_PRESS_XLSB:
case BMP280_REG_PRESS_LSB:
case BMP280_REG_PRESS_MSB:
case BMP280_REG_STATUS:
return true;
default:
return false;
}
}
static bool bmp380_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP380_REG_CMD:
case BMP380_REG_CONFIG:
case BMP380_REG_FIFO_CONFIG_1:
case BMP380_REG_FIFO_CONFIG_2:
case BMP380_REG_FIFO_WATERMARK_LSB:
case BMP380_REG_FIFO_WATERMARK_MSB:
case BMP380_REG_POWER_CONTROL:
case BMP380_REG_INT_CONTROL:
case BMP380_REG_IF_CONFIG:
case BMP380_REG_ODR:
case BMP380_REG_OSR:
return true;
default:
return false;
}
}
static bool bmp380_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP380_REG_TEMP_XLSB:
case BMP380_REG_TEMP_LSB:
case BMP380_REG_TEMP_MSB:
case BMP380_REG_PRESS_XLSB:
case BMP380_REG_PRESS_LSB:
case BMP380_REG_PRESS_MSB:
case BMP380_REG_SENSOR_TIME_XLSB:
case BMP380_REG_SENSOR_TIME_LSB:
case BMP380_REG_SENSOR_TIME_MSB:
case BMP380_REG_INT_STATUS:
case BMP380_REG_FIFO_DATA:
case BMP380_REG_STATUS:
case BMP380_REG_ERROR:
case BMP380_REG_EVENT:
return true;
default:
return false;
}
}
static bool bmp580_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP580_REG_NVM_DATA_MSB:
case BMP580_REG_NVM_DATA_LSB:
case BMP580_REG_NVM_ADDR:
case BMP580_REG_ODR_CONFIG:
case BMP580_REG_OSR_CONFIG:
case BMP580_REG_INT_SOURCE:
case BMP580_REG_INT_CONFIG:
case BMP580_REG_OOR_THR_MSB:
case BMP580_REG_OOR_THR_LSB:
case BMP580_REG_OOR_CONFIG:
case BMP580_REG_OOR_RANGE:
case BMP580_REG_IF_CONFIG:
case BMP580_REG_FIFO_CONFIG:
case BMP580_REG_FIFO_SEL:
case BMP580_REG_DSP_CONFIG:
case BMP580_REG_DSP_IIR:
case BMP580_REG_CMD:
return true;
default:
return false;
}
}
static bool bmp580_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMP580_REG_NVM_DATA_MSB:
case BMP580_REG_NVM_DATA_LSB:
case BMP580_REG_FIFO_COUNT:
case BMP580_REG_INT_STATUS:
case BMP580_REG_PRESS_XLSB:
case BMP580_REG_PRESS_LSB:
case BMP580_REG_PRESS_MSB:
case BMP580_REG_FIFO_DATA:
case BMP580_REG_TEMP_XLSB:
case BMP580_REG_TEMP_LSB:
case BMP580_REG_TEMP_MSB:
case BMP580_REG_EFF_OSR:
case BMP580_REG_STATUS:
return true;
default:
return false;
}
}
const struct regmap_config bmp280_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = BMP280_REG_HUMIDITY_LSB,
.cache_type = REGCACHE_RBTREE,
.writeable_reg = bmp280_is_writeable_reg,
.volatile_reg = bmp280_is_volatile_reg,
};
EXPORT_SYMBOL_NS(bmp280_regmap_config, IIO_BMP280);
const struct regmap_config bmp380_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = BMP380_REG_CMD,
.cache_type = REGCACHE_RBTREE,
.writeable_reg = bmp380_is_writeable_reg,
.volatile_reg = bmp380_is_volatile_reg,
};
EXPORT_SYMBOL_NS(bmp380_regmap_config, IIO_BMP280);
const struct regmap_config bmp580_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = BMP580_REG_CMD,
.cache_type = REGCACHE_RBTREE,
.writeable_reg = bmp580_is_writeable_reg,
.volatile_reg = bmp580_is_volatile_reg,
};
EXPORT_SYMBOL_NS(bmp580_regmap_config, IIO_BMP280);
| linux-master | drivers/iio/pressure/bmp280-regmap.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2010 Christoph Mair <[email protected]>
* Copyright (c) 2012 Bosch Sensortec GmbH
* Copyright (c) 2012 Unixphere AB
* Copyright (c) 2014 Intel Corporation
* Copyright (c) 2016 Linus Walleij <[email protected]>
*
* Driver for Bosch Sensortec BMP180 and BMP280 digital pressure sensor.
*
* Datasheet:
* https://cdn-shop.adafruit.com/datasheets/BST-BMP180-DS000-09.pdf
* https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp280-ds001.pdf
* https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bme280-ds002.pdf
* https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp388-ds001.pdf
* https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp581-ds004.pdf
*
* Notice:
* The link to the bmp180 datasheet points to an outdated version missing these changes:
* - Changed document referral from ANP015 to BST-MPS-AN004-00 on page 26
* - Updated equation for B3 param on section 3.5 to ((((long)AC1 * 4 + X3) << oss) + 2) / 4
* - Updated RoHS directive to 2011/65/EU effective 8 June 2011 on page 26
*/
#define pr_fmt(fmt) "bmp280: " fmt
#include <linux/bitops.h>
#include <linux/bitfield.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/nvmem-provider.h>
#include <linux/regmap.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
#include <linux/interrupt.h>
#include <linux/irq.h> /* For irq_get_irq_data() */
#include <linux/completion.h>
#include <linux/pm_runtime.h>
#include <linux/random.h>
#include <asm/unaligned.h>
#include "bmp280.h"
/*
* These enums are used for indexing into the array of calibration
* coefficients for BMP180.
*/
enum { AC1, AC2, AC3, AC4, AC5, AC6, B1, B2, MB, MC, MD };
enum bmp380_odr {
BMP380_ODR_200HZ,
BMP380_ODR_100HZ,
BMP380_ODR_50HZ,
BMP380_ODR_25HZ,
BMP380_ODR_12_5HZ,
BMP380_ODR_6_25HZ,
BMP380_ODR_3_125HZ,
BMP380_ODR_1_5625HZ,
BMP380_ODR_0_78HZ,
BMP380_ODR_0_39HZ,
BMP380_ODR_0_2HZ,
BMP380_ODR_0_1HZ,
BMP380_ODR_0_05HZ,
BMP380_ODR_0_02HZ,
BMP380_ODR_0_01HZ,
BMP380_ODR_0_006HZ,
BMP380_ODR_0_003HZ,
BMP380_ODR_0_0015HZ,
};
enum bmp580_odr {
BMP580_ODR_240HZ,
BMP580_ODR_218HZ,
BMP580_ODR_199HZ,
BMP580_ODR_179HZ,
BMP580_ODR_160HZ,
BMP580_ODR_149HZ,
BMP580_ODR_140HZ,
BMP580_ODR_129HZ,
BMP580_ODR_120HZ,
BMP580_ODR_110HZ,
BMP580_ODR_100HZ,
BMP580_ODR_89HZ,
BMP580_ODR_80HZ,
BMP580_ODR_70HZ,
BMP580_ODR_60HZ,
BMP580_ODR_50HZ,
BMP580_ODR_45HZ,
BMP580_ODR_40HZ,
BMP580_ODR_35HZ,
BMP580_ODR_30HZ,
BMP580_ODR_25HZ,
BMP580_ODR_20HZ,
BMP580_ODR_15HZ,
BMP580_ODR_10HZ,
BMP580_ODR_5HZ,
BMP580_ODR_4HZ,
BMP580_ODR_3HZ,
BMP580_ODR_2HZ,
BMP580_ODR_1HZ,
BMP580_ODR_0_5HZ,
BMP580_ODR_0_25HZ,
BMP580_ODR_0_125HZ,
};
/*
* These enums are used for indexing into the array of compensation
* parameters for BMP280.
*/
enum { T1, T2, T3, P1, P2, P3, P4, P5, P6, P7, P8, P9 };
enum {
/* Temperature calib indexes */
BMP380_T1 = 0,
BMP380_T2 = 2,
BMP380_T3 = 4,
/* Pressure calib indexes */
BMP380_P1 = 5,
BMP380_P2 = 7,
BMP380_P3 = 9,
BMP380_P4 = 10,
BMP380_P5 = 11,
BMP380_P6 = 13,
BMP380_P7 = 15,
BMP380_P8 = 16,
BMP380_P9 = 17,
BMP380_P10 = 19,
BMP380_P11 = 20,
};
static const struct iio_chan_spec bmp280_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
},
{
.type = IIO_HUMIDITYRELATIVE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
},
};
static const struct iio_chan_spec bmp380_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
},
{
.type = IIO_HUMIDITYRELATIVE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
},
};
static int bmp280_read_calib(struct bmp280_data *data)
{
struct bmp280_calib *calib = &data->calib.bmp280;
int ret;
/* Read temperature and pressure calibration values. */
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_TEMP_START,
data->bmp280_cal_buf, sizeof(data->bmp280_cal_buf));
if (ret < 0) {
dev_err(data->dev,
"failed to read temperature and pressure calibration parameters\n");
return ret;
}
/* Toss the temperature and pressure calibration data into the entropy pool */
add_device_randomness(data->bmp280_cal_buf, sizeof(data->bmp280_cal_buf));
/* Parse temperature calibration values. */
calib->T1 = le16_to_cpu(data->bmp280_cal_buf[T1]);
calib->T2 = le16_to_cpu(data->bmp280_cal_buf[T2]);
calib->T3 = le16_to_cpu(data->bmp280_cal_buf[T3]);
/* Parse pressure calibration values. */
calib->P1 = le16_to_cpu(data->bmp280_cal_buf[P1]);
calib->P2 = le16_to_cpu(data->bmp280_cal_buf[P2]);
calib->P3 = le16_to_cpu(data->bmp280_cal_buf[P3]);
calib->P4 = le16_to_cpu(data->bmp280_cal_buf[P4]);
calib->P5 = le16_to_cpu(data->bmp280_cal_buf[P5]);
calib->P6 = le16_to_cpu(data->bmp280_cal_buf[P6]);
calib->P7 = le16_to_cpu(data->bmp280_cal_buf[P7]);
calib->P8 = le16_to_cpu(data->bmp280_cal_buf[P8]);
calib->P9 = le16_to_cpu(data->bmp280_cal_buf[P9]);
return 0;
}
static int bme280_read_calib(struct bmp280_data *data)
{
struct bmp280_calib *calib = &data->calib.bmp280;
struct device *dev = data->dev;
unsigned int tmp;
int ret;
/* Load shared calibration params with bmp280 first */
ret = bmp280_read_calib(data);
if (ret < 0) {
dev_err(dev, "failed to read common bmp280 calibration parameters\n");
return ret;
}
/*
* Read humidity calibration values.
* Due to some odd register addressing we cannot just
* do a big bulk read. Instead, we have to read each Hx
* value separately and sometimes do some bit shifting...
* Humidity data is only available on BME280.
*/
ret = regmap_read(data->regmap, BMP280_REG_COMP_H1, &tmp);
if (ret < 0) {
dev_err(dev, "failed to read H1 comp value\n");
return ret;
}
calib->H1 = tmp;
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H2,
&data->le16, sizeof(data->le16));
if (ret < 0) {
dev_err(dev, "failed to read H2 comp value\n");
return ret;
}
calib->H2 = sign_extend32(le16_to_cpu(data->le16), 15);
ret = regmap_read(data->regmap, BMP280_REG_COMP_H3, &tmp);
if (ret < 0) {
dev_err(dev, "failed to read H3 comp value\n");
return ret;
}
calib->H3 = tmp;
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H4,
&data->be16, sizeof(data->be16));
if (ret < 0) {
dev_err(dev, "failed to read H4 comp value\n");
return ret;
}
calib->H4 = sign_extend32(((be16_to_cpu(data->be16) >> 4) & 0xff0) |
(be16_to_cpu(data->be16) & 0xf), 11);
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H5,
&data->le16, sizeof(data->le16));
if (ret < 0) {
dev_err(dev, "failed to read H5 comp value\n");
return ret;
}
calib->H5 = sign_extend32(FIELD_GET(BMP280_COMP_H5_MASK, le16_to_cpu(data->le16)), 11);
ret = regmap_read(data->regmap, BMP280_REG_COMP_H6, &tmp);
if (ret < 0) {
dev_err(dev, "failed to read H6 comp value\n");
return ret;
}
calib->H6 = sign_extend32(tmp, 7);
return 0;
}
/*
* Returns humidity in percent, resolution is 0.01 percent. Output value of
* "47445" represents 47445/1024 = 46.333 %RH.
*
* Taken from BME280 datasheet, Section 4.2.3, "Compensation formula".
*/
static u32 bmp280_compensate_humidity(struct bmp280_data *data,
s32 adc_humidity)
{
struct bmp280_calib *calib = &data->calib.bmp280;
s32 var;
var = ((s32)data->t_fine) - (s32)76800;
var = ((((adc_humidity << 14) - (calib->H4 << 20) - (calib->H5 * var))
+ (s32)16384) >> 15) * (((((((var * calib->H6) >> 10)
* (((var * (s32)calib->H3) >> 11) + (s32)32768)) >> 10)
+ (s32)2097152) * calib->H2 + 8192) >> 14);
var -= ((((var >> 15) * (var >> 15)) >> 7) * (s32)calib->H1) >> 4;
var = clamp_val(var, 0, 419430400);
return var >> 12;
};
/*
* Returns temperature in DegC, resolution is 0.01 DegC. Output value of
* "5123" equals 51.23 DegC. t_fine carries fine temperature as global
* value.
*
* Taken from datasheet, Section 3.11.3, "Compensation formula".
*/
static s32 bmp280_compensate_temp(struct bmp280_data *data,
s32 adc_temp)
{
struct bmp280_calib *calib = &data->calib.bmp280;
s32 var1, var2;
var1 = (((adc_temp >> 3) - ((s32)calib->T1 << 1)) *
((s32)calib->T2)) >> 11;
var2 = (((((adc_temp >> 4) - ((s32)calib->T1)) *
((adc_temp >> 4) - ((s32)calib->T1))) >> 12) *
((s32)calib->T3)) >> 14;
data->t_fine = var1 + var2;
return (data->t_fine * 5 + 128) >> 8;
}
/*
* Returns pressure in Pa as unsigned 32 bit integer in Q24.8 format (24
* integer bits and 8 fractional bits). Output value of "24674867"
* represents 24674867/256 = 96386.2 Pa = 963.862 hPa
*
* Taken from datasheet, Section 3.11.3, "Compensation formula".
*/
static u32 bmp280_compensate_press(struct bmp280_data *data,
s32 adc_press)
{
struct bmp280_calib *calib = &data->calib.bmp280;
s64 var1, var2, p;
var1 = ((s64)data->t_fine) - 128000;
var2 = var1 * var1 * (s64)calib->P6;
var2 += (var1 * (s64)calib->P5) << 17;
var2 += ((s64)calib->P4) << 35;
var1 = ((var1 * var1 * (s64)calib->P3) >> 8) +
((var1 * (s64)calib->P2) << 12);
var1 = ((((s64)1) << 47) + var1) * ((s64)calib->P1) >> 33;
if (var1 == 0)
return 0;
p = ((((s64)1048576 - adc_press) << 31) - var2) * 3125;
p = div64_s64(p, var1);
var1 = (((s64)calib->P9) * (p >> 13) * (p >> 13)) >> 25;
var2 = ((s64)(calib->P8) * p) >> 19;
p = ((p + var1 + var2) >> 8) + (((s64)calib->P7) << 4);
return (u32)p;
}
static int bmp280_read_temp(struct bmp280_data *data,
int *val, int *val2)
{
s32 adc_temp, comp_temp;
int ret;
ret = regmap_bulk_read(data->regmap, BMP280_REG_TEMP_MSB,
data->buf, sizeof(data->buf));
if (ret < 0) {
dev_err(data->dev, "failed to read temperature\n");
return ret;
}
adc_temp = FIELD_GET(BMP280_MEAS_TRIM_MASK, get_unaligned_be24(data->buf));
if (adc_temp == BMP280_TEMP_SKIPPED) {
/* reading was skipped */
dev_err(data->dev, "reading temperature skipped\n");
return -EIO;
}
comp_temp = bmp280_compensate_temp(data, adc_temp);
/*
* val might be NULL if we're called by the read_press routine,
* who only cares about the carry over t_fine value.
*/
if (val) {
*val = comp_temp * 10;
return IIO_VAL_INT;
}
return 0;
}
static int bmp280_read_press(struct bmp280_data *data,
int *val, int *val2)
{
u32 comp_press;
s32 adc_press;
int ret;
/* Read and compensate temperature so we get a reading of t_fine. */
ret = bmp280_read_temp(data, NULL, NULL);
if (ret < 0)
return ret;
ret = regmap_bulk_read(data->regmap, BMP280_REG_PRESS_MSB,
data->buf, sizeof(data->buf));
if (ret < 0) {
dev_err(data->dev, "failed to read pressure\n");
return ret;
}
adc_press = FIELD_GET(BMP280_MEAS_TRIM_MASK, get_unaligned_be24(data->buf));
if (adc_press == BMP280_PRESS_SKIPPED) {
/* reading was skipped */
dev_err(data->dev, "reading pressure skipped\n");
return -EIO;
}
comp_press = bmp280_compensate_press(data, adc_press);
*val = comp_press;
*val2 = 256000;
return IIO_VAL_FRACTIONAL;
}
static int bmp280_read_humid(struct bmp280_data *data, int *val, int *val2)
{
u32 comp_humidity;
s32 adc_humidity;
int ret;
/* Read and compensate temperature so we get a reading of t_fine. */
ret = bmp280_read_temp(data, NULL, NULL);
if (ret < 0)
return ret;
ret = regmap_bulk_read(data->regmap, BMP280_REG_HUMIDITY_MSB,
&data->be16, sizeof(data->be16));
if (ret < 0) {
dev_err(data->dev, "failed to read humidity\n");
return ret;
}
adc_humidity = be16_to_cpu(data->be16);
if (adc_humidity == BMP280_HUMIDITY_SKIPPED) {
/* reading was skipped */
dev_err(data->dev, "reading humidity skipped\n");
return -EIO;
}
comp_humidity = bmp280_compensate_humidity(data, adc_humidity);
*val = comp_humidity * 1000 / 1024;
return IIO_VAL_INT;
}
static int bmp280_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct bmp280_data *data = iio_priv(indio_dev);
int ret;
pm_runtime_get_sync(data->dev);
mutex_lock(&data->lock);
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
switch (chan->type) {
case IIO_HUMIDITYRELATIVE:
ret = data->chip_info->read_humid(data, val, val2);
break;
case IIO_PRESSURE:
ret = data->chip_info->read_press(data, val, val2);
break;
case IIO_TEMP:
ret = data->chip_info->read_temp(data, val, val2);
break;
default:
ret = -EINVAL;
break;
}
break;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
switch (chan->type) {
case IIO_HUMIDITYRELATIVE:
*val = 1 << data->oversampling_humid;
ret = IIO_VAL_INT;
break;
case IIO_PRESSURE:
*val = 1 << data->oversampling_press;
ret = IIO_VAL_INT;
break;
case IIO_TEMP:
*val = 1 << data->oversampling_temp;
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
break;
}
break;
case IIO_CHAN_INFO_SAMP_FREQ:
if (!data->chip_info->sampling_freq_avail) {
ret = -EINVAL;
break;
}
*val = data->chip_info->sampling_freq_avail[data->sampling_freq][0];
*val2 = data->chip_info->sampling_freq_avail[data->sampling_freq][1];
ret = IIO_VAL_INT_PLUS_MICRO;
break;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
if (!data->chip_info->iir_filter_coeffs_avail) {
ret = -EINVAL;
break;
}
*val = (1 << data->iir_filter_coeff) - 1;
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
break;
}
mutex_unlock(&data->lock);
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
return ret;
}
static int bmp280_write_oversampling_ratio_humid(struct bmp280_data *data,
int val)
{
const int *avail = data->chip_info->oversampling_humid_avail;
const int n = data->chip_info->num_oversampling_humid_avail;
int ret, prev;
int i;
for (i = 0; i < n; i++) {
if (avail[i] == val) {
prev = data->oversampling_humid;
data->oversampling_humid = ilog2(val);
ret = data->chip_info->chip_config(data);
if (ret) {
data->oversampling_humid = prev;
data->chip_info->chip_config(data);
return ret;
}
return 0;
}
}
return -EINVAL;
}
static int bmp280_write_oversampling_ratio_temp(struct bmp280_data *data,
int val)
{
const int *avail = data->chip_info->oversampling_temp_avail;
const int n = data->chip_info->num_oversampling_temp_avail;
int ret, prev;
int i;
for (i = 0; i < n; i++) {
if (avail[i] == val) {
prev = data->oversampling_temp;
data->oversampling_temp = ilog2(val);
ret = data->chip_info->chip_config(data);
if (ret) {
data->oversampling_temp = prev;
data->chip_info->chip_config(data);
return ret;
}
return 0;
}
}
return -EINVAL;
}
static int bmp280_write_oversampling_ratio_press(struct bmp280_data *data,
int val)
{
const int *avail = data->chip_info->oversampling_press_avail;
const int n = data->chip_info->num_oversampling_press_avail;
int ret, prev;
int i;
for (i = 0; i < n; i++) {
if (avail[i] == val) {
prev = data->oversampling_press;
data->oversampling_press = ilog2(val);
ret = data->chip_info->chip_config(data);
if (ret) {
data->oversampling_press = prev;
data->chip_info->chip_config(data);
return ret;
}
return 0;
}
}
return -EINVAL;
}
static int bmp280_write_sampling_frequency(struct bmp280_data *data,
int val, int val2)
{
const int (*avail)[2] = data->chip_info->sampling_freq_avail;
const int n = data->chip_info->num_sampling_freq_avail;
int ret, prev;
int i;
for (i = 0; i < n; i++) {
if (avail[i][0] == val && avail[i][1] == val2) {
prev = data->sampling_freq;
data->sampling_freq = i;
ret = data->chip_info->chip_config(data);
if (ret) {
data->sampling_freq = prev;
data->chip_info->chip_config(data);
return ret;
}
return 0;
}
}
return -EINVAL;
}
static int bmp280_write_iir_filter_coeffs(struct bmp280_data *data, int val)
{
const int *avail = data->chip_info->iir_filter_coeffs_avail;
const int n = data->chip_info->num_iir_filter_coeffs_avail;
int ret, prev;
int i;
for (i = 0; i < n; i++) {
if (avail[i] - 1 == val) {
prev = data->iir_filter_coeff;
data->iir_filter_coeff = i;
ret = data->chip_info->chip_config(data);
if (ret) {
data->iir_filter_coeff = prev;
data->chip_info->chip_config(data);
return ret;
}
return 0;
}
}
return -EINVAL;
}
static int bmp280_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bmp280_data *data = iio_priv(indio_dev);
int ret = 0;
/*
* Helper functions to update sensor running configuration.
* If an error happens applying new settings, will try restore
* previous parameters to ensure the sensor is left in a known
* working configuration.
*/
switch (mask) {
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
pm_runtime_get_sync(data->dev);
mutex_lock(&data->lock);
switch (chan->type) {
case IIO_HUMIDITYRELATIVE:
ret = bmp280_write_oversampling_ratio_humid(data, val);
break;
case IIO_PRESSURE:
ret = bmp280_write_oversampling_ratio_press(data, val);
break;
case IIO_TEMP:
ret = bmp280_write_oversampling_ratio_temp(data, val);
break;
default:
ret = -EINVAL;
break;
}
mutex_unlock(&data->lock);
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
break;
case IIO_CHAN_INFO_SAMP_FREQ:
pm_runtime_get_sync(data->dev);
mutex_lock(&data->lock);
ret = bmp280_write_sampling_frequency(data, val, val2);
mutex_unlock(&data->lock);
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
break;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
pm_runtime_get_sync(data->dev);
mutex_lock(&data->lock);
ret = bmp280_write_iir_filter_coeffs(data, val);
mutex_unlock(&data->lock);
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
break;
default:
return -EINVAL;
}
return ret;
}
static int bmp280_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct bmp280_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
switch (chan->type) {
case IIO_PRESSURE:
*vals = data->chip_info->oversampling_press_avail;
*length = data->chip_info->num_oversampling_press_avail;
break;
case IIO_TEMP:
*vals = data->chip_info->oversampling_temp_avail;
*length = data->chip_info->num_oversampling_temp_avail;
break;
default:
return -EINVAL;
}
*type = IIO_VAL_INT;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = (const int *)data->chip_info->sampling_freq_avail;
*type = IIO_VAL_INT_PLUS_MICRO;
/* Values are stored in a 2D matrix */
*length = data->chip_info->num_sampling_freq_avail;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*vals = data->chip_info->iir_filter_coeffs_avail;
*type = IIO_VAL_INT;
*length = data->chip_info->num_iir_filter_coeffs_avail;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static const struct iio_info bmp280_info = {
.read_raw = &bmp280_read_raw,
.read_avail = &bmp280_read_avail,
.write_raw = &bmp280_write_raw,
};
static int bmp280_chip_config(struct bmp280_data *data)
{
u8 osrs = FIELD_PREP(BMP280_OSRS_TEMP_MASK, data->oversampling_temp + 1) |
FIELD_PREP(BMP280_OSRS_PRESS_MASK, data->oversampling_press + 1);
int ret;
ret = regmap_write_bits(data->regmap, BMP280_REG_CTRL_MEAS,
BMP280_OSRS_TEMP_MASK |
BMP280_OSRS_PRESS_MASK |
BMP280_MODE_MASK,
osrs | BMP280_MODE_NORMAL);
if (ret < 0) {
dev_err(data->dev,
"failed to write ctrl_meas register\n");
return ret;
}
ret = regmap_update_bits(data->regmap, BMP280_REG_CONFIG,
BMP280_FILTER_MASK,
BMP280_FILTER_4X);
if (ret < 0) {
dev_err(data->dev,
"failed to write config register\n");
return ret;
}
return ret;
}
static const int bmp280_oversampling_avail[] = { 1, 2, 4, 8, 16 };
const struct bmp280_chip_info bmp280_chip_info = {
.id_reg = BMP280_REG_ID,
.chip_id = BMP280_CHIP_ID,
.regmap_config = &bmp280_regmap_config,
.start_up_time = 2000,
.channels = bmp280_channels,
.num_channels = 2,
.oversampling_temp_avail = bmp280_oversampling_avail,
.num_oversampling_temp_avail = ARRAY_SIZE(bmp280_oversampling_avail),
/*
* Oversampling config values on BMx280 have one additional setting
* that other generations of the family don't:
* The value 0 means the measurement is bypassed instead of
* oversampling set to x1.
*
* To account for this difference, and preserve the same common
* config logic, this is handled later on chip_config callback
* incrementing one unit the oversampling setting.
*/
.oversampling_temp_default = BMP280_OSRS_TEMP_2X - 1,
.oversampling_press_avail = bmp280_oversampling_avail,
.num_oversampling_press_avail = ARRAY_SIZE(bmp280_oversampling_avail),
.oversampling_press_default = BMP280_OSRS_PRESS_16X - 1,
.chip_config = bmp280_chip_config,
.read_temp = bmp280_read_temp,
.read_press = bmp280_read_press,
.read_calib = bmp280_read_calib,
};
EXPORT_SYMBOL_NS(bmp280_chip_info, IIO_BMP280);
static int bme280_chip_config(struct bmp280_data *data)
{
u8 osrs = FIELD_PREP(BMP280_OSRS_HUMIDITY_MASK, data->oversampling_humid + 1);
int ret;
/*
* Oversampling of humidity must be set before oversampling of
* temperature/pressure is set to become effective.
*/
ret = regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
BMP280_OSRS_HUMIDITY_MASK, osrs);
if (ret < 0)
return ret;
return bmp280_chip_config(data);
}
const struct bmp280_chip_info bme280_chip_info = {
.id_reg = BMP280_REG_ID,
.chip_id = BME280_CHIP_ID,
.regmap_config = &bmp280_regmap_config,
.start_up_time = 2000,
.channels = bmp280_channels,
.num_channels = 3,
.oversampling_temp_avail = bmp280_oversampling_avail,
.num_oversampling_temp_avail = ARRAY_SIZE(bmp280_oversampling_avail),
.oversampling_temp_default = BMP280_OSRS_TEMP_2X - 1,
.oversampling_press_avail = bmp280_oversampling_avail,
.num_oversampling_press_avail = ARRAY_SIZE(bmp280_oversampling_avail),
.oversampling_press_default = BMP280_OSRS_PRESS_16X - 1,
.oversampling_humid_avail = bmp280_oversampling_avail,
.num_oversampling_humid_avail = ARRAY_SIZE(bmp280_oversampling_avail),
.oversampling_humid_default = BMP280_OSRS_HUMIDITY_16X - 1,
.chip_config = bme280_chip_config,
.read_temp = bmp280_read_temp,
.read_press = bmp280_read_press,
.read_humid = bmp280_read_humid,
.read_calib = bme280_read_calib,
};
EXPORT_SYMBOL_NS(bme280_chip_info, IIO_BMP280);
/*
* Helper function to send a command to BMP3XX sensors.
*
* Sensor processes commands written to the CMD register and signals
* execution result through "cmd_rdy" and "cmd_error" flags available on
* STATUS and ERROR registers.
*/
static int bmp380_cmd(struct bmp280_data *data, u8 cmd)
{
unsigned int reg;
int ret;
/* Check if device is ready to process a command */
ret = regmap_read(data->regmap, BMP380_REG_STATUS, ®);
if (ret) {
dev_err(data->dev, "failed to read error register\n");
return ret;
}
if (!(reg & BMP380_STATUS_CMD_RDY_MASK)) {
dev_err(data->dev, "device is not ready to accept commands\n");
return -EBUSY;
}
/* Send command to process */
ret = regmap_write(data->regmap, BMP380_REG_CMD, cmd);
if (ret) {
dev_err(data->dev, "failed to send command to device\n");
return ret;
}
/* Wait for 2ms for command to be processed */
usleep_range(data->start_up_time, data->start_up_time + 100);
/* Check for command processing error */
ret = regmap_read(data->regmap, BMP380_REG_ERROR, ®);
if (ret) {
dev_err(data->dev, "error reading ERROR reg\n");
return ret;
}
if (reg & BMP380_ERR_CMD_MASK) {
dev_err(data->dev, "error processing command 0x%X\n", cmd);
return -EINVAL;
}
return 0;
}
/*
* Returns temperature in Celsius dregrees, resolution is 0.01º C. Output value of
* "5123" equals 51.2º C. t_fine carries fine temperature as global value.
*
* Taken from datasheet, Section Appendix 9, "Compensation formula" and repo
* https://github.com/BoschSensortec/BMP3-Sensor-API.
*/
static s32 bmp380_compensate_temp(struct bmp280_data *data, u32 adc_temp)
{
s64 var1, var2, var3, var4, var5, var6, comp_temp;
struct bmp380_calib *calib = &data->calib.bmp380;
var1 = ((s64) adc_temp) - (((s64) calib->T1) << 8);
var2 = var1 * ((s64) calib->T2);
var3 = var1 * var1;
var4 = var3 * ((s64) calib->T3);
var5 = (var2 << 18) + var4;
var6 = var5 >> 32;
data->t_fine = (s32) var6;
comp_temp = (var6 * 25) >> 14;
comp_temp = clamp_val(comp_temp, BMP380_MIN_TEMP, BMP380_MAX_TEMP);
return (s32) comp_temp;
}
/*
* Returns pressure in Pa as an unsigned 32 bit integer in fractional Pascal.
* Output value of "9528709" represents 9528709/100 = 95287.09 Pa = 952.8709 hPa.
*
* Taken from datasheet, Section 9.3. "Pressure compensation" and repository
* https://github.com/BoschSensortec/BMP3-Sensor-API.
*/
static u32 bmp380_compensate_press(struct bmp280_data *data, u32 adc_press)
{
s64 var1, var2, var3, var4, var5, var6, offset, sensitivity;
struct bmp380_calib *calib = &data->calib.bmp380;
u32 comp_press;
var1 = (s64)data->t_fine * (s64)data->t_fine;
var2 = var1 >> 6;
var3 = (var2 * ((s64) data->t_fine)) >> 8;
var4 = ((s64)calib->P8 * var3) >> 5;
var5 = ((s64)calib->P7 * var1) << 4;
var6 = ((s64)calib->P6 * (s64)data->t_fine) << 22;
offset = ((s64)calib->P5 << 47) + var4 + var5 + var6;
var2 = ((s64)calib->P4 * var3) >> 5;
var4 = ((s64)calib->P3 * var1) << 2;
var5 = ((s64)calib->P2 - ((s64)1 << 14)) *
((s64)data->t_fine << 21);
sensitivity = (((s64) calib->P1 - ((s64) 1 << 14)) << 46) +
var2 + var4 + var5;
var1 = (sensitivity >> 24) * (s64)adc_press;
var2 = (s64)calib->P10 * (s64)data->t_fine;
var3 = var2 + ((s64)calib->P9 << 16);
var4 = (var3 * (s64)adc_press) >> 13;
/*
* Dividing by 10 followed by multiplying by 10 to avoid
* possible overflow caused by (uncomp_data->pressure * partial_data4).
*/
var5 = ((s64)adc_press * div_s64(var4, 10)) >> 9;
var5 *= 10;
var6 = (s64)adc_press * (s64)adc_press;
var2 = ((s64)calib->P11 * var6) >> 16;
var3 = (var2 * (s64)adc_press) >> 7;
var4 = (offset >> 2) + var1 + var5 + var3;
comp_press = ((u64)var4 * 25) >> 40;
comp_press = clamp_val(comp_press, BMP380_MIN_PRES, BMP380_MAX_PRES);
return comp_press;
}
static int bmp380_read_temp(struct bmp280_data *data, int *val, int *val2)
{
s32 comp_temp;
u32 adc_temp;
int ret;
ret = regmap_bulk_read(data->regmap, BMP380_REG_TEMP_XLSB,
data->buf, sizeof(data->buf));
if (ret) {
dev_err(data->dev, "failed to read temperature\n");
return ret;
}
adc_temp = get_unaligned_le24(data->buf);
if (adc_temp == BMP380_TEMP_SKIPPED) {
dev_err(data->dev, "reading temperature skipped\n");
return -EIO;
}
comp_temp = bmp380_compensate_temp(data, adc_temp);
/*
* Val might be NULL if we're called by the read_press routine,
* who only cares about the carry over t_fine value.
*/
if (val) {
/* IIO reports temperatures in milli Celsius */
*val = comp_temp * 10;
return IIO_VAL_INT;
}
return 0;
}
static int bmp380_read_press(struct bmp280_data *data, int *val, int *val2)
{
s32 comp_press;
u32 adc_press;
int ret;
/* Read and compensate for temperature so we get a reading of t_fine */
ret = bmp380_read_temp(data, NULL, NULL);
if (ret)
return ret;
ret = regmap_bulk_read(data->regmap, BMP380_REG_PRESS_XLSB,
data->buf, sizeof(data->buf));
if (ret) {
dev_err(data->dev, "failed to read pressure\n");
return ret;
}
adc_press = get_unaligned_le24(data->buf);
if (adc_press == BMP380_PRESS_SKIPPED) {
dev_err(data->dev, "reading pressure skipped\n");
return -EIO;
}
comp_press = bmp380_compensate_press(data, adc_press);
*val = comp_press;
/* Compensated pressure is in cPa (centipascals) */
*val2 = 100000;
return IIO_VAL_FRACTIONAL;
}
static int bmp380_read_calib(struct bmp280_data *data)
{
struct bmp380_calib *calib = &data->calib.bmp380;
int ret;
/* Read temperature and pressure calibration data */
ret = regmap_bulk_read(data->regmap, BMP380_REG_CALIB_TEMP_START,
data->bmp380_cal_buf, sizeof(data->bmp380_cal_buf));
if (ret) {
dev_err(data->dev,
"failed to read temperature calibration parameters\n");
return ret;
}
/* Toss the temperature calibration data into the entropy pool */
add_device_randomness(data->bmp380_cal_buf, sizeof(data->bmp380_cal_buf));
/* Parse calibration values */
calib->T1 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_T1]);
calib->T2 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_T2]);
calib->T3 = data->bmp380_cal_buf[BMP380_T3];
calib->P1 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_P1]);
calib->P2 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_P2]);
calib->P3 = data->bmp380_cal_buf[BMP380_P3];
calib->P4 = data->bmp380_cal_buf[BMP380_P4];
calib->P5 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_P5]);
calib->P6 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_P6]);
calib->P7 = data->bmp380_cal_buf[BMP380_P7];
calib->P8 = data->bmp380_cal_buf[BMP380_P8];
calib->P9 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_P9]);
calib->P10 = data->bmp380_cal_buf[BMP380_P10];
calib->P11 = data->bmp380_cal_buf[BMP380_P11];
return 0;
}
static const int bmp380_odr_table[][2] = {
[BMP380_ODR_200HZ] = {200, 0},
[BMP380_ODR_100HZ] = {100, 0},
[BMP380_ODR_50HZ] = {50, 0},
[BMP380_ODR_25HZ] = {25, 0},
[BMP380_ODR_12_5HZ] = {12, 500000},
[BMP380_ODR_6_25HZ] = {6, 250000},
[BMP380_ODR_3_125HZ] = {3, 125000},
[BMP380_ODR_1_5625HZ] = {1, 562500},
[BMP380_ODR_0_78HZ] = {0, 781250},
[BMP380_ODR_0_39HZ] = {0, 390625},
[BMP380_ODR_0_2HZ] = {0, 195313},
[BMP380_ODR_0_1HZ] = {0, 97656},
[BMP380_ODR_0_05HZ] = {0, 48828},
[BMP380_ODR_0_02HZ] = {0, 24414},
[BMP380_ODR_0_01HZ] = {0, 12207},
[BMP380_ODR_0_006HZ] = {0, 6104},
[BMP380_ODR_0_003HZ] = {0, 3052},
[BMP380_ODR_0_0015HZ] = {0, 1526},
};
static int bmp380_preinit(struct bmp280_data *data)
{
/* BMP3xx requires soft-reset as part of initialization */
return bmp380_cmd(data, BMP380_CMD_SOFT_RESET);
}
static int bmp380_chip_config(struct bmp280_data *data)
{
bool change = false, aux;
unsigned int tmp;
u8 osrs;
int ret;
/* Configure power control register */
ret = regmap_update_bits(data->regmap, BMP380_REG_POWER_CONTROL,
BMP380_CTRL_SENSORS_MASK,
BMP380_CTRL_SENSORS_PRESS_EN |
BMP380_CTRL_SENSORS_TEMP_EN);
if (ret) {
dev_err(data->dev,
"failed to write operation control register\n");
return ret;
}
/* Configure oversampling */
osrs = FIELD_PREP(BMP380_OSRS_TEMP_MASK, data->oversampling_temp) |
FIELD_PREP(BMP380_OSRS_PRESS_MASK, data->oversampling_press);
ret = regmap_update_bits_check(data->regmap, BMP380_REG_OSR,
BMP380_OSRS_TEMP_MASK |
BMP380_OSRS_PRESS_MASK,
osrs, &aux);
if (ret) {
dev_err(data->dev, "failed to write oversampling register\n");
return ret;
}
change = change || aux;
/* Configure output data rate */
ret = regmap_update_bits_check(data->regmap, BMP380_REG_ODR,
BMP380_ODRS_MASK, data->sampling_freq, &aux);
if (ret) {
dev_err(data->dev, "failed to write ODR selection register\n");
return ret;
}
change = change || aux;
/* Set filter data */
ret = regmap_update_bits_check(data->regmap, BMP380_REG_CONFIG, BMP380_FILTER_MASK,
FIELD_PREP(BMP380_FILTER_MASK, data->iir_filter_coeff),
&aux);
if (ret) {
dev_err(data->dev, "failed to write config register\n");
return ret;
}
change = change || aux;
if (change) {
/*
* The configurations errors are detected on the fly during a measurement
* cycle. If the sampling frequency is too low, it's faster to reset
* the measurement loop than wait until the next measurement is due.
*
* Resets sensor measurement loop toggling between sleep and normal
* operating modes.
*/
ret = regmap_write_bits(data->regmap, BMP380_REG_POWER_CONTROL,
BMP380_MODE_MASK,
FIELD_PREP(BMP380_MODE_MASK, BMP380_MODE_SLEEP));
if (ret) {
dev_err(data->dev, "failed to set sleep mode\n");
return ret;
}
usleep_range(2000, 2500);
ret = regmap_write_bits(data->regmap, BMP380_REG_POWER_CONTROL,
BMP380_MODE_MASK,
FIELD_PREP(BMP380_MODE_MASK, BMP380_MODE_NORMAL));
if (ret) {
dev_err(data->dev, "failed to set normal mode\n");
return ret;
}
/*
* Waits for measurement before checking configuration error flag.
* Selected longest measure time indicated in section 3.9.1
* in the datasheet.
*/
msleep(80);
/* Check config error flag */
ret = regmap_read(data->regmap, BMP380_REG_ERROR, &tmp);
if (ret) {
dev_err(data->dev,
"failed to read error register\n");
return ret;
}
if (tmp & BMP380_ERR_CONF_MASK) {
dev_warn(data->dev,
"sensor flagged configuration as incompatible\n");
return -EINVAL;
}
}
return 0;
}
static const int bmp380_oversampling_avail[] = { 1, 2, 4, 8, 16, 32 };
static const int bmp380_iir_filter_coeffs_avail[] = { 1, 2, 4, 8, 16, 32, 64, 128};
const struct bmp280_chip_info bmp380_chip_info = {
.id_reg = BMP380_REG_ID,
.chip_id = BMP380_CHIP_ID,
.regmap_config = &bmp380_regmap_config,
.start_up_time = 2000,
.channels = bmp380_channels,
.num_channels = 2,
.oversampling_temp_avail = bmp380_oversampling_avail,
.num_oversampling_temp_avail = ARRAY_SIZE(bmp380_oversampling_avail),
.oversampling_temp_default = ilog2(1),
.oversampling_press_avail = bmp380_oversampling_avail,
.num_oversampling_press_avail = ARRAY_SIZE(bmp380_oversampling_avail),
.oversampling_press_default = ilog2(4),
.sampling_freq_avail = bmp380_odr_table,
.num_sampling_freq_avail = ARRAY_SIZE(bmp380_odr_table) * 2,
.sampling_freq_default = BMP380_ODR_50HZ,
.iir_filter_coeffs_avail = bmp380_iir_filter_coeffs_avail,
.num_iir_filter_coeffs_avail = ARRAY_SIZE(bmp380_iir_filter_coeffs_avail),
.iir_filter_coeff_default = 2,
.chip_config = bmp380_chip_config,
.read_temp = bmp380_read_temp,
.read_press = bmp380_read_press,
.read_calib = bmp380_read_calib,
.preinit = bmp380_preinit,
};
EXPORT_SYMBOL_NS(bmp380_chip_info, IIO_BMP280);
static int bmp580_soft_reset(struct bmp280_data *data)
{
unsigned int reg;
int ret;
ret = regmap_write(data->regmap, BMP580_REG_CMD, BMP580_CMD_SOFT_RESET);
if (ret) {
dev_err(data->dev, "failed to send reset command to device\n");
return ret;
}
usleep_range(2000, 2500);
/* Dummy read of chip_id */
ret = regmap_read(data->regmap, BMP580_REG_CHIP_ID, ®);
if (ret) {
dev_err(data->dev, "failed to reestablish comms after reset\n");
return ret;
}
ret = regmap_read(data->regmap, BMP580_REG_INT_STATUS, ®);
if (ret) {
dev_err(data->dev, "error reading interrupt status register\n");
return ret;
}
if (!(reg & BMP580_INT_STATUS_POR_MASK)) {
dev_err(data->dev, "error resetting sensor\n");
return -EINVAL;
}
return 0;
}
/**
* bmp580_nvm_operation() - Helper function to commit NVM memory operations
* @data: sensor data struct
* @is_write: flag to signal write operation
*/
static int bmp580_nvm_operation(struct bmp280_data *data, bool is_write)
{
unsigned long timeout, poll;
unsigned int reg;
int ret;
/* Check NVM ready flag */
ret = regmap_read(data->regmap, BMP580_REG_STATUS, ®);
if (ret) {
dev_err(data->dev, "failed to check nvm status\n");
return ret;
}
if (!(reg & BMP580_STATUS_NVM_RDY_MASK)) {
dev_err(data->dev, "sensor's nvm is not ready\n");
return -EIO;
}
/* Start NVM operation sequence */
ret = regmap_write(data->regmap, BMP580_REG_CMD, BMP580_CMD_NVM_OP_SEQ_0);
if (ret) {
dev_err(data->dev, "failed to send nvm operation's first sequence\n");
return ret;
}
if (is_write) {
/* Send NVM write sequence */
ret = regmap_write(data->regmap, BMP580_REG_CMD,
BMP580_CMD_NVM_WRITE_SEQ_1);
if (ret) {
dev_err(data->dev, "failed to send nvm write sequence\n");
return ret;
}
/* Datasheet says on 4.8.1.2 it takes approximately 10ms */
poll = 2000;
timeout = 12000;
} else {
/* Send NVM read sequence */
ret = regmap_write(data->regmap, BMP580_REG_CMD,
BMP580_CMD_NVM_READ_SEQ_1);
if (ret) {
dev_err(data->dev, "failed to send nvm read sequence\n");
return ret;
}
/* Datasheet says on 4.8.1.1 it takes approximately 200us */
poll = 50;
timeout = 400;
}
if (ret) {
dev_err(data->dev, "failed to write command sequence\n");
return -EIO;
}
/* Wait until NVM is ready again */
ret = regmap_read_poll_timeout(data->regmap, BMP580_REG_STATUS, reg,
(reg & BMP580_STATUS_NVM_RDY_MASK),
poll, timeout);
if (ret) {
dev_err(data->dev, "error checking nvm operation status\n");
return ret;
}
/* Check NVM error flags */
if ((reg & BMP580_STATUS_NVM_ERR_MASK) || (reg & BMP580_STATUS_NVM_CMD_ERR_MASK)) {
dev_err(data->dev, "error processing nvm operation\n");
return -EIO;
}
return 0;
}
/*
* Contrary to previous sensors families, compensation algorithm is builtin.
* We are only required to read the register raw data and adapt the ranges
* for what is expected on IIO ABI.
*/
static int bmp580_read_temp(struct bmp280_data *data, int *val, int *val2)
{
s32 raw_temp;
int ret;
ret = regmap_bulk_read(data->regmap, BMP580_REG_TEMP_XLSB, data->buf,
sizeof(data->buf));
if (ret) {
dev_err(data->dev, "failed to read temperature\n");
return ret;
}
raw_temp = get_unaligned_le24(data->buf);
if (raw_temp == BMP580_TEMP_SKIPPED) {
dev_err(data->dev, "reading temperature skipped\n");
return -EIO;
}
/*
* Temperature is returned in Celsius degrees in fractional
* form down 2^16. We reescale by x1000 to return milli Celsius
* to respect IIO ABI.
*/
*val = raw_temp * 1000;
*val2 = 16;
return IIO_VAL_FRACTIONAL_LOG2;
}
static int bmp580_read_press(struct bmp280_data *data, int *val, int *val2)
{
u32 raw_press;
int ret;
ret = regmap_bulk_read(data->regmap, BMP580_REG_PRESS_XLSB, data->buf,
sizeof(data->buf));
if (ret) {
dev_err(data->dev, "failed to read pressure\n");
return ret;
}
raw_press = get_unaligned_le24(data->buf);
if (raw_press == BMP580_PRESS_SKIPPED) {
dev_err(data->dev, "reading pressure skipped\n");
return -EIO;
}
/*
* Pressure is returned in Pascals in fractional form down 2^16.
* We reescale /1000 to convert to kilopascal to respect IIO ABI.
*/
*val = raw_press;
*val2 = 64000; /* 2^6 * 1000 */
return IIO_VAL_FRACTIONAL;
}
static const int bmp580_odr_table[][2] = {
[BMP580_ODR_240HZ] = {240, 0},
[BMP580_ODR_218HZ] = {218, 0},
[BMP580_ODR_199HZ] = {199, 0},
[BMP580_ODR_179HZ] = {179, 0},
[BMP580_ODR_160HZ] = {160, 0},
[BMP580_ODR_149HZ] = {149, 0},
[BMP580_ODR_140HZ] = {140, 0},
[BMP580_ODR_129HZ] = {129, 0},
[BMP580_ODR_120HZ] = {120, 0},
[BMP580_ODR_110HZ] = {110, 0},
[BMP580_ODR_100HZ] = {100, 0},
[BMP580_ODR_89HZ] = {89, 0},
[BMP580_ODR_80HZ] = {80, 0},
[BMP580_ODR_70HZ] = {70, 0},
[BMP580_ODR_60HZ] = {60, 0},
[BMP580_ODR_50HZ] = {50, 0},
[BMP580_ODR_45HZ] = {45, 0},
[BMP580_ODR_40HZ] = {40, 0},
[BMP580_ODR_35HZ] = {35, 0},
[BMP580_ODR_30HZ] = {30, 0},
[BMP580_ODR_25HZ] = {25, 0},
[BMP580_ODR_20HZ] = {20, 0},
[BMP580_ODR_15HZ] = {15, 0},
[BMP580_ODR_10HZ] = {10, 0},
[BMP580_ODR_5HZ] = {5, 0},
[BMP580_ODR_4HZ] = {4, 0},
[BMP580_ODR_3HZ] = {3, 0},
[BMP580_ODR_2HZ] = {2, 0},
[BMP580_ODR_1HZ] = {1, 0},
[BMP580_ODR_0_5HZ] = {0, 500000},
[BMP580_ODR_0_25HZ] = {0, 250000},
[BMP580_ODR_0_125HZ] = {0, 125000},
};
static const int bmp580_nvmem_addrs[] = { 0x20, 0x21, 0x22 };
static int bmp580_nvmem_read(void *priv, unsigned int offset, void *val,
size_t bytes)
{
struct bmp280_data *data = priv;
u16 *dst = val;
int ret, addr;
pm_runtime_get_sync(data->dev);
mutex_lock(&data->lock);
/* Set sensor in standby mode */
ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG,
BMP580_MODE_MASK | BMP580_ODR_DEEPSLEEP_DIS,
BMP580_ODR_DEEPSLEEP_DIS |
FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP));
if (ret) {
dev_err(data->dev, "failed to change sensor to standby mode\n");
goto exit;
}
/* Wait standby transition time */
usleep_range(2500, 3000);
while (bytes >= sizeof(*dst)) {
addr = bmp580_nvmem_addrs[offset / sizeof(*dst)];
ret = regmap_write(data->regmap, BMP580_REG_NVM_ADDR,
FIELD_PREP(BMP580_NVM_ROW_ADDR_MASK, addr));
if (ret) {
dev_err(data->dev, "error writing nvm address\n");
goto exit;
}
ret = bmp580_nvm_operation(data, false);
if (ret)
goto exit;
ret = regmap_bulk_read(data->regmap, BMP580_REG_NVM_DATA_LSB, &data->le16,
sizeof(data->le16));
if (ret) {
dev_err(data->dev, "error reading nvm data regs\n");
goto exit;
}
*dst++ = le16_to_cpu(data->le16);
bytes -= sizeof(*dst);
offset += sizeof(*dst);
}
exit:
/* Restore chip config */
data->chip_info->chip_config(data);
mutex_unlock(&data->lock);
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
return ret;
}
static int bmp580_nvmem_write(void *priv, unsigned int offset, void *val,
size_t bytes)
{
struct bmp280_data *data = priv;
u16 *buf = val;
int ret, addr;
pm_runtime_get_sync(data->dev);
mutex_lock(&data->lock);
/* Set sensor in standby mode */
ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG,
BMP580_MODE_MASK | BMP580_ODR_DEEPSLEEP_DIS,
BMP580_ODR_DEEPSLEEP_DIS |
FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP));
if (ret) {
dev_err(data->dev, "failed to change sensor to standby mode\n");
goto exit;
}
/* Wait standby transition time */
usleep_range(2500, 3000);
while (bytes >= sizeof(*buf)) {
addr = bmp580_nvmem_addrs[offset / sizeof(*buf)];
ret = regmap_write(data->regmap, BMP580_REG_NVM_ADDR, BMP580_NVM_PROG_EN |
FIELD_PREP(BMP580_NVM_ROW_ADDR_MASK, addr));
if (ret) {
dev_err(data->dev, "error writing nvm address\n");
goto exit;
}
data->le16 = cpu_to_le16(*buf++);
ret = regmap_bulk_write(data->regmap, BMP580_REG_NVM_DATA_LSB, &data->le16,
sizeof(data->le16));
if (ret) {
dev_err(data->dev, "error writing LSB NVM data regs\n");
goto exit;
}
ret = bmp580_nvm_operation(data, true);
if (ret)
goto exit;
/* Disable programming mode bit */
ret = regmap_update_bits(data->regmap, BMP580_REG_NVM_ADDR,
BMP580_NVM_PROG_EN, 0);
if (ret) {
dev_err(data->dev, "error resetting nvm write\n");
goto exit;
}
bytes -= sizeof(*buf);
offset += sizeof(*buf);
}
exit:
/* Restore chip config */
data->chip_info->chip_config(data);
mutex_unlock(&data->lock);
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
return ret;
}
static int bmp580_preinit(struct bmp280_data *data)
{
struct nvmem_config config = {
.dev = data->dev,
.priv = data,
.name = "bmp580_nvmem",
.word_size = sizeof(u16),
.stride = sizeof(u16),
.size = 3 * sizeof(u16),
.reg_read = bmp580_nvmem_read,
.reg_write = bmp580_nvmem_write,
};
unsigned int reg;
int ret;
/* Issue soft-reset command */
ret = bmp580_soft_reset(data);
if (ret)
return ret;
/* Post powerup sequence */
ret = regmap_read(data->regmap, BMP580_REG_CHIP_ID, ®);
if (ret)
return ret;
/* Print warn message if we don't know the chip id */
if (reg != BMP580_CHIP_ID && reg != BMP580_CHIP_ID_ALT)
dev_warn(data->dev, "preinit: unexpected chip_id\n");
ret = regmap_read(data->regmap, BMP580_REG_STATUS, ®);
if (ret)
return ret;
/* Check nvm status */
if (!(reg & BMP580_STATUS_NVM_RDY_MASK) || (reg & BMP580_STATUS_NVM_ERR_MASK)) {
dev_err(data->dev, "preinit: nvm error on powerup sequence\n");
return -EIO;
}
/* Register nvmem device */
return PTR_ERR_OR_ZERO(devm_nvmem_register(config.dev, &config));
}
static int bmp580_chip_config(struct bmp280_data *data)
{
bool change = false, aux;
unsigned int tmp;
u8 reg_val;
int ret;
/* Sets sensor in standby mode */
ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG,
BMP580_MODE_MASK | BMP580_ODR_DEEPSLEEP_DIS,
BMP580_ODR_DEEPSLEEP_DIS |
FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP));
if (ret) {
dev_err(data->dev, "failed to change sensor to standby mode\n");
return ret;
}
/* From datasheet's table 4: electrical characteristics */
usleep_range(2500, 3000);
/* Set default DSP mode settings */
reg_val = FIELD_PREP(BMP580_DSP_COMP_MASK, BMP580_DSP_PRESS_TEMP_COMP_EN) |
BMP580_DSP_SHDW_IIR_TEMP_EN | BMP580_DSP_SHDW_IIR_PRESS_EN;
ret = regmap_update_bits(data->regmap, BMP580_REG_DSP_CONFIG,
BMP580_DSP_COMP_MASK |
BMP580_DSP_SHDW_IIR_TEMP_EN |
BMP580_DSP_SHDW_IIR_PRESS_EN, reg_val);
/* Configure oversampling */
reg_val = FIELD_PREP(BMP580_OSR_TEMP_MASK, data->oversampling_temp) |
FIELD_PREP(BMP580_OSR_PRESS_MASK, data->oversampling_press) |
BMP580_OSR_PRESS_EN;
ret = regmap_update_bits_check(data->regmap, BMP580_REG_OSR_CONFIG,
BMP580_OSR_TEMP_MASK | BMP580_OSR_PRESS_MASK |
BMP580_OSR_PRESS_EN,
reg_val, &aux);
if (ret) {
dev_err(data->dev, "failed to write oversampling register\n");
return ret;
}
change = change || aux;
/* Configure output data rate */
ret = regmap_update_bits_check(data->regmap, BMP580_REG_ODR_CONFIG, BMP580_ODR_MASK,
FIELD_PREP(BMP580_ODR_MASK, data->sampling_freq),
&aux);
if (ret) {
dev_err(data->dev, "failed to write ODR configuration register\n");
return ret;
}
change = change || aux;
/* Set filter data */
reg_val = FIELD_PREP(BMP580_DSP_IIR_PRESS_MASK, data->iir_filter_coeff) |
FIELD_PREP(BMP580_DSP_IIR_TEMP_MASK, data->iir_filter_coeff);
ret = regmap_update_bits_check(data->regmap, BMP580_REG_DSP_IIR,
BMP580_DSP_IIR_PRESS_MASK |
BMP580_DSP_IIR_TEMP_MASK,
reg_val, &aux);
if (ret) {
dev_err(data->dev, "failed to write config register\n");
return ret;
}
change = change || aux;
/* Restore sensor to normal operation mode */
ret = regmap_write_bits(data->regmap, BMP580_REG_ODR_CONFIG,
BMP580_MODE_MASK,
FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_NORMAL));
if (ret) {
dev_err(data->dev, "failed to set normal mode\n");
return ret;
}
/* From datasheet's table 4: electrical characteristics */
usleep_range(3000, 3500);
if (change) {
/*
* Check if ODR and OSR settings are valid or we are
* operating in a degraded mode.
*/
ret = regmap_read(data->regmap, BMP580_REG_EFF_OSR, &tmp);
if (ret) {
dev_err(data->dev, "error reading effective OSR register\n");
return ret;
}
if (!(tmp & BMP580_EFF_OSR_VALID_ODR)) {
dev_warn(data->dev, "OSR and ODR incompatible settings detected\n");
/* Set current OSR settings from data on effective OSR */
data->oversampling_temp = FIELD_GET(BMP580_EFF_OSR_TEMP_MASK, tmp);
data->oversampling_press = FIELD_GET(BMP580_EFF_OSR_PRESS_MASK, tmp);
return -EINVAL;
}
}
return 0;
}
static const int bmp580_oversampling_avail[] = { 1, 2, 4, 8, 16, 32, 64, 128 };
const struct bmp280_chip_info bmp580_chip_info = {
.id_reg = BMP580_REG_CHIP_ID,
.chip_id = BMP580_CHIP_ID,
.regmap_config = &bmp580_regmap_config,
.start_up_time = 2000,
.channels = bmp380_channels,
.num_channels = 2,
.oversampling_temp_avail = bmp580_oversampling_avail,
.num_oversampling_temp_avail = ARRAY_SIZE(bmp580_oversampling_avail),
.oversampling_temp_default = ilog2(1),
.oversampling_press_avail = bmp580_oversampling_avail,
.num_oversampling_press_avail = ARRAY_SIZE(bmp580_oversampling_avail),
.oversampling_press_default = ilog2(4),
.sampling_freq_avail = bmp580_odr_table,
.num_sampling_freq_avail = ARRAY_SIZE(bmp580_odr_table) * 2,
.sampling_freq_default = BMP580_ODR_50HZ,
.iir_filter_coeffs_avail = bmp380_iir_filter_coeffs_avail,
.num_iir_filter_coeffs_avail = ARRAY_SIZE(bmp380_iir_filter_coeffs_avail),
.iir_filter_coeff_default = 2,
.chip_config = bmp580_chip_config,
.read_temp = bmp580_read_temp,
.read_press = bmp580_read_press,
.preinit = bmp580_preinit,
};
EXPORT_SYMBOL_NS(bmp580_chip_info, IIO_BMP280);
static int bmp180_measure(struct bmp280_data *data, u8 ctrl_meas)
{
const int conversion_time_max[] = { 4500, 7500, 13500, 25500 };
unsigned int delay_us;
unsigned int ctrl;
int ret;
if (data->use_eoc)
reinit_completion(&data->done);
ret = regmap_write(data->regmap, BMP280_REG_CTRL_MEAS, ctrl_meas);
if (ret)
return ret;
if (data->use_eoc) {
/*
* If we have a completion interrupt, use it, wait up to
* 100ms. The longest conversion time listed is 76.5 ms for
* advanced resolution mode.
*/
ret = wait_for_completion_timeout(&data->done,
1 + msecs_to_jiffies(100));
if (!ret)
dev_err(data->dev, "timeout waiting for completion\n");
} else {
if (FIELD_GET(BMP180_MEAS_CTRL_MASK, ctrl_meas) == BMP180_MEAS_TEMP)
delay_us = 4500;
else
delay_us =
conversion_time_max[data->oversampling_press];
usleep_range(delay_us, delay_us + 1000);
}
ret = regmap_read(data->regmap, BMP280_REG_CTRL_MEAS, &ctrl);
if (ret)
return ret;
/* The value of this bit reset to "0" after conversion is complete */
if (ctrl & BMP180_MEAS_SCO)
return -EIO;
return 0;
}
static int bmp180_read_adc_temp(struct bmp280_data *data, int *val)
{
int ret;
ret = bmp180_measure(data,
FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_TEMP) |
BMP180_MEAS_SCO);
if (ret)
return ret;
ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB,
&data->be16, sizeof(data->be16));
if (ret)
return ret;
*val = be16_to_cpu(data->be16);
return 0;
}
static int bmp180_read_calib(struct bmp280_data *data)
{
struct bmp180_calib *calib = &data->calib.bmp180;
int ret;
int i;
ret = regmap_bulk_read(data->regmap, BMP180_REG_CALIB_START,
data->bmp180_cal_buf, sizeof(data->bmp180_cal_buf));
if (ret < 0)
return ret;
/* None of the words has the value 0 or 0xFFFF */
for (i = 0; i < ARRAY_SIZE(data->bmp180_cal_buf); i++) {
if (data->bmp180_cal_buf[i] == cpu_to_be16(0) ||
data->bmp180_cal_buf[i] == cpu_to_be16(0xffff))
return -EIO;
}
/* Toss the calibration data into the entropy pool */
add_device_randomness(data->bmp180_cal_buf, sizeof(data->bmp180_cal_buf));
calib->AC1 = be16_to_cpu(data->bmp180_cal_buf[AC1]);
calib->AC2 = be16_to_cpu(data->bmp180_cal_buf[AC2]);
calib->AC3 = be16_to_cpu(data->bmp180_cal_buf[AC3]);
calib->AC4 = be16_to_cpu(data->bmp180_cal_buf[AC4]);
calib->AC5 = be16_to_cpu(data->bmp180_cal_buf[AC5]);
calib->AC6 = be16_to_cpu(data->bmp180_cal_buf[AC6]);
calib->B1 = be16_to_cpu(data->bmp180_cal_buf[B1]);
calib->B2 = be16_to_cpu(data->bmp180_cal_buf[B2]);
calib->MB = be16_to_cpu(data->bmp180_cal_buf[MB]);
calib->MC = be16_to_cpu(data->bmp180_cal_buf[MC]);
calib->MD = be16_to_cpu(data->bmp180_cal_buf[MD]);
return 0;
}
/*
* Returns temperature in DegC, resolution is 0.1 DegC.
* t_fine carries fine temperature as global value.
*
* Taken from datasheet, Section 3.5, "Calculating pressure and temperature".
*/
static s32 bmp180_compensate_temp(struct bmp280_data *data, s32 adc_temp)
{
struct bmp180_calib *calib = &data->calib.bmp180;
s32 x1, x2;
x1 = ((adc_temp - calib->AC6) * calib->AC5) >> 15;
x2 = (calib->MC << 11) / (x1 + calib->MD);
data->t_fine = x1 + x2;
return (data->t_fine + 8) >> 4;
}
static int bmp180_read_temp(struct bmp280_data *data, int *val, int *val2)
{
s32 adc_temp, comp_temp;
int ret;
ret = bmp180_read_adc_temp(data, &adc_temp);
if (ret)
return ret;
comp_temp = bmp180_compensate_temp(data, adc_temp);
/*
* val might be NULL if we're called by the read_press routine,
* who only cares about the carry over t_fine value.
*/
if (val) {
*val = comp_temp * 100;
return IIO_VAL_INT;
}
return 0;
}
static int bmp180_read_adc_press(struct bmp280_data *data, int *val)
{
u8 oss = data->oversampling_press;
int ret;
ret = bmp180_measure(data,
FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_PRESS) |
FIELD_PREP(BMP180_OSRS_PRESS_MASK, oss) |
BMP180_MEAS_SCO);
if (ret)
return ret;
ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB,
data->buf, sizeof(data->buf));
if (ret)
return ret;
*val = get_unaligned_be24(data->buf) >> (8 - oss);
return 0;
}
/*
* Returns pressure in Pa, resolution is 1 Pa.
*
* Taken from datasheet, Section 3.5, "Calculating pressure and temperature".
*/
static u32 bmp180_compensate_press(struct bmp280_data *data, s32 adc_press)
{
struct bmp180_calib *calib = &data->calib.bmp180;
s32 oss = data->oversampling_press;
s32 x1, x2, x3, p;
s32 b3, b6;
u32 b4, b7;
b6 = data->t_fine - 4000;
x1 = (calib->B2 * (b6 * b6 >> 12)) >> 11;
x2 = calib->AC2 * b6 >> 11;
x3 = x1 + x2;
b3 = ((((s32)calib->AC1 * 4 + x3) << oss) + 2) / 4;
x1 = calib->AC3 * b6 >> 13;
x2 = (calib->B1 * ((b6 * b6) >> 12)) >> 16;
x3 = (x1 + x2 + 2) >> 2;
b4 = calib->AC4 * (u32)(x3 + 32768) >> 15;
b7 = ((u32)adc_press - b3) * (50000 >> oss);
if (b7 < 0x80000000)
p = (b7 * 2) / b4;
else
p = (b7 / b4) * 2;
x1 = (p >> 8) * (p >> 8);
x1 = (x1 * 3038) >> 16;
x2 = (-7357 * p) >> 16;
return p + ((x1 + x2 + 3791) >> 4);
}
static int bmp180_read_press(struct bmp280_data *data,
int *val, int *val2)
{
u32 comp_press;
s32 adc_press;
int ret;
/* Read and compensate temperature so we get a reading of t_fine. */
ret = bmp180_read_temp(data, NULL, NULL);
if (ret)
return ret;
ret = bmp180_read_adc_press(data, &adc_press);
if (ret)
return ret;
comp_press = bmp180_compensate_press(data, adc_press);
*val = comp_press;
*val2 = 1000;
return IIO_VAL_FRACTIONAL;
}
static int bmp180_chip_config(struct bmp280_data *data)
{
return 0;
}
static const int bmp180_oversampling_temp_avail[] = { 1 };
static const int bmp180_oversampling_press_avail[] = { 1, 2, 4, 8 };
const struct bmp280_chip_info bmp180_chip_info = {
.id_reg = BMP280_REG_ID,
.chip_id = BMP180_CHIP_ID,
.regmap_config = &bmp180_regmap_config,
.start_up_time = 2000,
.channels = bmp280_channels,
.num_channels = 2,
.oversampling_temp_avail = bmp180_oversampling_temp_avail,
.num_oversampling_temp_avail =
ARRAY_SIZE(bmp180_oversampling_temp_avail),
.oversampling_temp_default = 0,
.oversampling_press_avail = bmp180_oversampling_press_avail,
.num_oversampling_press_avail =
ARRAY_SIZE(bmp180_oversampling_press_avail),
.oversampling_press_default = BMP180_MEAS_PRESS_8X,
.chip_config = bmp180_chip_config,
.read_temp = bmp180_read_temp,
.read_press = bmp180_read_press,
.read_calib = bmp180_read_calib,
};
EXPORT_SYMBOL_NS(bmp180_chip_info, IIO_BMP280);
static irqreturn_t bmp085_eoc_irq(int irq, void *d)
{
struct bmp280_data *data = d;
complete(&data->done);
return IRQ_HANDLED;
}
static int bmp085_fetch_eoc_irq(struct device *dev,
const char *name,
int irq,
struct bmp280_data *data)
{
unsigned long irq_trig;
int ret;
irq_trig = irqd_get_trigger_type(irq_get_irq_data(irq));
if (irq_trig != IRQF_TRIGGER_RISING) {
dev_err(dev, "non-rising trigger given for EOC interrupt, trying to enforce it\n");
irq_trig = IRQF_TRIGGER_RISING;
}
init_completion(&data->done);
ret = devm_request_threaded_irq(dev,
irq,
bmp085_eoc_irq,
NULL,
irq_trig,
name,
data);
if (ret) {
/* Bail out without IRQ but keep the driver in place */
dev_err(dev, "unable to request DRDY IRQ\n");
return 0;
}
data->use_eoc = true;
return 0;
}
static void bmp280_pm_disable(void *data)
{
struct device *dev = data;
pm_runtime_get_sync(dev);
pm_runtime_put_noidle(dev);
pm_runtime_disable(dev);
}
static void bmp280_regulators_disable(void *data)
{
struct regulator_bulk_data *supplies = data;
regulator_bulk_disable(BMP280_NUM_SUPPLIES, supplies);
}
int bmp280_common_probe(struct device *dev,
struct regmap *regmap,
const struct bmp280_chip_info *chip_info,
const char *name,
int irq)
{
struct iio_dev *indio_dev;
struct bmp280_data *data;
struct gpio_desc *gpiod;
unsigned int chip_id;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
mutex_init(&data->lock);
data->dev = dev;
indio_dev->name = name;
indio_dev->info = &bmp280_info;
indio_dev->modes = INDIO_DIRECT_MODE;
data->chip_info = chip_info;
/* Apply initial values from chip info structure */
indio_dev->channels = chip_info->channels;
indio_dev->num_channels = chip_info->num_channels;
data->oversampling_press = chip_info->oversampling_press_default;
data->oversampling_humid = chip_info->oversampling_humid_default;
data->oversampling_temp = chip_info->oversampling_temp_default;
data->iir_filter_coeff = chip_info->iir_filter_coeff_default;
data->sampling_freq = chip_info->sampling_freq_default;
data->start_up_time = chip_info->start_up_time;
/* Bring up regulators */
regulator_bulk_set_supply_names(data->supplies,
bmp280_supply_names,
BMP280_NUM_SUPPLIES);
ret = devm_regulator_bulk_get(dev,
BMP280_NUM_SUPPLIES, data->supplies);
if (ret) {
dev_err(dev, "failed to get regulators\n");
return ret;
}
ret = regulator_bulk_enable(BMP280_NUM_SUPPLIES, data->supplies);
if (ret) {
dev_err(dev, "failed to enable regulators\n");
return ret;
}
ret = devm_add_action_or_reset(dev, bmp280_regulators_disable,
data->supplies);
if (ret)
return ret;
/* Wait to make sure we started up properly */
usleep_range(data->start_up_time, data->start_up_time + 100);
/* Bring chip out of reset if there is an assigned GPIO line */
gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
/* Deassert the signal */
if (gpiod) {
dev_info(dev, "release reset\n");
gpiod_set_value(gpiod, 0);
}
data->regmap = regmap;
ret = regmap_read(regmap, data->chip_info->id_reg, &chip_id);
if (ret < 0)
return ret;
if (chip_id != data->chip_info->chip_id) {
dev_err(dev, "bad chip id: expected %x got %x\n",
data->chip_info->chip_id, chip_id);
return -EINVAL;
}
if (data->chip_info->preinit) {
ret = data->chip_info->preinit(data);
if (ret)
return dev_err_probe(data->dev, ret,
"error running preinit tasks\n");
}
ret = data->chip_info->chip_config(data);
if (ret < 0)
return ret;
dev_set_drvdata(dev, indio_dev);
/*
* Some chips have calibration parameters "programmed into the devices'
* non-volatile memory during production". Let's read them out at probe
* time once. They will not change.
*/
if (data->chip_info->read_calib) {
ret = data->chip_info->read_calib(data);
if (ret < 0)
return dev_err_probe(data->dev, ret,
"failed to read calibration coefficients\n");
}
/*
* Attempt to grab an optional EOC IRQ - only the BMP085 has this
* however as it happens, the BMP085 shares the chip ID of BMP180
* so we look for an IRQ if we have that.
*/
if (irq > 0 || (chip_id == BMP180_CHIP_ID)) {
ret = bmp085_fetch_eoc_irq(dev, name, irq, data);
if (ret)
return ret;
}
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
/*
* Set autosuspend to two orders of magnitude larger than the
* start-up time.
*/
pm_runtime_set_autosuspend_delay(dev, data->start_up_time / 10);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
ret = devm_add_action_or_reset(dev, bmp280_pm_disable, dev);
if (ret)
return ret;
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS(bmp280_common_probe, IIO_BMP280);
static int bmp280_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmp280_data *data = iio_priv(indio_dev);
return regulator_bulk_disable(BMP280_NUM_SUPPLIES, data->supplies);
}
static int bmp280_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmp280_data *data = iio_priv(indio_dev);
int ret;
ret = regulator_bulk_enable(BMP280_NUM_SUPPLIES, data->supplies);
if (ret)
return ret;
usleep_range(data->start_up_time, data->start_up_time + 100);
return data->chip_info->chip_config(data);
}
EXPORT_RUNTIME_DEV_PM_OPS(bmp280_dev_pm_ops, bmp280_runtime_suspend,
bmp280_runtime_resume, NULL);
MODULE_AUTHOR("Vlad Dogaru <[email protected]>");
MODULE_DESCRIPTION("Driver for Bosch Sensortec BMP180/BMP280 pressure and temperature sensor");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/bmp280-core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016 Marek Vasut <[email protected]>
*
* Driver for Hope RF HP03 digital temperature and pressure sensor.
*/
#define pr_fmt(fmt) "hp03: " fmt
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
/*
* The HP03 sensor occupies two fixed I2C addresses:
* 0x50 ... read-only EEPROM with calibration data
* 0x77 ... read-write ADC for pressure and temperature
*/
#define HP03_EEPROM_ADDR 0x50
#define HP03_ADC_ADDR 0x77
#define HP03_EEPROM_CX_OFFSET 0x10
#define HP03_EEPROM_AB_OFFSET 0x1e
#define HP03_EEPROM_CD_OFFSET 0x20
#define HP03_ADC_WRITE_REG 0xff
#define HP03_ADC_READ_REG 0xfd
#define HP03_ADC_READ_PRESSURE 0xf0 /* D1 in datasheet */
#define HP03_ADC_READ_TEMP 0xe8 /* D2 in datasheet */
struct hp03_priv {
struct i2c_client *client;
struct mutex lock;
struct gpio_desc *xclr_gpio;
struct i2c_client *eeprom_client;
struct regmap *eeprom_regmap;
s32 pressure; /* kPa */
s32 temp; /* Deg. C */
};
static const struct iio_chan_spec hp03_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
},
};
static bool hp03_is_writeable_reg(struct device *dev, unsigned int reg)
{
return false;
}
static bool hp03_is_volatile_reg(struct device *dev, unsigned int reg)
{
return false;
}
static const struct regmap_config hp03_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = HP03_EEPROM_CD_OFFSET + 1,
.cache_type = REGCACHE_RBTREE,
.writeable_reg = hp03_is_writeable_reg,
.volatile_reg = hp03_is_volatile_reg,
};
static int hp03_get_temp_pressure(struct hp03_priv *priv, const u8 reg)
{
int ret;
ret = i2c_smbus_write_byte_data(priv->client, HP03_ADC_WRITE_REG, reg);
if (ret < 0)
return ret;
msleep(50); /* Wait for conversion to finish */
return i2c_smbus_read_word_data(priv->client, HP03_ADC_READ_REG);
}
static int hp03_update_temp_pressure(struct hp03_priv *priv)
{
struct device *dev = &priv->client->dev;
u8 coefs[18];
u16 cx_val[7];
int ab_val, d1_val, d2_val, diff_val, dut, off, sens, x;
int i, ret;
/* Sample coefficients from EEPROM */
ret = regmap_bulk_read(priv->eeprom_regmap, HP03_EEPROM_CX_OFFSET,
coefs, sizeof(coefs));
if (ret < 0) {
dev_err(dev, "Failed to read EEPROM (reg=%02x)\n",
HP03_EEPROM_CX_OFFSET);
return ret;
}
/* Sample Temperature and Pressure */
gpiod_set_value_cansleep(priv->xclr_gpio, 1);
ret = hp03_get_temp_pressure(priv, HP03_ADC_READ_PRESSURE);
if (ret < 0) {
dev_err(dev, "Failed to read pressure\n");
goto err_adc;
}
d1_val = ret;
ret = hp03_get_temp_pressure(priv, HP03_ADC_READ_TEMP);
if (ret < 0) {
dev_err(dev, "Failed to read temperature\n");
goto err_adc;
}
d2_val = ret;
gpiod_set_value_cansleep(priv->xclr_gpio, 0);
/* The Cx coefficients and Temp/Pressure values are MSB first. */
for (i = 0; i < 7; i++)
cx_val[i] = (coefs[2 * i] << 8) | (coefs[(2 * i) + 1] << 0);
d1_val = ((d1_val >> 8) & 0xff) | ((d1_val & 0xff) << 8);
d2_val = ((d2_val >> 8) & 0xff) | ((d2_val & 0xff) << 8);
/* Coefficient voodoo from the HP03 datasheet. */
if (d2_val >= cx_val[4])
ab_val = coefs[14]; /* A-value */
else
ab_val = coefs[15]; /* B-value */
diff_val = d2_val - cx_val[4];
dut = (ab_val * (diff_val >> 7) * (diff_val >> 7)) >> coefs[16];
dut = diff_val - dut;
off = (cx_val[1] + (((cx_val[3] - 1024) * dut) >> 14)) * 4;
sens = cx_val[0] + ((cx_val[2] * dut) >> 10);
x = ((sens * (d1_val - 7168)) >> 14) - off;
priv->pressure = ((x * 100) >> 5) + (cx_val[6] * 10);
priv->temp = 250 + ((dut * cx_val[5]) >> 16) - (dut >> coefs[17]);
return 0;
err_adc:
gpiod_set_value_cansleep(priv->xclr_gpio, 0);
return ret;
}
static int hp03_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct hp03_priv *priv = iio_priv(indio_dev);
int ret;
mutex_lock(&priv->lock);
ret = hp03_update_temp_pressure(priv);
mutex_unlock(&priv->lock);
if (ret)
return ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_PRESSURE:
*val = priv->pressure;
return IIO_VAL_INT;
case IIO_TEMP:
*val = priv->temp;
return IIO_VAL_INT;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_PRESSURE:
*val = 0;
*val2 = 1000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = 10;
return IIO_VAL_INT;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
}
return -EINVAL;
}
static const struct iio_info hp03_info = {
.read_raw = &hp03_read_raw,
};
static int hp03_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct device *dev = &client->dev;
struct iio_dev *indio_dev;
struct hp03_priv *priv;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
if (!indio_dev)
return -ENOMEM;
priv = iio_priv(indio_dev);
priv->client = client;
mutex_init(&priv->lock);
indio_dev->name = id->name;
indio_dev->channels = hp03_channels;
indio_dev->num_channels = ARRAY_SIZE(hp03_channels);
indio_dev->info = &hp03_info;
indio_dev->modes = INDIO_DIRECT_MODE;
priv->xclr_gpio = devm_gpiod_get_index(dev, "xclr", 0, GPIOD_OUT_HIGH);
if (IS_ERR(priv->xclr_gpio)) {
dev_err(dev, "Failed to claim XCLR GPIO\n");
ret = PTR_ERR(priv->xclr_gpio);
return ret;
}
/*
* Allocate another device for the on-sensor EEPROM,
* which has it's dedicated I2C address and contains
* the calibration constants for the sensor.
*/
priv->eeprom_client = devm_i2c_new_dummy_device(dev, client->adapter,
HP03_EEPROM_ADDR);
if (IS_ERR(priv->eeprom_client)) {
dev_err(dev, "New EEPROM I2C device failed\n");
return PTR_ERR(priv->eeprom_client);
}
priv->eeprom_regmap = devm_regmap_init_i2c(priv->eeprom_client,
&hp03_regmap_config);
if (IS_ERR(priv->eeprom_regmap)) {
dev_err(dev, "Failed to allocate EEPROM regmap\n");
return PTR_ERR(priv->eeprom_regmap);
}
ret = devm_iio_device_register(dev, indio_dev);
if (ret) {
dev_err(dev, "Failed to register IIO device\n");
return ret;
}
return 0;
}
static const struct i2c_device_id hp03_id[] = {
{ "hp03", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, hp03_id);
static const struct of_device_id hp03_of_match[] = {
{ .compatible = "hoperf,hp03" },
{ },
};
MODULE_DEVICE_TABLE(of, hp03_of_match);
static struct i2c_driver hp03_driver = {
.driver = {
.name = "hp03",
.of_match_table = hp03_of_match,
},
.probe = hp03_probe,
.id_table = hp03_id,
};
module_i2c_driver(hp03_driver);
MODULE_AUTHOR("Marek Vasut <[email protected]>");
MODULE_DESCRIPTION("Driver for Hope RF HP03 pressure and temperature sensor");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/hp03.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ms5637.c - Support for Measurement-Specialties MS5637, MS5805
* MS5837 and MS8607 pressure & temperature sensor
*
* Copyright (c) 2015 Measurement-Specialties
*
* (7-bit I2C slave address 0x76)
*
* Datasheet:
* http://www.meas-spec.com/downloads/MS5637-02BA03.pdf
* Datasheet:
* http://www.meas-spec.com/downloads/MS5805-02BA01.pdf
* Datasheet:
* http://www.meas-spec.com/downloads/MS5837-30BA.pdf
* Datasheet:
* http://www.meas-spec.com/downloads/MS8607-02BA01.pdf
*/
#include <linux/init.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/stat.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/mutex.h>
#include "../common/ms_sensors/ms_sensors_i2c.h"
struct ms_tp_data {
const char *name;
const struct ms_tp_hw_data *hw;
};
static const int ms5637_samp_freq[6] = { 960, 480, 240, 120, 60, 30 };
static ssize_t ms5637_show_samp_freq(struct device *dev, struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ms_tp_dev *dev_data = iio_priv(indio_dev);
int i, len = 0;
for (i = 0; i <= dev_data->hw->max_res_index; i++)
len += sysfs_emit_at(buf, len, "%u ", ms5637_samp_freq[i]);
sysfs_emit_at(buf, len - 1, "\n");
return len;
}
static int ms5637_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *channel, int *val,
int *val2, long mask)
{
int ret;
int temperature;
unsigned int pressure;
struct ms_tp_dev *dev_data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
ret = ms_sensors_read_temp_and_pressure(dev_data,
&temperature,
&pressure);
if (ret)
return ret;
switch (channel->type) {
case IIO_TEMP: /* in milli °C */
*val = temperature;
return IIO_VAL_INT;
case IIO_PRESSURE: /* in kPa */
*val = pressure / 1000;
*val2 = (pressure % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
*val = ms5637_samp_freq[dev_data->res_index];
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int ms5637_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct ms_tp_dev *dev_data = iio_priv(indio_dev);
int i;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
i = ARRAY_SIZE(ms5637_samp_freq);
while (i-- > 0)
if (val == ms5637_samp_freq[i])
break;
if (i < 0)
return -EINVAL;
dev_data->res_index = i;
return 0;
default:
return -EINVAL;
}
}
static const struct iio_chan_spec ms5637_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
}
};
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(ms5637_show_samp_freq);
static struct attribute *ms5637_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group ms5637_attribute_group = {
.attrs = ms5637_attributes,
};
static const struct iio_info ms5637_info = {
.read_raw = ms5637_read_raw,
.write_raw = ms5637_write_raw,
.attrs = &ms5637_attribute_group,
};
static int ms5637_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
const struct ms_tp_data *data;
struct ms_tp_dev *dev_data;
struct iio_dev *indio_dev;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_WORD_DATA |
I2C_FUNC_SMBUS_WRITE_BYTE |
I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
dev_err(&client->dev,
"Adapter does not support some i2c transaction\n");
return -EOPNOTSUPP;
}
if (id)
data = (const struct ms_tp_data *)id->driver_data;
else
data = device_get_match_data(&client->dev);
if (!data)
return -EINVAL;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*dev_data));
if (!indio_dev)
return -ENOMEM;
dev_data = iio_priv(indio_dev);
dev_data->client = client;
dev_data->res_index = data->hw->max_res_index;
dev_data->hw = data->hw;
mutex_init(&dev_data->lock);
indio_dev->info = &ms5637_info;
indio_dev->name = data->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = ms5637_channels;
indio_dev->num_channels = ARRAY_SIZE(ms5637_channels);
i2c_set_clientdata(client, indio_dev);
ret = ms_sensors_reset(client, 0x1E, 3000);
if (ret)
return ret;
ret = ms_sensors_tp_read_prom(dev_data);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct ms_tp_hw_data ms5637_hw_data = {
.prom_len = 7,
.max_res_index = 5
};
static const struct ms_tp_hw_data ms5803_hw_data = {
.prom_len = 8,
.max_res_index = 4
};
static const struct ms_tp_data ms5637_data = { .name = "ms5637", .hw = &ms5637_hw_data };
static const struct ms_tp_data ms5803_data = { .name = "ms5803", .hw = &ms5803_hw_data };
static const struct ms_tp_data ms5805_data = { .name = "ms5805", .hw = &ms5637_hw_data };
static const struct ms_tp_data ms5837_data = { .name = "ms5837", .hw = &ms5637_hw_data };
static const struct ms_tp_data ms8607_data = {
.name = "ms8607-temppressure",
.hw = &ms5637_hw_data,
};
static const struct i2c_device_id ms5637_id[] = {
{"ms5637", (kernel_ulong_t)&ms5637_data },
{"ms5805", (kernel_ulong_t)&ms5805_data },
{"ms5837", (kernel_ulong_t)&ms5837_data },
{"ms8607-temppressure", (kernel_ulong_t)&ms8607_data },
{}
};
MODULE_DEVICE_TABLE(i2c, ms5637_id);
static const struct of_device_id ms5637_of_match[] = {
{ .compatible = "meas,ms5637", .data = &ms5637_data },
{ .compatible = "meas,ms5803", .data = &ms5803_data },
{ .compatible = "meas,ms5805", .data = &ms5805_data },
{ .compatible = "meas,ms5837", .data = &ms5837_data },
{ .compatible = "meas,ms8607-temppressure", .data = &ms8607_data },
{ },
};
MODULE_DEVICE_TABLE(of, ms5637_of_match);
static struct i2c_driver ms5637_driver = {
.probe = ms5637_probe,
.id_table = ms5637_id,
.driver = {
.name = "ms5637",
.of_match_table = ms5637_of_match,
},
};
module_i2c_driver(ms5637_driver);
MODULE_DESCRIPTION("Measurement-Specialties ms5637 temperature & pressure driver");
MODULE_AUTHOR("William Markezana <[email protected]>");
MODULE_AUTHOR("Ludovic Tancerel <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_MEAS_SPEC_SENSORS);
| linux-master | drivers/iio/pressure/ms5637.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics pressures driver
*
* Copyright 2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/acpi.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors.h>
#include <linux/iio/common/st_sensors_i2c.h>
#include "st_pressure.h"
static const struct of_device_id st_press_of_match[] = {
{
.compatible = "st,lps001wp-press",
.data = LPS001WP_PRESS_DEV_NAME,
},
{
.compatible = "st,lps25h-press",
.data = LPS25H_PRESS_DEV_NAME,
},
{
.compatible = "st,lps331ap-press",
.data = LPS331AP_PRESS_DEV_NAME,
},
{
.compatible = "st,lps22hb-press",
.data = LPS22HB_PRESS_DEV_NAME,
},
{
.compatible = "st,lps33hw",
.data = LPS33HW_PRESS_DEV_NAME,
},
{
.compatible = "st,lps35hw",
.data = LPS35HW_PRESS_DEV_NAME,
},
{
.compatible = "st,lps22hh",
.data = LPS22HH_PRESS_DEV_NAME,
},
{
.compatible = "st,lps22df",
.data = LPS22DF_PRESS_DEV_NAME,
},
{},
};
MODULE_DEVICE_TABLE(of, st_press_of_match);
#ifdef CONFIG_ACPI
static const struct acpi_device_id st_press_acpi_match[] = {
{"SNO9210", LPS22HB},
{ },
};
MODULE_DEVICE_TABLE(acpi, st_press_acpi_match);
#endif
static const struct i2c_device_id st_press_id_table[] = {
{ LPS001WP_PRESS_DEV_NAME, LPS001WP },
{ LPS25H_PRESS_DEV_NAME, LPS25H },
{ LPS331AP_PRESS_DEV_NAME, LPS331AP },
{ LPS22HB_PRESS_DEV_NAME, LPS22HB },
{ LPS33HW_PRESS_DEV_NAME, LPS33HW },
{ LPS35HW_PRESS_DEV_NAME, LPS35HW },
{ LPS22HH_PRESS_DEV_NAME, LPS22HH },
{ LPS22DF_PRESS_DEV_NAME, LPS22DF },
{},
};
MODULE_DEVICE_TABLE(i2c, st_press_id_table);
static int st_press_i2c_probe(struct i2c_client *client)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *press_data;
struct iio_dev *indio_dev;
int ret;
st_sensors_dev_name_probe(&client->dev, client->name, sizeof(client->name));
settings = st_press_get_settings(client->name);
if (!settings) {
dev_err(&client->dev, "device name %s not recognized.\n",
client->name);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*press_data));
if (!indio_dev)
return -ENOMEM;
press_data = iio_priv(indio_dev);
press_data->sensor_settings = (struct st_sensor_settings *)settings;
ret = st_sensors_i2c_configure(indio_dev, client);
if (ret < 0)
return ret;
ret = st_sensors_power_enable(indio_dev);
if (ret)
return ret;
return st_press_common_probe(indio_dev);
}
static struct i2c_driver st_press_driver = {
.driver = {
.name = "st-press-i2c",
.of_match_table = st_press_of_match,
.acpi_match_table = ACPI_PTR(st_press_acpi_match),
},
.probe = st_press_i2c_probe,
.id_table = st_press_id_table,
};
module_i2c_driver(st_press_driver);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics pressures i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/pressure/st_pressure_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Freescale MPL115A2 pressure/temperature sensor
*
* Copyright (c) 2014 Peter Meerwald <[email protected]>
*
* (7-bit I2C slave address 0x60)
*
* Datasheet: http://www.nxp.com/files/sensors/doc/data_sheet/MPL115A2.pdf
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include "mpl115.h"
static int mpl115_i2c_init(struct device *dev)
{
return 0;
}
static int mpl115_i2c_read(struct device *dev, u8 address)
{
return i2c_smbus_read_word_swapped(to_i2c_client(dev), address);
}
static int mpl115_i2c_write(struct device *dev, u8 address, u8 value)
{
return i2c_smbus_write_byte_data(to_i2c_client(dev), address, value);
}
static const struct mpl115_ops mpl115_i2c_ops = {
.init = mpl115_i2c_init,
.read = mpl115_i2c_read,
.write = mpl115_i2c_write,
};
static int mpl115_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
return -EOPNOTSUPP;
return mpl115_probe(&client->dev, id->name, &mpl115_i2c_ops);
}
static const struct i2c_device_id mpl115_i2c_id[] = {
{ "mpl115", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, mpl115_i2c_id);
static struct i2c_driver mpl115_i2c_driver = {
.driver = {
.name = "mpl115",
.pm = pm_ptr(&mpl115_dev_pm_ops),
},
.probe = mpl115_i2c_probe,
.id_table = mpl115_i2c_id,
};
module_i2c_driver(mpl115_i2c_driver);
MODULE_AUTHOR("Peter Meerwald <[email protected]>");
MODULE_DESCRIPTION("Freescale MPL115A2 pressure/temperature driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_MPL115);
| linux-master | drivers/iio/pressure/mpl115_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/slab.h>
#include <linux/hid-sensor-hub.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include "../common/hid-sensors/hid-sensor-trigger.h"
enum {
CHANNEL_SCAN_INDEX_PRESSURE,
CHANNEL_SCAN_INDEX_TIMESTAMP,
};
struct press_state {
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info press_attr;
struct {
u32 press_data;
u64 timestamp __aligned(8);
} scan;
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
s64 timestamp;
};
static const u32 press_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ATMOSPHERIC_PRESSURE,
HID_USAGE_SENSOR_ATMOSPHERIC_PRESSURE
};
/* Channel definitions */
static const struct iio_chan_spec press_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_PRESSURE,
},
IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP)
};
/* Adjust channel real bits based on report descriptor */
static void press_adjust_channel_bit_mask(struct iio_chan_spec *channels,
int channel, int size)
{
channels[channel].scan_type.sign = 's';
/* Real storage bits will change based on the report desc. */
channels[channel].scan_type.realbits = size * 8;
/* Maximum size of a sample to capture is u32 */
channels[channel].scan_type.storagebits = sizeof(u32) * 8;
}
/* Channel read_raw handler */
static int press_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct press_state *press_state = iio_priv(indio_dev);
int report_id = -1;
u32 address;
int ret_type;
s32 min;
*val = 0;
*val2 = 0;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->scan_index) {
case CHANNEL_SCAN_INDEX_PRESSURE:
report_id = press_state->press_attr.report_id;
min = press_state->press_attr.logical_minimum;
address = HID_USAGE_SENSOR_ATMOSPHERIC_PRESSURE;
break;
default:
report_id = -1;
break;
}
if (report_id >= 0) {
hid_sensor_power_state(&press_state->common_attributes,
true);
*val = sensor_hub_input_attr_get_raw_value(
press_state->common_attributes.hsdev,
HID_USAGE_SENSOR_PRESSURE, address,
report_id,
SENSOR_HUB_SYNC,
min < 0);
hid_sensor_power_state(&press_state->common_attributes,
false);
} else {
*val = 0;
return -EINVAL;
}
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
*val = press_state->scale_pre_decml;
*val2 = press_state->scale_post_decml;
ret_type = press_state->scale_precision;
break;
case IIO_CHAN_INFO_OFFSET:
*val = press_state->value_offset;
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SAMP_FREQ:
ret_type = hid_sensor_read_samp_freq_value(
&press_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret_type = hid_sensor_read_raw_hyst_value(
&press_state->common_attributes, val, val2);
break;
default:
ret_type = -EINVAL;
break;
}
return ret_type;
}
/* Channel write_raw handler */
static int press_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct press_state *press_state = iio_priv(indio_dev);
int ret = 0;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = hid_sensor_write_samp_freq_value(
&press_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret = hid_sensor_write_raw_hyst_value(
&press_state->common_attributes, val, val2);
break;
default:
ret = -EINVAL;
}
return ret;
}
static const struct iio_info press_info = {
.read_raw = &press_read_raw,
.write_raw = &press_write_raw,
};
/* Callback handler to send event after all samples are received and captured */
static int press_proc_event(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct press_state *press_state = iio_priv(indio_dev);
dev_dbg(&indio_dev->dev, "press_proc_event\n");
if (atomic_read(&press_state->common_attributes.data_ready)) {
if (!press_state->timestamp)
press_state->timestamp = iio_get_time_ns(indio_dev);
iio_push_to_buffers_with_timestamp(
indio_dev, &press_state->scan, press_state->timestamp);
}
return 0;
}
/* Capture samples in local storage */
static int press_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
size_t raw_len, char *raw_data,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct press_state *press_state = iio_priv(indio_dev);
int ret = -EINVAL;
switch (usage_id) {
case HID_USAGE_SENSOR_ATMOSPHERIC_PRESSURE:
press_state->scan.press_data = *(u32 *)raw_data;
ret = 0;
break;
case HID_USAGE_SENSOR_TIME_TIMESTAMP:
press_state->timestamp = hid_sensor_convert_timestamp(
&press_state->common_attributes, *(s64 *)raw_data);
break;
default:
break;
}
return ret;
}
/* Parse report which is specific to an usage id*/
static int press_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
struct iio_chan_spec *channels,
unsigned usage_id,
struct press_state *st)
{
int ret;
ret = sensor_hub_input_get_attribute_info(hsdev, HID_INPUT_REPORT,
usage_id,
HID_USAGE_SENSOR_ATMOSPHERIC_PRESSURE,
&st->press_attr);
if (ret < 0)
return ret;
press_adjust_channel_bit_mask(channels, CHANNEL_SCAN_INDEX_PRESSURE,
st->press_attr.size);
dev_dbg(&pdev->dev, "press %x:%x\n", st->press_attr.index,
st->press_attr.report_id);
st->scale_precision = hid_sensor_format_scale(
HID_USAGE_SENSOR_PRESSURE,
&st->press_attr,
&st->scale_pre_decml, &st->scale_post_decml);
return ret;
}
/* Function to initialize the processing for usage id */
static int hid_press_probe(struct platform_device *pdev)
{
int ret = 0;
static const char *name = "press";
struct iio_dev *indio_dev;
struct press_state *press_state;
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
indio_dev = devm_iio_device_alloc(&pdev->dev,
sizeof(struct press_state));
if (!indio_dev)
return -ENOMEM;
platform_set_drvdata(pdev, indio_dev);
press_state = iio_priv(indio_dev);
press_state->common_attributes.hsdev = hsdev;
press_state->common_attributes.pdev = pdev;
ret = hid_sensor_parse_common_attributes(hsdev,
HID_USAGE_SENSOR_PRESSURE,
&press_state->common_attributes,
press_sensitivity_addresses,
ARRAY_SIZE(press_sensitivity_addresses));
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;
}
indio_dev->channels = devm_kmemdup(&pdev->dev, press_channels,
sizeof(press_channels), GFP_KERNEL);
if (!indio_dev->channels) {
dev_err(&pdev->dev, "failed to duplicate channels\n");
return -ENOMEM;
}
ret = press_parse_report(pdev, hsdev,
(struct iio_chan_spec *)indio_dev->channels,
HID_USAGE_SENSOR_PRESSURE, press_state);
if (ret) {
dev_err(&pdev->dev, "failed to setup attributes\n");
return ret;
}
indio_dev->num_channels =
ARRAY_SIZE(press_channels);
indio_dev->info = &press_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
atomic_set(&press_state->common_attributes.data_ready, 0);
ret = hid_sensor_setup_trigger(indio_dev, name,
&press_state->common_attributes);
if (ret) {
dev_err(&pdev->dev, "trigger setup failed\n");
return ret;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&pdev->dev, "device register failed\n");
goto error_remove_trigger;
}
press_state->callbacks.send_event = press_proc_event;
press_state->callbacks.capture_sample = press_capture_sample;
press_state->callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, HID_USAGE_SENSOR_PRESSURE,
&press_state->callbacks);
if (ret < 0) {
dev_err(&pdev->dev, "callback reg failed\n");
goto error_iio_unreg;
}
return ret;
error_iio_unreg:
iio_device_unregister(indio_dev);
error_remove_trigger:
hid_sensor_remove_trigger(indio_dev, &press_state->common_attributes);
return ret;
}
/* Function to deinitialize the processing for usage id */
static int hid_press_remove(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct press_state *press_state = iio_priv(indio_dev);
sensor_hub_remove_callback(hsdev, HID_USAGE_SENSOR_PRESSURE);
iio_device_unregister(indio_dev);
hid_sensor_remove_trigger(indio_dev, &press_state->common_attributes);
return 0;
}
static const struct platform_device_id hid_press_ids[] = {
{
/* Format: HID-SENSOR-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-200031",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, hid_press_ids);
static struct platform_driver hid_press_platform_driver = {
.id_table = hid_press_ids,
.driver = {
.name = KBUILD_MODNAME,
.pm = &hid_sensor_pm_ops,
},
.probe = hid_press_probe,
.remove = hid_press_remove,
};
module_platform_driver(hid_press_platform_driver);
MODULE_DESCRIPTION("HID Sensor Pressure");
MODULE_AUTHOR("Archana Patni <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_HID);
| linux-master | drivers/iio/pressure/hid-sensor-press.c |
// SPDX-License-Identifier: GPL-2.0
/*
* MS5611 pressure and temperature sensor driver (I2C bus)
*
* Copyright (c) Tomasz Duszynski <[email protected]>
*
* 7-bit I2C slave addresses:
*
* 0x77 (CSB pin low)
* 0x76 (CSB pin high)
*
*/
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <asm/unaligned.h>
#include "ms5611.h"
static int ms5611_i2c_reset(struct ms5611_state *st)
{
return i2c_smbus_write_byte(st->client, MS5611_RESET);
}
static int ms5611_i2c_read_prom_word(struct ms5611_state *st, int index,
u16 *word)
{
int ret;
ret = i2c_smbus_read_word_swapped(st->client,
MS5611_READ_PROM_WORD + (index << 1));
if (ret < 0)
return ret;
*word = ret;
return 0;
}
static int ms5611_i2c_read_adc(struct ms5611_state *st, s32 *val)
{
int ret;
u8 buf[3];
ret = i2c_smbus_read_i2c_block_data(st->client, MS5611_READ_ADC,
3, buf);
if (ret < 0)
return ret;
*val = get_unaligned_be24(&buf[0]);
return 0;
}
static int ms5611_i2c_read_adc_temp_and_pressure(struct ms5611_state *st,
s32 *temp, s32 *pressure)
{
int ret;
const struct ms5611_osr *osr = st->temp_osr;
ret = i2c_smbus_write_byte(st->client, osr->cmd);
if (ret < 0)
return ret;
usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL));
ret = ms5611_i2c_read_adc(st, temp);
if (ret < 0)
return ret;
osr = st->pressure_osr;
ret = i2c_smbus_write_byte(st->client, osr->cmd);
if (ret < 0)
return ret;
usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL));
return ms5611_i2c_read_adc(st, pressure);
}
static int ms5611_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct ms5611_state *st;
struct iio_dev *indio_dev;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WRITE_BYTE |
I2C_FUNC_SMBUS_READ_WORD_DATA |
I2C_FUNC_SMBUS_READ_I2C_BLOCK))
return -EOPNOTSUPP;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
st->reset = ms5611_i2c_reset;
st->read_prom_word = ms5611_i2c_read_prom_word;
st->read_adc_temp_and_pressure = ms5611_i2c_read_adc_temp_and_pressure;
st->client = client;
return ms5611_probe(indio_dev, &client->dev, id->name, id->driver_data);
}
static const struct of_device_id ms5611_i2c_matches[] = {
{ .compatible = "meas,ms5611" },
{ .compatible = "meas,ms5607" },
{ }
};
MODULE_DEVICE_TABLE(of, ms5611_i2c_matches);
static const struct i2c_device_id ms5611_id[] = {
{ "ms5611", MS5611 },
{ "ms5607", MS5607 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ms5611_id);
static struct i2c_driver ms5611_driver = {
.driver = {
.name = "ms5611",
.of_match_table = ms5611_i2c_matches,
},
.id_table = ms5611_id,
.probe = ms5611_i2c_probe,
};
module_i2c_driver(ms5611_driver);
MODULE_AUTHOR("Tomasz Duszynski <[email protected]>");
MODULE_DESCRIPTION("MS5611 i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_MS5611);
| linux-master | drivers/iio/pressure/ms5611_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Murata ZPA2326 I2C pressure and temperature sensor driver
*
* Copyright (c) 2016 Parrot S.A.
*
* Author: Gregor Boirie <[email protected]>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include "zpa2326.h"
/*
* read_flag_mask:
* - address bit 7 must be set to request a register read operation
*/
static const struct regmap_config zpa2326_regmap_i2c_config = {
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = zpa2326_isreg_writeable,
.readable_reg = zpa2326_isreg_readable,
.precious_reg = zpa2326_isreg_precious,
.max_register = ZPA2326_TEMP_OUT_H_REG,
.read_flag_mask = BIT(7),
.cache_type = REGCACHE_NONE,
};
static unsigned int zpa2326_i2c_hwid(const struct i2c_client *client)
{
#define ZPA2326_SA0(_addr) (_addr & BIT(0))
#define ZPA2326_DEVICE_ID_SA0_SHIFT (1)
/* Identification register bit 1 mirrors device address bit 0. */
return (ZPA2326_DEVICE_ID |
(ZPA2326_SA0(client->addr) << ZPA2326_DEVICE_ID_SA0_SHIFT));
}
static int zpa2326_probe_i2c(struct i2c_client *client)
{
const struct i2c_device_id *i2c_id = i2c_client_get_device_id(client);
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &zpa2326_regmap_i2c_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "failed to init registers map");
return PTR_ERR(regmap);
}
return zpa2326_probe(&client->dev, i2c_id->name, client->irq,
zpa2326_i2c_hwid(client), regmap);
}
static void zpa2326_remove_i2c(struct i2c_client *client)
{
zpa2326_remove(&client->dev);
}
static const struct i2c_device_id zpa2326_i2c_ids[] = {
{ "zpa2326", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, zpa2326_i2c_ids);
static const struct of_device_id zpa2326_i2c_matches[] = {
{ .compatible = "murata,zpa2326" },
{ }
};
MODULE_DEVICE_TABLE(of, zpa2326_i2c_matches);
static struct i2c_driver zpa2326_i2c_driver = {
.driver = {
.name = "zpa2326-i2c",
.of_match_table = zpa2326_i2c_matches,
.pm = ZPA2326_PM_OPS,
},
.probe = zpa2326_probe_i2c,
.remove = zpa2326_remove_i2c,
.id_table = zpa2326_i2c_ids,
};
module_i2c_driver(zpa2326_i2c_driver);
MODULE_AUTHOR("Gregor Boirie <[email protected]>");
MODULE_DESCRIPTION("I2C driver for Murata ZPA2326 pressure sensor");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ZPA2326);
| linux-master | drivers/iio/pressure/zpa2326_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics pressures driver
*
* Copyright 2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/common/st_sensors.h>
#include "st_pressure.h"
int st_press_trig_set_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
return st_sensors_set_dataready_irq(indio_dev, state);
}
static int st_press_buffer_postenable(struct iio_dev *indio_dev)
{
return st_sensors_set_enable(indio_dev, true);
}
static int st_press_buffer_predisable(struct iio_dev *indio_dev)
{
return st_sensors_set_enable(indio_dev, false);
}
static const struct iio_buffer_setup_ops st_press_buffer_setup_ops = {
.postenable = &st_press_buffer_postenable,
.predisable = &st_press_buffer_predisable,
};
int st_press_allocate_ring(struct iio_dev *indio_dev)
{
return devm_iio_triggered_buffer_setup(indio_dev->dev.parent, indio_dev,
NULL, &st_sensors_trigger_handler, &st_press_buffer_setup_ops);
}
| linux-master | drivers/iio/pressure/st_pressure_buffer.c |
// SPDX-License-Identifier: GPL-2.0
/*
* All Sensors DLH series low voltage digital pressure sensors
*
* Copyright (c) 2019 AVL DiTEST GmbH
* Tomislav Denis <[email protected]>
*
* Datasheet: https://www.allsensors.com/cad/DS-0355_Rev_B.PDF
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <asm/unaligned.h>
/* Commands */
#define DLH_START_SINGLE 0xAA
/* Status bits */
#define DLH_STATUS_OK 0x40
/* DLH data format */
#define DLH_NUM_READ_BYTES 7
#define DLH_NUM_DATA_BYTES 3
#define DLH_NUM_PR_BITS 24
#define DLH_NUM_TEMP_BITS 24
/* DLH timings */
#define DLH_SINGLE_DUT_MS 5
enum dhl_ids {
dlhl60d,
dlhl60g,
};
struct dlh_info {
u8 osdig; /* digital offset factor */
unsigned int fss; /* full scale span (inch H2O) */
};
struct dlh_state {
struct i2c_client *client;
struct dlh_info info;
bool use_interrupt;
struct completion completion;
u8 rx_buf[DLH_NUM_READ_BYTES];
};
static struct dlh_info dlh_info_tbl[] = {
[dlhl60d] = {
.osdig = 2,
.fss = 120,
},
[dlhl60g] = {
.osdig = 10,
.fss = 60,
},
};
static int dlh_cmd_start_single(struct dlh_state *st)
{
int ret;
ret = i2c_smbus_write_byte(st->client, DLH_START_SINGLE);
if (ret)
dev_err(&st->client->dev,
"%s: I2C write byte failed\n", __func__);
return ret;
}
static int dlh_cmd_read_data(struct dlh_state *st)
{
int ret;
ret = i2c_master_recv(st->client, st->rx_buf, DLH_NUM_READ_BYTES);
if (ret < 0) {
dev_err(&st->client->dev,
"%s: I2C read block failed\n", __func__);
return ret;
}
if (st->rx_buf[0] != DLH_STATUS_OK) {
dev_err(&st->client->dev,
"%s: invalid status 0x%02x\n", __func__, st->rx_buf[0]);
return -EBUSY;
}
return 0;
}
static int dlh_start_capture_and_read(struct dlh_state *st)
{
int ret;
if (st->use_interrupt)
reinit_completion(&st->completion);
ret = dlh_cmd_start_single(st);
if (ret)
return ret;
if (st->use_interrupt) {
ret = wait_for_completion_timeout(&st->completion,
msecs_to_jiffies(DLH_SINGLE_DUT_MS));
if (!ret) {
dev_err(&st->client->dev,
"%s: conversion timed out\n", __func__);
return -ETIMEDOUT;
}
} else {
mdelay(DLH_SINGLE_DUT_MS);
}
return dlh_cmd_read_data(st);
}
static int dlh_read_direct(struct dlh_state *st,
unsigned int *pressure, unsigned int *temperature)
{
int ret;
ret = dlh_start_capture_and_read(st);
if (ret)
return ret;
*pressure = get_unaligned_be24(&st->rx_buf[1]);
*temperature = get_unaligned_be24(&st->rx_buf[4]);
return 0;
}
static int dlh_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *channel, int *value,
int *value2, long mask)
{
struct dlh_state *st = iio_priv(indio_dev);
unsigned int pressure, temperature;
int ret;
s64 tmp;
s32 rem;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = dlh_read_direct(st, &pressure, &temperature);
iio_device_release_direct_mode(indio_dev);
if (ret)
return ret;
switch (channel->type) {
case IIO_PRESSURE:
*value = pressure;
return IIO_VAL_INT;
case IIO_TEMP:
*value = temperature;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (channel->type) {
case IIO_PRESSURE:
tmp = div_s64(125LL * st->info.fss * 24909 * 100,
1 << DLH_NUM_PR_BITS);
tmp = div_s64_rem(tmp, 1000000000LL, &rem);
*value = tmp;
*value2 = rem;
return IIO_VAL_INT_PLUS_NANO;
case IIO_TEMP:
*value = 125 * 1000;
*value2 = DLH_NUM_TEMP_BITS;
return IIO_VAL_FRACTIONAL_LOG2;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (channel->type) {
case IIO_PRESSURE:
*value = -125 * st->info.fss * 24909;
*value2 = 100 * st->info.osdig * 100000;
return IIO_VAL_FRACTIONAL;
case IIO_TEMP:
*value = -40 * 1000;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
return -EINVAL;
}
static const struct iio_info dlh_info = {
.read_raw = dlh_read_raw,
};
static const struct iio_chan_spec dlh_channels[] = {
{
.type = IIO_PRESSURE,
.indexed = 1,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type =
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = 0,
.scan_type = {
.sign = 'u',
.realbits = DLH_NUM_PR_BITS,
.storagebits = 32,
.shift = 8,
.endianness = IIO_BE,
},
}, {
.type = IIO_TEMP,
.indexed = 1,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type =
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = 1,
.scan_type = {
.sign = 'u',
.realbits = DLH_NUM_TEMP_BITS,
.storagebits = 32,
.shift = 8,
.endianness = IIO_BE,
},
}
};
static irqreturn_t dlh_trigger_handler(int irq, void *private)
{
struct iio_poll_func *pf = private;
struct iio_dev *indio_dev = pf->indio_dev;
struct dlh_state *st = iio_priv(indio_dev);
int ret;
unsigned int chn, i = 0;
__be32 tmp_buf[2];
ret = dlh_start_capture_and_read(st);
if (ret)
goto out;
for_each_set_bit(chn, indio_dev->active_scan_mask,
indio_dev->masklength) {
memcpy(tmp_buf + i,
&st->rx_buf[1] + chn * DLH_NUM_DATA_BYTES,
DLH_NUM_DATA_BYTES);
i++;
}
iio_push_to_buffers(indio_dev, tmp_buf);
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t dlh_interrupt(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct dlh_state *st = iio_priv(indio_dev);
complete(&st->completion);
return IRQ_HANDLED;
};
static int dlh_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct dlh_state *st;
struct iio_dev *indio_dev;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE)) {
dev_err(&client->dev,
"adapter doesn't support required i2c functionality\n");
return -EOPNOTSUPP;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
if (!indio_dev) {
dev_err(&client->dev, "failed to allocate iio device\n");
return -ENOMEM;
}
i2c_set_clientdata(client, indio_dev);
st = iio_priv(indio_dev);
st->info = dlh_info_tbl[id->driver_data];
st->client = client;
st->use_interrupt = false;
indio_dev->name = id->name;
indio_dev->info = &dlh_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = dlh_channels;
indio_dev->num_channels = ARRAY_SIZE(dlh_channels);
if (client->irq > 0) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
dlh_interrupt, NULL,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
id->name, indio_dev);
if (ret) {
dev_err(&client->dev, "failed to allocate threaded irq");
return ret;
}
st->use_interrupt = true;
init_completion(&st->completion);
}
ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev,
NULL, &dlh_trigger_handler, NULL);
if (ret) {
dev_err(&client->dev, "failed to setup iio buffer\n");
return ret;
}
ret = devm_iio_device_register(&client->dev, indio_dev);
if (ret)
dev_err(&client->dev, "failed to register iio device\n");
return ret;
}
static const struct of_device_id dlh_of_match[] = {
{ .compatible = "asc,dlhl60d" },
{ .compatible = "asc,dlhl60g" },
{}
};
MODULE_DEVICE_TABLE(of, dlh_of_match);
static const struct i2c_device_id dlh_id[] = {
{ "dlhl60d", dlhl60d },
{ "dlhl60g", dlhl60g },
{}
};
MODULE_DEVICE_TABLE(i2c, dlh_id);
static struct i2c_driver dlh_driver = {
.driver = {
.name = "dlhl60d",
.of_match_table = dlh_of_match,
},
.probe = dlh_probe,
.id_table = dlh_id,
};
module_i2c_driver(dlh_driver);
MODULE_AUTHOR("Tomislav Denis <[email protected]>");
MODULE_DESCRIPTION("Driver for All Sensors DLH series pressure sensors");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/dlhl60d.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* mpl3115.c - Support for Freescale MPL3115A2 pressure/temperature sensor
*
* Copyright (c) 2013 Peter Meerwald <[email protected]>
*
* (7-bit I2C slave address 0x60)
*
* TODO: FIFO buffer, altimeter mode, oversampling, continuous mode,
* interrupts, user offset correction, raw mode
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/delay.h>
#define MPL3115_STATUS 0x00
#define MPL3115_OUT_PRESS 0x01 /* MSB first, 20 bit */
#define MPL3115_OUT_TEMP 0x04 /* MSB first, 12 bit */
#define MPL3115_WHO_AM_I 0x0c
#define MPL3115_CTRL_REG1 0x26
#define MPL3115_DEVICE_ID 0xc4
#define MPL3115_STATUS_PRESS_RDY BIT(2)
#define MPL3115_STATUS_TEMP_RDY BIT(1)
#define MPL3115_CTRL_RESET BIT(2) /* software reset */
#define MPL3115_CTRL_OST BIT(1) /* initiate measurement */
#define MPL3115_CTRL_ACTIVE BIT(0) /* continuous measurement */
#define MPL3115_CTRL_OS_258MS (BIT(5) | BIT(4)) /* 64x oversampling */
struct mpl3115_data {
struct i2c_client *client;
struct mutex lock;
u8 ctrl_reg1;
};
static int mpl3115_request(struct mpl3115_data *data)
{
int ret, tries = 15;
/* trigger measurement */
ret = i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1,
data->ctrl_reg1 | MPL3115_CTRL_OST);
if (ret < 0)
return ret;
while (tries-- > 0) {
ret = i2c_smbus_read_byte_data(data->client, MPL3115_CTRL_REG1);
if (ret < 0)
return ret;
/* wait for data ready, i.e. OST cleared */
if (!(ret & MPL3115_CTRL_OST))
break;
msleep(20);
}
if (tries < 0) {
dev_err(&data->client->dev, "data not ready\n");
return -EIO;
}
return 0;
}
static int mpl3115_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mpl3115_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
switch (chan->type) {
case IIO_PRESSURE: { /* in 0.25 pascal / LSB */
__be32 tmp = 0;
mutex_lock(&data->lock);
ret = mpl3115_request(data);
if (ret < 0) {
mutex_unlock(&data->lock);
break;
}
ret = i2c_smbus_read_i2c_block_data(data->client,
MPL3115_OUT_PRESS, 3, (u8 *) &tmp);
mutex_unlock(&data->lock);
if (ret < 0)
break;
*val = be32_to_cpu(tmp) >> chan->scan_type.shift;
ret = IIO_VAL_INT;
break;
}
case IIO_TEMP: { /* in 0.0625 celsius / LSB */
__be16 tmp;
mutex_lock(&data->lock);
ret = mpl3115_request(data);
if (ret < 0) {
mutex_unlock(&data->lock);
break;
}
ret = i2c_smbus_read_i2c_block_data(data->client,
MPL3115_OUT_TEMP, 2, (u8 *) &tmp);
mutex_unlock(&data->lock);
if (ret < 0)
break;
*val = sign_extend32(be16_to_cpu(tmp) >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
ret = IIO_VAL_INT;
break;
}
default:
ret = -EINVAL;
break;
}
iio_device_release_direct_mode(indio_dev);
return ret;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_PRESSURE:
*val = 0;
*val2 = 250; /* want kilopascal */
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = 0;
*val2 = 62500;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
return -EINVAL;
}
static irqreturn_t mpl3115_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct mpl3115_data *data = iio_priv(indio_dev);
/*
* 32-bit channel + 16-bit channel + padding + ts
* Note that it is possible for only one of the first 2
* channels to be enabled. If that happens, the first element
* of the buffer may be either 16 or 32-bits. As such we cannot
* use a simple structure definition to express this data layout.
*/
u8 buffer[16] __aligned(8);
int ret, pos = 0;
mutex_lock(&data->lock);
ret = mpl3115_request(data);
if (ret < 0) {
mutex_unlock(&data->lock);
goto done;
}
memset(buffer, 0, sizeof(buffer));
if (test_bit(0, indio_dev->active_scan_mask)) {
ret = i2c_smbus_read_i2c_block_data(data->client,
MPL3115_OUT_PRESS, 3, &buffer[pos]);
if (ret < 0) {
mutex_unlock(&data->lock);
goto done;
}
pos += 4;
}
if (test_bit(1, indio_dev->active_scan_mask)) {
ret = i2c_smbus_read_i2c_block_data(data->client,
MPL3115_OUT_TEMP, 2, &buffer[pos]);
if (ret < 0) {
mutex_unlock(&data->lock);
goto done;
}
}
mutex_unlock(&data->lock);
iio_push_to_buffers_with_timestamp(indio_dev, buffer,
iio_get_time_ns(indio_dev));
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static const struct iio_chan_spec mpl3115_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
.scan_index = 0,
.scan_type = {
.sign = 'u',
.realbits = 20,
.storagebits = 32,
.shift = 12,
.endianness = IIO_BE,
}
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
.scan_index = 1,
.scan_type = {
.sign = 's',
.realbits = 12,
.storagebits = 16,
.shift = 4,
.endianness = IIO_BE,
}
},
IIO_CHAN_SOFT_TIMESTAMP(2),
};
static const struct iio_info mpl3115_info = {
.read_raw = &mpl3115_read_raw,
};
static int mpl3115_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct mpl3115_data *data;
struct iio_dev *indio_dev;
int ret;
ret = i2c_smbus_read_byte_data(client, MPL3115_WHO_AM_I);
if (ret < 0)
return ret;
if (ret != MPL3115_DEVICE_ID)
return -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
mutex_init(&data->lock);
i2c_set_clientdata(client, indio_dev);
indio_dev->info = &mpl3115_info;
indio_dev->name = id->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mpl3115_channels;
indio_dev->num_channels = ARRAY_SIZE(mpl3115_channels);
/* software reset, I2C transfer is aborted (fails) */
i2c_smbus_write_byte_data(client, MPL3115_CTRL_REG1,
MPL3115_CTRL_RESET);
msleep(50);
data->ctrl_reg1 = MPL3115_CTRL_OS_258MS;
ret = i2c_smbus_write_byte_data(client, MPL3115_CTRL_REG1,
data->ctrl_reg1);
if (ret < 0)
return ret;
ret = iio_triggered_buffer_setup(indio_dev, NULL,
mpl3115_trigger_handler, NULL);
if (ret < 0)
return ret;
ret = iio_device_register(indio_dev);
if (ret < 0)
goto buffer_cleanup;
return 0;
buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
return ret;
}
static int mpl3115_standby(struct mpl3115_data *data)
{
return i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1,
data->ctrl_reg1 & ~MPL3115_CTRL_ACTIVE);
}
static void mpl3115_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
mpl3115_standby(iio_priv(indio_dev));
}
static int mpl3115_suspend(struct device *dev)
{
return mpl3115_standby(iio_priv(i2c_get_clientdata(
to_i2c_client(dev))));
}
static int mpl3115_resume(struct device *dev)
{
struct mpl3115_data *data = iio_priv(i2c_get_clientdata(
to_i2c_client(dev)));
return i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1,
data->ctrl_reg1);
}
static DEFINE_SIMPLE_DEV_PM_OPS(mpl3115_pm_ops, mpl3115_suspend,
mpl3115_resume);
static const struct i2c_device_id mpl3115_id[] = {
{ "mpl3115", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, mpl3115_id);
static const struct of_device_id mpl3115_of_match[] = {
{ .compatible = "fsl,mpl3115" },
{ }
};
MODULE_DEVICE_TABLE(of, mpl3115_of_match);
static struct i2c_driver mpl3115_driver = {
.driver = {
.name = "mpl3115",
.of_match_table = mpl3115_of_match,
.pm = pm_sleep_ptr(&mpl3115_pm_ops),
},
.probe = mpl3115_probe,
.remove = mpl3115_remove,
.id_table = mpl3115_id,
};
module_i2c_driver(mpl3115_driver);
MODULE_AUTHOR("Peter Meerwald <[email protected]>");
MODULE_DESCRIPTION("Freescale MPL3115 pressure/temperature driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/pressure/mpl3115.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2016 - Marcin Malagowski <[email protected]>
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#define ABP060MG_ERROR_MASK 0xC000
#define ABP060MG_RESP_TIME_MS 40
#define ABP060MG_MIN_COUNTS 1638 /* = 0x0666 (10% of u14) */
#define ABP060MG_MAX_COUNTS 14745 /* = 0x3999 (90% of u14) */
#define ABP060MG_NUM_COUNTS (ABP060MG_MAX_COUNTS - ABP060MG_MIN_COUNTS)
enum abp_variant {
/* gage [kPa] */
ABP006KG, ABP010KG, ABP016KG, ABP025KG, ABP040KG, ABP060KG, ABP100KG,
ABP160KG, ABP250KG, ABP400KG, ABP600KG, ABP001GG,
/* differential [kPa] */
ABP006KD, ABP010KD, ABP016KD, ABP025KD, ABP040KD, ABP060KD, ABP100KD,
ABP160KD, ABP250KD, ABP400KD,
/* gage [psi] */
ABP001PG, ABP005PG, ABP015PG, ABP030PG, ABP060PG, ABP100PG, ABP150PG,
/* differential [psi] */
ABP001PD, ABP005PD, ABP015PD, ABP030PD, ABP060PD,
};
struct abp_config {
int min;
int max;
};
static struct abp_config abp_config[] = {
/* mbar & kPa variants */
[ABP006KG] = { .min = 0, .max = 6000 },
[ABP010KG] = { .min = 0, .max = 10000 },
[ABP016KG] = { .min = 0, .max = 16000 },
[ABP025KG] = { .min = 0, .max = 25000 },
[ABP040KG] = { .min = 0, .max = 40000 },
[ABP060KG] = { .min = 0, .max = 60000 },
[ABP100KG] = { .min = 0, .max = 100000 },
[ABP160KG] = { .min = 0, .max = 160000 },
[ABP250KG] = { .min = 0, .max = 250000 },
[ABP400KG] = { .min = 0, .max = 400000 },
[ABP600KG] = { .min = 0, .max = 600000 },
[ABP001GG] = { .min = 0, .max = 1000000 },
[ABP006KD] = { .min = -6000, .max = 6000 },
[ABP010KD] = { .min = -10000, .max = 10000 },
[ABP016KD] = { .min = -16000, .max = 16000 },
[ABP025KD] = { .min = -25000, .max = 25000 },
[ABP040KD] = { .min = -40000, .max = 40000 },
[ABP060KD] = { .min = -60000, .max = 60000 },
[ABP100KD] = { .min = -100000, .max = 100000 },
[ABP160KD] = { .min = -160000, .max = 160000 },
[ABP250KD] = { .min = -250000, .max = 250000 },
[ABP400KD] = { .min = -400000, .max = 400000 },
/* psi variants (1 psi ~ 6895 Pa) */
[ABP001PG] = { .min = 0, .max = 6985 },
[ABP005PG] = { .min = 0, .max = 34474 },
[ABP015PG] = { .min = 0, .max = 103421 },
[ABP030PG] = { .min = 0, .max = 206843 },
[ABP060PG] = { .min = 0, .max = 413686 },
[ABP100PG] = { .min = 0, .max = 689476 },
[ABP150PG] = { .min = 0, .max = 1034214 },
[ABP001PD] = { .min = -6895, .max = 6895 },
[ABP005PD] = { .min = -34474, .max = 34474 },
[ABP015PD] = { .min = -103421, .max = 103421 },
[ABP030PD] = { .min = -206843, .max = 206843 },
[ABP060PD] = { .min = -413686, .max = 413686 },
};
struct abp_state {
struct i2c_client *client;
struct mutex lock;
/*
* bus-dependent MEASURE_REQUEST length.
* If no SMBUS_QUICK support, need to send dummy byte
*/
int mreq_len;
/* model-dependent values (calculated on probe) */
int scale;
int offset;
};
static const struct iio_chan_spec abp060mg_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE),
},
};
static int abp060mg_get_measurement(struct abp_state *state, int *val)
{
struct i2c_client *client = state->client;
__be16 buf[2];
u16 pressure;
int ret;
buf[0] = 0;
ret = i2c_master_send(client, (u8 *)&buf, state->mreq_len);
if (ret < 0)
return ret;
msleep_interruptible(ABP060MG_RESP_TIME_MS);
ret = i2c_master_recv(client, (u8 *)&buf, sizeof(buf));
if (ret < 0)
return ret;
pressure = be16_to_cpu(buf[0]);
if (pressure & ABP060MG_ERROR_MASK)
return -EIO;
if (pressure < ABP060MG_MIN_COUNTS || pressure > ABP060MG_MAX_COUNTS)
return -EIO;
*val = pressure;
return IIO_VAL_INT;
}
static int abp060mg_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct abp_state *state = iio_priv(indio_dev);
int ret;
mutex_lock(&state->lock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = abp060mg_get_measurement(state, val);
break;
case IIO_CHAN_INFO_OFFSET:
*val = state->offset;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
*val = state->scale;
*val2 = ABP060MG_NUM_COUNTS * 1000; /* to kPa */
ret = IIO_VAL_FRACTIONAL;
break;
default:
ret = -EINVAL;
break;
}
mutex_unlock(&state->lock);
return ret;
}
static const struct iio_info abp060mg_info = {
.read_raw = abp060mg_read_raw,
};
static void abp060mg_init_device(struct iio_dev *indio_dev, unsigned long id)
{
struct abp_state *state = iio_priv(indio_dev);
struct abp_config *cfg = &abp_config[id];
state->scale = cfg->max - cfg->min;
state->offset = -ABP060MG_MIN_COUNTS;
if (cfg->min < 0) /* differential */
state->offset -= ABP060MG_NUM_COUNTS >> 1;
}
static int abp060mg_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct iio_dev *indio_dev;
struct abp_state *state;
unsigned long cfg_id = id->driver_data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*state));
if (!indio_dev)
return -ENOMEM;
state = iio_priv(indio_dev);
i2c_set_clientdata(client, state);
state->client = client;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_QUICK))
state->mreq_len = 1;
abp060mg_init_device(indio_dev, cfg_id);
indio_dev->name = dev_name(&client->dev);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &abp060mg_info;
indio_dev->channels = abp060mg_channels;
indio_dev->num_channels = ARRAY_SIZE(abp060mg_channels);
mutex_init(&state->lock);
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id abp060mg_id_table[] = {
/* mbar & kPa variants (abp060m [60 mbar] == abp006k [6 kPa]) */
/* gage: */
{ "abp060mg", ABP006KG }, { "abp006kg", ABP006KG },
{ "abp100mg", ABP010KG }, { "abp010kg", ABP010KG },
{ "abp160mg", ABP016KG }, { "abp016kg", ABP016KG },
{ "abp250mg", ABP025KG }, { "abp025kg", ABP025KG },
{ "abp400mg", ABP040KG }, { "abp040kg", ABP040KG },
{ "abp600mg", ABP060KG }, { "abp060kg", ABP060KG },
{ "abp001bg", ABP100KG }, { "abp100kg", ABP100KG },
{ "abp1_6bg", ABP160KG }, { "abp160kg", ABP160KG },
{ "abp2_5bg", ABP250KG }, { "abp250kg", ABP250KG },
{ "abp004bg", ABP400KG }, { "abp400kg", ABP400KG },
{ "abp006bg", ABP600KG }, { "abp600kg", ABP600KG },
{ "abp010bg", ABP001GG }, { "abp001gg", ABP001GG },
/* differential: */
{ "abp060md", ABP006KD }, { "abp006kd", ABP006KD },
{ "abp100md", ABP010KD }, { "abp010kd", ABP010KD },
{ "abp160md", ABP016KD }, { "abp016kd", ABP016KD },
{ "abp250md", ABP025KD }, { "abp025kd", ABP025KD },
{ "abp400md", ABP040KD }, { "abp040kd", ABP040KD },
{ "abp600md", ABP060KD }, { "abp060kd", ABP060KD },
{ "abp001bd", ABP100KD }, { "abp100kd", ABP100KD },
{ "abp1_6bd", ABP160KD }, { "abp160kd", ABP160KD },
{ "abp2_5bd", ABP250KD }, { "abp250kd", ABP250KD },
{ "abp004bd", ABP400KD }, { "abp400kd", ABP400KD },
/* psi variants */
/* gage: */
{ "abp001pg", ABP001PG },
{ "abp005pg", ABP005PG },
{ "abp015pg", ABP015PG },
{ "abp030pg", ABP030PG },
{ "abp060pg", ABP060PG },
{ "abp100pg", ABP100PG },
{ "abp150pg", ABP150PG },
/* differential: */
{ "abp001pd", ABP001PD },
{ "abp005pd", ABP005PD },
{ "abp015pd", ABP015PD },
{ "abp030pd", ABP030PD },
{ "abp060pd", ABP060PD },
{ /* empty */ },
};
MODULE_DEVICE_TABLE(i2c, abp060mg_id_table);
static struct i2c_driver abp060mg_driver = {
.driver = {
.name = "abp060mg",
},
.probe = abp060mg_probe,
.id_table = abp060mg_id_table,
};
module_i2c_driver(abp060mg_driver);
MODULE_AUTHOR("Marcin Malagowski <[email protected]>");
MODULE_DESCRIPTION("Honeywell ABP pressure sensor driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/pressure/abp060mg.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* hp206c.c - HOPERF HP206C precision barometer and altimeter sensor
*
* Copyright (c) 2016, Intel Corporation.
*
* (7-bit I2C slave address 0x76)
*
* Datasheet:
* http://www.hoperf.com/upload/sensor/HP206C_DataSheet_EN_V2.0.pdf
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/delay.h>
#include <linux/util_macros.h>
#include <linux/acpi.h>
#include <asm/unaligned.h>
/* I2C commands: */
#define HP206C_CMD_SOFT_RST 0x06
#define HP206C_CMD_ADC_CVT 0x40
#define HP206C_CMD_ADC_CVT_OSR_4096 0x00
#define HP206C_CMD_ADC_CVT_OSR_2048 0x04
#define HP206C_CMD_ADC_CVT_OSR_1024 0x08
#define HP206C_CMD_ADC_CVT_OSR_512 0x0c
#define HP206C_CMD_ADC_CVT_OSR_256 0x10
#define HP206C_CMD_ADC_CVT_OSR_128 0x14
#define HP206C_CMD_ADC_CVT_CHNL_PT 0x00
#define HP206C_CMD_ADC_CVT_CHNL_T 0x02
#define HP206C_CMD_READ_P 0x30
#define HP206C_CMD_READ_T 0x32
#define HP206C_CMD_READ_REG 0x80
#define HP206C_CMD_WRITE_REG 0xc0
#define HP206C_REG_INT_EN 0x0b
#define HP206C_REG_INT_CFG 0x0c
#define HP206C_REG_INT_SRC 0x0d
#define HP206C_FLAG_DEV_RDY 0x40
#define HP206C_REG_PARA 0x0f
#define HP206C_FLAG_CMPS_EN 0x80
/* Maximum spin for DEV_RDY */
#define HP206C_MAX_DEV_RDY_WAIT_COUNT 20
#define HP206C_DEV_RDY_WAIT_US 20000
struct hp206c_data {
struct mutex mutex;
struct i2c_client *client;
int temp_osr_index;
int pres_osr_index;
};
struct hp206c_osr_setting {
u8 osr_mask;
unsigned int temp_conv_time_us;
unsigned int pres_conv_time_us;
};
/* Data from Table 5 in datasheet. */
static const struct hp206c_osr_setting hp206c_osr_settings[] = {
{ HP206C_CMD_ADC_CVT_OSR_4096, 65600, 131100 },
{ HP206C_CMD_ADC_CVT_OSR_2048, 32800, 65600 },
{ HP206C_CMD_ADC_CVT_OSR_1024, 16400, 32800 },
{ HP206C_CMD_ADC_CVT_OSR_512, 8200, 16400 },
{ HP206C_CMD_ADC_CVT_OSR_256, 4100, 8200 },
{ HP206C_CMD_ADC_CVT_OSR_128, 2100, 4100 },
};
static const int hp206c_osr_rates[] = { 4096, 2048, 1024, 512, 256, 128 };
static const char hp206c_osr_rates_str[] = "4096 2048 1024 512 256 128";
static inline int hp206c_read_reg(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_byte_data(client, HP206C_CMD_READ_REG | reg);
}
static inline int hp206c_write_reg(struct i2c_client *client, u8 reg, u8 val)
{
return i2c_smbus_write_byte_data(client,
HP206C_CMD_WRITE_REG | reg, val);
}
static int hp206c_read_20bit(struct i2c_client *client, u8 cmd)
{
int ret;
u8 values[3];
ret = i2c_smbus_read_i2c_block_data(client, cmd, sizeof(values), values);
if (ret < 0)
return ret;
if (ret != sizeof(values))
return -EIO;
return get_unaligned_be24(&values[0]) & GENMASK(19, 0);
}
/* Spin for max 160ms until DEV_RDY is 1, or return error. */
static int hp206c_wait_dev_rdy(struct iio_dev *indio_dev)
{
int ret;
int count = 0;
struct hp206c_data *data = iio_priv(indio_dev);
struct i2c_client *client = data->client;
while (++count <= HP206C_MAX_DEV_RDY_WAIT_COUNT) {
ret = hp206c_read_reg(client, HP206C_REG_INT_SRC);
if (ret < 0) {
dev_err(&indio_dev->dev, "Failed READ_REG INT_SRC: %d\n", ret);
return ret;
}
if (ret & HP206C_FLAG_DEV_RDY)
return 0;
usleep_range(HP206C_DEV_RDY_WAIT_US, HP206C_DEV_RDY_WAIT_US * 3 / 2);
}
return -ETIMEDOUT;
}
static int hp206c_set_compensation(struct i2c_client *client, bool enabled)
{
int val;
val = hp206c_read_reg(client, HP206C_REG_PARA);
if (val < 0)
return val;
if (enabled)
val |= HP206C_FLAG_CMPS_EN;
else
val &= ~HP206C_FLAG_CMPS_EN;
return hp206c_write_reg(client, HP206C_REG_PARA, val);
}
/* Do a soft reset */
static int hp206c_soft_reset(struct iio_dev *indio_dev)
{
int ret;
struct hp206c_data *data = iio_priv(indio_dev);
struct i2c_client *client = data->client;
ret = i2c_smbus_write_byte(client, HP206C_CMD_SOFT_RST);
if (ret) {
dev_err(&client->dev, "Failed to reset device: %d\n", ret);
return ret;
}
usleep_range(400, 600);
ret = hp206c_wait_dev_rdy(indio_dev);
if (ret) {
dev_err(&client->dev, "Device not ready after soft reset: %d\n", ret);
return ret;
}
ret = hp206c_set_compensation(client, true);
if (ret)
dev_err(&client->dev, "Failed to enable compensation: %d\n", ret);
return ret;
}
static int hp206c_conv_and_read(struct iio_dev *indio_dev,
u8 conv_cmd, u8 read_cmd,
unsigned int sleep_us)
{
int ret;
struct hp206c_data *data = iio_priv(indio_dev);
struct i2c_client *client = data->client;
ret = hp206c_wait_dev_rdy(indio_dev);
if (ret < 0) {
dev_err(&indio_dev->dev, "Device not ready: %d\n", ret);
return ret;
}
ret = i2c_smbus_write_byte(client, conv_cmd);
if (ret < 0) {
dev_err(&indio_dev->dev, "Failed convert: %d\n", ret);
return ret;
}
usleep_range(sleep_us, sleep_us * 3 / 2);
ret = hp206c_wait_dev_rdy(indio_dev);
if (ret < 0) {
dev_err(&indio_dev->dev, "Device not ready: %d\n", ret);
return ret;
}
ret = hp206c_read_20bit(client, read_cmd);
if (ret < 0)
dev_err(&indio_dev->dev, "Failed read: %d\n", ret);
return ret;
}
static int hp206c_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
int ret;
struct hp206c_data *data = iio_priv(indio_dev);
const struct hp206c_osr_setting *osr_setting;
u8 conv_cmd;
mutex_lock(&data->mutex);
switch (mask) {
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
switch (chan->type) {
case IIO_TEMP:
*val = hp206c_osr_rates[data->temp_osr_index];
ret = IIO_VAL_INT;
break;
case IIO_PRESSURE:
*val = hp206c_osr_rates[data->pres_osr_index];
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
}
break;
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
osr_setting = &hp206c_osr_settings[data->temp_osr_index];
conv_cmd = HP206C_CMD_ADC_CVT |
osr_setting->osr_mask |
HP206C_CMD_ADC_CVT_CHNL_T;
ret = hp206c_conv_and_read(indio_dev,
conv_cmd,
HP206C_CMD_READ_T,
osr_setting->temp_conv_time_us);
if (ret >= 0) {
/* 20 significant bits are provided.
* Extend sign over the rest.
*/
*val = sign_extend32(ret, 19);
ret = IIO_VAL_INT;
}
break;
case IIO_PRESSURE:
osr_setting = &hp206c_osr_settings[data->pres_osr_index];
conv_cmd = HP206C_CMD_ADC_CVT |
osr_setting->osr_mask |
HP206C_CMD_ADC_CVT_CHNL_PT;
ret = hp206c_conv_and_read(indio_dev,
conv_cmd,
HP206C_CMD_READ_P,
osr_setting->pres_conv_time_us);
if (ret >= 0) {
*val = ret;
ret = IIO_VAL_INT;
}
break;
default:
ret = -EINVAL;
}
break;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
*val = 0;
*val2 = 10000;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
case IIO_PRESSURE:
*val = 0;
*val2 = 1000;
ret = IIO_VAL_INT_PLUS_MICRO;
break;
default:
ret = -EINVAL;
}
break;
default:
ret = -EINVAL;
}
mutex_unlock(&data->mutex);
return ret;
}
static int hp206c_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int ret = 0;
struct hp206c_data *data = iio_priv(indio_dev);
if (mask != IIO_CHAN_INFO_OVERSAMPLING_RATIO)
return -EINVAL;
mutex_lock(&data->mutex);
switch (chan->type) {
case IIO_TEMP:
data->temp_osr_index = find_closest_descending(val,
hp206c_osr_rates, ARRAY_SIZE(hp206c_osr_rates));
break;
case IIO_PRESSURE:
data->pres_osr_index = find_closest_descending(val,
hp206c_osr_rates, ARRAY_SIZE(hp206c_osr_rates));
break;
default:
ret = -EINVAL;
}
mutex_unlock(&data->mutex);
return ret;
}
static const struct iio_chan_spec hp206c_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
},
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
}
};
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(hp206c_osr_rates_str);
static struct attribute *hp206c_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group hp206c_attribute_group = {
.attrs = hp206c_attributes,
};
static const struct iio_info hp206c_info = {
.attrs = &hp206c_attribute_group,
.read_raw = hp206c_read_raw,
.write_raw = hp206c_write_raw,
};
static int hp206c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct iio_dev *indio_dev;
struct hp206c_data *data;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE |
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
dev_err(&client->dev, "Adapter does not support "
"all required i2c functionality\n");
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
mutex_init(&data->mutex);
indio_dev->info = &hp206c_info;
indio_dev->name = id->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = hp206c_channels;
indio_dev->num_channels = ARRAY_SIZE(hp206c_channels);
i2c_set_clientdata(client, indio_dev);
/* Do a soft reset on probe */
ret = hp206c_soft_reset(indio_dev);
if (ret) {
dev_err(&client->dev, "Failed to reset on startup: %d\n", ret);
return -ENODEV;
}
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id hp206c_id[] = {
{"hp206c"},
{}
};
MODULE_DEVICE_TABLE(i2c, hp206c_id);
#ifdef CONFIG_ACPI
static const struct acpi_device_id hp206c_acpi_match[] = {
{"HOP206C", 0},
{ },
};
MODULE_DEVICE_TABLE(acpi, hp206c_acpi_match);
#endif
static struct i2c_driver hp206c_driver = {
.probe = hp206c_probe,
.id_table = hp206c_id,
.driver = {
.name = "hp206c",
.acpi_match_table = ACPI_PTR(hp206c_acpi_match),
},
};
module_i2c_driver(hp206c_driver);
MODULE_DESCRIPTION("HOPERF HP206C precision barometer and altimeter sensor");
MODULE_AUTHOR("Leonard Crestez <[email protected]>");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/hp206c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* SPI interface for the BMP280 driver
*
* Inspired by the older BMP085 driver drivers/misc/bmp085-spi.c
*/
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/err.h>
#include <linux/regmap.h>
#include "bmp280.h"
static int bmp280_regmap_spi_write(void *context, const void *data,
size_t count)
{
struct device *dev = context;
struct spi_device *spi = to_spi_device(dev);
u8 buf[2];
memcpy(buf, data, 2);
/*
* The SPI register address (= full register address without bit 7) and
* the write command (bit7 = RW = '0')
*/
buf[0] &= ~0x80;
return spi_write_then_read(spi, buf, 2, NULL, 0);
}
static int bmp280_regmap_spi_read(void *context, const void *reg,
size_t reg_size, void *val, size_t val_size)
{
struct device *dev = context;
struct spi_device *spi = to_spi_device(dev);
return spi_write_then_read(spi, reg, reg_size, val, val_size);
}
static struct regmap_bus bmp280_regmap_bus = {
.write = bmp280_regmap_spi_write,
.read = bmp280_regmap_spi_read,
.reg_format_endian_default = REGMAP_ENDIAN_BIG,
.val_format_endian_default = REGMAP_ENDIAN_BIG,
};
static int bmp280_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
const struct bmp280_chip_info *chip_info;
struct regmap *regmap;
int ret;
spi->bits_per_word = 8;
ret = spi_setup(spi);
if (ret < 0) {
dev_err(&spi->dev, "spi_setup failed!\n");
return ret;
}
chip_info = device_get_match_data(&spi->dev);
if (!chip_info)
chip_info = (const struct bmp280_chip_info *) id->driver_data;
regmap = devm_regmap_init(&spi->dev,
&bmp280_regmap_bus,
&spi->dev,
chip_info->regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "failed to allocate register map\n");
return PTR_ERR(regmap);
}
return bmp280_common_probe(&spi->dev,
regmap,
chip_info,
id->name,
spi->irq);
}
static const struct of_device_id bmp280_of_spi_match[] = {
{ .compatible = "bosch,bmp085", .data = &bmp180_chip_info },
{ .compatible = "bosch,bmp180", .data = &bmp180_chip_info },
{ .compatible = "bosch,bmp181", .data = &bmp180_chip_info },
{ .compatible = "bosch,bmp280", .data = &bmp280_chip_info },
{ .compatible = "bosch,bme280", .data = &bmp280_chip_info },
{ .compatible = "bosch,bmp380", .data = &bmp380_chip_info },
{ .compatible = "bosch,bmp580", .data = &bmp580_chip_info },
{ },
};
MODULE_DEVICE_TABLE(of, bmp280_of_spi_match);
static const struct spi_device_id bmp280_spi_id[] = {
{ "bmp180", (kernel_ulong_t)&bmp180_chip_info },
{ "bmp181", (kernel_ulong_t)&bmp180_chip_info },
{ "bmp280", (kernel_ulong_t)&bmp280_chip_info },
{ "bme280", (kernel_ulong_t)&bmp280_chip_info },
{ "bmp380", (kernel_ulong_t)&bmp380_chip_info },
{ "bmp580", (kernel_ulong_t)&bmp580_chip_info },
{ }
};
MODULE_DEVICE_TABLE(spi, bmp280_spi_id);
static struct spi_driver bmp280_spi_driver = {
.driver = {
.name = "bmp280",
.of_match_table = bmp280_of_spi_match,
.pm = pm_ptr(&bmp280_dev_pm_ops),
},
.id_table = bmp280_spi_id,
.probe = bmp280_spi_probe,
};
module_spi_driver(bmp280_spi_driver);
MODULE_DESCRIPTION("BMP280 SPI bus driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_BMP280);
| linux-master | drivers/iio/pressure/bmp280-spi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* mpl115.c - Support for Freescale MPL115A pressure/temperature sensor
*
* Copyright (c) 2014 Peter Meerwald <[email protected]>
*
* TODO: synchronization with system suspend
*/
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include "mpl115.h"
#define MPL115_PADC 0x00 /* pressure ADC output value, MSB first, 10 bit */
#define MPL115_TADC 0x02 /* temperature ADC output value, MSB first, 10 bit */
#define MPL115_A0 0x04 /* 12 bit integer, 3 bit fraction */
#define MPL115_B1 0x06 /* 2 bit integer, 13 bit fraction */
#define MPL115_B2 0x08 /* 1 bit integer, 14 bit fraction */
#define MPL115_C12 0x0a /* 0 bit integer, 13 bit fraction */
#define MPL115_CONVERT 0x12 /* convert temperature and pressure */
struct mpl115_data {
struct device *dev;
struct mutex lock;
s16 a0;
s16 b1, b2;
s16 c12;
struct gpio_desc *shutdown;
const struct mpl115_ops *ops;
};
static int mpl115_request(struct mpl115_data *data)
{
int ret = data->ops->write(data->dev, MPL115_CONVERT, 0);
if (ret < 0)
return ret;
usleep_range(3000, 4000);
return 0;
}
static int mpl115_comp_pressure(struct mpl115_data *data, int *val, int *val2)
{
int ret;
u16 padc, tadc;
int a1, y1, pcomp;
unsigned kpa;
mutex_lock(&data->lock);
ret = mpl115_request(data);
if (ret < 0)
goto done;
ret = data->ops->read(data->dev, MPL115_PADC);
if (ret < 0)
goto done;
padc = ret >> 6;
ret = data->ops->read(data->dev, MPL115_TADC);
if (ret < 0)
goto done;
tadc = ret >> 6;
/* see Freescale AN3785 */
a1 = data->b1 + ((data->c12 * tadc) >> 11);
y1 = (data->a0 << 10) + a1 * padc;
/* compensated pressure with 4 fractional bits */
pcomp = (y1 + ((data->b2 * (int) tadc) >> 1)) >> 9;
kpa = pcomp * (115 - 50) / 1023 + (50 << 4);
*val = kpa >> 4;
*val2 = (kpa & 15) * (1000000 >> 4);
done:
mutex_unlock(&data->lock);
return ret;
}
static int mpl115_read_temp(struct mpl115_data *data)
{
int ret;
mutex_lock(&data->lock);
ret = mpl115_request(data);
if (ret < 0)
goto done;
ret = data->ops->read(data->dev, MPL115_TADC);
done:
mutex_unlock(&data->lock);
return ret;
}
static int mpl115_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mpl115_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
pm_runtime_get_sync(data->dev);
ret = mpl115_comp_pressure(data, val, val2);
if (ret < 0)
return ret;
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_RAW:
pm_runtime_get_sync(data->dev);
/* temperature -5.35 C / LSB, 472 LSB is 25 C */
ret = mpl115_read_temp(data);
if (ret < 0)
return ret;
pm_runtime_mark_last_busy(data->dev);
pm_runtime_put_autosuspend(data->dev);
*val = ret >> 6;
return IIO_VAL_INT;
case IIO_CHAN_INFO_OFFSET:
*val = -605;
*val2 = 750000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SCALE:
*val = -186;
*val2 = 915888;
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static const struct iio_chan_spec mpl115_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type =
BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE),
},
};
static const struct iio_info mpl115_info = {
.read_raw = &mpl115_read_raw,
};
int mpl115_probe(struct device *dev, const char *name,
const struct mpl115_ops *ops)
{
struct mpl115_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->dev = dev;
data->ops = ops;
mutex_init(&data->lock);
indio_dev->info = &mpl115_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mpl115_channels;
indio_dev->num_channels = ARRAY_SIZE(mpl115_channels);
ret = data->ops->init(data->dev);
if (ret)
return ret;
dev_set_drvdata(dev, indio_dev);
ret = data->ops->read(data->dev, MPL115_A0);
if (ret < 0)
return ret;
data->a0 = ret;
ret = data->ops->read(data->dev, MPL115_B1);
if (ret < 0)
return ret;
data->b1 = ret;
ret = data->ops->read(data->dev, MPL115_B2);
if (ret < 0)
return ret;
data->b2 = ret;
ret = data->ops->read(data->dev, MPL115_C12);
if (ret < 0)
return ret;
data->c12 = ret;
data->shutdown = devm_gpiod_get_optional(dev, "shutdown",
GPIOD_OUT_LOW);
if (IS_ERR(data->shutdown))
return dev_err_probe(dev, PTR_ERR(data->shutdown),
"cannot get shutdown gpio\n");
if (data->shutdown) {
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
/*
* As the device takes 3 ms to come up with a fresh
* reading after power-on and 5 ms to actually power-on,
* do not shut it down unnecessarily. Set autosuspend to
* 2000 ms.
*/
pm_runtime_set_autosuspend_delay(dev, 2000);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
dev_dbg(dev, "low-power mode enabled");
} else
dev_dbg(dev, "low-power mode disabled");
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(mpl115_probe, IIO_MPL115);
static int mpl115_runtime_suspend(struct device *dev)
{
struct mpl115_data *data = iio_priv(dev_get_drvdata(dev));
gpiod_set_value(data->shutdown, 1);
return 0;
}
static int mpl115_runtime_resume(struct device *dev)
{
struct mpl115_data *data = iio_priv(dev_get_drvdata(dev));
gpiod_set_value(data->shutdown, 0);
usleep_range(5000, 6000);
return 0;
}
EXPORT_NS_RUNTIME_DEV_PM_OPS(mpl115_dev_pm_ops, mpl115_runtime_suspend,
mpl115_runtime_resume, NULL, IIO_MPL115);
MODULE_AUTHOR("Peter Meerwald <[email protected]>");
MODULE_DESCRIPTION("Freescale MPL115 pressure/temperature driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/pressure/mpl115.c |
// SPDX-License-Identifier: GPL-2.0
/*
* MS5611 pressure and temperature sensor driver
*
* Copyright (c) Tomasz Duszynski <[email protected]>
*
* Data sheet:
* http://www.meas-spec.com/downloads/MS5611-01BA03.pdf
* http://www.meas-spec.com/downloads/MS5607-02BA03.pdf
*
*/
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/delay.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include "ms5611.h"
#define MS5611_INIT_OSR(_cmd, _conv_usec, _rate) \
{ .cmd = _cmd, .conv_usec = _conv_usec, .rate = _rate }
static const struct ms5611_osr ms5611_avail_pressure_osr[] = {
MS5611_INIT_OSR(0x40, 600, 256),
MS5611_INIT_OSR(0x42, 1170, 512),
MS5611_INIT_OSR(0x44, 2280, 1024),
MS5611_INIT_OSR(0x46, 4540, 2048),
MS5611_INIT_OSR(0x48, 9040, 4096)
};
static const struct ms5611_osr ms5611_avail_temp_osr[] = {
MS5611_INIT_OSR(0x50, 600, 256),
MS5611_INIT_OSR(0x52, 1170, 512),
MS5611_INIT_OSR(0x54, 2280, 1024),
MS5611_INIT_OSR(0x56, 4540, 2048),
MS5611_INIT_OSR(0x58, 9040, 4096)
};
static const char ms5611_show_osr[] = "256 512 1024 2048 4096";
static IIO_CONST_ATTR(oversampling_ratio_available, ms5611_show_osr);
static struct attribute *ms5611_attributes[] = {
&iio_const_attr_oversampling_ratio_available.dev_attr.attr,
NULL,
};
static const struct attribute_group ms5611_attribute_group = {
.attrs = ms5611_attributes,
};
static bool ms5611_prom_is_valid(u16 *prom, size_t len)
{
int i, j;
uint16_t crc = 0, crc_orig = prom[7] & 0x000F;
prom[7] &= 0xFF00;
for (i = 0; i < len * 2; i++) {
if (i % 2 == 1)
crc ^= prom[i >> 1] & 0x00FF;
else
crc ^= prom[i >> 1] >> 8;
for (j = 0; j < 8; j++) {
if (crc & 0x8000)
crc = (crc << 1) ^ 0x3000;
else
crc <<= 1;
}
}
crc = (crc >> 12) & 0x000F;
return crc_orig != 0x0000 && crc == crc_orig;
}
static int ms5611_read_prom(struct iio_dev *indio_dev)
{
int ret, i;
struct ms5611_state *st = iio_priv(indio_dev);
for (i = 0; i < MS5611_PROM_WORDS_NB; i++) {
ret = st->read_prom_word(st, i, &st->prom[i]);
if (ret < 0) {
dev_err(&indio_dev->dev,
"failed to read prom at %d\n", i);
return ret;
}
}
if (!ms5611_prom_is_valid(st->prom, MS5611_PROM_WORDS_NB)) {
dev_err(&indio_dev->dev, "PROM integrity check failed\n");
return -ENODEV;
}
return 0;
}
static int ms5611_read_temp_and_pressure(struct iio_dev *indio_dev,
s32 *temp, s32 *pressure)
{
int ret;
struct ms5611_state *st = iio_priv(indio_dev);
ret = st->read_adc_temp_and_pressure(st, temp, pressure);
if (ret < 0) {
dev_err(&indio_dev->dev,
"failed to read temperature and pressure\n");
return ret;
}
return st->compensate_temp_and_pressure(st, temp, pressure);
}
static int ms5611_temp_and_pressure_compensate(struct ms5611_state *st,
s32 *temp, s32 *pressure)
{
s32 t = *temp, p = *pressure;
s64 off, sens, dt;
dt = t - (st->prom[5] << 8);
off = ((s64)st->prom[2] << 16) + ((st->prom[4] * dt) >> 7);
sens = ((s64)st->prom[1] << 15) + ((st->prom[3] * dt) >> 8);
t = 2000 + ((st->prom[6] * dt) >> 23);
if (t < 2000) {
s64 off2, sens2, t2;
t2 = (dt * dt) >> 31;
off2 = (5 * (t - 2000) * (t - 2000)) >> 1;
sens2 = off2 >> 1;
if (t < -1500) {
s64 tmp = (t + 1500) * (t + 1500);
off2 += 7 * tmp;
sens2 += (11 * tmp) >> 1;
}
t -= t2;
off -= off2;
sens -= sens2;
}
*temp = t;
*pressure = (((p * sens) >> 21) - off) >> 15;
return 0;
}
static int ms5607_temp_and_pressure_compensate(struct ms5611_state *st,
s32 *temp, s32 *pressure)
{
s32 t = *temp, p = *pressure;
s64 off, sens, dt;
dt = t - (st->prom[5] << 8);
off = ((s64)st->prom[2] << 17) + ((st->prom[4] * dt) >> 6);
sens = ((s64)st->prom[1] << 16) + ((st->prom[3] * dt) >> 7);
t = 2000 + ((st->prom[6] * dt) >> 23);
if (t < 2000) {
s64 off2, sens2, t2, tmp;
t2 = (dt * dt) >> 31;
tmp = (t - 2000) * (t - 2000);
off2 = (61 * tmp) >> 4;
sens2 = tmp << 1;
if (t < -1500) {
tmp = (t + 1500) * (t + 1500);
off2 += 15 * tmp;
sens2 += 8 * tmp;
}
t -= t2;
off -= off2;
sens -= sens2;
}
*temp = t;
*pressure = (((p * sens) >> 21) - off) >> 15;
return 0;
}
static int ms5611_reset(struct iio_dev *indio_dev)
{
int ret;
struct ms5611_state *st = iio_priv(indio_dev);
ret = st->reset(st);
if (ret < 0) {
dev_err(&indio_dev->dev, "failed to reset device\n");
return ret;
}
usleep_range(3000, 4000);
return 0;
}
static irqreturn_t ms5611_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct ms5611_state *st = iio_priv(indio_dev);
/* Ensure buffer elements are naturally aligned */
struct {
s32 channels[2];
s64 ts __aligned(8);
} scan;
int ret;
mutex_lock(&st->lock);
ret = ms5611_read_temp_and_pressure(indio_dev, &scan.channels[1],
&scan.channels[0]);
mutex_unlock(&st->lock);
if (ret < 0)
goto err;
iio_push_to_buffers_with_timestamp(indio_dev, &scan,
iio_get_time_ns(indio_dev));
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int ms5611_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret;
s32 temp, pressure;
struct ms5611_state *st = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
mutex_lock(&st->lock);
ret = ms5611_read_temp_and_pressure(indio_dev,
&temp, &pressure);
mutex_unlock(&st->lock);
if (ret < 0)
return ret;
switch (chan->type) {
case IIO_TEMP:
*val = temp * 10;
return IIO_VAL_INT;
case IIO_PRESSURE:
*val = pressure / 1000;
*val2 = (pressure % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
*val = 10;
return IIO_VAL_INT;
case IIO_PRESSURE:
*val = 0;
*val2 = 1000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
if (chan->type != IIO_TEMP && chan->type != IIO_PRESSURE)
break;
mutex_lock(&st->lock);
if (chan->type == IIO_TEMP)
*val = (int)st->temp_osr->rate;
else
*val = (int)st->pressure_osr->rate;
mutex_unlock(&st->lock);
return IIO_VAL_INT;
}
return -EINVAL;
}
static const struct ms5611_osr *ms5611_find_osr(int rate,
const struct ms5611_osr *osr,
size_t count)
{
unsigned int r;
for (r = 0; r < count; r++)
if ((unsigned short)rate == osr[r].rate)
break;
if (r >= count)
return NULL;
return &osr[r];
}
static int ms5611_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct ms5611_state *st = iio_priv(indio_dev);
const struct ms5611_osr *osr = NULL;
int ret;
if (mask != IIO_CHAN_INFO_OVERSAMPLING_RATIO)
return -EINVAL;
if (chan->type == IIO_TEMP)
osr = ms5611_find_osr(val, ms5611_avail_temp_osr,
ARRAY_SIZE(ms5611_avail_temp_osr));
else if (chan->type == IIO_PRESSURE)
osr = ms5611_find_osr(val, ms5611_avail_pressure_osr,
ARRAY_SIZE(ms5611_avail_pressure_osr));
if (!osr)
return -EINVAL;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
if (chan->type == IIO_TEMP)
st->temp_osr = osr;
else
st->pressure_osr = osr;
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return 0;
}
static const unsigned long ms5611_scan_masks[] = {0x3, 0};
static const struct iio_chan_spec ms5611_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 32,
.storagebits = 32,
.endianness = IIO_CPU,
},
},
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
.scan_index = 1,
.scan_type = {
.sign = 's',
.realbits = 32,
.storagebits = 32,
.endianness = IIO_CPU,
},
},
IIO_CHAN_SOFT_TIMESTAMP(2),
};
static const struct iio_info ms5611_info = {
.read_raw = &ms5611_read_raw,
.write_raw = &ms5611_write_raw,
.attrs = &ms5611_attribute_group,
};
static int ms5611_init(struct iio_dev *indio_dev)
{
int ret;
/* Enable attached regulator if any. */
ret = devm_regulator_get_enable(indio_dev->dev.parent, "vdd");
if (ret)
return ret;
ret = ms5611_reset(indio_dev);
if (ret < 0)
return ret;
ret = ms5611_read_prom(indio_dev);
if (ret < 0)
return ret;
return 0;
}
int ms5611_probe(struct iio_dev *indio_dev, struct device *dev,
const char *name, int type)
{
int ret;
struct ms5611_state *st = iio_priv(indio_dev);
mutex_init(&st->lock);
switch (type) {
case MS5611:
st->compensate_temp_and_pressure =
ms5611_temp_and_pressure_compensate;
break;
case MS5607:
st->compensate_temp_and_pressure =
ms5607_temp_and_pressure_compensate;
break;
default:
return -EINVAL;
}
st->temp_osr =
&ms5611_avail_temp_osr[ARRAY_SIZE(ms5611_avail_temp_osr) - 1];
st->pressure_osr =
&ms5611_avail_pressure_osr[ARRAY_SIZE(ms5611_avail_pressure_osr)
- 1];
indio_dev->name = name;
indio_dev->info = &ms5611_info;
indio_dev->channels = ms5611_channels;
indio_dev->num_channels = ARRAY_SIZE(ms5611_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->available_scan_masks = ms5611_scan_masks;
ret = ms5611_init(indio_dev);
if (ret < 0)
return ret;
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
ms5611_trigger_handler, NULL);
if (ret < 0) {
dev_err(dev, "iio triggered buffer setup failed\n");
return ret;
}
ret = devm_iio_device_register(dev, indio_dev);
if (ret < 0) {
dev_err(dev, "unable to register iio device\n");
return ret;
}
return 0;
}
EXPORT_SYMBOL_NS(ms5611_probe, IIO_MS5611);
MODULE_AUTHOR("Tomasz Duszynski <[email protected]>");
MODULE_DESCRIPTION("MS5611 core driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/ms5611_core.c |
// SPDX-License-Identifier: GPL-2.0+
// Copyright IBM Corp 2019
/*
* The DPS310 is a barometric pressure and temperature sensor.
* Currently only reading a single temperature is supported by
* this driver.
*
* https://www.infineon.com/dgdl/?fileId=5546d462576f34750157750826c42242
*
* Temperature calculation:
* c0 * 0.5 + c1 * T_raw / kT °C
*
* TODO:
* - Optionally support the FIFO
*/
#include <linux/i2c.h>
#include <linux/limits.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define DPS310_DEV_NAME "dps310"
#define DPS310_PRS_B0 0x00
#define DPS310_PRS_B1 0x01
#define DPS310_PRS_B2 0x02
#define DPS310_TMP_B0 0x03
#define DPS310_TMP_B1 0x04
#define DPS310_TMP_B2 0x05
#define DPS310_PRS_CFG 0x06
#define DPS310_PRS_RATE_BITS GENMASK(6, 4)
#define DPS310_PRS_PRC_BITS GENMASK(3, 0)
#define DPS310_TMP_CFG 0x07
#define DPS310_TMP_RATE_BITS GENMASK(6, 4)
#define DPS310_TMP_PRC_BITS GENMASK(3, 0)
#define DPS310_TMP_EXT BIT(7)
#define DPS310_MEAS_CFG 0x08
#define DPS310_MEAS_CTRL_BITS GENMASK(2, 0)
#define DPS310_PRS_EN BIT(0)
#define DPS310_TEMP_EN BIT(1)
#define DPS310_BACKGROUND BIT(2)
#define DPS310_PRS_RDY BIT(4)
#define DPS310_TMP_RDY BIT(5)
#define DPS310_SENSOR_RDY BIT(6)
#define DPS310_COEF_RDY BIT(7)
#define DPS310_CFG_REG 0x09
#define DPS310_INT_HL BIT(7)
#define DPS310_TMP_SHIFT_EN BIT(3)
#define DPS310_PRS_SHIFT_EN BIT(4)
#define DPS310_FIFO_EN BIT(5)
#define DPS310_SPI_EN BIT(6)
#define DPS310_RESET 0x0c
#define DPS310_RESET_MAGIC 0x09
#define DPS310_COEF_BASE 0x10
/* Make sure sleep time is <= 20ms for usleep_range */
#define DPS310_POLL_SLEEP_US(t) min(20000, (t) / 8)
/* Silently handle error in rate value here */
#define DPS310_POLL_TIMEOUT_US(rc) ((rc) <= 0 ? 1000000 : 1000000 / (rc))
#define DPS310_PRS_BASE DPS310_PRS_B0
#define DPS310_TMP_BASE DPS310_TMP_B0
/*
* These values (defined in the spec) indicate how to scale the raw register
* values for each level of precision available.
*/
static const int scale_factors[] = {
524288,
1572864,
3670016,
7864320,
253952,
516096,
1040384,
2088960,
};
struct dps310_data {
struct i2c_client *client;
struct regmap *regmap;
struct mutex lock; /* Lock for sequential HW access functions */
s32 c0, c1;
s32 c00, c10, c20, c30, c01, c11, c21;
s32 pressure_raw;
s32 temp_raw;
bool timeout_recovery_failed;
};
static const struct iio_chan_spec dps310_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_PROCESSED),
},
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_PROCESSED),
},
};
/* To be called after checking the COEF_RDY bit in MEAS_CFG */
static int dps310_get_coefs(struct dps310_data *data)
{
int rc;
u8 coef[18];
u32 c0, c1;
u32 c00, c10, c20, c30, c01, c11, c21;
/* Read all sensor calibration coefficients from the COEF registers. */
rc = regmap_bulk_read(data->regmap, DPS310_COEF_BASE, coef,
sizeof(coef));
if (rc < 0)
return rc;
/*
* Calculate temperature calibration coefficients c0 and c1. The
* numbers are 12-bit 2's complement numbers.
*/
c0 = (coef[0] << 4) | (coef[1] >> 4);
data->c0 = sign_extend32(c0, 11);
c1 = ((coef[1] & GENMASK(3, 0)) << 8) | coef[2];
data->c1 = sign_extend32(c1, 11);
/*
* Calculate pressure calibration coefficients. c00 and c10 are 20 bit
* 2's complement numbers, while the rest are 16 bit 2's complement
* numbers.
*/
c00 = (coef[3] << 12) | (coef[4] << 4) | (coef[5] >> 4);
data->c00 = sign_extend32(c00, 19);
c10 = ((coef[5] & GENMASK(3, 0)) << 16) | (coef[6] << 8) | coef[7];
data->c10 = sign_extend32(c10, 19);
c01 = (coef[8] << 8) | coef[9];
data->c01 = sign_extend32(c01, 15);
c11 = (coef[10] << 8) | coef[11];
data->c11 = sign_extend32(c11, 15);
c20 = (coef[12] << 8) | coef[13];
data->c20 = sign_extend32(c20, 15);
c21 = (coef[14] << 8) | coef[15];
data->c21 = sign_extend32(c21, 15);
c30 = (coef[16] << 8) | coef[17];
data->c30 = sign_extend32(c30, 15);
return 0;
}
/*
* Some versions of the chip will read temperatures in the ~60C range when
* it's actually ~20C. This is the manufacturer recommended workaround
* to correct the issue. The registers used below are undocumented.
*/
static int dps310_temp_workaround(struct dps310_data *data)
{
int rc;
int reg;
rc = regmap_read(data->regmap, 0x32, ®);
if (rc)
return rc;
/*
* If bit 1 is set then the device is okay, and the workaround does not
* need to be applied
*/
if (reg & BIT(1))
return 0;
rc = regmap_write(data->regmap, 0x0e, 0xA5);
if (rc)
return rc;
rc = regmap_write(data->regmap, 0x0f, 0x96);
if (rc)
return rc;
rc = regmap_write(data->regmap, 0x62, 0x02);
if (rc)
return rc;
rc = regmap_write(data->regmap, 0x0e, 0x00);
if (rc)
return rc;
return regmap_write(data->regmap, 0x0f, 0x00);
}
static int dps310_startup(struct dps310_data *data)
{
int rc;
int ready;
/*
* Set up pressure sensor in single sample, one measurement per second
* mode
*/
rc = regmap_write(data->regmap, DPS310_PRS_CFG, 0);
if (rc)
return rc;
/*
* Set up external (MEMS) temperature sensor in single sample, one
* measurement per second mode
*/
rc = regmap_write(data->regmap, DPS310_TMP_CFG, DPS310_TMP_EXT);
if (rc)
return rc;
/* Temp and pressure shifts are disabled when PRC <= 8 */
rc = regmap_write_bits(data->regmap, DPS310_CFG_REG,
DPS310_PRS_SHIFT_EN | DPS310_TMP_SHIFT_EN, 0);
if (rc)
return rc;
/* MEAS_CFG doesn't update correctly unless first written with 0 */
rc = regmap_write_bits(data->regmap, DPS310_MEAS_CFG,
DPS310_MEAS_CTRL_BITS, 0);
if (rc)
return rc;
/* Turn on temperature and pressure measurement in the background */
rc = regmap_write_bits(data->regmap, DPS310_MEAS_CFG,
DPS310_MEAS_CTRL_BITS, DPS310_PRS_EN |
DPS310_TEMP_EN | DPS310_BACKGROUND);
if (rc)
return rc;
/*
* Calibration coefficients required for reporting temperature.
* They are available 40ms after the device has started
*/
rc = regmap_read_poll_timeout(data->regmap, DPS310_MEAS_CFG, ready,
ready & DPS310_COEF_RDY, 10000, 40000);
if (rc)
return rc;
rc = dps310_get_coefs(data);
if (rc)
return rc;
return dps310_temp_workaround(data);
}
static int dps310_get_pres_precision(struct dps310_data *data)
{
int rc;
int val;
rc = regmap_read(data->regmap, DPS310_PRS_CFG, &val);
if (rc < 0)
return rc;
return BIT(val & GENMASK(2, 0));
}
static int dps310_get_temp_precision(struct dps310_data *data)
{
int rc;
int val;
rc = regmap_read(data->regmap, DPS310_TMP_CFG, &val);
if (rc < 0)
return rc;
/*
* Scale factor is bottom 4 bits of the register, but 1111 is
* reserved so just grab bottom three
*/
return BIT(val & GENMASK(2, 0));
}
/* Called with lock held */
static int dps310_set_pres_precision(struct dps310_data *data, int val)
{
int rc;
u8 shift_en;
if (val < 0 || val > 128)
return -EINVAL;
shift_en = val >= 16 ? DPS310_PRS_SHIFT_EN : 0;
rc = regmap_write_bits(data->regmap, DPS310_CFG_REG,
DPS310_PRS_SHIFT_EN, shift_en);
if (rc)
return rc;
return regmap_update_bits(data->regmap, DPS310_PRS_CFG,
DPS310_PRS_PRC_BITS, ilog2(val));
}
/* Called with lock held */
static int dps310_set_temp_precision(struct dps310_data *data, int val)
{
int rc;
u8 shift_en;
if (val < 0 || val > 128)
return -EINVAL;
shift_en = val >= 16 ? DPS310_TMP_SHIFT_EN : 0;
rc = regmap_write_bits(data->regmap, DPS310_CFG_REG,
DPS310_TMP_SHIFT_EN, shift_en);
if (rc)
return rc;
return regmap_update_bits(data->regmap, DPS310_TMP_CFG,
DPS310_TMP_PRC_BITS, ilog2(val));
}
/* Called with lock held */
static int dps310_set_pres_samp_freq(struct dps310_data *data, int freq)
{
u8 val;
if (freq < 0 || freq > 128)
return -EINVAL;
val = ilog2(freq) << 4;
return regmap_update_bits(data->regmap, DPS310_PRS_CFG,
DPS310_PRS_RATE_BITS, val);
}
/* Called with lock held */
static int dps310_set_temp_samp_freq(struct dps310_data *data, int freq)
{
u8 val;
if (freq < 0 || freq > 128)
return -EINVAL;
val = ilog2(freq) << 4;
return regmap_update_bits(data->regmap, DPS310_TMP_CFG,
DPS310_TMP_RATE_BITS, val);
}
static int dps310_get_pres_samp_freq(struct dps310_data *data)
{
int rc;
int val;
rc = regmap_read(data->regmap, DPS310_PRS_CFG, &val);
if (rc < 0)
return rc;
return BIT((val & DPS310_PRS_RATE_BITS) >> 4);
}
static int dps310_get_temp_samp_freq(struct dps310_data *data)
{
int rc;
int val;
rc = regmap_read(data->regmap, DPS310_TMP_CFG, &val);
if (rc < 0)
return rc;
return BIT((val & DPS310_TMP_RATE_BITS) >> 4);
}
static int dps310_get_pres_k(struct dps310_data *data)
{
int rc = dps310_get_pres_precision(data);
if (rc < 0)
return rc;
return scale_factors[ilog2(rc)];
}
static int dps310_get_temp_k(struct dps310_data *data)
{
int rc = dps310_get_temp_precision(data);
if (rc < 0)
return rc;
return scale_factors[ilog2(rc)];
}
static int dps310_reset_wait(struct dps310_data *data)
{
int rc;
rc = regmap_write(data->regmap, DPS310_RESET, DPS310_RESET_MAGIC);
if (rc)
return rc;
/* Wait for device chip access: 2.5ms in specification */
usleep_range(2500, 12000);
return 0;
}
static int dps310_reset_reinit(struct dps310_data *data)
{
int rc;
rc = dps310_reset_wait(data);
if (rc)
return rc;
return dps310_startup(data);
}
static int dps310_ready_status(struct dps310_data *data, int ready_bit, int timeout)
{
int sleep = DPS310_POLL_SLEEP_US(timeout);
int ready;
return regmap_read_poll_timeout(data->regmap, DPS310_MEAS_CFG, ready, ready & ready_bit,
sleep, timeout);
}
static int dps310_ready(struct dps310_data *data, int ready_bit, int timeout)
{
int rc;
rc = dps310_ready_status(data, ready_bit, timeout);
if (rc) {
if (rc == -ETIMEDOUT && !data->timeout_recovery_failed) {
/* Reset and reinitialize the chip. */
if (dps310_reset_reinit(data)) {
data->timeout_recovery_failed = true;
} else {
/* Try again to get sensor ready status. */
if (dps310_ready_status(data, ready_bit, timeout))
data->timeout_recovery_failed = true;
else
return 0;
}
}
return rc;
}
data->timeout_recovery_failed = false;
return 0;
}
static int dps310_read_pres_raw(struct dps310_data *data)
{
int rc;
int rate;
int timeout;
s32 raw;
u8 val[3];
if (mutex_lock_interruptible(&data->lock))
return -EINTR;
rate = dps310_get_pres_samp_freq(data);
timeout = DPS310_POLL_TIMEOUT_US(rate);
/* Poll for sensor readiness; base the timeout upon the sample rate. */
rc = dps310_ready(data, DPS310_PRS_RDY, timeout);
if (rc)
goto done;
rc = regmap_bulk_read(data->regmap, DPS310_PRS_BASE, val, sizeof(val));
if (rc < 0)
goto done;
raw = (val[0] << 16) | (val[1] << 8) | val[2];
data->pressure_raw = sign_extend32(raw, 23);
done:
mutex_unlock(&data->lock);
return rc;
}
/* Called with lock held */
static int dps310_read_temp_ready(struct dps310_data *data)
{
int rc;
u8 val[3];
s32 raw;
rc = regmap_bulk_read(data->regmap, DPS310_TMP_BASE, val, sizeof(val));
if (rc < 0)
return rc;
raw = (val[0] << 16) | (val[1] << 8) | val[2];
data->temp_raw = sign_extend32(raw, 23);
return 0;
}
static int dps310_read_temp_raw(struct dps310_data *data)
{
int rc;
int rate;
int timeout;
if (mutex_lock_interruptible(&data->lock))
return -EINTR;
rate = dps310_get_temp_samp_freq(data);
timeout = DPS310_POLL_TIMEOUT_US(rate);
/* Poll for sensor readiness; base the timeout upon the sample rate. */
rc = dps310_ready(data, DPS310_TMP_RDY, timeout);
if (rc)
goto done;
rc = dps310_read_temp_ready(data);
done:
mutex_unlock(&data->lock);
return rc;
}
static bool dps310_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case DPS310_PRS_CFG:
case DPS310_TMP_CFG:
case DPS310_MEAS_CFG:
case DPS310_CFG_REG:
case DPS310_RESET:
/* No documentation available on the registers below */
case 0x0e:
case 0x0f:
case 0x62:
return true;
default:
return false;
}
}
static bool dps310_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case DPS310_PRS_B0:
case DPS310_PRS_B1:
case DPS310_PRS_B2:
case DPS310_TMP_B0:
case DPS310_TMP_B1:
case DPS310_TMP_B2:
case DPS310_MEAS_CFG:
case 0x32: /* No documentation available on this register */
return true;
default:
return false;
}
}
static int dps310_write_raw(struct iio_dev *iio,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
int rc;
struct dps310_data *data = iio_priv(iio);
if (mutex_lock_interruptible(&data->lock))
return -EINTR;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
switch (chan->type) {
case IIO_PRESSURE:
rc = dps310_set_pres_samp_freq(data, val);
break;
case IIO_TEMP:
rc = dps310_set_temp_samp_freq(data, val);
break;
default:
rc = -EINVAL;
break;
}
break;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
switch (chan->type) {
case IIO_PRESSURE:
rc = dps310_set_pres_precision(data, val);
break;
case IIO_TEMP:
rc = dps310_set_temp_precision(data, val);
break;
default:
rc = -EINVAL;
break;
}
break;
default:
rc = -EINVAL;
break;
}
mutex_unlock(&data->lock);
return rc;
}
static int dps310_calculate_pressure(struct dps310_data *data)
{
int i;
int rc;
int t_ready;
int kpi = dps310_get_pres_k(data);
int kti = dps310_get_temp_k(data);
s64 rem = 0ULL;
s64 pressure = 0ULL;
s64 p;
s64 t;
s64 denoms[7];
s64 nums[7];
s64 rems[7];
s64 kp;
s64 kt;
if (kpi < 0)
return kpi;
if (kti < 0)
return kti;
kp = (s64)kpi;
kt = (s64)kti;
/* Refresh temp if it's ready, otherwise just use the latest value */
if (mutex_trylock(&data->lock)) {
rc = regmap_read(data->regmap, DPS310_MEAS_CFG, &t_ready);
if (rc >= 0 && t_ready & DPS310_TMP_RDY)
dps310_read_temp_ready(data);
mutex_unlock(&data->lock);
}
p = (s64)data->pressure_raw;
t = (s64)data->temp_raw;
/* Section 4.9.1 of the DPS310 spec; algebra'd to avoid underflow */
nums[0] = (s64)data->c00;
denoms[0] = 1LL;
nums[1] = p * (s64)data->c10;
denoms[1] = kp;
nums[2] = p * p * (s64)data->c20;
denoms[2] = kp * kp;
nums[3] = p * p * p * (s64)data->c30;
denoms[3] = kp * kp * kp;
nums[4] = t * (s64)data->c01;
denoms[4] = kt;
nums[5] = t * p * (s64)data->c11;
denoms[5] = kp * kt;
nums[6] = t * p * p * (s64)data->c21;
denoms[6] = kp * kp * kt;
/* Kernel lacks a div64_s64_rem function; denoms are all positive */
for (i = 0; i < 7; ++i) {
u64 irem;
if (nums[i] < 0LL) {
pressure -= div64_u64_rem(-nums[i], denoms[i], &irem);
rems[i] = -irem;
} else {
pressure += div64_u64_rem(nums[i], denoms[i], &irem);
rems[i] = (s64)irem;
}
}
/* Increase precision and calculate the remainder sum */
for (i = 0; i < 7; ++i)
rem += div64_s64((s64)rems[i] * 1000000000LL, denoms[i]);
pressure += div_s64(rem, 1000000000LL);
if (pressure < 0LL)
return -ERANGE;
return (int)min_t(s64, pressure, INT_MAX);
}
static int dps310_read_pressure(struct dps310_data *data, int *val, int *val2,
long mask)
{
int rc;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
rc = dps310_get_pres_samp_freq(data);
if (rc < 0)
return rc;
*val = rc;
return IIO_VAL_INT;
case IIO_CHAN_INFO_PROCESSED:
rc = dps310_read_pres_raw(data);
if (rc)
return rc;
rc = dps310_calculate_pressure(data);
if (rc < 0)
return rc;
*val = rc;
*val2 = 1000; /* Convert Pa to KPa per IIO ABI */
return IIO_VAL_FRACTIONAL;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
rc = dps310_get_pres_precision(data);
if (rc < 0)
return rc;
*val = rc;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int dps310_calculate_temp(struct dps310_data *data)
{
s64 c0;
s64 t;
int kt = dps310_get_temp_k(data);
if (kt < 0)
return kt;
/* Obtain inverse-scaled offset */
c0 = div_s64((s64)kt * (s64)data->c0, 2);
/* Add the offset to the unscaled temperature */
t = c0 + ((s64)data->temp_raw * (s64)data->c1);
/* Convert to milliCelsius and scale the temperature */
return (int)div_s64(t * 1000LL, kt);
}
static int dps310_read_temp(struct dps310_data *data, int *val, int *val2,
long mask)
{
int rc;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
rc = dps310_get_temp_samp_freq(data);
if (rc < 0)
return rc;
*val = rc;
return IIO_VAL_INT;
case IIO_CHAN_INFO_PROCESSED:
rc = dps310_read_temp_raw(data);
if (rc)
return rc;
rc = dps310_calculate_temp(data);
if (rc < 0)
return rc;
*val = rc;
return IIO_VAL_INT;
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
rc = dps310_get_temp_precision(data);
if (rc < 0)
return rc;
*val = rc;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int dps310_read_raw(struct iio_dev *iio,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct dps310_data *data = iio_priv(iio);
switch (chan->type) {
case IIO_PRESSURE:
return dps310_read_pressure(data, val, val2, mask);
case IIO_TEMP:
return dps310_read_temp(data, val, val2, mask);
default:
return -EINVAL;
}
}
static void dps310_reset(void *action_data)
{
struct dps310_data *data = action_data;
dps310_reset_wait(data);
}
static const struct regmap_config dps310_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = dps310_is_writeable_reg,
.volatile_reg = dps310_is_volatile_reg,
.cache_type = REGCACHE_RBTREE,
.max_register = 0x62, /* No documentation available on this register */
};
static const struct iio_info dps310_info = {
.read_raw = dps310_read_raw,
.write_raw = dps310_write_raw,
};
static int dps310_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct dps310_data *data;
struct iio_dev *iio;
int rc;
iio = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!iio)
return -ENOMEM;
data = iio_priv(iio);
data->client = client;
mutex_init(&data->lock);
iio->name = id->name;
iio->channels = dps310_channels;
iio->num_channels = ARRAY_SIZE(dps310_channels);
iio->info = &dps310_info;
iio->modes = INDIO_DIRECT_MODE;
data->regmap = devm_regmap_init_i2c(client, &dps310_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
/* Register to run the device reset when the device is removed */
rc = devm_add_action_or_reset(&client->dev, dps310_reset, data);
if (rc)
return rc;
rc = dps310_startup(data);
if (rc)
return rc;
rc = devm_iio_device_register(&client->dev, iio);
if (rc)
return rc;
i2c_set_clientdata(client, iio);
return 0;
}
static const struct i2c_device_id dps310_id[] = {
{ DPS310_DEV_NAME, 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, dps310_id);
static const struct acpi_device_id dps310_acpi_match[] = {
{ "IFX3100" },
{}
};
MODULE_DEVICE_TABLE(acpi, dps310_acpi_match);
static struct i2c_driver dps310_driver = {
.driver = {
.name = DPS310_DEV_NAME,
.acpi_match_table = dps310_acpi_match,
},
.probe = dps310_probe,
.id_table = dps310_id,
};
module_i2c_driver(dps310_driver);
MODULE_AUTHOR("Joel Stanley <[email protected]>");
MODULE_DESCRIPTION("Infineon DPS310 pressure and temperature sensor");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/dps310.c |
// SPDX-License-Identifier: GPL-2.0
/*
* cros_ec_baro - Driver for barometer sensor behind CrosEC.
*
* Copyright (C) 2017 Google, Inc
*/
#include <linux/device.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/cros_ec_sensors_core.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_data/cros_ec_commands.h>
#include <linux/platform_data/cros_ec_proto.h>
#include <linux/platform_device.h>
/*
* One channel for pressure, the other for timestamp.
*/
#define CROS_EC_BARO_MAX_CHANNELS (1 + 1)
/* State data for ec_sensors iio driver. */
struct cros_ec_baro_state {
/* Shared by all sensors */
struct cros_ec_sensors_core_state core;
struct iio_chan_spec channels[CROS_EC_BARO_MAX_CHANNELS];
};
static int cros_ec_baro_read(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct cros_ec_baro_state *st = iio_priv(indio_dev);
u16 data = 0;
int ret;
int idx = chan->scan_index;
mutex_lock(&st->core.cmd_lock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = cros_ec_sensors_read_cmd(indio_dev, 1 << idx,
(s16 *)&data);
if (ret)
break;
*val = data;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_RANGE;
st->core.param.sensor_range.data = EC_MOTION_SENSE_NO_VALUE;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
if (ret)
break;
*val = st->core.resp->sensor_range.ret;
/* scale * in_pressure_raw --> kPa */
*val2 = 10 << CROS_EC_SENSOR_BITS;
ret = IIO_VAL_FRACTIONAL;
break;
default:
ret = cros_ec_sensors_core_read(&st->core, chan, val, val2,
mask);
break;
}
mutex_unlock(&st->core.cmd_lock);
return ret;
}
static int cros_ec_baro_write(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct cros_ec_baro_state *st = iio_priv(indio_dev);
int ret = 0;
mutex_lock(&st->core.cmd_lock);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_RANGE;
st->core.param.sensor_range.data = val;
/* Always roundup, so caller gets at least what it asks for. */
st->core.param.sensor_range.roundup = 1;
ret = cros_ec_motion_send_host_cmd(&st->core, 0);
if (ret == 0) {
st->core.range_updated = true;
st->core.curr_range = val;
}
break;
default:
ret = cros_ec_sensors_core_write(&st->core, chan, val, val2,
mask);
break;
}
mutex_unlock(&st->core.cmd_lock);
return ret;
}
static const struct iio_info cros_ec_baro_info = {
.read_raw = &cros_ec_baro_read,
.write_raw = &cros_ec_baro_write,
.read_avail = &cros_ec_sensors_core_read_avail,
};
static int cros_ec_baro_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct cros_ec_dev *ec_dev = dev_get_drvdata(dev->parent);
struct iio_dev *indio_dev;
struct cros_ec_baro_state *state;
struct iio_chan_spec *channel;
int ret;
if (!ec_dev || !ec_dev->ec_dev) {
dev_warn(dev, "No CROS EC device found.\n");
return -EINVAL;
}
indio_dev = devm_iio_device_alloc(dev, sizeof(*state));
if (!indio_dev)
return -ENOMEM;
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
cros_ec_sensors_capture);
if (ret)
return ret;
indio_dev->info = &cros_ec_baro_info;
state = iio_priv(indio_dev);
channel = state->channels;
/* Common part */
channel->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
channel->info_mask_shared_by_all =
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ);
channel->info_mask_shared_by_all_available =
BIT(IIO_CHAN_INFO_SAMP_FREQ);
channel->scan_type.realbits = CROS_EC_SENSOR_BITS;
channel->scan_type.storagebits = CROS_EC_SENSOR_BITS;
channel->scan_type.shift = 0;
channel->scan_index = 0;
channel->ext_info = cros_ec_sensors_ext_info;
channel->scan_type.sign = 'u';
/* Sensor specific */
switch (state->core.type) {
case MOTIONSENSE_TYPE_BARO:
channel->type = IIO_PRESSURE;
break;
default:
dev_warn(dev, "Unknown motion sensor\n");
return -EINVAL;
}
/* Timestamp */
channel++;
channel->type = IIO_TIMESTAMP;
channel->channel = -1;
channel->scan_index = 1;
channel->scan_type.sign = 's';
channel->scan_type.realbits = 64;
channel->scan_type.storagebits = 64;
indio_dev->channels = state->channels;
indio_dev->num_channels = CROS_EC_BARO_MAX_CHANNELS;
state->core.read_ec_sensors_data = cros_ec_sensors_read_cmd;
return cros_ec_sensors_core_register(dev, indio_dev,
cros_ec_sensors_push_data);
}
static const struct platform_device_id cros_ec_baro_ids[] = {
{
.name = "cros-ec-baro",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, cros_ec_baro_ids);
static struct platform_driver cros_ec_baro_platform_driver = {
.driver = {
.name = "cros-ec-baro",
.pm = &cros_ec_sensors_pm_ops,
},
.probe = cros_ec_baro_probe,
.id_table = cros_ec_baro_ids,
};
module_platform_driver(cros_ec_baro_platform_driver);
MODULE_DESCRIPTION("ChromeOS EC barometer sensor driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/cros_ec_baro.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* MPRLS0025PA - Honeywell MicroPressure pressure sensor series driver
*
* Copyright (c) Andreas Klinger <[email protected]>
*
* Data sheet:
* https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/
* products/sensors/pressure-sensors/board-mount-pressure-sensors/
* micropressure-mpr-series/documents/
* sps-siot-mpr-series-datasheet-32332628-ciid-172626.pdf
*
* 7-bit I2C default slave address: 0x18
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/math64.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/units.h>
#include <linux/gpio/consumer.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/regulator/consumer.h>
#include <asm/unaligned.h>
/* bits in i2c status byte */
#define MPR_I2C_POWER BIT(6) /* device is powered */
#define MPR_I2C_BUSY BIT(5) /* device is busy */
#define MPR_I2C_MEMORY BIT(2) /* integrity test passed */
#define MPR_I2C_MATH BIT(0) /* internal math saturation */
/*
* support _RAW sysfs interface:
*
* Calculation formula from the datasheet:
* pressure = (press_cnt - outputmin) * scale + pmin
* with:
* * pressure - measured pressure in Pascal
* * press_cnt - raw value read from sensor
* * pmin - minimum pressure range value of sensor (data->pmin)
* * pmax - maximum pressure range value of sensor (data->pmax)
* * outputmin - minimum numerical range raw value delivered by sensor
* (mpr_func_spec.output_min)
* * outputmax - maximum numerical range raw value delivered by sensor
* (mpr_func_spec.output_max)
* * scale - (pmax - pmin) / (outputmax - outputmin)
*
* formula of the userspace:
* pressure = (raw + offset) * scale
*
* Values given to the userspace in sysfs interface:
* * raw - press_cnt
* * offset - (-1 * outputmin) - pmin / scale
* note: With all sensors from the datasheet pmin = 0
* which reduces the offset to (-1 * outputmin)
*/
/*
* transfer function A: 10% to 90% of 2^24
* transfer function B: 2.5% to 22.5% of 2^24
* transfer function C: 20% to 80% of 2^24
*/
enum mpr_func_id {
MPR_FUNCTION_A,
MPR_FUNCTION_B,
MPR_FUNCTION_C,
};
struct mpr_func_spec {
u32 output_min;
u32 output_max;
};
static const struct mpr_func_spec mpr_func_spec[] = {
[MPR_FUNCTION_A] = {.output_min = 1677722, .output_max = 15099494},
[MPR_FUNCTION_B] = {.output_min = 419430, .output_max = 3774874},
[MPR_FUNCTION_C] = {.output_min = 3355443, .output_max = 13421773},
};
struct mpr_chan {
s32 pres; /* pressure value */
s64 ts; /* timestamp */
};
struct mpr_data {
struct i2c_client *client;
struct mutex lock; /*
* access to device during read
*/
u32 pmin; /* minimal pressure in pascal */
u32 pmax; /* maximal pressure in pascal */
enum mpr_func_id function; /* transfer function */
u32 outmin; /*
* minimal numerical range raw
* value from sensor
*/
u32 outmax; /*
* maximal numerical range raw
* value from sensor
*/
int scale; /* int part of scale */
int scale2; /* nano part of scale */
int offset; /* int part of offset */
int offset2; /* nano part of offset */
struct gpio_desc *gpiod_reset; /* reset */
int irq; /*
* end of conversion irq;
* used to distinguish between
* irq mode and reading in a
* loop until data is ready
*/
struct completion completion; /* handshake from irq to read */
struct mpr_chan chan; /*
* channel values for buffered
* mode
*/
};
static const struct iio_chan_spec mpr_channels[] = {
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 32,
.storagebits = 32,
.endianness = IIO_CPU,
},
},
IIO_CHAN_SOFT_TIMESTAMP(1),
};
static void mpr_reset(struct mpr_data *data)
{
if (data->gpiod_reset) {
gpiod_set_value(data->gpiod_reset, 0);
udelay(10);
gpiod_set_value(data->gpiod_reset, 1);
}
}
/**
* mpr_read_pressure() - Read pressure value from sensor via I2C
* @data: Pointer to private data struct.
* @press: Output value read from sensor.
*
* Reading from the sensor by sending and receiving I2C telegrams.
*
* If there is an end of conversion (EOC) interrupt registered the function
* waits for a maximum of one second for the interrupt.
*
* Context: The function can sleep and data->lock should be held when calling it
* Return:
* * 0 - OK, the pressure value could be read
* * -ETIMEDOUT - Timeout while waiting for the EOC interrupt or busy flag is
* still set after nloops attempts of reading
*/
static int mpr_read_pressure(struct mpr_data *data, s32 *press)
{
struct device *dev = &data->client->dev;
int ret, i;
u8 wdata[] = {0xAA, 0x00, 0x00};
s32 status;
int nloops = 10;
u8 buf[4];
reinit_completion(&data->completion);
ret = i2c_master_send(data->client, wdata, sizeof(wdata));
if (ret < 0) {
dev_err(dev, "error while writing ret: %d\n", ret);
return ret;
}
if (ret != sizeof(wdata)) {
dev_err(dev, "received size doesn't fit - ret: %d / %u\n", ret,
(u32)sizeof(wdata));
return -EIO;
}
if (data->irq > 0) {
ret = wait_for_completion_timeout(&data->completion, HZ);
if (!ret) {
dev_err(dev, "timeout while waiting for eoc irq\n");
return -ETIMEDOUT;
}
} else {
/* wait until status indicates data is ready */
for (i = 0; i < nloops; i++) {
/*
* datasheet only says to wait at least 5 ms for the
* data but leave the maximum response time open
* --> let's try it nloops (10) times which seems to be
* quite long
*/
usleep_range(5000, 10000);
status = i2c_smbus_read_byte(data->client);
if (status < 0) {
dev_err(dev,
"error while reading, status: %d\n",
status);
return status;
}
if (!(status & MPR_I2C_BUSY))
break;
}
if (i == nloops) {
dev_err(dev, "timeout while reading\n");
return -ETIMEDOUT;
}
}
ret = i2c_master_recv(data->client, buf, sizeof(buf));
if (ret < 0) {
dev_err(dev, "error in i2c_master_recv ret: %d\n", ret);
return ret;
}
if (ret != sizeof(buf)) {
dev_err(dev, "received size doesn't fit - ret: %d / %u\n", ret,
(u32)sizeof(buf));
return -EIO;
}
if (buf[0] & MPR_I2C_BUSY) {
/*
* it should never be the case that status still indicates
* business
*/
dev_err(dev, "data still not ready: %08x\n", buf[0]);
return -ETIMEDOUT;
}
*press = get_unaligned_be24(&buf[1]);
dev_dbg(dev, "received: %*ph cnt: %d\n", ret, buf, *press);
return 0;
}
static irqreturn_t mpr_eoc_handler(int irq, void *p)
{
struct mpr_data *data = p;
complete(&data->completion);
return IRQ_HANDLED;
}
static irqreturn_t mpr_trigger_handler(int irq, void *p)
{
int ret;
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct mpr_data *data = iio_priv(indio_dev);
mutex_lock(&data->lock);
ret = mpr_read_pressure(data, &data->chan.pres);
if (ret < 0)
goto err;
iio_push_to_buffers_with_timestamp(indio_dev, &data->chan,
iio_get_time_ns(indio_dev));
err:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int mpr_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2, long mask)
{
int ret;
s32 pressure;
struct mpr_data *data = iio_priv(indio_dev);
if (chan->type != IIO_PRESSURE)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&data->lock);
ret = mpr_read_pressure(data, &pressure);
mutex_unlock(&data->lock);
if (ret < 0)
return ret;
*val = pressure;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = data->scale;
*val2 = data->scale2;
return IIO_VAL_INT_PLUS_NANO;
case IIO_CHAN_INFO_OFFSET:
*val = data->offset;
*val2 = data->offset2;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info mpr_info = {
.read_raw = &mpr_read_raw,
};
static int mpr_probe(struct i2c_client *client)
{
int ret;
struct mpr_data *data;
struct iio_dev *indio_dev;
struct device *dev = &client->dev;
s64 scale, offset;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE))
return dev_err_probe(dev, -EOPNOTSUPP,
"I2C functionality not supported\n");
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return dev_err_probe(dev, -ENOMEM, "couldn't get iio_dev\n");
data = iio_priv(indio_dev);
data->client = client;
data->irq = client->irq;
mutex_init(&data->lock);
init_completion(&data->completion);
indio_dev->name = "mprls0025pa";
indio_dev->info = &mpr_info;
indio_dev->channels = mpr_channels;
indio_dev->num_channels = ARRAY_SIZE(mpr_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
ret = devm_regulator_get_enable(dev, "vdd");
if (ret)
return dev_err_probe(dev, ret,
"can't get and enable vdd supply\n");
if (dev_fwnode(dev)) {
ret = device_property_read_u32(dev, "honeywell,pmin-pascal",
&data->pmin);
if (ret)
return dev_err_probe(dev, ret,
"honeywell,pmin-pascal could not be read\n");
ret = device_property_read_u32(dev, "honeywell,pmax-pascal",
&data->pmax);
if (ret)
return dev_err_probe(dev, ret,
"honeywell,pmax-pascal could not be read\n");
ret = device_property_read_u32(dev,
"honeywell,transfer-function", &data->function);
if (ret)
return dev_err_probe(dev, ret,
"honeywell,transfer-function could not be read\n");
if (data->function > MPR_FUNCTION_C)
return dev_err_probe(dev, -EINVAL,
"honeywell,transfer-function %d invalid\n",
data->function);
} else {
/* when loaded as i2c device we need to use default values */
dev_notice(dev, "firmware node not found; using defaults\n");
data->pmin = 0;
data->pmax = 172369; /* 25 psi */
data->function = MPR_FUNCTION_A;
}
data->outmin = mpr_func_spec[data->function].output_min;
data->outmax = mpr_func_spec[data->function].output_max;
/* use 64 bit calculation for preserving a reasonable precision */
scale = div_s64(((s64)(data->pmax - data->pmin)) * NANO,
data->outmax - data->outmin);
data->scale = div_s64_rem(scale, NANO, &data->scale2);
/*
* multiply with NANO before dividing by scale and later divide by NANO
* again.
*/
offset = ((-1LL) * (s64)data->outmin) * NANO -
div_s64(div_s64((s64)data->pmin * NANO, scale), NANO);
data->offset = div_s64_rem(offset, NANO, &data->offset2);
if (data->irq > 0) {
ret = devm_request_irq(dev, data->irq, mpr_eoc_handler,
IRQF_TRIGGER_RISING, client->name, data);
if (ret)
return dev_err_probe(dev, ret,
"request irq %d failed\n", data->irq);
}
data->gpiod_reset = devm_gpiod_get_optional(dev, "reset",
GPIOD_OUT_HIGH);
if (IS_ERR(data->gpiod_reset))
return dev_err_probe(dev, PTR_ERR(data->gpiod_reset),
"request reset-gpio failed\n");
mpr_reset(data);
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
mpr_trigger_handler, NULL);
if (ret)
return dev_err_probe(dev, ret,
"iio triggered buffer setup failed\n");
ret = devm_iio_device_register(dev, indio_dev);
if (ret)
return dev_err_probe(dev, ret,
"unable to register iio device\n");
return 0;
}
static const struct of_device_id mpr_matches[] = {
{ .compatible = "honeywell,mprls0025pa" },
{ }
};
MODULE_DEVICE_TABLE(of, mpr_matches);
static const struct i2c_device_id mpr_id[] = {
{ "mprls0025pa" },
{ }
};
MODULE_DEVICE_TABLE(i2c, mpr_id);
static struct i2c_driver mpr_driver = {
.probe = mpr_probe,
.id_table = mpr_id,
.driver = {
.name = "mprls0025pa",
.of_match_table = mpr_matches,
},
};
module_i2c_driver(mpr_driver);
MODULE_AUTHOR("Andreas Klinger <[email protected]>");
MODULE_DESCRIPTION("Honeywell MPRLS0025PA I2C driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/pressure/mprls0025pa.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Murata ZPA2326 pressure and temperature sensor IIO driver
*
* Copyright (c) 2016 Parrot S.A.
*
* Author: Gregor Boirie <[email protected]>
*/
/**
* DOC: ZPA2326 theory of operations
*
* This driver supports %INDIO_DIRECT_MODE and %INDIO_BUFFER_TRIGGERED IIO
* modes.
* A internal hardware trigger is also implemented to dispatch registered IIO
* trigger consumers upon "sample ready" interrupts.
*
* ZPA2326 hardware supports 2 sampling mode: one shot and continuous.
*
* A complete one shot sampling cycle gets device out of low power mode,
* performs pressure and temperature measurements, then automatically switches
* back to low power mode. It is meant for on demand sampling with optimal power
* saving at the cost of lower sampling rate and higher software overhead.
* This is a natural candidate for IIO read_raw hook implementation
* (%INDIO_DIRECT_MODE). It is also used for triggered buffering support to
* ensure explicit synchronization with external trigger events
* (%INDIO_BUFFER_TRIGGERED).
*
* The continuous mode works according to a periodic hardware measurement
* process continuously pushing samples into an internal hardware FIFO (for
* pressure samples only). Measurement cycle completion may be signaled by a
* "sample ready" interrupt.
* Typical software sequence of operations :
* - get device out of low power mode,
* - setup hardware sampling period,
* - at end of period, upon data ready interrupt: pop pressure samples out of
* hardware FIFO and fetch temperature sample
* - when no longer needed, stop sampling process by putting device into
* low power mode.
* This mode is used to implement %INDIO_BUFFER_TRIGGERED mode if device tree
* declares a valid interrupt line. In this case, the internal hardware trigger
* drives acquisition.
*
* Note that hardware sampling frequency is taken into account only when
* internal hardware trigger is attached as the highest sampling rate seems to
* be the most energy efficient.
*
* TODO:
* preset pressure threshold crossing / IIO events ;
* differential pressure sampling ;
* hardware samples averaging.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/regulator/consumer.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <asm/unaligned.h>
#include "zpa2326.h"
/* 200 ms should be enough for the longest conversion time in one-shot mode. */
#define ZPA2326_CONVERSION_JIFFIES (HZ / 5)
/* There should be a 1 ms delay (Tpup) after getting out of reset. */
#define ZPA2326_TPUP_USEC_MIN (1000)
#define ZPA2326_TPUP_USEC_MAX (2000)
/**
* struct zpa2326_frequency - Hardware sampling frequency descriptor
* @hz : Frequency in Hertz.
* @odr: Output Data Rate word as expected by %ZPA2326_CTRL_REG3_REG.
*/
struct zpa2326_frequency {
int hz;
u16 odr;
};
/*
* Keep these in strict ascending order: last array entry is expected to
* correspond to the highest sampling frequency.
*/
static const struct zpa2326_frequency zpa2326_sampling_frequencies[] = {
{ .hz = 1, .odr = 1 << ZPA2326_CTRL_REG3_ODR_SHIFT },
{ .hz = 5, .odr = 5 << ZPA2326_CTRL_REG3_ODR_SHIFT },
{ .hz = 11, .odr = 6 << ZPA2326_CTRL_REG3_ODR_SHIFT },
{ .hz = 23, .odr = 7 << ZPA2326_CTRL_REG3_ODR_SHIFT },
};
/* Return the highest hardware sampling frequency available. */
static const struct zpa2326_frequency *zpa2326_highest_frequency(void)
{
return &zpa2326_sampling_frequencies[
ARRAY_SIZE(zpa2326_sampling_frequencies) - 1];
}
/**
* struct zpa2326_private - Per-device internal private state
* @timestamp: Buffered samples ready datum.
* @regmap: Underlying I2C / SPI bus adapter used to abstract slave register
* accesses.
* @result: Allows sampling logic to get completion status of operations
* that interrupt handlers perform asynchronously.
* @data_ready: Interrupt handler uses this to wake user context up at sampling
* operation completion.
* @trigger: Optional hardware / interrupt driven trigger used to notify
* external devices a new sample is ready.
* @waken: Flag indicating whether or not device has just been powered on.
* @irq: Optional interrupt line: negative or zero if not declared into
* DT, in which case sampling logic keeps polling status register
* to detect completion.
* @frequency: Current hardware sampling frequency.
* @vref: Power / voltage reference.
* @vdd: Power supply.
*/
struct zpa2326_private {
s64 timestamp;
struct regmap *regmap;
int result;
struct completion data_ready;
struct iio_trigger *trigger;
bool waken;
int irq;
const struct zpa2326_frequency *frequency;
struct regulator *vref;
struct regulator *vdd;
};
#define zpa2326_err(idev, fmt, ...) \
dev_err(idev->dev.parent, fmt "\n", ##__VA_ARGS__)
#define zpa2326_warn(idev, fmt, ...) \
dev_warn(idev->dev.parent, fmt "\n", ##__VA_ARGS__)
#define zpa2326_dbg(idev, fmt, ...) \
dev_dbg(idev->dev.parent, fmt "\n", ##__VA_ARGS__)
bool zpa2326_isreg_writeable(struct device *dev, unsigned int reg)
{
switch (reg) {
case ZPA2326_REF_P_XL_REG:
case ZPA2326_REF_P_L_REG:
case ZPA2326_REF_P_H_REG:
case ZPA2326_RES_CONF_REG:
case ZPA2326_CTRL_REG0_REG:
case ZPA2326_CTRL_REG1_REG:
case ZPA2326_CTRL_REG2_REG:
case ZPA2326_CTRL_REG3_REG:
case ZPA2326_THS_P_LOW_REG:
case ZPA2326_THS_P_HIGH_REG:
return true;
default:
return false;
}
}
EXPORT_SYMBOL_NS_GPL(zpa2326_isreg_writeable, IIO_ZPA2326);
bool zpa2326_isreg_readable(struct device *dev, unsigned int reg)
{
switch (reg) {
case ZPA2326_REF_P_XL_REG:
case ZPA2326_REF_P_L_REG:
case ZPA2326_REF_P_H_REG:
case ZPA2326_DEVICE_ID_REG:
case ZPA2326_RES_CONF_REG:
case ZPA2326_CTRL_REG0_REG:
case ZPA2326_CTRL_REG1_REG:
case ZPA2326_CTRL_REG2_REG:
case ZPA2326_CTRL_REG3_REG:
case ZPA2326_INT_SOURCE_REG:
case ZPA2326_THS_P_LOW_REG:
case ZPA2326_THS_P_HIGH_REG:
case ZPA2326_STATUS_REG:
case ZPA2326_PRESS_OUT_XL_REG:
case ZPA2326_PRESS_OUT_L_REG:
case ZPA2326_PRESS_OUT_H_REG:
case ZPA2326_TEMP_OUT_L_REG:
case ZPA2326_TEMP_OUT_H_REG:
return true;
default:
return false;
}
}
EXPORT_SYMBOL_NS_GPL(zpa2326_isreg_readable, IIO_ZPA2326);
bool zpa2326_isreg_precious(struct device *dev, unsigned int reg)
{
switch (reg) {
case ZPA2326_INT_SOURCE_REG:
case ZPA2326_PRESS_OUT_H_REG:
return true;
default:
return false;
}
}
EXPORT_SYMBOL_NS_GPL(zpa2326_isreg_precious, IIO_ZPA2326);
/**
* zpa2326_enable_device() - Enable device, i.e. get out of low power mode.
* @indio_dev: The IIO device associated with the hardware to enable.
*
* Required to access complete register space and to perform any sampling
* or control operations.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_enable_device(const struct iio_dev *indio_dev)
{
int err;
err = regmap_write(((struct zpa2326_private *)
iio_priv(indio_dev))->regmap,
ZPA2326_CTRL_REG0_REG, ZPA2326_CTRL_REG0_ENABLE);
if (err) {
zpa2326_err(indio_dev, "failed to enable device (%d)", err);
return err;
}
zpa2326_dbg(indio_dev, "enabled");
return 0;
}
/**
* zpa2326_sleep() - Disable device, i.e. switch to low power mode.
* @indio_dev: The IIO device associated with the hardware to disable.
*
* Only %ZPA2326_DEVICE_ID_REG and %ZPA2326_CTRL_REG0_REG registers may be
* accessed once device is in the disabled state.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_sleep(const struct iio_dev *indio_dev)
{
int err;
err = regmap_write(((struct zpa2326_private *)
iio_priv(indio_dev))->regmap,
ZPA2326_CTRL_REG0_REG, 0);
if (err) {
zpa2326_err(indio_dev, "failed to sleep (%d)", err);
return err;
}
zpa2326_dbg(indio_dev, "sleeping");
return 0;
}
/**
* zpa2326_reset_device() - Reset device to default hardware state.
* @indio_dev: The IIO device associated with the hardware to reset.
*
* Disable sampling and empty hardware FIFO.
* Device must be enabled before reset, i.e. not in low power mode.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_reset_device(const struct iio_dev *indio_dev)
{
int err;
err = regmap_write(((struct zpa2326_private *)
iio_priv(indio_dev))->regmap,
ZPA2326_CTRL_REG2_REG, ZPA2326_CTRL_REG2_SWRESET);
if (err) {
zpa2326_err(indio_dev, "failed to reset device (%d)", err);
return err;
}
usleep_range(ZPA2326_TPUP_USEC_MIN, ZPA2326_TPUP_USEC_MAX);
zpa2326_dbg(indio_dev, "reset");
return 0;
}
/**
* zpa2326_start_oneshot() - Start a single sampling cycle, i.e. in one shot
* mode.
* @indio_dev: The IIO device associated with the sampling hardware.
*
* Device must have been previously enabled and configured for one shot mode.
* Device will be switched back to low power mode at end of cycle.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_start_oneshot(const struct iio_dev *indio_dev)
{
int err;
err = regmap_write(((struct zpa2326_private *)
iio_priv(indio_dev))->regmap,
ZPA2326_CTRL_REG0_REG,
ZPA2326_CTRL_REG0_ENABLE |
ZPA2326_CTRL_REG0_ONE_SHOT);
if (err) {
zpa2326_err(indio_dev, "failed to start one shot cycle (%d)",
err);
return err;
}
zpa2326_dbg(indio_dev, "one shot cycle started");
return 0;
}
/**
* zpa2326_power_on() - Power on device to allow subsequent configuration.
* @indio_dev: The IIO device associated with the sampling hardware.
* @private: Internal private state related to @indio_dev.
*
* Sampling will be disabled, preventing strange things from happening in our
* back. Hardware FIFO content will be cleared.
* When successful, device will be left in the enabled state to allow further
* configuration.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_power_on(const struct iio_dev *indio_dev,
const struct zpa2326_private *private)
{
int err;
err = regulator_enable(private->vref);
if (err)
return err;
err = regulator_enable(private->vdd);
if (err)
goto vref;
zpa2326_dbg(indio_dev, "powered on");
err = zpa2326_enable_device(indio_dev);
if (err)
goto vdd;
err = zpa2326_reset_device(indio_dev);
if (err)
goto sleep;
return 0;
sleep:
zpa2326_sleep(indio_dev);
vdd:
regulator_disable(private->vdd);
vref:
regulator_disable(private->vref);
zpa2326_dbg(indio_dev, "powered off");
return err;
}
/**
* zpa2326_power_off() - Power off device, i.e. disable attached power
* regulators.
* @indio_dev: The IIO device associated with the sampling hardware.
* @private: Internal private state related to @indio_dev.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static void zpa2326_power_off(const struct iio_dev *indio_dev,
const struct zpa2326_private *private)
{
regulator_disable(private->vdd);
regulator_disable(private->vref);
zpa2326_dbg(indio_dev, "powered off");
}
/**
* zpa2326_config_oneshot() - Setup device for one shot / on demand mode.
* @indio_dev: The IIO device associated with the sampling hardware.
* @irq: Optional interrupt line the hardware uses to notify new data
* samples are ready. Negative or zero values indicate no interrupts
* are available, meaning polling is required.
*
* Output Data Rate is configured for the highest possible rate so that
* conversion time and power consumption are reduced to a minimum.
* Note that hardware internal averaging machinery (not implemented in this
* driver) is not applicable in this mode.
*
* Device must have been previously enabled before calling
* zpa2326_config_oneshot().
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_config_oneshot(const struct iio_dev *indio_dev,
int irq)
{
struct regmap *regs = ((struct zpa2326_private *)
iio_priv(indio_dev))->regmap;
const struct zpa2326_frequency *freq = zpa2326_highest_frequency();
int err;
/* Setup highest available Output Data Rate for one shot mode. */
err = regmap_write(regs, ZPA2326_CTRL_REG3_REG, freq->odr);
if (err)
return err;
if (irq > 0) {
/* Request interrupt when new sample is available. */
err = regmap_write(regs, ZPA2326_CTRL_REG1_REG,
(u8)~ZPA2326_CTRL_REG1_MASK_DATA_READY);
if (err) {
dev_err(indio_dev->dev.parent,
"failed to setup one shot mode (%d)", err);
return err;
}
}
zpa2326_dbg(indio_dev, "one shot mode setup @%dHz", freq->hz);
return 0;
}
/**
* zpa2326_clear_fifo() - Clear remaining entries in hardware FIFO.
* @indio_dev: The IIO device associated with the sampling hardware.
* @min_count: Number of samples present within hardware FIFO.
*
* @min_count argument is a hint corresponding to the known minimum number of
* samples currently living in the FIFO. This allows to reduce the number of bus
* accesses by skipping status register read operation as long as we know for
* sure there are still entries left.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_clear_fifo(const struct iio_dev *indio_dev,
unsigned int min_count)
{
struct regmap *regs = ((struct zpa2326_private *)
iio_priv(indio_dev))->regmap;
int err;
unsigned int val;
if (!min_count) {
/*
* No hint: read status register to determine whether FIFO is
* empty or not.
*/
err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
if (err < 0)
goto err;
if (val & ZPA2326_STATUS_FIFO_E)
/* Fifo is empty: nothing to trash. */
return 0;
}
/* Clear FIFO. */
do {
/*
* A single fetch from pressure MSB register is enough to pop
* values out of FIFO.
*/
err = regmap_read(regs, ZPA2326_PRESS_OUT_H_REG, &val);
if (err < 0)
goto err;
if (min_count) {
/*
* We know for sure there are at least min_count entries
* left in FIFO. Skip status register read.
*/
min_count--;
continue;
}
err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
if (err < 0)
goto err;
} while (!(val & ZPA2326_STATUS_FIFO_E));
zpa2326_dbg(indio_dev, "FIFO cleared");
return 0;
err:
zpa2326_err(indio_dev, "failed to clear FIFO (%d)", err);
return err;
}
/**
* zpa2326_dequeue_pressure() - Retrieve the most recent pressure sample from
* hardware FIFO.
* @indio_dev: The IIO device associated with the sampling hardware.
* @pressure: Sampled pressure output.
*
* Note that ZPA2326 hardware FIFO stores pressure samples only.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_dequeue_pressure(const struct iio_dev *indio_dev,
u32 *pressure)
{
struct regmap *regs = ((struct zpa2326_private *)
iio_priv(indio_dev))->regmap;
unsigned int val;
int err;
int cleared = -1;
err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
if (err < 0)
return err;
*pressure = 0;
if (val & ZPA2326_STATUS_P_OR) {
/*
* Fifo overrun : first sample dequeued from FIFO is the
* newest.
*/
zpa2326_warn(indio_dev, "FIFO overflow");
err = regmap_bulk_read(regs, ZPA2326_PRESS_OUT_XL_REG, pressure,
3);
if (err)
return err;
#define ZPA2326_FIFO_DEPTH (16U)
/* Hardware FIFO may hold no more than 16 pressure samples. */
return zpa2326_clear_fifo(indio_dev, ZPA2326_FIFO_DEPTH - 1);
}
/*
* Fifo has not overflown : retrieve newest sample. We need to pop
* values out until FIFO is empty : last fetched pressure is the newest.
* In nominal cases, we should find a single queued sample only.
*/
do {
err = regmap_bulk_read(regs, ZPA2326_PRESS_OUT_XL_REG, pressure,
3);
if (err)
return err;
err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
if (err < 0)
return err;
cleared++;
} while (!(val & ZPA2326_STATUS_FIFO_E));
if (cleared)
/*
* Samples were pushed by hardware during previous rounds but we
* didn't consume them fast enough: inform user.
*/
zpa2326_dbg(indio_dev, "cleared %d FIFO entries", cleared);
return 0;
}
/**
* zpa2326_fill_sample_buffer() - Enqueue new channel samples to IIO buffer.
* @indio_dev: The IIO device associated with the sampling hardware.
* @private: Internal private state related to @indio_dev.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_fill_sample_buffer(struct iio_dev *indio_dev,
const struct zpa2326_private *private)
{
struct {
u32 pressure;
u16 temperature;
u64 timestamp;
} sample;
int err;
if (test_bit(0, indio_dev->active_scan_mask)) {
/* Get current pressure from hardware FIFO. */
err = zpa2326_dequeue_pressure(indio_dev, &sample.pressure);
if (err) {
zpa2326_warn(indio_dev, "failed to fetch pressure (%d)",
err);
return err;
}
}
if (test_bit(1, indio_dev->active_scan_mask)) {
/* Get current temperature. */
err = regmap_bulk_read(private->regmap, ZPA2326_TEMP_OUT_L_REG,
&sample.temperature, 2);
if (err) {
zpa2326_warn(indio_dev,
"failed to fetch temperature (%d)", err);
return err;
}
}
/*
* Now push samples using timestamp stored either :
* - by hardware interrupt handler if interrupt is available: see
* zpa2326_handle_irq(),
* - or oneshot completion polling machinery : see
* zpa2326_trigger_handler().
*/
zpa2326_dbg(indio_dev, "filling raw samples buffer");
iio_push_to_buffers_with_timestamp(indio_dev, &sample,
private->timestamp);
return 0;
}
#ifdef CONFIG_PM
static int zpa2326_runtime_suspend(struct device *parent)
{
const struct iio_dev *indio_dev = dev_get_drvdata(parent);
if (pm_runtime_autosuspend_expiration(parent))
/* Userspace changed autosuspend delay. */
return -EAGAIN;
zpa2326_power_off(indio_dev, iio_priv(indio_dev));
return 0;
}
static int zpa2326_runtime_resume(struct device *parent)
{
const struct iio_dev *indio_dev = dev_get_drvdata(parent);
return zpa2326_power_on(indio_dev, iio_priv(indio_dev));
}
const struct dev_pm_ops zpa2326_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
pm_runtime_force_resume)
SET_RUNTIME_PM_OPS(zpa2326_runtime_suspend, zpa2326_runtime_resume,
NULL)
};
EXPORT_SYMBOL_NS_GPL(zpa2326_pm_ops, IIO_ZPA2326);
/**
* zpa2326_resume() - Request the PM layer to power supply the device.
* @indio_dev: The IIO device associated with the sampling hardware.
*
* Return:
* < 0 - a negative error code meaning failure ;
* 0 - success, device has just been powered up ;
* 1 - success, device was already powered.
*/
static int zpa2326_resume(const struct iio_dev *indio_dev)
{
int err;
err = pm_runtime_get_sync(indio_dev->dev.parent);
if (err < 0) {
pm_runtime_put(indio_dev->dev.parent);
return err;
}
if (err > 0) {
/*
* Device was already power supplied: get it out of low power
* mode and inform caller.
*/
zpa2326_enable_device(indio_dev);
return 1;
}
/* Inform caller device has just been brought back to life. */
return 0;
}
/**
* zpa2326_suspend() - Schedule a power down using autosuspend feature of PM
* layer.
* @indio_dev: The IIO device associated with the sampling hardware.
*
* Device is switched to low power mode at first to save power even when
* attached regulator is a "dummy" one.
*/
static void zpa2326_suspend(struct iio_dev *indio_dev)
{
struct device *parent = indio_dev->dev.parent;
zpa2326_sleep(indio_dev);
pm_runtime_mark_last_busy(parent);
pm_runtime_put_autosuspend(parent);
}
static void zpa2326_init_runtime(struct device *parent)
{
pm_runtime_get_noresume(parent);
pm_runtime_set_active(parent);
pm_runtime_enable(parent);
pm_runtime_set_autosuspend_delay(parent, 1000);
pm_runtime_use_autosuspend(parent);
pm_runtime_mark_last_busy(parent);
pm_runtime_put_autosuspend(parent);
}
static void zpa2326_fini_runtime(struct device *parent)
{
pm_runtime_disable(parent);
pm_runtime_set_suspended(parent);
}
#else /* !CONFIG_PM */
static int zpa2326_resume(const struct iio_dev *indio_dev)
{
zpa2326_enable_device(indio_dev);
return 0;
}
static void zpa2326_suspend(struct iio_dev *indio_dev)
{
zpa2326_sleep(indio_dev);
}
#define zpa2326_init_runtime(_parent)
#define zpa2326_fini_runtime(_parent)
#endif /* !CONFIG_PM */
/**
* zpa2326_handle_irq() - Process hardware interrupts.
* @irq: Interrupt line the hardware uses to notify new data has arrived.
* @data: The IIO device associated with the sampling hardware.
*
* Timestamp buffered samples as soon as possible then schedule threaded bottom
* half.
*
* Return: Always successful.
*/
static irqreturn_t zpa2326_handle_irq(int irq, void *data)
{
struct iio_dev *indio_dev = data;
if (iio_buffer_enabled(indio_dev)) {
/* Timestamping needed for buffered sampling only. */
((struct zpa2326_private *)
iio_priv(indio_dev))->timestamp = iio_get_time_ns(indio_dev);
}
return IRQ_WAKE_THREAD;
}
/**
* zpa2326_handle_threaded_irq() - Interrupt bottom-half handler.
* @irq: Interrupt line the hardware uses to notify new data has arrived.
* @data: The IIO device associated with the sampling hardware.
*
* Mainly ensures interrupt is caused by a real "new sample available"
* condition. This relies upon the ability to perform blocking / sleeping bus
* accesses to slave's registers. This is why zpa2326_handle_threaded_irq() is
* called from within a thread, i.e. not called from hard interrupt context.
*
* When device is using its own internal hardware trigger in continuous sampling
* mode, data are available into hardware FIFO once interrupt has occurred. All
* we have to do is to dispatch the trigger, which in turn will fetch data and
* fill IIO buffer.
*
* When not using its own internal hardware trigger, the device has been
* configured in one-shot mode either by an external trigger or the IIO read_raw
* hook. This means one of the latter is currently waiting for sampling
* completion, in which case we must simply wake it up.
*
* See zpa2326_trigger_handler().
*
* Return:
* %IRQ_NONE - no consistent interrupt happened ;
* %IRQ_HANDLED - there was new samples available.
*/
static irqreturn_t zpa2326_handle_threaded_irq(int irq, void *data)
{
struct iio_dev *indio_dev = data;
struct zpa2326_private *priv = iio_priv(indio_dev);
unsigned int val;
bool cont;
irqreturn_t ret = IRQ_NONE;
/*
* Are we using our own internal trigger in triggered buffer mode, i.e.,
* currently working in continuous sampling mode ?
*/
cont = (iio_buffer_enabled(indio_dev) &&
iio_trigger_using_own(indio_dev));
/*
* Device works according to a level interrupt scheme: reading interrupt
* status de-asserts interrupt line.
*/
priv->result = regmap_read(priv->regmap, ZPA2326_INT_SOURCE_REG, &val);
if (priv->result < 0) {
if (cont)
return IRQ_NONE;
goto complete;
}
/* Data ready is the only interrupt source we requested. */
if (!(val & ZPA2326_INT_SOURCE_DATA_READY)) {
/*
* Interrupt happened but no new sample available: likely caused
* by spurious interrupts, in which case, returning IRQ_NONE
* allows to benefit from the generic spurious interrupts
* handling.
*/
zpa2326_warn(indio_dev, "unexpected interrupt status %02x",
val);
if (cont)
return IRQ_NONE;
priv->result = -ENODATA;
goto complete;
}
/* New sample available: dispatch internal trigger consumers. */
iio_trigger_poll_nested(priv->trigger);
if (cont)
/*
* Internal hardware trigger has been scheduled above : it will
* fetch data on its own.
*/
return IRQ_HANDLED;
ret = IRQ_HANDLED;
complete:
/*
* Wake up direct or externaly triggered buffer mode waiters: see
* zpa2326_sample_oneshot() and zpa2326_trigger_handler().
*/
complete(&priv->data_ready);
return ret;
}
/**
* zpa2326_wait_oneshot_completion() - Wait for oneshot data ready interrupt.
* @indio_dev: The IIO device associated with the sampling hardware.
* @private: Internal private state related to @indio_dev.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_wait_oneshot_completion(const struct iio_dev *indio_dev,
struct zpa2326_private *private)
{
unsigned int val;
long timeout;
zpa2326_dbg(indio_dev, "waiting for one shot completion interrupt");
timeout = wait_for_completion_interruptible_timeout(
&private->data_ready, ZPA2326_CONVERSION_JIFFIES);
if (timeout > 0)
/*
* Interrupt handler completed before timeout: return operation
* status.
*/
return private->result;
/* Clear all interrupts just to be sure. */
regmap_read(private->regmap, ZPA2326_INT_SOURCE_REG, &val);
if (!timeout) {
/* Timed out. */
zpa2326_warn(indio_dev, "no one shot interrupt occurred (%ld)",
timeout);
return -ETIME;
}
zpa2326_warn(indio_dev, "wait for one shot interrupt cancelled");
return -ERESTARTSYS;
}
static int zpa2326_init_managed_irq(struct device *parent,
struct iio_dev *indio_dev,
struct zpa2326_private *private,
int irq)
{
int err;
private->irq = irq;
if (irq <= 0) {
/*
* Platform declared no interrupt line: device will be polled
* for data availability.
*/
dev_info(parent, "no interrupt found, running in polling mode");
return 0;
}
init_completion(&private->data_ready);
/* Request handler to be scheduled into threaded interrupt context. */
err = devm_request_threaded_irq(parent, irq, zpa2326_handle_irq,
zpa2326_handle_threaded_irq,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
dev_name(parent), indio_dev);
if (err) {
dev_err(parent, "failed to request interrupt %d (%d)", irq,
err);
return err;
}
dev_info(parent, "using interrupt %d", irq);
return 0;
}
/**
* zpa2326_poll_oneshot_completion() - Actively poll for one shot data ready.
* @indio_dev: The IIO device associated with the sampling hardware.
*
* Loop over registers content to detect end of sampling cycle. Used when DT
* declared no valid interrupt lines.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_poll_oneshot_completion(const struct iio_dev *indio_dev)
{
unsigned long tmout = jiffies + ZPA2326_CONVERSION_JIFFIES;
struct regmap *regs = ((struct zpa2326_private *)
iio_priv(indio_dev))->regmap;
unsigned int val;
int err;
zpa2326_dbg(indio_dev, "polling for one shot completion");
/*
* At least, 100 ms is needed for the device to complete its one-shot
* cycle.
*/
if (msleep_interruptible(100))
return -ERESTARTSYS;
/* Poll for conversion completion in hardware. */
while (true) {
err = regmap_read(regs, ZPA2326_CTRL_REG0_REG, &val);
if (err < 0)
goto err;
if (!(val & ZPA2326_CTRL_REG0_ONE_SHOT))
/* One-shot bit self clears at conversion end. */
break;
if (time_after(jiffies, tmout)) {
/* Prevent from waiting forever : let's time out. */
err = -ETIME;
goto err;
}
usleep_range(10000, 20000);
}
/*
* In oneshot mode, pressure sample availability guarantees that
* temperature conversion has also completed : just check pressure
* status bit to keep things simple.
*/
err = regmap_read(regs, ZPA2326_STATUS_REG, &val);
if (err < 0)
goto err;
if (!(val & ZPA2326_STATUS_P_DA)) {
/* No sample available. */
err = -ENODATA;
goto err;
}
return 0;
err:
zpa2326_warn(indio_dev, "failed to poll one shot completion (%d)", err);
return err;
}
/**
* zpa2326_fetch_raw_sample() - Retrieve a raw sample and convert it to CPU
* endianness.
* @indio_dev: The IIO device associated with the sampling hardware.
* @type: Type of measurement / channel to fetch from.
* @value: Sample output.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_fetch_raw_sample(const struct iio_dev *indio_dev,
enum iio_chan_type type,
int *value)
{
struct regmap *regs = ((struct zpa2326_private *)
iio_priv(indio_dev))->regmap;
int err;
u8 v[3];
switch (type) {
case IIO_PRESSURE:
zpa2326_dbg(indio_dev, "fetching raw pressure sample");
err = regmap_bulk_read(regs, ZPA2326_PRESS_OUT_XL_REG, v, sizeof(v));
if (err) {
zpa2326_warn(indio_dev, "failed to fetch pressure (%d)",
err);
return err;
}
*value = get_unaligned_le24(&v[0]);
return IIO_VAL_INT;
case IIO_TEMP:
zpa2326_dbg(indio_dev, "fetching raw temperature sample");
err = regmap_bulk_read(regs, ZPA2326_TEMP_OUT_L_REG, value, 2);
if (err) {
zpa2326_warn(indio_dev,
"failed to fetch temperature (%d)", err);
return err;
}
/* Temperature is a 16 bits wide little-endian signed int. */
*value = (int)le16_to_cpup((__le16 *)value);
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
/**
* zpa2326_sample_oneshot() - Perform a complete one shot sampling cycle.
* @indio_dev: The IIO device associated with the sampling hardware.
* @type: Type of measurement / channel to fetch from.
* @value: Sample output.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_sample_oneshot(struct iio_dev *indio_dev,
enum iio_chan_type type,
int *value)
{
int ret;
struct zpa2326_private *priv;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = zpa2326_resume(indio_dev);
if (ret < 0)
goto release;
priv = iio_priv(indio_dev);
if (ret > 0) {
/*
* We were already power supplied. Just clear hardware FIFO to
* get rid of samples acquired during previous rounds (if any).
* Sampling operation always generates both temperature and
* pressure samples. The latter are always enqueued into
* hardware FIFO. This may lead to situations were pressure
* samples still sit into FIFO when previous cycle(s) fetched
* temperature data only.
* Hence, we need to clear hardware FIFO content to prevent from
* getting outdated values at the end of current cycle.
*/
if (type == IIO_PRESSURE) {
ret = zpa2326_clear_fifo(indio_dev, 0);
if (ret)
goto suspend;
}
} else {
/*
* We have just been power supplied, i.e. device is in default
* "out of reset" state, meaning we need to reconfigure it
* entirely.
*/
ret = zpa2326_config_oneshot(indio_dev, priv->irq);
if (ret)
goto suspend;
}
/* Start a sampling cycle in oneshot mode. */
ret = zpa2326_start_oneshot(indio_dev);
if (ret)
goto suspend;
/* Wait for sampling cycle to complete. */
if (priv->irq > 0)
ret = zpa2326_wait_oneshot_completion(indio_dev, priv);
else
ret = zpa2326_poll_oneshot_completion(indio_dev);
if (ret)
goto suspend;
/* Retrieve raw sample value and convert it to CPU endianness. */
ret = zpa2326_fetch_raw_sample(indio_dev, type, value);
suspend:
zpa2326_suspend(indio_dev);
release:
iio_device_release_direct_mode(indio_dev);
return ret;
}
/**
* zpa2326_trigger_handler() - Perform an IIO buffered sampling round in one
* shot mode.
* @irq: The software interrupt assigned to @data
* @data: The IIO poll function dispatched by external trigger our device is
* attached to.
*
* Bottom-half handler called by the IIO trigger to which our device is
* currently attached. Allows us to synchronize this device buffered sampling
* either with external events (such as timer expiration, external device sample
* ready, etc...) or with its own interrupt (internal hardware trigger).
*
* When using an external trigger, basically run the same sequence of operations
* as for zpa2326_sample_oneshot() with the following hereafter. Hardware FIFO
* is not cleared since already done at buffering enable time and samples
* dequeueing always retrieves the most recent value.
*
* Otherwise, when internal hardware trigger has dispatched us, just fetch data
* from hardware FIFO.
*
* Fetched data will pushed unprocessed to IIO buffer since samples conversion
* is delegated to userspace in buffered mode (endianness, etc...).
*
* Return:
* %IRQ_NONE - no consistent interrupt happened ;
* %IRQ_HANDLED - there was new samples available.
*/
static irqreturn_t zpa2326_trigger_handler(int irq, void *data)
{
struct iio_dev *indio_dev = ((struct iio_poll_func *)
data)->indio_dev;
struct zpa2326_private *priv = iio_priv(indio_dev);
bool cont;
/*
* We have been dispatched, meaning we are in triggered buffer mode.
* Using our own internal trigger implies we are currently in continuous
* hardware sampling mode.
*/
cont = iio_trigger_using_own(indio_dev);
if (!cont) {
/* On demand sampling : start a one shot cycle. */
if (zpa2326_start_oneshot(indio_dev))
goto out;
/* Wait for sampling cycle to complete. */
if (priv->irq <= 0) {
/* No interrupt available: poll for completion. */
if (zpa2326_poll_oneshot_completion(indio_dev))
goto out;
/* Only timestamp sample once it is ready. */
priv->timestamp = iio_get_time_ns(indio_dev);
} else {
/* Interrupt handlers will timestamp for us. */
if (zpa2326_wait_oneshot_completion(indio_dev, priv))
goto out;
}
}
/* Enqueue to IIO buffer / userspace. */
zpa2326_fill_sample_buffer(indio_dev, priv);
out:
if (!cont)
/* Don't switch to low power if sampling continuously. */
zpa2326_sleep(indio_dev);
/* Inform attached trigger we are done. */
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
/**
* zpa2326_preenable_buffer() - Prepare device for configuring triggered
* sampling
* modes.
* @indio_dev: The IIO device associated with the sampling hardware.
*
* Basically power up device.
* Called with IIO device's lock held.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_preenable_buffer(struct iio_dev *indio_dev)
{
int ret = zpa2326_resume(indio_dev);
if (ret < 0)
return ret;
/* Tell zpa2326_postenable_buffer() if we have just been powered on. */
((struct zpa2326_private *)
iio_priv(indio_dev))->waken = iio_priv(indio_dev);
return 0;
}
/**
* zpa2326_postenable_buffer() - Configure device for triggered sampling.
* @indio_dev: The IIO device associated with the sampling hardware.
*
* Basically setup one-shot mode if plugging external trigger.
* Otherwise, let internal trigger configure continuous sampling :
* see zpa2326_set_trigger_state().
*
* If an error is returned, IIO layer will call our postdisable hook for us,
* i.e. no need to explicitly power device off here.
* Called with IIO device's lock held.
*
* Called with IIO device's lock held.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_postenable_buffer(struct iio_dev *indio_dev)
{
const struct zpa2326_private *priv = iio_priv(indio_dev);
int err;
if (!priv->waken) {
/*
* We were already power supplied. Just clear hardware FIFO to
* get rid of samples acquired during previous rounds (if any).
*/
err = zpa2326_clear_fifo(indio_dev, 0);
if (err) {
zpa2326_err(indio_dev,
"failed to enable buffering (%d)", err);
return err;
}
}
if (!iio_trigger_using_own(indio_dev) && priv->waken) {
/*
* We are using an external trigger and we have just been
* powered up: reconfigure one-shot mode.
*/
err = zpa2326_config_oneshot(indio_dev, priv->irq);
if (err) {
zpa2326_err(indio_dev,
"failed to enable buffering (%d)", err);
return err;
}
}
return 0;
}
static int zpa2326_postdisable_buffer(struct iio_dev *indio_dev)
{
zpa2326_suspend(indio_dev);
return 0;
}
static const struct iio_buffer_setup_ops zpa2326_buffer_setup_ops = {
.preenable = zpa2326_preenable_buffer,
.postenable = zpa2326_postenable_buffer,
.postdisable = zpa2326_postdisable_buffer
};
/**
* zpa2326_set_trigger_state() - Start / stop continuous sampling.
* @trig: The trigger being attached to IIO device associated with the sampling
* hardware.
* @state: Tell whether to start (true) or stop (false)
*
* Basically enable / disable hardware continuous sampling mode.
*
* Called with IIO device's lock held at postenable() or predisable() time.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_set_trigger_state(struct iio_trigger *trig, bool state)
{
const struct iio_dev *indio_dev = dev_get_drvdata(
trig->dev.parent);
const struct zpa2326_private *priv = iio_priv(indio_dev);
int err;
if (!state) {
/*
* Switch trigger off : in case of failure, interrupt is left
* disabled in order to prevent handler from accessing released
* resources.
*/
unsigned int val;
/*
* As device is working in continuous mode, handlers may be
* accessing resources we are currently freeing...
* Prevent this by disabling interrupt handlers and ensure
* the device will generate no more interrupts unless explicitly
* required to, i.e. by restoring back to default one shot mode.
*/
disable_irq(priv->irq);
/*
* Disable continuous sampling mode to restore settings for
* one shot / direct sampling operations.
*/
err = regmap_write(priv->regmap, ZPA2326_CTRL_REG3_REG,
zpa2326_highest_frequency()->odr);
if (err)
return err;
/*
* Now that device won't generate interrupts on its own,
* acknowledge any currently active interrupts (may happen on
* rare occasions while stopping continuous mode).
*/
err = regmap_read(priv->regmap, ZPA2326_INT_SOURCE_REG, &val);
if (err < 0)
return err;
/*
* Re-enable interrupts only if we can guarantee the device will
* generate no more interrupts to prevent handlers from
* accessing released resources.
*/
enable_irq(priv->irq);
zpa2326_dbg(indio_dev, "continuous mode stopped");
} else {
/*
* Switch trigger on : start continuous sampling at required
* frequency.
*/
if (priv->waken) {
/* Enable interrupt if getting out of reset. */
err = regmap_write(priv->regmap, ZPA2326_CTRL_REG1_REG,
(u8)
~ZPA2326_CTRL_REG1_MASK_DATA_READY);
if (err)
return err;
}
/* Enable continuous sampling at specified frequency. */
err = regmap_write(priv->regmap, ZPA2326_CTRL_REG3_REG,
ZPA2326_CTRL_REG3_ENABLE_MEAS |
priv->frequency->odr);
if (err)
return err;
zpa2326_dbg(indio_dev, "continuous mode setup @%dHz",
priv->frequency->hz);
}
return 0;
}
static const struct iio_trigger_ops zpa2326_trigger_ops = {
.set_trigger_state = zpa2326_set_trigger_state,
};
/**
* zpa2326_init_managed_trigger() - Create interrupt driven / hardware trigger
* allowing to notify external devices a new sample is
* ready.
* @parent: Hardware sampling device @indio_dev is a child of.
* @indio_dev: The IIO device associated with the sampling hardware.
* @private: Internal private state related to @indio_dev.
* @irq: Optional interrupt line the hardware uses to notify new data
* samples are ready. Negative or zero values indicate no interrupts
* are available, meaning polling is required.
*
* Only relevant when DT declares a valid interrupt line.
*
* Return: Zero when successful, a negative error code otherwise.
*/
static int zpa2326_init_managed_trigger(struct device *parent,
struct iio_dev *indio_dev,
struct zpa2326_private *private,
int irq)
{
struct iio_trigger *trigger;
int ret;
if (irq <= 0)
return 0;
trigger = devm_iio_trigger_alloc(parent, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!trigger)
return -ENOMEM;
/* Basic setup. */
trigger->ops = &zpa2326_trigger_ops;
private->trigger = trigger;
/* Register to triggers space. */
ret = devm_iio_trigger_register(parent, trigger);
if (ret)
dev_err(parent, "failed to register hardware trigger (%d)",
ret);
return ret;
}
static int zpa2326_get_frequency(const struct iio_dev *indio_dev)
{
return ((struct zpa2326_private *)iio_priv(indio_dev))->frequency->hz;
}
static int zpa2326_set_frequency(struct iio_dev *indio_dev, int hz)
{
struct zpa2326_private *priv = iio_priv(indio_dev);
int freq;
int err;
/* Check if requested frequency is supported. */
for (freq = 0; freq < ARRAY_SIZE(zpa2326_sampling_frequencies); freq++)
if (zpa2326_sampling_frequencies[freq].hz == hz)
break;
if (freq == ARRAY_SIZE(zpa2326_sampling_frequencies))
return -EINVAL;
/* Don't allow changing frequency if buffered sampling is ongoing. */
err = iio_device_claim_direct_mode(indio_dev);
if (err)
return err;
priv->frequency = &zpa2326_sampling_frequencies[freq];
iio_device_release_direct_mode(indio_dev);
return 0;
}
/* Expose supported hardware sampling frequencies (Hz) through sysfs. */
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1 5 11 23");
static struct attribute *zpa2326_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL
};
static const struct attribute_group zpa2326_attribute_group = {
.attrs = zpa2326_attributes,
};
static int zpa2326_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_RAW:
return zpa2326_sample_oneshot(indio_dev, chan->type, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_PRESSURE:
/*
* Pressure resolution is 1/64 Pascal. Scale to kPascal
* as required by IIO ABI.
*/
*val = 1;
*val2 = 64000;
return IIO_VAL_FRACTIONAL;
case IIO_TEMP:
/*
* Temperature follows the equation:
* Temp[degC] = Tempcode * 0.00649 - 176.83
* where:
* Tempcode is composed the raw sampled 16 bits.
*
* Hence, to produce a temperature in milli-degrees
* Celsius according to IIO ABI, we need to apply the
* following equation to raw samples:
* Temp[milli degC] = (Tempcode + Offset) * Scale
* where:
* Offset = -176.83 / 0.00649
* Scale = 0.00649 * 1000
*/
*val = 6;
*val2 = 490000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
*val = -17683000;
*val2 = 649;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
*val = zpa2326_get_frequency(indio_dev);
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int zpa2326_write_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
int val,
int val2,
long mask)
{
if ((mask != IIO_CHAN_INFO_SAMP_FREQ) || val2)
return -EINVAL;
return zpa2326_set_frequency(indio_dev, val);
}
static const struct iio_chan_spec zpa2326_channels[] = {
[0] = {
.type = IIO_PRESSURE,
.scan_index = 0,
.scan_type = {
.sign = 'u',
.realbits = 24,
.storagebits = 32,
.endianness = IIO_LE,
},
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
[1] = {
.type = IIO_TEMP,
.scan_index = 1,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_LE,
},
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
};
static const struct iio_info zpa2326_info = {
.attrs = &zpa2326_attribute_group,
.read_raw = zpa2326_read_raw,
.write_raw = zpa2326_write_raw,
};
static struct iio_dev *zpa2326_create_managed_iiodev(struct device *device,
const char *name,
struct regmap *regmap)
{
struct iio_dev *indio_dev;
/* Allocate space to hold IIO device internal state. */
indio_dev = devm_iio_device_alloc(device,
sizeof(struct zpa2326_private));
if (!indio_dev)
return NULL;
/* Setup for userspace synchronous on demand sampling. */
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = zpa2326_channels;
indio_dev->num_channels = ARRAY_SIZE(zpa2326_channels);
indio_dev->name = name;
indio_dev->info = &zpa2326_info;
return indio_dev;
}
int zpa2326_probe(struct device *parent,
const char *name,
int irq,
unsigned int hwid,
struct regmap *regmap)
{
struct iio_dev *indio_dev;
struct zpa2326_private *priv;
int err;
unsigned int id;
indio_dev = zpa2326_create_managed_iiodev(parent, name, regmap);
if (!indio_dev)
return -ENOMEM;
priv = iio_priv(indio_dev);
priv->vref = devm_regulator_get(parent, "vref");
if (IS_ERR(priv->vref))
return PTR_ERR(priv->vref);
priv->vdd = devm_regulator_get(parent, "vdd");
if (IS_ERR(priv->vdd))
return PTR_ERR(priv->vdd);
/* Set default hardware sampling frequency to highest rate supported. */
priv->frequency = zpa2326_highest_frequency();
/*
* Plug device's underlying bus abstraction : this MUST be set before
* registering interrupt handlers since an interrupt might happen if
* power up sequence is not properly applied.
*/
priv->regmap = regmap;
err = devm_iio_triggered_buffer_setup(parent, indio_dev, NULL,
zpa2326_trigger_handler,
&zpa2326_buffer_setup_ops);
if (err)
return err;
err = zpa2326_init_managed_trigger(parent, indio_dev, priv, irq);
if (err)
return err;
err = zpa2326_init_managed_irq(parent, indio_dev, priv, irq);
if (err)
return err;
/* Power up to check device ID and perform initial hardware setup. */
err = zpa2326_power_on(indio_dev, priv);
if (err)
return err;
/* Read id register to check we are talking to the right slave. */
err = regmap_read(regmap, ZPA2326_DEVICE_ID_REG, &id);
if (err)
goto sleep;
if (id != hwid) {
dev_err(parent, "found device with unexpected id %02x", id);
err = -ENODEV;
goto sleep;
}
err = zpa2326_config_oneshot(indio_dev, irq);
if (err)
goto sleep;
/* Setup done : go sleeping. Device will be awaken upon user request. */
err = zpa2326_sleep(indio_dev);
if (err)
goto poweroff;
dev_set_drvdata(parent, indio_dev);
zpa2326_init_runtime(parent);
err = iio_device_register(indio_dev);
if (err) {
zpa2326_fini_runtime(parent);
goto poweroff;
}
return 0;
sleep:
/* Put to sleep just in case power regulators are "dummy" ones. */
zpa2326_sleep(indio_dev);
poweroff:
zpa2326_power_off(indio_dev, priv);
return err;
}
EXPORT_SYMBOL_NS_GPL(zpa2326_probe, IIO_ZPA2326);
void zpa2326_remove(const struct device *parent)
{
struct iio_dev *indio_dev = dev_get_drvdata(parent);
iio_device_unregister(indio_dev);
zpa2326_fini_runtime(indio_dev->dev.parent);
zpa2326_sleep(indio_dev);
zpa2326_power_off(indio_dev, iio_priv(indio_dev));
}
EXPORT_SYMBOL_NS_GPL(zpa2326_remove, IIO_ZPA2326);
MODULE_AUTHOR("Gregor Boirie <[email protected]>");
MODULE_DESCRIPTION("Core driver for Murata ZPA2326 pressure sensor");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/pressure/zpa2326.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics pressures driver
*
* Copyright 2013 STMicroelectronics Inc.
*
* Denis Ciocca <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <asm/unaligned.h>
#include <linux/iio/common/st_sensors.h>
#include "st_pressure.h"
/*
* About determining pressure scaling factors
* ------------------------------------------
*
* Datasheets specify typical pressure sensitivity so that pressure is computed
* according to the following equation :
* pressure[mBar] = raw / sensitivity
* where :
* raw the 24 bits long raw sampled pressure
* sensitivity a scaling factor specified by the datasheet in LSB/mBar
*
* IIO ABI expects pressure to be expressed as kPascal, hence pressure should be
* computed according to :
* pressure[kPascal] = pressure[mBar] / 10
* = raw / (sensitivity * 10) (1)
*
* Finally, st_press_read_raw() returns pressure scaling factor as an
* IIO_VAL_INT_PLUS_NANO with a zero integral part and "gain" as decimal part.
* Therefore, from (1), "gain" becomes :
* gain = 10^9 / (sensitivity * 10)
* = 10^8 / sensitivity
*
* About determining temperature scaling factors and offsets
* ---------------------------------------------------------
*
* Datasheets specify typical temperature sensitivity and offset so that
* temperature is computed according to the following equation :
* temp[Celsius] = offset[Celsius] + (raw / sensitivity)
* where :
* raw the 16 bits long raw sampled temperature
* offset a constant specified by the datasheet in degree Celsius
* (sometimes zero)
* sensitivity a scaling factor specified by the datasheet in LSB/Celsius
*
* IIO ABI expects temperature to be expressed as milli degree Celsius such as
* user space should compute temperature according to :
* temp[mCelsius] = temp[Celsius] * 10^3
* = (offset[Celsius] + (raw / sensitivity)) * 10^3
* = ((offset[Celsius] * sensitivity) + raw) *
* (10^3 / sensitivity) (2)
*
* IIO ABI expects user space to apply offset and scaling factors to raw samples
* according to :
* temp[mCelsius] = (OFFSET + raw) * SCALE
* where :
* OFFSET an arbitrary constant exposed by device
* SCALE an arbitrary scaling factor exposed by device
*
* Matching OFFSET and SCALE with members of (2) gives :
* OFFSET = offset[Celsius] * sensitivity (3)
* SCALE = 10^3 / sensitivity (4)
*
* st_press_read_raw() returns temperature scaling factor as an
* IIO_VAL_FRACTIONAL with a 10^3 numerator and "gain2" as denominator.
* Therefore, from (3), "gain2" becomes :
* gain2 = sensitivity
*
* When declared within channel, i.e. for a non zero specified offset,
* st_press_read_raw() will return the latter as an IIO_VAL_FRACTIONAL such as :
* numerator = OFFSET * 10^3
* denominator = 10^3
* giving from (4):
* numerator = offset[Celsius] * 10^3 * sensitivity
* = offset[mCelsius] * gain2
*/
#define MCELSIUS_PER_CELSIUS 1000
/* Default pressure sensitivity */
#define ST_PRESS_LSB_PER_MBAR 4096UL
#define ST_PRESS_KPASCAL_NANO_SCALE (100000000UL / \
ST_PRESS_LSB_PER_MBAR)
/* Default temperature sensitivity */
#define ST_PRESS_LSB_PER_CELSIUS 480UL
#define ST_PRESS_MILLI_CELSIUS_OFFSET 42500UL
/* FULLSCALE */
#define ST_PRESS_FS_AVL_1100MB 1100
#define ST_PRESS_FS_AVL_1260MB 1260
#define ST_PRESS_1_OUT_XL_ADDR 0x28
#define ST_TEMP_1_OUT_L_ADDR 0x2b
/* LPS001WP pressure resolution */
#define ST_PRESS_LPS001WP_LSB_PER_MBAR 16UL
/* LPS001WP temperature resolution */
#define ST_PRESS_LPS001WP_LSB_PER_CELSIUS 64UL
/* LPS001WP pressure gain */
#define ST_PRESS_LPS001WP_FS_AVL_PRESS_GAIN \
(100000000UL / ST_PRESS_LPS001WP_LSB_PER_MBAR)
/* LPS001WP pressure and temp L addresses */
#define ST_PRESS_LPS001WP_OUT_L_ADDR 0x28
#define ST_TEMP_LPS001WP_OUT_L_ADDR 0x2a
/* LPS25H pressure and temp L addresses */
#define ST_PRESS_LPS25H_OUT_XL_ADDR 0x28
#define ST_TEMP_LPS25H_OUT_L_ADDR 0x2b
/* LPS22HB temperature sensitivity */
#define ST_PRESS_LPS22HB_LSB_PER_CELSIUS 100UL
static const struct iio_chan_spec st_press_1_channels[] = {
{
.type = IIO_PRESSURE,
.address = ST_PRESS_1_OUT_XL_ADDR,
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 24,
.storagebits = 32,
.endianness = IIO_LE,
},
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
{
.type = IIO_TEMP,
.address = ST_TEMP_1_OUT_L_ADDR,
.scan_index = 1,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_LE,
},
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
IIO_CHAN_SOFT_TIMESTAMP(2)
};
static const struct iio_chan_spec st_press_lps001wp_channels[] = {
{
.type = IIO_PRESSURE,
.address = ST_PRESS_LPS001WP_OUT_L_ADDR,
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_LE,
},
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
},
{
.type = IIO_TEMP,
.address = ST_TEMP_LPS001WP_OUT_L_ADDR,
.scan_index = 1,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_LE,
},
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
},
IIO_CHAN_SOFT_TIMESTAMP(2)
};
static const struct iio_chan_spec st_press_lps22hb_channels[] = {
{
.type = IIO_PRESSURE,
.address = ST_PRESS_1_OUT_XL_ADDR,
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 24,
.storagebits = 32,
.endianness = IIO_LE,
},
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
{
.type = IIO_TEMP,
.address = ST_TEMP_1_OUT_L_ADDR,
.scan_index = 1,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_LE,
},
.info_mask_separate =
BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
},
IIO_CHAN_SOFT_TIMESTAMP(2)
};
static const struct st_sensor_settings st_press_sensors_settings[] = {
{
/*
* CUSTOM VALUES FOR LPS331AP SENSOR
* See LPS331AP datasheet:
* http://www2.st.com/resource/en/datasheet/lps331ap.pdf
*/
.wai = 0xbb,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LPS331AP_PRESS_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_press_1_channels,
.num_ch = ARRAY_SIZE(st_press_1_channels),
.odr = {
.addr = 0x20,
.mask = 0x70,
.odr_avl = {
{ .hz = 1, .value = 0x01 },
{ .hz = 7, .value = 0x05 },
{ .hz = 13, .value = 0x06 },
{ .hz = 25, .value = 0x07 },
},
},
.pw = {
.addr = 0x20,
.mask = 0x80,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.addr = 0x23,
.mask = 0x30,
.fs_avl = {
/*
* Pressure and temperature sensitivity values
* as defined in table 3 of LPS331AP datasheet.
*/
[0] = {
.num = ST_PRESS_FS_AVL_1260MB,
.gain = ST_PRESS_KPASCAL_NANO_SCALE,
.gain2 = ST_PRESS_LSB_PER_CELSIUS,
},
},
},
.bdu = {
.addr = 0x20,
.mask = 0x04,
},
.drdy_irq = {
.int1 = {
.addr = 0x22,
.mask = 0x04,
.addr_od = 0x22,
.mask_od = 0x40,
},
.int2 = {
.addr = 0x22,
.mask = 0x20,
.addr_od = 0x22,
.mask_od = 0x40,
},
.addr_ihl = 0x22,
.mask_ihl = 0x80,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x03,
},
},
.sim = {
.addr = 0x20,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
/*
* CUSTOM VALUES FOR LPS001WP SENSOR
*/
.wai = 0xba,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LPS001WP_PRESS_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_press_lps001wp_channels,
.num_ch = ARRAY_SIZE(st_press_lps001wp_channels),
.odr = {
.addr = 0x20,
.mask = 0x30,
.odr_avl = {
{ .hz = 1, .value = 0x01 },
{ .hz = 7, .value = 0x02 },
{ .hz = 13, .value = 0x03 },
},
},
.pw = {
.addr = 0x20,
.mask = 0x40,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.fs_avl = {
/*
* Pressure and temperature resolution values
* as defined in table 3 of LPS001WP datasheet.
*/
[0] = {
.num = ST_PRESS_FS_AVL_1100MB,
.gain = ST_PRESS_LPS001WP_FS_AVL_PRESS_GAIN,
.gain2 = ST_PRESS_LPS001WP_LSB_PER_CELSIUS,
},
},
},
.bdu = {
.addr = 0x20,
.mask = 0x04,
},
.sim = {
.addr = 0x20,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
/*
* CUSTOM VALUES FOR LPS25H SENSOR
* See LPS25H datasheet:
* http://www2.st.com/resource/en/datasheet/lps25h.pdf
*/
.wai = 0xbd,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LPS25H_PRESS_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_press_1_channels,
.num_ch = ARRAY_SIZE(st_press_1_channels),
.odr = {
.addr = 0x20,
.mask = 0x70,
.odr_avl = {
{ .hz = 1, .value = 0x01 },
{ .hz = 7, .value = 0x02 },
{ .hz = 13, .value = 0x03 },
{ .hz = 25, .value = 0x04 },
},
},
.pw = {
.addr = 0x20,
.mask = 0x80,
.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.fs_avl = {
/*
* Pressure and temperature sensitivity values
* as defined in table 3 of LPS25H datasheet.
*/
[0] = {
.num = ST_PRESS_FS_AVL_1260MB,
.gain = ST_PRESS_KPASCAL_NANO_SCALE,
.gain2 = ST_PRESS_LSB_PER_CELSIUS,
},
},
},
.bdu = {
.addr = 0x20,
.mask = 0x04,
},
.drdy_irq = {
.int1 = {
.addr = 0x23,
.mask = 0x01,
.addr_od = 0x22,
.mask_od = 0x40,
},
.addr_ihl = 0x22,
.mask_ihl = 0x80,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x03,
},
},
.sim = {
.addr = 0x20,
.value = BIT(0),
},
.multi_read_bit = true,
.bootime = 2,
},
{
/*
* CUSTOM VALUES FOR LPS22HB SENSOR
* See LPS22HB datasheet:
* http://www2.st.com/resource/en/datasheet/lps22hb.pdf
*/
.wai = 0xb1,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LPS22HB_PRESS_DEV_NAME,
[1] = LPS33HW_PRESS_DEV_NAME,
[2] = LPS35HW_PRESS_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_press_lps22hb_channels,
.num_ch = ARRAY_SIZE(st_press_lps22hb_channels),
.odr = {
.addr = 0x10,
.mask = 0x70,
.odr_avl = {
{ .hz = 1, .value = 0x01 },
{ .hz = 10, .value = 0x02 },
{ .hz = 25, .value = 0x03 },
{ .hz = 50, .value = 0x04 },
{ .hz = 75, .value = 0x05 },
},
},
.pw = {
.addr = 0x10,
.mask = 0x70,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.fs_avl = {
/*
* Pressure and temperature sensitivity values
* as defined in table 3 of LPS22HB datasheet.
*/
[0] = {
.num = ST_PRESS_FS_AVL_1260MB,
.gain = ST_PRESS_KPASCAL_NANO_SCALE,
.gain2 = ST_PRESS_LPS22HB_LSB_PER_CELSIUS,
},
},
},
.bdu = {
.addr = 0x10,
.mask = 0x02,
},
.drdy_irq = {
.int1 = {
.addr = 0x12,
.mask = 0x04,
.addr_od = 0x12,
.mask_od = 0x40,
},
.addr_ihl = 0x12,
.mask_ihl = 0x80,
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x03,
},
},
.sim = {
.addr = 0x10,
.value = BIT(0),
},
.multi_read_bit = false,
.bootime = 2,
},
{
/*
* CUSTOM VALUES FOR LPS22HH SENSOR
* See LPS22HH datasheet:
* http://www2.st.com/resource/en/datasheet/lps22hh.pdf
*/
.wai = 0xb3,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LPS22HH_PRESS_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_press_lps22hb_channels,
.num_ch = ARRAY_SIZE(st_press_lps22hb_channels),
.odr = {
.addr = 0x10,
.mask = 0x70,
.odr_avl = {
{ .hz = 1, .value = 0x01 },
{ .hz = 10, .value = 0x02 },
{ .hz = 25, .value = 0x03 },
{ .hz = 50, .value = 0x04 },
{ .hz = 75, .value = 0x05 },
{ .hz = 100, .value = 0x06 },
{ .hz = 200, .value = 0x07 },
},
},
.pw = {
.addr = 0x10,
.mask = 0x70,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.fs_avl = {
/*
* Pressure and temperature sensitivity values
* as defined in table 3 of LPS22HH datasheet.
*/
[0] = {
.num = ST_PRESS_FS_AVL_1260MB,
.gain = ST_PRESS_KPASCAL_NANO_SCALE,
.gain2 = ST_PRESS_LPS22HB_LSB_PER_CELSIUS,
},
},
},
.bdu = {
.addr = 0x10,
.mask = BIT(1),
},
.drdy_irq = {
.int1 = {
.addr = 0x12,
.mask = BIT(2),
.addr_od = 0x11,
.mask_od = BIT(5),
},
.addr_ihl = 0x11,
.mask_ihl = BIT(6),
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x03,
},
},
.sim = {
.addr = 0x10,
.value = BIT(0),
},
.multi_read_bit = false,
.bootime = 2,
},
{
/*
* CUSTOM VALUES FOR LPS22DF SENSOR
* See LPS22DF datasheet:
* http://www.st.com/resource/en/datasheet/lps22df.pdf
*/
.wai = 0xb4,
.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
.sensors_supported = {
[0] = LPS22DF_PRESS_DEV_NAME,
},
.ch = (struct iio_chan_spec *)st_press_lps22hb_channels,
.num_ch = ARRAY_SIZE(st_press_lps22hb_channels),
.odr = {
.addr = 0x10,
.mask = 0x78,
.odr_avl = {
{ .hz = 1, .value = 0x01 },
{ .hz = 4, .value = 0x02 },
{ .hz = 10, .value = 0x03 },
{ .hz = 25, .value = 0x04 },
{ .hz = 50, .value = 0x05 },
{ .hz = 75, .value = 0x06 },
{ .hz = 100, .value = 0x07 },
{ .hz = 200, .value = 0x08 },
},
},
.pw = {
.addr = 0x10,
.mask = 0x78,
.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
},
.fs = {
.fs_avl = {
/*
* Pressure and temperature sensitivity values
* as defined in table 2 of LPS22DF datasheet.
*/
[0] = {
.num = ST_PRESS_FS_AVL_1260MB,
.gain = ST_PRESS_KPASCAL_NANO_SCALE,
.gain2 = ST_PRESS_LPS22HB_LSB_PER_CELSIUS,
},
},
},
.bdu = {
.addr = 0x11,
.mask = BIT(3),
},
.drdy_irq = {
.int1 = {
.addr = 0x13,
.mask = BIT(5),
.addr_od = 0x12,
.mask_od = BIT(1),
},
.addr_ihl = 0x12,
.mask_ihl = BIT(3),
.stat_drdy = {
.addr = ST_SENSORS_DEFAULT_STAT_ADDR,
.mask = 0x03,
},
},
.sim = {
.addr = 0x0E,
.value = BIT(5),
},
.multi_read_bit = false,
.bootime = 2,
},
};
static int st_press_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *ch,
int val,
int val2,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (val2)
return -EINVAL;
return st_sensors_set_odr(indio_dev, val);
default:
return -EINVAL;
}
}
static int st_press_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *ch, int *val,
int *val2, long mask)
{
int err;
struct st_sensor_data *press_data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
err = st_sensors_read_info_raw(indio_dev, ch, val);
if (err < 0)
goto read_error;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
switch (ch->type) {
case IIO_PRESSURE:
*val = 0;
*val2 = press_data->current_fullscale->gain;
return IIO_VAL_INT_PLUS_NANO;
case IIO_TEMP:
*val = MCELSIUS_PER_CELSIUS;
*val2 = press_data->current_fullscale->gain2;
return IIO_VAL_FRACTIONAL;
default:
err = -EINVAL;
goto read_error;
}
case IIO_CHAN_INFO_OFFSET:
switch (ch->type) {
case IIO_TEMP:
*val = ST_PRESS_MILLI_CELSIUS_OFFSET *
press_data->current_fullscale->gain2;
*val2 = MCELSIUS_PER_CELSIUS;
break;
default:
err = -EINVAL;
goto read_error;
}
return IIO_VAL_FRACTIONAL;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = press_data->odr;
return IIO_VAL_INT;
default:
return -EINVAL;
}
read_error:
return err;
}
static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
static struct attribute *st_press_attributes[] = {
&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group st_press_attribute_group = {
.attrs = st_press_attributes,
};
static const struct iio_info press_info = {
.attrs = &st_press_attribute_group,
.read_raw = &st_press_read_raw,
.write_raw = &st_press_write_raw,
.debugfs_reg_access = &st_sensors_debugfs_reg_access,
};
#ifdef CONFIG_IIO_TRIGGER
static const struct iio_trigger_ops st_press_trigger_ops = {
.set_trigger_state = ST_PRESS_TRIGGER_SET_STATE,
.validate_device = st_sensors_validate_device,
};
#define ST_PRESS_TRIGGER_OPS (&st_press_trigger_ops)
#else
#define ST_PRESS_TRIGGER_OPS NULL
#endif
/*
* st_press_get_settings() - get sensor settings from device name
* @name: device name buffer reference.
*
* Return: valid reference on success, NULL otherwise.
*/
const struct st_sensor_settings *st_press_get_settings(const char *name)
{
int index = st_sensors_get_settings_index(name,
st_press_sensors_settings,
ARRAY_SIZE(st_press_sensors_settings));
if (index < 0)
return NULL;
return &st_press_sensors_settings[index];
}
EXPORT_SYMBOL_NS(st_press_get_settings, IIO_ST_SENSORS);
int st_press_common_probe(struct iio_dev *indio_dev)
{
struct st_sensor_data *press_data = iio_priv(indio_dev);
struct device *parent = indio_dev->dev.parent;
struct st_sensors_platform_data *pdata = dev_get_platdata(parent);
int err;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &press_info;
err = st_sensors_verify_id(indio_dev);
if (err < 0)
return err;
/*
* Skip timestamping channel while declaring available channels to
* common st_sensor layer. Look at st_sensors_get_buffer_element() to
* see how timestamps are explicitly pushed as last samples block
* element.
*/
press_data->num_data_channels = press_data->sensor_settings->num_ch - 1;
indio_dev->channels = press_data->sensor_settings->ch;
indio_dev->num_channels = press_data->sensor_settings->num_ch;
press_data->current_fullscale = &press_data->sensor_settings->fs.fs_avl[0];
press_data->odr = press_data->sensor_settings->odr.odr_avl[0].hz;
/* Some devices don't support a data ready pin. */
if (!pdata && (press_data->sensor_settings->drdy_irq.int1.addr ||
press_data->sensor_settings->drdy_irq.int2.addr))
pdata = (struct st_sensors_platform_data *)&default_press_pdata;
err = st_sensors_init_sensor(indio_dev, pdata);
if (err < 0)
return err;
err = st_press_allocate_ring(indio_dev);
if (err < 0)
return err;
if (press_data->irq > 0) {
err = st_sensors_allocate_trigger(indio_dev,
ST_PRESS_TRIGGER_OPS);
if (err < 0)
return err;
}
return devm_iio_device_register(parent, indio_dev);
}
EXPORT_SYMBOL_NS(st_press_common_probe, IIO_ST_SENSORS);
MODULE_AUTHOR("Denis Ciocca <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics pressures driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/pressure/st_pressure_core.c |
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include "bmp280.h"
static int bmp280_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
const struct bmp280_chip_info *chip_info;
const struct i2c_device_id *id = i2c_client_get_device_id(client);
chip_info = device_get_match_data(&client->dev);
if (!chip_info)
chip_info = (const struct bmp280_chip_info *) id->driver_data;
regmap = devm_regmap_init_i2c(client, chip_info->regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "failed to allocate register map\n");
return PTR_ERR(regmap);
}
return bmp280_common_probe(&client->dev,
regmap,
chip_info,
id->name,
client->irq);
}
static const struct of_device_id bmp280_of_i2c_match[] = {
{ .compatible = "bosch,bmp085", .data = &bmp180_chip_info },
{ .compatible = "bosch,bmp180", .data = &bmp180_chip_info },
{ .compatible = "bosch,bmp280", .data = &bmp280_chip_info },
{ .compatible = "bosch,bme280", .data = &bme280_chip_info },
{ .compatible = "bosch,bmp380", .data = &bmp380_chip_info },
{ .compatible = "bosch,bmp580", .data = &bmp580_chip_info },
{ },
};
MODULE_DEVICE_TABLE(of, bmp280_of_i2c_match);
static const struct i2c_device_id bmp280_i2c_id[] = {
{"bmp085", (kernel_ulong_t)&bmp180_chip_info },
{"bmp180", (kernel_ulong_t)&bmp180_chip_info },
{"bmp280", (kernel_ulong_t)&bmp280_chip_info },
{"bme280", (kernel_ulong_t)&bme280_chip_info },
{"bmp380", (kernel_ulong_t)&bmp380_chip_info },
{"bmp580", (kernel_ulong_t)&bmp580_chip_info },
{ },
};
MODULE_DEVICE_TABLE(i2c, bmp280_i2c_id);
static struct i2c_driver bmp280_i2c_driver = {
.driver = {
.name = "bmp280",
.of_match_table = bmp280_of_i2c_match,
.pm = pm_ptr(&bmp280_dev_pm_ops),
},
.probe = bmp280_i2c_probe,
.id_table = bmp280_i2c_id,
};
module_i2c_driver(bmp280_i2c_driver);
MODULE_AUTHOR("Vlad Dogaru <[email protected]>");
MODULE_DESCRIPTION("Driver for Bosch Sensortec BMP180/BMP280 pressure and temperature sensor");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_BMP280);
| linux-master | drivers/iio/pressure/bmp280-i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* adis16400.c support Analog Devices ADIS16400/5
* 3d 2g Linear Accelerometers,
* 3d Gyroscopes,
* 3d Magnetometers via SPI
*
* Copyright (c) 2009 Manuel Stahl <[email protected]>
* Copyright (c) 2007 Jonathan Cameron <[email protected]>
* Copyright (c) 2011 Analog Devices Inc.
*/
#include <linux/irq.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/debugfs.h>
#include <linux/bitops.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/imu/adis.h>
#define ADIS16400_STARTUP_DELAY 290 /* ms */
#define ADIS16400_MTEST_DELAY 90 /* ms */
#define ADIS16400_FLASH_CNT 0x00 /* Flash memory write count */
#define ADIS16400_SUPPLY_OUT 0x02 /* Power supply measurement */
#define ADIS16400_XGYRO_OUT 0x04 /* X-axis gyroscope output */
#define ADIS16400_YGYRO_OUT 0x06 /* Y-axis gyroscope output */
#define ADIS16400_ZGYRO_OUT 0x08 /* Z-axis gyroscope output */
#define ADIS16400_XACCL_OUT 0x0A /* X-axis accelerometer output */
#define ADIS16400_YACCL_OUT 0x0C /* Y-axis accelerometer output */
#define ADIS16400_ZACCL_OUT 0x0E /* Z-axis accelerometer output */
#define ADIS16400_XMAGN_OUT 0x10 /* X-axis magnetometer measurement */
#define ADIS16400_YMAGN_OUT 0x12 /* Y-axis magnetometer measurement */
#define ADIS16400_ZMAGN_OUT 0x14 /* Z-axis magnetometer measurement */
#define ADIS16400_TEMP_OUT 0x16 /* Temperature output */
#define ADIS16400_AUX_ADC 0x18 /* Auxiliary ADC measurement */
#define ADIS16350_XTEMP_OUT 0x10 /* X-axis gyroscope temperature measurement */
#define ADIS16350_YTEMP_OUT 0x12 /* Y-axis gyroscope temperature measurement */
#define ADIS16350_ZTEMP_OUT 0x14 /* Z-axis gyroscope temperature measurement */
#define ADIS16300_PITCH_OUT 0x12 /* X axis inclinometer output measurement */
#define ADIS16300_ROLL_OUT 0x14 /* Y axis inclinometer output measurement */
#define ADIS16300_AUX_ADC 0x16 /* Auxiliary ADC measurement */
#define ADIS16448_BARO_OUT 0x16 /* Barometric pressure output */
#define ADIS16448_TEMP_OUT 0x18 /* Temperature output */
/* Calibration parameters */
#define ADIS16400_XGYRO_OFF 0x1A /* X-axis gyroscope bias offset factor */
#define ADIS16400_YGYRO_OFF 0x1C /* Y-axis gyroscope bias offset factor */
#define ADIS16400_ZGYRO_OFF 0x1E /* Z-axis gyroscope bias offset factor */
#define ADIS16400_XACCL_OFF 0x20 /* X-axis acceleration bias offset factor */
#define ADIS16400_YACCL_OFF 0x22 /* Y-axis acceleration bias offset factor */
#define ADIS16400_ZACCL_OFF 0x24 /* Z-axis acceleration bias offset factor */
#define ADIS16400_XMAGN_HIF 0x26 /* X-axis magnetometer, hard-iron factor */
#define ADIS16400_YMAGN_HIF 0x28 /* Y-axis magnetometer, hard-iron factor */
#define ADIS16400_ZMAGN_HIF 0x2A /* Z-axis magnetometer, hard-iron factor */
#define ADIS16400_XMAGN_SIF 0x2C /* X-axis magnetometer, soft-iron factor */
#define ADIS16400_YMAGN_SIF 0x2E /* Y-axis magnetometer, soft-iron factor */
#define ADIS16400_ZMAGN_SIF 0x30 /* Z-axis magnetometer, soft-iron factor */
#define ADIS16400_GPIO_CTRL 0x32 /* Auxiliary digital input/output control */
#define ADIS16400_MSC_CTRL 0x34 /* Miscellaneous control */
#define ADIS16400_SMPL_PRD 0x36 /* Internal sample period (rate) control */
#define ADIS16400_SENS_AVG 0x38 /* Dynamic range and digital filter control */
#define ADIS16400_SLP_CNT 0x3A /* Sleep mode control */
#define ADIS16400_DIAG_STAT 0x3C /* System status */
/* Alarm functions */
#define ADIS16400_GLOB_CMD 0x3E /* System command */
#define ADIS16400_ALM_MAG1 0x40 /* Alarm 1 amplitude threshold */
#define ADIS16400_ALM_MAG2 0x42 /* Alarm 2 amplitude threshold */
#define ADIS16400_ALM_SMPL1 0x44 /* Alarm 1 sample size */
#define ADIS16400_ALM_SMPL2 0x46 /* Alarm 2 sample size */
#define ADIS16400_ALM_CTRL 0x48 /* Alarm control */
#define ADIS16400_AUX_DAC 0x4A /* Auxiliary DAC data */
#define ADIS16334_LOT_ID1 0x52 /* Lot identification code 1 */
#define ADIS16334_LOT_ID2 0x54 /* Lot identification code 2 */
#define ADIS16400_PRODUCT_ID 0x56 /* Product identifier */
#define ADIS16334_SERIAL_NUMBER 0x58 /* Serial number, lot specific */
#define ADIS16400_ERROR_ACTIVE (1<<14)
#define ADIS16400_NEW_DATA (1<<14)
/* MSC_CTRL */
#define ADIS16400_MSC_CTRL_MEM_TEST (1<<11)
#define ADIS16400_MSC_CTRL_INT_SELF_TEST (1<<10)
#define ADIS16400_MSC_CTRL_NEG_SELF_TEST (1<<9)
#define ADIS16400_MSC_CTRL_POS_SELF_TEST (1<<8)
#define ADIS16400_MSC_CTRL_GYRO_BIAS (1<<7)
#define ADIS16400_MSC_CTRL_ACCL_ALIGN (1<<6)
#define ADIS16400_MSC_CTRL_DATA_RDY_EN (1<<2)
#define ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH (1<<1)
#define ADIS16400_MSC_CTRL_DATA_RDY_DIO2 (1<<0)
/* SMPL_PRD */
#define ADIS16400_SMPL_PRD_TIME_BASE (1<<7)
#define ADIS16400_SMPL_PRD_DIV_MASK 0x7F
/* DIAG_STAT */
#define ADIS16400_DIAG_STAT_ZACCL_FAIL 15
#define ADIS16400_DIAG_STAT_YACCL_FAIL 14
#define ADIS16400_DIAG_STAT_XACCL_FAIL 13
#define ADIS16400_DIAG_STAT_XGYRO_FAIL 12
#define ADIS16400_DIAG_STAT_YGYRO_FAIL 11
#define ADIS16400_DIAG_STAT_ZGYRO_FAIL 10
#define ADIS16400_DIAG_STAT_ALARM2 9
#define ADIS16400_DIAG_STAT_ALARM1 8
#define ADIS16400_DIAG_STAT_FLASH_CHK 6
#define ADIS16400_DIAG_STAT_SELF_TEST 5
#define ADIS16400_DIAG_STAT_OVERFLOW 4
#define ADIS16400_DIAG_STAT_SPI_FAIL 3
#define ADIS16400_DIAG_STAT_FLASH_UPT 2
#define ADIS16400_DIAG_STAT_POWER_HIGH 1
#define ADIS16400_DIAG_STAT_POWER_LOW 0
/* GLOB_CMD */
#define ADIS16400_GLOB_CMD_SW_RESET (1<<7)
#define ADIS16400_GLOB_CMD_P_AUTO_NULL (1<<4)
#define ADIS16400_GLOB_CMD_FLASH_UPD (1<<3)
#define ADIS16400_GLOB_CMD_DAC_LATCH (1<<2)
#define ADIS16400_GLOB_CMD_FAC_CALIB (1<<1)
#define ADIS16400_GLOB_CMD_AUTO_NULL (1<<0)
/* SLP_CNT */
#define ADIS16400_SLP_CNT_POWER_OFF (1<<8)
#define ADIS16334_RATE_DIV_SHIFT 8
#define ADIS16334_RATE_INT_CLK BIT(0)
#define ADIS16400_SPI_SLOW (u32)(300 * 1000)
#define ADIS16400_SPI_BURST (u32)(1000 * 1000)
#define ADIS16400_SPI_FAST (u32)(2000 * 1000)
#define ADIS16400_HAS_PROD_ID BIT(0)
#define ADIS16400_NO_BURST BIT(1)
#define ADIS16400_HAS_SLOW_MODE BIT(2)
#define ADIS16400_HAS_SERIAL_NUMBER BIT(3)
#define ADIS16400_BURST_DIAG_STAT BIT(4)
struct adis16400_state;
struct adis16400_chip_info {
const struct iio_chan_spec *channels;
const struct adis_data adis_data;
const int num_channels;
const long flags;
unsigned int gyro_scale_micro;
unsigned int accel_scale_micro;
int temp_scale_nano;
int temp_offset;
/* set_freq() & get_freq() need to avoid using ADIS lib's state lock */
int (*set_freq)(struct adis16400_state *st, unsigned int freq);
int (*get_freq)(struct adis16400_state *st);
};
/**
* struct adis16400_state - device instance specific data
* @variant: chip variant info
* @filt_int: integer part of requested filter frequency
* @adis: adis device
* @avail_scan_mask: NULL terminated array of bitmaps of channels
* that must be enabled together
**/
struct adis16400_state {
struct adis16400_chip_info *variant;
int filt_int;
struct adis adis;
unsigned long avail_scan_mask[2];
};
/* At the moment triggers are only used for ring buffer
* filling. This may change!
*/
enum {
ADIS16400_SCAN_SUPPLY,
ADIS16400_SCAN_GYRO_X,
ADIS16400_SCAN_GYRO_Y,
ADIS16400_SCAN_GYRO_Z,
ADIS16400_SCAN_ACC_X,
ADIS16400_SCAN_ACC_Y,
ADIS16400_SCAN_ACC_Z,
ADIS16400_SCAN_MAGN_X,
ADIS16400_SCAN_MAGN_Y,
ADIS16400_SCAN_MAGN_Z,
ADIS16400_SCAN_BARO,
ADIS16350_SCAN_TEMP_X,
ADIS16350_SCAN_TEMP_Y,
ADIS16350_SCAN_TEMP_Z,
ADIS16300_SCAN_INCLI_X,
ADIS16300_SCAN_INCLI_Y,
ADIS16400_SCAN_ADC,
ADIS16400_SCAN_TIMESTAMP,
};
#ifdef CONFIG_DEBUG_FS
static ssize_t adis16400_show_serial_number(struct file *file,
char __user *userbuf, size_t count, loff_t *ppos)
{
struct adis16400_state *st = file->private_data;
u16 lot1, lot2, serial_number;
char buf[16];
size_t len;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16334_LOT_ID1, &lot1);
if (ret)
return ret;
ret = adis_read_reg_16(&st->adis, ADIS16334_LOT_ID2, &lot2);
if (ret)
return ret;
ret = adis_read_reg_16(&st->adis, ADIS16334_SERIAL_NUMBER,
&serial_number);
if (ret)
return ret;
len = snprintf(buf, sizeof(buf), "%.4x-%.4x-%.4x\n", lot1, lot2,
serial_number);
return simple_read_from_buffer(userbuf, count, ppos, buf, len);
}
static const struct file_operations adis16400_serial_number_fops = {
.open = simple_open,
.read = adis16400_show_serial_number,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static int adis16400_show_product_id(void *arg, u64 *val)
{
struct adis16400_state *st = arg;
uint16_t prod_id;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16400_PRODUCT_ID, &prod_id);
if (ret)
return ret;
*val = prod_id;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16400_product_id_fops,
adis16400_show_product_id, NULL, "%lld\n");
static int adis16400_show_flash_count(void *arg, u64 *val)
{
struct adis16400_state *st = arg;
uint16_t flash_count;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16400_FLASH_CNT, &flash_count);
if (ret)
return ret;
*val = flash_count;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16400_flash_count_fops,
adis16400_show_flash_count, NULL, "%lld\n");
static int adis16400_debugfs_init(struct iio_dev *indio_dev)
{
struct adis16400_state *st = iio_priv(indio_dev);
struct dentry *d = iio_get_debugfs_dentry(indio_dev);
if (st->variant->flags & ADIS16400_HAS_SERIAL_NUMBER)
debugfs_create_file_unsafe("serial_number", 0400,
d, st, &adis16400_serial_number_fops);
if (st->variant->flags & ADIS16400_HAS_PROD_ID)
debugfs_create_file_unsafe("product_id", 0400,
d, st, &adis16400_product_id_fops);
debugfs_create_file_unsafe("flash_count", 0400,
d, st, &adis16400_flash_count_fops);
return 0;
}
#else
static int adis16400_debugfs_init(struct iio_dev *indio_dev)
{
return 0;
}
#endif
enum adis16400_chip_variant {
ADIS16300,
ADIS16334,
ADIS16350,
ADIS16360,
ADIS16362,
ADIS16364,
ADIS16367,
ADIS16400,
ADIS16445,
ADIS16448,
};
static int adis16334_get_freq(struct adis16400_state *st)
{
int ret;
uint16_t t;
ret = __adis_read_reg_16(&st->adis, ADIS16400_SMPL_PRD, &t);
if (ret)
return ret;
t >>= ADIS16334_RATE_DIV_SHIFT;
return 819200 >> t;
}
static int adis16334_set_freq(struct adis16400_state *st, unsigned int freq)
{
unsigned int t;
if (freq < 819200)
t = ilog2(819200 / freq);
else
t = 0;
if (t > 0x31)
t = 0x31;
t <<= ADIS16334_RATE_DIV_SHIFT;
t |= ADIS16334_RATE_INT_CLK;
return __adis_write_reg_16(&st->adis, ADIS16400_SMPL_PRD, t);
}
static int adis16400_get_freq(struct adis16400_state *st)
{
int sps, ret;
uint16_t t;
ret = __adis_read_reg_16(&st->adis, ADIS16400_SMPL_PRD, &t);
if (ret)
return ret;
sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 52851 : 1638404;
sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
return sps;
}
static int adis16400_set_freq(struct adis16400_state *st, unsigned int freq)
{
unsigned int t;
uint8_t val = 0;
t = 1638404 / freq;
if (t >= 128) {
val |= ADIS16400_SMPL_PRD_TIME_BASE;
t = 52851 / freq;
if (t >= 128)
t = 127;
} else if (t != 0) {
t--;
}
val |= t;
if (t >= 0x0A || (val & ADIS16400_SMPL_PRD_TIME_BASE))
st->adis.spi->max_speed_hz = ADIS16400_SPI_SLOW;
else
st->adis.spi->max_speed_hz = ADIS16400_SPI_FAST;
return __adis_write_reg_8(&st->adis, ADIS16400_SMPL_PRD, val);
}
static const unsigned int adis16400_3db_divisors[] = {
[0] = 2, /* Special case */
[1] = 6,
[2] = 12,
[3] = 25,
[4] = 50,
[5] = 100,
[6] = 200,
[7] = 200, /* Not a valid setting */
};
static int __adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val)
{
struct adis16400_state *st = iio_priv(indio_dev);
uint16_t val16;
int i, ret;
for (i = ARRAY_SIZE(adis16400_3db_divisors) - 1; i >= 1; i--) {
if (sps / adis16400_3db_divisors[i] >= val)
break;
}
ret = __adis_read_reg_16(&st->adis, ADIS16400_SENS_AVG, &val16);
if (ret)
return ret;
ret = __adis_write_reg_16(&st->adis, ADIS16400_SENS_AVG,
(val16 & ~0x07) | i);
return ret;
}
/* Power down the device */
static int adis16400_stop_device(struct iio_dev *indio_dev)
{
struct adis16400_state *st = iio_priv(indio_dev);
int ret;
ret = adis_write_reg_16(&st->adis, ADIS16400_SLP_CNT,
ADIS16400_SLP_CNT_POWER_OFF);
if (ret)
dev_err(&indio_dev->dev,
"problem with turning device off: SLP_CNT");
return ret;
}
static int adis16400_initial_setup(struct iio_dev *indio_dev)
{
struct adis16400_state *st = iio_priv(indio_dev);
uint16_t prod_id, smp_prd;
unsigned int device_id;
int ret;
/* use low spi speed for init if the device has a slow mode */
if (st->variant->flags & ADIS16400_HAS_SLOW_MODE)
st->adis.spi->max_speed_hz = ADIS16400_SPI_SLOW;
else
st->adis.spi->max_speed_hz = ADIS16400_SPI_FAST;
st->adis.spi->mode = SPI_MODE_3;
spi_setup(st->adis.spi);
ret = __adis_initial_startup(&st->adis);
if (ret)
return ret;
if (st->variant->flags & ADIS16400_HAS_PROD_ID) {
ret = adis_read_reg_16(&st->adis,
ADIS16400_PRODUCT_ID, &prod_id);
if (ret)
goto err_ret;
if (sscanf(indio_dev->name, "adis%u\n", &device_id) != 1) {
ret = -EINVAL;
goto err_ret;
}
if (prod_id != device_id)
dev_warn(&indio_dev->dev, "Device ID(%u) and product ID(%u) do not match.",
device_id, prod_id);
dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n",
indio_dev->name, prod_id,
spi_get_chipselect(st->adis.spi, 0), st->adis.spi->irq);
}
/* use high spi speed if possible */
if (st->variant->flags & ADIS16400_HAS_SLOW_MODE) {
ret = adis_read_reg_16(&st->adis, ADIS16400_SMPL_PRD, &smp_prd);
if (ret)
goto err_ret;
if ((smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
st->adis.spi->max_speed_hz = ADIS16400_SPI_FAST;
spi_setup(st->adis.spi);
}
}
err_ret:
return ret;
}
static const uint8_t adis16400_addresses[] = {
[ADIS16400_SCAN_GYRO_X] = ADIS16400_XGYRO_OFF,
[ADIS16400_SCAN_GYRO_Y] = ADIS16400_YGYRO_OFF,
[ADIS16400_SCAN_GYRO_Z] = ADIS16400_ZGYRO_OFF,
[ADIS16400_SCAN_ACC_X] = ADIS16400_XACCL_OFF,
[ADIS16400_SCAN_ACC_Y] = ADIS16400_YACCL_OFF,
[ADIS16400_SCAN_ACC_Z] = ADIS16400_ZACCL_OFF,
};
static int adis16400_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2, long info)
{
struct adis16400_state *st = iio_priv(indio_dev);
int ret, sps;
switch (info) {
case IIO_CHAN_INFO_CALIBBIAS:
ret = adis_write_reg_16(&st->adis,
adis16400_addresses[chan->scan_index], val);
return ret;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
/*
* Need to cache values so we can update if the frequency
* changes.
*/
adis_dev_lock(&st->adis);
st->filt_int = val;
/* Work out update to current value */
sps = st->variant->get_freq(st);
if (sps < 0) {
adis_dev_unlock(&st->adis);
return sps;
}
ret = __adis16400_set_filter(indio_dev, sps,
val * 1000 + val2 / 1000);
adis_dev_unlock(&st->adis);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
sps = val * 1000 + val2 / 1000;
if (sps <= 0)
return -EINVAL;
adis_dev_lock(&st->adis);
ret = st->variant->set_freq(st, sps);
adis_dev_unlock(&st->adis);
return ret;
default:
return -EINVAL;
}
}
static int adis16400_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2, long info)
{
struct adis16400_state *st = iio_priv(indio_dev);
int16_t val16;
int ret;
switch (info) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan, 0, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = 0;
*val2 = st->variant->gyro_scale_micro;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_VOLTAGE:
*val = 0;
if (chan->channel == 0) {
*val = 2;
*val2 = 418000; /* 2.418 mV */
} else {
*val = 0;
*val2 = 805800; /* 805.8 uV */
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
*val = 0;
*val2 = st->variant->accel_scale_micro;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_MAGN:
*val = 0;
*val2 = 500; /* 0.5 mgauss */
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = st->variant->temp_scale_nano / 1000000;
*val2 = (st->variant->temp_scale_nano % 1000000);
return IIO_VAL_INT_PLUS_MICRO;
case IIO_PRESSURE:
/* 20 uBar = 0.002kPascal */
*val = 0;
*val2 = 2000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_CALIBBIAS:
ret = adis_read_reg_16(&st->adis,
adis16400_addresses[chan->scan_index], &val16);
if (ret)
return ret;
val16 = sign_extend32(val16, 11);
*val = val16;
return IIO_VAL_INT;
case IIO_CHAN_INFO_OFFSET:
/* currently only temperature */
*val = st->variant->temp_offset;
return IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
adis_dev_lock(&st->adis);
/* Need both the number of taps and the sampling frequency */
ret = __adis_read_reg_16(&st->adis,
ADIS16400_SENS_AVG,
&val16);
if (ret) {
adis_dev_unlock(&st->adis);
return ret;
}
ret = st->variant->get_freq(st);
adis_dev_unlock(&st->adis);
if (ret)
return ret;
ret /= adis16400_3db_divisors[val16 & 0x07];
*val = ret / 1000;
*val2 = (ret % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
adis_dev_lock(&st->adis);
ret = st->variant->get_freq(st);
adis_dev_unlock(&st->adis);
if (ret)
return ret;
*val = ret / 1000;
*val2 = (ret % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
#if IS_ENABLED(CONFIG_IIO_BUFFER)
static irqreturn_t adis16400_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adis16400_state *st = iio_priv(indio_dev);
struct adis *adis = &st->adis;
void *buffer;
int ret;
ret = spi_sync(adis->spi, &adis->msg);
if (ret)
dev_err(&adis->spi->dev, "Failed to read data: %d\n", ret);
if (st->variant->flags & ADIS16400_BURST_DIAG_STAT) {
buffer = adis->buffer + sizeof(u16);
/*
* The size here is always larger than, or equal to the true
* size of the channel data. This may result in a larger copy
* than necessary, but as the target buffer will be
* buffer->scan_bytes this will be safe.
*/
iio_push_to_buffers_with_ts_unaligned(indio_dev, buffer,
indio_dev->scan_bytes - sizeof(pf->timestamp),
pf->timestamp);
} else {
iio_push_to_buffers_with_timestamp(indio_dev,
adis->buffer,
pf->timestamp);
}
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
#else
#define adis16400_trigger_handler NULL
#endif /* IS_ENABLED(CONFIG_IIO_BUFFER) */
#define ADIS16400_VOLTAGE_CHAN(addr, bits, name, si, chn) { \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = chn, \
.extend_name = name, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (addr), \
.scan_index = (si), \
.scan_type = { \
.sign = 'u', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
#define ADIS16400_SUPPLY_CHAN(addr, bits) \
ADIS16400_VOLTAGE_CHAN(addr, bits, "supply", ADIS16400_SCAN_SUPPLY, 0)
#define ADIS16400_AUX_ADC_CHAN(addr, bits) \
ADIS16400_VOLTAGE_CHAN(addr, bits, NULL, ADIS16400_SCAN_ADC, 1)
#define ADIS16400_GYRO_CHAN(mod, addr, bits) { \
.type = IIO_ANGL_VEL, \
.modified = 1, \
.channel2 = IIO_MOD_ ## mod, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = addr, \
.scan_index = ADIS16400_SCAN_GYRO_ ## mod, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
#define ADIS16400_ACCEL_CHAN(mod, addr, bits) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_ ## mod, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (addr), \
.scan_index = ADIS16400_SCAN_ACC_ ## mod, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
#define ADIS16400_MAGN_CHAN(mod, addr, bits) { \
.type = IIO_MAGN, \
.modified = 1, \
.channel2 = IIO_MOD_ ## mod, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (addr), \
.scan_index = ADIS16400_SCAN_MAGN_ ## mod, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
#define ADIS16400_MOD_TEMP_NAME_X "x"
#define ADIS16400_MOD_TEMP_NAME_Y "y"
#define ADIS16400_MOD_TEMP_NAME_Z "z"
#define ADIS16400_MOD_TEMP_CHAN(mod, addr, bits) { \
.type = IIO_TEMP, \
.indexed = 1, \
.channel = 0, \
.extend_name = ADIS16400_MOD_TEMP_NAME_ ## mod, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_OFFSET) | \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_type = \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (addr), \
.scan_index = ADIS16350_SCAN_TEMP_ ## mod, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
#define ADIS16400_TEMP_CHAN(addr, bits) { \
.type = IIO_TEMP, \
.indexed = 1, \
.channel = 0, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_OFFSET) | \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (addr), \
.scan_index = ADIS16350_SCAN_TEMP_X, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
#define ADIS16400_INCLI_CHAN(mod, addr, bits) { \
.type = IIO_INCLI, \
.modified = 1, \
.channel2 = IIO_MOD_ ## mod, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (addr), \
.scan_index = ADIS16300_SCAN_INCLI_ ## mod, \
.scan_type = { \
.sign = 's', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec adis16400_channels[] = {
ADIS16400_SUPPLY_CHAN(ADIS16400_SUPPLY_OUT, 14),
ADIS16400_GYRO_CHAN(X, ADIS16400_XGYRO_OUT, 14),
ADIS16400_GYRO_CHAN(Y, ADIS16400_YGYRO_OUT, 14),
ADIS16400_GYRO_CHAN(Z, ADIS16400_ZGYRO_OUT, 14),
ADIS16400_ACCEL_CHAN(X, ADIS16400_XACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Y, ADIS16400_YACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Z, ADIS16400_ZACCL_OUT, 14),
ADIS16400_MAGN_CHAN(X, ADIS16400_XMAGN_OUT, 14),
ADIS16400_MAGN_CHAN(Y, ADIS16400_YMAGN_OUT, 14),
ADIS16400_MAGN_CHAN(Z, ADIS16400_ZMAGN_OUT, 14),
ADIS16400_TEMP_CHAN(ADIS16400_TEMP_OUT, 12),
ADIS16400_AUX_ADC_CHAN(ADIS16400_AUX_ADC, 12),
IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP),
};
static const struct iio_chan_spec adis16445_channels[] = {
ADIS16400_GYRO_CHAN(X, ADIS16400_XGYRO_OUT, 16),
ADIS16400_GYRO_CHAN(Y, ADIS16400_YGYRO_OUT, 16),
ADIS16400_GYRO_CHAN(Z, ADIS16400_ZGYRO_OUT, 16),
ADIS16400_ACCEL_CHAN(X, ADIS16400_XACCL_OUT, 16),
ADIS16400_ACCEL_CHAN(Y, ADIS16400_YACCL_OUT, 16),
ADIS16400_ACCEL_CHAN(Z, ADIS16400_ZACCL_OUT, 16),
ADIS16400_TEMP_CHAN(ADIS16448_TEMP_OUT, 12),
IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP),
};
static const struct iio_chan_spec adis16448_channels[] = {
ADIS16400_GYRO_CHAN(X, ADIS16400_XGYRO_OUT, 16),
ADIS16400_GYRO_CHAN(Y, ADIS16400_YGYRO_OUT, 16),
ADIS16400_GYRO_CHAN(Z, ADIS16400_ZGYRO_OUT, 16),
ADIS16400_ACCEL_CHAN(X, ADIS16400_XACCL_OUT, 16),
ADIS16400_ACCEL_CHAN(Y, ADIS16400_YACCL_OUT, 16),
ADIS16400_ACCEL_CHAN(Z, ADIS16400_ZACCL_OUT, 16),
ADIS16400_MAGN_CHAN(X, ADIS16400_XMAGN_OUT, 16),
ADIS16400_MAGN_CHAN(Y, ADIS16400_YMAGN_OUT, 16),
ADIS16400_MAGN_CHAN(Z, ADIS16400_ZMAGN_OUT, 16),
{
.type = IIO_PRESSURE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
.address = ADIS16448_BARO_OUT,
.scan_index = ADIS16400_SCAN_BARO,
.scan_type = {
.sign = 's',
.realbits = 16,
.storagebits = 16,
.endianness = IIO_BE,
},
},
ADIS16400_TEMP_CHAN(ADIS16448_TEMP_OUT, 12),
IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP),
};
static const struct iio_chan_spec adis16350_channels[] = {
ADIS16400_SUPPLY_CHAN(ADIS16400_SUPPLY_OUT, 12),
ADIS16400_GYRO_CHAN(X, ADIS16400_XGYRO_OUT, 14),
ADIS16400_GYRO_CHAN(Y, ADIS16400_YGYRO_OUT, 14),
ADIS16400_GYRO_CHAN(Z, ADIS16400_ZGYRO_OUT, 14),
ADIS16400_ACCEL_CHAN(X, ADIS16400_XACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Y, ADIS16400_YACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Z, ADIS16400_ZACCL_OUT, 14),
ADIS16400_MAGN_CHAN(X, ADIS16400_XMAGN_OUT, 14),
ADIS16400_MAGN_CHAN(Y, ADIS16400_YMAGN_OUT, 14),
ADIS16400_MAGN_CHAN(Z, ADIS16400_ZMAGN_OUT, 14),
ADIS16400_AUX_ADC_CHAN(ADIS16300_AUX_ADC, 12),
ADIS16400_MOD_TEMP_CHAN(X, ADIS16350_XTEMP_OUT, 12),
ADIS16400_MOD_TEMP_CHAN(Y, ADIS16350_YTEMP_OUT, 12),
ADIS16400_MOD_TEMP_CHAN(Z, ADIS16350_ZTEMP_OUT, 12),
IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP),
};
static const struct iio_chan_spec adis16300_channels[] = {
ADIS16400_SUPPLY_CHAN(ADIS16400_SUPPLY_OUT, 12),
ADIS16400_GYRO_CHAN(X, ADIS16400_XGYRO_OUT, 14),
ADIS16400_ACCEL_CHAN(X, ADIS16400_XACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Y, ADIS16400_YACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Z, ADIS16400_ZACCL_OUT, 14),
ADIS16400_TEMP_CHAN(ADIS16350_XTEMP_OUT, 12),
ADIS16400_AUX_ADC_CHAN(ADIS16300_AUX_ADC, 12),
ADIS16400_INCLI_CHAN(X, ADIS16300_PITCH_OUT, 13),
ADIS16400_INCLI_CHAN(Y, ADIS16300_ROLL_OUT, 13),
IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP),
};
static const struct iio_chan_spec adis16334_channels[] = {
ADIS16400_GYRO_CHAN(X, ADIS16400_XGYRO_OUT, 14),
ADIS16400_GYRO_CHAN(Y, ADIS16400_YGYRO_OUT, 14),
ADIS16400_GYRO_CHAN(Z, ADIS16400_ZGYRO_OUT, 14),
ADIS16400_ACCEL_CHAN(X, ADIS16400_XACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Y, ADIS16400_YACCL_OUT, 14),
ADIS16400_ACCEL_CHAN(Z, ADIS16400_ZACCL_OUT, 14),
ADIS16400_TEMP_CHAN(ADIS16350_XTEMP_OUT, 12),
IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP),
};
static const char * const adis16400_status_error_msgs[] = {
[ADIS16400_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
[ADIS16400_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
[ADIS16400_DIAG_STAT_XACCL_FAIL] = "X-axis accelerometer self-test failure",
[ADIS16400_DIAG_STAT_XGYRO_FAIL] = "X-axis gyroscope self-test failure",
[ADIS16400_DIAG_STAT_YGYRO_FAIL] = "Y-axis gyroscope self-test failure",
[ADIS16400_DIAG_STAT_ZGYRO_FAIL] = "Z-axis gyroscope self-test failure",
[ADIS16400_DIAG_STAT_ALARM2] = "Alarm 2 active",
[ADIS16400_DIAG_STAT_ALARM1] = "Alarm 1 active",
[ADIS16400_DIAG_STAT_FLASH_CHK] = "Flash checksum error",
[ADIS16400_DIAG_STAT_SELF_TEST] = "Self test error",
[ADIS16400_DIAG_STAT_OVERFLOW] = "Sensor overrange",
[ADIS16400_DIAG_STAT_SPI_FAIL] = "SPI failure",
[ADIS16400_DIAG_STAT_FLASH_UPT] = "Flash update failed",
[ADIS16400_DIAG_STAT_POWER_HIGH] = "Power supply above 5.25V",
[ADIS16400_DIAG_STAT_POWER_LOW] = "Power supply below 4.75V",
};
#define ADIS16400_DATA(_timeouts, _burst_len) \
{ \
.msc_ctrl_reg = ADIS16400_MSC_CTRL, \
.glob_cmd_reg = ADIS16400_GLOB_CMD, \
.diag_stat_reg = ADIS16400_DIAG_STAT, \
.read_delay = 50, \
.write_delay = 50, \
.self_test_mask = ADIS16400_MSC_CTRL_MEM_TEST, \
.self_test_reg = ADIS16400_MSC_CTRL, \
.status_error_msgs = adis16400_status_error_msgs, \
.status_error_mask = BIT(ADIS16400_DIAG_STAT_ZACCL_FAIL) | \
BIT(ADIS16400_DIAG_STAT_YACCL_FAIL) | \
BIT(ADIS16400_DIAG_STAT_XACCL_FAIL) | \
BIT(ADIS16400_DIAG_STAT_XGYRO_FAIL) | \
BIT(ADIS16400_DIAG_STAT_YGYRO_FAIL) | \
BIT(ADIS16400_DIAG_STAT_ZGYRO_FAIL) | \
BIT(ADIS16400_DIAG_STAT_ALARM2) | \
BIT(ADIS16400_DIAG_STAT_ALARM1) | \
BIT(ADIS16400_DIAG_STAT_FLASH_CHK) | \
BIT(ADIS16400_DIAG_STAT_SELF_TEST) | \
BIT(ADIS16400_DIAG_STAT_OVERFLOW) | \
BIT(ADIS16400_DIAG_STAT_SPI_FAIL) | \
BIT(ADIS16400_DIAG_STAT_FLASH_UPT) | \
BIT(ADIS16400_DIAG_STAT_POWER_HIGH) | \
BIT(ADIS16400_DIAG_STAT_POWER_LOW), \
.timeouts = (_timeouts), \
.burst_reg_cmd = ADIS16400_GLOB_CMD, \
.burst_len = (_burst_len), \
.burst_max_speed_hz = ADIS16400_SPI_BURST \
}
static const struct adis_timeout adis16300_timeouts = {
.reset_ms = ADIS16400_STARTUP_DELAY,
.sw_reset_ms = ADIS16400_STARTUP_DELAY,
.self_test_ms = ADIS16400_STARTUP_DELAY,
};
static const struct adis_timeout adis16334_timeouts = {
.reset_ms = 60,
.sw_reset_ms = 60,
.self_test_ms = 14,
};
static const struct adis_timeout adis16362_timeouts = {
.reset_ms = 130,
.sw_reset_ms = 130,
.self_test_ms = 12,
};
static const struct adis_timeout adis16400_timeouts = {
.reset_ms = 170,
.sw_reset_ms = 170,
.self_test_ms = 12,
};
static const struct adis_timeout adis16445_timeouts = {
.reset_ms = 55,
.sw_reset_ms = 55,
.self_test_ms = 16,
};
static const struct adis_timeout adis16448_timeouts = {
.reset_ms = 90,
.sw_reset_ms = 90,
.self_test_ms = 45,
};
static struct adis16400_chip_info adis16400_chips[] = {
[ADIS16300] = {
.channels = adis16300_channels,
.num_channels = ARRAY_SIZE(adis16300_channels),
.flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE |
ADIS16400_HAS_SERIAL_NUMBER,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
.accel_scale_micro = 5884,
.temp_scale_nano = 140000000, /* 0.14 C */
.temp_offset = 25000000 / 140000, /* 25 C = 0x00 */
.set_freq = adis16400_set_freq,
.get_freq = adis16400_get_freq,
.adis_data = ADIS16400_DATA(&adis16300_timeouts, 18),
},
[ADIS16334] = {
.channels = adis16334_channels,
.num_channels = ARRAY_SIZE(adis16334_channels),
.flags = ADIS16400_HAS_PROD_ID | ADIS16400_NO_BURST |
ADIS16400_HAS_SERIAL_NUMBER,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
.temp_scale_nano = 67850000, /* 0.06785 C */
.temp_offset = 25000000 / 67850, /* 25 C = 0x00 */
.set_freq = adis16334_set_freq,
.get_freq = adis16334_get_freq,
.adis_data = ADIS16400_DATA(&adis16334_timeouts, 0),
},
[ADIS16350] = {
.channels = adis16350_channels,
.num_channels = ARRAY_SIZE(adis16350_channels),
.gyro_scale_micro = IIO_DEGREE_TO_RAD(73260), /* 0.07326 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(2522), /* 0.002522 g */
.temp_scale_nano = 145300000, /* 0.1453 C */
.temp_offset = 25000000 / 145300, /* 25 C = 0x00 */
.flags = ADIS16400_NO_BURST | ADIS16400_HAS_SLOW_MODE,
.set_freq = adis16400_set_freq,
.get_freq = adis16400_get_freq,
.adis_data = ADIS16400_DATA(&adis16300_timeouts, 0),
},
[ADIS16360] = {
.channels = adis16350_channels,
.num_channels = ARRAY_SIZE(adis16350_channels),
.flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE |
ADIS16400_HAS_SERIAL_NUMBER,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
.temp_scale_nano = 136000000, /* 0.136 C */
.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
.set_freq = adis16400_set_freq,
.get_freq = adis16400_get_freq,
.adis_data = ADIS16400_DATA(&adis16300_timeouts, 28),
},
[ADIS16362] = {
.channels = adis16350_channels,
.num_channels = ARRAY_SIZE(adis16350_channels),
.flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE |
ADIS16400_HAS_SERIAL_NUMBER,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(333), /* 0.333 mg */
.temp_scale_nano = 136000000, /* 0.136 C */
.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
.set_freq = adis16400_set_freq,
.get_freq = adis16400_get_freq,
.adis_data = ADIS16400_DATA(&adis16362_timeouts, 28),
},
[ADIS16364] = {
.channels = adis16350_channels,
.num_channels = ARRAY_SIZE(adis16350_channels),
.flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE |
ADIS16400_HAS_SERIAL_NUMBER,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(1000), /* 1 mg */
.temp_scale_nano = 136000000, /* 0.136 C */
.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
.set_freq = adis16400_set_freq,
.get_freq = adis16400_get_freq,
.adis_data = ADIS16400_DATA(&adis16362_timeouts, 28),
},
[ADIS16367] = {
.channels = adis16350_channels,
.num_channels = ARRAY_SIZE(adis16350_channels),
.flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE |
ADIS16400_HAS_SERIAL_NUMBER,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(2000), /* 0.2 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
.temp_scale_nano = 136000000, /* 0.136 C */
.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
.set_freq = adis16400_set_freq,
.get_freq = adis16400_get_freq,
.adis_data = ADIS16400_DATA(&adis16300_timeouts, 28),
},
[ADIS16400] = {
.channels = adis16400_channels,
.num_channels = ARRAY_SIZE(adis16400_channels),
.flags = ADIS16400_HAS_PROD_ID | ADIS16400_HAS_SLOW_MODE,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(50000), /* 0.05 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(3333), /* 3.333 mg */
.temp_scale_nano = 140000000, /* 0.14 C */
.temp_offset = 25000000 / 140000, /* 25 C = 0x00 */
.set_freq = adis16400_set_freq,
.get_freq = adis16400_get_freq,
.adis_data = ADIS16400_DATA(&adis16400_timeouts, 24),
},
[ADIS16445] = {
.channels = adis16445_channels,
.num_channels = ARRAY_SIZE(adis16445_channels),
.flags = ADIS16400_HAS_PROD_ID |
ADIS16400_HAS_SERIAL_NUMBER |
ADIS16400_BURST_DIAG_STAT,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(10000), /* 0.01 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(250), /* 1/4000 g */
.temp_scale_nano = 73860000, /* 0.07386 C */
.temp_offset = 31000000 / 73860, /* 31 C = 0x00 */
.set_freq = adis16334_set_freq,
.get_freq = adis16334_get_freq,
.adis_data = ADIS16400_DATA(&adis16445_timeouts, 16),
},
[ADIS16448] = {
.channels = adis16448_channels,
.num_channels = ARRAY_SIZE(adis16448_channels),
.flags = ADIS16400_HAS_PROD_ID |
ADIS16400_HAS_SERIAL_NUMBER |
ADIS16400_BURST_DIAG_STAT,
.gyro_scale_micro = IIO_DEGREE_TO_RAD(40000), /* 0.04 deg/s */
.accel_scale_micro = IIO_G_TO_M_S_2(833), /* 1/1200 g */
.temp_scale_nano = 73860000, /* 0.07386 C */
.temp_offset = 31000000 / 73860, /* 31 C = 0x00 */
.set_freq = adis16334_set_freq,
.get_freq = adis16334_get_freq,
.adis_data = ADIS16400_DATA(&adis16448_timeouts, 24),
}
};
static const struct iio_info adis16400_info = {
.read_raw = &adis16400_read_raw,
.write_raw = &adis16400_write_raw,
.update_scan_mode = adis_update_scan_mode,
.debugfs_reg_access = adis_debugfs_reg_access,
};
static void adis16400_setup_chan_mask(struct adis16400_state *st)
{
const struct adis16400_chip_info *chip_info = st->variant;
unsigned int i;
for (i = 0; i < chip_info->num_channels; i++) {
const struct iio_chan_spec *ch = &chip_info->channels[i];
if (ch->scan_index >= 0 &&
ch->scan_index != ADIS16400_SCAN_TIMESTAMP)
st->avail_scan_mask[0] |= BIT(ch->scan_index);
}
}
static void adis16400_stop(void *data)
{
adis16400_stop_device(data);
}
static int adis16400_probe(struct spi_device *spi)
{
struct adis16400_state *st;
struct iio_dev *indio_dev;
int ret;
const struct adis_data *adis16400_data;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (indio_dev == NULL)
return -ENOMEM;
st = iio_priv(indio_dev);
/* setup the industrialio driver allocated elements */
st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data];
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->channels = st->variant->channels;
indio_dev->num_channels = st->variant->num_channels;
indio_dev->info = &adis16400_info;
indio_dev->modes = INDIO_DIRECT_MODE;
if (!(st->variant->flags & ADIS16400_NO_BURST)) {
adis16400_setup_chan_mask(st);
indio_dev->available_scan_masks = st->avail_scan_mask;
}
adis16400_data = &st->variant->adis_data;
ret = adis_init(&st->adis, indio_dev, spi, adis16400_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, adis16400_trigger_handler);
if (ret)
return ret;
/* Get the device into a sane initial state */
ret = adis16400_initial_setup(indio_dev);
if (ret)
return ret;
ret = devm_add_action_or_reset(&spi->dev, adis16400_stop, indio_dev);
if (ret)
return ret;
ret = devm_iio_device_register(&spi->dev, indio_dev);
if (ret)
return ret;
adis16400_debugfs_init(indio_dev);
return 0;
}
static const struct spi_device_id adis16400_id[] = {
{"adis16300", ADIS16300},
{"adis16305", ADIS16300},
{"adis16334", ADIS16334},
{"adis16350", ADIS16350},
{"adis16354", ADIS16350},
{"adis16355", ADIS16350},
{"adis16360", ADIS16360},
{"adis16362", ADIS16362},
{"adis16364", ADIS16364},
{"adis16365", ADIS16360},
{"adis16367", ADIS16367},
{"adis16400", ADIS16400},
{"adis16405", ADIS16400},
{"adis16445", ADIS16445},
{"adis16448", ADIS16448},
{}
};
MODULE_DEVICE_TABLE(spi, adis16400_id);
static struct spi_driver adis16400_driver = {
.driver = {
.name = "adis16400",
},
.id_table = adis16400_id,
.probe = adis16400_probe,
};
module_spi_driver(adis16400_driver);
MODULE_AUTHOR("Manuel Stahl <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/imu/adis16400.c |
// SPDX-License-Identifier: GPL-2.0
/*
* FXOS8700 - NXP IMU (accelerometer plus magnetometer)
*
* IIO core driver for FXOS8700, with support for I2C/SPI busses
*
* TODO: Buffer, trigger, and IRQ support
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/acpi.h>
#include <linux/bitops.h>
#include <linux/bitfield.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include "fxos8700.h"
/* Register Definitions */
#define FXOS8700_STATUS 0x00
#define FXOS8700_OUT_X_MSB 0x01
#define FXOS8700_OUT_X_LSB 0x02
#define FXOS8700_OUT_Y_MSB 0x03
#define FXOS8700_OUT_Y_LSB 0x04
#define FXOS8700_OUT_Z_MSB 0x05
#define FXOS8700_OUT_Z_LSB 0x06
#define FXOS8700_F_SETUP 0x09
#define FXOS8700_TRIG_CFG 0x0a
#define FXOS8700_SYSMOD 0x0b
#define FXOS8700_INT_SOURCE 0x0c
#define FXOS8700_WHO_AM_I 0x0d
#define FXOS8700_XYZ_DATA_CFG 0x0e
#define FXOS8700_HP_FILTER_CUTOFF 0x0f
#define FXOS8700_PL_STATUS 0x10
#define FXOS8700_PL_CFG 0x11
#define FXOS8700_PL_COUNT 0x12
#define FXOS8700_PL_BF_ZCOMP 0x13
#define FXOS8700_PL_THS_REG 0x14
#define FXOS8700_A_FFMT_CFG 0x15
#define FXOS8700_A_FFMT_SRC 0x16
#define FXOS8700_A_FFMT_THS 0x17
#define FXOS8700_A_FFMT_COUNT 0x18
#define FXOS8700_TRANSIENT_CFG 0x1d
#define FXOS8700_TRANSIENT_SRC 0x1e
#define FXOS8700_TRANSIENT_THS 0x1f
#define FXOS8700_TRANSIENT_COUNT 0x20
#define FXOS8700_PULSE_CFG 0x21
#define FXOS8700_PULSE_SRC 0x22
#define FXOS8700_PULSE_THSX 0x23
#define FXOS8700_PULSE_THSY 0x24
#define FXOS8700_PULSE_THSZ 0x25
#define FXOS8700_PULSE_TMLT 0x26
#define FXOS8700_PULSE_LTCY 0x27
#define FXOS8700_PULSE_WIND 0x28
#define FXOS8700_ASLP_COUNT 0x29
#define FXOS8700_CTRL_REG1 0x2a
#define FXOS8700_CTRL_REG2 0x2b
#define FXOS8700_CTRL_REG3 0x2c
#define FXOS8700_CTRL_REG4 0x2d
#define FXOS8700_CTRL_REG5 0x2e
#define FXOS8700_OFF_X 0x2f
#define FXOS8700_OFF_Y 0x30
#define FXOS8700_OFF_Z 0x31
#define FXOS8700_M_DR_STATUS 0x32
#define FXOS8700_M_OUT_X_MSB 0x33
#define FXOS8700_M_OUT_X_LSB 0x34
#define FXOS8700_M_OUT_Y_MSB 0x35
#define FXOS8700_M_OUT_Y_LSB 0x36
#define FXOS8700_M_OUT_Z_MSB 0x37
#define FXOS8700_M_OUT_Z_LSB 0x38
#define FXOS8700_CMP_X_MSB 0x39
#define FXOS8700_CMP_X_LSB 0x3a
#define FXOS8700_CMP_Y_MSB 0x3b
#define FXOS8700_CMP_Y_LSB 0x3c
#define FXOS8700_CMP_Z_MSB 0x3d
#define FXOS8700_CMP_Z_LSB 0x3e
#define FXOS8700_M_OFF_X_MSB 0x3f
#define FXOS8700_M_OFF_X_LSB 0x40
#define FXOS8700_M_OFF_Y_MSB 0x41
#define FXOS8700_M_OFF_Y_LSB 0x42
#define FXOS8700_M_OFF_Z_MSB 0x43
#define FXOS8700_M_OFF_Z_LSB 0x44
#define FXOS8700_MAX_X_MSB 0x45
#define FXOS8700_MAX_X_LSB 0x46
#define FXOS8700_MAX_Y_MSB 0x47
#define FXOS8700_MAX_Y_LSB 0x48
#define FXOS8700_MAX_Z_MSB 0x49
#define FXOS8700_MAX_Z_LSB 0x4a
#define FXOS8700_MIN_X_MSB 0x4b
#define FXOS8700_MIN_X_LSB 0x4c
#define FXOS8700_MIN_Y_MSB 0x4d
#define FXOS8700_MIN_Y_LSB 0x4e
#define FXOS8700_MIN_Z_MSB 0x4f
#define FXOS8700_MIN_Z_LSB 0x50
#define FXOS8700_TEMP 0x51
#define FXOS8700_M_THS_CFG 0x52
#define FXOS8700_M_THS_SRC 0x53
#define FXOS8700_M_THS_X_MSB 0x54
#define FXOS8700_M_THS_X_LSB 0x55
#define FXOS8700_M_THS_Y_MSB 0x56
#define FXOS8700_M_THS_Y_LSB 0x57
#define FXOS8700_M_THS_Z_MSB 0x58
#define FXOS8700_M_THS_Z_LSB 0x59
#define FXOS8700_M_THS_COUNT 0x5a
#define FXOS8700_M_CTRL_REG1 0x5b
#define FXOS8700_M_CTRL_REG2 0x5c
#define FXOS8700_M_CTRL_REG3 0x5d
#define FXOS8700_M_INT_SRC 0x5e
#define FXOS8700_A_VECM_CFG 0x5f
#define FXOS8700_A_VECM_THS_MSB 0x60
#define FXOS8700_A_VECM_THS_LSB 0x61
#define FXOS8700_A_VECM_CNT 0x62
#define FXOS8700_A_VECM_INITX_MSB 0x63
#define FXOS8700_A_VECM_INITX_LSB 0x64
#define FXOS8700_A_VECM_INITY_MSB 0x65
#define FXOS8700_A_VECM_INITY_LSB 0x66
#define FXOS8700_A_VECM_INITZ_MSB 0x67
#define FXOS8700_A_VECM_INITZ_LSB 0x68
#define FXOS8700_M_VECM_CFG 0x69
#define FXOS8700_M_VECM_THS_MSB 0x6a
#define FXOS8700_M_VECM_THS_LSB 0x6b
#define FXOS8700_M_VECM_CNT 0x6c
#define FXOS8700_M_VECM_INITX_MSB 0x6d
#define FXOS8700_M_VECM_INITX_LSB 0x6e
#define FXOS8700_M_VECM_INITY_MSB 0x6f
#define FXOS8700_M_VECM_INITY_LSB 0x70
#define FXOS8700_M_VECM_INITZ_MSB 0x71
#define FXOS8700_M_VECM_INITZ_LSB 0x72
#define FXOS8700_A_FFMT_THS_X_MSB 0x73
#define FXOS8700_A_FFMT_THS_X_LSB 0x74
#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
#define FXOS8700_A_TRAN_INIT_MSB 0x79
#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
#define FXOS8700_TM_NVM_LOCK 0x7e
#define FXOS8700_NVM_DATA0_35 0x80
#define FXOS8700_NVM_DATA_BNK3 0xa4
#define FXOS8700_NVM_DATA_BNK2 0xa5
#define FXOS8700_NVM_DATA_BNK1 0xa6
#define FXOS8700_NVM_DATA_BNK0 0xa7
/* Bit definitions for FXOS8700_CTRL_REG1 */
#define FXOS8700_CTRL_ODR_MAX 0x00
#define FXOS8700_CTRL_ODR_MSK GENMASK(5, 3)
/* Bit definitions for FXOS8700_M_CTRL_REG1 */
#define FXOS8700_HMS_MASK GENMASK(1, 0)
#define FXOS8700_OS_MASK GENMASK(4, 2)
/* Bit definitions for FXOS8700_M_CTRL_REG2 */
#define FXOS8700_MAXMIN_RST BIT(2)
#define FXOS8700_MAXMIN_DIS_THS BIT(3)
#define FXOS8700_MAXMIN_DIS BIT(4)
#define FXOS8700_ACTIVE 0x01
#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */
#define FXOS8700_DEVICE_ID 0xC7
#define FXOS8700_PRE_DEVICE_ID 0xC4
#define FXOS8700_DATA_BUF_SIZE 3
struct fxos8700_data {
struct regmap *regmap;
struct iio_trigger *trig;
__be16 buf[FXOS8700_DATA_BUF_SIZE] __aligned(IIO_DMA_MINALIGN);
};
/* Regmap info */
static const struct regmap_range read_range[] = {
{
.range_min = FXOS8700_STATUS,
.range_max = FXOS8700_A_FFMT_COUNT,
}, {
.range_min = FXOS8700_TRANSIENT_CFG,
.range_max = FXOS8700_A_FFMT_THS_Z_LSB,
},
};
static const struct regmap_range write_range[] = {
{
.range_min = FXOS8700_F_SETUP,
.range_max = FXOS8700_TRIG_CFG,
}, {
.range_min = FXOS8700_XYZ_DATA_CFG,
.range_max = FXOS8700_HP_FILTER_CUTOFF,
}, {
.range_min = FXOS8700_PL_CFG,
.range_max = FXOS8700_A_FFMT_CFG,
}, {
.range_min = FXOS8700_A_FFMT_THS,
.range_max = FXOS8700_TRANSIENT_CFG,
}, {
.range_min = FXOS8700_TRANSIENT_THS,
.range_max = FXOS8700_PULSE_CFG,
}, {
.range_min = FXOS8700_PULSE_THSX,
.range_max = FXOS8700_OFF_Z,
}, {
.range_min = FXOS8700_M_OFF_X_MSB,
.range_max = FXOS8700_M_OFF_Z_LSB,
}, {
.range_min = FXOS8700_M_THS_CFG,
.range_max = FXOS8700_M_THS_CFG,
}, {
.range_min = FXOS8700_M_THS_X_MSB,
.range_max = FXOS8700_M_CTRL_REG3,
}, {
.range_min = FXOS8700_A_VECM_CFG,
.range_max = FXOS8700_A_FFMT_THS_Z_LSB,
},
};
static const struct regmap_access_table driver_read_table = {
.yes_ranges = read_range,
.n_yes_ranges = ARRAY_SIZE(read_range),
};
static const struct regmap_access_table driver_write_table = {
.yes_ranges = write_range,
.n_yes_ranges = ARRAY_SIZE(write_range),
};
const struct regmap_config fxos8700_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = FXOS8700_NVM_DATA_BNK0,
.rd_table = &driver_read_table,
.wr_table = &driver_write_table,
};
EXPORT_SYMBOL(fxos8700_regmap_config);
#define FXOS8700_CHANNEL(_type, _axis) { \
.type = _type, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
}
enum fxos8700_accel_scale_bits {
MODE_2G = 0,
MODE_4G,
MODE_8G,
};
/* scan indexes follow DATA register order */
enum fxos8700_scan_axis {
FXOS8700_SCAN_ACCEL_X = 0,
FXOS8700_SCAN_ACCEL_Y,
FXOS8700_SCAN_ACCEL_Z,
FXOS8700_SCAN_MAGN_X,
FXOS8700_SCAN_MAGN_Y,
FXOS8700_SCAN_MAGN_Z,
FXOS8700_SCAN_RHALL,
FXOS8700_SCAN_TIMESTAMP,
};
enum fxos8700_sensor {
FXOS8700_ACCEL = 0,
FXOS8700_MAGN,
FXOS8700_NUM_SENSORS /* must be last */
};
enum fxos8700_int_pin {
FXOS8700_PIN_INT1,
FXOS8700_PIN_INT2
};
struct fxos8700_scale {
u8 bits;
int uscale;
};
struct fxos8700_odr {
u8 bits;
int odr;
int uodr;
};
static const struct fxos8700_scale fxos8700_accel_scale[] = {
{ MODE_2G, 244},
{ MODE_4G, 488},
{ MODE_8G, 976},
};
/*
* Accellerometer and magnetometer have the same ODR options, set in the
* CTRL_REG1 register. ODR is halved when using both sensors at once in
* hybrid mode.
*/
static const struct fxos8700_odr fxos8700_odr[] = {
{0x00, 800, 0},
{0x01, 400, 0},
{0x02, 200, 0},
{0x03, 100, 0},
{0x04, 50, 0},
{0x05, 12, 500000},
{0x06, 6, 250000},
{0x07, 1, 562500},
};
static const struct iio_chan_spec fxos8700_channels[] = {
FXOS8700_CHANNEL(IIO_ACCEL, X),
FXOS8700_CHANNEL(IIO_ACCEL, Y),
FXOS8700_CHANNEL(IIO_ACCEL, Z),
FXOS8700_CHANNEL(IIO_MAGN, X),
FXOS8700_CHANNEL(IIO_MAGN, Y),
FXOS8700_CHANNEL(IIO_MAGN, Z),
IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
};
static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
{
switch (iio_type) {
case IIO_ACCEL:
return FXOS8700_ACCEL;
case IIO_MAGN:
return FXOS8700_MAGN;
default:
return -EINVAL;
}
}
static int fxos8700_set_active_mode(struct fxos8700_data *data,
enum fxos8700_sensor t, bool mode)
{
int ret;
ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
if (ret)
return ret;
usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
FXOS8700_ACTIVE_MIN_USLEEP + 1000);
return 0;
}
static int fxos8700_set_scale(struct fxos8700_data *data,
enum fxos8700_sensor t, int uscale)
{
int i, ret, val;
bool active_mode;
static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
struct device *dev = regmap_get_device(data->regmap);
if (t == FXOS8700_MAGN) {
dev_err(dev, "Magnetometer scale is locked at 0.001Gs\n");
return -EINVAL;
}
/*
* When device is in active mode, it failed to set an ACCEL
* full-scale range(2g/4g/8g) in FXOS8700_XYZ_DATA_CFG.
* This is not align with the datasheet, but it is a fxos8700
* chip behavier. Set the device in standby mode before setting
* an ACCEL full-scale range.
*/
ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
if (ret)
return ret;
active_mode = val & FXOS8700_ACTIVE;
if (active_mode) {
ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
val & ~FXOS8700_ACTIVE);
if (ret)
return ret;
}
for (i = 0; i < scale_num; i++)
if (fxos8700_accel_scale[i].uscale == uscale)
break;
if (i == scale_num)
return -EINVAL;
ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
fxos8700_accel_scale[i].bits);
if (ret)
return ret;
return regmap_write(data->regmap, FXOS8700_CTRL_REG1,
active_mode);
}
static int fxos8700_get_scale(struct fxos8700_data *data,
enum fxos8700_sensor t, int *uscale)
{
int i, ret, val;
static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
if (t == FXOS8700_MAGN) {
*uscale = 1000; /* Magnetometer is locked at 0.001Gs */
return 0;
}
ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
if (ret)
return ret;
for (i = 0; i < scale_num; i++) {
if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
*uscale = fxos8700_accel_scale[i].uscale;
return 0;
}
}
return -EINVAL;
}
static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
int axis, int *val)
{
u8 base, reg;
s16 tmp;
int ret;
/*
* Different register base addresses varies with channel types.
* This bug hasn't been noticed before because using an enum is
* really hard to read. Use an a switch statement to take over that.
*/
switch (chan_type) {
case IIO_ACCEL:
base = FXOS8700_OUT_X_MSB;
break;
case IIO_MAGN:
base = FXOS8700_M_OUT_X_MSB;
break;
default:
return -EINVAL;
}
/* Block read 6 bytes of device output registers to avoid data loss */
ret = regmap_bulk_read(data->regmap, base, data->buf,
sizeof(data->buf));
if (ret)
return ret;
/* Convert axis to buffer index */
reg = axis - IIO_MOD_X;
/*
* Convert to native endianness. The accel data and magn data
* are signed, so a forced type conversion is needed.
*/
tmp = be16_to_cpu(data->buf[reg]);
/*
* ACCEL output data registers contain the X-axis, Y-axis, and Z-axis
* 14-bit left-justified sample data and MAGN output data registers
* contain the X-axis, Y-axis, and Z-axis 16-bit sample data. Apply
* a signed 2 bits right shift to the readback raw data from ACCEL
* output data register and keep that from MAGN sensor as the origin.
* Value should be extended to 32 bit.
*/
switch (chan_type) {
case IIO_ACCEL:
tmp = tmp >> 2;
break;
case IIO_MAGN:
/* Nothing to do */
break;
default:
return -EINVAL;
}
/* Convert to native endianness */
*val = sign_extend32(tmp, 15);
return 0;
}
static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
int odr, int uodr)
{
int i, ret, val;
bool active_mode;
static const int odr_num = ARRAY_SIZE(fxos8700_odr);
ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
if (ret)
return ret;
active_mode = val & FXOS8700_ACTIVE;
if (active_mode) {
/*
* The device must be in standby mode to change any of the
* other fields within CTRL_REG1
*/
ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
val & ~FXOS8700_ACTIVE);
if (ret)
return ret;
}
for (i = 0; i < odr_num; i++)
if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
break;
if (i >= odr_num)
return -EINVAL;
val &= ~FXOS8700_CTRL_ODR_MSK;
val |= FIELD_PREP(FXOS8700_CTRL_ODR_MSK, fxos8700_odr[i].bits) | FXOS8700_ACTIVE;
return regmap_write(data->regmap, FXOS8700_CTRL_REG1, val);
}
static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
int *odr, int *uodr)
{
int i, val, ret;
static const int odr_num = ARRAY_SIZE(fxos8700_odr);
ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
if (ret)
return ret;
val = FIELD_GET(FXOS8700_CTRL_ODR_MSK, val);
for (i = 0; i < odr_num; i++)
if (val == fxos8700_odr[i].bits)
break;
if (i >= odr_num)
return -EINVAL;
*odr = fxos8700_odr[i].odr;
*uodr = fxos8700_odr[i].uodr;
return 0;
}
static int fxos8700_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret;
struct fxos8700_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
val2);
return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
val, val2);
return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int fxos8700_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct fxos8700_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
val2);
case IIO_CHAN_INFO_SAMP_FREQ:
return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
val, val2);
default:
return -EINVAL;
}
}
static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
"1.5625 6.25 12.5 50 100 200 400 800");
static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
"1.5625 6.25 12.5 50 100 200 400 800");
static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
static IIO_CONST_ATTR(in_magn_scale_available, "0.001000");
static struct attribute *fxos8700_attrs[] = {
&iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_const_attr_in_magn_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group fxos8700_attrs_group = {
.attrs = fxos8700_attrs,
};
static const struct iio_info fxos8700_info = {
.read_raw = fxos8700_read_raw,
.write_raw = fxos8700_write_raw,
.attrs = &fxos8700_attrs_group,
};
static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
{
int ret;
unsigned int val;
struct device *dev = regmap_get_device(data->regmap);
ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
if (ret) {
dev_err(dev, "Error reading chip id\n");
return ret;
}
if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
return -ENODEV;
}
ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
if (ret)
return ret;
ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
if (ret)
return ret;
/*
* The device must be in standby mode to change any of the other fields
* within CTRL_REG1
*/
ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
if (ret)
return ret;
/* Set max oversample ratio (OSR) and both devices active */
ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
if (ret)
return ret;
/* Disable and rst min/max measurements & threshold */
ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
FXOS8700_MAXMIN_DIS);
if (ret)
return ret;
/*
* Set max full-scale range (+/-8G) for ACCEL sensor in chip
* initialization then activate the device.
*/
ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
if (ret)
return ret;
/* Max ODR (800Hz individual or 400Hz hybrid), active mode */
return regmap_update_bits(data->regmap, FXOS8700_CTRL_REG1,
FXOS8700_CTRL_ODR_MSK | FXOS8700_ACTIVE,
FIELD_PREP(FXOS8700_CTRL_ODR_MSK, FXOS8700_CTRL_ODR_MAX) |
FXOS8700_ACTIVE);
}
static void fxos8700_chip_uninit(void *data)
{
struct fxos8700_data *fxos8700_data = data;
fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
}
int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
const char *name, bool use_spi)
{
struct iio_dev *indio_dev;
struct fxos8700_data *data;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->regmap = regmap;
ret = fxos8700_chip_init(data, use_spi);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
if (ret)
return ret;
indio_dev->channels = fxos8700_channels;
indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
indio_dev->name = name ? name : "fxos8700";
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &fxos8700_info;
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_GPL(fxos8700_core_probe);
MODULE_AUTHOR("Robert Jones <[email protected]>");
MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/imu/fxos8700_core.c |
// SPDX-License-Identifier: GPL-2.0
/*
* ADIS16475 IMU driver
*
* Copyright 2019 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/irq.h>
#include <linux/lcm.h>
#include <linux/math.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/property.h>
#include <linux/spi/spi.h>
#define ADIS16475_REG_DIAG_STAT 0x02
#define ADIS16475_REG_X_GYRO_L 0x04
#define ADIS16475_REG_Y_GYRO_L 0x08
#define ADIS16475_REG_Z_GYRO_L 0x0C
#define ADIS16475_REG_X_ACCEL_L 0x10
#define ADIS16475_REG_Y_ACCEL_L 0x14
#define ADIS16475_REG_Z_ACCEL_L 0x18
#define ADIS16475_REG_TEMP_OUT 0x1c
#define ADIS16475_REG_X_GYRO_BIAS_L 0x40
#define ADIS16475_REG_Y_GYRO_BIAS_L 0x44
#define ADIS16475_REG_Z_GYRO_BIAS_L 0x48
#define ADIS16475_REG_X_ACCEL_BIAS_L 0x4c
#define ADIS16475_REG_Y_ACCEL_BIAS_L 0x50
#define ADIS16475_REG_Z_ACCEL_BIAS_L 0x54
#define ADIS16475_REG_FILT_CTRL 0x5c
#define ADIS16475_FILT_CTRL_MASK GENMASK(2, 0)
#define ADIS16475_FILT_CTRL(x) FIELD_PREP(ADIS16475_FILT_CTRL_MASK, x)
#define ADIS16475_REG_MSG_CTRL 0x60
#define ADIS16475_MSG_CTRL_DR_POL_MASK BIT(0)
#define ADIS16475_MSG_CTRL_DR_POL(x) \
FIELD_PREP(ADIS16475_MSG_CTRL_DR_POL_MASK, x)
#define ADIS16475_SYNC_MODE_MASK GENMASK(4, 2)
#define ADIS16475_SYNC_MODE(x) FIELD_PREP(ADIS16475_SYNC_MODE_MASK, x)
#define ADIS16475_REG_UP_SCALE 0x62
#define ADIS16475_REG_DEC_RATE 0x64
#define ADIS16475_REG_GLOB_CMD 0x68
#define ADIS16475_REG_FIRM_REV 0x6c
#define ADIS16475_REG_FIRM_DM 0x6e
#define ADIS16475_REG_FIRM_Y 0x70
#define ADIS16475_REG_PROD_ID 0x72
#define ADIS16475_REG_SERIAL_NUM 0x74
#define ADIS16475_REG_FLASH_CNT 0x7c
#define ADIS16500_BURST32_MASK BIT(9)
#define ADIS16500_BURST32(x) FIELD_PREP(ADIS16500_BURST32_MASK, x)
/* number of data elements in burst mode */
#define ADIS16475_BURST32_MAX_DATA 32
#define ADIS16475_BURST_MAX_DATA 20
#define ADIS16475_MAX_SCAN_DATA 20
/* spi max speed in brust mode */
#define ADIS16475_BURST_MAX_SPEED 1000000
#define ADIS16475_LSB_DEC_MASK BIT(0)
#define ADIS16475_LSB_FIR_MASK BIT(1)
enum {
ADIS16475_SYNC_DIRECT = 1,
ADIS16475_SYNC_SCALED,
ADIS16475_SYNC_OUTPUT,
ADIS16475_SYNC_PULSE = 5,
};
struct adis16475_sync {
u16 sync_mode;
u16 min_rate;
u16 max_rate;
};
struct adis16475_chip_info {
const struct iio_chan_spec *channels;
const struct adis16475_sync *sync;
const struct adis_data adis_data;
const char *name;
u32 num_channels;
u32 gyro_max_val;
u32 gyro_max_scale;
u32 accel_max_val;
u32 accel_max_scale;
u32 temp_scale;
u32 int_clk;
u16 max_dec;
u8 num_sync;
bool has_burst32;
};
struct adis16475 {
const struct adis16475_chip_info *info;
struct adis adis;
u32 clk_freq;
bool burst32;
unsigned long lsb_flag;
u16 sync_mode;
/* Alignment needed for the timestamp */
__be16 data[ADIS16475_MAX_SCAN_DATA] __aligned(8);
};
enum {
ADIS16475_SCAN_GYRO_X,
ADIS16475_SCAN_GYRO_Y,
ADIS16475_SCAN_GYRO_Z,
ADIS16475_SCAN_ACCEL_X,
ADIS16475_SCAN_ACCEL_Y,
ADIS16475_SCAN_ACCEL_Z,
ADIS16475_SCAN_TEMP,
};
static bool low_rate_allow;
module_param(low_rate_allow, bool, 0444);
MODULE_PARM_DESC(low_rate_allow,
"Allow IMU rates below the minimum advisable when external clk is used in SCALED mode (default: N)");
#ifdef CONFIG_DEBUG_FS
static ssize_t adis16475_show_firmware_revision(struct file *file,
char __user *userbuf,
size_t count, loff_t *ppos)
{
struct adis16475 *st = file->private_data;
char buf[7];
size_t len;
u16 rev;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev);
if (ret)
return ret;
len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
return simple_read_from_buffer(userbuf, count, ppos, buf, len);
}
static const struct file_operations adis16475_firmware_revision_fops = {
.open = simple_open,
.read = adis16475_show_firmware_revision,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static ssize_t adis16475_show_firmware_date(struct file *file,
char __user *userbuf,
size_t count, loff_t *ppos)
{
struct adis16475 *st = file->private_data;
u16 md, year;
char buf[12];
size_t len;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year);
if (ret)
return ret;
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md);
if (ret)
return ret;
len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff,
year);
return simple_read_from_buffer(userbuf, count, ppos, buf, len);
}
static const struct file_operations adis16475_firmware_date_fops = {
.open = simple_open,
.read = adis16475_show_firmware_date,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static int adis16475_show_serial_number(void *arg, u64 *val)
{
struct adis16475 *st = arg;
u16 serial;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial);
if (ret)
return ret;
*val = serial;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16475_serial_number_fops,
adis16475_show_serial_number, NULL, "0x%.4llx\n");
static int adis16475_show_product_id(void *arg, u64 *val)
{
struct adis16475 *st = arg;
u16 prod_id;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_PROD_ID, &prod_id);
if (ret)
return ret;
*val = prod_id;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16475_product_id_fops,
adis16475_show_product_id, NULL, "%llu\n");
static int adis16475_show_flash_count(void *arg, u64 *val)
{
struct adis16475 *st = arg;
u32 flash_count;
int ret;
ret = adis_read_reg_32(&st->adis, ADIS16475_REG_FLASH_CNT,
&flash_count);
if (ret)
return ret;
*val = flash_count;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16475_flash_count_fops,
adis16475_show_flash_count, NULL, "%lld\n");
static void adis16475_debugfs_init(struct iio_dev *indio_dev)
{
struct adis16475 *st = iio_priv(indio_dev);
struct dentry *d = iio_get_debugfs_dentry(indio_dev);
debugfs_create_file_unsafe("serial_number", 0400,
d, st, &adis16475_serial_number_fops);
debugfs_create_file_unsafe("product_id", 0400,
d, st, &adis16475_product_id_fops);
debugfs_create_file_unsafe("flash_count", 0400,
d, st, &adis16475_flash_count_fops);
debugfs_create_file("firmware_revision", 0400,
d, st, &adis16475_firmware_revision_fops);
debugfs_create_file("firmware_date", 0400, d,
st, &adis16475_firmware_date_fops);
}
#else
static void adis16475_debugfs_init(struct iio_dev *indio_dev)
{
}
#endif
static int adis16475_get_freq(struct adis16475 *st, u32 *freq)
{
int ret;
u16 dec;
u32 sample_rate = st->clk_freq;
adis_dev_lock(&st->adis);
if (st->sync_mode == ADIS16475_SYNC_SCALED) {
u16 sync_scale;
ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, &sync_scale);
if (ret)
goto error;
sample_rate = st->clk_freq * sync_scale;
}
ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, &dec);
if (ret)
goto error;
adis_dev_unlock(&st->adis);
*freq = DIV_ROUND_CLOSEST(sample_rate, dec + 1);
return 0;
error:
adis_dev_unlock(&st->adis);
return ret;
}
static int adis16475_set_freq(struct adis16475 *st, const u32 freq)
{
u16 dec;
int ret;
u32 sample_rate = st->clk_freq;
if (!freq)
return -EINVAL;
adis_dev_lock(&st->adis);
/*
* When using sync scaled mode, the input clock needs to be scaled so that we have
* an IMU sample rate between (optimally) 1900 and 2100. After this, we can use the
* decimation filter to lower the sampling rate in order to get what the user wants.
* Optimally, the user sample rate is a multiple of both the IMU sample rate and
* the input clock. Hence, calculating the sync_scale dynamically gives us better
* chances of achieving a perfect/integer value for DEC_RATE. The math here is:
* 1. lcm of the input clock and the desired output rate.
* 2. get the highest multiple of the previous result lower than the adis max rate.
* 3. The last result becomes the IMU sample rate. Use that to calculate SYNC_SCALE
* and DEC_RATE (to get the user output rate)
*/
if (st->sync_mode == ADIS16475_SYNC_SCALED) {
unsigned long scaled_rate = lcm(st->clk_freq, freq);
int sync_scale;
/*
* If lcm is bigger than the IMU maximum sampling rate there's no perfect
* solution. In this case, we get the highest multiple of the input clock
* lower than the IMU max sample rate.
*/
if (scaled_rate > 2100000)
scaled_rate = 2100000 / st->clk_freq * st->clk_freq;
else
scaled_rate = 2100000 / scaled_rate * scaled_rate;
/*
* This is not an hard requirement but it's not advised to run the IMU
* with a sample rate lower than 1900Hz due to possible undersampling
* issues. However, there are users that might really want to take the risk.
* Hence, we provide a module parameter for them. If set, we allow sample
* rates lower than 1.9KHz. By default, we won't allow this and we just roundup
* the rate to the next multiple of the input clock bigger than 1.9KHz. This
* is done like this as in some cases (when DEC_RATE is 0) might give
* us the closest value to the one desired by the user...
*/
if (scaled_rate < 1900000 && !low_rate_allow)
scaled_rate = roundup(1900000, st->clk_freq);
sync_scale = scaled_rate / st->clk_freq;
ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, sync_scale);
if (ret)
goto error;
sample_rate = scaled_rate;
}
dec = DIV_ROUND_CLOSEST(sample_rate, freq);
if (dec)
dec--;
if (dec > st->info->max_dec)
dec = st->info->max_dec;
ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, dec);
if (ret)
goto error;
adis_dev_unlock(&st->adis);
/*
* If decimation is used, then gyro and accel data will have meaningful
* bits on the LSB registers. This info is used on the trigger handler.
*/
assign_bit(ADIS16475_LSB_DEC_MASK, &st->lsb_flag, dec);
return 0;
error:
adis_dev_unlock(&st->adis);
return ret;
}
/* The values are approximated. */
static const u32 adis16475_3db_freqs[] = {
[0] = 720, /* Filter disabled, full BW (~720Hz) */
[1] = 360,
[2] = 164,
[3] = 80,
[4] = 40,
[5] = 20,
[6] = 10,
};
static int adis16475_get_filter(struct adis16475 *st, u32 *filter)
{
u16 filter_sz;
int ret;
const int mask = ADIS16475_FILT_CTRL_MASK;
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL, &filter_sz);
if (ret)
return ret;
*filter = adis16475_3db_freqs[filter_sz & mask];
return 0;
}
static int adis16475_set_filter(struct adis16475 *st, const u32 filter)
{
int i = ARRAY_SIZE(adis16475_3db_freqs);
int ret;
while (--i) {
if (adis16475_3db_freqs[i] >= filter)
break;
}
ret = adis_write_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL,
ADIS16475_FILT_CTRL(i));
if (ret)
return ret;
/*
* If FIR is used, then gyro and accel data will have meaningful
* bits on the LSB registers. This info is used on the trigger handler.
*/
assign_bit(ADIS16475_LSB_FIR_MASK, &st->lsb_flag, i);
return 0;
}
static const u32 adis16475_calib_regs[] = {
[ADIS16475_SCAN_GYRO_X] = ADIS16475_REG_X_GYRO_BIAS_L,
[ADIS16475_SCAN_GYRO_Y] = ADIS16475_REG_Y_GYRO_BIAS_L,
[ADIS16475_SCAN_GYRO_Z] = ADIS16475_REG_Z_GYRO_BIAS_L,
[ADIS16475_SCAN_ACCEL_X] = ADIS16475_REG_X_ACCEL_BIAS_L,
[ADIS16475_SCAN_ACCEL_Y] = ADIS16475_REG_Y_ACCEL_BIAS_L,
[ADIS16475_SCAN_ACCEL_Z] = ADIS16475_REG_Z_ACCEL_BIAS_L,
};
static int adis16475_read_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
int *val, int *val2, long info)
{
struct adis16475 *st = iio_priv(indio_dev);
int ret;
u32 tmp;
switch (info) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan, 0, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = st->info->gyro_max_val;
*val2 = st->info->gyro_max_scale;
return IIO_VAL_FRACTIONAL;
case IIO_ACCEL:
*val = st->info->accel_max_val;
*val2 = st->info->accel_max_scale;
return IIO_VAL_FRACTIONAL;
case IIO_TEMP:
*val = st->info->temp_scale;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_CALIBBIAS:
ret = adis_read_reg_32(&st->adis,
adis16475_calib_regs[chan->scan_index],
val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
ret = adis16475_get_filter(st, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = adis16475_get_freq(st, &tmp);
if (ret)
return ret;
*val = tmp / 1000;
*val2 = (tmp % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int adis16475_write_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
int val, int val2, long info)
{
struct adis16475 *st = iio_priv(indio_dev);
u32 tmp;
switch (info) {
case IIO_CHAN_INFO_SAMP_FREQ:
tmp = val * 1000 + val2 / 1000;
return adis16475_set_freq(st, tmp);
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return adis16475_set_filter(st, val);
case IIO_CHAN_INFO_CALIBBIAS:
return adis_write_reg_32(&st->adis,
adis16475_calib_regs[chan->scan_index],
val);
default:
return -EINVAL;
}
}
#define ADIS16475_MOD_CHAN(_type, _mod, _address, _si, _r_bits, _s_bits) \
{ \
.type = (_type), \
.modified = 1, \
.channel2 = (_mod), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.address = (_address), \
.scan_index = (_si), \
.scan_type = { \
.sign = 's', \
.realbits = (_r_bits), \
.storagebits = (_s_bits), \
.endianness = IIO_BE, \
}, \
}
#define ADIS16475_GYRO_CHANNEL(_mod) \
ADIS16475_MOD_CHAN(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
ADIS16475_REG_ ## _mod ## _GYRO_L, \
ADIS16475_SCAN_GYRO_ ## _mod, 32, 32)
#define ADIS16475_ACCEL_CHANNEL(_mod) \
ADIS16475_MOD_CHAN(IIO_ACCEL, IIO_MOD_ ## _mod, \
ADIS16475_REG_ ## _mod ## _ACCEL_L, \
ADIS16475_SCAN_ACCEL_ ## _mod, 32, 32)
#define ADIS16475_TEMP_CHANNEL() { \
.type = IIO_TEMP, \
.indexed = 1, \
.channel = 0, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.address = ADIS16475_REG_TEMP_OUT, \
.scan_index = ADIS16475_SCAN_TEMP, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec adis16475_channels[] = {
ADIS16475_GYRO_CHANNEL(X),
ADIS16475_GYRO_CHANNEL(Y),
ADIS16475_GYRO_CHANNEL(Z),
ADIS16475_ACCEL_CHANNEL(X),
ADIS16475_ACCEL_CHANNEL(Y),
ADIS16475_ACCEL_CHANNEL(Z),
ADIS16475_TEMP_CHANNEL(),
IIO_CHAN_SOFT_TIMESTAMP(7)
};
enum adis16475_variant {
ADIS16470,
ADIS16475_1,
ADIS16475_2,
ADIS16475_3,
ADIS16477_1,
ADIS16477_2,
ADIS16477_3,
ADIS16465_1,
ADIS16465_2,
ADIS16465_3,
ADIS16467_1,
ADIS16467_2,
ADIS16467_3,
ADIS16500,
ADIS16505_1,
ADIS16505_2,
ADIS16505_3,
ADIS16507_1,
ADIS16507_2,
ADIS16507_3,
};
enum {
ADIS16475_DIAG_STAT_DATA_PATH = 1,
ADIS16475_DIAG_STAT_FLASH_MEM,
ADIS16475_DIAG_STAT_SPI,
ADIS16475_DIAG_STAT_STANDBY,
ADIS16475_DIAG_STAT_SENSOR,
ADIS16475_DIAG_STAT_MEMORY,
ADIS16475_DIAG_STAT_CLK,
};
static const char * const adis16475_status_error_msgs[] = {
[ADIS16475_DIAG_STAT_DATA_PATH] = "Data Path Overrun",
[ADIS16475_DIAG_STAT_FLASH_MEM] = "Flash memory update failure",
[ADIS16475_DIAG_STAT_SPI] = "SPI communication error",
[ADIS16475_DIAG_STAT_STANDBY] = "Standby mode",
[ADIS16475_DIAG_STAT_SENSOR] = "Sensor failure",
[ADIS16475_DIAG_STAT_MEMORY] = "Memory failure",
[ADIS16475_DIAG_STAT_CLK] = "Clock error",
};
#define ADIS16475_DATA(_prod_id, _timeouts) \
{ \
.msc_ctrl_reg = ADIS16475_REG_MSG_CTRL, \
.glob_cmd_reg = ADIS16475_REG_GLOB_CMD, \
.diag_stat_reg = ADIS16475_REG_DIAG_STAT, \
.prod_id_reg = ADIS16475_REG_PROD_ID, \
.prod_id = (_prod_id), \
.self_test_mask = BIT(2), \
.self_test_reg = ADIS16475_REG_GLOB_CMD, \
.cs_change_delay = 16, \
.read_delay = 5, \
.write_delay = 5, \
.status_error_msgs = adis16475_status_error_msgs, \
.status_error_mask = BIT(ADIS16475_DIAG_STAT_DATA_PATH) | \
BIT(ADIS16475_DIAG_STAT_FLASH_MEM) | \
BIT(ADIS16475_DIAG_STAT_SPI) | \
BIT(ADIS16475_DIAG_STAT_STANDBY) | \
BIT(ADIS16475_DIAG_STAT_SENSOR) | \
BIT(ADIS16475_DIAG_STAT_MEMORY) | \
BIT(ADIS16475_DIAG_STAT_CLK), \
.unmasked_drdy = true, \
.timeouts = (_timeouts), \
.burst_reg_cmd = ADIS16475_REG_GLOB_CMD, \
.burst_len = ADIS16475_BURST_MAX_DATA, \
.burst_max_len = ADIS16475_BURST32_MAX_DATA, \
.burst_max_speed_hz = ADIS16475_BURST_MAX_SPEED \
}
static const struct adis16475_sync adis16475_sync_mode[] = {
{ ADIS16475_SYNC_OUTPUT },
{ ADIS16475_SYNC_DIRECT, 1900, 2100 },
{ ADIS16475_SYNC_SCALED, 1, 128 },
{ ADIS16475_SYNC_PULSE, 1000, 2100 },
};
static const struct adis_timeout adis16475_timeouts = {
.reset_ms = 200,
.sw_reset_ms = 200,
.self_test_ms = 20,
};
static const struct adis_timeout adis1650x_timeouts = {
.reset_ms = 260,
.sw_reset_ms = 260,
.self_test_ms = 30,
};
static const struct adis16475_chip_info adis16475_chip_info[] = {
[ADIS16470] = {
.name = "adis16470",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16470, &adis16475_timeouts),
},
[ADIS16475_1] = {
.name = "adis16475-1",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
},
[ADIS16475_2] = {
.name = "adis16475-2",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
},
[ADIS16475_3] = {
.name = "adis16475-3",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
},
[ADIS16477_1] = {
.name = "adis16477-1",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
},
[ADIS16477_2] = {
.name = "adis16477-2",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
},
[ADIS16477_3] = {
.name = "adis16477-3",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
},
[ADIS16465_1] = {
.name = "adis16465-1",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
},
[ADIS16465_2] = {
.name = "adis16465-2",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
},
[ADIS16465_3] = {
.name = "adis16465-3",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
},
[ADIS16467_1] = {
.name = "adis16467-1",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
},
[ADIS16467_2] = {
.name = "adis16467-2",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
},
[ADIS16467_3] = {
.name = "adis16467-3",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 1,
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
},
[ADIS16500] = {
.name = "adis16500",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 392,
.accel_max_scale = 32000 << 16,
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
/* pulse sync not supported */
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16500, &adis1650x_timeouts),
},
[ADIS16505_1] = {
.name = "adis16505-1",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
.accel_max_val = 78,
.accel_max_scale = 32000 << 16,
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
/* pulse sync not supported */
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
},
[ADIS16505_2] = {
.name = "adis16505-2",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
.accel_max_val = 78,
.accel_max_scale = 32000 << 16,
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
/* pulse sync not supported */
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
},
[ADIS16505_3] = {
.name = "adis16505-3",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 78,
.accel_max_scale = 32000 << 16,
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
/* pulse sync not supported */
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
},
[ADIS16507_1] = {
.name = "adis16507-1",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
.accel_max_val = 392,
.accel_max_scale = 32000 << 16,
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
/* pulse sync not supported */
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
},
[ADIS16507_2] = {
.name = "adis16507-2",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
.accel_max_val = 392,
.accel_max_scale = 32000 << 16,
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
/* pulse sync not supported */
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
},
[ADIS16507_3] = {
.name = "adis16507-3",
.num_channels = ARRAY_SIZE(adis16475_channels),
.channels = adis16475_channels,
.gyro_max_val = 1,
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
.accel_max_val = 392,
.accel_max_scale = 32000 << 16,
.temp_scale = 100,
.int_clk = 2000,
.max_dec = 1999,
.sync = adis16475_sync_mode,
/* pulse sync not supported */
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
.has_burst32 = true,
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
},
};
static const struct iio_info adis16475_info = {
.read_raw = &adis16475_read_raw,
.write_raw = &adis16475_write_raw,
.update_scan_mode = adis_update_scan_mode,
.debugfs_reg_access = adis_debugfs_reg_access,
};
static bool adis16475_validate_crc(const u8 *buffer, u16 crc,
const bool burst32)
{
int i;
/* extra 6 elements for low gyro and accel */
const u16 sz = burst32 ? ADIS16475_BURST32_MAX_DATA :
ADIS16475_BURST_MAX_DATA;
for (i = 0; i < sz - 2; i++)
crc -= buffer[i];
return crc == 0;
}
static void adis16475_burst32_check(struct adis16475 *st)
{
int ret;
struct adis *adis = &st->adis;
if (!st->info->has_burst32)
return;
if (st->lsb_flag && !st->burst32) {
const u16 en = ADIS16500_BURST32(1);
ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
ADIS16500_BURST32_MASK, en);
if (ret)
return;
st->burst32 = true;
/*
* In 32-bit mode we need extra 2 bytes for all gyro
* and accel channels.
*/
adis->burst_extra_len = 6 * sizeof(u16);
adis->xfer[1].len += 6 * sizeof(u16);
dev_dbg(&adis->spi->dev, "Enable burst32 mode, xfer:%d",
adis->xfer[1].len);
} else if (!st->lsb_flag && st->burst32) {
const u16 en = ADIS16500_BURST32(0);
ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
ADIS16500_BURST32_MASK, en);
if (ret)
return;
st->burst32 = false;
/* Remove the extra bits */
adis->burst_extra_len = 0;
adis->xfer[1].len -= 6 * sizeof(u16);
dev_dbg(&adis->spi->dev, "Disable burst32 mode, xfer:%d\n",
adis->xfer[1].len);
}
}
static irqreturn_t adis16475_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adis16475 *st = iio_priv(indio_dev);
struct adis *adis = &st->adis;
int ret, bit, i = 0;
__be16 *buffer;
u16 crc;
bool valid;
/* offset until the first element after gyro and accel */
const u8 offset = st->burst32 ? 13 : 7;
ret = spi_sync(adis->spi, &adis->msg);
if (ret)
goto check_burst32;
buffer = adis->buffer;
crc = be16_to_cpu(buffer[offset + 2]);
valid = adis16475_validate_crc(adis->buffer, crc, st->burst32);
if (!valid) {
dev_err(&adis->spi->dev, "Invalid crc\n");
goto check_burst32;
}
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
/*
* When burst mode is used, system flags is the first data
* channel in the sequence, but the scan index is 7.
*/
switch (bit) {
case ADIS16475_SCAN_TEMP:
st->data[i++] = buffer[offset];
break;
case ADIS16475_SCAN_GYRO_X ... ADIS16475_SCAN_ACCEL_Z:
/*
* The first 2 bytes on the received data are the
* DIAG_STAT reg, hence the +1 offset here...
*/
if (st->burst32) {
/* upper 16 */
st->data[i++] = buffer[bit * 2 + 2];
/* lower 16 */
st->data[i++] = buffer[bit * 2 + 1];
} else {
st->data[i++] = buffer[bit + 1];
/*
* Don't bother in doing the manual read if the
* device supports burst32. burst32 will be
* enabled in the next call to
* adis16475_burst32_check()...
*/
if (st->lsb_flag && !st->info->has_burst32) {
u16 val = 0;
const u32 reg = ADIS16475_REG_X_GYRO_L +
bit * 4;
adis_read_reg_16(adis, reg, &val);
st->data[i++] = cpu_to_be16(val);
} else {
/* lower not used */
st->data[i++] = 0;
}
}
break;
}
}
iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp);
check_burst32:
/*
* We only check the burst mode at the end of the current capture since
* it takes a full data ready cycle for the device to update the burst
* array.
*/
adis16475_burst32_check(st);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int adis16475_config_sync_mode(struct adis16475 *st)
{
int ret;
struct device *dev = &st->adis.spi->dev;
const struct adis16475_sync *sync;
u32 sync_mode;
/* default to internal clk */
st->clk_freq = st->info->int_clk * 1000;
ret = device_property_read_u32(dev, "adi,sync-mode", &sync_mode);
if (ret)
return 0;
if (sync_mode >= st->info->num_sync) {
dev_err(dev, "Invalid sync mode: %u for %s\n", sync_mode,
st->info->name);
return -EINVAL;
}
sync = &st->info->sync[sync_mode];
st->sync_mode = sync->sync_mode;
/* All the other modes require external input signal */
if (sync->sync_mode != ADIS16475_SYNC_OUTPUT) {
struct clk *clk = devm_clk_get_enabled(dev, NULL);
if (IS_ERR(clk))
return PTR_ERR(clk);
st->clk_freq = clk_get_rate(clk);
if (st->clk_freq < sync->min_rate ||
st->clk_freq > sync->max_rate) {
dev_err(dev,
"Clk rate:%u not in a valid range:[%u %u]\n",
st->clk_freq, sync->min_rate, sync->max_rate);
return -EINVAL;
}
if (sync->sync_mode == ADIS16475_SYNC_SCALED) {
u16 up_scale;
/*
* In sync scaled mode, the IMU sample rate is the clk_freq * sync_scale.
* Hence, default the IMU sample rate to the highest multiple of the input
* clock lower than the IMU max sample rate. The optimal range is
* 1900-2100 sps...
*/
up_scale = 2100 / st->clk_freq;
ret = __adis_write_reg_16(&st->adis,
ADIS16475_REG_UP_SCALE,
up_scale);
if (ret)
return ret;
}
st->clk_freq *= 1000;
}
/*
* Keep in mind that the mask for the clk modes in adis1650*
* chips is different (1100 instead of 11100). However, we
* are not configuring BIT(4) in these chips and the default
* value is 0, so we are fine in doing the below operations.
* I'm keeping this for simplicity and avoiding extra variables
* in chip_info.
*/
ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
ADIS16475_SYNC_MODE_MASK, sync->sync_mode);
if (ret)
return ret;
usleep_range(250, 260);
return 0;
}
static int adis16475_config_irq_pin(struct adis16475 *st)
{
int ret;
struct irq_data *desc;
u32 irq_type;
u16 val = 0;
u8 polarity;
struct spi_device *spi = st->adis.spi;
desc = irq_get_irq_data(spi->irq);
if (!desc) {
dev_err(&spi->dev, "Could not find IRQ %d\n", spi->irq);
return -EINVAL;
}
/*
* It is possible to configure the data ready polarity. Furthermore, we
* need to update the adis struct if we want data ready as active low.
*/
irq_type = irqd_get_trigger_type(desc);
if (irq_type == IRQ_TYPE_EDGE_RISING) {
polarity = 1;
st->adis.irq_flag = IRQF_TRIGGER_RISING;
} else if (irq_type == IRQ_TYPE_EDGE_FALLING) {
polarity = 0;
st->adis.irq_flag = IRQF_TRIGGER_FALLING;
} else {
dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n",
irq_type);
return -EINVAL;
}
val = ADIS16475_MSG_CTRL_DR_POL(polarity);
ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
ADIS16475_MSG_CTRL_DR_POL_MASK, val);
if (ret)
return ret;
/*
* There is a delay writing to any bits written to the MSC_CTRL
* register. It should not be bigger than 200us, so 250 should be more
* than enough!
*/
usleep_range(250, 260);
return 0;
}
static const struct of_device_id adis16475_of_match[] = {
{ .compatible = "adi,adis16470",
.data = &adis16475_chip_info[ADIS16470] },
{ .compatible = "adi,adis16475-1",
.data = &adis16475_chip_info[ADIS16475_1] },
{ .compatible = "adi,adis16475-2",
.data = &adis16475_chip_info[ADIS16475_2] },
{ .compatible = "adi,adis16475-3",
.data = &adis16475_chip_info[ADIS16475_3] },
{ .compatible = "adi,adis16477-1",
.data = &adis16475_chip_info[ADIS16477_1] },
{ .compatible = "adi,adis16477-2",
.data = &adis16475_chip_info[ADIS16477_2] },
{ .compatible = "adi,adis16477-3",
.data = &adis16475_chip_info[ADIS16477_3] },
{ .compatible = "adi,adis16465-1",
.data = &adis16475_chip_info[ADIS16465_1] },
{ .compatible = "adi,adis16465-2",
.data = &adis16475_chip_info[ADIS16465_2] },
{ .compatible = "adi,adis16465-3",
.data = &adis16475_chip_info[ADIS16465_3] },
{ .compatible = "adi,adis16467-1",
.data = &adis16475_chip_info[ADIS16467_1] },
{ .compatible = "adi,adis16467-2",
.data = &adis16475_chip_info[ADIS16467_2] },
{ .compatible = "adi,adis16467-3",
.data = &adis16475_chip_info[ADIS16467_3] },
{ .compatible = "adi,adis16500",
.data = &adis16475_chip_info[ADIS16500] },
{ .compatible = "adi,adis16505-1",
.data = &adis16475_chip_info[ADIS16505_1] },
{ .compatible = "adi,adis16505-2",
.data = &adis16475_chip_info[ADIS16505_2] },
{ .compatible = "adi,adis16505-3",
.data = &adis16475_chip_info[ADIS16505_3] },
{ .compatible = "adi,adis16507-1",
.data = &adis16475_chip_info[ADIS16507_1] },
{ .compatible = "adi,adis16507-2",
.data = &adis16475_chip_info[ADIS16507_2] },
{ .compatible = "adi,adis16507-3",
.data = &adis16475_chip_info[ADIS16507_3] },
{ },
};
MODULE_DEVICE_TABLE(of, adis16475_of_match);
static int adis16475_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adis16475 *st;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->info = device_get_match_data(&spi->dev);
if (!st->info)
return -EINVAL;
ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data);
if (ret)
return ret;
indio_dev->name = st->info->name;
indio_dev->channels = st->info->channels;
indio_dev->num_channels = st->info->num_channels;
indio_dev->info = &adis16475_info;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = __adis_initial_startup(&st->adis);
if (ret)
return ret;
ret = adis16475_config_irq_pin(st);
if (ret)
return ret;
ret = adis16475_config_sync_mode(st);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
adis16475_trigger_handler);
if (ret)
return ret;
ret = devm_iio_device_register(&spi->dev, indio_dev);
if (ret)
return ret;
adis16475_debugfs_init(indio_dev);
return 0;
}
static struct spi_driver adis16475_driver = {
.driver = {
.name = "adis16475",
.of_match_table = adis16475_of_match,
},
.probe = adis16475_probe,
};
module_spi_driver(adis16475_driver);
MODULE_AUTHOR("Nuno Sa <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16475 IMU driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/imu/adis16475.c |
// SPDX-License-Identifier: GPL-2.0
/*
* FXOS8700 - NXP IMU, SPI bits
*/
#include <linux/acpi.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "fxos8700.h"
static int fxos8700_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap %ld\n", PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
}
static const struct spi_device_id fxos8700_spi_id[] = {
{"fxos8700", 0},
{ }
};
MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
static const struct acpi_device_id fxos8700_acpi_match[] = {
{"FXOS8700", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
static const struct of_device_id fxos8700_of_match[] = {
{ .compatible = "nxp,fxos8700" },
{ }
};
MODULE_DEVICE_TABLE(of, fxos8700_of_match);
static struct spi_driver fxos8700_spi_driver = {
.probe = fxos8700_spi_probe,
.id_table = fxos8700_spi_id,
.driver = {
.acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
.of_match_table = fxos8700_of_match,
.name = "fxos8700_spi",
},
};
module_spi_driver(fxos8700_spi_driver);
MODULE_AUTHOR("Robert Jones <[email protected]>");
MODULE_DESCRIPTION("FXOS8700 SPI driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/imu/fxos8700_spi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Common library for ADIS16XXX devices
*
* Copyright 2012 Analog Devices Inc.
* Author: Lars-Peter Clausen <[email protected]>
*/
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <asm/unaligned.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#define ADIS_MSC_CTRL_DATA_RDY_EN BIT(2)
#define ADIS_MSC_CTRL_DATA_RDY_POL_HIGH BIT(1)
#define ADIS_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
#define ADIS_GLOB_CMD_SW_RESET BIT(7)
/**
* __adis_write_reg() - write N bytes to register (unlocked version)
* @adis: The adis device
* @reg: The address of the lower of the two registers
* @value: The value to write to device (up to 4 bytes)
* @size: The size of the @value (in bytes)
*/
int __adis_write_reg(struct adis *adis, unsigned int reg, unsigned int value,
unsigned int size)
{
unsigned int page = reg / ADIS_PAGE_SIZE;
int ret, i;
struct spi_message msg;
struct spi_transfer xfers[] = {
{
.tx_buf = adis->tx,
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.delay.value = adis->data->write_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
.cs_change_delay.value = adis->data->cs_change_delay,
.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
}, {
.tx_buf = adis->tx + 2,
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.delay.value = adis->data->write_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
.cs_change_delay.value = adis->data->cs_change_delay,
.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
}, {
.tx_buf = adis->tx + 4,
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.delay.value = adis->data->write_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
.cs_change_delay.value = adis->data->cs_change_delay,
.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
}, {
.tx_buf = adis->tx + 6,
.bits_per_word = 8,
.len = 2,
.delay.value = adis->data->write_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
}, {
.tx_buf = adis->tx + 8,
.bits_per_word = 8,
.len = 2,
.delay.value = adis->data->write_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
},
};
spi_message_init(&msg);
if (adis->current_page != page) {
adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
adis->tx[1] = page;
spi_message_add_tail(&xfers[0], &msg);
}
switch (size) {
case 4:
adis->tx[8] = ADIS_WRITE_REG(reg + 3);
adis->tx[9] = (value >> 24) & 0xff;
adis->tx[6] = ADIS_WRITE_REG(reg + 2);
adis->tx[7] = (value >> 16) & 0xff;
fallthrough;
case 2:
adis->tx[4] = ADIS_WRITE_REG(reg + 1);
adis->tx[5] = (value >> 8) & 0xff;
fallthrough;
case 1:
adis->tx[2] = ADIS_WRITE_REG(reg);
adis->tx[3] = value & 0xff;
break;
default:
return -EINVAL;
}
xfers[size].cs_change = 0;
for (i = 1; i <= size; i++)
spi_message_add_tail(&xfers[i], &msg);
ret = spi_sync(adis->spi, &msg);
if (ret) {
dev_err(&adis->spi->dev, "Failed to write register 0x%02X: %d\n",
reg, ret);
} else {
adis->current_page = page;
}
return ret;
}
EXPORT_SYMBOL_NS_GPL(__adis_write_reg, IIO_ADISLIB);
/**
* __adis_read_reg() - read N bytes from register (unlocked version)
* @adis: The adis device
* @reg: The address of the lower of the two registers
* @val: The value read back from the device
* @size: The size of the @val buffer
*/
int __adis_read_reg(struct adis *adis, unsigned int reg, unsigned int *val,
unsigned int size)
{
unsigned int page = reg / ADIS_PAGE_SIZE;
struct spi_message msg;
int ret;
struct spi_transfer xfers[] = {
{
.tx_buf = adis->tx,
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.delay.value = adis->data->write_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
.cs_change_delay.value = adis->data->cs_change_delay,
.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
}, {
.tx_buf = adis->tx + 2,
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.delay.value = adis->data->read_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
.cs_change_delay.value = adis->data->cs_change_delay,
.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
}, {
.tx_buf = adis->tx + 4,
.rx_buf = adis->rx,
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.delay.value = adis->data->read_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
.cs_change_delay.value = adis->data->cs_change_delay,
.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
}, {
.rx_buf = adis->rx + 2,
.bits_per_word = 8,
.len = 2,
.delay.value = adis->data->read_delay,
.delay.unit = SPI_DELAY_UNIT_USECS,
},
};
spi_message_init(&msg);
if (adis->current_page != page) {
adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
adis->tx[1] = page;
spi_message_add_tail(&xfers[0], &msg);
}
switch (size) {
case 4:
adis->tx[2] = ADIS_READ_REG(reg + 2);
adis->tx[3] = 0;
spi_message_add_tail(&xfers[1], &msg);
fallthrough;
case 2:
adis->tx[4] = ADIS_READ_REG(reg);
adis->tx[5] = 0;
spi_message_add_tail(&xfers[2], &msg);
spi_message_add_tail(&xfers[3], &msg);
break;
default:
return -EINVAL;
}
ret = spi_sync(adis->spi, &msg);
if (ret) {
dev_err(&adis->spi->dev, "Failed to read register 0x%02X: %d\n",
reg, ret);
return ret;
}
adis->current_page = page;
switch (size) {
case 4:
*val = get_unaligned_be32(adis->rx);
break;
case 2:
*val = get_unaligned_be16(adis->rx + 2);
break;
}
return ret;
}
EXPORT_SYMBOL_NS_GPL(__adis_read_reg, IIO_ADISLIB);
/**
* __adis_update_bits_base() - ADIS Update bits function - Unlocked version
* @adis: The adis device
* @reg: The address of the lower of the two registers
* @mask: Bitmask to change
* @val: Value to be written
* @size: Size of the register to update
*
* Updates the desired bits of @reg in accordance with @mask and @val.
*/
int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask,
const u32 val, u8 size)
{
int ret;
u32 __val;
ret = __adis_read_reg(adis, reg, &__val, size);
if (ret)
return ret;
__val = (__val & ~mask) | (val & mask);
return __adis_write_reg(adis, reg, __val, size);
}
EXPORT_SYMBOL_NS_GPL(__adis_update_bits_base, IIO_ADISLIB);
#ifdef CONFIG_DEBUG_FS
int adis_debugfs_reg_access(struct iio_dev *indio_dev, unsigned int reg,
unsigned int writeval, unsigned int *readval)
{
struct adis *adis = iio_device_get_drvdata(indio_dev);
if (readval) {
u16 val16;
int ret;
ret = adis_read_reg_16(adis, reg, &val16);
if (ret == 0)
*readval = val16;
return ret;
}
return adis_write_reg_16(adis, reg, writeval);
}
EXPORT_SYMBOL_NS(adis_debugfs_reg_access, IIO_ADISLIB);
#endif
/**
* __adis_enable_irq() - Enable or disable data ready IRQ (unlocked)
* @adis: The adis device
* @enable: Whether to enable the IRQ
*
* Returns 0 on success, negative error code otherwise
*/
int __adis_enable_irq(struct adis *adis, bool enable)
{
int ret;
u16 msc;
if (adis->data->enable_irq)
return adis->data->enable_irq(adis, enable);
if (adis->data->unmasked_drdy) {
if (enable)
enable_irq(adis->spi->irq);
else
disable_irq(adis->spi->irq);
return 0;
}
ret = __adis_read_reg_16(adis, adis->data->msc_ctrl_reg, &msc);
if (ret)
return ret;
msc |= ADIS_MSC_CTRL_DATA_RDY_POL_HIGH;
msc &= ~ADIS_MSC_CTRL_DATA_RDY_DIO2;
if (enable)
msc |= ADIS_MSC_CTRL_DATA_RDY_EN;
else
msc &= ~ADIS_MSC_CTRL_DATA_RDY_EN;
return __adis_write_reg_16(adis, adis->data->msc_ctrl_reg, msc);
}
EXPORT_SYMBOL_NS(__adis_enable_irq, IIO_ADISLIB);
/**
* __adis_check_status() - Check the device for error conditions (unlocked)
* @adis: The adis device
*
* Returns 0 on success, a negative error code otherwise
*/
int __adis_check_status(struct adis *adis)
{
u16 status;
int ret;
int i;
ret = __adis_read_reg_16(adis, adis->data->diag_stat_reg, &status);
if (ret)
return ret;
status &= adis->data->status_error_mask;
if (status == 0)
return 0;
for (i = 0; i < 16; ++i) {
if (status & BIT(i)) {
dev_err(&adis->spi->dev, "%s.\n",
adis->data->status_error_msgs[i]);
}
}
return -EIO;
}
EXPORT_SYMBOL_NS_GPL(__adis_check_status, IIO_ADISLIB);
/**
* __adis_reset() - Reset the device (unlocked version)
* @adis: The adis device
*
* Returns 0 on success, a negative error code otherwise
*/
int __adis_reset(struct adis *adis)
{
int ret;
const struct adis_timeout *timeouts = adis->data->timeouts;
ret = __adis_write_reg_8(adis, adis->data->glob_cmd_reg,
ADIS_GLOB_CMD_SW_RESET);
if (ret) {
dev_err(&adis->spi->dev, "Failed to reset device: %d\n", ret);
return ret;
}
msleep(timeouts->sw_reset_ms);
return 0;
}
EXPORT_SYMBOL_NS_GPL(__adis_reset, IIO_ADIS_LIB);
static int adis_self_test(struct adis *adis)
{
int ret;
const struct adis_timeout *timeouts = adis->data->timeouts;
ret = __adis_write_reg_16(adis, adis->data->self_test_reg,
adis->data->self_test_mask);
if (ret) {
dev_err(&adis->spi->dev, "Failed to initiate self test: %d\n",
ret);
return ret;
}
msleep(timeouts->self_test_ms);
ret = __adis_check_status(adis);
if (adis->data->self_test_no_autoclear)
__adis_write_reg_16(adis, adis->data->self_test_reg, 0x00);
return ret;
}
/**
* __adis_initial_startup() - Device initial setup
* @adis: The adis device
*
* The function performs a HW reset via a reset pin that should be specified
* via GPIOLIB. If no pin is configured a SW reset will be performed.
* The RST pin for the ADIS devices should be configured as ACTIVE_LOW.
*
* After the self-test operation is performed, the function will also check
* that the product ID is as expected. This assumes that drivers providing
* 'prod_id_reg' will also provide the 'prod_id'.
*
* Returns 0 if the device is operational, a negative error code otherwise.
*
* This function should be called early on in the device initialization sequence
* to ensure that the device is in a sane and known state and that it is usable.
*/
int __adis_initial_startup(struct adis *adis)
{
const struct adis_timeout *timeouts = adis->data->timeouts;
struct gpio_desc *gpio;
u16 prod_id;
int ret;
/* check if the device has rst pin low */
gpio = devm_gpiod_get_optional(&adis->spi->dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(gpio))
return PTR_ERR(gpio);
if (gpio) {
usleep_range(10, 12);
/* bring device out of reset */
gpiod_set_value_cansleep(gpio, 0);
msleep(timeouts->reset_ms);
} else {
ret = __adis_reset(adis);
if (ret)
return ret;
}
ret = adis_self_test(adis);
if (ret)
return ret;
/*
* don't bother calling this if we can't unmask the IRQ as in this case
* the IRQ is most likely not yet requested and we will request it
* with 'IRQF_NO_AUTOEN' anyways.
*/
if (!adis->data->unmasked_drdy)
__adis_enable_irq(adis, false);
if (!adis->data->prod_id_reg)
return 0;
ret = adis_read_reg_16(adis, adis->data->prod_id_reg, &prod_id);
if (ret)
return ret;
if (prod_id != adis->data->prod_id)
dev_warn(&adis->spi->dev,
"Device ID(%u) and product ID(%u) do not match.\n",
adis->data->prod_id, prod_id);
return 0;
}
EXPORT_SYMBOL_NS_GPL(__adis_initial_startup, IIO_ADISLIB);
/**
* adis_single_conversion() - Performs a single sample conversion
* @indio_dev: The IIO device
* @chan: The IIO channel
* @error_mask: Mask for the error bit
* @val: Result of the conversion
*
* Returns IIO_VAL_INT on success, a negative error code otherwise.
*
* The function performs a single conversion on a given channel and post
* processes the value accordingly to the channel spec. If a error_mask is given
* the function will check if the mask is set in the returned raw value. If it
* is set the function will perform a self-check. If the device does not report
* a error bit in the channels raw value set error_mask to 0.
*/
int adis_single_conversion(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
unsigned int error_mask, int *val)
{
struct adis *adis = iio_device_get_drvdata(indio_dev);
unsigned int uval;
int ret;
mutex_lock(&adis->state_lock);
ret = __adis_read_reg(adis, chan->address, &uval,
chan->scan_type.storagebits / 8);
if (ret)
goto err_unlock;
if (uval & error_mask) {
ret = __adis_check_status(adis);
if (ret)
goto err_unlock;
}
if (chan->scan_type.sign == 's')
*val = sign_extend32(uval, chan->scan_type.realbits - 1);
else
*val = uval & ((1 << chan->scan_type.realbits) - 1);
ret = IIO_VAL_INT;
err_unlock:
mutex_unlock(&adis->state_lock);
return ret;
}
EXPORT_SYMBOL_NS_GPL(adis_single_conversion, IIO_ADISLIB);
/**
* adis_init() - Initialize adis device structure
* @adis: The adis device
* @indio_dev: The iio device
* @spi: The spi device
* @data: Chip specific data
*
* Returns 0 on success, a negative error code otherwise.
*
* This function must be called, before any other adis helper function may be
* called.
*/
int adis_init(struct adis *adis, struct iio_dev *indio_dev,
struct spi_device *spi, const struct adis_data *data)
{
if (!data || !data->timeouts) {
dev_err(&spi->dev, "No config data or timeouts not defined!\n");
return -EINVAL;
}
mutex_init(&adis->state_lock);
adis->spi = spi;
adis->data = data;
iio_device_set_drvdata(indio_dev, adis);
if (data->has_paging) {
/* Need to set the page before first read/write */
adis->current_page = -1;
} else {
/* Page will always be 0 */
adis->current_page = 0;
}
return 0;
}
EXPORT_SYMBOL_NS_GPL(adis_init, IIO_ADISLIB);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");
MODULE_DESCRIPTION("Common library code for ADIS16XXX devices");
| linux-master | drivers/iio/imu/adis.c |
// SPDX-License-Identifier: GPL-2.0
/*
* FXOS8700 - NXP IMU, I2C bits
*
* 7-bit I2C slave address determined by SA1 and SA0 logic level
* inputs represented in the following table:
* SA1 | SA0 | Slave Address
* 0 | 0 | 0x1E
* 0 | 1 | 0x1D
* 1 | 0 | 0x1C
* 1 | 1 | 0x1F
*/
#include <linux/acpi.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include "fxos8700.h"
static int fxos8700_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
const char *name = NULL;
regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap %ld\n", PTR_ERR(regmap));
return PTR_ERR(regmap);
}
if (id)
name = id->name;
return fxos8700_core_probe(&client->dev, regmap, name, false);
}
static const struct i2c_device_id fxos8700_i2c_id[] = {
{"fxos8700", 0},
{ }
};
MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
static const struct acpi_device_id fxos8700_acpi_match[] = {
{"FXOS8700", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
static const struct of_device_id fxos8700_of_match[] = {
{ .compatible = "nxp,fxos8700" },
{ }
};
MODULE_DEVICE_TABLE(of, fxos8700_of_match);
static struct i2c_driver fxos8700_i2c_driver = {
.driver = {
.name = "fxos8700_i2c",
.acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
.of_match_table = fxos8700_of_match,
},
.probe = fxos8700_i2c_probe,
.id_table = fxos8700_i2c_id,
};
module_i2c_driver(fxos8700_i2c_driver);
MODULE_AUTHOR("Robert Jones <[email protected]>");
MODULE_DESCRIPTION("FXOS8700 I2C driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/imu/fxos8700_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* KMX61 - Kionix 6-axis Accelerometer/Magnetometer
*
* Copyright (c) 2014, Intel Corporation.
*
* IIO driver for KMX61 (7-bit I2C slave address 0x0E or 0x0F).
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/acpi.h>
#include <linux/interrupt.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>
#include <linux/iio/trigger.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define KMX61_DRV_NAME "kmx61"
#define KMX61_IRQ_NAME "kmx61_event"
#define KMX61_REG_WHO_AM_I 0x00
#define KMX61_REG_INS1 0x01
#define KMX61_REG_INS2 0x02
/*
* three 16-bit accelerometer output registers for X/Y/Z axis
* we use only XOUT_L as a base register, all other addresses
* can be obtained by applying an offset and are provided here
* only for clarity.
*/
#define KMX61_ACC_XOUT_L 0x0A
#define KMX61_ACC_XOUT_H 0x0B
#define KMX61_ACC_YOUT_L 0x0C
#define KMX61_ACC_YOUT_H 0x0D
#define KMX61_ACC_ZOUT_L 0x0E
#define KMX61_ACC_ZOUT_H 0x0F
/*
* one 16-bit temperature output register
*/
#define KMX61_TEMP_L 0x10
#define KMX61_TEMP_H 0x11
/*
* three 16-bit magnetometer output registers for X/Y/Z axis
*/
#define KMX61_MAG_XOUT_L 0x12
#define KMX61_MAG_XOUT_H 0x13
#define KMX61_MAG_YOUT_L 0x14
#define KMX61_MAG_YOUT_H 0x15
#define KMX61_MAG_ZOUT_L 0x16
#define KMX61_MAG_ZOUT_H 0x17
#define KMX61_REG_INL 0x28
#define KMX61_REG_STBY 0x29
#define KMX61_REG_CTRL1 0x2A
#define KMX61_REG_CTRL2 0x2B
#define KMX61_REG_ODCNTL 0x2C
#define KMX61_REG_INC1 0x2D
#define KMX61_REG_WUF_THRESH 0x3D
#define KMX61_REG_WUF_TIMER 0x3E
#define KMX61_ACC_STBY_BIT BIT(0)
#define KMX61_MAG_STBY_BIT BIT(1)
#define KMX61_ACT_STBY_BIT BIT(7)
#define KMX61_ALL_STBY (KMX61_ACC_STBY_BIT | KMX61_MAG_STBY_BIT)
#define KMX61_REG_INS1_BIT_WUFS BIT(1)
#define KMX61_REG_INS2_BIT_ZP BIT(0)
#define KMX61_REG_INS2_BIT_ZN BIT(1)
#define KMX61_REG_INS2_BIT_YP BIT(2)
#define KMX61_REG_INS2_BIT_YN BIT(3)
#define KMX61_REG_INS2_BIT_XP BIT(4)
#define KMX61_REG_INS2_BIT_XN BIT(5)
#define KMX61_REG_CTRL1_GSEL_MASK 0x03
#define KMX61_REG_CTRL1_BIT_RES BIT(4)
#define KMX61_REG_CTRL1_BIT_DRDYE BIT(5)
#define KMX61_REG_CTRL1_BIT_WUFE BIT(6)
#define KMX61_REG_CTRL1_BIT_BTSE BIT(7)
#define KMX61_REG_INC1_BIT_WUFS BIT(0)
#define KMX61_REG_INC1_BIT_DRDYM BIT(1)
#define KMX61_REG_INC1_BIT_DRDYA BIT(2)
#define KMX61_REG_INC1_BIT_IEN BIT(5)
#define KMX61_ACC_ODR_SHIFT 0
#define KMX61_MAG_ODR_SHIFT 4
#define KMX61_ACC_ODR_MASK 0x0F
#define KMX61_MAG_ODR_MASK 0xF0
#define KMX61_OWUF_MASK 0x7
#define KMX61_DEFAULT_WAKE_THRESH 1
#define KMX61_DEFAULT_WAKE_DURATION 1
#define KMX61_SLEEP_DELAY_MS 2000
#define KMX61_CHIP_ID 0x12
/* KMX61 devices */
#define KMX61_ACC 0x01
#define KMX61_MAG 0x02
struct kmx61_data {
struct i2c_client *client;
/* serialize access to non-atomic ops, e.g set_mode */
struct mutex lock;
/* standby state */
bool acc_stby;
bool mag_stby;
/* power state */
bool acc_ps;
bool mag_ps;
/* config bits */
u8 range;
u8 odr_bits;
u8 wake_thresh;
u8 wake_duration;
/* accelerometer specific data */
struct iio_dev *acc_indio_dev;
struct iio_trigger *acc_dready_trig;
struct iio_trigger *motion_trig;
bool acc_dready_trig_on;
bool motion_trig_on;
bool ev_enable_state;
/* magnetometer specific data */
struct iio_dev *mag_indio_dev;
struct iio_trigger *mag_dready_trig;
bool mag_dready_trig_on;
};
enum kmx61_range {
KMX61_RANGE_2G,
KMX61_RANGE_4G,
KMX61_RANGE_8G,
};
enum kmx61_axis {
KMX61_AXIS_X,
KMX61_AXIS_Y,
KMX61_AXIS_Z,
};
static const u16 kmx61_uscale_table[] = {9582, 19163, 38326};
static const struct {
int val;
int val2;
} kmx61_samp_freq_table[] = { {12, 500000},
{25, 0},
{50, 0},
{100, 0},
{200, 0},
{400, 0},
{800, 0},
{1600, 0},
{0, 781000},
{1, 563000},
{3, 125000},
{6, 250000} };
static const struct {
int val;
int val2;
int odr_bits;
} kmx61_wake_up_odr_table[] = { {0, 781000, 0x00},
{1, 563000, 0x01},
{3, 125000, 0x02},
{6, 250000, 0x03},
{12, 500000, 0x04},
{25, 0, 0x05},
{50, 0, 0x06},
{100, 0, 0x06},
{200, 0, 0x06},
{400, 0, 0x06},
{800, 0, 0x06},
{1600, 0, 0x06} };
static IIO_CONST_ATTR(accel_scale_available, "0.009582 0.019163 0.038326");
static IIO_CONST_ATTR(magn_scale_available, "0.001465");
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
"0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800");
static struct attribute *kmx61_acc_attributes[] = {
&iio_const_attr_accel_scale_available.dev_attr.attr,
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static struct attribute *kmx61_mag_attributes[] = {
&iio_const_attr_magn_scale_available.dev_attr.attr,
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group kmx61_acc_attribute_group = {
.attrs = kmx61_acc_attributes,
};
static const struct attribute_group kmx61_mag_attribute_group = {
.attrs = kmx61_mag_attributes,
};
static const struct iio_event_spec kmx61_event = {
.type = IIO_EV_TYPE_THRESH,
.dir = IIO_EV_DIR_EITHER,
.mask_separate = BIT(IIO_EV_INFO_VALUE) |
BIT(IIO_EV_INFO_ENABLE) |
BIT(IIO_EV_INFO_PERIOD),
};
#define KMX61_ACC_CHAN(_axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_ ## _axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = KMX61_ACC, \
.scan_index = KMX61_AXIS_ ## _axis, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_LE, \
}, \
.event_spec = &kmx61_event, \
.num_event_specs = 1 \
}
#define KMX61_MAG_CHAN(_axis) { \
.type = IIO_MAGN, \
.modified = 1, \
.channel2 = IIO_MOD_ ## _axis, \
.address = KMX61_MAG, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = KMX61_AXIS_ ## _axis, \
.scan_type = { \
.sign = 's', \
.realbits = 14, \
.storagebits = 16, \
.shift = 2, \
.endianness = IIO_LE, \
}, \
}
static const struct iio_chan_spec kmx61_acc_channels[] = {
KMX61_ACC_CHAN(X),
KMX61_ACC_CHAN(Y),
KMX61_ACC_CHAN(Z),
};
static const struct iio_chan_spec kmx61_mag_channels[] = {
KMX61_MAG_CHAN(X),
KMX61_MAG_CHAN(Y),
KMX61_MAG_CHAN(Z),
};
static void kmx61_set_data(struct iio_dev *indio_dev, struct kmx61_data *data)
{
struct kmx61_data **priv = iio_priv(indio_dev);
*priv = data;
}
static struct kmx61_data *kmx61_get_data(struct iio_dev *indio_dev)
{
return *(struct kmx61_data **)iio_priv(indio_dev);
}
static int kmx61_convert_freq_to_bit(int val, int val2)
{
int i;
for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
if (val == kmx61_samp_freq_table[i].val &&
val2 == kmx61_samp_freq_table[i].val2)
return i;
return -EINVAL;
}
static int kmx61_convert_wake_up_odr_to_bit(int val, int val2)
{
int i;
for (i = 0; i < ARRAY_SIZE(kmx61_wake_up_odr_table); ++i)
if (kmx61_wake_up_odr_table[i].val == val &&
kmx61_wake_up_odr_table[i].val2 == val2)
return kmx61_wake_up_odr_table[i].odr_bits;
return -EINVAL;
}
/**
* kmx61_set_mode() - set KMX61 device operating mode
* @data: kmx61 device private data pointer
* @mode: bitmask, indicating operating mode for @device
* @device: bitmask, indicating device for which @mode needs to be set
* @update: update stby bits stored in device's private @data
*
* For each sensor (accelerometer/magnetometer) there are two operating modes
* STANDBY and OPERATION. Neither accel nor magn can be disabled independently
* if they are both enabled. Internal sensors state is saved in acc_stby and
* mag_stby members of driver's private @data.
*/
static int kmx61_set_mode(struct kmx61_data *data, u8 mode, u8 device,
bool update)
{
int ret;
int acc_stby = -1, mag_stby = -1;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_stby\n");
return ret;
}
if (device & KMX61_ACC) {
if (mode & KMX61_ACC_STBY_BIT) {
ret |= KMX61_ACC_STBY_BIT;
acc_stby = 1;
} else {
ret &= ~KMX61_ACC_STBY_BIT;
acc_stby = 0;
}
}
if (device & KMX61_MAG) {
if (mode & KMX61_MAG_STBY_BIT) {
ret |= KMX61_MAG_STBY_BIT;
mag_stby = 1;
} else {
ret &= ~KMX61_MAG_STBY_BIT;
mag_stby = 0;
}
}
if (mode & KMX61_ACT_STBY_BIT)
ret |= KMX61_ACT_STBY_BIT;
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_STBY, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_stby\n");
return ret;
}
if (acc_stby != -1 && update)
data->acc_stby = acc_stby;
if (mag_stby != -1 && update)
data->mag_stby = mag_stby;
return 0;
}
static int kmx61_get_mode(struct kmx61_data *data, u8 *mode, u8 device)
{
int ret;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_stby\n");
return ret;
}
*mode = 0;
if (device & KMX61_ACC) {
if (ret & KMX61_ACC_STBY_BIT)
*mode |= KMX61_ACC_STBY_BIT;
else
*mode &= ~KMX61_ACC_STBY_BIT;
}
if (device & KMX61_MAG) {
if (ret & KMX61_MAG_STBY_BIT)
*mode |= KMX61_MAG_STBY_BIT;
else
*mode &= ~KMX61_MAG_STBY_BIT;
}
return 0;
}
static int kmx61_set_wake_up_odr(struct kmx61_data *data, int val, int val2)
{
int ret, odr_bits;
odr_bits = kmx61_convert_wake_up_odr_to_bit(val, val2);
if (odr_bits < 0)
return odr_bits;
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL2,
odr_bits);
if (ret < 0)
dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
return ret;
}
static int kmx61_set_odr(struct kmx61_data *data, int val, int val2, u8 device)
{
int ret;
u8 mode;
int lodr_bits, odr_bits;
ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
if (ret < 0)
return ret;
lodr_bits = kmx61_convert_freq_to_bit(val, val2);
if (lodr_bits < 0)
return lodr_bits;
/* To change ODR, accel and magn must be in STDBY */
ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
true);
if (ret < 0)
return ret;
odr_bits = 0;
if (device & KMX61_ACC)
odr_bits |= lodr_bits << KMX61_ACC_ODR_SHIFT;
if (device & KMX61_MAG)
odr_bits |= lodr_bits << KMX61_MAG_ODR_SHIFT;
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_ODCNTL,
odr_bits);
if (ret < 0)
return ret;
data->odr_bits = odr_bits;
if (device & KMX61_ACC) {
ret = kmx61_set_wake_up_odr(data, val, val2);
if (ret)
return ret;
}
return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
}
static int kmx61_get_odr(struct kmx61_data *data, int *val, int *val2,
u8 device)
{
u8 lodr_bits;
if (device & KMX61_ACC)
lodr_bits = (data->odr_bits >> KMX61_ACC_ODR_SHIFT) &
KMX61_ACC_ODR_MASK;
else if (device & KMX61_MAG)
lodr_bits = (data->odr_bits >> KMX61_MAG_ODR_SHIFT) &
KMX61_MAG_ODR_MASK;
else
return -EINVAL;
if (lodr_bits >= ARRAY_SIZE(kmx61_samp_freq_table))
return -EINVAL;
*val = kmx61_samp_freq_table[lodr_bits].val;
*val2 = kmx61_samp_freq_table[lodr_bits].val2;
return 0;
}
static int kmx61_set_range(struct kmx61_data *data, u8 range)
{
int ret;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
ret &= ~KMX61_REG_CTRL1_GSEL_MASK;
ret |= range & KMX61_REG_CTRL1_GSEL_MASK;
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
return ret;
}
data->range = range;
return 0;
}
static int kmx61_set_scale(struct kmx61_data *data, u16 uscale)
{
int ret, i;
u8 mode;
for (i = 0; i < ARRAY_SIZE(kmx61_uscale_table); i++) {
if (kmx61_uscale_table[i] == uscale) {
ret = kmx61_get_mode(data, &mode,
KMX61_ACC | KMX61_MAG);
if (ret < 0)
return ret;
ret = kmx61_set_mode(data, KMX61_ALL_STBY,
KMX61_ACC | KMX61_MAG, true);
if (ret < 0)
return ret;
ret = kmx61_set_range(data, i);
if (ret < 0)
return ret;
return kmx61_set_mode(data, mode,
KMX61_ACC | KMX61_MAG, true);
}
}
return -EINVAL;
}
static int kmx61_chip_init(struct kmx61_data *data)
{
int ret, val, val2;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_WHO_AM_I);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading who_am_i\n");
return ret;
}
if (ret != KMX61_CHIP_ID) {
dev_err(&data->client->dev,
"Wrong chip id, got %x expected %x\n",
ret, KMX61_CHIP_ID);
return -EINVAL;
}
/* set accel 12bit, 4g range */
ret = kmx61_set_range(data, KMX61_RANGE_4G);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_ODCNTL);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_odcntl\n");
return ret;
}
data->odr_bits = ret;
/*
* set output data rate for wake up (motion detection) function
* to match data rate for accelerometer sampling
*/
ret = kmx61_get_odr(data, &val, &val2, KMX61_ACC);
if (ret < 0)
return ret;
ret = kmx61_set_wake_up_odr(data, val, val2);
if (ret < 0)
return ret;
/* set acc/magn to OPERATION mode */
ret = kmx61_set_mode(data, 0, KMX61_ACC | KMX61_MAG, true);
if (ret < 0)
return ret;
data->wake_thresh = KMX61_DEFAULT_WAKE_THRESH;
data->wake_duration = KMX61_DEFAULT_WAKE_DURATION;
return 0;
}
static int kmx61_setup_new_data_interrupt(struct kmx61_data *data,
bool status, u8 device)
{
u8 mode;
int ret;
ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
if (ret < 0)
return ret;
ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
if (status) {
ret |= KMX61_REG_INC1_BIT_IEN;
if (device & KMX61_ACC)
ret |= KMX61_REG_INC1_BIT_DRDYA;
if (device & KMX61_MAG)
ret |= KMX61_REG_INC1_BIT_DRDYM;
} else {
ret &= ~KMX61_REG_INC1_BIT_IEN;
if (device & KMX61_ACC)
ret &= ~KMX61_REG_INC1_BIT_DRDYA;
if (device & KMX61_MAG)
ret &= ~KMX61_REG_INC1_BIT_DRDYM;
}
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
return ret;
}
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
if (status)
ret |= KMX61_REG_CTRL1_BIT_DRDYE;
else
ret &= ~KMX61_REG_CTRL1_BIT_DRDYE;
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
return ret;
}
return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
}
static int kmx61_chip_update_thresholds(struct kmx61_data *data)
{
int ret;
ret = i2c_smbus_write_byte_data(data->client,
KMX61_REG_WUF_TIMER,
data->wake_duration);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_wuf_timer\n");
return ret;
}
ret = i2c_smbus_write_byte_data(data->client,
KMX61_REG_WUF_THRESH,
data->wake_thresh);
if (ret < 0)
dev_err(&data->client->dev, "Error writing reg_wuf_thresh\n");
return ret;
}
static int kmx61_setup_any_motion_interrupt(struct kmx61_data *data,
bool status)
{
u8 mode;
int ret;
ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
if (ret < 0)
return ret;
ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
if (ret < 0)
return ret;
ret = kmx61_chip_update_thresholds(data);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_inc1\n");
return ret;
}
if (status)
ret |= (KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
else
ret &= ~(KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_inc1\n");
return ret;
}
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
return ret;
}
if (status)
ret |= KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE;
else
ret &= ~(KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE);
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
if (ret < 0) {
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
return ret;
}
mode |= KMX61_ACT_STBY_BIT;
return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
}
/**
* kmx61_set_power_state() - set power state for kmx61 @device
* @data: kmx61 device private pointer
* @on: power state to be set for @device
* @device: bitmask indicating device for which @on state needs to be set
*
* Notice that when ACC power state needs to be set to ON and MAG is in
* OPERATION then we know that kmx61_runtime_resume was already called
* so we must set ACC OPERATION mode here. The same happens when MAG power
* state needs to be set to ON and ACC is in OPERATION.
*/
static int kmx61_set_power_state(struct kmx61_data *data, bool on, u8 device)
{
#ifdef CONFIG_PM
int ret;
if (device & KMX61_ACC) {
if (on && !data->acc_ps && !data->mag_stby) {
ret = kmx61_set_mode(data, 0, KMX61_ACC, true);
if (ret < 0)
return ret;
}
data->acc_ps = on;
}
if (device & KMX61_MAG) {
if (on && !data->mag_ps && !data->acc_stby) {
ret = kmx61_set_mode(data, 0, KMX61_MAG, true);
if (ret < 0)
return ret;
}
data->mag_ps = on;
}
if (on) {
ret = pm_runtime_resume_and_get(&data->client->dev);
} else {
pm_runtime_mark_last_busy(&data->client->dev);
ret = pm_runtime_put_autosuspend(&data->client->dev);
}
if (ret < 0) {
dev_err(&data->client->dev,
"Failed: kmx61_set_power_state for %d, ret %d\n",
on, ret);
return ret;
}
#endif
return 0;
}
static int kmx61_read_measurement(struct kmx61_data *data, u8 base, u8 offset)
{
int ret;
u8 reg = base + offset * 2;
ret = i2c_smbus_read_word_data(data->client, reg);
if (ret < 0)
dev_err(&data->client->dev, "failed to read reg at %x\n", reg);
return ret;
}
static int kmx61_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
int ret;
u8 base_reg;
struct kmx61_data *data = kmx61_get_data(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_ACCEL:
base_reg = KMX61_ACC_XOUT_L;
break;
case IIO_MAGN:
base_reg = KMX61_MAG_XOUT_L;
break;
default:
return -EINVAL;
}
mutex_lock(&data->lock);
ret = kmx61_set_power_state(data, true, chan->address);
if (ret) {
mutex_unlock(&data->lock);
return ret;
}
ret = kmx61_read_measurement(data, base_reg, chan->scan_index);
if (ret < 0) {
kmx61_set_power_state(data, false, chan->address);
mutex_unlock(&data->lock);
return ret;
}
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
ret = kmx61_set_power_state(data, false, chan->address);
mutex_unlock(&data->lock);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
*val = 0;
*val2 = kmx61_uscale_table[data->range];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_MAGN:
/* 14 bits res, 1465 microGauss per magn count */
*val = 0;
*val2 = 1465;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
return -EINVAL;
mutex_lock(&data->lock);
ret = kmx61_get_odr(data, val, val2, chan->address);
mutex_unlock(&data->lock);
if (ret)
return -EINVAL;
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static int kmx61_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
int ret;
struct kmx61_data *data = kmx61_get_data(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
return -EINVAL;
mutex_lock(&data->lock);
ret = kmx61_set_odr(data, val, val2, chan->address);
mutex_unlock(&data->lock);
return ret;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
if (val != 0)
return -EINVAL;
mutex_lock(&data->lock);
ret = kmx61_set_scale(data, val2);
mutex_unlock(&data->lock);
return ret;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int kmx61_read_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct kmx61_data *data = kmx61_get_data(indio_dev);
*val2 = 0;
switch (info) {
case IIO_EV_INFO_VALUE:
*val = data->wake_thresh;
return IIO_VAL_INT;
case IIO_EV_INFO_PERIOD:
*val = data->wake_duration;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int kmx61_write_event(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct kmx61_data *data = kmx61_get_data(indio_dev);
if (data->ev_enable_state)
return -EBUSY;
switch (info) {
case IIO_EV_INFO_VALUE:
data->wake_thresh = val;
return IIO_VAL_INT;
case IIO_EV_INFO_PERIOD:
data->wake_duration = val;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int kmx61_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct kmx61_data *data = kmx61_get_data(indio_dev);
return data->ev_enable_state;
}
static int kmx61_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
int state)
{
struct kmx61_data *data = kmx61_get_data(indio_dev);
int ret = 0;
if (state && data->ev_enable_state)
return 0;
mutex_lock(&data->lock);
if (!state && data->motion_trig_on) {
data->ev_enable_state = false;
goto err_unlock;
}
ret = kmx61_set_power_state(data, state, KMX61_ACC);
if (ret < 0)
goto err_unlock;
ret = kmx61_setup_any_motion_interrupt(data, state);
if (ret < 0) {
kmx61_set_power_state(data, false, KMX61_ACC);
goto err_unlock;
}
data->ev_enable_state = state;
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int kmx61_acc_validate_trigger(struct iio_dev *indio_dev,
struct iio_trigger *trig)
{
struct kmx61_data *data = kmx61_get_data(indio_dev);
if (data->acc_dready_trig != trig && data->motion_trig != trig)
return -EINVAL;
return 0;
}
static int kmx61_mag_validate_trigger(struct iio_dev *indio_dev,
struct iio_trigger *trig)
{
struct kmx61_data *data = kmx61_get_data(indio_dev);
if (data->mag_dready_trig != trig)
return -EINVAL;
return 0;
}
static const struct iio_info kmx61_acc_info = {
.read_raw = kmx61_read_raw,
.write_raw = kmx61_write_raw,
.attrs = &kmx61_acc_attribute_group,
.read_event_value = kmx61_read_event,
.write_event_value = kmx61_write_event,
.read_event_config = kmx61_read_event_config,
.write_event_config = kmx61_write_event_config,
.validate_trigger = kmx61_acc_validate_trigger,
};
static const struct iio_info kmx61_mag_info = {
.read_raw = kmx61_read_raw,
.write_raw = kmx61_write_raw,
.attrs = &kmx61_mag_attribute_group,
.validate_trigger = kmx61_mag_validate_trigger,
};
static int kmx61_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
int ret = 0;
u8 device;
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct kmx61_data *data = kmx61_get_data(indio_dev);
mutex_lock(&data->lock);
if (!state && data->ev_enable_state && data->motion_trig_on) {
data->motion_trig_on = false;
goto err_unlock;
}
if (data->acc_dready_trig == trig || data->motion_trig == trig)
device = KMX61_ACC;
else
device = KMX61_MAG;
ret = kmx61_set_power_state(data, state, device);
if (ret < 0)
goto err_unlock;
if (data->acc_dready_trig == trig || data->mag_dready_trig == trig)
ret = kmx61_setup_new_data_interrupt(data, state, device);
else
ret = kmx61_setup_any_motion_interrupt(data, state);
if (ret < 0) {
kmx61_set_power_state(data, false, device);
goto err_unlock;
}
if (data->acc_dready_trig == trig)
data->acc_dready_trig_on = state;
else if (data->mag_dready_trig == trig)
data->mag_dready_trig_on = state;
else
data->motion_trig_on = state;
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static void kmx61_trig_reenable(struct iio_trigger *trig)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct kmx61_data *data = kmx61_get_data(indio_dev);
int ret;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
if (ret < 0)
dev_err(&data->client->dev, "Error reading reg_inl\n");
}
static const struct iio_trigger_ops kmx61_trigger_ops = {
.set_trigger_state = kmx61_data_rdy_trigger_set_state,
.reenable = kmx61_trig_reenable,
};
static irqreturn_t kmx61_event_handler(int irq, void *private)
{
struct kmx61_data *data = private;
struct iio_dev *indio_dev = data->acc_indio_dev;
int ret;
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS1);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ins1\n");
goto ack_intr;
}
if (ret & KMX61_REG_INS1_BIT_WUFS) {
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS2);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_ins2\n");
goto ack_intr;
}
if (ret & KMX61_REG_INS2_BIT_XN)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_FALLING),
0);
if (ret & KMX61_REG_INS2_BIT_XP)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_X,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_RISING),
0);
if (ret & KMX61_REG_INS2_BIT_YN)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_FALLING),
0);
if (ret & KMX61_REG_INS2_BIT_YP)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Y,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_RISING),
0);
if (ret & KMX61_REG_INS2_BIT_ZN)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_FALLING),
0);
if (ret & KMX61_REG_INS2_BIT_ZP)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL,
0,
IIO_MOD_Z,
IIO_EV_TYPE_THRESH,
IIO_EV_DIR_RISING),
0);
}
ack_intr:
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
if (ret < 0)
dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
ret |= KMX61_REG_CTRL1_BIT_RES;
ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
if (ret < 0)
dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
if (ret < 0)
dev_err(&data->client->dev, "Error reading reg_inl\n");
return IRQ_HANDLED;
}
static irqreturn_t kmx61_data_rdy_trig_poll(int irq, void *private)
{
struct kmx61_data *data = private;
if (data->acc_dready_trig_on)
iio_trigger_poll(data->acc_dready_trig);
if (data->mag_dready_trig_on)
iio_trigger_poll(data->mag_dready_trig);
if (data->motion_trig_on)
iio_trigger_poll(data->motion_trig);
if (data->ev_enable_state)
return IRQ_WAKE_THREAD;
return IRQ_HANDLED;
}
static irqreturn_t kmx61_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct kmx61_data *data = kmx61_get_data(indio_dev);
int bit, ret, i = 0;
u8 base;
s16 buffer[8];
if (indio_dev == data->acc_indio_dev)
base = KMX61_ACC_XOUT_L;
else
base = KMX61_MAG_XOUT_L;
mutex_lock(&data->lock);
for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) {
ret = kmx61_read_measurement(data, base, bit);
if (ret < 0) {
mutex_unlock(&data->lock);
goto err;
}
buffer[i++] = ret;
}
mutex_unlock(&data->lock);
iio_push_to_buffers(indio_dev, buffer);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static const char *kmx61_match_acpi_device(struct device *dev)
{
const struct acpi_device_id *id;
id = acpi_match_device(dev->driver->acpi_match_table, dev);
if (!id)
return NULL;
return dev_name(dev);
}
static struct iio_dev *kmx61_indiodev_setup(struct kmx61_data *data,
const struct iio_info *info,
const struct iio_chan_spec *chan,
int num_channels,
const char *name)
{
struct iio_dev *indio_dev;
indio_dev = devm_iio_device_alloc(&data->client->dev, sizeof(data));
if (!indio_dev)
return ERR_PTR(-ENOMEM);
kmx61_set_data(indio_dev, data);
indio_dev->channels = chan;
indio_dev->num_channels = num_channels;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = info;
return indio_dev;
}
static struct iio_trigger *kmx61_trigger_setup(struct kmx61_data *data,
struct iio_dev *indio_dev,
const char *tag)
{
struct iio_trigger *trig;
int ret;
trig = devm_iio_trigger_alloc(&data->client->dev,
"%s-%s-dev%d",
indio_dev->name,
tag,
iio_device_id(indio_dev));
if (!trig)
return ERR_PTR(-ENOMEM);
trig->ops = &kmx61_trigger_ops;
iio_trigger_set_drvdata(trig, indio_dev);
ret = iio_trigger_register(trig);
if (ret)
return ERR_PTR(ret);
return trig;
}
static int kmx61_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
int ret;
struct kmx61_data *data;
const char *name = NULL;
data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->client = client;
mutex_init(&data->lock);
if (id)
name = id->name;
else if (ACPI_HANDLE(&client->dev))
name = kmx61_match_acpi_device(&client->dev);
else
return -ENODEV;
data->acc_indio_dev =
kmx61_indiodev_setup(data, &kmx61_acc_info,
kmx61_acc_channels,
ARRAY_SIZE(kmx61_acc_channels),
name);
if (IS_ERR(data->acc_indio_dev))
return PTR_ERR(data->acc_indio_dev);
data->mag_indio_dev =
kmx61_indiodev_setup(data, &kmx61_mag_info,
kmx61_mag_channels,
ARRAY_SIZE(kmx61_mag_channels),
name);
if (IS_ERR(data->mag_indio_dev))
return PTR_ERR(data->mag_indio_dev);
ret = kmx61_chip_init(data);
if (ret < 0)
return ret;
if (client->irq > 0) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
kmx61_data_rdy_trig_poll,
kmx61_event_handler,
IRQF_TRIGGER_RISING,
KMX61_IRQ_NAME,
data);
if (ret)
goto err_chip_uninit;
data->acc_dready_trig =
kmx61_trigger_setup(data, data->acc_indio_dev,
"dready");
if (IS_ERR(data->acc_dready_trig)) {
ret = PTR_ERR(data->acc_dready_trig);
goto err_chip_uninit;
}
data->mag_dready_trig =
kmx61_trigger_setup(data, data->mag_indio_dev,
"dready");
if (IS_ERR(data->mag_dready_trig)) {
ret = PTR_ERR(data->mag_dready_trig);
goto err_trigger_unregister_acc_dready;
}
data->motion_trig =
kmx61_trigger_setup(data, data->acc_indio_dev,
"any-motion");
if (IS_ERR(data->motion_trig)) {
ret = PTR_ERR(data->motion_trig);
goto err_trigger_unregister_mag_dready;
}
ret = iio_triggered_buffer_setup(data->acc_indio_dev,
&iio_pollfunc_store_time,
kmx61_trigger_handler,
NULL);
if (ret < 0) {
dev_err(&data->client->dev,
"Failed to setup acc triggered buffer\n");
goto err_trigger_unregister_motion;
}
ret = iio_triggered_buffer_setup(data->mag_indio_dev,
&iio_pollfunc_store_time,
kmx61_trigger_handler,
NULL);
if (ret < 0) {
dev_err(&data->client->dev,
"Failed to setup mag triggered buffer\n");
goto err_buffer_cleanup_acc;
}
}
ret = pm_runtime_set_active(&client->dev);
if (ret < 0)
goto err_buffer_cleanup_mag;
pm_runtime_enable(&client->dev);
pm_runtime_set_autosuspend_delay(&client->dev, KMX61_SLEEP_DELAY_MS);
pm_runtime_use_autosuspend(&client->dev);
ret = iio_device_register(data->acc_indio_dev);
if (ret < 0) {
dev_err(&client->dev, "Failed to register acc iio device\n");
goto err_pm_cleanup;
}
ret = iio_device_register(data->mag_indio_dev);
if (ret < 0) {
dev_err(&client->dev, "Failed to register mag iio device\n");
goto err_iio_unregister_acc;
}
return 0;
err_iio_unregister_acc:
iio_device_unregister(data->acc_indio_dev);
err_pm_cleanup:
pm_runtime_dont_use_autosuspend(&client->dev);
pm_runtime_disable(&client->dev);
err_buffer_cleanup_mag:
if (client->irq > 0)
iio_triggered_buffer_cleanup(data->mag_indio_dev);
err_buffer_cleanup_acc:
if (client->irq > 0)
iio_triggered_buffer_cleanup(data->acc_indio_dev);
err_trigger_unregister_motion:
iio_trigger_unregister(data->motion_trig);
err_trigger_unregister_mag_dready:
iio_trigger_unregister(data->mag_dready_trig);
err_trigger_unregister_acc_dready:
iio_trigger_unregister(data->acc_dready_trig);
err_chip_uninit:
kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
return ret;
}
static void kmx61_remove(struct i2c_client *client)
{
struct kmx61_data *data = i2c_get_clientdata(client);
iio_device_unregister(data->acc_indio_dev);
iio_device_unregister(data->mag_indio_dev);
pm_runtime_disable(&client->dev);
pm_runtime_set_suspended(&client->dev);
if (client->irq > 0) {
iio_triggered_buffer_cleanup(data->acc_indio_dev);
iio_triggered_buffer_cleanup(data->mag_indio_dev);
iio_trigger_unregister(data->acc_dready_trig);
iio_trigger_unregister(data->mag_dready_trig);
iio_trigger_unregister(data->motion_trig);
}
mutex_lock(&data->lock);
kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
mutex_unlock(&data->lock);
}
static int kmx61_suspend(struct device *dev)
{
int ret;
struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
mutex_lock(&data->lock);
ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
false);
mutex_unlock(&data->lock);
return ret;
}
static int kmx61_resume(struct device *dev)
{
u8 stby = 0;
struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
if (data->acc_stby)
stby |= KMX61_ACC_STBY_BIT;
if (data->mag_stby)
stby |= KMX61_MAG_STBY_BIT;
return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
}
static int kmx61_runtime_suspend(struct device *dev)
{
struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
int ret;
mutex_lock(&data->lock);
ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
mutex_unlock(&data->lock);
return ret;
}
static int kmx61_runtime_resume(struct device *dev)
{
struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
u8 stby = 0;
if (!data->acc_ps)
stby |= KMX61_ACC_STBY_BIT;
if (!data->mag_ps)
stby |= KMX61_MAG_STBY_BIT;
return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
}
static const struct dev_pm_ops kmx61_pm_ops = {
SYSTEM_SLEEP_PM_OPS(kmx61_suspend, kmx61_resume)
RUNTIME_PM_OPS(kmx61_runtime_suspend, kmx61_runtime_resume, NULL)
};
static const struct acpi_device_id kmx61_acpi_match[] = {
{"KMX61021", 0},
{}
};
MODULE_DEVICE_TABLE(acpi, kmx61_acpi_match);
static const struct i2c_device_id kmx61_id[] = {
{"kmx611021", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, kmx61_id);
static struct i2c_driver kmx61_driver = {
.driver = {
.name = KMX61_DRV_NAME,
.acpi_match_table = ACPI_PTR(kmx61_acpi_match),
.pm = pm_ptr(&kmx61_pm_ops),
},
.probe = kmx61_probe,
.remove = kmx61_remove,
.id_table = kmx61_id,
};
module_i2c_driver(kmx61_driver);
MODULE_AUTHOR("Daniel Baluta <[email protected]>");
MODULE_DESCRIPTION("KMX61 accelerometer/magnetometer driver");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/iio/imu/kmx61.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Common library for ADIS16XXX devices
*
* Copyright 2012 Analog Devices Inc.
* Author: Lars-Peter Clausen <[email protected]>
*/
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/export.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/iio/imu/adis.h>
static int adis_data_rdy_trigger_set_state(struct iio_trigger *trig, bool state)
{
struct adis *adis = iio_trigger_get_drvdata(trig);
return adis_enable_irq(adis, state);
}
static const struct iio_trigger_ops adis_trigger_ops = {
.set_trigger_state = &adis_data_rdy_trigger_set_state,
};
static int adis_validate_irq_flag(struct adis *adis)
{
unsigned long direction = adis->irq_flag & IRQF_TRIGGER_MASK;
/* We cannot mask the interrupt so ensure it's not enabled at request */
if (adis->data->unmasked_drdy)
adis->irq_flag |= IRQF_NO_AUTOEN;
/*
* Typically this devices have data ready either on the rising edge or
* on the falling edge of the data ready pin. This checks enforces that
* one of those is set in the drivers... It defaults to
* IRQF_TRIGGER_RISING for backward compatibility with devices that
* don't support changing the pin polarity.
*/
if (direction == IRQF_TRIGGER_NONE) {
adis->irq_flag |= IRQF_TRIGGER_RISING;
return 0;
} else if (direction != IRQF_TRIGGER_RISING &&
direction != IRQF_TRIGGER_FALLING) {
dev_err(&adis->spi->dev, "Invalid IRQ mask: %08lx\n",
adis->irq_flag);
return -EINVAL;
}
return 0;
}
/**
* devm_adis_probe_trigger() - Sets up trigger for a managed adis device
* @adis: The adis device
* @indio_dev: The IIO device
*
* Returns 0 on success or a negative error code
*/
int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev)
{
int ret;
adis->trig = devm_iio_trigger_alloc(&adis->spi->dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!adis->trig)
return -ENOMEM;
adis->trig->ops = &adis_trigger_ops;
iio_trigger_set_drvdata(adis->trig, adis);
ret = adis_validate_irq_flag(adis);
if (ret)
return ret;
ret = devm_request_irq(&adis->spi->dev, adis->spi->irq,
&iio_trigger_generic_data_rdy_poll,
adis->irq_flag,
indio_dev->name,
adis->trig);
if (ret)
return ret;
return devm_iio_trigger_register(&adis->spi->dev, adis->trig);
}
EXPORT_SYMBOL_NS_GPL(devm_adis_probe_trigger, IIO_ADISLIB);
| linux-master | drivers/iio/imu/adis_trigger.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADIS16480 and similar IMUs driver
*
* Copyright 2012 Analog Devices Inc.
*/
#include <linux/clk.h>
#include <linux/bitfield.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/math.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/lcm.h>
#include <linux/property.h>
#include <linux/swab.h>
#include <linux/crc32.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/imu/adis.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/debugfs.h>
#define ADIS16480_PAGE_SIZE 0x80
#define ADIS16480_REG(page, reg) ((page) * ADIS16480_PAGE_SIZE + (reg))
#define ADIS16480_REG_PAGE_ID 0x00 /* Same address on each page */
#define ADIS16480_REG_SEQ_CNT ADIS16480_REG(0x00, 0x06)
#define ADIS16480_REG_SYS_E_FLA ADIS16480_REG(0x00, 0x08)
#define ADIS16480_REG_DIAG_STS ADIS16480_REG(0x00, 0x0A)
#define ADIS16480_REG_ALM_STS ADIS16480_REG(0x00, 0x0C)
#define ADIS16480_REG_TEMP_OUT ADIS16480_REG(0x00, 0x0E)
#define ADIS16480_REG_X_GYRO_OUT ADIS16480_REG(0x00, 0x10)
#define ADIS16480_REG_Y_GYRO_OUT ADIS16480_REG(0x00, 0x14)
#define ADIS16480_REG_Z_GYRO_OUT ADIS16480_REG(0x00, 0x18)
#define ADIS16480_REG_X_ACCEL_OUT ADIS16480_REG(0x00, 0x1C)
#define ADIS16480_REG_Y_ACCEL_OUT ADIS16480_REG(0x00, 0x20)
#define ADIS16480_REG_Z_ACCEL_OUT ADIS16480_REG(0x00, 0x24)
#define ADIS16480_REG_X_MAGN_OUT ADIS16480_REG(0x00, 0x28)
#define ADIS16480_REG_Y_MAGN_OUT ADIS16480_REG(0x00, 0x2A)
#define ADIS16480_REG_Z_MAGN_OUT ADIS16480_REG(0x00, 0x2C)
#define ADIS16480_REG_BAROM_OUT ADIS16480_REG(0x00, 0x2E)
#define ADIS16480_REG_X_DELTAANG_OUT ADIS16480_REG(0x00, 0x40)
#define ADIS16480_REG_Y_DELTAANG_OUT ADIS16480_REG(0x00, 0x44)
#define ADIS16480_REG_Z_DELTAANG_OUT ADIS16480_REG(0x00, 0x48)
#define ADIS16480_REG_X_DELTAVEL_OUT ADIS16480_REG(0x00, 0x4C)
#define ADIS16480_REG_Y_DELTAVEL_OUT ADIS16480_REG(0x00, 0x50)
#define ADIS16480_REG_Z_DELTAVEL_OUT ADIS16480_REG(0x00, 0x54)
#define ADIS16480_REG_PROD_ID ADIS16480_REG(0x00, 0x7E)
#define ADIS16480_REG_X_GYRO_SCALE ADIS16480_REG(0x02, 0x04)
#define ADIS16480_REG_Y_GYRO_SCALE ADIS16480_REG(0x02, 0x06)
#define ADIS16480_REG_Z_GYRO_SCALE ADIS16480_REG(0x02, 0x08)
#define ADIS16480_REG_X_ACCEL_SCALE ADIS16480_REG(0x02, 0x0A)
#define ADIS16480_REG_Y_ACCEL_SCALE ADIS16480_REG(0x02, 0x0C)
#define ADIS16480_REG_Z_ACCEL_SCALE ADIS16480_REG(0x02, 0x0E)
#define ADIS16480_REG_X_GYRO_BIAS ADIS16480_REG(0x02, 0x10)
#define ADIS16480_REG_Y_GYRO_BIAS ADIS16480_REG(0x02, 0x14)
#define ADIS16480_REG_Z_GYRO_BIAS ADIS16480_REG(0x02, 0x18)
#define ADIS16480_REG_X_ACCEL_BIAS ADIS16480_REG(0x02, 0x1C)
#define ADIS16480_REG_Y_ACCEL_BIAS ADIS16480_REG(0x02, 0x20)
#define ADIS16480_REG_Z_ACCEL_BIAS ADIS16480_REG(0x02, 0x24)
#define ADIS16480_REG_X_HARD_IRON ADIS16480_REG(0x02, 0x28)
#define ADIS16480_REG_Y_HARD_IRON ADIS16480_REG(0x02, 0x2A)
#define ADIS16480_REG_Z_HARD_IRON ADIS16480_REG(0x02, 0x2C)
#define ADIS16480_REG_BAROM_BIAS ADIS16480_REG(0x02, 0x40)
#define ADIS16480_REG_FLASH_CNT ADIS16480_REG(0x02, 0x7C)
#define ADIS16480_REG_GLOB_CMD ADIS16480_REG(0x03, 0x02)
#define ADIS16480_REG_FNCTIO_CTRL ADIS16480_REG(0x03, 0x06)
#define ADIS16480_REG_GPIO_CTRL ADIS16480_REG(0x03, 0x08)
#define ADIS16480_REG_CONFIG ADIS16480_REG(0x03, 0x0A)
#define ADIS16480_REG_DEC_RATE ADIS16480_REG(0x03, 0x0C)
#define ADIS16480_REG_SLP_CNT ADIS16480_REG(0x03, 0x10)
#define ADIS16480_REG_FILTER_BNK0 ADIS16480_REG(0x03, 0x16)
#define ADIS16480_REG_FILTER_BNK1 ADIS16480_REG(0x03, 0x18)
#define ADIS16480_REG_ALM_CNFG0 ADIS16480_REG(0x03, 0x20)
#define ADIS16480_REG_ALM_CNFG1 ADIS16480_REG(0x03, 0x22)
#define ADIS16480_REG_ALM_CNFG2 ADIS16480_REG(0x03, 0x24)
#define ADIS16480_REG_XG_ALM_MAGN ADIS16480_REG(0x03, 0x28)
#define ADIS16480_REG_YG_ALM_MAGN ADIS16480_REG(0x03, 0x2A)
#define ADIS16480_REG_ZG_ALM_MAGN ADIS16480_REG(0x03, 0x2C)
#define ADIS16480_REG_XA_ALM_MAGN ADIS16480_REG(0x03, 0x2E)
#define ADIS16480_REG_YA_ALM_MAGN ADIS16480_REG(0x03, 0x30)
#define ADIS16480_REG_ZA_ALM_MAGN ADIS16480_REG(0x03, 0x32)
#define ADIS16480_REG_XM_ALM_MAGN ADIS16480_REG(0x03, 0x34)
#define ADIS16480_REG_YM_ALM_MAGN ADIS16480_REG(0x03, 0x36)
#define ADIS16480_REG_ZM_ALM_MAGN ADIS16480_REG(0x03, 0x38)
#define ADIS16480_REG_BR_ALM_MAGN ADIS16480_REG(0x03, 0x3A)
#define ADIS16480_REG_FIRM_REV ADIS16480_REG(0x03, 0x78)
#define ADIS16480_REG_FIRM_DM ADIS16480_REG(0x03, 0x7A)
#define ADIS16480_REG_FIRM_Y ADIS16480_REG(0x03, 0x7C)
/*
* External clock scaling in PPS mode.
* Available only for ADIS1649x devices
*/
#define ADIS16495_REG_SYNC_SCALE ADIS16480_REG(0x03, 0x10)
#define ADIS16495_REG_BURST_CMD ADIS16480_REG(0x00, 0x7C)
#define ADIS16495_BURST_ID 0xA5A5
/* total number of segments in burst */
#define ADIS16495_BURST_MAX_DATA 20
/* spi max speed in burst mode */
#define ADIS16495_BURST_MAX_SPEED 6000000
#define ADIS16480_REG_SERIAL_NUM ADIS16480_REG(0x04, 0x20)
/* Each filter coefficent bank spans two pages */
#define ADIS16480_FIR_COEF(page) (x < 60 ? ADIS16480_REG(page, (x) + 8) : \
ADIS16480_REG((page) + 1, (x) - 60 + 8))
#define ADIS16480_FIR_COEF_A(x) ADIS16480_FIR_COEF(0x05, (x))
#define ADIS16480_FIR_COEF_B(x) ADIS16480_FIR_COEF(0x07, (x))
#define ADIS16480_FIR_COEF_C(x) ADIS16480_FIR_COEF(0x09, (x))
#define ADIS16480_FIR_COEF_D(x) ADIS16480_FIR_COEF(0x0B, (x))
/* ADIS16480_REG_FNCTIO_CTRL */
#define ADIS16480_DRDY_SEL_MSK GENMASK(1, 0)
#define ADIS16480_DRDY_SEL(x) FIELD_PREP(ADIS16480_DRDY_SEL_MSK, x)
#define ADIS16480_DRDY_POL_MSK BIT(2)
#define ADIS16480_DRDY_POL(x) FIELD_PREP(ADIS16480_DRDY_POL_MSK, x)
#define ADIS16480_DRDY_EN_MSK BIT(3)
#define ADIS16480_DRDY_EN(x) FIELD_PREP(ADIS16480_DRDY_EN_MSK, x)
#define ADIS16480_SYNC_SEL_MSK GENMASK(5, 4)
#define ADIS16480_SYNC_SEL(x) FIELD_PREP(ADIS16480_SYNC_SEL_MSK, x)
#define ADIS16480_SYNC_EN_MSK BIT(7)
#define ADIS16480_SYNC_EN(x) FIELD_PREP(ADIS16480_SYNC_EN_MSK, x)
#define ADIS16480_SYNC_MODE_MSK BIT(8)
#define ADIS16480_SYNC_MODE(x) FIELD_PREP(ADIS16480_SYNC_MODE_MSK, x)
struct adis16480_chip_info {
unsigned int num_channels;
const struct iio_chan_spec *channels;
unsigned int gyro_max_val;
unsigned int gyro_max_scale;
unsigned int accel_max_val;
unsigned int accel_max_scale;
unsigned int temp_scale;
unsigned int int_clk;
unsigned int max_dec_rate;
const unsigned int *filter_freqs;
bool has_pps_clk_mode;
bool has_sleep_cnt;
const struct adis_data adis_data;
};
enum adis16480_int_pin {
ADIS16480_PIN_DIO1,
ADIS16480_PIN_DIO2,
ADIS16480_PIN_DIO3,
ADIS16480_PIN_DIO4
};
enum adis16480_clock_mode {
ADIS16480_CLK_SYNC,
ADIS16480_CLK_PPS,
ADIS16480_CLK_INT
};
struct adis16480 {
const struct adis16480_chip_info *chip_info;
struct adis adis;
struct clk *ext_clk;
enum adis16480_clock_mode clk_mode;
unsigned int clk_freq;
/* Alignment needed for the timestamp */
__be16 data[ADIS16495_BURST_MAX_DATA] __aligned(8);
};
static const char * const adis16480_int_pin_names[4] = {
[ADIS16480_PIN_DIO1] = "DIO1",
[ADIS16480_PIN_DIO2] = "DIO2",
[ADIS16480_PIN_DIO3] = "DIO3",
[ADIS16480_PIN_DIO4] = "DIO4",
};
static bool low_rate_allow;
module_param(low_rate_allow, bool, 0444);
MODULE_PARM_DESC(low_rate_allow,
"Allow IMU rates below the minimum advisable when external clk is used in PPS mode (default: N)");
#ifdef CONFIG_DEBUG_FS
static ssize_t adis16480_show_firmware_revision(struct file *file,
char __user *userbuf, size_t count, loff_t *ppos)
{
struct adis16480 *adis16480 = file->private_data;
char buf[7];
size_t len;
u16 rev;
int ret;
ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_REV, &rev);
if (ret)
return ret;
len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
return simple_read_from_buffer(userbuf, count, ppos, buf, len);
}
static const struct file_operations adis16480_firmware_revision_fops = {
.open = simple_open,
.read = adis16480_show_firmware_revision,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static ssize_t adis16480_show_firmware_date(struct file *file,
char __user *userbuf, size_t count, loff_t *ppos)
{
struct adis16480 *adis16480 = file->private_data;
u16 md, year;
char buf[12];
size_t len;
int ret;
ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_Y, &year);
if (ret)
return ret;
ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_DM, &md);
if (ret)
return ret;
len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n",
md >> 8, md & 0xff, year);
return simple_read_from_buffer(userbuf, count, ppos, buf, len);
}
static const struct file_operations adis16480_firmware_date_fops = {
.open = simple_open,
.read = adis16480_show_firmware_date,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static int adis16480_show_serial_number(void *arg, u64 *val)
{
struct adis16480 *adis16480 = arg;
u16 serial;
int ret;
ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_SERIAL_NUM,
&serial);
if (ret)
return ret;
*val = serial;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16480_serial_number_fops,
adis16480_show_serial_number, NULL, "0x%.4llx\n");
static int adis16480_show_product_id(void *arg, u64 *val)
{
struct adis16480 *adis16480 = arg;
u16 prod_id;
int ret;
ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_PROD_ID,
&prod_id);
if (ret)
return ret;
*val = prod_id;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16480_product_id_fops,
adis16480_show_product_id, NULL, "%llu\n");
static int adis16480_show_flash_count(void *arg, u64 *val)
{
struct adis16480 *adis16480 = arg;
u32 flash_count;
int ret;
ret = adis_read_reg_32(&adis16480->adis, ADIS16480_REG_FLASH_CNT,
&flash_count);
if (ret)
return ret;
*val = flash_count;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16480_flash_count_fops,
adis16480_show_flash_count, NULL, "%lld\n");
static int adis16480_debugfs_init(struct iio_dev *indio_dev)
{
struct adis16480 *adis16480 = iio_priv(indio_dev);
struct dentry *d = iio_get_debugfs_dentry(indio_dev);
debugfs_create_file_unsafe("firmware_revision", 0400,
d, adis16480, &adis16480_firmware_revision_fops);
debugfs_create_file_unsafe("firmware_date", 0400,
d, adis16480, &adis16480_firmware_date_fops);
debugfs_create_file_unsafe("serial_number", 0400,
d, adis16480, &adis16480_serial_number_fops);
debugfs_create_file_unsafe("product_id", 0400,
d, adis16480, &adis16480_product_id_fops);
debugfs_create_file_unsafe("flash_count", 0400,
d, adis16480, &adis16480_flash_count_fops);
return 0;
}
#else
static int adis16480_debugfs_init(struct iio_dev *indio_dev)
{
return 0;
}
#endif
static int adis16480_set_freq(struct iio_dev *indio_dev, int val, int val2)
{
struct adis16480 *st = iio_priv(indio_dev);
unsigned int t, sample_rate = st->clk_freq;
int ret;
if (val < 0 || val2 < 0)
return -EINVAL;
t = val * 1000 + val2 / 1000;
if (t == 0)
return -EINVAL;
adis_dev_lock(&st->adis);
/*
* When using PPS mode, the input clock needs to be scaled so that we have an IMU
* sample rate between (optimally) 4000 and 4250. After this, we can use the
* decimation filter to lower the sampling rate in order to get what the user wants.
* Optimally, the user sample rate is a multiple of both the IMU sample rate and
* the input clock. Hence, calculating the sync_scale dynamically gives us better
* chances of achieving a perfect/integer value for DEC_RATE. The math here is:
* 1. lcm of the input clock and the desired output rate.
* 2. get the highest multiple of the previous result lower than the adis max rate.
* 3. The last result becomes the IMU sample rate. Use that to calculate SYNC_SCALE
* and DEC_RATE (to get the user output rate)
*/
if (st->clk_mode == ADIS16480_CLK_PPS) {
unsigned long scaled_rate = lcm(st->clk_freq, t);
int sync_scale;
/*
* If lcm is bigger than the IMU maximum sampling rate there's no perfect
* solution. In this case, we get the highest multiple of the input clock
* lower than the IMU max sample rate.
*/
if (scaled_rate > st->chip_info->int_clk)
scaled_rate = st->chip_info->int_clk / st->clk_freq * st->clk_freq;
else
scaled_rate = st->chip_info->int_clk / scaled_rate * scaled_rate;
/*
* This is not an hard requirement but it's not advised to run the IMU
* with a sample rate lower than 4000Hz due to possible undersampling
* issues. However, there are users that might really want to take the risk.
* Hence, we provide a module parameter for them. If set, we allow sample
* rates lower than 4KHz. By default, we won't allow this and we just roundup
* the rate to the next multiple of the input clock bigger than 4KHz. This
* is done like this as in some cases (when DEC_RATE is 0) might give
* us the closest value to the one desired by the user...
*/
if (scaled_rate < 4000000 && !low_rate_allow)
scaled_rate = roundup(4000000, st->clk_freq);
sync_scale = scaled_rate / st->clk_freq;
ret = __adis_write_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, sync_scale);
if (ret)
goto error;
sample_rate = scaled_rate;
}
t = DIV_ROUND_CLOSEST(sample_rate, t);
if (t)
t--;
if (t > st->chip_info->max_dec_rate)
t = st->chip_info->max_dec_rate;
ret = __adis_write_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, t);
error:
adis_dev_unlock(&st->adis);
return ret;
}
static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2)
{
struct adis16480 *st = iio_priv(indio_dev);
uint16_t t;
int ret;
unsigned int freq, sample_rate = st->clk_freq;
adis_dev_lock(&st->adis);
if (st->clk_mode == ADIS16480_CLK_PPS) {
u16 sync_scale;
ret = __adis_read_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, &sync_scale);
if (ret)
goto error;
sample_rate = st->clk_freq * sync_scale;
}
ret = __adis_read_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, &t);
if (ret)
goto error;
adis_dev_unlock(&st->adis);
freq = DIV_ROUND_CLOSEST(sample_rate, (t + 1));
*val = freq / 1000;
*val2 = (freq % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
error:
adis_dev_unlock(&st->adis);
return ret;
}
enum {
ADIS16480_SCAN_GYRO_X,
ADIS16480_SCAN_GYRO_Y,
ADIS16480_SCAN_GYRO_Z,
ADIS16480_SCAN_ACCEL_X,
ADIS16480_SCAN_ACCEL_Y,
ADIS16480_SCAN_ACCEL_Z,
ADIS16480_SCAN_MAGN_X,
ADIS16480_SCAN_MAGN_Y,
ADIS16480_SCAN_MAGN_Z,
ADIS16480_SCAN_BARO,
ADIS16480_SCAN_TEMP,
};
static const unsigned int adis16480_calibbias_regs[] = {
[ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_BIAS,
[ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_BIAS,
[ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_BIAS,
[ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_BIAS,
[ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_BIAS,
[ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_BIAS,
[ADIS16480_SCAN_MAGN_X] = ADIS16480_REG_X_HARD_IRON,
[ADIS16480_SCAN_MAGN_Y] = ADIS16480_REG_Y_HARD_IRON,
[ADIS16480_SCAN_MAGN_Z] = ADIS16480_REG_Z_HARD_IRON,
[ADIS16480_SCAN_BARO] = ADIS16480_REG_BAROM_BIAS,
};
static const unsigned int adis16480_calibscale_regs[] = {
[ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_SCALE,
[ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_SCALE,
[ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_SCALE,
[ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_SCALE,
[ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_SCALE,
[ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_SCALE,
};
static int adis16480_set_calibbias(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int bias)
{
unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
struct adis16480 *st = iio_priv(indio_dev);
switch (chan->type) {
case IIO_MAGN:
case IIO_PRESSURE:
if (bias < -0x8000 || bias >= 0x8000)
return -EINVAL;
return adis_write_reg_16(&st->adis, reg, bias);
case IIO_ANGL_VEL:
case IIO_ACCEL:
return adis_write_reg_32(&st->adis, reg, bias);
default:
break;
}
return -EINVAL;
}
static int adis16480_get_calibbias(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int *bias)
{
unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
struct adis16480 *st = iio_priv(indio_dev);
uint16_t val16;
uint32_t val32;
int ret;
switch (chan->type) {
case IIO_MAGN:
case IIO_PRESSURE:
ret = adis_read_reg_16(&st->adis, reg, &val16);
if (ret == 0)
*bias = sign_extend32(val16, 15);
break;
case IIO_ANGL_VEL:
case IIO_ACCEL:
ret = adis_read_reg_32(&st->adis, reg, &val32);
if (ret == 0)
*bias = sign_extend32(val32, 31);
break;
default:
ret = -EINVAL;
}
if (ret)
return ret;
return IIO_VAL_INT;
}
static int adis16480_set_calibscale(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int scale)
{
unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
struct adis16480 *st = iio_priv(indio_dev);
if (scale < -0x8000 || scale >= 0x8000)
return -EINVAL;
return adis_write_reg_16(&st->adis, reg, scale);
}
static int adis16480_get_calibscale(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int *scale)
{
unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
struct adis16480 *st = iio_priv(indio_dev);
uint16_t val16;
int ret;
ret = adis_read_reg_16(&st->adis, reg, &val16);
if (ret)
return ret;
*scale = sign_extend32(val16, 15);
return IIO_VAL_INT;
}
static const unsigned int adis16480_def_filter_freqs[] = {
310,
55,
275,
63,
};
static const unsigned int adis16495_def_filter_freqs[] = {
300,
100,
300,
100,
};
static const unsigned int ad16480_filter_data[][2] = {
[ADIS16480_SCAN_GYRO_X] = { ADIS16480_REG_FILTER_BNK0, 0 },
[ADIS16480_SCAN_GYRO_Y] = { ADIS16480_REG_FILTER_BNK0, 3 },
[ADIS16480_SCAN_GYRO_Z] = { ADIS16480_REG_FILTER_BNK0, 6 },
[ADIS16480_SCAN_ACCEL_X] = { ADIS16480_REG_FILTER_BNK0, 9 },
[ADIS16480_SCAN_ACCEL_Y] = { ADIS16480_REG_FILTER_BNK0, 12 },
[ADIS16480_SCAN_ACCEL_Z] = { ADIS16480_REG_FILTER_BNK1, 0 },
[ADIS16480_SCAN_MAGN_X] = { ADIS16480_REG_FILTER_BNK1, 3 },
[ADIS16480_SCAN_MAGN_Y] = { ADIS16480_REG_FILTER_BNK1, 6 },
[ADIS16480_SCAN_MAGN_Z] = { ADIS16480_REG_FILTER_BNK1, 9 },
};
static int adis16480_get_filter_freq(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int *freq)
{
struct adis16480 *st = iio_priv(indio_dev);
unsigned int enable_mask, offset, reg;
uint16_t val;
int ret;
reg = ad16480_filter_data[chan->scan_index][0];
offset = ad16480_filter_data[chan->scan_index][1];
enable_mask = BIT(offset + 2);
ret = adis_read_reg_16(&st->adis, reg, &val);
if (ret)
return ret;
if (!(val & enable_mask))
*freq = 0;
else
*freq = st->chip_info->filter_freqs[(val >> offset) & 0x3];
return IIO_VAL_INT;
}
static int adis16480_set_filter_freq(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, unsigned int freq)
{
struct adis16480 *st = iio_priv(indio_dev);
unsigned int enable_mask, offset, reg;
unsigned int diff, best_diff;
unsigned int i, best_freq;
uint16_t val;
int ret;
reg = ad16480_filter_data[chan->scan_index][0];
offset = ad16480_filter_data[chan->scan_index][1];
enable_mask = BIT(offset + 2);
adis_dev_lock(&st->adis);
ret = __adis_read_reg_16(&st->adis, reg, &val);
if (ret)
goto out_unlock;
if (freq == 0) {
val &= ~enable_mask;
} else {
best_freq = 0;
best_diff = st->chip_info->filter_freqs[0];
for (i = 0; i < ARRAY_SIZE(adis16480_def_filter_freqs); i++) {
if (st->chip_info->filter_freqs[i] >= freq) {
diff = st->chip_info->filter_freqs[i] - freq;
if (diff < best_diff) {
best_diff = diff;
best_freq = i;
}
}
}
val &= ~(0x3 << offset);
val |= best_freq << offset;
val |= enable_mask;
}
ret = __adis_write_reg_16(&st->adis, reg, val);
out_unlock:
adis_dev_unlock(&st->adis);
return ret;
}
static int adis16480_read_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int *val, int *val2, long info)
{
struct adis16480 *st = iio_priv(indio_dev);
unsigned int temp;
switch (info) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan, 0, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = st->chip_info->gyro_max_scale;
*val2 = st->chip_info->gyro_max_val;
return IIO_VAL_FRACTIONAL;
case IIO_ACCEL:
*val = st->chip_info->accel_max_scale;
*val2 = st->chip_info->accel_max_val;
return IIO_VAL_FRACTIONAL;
case IIO_MAGN:
*val = 0;
*val2 = 100; /* 0.0001 gauss */
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
/*
* +85 degrees Celsius = temp_max_scale
* +25 degrees Celsius = 0
* LSB, 25 degrees Celsius = 60 / temp_max_scale
*/
*val = st->chip_info->temp_scale / 1000;
*val2 = (st->chip_info->temp_scale % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_PRESSURE:
/*
* max scale is 1310 mbar
* max raw value is 32767 shifted for 32bits
*/
*val = 131; /* 1310mbar = 131 kPa */
*val2 = 32767 << 16;
return IIO_VAL_FRACTIONAL;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
/* Only the temperature channel has a offset */
temp = 25 * 1000000LL; /* 25 degree Celsius = 0x0000 */
*val = DIV_ROUND_CLOSEST_ULL(temp, st->chip_info->temp_scale);
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBBIAS:
return adis16480_get_calibbias(indio_dev, chan, val);
case IIO_CHAN_INFO_CALIBSCALE:
return adis16480_get_calibscale(indio_dev, chan, val);
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return adis16480_get_filter_freq(indio_dev, chan, val);
case IIO_CHAN_INFO_SAMP_FREQ:
return adis16480_get_freq(indio_dev, val, val2);
default:
return -EINVAL;
}
}
static int adis16480_write_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int val, int val2, long info)
{
switch (info) {
case IIO_CHAN_INFO_CALIBBIAS:
return adis16480_set_calibbias(indio_dev, chan, val);
case IIO_CHAN_INFO_CALIBSCALE:
return adis16480_set_calibscale(indio_dev, chan, val);
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return adis16480_set_filter_freq(indio_dev, chan, val);
case IIO_CHAN_INFO_SAMP_FREQ:
return adis16480_set_freq(indio_dev, val, val2);
default:
return -EINVAL;
}
}
#define ADIS16480_MOD_CHANNEL(_type, _mod, _address, _si, _info_sep, _bits) \
{ \
.type = (_type), \
.modified = 1, \
.channel2 = (_mod), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS) | \
_info_sep, \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (_address), \
.scan_index = (_si), \
.scan_type = { \
.sign = 's', \
.realbits = (_bits), \
.storagebits = (_bits), \
.endianness = IIO_BE, \
}, \
}
#define ADIS16480_GYRO_CHANNEL(_mod) \
ADIS16480_MOD_CHANNEL(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
ADIS16480_REG_ ## _mod ## _GYRO_OUT, ADIS16480_SCAN_GYRO_ ## _mod, \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
BIT(IIO_CHAN_INFO_CALIBSCALE), \
32)
#define ADIS16480_ACCEL_CHANNEL(_mod) \
ADIS16480_MOD_CHANNEL(IIO_ACCEL, IIO_MOD_ ## _mod, \
ADIS16480_REG_ ## _mod ## _ACCEL_OUT, ADIS16480_SCAN_ACCEL_ ## _mod, \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
BIT(IIO_CHAN_INFO_CALIBSCALE), \
32)
#define ADIS16480_MAGN_CHANNEL(_mod) \
ADIS16480_MOD_CHANNEL(IIO_MAGN, IIO_MOD_ ## _mod, \
ADIS16480_REG_ ## _mod ## _MAGN_OUT, ADIS16480_SCAN_MAGN_ ## _mod, \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
16)
#define ADIS16480_PRESSURE_CHANNEL() \
{ \
.type = IIO_PRESSURE, \
.indexed = 1, \
.channel = 0, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS) | \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = ADIS16480_REG_BAROM_OUT, \
.scan_index = ADIS16480_SCAN_BARO, \
.scan_type = { \
.sign = 's', \
.realbits = 32, \
.storagebits = 32, \
.endianness = IIO_BE, \
}, \
}
#define ADIS16480_TEMP_CHANNEL() { \
.type = IIO_TEMP, \
.indexed = 1, \
.channel = 0, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OFFSET), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = ADIS16480_REG_TEMP_OUT, \
.scan_index = ADIS16480_SCAN_TEMP, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec adis16480_channels[] = {
ADIS16480_GYRO_CHANNEL(X),
ADIS16480_GYRO_CHANNEL(Y),
ADIS16480_GYRO_CHANNEL(Z),
ADIS16480_ACCEL_CHANNEL(X),
ADIS16480_ACCEL_CHANNEL(Y),
ADIS16480_ACCEL_CHANNEL(Z),
ADIS16480_MAGN_CHANNEL(X),
ADIS16480_MAGN_CHANNEL(Y),
ADIS16480_MAGN_CHANNEL(Z),
ADIS16480_PRESSURE_CHANNEL(),
ADIS16480_TEMP_CHANNEL(),
IIO_CHAN_SOFT_TIMESTAMP(11)
};
static const struct iio_chan_spec adis16485_channels[] = {
ADIS16480_GYRO_CHANNEL(X),
ADIS16480_GYRO_CHANNEL(Y),
ADIS16480_GYRO_CHANNEL(Z),
ADIS16480_ACCEL_CHANNEL(X),
ADIS16480_ACCEL_CHANNEL(Y),
ADIS16480_ACCEL_CHANNEL(Z),
ADIS16480_TEMP_CHANNEL(),
IIO_CHAN_SOFT_TIMESTAMP(7)
};
enum adis16480_variant {
ADIS16375,
ADIS16480,
ADIS16485,
ADIS16488,
ADIS16490,
ADIS16495_1,
ADIS16495_2,
ADIS16495_3,
ADIS16497_1,
ADIS16497_2,
ADIS16497_3,
};
#define ADIS16480_DIAG_STAT_XGYRO_FAIL 0
#define ADIS16480_DIAG_STAT_YGYRO_FAIL 1
#define ADIS16480_DIAG_STAT_ZGYRO_FAIL 2
#define ADIS16480_DIAG_STAT_XACCL_FAIL 3
#define ADIS16480_DIAG_STAT_YACCL_FAIL 4
#define ADIS16480_DIAG_STAT_ZACCL_FAIL 5
#define ADIS16480_DIAG_STAT_XMAGN_FAIL 8
#define ADIS16480_DIAG_STAT_YMAGN_FAIL 9
#define ADIS16480_DIAG_STAT_ZMAGN_FAIL 10
#define ADIS16480_DIAG_STAT_BARO_FAIL 11
static const char * const adis16480_status_error_msgs[] = {
[ADIS16480_DIAG_STAT_XGYRO_FAIL] = "X-axis gyroscope self-test failure",
[ADIS16480_DIAG_STAT_YGYRO_FAIL] = "Y-axis gyroscope self-test failure",
[ADIS16480_DIAG_STAT_ZGYRO_FAIL] = "Z-axis gyroscope self-test failure",
[ADIS16480_DIAG_STAT_XACCL_FAIL] = "X-axis accelerometer self-test failure",
[ADIS16480_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
[ADIS16480_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
[ADIS16480_DIAG_STAT_XMAGN_FAIL] = "X-axis magnetometer self-test failure",
[ADIS16480_DIAG_STAT_YMAGN_FAIL] = "Y-axis magnetometer self-test failure",
[ADIS16480_DIAG_STAT_ZMAGN_FAIL] = "Z-axis magnetometer self-test failure",
[ADIS16480_DIAG_STAT_BARO_FAIL] = "Barometer self-test failure",
};
static int adis16480_enable_irq(struct adis *adis, bool enable);
#define ADIS16480_DATA(_prod_id, _timeouts, _burst_len) \
{ \
.diag_stat_reg = ADIS16480_REG_DIAG_STS, \
.glob_cmd_reg = ADIS16480_REG_GLOB_CMD, \
.prod_id_reg = ADIS16480_REG_PROD_ID, \
.prod_id = (_prod_id), \
.has_paging = true, \
.read_delay = 5, \
.write_delay = 5, \
.self_test_mask = BIT(1), \
.self_test_reg = ADIS16480_REG_GLOB_CMD, \
.status_error_msgs = adis16480_status_error_msgs, \
.status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) | \
BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) | \
BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) | \
BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) | \
BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) | \
BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) | \
BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) | \
BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) | \
BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) | \
BIT(ADIS16480_DIAG_STAT_BARO_FAIL), \
.enable_irq = adis16480_enable_irq, \
.timeouts = (_timeouts), \
.burst_reg_cmd = ADIS16495_REG_BURST_CMD, \
.burst_len = (_burst_len), \
.burst_max_speed_hz = ADIS16495_BURST_MAX_SPEED \
}
static const struct adis_timeout adis16485_timeouts = {
.reset_ms = 560,
.sw_reset_ms = 120,
.self_test_ms = 12,
};
static const struct adis_timeout adis16480_timeouts = {
.reset_ms = 560,
.sw_reset_ms = 560,
.self_test_ms = 12,
};
static const struct adis_timeout adis16495_timeouts = {
.reset_ms = 170,
.sw_reset_ms = 130,
.self_test_ms = 40,
};
static const struct adis_timeout adis16495_1_timeouts = {
.reset_ms = 250,
.sw_reset_ms = 210,
.self_test_ms = 20,
};
static const struct adis16480_chip_info adis16480_chip_info[] = {
[ADIS16375] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
/*
* Typically we do IIO_RAD_TO_DEGREE in the denominator, which
* is exactly the same as IIO_DEGREE_TO_RAD in numerator, since
* it gives better approximation. However, in this case we
* cannot do it since it would not fit in a 32bit variable.
*/
.gyro_max_val = 22887 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(300),
.accel_max_val = IIO_M_S_2_TO_G(21973 << 16),
.accel_max_scale = 18,
.temp_scale = 5650, /* 5.65 milli degree Celsius */
.int_clk = 2460000,
.max_dec_rate = 2048,
.has_sleep_cnt = true,
.filter_freqs = adis16480_def_filter_freqs,
.adis_data = ADIS16480_DATA(16375, &adis16485_timeouts, 0),
},
[ADIS16480] = {
.channels = adis16480_channels,
.num_channels = ARRAY_SIZE(adis16480_channels),
.gyro_max_val = 22500 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(450),
.accel_max_val = IIO_M_S_2_TO_G(12500 << 16),
.accel_max_scale = 10,
.temp_scale = 5650, /* 5.65 milli degree Celsius */
.int_clk = 2460000,
.max_dec_rate = 2048,
.has_sleep_cnt = true,
.filter_freqs = adis16480_def_filter_freqs,
.adis_data = ADIS16480_DATA(16480, &adis16480_timeouts, 0),
},
[ADIS16485] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 22500 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(450),
.accel_max_val = IIO_M_S_2_TO_G(20000 << 16),
.accel_max_scale = 5,
.temp_scale = 5650, /* 5.65 milli degree Celsius */
.int_clk = 2460000,
.max_dec_rate = 2048,
.has_sleep_cnt = true,
.filter_freqs = adis16480_def_filter_freqs,
.adis_data = ADIS16480_DATA(16485, &adis16485_timeouts, 0),
},
[ADIS16488] = {
.channels = adis16480_channels,
.num_channels = ARRAY_SIZE(adis16480_channels),
.gyro_max_val = 22500 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(450),
.accel_max_val = IIO_M_S_2_TO_G(22500 << 16),
.accel_max_scale = 18,
.temp_scale = 5650, /* 5.65 milli degree Celsius */
.int_clk = 2460000,
.max_dec_rate = 2048,
.has_sleep_cnt = true,
.filter_freqs = adis16480_def_filter_freqs,
.adis_data = ADIS16480_DATA(16488, &adis16485_timeouts, 0),
},
[ADIS16490] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 20000 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(100),
.accel_max_val = IIO_M_S_2_TO_G(16000 << 16),
.accel_max_scale = 8,
.temp_scale = 14285, /* 14.285 milli degree Celsius */
.int_clk = 4250000,
.max_dec_rate = 4250,
.filter_freqs = adis16495_def_filter_freqs,
.has_pps_clk_mode = true,
.adis_data = ADIS16480_DATA(16490, &adis16495_timeouts, 0),
},
[ADIS16495_1] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 20000 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(125),
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
.accel_max_scale = 8,
.temp_scale = 12500, /* 12.5 milli degree Celsius */
.int_clk = 4250000,
.max_dec_rate = 4250,
.filter_freqs = adis16495_def_filter_freqs,
.has_pps_clk_mode = true,
/* 20 elements of 16bits */
.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
ADIS16495_BURST_MAX_DATA * 2),
},
[ADIS16495_2] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 18000 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(450),
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
.accel_max_scale = 8,
.temp_scale = 12500, /* 12.5 milli degree Celsius */
.int_clk = 4250000,
.max_dec_rate = 4250,
.filter_freqs = adis16495_def_filter_freqs,
.has_pps_clk_mode = true,
/* 20 elements of 16bits */
.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
ADIS16495_BURST_MAX_DATA * 2),
},
[ADIS16495_3] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 20000 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(2000),
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
.accel_max_scale = 8,
.temp_scale = 12500, /* 12.5 milli degree Celsius */
.int_clk = 4250000,
.max_dec_rate = 4250,
.filter_freqs = adis16495_def_filter_freqs,
.has_pps_clk_mode = true,
/* 20 elements of 16bits */
.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
ADIS16495_BURST_MAX_DATA * 2),
},
[ADIS16497_1] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 20000 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(125),
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
.accel_max_scale = 40,
.temp_scale = 12500, /* 12.5 milli degree Celsius */
.int_clk = 4250000,
.max_dec_rate = 4250,
.filter_freqs = adis16495_def_filter_freqs,
.has_pps_clk_mode = true,
/* 20 elements of 16bits */
.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
ADIS16495_BURST_MAX_DATA * 2),
},
[ADIS16497_2] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 18000 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(450),
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
.accel_max_scale = 40,
.temp_scale = 12500, /* 12.5 milli degree Celsius */
.int_clk = 4250000,
.max_dec_rate = 4250,
.filter_freqs = adis16495_def_filter_freqs,
.has_pps_clk_mode = true,
/* 20 elements of 16bits */
.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
ADIS16495_BURST_MAX_DATA * 2),
},
[ADIS16497_3] = {
.channels = adis16485_channels,
.num_channels = ARRAY_SIZE(adis16485_channels),
.gyro_max_val = 20000 << 16,
.gyro_max_scale = IIO_DEGREE_TO_RAD(2000),
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
.accel_max_scale = 40,
.temp_scale = 12500, /* 12.5 milli degree Celsius */
.int_clk = 4250000,
.max_dec_rate = 4250,
.filter_freqs = adis16495_def_filter_freqs,
.has_pps_clk_mode = true,
/* 20 elements of 16bits */
.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
ADIS16495_BURST_MAX_DATA * 2),
},
};
static bool adis16480_validate_crc(const u16 *buf, const u8 n_elem, const u32 crc)
{
u32 crc_calc;
u16 crc_buf[15];
int j;
for (j = 0; j < n_elem; j++)
crc_buf[j] = swab16(buf[j]);
crc_calc = crc32(~0, crc_buf, n_elem * 2);
crc_calc ^= ~0;
return (crc == crc_calc);
}
static irqreturn_t adis16480_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adis16480 *st = iio_priv(indio_dev);
struct adis *adis = &st->adis;
struct device *dev = &adis->spi->dev;
int ret, bit, offset, i = 0;
__be16 *buffer;
u32 crc;
bool valid;
adis_dev_lock(adis);
if (adis->current_page != 0) {
adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
adis->tx[1] = 0;
ret = spi_write(adis->spi, adis->tx, 2);
if (ret) {
dev_err(dev, "Failed to change device page: %d\n", ret);
adis_dev_unlock(adis);
goto irq_done;
}
adis->current_page = 0;
}
ret = spi_sync(adis->spi, &adis->msg);
if (ret) {
dev_err(dev, "Failed to read data: %d\n", ret);
adis_dev_unlock(adis);
goto irq_done;
}
adis_dev_unlock(adis);
/*
* After making the burst request, the response can have one or two
* 16-bit responses containing the BURST_ID depending on the sclk. If
* clk > 3.6MHz, then we will have two BURST_ID in a row. If clk < 3MHZ,
* we have only one. To manage that variation, we use the transition from the
* BURST_ID to the SYS_E_FLAG register, which will not be equal to 0xA5A5. If
* we not find this variation in the first 4 segments, then the data should
* not be valid.
*/
buffer = adis->buffer;
for (offset = 0; offset < 4; offset++) {
u16 curr = be16_to_cpu(buffer[offset]);
u16 next = be16_to_cpu(buffer[offset + 1]);
if (curr == ADIS16495_BURST_ID && next != ADIS16495_BURST_ID) {
offset++;
break;
}
}
if (offset == 4) {
dev_err(dev, "Invalid burst data\n");
goto irq_done;
}
crc = be16_to_cpu(buffer[offset + 16]) << 16 | be16_to_cpu(buffer[offset + 15]);
valid = adis16480_validate_crc((u16 *)&buffer[offset], 15, crc);
if (!valid) {
dev_err(dev, "Invalid crc\n");
goto irq_done;
}
for_each_set_bit(bit, indio_dev->active_scan_mask, indio_dev->masklength) {
/*
* When burst mode is used, temperature is the first data
* channel in the sequence, but the temperature scan index
* is 10.
*/
switch (bit) {
case ADIS16480_SCAN_TEMP:
st->data[i++] = buffer[offset + 1];
break;
case ADIS16480_SCAN_GYRO_X ... ADIS16480_SCAN_ACCEL_Z:
/* The lower register data is sequenced first */
st->data[i++] = buffer[2 * bit + offset + 3];
st->data[i++] = buffer[2 * bit + offset + 2];
break;
}
}
iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp);
irq_done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static const struct iio_info adis16480_info = {
.read_raw = &adis16480_read_raw,
.write_raw = &adis16480_write_raw,
.update_scan_mode = adis_update_scan_mode,
.debugfs_reg_access = adis_debugfs_reg_access,
};
static int adis16480_stop_device(struct iio_dev *indio_dev)
{
struct adis16480 *st = iio_priv(indio_dev);
struct device *dev = &st->adis.spi->dev;
int ret;
ret = adis_write_reg_16(&st->adis, ADIS16480_REG_SLP_CNT, BIT(9));
if (ret)
dev_err(dev, "Could not power down device: %d\n", ret);
return ret;
}
static int adis16480_enable_irq(struct adis *adis, bool enable)
{
uint16_t val;
int ret;
ret = __adis_read_reg_16(adis, ADIS16480_REG_FNCTIO_CTRL, &val);
if (ret)
return ret;
val &= ~ADIS16480_DRDY_EN_MSK;
val |= ADIS16480_DRDY_EN(enable);
return __adis_write_reg_16(adis, ADIS16480_REG_FNCTIO_CTRL, val);
}
static int adis16480_config_irq_pin(struct adis16480 *st)
{
struct device *dev = &st->adis.spi->dev;
struct fwnode_handle *fwnode = dev_fwnode(dev);
struct irq_data *desc;
enum adis16480_int_pin pin;
unsigned int irq_type;
uint16_t val;
int i, irq = 0;
desc = irq_get_irq_data(st->adis.spi->irq);
if (!desc) {
dev_err(dev, "Could not find IRQ %d\n", irq);
return -EINVAL;
}
/* Disable data ready since the default after reset is on */
val = ADIS16480_DRDY_EN(0);
/*
* Get the interrupt from the devicetre by reading the interrupt-names
* property. If it is not specified, use DIO1 pin as default.
* According to the datasheet, the factory default assigns DIO2 as data
* ready signal. However, in the previous versions of the driver, DIO1
* pin was used. So, we should leave it as is since some devices might
* be expecting the interrupt on the wrong physical pin.
*/
pin = ADIS16480_PIN_DIO1;
for (i = 0; i < ARRAY_SIZE(adis16480_int_pin_names); i++) {
irq = fwnode_irq_get_byname(fwnode, adis16480_int_pin_names[i]);
if (irq > 0) {
pin = i;
break;
}
}
val |= ADIS16480_DRDY_SEL(pin);
/*
* Get the interrupt line behaviour. The data ready polarity can be
* configured as positive or negative, corresponding to
* IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING respectively.
*/
irq_type = irqd_get_trigger_type(desc);
if (irq_type == IRQ_TYPE_EDGE_RISING) { /* Default */
val |= ADIS16480_DRDY_POL(1);
} else if (irq_type == IRQ_TYPE_EDGE_FALLING) {
val |= ADIS16480_DRDY_POL(0);
} else {
dev_err(dev, "Invalid interrupt type 0x%x specified\n", irq_type);
return -EINVAL;
}
/* Write the data ready configuration to the FNCTIO_CTRL register */
return adis_write_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, val);
}
static int adis16480_fw_get_ext_clk_pin(struct adis16480 *st)
{
struct device *dev = &st->adis.spi->dev;
const char *ext_clk_pin;
enum adis16480_int_pin pin;
int i;
pin = ADIS16480_PIN_DIO2;
if (device_property_read_string(dev, "adi,ext-clk-pin", &ext_clk_pin))
goto clk_input_not_found;
for (i = 0; i < ARRAY_SIZE(adis16480_int_pin_names); i++) {
if (strcasecmp(ext_clk_pin, adis16480_int_pin_names[i]) == 0)
return i;
}
clk_input_not_found:
dev_info(dev, "clk input line not specified, using DIO2\n");
return pin;
}
static int adis16480_ext_clk_config(struct adis16480 *st, bool enable)
{
struct device *dev = &st->adis.spi->dev;
unsigned int mode, mask;
enum adis16480_int_pin pin;
uint16_t val;
int ret;
ret = adis_read_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, &val);
if (ret)
return ret;
pin = adis16480_fw_get_ext_clk_pin(st);
/*
* Each DIOx pin supports only one function at a time. When a single pin
* has two assignments, the enable bit for a lower priority function
* automatically resets to zero (disabling the lower priority function).
*/
if (pin == ADIS16480_DRDY_SEL(val))
dev_warn(dev, "DIO%x pin supports only one function at a time\n", pin + 1);
mode = ADIS16480_SYNC_EN(enable) | ADIS16480_SYNC_SEL(pin);
mask = ADIS16480_SYNC_EN_MSK | ADIS16480_SYNC_SEL_MSK;
/* Only ADIS1649x devices support pps ext clock mode */
if (st->chip_info->has_pps_clk_mode) {
mode |= ADIS16480_SYNC_MODE(st->clk_mode);
mask |= ADIS16480_SYNC_MODE_MSK;
}
val &= ~mask;
val |= mode;
ret = adis_write_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, val);
if (ret)
return ret;
return clk_prepare_enable(st->ext_clk);
}
static int adis16480_get_ext_clocks(struct adis16480 *st)
{
struct device *dev = &st->adis.spi->dev;
st->ext_clk = devm_clk_get_optional(dev, "sync");
if (IS_ERR(st->ext_clk))
return dev_err_probe(dev, PTR_ERR(st->ext_clk), "failed to get ext clk\n");
if (st->ext_clk) {
st->clk_mode = ADIS16480_CLK_SYNC;
return 0;
}
if (st->chip_info->has_pps_clk_mode) {
st->ext_clk = devm_clk_get_optional(dev, "pps");
if (IS_ERR(st->ext_clk))
return dev_err_probe(dev, PTR_ERR(st->ext_clk), "failed to get ext clk\n");
if (st->ext_clk) {
st->clk_mode = ADIS16480_CLK_PPS;
return 0;
}
}
st->clk_mode = ADIS16480_CLK_INT;
return 0;
}
static void adis16480_stop(void *data)
{
adis16480_stop_device(data);
}
static void adis16480_clk_disable(void *data)
{
clk_disable_unprepare(data);
}
static int adis16480_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
const struct adis_data *adis16480_data;
irq_handler_t trigger_handler = NULL;
struct device *dev = &spi->dev;
struct iio_dev *indio_dev;
struct adis16480 *st;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (indio_dev == NULL)
return -ENOMEM;
st = iio_priv(indio_dev);
st->chip_info = &adis16480_chip_info[id->driver_data];
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->channels = st->chip_info->channels;
indio_dev->num_channels = st->chip_info->num_channels;
indio_dev->info = &adis16480_info;
indio_dev->modes = INDIO_DIRECT_MODE;
adis16480_data = &st->chip_info->adis_data;
ret = adis_init(&st->adis, indio_dev, spi, adis16480_data);
if (ret)
return ret;
ret = __adis_initial_startup(&st->adis);
if (ret)
return ret;
if (st->chip_info->has_sleep_cnt) {
ret = devm_add_action_or_reset(dev, adis16480_stop, indio_dev);
if (ret)
return ret;
}
ret = adis16480_config_irq_pin(st);
if (ret)
return ret;
ret = adis16480_get_ext_clocks(st);
if (ret)
return ret;
if (st->ext_clk) {
ret = adis16480_ext_clk_config(st, true);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, adis16480_clk_disable, st->ext_clk);
if (ret)
return ret;
st->clk_freq = clk_get_rate(st->ext_clk);
st->clk_freq *= 1000; /* micro */
if (st->clk_mode == ADIS16480_CLK_PPS) {
u16 sync_scale;
/*
* In PPS mode, the IMU sample rate is the clk_freq * sync_scale. Hence,
* default the IMU sample rate to the highest multiple of the input clock
* lower than the IMU max sample rate. The internal sample rate is the
* max...
*/
sync_scale = st->chip_info->int_clk / st->clk_freq;
ret = __adis_write_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, sync_scale);
if (ret)
return ret;
}
} else {
st->clk_freq = st->chip_info->int_clk;
}
/* Only use our trigger handler if burst mode is supported */
if (adis16480_data->burst_len)
trigger_handler = adis16480_trigger_handler;
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
trigger_handler);
if (ret)
return ret;
ret = devm_iio_device_register(dev, indio_dev);
if (ret)
return ret;
adis16480_debugfs_init(indio_dev);
return 0;
}
static const struct spi_device_id adis16480_ids[] = {
{ "adis16375", ADIS16375 },
{ "adis16480", ADIS16480 },
{ "adis16485", ADIS16485 },
{ "adis16488", ADIS16488 },
{ "adis16490", ADIS16490 },
{ "adis16495-1", ADIS16495_1 },
{ "adis16495-2", ADIS16495_2 },
{ "adis16495-3", ADIS16495_3 },
{ "adis16497-1", ADIS16497_1 },
{ "adis16497-2", ADIS16497_2 },
{ "adis16497-3", ADIS16497_3 },
{ }
};
MODULE_DEVICE_TABLE(spi, adis16480_ids);
static const struct of_device_id adis16480_of_match[] = {
{ .compatible = "adi,adis16375" },
{ .compatible = "adi,adis16480" },
{ .compatible = "adi,adis16485" },
{ .compatible = "adi,adis16488" },
{ .compatible = "adi,adis16490" },
{ .compatible = "adi,adis16495-1" },
{ .compatible = "adi,adis16495-2" },
{ .compatible = "adi,adis16495-3" },
{ .compatible = "adi,adis16497-1" },
{ .compatible = "adi,adis16497-2" },
{ .compatible = "adi,adis16497-3" },
{ },
};
MODULE_DEVICE_TABLE(of, adis16480_of_match);
static struct spi_driver adis16480_driver = {
.driver = {
.name = "adis16480",
.of_match_table = adis16480_of_match,
},
.id_table = adis16480_ids,
.probe = adis16480_probe,
};
module_spi_driver(adis16480_driver);
MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16480 IMU driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/imu/adis16480.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Common library for ADIS16XXX devices
*
* Copyright 2012 Analog Devices Inc.
* Author: Lars-Peter Clausen <[email protected]>
*/
#include <linux/export.h>
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/imu/adis.h>
static int adis_update_scan_mode_burst(struct iio_dev *indio_dev,
const unsigned long *scan_mask)
{
struct adis *adis = iio_device_get_drvdata(indio_dev);
unsigned int burst_length, burst_max_length;
u8 *tx;
burst_length = adis->data->burst_len + adis->burst_extra_len;
if (adis->data->burst_max_len)
burst_max_length = adis->data->burst_max_len;
else
burst_max_length = burst_length;
adis->xfer = kcalloc(2, sizeof(*adis->xfer), GFP_KERNEL);
if (!adis->xfer)
return -ENOMEM;
adis->buffer = kzalloc(burst_max_length + sizeof(u16), GFP_KERNEL);
if (!adis->buffer) {
kfree(adis->xfer);
adis->xfer = NULL;
return -ENOMEM;
}
tx = adis->buffer + burst_max_length;
tx[0] = ADIS_READ_REG(adis->data->burst_reg_cmd);
tx[1] = 0;
adis->xfer[0].tx_buf = tx;
adis->xfer[0].bits_per_word = 8;
adis->xfer[0].len = 2;
if (adis->data->burst_max_speed_hz)
adis->xfer[0].speed_hz = adis->data->burst_max_speed_hz;
adis->xfer[1].rx_buf = adis->buffer;
adis->xfer[1].bits_per_word = 8;
adis->xfer[1].len = burst_length;
if (adis->data->burst_max_speed_hz)
adis->xfer[1].speed_hz = adis->data->burst_max_speed_hz;
spi_message_init(&adis->msg);
spi_message_add_tail(&adis->xfer[0], &adis->msg);
spi_message_add_tail(&adis->xfer[1], &adis->msg);
return 0;
}
int adis_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *scan_mask)
{
struct adis *adis = iio_device_get_drvdata(indio_dev);
const struct iio_chan_spec *chan;
unsigned int scan_count;
unsigned int i, j;
__be16 *tx, *rx;
kfree(adis->xfer);
kfree(adis->buffer);
if (adis->data->burst_len)
return adis_update_scan_mode_burst(indio_dev, scan_mask);
scan_count = indio_dev->scan_bytes / 2;
adis->xfer = kcalloc(scan_count + 1, sizeof(*adis->xfer), GFP_KERNEL);
if (!adis->xfer)
return -ENOMEM;
adis->buffer = kcalloc(indio_dev->scan_bytes, 2, GFP_KERNEL);
if (!adis->buffer) {
kfree(adis->xfer);
adis->xfer = NULL;
return -ENOMEM;
}
rx = adis->buffer;
tx = rx + scan_count;
spi_message_init(&adis->msg);
for (j = 0; j <= scan_count; j++) {
adis->xfer[j].bits_per_word = 8;
if (j != scan_count)
adis->xfer[j].cs_change = 1;
adis->xfer[j].len = 2;
adis->xfer[j].delay.value = adis->data->read_delay;
adis->xfer[j].delay.unit = SPI_DELAY_UNIT_USECS;
if (j < scan_count)
adis->xfer[j].tx_buf = &tx[j];
if (j >= 1)
adis->xfer[j].rx_buf = &rx[j - 1];
spi_message_add_tail(&adis->xfer[j], &adis->msg);
}
chan = indio_dev->channels;
for (i = 0; i < indio_dev->num_channels; i++, chan++) {
if (!test_bit(chan->scan_index, scan_mask))
continue;
if (chan->scan_type.storagebits == 32)
*tx++ = cpu_to_be16((chan->address + 2) << 8);
*tx++ = cpu_to_be16(chan->address << 8);
}
return 0;
}
EXPORT_SYMBOL_NS_GPL(adis_update_scan_mode, IIO_ADISLIB);
static irqreturn_t adis_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adis *adis = iio_device_get_drvdata(indio_dev);
int ret;
if (adis->data->has_paging) {
mutex_lock(&adis->state_lock);
if (adis->current_page != 0) {
adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
adis->tx[1] = 0;
ret = spi_write(adis->spi, adis->tx, 2);
if (ret) {
dev_err(&adis->spi->dev, "Failed to change device page: %d\n", ret);
mutex_unlock(&adis->state_lock);
goto irq_done;
}
adis->current_page = 0;
}
}
ret = spi_sync(adis->spi, &adis->msg);
if (adis->data->has_paging)
mutex_unlock(&adis->state_lock);
if (ret) {
dev_err(&adis->spi->dev, "Failed to read data: %d", ret);
goto irq_done;
}
iio_push_to_buffers_with_timestamp(indio_dev, adis->buffer,
pf->timestamp);
irq_done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static void adis_buffer_cleanup(void *arg)
{
struct adis *adis = arg;
kfree(adis->buffer);
kfree(adis->xfer);
}
/**
* devm_adis_setup_buffer_and_trigger() - Sets up buffer and trigger for
* the managed adis device
* @adis: The adis device
* @indio_dev: The IIO device
* @trigger_handler: Optional trigger handler, may be NULL.
*
* Returns 0 on success, a negative error code otherwise.
*
* This function sets up the buffer and trigger for a adis devices. If
* 'trigger_handler' is NULL the default trigger handler will be used. The
* default trigger handler will simply read the registers assigned to the
* currently active channels.
*/
int
devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
irq_handler_t trigger_handler)
{
int ret;
if (!trigger_handler)
trigger_handler = adis_trigger_handler;
ret = devm_iio_triggered_buffer_setup(&adis->spi->dev, indio_dev,
&iio_pollfunc_store_time,
trigger_handler, NULL);
if (ret)
return ret;
if (adis->spi->irq) {
ret = devm_adis_probe_trigger(adis, indio_dev);
if (ret)
return ret;
}
return devm_add_action_or_reset(&adis->spi->dev, adis_buffer_cleanup,
adis);
}
EXPORT_SYMBOL_NS_GPL(devm_adis_setup_buffer_and_trigger, IIO_ADISLIB);
| linux-master | drivers/iio/imu/adis_buffer.c |
// SPDX-License-Identifier: GPL-2.0+
/*
* ADIS16460 IMU driver
*
* Copyright 2019 Analog Devices Inc.
*/
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#include <linux/debugfs.h>
#define ADIS16460_REG_FLASH_CNT 0x00
#define ADIS16460_REG_DIAG_STAT 0x02
#define ADIS16460_REG_X_GYRO_LOW 0x04
#define ADIS16460_REG_X_GYRO_OUT 0x06
#define ADIS16460_REG_Y_GYRO_LOW 0x08
#define ADIS16460_REG_Y_GYRO_OUT 0x0A
#define ADIS16460_REG_Z_GYRO_LOW 0x0C
#define ADIS16460_REG_Z_GYRO_OUT 0x0E
#define ADIS16460_REG_X_ACCL_LOW 0x10
#define ADIS16460_REG_X_ACCL_OUT 0x12
#define ADIS16460_REG_Y_ACCL_LOW 0x14
#define ADIS16460_REG_Y_ACCL_OUT 0x16
#define ADIS16460_REG_Z_ACCL_LOW 0x18
#define ADIS16460_REG_Z_ACCL_OUT 0x1A
#define ADIS16460_REG_SMPL_CNTR 0x1C
#define ADIS16460_REG_TEMP_OUT 0x1E
#define ADIS16460_REG_X_DELT_ANG 0x24
#define ADIS16460_REG_Y_DELT_ANG 0x26
#define ADIS16460_REG_Z_DELT_ANG 0x28
#define ADIS16460_REG_X_DELT_VEL 0x2A
#define ADIS16460_REG_Y_DELT_VEL 0x2C
#define ADIS16460_REG_Z_DELT_VEL 0x2E
#define ADIS16460_REG_MSC_CTRL 0x32
#define ADIS16460_REG_SYNC_SCAL 0x34
#define ADIS16460_REG_DEC_RATE 0x36
#define ADIS16460_REG_FLTR_CTRL 0x38
#define ADIS16460_REG_GLOB_CMD 0x3E
#define ADIS16460_REG_X_GYRO_OFF 0x40
#define ADIS16460_REG_Y_GYRO_OFF 0x42
#define ADIS16460_REG_Z_GYRO_OFF 0x44
#define ADIS16460_REG_X_ACCL_OFF 0x46
#define ADIS16460_REG_Y_ACCL_OFF 0x48
#define ADIS16460_REG_Z_ACCL_OFF 0x4A
#define ADIS16460_REG_LOT_ID1 0x52
#define ADIS16460_REG_LOT_ID2 0x54
#define ADIS16460_REG_PROD_ID 0x56
#define ADIS16460_REG_SERIAL_NUM 0x58
#define ADIS16460_REG_CAL_SGNTR 0x60
#define ADIS16460_REG_CAL_CRC 0x62
#define ADIS16460_REG_CODE_SGNTR 0x64
#define ADIS16460_REG_CODE_CRC 0x66
struct adis16460_chip_info {
unsigned int num_channels;
const struct iio_chan_spec *channels;
unsigned int gyro_max_val;
unsigned int gyro_max_scale;
unsigned int accel_max_val;
unsigned int accel_max_scale;
};
struct adis16460 {
const struct adis16460_chip_info *chip_info;
struct adis adis;
};
#ifdef CONFIG_DEBUG_FS
static int adis16460_show_serial_number(void *arg, u64 *val)
{
struct adis16460 *adis16460 = arg;
u16 serial;
int ret;
ret = adis_read_reg_16(&adis16460->adis, ADIS16460_REG_SERIAL_NUM,
&serial);
if (ret)
return ret;
*val = serial;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16460_serial_number_fops,
adis16460_show_serial_number, NULL, "0x%.4llx\n");
static int adis16460_show_product_id(void *arg, u64 *val)
{
struct adis16460 *adis16460 = arg;
u16 prod_id;
int ret;
ret = adis_read_reg_16(&adis16460->adis, ADIS16460_REG_PROD_ID,
&prod_id);
if (ret)
return ret;
*val = prod_id;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16460_product_id_fops,
adis16460_show_product_id, NULL, "%llu\n");
static int adis16460_show_flash_count(void *arg, u64 *val)
{
struct adis16460 *adis16460 = arg;
u32 flash_count;
int ret;
ret = adis_read_reg_32(&adis16460->adis, ADIS16460_REG_FLASH_CNT,
&flash_count);
if (ret)
return ret;
*val = flash_count;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(adis16460_flash_count_fops,
adis16460_show_flash_count, NULL, "%lld\n");
static int adis16460_debugfs_init(struct iio_dev *indio_dev)
{
struct adis16460 *adis16460 = iio_priv(indio_dev);
struct dentry *d = iio_get_debugfs_dentry(indio_dev);
debugfs_create_file_unsafe("serial_number", 0400,
d, adis16460, &adis16460_serial_number_fops);
debugfs_create_file_unsafe("product_id", 0400,
d, adis16460, &adis16460_product_id_fops);
debugfs_create_file_unsafe("flash_count", 0400,
d, adis16460, &adis16460_flash_count_fops);
return 0;
}
#else
static int adis16460_debugfs_init(struct iio_dev *indio_dev)
{
return 0;
}
#endif
static int adis16460_set_freq(struct iio_dev *indio_dev, int val, int val2)
{
struct adis16460 *st = iio_priv(indio_dev);
int t;
t = val * 1000 + val2 / 1000;
if (t <= 0)
return -EINVAL;
t = 2048000 / t;
if (t > 2048)
t = 2048;
if (t != 0)
t--;
return adis_write_reg_16(&st->adis, ADIS16460_REG_DEC_RATE, t);
}
static int adis16460_get_freq(struct iio_dev *indio_dev, int *val, int *val2)
{
struct adis16460 *st = iio_priv(indio_dev);
uint16_t t;
int ret;
unsigned int freq;
ret = adis_read_reg_16(&st->adis, ADIS16460_REG_DEC_RATE, &t);
if (ret)
return ret;
freq = 2048000 / (t + 1);
*val = freq / 1000;
*val2 = (freq % 1000) * 1000;
return IIO_VAL_INT_PLUS_MICRO;
}
static int adis16460_read_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int *val, int *val2, long info)
{
struct adis16460 *st = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan, 0, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*val = st->chip_info->gyro_max_scale;
*val2 = st->chip_info->gyro_max_val;
return IIO_VAL_FRACTIONAL;
case IIO_ACCEL:
*val = st->chip_info->accel_max_scale;
*val2 = st->chip_info->accel_max_val;
return IIO_VAL_FRACTIONAL;
case IIO_TEMP:
*val = 50; /* 50 milli degrees Celsius/LSB */
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
*val = 500; /* 25 degrees Celsius = 0x0000 */
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
return adis16460_get_freq(indio_dev, val, val2);
default:
return -EINVAL;
}
}
static int adis16460_write_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, int val, int val2, long info)
{
switch (info) {
case IIO_CHAN_INFO_SAMP_FREQ:
return adis16460_set_freq(indio_dev, val, val2);
default:
return -EINVAL;
}
}
enum {
ADIS16460_SCAN_GYRO_X,
ADIS16460_SCAN_GYRO_Y,
ADIS16460_SCAN_GYRO_Z,
ADIS16460_SCAN_ACCEL_X,
ADIS16460_SCAN_ACCEL_Y,
ADIS16460_SCAN_ACCEL_Z,
ADIS16460_SCAN_TEMP,
};
#define ADIS16460_MOD_CHANNEL(_type, _mod, _address, _si, _bits) \
{ \
.type = (_type), \
.modified = 1, \
.channel2 = (_mod), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = (_address), \
.scan_index = (_si), \
.scan_type = { \
.sign = 's', \
.realbits = (_bits), \
.storagebits = (_bits), \
.endianness = IIO_BE, \
}, \
}
#define ADIS16460_GYRO_CHANNEL(_mod) \
ADIS16460_MOD_CHANNEL(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
ADIS16460_REG_ ## _mod ## _GYRO_LOW, ADIS16460_SCAN_GYRO_ ## _mod, \
32)
#define ADIS16460_ACCEL_CHANNEL(_mod) \
ADIS16460_MOD_CHANNEL(IIO_ACCEL, IIO_MOD_ ## _mod, \
ADIS16460_REG_ ## _mod ## _ACCL_LOW, ADIS16460_SCAN_ACCEL_ ## _mod, \
32)
#define ADIS16460_TEMP_CHANNEL() { \
.type = IIO_TEMP, \
.indexed = 1, \
.channel = 0, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OFFSET), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.address = ADIS16460_REG_TEMP_OUT, \
.scan_index = ADIS16460_SCAN_TEMP, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec adis16460_channels[] = {
ADIS16460_GYRO_CHANNEL(X),
ADIS16460_GYRO_CHANNEL(Y),
ADIS16460_GYRO_CHANNEL(Z),
ADIS16460_ACCEL_CHANNEL(X),
ADIS16460_ACCEL_CHANNEL(Y),
ADIS16460_ACCEL_CHANNEL(Z),
ADIS16460_TEMP_CHANNEL(),
IIO_CHAN_SOFT_TIMESTAMP(7)
};
static const struct adis16460_chip_info adis16460_chip_info = {
.channels = adis16460_channels,
.num_channels = ARRAY_SIZE(adis16460_channels),
/*
* storing the value in rad/degree and the scale in degree
* gives us the result in rad and better precession than
* storing the scale directly in rad.
*/
.gyro_max_val = IIO_RAD_TO_DEGREE(200 << 16),
.gyro_max_scale = 1,
.accel_max_val = IIO_M_S_2_TO_G(20000 << 16),
.accel_max_scale = 5,
};
static const struct iio_info adis16460_info = {
.read_raw = &adis16460_read_raw,
.write_raw = &adis16460_write_raw,
.update_scan_mode = adis_update_scan_mode,
.debugfs_reg_access = adis_debugfs_reg_access,
};
#define ADIS16460_DIAG_STAT_IN_CLK_OOS 7
#define ADIS16460_DIAG_STAT_FLASH_MEM 6
#define ADIS16460_DIAG_STAT_SELF_TEST 5
#define ADIS16460_DIAG_STAT_OVERRANGE 4
#define ADIS16460_DIAG_STAT_SPI_COMM 3
#define ADIS16460_DIAG_STAT_FLASH_UPT 2
static const char * const adis16460_status_error_msgs[] = {
[ADIS16460_DIAG_STAT_IN_CLK_OOS] = "Input clock out of sync",
[ADIS16460_DIAG_STAT_FLASH_MEM] = "Flash memory failure",
[ADIS16460_DIAG_STAT_SELF_TEST] = "Self test diagnostic failure",
[ADIS16460_DIAG_STAT_OVERRANGE] = "Sensor overrange",
[ADIS16460_DIAG_STAT_SPI_COMM] = "SPI communication failure",
[ADIS16460_DIAG_STAT_FLASH_UPT] = "Flash update failure",
};
static const struct adis_timeout adis16460_timeouts = {
.reset_ms = 225,
.sw_reset_ms = 225,
.self_test_ms = 10,
};
static const struct adis_data adis16460_data = {
.diag_stat_reg = ADIS16460_REG_DIAG_STAT,
.glob_cmd_reg = ADIS16460_REG_GLOB_CMD,
.prod_id_reg = ADIS16460_REG_PROD_ID,
.prod_id = 16460,
.self_test_mask = BIT(2),
.self_test_reg = ADIS16460_REG_GLOB_CMD,
.has_paging = false,
.read_delay = 5,
.write_delay = 5,
.cs_change_delay = 16,
.status_error_msgs = adis16460_status_error_msgs,
.status_error_mask = BIT(ADIS16460_DIAG_STAT_IN_CLK_OOS) |
BIT(ADIS16460_DIAG_STAT_FLASH_MEM) |
BIT(ADIS16460_DIAG_STAT_SELF_TEST) |
BIT(ADIS16460_DIAG_STAT_OVERRANGE) |
BIT(ADIS16460_DIAG_STAT_SPI_COMM) |
BIT(ADIS16460_DIAG_STAT_FLASH_UPT),
.unmasked_drdy = true,
.timeouts = &adis16460_timeouts,
};
static int adis16460_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adis16460 *st;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (indio_dev == NULL)
return -ENOMEM;
st = iio_priv(indio_dev);
st->chip_info = &adis16460_chip_info;
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->channels = st->chip_info->channels;
indio_dev->num_channels = st->chip_info->num_channels;
indio_dev->info = &adis16460_info;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = adis_init(&st->adis, indio_dev, spi, &adis16460_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
if (ret)
return ret;
ret = __adis_initial_startup(&st->adis);
if (ret)
return ret;
ret = devm_iio_device_register(&spi->dev, indio_dev);
if (ret)
return ret;
adis16460_debugfs_init(indio_dev);
return 0;
}
static const struct spi_device_id adis16460_ids[] = {
{ "adis16460", 0 },
{}
};
MODULE_DEVICE_TABLE(spi, adis16460_ids);
static const struct of_device_id adis16460_of_match[] = {
{ .compatible = "adi,adis16460" },
{}
};
MODULE_DEVICE_TABLE(of, adis16460_of_match);
static struct spi_driver adis16460_driver = {
.driver = {
.name = "adis16460",
.of_match_table = adis16460_of_match,
},
.id_table = adis16460_ids,
.probe = adis16460_probe,
};
module_spi_driver(adis16460_driver);
MODULE_AUTHOR("Dragos Bogdan <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADIS16460 IMU driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_ADISLIB);
| linux-master | drivers/iio/imu/adis16460.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics LSM9DS0 IMU driver
*
* Copyright (C) 2021, Intel Corporation
*
* Author: Andy Shevchenko <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include <linux/iio/common/st_sensors_i2c.h>
#include "st_lsm9ds0.h"
static const struct of_device_id st_lsm9ds0_of_match[] = {
{
.compatible = "st,lsm303d-imu",
.data = LSM303D_IMU_DEV_NAME,
},
{
.compatible = "st,lsm9ds0-imu",
.data = LSM9DS0_IMU_DEV_NAME,
},
{}
};
MODULE_DEVICE_TABLE(of, st_lsm9ds0_of_match);
static const struct i2c_device_id st_lsm9ds0_id_table[] = {
{ LSM303D_IMU_DEV_NAME },
{ LSM9DS0_IMU_DEV_NAME },
{}
};
MODULE_DEVICE_TABLE(i2c, st_lsm9ds0_id_table);
static const struct acpi_device_id st_lsm9ds0_acpi_match[] = {
{"ACCL0001", (kernel_ulong_t)LSM303D_IMU_DEV_NAME},
{ },
};
MODULE_DEVICE_TABLE(acpi, st_lsm9ds0_acpi_match);
static const struct regmap_config st_lsm9ds0_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.read_flag_mask = 0x80,
};
static int st_lsm9ds0_i2c_probe(struct i2c_client *client)
{
const struct regmap_config *config = &st_lsm9ds0_regmap_config;
struct device *dev = &client->dev;
struct st_lsm9ds0 *lsm9ds0;
struct regmap *regmap;
st_sensors_dev_name_probe(dev, client->name, sizeof(client->name));
lsm9ds0 = devm_kzalloc(dev, sizeof(*lsm9ds0), GFP_KERNEL);
if (!lsm9ds0)
return -ENOMEM;
lsm9ds0->dev = dev;
lsm9ds0->name = client->name;
lsm9ds0->irq = client->irq;
regmap = devm_regmap_init_i2c(client, config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
i2c_set_clientdata(client, lsm9ds0);
return st_lsm9ds0_probe(lsm9ds0, regmap);
}
static struct i2c_driver st_lsm9ds0_driver = {
.driver = {
.name = "st-lsm9ds0-i2c",
.of_match_table = st_lsm9ds0_of_match,
.acpi_match_table = st_lsm9ds0_acpi_match,
},
.probe = st_lsm9ds0_i2c_probe,
.id_table = st_lsm9ds0_id_table,
};
module_i2c_driver(st_lsm9ds0_driver);
MODULE_AUTHOR("Andy Shevchenko <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics LSM9DS0 IMU I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/imu/st_lsm9ds0/st_lsm9ds0_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics LSM9DS0 IMU driver
*
* Copyright (C) 2021, Intel Corporation
*
* Author: Andy Shevchenko <[email protected]>
*/
#include <linux/device.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/common/st_sensors.h>
#include <linux/iio/iio.h>
#include "st_lsm9ds0.h"
static int st_lsm9ds0_probe_accel(struct st_lsm9ds0 *lsm9ds0, struct regmap *regmap)
{
const struct st_sensor_settings *settings;
struct device *dev = lsm9ds0->dev;
struct st_sensor_data *data;
settings = st_accel_get_settings(lsm9ds0->name);
if (!settings) {
dev_err(dev, "device name %s not recognized.\n", lsm9ds0->name);
return -ENODEV;
}
lsm9ds0->accel = devm_iio_device_alloc(dev, sizeof(*data));
if (!lsm9ds0->accel)
return -ENOMEM;
lsm9ds0->accel->name = lsm9ds0->name;
data = iio_priv(lsm9ds0->accel);
data->sensor_settings = (struct st_sensor_settings *)settings;
data->irq = lsm9ds0->irq;
data->regmap = regmap;
return st_accel_common_probe(lsm9ds0->accel);
}
static int st_lsm9ds0_probe_magn(struct st_lsm9ds0 *lsm9ds0, struct regmap *regmap)
{
const struct st_sensor_settings *settings;
struct device *dev = lsm9ds0->dev;
struct st_sensor_data *data;
settings = st_magn_get_settings(lsm9ds0->name);
if (!settings) {
dev_err(dev, "device name %s not recognized.\n", lsm9ds0->name);
return -ENODEV;
}
lsm9ds0->magn = devm_iio_device_alloc(dev, sizeof(*data));
if (!lsm9ds0->magn)
return -ENOMEM;
lsm9ds0->magn->name = lsm9ds0->name;
data = iio_priv(lsm9ds0->magn);
data->sensor_settings = (struct st_sensor_settings *)settings;
data->irq = lsm9ds0->irq;
data->regmap = regmap;
return st_magn_common_probe(lsm9ds0->magn);
}
int st_lsm9ds0_probe(struct st_lsm9ds0 *lsm9ds0, struct regmap *regmap)
{
struct device *dev = lsm9ds0->dev;
static const char * const regulator_names[] = { "vdd", "vddio" };
int ret;
/* Regulators not mandatory, but if requested we should enable them. */
ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulator_names),
regulator_names);
if (ret)
return dev_err_probe(dev, ret,
"unable to enable Vdd supply\n");
/* Setup accelerometer device */
ret = st_lsm9ds0_probe_accel(lsm9ds0, regmap);
if (ret)
return ret;
/* Setup magnetometer device */
return st_lsm9ds0_probe_magn(lsm9ds0, regmap);
}
EXPORT_SYMBOL_NS_GPL(st_lsm9ds0_probe, IIO_ST_SENSORS);
MODULE_AUTHOR("Andy Shevchenko <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics LSM9DS0 IMU core driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/imu/st_lsm9ds0/st_lsm9ds0_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics LSM9DS0 IMU driver
*
* Copyright (C) 2021, Intel Corporation
*
* Author: Andy Shevchenko <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/iio/common/st_sensors_spi.h>
#include "st_lsm9ds0.h"
static const struct of_device_id st_lsm9ds0_of_match[] = {
{
.compatible = "st,lsm303d-imu",
.data = LSM303D_IMU_DEV_NAME,
},
{
.compatible = "st,lsm9ds0-imu",
.data = LSM9DS0_IMU_DEV_NAME,
},
{}
};
MODULE_DEVICE_TABLE(of, st_lsm9ds0_of_match);
static const struct spi_device_id st_lsm9ds0_id_table[] = {
{ LSM303D_IMU_DEV_NAME },
{ LSM9DS0_IMU_DEV_NAME },
{}
};
MODULE_DEVICE_TABLE(spi, st_lsm9ds0_id_table);
static const struct regmap_config st_lsm9ds0_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.read_flag_mask = 0xc0,
};
static int st_lsm9ds0_spi_probe(struct spi_device *spi)
{
struct device *dev = &spi->dev;
struct st_lsm9ds0 *lsm9ds0;
struct regmap *regmap;
st_sensors_dev_name_probe(dev, spi->modalias, sizeof(spi->modalias));
lsm9ds0 = devm_kzalloc(dev, sizeof(*lsm9ds0), GFP_KERNEL);
if (!lsm9ds0)
return -ENOMEM;
lsm9ds0->dev = dev;
lsm9ds0->name = spi->modalias;
lsm9ds0->irq = spi->irq;
regmap = devm_regmap_init_spi(spi, &st_lsm9ds0_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
spi_set_drvdata(spi, lsm9ds0);
return st_lsm9ds0_probe(lsm9ds0, regmap);
}
static struct spi_driver st_lsm9ds0_driver = {
.driver = {
.name = "st-lsm9ds0-spi",
.of_match_table = st_lsm9ds0_of_match,
},
.probe = st_lsm9ds0_spi_probe,
.id_table = st_lsm9ds0_id_table,
};
module_spi_driver(st_lsm9ds0_driver);
MODULE_AUTHOR("Andy Shevchenko <[email protected]>");
MODULE_DESCRIPTION("STMicroelectronics LSM9DS0 IMU SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(IIO_ST_SENSORS);
| linux-master | drivers/iio/imu/st_lsm9ds0/st_lsm9ds0_spi.c |
// SPDX-License-Identifier: GPL-2.0
/*
* bno055_ser Trace Support
* Copyright (C) 2022 Istituto Italiano di Tecnologia
* Electronic Design Laboratory
*
* Based on:
* Device core Trace Support
* Copyright (C) 2021, Intel Corporation
*/
#define CREATE_TRACE_POINTS
#include "bno055_ser_trace.h"
| linux-master | drivers/iio/imu/bno055/bno055_ser_trace.c |
// SPDX-License-Identifier: GPL-2.0
/*
* IIO driver for Bosch BNO055 IMU
*
* Copyright (C) 2021-2022 Istituto Italiano di Tecnologia
* Electronic Design Laboratory
* Written by Andrea Merello <[email protected]>
*
* Portions of this driver are taken from the BNO055 driver patch
* from Vlad Dogaru which is Copyright (c) 2016, Intel Corporation.
*
* This driver is also based on BMI160 driver, which is:
* Copyright (c) 2016, Intel Corporation.
* Copyright (c) 2019, Martin Kelly.
*/
#include <linux/bitfield.h>
#include <linux/bitmap.h>
#include <linux/clk.h>
#include <linux/debugfs.h>
#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/util_macros.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include "bno055.h"
#define BNO055_FW_UID_FMT "bno055-caldata-%*phN.dat"
#define BNO055_FW_GENERIC_NAME "bno055-caldata.dat"
/* common registers */
#define BNO055_PAGESEL_REG 0x7
/* page 0 registers */
#define BNO055_CHIP_ID_REG 0x0
#define BNO055_CHIP_ID_MAGIC 0xA0
#define BNO055_SW_REV_LSB_REG 0x4
#define BNO055_SW_REV_MSB_REG 0x5
#define BNO055_ACC_DATA_X_LSB_REG 0x8
#define BNO055_ACC_DATA_Y_LSB_REG 0xA
#define BNO055_ACC_DATA_Z_LSB_REG 0xC
#define BNO055_MAG_DATA_X_LSB_REG 0xE
#define BNO055_MAG_DATA_Y_LSB_REG 0x10
#define BNO055_MAG_DATA_Z_LSB_REG 0x12
#define BNO055_GYR_DATA_X_LSB_REG 0x14
#define BNO055_GYR_DATA_Y_LSB_REG 0x16
#define BNO055_GYR_DATA_Z_LSB_REG 0x18
#define BNO055_EUL_DATA_X_LSB_REG 0x1A
#define BNO055_EUL_DATA_Y_LSB_REG 0x1C
#define BNO055_EUL_DATA_Z_LSB_REG 0x1E
#define BNO055_QUAT_DATA_W_LSB_REG 0x20
#define BNO055_LIA_DATA_X_LSB_REG 0x28
#define BNO055_LIA_DATA_Y_LSB_REG 0x2A
#define BNO055_LIA_DATA_Z_LSB_REG 0x2C
#define BNO055_GRAVITY_DATA_X_LSB_REG 0x2E
#define BNO055_GRAVITY_DATA_Y_LSB_REG 0x30
#define BNO055_GRAVITY_DATA_Z_LSB_REG 0x32
#define BNO055_SCAN_CH_COUNT ((BNO055_GRAVITY_DATA_Z_LSB_REG - BNO055_ACC_DATA_X_LSB_REG) / 2)
#define BNO055_TEMP_REG 0x34
#define BNO055_CALIB_STAT_REG 0x35
#define BNO055_CALIB_STAT_MAGN_SHIFT 0
#define BNO055_CALIB_STAT_ACCEL_SHIFT 2
#define BNO055_CALIB_STAT_GYRO_SHIFT 4
#define BNO055_CALIB_STAT_SYS_SHIFT 6
#define BNO055_SYS_ERR_REG 0x3A
#define BNO055_POWER_MODE_REG 0x3E
#define BNO055_POWER_MODE_NORMAL 0
#define BNO055_SYS_TRIGGER_REG 0x3F
#define BNO055_SYS_TRIGGER_RST_SYS BIT(5)
#define BNO055_SYS_TRIGGER_CLK_SEL BIT(7)
#define BNO055_OPR_MODE_REG 0x3D
#define BNO055_OPR_MODE_CONFIG 0x0
#define BNO055_OPR_MODE_AMG 0x7
#define BNO055_OPR_MODE_FUSION_FMC_OFF 0xB
#define BNO055_OPR_MODE_FUSION 0xC
#define BNO055_UNIT_SEL_REG 0x3B
/* Android orientation mode means: pitch value decreases turning clockwise */
#define BNO055_UNIT_SEL_ANDROID BIT(7)
#define BNO055_UNIT_SEL_GYR_RPS BIT(1)
#define BNO055_CALDATA_START 0x55
#define BNO055_CALDATA_END 0x6A
#define BNO055_CALDATA_LEN 22
/*
* The difference in address between the register that contains the
* value and the register that contains the offset. This applies for
* accel, gyro and magn channels.
*/
#define BNO055_REG_OFFSET_ADDR 0x4D
/* page 1 registers */
#define BNO055_PG1(x) ((x) | 0x80)
#define BNO055_ACC_CONFIG_REG BNO055_PG1(0x8)
#define BNO055_ACC_CONFIG_LPF_MASK GENMASK(4, 2)
#define BNO055_ACC_CONFIG_RANGE_MASK GENMASK(1, 0)
#define BNO055_MAG_CONFIG_REG BNO055_PG1(0x9)
#define BNO055_MAG_CONFIG_HIGHACCURACY 0x18
#define BNO055_MAG_CONFIG_ODR_MASK GENMASK(2, 0)
#define BNO055_GYR_CONFIG_REG BNO055_PG1(0xA)
#define BNO055_GYR_CONFIG_RANGE_MASK GENMASK(2, 0)
#define BNO055_GYR_CONFIG_LPF_MASK GENMASK(5, 3)
#define BNO055_GYR_AM_SET_REG BNO055_PG1(0x1F)
#define BNO055_UID_LOWER_REG BNO055_PG1(0x50)
#define BNO055_UID_HIGHER_REG BNO055_PG1(0x5F)
#define BNO055_UID_LEN 16
struct bno055_sysfs_attr {
int *vals;
int len;
int *fusion_vals;
int *hw_xlate;
int type;
};
static int bno055_acc_lpf_vals[] = {
7, 810000, 15, 630000, 31, 250000, 62, 500000,
125, 0, 250, 0, 500, 0, 1000, 0,
};
static struct bno055_sysfs_attr bno055_acc_lpf = {
.vals = bno055_acc_lpf_vals,
.len = ARRAY_SIZE(bno055_acc_lpf_vals),
.fusion_vals = (int[]){62, 500000},
.type = IIO_VAL_INT_PLUS_MICRO,
};
static int bno055_acc_range_vals[] = {
/* G: 2, 4, 8, 16 */
1962, 3924, 7848, 15696
};
static struct bno055_sysfs_attr bno055_acc_range = {
.vals = bno055_acc_range_vals,
.len = ARRAY_SIZE(bno055_acc_range_vals),
.fusion_vals = (int[]){3924}, /* 4G */
.type = IIO_VAL_INT,
};
/*
* Theoretically the IMU should return data in a given (i.e. fixed) unit
* regardless of the range setting. This happens for the accelerometer, but not
* for the gyroscope; the gyroscope range setting affects the scale.
* This is probably due to this[0] bug.
* For this reason we map the internal range setting onto the standard IIO scale
* attribute for gyro.
* Since the bug[0] may be fixed in future, we check for the IMU FW version and
* eventually warn the user.
* Currently we just don't care about "range" attributes for gyro.
*
* [0] https://community.bosch-sensortec.com/t5/MEMS-sensors-forum/BNO055-Wrong-sensitivity-resolution-in-datasheet/td-p/10266
*/
/*
* dps = hwval * (dps_range/2^15)
* rps = hwval * (rps_range/2^15)
* = hwval * (dps_range/(2^15 * k))
* where k is rad-to-deg factor
*/
static int bno055_gyr_scale_vals[] = {
125, 1877467, 250, 1877467, 500, 1877467,
1000, 1877467, 2000, 1877467,
};
static struct bno055_sysfs_attr bno055_gyr_scale = {
.vals = bno055_gyr_scale_vals,
.len = ARRAY_SIZE(bno055_gyr_scale_vals),
.fusion_vals = (int[]){1, 900},
.hw_xlate = (int[]){4, 3, 2, 1, 0},
.type = IIO_VAL_FRACTIONAL,
};
static int bno055_gyr_lpf_vals[] = {12, 23, 32, 47, 64, 116, 230, 523};
static struct bno055_sysfs_attr bno055_gyr_lpf = {
.vals = bno055_gyr_lpf_vals,
.len = ARRAY_SIZE(bno055_gyr_lpf_vals),
.fusion_vals = (int[]){32},
.hw_xlate = (int[]){5, 4, 7, 3, 6, 2, 1, 0},
.type = IIO_VAL_INT,
};
static int bno055_mag_odr_vals[] = {2, 6, 8, 10, 15, 20, 25, 30};
static struct bno055_sysfs_attr bno055_mag_odr = {
.vals = bno055_mag_odr_vals,
.len = ARRAY_SIZE(bno055_mag_odr_vals),
.fusion_vals = (int[]){20},
.type = IIO_VAL_INT,
};
struct bno055_priv {
struct regmap *regmap;
struct device *dev;
struct clk *clk;
int operation_mode;
int xfer_burst_break_thr;
struct mutex lock;
u8 uid[BNO055_UID_LEN];
struct gpio_desc *reset_gpio;
bool sw_reset;
struct {
__le16 chans[BNO055_SCAN_CH_COUNT];
s64 timestamp __aligned(8);
} buf;
struct dentry *debugfs;
};
static bool bno055_regmap_volatile(struct device *dev, unsigned int reg)
{
/* data and status registers */
if (reg >= BNO055_ACC_DATA_X_LSB_REG && reg <= BNO055_SYS_ERR_REG)
return true;
/* when in fusion mode, config is updated by chip */
if (reg == BNO055_MAG_CONFIG_REG ||
reg == BNO055_ACC_CONFIG_REG ||
reg == BNO055_GYR_CONFIG_REG)
return true;
/* calibration data may be updated by the IMU */
if (reg >= BNO055_CALDATA_START && reg <= BNO055_CALDATA_END)
return true;
return false;
}
static bool bno055_regmap_readable(struct device *dev, unsigned int reg)
{
/* unnamed PG0 reserved areas */
if ((reg < BNO055_PG1(0) && reg > BNO055_CALDATA_END) ||
reg == 0x3C)
return false;
/* unnamed PG1 reserved areas */
if (reg > BNO055_PG1(BNO055_UID_HIGHER_REG) ||
(reg < BNO055_PG1(BNO055_UID_LOWER_REG) && reg > BNO055_PG1(BNO055_GYR_AM_SET_REG)) ||
reg == BNO055_PG1(0xE) ||
(reg < BNO055_PG1(BNO055_PAGESEL_REG) && reg >= BNO055_PG1(0x0)))
return false;
return true;
}
static bool bno055_regmap_writeable(struct device *dev, unsigned int reg)
{
/*
* Unreadable registers are indeed reserved; there are no WO regs
* (except for a single bit in SYS_TRIGGER register)
*/
if (!bno055_regmap_readable(dev, reg))
return false;
/* data and status registers */
if (reg >= BNO055_ACC_DATA_X_LSB_REG && reg <= BNO055_SYS_ERR_REG)
return false;
/* ID areas */
if (reg < BNO055_PAGESEL_REG ||
(reg <= BNO055_UID_HIGHER_REG && reg >= BNO055_UID_LOWER_REG))
return false;
return true;
}
static const struct regmap_range_cfg bno055_regmap_ranges[] = {
{
.range_min = 0,
.range_max = 0x7f * 2,
.selector_reg = BNO055_PAGESEL_REG,
.selector_mask = GENMASK(7, 0),
.selector_shift = 0,
.window_start = 0,
.window_len = 0x80,
},
};
const struct regmap_config bno055_regmap_config = {
.name = "bno055",
.reg_bits = 8,
.val_bits = 8,
.ranges = bno055_regmap_ranges,
.num_ranges = 1,
.volatile_reg = bno055_regmap_volatile,
.max_register = 0x80 * 2,
.writeable_reg = bno055_regmap_writeable,
.readable_reg = bno055_regmap_readable,
.cache_type = REGCACHE_RBTREE,
};
EXPORT_SYMBOL_NS_GPL(bno055_regmap_config, IIO_BNO055);
/* must be called in configuration mode */
static int bno055_calibration_load(struct bno055_priv *priv, const u8 *data, int len)
{
if (len != BNO055_CALDATA_LEN) {
dev_dbg(priv->dev, "Invalid calibration file size %d (expected %d)",
len, BNO055_CALDATA_LEN);
return -EINVAL;
}
dev_dbg(priv->dev, "loading cal data: %*ph", BNO055_CALDATA_LEN, data);
return regmap_bulk_write(priv->regmap, BNO055_CALDATA_START,
data, BNO055_CALDATA_LEN);
}
static int bno055_operation_mode_do_set(struct bno055_priv *priv,
int operation_mode)
{
int ret;
ret = regmap_write(priv->regmap, BNO055_OPR_MODE_REG,
operation_mode);
if (ret)
return ret;
/* Following datasheet specifications: sensor takes 7mS up to 19 mS to switch mode */
msleep(20);
return 0;
}
static int bno055_system_reset(struct bno055_priv *priv)
{
int ret;
if (priv->reset_gpio) {
gpiod_set_value_cansleep(priv->reset_gpio, 0);
usleep_range(5000, 10000);
gpiod_set_value_cansleep(priv->reset_gpio, 1);
} else if (priv->sw_reset) {
ret = regmap_write(priv->regmap, BNO055_SYS_TRIGGER_REG,
BNO055_SYS_TRIGGER_RST_SYS);
if (ret)
return ret;
} else {
return 0;
}
regcache_drop_region(priv->regmap, 0x0, 0xff);
usleep_range(650000, 700000);
return 0;
}
static int bno055_init(struct bno055_priv *priv, const u8 *caldata, int len)
{
int ret;
ret = bno055_operation_mode_do_set(priv, BNO055_OPR_MODE_CONFIG);
if (ret)
return ret;
ret = regmap_write(priv->regmap, BNO055_POWER_MODE_REG,
BNO055_POWER_MODE_NORMAL);
if (ret)
return ret;
ret = regmap_write(priv->regmap, BNO055_SYS_TRIGGER_REG,
priv->clk ? BNO055_SYS_TRIGGER_CLK_SEL : 0);
if (ret)
return ret;
/* use standard SI units */
ret = regmap_write(priv->regmap, BNO055_UNIT_SEL_REG,
BNO055_UNIT_SEL_ANDROID | BNO055_UNIT_SEL_GYR_RPS);
if (ret)
return ret;
if (caldata) {
ret = bno055_calibration_load(priv, caldata, len);
if (ret)
dev_warn(priv->dev, "failed to load calibration data with error %d\n",
ret);
}
return 0;
}
static ssize_t bno055_operation_mode_set(struct bno055_priv *priv,
int operation_mode)
{
u8 caldata[BNO055_CALDATA_LEN];
int ret;
mutex_lock(&priv->lock);
ret = bno055_operation_mode_do_set(priv, BNO055_OPR_MODE_CONFIG);
if (ret)
goto exit_unlock;
if (operation_mode == BNO055_OPR_MODE_FUSION ||
operation_mode == BNO055_OPR_MODE_FUSION_FMC_OFF) {
/* for entering fusion mode, reset the chip to clear the algo state */
ret = regmap_bulk_read(priv->regmap, BNO055_CALDATA_START, caldata,
BNO055_CALDATA_LEN);
if (ret)
goto exit_unlock;
ret = bno055_system_reset(priv);
if (ret)
goto exit_unlock;
ret = bno055_init(priv, caldata, BNO055_CALDATA_LEN);
if (ret)
goto exit_unlock;
}
ret = bno055_operation_mode_do_set(priv, operation_mode);
if (ret)
goto exit_unlock;
priv->operation_mode = operation_mode;
exit_unlock:
mutex_unlock(&priv->lock);
return ret;
}
static void bno055_uninit(void *arg)
{
struct bno055_priv *priv = arg;
/* stop the IMU */
bno055_operation_mode_do_set(priv, BNO055_OPR_MODE_CONFIG);
}
#define BNO055_CHANNEL(_type, _axis, _index, _address, _sep, _sh, _avail) { \
.address = _address, \
.type = _type, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | (_sep), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | (_sh), \
.info_mask_shared_by_type_available = _avail, \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_LE, \
.repeat = IIO_MOD_##_axis == IIO_MOD_QUATERNION ? 4 : 0, \
}, \
}
/* scan indexes follow DATA register order */
enum bno055_scan_axis {
BNO055_SCAN_ACCEL_X,
BNO055_SCAN_ACCEL_Y,
BNO055_SCAN_ACCEL_Z,
BNO055_SCAN_MAGN_X,
BNO055_SCAN_MAGN_Y,
BNO055_SCAN_MAGN_Z,
BNO055_SCAN_GYRO_X,
BNO055_SCAN_GYRO_Y,
BNO055_SCAN_GYRO_Z,
BNO055_SCAN_YAW,
BNO055_SCAN_ROLL,
BNO055_SCAN_PITCH,
BNO055_SCAN_QUATERNION,
BNO055_SCAN_LIA_X,
BNO055_SCAN_LIA_Y,
BNO055_SCAN_LIA_Z,
BNO055_SCAN_GRAVITY_X,
BNO055_SCAN_GRAVITY_Y,
BNO055_SCAN_GRAVITY_Z,
BNO055_SCAN_TIMESTAMP,
_BNO055_SCAN_MAX
};
static const struct iio_chan_spec bno055_channels[] = {
/* accelerometer */
BNO055_CHANNEL(IIO_ACCEL, X, BNO055_SCAN_ACCEL_X,
BNO055_ACC_DATA_X_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY)),
BNO055_CHANNEL(IIO_ACCEL, Y, BNO055_SCAN_ACCEL_Y,
BNO055_ACC_DATA_Y_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY)),
BNO055_CHANNEL(IIO_ACCEL, Z, BNO055_SCAN_ACCEL_Z,
BNO055_ACC_DATA_Z_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY)),
/* gyroscope */
BNO055_CHANNEL(IIO_ANGL_VEL, X, BNO055_SCAN_GYRO_X,
BNO055_GYR_DATA_X_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) |
BIT(IIO_CHAN_INFO_SCALE)),
BNO055_CHANNEL(IIO_ANGL_VEL, Y, BNO055_SCAN_GYRO_Y,
BNO055_GYR_DATA_Y_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) |
BIT(IIO_CHAN_INFO_SCALE)),
BNO055_CHANNEL(IIO_ANGL_VEL, Z, BNO055_SCAN_GYRO_Z,
BNO055_GYR_DATA_Z_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) |
BIT(IIO_CHAN_INFO_SCALE)),
/* magnetometer */
BNO055_CHANNEL(IIO_MAGN, X, BNO055_SCAN_MAGN_X,
BNO055_MAG_DATA_X_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_SAMP_FREQ), BIT(IIO_CHAN_INFO_SAMP_FREQ)),
BNO055_CHANNEL(IIO_MAGN, Y, BNO055_SCAN_MAGN_Y,
BNO055_MAG_DATA_Y_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_SAMP_FREQ), BIT(IIO_CHAN_INFO_SAMP_FREQ)),
BNO055_CHANNEL(IIO_MAGN, Z, BNO055_SCAN_MAGN_Z,
BNO055_MAG_DATA_Z_LSB_REG, BIT(IIO_CHAN_INFO_OFFSET),
BIT(IIO_CHAN_INFO_SAMP_FREQ), BIT(IIO_CHAN_INFO_SAMP_FREQ)),
/* euler angle */
BNO055_CHANNEL(IIO_ROT, YAW, BNO055_SCAN_YAW,
BNO055_EUL_DATA_X_LSB_REG, 0, 0, 0),
BNO055_CHANNEL(IIO_ROT, ROLL, BNO055_SCAN_ROLL,
BNO055_EUL_DATA_Y_LSB_REG, 0, 0, 0),
BNO055_CHANNEL(IIO_ROT, PITCH, BNO055_SCAN_PITCH,
BNO055_EUL_DATA_Z_LSB_REG, 0, 0, 0),
/* quaternion */
BNO055_CHANNEL(IIO_ROT, QUATERNION, BNO055_SCAN_QUATERNION,
BNO055_QUAT_DATA_W_LSB_REG, 0, 0, 0),
/* linear acceleration */
BNO055_CHANNEL(IIO_ACCEL, LINEAR_X, BNO055_SCAN_LIA_X,
BNO055_LIA_DATA_X_LSB_REG, 0, 0, 0),
BNO055_CHANNEL(IIO_ACCEL, LINEAR_Y, BNO055_SCAN_LIA_Y,
BNO055_LIA_DATA_Y_LSB_REG, 0, 0, 0),
BNO055_CHANNEL(IIO_ACCEL, LINEAR_Z, BNO055_SCAN_LIA_Z,
BNO055_LIA_DATA_Z_LSB_REG, 0, 0, 0),
/* gravity vector */
BNO055_CHANNEL(IIO_GRAVITY, X, BNO055_SCAN_GRAVITY_X,
BNO055_GRAVITY_DATA_X_LSB_REG, 0, 0, 0),
BNO055_CHANNEL(IIO_GRAVITY, Y, BNO055_SCAN_GRAVITY_Y,
BNO055_GRAVITY_DATA_Y_LSB_REG, 0, 0, 0),
BNO055_CHANNEL(IIO_GRAVITY, Z, BNO055_SCAN_GRAVITY_Z,
BNO055_GRAVITY_DATA_Z_LSB_REG, 0, 0, 0),
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
.scan_index = -1,
},
IIO_CHAN_SOFT_TIMESTAMP(BNO055_SCAN_TIMESTAMP),
};
static int bno055_get_regmask(struct bno055_priv *priv, int *val, int *val2,
int reg, int mask, struct bno055_sysfs_attr *attr)
{
const int shift = __ffs(mask);
int hwval, idx;
int ret;
int i;
ret = regmap_read(priv->regmap, reg, &hwval);
if (ret)
return ret;
idx = (hwval & mask) >> shift;
if (attr->hw_xlate)
for (i = 0; i < attr->len; i++)
if (attr->hw_xlate[i] == idx) {
idx = i;
break;
}
if (attr->type == IIO_VAL_INT) {
*val = attr->vals[idx];
} else { /* IIO_VAL_INT_PLUS_MICRO or IIO_VAL_FRACTIONAL */
*val = attr->vals[idx * 2];
*val2 = attr->vals[idx * 2 + 1];
}
return attr->type;
}
static int bno055_set_regmask(struct bno055_priv *priv, int val, int val2,
int reg, int mask, struct bno055_sysfs_attr *attr)
{
const int shift = __ffs(mask);
int best_delta;
int req_val;
int tbl_val;
bool first;
int delta;
int hwval;
int ret;
int len;
int i;
/*
* The closest value the HW supports is only one in fusion mode,
* and it is autoselected, so don't do anything, just return OK,
* as the closest possible value has been (virtually) selected
*/
if (priv->operation_mode != BNO055_OPR_MODE_AMG)
return 0;
len = attr->len;
/*
* We always get a request in INT_PLUS_MICRO, but we
* take care of the micro part only when we really have
* non-integer tables. This prevents 32-bit overflow with
* larger integers contained in integer tables.
*/
req_val = val;
if (attr->type != IIO_VAL_INT) {
len /= 2;
req_val = min(val, 2147) * 1000000 + val2;
}
first = true;
for (i = 0; i < len; i++) {
switch (attr->type) {
case IIO_VAL_INT:
tbl_val = attr->vals[i];
break;
case IIO_VAL_INT_PLUS_MICRO:
WARN_ON(attr->vals[i * 2] > 2147);
tbl_val = attr->vals[i * 2] * 1000000 +
attr->vals[i * 2 + 1];
break;
case IIO_VAL_FRACTIONAL:
WARN_ON(attr->vals[i * 2] > 4294);
tbl_val = attr->vals[i * 2] * 1000000 /
attr->vals[i * 2 + 1];
break;
default:
return -EINVAL;
}
delta = abs(tbl_val - req_val);
if (first || delta < best_delta) {
best_delta = delta;
hwval = i;
first = false;
}
}
if (attr->hw_xlate)
hwval = attr->hw_xlate[hwval];
ret = bno055_operation_mode_do_set(priv, BNO055_OPR_MODE_CONFIG);
if (ret)
return ret;
ret = regmap_update_bits(priv->regmap, reg, mask, hwval << shift);
if (ret)
return ret;
return bno055_operation_mode_do_set(priv, BNO055_OPR_MODE_AMG);
}
static int bno055_read_simple_chan(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct bno055_priv *priv = iio_priv(indio_dev);
__le16 raw_val;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = regmap_bulk_read(priv->regmap, chan->address,
&raw_val, sizeof(raw_val));
if (ret < 0)
return ret;
*val = sign_extend32(le16_to_cpu(raw_val), 15);
return IIO_VAL_INT;
case IIO_CHAN_INFO_OFFSET:
if (priv->operation_mode != BNO055_OPR_MODE_AMG) {
*val = 0;
} else {
ret = regmap_bulk_read(priv->regmap,
chan->address +
BNO055_REG_OFFSET_ADDR,
&raw_val, sizeof(raw_val));
if (ret < 0)
return ret;
/*
* IMU reports sensor offsets; IIO wants correction
* offsets, thus we need the 'minus' here.
*/
*val = -sign_extend32(le16_to_cpu(raw_val), 15);
}
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 1;
switch (chan->type) {
case IIO_GRAVITY:
/* Table 3-35: 1 m/s^2 = 100 LSB */
case IIO_ACCEL:
/* Table 3-17: 1 m/s^2 = 100 LSB */
*val2 = 100;
break;
case IIO_MAGN:
/*
* Table 3-19: 1 uT = 16 LSB. But we need
* Gauss: 1G = 0.1 uT.
*/
*val2 = 160;
break;
case IIO_ANGL_VEL:
/*
* Table 3-22: 1 Rps = 900 LSB
* .. but this is not exactly true. See comment at the
* beginning of this file.
*/
if (priv->operation_mode != BNO055_OPR_MODE_AMG) {
*val = bno055_gyr_scale.fusion_vals[0];
*val2 = bno055_gyr_scale.fusion_vals[1];
return IIO_VAL_FRACTIONAL;
}
return bno055_get_regmask(priv, val, val2,
BNO055_GYR_CONFIG_REG,
BNO055_GYR_CONFIG_RANGE_MASK,
&bno055_gyr_scale);
break;
case IIO_ROT:
/* Table 3-28: 1 degree = 16 LSB */
*val2 = 16;
break;
default:
return -EINVAL;
}
return IIO_VAL_FRACTIONAL;
case IIO_CHAN_INFO_SAMP_FREQ:
if (chan->type != IIO_MAGN)
return -EINVAL;
return bno055_get_regmask(priv, val, val2,
BNO055_MAG_CONFIG_REG,
BNO055_MAG_CONFIG_ODR_MASK,
&bno055_mag_odr);
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
switch (chan->type) {
case IIO_ANGL_VEL:
return bno055_get_regmask(priv, val, val2,
BNO055_GYR_CONFIG_REG,
BNO055_GYR_CONFIG_LPF_MASK,
&bno055_gyr_lpf);
case IIO_ACCEL:
return bno055_get_regmask(priv, val, val2,
BNO055_ACC_CONFIG_REG,
BNO055_ACC_CONFIG_LPF_MASK,
&bno055_acc_lpf);
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int bno055_sysfs_attr_avail(struct bno055_priv *priv, struct bno055_sysfs_attr *attr,
const int **vals, int *length)
{
if (priv->operation_mode != BNO055_OPR_MODE_AMG) {
/* locked when fusion enabled */
*vals = attr->fusion_vals;
if (attr->type == IIO_VAL_INT)
*length = 1;
else
*length = 2; /* IIO_VAL_INT_PLUS_MICRO or IIO_VAL_FRACTIONAL*/
} else {
*vals = attr->vals;
*length = attr->len;
}
return attr->type;
}
static int bno055_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct bno055_priv *priv = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
*type = bno055_sysfs_attr_avail(priv, &bno055_gyr_scale,
vals, length);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
switch (chan->type) {
case IIO_ANGL_VEL:
*type = bno055_sysfs_attr_avail(priv, &bno055_gyr_lpf,
vals, length);
return IIO_AVAIL_LIST;
case IIO_ACCEL:
*type = bno055_sysfs_attr_avail(priv, &bno055_acc_lpf,
vals, length);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_SAMP_FREQ:
switch (chan->type) {
case IIO_MAGN:
*type = bno055_sysfs_attr_avail(priv, &bno055_mag_odr,
vals, length);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int bno055_read_temp_chan(struct iio_dev *indio_dev, int *val)
{
struct bno055_priv *priv = iio_priv(indio_dev);
unsigned int raw_val;
int ret;
ret = regmap_read(priv->regmap, BNO055_TEMP_REG, &raw_val);
if (ret < 0)
return ret;
/*
* Tables 3-36 and 3-37: one byte of priv, signed, 1 LSB = 1C.
* ABI wants milliC.
*/
*val = raw_val * 1000;
return IIO_VAL_INT;
}
static int bno055_read_quaternion(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int size, int *vals, int *val_len,
long mask)
{
struct bno055_priv *priv = iio_priv(indio_dev);
__le16 raw_vals[4];
int i, ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (size < 4)
return -EINVAL;
ret = regmap_bulk_read(priv->regmap,
BNO055_QUAT_DATA_W_LSB_REG,
raw_vals, sizeof(raw_vals));
if (ret < 0)
return ret;
for (i = 0; i < 4; i++)
vals[i] = sign_extend32(le16_to_cpu(raw_vals[i]), 15);
*val_len = 4;
return IIO_VAL_INT_MULTIPLE;
case IIO_CHAN_INFO_SCALE:
/* Table 3-31: 1 quaternion = 2^14 LSB */
if (size < 2)
return -EINVAL;
vals[0] = 1;
vals[1] = 14;
return IIO_VAL_FRACTIONAL_LOG2;
default:
return -EINVAL;
}
}
static bool bno055_is_chan_readable(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan)
{
struct bno055_priv *priv = iio_priv(indio_dev);
if (priv->operation_mode != BNO055_OPR_MODE_AMG)
return true;
switch (chan->type) {
case IIO_GRAVITY:
case IIO_ROT:
return false;
case IIO_ACCEL:
if (chan->channel2 == IIO_MOD_LINEAR_X ||
chan->channel2 == IIO_MOD_LINEAR_Y ||
chan->channel2 == IIO_MOD_LINEAR_Z)
return false;
return true;
default:
return true;
}
}
static int _bno055_read_raw_multi(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int size, int *vals, int *val_len,
long mask)
{
if (!bno055_is_chan_readable(indio_dev, chan))
return -EBUSY;
switch (chan->type) {
case IIO_MAGN:
case IIO_ACCEL:
case IIO_ANGL_VEL:
case IIO_GRAVITY:
if (size < 2)
return -EINVAL;
*val_len = 2;
return bno055_read_simple_chan(indio_dev, chan,
&vals[0], &vals[1],
mask);
case IIO_TEMP:
*val_len = 1;
return bno055_read_temp_chan(indio_dev, &vals[0]);
case IIO_ROT:
/*
* Rotation is exposed as either a quaternion or three
* Euler angles.
*/
if (chan->channel2 == IIO_MOD_QUATERNION)
return bno055_read_quaternion(indio_dev, chan,
size, vals,
val_len, mask);
if (size < 2)
return -EINVAL;
*val_len = 2;
return bno055_read_simple_chan(indio_dev, chan,
&vals[0], &vals[1],
mask);
default:
return -EINVAL;
}
}
static int bno055_read_raw_multi(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int size, int *vals, int *val_len,
long mask)
{
struct bno055_priv *priv = iio_priv(indio_dev);
int ret;
mutex_lock(&priv->lock);
ret = _bno055_read_raw_multi(indio_dev, chan, size,
vals, val_len, mask);
mutex_unlock(&priv->lock);
return ret;
}
static int _bno055_write_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bno055_priv *priv = iio_priv(iio_dev);
switch (chan->type) {
case IIO_MAGN:
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
return bno055_set_regmask(priv, val, val2,
BNO055_MAG_CONFIG_REG,
BNO055_MAG_CONFIG_ODR_MASK,
&bno055_mag_odr);
default:
return -EINVAL;
}
case IIO_ACCEL:
switch (mask) {
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return bno055_set_regmask(priv, val, val2,
BNO055_ACC_CONFIG_REG,
BNO055_ACC_CONFIG_LPF_MASK,
&bno055_acc_lpf);
default:
return -EINVAL;
}
case IIO_ANGL_VEL:
switch (mask) {
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return bno055_set_regmask(priv, val, val2,
BNO055_GYR_CONFIG_REG,
BNO055_GYR_CONFIG_LPF_MASK,
&bno055_gyr_lpf);
case IIO_CHAN_INFO_SCALE:
return bno055_set_regmask(priv, val, val2,
BNO055_GYR_CONFIG_REG,
BNO055_GYR_CONFIG_RANGE_MASK,
&bno055_gyr_scale);
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int bno055_write_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bno055_priv *priv = iio_priv(iio_dev);
int ret;
mutex_lock(&priv->lock);
ret = _bno055_write_raw(iio_dev, chan, val, val2, mask);
mutex_unlock(&priv->lock);
return ret;
}
static ssize_t in_accel_range_raw_available_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(dev));
int len = 0;
int i;
if (priv->operation_mode != BNO055_OPR_MODE_AMG)
return sysfs_emit(buf, "%d\n", bno055_acc_range.fusion_vals[0]);
for (i = 0; i < bno055_acc_range.len; i++)
len += sysfs_emit_at(buf, len, "%d ", bno055_acc_range.vals[i]);
buf[len - 1] = '\n';
return len;
}
static ssize_t fusion_enable_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(dev));
return sysfs_emit(buf, "%d\n",
priv->operation_mode != BNO055_OPR_MODE_AMG);
}
static ssize_t fusion_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct bno055_priv *priv = iio_priv(indio_dev);
bool en;
int ret;
if (indio_dev->active_scan_mask &&
!bitmap_empty(indio_dev->active_scan_mask, _BNO055_SCAN_MAX))
return -EBUSY;
ret = kstrtobool(buf, &en);
if (ret)
return -EINVAL;
if (!en)
return bno055_operation_mode_set(priv, BNO055_OPR_MODE_AMG) ?: len;
/*
* Coming from AMG means the FMC was off, just switch to fusion but
* don't change anything that doesn't belong to us (i.e let FMC stay off).
* Coming from any other fusion mode means we don't need to do anything.
*/
if (priv->operation_mode == BNO055_OPR_MODE_AMG)
return bno055_operation_mode_set(priv, BNO055_OPR_MODE_FUSION_FMC_OFF) ?: len;
return len;
}
static ssize_t in_magn_calibration_fast_enable_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(dev));
return sysfs_emit(buf, "%d\n",
priv->operation_mode == BNO055_OPR_MODE_FUSION);
}
static ssize_t in_magn_calibration_fast_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct bno055_priv *priv = iio_priv(indio_dev);
int ret;
if (indio_dev->active_scan_mask &&
!bitmap_empty(indio_dev->active_scan_mask, _BNO055_SCAN_MAX))
return -EBUSY;
if (sysfs_streq(buf, "0")) {
if (priv->operation_mode == BNO055_OPR_MODE_FUSION) {
ret = bno055_operation_mode_set(priv, BNO055_OPR_MODE_FUSION_FMC_OFF);
if (ret)
return ret;
}
} else {
if (priv->operation_mode == BNO055_OPR_MODE_AMG)
return -EINVAL;
if (priv->operation_mode != BNO055_OPR_MODE_FUSION) {
ret = bno055_operation_mode_set(priv, BNO055_OPR_MODE_FUSION);
if (ret)
return ret;
}
}
return len;
}
static ssize_t in_accel_range_raw_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(dev));
int val;
int ret;
ret = bno055_get_regmask(priv, &val, NULL,
BNO055_ACC_CONFIG_REG,
BNO055_ACC_CONFIG_RANGE_MASK,
&bno055_acc_range);
if (ret < 0)
return ret;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t in_accel_range_raw_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(dev));
unsigned long val;
int ret;
ret = kstrtoul(buf, 10, &val);
if (ret)
return ret;
mutex_lock(&priv->lock);
ret = bno055_set_regmask(priv, val, 0,
BNO055_ACC_CONFIG_REG,
BNO055_ACC_CONFIG_RANGE_MASK,
&bno055_acc_range);
mutex_unlock(&priv->lock);
return ret ?: len;
}
static ssize_t bno055_get_calib_status(struct device *dev, char *buf, int which)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(dev));
int calib;
int ret;
int val;
if (priv->operation_mode == BNO055_OPR_MODE_AMG ||
(priv->operation_mode == BNO055_OPR_MODE_FUSION_FMC_OFF &&
which == BNO055_CALIB_STAT_MAGN_SHIFT)) {
calib = 0;
} else {
mutex_lock(&priv->lock);
ret = regmap_read(priv->regmap, BNO055_CALIB_STAT_REG, &val);
mutex_unlock(&priv->lock);
if (ret)
return -EIO;
calib = ((val >> which) & GENMASK(1, 0)) + 1;
}
return sysfs_emit(buf, "%d\n", calib);
}
static ssize_t serialnumber_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(dev));
return sysfs_emit(buf, "%*ph\n", BNO055_UID_LEN, priv->uid);
}
static ssize_t calibration_data_read(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr, char *buf,
loff_t pos, size_t count)
{
struct bno055_priv *priv = iio_priv(dev_to_iio_dev(kobj_to_dev(kobj)));
u8 data[BNO055_CALDATA_LEN];
int ret;
/*
* Calibration data is volatile; reading it in chunks will possibly
* results in inconsistent data. We require the user to read the whole
* blob in a single chunk
*/
if (count < BNO055_CALDATA_LEN || pos)
return -EINVAL;
mutex_lock(&priv->lock);
ret = bno055_operation_mode_do_set(priv, BNO055_OPR_MODE_CONFIG);
if (ret)
goto exit_unlock;
ret = regmap_bulk_read(priv->regmap, BNO055_CALDATA_START, data,
BNO055_CALDATA_LEN);
if (ret)
goto exit_unlock;
ret = bno055_operation_mode_do_set(priv, priv->operation_mode);
if (ret)
goto exit_unlock;
memcpy(buf, data, BNO055_CALDATA_LEN);
ret = BNO055_CALDATA_LEN;
exit_unlock:
mutex_unlock(&priv->lock);
return ret;
}
static ssize_t sys_calibration_auto_status_show(struct device *dev,
struct device_attribute *a,
char *buf)
{
return bno055_get_calib_status(dev, buf, BNO055_CALIB_STAT_SYS_SHIFT);
}
static ssize_t in_accel_calibration_auto_status_show(struct device *dev,
struct device_attribute *a,
char *buf)
{
return bno055_get_calib_status(dev, buf, BNO055_CALIB_STAT_ACCEL_SHIFT);
}
static ssize_t in_gyro_calibration_auto_status_show(struct device *dev,
struct device_attribute *a,
char *buf)
{
return bno055_get_calib_status(dev, buf, BNO055_CALIB_STAT_GYRO_SHIFT);
}
static ssize_t in_magn_calibration_auto_status_show(struct device *dev,
struct device_attribute *a,
char *buf)
{
return bno055_get_calib_status(dev, buf, BNO055_CALIB_STAT_MAGN_SHIFT);
}
static int bno055_debugfs_reg_access(struct iio_dev *iio_dev, unsigned int reg,
unsigned int writeval, unsigned int *readval)
{
struct bno055_priv *priv = iio_priv(iio_dev);
if (readval)
return regmap_read(priv->regmap, reg, readval);
else
return regmap_write(priv->regmap, reg, writeval);
}
static ssize_t bno055_show_fw_version(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct bno055_priv *priv = file->private_data;
int rev, ver;
char *buf;
int ret;
ret = regmap_read(priv->regmap, BNO055_SW_REV_LSB_REG, &rev);
if (ret)
return ret;
ret = regmap_read(priv->regmap, BNO055_SW_REV_MSB_REG, &ver);
if (ret)
return ret;
buf = kasprintf(GFP_KERNEL, "ver: 0x%x, rev: 0x%x\n", ver, rev);
if (!buf)
return -ENOMEM;
ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
kfree(buf);
return ret;
}
static const struct file_operations bno055_fw_version_ops = {
.open = simple_open,
.read = bno055_show_fw_version,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static void bno055_debugfs_remove(void *_priv)
{
struct bno055_priv *priv = _priv;
debugfs_remove(priv->debugfs);
priv->debugfs = NULL;
}
static void bno055_debugfs_init(struct iio_dev *iio_dev)
{
struct bno055_priv *priv = iio_priv(iio_dev);
priv->debugfs = debugfs_create_file("firmware_version", 0400,
iio_get_debugfs_dentry(iio_dev),
priv, &bno055_fw_version_ops);
if (!IS_ERR(priv->debugfs))
devm_add_action_or_reset(priv->dev, bno055_debugfs_remove,
priv);
if (IS_ERR_OR_NULL(priv->debugfs))
dev_warn(priv->dev, "failed to setup debugfs");
}
static IIO_DEVICE_ATTR_RW(fusion_enable, 0);
static IIO_DEVICE_ATTR_RW(in_magn_calibration_fast_enable, 0);
static IIO_DEVICE_ATTR_RW(in_accel_range_raw, 0);
static IIO_DEVICE_ATTR_RO(in_accel_range_raw_available, 0);
static IIO_DEVICE_ATTR_RO(sys_calibration_auto_status, 0);
static IIO_DEVICE_ATTR_RO(in_accel_calibration_auto_status, 0);
static IIO_DEVICE_ATTR_RO(in_gyro_calibration_auto_status, 0);
static IIO_DEVICE_ATTR_RO(in_magn_calibration_auto_status, 0);
static IIO_DEVICE_ATTR_RO(serialnumber, 0);
static struct attribute *bno055_attrs[] = {
&iio_dev_attr_in_accel_range_raw_available.dev_attr.attr,
&iio_dev_attr_in_accel_range_raw.dev_attr.attr,
&iio_dev_attr_fusion_enable.dev_attr.attr,
&iio_dev_attr_in_magn_calibration_fast_enable.dev_attr.attr,
&iio_dev_attr_sys_calibration_auto_status.dev_attr.attr,
&iio_dev_attr_in_accel_calibration_auto_status.dev_attr.attr,
&iio_dev_attr_in_gyro_calibration_auto_status.dev_attr.attr,
&iio_dev_attr_in_magn_calibration_auto_status.dev_attr.attr,
&iio_dev_attr_serialnumber.dev_attr.attr,
NULL
};
static BIN_ATTR_RO(calibration_data, BNO055_CALDATA_LEN);
static struct bin_attribute *bno055_bin_attrs[] = {
&bin_attr_calibration_data,
NULL
};
static const struct attribute_group bno055_attrs_group = {
.attrs = bno055_attrs,
.bin_attrs = bno055_bin_attrs,
};
static const struct iio_info bno055_info = {
.read_raw_multi = bno055_read_raw_multi,
.read_avail = bno055_read_avail,
.write_raw = bno055_write_raw,
.attrs = &bno055_attrs_group,
.debugfs_reg_access = bno055_debugfs_reg_access,
};
/*
* Reads len samples from the HW, stores them in buf starting from buf_idx,
* and applies mask to cull (skip) unneeded samples.
* Updates buf_idx incrementing with the number of stored samples.
* Samples from HW are transferred into buf, then in-place copy on buf is
* performed in order to cull samples that need to be skipped.
* This avoids copies of the first samples until we hit the 1st sample to skip,
* and also avoids having an extra bounce buffer.
* buf must be able to contain len elements in spite of how many samples we are
* going to cull.
*/
static int bno055_scan_xfer(struct bno055_priv *priv,
int start_ch, int len, unsigned long mask,
__le16 *buf, int *buf_idx)
{
const int base = BNO055_ACC_DATA_X_LSB_REG;
bool quat_in_read = false;
int buf_base = *buf_idx;
__le16 *dst, *src;
int offs_fixup = 0;
int xfer_len = len;
int ret;
int i, n;
if (!mask)
return 0;
/*
* All channels are made up 1 16-bit sample, except for quaternion that
* is made up 4 16-bit values.
* For us the quaternion CH is just like 4 regular CHs.
* If our read starts past the quaternion make sure to adjust the
* starting offset; if the quaternion is contained in our scan then make
* sure to adjust the read len.
*/
if (start_ch > BNO055_SCAN_QUATERNION) {
start_ch += 3;
} else if ((start_ch <= BNO055_SCAN_QUATERNION) &&
((start_ch + len) > BNO055_SCAN_QUATERNION)) {
quat_in_read = true;
xfer_len += 3;
}
ret = regmap_bulk_read(priv->regmap,
base + start_ch * sizeof(__le16),
buf + buf_base,
xfer_len * sizeof(__le16));
if (ret)
return ret;
for_each_set_bit(i, &mask, len) {
if (quat_in_read && ((start_ch + i) > BNO055_SCAN_QUATERNION))
offs_fixup = 3;
dst = buf + *buf_idx;
src = buf + buf_base + offs_fixup + i;
n = (start_ch + i == BNO055_SCAN_QUATERNION) ? 4 : 1;
if (dst != src)
memcpy(dst, src, n * sizeof(__le16));
*buf_idx += n;
}
return 0;
}
static irqreturn_t bno055_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *iio_dev = pf->indio_dev;
struct bno055_priv *priv = iio_priv(iio_dev);
int xfer_start, start, end, prev_end;
unsigned long mask;
int quat_extra_len;
bool first = true;
int buf_idx = 0;
bool thr_hit;
int ret;
mutex_lock(&priv->lock);
/*
* Walk the bitmap and eventually perform several transfers.
* Bitmap ones-fields that are separated by gaps <= xfer_burst_break_thr
* will be included in same transfer.
* Every time the bitmap contains a gap wider than xfer_burst_break_thr
* then we split the transfer, skipping the gap.
*/
for_each_set_bitrange(start, end, iio_dev->active_scan_mask,
iio_dev->masklength) {
/*
* First transfer will start from the beginning of the first
* ones-field in the bitmap
*/
if (first) {
xfer_start = start;
} else {
/*
* We found the next ones-field; check whether to
* include it in * the current transfer or not (i.e.
* let's perform the current * transfer and prepare for
* another one).
*/
/*
* In case the zeros-gap contains the quaternion bit,
* then its length is actually 4 words instead of 1
* (i.e. +3 wrt other channels).
*/
quat_extra_len = ((start > BNO055_SCAN_QUATERNION) &&
(prev_end <= BNO055_SCAN_QUATERNION)) ? 3 : 0;
/* If the gap is wider than xfer_burst_break_thr then.. */
thr_hit = (start - prev_end + quat_extra_len) >
priv->xfer_burst_break_thr;
/*
* .. transfer all the data up to the gap. Then set the
* next transfer start index at right after the gap
* (i.e. at the start of this ones-field).
*/
if (thr_hit) {
mask = *iio_dev->active_scan_mask >> xfer_start;
ret = bno055_scan_xfer(priv, xfer_start,
prev_end - xfer_start,
mask, priv->buf.chans, &buf_idx);
if (ret)
goto done;
xfer_start = start;
}
}
first = false;
prev_end = end;
}
/*
* We finished walking the bitmap; no more gaps to check for. Just
* perform the current transfer.
*/
mask = *iio_dev->active_scan_mask >> xfer_start;
ret = bno055_scan_xfer(priv, xfer_start,
prev_end - xfer_start,
mask, priv->buf.chans, &buf_idx);
if (!ret)
iio_push_to_buffers_with_timestamp(iio_dev,
&priv->buf, pf->timestamp);
done:
mutex_unlock(&priv->lock);
iio_trigger_notify_done(iio_dev->trig);
return IRQ_HANDLED;
}
static int bno055_buffer_preenable(struct iio_dev *indio_dev)
{
struct bno055_priv *priv = iio_priv(indio_dev);
const unsigned long fusion_mask =
BIT(BNO055_SCAN_YAW) |
BIT(BNO055_SCAN_ROLL) |
BIT(BNO055_SCAN_PITCH) |
BIT(BNO055_SCAN_QUATERNION) |
BIT(BNO055_SCAN_LIA_X) |
BIT(BNO055_SCAN_LIA_Y) |
BIT(BNO055_SCAN_LIA_Z) |
BIT(BNO055_SCAN_GRAVITY_X) |
BIT(BNO055_SCAN_GRAVITY_Y) |
BIT(BNO055_SCAN_GRAVITY_Z);
if (priv->operation_mode == BNO055_OPR_MODE_AMG &&
bitmap_intersects(indio_dev->active_scan_mask, &fusion_mask,
_BNO055_SCAN_MAX))
return -EBUSY;
return 0;
}
static const struct iio_buffer_setup_ops bno055_buffer_setup_ops = {
.preenable = bno055_buffer_preenable,
};
int bno055_probe(struct device *dev, struct regmap *regmap,
int xfer_burst_break_thr, bool sw_reset)
{
const struct firmware *caldata = NULL;
struct bno055_priv *priv;
struct iio_dev *iio_dev;
char *fw_name_buf;
unsigned int val;
int rev, ver;
int ret;
iio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
if (!iio_dev)
return -ENOMEM;
iio_dev->name = "bno055";
priv = iio_priv(iio_dev);
mutex_init(&priv->lock);
priv->regmap = regmap;
priv->dev = dev;
priv->xfer_burst_break_thr = xfer_burst_break_thr;
priv->sw_reset = sw_reset;
priv->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(priv->reset_gpio))
return dev_err_probe(dev, PTR_ERR(priv->reset_gpio), "Failed to get reset GPIO\n");
priv->clk = devm_clk_get_optional_enabled(dev, "clk");
if (IS_ERR(priv->clk))
return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to get CLK\n");
if (priv->reset_gpio) {
usleep_range(5000, 10000);
gpiod_set_value_cansleep(priv->reset_gpio, 1);
usleep_range(650000, 750000);
} else if (!sw_reset) {
dev_warn(dev, "No usable reset method; IMU may be unreliable\n");
}
ret = regmap_read(priv->regmap, BNO055_CHIP_ID_REG, &val);
if (ret)
return ret;
if (val != BNO055_CHIP_ID_MAGIC)
dev_warn(dev, "Unrecognized chip ID 0x%x\n", val);
/*
* In case we haven't a HW reset pin, we can still reset the chip via
* register write. This is probably nonsense in case we can't even
* communicate with the chip or the chip isn't the one we expect (i.e.
* we don't write to unknown chips), so we perform SW reset only after
* chip magic ID check
*/
if (!priv->reset_gpio) {
ret = bno055_system_reset(priv);
if (ret)
return ret;
}
ret = regmap_read(priv->regmap, BNO055_SW_REV_LSB_REG, &rev);
if (ret)
return ret;
ret = regmap_read(priv->regmap, BNO055_SW_REV_MSB_REG, &ver);
if (ret)
return ret;
/*
* The stock FW version contains a bug (see comment at the beginning of
* this file) that causes the anglvel scale to be changed depending on
* the chip range setting. We workaround this, but we don't know what
* other FW versions might do.
*/
if (ver != 0x3 || rev != 0x11)
dev_warn(dev, "Untested firmware version. Anglvel scale may not work as expected\n");
ret = regmap_bulk_read(priv->regmap, BNO055_UID_LOWER_REG,
priv->uid, BNO055_UID_LEN);
if (ret)
return ret;
/* Sensor calibration data */
fw_name_buf = kasprintf(GFP_KERNEL, BNO055_FW_UID_FMT,
BNO055_UID_LEN, priv->uid);
if (!fw_name_buf)
return -ENOMEM;
ret = request_firmware(&caldata, fw_name_buf, dev);
kfree(fw_name_buf);
if (ret)
ret = request_firmware(&caldata, BNO055_FW_GENERIC_NAME, dev);
if (ret) {
dev_notice(dev, "Calibration file load failed. See instruction in kernel Documentation/iio/bno055.rst\n");
ret = bno055_init(priv, NULL, 0);
} else {
ret = bno055_init(priv, caldata->data, caldata->size);
release_firmware(caldata);
}
if (ret)
return ret;
priv->operation_mode = BNO055_OPR_MODE_FUSION;
ret = bno055_operation_mode_do_set(priv, priv->operation_mode);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, bno055_uninit, priv);
if (ret)
return ret;
iio_dev->channels = bno055_channels;
iio_dev->num_channels = ARRAY_SIZE(bno055_channels);
iio_dev->info = &bno055_info;
iio_dev->modes = INDIO_DIRECT_MODE;
ret = devm_iio_triggered_buffer_setup(dev, iio_dev,
iio_pollfunc_store_time,
bno055_trigger_handler,
&bno055_buffer_setup_ops);
if (ret)
return ret;
ret = devm_iio_device_register(dev, iio_dev);
if (ret)
return ret;
bno055_debugfs_init(iio_dev);
return 0;
}
EXPORT_SYMBOL_NS_GPL(bno055_probe, IIO_BNO055);
MODULE_AUTHOR("Andrea Merello <[email protected]>");
MODULE_DESCRIPTION("Bosch BNO055 driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/imu/bno055/bno055.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Serial line interface for Bosh BNO055 IMU (via serdev).
* This file implements serial communication up to the register read/write
* level.
*
* Copyright (C) 2021-2022 Istituto Italiano di Tecnologia
* Electronic Design Laboratory
* Written by Andrea Merello <[email protected]>
*
* This driver is based on
* Plantower PMS7003 particulate matter sensor driver
* Which is
* Copyright (c) Tomasz Duszynski <[email protected]>
*/
#include <linux/completion.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/serdev.h>
#include "bno055_ser_trace.h"
#include "bno055.h"
/*
* Register writes cmd have the following format
* +------+------+-----+-----+----- ... ----+
* | 0xAA | 0xOO | REG | LEN | payload[LEN] |
* +------+------+-----+-----+----- ... ----+
*
* Register write responses have the following format
* +------+----------+
* | 0xEE | ERROCODE |
* +------+----------+
*
* .. except when writing the SYS_RST bit (i.e. triggering a system reset); in
* case the IMU accepts the command, then it resets without responding. We don't
* handle this (yet) here (so we inform the common bno055 code not to perform
* sw resets - bno055 on serial bus basically requires the hw reset pin).
*
* Register read have the following format
* +------+------+-----+-----+
* | 0xAA | 0xO1 | REG | LEN |
* +------+------+-----+-----+
*
* Successful register read response have the following format
* +------+-----+----- ... ----+
* | 0xBB | LEN | payload[LEN] |
* +------+-----+----- ... ----+
*
* Failed register read response have the following format
* +------+--------+
* | 0xEE | ERRCODE| (ERRCODE always > 1)
* +------+--------+
*
* Error codes are
* 01: OK
* 02: read/write FAIL
* 04: invalid address
* 05: write on RO
* 06: wrong start byte
* 07: bus overrun
* 08: len too high
* 09: len too low
* 10: bus RX byte timeout (timeout is 30mS)
*
*
* **WORKAROUND ALERT**
*
* Serial communication seems very fragile: the BNO055 buffer seems to overflow
* very easy; BNO055 seems able to sink few bytes, then it needs a brief pause.
* On the other hand, it is also picky on timeout: if there is a pause > 30mS in
* between two bytes then the transaction fails (IMU internal RX FSM resets).
*
* BNO055 has been seen also failing to process commands in case we send them
* too close each other (or if it is somehow busy?)
*
* In particular I saw these scenarios:
* 1) If we send 2 bytes per time, then the IMU never(?) overflows.
* 2) If we send 4 bytes per time (i.e. the full header), then the IMU could
* overflow, but it seem to sink all 4 bytes, then it returns error.
* 3) If we send more than 4 bytes, the IMU could overflow, and I saw it sending
* error after 4 bytes are sent; we have troubles in synchronizing again,
* because we are still sending data, and the IMU interprets it as the 1st
* byte of a new command.
*
* While we must avoid case 3, we could send 4 bytes per time and eventually
* retry in case of failure; this seemed convenient for reads (which requires
* TXing exactly 4 bytes), however it has been seen that, depending by the IMU
* settings (e.g. LPF), failures became less or more frequent; in certain IMU
* configurations they are very rare, but in certain others we keeps failing
* even after like 30 retries.
*
* So, we just split TXes in [2-bytes + delay] steps, and still keep an eye on
* the IMU response; in case it overflows (which is now unlikely), we retry.
*/
/*
* Read operation overhead:
* 4 bytes req + 2byte resp hdr.
* 6 bytes = 60 bit (considering 1start + 1stop bits).
* 60/115200 = ~520uS + about 2500mS delay -> ~3mS
* In 3mS we could read back about 34 bytes that means 17 samples, this means
* that in case of scattered reads in which the gap is 17 samples or less it is
* still convenient to go for a burst.
* We have to take into account also IMU response time - IMU seems to be often
* reasonably quick to respond, but sometimes it seems to be in some "critical
* section" in which it delays handling of serial protocol. Because of this we
* round-up to 22, which is the max number of samples, always bursting indeed.
*/
#define BNO055_SER_XFER_BURST_BREAK_THRESHOLD 22
struct bno055_ser_priv {
enum {
CMD_NONE,
CMD_READ,
CMD_WRITE,
} expect_response;
int expected_data_len;
u8 *response_buf;
/**
* enum cmd_status - represent the status of a command sent to the HW.
* @STATUS_CRIT: The command failed: the serial communication failed.
* @STATUS_OK: The command executed successfully.
* @STATUS_FAIL: The command failed: HW responded with an error.
*/
enum {
STATUS_CRIT = -1,
STATUS_OK = 0,
STATUS_FAIL = 1,
} cmd_status;
/*
* Protects all the above fields, which are accessed in behalf of both
* the serdev RX callback and the regmap side
*/
struct mutex lock;
/* Only accessed in serdev RX callback context*/
struct {
enum {
RX_IDLE,
RX_START,
RX_DATA,
} state;
int databuf_count;
int expected_len;
int type;
} rx;
/* Never accessed in behalf of serdev RX callback context */
bool cmd_stale;
struct completion cmd_complete;
struct serdev_device *serdev;
};
static int bno055_ser_send_chunk(struct bno055_ser_priv *priv, const u8 *data, int len)
{
int ret;
trace_send_chunk(len, data);
ret = serdev_device_write(priv->serdev, data, len, msecs_to_jiffies(25));
if (ret < 0)
return ret;
if (ret < len)
return -EIO;
return 0;
}
/*
* Send a read or write command.
* 'data' can be NULL (used in read case). 'len' parameter is always valid; in
* case 'data' is non-NULL then it must match 'data' size.
*/
static int bno055_ser_do_send_cmd(struct bno055_ser_priv *priv,
bool read, int addr, int len, const u8 *data)
{
u8 hdr[] = {0xAA, read, addr, len};
int chunk_len;
int ret;
ret = bno055_ser_send_chunk(priv, hdr, 2);
if (ret)
goto fail;
usleep_range(2000, 3000);
ret = bno055_ser_send_chunk(priv, hdr + 2, 2);
if (ret)
goto fail;
if (read)
return 0;
while (len) {
chunk_len = min(len, 2);
usleep_range(2000, 3000);
ret = bno055_ser_send_chunk(priv, data, chunk_len);
if (ret)
goto fail;
data += chunk_len;
len -= chunk_len;
}
return 0;
fail:
/* waiting more than 30mS should clear the BNO055 internal state */
usleep_range(40000, 50000);
return ret;
}
static int bno055_ser_send_cmd(struct bno055_ser_priv *priv,
bool read, int addr, int len, const u8 *data)
{
const int retry_max = 5;
int retry = retry_max;
int ret = 0;
/*
* In case previous command was interrupted we still need to wait it to
* complete before we can issue new commands
*/
if (priv->cmd_stale) {
ret = wait_for_completion_interruptible_timeout(&priv->cmd_complete,
msecs_to_jiffies(100));
if (ret == -ERESTARTSYS)
return -ERESTARTSYS;
priv->cmd_stale = false;
/* if serial protocol broke, bail out */
if (priv->cmd_status == STATUS_CRIT)
return -EIO;
}
/*
* Try to convince the IMU to cooperate.. as explained in the comments
* at the top of this file, the IMU could also refuse the command (i.e.
* it is not ready yet); retry in this case.
*/
do {
mutex_lock(&priv->lock);
priv->expect_response = read ? CMD_READ : CMD_WRITE;
reinit_completion(&priv->cmd_complete);
mutex_unlock(&priv->lock);
if (retry != retry_max)
trace_cmd_retry(read, addr, retry_max - retry);
ret = bno055_ser_do_send_cmd(priv, read, addr, len, data);
if (ret)
continue;
ret = wait_for_completion_interruptible_timeout(&priv->cmd_complete,
msecs_to_jiffies(100));
if (ret == -ERESTARTSYS) {
priv->cmd_stale = true;
return -ERESTARTSYS;
}
if (!ret)
return -ETIMEDOUT;
if (priv->cmd_status == STATUS_OK)
return 0;
if (priv->cmd_status == STATUS_CRIT)
return -EIO;
/* loop in case priv->cmd_status == STATUS_FAIL */
} while (--retry);
if (ret < 0)
return ret;
if (priv->cmd_status == STATUS_FAIL)
return -EINVAL;
return 0;
}
static int bno055_ser_write_reg(void *context, const void *_data, size_t count)
{
const u8 *data = _data;
struct bno055_ser_priv *priv = context;
if (count < 2) {
dev_err(&priv->serdev->dev, "Invalid write count %zu", count);
return -EINVAL;
}
trace_write_reg(data[0], data[1]);
return bno055_ser_send_cmd(priv, 0, data[0], count - 1, data + 1);
}
static int bno055_ser_read_reg(void *context,
const void *_reg, size_t reg_size,
void *val, size_t val_size)
{
int ret;
int reg_addr;
const u8 *reg = _reg;
struct bno055_ser_priv *priv = context;
if (val_size > 128) {
dev_err(&priv->serdev->dev, "Invalid read valsize %zu", val_size);
return -EINVAL;
}
reg_addr = *reg;
trace_read_reg(reg_addr, val_size);
mutex_lock(&priv->lock);
priv->expected_data_len = val_size;
priv->response_buf = val;
mutex_unlock(&priv->lock);
ret = bno055_ser_send_cmd(priv, 1, reg_addr, val_size, NULL);
mutex_lock(&priv->lock);
priv->response_buf = NULL;
mutex_unlock(&priv->lock);
return ret;
}
/*
* Handler for received data; this is called from the receiver callback whenever
* it got some packet from the serial bus. The status tells us whether the
* packet is valid (i.e. header ok && received payload len consistent wrt the
* header). It's now our responsibility to check whether this is what we
* expected, of whether we got some unexpected, yet valid, packet.
*/
static void bno055_ser_handle_rx(struct bno055_ser_priv *priv, int status)
{
mutex_lock(&priv->lock);
switch (priv->expect_response) {
case CMD_NONE:
dev_warn(&priv->serdev->dev, "received unexpected, yet valid, data from sensor");
mutex_unlock(&priv->lock);
return;
case CMD_READ:
priv->cmd_status = status;
if (status == STATUS_OK &&
priv->rx.databuf_count != priv->expected_data_len) {
/*
* If we got here, then the lower layer serial protocol
* seems consistent with itself; if we got an unexpected
* amount of data then signal it as a non critical error
*/
priv->cmd_status = STATUS_FAIL;
dev_warn(&priv->serdev->dev,
"received an unexpected amount of, yet valid, data from sensor");
}
break;
case CMD_WRITE:
priv->cmd_status = status;
break;
}
priv->expect_response = CMD_NONE;
mutex_unlock(&priv->lock);
complete(&priv->cmd_complete);
}
/*
* Serdev receiver FSM. This tracks the serial communication and parse the
* header. It pushes packets to bno055_ser_handle_rx(), eventually communicating
* failures (i.e. malformed packets).
* Ideally it doesn't know anything about upper layer (i.e. if this is the
* packet we were really expecting), but since we copies the payload into the
* receiver buffer (that is not valid when i.e. we don't expect data), we
* snoop a bit in the upper layer..
* Also, we assume to RX one pkt per time (i.e. the HW doesn't send anything
* unless we require to AND we don't queue more than one request per time).
*/
static int bno055_ser_receive_buf(struct serdev_device *serdev,
const unsigned char *buf, size_t size)
{
int status;
struct bno055_ser_priv *priv = serdev_device_get_drvdata(serdev);
int remaining = size;
if (size == 0)
return 0;
trace_recv(size, buf);
switch (priv->rx.state) {
case RX_IDLE:
/*
* New packet.
* Check for its 1st byte that identifies the pkt type.
*/
if (buf[0] != 0xEE && buf[0] != 0xBB) {
dev_err(&priv->serdev->dev,
"Invalid packet start %x", buf[0]);
bno055_ser_handle_rx(priv, STATUS_CRIT);
break;
}
priv->rx.type = buf[0];
priv->rx.state = RX_START;
remaining--;
buf++;
priv->rx.databuf_count = 0;
fallthrough;
case RX_START:
/*
* Packet RX in progress, we expect either 1-byte len or 1-byte
* status depending by the packet type.
*/
if (remaining == 0)
break;
if (priv->rx.type == 0xEE) {
if (remaining > 1) {
dev_err(&priv->serdev->dev, "EE pkt. Extra data received");
status = STATUS_CRIT;
} else {
status = (buf[0] == 1) ? STATUS_OK : STATUS_FAIL;
}
bno055_ser_handle_rx(priv, status);
priv->rx.state = RX_IDLE;
break;
} else {
/*priv->rx.type == 0xBB */
priv->rx.state = RX_DATA;
priv->rx.expected_len = buf[0];
remaining--;
buf++;
}
fallthrough;
case RX_DATA:
/* Header parsed; now receiving packet data payload */
if (remaining == 0)
break;
if (priv->rx.databuf_count + remaining > priv->rx.expected_len) {
/*
* This is an inconsistency in serial protocol, we lost
* sync and we don't know how to handle further data
*/
dev_err(&priv->serdev->dev, "BB pkt. Extra data received");
bno055_ser_handle_rx(priv, STATUS_CRIT);
priv->rx.state = RX_IDLE;
break;
}
mutex_lock(&priv->lock);
/*
* NULL e.g. when read cmd is stale or when no read cmd is
* actually pending.
*/
if (priv->response_buf &&
/*
* Snoop on the upper layer protocol stuff to make sure not
* to write to an invalid memory. Apart for this, let's the
* upper layer manage any inconsistency wrt expected data
* len (as long as the serial protocol is consistent wrt
* itself (i.e. response header is consistent with received
* response len.
*/
(priv->rx.databuf_count + remaining <= priv->expected_data_len))
memcpy(priv->response_buf + priv->rx.databuf_count,
buf, remaining);
mutex_unlock(&priv->lock);
priv->rx.databuf_count += remaining;
/*
* Reached expected len advertised by the IMU for the current
* packet. Pass it to the upper layer (for us it is just valid).
*/
if (priv->rx.databuf_count == priv->rx.expected_len) {
bno055_ser_handle_rx(priv, STATUS_OK);
priv->rx.state = RX_IDLE;
}
break;
}
return size;
}
static const struct serdev_device_ops bno055_ser_serdev_ops = {
.receive_buf = bno055_ser_receive_buf,
.write_wakeup = serdev_device_write_wakeup,
};
static struct regmap_bus bno055_ser_regmap_bus = {
.write = bno055_ser_write_reg,
.read = bno055_ser_read_reg,
};
static int bno055_ser_probe(struct serdev_device *serdev)
{
struct bno055_ser_priv *priv;
struct regmap *regmap;
int ret;
priv = devm_kzalloc(&serdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
serdev_device_set_drvdata(serdev, priv);
priv->serdev = serdev;
mutex_init(&priv->lock);
init_completion(&priv->cmd_complete);
serdev_device_set_client_ops(serdev, &bno055_ser_serdev_ops);
ret = devm_serdev_device_open(&serdev->dev, serdev);
if (ret)
return ret;
if (serdev_device_set_baudrate(serdev, 115200) != 115200) {
dev_err(&serdev->dev, "Cannot set required baud rate");
return -EIO;
}
ret = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE);
if (ret) {
dev_err(&serdev->dev, "Cannot set required parity setting");
return ret;
}
serdev_device_set_flow_control(serdev, false);
regmap = devm_regmap_init(&serdev->dev, &bno055_ser_regmap_bus,
priv, &bno055_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&serdev->dev, PTR_ERR(regmap),
"Unable to init register map");
return bno055_probe(&serdev->dev, regmap,
BNO055_SER_XFER_BURST_BREAK_THRESHOLD, false);
}
static const struct of_device_id bno055_ser_of_match[] = {
{ .compatible = "bosch,bno055" },
{ }
};
MODULE_DEVICE_TABLE(of, bno055_ser_of_match);
static struct serdev_device_driver bno055_ser_driver = {
.driver = {
.name = "bno055-ser",
.of_match_table = bno055_ser_of_match,
},
.probe = bno055_ser_probe,
};
module_serdev_device_driver(bno055_ser_driver);
MODULE_AUTHOR("Andrea Merello <[email protected]>");
MODULE_DESCRIPTION("Bosch BNO055 serdev interface");
MODULE_IMPORT_NS(IIO_BNO055);
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/imu/bno055/bno055_ser_core.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Support for I2C-interfaced Bosch BNO055 IMU.
*
* Copyright (C) 2021-2022 Istituto Italiano di Tecnologia
* Electronic Design Laboratory
* Written by Andrea Merello <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "bno055.h"
#define BNO055_I2C_XFER_BURST_BREAK_THRESHOLD 3
static int bno055_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &bno055_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&client->dev, PTR_ERR(regmap),
"Unable to init register map");
return bno055_probe(&client->dev, regmap,
BNO055_I2C_XFER_BURST_BREAK_THRESHOLD, true);
}
static const struct i2c_device_id bno055_i2c_id[] = {
{"bno055", 0},
{ }
};
MODULE_DEVICE_TABLE(i2c, bno055_i2c_id);
static const struct of_device_id __maybe_unused bno055_i2c_of_match[] = {
{ .compatible = "bosch,bno055" },
{ }
};
MODULE_DEVICE_TABLE(of, bno055_i2c_of_match);
static struct i2c_driver bno055_driver = {
.driver = {
.name = "bno055-i2c",
.of_match_table = bno055_i2c_of_match,
},
.probe = bno055_i2c_probe,
.id_table = bno055_i2c_id,
};
module_i2c_driver(bno055_driver);
MODULE_AUTHOR("Andrea Merello");
MODULE_DESCRIPTION("Bosch BNO055 I2C interface");
MODULE_IMPORT_NS(IIO_BNO055);
MODULE_LICENSE("GPL");
| linux-master | drivers/iio/imu/bno055/bno055_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2015 Intel Corporation Inc.
*/
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/spi/spi.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include "inv_mpu_iio.h"
static const struct regmap_config inv_mpu_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int inv_mpu_i2c_disable(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int ret = 0;
if (st->reg->i2c_if) {
ret = regmap_write(st->map, st->reg->i2c_if,
INV_ICM20602_BIT_I2C_IF_DIS);
} else {
st->chip_config.user_ctrl |= INV_MPU6050_BIT_I2C_IF_DIS;
ret = regmap_write(st->map, st->reg->user_ctrl,
st->chip_config.user_ctrl);
}
return ret;
}
static int inv_mpu_probe(struct spi_device *spi)
{
const void *match;
struct regmap *regmap;
const struct spi_device_id *spi_id;
const char *name = NULL;
enum inv_devices chip_type;
if ((spi_id = spi_get_device_id(spi))) {
chip_type = (enum inv_devices)spi_id->driver_data;
name = spi_id->name;
} else if ((match = device_get_match_data(&spi->dev))) {
chip_type = (uintptr_t)match;
name = dev_name(&spi->dev);
} else {
return -ENODEV;
}
regmap = devm_regmap_init_spi(spi, &inv_mpu_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
return inv_mpu_core_probe(regmap, spi->irq, name,
inv_mpu_i2c_disable, chip_type);
}
/*
* device id table is used to identify what device can be
* supported by this driver
*/
static const struct spi_device_id inv_mpu_id[] = {
{"mpu6000", INV_MPU6000},
{"mpu6500", INV_MPU6500},
{"mpu6515", INV_MPU6515},
{"mpu6880", INV_MPU6880},
{"mpu9250", INV_MPU9250},
{"mpu9255", INV_MPU9255},
{"icm20608", INV_ICM20608},
{"icm20608d", INV_ICM20608D},
{"icm20609", INV_ICM20609},
{"icm20689", INV_ICM20689},
{"icm20600", INV_ICM20600},
{"icm20602", INV_ICM20602},
{"icm20690", INV_ICM20690},
{"iam20680", INV_IAM20680},
{}
};
MODULE_DEVICE_TABLE(spi, inv_mpu_id);
static const struct of_device_id inv_of_match[] = {
{
.compatible = "invensense,mpu6000",
.data = (void *)INV_MPU6000
},
{
.compatible = "invensense,mpu6500",
.data = (void *)INV_MPU6500
},
{
.compatible = "invensense,mpu6515",
.data = (void *)INV_MPU6515
},
{
.compatible = "invensense,mpu6880",
.data = (void *)INV_MPU6880
},
{
.compatible = "invensense,mpu9250",
.data = (void *)INV_MPU9250
},
{
.compatible = "invensense,mpu9255",
.data = (void *)INV_MPU9255
},
{
.compatible = "invensense,icm20608",
.data = (void *)INV_ICM20608
},
{
.compatible = "invensense,icm20608d",
.data = (void *)INV_ICM20608D
},
{
.compatible = "invensense,icm20609",
.data = (void *)INV_ICM20609
},
{
.compatible = "invensense,icm20689",
.data = (void *)INV_ICM20689
},
{
.compatible = "invensense,icm20600",
.data = (void *)INV_ICM20600
},
{
.compatible = "invensense,icm20602",
.data = (void *)INV_ICM20602
},
{
.compatible = "invensense,icm20690",
.data = (void *)INV_ICM20690
},
{
.compatible = "invensense,iam20680",
.data = (void *)INV_IAM20680
},
{ }
};
MODULE_DEVICE_TABLE(of, inv_of_match);
static const struct acpi_device_id inv_acpi_match[] = {
{"INVN6000", INV_MPU6000},
{ },
};
MODULE_DEVICE_TABLE(acpi, inv_acpi_match);
static struct spi_driver inv_mpu_driver = {
.probe = inv_mpu_probe,
.id_table = inv_mpu_id,
.driver = {
.of_match_table = inv_of_match,
.acpi_match_table = inv_acpi_match,
.name = "inv-mpu6000-spi",
.pm = pm_ptr(&inv_mpu_pmops),
},
};
module_spi_driver(inv_mpu_driver);
MODULE_AUTHOR("Adriana Reus <[email protected]>");
MODULE_DESCRIPTION("Invensense device MPU6000 driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_MPU6050);
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 TDK-InvenSense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/regmap.h>
#include <linux/delay.h>
#include "inv_mpu_aux.h"
#include "inv_mpu_iio.h"
/*
* i2c master auxiliary bus transfer function.
* Requires the i2c operations to be correctly setup before.
*/
static int inv_mpu_i2c_master_xfer(const struct inv_mpu6050_state *st)
{
/* use 50hz frequency for xfer */
const unsigned int freq = 50;
const unsigned int period_ms = 1000 / freq;
uint8_t d;
unsigned int user_ctrl;
int ret;
/* set sample rate */
d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(freq);
ret = regmap_write(st->map, st->reg->sample_rate_div, d);
if (ret)
return ret;
/* start i2c master */
user_ctrl = st->chip_config.user_ctrl | INV_MPU6050_BIT_I2C_MST_EN;
ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
if (ret)
goto error_restore_rate;
/* wait for xfer: 1 period + half-period margin */
msleep(period_ms + period_ms / 2);
/* stop i2c master */
user_ctrl = st->chip_config.user_ctrl;
ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
if (ret)
goto error_stop_i2c;
/* restore sample rate */
d = st->chip_config.divider;
ret = regmap_write(st->map, st->reg->sample_rate_div, d);
if (ret)
goto error_restore_rate;
return 0;
error_stop_i2c:
regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl);
error_restore_rate:
regmap_write(st->map, st->reg->sample_rate_div, st->chip_config.divider);
return ret;
}
/**
* inv_mpu_aux_init() - init i2c auxiliary bus
* @st: driver internal state
*
* Returns 0 on success, a negative error code otherwise.
*/
int inv_mpu_aux_init(const struct inv_mpu6050_state *st)
{
unsigned int val;
int ret;
/* configure i2c master */
val = INV_MPU6050_BITS_I2C_MST_CLK_400KHZ |
INV_MPU6050_BIT_WAIT_FOR_ES;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_MST_CTRL, val);
if (ret)
return ret;
/* configure i2c master delay */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, 0);
if (ret)
return ret;
val = INV_MPU6050_BIT_I2C_SLV0_DLY_EN |
INV_MPU6050_BIT_I2C_SLV1_DLY_EN |
INV_MPU6050_BIT_I2C_SLV2_DLY_EN |
INV_MPU6050_BIT_I2C_SLV3_DLY_EN |
INV_MPU6050_BIT_DELAY_ES_SHADOW;
return regmap_write(st->map, INV_MPU6050_REG_I2C_MST_DELAY_CTRL, val);
}
/**
* inv_mpu_aux_read() - read register function for i2c auxiliary bus
* @st: driver internal state.
* @addr: chip i2c Address
* @reg: chip register address
* @val: buffer for storing read bytes
* @size: number of bytes to read
*
* Returns 0 on success, a negative error code otherwise.
*/
int inv_mpu_aux_read(const struct inv_mpu6050_state *st, uint8_t addr,
uint8_t reg, uint8_t *val, size_t size)
{
unsigned int status;
int ret;
if (size > 0x0F)
return -EINVAL;
/* setup i2c SLV0 control: i2c addr, register, enable + size */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0),
INV_MPU6050_BIT_I2C_SLV_RNW | addr);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
INV_MPU6050_BIT_SLV_EN | size);
if (ret)
return ret;
/* do i2c xfer */
ret = inv_mpu_i2c_master_xfer(st);
if (ret)
goto error_disable_i2c;
/* disable i2c slave */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
if (ret)
goto error_disable_i2c;
/* check i2c status */
ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status);
if (ret)
return ret;
if (status & INV_MPU6050_BIT_I2C_SLV0_NACK)
return -EIO;
/* read data in registers */
return regmap_bulk_read(st->map, INV_MPU6050_REG_EXT_SENS_DATA,
val, size);
error_disable_i2c:
regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
return ret;
}
/**
* inv_mpu_aux_write() - write register function for i2c auxiliary bus
* @st: driver internal state.
* @addr: chip i2c Address
* @reg: chip register address
* @val: 1 byte value to write
*
* Returns 0 on success, a negative error code otherwise.
*/
int inv_mpu_aux_write(const struct inv_mpu6050_state *st, uint8_t addr,
uint8_t reg, uint8_t val)
{
unsigned int status;
int ret;
/* setup i2c SLV0 control: i2c addr, register, value, enable + size */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), addr);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_DO(0), val);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
INV_MPU6050_BIT_SLV_EN | 1);
if (ret)
return ret;
/* do i2c xfer */
ret = inv_mpu_i2c_master_xfer(st);
if (ret)
goto error_disable_i2c;
/* disable i2c slave */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
if (ret)
goto error_disable_i2c;
/* check i2c status */
ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status);
if (ret)
return ret;
if (status & INV_MPU6050_BIT_I2C_SLV0_NACK)
return -EIO;
return 0;
error_disable_i2c:
regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
return ret;
}
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_aux.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#include <linux/pm_runtime.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include "inv_mpu_iio.h"
static unsigned int inv_scan_query_mpu6050(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
unsigned int mask;
/*
* If the MPU6050 is just used as a trigger, then the scan mask
* is not allocated so we simply enable the temperature channel
* as a dummy and bail out.
*/
if (!indio_dev->active_scan_mask) {
st->chip_config.temp_fifo_enable = true;
return INV_MPU6050_SENSOR_TEMP;
}
st->chip_config.gyro_fifo_enable =
test_bit(INV_MPU6050_SCAN_GYRO_X,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_GYRO_Y,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_GYRO_Z,
indio_dev->active_scan_mask);
st->chip_config.accl_fifo_enable =
test_bit(INV_MPU6050_SCAN_ACCL_X,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_ACCL_Y,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_ACCL_Z,
indio_dev->active_scan_mask);
st->chip_config.temp_fifo_enable =
test_bit(INV_MPU6050_SCAN_TEMP, indio_dev->active_scan_mask);
mask = 0;
if (st->chip_config.gyro_fifo_enable)
mask |= INV_MPU6050_SENSOR_GYRO;
if (st->chip_config.accl_fifo_enable)
mask |= INV_MPU6050_SENSOR_ACCL;
if (st->chip_config.temp_fifo_enable)
mask |= INV_MPU6050_SENSOR_TEMP;
return mask;
}
static unsigned int inv_scan_query_mpu9x50(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
unsigned int mask;
mask = inv_scan_query_mpu6050(indio_dev);
/* no magnetometer if i2c auxiliary bus is used */
if (st->magn_disabled)
return mask;
st->chip_config.magn_fifo_enable =
test_bit(INV_MPU9X50_SCAN_MAGN_X,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU9X50_SCAN_MAGN_Y,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU9X50_SCAN_MAGN_Z,
indio_dev->active_scan_mask);
if (st->chip_config.magn_fifo_enable)
mask |= INV_MPU6050_SENSOR_MAGN;
return mask;
}
static unsigned int inv_scan_query(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
return inv_scan_query_mpu9x50(indio_dev);
default:
return inv_scan_query_mpu6050(indio_dev);
}
}
static unsigned int inv_compute_skip_samples(const struct inv_mpu6050_state *st)
{
unsigned int skip_samples = 0;
/* mag first sample is always not ready, skip it */
if (st->chip_config.magn_fifo_enable)
skip_samples = 1;
return skip_samples;
}
int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable)
{
uint8_t d;
int ret;
if (enable) {
/* reset timestamping */
inv_sensors_timestamp_reset(&st->timestamp);
/* reset FIFO */
d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST;
ret = regmap_write(st->map, st->reg->user_ctrl, d);
if (ret)
return ret;
/* enable sensor output to FIFO */
d = 0;
if (st->chip_config.gyro_fifo_enable)
d |= INV_MPU6050_BITS_GYRO_OUT;
if (st->chip_config.accl_fifo_enable)
d |= INV_MPU6050_BIT_ACCEL_OUT;
if (st->chip_config.temp_fifo_enable)
d |= INV_MPU6050_BIT_TEMP_OUT;
if (st->chip_config.magn_fifo_enable)
d |= INV_MPU6050_BIT_SLAVE_0;
ret = regmap_write(st->map, st->reg->fifo_en, d);
if (ret)
return ret;
/* enable FIFO reading */
d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_EN;
ret = regmap_write(st->map, st->reg->user_ctrl, d);
if (ret)
return ret;
/* enable interrupt */
ret = regmap_write(st->map, st->reg->int_enable,
INV_MPU6050_BIT_DATA_RDY_EN);
} else {
ret = regmap_write(st->map, st->reg->int_enable, 0);
if (ret)
return ret;
ret = regmap_write(st->map, st->reg->fifo_en, 0);
if (ret)
return ret;
/* restore user_ctrl for disabling FIFO reading */
ret = regmap_write(st->map, st->reg->user_ctrl,
st->chip_config.user_ctrl);
}
return ret;
}
/**
* inv_mpu6050_set_enable() - enable chip functions.
* @indio_dev: Device driver instance.
* @enable: enable/disable
*/
static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct device *pdev = regmap_get_device(st->map);
unsigned int scan;
int result;
if (enable) {
scan = inv_scan_query(indio_dev);
result = pm_runtime_resume_and_get(pdev);
if (result)
return result;
/*
* In case autosuspend didn't trigger, turn off first not
* required sensors.
*/
result = inv_mpu6050_switch_engine(st, false, ~scan);
if (result)
goto error_power_off;
result = inv_mpu6050_switch_engine(st, true, scan);
if (result)
goto error_power_off;
st->skip_samples = inv_compute_skip_samples(st);
result = inv_mpu6050_prepare_fifo(st, true);
if (result)
goto error_power_off;
} else {
result = inv_mpu6050_prepare_fifo(st, false);
if (result)
goto error_power_off;
pm_runtime_mark_last_busy(pdev);
pm_runtime_put_autosuspend(pdev);
}
return 0;
error_power_off:
pm_runtime_put_autosuspend(pdev);
return result;
}
/**
* inv_mpu_data_rdy_trigger_set_state() - set data ready interrupt state
* @trig: Trigger instance
* @state: Desired trigger state
*/
static int inv_mpu_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int result;
mutex_lock(&st->lock);
result = inv_mpu6050_set_enable(indio_dev, state);
mutex_unlock(&st->lock);
return result;
}
static const struct iio_trigger_ops inv_mpu_trigger_ops = {
.set_trigger_state = &inv_mpu_data_rdy_trigger_set_state,
};
int inv_mpu6050_probe_trigger(struct iio_dev *indio_dev, int irq_type)
{
int ret;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
st->trig = devm_iio_trigger_alloc(&indio_dev->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!st->trig)
return -ENOMEM;
ret = devm_request_irq(&indio_dev->dev, st->irq,
&iio_trigger_generic_data_rdy_poll,
irq_type,
"inv_mpu",
st->trig);
if (ret)
return ret;
st->trig->dev.parent = regmap_get_device(st->map);
st->trig->ops = &inv_mpu_trigger_ops;
iio_trigger_set_drvdata(st->trig, indio_dev);
ret = devm_iio_trigger_register(&indio_dev->dev, st->trig);
if (ret)
return ret;
indio_dev->trig = iio_trigger_get(st->trig);
return 0;
}
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/property.h>
#include "inv_mpu_iio.h"
static const struct regmap_config inv_mpu_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int inv_mpu6050_select_bypass(struct i2c_mux_core *muxc, u32 chan_id)
{
return 0;
}
static bool inv_mpu_i2c_aux_bus(struct device *dev)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
switch (st->chip_type) {
case INV_ICM20608:
case INV_ICM20608D:
case INV_ICM20609:
case INV_ICM20689:
case INV_ICM20600:
case INV_ICM20602:
case INV_IAM20680:
/* no i2c auxiliary bus on the chip */
return false;
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
if (st->magn_disabled)
return true;
else
return false;
default:
return true;
}
}
static int inv_mpu_i2c_aux_setup(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct device *dev = indio_dev->dev.parent;
struct fwnode_handle *mux_node;
int ret;
/*
* MPU9xxx magnetometer support requires to disable i2c auxiliary bus.
* To ensure backward compatibility with existing setups, do not disable
* i2c auxiliary bus if it used.
* Check for i2c-gate node in devicetree and set magnetometer disabled.
* Only MPU6500 is supported by ACPI, no need to check.
*/
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
mux_node = device_get_named_child_node(dev, "i2c-gate");
if (mux_node != NULL) {
st->magn_disabled = true;
dev_warn(dev, "disable internal use of magnetometer\n");
}
fwnode_handle_put(mux_node);
break;
default:
break;
}
/* enable i2c bypass when using i2c auxiliary bus */
if (inv_mpu_i2c_aux_bus(dev)) {
ret = regmap_write(st->map, st->reg->int_pin_cfg,
st->irq_mask | INV_MPU6050_BIT_BYPASS_EN);
if (ret)
return ret;
}
return 0;
}
/**
* inv_mpu_probe() - probe function.
* @client: i2c client.
*
* Returns 0 on success, a negative error code otherwise.
*/
static int inv_mpu_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
const void *match;
struct inv_mpu6050_state *st;
int result;
enum inv_devices chip_type;
struct regmap *regmap;
const char *name;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_I2C_BLOCK))
return -EOPNOTSUPP;
match = device_get_match_data(&client->dev);
if (match) {
chip_type = (uintptr_t)match;
name = client->name;
} else if (id) {
chip_type = (enum inv_devices)
id->driver_data;
name = id->name;
} else {
return -ENOSYS;
}
regmap = devm_regmap_init_i2c(client, &inv_mpu_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
result = inv_mpu_core_probe(regmap, client->irq, name,
inv_mpu_i2c_aux_setup, chip_type);
if (result < 0)
return result;
st = iio_priv(dev_get_drvdata(&client->dev));
if (inv_mpu_i2c_aux_bus(&client->dev)) {
/* declare i2c auxiliary bus */
st->muxc = i2c_mux_alloc(client->adapter, &client->dev,
1, 0, I2C_MUX_LOCKED | I2C_MUX_GATE,
inv_mpu6050_select_bypass, NULL);
if (!st->muxc)
return -ENOMEM;
st->muxc->priv = dev_get_drvdata(&client->dev);
result = i2c_mux_add_adapter(st->muxc, 0, 0, 0);
if (result)
return result;
result = inv_mpu_acpi_create_mux_client(client);
if (result)
goto out_del_mux;
}
return 0;
out_del_mux:
i2c_mux_del_adapters(st->muxc);
return result;
}
static void inv_mpu_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
if (st->muxc) {
inv_mpu_acpi_delete_mux_client(client);
i2c_mux_del_adapters(st->muxc);
}
}
/*
* device id table is used to identify what device can be
* supported by this driver
*/
static const struct i2c_device_id inv_mpu_id[] = {
{"mpu6050", INV_MPU6050},
{"mpu6500", INV_MPU6500},
{"mpu6515", INV_MPU6515},
{"mpu6880", INV_MPU6880},
{"mpu9150", INV_MPU9150},
{"mpu9250", INV_MPU9250},
{"mpu9255", INV_MPU9255},
{"icm20608", INV_ICM20608},
{"icm20608d", INV_ICM20608D},
{"icm20609", INV_ICM20609},
{"icm20689", INV_ICM20689},
{"icm20600", INV_ICM20600},
{"icm20602", INV_ICM20602},
{"icm20690", INV_ICM20690},
{"iam20680", INV_IAM20680},
{}
};
MODULE_DEVICE_TABLE(i2c, inv_mpu_id);
static const struct of_device_id inv_of_match[] = {
{
.compatible = "invensense,mpu6050",
.data = (void *)INV_MPU6050
},
{
.compatible = "invensense,mpu6500",
.data = (void *)INV_MPU6500
},
{
.compatible = "invensense,mpu6515",
.data = (void *)INV_MPU6515
},
{
.compatible = "invensense,mpu6880",
.data = (void *)INV_MPU6880
},
{
.compatible = "invensense,mpu9150",
.data = (void *)INV_MPU9150
},
{
.compatible = "invensense,mpu9250",
.data = (void *)INV_MPU9250
},
{
.compatible = "invensense,mpu9255",
.data = (void *)INV_MPU9255
},
{
.compatible = "invensense,icm20608",
.data = (void *)INV_ICM20608
},
{
.compatible = "invensense,icm20608d",
.data = (void *)INV_ICM20608D
},
{
.compatible = "invensense,icm20609",
.data = (void *)INV_ICM20609
},
{
.compatible = "invensense,icm20689",
.data = (void *)INV_ICM20689
},
{
.compatible = "invensense,icm20600",
.data = (void *)INV_ICM20600
},
{
.compatible = "invensense,icm20602",
.data = (void *)INV_ICM20602
},
{
.compatible = "invensense,icm20690",
.data = (void *)INV_ICM20690
},
{
.compatible = "invensense,iam20680",
.data = (void *)INV_IAM20680
},
{ }
};
MODULE_DEVICE_TABLE(of, inv_of_match);
static const struct acpi_device_id inv_acpi_match[] = {
{"INVN6500", INV_MPU6500},
{ },
};
MODULE_DEVICE_TABLE(acpi, inv_acpi_match);
static struct i2c_driver inv_mpu_driver = {
.probe = inv_mpu_probe,
.remove = inv_mpu_remove,
.id_table = inv_mpu_id,
.driver = {
.of_match_table = inv_of_match,
.acpi_match_table = inv_acpi_match,
.name = "inv-mpu6050-i2c",
.pm = pm_ptr(&inv_mpu_pmops),
},
};
module_i2c_driver(inv_mpu_driver);
MODULE_AUTHOR("Invensense Corporation");
MODULE_DESCRIPTION("Invensense device MPU6050 driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_MPU6050);
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 TDK-InvenSense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/string.h>
#include "inv_mpu_aux.h"
#include "inv_mpu_iio.h"
#include "inv_mpu_magn.h"
/*
* MPU9xxx magnetometer are AKM chips on I2C aux bus
* MPU9150 is AK8975
* MPU9250 is AK8963
*/
#define INV_MPU_MAGN_I2C_ADDR 0x0C
#define INV_MPU_MAGN_REG_WIA 0x00
#define INV_MPU_MAGN_BITS_WIA 0x48
#define INV_MPU_MAGN_REG_ST1 0x02
#define INV_MPU_MAGN_BIT_DRDY 0x01
#define INV_MPU_MAGN_BIT_DOR 0x02
#define INV_MPU_MAGN_REG_DATA 0x03
#define INV_MPU_MAGN_REG_ST2 0x09
#define INV_MPU_MAGN_BIT_HOFL 0x08
#define INV_MPU_MAGN_BIT_BITM 0x10
#define INV_MPU_MAGN_REG_CNTL1 0x0A
#define INV_MPU_MAGN_BITS_MODE_PWDN 0x00
#define INV_MPU_MAGN_BITS_MODE_SINGLE 0x01
#define INV_MPU_MAGN_BITS_MODE_FUSE 0x0F
#define INV_MPU9250_MAGN_BIT_OUTPUT_BIT 0x10
#define INV_MPU9250_MAGN_REG_CNTL2 0x0B
#define INV_MPU9250_MAGN_BIT_SRST 0x01
#define INV_MPU_MAGN_REG_ASAX 0x10
#define INV_MPU_MAGN_REG_ASAY 0x11
#define INV_MPU_MAGN_REG_ASAZ 0x12
static bool inv_magn_supported(const struct inv_mpu6050_state *st)
{
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
return true;
default:
return false;
}
}
/* init magnetometer chip */
static int inv_magn_init(struct inv_mpu6050_state *st)
{
uint8_t val;
uint8_t asa[3];
int32_t sensitivity;
int ret;
/* check whoami */
ret = inv_mpu_aux_read(st, INV_MPU_MAGN_I2C_ADDR, INV_MPU_MAGN_REG_WIA,
&val, sizeof(val));
if (ret)
return ret;
if (val != INV_MPU_MAGN_BITS_WIA)
return -ENODEV;
/* software reset for MPU925x only */
switch (st->chip_type) {
case INV_MPU9250:
case INV_MPU9255:
ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR,
INV_MPU9250_MAGN_REG_CNTL2,
INV_MPU9250_MAGN_BIT_SRST);
if (ret)
return ret;
break;
default:
break;
}
/* read fuse ROM data */
ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR,
INV_MPU_MAGN_REG_CNTL1,
INV_MPU_MAGN_BITS_MODE_FUSE);
if (ret)
return ret;
ret = inv_mpu_aux_read(st, INV_MPU_MAGN_I2C_ADDR, INV_MPU_MAGN_REG_ASAX,
asa, sizeof(asa));
if (ret)
return ret;
/* switch back to power-down */
ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR,
INV_MPU_MAGN_REG_CNTL1,
INV_MPU_MAGN_BITS_MODE_PWDN);
if (ret)
return ret;
/*
* Sensor sentivity
* 1 uT = 0.01 G and value is in micron (1e6)
* sensitvity = x uT * 0.01 * 1e6
*/
switch (st->chip_type) {
case INV_MPU9150:
/* sensor sensitivity is 0.3 uT */
sensitivity = 3000;
break;
case INV_MPU9250:
case INV_MPU9255:
/* sensor sensitivity in 16 bits mode: 0.15 uT */
sensitivity = 1500;
break;
default:
return -EINVAL;
}
/*
* Sensitivity adjustement and scale to Gauss
*
* Hadj = H * (((ASA - 128) * 0.5 / 128) + 1)
* Factor simplification:
* Hadj = H * ((ASA + 128) / 256)
*
* raw_to_gauss = Hadj * sensitivity
*/
st->magn_raw_to_gauss[0] = (((int32_t)asa[0] + 128) * sensitivity) / 256;
st->magn_raw_to_gauss[1] = (((int32_t)asa[1] + 128) * sensitivity) / 256;
st->magn_raw_to_gauss[2] = (((int32_t)asa[2] + 128) * sensitivity) / 256;
return 0;
}
/**
* inv_mpu_magn_probe() - probe and setup magnetometer chip
* @st: driver internal state
*
* Returns 0 on success, a negative error code otherwise
*
* It is probing the chip and setting up all needed i2c transfers.
* Noop if there is no magnetometer in the chip.
*/
int inv_mpu_magn_probe(struct inv_mpu6050_state *st)
{
uint8_t val;
int ret;
/* quit if chip is not supported */
if (!inv_magn_supported(st))
return 0;
/* configure i2c master aux port */
ret = inv_mpu_aux_init(st);
if (ret)
return ret;
/* check and init mag chip */
ret = inv_magn_init(st);
if (ret)
return ret;
/*
* configure mpu i2c master accesses
* i2c SLV0: read sensor data, 7 bytes data(6)-ST2
* Byte swap data to store them in big-endian in impair address groups
*/
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0),
INV_MPU6050_BIT_I2C_SLV_RNW | INV_MPU_MAGN_I2C_ADDR);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0),
INV_MPU_MAGN_REG_DATA);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
INV_MPU6050_BIT_SLV_EN |
INV_MPU6050_BIT_SLV_BYTE_SW |
INV_MPU6050_BIT_SLV_GRP |
INV_MPU9X50_BYTES_MAGN);
if (ret)
return ret;
/* i2c SLV1: launch single measurement */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(1),
INV_MPU_MAGN_I2C_ADDR);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(1),
INV_MPU_MAGN_REG_CNTL1);
if (ret)
return ret;
/* add 16 bits mode for MPU925x */
val = INV_MPU_MAGN_BITS_MODE_SINGLE;
switch (st->chip_type) {
case INV_MPU9250:
case INV_MPU9255:
val |= INV_MPU9250_MAGN_BIT_OUTPUT_BIT;
break;
default:
break;
}
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_DO(1), val);
if (ret)
return ret;
return regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(1),
INV_MPU6050_BIT_SLV_EN | 1);
}
/**
* inv_mpu_magn_set_rate() - set magnetometer sampling rate
* @st: driver internal state
* @fifo_rate: mpu set fifo rate
*
* Returns 0 on success, a negative error code otherwise
*
* Limit sampling frequency to the maximum value supported by the
* magnetometer chip. Resulting in duplicated data for higher frequencies.
* Noop if there is no magnetometer in the chip.
*/
int inv_mpu_magn_set_rate(const struct inv_mpu6050_state *st, int fifo_rate)
{
uint8_t d;
/* quit if chip is not supported */
if (!inv_magn_supported(st))
return 0;
/*
* update i2c master delay to limit mag sampling to max frequency
* compute fifo_rate divider d: rate = fifo_rate / (d + 1)
*/
if (fifo_rate > INV_MPU_MAGN_FREQ_HZ_MAX)
d = fifo_rate / INV_MPU_MAGN_FREQ_HZ_MAX - 1;
else
d = 0;
return regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, d);
}
/**
* inv_mpu_magn_set_orient() - fill magnetometer mounting matrix
* @st: driver internal state
*
* Returns 0 on success, a negative error code otherwise
*
* Fill magnetometer mounting matrix using the provided chip matrix.
*/
int inv_mpu_magn_set_orient(struct inv_mpu6050_state *st)
{
struct device *dev = regmap_get_device(st->map);
const char *orient;
char *str;
int i;
/* fill magnetometer orientation */
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
/* x <- y */
st->magn_orient.rotation[0] = st->orientation.rotation[3];
st->magn_orient.rotation[1] = st->orientation.rotation[4];
st->magn_orient.rotation[2] = st->orientation.rotation[5];
/* y <- x */
st->magn_orient.rotation[3] = st->orientation.rotation[0];
st->magn_orient.rotation[4] = st->orientation.rotation[1];
st->magn_orient.rotation[5] = st->orientation.rotation[2];
/* z <- -z */
for (i = 6; i < 9; ++i) {
orient = st->orientation.rotation[i];
/*
* The value is negated according to one of the following
* rules:
*
* 1) Drop leading minus.
* 2) Leave 0 as is.
* 3) Add leading minus.
*/
if (orient[0] == '-')
str = devm_kstrdup(dev, orient + 1, GFP_KERNEL);
else if (!strcmp(orient, "0"))
str = devm_kstrdup(dev, orient, GFP_KERNEL);
else
str = devm_kasprintf(dev, GFP_KERNEL, "-%s", orient);
if (!str)
return -ENOMEM;
st->magn_orient.rotation[i] = str;
}
break;
default:
st->magn_orient = st->orientation;
break;
}
return 0;
}
/**
* inv_mpu_magn_read() - read magnetometer data
* @st: driver internal state
* @axis: IIO modifier axis value
* @val: store corresponding axis value
*
* Returns 0 on success, a negative error code otherwise
*/
int inv_mpu_magn_read(struct inv_mpu6050_state *st, int axis, int *val)
{
unsigned int status;
__be16 data;
uint8_t addr;
int ret;
/* quit if chip is not supported */
if (!inv_magn_supported(st))
return -ENODEV;
/* Mag data: XH,XL,YH,YL,ZH,ZL */
switch (axis) {
case IIO_MOD_X:
addr = 0;
break;
case IIO_MOD_Y:
addr = 2;
break;
case IIO_MOD_Z:
addr = 4;
break;
default:
return -EINVAL;
}
addr += INV_MPU6050_REG_EXT_SENS_DATA;
/* check i2c status and read raw data */
ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status);
if (ret)
return ret;
if (status & INV_MPU6050_BIT_I2C_SLV0_NACK ||
status & INV_MPU6050_BIT_I2C_SLV1_NACK)
return -EIO;
ret = regmap_bulk_read(st->map, addr, &data, sizeof(data));
if (ret)
return ret;
*val = (int16_t)be16_to_cpu(data);
return IIO_VAL_INT;
}
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* inv_mpu_acpi: ACPI processing for creating client devices
* Copyright (c) 2015, Intel Corporation.
*/
#ifdef CONFIG_ACPI
#include <linux/kernel.h>
#include <linux/i2c.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
#include "inv_mpu_iio.h"
enum inv_mpu_product_name {
INV_MPU_NOT_MATCHED,
INV_MPU_ASUS_T100TA,
};
static enum inv_mpu_product_name matched_product_name;
static int __init asus_t100_matched(const struct dmi_system_id *d)
{
matched_product_name = INV_MPU_ASUS_T100TA;
return 0;
}
static const struct dmi_system_id inv_mpu_dev_list[] = {
{
.callback = asus_t100_matched,
.ident = "Asus Transformer Book T100",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC"),
DMI_MATCH(DMI_PRODUCT_NAME, "T100TA"),
DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
},
},
/* Add more matching tables here..*/
{}
};
static int asus_acpi_get_sensor_info(struct acpi_device *adev,
struct i2c_client *client,
struct i2c_board_info *info)
{
struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
int i;
acpi_status status;
union acpi_object *cpm;
int ret;
status = acpi_evaluate_object(adev->handle, "CNF0", NULL, &buffer);
if (ACPI_FAILURE(status))
return -ENODEV;
cpm = buffer.pointer;
for (i = 0; i < cpm->package.count; ++i) {
union acpi_object *elem;
int j;
elem = &cpm->package.elements[i];
for (j = 0; j < elem->package.count; ++j) {
union acpi_object *sub_elem;
sub_elem = &elem->package.elements[j];
if (sub_elem->type == ACPI_TYPE_STRING)
strscpy(info->type, sub_elem->string.pointer,
sizeof(info->type));
else if (sub_elem->type == ACPI_TYPE_INTEGER) {
if (sub_elem->integer.value != client->addr) {
info->addr = sub_elem->integer.value;
break; /* Not a MPU6500 primary */
}
}
}
}
ret = cpm->package.count;
kfree(buffer.pointer);
return ret;
}
static int acpi_i2c_check_resource(struct acpi_resource *ares, void *data)
{
struct acpi_resource_i2c_serialbus *sb;
u32 *addr = data;
if (i2c_acpi_get_i2c_resource(ares, &sb)) {
if (*addr)
*addr |= (sb->slave_address << 16);
else
*addr = sb->slave_address;
}
/* Tell the ACPI core that we already copied this address */
return 1;
}
static int inv_mpu_process_acpi_config(struct i2c_client *client,
unsigned short *primary_addr,
unsigned short *secondary_addr)
{
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
const struct acpi_device_id *id;
u32 i2c_addr = 0;
LIST_HEAD(resources);
int ret;
id = acpi_match_device(client->dev.driver->acpi_match_table,
&client->dev);
if (!id)
return -ENODEV;
ret = acpi_dev_get_resources(adev, &resources,
acpi_i2c_check_resource, &i2c_addr);
if (ret < 0)
return ret;
acpi_dev_free_resource_list(&resources);
*primary_addr = i2c_addr & 0x0000ffff;
*secondary_addr = (i2c_addr & 0xffff0000) >> 16;
return 0;
}
int inv_mpu_acpi_create_mux_client(struct i2c_client *client)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(&client->dev));
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
st->mux_client = NULL;
if (adev) {
struct i2c_board_info info;
struct i2c_client *mux_client;
int ret = -1;
memset(&info, 0, sizeof(info));
dmi_check_system(inv_mpu_dev_list);
switch (matched_product_name) {
case INV_MPU_ASUS_T100TA:
ret = asus_acpi_get_sensor_info(adev, client,
&info);
break;
/* Add more matched product processing here */
default:
break;
}
if (ret < 0) {
/* No matching DMI, so create device on INV6XX type */
unsigned short primary, secondary;
ret = inv_mpu_process_acpi_config(client, &primary,
&secondary);
if (!ret && secondary) {
char *name;
info.addr = secondary;
strscpy(info.type, dev_name(&adev->dev),
sizeof(info.type));
name = strchr(info.type, ':');
if (name)
*name = '\0';
strlcat(info.type, "-client",
sizeof(info.type));
} else
return 0; /* no secondary addr, which is OK */
}
mux_client = i2c_new_client_device(st->muxc->adapter[0], &info);
if (IS_ERR(mux_client))
return PTR_ERR(mux_client);
st->mux_client = mux_client;
}
return 0;
}
void inv_mpu_acpi_delete_mux_client(struct i2c_client *client)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(&client->dev));
i2c_unregister_device(st->mux_client);
}
#else
#include "inv_mpu_iio.h"
int inv_mpu_acpi_create_mux_client(struct i2c_client *client)
{
return 0;
}
void inv_mpu_acpi_delete_mux_client(struct i2c_client *client)
{
}
#endif
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/sysfs.h>
#include <linux/jiffies.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/acpi.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include <linux/iio/iio.h>
#include "inv_mpu_iio.h"
#include "inv_mpu_magn.h"
/*
* this is the gyro scale translated from dynamic range plus/minus
* {250, 500, 1000, 2000} to rad/s
*/
static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
/*
* this is the accel scale translated from dynamic range plus/minus
* {2, 4, 8, 16} to m/s^2
*/
static const int accel_scale[] = {598, 1196, 2392, 4785};
static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
.sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
.lpf = INV_MPU6050_REG_CONFIG,
.accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
.user_ctrl = INV_MPU6050_REG_USER_CTRL,
.fifo_en = INV_MPU6050_REG_FIFO_EN,
.gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
.accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
.fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
.fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
.raw_gyro = INV_MPU6050_REG_RAW_GYRO,
.raw_accl = INV_MPU6050_REG_RAW_ACCEL,
.temperature = INV_MPU6050_REG_TEMPERATURE,
.int_enable = INV_MPU6050_REG_INT_ENABLE,
.int_status = INV_MPU6050_REG_INT_STATUS,
.pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
.pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
.int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
.accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
.gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
.i2c_if = INV_ICM20602_REG_I2C_IF,
};
static const struct inv_mpu6050_reg_map reg_set_6500 = {
.sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
.lpf = INV_MPU6050_REG_CONFIG,
.accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
.user_ctrl = INV_MPU6050_REG_USER_CTRL,
.fifo_en = INV_MPU6050_REG_FIFO_EN,
.gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
.accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
.fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
.fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
.raw_gyro = INV_MPU6050_REG_RAW_GYRO,
.raw_accl = INV_MPU6050_REG_RAW_ACCEL,
.temperature = INV_MPU6050_REG_TEMPERATURE,
.int_enable = INV_MPU6050_REG_INT_ENABLE,
.int_status = INV_MPU6050_REG_INT_STATUS,
.pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
.pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
.int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
.accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
.gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
.i2c_if = 0,
};
static const struct inv_mpu6050_reg_map reg_set_6050 = {
.sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
.lpf = INV_MPU6050_REG_CONFIG,
.user_ctrl = INV_MPU6050_REG_USER_CTRL,
.fifo_en = INV_MPU6050_REG_FIFO_EN,
.gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
.accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
.fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
.fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
.raw_gyro = INV_MPU6050_REG_RAW_GYRO,
.raw_accl = INV_MPU6050_REG_RAW_ACCEL,
.temperature = INV_MPU6050_REG_TEMPERATURE,
.int_enable = INV_MPU6050_REG_INT_ENABLE,
.pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
.pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
.int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
.accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
.gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
.i2c_if = 0,
};
static const struct inv_mpu6050_chip_config chip_config_6050 = {
.clk = INV_CLK_INTERNAL,
.fsr = INV_MPU6050_FSR_2000DPS,
.lpf = INV_MPU6050_FILTER_20HZ,
.divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
.gyro_en = true,
.accl_en = true,
.temp_en = true,
.magn_en = false,
.gyro_fifo_enable = false,
.accl_fifo_enable = false,
.temp_fifo_enable = false,
.magn_fifo_enable = false,
.accl_fs = INV_MPU6050_FS_02G,
.user_ctrl = 0,
};
static const struct inv_mpu6050_chip_config chip_config_6500 = {
.clk = INV_CLK_PLL,
.fsr = INV_MPU6050_FSR_2000DPS,
.lpf = INV_MPU6050_FILTER_20HZ,
.divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
.gyro_en = true,
.accl_en = true,
.temp_en = true,
.magn_en = false,
.gyro_fifo_enable = false,
.accl_fifo_enable = false,
.temp_fifo_enable = false,
.magn_fifo_enable = false,
.accl_fs = INV_MPU6050_FS_02G,
.user_ctrl = 0,
};
/* Indexed by enum inv_devices */
static const struct inv_mpu6050_hw hw_info[] = {
{
.whoami = INV_MPU6050_WHOAMI_VALUE,
.name = "MPU6050",
.reg = ®_set_6050,
.config = &chip_config_6050,
.fifo_size = 1024,
.temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
.startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_MPU6500_WHOAMI_VALUE,
.name = "MPU6500",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 512,
.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_MPU6515_WHOAMI_VALUE,
.name = "MPU6515",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 512,
.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_MPU6880_WHOAMI_VALUE,
.name = "MPU6880",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 4096,
.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_MPU6000_WHOAMI_VALUE,
.name = "MPU6000",
.reg = ®_set_6050,
.config = &chip_config_6050,
.fifo_size = 1024,
.temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
.startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_MPU9150_WHOAMI_VALUE,
.name = "MPU9150",
.reg = ®_set_6050,
.config = &chip_config_6050,
.fifo_size = 1024,
.temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
.startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_MPU9250_WHOAMI_VALUE,
.name = "MPU9250",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 512,
.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_MPU9255_WHOAMI_VALUE,
.name = "MPU9255",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 512,
.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_ICM20608_WHOAMI_VALUE,
.name = "ICM20608",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 512,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_ICM20608D_WHOAMI_VALUE,
.name = "ICM20608D",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 512,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_ICM20609_WHOAMI_VALUE,
.name = "ICM20609",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 4 * 1024,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_ICM20689_WHOAMI_VALUE,
.name = "ICM20689",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 4 * 1024,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_ICM20600_WHOAMI_VALUE,
.name = "ICM20600",
.reg = ®_set_icm20602,
.config = &chip_config_6500,
.fifo_size = 1008,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_ICM20602_WHOAMI_VALUE,
.name = "ICM20602",
.reg = ®_set_icm20602,
.config = &chip_config_6500,
.fifo_size = 1008,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_ICM20690_WHOAMI_VALUE,
.name = "ICM20690",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 1024,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME},
},
{
.whoami = INV_IAM20680_WHOAMI_VALUE,
.name = "IAM20680",
.reg = ®_set_6500,
.config = &chip_config_6500,
.fifo_size = 512,
.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
.startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
},
};
static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep,
int clock, int temp_dis)
{
u8 val;
if (clock < 0)
clock = st->chip_config.clk;
if (temp_dis < 0)
temp_dis = !st->chip_config.temp_en;
val = clock & INV_MPU6050_BIT_CLK_MASK;
if (temp_dis)
val |= INV_MPU6050_BIT_TEMP_DIS;
if (sleep)
val |= INV_MPU6050_BIT_SLEEP;
dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val);
return regmap_write(st->map, st->reg->pwr_mgmt_1, val);
}
static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st,
unsigned int clock)
{
int ret;
switch (st->chip_type) {
case INV_MPU6050:
case INV_MPU6000:
case INV_MPU9150:
/* old chips: switch clock manually */
ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1);
if (ret)
return ret;
st->chip_config.clk = clock;
break;
default:
/* automatic clock switching, nothing to do */
break;
}
return 0;
}
int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
unsigned int mask)
{
unsigned int sleep;
u8 pwr_mgmt2, user_ctrl;
int ret;
/* delete useless requests */
if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en)
mask &= ~INV_MPU6050_SENSOR_ACCL;
if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en)
mask &= ~INV_MPU6050_SENSOR_GYRO;
if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en)
mask &= ~INV_MPU6050_SENSOR_TEMP;
if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en)
mask &= ~INV_MPU6050_SENSOR_MAGN;
if (mask == 0)
return 0;
/* turn on/off temperature sensor */
if (mask & INV_MPU6050_SENSOR_TEMP) {
ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en);
if (ret)
return ret;
st->chip_config.temp_en = en;
}
/* update user_crtl for driving magnetometer */
if (mask & INV_MPU6050_SENSOR_MAGN) {
user_ctrl = st->chip_config.user_ctrl;
if (en)
user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN;
else
user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN;
ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
if (ret)
return ret;
st->chip_config.user_ctrl = user_ctrl;
st->chip_config.magn_en = en;
}
/* manage accel & gyro engines */
if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) {
/* compute power management 2 current value */
pwr_mgmt2 = 0;
if (!st->chip_config.accl_en)
pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
if (!st->chip_config.gyro_en)
pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
/* update to new requested value */
if (mask & INV_MPU6050_SENSOR_ACCL) {
if (en)
pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY;
else
pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
}
if (mask & INV_MPU6050_SENSOR_GYRO) {
if (en)
pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY;
else
pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
}
/* switch clock to internal when turning gyro off */
if (mask & INV_MPU6050_SENSOR_GYRO && !en) {
ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL);
if (ret)
return ret;
}
/* update sensors engine */
dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n",
pwr_mgmt2);
ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2);
if (ret)
return ret;
if (mask & INV_MPU6050_SENSOR_ACCL)
st->chip_config.accl_en = en;
if (mask & INV_MPU6050_SENSOR_GYRO)
st->chip_config.gyro_en = en;
/* compute required time to have sensors stabilized */
sleep = 0;
if (en) {
if (mask & INV_MPU6050_SENSOR_ACCL) {
if (sleep < st->hw->startup_time.accel)
sleep = st->hw->startup_time.accel;
}
if (mask & INV_MPU6050_SENSOR_GYRO) {
if (sleep < st->hw->startup_time.gyro)
sleep = st->hw->startup_time.gyro;
}
} else {
if (mask & INV_MPU6050_SENSOR_GYRO) {
if (sleep < INV_MPU6050_GYRO_DOWN_TIME)
sleep = INV_MPU6050_GYRO_DOWN_TIME;
}
}
if (sleep)
msleep(sleep);
/* switch clock to PLL when turning gyro on */
if (mask & INV_MPU6050_SENSOR_GYRO && en) {
ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL);
if (ret)
return ret;
}
}
return 0;
}
static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st,
bool power_on)
{
int result;
result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1);
if (result)
return result;
if (power_on)
usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
INV_MPU6050_REG_UP_TIME_MAX);
return 0;
}
static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
enum inv_mpu6050_fsr_e val)
{
unsigned int gyro_shift;
u8 data;
switch (st->chip_type) {
case INV_ICM20690:
gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT;
break;
default:
gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT;
break;
}
data = val << gyro_shift;
return regmap_write(st->map, st->reg->gyro_config, data);
}
/*
* inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
*
* MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
* MPU6500 and above have a dedicated register for accelerometer
*/
static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
enum inv_mpu6050_filter_e val)
{
int result;
result = regmap_write(st->map, st->reg->lpf, val);
if (result)
return result;
/* set accel lpf */
switch (st->chip_type) {
case INV_MPU6050:
case INV_MPU6000:
case INV_MPU9150:
/* old chips, nothing to do */
return 0;
case INV_ICM20689:
case INV_ICM20690:
/* set FIFO size to maximum value */
val |= INV_ICM20689_BITS_FIFO_SIZE_MAX;
break;
default:
break;
}
return regmap_write(st->map, st->reg->accel_lpf, val);
}
/*
* inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
*
* Initial configuration:
* FSR: ± 2000DPS
* DLPF: 20Hz
* FIFO rate: 50Hz
* Clock source: Gyro PLL
*/
static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
{
int result;
u8 d;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct inv_sensors_timestamp_chip timestamp;
result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr);
if (result)
return result;
result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf);
if (result)
return result;
d = st->chip_config.divider;
result = regmap_write(st->map, st->reg->sample_rate_div, d);
if (result)
return result;
d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
result = regmap_write(st->map, st->reg->accl_config, d);
if (result)
return result;
result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
if (result)
return result;
/* clock jitter is +/- 2% */
timestamp.clock_period = NSEC_PER_SEC / INV_MPU6050_INTERNAL_FREQ_HZ;
timestamp.jitter = 20;
timestamp.init_period =
NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
inv_sensors_timestamp_init(&st->timestamp, ×tamp);
/* magn chip init, noop if not present in the chip */
result = inv_mpu_magn_probe(st);
if (result)
return result;
return 0;
}
static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
int axis, int val)
{
int ind, result;
__be16 d = cpu_to_be16(val);
ind = (axis - IIO_MOD_X) * 2;
result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d));
if (result)
return -EINVAL;
return 0;
}
static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
int axis, int *val)
{
int ind, result;
__be16 d;
ind = (axis - IIO_MOD_X) * 2;
result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d));
if (result)
return -EINVAL;
*val = (short)be16_to_cpup(&d);
return IIO_VAL_INT;
}
static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct device *pdev = regmap_get_device(st->map);
unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us;
int result;
int ret;
/* compute sample period */
freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
period_us = 1000000 / freq_hz;
result = pm_runtime_resume_and_get(pdev);
if (result)
return result;
switch (chan->type) {
case IIO_ANGL_VEL:
if (!st->chip_config.gyro_en) {
result = inv_mpu6050_switch_engine(st, true,
INV_MPU6050_SENSOR_GYRO);
if (result)
goto error_power_off;
/* need to wait 2 periods to have first valid sample */
min_sleep_us = 2 * period_us;
max_sleep_us = 2 * (period_us + period_us / 2);
usleep_range(min_sleep_us, max_sleep_us);
}
ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
chan->channel2, val);
break;
case IIO_ACCEL:
if (!st->chip_config.accl_en) {
result = inv_mpu6050_switch_engine(st, true,
INV_MPU6050_SENSOR_ACCL);
if (result)
goto error_power_off;
/* wait 1 period for first sample availability */
min_sleep_us = period_us;
max_sleep_us = period_us + period_us / 2;
usleep_range(min_sleep_us, max_sleep_us);
}
ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
chan->channel2, val);
break;
case IIO_TEMP:
/* temperature sensor work only with accel and/or gyro */
if (!st->chip_config.accl_en && !st->chip_config.gyro_en) {
result = -EBUSY;
goto error_power_off;
}
if (!st->chip_config.temp_en) {
result = inv_mpu6050_switch_engine(st, true,
INV_MPU6050_SENSOR_TEMP);
if (result)
goto error_power_off;
/* wait 1 period for first sample availability */
min_sleep_us = period_us;
max_sleep_us = period_us + period_us / 2;
usleep_range(min_sleep_us, max_sleep_us);
}
ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
IIO_MOD_X, val);
break;
case IIO_MAGN:
if (!st->chip_config.magn_en) {
result = inv_mpu6050_switch_engine(st, true,
INV_MPU6050_SENSOR_MAGN);
if (result)
goto error_power_off;
/* frequency is limited for magnetometer */
if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) {
freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX;
period_us = 1000000 / freq_hz;
}
/* need to wait 2 periods to have first valid sample */
min_sleep_us = 2 * period_us;
max_sleep_us = 2 * (period_us + period_us / 2);
usleep_range(min_sleep_us, max_sleep_us);
}
ret = inv_mpu_magn_read(st, chan->channel2, val);
break;
default:
ret = -EINVAL;
break;
}
pm_runtime_mark_last_busy(pdev);
pm_runtime_put_autosuspend(pdev);
return ret;
error_power_off:
pm_runtime_put_autosuspend(pdev);
return result;
}
static int
inv_mpu6050_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int ret = 0;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
mutex_lock(&st->lock);
ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret;
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
mutex_lock(&st->lock);
*val = 0;
*val2 = gyro_scale_6050[st->chip_config.fsr];
mutex_unlock(&st->lock);
return IIO_VAL_INT_PLUS_NANO;
case IIO_ACCEL:
mutex_lock(&st->lock);
*val = 0;
*val2 = accel_scale[st->chip_config.accl_fs];
mutex_unlock(&st->lock);
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = st->hw->temp.scale / 1000000;
*val2 = st->hw->temp.scale % 1000000;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_MAGN:
return inv_mpu_magn_get_scale(st, chan, val, val2);
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
*val = st->hw->temp.offset;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_CALIBBIAS:
switch (chan->type) {
case IIO_ANGL_VEL:
mutex_lock(&st->lock);
ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
chan->channel2, val);
mutex_unlock(&st->lock);
return IIO_VAL_INT;
case IIO_ACCEL:
mutex_lock(&st->lock);
ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
chan->channel2, val);
mutex_unlock(&st->lock);
return IIO_VAL_INT;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val,
int val2)
{
int result, i;
if (val != 0)
return -EINVAL;
for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
if (gyro_scale_6050[i] == val2) {
result = inv_mpu6050_set_gyro_fsr(st, i);
if (result)
return result;
st->chip_config.fsr = i;
return 0;
}
}
return -EINVAL;
}
static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
return IIO_VAL_INT_PLUS_NANO;
default:
return IIO_VAL_INT_PLUS_MICRO;
}
default:
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val,
int val2)
{
int result, i;
u8 d;
if (val != 0)
return -EINVAL;
for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
if (accel_scale[i] == val2) {
d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
result = regmap_write(st->map, st->reg->accl_config, d);
if (result)
return result;
st->chip_config.accl_fs = i;
return 0;
}
}
return -EINVAL;
}
static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct device *pdev = regmap_get_device(st->map);
int result;
/*
* we should only update scale when the chip is disabled, i.e.
* not running
*/
result = iio_device_claim_direct_mode(indio_dev);
if (result)
return result;
mutex_lock(&st->lock);
result = pm_runtime_resume_and_get(pdev);
if (result)
goto error_write_raw_unlock;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ANGL_VEL:
result = inv_mpu6050_write_gyro_scale(st, val, val2);
break;
case IIO_ACCEL:
result = inv_mpu6050_write_accel_scale(st, val, val2);
break;
default:
result = -EINVAL;
break;
}
break;
case IIO_CHAN_INFO_CALIBBIAS:
switch (chan->type) {
case IIO_ANGL_VEL:
result = inv_mpu6050_sensor_set(st,
st->reg->gyro_offset,
chan->channel2, val);
break;
case IIO_ACCEL:
result = inv_mpu6050_sensor_set(st,
st->reg->accl_offset,
chan->channel2, val);
break;
default:
result = -EINVAL;
break;
}
break;
default:
result = -EINVAL;
break;
}
pm_runtime_mark_last_busy(pdev);
pm_runtime_put_autosuspend(pdev);
error_write_raw_unlock:
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return result;
}
/*
* inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
*
* Based on the Nyquist principle, the bandwidth of the low
* pass filter must not exceed the signal sampling rate divided
* by 2, or there would be aliasing.
* This function basically search for the correct low pass
* parameters based on the fifo rate, e.g, sampling frequency.
*
* lpf is set automatically when setting sampling rate to avoid any aliases.
*/
static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
{
static const int hz[] = {400, 200, 90, 40, 20, 10};
static const int d[] = {
INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ,
INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ,
INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
};
int i, result;
u8 data;
data = INV_MPU6050_FILTER_5HZ;
for (i = 0; i < ARRAY_SIZE(hz); ++i) {
if (rate >= hz[i]) {
data = d[i];
break;
}
}
result = inv_mpu6050_set_lpf_regs(st, data);
if (result)
return result;
st->chip_config.lpf = data;
return 0;
}
/*
* inv_mpu6050_fifo_rate_store() - Set fifo rate.
*/
static ssize_t
inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int fifo_rate;
u32 fifo_period;
bool fifo_on;
u8 d;
int result;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct device *pdev = regmap_get_device(st->map);
if (kstrtoint(buf, 10, &fifo_rate))
return -EINVAL;
if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
return -EINVAL;
/* compute the chip sample rate divider */
d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
/* compute back the fifo rate to handle truncation cases */
fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
fifo_period = NSEC_PER_SEC / fifo_rate;
mutex_lock(&st->lock);
if (d == st->chip_config.divider) {
result = 0;
goto fifo_rate_fail_unlock;
}
fifo_on = st->chip_config.accl_fifo_enable ||
st->chip_config.gyro_fifo_enable ||
st->chip_config.magn_fifo_enable;
result = inv_sensors_timestamp_update_odr(&st->timestamp, fifo_period, fifo_on);
if (result)
goto fifo_rate_fail_unlock;
result = pm_runtime_resume_and_get(pdev);
if (result)
goto fifo_rate_fail_unlock;
result = regmap_write(st->map, st->reg->sample_rate_div, d);
if (result)
goto fifo_rate_fail_power_off;
st->chip_config.divider = d;
result = inv_mpu6050_set_lpf(st, fifo_rate);
if (result)
goto fifo_rate_fail_power_off;
/* update rate for magn, noop if not present in chip */
result = inv_mpu_magn_set_rate(st, fifo_rate);
if (result)
goto fifo_rate_fail_power_off;
pm_runtime_mark_last_busy(pdev);
fifo_rate_fail_power_off:
pm_runtime_put_autosuspend(pdev);
fifo_rate_fail_unlock:
mutex_unlock(&st->lock);
if (result)
return result;
return count;
}
/*
* inv_fifo_rate_show() - Get the current sampling rate.
*/
static ssize_t
inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
unsigned fifo_rate;
mutex_lock(&st->lock);
fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
mutex_unlock(&st->lock);
return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
}
/*
* inv_attr_show() - calling this function will show current
* parameters.
*
* Deprecated in favor of IIO mounting matrix API.
*
* See inv_get_mount_matrix()
*/
static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
s8 *m;
switch (this_attr->address) {
/*
* In MPU6050, the two matrix are the same because gyro and accel
* are integrated in one chip
*/
case ATTR_GYRO_MATRIX:
case ATTR_ACCL_MATRIX:
m = st->plat_data.orientation;
return scnprintf(buf, PAGE_SIZE,
"%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
default:
return -EINVAL;
}
}
/**
* inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
* MPU6050 device.
* @indio_dev: The IIO device
* @trig: The new trigger
*
* Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
* device, -EINVAL otherwise.
*/
static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
struct iio_trigger *trig)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
if (st->trig != trig)
return -EINVAL;
return 0;
}
static const struct iio_mount_matrix *
inv_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct inv_mpu6050_state *data = iio_priv(indio_dev);
const struct iio_mount_matrix *matrix;
if (chan->type == IIO_MAGN)
matrix = &data->magn_orient;
else
matrix = &data->orientation;
return matrix;
}
static const struct iio_chan_spec_ext_info inv_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
{ }
};
#define INV_MPU6050_CHAN(_type, _channel2, _index) \
{ \
.type = _type, \
.modified = 1, \
.channel2 = _channel2, \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
.ext_info = inv_ext_info, \
}
#define INV_MPU6050_TEMP_CHAN(_index) \
{ \
.type = IIO_TEMP, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
| BIT(IIO_CHAN_INFO_OFFSET) \
| BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec inv_mpu_channels[] = {
IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
};
#define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \
(BIT(INV_MPU6050_SCAN_ACCL_X) \
| BIT(INV_MPU6050_SCAN_ACCL_Y) \
| BIT(INV_MPU6050_SCAN_ACCL_Z))
#define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \
(BIT(INV_MPU6050_SCAN_GYRO_X) \
| BIT(INV_MPU6050_SCAN_GYRO_Y) \
| BIT(INV_MPU6050_SCAN_GYRO_Z))
#define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP))
static const unsigned long inv_mpu_scan_masks[] = {
/* 3-axis accel */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
/* 3-axis gyro */
INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
/* 6-axis accel + gyro */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
| INV_MPU6050_SCAN_MASK_TEMP,
0,
};
#define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
{ \
.type = IIO_MAGN, \
.modified = 1, \
.channel2 = _chan2, \
.info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_RAW), \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = _bits, \
.storagebits = 16, \
.shift = 0, \
.endianness = IIO_BE, \
}, \
.ext_info = inv_ext_info, \
}
static const struct iio_chan_spec inv_mpu9150_channels[] = {
IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
/* Magnetometer resolution is 13 bits */
INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
};
static const struct iio_chan_spec inv_mpu9250_channels[] = {
IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
/* Magnetometer resolution is 16 bits */
INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
};
#define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \
(BIT(INV_MPU9X50_SCAN_MAGN_X) \
| BIT(INV_MPU9X50_SCAN_MAGN_Y) \
| BIT(INV_MPU9X50_SCAN_MAGN_Z))
static const unsigned long inv_mpu9x50_scan_masks[] = {
/* 3-axis accel */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
/* 3-axis gyro */
INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
/* 3-axis magn */
INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
/* 6-axis accel + gyro */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
| INV_MPU6050_SCAN_MASK_TEMP,
/* 6-axis accel + magn */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
| INV_MPU6050_SCAN_MASK_TEMP,
/* 6-axis gyro + magn */
INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
| INV_MPU6050_SCAN_MASK_TEMP,
/* 9-axis accel + gyro + magn */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
| INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
| INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
| INV_MPU6050_SCAN_MASK_TEMP,
0,
};
static const unsigned long inv_icm20602_scan_masks[] = {
/* 3-axis accel + temp (mandatory) */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
/* 3-axis gyro + temp (mandatory) */
INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
/* 6-axis accel + gyro + temp (mandatory) */
INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
| INV_MPU6050_SCAN_MASK_TEMP,
0,
};
/*
* The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
* INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
* low-pass filter. Specifically, each of these sampling rates are about twice
* the bandwidth of a corresponding low-pass filter, which should eliminate
* aliasing following the Nyquist principle. By picking a frequency different
* from these, the user risks aliasing effects.
*/
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
static IIO_CONST_ATTR(in_anglvel_scale_available,
"0.000133090 0.000266181 0.000532362 0.001064724");
static IIO_CONST_ATTR(in_accel_scale_available,
"0.000598 0.001196 0.002392 0.004785");
static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
inv_mpu6050_fifo_rate_store);
/* Deprecated: kept for userspace backward compatibility. */
static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
ATTR_GYRO_MATRIX);
static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
ATTR_ACCL_MATRIX);
static struct attribute *inv_attributes[] = {
&iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
&iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
&iio_dev_attr_sampling_frequency.dev_attr.attr,
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group inv_attribute_group = {
.attrs = inv_attributes
};
static int inv_mpu6050_reg_access(struct iio_dev *indio_dev,
unsigned int reg,
unsigned int writeval,
unsigned int *readval)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int ret;
mutex_lock(&st->lock);
if (readval)
ret = regmap_read(st->map, reg, readval);
else
ret = regmap_write(st->map, reg, writeval);
mutex_unlock(&st->lock);
return ret;
}
static const struct iio_info mpu_info = {
.read_raw = &inv_mpu6050_read_raw,
.write_raw = &inv_mpu6050_write_raw,
.write_raw_get_fmt = &inv_write_raw_get_fmt,
.attrs = &inv_attribute_group,
.validate_trigger = inv_mpu6050_validate_trigger,
.debugfs_reg_access = &inv_mpu6050_reg_access,
};
/*
* inv_check_and_setup_chip() - check and setup chip.
*/
static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
{
int result;
unsigned int regval, mask;
int i;
st->hw = &hw_info[st->chip_type];
st->reg = hw_info[st->chip_type].reg;
memcpy(&st->chip_config, hw_info[st->chip_type].config,
sizeof(st->chip_config));
st->data = devm_kzalloc(regmap_get_device(st->map), st->hw->fifo_size, GFP_KERNEL);
if (st->data == NULL)
return -ENOMEM;
/* check chip self-identification */
result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
if (result)
return result;
if (regval != st->hw->whoami) {
/* check whoami against all possible values */
for (i = 0; i < INV_NUM_PARTS; ++i) {
if (regval == hw_info[i].whoami) {
dev_warn(regmap_get_device(st->map),
"whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n",
regval, hw_info[i].name,
st->hw->whoami, st->hw->name);
break;
}
}
if (i >= INV_NUM_PARTS) {
dev_err(regmap_get_device(st->map),
"invalid whoami 0x%02x expected 0x%02x (%s)\n",
regval, st->hw->whoami, st->hw->name);
return -ENODEV;
}
}
/* reset to make sure previous state are not there */
result = regmap_write(st->map, st->reg->pwr_mgmt_1,
INV_MPU6050_BIT_H_RESET);
if (result)
return result;
msleep(INV_MPU6050_POWER_UP_TIME);
switch (st->chip_type) {
case INV_MPU6000:
case INV_MPU6500:
case INV_MPU6515:
case INV_MPU6880:
case INV_MPU9250:
case INV_MPU9255:
/* reset signal path (required for spi connection) */
regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
INV_MPU6050_BIT_GYRO_RST;
result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
regval);
if (result)
return result;
msleep(INV_MPU6050_POWER_UP_TIME);
break;
default:
break;
}
/*
* Turn power on. After reset, the sleep bit could be on
* or off depending on the OTP settings. Turning power on
* make it in a definite state as well as making the hardware
* state align with the software state
*/
result = inv_mpu6050_set_power_itg(st, true);
if (result)
return result;
mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
result = inv_mpu6050_switch_engine(st, false, mask);
if (result)
goto error_power_off;
return 0;
error_power_off:
inv_mpu6050_set_power_itg(st, false);
return result;
}
static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
{
int result;
result = regulator_enable(st->vddio_supply);
if (result) {
dev_err(regmap_get_device(st->map),
"Failed to enable vddio regulator: %d\n", result);
} else {
/* Give the device a little bit of time to start up. */
usleep_range(3000, 5000);
}
return result;
}
static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
{
int result;
result = regulator_disable(st->vddio_supply);
if (result)
dev_err(regmap_get_device(st->map),
"Failed to disable vddio regulator: %d\n", result);
return result;
}
static void inv_mpu_core_disable_regulator_action(void *_data)
{
struct inv_mpu6050_state *st = _data;
int result;
result = regulator_disable(st->vdd_supply);
if (result)
dev_err(regmap_get_device(st->map),
"Failed to disable vdd regulator: %d\n", result);
inv_mpu_core_disable_regulator_vddio(st);
}
static void inv_mpu_pm_disable(void *data)
{
struct device *dev = data;
pm_runtime_disable(dev);
}
int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
{
struct inv_mpu6050_state *st;
struct iio_dev *indio_dev;
struct inv_mpu6050_platform_data *pdata;
struct device *dev = regmap_get_device(regmap);
int result;
struct irq_data *desc;
int irq_type;
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
chip_type, name);
return -ENODEV;
}
st = iio_priv(indio_dev);
mutex_init(&st->lock);
st->chip_type = chip_type;
st->irq = irq;
st->map = regmap;
pdata = dev_get_platdata(dev);
if (!pdata) {
result = iio_read_mount_matrix(dev, &st->orientation);
if (result) {
dev_err(dev, "Failed to retrieve mounting matrix %d\n",
result);
return result;
}
} else {
st->plat_data = *pdata;
}
if (irq > 0) {
desc = irq_get_irq_data(irq);
if (!desc) {
dev_err(dev, "Could not find IRQ %d\n", irq);
return -EINVAL;
}
irq_type = irqd_get_trigger_type(desc);
if (!irq_type)
irq_type = IRQF_TRIGGER_RISING;
} else {
/* Doesn't really matter, use the default */
irq_type = IRQF_TRIGGER_RISING;
}
if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge
st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
else if (irq_type == IRQF_TRIGGER_FALLING)
st->irq_mask = INV_MPU6050_ACTIVE_LOW;
else if (irq_type == IRQF_TRIGGER_HIGH)
st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
INV_MPU6050_LATCH_INT_EN;
else if (irq_type == IRQF_TRIGGER_LOW)
st->irq_mask = INV_MPU6050_ACTIVE_LOW |
INV_MPU6050_LATCH_INT_EN;
else {
dev_err(dev, "Invalid interrupt type 0x%x specified\n",
irq_type);
return -EINVAL;
}
st->vdd_supply = devm_regulator_get(dev, "vdd");
if (IS_ERR(st->vdd_supply))
return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
"Failed to get vdd regulator\n");
st->vddio_supply = devm_regulator_get(dev, "vddio");
if (IS_ERR(st->vddio_supply))
return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
"Failed to get vddio regulator\n");
result = regulator_enable(st->vdd_supply);
if (result) {
dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
return result;
}
msleep(INV_MPU6050_POWER_UP_TIME);
result = inv_mpu_core_enable_regulator_vddio(st);
if (result) {
regulator_disable(st->vdd_supply);
return result;
}
result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
st);
if (result) {
dev_err(dev, "Failed to setup regulator cleanup action %d\n",
result);
return result;
}
/* fill magnetometer orientation */
result = inv_mpu_magn_set_orient(st);
if (result)
return result;
/* power is turned on inside check chip type*/
result = inv_check_and_setup_chip(st);
if (result)
return result;
result = inv_mpu6050_init_config(indio_dev);
if (result) {
dev_err(dev, "Could not initialize device.\n");
goto error_power_off;
}
dev_set_drvdata(dev, indio_dev);
/* name will be NULL when enumerated via ACPI */
if (name)
indio_dev->name = name;
else
indio_dev->name = dev_name(dev);
/* requires parent device set in indio_dev */
if (inv_mpu_bus_setup) {
result = inv_mpu_bus_setup(indio_dev);
if (result)
goto error_power_off;
}
/* chip init is done, turning on runtime power management */
result = pm_runtime_set_active(dev);
if (result)
goto error_power_off;
pm_runtime_get_noresume(dev);
pm_runtime_enable(dev);
pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev);
if (result)
return result;
switch (chip_type) {
case INV_MPU9150:
indio_dev->channels = inv_mpu9150_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
break;
case INV_MPU9250:
case INV_MPU9255:
indio_dev->channels = inv_mpu9250_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
break;
case INV_ICM20600:
case INV_ICM20602:
indio_dev->channels = inv_mpu_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
indio_dev->available_scan_masks = inv_icm20602_scan_masks;
break;
default:
indio_dev->channels = inv_mpu_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
indio_dev->available_scan_masks = inv_mpu_scan_masks;
break;
}
/*
* Use magnetometer inside the chip only if there is no i2c
* auxiliary device in use. Otherwise Going back to 6-axis only.
*/
if (st->magn_disabled) {
indio_dev->channels = inv_mpu_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
indio_dev->available_scan_masks = inv_mpu_scan_masks;
}
indio_dev->info = &mpu_info;
if (irq > 0) {
/*
* The driver currently only supports buffered capture with its
* own trigger. So no IRQ, no trigger, no buffer
*/
result = devm_iio_triggered_buffer_setup(dev, indio_dev,
iio_pollfunc_store_time,
inv_mpu6050_read_fifo,
NULL);
if (result) {
dev_err(dev, "configure buffer fail %d\n", result);
return result;
}
result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
if (result) {
dev_err(dev, "trigger probe fail %d\n", result);
return result;
}
}
result = devm_iio_device_register(dev, indio_dev);
if (result) {
dev_err(dev, "IIO register fail %d\n", result);
return result;
}
return 0;
error_power_off:
inv_mpu6050_set_power_itg(st, false);
return result;
}
EXPORT_SYMBOL_NS_GPL(inv_mpu_core_probe, IIO_MPU6050);
static int inv_mpu_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int result;
mutex_lock(&st->lock);
result = inv_mpu_core_enable_regulator_vddio(st);
if (result)
goto out_unlock;
result = inv_mpu6050_set_power_itg(st, true);
if (result)
goto out_unlock;
pm_runtime_disable(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
if (result)
goto out_unlock;
if (iio_buffer_enabled(indio_dev))
result = inv_mpu6050_prepare_fifo(st, true);
out_unlock:
mutex_unlock(&st->lock);
return result;
}
static int inv_mpu_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int result;
mutex_lock(&st->lock);
st->suspended_sensors = 0;
if (pm_runtime_suspended(dev)) {
result = 0;
goto out_unlock;
}
if (iio_buffer_enabled(indio_dev)) {
result = inv_mpu6050_prepare_fifo(st, false);
if (result)
goto out_unlock;
}
if (st->chip_config.accl_en)
st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
if (st->chip_config.gyro_en)
st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO;
if (st->chip_config.temp_en)
st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP;
if (st->chip_config.magn_en)
st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN;
result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors);
if (result)
goto out_unlock;
result = inv_mpu6050_set_power_itg(st, false);
if (result)
goto out_unlock;
inv_mpu_core_disable_regulator_vddio(st);
out_unlock:
mutex_unlock(&st->lock);
return result;
}
static int inv_mpu_runtime_suspend(struct device *dev)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
unsigned int sensors;
int ret;
mutex_lock(&st->lock);
sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
ret = inv_mpu6050_switch_engine(st, false, sensors);
if (ret)
goto out_unlock;
ret = inv_mpu6050_set_power_itg(st, false);
if (ret)
goto out_unlock;
inv_mpu_core_disable_regulator_vddio(st);
out_unlock:
mutex_unlock(&st->lock);
return ret;
}
static int inv_mpu_runtime_resume(struct device *dev)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
int ret;
ret = inv_mpu_core_enable_regulator_vddio(st);
if (ret)
return ret;
return inv_mpu6050_set_power_itg(st, true);
}
EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = {
SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume)
RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL)
};
MODULE_AUTHOR("Invensense Corporation");
MODULE_DESCRIPTION("Invensense device MPU6050 driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_INV_SENSORS_TIMESTAMP);
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/sysfs.h>
#include <linux/jiffies.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/poll.h>
#include <linux/math64.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include "inv_mpu_iio.h"
static int inv_reset_fifo(struct iio_dev *indio_dev)
{
int result;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
/* disable fifo and reenable it */
inv_mpu6050_prepare_fifo(st, false);
result = inv_mpu6050_prepare_fifo(st, true);
if (result)
goto reset_fifo_fail;
return 0;
reset_fifo_fail:
dev_err(regmap_get_device(st->map), "reset fifo failed %d\n", result);
result = regmap_write(st->map, st->reg->int_enable,
INV_MPU6050_BIT_DATA_RDY_EN);
return result;
}
/*
* inv_mpu6050_read_fifo() - Transfer data from hardware FIFO to KFIFO.
*/
irqreturn_t inv_mpu6050_read_fifo(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
size_t bytes_per_datum;
int result;
u16 fifo_count;
u32 fifo_period;
s64 timestamp;
u8 data[INV_MPU6050_OUTPUT_DATA_SIZE];
int int_status;
size_t i, nb;
mutex_lock(&st->lock);
/* ack interrupt and check status */
result = regmap_read(st->map, st->reg->int_status, &int_status);
if (result) {
dev_err(regmap_get_device(st->map),
"failed to ack interrupt\n");
goto flush_fifo;
}
if (!(int_status & INV_MPU6050_BIT_RAW_DATA_RDY_INT))
goto end_session;
if (!(st->chip_config.accl_fifo_enable |
st->chip_config.gyro_fifo_enable |
st->chip_config.magn_fifo_enable))
goto end_session;
bytes_per_datum = 0;
if (st->chip_config.accl_fifo_enable)
bytes_per_datum += INV_MPU6050_BYTES_PER_3AXIS_SENSOR;
if (st->chip_config.gyro_fifo_enable)
bytes_per_datum += INV_MPU6050_BYTES_PER_3AXIS_SENSOR;
if (st->chip_config.temp_fifo_enable)
bytes_per_datum += INV_MPU6050_BYTES_PER_TEMP_SENSOR;
if (st->chip_config.magn_fifo_enable)
bytes_per_datum += INV_MPU9X50_BYTES_MAGN;
/*
* read fifo_count register to know how many bytes are inside the FIFO
* right now
*/
result = regmap_bulk_read(st->map, st->reg->fifo_count_h,
st->data, INV_MPU6050_FIFO_COUNT_BYTE);
if (result)
goto end_session;
fifo_count = be16_to_cpup((__be16 *)&st->data[0]);
/*
* Handle fifo overflow by resetting fifo.
* Reset if there is only 3 data set free remaining to mitigate
* possible delay between reading fifo count and fifo data.
*/
nb = 3 * bytes_per_datum;
if (fifo_count >= st->hw->fifo_size - nb) {
dev_warn(regmap_get_device(st->map), "fifo overflow reset\n");
goto flush_fifo;
}
/* compute and process only all complete datum */
nb = fifo_count / bytes_per_datum;
fifo_count = nb * bytes_per_datum;
/* Each FIFO data contains all sensors, so same number for FIFO and sensor data */
fifo_period = NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
inv_sensors_timestamp_interrupt(&st->timestamp, fifo_period, nb, nb, pf->timestamp);
inv_sensors_timestamp_apply_odr(&st->timestamp, fifo_period, nb, 0);
/* clear internal data buffer for avoiding kernel data leak */
memset(data, 0, sizeof(data));
/* read all data once and process every samples */
result = regmap_noinc_read(st->map, st->reg->fifo_r_w, st->data, fifo_count);
if (result)
goto flush_fifo;
for (i = 0; i < nb; ++i) {
/* skip first samples if needed */
if (st->skip_samples) {
st->skip_samples--;
continue;
}
memcpy(data, &st->data[i * bytes_per_datum], bytes_per_datum);
timestamp = inv_sensors_timestamp_pop(&st->timestamp);
iio_push_to_buffers_with_timestamp(indio_dev, data, timestamp);
}
end_session:
mutex_unlock(&st->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
flush_fifo:
/* Flush HW and SW FIFOs. */
inv_reset_fifo(indio_dev);
mutex_unlock(&st->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
| linux-master | drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 Invensense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/delay.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include <linux/iio/iio.h>
#include "inv_icm42600.h"
#include "inv_icm42600_buffer.h"
/* FIFO header: 1 byte */
#define INV_ICM42600_FIFO_HEADER_MSG BIT(7)
#define INV_ICM42600_FIFO_HEADER_ACCEL BIT(6)
#define INV_ICM42600_FIFO_HEADER_GYRO BIT(5)
#define INV_ICM42600_FIFO_HEADER_TMST_FSYNC GENMASK(3, 2)
#define INV_ICM42600_FIFO_HEADER_ODR_ACCEL BIT(1)
#define INV_ICM42600_FIFO_HEADER_ODR_GYRO BIT(0)
struct inv_icm42600_fifo_1sensor_packet {
uint8_t header;
struct inv_icm42600_fifo_sensor_data data;
int8_t temp;
} __packed;
#define INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE 8
struct inv_icm42600_fifo_2sensors_packet {
uint8_t header;
struct inv_icm42600_fifo_sensor_data accel;
struct inv_icm42600_fifo_sensor_data gyro;
int8_t temp;
__be16 timestamp;
} __packed;
#define INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE 16
ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel,
const void **gyro, const int8_t **temp,
const void **timestamp, unsigned int *odr)
{
const struct inv_icm42600_fifo_1sensor_packet *pack1 = packet;
const struct inv_icm42600_fifo_2sensors_packet *pack2 = packet;
uint8_t header = *((const uint8_t *)packet);
/* FIFO empty */
if (header & INV_ICM42600_FIFO_HEADER_MSG) {
*accel = NULL;
*gyro = NULL;
*temp = NULL;
*timestamp = NULL;
*odr = 0;
return 0;
}
/* handle odr flags */
*odr = 0;
if (header & INV_ICM42600_FIFO_HEADER_ODR_GYRO)
*odr |= INV_ICM42600_SENSOR_GYRO;
if (header & INV_ICM42600_FIFO_HEADER_ODR_ACCEL)
*odr |= INV_ICM42600_SENSOR_ACCEL;
/* accel + gyro */
if ((header & INV_ICM42600_FIFO_HEADER_ACCEL) &&
(header & INV_ICM42600_FIFO_HEADER_GYRO)) {
*accel = &pack2->accel;
*gyro = &pack2->gyro;
*temp = &pack2->temp;
*timestamp = &pack2->timestamp;
return INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE;
}
/* accel only */
if (header & INV_ICM42600_FIFO_HEADER_ACCEL) {
*accel = &pack1->data;
*gyro = NULL;
*temp = &pack1->temp;
*timestamp = NULL;
return INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE;
}
/* gyro only */
if (header & INV_ICM42600_FIFO_HEADER_GYRO) {
*accel = NULL;
*gyro = &pack1->data;
*temp = &pack1->temp;
*timestamp = NULL;
return INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE;
}
/* invalid packet if here */
return -EINVAL;
}
void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st)
{
uint32_t period_gyro, period_accel, period;
if (st->fifo.en & INV_ICM42600_SENSOR_GYRO)
period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr);
else
period_gyro = U32_MAX;
if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL)
period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr);
else
period_accel = U32_MAX;
if (period_gyro <= period_accel)
period = period_gyro;
else
period = period_accel;
st->fifo.period = period;
}
int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st,
unsigned int fifo_en)
{
unsigned int mask, val;
int ret;
/* update only FIFO EN bits */
mask = INV_ICM42600_FIFO_CONFIG1_TMST_FSYNC_EN |
INV_ICM42600_FIFO_CONFIG1_TEMP_EN |
INV_ICM42600_FIFO_CONFIG1_GYRO_EN |
INV_ICM42600_FIFO_CONFIG1_ACCEL_EN;
val = 0;
if (fifo_en & INV_ICM42600_SENSOR_GYRO)
val |= INV_ICM42600_FIFO_CONFIG1_GYRO_EN;
if (fifo_en & INV_ICM42600_SENSOR_ACCEL)
val |= INV_ICM42600_FIFO_CONFIG1_ACCEL_EN;
if (fifo_en & INV_ICM42600_SENSOR_TEMP)
val |= INV_ICM42600_FIFO_CONFIG1_TEMP_EN;
ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val);
if (ret)
return ret;
st->fifo.en = fifo_en;
inv_icm42600_buffer_update_fifo_period(st);
return 0;
}
static size_t inv_icm42600_get_packet_size(unsigned int fifo_en)
{
size_t packet_size;
if ((fifo_en & INV_ICM42600_SENSOR_GYRO) &&
(fifo_en & INV_ICM42600_SENSOR_ACCEL))
packet_size = INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE;
else
packet_size = INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE;
return packet_size;
}
static unsigned int inv_icm42600_wm_truncate(unsigned int watermark,
size_t packet_size)
{
size_t wm_size;
unsigned int wm;
wm_size = watermark * packet_size;
if (wm_size > INV_ICM42600_FIFO_WATERMARK_MAX)
wm_size = INV_ICM42600_FIFO_WATERMARK_MAX;
wm = wm_size / packet_size;
return wm;
}
/**
* inv_icm42600_buffer_update_watermark - update watermark FIFO threshold
* @st: driver internal state
*
* Returns 0 on success, a negative error code otherwise.
*
* FIFO watermark threshold is computed based on the required watermark values
* set for gyro and accel sensors. Since watermark is all about acceptable data
* latency, use the smallest setting between the 2. It means choosing the
* smallest latency but this is not as simple as choosing the smallest watermark
* value. Latency depends on watermark and ODR. It requires several steps:
* 1) compute gyro and accel latencies and choose the smallest value.
* 2) adapt the choosen latency so that it is a multiple of both gyro and accel
* ones. Otherwise it is possible that you don't meet a requirement. (for
* example with gyro @100Hz wm 4 and accel @100Hz with wm 6, choosing the
* value of 4 will not meet accel latency requirement because 6 is not a
* multiple of 4. You need to use the value 2.)
* 3) Since all periods are multiple of each others, watermark is computed by
* dividing this computed latency by the smallest period, which corresponds
* to the FIFO frequency. Beware that this is only true because we are not
* using 500Hz frequency which is not a multiple of the others.
*/
int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st)
{
size_t packet_size, wm_size;
unsigned int wm_gyro, wm_accel, watermark;
uint32_t period_gyro, period_accel, period;
uint32_t latency_gyro, latency_accel, latency;
bool restore;
__le16 raw_wm;
int ret;
packet_size = inv_icm42600_get_packet_size(st->fifo.en);
/* compute sensors latency, depending on sensor watermark and odr */
wm_gyro = inv_icm42600_wm_truncate(st->fifo.watermark.gyro, packet_size);
wm_accel = inv_icm42600_wm_truncate(st->fifo.watermark.accel, packet_size);
/* use us for odr to avoid overflow using 32 bits values */
period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr) / 1000UL;
period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr) / 1000UL;
latency_gyro = period_gyro * wm_gyro;
latency_accel = period_accel * wm_accel;
/* 0 value for watermark means that the sensor is turned off */
if (latency_gyro == 0) {
watermark = wm_accel;
} else if (latency_accel == 0) {
watermark = wm_gyro;
} else {
/* compute the smallest latency that is a multiple of both */
if (latency_gyro <= latency_accel)
latency = latency_gyro - (latency_accel % latency_gyro);
else
latency = latency_accel - (latency_gyro % latency_accel);
/* use the shortest period */
if (period_gyro <= period_accel)
period = period_gyro;
else
period = period_accel;
/* all this works because periods are multiple of each others */
watermark = latency / period;
if (watermark < 1)
watermark = 1;
}
/* compute watermark value in bytes */
wm_size = watermark * packet_size;
/* changing FIFO watermark requires to turn off watermark interrupt */
ret = regmap_update_bits_check(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
0, &restore);
if (ret)
return ret;
raw_wm = INV_ICM42600_FIFO_WATERMARK_VAL(wm_size);
memcpy(st->buffer, &raw_wm, sizeof(raw_wm));
ret = regmap_bulk_write(st->map, INV_ICM42600_REG_FIFO_WATERMARK,
st->buffer, sizeof(raw_wm));
if (ret)
return ret;
/* restore watermark interrupt */
if (restore) {
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN);
if (ret)
return ret;
}
return 0;
}
static int inv_icm42600_buffer_preenable(struct iio_dev *indio_dev)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct device *dev = regmap_get_device(st->map);
struct inv_sensors_timestamp *ts = iio_priv(indio_dev);
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
inv_sensors_timestamp_reset(ts);
mutex_unlock(&st->lock);
return 0;
}
/*
* update_scan_mode callback is turning sensors on and setting data FIFO enable
* bits.
*/
static int inv_icm42600_buffer_postenable(struct iio_dev *indio_dev)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
mutex_lock(&st->lock);
/* exit if FIFO is already on */
if (st->fifo.on) {
ret = 0;
goto out_on;
}
/* set FIFO threshold interrupt */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN);
if (ret)
goto out_unlock;
/* flush FIFO data */
ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET,
INV_ICM42600_SIGNAL_PATH_RESET_FIFO_FLUSH);
if (ret)
goto out_unlock;
/* set FIFO in streaming mode */
ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG,
INV_ICM42600_FIFO_CONFIG_STREAM);
if (ret)
goto out_unlock;
/* workaround: first read of FIFO count after reset is always 0 */
ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, st->buffer, 2);
if (ret)
goto out_unlock;
out_on:
/* increase FIFO on counter */
st->fifo.on++;
out_unlock:
mutex_unlock(&st->lock);
return ret;
}
static int inv_icm42600_buffer_predisable(struct iio_dev *indio_dev)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
mutex_lock(&st->lock);
/* exit if there are several sensors using the FIFO */
if (st->fifo.on > 1) {
ret = 0;
goto out_off;
}
/* set FIFO in bypass mode */
ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG,
INV_ICM42600_FIFO_CONFIG_BYPASS);
if (ret)
goto out_unlock;
/* flush FIFO data */
ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET,
INV_ICM42600_SIGNAL_PATH_RESET_FIFO_FLUSH);
if (ret)
goto out_unlock;
/* disable FIFO threshold interrupt */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 0);
if (ret)
goto out_unlock;
out_off:
/* decrease FIFO on counter */
st->fifo.on--;
out_unlock:
mutex_unlock(&st->lock);
return ret;
}
static int inv_icm42600_buffer_postdisable(struct iio_dev *indio_dev)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct device *dev = regmap_get_device(st->map);
unsigned int sensor;
unsigned int *watermark;
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
unsigned int sleep_temp = 0;
unsigned int sleep_sensor = 0;
unsigned int sleep;
int ret;
if (indio_dev == st->indio_gyro) {
sensor = INV_ICM42600_SENSOR_GYRO;
watermark = &st->fifo.watermark.gyro;
} else if (indio_dev == st->indio_accel) {
sensor = INV_ICM42600_SENSOR_ACCEL;
watermark = &st->fifo.watermark.accel;
} else {
return -EINVAL;
}
mutex_lock(&st->lock);
ret = inv_icm42600_buffer_set_fifo_en(st, st->fifo.en & ~sensor);
if (ret)
goto out_unlock;
*watermark = 0;
ret = inv_icm42600_buffer_update_watermark(st);
if (ret)
goto out_unlock;
conf.mode = INV_ICM42600_SENSOR_MODE_OFF;
if (sensor == INV_ICM42600_SENSOR_GYRO)
ret = inv_icm42600_set_gyro_conf(st, &conf, &sleep_sensor);
else
ret = inv_icm42600_set_accel_conf(st, &conf, &sleep_sensor);
if (ret)
goto out_unlock;
/* if FIFO is off, turn temperature off */
if (!st->fifo.on)
ret = inv_icm42600_set_temp_conf(st, false, &sleep_temp);
out_unlock:
mutex_unlock(&st->lock);
/* sleep maximum required time */
if (sleep_sensor > sleep_temp)
sleep = sleep_sensor;
else
sleep = sleep_temp;
if (sleep)
msleep(sleep);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
const struct iio_buffer_setup_ops inv_icm42600_buffer_ops = {
.preenable = inv_icm42600_buffer_preenable,
.postenable = inv_icm42600_buffer_postenable,
.predisable = inv_icm42600_buffer_predisable,
.postdisable = inv_icm42600_buffer_postdisable,
};
int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st,
unsigned int max)
{
size_t max_count;
__be16 *raw_fifo_count;
ssize_t i, size;
const void *accel, *gyro, *timestamp;
const int8_t *temp;
unsigned int odr;
int ret;
/* reset all samples counters */
st->fifo.count = 0;
st->fifo.nb.gyro = 0;
st->fifo.nb.accel = 0;
st->fifo.nb.total = 0;
/* compute maximum FIFO read size */
if (max == 0)
max_count = sizeof(st->fifo.data);
else
max_count = max * inv_icm42600_get_packet_size(st->fifo.en);
/* read FIFO count value */
raw_fifo_count = (__be16 *)st->buffer;
ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT,
raw_fifo_count, sizeof(*raw_fifo_count));
if (ret)
return ret;
st->fifo.count = be16_to_cpup(raw_fifo_count);
/* check and clamp FIFO count value */
if (st->fifo.count == 0)
return 0;
if (st->fifo.count > max_count)
st->fifo.count = max_count;
/* read all FIFO data in internal buffer */
ret = regmap_noinc_read(st->map, INV_ICM42600_REG_FIFO_DATA,
st->fifo.data, st->fifo.count);
if (ret)
return ret;
/* compute number of samples for each sensor */
for (i = 0; i < st->fifo.count; i += size) {
size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i],
&accel, &gyro, &temp, ×tamp, &odr);
if (size <= 0)
break;
if (gyro != NULL && inv_icm42600_fifo_is_data_valid(gyro))
st->fifo.nb.gyro++;
if (accel != NULL && inv_icm42600_fifo_is_data_valid(accel))
st->fifo.nb.accel++;
st->fifo.nb.total++;
}
return 0;
}
int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st)
{
struct inv_sensors_timestamp *ts;
int ret;
if (st->fifo.nb.total == 0)
return 0;
/* handle gyroscope timestamp and FIFO data parsing */
ts = iio_priv(st->indio_gyro);
inv_sensors_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total,
st->fifo.nb.gyro, st->timestamp.gyro);
if (st->fifo.nb.gyro > 0) {
ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro);
if (ret)
return ret;
}
/* handle accelerometer timestamp and FIFO data parsing */
ts = iio_priv(st->indio_accel);
inv_sensors_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total,
st->fifo.nb.accel, st->timestamp.accel);
if (st->fifo.nb.accel > 0) {
ret = inv_icm42600_accel_parse_fifo(st->indio_accel);
if (ret)
return ret;
}
return 0;
}
int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st,
unsigned int count)
{
struct inv_sensors_timestamp *ts;
int64_t gyro_ts, accel_ts;
int ret;
gyro_ts = iio_get_time_ns(st->indio_gyro);
accel_ts = iio_get_time_ns(st->indio_accel);
ret = inv_icm42600_buffer_fifo_read(st, count);
if (ret)
return ret;
if (st->fifo.nb.total == 0)
return 0;
if (st->fifo.nb.gyro > 0) {
ts = iio_priv(st->indio_gyro);
inv_sensors_timestamp_interrupt(ts, st->fifo.period,
st->fifo.nb.total, st->fifo.nb.gyro,
gyro_ts);
ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro);
if (ret)
return ret;
}
if (st->fifo.nb.accel > 0) {
ts = iio_priv(st->indio_accel);
inv_sensors_timestamp_interrupt(ts, st->fifo.period,
st->fifo.nb.total, st->fifo.nb.accel,
accel_ts);
ret = inv_icm42600_accel_parse_fifo(st->indio_accel);
if (ret)
return ret;
}
return 0;
}
int inv_icm42600_buffer_init(struct inv_icm42600_state *st)
{
unsigned int val;
int ret;
/*
* Default FIFO configuration (bits 7 to 5)
* - use invalid value
* - FIFO count in bytes
* - FIFO count in big endian
*/
val = INV_ICM42600_INTF_CONFIG0_FIFO_COUNT_ENDIAN;
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
GENMASK(7, 5), val);
if (ret)
return ret;
/*
* Enable FIFO partial read and continuous watermark interrupt.
* Disable all FIFO EN bits.
*/
val = INV_ICM42600_FIFO_CONFIG1_RESUME_PARTIAL_RD |
INV_ICM42600_FIFO_CONFIG1_WM_GT_TH;
return regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1,
GENMASK(6, 5) | GENMASK(3, 0), val);
}
| linux-master | drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 InvenSense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/spi/spi.h>
#include <linux/regmap.h>
#include <linux/property.h>
#include "inv_icm42600.h"
static int inv_icm42600_spi_bus_setup(struct inv_icm42600_state *st)
{
unsigned int mask, val;
int ret;
/* setup interface registers */
val = INV_ICM42600_INTF_CONFIG6_I3C_EN |
INV_ICM42600_INTF_CONFIG6_I3C_SDR_EN |
INV_ICM42600_INTF_CONFIG6_I3C_DDR_EN;
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6,
INV_ICM42600_INTF_CONFIG6_MASK, val);
if (ret)
return ret;
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0);
if (ret)
return ret;
/* set slew rates for I2C and SPI */
mask = INV_ICM42600_DRIVE_CONFIG_I2C_MASK |
INV_ICM42600_DRIVE_CONFIG_SPI_MASK;
val = INV_ICM42600_DRIVE_CONFIG_I2C(INV_ICM42600_SLEW_RATE_20_60NS) |
INV_ICM42600_DRIVE_CONFIG_SPI(INV_ICM42600_SLEW_RATE_INF_2NS);
ret = regmap_update_bits(st->map, INV_ICM42600_REG_DRIVE_CONFIG,
mask, val);
if (ret)
return ret;
/* disable i2c bus */
return regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK,
INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_I2C_DIS);
}
static int inv_icm42600_probe(struct spi_device *spi)
{
const void *match;
enum inv_icm42600_chip chip;
struct regmap *regmap;
match = device_get_match_data(&spi->dev);
if (!match)
return -EINVAL;
chip = (uintptr_t)match;
regmap = devm_regmap_init_spi(spi, &inv_icm42600_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return inv_icm42600_core_probe(regmap, chip, spi->irq,
inv_icm42600_spi_bus_setup);
}
static const struct of_device_id inv_icm42600_of_matches[] = {
{
.compatible = "invensense,icm42600",
.data = (void *)INV_CHIP_ICM42600,
}, {
.compatible = "invensense,icm42602",
.data = (void *)INV_CHIP_ICM42602,
}, {
.compatible = "invensense,icm42605",
.data = (void *)INV_CHIP_ICM42605,
}, {
.compatible = "invensense,icm42622",
.data = (void *)INV_CHIP_ICM42622,
}, {
.compatible = "invensense,icm42631",
.data = (void *)INV_CHIP_ICM42631,
},
{}
};
MODULE_DEVICE_TABLE(of, inv_icm42600_of_matches);
static struct spi_driver inv_icm42600_driver = {
.driver = {
.name = "inv-icm42600-spi",
.of_match_table = inv_icm42600_of_matches,
.pm = pm_ptr(&inv_icm42600_pm_ops),
},
.probe = inv_icm42600_probe,
};
module_spi_driver(inv_icm42600_driver);
MODULE_AUTHOR("InvenSense, Inc.");
MODULE_DESCRIPTION("InvenSense ICM-426xx SPI driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(IIO_ICM42600);
| linux-master | drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 Invensense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/delay.h>
#include <linux/math64.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include "inv_icm42600.h"
#include "inv_icm42600_temp.h"
#include "inv_icm42600_buffer.h"
#define INV_ICM42600_ACCEL_CHAN(_modifier, _index, _ext_info) \
{ \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = _modifier, \
.info_mask_separate = \
BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_all = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_all_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = _index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_BE, \
}, \
.ext_info = _ext_info, \
}
enum inv_icm42600_accel_scan {
INV_ICM42600_ACCEL_SCAN_X,
INV_ICM42600_ACCEL_SCAN_Y,
INV_ICM42600_ACCEL_SCAN_Z,
INV_ICM42600_ACCEL_SCAN_TEMP,
INV_ICM42600_ACCEL_SCAN_TIMESTAMP,
};
static const struct iio_chan_spec_ext_info inv_icm42600_accel_ext_infos[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42600_get_mount_matrix),
{},
};
static const struct iio_chan_spec inv_icm42600_accel_channels[] = {
INV_ICM42600_ACCEL_CHAN(IIO_MOD_X, INV_ICM42600_ACCEL_SCAN_X,
inv_icm42600_accel_ext_infos),
INV_ICM42600_ACCEL_CHAN(IIO_MOD_Y, INV_ICM42600_ACCEL_SCAN_Y,
inv_icm42600_accel_ext_infos),
INV_ICM42600_ACCEL_CHAN(IIO_MOD_Z, INV_ICM42600_ACCEL_SCAN_Z,
inv_icm42600_accel_ext_infos),
INV_ICM42600_TEMP_CHAN(INV_ICM42600_ACCEL_SCAN_TEMP),
IIO_CHAN_SOFT_TIMESTAMP(INV_ICM42600_ACCEL_SCAN_TIMESTAMP),
};
/*
* IIO buffer data: size must be a power of 2 and timestamp aligned
* 16 bytes: 6 bytes acceleration, 2 bytes temperature, 8 bytes timestamp
*/
struct inv_icm42600_accel_buffer {
struct inv_icm42600_fifo_sensor_data accel;
int16_t temp;
int64_t timestamp __aligned(8);
};
#define INV_ICM42600_SCAN_MASK_ACCEL_3AXIS \
(BIT(INV_ICM42600_ACCEL_SCAN_X) | \
BIT(INV_ICM42600_ACCEL_SCAN_Y) | \
BIT(INV_ICM42600_ACCEL_SCAN_Z))
#define INV_ICM42600_SCAN_MASK_TEMP BIT(INV_ICM42600_ACCEL_SCAN_TEMP)
static const unsigned long inv_icm42600_accel_scan_masks[] = {
/* 3-axis accel + temperature */
INV_ICM42600_SCAN_MASK_ACCEL_3AXIS | INV_ICM42600_SCAN_MASK_TEMP,
0,
};
/* enable accelerometer sensor and FIFO write */
static int inv_icm42600_accel_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *scan_mask)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct inv_sensors_timestamp *ts = iio_priv(indio_dev);
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
unsigned int fifo_en = 0;
unsigned int sleep_temp = 0;
unsigned int sleep_accel = 0;
unsigned int sleep;
int ret;
mutex_lock(&st->lock);
if (*scan_mask & INV_ICM42600_SCAN_MASK_TEMP) {
/* enable temp sensor */
ret = inv_icm42600_set_temp_conf(st, true, &sleep_temp);
if (ret)
goto out_unlock;
fifo_en |= INV_ICM42600_SENSOR_TEMP;
}
if (*scan_mask & INV_ICM42600_SCAN_MASK_ACCEL_3AXIS) {
/* enable accel sensor */
conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
ret = inv_icm42600_set_accel_conf(st, &conf, &sleep_accel);
if (ret)
goto out_unlock;
fifo_en |= INV_ICM42600_SENSOR_ACCEL;
}
/* update data FIFO write */
inv_sensors_timestamp_apply_odr(ts, 0, 0, 0);
ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en);
if (ret)
goto out_unlock;
ret = inv_icm42600_buffer_update_watermark(st);
out_unlock:
mutex_unlock(&st->lock);
/* sleep maximum required time */
if (sleep_accel > sleep_temp)
sleep = sleep_accel;
else
sleep = sleep_temp;
if (sleep)
msleep(sleep);
return ret;
}
static int inv_icm42600_accel_read_sensor(struct inv_icm42600_state *st,
struct iio_chan_spec const *chan,
int16_t *val)
{
struct device *dev = regmap_get_device(st->map);
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
unsigned int reg;
__be16 *data;
int ret;
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
reg = INV_ICM42600_REG_ACCEL_DATA_X;
break;
case IIO_MOD_Y:
reg = INV_ICM42600_REG_ACCEL_DATA_Y;
break;
case IIO_MOD_Z:
reg = INV_ICM42600_REG_ACCEL_DATA_Z;
break;
default:
return -EINVAL;
}
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
/* enable accel sensor */
conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
ret = inv_icm42600_set_accel_conf(st, &conf, NULL);
if (ret)
goto exit;
/* read accel register data */
data = (__be16 *)&st->buffer[0];
ret = regmap_bulk_read(st->map, reg, data, sizeof(*data));
if (ret)
goto exit;
*val = (int16_t)be16_to_cpup(data);
if (*val == INV_ICM42600_DATA_INVALID)
ret = -EINVAL;
exit:
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
/* IIO format int + nano */
static const int inv_icm42600_accel_scale[] = {
/* +/- 16G => 0.004788403 m/s-2 */
[2 * INV_ICM42600_ACCEL_FS_16G] = 0,
[2 * INV_ICM42600_ACCEL_FS_16G + 1] = 4788403,
/* +/- 8G => 0.002394202 m/s-2 */
[2 * INV_ICM42600_ACCEL_FS_8G] = 0,
[2 * INV_ICM42600_ACCEL_FS_8G + 1] = 2394202,
/* +/- 4G => 0.001197101 m/s-2 */
[2 * INV_ICM42600_ACCEL_FS_4G] = 0,
[2 * INV_ICM42600_ACCEL_FS_4G + 1] = 1197101,
/* +/- 2G => 0.000598550 m/s-2 */
[2 * INV_ICM42600_ACCEL_FS_2G] = 0,
[2 * INV_ICM42600_ACCEL_FS_2G + 1] = 598550,
};
static int inv_icm42600_accel_read_scale(struct inv_icm42600_state *st,
int *val, int *val2)
{
unsigned int idx;
idx = st->conf.accel.fs;
*val = inv_icm42600_accel_scale[2 * idx];
*val2 = inv_icm42600_accel_scale[2 * idx + 1];
return IIO_VAL_INT_PLUS_NANO;
}
static int inv_icm42600_accel_write_scale(struct inv_icm42600_state *st,
int val, int val2)
{
struct device *dev = regmap_get_device(st->map);
unsigned int idx;
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
int ret;
for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_accel_scale); idx += 2) {
if (val == inv_icm42600_accel_scale[idx] &&
val2 == inv_icm42600_accel_scale[idx + 1])
break;
}
if (idx >= ARRAY_SIZE(inv_icm42600_accel_scale))
return -EINVAL;
conf.fs = idx / 2;
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
ret = inv_icm42600_set_accel_conf(st, &conf, NULL);
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
/* IIO format int + micro */
static const int inv_icm42600_accel_odr[] = {
/* 12.5Hz */
12, 500000,
/* 25Hz */
25, 0,
/* 50Hz */
50, 0,
/* 100Hz */
100, 0,
/* 200Hz */
200, 0,
/* 1kHz */
1000, 0,
/* 2kHz */
2000, 0,
/* 4kHz */
4000, 0,
};
static const int inv_icm42600_accel_odr_conv[] = {
INV_ICM42600_ODR_12_5HZ,
INV_ICM42600_ODR_25HZ,
INV_ICM42600_ODR_50HZ,
INV_ICM42600_ODR_100HZ,
INV_ICM42600_ODR_200HZ,
INV_ICM42600_ODR_1KHZ_LN,
INV_ICM42600_ODR_2KHZ_LN,
INV_ICM42600_ODR_4KHZ_LN,
};
static int inv_icm42600_accel_read_odr(struct inv_icm42600_state *st,
int *val, int *val2)
{
unsigned int odr;
unsigned int i;
odr = st->conf.accel.odr;
for (i = 0; i < ARRAY_SIZE(inv_icm42600_accel_odr_conv); ++i) {
if (inv_icm42600_accel_odr_conv[i] == odr)
break;
}
if (i >= ARRAY_SIZE(inv_icm42600_accel_odr_conv))
return -EINVAL;
*val = inv_icm42600_accel_odr[2 * i];
*val2 = inv_icm42600_accel_odr[2 * i + 1];
return IIO_VAL_INT_PLUS_MICRO;
}
static int inv_icm42600_accel_write_odr(struct iio_dev *indio_dev,
int val, int val2)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct inv_sensors_timestamp *ts = iio_priv(indio_dev);
struct device *dev = regmap_get_device(st->map);
unsigned int idx;
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
int ret;
for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_accel_odr); idx += 2) {
if (val == inv_icm42600_accel_odr[idx] &&
val2 == inv_icm42600_accel_odr[idx + 1])
break;
}
if (idx >= ARRAY_SIZE(inv_icm42600_accel_odr))
return -EINVAL;
conf.odr = inv_icm42600_accel_odr_conv[idx / 2];
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
ret = inv_sensors_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr),
iio_buffer_enabled(indio_dev));
if (ret)
goto out_unlock;
ret = inv_icm42600_set_accel_conf(st, &conf, NULL);
if (ret)
goto out_unlock;
inv_icm42600_buffer_update_fifo_period(st);
inv_icm42600_buffer_update_watermark(st);
out_unlock:
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
/*
* Calibration bias values, IIO range format int + micro.
* Value is limited to +/-1g coded on 12 bits signed. Step is 0.5mg.
*/
static int inv_icm42600_accel_calibbias[] = {
-10, 42010, /* min: -10.042010 m/s² */
0, 4903, /* step: 0.004903 m/s² */
10, 37106, /* max: 10.037106 m/s² */
};
static int inv_icm42600_accel_read_offset(struct inv_icm42600_state *st,
struct iio_chan_spec const *chan,
int *val, int *val2)
{
struct device *dev = regmap_get_device(st->map);
int64_t val64;
int32_t bias;
unsigned int reg;
int16_t offset;
uint8_t data[2];
int ret;
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
reg = INV_ICM42600_REG_OFFSET_USER4;
break;
case IIO_MOD_Y:
reg = INV_ICM42600_REG_OFFSET_USER6;
break;
case IIO_MOD_Z:
reg = INV_ICM42600_REG_OFFSET_USER7;
break;
default:
return -EINVAL;
}
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
ret = regmap_bulk_read(st->map, reg, st->buffer, sizeof(data));
memcpy(data, st->buffer, sizeof(data));
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
if (ret)
return ret;
/* 12 bits signed value */
switch (chan->channel2) {
case IIO_MOD_X:
offset = sign_extend32(((data[0] & 0xF0) << 4) | data[1], 11);
break;
case IIO_MOD_Y:
offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11);
break;
case IIO_MOD_Z:
offset = sign_extend32(((data[0] & 0xF0) << 4) | data[1], 11);
break;
default:
return -EINVAL;
}
/*
* convert raw offset to g then to m/s²
* 12 bits signed raw step 0.5mg to g: 5 / 10000
* g to m/s²: 9.806650
* result in micro (1000000)
* (offset * 5 * 9.806650 * 1000000) / 10000
*/
val64 = (int64_t)offset * 5LL * 9806650LL;
/* for rounding, add + or - divisor (10000) divided by 2 */
if (val64 >= 0)
val64 += 10000LL / 2LL;
else
val64 -= 10000LL / 2LL;
bias = div_s64(val64, 10000L);
*val = bias / 1000000L;
*val2 = bias % 1000000L;
return IIO_VAL_INT_PLUS_MICRO;
}
static int inv_icm42600_accel_write_offset(struct inv_icm42600_state *st,
struct iio_chan_spec const *chan,
int val, int val2)
{
struct device *dev = regmap_get_device(st->map);
int64_t val64;
int32_t min, max;
unsigned int reg, regval;
int16_t offset;
int ret;
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (chan->channel2) {
case IIO_MOD_X:
reg = INV_ICM42600_REG_OFFSET_USER4;
break;
case IIO_MOD_Y:
reg = INV_ICM42600_REG_OFFSET_USER6;
break;
case IIO_MOD_Z:
reg = INV_ICM42600_REG_OFFSET_USER7;
break;
default:
return -EINVAL;
}
/* inv_icm42600_accel_calibbias: min - step - max in micro */
min = inv_icm42600_accel_calibbias[0] * 1000000L +
inv_icm42600_accel_calibbias[1];
max = inv_icm42600_accel_calibbias[4] * 1000000L +
inv_icm42600_accel_calibbias[5];
val64 = (int64_t)val * 1000000LL + (int64_t)val2;
if (val64 < min || val64 > max)
return -EINVAL;
/*
* convert m/s² to g then to raw value
* m/s² to g: 1 / 9.806650
* g to raw 12 bits signed, step 0.5mg: 10000 / 5
* val in micro (1000000)
* val * 10000 / (9.806650 * 1000000 * 5)
*/
val64 = val64 * 10000LL;
/* for rounding, add + or - divisor (9806650 * 5) divided by 2 */
if (val64 >= 0)
val64 += 9806650 * 5 / 2;
else
val64 -= 9806650 * 5 / 2;
offset = div_s64(val64, 9806650 * 5);
/* clamp value limited to 12 bits signed */
if (offset < -2048)
offset = -2048;
else if (offset > 2047)
offset = 2047;
pm_runtime_get_sync(dev);
mutex_lock(&st->lock);
switch (chan->channel2) {
case IIO_MOD_X:
/* OFFSET_USER4 register is shared */
ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER4,
®val);
if (ret)
goto out_unlock;
st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F);
st->buffer[1] = offset & 0xFF;
break;
case IIO_MOD_Y:
/* OFFSET_USER7 register is shared */
ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER7,
®val);
if (ret)
goto out_unlock;
st->buffer[0] = offset & 0xFF;
st->buffer[1] = ((offset & 0xF00) >> 8) | (regval & 0xF0);
break;
case IIO_MOD_Z:
/* OFFSET_USER7 register is shared */
ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER7,
®val);
if (ret)
goto out_unlock;
st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F);
st->buffer[1] = offset & 0xFF;
break;
default:
ret = -EINVAL;
goto out_unlock;
}
ret = regmap_bulk_write(st->map, reg, st->buffer, 2);
out_unlock:
mutex_unlock(&st->lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
static int inv_icm42600_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int16_t data;
int ret;
switch (chan->type) {
case IIO_ACCEL:
break;
case IIO_TEMP:
return inv_icm42600_temp_read_raw(indio_dev, chan, val, val2, mask);
default:
return -EINVAL;
}
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = inv_icm42600_accel_read_sensor(st, chan, &data);
iio_device_release_direct_mode(indio_dev);
if (ret)
return ret;
*val = data;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
return inv_icm42600_accel_read_scale(st, val, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
return inv_icm42600_accel_read_odr(st, val, val2);
case IIO_CHAN_INFO_CALIBBIAS:
return inv_icm42600_accel_read_offset(st, chan, val, val2);
default:
return -EINVAL;
}
}
static int inv_icm42600_accel_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals,
int *type, int *length, long mask)
{
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*vals = inv_icm42600_accel_scale;
*type = IIO_VAL_INT_PLUS_NANO;
*length = ARRAY_SIZE(inv_icm42600_accel_scale);
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = inv_icm42600_accel_odr;
*type = IIO_VAL_INT_PLUS_MICRO;
*length = ARRAY_SIZE(inv_icm42600_accel_odr);
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_CALIBBIAS:
*vals = inv_icm42600_accel_calibbias;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_RANGE;
default:
return -EINVAL;
}
}
static int inv_icm42600_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = inv_icm42600_accel_write_scale(st, val, val2);
iio_device_release_direct_mode(indio_dev);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
return inv_icm42600_accel_write_odr(indio_dev, val, val2);
case IIO_CHAN_INFO_CALIBBIAS:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = inv_icm42600_accel_write_offset(st, chan, val, val2);
iio_device_release_direct_mode(indio_dev);
return ret;
default:
return -EINVAL;
}
}
static int inv_icm42600_accel_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
if (chan->type != IIO_ACCEL)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
return IIO_VAL_INT_PLUS_NANO;
case IIO_CHAN_INFO_SAMP_FREQ:
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBBIAS:
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int inv_icm42600_accel_hwfifo_set_watermark(struct iio_dev *indio_dev,
unsigned int val)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
mutex_lock(&st->lock);
st->fifo.watermark.accel = val;
ret = inv_icm42600_buffer_update_watermark(st);
mutex_unlock(&st->lock);
return ret;
}
static int inv_icm42600_accel_hwfifo_flush(struct iio_dev *indio_dev,
unsigned int count)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
int ret;
if (count == 0)
return 0;
mutex_lock(&st->lock);
ret = inv_icm42600_buffer_hwfifo_flush(st, count);
if (!ret)
ret = st->fifo.nb.accel;
mutex_unlock(&st->lock);
return ret;
}
static const struct iio_info inv_icm42600_accel_info = {
.read_raw = inv_icm42600_accel_read_raw,
.read_avail = inv_icm42600_accel_read_avail,
.write_raw = inv_icm42600_accel_write_raw,
.write_raw_get_fmt = inv_icm42600_accel_write_raw_get_fmt,
.debugfs_reg_access = inv_icm42600_debugfs_reg,
.update_scan_mode = inv_icm42600_accel_update_scan_mode,
.hwfifo_set_watermark = inv_icm42600_accel_hwfifo_set_watermark,
.hwfifo_flush_to_buffer = inv_icm42600_accel_hwfifo_flush,
};
struct iio_dev *inv_icm42600_accel_init(struct inv_icm42600_state *st)
{
struct device *dev = regmap_get_device(st->map);
const char *name;
struct inv_sensors_timestamp_chip ts_chip;
struct inv_sensors_timestamp *ts;
struct iio_dev *indio_dev;
int ret;
name = devm_kasprintf(dev, GFP_KERNEL, "%s-accel", st->name);
if (!name)
return ERR_PTR(-ENOMEM);
indio_dev = devm_iio_device_alloc(dev, sizeof(*ts));
if (!indio_dev)
return ERR_PTR(-ENOMEM);
/*
* clock period is 32kHz (31250ns)
* jitter is +/- 2% (20 per mille)
*/
ts_chip.clock_period = 31250;
ts_chip.jitter = 20;
ts_chip.init_period = inv_icm42600_odr_to_period(st->conf.accel.odr);
ts = iio_priv(indio_dev);
inv_sensors_timestamp_init(ts, &ts_chip);
iio_device_set_drvdata(indio_dev, st);
indio_dev->name = name;
indio_dev->info = &inv_icm42600_accel_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = inv_icm42600_accel_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_icm42600_accel_channels);
indio_dev->available_scan_masks = inv_icm42600_accel_scan_masks;
ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
&inv_icm42600_buffer_ops);
if (ret)
return ERR_PTR(ret);
ret = devm_iio_device_register(dev, indio_dev);
if (ret)
return ERR_PTR(ret);
return indio_dev;
}
int inv_icm42600_accel_parse_fifo(struct iio_dev *indio_dev)
{
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
struct inv_sensors_timestamp *ts = iio_priv(indio_dev);
ssize_t i, size;
unsigned int no;
const void *accel, *gyro, *timestamp;
const int8_t *temp;
unsigned int odr;
int64_t ts_val;
struct inv_icm42600_accel_buffer buffer;
/* parse all fifo packets */
for (i = 0, no = 0; i < st->fifo.count; i += size, ++no) {
size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i],
&accel, &gyro, &temp, ×tamp, &odr);
/* quit if error or FIFO is empty */
if (size <= 0)
return size;
/* skip packet if no accel data or data is invalid */
if (accel == NULL || !inv_icm42600_fifo_is_data_valid(accel))
continue;
/* update odr */
if (odr & INV_ICM42600_SENSOR_ACCEL)
inv_sensors_timestamp_apply_odr(ts, st->fifo.period,
st->fifo.nb.total, no);
/* buffer is copied to userspace, zeroing it to avoid any data leak */
memset(&buffer, 0, sizeof(buffer));
memcpy(&buffer.accel, accel, sizeof(buffer.accel));
/* convert 8 bits FIFO temperature in high resolution format */
buffer.temp = temp ? (*temp * 64) : 0;
ts_val = inv_sensors_timestamp_pop(ts);
iio_push_to_buffers_with_timestamp(indio_dev, &buffer, ts_val);
}
return 0;
}
| linux-master | drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c |
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