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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* w83l785ts.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2003-2009 Jean Delvare <[email protected]>
*
* Inspired from the lm83 driver. The W83L785TS-S is a sensor chip made
* by Winbond. It reports a single external temperature with a 1 deg
* resolution and a 3 deg accuracy. Datasheet can be obtained from
* Winbond's website at:
* http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83L785TS-S.pdf
*
* Ported to Linux 2.6 by Wolfgang Ziegler <[email protected]> and Jean Delvare
* <[email protected]>.
*
* Thanks to James Bolt <[email protected]> for benchmarking the read
* error handling mechanism.
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
/* How many retries on register read error */
#define MAX_RETRIES 5
/*
* Address to scan
* Address is fully defined internally and cannot be changed.
*/
static const unsigned short normal_i2c[] = { 0x2e, I2C_CLIENT_END };
/*
* The W83L785TS-S registers
* Manufacturer ID is 0x5CA3 for Winbond.
*/
#define W83L785TS_REG_MAN_ID1 0x4D
#define W83L785TS_REG_MAN_ID2 0x4C
#define W83L785TS_REG_CHIP_ID 0x4E
#define W83L785TS_REG_CONFIG 0x40
#define W83L785TS_REG_TYPE 0x52
#define W83L785TS_REG_TEMP 0x27
#define W83L785TS_REG_TEMP_OVER 0x53 /* not sure about this one */
/*
* Conversions
* The W83L785TS-S uses signed 8-bit values.
*/
#define TEMP_FROM_REG(val) ((val) * 1000)
/*
* Functions declaration
*/
static int w83l785ts_probe(struct i2c_client *client);
static int w83l785ts_detect(struct i2c_client *client,
struct i2c_board_info *info);
static void w83l785ts_remove(struct i2c_client *client);
static u8 w83l785ts_read_value(struct i2c_client *client, u8 reg, u8 defval);
static struct w83l785ts_data *w83l785ts_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
static const struct i2c_device_id w83l785ts_id[] = {
{ "w83l785ts", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, w83l785ts_id);
static struct i2c_driver w83l785ts_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "w83l785ts",
},
.probe = w83l785ts_probe,
.remove = w83l785ts_remove,
.id_table = w83l785ts_id,
.detect = w83l785ts_detect,
.address_list = normal_i2c,
};
/*
* Client data (each client gets its own)
*/
struct w83l785ts_data {
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* registers values */
s8 temp[2]; /* 0: input, 1: critical limit */
};
/*
* Sysfs stuff
*/
static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct w83l785ts_data *data = w83l785ts_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[attr->index]));
}
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, NULL, 1);
/*
* Real code
*/
/* Return 0 if detection is successful, -ENODEV otherwise */
static int w83l785ts_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
u16 man_id;
u8 chip_id;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* detection */
if ((w83l785ts_read_value(client, W83L785TS_REG_CONFIG, 0) & 0x80)
|| (w83l785ts_read_value(client, W83L785TS_REG_TYPE, 0) & 0xFC)) {
dev_dbg(&adapter->dev,
"W83L785TS-S detection failed at 0x%02x\n",
client->addr);
return -ENODEV;
}
/* Identification */
man_id = (w83l785ts_read_value(client, W83L785TS_REG_MAN_ID1, 0) << 8)
+ w83l785ts_read_value(client, W83L785TS_REG_MAN_ID2, 0);
chip_id = w83l785ts_read_value(client, W83L785TS_REG_CHIP_ID, 0);
if (man_id != 0x5CA3 /* Winbond */
|| chip_id != 0x70) { /* W83L785TS-S */
dev_dbg(&adapter->dev,
"Unsupported chip (man_id=0x%04X, chip_id=0x%02X)\n",
man_id, chip_id);
return -ENODEV;
}
strscpy(info->type, "w83l785ts", I2C_NAME_SIZE);
return 0;
}
static int w83l785ts_probe(struct i2c_client *client)
{
struct w83l785ts_data *data;
struct device *dev = &client->dev;
int err;
data = devm_kzalloc(dev, sizeof(struct w83l785ts_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
/*
* Initialize the W83L785TS chip
* Nothing yet, assume it is already started.
*/
err = device_create_file(dev, &sensor_dev_attr_temp1_input.dev_attr);
if (err)
return err;
err = device_create_file(dev, &sensor_dev_attr_temp1_max.dev_attr);
if (err)
goto exit_remove;
/* Register sysfs hooks */
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
return 0;
exit_remove:
device_remove_file(dev, &sensor_dev_attr_temp1_input.dev_attr);
device_remove_file(dev, &sensor_dev_attr_temp1_max.dev_attr);
return err;
}
static void w83l785ts_remove(struct i2c_client *client)
{
struct w83l785ts_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
device_remove_file(&client->dev,
&sensor_dev_attr_temp1_input.dev_attr);
device_remove_file(&client->dev,
&sensor_dev_attr_temp1_max.dev_attr);
}
static u8 w83l785ts_read_value(struct i2c_client *client, u8 reg, u8 defval)
{
int value, i;
struct device *dev;
const char *prefix;
/*
* We might be called during detection, at which point the client
* isn't yet fully initialized, so we can't use dev_dbg on it
*/
if (i2c_get_clientdata(client)) {
dev = &client->dev;
prefix = "";
} else {
dev = &client->adapter->dev;
prefix = "w83l785ts: ";
}
/*
* Frequent read errors have been reported on Asus boards, so we
* retry on read errors. If it still fails (unlikely), return the
* default value requested by the caller.
*/
for (i = 1; i <= MAX_RETRIES; i++) {
value = i2c_smbus_read_byte_data(client, reg);
if (value >= 0) {
dev_dbg(dev, "%sRead 0x%02x from register 0x%02x.\n",
prefix, value, reg);
return value;
}
dev_dbg(dev, "%sRead failed, will retry in %d.\n", prefix, i);
msleep(i);
}
dev_err(dev, "%sCouldn't read value from register 0x%02x.\n", prefix,
reg);
return defval;
}
static struct w83l785ts_data *w83l785ts_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83l785ts_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
if (!data->valid || time_after(jiffies, data->last_updated + HZ * 2)) {
dev_dbg(&client->dev, "Updating w83l785ts data.\n");
data->temp[0] = w83l785ts_read_value(client,
W83L785TS_REG_TEMP, data->temp[0]);
data->temp[1] = w83l785ts_read_value(client,
W83L785TS_REG_TEMP_OVER, data->temp[1]);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
module_i2c_driver(w83l785ts_driver);
MODULE_AUTHOR("Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("W83L785TS-S driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/w83l785ts.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* A hwmon driver for the Intel 5000 series chipset FB-DIMM AMB
* temperature sensors
* Copyright (C) 2007 IBM
*
* Author: Darrick J. Wong <[email protected]>
*/
#include <linux/module.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/log2.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#define DRVNAME "i5k_amb"
#define I5K_REG_AMB_BASE_ADDR 0x48
#define I5K_REG_AMB_LEN_ADDR 0x50
#define I5K_REG_CHAN0_PRESENCE_ADDR 0x64
#define I5K_REG_CHAN1_PRESENCE_ADDR 0x66
#define AMB_REG_TEMP_MIN_ADDR 0x80
#define AMB_REG_TEMP_MID_ADDR 0x81
#define AMB_REG_TEMP_MAX_ADDR 0x82
#define AMB_REG_TEMP_STATUS_ADDR 0x84
#define AMB_REG_TEMP_ADDR 0x85
#define AMB_CONFIG_SIZE 2048
#define AMB_FUNC_3_OFFSET 768
static unsigned long amb_reg_temp_status(unsigned int amb)
{
return AMB_FUNC_3_OFFSET + AMB_REG_TEMP_STATUS_ADDR +
AMB_CONFIG_SIZE * amb;
}
static unsigned long amb_reg_temp_min(unsigned int amb)
{
return AMB_FUNC_3_OFFSET + AMB_REG_TEMP_MIN_ADDR +
AMB_CONFIG_SIZE * amb;
}
static unsigned long amb_reg_temp_mid(unsigned int amb)
{
return AMB_FUNC_3_OFFSET + AMB_REG_TEMP_MID_ADDR +
AMB_CONFIG_SIZE * amb;
}
static unsigned long amb_reg_temp_max(unsigned int amb)
{
return AMB_FUNC_3_OFFSET + AMB_REG_TEMP_MAX_ADDR +
AMB_CONFIG_SIZE * amb;
}
static unsigned long amb_reg_temp(unsigned int amb)
{
return AMB_FUNC_3_OFFSET + AMB_REG_TEMP_ADDR +
AMB_CONFIG_SIZE * amb;
}
#define MAX_MEM_CHANNELS 4
#define MAX_AMBS_PER_CHANNEL 16
#define MAX_AMBS (MAX_MEM_CHANNELS * \
MAX_AMBS_PER_CHANNEL)
#define CHANNEL_SHIFT 4
#define DIMM_MASK 0xF
/*
* Ugly hack: For some reason the highest bit is set if there
* are _any_ DIMMs in the channel. Attempting to read from
* this "high-order" AMB results in a memory bus error, so
* for now we'll just ignore that top bit, even though that
* might prevent us from seeing the 16th DIMM in the channel.
*/
#define REAL_MAX_AMBS_PER_CHANNEL 15
#define KNOBS_PER_AMB 6
static unsigned long amb_num_from_reg(unsigned int byte_num, unsigned int bit)
{
return byte_num * MAX_AMBS_PER_CHANNEL + bit;
}
#define AMB_SYSFS_NAME_LEN 16
struct i5k_device_attribute {
struct sensor_device_attribute s_attr;
char name[AMB_SYSFS_NAME_LEN];
};
struct i5k_amb_data {
struct device *hwmon_dev;
unsigned long amb_base;
unsigned long amb_len;
u16 amb_present[MAX_MEM_CHANNELS];
void __iomem *amb_mmio;
struct i5k_device_attribute *attrs;
unsigned int num_attrs;
};
static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
return sprintf(buf, "%s\n", DRVNAME);
}
static DEVICE_ATTR_RO(name);
static struct platform_device *amb_pdev;
static u8 amb_read_byte(struct i5k_amb_data *data, unsigned long offset)
{
return ioread8(data->amb_mmio + offset);
}
static void amb_write_byte(struct i5k_amb_data *data, unsigned long offset,
u8 val)
{
iowrite8(val, data->amb_mmio + offset);
}
static ssize_t show_amb_alarm(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
if (!(amb_read_byte(data, amb_reg_temp_status(attr->index)) & 0x20) &&
(amb_read_byte(data, amb_reg_temp_status(attr->index)) & 0x8))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t store_amb_min(struct device *dev,
struct device_attribute *devattr,
const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
unsigned long temp;
int ret = kstrtoul(buf, 10, &temp);
if (ret < 0)
return ret;
temp = temp / 500;
if (temp > 255)
temp = 255;
amb_write_byte(data, amb_reg_temp_min(attr->index), temp);
return count;
}
static ssize_t store_amb_mid(struct device *dev,
struct device_attribute *devattr,
const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
unsigned long temp;
int ret = kstrtoul(buf, 10, &temp);
if (ret < 0)
return ret;
temp = temp / 500;
if (temp > 255)
temp = 255;
amb_write_byte(data, amb_reg_temp_mid(attr->index), temp);
return count;
}
static ssize_t store_amb_max(struct device *dev,
struct device_attribute *devattr,
const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
unsigned long temp;
int ret = kstrtoul(buf, 10, &temp);
if (ret < 0)
return ret;
temp = temp / 500;
if (temp > 255)
temp = 255;
amb_write_byte(data, amb_reg_temp_max(attr->index), temp);
return count;
}
static ssize_t show_amb_min(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n",
500 * amb_read_byte(data, amb_reg_temp_min(attr->index)));
}
static ssize_t show_amb_mid(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n",
500 * amb_read_byte(data, amb_reg_temp_mid(attr->index)));
}
static ssize_t show_amb_max(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n",
500 * amb_read_byte(data, amb_reg_temp_max(attr->index)));
}
static ssize_t show_amb_temp(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i5k_amb_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n",
500 * amb_read_byte(data, amb_reg_temp(attr->index)));
}
static ssize_t show_label(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
return sprintf(buf, "Ch. %d DIMM %d\n", attr->index >> CHANNEL_SHIFT,
attr->index & DIMM_MASK);
}
static int i5k_amb_hwmon_init(struct platform_device *pdev)
{
int i, j, k, d = 0;
u16 c;
int res = 0;
int num_ambs = 0;
struct i5k_amb_data *data = platform_get_drvdata(pdev);
/* Count the number of AMBs found */
/* ignore the high-order bit, see "Ugly hack" comment above */
for (i = 0; i < MAX_MEM_CHANNELS; i++)
num_ambs += hweight16(data->amb_present[i] & 0x7fff);
/* Set up sysfs stuff */
data->attrs = kzalloc(array3_size(num_ambs, KNOBS_PER_AMB,
sizeof(*data->attrs)),
GFP_KERNEL);
if (!data->attrs)
return -ENOMEM;
data->num_attrs = 0;
for (i = 0; i < MAX_MEM_CHANNELS; i++) {
c = data->amb_present[i];
for (j = 0; j < REAL_MAX_AMBS_PER_CHANNEL; j++, c >>= 1) {
struct i5k_device_attribute *iattr;
k = amb_num_from_reg(i, j);
if (!(c & 0x1))
continue;
d++;
/* sysfs label */
iattr = data->attrs + data->num_attrs;
snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
"temp%d_label", d);
iattr->s_attr.dev_attr.attr.name = iattr->name;
iattr->s_attr.dev_attr.attr.mode = 0444;
iattr->s_attr.dev_attr.show = show_label;
iattr->s_attr.index = k;
sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
res = device_create_file(&pdev->dev,
&iattr->s_attr.dev_attr);
if (res)
goto exit_remove;
data->num_attrs++;
/* Temperature sysfs knob */
iattr = data->attrs + data->num_attrs;
snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
"temp%d_input", d);
iattr->s_attr.dev_attr.attr.name = iattr->name;
iattr->s_attr.dev_attr.attr.mode = 0444;
iattr->s_attr.dev_attr.show = show_amb_temp;
iattr->s_attr.index = k;
sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
res = device_create_file(&pdev->dev,
&iattr->s_attr.dev_attr);
if (res)
goto exit_remove;
data->num_attrs++;
/* Temperature min sysfs knob */
iattr = data->attrs + data->num_attrs;
snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
"temp%d_min", d);
iattr->s_attr.dev_attr.attr.name = iattr->name;
iattr->s_attr.dev_attr.attr.mode = 0644;
iattr->s_attr.dev_attr.show = show_amb_min;
iattr->s_attr.dev_attr.store = store_amb_min;
iattr->s_attr.index = k;
sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
res = device_create_file(&pdev->dev,
&iattr->s_attr.dev_attr);
if (res)
goto exit_remove;
data->num_attrs++;
/* Temperature mid sysfs knob */
iattr = data->attrs + data->num_attrs;
snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
"temp%d_mid", d);
iattr->s_attr.dev_attr.attr.name = iattr->name;
iattr->s_attr.dev_attr.attr.mode = 0644;
iattr->s_attr.dev_attr.show = show_amb_mid;
iattr->s_attr.dev_attr.store = store_amb_mid;
iattr->s_attr.index = k;
sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
res = device_create_file(&pdev->dev,
&iattr->s_attr.dev_attr);
if (res)
goto exit_remove;
data->num_attrs++;
/* Temperature max sysfs knob */
iattr = data->attrs + data->num_attrs;
snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
"temp%d_max", d);
iattr->s_attr.dev_attr.attr.name = iattr->name;
iattr->s_attr.dev_attr.attr.mode = 0644;
iattr->s_attr.dev_attr.show = show_amb_max;
iattr->s_attr.dev_attr.store = store_amb_max;
iattr->s_attr.index = k;
sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
res = device_create_file(&pdev->dev,
&iattr->s_attr.dev_attr);
if (res)
goto exit_remove;
data->num_attrs++;
/* Temperature alarm sysfs knob */
iattr = data->attrs + data->num_attrs;
snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
"temp%d_alarm", d);
iattr->s_attr.dev_attr.attr.name = iattr->name;
iattr->s_attr.dev_attr.attr.mode = 0444;
iattr->s_attr.dev_attr.show = show_amb_alarm;
iattr->s_attr.index = k;
sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
res = device_create_file(&pdev->dev,
&iattr->s_attr.dev_attr);
if (res)
goto exit_remove;
data->num_attrs++;
}
}
res = device_create_file(&pdev->dev, &dev_attr_name);
if (res)
goto exit_remove;
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
res = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
return res;
exit_remove:
device_remove_file(&pdev->dev, &dev_attr_name);
for (i = 0; i < data->num_attrs; i++)
device_remove_file(&pdev->dev, &data->attrs[i].s_attr.dev_attr);
kfree(data->attrs);
return res;
}
static int i5k_amb_add(void)
{
int res;
/* only ever going to be one of these */
amb_pdev = platform_device_alloc(DRVNAME, 0);
if (!amb_pdev)
return -ENOMEM;
res = platform_device_add(amb_pdev);
if (res)
goto err;
return 0;
err:
platform_device_put(amb_pdev);
return res;
}
static int i5k_find_amb_registers(struct i5k_amb_data *data,
unsigned long devid)
{
struct pci_dev *pcidev;
u32 val32;
int res = -ENODEV;
/* Find AMB register memory space */
pcidev = pci_get_device(PCI_VENDOR_ID_INTEL,
devid,
NULL);
if (!pcidev)
return -ENODEV;
pci_read_config_dword(pcidev, I5K_REG_AMB_BASE_ADDR, &val32);
if (val32 == (u32)~0)
goto out;
data->amb_base = val32;
pci_read_config_dword(pcidev, I5K_REG_AMB_LEN_ADDR, &val32);
if (val32 == (u32)~0)
goto out;
data->amb_len = val32;
/* Is it big enough? */
if (data->amb_len < AMB_CONFIG_SIZE * MAX_AMBS) {
dev_err(&pcidev->dev, "AMB region too small!\n");
goto out;
}
res = 0;
out:
pci_dev_put(pcidev);
return res;
}
static int i5k_channel_probe(u16 *amb_present, unsigned long dev_id)
{
struct pci_dev *pcidev;
u16 val16;
int res = -ENODEV;
/* Copy the DIMM presence map for these two channels */
pcidev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, NULL);
if (!pcidev)
return -ENODEV;
pci_read_config_word(pcidev, I5K_REG_CHAN0_PRESENCE_ADDR, &val16);
if (val16 == (u16)~0)
goto out;
amb_present[0] = val16;
pci_read_config_word(pcidev, I5K_REG_CHAN1_PRESENCE_ADDR, &val16);
if (val16 == (u16)~0)
goto out;
amb_present[1] = val16;
res = 0;
out:
pci_dev_put(pcidev);
return res;
}
static struct {
unsigned long err;
unsigned long fbd0;
} chipset_ids[] = {
{ PCI_DEVICE_ID_INTEL_5000_ERR, PCI_DEVICE_ID_INTEL_5000_FBD0 },
{ PCI_DEVICE_ID_INTEL_5400_ERR, PCI_DEVICE_ID_INTEL_5400_FBD0 },
{ 0, 0 }
};
#ifdef MODULE
static const struct pci_device_id i5k_amb_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5000_ERR) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5400_ERR) },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, i5k_amb_ids);
#endif
static int i5k_amb_probe(struct platform_device *pdev)
{
struct i5k_amb_data *data;
struct resource *reso;
int i, res;
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
/* Figure out where the AMB registers live */
i = 0;
do {
res = i5k_find_amb_registers(data, chipset_ids[i].err);
if (res == 0)
break;
i++;
} while (chipset_ids[i].err);
if (res)
goto err;
/* Copy the DIMM presence map for the first two channels */
res = i5k_channel_probe(&data->amb_present[0], chipset_ids[i].fbd0);
if (res)
goto err;
/* Copy the DIMM presence map for the optional second two channels */
i5k_channel_probe(&data->amb_present[2], chipset_ids[i].fbd0 + 1);
/* Set up resource regions */
reso = request_mem_region(data->amb_base, data->amb_len, DRVNAME);
if (!reso) {
res = -EBUSY;
goto err;
}
data->amb_mmio = ioremap(data->amb_base, data->amb_len);
if (!data->amb_mmio) {
res = -EBUSY;
goto err_map_failed;
}
platform_set_drvdata(pdev, data);
res = i5k_amb_hwmon_init(pdev);
if (res)
goto err_init_failed;
return res;
err_init_failed:
iounmap(data->amb_mmio);
err_map_failed:
release_mem_region(data->amb_base, data->amb_len);
err:
kfree(data);
return res;
}
static int i5k_amb_remove(struct platform_device *pdev)
{
int i;
struct i5k_amb_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
device_remove_file(&pdev->dev, &dev_attr_name);
for (i = 0; i < data->num_attrs; i++)
device_remove_file(&pdev->dev, &data->attrs[i].s_attr.dev_attr);
kfree(data->attrs);
iounmap(data->amb_mmio);
release_mem_region(data->amb_base, data->amb_len);
kfree(data);
return 0;
}
static struct platform_driver i5k_amb_driver = {
.driver = {
.name = DRVNAME,
},
.probe = i5k_amb_probe,
.remove = i5k_amb_remove,
};
static int __init i5k_amb_init(void)
{
int res;
res = platform_driver_register(&i5k_amb_driver);
if (res)
return res;
res = i5k_amb_add();
if (res)
platform_driver_unregister(&i5k_amb_driver);
return res;
}
static void __exit i5k_amb_exit(void)
{
platform_device_unregister(amb_pdev);
platform_driver_unregister(&i5k_amb_driver);
}
MODULE_AUTHOR("Darrick J. Wong <[email protected]>");
MODULE_DESCRIPTION("Intel 5000 chipset FB-DIMM AMB temperature sensor");
MODULE_LICENSE("GPL");
module_init(i5k_amb_init);
module_exit(i5k_amb_exit);
|
linux-master
|
drivers/hwmon/i5k_amb.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* max31827.c - Support for Maxim Low-Power Switch
*
* Copyright (c) 2023 Daniel Matyas <[email protected]>
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#define MAX31827_T_REG 0x0
#define MAX31827_CONFIGURATION_REG 0x2
#define MAX31827_TH_REG 0x4
#define MAX31827_TL_REG 0x6
#define MAX31827_TH_HYST_REG 0x8
#define MAX31827_TL_HYST_REG 0xA
#define MAX31827_CONFIGURATION_1SHOT_MASK BIT(0)
#define MAX31827_CONFIGURATION_CNV_RATE_MASK GENMASK(3, 1)
#define MAX31827_CONFIGURATION_U_TEMP_STAT_MASK BIT(14)
#define MAX31827_CONFIGURATION_O_TEMP_STAT_MASK BIT(15)
#define MAX31827_12_BIT_CNV_TIME 141
#define MAX31827_CNV_1_DIV_64_HZ 0x1
#define MAX31827_CNV_1_DIV_32_HZ 0x2
#define MAX31827_CNV_1_DIV_16_HZ 0x3
#define MAX31827_CNV_1_DIV_4_HZ 0x4
#define MAX31827_CNV_1_HZ 0x5
#define MAX31827_CNV_4_HZ 0x6
#define MAX31827_CNV_8_HZ 0x7
#define MAX31827_16_BIT_TO_M_DGR(x) (sign_extend32(x, 15) * 1000 / 16)
#define MAX31827_M_DGR_TO_16_BIT(x) (((x) << 4) / 1000)
#define MAX31827_DEVICE_ENABLE(x) ((x) ? 0xA : 0x0)
struct max31827_state {
/*
* Prevent simultaneous access to the i2c client.
*/
struct mutex lock;
struct regmap *regmap;
bool enable;
};
static const struct regmap_config max31827_regmap = {
.reg_bits = 8,
.val_bits = 16,
.max_register = 0xA,
};
static int write_alarm_val(struct max31827_state *st, unsigned int reg,
long val)
{
unsigned int cfg;
unsigned int tmp;
int ret;
val = MAX31827_M_DGR_TO_16_BIT(val);
/*
* Before the Temperature Threshold Alarm and Alarm Hysteresis Threshold
* register values are changed over I2C, the part must be in shutdown
* mode.
*
* Mutex is used to ensure, that some other process doesn't change the
* configuration register.
*/
mutex_lock(&st->lock);
if (!st->enable) {
ret = regmap_write(st->regmap, reg, val);
goto unlock;
}
ret = regmap_read(st->regmap, MAX31827_CONFIGURATION_REG, &cfg);
if (ret)
goto unlock;
tmp = cfg & ~(MAX31827_CONFIGURATION_1SHOT_MASK |
MAX31827_CONFIGURATION_CNV_RATE_MASK);
ret = regmap_write(st->regmap, MAX31827_CONFIGURATION_REG, tmp);
if (ret)
goto unlock;
ret = regmap_write(st->regmap, reg, val);
if (ret)
goto unlock;
ret = regmap_write(st->regmap, MAX31827_CONFIGURATION_REG, cfg);
unlock:
mutex_unlock(&st->lock);
return ret;
}
static umode_t max31827_is_visible(const void *state,
enum hwmon_sensor_types type, u32 attr,
int channel)
{
if (type == hwmon_temp) {
switch (attr) {
case hwmon_temp_enable:
case hwmon_temp_max:
case hwmon_temp_min:
case hwmon_temp_max_hyst:
case hwmon_temp_min_hyst:
return 0644;
case hwmon_temp_input:
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
return 0444;
default:
return 0;
}
} else if (type == hwmon_chip) {
if (attr == hwmon_chip_update_interval)
return 0644;
}
return 0;
}
static int max31827_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct max31827_state *st = dev_get_drvdata(dev);
unsigned int uval;
int ret = 0;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_enable:
ret = regmap_read(st->regmap,
MAX31827_CONFIGURATION_REG, &uval);
if (ret)
break;
uval = FIELD_GET(MAX31827_CONFIGURATION_1SHOT_MASK |
MAX31827_CONFIGURATION_CNV_RATE_MASK,
uval);
*val = !!uval;
break;
case hwmon_temp_input:
mutex_lock(&st->lock);
if (!st->enable) {
/*
* This operation requires mutex protection,
* because the chip configuration should not
* be changed during the conversion process.
*/
ret = regmap_update_bits(st->regmap,
MAX31827_CONFIGURATION_REG,
MAX31827_CONFIGURATION_1SHOT_MASK,
1);
if (ret) {
mutex_unlock(&st->lock);
return ret;
}
msleep(MAX31827_12_BIT_CNV_TIME);
}
ret = regmap_read(st->regmap, MAX31827_T_REG, &uval);
mutex_unlock(&st->lock);
if (ret)
break;
*val = MAX31827_16_BIT_TO_M_DGR(uval);
break;
case hwmon_temp_max:
ret = regmap_read(st->regmap, MAX31827_TH_REG, &uval);
if (ret)
break;
*val = MAX31827_16_BIT_TO_M_DGR(uval);
break;
case hwmon_temp_max_hyst:
ret = regmap_read(st->regmap, MAX31827_TH_HYST_REG,
&uval);
if (ret)
break;
*val = MAX31827_16_BIT_TO_M_DGR(uval);
break;
case hwmon_temp_max_alarm:
ret = regmap_read(st->regmap,
MAX31827_CONFIGURATION_REG, &uval);
if (ret)
break;
*val = FIELD_GET(MAX31827_CONFIGURATION_O_TEMP_STAT_MASK,
uval);
break;
case hwmon_temp_min:
ret = regmap_read(st->regmap, MAX31827_TL_REG, &uval);
if (ret)
break;
*val = MAX31827_16_BIT_TO_M_DGR(uval);
break;
case hwmon_temp_min_hyst:
ret = regmap_read(st->regmap, MAX31827_TL_HYST_REG,
&uval);
if (ret)
break;
*val = MAX31827_16_BIT_TO_M_DGR(uval);
break;
case hwmon_temp_min_alarm:
ret = regmap_read(st->regmap,
MAX31827_CONFIGURATION_REG, &uval);
if (ret)
break;
*val = FIELD_GET(MAX31827_CONFIGURATION_U_TEMP_STAT_MASK,
uval);
break;
default:
ret = -EOPNOTSUPP;
break;
}
break;
case hwmon_chip:
if (attr == hwmon_chip_update_interval) {
ret = regmap_read(st->regmap,
MAX31827_CONFIGURATION_REG, &uval);
if (ret)
break;
uval = FIELD_GET(MAX31827_CONFIGURATION_CNV_RATE_MASK,
uval);
switch (uval) {
case MAX31827_CNV_1_DIV_64_HZ:
*val = 64000;
break;
case MAX31827_CNV_1_DIV_32_HZ:
*val = 32000;
break;
case MAX31827_CNV_1_DIV_16_HZ:
*val = 16000;
break;
case MAX31827_CNV_1_DIV_4_HZ:
*val = 4000;
break;
case MAX31827_CNV_1_HZ:
*val = 1000;
break;
case MAX31827_CNV_4_HZ:
*val = 250;
break;
case MAX31827_CNV_8_HZ:
*val = 125;
break;
default:
*val = 0;
break;
}
}
break;
default:
ret = -EOPNOTSUPP;
break;
}
return ret;
}
static int max31827_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct max31827_state *st = dev_get_drvdata(dev);
int ret;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_enable:
if (val >> 1)
return -EINVAL;
mutex_lock(&st->lock);
/**
* The chip should not be enabled while a conversion is
* performed. Neither should the chip be enabled when
* the alarm values are changed.
*/
st->enable = val;
ret = regmap_update_bits(st->regmap,
MAX31827_CONFIGURATION_REG,
MAX31827_CONFIGURATION_1SHOT_MASK |
MAX31827_CONFIGURATION_CNV_RATE_MASK,
MAX31827_DEVICE_ENABLE(val));
mutex_unlock(&st->lock);
return ret;
case hwmon_temp_max:
return write_alarm_val(st, MAX31827_TH_REG, val);
case hwmon_temp_max_hyst:
return write_alarm_val(st, MAX31827_TH_HYST_REG, val);
case hwmon_temp_min:
return write_alarm_val(st, MAX31827_TL_REG, val);
case hwmon_temp_min_hyst:
return write_alarm_val(st, MAX31827_TL_HYST_REG, val);
default:
return -EOPNOTSUPP;
}
case hwmon_chip:
if (attr == hwmon_chip_update_interval) {
if (!st->enable)
return -EINVAL;
switch (val) {
case 125:
val = MAX31827_CNV_8_HZ;
break;
case 250:
val = MAX31827_CNV_4_HZ;
break;
case 1000:
val = MAX31827_CNV_1_HZ;
break;
case 4000:
val = MAX31827_CNV_1_DIV_4_HZ;
break;
case 16000:
val = MAX31827_CNV_1_DIV_16_HZ;
break;
case 32000:
val = MAX31827_CNV_1_DIV_32_HZ;
break;
case 64000:
val = MAX31827_CNV_1_DIV_64_HZ;
break;
default:
return -EINVAL;
}
val = FIELD_PREP(MAX31827_CONFIGURATION_CNV_RATE_MASK,
val);
return regmap_update_bits(st->regmap,
MAX31827_CONFIGURATION_REG,
MAX31827_CONFIGURATION_CNV_RATE_MASK,
val);
}
break;
default:
return -EOPNOTSUPP;
}
return -EOPNOTSUPP;
}
static int max31827_init_client(struct max31827_state *st)
{
st->enable = true;
return regmap_update_bits(st->regmap, MAX31827_CONFIGURATION_REG,
MAX31827_CONFIGURATION_1SHOT_MASK |
MAX31827_CONFIGURATION_CNV_RATE_MASK,
MAX31827_DEVICE_ENABLE(1));
}
static const struct hwmon_channel_info *max31827_info[] = {
HWMON_CHANNEL_INFO(temp, HWMON_T_ENABLE | HWMON_T_INPUT | HWMON_T_MIN |
HWMON_T_MIN_HYST | HWMON_T_MIN_ALARM |
HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_MAX_ALARM),
HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL),
NULL,
};
static const struct hwmon_ops max31827_hwmon_ops = {
.is_visible = max31827_is_visible,
.read = max31827_read,
.write = max31827_write,
};
static const struct hwmon_chip_info max31827_chip_info = {
.ops = &max31827_hwmon_ops,
.info = max31827_info,
};
static int max31827_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct max31827_state *st;
int err;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
return -EOPNOTSUPP;
st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
mutex_init(&st->lock);
st->regmap = devm_regmap_init_i2c(client, &max31827_regmap);
if (IS_ERR(st->regmap))
return dev_err_probe(dev, PTR_ERR(st->regmap),
"Failed to allocate regmap.\n");
err = max31827_init_client(st);
if (err)
return err;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, st,
&max31827_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max31827_i2c_ids[] = {
{ "max31827", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max31827_i2c_ids);
static const struct of_device_id max31827_of_match[] = {
{ .compatible = "adi,max31827" },
{ }
};
MODULE_DEVICE_TABLE(of, max31827_of_match);
static struct i2c_driver max31827_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "max31827",
.of_match_table = max31827_of_match,
},
.probe = max31827_probe,
.id_table = max31827_i2c_ids,
};
module_i2c_driver(max31827_driver);
MODULE_AUTHOR("Daniel Matyas <[email protected]>");
MODULE_DESCRIPTION("Maxim MAX31827 low-power temperature switch driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max31827.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm80.c - From lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 1998, 1999 Frodo Looijaard <[email protected]>
* and Philip Edelbrock <[email protected]>
*
* Ported to Linux 2.6 by Tiago Sousa <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
0x2e, 0x2f, I2C_CLIENT_END };
/* Many LM80 constants specified below */
/* The LM80 registers */
#define LM80_REG_IN_MAX(nr) (0x2a + (nr) * 2)
#define LM80_REG_IN_MIN(nr) (0x2b + (nr) * 2)
#define LM80_REG_IN(nr) (0x20 + (nr))
#define LM80_REG_FAN1 0x28
#define LM80_REG_FAN2 0x29
#define LM80_REG_FAN_MIN(nr) (0x3b + (nr))
#define LM80_REG_TEMP 0x27
#define LM80_REG_TEMP_HOT_MAX 0x38
#define LM80_REG_TEMP_HOT_HYST 0x39
#define LM80_REG_TEMP_OS_MAX 0x3a
#define LM80_REG_TEMP_OS_HYST 0x3b
#define LM80_REG_CONFIG 0x00
#define LM80_REG_ALARM1 0x01
#define LM80_REG_ALARM2 0x02
#define LM80_REG_MASK1 0x03
#define LM80_REG_MASK2 0x04
#define LM80_REG_FANDIV 0x05
#define LM80_REG_RES 0x06
#define LM96080_REG_CONV_RATE 0x07
#define LM96080_REG_MAN_ID 0x3e
#define LM96080_REG_DEV_ID 0x3f
/*
* Conversions. Rounding and limit checking is only done on the TO_REG
* variants. Note that you should be a bit careful with which arguments
* these macros are called: arguments may be evaluated more than once.
* Fixing this is just not worth it.
*/
#define IN_TO_REG(val) (clamp_val(((val) + 5) / 10, 0, 255))
#define IN_FROM_REG(val) ((val) * 10)
static inline unsigned char FAN_TO_REG(unsigned rpm, unsigned div)
{
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
(val) == 255 ? 0 : 1350000/((div) * (val)))
#define TEMP_FROM_REG(reg) ((reg) * 125 / 32)
#define TEMP_TO_REG(temp) (DIV_ROUND_CLOSEST(clamp_val((temp), \
-128000, 127000), 1000) << 8)
#define DIV_FROM_REG(val) (1 << (val))
enum temp_index {
t_input = 0,
t_hot_max,
t_hot_hyst,
t_os_max,
t_os_hyst,
t_num_temp
};
static const u8 temp_regs[t_num_temp] = {
[t_input] = LM80_REG_TEMP,
[t_hot_max] = LM80_REG_TEMP_HOT_MAX,
[t_hot_hyst] = LM80_REG_TEMP_HOT_HYST,
[t_os_max] = LM80_REG_TEMP_OS_MAX,
[t_os_hyst] = LM80_REG_TEMP_OS_HYST,
};
enum in_index {
i_input = 0,
i_max,
i_min,
i_num_in
};
enum fan_index {
f_input,
f_min,
f_num_fan
};
/*
* Client data (each client gets its own)
*/
struct lm80_data {
struct i2c_client *client;
struct mutex update_lock;
char error; /* !=0 if error occurred during last update */
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 in[i_num_in][7]; /* Register value, 1st index is enum in_index */
u8 fan[f_num_fan][2]; /* Register value, 1st index enum fan_index */
u8 fan_div[2]; /* Register encoding, shifted right */
s16 temp[t_num_temp]; /* Register values, normalized to 16 bit */
u16 alarms; /* Register encoding, combined */
};
static int lm80_read_value(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_byte_data(client, reg);
}
static int lm80_write_value(struct i2c_client *client, u8 reg, u8 value)
{
return i2c_smbus_write_byte_data(client, reg, value);
}
/* Called when we have found a new LM80 and after read errors */
static void lm80_init_client(struct i2c_client *client)
{
/*
* Reset all except Watchdog values and last conversion values
* This sets fan-divs to 2, among others. This makes most other
* initializations unnecessary
*/
lm80_write_value(client, LM80_REG_CONFIG, 0x80);
/* Set 11-bit temperature resolution */
lm80_write_value(client, LM80_REG_RES, 0x08);
/* Start monitoring */
lm80_write_value(client, LM80_REG_CONFIG, 0x01);
}
static struct lm80_data *lm80_update_device(struct device *dev)
{
struct lm80_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i;
int rv;
int prev_rv;
struct lm80_data *ret = data;
mutex_lock(&data->update_lock);
if (data->error)
lm80_init_client(client);
if (time_after(jiffies, data->last_updated + 2 * HZ) || !data->valid) {
dev_dbg(dev, "Starting lm80 update\n");
for (i = 0; i <= 6; i++) {
rv = lm80_read_value(client, LM80_REG_IN(i));
if (rv < 0)
goto abort;
data->in[i_input][i] = rv;
rv = lm80_read_value(client, LM80_REG_IN_MIN(i));
if (rv < 0)
goto abort;
data->in[i_min][i] = rv;
rv = lm80_read_value(client, LM80_REG_IN_MAX(i));
if (rv < 0)
goto abort;
data->in[i_max][i] = rv;
}
rv = lm80_read_value(client, LM80_REG_FAN1);
if (rv < 0)
goto abort;
data->fan[f_input][0] = rv;
rv = lm80_read_value(client, LM80_REG_FAN_MIN(1));
if (rv < 0)
goto abort;
data->fan[f_min][0] = rv;
rv = lm80_read_value(client, LM80_REG_FAN2);
if (rv < 0)
goto abort;
data->fan[f_input][1] = rv;
rv = lm80_read_value(client, LM80_REG_FAN_MIN(2));
if (rv < 0)
goto abort;
data->fan[f_min][1] = rv;
prev_rv = rv = lm80_read_value(client, LM80_REG_TEMP);
if (rv < 0)
goto abort;
rv = lm80_read_value(client, LM80_REG_RES);
if (rv < 0)
goto abort;
data->temp[t_input] = (prev_rv << 8) | (rv & 0xf0);
for (i = t_input + 1; i < t_num_temp; i++) {
rv = lm80_read_value(client, temp_regs[i]);
if (rv < 0)
goto abort;
data->temp[i] = rv << 8;
}
rv = lm80_read_value(client, LM80_REG_FANDIV);
if (rv < 0)
goto abort;
data->fan_div[0] = (rv >> 2) & 0x03;
data->fan_div[1] = (rv >> 4) & 0x03;
prev_rv = rv = lm80_read_value(client, LM80_REG_ALARM1);
if (rv < 0)
goto abort;
rv = lm80_read_value(client, LM80_REG_ALARM2);
if (rv < 0)
goto abort;
data->alarms = prev_rv + (rv << 8);
data->last_updated = jiffies;
data->valid = true;
data->error = 0;
}
goto done;
abort:
ret = ERR_PTR(rv);
data->valid = false;
data->error = 1;
done:
mutex_unlock(&data->update_lock);
return ret;
}
/*
* Sysfs stuff
*/
static ssize_t in_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm80_data *data = lm80_update_device(dev);
int index = to_sensor_dev_attr_2(attr)->index;
int nr = to_sensor_dev_attr_2(attr)->nr;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr][index]));
}
static ssize_t in_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm80_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int index = to_sensor_dev_attr_2(attr)->index;
int nr = to_sensor_dev_attr_2(attr)->nr;
long val;
u8 reg;
int err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
reg = nr == i_min ? LM80_REG_IN_MIN(index) : LM80_REG_IN_MAX(index);
mutex_lock(&data->update_lock);
data->in[nr][index] = IN_TO_REG(val);
lm80_write_value(client, reg, data->in[nr][index]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int index = to_sensor_dev_attr_2(attr)->index;
int nr = to_sensor_dev_attr_2(attr)->nr;
struct lm80_data *data = lm80_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr][index],
DIV_FROM_REG(data->fan_div[index])));
}
static ssize_t fan_div_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm80_data *data = lm80_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
}
static ssize_t fan_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int index = to_sensor_dev_attr_2(attr)->index;
int nr = to_sensor_dev_attr_2(attr)->nr;
struct lm80_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
mutex_lock(&data->update_lock);
data->fan[nr][index] = FAN_TO_REG(val,
DIV_FROM_REG(data->fan_div[index]));
lm80_write_value(client, LM80_REG_FAN_MIN(index + 1),
data->fan[nr][index]);
mutex_unlock(&data->update_lock);
return count;
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm80_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long min, val;
u8 reg;
int rv;
rv = kstrtoul(buf, 10, &val);
if (rv < 0)
return rv;
/* Save fan_min */
mutex_lock(&data->update_lock);
min = FAN_FROM_REG(data->fan[f_min][nr],
DIV_FROM_REG(data->fan_div[nr]));
switch (val) {
case 1:
data->fan_div[nr] = 0;
break;
case 2:
data->fan_div[nr] = 1;
break;
case 4:
data->fan_div[nr] = 2;
break;
case 8:
data->fan_div[nr] = 3;
break;
default:
dev_err(dev,
"fan_div value %ld not supported. Choose one of 1, 2, 4 or 8!\n",
val);
mutex_unlock(&data->update_lock);
return -EINVAL;
}
rv = lm80_read_value(client, LM80_REG_FANDIV);
if (rv < 0) {
mutex_unlock(&data->update_lock);
return rv;
}
reg = (rv & ~(3 << (2 * (nr + 1))))
| (data->fan_div[nr] << (2 * (nr + 1)));
lm80_write_value(client, LM80_REG_FANDIV, reg);
/* Restore fan_min */
data->fan[f_min][nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
lm80_write_value(client, LM80_REG_FAN_MIN(nr + 1),
data->fan[f_min][nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm80_data *data = lm80_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[attr->index]));
}
static ssize_t temp_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm80_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int nr = attr->index;
long val;
int err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
mutex_lock(&data->update_lock);
data->temp[nr] = TEMP_TO_REG(val);
lm80_write_value(client, temp_regs[nr], data->temp[nr] >> 8);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm80_data *data = lm80_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", data->alarms);
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct lm80_data *data = lm80_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_2_RW(in0_min, in, i_min, 0);
static SENSOR_DEVICE_ATTR_2_RW(in1_min, in, i_min, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_min, in, i_min, 2);
static SENSOR_DEVICE_ATTR_2_RW(in3_min, in, i_min, 3);
static SENSOR_DEVICE_ATTR_2_RW(in4_min, in, i_min, 4);
static SENSOR_DEVICE_ATTR_2_RW(in5_min, in, i_min, 5);
static SENSOR_DEVICE_ATTR_2_RW(in6_min, in, i_min, 6);
static SENSOR_DEVICE_ATTR_2_RW(in0_max, in, i_max, 0);
static SENSOR_DEVICE_ATTR_2_RW(in1_max, in, i_max, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_max, in, i_max, 2);
static SENSOR_DEVICE_ATTR_2_RW(in3_max, in, i_max, 3);
static SENSOR_DEVICE_ATTR_2_RW(in4_max, in, i_max, 4);
static SENSOR_DEVICE_ATTR_2_RW(in5_max, in, i_max, 5);
static SENSOR_DEVICE_ATTR_2_RW(in6_max, in, i_max, 6);
static SENSOR_DEVICE_ATTR_2_RO(in0_input, in, i_input, 0);
static SENSOR_DEVICE_ATTR_2_RO(in1_input, in, i_input, 1);
static SENSOR_DEVICE_ATTR_2_RO(in2_input, in, i_input, 2);
static SENSOR_DEVICE_ATTR_2_RO(in3_input, in, i_input, 3);
static SENSOR_DEVICE_ATTR_2_RO(in4_input, in, i_input, 4);
static SENSOR_DEVICE_ATTR_2_RO(in5_input, in, i_input, 5);
static SENSOR_DEVICE_ATTR_2_RO(in6_input, in, i_input, 6);
static SENSOR_DEVICE_ATTR_2_RW(fan1_min, fan, f_min, 0);
static SENSOR_DEVICE_ATTR_2_RW(fan2_min, fan, f_min, 1);
static SENSOR_DEVICE_ATTR_2_RO(fan1_input, fan, f_input, 0);
static SENSOR_DEVICE_ATTR_2_RO(fan2_input, fan, f_input, 1);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, t_input);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, t_hot_max);
static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp, t_hot_hyst);
static SENSOR_DEVICE_ATTR_RW(temp1_crit, temp, t_os_max);
static SENSOR_DEVICE_ATTR_RW(temp1_crit_hyst, temp, t_os_hyst);
static DEVICE_ATTR_RO(alarms);
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 10);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 13);
/*
* Real code
*/
static struct attribute *lm80_attrs[] = {
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
&dev_attr_alarms.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(lm80);
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm80_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int i, cur, man_id, dev_id;
const char *name = NULL;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* First check for unused bits, common to both chip types */
if ((lm80_read_value(client, LM80_REG_ALARM2) & 0xc0)
|| (lm80_read_value(client, LM80_REG_CONFIG) & 0x80))
return -ENODEV;
/*
* The LM96080 has manufacturer and stepping/die rev registers so we
* can just check that. The LM80 does not have such registers so we
* have to use a more expensive trick.
*/
man_id = lm80_read_value(client, LM96080_REG_MAN_ID);
dev_id = lm80_read_value(client, LM96080_REG_DEV_ID);
if (man_id == 0x01 && dev_id == 0x08) {
/* Check more unused bits for confirmation */
if (lm80_read_value(client, LM96080_REG_CONV_RATE) & 0xfe)
return -ENODEV;
name = "lm96080";
} else {
/* Check 6-bit addressing */
for (i = 0x2a; i <= 0x3d; i++) {
cur = i2c_smbus_read_byte_data(client, i);
if ((i2c_smbus_read_byte_data(client, i + 0x40) != cur)
|| (i2c_smbus_read_byte_data(client, i + 0x80) != cur)
|| (i2c_smbus_read_byte_data(client, i + 0xc0) != cur))
return -ENODEV;
}
name = "lm80";
}
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static int lm80_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct lm80_data *data;
data = devm_kzalloc(dev, sizeof(struct lm80_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Initialize the LM80 chip */
lm80_init_client(client);
/* A few vars need to be filled upon startup */
data->fan[f_min][0] = lm80_read_value(client, LM80_REG_FAN_MIN(1));
data->fan[f_min][1] = lm80_read_value(client, LM80_REG_FAN_MIN(2));
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, lm80_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/*
* Driver data (common to all clients)
*/
static const struct i2c_device_id lm80_id[] = {
{ "lm80", 0 },
{ "lm96080", 1 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm80_id);
static struct i2c_driver lm80_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm80",
},
.probe = lm80_probe,
.id_table = lm80_id,
.detect = lm80_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm80_driver);
MODULE_AUTHOR("Frodo Looijaard <[email protected]> and "
"Philip Edelbrock <[email protected]>");
MODULE_DESCRIPTION("LM80 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm80.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* coretemp.c - Linux kernel module for hardware monitoring
*
* Copyright (C) 2007 Rudolf Marek <[email protected]>
*
* Inspired from many hwmon drivers
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/sysfs.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/list.h>
#include <linux/platform_device.h>
#include <linux/cpu.h>
#include <linux/smp.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <asm/msr.h>
#include <asm/processor.h>
#include <asm/cpu_device_id.h>
#include <linux/sched/isolation.h>
#define DRVNAME "coretemp"
/*
* force_tjmax only matters when TjMax can't be read from the CPU itself.
* When set, it replaces the driver's suboptimal heuristic.
*/
static int force_tjmax;
module_param_named(tjmax, force_tjmax, int, 0444);
MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
#define PKG_SYSFS_ATTR_NO 1 /* Sysfs attribute for package temp */
#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
#define NUM_REAL_CORES 128 /* Number of Real cores per cpu */
#define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */
#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
#ifdef CONFIG_SMP
#define for_each_sibling(i, cpu) \
for_each_cpu(i, topology_sibling_cpumask(cpu))
#else
#define for_each_sibling(i, cpu) for (i = 0; false; )
#endif
/*
* Per-Core Temperature Data
* @tjmax: The static tjmax value when tjmax cannot be retrieved from
* IA32_TEMPERATURE_TARGET MSR.
* @last_updated: The time when the current temperature value was updated
* earlier (in jiffies).
* @cpu_core_id: The CPU Core from which temperature values should be read
* This value is passed as "id" field to rdmsr/wrmsr functions.
* @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
* from where the temperature values should be read.
* @attr_size: Total number of pre-core attrs displayed in the sysfs.
* @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
* Otherwise, temp_data holds coretemp data.
*/
struct temp_data {
int temp;
int tjmax;
unsigned long last_updated;
unsigned int cpu;
u32 cpu_core_id;
u32 status_reg;
int attr_size;
bool is_pkg_data;
struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
struct attribute *attrs[TOTAL_ATTRS + 1];
struct attribute_group attr_group;
struct mutex update_lock;
};
/* Platform Data per Physical CPU */
struct platform_data {
struct device *hwmon_dev;
u16 pkg_id;
u16 cpu_map[NUM_REAL_CORES];
struct ida ida;
struct cpumask cpumask;
struct temp_data *core_data[MAX_CORE_DATA];
struct device_attribute name_attr;
};
struct tjmax_pci {
unsigned int device;
int tjmax;
};
static const struct tjmax_pci tjmax_pci_table[] = {
{ 0x0708, 110000 }, /* CE41x0 (Sodaville ) */
{ 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
{ 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
{ 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
};
struct tjmax {
char const *id;
int tjmax;
};
static const struct tjmax tjmax_table[] = {
{ "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
{ "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
};
struct tjmax_model {
u8 model;
u8 mask;
int tjmax;
};
#define ANY 0xff
static const struct tjmax_model tjmax_model_table[] = {
{ 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
{ 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
* Note: Also matches 230 and 330,
* which are covered by tjmax_table
*/
{ 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
* Note: TjMax for E6xxT is 110C, but CPU type
* is undetectable by software
*/
{ 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
{ 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
{ 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
* Also matches S12x0 (stepping 9), covered by
* PCI table
*/
};
static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
{
/* The 100C is default for both mobile and non mobile CPUs */
int tjmax = 100000;
int tjmax_ee = 85000;
int usemsr_ee = 1;
int err;
u32 eax, edx;
int i;
u16 devfn = PCI_DEVFN(0, 0);
struct pci_dev *host_bridge = pci_get_domain_bus_and_slot(0, 0, devfn);
/*
* Explicit tjmax table entries override heuristics.
* First try PCI host bridge IDs, followed by model ID strings
* and model/stepping information.
*/
if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
if (host_bridge->device == tjmax_pci_table[i].device) {
pci_dev_put(host_bridge);
return tjmax_pci_table[i].tjmax;
}
}
}
pci_dev_put(host_bridge);
for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
if (strstr(c->x86_model_id, tjmax_table[i].id))
return tjmax_table[i].tjmax;
}
for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
const struct tjmax_model *tm = &tjmax_model_table[i];
if (c->x86_model == tm->model &&
(tm->mask == ANY || c->x86_stepping == tm->mask))
return tm->tjmax;
}
/* Early chips have no MSR for TjMax */
if (c->x86_model == 0xf && c->x86_stepping < 4)
usemsr_ee = 0;
if (c->x86_model > 0xe && usemsr_ee) {
u8 platform_id;
/*
* Now we can detect the mobile CPU using Intel provided table
* http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
* For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
*/
err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
if (err) {
dev_warn(dev,
"Unable to access MSR 0x17, assuming desktop"
" CPU\n");
usemsr_ee = 0;
} else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
/*
* Trust bit 28 up to Penryn, I could not find any
* documentation on that; if you happen to know
* someone at Intel please ask
*/
usemsr_ee = 0;
} else {
/* Platform ID bits 52:50 (EDX starts at bit 32) */
platform_id = (edx >> 18) & 0x7;
/*
* Mobile Penryn CPU seems to be platform ID 7 or 5
* (guesswork)
*/
if (c->x86_model == 0x17 &&
(platform_id == 5 || platform_id == 7)) {
/*
* If MSR EE bit is set, set it to 90 degrees C,
* otherwise 105 degrees C
*/
tjmax_ee = 90000;
tjmax = 105000;
}
}
}
if (usemsr_ee) {
err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
if (err) {
dev_warn(dev,
"Unable to access MSR 0xEE, for Tjmax, left"
" at default\n");
} else if (eax & 0x40000000) {
tjmax = tjmax_ee;
}
} else if (tjmax == 100000) {
/*
* If we don't use msr EE it means we are desktop CPU
* (with exeception of Atom)
*/
dev_warn(dev, "Using relative temperature scale!\n");
}
return tjmax;
}
static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
{
u8 model = c->x86_model;
return model > 0xe &&
model != 0x1c &&
model != 0x26 &&
model != 0x27 &&
model != 0x35 &&
model != 0x36;
}
static int get_tjmax(struct temp_data *tdata, struct device *dev)
{
struct cpuinfo_x86 *c = &cpu_data(tdata->cpu);
int err;
u32 eax, edx;
u32 val;
/* use static tjmax once it is set */
if (tdata->tjmax)
return tdata->tjmax;
/*
* A new feature of current Intel(R) processors, the
* IA32_TEMPERATURE_TARGET contains the TjMax value
*/
err = rdmsr_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
if (err) {
if (cpu_has_tjmax(c))
dev_warn(dev, "Unable to read TjMax from CPU %u\n", tdata->cpu);
} else {
val = (eax >> 16) & 0xff;
if (val)
return val * 1000;
}
if (force_tjmax) {
dev_notice(dev, "TjMax forced to %d degrees C by user\n",
force_tjmax);
tdata->tjmax = force_tjmax * 1000;
} else {
/*
* An assumption is made for early CPUs and unreadable MSR.
* NOTE: the calculated value may not be correct.
*/
tdata->tjmax = adjust_tjmax(c, tdata->cpu, dev);
}
return tdata->tjmax;
}
static int get_ttarget(struct temp_data *tdata, struct device *dev)
{
u32 eax, edx;
int tjmax, ttarget_offset, ret;
/*
* ttarget is valid only if tjmax can be retrieved from
* MSR_IA32_TEMPERATURE_TARGET
*/
if (tdata->tjmax)
return -ENODEV;
ret = rdmsr_safe_on_cpu(tdata->cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
if (ret)
return ret;
tjmax = (eax >> 16) & 0xff;
/* Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. */
ttarget_offset = (eax >> 8) & 0xff;
return (tjmax - ttarget_offset) * 1000;
}
/* Keep track of how many zone pointers we allocated in init() */
static int max_zones __read_mostly;
/* Array of zone pointers. Serialized by cpu hotplug lock */
static struct platform_device **zone_devices;
static ssize_t show_label(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct platform_data *pdata = dev_get_drvdata(dev);
struct temp_data *tdata = pdata->core_data[attr->index];
if (tdata->is_pkg_data)
return sprintf(buf, "Package id %u\n", pdata->pkg_id);
return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
}
static ssize_t show_crit_alarm(struct device *dev,
struct device_attribute *devattr, char *buf)
{
u32 eax, edx;
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct platform_data *pdata = dev_get_drvdata(dev);
struct temp_data *tdata = pdata->core_data[attr->index];
mutex_lock(&tdata->update_lock);
rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
mutex_unlock(&tdata->update_lock);
return sprintf(buf, "%d\n", (eax >> 5) & 1);
}
static ssize_t show_tjmax(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct platform_data *pdata = dev_get_drvdata(dev);
struct temp_data *tdata = pdata->core_data[attr->index];
int tjmax;
mutex_lock(&tdata->update_lock);
tjmax = get_tjmax(tdata, dev);
mutex_unlock(&tdata->update_lock);
return sprintf(buf, "%d\n", tjmax);
}
static ssize_t show_ttarget(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct platform_data *pdata = dev_get_drvdata(dev);
struct temp_data *tdata = pdata->core_data[attr->index];
int ttarget;
mutex_lock(&tdata->update_lock);
ttarget = get_ttarget(tdata, dev);
mutex_unlock(&tdata->update_lock);
if (ttarget < 0)
return ttarget;
return sprintf(buf, "%d\n", ttarget);
}
static ssize_t show_temp(struct device *dev,
struct device_attribute *devattr, char *buf)
{
u32 eax, edx;
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct platform_data *pdata = dev_get_drvdata(dev);
struct temp_data *tdata = pdata->core_data[attr->index];
int tjmax;
mutex_lock(&tdata->update_lock);
tjmax = get_tjmax(tdata, dev);
/* Check whether the time interval has elapsed */
if (time_after(jiffies, tdata->last_updated + HZ)) {
rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
/*
* Ignore the valid bit. In all observed cases the register
* value is either low or zero if the valid bit is 0.
* Return it instead of reporting an error which doesn't
* really help at all.
*/
tdata->temp = tjmax - ((eax >> 16) & 0x7f) * 1000;
tdata->last_updated = jiffies;
}
mutex_unlock(&tdata->update_lock);
return sprintf(buf, "%d\n", tdata->temp);
}
static int create_core_attrs(struct temp_data *tdata, struct device *dev,
int attr_no)
{
int i;
static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
struct device_attribute *devattr, char *buf) = {
show_label, show_crit_alarm, show_temp, show_tjmax,
show_ttarget };
static const char *const suffixes[TOTAL_ATTRS] = {
"label", "crit_alarm", "input", "crit", "max"
};
for (i = 0; i < tdata->attr_size; i++) {
snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
"temp%d_%s", attr_no, suffixes[i]);
sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
tdata->sd_attrs[i].dev_attr.attr.mode = 0444;
tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
tdata->sd_attrs[i].index = attr_no;
tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr;
}
tdata->attr_group.attrs = tdata->attrs;
return sysfs_create_group(&dev->kobj, &tdata->attr_group);
}
static int chk_ucode_version(unsigned int cpu)
{
struct cpuinfo_x86 *c = &cpu_data(cpu);
/*
* Check if we have problem with errata AE18 of Core processors:
* Readings might stop update when processor visited too deep sleep,
* fixed for stepping D0 (6EC).
*/
if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) {
pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
return -ENODEV;
}
return 0;
}
static struct platform_device *coretemp_get_pdev(unsigned int cpu)
{
int id = topology_logical_die_id(cpu);
if (id >= 0 && id < max_zones)
return zone_devices[id];
return NULL;
}
static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
{
struct temp_data *tdata;
tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
if (!tdata)
return NULL;
tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
MSR_IA32_THERM_STATUS;
tdata->is_pkg_data = pkg_flag;
tdata->cpu = cpu;
tdata->cpu_core_id = topology_core_id(cpu);
tdata->attr_size = MAX_CORE_ATTRS;
mutex_init(&tdata->update_lock);
return tdata;
}
static int create_core_data(struct platform_device *pdev, unsigned int cpu,
int pkg_flag)
{
struct temp_data *tdata;
struct platform_data *pdata = platform_get_drvdata(pdev);
struct cpuinfo_x86 *c = &cpu_data(cpu);
u32 eax, edx;
int err, index, attr_no;
if (!housekeeping_cpu(cpu, HK_TYPE_MISC))
return 0;
/*
* Find attr number for sysfs:
* We map the attr number to core id of the CPU
* The attr number is always core id + 2
* The Pkgtemp will always show up as temp1_*, if available
*/
if (pkg_flag) {
attr_no = PKG_SYSFS_ATTR_NO;
} else {
index = ida_alloc(&pdata->ida, GFP_KERNEL);
if (index < 0)
return index;
pdata->cpu_map[index] = topology_core_id(cpu);
attr_no = index + BASE_SYSFS_ATTR_NO;
}
if (attr_no > MAX_CORE_DATA - 1) {
err = -ERANGE;
goto ida_free;
}
tdata = init_temp_data(cpu, pkg_flag);
if (!tdata) {
err = -ENOMEM;
goto ida_free;
}
/* Test if we can access the status register */
err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
if (err)
goto exit_free;
/* Make sure tdata->tjmax is a valid indicator for dynamic/static tjmax */
get_tjmax(tdata, &pdev->dev);
/*
* The target temperature is available on older CPUs but not in the
* MSR_IA32_TEMPERATURE_TARGET register. Atoms don't have the register
* at all.
*/
if (c->x86_model > 0xe && c->x86_model != 0x1c)
if (get_ttarget(tdata, &pdev->dev) >= 0)
tdata->attr_size++;
pdata->core_data[attr_no] = tdata;
/* Create sysfs interfaces */
err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no);
if (err)
goto exit_free;
return 0;
exit_free:
pdata->core_data[attr_no] = NULL;
kfree(tdata);
ida_free:
if (!pkg_flag)
ida_free(&pdata->ida, index);
return err;
}
static void
coretemp_add_core(struct platform_device *pdev, unsigned int cpu, int pkg_flag)
{
if (create_core_data(pdev, cpu, pkg_flag))
dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
}
static void coretemp_remove_core(struct platform_data *pdata, int indx)
{
struct temp_data *tdata = pdata->core_data[indx];
/* if we errored on add then this is already gone */
if (!tdata)
return;
/* Remove the sysfs attributes */
sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group);
kfree(pdata->core_data[indx]);
pdata->core_data[indx] = NULL;
if (indx >= BASE_SYSFS_ATTR_NO)
ida_free(&pdata->ida, indx - BASE_SYSFS_ATTR_NO);
}
static int coretemp_device_add(int zoneid)
{
struct platform_device *pdev;
struct platform_data *pdata;
int err;
/* Initialize the per-zone data structures */
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
pdata->pkg_id = zoneid;
ida_init(&pdata->ida);
pdev = platform_device_alloc(DRVNAME, zoneid);
if (!pdev) {
err = -ENOMEM;
goto err_free_pdata;
}
err = platform_device_add(pdev);
if (err)
goto err_put_dev;
platform_set_drvdata(pdev, pdata);
zone_devices[zoneid] = pdev;
return 0;
err_put_dev:
platform_device_put(pdev);
err_free_pdata:
kfree(pdata);
return err;
}
static void coretemp_device_remove(int zoneid)
{
struct platform_device *pdev = zone_devices[zoneid];
struct platform_data *pdata = platform_get_drvdata(pdev);
ida_destroy(&pdata->ida);
kfree(pdata);
platform_device_unregister(pdev);
}
static int coretemp_cpu_online(unsigned int cpu)
{
struct platform_device *pdev = coretemp_get_pdev(cpu);
struct cpuinfo_x86 *c = &cpu_data(cpu);
struct platform_data *pdata;
/*
* Don't execute this on resume as the offline callback did
* not get executed on suspend.
*/
if (cpuhp_tasks_frozen)
return 0;
/*
* CPUID.06H.EAX[0] indicates whether the CPU has thermal
* sensors. We check this bit only, all the early CPUs
* without thermal sensors will be filtered out.
*/
if (!cpu_has(c, X86_FEATURE_DTHERM))
return -ENODEV;
pdata = platform_get_drvdata(pdev);
if (!pdata->hwmon_dev) {
struct device *hwmon;
/* Check the microcode version of the CPU */
if (chk_ucode_version(cpu))
return -EINVAL;
/*
* Alright, we have DTS support.
* We are bringing the _first_ core in this pkg
* online. So, initialize per-pkg data structures and
* then bring this core online.
*/
hwmon = hwmon_device_register_with_groups(&pdev->dev, DRVNAME,
pdata, NULL);
if (IS_ERR(hwmon))
return PTR_ERR(hwmon);
pdata->hwmon_dev = hwmon;
/*
* Check whether pkgtemp support is available.
* If so, add interfaces for pkgtemp.
*/
if (cpu_has(c, X86_FEATURE_PTS))
coretemp_add_core(pdev, cpu, 1);
}
/*
* Check whether a thread sibling is already online. If not add the
* interface for this CPU core.
*/
if (!cpumask_intersects(&pdata->cpumask, topology_sibling_cpumask(cpu)))
coretemp_add_core(pdev, cpu, 0);
cpumask_set_cpu(cpu, &pdata->cpumask);
return 0;
}
static int coretemp_cpu_offline(unsigned int cpu)
{
struct platform_device *pdev = coretemp_get_pdev(cpu);
struct platform_data *pd;
struct temp_data *tdata;
int i, indx = -1, target;
/* No need to tear down any interfaces for suspend */
if (cpuhp_tasks_frozen)
return 0;
/* If the physical CPU device does not exist, just return */
pd = platform_get_drvdata(pdev);
if (!pd->hwmon_dev)
return 0;
for (i = 0; i < NUM_REAL_CORES; i++) {
if (pd->cpu_map[i] == topology_core_id(cpu)) {
indx = i + BASE_SYSFS_ATTR_NO;
break;
}
}
/* Too many cores and this core is not populated, just return */
if (indx < 0)
return 0;
tdata = pd->core_data[indx];
cpumask_clear_cpu(cpu, &pd->cpumask);
/*
* If this is the last thread sibling, remove the CPU core
* interface, If there is still a sibling online, transfer the
* target cpu of that core interface to it.
*/
target = cpumask_any_and(&pd->cpumask, topology_sibling_cpumask(cpu));
if (target >= nr_cpu_ids) {
coretemp_remove_core(pd, indx);
} else if (tdata && tdata->cpu == cpu) {
mutex_lock(&tdata->update_lock);
tdata->cpu = target;
mutex_unlock(&tdata->update_lock);
}
/*
* If all cores in this pkg are offline, remove the interface.
*/
tdata = pd->core_data[PKG_SYSFS_ATTR_NO];
if (cpumask_empty(&pd->cpumask)) {
if (tdata)
coretemp_remove_core(pd, PKG_SYSFS_ATTR_NO);
hwmon_device_unregister(pd->hwmon_dev);
pd->hwmon_dev = NULL;
return 0;
}
/*
* Check whether this core is the target for the package
* interface. We need to assign it to some other cpu.
*/
if (tdata && tdata->cpu == cpu) {
target = cpumask_first(&pd->cpumask);
mutex_lock(&tdata->update_lock);
tdata->cpu = target;
mutex_unlock(&tdata->update_lock);
}
return 0;
}
static const struct x86_cpu_id __initconst coretemp_ids[] = {
X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_DTHERM, NULL),
{}
};
MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
static enum cpuhp_state coretemp_hp_online;
static int __init coretemp_init(void)
{
int i, err;
/*
* CPUID.06H.EAX[0] indicates whether the CPU has thermal
* sensors. We check this bit only, all the early CPUs
* without thermal sensors will be filtered out.
*/
if (!x86_match_cpu(coretemp_ids))
return -ENODEV;
max_zones = topology_max_packages() * topology_max_die_per_package();
zone_devices = kcalloc(max_zones, sizeof(struct platform_device *),
GFP_KERNEL);
if (!zone_devices)
return -ENOMEM;
for (i = 0; i < max_zones; i++) {
err = coretemp_device_add(i);
if (err)
goto outzone;
}
err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "hwmon/coretemp:online",
coretemp_cpu_online, coretemp_cpu_offline);
if (err < 0)
goto outzone;
coretemp_hp_online = err;
return 0;
outzone:
while (i--)
coretemp_device_remove(i);
kfree(zone_devices);
return err;
}
module_init(coretemp_init)
static void __exit coretemp_exit(void)
{
int i;
cpuhp_remove_state(coretemp_hp_online);
for (i = 0; i < max_zones; i++)
coretemp_device_remove(i);
kfree(zone_devices);
}
module_exit(coretemp_exit)
MODULE_AUTHOR("Rudolf Marek <[email protected]>");
MODULE_DESCRIPTION("Intel Core temperature monitor");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/coretemp.c
|
// SPDX-License-Identifier: GPL-2.0-only
/* Hwmon client for industrial I/O devices
*
* Copyright (c) 2011 Jonathan Cameron
*/
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/iio/consumer.h>
#include <linux/iio/types.h>
/**
* struct iio_hwmon_state - device instance state
* @channels: filled with array of channels from iio
* @num_channels: number of channels in channels (saves counting twice)
* @attr_group: the group of attributes
* @groups: null terminated array of attribute groups
* @attrs: null terminated array of attribute pointers.
*/
struct iio_hwmon_state {
struct iio_channel *channels;
int num_channels;
struct attribute_group attr_group;
const struct attribute_group *groups[2];
struct attribute **attrs;
};
/*
* Assumes that IIO and hwmon operate in the same base units.
* This is supposed to be true, but needs verification for
* new channel types.
*/
static ssize_t iio_hwmon_read_val(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int result;
int ret;
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct iio_hwmon_state *state = dev_get_drvdata(dev);
struct iio_channel *chan = &state->channels[sattr->index];
enum iio_chan_type type;
ret = iio_read_channel_processed(chan, &result);
if (ret < 0)
return ret;
ret = iio_get_channel_type(chan, &type);
if (ret < 0)
return ret;
if (type == IIO_POWER)
result *= 1000; /* mili-Watts to micro-Watts conversion */
return sprintf(buf, "%d\n", result);
}
static int iio_hwmon_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct iio_hwmon_state *st;
struct sensor_device_attribute *a;
int ret, i;
int in_i = 1, temp_i = 1, curr_i = 1, humidity_i = 1, power_i = 1;
enum iio_chan_type type;
struct iio_channel *channels;
struct device *hwmon_dev;
char *sname;
channels = devm_iio_channel_get_all(dev);
if (IS_ERR(channels)) {
ret = PTR_ERR(channels);
if (ret == -ENODEV)
ret = -EPROBE_DEFER;
return dev_err_probe(dev, ret,
"Failed to get channels\n");
}
st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
if (st == NULL)
return -ENOMEM;
st->channels = channels;
/* count how many attributes we have */
while (st->channels[st->num_channels].indio_dev)
st->num_channels++;
st->attrs = devm_kcalloc(dev,
st->num_channels + 1, sizeof(*st->attrs),
GFP_KERNEL);
if (st->attrs == NULL)
return -ENOMEM;
for (i = 0; i < st->num_channels; i++) {
const char *prefix;
int n;
a = devm_kzalloc(dev, sizeof(*a), GFP_KERNEL);
if (a == NULL)
return -ENOMEM;
sysfs_attr_init(&a->dev_attr.attr);
ret = iio_get_channel_type(&st->channels[i], &type);
if (ret < 0)
return ret;
switch (type) {
case IIO_VOLTAGE:
n = in_i++;
prefix = "in";
break;
case IIO_TEMP:
n = temp_i++;
prefix = "temp";
break;
case IIO_CURRENT:
n = curr_i++;
prefix = "curr";
break;
case IIO_POWER:
n = power_i++;
prefix = "power";
break;
case IIO_HUMIDITYRELATIVE:
n = humidity_i++;
prefix = "humidity";
break;
default:
return -EINVAL;
}
a->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL,
"%s%d_input",
prefix, n);
if (a->dev_attr.attr.name == NULL)
return -ENOMEM;
a->dev_attr.show = iio_hwmon_read_val;
a->dev_attr.attr.mode = 0444;
a->index = i;
st->attrs[i] = &a->dev_attr.attr;
}
st->attr_group.attrs = st->attrs;
st->groups[0] = &st->attr_group;
if (dev_fwnode(dev)) {
sname = devm_kasprintf(dev, GFP_KERNEL, "%pfwP", dev_fwnode(dev));
if (!sname)
return -ENOMEM;
strreplace(sname, '-', '_');
} else {
sname = "iio_hwmon";
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev, sname, st,
st->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id iio_hwmon_of_match[] = {
{ .compatible = "iio-hwmon", },
{ }
};
MODULE_DEVICE_TABLE(of, iio_hwmon_of_match);
static struct platform_driver iio_hwmon_driver = {
.driver = {
.name = "iio_hwmon",
.of_match_table = iio_hwmon_of_match,
},
.probe = iio_hwmon_probe,
};
module_platform_driver(iio_hwmon_driver);
MODULE_AUTHOR("Jonathan Cameron <[email protected]>");
MODULE_DESCRIPTION("IIO to hwmon driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/iio_hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2011-2012 Hans de Goede <[email protected]> *
* *
***************************************************************************/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include "sch56xx-common.h"
#define DRVNAME "sch5636"
#define DEVNAME "theseus" /* We only support one model for now */
#define SCH5636_REG_FUJITSU_ID 0x780
#define SCH5636_REG_FUJITSU_REV 0x783
#define SCH5636_NO_INS 5
#define SCH5636_NO_TEMPS 16
#define SCH5636_NO_FANS 8
static const u16 SCH5636_REG_IN_VAL[SCH5636_NO_INS] = {
0x22, 0x23, 0x24, 0x25, 0x189 };
static const u16 SCH5636_REG_IN_FACTORS[SCH5636_NO_INS] = {
4400, 1500, 4000, 4400, 16000 };
static const char * const SCH5636_IN_LABELS[SCH5636_NO_INS] = {
"3.3V", "VREF", "VBAT", "3.3AUX", "12V" };
static const u16 SCH5636_REG_TEMP_VAL[SCH5636_NO_TEMPS] = {
0x2B, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x180, 0x181,
0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C };
#define SCH5636_REG_TEMP_CTRL(i) (0x790 + (i))
#define SCH5636_TEMP_WORKING 0x01
#define SCH5636_TEMP_ALARM 0x02
#define SCH5636_TEMP_DEACTIVATED 0x80
static const u16 SCH5636_REG_FAN_VAL[SCH5636_NO_FANS] = {
0x2C, 0x2E, 0x30, 0x32, 0x62, 0x64, 0x66, 0x68 };
#define SCH5636_REG_FAN_CTRL(i) (0x880 + (i))
/* FAULT in datasheet, but acts as an alarm */
#define SCH5636_FAN_ALARM 0x04
#define SCH5636_FAN_NOT_PRESENT 0x08
#define SCH5636_FAN_DEACTIVATED 0x80
struct sch5636_data {
unsigned short addr;
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 in[SCH5636_NO_INS];
u8 temp_val[SCH5636_NO_TEMPS];
u8 temp_ctrl[SCH5636_NO_TEMPS];
u16 fan_val[SCH5636_NO_FANS];
u8 fan_ctrl[SCH5636_NO_FANS];
};
static struct sch5636_data *sch5636_update_device(struct device *dev)
{
struct sch5636_data *data = dev_get_drvdata(dev);
struct sch5636_data *ret = data;
int i, val;
mutex_lock(&data->update_lock);
/* Cache the values for 1 second */
if (data->valid && !time_after(jiffies, data->last_updated + HZ))
goto abort;
for (i = 0; i < SCH5636_NO_INS; i++) {
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_IN_VAL[i]);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->in[i] = val;
}
for (i = 0; i < SCH5636_NO_TEMPS; i++) {
if (data->temp_ctrl[i] & SCH5636_TEMP_DEACTIVATED)
continue;
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_TEMP_VAL[i]);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp_val[i] = val;
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_TEMP_CTRL(i));
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp_ctrl[i] = val;
/* Alarms need to be explicitly write-cleared */
if (val & SCH5636_TEMP_ALARM) {
sch56xx_write_virtual_reg(data->addr,
SCH5636_REG_TEMP_CTRL(i), val);
}
}
for (i = 0; i < SCH5636_NO_FANS; i++) {
if (data->fan_ctrl[i] & SCH5636_FAN_DEACTIVATED)
continue;
val = sch56xx_read_virtual_reg16(data->addr,
SCH5636_REG_FAN_VAL[i]);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->fan_val[i] = val;
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_FAN_CTRL(i));
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->fan_ctrl[i] = val;
/* Alarms need to be explicitly write-cleared */
if (val & SCH5636_FAN_ALARM) {
sch56xx_write_virtual_reg(data->addr,
SCH5636_REG_FAN_CTRL(i), val);
}
}
data->last_updated = jiffies;
data->valid = true;
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static int reg_to_rpm(u16 reg)
{
if (reg == 0)
return -EIO;
if (reg == 0xffff)
return 0;
return 5400540 / reg;
}
static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
return sysfs_emit(buf, "%s\n", DEVNAME);
}
static ssize_t in_value_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct sch5636_data *data = sch5636_update_device(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = DIV_ROUND_CLOSEST(
data->in[attr->index] * SCH5636_REG_IN_FACTORS[attr->index],
255);
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t in_label_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
return sysfs_emit(buf, "%s\n",
SCH5636_IN_LABELS[attr->index]);
}
static ssize_t temp_value_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct sch5636_data *data = sch5636_update_device(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = (data->temp_val[attr->index] - 64) * 1000;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t temp_fault_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct sch5636_data *data = sch5636_update_device(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = (data->temp_ctrl[attr->index] & SCH5636_TEMP_WORKING) ? 0 : 1;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t temp_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct sch5636_data *data = sch5636_update_device(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = (data->temp_ctrl[attr->index] & SCH5636_TEMP_ALARM) ? 1 : 0;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t fan_value_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct sch5636_data *data = sch5636_update_device(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = reg_to_rpm(data->fan_val[attr->index]);
if (val < 0)
return val;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t fan_fault_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct sch5636_data *data = sch5636_update_device(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = (data->fan_ctrl[attr->index] & SCH5636_FAN_NOT_PRESENT) ? 1 : 0;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t fan_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct sch5636_data *data = sch5636_update_device(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = (data->fan_ctrl[attr->index] & SCH5636_FAN_ALARM) ? 1 : 0;
return sysfs_emit(buf, "%d\n", val);
}
static struct sensor_device_attribute sch5636_attr[] = {
SENSOR_ATTR_RO(name, name, 0),
SENSOR_ATTR_RO(in0_input, in_value, 0),
SENSOR_ATTR_RO(in0_label, in_label, 0),
SENSOR_ATTR_RO(in1_input, in_value, 1),
SENSOR_ATTR_RO(in1_label, in_label, 1),
SENSOR_ATTR_RO(in2_input, in_value, 2),
SENSOR_ATTR_RO(in2_label, in_label, 2),
SENSOR_ATTR_RO(in3_input, in_value, 3),
SENSOR_ATTR_RO(in3_label, in_label, 3),
SENSOR_ATTR_RO(in4_input, in_value, 4),
SENSOR_ATTR_RO(in4_label, in_label, 4),
};
static struct sensor_device_attribute sch5636_temp_attr[] = {
SENSOR_ATTR_RO(temp1_input, temp_value, 0),
SENSOR_ATTR_RO(temp1_fault, temp_fault, 0),
SENSOR_ATTR_RO(temp1_alarm, temp_alarm, 0),
SENSOR_ATTR_RO(temp2_input, temp_value, 1),
SENSOR_ATTR_RO(temp2_fault, temp_fault, 1),
SENSOR_ATTR_RO(temp2_alarm, temp_alarm, 1),
SENSOR_ATTR_RO(temp3_input, temp_value, 2),
SENSOR_ATTR_RO(temp3_fault, temp_fault, 2),
SENSOR_ATTR_RO(temp3_alarm, temp_alarm, 2),
SENSOR_ATTR_RO(temp4_input, temp_value, 3),
SENSOR_ATTR_RO(temp4_fault, temp_fault, 3),
SENSOR_ATTR_RO(temp4_alarm, temp_alarm, 3),
SENSOR_ATTR_RO(temp5_input, temp_value, 4),
SENSOR_ATTR_RO(temp5_fault, temp_fault, 4),
SENSOR_ATTR_RO(temp5_alarm, temp_alarm, 4),
SENSOR_ATTR_RO(temp6_input, temp_value, 5),
SENSOR_ATTR_RO(temp6_fault, temp_fault, 5),
SENSOR_ATTR_RO(temp6_alarm, temp_alarm, 5),
SENSOR_ATTR_RO(temp7_input, temp_value, 6),
SENSOR_ATTR_RO(temp7_fault, temp_fault, 6),
SENSOR_ATTR_RO(temp7_alarm, temp_alarm, 6),
SENSOR_ATTR_RO(temp8_input, temp_value, 7),
SENSOR_ATTR_RO(temp8_fault, temp_fault, 7),
SENSOR_ATTR_RO(temp8_alarm, temp_alarm, 7),
SENSOR_ATTR_RO(temp9_input, temp_value, 8),
SENSOR_ATTR_RO(temp9_fault, temp_fault, 8),
SENSOR_ATTR_RO(temp9_alarm, temp_alarm, 8),
SENSOR_ATTR_RO(temp10_input, temp_value, 9),
SENSOR_ATTR_RO(temp10_fault, temp_fault, 9),
SENSOR_ATTR_RO(temp10_alarm, temp_alarm, 9),
SENSOR_ATTR_RO(temp11_input, temp_value, 10),
SENSOR_ATTR_RO(temp11_fault, temp_fault, 10),
SENSOR_ATTR_RO(temp11_alarm, temp_alarm, 10),
SENSOR_ATTR_RO(temp12_input, temp_value, 11),
SENSOR_ATTR_RO(temp12_fault, temp_fault, 11),
SENSOR_ATTR_RO(temp12_alarm, temp_alarm, 11),
SENSOR_ATTR_RO(temp13_input, temp_value, 12),
SENSOR_ATTR_RO(temp13_fault, temp_fault, 12),
SENSOR_ATTR_RO(temp13_alarm, temp_alarm, 12),
SENSOR_ATTR_RO(temp14_input, temp_value, 13),
SENSOR_ATTR_RO(temp14_fault, temp_fault, 13),
SENSOR_ATTR_RO(temp14_alarm, temp_alarm, 13),
SENSOR_ATTR_RO(temp15_input, temp_value, 14),
SENSOR_ATTR_RO(temp15_fault, temp_fault, 14),
SENSOR_ATTR_RO(temp15_alarm, temp_alarm, 14),
SENSOR_ATTR_RO(temp16_input, temp_value, 15),
SENSOR_ATTR_RO(temp16_fault, temp_fault, 15),
SENSOR_ATTR_RO(temp16_alarm, temp_alarm, 15),
};
static struct sensor_device_attribute sch5636_fan_attr[] = {
SENSOR_ATTR_RO(fan1_input, fan_value, 0),
SENSOR_ATTR_RO(fan1_fault, fan_fault, 0),
SENSOR_ATTR_RO(fan1_alarm, fan_alarm, 0),
SENSOR_ATTR_RO(fan2_input, fan_value, 1),
SENSOR_ATTR_RO(fan2_fault, fan_fault, 1),
SENSOR_ATTR_RO(fan2_alarm, fan_alarm, 1),
SENSOR_ATTR_RO(fan3_input, fan_value, 2),
SENSOR_ATTR_RO(fan3_fault, fan_fault, 2),
SENSOR_ATTR_RO(fan3_alarm, fan_alarm, 2),
SENSOR_ATTR_RO(fan4_input, fan_value, 3),
SENSOR_ATTR_RO(fan4_fault, fan_fault, 3),
SENSOR_ATTR_RO(fan4_alarm, fan_alarm, 3),
SENSOR_ATTR_RO(fan5_input, fan_value, 4),
SENSOR_ATTR_RO(fan5_fault, fan_fault, 4),
SENSOR_ATTR_RO(fan5_alarm, fan_alarm, 4),
SENSOR_ATTR_RO(fan6_input, fan_value, 5),
SENSOR_ATTR_RO(fan6_fault, fan_fault, 5),
SENSOR_ATTR_RO(fan6_alarm, fan_alarm, 5),
SENSOR_ATTR_RO(fan7_input, fan_value, 6),
SENSOR_ATTR_RO(fan7_fault, fan_fault, 6),
SENSOR_ATTR_RO(fan7_alarm, fan_alarm, 6),
SENSOR_ATTR_RO(fan8_input, fan_value, 7),
SENSOR_ATTR_RO(fan8_fault, fan_fault, 7),
SENSOR_ATTR_RO(fan8_alarm, fan_alarm, 7),
};
static int sch5636_remove(struct platform_device *pdev)
{
struct sch5636_data *data = platform_get_drvdata(pdev);
int i;
if (data->hwmon_dev)
hwmon_device_unregister(data->hwmon_dev);
for (i = 0; i < ARRAY_SIZE(sch5636_attr); i++)
device_remove_file(&pdev->dev, &sch5636_attr[i].dev_attr);
for (i = 0; i < SCH5636_NO_TEMPS * 3; i++)
device_remove_file(&pdev->dev,
&sch5636_temp_attr[i].dev_attr);
for (i = 0; i < SCH5636_NO_FANS * 3; i++)
device_remove_file(&pdev->dev,
&sch5636_fan_attr[i].dev_attr);
return 0;
}
static int sch5636_probe(struct platform_device *pdev)
{
struct sch5636_data *data;
int i, err, val, revision[2];
char id[4];
data = devm_kzalloc(&pdev->dev, sizeof(struct sch5636_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
for (i = 0; i < 3; i++) {
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_FUJITSU_ID + i);
if (val < 0) {
pr_err("Could not read Fujitsu id byte at %#x\n",
SCH5636_REG_FUJITSU_ID + i);
err = val;
goto error;
}
id[i] = val;
}
id[i] = '\0';
if (strcmp(id, "THS")) {
pr_err("Unknown Fujitsu id: %02x%02x%02x\n",
id[0], id[1], id[2]);
err = -ENODEV;
goto error;
}
for (i = 0; i < 2; i++) {
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_FUJITSU_REV + i);
if (val < 0) {
err = val;
goto error;
}
revision[i] = val;
}
pr_info("Found %s chip at %#hx, revision: %d.%02d\n", DEVNAME,
data->addr, revision[0], revision[1]);
/* Read all temp + fan ctrl registers to determine which are active */
for (i = 0; i < SCH5636_NO_TEMPS; i++) {
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_TEMP_CTRL(i));
if (unlikely(val < 0)) {
err = val;
goto error;
}
data->temp_ctrl[i] = val;
}
for (i = 0; i < SCH5636_NO_FANS; i++) {
val = sch56xx_read_virtual_reg(data->addr,
SCH5636_REG_FAN_CTRL(i));
if (unlikely(val < 0)) {
err = val;
goto error;
}
data->fan_ctrl[i] = val;
}
for (i = 0; i < ARRAY_SIZE(sch5636_attr); i++) {
err = device_create_file(&pdev->dev,
&sch5636_attr[i].dev_attr);
if (err)
goto error;
}
for (i = 0; i < (SCH5636_NO_TEMPS * 3); i++) {
if (data->temp_ctrl[i/3] & SCH5636_TEMP_DEACTIVATED)
continue;
err = device_create_file(&pdev->dev,
&sch5636_temp_attr[i].dev_attr);
if (err)
goto error;
}
for (i = 0; i < (SCH5636_NO_FANS * 3); i++) {
if (data->fan_ctrl[i/3] & SCH5636_FAN_DEACTIVATED)
continue;
err = device_create_file(&pdev->dev,
&sch5636_fan_attr[i].dev_attr);
if (err)
goto error;
}
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
data->hwmon_dev = NULL;
goto error;
}
/* Note failing to register the watchdog is not a fatal error */
sch56xx_watchdog_register(&pdev->dev, data->addr, (revision[0] << 8) | revision[1],
&data->update_lock, 0);
return 0;
error:
sch5636_remove(pdev);
return err;
}
static const struct platform_device_id sch5636_device_id[] = {
{
.name = "sch5636",
},
{ }
};
MODULE_DEVICE_TABLE(platform, sch5636_device_id);
static struct platform_driver sch5636_driver = {
.driver = {
.name = DRVNAME,
},
.probe = sch5636_probe,
.remove = sch5636_remove,
.id_table = sch5636_device_id,
};
module_platform_driver(sch5636_driver);
MODULE_DESCRIPTION("SMSC SCH5636 Hardware Monitoring Driver");
MODULE_AUTHOR("Hans de Goede <[email protected]>");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/sch5636.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* w83793.c - Linux kernel driver for hardware monitoring
* Copyright (C) 2006 Winbond Electronics Corp.
* Yuan Mu
* Rudolf Marek <[email protected]>
* Copyright (C) 2009-2010 Sven Anders <[email protected]>, ANDURAS AG.
* Watchdog driver part
* (Based partially on fschmd driver,
* Copyright 2007-2008 by Hans de Goede)
*/
/*
* Supports following chips:
*
* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83793 10 12 8 6 0x7b 0x5ca3 yes no
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-vid.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/fs.h>
#include <linux/watchdog.h>
#include <linux/miscdevice.h>
#include <linux/uaccess.h>
#include <linux/kref.h>
#include <linux/notifier.h>
#include <linux/reboot.h>
#include <linux/jiffies.h>
/* Default values */
#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
I2C_CLIENT_END };
/* Insmod parameters */
static unsigned short force_subclients[4];
module_param_array(force_subclients, short, NULL, 0);
MODULE_PARM_DESC(force_subclients,
"List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
static bool reset;
module_param(reset, bool, 0);
MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout,
"Watchdog timeout in minutes. 2<= timeout <=255 (default="
__MODULE_STRING(WATCHDOG_TIMEOUT) ")");
static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
"Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
/*
* Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
* as ID, Bank Select registers
*/
#define W83793_REG_BANKSEL 0x00
#define W83793_REG_VENDORID 0x0d
#define W83793_REG_CHIPID 0x0e
#define W83793_REG_DEVICEID 0x0f
#define W83793_REG_CONFIG 0x40
#define W83793_REG_MFC 0x58
#define W83793_REG_FANIN_CTRL 0x5c
#define W83793_REG_FANIN_SEL 0x5d
#define W83793_REG_I2C_ADDR 0x0b
#define W83793_REG_I2C_SUBADDR 0x0c
#define W83793_REG_VID_INA 0x05
#define W83793_REG_VID_INB 0x06
#define W83793_REG_VID_LATCHA 0x07
#define W83793_REG_VID_LATCHB 0x08
#define W83793_REG_VID_CTRL 0x59
#define W83793_REG_WDT_LOCK 0x01
#define W83793_REG_WDT_ENABLE 0x02
#define W83793_REG_WDT_STATUS 0x03
#define W83793_REG_WDT_TIMEOUT 0x04
static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
#define TEMP_READ 0
#define TEMP_CRIT 1
#define TEMP_CRIT_HYST 2
#define TEMP_WARN 3
#define TEMP_WARN_HYST 4
/*
* only crit and crit_hyst affect real-time alarm status
* current crit crit_hyst warn warn_hyst
*/
static u16 W83793_REG_TEMP[][5] = {
{0x1c, 0x78, 0x79, 0x7a, 0x7b},
{0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
{0x1e, 0x80, 0x81, 0x82, 0x83},
{0x1f, 0x84, 0x85, 0x86, 0x87},
{0x20, 0x88, 0x89, 0x8a, 0x8b},
{0x21, 0x8c, 0x8d, 0x8e, 0x8f},
};
#define W83793_REG_TEMP_LOW_BITS 0x22
#define W83793_REG_BEEP(index) (0x53 + (index))
#define W83793_REG_ALARM(index) (0x4b + (index))
#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
#define W83793_REG_IRQ_CTRL 0x50
#define W83793_REG_OVT_CTRL 0x51
#define W83793_REG_OVT_BEEP 0x52
#define IN_READ 0
#define IN_MAX 1
#define IN_LOW 2
static const u16 W83793_REG_IN[][3] = {
/* Current, High, Low */
{0x10, 0x60, 0x61}, /* Vcore A */
{0x11, 0x62, 0x63}, /* Vcore B */
{0x12, 0x64, 0x65}, /* Vtt */
{0x14, 0x6a, 0x6b}, /* VSEN1 */
{0x15, 0x6c, 0x6d}, /* VSEN2 */
{0x16, 0x6e, 0x6f}, /* +3VSEN */
{0x17, 0x70, 0x71}, /* +12VSEN */
{0x18, 0x72, 0x73}, /* 5VDD */
{0x19, 0x74, 0x75}, /* 5VSB */
{0x1a, 0x76, 0x77}, /* VBAT */
};
/* Low Bits of Vcore A/B Vtt Read/High/Low */
static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
#define W83793_REG_PWM_DEFAULT 0xb2
#define W83793_REG_PWM_ENABLE 0x207
#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
#define W83793_REG_TEMP_CRITICAL 0xc5
#define PWM_DUTY 0
#define PWM_START 1
#define PWM_NONSTOP 2
#define PWM_STOP_TIME 3
#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
(nr) == 1 ? 0x220 : 0x218) + (index))
/* bit field, fan1 is bit0, fan2 is bit1 ... */
#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
static inline unsigned long FAN_FROM_REG(u16 val)
{
if ((val >= 0xfff) || (val == 0))
return 0;
return 1350000UL / val;
}
static inline u16 FAN_TO_REG(long rpm)
{
if (rpm <= 0)
return 0x0fff;
return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
}
static inline unsigned long TIME_FROM_REG(u8 reg)
{
return reg * 100;
}
static inline u8 TIME_TO_REG(unsigned long val)
{
return clamp_val((val + 50) / 100, 0, 0xff);
}
static inline long TEMP_FROM_REG(s8 reg)
{
return reg * 1000;
}
static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
{
return clamp_val((val + (val < 0 ? -500 : 500)) / 1000, min, max);
}
struct w83793_data {
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
unsigned long last_nonvolatile; /* In jiffies, last time we update the
* nonvolatile registers
*/
u8 bank;
u8 vrm;
u8 vid[2];
u8 in[10][3]; /* Register value, read/high/low */
u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
u16 has_fan; /* Only fan1- fan5 has own pins */
u16 fan[12]; /* Register value combine */
u16 fan_min[12]; /* Register value combine */
s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
u8 temp_low_bits; /* Additional resolution TD1-TD4 */
u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
* byte 1: Temp R1,R2 mode, each has 1 bit
*/
u8 temp_critical; /* If reached all fan will be at full speed */
u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
u8 has_pwm;
u8 has_temp;
u8 has_vid;
u8 pwm_enable; /* Register value, each Temp has 1 bit */
u8 pwm_uptime; /* Register value */
u8 pwm_downtime; /* Register value */
u8 pwm_default; /* All fan default pwm, next poweron valid */
u8 pwm[8][3]; /* Register value */
u8 pwm_stop_time[8];
u8 temp_cruise[6];
u8 alarms[5]; /* realtime status registers */
u8 beeps[5];
u8 beep_enable;
u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
/* watchdog */
struct i2c_client *client;
struct mutex watchdog_lock;
struct list_head list; /* member of the watchdog_data_list */
struct kref kref;
struct miscdevice watchdog_miscdev;
unsigned long watchdog_is_open;
char watchdog_expect_close;
char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
unsigned int watchdog_caused_reboot;
int watchdog_timeout; /* watchdog timeout in minutes */
};
/*
* Somewhat ugly :( global data pointer list with all devices, so that
* we can find our device data as when using misc_register. There is no
* other method to get to one's device data from the open file-op and
* for usage in the reboot notifier callback.
*/
static LIST_HEAD(watchdog_data_list);
/* Note this lock not only protect list access, but also data.kref access */
static DEFINE_MUTEX(watchdog_data_mutex);
/*
* Release our data struct when we're detached from the i2c client *and* all
* references to our watchdog device are released
*/
static void w83793_release_resources(struct kref *ref)
{
struct w83793_data *data = container_of(ref, struct w83793_data, kref);
kfree(data);
}
static u8 w83793_read_value(struct i2c_client *client, u16 reg);
static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
static int w83793_probe(struct i2c_client *client);
static int w83793_detect(struct i2c_client *client,
struct i2c_board_info *info);
static void w83793_remove(struct i2c_client *client);
static void w83793_init_client(struct i2c_client *client);
static void w83793_update_nonvolatile(struct device *dev);
static struct w83793_data *w83793_update_device(struct device *dev);
static const struct i2c_device_id w83793_id[] = {
{ "w83793", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, w83793_id);
static struct i2c_driver w83793_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "w83793",
},
.probe = w83793_probe,
.remove = w83793_remove,
.id_table = w83793_id,
.detect = w83793_detect,
.address_list = normal_i2c,
};
static ssize_t
vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83793_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t
show_vid(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83793_data *data = w83793_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
}
static ssize_t
vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct w83793_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
#define ALARM_STATUS 0
#define BEEP_ENABLE 1
static ssize_t
show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83793_data *data = w83793_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index >> 3;
int bit = sensor_attr->index & 0x07;
u8 val;
if (nr == ALARM_STATUS) {
val = (data->alarms[index] >> (bit)) & 1;
} else { /* BEEP_ENABLE */
val = (data->beeps[index] >> (bit)) & 1;
}
return sprintf(buf, "%u\n", val);
}
static ssize_t
store_beep(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index >> 3;
int shift = sensor_attr->index & 0x07;
u8 beep_bit = 1 << shift;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
data->beeps[index] &= ~beep_bit;
data->beeps[index] |= val << shift;
w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83793_data *data = w83793_update_device(dev);
return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
}
static ssize_t
store_beep_enable(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
& 0xfd;
data->beep_enable |= val << 1;
w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
mutex_unlock(&data->update_lock);
return count;
}
/* Write 0 to clear chassis alarm */
static ssize_t
store_chassis_clear(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
unsigned long val;
u8 reg;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val)
return -EINVAL;
mutex_lock(&data->update_lock);
reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80);
data->valid = false; /* Force cache refresh */
mutex_unlock(&data->update_lock);
return count;
}
#define FAN_INPUT 0
#define FAN_MIN 1
static ssize_t
show_fan(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83793_data *data = w83793_update_device(dev);
u16 val;
if (nr == FAN_INPUT)
val = data->fan[index] & 0x0fff;
else
val = data->fan_min[index] & 0x0fff;
return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
}
static ssize_t
store_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
val = FAN_TO_REG(val);
mutex_lock(&data->update_lock);
data->fan_min[index] = val;
w83793_write_value(client, W83793_REG_FAN_MIN(index),
(val >> 8) & 0xff);
w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
struct w83793_data *data = w83793_update_device(dev);
u16 val;
int nr = sensor_attr->nr;
int index = sensor_attr->index;
if (nr == PWM_STOP_TIME)
val = TIME_FROM_REG(data->pwm_stop_time[index]);
else
val = (data->pwm[index][nr] & 0x3f) << 2;
return sprintf(buf, "%d\n", val);
}
static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (nr == PWM_STOP_TIME) {
val = TIME_TO_REG(val);
data->pwm_stop_time[index] = val;
w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
val);
} else {
val = clamp_val(val, 0, 0xff) >> 2;
data->pwm[index][nr] =
w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
data->pwm[index][nr] |= val;
w83793_write_value(client, W83793_REG_PWM(index, nr),
data->pwm[index][nr]);
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83793_data *data = w83793_update_device(dev);
long temp = TEMP_FROM_REG(data->temp[index][nr]);
if (nr == TEMP_READ && index < 4) { /* Only TD1-TD4 have low bits */
int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
temp += temp > 0 ? low : -low;
}
return sprintf(buf, "%ld\n", temp);
}
static ssize_t
store_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
long tmp;
int err;
err = kstrtol(buf, 10, &tmp);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
w83793_write_value(client, W83793_REG_TEMP[index][nr],
data->temp[index][nr]);
mutex_unlock(&data->update_lock);
return count;
}
/*
* TD1-TD4
* each has 4 mode:(2 bits)
* 0: Stop monitor
* 1: Use internal temp sensor(default)
* 2: Reserved
* 3: Use sensor in Intel CPU and get result by PECI
*
* TR1-TR2
* each has 2 mode:(1 bit)
* 0: Disable temp sensor monitor
* 1: To enable temp sensors monitor
*/
/* 0 disable, 6 PECI */
static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
static ssize_t
show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83793_data *data = w83793_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
u8 mask = (index < 4) ? 0x03 : 0x01;
u8 shift = (index < 4) ? (2 * index) : (index - 4);
u8 tmp;
index = (index < 4) ? 0 : 1;
tmp = (data->temp_mode[index] >> shift) & mask;
/* for the internal sensor, found out if diode or thermistor */
if (tmp == 1)
tmp = index == 0 ? 3 : 4;
else
tmp = TO_TEMP_MODE[tmp];
return sprintf(buf, "%d\n", tmp);
}
static ssize_t
store_temp_mode(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
u8 mask = (index < 4) ? 0x03 : 0x01;
u8 shift = (index < 4) ? (2 * index) : (index - 4);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
/* transform the sysfs interface values into table above */
if ((val == 6) && (index < 4)) {
val -= 3;
} else if ((val == 3 && index < 4)
|| (val == 4 && index >= 4)) {
/* transform diode or thermistor into internal enable */
val = !!val;
} else {
return -EINVAL;
}
index = (index < 4) ? 0 : 1;
mutex_lock(&data->update_lock);
data->temp_mode[index] =
w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
data->temp_mode[index] &= ~(mask << shift);
data->temp_mode[index] |= val << shift;
w83793_write_value(client, W83793_REG_TEMP_MODE[index],
data->temp_mode[index]);
mutex_unlock(&data->update_lock);
return count;
}
#define SETUP_PWM_DEFAULT 0
#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
#define SETUP_TEMP_CRITICAL 3
static ssize_t
show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
struct w83793_data *data = w83793_update_device(dev);
u32 val = 0;
if (nr == SETUP_PWM_DEFAULT)
val = (data->pwm_default & 0x3f) << 2;
else if (nr == SETUP_PWM_UPTIME)
val = TIME_FROM_REG(data->pwm_uptime);
else if (nr == SETUP_PWM_DOWNTIME)
val = TIME_FROM_REG(data->pwm_downtime);
else if (nr == SETUP_TEMP_CRITICAL)
val = TEMP_FROM_REG(data->temp_critical & 0x7f);
return sprintf(buf, "%d\n", val);
}
static ssize_t
store_sf_setup(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (nr == SETUP_PWM_DEFAULT) {
data->pwm_default =
w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
data->pwm_default |= clamp_val(val, 0, 0xff) >> 2;
w83793_write_value(client, W83793_REG_PWM_DEFAULT,
data->pwm_default);
} else if (nr == SETUP_PWM_UPTIME) {
data->pwm_uptime = TIME_TO_REG(val);
data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
w83793_write_value(client, W83793_REG_PWM_UPTIME,
data->pwm_uptime);
} else if (nr == SETUP_PWM_DOWNTIME) {
data->pwm_downtime = TIME_TO_REG(val);
data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
data->pwm_downtime);
} else { /* SETUP_TEMP_CRITICAL */
data->temp_critical =
w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
data->temp_critical |= TEMP_TO_REG(val, 0, 0x7f);
w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
data->temp_critical);
}
mutex_unlock(&data->update_lock);
return count;
}
/*
* Temp SmartFan control
* TEMP_FAN_MAP
* Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
* It's possible two or more temp channels control the same fan, w83793
* always prefers to pick the most critical request and applies it to
* the related Fan.
* It's possible one fan is not in any mapping of 6 temp channels, this
* means the fan is manual mode
*
* TEMP_PWM_ENABLE
* Each temp channel has its own SmartFan mode, and temp channel
* control fans that are set by TEMP_FAN_MAP
* 0: SmartFanII mode
* 1: Thermal Cruise Mode
*
* TEMP_CRUISE
* Target temperature in thermal cruise mode, w83793 will try to turn
* fan speed to keep the temperature of target device around this
* temperature.
*
* TEMP_TOLERANCE
* If Temp higher or lower than target with this tolerance, w83793
* will take actions to speed up or slow down the fan to keep the
* temperature within the tolerance range.
*/
#define TEMP_FAN_MAP 0
#define TEMP_PWM_ENABLE 1
#define TEMP_CRUISE 2
#define TEMP_TOLERANCE 3
static ssize_t
show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83793_data *data = w83793_update_device(dev);
u32 val;
if (nr == TEMP_FAN_MAP) {
val = data->temp_fan_map[index];
} else if (nr == TEMP_PWM_ENABLE) {
/* +2 to transform into 2 and 3 to conform with sysfs intf */
val = ((data->pwm_enable >> index) & 0x01) + 2;
} else if (nr == TEMP_CRUISE) {
val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
} else { /* TEMP_TOLERANCE */
val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
val = TEMP_FROM_REG(val & 0x0f);
}
return sprintf(buf, "%d\n", val);
}
static ssize_t
store_sf_ctrl(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (nr == TEMP_FAN_MAP) {
val = clamp_val(val, 0, 255);
w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
data->temp_fan_map[index] = val;
} else if (nr == TEMP_PWM_ENABLE) {
if (val == 2 || val == 3) {
data->pwm_enable =
w83793_read_value(client, W83793_REG_PWM_ENABLE);
if (val - 2)
data->pwm_enable |= 1 << index;
else
data->pwm_enable &= ~(1 << index);
w83793_write_value(client, W83793_REG_PWM_ENABLE,
data->pwm_enable);
} else {
mutex_unlock(&data->update_lock);
return -EINVAL;
}
} else if (nr == TEMP_CRUISE) {
data->temp_cruise[index] =
w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
data->temp_cruise[index] &= 0x80;
data->temp_cruise[index] |= TEMP_TO_REG(val, 0, 0x7f);
w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
data->temp_cruise[index]);
} else { /* TEMP_TOLERANCE */
int i = index >> 1;
u8 shift = (index & 0x01) ? 4 : 0;
data->tolerance[i] =
w83793_read_value(client, W83793_REG_TEMP_TOL(i));
data->tolerance[i] &= ~(0x0f << shift);
data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift;
w83793_write_value(client, W83793_REG_TEMP_TOL(i),
data->tolerance[i]);
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83793_data *data = w83793_update_device(dev);
return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
}
static ssize_t
store_sf2_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, 0, 0xff) >> 2;
mutex_lock(&data->update_lock);
data->sf2_pwm[index][nr] =
w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
data->sf2_pwm[index][nr] |= val;
w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
data->sf2_pwm[index][nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83793_data *data = w83793_update_device(dev);
return sprintf(buf, "%ld\n",
TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
}
static ssize_t
store_sf2_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val = TEMP_TO_REG(val, 0, 0x7f);
mutex_lock(&data->update_lock);
data->sf2_temp[index][nr] =
w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
data->sf2_temp[index][nr] |= val;
w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
data->sf2_temp[index][nr]);
mutex_unlock(&data->update_lock);
return count;
}
/* only Vcore A/B and Vtt have additional 2 bits precision */
static ssize_t
show_in(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83793_data *data = w83793_update_device(dev);
u16 val = data->in[index][nr];
if (index < 3) {
val <<= 2;
val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
}
/* voltage inputs 5VDD and 5VSB needs 150mV offset */
val = val * scale_in[index] + scale_in_add[index];
return sprintf(buf, "%d\n", val);
}
static ssize_t
store_in(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
val = (val + scale_in[index] / 2) / scale_in[index];
mutex_lock(&data->update_lock);
if (index > 2) {
/* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
if (nr == 1 || nr == 2)
val -= scale_in_add[index] / scale_in[index];
val = clamp_val(val, 0, 255);
} else {
val = clamp_val(val, 0, 0x3FF);
data->in_low_bits[nr] =
w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
data->in_low_bits[nr] &= ~(0x03 << (2 * index));
data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
data->in_low_bits[nr]);
val >>= 2;
}
data->in[index][nr] = val;
w83793_write_value(client, W83793_REG_IN[index][nr],
data->in[index][nr]);
mutex_unlock(&data->update_lock);
return count;
}
#define NOT_USED -1
#define SENSOR_ATTR_IN(index) \
SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
IN_READ, index), \
SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
store_in, IN_MAX, index), \
SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
store_in, IN_LOW, index), \
SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
show_alarm_beep, store_beep, BEEP_ENABLE, \
index + ((index > 2) ? 1 : 0))
#define SENSOR_ATTR_FAN(index) \
SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
NULL, ALARM_STATUS, index + 17), \
SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
NULL, FAN_INPUT, index - 1), \
SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
show_fan, store_fan_min, FAN_MIN, index - 1)
#define SENSOR_ATTR_PWM(index) \
SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
store_pwm, PWM_DUTY, index - 1), \
SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
show_pwm, store_pwm, PWM_START, index - 1), \
SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
#define SENSOR_ATTR_TEMP(index) \
SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
NULL, TEMP_READ, index - 1), \
SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
store_temp, TEMP_CRIT, index - 1), \
SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
store_temp, TEMP_WARN, index - 1), \
SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
TEMP_FAN_MAP, index - 1), \
SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
index - 1), \
SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
show_sf2_temp, store_sf2_temp, 0, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
show_sf2_temp, store_sf2_temp, 1, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
show_sf2_temp, store_sf2_temp, 2, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
show_sf2_temp, store_sf2_temp, 3, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
show_sf2_temp, store_sf2_temp, 4, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
show_sf2_temp, store_sf2_temp, 5, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
show_sf2_temp, store_sf2_temp, 6, index - 1)
static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
SENSOR_ATTR_IN(0),
SENSOR_ATTR_IN(1),
SENSOR_ATTR_IN(2),
SENSOR_ATTR_IN(3),
SENSOR_ATTR_IN(4),
SENSOR_ATTR_IN(5),
SENSOR_ATTR_IN(6),
SENSOR_ATTR_IN(7),
SENSOR_ATTR_IN(8),
SENSOR_ATTR_IN(9),
SENSOR_ATTR_FAN(1),
SENSOR_ATTR_FAN(2),
SENSOR_ATTR_FAN(3),
SENSOR_ATTR_FAN(4),
SENSOR_ATTR_FAN(5),
SENSOR_ATTR_PWM(1),
SENSOR_ATTR_PWM(2),
SENSOR_ATTR_PWM(3),
};
static struct sensor_device_attribute_2 w83793_temp[] = {
SENSOR_ATTR_TEMP(1),
SENSOR_ATTR_TEMP(2),
SENSOR_ATTR_TEMP(3),
SENSOR_ATTR_TEMP(4),
SENSOR_ATTR_TEMP(5),
SENSOR_ATTR_TEMP(6),
};
/* Fan6-Fan12 */
static struct sensor_device_attribute_2 w83793_left_fan[] = {
SENSOR_ATTR_FAN(6),
SENSOR_ATTR_FAN(7),
SENSOR_ATTR_FAN(8),
SENSOR_ATTR_FAN(9),
SENSOR_ATTR_FAN(10),
SENSOR_ATTR_FAN(11),
SENSOR_ATTR_FAN(12),
};
/* Pwm4-Pwm8 */
static struct sensor_device_attribute_2 w83793_left_pwm[] = {
SENSOR_ATTR_PWM(4),
SENSOR_ATTR_PWM(5),
SENSOR_ATTR_PWM(6),
SENSOR_ATTR_PWM(7),
SENSOR_ATTR_PWM(8),
};
static struct sensor_device_attribute_2 w83793_vid[] = {
SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
};
static DEVICE_ATTR_RW(vrm);
static struct sensor_device_attribute_2 sda_single_files[] = {
SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
store_chassis_clear, ALARM_STATUS, 30),
SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
store_beep_enable, NOT_USED, NOT_USED),
SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
};
static void w83793_init_client(struct i2c_client *client)
{
if (reset)
w83793_write_value(client, W83793_REG_CONFIG, 0x80);
/* Start monitoring */
w83793_write_value(client, W83793_REG_CONFIG,
w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
}
/*
* Watchdog routines
*/
static int watchdog_set_timeout(struct w83793_data *data, int timeout)
{
unsigned int mtimeout;
int ret;
mtimeout = DIV_ROUND_UP(timeout, 60);
if (mtimeout > 255)
return -EINVAL;
mutex_lock(&data->watchdog_lock);
if (!data->client) {
ret = -ENODEV;
goto leave;
}
data->watchdog_timeout = mtimeout;
/* Set Timeout value (in Minutes) */
w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
data->watchdog_timeout);
ret = mtimeout * 60;
leave:
mutex_unlock(&data->watchdog_lock);
return ret;
}
static int watchdog_get_timeout(struct w83793_data *data)
{
int timeout;
mutex_lock(&data->watchdog_lock);
timeout = data->watchdog_timeout * 60;
mutex_unlock(&data->watchdog_lock);
return timeout;
}
static int watchdog_trigger(struct w83793_data *data)
{
int ret = 0;
mutex_lock(&data->watchdog_lock);
if (!data->client) {
ret = -ENODEV;
goto leave;
}
/* Set Timeout value (in Minutes) */
w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
data->watchdog_timeout);
leave:
mutex_unlock(&data->watchdog_lock);
return ret;
}
static int watchdog_enable(struct w83793_data *data)
{
int ret = 0;
mutex_lock(&data->watchdog_lock);
if (!data->client) {
ret = -ENODEV;
goto leave;
}
/* Set initial timeout */
w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
data->watchdog_timeout);
/* Enable Soft Watchdog */
w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
leave:
mutex_unlock(&data->watchdog_lock);
return ret;
}
static int watchdog_disable(struct w83793_data *data)
{
int ret = 0;
mutex_lock(&data->watchdog_lock);
if (!data->client) {
ret = -ENODEV;
goto leave;
}
/* Disable Soft Watchdog */
w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
leave:
mutex_unlock(&data->watchdog_lock);
return ret;
}
static int watchdog_open(struct inode *inode, struct file *filp)
{
struct w83793_data *pos, *data = NULL;
int watchdog_is_open;
/*
* We get called from drivers/char/misc.c with misc_mtx hold, and we
* call misc_register() from w83793_probe() with watchdog_data_mutex
* hold, as misc_register() takes the misc_mtx lock, this is a possible
* deadlock, so we use mutex_trylock here.
*/
if (!mutex_trylock(&watchdog_data_mutex))
return -ERESTARTSYS;
list_for_each_entry(pos, &watchdog_data_list, list) {
if (pos->watchdog_miscdev.minor == iminor(inode)) {
data = pos;
break;
}
}
/* Check, if device is already open */
watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
/*
* Increase data reference counter (if not already done).
* Note we can never not have found data, so we don't check for this
*/
if (!watchdog_is_open)
kref_get(&data->kref);
mutex_unlock(&watchdog_data_mutex);
/* Check, if device is already open and possibly issue error */
if (watchdog_is_open)
return -EBUSY;
/* Enable Soft Watchdog */
watchdog_enable(data);
/* Store pointer to data into filp's private data */
filp->private_data = data;
return stream_open(inode, filp);
}
static int watchdog_close(struct inode *inode, struct file *filp)
{
struct w83793_data *data = filp->private_data;
if (data->watchdog_expect_close) {
watchdog_disable(data);
data->watchdog_expect_close = 0;
} else {
watchdog_trigger(data);
dev_crit(&data->client->dev,
"unexpected close, not stopping watchdog!\n");
}
clear_bit(0, &data->watchdog_is_open);
/* Decrease data reference counter */
mutex_lock(&watchdog_data_mutex);
kref_put(&data->kref, w83793_release_resources);
mutex_unlock(&watchdog_data_mutex);
return 0;
}
static ssize_t watchdog_write(struct file *filp, const char __user *buf,
size_t count, loff_t *offset)
{
ssize_t ret;
struct w83793_data *data = filp->private_data;
if (count) {
if (!nowayout) {
size_t i;
/* Clear it in case it was set with a previous write */
data->watchdog_expect_close = 0;
for (i = 0; i != count; i++) {
char c;
if (get_user(c, buf + i))
return -EFAULT;
if (c == 'V')
data->watchdog_expect_close = 1;
}
}
ret = watchdog_trigger(data);
if (ret < 0)
return ret;
}
return count;
}
static long watchdog_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg)
{
struct watchdog_info ident = {
.options = WDIOF_KEEPALIVEPING |
WDIOF_SETTIMEOUT |
WDIOF_CARDRESET,
.identity = "w83793 watchdog"
};
int val, ret = 0;
struct w83793_data *data = filp->private_data;
switch (cmd) {
case WDIOC_GETSUPPORT:
if (!nowayout)
ident.options |= WDIOF_MAGICCLOSE;
if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
ret = -EFAULT;
break;
case WDIOC_GETSTATUS:
val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
ret = put_user(val, (int __user *)arg);
break;
case WDIOC_GETBOOTSTATUS:
ret = put_user(0, (int __user *)arg);
break;
case WDIOC_KEEPALIVE:
ret = watchdog_trigger(data);
break;
case WDIOC_GETTIMEOUT:
val = watchdog_get_timeout(data);
ret = put_user(val, (int __user *)arg);
break;
case WDIOC_SETTIMEOUT:
if (get_user(val, (int __user *)arg)) {
ret = -EFAULT;
break;
}
ret = watchdog_set_timeout(data, val);
if (ret > 0)
ret = put_user(ret, (int __user *)arg);
break;
case WDIOC_SETOPTIONS:
if (get_user(val, (int __user *)arg)) {
ret = -EFAULT;
break;
}
if (val & WDIOS_DISABLECARD)
ret = watchdog_disable(data);
else if (val & WDIOS_ENABLECARD)
ret = watchdog_enable(data);
else
ret = -EINVAL;
break;
default:
ret = -ENOTTY;
}
return ret;
}
static const struct file_operations watchdog_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.open = watchdog_open,
.release = watchdog_close,
.write = watchdog_write,
.unlocked_ioctl = watchdog_ioctl,
.compat_ioctl = compat_ptr_ioctl,
};
/*
* Notifier for system down
*/
static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
void *unused)
{
struct w83793_data *data = NULL;
if (code == SYS_DOWN || code == SYS_HALT) {
/* Disable each registered watchdog */
mutex_lock(&watchdog_data_mutex);
list_for_each_entry(data, &watchdog_data_list, list) {
if (data->watchdog_miscdev.minor)
watchdog_disable(data);
}
mutex_unlock(&watchdog_data_mutex);
}
return NOTIFY_DONE;
}
/*
* The WDT needs to learn about soft shutdowns in order to
* turn the timebomb registers off.
*/
static struct notifier_block watchdog_notifier = {
.notifier_call = watchdog_notify_sys,
};
/*
* Init / remove routines
*/
static void w83793_remove(struct i2c_client *client)
{
struct w83793_data *data = i2c_get_clientdata(client);
struct device *dev = &client->dev;
int i, tmp;
/* Unregister the watchdog (if registered) */
if (data->watchdog_miscdev.minor) {
misc_deregister(&data->watchdog_miscdev);
if (data->watchdog_is_open) {
dev_warn(&client->dev,
"i2c client detached with watchdog open! "
"Stopping watchdog.\n");
watchdog_disable(data);
}
mutex_lock(&watchdog_data_mutex);
list_del(&data->list);
mutex_unlock(&watchdog_data_mutex);
/* Tell the watchdog code the client is gone */
mutex_lock(&data->watchdog_lock);
data->client = NULL;
mutex_unlock(&data->watchdog_lock);
}
/* Reset Configuration Register to Disable Watch Dog Registers */
tmp = w83793_read_value(client, W83793_REG_CONFIG);
w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
unregister_reboot_notifier(&watchdog_notifier);
hwmon_device_unregister(data->hwmon_dev);
for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
device_remove_file(dev,
&w83793_sensor_attr_2[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
device_remove_file(dev, &sda_single_files[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
device_remove_file(dev, &w83793_vid[i].dev_attr);
device_remove_file(dev, &dev_attr_vrm);
for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
device_remove_file(dev, &w83793_left_fan[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
device_remove_file(dev, &w83793_temp[i].dev_attr);
/* Decrease data reference counter */
mutex_lock(&watchdog_data_mutex);
kref_put(&data->kref, w83793_release_resources);
mutex_unlock(&watchdog_data_mutex);
}
static int
w83793_detect_subclients(struct i2c_client *client)
{
int i, id;
int address = client->addr;
u8 tmp;
struct i2c_adapter *adapter = client->adapter;
id = i2c_adapter_id(adapter);
if (force_subclients[0] == id && force_subclients[1] == address) {
for (i = 2; i <= 3; i++) {
if (force_subclients[i] < 0x48
|| force_subclients[i] > 0x4f) {
dev_err(&client->dev,
"invalid subclient "
"address %d; must be 0x48-0x4f\n",
force_subclients[i]);
return -EINVAL;
}
}
w83793_write_value(client, W83793_REG_I2C_SUBADDR,
(force_subclients[2] & 0x07) |
((force_subclients[3] & 0x07) << 4));
}
tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
if (!(tmp & 0x88) && (tmp & 0x7) == ((tmp >> 4) & 0x7)) {
dev_err(&client->dev,
"duplicate addresses 0x%x, use force_subclient\n", 0x48 + (tmp & 0x7));
return -ENODEV;
}
if (!(tmp & 0x08))
devm_i2c_new_dummy_device(&client->dev, adapter, 0x48 + (tmp & 0x7));
if (!(tmp & 0x80))
devm_i2c_new_dummy_device(&client->dev, adapter, 0x48 + ((tmp >> 4) & 0x7));
return 0;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int w83793_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
u8 tmp, bank, chip_id;
struct i2c_adapter *adapter = client->adapter;
unsigned short address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
tmp = bank & 0x80 ? 0x5c : 0xa3;
/* Check Winbond vendor ID */
if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
pr_debug("w83793: Detection failed at check vendor id\n");
return -ENODEV;
}
/*
* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
* should match
*/
if ((bank & 0x07) == 0
&& i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
(address << 1)) {
pr_debug("w83793: Detection failed at check i2c addr\n");
return -ENODEV;
}
/* Determine the chip type now */
chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
if (chip_id != 0x7b)
return -ENODEV;
strscpy(info->type, "w83793", I2C_NAME_SIZE);
return 0;
}
static int w83793_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
static const int watchdog_minors[] = {
WATCHDOG_MINOR, 212, 213, 214, 215
};
struct w83793_data *data;
int i, tmp, val, err;
int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
int files_temp = ARRAY_SIZE(w83793_temp) / 6;
data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
if (!data) {
err = -ENOMEM;
goto exit;
}
i2c_set_clientdata(client, data);
data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
mutex_init(&data->update_lock);
mutex_init(&data->watchdog_lock);
INIT_LIST_HEAD(&data->list);
kref_init(&data->kref);
/*
* Store client pointer in our data struct for watchdog usage
* (where the client is found through a data ptr instead of the
* otherway around)
*/
data->client = client;
err = w83793_detect_subclients(client);
if (err)
goto free_mem;
/* Initialize the chip */
w83793_init_client(client);
/*
* Only fan 1-5 has their own input pins,
* Pwm 1-3 has their own pins
*/
data->has_fan = 0x1f;
data->has_pwm = 0x07;
tmp = w83793_read_value(client, W83793_REG_MFC);
val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
/* check the function of pins 49-56 */
if (tmp & 0x80) {
data->has_vid |= 0x2; /* has VIDB */
} else {
data->has_pwm |= 0x18; /* pwm 4,5 */
if (val & 0x01) { /* fan 6 */
data->has_fan |= 0x20;
data->has_pwm |= 0x20;
}
if (val & 0x02) { /* fan 7 */
data->has_fan |= 0x40;
data->has_pwm |= 0x40;
}
if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
data->has_fan |= 0x80;
data->has_pwm |= 0x80;
}
}
/* check the function of pins 37-40 */
if (!(tmp & 0x29))
data->has_vid |= 0x1; /* has VIDA */
if (0x08 == (tmp & 0x0c)) {
if (val & 0x08) /* fan 9 */
data->has_fan |= 0x100;
if (val & 0x10) /* fan 10 */
data->has_fan |= 0x200;
}
if (0x20 == (tmp & 0x30)) {
if (val & 0x20) /* fan 11 */
data->has_fan |= 0x400;
if (val & 0x40) /* fan 12 */
data->has_fan |= 0x800;
}
if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
data->has_fan |= 0x80;
data->has_pwm |= 0x80;
}
tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
data->has_fan |= 0x100;
}
if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
data->has_fan |= 0x200;
}
if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
data->has_fan |= 0x400;
}
if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
data->has_fan |= 0x800;
}
/* check the temp1-6 mode, ignore former AMDSI selected inputs */
tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[0]);
if (tmp & 0x01)
data->has_temp |= 0x01;
if (tmp & 0x04)
data->has_temp |= 0x02;
if (tmp & 0x10)
data->has_temp |= 0x04;
if (tmp & 0x40)
data->has_temp |= 0x08;
tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[1]);
if (tmp & 0x01)
data->has_temp |= 0x10;
if (tmp & 0x02)
data->has_temp |= 0x20;
/* Register sysfs hooks */
for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
err = device_create_file(dev,
&w83793_sensor_attr_2[i].dev_attr);
if (err)
goto exit_remove;
}
for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
if (!(data->has_vid & (1 << i)))
continue;
err = device_create_file(dev, &w83793_vid[i].dev_attr);
if (err)
goto exit_remove;
}
if (data->has_vid) {
data->vrm = vid_which_vrm();
err = device_create_file(dev, &dev_attr_vrm);
if (err)
goto exit_remove;
}
for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
err = device_create_file(dev, &sda_single_files[i].dev_attr);
if (err)
goto exit_remove;
}
for (i = 0; i < 6; i++) {
int j;
if (!(data->has_temp & (1 << i)))
continue;
for (j = 0; j < files_temp; j++) {
err = device_create_file(dev,
&w83793_temp[(i) * files_temp
+ j].dev_attr);
if (err)
goto exit_remove;
}
}
for (i = 5; i < 12; i++) {
int j;
if (!(data->has_fan & (1 << i)))
continue;
for (j = 0; j < files_fan; j++) {
err = device_create_file(dev,
&w83793_left_fan[(i - 5) * files_fan
+ j].dev_attr);
if (err)
goto exit_remove;
}
}
for (i = 3; i < 8; i++) {
int j;
if (!(data->has_pwm & (1 << i)))
continue;
for (j = 0; j < files_pwm; j++) {
err = device_create_file(dev,
&w83793_left_pwm[(i - 3) * files_pwm
+ j].dev_attr);
if (err)
goto exit_remove;
}
}
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
/* Watchdog initialization */
/* Register boot notifier */
err = register_reboot_notifier(&watchdog_notifier);
if (err != 0) {
dev_err(&client->dev,
"cannot register reboot notifier (err=%d)\n", err);
goto exit_devunreg;
}
/*
* Enable Watchdog registers.
* Set Configuration Register to Enable Watch Dog Registers
* (Bit 2) = XXXX, X1XX.
*/
tmp = w83793_read_value(client, W83793_REG_CONFIG);
w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
/* Set the default watchdog timeout */
data->watchdog_timeout = timeout;
/* Check, if last reboot was caused by watchdog */
data->watchdog_caused_reboot =
w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
/* Disable Soft Watchdog during initialiation */
watchdog_disable(data);
/*
* We take the data_mutex lock early so that watchdog_open() cannot
* run when misc_register() has completed, but we've not yet added
* our data to the watchdog_data_list (and set the default timeout)
*/
mutex_lock(&watchdog_data_mutex);
for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
/* Register our watchdog part */
snprintf(data->watchdog_name, sizeof(data->watchdog_name),
"watchdog%c", (i == 0) ? '\0' : ('0' + i));
data->watchdog_miscdev.name = data->watchdog_name;
data->watchdog_miscdev.fops = &watchdog_fops;
data->watchdog_miscdev.minor = watchdog_minors[i];
err = misc_register(&data->watchdog_miscdev);
if (err == -EBUSY)
continue;
if (err) {
data->watchdog_miscdev.minor = 0;
dev_err(&client->dev,
"Registering watchdog chardev: %d\n", err);
break;
}
list_add(&data->list, &watchdog_data_list);
dev_info(&client->dev,
"Registered watchdog chardev major 10, minor: %d\n",
watchdog_minors[i]);
break;
}
if (i == ARRAY_SIZE(watchdog_minors)) {
data->watchdog_miscdev.minor = 0;
dev_warn(&client->dev,
"Couldn't register watchdog chardev (due to no free minor)\n");
}
mutex_unlock(&watchdog_data_mutex);
return 0;
/* Unregister hwmon device */
exit_devunreg:
hwmon_device_unregister(data->hwmon_dev);
/* Unregister sysfs hooks */
exit_remove:
for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
device_remove_file(dev, &sda_single_files[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
device_remove_file(dev, &w83793_vid[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
device_remove_file(dev, &w83793_left_fan[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
device_remove_file(dev, &w83793_temp[i].dev_attr);
free_mem:
kfree(data);
exit:
return err;
}
static void w83793_update_nonvolatile(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
int i, j;
/*
* They are somewhat "stable" registers, and to update them every time
* takes so much time, it's just not worthy. Update them in a long
* interval to avoid exception.
*/
if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
|| !data->valid))
return;
/* update voltage limits */
for (i = 1; i < 3; i++) {
for (j = 0; j < ARRAY_SIZE(data->in); j++) {
data->in[j][i] =
w83793_read_value(client, W83793_REG_IN[j][i]);
}
data->in_low_bits[i] =
w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
}
for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
/* Update the Fan measured value and limits */
if (!(data->has_fan & (1 << i)))
continue;
data->fan_min[i] =
w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
data->fan_min[i] |=
w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
}
for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
if (!(data->has_temp & (1 << i)))
continue;
data->temp_fan_map[i] =
w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
for (j = 1; j < 5; j++) {
data->temp[i][j] =
w83793_read_value(client, W83793_REG_TEMP[i][j]);
}
data->temp_cruise[i] =
w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
for (j = 0; j < 7; j++) {
data->sf2_pwm[i][j] =
w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
data->sf2_temp[i][j] =
w83793_read_value(client,
W83793_REG_SF2_TEMP(i, j));
}
}
for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
data->temp_mode[i] =
w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
data->tolerance[i] =
w83793_read_value(client, W83793_REG_TEMP_TOL(i));
}
for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
if (!(data->has_pwm & (1 << i)))
continue;
data->pwm[i][PWM_NONSTOP] =
w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
data->pwm[i][PWM_START] =
w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
data->pwm_stop_time[i] =
w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
}
data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
data->temp_critical =
w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
data->last_nonvolatile = jiffies;
}
static struct w83793_data *w83793_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83793_data *data = i2c_get_clientdata(client);
int i;
mutex_lock(&data->update_lock);
if (!(time_after(jiffies, data->last_updated + HZ * 2)
|| !data->valid))
goto END;
/* Update the voltages measured value and limits */
for (i = 0; i < ARRAY_SIZE(data->in); i++)
data->in[i][IN_READ] =
w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
data->in_low_bits[IN_READ] =
w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
if (!(data->has_fan & (1 << i)))
continue;
data->fan[i] =
w83793_read_value(client, W83793_REG_FAN(i)) << 8;
data->fan[i] |=
w83793_read_value(client, W83793_REG_FAN(i) + 1);
}
for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
if (!(data->has_temp & (1 << i)))
continue;
data->temp[i][TEMP_READ] =
w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
}
data->temp_low_bits =
w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
if (data->has_pwm & (1 << i))
data->pwm[i][PWM_DUTY] =
w83793_read_value(client,
W83793_REG_PWM(i, PWM_DUTY));
}
for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
data->alarms[i] =
w83793_read_value(client, W83793_REG_ALARM(i));
if (data->has_vid & 0x01)
data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
if (data->has_vid & 0x02)
data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
w83793_update_nonvolatile(dev);
data->last_updated = jiffies;
data->valid = true;
END:
mutex_unlock(&data->update_lock);
return data;
}
/*
* Ignore the possibility that somebody change bank outside the driver
* Must be called with data->update_lock held, except during initialization
*/
static u8 w83793_read_value(struct i2c_client *client, u16 reg)
{
struct w83793_data *data = i2c_get_clientdata(client);
u8 res;
u8 new_bank = reg >> 8;
new_bank |= data->bank & 0xfc;
if (data->bank != new_bank) {
if (i2c_smbus_write_byte_data
(client, W83793_REG_BANKSEL, new_bank) >= 0)
data->bank = new_bank;
else {
dev_err(&client->dev,
"set bank to %d failed, fall back "
"to bank %d, read reg 0x%x error\n",
new_bank, data->bank, reg);
res = 0x0; /* read 0x0 from the chip */
goto END;
}
}
res = i2c_smbus_read_byte_data(client, reg & 0xff);
END:
return res;
}
/* Must be called with data->update_lock held, except during initialization */
static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
{
struct w83793_data *data = i2c_get_clientdata(client);
int res;
u8 new_bank = reg >> 8;
new_bank |= data->bank & 0xfc;
if (data->bank != new_bank) {
res = i2c_smbus_write_byte_data(client, W83793_REG_BANKSEL,
new_bank);
if (res < 0) {
dev_err(&client->dev,
"set bank to %d failed, fall back "
"to bank %d, write reg 0x%x error\n",
new_bank, data->bank, reg);
goto END;
}
data->bank = new_bank;
}
res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
END:
return res;
}
module_i2c_driver(w83793_driver);
MODULE_AUTHOR("Yuan Mu, Sven Anders");
MODULE_DESCRIPTION("w83793 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/w83793.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm93.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
*
* Author/Maintainer: Mark M. Hoffman <[email protected]>
* Copyright (c) 2004 Utilitek Systems, Inc.
*
* derived in part from lm78.c:
* Copyright (c) 1998, 1999 Frodo Looijaard <[email protected]>
*
* derived in part from lm85.c:
* Copyright (c) 2002, 2003 Philip Pokorny <[email protected]>
* Copyright (c) 2003 Margit Schubert-While <[email protected]>
*
* derived in part from w83l785ts.c:
* Copyright (c) 2003-2004 Jean Delvare <[email protected]>
*
* Ported to Linux 2.6 by Eric J. Bowersox <[email protected]>
* Copyright (c) 2005 Aspen Systems, Inc.
*
* Adapted to 2.6.20 by Carsten Emde <[email protected]>
* Copyright (c) 2006 Carsten Emde, Open Source Automation Development Lab
*
* Modified for mainline integration by Hans J. Koch <[email protected]>
* Copyright (c) 2007 Hans J. Koch, Linutronix GmbH
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
/* LM93 REGISTER ADDRESSES */
/* miscellaneous */
#define LM93_REG_MFR_ID 0x3e
#define LM93_REG_VER 0x3f
#define LM93_REG_STATUS_CONTROL 0xe2
#define LM93_REG_CONFIG 0xe3
#define LM93_REG_SLEEP_CONTROL 0xe4
/* alarm values start here */
#define LM93_REG_HOST_ERROR_1 0x48
/* voltage inputs: in1-in16 (nr => 0-15) */
#define LM93_REG_IN(nr) (0x56 + (nr))
#define LM93_REG_IN_MIN(nr) (0x90 + (nr) * 2)
#define LM93_REG_IN_MAX(nr) (0x91 + (nr) * 2)
/* temperature inputs: temp1-temp4 (nr => 0-3) */
#define LM93_REG_TEMP(nr) (0x50 + (nr))
#define LM93_REG_TEMP_MIN(nr) (0x78 + (nr) * 2)
#define LM93_REG_TEMP_MAX(nr) (0x79 + (nr) * 2)
/* temp[1-4]_auto_boost (nr => 0-3) */
#define LM93_REG_BOOST(nr) (0x80 + (nr))
/* #PROCHOT inputs: prochot1-prochot2 (nr => 0-1) */
#define LM93_REG_PROCHOT_CUR(nr) (0x67 + (nr) * 2)
#define LM93_REG_PROCHOT_AVG(nr) (0x68 + (nr) * 2)
#define LM93_REG_PROCHOT_MAX(nr) (0xb0 + (nr))
/* fan tach inputs: fan1-fan4 (nr => 0-3) */
#define LM93_REG_FAN(nr) (0x6e + (nr) * 2)
#define LM93_REG_FAN_MIN(nr) (0xb4 + (nr) * 2)
/* pwm outputs: pwm1-pwm2 (nr => 0-1, reg => 0-3) */
#define LM93_REG_PWM_CTL(nr, reg) (0xc8 + (reg) + (nr) * 4)
#define LM93_PWM_CTL1 0x0
#define LM93_PWM_CTL2 0x1
#define LM93_PWM_CTL3 0x2
#define LM93_PWM_CTL4 0x3
/* GPIO input state */
#define LM93_REG_GPI 0x6b
/* vid inputs: vid1-vid2 (nr => 0-1) */
#define LM93_REG_VID(nr) (0x6c + (nr))
/* vccp1 & vccp2: VID relative inputs (nr => 0-1) */
#define LM93_REG_VCCP_LIMIT_OFF(nr) (0xb2 + (nr))
/* temp[1-4]_auto_boost_hyst */
#define LM93_REG_BOOST_HYST_12 0xc0
#define LM93_REG_BOOST_HYST_34 0xc1
#define LM93_REG_BOOST_HYST(nr) (0xc0 + (nr)/2)
/* temp[1-4]_auto_pwm_[min|hyst] */
#define LM93_REG_PWM_MIN_HYST_12 0xc3
#define LM93_REG_PWM_MIN_HYST_34 0xc4
#define LM93_REG_PWM_MIN_HYST(nr) (0xc3 + (nr)/2)
/* prochot_override & prochot_interval */
#define LM93_REG_PROCHOT_OVERRIDE 0xc6
#define LM93_REG_PROCHOT_INTERVAL 0xc7
/* temp[1-4]_auto_base (nr => 0-3) */
#define LM93_REG_TEMP_BASE(nr) (0xd0 + (nr))
/* temp[1-4]_auto_offsets (step => 0-11) */
#define LM93_REG_TEMP_OFFSET(step) (0xd4 + (step))
/* #PROCHOT & #VRDHOT PWM ramp control */
#define LM93_REG_PWM_RAMP_CTL 0xbf
/* miscellaneous */
#define LM93_REG_SFC1 0xbc
#define LM93_REG_SFC2 0xbd
#define LM93_REG_GPI_VID_CTL 0xbe
#define LM93_REG_SF_TACH_TO_PWM 0xe0
/* error masks */
#define LM93_REG_GPI_ERR_MASK 0xec
#define LM93_REG_MISC_ERR_MASK 0xed
/* LM93 REGISTER VALUES */
#define LM93_MFR_ID 0x73
#define LM93_MFR_ID_PROTOTYPE 0x72
/* LM94 REGISTER VALUES */
#define LM94_MFR_ID_2 0x7a
#define LM94_MFR_ID 0x79
#define LM94_MFR_ID_PROTOTYPE 0x78
/* SMBus capabilities */
#define LM93_SMBUS_FUNC_FULL (I2C_FUNC_SMBUS_BYTE_DATA | \
I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA)
#define LM93_SMBUS_FUNC_MIN (I2C_FUNC_SMBUS_BYTE_DATA | \
I2C_FUNC_SMBUS_WORD_DATA)
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
/* Insmod parameters */
static bool disable_block;
module_param(disable_block, bool, 0);
MODULE_PARM_DESC(disable_block,
"Set to non-zero to disable SMBus block data transactions.");
static bool init;
module_param(init, bool, 0);
MODULE_PARM_DESC(init, "Set to non-zero to force chip initialization.");
static int vccp_limit_type[2] = {0, 0};
module_param_array(vccp_limit_type, int, NULL, 0);
MODULE_PARM_DESC(vccp_limit_type, "Configures in7 and in8 limit modes.");
static int vid_agtl;
module_param(vid_agtl, int, 0);
MODULE_PARM_DESC(vid_agtl, "Configures VID pin input thresholds.");
/* Driver data */
static struct i2c_driver lm93_driver;
/* LM93 BLOCK READ COMMANDS */
static const struct { u8 cmd; u8 len; } lm93_block_read_cmds[12] = {
{ 0xf2, 8 },
{ 0xf3, 8 },
{ 0xf4, 6 },
{ 0xf5, 16 },
{ 0xf6, 4 },
{ 0xf7, 8 },
{ 0xf8, 12 },
{ 0xf9, 32 },
{ 0xfa, 8 },
{ 0xfb, 8 },
{ 0xfc, 16 },
{ 0xfd, 9 },
};
/*
* ALARMS: SYSCTL format described further below
* REG: 64 bits in 8 registers, as immediately below
*/
struct block1_t {
u8 host_status_1;
u8 host_status_2;
u8 host_status_3;
u8 host_status_4;
u8 p1_prochot_status;
u8 p2_prochot_status;
u8 gpi_status;
u8 fan_status;
};
/*
* Client-specific data
*/
struct lm93_data {
struct i2c_client *client;
struct mutex update_lock;
unsigned long last_updated; /* In jiffies */
/* client update function */
void (*update)(struct lm93_data *, struct i2c_client *);
bool valid; /* true if following fields are valid */
/* register values, arranged by block read groups */
struct block1_t block1;
/*
* temp1 - temp4: unfiltered readings
* temp1 - temp2: filtered readings
*/
u8 block2[6];
/* vin1 - vin16: readings */
u8 block3[16];
/* prochot1 - prochot2: readings */
struct {
u8 cur;
u8 avg;
} block4[2];
/* fan counts 1-4 => 14-bits, LE, *left* justified */
u16 block5[4];
/* block6 has a lot of data we don't need */
struct {
u8 min;
u8 max;
} temp_lim[4];
/* vin1 - vin16: low and high limits */
struct {
u8 min;
u8 max;
} block7[16];
/* fan count limits 1-4 => same format as block5 */
u16 block8[4];
/* pwm control registers (2 pwms, 4 regs) */
u8 block9[2][4];
/* auto/pwm base temp and offset temp registers */
struct {
u8 base[4];
u8 offset[12];
} block10;
/* master config register */
u8 config;
/* VID1 & VID2 => register format, 6-bits, right justified */
u8 vid[2];
/* prochot1 - prochot2: limits */
u8 prochot_max[2];
/* vccp1 & vccp2 (in7 & in8): VID relative limits (register format) */
u8 vccp_limits[2];
/* GPIO input state (register format, i.e. inverted) */
u8 gpi;
/* #PROCHOT override (register format) */
u8 prochot_override;
/* #PROCHOT intervals (register format) */
u8 prochot_interval;
/* Fan Boost Temperatures (register format) */
u8 boost[4];
/* Fan Boost Hysteresis (register format) */
u8 boost_hyst[2];
/* Temperature Zone Min. PWM & Hysteresis (register format) */
u8 auto_pwm_min_hyst[2];
/* #PROCHOT & #VRDHOT PWM Ramp Control */
u8 pwm_ramp_ctl;
/* miscellaneous setup regs */
u8 sfc1;
u8 sfc2;
u8 sf_tach_to_pwm;
/*
* The two PWM CTL2 registers can read something other than what was
* last written for the OVR_DC field (duty cycle override). So, we
* save the user-commanded value here.
*/
u8 pwm_override[2];
};
/*
* VID: mV
* REG: 6-bits, right justified, *always* using Intel VRM/VRD 10
*/
static int LM93_VID_FROM_REG(u8 reg)
{
return vid_from_reg((reg & 0x3f), 100);
}
/* min, max, and nominal register values, per channel (u8) */
static const u8 lm93_vin_reg_min[16] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xae,
};
static const u8 lm93_vin_reg_max[16] = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xd1,
};
/*
* Values from the datasheet. They're here for documentation only.
* static const u8 lm93_vin_reg_nom[16] = {
* 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0,
* 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0x40, 0xc0,
* };
*/
/* min, max, and nominal voltage readings, per channel (mV)*/
static const unsigned long lm93_vin_val_min[16] = {
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 3000,
};
static const unsigned long lm93_vin_val_max[16] = {
1236, 1236, 1236, 1600, 2000, 2000, 1600, 1600,
4400, 6500, 3333, 2625, 1312, 1312, 1236, 3600,
};
/*
* Values from the datasheet. They're here for documentation only.
* static const unsigned long lm93_vin_val_nom[16] = {
* 927, 927, 927, 1200, 1500, 1500, 1200, 1200,
* 3300, 5000, 2500, 1969, 984, 984, 309, 3300,
* };
*/
static unsigned LM93_IN_FROM_REG(int nr, u8 reg)
{
const long uv_max = lm93_vin_val_max[nr] * 1000;
const long uv_min = lm93_vin_val_min[nr] * 1000;
const long slope = (uv_max - uv_min) /
(lm93_vin_reg_max[nr] - lm93_vin_reg_min[nr]);
const long intercept = uv_min - slope * lm93_vin_reg_min[nr];
return (slope * reg + intercept + 500) / 1000;
}
/*
* IN: mV, limits determined by channel nr
* REG: scaling determined by channel nr
*/
static u8 LM93_IN_TO_REG(int nr, unsigned val)
{
/* range limit */
const long mv = clamp_val(val,
lm93_vin_val_min[nr], lm93_vin_val_max[nr]);
/* try not to lose too much precision here */
const long uv = mv * 1000;
const long uv_max = lm93_vin_val_max[nr] * 1000;
const long uv_min = lm93_vin_val_min[nr] * 1000;
/* convert */
const long slope = (uv_max - uv_min) /
(lm93_vin_reg_max[nr] - lm93_vin_reg_min[nr]);
const long intercept = uv_min - slope * lm93_vin_reg_min[nr];
u8 result = ((uv - intercept + (slope/2)) / slope);
result = clamp_val(result,
lm93_vin_reg_min[nr], lm93_vin_reg_max[nr]);
return result;
}
/* vid in mV, upper == 0 indicates low limit, otherwise upper limit */
static unsigned LM93_IN_REL_FROM_REG(u8 reg, int upper, int vid)
{
const long uv_offset = upper ? (((reg >> 4 & 0x0f) + 1) * 12500) :
(((reg >> 0 & 0x0f) + 1) * -25000);
const long uv_vid = vid * 1000;
return (uv_vid + uv_offset + 5000) / 10000;
}
#define LM93_IN_MIN_FROM_REG(reg, vid) LM93_IN_REL_FROM_REG((reg), 0, (vid))
#define LM93_IN_MAX_FROM_REG(reg, vid) LM93_IN_REL_FROM_REG((reg), 1, (vid))
/*
* vid in mV , upper == 0 indicates low limit, otherwise upper limit
* upper also determines which nibble of the register is returned
* (the other nibble will be 0x0)
*/
static u8 LM93_IN_REL_TO_REG(unsigned val, int upper, int vid)
{
long uv_offset = vid * 1000 - val * 10000;
if (upper) {
uv_offset = clamp_val(uv_offset, 12500, 200000);
return (u8)((uv_offset / 12500 - 1) << 4);
} else {
uv_offset = clamp_val(uv_offset, -400000, -25000);
return (u8)((uv_offset / -25000 - 1) << 0);
}
}
/*
* TEMP: 1/1000 degrees C (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static int LM93_TEMP_FROM_REG(u8 reg)
{
return (s8)reg * 1000;
}
#define LM93_TEMP_MIN (-128000)
#define LM93_TEMP_MAX (127000)
/*
* TEMP: 1/1000 degrees C (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static u8 LM93_TEMP_TO_REG(long temp)
{
int ntemp = clamp_val(temp, LM93_TEMP_MIN, LM93_TEMP_MAX);
ntemp += (ntemp < 0 ? -500 : 500);
return (u8)(ntemp / 1000);
}
/* Determine 4-bit temperature offset resolution */
static int LM93_TEMP_OFFSET_MODE_FROM_REG(u8 sfc2, int nr)
{
/* mode: 0 => 1C/bit, nonzero => 0.5C/bit */
return sfc2 & (nr < 2 ? 0x10 : 0x20);
}
/*
* This function is common to all 4-bit temperature offsets
* reg is 4 bits right justified
* mode 0 => 1C/bit, mode !0 => 0.5C/bit
*/
static int LM93_TEMP_OFFSET_FROM_REG(u8 reg, int mode)
{
return (reg & 0x0f) * (mode ? 5 : 10);
}
#define LM93_TEMP_OFFSET_MIN (0)
#define LM93_TEMP_OFFSET_MAX0 (150)
#define LM93_TEMP_OFFSET_MAX1 (75)
/*
* This function is common to all 4-bit temperature offsets
* returns 4 bits right justified
* mode 0 => 1C/bit, mode !0 => 0.5C/bit
*/
static u8 LM93_TEMP_OFFSET_TO_REG(int off, int mode)
{
int factor = mode ? 5 : 10;
off = clamp_val(off, LM93_TEMP_OFFSET_MIN,
mode ? LM93_TEMP_OFFSET_MAX1 : LM93_TEMP_OFFSET_MAX0);
return (u8)((off + factor/2) / factor);
}
/* 0 <= nr <= 3 */
static int LM93_TEMP_AUTO_OFFSET_FROM_REG(u8 reg, int nr, int mode)
{
/* temp1-temp2 (nr=0,1) use lower nibble */
if (nr < 2)
return LM93_TEMP_OFFSET_FROM_REG(reg & 0x0f, mode);
/* temp3-temp4 (nr=2,3) use upper nibble */
else
return LM93_TEMP_OFFSET_FROM_REG(reg >> 4 & 0x0f, mode);
}
/*
* TEMP: 1/10 degrees C (0C to +15C (mode 0) or +7.5C (mode non-zero))
* REG: 1.0C/bit (mode 0) or 0.5C/bit (mode non-zero)
* 0 <= nr <= 3
*/
static u8 LM93_TEMP_AUTO_OFFSET_TO_REG(u8 old, int off, int nr, int mode)
{
u8 new = LM93_TEMP_OFFSET_TO_REG(off, mode);
/* temp1-temp2 (nr=0,1) use lower nibble */
if (nr < 2)
return (old & 0xf0) | (new & 0x0f);
/* temp3-temp4 (nr=2,3) use upper nibble */
else
return (new << 4 & 0xf0) | (old & 0x0f);
}
static int LM93_AUTO_BOOST_HYST_FROM_REGS(struct lm93_data *data, int nr,
int mode)
{
u8 reg;
switch (nr) {
case 0:
reg = data->boost_hyst[0] & 0x0f;
break;
case 1:
reg = data->boost_hyst[0] >> 4 & 0x0f;
break;
case 2:
reg = data->boost_hyst[1] & 0x0f;
break;
case 3:
default:
reg = data->boost_hyst[1] >> 4 & 0x0f;
break;
}
return LM93_TEMP_FROM_REG(data->boost[nr]) -
LM93_TEMP_OFFSET_FROM_REG(reg, mode);
}
static u8 LM93_AUTO_BOOST_HYST_TO_REG(struct lm93_data *data, long hyst,
int nr, int mode)
{
u8 reg = LM93_TEMP_OFFSET_TO_REG(
(LM93_TEMP_FROM_REG(data->boost[nr]) - hyst), mode);
switch (nr) {
case 0:
reg = (data->boost_hyst[0] & 0xf0) | (reg & 0x0f);
break;
case 1:
reg = (reg << 4 & 0xf0) | (data->boost_hyst[0] & 0x0f);
break;
case 2:
reg = (data->boost_hyst[1] & 0xf0) | (reg & 0x0f);
break;
case 3:
default:
reg = (reg << 4 & 0xf0) | (data->boost_hyst[1] & 0x0f);
break;
}
return reg;
}
/*
* PWM: 0-255 per sensors documentation
* REG: 0-13 as mapped below... right justified
*/
enum pwm_freq { LM93_PWM_MAP_HI_FREQ, LM93_PWM_MAP_LO_FREQ };
static int lm93_pwm_map[2][16] = {
{
0x00, /* 0.00% */ 0x40, /* 25.00% */
0x50, /* 31.25% */ 0x60, /* 37.50% */
0x70, /* 43.75% */ 0x80, /* 50.00% */
0x90, /* 56.25% */ 0xa0, /* 62.50% */
0xb0, /* 68.75% */ 0xc0, /* 75.00% */
0xd0, /* 81.25% */ 0xe0, /* 87.50% */
0xf0, /* 93.75% */ 0xff, /* 100.00% */
0xff, 0xff, /* 14, 15 are reserved and should never occur */
},
{
0x00, /* 0.00% */ 0x40, /* 25.00% */
0x49, /* 28.57% */ 0x52, /* 32.14% */
0x5b, /* 35.71% */ 0x64, /* 39.29% */
0x6d, /* 42.86% */ 0x76, /* 46.43% */
0x80, /* 50.00% */ 0x89, /* 53.57% */
0x92, /* 57.14% */ 0xb6, /* 71.43% */
0xdb, /* 85.71% */ 0xff, /* 100.00% */
0xff, 0xff, /* 14, 15 are reserved and should never occur */
},
};
static int LM93_PWM_FROM_REG(u8 reg, enum pwm_freq freq)
{
return lm93_pwm_map[freq][reg & 0x0f];
}
/* round up to nearest match */
static u8 LM93_PWM_TO_REG(int pwm, enum pwm_freq freq)
{
int i;
for (i = 0; i < 13; i++)
if (pwm <= lm93_pwm_map[freq][i])
break;
/* can fall through with i==13 */
return (u8)i;
}
static int LM93_FAN_FROM_REG(u16 regs)
{
const u16 count = le16_to_cpu(regs) >> 2;
return count == 0 ? -1 : count == 0x3fff ? 0 : 1350000 / count;
}
/*
* RPM: (82.5 to 1350000)
* REG: 14-bits, LE, *left* justified
*/
static u16 LM93_FAN_TO_REG(long rpm)
{
u16 count, regs;
if (rpm == 0) {
count = 0x3fff;
} else {
rpm = clamp_val(rpm, 1, 1000000);
count = clamp_val((1350000 + rpm) / rpm, 1, 0x3ffe);
}
regs = count << 2;
return cpu_to_le16(regs);
}
/*
* PWM FREQ: HZ
* REG: 0-7 as mapped below
*/
static int lm93_pwm_freq_map[8] = {
22500, 96, 84, 72, 60, 48, 36, 12
};
static int LM93_PWM_FREQ_FROM_REG(u8 reg)
{
return lm93_pwm_freq_map[reg & 0x07];
}
/* round up to nearest match */
static u8 LM93_PWM_FREQ_TO_REG(int freq)
{
int i;
for (i = 7; i > 0; i--)
if (freq <= lm93_pwm_freq_map[i])
break;
/* can fall through with i==0 */
return (u8)i;
}
/*
* TIME: 1/100 seconds
* REG: 0-7 as mapped below
*/
static int lm93_spinup_time_map[8] = {
0, 10, 25, 40, 70, 100, 200, 400,
};
static int LM93_SPINUP_TIME_FROM_REG(u8 reg)
{
return lm93_spinup_time_map[reg >> 5 & 0x07];
}
/* round up to nearest match */
static u8 LM93_SPINUP_TIME_TO_REG(int time)
{
int i;
for (i = 0; i < 7; i++)
if (time <= lm93_spinup_time_map[i])
break;
/* can fall through with i==8 */
return (u8)i;
}
#define LM93_RAMP_MIN 0
#define LM93_RAMP_MAX 75
static int LM93_RAMP_FROM_REG(u8 reg)
{
return (reg & 0x0f) * 5;
}
/*
* RAMP: 1/100 seconds
* REG: 50mS/bit 4-bits right justified
*/
static u8 LM93_RAMP_TO_REG(int ramp)
{
ramp = clamp_val(ramp, LM93_RAMP_MIN, LM93_RAMP_MAX);
return (u8)((ramp + 2) / 5);
}
/*
* PROCHOT: 0-255, 0 => 0%, 255 => > 96.6%
* REG: (same)
*/
static u8 LM93_PROCHOT_TO_REG(long prochot)
{
prochot = clamp_val(prochot, 0, 255);
return (u8)prochot;
}
/*
* PROCHOT-INTERVAL: 73 - 37200 (1/100 seconds)
* REG: 0-9 as mapped below
*/
static int lm93_interval_map[10] = {
73, 146, 290, 580, 1170, 2330, 4660, 9320, 18600, 37200,
};
static int LM93_INTERVAL_FROM_REG(u8 reg)
{
return lm93_interval_map[reg & 0x0f];
}
/* round up to nearest match */
static u8 LM93_INTERVAL_TO_REG(long interval)
{
int i;
for (i = 0; i < 9; i++)
if (interval <= lm93_interval_map[i])
break;
/* can fall through with i==9 */
return (u8)i;
}
/*
* GPIO: 0-255, GPIO0 is LSB
* REG: inverted
*/
static unsigned LM93_GPI_FROM_REG(u8 reg)
{
return ~reg & 0xff;
}
/*
* alarm bitmask definitions
* The LM93 has nearly 64 bits of error status... I've pared that down to
* what I think is a useful subset in order to fit it into 32 bits.
*
* Especially note that the #VRD_HOT alarms are missing because we provide
* that information as values in another sysfs file.
*
* If libsensors is extended to support 64 bit values, this could be revisited.
*/
#define LM93_ALARM_IN1 0x00000001
#define LM93_ALARM_IN2 0x00000002
#define LM93_ALARM_IN3 0x00000004
#define LM93_ALARM_IN4 0x00000008
#define LM93_ALARM_IN5 0x00000010
#define LM93_ALARM_IN6 0x00000020
#define LM93_ALARM_IN7 0x00000040
#define LM93_ALARM_IN8 0x00000080
#define LM93_ALARM_IN9 0x00000100
#define LM93_ALARM_IN10 0x00000200
#define LM93_ALARM_IN11 0x00000400
#define LM93_ALARM_IN12 0x00000800
#define LM93_ALARM_IN13 0x00001000
#define LM93_ALARM_IN14 0x00002000
#define LM93_ALARM_IN15 0x00004000
#define LM93_ALARM_IN16 0x00008000
#define LM93_ALARM_FAN1 0x00010000
#define LM93_ALARM_FAN2 0x00020000
#define LM93_ALARM_FAN3 0x00040000
#define LM93_ALARM_FAN4 0x00080000
#define LM93_ALARM_PH1_ERR 0x00100000
#define LM93_ALARM_PH2_ERR 0x00200000
#define LM93_ALARM_SCSI1_ERR 0x00400000
#define LM93_ALARM_SCSI2_ERR 0x00800000
#define LM93_ALARM_DVDDP1_ERR 0x01000000
#define LM93_ALARM_DVDDP2_ERR 0x02000000
#define LM93_ALARM_D1_ERR 0x04000000
#define LM93_ALARM_D2_ERR 0x08000000
#define LM93_ALARM_TEMP1 0x10000000
#define LM93_ALARM_TEMP2 0x20000000
#define LM93_ALARM_TEMP3 0x40000000
static unsigned LM93_ALARMS_FROM_REG(struct block1_t b1)
{
unsigned result;
result = b1.host_status_2 & 0x3f;
if (vccp_limit_type[0])
result |= (b1.host_status_4 & 0x10) << 2;
else
result |= b1.host_status_2 & 0x40;
if (vccp_limit_type[1])
result |= (b1.host_status_4 & 0x20) << 2;
else
result |= b1.host_status_2 & 0x80;
result |= b1.host_status_3 << 8;
result |= (b1.fan_status & 0x0f) << 16;
result |= (b1.p1_prochot_status & 0x80) << 13;
result |= (b1.p2_prochot_status & 0x80) << 14;
result |= (b1.host_status_4 & 0xfc) << 20;
result |= (b1.host_status_1 & 0x07) << 28;
return result;
}
#define MAX_RETRIES 5
static u8 lm93_read_byte(struct i2c_client *client, u8 reg)
{
int value, i;
/* retry in case of read errors */
for (i = 1; i <= MAX_RETRIES; i++) {
value = i2c_smbus_read_byte_data(client, reg);
if (value >= 0) {
return value;
} else {
dev_warn(&client->dev,
"lm93: read byte data failed, address 0x%02x.\n",
reg);
mdelay(i + 3);
}
}
/* <TODO> what to return in case of error? */
dev_err(&client->dev, "lm93: All read byte retries failed!!\n");
return 0;
}
static int lm93_write_byte(struct i2c_client *client, u8 reg, u8 value)
{
int result;
/* <TODO> how to handle write errors? */
result = i2c_smbus_write_byte_data(client, reg, value);
if (result < 0)
dev_warn(&client->dev,
"lm93: write byte data failed, 0x%02x at address 0x%02x.\n",
value, reg);
return result;
}
static u16 lm93_read_word(struct i2c_client *client, u8 reg)
{
int value, i;
/* retry in case of read errors */
for (i = 1; i <= MAX_RETRIES; i++) {
value = i2c_smbus_read_word_data(client, reg);
if (value >= 0) {
return value;
} else {
dev_warn(&client->dev,
"lm93: read word data failed, address 0x%02x.\n",
reg);
mdelay(i + 3);
}
}
/* <TODO> what to return in case of error? */
dev_err(&client->dev, "lm93: All read word retries failed!!\n");
return 0;
}
static int lm93_write_word(struct i2c_client *client, u8 reg, u16 value)
{
int result;
/* <TODO> how to handle write errors? */
result = i2c_smbus_write_word_data(client, reg, value);
if (result < 0)
dev_warn(&client->dev,
"lm93: write word data failed, 0x%04x at address 0x%02x.\n",
value, reg);
return result;
}
static u8 lm93_block_buffer[I2C_SMBUS_BLOCK_MAX];
/*
* read block data into values, retry if not expected length
* fbn => index to lm93_block_read_cmds table
* (Fixed Block Number - section 14.5.2 of LM93 datasheet)
*/
static void lm93_read_block(struct i2c_client *client, u8 fbn, u8 *values)
{
int i, result = 0;
for (i = 1; i <= MAX_RETRIES; i++) {
result = i2c_smbus_read_block_data(client,
lm93_block_read_cmds[fbn].cmd, lm93_block_buffer);
if (result == lm93_block_read_cmds[fbn].len) {
break;
} else {
dev_warn(&client->dev,
"lm93: block read data failed, command 0x%02x.\n",
lm93_block_read_cmds[fbn].cmd);
mdelay(i + 3);
}
}
if (result == lm93_block_read_cmds[fbn].len) {
memcpy(values, lm93_block_buffer,
lm93_block_read_cmds[fbn].len);
} else {
/* <TODO> what to do in case of error? */
}
}
static struct lm93_data *lm93_update_device(struct device *dev)
{
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
const unsigned long interval = HZ + (HZ / 2);
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + interval) ||
!data->valid) {
data->update(data, client);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* update routine for data that has no corresponding SMBus block command */
static void lm93_update_client_common(struct lm93_data *data,
struct i2c_client *client)
{
int i;
u8 *ptr;
/* temp1 - temp4: limits */
for (i = 0; i < 4; i++) {
data->temp_lim[i].min =
lm93_read_byte(client, LM93_REG_TEMP_MIN(i));
data->temp_lim[i].max =
lm93_read_byte(client, LM93_REG_TEMP_MAX(i));
}
/* config register */
data->config = lm93_read_byte(client, LM93_REG_CONFIG);
/* vid1 - vid2: values */
for (i = 0; i < 2; i++)
data->vid[i] = lm93_read_byte(client, LM93_REG_VID(i));
/* prochot1 - prochot2: limits */
for (i = 0; i < 2; i++)
data->prochot_max[i] = lm93_read_byte(client,
LM93_REG_PROCHOT_MAX(i));
/* vccp1 - vccp2: VID relative limits */
for (i = 0; i < 2; i++)
data->vccp_limits[i] = lm93_read_byte(client,
LM93_REG_VCCP_LIMIT_OFF(i));
/* GPIO input state */
data->gpi = lm93_read_byte(client, LM93_REG_GPI);
/* #PROCHOT override state */
data->prochot_override = lm93_read_byte(client,
LM93_REG_PROCHOT_OVERRIDE);
/* #PROCHOT intervals */
data->prochot_interval = lm93_read_byte(client,
LM93_REG_PROCHOT_INTERVAL);
/* Fan Boost Temperature registers */
for (i = 0; i < 4; i++)
data->boost[i] = lm93_read_byte(client, LM93_REG_BOOST(i));
/* Fan Boost Temperature Hyst. registers */
data->boost_hyst[0] = lm93_read_byte(client, LM93_REG_BOOST_HYST_12);
data->boost_hyst[1] = lm93_read_byte(client, LM93_REG_BOOST_HYST_34);
/* Temperature Zone Min. PWM & Hysteresis registers */
data->auto_pwm_min_hyst[0] =
lm93_read_byte(client, LM93_REG_PWM_MIN_HYST_12);
data->auto_pwm_min_hyst[1] =
lm93_read_byte(client, LM93_REG_PWM_MIN_HYST_34);
/* #PROCHOT & #VRDHOT PWM Ramp Control register */
data->pwm_ramp_ctl = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
/* misc setup registers */
data->sfc1 = lm93_read_byte(client, LM93_REG_SFC1);
data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
data->sf_tach_to_pwm = lm93_read_byte(client,
LM93_REG_SF_TACH_TO_PWM);
/* write back alarm values to clear */
for (i = 0, ptr = (u8 *)(&data->block1); i < 8; i++)
lm93_write_byte(client, LM93_REG_HOST_ERROR_1 + i, *(ptr + i));
}
/* update routine which uses SMBus block data commands */
static void lm93_update_client_full(struct lm93_data *data,
struct i2c_client *client)
{
dev_dbg(&client->dev, "starting device update (block data enabled)\n");
/* in1 - in16: values & limits */
lm93_read_block(client, 3, (u8 *)(data->block3));
lm93_read_block(client, 7, (u8 *)(data->block7));
/* temp1 - temp4: values */
lm93_read_block(client, 2, (u8 *)(data->block2));
/* prochot1 - prochot2: values */
lm93_read_block(client, 4, (u8 *)(data->block4));
/* fan1 - fan4: values & limits */
lm93_read_block(client, 5, (u8 *)(data->block5));
lm93_read_block(client, 8, (u8 *)(data->block8));
/* pmw control registers */
lm93_read_block(client, 9, (u8 *)(data->block9));
/* alarm values */
lm93_read_block(client, 1, (u8 *)(&data->block1));
/* auto/pwm registers */
lm93_read_block(client, 10, (u8 *)(&data->block10));
lm93_update_client_common(data, client);
}
/* update routine which uses SMBus byte/word data commands only */
static void lm93_update_client_min(struct lm93_data *data,
struct i2c_client *client)
{
int i, j;
u8 *ptr;
dev_dbg(&client->dev, "starting device update (block data disabled)\n");
/* in1 - in16: values & limits */
for (i = 0; i < 16; i++) {
data->block3[i] =
lm93_read_byte(client, LM93_REG_IN(i));
data->block7[i].min =
lm93_read_byte(client, LM93_REG_IN_MIN(i));
data->block7[i].max =
lm93_read_byte(client, LM93_REG_IN_MAX(i));
}
/* temp1 - temp4: values */
for (i = 0; i < 4; i++) {
data->block2[i] =
lm93_read_byte(client, LM93_REG_TEMP(i));
}
/* prochot1 - prochot2: values */
for (i = 0; i < 2; i++) {
data->block4[i].cur =
lm93_read_byte(client, LM93_REG_PROCHOT_CUR(i));
data->block4[i].avg =
lm93_read_byte(client, LM93_REG_PROCHOT_AVG(i));
}
/* fan1 - fan4: values & limits */
for (i = 0; i < 4; i++) {
data->block5[i] =
lm93_read_word(client, LM93_REG_FAN(i));
data->block8[i] =
lm93_read_word(client, LM93_REG_FAN_MIN(i));
}
/* pwm control registers */
for (i = 0; i < 2; i++) {
for (j = 0; j < 4; j++) {
data->block9[i][j] =
lm93_read_byte(client, LM93_REG_PWM_CTL(i, j));
}
}
/* alarm values */
for (i = 0, ptr = (u8 *)(&data->block1); i < 8; i++) {
*(ptr + i) =
lm93_read_byte(client, LM93_REG_HOST_ERROR_1 + i);
}
/* auto/pwm (base temp) registers */
for (i = 0; i < 4; i++) {
data->block10.base[i] =
lm93_read_byte(client, LM93_REG_TEMP_BASE(i));
}
/* auto/pwm (offset temp) registers */
for (i = 0; i < 12; i++) {
data->block10.offset[i] =
lm93_read_byte(client, LM93_REG_TEMP_OFFSET(i));
}
lm93_update_client_common(data, client);
}
/* following are the sysfs callback functions */
static ssize_t in_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_IN_FROM_REG(nr, data->block3[nr]));
}
static SENSOR_DEVICE_ATTR_RO(in1_input, in, 0);
static SENSOR_DEVICE_ATTR_RO(in2_input, in, 1);
static SENSOR_DEVICE_ATTR_RO(in3_input, in, 2);
static SENSOR_DEVICE_ATTR_RO(in4_input, in, 3);
static SENSOR_DEVICE_ATTR_RO(in5_input, in, 4);
static SENSOR_DEVICE_ATTR_RO(in6_input, in, 5);
static SENSOR_DEVICE_ATTR_RO(in7_input, in, 6);
static SENSOR_DEVICE_ATTR_RO(in8_input, in, 7);
static SENSOR_DEVICE_ATTR_RO(in9_input, in, 8);
static SENSOR_DEVICE_ATTR_RO(in10_input, in, 9);
static SENSOR_DEVICE_ATTR_RO(in11_input, in, 10);
static SENSOR_DEVICE_ATTR_RO(in12_input, in, 11);
static SENSOR_DEVICE_ATTR_RO(in13_input, in, 12);
static SENSOR_DEVICE_ATTR_RO(in14_input, in, 13);
static SENSOR_DEVICE_ATTR_RO(in15_input, in, 14);
static SENSOR_DEVICE_ATTR_RO(in16_input, in, 15);
static ssize_t in_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
int vccp = nr - 6;
long rc, vid;
if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
vid = LM93_VID_FROM_REG(data->vid[vccp]);
rc = LM93_IN_MIN_FROM_REG(data->vccp_limits[vccp], vid);
} else {
rc = LM93_IN_FROM_REG(nr, data->block7[nr].min);
}
return sprintf(buf, "%ld\n", rc);
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int vccp = nr - 6;
long vid;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
vid = LM93_VID_FROM_REG(data->vid[vccp]);
data->vccp_limits[vccp] = (data->vccp_limits[vccp] & 0xf0) |
LM93_IN_REL_TO_REG(val, 0, vid);
lm93_write_byte(client, LM93_REG_VCCP_LIMIT_OFF(vccp),
data->vccp_limits[vccp]);
} else {
data->block7[nr].min = LM93_IN_TO_REG(nr, val);
lm93_write_byte(client, LM93_REG_IN_MIN(nr),
data->block7[nr].min);
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 5);
static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 6);
static SENSOR_DEVICE_ATTR_RW(in8_min, in_min, 7);
static SENSOR_DEVICE_ATTR_RW(in9_min, in_min, 8);
static SENSOR_DEVICE_ATTR_RW(in10_min, in_min, 9);
static SENSOR_DEVICE_ATTR_RW(in11_min, in_min, 10);
static SENSOR_DEVICE_ATTR_RW(in12_min, in_min, 11);
static SENSOR_DEVICE_ATTR_RW(in13_min, in_min, 12);
static SENSOR_DEVICE_ATTR_RW(in14_min, in_min, 13);
static SENSOR_DEVICE_ATTR_RW(in15_min, in_min, 14);
static SENSOR_DEVICE_ATTR_RW(in16_min, in_min, 15);
static ssize_t in_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
int vccp = nr - 6;
long rc, vid;
if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
vid = LM93_VID_FROM_REG(data->vid[vccp]);
rc = LM93_IN_MAX_FROM_REG(data->vccp_limits[vccp], vid);
} else {
rc = LM93_IN_FROM_REG(nr, data->block7[nr].max);
}
return sprintf(buf, "%ld\n", rc);
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int vccp = nr - 6;
long vid;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if ((nr == 6 || nr == 7) && vccp_limit_type[vccp]) {
vid = LM93_VID_FROM_REG(data->vid[vccp]);
data->vccp_limits[vccp] = (data->vccp_limits[vccp] & 0x0f) |
LM93_IN_REL_TO_REG(val, 1, vid);
lm93_write_byte(client, LM93_REG_VCCP_LIMIT_OFF(vccp),
data->vccp_limits[vccp]);
} else {
data->block7[nr].max = LM93_IN_TO_REG(nr, val);
lm93_write_byte(client, LM93_REG_IN_MAX(nr),
data->block7[nr].max);
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 4);
static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 5);
static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 6);
static SENSOR_DEVICE_ATTR_RW(in8_max, in_max, 7);
static SENSOR_DEVICE_ATTR_RW(in9_max, in_max, 8);
static SENSOR_DEVICE_ATTR_RW(in10_max, in_max, 9);
static SENSOR_DEVICE_ATTR_RW(in11_max, in_max, 10);
static SENSOR_DEVICE_ATTR_RW(in12_max, in_max, 11);
static SENSOR_DEVICE_ATTR_RW(in13_max, in_max, 12);
static SENSOR_DEVICE_ATTR_RW(in14_max, in_max, 13);
static SENSOR_DEVICE_ATTR_RW(in15_max, in_max, 14);
static SENSOR_DEVICE_ATTR_RW(in16_max, in_max, 15);
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->block2[nr]));
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static ssize_t temp_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->temp_lim[nr].min));
}
static ssize_t temp_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_lim[nr].min = LM93_TEMP_TO_REG(val);
lm93_write_byte(client, LM93_REG_TEMP_MIN(nr), data->temp_lim[nr].min);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->temp_lim[nr].max));
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_lim[nr].max = LM93_TEMP_TO_REG(val);
lm93_write_byte(client, LM93_REG_TEMP_MAX(nr), data->temp_lim[nr].max);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
static ssize_t temp_auto_base_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->block10.base[nr]));
}
static ssize_t temp_auto_base_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->block10.base[nr] = LM93_TEMP_TO_REG(val);
lm93_write_byte(client, LM93_REG_TEMP_BASE(nr), data->block10.base[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_auto_base, temp_auto_base, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_base, temp_auto_base, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_base, temp_auto_base, 2);
static ssize_t temp_auto_boost_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_TEMP_FROM_REG(data->boost[nr]));
}
static ssize_t temp_auto_boost_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->boost[nr] = LM93_TEMP_TO_REG(val);
lm93_write_byte(client, LM93_REG_BOOST(nr), data->boost[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_auto_boost, temp_auto_boost, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_boost, temp_auto_boost, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_boost, temp_auto_boost, 2);
static ssize_t temp_auto_boost_hyst_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
return sprintf(buf, "%d\n",
LM93_AUTO_BOOST_HYST_FROM_REGS(data, nr, mode));
}
static ssize_t temp_auto_boost_hyst_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* force 0.5C/bit mode */
data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
data->boost_hyst[nr/2] = LM93_AUTO_BOOST_HYST_TO_REG(data, val, nr, 1);
lm93_write_byte(client, LM93_REG_BOOST_HYST(nr),
data->boost_hyst[nr/2]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_auto_boost_hyst, temp_auto_boost_hyst, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_boost_hyst, temp_auto_boost_hyst, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_boost_hyst, temp_auto_boost_hyst, 2);
static ssize_t temp_auto_offset_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *s_attr = to_sensor_dev_attr_2(attr);
int nr = s_attr->index;
int ofs = s_attr->nr;
struct lm93_data *data = lm93_update_device(dev);
int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
return sprintf(buf, "%d\n",
LM93_TEMP_AUTO_OFFSET_FROM_REG(data->block10.offset[ofs],
nr, mode));
}
static ssize_t temp_auto_offset_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *s_attr = to_sensor_dev_attr_2(attr);
int nr = s_attr->index;
int ofs = s_attr->nr;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* force 0.5C/bit mode */
data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
data->block10.offset[ofs] = LM93_TEMP_AUTO_OFFSET_TO_REG(
data->block10.offset[ofs], val, nr, 1);
lm93_write_byte(client, LM93_REG_TEMP_OFFSET(ofs),
data->block10.offset[ofs]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset1, temp_auto_offset, 0, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset2, temp_auto_offset, 1, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset3, temp_auto_offset, 2, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset4, temp_auto_offset, 3, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset5, temp_auto_offset, 4, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset6, temp_auto_offset, 5, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset7, temp_auto_offset, 6, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset8, temp_auto_offset, 7, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset9, temp_auto_offset, 8, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset10, temp_auto_offset, 9, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset11, temp_auto_offset, 10, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_offset12, temp_auto_offset, 11, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset1, temp_auto_offset, 0, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset2, temp_auto_offset, 1, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset3, temp_auto_offset, 2, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset4, temp_auto_offset, 3, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset5, temp_auto_offset, 4, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset6, temp_auto_offset, 5, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset7, temp_auto_offset, 6, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset8, temp_auto_offset, 7, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset9, temp_auto_offset, 8, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset10, temp_auto_offset, 9, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset11, temp_auto_offset, 10, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_offset12, temp_auto_offset, 11, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset1, temp_auto_offset, 0, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset2, temp_auto_offset, 1, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset3, temp_auto_offset, 2, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset4, temp_auto_offset, 3, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset5, temp_auto_offset, 4, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset6, temp_auto_offset, 5, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset7, temp_auto_offset, 6, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset8, temp_auto_offset, 7, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset9, temp_auto_offset, 8, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset10, temp_auto_offset, 9, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset11, temp_auto_offset, 10, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_offset12, temp_auto_offset, 11, 2);
static ssize_t temp_auto_pwm_min_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
u8 reg, ctl4;
struct lm93_data *data = lm93_update_device(dev);
reg = data->auto_pwm_min_hyst[nr/2] >> 4 & 0x0f;
ctl4 = data->block9[nr][LM93_PWM_CTL4];
return sprintf(buf, "%d\n", LM93_PWM_FROM_REG(reg, (ctl4 & 0x07) ?
LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ));
}
static ssize_t temp_auto_pwm_min_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 reg, ctl4;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
reg = lm93_read_byte(client, LM93_REG_PWM_MIN_HYST(nr));
ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
reg = (reg & 0x0f) |
LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
LM93_PWM_MAP_LO_FREQ :
LM93_PWM_MAP_HI_FREQ) << 4;
data->auto_pwm_min_hyst[nr/2] = reg;
lm93_write_byte(client, LM93_REG_PWM_MIN_HYST(nr), reg);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_auto_pwm_min, temp_auto_pwm_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_pwm_min, temp_auto_pwm_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_pwm_min, temp_auto_pwm_min, 2);
static ssize_t temp_auto_offset_hyst_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
return sprintf(buf, "%d\n", LM93_TEMP_OFFSET_FROM_REG(
data->auto_pwm_min_hyst[nr / 2], mode));
}
static ssize_t temp_auto_offset_hyst_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* force 0.5C/bit mode */
data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
reg = data->auto_pwm_min_hyst[nr/2];
reg = (reg & 0xf0) | (LM93_TEMP_OFFSET_TO_REG(val, 1) & 0x0f);
data->auto_pwm_min_hyst[nr/2] = reg;
lm93_write_byte(client, LM93_REG_PWM_MIN_HYST(nr), reg);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_auto_offset_hyst, temp_auto_offset_hyst, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_offset_hyst, temp_auto_offset_hyst, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_offset_hyst, temp_auto_offset_hyst, 2);
static ssize_t fan_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *s_attr = to_sensor_dev_attr(attr);
int nr = s_attr->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_FAN_FROM_REG(data->block5[nr]));
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
static SENSOR_DEVICE_ATTR_RO(fan4_input, fan_input, 3);
static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_FAN_FROM_REG(data->block8[nr]));
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->block8[nr] = LM93_FAN_TO_REG(val);
lm93_write_word(client, LM93_REG_FAN_MIN(nr), data->block8[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
static SENSOR_DEVICE_ATTR_RW(fan4_min, fan_min, 3);
/*
* some tedious bit-twiddling here to deal with the register format:
*
* data->sf_tach_to_pwm: (tach to pwm mapping bits)
*
* bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
* T4:P2 T4:P1 T3:P2 T3:P1 T2:P2 T2:P1 T1:P2 T1:P1
*
* data->sfc2: (enable bits)
*
* bit | 3 | 2 | 1 | 0
* T4 T3 T2 T1
*/
static ssize_t fan_smart_tach_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
long rc = 0;
int mapping;
/* extract the relevant mapping */
mapping = (data->sf_tach_to_pwm >> (nr * 2)) & 0x03;
/* if there's a mapping and it's enabled */
if (mapping && ((data->sfc2 >> nr) & 0x01))
rc = mapping;
return sprintf(buf, "%ld\n", rc);
}
/*
* helper function - must grab data->update_lock before calling
* fan is 0-3, indicating fan1-fan4
*/
static void lm93_write_fan_smart_tach(struct i2c_client *client,
struct lm93_data *data, int fan, long value)
{
/* insert the new mapping and write it out */
data->sf_tach_to_pwm = lm93_read_byte(client, LM93_REG_SF_TACH_TO_PWM);
data->sf_tach_to_pwm &= ~(0x3 << fan * 2);
data->sf_tach_to_pwm |= value << fan * 2;
lm93_write_byte(client, LM93_REG_SF_TACH_TO_PWM, data->sf_tach_to_pwm);
/* insert the enable bit and write it out */
data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
if (value)
data->sfc2 |= 1 << fan;
else
data->sfc2 &= ~(1 << fan);
lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
}
static ssize_t fan_smart_tach_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* sanity test, ignore the write otherwise */
if (val <= 2) {
/* can't enable if pwm freq is 22.5KHz */
if (val) {
u8 ctl4 = lm93_read_byte(client,
LM93_REG_PWM_CTL(val - 1, LM93_PWM_CTL4));
if ((ctl4 & 0x07) == 0)
val = 0;
}
lm93_write_fan_smart_tach(client, data, nr, val);
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(fan1_smart_tach, fan_smart_tach, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_smart_tach, fan_smart_tach, 1);
static SENSOR_DEVICE_ATTR_RW(fan3_smart_tach, fan_smart_tach, 2);
static SENSOR_DEVICE_ATTR_RW(fan4_smart_tach, fan_smart_tach, 3);
static ssize_t pwm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
u8 ctl2, ctl4;
long rc;
ctl2 = data->block9[nr][LM93_PWM_CTL2];
ctl4 = data->block9[nr][LM93_PWM_CTL4];
if (ctl2 & 0x01) /* show user commanded value if enabled */
rc = data->pwm_override[nr];
else /* show present h/w value if manual pwm disabled */
rc = LM93_PWM_FROM_REG(ctl2 >> 4, (ctl4 & 0x07) ?
LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ);
return sprintf(buf, "%ld\n", rc);
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 ctl2, ctl4;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
ctl2 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2));
ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
ctl2 = (ctl2 & 0x0f) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ) << 4;
/* save user commanded value */
data->pwm_override[nr] = LM93_PWM_FROM_REG(ctl2 >> 4,
(ctl4 & 0x07) ? LM93_PWM_MAP_LO_FREQ :
LM93_PWM_MAP_HI_FREQ);
lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2), ctl2);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
static ssize_t pwm_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
u8 ctl2;
long rc;
ctl2 = data->block9[nr][LM93_PWM_CTL2];
if (ctl2 & 0x01) /* manual override enabled ? */
rc = ((ctl2 & 0xF0) == 0xF0) ? 0 : 1;
else
rc = 2;
return sprintf(buf, "%ld\n", rc);
}
static ssize_t pwm_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 ctl2;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
ctl2 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2));
switch (val) {
case 0:
ctl2 |= 0xF1; /* enable manual override, set PWM to max */
break;
case 1:
ctl2 |= 0x01; /* enable manual override */
break;
case 2:
ctl2 &= ~0x01; /* disable manual override */
break;
default:
mutex_unlock(&data->update_lock);
return -EINVAL;
}
lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2), ctl2);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
static ssize_t pwm_freq_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
u8 ctl4;
ctl4 = data->block9[nr][LM93_PWM_CTL4];
return sprintf(buf, "%d\n", LM93_PWM_FREQ_FROM_REG(ctl4));
}
/*
* helper function - must grab data->update_lock before calling
* pwm is 0-1, indicating pwm1-pwm2
* this disables smart tach for all tach channels bound to the given pwm
*/
static void lm93_disable_fan_smart_tach(struct i2c_client *client,
struct lm93_data *data, int pwm)
{
int mapping = lm93_read_byte(client, LM93_REG_SF_TACH_TO_PWM);
int mask;
/* collapse the mapping into a mask of enable bits */
mapping = (mapping >> pwm) & 0x55;
mask = mapping & 0x01;
mask |= (mapping & 0x04) >> 1;
mask |= (mapping & 0x10) >> 2;
mask |= (mapping & 0x40) >> 3;
/* disable smart tach according to the mask */
data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
data->sfc2 &= ~mask;
lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
}
static ssize_t pwm_freq_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 ctl4;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
ctl4 = (ctl4 & 0xf8) | LM93_PWM_FREQ_TO_REG(val);
data->block9[nr][LM93_PWM_CTL4] = ctl4;
/* ctl4 == 0 -> 22.5KHz -> disable smart tach */
if (!ctl4)
lm93_disable_fan_smart_tach(client, data, nr);
lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4), ctl4);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_freq, pwm_freq, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_freq, pwm_freq, 1);
static ssize_t pwm_auto_channels_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", data->block9[nr][LM93_PWM_CTL1]);
}
static ssize_t pwm_auto_channels_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->block9[nr][LM93_PWM_CTL1] = clamp_val(val, 0, 255);
lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL1),
data->block9[nr][LM93_PWM_CTL1]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_channels, pwm_auto_channels, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_channels, pwm_auto_channels, 1);
static ssize_t pwm_auto_spinup_min_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
u8 ctl3, ctl4;
ctl3 = data->block9[nr][LM93_PWM_CTL3];
ctl4 = data->block9[nr][LM93_PWM_CTL4];
return sprintf(buf, "%d\n",
LM93_PWM_FROM_REG(ctl3 & 0x0f, (ctl4 & 0x07) ?
LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ));
}
static ssize_t pwm_auto_spinup_min_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 ctl3, ctl4;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
ctl3 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3));
ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
ctl3 = (ctl3 & 0xf0) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
LM93_PWM_MAP_LO_FREQ :
LM93_PWM_MAP_HI_FREQ);
data->block9[nr][LM93_PWM_CTL3] = ctl3;
lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3), ctl3);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_spinup_min, pwm_auto_spinup_min, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_spinup_min, pwm_auto_spinup_min, 1);
static ssize_t pwm_auto_spinup_time_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_SPINUP_TIME_FROM_REG(
data->block9[nr][LM93_PWM_CTL3]));
}
static ssize_t pwm_auto_spinup_time_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 ctl3;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
ctl3 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3));
ctl3 = (ctl3 & 0x1f) | (LM93_SPINUP_TIME_TO_REG(val) << 5 & 0xe0);
data->block9[nr][LM93_PWM_CTL3] = ctl3;
lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3), ctl3);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_spinup_time, pwm_auto_spinup_time, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_spinup_time, pwm_auto_spinup_time, 1);
static ssize_t pwm_auto_prochot_ramp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n",
LM93_RAMP_FROM_REG(data->pwm_ramp_ctl >> 4 & 0x0f));
}
static ssize_t pwm_auto_prochot_ramp_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 ramp;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
ramp = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
ramp = (ramp & 0x0f) | (LM93_RAMP_TO_REG(val) << 4 & 0xf0);
lm93_write_byte(client, LM93_REG_PWM_RAMP_CTL, ramp);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(pwm_auto_prochot_ramp);
static ssize_t pwm_auto_vrdhot_ramp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n",
LM93_RAMP_FROM_REG(data->pwm_ramp_ctl & 0x0f));
}
static ssize_t pwm_auto_vrdhot_ramp_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 ramp;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
ramp = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
ramp = (ramp & 0xf0) | (LM93_RAMP_TO_REG(val) & 0x0f);
lm93_write_byte(client, LM93_REG_PWM_RAMP_CTL, ramp);
mutex_unlock(&data->update_lock);
return 0;
}
static DEVICE_ATTR_RW(pwm_auto_vrdhot_ramp);
static ssize_t vid_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_VID_FROM_REG(data->vid[nr]));
}
static SENSOR_DEVICE_ATTR_RO(cpu0_vid, vid, 0);
static SENSOR_DEVICE_ATTR_RO(cpu1_vid, vid, 1);
static ssize_t prochot_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", data->block4[nr].cur);
}
static SENSOR_DEVICE_ATTR_RO(prochot1, prochot, 0);
static SENSOR_DEVICE_ATTR_RO(prochot2, prochot, 1);
static ssize_t prochot_avg_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", data->block4[nr].avg);
}
static SENSOR_DEVICE_ATTR_RO(prochot1_avg, prochot_avg, 0);
static SENSOR_DEVICE_ATTR_RO(prochot2_avg, prochot_avg, 1);
static ssize_t prochot_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", data->prochot_max[nr]);
}
static ssize_t prochot_max_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->prochot_max[nr] = LM93_PROCHOT_TO_REG(val);
lm93_write_byte(client, LM93_REG_PROCHOT_MAX(nr),
data->prochot_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(prochot1_max, prochot_max, 0);
static SENSOR_DEVICE_ATTR_RW(prochot2_max, prochot_max, 1);
static const u8 prochot_override_mask[] = { 0x80, 0x40 };
static ssize_t prochot_override_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n",
(data->prochot_override & prochot_override_mask[nr]) ? 1 : 0);
}
static ssize_t prochot_override_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (val)
data->prochot_override |= prochot_override_mask[nr];
else
data->prochot_override &= (~prochot_override_mask[nr]);
lm93_write_byte(client, LM93_REG_PROCHOT_OVERRIDE,
data->prochot_override);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(prochot1_override, prochot_override, 0);
static SENSOR_DEVICE_ATTR_RW(prochot2_override, prochot_override, 1);
static ssize_t prochot_interval_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
u8 tmp;
if (nr == 1)
tmp = (data->prochot_interval & 0xf0) >> 4;
else
tmp = data->prochot_interval & 0x0f;
return sprintf(buf, "%d\n", LM93_INTERVAL_FROM_REG(tmp));
}
static ssize_t prochot_interval_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 tmp;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
tmp = lm93_read_byte(client, LM93_REG_PROCHOT_INTERVAL);
if (nr == 1)
tmp = (tmp & 0x0f) | (LM93_INTERVAL_TO_REG(val) << 4);
else
tmp = (tmp & 0xf0) | LM93_INTERVAL_TO_REG(val);
data->prochot_interval = tmp;
lm93_write_byte(client, LM93_REG_PROCHOT_INTERVAL, tmp);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(prochot1_interval, prochot_interval, 0);
static SENSOR_DEVICE_ATTR_RW(prochot2_interval, prochot_interval, 1);
static ssize_t prochot_override_duty_cycle_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", data->prochot_override & 0x0f);
}
static ssize_t prochot_override_duty_cycle_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->prochot_override = (data->prochot_override & 0xf0) |
clamp_val(val, 0, 15);
lm93_write_byte(client, LM93_REG_PROCHOT_OVERRIDE,
data->prochot_override);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(prochot_override_duty_cycle);
static ssize_t prochot_short_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", (data->config & 0x10) ? 1 : 0);
}
static ssize_t prochot_short_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm93_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (val)
data->config |= 0x10;
else
data->config &= ~0x10;
lm93_write_byte(client, LM93_REG_CONFIG, data->config);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(prochot_short);
static ssize_t vrdhot_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = (to_sensor_dev_attr(attr))->index;
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n",
data->block1.host_status_1 & (1 << (nr + 4)) ? 1 : 0);
}
static SENSOR_DEVICE_ATTR_RO(vrdhot1, vrdhot, 0);
static SENSOR_DEVICE_ATTR_RO(vrdhot2, vrdhot, 1);
static ssize_t gpio_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_GPI_FROM_REG(data->gpi));
}
static DEVICE_ATTR_RO(gpio);
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm93_data *data = lm93_update_device(dev);
return sprintf(buf, "%d\n", LM93_ALARMS_FROM_REG(data->block1));
}
static DEVICE_ATTR_RO(alarms);
static struct attribute *lm93_attrs[] = {
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in8_input.dev_attr.attr,
&sensor_dev_attr_in9_input.dev_attr.attr,
&sensor_dev_attr_in10_input.dev_attr.attr,
&sensor_dev_attr_in11_input.dev_attr.attr,
&sensor_dev_attr_in12_input.dev_attr.attr,
&sensor_dev_attr_in13_input.dev_attr.attr,
&sensor_dev_attr_in14_input.dev_attr.attr,
&sensor_dev_attr_in15_input.dev_attr.attr,
&sensor_dev_attr_in16_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in8_min.dev_attr.attr,
&sensor_dev_attr_in9_min.dev_attr.attr,
&sensor_dev_attr_in10_min.dev_attr.attr,
&sensor_dev_attr_in11_min.dev_attr.attr,
&sensor_dev_attr_in12_min.dev_attr.attr,
&sensor_dev_attr_in13_min.dev_attr.attr,
&sensor_dev_attr_in14_min.dev_attr.attr,
&sensor_dev_attr_in15_min.dev_attr.attr,
&sensor_dev_attr_in16_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in8_max.dev_attr.attr,
&sensor_dev_attr_in9_max.dev_attr.attr,
&sensor_dev_attr_in10_max.dev_attr.attr,
&sensor_dev_attr_in11_max.dev_attr.attr,
&sensor_dev_attr_in12_max.dev_attr.attr,
&sensor_dev_attr_in13_max.dev_attr.attr,
&sensor_dev_attr_in14_max.dev_attr.attr,
&sensor_dev_attr_in15_max.dev_attr.attr,
&sensor_dev_attr_in16_max.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp1_auto_base.dev_attr.attr,
&sensor_dev_attr_temp2_auto_base.dev_attr.attr,
&sensor_dev_attr_temp3_auto_base.dev_attr.attr,
&sensor_dev_attr_temp1_auto_boost.dev_attr.attr,
&sensor_dev_attr_temp2_auto_boost.dev_attr.attr,
&sensor_dev_attr_temp3_auto_boost.dev_attr.attr,
&sensor_dev_attr_temp1_auto_boost_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_auto_boost_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_auto_boost_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset1.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset2.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset3.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset4.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset5.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset6.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset7.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset8.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset9.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset10.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset11.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset12.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset1.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset2.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset3.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset4.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset5.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset6.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset7.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset8.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset9.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset10.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset11.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset12.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset1.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset2.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset3.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset4.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset5.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset6.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset7.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset8.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset9.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset10.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset11.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset12.dev_attr.attr,
&sensor_dev_attr_temp1_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_temp2_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_temp3_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_temp1_auto_offset_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_auto_offset_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_auto_offset_hyst.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan1_smart_tach.dev_attr.attr,
&sensor_dev_attr_fan2_smart_tach.dev_attr.attr,
&sensor_dev_attr_fan3_smart_tach.dev_attr.attr,
&sensor_dev_attr_fan4_smart_tach.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_spinup_min.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_spinup_min.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_spinup_time.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_spinup_time.dev_attr.attr,
&dev_attr_pwm_auto_prochot_ramp.attr,
&dev_attr_pwm_auto_vrdhot_ramp.attr,
&sensor_dev_attr_cpu0_vid.dev_attr.attr,
&sensor_dev_attr_cpu1_vid.dev_attr.attr,
&sensor_dev_attr_prochot1.dev_attr.attr,
&sensor_dev_attr_prochot2.dev_attr.attr,
&sensor_dev_attr_prochot1_avg.dev_attr.attr,
&sensor_dev_attr_prochot2_avg.dev_attr.attr,
&sensor_dev_attr_prochot1_max.dev_attr.attr,
&sensor_dev_attr_prochot2_max.dev_attr.attr,
&sensor_dev_attr_prochot1_override.dev_attr.attr,
&sensor_dev_attr_prochot2_override.dev_attr.attr,
&sensor_dev_attr_prochot1_interval.dev_attr.attr,
&sensor_dev_attr_prochot2_interval.dev_attr.attr,
&dev_attr_prochot_override_duty_cycle.attr,
&dev_attr_prochot_short.attr,
&sensor_dev_attr_vrdhot1.dev_attr.attr,
&sensor_dev_attr_vrdhot2.dev_attr.attr,
&dev_attr_gpio.attr,
&dev_attr_alarms.attr,
NULL
};
ATTRIBUTE_GROUPS(lm93);
static void lm93_init_client(struct i2c_client *client)
{
int i;
u8 reg;
/* configure VID pin input thresholds */
reg = lm93_read_byte(client, LM93_REG_GPI_VID_CTL);
lm93_write_byte(client, LM93_REG_GPI_VID_CTL,
reg | (vid_agtl ? 0x03 : 0x00));
if (init) {
/* enable #ALERT pin */
reg = lm93_read_byte(client, LM93_REG_CONFIG);
lm93_write_byte(client, LM93_REG_CONFIG, reg | 0x08);
/* enable ASF mode for BMC status registers */
reg = lm93_read_byte(client, LM93_REG_STATUS_CONTROL);
lm93_write_byte(client, LM93_REG_STATUS_CONTROL, reg | 0x02);
/* set sleep state to S0 */
lm93_write_byte(client, LM93_REG_SLEEP_CONTROL, 0);
/* unmask #VRDHOT and dynamic VCCP (if nec) error events */
reg = lm93_read_byte(client, LM93_REG_MISC_ERR_MASK);
reg &= ~0x03;
reg &= ~(vccp_limit_type[0] ? 0x10 : 0);
reg &= ~(vccp_limit_type[1] ? 0x20 : 0);
lm93_write_byte(client, LM93_REG_MISC_ERR_MASK, reg);
}
/* start monitoring */
reg = lm93_read_byte(client, LM93_REG_CONFIG);
lm93_write_byte(client, LM93_REG_CONFIG, reg | 0x01);
/* spin until ready */
for (i = 0; i < 20; i++) {
msleep(10);
if ((lm93_read_byte(client, LM93_REG_CONFIG) & 0x80) == 0x80)
return;
}
dev_warn(&client->dev,
"timed out waiting for sensor chip to signal ready!\n");
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm93_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int mfr, ver;
const char *name;
if (!i2c_check_functionality(adapter, LM93_SMBUS_FUNC_MIN))
return -ENODEV;
/* detection */
mfr = lm93_read_byte(client, LM93_REG_MFR_ID);
if (mfr != 0x01) {
dev_dbg(&adapter->dev,
"detect failed, bad manufacturer id 0x%02x!\n", mfr);
return -ENODEV;
}
ver = lm93_read_byte(client, LM93_REG_VER);
switch (ver) {
case LM93_MFR_ID:
case LM93_MFR_ID_PROTOTYPE:
name = "lm93";
break;
case LM94_MFR_ID_2:
case LM94_MFR_ID:
case LM94_MFR_ID_PROTOTYPE:
name = "lm94";
break;
default:
dev_dbg(&adapter->dev,
"detect failed, bad version id 0x%02x!\n", ver);
return -ENODEV;
}
strscpy(info->type, name, I2C_NAME_SIZE);
dev_dbg(&adapter->dev, "loading %s at %d, 0x%02x\n",
client->name, i2c_adapter_id(client->adapter),
client->addr);
return 0;
}
static int lm93_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct lm93_data *data;
struct device *hwmon_dev;
int func;
void (*update)(struct lm93_data *, struct i2c_client *);
/* choose update routine based on bus capabilities */
func = i2c_get_functionality(client->adapter);
if (((LM93_SMBUS_FUNC_FULL & func) == LM93_SMBUS_FUNC_FULL) &&
(!disable_block)) {
dev_dbg(dev, "using SMBus block data transactions\n");
update = lm93_update_client_full;
} else if ((LM93_SMBUS_FUNC_MIN & func) == LM93_SMBUS_FUNC_MIN) {
dev_dbg(dev, "disabled SMBus block data transactions\n");
update = lm93_update_client_min;
} else {
dev_dbg(dev, "detect failed, smbus byte and/or word data not supported!\n");
return -ENODEV;
}
data = devm_kzalloc(dev, sizeof(struct lm93_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
/* housekeeping */
data->client = client;
data->update = update;
mutex_init(&data->update_lock);
/* initialize the chip */
lm93_init_client(client);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
lm93_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id lm93_id[] = {
{ "lm93", 0 },
{ "lm94", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm93_id);
static struct i2c_driver lm93_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm93",
},
.probe = lm93_probe,
.id_table = lm93_id,
.detect = lm93_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm93_driver);
MODULE_AUTHOR("Mark M. Hoffman <[email protected]>, "
"Hans J. Koch <[email protected]>");
MODULE_DESCRIPTION("LM93 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm93.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* asb100.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
*
* Copyright (C) 2004 Mark M. Hoffman <[email protected]>
*
* (derived from w83781d.c)
*
* Copyright (C) 1998 - 2003 Frodo Looijaard <[email protected]>,
* Philip Edelbrock <[email protected]>, and
* Mark Studebaker <[email protected]>
*/
/*
* This driver supports the hardware sensor chips: Asus ASB100 and
* ASB100-A "BACH".
*
* ASB100-A supports pwm1, while plain ASB100 does not. There is no known
* way for the driver to tell which one is there.
*
* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* asb100 7 3 1 4 0x31 0x0694 yes no
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/mutex.h>
#include "lm75.h"
/* I2C addresses to scan */
static const unsigned short normal_i2c[] = { 0x2d, I2C_CLIENT_END };
static unsigned short force_subclients[4];
module_param_array(force_subclients, short, NULL, 0);
MODULE_PARM_DESC(force_subclients,
"List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
/* Voltage IN registers 0-6 */
#define ASB100_REG_IN(nr) (0x20 + (nr))
#define ASB100_REG_IN_MAX(nr) (0x2b + (nr * 2))
#define ASB100_REG_IN_MIN(nr) (0x2c + (nr * 2))
/* FAN IN registers 1-3 */
#define ASB100_REG_FAN(nr) (0x28 + (nr))
#define ASB100_REG_FAN_MIN(nr) (0x3b + (nr))
/* TEMPERATURE registers 1-4 */
static const u16 asb100_reg_temp[] = {0, 0x27, 0x150, 0x250, 0x17};
static const u16 asb100_reg_temp_max[] = {0, 0x39, 0x155, 0x255, 0x18};
static const u16 asb100_reg_temp_hyst[] = {0, 0x3a, 0x153, 0x253, 0x19};
#define ASB100_REG_TEMP(nr) (asb100_reg_temp[nr])
#define ASB100_REG_TEMP_MAX(nr) (asb100_reg_temp_max[nr])
#define ASB100_REG_TEMP_HYST(nr) (asb100_reg_temp_hyst[nr])
#define ASB100_REG_TEMP2_CONFIG 0x0152
#define ASB100_REG_TEMP3_CONFIG 0x0252
#define ASB100_REG_CONFIG 0x40
#define ASB100_REG_ALARM1 0x41
#define ASB100_REG_ALARM2 0x42
#define ASB100_REG_SMIM1 0x43
#define ASB100_REG_SMIM2 0x44
#define ASB100_REG_VID_FANDIV 0x47
#define ASB100_REG_I2C_ADDR 0x48
#define ASB100_REG_CHIPID 0x49
#define ASB100_REG_I2C_SUBADDR 0x4a
#define ASB100_REG_PIN 0x4b
#define ASB100_REG_IRQ 0x4c
#define ASB100_REG_BANK 0x4e
#define ASB100_REG_CHIPMAN 0x4f
#define ASB100_REG_WCHIPID 0x58
/* bit 7 -> enable, bits 0-3 -> duty cycle */
#define ASB100_REG_PWM1 0x59
/*
* CONVERSIONS
* Rounding and limit checking is only done on the TO_REG variants.
*/
/* These constants are a guess, consistent w/ w83781d */
#define ASB100_IN_MIN 0
#define ASB100_IN_MAX 4080
/*
* IN: 1/1000 V (0V to 4.08V)
* REG: 16mV/bit
*/
static u8 IN_TO_REG(unsigned val)
{
unsigned nval = clamp_val(val, ASB100_IN_MIN, ASB100_IN_MAX);
return (nval + 8) / 16;
}
static unsigned IN_FROM_REG(u8 reg)
{
return reg * 16;
}
static u8 FAN_TO_REG(long rpm, int div)
{
if (rpm == -1)
return 0;
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
static int FAN_FROM_REG(u8 val, int div)
{
return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div);
}
/* These constants are a guess, consistent w/ w83781d */
#define ASB100_TEMP_MIN -128000
#define ASB100_TEMP_MAX 127000
/*
* TEMP: 0.001C/bit (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static u8 TEMP_TO_REG(long temp)
{
int ntemp = clamp_val(temp, ASB100_TEMP_MIN, ASB100_TEMP_MAX);
ntemp += (ntemp < 0 ? -500 : 500);
return (u8)(ntemp / 1000);
}
static int TEMP_FROM_REG(u8 reg)
{
return (s8)reg * 1000;
}
/*
* PWM: 0 - 255 per sensors documentation
* REG: (6.25% duty cycle per bit)
*/
static u8 ASB100_PWM_TO_REG(int pwm)
{
pwm = clamp_val(pwm, 0, 255);
return (u8)(pwm / 16);
}
static int ASB100_PWM_FROM_REG(u8 reg)
{
return reg * 16;
}
#define DIV_FROM_REG(val) (1 << (val))
/*
* FAN DIV: 1, 2, 4, or 8 (defaults to 2)
* REG: 0, 1, 2, or 3 (respectively) (defaults to 1)
*/
static u8 DIV_TO_REG(long val)
{
return val == 8 ? 3 : val == 4 ? 2 : val == 1 ? 0 : 1;
}
/*
* For each registered client, we need to keep some data in memory. That
* data is pointed to by client->data. The structure itself is
* dynamically allocated, at the same time the client itself is allocated.
*/
struct asb100_data {
struct device *hwmon_dev;
struct mutex lock;
struct mutex update_lock;
unsigned long last_updated; /* In jiffies */
/* array of 2 pointers to subclients */
struct i2c_client *lm75[2];
bool valid; /* true if following fields are valid */
u8 in[7]; /* Register value */
u8 in_max[7]; /* Register value */
u8 in_min[7]; /* Register value */
u8 fan[3]; /* Register value */
u8 fan_min[3]; /* Register value */
u16 temp[4]; /* Register value (0 and 3 are u8 only) */
u16 temp_max[4]; /* Register value (0 and 3 are u8 only) */
u16 temp_hyst[4]; /* Register value (0 and 3 are u8 only) */
u8 fan_div[3]; /* Register encoding, right justified */
u8 pwm; /* Register encoding */
u8 vid; /* Register encoding, combined */
u32 alarms; /* Register encoding, combined */
u8 vrm;
};
static int asb100_read_value(struct i2c_client *client, u16 reg);
static void asb100_write_value(struct i2c_client *client, u16 reg, u16 val);
static int asb100_probe(struct i2c_client *client);
static int asb100_detect(struct i2c_client *client,
struct i2c_board_info *info);
static void asb100_remove(struct i2c_client *client);
static struct asb100_data *asb100_update_device(struct device *dev);
static void asb100_init_client(struct i2c_client *client);
static const struct i2c_device_id asb100_id[] = {
{ "asb100", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, asb100_id);
static struct i2c_driver asb100_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "asb100",
},
.probe = asb100_probe,
.remove = asb100_remove,
.id_table = asb100_id,
.detect = asb100_detect,
.address_list = normal_i2c,
};
/* 7 Voltages */
#define show_in_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
int nr = to_sensor_dev_attr(attr)->index; \
struct asb100_data *data = asb100_update_device(dev); \
return sprintf(buf, "%d\n", IN_FROM_REG(data->reg[nr])); \
}
show_in_reg(in)
show_in_reg(in_min)
show_in_reg(in_max)
#define set_in_reg(REG, reg) \
static ssize_t set_in_##reg(struct device *dev, struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
int nr = to_sensor_dev_attr(attr)->index; \
struct i2c_client *client = to_i2c_client(dev); \
struct asb100_data *data = i2c_get_clientdata(client); \
unsigned long val; \
int err = kstrtoul(buf, 10, &val); \
if (err) \
return err; \
mutex_lock(&data->update_lock); \
data->in_##reg[nr] = IN_TO_REG(val); \
asb100_write_value(client, ASB100_REG_IN_##REG(nr), \
data->in_##reg[nr]); \
mutex_unlock(&data->update_lock); \
return count; \
}
set_in_reg(MIN, min)
set_in_reg(MAX, max)
#define sysfs_in(offset) \
static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
show_in, NULL, offset); \
static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
show_in_min, set_in_min, offset); \
static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
show_in_max, set_in_max, offset)
sysfs_in(0);
sysfs_in(1);
sysfs_in(2);
sysfs_in(3);
sysfs_in(4);
sysfs_in(5);
sysfs_in(6);
/* 3 Fans */
static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
}
static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct i2c_client *client = to_i2c_client(dev);
struct asb100_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
asb100_write_value(client, ASB100_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct i2c_client *client = to_i2c_client(dev);
struct asb100_data *data = i2c_get_clientdata(client);
unsigned long min;
int reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
min = FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr]));
data->fan_div[nr] = DIV_TO_REG(val);
switch (nr) {
case 0: /* fan 1 */
reg = asb100_read_value(client, ASB100_REG_VID_FANDIV);
reg = (reg & 0xcf) | (data->fan_div[0] << 4);
asb100_write_value(client, ASB100_REG_VID_FANDIV, reg);
break;
case 1: /* fan 2 */
reg = asb100_read_value(client, ASB100_REG_VID_FANDIV);
reg = (reg & 0x3f) | (data->fan_div[1] << 6);
asb100_write_value(client, ASB100_REG_VID_FANDIV, reg);
break;
case 2: /* fan 3 */
reg = asb100_read_value(client, ASB100_REG_PIN);
reg = (reg & 0x3f) | (data->fan_div[2] << 6);
asb100_write_value(client, ASB100_REG_PIN, reg);
break;
}
data->fan_min[nr] =
FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
asb100_write_value(client, ASB100_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
#define sysfs_fan(offset) \
static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
show_fan, NULL, offset - 1); \
static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
show_fan_min, set_fan_min, offset - 1); \
static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
show_fan_div, set_fan_div, offset - 1)
sysfs_fan(1);
sysfs_fan(2);
sysfs_fan(3);
/* 4 Temp. Sensors */
static int sprintf_temp_from_reg(u16 reg, char *buf, int nr)
{
int ret = 0;
switch (nr) {
case 1: case 2:
ret = sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(reg));
break;
case 0: case 3: default:
ret = sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
break;
}
return ret;
}
#define show_temp_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
int nr = to_sensor_dev_attr(attr)->index; \
struct asb100_data *data = asb100_update_device(dev); \
return sprintf_temp_from_reg(data->reg[nr], buf, nr); \
}
show_temp_reg(temp);
show_temp_reg(temp_max);
show_temp_reg(temp_hyst);
#define set_temp_reg(REG, reg) \
static ssize_t set_##reg(struct device *dev, struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
int nr = to_sensor_dev_attr(attr)->index; \
struct i2c_client *client = to_i2c_client(dev); \
struct asb100_data *data = i2c_get_clientdata(client); \
long val; \
int err = kstrtol(buf, 10, &val); \
if (err) \
return err; \
mutex_lock(&data->update_lock); \
switch (nr) { \
case 1: case 2: \
data->reg[nr] = LM75_TEMP_TO_REG(val); \
break; \
case 0: case 3: default: \
data->reg[nr] = TEMP_TO_REG(val); \
break; \
} \
asb100_write_value(client, ASB100_REG_TEMP_##REG(nr+1), \
data->reg[nr]); \
mutex_unlock(&data->update_lock); \
return count; \
}
set_temp_reg(MAX, temp_max);
set_temp_reg(HYST, temp_hyst);
#define sysfs_temp(num) \
static SENSOR_DEVICE_ATTR(temp##num##_input, S_IRUGO, \
show_temp, NULL, num - 1); \
static SENSOR_DEVICE_ATTR(temp##num##_max, S_IRUGO | S_IWUSR, \
show_temp_max, set_temp_max, num - 1); \
static SENSOR_DEVICE_ATTR(temp##num##_max_hyst, S_IRUGO | S_IWUSR, \
show_temp_hyst, set_temp_hyst, num - 1)
sysfs_temp(1);
sysfs_temp(2);
sysfs_temp(3);
sysfs_temp(4);
/* VID */
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
/* VRM */
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct asb100_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct asb100_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
/* Alarms */
static DEVICE_ATTR_RW(vrm);
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%u\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
/* 1 PWM */
static ssize_t pwm1_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%d\n", ASB100_PWM_FROM_REG(data->pwm & 0x0f));
}
static ssize_t pwm1_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct asb100_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm &= 0x80; /* keep the enable bit */
data->pwm |= (0x0f & ASB100_PWM_TO_REG(val));
asb100_write_value(client, ASB100_REG_PWM1, data->pwm);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm1_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct asb100_data *data = asb100_update_device(dev);
return sprintf(buf, "%d\n", (data->pwm & 0x80) ? 1 : 0);
}
static ssize_t pwm1_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct asb100_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm &= 0x0f; /* keep the duty cycle bits */
data->pwm |= (val ? 0x80 : 0x00);
asb100_write_value(client, ASB100_REG_PWM1, data->pwm);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(pwm1);
static DEVICE_ATTR_RW(pwm1_enable);
static struct attribute *asb100_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_div.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_temp4_max.dev_attr.attr,
&sensor_dev_attr_temp4_max_hyst.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
&dev_attr_alarms.attr,
&dev_attr_pwm1.attr,
&dev_attr_pwm1_enable.attr,
NULL
};
static const struct attribute_group asb100_group = {
.attrs = asb100_attributes,
};
static int asb100_detect_subclients(struct i2c_client *client)
{
int i, id, err;
int address = client->addr;
unsigned short sc_addr[2];
struct asb100_data *data = i2c_get_clientdata(client);
struct i2c_adapter *adapter = client->adapter;
id = i2c_adapter_id(adapter);
if (force_subclients[0] == id && force_subclients[1] == address) {
for (i = 2; i <= 3; i++) {
if (force_subclients[i] < 0x48 ||
force_subclients[i] > 0x4f) {
dev_err(&client->dev,
"invalid subclient address %d; must be 0x48-0x4f\n",
force_subclients[i]);
err = -ENODEV;
goto ERROR_SC_2;
}
}
asb100_write_value(client, ASB100_REG_I2C_SUBADDR,
(force_subclients[2] & 0x07) |
((force_subclients[3] & 0x07) << 4));
sc_addr[0] = force_subclients[2];
sc_addr[1] = force_subclients[3];
} else {
int val = asb100_read_value(client, ASB100_REG_I2C_SUBADDR);
sc_addr[0] = 0x48 + (val & 0x07);
sc_addr[1] = 0x48 + ((val >> 4) & 0x07);
}
if (sc_addr[0] == sc_addr[1]) {
dev_err(&client->dev,
"duplicate addresses 0x%x for subclients\n",
sc_addr[0]);
err = -ENODEV;
goto ERROR_SC_2;
}
data->lm75[0] = i2c_new_dummy_device(adapter, sc_addr[0]);
if (IS_ERR(data->lm75[0])) {
dev_err(&client->dev,
"subclient %d registration at address 0x%x failed.\n",
1, sc_addr[0]);
err = PTR_ERR(data->lm75[0]);
goto ERROR_SC_2;
}
data->lm75[1] = i2c_new_dummy_device(adapter, sc_addr[1]);
if (IS_ERR(data->lm75[1])) {
dev_err(&client->dev,
"subclient %d registration at address 0x%x failed.\n",
2, sc_addr[1]);
err = PTR_ERR(data->lm75[1]);
goto ERROR_SC_3;
}
return 0;
/* Undo inits in case of errors */
ERROR_SC_3:
i2c_unregister_device(data->lm75[0]);
ERROR_SC_2:
return err;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int asb100_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int val1, val2;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
pr_debug("detect failed, smbus byte data not supported!\n");
return -ENODEV;
}
val1 = i2c_smbus_read_byte_data(client, ASB100_REG_BANK);
val2 = i2c_smbus_read_byte_data(client, ASB100_REG_CHIPMAN);
/* If we're in bank 0 */
if ((!(val1 & 0x07)) &&
/* Check for ASB100 ID (low byte) */
(((!(val1 & 0x80)) && (val2 != 0x94)) ||
/* Check for ASB100 ID (high byte ) */
((val1 & 0x80) && (val2 != 0x06)))) {
pr_debug("detect failed, bad chip id 0x%02x!\n", val2);
return -ENODEV;
}
/* Put it now into bank 0 and Vendor ID High Byte */
i2c_smbus_write_byte_data(client, ASB100_REG_BANK,
(i2c_smbus_read_byte_data(client, ASB100_REG_BANK) & 0x78)
| 0x80);
/* Determine the chip type. */
val1 = i2c_smbus_read_byte_data(client, ASB100_REG_WCHIPID);
val2 = i2c_smbus_read_byte_data(client, ASB100_REG_CHIPMAN);
if (val1 != 0x31 || val2 != 0x06)
return -ENODEV;
strscpy(info->type, "asb100", I2C_NAME_SIZE);
return 0;
}
static int asb100_probe(struct i2c_client *client)
{
int err;
struct asb100_data *data;
data = devm_kzalloc(&client->dev, sizeof(struct asb100_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->lock);
mutex_init(&data->update_lock);
/* Attach secondary lm75 clients */
err = asb100_detect_subclients(client);
if (err)
return err;
/* Initialize the chip */
asb100_init_client(client);
/* A few vars need to be filled upon startup */
data->fan_min[0] = asb100_read_value(client, ASB100_REG_FAN_MIN(0));
data->fan_min[1] = asb100_read_value(client, ASB100_REG_FAN_MIN(1));
data->fan_min[2] = asb100_read_value(client, ASB100_REG_FAN_MIN(2));
/* Register sysfs hooks */
err = sysfs_create_group(&client->dev.kobj, &asb100_group);
if (err)
goto ERROR3;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto ERROR4;
}
return 0;
ERROR4:
sysfs_remove_group(&client->dev.kobj, &asb100_group);
ERROR3:
i2c_unregister_device(data->lm75[1]);
i2c_unregister_device(data->lm75[0]);
return err;
}
static void asb100_remove(struct i2c_client *client)
{
struct asb100_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &asb100_group);
i2c_unregister_device(data->lm75[1]);
i2c_unregister_device(data->lm75[0]);
}
/*
* The SMBus locks itself, usually, but nothing may access the chip between
* bank switches.
*/
static int asb100_read_value(struct i2c_client *client, u16 reg)
{
struct asb100_data *data = i2c_get_clientdata(client);
struct i2c_client *cl;
int res, bank;
mutex_lock(&data->lock);
bank = (reg >> 8) & 0x0f;
if (bank > 2)
/* switch banks */
i2c_smbus_write_byte_data(client, ASB100_REG_BANK, bank);
if (bank == 0 || bank > 2) {
res = i2c_smbus_read_byte_data(client, reg & 0xff);
} else {
/* switch to subclient */
cl = data->lm75[bank - 1];
/* convert from ISA to LM75 I2C addresses */
switch (reg & 0xff) {
case 0x50: /* TEMP */
res = i2c_smbus_read_word_swapped(cl, 0);
break;
case 0x52: /* CONFIG */
res = i2c_smbus_read_byte_data(cl, 1);
break;
case 0x53: /* HYST */
res = i2c_smbus_read_word_swapped(cl, 2);
break;
case 0x55: /* MAX */
default:
res = i2c_smbus_read_word_swapped(cl, 3);
break;
}
}
if (bank > 2)
i2c_smbus_write_byte_data(client, ASB100_REG_BANK, 0);
mutex_unlock(&data->lock);
return res;
}
static void asb100_write_value(struct i2c_client *client, u16 reg, u16 value)
{
struct asb100_data *data = i2c_get_clientdata(client);
struct i2c_client *cl;
int bank;
mutex_lock(&data->lock);
bank = (reg >> 8) & 0x0f;
if (bank > 2)
/* switch banks */
i2c_smbus_write_byte_data(client, ASB100_REG_BANK, bank);
if (bank == 0 || bank > 2) {
i2c_smbus_write_byte_data(client, reg & 0xff, value & 0xff);
} else {
/* switch to subclient */
cl = data->lm75[bank - 1];
/* convert from ISA to LM75 I2C addresses */
switch (reg & 0xff) {
case 0x52: /* CONFIG */
i2c_smbus_write_byte_data(cl, 1, value & 0xff);
break;
case 0x53: /* HYST */
i2c_smbus_write_word_swapped(cl, 2, value);
break;
case 0x55: /* MAX */
i2c_smbus_write_word_swapped(cl, 3, value);
break;
}
}
if (bank > 2)
i2c_smbus_write_byte_data(client, ASB100_REG_BANK, 0);
mutex_unlock(&data->lock);
}
static void asb100_init_client(struct i2c_client *client)
{
struct asb100_data *data = i2c_get_clientdata(client);
data->vrm = vid_which_vrm();
/* Start monitoring */
asb100_write_value(client, ASB100_REG_CONFIG,
(asb100_read_value(client, ASB100_REG_CONFIG) & 0xf7) | 0x01);
}
static struct asb100_data *asb100_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct asb100_data *data = i2c_get_clientdata(client);
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
dev_dbg(&client->dev, "starting device update...\n");
/* 7 voltage inputs */
for (i = 0; i < 7; i++) {
data->in[i] = asb100_read_value(client,
ASB100_REG_IN(i));
data->in_min[i] = asb100_read_value(client,
ASB100_REG_IN_MIN(i));
data->in_max[i] = asb100_read_value(client,
ASB100_REG_IN_MAX(i));
}
/* 3 fan inputs */
for (i = 0; i < 3; i++) {
data->fan[i] = asb100_read_value(client,
ASB100_REG_FAN(i));
data->fan_min[i] = asb100_read_value(client,
ASB100_REG_FAN_MIN(i));
}
/* 4 temperature inputs */
for (i = 1; i <= 4; i++) {
data->temp[i-1] = asb100_read_value(client,
ASB100_REG_TEMP(i));
data->temp_max[i-1] = asb100_read_value(client,
ASB100_REG_TEMP_MAX(i));
data->temp_hyst[i-1] = asb100_read_value(client,
ASB100_REG_TEMP_HYST(i));
}
/* VID and fan divisors */
i = asb100_read_value(client, ASB100_REG_VID_FANDIV);
data->vid = i & 0x0f;
data->vid |= (asb100_read_value(client,
ASB100_REG_CHIPID) & 0x01) << 4;
data->fan_div[0] = (i >> 4) & 0x03;
data->fan_div[1] = (i >> 6) & 0x03;
data->fan_div[2] = (asb100_read_value(client,
ASB100_REG_PIN) >> 6) & 0x03;
/* PWM */
data->pwm = asb100_read_value(client, ASB100_REG_PWM1);
/* alarms */
data->alarms = asb100_read_value(client, ASB100_REG_ALARM1) +
(asb100_read_value(client, ASB100_REG_ALARM2) << 8);
data->last_updated = jiffies;
data->valid = true;
dev_dbg(&client->dev, "... device update complete\n");
}
mutex_unlock(&data->update_lock);
return data;
}
module_i2c_driver(asb100_driver);
MODULE_AUTHOR("Mark M. Hoffman <[email protected]>");
MODULE_DESCRIPTION("ASB100 Bach driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/asb100.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2021 Emil Renner Berthing <[email protected]>
* Copyright (C) 2021 Samin Guo <[email protected]>
*/
#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/hwmon.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
/*
* TempSensor reset. The RSTN can be de-asserted once the analog core has
* powered up. Trst(min 100ns)
* 0:reset 1:de-assert
*/
#define SFCTEMP_RSTN BIT(0)
/*
* TempSensor analog core power down. The analog core will be powered up
* Tpu(min 50us) after PD is de-asserted. RSTN should be held low until the
* analog core is powered up.
* 0:power up 1:power down
*/
#define SFCTEMP_PD BIT(1)
/*
* TempSensor start conversion enable.
* 0:disable 1:enable
*/
#define SFCTEMP_RUN BIT(2)
/*
* TempSensor conversion value output.
* Temp(C)=DOUT*Y/4094 - K
*/
#define SFCTEMP_DOUT_POS 16
#define SFCTEMP_DOUT_MSK GENMASK(27, 16)
/* DOUT to Celcius conversion constants */
#define SFCTEMP_Y1000 237500L
#define SFCTEMP_Z 4094L
#define SFCTEMP_K1000 81100L
struct sfctemp {
/* serialize access to hardware register and enabled below */
struct mutex lock;
void __iomem *regs;
struct clk *clk_sense;
struct clk *clk_bus;
struct reset_control *rst_sense;
struct reset_control *rst_bus;
bool enabled;
};
static void sfctemp_power_up(struct sfctemp *sfctemp)
{
/* make sure we're powered down first */
writel(SFCTEMP_PD, sfctemp->regs);
udelay(1);
writel(0, sfctemp->regs);
/* wait t_pu(50us) + t_rst(100ns) */
usleep_range(60, 200);
/* de-assert reset */
writel(SFCTEMP_RSTN, sfctemp->regs);
udelay(1); /* wait t_su(500ps) */
}
static void sfctemp_power_down(struct sfctemp *sfctemp)
{
writel(SFCTEMP_PD, sfctemp->regs);
}
static void sfctemp_run(struct sfctemp *sfctemp)
{
writel(SFCTEMP_RSTN | SFCTEMP_RUN, sfctemp->regs);
udelay(1);
}
static void sfctemp_stop(struct sfctemp *sfctemp)
{
writel(SFCTEMP_RSTN, sfctemp->regs);
}
static int sfctemp_enable(struct sfctemp *sfctemp)
{
int ret = 0;
mutex_lock(&sfctemp->lock);
if (sfctemp->enabled)
goto done;
ret = clk_prepare_enable(sfctemp->clk_bus);
if (ret)
goto err;
ret = reset_control_deassert(sfctemp->rst_bus);
if (ret)
goto err_disable_bus;
ret = clk_prepare_enable(sfctemp->clk_sense);
if (ret)
goto err_assert_bus;
ret = reset_control_deassert(sfctemp->rst_sense);
if (ret)
goto err_disable_sense;
sfctemp_power_up(sfctemp);
sfctemp_run(sfctemp);
sfctemp->enabled = true;
done:
mutex_unlock(&sfctemp->lock);
return ret;
err_disable_sense:
clk_disable_unprepare(sfctemp->clk_sense);
err_assert_bus:
reset_control_assert(sfctemp->rst_bus);
err_disable_bus:
clk_disable_unprepare(sfctemp->clk_bus);
err:
mutex_unlock(&sfctemp->lock);
return ret;
}
static int sfctemp_disable(struct sfctemp *sfctemp)
{
mutex_lock(&sfctemp->lock);
if (!sfctemp->enabled)
goto done;
sfctemp_stop(sfctemp);
sfctemp_power_down(sfctemp);
reset_control_assert(sfctemp->rst_sense);
clk_disable_unprepare(sfctemp->clk_sense);
reset_control_assert(sfctemp->rst_bus);
clk_disable_unprepare(sfctemp->clk_bus);
sfctemp->enabled = false;
done:
mutex_unlock(&sfctemp->lock);
return 0;
}
static void sfctemp_disable_action(void *data)
{
sfctemp_disable(data);
}
static int sfctemp_convert(struct sfctemp *sfctemp, long *val)
{
int ret;
mutex_lock(&sfctemp->lock);
if (!sfctemp->enabled) {
ret = -ENODATA;
goto out;
}
/* calculate temperature in milli Celcius */
*val = (long)((readl(sfctemp->regs) & SFCTEMP_DOUT_MSK) >> SFCTEMP_DOUT_POS)
* SFCTEMP_Y1000 / SFCTEMP_Z - SFCTEMP_K1000;
ret = 0;
out:
mutex_unlock(&sfctemp->lock);
return ret;
}
static umode_t sfctemp_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_enable:
return 0644;
case hwmon_temp_input:
return 0444;
default:
return 0;
}
default:
return 0;
}
}
static int sfctemp_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct sfctemp *sfctemp = dev_get_drvdata(dev);
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_enable:
*val = sfctemp->enabled;
return 0;
case hwmon_temp_input:
return sfctemp_convert(sfctemp, val);
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int sfctemp_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct sfctemp *sfctemp = dev_get_drvdata(dev);
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_enable:
if (val == 0)
return sfctemp_disable(sfctemp);
if (val == 1)
return sfctemp_enable(sfctemp);
return -EINVAL;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static const struct hwmon_channel_info *sfctemp_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp, HWMON_T_ENABLE | HWMON_T_INPUT),
NULL
};
static const struct hwmon_ops sfctemp_hwmon_ops = {
.is_visible = sfctemp_is_visible,
.read = sfctemp_read,
.write = sfctemp_write,
};
static const struct hwmon_chip_info sfctemp_chip_info = {
.ops = &sfctemp_hwmon_ops,
.info = sfctemp_info,
};
static int sfctemp_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device *hwmon_dev;
struct sfctemp *sfctemp;
int ret;
sfctemp = devm_kzalloc(dev, sizeof(*sfctemp), GFP_KERNEL);
if (!sfctemp)
return -ENOMEM;
dev_set_drvdata(dev, sfctemp);
mutex_init(&sfctemp->lock);
sfctemp->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(sfctemp->regs))
return PTR_ERR(sfctemp->regs);
sfctemp->clk_sense = devm_clk_get(dev, "sense");
if (IS_ERR(sfctemp->clk_sense))
return dev_err_probe(dev, PTR_ERR(sfctemp->clk_sense),
"error getting sense clock\n");
sfctemp->clk_bus = devm_clk_get(dev, "bus");
if (IS_ERR(sfctemp->clk_bus))
return dev_err_probe(dev, PTR_ERR(sfctemp->clk_bus),
"error getting bus clock\n");
sfctemp->rst_sense = devm_reset_control_get_exclusive(dev, "sense");
if (IS_ERR(sfctemp->rst_sense))
return dev_err_probe(dev, PTR_ERR(sfctemp->rst_sense),
"error getting sense reset\n");
sfctemp->rst_bus = devm_reset_control_get_exclusive(dev, "bus");
if (IS_ERR(sfctemp->rst_bus))
return dev_err_probe(dev, PTR_ERR(sfctemp->rst_bus),
"error getting busreset\n");
ret = reset_control_assert(sfctemp->rst_sense);
if (ret)
return dev_err_probe(dev, ret, "error asserting sense reset\n");
ret = reset_control_assert(sfctemp->rst_bus);
if (ret)
return dev_err_probe(dev, ret, "error asserting bus reset\n");
ret = devm_add_action(dev, sfctemp_disable_action, sfctemp);
if (ret)
return ret;
ret = sfctemp_enable(sfctemp);
if (ret)
return dev_err_probe(dev, ret, "error enabling temperature sensor\n");
hwmon_dev = devm_hwmon_device_register_with_info(dev, "sfctemp", sfctemp,
&sfctemp_chip_info, NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id sfctemp_of_match[] = {
{ .compatible = "starfive,jh7100-temp" },
{ .compatible = "starfive,jh7110-temp" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sfctemp_of_match);
static struct platform_driver sfctemp_driver = {
.probe = sfctemp_probe,
.driver = {
.name = "sfctemp",
.of_match_table = sfctemp_of_match,
},
};
module_platform_driver(sfctemp_driver);
MODULE_AUTHOR("Emil Renner Berthing");
MODULE_DESCRIPTION("StarFive JH71x0 temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/sfctemp.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* w83l786ng.c - Linux kernel driver for hardware monitoring
* Copyright (c) 2007 Kevin Lo <[email protected]>
*/
/*
* Supports following chips:
*
* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/jiffies.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2e, 0x2f, I2C_CLIENT_END };
/* Insmod parameters */
static bool reset;
module_param(reset, bool, 0);
MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
#define W83L786NG_REG_IN_MIN(nr) (0x2C + (nr) * 2)
#define W83L786NG_REG_IN_MAX(nr) (0x2B + (nr) * 2)
#define W83L786NG_REG_IN(nr) ((nr) + 0x20)
#define W83L786NG_REG_FAN(nr) ((nr) + 0x28)
#define W83L786NG_REG_FAN_MIN(nr) ((nr) + 0x3B)
#define W83L786NG_REG_CONFIG 0x40
#define W83L786NG_REG_ALARM1 0x41
#define W83L786NG_REG_ALARM2 0x42
#define W83L786NG_REG_GPIO_EN 0x47
#define W83L786NG_REG_MAN_ID2 0x4C
#define W83L786NG_REG_MAN_ID1 0x4D
#define W83L786NG_REG_CHIP_ID 0x4E
#define W83L786NG_REG_DIODE 0x53
#define W83L786NG_REG_FAN_DIV 0x54
#define W83L786NG_REG_FAN_CFG 0x80
#define W83L786NG_REG_TOLERANCE 0x8D
static const u8 W83L786NG_REG_TEMP[2][3] = {
{ 0x25, /* TEMP 0 in DataSheet */
0x35, /* TEMP 0 Over in DataSheet */
0x36 }, /* TEMP 0 Hyst in DataSheet */
{ 0x26, /* TEMP 1 in DataSheet */
0x37, /* TEMP 1 Over in DataSheet */
0x38 } /* TEMP 1 Hyst in DataSheet */
};
static const u8 W83L786NG_PWM_MODE_SHIFT[] = {6, 7};
static const u8 W83L786NG_PWM_ENABLE_SHIFT[] = {2, 4};
/* FAN Duty Cycle, be used to control */
static const u8 W83L786NG_REG_PWM[] = {0x81, 0x87};
static inline u8
FAN_TO_REG(long rpm, int div)
{
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
((val) == 255 ? 0 : \
1350000 / ((val) * (div))))
/* for temp */
#define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (val) + 0x100 * 1000 \
: (val)) / 1000, 0, 0xff))
#define TEMP_FROM_REG(val) (((val) & 0x80 ? \
(val) - 0x100 : (val)) * 1000)
/*
* The analog voltage inputs have 8mV LSB. Since the sysfs output is
* in mV as would be measured on the chip input pin, need to just
* multiply/divide by 8 to translate from/to register values.
*/
#define IN_TO_REG(val) (clamp_val((((val) + 4) / 8), 0, 255))
#define IN_FROM_REG(val) ((val) * 8)
#define DIV_FROM_REG(val) (1 << (val))
static inline u8
DIV_TO_REG(long val)
{
int i;
val = clamp_val(val, 1, 128) >> 1;
for (i = 0; i < 7; i++) {
if (val == 0)
break;
val >>= 1;
}
return (u8)i;
}
struct w83l786ng_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
unsigned long last_nonvolatile; /* In jiffies, last time we update the
* nonvolatile registers */
u8 in[3];
u8 in_max[3];
u8 in_min[3];
u8 fan[2];
u8 fan_div[2];
u8 fan_min[2];
u8 temp_type[2];
u8 temp[2][3];
u8 pwm[2];
u8 pwm_mode[2]; /* 0->DC variable voltage
* 1->PWM variable duty cycle */
u8 pwm_enable[2]; /* 1->manual
* 2->thermal cruise (also called SmartFan I) */
u8 tolerance[2];
};
static u8
w83l786ng_read_value(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_byte_data(client, reg);
}
static int
w83l786ng_write_value(struct i2c_client *client, u8 reg, u8 value)
{
return i2c_smbus_write_byte_data(client, reg, value);
}
static struct w83l786ng_data *w83l786ng_update_device(struct device *dev)
{
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i, j;
u8 reg_tmp, pwmcfg;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
dev_dbg(&client->dev, "Updating w83l786ng data.\n");
/* Update the voltages measured value and limits */
for (i = 0; i < 3; i++) {
data->in[i] = w83l786ng_read_value(client,
W83L786NG_REG_IN(i));
data->in_min[i] = w83l786ng_read_value(client,
W83L786NG_REG_IN_MIN(i));
data->in_max[i] = w83l786ng_read_value(client,
W83L786NG_REG_IN_MAX(i));
}
/* Update the fan counts and limits */
for (i = 0; i < 2; i++) {
data->fan[i] = w83l786ng_read_value(client,
W83L786NG_REG_FAN(i));
data->fan_min[i] = w83l786ng_read_value(client,
W83L786NG_REG_FAN_MIN(i));
}
/* Update the fan divisor */
reg_tmp = w83l786ng_read_value(client, W83L786NG_REG_FAN_DIV);
data->fan_div[0] = reg_tmp & 0x07;
data->fan_div[1] = (reg_tmp >> 4) & 0x07;
pwmcfg = w83l786ng_read_value(client, W83L786NG_REG_FAN_CFG);
for (i = 0; i < 2; i++) {
data->pwm_mode[i] =
((pwmcfg >> W83L786NG_PWM_MODE_SHIFT[i]) & 1)
? 0 : 1;
data->pwm_enable[i] =
((pwmcfg >> W83L786NG_PWM_ENABLE_SHIFT[i]) & 3) + 1;
data->pwm[i] =
(w83l786ng_read_value(client, W83L786NG_REG_PWM[i])
& 0x0f) * 0x11;
}
/* Update the temperature sensors */
for (i = 0; i < 2; i++) {
for (j = 0; j < 3; j++) {
data->temp[i][j] = w83l786ng_read_value(client,
W83L786NG_REG_TEMP[i][j]);
}
}
/* Update Smart Fan I/II tolerance */
reg_tmp = w83l786ng_read_value(client, W83L786NG_REG_TOLERANCE);
data->tolerance[0] = reg_tmp & 0x0f;
data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* following are the sysfs callback functions */
#define show_in_reg(reg) \
static ssize_t \
show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
int nr = to_sensor_dev_attr(attr)->index; \
struct w83l786ng_data *data = w83l786ng_update_device(dev); \
return sprintf(buf, "%d\n", IN_FROM_REG(data->reg[nr])); \
}
show_in_reg(in)
show_in_reg(in_min)
show_in_reg(in_max)
#define store_in_reg(REG, reg) \
static ssize_t \
store_in_##reg(struct device *dev, struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
int nr = to_sensor_dev_attr(attr)->index; \
struct w83l786ng_data *data = dev_get_drvdata(dev); \
struct i2c_client *client = data->client; \
unsigned long val; \
int err = kstrtoul(buf, 10, &val); \
if (err) \
return err; \
mutex_lock(&data->update_lock); \
data->in_##reg[nr] = IN_TO_REG(val); \
w83l786ng_write_value(client, W83L786NG_REG_IN_##REG(nr), \
data->in_##reg[nr]); \
mutex_unlock(&data->update_lock); \
return count; \
}
store_in_reg(MIN, min)
store_in_reg(MAX, max)
static struct sensor_device_attribute sda_in_input[] = {
SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
};
static struct sensor_device_attribute sda_in_min[] = {
SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
};
static struct sensor_device_attribute sda_in_max[] = {
SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
};
#define show_fan_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
int nr = to_sensor_dev_attr(attr)->index; \
struct w83l786ng_data *data = w83l786ng_update_device(dev); \
return sprintf(buf, "%d\n", \
FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
}
show_fan_reg(fan);
show_fan_reg(fan_min);
static ssize_t
store_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
w83l786ng_write_value(client, W83L786NG_REG_FAN_MIN(nr),
data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_fan_div(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = w83l786ng_update_device(dev);
return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr]));
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t
store_fan_div(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long min;
u8 tmp_fan_div;
u8 fan_div_reg;
u8 keep_mask = 0;
u8 new_shift = 0;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
/* Save fan_min */
mutex_lock(&data->update_lock);
min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
data->fan_div[nr] = DIV_TO_REG(val);
switch (nr) {
case 0:
keep_mask = 0xf8;
new_shift = 0;
break;
case 1:
keep_mask = 0x8f;
new_shift = 4;
break;
}
fan_div_reg = w83l786ng_read_value(client, W83L786NG_REG_FAN_DIV)
& keep_mask;
tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask;
w83l786ng_write_value(client, W83L786NG_REG_FAN_DIV,
fan_div_reg | tmp_fan_div);
/* Restore fan_min */
data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
w83l786ng_write_value(client, W83L786NG_REG_FAN_MIN(nr),
data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_fan_input[] = {
SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
};
static struct sensor_device_attribute sda_fan_min[] = {
SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
store_fan_min, 0),
SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
store_fan_min, 1),
};
static struct sensor_device_attribute sda_fan_div[] = {
SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO, show_fan_div,
store_fan_div, 0),
SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO, show_fan_div,
store_fan_div, 1),
};
/* read/write the temperature, includes measured value and limits */
static ssize_t
show_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83l786ng_data *data = w83l786ng_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
}
static ssize_t
store_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp[nr][index] = TEMP_TO_REG(val);
w83l786ng_write_value(client, W83L786NG_REG_TEMP[nr][index],
data->temp[nr][index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute_2 sda_temp_input[] = {
SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
};
static struct sensor_device_attribute_2 sda_temp_max[] = {
SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR,
show_temp, store_temp, 0, 1),
SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR,
show_temp, store_temp, 1, 1),
};
static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR,
show_temp, store_temp, 0, 2),
SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR,
show_temp, store_temp, 1, 2),
};
#define show_pwm_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
struct w83l786ng_data *data = w83l786ng_update_device(dev); \
int nr = to_sensor_dev_attr(attr)->index; \
return sprintf(buf, "%d\n", data->reg[nr]); \
}
show_pwm_reg(pwm_mode)
show_pwm_reg(pwm_enable)
show_pwm_reg(pwm)
static ssize_t
store_pwm_mode(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm_mode[nr] = val;
reg = w83l786ng_read_value(client, W83L786NG_REG_FAN_CFG);
reg &= ~(1 << W83L786NG_PWM_MODE_SHIFT[nr]);
if (!val)
reg |= 1 << W83L786NG_PWM_MODE_SHIFT[nr];
w83l786ng_write_value(client, W83L786NG_REG_FAN_CFG, reg);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, 0, 255);
val = DIV_ROUND_CLOSEST(val, 0x11);
mutex_lock(&data->update_lock);
data->pwm[nr] = val * 0x11;
val |= w83l786ng_read_value(client, W83L786NG_REG_PWM[nr]) & 0xf0;
w83l786ng_write_value(client, W83L786NG_REG_PWM[nr], val);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
store_pwm_enable(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (!val || val > 2) /* only modes 1 and 2 are supported */
return -EINVAL;
mutex_lock(&data->update_lock);
reg = w83l786ng_read_value(client, W83L786NG_REG_FAN_CFG);
data->pwm_enable[nr] = val;
reg &= ~(0x03 << W83L786NG_PWM_ENABLE_SHIFT[nr]);
reg |= (val - 1) << W83L786NG_PWM_ENABLE_SHIFT[nr];
w83l786ng_write_value(client, W83L786NG_REG_FAN_CFG, reg);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_pwm[] = {
SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
};
static struct sensor_device_attribute sda_pwm_mode[] = {
SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
store_pwm_mode, 0),
SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
store_pwm_mode, 1),
};
static struct sensor_device_attribute sda_pwm_enable[] = {
SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
store_pwm_enable, 0),
SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
store_pwm_enable, 1),
};
/* For Smart Fan I/Thermal Cruise and Smart Fan II */
static ssize_t
show_tolerance(struct device *dev, struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = w83l786ng_update_device(dev);
return sprintf(buf, "%ld\n", (long)data->tolerance[nr]);
}
static ssize_t
store_tolerance(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct w83l786ng_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 tol_tmp, tol_mask;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
tol_mask = w83l786ng_read_value(client,
W83L786NG_REG_TOLERANCE) & ((nr == 1) ? 0x0f : 0xf0);
tol_tmp = clamp_val(val, 0, 15);
tol_tmp &= 0x0f;
data->tolerance[nr] = tol_tmp;
if (nr == 1)
tol_tmp <<= 4;
w83l786ng_write_value(client, W83L786NG_REG_TOLERANCE,
tol_mask | tol_tmp);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_tolerance[] = {
SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO,
show_tolerance, store_tolerance, 0),
SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO,
show_tolerance, store_tolerance, 1),
};
#define IN_UNIT_ATTRS(X) \
&sda_in_input[X].dev_attr.attr, \
&sda_in_min[X].dev_attr.attr, \
&sda_in_max[X].dev_attr.attr
#define FAN_UNIT_ATTRS(X) \
&sda_fan_input[X].dev_attr.attr, \
&sda_fan_min[X].dev_attr.attr, \
&sda_fan_div[X].dev_attr.attr
#define TEMP_UNIT_ATTRS(X) \
&sda_temp_input[X].dev_attr.attr, \
&sda_temp_max[X].dev_attr.attr, \
&sda_temp_max_hyst[X].dev_attr.attr
#define PWM_UNIT_ATTRS(X) \
&sda_pwm[X].dev_attr.attr, \
&sda_pwm_mode[X].dev_attr.attr, \
&sda_pwm_enable[X].dev_attr.attr
#define TOLERANCE_UNIT_ATTRS(X) \
&sda_tolerance[X].dev_attr.attr
static struct attribute *w83l786ng_attrs[] = {
IN_UNIT_ATTRS(0),
IN_UNIT_ATTRS(1),
IN_UNIT_ATTRS(2),
FAN_UNIT_ATTRS(0),
FAN_UNIT_ATTRS(1),
TEMP_UNIT_ATTRS(0),
TEMP_UNIT_ATTRS(1),
PWM_UNIT_ATTRS(0),
PWM_UNIT_ATTRS(1),
TOLERANCE_UNIT_ATTRS(0),
TOLERANCE_UNIT_ATTRS(1),
NULL
};
ATTRIBUTE_GROUPS(w83l786ng);
static int
w83l786ng_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
u16 man_id;
u8 chip_id;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* Detection */
if ((w83l786ng_read_value(client, W83L786NG_REG_CONFIG) & 0x80)) {
dev_dbg(&adapter->dev, "W83L786NG detection failed at 0x%02x\n",
client->addr);
return -ENODEV;
}
/* Identification */
man_id = (w83l786ng_read_value(client, W83L786NG_REG_MAN_ID1) << 8) +
w83l786ng_read_value(client, W83L786NG_REG_MAN_ID2);
chip_id = w83l786ng_read_value(client, W83L786NG_REG_CHIP_ID);
if (man_id != 0x5CA3 || /* Winbond */
chip_id != 0x80) { /* W83L786NG */
dev_dbg(&adapter->dev,
"Unsupported chip (man_id=0x%04X, chip_id=0x%02X)\n",
man_id, chip_id);
return -ENODEV;
}
strscpy(info->type, "w83l786ng", I2C_NAME_SIZE);
return 0;
}
static void w83l786ng_init_client(struct i2c_client *client)
{
u8 tmp;
if (reset)
w83l786ng_write_value(client, W83L786NG_REG_CONFIG, 0x80);
/* Start monitoring */
tmp = w83l786ng_read_value(client, W83L786NG_REG_CONFIG);
if (!(tmp & 0x01))
w83l786ng_write_value(client, W83L786NG_REG_CONFIG, tmp | 0x01);
}
static int
w83l786ng_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct w83l786ng_data *data;
struct device *hwmon_dev;
int i;
u8 reg_tmp;
data = devm_kzalloc(dev, sizeof(struct w83l786ng_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Initialize the chip */
w83l786ng_init_client(client);
/* A few vars need to be filled upon startup */
for (i = 0; i < 2; i++) {
data->fan_min[i] = w83l786ng_read_value(client,
W83L786NG_REG_FAN_MIN(i));
}
/* Update the fan divisor */
reg_tmp = w83l786ng_read_value(client, W83L786NG_REG_FAN_DIV);
data->fan_div[0] = reg_tmp & 0x07;
data->fan_div[1] = (reg_tmp >> 4) & 0x07;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
w83l786ng_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id w83l786ng_id[] = {
{ "w83l786ng", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, w83l786ng_id);
static struct i2c_driver w83l786ng_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "w83l786ng",
},
.probe = w83l786ng_probe,
.id_table = w83l786ng_id,
.detect = w83l786ng_detect,
.address_list = normal_i2c,
};
module_i2c_driver(w83l786ng_driver);
MODULE_AUTHOR("Kevin Lo");
MODULE_DESCRIPTION("w83l786ng driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/w83l786ng.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* gpio-fan.c - Hwmon driver for fans connected to GPIO lines.
*
* Copyright (C) 2010 LaCie
*
* Author: Simon Guinot <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/kstrtox.h>
#include <linux/mutex.h>
#include <linux/hwmon.h>
#include <linux/gpio/consumer.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/thermal.h>
struct gpio_fan_speed {
int rpm;
int ctrl_val;
};
struct gpio_fan_data {
struct device *dev;
struct device *hwmon_dev;
/* Cooling device if any */
struct thermal_cooling_device *cdev;
struct mutex lock; /* lock GPIOs operations. */
int num_gpios;
struct gpio_desc **gpios;
int num_speed;
struct gpio_fan_speed *speed;
int speed_index;
int resume_speed;
bool pwm_enable;
struct gpio_desc *alarm_gpio;
struct work_struct alarm_work;
};
/*
* Alarm GPIO.
*/
static void fan_alarm_notify(struct work_struct *ws)
{
struct gpio_fan_data *fan_data =
container_of(ws, struct gpio_fan_data, alarm_work);
sysfs_notify(&fan_data->hwmon_dev->kobj, NULL, "fan1_alarm");
kobject_uevent(&fan_data->hwmon_dev->kobj, KOBJ_CHANGE);
}
static irqreturn_t fan_alarm_irq_handler(int irq, void *dev_id)
{
struct gpio_fan_data *fan_data = dev_id;
schedule_work(&fan_data->alarm_work);
return IRQ_NONE;
}
static ssize_t fan1_alarm_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n",
gpiod_get_value_cansleep(fan_data->alarm_gpio));
}
static DEVICE_ATTR_RO(fan1_alarm);
static int fan_alarm_init(struct gpio_fan_data *fan_data)
{
int alarm_irq;
struct device *dev = fan_data->dev;
/*
* If the alarm GPIO don't support interrupts, just leave
* without initializing the fail notification support.
*/
alarm_irq = gpiod_to_irq(fan_data->alarm_gpio);
if (alarm_irq <= 0)
return 0;
INIT_WORK(&fan_data->alarm_work, fan_alarm_notify);
irq_set_irq_type(alarm_irq, IRQ_TYPE_EDGE_BOTH);
return devm_request_irq(dev, alarm_irq, fan_alarm_irq_handler,
IRQF_SHARED, "GPIO fan alarm", fan_data);
}
/*
* Control GPIOs.
*/
/* Must be called with fan_data->lock held, except during initialization. */
static void __set_fan_ctrl(struct gpio_fan_data *fan_data, int ctrl_val)
{
int i;
for (i = 0; i < fan_data->num_gpios; i++)
gpiod_set_value_cansleep(fan_data->gpios[i],
(ctrl_val >> i) & 1);
}
static int __get_fan_ctrl(struct gpio_fan_data *fan_data)
{
int i;
int ctrl_val = 0;
for (i = 0; i < fan_data->num_gpios; i++) {
int value;
value = gpiod_get_value_cansleep(fan_data->gpios[i]);
ctrl_val |= (value << i);
}
return ctrl_val;
}
/* Must be called with fan_data->lock held, except during initialization. */
static void set_fan_speed(struct gpio_fan_data *fan_data, int speed_index)
{
if (fan_data->speed_index == speed_index)
return;
__set_fan_ctrl(fan_data, fan_data->speed[speed_index].ctrl_val);
fan_data->speed_index = speed_index;
}
static int get_fan_speed_index(struct gpio_fan_data *fan_data)
{
int ctrl_val = __get_fan_ctrl(fan_data);
int i;
for (i = 0; i < fan_data->num_speed; i++)
if (fan_data->speed[i].ctrl_val == ctrl_val)
return i;
dev_warn(fan_data->dev,
"missing speed array entry for GPIO value 0x%x\n", ctrl_val);
return -ENODEV;
}
static int rpm_to_speed_index(struct gpio_fan_data *fan_data, unsigned long rpm)
{
struct gpio_fan_speed *speed = fan_data->speed;
int i;
for (i = 0; i < fan_data->num_speed; i++)
if (speed[i].rpm >= rpm)
return i;
return fan_data->num_speed - 1;
}
static ssize_t pwm1_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
u8 pwm = fan_data->speed_index * 255 / (fan_data->num_speed - 1);
return sprintf(buf, "%d\n", pwm);
}
static ssize_t pwm1_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
unsigned long pwm;
int speed_index;
int ret = count;
if (kstrtoul(buf, 10, &pwm) || pwm > 255)
return -EINVAL;
mutex_lock(&fan_data->lock);
if (!fan_data->pwm_enable) {
ret = -EPERM;
goto exit_unlock;
}
speed_index = DIV_ROUND_UP(pwm * (fan_data->num_speed - 1), 255);
set_fan_speed(fan_data, speed_index);
exit_unlock:
mutex_unlock(&fan_data->lock);
return ret;
}
static ssize_t pwm1_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", fan_data->pwm_enable);
}
static ssize_t pwm1_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
unsigned long val;
if (kstrtoul(buf, 10, &val) || val > 1)
return -EINVAL;
if (fan_data->pwm_enable == val)
return count;
mutex_lock(&fan_data->lock);
fan_data->pwm_enable = val;
/* Disable manual control mode: set fan at full speed. */
if (val == 0)
set_fan_speed(fan_data, fan_data->num_speed - 1);
mutex_unlock(&fan_data->lock);
return count;
}
static ssize_t pwm1_mode_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, "0\n");
}
static ssize_t fan1_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", fan_data->speed[0].rpm);
}
static ssize_t fan1_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n",
fan_data->speed[fan_data->num_speed - 1].rpm);
}
static ssize_t fan1_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", fan_data->speed[fan_data->speed_index].rpm);
}
static ssize_t set_rpm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
unsigned long rpm;
int ret = count;
if (kstrtoul(buf, 10, &rpm))
return -EINVAL;
mutex_lock(&fan_data->lock);
if (!fan_data->pwm_enable) {
ret = -EPERM;
goto exit_unlock;
}
set_fan_speed(fan_data, rpm_to_speed_index(fan_data, rpm));
exit_unlock:
mutex_unlock(&fan_data->lock);
return ret;
}
static DEVICE_ATTR_RW(pwm1);
static DEVICE_ATTR_RW(pwm1_enable);
static DEVICE_ATTR_RO(pwm1_mode);
static DEVICE_ATTR_RO(fan1_min);
static DEVICE_ATTR_RO(fan1_max);
static DEVICE_ATTR_RO(fan1_input);
static DEVICE_ATTR(fan1_target, 0644, fan1_input_show, set_rpm);
static umode_t gpio_fan_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct gpio_fan_data *data = dev_get_drvdata(dev);
if (index == 0 && !data->alarm_gpio)
return 0;
if (index > 0 && !data->gpios)
return 0;
return attr->mode;
}
static struct attribute *gpio_fan_attributes[] = {
&dev_attr_fan1_alarm.attr, /* 0 */
&dev_attr_pwm1.attr, /* 1 */
&dev_attr_pwm1_enable.attr,
&dev_attr_pwm1_mode.attr,
&dev_attr_fan1_input.attr,
&dev_attr_fan1_target.attr,
&dev_attr_fan1_min.attr,
&dev_attr_fan1_max.attr,
NULL
};
static const struct attribute_group gpio_fan_group = {
.attrs = gpio_fan_attributes,
.is_visible = gpio_fan_is_visible,
};
static const struct attribute_group *gpio_fan_groups[] = {
&gpio_fan_group,
NULL
};
static int fan_ctrl_init(struct gpio_fan_data *fan_data)
{
int num_gpios = fan_data->num_gpios;
struct gpio_desc **gpios = fan_data->gpios;
int i, err;
for (i = 0; i < num_gpios; i++) {
/*
* The GPIO descriptors were retrieved with GPIOD_ASIS so here
* we set the GPIO into output mode, carefully preserving the
* current value by setting it to whatever it is already set
* (no surprise changes in default fan speed).
*/
err = gpiod_direction_output(gpios[i],
gpiod_get_value_cansleep(gpios[i]));
if (err)
return err;
}
fan_data->pwm_enable = true; /* Enable manual fan speed control. */
fan_data->speed_index = get_fan_speed_index(fan_data);
if (fan_data->speed_index < 0)
return fan_data->speed_index;
return 0;
}
static int gpio_fan_get_max_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
struct gpio_fan_data *fan_data = cdev->devdata;
if (!fan_data)
return -EINVAL;
*state = fan_data->num_speed - 1;
return 0;
}
static int gpio_fan_get_cur_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
struct gpio_fan_data *fan_data = cdev->devdata;
if (!fan_data)
return -EINVAL;
*state = fan_data->speed_index;
return 0;
}
static int gpio_fan_set_cur_state(struct thermal_cooling_device *cdev,
unsigned long state)
{
struct gpio_fan_data *fan_data = cdev->devdata;
if (!fan_data)
return -EINVAL;
if (state >= fan_data->num_speed)
return -EINVAL;
set_fan_speed(fan_data, state);
return 0;
}
static const struct thermal_cooling_device_ops gpio_fan_cool_ops = {
.get_max_state = gpio_fan_get_max_state,
.get_cur_state = gpio_fan_get_cur_state,
.set_cur_state = gpio_fan_set_cur_state,
};
/*
* Translate OpenFirmware node properties into platform_data
*/
static int gpio_fan_get_of_data(struct gpio_fan_data *fan_data)
{
struct gpio_fan_speed *speed;
struct device *dev = fan_data->dev;
struct device_node *np = dev->of_node;
struct gpio_desc **gpios;
unsigned i;
u32 u;
struct property *prop;
const __be32 *p;
/* Alarm GPIO if one exists */
fan_data->alarm_gpio = devm_gpiod_get_optional(dev, "alarm", GPIOD_IN);
if (IS_ERR(fan_data->alarm_gpio))
return PTR_ERR(fan_data->alarm_gpio);
/* Fill GPIO pin array */
fan_data->num_gpios = gpiod_count(dev, NULL);
if (fan_data->num_gpios <= 0) {
if (fan_data->alarm_gpio)
return 0;
dev_err(dev, "DT properties empty / missing");
return -ENODEV;
}
gpios = devm_kcalloc(dev,
fan_data->num_gpios, sizeof(struct gpio_desc *),
GFP_KERNEL);
if (!gpios)
return -ENOMEM;
for (i = 0; i < fan_data->num_gpios; i++) {
gpios[i] = devm_gpiod_get_index(dev, NULL, i, GPIOD_ASIS);
if (IS_ERR(gpios[i]))
return PTR_ERR(gpios[i]);
}
fan_data->gpios = gpios;
/* Get number of RPM/ctrl_val pairs in speed map */
prop = of_find_property(np, "gpio-fan,speed-map", &i);
if (!prop) {
dev_err(dev, "gpio-fan,speed-map DT property missing");
return -ENODEV;
}
i = i / sizeof(u32);
if (i == 0 || i & 1) {
dev_err(dev, "gpio-fan,speed-map contains zero/odd number of entries");
return -ENODEV;
}
fan_data->num_speed = i / 2;
/*
* Populate speed map
* Speed map is in the form <RPM ctrl_val RPM ctrl_val ...>
* this needs splitting into pairs to create gpio_fan_speed structs
*/
speed = devm_kcalloc(dev,
fan_data->num_speed, sizeof(struct gpio_fan_speed),
GFP_KERNEL);
if (!speed)
return -ENOMEM;
p = NULL;
for (i = 0; i < fan_data->num_speed; i++) {
p = of_prop_next_u32(prop, p, &u);
if (!p)
return -ENODEV;
speed[i].rpm = u;
p = of_prop_next_u32(prop, p, &u);
if (!p)
return -ENODEV;
speed[i].ctrl_val = u;
}
fan_data->speed = speed;
return 0;
}
static const struct of_device_id of_gpio_fan_match[] = {
{ .compatible = "gpio-fan", },
{},
};
MODULE_DEVICE_TABLE(of, of_gpio_fan_match);
static void gpio_fan_stop(void *data)
{
set_fan_speed(data, 0);
}
static int gpio_fan_probe(struct platform_device *pdev)
{
int err;
struct gpio_fan_data *fan_data;
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
fan_data = devm_kzalloc(dev, sizeof(struct gpio_fan_data),
GFP_KERNEL);
if (!fan_data)
return -ENOMEM;
fan_data->dev = dev;
err = gpio_fan_get_of_data(fan_data);
if (err)
return err;
platform_set_drvdata(pdev, fan_data);
mutex_init(&fan_data->lock);
/* Configure control GPIOs if available. */
if (fan_data->gpios && fan_data->num_gpios > 0) {
if (!fan_data->speed || fan_data->num_speed <= 1)
return -EINVAL;
err = fan_ctrl_init(fan_data);
if (err)
return err;
err = devm_add_action_or_reset(dev, gpio_fan_stop, fan_data);
if (err)
return err;
}
/* Make this driver part of hwmon class. */
fan_data->hwmon_dev =
devm_hwmon_device_register_with_groups(dev,
"gpio_fan", fan_data,
gpio_fan_groups);
if (IS_ERR(fan_data->hwmon_dev))
return PTR_ERR(fan_data->hwmon_dev);
/* Configure alarm GPIO if available. */
if (fan_data->alarm_gpio) {
err = fan_alarm_init(fan_data);
if (err)
return err;
}
/* Optional cooling device register for Device tree platforms */
fan_data->cdev = devm_thermal_of_cooling_device_register(dev, np,
"gpio-fan", fan_data, &gpio_fan_cool_ops);
dev_info(dev, "GPIO fan initialized\n");
return 0;
}
static void gpio_fan_shutdown(struct platform_device *pdev)
{
struct gpio_fan_data *fan_data = platform_get_drvdata(pdev);
if (fan_data->gpios)
set_fan_speed(fan_data, 0);
}
static int gpio_fan_suspend(struct device *dev)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
if (fan_data->gpios) {
fan_data->resume_speed = fan_data->speed_index;
set_fan_speed(fan_data, 0);
}
return 0;
}
static int gpio_fan_resume(struct device *dev)
{
struct gpio_fan_data *fan_data = dev_get_drvdata(dev);
if (fan_data->gpios)
set_fan_speed(fan_data, fan_data->resume_speed);
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(gpio_fan_pm, gpio_fan_suspend, gpio_fan_resume);
static struct platform_driver gpio_fan_driver = {
.probe = gpio_fan_probe,
.shutdown = gpio_fan_shutdown,
.driver = {
.name = "gpio-fan",
.pm = pm_sleep_ptr(&gpio_fan_pm),
.of_match_table = of_gpio_fan_match,
},
};
module_platform_driver(gpio_fan_driver);
MODULE_AUTHOR("Simon Guinot <[email protected]>");
MODULE_DESCRIPTION("GPIO FAN driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:gpio-fan");
|
linux-master
|
drivers/hwmon/gpio-fan.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2008, 2010 Davide Rizzo <[email protected]>
*
* The LM95241 is a sensor chip made by National Semiconductors.
* It reports up to three temperatures (its own plus up to two external ones).
* Complete datasheet can be obtained from National's website at:
* http://www.national.com/ds.cgi/LM/LM95241.pdf
*/
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#define DEVNAME "lm95241"
static const unsigned short normal_i2c[] = {
0x19, 0x2a, 0x2b, I2C_CLIENT_END };
/* LM95241 registers */
#define LM95241_REG_R_MAN_ID 0xFE
#define LM95241_REG_R_CHIP_ID 0xFF
#define LM95241_REG_R_STATUS 0x02
#define LM95241_REG_RW_CONFIG 0x03
#define LM95241_REG_RW_REM_FILTER 0x06
#define LM95241_REG_RW_TRUTHERM 0x07
#define LM95241_REG_W_ONE_SHOT 0x0F
#define LM95241_REG_R_LOCAL_TEMPH 0x10
#define LM95241_REG_R_REMOTE1_TEMPH 0x11
#define LM95241_REG_R_REMOTE2_TEMPH 0x12
#define LM95241_REG_R_LOCAL_TEMPL 0x20
#define LM95241_REG_R_REMOTE1_TEMPL 0x21
#define LM95241_REG_R_REMOTE2_TEMPL 0x22
#define LM95241_REG_RW_REMOTE_MODEL 0x30
/* LM95241 specific bitfields */
#define CFG_STOP BIT(6)
#define CFG_CR0076 0x00
#define CFG_CR0182 BIT(4)
#define CFG_CR1000 BIT(5)
#define CFG_CR2700 (BIT(4) | BIT(5))
#define CFG_CRMASK (BIT(4) | BIT(5))
#define R1MS_MASK BIT(0)
#define R2MS_MASK BIT(2)
#define R1DF_MASK BIT(1)
#define R2DF_MASK BIT(2)
#define R1FE_MASK BIT(0)
#define R2FE_MASK BIT(2)
#define R1DM BIT(0)
#define R2DM BIT(1)
#define TT1_SHIFT 0
#define TT2_SHIFT 4
#define TT_OFF 0
#define TT_ON 1
#define TT_MASK 7
#define NATSEMI_MAN_ID 0x01
#define LM95231_CHIP_ID 0xA1
#define LM95241_CHIP_ID 0xA4
static const u8 lm95241_reg_address[] = {
LM95241_REG_R_LOCAL_TEMPH,
LM95241_REG_R_LOCAL_TEMPL,
LM95241_REG_R_REMOTE1_TEMPH,
LM95241_REG_R_REMOTE1_TEMPL,
LM95241_REG_R_REMOTE2_TEMPH,
LM95241_REG_R_REMOTE2_TEMPL
};
/* Client data (each client gets its own) */
struct lm95241_data {
struct i2c_client *client;
struct mutex update_lock;
unsigned long last_updated; /* in jiffies */
unsigned long interval; /* in milli-seconds */
bool valid; /* false until following fields are valid */
/* registers values */
u8 temp[ARRAY_SIZE(lm95241_reg_address)];
u8 status, config, model, trutherm;
};
/* Conversions */
static int temp_from_reg_signed(u8 val_h, u8 val_l)
{
s16 val_hl = (val_h << 8) | val_l;
return val_hl * 1000 / 256;
}
static int temp_from_reg_unsigned(u8 val_h, u8 val_l)
{
u16 val_hl = (val_h << 8) | val_l;
return val_hl * 1000 / 256;
}
static struct lm95241_data *lm95241_update_device(struct device *dev)
{
struct lm95241_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated
+ msecs_to_jiffies(data->interval)) ||
!data->valid) {
int i;
dev_dbg(dev, "Updating lm95241 data.\n");
for (i = 0; i < ARRAY_SIZE(lm95241_reg_address); i++)
data->temp[i]
= i2c_smbus_read_byte_data(client,
lm95241_reg_address[i]);
data->status = i2c_smbus_read_byte_data(client,
LM95241_REG_R_STATUS);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static int lm95241_read_chip(struct device *dev, u32 attr, int channel,
long *val)
{
struct lm95241_data *data = dev_get_drvdata(dev);
switch (attr) {
case hwmon_chip_update_interval:
*val = data->interval;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int lm95241_read_temp(struct device *dev, u32 attr, int channel,
long *val)
{
struct lm95241_data *data = lm95241_update_device(dev);
switch (attr) {
case hwmon_temp_input:
if (!channel || (data->config & BIT(channel - 1)))
*val = temp_from_reg_signed(data->temp[channel * 2],
data->temp[channel * 2 + 1]);
else
*val = temp_from_reg_unsigned(data->temp[channel * 2],
data->temp[channel * 2 + 1]);
return 0;
case hwmon_temp_min:
if (channel == 1)
*val = (data->config & R1DF_MASK) ? -128000 : 0;
else
*val = (data->config & R2DF_MASK) ? -128000 : 0;
return 0;
case hwmon_temp_max:
if (channel == 1)
*val = (data->config & R1DF_MASK) ? 127875 : 255875;
else
*val = (data->config & R2DF_MASK) ? 127875 : 255875;
return 0;
case hwmon_temp_type:
if (channel == 1)
*val = (data->model & R1MS_MASK) ? 1 : 2;
else
*val = (data->model & R2MS_MASK) ? 1 : 2;
return 0;
case hwmon_temp_fault:
if (channel == 1)
*val = !!(data->status & R1DM);
else
*val = !!(data->status & R2DM);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int lm95241_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_chip:
return lm95241_read_chip(dev, attr, channel, val);
case hwmon_temp:
return lm95241_read_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int lm95241_write_chip(struct device *dev, u32 attr, int channel,
long val)
{
struct lm95241_data *data = dev_get_drvdata(dev);
int convrate;
u8 config;
int ret;
mutex_lock(&data->update_lock);
switch (attr) {
case hwmon_chip_update_interval:
config = data->config & ~CFG_CRMASK;
if (val < 130) {
convrate = 76;
config |= CFG_CR0076;
} else if (val < 590) {
convrate = 182;
config |= CFG_CR0182;
} else if (val < 1850) {
convrate = 1000;
config |= CFG_CR1000;
} else {
convrate = 2700;
config |= CFG_CR2700;
}
data->interval = convrate;
data->config = config;
ret = i2c_smbus_write_byte_data(data->client,
LM95241_REG_RW_CONFIG, config);
break;
default:
ret = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return ret;
}
static int lm95241_write_temp(struct device *dev, u32 attr, int channel,
long val)
{
struct lm95241_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
mutex_lock(&data->update_lock);
switch (attr) {
case hwmon_temp_min:
if (channel == 1) {
if (val < 0)
data->config |= R1DF_MASK;
else
data->config &= ~R1DF_MASK;
} else {
if (val < 0)
data->config |= R2DF_MASK;
else
data->config &= ~R2DF_MASK;
}
data->valid = false;
ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
data->config);
break;
case hwmon_temp_max:
if (channel == 1) {
if (val <= 127875)
data->config |= R1DF_MASK;
else
data->config &= ~R1DF_MASK;
} else {
if (val <= 127875)
data->config |= R2DF_MASK;
else
data->config &= ~R2DF_MASK;
}
data->valid = false;
ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
data->config);
break;
case hwmon_temp_type:
if (val != 1 && val != 2) {
ret = -EINVAL;
break;
}
if (channel == 1) {
data->trutherm &= ~(TT_MASK << TT1_SHIFT);
if (val == 1) {
data->model |= R1MS_MASK;
data->trutherm |= (TT_ON << TT1_SHIFT);
} else {
data->model &= ~R1MS_MASK;
data->trutherm |= (TT_OFF << TT1_SHIFT);
}
} else {
data->trutherm &= ~(TT_MASK << TT2_SHIFT);
if (val == 1) {
data->model |= R2MS_MASK;
data->trutherm |= (TT_ON << TT2_SHIFT);
} else {
data->model &= ~R2MS_MASK;
data->trutherm |= (TT_OFF << TT2_SHIFT);
}
}
ret = i2c_smbus_write_byte_data(client,
LM95241_REG_RW_REMOTE_MODEL,
data->model);
if (ret < 0)
break;
ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
data->trutherm);
break;
default:
ret = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return ret;
}
static int lm95241_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_chip:
return lm95241_write_chip(dev, attr, channel, val);
case hwmon_temp:
return lm95241_write_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t lm95241_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return 0644;
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
return 0444;
case hwmon_temp_fault:
return 0444;
case hwmon_temp_min:
case hwmon_temp_max:
case hwmon_temp_type:
return 0644;
}
break;
default:
break;
}
return 0;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm95241_detect(struct i2c_client *new_client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = new_client->adapter;
const char *name;
int mfg_id, chip_id;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
mfg_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID);
if (mfg_id != NATSEMI_MAN_ID)
return -ENODEV;
chip_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID);
switch (chip_id) {
case LM95231_CHIP_ID:
name = "lm95231";
break;
case LM95241_CHIP_ID:
name = "lm95241";
break;
default:
return -ENODEV;
}
/* Fill the i2c board info */
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static void lm95241_init_client(struct i2c_client *client,
struct lm95241_data *data)
{
data->interval = 1000;
data->config = CFG_CR1000;
data->trutherm = (TT_OFF << TT1_SHIFT) | (TT_OFF << TT2_SHIFT);
i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, data->config);
i2c_smbus_write_byte_data(client, LM95241_REG_RW_REM_FILTER,
R1FE_MASK | R2FE_MASK);
i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
data->trutherm);
i2c_smbus_write_byte_data(client, LM95241_REG_RW_REMOTE_MODEL,
data->model);
}
static const struct hwmon_channel_info * const lm95241_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
HWMON_T_TYPE | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
HWMON_T_TYPE | HWMON_T_FAULT),
NULL
};
static const struct hwmon_ops lm95241_hwmon_ops = {
.is_visible = lm95241_is_visible,
.read = lm95241_read,
.write = lm95241_write,
};
static const struct hwmon_chip_info lm95241_chip_info = {
.ops = &lm95241_hwmon_ops,
.info = lm95241_info,
};
static int lm95241_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct lm95241_data *data;
struct device *hwmon_dev;
data = devm_kzalloc(dev, sizeof(struct lm95241_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Initialize the LM95241 chip */
lm95241_init_client(client, data);
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&lm95241_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/* Driver data (common to all clients) */
static const struct i2c_device_id lm95241_id[] = {
{ "lm95231", 0 },
{ "lm95241", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm95241_id);
static struct i2c_driver lm95241_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = DEVNAME,
},
.probe = lm95241_probe,
.id_table = lm95241_id,
.detect = lm95241_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm95241_driver);
MODULE_AUTHOR("Davide Rizzo <[email protected]>");
MODULE_DESCRIPTION("LM95231/LM95241 sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm95241.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* smsc47b397.c - Part of lm_sensors, Linux kernel modules
* for hardware monitoring
*
* Supports the SMSC LPC47B397-NC Super-I/O chip.
*
* Author/Maintainer: Mark M. Hoffman <[email protected]>
* Copyright (C) 2004 Utilitek Systems, Inc.
*
* derived in part from smsc47m1.c:
* Copyright (C) 2002 Mark D. Studebaker <[email protected]>
* Copyright (C) 2004 Jean Delvare <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/acpi.h>
#include <linux/io.h>
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static struct platform_device *pdev;
#define DRVNAME "smsc47b397"
/* Super-I/0 registers and commands */
#define REG 0x2e /* The register to read/write */
#define VAL 0x2f /* The value to read/write */
static inline void superio_outb(int reg, int val)
{
outb(reg, REG);
outb(val, VAL);
}
static inline int superio_inb(int reg)
{
outb(reg, REG);
return inb(VAL);
}
/* select superio logical device */
static inline void superio_select(int ld)
{
superio_outb(0x07, ld);
}
static inline int superio_enter(void)
{
if (!request_muxed_region(REG, 2, DRVNAME))
return -EBUSY;
outb(0x55, REG);
return 0;
}
static inline void superio_exit(void)
{
outb(0xAA, REG);
release_region(REG, 2);
}
#define SUPERIO_REG_DEVID 0x20
#define SUPERIO_REG_DEVREV 0x21
#define SUPERIO_REG_BASE_MSB 0x60
#define SUPERIO_REG_BASE_LSB 0x61
#define SUPERIO_REG_LD8 0x08
#define SMSC_EXTENT 0x02
/* 0 <= nr <= 3 */
static u8 smsc47b397_reg_temp[] = {0x25, 0x26, 0x27, 0x80};
#define SMSC47B397_REG_TEMP(nr) (smsc47b397_reg_temp[(nr)])
/* 0 <= nr <= 3 */
#define SMSC47B397_REG_FAN_LSB(nr) (0x28 + 2 * (nr))
#define SMSC47B397_REG_FAN_MSB(nr) (0x29 + 2 * (nr))
struct smsc47b397_data {
unsigned short addr;
struct mutex lock;
struct mutex update_lock;
unsigned long last_updated; /* in jiffies */
bool valid;
/* register values */
u16 fan[4];
u8 temp[4];
};
static int smsc47b397_read_value(struct smsc47b397_data *data, u8 reg)
{
int res;
mutex_lock(&data->lock);
outb(reg, data->addr);
res = inb_p(data->addr + 1);
mutex_unlock(&data->lock);
return res;
}
static struct smsc47b397_data *smsc47b397_update_device(struct device *dev)
{
struct smsc47b397_data *data = dev_get_drvdata(dev);
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
dev_dbg(dev, "starting device update...\n");
/* 4 temperature inputs, 4 fan inputs */
for (i = 0; i < 4; i++) {
data->temp[i] = smsc47b397_read_value(data,
SMSC47B397_REG_TEMP(i));
/* must read LSB first */
data->fan[i] = smsc47b397_read_value(data,
SMSC47B397_REG_FAN_LSB(i));
data->fan[i] |= smsc47b397_read_value(data,
SMSC47B397_REG_FAN_MSB(i)) << 8;
}
data->last_updated = jiffies;
data->valid = true;
dev_dbg(dev, "... device update complete\n");
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* TEMP: 0.001C/bit (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static int temp_from_reg(u8 reg)
{
return (s8)reg * 1000;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47b397_data *data = smsc47b397_update_device(dev);
return sprintf(buf, "%d\n", temp_from_reg(data->temp[attr->index]));
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RO(temp4_input, temp, 3);
/*
* FAN: 1 RPM/bit
* REG: count of 90kHz pulses / revolution
*/
static int fan_from_reg(u16 reg)
{
if (reg == 0 || reg == 0xffff)
return 0;
return 90000 * 60 / reg;
}
static ssize_t fan_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47b397_data *data = smsc47b397_update_device(dev);
return sprintf(buf, "%d\n", fan_from_reg(data->fan[attr->index]));
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan, 2);
static SENSOR_DEVICE_ATTR_RO(fan4_input, fan, 3);
static struct attribute *smsc47b397_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(smsc47b397);
static int smsc47b397_probe(struct platform_device *pdev);
static struct platform_driver smsc47b397_driver = {
.driver = {
.name = DRVNAME,
},
.probe = smsc47b397_probe,
};
static int smsc47b397_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct smsc47b397_data *data;
struct device *hwmon_dev;
struct resource *res;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(dev, res->start, SMSC_EXTENT,
smsc47b397_driver.driver.name)) {
dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",
(unsigned long)res->start,
(unsigned long)res->start + SMSC_EXTENT - 1);
return -EBUSY;
}
data = devm_kzalloc(dev, sizeof(struct smsc47b397_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->addr = res->start;
mutex_init(&data->lock);
mutex_init(&data->update_lock);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, "smsc47b397",
data,
smsc47b397_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static int __init smsc47b397_device_add(unsigned short address)
{
struct resource res = {
.start = address,
.end = address + SMSC_EXTENT - 1,
.name = DRVNAME,
.flags = IORESOURCE_IO,
};
int err;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit;
pdev = platform_device_alloc(DRVNAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static int __init smsc47b397_find(void)
{
u8 id, rev;
char *name;
unsigned short addr;
int err;
err = superio_enter();
if (err)
return err;
id = force_id ? force_id : superio_inb(SUPERIO_REG_DEVID);
switch (id) {
case 0x81:
name = "SCH5307-NS";
break;
case 0x6f:
name = "LPC47B397-NC";
break;
case 0x85:
case 0x8c:
name = "SCH5317";
break;
default:
superio_exit();
return -ENODEV;
}
rev = superio_inb(SUPERIO_REG_DEVREV);
superio_select(SUPERIO_REG_LD8);
addr = (superio_inb(SUPERIO_REG_BASE_MSB) << 8)
| superio_inb(SUPERIO_REG_BASE_LSB);
pr_info("found SMSC %s (base address 0x%04x, revision %u)\n",
name, addr, rev);
superio_exit();
return addr;
}
static int __init smsc47b397_init(void)
{
unsigned short address;
int ret;
ret = smsc47b397_find();
if (ret < 0)
return ret;
address = ret;
ret = platform_driver_register(&smsc47b397_driver);
if (ret)
goto exit;
/* Sets global pdev as a side effect */
ret = smsc47b397_device_add(address);
if (ret)
goto exit_driver;
return 0;
exit_driver:
platform_driver_unregister(&smsc47b397_driver);
exit:
return ret;
}
static void __exit smsc47b397_exit(void)
{
platform_device_unregister(pdev);
platform_driver_unregister(&smsc47b397_driver);
}
MODULE_AUTHOR("Mark M. Hoffman <[email protected]>");
MODULE_DESCRIPTION("SMSC LPC47B397 driver");
MODULE_LICENSE("GPL");
module_init(smsc47b397_init);
module_exit(smsc47b397_exit);
|
linux-master
|
drivers/hwmon/smsc47b397.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* nct6683 - Driver for the hardware monitoring functionality of
* Nuvoton NCT6683D/NCT6686D/NCT6687D eSIO
*
* Copyright (C) 2013 Guenter Roeck <[email protected]>
*
* Derived from nct6775 driver
* Copyright (C) 2012, 2013 Guenter Roeck <[email protected]>
*
* Supports the following chips:
*
* Chip #vin #fan #pwm #temp chip ID
* nct6683d 21(1) 16 8 32(1) 0xc730
* nct6686d 21(1) 16 8 32(1) 0xd440
* nct6687d 21(1) 16 8 32(1) 0xd590
*
* Notes:
* (1) Total number of vin and temp inputs is 32.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
enum kinds { nct6683, nct6686, nct6687 };
static bool force;
module_param(force, bool, 0);
MODULE_PARM_DESC(force, "Set to one to enable support for unknown vendors");
static const char * const nct6683_device_names[] = {
"nct6683",
"nct6686",
"nct6687",
};
static const char * const nct6683_chip_names[] = {
"NCT6683D",
"NCT6686D",
"NCT6687D",
};
#define DRVNAME "nct6683"
/*
* Super-I/O constants and functions
*/
#define NCT6683_LD_ACPI 0x0a
#define NCT6683_LD_HWM 0x0b
#define NCT6683_LD_VID 0x0d
#define SIO_REG_LDSEL 0x07 /* Logical device select */
#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
#define SIO_REG_ENABLE 0x30 /* Logical device enable */
#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
#define SIO_NCT6681_ID 0xb270 /* for later */
#define SIO_NCT6683_ID 0xc730
#define SIO_NCT6686_ID 0xd440
#define SIO_NCT6687_ID 0xd590
#define SIO_ID_MASK 0xFFF0
static inline void
superio_outb(int ioreg, int reg, int val)
{
outb(reg, ioreg);
outb(val, ioreg + 1);
}
static inline int
superio_inb(int ioreg, int reg)
{
outb(reg, ioreg);
return inb(ioreg + 1);
}
static inline void
superio_select(int ioreg, int ld)
{
outb(SIO_REG_LDSEL, ioreg);
outb(ld, ioreg + 1);
}
static inline int
superio_enter(int ioreg)
{
/*
* Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
*/
if (!request_muxed_region(ioreg, 2, DRVNAME))
return -EBUSY;
outb(0x87, ioreg);
outb(0x87, ioreg);
return 0;
}
static inline void
superio_exit(int ioreg)
{
outb(0xaa, ioreg);
outb(0x02, ioreg);
outb(0x02, ioreg + 1);
release_region(ioreg, 2);
}
/*
* ISA constants
*/
#define IOREGION_ALIGNMENT (~7)
#define IOREGION_OFFSET 4 /* Use EC port 1 */
#define IOREGION_LENGTH 4
#define EC_PAGE_REG 0
#define EC_INDEX_REG 1
#define EC_DATA_REG 2
#define EC_EVENT_REG 3
/* Common and NCT6683 specific data */
#define NCT6683_NUM_REG_MON 32
#define NCT6683_NUM_REG_FAN 16
#define NCT6683_NUM_REG_PWM 8
#define NCT6683_REG_MON(x) (0x100 + (x) * 2)
#define NCT6683_REG_FAN_RPM(x) (0x140 + (x) * 2)
#define NCT6683_REG_PWM(x) (0x160 + (x))
#define NCT6683_REG_PWM_WRITE(x) (0xa28 + (x))
#define NCT6683_REG_MON_STS(x) (0x174 + (x))
#define NCT6683_REG_IDLE(x) (0x178 + (x))
#define NCT6683_REG_FAN_STS(x) (0x17c + (x))
#define NCT6683_REG_FAN_ERRSTS 0x17e
#define NCT6683_REG_FAN_INITSTS 0x17f
#define NCT6683_HWM_CFG 0x180
#define NCT6683_REG_MON_CFG(x) (0x1a0 + (x))
#define NCT6683_REG_FANIN_CFG(x) (0x1c0 + (x))
#define NCT6683_REG_FANOUT_CFG(x) (0x1d0 + (x))
#define NCT6683_REG_INTEL_TEMP_MAX(x) (0x901 + (x) * 16)
#define NCT6683_REG_INTEL_TEMP_CRIT(x) (0x90d + (x) * 16)
#define NCT6683_REG_TEMP_HYST(x) (0x330 + (x)) /* 8 bit */
#define NCT6683_REG_TEMP_MAX(x) (0x350 + (x)) /* 8 bit */
#define NCT6683_REG_MON_HIGH(x) (0x370 + (x) * 2) /* 8 bit */
#define NCT6683_REG_MON_LOW(x) (0x371 + (x) * 2) /* 8 bit */
#define NCT6683_REG_FAN_MIN(x) (0x3b8 + (x) * 2) /* 16 bit */
#define NCT6683_REG_FAN_CFG_CTRL 0xa01
#define NCT6683_FAN_CFG_REQ 0x80
#define NCT6683_FAN_CFG_DONE 0x40
#define NCT6683_REG_CUSTOMER_ID 0x602
#define NCT6683_CUSTOMER_ID_INTEL 0x805
#define NCT6683_CUSTOMER_ID_MITAC 0xa0e
#define NCT6683_CUSTOMER_ID_MSI 0x201
#define NCT6683_CUSTOMER_ID_MSI2 0x200
#define NCT6683_CUSTOMER_ID_ASROCK 0xe2c
#define NCT6683_CUSTOMER_ID_ASROCK2 0xe1b
#define NCT6683_REG_BUILD_YEAR 0x604
#define NCT6683_REG_BUILD_MONTH 0x605
#define NCT6683_REG_BUILD_DAY 0x606
#define NCT6683_REG_SERIAL 0x607
#define NCT6683_REG_VERSION_HI 0x608
#define NCT6683_REG_VERSION_LO 0x609
#define NCT6683_REG_CR_CASEOPEN 0xe8
#define NCT6683_CR_CASEOPEN_MASK (1 << 7)
#define NCT6683_REG_CR_BEEP 0xe0
#define NCT6683_CR_BEEP_MASK (1 << 6)
static const char *const nct6683_mon_label[] = {
NULL, /* disabled */
"Local",
"Diode 0 (curr)",
"Diode 1 (curr)",
"Diode 2 (curr)",
"Diode 0 (volt)",
"Diode 1 (volt)",
"Diode 2 (volt)",
"Thermistor 14",
"Thermistor 15",
"Thermistor 16",
"Thermistor 0",
"Thermistor 1",
"Thermistor 2",
"Thermistor 3",
"Thermistor 4",
"Thermistor 5", /* 0x10 */
"Thermistor 6",
"Thermistor 7",
"Thermistor 8",
"Thermistor 9",
"Thermistor 10",
"Thermistor 11",
"Thermistor 12",
"Thermistor 13",
NULL, NULL, NULL, NULL, NULL, NULL, NULL,
"PECI 0.0", /* 0x20 */
"PECI 1.0",
"PECI 2.0",
"PECI 3.0",
"PECI 0.1",
"PECI 1.1",
"PECI 2.1",
"PECI 3.1",
"PECI DIMM 0",
"PECI DIMM 1",
"PECI DIMM 2",
"PECI DIMM 3",
NULL, NULL, NULL, NULL,
"PCH CPU", /* 0x30 */
"PCH CHIP",
"PCH CHIP CPU MAX",
"PCH MCH",
"PCH DIMM 0",
"PCH DIMM 1",
"PCH DIMM 2",
"PCH DIMM 3",
"SMBus 0",
"SMBus 1",
"SMBus 2",
"SMBus 3",
"SMBus 4",
"SMBus 5",
"DIMM 0",
"DIMM 1",
"DIMM 2", /* 0x40 */
"DIMM 3",
"AMD TSI Addr 90h",
"AMD TSI Addr 92h",
"AMD TSI Addr 94h",
"AMD TSI Addr 96h",
"AMD TSI Addr 98h",
"AMD TSI Addr 9ah",
"AMD TSI Addr 9ch",
"AMD TSI Addr 9dh",
NULL, NULL, NULL, NULL, NULL, NULL,
"Virtual 0", /* 0x50 */
"Virtual 1",
"Virtual 2",
"Virtual 3",
"Virtual 4",
"Virtual 5",
"Virtual 6",
"Virtual 7",
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
"VCC", /* 0x60 voltage sensors */
"VSB",
"AVSB",
"VTT",
"VBAT",
"VREF",
"VIN0",
"VIN1",
"VIN2",
"VIN3",
"VIN4",
"VIN5",
"VIN6",
"VIN7",
"VIN8",
"VIN9",
"VIN10",
"VIN11",
"VIN12",
"VIN13",
"VIN14",
"VIN15",
"VIN16",
};
#define NUM_MON_LABELS ARRAY_SIZE(nct6683_mon_label)
#define MON_VOLTAGE_START 0x60
/* ------------------------------------------------------- */
struct nct6683_data {
int addr; /* IO base of EC space */
int sioreg; /* SIO register */
enum kinds kind;
u16 customer_id;
struct device *hwmon_dev;
const struct attribute_group *groups[6];
int temp_num; /* number of temperature attributes */
u8 temp_index[NCT6683_NUM_REG_MON];
u8 temp_src[NCT6683_NUM_REG_MON];
u8 in_num; /* number of voltage attributes */
u8 in_index[NCT6683_NUM_REG_MON];
u8 in_src[NCT6683_NUM_REG_MON];
struct mutex update_lock; /* used to protect sensor updates */
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
/* Voltage attribute values */
u8 in[3][NCT6683_NUM_REG_MON]; /* [0]=in, [1]=in_max, [2]=in_min */
/* Temperature attribute values */
s16 temp_in[NCT6683_NUM_REG_MON];
s8 temp[4][NCT6683_NUM_REG_MON];/* [0]=min, [1]=max, [2]=hyst,
* [3]=crit
*/
/* Fan attribute values */
unsigned int rpm[NCT6683_NUM_REG_FAN];
u16 fan_min[NCT6683_NUM_REG_FAN];
u8 fanin_cfg[NCT6683_NUM_REG_FAN];
u8 fanout_cfg[NCT6683_NUM_REG_FAN];
u16 have_fan; /* some fan inputs can be disabled */
u8 have_pwm;
u8 pwm[NCT6683_NUM_REG_PWM];
#ifdef CONFIG_PM
/* Remember extra register values over suspend/resume */
u8 hwm_cfg;
#endif
};
struct nct6683_sio_data {
int sioreg;
enum kinds kind;
};
struct sensor_device_template {
struct device_attribute dev_attr;
union {
struct {
u8 nr;
u8 index;
} s;
int index;
} u;
bool s2; /* true if both index and nr are used */
};
struct sensor_device_attr_u {
union {
struct sensor_device_attribute a1;
struct sensor_device_attribute_2 a2;
} u;
char name[32];
};
#define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
.attr = {.name = _template, .mode = _mode }, \
.show = _show, \
.store = _store, \
}
#define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
{ .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
.u.index = _index, \
.s2 = false }
#define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
_nr, _index) \
{ .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
.u.s.index = _index, \
.u.s.nr = _nr, \
.s2 = true }
#define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
static struct sensor_device_template sensor_dev_template_##_name \
= SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
_index)
#define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
_nr, _index) \
static struct sensor_device_template sensor_dev_template_##_name \
= SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
_nr, _index)
struct sensor_template_group {
struct sensor_device_template **templates;
umode_t (*is_visible)(struct kobject *, struct attribute *, int);
int base;
};
static struct attribute_group *
nct6683_create_attr_group(struct device *dev,
const struct sensor_template_group *tg,
int repeat)
{
struct sensor_device_attribute_2 *a2;
struct sensor_device_attribute *a;
struct sensor_device_template **t;
struct sensor_device_attr_u *su;
struct attribute_group *group;
struct attribute **attrs;
int i, count;
if (repeat <= 0)
return ERR_PTR(-EINVAL);
t = tg->templates;
for (count = 0; *t; t++, count++)
;
if (count == 0)
return ERR_PTR(-EINVAL);
group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
if (group == NULL)
return ERR_PTR(-ENOMEM);
attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
GFP_KERNEL);
if (attrs == NULL)
return ERR_PTR(-ENOMEM);
su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
GFP_KERNEL);
if (su == NULL)
return ERR_PTR(-ENOMEM);
group->attrs = attrs;
group->is_visible = tg->is_visible;
for (i = 0; i < repeat; i++) {
t = tg->templates;
while (*t) {
snprintf(su->name, sizeof(su->name),
(*t)->dev_attr.attr.name, tg->base + i);
if ((*t)->s2) {
a2 = &su->u.a2;
sysfs_attr_init(&a2->dev_attr.attr);
a2->dev_attr.attr.name = su->name;
a2->nr = (*t)->u.s.nr + i;
a2->index = (*t)->u.s.index;
a2->dev_attr.attr.mode =
(*t)->dev_attr.attr.mode;
a2->dev_attr.show = (*t)->dev_attr.show;
a2->dev_attr.store = (*t)->dev_attr.store;
*attrs = &a2->dev_attr.attr;
} else {
a = &su->u.a1;
sysfs_attr_init(&a->dev_attr.attr);
a->dev_attr.attr.name = su->name;
a->index = (*t)->u.index + i;
a->dev_attr.attr.mode =
(*t)->dev_attr.attr.mode;
a->dev_attr.show = (*t)->dev_attr.show;
a->dev_attr.store = (*t)->dev_attr.store;
*attrs = &a->dev_attr.attr;
}
attrs++;
su++;
t++;
}
}
return group;
}
/* LSB is 16 mV, except for the following sources, where it is 32 mV */
#define MON_SRC_VCC 0x60
#define MON_SRC_VSB 0x61
#define MON_SRC_AVSB 0x62
#define MON_SRC_VBAT 0x64
static inline long in_from_reg(u16 reg, u8 src)
{
int scale = 16;
if (src == MON_SRC_VCC || src == MON_SRC_VSB || src == MON_SRC_AVSB ||
src == MON_SRC_VBAT)
scale <<= 1;
return reg * scale;
}
static u16 nct6683_read(struct nct6683_data *data, u16 reg)
{
int res;
outb_p(0xff, data->addr + EC_PAGE_REG); /* unlock */
outb_p(reg >> 8, data->addr + EC_PAGE_REG);
outb_p(reg & 0xff, data->addr + EC_INDEX_REG);
res = inb_p(data->addr + EC_DATA_REG);
return res;
}
static u16 nct6683_read16(struct nct6683_data *data, u16 reg)
{
return (nct6683_read(data, reg) << 8) | nct6683_read(data, reg + 1);
}
static void nct6683_write(struct nct6683_data *data, u16 reg, u16 value)
{
outb_p(0xff, data->addr + EC_PAGE_REG); /* unlock */
outb_p(reg >> 8, data->addr + EC_PAGE_REG);
outb_p(reg & 0xff, data->addr + EC_INDEX_REG);
outb_p(value & 0xff, data->addr + EC_DATA_REG);
}
static int get_in_reg(struct nct6683_data *data, int nr, int index)
{
int ch = data->in_index[index];
int reg = -EINVAL;
switch (nr) {
case 0:
reg = NCT6683_REG_MON(ch);
break;
case 1:
if (data->customer_id != NCT6683_CUSTOMER_ID_INTEL)
reg = NCT6683_REG_MON_LOW(ch);
break;
case 2:
if (data->customer_id != NCT6683_CUSTOMER_ID_INTEL)
reg = NCT6683_REG_MON_HIGH(ch);
break;
default:
break;
}
return reg;
}
static int get_temp_reg(struct nct6683_data *data, int nr, int index)
{
int ch = data->temp_index[index];
int reg = -EINVAL;
switch (data->customer_id) {
case NCT6683_CUSTOMER_ID_INTEL:
switch (nr) {
default:
case 1: /* max */
reg = NCT6683_REG_INTEL_TEMP_MAX(ch);
break;
case 3: /* crit */
reg = NCT6683_REG_INTEL_TEMP_CRIT(ch);
break;
}
break;
case NCT6683_CUSTOMER_ID_MITAC:
default:
switch (nr) {
default:
case 0: /* min */
reg = NCT6683_REG_MON_LOW(ch);
break;
case 1: /* max */
reg = NCT6683_REG_TEMP_MAX(ch);
break;
case 2: /* hyst */
reg = NCT6683_REG_TEMP_HYST(ch);
break;
case 3: /* crit */
reg = NCT6683_REG_MON_HIGH(ch);
break;
}
break;
}
return reg;
}
static void nct6683_update_pwm(struct device *dev)
{
struct nct6683_data *data = dev_get_drvdata(dev);
int i;
for (i = 0; i < NCT6683_NUM_REG_PWM; i++) {
if (!(data->have_pwm & (1 << i)))
continue;
data->pwm[i] = nct6683_read(data, NCT6683_REG_PWM(i));
}
}
static struct nct6683_data *nct6683_update_device(struct device *dev)
{
struct nct6683_data *data = dev_get_drvdata(dev);
int i, j;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
/* Measured voltages and limits */
for (i = 0; i < data->in_num; i++) {
for (j = 0; j < 3; j++) {
int reg = get_in_reg(data, j, i);
if (reg >= 0)
data->in[j][i] =
nct6683_read(data, reg);
}
}
/* Measured temperatures and limits */
for (i = 0; i < data->temp_num; i++) {
u8 ch = data->temp_index[i];
data->temp_in[i] = nct6683_read16(data,
NCT6683_REG_MON(ch));
for (j = 0; j < 4; j++) {
int reg = get_temp_reg(data, j, i);
if (reg >= 0)
data->temp[j][i] =
nct6683_read(data, reg);
}
}
/* Measured fan speeds and limits */
for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
if (!(data->have_fan & (1 << i)))
continue;
data->rpm[i] = nct6683_read16(data,
NCT6683_REG_FAN_RPM(i));
data->fan_min[i] = nct6683_read16(data,
NCT6683_REG_FAN_MIN(i));
}
nct6683_update_pwm(dev);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs callback functions
*/
static ssize_t
show_in_label(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6683_data *data = nct6683_update_device(dev);
int nr = sattr->index;
return sprintf(buf, "%s\n", nct6683_mon_label[data->in_src[nr]]);
}
static ssize_t
show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct6683_data *data = nct6683_update_device(dev);
int index = sattr->index;
int nr = sattr->nr;
return sprintf(buf, "%ld\n",
in_from_reg(data->in[index][nr], data->in_index[index]));
}
static umode_t nct6683_in_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6683_data *data = dev_get_drvdata(dev);
int nr = index % 4; /* attribute */
/*
* Voltage limits exist for Intel boards,
* but register location and encoding is unknown
*/
if ((nr == 2 || nr == 3) &&
data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
return 0;
return attr->mode;
}
SENSOR_TEMPLATE(in_label, "in%d_label", S_IRUGO, show_in_label, NULL, 0);
SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IRUGO, show_in_reg, NULL, 0, 1);
SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IRUGO, show_in_reg, NULL, 0, 2);
static struct sensor_device_template *nct6683_attributes_in_template[] = {
&sensor_dev_template_in_label,
&sensor_dev_template_in_input,
&sensor_dev_template_in_min,
&sensor_dev_template_in_max,
NULL
};
static const struct sensor_template_group nct6683_in_template_group = {
.templates = nct6683_attributes_in_template,
.is_visible = nct6683_in_is_visible,
};
static ssize_t
show_fan(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6683_data *data = nct6683_update_device(dev);
return sprintf(buf, "%d\n", data->rpm[sattr->index]);
}
static ssize_t
show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6683_data *data = nct6683_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
return sprintf(buf, "%d\n", data->fan_min[nr]);
}
static ssize_t
show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6683_data *data = nct6683_update_device(dev);
return sprintf(buf, "%d\n",
((data->fanin_cfg[sattr->index] >> 5) & 0x03) + 1);
}
static umode_t nct6683_fan_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6683_data *data = dev_get_drvdata(dev);
int fan = index / 3; /* fan index */
int nr = index % 3; /* attribute index */
if (!(data->have_fan & (1 << fan)))
return 0;
/*
* Intel may have minimum fan speed limits,
* but register location and encoding are unknown.
*/
if (nr == 2 && data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
return 0;
return attr->mode;
}
SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IRUGO, show_fan_pulses, NULL, 0);
SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IRUGO, show_fan_min, NULL, 0);
/*
* nct6683_fan_is_visible uses the index into the following array
* to determine if attributes should be created or not.
* Any change in order or content must be matched.
*/
static struct sensor_device_template *nct6683_attributes_fan_template[] = {
&sensor_dev_template_fan_input,
&sensor_dev_template_fan_pulses,
&sensor_dev_template_fan_min,
NULL
};
static const struct sensor_template_group nct6683_fan_template_group = {
.templates = nct6683_attributes_fan_template,
.is_visible = nct6683_fan_is_visible,
.base = 1,
};
static ssize_t
show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6683_data *data = nct6683_update_device(dev);
int nr = sattr->index;
return sprintf(buf, "%s\n", nct6683_mon_label[data->temp_src[nr]]);
}
static ssize_t
show_temp8(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct6683_data *data = nct6683_update_device(dev);
int index = sattr->index;
int nr = sattr->nr;
return sprintf(buf, "%d\n", data->temp[index][nr] * 1000);
}
static ssize_t
show_temp_hyst(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6683_data *data = nct6683_update_device(dev);
int nr = sattr->index;
int temp = data->temp[1][nr] - data->temp[2][nr];
return sprintf(buf, "%d\n", temp * 1000);
}
static ssize_t
show_temp16(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6683_data *data = nct6683_update_device(dev);
int index = sattr->index;
return sprintf(buf, "%d\n", (data->temp_in[index] / 128) * 500);
}
/*
* Temperature sensor type is determined by temperature source
* and can not be modified.
* 0x02..0x07: Thermal diode
* 0x08..0x18: Thermistor
* 0x20..0x2b: Intel PECI
* 0x42..0x49: AMD TSI
* Others are unspecified (not visible)
*/
static int get_temp_type(u8 src)
{
if (src >= 0x02 && src <= 0x07)
return 3; /* thermal diode */
else if (src >= 0x08 && src <= 0x18)
return 4; /* thermistor */
else if (src >= 0x20 && src <= 0x2b)
return 6; /* PECI */
else if (src >= 0x42 && src <= 0x49)
return 5;
return 0;
}
static ssize_t
show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6683_data *data = nct6683_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
return sprintf(buf, "%d\n", get_temp_type(data->temp_src[nr]));
}
static umode_t nct6683_temp_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6683_data *data = dev_get_drvdata(dev);
int temp = index / 7; /* temp index */
int nr = index % 7; /* attribute index */
/*
* Intel does not have low temperature limits or temperature hysteresis
* registers, or at least register location and encoding is unknown.
*/
if ((nr == 2 || nr == 4) &&
data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
return 0;
if (nr == 6 && get_temp_type(data->temp_src[temp]) == 0)
return 0; /* type */
return attr->mode;
}
SENSOR_TEMPLATE(temp_input, "temp%d_input", S_IRUGO, show_temp16, NULL, 0);
SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
SENSOR_TEMPLATE_2(temp_min, "temp%d_min", S_IRUGO, show_temp8, NULL, 0, 0);
SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO, show_temp8, NULL, 0, 1);
SENSOR_TEMPLATE(temp_max_hyst, "temp%d_max_hyst", S_IRUGO, show_temp_hyst, NULL,
0);
SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO, show_temp8, NULL, 0, 3);
SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO, show_temp_type, NULL, 0);
/*
* nct6683_temp_is_visible uses the index into the following array
* to determine if attributes should be created or not.
* Any change in order or content must be matched.
*/
static struct sensor_device_template *nct6683_attributes_temp_template[] = {
&sensor_dev_template_temp_input,
&sensor_dev_template_temp_label,
&sensor_dev_template_temp_min, /* 2 */
&sensor_dev_template_temp_max, /* 3 */
&sensor_dev_template_temp_max_hyst, /* 4 */
&sensor_dev_template_temp_crit, /* 5 */
&sensor_dev_template_temp_type, /* 6 */
NULL
};
static const struct sensor_template_group nct6683_temp_template_group = {
.templates = nct6683_attributes_temp_template,
.is_visible = nct6683_temp_is_visible,
.base = 1,
};
static ssize_t
show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6683_data *data = nct6683_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int index = sattr->index;
return sprintf(buf, "%d\n", data->pwm[index]);
}
static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct6683_data *data = dev_get_drvdata(dev);
int index = sattr->index;
unsigned long val;
if (kstrtoul(buf, 10, &val) || val > 255)
return -EINVAL;
mutex_lock(&data->update_lock);
nct6683_write(data, NCT6683_REG_FAN_CFG_CTRL, NCT6683_FAN_CFG_REQ);
usleep_range(1000, 2000);
nct6683_write(data, NCT6683_REG_PWM_WRITE(index), val);
nct6683_write(data, NCT6683_REG_FAN_CFG_CTRL, NCT6683_FAN_CFG_DONE);
mutex_unlock(&data->update_lock);
return count;
}
SENSOR_TEMPLATE(pwm, "pwm%d", S_IRUGO, show_pwm, store_pwm, 0);
static umode_t nct6683_pwm_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6683_data *data = dev_get_drvdata(dev);
int pwm = index; /* pwm index */
if (!(data->have_pwm & (1 << pwm)))
return 0;
/* Only update pwm values for Mitac boards */
if (data->customer_id == NCT6683_CUSTOMER_ID_MITAC)
return attr->mode | S_IWUSR;
return attr->mode;
}
static struct sensor_device_template *nct6683_attributes_pwm_template[] = {
&sensor_dev_template_pwm,
NULL
};
static const struct sensor_template_group nct6683_pwm_template_group = {
.templates = nct6683_attributes_pwm_template,
.is_visible = nct6683_pwm_is_visible,
.base = 1,
};
static ssize_t
beep_enable_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6683_data *data = dev_get_drvdata(dev);
int ret;
u8 reg;
mutex_lock(&data->update_lock);
ret = superio_enter(data->sioreg);
if (ret)
goto error;
superio_select(data->sioreg, NCT6683_LD_HWM);
reg = superio_inb(data->sioreg, NCT6683_REG_CR_BEEP);
superio_exit(data->sioreg);
mutex_unlock(&data->update_lock);
return sprintf(buf, "%u\n", !!(reg & NCT6683_CR_BEEP_MASK));
error:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t
beep_enable_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6683_data *data = dev_get_drvdata(dev);
unsigned long val;
u8 reg;
int ret;
if (kstrtoul(buf, 10, &val) || (val != 0 && val != 1))
return -EINVAL;
mutex_lock(&data->update_lock);
ret = superio_enter(data->sioreg);
if (ret) {
count = ret;
goto error;
}
superio_select(data->sioreg, NCT6683_LD_HWM);
reg = superio_inb(data->sioreg, NCT6683_REG_CR_BEEP);
if (val)
reg |= NCT6683_CR_BEEP_MASK;
else
reg &= ~NCT6683_CR_BEEP_MASK;
superio_outb(data->sioreg, NCT6683_REG_CR_BEEP, reg);
superio_exit(data->sioreg);
error:
mutex_unlock(&data->update_lock);
return count;
}
/* Case open detection */
static ssize_t
intrusion0_alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct nct6683_data *data = dev_get_drvdata(dev);
int ret;
u8 reg;
mutex_lock(&data->update_lock);
ret = superio_enter(data->sioreg);
if (ret)
goto error;
superio_select(data->sioreg, NCT6683_LD_ACPI);
reg = superio_inb(data->sioreg, NCT6683_REG_CR_CASEOPEN);
superio_exit(data->sioreg);
mutex_unlock(&data->update_lock);
return sprintf(buf, "%u\n", !(reg & NCT6683_CR_CASEOPEN_MASK));
error:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t
intrusion0_alarm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6683_data *data = dev_get_drvdata(dev);
unsigned long val;
u8 reg;
int ret;
if (kstrtoul(buf, 10, &val) || val != 0)
return -EINVAL;
mutex_lock(&data->update_lock);
/*
* Use CR registers to clear caseopen status.
* Caseopen is activ low, clear by writing 1 into the register.
*/
ret = superio_enter(data->sioreg);
if (ret) {
count = ret;
goto error;
}
superio_select(data->sioreg, NCT6683_LD_ACPI);
reg = superio_inb(data->sioreg, NCT6683_REG_CR_CASEOPEN);
reg |= NCT6683_CR_CASEOPEN_MASK;
superio_outb(data->sioreg, NCT6683_REG_CR_CASEOPEN, reg);
reg &= ~NCT6683_CR_CASEOPEN_MASK;
superio_outb(data->sioreg, NCT6683_REG_CR_CASEOPEN, reg);
superio_exit(data->sioreg);
data->valid = false; /* Force cache refresh */
error:
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(intrusion0_alarm);
static DEVICE_ATTR_RW(beep_enable);
static struct attribute *nct6683_attributes_other[] = {
&dev_attr_intrusion0_alarm.attr,
&dev_attr_beep_enable.attr,
NULL
};
static const struct attribute_group nct6683_group_other = {
.attrs = nct6683_attributes_other,
};
/* Get the monitoring functions started */
static inline void nct6683_init_device(struct nct6683_data *data)
{
u8 tmp;
/* Start hardware monitoring if needed */
tmp = nct6683_read(data, NCT6683_HWM_CFG);
if (!(tmp & 0x80))
nct6683_write(data, NCT6683_HWM_CFG, tmp | 0x80);
}
/*
* There are a total of 24 fan inputs. Each can be configured as input
* or as output. A maximum of 16 inputs and 8 outputs is configurable.
*/
static void
nct6683_setup_fans(struct nct6683_data *data)
{
int i;
u8 reg;
for (i = 0; i < NCT6683_NUM_REG_FAN; i++) {
reg = nct6683_read(data, NCT6683_REG_FANIN_CFG(i));
if (reg & 0x80)
data->have_fan |= 1 << i;
data->fanin_cfg[i] = reg;
}
for (i = 0; i < NCT6683_NUM_REG_PWM; i++) {
reg = nct6683_read(data, NCT6683_REG_FANOUT_CFG(i));
if (reg & 0x80)
data->have_pwm |= 1 << i;
data->fanout_cfg[i] = reg;
}
}
/*
* Translation from monitoring register to temperature and voltage attributes
* ==========================================================================
*
* There are a total of 32 monitoring registers. Each can be assigned to either
* a temperature or voltage monitoring source.
* NCT6683_REG_MON_CFG(x) defines assignment for each monitoring source.
*
* Temperature and voltage attribute mapping is determined by walking through
* the NCT6683_REG_MON_CFG registers. If the assigned source is
* a temperature, temp_index[n] is set to the monitor register index, and
* temp_src[n] is set to the temperature source. If the assigned source is
* a voltage, the respective values are stored in in_index[] and in_src[],
* respectively.
*/
static void nct6683_setup_sensors(struct nct6683_data *data)
{
u8 reg;
int i;
data->temp_num = 0;
data->in_num = 0;
for (i = 0; i < NCT6683_NUM_REG_MON; i++) {
reg = nct6683_read(data, NCT6683_REG_MON_CFG(i)) & 0x7f;
/* Ignore invalid assignments */
if (reg >= NUM_MON_LABELS)
continue;
/* Skip if disabled or reserved */
if (nct6683_mon_label[reg] == NULL)
continue;
if (reg < MON_VOLTAGE_START) {
data->temp_index[data->temp_num] = i;
data->temp_src[data->temp_num] = reg;
data->temp_num++;
} else {
data->in_index[data->in_num] = i;
data->in_src[data->in_num] = reg;
data->in_num++;
}
}
}
static int nct6683_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct nct6683_sio_data *sio_data = dev->platform_data;
struct attribute_group *group;
struct nct6683_data *data;
struct device *hwmon_dev;
struct resource *res;
int groups = 0;
char build[16];
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(dev, res->start, IOREGION_LENGTH, DRVNAME))
return -EBUSY;
data = devm_kzalloc(dev, sizeof(struct nct6683_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->kind = sio_data->kind;
data->sioreg = sio_data->sioreg;
data->addr = res->start;
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
data->customer_id = nct6683_read16(data, NCT6683_REG_CUSTOMER_ID);
/* By default only instantiate driver if the customer ID is known */
switch (data->customer_id) {
case NCT6683_CUSTOMER_ID_INTEL:
break;
case NCT6683_CUSTOMER_ID_MITAC:
break;
case NCT6683_CUSTOMER_ID_MSI:
break;
case NCT6683_CUSTOMER_ID_MSI2:
break;
case NCT6683_CUSTOMER_ID_ASROCK:
break;
case NCT6683_CUSTOMER_ID_ASROCK2:
break;
default:
if (!force)
return -ENODEV;
}
nct6683_init_device(data);
nct6683_setup_fans(data);
nct6683_setup_sensors(data);
/* Register sysfs hooks */
if (data->have_pwm) {
group = nct6683_create_attr_group(dev,
&nct6683_pwm_template_group,
fls(data->have_pwm));
if (IS_ERR(group))
return PTR_ERR(group);
data->groups[groups++] = group;
}
if (data->in_num) {
group = nct6683_create_attr_group(dev,
&nct6683_in_template_group,
data->in_num);
if (IS_ERR(group))
return PTR_ERR(group);
data->groups[groups++] = group;
}
if (data->have_fan) {
group = nct6683_create_attr_group(dev,
&nct6683_fan_template_group,
fls(data->have_fan));
if (IS_ERR(group))
return PTR_ERR(group);
data->groups[groups++] = group;
}
if (data->temp_num) {
group = nct6683_create_attr_group(dev,
&nct6683_temp_template_group,
data->temp_num);
if (IS_ERR(group))
return PTR_ERR(group);
data->groups[groups++] = group;
}
data->groups[groups++] = &nct6683_group_other;
if (data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
scnprintf(build, sizeof(build), "%02x/%02x/%02x",
nct6683_read(data, NCT6683_REG_BUILD_MONTH),
nct6683_read(data, NCT6683_REG_BUILD_DAY),
nct6683_read(data, NCT6683_REG_BUILD_YEAR));
else
scnprintf(build, sizeof(build), "%02d/%02d/%02d",
nct6683_read(data, NCT6683_REG_BUILD_MONTH),
nct6683_read(data, NCT6683_REG_BUILD_DAY),
nct6683_read(data, NCT6683_REG_BUILD_YEAR));
dev_info(dev, "%s EC firmware version %d.%d build %s\n",
nct6683_chip_names[data->kind],
nct6683_read(data, NCT6683_REG_VERSION_HI),
nct6683_read(data, NCT6683_REG_VERSION_LO),
build);
hwmon_dev = devm_hwmon_device_register_with_groups(dev,
nct6683_device_names[data->kind], data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
#ifdef CONFIG_PM
static int nct6683_suspend(struct device *dev)
{
struct nct6683_data *data = nct6683_update_device(dev);
mutex_lock(&data->update_lock);
data->hwm_cfg = nct6683_read(data, NCT6683_HWM_CFG);
mutex_unlock(&data->update_lock);
return 0;
}
static int nct6683_resume(struct device *dev)
{
struct nct6683_data *data = dev_get_drvdata(dev);
mutex_lock(&data->update_lock);
nct6683_write(data, NCT6683_HWM_CFG, data->hwm_cfg);
/* Force re-reading all values */
data->valid = false;
mutex_unlock(&data->update_lock);
return 0;
}
static const struct dev_pm_ops nct6683_dev_pm_ops = {
.suspend = nct6683_suspend,
.resume = nct6683_resume,
.freeze = nct6683_suspend,
.restore = nct6683_resume,
};
#define NCT6683_DEV_PM_OPS (&nct6683_dev_pm_ops)
#else
#define NCT6683_DEV_PM_OPS NULL
#endif /* CONFIG_PM */
static struct platform_driver nct6683_driver = {
.driver = {
.name = DRVNAME,
.pm = NCT6683_DEV_PM_OPS,
},
.probe = nct6683_probe,
};
static int __init nct6683_find(int sioaddr, struct nct6683_sio_data *sio_data)
{
int addr;
u16 val;
int err;
err = superio_enter(sioaddr);
if (err)
return err;
val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
| superio_inb(sioaddr, SIO_REG_DEVID + 1);
switch (val & SIO_ID_MASK) {
case SIO_NCT6683_ID:
sio_data->kind = nct6683;
break;
case SIO_NCT6686_ID:
sio_data->kind = nct6686;
break;
case SIO_NCT6687_ID:
sio_data->kind = nct6687;
break;
default:
if (val != 0xffff)
pr_debug("unsupported chip ID: 0x%04x\n", val);
goto fail;
}
/* We have a known chip, find the HWM I/O address */
superio_select(sioaddr, NCT6683_LD_HWM);
val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
| superio_inb(sioaddr, SIO_REG_ADDR + 1);
addr = val & IOREGION_ALIGNMENT;
if (addr == 0) {
pr_err("EC base I/O port unconfigured\n");
goto fail;
}
/* Activate logical device if needed */
val = superio_inb(sioaddr, SIO_REG_ENABLE);
if (!(val & 0x01)) {
pr_warn("Forcibly enabling EC access. Data may be unusable.\n");
superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
}
superio_exit(sioaddr);
pr_info("Found %s or compatible chip at %#x:%#x\n",
nct6683_chip_names[sio_data->kind], sioaddr, addr);
sio_data->sioreg = sioaddr;
return addr;
fail:
superio_exit(sioaddr);
return -ENODEV;
}
/*
* when Super-I/O functions move to a separate file, the Super-I/O
* bus will manage the lifetime of the device and this module will only keep
* track of the nct6683 driver. But since we use platform_device_alloc(), we
* must keep track of the device
*/
static struct platform_device *pdev[2];
static int __init sensors_nct6683_init(void)
{
struct nct6683_sio_data sio_data;
int sioaddr[2] = { 0x2e, 0x4e };
struct resource res;
bool found = false;
int address;
int i, err;
err = platform_driver_register(&nct6683_driver);
if (err)
return err;
/*
* initialize sio_data->kind and sio_data->sioreg.
*
* when Super-I/O functions move to a separate file, the Super-I/O
* driver will probe 0x2e and 0x4e and auto-detect the presence of a
* nct6683 hardware monitor, and call probe()
*/
for (i = 0; i < ARRAY_SIZE(pdev); i++) {
address = nct6683_find(sioaddr[i], &sio_data);
if (address <= 0)
continue;
found = true;
pdev[i] = platform_device_alloc(DRVNAME, address);
if (!pdev[i]) {
err = -ENOMEM;
goto exit_device_unregister;
}
err = platform_device_add_data(pdev[i], &sio_data,
sizeof(struct nct6683_sio_data));
if (err)
goto exit_device_put;
memset(&res, 0, sizeof(res));
res.name = DRVNAME;
res.start = address + IOREGION_OFFSET;
res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
res.flags = IORESOURCE_IO;
err = acpi_check_resource_conflict(&res);
if (err) {
platform_device_put(pdev[i]);
pdev[i] = NULL;
continue;
}
err = platform_device_add_resources(pdev[i], &res, 1);
if (err)
goto exit_device_put;
/* platform_device_add calls probe() */
err = platform_device_add(pdev[i]);
if (err)
goto exit_device_put;
}
if (!found) {
err = -ENODEV;
goto exit_unregister;
}
return 0;
exit_device_put:
platform_device_put(pdev[i]);
exit_device_unregister:
while (--i >= 0) {
if (pdev[i])
platform_device_unregister(pdev[i]);
}
exit_unregister:
platform_driver_unregister(&nct6683_driver);
return err;
}
static void __exit sensors_nct6683_exit(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(pdev); i++) {
if (pdev[i])
platform_device_unregister(pdev[i]);
}
platform_driver_unregister(&nct6683_driver);
}
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("NCT6683D driver");
MODULE_LICENSE("GPL");
module_init(sensors_nct6683_init);
module_exit(sensors_nct6683_exit);
|
linux-master
|
drivers/hwmon/nct6683.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* Texas Instruments TMP108 SMBus temperature sensor driver
*
* Copyright (C) 2016 John Muir <[email protected]>
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#define DRIVER_NAME "tmp108"
#define TMP108_REG_TEMP 0x00
#define TMP108_REG_CONF 0x01
#define TMP108_REG_TLOW 0x02
#define TMP108_REG_THIGH 0x03
#define TMP108_TEMP_MIN_MC -50000 /* Minimum millicelcius. */
#define TMP108_TEMP_MAX_MC 127937 /* Maximum millicelcius. */
/* Configuration register bits.
* Note: these bit definitions are byte swapped.
*/
#define TMP108_CONF_M0 0x0100 /* Sensor mode. */
#define TMP108_CONF_M1 0x0200
#define TMP108_CONF_TM 0x0400 /* Thermostat mode. */
#define TMP108_CONF_FL 0x0800 /* Watchdog flag - TLOW */
#define TMP108_CONF_FH 0x1000 /* Watchdog flag - THIGH */
#define TMP108_CONF_CR0 0x2000 /* Conversion rate. */
#define TMP108_CONF_CR1 0x4000
#define TMP108_CONF_ID 0x8000
#define TMP108_CONF_HYS0 0x0010 /* Hysteresis. */
#define TMP108_CONF_HYS1 0x0020
#define TMP108_CONF_POL 0x0080 /* Polarity of alert. */
/* Defaults set by the hardware upon reset. */
#define TMP108_CONF_DEFAULTS (TMP108_CONF_CR0 | TMP108_CONF_TM |\
TMP108_CONF_HYS0 | TMP108_CONF_M1)
/* These bits are read-only. */
#define TMP108_CONF_READ_ONLY (TMP108_CONF_FL | TMP108_CONF_FH |\
TMP108_CONF_ID)
#define TMP108_CONF_MODE_MASK (TMP108_CONF_M0|TMP108_CONF_M1)
#define TMP108_MODE_SHUTDOWN 0x0000
#define TMP108_MODE_ONE_SHOT TMP108_CONF_M0
#define TMP108_MODE_CONTINUOUS TMP108_CONF_M1 /* Default */
/* When M1 is set, M0 is ignored. */
#define TMP108_CONF_CONVRATE_MASK (TMP108_CONF_CR0|TMP108_CONF_CR1)
#define TMP108_CONVRATE_0P25HZ 0x0000
#define TMP108_CONVRATE_1HZ TMP108_CONF_CR0 /* Default */
#define TMP108_CONVRATE_4HZ TMP108_CONF_CR1
#define TMP108_CONVRATE_16HZ (TMP108_CONF_CR0|TMP108_CONF_CR1)
#define TMP108_CONF_HYSTERESIS_MASK (TMP108_CONF_HYS0|TMP108_CONF_HYS1)
#define TMP108_HYSTERESIS_0C 0x0000
#define TMP108_HYSTERESIS_1C TMP108_CONF_HYS0 /* Default */
#define TMP108_HYSTERESIS_2C TMP108_CONF_HYS1
#define TMP108_HYSTERESIS_4C (TMP108_CONF_HYS0|TMP108_CONF_HYS1)
#define TMP108_CONVERSION_TIME_MS 30 /* in milli-seconds */
struct tmp108 {
struct regmap *regmap;
u16 orig_config;
unsigned long ready_time;
};
/* convert 12-bit TMP108 register value to milliCelsius */
static inline int tmp108_temp_reg_to_mC(s16 val)
{
return (val & ~0x0f) * 1000 / 256;
}
/* convert milliCelsius to left adjusted 12-bit TMP108 register value */
static inline u16 tmp108_mC_to_temp_reg(int val)
{
return (val * 256) / 1000;
}
static int tmp108_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *temp)
{
struct tmp108 *tmp108 = dev_get_drvdata(dev);
unsigned int regval;
int err, hyst;
if (type == hwmon_chip) {
if (attr == hwmon_chip_update_interval) {
err = regmap_read(tmp108->regmap, TMP108_REG_CONF,
®val);
if (err < 0)
return err;
switch (regval & TMP108_CONF_CONVRATE_MASK) {
case TMP108_CONVRATE_0P25HZ:
default:
*temp = 4000;
break;
case TMP108_CONVRATE_1HZ:
*temp = 1000;
break;
case TMP108_CONVRATE_4HZ:
*temp = 250;
break;
case TMP108_CONVRATE_16HZ:
*temp = 63;
break;
}
return 0;
}
return -EOPNOTSUPP;
}
switch (attr) {
case hwmon_temp_input:
/* Is it too early to return a conversion ? */
if (time_before(jiffies, tmp108->ready_time)) {
dev_dbg(dev, "%s: Conversion not ready yet..\n",
__func__);
return -EAGAIN;
}
err = regmap_read(tmp108->regmap, TMP108_REG_TEMP, ®val);
if (err < 0)
return err;
*temp = tmp108_temp_reg_to_mC(regval);
break;
case hwmon_temp_min:
case hwmon_temp_max:
err = regmap_read(tmp108->regmap, attr == hwmon_temp_min ?
TMP108_REG_TLOW : TMP108_REG_THIGH, ®val);
if (err < 0)
return err;
*temp = tmp108_temp_reg_to_mC(regval);
break;
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
err = regmap_read(tmp108->regmap, TMP108_REG_CONF, ®val);
if (err < 0)
return err;
*temp = !!(regval & (attr == hwmon_temp_min_alarm ?
TMP108_CONF_FL : TMP108_CONF_FH));
break;
case hwmon_temp_min_hyst:
case hwmon_temp_max_hyst:
err = regmap_read(tmp108->regmap, TMP108_REG_CONF, ®val);
if (err < 0)
return err;
switch (regval & TMP108_CONF_HYSTERESIS_MASK) {
case TMP108_HYSTERESIS_0C:
default:
hyst = 0;
break;
case TMP108_HYSTERESIS_1C:
hyst = 1000;
break;
case TMP108_HYSTERESIS_2C:
hyst = 2000;
break;
case TMP108_HYSTERESIS_4C:
hyst = 4000;
break;
}
err = regmap_read(tmp108->regmap, attr == hwmon_temp_min_hyst ?
TMP108_REG_TLOW : TMP108_REG_THIGH, ®val);
if (err < 0)
return err;
*temp = tmp108_temp_reg_to_mC(regval);
if (attr == hwmon_temp_min_hyst)
*temp += hyst;
else
*temp -= hyst;
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int tmp108_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long temp)
{
struct tmp108 *tmp108 = dev_get_drvdata(dev);
u32 regval, mask;
int err;
if (type == hwmon_chip) {
if (attr == hwmon_chip_update_interval) {
if (temp < 156)
mask = TMP108_CONVRATE_16HZ;
else if (temp < 625)
mask = TMP108_CONVRATE_4HZ;
else if (temp < 2500)
mask = TMP108_CONVRATE_1HZ;
else
mask = TMP108_CONVRATE_0P25HZ;
return regmap_update_bits(tmp108->regmap,
TMP108_REG_CONF,
TMP108_CONF_CONVRATE_MASK,
mask);
}
return -EOPNOTSUPP;
}
switch (attr) {
case hwmon_temp_min:
case hwmon_temp_max:
temp = clamp_val(temp, TMP108_TEMP_MIN_MC, TMP108_TEMP_MAX_MC);
return regmap_write(tmp108->regmap,
attr == hwmon_temp_min ?
TMP108_REG_TLOW : TMP108_REG_THIGH,
tmp108_mC_to_temp_reg(temp));
case hwmon_temp_min_hyst:
case hwmon_temp_max_hyst:
temp = clamp_val(temp, TMP108_TEMP_MIN_MC, TMP108_TEMP_MAX_MC);
err = regmap_read(tmp108->regmap,
attr == hwmon_temp_min_hyst ?
TMP108_REG_TLOW : TMP108_REG_THIGH,
®val);
if (err < 0)
return err;
if (attr == hwmon_temp_min_hyst)
temp -= tmp108_temp_reg_to_mC(regval);
else
temp = tmp108_temp_reg_to_mC(regval) - temp;
if (temp < 500)
mask = TMP108_HYSTERESIS_0C;
else if (temp < 1500)
mask = TMP108_HYSTERESIS_1C;
else if (temp < 3000)
mask = TMP108_HYSTERESIS_2C;
else
mask = TMP108_HYSTERESIS_4C;
return regmap_update_bits(tmp108->regmap, TMP108_REG_CONF,
TMP108_CONF_HYSTERESIS_MASK, mask);
default:
return -EOPNOTSUPP;
}
}
static umode_t tmp108_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
if (type == hwmon_chip && attr == hwmon_chip_update_interval)
return 0644;
if (type != hwmon_temp)
return 0;
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
return 0444;
case hwmon_temp_min:
case hwmon_temp_max:
case hwmon_temp_min_hyst:
case hwmon_temp_max_hyst:
return 0644;
default:
return 0;
}
}
static const struct hwmon_channel_info * const tmp108_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
HWMON_T_MIN_HYST | HWMON_T_MAX_HYST |
HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM),
NULL
};
static const struct hwmon_ops tmp108_hwmon_ops = {
.is_visible = tmp108_is_visible,
.read = tmp108_read,
.write = tmp108_write,
};
static const struct hwmon_chip_info tmp108_chip_info = {
.ops = &tmp108_hwmon_ops,
.info = tmp108_info,
};
static void tmp108_restore_config(void *data)
{
struct tmp108 *tmp108 = data;
regmap_write(tmp108->regmap, TMP108_REG_CONF, tmp108->orig_config);
}
static bool tmp108_is_writeable_reg(struct device *dev, unsigned int reg)
{
return reg != TMP108_REG_TEMP;
}
static bool tmp108_is_volatile_reg(struct device *dev, unsigned int reg)
{
/* Configuration register must be volatile to enable FL and FH. */
return reg == TMP108_REG_TEMP || reg == TMP108_REG_CONF;
}
static const struct regmap_config tmp108_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.max_register = TMP108_REG_THIGH,
.writeable_reg = tmp108_is_writeable_reg,
.volatile_reg = tmp108_is_volatile_reg,
.val_format_endian = REGMAP_ENDIAN_BIG,
.cache_type = REGCACHE_MAPLE,
.use_single_read = true,
.use_single_write = true,
};
static int tmp108_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct tmp108 *tmp108;
int err;
u32 config;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WORD_DATA)) {
dev_err(dev,
"adapter doesn't support SMBus word transactions\n");
return -ENODEV;
}
tmp108 = devm_kzalloc(dev, sizeof(*tmp108), GFP_KERNEL);
if (!tmp108)
return -ENOMEM;
dev_set_drvdata(dev, tmp108);
tmp108->regmap = devm_regmap_init_i2c(client, &tmp108_regmap_config);
if (IS_ERR(tmp108->regmap)) {
err = PTR_ERR(tmp108->regmap);
dev_err(dev, "regmap init failed: %d", err);
return err;
}
err = regmap_read(tmp108->regmap, TMP108_REG_CONF, &config);
if (err < 0) {
dev_err(dev, "error reading config register: %d", err);
return err;
}
tmp108->orig_config = config;
/* Only continuous mode is supported. */
config &= ~TMP108_CONF_MODE_MASK;
config |= TMP108_MODE_CONTINUOUS;
/* Only comparator mode is supported. */
config &= ~TMP108_CONF_TM;
err = regmap_write(tmp108->regmap, TMP108_REG_CONF, config);
if (err < 0) {
dev_err(dev, "error writing config register: %d", err);
return err;
}
tmp108->ready_time = jiffies;
if ((tmp108->orig_config & TMP108_CONF_MODE_MASK) ==
TMP108_MODE_SHUTDOWN)
tmp108->ready_time +=
msecs_to_jiffies(TMP108_CONVERSION_TIME_MS);
err = devm_add_action_or_reset(dev, tmp108_restore_config, tmp108);
if (err) {
dev_err(dev, "add action or reset failed: %d", err);
return err;
}
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
tmp108,
&tmp108_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static int tmp108_suspend(struct device *dev)
{
struct tmp108 *tmp108 = dev_get_drvdata(dev);
return regmap_update_bits(tmp108->regmap, TMP108_REG_CONF,
TMP108_CONF_MODE_MASK, TMP108_MODE_SHUTDOWN);
}
static int tmp108_resume(struct device *dev)
{
struct tmp108 *tmp108 = dev_get_drvdata(dev);
int err;
err = regmap_update_bits(tmp108->regmap, TMP108_REG_CONF,
TMP108_CONF_MODE_MASK, TMP108_MODE_CONTINUOUS);
tmp108->ready_time = jiffies +
msecs_to_jiffies(TMP108_CONVERSION_TIME_MS);
return err;
}
static DEFINE_SIMPLE_DEV_PM_OPS(tmp108_dev_pm_ops, tmp108_suspend, tmp108_resume);
static const struct i2c_device_id tmp108_i2c_ids[] = {
{ "tmp108", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, tmp108_i2c_ids);
#ifdef CONFIG_OF
static const struct of_device_id tmp108_of_ids[] = {
{ .compatible = "ti,tmp108", },
{}
};
MODULE_DEVICE_TABLE(of, tmp108_of_ids);
#endif
static struct i2c_driver tmp108_driver = {
.driver = {
.name = DRIVER_NAME,
.pm = pm_sleep_ptr(&tmp108_dev_pm_ops),
.of_match_table = of_match_ptr(tmp108_of_ids),
},
.probe = tmp108_probe,
.id_table = tmp108_i2c_ids,
};
module_i2c_driver(tmp108_driver);
MODULE_AUTHOR("John Muir <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments TMP108 temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/tmp108.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* nct7904.c - driver for Nuvoton NCT7904D.
*
* Copyright (c) 2015 Kontron
* Author: Vadim V. Vlasov <[email protected]>
*
* Copyright (c) 2019 Advantech
* Author: Amy.Shih <[email protected]>
*
* Copyright (c) 2020 Advantech
* Author: Yuechao Zhao <[email protected]>
*
* Supports the following chips:
*
* Chip #vin #fan #pwm #temp #dts chip ID
* nct7904d 20 12 4 5 8 0xc5
*/
#include <linux/module.h>
#include <linux/device.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/hwmon.h>
#include <linux/watchdog.h>
#define VENDOR_ID_REG 0x7A /* Any bank */
#define NUVOTON_ID 0x50
#define CHIP_ID_REG 0x7B /* Any bank */
#define NCT7904_ID 0xC5
#define DEVICE_ID_REG 0x7C /* Any bank */
#define BANK_SEL_REG 0xFF
#define BANK_0 0x00
#define BANK_1 0x01
#define BANK_2 0x02
#define BANK_3 0x03
#define BANK_4 0x04
#define BANK_MAX 0x04
#define FANIN_MAX 12 /* Counted from 1 */
#define VSEN_MAX 21 /* VSEN1..14, 3VDD, VBAT, V3VSB,
LTD (not a voltage), VSEN17..19 */
#define FANCTL_MAX 4 /* Counted from 1 */
#define TCPU_MAX 8 /* Counted from 1 */
#define TEMP_MAX 4 /* Counted from 1 */
#define SMI_STS_MAX 10 /* Counted from 1 */
#define VT_ADC_CTRL0_REG 0x20 /* Bank 0 */
#define VT_ADC_CTRL1_REG 0x21 /* Bank 0 */
#define VT_ADC_CTRL2_REG 0x22 /* Bank 0 */
#define FANIN_CTRL0_REG 0x24
#define FANIN_CTRL1_REG 0x25
#define DTS_T_CTRL0_REG 0x26
#define DTS_T_CTRL1_REG 0x27
#define VT_ADC_MD_REG 0x2E
#define VSEN1_HV_LL_REG 0x02 /* Bank 1; 2 regs (HV/LV) per sensor */
#define VSEN1_LV_LL_REG 0x03 /* Bank 1; 2 regs (HV/LV) per sensor */
#define VSEN1_HV_HL_REG 0x00 /* Bank 1; 2 regs (HV/LV) per sensor */
#define VSEN1_LV_HL_REG 0x01 /* Bank 1; 2 regs (HV/LV) per sensor */
#define SMI_STS1_REG 0xC1 /* Bank 0; SMI Status Register */
#define SMI_STS3_REG 0xC3 /* Bank 0; SMI Status Register */
#define SMI_STS5_REG 0xC5 /* Bank 0; SMI Status Register */
#define SMI_STS7_REG 0xC7 /* Bank 0; SMI Status Register */
#define SMI_STS8_REG 0xC8 /* Bank 0; SMI Status Register */
#define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
#define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
#define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
#define LTD_HV_HL_REG 0x44 /* Bank 1; 1 reg for LTD */
#define LTD_LV_HL_REG 0x45 /* Bank 1; 1 reg for LTD */
#define LTD_HV_LL_REG 0x46 /* Bank 1; 1 reg for LTD */
#define LTD_LV_LL_REG 0x47 /* Bank 1; 1 reg for LTD */
#define TEMP_CH1_CH_REG 0x05 /* Bank 1; 1 reg for LTD */
#define TEMP_CH1_W_REG 0x06 /* Bank 1; 1 reg for LTD */
#define TEMP_CH1_WH_REG 0x07 /* Bank 1; 1 reg for LTD */
#define TEMP_CH1_C_REG 0x04 /* Bank 1; 1 reg per sensor */
#define DTS_T_CPU1_C_REG 0x90 /* Bank 1; 1 reg per sensor */
#define DTS_T_CPU1_CH_REG 0x91 /* Bank 1; 1 reg per sensor */
#define DTS_T_CPU1_W_REG 0x92 /* Bank 1; 1 reg per sensor */
#define DTS_T_CPU1_WH_REG 0x93 /* Bank 1; 1 reg per sensor */
#define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
#define FANIN1_HV_HL_REG 0x60 /* Bank 1; 2 regs (HV/LV) per sensor */
#define FANIN1_LV_HL_REG 0x61 /* Bank 1; 2 regs (HV/LV) per sensor */
#define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
#define PRTS_REG 0x03 /* Bank 2 */
#define PFE_REG 0x00 /* Bank 2; PECI Function Enable */
#define TSI_CTRL_REG 0x50 /* Bank 2; TSI Control Register */
#define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
#define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
#define WDT_LOCK_REG 0xE0 /* W/O Lock Watchdog Register */
#define WDT_EN_REG 0xE1 /* R/O Watchdog Enable Register */
#define WDT_STS_REG 0xE2 /* R/O Watchdog Status Register */
#define WDT_TIMER_REG 0xE3 /* R/W Watchdog Timer Register */
#define WDT_SOFT_EN 0x55 /* Enable soft watchdog timer */
#define WDT_SOFT_DIS 0xAA /* Disable soft watchdog timer */
#define VOLT_MONITOR_MODE 0x0
#define THERMAL_DIODE_MODE 0x1
#define THERMISTOR_MODE 0x3
#define ENABLE_TSI BIT(1)
#define WATCHDOG_TIMEOUT 1 /* 1 minute default timeout */
/*The timeout range is 1-255 minutes*/
#define MIN_TIMEOUT (1 * 60)
#define MAX_TIMEOUT (255 * 60)
static int timeout;
module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout, "Watchdog timeout in minutes. 1 <= timeout <= 255, default="
__MODULE_STRING(WATCHDOG_TIMEOUT) ".");
static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
static const unsigned short normal_i2c[] = {
0x2d, 0x2e, I2C_CLIENT_END
};
struct nct7904_data {
struct i2c_client *client;
struct watchdog_device wdt;
struct mutex bank_lock;
int bank_sel;
u32 fanin_mask;
u32 vsen_mask;
u32 tcpu_mask;
u8 fan_mode[FANCTL_MAX];
u8 enable_dts;
u8 has_dts;
u8 temp_mode; /* 0: TR mode, 1: TD mode */
u8 fan_alarm[2];
u8 vsen_alarm[3];
};
/* Access functions */
static int nct7904_bank_lock(struct nct7904_data *data, unsigned int bank)
{
int ret;
mutex_lock(&data->bank_lock);
if (data->bank_sel == bank)
return 0;
ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank);
if (ret == 0)
data->bank_sel = bank;
else
data->bank_sel = -1;
return ret;
}
static inline void nct7904_bank_release(struct nct7904_data *data)
{
mutex_unlock(&data->bank_lock);
}
/* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */
static int nct7904_read_reg(struct nct7904_data *data,
unsigned int bank, unsigned int reg)
{
struct i2c_client *client = data->client;
int ret;
ret = nct7904_bank_lock(data, bank);
if (ret == 0)
ret = i2c_smbus_read_byte_data(client, reg);
nct7904_bank_release(data);
return ret;
}
/*
* Read 2-byte register. Returns register in big-endian format or
* -ERRNO on error.
*/
static int nct7904_read_reg16(struct nct7904_data *data,
unsigned int bank, unsigned int reg)
{
struct i2c_client *client = data->client;
int ret, hi;
ret = nct7904_bank_lock(data, bank);
if (ret == 0) {
ret = i2c_smbus_read_byte_data(client, reg);
if (ret >= 0) {
hi = ret;
ret = i2c_smbus_read_byte_data(client, reg + 1);
if (ret >= 0)
ret |= hi << 8;
}
}
nct7904_bank_release(data);
return ret;
}
/* Write 1-byte register. Returns 0 or -ERRNO on error. */
static int nct7904_write_reg(struct nct7904_data *data,
unsigned int bank, unsigned int reg, u8 val)
{
struct i2c_client *client = data->client;
int ret;
ret = nct7904_bank_lock(data, bank);
if (ret == 0)
ret = i2c_smbus_write_byte_data(client, reg, val);
nct7904_bank_release(data);
return ret;
}
static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
long *val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
unsigned int cnt, rpm;
int ret;
switch (attr) {
case hwmon_fan_input:
ret = nct7904_read_reg16(data, BANK_0,
FANIN1_HV_REG + channel * 2);
if (ret < 0)
return ret;
cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
if (cnt == 0 || cnt == 0x1fff)
rpm = 0;
else
rpm = 1350000 / cnt;
*val = rpm;
return 0;
case hwmon_fan_min:
ret = nct7904_read_reg16(data, BANK_1,
FANIN1_HV_HL_REG + channel * 2);
if (ret < 0)
return ret;
cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
if (cnt == 0 || cnt == 0x1fff)
rpm = 0;
else
rpm = 1350000 / cnt;
*val = rpm;
return 0;
case hwmon_fan_alarm:
ret = nct7904_read_reg(data, BANK_0,
SMI_STS5_REG + (channel >> 3));
if (ret < 0)
return ret;
if (!data->fan_alarm[channel >> 3])
data->fan_alarm[channel >> 3] = ret & 0xff;
else
/* If there is new alarm showing up */
data->fan_alarm[channel >> 3] |= (ret & 0xff);
*val = (data->fan_alarm[channel >> 3] >> (channel & 0x07)) & 1;
/* Needs to clean the alarm if alarm existing */
if (*val)
data->fan_alarm[channel >> 3] ^= 1 << (channel & 0x07);
return 0;
default:
return -EOPNOTSUPP;
}
}
static umode_t nct7904_fan_is_visible(const void *_data, u32 attr, int channel)
{
const struct nct7904_data *data = _data;
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_alarm:
if (data->fanin_mask & (1 << channel))
return 0444;
break;
case hwmon_fan_min:
if (data->fanin_mask & (1 << channel))
return 0644;
break;
default:
break;
}
return 0;
}
static u8 nct7904_chan_to_index[] = {
0, /* Not used */
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
18, 19, 20, 16
};
static int nct7904_read_in(struct device *dev, u32 attr, int channel,
long *val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret, volt, index;
index = nct7904_chan_to_index[channel];
switch (attr) {
case hwmon_in_input:
ret = nct7904_read_reg16(data, BANK_0,
VSEN1_HV_REG + index * 2);
if (ret < 0)
return ret;
volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
if (index < 14)
volt *= 2; /* 0.002V scale */
else
volt *= 6; /* 0.006V scale */
*val = volt;
return 0;
case hwmon_in_min:
ret = nct7904_read_reg16(data, BANK_1,
VSEN1_HV_LL_REG + index * 4);
if (ret < 0)
return ret;
volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
if (index < 14)
volt *= 2; /* 0.002V scale */
else
volt *= 6; /* 0.006V scale */
*val = volt;
return 0;
case hwmon_in_max:
ret = nct7904_read_reg16(data, BANK_1,
VSEN1_HV_HL_REG + index * 4);
if (ret < 0)
return ret;
volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
if (index < 14)
volt *= 2; /* 0.002V scale */
else
volt *= 6; /* 0.006V scale */
*val = volt;
return 0;
case hwmon_in_alarm:
ret = nct7904_read_reg(data, BANK_0,
SMI_STS1_REG + (index >> 3));
if (ret < 0)
return ret;
if (!data->vsen_alarm[index >> 3])
data->vsen_alarm[index >> 3] = ret & 0xff;
else
/* If there is new alarm showing up */
data->vsen_alarm[index >> 3] |= (ret & 0xff);
*val = (data->vsen_alarm[index >> 3] >> (index & 0x07)) & 1;
/* Needs to clean the alarm if alarm existing */
if (*val)
data->vsen_alarm[index >> 3] ^= 1 << (index & 0x07);
return 0;
default:
return -EOPNOTSUPP;
}
}
static umode_t nct7904_in_is_visible(const void *_data, u32 attr, int channel)
{
const struct nct7904_data *data = _data;
int index = nct7904_chan_to_index[channel];
switch (attr) {
case hwmon_in_input:
case hwmon_in_alarm:
if (channel > 0 && (data->vsen_mask & BIT(index)))
return 0444;
break;
case hwmon_in_min:
case hwmon_in_max:
if (channel > 0 && (data->vsen_mask & BIT(index)))
return 0644;
break;
default:
break;
}
return 0;
}
static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
long *val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret, temp;
unsigned int reg1, reg2, reg3;
s8 temps;
switch (attr) {
case hwmon_temp_input:
if (channel == 4)
ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG);
else if (channel < 5)
ret = nct7904_read_reg16(data, BANK_0,
TEMP_CH1_HV_REG + channel * 4);
else
ret = nct7904_read_reg16(data, BANK_0,
T_CPU1_HV_REG + (channel - 5)
* 2);
if (ret < 0)
return ret;
temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
*val = sign_extend32(temp, 10) * 125;
return 0;
case hwmon_temp_alarm:
if (channel == 4) {
ret = nct7904_read_reg(data, BANK_0,
SMI_STS3_REG);
if (ret < 0)
return ret;
*val = (ret >> 1) & 1;
} else if (channel < 4) {
ret = nct7904_read_reg(data, BANK_0,
SMI_STS1_REG);
if (ret < 0)
return ret;
*val = (ret >> (((channel * 2) + 1) & 0x07)) & 1;
} else {
if ((channel - 5) < 4) {
ret = nct7904_read_reg(data, BANK_0,
SMI_STS7_REG +
((channel - 5) >> 3));
if (ret < 0)
return ret;
*val = (ret >> ((channel - 5) & 0x07)) & 1;
} else {
ret = nct7904_read_reg(data, BANK_0,
SMI_STS8_REG +
((channel - 5) >> 3));
if (ret < 0)
return ret;
*val = (ret >> (((channel - 5) & 0x07) - 4))
& 1;
}
}
return 0;
case hwmon_temp_type:
if (channel < 5) {
if ((data->tcpu_mask >> channel) & 0x01) {
if ((data->temp_mode >> channel) & 0x01)
*val = 3; /* TD */
else
*val = 4; /* TR */
} else {
*val = 0;
}
} else {
if ((data->has_dts >> (channel - 5)) & 0x01) {
if (data->enable_dts & ENABLE_TSI)
*val = 5; /* TSI */
else
*val = 6; /* PECI */
} else {
*val = 0;
}
}
return 0;
case hwmon_temp_max:
reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
case hwmon_temp_max_hyst:
reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
break;
case hwmon_temp_crit:
reg1 = LTD_HV_HL_REG;
reg2 = TEMP_CH1_C_REG;
reg3 = DTS_T_CPU1_C_REG;
break;
case hwmon_temp_crit_hyst:
reg1 = LTD_LV_HL_REG;
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;
default:
return -EOPNOTSUPP;
}
if (channel == 4)
ret = nct7904_read_reg(data, BANK_1, reg1);
else if (channel < 5)
ret = nct7904_read_reg(data, BANK_1,
reg2 + channel * 8);
else
ret = nct7904_read_reg(data, BANK_1,
reg3 + (channel - 5) * 4);
if (ret < 0)
return ret;
temps = ret;
*val = temps * 1000;
return 0;
}
static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
{
const struct nct7904_data *data = _data;
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_alarm:
case hwmon_temp_type:
if (channel < 5) {
if (data->tcpu_mask & BIT(channel))
return 0444;
} else {
if (data->has_dts & BIT(channel - 5))
return 0444;
}
break;
case hwmon_temp_max:
case hwmon_temp_max_hyst:
case hwmon_temp_crit:
case hwmon_temp_crit_hyst:
if (channel < 5) {
if (data->tcpu_mask & BIT(channel))
return 0644;
} else {
if (data->has_dts & BIT(channel - 5))
return 0644;
}
break;
default:
break;
}
return 0;
}
static int nct7904_read_pwm(struct device *dev, u32 attr, int channel,
long *val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret;
switch (attr) {
case hwmon_pwm_input:
ret = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + channel);
if (ret < 0)
return ret;
*val = ret;
return 0;
case hwmon_pwm_enable:
ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + channel);
if (ret < 0)
return ret;
*val = ret ? 2 : 1;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
long val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret;
unsigned int reg1, reg2, reg3;
val = clamp_val(val / 1000, -128, 127);
switch (attr) {
case hwmon_temp_max:
reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
case hwmon_temp_max_hyst:
reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
break;
case hwmon_temp_crit:
reg1 = LTD_HV_HL_REG;
reg2 = TEMP_CH1_C_REG;
reg3 = DTS_T_CPU1_C_REG;
break;
case hwmon_temp_crit_hyst:
reg1 = LTD_LV_HL_REG;
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;
default:
return -EOPNOTSUPP;
}
if (channel == 4)
ret = nct7904_write_reg(data, BANK_1, reg1, val);
else if (channel < 5)
ret = nct7904_write_reg(data, BANK_1,
reg2 + channel * 8, val);
else
ret = nct7904_write_reg(data, BANK_1,
reg3 + (channel - 5) * 4, val);
return ret;
}
static int nct7904_write_fan(struct device *dev, u32 attr, int channel,
long val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret;
u8 tmp;
switch (attr) {
case hwmon_fan_min:
if (val <= 0)
return -EINVAL;
val = clamp_val(DIV_ROUND_CLOSEST(1350000, val), 1, 0x1fff);
tmp = (val >> 5) & 0xff;
ret = nct7904_write_reg(data, BANK_1,
FANIN1_HV_HL_REG + channel * 2, tmp);
if (ret < 0)
return ret;
tmp = val & 0x1f;
ret = nct7904_write_reg(data, BANK_1,
FANIN1_LV_HL_REG + channel * 2, tmp);
return ret;
default:
return -EOPNOTSUPP;
}
}
static int nct7904_write_in(struct device *dev, u32 attr, int channel,
long val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret, index, tmp;
index = nct7904_chan_to_index[channel];
if (index < 14)
val = val / 2; /* 0.002V scale */
else
val = val / 6; /* 0.006V scale */
val = clamp_val(val, 0, 0x7ff);
switch (attr) {
case hwmon_in_min:
tmp = nct7904_read_reg(data, BANK_1,
VSEN1_LV_LL_REG + index * 4);
if (tmp < 0)
return tmp;
tmp &= ~0x7;
tmp |= val & 0x7;
ret = nct7904_write_reg(data, BANK_1,
VSEN1_LV_LL_REG + index * 4, tmp);
if (ret < 0)
return ret;
tmp = nct7904_read_reg(data, BANK_1,
VSEN1_HV_LL_REG + index * 4);
if (tmp < 0)
return tmp;
tmp = (val >> 3) & 0xff;
ret = nct7904_write_reg(data, BANK_1,
VSEN1_HV_LL_REG + index * 4, tmp);
return ret;
case hwmon_in_max:
tmp = nct7904_read_reg(data, BANK_1,
VSEN1_LV_HL_REG + index * 4);
if (tmp < 0)
return tmp;
tmp &= ~0x7;
tmp |= val & 0x7;
ret = nct7904_write_reg(data, BANK_1,
VSEN1_LV_HL_REG + index * 4, tmp);
if (ret < 0)
return ret;
tmp = nct7904_read_reg(data, BANK_1,
VSEN1_HV_HL_REG + index * 4);
if (tmp < 0)
return tmp;
tmp = (val >> 3) & 0xff;
ret = nct7904_write_reg(data, BANK_1,
VSEN1_HV_HL_REG + index * 4, tmp);
return ret;
default:
return -EOPNOTSUPP;
}
}
static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
long val)
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret;
switch (attr) {
case hwmon_pwm_input:
if (val < 0 || val > 255)
return -EINVAL;
ret = nct7904_write_reg(data, BANK_3, FANCTL1_OUT_REG + channel,
val);
return ret;
case hwmon_pwm_enable:
if (val < 1 || val > 2 ||
(val == 2 && !data->fan_mode[channel]))
return -EINVAL;
ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + channel,
val == 2 ? data->fan_mode[channel] : 0);
return ret;
default:
return -EOPNOTSUPP;
}
}
static umode_t nct7904_pwm_is_visible(const void *_data, u32 attr, int channel)
{
switch (attr) {
case hwmon_pwm_input:
case hwmon_pwm_enable:
return 0644;
default:
return 0;
}
}
static int nct7904_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_in:
return nct7904_read_in(dev, attr, channel, val);
case hwmon_fan:
return nct7904_read_fan(dev, attr, channel, val);
case hwmon_pwm:
return nct7904_read_pwm(dev, attr, channel, val);
case hwmon_temp:
return nct7904_read_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int nct7904_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_in:
return nct7904_write_in(dev, attr, channel, val);
case hwmon_fan:
return nct7904_write_fan(dev, attr, channel, val);
case hwmon_pwm:
return nct7904_write_pwm(dev, attr, channel, val);
case hwmon_temp:
return nct7904_write_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t nct7904_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_in:
return nct7904_in_is_visible(data, attr, channel);
case hwmon_fan:
return nct7904_fan_is_visible(data, attr, channel);
case hwmon_pwm:
return nct7904_pwm_is_visible(data, attr, channel);
case hwmon_temp:
return nct7904_temp_is_visible(data, attr, channel);
default:
return 0;
}
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int nct7904_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter,
I2C_FUNC_SMBUS_READ_BYTE |
I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
return -ENODEV;
/* Determine the chip type. */
if (i2c_smbus_read_byte_data(client, VENDOR_ID_REG) != NUVOTON_ID ||
i2c_smbus_read_byte_data(client, CHIP_ID_REG) != NCT7904_ID ||
(i2c_smbus_read_byte_data(client, DEVICE_ID_REG) & 0xf0) != 0x50 ||
(i2c_smbus_read_byte_data(client, BANK_SEL_REG) & 0xf8) != 0x00)
return -ENODEV;
strscpy(info->type, "nct7904", I2C_NAME_SIZE);
return 0;
}
static const struct hwmon_channel_info * const nct7904_info[] = {
HWMON_CHANNEL_INFO(in,
/* dummy, skipped in is_visible */
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
HWMON_I_ALARM),
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
HWMON_T_CRIT_HYST),
NULL
};
static const struct hwmon_ops nct7904_hwmon_ops = {
.is_visible = nct7904_is_visible,
.read = nct7904_read,
.write = nct7904_write,
};
static const struct hwmon_chip_info nct7904_chip_info = {
.ops = &nct7904_hwmon_ops,
.info = nct7904_info,
};
/*
* Watchdog Function
*/
static int nct7904_wdt_start(struct watchdog_device *wdt)
{
struct nct7904_data *data = watchdog_get_drvdata(wdt);
/* Enable soft watchdog timer */
return nct7904_write_reg(data, BANK_0, WDT_LOCK_REG, WDT_SOFT_EN);
}
static int nct7904_wdt_stop(struct watchdog_device *wdt)
{
struct nct7904_data *data = watchdog_get_drvdata(wdt);
return nct7904_write_reg(data, BANK_0, WDT_LOCK_REG, WDT_SOFT_DIS);
}
static int nct7904_wdt_set_timeout(struct watchdog_device *wdt,
unsigned int timeout)
{
struct nct7904_data *data = watchdog_get_drvdata(wdt);
/*
* The NCT7904 is very special in watchdog function.
* Its minimum unit is minutes. And wdt->timeout needs
* to match the actual timeout selected. So, this needs
* to be: wdt->timeout = timeout / 60 * 60.
* For example, if the user configures a timeout of
* 119 seconds, the actual timeout will be 60 seconds.
* So, wdt->timeout must then be set to 60 seconds.
*/
wdt->timeout = timeout / 60 * 60;
return nct7904_write_reg(data, BANK_0, WDT_TIMER_REG,
wdt->timeout / 60);
}
static int nct7904_wdt_ping(struct watchdog_device *wdt)
{
/*
* Note:
* NCT7904 does not support refreshing WDT_TIMER_REG register when
* the watchdog is active. Please disable watchdog before feeding
* the watchdog and enable it again.
*/
struct nct7904_data *data = watchdog_get_drvdata(wdt);
int ret;
/* Disable soft watchdog timer */
ret = nct7904_write_reg(data, BANK_0, WDT_LOCK_REG, WDT_SOFT_DIS);
if (ret < 0)
return ret;
/* feed watchdog */
ret = nct7904_write_reg(data, BANK_0, WDT_TIMER_REG, wdt->timeout / 60);
if (ret < 0)
return ret;
/* Enable soft watchdog timer */
return nct7904_write_reg(data, BANK_0, WDT_LOCK_REG, WDT_SOFT_EN);
}
static unsigned int nct7904_wdt_get_timeleft(struct watchdog_device *wdt)
{
struct nct7904_data *data = watchdog_get_drvdata(wdt);
int ret;
ret = nct7904_read_reg(data, BANK_0, WDT_TIMER_REG);
if (ret < 0)
return 0;
return ret * 60;
}
static const struct watchdog_info nct7904_wdt_info = {
.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
WDIOF_MAGICCLOSE,
.identity = "nct7904 watchdog",
};
static const struct watchdog_ops nct7904_wdt_ops = {
.owner = THIS_MODULE,
.start = nct7904_wdt_start,
.stop = nct7904_wdt_stop,
.ping = nct7904_wdt_ping,
.set_timeout = nct7904_wdt_set_timeout,
.get_timeleft = nct7904_wdt_get_timeleft,
};
static int nct7904_probe(struct i2c_client *client)
{
struct nct7904_data *data;
struct device *hwmon_dev;
struct device *dev = &client->dev;
int ret, i;
u32 mask;
u8 val, bit;
data = devm_kzalloc(dev, sizeof(struct nct7904_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->bank_lock);
data->bank_sel = -1;
/* Setup sensor groups. */
/* FANIN attributes */
ret = nct7904_read_reg16(data, BANK_0, FANIN_CTRL0_REG);
if (ret < 0)
return ret;
data->fanin_mask = (ret >> 8) | ((ret & 0xff) << 8);
/*
* VSEN attributes
*
* Note: voltage sensors overlap with external temperature
* sensors. So, if we ever decide to support the latter
* we will have to adjust 'vsen_mask' accordingly.
*/
mask = 0;
ret = nct7904_read_reg16(data, BANK_0, VT_ADC_CTRL0_REG);
if (ret >= 0)
mask = (ret >> 8) | ((ret & 0xff) << 8);
ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
if (ret >= 0)
mask |= (ret << 16);
data->vsen_mask = mask;
/* CPU_TEMP attributes */
ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL0_REG);
if (ret < 0)
return ret;
if ((ret & 0x6) == 0x6)
data->tcpu_mask |= 1; /* TR1 */
if ((ret & 0x18) == 0x18)
data->tcpu_mask |= 2; /* TR2 */
if ((ret & 0x20) == 0x20)
data->tcpu_mask |= 4; /* TR3 */
if ((ret & 0x80) == 0x80)
data->tcpu_mask |= 8; /* TR4 */
/* LTD */
ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
if (ret < 0)
return ret;
if ((ret & 0x02) == 0x02)
data->tcpu_mask |= 0x10;
/* Multi-Function detecting for Volt and TR/TD */
ret = nct7904_read_reg(data, BANK_0, VT_ADC_MD_REG);
if (ret < 0)
return ret;
data->temp_mode = 0;
for (i = 0; i < 4; i++) {
val = (ret >> (i * 2)) & 0x03;
bit = (1 << i);
if (val == VOLT_MONITOR_MODE) {
data->tcpu_mask &= ~bit;
} else if (val == THERMAL_DIODE_MODE && i < 2) {
data->temp_mode |= bit;
data->vsen_mask &= ~(0x06 << (i * 2));
} else if (val == THERMISTOR_MODE) {
data->vsen_mask &= ~(0x02 << (i * 2));
} else {
/* Reserved */
data->tcpu_mask &= ~bit;
data->vsen_mask &= ~(0x06 << (i * 2));
}
}
/* PECI */
ret = nct7904_read_reg(data, BANK_2, PFE_REG);
if (ret < 0)
return ret;
if (ret & 0x80) {
data->enable_dts = 1; /* Enable DTS & PECI */
} else {
ret = nct7904_read_reg(data, BANK_2, TSI_CTRL_REG);
if (ret < 0)
return ret;
if (ret & 0x80)
data->enable_dts = 0x3; /* Enable DTS & TSI */
}
/* Check DTS enable status */
if (data->enable_dts) {
ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL0_REG);
if (ret < 0)
return ret;
data->has_dts = ret & 0xF;
if (data->enable_dts & ENABLE_TSI) {
ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL1_REG);
if (ret < 0)
return ret;
data->has_dts |= (ret & 0xF) << 4;
}
}
for (i = 0; i < FANCTL_MAX; i++) {
ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + i);
if (ret < 0)
return ret;
data->fan_mode[i] = ret;
}
/* Read all of SMI status register to clear alarms */
for (i = 0; i < SMI_STS_MAX; i++) {
ret = nct7904_read_reg(data, BANK_0, SMI_STS1_REG + i);
if (ret < 0)
return ret;
}
hwmon_dev =
devm_hwmon_device_register_with_info(dev, client->name, data,
&nct7904_chip_info, NULL);
ret = PTR_ERR_OR_ZERO(hwmon_dev);
if (ret)
return ret;
/* Watchdog initialization */
data->wdt.ops = &nct7904_wdt_ops;
data->wdt.info = &nct7904_wdt_info;
data->wdt.timeout = WATCHDOG_TIMEOUT * 60; /* Set default timeout */
data->wdt.min_timeout = MIN_TIMEOUT;
data->wdt.max_timeout = MAX_TIMEOUT;
data->wdt.parent = &client->dev;
watchdog_init_timeout(&data->wdt, timeout * 60, &client->dev);
watchdog_set_nowayout(&data->wdt, nowayout);
watchdog_set_drvdata(&data->wdt, data);
watchdog_stop_on_unregister(&data->wdt);
return devm_watchdog_register_device(dev, &data->wdt);
}
static const struct i2c_device_id nct7904_id[] = {
{"nct7904", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, nct7904_id);
static struct i2c_driver nct7904_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "nct7904",
},
.probe = nct7904_probe,
.id_table = nct7904_id,
.detect = nct7904_detect,
.address_list = normal_i2c,
};
module_i2c_driver(nct7904_driver);
MODULE_AUTHOR("Vadim V. Vlasov <[email protected]>");
MODULE_DESCRIPTION("Hwmon driver for NUVOTON NCT7904");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/nct7904.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* AD7314 digital temperature sensor driver for AD7314, ADT7301 and ADT7302
*
* Copyright 2010 Analog Devices Inc.
*
* Conversion to hwmon from IIO done by Jonathan Cameron <[email protected]>
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/bitops.h>
/*
* AD7314 temperature masks
*/
#define AD7314_TEMP_MASK 0x7FE0
#define AD7314_TEMP_SHIFT 5
/*
* ADT7301 and ADT7302 temperature masks
*/
#define ADT7301_TEMP_MASK 0x3FFF
enum ad7314_variant {
adt7301,
adt7302,
ad7314,
};
struct ad7314_data {
struct spi_device *spi_dev;
u16 rx ____cacheline_aligned;
};
static int ad7314_spi_read(struct ad7314_data *chip)
{
int ret;
ret = spi_read(chip->spi_dev, (u8 *)&chip->rx, sizeof(chip->rx));
if (ret < 0) {
dev_err(&chip->spi_dev->dev, "SPI read error\n");
return ret;
}
return be16_to_cpu(chip->rx);
}
static ssize_t ad7314_temperature_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct ad7314_data *chip = dev_get_drvdata(dev);
s16 data;
int ret;
ret = ad7314_spi_read(chip);
if (ret < 0)
return ret;
switch (spi_get_device_id(chip->spi_dev)->driver_data) {
case ad7314:
data = (ret & AD7314_TEMP_MASK) >> AD7314_TEMP_SHIFT;
data = sign_extend32(data, 9);
return sprintf(buf, "%d\n", 250 * data);
case adt7301:
case adt7302:
/*
* Documented as a 13 bit twos complement register
* with a sign bit - which is a 14 bit 2's complement
* register. 1lsb - 31.25 milli degrees centigrade
*/
data = ret & ADT7301_TEMP_MASK;
data = sign_extend32(data, 13);
return sprintf(buf, "%d\n",
DIV_ROUND_CLOSEST(data * 3125, 100));
default:
return -EINVAL;
}
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, ad7314_temperature, 0);
static struct attribute *ad7314_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(ad7314);
static int ad7314_probe(struct spi_device *spi_dev)
{
struct ad7314_data *chip;
struct device *hwmon_dev;
chip = devm_kzalloc(&spi_dev->dev, sizeof(*chip), GFP_KERNEL);
if (chip == NULL)
return -ENOMEM;
chip->spi_dev = spi_dev;
hwmon_dev = devm_hwmon_device_register_with_groups(&spi_dev->dev,
spi_dev->modalias,
chip, ad7314_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct spi_device_id ad7314_id[] = {
{ "adt7301", adt7301 },
{ "adt7302", adt7302 },
{ "ad7314", ad7314 },
{ }
};
MODULE_DEVICE_TABLE(spi, ad7314_id);
static struct spi_driver ad7314_driver = {
.driver = {
.name = "ad7314",
},
.probe = ad7314_probe,
.id_table = ad7314_id,
};
module_spi_driver(ad7314_driver);
MODULE_AUTHOR("Sonic Zhang <[email protected]>");
MODULE_DESCRIPTION("Analog Devices AD7314, ADT7301 and ADT7302 digital temperature sensor driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/ad7314.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* aht10.c - Linux hwmon driver for AHT10/AHT20 Temperature and Humidity sensors
* Copyright (C) 2020 Johannes Cornelis Draaijer
*/
#include <linux/delay.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/ktime.h>
#include <linux/module.h>
#include <linux/crc8.h>
#define AHT10_MEAS_SIZE 6
#define AHT20_MEAS_SIZE 7
#define AHT20_CRC8_POLY 0x31
/*
* Poll intervals (in milliseconds)
*/
#define AHT10_DEFAULT_MIN_POLL_INTERVAL 2000
#define AHT10_MIN_POLL_INTERVAL 2000
/*
* I2C command delays (in microseconds)
*/
#define AHT10_MEAS_DELAY 80000
#define AHT10_CMD_DELAY 350000
#define AHT10_DELAY_EXTRA 100000
/*
* Command bytes
*/
#define AHT10_CMD_INIT 0b11100001
#define AHT10_CMD_MEAS 0b10101100
#define AHT10_CMD_RST 0b10111010
/*
* Flags in the answer byte/command
*/
#define AHT10_CAL_ENABLED BIT(3)
#define AHT10_BUSY BIT(7)
#define AHT10_MODE_NOR (BIT(5) | BIT(6))
#define AHT10_MODE_CYC BIT(5)
#define AHT10_MODE_CMD BIT(6)
#define AHT10_MAX_POLL_INTERVAL_LEN 30
enum aht10_variant { aht10, aht20 };
static const struct i2c_device_id aht10_id[] = {
{ "aht10", aht10 },
{ "aht20", aht20 },
{ },
};
MODULE_DEVICE_TABLE(i2c, aht10_id);
/**
* struct aht10_data - All the data required to operate an AHT10/AHT20 chip
* @client: the i2c client associated with the AHT10/AHT20
* @lock: a mutex that is used to prevent parallel access to the
* i2c client
* @min_poll_interval: the minimum poll interval
* While the poll rate limit is not 100% necessary,
* the datasheet recommends that a measurement
* is not performed too often to prevent
* the chip from warming up due to the heat it generates.
* If it's unwanted, it can be ignored setting it to
* it to 0. Default value is 2000 ms
* @previous_poll_time: the previous time that the AHT10/AHT20
* was polled
* @temperature: the latest temperature value received from
* the AHT10/AHT20
* @humidity: the latest humidity value received from the
* AHT10/AHT20
* @crc8: crc8 support flag
* @meas_size: measurements data size
*/
struct aht10_data {
struct i2c_client *client;
/*
* Prevent simultaneous access to the i2c
* client and previous_poll_time
*/
struct mutex lock;
ktime_t min_poll_interval;
ktime_t previous_poll_time;
int temperature;
int humidity;
bool crc8;
unsigned int meas_size;
};
/**
* aht10_init() - Initialize an AHT10/AHT20 chip
* @data: the data associated with this AHT10/AHT20 chip
* Return: 0 if successful, 1 if not
*/
static int aht10_init(struct aht10_data *data)
{
const u8 cmd_init[] = {AHT10_CMD_INIT, AHT10_CAL_ENABLED | AHT10_MODE_CYC,
0x00};
int res;
u8 status;
struct i2c_client *client = data->client;
res = i2c_master_send(client, cmd_init, 3);
if (res < 0)
return res;
usleep_range(AHT10_CMD_DELAY, AHT10_CMD_DELAY +
AHT10_DELAY_EXTRA);
res = i2c_master_recv(client, &status, 1);
if (res != 1)
return -ENODATA;
if (status & AHT10_BUSY)
return -EBUSY;
return 0;
}
/**
* aht10_polltime_expired() - check if the minimum poll interval has
* expired
* @data: the data containing the time to compare
* Return: 1 if the minimum poll interval has expired, 0 if not
*/
static int aht10_polltime_expired(struct aht10_data *data)
{
ktime_t current_time = ktime_get_boottime();
ktime_t difference = ktime_sub(current_time, data->previous_poll_time);
return ktime_after(difference, data->min_poll_interval);
}
DECLARE_CRC8_TABLE(crc8_table);
/**
* crc8_check() - check crc of the sensor's measurements
* @raw_data: data frame received from sensor(including crc as the last byte)
* @count: size of the data frame
* Return: 0 if successful, 1 if not
*/
static int crc8_check(u8 *raw_data, int count)
{
/*
* crc calculated on the whole frame(including crc byte) should yield
* zero in case of correctly received bytes
*/
return crc8(crc8_table, raw_data, count, CRC8_INIT_VALUE);
}
/**
* aht10_read_values() - read and parse the raw data from the AHT10/AHT20
* @data: the struct aht10_data to use for the lock
* Return: 0 if successful, 1 if not
*/
static int aht10_read_values(struct aht10_data *data)
{
const u8 cmd_meas[] = {AHT10_CMD_MEAS, 0x33, 0x00};
u32 temp, hum;
int res;
u8 raw_data[AHT20_MEAS_SIZE];
struct i2c_client *client = data->client;
mutex_lock(&data->lock);
if (!aht10_polltime_expired(data)) {
mutex_unlock(&data->lock);
return 0;
}
res = i2c_master_send(client, cmd_meas, sizeof(cmd_meas));
if (res < 0) {
mutex_unlock(&data->lock);
return res;
}
usleep_range(AHT10_MEAS_DELAY, AHT10_MEAS_DELAY + AHT10_DELAY_EXTRA);
res = i2c_master_recv(client, raw_data, data->meas_size);
if (res != data->meas_size) {
mutex_unlock(&data->lock);
if (res >= 0)
return -ENODATA;
return res;
}
if (data->crc8 && crc8_check(raw_data, data->meas_size)) {
mutex_unlock(&data->lock);
return -EIO;
}
hum = ((u32)raw_data[1] << 12u) |
((u32)raw_data[2] << 4u) |
((raw_data[3] & 0xF0u) >> 4u);
temp = ((u32)(raw_data[3] & 0x0Fu) << 16u) |
((u32)raw_data[4] << 8u) |
raw_data[5];
temp = ((temp * 625) >> 15u) * 10;
hum = ((hum * 625) >> 16u) * 10;
data->temperature = (int)temp - 50000;
data->humidity = hum;
data->previous_poll_time = ktime_get_boottime();
mutex_unlock(&data->lock);
return 0;
}
/**
* aht10_interval_write() - store the given minimum poll interval.
* Return: 0 on success, -EINVAL if a value lower than the
* AHT10_MIN_POLL_INTERVAL is given
*/
static ssize_t aht10_interval_write(struct aht10_data *data,
long val)
{
data->min_poll_interval = ms_to_ktime(clamp_val(val, 2000, LONG_MAX));
return 0;
}
/**
* aht10_interval_read() - read the minimum poll interval
* in milliseconds
*/
static ssize_t aht10_interval_read(struct aht10_data *data,
long *val)
{
*val = ktime_to_ms(data->min_poll_interval);
return 0;
}
/**
* aht10_temperature1_read() - read the temperature in millidegrees
*/
static int aht10_temperature1_read(struct aht10_data *data, long *val)
{
int res;
res = aht10_read_values(data);
if (res < 0)
return res;
*val = data->temperature;
return 0;
}
/**
* aht10_humidity1_read() - read the relative humidity in millipercent
*/
static int aht10_humidity1_read(struct aht10_data *data, long *val)
{
int res;
res = aht10_read_values(data);
if (res < 0)
return res;
*val = data->humidity;
return 0;
}
static umode_t aht10_hwmon_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_temp:
case hwmon_humidity:
return 0444;
case hwmon_chip:
return 0644;
default:
return 0;
}
}
static int aht10_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct aht10_data *data = dev_get_drvdata(dev);
switch (type) {
case hwmon_temp:
return aht10_temperature1_read(data, val);
case hwmon_humidity:
return aht10_humidity1_read(data, val);
case hwmon_chip:
return aht10_interval_read(data, val);
default:
return -EOPNOTSUPP;
}
}
static int aht10_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct aht10_data *data = dev_get_drvdata(dev);
switch (type) {
case hwmon_chip:
return aht10_interval_write(data, val);
default:
return -EOPNOTSUPP;
}
}
static const struct hwmon_channel_info * const aht10_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
HWMON_CHANNEL_INFO(humidity, HWMON_H_INPUT),
NULL,
};
static const struct hwmon_ops aht10_hwmon_ops = {
.is_visible = aht10_hwmon_visible,
.read = aht10_hwmon_read,
.write = aht10_hwmon_write,
};
static const struct hwmon_chip_info aht10_chip_info = {
.ops = &aht10_hwmon_ops,
.info = aht10_info,
};
static int aht10_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_match_id(aht10_id, client);
enum aht10_variant variant = id->driver_data;
struct device *device = &client->dev;
struct device *hwmon_dev;
struct aht10_data *data;
int res;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
return -ENOENT;
data = devm_kzalloc(device, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->min_poll_interval = ms_to_ktime(AHT10_DEFAULT_MIN_POLL_INTERVAL);
data->client = client;
switch (variant) {
case aht20:
data->meas_size = AHT20_MEAS_SIZE;
data->crc8 = true;
crc8_populate_msb(crc8_table, AHT20_CRC8_POLY);
break;
default:
data->meas_size = AHT10_MEAS_SIZE;
break;
}
mutex_init(&data->lock);
res = aht10_init(data);
if (res < 0)
return res;
res = aht10_read_values(data);
if (res < 0)
return res;
hwmon_dev = devm_hwmon_device_register_with_info(device,
client->name,
data,
&aht10_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct i2c_driver aht10_driver = {
.driver = {
.name = "aht10",
},
.probe = aht10_probe,
.id_table = aht10_id,
};
module_i2c_driver(aht10_driver);
MODULE_AUTHOR("Johannes Cornelis Draaijer <[email protected]>");
MODULE_DESCRIPTION("AHT10/AHT20 Temperature and Humidity sensor driver");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/aht10.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
*
* Authors:
* Maxim Kaurkin <[email protected]>
* Serge Semin <[email protected]>
*
* Baikal-T1 Process, Voltage, Temperature sensor driver
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/ktime.h>
#include <linux/limits.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/polynomial.h>
#include <linux/seqlock.h>
#include <linux/sysfs.h>
#include <linux/types.h>
#include "bt1-pvt.h"
/*
* For the sake of the code simplification we created the sensors info table
* with the sensor names, activation modes, threshold registers base address
* and the thresholds bit fields.
*/
static const struct pvt_sensor_info pvt_info[] = {
PVT_SENSOR_INFO(0, "CPU Core Temperature", hwmon_temp, TEMP, TTHRES),
PVT_SENSOR_INFO(0, "CPU Core Voltage", hwmon_in, VOLT, VTHRES),
PVT_SENSOR_INFO(1, "CPU Core Low-Vt", hwmon_in, LVT, LTHRES),
PVT_SENSOR_INFO(2, "CPU Core High-Vt", hwmon_in, HVT, HTHRES),
PVT_SENSOR_INFO(3, "CPU Core Standard-Vt", hwmon_in, SVT, STHRES),
};
/*
* The original translation formulae of the temperature (in degrees of Celsius)
* to PVT data and vice-versa are following:
* N = 1.8322e-8*(T^4) + 2.343e-5*(T^3) + 8.7018e-3*(T^2) + 3.9269*(T^1) +
* 1.7204e2,
* T = -1.6743e-11*(N^4) + 8.1542e-8*(N^3) + -1.8201e-4*(N^2) +
* 3.1020e-1*(N^1) - 4.838e1,
* where T = [-48.380, 147.438]C and N = [0, 1023].
* They must be accordingly altered to be suitable for the integer arithmetics.
* The technique is called 'factor redistribution', which just makes sure the
* multiplications and divisions are made so to have a result of the operations
* within the integer numbers limit. In addition we need to translate the
* formulae to accept millidegrees of Celsius. Here what they look like after
* the alterations:
* N = (18322e-20*(T^4) + 2343e-13*(T^3) + 87018e-9*(T^2) + 39269e-3*T +
* 17204e2) / 1e4,
* T = -16743e-12*(D^4) + 81542e-9*(D^3) - 182010e-6*(D^2) + 310200e-3*D -
* 48380,
* where T = [-48380, 147438] mC and N = [0, 1023].
*/
static const struct polynomial __maybe_unused poly_temp_to_N = {
.total_divider = 10000,
.terms = {
{4, 18322, 10000, 10000},
{3, 2343, 10000, 10},
{2, 87018, 10000, 10},
{1, 39269, 1000, 1},
{0, 1720400, 1, 1}
}
};
static const struct polynomial poly_N_to_temp = {
.total_divider = 1,
.terms = {
{4, -16743, 1000, 1},
{3, 81542, 1000, 1},
{2, -182010, 1000, 1},
{1, 310200, 1000, 1},
{0, -48380, 1, 1}
}
};
/*
* Similar alterations are performed for the voltage conversion equations.
* The original formulae are:
* N = 1.8658e3*V - 1.1572e3,
* V = (N + 1.1572e3) / 1.8658e3,
* where V = [0.620, 1.168] V and N = [0, 1023].
* After the optimization they looks as follows:
* N = (18658e-3*V - 11572) / 10,
* V = N * 10^5 / 18658 + 11572 * 10^4 / 18658.
*/
static const struct polynomial __maybe_unused poly_volt_to_N = {
.total_divider = 10,
.terms = {
{1, 18658, 1000, 1},
{0, -11572, 1, 1}
}
};
static const struct polynomial poly_N_to_volt = {
.total_divider = 10,
.terms = {
{1, 100000, 18658, 1},
{0, 115720000, 1, 18658}
}
};
static inline u32 pvt_update(void __iomem *reg, u32 mask, u32 data)
{
u32 old;
old = readl_relaxed(reg);
writel((old & ~mask) | (data & mask), reg);
return old & mask;
}
/*
* Baikal-T1 PVT mode can be updated only when the controller is disabled.
* So first we disable it, then set the new mode together with the controller
* getting back enabled. The same concerns the temperature trim and
* measurements timeout. If it is necessary the interface mutex is supposed
* to be locked at the time the operations are performed.
*/
static inline void pvt_set_mode(struct pvt_hwmon *pvt, u32 mode)
{
u32 old;
mode = FIELD_PREP(PVT_CTRL_MODE_MASK, mode);
old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_MODE_MASK | PVT_CTRL_EN,
mode | old);
}
static inline u32 pvt_calc_trim(long temp)
{
temp = clamp_val(temp, 0, PVT_TRIM_TEMP);
return DIV_ROUND_UP(temp, PVT_TRIM_STEP);
}
static inline void pvt_set_trim(struct pvt_hwmon *pvt, u32 trim)
{
u32 old;
trim = FIELD_PREP(PVT_CTRL_TRIM_MASK, trim);
old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_TRIM_MASK | PVT_CTRL_EN,
trim | old);
}
static inline void pvt_set_tout(struct pvt_hwmon *pvt, u32 tout)
{
u32 old;
old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
writel(tout, pvt->regs + PVT_TTIMEOUT);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, old);
}
/*
* This driver can optionally provide the hwmon alarms for each sensor the PVT
* controller supports. The alarms functionality is made compile-time
* configurable due to the hardware interface implementation peculiarity
* described further in this comment. So in case if alarms are unnecessary in
* your system design it's recommended to have them disabled to prevent the PVT
* IRQs being periodically raised to get the data cache/alarms status up to
* date.
*
* Baikal-T1 PVT embedded controller is based on the Analog Bits PVT sensor,
* but is equipped with a dedicated control wrapper. It exposes the PVT
* sub-block registers space via the APB3 bus. In addition the wrapper provides
* a common interrupt vector of the sensors conversion completion events and
* threshold value alarms. Alas the wrapper interface hasn't been fully thought
* through. There is only one sensor can be activated at a time, for which the
* thresholds comparator is enabled right after the data conversion is
* completed. Due to this if alarms need to be implemented for all available
* sensors we can't just set the thresholds and enable the interrupts. We need
* to enable the sensors one after another and let the controller to detect
* the alarms by itself at each conversion. This also makes pointless to handle
* the alarms interrupts, since in occasion they happen synchronously with
* data conversion completion. The best driver design would be to have the
* completion interrupts enabled only and keep the converted value in the
* driver data cache. This solution is implemented if hwmon alarms are enabled
* in this driver. In case if the alarms are disabled, the conversion is
* performed on demand at the time a sensors input file is read.
*/
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
#define pvt_hard_isr NULL
static irqreturn_t pvt_soft_isr(int irq, void *data)
{
const struct pvt_sensor_info *info;
struct pvt_hwmon *pvt = data;
struct pvt_cache *cache;
u32 val, thres_sts, old;
/*
* DVALID bit will be cleared by reading the data. We need to save the
* status before the next conversion happens. Threshold events will be
* handled a bit later.
*/
thres_sts = readl(pvt->regs + PVT_RAW_INTR_STAT);
/*
* Then lets recharge the PVT interface with the next sampling mode.
* Lock the interface mutex to serialize trim, timeouts and alarm
* thresholds settings.
*/
cache = &pvt->cache[pvt->sensor];
info = &pvt_info[pvt->sensor];
pvt->sensor = (pvt->sensor == PVT_SENSOR_LAST) ?
PVT_SENSOR_FIRST : (pvt->sensor + 1);
/*
* For some reason we have to mask the interrupt before changing the
* mode, otherwise sometimes the temperature mode doesn't get
* activated even though the actual mode in the ctrl register
* corresponds to one. Then we read the data. By doing so we also
* recharge the data conversion. After this the mode corresponding
* to the next sensor in the row is set. Finally we enable the
* interrupts back.
*/
mutex_lock(&pvt->iface_mtx);
old = pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
PVT_INTR_DVALID);
val = readl(pvt->regs + PVT_DATA);
pvt_set_mode(pvt, pvt_info[pvt->sensor].mode);
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID, old);
mutex_unlock(&pvt->iface_mtx);
/*
* We can now update the data cache with data just retrieved from the
* sensor. Lock write-seqlock to make sure the reader has a coherent
* data.
*/
write_seqlock(&cache->data_seqlock);
cache->data = FIELD_GET(PVT_DATA_DATA_MASK, val);
write_sequnlock(&cache->data_seqlock);
/*
* While PVT core is doing the next mode data conversion, we'll check
* whether the alarms were triggered for the current sensor. Note that
* according to the documentation only one threshold IRQ status can be
* set at a time, that's why if-else statement is utilized.
*/
if ((thres_sts & info->thres_sts_lo) ^ cache->thres_sts_lo) {
WRITE_ONCE(cache->thres_sts_lo, thres_sts & info->thres_sts_lo);
hwmon_notify_event(pvt->hwmon, info->type, info->attr_min_alarm,
info->channel);
} else if ((thres_sts & info->thres_sts_hi) ^ cache->thres_sts_hi) {
WRITE_ONCE(cache->thres_sts_hi, thres_sts & info->thres_sts_hi);
hwmon_notify_event(pvt->hwmon, info->type, info->attr_max_alarm,
info->channel);
}
return IRQ_HANDLED;
}
static inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type)
{
return 0644;
}
static inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type)
{
return 0444;
}
static int pvt_read_data(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
long *val)
{
struct pvt_cache *cache = &pvt->cache[type];
unsigned int seq;
u32 data;
do {
seq = read_seqbegin(&cache->data_seqlock);
data = cache->data;
} while (read_seqretry(&cache->data_seqlock, seq));
if (type == PVT_TEMP)
*val = polynomial_calc(&poly_N_to_temp, data);
else
*val = polynomial_calc(&poly_N_to_volt, data);
return 0;
}
static int pvt_read_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
bool is_low, long *val)
{
u32 data;
/* No need in serialization, since it is just read from MMIO. */
data = readl(pvt->regs + pvt_info[type].thres_base);
if (is_low)
data = FIELD_GET(PVT_THRES_LO_MASK, data);
else
data = FIELD_GET(PVT_THRES_HI_MASK, data);
if (type == PVT_TEMP)
*val = polynomial_calc(&poly_N_to_temp, data);
else
*val = polynomial_calc(&poly_N_to_volt, data);
return 0;
}
static int pvt_write_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
bool is_low, long val)
{
u32 data, limit, mask;
int ret;
if (type == PVT_TEMP) {
val = clamp(val, PVT_TEMP_MIN, PVT_TEMP_MAX);
data = polynomial_calc(&poly_temp_to_N, val);
} else {
val = clamp(val, PVT_VOLT_MIN, PVT_VOLT_MAX);
data = polynomial_calc(&poly_volt_to_N, val);
}
/* Serialize limit update, since a part of the register is changed. */
ret = mutex_lock_interruptible(&pvt->iface_mtx);
if (ret)
return ret;
/* Make sure the upper and lower ranges don't intersect. */
limit = readl(pvt->regs + pvt_info[type].thres_base);
if (is_low) {
limit = FIELD_GET(PVT_THRES_HI_MASK, limit);
data = clamp_val(data, PVT_DATA_MIN, limit);
data = FIELD_PREP(PVT_THRES_LO_MASK, data);
mask = PVT_THRES_LO_MASK;
} else {
limit = FIELD_GET(PVT_THRES_LO_MASK, limit);
data = clamp_val(data, limit, PVT_DATA_MAX);
data = FIELD_PREP(PVT_THRES_HI_MASK, data);
mask = PVT_THRES_HI_MASK;
}
pvt_update(pvt->regs + pvt_info[type].thres_base, mask, data);
mutex_unlock(&pvt->iface_mtx);
return 0;
}
static int pvt_read_alarm(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
bool is_low, long *val)
{
if (is_low)
*val = !!READ_ONCE(pvt->cache[type].thres_sts_lo);
else
*val = !!READ_ONCE(pvt->cache[type].thres_sts_hi);
return 0;
}
static const struct hwmon_channel_info * const pvt_channel_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_TYPE | HWMON_T_LABEL |
HWMON_T_MIN | HWMON_T_MIN_ALARM |
HWMON_T_MAX | HWMON_T_MAX_ALARM |
HWMON_T_OFFSET),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL |
HWMON_I_MIN | HWMON_I_MIN_ALARM |
HWMON_I_MAX | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LABEL |
HWMON_I_MIN | HWMON_I_MIN_ALARM |
HWMON_I_MAX | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LABEL |
HWMON_I_MIN | HWMON_I_MIN_ALARM |
HWMON_I_MAX | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LABEL |
HWMON_I_MIN | HWMON_I_MIN_ALARM |
HWMON_I_MAX | HWMON_I_MAX_ALARM),
NULL
};
#else /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
static irqreturn_t pvt_hard_isr(int irq, void *data)
{
struct pvt_hwmon *pvt = data;
struct pvt_cache *cache;
u32 val;
/*
* Mask the DVALID interrupt so after exiting from the handler a
* repeated conversion wouldn't happen.
*/
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
PVT_INTR_DVALID);
/*
* Nothing special for alarm-less driver. Just read the data, update
* the cache and notify a waiter of this event.
*/
val = readl(pvt->regs + PVT_DATA);
if (!(val & PVT_DATA_VALID)) {
dev_err(pvt->dev, "Got IRQ when data isn't valid\n");
return IRQ_HANDLED;
}
cache = &pvt->cache[pvt->sensor];
WRITE_ONCE(cache->data, FIELD_GET(PVT_DATA_DATA_MASK, val));
complete(&cache->conversion);
return IRQ_HANDLED;
}
#define pvt_soft_isr NULL
static inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type)
{
return 0;
}
static inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type)
{
return 0;
}
static int pvt_read_data(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
long *val)
{
struct pvt_cache *cache = &pvt->cache[type];
unsigned long timeout;
u32 data;
int ret;
/*
* Lock PVT conversion interface until data cache is updated. The
* data read procedure is following: set the requested PVT sensor
* mode, enable IRQ and conversion, wait until conversion is finished,
* then disable conversion and IRQ, and read the cached data.
*/
ret = mutex_lock_interruptible(&pvt->iface_mtx);
if (ret)
return ret;
pvt->sensor = type;
pvt_set_mode(pvt, pvt_info[type].mode);
/*
* Unmask the DVALID interrupt and enable the sensors conversions.
* Do the reverse procedure when conversion is done.
*/
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID, 0);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, PVT_CTRL_EN);
/*
* Wait with timeout since in case if the sensor is suddenly powered
* down the request won't be completed and the caller will hang up on
* this procedure until the power is back up again. Multiply the
* timeout by the factor of two to prevent a false timeout.
*/
timeout = 2 * usecs_to_jiffies(ktime_to_us(pvt->timeout));
ret = wait_for_completion_timeout(&cache->conversion, timeout);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
PVT_INTR_DVALID);
data = READ_ONCE(cache->data);
mutex_unlock(&pvt->iface_mtx);
if (!ret)
return -ETIMEDOUT;
if (type == PVT_TEMP)
*val = polynomial_calc(&poly_N_to_temp, data);
else
*val = polynomial_calc(&poly_N_to_volt, data);
return 0;
}
static int pvt_read_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
bool is_low, long *val)
{
return -EOPNOTSUPP;
}
static int pvt_write_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
bool is_low, long val)
{
return -EOPNOTSUPP;
}
static int pvt_read_alarm(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
bool is_low, long *val)
{
return -EOPNOTSUPP;
}
static const struct hwmon_channel_info * const pvt_channel_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_TYPE | HWMON_T_LABEL |
HWMON_T_OFFSET),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
NULL
};
#endif /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
static inline bool pvt_hwmon_channel_is_valid(enum hwmon_sensor_types type,
int ch)
{
switch (type) {
case hwmon_temp:
if (ch < 0 || ch >= PVT_TEMP_CHS)
return false;
break;
case hwmon_in:
if (ch < 0 || ch >= PVT_VOLT_CHS)
return false;
break;
default:
break;
}
/* The rest of the types are independent from the channel number. */
return true;
}
static umode_t pvt_hwmon_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int ch)
{
if (!pvt_hwmon_channel_is_valid(type, ch))
return 0;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return 0644;
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_type:
case hwmon_temp_label:
return 0444;
case hwmon_temp_min:
case hwmon_temp_max:
return pvt_limit_is_visible(ch);
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
return pvt_alarm_is_visible(ch);
case hwmon_temp_offset:
return 0644;
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_input:
case hwmon_in_label:
return 0444;
case hwmon_in_min:
case hwmon_in_max:
return pvt_limit_is_visible(PVT_VOLT + ch);
case hwmon_in_min_alarm:
case hwmon_in_max_alarm:
return pvt_alarm_is_visible(PVT_VOLT + ch);
}
break;
default:
break;
}
return 0;
}
static int pvt_read_trim(struct pvt_hwmon *pvt, long *val)
{
u32 data;
data = readl(pvt->regs + PVT_CTRL);
*val = FIELD_GET(PVT_CTRL_TRIM_MASK, data) * PVT_TRIM_STEP;
return 0;
}
static int pvt_write_trim(struct pvt_hwmon *pvt, long val)
{
u32 trim;
int ret;
/*
* Serialize trim update, since a part of the register is changed and
* the controller is supposed to be disabled during this operation.
*/
ret = mutex_lock_interruptible(&pvt->iface_mtx);
if (ret)
return ret;
trim = pvt_calc_trim(val);
pvt_set_trim(pvt, trim);
mutex_unlock(&pvt->iface_mtx);
return 0;
}
static int pvt_read_timeout(struct pvt_hwmon *pvt, long *val)
{
int ret;
ret = mutex_lock_interruptible(&pvt->iface_mtx);
if (ret)
return ret;
/* Return the result in msec as hwmon sysfs interface requires. */
*val = ktime_to_ms(pvt->timeout);
mutex_unlock(&pvt->iface_mtx);
return 0;
}
static int pvt_write_timeout(struct pvt_hwmon *pvt, long val)
{
unsigned long rate;
ktime_t kt, cache;
u32 data;
int ret;
rate = clk_get_rate(pvt->clks[PVT_CLOCK_REF].clk);
if (!rate)
return -ENODEV;
/*
* If alarms are enabled, the requested timeout must be divided
* between all available sensors to have the requested delay
* applicable to each individual sensor.
*/
cache = kt = ms_to_ktime(val);
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
kt = ktime_divns(kt, PVT_SENSORS_NUM);
#endif
/*
* Subtract a constant lag, which always persists due to the limited
* PVT sampling rate. Make sure the timeout is not negative.
*/
kt = ktime_sub_ns(kt, PVT_TOUT_MIN);
if (ktime_to_ns(kt) < 0)
kt = ktime_set(0, 0);
/*
* Finally recalculate the timeout in terms of the reference clock
* period.
*/
data = ktime_divns(kt * rate, NSEC_PER_SEC);
/*
* Update the measurements delay, but lock the interface first, since
* we have to disable PVT in order to have the new delay actually
* updated.
*/
ret = mutex_lock_interruptible(&pvt->iface_mtx);
if (ret)
return ret;
pvt_set_tout(pvt, data);
pvt->timeout = cache;
mutex_unlock(&pvt->iface_mtx);
return 0;
}
static int pvt_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int ch, long *val)
{
struct pvt_hwmon *pvt = dev_get_drvdata(dev);
if (!pvt_hwmon_channel_is_valid(type, ch))
return -EINVAL;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return pvt_read_timeout(pvt, val);
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
return pvt_read_data(pvt, ch, val);
case hwmon_temp_type:
*val = 1;
return 0;
case hwmon_temp_min:
return pvt_read_limit(pvt, ch, true, val);
case hwmon_temp_max:
return pvt_read_limit(pvt, ch, false, val);
case hwmon_temp_min_alarm:
return pvt_read_alarm(pvt, ch, true, val);
case hwmon_temp_max_alarm:
return pvt_read_alarm(pvt, ch, false, val);
case hwmon_temp_offset:
return pvt_read_trim(pvt, val);
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_input:
return pvt_read_data(pvt, PVT_VOLT + ch, val);
case hwmon_in_min:
return pvt_read_limit(pvt, PVT_VOLT + ch, true, val);
case hwmon_in_max:
return pvt_read_limit(pvt, PVT_VOLT + ch, false, val);
case hwmon_in_min_alarm:
return pvt_read_alarm(pvt, PVT_VOLT + ch, true, val);
case hwmon_in_max_alarm:
return pvt_read_alarm(pvt, PVT_VOLT + ch, false, val);
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static int pvt_hwmon_read_string(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int ch, const char **str)
{
if (!pvt_hwmon_channel_is_valid(type, ch))
return -EINVAL;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_label:
*str = pvt_info[ch].label;
return 0;
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_label:
*str = pvt_info[PVT_VOLT + ch].label;
return 0;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static int pvt_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int ch, long val)
{
struct pvt_hwmon *pvt = dev_get_drvdata(dev);
if (!pvt_hwmon_channel_is_valid(type, ch))
return -EINVAL;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return pvt_write_timeout(pvt, val);
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_min:
return pvt_write_limit(pvt, ch, true, val);
case hwmon_temp_max:
return pvt_write_limit(pvt, ch, false, val);
case hwmon_temp_offset:
return pvt_write_trim(pvt, val);
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_min:
return pvt_write_limit(pvt, PVT_VOLT + ch, true, val);
case hwmon_in_max:
return pvt_write_limit(pvt, PVT_VOLT + ch, false, val);
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static const struct hwmon_ops pvt_hwmon_ops = {
.is_visible = pvt_hwmon_is_visible,
.read = pvt_hwmon_read,
.read_string = pvt_hwmon_read_string,
.write = pvt_hwmon_write
};
static const struct hwmon_chip_info pvt_hwmon_info = {
.ops = &pvt_hwmon_ops,
.info = pvt_channel_info
};
static void pvt_clear_data(void *data)
{
struct pvt_hwmon *pvt = data;
#if !defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
int idx;
for (idx = 0; idx < PVT_SENSORS_NUM; ++idx)
complete_all(&pvt->cache[idx].conversion);
#endif
mutex_destroy(&pvt->iface_mtx);
}
static struct pvt_hwmon *pvt_create_data(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct pvt_hwmon *pvt;
int ret, idx;
pvt = devm_kzalloc(dev, sizeof(*pvt), GFP_KERNEL);
if (!pvt)
return ERR_PTR(-ENOMEM);
ret = devm_add_action(dev, pvt_clear_data, pvt);
if (ret) {
dev_err(dev, "Can't add PVT data clear action\n");
return ERR_PTR(ret);
}
pvt->dev = dev;
pvt->sensor = PVT_SENSOR_FIRST;
mutex_init(&pvt->iface_mtx);
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
for (idx = 0; idx < PVT_SENSORS_NUM; ++idx)
seqlock_init(&pvt->cache[idx].data_seqlock);
#else
for (idx = 0; idx < PVT_SENSORS_NUM; ++idx)
init_completion(&pvt->cache[idx].conversion);
#endif
return pvt;
}
static int pvt_request_regs(struct pvt_hwmon *pvt)
{
struct platform_device *pdev = to_platform_device(pvt->dev);
pvt->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(pvt->regs))
return PTR_ERR(pvt->regs);
return 0;
}
static void pvt_disable_clks(void *data)
{
struct pvt_hwmon *pvt = data;
clk_bulk_disable_unprepare(PVT_CLOCK_NUM, pvt->clks);
}
static int pvt_request_clks(struct pvt_hwmon *pvt)
{
int ret;
pvt->clks[PVT_CLOCK_APB].id = "pclk";
pvt->clks[PVT_CLOCK_REF].id = "ref";
ret = devm_clk_bulk_get(pvt->dev, PVT_CLOCK_NUM, pvt->clks);
if (ret) {
dev_err(pvt->dev, "Couldn't get PVT clocks descriptors\n");
return ret;
}
ret = clk_bulk_prepare_enable(PVT_CLOCK_NUM, pvt->clks);
if (ret) {
dev_err(pvt->dev, "Couldn't enable the PVT clocks\n");
return ret;
}
ret = devm_add_action_or_reset(pvt->dev, pvt_disable_clks, pvt);
if (ret) {
dev_err(pvt->dev, "Can't add PVT clocks disable action\n");
return ret;
}
return 0;
}
static int pvt_check_pwr(struct pvt_hwmon *pvt)
{
unsigned long tout;
int ret = 0;
u32 data;
/*
* Test out the sensor conversion functionality. If it is not done on
* time then the domain must have been unpowered and we won't be able
* to use the device later in this driver.
* Note If the power source is lost during the normal driver work the
* data read procedure will either return -ETIMEDOUT (for the
* alarm-less driver configuration) or just stop the repeated
* conversion. In the later case alas we won't be able to detect the
* problem.
*/
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_ALL, PVT_INTR_ALL);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, PVT_CTRL_EN);
pvt_set_tout(pvt, 0);
readl(pvt->regs + PVT_DATA);
tout = PVT_TOUT_MIN / NSEC_PER_USEC;
usleep_range(tout, 2 * tout);
data = readl(pvt->regs + PVT_DATA);
if (!(data & PVT_DATA_VALID)) {
ret = -ENODEV;
dev_err(pvt->dev, "Sensor is powered down\n");
}
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
return ret;
}
static int pvt_init_iface(struct pvt_hwmon *pvt)
{
unsigned long rate;
u32 trim, temp;
rate = clk_get_rate(pvt->clks[PVT_CLOCK_REF].clk);
if (!rate) {
dev_err(pvt->dev, "Invalid reference clock rate\n");
return -ENODEV;
}
/*
* Make sure all interrupts and controller are disabled so not to
* accidentally have ISR executed before the driver data is fully
* initialized. Clear the IRQ status as well.
*/
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_ALL, PVT_INTR_ALL);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
readl(pvt->regs + PVT_CLR_INTR);
readl(pvt->regs + PVT_DATA);
/* Setup default sensor mode, timeout and temperature trim. */
pvt_set_mode(pvt, pvt_info[pvt->sensor].mode);
pvt_set_tout(pvt, PVT_TOUT_DEF);
/*
* Preserve the current ref-clock based delay (Ttotal) between the
* sensors data samples in the driver data so not to recalculate it
* each time on the data requests and timeout reads. It consists of the
* delay introduced by the internal ref-clock timer (N / Fclk) and the
* constant timeout caused by each conversion latency (Tmin):
* Ttotal = N / Fclk + Tmin
* If alarms are enabled the sensors are polled one after another and
* in order to get the next measurement of a particular sensor the
* caller will have to wait for at most until all the others are
* polled. In that case the formulae will look a bit different:
* Ttotal = 5 * (N / Fclk + Tmin)
*/
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
pvt->timeout = ktime_set(PVT_SENSORS_NUM * PVT_TOUT_DEF, 0);
pvt->timeout = ktime_divns(pvt->timeout, rate);
pvt->timeout = ktime_add_ns(pvt->timeout, PVT_SENSORS_NUM * PVT_TOUT_MIN);
#else
pvt->timeout = ktime_set(PVT_TOUT_DEF, 0);
pvt->timeout = ktime_divns(pvt->timeout, rate);
pvt->timeout = ktime_add_ns(pvt->timeout, PVT_TOUT_MIN);
#endif
trim = PVT_TRIM_DEF;
if (!of_property_read_u32(pvt->dev->of_node,
"baikal,pvt-temp-offset-millicelsius", &temp))
trim = pvt_calc_trim(temp);
pvt_set_trim(pvt, trim);
return 0;
}
static int pvt_request_irq(struct pvt_hwmon *pvt)
{
struct platform_device *pdev = to_platform_device(pvt->dev);
int ret;
pvt->irq = platform_get_irq(pdev, 0);
if (pvt->irq < 0)
return pvt->irq;
ret = devm_request_threaded_irq(pvt->dev, pvt->irq,
pvt_hard_isr, pvt_soft_isr,
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
IRQF_SHARED | IRQF_TRIGGER_HIGH |
IRQF_ONESHOT,
#else
IRQF_SHARED | IRQF_TRIGGER_HIGH,
#endif
"pvt", pvt);
if (ret) {
dev_err(pvt->dev, "Couldn't request PVT IRQ\n");
return ret;
}
return 0;
}
static int pvt_create_hwmon(struct pvt_hwmon *pvt)
{
pvt->hwmon = devm_hwmon_device_register_with_info(pvt->dev, "pvt", pvt,
&pvt_hwmon_info, NULL);
if (IS_ERR(pvt->hwmon)) {
dev_err(pvt->dev, "Couldn't create hwmon device\n");
return PTR_ERR(pvt->hwmon);
}
return 0;
}
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
static void pvt_disable_iface(void *data)
{
struct pvt_hwmon *pvt = data;
mutex_lock(&pvt->iface_mtx);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
PVT_INTR_DVALID);
mutex_unlock(&pvt->iface_mtx);
}
static int pvt_enable_iface(struct pvt_hwmon *pvt)
{
int ret;
ret = devm_add_action(pvt->dev, pvt_disable_iface, pvt);
if (ret) {
dev_err(pvt->dev, "Can't add PVT disable interface action\n");
return ret;
}
/*
* Enable sensors data conversion and IRQ. We need to lock the
* interface mutex since hwmon has just been created and the
* corresponding sysfs files are accessible from user-space,
* which theoretically may cause races.
*/
mutex_lock(&pvt->iface_mtx);
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID, 0);
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, PVT_CTRL_EN);
mutex_unlock(&pvt->iface_mtx);
return 0;
}
#else /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
static int pvt_enable_iface(struct pvt_hwmon *pvt)
{
return 0;
}
#endif /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
static int pvt_probe(struct platform_device *pdev)
{
struct pvt_hwmon *pvt;
int ret;
pvt = pvt_create_data(pdev);
if (IS_ERR(pvt))
return PTR_ERR(pvt);
ret = pvt_request_regs(pvt);
if (ret)
return ret;
ret = pvt_request_clks(pvt);
if (ret)
return ret;
ret = pvt_check_pwr(pvt);
if (ret)
return ret;
ret = pvt_init_iface(pvt);
if (ret)
return ret;
ret = pvt_request_irq(pvt);
if (ret)
return ret;
ret = pvt_create_hwmon(pvt);
if (ret)
return ret;
ret = pvt_enable_iface(pvt);
if (ret)
return ret;
return 0;
}
static const struct of_device_id pvt_of_match[] = {
{ .compatible = "baikal,bt1-pvt" },
{ }
};
MODULE_DEVICE_TABLE(of, pvt_of_match);
static struct platform_driver pvt_driver = {
.probe = pvt_probe,
.driver = {
.name = "bt1-pvt",
.of_match_table = pvt_of_match
}
};
module_platform_driver(pvt_driver);
MODULE_AUTHOR("Maxim Kaurkin <[email protected]>");
MODULE_DESCRIPTION("Baikal-T1 PVT driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/bt1-pvt.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* Texas Instruments TMP102 SMBus temperature sensor driver
*
* Copyright (C) 2010 Steven King <[email protected]>
*/
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/jiffies.h>
#include <linux/regmap.h>
#include <linux/of.h>
#define DRIVER_NAME "tmp102"
#define TMP102_TEMP_REG 0x00
#define TMP102_CONF_REG 0x01
/* note: these bit definitions are byte swapped */
#define TMP102_CONF_SD 0x0100
#define TMP102_CONF_TM 0x0200
#define TMP102_CONF_POL 0x0400
#define TMP102_CONF_F0 0x0800
#define TMP102_CONF_F1 0x1000
#define TMP102_CONF_R0 0x2000
#define TMP102_CONF_R1 0x4000
#define TMP102_CONF_OS 0x8000
#define TMP102_CONF_EM 0x0010
#define TMP102_CONF_AL 0x0020
#define TMP102_CONF_CR0 0x0040
#define TMP102_CONF_CR1 0x0080
#define TMP102_TLOW_REG 0x02
#define TMP102_THIGH_REG 0x03
#define TMP102_CONFREG_MASK (TMP102_CONF_SD | TMP102_CONF_TM | \
TMP102_CONF_POL | TMP102_CONF_F0 | \
TMP102_CONF_F1 | TMP102_CONF_OS | \
TMP102_CONF_EM | TMP102_CONF_AL | \
TMP102_CONF_CR0 | TMP102_CONF_CR1)
#define TMP102_CONFIG_CLEAR (TMP102_CONF_SD | TMP102_CONF_OS | \
TMP102_CONF_CR0)
#define TMP102_CONFIG_SET (TMP102_CONF_TM | TMP102_CONF_EM | \
TMP102_CONF_CR1)
#define CONVERSION_TIME_MS 35 /* in milli-seconds */
struct tmp102 {
struct regmap *regmap;
u16 config_orig;
unsigned long ready_time;
};
/* convert left adjusted 13-bit TMP102 register value to milliCelsius */
static inline int tmp102_reg_to_mC(s16 val)
{
return ((val & ~0x01) * 1000) / 128;
}
/* convert milliCelsius to left adjusted 13-bit TMP102 register value */
static inline u16 tmp102_mC_to_reg(int val)
{
return (val * 128) / 1000;
}
static int tmp102_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *temp)
{
struct tmp102 *tmp102 = dev_get_drvdata(dev);
unsigned int regval;
int err, reg;
switch (attr) {
case hwmon_temp_input:
/* Is it too early to return a conversion ? */
if (time_before(jiffies, tmp102->ready_time)) {
dev_dbg(dev, "%s: Conversion not ready yet..\n", __func__);
return -EAGAIN;
}
reg = TMP102_TEMP_REG;
break;
case hwmon_temp_max_hyst:
reg = TMP102_TLOW_REG;
break;
case hwmon_temp_max:
reg = TMP102_THIGH_REG;
break;
default:
return -EOPNOTSUPP;
}
err = regmap_read(tmp102->regmap, reg, ®val);
if (err < 0)
return err;
*temp = tmp102_reg_to_mC(regval);
return 0;
}
static int tmp102_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long temp)
{
struct tmp102 *tmp102 = dev_get_drvdata(dev);
int reg;
switch (attr) {
case hwmon_temp_max_hyst:
reg = TMP102_TLOW_REG;
break;
case hwmon_temp_max:
reg = TMP102_THIGH_REG;
break;
default:
return -EOPNOTSUPP;
}
temp = clamp_val(temp, -256000, 255000);
return regmap_write(tmp102->regmap, reg, tmp102_mC_to_reg(temp));
}
static umode_t tmp102_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
if (type != hwmon_temp)
return 0;
switch (attr) {
case hwmon_temp_input:
return 0444;
case hwmon_temp_max_hyst:
case hwmon_temp_max:
return 0644;
default:
return 0;
}
}
static const struct hwmon_channel_info * const tmp102_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST),
NULL
};
static const struct hwmon_ops tmp102_hwmon_ops = {
.is_visible = tmp102_is_visible,
.read = tmp102_read,
.write = tmp102_write,
};
static const struct hwmon_chip_info tmp102_chip_info = {
.ops = &tmp102_hwmon_ops,
.info = tmp102_info,
};
static void tmp102_restore_config(void *data)
{
struct tmp102 *tmp102 = data;
regmap_write(tmp102->regmap, TMP102_CONF_REG, tmp102->config_orig);
}
static bool tmp102_is_writeable_reg(struct device *dev, unsigned int reg)
{
return reg != TMP102_TEMP_REG;
}
static bool tmp102_is_volatile_reg(struct device *dev, unsigned int reg)
{
return reg == TMP102_TEMP_REG;
}
static const struct regmap_config tmp102_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.max_register = TMP102_THIGH_REG,
.writeable_reg = tmp102_is_writeable_reg,
.volatile_reg = tmp102_is_volatile_reg,
.val_format_endian = REGMAP_ENDIAN_BIG,
.cache_type = REGCACHE_MAPLE,
.use_single_read = true,
.use_single_write = true,
};
static int tmp102_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct tmp102 *tmp102;
unsigned int regval;
int err;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WORD_DATA)) {
dev_err(dev,
"adapter doesn't support SMBus word transactions\n");
return -ENODEV;
}
tmp102 = devm_kzalloc(dev, sizeof(*tmp102), GFP_KERNEL);
if (!tmp102)
return -ENOMEM;
i2c_set_clientdata(client, tmp102);
tmp102->regmap = devm_regmap_init_i2c(client, &tmp102_regmap_config);
if (IS_ERR(tmp102->regmap))
return PTR_ERR(tmp102->regmap);
err = regmap_read(tmp102->regmap, TMP102_CONF_REG, ®val);
if (err < 0) {
dev_err(dev, "error reading config register\n");
return err;
}
if ((regval & ~TMP102_CONFREG_MASK) !=
(TMP102_CONF_R0 | TMP102_CONF_R1)) {
dev_err(dev, "unexpected config register value\n");
return -ENODEV;
}
tmp102->config_orig = regval;
err = devm_add_action_or_reset(dev, tmp102_restore_config, tmp102);
if (err)
return err;
regval &= ~TMP102_CONFIG_CLEAR;
regval |= TMP102_CONFIG_SET;
err = regmap_write(tmp102->regmap, TMP102_CONF_REG, regval);
if (err < 0) {
dev_err(dev, "error writing config register\n");
return err;
}
/*
* Mark that we are not ready with data until the first
* conversion is complete
*/
tmp102->ready_time = jiffies + msecs_to_jiffies(CONVERSION_TIME_MS);
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
tmp102,
&tmp102_chip_info,
NULL);
if (IS_ERR(hwmon_dev)) {
dev_dbg(dev, "unable to register hwmon device\n");
return PTR_ERR(hwmon_dev);
}
dev_info(dev, "initialized\n");
return 0;
}
static int tmp102_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct tmp102 *tmp102 = i2c_get_clientdata(client);
return regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
TMP102_CONF_SD, TMP102_CONF_SD);
}
static int tmp102_resume(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct tmp102 *tmp102 = i2c_get_clientdata(client);
int err;
err = regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
TMP102_CONF_SD, 0);
tmp102->ready_time = jiffies + msecs_to_jiffies(CONVERSION_TIME_MS);
return err;
}
static DEFINE_SIMPLE_DEV_PM_OPS(tmp102_dev_pm_ops, tmp102_suspend, tmp102_resume);
static const struct i2c_device_id tmp102_id[] = {
{ "tmp102", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, tmp102_id);
static const struct of_device_id __maybe_unused tmp102_of_match[] = {
{ .compatible = "ti,tmp102" },
{ },
};
MODULE_DEVICE_TABLE(of, tmp102_of_match);
static struct i2c_driver tmp102_driver = {
.driver.name = DRIVER_NAME,
.driver.of_match_table = of_match_ptr(tmp102_of_match),
.driver.pm = pm_sleep_ptr(&tmp102_dev_pm_ops),
.probe = tmp102_probe,
.id_table = tmp102_id,
};
module_i2c_driver(tmp102_driver);
MODULE_AUTHOR("Steven King <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments TMP102 temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/tmp102.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2011 Alexander Stein <[email protected]>
*
* The LM95245 is a sensor chip made by TI / National Semiconductor.
* It reports up to two temperatures (its own plus an external one).
*
* This driver is based on lm95241.c
*/
#include <linux/err.h>
#include <linux/init.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/slab.h>
static const unsigned short normal_i2c[] = {
0x18, 0x19, 0x29, 0x4c, 0x4d, I2C_CLIENT_END };
/* LM95245 registers */
/* general registers */
#define LM95245_REG_RW_CONFIG1 0x03
#define LM95245_REG_RW_CONVERS_RATE 0x04
#define LM95245_REG_W_ONE_SHOT 0x0F
/* diode configuration */
#define LM95245_REG_RW_CONFIG2 0xBF
#define LM95245_REG_RW_REMOTE_OFFH 0x11
#define LM95245_REG_RW_REMOTE_OFFL 0x12
/* status registers */
#define LM95245_REG_R_STATUS1 0x02
#define LM95245_REG_R_STATUS2 0x33
/* limit registers */
#define LM95245_REG_RW_REMOTE_OS_LIMIT 0x07
#define LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT 0x20
#define LM95245_REG_RW_REMOTE_TCRIT_LIMIT 0x19
#define LM95245_REG_RW_COMMON_HYSTERESIS 0x21
/* temperature signed */
#define LM95245_REG_R_LOCAL_TEMPH_S 0x00
#define LM95245_REG_R_LOCAL_TEMPL_S 0x30
#define LM95245_REG_R_REMOTE_TEMPH_S 0x01
#define LM95245_REG_R_REMOTE_TEMPL_S 0x10
/* temperature unsigned */
#define LM95245_REG_R_REMOTE_TEMPH_U 0x31
#define LM95245_REG_R_REMOTE_TEMPL_U 0x32
/* id registers */
#define LM95245_REG_R_MAN_ID 0xFE
#define LM95245_REG_R_CHIP_ID 0xFF
/* LM95245 specific bitfields */
#define CFG_STOP 0x40
#define CFG_REMOTE_TCRIT_MASK 0x10
#define CFG_REMOTE_OS_MASK 0x08
#define CFG_LOCAL_TCRIT_MASK 0x04
#define CFG_LOCAL_OS_MASK 0x02
#define CFG2_OS_A0 0x40
#define CFG2_DIODE_FAULT_OS 0x20
#define CFG2_DIODE_FAULT_TCRIT 0x10
#define CFG2_REMOTE_TT 0x08
#define CFG2_REMOTE_FILTER_DIS 0x00
#define CFG2_REMOTE_FILTER_EN 0x06
/* conversation rate in ms */
#define RATE_CR0063 0x00
#define RATE_CR0364 0x01
#define RATE_CR1000 0x02
#define RATE_CR2500 0x03
#define STATUS1_ROS 0x10
#define STATUS1_DIODE_FAULT 0x04
#define STATUS1_RTCRIT 0x02
#define STATUS1_LOC 0x01
#define MANUFACTURER_ID 0x01
#define LM95235_REVISION 0xB1
#define LM95245_REVISION 0xB3
/* Client data (each client gets its own) */
struct lm95245_data {
struct regmap *regmap;
struct mutex update_lock;
int interval; /* in msecs */
};
/* Conversions */
static int temp_from_reg_unsigned(u8 val_h, u8 val_l)
{
return val_h * 1000 + val_l * 1000 / 256;
}
static int temp_from_reg_signed(u8 val_h, u8 val_l)
{
if (val_h & 0x80)
return (val_h - 0x100) * 1000;
return temp_from_reg_unsigned(val_h, val_l);
}
static int lm95245_read_conversion_rate(struct lm95245_data *data)
{
unsigned int rate;
int ret;
ret = regmap_read(data->regmap, LM95245_REG_RW_CONVERS_RATE, &rate);
if (ret < 0)
return ret;
switch (rate) {
case RATE_CR0063:
data->interval = 63;
break;
case RATE_CR0364:
data->interval = 364;
break;
case RATE_CR1000:
data->interval = 1000;
break;
case RATE_CR2500:
default:
data->interval = 2500;
break;
}
return 0;
}
static int lm95245_set_conversion_rate(struct lm95245_data *data, long interval)
{
int ret, rate;
if (interval <= 63) {
interval = 63;
rate = RATE_CR0063;
} else if (interval <= 364) {
interval = 364;
rate = RATE_CR0364;
} else if (interval <= 1000) {
interval = 1000;
rate = RATE_CR1000;
} else {
interval = 2500;
rate = RATE_CR2500;
}
ret = regmap_write(data->regmap, LM95245_REG_RW_CONVERS_RATE, rate);
if (ret < 0)
return ret;
data->interval = interval;
return 0;
}
static int lm95245_read_temp(struct device *dev, u32 attr, int channel,
long *val)
{
struct lm95245_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
int ret, regl, regh, regvall, regvalh;
switch (attr) {
case hwmon_temp_input:
regl = channel ? LM95245_REG_R_REMOTE_TEMPL_S :
LM95245_REG_R_LOCAL_TEMPL_S;
regh = channel ? LM95245_REG_R_REMOTE_TEMPH_S :
LM95245_REG_R_LOCAL_TEMPH_S;
ret = regmap_read(regmap, regl, ®vall);
if (ret < 0)
return ret;
ret = regmap_read(regmap, regh, ®valh);
if (ret < 0)
return ret;
/*
* Local temp is always signed.
* Remote temp has both signed and unsigned data.
* Use signed calculation for remote if signed bit is set
* or if reported temperature is below signed limit.
*/
if (!channel || (regvalh & 0x80) || regvalh < 0x7f) {
*val = temp_from_reg_signed(regvalh, regvall);
return 0;
}
ret = regmap_read(regmap, LM95245_REG_R_REMOTE_TEMPL_U,
®vall);
if (ret < 0)
return ret;
ret = regmap_read(regmap, LM95245_REG_R_REMOTE_TEMPH_U,
®valh);
if (ret < 0)
return ret;
*val = temp_from_reg_unsigned(regvalh, regvall);
return 0;
case hwmon_temp_max:
ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OS_LIMIT,
®valh);
if (ret < 0)
return ret;
*val = regvalh * 1000;
return 0;
case hwmon_temp_crit:
regh = channel ? LM95245_REG_RW_REMOTE_TCRIT_LIMIT :
LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT;
ret = regmap_read(regmap, regh, ®valh);
if (ret < 0)
return ret;
*val = regvalh * 1000;
return 0;
case hwmon_temp_max_hyst:
ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OS_LIMIT,
®valh);
if (ret < 0)
return ret;
ret = regmap_read(regmap, LM95245_REG_RW_COMMON_HYSTERESIS,
®vall);
if (ret < 0)
return ret;
*val = (regvalh - regvall) * 1000;
return 0;
case hwmon_temp_crit_hyst:
regh = channel ? LM95245_REG_RW_REMOTE_TCRIT_LIMIT :
LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT;
ret = regmap_read(regmap, regh, ®valh);
if (ret < 0)
return ret;
ret = regmap_read(regmap, LM95245_REG_RW_COMMON_HYSTERESIS,
®vall);
if (ret < 0)
return ret;
*val = (regvalh - regvall) * 1000;
return 0;
case hwmon_temp_type:
ret = regmap_read(regmap, LM95245_REG_RW_CONFIG2, ®valh);
if (ret < 0)
return ret;
*val = (regvalh & CFG2_REMOTE_TT) ? 1 : 2;
return 0;
case hwmon_temp_offset:
ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OFFL,
®vall);
if (ret < 0)
return ret;
ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OFFH,
®valh);
if (ret < 0)
return ret;
*val = temp_from_reg_signed(regvalh, regvall);
return 0;
case hwmon_temp_max_alarm:
ret = regmap_read(regmap, LM95245_REG_R_STATUS1, ®valh);
if (ret < 0)
return ret;
*val = !!(regvalh & STATUS1_ROS);
return 0;
case hwmon_temp_crit_alarm:
ret = regmap_read(regmap, LM95245_REG_R_STATUS1, ®valh);
if (ret < 0)
return ret;
*val = !!(regvalh & (channel ? STATUS1_RTCRIT : STATUS1_LOC));
return 0;
case hwmon_temp_fault:
ret = regmap_read(regmap, LM95245_REG_R_STATUS1, ®valh);
if (ret < 0)
return ret;
*val = !!(regvalh & STATUS1_DIODE_FAULT);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int lm95245_write_temp(struct device *dev, u32 attr, int channel,
long val)
{
struct lm95245_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
unsigned int regval;
int ret, reg;
switch (attr) {
case hwmon_temp_max:
val = clamp_val(val / 1000, 0, 255);
ret = regmap_write(regmap, LM95245_REG_RW_REMOTE_OS_LIMIT, val);
return ret;
case hwmon_temp_crit:
reg = channel ? LM95245_REG_RW_REMOTE_TCRIT_LIMIT :
LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT;
val = clamp_val(val / 1000, 0, channel ? 255 : 127);
ret = regmap_write(regmap, reg, val);
return ret;
case hwmon_temp_crit_hyst:
mutex_lock(&data->update_lock);
ret = regmap_read(regmap, LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT,
®val);
if (ret < 0) {
mutex_unlock(&data->update_lock);
return ret;
}
/* Clamp to reasonable range to prevent overflow */
val = clamp_val(val, -1000000, 1000000);
val = regval - val / 1000;
val = clamp_val(val, 0, 31);
ret = regmap_write(regmap, LM95245_REG_RW_COMMON_HYSTERESIS,
val);
mutex_unlock(&data->update_lock);
return ret;
case hwmon_temp_offset:
val = clamp_val(val, -128000, 127875);
val = val * 256 / 1000;
mutex_lock(&data->update_lock);
ret = regmap_write(regmap, LM95245_REG_RW_REMOTE_OFFL,
val & 0xe0);
if (ret < 0) {
mutex_unlock(&data->update_lock);
return ret;
}
ret = regmap_write(regmap, LM95245_REG_RW_REMOTE_OFFH,
(val >> 8) & 0xff);
mutex_unlock(&data->update_lock);
return ret;
case hwmon_temp_type:
if (val != 1 && val != 2)
return -EINVAL;
ret = regmap_update_bits(regmap, LM95245_REG_RW_CONFIG2,
CFG2_REMOTE_TT,
val == 1 ? CFG2_REMOTE_TT : 0);
return ret;
default:
return -EOPNOTSUPP;
}
}
static int lm95245_read_chip(struct device *dev, u32 attr, int channel,
long *val)
{
struct lm95245_data *data = dev_get_drvdata(dev);
switch (attr) {
case hwmon_chip_update_interval:
*val = data->interval;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int lm95245_write_chip(struct device *dev, u32 attr, int channel,
long val)
{
struct lm95245_data *data = dev_get_drvdata(dev);
int ret;
switch (attr) {
case hwmon_chip_update_interval:
mutex_lock(&data->update_lock);
ret = lm95245_set_conversion_rate(data, val);
mutex_unlock(&data->update_lock);
return ret;
default:
return -EOPNOTSUPP;
}
}
static int lm95245_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_chip:
return lm95245_read_chip(dev, attr, channel, val);
case hwmon_temp:
return lm95245_read_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int lm95245_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_chip:
return lm95245_write_chip(dev, attr, channel, val);
case hwmon_temp:
return lm95245_write_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t lm95245_temp_is_visible(const void *data, u32 attr, int channel)
{
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_max_alarm:
case hwmon_temp_max_hyst:
case hwmon_temp_crit_alarm:
case hwmon_temp_fault:
return 0444;
case hwmon_temp_type:
case hwmon_temp_max:
case hwmon_temp_crit:
case hwmon_temp_offset:
return 0644;
case hwmon_temp_crit_hyst:
return (channel == 0) ? 0644 : 0444;
default:
return 0;
}
}
static umode_t lm95245_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return 0644;
default:
return 0;
}
case hwmon_temp:
return lm95245_temp_is_visible(data, attr, channel);
default:
return 0;
}
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm95245_detect(struct i2c_client *new_client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = new_client->adapter;
int address = new_client->addr;
const char *name;
int rev, id;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
id = i2c_smbus_read_byte_data(new_client, LM95245_REG_R_MAN_ID);
if (id != MANUFACTURER_ID)
return -ENODEV;
rev = i2c_smbus_read_byte_data(new_client, LM95245_REG_R_CHIP_ID);
switch (rev) {
case LM95235_REVISION:
if (address != 0x18 && address != 0x29 && address != 0x4c)
return -ENODEV;
name = "lm95235";
break;
case LM95245_REVISION:
name = "lm95245";
break;
default:
return -ENODEV;
}
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static int lm95245_init_client(struct lm95245_data *data)
{
int ret;
ret = lm95245_read_conversion_rate(data);
if (ret < 0)
return ret;
return regmap_update_bits(data->regmap, LM95245_REG_RW_CONFIG1,
CFG_STOP, 0);
}
static bool lm95245_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case LM95245_REG_RW_CONFIG1:
case LM95245_REG_RW_CONVERS_RATE:
case LM95245_REG_W_ONE_SHOT:
case LM95245_REG_RW_CONFIG2:
case LM95245_REG_RW_REMOTE_OFFH:
case LM95245_REG_RW_REMOTE_OFFL:
case LM95245_REG_RW_REMOTE_OS_LIMIT:
case LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT:
case LM95245_REG_RW_REMOTE_TCRIT_LIMIT:
case LM95245_REG_RW_COMMON_HYSTERESIS:
return true;
default:
return false;
}
}
static bool lm95245_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case LM95245_REG_R_STATUS1:
case LM95245_REG_R_STATUS2:
case LM95245_REG_R_LOCAL_TEMPH_S:
case LM95245_REG_R_LOCAL_TEMPL_S:
case LM95245_REG_R_REMOTE_TEMPH_S:
case LM95245_REG_R_REMOTE_TEMPL_S:
case LM95245_REG_R_REMOTE_TEMPH_U:
case LM95245_REG_R_REMOTE_TEMPL_U:
return true;
default:
return false;
}
}
static const struct regmap_config lm95245_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = lm95245_is_writeable_reg,
.volatile_reg = lm95245_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
.use_single_read = true,
.use_single_write = true,
};
static const struct hwmon_channel_info * const lm95245_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_HYST |
HWMON_T_CRIT_ALARM,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_FAULT |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
HWMON_T_TYPE | HWMON_T_OFFSET),
NULL
};
static const struct hwmon_ops lm95245_hwmon_ops = {
.is_visible = lm95245_is_visible,
.read = lm95245_read,
.write = lm95245_write,
};
static const struct hwmon_chip_info lm95245_chip_info = {
.ops = &lm95245_hwmon_ops,
.info = lm95245_info,
};
static int lm95245_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct lm95245_data *data;
struct device *hwmon_dev;
int ret;
data = devm_kzalloc(dev, sizeof(struct lm95245_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->regmap = devm_regmap_init_i2c(client, &lm95245_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
mutex_init(&data->update_lock);
/* Initialize the LM95245 chip */
ret = lm95245_init_client(data);
if (ret < 0)
return ret;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&lm95245_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/* Driver data (common to all clients) */
static const struct i2c_device_id lm95245_id[] = {
{ "lm95235", 0 },
{ "lm95245", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm95245_id);
static const struct of_device_id __maybe_unused lm95245_of_match[] = {
{ .compatible = "national,lm95235" },
{ .compatible = "national,lm95245" },
{ },
};
MODULE_DEVICE_TABLE(of, lm95245_of_match);
static struct i2c_driver lm95245_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm95245",
.of_match_table = of_match_ptr(lm95245_of_match),
},
.probe = lm95245_probe,
.id_table = lm95245_id,
.detect = lm95245_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm95245_driver);
MODULE_AUTHOR("Alexander Stein <[email protected]>");
MODULE_DESCRIPTION("LM95235/LM95245 sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm95245.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Linear Technology LTC4261 I2C Negative Voltage Hot Swap Controller
*
* Copyright (C) 2010 Ericsson AB.
*
* Derived from:
*
* Driver for Linear Technology LTC4245 I2C Multiple Supply Hot Swap Controller
* Copyright (C) 2008 Ira W. Snyder <[email protected]>
*
* Datasheet: http://cds.linear.com/docs/Datasheet/42612fb.pdf
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
/* chip registers */
#define LTC4261_STATUS 0x00 /* readonly */
#define LTC4261_FAULT 0x01
#define LTC4261_ALERT 0x02
#define LTC4261_CONTROL 0x03
#define LTC4261_SENSE_H 0x04
#define LTC4261_SENSE_L 0x05
#define LTC4261_ADIN2_H 0x06
#define LTC4261_ADIN2_L 0x07
#define LTC4261_ADIN_H 0x08
#define LTC4261_ADIN_L 0x09
/*
* Fault register bits
*/
#define FAULT_OV (1<<0)
#define FAULT_UV (1<<1)
#define FAULT_OC (1<<2)
struct ltc4261_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid;
unsigned long last_updated; /* in jiffies */
/* Registers */
u8 regs[10];
};
static struct ltc4261_data *ltc4261_update_device(struct device *dev)
{
struct ltc4261_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct ltc4261_data *ret = data;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ / 4) || !data->valid) {
int i;
/* Read registers -- 0x00 to 0x09 */
for (i = 0; i < ARRAY_SIZE(data->regs); i++) {
int val;
val = i2c_smbus_read_byte_data(client, i);
if (unlikely(val < 0)) {
dev_dbg(dev,
"Failed to read ADC value: error %d\n",
val);
ret = ERR_PTR(val);
data->valid = false;
goto abort;
}
data->regs[i] = val;
}
data->last_updated = jiffies;
data->valid = true;
}
abort:
mutex_unlock(&data->update_lock);
return ret;
}
/* Return the voltage from the given register in mV or mA */
static int ltc4261_get_value(struct ltc4261_data *data, u8 reg)
{
u32 val;
val = (data->regs[reg] << 2) + (data->regs[reg + 1] >> 6);
switch (reg) {
case LTC4261_ADIN_H:
case LTC4261_ADIN2_H:
/* 2.5mV resolution. Convert to mV. */
val = val * 25 / 10;
break;
case LTC4261_SENSE_H:
/*
* 62.5uV resolution. Convert to current as measured with
* an 1 mOhm sense resistor, in mA. If a different sense
* resistor is installed, calculate the actual current by
* dividing the reported current by the sense resistor value
* in mOhm.
*/
val = val * 625 / 10;
break;
default:
/* If we get here, the developer messed up */
WARN_ON_ONCE(1);
val = 0;
break;
}
return val;
}
static ssize_t ltc4261_value_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ltc4261_data *data = ltc4261_update_device(dev);
int value;
if (IS_ERR(data))
return PTR_ERR(data);
value = ltc4261_get_value(data, attr->index);
return sysfs_emit(buf, "%d\n", value);
}
static ssize_t ltc4261_bool_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ltc4261_data *data = ltc4261_update_device(dev);
u8 fault;
if (IS_ERR(data))
return PTR_ERR(data);
fault = data->regs[LTC4261_FAULT] & attr->index;
if (fault) /* Clear reported faults in chip register */
i2c_smbus_write_byte_data(data->client, LTC4261_FAULT, ~fault);
return sysfs_emit(buf, "%d\n", fault ? 1 : 0);
}
/*
* Input voltages.
*/
static SENSOR_DEVICE_ATTR_RO(in1_input, ltc4261_value, LTC4261_ADIN_H);
static SENSOR_DEVICE_ATTR_RO(in2_input, ltc4261_value, LTC4261_ADIN2_H);
/*
* Voltage alarms. The chip has only one set of voltage alarm status bits,
* triggered by input voltage alarms. In many designs, those alarms are
* associated with the ADIN2 sensor, due to the proximity of the ADIN2 pin
* to the OV pin. ADIN2 is, however, not available on all chip variants.
* To ensure that the alarm condition is reported to the user, report it
* with both voltage sensors.
*/
static SENSOR_DEVICE_ATTR_RO(in1_min_alarm, ltc4261_bool, FAULT_UV);
static SENSOR_DEVICE_ATTR_RO(in1_max_alarm, ltc4261_bool, FAULT_OV);
static SENSOR_DEVICE_ATTR_RO(in2_min_alarm, ltc4261_bool, FAULT_UV);
static SENSOR_DEVICE_ATTR_RO(in2_max_alarm, ltc4261_bool, FAULT_OV);
/* Currents (via sense resistor) */
static SENSOR_DEVICE_ATTR_RO(curr1_input, ltc4261_value, LTC4261_SENSE_H);
/* Overcurrent alarm */
static SENSOR_DEVICE_ATTR_RO(curr1_max_alarm, ltc4261_bool, FAULT_OC);
static struct attribute *ltc4261_attrs[] = {
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min_alarm.dev_attr.attr,
&sensor_dev_attr_in1_max_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min_alarm.dev_attr.attr,
&sensor_dev_attr_in2_max_alarm.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_curr1_max_alarm.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(ltc4261);
static int ltc4261_probe(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
struct device *dev = &client->dev;
struct ltc4261_data *data;
struct device *hwmon_dev;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
if (i2c_smbus_read_byte_data(client, LTC4261_STATUS) < 0) {
dev_err(dev, "Failed to read status register\n");
return -ENODEV;
}
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Clear faults */
i2c_smbus_write_byte_data(client, LTC4261_FAULT, 0x00);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
ltc4261_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ltc4261_id[] = {
{"ltc4261", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, ltc4261_id);
/* This is the driver that will be inserted */
static struct i2c_driver ltc4261_driver = {
.driver = {
.name = "ltc4261",
},
.probe = ltc4261_probe,
.id_table = ltc4261_id,
};
module_i2c_driver(ltc4261_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("LTC4261 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ltc4261.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm70.c
*
* The LM70 is a temperature sensor chip from National Semiconductor (NS).
* Copyright (C) 2006 Kaiwan N Billimoria <[email protected]>
*
* The LM70 communicates with a host processor via an SPI/Microwire Bus
* interface. The complete datasheet is available at National's website
* here:
* http://www.national.com/pf/LM/LM70.html
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/sysfs.h>
#include <linux/hwmon.h>
#include <linux/mutex.h>
#include <linux/mod_devicetable.h>
#include <linux/of.h>
#include <linux/property.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#define DRVNAME "lm70"
#define LM70_CHIP_LM70 0 /* original NS LM70 */
#define LM70_CHIP_TMP121 1 /* TI TMP121/TMP123 */
#define LM70_CHIP_LM71 2 /* NS LM71 */
#define LM70_CHIP_LM74 3 /* NS LM74 */
#define LM70_CHIP_TMP122 4 /* TI TMP122/TMP124 */
#define LM70_CHIP_TMP125 5 /* TI TMP125 */
struct lm70 {
struct spi_device *spi;
struct mutex lock;
unsigned int chip;
};
/* sysfs hook function */
static ssize_t temp1_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm70 *p_lm70 = dev_get_drvdata(dev);
struct spi_device *spi = p_lm70->spi;
int status, val = 0;
u8 rxbuf[2];
s16 raw = 0;
if (mutex_lock_interruptible(&p_lm70->lock))
return -ERESTARTSYS;
/*
* spi_read() requires a DMA-safe buffer; so we use
* spi_write_then_read(), transmitting 0 bytes.
*/
status = spi_write_then_read(spi, NULL, 0, &rxbuf[0], 2);
if (status < 0) {
dev_warn(dev, "spi_write_then_read failed with status %d\n",
status);
goto out;
}
raw = (rxbuf[0] << 8) + rxbuf[1];
dev_dbg(dev, "rxbuf[0] : 0x%02x rxbuf[1] : 0x%02x raw=0x%04x\n",
rxbuf[0], rxbuf[1], raw);
/*
* LM70:
* The "raw" temperature read into rxbuf[] is a 16-bit signed 2's
* complement value. Only the MSB 11 bits (1 sign + 10 temperature
* bits) are meaningful; the LSB 5 bits are to be discarded.
* See the datasheet.
*
* Further, each bit represents 0.25 degrees Celsius; so, multiply
* by 0.25. Also multiply by 1000 to represent in millidegrees
* Celsius.
* So it's equivalent to multiplying by 0.25 * 1000 = 250.
*
* LM74 and TMP121/TMP122/TMP123/TMP124:
* 13 bits of 2's complement data, discard LSB 3 bits,
* resolution 0.0625 degrees celsius.
*
* LM71:
* 14 bits of 2's complement data, discard LSB 2 bits,
* resolution 0.0312 degrees celsius.
*
* TMP125:
* MSB/D15 is a leading zero. D14 is the sign-bit. This is
* followed by 9 temperature bits (D13..D5) in 2's complement
* data format with a resolution of 0.25 degrees celsius per unit.
* LSB 5 bits (D4..D0) share the same value as D5 and get discarded.
*/
switch (p_lm70->chip) {
case LM70_CHIP_LM70:
val = ((int)raw / 32) * 250;
break;
case LM70_CHIP_TMP121:
case LM70_CHIP_TMP122:
case LM70_CHIP_LM74:
val = ((int)raw / 8) * 625 / 10;
break;
case LM70_CHIP_LM71:
val = ((int)raw / 4) * 3125 / 100;
break;
case LM70_CHIP_TMP125:
val = (sign_extend32(raw, 14) / 32) * 250;
break;
}
status = sprintf(buf, "%d\n", val); /* millidegrees Celsius */
out:
mutex_unlock(&p_lm70->lock);
return status;
}
static DEVICE_ATTR_RO(temp1_input);
static struct attribute *lm70_attrs[] = {
&dev_attr_temp1_input.attr,
NULL
};
ATTRIBUTE_GROUPS(lm70);
/*----------------------------------------------------------------------*/
#ifdef CONFIG_OF
static const struct of_device_id lm70_of_ids[] = {
{
.compatible = "ti,lm70",
.data = (void *) LM70_CHIP_LM70,
},
{
.compatible = "ti,tmp121",
.data = (void *) LM70_CHIP_TMP121,
},
{
.compatible = "ti,tmp122",
.data = (void *) LM70_CHIP_TMP122,
},
{
.compatible = "ti,tmp125",
.data = (void *) LM70_CHIP_TMP125,
},
{
.compatible = "ti,lm71",
.data = (void *) LM70_CHIP_LM71,
},
{
.compatible = "ti,lm74",
.data = (void *) LM70_CHIP_LM74,
},
{},
};
MODULE_DEVICE_TABLE(of, lm70_of_ids);
#endif
static int lm70_probe(struct spi_device *spi)
{
struct device *hwmon_dev;
struct lm70 *p_lm70;
int chip;
if (dev_fwnode(&spi->dev))
chip = (int)(uintptr_t)device_get_match_data(&spi->dev);
else
chip = spi_get_device_id(spi)->driver_data;
/* signaling is SPI_MODE_0 */
if ((spi->mode & SPI_MODE_X_MASK) != SPI_MODE_0)
return -EINVAL;
/* NOTE: we assume 8-bit words, and convert to 16 bits manually */
p_lm70 = devm_kzalloc(&spi->dev, sizeof(*p_lm70), GFP_KERNEL);
if (!p_lm70)
return -ENOMEM;
mutex_init(&p_lm70->lock);
p_lm70->chip = chip;
p_lm70->spi = spi;
hwmon_dev = devm_hwmon_device_register_with_groups(&spi->dev,
spi->modalias,
p_lm70, lm70_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct spi_device_id lm70_ids[] = {
{ "lm70", LM70_CHIP_LM70 },
{ "tmp121", LM70_CHIP_TMP121 },
{ "tmp122", LM70_CHIP_TMP122 },
{ "tmp125", LM70_CHIP_TMP125 },
{ "lm71", LM70_CHIP_LM71 },
{ "lm74", LM70_CHIP_LM74 },
{ },
};
MODULE_DEVICE_TABLE(spi, lm70_ids);
static struct spi_driver lm70_driver = {
.driver = {
.name = "lm70",
.of_match_table = of_match_ptr(lm70_of_ids),
},
.id_table = lm70_ids,
.probe = lm70_probe,
};
module_spi_driver(lm70_driver);
MODULE_AUTHOR("Kaiwan N Billimoria");
MODULE_DESCRIPTION("NS LM70 and compatibles Linux driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm70.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* HWMON Driver for Dialog DA9052
*
* Copyright(c) 2012 Dialog Semiconductor Ltd.
*
* Author: David Dajun Chen <[email protected]>
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/mfd/da9052/da9052.h>
#include <linux/mfd/da9052/reg.h>
#include <linux/regulator/consumer.h>
struct da9052_hwmon {
struct da9052 *da9052;
struct mutex hwmon_lock;
bool tsi_as_adc;
int tsiref_mv;
struct regulator *tsiref;
struct completion tsidone;
};
static const char * const input_names[] = {
[DA9052_ADC_VDDOUT] = "VDDOUT",
[DA9052_ADC_ICH] = "CHARGING CURRENT",
[DA9052_ADC_TBAT] = "BATTERY TEMP",
[DA9052_ADC_VBAT] = "BATTERY VOLTAGE",
[DA9052_ADC_IN4] = "ADC IN4",
[DA9052_ADC_IN5] = "ADC IN5",
[DA9052_ADC_IN6] = "ADC IN6",
[DA9052_ADC_TSI_XP] = "ADC TS X+",
[DA9052_ADC_TSI_YP] = "ADC TS Y+",
[DA9052_ADC_TSI_XN] = "ADC TS X-",
[DA9052_ADC_TSI_YN] = "ADC TS Y-",
[DA9052_ADC_TJUNC] = "BATTERY JUNCTION TEMP",
[DA9052_ADC_VBBAT] = "BACK-UP BATTERY VOLTAGE",
};
/* Conversion function for VDDOUT and VBAT */
static inline int volt_reg_to_mv(int value)
{
return DIV_ROUND_CLOSEST(value * 2000, 1023) + 2500;
}
/* Conversion function for ADC channels 4, 5 and 6 */
static inline int input_reg_to_mv(int value)
{
return DIV_ROUND_CLOSEST(value * 2500, 1023);
}
/* Conversion function for VBBAT */
static inline int vbbat_reg_to_mv(int value)
{
return DIV_ROUND_CLOSEST(value * 5000, 1023);
}
static inline int input_tsireg_to_mv(struct da9052_hwmon *hwmon, int value)
{
return DIV_ROUND_CLOSEST(value * hwmon->tsiref_mv, 1023);
}
static inline int da9052_enable_vddout_channel(struct da9052 *da9052)
{
return da9052_reg_update(da9052, DA9052_ADC_CONT_REG,
DA9052_ADCCONT_AUTOVDDEN,
DA9052_ADCCONT_AUTOVDDEN);
}
static inline int da9052_disable_vddout_channel(struct da9052 *da9052)
{
return da9052_reg_update(da9052, DA9052_ADC_CONT_REG,
DA9052_ADCCONT_AUTOVDDEN, 0);
}
static ssize_t da9052_vddout_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int ret, vdd;
mutex_lock(&hwmon->hwmon_lock);
ret = da9052_enable_vddout_channel(hwmon->da9052);
if (ret < 0)
goto hwmon_err;
vdd = da9052_reg_read(hwmon->da9052, DA9052_VDD_RES_REG);
if (vdd < 0) {
ret = vdd;
goto hwmon_err_release;
}
ret = da9052_disable_vddout_channel(hwmon->da9052);
if (ret < 0)
goto hwmon_err;
mutex_unlock(&hwmon->hwmon_lock);
return sprintf(buf, "%d\n", volt_reg_to_mv(vdd));
hwmon_err_release:
da9052_disable_vddout_channel(hwmon->da9052);
hwmon_err:
mutex_unlock(&hwmon->hwmon_lock);
return ret;
}
static ssize_t da9052_ich_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int ret;
ret = da9052_reg_read(hwmon->da9052, DA9052_ICHG_AV_REG);
if (ret < 0)
return ret;
/* Equivalent to 3.9mA/bit in register ICHG_AV */
return sprintf(buf, "%d\n", DIV_ROUND_CLOSEST(ret * 39, 10));
}
static ssize_t da9052_tbat_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", da9052_adc_read_temp(hwmon->da9052));
}
static ssize_t da9052_vbat_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int ret;
ret = da9052_adc_manual_read(hwmon->da9052, DA9052_ADC_VBAT);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", volt_reg_to_mv(ret));
}
static ssize_t da9052_misc_channel_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int channel = to_sensor_dev_attr(devattr)->index;
int ret;
ret = da9052_adc_manual_read(hwmon->da9052, channel);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", input_reg_to_mv(ret));
}
static int da9052_request_tsi_read(struct da9052_hwmon *hwmon, int channel)
{
u8 val = DA9052_TSICONTB_TSIMAN;
switch (channel) {
case DA9052_ADC_TSI_XP:
val |= DA9052_TSICONTB_TSIMUX_XP;
break;
case DA9052_ADC_TSI_YP:
val |= DA9052_TSICONTB_TSIMUX_YP;
break;
case DA9052_ADC_TSI_XN:
val |= DA9052_TSICONTB_TSIMUX_XN;
break;
case DA9052_ADC_TSI_YN:
val |= DA9052_TSICONTB_TSIMUX_YN;
break;
}
return da9052_reg_write(hwmon->da9052, DA9052_TSI_CONT_B_REG, val);
}
static int da9052_get_tsi_result(struct da9052_hwmon *hwmon, int channel)
{
u8 regs[3];
int msb, lsb, err;
/* block read to avoid separation of MSB and LSB */
err = da9052_group_read(hwmon->da9052, DA9052_TSI_X_MSB_REG,
ARRAY_SIZE(regs), regs);
if (err)
return err;
switch (channel) {
case DA9052_ADC_TSI_XP:
case DA9052_ADC_TSI_XN:
msb = regs[0] << DA9052_TSILSB_TSIXL_BITS;
lsb = regs[2] & DA9052_TSILSB_TSIXL;
lsb >>= DA9052_TSILSB_TSIXL_SHIFT;
break;
case DA9052_ADC_TSI_YP:
case DA9052_ADC_TSI_YN:
msb = regs[1] << DA9052_TSILSB_TSIYL_BITS;
lsb = regs[2] & DA9052_TSILSB_TSIYL;
lsb >>= DA9052_TSILSB_TSIYL_SHIFT;
break;
default:
return -EINVAL;
}
return msb | lsb;
}
static ssize_t __da9052_read_tsi(struct device *dev, int channel)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int ret;
reinit_completion(&hwmon->tsidone);
ret = da9052_request_tsi_read(hwmon, channel);
if (ret < 0)
return ret;
/* Wait for an conversion done interrupt */
if (!wait_for_completion_timeout(&hwmon->tsidone,
msecs_to_jiffies(500)))
return -ETIMEDOUT;
return da9052_get_tsi_result(hwmon, channel);
}
static ssize_t da9052_tsi_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int channel = to_sensor_dev_attr(devattr)->index;
int ret;
mutex_lock(&hwmon->da9052->auxadc_lock);
ret = __da9052_read_tsi(dev, channel);
mutex_unlock(&hwmon->da9052->auxadc_lock);
if (ret < 0)
return ret;
else
return sprintf(buf, "%d\n", input_tsireg_to_mv(hwmon, ret));
}
static ssize_t da9052_tjunc_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int tjunc;
int toffset;
tjunc = da9052_reg_read(hwmon->da9052, DA9052_TJUNC_RES_REG);
if (tjunc < 0)
return tjunc;
toffset = da9052_reg_read(hwmon->da9052, DA9052_T_OFFSET_REG);
if (toffset < 0)
return toffset;
/*
* Degrees celsius = 1.708 * (TJUNC_RES - T_OFFSET) - 108.8
* T_OFFSET is a trim value used to improve accuracy of the result
*/
return sprintf(buf, "%d\n", 1708 * (tjunc - toffset) - 108800);
}
static ssize_t da9052_vbbat_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
int ret;
ret = da9052_adc_manual_read(hwmon->da9052, DA9052_ADC_VBBAT);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", vbbat_reg_to_mv(ret));
}
static ssize_t label_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
return sprintf(buf, "%s\n",
input_names[to_sensor_dev_attr(devattr)->index]);
}
static umode_t da9052_channel_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct da9052_hwmon *hwmon = dev_get_drvdata(dev);
struct device_attribute *dattr = container_of(attr,
struct device_attribute, attr);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(dattr);
if (!hwmon->tsi_as_adc) {
switch (sattr->index) {
case DA9052_ADC_TSI_XP:
case DA9052_ADC_TSI_YP:
case DA9052_ADC_TSI_XN:
case DA9052_ADC_TSI_YN:
return 0;
}
}
return attr->mode;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, da9052_vddout, DA9052_ADC_VDDOUT);
static SENSOR_DEVICE_ATTR_RO(in0_label, label, DA9052_ADC_VDDOUT);
static SENSOR_DEVICE_ATTR_RO(in3_input, da9052_vbat, DA9052_ADC_VBAT);
static SENSOR_DEVICE_ATTR_RO(in3_label, label, DA9052_ADC_VBAT);
static SENSOR_DEVICE_ATTR_RO(in4_input, da9052_misc_channel, DA9052_ADC_IN4);
static SENSOR_DEVICE_ATTR_RO(in4_label, label, DA9052_ADC_IN4);
static SENSOR_DEVICE_ATTR_RO(in5_input, da9052_misc_channel, DA9052_ADC_IN5);
static SENSOR_DEVICE_ATTR_RO(in5_label, label, DA9052_ADC_IN5);
static SENSOR_DEVICE_ATTR_RO(in6_input, da9052_misc_channel, DA9052_ADC_IN6);
static SENSOR_DEVICE_ATTR_RO(in6_label, label, DA9052_ADC_IN6);
static SENSOR_DEVICE_ATTR_RO(in9_input, da9052_vbbat, DA9052_ADC_VBBAT);
static SENSOR_DEVICE_ATTR_RO(in9_label, label, DA9052_ADC_VBBAT);
static SENSOR_DEVICE_ATTR_RO(in70_input, da9052_tsi, DA9052_ADC_TSI_XP);
static SENSOR_DEVICE_ATTR_RO(in70_label, label, DA9052_ADC_TSI_XP);
static SENSOR_DEVICE_ATTR_RO(in71_input, da9052_tsi, DA9052_ADC_TSI_XN);
static SENSOR_DEVICE_ATTR_RO(in71_label, label, DA9052_ADC_TSI_XN);
static SENSOR_DEVICE_ATTR_RO(in72_input, da9052_tsi, DA9052_ADC_TSI_YP);
static SENSOR_DEVICE_ATTR_RO(in72_label, label, DA9052_ADC_TSI_YP);
static SENSOR_DEVICE_ATTR_RO(in73_input, da9052_tsi, DA9052_ADC_TSI_YN);
static SENSOR_DEVICE_ATTR_RO(in73_label, label, DA9052_ADC_TSI_YN);
static SENSOR_DEVICE_ATTR_RO(curr1_input, da9052_ich, DA9052_ADC_ICH);
static SENSOR_DEVICE_ATTR_RO(curr1_label, label, DA9052_ADC_ICH);
static SENSOR_DEVICE_ATTR_RO(temp2_input, da9052_tbat, DA9052_ADC_TBAT);
static SENSOR_DEVICE_ATTR_RO(temp2_label, label, DA9052_ADC_TBAT);
static SENSOR_DEVICE_ATTR_RO(temp8_input, da9052_tjunc, DA9052_ADC_TJUNC);
static SENSOR_DEVICE_ATTR_RO(temp8_label, label, DA9052_ADC_TJUNC);
static struct attribute *da9052_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_label.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_label.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_label.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_label.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_label.dev_attr.attr,
&sensor_dev_attr_in70_input.dev_attr.attr,
&sensor_dev_attr_in70_label.dev_attr.attr,
&sensor_dev_attr_in71_input.dev_attr.attr,
&sensor_dev_attr_in71_label.dev_attr.attr,
&sensor_dev_attr_in72_input.dev_attr.attr,
&sensor_dev_attr_in72_label.dev_attr.attr,
&sensor_dev_attr_in73_input.dev_attr.attr,
&sensor_dev_attr_in73_label.dev_attr.attr,
&sensor_dev_attr_in9_input.dev_attr.attr,
&sensor_dev_attr_in9_label.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_curr1_label.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_label.dev_attr.attr,
&sensor_dev_attr_temp8_input.dev_attr.attr,
&sensor_dev_attr_temp8_label.dev_attr.attr,
NULL
};
static const struct attribute_group da9052_group = {
.attrs = da9052_attrs,
.is_visible = da9052_channel_is_visible,
};
__ATTRIBUTE_GROUPS(da9052);
static irqreturn_t da9052_tsi_datardy_irq(int irq, void *data)
{
struct da9052_hwmon *hwmon = data;
complete(&hwmon->tsidone);
return IRQ_HANDLED;
}
static int da9052_hwmon_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct da9052_hwmon *hwmon;
struct device *hwmon_dev;
int err;
hwmon = devm_kzalloc(dev, sizeof(struct da9052_hwmon), GFP_KERNEL);
if (!hwmon)
return -ENOMEM;
platform_set_drvdata(pdev, hwmon);
mutex_init(&hwmon->hwmon_lock);
hwmon->da9052 = dev_get_drvdata(pdev->dev.parent);
init_completion(&hwmon->tsidone);
hwmon->tsi_as_adc =
device_property_read_bool(pdev->dev.parent, "dlg,tsi-as-adc");
if (hwmon->tsi_as_adc) {
hwmon->tsiref = devm_regulator_get(pdev->dev.parent, "tsiref");
if (IS_ERR(hwmon->tsiref)) {
err = PTR_ERR(hwmon->tsiref);
dev_err(&pdev->dev, "failed to get tsiref: %d", err);
return err;
}
err = regulator_enable(hwmon->tsiref);
if (err)
return err;
hwmon->tsiref_mv = regulator_get_voltage(hwmon->tsiref);
if (hwmon->tsiref_mv < 0) {
err = hwmon->tsiref_mv;
goto exit_regulator;
}
/* convert from microvolt (DT) to millivolt (hwmon) */
hwmon->tsiref_mv /= 1000;
/* TSIREF limits from datasheet */
if (hwmon->tsiref_mv < 1800 || hwmon->tsiref_mv > 2600) {
dev_err(hwmon->da9052->dev, "invalid TSIREF voltage: %d",
hwmon->tsiref_mv);
err = -ENXIO;
goto exit_regulator;
}
/* disable touchscreen features */
da9052_reg_write(hwmon->da9052, DA9052_TSI_CONT_A_REG, 0x00);
/* Sample every 1ms */
da9052_reg_update(hwmon->da9052, DA9052_ADC_CONT_REG,
DA9052_ADCCONT_ADCMODE,
DA9052_ADCCONT_ADCMODE);
err = da9052_request_irq(hwmon->da9052, DA9052_IRQ_TSIREADY,
"tsiready-irq", da9052_tsi_datardy_irq,
hwmon);
if (err) {
dev_err(&pdev->dev, "Failed to register TSIRDY IRQ: %d",
err);
goto exit_regulator;
}
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev, "da9052",
hwmon,
da9052_groups);
err = PTR_ERR_OR_ZERO(hwmon_dev);
if (err)
goto exit_irq;
return 0;
exit_irq:
if (hwmon->tsi_as_adc)
da9052_free_irq(hwmon->da9052, DA9052_IRQ_TSIREADY, hwmon);
exit_regulator:
if (hwmon->tsiref)
regulator_disable(hwmon->tsiref);
return err;
}
static int da9052_hwmon_remove(struct platform_device *pdev)
{
struct da9052_hwmon *hwmon = platform_get_drvdata(pdev);
if (hwmon->tsi_as_adc) {
da9052_free_irq(hwmon->da9052, DA9052_IRQ_TSIREADY, hwmon);
regulator_disable(hwmon->tsiref);
}
return 0;
}
static struct platform_driver da9052_hwmon_driver = {
.probe = da9052_hwmon_probe,
.remove = da9052_hwmon_remove,
.driver = {
.name = "da9052-hwmon",
},
};
module_platform_driver(da9052_hwmon_driver);
MODULE_AUTHOR("David Dajun Chen <[email protected]>");
MODULE_DESCRIPTION("DA9052 HWMON driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:da9052-hwmon");
|
linux-master
|
drivers/hwmon/da9052-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for EMC2305 fan controller
*
* Copyright (C) 2022 Nvidia Technologies Ltd.
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/platform_data/emc2305.h>
#include <linux/thermal.h>
static const unsigned short
emc2305_normal_i2c[] = { 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d, I2C_CLIENT_END };
#define EMC2305_REG_DRIVE_FAIL_STATUS 0x27
#define EMC2305_REG_VENDOR 0xfe
#define EMC2305_FAN_MAX 0xff
#define EMC2305_FAN_MIN 0x00
#define EMC2305_FAN_MAX_STATE 10
#define EMC2305_DEVICE 0x34
#define EMC2305_VENDOR 0x5d
#define EMC2305_REG_PRODUCT_ID 0xfd
#define EMC2305_TACH_REGS_UNUSE_BITS 3
#define EMC2305_TACH_CNT_MULTIPLIER 0x02
#define EMC2305_TACH_RANGE_MIN 480
#define EMC2305_PWM_DUTY2STATE(duty, max_state, pwm_max) \
DIV_ROUND_CLOSEST((duty) * (max_state), (pwm_max))
#define EMC2305_PWM_STATE2DUTY(state, max_state, pwm_max) \
DIV_ROUND_CLOSEST((state) * (pwm_max), (max_state))
/*
* Factor by equations [2] and [3] from data sheet; valid for fans where the number of edges
* equal (poles * 2 + 1).
*/
#define EMC2305_RPM_FACTOR 3932160
#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * (n))
#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * (n))
#define EMC2305_REG_FAN_TACH(n) (0x3e + 0x10 * (n))
enum emc230x_product_id {
EMC2305 = 0x34,
EMC2303 = 0x35,
EMC2302 = 0x36,
EMC2301 = 0x37,
};
static const struct i2c_device_id emc2305_ids[] = {
{ "emc2305", 0 },
{ "emc2303", 0 },
{ "emc2302", 0 },
{ "emc2301", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, emc2305_ids);
/**
* struct emc2305_cdev_data - device-specific cooling device state
* @cdev: cooling device
* @cur_state: cooling current state
* @last_hwmon_state: last cooling state updated by hwmon subsystem
* @last_thermal_state: last cooling state updated by thermal subsystem
*
* The 'last_hwmon_state' and 'last_thermal_state' fields are provided to support fan low limit
* speed feature. The purpose of this feature is to provides ability to limit fan speed
* according to some system wise considerations, like absence of some replaceable units (PSU or
* line cards), high system ambient temperature, unreliable transceivers temperature sensing or
* some other factors which indirectly impacts system's airflow
* Fan low limit feature is supported through 'hwmon' interface: 'hwmon' 'pwm' attribute is
* used for setting low limit for fan speed in case 'thermal' subsystem is configured in
* kernel. In this case setting fan speed through 'hwmon' will never let the 'thermal'
* subsystem to select a lower duty cycle than the duty cycle selected with the 'pwm'
* attribute.
* From other side, fan speed is to be updated in hardware through 'pwm' only in case the
* requested fan speed is above last speed set by 'thermal' subsystem, otherwise requested fan
* speed will be just stored with no PWM update.
*/
struct emc2305_cdev_data {
struct thermal_cooling_device *cdev;
unsigned int cur_state;
unsigned long last_hwmon_state;
unsigned long last_thermal_state;
};
/**
* struct emc2305_data - device-specific data
* @client: i2c client
* @hwmon_dev: hwmon device
* @max_state: maximum cooling state of the cooling device
* @pwm_num: number of PWM channels
* @pwm_separate: separate PWM settings for every channel
* @pwm_min: array of minimum PWM per channel
* @cdev_data: array of cooling devices data
*/
struct emc2305_data {
struct i2c_client *client;
struct device *hwmon_dev;
u8 max_state;
u8 pwm_num;
bool pwm_separate;
u8 pwm_min[EMC2305_PWM_MAX];
struct emc2305_cdev_data cdev_data[EMC2305_PWM_MAX];
};
static char *emc2305_fan_name[] = {
"emc2305_fan",
"emc2305_fan1",
"emc2305_fan2",
"emc2305_fan3",
"emc2305_fan4",
"emc2305_fan5",
};
static void emc2305_unset_tz(struct device *dev);
static int emc2305_get_max_channel(const struct emc2305_data *data)
{
return data->pwm_num;
}
static int emc2305_get_cdev_idx(struct thermal_cooling_device *cdev)
{
struct emc2305_data *data = cdev->devdata;
size_t len = strlen(cdev->type);
int ret;
if (len <= 0)
return -EINVAL;
/*
* Returns index of cooling device 0..4 in case of separate PWM setting.
* Zero index is used in case of one common PWM setting.
* If the mode is not set as pwm_separate, all PWMs are to be bound
* to the common thermal zone and should work at the same speed
* to perform cooling for the same thermal junction.
* Otherwise, return specific channel that will be used in bound
* related PWM to the thermal zone.
*/
if (!data->pwm_separate)
return 0;
ret = cdev->type[len - 1];
switch (ret) {
case '1' ... '5':
return ret - '1';
default:
break;
}
return -EINVAL;
}
static int emc2305_get_cur_state(struct thermal_cooling_device *cdev, unsigned long *state)
{
int cdev_idx;
struct emc2305_data *data = cdev->devdata;
cdev_idx = emc2305_get_cdev_idx(cdev);
if (cdev_idx < 0)
return cdev_idx;
*state = data->cdev_data[cdev_idx].cur_state;
return 0;
}
static int emc2305_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state)
{
struct emc2305_data *data = cdev->devdata;
*state = data->max_state;
return 0;
}
static int __emc2305_set_cur_state(struct emc2305_data *data, int cdev_idx, unsigned long state)
{
int ret;
struct i2c_client *client = data->client;
u8 val, i;
state = max_t(unsigned long, state, data->cdev_data[cdev_idx].last_hwmon_state);
val = EMC2305_PWM_STATE2DUTY(state, data->max_state, EMC2305_FAN_MAX);
data->cdev_data[cdev_idx].cur_state = state;
if (data->pwm_separate) {
ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(cdev_idx), val);
if (ret < 0)
return ret;
} else {
/*
* Set the same PWM value in all channels
* if common PWM channel is used.
*/
for (i = 0; i < data->pwm_num; i++) {
ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(i), val);
if (ret < 0)
return ret;
}
}
return 0;
}
static int emc2305_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
{
int cdev_idx, ret;
struct emc2305_data *data = cdev->devdata;
if (state > data->max_state)
return -EINVAL;
cdev_idx = emc2305_get_cdev_idx(cdev);
if (cdev_idx < 0)
return cdev_idx;
/* Save thermal state. */
data->cdev_data[cdev_idx].last_thermal_state = state;
ret = __emc2305_set_cur_state(data, cdev_idx, state);
if (ret < 0)
return ret;
return 0;
}
static const struct thermal_cooling_device_ops emc2305_cooling_ops = {
.get_max_state = emc2305_get_max_state,
.get_cur_state = emc2305_get_cur_state,
.set_cur_state = emc2305_set_cur_state,
};
static int emc2305_show_fault(struct device *dev, int channel)
{
struct emc2305_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int status_reg;
status_reg = i2c_smbus_read_byte_data(client, EMC2305_REG_DRIVE_FAIL_STATUS);
if (status_reg < 0)
return status_reg;
return status_reg & (1 << channel) ? 1 : 0;
}
static int emc2305_show_fan(struct device *dev, int channel)
{
struct emc2305_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
ret = i2c_smbus_read_word_swapped(client, EMC2305_REG_FAN_TACH(channel));
if (ret <= 0)
return ret;
ret = ret >> EMC2305_TACH_REGS_UNUSE_BITS;
ret = EMC2305_RPM_FACTOR / ret;
if (ret <= EMC2305_TACH_RANGE_MIN)
return 0;
return ret * EMC2305_TACH_CNT_MULTIPLIER;
}
static int emc2305_show_pwm(struct device *dev, int channel)
{
struct emc2305_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
return i2c_smbus_read_byte_data(client, EMC2305_REG_FAN_DRIVE(channel));
}
static int emc2305_set_pwm(struct device *dev, long val, int channel)
{
struct emc2305_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
if (val < data->pwm_min[channel] || val > EMC2305_FAN_MAX)
return -EINVAL;
ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(channel), val);
if (ret < 0)
return ret;
data->cdev_data[channel].cur_state = EMC2305_PWM_DUTY2STATE(val, data->max_state,
EMC2305_FAN_MAX);
return 0;
}
static int emc2305_set_single_tz(struct device *dev, int idx)
{
struct emc2305_data *data = dev_get_drvdata(dev);
long pwm;
int i, cdev_idx, ret;
cdev_idx = (idx) ? idx - 1 : 0;
pwm = data->pwm_min[cdev_idx];
data->cdev_data[cdev_idx].cdev =
thermal_cooling_device_register(emc2305_fan_name[idx], data,
&emc2305_cooling_ops);
if (IS_ERR(data->cdev_data[cdev_idx].cdev)) {
dev_err(dev, "Failed to register cooling device %s\n", emc2305_fan_name[idx]);
return PTR_ERR(data->cdev_data[cdev_idx].cdev);
}
/* Set minimal PWM speed. */
if (data->pwm_separate) {
ret = emc2305_set_pwm(dev, pwm, cdev_idx);
if (ret < 0)
return ret;
} else {
for (i = 0; i < data->pwm_num; i++) {
ret = emc2305_set_pwm(dev, pwm, i);
if (ret < 0)
return ret;
}
}
data->cdev_data[cdev_idx].cur_state =
EMC2305_PWM_DUTY2STATE(data->pwm_min[cdev_idx], data->max_state,
EMC2305_FAN_MAX);
data->cdev_data[cdev_idx].last_hwmon_state =
EMC2305_PWM_DUTY2STATE(data->pwm_min[cdev_idx], data->max_state,
EMC2305_FAN_MAX);
return 0;
}
static int emc2305_set_tz(struct device *dev)
{
struct emc2305_data *data = dev_get_drvdata(dev);
int i, ret;
if (!data->pwm_separate)
return emc2305_set_single_tz(dev, 0);
for (i = 0; i < data->pwm_num; i++) {
ret = emc2305_set_single_tz(dev, i + 1);
if (ret)
goto thermal_cooling_device_register_fail;
}
return 0;
thermal_cooling_device_register_fail:
emc2305_unset_tz(dev);
return ret;
}
static void emc2305_unset_tz(struct device *dev)
{
struct emc2305_data *data = dev_get_drvdata(dev);
int i;
/* Unregister cooling device. */
for (i = 0; i < EMC2305_PWM_MAX; i++)
if (data->cdev_data[i].cdev)
thermal_cooling_device_unregister(data->cdev_data[i].cdev);
}
static umode_t
emc2305_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel)
{
int max_channel = emc2305_get_max_channel(data);
/* Don't show channels which are not physically connected. */
if (channel >= max_channel)
return 0;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
return 0444;
case hwmon_fan_fault:
return 0444;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
return 0644;
default:
break;
}
break;
default:
break;
}
return 0;
};
static int
emc2305_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val)
{
struct emc2305_data *data = dev_get_drvdata(dev);
int cdev_idx;
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
/* If thermal is configured - handle PWM limit setting. */
if (IS_REACHABLE(CONFIG_THERMAL)) {
if (data->pwm_separate)
cdev_idx = channel;
else
cdev_idx = 0;
data->cdev_data[cdev_idx].last_hwmon_state =
EMC2305_PWM_DUTY2STATE(val, data->max_state,
EMC2305_FAN_MAX);
/*
* Update PWM only in case requested state is not less than the
* last thermal state.
*/
if (data->cdev_data[cdev_idx].last_hwmon_state >=
data->cdev_data[cdev_idx].last_thermal_state)
return __emc2305_set_cur_state(data, cdev_idx,
data->cdev_data[cdev_idx].last_hwmon_state);
return 0;
}
return emc2305_set_pwm(dev, val, channel);
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
};
static int
emc2305_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val)
{
int ret;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
ret = emc2305_show_fan(dev, channel);
if (ret < 0)
return ret;
*val = ret;
return 0;
case hwmon_fan_fault:
ret = emc2305_show_fault(dev, channel);
if (ret < 0)
return ret;
*val = ret;
return 0;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
ret = emc2305_show_pwm(dev, channel);
if (ret < 0)
return ret;
*val = ret;
return 0;
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
};
static const struct hwmon_ops emc2305_ops = {
.is_visible = emc2305_is_visible,
.read = emc2305_read,
.write = emc2305_write,
};
static const struct hwmon_channel_info * const emc2305_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT),
NULL
};
static const struct hwmon_chip_info emc2305_chip_info = {
.ops = &emc2305_ops,
.info = emc2305_info,
};
static int emc2305_identify(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct emc2305_data *data = i2c_get_clientdata(client);
int ret;
ret = i2c_smbus_read_byte_data(client, EMC2305_REG_PRODUCT_ID);
if (ret < 0)
return ret;
switch (ret) {
case EMC2305:
data->pwm_num = 5;
break;
case EMC2303:
data->pwm_num = 3;
break;
case EMC2302:
data->pwm_num = 2;
break;
case EMC2301:
data->pwm_num = 1;
break;
default:
return -ENODEV;
}
return 0;
}
static int emc2305_probe(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
struct device *dev = &client->dev;
struct emc2305_data *data;
struct emc2305_platform_data *pdata;
int vendor;
int ret;
int i;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR);
if (vendor != EMC2305_VENDOR)
return -ENODEV;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->client = client;
ret = emc2305_identify(dev);
if (ret)
return ret;
pdata = dev_get_platdata(&client->dev);
if (pdata) {
if (!pdata->max_state || pdata->max_state > EMC2305_FAN_MAX_STATE)
return -EINVAL;
data->max_state = pdata->max_state;
/*
* Validate a number of active PWM channels. Note that
* configured number can be less than the actual maximum
* supported by the device.
*/
if (!pdata->pwm_num || pdata->pwm_num > EMC2305_PWM_MAX)
return -EINVAL;
data->pwm_num = pdata->pwm_num;
data->pwm_separate = pdata->pwm_separate;
for (i = 0; i < EMC2305_PWM_MAX; i++)
data->pwm_min[i] = pdata->pwm_min[i];
} else {
data->max_state = EMC2305_FAN_MAX_STATE;
data->pwm_separate = false;
for (i = 0; i < EMC2305_PWM_MAX; i++)
data->pwm_min[i] = EMC2305_FAN_MIN;
}
data->hwmon_dev = devm_hwmon_device_register_with_info(dev, "emc2305", data,
&emc2305_chip_info, NULL);
if (IS_ERR(data->hwmon_dev))
return PTR_ERR(data->hwmon_dev);
if (IS_REACHABLE(CONFIG_THERMAL)) {
ret = emc2305_set_tz(dev);
if (ret != 0)
return ret;
}
for (i = 0; i < data->pwm_num; i++) {
ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i),
data->pwm_min[i]);
if (ret < 0)
return ret;
}
return 0;
}
static void emc2305_remove(struct i2c_client *client)
{
struct device *dev = &client->dev;
if (IS_REACHABLE(CONFIG_THERMAL))
emc2305_unset_tz(dev);
}
static struct i2c_driver emc2305_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "emc2305",
},
.probe = emc2305_probe,
.remove = emc2305_remove,
.id_table = emc2305_ids,
.address_list = emc2305_normal_i2c,
};
module_i2c_driver(emc2305_driver);
MODULE_AUTHOR("Nvidia");
MODULE_DESCRIPTION("Microchip EMC2305 fan controller driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/emc2305.c
|
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
#include <linux/bits.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#define OFS_FAN_INST 0 /* Is 0 because plreg base will be set at INST */
#define OFS_FAN_FAIL 2 /* Is 2 bytes after base */
#define OFS_SEVSTAT 0 /* Is 0 because fn2 base will be set at SEVSTAT */
#define POWER_BIT 24
struct gxp_fan_ctrl_drvdata {
void __iomem *base;
void __iomem *plreg;
void __iomem *fn2;
};
static bool fan_installed(struct device *dev, int fan)
{
struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
u8 val;
val = readb(drvdata->plreg + OFS_FAN_INST);
return !!(val & BIT(fan));
}
static long fan_failed(struct device *dev, int fan)
{
struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
u8 val;
val = readb(drvdata->plreg + OFS_FAN_FAIL);
return !!(val & BIT(fan));
}
static long fan_enabled(struct device *dev, int fan)
{
struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
u32 val;
/*
* Check the power status as if the platform is off the value
* reported for the PWM will be incorrect. Report fan as
* disabled.
*/
val = readl(drvdata->fn2 + OFS_SEVSTAT);
return !!((val & BIT(POWER_BIT)) && fan_installed(dev, fan));
}
static int gxp_pwm_write(struct device *dev, u32 attr, int channel, long val)
{
struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
switch (attr) {
case hwmon_pwm_input:
if (val > 255 || val < 0)
return -EINVAL;
writeb(val, drvdata->base + channel);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int gxp_fan_ctrl_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_pwm:
return gxp_pwm_write(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int gxp_fan_read(struct device *dev, u32 attr, int channel, long *val)
{
switch (attr) {
case hwmon_fan_enable:
*val = fan_enabled(dev, channel);
return 0;
case hwmon_fan_fault:
*val = fan_failed(dev, channel);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int gxp_pwm_read(struct device *dev, u32 attr, int channel, long *val)
{
struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
u32 reg;
/*
* Check the power status of the platform. If the platform is off
* the value reported for the PWM will be incorrect. In this case
* report a PWM of zero.
*/
reg = readl(drvdata->fn2 + OFS_SEVSTAT);
if (reg & BIT(POWER_BIT))
*val = fan_installed(dev, channel) ? readb(drvdata->base + channel) : 0;
else
*val = 0;
return 0;
}
static int gxp_fan_ctrl_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_fan:
return gxp_fan_read(dev, attr, channel, val);
case hwmon_pwm:
return gxp_pwm_read(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t gxp_fan_ctrl_is_visible(const void *_data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
umode_t mode = 0;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_enable:
case hwmon_fan_fault:
mode = 0444;
break;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
mode = 0644;
break;
default:
break;
}
break;
default:
break;
}
return mode;
}
static const struct hwmon_ops gxp_fan_ctrl_ops = {
.is_visible = gxp_fan_ctrl_is_visible,
.read = gxp_fan_ctrl_read,
.write = gxp_fan_ctrl_write,
};
static const struct hwmon_channel_info * const gxp_fan_ctrl_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_FAULT | HWMON_F_ENABLE),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT),
NULL
};
static const struct hwmon_chip_info gxp_fan_ctrl_chip_info = {
.ops = &gxp_fan_ctrl_ops,
.info = gxp_fan_ctrl_info,
};
static int gxp_fan_ctrl_probe(struct platform_device *pdev)
{
struct gxp_fan_ctrl_drvdata *drvdata;
struct device *dev = &pdev->dev;
struct device *hwmon_dev;
drvdata = devm_kzalloc(dev, sizeof(struct gxp_fan_ctrl_drvdata),
GFP_KERNEL);
if (!drvdata)
return -ENOMEM;
drvdata->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(drvdata->base))
return dev_err_probe(dev, PTR_ERR(drvdata->base),
"failed to map base\n");
drvdata->plreg = devm_platform_ioremap_resource_byname(pdev,
"pl");
if (IS_ERR(drvdata->plreg))
return dev_err_probe(dev, PTR_ERR(drvdata->plreg),
"failed to map plreg\n");
drvdata->fn2 = devm_platform_ioremap_resource_byname(pdev,
"fn2");
if (IS_ERR(drvdata->fn2))
return dev_err_probe(dev, PTR_ERR(drvdata->fn2),
"failed to map fn2\n");
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
"hpe_gxp_fan_ctrl",
drvdata,
&gxp_fan_ctrl_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id gxp_fan_ctrl_of_match[] = {
{ .compatible = "hpe,gxp-fan-ctrl", },
{},
};
MODULE_DEVICE_TABLE(of, gxp_fan_ctrl_of_match);
static struct platform_driver gxp_fan_ctrl_driver = {
.probe = gxp_fan_ctrl_probe,
.driver = {
.name = "gxp-fan-ctrl",
.of_match_table = gxp_fan_ctrl_of_match,
},
};
module_platform_driver(gxp_fan_ctrl_driver);
MODULE_AUTHOR("Nick Hawkins <[email protected]>");
MODULE_DESCRIPTION("HPE GXP fan controller");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/gxp-fan-ctrl.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* fam15h_power.c - AMD Family 15h processor power monitoring
*
* Copyright (c) 2011-2016 Advanced Micro Devices, Inc.
* Author: Andreas Herrmann <[email protected]>
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/bitops.h>
#include <linux/cpu.h>
#include <linux/cpumask.h>
#include <linux/time.h>
#include <linux/sched.h>
#include <asm/processor.h>
#include <asm/msr.h>
MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
MODULE_AUTHOR("Andreas Herrmann <[email protected]>");
MODULE_LICENSE("GPL");
/* D18F3 */
#define REG_NORTHBRIDGE_CAP 0xe8
/* D18F4 */
#define REG_PROCESSOR_TDP 0x1b8
/* D18F5 */
#define REG_TDP_RUNNING_AVERAGE 0xe0
#define REG_TDP_LIMIT3 0xe8
#define FAM15H_MIN_NUM_ATTRS 2
#define FAM15H_NUM_GROUPS 2
#define MAX_CUS 8
/* set maximum interval as 1 second */
#define MAX_INTERVAL 1000
#define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4
struct fam15h_power_data {
struct pci_dev *pdev;
unsigned int tdp_to_watts;
unsigned int base_tdp;
unsigned int processor_pwr_watts;
unsigned int cpu_pwr_sample_ratio;
const struct attribute_group *groups[FAM15H_NUM_GROUPS];
struct attribute_group group;
/* maximum accumulated power of a compute unit */
u64 max_cu_acc_power;
/* accumulated power of the compute units */
u64 cu_acc_power[MAX_CUS];
/* performance timestamp counter */
u64 cpu_sw_pwr_ptsc[MAX_CUS];
/* online/offline status of current compute unit */
int cu_on[MAX_CUS];
unsigned long power_period;
};
static bool is_carrizo_or_later(void)
{
return boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60;
}
static ssize_t power1_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
u32 val, tdp_limit, running_avg_range;
s32 running_avg_capture;
u64 curr_pwr_watts;
struct fam15h_power_data *data = dev_get_drvdata(dev);
struct pci_dev *f4 = data->pdev;
pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
REG_TDP_RUNNING_AVERAGE, &val);
/*
* On Carrizo and later platforms, TdpRunAvgAccCap bit field
* is extended to 4:31 from 4:25.
*/
if (is_carrizo_or_later()) {
running_avg_capture = val >> 4;
running_avg_capture = sign_extend32(running_avg_capture, 27);
} else {
running_avg_capture = (val >> 4) & 0x3fffff;
running_avg_capture = sign_extend32(running_avg_capture, 21);
}
running_avg_range = (val & 0xf) + 1;
pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
REG_TDP_LIMIT3, &val);
/*
* On Carrizo and later platforms, ApmTdpLimit bit field
* is extended to 16:31 from 16:28.
*/
if (is_carrizo_or_later())
tdp_limit = val >> 16;
else
tdp_limit = (val >> 16) & 0x1fff;
curr_pwr_watts = ((u64)(tdp_limit +
data->base_tdp)) << running_avg_range;
curr_pwr_watts -= running_avg_capture;
curr_pwr_watts *= data->tdp_to_watts;
/*
* Convert to microWatt
*
* power is in Watt provided as fixed point integer with
* scaling factor 1/(2^16). For conversion we use
* (10^6)/(2^16) = 15625/(2^10)
*/
curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
}
static DEVICE_ATTR_RO(power1_input);
static ssize_t power1_crit_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct fam15h_power_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%u\n", data->processor_pwr_watts);
}
static DEVICE_ATTR_RO(power1_crit);
static void do_read_registers_on_cu(void *_data)
{
struct fam15h_power_data *data = _data;
int cpu, cu;
cpu = smp_processor_id();
/*
* With the new x86 topology modelling, cpu core id actually
* is compute unit id.
*/
cu = cpu_data(cpu).cpu_core_id;
rdmsrl_safe(MSR_F15H_CU_PWR_ACCUMULATOR, &data->cu_acc_power[cu]);
rdmsrl_safe(MSR_F15H_PTSC, &data->cpu_sw_pwr_ptsc[cu]);
data->cu_on[cu] = 1;
}
/*
* This function is only able to be called when CPUID
* Fn8000_0007:EDX[12] is set.
*/
static int read_registers(struct fam15h_power_data *data)
{
int core, this_core;
cpumask_var_t mask;
int ret, cpu;
ret = zalloc_cpumask_var(&mask, GFP_KERNEL);
if (!ret)
return -ENOMEM;
memset(data->cu_on, 0, sizeof(int) * MAX_CUS);
cpus_read_lock();
/*
* Choose the first online core of each compute unit, and then
* read their MSR value of power and ptsc in a single IPI,
* because the MSR value of CPU core represent the compute
* unit's.
*/
core = -1;
for_each_online_cpu(cpu) {
this_core = topology_core_id(cpu);
if (this_core == core)
continue;
core = this_core;
/* get any CPU on this compute unit */
cpumask_set_cpu(cpumask_any(topology_sibling_cpumask(cpu)), mask);
}
on_each_cpu_mask(mask, do_read_registers_on_cu, data, true);
cpus_read_unlock();
free_cpumask_var(mask);
return 0;
}
static ssize_t power1_average_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct fam15h_power_data *data = dev_get_drvdata(dev);
u64 prev_cu_acc_power[MAX_CUS], prev_ptsc[MAX_CUS],
jdelta[MAX_CUS];
u64 tdelta, avg_acc;
int cu, cu_num, ret;
signed long leftover;
/*
* With the new x86 topology modelling, x86_max_cores is the
* compute unit number.
*/
cu_num = boot_cpu_data.x86_max_cores;
ret = read_registers(data);
if (ret)
return 0;
for (cu = 0; cu < cu_num; cu++) {
prev_cu_acc_power[cu] = data->cu_acc_power[cu];
prev_ptsc[cu] = data->cpu_sw_pwr_ptsc[cu];
}
leftover = schedule_timeout_interruptible(msecs_to_jiffies(data->power_period));
if (leftover)
return 0;
ret = read_registers(data);
if (ret)
return 0;
for (cu = 0, avg_acc = 0; cu < cu_num; cu++) {
/* check if current compute unit is online */
if (data->cu_on[cu] == 0)
continue;
if (data->cu_acc_power[cu] < prev_cu_acc_power[cu]) {
jdelta[cu] = data->max_cu_acc_power + data->cu_acc_power[cu];
jdelta[cu] -= prev_cu_acc_power[cu];
} else {
jdelta[cu] = data->cu_acc_power[cu] - prev_cu_acc_power[cu];
}
tdelta = data->cpu_sw_pwr_ptsc[cu] - prev_ptsc[cu];
jdelta[cu] *= data->cpu_pwr_sample_ratio * 1000;
do_div(jdelta[cu], tdelta);
/* the unit is microWatt */
avg_acc += jdelta[cu];
}
return sprintf(buf, "%llu\n", (unsigned long long)avg_acc);
}
static DEVICE_ATTR_RO(power1_average);
static ssize_t power1_average_interval_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct fam15h_power_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%lu\n", data->power_period);
}
static ssize_t power1_average_interval_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct fam15h_power_data *data = dev_get_drvdata(dev);
unsigned long temp;
int ret;
ret = kstrtoul(buf, 10, &temp);
if (ret)
return ret;
if (temp > MAX_INTERVAL)
return -EINVAL;
/* the interval value should be greater than 0 */
if (temp <= 0)
return -EINVAL;
data->power_period = temp;
return count;
}
static DEVICE_ATTR_RW(power1_average_interval);
static int fam15h_power_init_attrs(struct pci_dev *pdev,
struct fam15h_power_data *data)
{
int n = FAM15H_MIN_NUM_ATTRS;
struct attribute **fam15h_power_attrs;
struct cpuinfo_x86 *c = &boot_cpu_data;
if (c->x86 == 0x15 &&
(c->x86_model <= 0xf ||
(c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
n += 1;
/* check if processor supports accumulated power */
if (boot_cpu_has(X86_FEATURE_ACC_POWER))
n += 2;
fam15h_power_attrs = devm_kcalloc(&pdev->dev, n,
sizeof(*fam15h_power_attrs),
GFP_KERNEL);
if (!fam15h_power_attrs)
return -ENOMEM;
n = 0;
fam15h_power_attrs[n++] = &dev_attr_power1_crit.attr;
if (c->x86 == 0x15 &&
(c->x86_model <= 0xf ||
(c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
fam15h_power_attrs[n++] = &dev_attr_power1_input.attr;
if (boot_cpu_has(X86_FEATURE_ACC_POWER)) {
fam15h_power_attrs[n++] = &dev_attr_power1_average.attr;
fam15h_power_attrs[n++] = &dev_attr_power1_average_interval.attr;
}
data->group.attrs = fam15h_power_attrs;
return 0;
}
static bool should_load_on_this_node(struct pci_dev *f4)
{
u32 val;
pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
REG_NORTHBRIDGE_CAP, &val);
if ((val & BIT(29)) && ((val >> 30) & 3))
return false;
return true;
}
/*
* Newer BKDG versions have an updated recommendation on how to properly
* initialize the running average range (was: 0xE, now: 0x9). This avoids
* counter saturations resulting in bogus power readings.
* We correct this value ourselves to cope with older BIOSes.
*/
static const struct pci_device_id affected_device[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
{ 0 }
};
static void tweak_runavg_range(struct pci_dev *pdev)
{
u32 val;
/*
* let this quirk apply only to the current version of the
* northbridge, since future versions may change the behavior
*/
if (!pci_match_id(affected_device, pdev))
return;
pci_bus_read_config_dword(pdev->bus,
PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
REG_TDP_RUNNING_AVERAGE, &val);
if ((val & 0xf) != 0xe)
return;
val &= ~0xf;
val |= 0x9;
pci_bus_write_config_dword(pdev->bus,
PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
REG_TDP_RUNNING_AVERAGE, val);
}
#ifdef CONFIG_PM
static int fam15h_power_resume(struct pci_dev *pdev)
{
tweak_runavg_range(pdev);
return 0;
}
#else
#define fam15h_power_resume NULL
#endif
static int fam15h_power_init_data(struct pci_dev *f4,
struct fam15h_power_data *data)
{
u32 val;
u64 tmp;
int ret;
pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
data->base_tdp = val >> 16;
tmp = val & 0xffff;
pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
REG_TDP_LIMIT3, &val);
data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
tmp *= data->tdp_to_watts;
/* result not allowed to be >= 256W */
if ((tmp >> 16) >= 256)
dev_warn(&f4->dev,
"Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
(unsigned int) (tmp >> 16));
/* convert to microWatt */
data->processor_pwr_watts = (tmp * 15625) >> 10;
ret = fam15h_power_init_attrs(f4, data);
if (ret)
return ret;
/* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */
if (!boot_cpu_has(X86_FEATURE_ACC_POWER))
return 0;
/*
* determine the ratio of the compute unit power accumulator
* sample period to the PTSC counter period by executing CPUID
* Fn8000_0007:ECX
*/
data->cpu_pwr_sample_ratio = cpuid_ecx(0x80000007);
if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &tmp)) {
pr_err("Failed to read max compute unit power accumulator MSR\n");
return -ENODEV;
}
data->max_cu_acc_power = tmp;
/*
* Milliseconds are a reasonable interval for the measurement.
* But it shouldn't set too long here, because several seconds
* would cause the read function to hang. So set default
* interval as 10 ms.
*/
data->power_period = 10;
return read_registers(data);
}
static int fam15h_power_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
struct fam15h_power_data *data;
struct device *dev = &pdev->dev;
struct device *hwmon_dev;
int ret;
/*
* though we ignore every other northbridge, we still have to
* do the tweaking on _each_ node in MCM processors as the counters
* are working hand-in-hand
*/
tweak_runavg_range(pdev);
if (!should_load_on_this_node(pdev))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
ret = fam15h_power_init_data(pdev, data);
if (ret)
return ret;
data->pdev = pdev;
data->groups[0] = &data->group;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
data,
&data->groups[0]);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct pci_device_id fam15h_power_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M70H_NB_F4) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
{}
};
MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
static struct pci_driver fam15h_power_driver = {
.name = "fam15h_power",
.id_table = fam15h_power_id_table,
.probe = fam15h_power_probe,
.resume = fam15h_power_resume,
};
module_pci_driver(fam15h_power_driver);
|
linux-master
|
drivers/hwmon/fam15h_power.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2017 IBM Corp.
*
* Driver for the Nuvoton W83773G SMBus temperature sensor IC.
* Supported models: W83773G
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/regmap.h>
/* W83773 has 3 channels */
#define W83773_CHANNELS 3
/* The W83773 registers */
#define W83773_CONVERSION_RATE_REG_READ 0x04
#define W83773_CONVERSION_RATE_REG_WRITE 0x0A
#define W83773_MANUFACTURER_ID_REG 0xFE
#define W83773_LOCAL_TEMP 0x00
static const u8 W83773_STATUS[2] = { 0x02, 0x17 };
static const u8 W83773_TEMP_LSB[2] = { 0x10, 0x25 };
static const u8 W83773_TEMP_MSB[2] = { 0x01, 0x24 };
static const u8 W83773_OFFSET_LSB[2] = { 0x12, 0x16 };
static const u8 W83773_OFFSET_MSB[2] = { 0x11, 0x15 };
/* this is the number of sensors in the device */
static const struct i2c_device_id w83773_id[] = {
{ "w83773g" },
{ }
};
MODULE_DEVICE_TABLE(i2c, w83773_id);
static const struct of_device_id __maybe_unused w83773_of_match[] = {
{
.compatible = "nuvoton,w83773g"
},
{ },
};
MODULE_DEVICE_TABLE(of, w83773_of_match);
static inline long temp_of_local(s8 reg)
{
return reg * 1000;
}
static inline long temp_of_remote(s8 hb, u8 lb)
{
return (hb << 3 | lb >> 5) * 125;
}
static int get_local_temp(struct regmap *regmap, long *val)
{
unsigned int regval;
int ret;
ret = regmap_read(regmap, W83773_LOCAL_TEMP, ®val);
if (ret < 0)
return ret;
*val = temp_of_local(regval);
return 0;
}
static int get_remote_temp(struct regmap *regmap, int index, long *val)
{
unsigned int regval_high;
unsigned int regval_low;
int ret;
ret = regmap_read(regmap, W83773_TEMP_MSB[index], ®val_high);
if (ret < 0)
return ret;
ret = regmap_read(regmap, W83773_TEMP_LSB[index], ®val_low);
if (ret < 0)
return ret;
*val = temp_of_remote(regval_high, regval_low);
return 0;
}
static int get_fault(struct regmap *regmap, int index, long *val)
{
unsigned int regval;
int ret;
ret = regmap_read(regmap, W83773_STATUS[index], ®val);
if (ret < 0)
return ret;
*val = (regval & 0x04) >> 2;
return 0;
}
static int get_offset(struct regmap *regmap, int index, long *val)
{
unsigned int regval_high;
unsigned int regval_low;
int ret;
ret = regmap_read(regmap, W83773_OFFSET_MSB[index], ®val_high);
if (ret < 0)
return ret;
ret = regmap_read(regmap, W83773_OFFSET_LSB[index], ®val_low);
if (ret < 0)
return ret;
*val = temp_of_remote(regval_high, regval_low);
return 0;
}
static int set_offset(struct regmap *regmap, int index, long val)
{
int ret;
u8 high_byte;
u8 low_byte;
val = clamp_val(val, -127825, 127825);
/* offset value equals to (high_byte << 3 | low_byte >> 5) * 125 */
val /= 125;
high_byte = val >> 3;
low_byte = (val & 0x07) << 5;
ret = regmap_write(regmap, W83773_OFFSET_MSB[index], high_byte);
if (ret < 0)
return ret;
return regmap_write(regmap, W83773_OFFSET_LSB[index], low_byte);
}
static int get_update_interval(struct regmap *regmap, long *val)
{
unsigned int regval;
int ret;
ret = regmap_read(regmap, W83773_CONVERSION_RATE_REG_READ, ®val);
if (ret < 0)
return ret;
*val = 16000 >> regval;
return 0;
}
static int set_update_interval(struct regmap *regmap, long val)
{
int rate;
/*
* For valid rates, interval can be calculated as
* interval = (1 << (8 - rate)) * 62.5;
* Rounded rate is therefore
* rate = 8 - __fls(interval * 8 / (62.5 * 7));
* Use clamp_val() to avoid overflows, and to ensure valid input
* for __fls.
*/
val = clamp_val(val, 62, 16000) * 10;
rate = 8 - __fls((val * 8 / (625 * 7)));
return regmap_write(regmap, W83773_CONVERSION_RATE_REG_WRITE, rate);
}
static int w83773_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct regmap *regmap = dev_get_drvdata(dev);
if (type == hwmon_chip) {
if (attr == hwmon_chip_update_interval)
return get_update_interval(regmap, val);
return -EOPNOTSUPP;
}
switch (attr) {
case hwmon_temp_input:
if (channel == 0)
return get_local_temp(regmap, val);
return get_remote_temp(regmap, channel - 1, val);
case hwmon_temp_fault:
return get_fault(regmap, channel - 1, val);
case hwmon_temp_offset:
return get_offset(regmap, channel - 1, val);
default:
return -EOPNOTSUPP;
}
}
static int w83773_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct regmap *regmap = dev_get_drvdata(dev);
if (type == hwmon_chip && attr == hwmon_chip_update_interval)
return set_update_interval(regmap, val);
if (type == hwmon_temp && attr == hwmon_temp_offset)
return set_offset(regmap, channel - 1, val);
return -EOPNOTSUPP;
}
static umode_t w83773_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return 0644;
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_fault:
return 0444;
case hwmon_temp_offset:
return 0644;
}
break;
default:
break;
}
return 0;
}
static const struct hwmon_channel_info * const w83773_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT,
HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_OFFSET),
NULL
};
static const struct hwmon_ops w83773_ops = {
.is_visible = w83773_is_visible,
.read = w83773_read,
.write = w83773_write,
};
static const struct hwmon_chip_info w83773_chip_info = {
.ops = &w83773_ops,
.info = w83773_info,
};
static const struct regmap_config w83773_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int w83773_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct regmap *regmap;
int ret;
regmap = devm_regmap_init_i2c(client, &w83773_regmap_config);
if (IS_ERR(regmap)) {
dev_err(dev, "failed to allocate register map\n");
return PTR_ERR(regmap);
}
/* Set the conversion rate to 2 Hz */
ret = regmap_write(regmap, W83773_CONVERSION_RATE_REG_WRITE, 0x05);
if (ret < 0) {
dev_err(&client->dev, "error writing config rate register\n");
return ret;
}
i2c_set_clientdata(client, regmap);
hwmon_dev = devm_hwmon_device_register_with_info(dev,
client->name,
regmap,
&w83773_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct i2c_driver w83773_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "w83773g",
.of_match_table = of_match_ptr(w83773_of_match),
},
.probe = w83773_probe,
.id_table = w83773_id,
};
module_i2c_driver(w83773_driver);
MODULE_AUTHOR("Lei YU <[email protected]>");
MODULE_DESCRIPTION("W83773G temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/w83773g.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Hwmon client for disk and solid state drives with temperature sensors
* Copyright (C) 2019 Zodiac Inflight Innovations
*
* With input from:
* Hwmon client for S.M.A.R.T. hard disk drives with temperature sensors.
* (C) 2018 Linus Walleij
*
* hwmon: Driver for SCSI/ATA temperature sensors
* by Constantin Baranov <[email protected]>, submitted September 2009
*
* This drive supports reporting the temperature of SATA drives. It can be
* easily extended to report the temperature of SCSI drives.
*
* The primary means to read drive temperatures and temperature limits
* for ATA drives is the SCT Command Transport feature set as specified in
* ATA8-ACS.
* It can be used to read the current drive temperature, temperature limits,
* and historic minimum and maximum temperatures. The SCT Command Transport
* feature set is documented in "AT Attachment 8 - ATA/ATAPI Command Set
* (ATA8-ACS)".
*
* If the SCT Command Transport feature set is not available, drive temperatures
* may be readable through SMART attributes. Since SMART attributes are not well
* defined, this method is only used as fallback mechanism.
*
* There are three SMART attributes which may report drive temperatures.
* Those are defined as follows (from
* http://www.cropel.com/library/smart-attribute-list.aspx).
*
* 190 Temperature Temperature, monitored by a sensor somewhere inside
* the drive. Raw value typicaly holds the actual
* temperature (hexadecimal) in its rightmost two digits.
*
* 194 Temperature Temperature, monitored by a sensor somewhere inside
* the drive. Raw value typicaly holds the actual
* temperature (hexadecimal) in its rightmost two digits.
*
* 231 Temperature Temperature, monitored by a sensor somewhere inside
* the drive. Raw value typicaly holds the actual
* temperature (hexadecimal) in its rightmost two digits.
*
* Wikipedia defines attributes a bit differently.
*
* 190 Temperature Value is equal to (100-temp. °C), allowing manufacturer
* Difference or to set a minimum threshold which corresponds to a
* Airflow maximum temperature. This also follows the convention of
* Temperature 100 being a best-case value and lower values being
* undesirable. However, some older drives may instead
* report raw Temperature (identical to 0xC2) or
* Temperature minus 50 here.
* 194 Temperature or Indicates the device temperature, if the appropriate
* Temperature sensor is fitted. Lowest byte of the raw value contains
* Celsius the exact temperature value (Celsius degrees).
* 231 Life Left Indicates the approximate SSD life left, in terms of
* (SSDs) or program/erase cycles or available reserved blocks.
* Temperature A normalized value of 100 represents a new drive, with
* a threshold value at 10 indicating a need for
* replacement. A value of 0 may mean that the drive is
* operating in read-only mode to allow data recovery.
* Previously (pre-2010) occasionally used for Drive
* Temperature (more typically reported at 0xC2).
*
* Common denominator is that the first raw byte reports the temperature
* in degrees C on almost all drives. Some drives may report a fractional
* temperature in the second raw byte.
*
* Known exceptions (from libatasmart):
* - SAMSUNG SV0412H and SAMSUNG SV1204H) report the temperature in 10th
* degrees C in the first two raw bytes.
* - A few Maxtor drives report an unknown or bad value in attribute 194.
* - Certain Apple SSD drives report an unknown value in attribute 190.
* Only certain firmware versions are affected.
*
* Those exceptions affect older ATA drives and are currently ignored.
* Also, the second raw byte (possibly reporting the fractional temperature)
* is currently ignored.
*
* Many drives also report temperature limits in additional SMART data raw
* bytes. The format of those is not well defined and varies widely.
* The driver does not currently attempt to report those limits.
*
* According to data in smartmontools, attribute 231 is rarely used to report
* drive temperatures. At the same time, several drives report SSD life left
* in attribute 231, but do not support temperature sensors. For this reason,
* attribute 231 is currently ignored.
*
* Following above definitions, temperatures are reported as follows.
* If SCT Command Transport is supported, it is used to read the
* temperature and, if available, temperature limits.
* - Otherwise, if SMART attribute 194 is supported, it is used to read
* the temperature.
* - Otherwise, if SMART attribute 190 is supported, it is used to read
* the temperature.
*/
#include <linux/ata.h>
#include <linux/bits.h>
#include <linux/device.h>
#include <linux/hwmon.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_driver.h>
#include <scsi/scsi_proto.h>
struct drivetemp_data {
struct list_head list; /* list of instantiated devices */
struct mutex lock; /* protect data buffer accesses */
struct scsi_device *sdev; /* SCSI device */
struct device *dev; /* instantiating device */
struct device *hwdev; /* hardware monitoring device */
u8 smartdata[ATA_SECT_SIZE]; /* local buffer */
int (*get_temp)(struct drivetemp_data *st, u32 attr, long *val);
bool have_temp_lowest; /* lowest temp in SCT status */
bool have_temp_highest; /* highest temp in SCT status */
bool have_temp_min; /* have min temp */
bool have_temp_max; /* have max temp */
bool have_temp_lcrit; /* have lower critical limit */
bool have_temp_crit; /* have critical limit */
int temp_min; /* min temp */
int temp_max; /* max temp */
int temp_lcrit; /* lower critical limit */
int temp_crit; /* critical limit */
};
static LIST_HEAD(drivetemp_devlist);
#define ATA_MAX_SMART_ATTRS 30
#define SMART_TEMP_PROP_190 190
#define SMART_TEMP_PROP_194 194
#define SCT_STATUS_REQ_ADDR 0xe0
#define SCT_STATUS_VERSION_LOW 0 /* log byte offsets */
#define SCT_STATUS_VERSION_HIGH 1
#define SCT_STATUS_TEMP 200
#define SCT_STATUS_TEMP_LOWEST 201
#define SCT_STATUS_TEMP_HIGHEST 202
#define SCT_READ_LOG_ADDR 0xe1
#define SMART_READ_LOG 0xd5
#define SMART_WRITE_LOG 0xd6
#define INVALID_TEMP 0x80
#define temp_is_valid(temp) ((temp) != INVALID_TEMP)
#define temp_from_sct(temp) (((s8)(temp)) * 1000)
static inline bool ata_id_smart_supported(u16 *id)
{
return id[ATA_ID_COMMAND_SET_1] & BIT(0);
}
static inline bool ata_id_smart_enabled(u16 *id)
{
return id[ATA_ID_CFS_ENABLE_1] & BIT(0);
}
static int drivetemp_scsi_command(struct drivetemp_data *st,
u8 ata_command, u8 feature,
u8 lba_low, u8 lba_mid, u8 lba_high)
{
u8 scsi_cmd[MAX_COMMAND_SIZE];
enum req_op op;
memset(scsi_cmd, 0, sizeof(scsi_cmd));
scsi_cmd[0] = ATA_16;
if (ata_command == ATA_CMD_SMART && feature == SMART_WRITE_LOG) {
scsi_cmd[1] = (5 << 1); /* PIO Data-out */
/*
* No off.line or cc, write to dev, block count in sector count
* field.
*/
scsi_cmd[2] = 0x06;
op = REQ_OP_DRV_OUT;
} else {
scsi_cmd[1] = (4 << 1); /* PIO Data-in */
/*
* No off.line or cc, read from dev, block count in sector count
* field.
*/
scsi_cmd[2] = 0x0e;
op = REQ_OP_DRV_IN;
}
scsi_cmd[4] = feature;
scsi_cmd[6] = 1; /* 1 sector */
scsi_cmd[8] = lba_low;
scsi_cmd[10] = lba_mid;
scsi_cmd[12] = lba_high;
scsi_cmd[14] = ata_command;
return scsi_execute_cmd(st->sdev, scsi_cmd, op, st->smartdata,
ATA_SECT_SIZE, HZ, 5, NULL);
}
static int drivetemp_ata_command(struct drivetemp_data *st, u8 feature,
u8 select)
{
return drivetemp_scsi_command(st, ATA_CMD_SMART, feature, select,
ATA_SMART_LBAM_PASS, ATA_SMART_LBAH_PASS);
}
static int drivetemp_get_smarttemp(struct drivetemp_data *st, u32 attr,
long *temp)
{
u8 *buf = st->smartdata;
bool have_temp = false;
u8 temp_raw;
u8 csum;
int err;
int i;
err = drivetemp_ata_command(st, ATA_SMART_READ_VALUES, 0);
if (err)
return err;
/* Checksum the read value table */
csum = 0;
for (i = 0; i < ATA_SECT_SIZE; i++)
csum += buf[i];
if (csum) {
dev_dbg(&st->sdev->sdev_gendev,
"checksum error reading SMART values\n");
return -EIO;
}
for (i = 0; i < ATA_MAX_SMART_ATTRS; i++) {
u8 *attr = buf + i * 12;
int id = attr[2];
if (!id)
continue;
if (id == SMART_TEMP_PROP_190) {
temp_raw = attr[7];
have_temp = true;
}
if (id == SMART_TEMP_PROP_194) {
temp_raw = attr[7];
have_temp = true;
break;
}
}
if (have_temp) {
*temp = temp_raw * 1000;
return 0;
}
return -ENXIO;
}
static int drivetemp_get_scttemp(struct drivetemp_data *st, u32 attr, long *val)
{
u8 *buf = st->smartdata;
int err;
err = drivetemp_ata_command(st, SMART_READ_LOG, SCT_STATUS_REQ_ADDR);
if (err)
return err;
switch (attr) {
case hwmon_temp_input:
if (!temp_is_valid(buf[SCT_STATUS_TEMP]))
return -ENODATA;
*val = temp_from_sct(buf[SCT_STATUS_TEMP]);
break;
case hwmon_temp_lowest:
if (!temp_is_valid(buf[SCT_STATUS_TEMP_LOWEST]))
return -ENODATA;
*val = temp_from_sct(buf[SCT_STATUS_TEMP_LOWEST]);
break;
case hwmon_temp_highest:
if (!temp_is_valid(buf[SCT_STATUS_TEMP_HIGHEST]))
return -ENODATA;
*val = temp_from_sct(buf[SCT_STATUS_TEMP_HIGHEST]);
break;
default:
err = -EINVAL;
break;
}
return err;
}
static const char * const sct_avoid_models[] = {
/*
* These drives will have WRITE FPDMA QUEUED command timeouts and sometimes just
* freeze until power-cycled under heavy write loads when their temperature is
* getting polled in SCT mode. The SMART mode seems to be fine, though.
*
* While only the 3 TB model (DT01ACA3) was actually caught exhibiting the
* problem let's play safe here to avoid data corruption and ban the whole
* DT01ACAx family.
* The models from this array are prefix-matched.
*/
"TOSHIBA DT01ACA",
};
static bool drivetemp_sct_avoid(struct drivetemp_data *st)
{
struct scsi_device *sdev = st->sdev;
unsigned int ctr;
if (!sdev->model)
return false;
/*
* The "model" field contains just the raw SCSI INQUIRY response
* "product identification" field, which has a width of 16 bytes.
* This field is space-filled, but is NOT NULL-terminated.
*/
for (ctr = 0; ctr < ARRAY_SIZE(sct_avoid_models); ctr++)
if (!strncmp(sdev->model, sct_avoid_models[ctr],
strlen(sct_avoid_models[ctr])))
return true;
return false;
}
static int drivetemp_identify_sata(struct drivetemp_data *st)
{
struct scsi_device *sdev = st->sdev;
u8 *buf = st->smartdata;
struct scsi_vpd *vpd;
bool is_ata, is_sata;
bool have_sct_data_table;
bool have_sct_temp;
bool have_smart;
bool have_sct;
u16 *ata_id;
u16 version;
long temp;
int err;
/* SCSI-ATA Translation present? */
rcu_read_lock();
vpd = rcu_dereference(sdev->vpd_pg89);
/*
* Verify that ATA IDENTIFY DEVICE data is included in ATA Information
* VPD and that the drive implements the SATA protocol.
*/
if (!vpd || vpd->len < 572 || vpd->data[56] != ATA_CMD_ID_ATA ||
vpd->data[36] != 0x34) {
rcu_read_unlock();
return -ENODEV;
}
ata_id = (u16 *)&vpd->data[60];
is_ata = ata_id_is_ata(ata_id);
is_sata = ata_id_is_sata(ata_id);
have_sct = ata_id_sct_supported(ata_id);
have_sct_data_table = ata_id_sct_data_tables(ata_id);
have_smart = ata_id_smart_supported(ata_id) &&
ata_id_smart_enabled(ata_id);
rcu_read_unlock();
/* bail out if this is not a SATA device */
if (!is_ata || !is_sata)
return -ENODEV;
if (have_sct && drivetemp_sct_avoid(st)) {
dev_notice(&sdev->sdev_gendev,
"will avoid using SCT for temperature monitoring\n");
have_sct = false;
}
if (!have_sct)
goto skip_sct;
err = drivetemp_ata_command(st, SMART_READ_LOG, SCT_STATUS_REQ_ADDR);
if (err)
goto skip_sct;
version = (buf[SCT_STATUS_VERSION_HIGH] << 8) |
buf[SCT_STATUS_VERSION_LOW];
if (version != 2 && version != 3)
goto skip_sct;
have_sct_temp = temp_is_valid(buf[SCT_STATUS_TEMP]);
if (!have_sct_temp)
goto skip_sct;
st->have_temp_lowest = temp_is_valid(buf[SCT_STATUS_TEMP_LOWEST]);
st->have_temp_highest = temp_is_valid(buf[SCT_STATUS_TEMP_HIGHEST]);
if (!have_sct_data_table)
goto skip_sct_data;
/* Request and read temperature history table */
memset(buf, '\0', sizeof(st->smartdata));
buf[0] = 5; /* data table command */
buf[2] = 1; /* read table */
buf[4] = 2; /* temperature history table */
err = drivetemp_ata_command(st, SMART_WRITE_LOG, SCT_STATUS_REQ_ADDR);
if (err)
goto skip_sct_data;
err = drivetemp_ata_command(st, SMART_READ_LOG, SCT_READ_LOG_ADDR);
if (err)
goto skip_sct_data;
/*
* Temperature limits per AT Attachment 8 -
* ATA/ATAPI Command Set (ATA8-ACS)
*/
st->have_temp_max = temp_is_valid(buf[6]);
st->have_temp_crit = temp_is_valid(buf[7]);
st->have_temp_min = temp_is_valid(buf[8]);
st->have_temp_lcrit = temp_is_valid(buf[9]);
st->temp_max = temp_from_sct(buf[6]);
st->temp_crit = temp_from_sct(buf[7]);
st->temp_min = temp_from_sct(buf[8]);
st->temp_lcrit = temp_from_sct(buf[9]);
skip_sct_data:
if (have_sct_temp) {
st->get_temp = drivetemp_get_scttemp;
return 0;
}
skip_sct:
if (!have_smart)
return -ENODEV;
st->get_temp = drivetemp_get_smarttemp;
return drivetemp_get_smarttemp(st, hwmon_temp_input, &temp);
}
static int drivetemp_identify(struct drivetemp_data *st)
{
struct scsi_device *sdev = st->sdev;
/* Bail out immediately if there is no inquiry data */
if (!sdev->inquiry || sdev->inquiry_len < 16)
return -ENODEV;
/* Disk device? */
if (sdev->type != TYPE_DISK && sdev->type != TYPE_ZBC)
return -ENODEV;
return drivetemp_identify_sata(st);
}
static int drivetemp_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct drivetemp_data *st = dev_get_drvdata(dev);
int err = 0;
if (type != hwmon_temp)
return -EINVAL;
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_lowest:
case hwmon_temp_highest:
mutex_lock(&st->lock);
err = st->get_temp(st, attr, val);
mutex_unlock(&st->lock);
break;
case hwmon_temp_lcrit:
*val = st->temp_lcrit;
break;
case hwmon_temp_min:
*val = st->temp_min;
break;
case hwmon_temp_max:
*val = st->temp_max;
break;
case hwmon_temp_crit:
*val = st->temp_crit;
break;
default:
err = -EINVAL;
break;
}
return err;
}
static umode_t drivetemp_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct drivetemp_data *st = data;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
return 0444;
case hwmon_temp_lowest:
if (st->have_temp_lowest)
return 0444;
break;
case hwmon_temp_highest:
if (st->have_temp_highest)
return 0444;
break;
case hwmon_temp_min:
if (st->have_temp_min)
return 0444;
break;
case hwmon_temp_max:
if (st->have_temp_max)
return 0444;
break;
case hwmon_temp_lcrit:
if (st->have_temp_lcrit)
return 0444;
break;
case hwmon_temp_crit:
if (st->have_temp_crit)
return 0444;
break;
default:
break;
}
break;
default:
break;
}
return 0;
}
static const struct hwmon_channel_info * const drivetemp_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT |
HWMON_T_LOWEST | HWMON_T_HIGHEST |
HWMON_T_MIN | HWMON_T_MAX |
HWMON_T_LCRIT | HWMON_T_CRIT),
NULL
};
static const struct hwmon_ops drivetemp_ops = {
.is_visible = drivetemp_is_visible,
.read = drivetemp_read,
};
static const struct hwmon_chip_info drivetemp_chip_info = {
.ops = &drivetemp_ops,
.info = drivetemp_info,
};
/*
* The device argument points to sdev->sdev_dev. Its parent is
* sdev->sdev_gendev, which we can use to get the scsi_device pointer.
*/
static int drivetemp_add(struct device *dev)
{
struct scsi_device *sdev = to_scsi_device(dev->parent);
struct drivetemp_data *st;
int err;
st = kzalloc(sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
st->sdev = sdev;
st->dev = dev;
mutex_init(&st->lock);
if (drivetemp_identify(st)) {
err = -ENODEV;
goto abort;
}
st->hwdev = hwmon_device_register_with_info(dev->parent, "drivetemp",
st, &drivetemp_chip_info,
NULL);
if (IS_ERR(st->hwdev)) {
err = PTR_ERR(st->hwdev);
goto abort;
}
list_add(&st->list, &drivetemp_devlist);
return 0;
abort:
kfree(st);
return err;
}
static void drivetemp_remove(struct device *dev)
{
struct drivetemp_data *st, *tmp;
list_for_each_entry_safe(st, tmp, &drivetemp_devlist, list) {
if (st->dev == dev) {
list_del(&st->list);
hwmon_device_unregister(st->hwdev);
kfree(st);
break;
}
}
}
static struct class_interface drivetemp_interface = {
.add_dev = drivetemp_add,
.remove_dev = drivetemp_remove,
};
static int __init drivetemp_init(void)
{
return scsi_register_interface(&drivetemp_interface);
}
static void __exit drivetemp_exit(void)
{
scsi_unregister_interface(&drivetemp_interface);
}
module_init(drivetemp_init);
module_exit(drivetemp_exit);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("Hard drive temperature monitor");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:drivetemp");
|
linux-master
|
drivers/hwmon/drivetemp.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Texas Instruments / National Semiconductor LM95234
*
* Copyright (c) 2013, 2014 Guenter Roeck <[email protected]>
*
* Derived from lm95241.c
* Copyright (C) 2008, 2010 Davide Rizzo <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#define DRVNAME "lm95234"
enum chips { lm95233, lm95234 };
static const unsigned short normal_i2c[] = {
0x18, 0x2a, 0x2b, 0x4d, 0x4e, I2C_CLIENT_END };
/* LM95234 registers */
#define LM95234_REG_MAN_ID 0xFE
#define LM95234_REG_CHIP_ID 0xFF
#define LM95234_REG_STATUS 0x02
#define LM95234_REG_CONFIG 0x03
#define LM95234_REG_CONVRATE 0x04
#define LM95234_REG_STS_FAULT 0x07
#define LM95234_REG_STS_TCRIT1 0x08
#define LM95234_REG_STS_TCRIT2 0x09
#define LM95234_REG_TEMPH(x) ((x) + 0x10)
#define LM95234_REG_TEMPL(x) ((x) + 0x20)
#define LM95234_REG_UTEMPH(x) ((x) + 0x19) /* Remote only */
#define LM95234_REG_UTEMPL(x) ((x) + 0x29)
#define LM95234_REG_REM_MODEL 0x30
#define LM95234_REG_REM_MODEL_STS 0x38
#define LM95234_REG_OFFSET(x) ((x) + 0x31) /* Remote only */
#define LM95234_REG_TCRIT1(x) ((x) + 0x40)
#define LM95234_REG_TCRIT2(x) ((x) + 0x49) /* Remote channel 1,2 */
#define LM95234_REG_TCRIT_HYST 0x5a
#define NATSEMI_MAN_ID 0x01
#define LM95233_CHIP_ID 0x89
#define LM95234_CHIP_ID 0x79
/* Client data (each client gets its own) */
struct lm95234_data {
struct i2c_client *client;
const struct attribute_group *groups[3];
struct mutex update_lock;
unsigned long last_updated, interval; /* in jiffies */
bool valid; /* false until following fields are valid */
/* registers values */
int temp[5]; /* temperature (signed) */
u32 status; /* fault/alarm status */
u8 tcrit1[5]; /* critical temperature limit */
u8 tcrit2[2]; /* high temperature limit */
s8 toffset[4]; /* remote temperature offset */
u8 thyst; /* common hysteresis */
u8 sensor_type; /* temperature sensor type */
};
static int lm95234_read_temp(struct i2c_client *client, int index, int *t)
{
int val;
u16 temp = 0;
if (index) {
val = i2c_smbus_read_byte_data(client,
LM95234_REG_UTEMPH(index - 1));
if (val < 0)
return val;
temp = val << 8;
val = i2c_smbus_read_byte_data(client,
LM95234_REG_UTEMPL(index - 1));
if (val < 0)
return val;
temp |= val;
*t = temp;
}
/*
* Read signed temperature if unsigned temperature is 0,
* or if this is the local sensor.
*/
if (!temp) {
val = i2c_smbus_read_byte_data(client,
LM95234_REG_TEMPH(index));
if (val < 0)
return val;
temp = val << 8;
val = i2c_smbus_read_byte_data(client,
LM95234_REG_TEMPL(index));
if (val < 0)
return val;
temp |= val;
*t = (s16)temp;
}
return 0;
}
static u16 update_intervals[] = { 143, 364, 1000, 2500 };
/* Fill value cache. Must be called with update lock held. */
static int lm95234_fill_cache(struct lm95234_data *data,
struct i2c_client *client)
{
int i, ret;
ret = i2c_smbus_read_byte_data(client, LM95234_REG_CONVRATE);
if (ret < 0)
return ret;
data->interval = msecs_to_jiffies(update_intervals[ret & 0x03]);
for (i = 0; i < ARRAY_SIZE(data->tcrit1); i++) {
ret = i2c_smbus_read_byte_data(client, LM95234_REG_TCRIT1(i));
if (ret < 0)
return ret;
data->tcrit1[i] = ret;
}
for (i = 0; i < ARRAY_SIZE(data->tcrit2); i++) {
ret = i2c_smbus_read_byte_data(client, LM95234_REG_TCRIT2(i));
if (ret < 0)
return ret;
data->tcrit2[i] = ret;
}
for (i = 0; i < ARRAY_SIZE(data->toffset); i++) {
ret = i2c_smbus_read_byte_data(client, LM95234_REG_OFFSET(i));
if (ret < 0)
return ret;
data->toffset[i] = ret;
}
ret = i2c_smbus_read_byte_data(client, LM95234_REG_TCRIT_HYST);
if (ret < 0)
return ret;
data->thyst = ret;
ret = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL);
if (ret < 0)
return ret;
data->sensor_type = ret;
return 0;
}
static int lm95234_update_device(struct lm95234_data *data)
{
struct i2c_client *client = data->client;
int ret;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + data->interval) ||
!data->valid) {
int i;
if (!data->valid) {
ret = lm95234_fill_cache(data, client);
if (ret < 0)
goto abort;
}
data->valid = false;
for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
ret = lm95234_read_temp(client, i, &data->temp[i]);
if (ret < 0)
goto abort;
}
ret = i2c_smbus_read_byte_data(client, LM95234_REG_STS_FAULT);
if (ret < 0)
goto abort;
data->status = ret;
ret = i2c_smbus_read_byte_data(client, LM95234_REG_STS_TCRIT1);
if (ret < 0)
goto abort;
data->status |= ret << 8;
ret = i2c_smbus_read_byte_data(client, LM95234_REG_STS_TCRIT2);
if (ret < 0)
goto abort;
data->status |= ret << 16;
data->last_updated = jiffies;
data->valid = true;
}
ret = 0;
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
return sprintf(buf, "%d\n",
DIV_ROUND_CLOSEST(data->temp[index] * 125, 32));
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
u32 mask = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
return sprintf(buf, "%u", !!(data->status & mask));
}
static ssize_t type_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
u8 mask = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
return sprintf(buf, data->sensor_type & mask ? "1\n" : "2\n");
}
static ssize_t type_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm95234_data *data = dev_get_drvdata(dev);
unsigned long val;
u8 mask = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
ret = kstrtoul(buf, 10, &val);
if (ret < 0)
return ret;
if (val != 1 && val != 2)
return -EINVAL;
mutex_lock(&data->update_lock);
if (val == 1)
data->sensor_type |= mask;
else
data->sensor_type &= ~mask;
data->valid = false;
i2c_smbus_write_byte_data(data->client, LM95234_REG_REM_MODEL,
data->sensor_type);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t tcrit2_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
return sprintf(buf, "%u", data->tcrit2[index] * 1000);
}
static ssize_t tcrit2_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
long val;
int ret = lm95234_update_device(data);
if (ret)
return ret;
ret = kstrtol(buf, 10, &val);
if (ret < 0)
return ret;
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, index ? 255 : 127);
mutex_lock(&data->update_lock);
data->tcrit2[index] = val;
i2c_smbus_write_byte_data(data->client, LM95234_REG_TCRIT2(index), val);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t tcrit2_hyst_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
/* Result can be negative, so be careful with unsigned operands */
return sprintf(buf, "%d",
((int)data->tcrit2[index] - (int)data->thyst) * 1000);
}
static ssize_t tcrit1_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u", data->tcrit1[index] * 1000);
}
static ssize_t tcrit1_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
long val;
if (ret)
return ret;
ret = kstrtol(buf, 10, &val);
if (ret < 0)
return ret;
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
mutex_lock(&data->update_lock);
data->tcrit1[index] = val;
i2c_smbus_write_byte_data(data->client, LM95234_REG_TCRIT1(index), val);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t tcrit1_hyst_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
/* Result can be negative, so be careful with unsigned operands */
return sprintf(buf, "%d",
((int)data->tcrit1[index] - (int)data->thyst) * 1000);
}
static ssize_t tcrit1_hyst_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
long val;
if (ret)
return ret;
ret = kstrtol(buf, 10, &val);
if (ret < 0)
return ret;
val = DIV_ROUND_CLOSEST(val, 1000);
val = clamp_val((int)data->tcrit1[index] - val, 0, 31);
mutex_lock(&data->update_lock);
data->thyst = val;
i2c_smbus_write_byte_data(data->client, LM95234_REG_TCRIT_HYST, val);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t offset_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
if (ret)
return ret;
return sprintf(buf, "%d", data->toffset[index] * 500);
}
static ssize_t offset_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
int ret = lm95234_update_device(data);
long val;
if (ret)
return ret;
ret = kstrtol(buf, 10, &val);
if (ret < 0)
return ret;
/* Accuracy is 1/2 degrees C */
val = clamp_val(DIV_ROUND_CLOSEST(val, 500), -128, 127);
mutex_lock(&data->update_lock);
data->toffset[index] = val;
i2c_smbus_write_byte_data(data->client, LM95234_REG_OFFSET(index), val);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t update_interval_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int ret = lm95234_update_device(data);
if (ret)
return ret;
return sprintf(buf, "%lu\n",
DIV_ROUND_CLOSEST(data->interval * 1000, HZ));
}
static ssize_t update_interval_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm95234_data *data = dev_get_drvdata(dev);
int ret = lm95234_update_device(data);
unsigned long val;
u8 regval;
if (ret)
return ret;
ret = kstrtoul(buf, 10, &val);
if (ret < 0)
return ret;
for (regval = 0; regval < 3; regval++) {
if (val <= update_intervals[regval])
break;
}
mutex_lock(&data->update_lock);
data->interval = msecs_to_jiffies(update_intervals[regval]);
i2c_smbus_write_byte_data(data->client, LM95234_REG_CONVRATE, regval);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RO(temp4_input, temp, 3);
static SENSOR_DEVICE_ATTR_RO(temp5_input, temp, 4);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, BIT(0) | BIT(1));
static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, BIT(2) | BIT(3));
static SENSOR_DEVICE_ATTR_RO(temp4_fault, alarm, BIT(4) | BIT(5));
static SENSOR_DEVICE_ATTR_RO(temp5_fault, alarm, BIT(6) | BIT(7));
static SENSOR_DEVICE_ATTR_RW(temp2_type, type, BIT(1));
static SENSOR_DEVICE_ATTR_RW(temp3_type, type, BIT(2));
static SENSOR_DEVICE_ATTR_RW(temp4_type, type, BIT(3));
static SENSOR_DEVICE_ATTR_RW(temp5_type, type, BIT(4));
static SENSOR_DEVICE_ATTR_RW(temp1_max, tcrit1, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_max, tcrit2, 0);
static SENSOR_DEVICE_ATTR_RW(temp3_max, tcrit2, 1);
static SENSOR_DEVICE_ATTR_RW(temp4_max, tcrit1, 3);
static SENSOR_DEVICE_ATTR_RW(temp5_max, tcrit1, 4);
static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, tcrit1_hyst, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_max_hyst, tcrit2_hyst, 0);
static SENSOR_DEVICE_ATTR_RO(temp3_max_hyst, tcrit2_hyst, 1);
static SENSOR_DEVICE_ATTR_RO(temp4_max_hyst, tcrit1_hyst, 3);
static SENSOR_DEVICE_ATTR_RO(temp5_max_hyst, tcrit1_hyst, 4);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, BIT(0 + 8));
static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, alarm, BIT(1 + 16));
static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, alarm, BIT(2 + 16));
static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, alarm, BIT(3 + 8));
static SENSOR_DEVICE_ATTR_RO(temp5_max_alarm, alarm, BIT(4 + 8));
static SENSOR_DEVICE_ATTR_RW(temp2_crit, tcrit1, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_crit, tcrit1, 2);
static SENSOR_DEVICE_ATTR_RO(temp2_crit_hyst, tcrit1_hyst, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_crit_hyst, tcrit1_hyst, 2);
static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, BIT(1 + 8));
static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, alarm, BIT(2 + 8));
static SENSOR_DEVICE_ATTR_RW(temp2_offset, offset, 0);
static SENSOR_DEVICE_ATTR_RW(temp3_offset, offset, 1);
static SENSOR_DEVICE_ATTR_RW(temp4_offset, offset, 2);
static SENSOR_DEVICE_ATTR_RW(temp5_offset, offset, 3);
static DEVICE_ATTR_RW(update_interval);
static struct attribute *lm95234_common_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_temp2_type.dev_attr.attr,
&sensor_dev_attr_temp3_type.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp3_crit.dev_attr.attr,
&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
&dev_attr_update_interval.attr,
NULL
};
static const struct attribute_group lm95234_common_group = {
.attrs = lm95234_common_attrs,
};
static struct attribute *lm95234_attrs[] = {
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_temp5_input.dev_attr.attr,
&sensor_dev_attr_temp4_fault.dev_attr.attr,
&sensor_dev_attr_temp5_fault.dev_attr.attr,
&sensor_dev_attr_temp4_type.dev_attr.attr,
&sensor_dev_attr_temp5_type.dev_attr.attr,
&sensor_dev_attr_temp4_max.dev_attr.attr,
&sensor_dev_attr_temp5_max.dev_attr.attr,
&sensor_dev_attr_temp4_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp5_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_offset.dev_attr.attr,
&sensor_dev_attr_temp5_offset.dev_attr.attr,
NULL
};
static const struct attribute_group lm95234_group = {
.attrs = lm95234_attrs,
};
static int lm95234_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int address = client->addr;
u8 config_mask, model_mask;
int mfg_id, chip_id, val;
const char *name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
mfg_id = i2c_smbus_read_byte_data(client, LM95234_REG_MAN_ID);
if (mfg_id != NATSEMI_MAN_ID)
return -ENODEV;
chip_id = i2c_smbus_read_byte_data(client, LM95234_REG_CHIP_ID);
switch (chip_id) {
case LM95233_CHIP_ID:
if (address != 0x18 && address != 0x2a && address != 0x2b)
return -ENODEV;
config_mask = 0xbf;
model_mask = 0xf9;
name = "lm95233";
break;
case LM95234_CHIP_ID:
if (address != 0x18 && address != 0x4d && address != 0x4e)
return -ENODEV;
config_mask = 0xbc;
model_mask = 0xe1;
name = "lm95234";
break;
default:
return -ENODEV;
}
val = i2c_smbus_read_byte_data(client, LM95234_REG_STATUS);
if (val & 0x30)
return -ENODEV;
val = i2c_smbus_read_byte_data(client, LM95234_REG_CONFIG);
if (val & config_mask)
return -ENODEV;
val = i2c_smbus_read_byte_data(client, LM95234_REG_CONVRATE);
if (val & 0xfc)
return -ENODEV;
val = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL);
if (val & model_mask)
return -ENODEV;
val = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL_STS);
if (val & model_mask)
return -ENODEV;
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static int lm95234_init_client(struct i2c_client *client)
{
int val, model;
/* start conversion if necessary */
val = i2c_smbus_read_byte_data(client, LM95234_REG_CONFIG);
if (val < 0)
return val;
if (val & 0x40)
i2c_smbus_write_byte_data(client, LM95234_REG_CONFIG,
val & ~0x40);
/* If diode type status reports an error, try to fix it */
val = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL_STS);
if (val < 0)
return val;
model = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL);
if (model < 0)
return model;
if (model & val) {
dev_notice(&client->dev,
"Fixing remote diode type misconfiguration (0x%x)\n",
val);
i2c_smbus_write_byte_data(client, LM95234_REG_REM_MODEL,
model & ~val);
}
return 0;
}
static const struct i2c_device_id lm95234_id[];
static int lm95234_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct lm95234_data *data;
struct device *hwmon_dev;
int err;
data = devm_kzalloc(dev, sizeof(struct lm95234_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Initialize the LM95234 chip */
err = lm95234_init_client(client);
if (err < 0)
return err;
data->groups[0] = &lm95234_common_group;
if (i2c_match_id(lm95234_id, client)->driver_data == lm95234)
data->groups[1] = &lm95234_group;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/* Driver data (common to all clients) */
static const struct i2c_device_id lm95234_id[] = {
{ "lm95233", lm95233 },
{ "lm95234", lm95234 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm95234_id);
static struct i2c_driver lm95234_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = DRVNAME,
},
.probe = lm95234_probe,
.id_table = lm95234_id,
.detect = lm95234_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm95234_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("LM95233/LM95234 sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm95234.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* drivers/hwmon/applesmc.c - driver for Apple's SMC (accelerometer, temperature
* sensors, fan control, keyboard backlight control) used in Intel-based Apple
* computers.
*
* Copyright (C) 2007 Nicolas Boichat <[email protected]>
* Copyright (C) 2010 Henrik Rydberg <[email protected]>
*
* Based on hdaps.c driver:
* Copyright (C) 2005 Robert Love <[email protected]>
* Copyright (C) 2005 Jesper Juhl <[email protected]>
*
* Fan control based on smcFanControl:
* Copyright (C) 2006 Hendrik Holtmann <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/timer.h>
#include <linux/dmi.h>
#include <linux/mutex.h>
#include <linux/hwmon-sysfs.h>
#include <linux/io.h>
#include <linux/leds.h>
#include <linux/hwmon.h>
#include <linux/workqueue.h>
#include <linux/err.h>
#include <linux/bits.h>
/* data port used by Apple SMC */
#define APPLESMC_DATA_PORT 0x300
/* command/status port used by Apple SMC */
#define APPLESMC_CMD_PORT 0x304
#define APPLESMC_NR_PORTS 32 /* 0x300-0x31f */
#define APPLESMC_MAX_DATA_LENGTH 32
/* Apple SMC status bits */
#define SMC_STATUS_AWAITING_DATA BIT(0) /* SMC has data waiting to be read */
#define SMC_STATUS_IB_CLOSED BIT(1) /* Will ignore any input */
#define SMC_STATUS_BUSY BIT(2) /* Command in progress */
/* Initial wait is 8us */
#define APPLESMC_MIN_WAIT 0x0008
#define APPLESMC_READ_CMD 0x10
#define APPLESMC_WRITE_CMD 0x11
#define APPLESMC_GET_KEY_BY_INDEX_CMD 0x12
#define APPLESMC_GET_KEY_TYPE_CMD 0x13
#define KEY_COUNT_KEY "#KEY" /* r-o ui32 */
#define LIGHT_SENSOR_LEFT_KEY "ALV0" /* r-o {alv (6-10 bytes) */
#define LIGHT_SENSOR_RIGHT_KEY "ALV1" /* r-o {alv (6-10 bytes) */
#define BACKLIGHT_KEY "LKSB" /* w-o {lkb (2 bytes) */
#define CLAMSHELL_KEY "MSLD" /* r-o ui8 (unused) */
#define MOTION_SENSOR_X_KEY "MO_X" /* r-o sp78 (2 bytes) */
#define MOTION_SENSOR_Y_KEY "MO_Y" /* r-o sp78 (2 bytes) */
#define MOTION_SENSOR_Z_KEY "MO_Z" /* r-o sp78 (2 bytes) */
#define MOTION_SENSOR_KEY "MOCN" /* r/w ui16 */
#define FANS_COUNT "FNum" /* r-o ui8 */
#define FANS_MANUAL "FS! " /* r-w ui16 */
#define FAN_ID_FMT "F%dID" /* r-o char[16] */
#define TEMP_SENSOR_TYPE "sp78"
/* List of keys used to read/write fan speeds */
static const char *const fan_speed_fmt[] = {
"F%dAc", /* actual speed */
"F%dMn", /* minimum speed (rw) */
"F%dMx", /* maximum speed */
"F%dSf", /* safe speed - not all models */
"F%dTg", /* target speed (manual: rw) */
};
#define INIT_TIMEOUT_MSECS 5000 /* wait up to 5s for device init ... */
#define INIT_WAIT_MSECS 50 /* ... in 50ms increments */
#define APPLESMC_POLL_INTERVAL 50 /* msecs */
#define APPLESMC_INPUT_FUZZ 4 /* input event threshold */
#define APPLESMC_INPUT_FLAT 4
#define to_index(attr) (to_sensor_dev_attr(attr)->index & 0xffff)
#define to_option(attr) (to_sensor_dev_attr(attr)->index >> 16)
/* Dynamic device node attributes */
struct applesmc_dev_attr {
struct sensor_device_attribute sda; /* hwmon attributes */
char name[32]; /* room for node file name */
};
/* Dynamic device node group */
struct applesmc_node_group {
char *format; /* format string */
void *show; /* show function */
void *store; /* store function */
int option; /* function argument */
struct applesmc_dev_attr *nodes; /* dynamic node array */
};
/* AppleSMC entry - cached register information */
struct applesmc_entry {
char key[5]; /* four-letter key code */
u8 valid; /* set when entry is successfully read once */
u8 len; /* bounded by APPLESMC_MAX_DATA_LENGTH */
char type[5]; /* four-letter type code */
u8 flags; /* 0x10: func; 0x40: write; 0x80: read */
};
/* Register lookup and registers common to all SMCs */
static struct applesmc_registers {
struct mutex mutex; /* register read/write mutex */
unsigned int key_count; /* number of SMC registers */
unsigned int fan_count; /* number of fans */
unsigned int temp_count; /* number of temperature registers */
unsigned int temp_begin; /* temperature lower index bound */
unsigned int temp_end; /* temperature upper index bound */
unsigned int index_count; /* size of temperature index array */
int num_light_sensors; /* number of light sensors */
bool has_accelerometer; /* has motion sensor */
bool has_key_backlight; /* has keyboard backlight */
bool init_complete; /* true when fully initialized */
struct applesmc_entry *cache; /* cached key entries */
const char **index; /* temperature key index */
} smcreg = {
.mutex = __MUTEX_INITIALIZER(smcreg.mutex),
};
static const int debug;
static struct platform_device *pdev;
static s16 rest_x;
static s16 rest_y;
static u8 backlight_state[2];
static struct device *hwmon_dev;
static struct input_dev *applesmc_idev;
/*
* Last index written to key_at_index sysfs file, and value to use for all other
* key_at_index_* sysfs files.
*/
static unsigned int key_at_index;
static struct workqueue_struct *applesmc_led_wq;
/*
* Wait for specific status bits with a mask on the SMC.
* Used before all transactions.
* This does 10 fast loops of 8us then exponentially backs off for a
* minimum total wait of 262ms. Depending on usleep_range this could
* run out past 500ms.
*/
static int wait_status(u8 val, u8 mask)
{
u8 status;
int us;
int i;
us = APPLESMC_MIN_WAIT;
for (i = 0; i < 24 ; i++) {
status = inb(APPLESMC_CMD_PORT);
if ((status & mask) == val)
return 0;
usleep_range(us, us * 2);
if (i > 9)
us <<= 1;
}
return -EIO;
}
/* send_byte - Write to SMC data port. Callers must hold applesmc_lock. */
static int send_byte(u8 cmd, u16 port)
{
int status;
status = wait_status(0, SMC_STATUS_IB_CLOSED);
if (status)
return status;
/*
* This needs to be a separate read looking for bit 0x04
* after bit 0x02 falls. If consolidated with the wait above
* this extra read may not happen if status returns both
* simultaneously and this would appear to be required.
*/
status = wait_status(SMC_STATUS_BUSY, SMC_STATUS_BUSY);
if (status)
return status;
outb(cmd, port);
return 0;
}
/* send_command - Write a command to the SMC. Callers must hold applesmc_lock. */
static int send_command(u8 cmd)
{
int ret;
ret = wait_status(0, SMC_STATUS_IB_CLOSED);
if (ret)
return ret;
outb(cmd, APPLESMC_CMD_PORT);
return 0;
}
/*
* Based on logic from the Apple driver. This is issued before any interaction
* If busy is stuck high, issue a read command to reset the SMC state machine.
* If busy is stuck high after the command then the SMC is jammed.
*/
static int smc_sane(void)
{
int ret;
ret = wait_status(0, SMC_STATUS_BUSY);
if (!ret)
return ret;
ret = send_command(APPLESMC_READ_CMD);
if (ret)
return ret;
return wait_status(0, SMC_STATUS_BUSY);
}
static int send_argument(const char *key)
{
int i;
for (i = 0; i < 4; i++)
if (send_byte(key[i], APPLESMC_DATA_PORT))
return -EIO;
return 0;
}
static int read_smc(u8 cmd, const char *key, u8 *buffer, u8 len)
{
u8 status, data = 0;
int i;
int ret;
ret = smc_sane();
if (ret)
return ret;
if (send_command(cmd) || send_argument(key)) {
pr_warn("%.4s: read arg fail\n", key);
return -EIO;
}
/* This has no effect on newer (2012) SMCs */
if (send_byte(len, APPLESMC_DATA_PORT)) {
pr_warn("%.4s: read len fail\n", key);
return -EIO;
}
for (i = 0; i < len; i++) {
if (wait_status(SMC_STATUS_AWAITING_DATA | SMC_STATUS_BUSY,
SMC_STATUS_AWAITING_DATA | SMC_STATUS_BUSY)) {
pr_warn("%.4s: read data[%d] fail\n", key, i);
return -EIO;
}
buffer[i] = inb(APPLESMC_DATA_PORT);
}
/* Read the data port until bit0 is cleared */
for (i = 0; i < 16; i++) {
udelay(APPLESMC_MIN_WAIT);
status = inb(APPLESMC_CMD_PORT);
if (!(status & SMC_STATUS_AWAITING_DATA))
break;
data = inb(APPLESMC_DATA_PORT);
}
if (i)
pr_warn("flushed %d bytes, last value is: %d\n", i, data);
return wait_status(0, SMC_STATUS_BUSY);
}
static int write_smc(u8 cmd, const char *key, const u8 *buffer, u8 len)
{
int i;
int ret;
ret = smc_sane();
if (ret)
return ret;
if (send_command(cmd) || send_argument(key)) {
pr_warn("%s: write arg fail\n", key);
return -EIO;
}
if (send_byte(len, APPLESMC_DATA_PORT)) {
pr_warn("%.4s: write len fail\n", key);
return -EIO;
}
for (i = 0; i < len; i++) {
if (send_byte(buffer[i], APPLESMC_DATA_PORT)) {
pr_warn("%s: write data fail\n", key);
return -EIO;
}
}
return wait_status(0, SMC_STATUS_BUSY);
}
static int read_register_count(unsigned int *count)
{
__be32 be;
int ret;
ret = read_smc(APPLESMC_READ_CMD, KEY_COUNT_KEY, (u8 *)&be, 4);
if (ret)
return ret;
*count = be32_to_cpu(be);
return 0;
}
/*
* Serialized I/O
*
* Returns zero on success or a negative error on failure.
* All functions below are concurrency safe - callers should NOT hold lock.
*/
static int applesmc_read_entry(const struct applesmc_entry *entry,
u8 *buf, u8 len)
{
int ret;
if (entry->len != len)
return -EINVAL;
mutex_lock(&smcreg.mutex);
ret = read_smc(APPLESMC_READ_CMD, entry->key, buf, len);
mutex_unlock(&smcreg.mutex);
return ret;
}
static int applesmc_write_entry(const struct applesmc_entry *entry,
const u8 *buf, u8 len)
{
int ret;
if (entry->len != len)
return -EINVAL;
mutex_lock(&smcreg.mutex);
ret = write_smc(APPLESMC_WRITE_CMD, entry->key, buf, len);
mutex_unlock(&smcreg.mutex);
return ret;
}
static const struct applesmc_entry *applesmc_get_entry_by_index(int index)
{
struct applesmc_entry *cache = &smcreg.cache[index];
u8 key[4], info[6];
__be32 be;
int ret = 0;
if (cache->valid)
return cache;
mutex_lock(&smcreg.mutex);
if (cache->valid)
goto out;
be = cpu_to_be32(index);
ret = read_smc(APPLESMC_GET_KEY_BY_INDEX_CMD, (u8 *)&be, key, 4);
if (ret)
goto out;
ret = read_smc(APPLESMC_GET_KEY_TYPE_CMD, key, info, 6);
if (ret)
goto out;
memcpy(cache->key, key, 4);
cache->len = info[0];
memcpy(cache->type, &info[1], 4);
cache->flags = info[5];
cache->valid = true;
out:
mutex_unlock(&smcreg.mutex);
if (ret)
return ERR_PTR(ret);
return cache;
}
static int applesmc_get_lower_bound(unsigned int *lo, const char *key)
{
int begin = 0, end = smcreg.key_count;
const struct applesmc_entry *entry;
while (begin != end) {
int middle = begin + (end - begin) / 2;
entry = applesmc_get_entry_by_index(middle);
if (IS_ERR(entry)) {
*lo = 0;
return PTR_ERR(entry);
}
if (strcmp(entry->key, key) < 0)
begin = middle + 1;
else
end = middle;
}
*lo = begin;
return 0;
}
static int applesmc_get_upper_bound(unsigned int *hi, const char *key)
{
int begin = 0, end = smcreg.key_count;
const struct applesmc_entry *entry;
while (begin != end) {
int middle = begin + (end - begin) / 2;
entry = applesmc_get_entry_by_index(middle);
if (IS_ERR(entry)) {
*hi = smcreg.key_count;
return PTR_ERR(entry);
}
if (strcmp(key, entry->key) < 0)
end = middle;
else
begin = middle + 1;
}
*hi = begin;
return 0;
}
static const struct applesmc_entry *applesmc_get_entry_by_key(const char *key)
{
int begin, end;
int ret;
ret = applesmc_get_lower_bound(&begin, key);
if (ret)
return ERR_PTR(ret);
ret = applesmc_get_upper_bound(&end, key);
if (ret)
return ERR_PTR(ret);
if (end - begin != 1)
return ERR_PTR(-EINVAL);
return applesmc_get_entry_by_index(begin);
}
static int applesmc_read_key(const char *key, u8 *buffer, u8 len)
{
const struct applesmc_entry *entry;
entry = applesmc_get_entry_by_key(key);
if (IS_ERR(entry))
return PTR_ERR(entry);
return applesmc_read_entry(entry, buffer, len);
}
static int applesmc_write_key(const char *key, const u8 *buffer, u8 len)
{
const struct applesmc_entry *entry;
entry = applesmc_get_entry_by_key(key);
if (IS_ERR(entry))
return PTR_ERR(entry);
return applesmc_write_entry(entry, buffer, len);
}
static int applesmc_has_key(const char *key, bool *value)
{
const struct applesmc_entry *entry;
entry = applesmc_get_entry_by_key(key);
if (IS_ERR(entry) && PTR_ERR(entry) != -EINVAL)
return PTR_ERR(entry);
*value = !IS_ERR(entry);
return 0;
}
/*
* applesmc_read_s16 - Read 16-bit signed big endian register
*/
static int applesmc_read_s16(const char *key, s16 *value)
{
u8 buffer[2];
int ret;
ret = applesmc_read_key(key, buffer, 2);
if (ret)
return ret;
*value = ((s16)buffer[0] << 8) | buffer[1];
return 0;
}
/*
* applesmc_device_init - initialize the accelerometer. Can sleep.
*/
static void applesmc_device_init(void)
{
int total;
u8 buffer[2];
if (!smcreg.has_accelerometer)
return;
for (total = INIT_TIMEOUT_MSECS; total > 0; total -= INIT_WAIT_MSECS) {
if (!applesmc_read_key(MOTION_SENSOR_KEY, buffer, 2) &&
(buffer[0] != 0x00 || buffer[1] != 0x00))
return;
buffer[0] = 0xe0;
buffer[1] = 0x00;
applesmc_write_key(MOTION_SENSOR_KEY, buffer, 2);
msleep(INIT_WAIT_MSECS);
}
pr_warn("failed to init the device\n");
}
static int applesmc_init_index(struct applesmc_registers *s)
{
const struct applesmc_entry *entry;
unsigned int i;
if (s->index)
return 0;
s->index = kcalloc(s->temp_count, sizeof(s->index[0]), GFP_KERNEL);
if (!s->index)
return -ENOMEM;
for (i = s->temp_begin; i < s->temp_end; i++) {
entry = applesmc_get_entry_by_index(i);
if (IS_ERR(entry))
continue;
if (strcmp(entry->type, TEMP_SENSOR_TYPE))
continue;
s->index[s->index_count++] = entry->key;
}
return 0;
}
/*
* applesmc_init_smcreg_try - Try to initialize register cache. Idempotent.
*/
static int applesmc_init_smcreg_try(void)
{
struct applesmc_registers *s = &smcreg;
bool left_light_sensor = false, right_light_sensor = false;
unsigned int count;
u8 tmp[1];
int ret;
if (s->init_complete)
return 0;
ret = read_register_count(&count);
if (ret)
return ret;
if (s->cache && s->key_count != count) {
pr_warn("key count changed from %d to %d\n",
s->key_count, count);
kfree(s->cache);
s->cache = NULL;
}
s->key_count = count;
if (!s->cache)
s->cache = kcalloc(s->key_count, sizeof(*s->cache), GFP_KERNEL);
if (!s->cache)
return -ENOMEM;
ret = applesmc_read_key(FANS_COUNT, tmp, 1);
if (ret)
return ret;
s->fan_count = tmp[0];
if (s->fan_count > 10)
s->fan_count = 10;
ret = applesmc_get_lower_bound(&s->temp_begin, "T");
if (ret)
return ret;
ret = applesmc_get_lower_bound(&s->temp_end, "U");
if (ret)
return ret;
s->temp_count = s->temp_end - s->temp_begin;
ret = applesmc_init_index(s);
if (ret)
return ret;
ret = applesmc_has_key(LIGHT_SENSOR_LEFT_KEY, &left_light_sensor);
if (ret)
return ret;
ret = applesmc_has_key(LIGHT_SENSOR_RIGHT_KEY, &right_light_sensor);
if (ret)
return ret;
ret = applesmc_has_key(MOTION_SENSOR_KEY, &s->has_accelerometer);
if (ret)
return ret;
ret = applesmc_has_key(BACKLIGHT_KEY, &s->has_key_backlight);
if (ret)
return ret;
s->num_light_sensors = left_light_sensor + right_light_sensor;
s->init_complete = true;
pr_info("key=%d fan=%d temp=%d index=%d acc=%d lux=%d kbd=%d\n",
s->key_count, s->fan_count, s->temp_count, s->index_count,
s->has_accelerometer,
s->num_light_sensors,
s->has_key_backlight);
return 0;
}
static void applesmc_destroy_smcreg(void)
{
kfree(smcreg.index);
smcreg.index = NULL;
kfree(smcreg.cache);
smcreg.cache = NULL;
smcreg.init_complete = false;
}
/*
* applesmc_init_smcreg - Initialize register cache.
*
* Retries until initialization is successful, or the operation times out.
*
*/
static int applesmc_init_smcreg(void)
{
int ms, ret;
for (ms = 0; ms < INIT_TIMEOUT_MSECS; ms += INIT_WAIT_MSECS) {
ret = applesmc_init_smcreg_try();
if (!ret) {
if (ms)
pr_info("init_smcreg() took %d ms\n", ms);
return 0;
}
msleep(INIT_WAIT_MSECS);
}
applesmc_destroy_smcreg();
return ret;
}
/* Device model stuff */
static int applesmc_probe(struct platform_device *dev)
{
int ret;
ret = applesmc_init_smcreg();
if (ret)
return ret;
applesmc_device_init();
return 0;
}
/* Synchronize device with memorized backlight state */
static int applesmc_pm_resume(struct device *dev)
{
if (smcreg.has_key_backlight)
applesmc_write_key(BACKLIGHT_KEY, backlight_state, 2);
return 0;
}
/* Reinitialize device on resume from hibernation */
static int applesmc_pm_restore(struct device *dev)
{
applesmc_device_init();
return applesmc_pm_resume(dev);
}
static const struct dev_pm_ops applesmc_pm_ops = {
.resume = applesmc_pm_resume,
.restore = applesmc_pm_restore,
};
static struct platform_driver applesmc_driver = {
.probe = applesmc_probe,
.driver = {
.name = "applesmc",
.pm = &applesmc_pm_ops,
},
};
/*
* applesmc_calibrate - Set our "resting" values. Callers must
* hold applesmc_lock.
*/
static void applesmc_calibrate(void)
{
applesmc_read_s16(MOTION_SENSOR_X_KEY, &rest_x);
applesmc_read_s16(MOTION_SENSOR_Y_KEY, &rest_y);
rest_x = -rest_x;
}
static void applesmc_idev_poll(struct input_dev *idev)
{
s16 x, y;
if (applesmc_read_s16(MOTION_SENSOR_X_KEY, &x))
return;
if (applesmc_read_s16(MOTION_SENSOR_Y_KEY, &y))
return;
x = -x;
input_report_abs(idev, ABS_X, x - rest_x);
input_report_abs(idev, ABS_Y, y - rest_y);
input_sync(idev);
}
/* Sysfs Files */
static ssize_t applesmc_name_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return sysfs_emit(buf, "applesmc\n");
}
static ssize_t applesmc_position_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ret;
s16 x, y, z;
ret = applesmc_read_s16(MOTION_SENSOR_X_KEY, &x);
if (ret)
goto out;
ret = applesmc_read_s16(MOTION_SENSOR_Y_KEY, &y);
if (ret)
goto out;
ret = applesmc_read_s16(MOTION_SENSOR_Z_KEY, &z);
if (ret)
goto out;
out:
if (ret)
return ret;
return sysfs_emit(buf, "(%d,%d,%d)\n", x, y, z);
}
static ssize_t applesmc_light_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
const struct applesmc_entry *entry;
static int data_length;
int ret;
u8 left = 0, right = 0;
u8 buffer[10];
if (!data_length) {
entry = applesmc_get_entry_by_key(LIGHT_SENSOR_LEFT_KEY);
if (IS_ERR(entry))
return PTR_ERR(entry);
if (entry->len > 10)
return -ENXIO;
data_length = entry->len;
pr_info("light sensor data length set to %d\n", data_length);
}
ret = applesmc_read_key(LIGHT_SENSOR_LEFT_KEY, buffer, data_length);
if (ret)
goto out;
/* newer macbooks report a single 10-bit bigendian value */
if (data_length == 10) {
left = be16_to_cpu(*(__be16 *)(buffer + 6)) >> 2;
goto out;
}
left = buffer[2];
ret = applesmc_read_key(LIGHT_SENSOR_RIGHT_KEY, buffer, data_length);
if (ret)
goto out;
right = buffer[2];
out:
if (ret)
return ret;
return sysfs_emit(sysfsbuf, "(%d,%d)\n", left, right);
}
/* Displays sensor key as label */
static ssize_t applesmc_show_sensor_label(struct device *dev,
struct device_attribute *devattr, char *sysfsbuf)
{
const char *key = smcreg.index[to_index(devattr)];
return sysfs_emit(sysfsbuf, "%s\n", key);
}
/* Displays degree Celsius * 1000 */
static ssize_t applesmc_show_temperature(struct device *dev,
struct device_attribute *devattr, char *sysfsbuf)
{
const char *key = smcreg.index[to_index(devattr)];
int ret;
s16 value;
int temp;
ret = applesmc_read_s16(key, &value);
if (ret)
return ret;
temp = 250 * (value >> 6);
return sysfs_emit(sysfsbuf, "%d\n", temp);
}
static ssize_t applesmc_show_fan_speed(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
int ret;
unsigned int speed = 0;
char newkey[5];
u8 buffer[2];
scnprintf(newkey, sizeof(newkey), fan_speed_fmt[to_option(attr)],
to_index(attr));
ret = applesmc_read_key(newkey, buffer, 2);
if (ret)
return ret;
speed = ((buffer[0] << 8 | buffer[1]) >> 2);
return sysfs_emit(sysfsbuf, "%u\n", speed);
}
static ssize_t applesmc_store_fan_speed(struct device *dev,
struct device_attribute *attr,
const char *sysfsbuf, size_t count)
{
int ret;
unsigned long speed;
char newkey[5];
u8 buffer[2];
if (kstrtoul(sysfsbuf, 10, &speed) < 0 || speed >= 0x4000)
return -EINVAL; /* Bigger than a 14-bit value */
scnprintf(newkey, sizeof(newkey), fan_speed_fmt[to_option(attr)],
to_index(attr));
buffer[0] = (speed >> 6) & 0xff;
buffer[1] = (speed << 2) & 0xff;
ret = applesmc_write_key(newkey, buffer, 2);
if (ret)
return ret;
else
return count;
}
static ssize_t applesmc_show_fan_manual(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
int ret;
u16 manual = 0;
u8 buffer[2];
ret = applesmc_read_key(FANS_MANUAL, buffer, 2);
if (ret)
return ret;
manual = ((buffer[0] << 8 | buffer[1]) >> to_index(attr)) & 0x01;
return sysfs_emit(sysfsbuf, "%d\n", manual);
}
static ssize_t applesmc_store_fan_manual(struct device *dev,
struct device_attribute *attr,
const char *sysfsbuf, size_t count)
{
int ret;
u8 buffer[2];
unsigned long input;
u16 val;
if (kstrtoul(sysfsbuf, 10, &input) < 0)
return -EINVAL;
ret = applesmc_read_key(FANS_MANUAL, buffer, 2);
if (ret)
goto out;
val = (buffer[0] << 8 | buffer[1]);
if (input)
val = val | (0x01 << to_index(attr));
else
val = val & ~(0x01 << to_index(attr));
buffer[0] = (val >> 8) & 0xFF;
buffer[1] = val & 0xFF;
ret = applesmc_write_key(FANS_MANUAL, buffer, 2);
out:
if (ret)
return ret;
else
return count;
}
static ssize_t applesmc_show_fan_position(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
int ret;
char newkey[5];
u8 buffer[17];
scnprintf(newkey, sizeof(newkey), FAN_ID_FMT, to_index(attr));
ret = applesmc_read_key(newkey, buffer, 16);
buffer[16] = 0;
if (ret)
return ret;
return sysfs_emit(sysfsbuf, "%s\n", buffer + 4);
}
static ssize_t applesmc_calibrate_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
return sysfs_emit(sysfsbuf, "(%d,%d)\n", rest_x, rest_y);
}
static ssize_t applesmc_calibrate_store(struct device *dev,
struct device_attribute *attr, const char *sysfsbuf, size_t count)
{
applesmc_calibrate();
return count;
}
static void applesmc_backlight_set(struct work_struct *work)
{
applesmc_write_key(BACKLIGHT_KEY, backlight_state, 2);
}
static DECLARE_WORK(backlight_work, &applesmc_backlight_set);
static void applesmc_brightness_set(struct led_classdev *led_cdev,
enum led_brightness value)
{
int ret;
backlight_state[0] = value;
ret = queue_work(applesmc_led_wq, &backlight_work);
if (debug && (!ret))
dev_dbg(led_cdev->dev, "work was already on the queue.\n");
}
static ssize_t applesmc_key_count_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
int ret;
u8 buffer[4];
u32 count;
ret = applesmc_read_key(KEY_COUNT_KEY, buffer, 4);
if (ret)
return ret;
count = ((u32)buffer[0]<<24) + ((u32)buffer[1]<<16) +
((u32)buffer[2]<<8) + buffer[3];
return sysfs_emit(sysfsbuf, "%d\n", count);
}
static ssize_t applesmc_key_at_index_read_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
const struct applesmc_entry *entry;
int ret;
entry = applesmc_get_entry_by_index(key_at_index);
if (IS_ERR(entry))
return PTR_ERR(entry);
ret = applesmc_read_entry(entry, sysfsbuf, entry->len);
if (ret)
return ret;
return entry->len;
}
static ssize_t applesmc_key_at_index_data_length_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
const struct applesmc_entry *entry;
entry = applesmc_get_entry_by_index(key_at_index);
if (IS_ERR(entry))
return PTR_ERR(entry);
return sysfs_emit(sysfsbuf, "%d\n", entry->len);
}
static ssize_t applesmc_key_at_index_type_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
const struct applesmc_entry *entry;
entry = applesmc_get_entry_by_index(key_at_index);
if (IS_ERR(entry))
return PTR_ERR(entry);
return sysfs_emit(sysfsbuf, "%s\n", entry->type);
}
static ssize_t applesmc_key_at_index_name_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
const struct applesmc_entry *entry;
entry = applesmc_get_entry_by_index(key_at_index);
if (IS_ERR(entry))
return PTR_ERR(entry);
return sysfs_emit(sysfsbuf, "%s\n", entry->key);
}
static ssize_t applesmc_key_at_index_show(struct device *dev,
struct device_attribute *attr, char *sysfsbuf)
{
return sysfs_emit(sysfsbuf, "%d\n", key_at_index);
}
static ssize_t applesmc_key_at_index_store(struct device *dev,
struct device_attribute *attr, const char *sysfsbuf, size_t count)
{
unsigned long newkey;
if (kstrtoul(sysfsbuf, 10, &newkey) < 0
|| newkey >= smcreg.key_count)
return -EINVAL;
key_at_index = newkey;
return count;
}
static struct led_classdev applesmc_backlight = {
.name = "smc::kbd_backlight",
.default_trigger = "nand-disk",
.brightness_set = applesmc_brightness_set,
};
static struct applesmc_node_group info_group[] = {
{ "name", applesmc_name_show },
{ "key_count", applesmc_key_count_show },
{ "key_at_index", applesmc_key_at_index_show, applesmc_key_at_index_store },
{ "key_at_index_name", applesmc_key_at_index_name_show },
{ "key_at_index_type", applesmc_key_at_index_type_show },
{ "key_at_index_data_length", applesmc_key_at_index_data_length_show },
{ "key_at_index_data", applesmc_key_at_index_read_show },
{ }
};
static struct applesmc_node_group accelerometer_group[] = {
{ "position", applesmc_position_show },
{ "calibrate", applesmc_calibrate_show, applesmc_calibrate_store },
{ }
};
static struct applesmc_node_group light_sensor_group[] = {
{ "light", applesmc_light_show },
{ }
};
static struct applesmc_node_group fan_group[] = {
{ "fan%d_label", applesmc_show_fan_position },
{ "fan%d_input", applesmc_show_fan_speed, NULL, 0 },
{ "fan%d_min", applesmc_show_fan_speed, applesmc_store_fan_speed, 1 },
{ "fan%d_max", applesmc_show_fan_speed, NULL, 2 },
{ "fan%d_safe", applesmc_show_fan_speed, NULL, 3 },
{ "fan%d_output", applesmc_show_fan_speed, applesmc_store_fan_speed, 4 },
{ "fan%d_manual", applesmc_show_fan_manual, applesmc_store_fan_manual },
{ }
};
static struct applesmc_node_group temp_group[] = {
{ "temp%d_label", applesmc_show_sensor_label },
{ "temp%d_input", applesmc_show_temperature },
{ }
};
/* Module stuff */
/*
* applesmc_destroy_nodes - remove files and free associated memory
*/
static void applesmc_destroy_nodes(struct applesmc_node_group *groups)
{
struct applesmc_node_group *grp;
struct applesmc_dev_attr *node;
for (grp = groups; grp->nodes; grp++) {
for (node = grp->nodes; node->sda.dev_attr.attr.name; node++)
sysfs_remove_file(&pdev->dev.kobj,
&node->sda.dev_attr.attr);
kfree(grp->nodes);
grp->nodes = NULL;
}
}
/*
* applesmc_create_nodes - create a two-dimensional group of sysfs files
*/
static int applesmc_create_nodes(struct applesmc_node_group *groups, int num)
{
struct applesmc_node_group *grp;
struct applesmc_dev_attr *node;
struct attribute *attr;
int ret, i;
for (grp = groups; grp->format; grp++) {
grp->nodes = kcalloc(num + 1, sizeof(*node), GFP_KERNEL);
if (!grp->nodes) {
ret = -ENOMEM;
goto out;
}
for (i = 0; i < num; i++) {
node = &grp->nodes[i];
scnprintf(node->name, sizeof(node->name), grp->format,
i + 1);
node->sda.index = (grp->option << 16) | (i & 0xffff);
node->sda.dev_attr.show = grp->show;
node->sda.dev_attr.store = grp->store;
attr = &node->sda.dev_attr.attr;
sysfs_attr_init(attr);
attr->name = node->name;
attr->mode = 0444 | (grp->store ? 0200 : 0);
ret = sysfs_create_file(&pdev->dev.kobj, attr);
if (ret) {
attr->name = NULL;
goto out;
}
}
}
return 0;
out:
applesmc_destroy_nodes(groups);
return ret;
}
/* Create accelerometer resources */
static int applesmc_create_accelerometer(void)
{
int ret;
if (!smcreg.has_accelerometer)
return 0;
ret = applesmc_create_nodes(accelerometer_group, 1);
if (ret)
goto out;
applesmc_idev = input_allocate_device();
if (!applesmc_idev) {
ret = -ENOMEM;
goto out_sysfs;
}
/* initial calibrate for the input device */
applesmc_calibrate();
/* initialize the input device */
applesmc_idev->name = "applesmc";
applesmc_idev->id.bustype = BUS_HOST;
applesmc_idev->dev.parent = &pdev->dev;
input_set_abs_params(applesmc_idev, ABS_X,
-256, 256, APPLESMC_INPUT_FUZZ, APPLESMC_INPUT_FLAT);
input_set_abs_params(applesmc_idev, ABS_Y,
-256, 256, APPLESMC_INPUT_FUZZ, APPLESMC_INPUT_FLAT);
ret = input_setup_polling(applesmc_idev, applesmc_idev_poll);
if (ret)
goto out_idev;
input_set_poll_interval(applesmc_idev, APPLESMC_POLL_INTERVAL);
ret = input_register_device(applesmc_idev);
if (ret)
goto out_idev;
return 0;
out_idev:
input_free_device(applesmc_idev);
out_sysfs:
applesmc_destroy_nodes(accelerometer_group);
out:
pr_warn("driver init failed (ret=%d)!\n", ret);
return ret;
}
/* Release all resources used by the accelerometer */
static void applesmc_release_accelerometer(void)
{
if (!smcreg.has_accelerometer)
return;
input_unregister_device(applesmc_idev);
applesmc_destroy_nodes(accelerometer_group);
}
static int applesmc_create_light_sensor(void)
{
if (!smcreg.num_light_sensors)
return 0;
return applesmc_create_nodes(light_sensor_group, 1);
}
static void applesmc_release_light_sensor(void)
{
if (!smcreg.num_light_sensors)
return;
applesmc_destroy_nodes(light_sensor_group);
}
static int applesmc_create_key_backlight(void)
{
if (!smcreg.has_key_backlight)
return 0;
applesmc_led_wq = create_singlethread_workqueue("applesmc-led");
if (!applesmc_led_wq)
return -ENOMEM;
return led_classdev_register(&pdev->dev, &applesmc_backlight);
}
static void applesmc_release_key_backlight(void)
{
if (!smcreg.has_key_backlight)
return;
led_classdev_unregister(&applesmc_backlight);
destroy_workqueue(applesmc_led_wq);
}
static int applesmc_dmi_match(const struct dmi_system_id *id)
{
return 1;
}
/*
* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1".
* So we need to put "Apple MacBook Pro" before "Apple MacBook".
*/
static const struct dmi_system_id applesmc_whitelist[] __initconst = {
{ applesmc_dmi_match, "Apple MacBook Air", {
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir") },
},
{ applesmc_dmi_match, "Apple MacBook Pro", {
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro") },
},
{ applesmc_dmi_match, "Apple MacBook", {
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
DMI_MATCH(DMI_PRODUCT_NAME, "MacBook") },
},
{ applesmc_dmi_match, "Apple Macmini", {
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini") },
},
{ applesmc_dmi_match, "Apple MacPro", {
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
DMI_MATCH(DMI_PRODUCT_NAME, "MacPro") },
},
{ applesmc_dmi_match, "Apple iMac", {
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
DMI_MATCH(DMI_PRODUCT_NAME, "iMac") },
},
{ applesmc_dmi_match, "Apple Xserve", {
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
DMI_MATCH(DMI_PRODUCT_NAME, "Xserve") },
},
{ .ident = NULL }
};
static int __init applesmc_init(void)
{
int ret;
if (!dmi_check_system(applesmc_whitelist)) {
pr_warn("supported laptop not found!\n");
ret = -ENODEV;
goto out;
}
if (!request_region(APPLESMC_DATA_PORT, APPLESMC_NR_PORTS,
"applesmc")) {
ret = -ENXIO;
goto out;
}
ret = platform_driver_register(&applesmc_driver);
if (ret)
goto out_region;
pdev = platform_device_register_simple("applesmc", APPLESMC_DATA_PORT,
NULL, 0);
if (IS_ERR(pdev)) {
ret = PTR_ERR(pdev);
goto out_driver;
}
/* create register cache */
ret = applesmc_init_smcreg();
if (ret)
goto out_device;
ret = applesmc_create_nodes(info_group, 1);
if (ret)
goto out_smcreg;
ret = applesmc_create_nodes(fan_group, smcreg.fan_count);
if (ret)
goto out_info;
ret = applesmc_create_nodes(temp_group, smcreg.index_count);
if (ret)
goto out_fans;
ret = applesmc_create_accelerometer();
if (ret)
goto out_temperature;
ret = applesmc_create_light_sensor();
if (ret)
goto out_accelerometer;
ret = applesmc_create_key_backlight();
if (ret)
goto out_light_sysfs;
hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(hwmon_dev)) {
ret = PTR_ERR(hwmon_dev);
goto out_light_ledclass;
}
return 0;
out_light_ledclass:
applesmc_release_key_backlight();
out_light_sysfs:
applesmc_release_light_sensor();
out_accelerometer:
applesmc_release_accelerometer();
out_temperature:
applesmc_destroy_nodes(temp_group);
out_fans:
applesmc_destroy_nodes(fan_group);
out_info:
applesmc_destroy_nodes(info_group);
out_smcreg:
applesmc_destroy_smcreg();
out_device:
platform_device_unregister(pdev);
out_driver:
platform_driver_unregister(&applesmc_driver);
out_region:
release_region(APPLESMC_DATA_PORT, APPLESMC_NR_PORTS);
out:
pr_warn("driver init failed (ret=%d)!\n", ret);
return ret;
}
static void __exit applesmc_exit(void)
{
hwmon_device_unregister(hwmon_dev);
applesmc_release_key_backlight();
applesmc_release_light_sensor();
applesmc_release_accelerometer();
applesmc_destroy_nodes(temp_group);
applesmc_destroy_nodes(fan_group);
applesmc_destroy_nodes(info_group);
applesmc_destroy_smcreg();
platform_device_unregister(pdev);
platform_driver_unregister(&applesmc_driver);
release_region(APPLESMC_DATA_PORT, APPLESMC_NR_PORTS);
}
module_init(applesmc_init);
module_exit(applesmc_exit);
MODULE_AUTHOR("Nicolas Boichat");
MODULE_DESCRIPTION("Apple SMC");
MODULE_LICENSE("GPL v2");
MODULE_DEVICE_TABLE(dmi, applesmc_whitelist);
|
linux-master
|
drivers/hwmon/applesmc.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* hwmon driver for HP (and some HP Compaq) business-class computers that
* report numeric sensor data via Windows Management Instrumentation (WMI).
*
* Copyright (C) 2023 James Seo <[email protected]>
*
* References:
* [1] Hewlett-Packard Development Company, L.P.,
* "HP Client Management Interface Technical White Paper", 2005. [Online].
* Available: https://h20331.www2.hp.com/hpsub/downloads/cmi_whitepaper.pdf
* [2] Hewlett-Packard Development Company, L.P.,
* "HP Retail Manageability", 2012. [Online].
* Available: http://h10032.www1.hp.com/ctg/Manual/c03291135.pdf
* [3] Linux Hardware Project, A. Ponomarenko et al.,
* "linuxhw/ACPI - Collect ACPI table dumps", 2018. [Online].
* Available: https://github.com/linuxhw/ACPI
* [4] P. Rohár, "bmfdec - Decompile binary MOF file (BMF) from WMI buffer",
* 2017. [Online]. Available: https://github.com/pali/bmfdec
*/
#include <linux/acpi.h>
#include <linux/debugfs.h>
#include <linux/hwmon.h>
#include <linux/jiffies.h>
#include <linux/mutex.h>
#include <linux/units.h>
#include <linux/wmi.h>
#define HP_WMI_EVENT_NAMESPACE "root\\WMI"
#define HP_WMI_EVENT_CLASS "HPBIOS_BIOSEvent"
#define HP_WMI_EVENT_GUID "95F24279-4D7B-4334-9387-ACCDC67EF61C"
#define HP_WMI_NUMERIC_SENSOR_GUID "8F1F6435-9F42-42C8-BADC-0E9424F20C9A"
#define HP_WMI_PLATFORM_EVENTS_GUID "41227C2D-80E1-423F-8B8E-87E32755A0EB"
/* Patterns for recognizing sensors and matching events to channels. */
#define HP_WMI_PATTERN_SYS_TEMP "Chassis Thermal Index"
#define HP_WMI_PATTERN_SYS_TEMP2 "System Ambient Temperature"
#define HP_WMI_PATTERN_CPU_TEMP "CPU Thermal Index"
#define HP_WMI_PATTERN_CPU_TEMP2 "CPU Temperature"
#define HP_WMI_PATTERN_TEMP_SENSOR "Thermal Index"
#define HP_WMI_PATTERN_TEMP_ALARM "Thermal Critical"
#define HP_WMI_PATTERN_INTRUSION_ALARM "Hood Intrusion"
#define HP_WMI_PATTERN_FAN_ALARM "Stall"
#define HP_WMI_PATTERN_TEMP "Temperature"
#define HP_WMI_PATTERN_CPU "CPU"
/* These limits are arbitrary. The WMI implementation may vary by system. */
#define HP_WMI_MAX_STR_SIZE 128U
#define HP_WMI_MAX_PROPERTIES 32U
#define HP_WMI_MAX_INSTANCES 32U
enum hp_wmi_type {
HP_WMI_TYPE_OTHER = 1,
HP_WMI_TYPE_TEMPERATURE = 2,
HP_WMI_TYPE_VOLTAGE = 3,
HP_WMI_TYPE_CURRENT = 4,
HP_WMI_TYPE_AIR_FLOW = 12,
HP_WMI_TYPE_INTRUSION = 0xabadb01, /* Custom. */
};
enum hp_wmi_category {
HP_WMI_CATEGORY_SENSOR = 3,
};
enum hp_wmi_severity {
HP_WMI_SEVERITY_UNKNOWN = 0,
HP_WMI_SEVERITY_OK = 5,
HP_WMI_SEVERITY_DEGRADED_WARNING = 10,
HP_WMI_SEVERITY_MINOR_FAILURE = 15,
HP_WMI_SEVERITY_MAJOR_FAILURE = 20,
HP_WMI_SEVERITY_CRITICAL_FAILURE = 25,
HP_WMI_SEVERITY_NON_RECOVERABLE_ERROR = 30,
};
enum hp_wmi_status {
HP_WMI_STATUS_OK = 2,
HP_WMI_STATUS_DEGRADED = 3,
HP_WMI_STATUS_STRESSED = 4,
HP_WMI_STATUS_PREDICTIVE_FAILURE = 5,
HP_WMI_STATUS_ERROR = 6,
HP_WMI_STATUS_NON_RECOVERABLE_ERROR = 7,
HP_WMI_STATUS_NO_CONTACT = 12,
HP_WMI_STATUS_LOST_COMMUNICATION = 13,
HP_WMI_STATUS_ABORTED = 14,
HP_WMI_STATUS_SUPPORTING_ENTITY_IN_ERROR = 16,
/* Occurs combined with one of "OK", "Degraded", and "Error" [1]. */
HP_WMI_STATUS_COMPLETED = 17,
};
enum hp_wmi_units {
HP_WMI_UNITS_OTHER = 1,
HP_WMI_UNITS_DEGREES_C = 2,
HP_WMI_UNITS_DEGREES_F = 3,
HP_WMI_UNITS_DEGREES_K = 4,
HP_WMI_UNITS_VOLTS = 5,
HP_WMI_UNITS_AMPS = 6,
HP_WMI_UNITS_RPM = 19,
};
enum hp_wmi_property {
HP_WMI_PROPERTY_NAME = 0,
HP_WMI_PROPERTY_DESCRIPTION = 1,
HP_WMI_PROPERTY_SENSOR_TYPE = 2,
HP_WMI_PROPERTY_OTHER_SENSOR_TYPE = 3,
HP_WMI_PROPERTY_OPERATIONAL_STATUS = 4,
HP_WMI_PROPERTY_SIZE = 5,
HP_WMI_PROPERTY_POSSIBLE_STATES = 6,
HP_WMI_PROPERTY_CURRENT_STATE = 7,
HP_WMI_PROPERTY_BASE_UNITS = 8,
HP_WMI_PROPERTY_UNIT_MODIFIER = 9,
HP_WMI_PROPERTY_CURRENT_READING = 10,
HP_WMI_PROPERTY_RATE_UNITS = 11,
};
static const acpi_object_type hp_wmi_property_map[] = {
[HP_WMI_PROPERTY_NAME] = ACPI_TYPE_STRING,
[HP_WMI_PROPERTY_DESCRIPTION] = ACPI_TYPE_STRING,
[HP_WMI_PROPERTY_SENSOR_TYPE] = ACPI_TYPE_INTEGER,
[HP_WMI_PROPERTY_OTHER_SENSOR_TYPE] = ACPI_TYPE_STRING,
[HP_WMI_PROPERTY_OPERATIONAL_STATUS] = ACPI_TYPE_INTEGER,
[HP_WMI_PROPERTY_SIZE] = ACPI_TYPE_INTEGER,
[HP_WMI_PROPERTY_POSSIBLE_STATES] = ACPI_TYPE_STRING,
[HP_WMI_PROPERTY_CURRENT_STATE] = ACPI_TYPE_STRING,
[HP_WMI_PROPERTY_BASE_UNITS] = ACPI_TYPE_INTEGER,
[HP_WMI_PROPERTY_UNIT_MODIFIER] = ACPI_TYPE_INTEGER,
[HP_WMI_PROPERTY_CURRENT_READING] = ACPI_TYPE_INTEGER,
[HP_WMI_PROPERTY_RATE_UNITS] = ACPI_TYPE_INTEGER,
};
enum hp_wmi_platform_events_property {
HP_WMI_PLATFORM_EVENTS_PROPERTY_NAME = 0,
HP_WMI_PLATFORM_EVENTS_PROPERTY_DESCRIPTION = 1,
HP_WMI_PLATFORM_EVENTS_PROPERTY_SOURCE_NAMESPACE = 2,
HP_WMI_PLATFORM_EVENTS_PROPERTY_SOURCE_CLASS = 3,
HP_WMI_PLATFORM_EVENTS_PROPERTY_CATEGORY = 4,
HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_SEVERITY = 5,
HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_STATUS = 6,
};
static const acpi_object_type hp_wmi_platform_events_property_map[] = {
[HP_WMI_PLATFORM_EVENTS_PROPERTY_NAME] = ACPI_TYPE_STRING,
[HP_WMI_PLATFORM_EVENTS_PROPERTY_DESCRIPTION] = ACPI_TYPE_STRING,
[HP_WMI_PLATFORM_EVENTS_PROPERTY_SOURCE_NAMESPACE] = ACPI_TYPE_STRING,
[HP_WMI_PLATFORM_EVENTS_PROPERTY_SOURCE_CLASS] = ACPI_TYPE_STRING,
[HP_WMI_PLATFORM_EVENTS_PROPERTY_CATEGORY] = ACPI_TYPE_INTEGER,
[HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_SEVERITY] = ACPI_TYPE_INTEGER,
[HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_STATUS] = ACPI_TYPE_INTEGER,
};
enum hp_wmi_event_property {
HP_WMI_EVENT_PROPERTY_NAME = 0,
HP_WMI_EVENT_PROPERTY_DESCRIPTION = 1,
HP_WMI_EVENT_PROPERTY_CATEGORY = 2,
HP_WMI_EVENT_PROPERTY_SEVERITY = 3,
HP_WMI_EVENT_PROPERTY_STATUS = 4,
};
static const acpi_object_type hp_wmi_event_property_map[] = {
[HP_WMI_EVENT_PROPERTY_NAME] = ACPI_TYPE_STRING,
[HP_WMI_EVENT_PROPERTY_DESCRIPTION] = ACPI_TYPE_STRING,
[HP_WMI_EVENT_PROPERTY_CATEGORY] = ACPI_TYPE_INTEGER,
[HP_WMI_EVENT_PROPERTY_SEVERITY] = ACPI_TYPE_INTEGER,
[HP_WMI_EVENT_PROPERTY_STATUS] = ACPI_TYPE_INTEGER,
};
static const enum hwmon_sensor_types hp_wmi_hwmon_type_map[] = {
[HP_WMI_TYPE_TEMPERATURE] = hwmon_temp,
[HP_WMI_TYPE_VOLTAGE] = hwmon_in,
[HP_WMI_TYPE_CURRENT] = hwmon_curr,
[HP_WMI_TYPE_AIR_FLOW] = hwmon_fan,
};
static const u32 hp_wmi_hwmon_attributes[hwmon_max] = {
[hwmon_chip] = HWMON_C_REGISTER_TZ,
[hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_FAULT,
[hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
[hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
[hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL | HWMON_F_FAULT,
[hwmon_intrusion] = HWMON_INTRUSION_ALARM,
};
/*
* struct hp_wmi_numeric_sensor - a HPBIOS_BIOSNumericSensor instance
*
* Two variants of HPBIOS_BIOSNumericSensor are known. The first is specified
* in [1] and appears to be much more widespread. The second was discovered by
* decoding BMOF blobs [4], seems to be found only in some newer ZBook systems
* [3], and has two new properties and a slightly different property order.
*
* These differences don't matter on Windows, where WMI object properties are
* accessed by name. For us, supporting both variants gets ugly and hacky at
* times. The fun begins now; this struct is defined as per the new variant.
*
* Effective MOF definition:
*
* #pragma namespace("\\\\.\\root\\HP\\InstrumentedBIOS");
* class HPBIOS_BIOSNumericSensor {
* [read] string Name;
* [read] string Description;
* [read, ValueMap {"0","1","2","3","4","5","6","7","8","9",
* "10","11","12"}, Values {"Unknown","Other","Temperature",
* "Voltage","Current","Tachometer","Counter","Switch","Lock",
* "Humidity","Smoke Detection","Presence","Air Flow"}]
* uint32 SensorType;
* [read] string OtherSensorType;
* [read, ValueMap {"0","1","2","3","4","5","6","7","8","9",
* "10","11","12","13","14","15","16","17","18","..",
* "0x8000.."}, Values {"Unknown","Other","OK","Degraded",
* "Stressed","Predictive Failure","Error",
* "Non-Recoverable Error","Starting","Stopping","Stopped",
* "In Service","No Contact","Lost Communication","Aborted",
* "Dormant","Supporting Entity in Error","Completed",
* "Power Mode","DMTF Reserved","Vendor Reserved"}]
* uint32 OperationalStatus;
* [read] uint32 Size;
* [read] string PossibleStates[];
* [read] string CurrentState;
* [read, ValueMap {"0","1","2","3","4","5","6","7","8","9",
* "10","11","12","13","14","15","16","17","18","19","20",
* "21","22","23","24","25","26","27","28","29","30","31",
* "32","33","34","35","36","37","38","39","40","41","42",
* "43","44","45","46","47","48","49","50","51","52","53",
* "54","55","56","57","58","59","60","61","62","63","64",
* "65"}, Values {"Unknown","Other","Degrees C","Degrees F",
* "Degrees K","Volts","Amps","Watts","Joules","Coulombs",
* "VA","Nits","Lumens","Lux","Candelas","kPa","PSI",
* "Newtons","CFM","RPM","Hertz","Seconds","Minutes",
* "Hours","Days","Weeks","Mils","Inches","Feet",
* "Cubic Inches","Cubic Feet","Meters","Cubic Centimeters",
* "Cubic Meters","Liters","Fluid Ounces","Radians",
* "Steradians","Revolutions","Cycles","Gravities","Ounces",
* "Pounds","Foot-Pounds","Ounce-Inches","Gauss","Gilberts",
* "Henries","Farads","Ohms","Siemens","Moles","Becquerels",
* "PPM (parts/million)","Decibels","DbA","DbC","Grays",
* "Sieverts","Color Temperature Degrees K","Bits","Bytes",
* "Words (data)","DoubleWords","QuadWords","Percentage"}]
* uint32 BaseUnits;
* [read] sint32 UnitModifier;
* [read] uint32 CurrentReading;
* [read] uint32 RateUnits;
* };
*
* Effective MOF definition of old variant [1] (sans redundant info):
*
* class HPBIOS_BIOSNumericSensor {
* [read] string Name;
* [read] string Description;
* [read] uint32 SensorType;
* [read] string OtherSensorType;
* [read] uint32 OperationalStatus;
* [read] string CurrentState;
* [read] string PossibleStates[];
* [read] uint32 BaseUnits;
* [read] sint32 UnitModifier;
* [read] uint32 CurrentReading;
* };
*/
struct hp_wmi_numeric_sensor {
const char *name;
const char *description;
u32 sensor_type;
const char *other_sensor_type; /* Explains "Other" SensorType. */
u32 operational_status;
u8 size; /* Count of PossibleStates[]. */
const char **possible_states;
const char *current_state;
u32 base_units;
s32 unit_modifier;
u32 current_reading;
u32 rate_units;
};
/*
* struct hp_wmi_platform_events - a HPBIOS_PlatformEvents instance
*
* Instances of this object reveal the set of possible HPBIOS_BIOSEvent
* instances for the current system, but it may not always be present.
*
* Effective MOF definition:
*
* #pragma namespace("\\\\.\\root\\HP\\InstrumentedBIOS");
* class HPBIOS_PlatformEvents {
* [read] string Name;
* [read] string Description;
* [read] string SourceNamespace;
* [read] string SourceClass;
* [read, ValueMap {"0","1","2","3","4",".."}, Values {
* "Unknown","Configuration Change","Button Pressed",
* "Sensor","BIOS Settings","Reserved"}]
* uint32 Category;
* [read, ValueMap{"0","5","10","15","20","25","30",".."},
* Values{"Unknown","OK","Degraded/Warning","Minor Failure",
* "Major Failure","Critical Failure","Non-recoverable Error",
* "DMTF Reserved"}]
* uint32 PossibleSeverity;
* [read, ValueMap {"0","1","2","3","4","5","6","7","8","9",
* "10","11","12","13","14","15","16","17","18","..",
* "0x8000.."}, Values {"Unknown","Other","OK","Degraded",
* "Stressed","Predictive Failure","Error",
* "Non-Recoverable Error","Starting","Stopping","Stopped",
* "In Service","No Contact","Lost Communication","Aborted",
* "Dormant","Supporting Entity in Error","Completed",
* "Power Mode","DMTF Reserved","Vendor Reserved"}]
* uint32 PossibleStatus;
* };
*/
struct hp_wmi_platform_events {
const char *name;
const char *description;
const char *source_namespace;
const char *source_class;
u32 category;
u32 possible_severity;
u32 possible_status;
};
/*
* struct hp_wmi_event - a HPBIOS_BIOSEvent instance
*
* Effective MOF definition [1] (corrected below from original):
*
* #pragma namespace("\\\\.\\root\\WMI");
* class HPBIOS_BIOSEvent : WMIEvent {
* [read] string Name;
* [read] string Description;
* [read ValueMap {"0","1","2","3","4"}, Values {"Unknown",
* "Configuration Change","Button Pressed","Sensor",
* "BIOS Settings"}]
* uint32 Category;
* [read, ValueMap {"0","5","10","15","20","25","30"},
* Values {"Unknown","OK","Degraded/Warning",
* "Minor Failure","Major Failure","Critical Failure",
* "Non-recoverable Error"}]
* uint32 Severity;
* [read, ValueMap {"0","1","2","3","4","5","6","7","8",
* "9","10","11","12","13","14","15","16","17","18","..",
* "0x8000.."}, Values {"Unknown","Other","OK","Degraded",
* "Stressed","Predictive Failure","Error",
* "Non-Recoverable Error","Starting","Stopping","Stopped",
* "In Service","No Contact","Lost Communication","Aborted",
* "Dormant","Supporting Entity in Error","Completed",
* "Power Mode","DMTF Reserved","Vendor Reserved"}]
* uint32 Status;
* };
*/
struct hp_wmi_event {
const char *name;
const char *description;
u32 category;
};
/*
* struct hp_wmi_info - sensor info
* @nsensor: numeric sensor properties
* @instance: its WMI instance number
* @state: pointer to driver state
* @has_alarm: whether sensor has an alarm flag
* @alarm: alarm flag
* @type: its hwmon sensor type
* @cached_val: current sensor reading value, scaled for hwmon
* @last_updated: when these readings were last updated
*/
struct hp_wmi_info {
struct hp_wmi_numeric_sensor nsensor;
u8 instance;
void *state; /* void *: Avoid forward declaration. */
bool has_alarm;
bool alarm;
enum hwmon_sensor_types type;
long cached_val;
unsigned long last_updated; /* In jiffies. */
};
/*
* struct hp_wmi_sensors - driver state
* @wdev: pointer to the parent WMI device
* @info_map: sensor info structs by hwmon type and channel number
* @channel_count: count of hwmon channels by hwmon type
* @has_intrusion: whether an intrusion sensor is present
* @intrusion: intrusion flag
* @lock: mutex to lock polling WMI and changes to driver state
*/
struct hp_wmi_sensors {
struct wmi_device *wdev;
struct hp_wmi_info **info_map[hwmon_max];
u8 channel_count[hwmon_max];
bool has_intrusion;
bool intrusion;
struct mutex lock; /* Lock polling WMI and driver state changes. */
};
/* hp_wmi_strdup - devm_kstrdup, but length-limited */
static char *hp_wmi_strdup(struct device *dev, const char *src)
{
char *dst;
size_t len;
len = strnlen(src, HP_WMI_MAX_STR_SIZE - 1);
dst = devm_kmalloc(dev, (len + 1) * sizeof(*dst), GFP_KERNEL);
if (!dst)
return NULL;
strscpy(dst, src, len + 1);
return dst;
}
/*
* hp_wmi_get_wobj - poll WMI for a WMI object instance
* @guid: WMI object GUID
* @instance: WMI object instance number
*
* Returns a new WMI object instance on success, or NULL on error.
* Caller must kfree() the result.
*/
static union acpi_object *hp_wmi_get_wobj(const char *guid, u8 instance)
{
struct acpi_buffer out = { ACPI_ALLOCATE_BUFFER, NULL };
acpi_status err;
err = wmi_query_block(guid, instance, &out);
if (ACPI_FAILURE(err))
return NULL;
return out.pointer;
}
/* hp_wmi_wobj_instance_count - find count of WMI object instances */
static u8 hp_wmi_wobj_instance_count(const char *guid)
{
int count;
count = wmi_instance_count(guid);
return clamp(count, 0, (int)HP_WMI_MAX_INSTANCES);
}
static int check_wobj(const union acpi_object *wobj,
const acpi_object_type property_map[], int last_prop)
{
acpi_object_type type = wobj->type;
acpi_object_type valid_type;
union acpi_object *elements;
u32 elem_count;
int prop;
if (type != ACPI_TYPE_PACKAGE)
return -EINVAL;
elem_count = wobj->package.count;
if (elem_count != last_prop + 1)
return -EINVAL;
elements = wobj->package.elements;
for (prop = 0; prop <= last_prop; prop++) {
type = elements[prop].type;
valid_type = property_map[prop];
if (type != valid_type)
return -EINVAL;
}
return 0;
}
static int extract_acpi_value(struct device *dev,
union acpi_object *element,
acpi_object_type type,
u32 *out_value, char **out_string)
{
switch (type) {
case ACPI_TYPE_INTEGER:
*out_value = element->integer.value;
break;
case ACPI_TYPE_STRING:
*out_string = hp_wmi_strdup(dev, strim(element->string.pointer));
if (!*out_string)
return -ENOMEM;
break;
default:
return -EINVAL;
}
return 0;
}
/*
* check_numeric_sensor_wobj - validate a HPBIOS_BIOSNumericSensor instance
* @wobj: pointer to WMI object instance to check
* @out_size: out pointer to count of possible states
* @out_is_new: out pointer to whether this is a "new" variant object
*
* Returns 0 on success, or a negative error code on error.
*/
static int check_numeric_sensor_wobj(const union acpi_object *wobj,
u8 *out_size, bool *out_is_new)
{
acpi_object_type type = wobj->type;
int prop = HP_WMI_PROPERTY_NAME;
acpi_object_type valid_type;
union acpi_object *elements;
u32 elem_count;
int last_prop;
bool is_new;
u8 count;
u32 j;
u32 i;
if (type != ACPI_TYPE_PACKAGE)
return -EINVAL;
/*
* elements is a variable-length array of ACPI objects, one for
* each property of the WMI object instance, except that the
* strings in PossibleStates[] are flattened into this array
* as if each individual string were a property by itself.
*/
elements = wobj->package.elements;
elem_count = wobj->package.count;
if (elem_count <= HP_WMI_PROPERTY_SIZE ||
elem_count > HP_WMI_MAX_PROPERTIES)
return -EINVAL;
type = elements[HP_WMI_PROPERTY_SIZE].type;
switch (type) {
case ACPI_TYPE_INTEGER:
is_new = true;
last_prop = HP_WMI_PROPERTY_RATE_UNITS;
break;
case ACPI_TYPE_STRING:
is_new = false;
last_prop = HP_WMI_PROPERTY_CURRENT_READING;
break;
default:
return -EINVAL;
}
/*
* In general, the count of PossibleStates[] must be > 0.
* Also, the old variant lacks the Size property, so we may need to
* reduce the value of last_prop by 1 when doing arithmetic with it.
*/
if (elem_count < last_prop - !is_new + 1)
return -EINVAL;
count = elem_count - (last_prop - !is_new);
for (i = 0; i < elem_count && prop <= last_prop; i++, prop++) {
type = elements[i].type;
valid_type = hp_wmi_property_map[prop];
if (type != valid_type)
return -EINVAL;
switch (prop) {
case HP_WMI_PROPERTY_OPERATIONAL_STATUS:
/* Old variant: CurrentState follows OperationalStatus. */
if (!is_new)
prop = HP_WMI_PROPERTY_CURRENT_STATE - 1;
break;
case HP_WMI_PROPERTY_SIZE:
/* New variant: Size == count of PossibleStates[]. */
if (count != elements[i].integer.value)
return -EINVAL;
break;
case HP_WMI_PROPERTY_POSSIBLE_STATES:
/* PossibleStates[0] has already been type-checked. */
for (j = 0; i + 1 < elem_count && j + 1 < count; j++) {
type = elements[++i].type;
if (type != valid_type)
return -EINVAL;
}
/* Old variant: BaseUnits follows PossibleStates[]. */
if (!is_new)
prop = HP_WMI_PROPERTY_BASE_UNITS - 1;
break;
case HP_WMI_PROPERTY_CURRENT_STATE:
/* Old variant: PossibleStates[] follows CurrentState. */
if (!is_new)
prop = HP_WMI_PROPERTY_POSSIBLE_STATES - 1;
break;
}
}
if (prop != last_prop + 1)
return -EINVAL;
*out_size = count;
*out_is_new = is_new;
return 0;
}
static int
numeric_sensor_is_connected(const struct hp_wmi_numeric_sensor *nsensor)
{
u32 operational_status = nsensor->operational_status;
return operational_status != HP_WMI_STATUS_NO_CONTACT;
}
static int numeric_sensor_has_fault(const struct hp_wmi_numeric_sensor *nsensor)
{
u32 operational_status = nsensor->operational_status;
switch (operational_status) {
case HP_WMI_STATUS_DEGRADED:
case HP_WMI_STATUS_STRESSED: /* e.g. Overload, overtemp. */
case HP_WMI_STATUS_PREDICTIVE_FAILURE: /* e.g. Fan removed. */
case HP_WMI_STATUS_ERROR:
case HP_WMI_STATUS_NON_RECOVERABLE_ERROR:
case HP_WMI_STATUS_NO_CONTACT:
case HP_WMI_STATUS_LOST_COMMUNICATION:
case HP_WMI_STATUS_ABORTED:
case HP_WMI_STATUS_SUPPORTING_ENTITY_IN_ERROR:
/* Assume combination by addition; bitwise OR doesn't make sense. */
case HP_WMI_STATUS_COMPLETED + HP_WMI_STATUS_DEGRADED:
case HP_WMI_STATUS_COMPLETED + HP_WMI_STATUS_ERROR:
return true;
}
return false;
}
/* scale_numeric_sensor - scale sensor reading for hwmon */
static long scale_numeric_sensor(const struct hp_wmi_numeric_sensor *nsensor)
{
u32 current_reading = nsensor->current_reading;
s32 unit_modifier = nsensor->unit_modifier;
u32 sensor_type = nsensor->sensor_type;
u32 base_units = nsensor->base_units;
s32 target_modifier;
long val;
/* Fan readings are in RPM units; others are in milliunits. */
target_modifier = sensor_type == HP_WMI_TYPE_AIR_FLOW ? 0 : -3;
val = current_reading;
for (; unit_modifier < target_modifier; unit_modifier++)
val = DIV_ROUND_CLOSEST(val, 10);
for (; unit_modifier > target_modifier; unit_modifier--) {
if (val > LONG_MAX / 10) {
val = LONG_MAX;
break;
}
val *= 10;
}
if (sensor_type == HP_WMI_TYPE_TEMPERATURE) {
switch (base_units) {
case HP_WMI_UNITS_DEGREES_F:
val -= MILLI * 32;
val = val <= LONG_MAX / 5 ?
DIV_ROUND_CLOSEST(val * 5, 9) :
DIV_ROUND_CLOSEST(val, 9) * 5;
break;
case HP_WMI_UNITS_DEGREES_K:
val = milli_kelvin_to_millicelsius(val);
break;
}
}
return val;
}
/*
* classify_numeric_sensor - classify a numeric sensor
* @nsensor: pointer to numeric sensor struct
*
* Returns an enum hp_wmi_type value on success,
* or a negative value if the sensor type is unsupported.
*/
static int classify_numeric_sensor(const struct hp_wmi_numeric_sensor *nsensor)
{
u32 sensor_type = nsensor->sensor_type;
u32 base_units = nsensor->base_units;
const char *name = nsensor->name;
switch (sensor_type) {
case HP_WMI_TYPE_TEMPERATURE:
/*
* Some systems have sensors named "X Thermal Index" in "Other"
* units. Tested CPU sensor examples were found to be in °C,
* albeit perhaps "differently" accurate; e.g. readings were
* reliably -6°C vs. coretemp on a HP Compaq Elite 8300, and
* +8°C on an EliteOne G1 800. But this is still within the
* realm of plausibility for cheaply implemented motherboard
* sensors, and chassis readings were about as expected.
*/
if ((base_units == HP_WMI_UNITS_OTHER &&
strstr(name, HP_WMI_PATTERN_TEMP_SENSOR)) ||
base_units == HP_WMI_UNITS_DEGREES_C ||
base_units == HP_WMI_UNITS_DEGREES_F ||
base_units == HP_WMI_UNITS_DEGREES_K)
return HP_WMI_TYPE_TEMPERATURE;
break;
case HP_WMI_TYPE_VOLTAGE:
if (base_units == HP_WMI_UNITS_VOLTS)
return HP_WMI_TYPE_VOLTAGE;
break;
case HP_WMI_TYPE_CURRENT:
if (base_units == HP_WMI_UNITS_AMPS)
return HP_WMI_TYPE_CURRENT;
break;
case HP_WMI_TYPE_AIR_FLOW:
/*
* Strangely, HP considers fan RPM sensor type to be
* "Air Flow" instead of the more intuitive "Tachometer".
*/
if (base_units == HP_WMI_UNITS_RPM)
return HP_WMI_TYPE_AIR_FLOW;
break;
}
return -EINVAL;
}
static int
populate_numeric_sensor_from_wobj(struct device *dev,
struct hp_wmi_numeric_sensor *nsensor,
union acpi_object *wobj, bool *out_is_new)
{
int last_prop = HP_WMI_PROPERTY_RATE_UNITS;
int prop = HP_WMI_PROPERTY_NAME;
const char **possible_states;
union acpi_object *element;
acpi_object_type type;
char *string;
bool is_new;
u32 value;
u8 size;
int err;
err = check_numeric_sensor_wobj(wobj, &size, &is_new);
if (err)
return err;
possible_states = devm_kcalloc(dev, size, sizeof(*possible_states),
GFP_KERNEL);
if (!possible_states)
return -ENOMEM;
element = wobj->package.elements;
nsensor->possible_states = possible_states;
nsensor->size = size;
if (!is_new)
last_prop = HP_WMI_PROPERTY_CURRENT_READING;
for (; prop <= last_prop; prop++) {
type = hp_wmi_property_map[prop];
err = extract_acpi_value(dev, element, type, &value, &string);
if (err)
return err;
element++;
switch (prop) {
case HP_WMI_PROPERTY_NAME:
nsensor->name = string;
break;
case HP_WMI_PROPERTY_DESCRIPTION:
nsensor->description = string;
break;
case HP_WMI_PROPERTY_SENSOR_TYPE:
if (value > HP_WMI_TYPE_AIR_FLOW)
return -EINVAL;
nsensor->sensor_type = value;
break;
case HP_WMI_PROPERTY_OTHER_SENSOR_TYPE:
nsensor->other_sensor_type = string;
break;
case HP_WMI_PROPERTY_OPERATIONAL_STATUS:
nsensor->operational_status = value;
/* Old variant: CurrentState follows OperationalStatus. */
if (!is_new)
prop = HP_WMI_PROPERTY_CURRENT_STATE - 1;
break;
case HP_WMI_PROPERTY_SIZE:
break; /* Already set. */
case HP_WMI_PROPERTY_POSSIBLE_STATES:
*possible_states++ = string;
if (--size)
prop--;
/* Old variant: BaseUnits follows PossibleStates[]. */
if (!is_new && !size)
prop = HP_WMI_PROPERTY_BASE_UNITS - 1;
break;
case HP_WMI_PROPERTY_CURRENT_STATE:
nsensor->current_state = string;
/* Old variant: PossibleStates[] follows CurrentState. */
if (!is_new)
prop = HP_WMI_PROPERTY_POSSIBLE_STATES - 1;
break;
case HP_WMI_PROPERTY_BASE_UNITS:
nsensor->base_units = value;
break;
case HP_WMI_PROPERTY_UNIT_MODIFIER:
/* UnitModifier is signed. */
nsensor->unit_modifier = (s32)value;
break;
case HP_WMI_PROPERTY_CURRENT_READING:
nsensor->current_reading = value;
break;
case HP_WMI_PROPERTY_RATE_UNITS:
nsensor->rate_units = value;
break;
default:
return -EINVAL;
}
}
*out_is_new = is_new;
return 0;
}
/* update_numeric_sensor_from_wobj - update fungible sensor properties */
static void
update_numeric_sensor_from_wobj(struct device *dev,
struct hp_wmi_numeric_sensor *nsensor,
const union acpi_object *wobj)
{
const union acpi_object *elements;
const union acpi_object *element;
const char *string;
bool is_new;
int offset;
u8 size;
int err;
err = check_numeric_sensor_wobj(wobj, &size, &is_new);
if (err)
return;
elements = wobj->package.elements;
element = &elements[HP_WMI_PROPERTY_OPERATIONAL_STATUS];
nsensor->operational_status = element->integer.value;
/*
* In general, an index offset is needed after PossibleStates[0].
* On a new variant, CurrentState is after PossibleStates[]. This is
* not the case on an old variant, but we still need to offset the
* read because CurrentState is where Size would be on a new variant.
*/
offset = is_new ? size - 1 : -2;
element = &elements[HP_WMI_PROPERTY_CURRENT_STATE + offset];
string = strim(element->string.pointer);
if (strcmp(string, nsensor->current_state)) {
devm_kfree(dev, nsensor->current_state);
nsensor->current_state = hp_wmi_strdup(dev, string);
}
/* Old variant: -2 (not -1) because it lacks the Size property. */
if (!is_new)
offset = (int)size - 2; /* size is > 0, i.e. may be 1. */
element = &elements[HP_WMI_PROPERTY_UNIT_MODIFIER + offset];
nsensor->unit_modifier = (s32)element->integer.value;
element = &elements[HP_WMI_PROPERTY_CURRENT_READING + offset];
nsensor->current_reading = element->integer.value;
}
/*
* check_platform_events_wobj - validate a HPBIOS_PlatformEvents instance
* @wobj: pointer to WMI object instance to check
*
* Returns 0 on success, or a negative error code on error.
*/
static int check_platform_events_wobj(const union acpi_object *wobj)
{
return check_wobj(wobj, hp_wmi_platform_events_property_map,
HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_STATUS);
}
static int
populate_platform_events_from_wobj(struct device *dev,
struct hp_wmi_platform_events *pevents,
union acpi_object *wobj)
{
int last_prop = HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_STATUS;
int prop = HP_WMI_PLATFORM_EVENTS_PROPERTY_NAME;
union acpi_object *element;
acpi_object_type type;
char *string;
u32 value;
int err;
err = check_platform_events_wobj(wobj);
if (err)
return err;
element = wobj->package.elements;
for (; prop <= last_prop; prop++, element++) {
type = hp_wmi_platform_events_property_map[prop];
err = extract_acpi_value(dev, element, type, &value, &string);
if (err)
return err;
switch (prop) {
case HP_WMI_PLATFORM_EVENTS_PROPERTY_NAME:
pevents->name = string;
break;
case HP_WMI_PLATFORM_EVENTS_PROPERTY_DESCRIPTION:
pevents->description = string;
break;
case HP_WMI_PLATFORM_EVENTS_PROPERTY_SOURCE_NAMESPACE:
if (strcasecmp(HP_WMI_EVENT_NAMESPACE, string))
return -EINVAL;
pevents->source_namespace = string;
break;
case HP_WMI_PLATFORM_EVENTS_PROPERTY_SOURCE_CLASS:
if (strcasecmp(HP_WMI_EVENT_CLASS, string))
return -EINVAL;
pevents->source_class = string;
break;
case HP_WMI_PLATFORM_EVENTS_PROPERTY_CATEGORY:
pevents->category = value;
break;
case HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_SEVERITY:
pevents->possible_severity = value;
break;
case HP_WMI_PLATFORM_EVENTS_PROPERTY_POSSIBLE_STATUS:
pevents->possible_status = value;
break;
default:
return -EINVAL;
}
}
return 0;
}
/*
* check_event_wobj - validate a HPBIOS_BIOSEvent instance
* @wobj: pointer to WMI object instance to check
*
* Returns 0 on success, or a negative error code on error.
*/
static int check_event_wobj(const union acpi_object *wobj)
{
return check_wobj(wobj, hp_wmi_event_property_map,
HP_WMI_EVENT_PROPERTY_STATUS);
}
static int populate_event_from_wobj(struct hp_wmi_event *event,
union acpi_object *wobj)
{
int prop = HP_WMI_EVENT_PROPERTY_NAME;
union acpi_object *element;
int err;
err = check_event_wobj(wobj);
if (err)
return err;
element = wobj->package.elements;
/* Extracted strings are NOT device-managed copies. */
for (; prop <= HP_WMI_EVENT_PROPERTY_CATEGORY; prop++, element++) {
switch (prop) {
case HP_WMI_EVENT_PROPERTY_NAME:
event->name = strim(element->string.pointer);
break;
case HP_WMI_EVENT_PROPERTY_DESCRIPTION:
event->description = strim(element->string.pointer);
break;
case HP_WMI_EVENT_PROPERTY_CATEGORY:
event->category = element->integer.value;
break;
default:
return -EINVAL;
}
}
return 0;
}
/*
* classify_event - classify an event
* @name: event name
* @category: event category
*
* Classify instances of both HPBIOS_PlatformEvents and HPBIOS_BIOSEvent from
* property values. Recognition criteria are based on multiple ACPI dumps [3].
*
* Returns an enum hp_wmi_type value on success,
* or a negative value if the event type is unsupported.
*/
static int classify_event(const char *event_name, u32 category)
{
if (category != HP_WMI_CATEGORY_SENSOR)
return -EINVAL;
/* Fan events have Name "X Stall". */
if (strstr(event_name, HP_WMI_PATTERN_FAN_ALARM))
return HP_WMI_TYPE_AIR_FLOW;
/* Intrusion events have Name "Hood Intrusion". */
if (!strcmp(event_name, HP_WMI_PATTERN_INTRUSION_ALARM))
return HP_WMI_TYPE_INTRUSION;
/*
* Temperature events have Name either "Thermal Caution" or
* "Thermal Critical". Deal only with "Thermal Critical" events.
*
* "Thermal Caution" events have Status "Stressed", informing us that
* the OperationalStatus of the related sensor has become "Stressed".
* However, this is already a fault condition that will clear itself
* when the sensor recovers, so we have no further interest in them.
*/
if (!strcmp(event_name, HP_WMI_PATTERN_TEMP_ALARM))
return HP_WMI_TYPE_TEMPERATURE;
return -EINVAL;
}
/*
* interpret_info - interpret sensor for hwmon
* @info: pointer to sensor info struct
*
* Should be called after the numeric sensor member has been updated.
*/
static void interpret_info(struct hp_wmi_info *info)
{
const struct hp_wmi_numeric_sensor *nsensor = &info->nsensor;
info->cached_val = scale_numeric_sensor(nsensor);
info->last_updated = jiffies;
}
/*
* hp_wmi_update_info - poll WMI to update sensor info
* @state: pointer to driver state
* @info: pointer to sensor info struct
*
* Returns 0 on success, or a negative error code on error.
*/
static int hp_wmi_update_info(struct hp_wmi_sensors *state,
struct hp_wmi_info *info)
{
struct hp_wmi_numeric_sensor *nsensor = &info->nsensor;
struct device *dev = &state->wdev->dev;
const union acpi_object *wobj;
u8 instance = info->instance;
int ret = 0;
if (time_after(jiffies, info->last_updated + HZ)) {
mutex_lock(&state->lock);
wobj = hp_wmi_get_wobj(HP_WMI_NUMERIC_SENSOR_GUID, instance);
if (!wobj) {
ret = -EIO;
goto out_unlock;
}
update_numeric_sensor_from_wobj(dev, nsensor, wobj);
interpret_info(info);
kfree(wobj);
out_unlock:
mutex_unlock(&state->lock);
}
return ret;
}
static int basic_string_show(struct seq_file *seqf, void *ignored)
{
const char *str = seqf->private;
seq_printf(seqf, "%s\n", str);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(basic_string);
static int fungible_show(struct seq_file *seqf, enum hp_wmi_property prop)
{
struct hp_wmi_numeric_sensor *nsensor;
struct hp_wmi_sensors *state;
struct hp_wmi_info *info;
int err;
info = seqf->private;
state = info->state;
nsensor = &info->nsensor;
err = hp_wmi_update_info(state, info);
if (err)
return err;
switch (prop) {
case HP_WMI_PROPERTY_OPERATIONAL_STATUS:
seq_printf(seqf, "%u\n", nsensor->operational_status);
break;
case HP_WMI_PROPERTY_CURRENT_STATE:
seq_printf(seqf, "%s\n", nsensor->current_state);
break;
case HP_WMI_PROPERTY_UNIT_MODIFIER:
seq_printf(seqf, "%d\n", nsensor->unit_modifier);
break;
case HP_WMI_PROPERTY_CURRENT_READING:
seq_printf(seqf, "%u\n", nsensor->current_reading);
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int operational_status_show(struct seq_file *seqf, void *ignored)
{
return fungible_show(seqf, HP_WMI_PROPERTY_OPERATIONAL_STATUS);
}
DEFINE_SHOW_ATTRIBUTE(operational_status);
static int current_state_show(struct seq_file *seqf, void *ignored)
{
return fungible_show(seqf, HP_WMI_PROPERTY_CURRENT_STATE);
}
DEFINE_SHOW_ATTRIBUTE(current_state);
static int possible_states_show(struct seq_file *seqf, void *ignored)
{
struct hp_wmi_numeric_sensor *nsensor = seqf->private;
u8 i;
for (i = 0; i < nsensor->size; i++)
seq_printf(seqf, "%s%s", i ? "," : "",
nsensor->possible_states[i]);
seq_puts(seqf, "\n");
return 0;
}
DEFINE_SHOW_ATTRIBUTE(possible_states);
static int unit_modifier_show(struct seq_file *seqf, void *ignored)
{
return fungible_show(seqf, HP_WMI_PROPERTY_UNIT_MODIFIER);
}
DEFINE_SHOW_ATTRIBUTE(unit_modifier);
static int current_reading_show(struct seq_file *seqf, void *ignored)
{
return fungible_show(seqf, HP_WMI_PROPERTY_CURRENT_READING);
}
DEFINE_SHOW_ATTRIBUTE(current_reading);
/* hp_wmi_devm_debugfs_remove - devm callback for debugfs cleanup */
static void hp_wmi_devm_debugfs_remove(void *res)
{
debugfs_remove_recursive(res);
}
/* hp_wmi_debugfs_init - create and populate debugfs directory tree */
static void hp_wmi_debugfs_init(struct device *dev, struct hp_wmi_info *info,
struct hp_wmi_platform_events *pevents,
u8 icount, u8 pcount, bool is_new)
{
struct hp_wmi_numeric_sensor *nsensor;
char buf[HP_WMI_MAX_STR_SIZE];
struct dentry *debugfs;
struct dentry *entries;
struct dentry *dir;
int err;
u8 i;
/* dev_name() gives a not-very-friendly GUID for WMI devices. */
scnprintf(buf, sizeof(buf), "hp-wmi-sensors-%u", dev->id);
debugfs = debugfs_create_dir(buf, NULL);
if (IS_ERR(debugfs))
return;
err = devm_add_action_or_reset(dev, hp_wmi_devm_debugfs_remove,
debugfs);
if (err)
return;
entries = debugfs_create_dir("sensor", debugfs);
for (i = 0; i < icount; i++, info++) {
nsensor = &info->nsensor;
scnprintf(buf, sizeof(buf), "%u", i);
dir = debugfs_create_dir(buf, entries);
debugfs_create_file("name", 0444, dir,
(void *)nsensor->name,
&basic_string_fops);
debugfs_create_file("description", 0444, dir,
(void *)nsensor->description,
&basic_string_fops);
debugfs_create_u32("sensor_type", 0444, dir,
&nsensor->sensor_type);
debugfs_create_file("other_sensor_type", 0444, dir,
(void *)nsensor->other_sensor_type,
&basic_string_fops);
debugfs_create_file("operational_status", 0444, dir,
info, &operational_status_fops);
debugfs_create_file("possible_states", 0444, dir,
nsensor, &possible_states_fops);
debugfs_create_file("current_state", 0444, dir,
info, ¤t_state_fops);
debugfs_create_u32("base_units", 0444, dir,
&nsensor->base_units);
debugfs_create_file("unit_modifier", 0444, dir,
info, &unit_modifier_fops);
debugfs_create_file("current_reading", 0444, dir,
info, ¤t_reading_fops);
if (is_new)
debugfs_create_u32("rate_units", 0444, dir,
&nsensor->rate_units);
}
if (!pcount)
return;
entries = debugfs_create_dir("platform_events", debugfs);
for (i = 0; i < pcount; i++, pevents++) {
scnprintf(buf, sizeof(buf), "%u", i);
dir = debugfs_create_dir(buf, entries);
debugfs_create_file("name", 0444, dir,
(void *)pevents->name,
&basic_string_fops);
debugfs_create_file("description", 0444, dir,
(void *)pevents->description,
&basic_string_fops);
debugfs_create_file("source_namespace", 0444, dir,
(void *)pevents->source_namespace,
&basic_string_fops);
debugfs_create_file("source_class", 0444, dir,
(void *)pevents->source_class,
&basic_string_fops);
debugfs_create_u32("category", 0444, dir,
&pevents->category);
debugfs_create_u32("possible_severity", 0444, dir,
&pevents->possible_severity);
debugfs_create_u32("possible_status", 0444, dir,
&pevents->possible_status);
}
}
static umode_t hp_wmi_hwmon_is_visible(const void *drvdata,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct hp_wmi_sensors *state = drvdata;
const struct hp_wmi_info *info;
if (type == hwmon_intrusion)
return state->has_intrusion ? 0644 : 0;
if (!state->info_map[type] || !state->info_map[type][channel])
return 0;
info = state->info_map[type][channel];
if ((type == hwmon_temp && attr == hwmon_temp_alarm) ||
(type == hwmon_fan && attr == hwmon_fan_alarm))
return info->has_alarm ? 0444 : 0;
return 0444;
}
static int hp_wmi_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *out_val)
{
struct hp_wmi_sensors *state = dev_get_drvdata(dev);
const struct hp_wmi_numeric_sensor *nsensor;
struct hp_wmi_info *info;
int err;
if (type == hwmon_intrusion) {
*out_val = state->intrusion ? 1 : 0;
return 0;
}
info = state->info_map[type][channel];
if ((type == hwmon_temp && attr == hwmon_temp_alarm) ||
(type == hwmon_fan && attr == hwmon_fan_alarm)) {
*out_val = info->alarm ? 1 : 0;
info->alarm = false;
return 0;
}
nsensor = &info->nsensor;
err = hp_wmi_update_info(state, info);
if (err)
return err;
if ((type == hwmon_temp && attr == hwmon_temp_fault) ||
(type == hwmon_fan && attr == hwmon_fan_fault))
*out_val = numeric_sensor_has_fault(nsensor);
else
*out_val = info->cached_val;
return 0;
}
static int hp_wmi_hwmon_read_string(struct device *dev,
enum hwmon_sensor_types type, u32 attr,
int channel, const char **out_str)
{
const struct hp_wmi_sensors *state = dev_get_drvdata(dev);
const struct hp_wmi_info *info;
info = state->info_map[type][channel];
*out_str = info->nsensor.name;
return 0;
}
static int hp_wmi_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct hp_wmi_sensors *state = dev_get_drvdata(dev);
if (val)
return -EINVAL;
mutex_lock(&state->lock);
state->intrusion = false;
mutex_unlock(&state->lock);
return 0;
}
static const struct hwmon_ops hp_wmi_hwmon_ops = {
.is_visible = hp_wmi_hwmon_is_visible,
.read = hp_wmi_hwmon_read,
.read_string = hp_wmi_hwmon_read_string,
.write = hp_wmi_hwmon_write,
};
static struct hwmon_chip_info hp_wmi_chip_info = {
.ops = &hp_wmi_hwmon_ops,
.info = NULL,
};
static struct hp_wmi_info *match_fan_event(struct hp_wmi_sensors *state,
const char *event_description)
{
struct hp_wmi_info **ptr_info = state->info_map[hwmon_fan];
u8 fan_count = state->channel_count[hwmon_fan];
struct hp_wmi_info *info;
const char *name;
u8 i;
/* Fan event has Description "X Speed". Sensor has Name "X[ Speed]". */
for (i = 0; i < fan_count; i++, ptr_info++) {
info = *ptr_info;
name = info->nsensor.name;
if (strstr(event_description, name))
return info;
}
return NULL;
}
static u8 match_temp_events(struct hp_wmi_sensors *state,
const char *event_description,
struct hp_wmi_info *temp_info[])
{
struct hp_wmi_info **ptr_info = state->info_map[hwmon_temp];
u8 temp_count = state->channel_count[hwmon_temp];
struct hp_wmi_info *info;
const char *name;
u8 count = 0;
bool is_cpu;
bool is_sys;
u8 i;
/* Description is either "CPU Thermal Index" or "Chassis Thermal Index". */
is_cpu = !strcmp(event_description, HP_WMI_PATTERN_CPU_TEMP);
is_sys = !strcmp(event_description, HP_WMI_PATTERN_SYS_TEMP);
if (!is_cpu && !is_sys)
return 0;
/*
* CPU event: Match one sensor with Name either "CPU Thermal Index" or
* "CPU Temperature", or multiple with Name(s) "CPU[#] Temperature".
*
* Chassis event: Match one sensor with Name either
* "Chassis Thermal Index" or "System Ambient Temperature".
*/
for (i = 0; i < temp_count; i++, ptr_info++) {
info = *ptr_info;
name = info->nsensor.name;
if ((is_cpu && (!strcmp(name, HP_WMI_PATTERN_CPU_TEMP) ||
!strcmp(name, HP_WMI_PATTERN_CPU_TEMP2))) ||
(is_sys && (!strcmp(name, HP_WMI_PATTERN_SYS_TEMP) ||
!strcmp(name, HP_WMI_PATTERN_SYS_TEMP2)))) {
temp_info[0] = info;
return 1;
}
if (is_cpu && (strstr(name, HP_WMI_PATTERN_CPU) &&
strstr(name, HP_WMI_PATTERN_TEMP)))
temp_info[count++] = info;
}
return count;
}
/* hp_wmi_devm_debugfs_remove - devm callback for WMI event handler removal */
static void hp_wmi_devm_notify_remove(void *ignored)
{
wmi_remove_notify_handler(HP_WMI_EVENT_GUID);
}
/* hp_wmi_notify - WMI event notification handler */
static void hp_wmi_notify(u32 value, void *context)
{
struct hp_wmi_info *temp_info[HP_WMI_MAX_INSTANCES] = {};
struct acpi_buffer out = { ACPI_ALLOCATE_BUFFER, NULL };
struct hp_wmi_sensors *state = context;
struct device *dev = &state->wdev->dev;
struct hp_wmi_info *fan_info;
struct hp_wmi_event event;
union acpi_object *wobj;
acpi_status err;
int event_type;
u8 count;
/*
* The following warning may occur in the kernel log:
*
* ACPI Warning: \_SB.WMID._WED: Return type mismatch -
* found Package, expected Integer/String/Buffer
*
* After using [4] to decode BMOF blobs found in [3], careless copying
* of BIOS code seems the most likely explanation for this warning.
* HP_WMI_EVENT_GUID refers to \\.\root\WMI\HPBIOS_BIOSEvent on
* business-class systems, but it refers to \\.\root\WMI\hpqBEvnt on
* non-business-class systems. Per the existing hp-wmi driver, it
* looks like an instance of hpqBEvnt delivered as event data may
* indeed take the form of a raw ACPI_BUFFER on non-business-class
* systems ("may" because ASL shows some BIOSes do strange things).
*
* In any case, we can ignore this warning, because we always validate
* the event data to ensure it is an ACPI_PACKAGE containing a
* HPBIOS_BIOSEvent instance.
*/
mutex_lock(&state->lock);
err = wmi_get_event_data(value, &out);
if (ACPI_FAILURE(err))
goto out_unlock;
wobj = out.pointer;
err = populate_event_from_wobj(&event, wobj);
if (err) {
dev_warn(dev, "Bad event data (ACPI type %d)\n", wobj->type);
goto out_free_wobj;
}
event_type = classify_event(event.name, event.category);
switch (event_type) {
case HP_WMI_TYPE_AIR_FLOW:
fan_info = match_fan_event(state, event.description);
if (fan_info)
fan_info->alarm = true;
break;
case HP_WMI_TYPE_INTRUSION:
state->intrusion = true;
break;
case HP_WMI_TYPE_TEMPERATURE:
count = match_temp_events(state, event.description, temp_info);
while (count)
temp_info[--count]->alarm = true;
break;
default:
break;
}
out_free_wobj:
kfree(wobj);
out_unlock:
mutex_unlock(&state->lock);
}
static int init_platform_events(struct device *dev,
struct hp_wmi_platform_events **out_pevents,
u8 *out_pcount)
{
struct hp_wmi_platform_events *pevents_arr;
struct hp_wmi_platform_events *pevents;
union acpi_object *wobj;
u8 count;
int err;
u8 i;
count = hp_wmi_wobj_instance_count(HP_WMI_PLATFORM_EVENTS_GUID);
if (!count) {
*out_pcount = 0;
dev_dbg(dev, "No platform events\n");
return 0;
}
pevents_arr = devm_kcalloc(dev, count, sizeof(*pevents), GFP_KERNEL);
if (!pevents_arr)
return -ENOMEM;
for (i = 0, pevents = pevents_arr; i < count; i++, pevents++) {
wobj = hp_wmi_get_wobj(HP_WMI_PLATFORM_EVENTS_GUID, i);
if (!wobj)
return -EIO;
err = populate_platform_events_from_wobj(dev, pevents, wobj);
kfree(wobj);
if (err)
return err;
}
*out_pevents = pevents_arr;
*out_pcount = count;
dev_dbg(dev, "Found %u platform events\n", count);
return 0;
}
static int init_numeric_sensors(struct hp_wmi_sensors *state,
struct hp_wmi_info *connected[],
struct hp_wmi_info **out_info,
u8 *out_icount, u8 *out_count,
bool *out_is_new)
{
struct hp_wmi_info ***info_map = state->info_map;
u8 *channel_count = state->channel_count;
struct device *dev = &state->wdev->dev;
struct hp_wmi_numeric_sensor *nsensor;
u8 channel_index[hwmon_max] = {};
enum hwmon_sensor_types type;
struct hp_wmi_info *info_arr;
struct hp_wmi_info *info;
union acpi_object *wobj;
u8 count = 0;
bool is_new;
u8 icount;
int wtype;
int err;
u8 c;
u8 i;
icount = hp_wmi_wobj_instance_count(HP_WMI_NUMERIC_SENSOR_GUID);
if (!icount)
return -ENODATA;
info_arr = devm_kcalloc(dev, icount, sizeof(*info), GFP_KERNEL);
if (!info_arr)
return -ENOMEM;
for (i = 0, info = info_arr; i < icount; i++, info++) {
wobj = hp_wmi_get_wobj(HP_WMI_NUMERIC_SENSOR_GUID, i);
if (!wobj)
return -EIO;
info->instance = i;
info->state = state;
nsensor = &info->nsensor;
err = populate_numeric_sensor_from_wobj(dev, nsensor, wobj,
&is_new);
kfree(wobj);
if (err)
return err;
if (!numeric_sensor_is_connected(nsensor))
continue;
wtype = classify_numeric_sensor(nsensor);
if (wtype < 0)
continue;
type = hp_wmi_hwmon_type_map[wtype];
channel_count[type]++;
info->type = type;
interpret_info(info);
connected[count++] = info;
}
dev_dbg(dev, "Found %u sensors (%u connected)\n", i, count);
for (i = 0; i < count; i++) {
info = connected[i];
type = info->type;
c = channel_index[type]++;
if (!info_map[type]) {
info_map[type] = devm_kcalloc(dev, channel_count[type],
sizeof(*info_map),
GFP_KERNEL);
if (!info_map[type])
return -ENOMEM;
}
info_map[type][c] = info;
}
*out_info = info_arr;
*out_icount = icount;
*out_count = count;
*out_is_new = is_new;
return 0;
}
static bool find_event_attributes(struct hp_wmi_sensors *state,
struct hp_wmi_platform_events *pevents,
u8 pevents_count)
{
/*
* The existence of this HPBIOS_PlatformEvents instance:
*
* {
* Name = "Rear Chassis Fan0 Stall";
* Description = "Rear Chassis Fan0 Speed";
* Category = 3; // "Sensor"
* PossibleSeverity = 25; // "Critical Failure"
* PossibleStatus = 5; // "Predictive Failure"
* [...]
* }
*
* means that this HPBIOS_BIOSEvent instance may occur:
*
* {
* Name = "Rear Chassis Fan0 Stall";
* Description = "Rear Chassis Fan0 Speed";
* Category = 3; // "Sensor"
* Severity = 25; // "Critical Failure"
* Status = 5; // "Predictive Failure"
* }
*
* After the event occurs (e.g. because the fan was unplugged),
* polling the related HPBIOS_BIOSNumericSensor instance gives:
*
* {
* Name = "Rear Chassis Fan0";
* Description = "Reports rear chassis fan0 speed";
* OperationalStatus = 5; // "Predictive Failure", was 3 ("OK")
* CurrentReading = 0;
* [...]
* }
*
* In this example, the hwmon fan channel for "Rear Chassis Fan0"
* should support the alarm flag and have it be set if the related
* HPBIOS_BIOSEvent instance occurs.
*
* In addition to fan events, temperature (CPU/chassis) and intrusion
* events are relevant to hwmon [2]. Note that much information in [2]
* is unreliable; it is referenced in addition to ACPI dumps [3] merely
* to support the conclusion that sensor and event names/descriptions
* are systematic enough to allow this driver to match them.
*
* Complications and limitations:
*
* - Strings are freeform and may vary, cf. sensor Name "CPU0 Fan"
* on a Z420 vs. "CPU Fan Speed" on an EliteOne 800 G1.
* - Leading/trailing whitespace is a rare but real possibility [3].
* - The HPBIOS_PlatformEvents object may not exist or its instances
* may show that the system only has e.g. BIOS setting-related
* events (cf. the ProBook 4540s and ProBook 470 G0 [3]).
*/
struct hp_wmi_info *temp_info[HP_WMI_MAX_INSTANCES] = {};
const char *event_description;
struct hp_wmi_info *fan_info;
bool has_events = false;
const char *event_name;
u32 event_category;
int event_type;
u8 count;
u8 i;
for (i = 0; i < pevents_count; i++, pevents++) {
event_name = pevents->name;
event_description = pevents->description;
event_category = pevents->category;
event_type = classify_event(event_name, event_category);
switch (event_type) {
case HP_WMI_TYPE_AIR_FLOW:
fan_info = match_fan_event(state, event_description);
if (!fan_info)
break;
fan_info->has_alarm = true;
has_events = true;
break;
case HP_WMI_TYPE_INTRUSION:
state->has_intrusion = true;
has_events = true;
break;
case HP_WMI_TYPE_TEMPERATURE:
count = match_temp_events(state, event_description,
temp_info);
if (!count)
break;
while (count)
temp_info[--count]->has_alarm = true;
has_events = true;
break;
default:
break;
}
}
return has_events;
}
static int make_chip_info(struct hp_wmi_sensors *state, bool has_events)
{
const struct hwmon_channel_info **ptr_channel_info;
struct hp_wmi_info ***info_map = state->info_map;
u8 *channel_count = state->channel_count;
struct hwmon_channel_info *channel_info;
struct device *dev = &state->wdev->dev;
enum hwmon_sensor_types type;
u8 type_count = 0;
u32 *config;
u32 attr;
u8 count;
u8 i;
if (channel_count[hwmon_temp])
channel_count[hwmon_chip] = 1;
if (has_events && state->has_intrusion)
channel_count[hwmon_intrusion] = 1;
for (type = hwmon_chip; type < hwmon_max; type++)
if (channel_count[type])
type_count++;
channel_info = devm_kcalloc(dev, type_count,
sizeof(*channel_info), GFP_KERNEL);
if (!channel_info)
return -ENOMEM;
ptr_channel_info = devm_kcalloc(dev, type_count + 1,
sizeof(*ptr_channel_info), GFP_KERNEL);
if (!ptr_channel_info)
return -ENOMEM;
hp_wmi_chip_info.info = ptr_channel_info;
for (type = hwmon_chip; type < hwmon_max; type++) {
count = channel_count[type];
if (!count)
continue;
config = devm_kcalloc(dev, count + 1,
sizeof(*config), GFP_KERNEL);
if (!config)
return -ENOMEM;
attr = hp_wmi_hwmon_attributes[type];
channel_info->type = type;
channel_info->config = config;
memset32(config, attr, count);
*ptr_channel_info++ = channel_info++;
if (!has_events || (type != hwmon_temp && type != hwmon_fan))
continue;
attr = type == hwmon_temp ? HWMON_T_ALARM : HWMON_F_ALARM;
for (i = 0; i < count; i++)
if (info_map[type][i]->has_alarm)
config[i] |= attr;
}
return 0;
}
static bool add_event_handler(struct hp_wmi_sensors *state)
{
struct device *dev = &state->wdev->dev;
int err;
err = wmi_install_notify_handler(HP_WMI_EVENT_GUID,
hp_wmi_notify, state);
if (err) {
dev_info(dev, "Failed to subscribe to WMI event\n");
return false;
}
err = devm_add_action_or_reset(dev, hp_wmi_devm_notify_remove, NULL);
if (err)
return false;
return true;
}
static int hp_wmi_sensors_init(struct hp_wmi_sensors *state)
{
struct hp_wmi_info *connected[HP_WMI_MAX_INSTANCES];
struct hp_wmi_platform_events *pevents = NULL;
struct device *dev = &state->wdev->dev;
struct hp_wmi_info *info;
struct device *hwdev;
bool has_events;
bool is_new;
u8 icount;
u8 pcount;
u8 count;
int err;
err = init_platform_events(dev, &pevents, &pcount);
if (err)
return err;
err = init_numeric_sensors(state, connected, &info,
&icount, &count, &is_new);
if (err)
return err;
if (IS_ENABLED(CONFIG_DEBUG_FS))
hp_wmi_debugfs_init(dev, info, pevents, icount, pcount, is_new);
if (!count)
return 0; /* No connected sensors; debugfs only. */
has_events = find_event_attributes(state, pevents, pcount);
/* Survive failure to install WMI event handler. */
if (has_events && !add_event_handler(state))
has_events = false;
err = make_chip_info(state, has_events);
if (err)
return err;
hwdev = devm_hwmon_device_register_with_info(dev, "hp_wmi_sensors",
state, &hp_wmi_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwdev);
}
static int hp_wmi_sensors_probe(struct wmi_device *wdev, const void *context)
{
struct device *dev = &wdev->dev;
struct hp_wmi_sensors *state;
state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
if (!state)
return -ENOMEM;
state->wdev = wdev;
mutex_init(&state->lock);
dev_set_drvdata(dev, state);
return hp_wmi_sensors_init(state);
}
static const struct wmi_device_id hp_wmi_sensors_id_table[] = {
{ HP_WMI_NUMERIC_SENSOR_GUID, NULL },
{},
};
static struct wmi_driver hp_wmi_sensors_driver = {
.driver = { .name = "hp-wmi-sensors" },
.id_table = hp_wmi_sensors_id_table,
.probe = hp_wmi_sensors_probe,
};
module_wmi_driver(hp_wmi_sensors_driver);
MODULE_AUTHOR("James Seo <[email protected]>");
MODULE_DESCRIPTION("HP WMI Sensors driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/hp-wmi-sensors.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* corsair-psu.c - Linux driver for Corsair power supplies with HID sensors interface
* Copyright (C) 2020 Wilken Gottwalt <[email protected]>
*/
#include <linux/completion.h>
#include <linux/debugfs.h>
#include <linux/errno.h>
#include <linux/hid.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/types.h>
/*
* Corsair protocol for PSUs
*
* message size = 64 bytes (request and response, little endian)
* request:
* [length][command][param0][param1][paramX]...
* reply:
* [echo of length][echo of command][data0][data1][dataX]...
*
* - commands are byte sized opcodes
* - length is the sum of all bytes of the commands/params
* - the micro-controller of most of these PSUs support concatenation in the request and reply,
* but it is better to not rely on this (it is also hard to parse)
* - the driver uses raw events to be accessible from userspace (though this is not really
* supported, it is just there for convenience, may be removed in the future)
* - a reply always starts with the length and command in the same order the request used it
* - length of the reply data is specific to the command used
* - some of the commands work on a rail and can be switched to a specific rail (0 = 12v,
* 1 = 5v, 2 = 3.3v)
* - the format of the init command 0xFE is swapped length/command bytes
* - parameter bytes amount and values are specific to the command (rail setting is the only
* one for now that uses non-zero values)
* - the driver supports debugfs for values not fitting into the hwmon class
* - not every device class (HXi or RMi) supports all commands
* - if configured wrong the PSU resets or shuts down, often before actually hitting the
* reported critical temperature
* - new models like HX1500i Series 2023 have changes in the reported vendor and product
* strings, both are slightly longer now, report vendor and product in one string and are
* the same now
*/
#define DRIVER_NAME "corsair-psu"
#define REPLY_SIZE 24 /* max length of a reply to a single command */
#define CMD_BUFFER_SIZE 64
#define CMD_TIMEOUT_MS 250
#define SECONDS_PER_HOUR (60 * 60)
#define SECONDS_PER_DAY (SECONDS_PER_HOUR * 24)
#define RAIL_COUNT 3 /* 3v3 + 5v + 12v */
#define TEMP_COUNT 2
#define OCP_MULTI_RAIL 0x02
#define PSU_CMD_SELECT_RAIL 0x00 /* expects length 2 */
#define PSU_CMD_FAN_PWM 0x3B /* the rest of the commands expect length 3 */
#define PSU_CMD_RAIL_VOLTS_HCRIT 0x40
#define PSU_CMD_RAIL_VOLTS_LCRIT 0x44
#define PSU_CMD_RAIL_AMPS_HCRIT 0x46
#define PSU_CMD_TEMP_HCRIT 0x4F
#define PSU_CMD_IN_VOLTS 0x88
#define PSU_CMD_IN_AMPS 0x89
#define PSU_CMD_RAIL_VOLTS 0x8B
#define PSU_CMD_RAIL_AMPS 0x8C
#define PSU_CMD_TEMP0 0x8D
#define PSU_CMD_TEMP1 0x8E
#define PSU_CMD_FAN 0x90
#define PSU_CMD_RAIL_WATTS 0x96
#define PSU_CMD_VEND_STR 0x99
#define PSU_CMD_PROD_STR 0x9A
#define PSU_CMD_TOTAL_UPTIME 0xD1
#define PSU_CMD_UPTIME 0xD2
#define PSU_CMD_OCPMODE 0xD8
#define PSU_CMD_TOTAL_WATTS 0xEE
#define PSU_CMD_FAN_PWM_ENABLE 0xF0
#define PSU_CMD_INIT 0xFE
#define L_IN_VOLTS "v_in"
#define L_OUT_VOLTS_12V "v_out +12v"
#define L_OUT_VOLTS_5V "v_out +5v"
#define L_OUT_VOLTS_3_3V "v_out +3.3v"
#define L_IN_AMPS "curr in"
#define L_AMPS_12V "curr +12v"
#define L_AMPS_5V "curr +5v"
#define L_AMPS_3_3V "curr +3.3v"
#define L_FAN "psu fan"
#define L_TEMP0 "vrm temp"
#define L_TEMP1 "case temp"
#define L_WATTS "power total"
#define L_WATTS_12V "power +12v"
#define L_WATTS_5V "power +5v"
#define L_WATTS_3_3V "power +3.3v"
static const char *const label_watts[] = {
L_WATTS,
L_WATTS_12V,
L_WATTS_5V,
L_WATTS_3_3V
};
static const char *const label_volts[] = {
L_IN_VOLTS,
L_OUT_VOLTS_12V,
L_OUT_VOLTS_5V,
L_OUT_VOLTS_3_3V
};
static const char *const label_amps[] = {
L_IN_AMPS,
L_AMPS_12V,
L_AMPS_5V,
L_AMPS_3_3V
};
struct corsairpsu_data {
struct hid_device *hdev;
struct device *hwmon_dev;
struct dentry *debugfs;
struct completion wait_completion;
struct mutex lock; /* for locking access to cmd_buffer */
u8 *cmd_buffer;
char vendor[REPLY_SIZE];
char product[REPLY_SIZE];
long temp_crit[TEMP_COUNT];
long in_crit[RAIL_COUNT];
long in_lcrit[RAIL_COUNT];
long curr_crit[RAIL_COUNT];
u8 temp_crit_support;
u8 in_crit_support;
u8 in_lcrit_support;
u8 curr_crit_support;
bool in_curr_cmd_support; /* not all commands are supported on every PSU */
};
/* some values are SMBus LINEAR11 data which need a conversion */
static int corsairpsu_linear11_to_int(const u16 val, const int scale)
{
const int exp = ((s16)val) >> 11;
const int mant = (((s16)(val & 0x7ff)) << 5) >> 5;
const int result = mant * scale;
return (exp >= 0) ? (result << exp) : (result >> -exp);
}
/* the micro-controller uses percentage values to control pwm */
static int corsairpsu_dutycycle_to_pwm(const long dutycycle)
{
const int result = (256 << 16) / 100;
return (result * dutycycle) >> 16;
}
static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data)
{
unsigned long time;
int ret;
memset(priv->cmd_buffer, 0, CMD_BUFFER_SIZE);
priv->cmd_buffer[0] = p0;
priv->cmd_buffer[1] = p1;
priv->cmd_buffer[2] = p2;
reinit_completion(&priv->wait_completion);
ret = hid_hw_output_report(priv->hdev, priv->cmd_buffer, CMD_BUFFER_SIZE);
if (ret < 0)
return ret;
time = wait_for_completion_timeout(&priv->wait_completion,
msecs_to_jiffies(CMD_TIMEOUT_MS));
if (!time)
return -ETIMEDOUT;
/*
* at the start of the reply is an echo of the send command/length in the same order it
* was send, not every command is supported on every device class, if a command is not
* supported, the length value in the reply is okay, but the command value is set to 0
*/
if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1])
return -EOPNOTSUPP;
if (data)
memcpy(data, priv->cmd_buffer + 2, REPLY_SIZE);
return 0;
}
static int corsairpsu_init(struct corsairpsu_data *priv)
{
/*
* PSU_CMD_INIT uses swapped length/command and expects 2 parameter bytes, this command
* actually generates a reply, but we don't need it
*/
return corsairpsu_usb_cmd(priv, PSU_CMD_INIT, 3, 0, NULL);
}
static int corsairpsu_fwinfo(struct corsairpsu_data *priv)
{
int ret;
ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_VEND_STR, 0, priv->vendor);
if (ret < 0)
return ret;
ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_PROD_STR, 0, priv->product);
if (ret < 0)
return ret;
return 0;
}
static int corsairpsu_request(struct corsairpsu_data *priv, u8 cmd, u8 rail, void *data)
{
int ret;
mutex_lock(&priv->lock);
switch (cmd) {
case PSU_CMD_RAIL_VOLTS_HCRIT:
case PSU_CMD_RAIL_VOLTS_LCRIT:
case PSU_CMD_RAIL_AMPS_HCRIT:
case PSU_CMD_RAIL_VOLTS:
case PSU_CMD_RAIL_AMPS:
case PSU_CMD_RAIL_WATTS:
ret = corsairpsu_usb_cmd(priv, 2, PSU_CMD_SELECT_RAIL, rail, NULL);
if (ret < 0)
goto cmd_fail;
break;
default:
break;
}
ret = corsairpsu_usb_cmd(priv, 3, cmd, 0, data);
cmd_fail:
mutex_unlock(&priv->lock);
return ret;
}
static int corsairpsu_get_value(struct corsairpsu_data *priv, u8 cmd, u8 rail, long *val)
{
u8 data[REPLY_SIZE];
long tmp;
int ret;
ret = corsairpsu_request(priv, cmd, rail, data);
if (ret < 0)
return ret;
/*
* the biggest value here comes from the uptime command and to exceed MAXINT total uptime
* needs to be about 68 years, the rest are u16 values and the biggest value coming out of
* the LINEAR11 conversion are the watts values which are about 1500 for the strongest psu
* supported (HX1500i)
*/
tmp = ((long)data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0];
switch (cmd) {
case PSU_CMD_RAIL_VOLTS_HCRIT:
case PSU_CMD_RAIL_VOLTS_LCRIT:
case PSU_CMD_RAIL_AMPS_HCRIT:
case PSU_CMD_TEMP_HCRIT:
case PSU_CMD_IN_VOLTS:
case PSU_CMD_IN_AMPS:
case PSU_CMD_RAIL_VOLTS:
case PSU_CMD_RAIL_AMPS:
case PSU_CMD_TEMP0:
case PSU_CMD_TEMP1:
*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000);
break;
case PSU_CMD_FAN:
*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
break;
case PSU_CMD_FAN_PWM_ENABLE:
*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
/*
* 0 = automatic mode, means the micro-controller controls the fan using a plan
* which can be modified, but changing this plan is not supported by this
* driver, the matching PWM mode is automatic fan speed control = PWM 2
* 1 = fixed mode, fan runs at a fixed speed represented by a percentage
* value 0-100, this matches the PWM manual fan speed control = PWM 1
* technically there is no PWM no fan speed control mode, it would be a combination
* of 1 at 100%
*/
if (*val == 0)
*val = 2;
break;
case PSU_CMD_FAN_PWM:
*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
*val = corsairpsu_dutycycle_to_pwm(*val);
break;
case PSU_CMD_RAIL_WATTS:
case PSU_CMD_TOTAL_WATTS:
*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000000);
break;
case PSU_CMD_TOTAL_UPTIME:
case PSU_CMD_UPTIME:
case PSU_CMD_OCPMODE:
*val = tmp;
break;
default:
ret = -EOPNOTSUPP;
break;
}
return ret;
}
static void corsairpsu_get_criticals(struct corsairpsu_data *priv)
{
long tmp;
int rail;
for (rail = 0; rail < TEMP_COUNT; ++rail) {
if (!corsairpsu_get_value(priv, PSU_CMD_TEMP_HCRIT, rail, &tmp)) {
priv->temp_crit_support |= BIT(rail);
priv->temp_crit[rail] = tmp;
}
}
for (rail = 0; rail < RAIL_COUNT; ++rail) {
if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_HCRIT, rail, &tmp)) {
priv->in_crit_support |= BIT(rail);
priv->in_crit[rail] = tmp;
}
if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_LCRIT, rail, &tmp)) {
priv->in_lcrit_support |= BIT(rail);
priv->in_lcrit[rail] = tmp;
}
if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS_HCRIT, rail, &tmp)) {
priv->curr_crit_support |= BIT(rail);
priv->curr_crit[rail] = tmp;
}
}
}
static void corsairpsu_check_cmd_support(struct corsairpsu_data *priv)
{
long tmp;
priv->in_curr_cmd_support = !corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, &tmp);
}
static umode_t corsairpsu_hwmon_temp_is_visible(const struct corsairpsu_data *priv, u32 attr,
int channel)
{
umode_t res = 0444;
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_label:
case hwmon_temp_crit:
if (channel > 0 && !(priv->temp_crit_support & BIT(channel - 1)))
res = 0;
break;
default:
break;
}
return res;
}
static umode_t corsairpsu_hwmon_fan_is_visible(const struct corsairpsu_data *priv, u32 attr,
int channel)
{
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_label:
return 0444;
default:
return 0;
}
}
static umode_t corsairpsu_hwmon_pwm_is_visible(const struct corsairpsu_data *priv, u32 attr,
int channel)
{
switch (attr) {
case hwmon_pwm_input:
case hwmon_pwm_enable:
return 0444;
default:
return 0;
}
}
static umode_t corsairpsu_hwmon_power_is_visible(const struct corsairpsu_data *priv, u32 attr,
int channel)
{
switch (attr) {
case hwmon_power_input:
case hwmon_power_label:
return 0444;
default:
return 0;
}
}
static umode_t corsairpsu_hwmon_in_is_visible(const struct corsairpsu_data *priv, u32 attr,
int channel)
{
umode_t res = 0444;
switch (attr) {
case hwmon_in_input:
case hwmon_in_label:
case hwmon_in_crit:
if (channel > 0 && !(priv->in_crit_support & BIT(channel - 1)))
res = 0;
break;
case hwmon_in_lcrit:
if (channel > 0 && !(priv->in_lcrit_support & BIT(channel - 1)))
res = 0;
break;
default:
break;
}
return res;
}
static umode_t corsairpsu_hwmon_curr_is_visible(const struct corsairpsu_data *priv, u32 attr,
int channel)
{
umode_t res = 0444;
switch (attr) {
case hwmon_curr_input:
if (channel == 0 && !priv->in_curr_cmd_support)
res = 0;
break;
case hwmon_curr_label:
case hwmon_curr_crit:
if (channel > 0 && !(priv->curr_crit_support & BIT(channel - 1)))
res = 0;
break;
default:
break;
}
return res;
}
static umode_t corsairpsu_hwmon_ops_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct corsairpsu_data *priv = data;
switch (type) {
case hwmon_temp:
return corsairpsu_hwmon_temp_is_visible(priv, attr, channel);
case hwmon_fan:
return corsairpsu_hwmon_fan_is_visible(priv, attr, channel);
case hwmon_pwm:
return corsairpsu_hwmon_pwm_is_visible(priv, attr, channel);
case hwmon_power:
return corsairpsu_hwmon_power_is_visible(priv, attr, channel);
case hwmon_in:
return corsairpsu_hwmon_in_is_visible(priv, attr, channel);
case hwmon_curr:
return corsairpsu_hwmon_curr_is_visible(priv, attr, channel);
default:
return 0;
}
}
static int corsairpsu_hwmon_temp_read(struct corsairpsu_data *priv, u32 attr, int channel,
long *val)
{
int err = -EOPNOTSUPP;
switch (attr) {
case hwmon_temp_input:
return corsairpsu_get_value(priv, channel ? PSU_CMD_TEMP1 : PSU_CMD_TEMP0,
channel, val);
case hwmon_temp_crit:
*val = priv->temp_crit[channel];
err = 0;
break;
default:
break;
}
return err;
}
static int corsairpsu_hwmon_pwm_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
{
switch (attr) {
case hwmon_pwm_input:
return corsairpsu_get_value(priv, PSU_CMD_FAN_PWM, 0, val);
case hwmon_pwm_enable:
return corsairpsu_get_value(priv, PSU_CMD_FAN_PWM_ENABLE, 0, val);
default:
break;
}
return -EOPNOTSUPP;
}
static int corsairpsu_hwmon_power_read(struct corsairpsu_data *priv, u32 attr, int channel,
long *val)
{
if (attr == hwmon_power_input) {
switch (channel) {
case 0:
return corsairpsu_get_value(priv, PSU_CMD_TOTAL_WATTS, 0, val);
case 1 ... 3:
return corsairpsu_get_value(priv, PSU_CMD_RAIL_WATTS, channel - 1, val);
default:
break;
}
}
return -EOPNOTSUPP;
}
static int corsairpsu_hwmon_in_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
{
int err = -EOPNOTSUPP;
switch (attr) {
case hwmon_in_input:
switch (channel) {
case 0:
return corsairpsu_get_value(priv, PSU_CMD_IN_VOLTS, 0, val);
case 1 ... 3:
return corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS, channel - 1, val);
default:
break;
}
break;
case hwmon_in_crit:
*val = priv->in_crit[channel - 1];
err = 0;
break;
case hwmon_in_lcrit:
*val = priv->in_lcrit[channel - 1];
err = 0;
break;
}
return err;
}
static int corsairpsu_hwmon_curr_read(struct corsairpsu_data *priv, u32 attr, int channel,
long *val)
{
int err = -EOPNOTSUPP;
switch (attr) {
case hwmon_curr_input:
switch (channel) {
case 0:
return corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, val);
case 1 ... 3:
return corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS, channel - 1, val);
default:
break;
}
break;
case hwmon_curr_crit:
*val = priv->curr_crit[channel - 1];
err = 0;
break;
default:
break;
}
return err;
}
static int corsairpsu_hwmon_ops_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
struct corsairpsu_data *priv = dev_get_drvdata(dev);
switch (type) {
case hwmon_temp:
return corsairpsu_hwmon_temp_read(priv, attr, channel, val);
case hwmon_fan:
if (attr == hwmon_fan_input)
return corsairpsu_get_value(priv, PSU_CMD_FAN, 0, val);
return -EOPNOTSUPP;
case hwmon_pwm:
return corsairpsu_hwmon_pwm_read(priv, attr, channel, val);
case hwmon_power:
return corsairpsu_hwmon_power_read(priv, attr, channel, val);
case hwmon_in:
return corsairpsu_hwmon_in_read(priv, attr, channel, val);
case hwmon_curr:
return corsairpsu_hwmon_curr_read(priv, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int corsairpsu_hwmon_ops_read_string(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
if (type == hwmon_temp && attr == hwmon_temp_label) {
*str = channel ? L_TEMP1 : L_TEMP0;
return 0;
} else if (type == hwmon_fan && attr == hwmon_fan_label) {
*str = L_FAN;
return 0;
} else if (type == hwmon_power && attr == hwmon_power_label && channel < 4) {
*str = label_watts[channel];
return 0;
} else if (type == hwmon_in && attr == hwmon_in_label && channel < 4) {
*str = label_volts[channel];
return 0;
} else if (type == hwmon_curr && attr == hwmon_curr_label && channel < 4) {
*str = label_amps[channel];
return 0;
}
return -EOPNOTSUPP;
}
static const struct hwmon_ops corsairpsu_hwmon_ops = {
.is_visible = corsairpsu_hwmon_ops_is_visible,
.read = corsairpsu_hwmon_ops_read,
.read_string = corsairpsu_hwmon_ops_read_string,
};
static const struct hwmon_channel_info *const corsairpsu_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT),
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_LABEL),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
HWMON_CHANNEL_INFO(power,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT),
NULL
};
static const struct hwmon_chip_info corsairpsu_chip_info = {
.ops = &corsairpsu_hwmon_ops,
.info = corsairpsu_info,
};
#ifdef CONFIG_DEBUG_FS
static void print_uptime(struct seq_file *seqf, u8 cmd)
{
struct corsairpsu_data *priv = seqf->private;
long val;
int ret;
ret = corsairpsu_get_value(priv, cmd, 0, &val);
if (ret < 0) {
seq_puts(seqf, "N/A\n");
return;
}
if (val > SECONDS_PER_DAY) {
seq_printf(seqf, "%ld day(s), %02ld:%02ld:%02ld\n", val / SECONDS_PER_DAY,
val % SECONDS_PER_DAY / SECONDS_PER_HOUR, val % SECONDS_PER_HOUR / 60,
val % 60);
return;
}
seq_printf(seqf, "%02ld:%02ld:%02ld\n", val % SECONDS_PER_DAY / SECONDS_PER_HOUR,
val % SECONDS_PER_HOUR / 60, val % 60);
}
static int uptime_show(struct seq_file *seqf, void *unused)
{
print_uptime(seqf, PSU_CMD_UPTIME);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(uptime);
static int uptime_total_show(struct seq_file *seqf, void *unused)
{
print_uptime(seqf, PSU_CMD_TOTAL_UPTIME);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(uptime_total);
static int vendor_show(struct seq_file *seqf, void *unused)
{
struct corsairpsu_data *priv = seqf->private;
seq_printf(seqf, "%s\n", priv->vendor);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(vendor);
static int product_show(struct seq_file *seqf, void *unused)
{
struct corsairpsu_data *priv = seqf->private;
seq_printf(seqf, "%s\n", priv->product);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(product);
static int ocpmode_show(struct seq_file *seqf, void *unused)
{
struct corsairpsu_data *priv = seqf->private;
long val;
int ret;
/*
* The rail mode is switchable on the fly. The RAW interface can be used for this. But it
* will not be included here, because I consider it somewhat dangerous for the health of the
* PSU. The returned value can be a bogus one, if the PSU is in the process of switching and
* getting of the value itself can also fail during this. Because of this every other value
* than OCP_MULTI_RAIL can be considered as "single rail".
*/
ret = corsairpsu_get_value(priv, PSU_CMD_OCPMODE, 0, &val);
if (ret < 0)
seq_puts(seqf, "N/A\n");
else
seq_printf(seqf, "%s\n", (val == OCP_MULTI_RAIL) ? "multi rail" : "single rail");
return 0;
}
DEFINE_SHOW_ATTRIBUTE(ocpmode);
static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
{
char name[32];
scnprintf(name, sizeof(name), "%s-%s", DRIVER_NAME, dev_name(&priv->hdev->dev));
priv->debugfs = debugfs_create_dir(name, NULL);
debugfs_create_file("uptime", 0444, priv->debugfs, priv, &uptime_fops);
debugfs_create_file("uptime_total", 0444, priv->debugfs, priv, &uptime_total_fops);
debugfs_create_file("vendor", 0444, priv->debugfs, priv, &vendor_fops);
debugfs_create_file("product", 0444, priv->debugfs, priv, &product_fops);
debugfs_create_file("ocpmode", 0444, priv->debugfs, priv, &ocpmode_fops);
}
#else
static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
{
}
#endif
static int corsairpsu_probe(struct hid_device *hdev, const struct hid_device_id *id)
{
struct corsairpsu_data *priv;
int ret;
priv = devm_kzalloc(&hdev->dev, sizeof(struct corsairpsu_data), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->cmd_buffer = devm_kmalloc(&hdev->dev, CMD_BUFFER_SIZE, GFP_KERNEL);
if (!priv->cmd_buffer)
return -ENOMEM;
ret = hid_parse(hdev);
if (ret)
return ret;
ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
if (ret)
return ret;
ret = hid_hw_open(hdev);
if (ret)
goto fail_and_stop;
priv->hdev = hdev;
hid_set_drvdata(hdev, priv);
mutex_init(&priv->lock);
init_completion(&priv->wait_completion);
hid_device_io_start(hdev);
ret = corsairpsu_init(priv);
if (ret < 0) {
dev_err(&hdev->dev, "unable to initialize device (%d)\n", ret);
goto fail_and_stop;
}
ret = corsairpsu_fwinfo(priv);
if (ret < 0) {
dev_err(&hdev->dev, "unable to query firmware (%d)\n", ret);
goto fail_and_stop;
}
corsairpsu_get_criticals(priv);
corsairpsu_check_cmd_support(priv);
priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "corsairpsu", priv,
&corsairpsu_chip_info, NULL);
if (IS_ERR(priv->hwmon_dev)) {
ret = PTR_ERR(priv->hwmon_dev);
goto fail_and_close;
}
corsairpsu_debugfs_init(priv);
return 0;
fail_and_close:
hid_hw_close(hdev);
fail_and_stop:
hid_hw_stop(hdev);
return ret;
}
static void corsairpsu_remove(struct hid_device *hdev)
{
struct corsairpsu_data *priv = hid_get_drvdata(hdev);
debugfs_remove_recursive(priv->debugfs);
hwmon_device_unregister(priv->hwmon_dev);
hid_hw_close(hdev);
hid_hw_stop(hdev);
}
static int corsairpsu_raw_event(struct hid_device *hdev, struct hid_report *report, u8 *data,
int size)
{
struct corsairpsu_data *priv = hid_get_drvdata(hdev);
if (completion_done(&priv->wait_completion))
return 0;
memcpy(priv->cmd_buffer, data, min(CMD_BUFFER_SIZE, size));
complete(&priv->wait_completion);
return 0;
}
#ifdef CONFIG_PM
static int corsairpsu_resume(struct hid_device *hdev)
{
struct corsairpsu_data *priv = hid_get_drvdata(hdev);
/* some PSUs turn off the microcontroller during standby, so a reinit is required */
return corsairpsu_init(priv);
}
#endif
static const struct hid_device_id corsairpsu_idtable[] = {
{ HID_USB_DEVICE(0x1b1c, 0x1c03) }, /* Corsair HX550i */
{ HID_USB_DEVICE(0x1b1c, 0x1c04) }, /* Corsair HX650i */
{ HID_USB_DEVICE(0x1b1c, 0x1c05) }, /* Corsair HX750i */
{ HID_USB_DEVICE(0x1b1c, 0x1c06) }, /* Corsair HX850i */
{ HID_USB_DEVICE(0x1b1c, 0x1c07) }, /* Corsair HX1000i Series 2022 */
{ HID_USB_DEVICE(0x1b1c, 0x1c08) }, /* Corsair HX1200i */
{ HID_USB_DEVICE(0x1b1c, 0x1c09) }, /* Corsair RM550i */
{ HID_USB_DEVICE(0x1b1c, 0x1c0a) }, /* Corsair RM650i */
{ HID_USB_DEVICE(0x1b1c, 0x1c0b) }, /* Corsair RM750i */
{ HID_USB_DEVICE(0x1b1c, 0x1c0c) }, /* Corsair RM850i */
{ HID_USB_DEVICE(0x1b1c, 0x1c0d) }, /* Corsair RM1000i */
{ HID_USB_DEVICE(0x1b1c, 0x1c1e) }, /* Corsair HX1000i Series 2023 */
{ HID_USB_DEVICE(0x1b1c, 0x1c1f) }, /* Corsair HX1500i Series 2022 and 2023 */
{ },
};
MODULE_DEVICE_TABLE(hid, corsairpsu_idtable);
static struct hid_driver corsairpsu_driver = {
.name = DRIVER_NAME,
.id_table = corsairpsu_idtable,
.probe = corsairpsu_probe,
.remove = corsairpsu_remove,
.raw_event = corsairpsu_raw_event,
#ifdef CONFIG_PM
.resume = corsairpsu_resume,
.reset_resume = corsairpsu_resume,
#endif
};
module_hid_driver(corsairpsu_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Wilken Gottwalt <[email protected]>");
MODULE_DESCRIPTION("Linux driver for Corsair power supplies with HID sensors interface");
|
linux-master
|
drivers/hwmon/corsair-psu.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* ultra45_env.c: Driver for Ultra45 PIC16F747 environmental monitor.
*
* Copyright (C) 2008 David S. Miller <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#define DRV_MODULE_VERSION "0.1"
MODULE_AUTHOR("David S. Miller ([email protected])");
MODULE_DESCRIPTION("Ultra45 environmental monitor driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_MODULE_VERSION);
/* PIC device registers */
#define REG_CMD 0x00UL
#define REG_CMD_RESET 0x80
#define REG_CMD_ESTAR 0x01
#define REG_STAT 0x01UL
#define REG_STAT_FWVER 0xf0
#define REG_STAT_TGOOD 0x08
#define REG_STAT_STALE 0x04
#define REG_STAT_BUSY 0x02
#define REG_STAT_FAULT 0x01
#define REG_DATA 0x40UL
#define REG_ADDR 0x41UL
#define REG_SIZE 0x42UL
/* Registers accessed indirectly via REG_DATA/REG_ADDR */
#define IREG_FAN0 0x00
#define IREG_FAN1 0x01
#define IREG_FAN2 0x02
#define IREG_FAN3 0x03
#define IREG_FAN4 0x04
#define IREG_FAN5 0x05
#define IREG_LCL_TEMP 0x06
#define IREG_RMT1_TEMP 0x07
#define IREG_RMT2_TEMP 0x08
#define IREG_RMT3_TEMP 0x09
#define IREG_LM95221_TEMP 0x0a
#define IREG_FIRE_TEMP 0x0b
#define IREG_LSI1064_TEMP 0x0c
#define IREG_FRONT_TEMP 0x0d
#define IREG_FAN_STAT 0x0e
#define IREG_VCORE0 0x0f
#define IREG_VCORE1 0x10
#define IREG_VMEM0 0x11
#define IREG_VMEM1 0x12
#define IREG_PSU_TEMP 0x13
struct env {
void __iomem *regs;
spinlock_t lock;
struct device *hwmon_dev;
};
static u8 env_read(struct env *p, u8 ireg)
{
u8 ret;
spin_lock(&p->lock);
writeb(ireg, p->regs + REG_ADDR);
ret = readb(p->regs + REG_DATA);
spin_unlock(&p->lock);
return ret;
}
static void env_write(struct env *p, u8 ireg, u8 val)
{
spin_lock(&p->lock);
writeb(ireg, p->regs + REG_ADDR);
writeb(val, p->regs + REG_DATA);
spin_unlock(&p->lock);
}
/*
* There seems to be a adr7462 providing these values, thus a lot
* of these calculations are borrowed from the adt7470 driver.
*/
#define FAN_PERIOD_TO_RPM(x) ((90000 * 60) / (x))
#define FAN_RPM_TO_PERIOD FAN_PERIOD_TO_RPM
#define FAN_PERIOD_INVALID (0xff << 8)
#define FAN_DATA_VALID(x) ((x) && (x) != FAN_PERIOD_INVALID)
static ssize_t show_fan_speed(struct device *dev, struct device_attribute *attr,
char *buf)
{
int fan_nr = to_sensor_dev_attr(attr)->index;
struct env *p = dev_get_drvdata(dev);
int rpm, period;
u8 val;
val = env_read(p, IREG_FAN0 + fan_nr);
period = (int) val << 8;
if (FAN_DATA_VALID(period))
rpm = FAN_PERIOD_TO_RPM(period);
else
rpm = 0;
return sprintf(buf, "%d\n", rpm);
}
static ssize_t set_fan_speed(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int fan_nr = to_sensor_dev_attr(attr)->index;
unsigned long rpm;
struct env *p = dev_get_drvdata(dev);
int period;
u8 val;
int err;
err = kstrtoul(buf, 10, &rpm);
if (err)
return err;
if (!rpm)
return -EINVAL;
period = FAN_RPM_TO_PERIOD(rpm);
val = period >> 8;
env_write(p, IREG_FAN0 + fan_nr, val);
return count;
}
static ssize_t show_fan_fault(struct device *dev, struct device_attribute *attr,
char *buf)
{
int fan_nr = to_sensor_dev_attr(attr)->index;
struct env *p = dev_get_drvdata(dev);
u8 val = env_read(p, IREG_FAN_STAT);
return sprintf(buf, "%d\n", (val & (1 << fan_nr)) ? 1 : 0);
}
#define fan(index) \
static SENSOR_DEVICE_ATTR(fan##index##_speed, S_IRUGO | S_IWUSR, \
show_fan_speed, set_fan_speed, index); \
static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, \
show_fan_fault, NULL, index)
fan(0);
fan(1);
fan(2);
fan(3);
fan(4);
static SENSOR_DEVICE_ATTR(psu_fan_fault, S_IRUGO, show_fan_fault, NULL, 6);
static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
char *buf)
{
int temp_nr = to_sensor_dev_attr(attr)->index;
struct env *p = dev_get_drvdata(dev);
s8 val;
val = env_read(p, IREG_LCL_TEMP + temp_nr);
return sprintf(buf, "%d\n", ((int) val) - 64);
}
static SENSOR_DEVICE_ATTR(adt7462_local_temp, S_IRUGO, show_temp, NULL, 0);
static SENSOR_DEVICE_ATTR(cpu0_temp, S_IRUGO, show_temp, NULL, 1);
static SENSOR_DEVICE_ATTR(cpu1_temp, S_IRUGO, show_temp, NULL, 2);
static SENSOR_DEVICE_ATTR(motherboard_temp, S_IRUGO, show_temp, NULL, 3);
static SENSOR_DEVICE_ATTR(lm95221_local_temp, S_IRUGO, show_temp, NULL, 4);
static SENSOR_DEVICE_ATTR(fire_temp, S_IRUGO, show_temp, NULL, 5);
static SENSOR_DEVICE_ATTR(lsi1064_local_temp, S_IRUGO, show_temp, NULL, 6);
static SENSOR_DEVICE_ATTR(front_panel_temp, S_IRUGO, show_temp, NULL, 7);
static SENSOR_DEVICE_ATTR(psu_temp, S_IRUGO, show_temp, NULL, 13);
static ssize_t show_stat_bit(struct device *dev, struct device_attribute *attr,
char *buf)
{
int index = to_sensor_dev_attr(attr)->index;
struct env *p = dev_get_drvdata(dev);
u8 val;
val = readb(p->regs + REG_STAT);
return sprintf(buf, "%d\n", (val & (1 << index)) ? 1 : 0);
}
static SENSOR_DEVICE_ATTR(fan_failure, S_IRUGO, show_stat_bit, NULL, 0);
static SENSOR_DEVICE_ATTR(env_bus_busy, S_IRUGO, show_stat_bit, NULL, 1);
static SENSOR_DEVICE_ATTR(env_data_stale, S_IRUGO, show_stat_bit, NULL, 2);
static SENSOR_DEVICE_ATTR(tpm_self_test_passed, S_IRUGO, show_stat_bit, NULL,
3);
static ssize_t show_fwver(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct env *p = dev_get_drvdata(dev);
u8 val;
val = readb(p->regs + REG_STAT);
return sprintf(buf, "%d\n", val >> 4);
}
static SENSOR_DEVICE_ATTR(firmware_version, S_IRUGO, show_fwver, NULL, 0);
static ssize_t show_name(struct device *dev, struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "ultra45\n");
}
static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0);
static struct attribute *env_attributes[] = {
&sensor_dev_attr_fan0_speed.dev_attr.attr,
&sensor_dev_attr_fan0_fault.dev_attr.attr,
&sensor_dev_attr_fan1_speed.dev_attr.attr,
&sensor_dev_attr_fan1_fault.dev_attr.attr,
&sensor_dev_attr_fan2_speed.dev_attr.attr,
&sensor_dev_attr_fan2_fault.dev_attr.attr,
&sensor_dev_attr_fan3_speed.dev_attr.attr,
&sensor_dev_attr_fan3_fault.dev_attr.attr,
&sensor_dev_attr_fan4_speed.dev_attr.attr,
&sensor_dev_attr_fan4_fault.dev_attr.attr,
&sensor_dev_attr_psu_fan_fault.dev_attr.attr,
&sensor_dev_attr_adt7462_local_temp.dev_attr.attr,
&sensor_dev_attr_cpu0_temp.dev_attr.attr,
&sensor_dev_attr_cpu1_temp.dev_attr.attr,
&sensor_dev_attr_motherboard_temp.dev_attr.attr,
&sensor_dev_attr_lm95221_local_temp.dev_attr.attr,
&sensor_dev_attr_fire_temp.dev_attr.attr,
&sensor_dev_attr_lsi1064_local_temp.dev_attr.attr,
&sensor_dev_attr_front_panel_temp.dev_attr.attr,
&sensor_dev_attr_psu_temp.dev_attr.attr,
&sensor_dev_attr_fan_failure.dev_attr.attr,
&sensor_dev_attr_env_bus_busy.dev_attr.attr,
&sensor_dev_attr_env_data_stale.dev_attr.attr,
&sensor_dev_attr_tpm_self_test_passed.dev_attr.attr,
&sensor_dev_attr_firmware_version.dev_attr.attr,
&sensor_dev_attr_name.dev_attr.attr,
NULL,
};
static const struct attribute_group env_group = {
.attrs = env_attributes,
};
static int env_probe(struct platform_device *op)
{
struct env *p = devm_kzalloc(&op->dev, sizeof(*p), GFP_KERNEL);
int err = -ENOMEM;
if (!p)
goto out;
spin_lock_init(&p->lock);
p->regs = of_ioremap(&op->resource[0], 0, REG_SIZE, "pic16f747");
if (!p->regs)
goto out;
err = sysfs_create_group(&op->dev.kobj, &env_group);
if (err)
goto out_iounmap;
p->hwmon_dev = hwmon_device_register(&op->dev);
if (IS_ERR(p->hwmon_dev)) {
err = PTR_ERR(p->hwmon_dev);
goto out_sysfs_remove_group;
}
platform_set_drvdata(op, p);
err = 0;
out:
return err;
out_sysfs_remove_group:
sysfs_remove_group(&op->dev.kobj, &env_group);
out_iounmap:
of_iounmap(&op->resource[0], p->regs, REG_SIZE);
goto out;
}
static int env_remove(struct platform_device *op)
{
struct env *p = platform_get_drvdata(op);
if (p) {
sysfs_remove_group(&op->dev.kobj, &env_group);
hwmon_device_unregister(p->hwmon_dev);
of_iounmap(&op->resource[0], p->regs, REG_SIZE);
}
return 0;
}
static const struct of_device_id env_match[] = {
{
.name = "env-monitor",
.compatible = "SUNW,ebus-pic16f747-env",
},
{},
};
MODULE_DEVICE_TABLE(of, env_match);
static struct platform_driver env_driver = {
.driver = {
.name = "ultra45_env",
.of_match_table = env_match,
},
.probe = env_probe,
.remove = env_remove,
};
module_platform_driver(env_driver);
|
linux-master
|
drivers/hwmon/ultra45_env.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* g762 - Driver for the Global Mixed-mode Technology Inc. fan speed
* PWM controller chips from G762 family, i.e. G762 and G763
*
* Copyright (C) 2013, Arnaud EBALARD <[email protected]>
*
* This work is based on a basic version for 2.6.31 kernel developed
* by Olivier Mouchet for LaCie. Updates and correction have been
* performed to run on recent kernels. Additional features, like the
* ability to configure various characteristics via .dts file or
* board init file have been added. Detailed datasheet on which this
* development is based is available here:
*
* http://natisbad.org/NAS/refs/GMT_EDS-762_763-080710-0.2.pdf
*
* Headers from previous developments have been kept below:
*
* Copyright (c) 2009 LaCie
*
* Author: Olivier Mouchet <[email protected]>
*
* based on g760a code written by Herbert Valerio Riedel <[email protected]>
* Copyright (C) 2007 Herbert Valerio Riedel <[email protected]>
*
* g762: minimal datasheet available at:
* http://www.gmt.com.tw/product/datasheet/EDS-762_3.pdf
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/platform_data/g762.h>
#define DRVNAME "g762"
static const struct i2c_device_id g762_id[] = {
{ "g762", 0 },
{ "g763", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, g762_id);
enum g762_regs {
G762_REG_SET_CNT = 0x00,
G762_REG_ACT_CNT = 0x01,
G762_REG_FAN_STA = 0x02,
G762_REG_SET_OUT = 0x03,
G762_REG_FAN_CMD1 = 0x04,
G762_REG_FAN_CMD2 = 0x05,
};
/* Config register bits */
#define G762_REG_FAN_CMD1_DET_FAN_FAIL 0x80 /* enable fan_fail signal */
#define G762_REG_FAN_CMD1_DET_FAN_OOC 0x40 /* enable fan_out_of_control */
#define G762_REG_FAN_CMD1_OUT_MODE 0x20 /* out mode: PWM or DC */
#define G762_REG_FAN_CMD1_FAN_MODE 0x10 /* fan mode: closed/open-loop */
#define G762_REG_FAN_CMD1_CLK_DIV_ID1 0x08 /* clock divisor value */
#define G762_REG_FAN_CMD1_CLK_DIV_ID0 0x04
#define G762_REG_FAN_CMD1_PWM_POLARITY 0x02 /* PWM polarity */
#define G762_REG_FAN_CMD1_PULSE_PER_REV 0x01 /* pulse per fan revolution */
#define G762_REG_FAN_CMD2_GEAR_MODE_1 0x08 /* fan gear mode */
#define G762_REG_FAN_CMD2_GEAR_MODE_0 0x04
#define G762_REG_FAN_CMD2_FAN_STARTV_1 0x02 /* fan startup voltage */
#define G762_REG_FAN_CMD2_FAN_STARTV_0 0x01
#define G762_REG_FAN_STA_FAIL 0x02 /* fan fail */
#define G762_REG_FAN_STA_OOC 0x01 /* fan out of control */
/* Config register values */
#define G762_OUT_MODE_PWM 1
#define G762_OUT_MODE_DC 0
#define G762_FAN_MODE_CLOSED_LOOP 2
#define G762_FAN_MODE_OPEN_LOOP 1
#define G762_PWM_POLARITY_NEGATIVE 1
#define G762_PWM_POLARITY_POSITIVE 0
/* Register data is read (and cached) at most once per second. */
#define G762_UPDATE_INTERVAL HZ
/*
* Extract pulse count per fan revolution value (2 or 4) from given
* FAN_CMD1 register value.
*/
#define G762_PULSE_FROM_REG(reg) \
((((reg) & G762_REG_FAN_CMD1_PULSE_PER_REV) + 1) << 1)
/*
* Extract fan clock divisor (1, 2, 4 or 8) from given FAN_CMD1
* register value.
*/
#define G762_CLKDIV_FROM_REG(reg) \
(1 << (((reg) & (G762_REG_FAN_CMD1_CLK_DIV_ID0 | \
G762_REG_FAN_CMD1_CLK_DIV_ID1)) >> 2))
/*
* Extract fan gear mode multiplier value (0, 2 or 4) from given
* FAN_CMD2 register value.
*/
#define G762_GEARMULT_FROM_REG(reg) \
(1 << (((reg) & (G762_REG_FAN_CMD2_GEAR_MODE_0 | \
G762_REG_FAN_CMD2_GEAR_MODE_1)) >> 2))
struct g762_data {
struct i2c_client *client;
struct clk *clk;
/* update mutex */
struct mutex update_lock;
/* board specific parameters. */
u32 clk_freq;
/* g762 register cache */
bool valid;
unsigned long last_updated; /* in jiffies */
u8 set_cnt; /* controls fan rotation speed in closed-loop mode */
u8 act_cnt; /* provides access to current fan RPM value */
u8 fan_sta; /* bit 0: set when actual fan speed is more than
* 25% outside requested fan speed
* bit 1: set when no transition occurs on fan
* pin for 0.7s
*/
u8 set_out; /* controls fan rotation speed in open-loop mode */
u8 fan_cmd1; /* 0: FG_PLS_ID0 FG pulses count per revolution
* 0: 2 counts per revolution
* 1: 4 counts per revolution
* 1: PWM_POLARITY 1: negative_duty
* 0: positive_duty
* 2,3: [FG_CLOCK_ID0, FG_CLK_ID1]
* 00: Divide fan clock by 1
* 01: Divide fan clock by 2
* 10: Divide fan clock by 4
* 11: Divide fan clock by 8
* 4: FAN_MODE 1:closed-loop, 0:open-loop
* 5: OUT_MODE 1:PWM, 0:DC
* 6: DET_FAN_OOC enable "fan ooc" status
* 7: DET_FAN_FAIL enable "fan fail" status
*/
u8 fan_cmd2; /* 0,1: FAN_STARTV 0,1,2,3 -> 0,32,64,96 dac_code
* 2,3: FG_GEAR_MODE
* 00: multiplier = 1
* 01: multiplier = 2
* 10: multiplier = 4
* 4: Mask ALERT# (g763 only)
*/
};
/*
* Convert count value from fan controller register (FAN_SET_CNT) into fan
* speed RPM value. Note that the datasheet documents a basic formula;
* influence of additional parameters (fan clock divisor, fan gear mode)
* have been infered from examples in the datasheet and tests.
*/
static inline unsigned int rpm_from_cnt(u8 cnt, u32 clk_freq, u16 p,
u8 clk_div, u8 gear_mult)
{
if (cnt == 0xff) /* setting cnt to 255 stops the fan */
return 0;
return (clk_freq * 30 * gear_mult) / ((cnt ? cnt : 1) * p * clk_div);
}
/*
* Convert fan RPM value from sysfs into count value for fan controller
* register (FAN_SET_CNT).
*/
static inline unsigned char cnt_from_rpm(unsigned long rpm, u32 clk_freq, u16 p,
u8 clk_div, u8 gear_mult)
{
unsigned long f1 = clk_freq * 30 * gear_mult;
unsigned long f2 = p * clk_div;
if (!rpm) /* to stop the fan, set cnt to 255 */
return 0xff;
rpm = clamp_val(rpm, f1 / (255 * f2), ULONG_MAX / f2);
return DIV_ROUND_CLOSEST(f1, rpm * f2);
}
/* helper to grab and cache data, at most one time per second */
static struct g762_data *g762_update_client(struct device *dev)
{
struct g762_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret = 0;
mutex_lock(&data->update_lock);
if (time_before(jiffies, data->last_updated + G762_UPDATE_INTERVAL) &&
likely(data->valid))
goto out;
ret = i2c_smbus_read_byte_data(client, G762_REG_SET_CNT);
if (ret < 0)
goto out;
data->set_cnt = ret;
ret = i2c_smbus_read_byte_data(client, G762_REG_ACT_CNT);
if (ret < 0)
goto out;
data->act_cnt = ret;
ret = i2c_smbus_read_byte_data(client, G762_REG_FAN_STA);
if (ret < 0)
goto out;
data->fan_sta = ret;
ret = i2c_smbus_read_byte_data(client, G762_REG_SET_OUT);
if (ret < 0)
goto out;
data->set_out = ret;
ret = i2c_smbus_read_byte_data(client, G762_REG_FAN_CMD1);
if (ret < 0)
goto out;
data->fan_cmd1 = ret;
ret = i2c_smbus_read_byte_data(client, G762_REG_FAN_CMD2);
if (ret < 0)
goto out;
data->fan_cmd2 = ret;
data->last_updated = jiffies;
data->valid = true;
out:
mutex_unlock(&data->update_lock);
if (ret < 0) /* upon error, encode it in return value */
data = ERR_PTR(ret);
return data;
}
/* helpers for writing hardware parameters */
/*
* Set input clock frequency received on CLK pin of the chip. Accepted values
* are between 0 and 0xffffff. If zero is given, then default frequency
* (32,768Hz) is used. Note that clock frequency is a characteristic of the
* system but an internal parameter, i.e. value is not passed to the device.
*/
static int do_set_clk_freq(struct device *dev, unsigned long val)
{
struct g762_data *data = dev_get_drvdata(dev);
if (val > 0xffffff)
return -EINVAL;
if (!val)
val = 32768;
data->clk_freq = val;
return 0;
}
/* Set pwm mode. Accepts either 0 (PWM mode) or 1 (DC mode) */
static int do_set_pwm_mode(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
switch (val) {
case G762_OUT_MODE_PWM:
data->fan_cmd1 |= G762_REG_FAN_CMD1_OUT_MODE;
break;
case G762_OUT_MODE_DC:
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_OUT_MODE;
break;
default:
ret = -EINVAL;
goto out;
}
ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1,
data->fan_cmd1);
data->valid = false;
out:
mutex_unlock(&data->update_lock);
return ret;
}
/* Set fan clock divisor. Accepts either 1, 2, 4 or 8. */
static int do_set_fan_div(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
switch (val) {
case 1:
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_CLK_DIV_ID0;
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_CLK_DIV_ID1;
break;
case 2:
data->fan_cmd1 |= G762_REG_FAN_CMD1_CLK_DIV_ID0;
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_CLK_DIV_ID1;
break;
case 4:
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_CLK_DIV_ID0;
data->fan_cmd1 |= G762_REG_FAN_CMD1_CLK_DIV_ID1;
break;
case 8:
data->fan_cmd1 |= G762_REG_FAN_CMD1_CLK_DIV_ID0;
data->fan_cmd1 |= G762_REG_FAN_CMD1_CLK_DIV_ID1;
break;
default:
ret = -EINVAL;
goto out;
}
ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1,
data->fan_cmd1);
data->valid = false;
out:
mutex_unlock(&data->update_lock);
return ret;
}
/* Set fan gear mode. Accepts either 0, 1 or 2. */
static int do_set_fan_gear_mode(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
switch (val) {
case 0:
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_GEAR_MODE_0;
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_GEAR_MODE_1;
break;
case 1:
data->fan_cmd2 |= G762_REG_FAN_CMD2_GEAR_MODE_0;
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_GEAR_MODE_1;
break;
case 2:
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_GEAR_MODE_0;
data->fan_cmd2 |= G762_REG_FAN_CMD2_GEAR_MODE_1;
break;
default:
ret = -EINVAL;
goto out;
}
ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD2,
data->fan_cmd2);
data->valid = false;
out:
mutex_unlock(&data->update_lock);
return ret;
}
/* Set number of fan pulses per revolution. Accepts either 2 or 4. */
static int do_set_fan_pulses(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
switch (val) {
case 2:
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_PULSE_PER_REV;
break;
case 4:
data->fan_cmd1 |= G762_REG_FAN_CMD1_PULSE_PER_REV;
break;
default:
ret = -EINVAL;
goto out;
}
ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1,
data->fan_cmd1);
data->valid = false;
out:
mutex_unlock(&data->update_lock);
return ret;
}
/* Set fan mode. Accepts either 1 (open-loop) or 2 (closed-loop). */
static int do_set_pwm_enable(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
switch (val) {
case G762_FAN_MODE_CLOSED_LOOP:
data->fan_cmd1 |= G762_REG_FAN_CMD1_FAN_MODE;
break;
case G762_FAN_MODE_OPEN_LOOP:
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_FAN_MODE;
/*
* BUG FIX: if SET_CNT register value is 255 then, for some
* unknown reason, fan will not rotate as expected, no matter
* the value of SET_OUT (to be specific, this seems to happen
* only in PWM mode). To workaround this bug, we give SET_CNT
* value of 254 if it is 255 when switching to open-loop.
*/
if (data->set_cnt == 0xff)
i2c_smbus_write_byte_data(data->client,
G762_REG_SET_CNT, 254);
break;
default:
ret = -EINVAL;
goto out;
}
ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1,
data->fan_cmd1);
data->valid = false;
out:
mutex_unlock(&data->update_lock);
return ret;
}
/* Set PWM polarity. Accepts either 0 (positive duty) or 1 (negative duty) */
static int do_set_pwm_polarity(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
switch (val) {
case G762_PWM_POLARITY_POSITIVE:
data->fan_cmd1 &= ~G762_REG_FAN_CMD1_PWM_POLARITY;
break;
case G762_PWM_POLARITY_NEGATIVE:
data->fan_cmd1 |= G762_REG_FAN_CMD1_PWM_POLARITY;
break;
default:
ret = -EINVAL;
goto out;
}
ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1,
data->fan_cmd1);
data->valid = false;
out:
mutex_unlock(&data->update_lock);
return ret;
}
/*
* Set pwm value. Accepts values between 0 (stops the fan) and
* 255 (full speed). This only makes sense in open-loop mode.
*/
static int do_set_pwm(struct device *dev, unsigned long val)
{
struct g762_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
if (val > 255)
return -EINVAL;
mutex_lock(&data->update_lock);
ret = i2c_smbus_write_byte_data(client, G762_REG_SET_OUT, val);
data->valid = false;
mutex_unlock(&data->update_lock);
return ret;
}
/*
* Set fan RPM value. Can be called both in closed and open-loop mode
* but effect will only be seen after closed-loop mode is configured.
*/
static int do_set_fan_target(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
data->set_cnt = cnt_from_rpm(val, data->clk_freq,
G762_PULSE_FROM_REG(data->fan_cmd1),
G762_CLKDIV_FROM_REG(data->fan_cmd1),
G762_GEARMULT_FROM_REG(data->fan_cmd2));
ret = i2c_smbus_write_byte_data(data->client, G762_REG_SET_CNT,
data->set_cnt);
data->valid = false;
mutex_unlock(&data->update_lock);
return ret;
}
/* Set fan startup voltage. Accepted values are either 0, 1, 2 or 3. */
static int do_set_fan_startv(struct device *dev, unsigned long val)
{
struct g762_data *data = g762_update_client(dev);
int ret;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
switch (val) {
case 0:
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_FAN_STARTV_0;
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_FAN_STARTV_1;
break;
case 1:
data->fan_cmd2 |= G762_REG_FAN_CMD2_FAN_STARTV_0;
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_FAN_STARTV_1;
break;
case 2:
data->fan_cmd2 &= ~G762_REG_FAN_CMD2_FAN_STARTV_0;
data->fan_cmd2 |= G762_REG_FAN_CMD2_FAN_STARTV_1;
break;
case 3:
data->fan_cmd2 |= G762_REG_FAN_CMD2_FAN_STARTV_0;
data->fan_cmd2 |= G762_REG_FAN_CMD2_FAN_STARTV_1;
break;
default:
ret = -EINVAL;
goto out;
}
ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD2,
data->fan_cmd2);
data->valid = false;
out:
mutex_unlock(&data->update_lock);
return ret;
}
/*
* Helper to import hardware characteristics from .dts file and push
* those to the chip.
*/
#ifdef CONFIG_OF
static const struct of_device_id g762_dt_match[] = {
{ .compatible = "gmt,g762" },
{ .compatible = "gmt,g763" },
{ },
};
MODULE_DEVICE_TABLE(of, g762_dt_match);
/*
* Grab clock (a required property), enable it, get (fixed) clock frequency
* and store it. Note: upon success, clock has been prepared and enabled; it
* must later be unprepared and disabled (e.g. during module unloading) by a
* call to g762_of_clock_disable(). Note that a reference to clock is kept
* in our private data structure to be used in this function.
*/
static void g762_of_clock_disable(void *data)
{
struct g762_data *g762 = data;
clk_disable_unprepare(g762->clk);
clk_put(g762->clk);
}
static int g762_of_clock_enable(struct i2c_client *client)
{
struct g762_data *data;
unsigned long clk_freq;
struct clk *clk;
int ret;
if (!client->dev.of_node)
return 0;
clk = of_clk_get(client->dev.of_node, 0);
if (IS_ERR(clk)) {
dev_err(&client->dev, "failed to get clock\n");
return PTR_ERR(clk);
}
ret = clk_prepare_enable(clk);
if (ret) {
dev_err(&client->dev, "failed to enable clock\n");
goto clk_put;
}
clk_freq = clk_get_rate(clk);
ret = do_set_clk_freq(&client->dev, clk_freq);
if (ret) {
dev_err(&client->dev, "invalid clock freq %lu\n", clk_freq);
goto clk_unprep;
}
data = i2c_get_clientdata(client);
data->clk = clk;
ret = devm_add_action(&client->dev, g762_of_clock_disable, data);
if (ret) {
dev_err(&client->dev, "failed to add disable clock action\n");
goto clk_unprep;
}
return 0;
clk_unprep:
clk_disable_unprepare(clk);
clk_put:
clk_put(clk);
return ret;
}
static int g762_of_prop_import_one(struct i2c_client *client,
const char *pname,
int (*psetter)(struct device *dev,
unsigned long val))
{
int ret;
u32 pval;
if (of_property_read_u32(client->dev.of_node, pname, &pval))
return 0;
dev_dbg(&client->dev, "found %s (%d)\n", pname, pval);
ret = (*psetter)(&client->dev, pval);
if (ret)
dev_err(&client->dev, "unable to set %s (%d)\n", pname, pval);
return ret;
}
static int g762_of_prop_import(struct i2c_client *client)
{
int ret;
if (!client->dev.of_node)
return 0;
ret = g762_of_prop_import_one(client, "fan_gear_mode",
do_set_fan_gear_mode);
if (ret)
return ret;
ret = g762_of_prop_import_one(client, "pwm_polarity",
do_set_pwm_polarity);
if (ret)
return ret;
return g762_of_prop_import_one(client, "fan_startv",
do_set_fan_startv);
}
#else
static int g762_of_prop_import(struct i2c_client *client)
{
return 0;
}
static int g762_of_clock_enable(struct i2c_client *client)
{
return 0;
}
#endif
/*
* Helper to import hardware characteristics from .dts file and push
* those to the chip.
*/
static int g762_pdata_prop_import(struct i2c_client *client)
{
struct g762_platform_data *pdata = dev_get_platdata(&client->dev);
int ret;
if (!pdata)
return 0;
ret = do_set_fan_gear_mode(&client->dev, pdata->fan_gear_mode);
if (ret)
return ret;
ret = do_set_pwm_polarity(&client->dev, pdata->pwm_polarity);
if (ret)
return ret;
ret = do_set_fan_startv(&client->dev, pdata->fan_startv);
if (ret)
return ret;
return do_set_clk_freq(&client->dev, pdata->clk_freq);
}
/*
* sysfs attributes
*/
/*
* Read function for fan1_input sysfs file. Return current fan RPM value, or
* 0 if fan is out of control.
*/
static ssize_t fan1_input_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct g762_data *data = g762_update_client(dev);
unsigned int rpm = 0;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
/* reverse logic: fan out of control reporting is enabled low */
if (data->fan_sta & G762_REG_FAN_STA_OOC) {
rpm = rpm_from_cnt(data->act_cnt, data->clk_freq,
G762_PULSE_FROM_REG(data->fan_cmd1),
G762_CLKDIV_FROM_REG(data->fan_cmd1),
G762_GEARMULT_FROM_REG(data->fan_cmd2));
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%u\n", rpm);
}
/*
* Read and write functions for pwm1_mode sysfs file. Get and set fan speed
* control mode i.e. PWM (1) or DC (0).
*/
static ssize_t pwm1_mode_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
!!(data->fan_cmd1 & G762_REG_FAN_CMD1_OUT_MODE));
}
static ssize_t pwm1_mode_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
ret = do_set_pwm_mode(dev, val);
if (ret < 0)
return ret;
return count;
}
/*
* Read and write functions for fan1_div sysfs file. Get and set fan
* controller prescaler value
*/
static ssize_t fan1_div_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", G762_CLKDIV_FROM_REG(data->fan_cmd1));
}
static ssize_t fan1_div_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
ret = do_set_fan_div(dev, val);
if (ret < 0)
return ret;
return count;
}
/*
* Read and write functions for fan1_pulses sysfs file. Get and set number
* of tachometer pulses per fan revolution.
*/
static ssize_t fan1_pulses_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", G762_PULSE_FROM_REG(data->fan_cmd1));
}
static ssize_t fan1_pulses_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
ret = do_set_fan_pulses(dev, val);
if (ret < 0)
return ret;
return count;
}
/*
* Read and write functions for pwm1_enable. Get and set fan speed control mode
* (i.e. closed or open-loop).
*
* Following documentation about hwmon's sysfs interface, a pwm1_enable node
* should accept the following:
*
* 0 : no fan speed control (i.e. fan at full speed)
* 1 : manual fan speed control enabled (use pwm[1-*]) (open-loop)
* 2+: automatic fan speed control enabled (use fan[1-*]_target) (closed-loop)
*
* but we do not accept 0 as this mode is not natively supported by the chip
* and it is not emulated by g762 driver. -EINVAL is returned in this case.
*/
static ssize_t pwm1_enable_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
(!!(data->fan_cmd1 & G762_REG_FAN_CMD1_FAN_MODE)) + 1);
}
static ssize_t pwm1_enable_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
ret = do_set_pwm_enable(dev, val);
if (ret < 0)
return ret;
return count;
}
/*
* Read and write functions for pwm1 sysfs file. Get and set pwm value
* (which affects fan speed) in open-loop mode. 0 stops the fan and 255
* makes it run at full speed.
*/
static ssize_t pwm1_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->set_out);
}
static ssize_t pwm1_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
ret = do_set_pwm(dev, val);
if (ret < 0)
return ret;
return count;
}
/*
* Read and write function for fan1_target sysfs file. Get/set the fan speed in
* closed-loop mode. Speed is given as a RPM value; then the chip will regulate
* the fan speed using pulses from fan tachometer.
*
* Refer to rpm_from_cnt() implementation above to get info about count number
* calculation.
*
* Also note that due to rounding errors it is possible that you don't read
* back exactly the value you have set.
*/
static ssize_t fan1_target_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct g762_data *data = g762_update_client(dev);
unsigned int rpm;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
rpm = rpm_from_cnt(data->set_cnt, data->clk_freq,
G762_PULSE_FROM_REG(data->fan_cmd1),
G762_CLKDIV_FROM_REG(data->fan_cmd1),
G762_GEARMULT_FROM_REG(data->fan_cmd2));
mutex_unlock(&data->update_lock);
return sprintf(buf, "%u\n", rpm);
}
static ssize_t fan1_target_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
ret = do_set_fan_target(dev, val);
if (ret < 0)
return ret;
return count;
}
/* read function for fan1_fault sysfs file. */
static ssize_t fan1_fault_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", !!(data->fan_sta & G762_REG_FAN_STA_FAIL));
}
/*
* read function for fan1_alarm sysfs file. Note that OOC condition is
* enabled low
*/
static ssize_t fan1_alarm_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", !(data->fan_sta & G762_REG_FAN_STA_OOC));
}
static DEVICE_ATTR_RW(pwm1);
static DEVICE_ATTR_RW(pwm1_mode);
static DEVICE_ATTR_RW(pwm1_enable);
static DEVICE_ATTR_RO(fan1_input);
static DEVICE_ATTR_RO(fan1_alarm);
static DEVICE_ATTR_RO(fan1_fault);
static DEVICE_ATTR_RW(fan1_target);
static DEVICE_ATTR_RW(fan1_div);
static DEVICE_ATTR_RW(fan1_pulses);
/* Driver data */
static struct attribute *g762_attrs[] = {
&dev_attr_fan1_input.attr,
&dev_attr_fan1_alarm.attr,
&dev_attr_fan1_fault.attr,
&dev_attr_fan1_target.attr,
&dev_attr_fan1_div.attr,
&dev_attr_fan1_pulses.attr,
&dev_attr_pwm1.attr,
&dev_attr_pwm1_mode.attr,
&dev_attr_pwm1_enable.attr,
NULL
};
ATTRIBUTE_GROUPS(g762);
/*
* Enable both fan failure detection and fan out of control protection. The
* function does not protect change/access to data structure; it must thus
* only be called during initialization.
*/
static inline int g762_fan_init(struct device *dev)
{
struct g762_data *data = g762_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
data->fan_cmd1 |= G762_REG_FAN_CMD1_DET_FAN_FAIL;
data->fan_cmd1 |= G762_REG_FAN_CMD1_DET_FAN_OOC;
data->valid = false;
return i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1,
data->fan_cmd1);
}
static int g762_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct g762_data *data;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(struct g762_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->client = client;
mutex_init(&data->update_lock);
/* Enable fan failure detection and fan out of control protection */
ret = g762_fan_init(dev);
if (ret)
return ret;
/* Get configuration via DT ... */
ret = g762_of_clock_enable(client);
if (ret)
return ret;
ret = g762_of_prop_import(client);
if (ret)
return ret;
/* ... or platform_data */
ret = g762_pdata_prop_import(client);
if (ret)
return ret;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, g762_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct i2c_driver g762_driver = {
.driver = {
.name = DRVNAME,
.of_match_table = of_match_ptr(g762_dt_match),
},
.probe = g762_probe,
.id_table = g762_id,
};
module_i2c_driver(g762_driver);
MODULE_AUTHOR("Arnaud EBALARD <[email protected]>");
MODULE_DESCRIPTION("GMT G762/G763 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/g762.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Driver for the ADC on Freescale Semiconductor MC13783 and MC13892 PMICs.
*
* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2009 Sascha Hauer, Pengutronix
*/
#include <linux/mfd/mc13xxx.h>
#include <linux/platform_device.h>
#include <linux/hwmon-sysfs.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/hwmon.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/err.h>
#define DRIVER_NAME "mc13783-adc"
/* platform device id driver data */
#define MC13783_ADC_16CHANS 1
#define MC13783_ADC_BPDIV2 2
struct mc13783_adc_priv {
struct mc13xxx *mc13xxx;
struct device *hwmon_dev;
char name[PLATFORM_NAME_SIZE];
};
static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct mc13783_adc_priv *priv = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", priv->name);
}
static int mc13783_adc_read(struct device *dev,
struct device_attribute *devattr, unsigned int *val)
{
struct mc13783_adc_priv *priv = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
unsigned int channel = attr->index;
unsigned int sample[4];
int ret;
ret = mc13xxx_adc_do_conversion(priv->mc13xxx,
MC13XXX_ADC_MODE_MULT_CHAN,
channel, 0, 0, sample);
if (ret)
return ret;
/* ADIN7 subchannels */
if (channel >= 16)
channel = 7;
channel &= 0x7;
*val = (sample[channel % 4] >> (channel > 3 ? 14 : 2)) & 0x3ff;
return 0;
}
static ssize_t mc13783_adc_bp_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
unsigned val;
struct platform_device *pdev = to_platform_device(dev);
kernel_ulong_t driver_data = platform_get_device_id(pdev)->driver_data;
int ret = mc13783_adc_read(dev, devattr, &val);
if (ret)
return ret;
if (driver_data & MC13783_ADC_BPDIV2)
val = DIV_ROUND_CLOSEST(val * 9, 2);
else
/*
* BP (channel 2) reports with offset 2.4V to the actual value
* to fit the input range of the ADC. unit = 2.25mV = 9/4 mV.
*/
val = DIV_ROUND_CLOSEST(val * 9, 4) + 2400;
return sprintf(buf, "%u\n", val);
}
static ssize_t mc13783_adc_gp_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
unsigned val;
int ret = mc13783_adc_read(dev, devattr, &val);
if (ret)
return ret;
/*
* input range is [0, 2.3V], val has 10 bits, so each bit
* is worth 9/4 mV.
*/
val = DIV_ROUND_CLOSEST(val * 9, 4);
return sprintf(buf, "%u\n", val);
}
static ssize_t mc13783_adc_uid_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
unsigned int val;
struct platform_device *pdev = to_platform_device(dev);
kernel_ulong_t driver_data = platform_get_device_id(pdev)->driver_data;
int ret = mc13783_adc_read(dev, devattr, &val);
if (ret)
return ret;
if (driver_data & MC13783_ADC_BPDIV2)
/* MC13892 have 1/2 divider, input range is [0, 4.800V] */
val = DIV_ROUND_CLOSEST(val * 4800, 1024);
else
/* MC13783 have 0.9 divider, input range is [0, 2.555V] */
val = DIV_ROUND_CLOSEST(val * 2555, 1024);
return sprintf(buf, "%u\n", val);
}
static ssize_t mc13783_adc_temp_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
unsigned int val;
struct platform_device *pdev = to_platform_device(dev);
kernel_ulong_t driver_data = platform_get_device_id(pdev)->driver_data;
int ret = mc13783_adc_read(dev, devattr, &val);
if (ret)
return ret;
if (driver_data & MC13783_ADC_BPDIV2) {
/*
* MC13892:
* Die Temperature Read Out Code at 25C 680
* Temperature change per LSB +0.4244C
*/
ret = DIV_ROUND_CLOSEST(-2635920 + val * 4244, 10);
} else {
/*
* MC13783:
* Die Temperature Read Out Code at 25C 282
* Temperature change per LSB -1.14C
*/
ret = 346480 - 1140 * val;
}
return sprintf(buf, "%d\n", ret);
}
static DEVICE_ATTR_RO(name);
static SENSOR_DEVICE_ATTR_RO(in2_input, mc13783_adc_bp, 2);
static SENSOR_DEVICE_ATTR_RO(in5_input, mc13783_adc_gp, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, mc13783_adc_gp, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, mc13783_adc_gp, 7);
static SENSOR_DEVICE_ATTR_RO(in8_input, mc13783_adc_gp, 8);
static SENSOR_DEVICE_ATTR_RO(in9_input, mc13783_adc_gp, 9);
static SENSOR_DEVICE_ATTR_RO(in10_input, mc13783_adc_gp, 10);
static SENSOR_DEVICE_ATTR_RO(in11_input, mc13783_adc_gp, 11);
static SENSOR_DEVICE_ATTR_RO(in12_input, mc13783_adc_gp, 12);
static SENSOR_DEVICE_ATTR_RO(in13_input, mc13783_adc_gp, 13);
static SENSOR_DEVICE_ATTR_RO(in14_input, mc13783_adc_gp, 14);
static SENSOR_DEVICE_ATTR_RO(in15_input, mc13783_adc_gp, 15);
static SENSOR_DEVICE_ATTR_RO(in16_input, mc13783_adc_uid, 16);
static SENSOR_DEVICE_ATTR_RO(temp1_input, mc13783_adc_temp, 17);
static struct attribute *mc13783_attr_base[] = {
&dev_attr_name.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in16_input.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
NULL
};
static const struct attribute_group mc13783_group_base = {
.attrs = mc13783_attr_base,
};
/* these are only used if MC13783_ADC_16CHANS is provided in driver data */
static struct attribute *mc13783_attr_16chans[] = {
&sensor_dev_attr_in8_input.dev_attr.attr,
&sensor_dev_attr_in9_input.dev_attr.attr,
&sensor_dev_attr_in10_input.dev_attr.attr,
&sensor_dev_attr_in11_input.dev_attr.attr,
NULL
};
static const struct attribute_group mc13783_group_16chans = {
.attrs = mc13783_attr_16chans,
};
/* last four channels may be occupied by the touchscreen */
static struct attribute *mc13783_attr_ts[] = {
&sensor_dev_attr_in12_input.dev_attr.attr,
&sensor_dev_attr_in13_input.dev_attr.attr,
&sensor_dev_attr_in14_input.dev_attr.attr,
&sensor_dev_attr_in15_input.dev_attr.attr,
NULL
};
static const struct attribute_group mc13783_group_ts = {
.attrs = mc13783_attr_ts,
};
static int mc13783_adc_use_touchscreen(struct platform_device *pdev)
{
struct mc13783_adc_priv *priv = platform_get_drvdata(pdev);
unsigned flags = mc13xxx_get_flags(priv->mc13xxx);
return flags & MC13XXX_USE_TOUCHSCREEN;
}
static int __init mc13783_adc_probe(struct platform_device *pdev)
{
struct mc13783_adc_priv *priv;
int ret;
const struct platform_device_id *id = platform_get_device_id(pdev);
char *dash;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->mc13xxx = dev_get_drvdata(pdev->dev.parent);
snprintf(priv->name, ARRAY_SIZE(priv->name), "%s", id->name);
dash = strchr(priv->name, '-');
if (dash)
*dash = '\0';
platform_set_drvdata(pdev, priv);
/* Register sysfs hooks */
ret = sysfs_create_group(&pdev->dev.kobj, &mc13783_group_base);
if (ret)
return ret;
if (id->driver_data & MC13783_ADC_16CHANS) {
ret = sysfs_create_group(&pdev->dev.kobj,
&mc13783_group_16chans);
if (ret)
goto out_err_create_16chans;
}
if (!mc13783_adc_use_touchscreen(pdev)) {
ret = sysfs_create_group(&pdev->dev.kobj, &mc13783_group_ts);
if (ret)
goto out_err_create_ts;
}
priv->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(priv->hwmon_dev)) {
ret = PTR_ERR(priv->hwmon_dev);
dev_err(&pdev->dev,
"hwmon_device_register failed with %d.\n", ret);
goto out_err_register;
}
return 0;
out_err_register:
if (!mc13783_adc_use_touchscreen(pdev))
sysfs_remove_group(&pdev->dev.kobj, &mc13783_group_ts);
out_err_create_ts:
if (id->driver_data & MC13783_ADC_16CHANS)
sysfs_remove_group(&pdev->dev.kobj, &mc13783_group_16chans);
out_err_create_16chans:
sysfs_remove_group(&pdev->dev.kobj, &mc13783_group_base);
return ret;
}
static int mc13783_adc_remove(struct platform_device *pdev)
{
struct mc13783_adc_priv *priv = platform_get_drvdata(pdev);
kernel_ulong_t driver_data = platform_get_device_id(pdev)->driver_data;
hwmon_device_unregister(priv->hwmon_dev);
if (!mc13783_adc_use_touchscreen(pdev))
sysfs_remove_group(&pdev->dev.kobj, &mc13783_group_ts);
if (driver_data & MC13783_ADC_16CHANS)
sysfs_remove_group(&pdev->dev.kobj, &mc13783_group_16chans);
sysfs_remove_group(&pdev->dev.kobj, &mc13783_group_base);
return 0;
}
static const struct platform_device_id mc13783_adc_idtable[] = {
{
.name = "mc13783-adc",
.driver_data = MC13783_ADC_16CHANS,
}, {
.name = "mc13892-adc",
.driver_data = MC13783_ADC_BPDIV2,
}, {
/* sentinel */
}
};
MODULE_DEVICE_TABLE(platform, mc13783_adc_idtable);
static struct platform_driver mc13783_adc_driver = {
.remove = mc13783_adc_remove,
.driver = {
.name = DRIVER_NAME,
},
.id_table = mc13783_adc_idtable,
};
module_platform_driver_probe(mc13783_adc_driver, mc13783_adc_probe);
MODULE_DESCRIPTION("MC13783 ADC driver");
MODULE_AUTHOR("Luotao Fu <[email protected]>");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/mc13783-adc.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* smsc47m192.c - Support for hardware monitoring block of
* SMSC LPC47M192 and compatible Super I/O chips
*
* Copyright (C) 2006 Hartmut Rick <[email protected]>
*
* Derived from lm78.c and other chip drivers.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/sysfs.h>
#include <linux/mutex.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };
/* SMSC47M192 registers */
#define SMSC47M192_REG_IN(nr) ((nr) < 6 ? (0x20 + (nr)) : \
(0x50 + (nr) - 6))
#define SMSC47M192_REG_IN_MAX(nr) ((nr) < 6 ? (0x2b + (nr) * 2) : \
(0x54 + (((nr) - 6) * 2)))
#define SMSC47M192_REG_IN_MIN(nr) ((nr) < 6 ? (0x2c + (nr) * 2) : \
(0x55 + (((nr) - 6) * 2)))
static u8 SMSC47M192_REG_TEMP[3] = { 0x27, 0x26, 0x52 };
static u8 SMSC47M192_REG_TEMP_MAX[3] = { 0x39, 0x37, 0x58 };
static u8 SMSC47M192_REG_TEMP_MIN[3] = { 0x3A, 0x38, 0x59 };
#define SMSC47M192_REG_TEMP_OFFSET(nr) ((nr) == 2 ? 0x1e : 0x1f)
#define SMSC47M192_REG_ALARM1 0x41
#define SMSC47M192_REG_ALARM2 0x42
#define SMSC47M192_REG_VID 0x47
#define SMSC47M192_REG_VID4 0x49
#define SMSC47M192_REG_CONFIG 0x40
#define SMSC47M192_REG_SFR 0x4f
#define SMSC47M192_REG_COMPANY_ID 0x3e
#define SMSC47M192_REG_VERSION 0x3f
/* generalised scaling with integer rounding */
static inline int SCALE(long val, int mul, int div)
{
if (val < 0)
return (val * mul - div / 2) / div;
else
return (val * mul + div / 2) / div;
}
/* Conversions */
/* smsc47m192 internally scales voltage measurements */
static const u16 nom_mv[] = { 2500, 2250, 3300, 5000, 12000, 3300, 1500, 1800 };
static inline unsigned int IN_FROM_REG(u8 reg, int n)
{
return SCALE(reg, nom_mv[n], 192);
}
static inline u8 IN_TO_REG(unsigned long val, int n)
{
val = clamp_val(val, 0, nom_mv[n] * 255 / 192);
return SCALE(val, 192, nom_mv[n]);
}
/*
* TEMP: 0.001 degC units (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static inline s8 TEMP_TO_REG(long val)
{
return SCALE(clamp_val(val, -128000, 127000), 1, 1000);
}
static inline int TEMP_FROM_REG(s8 val)
{
return val * 1000;
}
struct smsc47m192_data {
struct i2c_client *client;
const struct attribute_group *groups[3];
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 in[8]; /* Register value */
u8 in_max[8]; /* Register value */
u8 in_min[8]; /* Register value */
s8 temp[3]; /* Register value */
s8 temp_max[3]; /* Register value */
s8 temp_min[3]; /* Register value */
s8 temp_offset[3]; /* Register value */
u16 alarms; /* Register encoding, combined */
u8 vid; /* Register encoding, combined */
u8 vrm;
};
static struct smsc47m192_data *smsc47m192_update_device(struct device *dev)
{
struct smsc47m192_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i, config;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR);
dev_dbg(&client->dev, "Starting smsc47m192 update\n");
for (i = 0; i <= 7; i++) {
data->in[i] = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_IN(i));
data->in_min[i] = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_IN_MIN(i));
data->in_max[i] = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_IN_MAX(i));
}
for (i = 0; i < 3; i++) {
data->temp[i] = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_TEMP[i]);
data->temp_max[i] = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_TEMP_MAX[i]);
data->temp_min[i] = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_TEMP_MIN[i]);
}
for (i = 1; i < 3; i++)
data->temp_offset[i] = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_TEMP_OFFSET(i));
/*
* first offset is temp_offset[0] if SFR bit 4 is set,
* temp_offset[1] otherwise
*/
if (sfr & 0x10) {
data->temp_offset[0] = data->temp_offset[1];
data->temp_offset[1] = 0;
} else
data->temp_offset[0] = 0;
data->vid = i2c_smbus_read_byte_data(client, SMSC47M192_REG_VID)
& 0x0f;
config = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_CONFIG);
if (config & 0x20)
data->vid |= (i2c_smbus_read_byte_data(client,
SMSC47M192_REG_VID4) & 0x01) << 4;
data->alarms = i2c_smbus_read_byte_data(client,
SMSC47M192_REG_ALARM1) |
(i2c_smbus_read_byte_data(client,
SMSC47M192_REG_ALARM2) << 8);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* Voltages */
static ssize_t in_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr], nr));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr], nr));
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr], nr));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = IN_TO_REG(val, nr);
i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MIN(nr),
data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = IN_TO_REG(val, nr);
i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MAX(nr),
data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, in, 5);
static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, in, 6);
static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, in, 7);
static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
/* Temperatures */
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
}
static ssize_t temp_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_min[nr]));
}
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[nr]));
}
static ssize_t temp_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_min[nr] = TEMP_TO_REG(val);
i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MIN[nr],
data->temp_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_max[nr] = TEMP_TO_REG(val);
i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MAX[nr],
data->temp_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_offset_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_offset[nr]));
}
static ssize_t temp_offset_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_offset[nr] = TEMP_TO_REG(val);
if (nr > 1)
i2c_smbus_write_byte_data(client,
SMSC47M192_REG_TEMP_OFFSET(nr), data->temp_offset[nr]);
else if (data->temp_offset[nr] != 0) {
/*
* offset[0] and offset[1] share the same register,
* SFR bit 4 activates offset[0]
*/
i2c_smbus_write_byte_data(client, SMSC47M192_REG_SFR,
(sfr & 0xef) | (nr == 0 ? 0x10 : 0));
data->temp_offset[1-nr] = 0;
i2c_smbus_write_byte_data(client,
SMSC47M192_REG_TEMP_OFFSET(nr), data->temp_offset[nr]);
} else if ((sfr & 0x10) == (nr == 0 ? 0x10 : 0))
i2c_smbus_write_byte_data(client,
SMSC47M192_REG_TEMP_OFFSET(nr), 0);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_offset, temp_offset, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_offset, temp_offset, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_offset, temp_offset, 2);
/* VID */
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct smsc47m192_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct smsc47m192_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
/* Alarms */
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct smsc47m192_data *data = smsc47m192_update_device(dev);
return sprintf(buf, "%u\n", (data->alarms & nr) ? 1 : 0);
}
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 0x0010);
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 0x0020);
static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 0x0040);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 0x4000);
static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 0x8000);
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0x0001);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 0x0002);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 0x0004);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 0x0008);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 0x0100);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 0x0200);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 0x0400);
static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 0x0800);
static struct attribute *smsc47m192_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_offset.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
NULL
};
static const struct attribute_group smsc47m192_group = {
.attrs = smsc47m192_attributes,
};
static struct attribute *smsc47m192_attributes_in4[] = {
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group smsc47m192_group_in4 = {
.attrs = smsc47m192_attributes_in4,
};
static void smsc47m192_init_client(struct i2c_client *client)
{
int i;
u8 config = i2c_smbus_read_byte_data(client, SMSC47M192_REG_CONFIG);
u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR);
/* select cycle mode (pause 1 sec between updates) */
i2c_smbus_write_byte_data(client, SMSC47M192_REG_SFR,
(sfr & 0xfd) | 0x02);
if (!(config & 0x01)) {
/* initialize alarm limits */
for (i = 0; i < 8; i++) {
i2c_smbus_write_byte_data(client,
SMSC47M192_REG_IN_MIN(i), 0);
i2c_smbus_write_byte_data(client,
SMSC47M192_REG_IN_MAX(i), 0xff);
}
for (i = 0; i < 3; i++) {
i2c_smbus_write_byte_data(client,
SMSC47M192_REG_TEMP_MIN[i], 0x80);
i2c_smbus_write_byte_data(client,
SMSC47M192_REG_TEMP_MAX[i], 0x7f);
}
/* start monitoring */
i2c_smbus_write_byte_data(client, SMSC47M192_REG_CONFIG,
(config & 0xf7) | 0x01);
}
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int smsc47m192_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int version;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* Detection criteria from sensors_detect script */
version = i2c_smbus_read_byte_data(client, SMSC47M192_REG_VERSION);
if (i2c_smbus_read_byte_data(client,
SMSC47M192_REG_COMPANY_ID) == 0x55
&& (version & 0xf0) == 0x20
&& (i2c_smbus_read_byte_data(client,
SMSC47M192_REG_VID) & 0x70) == 0x00
&& (i2c_smbus_read_byte_data(client,
SMSC47M192_REG_VID4) & 0xfe) == 0x80) {
dev_info(&adapter->dev,
"found SMSC47M192 or compatible, "
"version 2, stepping A%d\n", version & 0x0f);
} else {
dev_dbg(&adapter->dev,
"SMSC47M192 detection failed at 0x%02x\n",
client->addr);
return -ENODEV;
}
strscpy(info->type, "smsc47m192", I2C_NAME_SIZE);
return 0;
}
static int smsc47m192_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct smsc47m192_data *data;
int config;
data = devm_kzalloc(dev, sizeof(struct smsc47m192_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
data->vrm = vid_which_vrm();
mutex_init(&data->update_lock);
/* Initialize the SMSC47M192 chip */
smsc47m192_init_client(client);
/* sysfs hooks */
data->groups[0] = &smsc47m192_group;
/* Pin 110 is either in4 (+12V) or VID4 */
config = i2c_smbus_read_byte_data(client, SMSC47M192_REG_CONFIG);
if (!(config & 0x20))
data->groups[1] = &smsc47m192_group_in4;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id smsc47m192_id[] = {
{ "smsc47m192", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, smsc47m192_id);
static struct i2c_driver smsc47m192_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "smsc47m192",
},
.probe = smsc47m192_probe,
.id_table = smsc47m192_id,
.detect = smsc47m192_detect,
.address_list = normal_i2c,
};
module_i2c_driver(smsc47m192_driver);
MODULE_AUTHOR("Hartmut Rick <[email protected]>");
MODULE_DESCRIPTION("SMSC47M192 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/smsc47m192.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* mcp3021.c - driver for Microchip MCP3021 and MCP3221
*
* Copyright (C) 2008-2009, 2012 Freescale Semiconductor, Inc.
* Author: Mingkai Hu <[email protected]>
* Reworked by Sven Schuchmann <[email protected]>
* DT support added by Clemens Gruber <[email protected]>
*
* This driver exports the value of analog input voltage to sysfs, the
* voltage unit is mV. Through the sysfs interface, lm-sensors tool
* can also display the input voltage.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/hwmon.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/err.h>
#include <linux/device.h>
#include <linux/of.h>
/* Vdd / reference voltage in millivolt */
#define MCP3021_VDD_REF_MAX 5500
#define MCP3021_VDD_REF_MIN 2700
#define MCP3021_VDD_REF_DEFAULT 3300
/* output format */
#define MCP3021_SAR_SHIFT 2
#define MCP3021_SAR_MASK 0x3ff
#define MCP3021_OUTPUT_RES 10 /* 10-bit resolution */
#define MCP3221_SAR_SHIFT 0
#define MCP3221_SAR_MASK 0xfff
#define MCP3221_OUTPUT_RES 12 /* 12-bit resolution */
enum chips {
mcp3021,
mcp3221
};
/*
* Client data (each client gets its own)
*/
struct mcp3021_data {
struct i2c_client *client;
u32 vdd; /* supply and reference voltage in millivolt */
u16 sar_shift;
u16 sar_mask;
u8 output_res;
};
static inline u16 volts_from_reg(struct mcp3021_data *data, u16 val)
{
return DIV_ROUND_CLOSEST(data->vdd * val, 1 << data->output_res);
}
static int mcp3021_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct mcp3021_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
__be16 buf;
u16 reg;
int ret;
if (type != hwmon_in)
return -EOPNOTSUPP;
ret = i2c_master_recv(client, (char *)&buf, 2);
if (ret < 0)
return ret;
if (ret != 2)
return -EIO;
/* The output code of the MCP3021 is transmitted with MSB first. */
reg = be16_to_cpu(buf);
/*
* The ten-bit output code is composed of the lower 4-bit of the
* first byte and the upper 6-bit of the second byte.
*/
reg = (reg >> data->sar_shift) & data->sar_mask;
*val = volts_from_reg(data, reg);
return 0;
}
static umode_t mcp3021_is_visible(const void *_data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
if (type != hwmon_in)
return 0;
if (attr != hwmon_in_input)
return 0;
return 0444;
}
static const struct hwmon_channel_info * const mcp3021_info[] = {
HWMON_CHANNEL_INFO(in, HWMON_I_INPUT),
NULL
};
static const struct hwmon_ops mcp3021_hwmon_ops = {
.is_visible = mcp3021_is_visible,
.read = mcp3021_read,
};
static const struct hwmon_chip_info mcp3021_chip_info = {
.ops = &mcp3021_hwmon_ops,
.info = mcp3021_info,
};
static const struct i2c_device_id mcp3021_id[];
static int mcp3021_probe(struct i2c_client *client)
{
struct mcp3021_data *data = NULL;
struct device_node *np = client->dev.of_node;
struct device *hwmon_dev;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
return -ENODEV;
data = devm_kzalloc(&client->dev, sizeof(struct mcp3021_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
if (np) {
if (!of_property_read_u32(np, "reference-voltage-microvolt",
&data->vdd))
data->vdd /= 1000;
else
data->vdd = MCP3021_VDD_REF_DEFAULT;
} else {
u32 *pdata = dev_get_platdata(&client->dev);
if (pdata)
data->vdd = *pdata;
else
data->vdd = MCP3021_VDD_REF_DEFAULT;
}
switch (i2c_match_id(mcp3021_id, client)->driver_data) {
case mcp3021:
data->sar_shift = MCP3021_SAR_SHIFT;
data->sar_mask = MCP3021_SAR_MASK;
data->output_res = MCP3021_OUTPUT_RES;
break;
case mcp3221:
data->sar_shift = MCP3221_SAR_SHIFT;
data->sar_mask = MCP3221_SAR_MASK;
data->output_res = MCP3221_OUTPUT_RES;
break;
}
data->client = client;
if (data->vdd > MCP3021_VDD_REF_MAX || data->vdd < MCP3021_VDD_REF_MIN)
return -EINVAL;
hwmon_dev = devm_hwmon_device_register_with_info(&client->dev,
client->name,
data,
&mcp3021_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id mcp3021_id[] = {
{ "mcp3021", mcp3021 },
{ "mcp3221", mcp3221 },
{ }
};
MODULE_DEVICE_TABLE(i2c, mcp3021_id);
#ifdef CONFIG_OF
static const struct of_device_id of_mcp3021_match[] = {
{ .compatible = "microchip,mcp3021", .data = (void *)mcp3021 },
{ .compatible = "microchip,mcp3221", .data = (void *)mcp3221 },
{ }
};
MODULE_DEVICE_TABLE(of, of_mcp3021_match);
#endif
static struct i2c_driver mcp3021_driver = {
.driver = {
.name = "mcp3021",
.of_match_table = of_match_ptr(of_mcp3021_match),
},
.probe = mcp3021_probe,
.id_table = mcp3021_id,
};
module_i2c_driver(mcp3021_driver);
MODULE_AUTHOR("Mingkai Hu <[email protected]>");
MODULE_DESCRIPTION("Microchip MCP3021/MCP3221 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/mcp3021.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm87.c
*
* Copyright (C) 2000 Frodo Looijaard <[email protected]>
* Philip Edelbrock <[email protected]>
* Stephen Rousset <[email protected]>
* Dan Eaton <[email protected]>
* Copyright (C) 2004-2008 Jean Delvare <[email protected]>
*
* Original port to Linux 2.6 by Jeff Oliver.
*
* The LM87 is a sensor chip made by National Semiconductor. It monitors up
* to 8 voltages (including its own power source), up to three temperatures
* (its own plus up to two external ones) and up to two fans. The default
* configuration is 6 voltages, two temperatures and two fans (see below).
* Voltages are scaled internally with ratios such that the nominal value of
* each voltage correspond to a register value of 192 (which means a
* resolution of about 0.5% of the nominal value). Temperature values are
* reported with a 1 deg resolution and a 3-4 deg accuracy. Complete
* datasheet can be obtained from National's website at:
* http://www.national.com/pf/LM/LM87.html
*
* Some functions share pins, so not all functions are available at the same
* time. Which are depends on the hardware setup. This driver normally
* assumes that firmware configured the chip correctly. Where this is not
* the case, platform code must set the I2C client's platform_data to point
* to a u8 value to be written to the channel register.
* For reference, here is the list of exclusive functions:
* - in0+in5 (default) or temp3
* - fan1 (default) or in6
* - fan2 (default) or in7
* - VID lines (default) or IRQ lines (not handled by this driver)
*
* The LM87 additionally features an analog output, supposedly usable to
* control the speed of a fan. All new chips use pulse width modulation
* instead. The LM87 is the only hardware monitoring chipset I know of
* which uses amplitude modulation. Be careful when using this feature.
*
* This driver also supports the ADM1024, a sensor chip made by Analog
* Devices. That chip is fully compatible with the LM87. Complete
* datasheet can be obtained from Analog's website at:
* https://www.analog.com/en/prod/0,2877,ADM1024,00.html
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/regulator/consumer.h>
/*
* Addresses to scan
* LM87 has three possible addresses: 0x2c, 0x2d and 0x2e.
*/
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
/*
* The LM87 registers
*/
/* nr in 0..5 */
#define LM87_REG_IN(nr) (0x20 + (nr))
#define LM87_REG_IN_MAX(nr) (0x2B + (nr) * 2)
#define LM87_REG_IN_MIN(nr) (0x2C + (nr) * 2)
/* nr in 0..1 */
#define LM87_REG_AIN(nr) (0x28 + (nr))
#define LM87_REG_AIN_MIN(nr) (0x1A + (nr))
#define LM87_REG_AIN_MAX(nr) (0x3B + (nr))
static u8 LM87_REG_TEMP[3] = { 0x27, 0x26, 0x20 };
static u8 LM87_REG_TEMP_HIGH[3] = { 0x39, 0x37, 0x2B };
static u8 LM87_REG_TEMP_LOW[3] = { 0x3A, 0x38, 0x2C };
#define LM87_REG_TEMP_HW_INT_LOCK 0x13
#define LM87_REG_TEMP_HW_EXT_LOCK 0x14
#define LM87_REG_TEMP_HW_INT 0x17
#define LM87_REG_TEMP_HW_EXT 0x18
/* nr in 0..1 */
#define LM87_REG_FAN(nr) (0x28 + (nr))
#define LM87_REG_FAN_MIN(nr) (0x3B + (nr))
#define LM87_REG_AOUT 0x19
#define LM87_REG_CONFIG 0x40
#define LM87_REG_CHANNEL_MODE 0x16
#define LM87_REG_VID_FAN_DIV 0x47
#define LM87_REG_VID4 0x49
#define LM87_REG_ALARMS1 0x41
#define LM87_REG_ALARMS2 0x42
#define LM87_REG_COMPANY_ID 0x3E
#define LM87_REG_REVISION 0x3F
/*
* Conversions and various macros
* The LM87 uses signed 8-bit values for temperatures.
*/
#define IN_FROM_REG(reg, scale) (((reg) * (scale) + 96) / 192)
#define IN_TO_REG(val, scale) ((val) <= 0 ? 0 : \
(val) >= (scale) * 255 / 192 ? 255 : \
((val) * 192 + (scale) / 2) / (scale))
#define TEMP_FROM_REG(reg) ((reg) * 1000)
#define TEMP_TO_REG(val) ((val) <= -127500 ? -128 : \
(val) >= 126500 ? 127 : \
(((val) < 0 ? (val) - 500 : \
(val) + 500) / 1000))
#define FAN_FROM_REG(reg, div) ((reg) == 255 || (reg) == 0 ? 0 : \
(1350000 + (reg)*(div) / 2) / ((reg) * (div)))
#define FAN_TO_REG(val, div) ((val) * (div) * 255 <= 1350000 ? 255 : \
(1350000 + (val)*(div) / 2) / ((val) * (div)))
#define FAN_DIV_FROM_REG(reg) (1 << (reg))
/* analog out is 9.80mV/LSB */
#define AOUT_FROM_REG(reg) (((reg) * 98 + 5) / 10)
#define AOUT_TO_REG(val) ((val) <= 0 ? 0 : \
(val) >= 2500 ? 255 : \
((val) * 10 + 49) / 98)
/* nr in 0..1 */
#define CHAN_NO_FAN(nr) (1 << (nr))
#define CHAN_TEMP3 (1 << 2)
#define CHAN_VCC_5V (1 << 3)
#define CHAN_NO_VID (1 << 7)
/*
* Client data (each client gets its own)
*/
struct lm87_data {
struct mutex update_lock;
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 channel; /* register value */
u8 config; /* original register value */
u8 in[8]; /* register value */
u8 in_max[8]; /* register value */
u8 in_min[8]; /* register value */
u16 in_scale[8];
s8 temp[3]; /* register value */
s8 temp_high[3]; /* register value */
s8 temp_low[3]; /* register value */
s8 temp_crit_int; /* min of two register values */
s8 temp_crit_ext; /* min of two register values */
u8 fan[2]; /* register value */
u8 fan_min[2]; /* register value */
u8 fan_div[2]; /* register value, shifted right */
u8 aout; /* register value */
u16 alarms; /* register values, combined */
u8 vid; /* register values, combined */
u8 vrm;
const struct attribute_group *attr_groups[6];
};
static inline int lm87_read_value(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_byte_data(client, reg);
}
static inline int lm87_write_value(struct i2c_client *client, u8 reg, u8 value)
{
return i2c_smbus_write_byte_data(client, reg, value);
}
static struct lm87_data *lm87_update_device(struct device *dev)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
int i, j;
dev_dbg(&client->dev, "Updating data.\n");
i = (data->channel & CHAN_TEMP3) ? 1 : 0;
j = (data->channel & CHAN_TEMP3) ? 5 : 6;
for (; i < j; i++) {
data->in[i] = lm87_read_value(client,
LM87_REG_IN(i));
data->in_min[i] = lm87_read_value(client,
LM87_REG_IN_MIN(i));
data->in_max[i] = lm87_read_value(client,
LM87_REG_IN_MAX(i));
}
for (i = 0; i < 2; i++) {
if (data->channel & CHAN_NO_FAN(i)) {
data->in[6+i] = lm87_read_value(client,
LM87_REG_AIN(i));
data->in_max[6+i] = lm87_read_value(client,
LM87_REG_AIN_MAX(i));
data->in_min[6+i] = lm87_read_value(client,
LM87_REG_AIN_MIN(i));
} else {
data->fan[i] = lm87_read_value(client,
LM87_REG_FAN(i));
data->fan_min[i] = lm87_read_value(client,
LM87_REG_FAN_MIN(i));
}
}
j = (data->channel & CHAN_TEMP3) ? 3 : 2;
for (i = 0 ; i < j; i++) {
data->temp[i] = lm87_read_value(client,
LM87_REG_TEMP[i]);
data->temp_high[i] = lm87_read_value(client,
LM87_REG_TEMP_HIGH[i]);
data->temp_low[i] = lm87_read_value(client,
LM87_REG_TEMP_LOW[i]);
}
i = lm87_read_value(client, LM87_REG_TEMP_HW_INT_LOCK);
j = lm87_read_value(client, LM87_REG_TEMP_HW_INT);
data->temp_crit_int = min(i, j);
i = lm87_read_value(client, LM87_REG_TEMP_HW_EXT_LOCK);
j = lm87_read_value(client, LM87_REG_TEMP_HW_EXT);
data->temp_crit_ext = min(i, j);
i = lm87_read_value(client, LM87_REG_VID_FAN_DIV);
data->fan_div[0] = (i >> 4) & 0x03;
data->fan_div[1] = (i >> 6) & 0x03;
data->vid = (i & 0x0F)
| (lm87_read_value(client, LM87_REG_VID4) & 0x01)
<< 4;
data->alarms = lm87_read_value(client, LM87_REG_ALARMS1)
| (lm87_read_value(client, LM87_REG_ALARMS2)
<< 8);
data->aout = lm87_read_value(client, LM87_REG_AOUT);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs stuff
*/
static ssize_t in_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", IN_FROM_REG(data->in[nr],
data->in_scale[nr]));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", IN_FROM_REG(data->in_min[nr],
data->in_scale[nr]));
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", IN_FROM_REG(data->in_max[nr],
data->in_scale[nr]));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
int nr = to_sensor_dev_attr(attr)->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = IN_TO_REG(val, data->in_scale[nr]);
lm87_write_value(client, nr < 6 ? LM87_REG_IN_MIN(nr) :
LM87_REG_AIN_MIN(nr - 6), data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
int nr = to_sensor_dev_attr(attr)->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = IN_TO_REG(val, data->in_scale[nr]);
lm87_write_value(client, nr < 6 ? LM87_REG_IN_MAX(nr) :
LM87_REG_AIN_MAX(nr - 6), data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in_input, 0);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in_input, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in_input, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in_input, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in_input, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, in_input, 5);
static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, in_input, 6);
static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, in_input, 7);
static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
static ssize_t temp_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
}
static ssize_t temp_low_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%d\n",
TEMP_FROM_REG(data->temp_low[nr]));
}
static ssize_t temp_high_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%d\n",
TEMP_FROM_REG(data->temp_high[nr]));
}
static ssize_t temp_low_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
int nr = to_sensor_dev_attr(attr)->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_low[nr] = TEMP_TO_REG(val);
lm87_write_value(client, LM87_REG_TEMP_LOW[nr], data->temp_low[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_high_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
int nr = to_sensor_dev_attr(attr)->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_high[nr] = TEMP_TO_REG(val);
lm87_write_value(client, LM87_REG_TEMP_HIGH[nr], data->temp_high[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_low, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_high, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_low, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_high, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp_input, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_low, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_high, 2);
static ssize_t temp1_crit_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_crit_int));
}
static ssize_t temp2_crit_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_crit_ext));
}
static DEVICE_ATTR_RO(temp1_crit);
static DEVICE_ATTR_RO(temp2_crit);
static DEVICE_ATTR(temp3_crit, 0444, temp2_crit_show, NULL);
static ssize_t fan_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
FAN_DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
FAN_DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_div_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int nr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%d\n",
FAN_DIV_FROM_REG(data->fan_div[nr]));
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
int nr = to_sensor_dev_attr(attr)->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val,
FAN_DIV_FROM_REG(data->fan_div[nr]));
lm87_write_value(client, LM87_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan clock divider. This follows the principle
* of least surprise; the user doesn't expect the fan minimum to change just
* because the divider changed.
*/
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
int nr = to_sensor_dev_attr(attr)->index;
long val;
int err;
unsigned long min;
u8 reg;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
min = FAN_FROM_REG(data->fan_min[nr],
FAN_DIV_FROM_REG(data->fan_div[nr]));
switch (val) {
case 1:
data->fan_div[nr] = 0;
break;
case 2:
data->fan_div[nr] = 1;
break;
case 4:
data->fan_div[nr] = 2;
break;
case 8:
data->fan_div[nr] = 3;
break;
default:
mutex_unlock(&data->update_lock);
return -EINVAL;
}
reg = lm87_read_value(client, LM87_REG_VID_FAN_DIV);
switch (nr) {
case 0:
reg = (reg & 0xCF) | (data->fan_div[0] << 4);
break;
case 1:
reg = (reg & 0x3F) | (data->fan_div[1] << 6);
break;
}
lm87_write_value(client, LM87_REG_VID_FAN_DIV, reg);
data->fan_min[nr] = FAN_TO_REG(min, val);
lm87_write_value(client, LM87_REG_FAN_MIN(nr),
data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
return sprintf(buf, "%d\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm87_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm87_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
static ssize_t aout_output_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
return sprintf(buf, "%d\n", AOUT_FROM_REG(data->aout));
}
static ssize_t aout_output_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = dev_get_drvdata(dev);
struct lm87_data *data = i2c_get_clientdata(client);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->aout = AOUT_TO_REG(val);
lm87_write_value(client, LM87_REG_AOUT, data->aout);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(aout_output);
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm87_data *data = lm87_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 9);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 14);
static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 15);
/*
* Real code
*/
static struct attribute *lm87_attributes[] = {
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&dev_attr_temp1_crit.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&dev_attr_temp2_crit.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_aout_output.attr,
NULL
};
static const struct attribute_group lm87_group = {
.attrs = lm87_attributes,
};
static struct attribute *lm87_attributes_in6[] = {
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm87_group_in6 = {
.attrs = lm87_attributes_in6,
};
static struct attribute *lm87_attributes_fan1[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm87_group_fan1 = {
.attrs = lm87_attributes_fan1,
};
static struct attribute *lm87_attributes_in7[] = {
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm87_group_in7 = {
.attrs = lm87_attributes_in7,
};
static struct attribute *lm87_attributes_fan2[] = {
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm87_group_fan2 = {
.attrs = lm87_attributes_fan2,
};
static struct attribute *lm87_attributes_temp3[] = {
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&dev_attr_temp3_crit.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
NULL
};
static const struct attribute_group lm87_group_temp3 = {
.attrs = lm87_attributes_temp3,
};
static struct attribute *lm87_attributes_in0_5[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm87_group_in0_5 = {
.attrs = lm87_attributes_in0_5,
};
static struct attribute *lm87_attributes_vid[] = {
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
NULL
};
static const struct attribute_group lm87_group_vid = {
.attrs = lm87_attributes_vid,
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm87_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
const char *name;
u8 cid, rev;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
if (lm87_read_value(client, LM87_REG_CONFIG) & 0x80)
return -ENODEV;
/* Now, we do the remaining detection. */
cid = lm87_read_value(client, LM87_REG_COMPANY_ID);
rev = lm87_read_value(client, LM87_REG_REVISION);
if (cid == 0x02 /* National Semiconductor */
&& (rev >= 0x01 && rev <= 0x08))
name = "lm87";
else if (cid == 0x41 /* Analog Devices */
&& (rev & 0xf0) == 0x10)
name = "adm1024";
else {
dev_dbg(&adapter->dev, "LM87 detection failed at 0x%02x\n",
client->addr);
return -ENODEV;
}
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static void lm87_restore_config(void *arg)
{
struct i2c_client *client = arg;
struct lm87_data *data = i2c_get_clientdata(client);
lm87_write_value(client, LM87_REG_CONFIG, data->config);
}
static int lm87_init_client(struct i2c_client *client)
{
struct lm87_data *data = i2c_get_clientdata(client);
int rc;
struct device_node *of_node = client->dev.of_node;
u8 val = 0;
struct regulator *vcc = NULL;
if (of_node) {
if (of_property_read_bool(of_node, "has-temp3"))
val |= CHAN_TEMP3;
if (of_property_read_bool(of_node, "has-in6"))
val |= CHAN_NO_FAN(0);
if (of_property_read_bool(of_node, "has-in7"))
val |= CHAN_NO_FAN(1);
vcc = devm_regulator_get_optional(&client->dev, "vcc");
if (!IS_ERR(vcc)) {
if (regulator_get_voltage(vcc) == 5000000)
val |= CHAN_VCC_5V;
}
data->channel = val;
lm87_write_value(client,
LM87_REG_CHANNEL_MODE, data->channel);
} else if (dev_get_platdata(&client->dev)) {
data->channel = *(u8 *)dev_get_platdata(&client->dev);
lm87_write_value(client,
LM87_REG_CHANNEL_MODE, data->channel);
} else {
data->channel = lm87_read_value(client, LM87_REG_CHANNEL_MODE);
}
data->config = lm87_read_value(client, LM87_REG_CONFIG) & 0x6F;
rc = devm_add_action(&client->dev, lm87_restore_config, client);
if (rc)
return rc;
if (!(data->config & 0x01)) {
int i;
/* Limits are left uninitialized after power-up */
for (i = 1; i < 6; i++) {
lm87_write_value(client, LM87_REG_IN_MIN(i), 0x00);
lm87_write_value(client, LM87_REG_IN_MAX(i), 0xFF);
}
for (i = 0; i < 2; i++) {
lm87_write_value(client, LM87_REG_TEMP_HIGH[i], 0x7F);
lm87_write_value(client, LM87_REG_TEMP_LOW[i], 0x00);
lm87_write_value(client, LM87_REG_AIN_MIN(i), 0x00);
lm87_write_value(client, LM87_REG_AIN_MAX(i), 0xFF);
}
if (data->channel & CHAN_TEMP3) {
lm87_write_value(client, LM87_REG_TEMP_HIGH[2], 0x7F);
lm87_write_value(client, LM87_REG_TEMP_LOW[2], 0x00);
} else {
lm87_write_value(client, LM87_REG_IN_MIN(0), 0x00);
lm87_write_value(client, LM87_REG_IN_MAX(0), 0xFF);
}
}
/* Make sure Start is set and INT#_Clear is clear */
if ((data->config & 0x09) != 0x01)
lm87_write_value(client, LM87_REG_CONFIG,
(data->config & 0x77) | 0x01);
return 0;
}
static int lm87_probe(struct i2c_client *client)
{
struct lm87_data *data;
struct device *hwmon_dev;
int err;
unsigned int group_tail = 0;
data = devm_kzalloc(&client->dev, sizeof(struct lm87_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
/* Initialize the LM87 chip */
err = lm87_init_client(client);
if (err)
return err;
data->in_scale[0] = 2500;
data->in_scale[1] = 2700;
data->in_scale[2] = (data->channel & CHAN_VCC_5V) ? 5000 : 3300;
data->in_scale[3] = 5000;
data->in_scale[4] = 12000;
data->in_scale[5] = 2700;
data->in_scale[6] = 1875;
data->in_scale[7] = 1875;
/*
* Construct the list of attributes, the list depends on the
* configuration of the chip
*/
data->attr_groups[group_tail++] = &lm87_group;
if (data->channel & CHAN_NO_FAN(0))
data->attr_groups[group_tail++] = &lm87_group_in6;
else
data->attr_groups[group_tail++] = &lm87_group_fan1;
if (data->channel & CHAN_NO_FAN(1))
data->attr_groups[group_tail++] = &lm87_group_in7;
else
data->attr_groups[group_tail++] = &lm87_group_fan2;
if (data->channel & CHAN_TEMP3)
data->attr_groups[group_tail++] = &lm87_group_temp3;
else
data->attr_groups[group_tail++] = &lm87_group_in0_5;
if (!(data->channel & CHAN_NO_VID)) {
data->vrm = vid_which_vrm();
data->attr_groups[group_tail++] = &lm87_group_vid;
}
hwmon_dev = devm_hwmon_device_register_with_groups(
&client->dev, client->name, client, data->attr_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/*
* Driver data (common to all clients)
*/
static const struct i2c_device_id lm87_id[] = {
{ "lm87", 0 },
{ "adm1024", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm87_id);
static const struct of_device_id lm87_of_match[] = {
{ .compatible = "ti,lm87" },
{ .compatible = "adi,adm1024" },
{ },
};
MODULE_DEVICE_TABLE(of, lm87_of_match);
static struct i2c_driver lm87_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm87",
.of_match_table = lm87_of_match,
},
.probe = lm87_probe,
.id_table = lm87_id,
.detect = lm87_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm87_driver);
MODULE_AUTHOR("Jean Delvare <[email protected]> and others");
MODULE_DESCRIPTION("LM87 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm87.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* hwmon-vid.c - VID/VRM/VRD voltage conversions
*
* Copyright (c) 2004 Rudolf Marek <[email protected]>
*
* Partly imported from i2c-vid.h of the lm_sensors project
* Copyright (c) 2002 Mark D. Studebaker <[email protected]>
* With assistance from Trent Piepho <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/hwmon-vid.h>
/*
* Common code for decoding VID pins.
*
* References:
*
* For VRM 8.4 to 9.1, "VRM x.y DC-DC Converter Design Guidelines",
* available at http://developer.intel.com/.
*
* For VRD 10.0 and up, "VRD x.y Design Guide",
* available at http://developer.intel.com/.
*
* AMD Athlon 64 and AMD Opteron Processors, AMD Publication 26094,
* http://support.amd.com/us/Processor_TechDocs/26094.PDF
* Table 74. VID Code Voltages
* This corresponds to an arbitrary VRM code of 24 in the functions below.
* These CPU models (K8 revision <= E) have 5 VID pins. See also:
* Revision Guide for AMD Athlon 64 and AMD Opteron Processors, AMD Publication 25759,
* http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25759.pdf
*
* AMD NPT Family 0Fh Processors, AMD Publication 32559,
* http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf
* Table 71. VID Code Voltages
* This corresponds to an arbitrary VRM code of 25 in the functions below.
* These CPU models (K8 revision >= F) have 6 VID pins. See also:
* Revision Guide for AMD NPT Family 0Fh Processors, AMD Publication 33610,
* http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
*
* The 17 specification is in fact Intel Mobile Voltage Positioning -
* (IMVP-II). You can find more information in the datasheet of Max1718
* http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452
*
* The 13 specification corresponds to the Intel Pentium M series. There
* doesn't seem to be any named specification for these. The conversion
* tables are detailed directly in the various Pentium M datasheets:
* https://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm
*
* The 14 specification corresponds to Intel Core series. There
* doesn't seem to be any named specification for these. The conversion
* tables are detailed directly in the various Pentium Core datasheets:
* https://www.intel.com/design/mobile/datashts/309221.htm
*
* The 110 (VRM 11) specification corresponds to Intel Conroe based series.
* https://www.intel.com/design/processor/applnots/313214.htm
*/
/*
* vrm is the VRM/VRD document version multiplied by 10.
* val is the 4-bit or more VID code.
* Returned value is in mV to avoid floating point in the kernel.
* Some VID have some bits in uV scale, this is rounded to mV.
*/
int vid_from_reg(int val, u8 vrm)
{
int vid;
switch (vrm) {
case 100: /* VRD 10.0 */
/* compute in uV, round to mV */
val &= 0x3f;
if ((val & 0x1f) == 0x1f)
return 0;
if ((val & 0x1f) <= 0x09 || val == 0x0a)
vid = 1087500 - (val & 0x1f) * 25000;
else
vid = 1862500 - (val & 0x1f) * 25000;
if (val & 0x20)
vid -= 12500;
return (vid + 500) / 1000;
case 110: /* Intel Conroe */
/* compute in uV, round to mV */
val &= 0xff;
if (val < 0x02 || val > 0xb2)
return 0;
return (1600000 - (val - 2) * 6250 + 500) / 1000;
case 24: /* Athlon64 & Opteron */
val &= 0x1f;
if (val == 0x1f)
return 0;
fallthrough;
case 25: /* AMD NPT 0Fh */
val &= 0x3f;
return (val < 32) ? 1550 - 25 * val
: 775 - (25 * (val - 31)) / 2;
case 26: /* AMD family 10h to 15h, serial VID */
val &= 0x7f;
if (val >= 0x7c)
return 0;
return DIV_ROUND_CLOSEST(15500 - 125 * val, 10);
case 91: /* VRM 9.1 */
case 90: /* VRM 9.0 */
val &= 0x1f;
return val == 0x1f ? 0 :
1850 - val * 25;
case 85: /* VRM 8.5 */
val &= 0x1f;
return (val & 0x10 ? 25 : 0) +
((val & 0x0f) > 0x04 ? 2050 : 1250) -
((val & 0x0f) * 50);
case 84: /* VRM 8.4 */
val &= 0x0f;
fallthrough;
case 82: /* VRM 8.2 */
val &= 0x1f;
return val == 0x1f ? 0 :
val & 0x10 ? 5100 - (val) * 100 :
2050 - (val) * 50;
case 17: /* Intel IMVP-II */
val &= 0x1f;
return val & 0x10 ? 975 - (val & 0xF) * 25 :
1750 - val * 50;
case 13:
case 131:
val &= 0x3f;
/* Exception for Eden ULV 500 MHz */
if (vrm == 131 && val == 0x3f)
val++;
return 1708 - val * 16;
case 14: /* Intel Core */
/* compute in uV, round to mV */
val &= 0x7f;
return val > 0x77 ? 0 : (1500000 - (val * 12500) + 500) / 1000;
default: /* report 0 for unknown */
if (vrm)
pr_warn("Requested unsupported VRM version (%u)\n",
(unsigned int)vrm);
return 0;
}
}
EXPORT_SYMBOL(vid_from_reg);
/*
* After this point is the code to automatically determine which
* VRM/VRD specification should be used depending on the CPU.
*/
struct vrm_model {
u8 vendor;
u8 family;
u8 model_from;
u8 model_to;
u8 stepping_to;
u8 vrm_type;
};
#define ANY 0xFF
#ifdef CONFIG_X86
/*
* The stepping_to parameter is highest acceptable stepping for current line.
* The model match must be exact for 4-bit values. For model values 0x10
* and above (extended model), all models below the parameter will match.
*/
static struct vrm_model vrm_models[] = {
{X86_VENDOR_AMD, 0x6, 0x0, ANY, ANY, 90}, /* Athlon Duron etc */
{X86_VENDOR_AMD, 0xF, 0x0, 0x3F, ANY, 24}, /* Athlon 64, Opteron */
/*
* In theory, all NPT family 0Fh processors have 6 VID pins and should
* thus use vrm 25, however in practice not all mainboards route the
* 6th VID pin because it is never needed. So we use the 5 VID pin
* variant (vrm 24) for the models which exist today.
*/
{X86_VENDOR_AMD, 0xF, 0x40, 0x7F, ANY, 24}, /* NPT family 0Fh */
{X86_VENDOR_AMD, 0xF, 0x80, ANY, ANY, 25}, /* future fam. 0Fh */
{X86_VENDOR_AMD, 0x10, 0x0, ANY, ANY, 25}, /* NPT family 10h */
{X86_VENDOR_AMD, 0x11, 0x0, ANY, ANY, 26}, /* family 11h */
{X86_VENDOR_AMD, 0x12, 0x0, ANY, ANY, 26}, /* family 12h */
{X86_VENDOR_AMD, 0x14, 0x0, ANY, ANY, 26}, /* family 14h */
{X86_VENDOR_AMD, 0x15, 0x0, ANY, ANY, 26}, /* family 15h */
{X86_VENDOR_INTEL, 0x6, 0x0, 0x6, ANY, 82}, /* Pentium Pro,
* Pentium II, Xeon,
* Mobile Pentium,
* Celeron */
{X86_VENDOR_INTEL, 0x6, 0x7, 0x7, ANY, 84}, /* Pentium III, Xeon */
{X86_VENDOR_INTEL, 0x6, 0x8, 0x8, ANY, 82}, /* Pentium III, Xeon */
{X86_VENDOR_INTEL, 0x6, 0x9, 0x9, ANY, 13}, /* Pentium M (130 nm) */
{X86_VENDOR_INTEL, 0x6, 0xA, 0xA, ANY, 82}, /* Pentium III Xeon */
{X86_VENDOR_INTEL, 0x6, 0xB, 0xB, ANY, 85}, /* Tualatin */
{X86_VENDOR_INTEL, 0x6, 0xD, 0xD, ANY, 13}, /* Pentium M (90 nm) */
{X86_VENDOR_INTEL, 0x6, 0xE, 0xE, ANY, 14}, /* Intel Core (65 nm) */
{X86_VENDOR_INTEL, 0x6, 0xF, ANY, ANY, 110}, /* Intel Conroe and
* later */
{X86_VENDOR_INTEL, 0xF, 0x0, 0x0, ANY, 90}, /* P4 */
{X86_VENDOR_INTEL, 0xF, 0x1, 0x1, ANY, 90}, /* P4 Willamette */
{X86_VENDOR_INTEL, 0xF, 0x2, 0x2, ANY, 90}, /* P4 Northwood */
{X86_VENDOR_INTEL, 0xF, 0x3, ANY, ANY, 100}, /* Prescott and above
* assume VRD 10 */
{X86_VENDOR_CENTAUR, 0x6, 0x7, 0x7, ANY, 85}, /* Eden ESP/Ezra */
{X86_VENDOR_CENTAUR, 0x6, 0x8, 0x8, 0x7, 85}, /* Ezra T */
{X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, 0x7, 85}, /* Nehemiah */
{X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, ANY, 17}, /* C3-M, Eden-N */
{X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, 0x7, 0}, /* No information */
{X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, ANY, 13}, /* C7-M, C7,
* Eden (Esther) */
{X86_VENDOR_CENTAUR, 0x6, 0xD, 0xD, ANY, 134}, /* C7-D, C7-M, C7,
* Eden (Esther) */
};
/*
* Special case for VIA model D: there are two different possible
* VID tables, so we have to figure out first, which one must be
* used. This resolves temporary drm value 134 to 14 (Intel Core
* 7-bit VID), 13 (Pentium M 6-bit VID) or 131 (Pentium M 6-bit VID
* + quirk for Eden ULV 500 MHz).
* Note: something similar might be needed for model A, I'm not sure.
*/
static u8 get_via_model_d_vrm(void)
{
unsigned int vid, brand, __maybe_unused dummy;
static const char *brands[4] = {
"C7-M", "C7", "Eden", "C7-D"
};
rdmsr(0x198, dummy, vid);
vid &= 0xff;
rdmsr(0x1154, brand, dummy);
brand = ((brand >> 4) ^ (brand >> 2)) & 0x03;
if (vid > 0x3f) {
pr_info("Using %d-bit VID table for VIA %s CPU\n",
7, brands[brand]);
return 14;
} else {
pr_info("Using %d-bit VID table for VIA %s CPU\n",
6, brands[brand]);
/* Enable quirk for Eden */
return brand == 2 ? 131 : 13;
}
}
static u8 find_vrm(u8 family, u8 model, u8 stepping, u8 vendor)
{
int i;
for (i = 0; i < ARRAY_SIZE(vrm_models); i++) {
if (vendor == vrm_models[i].vendor &&
family == vrm_models[i].family &&
model >= vrm_models[i].model_from &&
model <= vrm_models[i].model_to &&
stepping <= vrm_models[i].stepping_to)
return vrm_models[i].vrm_type;
}
return 0;
}
u8 vid_which_vrm(void)
{
struct cpuinfo_x86 *c = &cpu_data(0);
u8 vrm_ret;
if (c->x86 < 6) /* Any CPU with family lower than 6 */
return 0; /* doesn't have VID */
vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_stepping, c->x86_vendor);
if (vrm_ret == 134)
vrm_ret = get_via_model_d_vrm();
if (vrm_ret == 0)
pr_info("Unknown VRM version of your x86 CPU\n");
return vrm_ret;
}
/* and now for something completely different for the non-x86 world */
#else
u8 vid_which_vrm(void)
{
pr_info("Unknown VRM version of your CPU\n");
return 0;
}
#endif
EXPORT_SYMBOL(vid_which_vrm);
MODULE_AUTHOR("Rudolf Marek <[email protected]>");
MODULE_DESCRIPTION("hwmon-vid driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/hwmon-vid.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Lochnagar hardware monitoring features
*
* Copyright (c) 2016-2019 Cirrus Logic, Inc. and
* Cirrus Logic International Semiconductor Ltd.
*
* Author: Lucas Tanure <[email protected]>
*/
#include <linux/delay.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/math64.h>
#include <linux/mfd/lochnagar.h>
#include <linux/mfd/lochnagar2_regs.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#define LN2_MAX_NSAMPLE 1023
#define LN2_SAMPLE_US 1670
#define LN2_CURR_UNITS 1000
#define LN2_VOLT_UNITS 1000
#define LN2_TEMP_UNITS 1000
#define LN2_PWR_UNITS 1000000
static const char * const lochnagar_chan_names[] = {
"DBVDD1",
"1V8 DSP",
"1V8 CDC",
"VDDCORE DSP",
"AVDD 1V8",
"SYSVDD",
"VDDCORE CDC",
"MICVDD",
};
struct lochnagar_hwmon {
struct regmap *regmap;
long power_nsamples[ARRAY_SIZE(lochnagar_chan_names)];
/* Lock to ensure only a single sensor is read at a time */
struct mutex sensor_lock;
};
enum lochnagar_measure_mode {
LN2_CURR = 0,
LN2_VOLT,
LN2_TEMP,
};
/**
* float_to_long - Convert ieee754 reading from hardware to an integer
*
* @data: Value read from the hardware
* @precision: Units to multiply up to eg. 1000 = milli, 1000000 = micro
*
* Return: Converted integer reading
*
* Depending on the measurement type the hardware returns an ieee754
* floating point value in either volts, amps or celsius. This function
* will convert that into an integer in a smaller unit such as micro-amps
* or milli-celsius. The hardware does not return NaN, so consideration of
* that is not required.
*/
static long float_to_long(u32 data, u32 precision)
{
u64 man = data & 0x007FFFFF;
int exp = ((data & 0x7F800000) >> 23) - 127 - 23;
bool negative = data & 0x80000000;
long result;
man = (man + (1 << 23)) * precision;
if (fls64(man) + exp > (int)sizeof(long) * 8 - 1)
result = LONG_MAX;
else if (exp < 0)
result = (man + (1ull << (-exp - 1))) >> -exp;
else
result = man << exp;
return negative ? -result : result;
}
static int do_measurement(struct regmap *regmap, int chan,
enum lochnagar_measure_mode mode, int nsamples)
{
unsigned int val;
int ret;
chan = 1 << (chan + LOCHNAGAR2_IMON_MEASURED_CHANNELS_SHIFT);
ret = regmap_write(regmap, LOCHNAGAR2_IMON_CTRL1,
LOCHNAGAR2_IMON_ENA_MASK | chan | mode);
if (ret < 0)
return ret;
ret = regmap_write(regmap, LOCHNAGAR2_IMON_CTRL2, nsamples);
if (ret < 0)
return ret;
ret = regmap_write(regmap, LOCHNAGAR2_IMON_CTRL3,
LOCHNAGAR2_IMON_CONFIGURE_MASK);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(regmap, LOCHNAGAR2_IMON_CTRL3, val,
val & LOCHNAGAR2_IMON_DONE_MASK,
1000, 10000);
if (ret < 0)
return ret;
ret = regmap_write(regmap, LOCHNAGAR2_IMON_CTRL3,
LOCHNAGAR2_IMON_MEASURE_MASK);
if (ret < 0)
return ret;
/*
* Actual measurement time is ~1.67mS per sample, approximate this
* with a 1.5mS per sample msleep and then poll for success up to
* ~0.17mS * 1023 (LN2_MAX_NSAMPLES). Normally for smaller values
* of nsamples the poll will complete on the first loop due to
* other latency in the system.
*/
msleep((nsamples * 3) / 2);
ret = regmap_read_poll_timeout(regmap, LOCHNAGAR2_IMON_CTRL3, val,
val & LOCHNAGAR2_IMON_DONE_MASK,
5000, 200000);
if (ret < 0)
return ret;
return regmap_write(regmap, LOCHNAGAR2_IMON_CTRL3, 0);
}
static int request_data(struct regmap *regmap, int chan, u32 *data)
{
unsigned int val;
int ret;
ret = regmap_write(regmap, LOCHNAGAR2_IMON_CTRL4,
LOCHNAGAR2_IMON_DATA_REQ_MASK |
chan << LOCHNAGAR2_IMON_CH_SEL_SHIFT);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(regmap, LOCHNAGAR2_IMON_CTRL4, val,
val & LOCHNAGAR2_IMON_DATA_RDY_MASK,
1000, 10000);
if (ret < 0)
return ret;
ret = regmap_read(regmap, LOCHNAGAR2_IMON_DATA1, &val);
if (ret < 0)
return ret;
*data = val << 16;
ret = regmap_read(regmap, LOCHNAGAR2_IMON_DATA2, &val);
if (ret < 0)
return ret;
*data |= val;
return regmap_write(regmap, LOCHNAGAR2_IMON_CTRL4, 0);
}
static int read_sensor(struct device *dev, int chan,
enum lochnagar_measure_mode mode, int nsamples,
unsigned int precision, long *val)
{
struct lochnagar_hwmon *priv = dev_get_drvdata(dev);
struct regmap *regmap = priv->regmap;
u32 data;
int ret;
mutex_lock(&priv->sensor_lock);
ret = do_measurement(regmap, chan, mode, nsamples);
if (ret < 0) {
dev_err(dev, "Failed to perform measurement: %d\n", ret);
goto error;
}
ret = request_data(regmap, chan, &data);
if (ret < 0) {
dev_err(dev, "Failed to read measurement: %d\n", ret);
goto error;
}
*val = float_to_long(data, precision);
error:
mutex_unlock(&priv->sensor_lock);
return ret;
}
static int read_power(struct device *dev, int chan, long *val)
{
struct lochnagar_hwmon *priv = dev_get_drvdata(dev);
int nsamples = priv->power_nsamples[chan];
u64 power;
int ret;
if (!strcmp("SYSVDD", lochnagar_chan_names[chan])) {
power = 5 * LN2_PWR_UNITS;
} else {
ret = read_sensor(dev, chan, LN2_VOLT, 1, LN2_PWR_UNITS, val);
if (ret < 0)
return ret;
power = abs(*val);
}
ret = read_sensor(dev, chan, LN2_CURR, nsamples, LN2_PWR_UNITS, val);
if (ret < 0)
return ret;
power *= abs(*val);
power = DIV_ROUND_CLOSEST_ULL(power, LN2_PWR_UNITS);
if (power > LONG_MAX)
*val = LONG_MAX;
else
*val = power;
return 0;
}
static umode_t lochnagar_is_visible(const void *drvdata,
enum hwmon_sensor_types type,
u32 attr, int chan)
{
switch (type) {
case hwmon_in:
if (!strcmp("SYSVDD", lochnagar_chan_names[chan]))
return 0;
break;
case hwmon_power:
if (attr == hwmon_power_average_interval)
return 0644;
break;
default:
break;
}
return 0444;
}
static int lochnagar_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int chan, long *val)
{
struct lochnagar_hwmon *priv = dev_get_drvdata(dev);
int interval;
switch (type) {
case hwmon_in:
return read_sensor(dev, chan, LN2_VOLT, 1, LN2_VOLT_UNITS, val);
case hwmon_curr:
return read_sensor(dev, chan, LN2_CURR, 1, LN2_CURR_UNITS, val);
case hwmon_temp:
return read_sensor(dev, chan, LN2_TEMP, 1, LN2_TEMP_UNITS, val);
case hwmon_power:
switch (attr) {
case hwmon_power_average:
return read_power(dev, chan, val);
case hwmon_power_average_interval:
interval = priv->power_nsamples[chan] * LN2_SAMPLE_US;
*val = DIV_ROUND_CLOSEST(interval, 1000);
return 0;
default:
return -EOPNOTSUPP;
}
default:
return -EOPNOTSUPP;
}
}
static int lochnagar_read_string(struct device *dev,
enum hwmon_sensor_types type, u32 attr,
int chan, const char **str)
{
switch (type) {
case hwmon_in:
case hwmon_curr:
case hwmon_power:
*str = lochnagar_chan_names[chan];
return 0;
default:
return -EOPNOTSUPP;
}
}
static int lochnagar_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int chan, long val)
{
struct lochnagar_hwmon *priv = dev_get_drvdata(dev);
if (type != hwmon_power || attr != hwmon_power_average_interval)
return -EOPNOTSUPP;
val = clamp_t(long, val, 1, (LN2_MAX_NSAMPLE * LN2_SAMPLE_US) / 1000);
val = DIV_ROUND_CLOSEST(val * 1000, LN2_SAMPLE_US);
priv->power_nsamples[chan] = val;
return 0;
}
static const struct hwmon_ops lochnagar_ops = {
.is_visible = lochnagar_is_visible,
.read = lochnagar_read,
.read_string = lochnagar_read_string,
.write = lochnagar_write,
};
static const struct hwmon_channel_info * const lochnagar_info[] = {
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
HWMON_CHANNEL_INFO(in, HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL),
HWMON_CHANNEL_INFO(power, HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL,
HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL,
HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL,
HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL,
HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL,
HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL,
HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL,
HWMON_P_AVERAGE | HWMON_P_AVERAGE_INTERVAL |
HWMON_P_LABEL),
NULL
};
static const struct hwmon_chip_info lochnagar_chip_info = {
.ops = &lochnagar_ops,
.info = lochnagar_info,
};
static const struct of_device_id lochnagar_of_match[] = {
{ .compatible = "cirrus,lochnagar2-hwmon" },
{}
};
MODULE_DEVICE_TABLE(of, lochnagar_of_match);
static int lochnagar_hwmon_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device *hwmon_dev;
struct lochnagar_hwmon *priv;
int i;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
mutex_init(&priv->sensor_lock);
priv->regmap = dev_get_regmap(dev->parent, NULL);
if (!priv->regmap) {
dev_err(dev, "No register map found\n");
return -EINVAL;
}
for (i = 0; i < ARRAY_SIZE(priv->power_nsamples); i++)
priv->power_nsamples[i] = 96;
hwmon_dev = devm_hwmon_device_register_with_info(dev, "Lochnagar", priv,
&lochnagar_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct platform_driver lochnagar_hwmon_driver = {
.driver = {
.name = "lochnagar-hwmon",
.of_match_table = lochnagar_of_match,
},
.probe = lochnagar_hwmon_probe,
};
module_platform_driver(lochnagar_hwmon_driver);
MODULE_AUTHOR("Lucas Tanure <[email protected]>");
MODULE_DESCRIPTION("Lochnagar hardware monitoring features");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lochnagar-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020 Sartura Ltd.
*
* Driver for the TI TPS23861 PoE PSE.
*
* Author: Robert Marko <[email protected]>
*/
#include <linux/bitfield.h>
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regmap.h>
#define TEMPERATURE 0x2c
#define INPUT_VOLTAGE_LSB 0x2e
#define INPUT_VOLTAGE_MSB 0x2f
#define PORT_1_CURRENT_LSB 0x30
#define PORT_1_CURRENT_MSB 0x31
#define PORT_1_VOLTAGE_LSB 0x32
#define PORT_1_VOLTAGE_MSB 0x33
#define PORT_2_CURRENT_LSB 0x34
#define PORT_2_CURRENT_MSB 0x35
#define PORT_2_VOLTAGE_LSB 0x36
#define PORT_2_VOLTAGE_MSB 0x37
#define PORT_3_CURRENT_LSB 0x38
#define PORT_3_CURRENT_MSB 0x39
#define PORT_3_VOLTAGE_LSB 0x3a
#define PORT_3_VOLTAGE_MSB 0x3b
#define PORT_4_CURRENT_LSB 0x3c
#define PORT_4_CURRENT_MSB 0x3d
#define PORT_4_VOLTAGE_LSB 0x3e
#define PORT_4_VOLTAGE_MSB 0x3f
#define PORT_N_CURRENT_LSB_OFFSET 0x04
#define PORT_N_VOLTAGE_LSB_OFFSET 0x04
#define VOLTAGE_CURRENT_MASK GENMASK(13, 0)
#define PORT_1_RESISTANCE_LSB 0x60
#define PORT_1_RESISTANCE_MSB 0x61
#define PORT_2_RESISTANCE_LSB 0x62
#define PORT_2_RESISTANCE_MSB 0x63
#define PORT_3_RESISTANCE_LSB 0x64
#define PORT_3_RESISTANCE_MSB 0x65
#define PORT_4_RESISTANCE_LSB 0x66
#define PORT_4_RESISTANCE_MSB 0x67
#define PORT_N_RESISTANCE_LSB_OFFSET 0x02
#define PORT_RESISTANCE_MASK GENMASK(13, 0)
#define PORT_RESISTANCE_RSN_MASK GENMASK(15, 14)
#define PORT_RESISTANCE_RSN_OTHER 0
#define PORT_RESISTANCE_RSN_LOW 1
#define PORT_RESISTANCE_RSN_OPEN 2
#define PORT_RESISTANCE_RSN_SHORT 3
#define PORT_1_STATUS 0x0c
#define PORT_2_STATUS 0x0d
#define PORT_3_STATUS 0x0e
#define PORT_4_STATUS 0x0f
#define PORT_STATUS_CLASS_MASK GENMASK(7, 4)
#define PORT_STATUS_DETECT_MASK GENMASK(3, 0)
#define PORT_CLASS_UNKNOWN 0
#define PORT_CLASS_1 1
#define PORT_CLASS_2 2
#define PORT_CLASS_3 3
#define PORT_CLASS_4 4
#define PORT_CLASS_RESERVED 5
#define PORT_CLASS_0 6
#define PORT_CLASS_OVERCURRENT 7
#define PORT_CLASS_MISMATCH 8
#define PORT_DETECT_UNKNOWN 0
#define PORT_DETECT_SHORT 1
#define PORT_DETECT_RESERVED 2
#define PORT_DETECT_RESISTANCE_LOW 3
#define PORT_DETECT_RESISTANCE_OK 4
#define PORT_DETECT_RESISTANCE_HIGH 5
#define PORT_DETECT_OPEN_CIRCUIT 6
#define PORT_DETECT_RESERVED_2 7
#define PORT_DETECT_MOSFET_FAULT 8
#define PORT_DETECT_LEGACY 9
/* Measurment beyond clamp voltage */
#define PORT_DETECT_CAPACITANCE_INVALID_BEYOND 10
/* Insufficient voltage delta */
#define PORT_DETECT_CAPACITANCE_INVALID_DELTA 11
#define PORT_DETECT_CAPACITANCE_OUT_OF_RANGE 12
#define POE_PLUS 0x40
#define OPERATING_MODE 0x12
#define OPERATING_MODE_OFF 0
#define OPERATING_MODE_MANUAL 1
#define OPERATING_MODE_SEMI 2
#define OPERATING_MODE_AUTO 3
#define OPERATING_MODE_PORT_1_MASK GENMASK(1, 0)
#define OPERATING_MODE_PORT_2_MASK GENMASK(3, 2)
#define OPERATING_MODE_PORT_3_MASK GENMASK(5, 4)
#define OPERATING_MODE_PORT_4_MASK GENMASK(7, 6)
#define DETECT_CLASS_RESTART 0x18
#define POWER_ENABLE 0x19
#define TPS23861_NUM_PORTS 4
#define TPS23861_GENERAL_MASK_1 0x17
#define TPS23861_CURRENT_SHUNT_MASK BIT(0)
#define TEMPERATURE_LSB 652 /* 0.652 degrees Celsius */
#define VOLTAGE_LSB 3662 /* 3.662 mV */
#define SHUNT_RESISTOR_DEFAULT 255000 /* 255 mOhm */
#define CURRENT_LSB_250 62260 /* 62.260 uA */
#define CURRENT_LSB_255 61039 /* 61.039 uA */
#define RESISTANCE_LSB 110966 /* 11.0966 Ohm*/
#define RESISTANCE_LSB_LOW 157216 /* 15.7216 Ohm*/
struct tps23861_data {
struct regmap *regmap;
u32 shunt_resistor;
struct i2c_client *client;
struct dentry *debugfs_dir;
};
static struct regmap_config tps23861_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x6f,
};
static int tps23861_read_temp(struct tps23861_data *data, long *val)
{
unsigned int regval;
int err;
err = regmap_read(data->regmap, TEMPERATURE, ®val);
if (err < 0)
return err;
*val = (regval * TEMPERATURE_LSB) - 20000;
return 0;
}
static int tps23861_read_voltage(struct tps23861_data *data, int channel,
long *val)
{
__le16 regval;
long raw_val;
int err;
if (channel < TPS23861_NUM_PORTS) {
err = regmap_bulk_read(data->regmap,
PORT_1_VOLTAGE_LSB + channel * PORT_N_VOLTAGE_LSB_OFFSET,
®val, 2);
} else {
err = regmap_bulk_read(data->regmap,
INPUT_VOLTAGE_LSB,
®val, 2);
}
if (err < 0)
return err;
raw_val = le16_to_cpu(regval);
*val = (FIELD_GET(VOLTAGE_CURRENT_MASK, raw_val) * VOLTAGE_LSB) / 1000;
return 0;
}
static int tps23861_read_current(struct tps23861_data *data, int channel,
long *val)
{
long raw_val, current_lsb;
__le16 regval;
int err;
if (data->shunt_resistor == SHUNT_RESISTOR_DEFAULT)
current_lsb = CURRENT_LSB_255;
else
current_lsb = CURRENT_LSB_250;
err = regmap_bulk_read(data->regmap,
PORT_1_CURRENT_LSB + channel * PORT_N_CURRENT_LSB_OFFSET,
®val, 2);
if (err < 0)
return err;
raw_val = le16_to_cpu(regval);
*val = (FIELD_GET(VOLTAGE_CURRENT_MASK, raw_val) * current_lsb) / 1000000;
return 0;
}
static int tps23861_port_disable(struct tps23861_data *data, int channel)
{
unsigned int regval = 0;
int err;
regval |= BIT(channel + 4);
err = regmap_write(data->regmap, POWER_ENABLE, regval);
return err;
}
static int tps23861_port_enable(struct tps23861_data *data, int channel)
{
unsigned int regval = 0;
int err;
regval |= BIT(channel);
regval |= BIT(channel + 4);
err = regmap_write(data->regmap, DETECT_CLASS_RESTART, regval);
return err;
}
static umode_t tps23861_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_label:
return 0444;
default:
return 0;
}
case hwmon_in:
switch (attr) {
case hwmon_in_input:
case hwmon_in_label:
return 0444;
case hwmon_in_enable:
return 0200;
default:
return 0;
}
case hwmon_curr:
switch (attr) {
case hwmon_curr_input:
case hwmon_curr_label:
return 0444;
default:
return 0;
}
default:
return 0;
}
}
static int tps23861_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct tps23861_data *data = dev_get_drvdata(dev);
int err;
switch (type) {
case hwmon_in:
switch (attr) {
case hwmon_in_enable:
if (val == 0)
err = tps23861_port_disable(data, channel);
else if (val == 1)
err = tps23861_port_enable(data, channel);
else
err = -EINVAL;
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static int tps23861_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct tps23861_data *data = dev_get_drvdata(dev);
int err;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
err = tps23861_read_temp(data, val);
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_input:
err = tps23861_read_voltage(data, channel, val);
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_curr:
switch (attr) {
case hwmon_curr_input:
err = tps23861_read_current(data, channel, val);
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static const char * const tps23861_port_label[] = {
"Port1",
"Port2",
"Port3",
"Port4",
"Input",
};
static int tps23861_read_string(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
switch (type) {
case hwmon_in:
case hwmon_curr:
*str = tps23861_port_label[channel];
break;
case hwmon_temp:
*str = "Die";
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static const struct hwmon_channel_info * const tps23861_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_LABEL),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL),
NULL
};
static const struct hwmon_ops tps23861_hwmon_ops = {
.is_visible = tps23861_is_visible,
.write = tps23861_write,
.read = tps23861_read,
.read_string = tps23861_read_string,
};
static const struct hwmon_chip_info tps23861_chip_info = {
.ops = &tps23861_hwmon_ops,
.info = tps23861_info,
};
static char *port_operating_mode_string(uint8_t mode_reg, unsigned int port)
{
unsigned int mode = ~0;
if (port < TPS23861_NUM_PORTS)
mode = (mode_reg >> (2 * port)) & OPERATING_MODE_PORT_1_MASK;
switch (mode) {
case OPERATING_MODE_OFF:
return "Off";
case OPERATING_MODE_MANUAL:
return "Manual";
case OPERATING_MODE_SEMI:
return "Semi-Auto";
case OPERATING_MODE_AUTO:
return "Auto";
default:
return "Invalid";
}
}
static char *port_detect_status_string(uint8_t status_reg)
{
switch (FIELD_GET(PORT_STATUS_DETECT_MASK, status_reg)) {
case PORT_DETECT_UNKNOWN:
return "Unknown device";
case PORT_DETECT_SHORT:
return "Short circuit";
case PORT_DETECT_RESISTANCE_LOW:
return "Too low resistance";
case PORT_DETECT_RESISTANCE_OK:
return "Valid resistance";
case PORT_DETECT_RESISTANCE_HIGH:
return "Too high resistance";
case PORT_DETECT_OPEN_CIRCUIT:
return "Open circuit";
case PORT_DETECT_MOSFET_FAULT:
return "MOSFET fault";
case PORT_DETECT_LEGACY:
return "Legacy device";
case PORT_DETECT_CAPACITANCE_INVALID_BEYOND:
return "Invalid capacitance, beyond clamp voltage";
case PORT_DETECT_CAPACITANCE_INVALID_DELTA:
return "Invalid capacitance, insufficient voltage delta";
case PORT_DETECT_CAPACITANCE_OUT_OF_RANGE:
return "Valid capacitance, outside of legacy range";
case PORT_DETECT_RESERVED:
case PORT_DETECT_RESERVED_2:
default:
return "Invalid";
}
}
static char *port_class_status_string(uint8_t status_reg)
{
switch (FIELD_GET(PORT_STATUS_CLASS_MASK, status_reg)) {
case PORT_CLASS_UNKNOWN:
return "Unknown";
case PORT_CLASS_RESERVED:
case PORT_CLASS_0:
return "0";
case PORT_CLASS_1:
return "1";
case PORT_CLASS_2:
return "2";
case PORT_CLASS_3:
return "3";
case PORT_CLASS_4:
return "4";
case PORT_CLASS_OVERCURRENT:
return "Overcurrent";
case PORT_CLASS_MISMATCH:
return "Mismatch";
default:
return "Invalid";
}
}
static char *port_poe_plus_status_string(uint8_t poe_plus, unsigned int port)
{
return (BIT(port + 4) & poe_plus) ? "Yes" : "No";
}
static int tps23861_port_resistance(struct tps23861_data *data, int port)
{
unsigned int raw_val;
__le16 regval;
regmap_bulk_read(data->regmap,
PORT_1_RESISTANCE_LSB + PORT_N_RESISTANCE_LSB_OFFSET * port,
®val,
2);
raw_val = le16_to_cpu(regval);
switch (FIELD_GET(PORT_RESISTANCE_RSN_MASK, raw_val)) {
case PORT_RESISTANCE_RSN_OTHER:
return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB) / 10000;
case PORT_RESISTANCE_RSN_LOW:
return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB_LOW) / 10000;
case PORT_RESISTANCE_RSN_SHORT:
case PORT_RESISTANCE_RSN_OPEN:
default:
return 0;
}
}
static int tps23861_port_status_show(struct seq_file *s, void *data)
{
struct tps23861_data *priv = s->private;
unsigned int i, mode, poe_plus, status;
regmap_read(priv->regmap, OPERATING_MODE, &mode);
regmap_read(priv->regmap, POE_PLUS, &poe_plus);
for (i = 0; i < TPS23861_NUM_PORTS; i++) {
regmap_read(priv->regmap, PORT_1_STATUS + i, &status);
seq_printf(s, "Port: \t\t%d\n", i + 1);
seq_printf(s, "Operating mode: %s\n", port_operating_mode_string(mode, i));
seq_printf(s, "Detected: \t%s\n", port_detect_status_string(status));
seq_printf(s, "Class: \t\t%s\n", port_class_status_string(status));
seq_printf(s, "PoE Plus: \t%s\n", port_poe_plus_status_string(poe_plus, i));
seq_printf(s, "Resistance: \t%d\n", tps23861_port_resistance(priv, i));
seq_putc(s, '\n');
}
return 0;
}
DEFINE_SHOW_ATTRIBUTE(tps23861_port_status);
static void tps23861_init_debugfs(struct tps23861_data *data,
struct device *hwmon_dev)
{
const char *debugfs_name;
debugfs_name = devm_kasprintf(&data->client->dev, GFP_KERNEL, "%s-%s",
data->client->name, dev_name(hwmon_dev));
if (!debugfs_name)
return;
data->debugfs_dir = debugfs_create_dir(debugfs_name, NULL);
debugfs_create_file("port_status",
0400,
data->debugfs_dir,
data,
&tps23861_port_status_fops);
}
static int tps23861_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct tps23861_data *data;
struct device *hwmon_dev;
u32 shunt_resistor;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
i2c_set_clientdata(client, data);
data->regmap = devm_regmap_init_i2c(client, &tps23861_regmap_config);
if (IS_ERR(data->regmap)) {
dev_err(dev, "failed to allocate register map\n");
return PTR_ERR(data->regmap);
}
if (!of_property_read_u32(dev->of_node, "shunt-resistor-micro-ohms", &shunt_resistor))
data->shunt_resistor = shunt_resistor;
else
data->shunt_resistor = SHUNT_RESISTOR_DEFAULT;
if (data->shunt_resistor == SHUNT_RESISTOR_DEFAULT)
regmap_clear_bits(data->regmap,
TPS23861_GENERAL_MASK_1,
TPS23861_CURRENT_SHUNT_MASK);
else
regmap_set_bits(data->regmap,
TPS23861_GENERAL_MASK_1,
TPS23861_CURRENT_SHUNT_MASK);
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data, &tps23861_chip_info,
NULL);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
tps23861_init_debugfs(data, hwmon_dev);
return 0;
}
static void tps23861_remove(struct i2c_client *client)
{
struct tps23861_data *data = i2c_get_clientdata(client);
debugfs_remove_recursive(data->debugfs_dir);
}
static const struct of_device_id __maybe_unused tps23861_of_match[] = {
{ .compatible = "ti,tps23861", },
{ },
};
MODULE_DEVICE_TABLE(of, tps23861_of_match);
static struct i2c_driver tps23861_driver = {
.probe = tps23861_probe,
.remove = tps23861_remove,
.driver = {
.name = "tps23861",
.of_match_table = of_match_ptr(tps23861_of_match),
},
};
module_i2c_driver(tps23861_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Robert Marko <[email protected]>");
MODULE_DESCRIPTION("TI TPS23861 PoE PSE");
|
linux-master
|
drivers/hwmon/tps23861.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm83.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2003-2009 Jean Delvare <[email protected]>
*
* Heavily inspired from the lm78, lm75 and adm1021 drivers. The LM83 is
* a sensor chip made by National Semiconductor. It reports up to four
* temperatures (its own plus up to three external ones) with a 1 deg
* resolution and a 3-4 deg accuracy. Complete datasheet can be obtained
* from National's website at:
* http://www.national.com/pf/LM/LM83.html
* Since the datasheet omits to give the chip stepping code, I give it
* here: 0x03 (at register 0xff).
*
* Also supports the LM82 temp sensor, which is basically a stripped down
* model of the LM83. Datasheet is here:
* http://www.national.com/pf/LM/LM82.html
*/
#include <linux/bits.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>
/*
* Addresses to scan
* Address is selected using 2 three-level pins, resulting in 9 possible
* addresses.
*/
static const unsigned short normal_i2c[] = {
0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
enum chips { lm83, lm82 };
/*
* The LM83 registers
* Manufacturer ID is 0x01 for National Semiconductor.
*/
#define LM83_REG_R_MAN_ID 0xFE
#define LM83_REG_R_CHIP_ID 0xFF
#define LM83_REG_R_CONFIG 0x03
#define LM83_REG_W_CONFIG 0x09
#define LM83_REG_R_STATUS1 0x02
#define LM83_REG_R_STATUS2 0x35
#define LM83_REG_R_LOCAL_TEMP 0x00
#define LM83_REG_R_LOCAL_HIGH 0x05
#define LM83_REG_W_LOCAL_HIGH 0x0B
#define LM83_REG_R_REMOTE1_TEMP 0x30
#define LM83_REG_R_REMOTE1_HIGH 0x38
#define LM83_REG_W_REMOTE1_HIGH 0x50
#define LM83_REG_R_REMOTE2_TEMP 0x01
#define LM83_REG_R_REMOTE2_HIGH 0x07
#define LM83_REG_W_REMOTE2_HIGH 0x0D
#define LM83_REG_R_REMOTE3_TEMP 0x31
#define LM83_REG_R_REMOTE3_HIGH 0x3A
#define LM83_REG_W_REMOTE3_HIGH 0x52
#define LM83_REG_R_TCRIT 0x42
#define LM83_REG_W_TCRIT 0x5A
static const u8 LM83_REG_TEMP[] = {
LM83_REG_R_LOCAL_TEMP,
LM83_REG_R_REMOTE1_TEMP,
LM83_REG_R_REMOTE2_TEMP,
LM83_REG_R_REMOTE3_TEMP,
};
static const u8 LM83_REG_MAX[] = {
LM83_REG_R_LOCAL_HIGH,
LM83_REG_R_REMOTE1_HIGH,
LM83_REG_R_REMOTE2_HIGH,
LM83_REG_R_REMOTE3_HIGH,
};
/* alarm and fault registers and bits, indexed by channel */
static const u8 LM83_ALARM_REG[] = {
LM83_REG_R_STATUS1, LM83_REG_R_STATUS2, LM83_REG_R_STATUS1, LM83_REG_R_STATUS2
};
static const u8 LM83_MAX_ALARM_BIT[] = {
BIT(6), BIT(7), BIT(4), BIT(4)
};
static const u8 LM83_CRIT_ALARM_BIT[] = {
BIT(0), BIT(0), BIT(1), BIT(1)
};
static const u8 LM83_FAULT_BIT[] = {
0, BIT(5), BIT(2), BIT(2)
};
/*
* Client data (each client gets its own)
*/
struct lm83_data {
struct regmap *regmap;
enum chips type;
};
/* regmap code */
static int lm83_regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct i2c_client *client = context;
int ret;
ret = i2c_smbus_read_byte_data(client, reg);
if (ret < 0)
return ret;
*val = ret;
return 0;
}
/*
* The regmap write function maps read register addresses to write register
* addresses. This is necessary for regmap register caching to work.
* An alternative would be to clear the regmap cache whenever a register is
* written, but that would be much more expensive.
*/
static int lm83_regmap_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct i2c_client *client = context;
switch (reg) {
case LM83_REG_R_CONFIG:
case LM83_REG_R_LOCAL_HIGH:
case LM83_REG_R_REMOTE2_HIGH:
reg += 0x06;
break;
case LM83_REG_R_REMOTE1_HIGH:
case LM83_REG_R_REMOTE3_HIGH:
case LM83_REG_R_TCRIT:
reg += 0x18;
break;
default:
break;
}
return i2c_smbus_write_byte_data(client, reg, val);
}
static bool lm83_regmap_is_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case LM83_REG_R_LOCAL_TEMP:
case LM83_REG_R_REMOTE1_TEMP:
case LM83_REG_R_REMOTE2_TEMP:
case LM83_REG_R_REMOTE3_TEMP:
case LM83_REG_R_STATUS1:
case LM83_REG_R_STATUS2:
return true;
default:
return false;
}
}
static const struct regmap_config lm83_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = lm83_regmap_is_volatile,
.reg_read = lm83_regmap_reg_read,
.reg_write = lm83_regmap_reg_write,
};
/* hwmon API */
static int lm83_temp_read(struct device *dev, u32 attr, int channel, long *val)
{
struct lm83_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
switch (attr) {
case hwmon_temp_input:
err = regmap_read(data->regmap, LM83_REG_TEMP[channel], ®val);
if (err < 0)
return err;
*val = (s8)regval * 1000;
break;
case hwmon_temp_max:
err = regmap_read(data->regmap, LM83_REG_MAX[channel], ®val);
if (err < 0)
return err;
*val = (s8)regval * 1000;
break;
case hwmon_temp_crit:
err = regmap_read(data->regmap, LM83_REG_R_TCRIT, ®val);
if (err < 0)
return err;
*val = (s8)regval * 1000;
break;
case hwmon_temp_max_alarm:
err = regmap_read(data->regmap, LM83_ALARM_REG[channel], ®val);
if (err < 0)
return err;
*val = !!(regval & LM83_MAX_ALARM_BIT[channel]);
break;
case hwmon_temp_crit_alarm:
err = regmap_read(data->regmap, LM83_ALARM_REG[channel], ®val);
if (err < 0)
return err;
*val = !!(regval & LM83_CRIT_ALARM_BIT[channel]);
break;
case hwmon_temp_fault:
err = regmap_read(data->regmap, LM83_ALARM_REG[channel], ®val);
if (err < 0)
return err;
*val = !!(regval & LM83_FAULT_BIT[channel]);
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int lm83_temp_write(struct device *dev, u32 attr, int channel, long val)
{
struct lm83_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
regval = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);
switch (attr) {
case hwmon_temp_max:
err = regmap_write(data->regmap, LM83_REG_MAX[channel], regval);
if (err < 0)
return err;
break;
case hwmon_temp_crit:
err = regmap_write(data->regmap, LM83_REG_R_TCRIT, regval);
if (err < 0)
return err;
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int lm83_chip_read(struct device *dev, u32 attr, int channel, long *val)
{
struct lm83_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
switch (attr) {
case hwmon_chip_alarms:
err = regmap_read(data->regmap, LM83_REG_R_STATUS1, ®val);
if (err < 0)
return err;
*val = regval;
err = regmap_read(data->regmap, LM83_REG_R_STATUS2, ®val);
if (err < 0)
return err;
*val |= regval << 8;
return 0;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int lm83_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_chip:
return lm83_chip_read(dev, attr, channel, val);
case hwmon_temp:
return lm83_temp_read(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int lm83_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_temp:
return lm83_temp_write(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t lm83_is_visible(const void *_data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct lm83_data *data = _data;
/*
* LM82 only supports a single external channel, modeled as channel 2.
*/
if (data->type == lm82 && (channel == 1 || channel == 3))
return 0;
switch (type) {
case hwmon_chip:
if (attr == hwmon_chip_alarms)
return 0444;
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
return 0444;
case hwmon_temp_fault:
if (channel)
return 0444;
break;
case hwmon_temp_max:
return 0644;
case hwmon_temp_crit:
if (channel == 2)
return 0644;
return 0444;
default:
break;
}
break;
default:
break;
}
return 0;
}
static const struct hwmon_channel_info * const lm83_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_ALARMS),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT
),
NULL
};
static const struct hwmon_ops lm83_hwmon_ops = {
.is_visible = lm83_is_visible,
.read = lm83_read,
.write = lm83_write,
};
static const struct hwmon_chip_info lm83_chip_info = {
.ops = &lm83_hwmon_ops,
.info = lm83_info,
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm83_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
const char *name;
u8 man_id, chip_id;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* Detection */
if ((i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS1) & 0xA8) ||
(i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS2) & 0x48) ||
(i2c_smbus_read_byte_data(client, LM83_REG_R_CONFIG) & 0x41)) {
dev_dbg(&adapter->dev, "LM83 detection failed at 0x%02x\n",
client->addr);
return -ENODEV;
}
/* Identification */
man_id = i2c_smbus_read_byte_data(client, LM83_REG_R_MAN_ID);
if (man_id != 0x01) /* National Semiconductor */
return -ENODEV;
chip_id = i2c_smbus_read_byte_data(client, LM83_REG_R_CHIP_ID);
switch (chip_id) {
case 0x03:
/*
* According to the LM82 datasheet dated March 2013, recent
* revisions of LM82 have a die revision of 0x03. This was
* confirmed with a real chip. Further details in this revision
* of the LM82 datasheet strongly suggest that LM82 is just a
* repackaged LM83. It is therefore impossible to distinguish
* those chips from LM83, and they will be misdetected as LM83.
*/
name = "lm83";
break;
case 0x01:
name = "lm82";
break;
default:
/* identification failed */
dev_dbg(&adapter->dev,
"Unsupported chip (man_id=0x%02X, chip_id=0x%02X)\n",
man_id, chip_id);
return -ENODEV;
}
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static const struct i2c_device_id lm83_id[] = {
{ "lm83", lm83 },
{ "lm82", lm82 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm83_id);
static int lm83_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct lm83_data *data;
data = devm_kzalloc(dev, sizeof(struct lm83_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->regmap = devm_regmap_init(dev, NULL, client, &lm83_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
data->type = i2c_match_id(lm83_id, client)->driver_data;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data, &lm83_chip_info, NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/*
* Driver data (common to all clients)
*/
static struct i2c_driver lm83_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm83",
},
.probe = lm83_probe,
.id_table = lm83_id,
.detect = lm83_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm83_driver);
MODULE_AUTHOR("Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("LM83 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm83.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for Linear Technology LTC2990 power monitor
*
* Copyright (C) 2014 Topic Embedded Products
* Author: Mike Looijmans <[email protected]>
*/
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/property.h>
#define LTC2990_STATUS 0x00
#define LTC2990_CONTROL 0x01
#define LTC2990_TRIGGER 0x02
#define LTC2990_TINT_MSB 0x04
#define LTC2990_V1_MSB 0x06
#define LTC2990_V2_MSB 0x08
#define LTC2990_V3_MSB 0x0A
#define LTC2990_V4_MSB 0x0C
#define LTC2990_VCC_MSB 0x0E
#define LTC2990_IN0 BIT(0)
#define LTC2990_IN1 BIT(1)
#define LTC2990_IN2 BIT(2)
#define LTC2990_IN3 BIT(3)
#define LTC2990_IN4 BIT(4)
#define LTC2990_CURR1 BIT(5)
#define LTC2990_CURR2 BIT(6)
#define LTC2990_TEMP1 BIT(7)
#define LTC2990_TEMP2 BIT(8)
#define LTC2990_TEMP3 BIT(9)
#define LTC2990_NONE 0
#define LTC2990_ALL GENMASK(9, 0)
#define LTC2990_MODE0_SHIFT 0
#define LTC2990_MODE0_MASK GENMASK(2, 0)
#define LTC2990_MODE1_SHIFT 3
#define LTC2990_MODE1_MASK GENMASK(1, 0)
/* Enabled measurements for mode bits 2..0 */
static const int ltc2990_attrs_ena_0[] = {
LTC2990_IN1 | LTC2990_IN2 | LTC2990_TEMP3,
LTC2990_CURR1 | LTC2990_TEMP3,
LTC2990_CURR1 | LTC2990_IN3 | LTC2990_IN4,
LTC2990_TEMP2 | LTC2990_IN3 | LTC2990_IN4,
LTC2990_TEMP2 | LTC2990_CURR2,
LTC2990_TEMP2 | LTC2990_TEMP3,
LTC2990_CURR1 | LTC2990_CURR2,
LTC2990_IN1 | LTC2990_IN2 | LTC2990_IN3 | LTC2990_IN4
};
/* Enabled measurements for mode bits 4..3 */
static const int ltc2990_attrs_ena_1[] = {
LTC2990_NONE,
LTC2990_TEMP2 | LTC2990_IN1 | LTC2990_CURR1,
LTC2990_TEMP3 | LTC2990_IN3 | LTC2990_CURR2,
LTC2990_ALL
};
struct ltc2990_data {
struct i2c_client *i2c;
u32 mode[2];
};
/* Return the converted value from the given register in uV or mC */
static int ltc2990_get_value(struct i2c_client *i2c, int index, int *result)
{
int val;
u8 reg;
switch (index) {
case LTC2990_IN0:
reg = LTC2990_VCC_MSB;
break;
case LTC2990_IN1:
case LTC2990_CURR1:
case LTC2990_TEMP2:
reg = LTC2990_V1_MSB;
break;
case LTC2990_IN2:
reg = LTC2990_V2_MSB;
break;
case LTC2990_IN3:
case LTC2990_CURR2:
case LTC2990_TEMP3:
reg = LTC2990_V3_MSB;
break;
case LTC2990_IN4:
reg = LTC2990_V4_MSB;
break;
case LTC2990_TEMP1:
reg = LTC2990_TINT_MSB;
break;
default:
return -EINVAL;
}
val = i2c_smbus_read_word_swapped(i2c, reg);
if (unlikely(val < 0))
return val;
switch (index) {
case LTC2990_TEMP1:
case LTC2990_TEMP2:
case LTC2990_TEMP3:
/* temp, 0.0625 degrees/LSB */
*result = sign_extend32(val, 12) * 1000 / 16;
break;
case LTC2990_CURR1:
case LTC2990_CURR2:
/* Vx-Vy, 19.42uV/LSB */
*result = sign_extend32(val, 14) * 1942 / 100;
break;
case LTC2990_IN0:
/* Vcc, 305.18uV/LSB, 2.5V offset */
*result = sign_extend32(val, 14) * 30518 / (100 * 1000) + 2500;
break;
case LTC2990_IN1:
case LTC2990_IN2:
case LTC2990_IN3:
case LTC2990_IN4:
/* Vx, 305.18uV/LSB */
*result = sign_extend32(val, 14) * 30518 / (100 * 1000);
break;
default:
return -EINVAL; /* won't happen, keep compiler happy */
}
return 0;
}
static ssize_t ltc2990_value_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ltc2990_data *data = dev_get_drvdata(dev);
int value;
int ret;
ret = ltc2990_get_value(data->i2c, attr->index, &value);
if (unlikely(ret < 0))
return ret;
return sysfs_emit(buf, "%d\n", value);
}
static umode_t ltc2990_attrs_visible(struct kobject *kobj,
struct attribute *a, int n)
{
struct device *dev = kobj_to_dev(kobj);
struct ltc2990_data *data = dev_get_drvdata(dev);
struct device_attribute *da =
container_of(a, struct device_attribute, attr);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int attrs_mask = LTC2990_IN0 | LTC2990_TEMP1 |
(ltc2990_attrs_ena_0[data->mode[0]] &
ltc2990_attrs_ena_1[data->mode[1]]);
if (attr->index & attrs_mask)
return a->mode;
return 0;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, ltc2990_value, LTC2990_TEMP1);
static SENSOR_DEVICE_ATTR_RO(temp2_input, ltc2990_value, LTC2990_TEMP2);
static SENSOR_DEVICE_ATTR_RO(temp3_input, ltc2990_value, LTC2990_TEMP3);
static SENSOR_DEVICE_ATTR_RO(curr1_input, ltc2990_value, LTC2990_CURR1);
static SENSOR_DEVICE_ATTR_RO(curr2_input, ltc2990_value, LTC2990_CURR2);
static SENSOR_DEVICE_ATTR_RO(in0_input, ltc2990_value, LTC2990_IN0);
static SENSOR_DEVICE_ATTR_RO(in1_input, ltc2990_value, LTC2990_IN1);
static SENSOR_DEVICE_ATTR_RO(in2_input, ltc2990_value, LTC2990_IN2);
static SENSOR_DEVICE_ATTR_RO(in3_input, ltc2990_value, LTC2990_IN3);
static SENSOR_DEVICE_ATTR_RO(in4_input, ltc2990_value, LTC2990_IN4);
static struct attribute *ltc2990_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_curr2_input.dev_attr.attr,
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
NULL,
};
static const struct attribute_group ltc2990_group = {
.attrs = ltc2990_attrs,
.is_visible = ltc2990_attrs_visible,
};
__ATTRIBUTE_GROUPS(ltc2990);
static int ltc2990_i2c_probe(struct i2c_client *i2c)
{
int ret;
struct device *hwmon_dev;
struct ltc2990_data *data;
if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
data = devm_kzalloc(&i2c->dev, sizeof(struct ltc2990_data), GFP_KERNEL);
if (unlikely(!data))
return -ENOMEM;
data->i2c = i2c;
if (dev_fwnode(&i2c->dev)) {
ret = device_property_read_u32_array(&i2c->dev,
"lltc,meas-mode",
data->mode, 2);
if (ret < 0)
return ret;
if (data->mode[0] & ~LTC2990_MODE0_MASK ||
data->mode[1] & ~LTC2990_MODE1_MASK)
return -EINVAL;
} else {
ret = i2c_smbus_read_byte_data(i2c, LTC2990_CONTROL);
if (ret < 0)
return ret;
data->mode[0] = ret >> LTC2990_MODE0_SHIFT & LTC2990_MODE0_MASK;
data->mode[1] = ret >> LTC2990_MODE1_SHIFT & LTC2990_MODE1_MASK;
}
/* Setup continuous mode */
ret = i2c_smbus_write_byte_data(i2c, LTC2990_CONTROL,
data->mode[0] << LTC2990_MODE0_SHIFT |
data->mode[1] << LTC2990_MODE1_SHIFT);
if (ret < 0) {
dev_err(&i2c->dev, "Error: Failed to set control mode.\n");
return ret;
}
/* Trigger once to start continuous conversion */
ret = i2c_smbus_write_byte_data(i2c, LTC2990_TRIGGER, 1);
if (ret < 0) {
dev_err(&i2c->dev, "Error: Failed to start acquisition.\n");
return ret;
}
hwmon_dev = devm_hwmon_device_register_with_groups(&i2c->dev,
i2c->name,
data,
ltc2990_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ltc2990_i2c_id[] = {
{ "ltc2990", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, ltc2990_i2c_id);
static struct i2c_driver ltc2990_i2c_driver = {
.driver = {
.name = "ltc2990",
},
.probe = ltc2990_i2c_probe,
.id_table = ltc2990_i2c_id,
};
module_i2c_driver(ltc2990_i2c_driver);
MODULE_DESCRIPTION("LTC2990 Sensor Driver");
MODULE_AUTHOR("Topic Embedded Products");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/ltc2990.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* powr1220.c - Driver for the Lattice POWR1220 programmable power supply
* and monitor. Users can read all ADC inputs along with their labels
* using the sysfs nodes.
*
* Copyright (c) 2014 Echo360 https://www.echo360.com
* Scott Kanowitz <[email protected]> <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#define ADC_STEP_MV 2
#define ADC_MAX_LOW_MEASUREMENT_MV 2000
enum powr1xxx_chips { powr1014, powr1220 };
enum powr1220_regs {
VMON_STATUS0,
VMON_STATUS1,
VMON_STATUS2,
OUTPUT_STATUS0,
OUTPUT_STATUS1,
OUTPUT_STATUS2,
INPUT_STATUS,
ADC_VALUE_LOW,
ADC_VALUE_HIGH,
ADC_MUX,
UES_BYTE0,
UES_BYTE1,
UES_BYTE2,
UES_BYTE3,
GP_OUTPUT1,
GP_OUTPUT2,
GP_OUTPUT3,
INPUT_VALUE,
RESET,
TRIM1_TRIM,
TRIM2_TRIM,
TRIM3_TRIM,
TRIM4_TRIM,
TRIM5_TRIM,
TRIM6_TRIM,
TRIM7_TRIM,
TRIM8_TRIM,
MAX_POWR1220_REGS
};
enum powr1220_adc_values {
VMON1,
VMON2,
VMON3,
VMON4,
VMON5,
VMON6,
VMON7,
VMON8,
VMON9,
VMON10,
VMON11,
VMON12,
VCCA,
VCCINP,
MAX_POWR1220_ADC_VALUES
};
struct powr1220_data {
struct i2c_client *client;
struct mutex update_lock;
u8 max_channels;
bool adc_valid[MAX_POWR1220_ADC_VALUES];
/* the next value is in jiffies */
unsigned long adc_last_updated[MAX_POWR1220_ADC_VALUES];
/* values */
int adc_maxes[MAX_POWR1220_ADC_VALUES];
int adc_values[MAX_POWR1220_ADC_VALUES];
};
static const char * const input_names[] = {
[VMON1] = "vmon1",
[VMON2] = "vmon2",
[VMON3] = "vmon3",
[VMON4] = "vmon4",
[VMON5] = "vmon5",
[VMON6] = "vmon6",
[VMON7] = "vmon7",
[VMON8] = "vmon8",
[VMON9] = "vmon9",
[VMON10] = "vmon10",
[VMON11] = "vmon11",
[VMON12] = "vmon12",
[VCCA] = "vcca",
[VCCINP] = "vccinp",
};
/* Reads the specified ADC channel */
static int powr1220_read_adc(struct device *dev, int ch_num)
{
struct powr1220_data *data = dev_get_drvdata(dev);
int reading;
int result;
int adc_range = 0;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->adc_last_updated[ch_num] + HZ) ||
!data->adc_valid[ch_num]) {
/*
* figure out if we need to use the attenuator for
* high inputs or inputs that we don't yet have a measurement
* for. We dynamically set the attenuator depending on the
* max reading.
*/
if (data->adc_maxes[ch_num] > ADC_MAX_LOW_MEASUREMENT_MV ||
data->adc_maxes[ch_num] == 0)
adc_range = 1 << 4;
/* set the attenuator and mux */
result = i2c_smbus_write_byte_data(data->client, ADC_MUX,
adc_range | ch_num);
if (result)
goto exit;
/*
* wait at least Tconvert time (200 us) for the
* conversion to complete
*/
udelay(200);
/* get the ADC reading */
result = i2c_smbus_read_byte_data(data->client, ADC_VALUE_LOW);
if (result < 0)
goto exit;
reading = result >> 4;
/* get the upper half of the reading */
result = i2c_smbus_read_byte_data(data->client, ADC_VALUE_HIGH);
if (result < 0)
goto exit;
reading |= result << 4;
/* now convert the reading to a voltage */
reading *= ADC_STEP_MV;
data->adc_values[ch_num] = reading;
data->adc_valid[ch_num] = true;
data->adc_last_updated[ch_num] = jiffies;
result = reading;
if (reading > data->adc_maxes[ch_num])
data->adc_maxes[ch_num] = reading;
} else {
result = data->adc_values[ch_num];
}
exit:
mutex_unlock(&data->update_lock);
return result;
}
static umode_t
powr1220_is_visible(const void *data, enum hwmon_sensor_types type, u32
attr, int channel)
{
struct powr1220_data *chip_data = (struct powr1220_data *)data;
if (channel >= chip_data->max_channels)
return 0;
switch (type) {
case hwmon_in:
switch (attr) {
case hwmon_in_input:
case hwmon_in_highest:
case hwmon_in_label:
return 0444;
default:
break;
}
break;
default:
break;
}
return 0;
}
static int
powr1220_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, const char **str)
{
switch (type) {
case hwmon_in:
switch (attr) {
case hwmon_in_label:
*str = input_names[channel];
return 0;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return -EOPNOTSUPP;
}
static int
powr1220_read(struct device *dev, enum hwmon_sensor_types type, u32
attr, int channel, long *val)
{
struct powr1220_data *data = dev_get_drvdata(dev);
int ret;
switch (type) {
case hwmon_in:
switch (attr) {
case hwmon_in_input:
ret = powr1220_read_adc(dev, channel);
if (ret < 0)
return ret;
*val = ret;
break;
case hwmon_in_highest:
*val = data->adc_maxes[channel];
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static const struct hwmon_channel_info * const powr1220_info[] = {
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL),
NULL
};
static const struct hwmon_ops powr1220_hwmon_ops = {
.read = powr1220_read,
.read_string = powr1220_read_string,
.is_visible = powr1220_is_visible,
};
static const struct hwmon_chip_info powr1220_chip_info = {
.ops = &powr1220_hwmon_ops,
.info = powr1220_info,
};
static const struct i2c_device_id powr1220_ids[];
static int powr1220_probe(struct i2c_client *client)
{
struct powr1220_data *data;
struct device *hwmon_dev;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
switch (i2c_match_id(powr1220_ids, client)->driver_data) {
case powr1014:
data->max_channels = 10;
break;
default:
data->max_channels = 12;
break;
}
mutex_init(&data->update_lock);
data->client = client;
hwmon_dev = devm_hwmon_device_register_with_info(&client->dev,
client->name,
data,
&powr1220_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id powr1220_ids[] = {
{ "powr1014", powr1014, },
{ "powr1220", powr1220, },
{ }
};
MODULE_DEVICE_TABLE(i2c, powr1220_ids);
static struct i2c_driver powr1220_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "powr1220",
},
.probe = powr1220_probe,
.id_table = powr1220_ids,
};
module_i2c_driver(powr1220_driver);
MODULE_AUTHOR("Scott Kanowitz");
MODULE_DESCRIPTION("POWR1220 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/powr1220.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* An hwmon driver for the NXP MC34VR500 PMIC
*
* Author: Mario Kicherer <[email protected]>
*/
#include <linux/bits.h>
#include <linux/dev_printk.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/irqreturn.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regmap.h>
#define MC34VR500_I2C_ADDR 0x08
#define MC34VR500_DEVICEID_VALUE 0x14
/* INTSENSE0 */
#define ENS_BIT BIT(0)
#define LOWVINS_BIT BIT(1)
#define THERM110S_BIT BIT(2)
#define THERM120S_BIT BIT(3)
#define THERM125S_BIT BIT(4)
#define THERM130S_BIT BIT(5)
#define MC34VR500_DEVICEID 0x00
#define MC34VR500_SILICONREVID 0x03
#define MC34VR500_FABID 0x04
#define MC34VR500_INTSTAT0 0x05
#define MC34VR500_INTMASK0 0x06
#define MC34VR500_INTSENSE0 0x07
struct mc34vr500_data {
struct device *hwmon_dev;
struct regmap *regmap;
};
static irqreturn_t mc34vr500_process_interrupt(int irq, void *userdata)
{
struct mc34vr500_data *data = (struct mc34vr500_data *)userdata;
unsigned int reg;
int ret;
ret = regmap_read(data->regmap, MC34VR500_INTSTAT0, ®);
if (ret < 0)
return IRQ_HANDLED;
if (reg) {
if (reg & LOWVINS_BIT)
hwmon_notify_event(data->hwmon_dev, hwmon_in,
hwmon_in_min_alarm, 0);
if (reg & THERM110S_BIT)
hwmon_notify_event(data->hwmon_dev, hwmon_temp,
hwmon_temp_max_alarm, 0);
if (reg & THERM120S_BIT)
hwmon_notify_event(data->hwmon_dev, hwmon_temp,
hwmon_temp_crit_alarm, 0);
if (reg & THERM130S_BIT)
hwmon_notify_event(data->hwmon_dev, hwmon_temp,
hwmon_temp_emergency_alarm, 0);
/* write 1 to clear */
regmap_write(data->regmap, MC34VR500_INTSTAT0, LOWVINS_BIT |
THERM110S_BIT | THERM120S_BIT | THERM130S_BIT);
}
return IRQ_HANDLED;
}
static umode_t mc34vr500_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (attr) {
case hwmon_in_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
case hwmon_temp_emergency_alarm:
return 0444;
default:
break;
}
return 0;
}
static int mc34vr500_alarm_read(struct mc34vr500_data *data, int index,
long *val)
{
unsigned int reg;
int ret;
ret = regmap_read(data->regmap, MC34VR500_INTSENSE0, ®);
if (ret < 0)
return ret;
*val = !!(reg & index);
return 0;
}
static int mc34vr500_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct mc34vr500_data *data = dev_get_drvdata(dev);
switch (type) {
case hwmon_in:
switch (attr) {
case hwmon_in_min_alarm:
return mc34vr500_alarm_read(data, LOWVINS_BIT, val);
default:
return -EOPNOTSUPP;
}
case hwmon_temp:
switch (attr) {
case hwmon_temp_max_alarm:
return mc34vr500_alarm_read(data, THERM110S_BIT, val);
case hwmon_temp_crit_alarm:
return mc34vr500_alarm_read(data, THERM120S_BIT, val);
case hwmon_temp_emergency_alarm:
return mc34vr500_alarm_read(data, THERM130S_BIT, val);
default:
return -EOPNOTSUPP;
}
default:
return -EOPNOTSUPP;
}
}
static const struct hwmon_channel_info * const mc34vr500_info[] = {
HWMON_CHANNEL_INFO(in, HWMON_I_MIN_ALARM),
HWMON_CHANNEL_INFO(temp, HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM
| HWMON_T_EMERGENCY_ALARM),
NULL,
};
static const struct hwmon_ops mc34vr500_hwmon_ops = {
.is_visible = mc34vr500_is_visible,
.read = mc34vr500_read,
};
static const struct hwmon_chip_info mc34vr500_chip_info = {
.ops = &mc34vr500_hwmon_ops,
.info = mc34vr500_info,
};
static const struct regmap_config mc34vr500_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = MC34VR500_INTSENSE0,
};
static int mc34vr500_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct mc34vr500_data *data;
struct device *hwmon_dev;
int ret;
unsigned int reg, revid, fabid;
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &mc34vr500_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
data = devm_kzalloc(dev, sizeof(struct mc34vr500_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->regmap = regmap;
ret = regmap_read(regmap, MC34VR500_DEVICEID, ®);
if (ret < 0)
return ret;
if (reg != MC34VR500_DEVICEID_VALUE)
return -ENODEV;
ret = regmap_read(regmap, MC34VR500_SILICONREVID, &revid);
if (ret < 0)
return ret;
ret = regmap_read(regmap, MC34VR500_FABID, &fabid);
if (ret < 0)
return ret;
dev_dbg(dev, "mc34vr500: revid 0x%x fabid 0x%x\n", revid, fabid);
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&mc34vr500_chip_info,
NULL);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
data->hwmon_dev = hwmon_dev;
if (client->irq) {
ret = devm_request_threaded_irq(dev, client->irq, NULL,
mc34vr500_process_interrupt,
IRQF_TRIGGER_RISING |
IRQF_ONESHOT |
IRQF_SHARED,
dev_name(dev), data);
if (ret)
return ret;
/* write 1 to clear interrupts */
ret = regmap_write(regmap, MC34VR500_INTSTAT0, LOWVINS_BIT |
THERM110S_BIT | THERM120S_BIT |
THERM130S_BIT);
if (ret)
return ret;
/* unmask interrupts */
ret = regmap_write(regmap, MC34VR500_INTMASK0,
(unsigned int) ~(LOWVINS_BIT | THERM110S_BIT |
THERM120S_BIT | THERM130S_BIT));
if (ret)
return ret;
}
return 0;
}
static const struct i2c_device_id mc34vr500_id[] = {
{ "mc34vr500", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, mc34vr500_id);
static const struct of_device_id __maybe_unused mc34vr500_of_match[] = {
{ .compatible = "nxp,mc34vr500" },
{ },
};
MODULE_DEVICE_TABLE(of, mc34vr500_of_match);
static struct i2c_driver mc34vr500_driver = {
.driver = {
.name = "mc34vr500",
.of_match_table = of_match_ptr(mc34vr500_of_match),
},
.probe = mc34vr500_probe,
.id_table = mc34vr500_id,
};
module_i2c_driver(mc34vr500_driver);
MODULE_AUTHOR("Mario Kicherer <[email protected]>");
MODULE_DESCRIPTION("MC34VR500 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/mc34vr500.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Lineage Compact Power Line series of power entry modules.
*
* Copyright (C) 2010, 2011 Ericsson AB.
*
* Documentation:
* http://www.lineagepower.com/oem/pdf/CPLI2C.pdf
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
/*
* This driver supports various Lineage Compact Power Line DC/DC and AC/DC
* converters such as CP1800, CP2000AC, CP2000DC, CP2100DC, and others.
*
* The devices are nominally PMBus compliant. However, most standard PMBus
* commands are not supported. Specifically, all hardware monitoring and
* status reporting commands are non-standard. For this reason, a standard
* PMBus driver can not be used.
*
* All Lineage CPL devices have a built-in I2C bus master selector (PCA9541).
* To ensure device access, this driver should only be used as client driver
* to the pca9541 I2C master selector driver.
*/
/* Command codes */
#define PEM_OPERATION 0x01
#define PEM_CLEAR_INFO_FLAGS 0x03
#define PEM_VOUT_COMMAND 0x21
#define PEM_VOUT_OV_FAULT_LIMIT 0x40
#define PEM_READ_DATA_STRING 0xd0
#define PEM_READ_INPUT_STRING 0xdc
#define PEM_READ_FIRMWARE_REV 0xdd
#define PEM_READ_RUN_TIMER 0xde
#define PEM_FAN_HI_SPEED 0xdf
#define PEM_FAN_NORMAL_SPEED 0xe0
#define PEM_READ_FAN_SPEED 0xe1
/* offsets in data string */
#define PEM_DATA_STATUS_2 0
#define PEM_DATA_STATUS_1 1
#define PEM_DATA_ALARM_2 2
#define PEM_DATA_ALARM_1 3
#define PEM_DATA_VOUT_LSB 4
#define PEM_DATA_VOUT_MSB 5
#define PEM_DATA_CURRENT 6
#define PEM_DATA_TEMP 7
/* Virtual entries, to report constants */
#define PEM_DATA_TEMP_MAX 10
#define PEM_DATA_TEMP_CRIT 11
/* offsets in input string */
#define PEM_INPUT_VOLTAGE 0
#define PEM_INPUT_POWER_LSB 1
#define PEM_INPUT_POWER_MSB 2
/* offsets in fan data */
#define PEM_FAN_ADJUSTMENT 0
#define PEM_FAN_FAN1 1
#define PEM_FAN_FAN2 2
#define PEM_FAN_FAN3 3
/* Status register bits */
#define STS1_OUTPUT_ON (1 << 0)
#define STS1_LEDS_FLASHING (1 << 1)
#define STS1_EXT_FAULT (1 << 2)
#define STS1_SERVICE_LED_ON (1 << 3)
#define STS1_SHUTDOWN_OCCURRED (1 << 4)
#define STS1_INT_FAULT (1 << 5)
#define STS1_ISOLATION_TEST_OK (1 << 6)
#define STS2_ENABLE_PIN_HI (1 << 0)
#define STS2_DATA_OUT_RANGE (1 << 1)
#define STS2_RESTARTED_OK (1 << 1)
#define STS2_ISOLATION_TEST_FAIL (1 << 3)
#define STS2_HIGH_POWER_CAP (1 << 4)
#define STS2_INVALID_INSTR (1 << 5)
#define STS2_WILL_RESTART (1 << 6)
#define STS2_PEC_ERR (1 << 7)
/* Alarm register bits */
#define ALRM1_VIN_OUT_LIMIT (1 << 0)
#define ALRM1_VOUT_OUT_LIMIT (1 << 1)
#define ALRM1_OV_VOLT_SHUTDOWN (1 << 2)
#define ALRM1_VIN_OVERCURRENT (1 << 3)
#define ALRM1_TEMP_WARNING (1 << 4)
#define ALRM1_TEMP_SHUTDOWN (1 << 5)
#define ALRM1_PRIMARY_FAULT (1 << 6)
#define ALRM1_POWER_LIMIT (1 << 7)
#define ALRM2_5V_OUT_LIMIT (1 << 1)
#define ALRM2_TEMP_FAULT (1 << 2)
#define ALRM2_OV_LOW (1 << 3)
#define ALRM2_DCDC_TEMP_HIGH (1 << 4)
#define ALRM2_PRI_TEMP_HIGH (1 << 5)
#define ALRM2_NO_PRIMARY (1 << 6)
#define ALRM2_FAN_FAULT (1 << 7)
#define FIRMWARE_REV_LEN 4
#define DATA_STRING_LEN 9
#define INPUT_STRING_LEN 5 /* 4 for most devices */
#define FAN_SPEED_LEN 5
struct pem_data {
struct i2c_client *client;
const struct attribute_group *groups[4];
struct mutex update_lock;
bool valid;
bool fans_supported;
int input_length;
unsigned long last_updated; /* in jiffies */
u8 firmware_rev[FIRMWARE_REV_LEN];
u8 data_string[DATA_STRING_LEN];
u8 input_string[INPUT_STRING_LEN];
u8 fan_speed[FAN_SPEED_LEN];
};
static int pem_read_block(struct i2c_client *client, u8 command, u8 *data,
int data_len)
{
u8 block_buffer[I2C_SMBUS_BLOCK_MAX];
int result;
result = i2c_smbus_read_block_data(client, command, block_buffer);
if (unlikely(result < 0))
goto abort;
if (unlikely(result == 0xff || result != data_len)) {
result = -EIO;
goto abort;
}
memcpy(data, block_buffer, data_len);
result = 0;
abort:
return result;
}
static struct pem_data *pem_update_device(struct device *dev)
{
struct pem_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct pem_data *ret = data;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
int result;
/* Read data string */
result = pem_read_block(client, PEM_READ_DATA_STRING,
data->data_string,
sizeof(data->data_string));
if (unlikely(result < 0)) {
ret = ERR_PTR(result);
goto abort;
}
/* Read input string */
if (data->input_length) {
result = pem_read_block(client, PEM_READ_INPUT_STRING,
data->input_string,
data->input_length);
if (unlikely(result < 0)) {
ret = ERR_PTR(result);
goto abort;
}
}
/* Read fan speeds */
if (data->fans_supported) {
result = pem_read_block(client, PEM_READ_FAN_SPEED,
data->fan_speed,
sizeof(data->fan_speed));
if (unlikely(result < 0)) {
ret = ERR_PTR(result);
goto abort;
}
}
i2c_smbus_write_byte(client, PEM_CLEAR_INFO_FLAGS);
data->last_updated = jiffies;
data->valid = true;
}
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static long pem_get_data(u8 *data, int len, int index)
{
long val;
switch (index) {
case PEM_DATA_VOUT_LSB:
val = (data[index] + (data[index+1] << 8)) * 5 / 2;
break;
case PEM_DATA_CURRENT:
val = data[index] * 200;
break;
case PEM_DATA_TEMP:
val = data[index] * 1000;
break;
case PEM_DATA_TEMP_MAX:
val = 97 * 1000; /* 97 degrees C per datasheet */
break;
case PEM_DATA_TEMP_CRIT:
val = 107 * 1000; /* 107 degrees C per datasheet */
break;
default:
WARN_ON_ONCE(1);
val = 0;
}
return val;
}
static long pem_get_input(u8 *data, int len, int index)
{
long val;
switch (index) {
case PEM_INPUT_VOLTAGE:
if (len == INPUT_STRING_LEN)
val = (data[index] + (data[index+1] << 8) - 75) * 1000;
else
val = (data[index] - 75) * 1000;
break;
case PEM_INPUT_POWER_LSB:
if (len == INPUT_STRING_LEN)
index++;
val = (data[index] + (data[index+1] << 8)) * 1000000L;
break;
default:
WARN_ON_ONCE(1);
val = 0;
}
return val;
}
static long pem_get_fan(u8 *data, int len, int index)
{
long val;
switch (index) {
case PEM_FAN_FAN1:
case PEM_FAN_FAN2:
case PEM_FAN_FAN3:
val = data[index] * 100;
break;
default:
WARN_ON_ONCE(1);
val = 0;
}
return val;
}
/*
* Show boolean, either a fault or an alarm.
* .nr points to the register, .index is the bit mask to check
*/
static ssize_t pem_bool_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(da);
struct pem_data *data = pem_update_device(dev);
u8 status;
if (IS_ERR(data))
return PTR_ERR(data);
status = data->data_string[attr->nr] & attr->index;
return sysfs_emit(buf, "%d\n", !!status);
}
static ssize_t pem_data_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct pem_data *data = pem_update_device(dev);
long value;
if (IS_ERR(data))
return PTR_ERR(data);
value = pem_get_data(data->data_string, sizeof(data->data_string),
attr->index);
return sysfs_emit(buf, "%ld\n", value);
}
static ssize_t pem_input_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct pem_data *data = pem_update_device(dev);
long value;
if (IS_ERR(data))
return PTR_ERR(data);
value = pem_get_input(data->input_string, sizeof(data->input_string),
attr->index);
return sysfs_emit(buf, "%ld\n", value);
}
static ssize_t pem_fan_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct pem_data *data = pem_update_device(dev);
long value;
if (IS_ERR(data))
return PTR_ERR(data);
value = pem_get_fan(data->fan_speed, sizeof(data->fan_speed),
attr->index);
return sysfs_emit(buf, "%ld\n", value);
}
/* Voltages */
static SENSOR_DEVICE_ATTR_RO(in1_input, pem_data, PEM_DATA_VOUT_LSB);
static SENSOR_DEVICE_ATTR_2_RO(in1_alarm, pem_bool, PEM_DATA_ALARM_1,
ALRM1_VOUT_OUT_LIMIT);
static SENSOR_DEVICE_ATTR_2_RO(in1_crit_alarm, pem_bool, PEM_DATA_ALARM_1,
ALRM1_OV_VOLT_SHUTDOWN);
static SENSOR_DEVICE_ATTR_RO(in2_input, pem_input, PEM_INPUT_VOLTAGE);
static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, pem_bool, PEM_DATA_ALARM_1,
ALRM1_VIN_OUT_LIMIT | ALRM1_PRIMARY_FAULT);
/* Currents */
static SENSOR_DEVICE_ATTR_RO(curr1_input, pem_data, PEM_DATA_CURRENT);
static SENSOR_DEVICE_ATTR_2_RO(curr1_alarm, pem_bool, PEM_DATA_ALARM_1,
ALRM1_VIN_OVERCURRENT);
/* Power */
static SENSOR_DEVICE_ATTR_RO(power1_input, pem_input, PEM_INPUT_POWER_LSB);
static SENSOR_DEVICE_ATTR_2_RO(power1_alarm, pem_bool, PEM_DATA_ALARM_1,
ALRM1_POWER_LIMIT);
/* Fans */
static SENSOR_DEVICE_ATTR_RO(fan1_input, pem_fan, PEM_FAN_FAN1);
static SENSOR_DEVICE_ATTR_RO(fan2_input, pem_fan, PEM_FAN_FAN2);
static SENSOR_DEVICE_ATTR_RO(fan3_input, pem_fan, PEM_FAN_FAN3);
static SENSOR_DEVICE_ATTR_2_RO(fan1_alarm, pem_bool, PEM_DATA_ALARM_2,
ALRM2_FAN_FAULT);
/* Temperatures */
static SENSOR_DEVICE_ATTR_RO(temp1_input, pem_data, PEM_DATA_TEMP);
static SENSOR_DEVICE_ATTR_RO(temp1_max, pem_data, PEM_DATA_TEMP_MAX);
static SENSOR_DEVICE_ATTR_RO(temp1_crit, pem_data, PEM_DATA_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_2_RO(temp1_alarm, pem_bool, PEM_DATA_ALARM_1,
ALRM1_TEMP_WARNING);
static SENSOR_DEVICE_ATTR_2_RO(temp1_crit_alarm, pem_bool, PEM_DATA_ALARM_1,
ALRM1_TEMP_SHUTDOWN);
static SENSOR_DEVICE_ATTR_2_RO(temp1_fault, pem_bool, PEM_DATA_ALARM_2,
ALRM2_TEMP_FAULT);
static struct attribute *pem_attributes[] = {
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_curr1_alarm.dev_attr.attr,
&sensor_dev_attr_power1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
NULL,
};
static const struct attribute_group pem_group = {
.attrs = pem_attributes,
};
static struct attribute *pem_input_attributes[] = {
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_power1_input.dev_attr.attr,
NULL
};
static const struct attribute_group pem_input_group = {
.attrs = pem_input_attributes,
};
static struct attribute *pem_fan_attributes[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
NULL
};
static const struct attribute_group pem_fan_group = {
.attrs = pem_fan_attributes,
};
static int pem_probe(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct pem_data *data;
int ret, idx = 0;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BLOCK_DATA
| I2C_FUNC_SMBUS_WRITE_BYTE))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/*
* We use the next two commands to determine if the device is really
* there.
*/
ret = pem_read_block(client, PEM_READ_FIRMWARE_REV,
data->firmware_rev, sizeof(data->firmware_rev));
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte(client, PEM_CLEAR_INFO_FLAGS);
if (ret < 0)
return ret;
dev_info(dev, "Firmware revision %d.%d.%d\n",
data->firmware_rev[0], data->firmware_rev[1],
data->firmware_rev[2]);
/* sysfs hooks */
data->groups[idx++] = &pem_group;
/*
* Check if input readings are supported.
* This is the case if we can read input data,
* and if the returned data is not all zeros.
* Note that input alarms are always supported.
*/
ret = pem_read_block(client, PEM_READ_INPUT_STRING,
data->input_string,
sizeof(data->input_string) - 1);
if (!ret && (data->input_string[0] || data->input_string[1] ||
data->input_string[2]))
data->input_length = sizeof(data->input_string) - 1;
else if (ret < 0) {
/* Input string is one byte longer for some devices */
ret = pem_read_block(client, PEM_READ_INPUT_STRING,
data->input_string,
sizeof(data->input_string));
if (!ret && (data->input_string[0] || data->input_string[1] ||
data->input_string[2] || data->input_string[3]))
data->input_length = sizeof(data->input_string);
}
if (data->input_length)
data->groups[idx++] = &pem_input_group;
/*
* Check if fan speed readings are supported.
* This is the case if we can read fan speed data,
* and if the returned data is not all zeros.
* Note that the fan alarm is always supported.
*/
ret = pem_read_block(client, PEM_READ_FAN_SPEED,
data->fan_speed,
sizeof(data->fan_speed));
if (!ret && (data->fan_speed[0] || data->fan_speed[1] ||
data->fan_speed[2] || data->fan_speed[3])) {
data->fans_supported = true;
data->groups[idx++] = &pem_fan_group;
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id pem_id[] = {
{"lineage_pem", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, pem_id);
static struct i2c_driver pem_driver = {
.driver = {
.name = "lineage_pem",
},
.probe = pem_probe,
.id_table = pem_id,
};
module_i2c_driver(pem_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("Lineage CPL PEM hardware monitoring driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lineage-pem.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* An hwmon driver for the Analog Devices AD7414
*
* Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
*
* Copyright (c) 2008 PIKA Technologies
* Sean MacLennan <[email protected]>
*
* Copyright (c) 2008 Spansion Inc.
* Frank Edelhaeuser <frank.edelhaeuser at spansion.com>
* (converted to "new style" I2C driver model, removed checkpatch.pl warnings)
*
* Based on ad7418.c
* Copyright 2006 Tower Technologies, Alessandro Zummo <a.zummo at towertech.it>
*/
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
/* AD7414 registers */
#define AD7414_REG_TEMP 0x00
#define AD7414_REG_CONF 0x01
#define AD7414_REG_T_HIGH 0x02
#define AD7414_REG_T_LOW 0x03
static u8 AD7414_REG_LIMIT[] = { AD7414_REG_T_HIGH, AD7414_REG_T_LOW };
struct ad7414_data {
struct i2c_client *client;
struct mutex lock; /* atomic read data updates */
bool valid; /* true if following fields are valid */
unsigned long next_update; /* In jiffies */
s16 temp_input; /* Register values */
s8 temps[ARRAY_SIZE(AD7414_REG_LIMIT)];
};
/* REG: (0.25C/bit, two's complement) << 6 */
static inline int ad7414_temp_from_reg(s16 reg)
{
/*
* use integer division instead of equivalent right shift to
* guarantee arithmetic shift and preserve the sign
*/
return ((int)reg / 64) * 250;
}
static inline int ad7414_read(struct i2c_client *client, u8 reg)
{
if (reg == AD7414_REG_TEMP)
return i2c_smbus_read_word_swapped(client, reg);
else
return i2c_smbus_read_byte_data(client, reg);
}
static inline int ad7414_write(struct i2c_client *client, u8 reg, u8 value)
{
return i2c_smbus_write_byte_data(client, reg, value);
}
static struct ad7414_data *ad7414_update_device(struct device *dev)
{
struct ad7414_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
mutex_lock(&data->lock);
if (time_after(jiffies, data->next_update) || !data->valid) {
int value, i;
dev_dbg(&client->dev, "starting ad7414 update\n");
value = ad7414_read(client, AD7414_REG_TEMP);
if (value < 0)
dev_dbg(&client->dev, "AD7414_REG_TEMP err %d\n",
value);
else
data->temp_input = value;
for (i = 0; i < ARRAY_SIZE(AD7414_REG_LIMIT); ++i) {
value = ad7414_read(client, AD7414_REG_LIMIT[i]);
if (value < 0)
dev_dbg(&client->dev, "AD7414 reg %d err %d\n",
AD7414_REG_LIMIT[i], value);
else
data->temps[i] = value;
}
data->next_update = jiffies + HZ + HZ / 2;
data->valid = true;
}
mutex_unlock(&data->lock);
return data;
}
static ssize_t temp_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct ad7414_data *data = ad7414_update_device(dev);
return sprintf(buf, "%d\n", ad7414_temp_from_reg(data->temp_input));
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
static ssize_t max_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int index = to_sensor_dev_attr(attr)->index;
struct ad7414_data *data = ad7414_update_device(dev);
return sprintf(buf, "%d\n", data->temps[index] * 1000);
}
static ssize_t max_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct ad7414_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int index = to_sensor_dev_attr(attr)->index;
u8 reg = AD7414_REG_LIMIT[index];
long temp;
int ret = kstrtol(buf, 10, &temp);
if (ret < 0)
return ret;
temp = clamp_val(temp, -40000, 85000);
temp = (temp + (temp < 0 ? -500 : 500)) / 1000;
mutex_lock(&data->lock);
data->temps[index] = temp;
ad7414_write(client, reg, temp);
mutex_unlock(&data->lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_max, max_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, max_min, 1);
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct ad7414_data *data = ad7414_update_device(dev);
int value = (data->temp_input >> bitnr) & 1;
return sprintf(buf, "%d\n", value);
}
static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 4);
static struct attribute *ad7414_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(ad7414);
static int ad7414_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct ad7414_data *data;
struct device *hwmon_dev;
int conf;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_READ_WORD_DATA))
return -EOPNOTSUPP;
data = devm_kzalloc(dev, sizeof(struct ad7414_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->lock);
dev_info(&client->dev, "chip found\n");
/* Make sure the chip is powered up. */
conf = i2c_smbus_read_byte_data(client, AD7414_REG_CONF);
if (conf < 0)
dev_warn(dev, "ad7414_probe unable to read config register.\n");
else {
conf &= ~(1 << 7);
i2c_smbus_write_byte_data(client, AD7414_REG_CONF, conf);
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev,
client->name,
data, ad7414_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ad7414_id[] = {
{ "ad7414", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, ad7414_id);
static const struct of_device_id __maybe_unused ad7414_of_match[] = {
{ .compatible = "ad,ad7414" },
{ },
};
MODULE_DEVICE_TABLE(of, ad7414_of_match);
static struct i2c_driver ad7414_driver = {
.driver = {
.name = "ad7414",
.of_match_table = of_match_ptr(ad7414_of_match),
},
.probe = ad7414_probe,
.id_table = ad7414_id,
};
module_i2c_driver(ad7414_driver);
MODULE_AUTHOR("Stefan Roese <sr at denx.de>, "
"Frank Edelhaeuser <frank.edelhaeuser at spansion.com>");
MODULE_DESCRIPTION("AD7414 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ad7414.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Functions to access SY3686A power management chip temperature
*
* Copyright (C) 2021 reMarkable AS - http://www.remarkable.com/
*
* Authors: Lars Ivar Miljeteig <[email protected]>
* Alistair Francis <[email protected]>
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/sy7636a.h>
static int sy7636a_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *temp)
{
struct regmap *regmap = dev_get_drvdata(dev);
int ret, reg_val;
ret = regmap_read(regmap,
SY7636A_REG_TERMISTOR_READOUT, ®_val);
if (ret)
return ret;
*temp = reg_val * 1000;
return 0;
}
static umode_t sy7636a_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
if (type != hwmon_temp)
return 0;
if (attr != hwmon_temp_input)
return 0;
return 0444;
}
static const struct hwmon_ops sy7636a_hwmon_ops = {
.is_visible = sy7636a_is_visible,
.read = sy7636a_read,
};
static const struct hwmon_channel_info * const sy7636a_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
NULL
};
static const struct hwmon_chip_info sy7636a_chip_info = {
.ops = &sy7636a_hwmon_ops,
.info = sy7636a_info,
};
static int sy7636a_sensor_probe(struct platform_device *pdev)
{
struct regmap *regmap = dev_get_regmap(pdev->dev.parent, NULL);
struct regulator *regulator;
struct device *hwmon_dev;
int err;
if (!regmap)
return -EPROBE_DEFER;
regulator = devm_regulator_get(&pdev->dev, "vcom");
if (IS_ERR(regulator))
return PTR_ERR(regulator);
err = regulator_enable(regulator);
if (err)
return err;
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
"sy7636a_temperature", regmap,
&sy7636a_chip_info, NULL);
if (IS_ERR(hwmon_dev)) {
err = PTR_ERR(hwmon_dev);
dev_err(&pdev->dev, "Unable to register hwmon device, returned %d\n", err);
return err;
}
return 0;
}
static struct platform_driver sy7636a_sensor_driver = {
.probe = sy7636a_sensor_probe,
.driver = {
.name = "sy7636a-temperature",
},
};
module_platform_driver(sy7636a_sensor_driver);
MODULE_DESCRIPTION("SY7636A sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/sy7636a-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Platform driver for OneXPlayer, AOK ZOE, and Aya Neo Handhelds that expose
* fan reading and control via hwmon sysfs.
*
* Old OXP boards have the same DMI strings and they are told apart by
* the boot cpu vendor (Intel/AMD). Currently only AMD boards are
* supported but the code is made to be simple to add other handheld
* boards in the future.
* Fan control is provided via pwm interface in the range [0-255].
* Old AMD boards use [0-100] as range in the EC, the written value is
* scaled to accommodate for that. Newer boards like the mini PRO and
* AOK ZOE are not scaled but have the same EC layout.
*
* Copyright (C) 2022 Joaquín I. Aramendía <[email protected]>
*/
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/processor.h>
/* Handle ACPI lock mechanism */
static u32 oxp_mutex;
#define ACPI_LOCK_DELAY_MS 500
static bool lock_global_acpi_lock(void)
{
return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS, &oxp_mutex));
}
static bool unlock_global_acpi_lock(void)
{
return ACPI_SUCCESS(acpi_release_global_lock(oxp_mutex));
}
enum oxp_board {
aok_zoe_a1 = 1,
aya_neo_2,
aya_neo_air,
aya_neo_air_pro,
aya_neo_geek,
oxp_mini_amd,
oxp_mini_amd_a07,
oxp_mini_amd_pro,
};
static enum oxp_board board;
/* Fan reading and PWM */
#define OXP_SENSOR_FAN_REG 0x76 /* Fan reading is 2 registers long */
#define OXP_SENSOR_PWM_ENABLE_REG 0x4A /* PWM enable is 1 register long */
#define OXP_SENSOR_PWM_REG 0x4B /* PWM reading is 1 register long */
/* Turbo button takeover function
* Older boards have different values and EC registers
* for the same function
*/
#define OXP_OLD_TURBO_SWITCH_REG 0x1E
#define OXP_OLD_TURBO_TAKE_VAL 0x01
#define OXP_OLD_TURBO_RETURN_VAL 0x00
#define OXP_TURBO_SWITCH_REG 0xF1
#define OXP_TURBO_TAKE_VAL 0x40
#define OXP_TURBO_RETURN_VAL 0x00
static const struct dmi_system_id dmi_table[] = {
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "AOKZOE"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "AOKZOE A1 AR07"),
},
.driver_data = (void *)aok_zoe_a1,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "AOKZOE"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "AOKZOE A1 Pro"),
},
.driver_data = (void *)aok_zoe_a1,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "AYANEO"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "AYANEO 2"),
},
.driver_data = (void *)aya_neo_2,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "AYANEO"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "AIR"),
},
.driver_data = (void *)aya_neo_air,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "AYANEO"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "AIR Pro"),
},
.driver_data = (void *)aya_neo_air_pro,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "AYANEO"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "GEEK"),
},
.driver_data = (void *)aya_neo_geek,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "ONE-NETBOOK"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "ONE XPLAYER"),
},
.driver_data = (void *)oxp_mini_amd,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "ONE-NETBOOK"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "ONEXPLAYER mini A07"),
},
.driver_data = (void *)oxp_mini_amd_a07,
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "ONE-NETBOOK"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "ONEXPLAYER Mini Pro"),
},
.driver_data = (void *)oxp_mini_amd_pro,
},
{},
};
/* Helper functions to handle EC read/write */
static int read_from_ec(u8 reg, int size, long *val)
{
int i;
int ret;
u8 buffer;
if (!lock_global_acpi_lock())
return -EBUSY;
*val = 0;
for (i = 0; i < size; i++) {
ret = ec_read(reg + i, &buffer);
if (ret)
return ret;
*val <<= i * 8;
*val += buffer;
}
if (!unlock_global_acpi_lock())
return -EBUSY;
return 0;
}
static int write_to_ec(u8 reg, u8 value)
{
int ret;
if (!lock_global_acpi_lock())
return -EBUSY;
ret = ec_write(reg, value);
if (!unlock_global_acpi_lock())
return -EBUSY;
return ret;
}
/* Turbo button toggle functions */
static int tt_toggle_enable(void)
{
u8 reg;
u8 val;
switch (board) {
case oxp_mini_amd_a07:
reg = OXP_OLD_TURBO_SWITCH_REG;
val = OXP_OLD_TURBO_TAKE_VAL;
break;
case oxp_mini_amd_pro:
case aok_zoe_a1:
reg = OXP_TURBO_SWITCH_REG;
val = OXP_TURBO_TAKE_VAL;
break;
default:
return -EINVAL;
}
return write_to_ec(reg, val);
}
static int tt_toggle_disable(void)
{
u8 reg;
u8 val;
switch (board) {
case oxp_mini_amd_a07:
reg = OXP_OLD_TURBO_SWITCH_REG;
val = OXP_OLD_TURBO_RETURN_VAL;
break;
case oxp_mini_amd_pro:
case aok_zoe_a1:
reg = OXP_TURBO_SWITCH_REG;
val = OXP_TURBO_RETURN_VAL;
break;
default:
return -EINVAL;
}
return write_to_ec(reg, val);
}
/* Callbacks for turbo toggle attribute */
static umode_t tt_toggle_is_visible(struct kobject *kobj,
struct attribute *attr, int n)
{
switch (board) {
case aok_zoe_a1:
case oxp_mini_amd_a07:
case oxp_mini_amd_pro:
return attr->mode;
default:
break;
}
return 0;
}
static ssize_t tt_toggle_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int rval;
bool value;
rval = kstrtobool(buf, &value);
if (rval)
return rval;
if (value) {
rval = tt_toggle_enable();
} else {
rval = tt_toggle_disable();
}
if (rval)
return rval;
return count;
}
static ssize_t tt_toggle_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int retval;
u8 reg;
long val;
switch (board) {
case oxp_mini_amd_a07:
reg = OXP_OLD_TURBO_SWITCH_REG;
break;
case oxp_mini_amd_pro:
case aok_zoe_a1:
reg = OXP_TURBO_SWITCH_REG;
break;
default:
return -EINVAL;
}
retval = read_from_ec(reg, 1, &val);
if (retval)
return retval;
return sysfs_emit(buf, "%d\n", !!val);
}
static DEVICE_ATTR_RW(tt_toggle);
/* PWM enable/disable functions */
static int oxp_pwm_enable(void)
{
return write_to_ec(OXP_SENSOR_PWM_ENABLE_REG, 0x01);
}
static int oxp_pwm_disable(void)
{
return write_to_ec(OXP_SENSOR_PWM_ENABLE_REG, 0x00);
}
/* Callbacks for hwmon interface */
static umode_t oxp_ec_hwmon_is_visible(const void *drvdata,
enum hwmon_sensor_types type, u32 attr, int channel)
{
switch (type) {
case hwmon_fan:
return 0444;
case hwmon_pwm:
return 0644;
default:
return 0;
}
}
static int oxp_platform_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
int ret;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
return read_from_ec(OXP_SENSOR_FAN_REG, 2, val);
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
ret = read_from_ec(OXP_SENSOR_PWM_REG, 1, val);
if (ret)
return ret;
switch (board) {
case aya_neo_2:
case aya_neo_air:
case aya_neo_air_pro:
case aya_neo_geek:
case oxp_mini_amd:
case oxp_mini_amd_a07:
*val = (*val * 255) / 100;
break;
case oxp_mini_amd_pro:
case aok_zoe_a1:
default:
break;
}
return 0;
case hwmon_pwm_enable:
return read_from_ec(OXP_SENSOR_PWM_ENABLE_REG, 1, val);
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static int oxp_platform_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_enable:
if (val == 1)
return oxp_pwm_enable();
else if (val == 0)
return oxp_pwm_disable();
return -EINVAL;
case hwmon_pwm_input:
if (val < 0 || val > 255)
return -EINVAL;
switch (board) {
case aya_neo_2:
case aya_neo_air:
case aya_neo_air_pro:
case aya_neo_geek:
case oxp_mini_amd:
case oxp_mini_amd_a07:
val = (val * 100) / 255;
break;
case aok_zoe_a1:
case oxp_mini_amd_pro:
default:
break;
}
return write_to_ec(OXP_SENSOR_PWM_REG, val);
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
/* Known sensors in the OXP EC controllers */
static const struct hwmon_channel_info * const oxp_platform_sensors[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
NULL,
};
static struct attribute *oxp_ec_attrs[] = {
&dev_attr_tt_toggle.attr,
NULL
};
static struct attribute_group oxp_ec_attribute_group = {
.is_visible = tt_toggle_is_visible,
.attrs = oxp_ec_attrs,
};
static const struct attribute_group *oxp_ec_groups[] = {
&oxp_ec_attribute_group,
NULL
};
static const struct hwmon_ops oxp_ec_hwmon_ops = {
.is_visible = oxp_ec_hwmon_is_visible,
.read = oxp_platform_read,
.write = oxp_platform_write,
};
static const struct hwmon_chip_info oxp_ec_chip_info = {
.ops = &oxp_ec_hwmon_ops,
.info = oxp_platform_sensors,
};
/* Initialization logic */
static int oxp_platform_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device *hwdev;
hwdev = devm_hwmon_device_register_with_info(dev, "oxpec", NULL,
&oxp_ec_chip_info, NULL);
return PTR_ERR_OR_ZERO(hwdev);
}
static struct platform_driver oxp_platform_driver = {
.driver = {
.name = "oxp-platform",
.dev_groups = oxp_ec_groups,
},
.probe = oxp_platform_probe,
};
static struct platform_device *oxp_platform_device;
static int __init oxp_platform_init(void)
{
const struct dmi_system_id *dmi_entry;
/*
* Have to check for AMD processor here because DMI strings are the
* same between Intel and AMD boards, the only way to tell them apart
* is the CPU.
* Intel boards seem to have different EC registers and values to
* read/write.
*/
dmi_entry = dmi_first_match(dmi_table);
if (!dmi_entry || boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
return -ENODEV;
board = (enum oxp_board)(unsigned long)dmi_entry->driver_data;
oxp_platform_device =
platform_create_bundle(&oxp_platform_driver,
oxp_platform_probe, NULL, 0, NULL, 0);
return PTR_ERR_OR_ZERO(oxp_platform_device);
}
static void __exit oxp_platform_exit(void)
{
platform_device_unregister(oxp_platform_device);
platform_driver_unregister(&oxp_platform_driver);
}
MODULE_DEVICE_TABLE(dmi, dmi_table);
module_init(oxp_platform_init);
module_exit(oxp_platform_exit);
MODULE_AUTHOR("Joaquín Ignacio Aramendía <[email protected]>");
MODULE_DESCRIPTION("Platform driver that handles EC sensors of OneXPlayer devices");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/oxp-sensors.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (c) 1998 - 2003 Frodo Looijaard <[email protected]>,
* Philip Edelbrock <[email protected]>,
* and Mark Studebaker <[email protected]>
* Ported to 2.6 by Bernhard C. Schrenk <[email protected]>
* Copyright (c) 2007 - 1012 Jean Delvare <[email protected]>
*/
/*
* Supports following chips:
*
* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
* w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
* w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
* w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
* w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
*
* For other winbond chips, and for i2c support in the above chips,
* use w83781d.c.
*
* Note: automatic ("cruise") fan control for 697, 637 & 627thf not
* supported yet.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/ioport.h>
#include <linux/acpi.h>
#include <linux/io.h>
#include "lm75.h"
static struct platform_device *pdev;
#define DRVNAME "w83627hf"
enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
struct w83627hf_sio_data {
enum chips type;
int sioaddr;
};
static u8 force_i2c = 0x1f;
module_param(force_i2c, byte, 0);
MODULE_PARM_DESC(force_i2c,
"Initialize the i2c address of the sensors");
static bool init = 1;
module_param(init, bool, 0);
MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
/* modified from kernel/include/traps.c */
#define DEV 0x07 /* Register: Logical device select */
/* logical device numbers for superio_select (below) */
#define W83627HF_LD_FDC 0x00
#define W83627HF_LD_PRT 0x01
#define W83627HF_LD_UART1 0x02
#define W83627HF_LD_UART2 0x03
#define W83627HF_LD_KBC 0x05
#define W83627HF_LD_CIR 0x06 /* w83627hf only */
#define W83627HF_LD_GAME 0x07
#define W83627HF_LD_MIDI 0x07
#define W83627HF_LD_GPIO1 0x07
#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
#define W83627HF_LD_GPIO2 0x08
#define W83627HF_LD_GPIO3 0x09
#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
#define W83627HF_LD_ACPI 0x0a
#define W83627HF_LD_HWM 0x0b
#define DEVID 0x20 /* Register: Device ID */
#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
#define W83687THF_VID_EN 0x29 /* w83687thf only */
#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
static inline void
superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
{
outb(reg, sio->sioaddr);
outb(val, sio->sioaddr + 1);
}
static inline int
superio_inb(struct w83627hf_sio_data *sio, int reg)
{
outb(reg, sio->sioaddr);
return inb(sio->sioaddr + 1);
}
static inline void
superio_select(struct w83627hf_sio_data *sio, int ld)
{
outb(DEV, sio->sioaddr);
outb(ld, sio->sioaddr + 1);
}
static inline int
superio_enter(struct w83627hf_sio_data *sio)
{
if (!request_muxed_region(sio->sioaddr, 2, DRVNAME))
return -EBUSY;
outb(0x87, sio->sioaddr);
outb(0x87, sio->sioaddr);
return 0;
}
static inline void
superio_exit(struct w83627hf_sio_data *sio)
{
outb(0xAA, sio->sioaddr);
release_region(sio->sioaddr, 2);
}
#define W627_DEVID 0x52
#define W627THF_DEVID 0x82
#define W697_DEVID 0x60
#define W637_DEVID 0x70
#define W687THF_DEVID 0x85
#define WINB_ACT_REG 0x30
#define WINB_BASE_REG 0x60
/* Constants specified below */
/* Alignment of the base address */
#define WINB_ALIGNMENT ~7
/* Offset & size of I/O region we are interested in */
#define WINB_REGION_OFFSET 5
#define WINB_REGION_SIZE 2
/* Where are the sensors address/data registers relative to the region offset */
#define W83781D_ADDR_REG_OFFSET 0
#define W83781D_DATA_REG_OFFSET 1
/* The W83781D registers */
/* The W83782D registers for nr=7,8 are in bank 5 */
#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
(0x554 + (((nr) - 7) * 2)))
#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
(0x555 + (((nr) - 7) * 2)))
#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
(0x550 + (nr) - 7))
/* nr:0-2 for fans:1-3 */
#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
#define W83627HF_REG_FAN(nr) (0x28 + (nr))
#define W83627HF_REG_TEMP2_CONFIG 0x152
#define W83627HF_REG_TEMP3_CONFIG 0x252
/* these are zero-based, unlike config constants above */
static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
#define W83781D_REG_BANK 0x4E
#define W83781D_REG_CONFIG 0x40
#define W83781D_REG_ALARM1 0x459
#define W83781D_REG_ALARM2 0x45A
#define W83781D_REG_ALARM3 0x45B
#define W83781D_REG_BEEP_CONFIG 0x4D
#define W83781D_REG_BEEP_INTS1 0x56
#define W83781D_REG_BEEP_INTS2 0x57
#define W83781D_REG_BEEP_INTS3 0x453
#define W83781D_REG_VID_FANDIV 0x47
#define W83781D_REG_CHIPID 0x49
#define W83781D_REG_WCHIPID 0x58
#define W83781D_REG_CHIPMAN 0x4F
#define W83781D_REG_PIN 0x4B
#define W83781D_REG_VBAT 0x5D
#define W83627HF_REG_PWM1 0x5A
#define W83627HF_REG_PWM2 0x5B
static const u8 W83627THF_REG_PWM_ENABLE[] = {
0x04, /* FAN 1 mode */
0x04, /* FAN 2 mode */
0x12, /* FAN AUX mode */
};
static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
W83627THF_REG_PWM3 };
#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
regpwm_627hf[nr] : regpwm[nr])
#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
W83637HF_REG_PWM_FREQ2,
W83637HF_REG_PWM_FREQ3 };
#define W83627HF_BASE_PWM_FREQ 46870
#define W83781D_REG_I2C_ADDR 0x48
#define W83781D_REG_I2C_SUBADDR 0x4A
/* Sensor selection */
#define W83781D_REG_SCFG1 0x5D
static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
#define W83781D_REG_SCFG2 0x59
static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
#define W83781D_DEFAULT_BETA 3435
/*
* Conversions. Limit checking is only done on the TO_REG
* variants. Note that you should be a bit careful with which arguments
* these macros are called: arguments may be evaluated more than once.
* Fixing this is just not worth it.
*/
#define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
#define IN_FROM_REG(val) ((val) * 16)
static inline u8 FAN_TO_REG(long rpm, int div)
{
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
#define TEMP_MIN (-128000)
#define TEMP_MAX ( 127000)
/*
* TEMP: 0.001C/bit (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static u8 TEMP_TO_REG(long temp)
{
int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
ntemp += (ntemp < 0 ? -500 : 500);
return (u8)(ntemp / 1000);
}
static int TEMP_FROM_REG(u8 reg)
{
return (s8)reg * 1000;
}
#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
#define PWM_TO_REG(val) (clamp_val((val), 0, 255))
static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
{
unsigned long freq;
freq = W83627HF_BASE_PWM_FREQ >> reg;
return freq;
}
static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
{
u8 i;
/*
* Only 5 dividers (1 2 4 8 16)
* Search for the nearest available frequency
*/
for (i = 0; i < 4; i++) {
if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
(W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
break;
}
return i;
}
static inline unsigned long pwm_freq_from_reg(u8 reg)
{
/* Clock bit 8 -> 180 kHz or 24 MHz */
unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
reg &= 0x7f;
/* This should not happen but anyway... */
if (reg == 0)
reg++;
return clock / (reg << 8);
}
static inline u8 pwm_freq_to_reg(unsigned long val)
{
/* Minimum divider value is 0x01 and maximum is 0x7F */
if (val >= 93750) /* The highest we can do */
return 0x01;
if (val >= 720) /* Use 24 MHz clock */
return 24000000UL / (val << 8);
if (val < 6) /* The lowest we can do */
return 0xFF;
else /* Use 180 kHz clock */
return 0x80 | (180000UL / (val << 8));
}
#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
#define DIV_FROM_REG(val) (1 << (val))
static inline u8 DIV_TO_REG(long val)
{
int i;
val = clamp_val(val, 1, 128) >> 1;
for (i = 0; i < 7; i++) {
if (val == 0)
break;
val >>= 1;
}
return (u8)i;
}
/*
* For each registered chip, we need to keep some data in memory.
* The structure is dynamically allocated.
*/
struct w83627hf_data {
unsigned short addr;
const char *name;
struct device *hwmon_dev;
struct mutex lock;
enum chips type;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 in[9]; /* Register value */
u8 in_max[9]; /* Register value */
u8 in_min[9]; /* Register value */
u8 fan[3]; /* Register value */
u8 fan_min[3]; /* Register value */
u16 temp[3]; /* Register value */
u16 temp_max[3]; /* Register value */
u16 temp_max_hyst[3]; /* Register value */
u8 fan_div[3]; /* Register encoding, shifted right */
u8 vid; /* Register encoding, combined */
u32 alarms; /* Register encoding, combined */
u32 beep_mask; /* Register encoding, combined */
u8 pwm[3]; /* Register value */
u8 pwm_enable[3]; /* 1 = manual
* 2 = thermal cruise (also called SmartFan I)
* 3 = fan speed cruise
*/
u8 pwm_freq[3]; /* Register value */
u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
* 4 = thermistor
*/
u8 vrm;
u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
#ifdef CONFIG_PM
/* Remember extra register values over suspend/resume */
u8 scfg1;
u8 scfg2;
#endif
};
/* Registers 0x50-0x5f are banked */
static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
{
if ((reg & 0x00f0) == 0x50) {
outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
}
}
/* Not strictly necessary, but play it safe for now */
static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
{
if (reg & 0xff00) {
outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
}
}
static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
{
int res, word_sized;
mutex_lock(&data->lock);
word_sized = (((reg & 0xff00) == 0x100)
|| ((reg & 0xff00) == 0x200))
&& (((reg & 0x00ff) == 0x50)
|| ((reg & 0x00ff) == 0x53)
|| ((reg & 0x00ff) == 0x55));
w83627hf_set_bank(data, reg);
outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
if (word_sized) {
outb_p((reg & 0xff) + 1,
data->addr + W83781D_ADDR_REG_OFFSET);
res =
(res << 8) + inb_p(data->addr +
W83781D_DATA_REG_OFFSET);
}
w83627hf_reset_bank(data, reg);
mutex_unlock(&data->lock);
return res;
}
static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
{
int word_sized;
mutex_lock(&data->lock);
word_sized = (((reg & 0xff00) == 0x100)
|| ((reg & 0xff00) == 0x200))
&& (((reg & 0x00ff) == 0x53)
|| ((reg & 0x00ff) == 0x55));
w83627hf_set_bank(data, reg);
outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
if (word_sized) {
outb_p(value >> 8,
data->addr + W83781D_DATA_REG_OFFSET);
outb_p((reg & 0xff) + 1,
data->addr + W83781D_ADDR_REG_OFFSET);
}
outb_p(value & 0xff,
data->addr + W83781D_DATA_REG_OFFSET);
w83627hf_reset_bank(data, reg);
mutex_unlock(&data->lock);
return 0;
}
static void w83627hf_update_fan_div(struct w83627hf_data *data)
{
int reg;
reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
data->fan_div[0] = (reg >> 4) & 0x03;
data->fan_div[1] = (reg >> 6) & 0x03;
if (data->type != w83697hf) {
data->fan_div[2] = (w83627hf_read_value(data,
W83781D_REG_PIN) >> 6) & 0x03;
}
reg = w83627hf_read_value(data, W83781D_REG_VBAT);
data->fan_div[0] |= (reg >> 3) & 0x04;
data->fan_div[1] |= (reg >> 4) & 0x04;
if (data->type != w83697hf)
data->fan_div[2] |= (reg >> 5) & 0x04;
}
static struct w83627hf_data *w83627hf_update_device(struct device *dev)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
int i, num_temps = (data->type == w83697hf) ? 2 : 3;
int num_pwms = (data->type == w83697hf) ? 2 : 3;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
for (i = 0; i <= 8; i++) {
/* skip missing sensors */
if (((data->type == w83697hf) && (i == 1)) ||
((data->type != w83627hf && data->type != w83697hf)
&& (i == 5 || i == 6)))
continue;
data->in[i] =
w83627hf_read_value(data, W83781D_REG_IN(i));
data->in_min[i] =
w83627hf_read_value(data,
W83781D_REG_IN_MIN(i));
data->in_max[i] =
w83627hf_read_value(data,
W83781D_REG_IN_MAX(i));
}
for (i = 0; i <= 2; i++) {
data->fan[i] =
w83627hf_read_value(data, W83627HF_REG_FAN(i));
data->fan_min[i] =
w83627hf_read_value(data,
W83627HF_REG_FAN_MIN(i));
}
for (i = 0; i <= 2; i++) {
u8 tmp = w83627hf_read_value(data,
W836X7HF_REG_PWM(data->type, i));
/* bits 0-3 are reserved in 627THF */
if (data->type == w83627thf)
tmp &= 0xf0;
data->pwm[i] = tmp;
if (i == 1 &&
(data->type == w83627hf || data->type == w83697hf))
break;
}
if (data->type == w83627hf) {
u8 tmp = w83627hf_read_value(data,
W83627HF_REG_PWM_FREQ);
data->pwm_freq[0] = tmp & 0x07;
data->pwm_freq[1] = (tmp >> 4) & 0x07;
} else if (data->type != w83627thf) {
for (i = 1; i <= 3; i++) {
data->pwm_freq[i - 1] =
w83627hf_read_value(data,
W83637HF_REG_PWM_FREQ[i - 1]);
if (i == 2 && (data->type == w83697hf))
break;
}
}
if (data->type != w83627hf) {
for (i = 0; i < num_pwms; i++) {
u8 tmp = w83627hf_read_value(data,
W83627THF_REG_PWM_ENABLE[i]);
data->pwm_enable[i] =
((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
& 0x03) + 1;
}
}
for (i = 0; i < num_temps; i++) {
data->temp[i] = w83627hf_read_value(
data, w83627hf_reg_temp[i]);
data->temp_max[i] = w83627hf_read_value(
data, w83627hf_reg_temp_over[i]);
data->temp_max_hyst[i] = w83627hf_read_value(
data, w83627hf_reg_temp_hyst[i]);
}
w83627hf_update_fan_div(data);
data->alarms =
w83627hf_read_value(data, W83781D_REG_ALARM1) |
(w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
(w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
data->beep_mask = (i << 8) |
w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
#ifdef CONFIG_PM
static int w83627hf_suspend(struct device *dev)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
mutex_lock(&data->update_lock);
data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
mutex_unlock(&data->update_lock);
return 0;
}
static int w83627hf_resume(struct device *dev)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
int i, num_temps = (data->type == w83697hf) ? 2 : 3;
/* Restore limits */
mutex_lock(&data->update_lock);
for (i = 0; i <= 8; i++) {
/* skip missing sensors */
if (((data->type == w83697hf) && (i == 1)) ||
((data->type != w83627hf && data->type != w83697hf)
&& (i == 5 || i == 6)))
continue;
w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
data->in_max[i]);
w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
data->in_min[i]);
}
for (i = 0; i <= 2; i++)
w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
data->fan_min[i]);
for (i = 0; i < num_temps; i++) {
w83627hf_write_value(data, w83627hf_reg_temp_over[i],
data->temp_max[i]);
w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
data->temp_max_hyst[i]);
}
/* Fixup BIOS bugs */
if (data->type == w83627thf || data->type == w83637hf ||
data->type == w83687thf)
w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
data->vrm_ovt);
w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
/* Force re-reading all values */
data->valid = false;
mutex_unlock(&data->update_lock);
return 0;
}
static const struct dev_pm_ops w83627hf_dev_pm_ops = {
.suspend = w83627hf_suspend,
.resume = w83627hf_resume,
};
#define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
#else
#define W83627HF_DEV_PM_OPS NULL
#endif /* CONFIG_PM */
static int w83627thf_read_gpio5(struct platform_device *pdev)
{
struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
int res = 0xff, sel;
if (superio_enter(sio_data)) {
/*
* Some other driver reserved the address space for itself.
* We don't want to fail driver instantiation because of that,
* so display a warning and keep going.
*/
dev_warn(&pdev->dev,
"Can not read VID data: Failed to enable SuperIO access\n");
return res;
}
superio_select(sio_data, W83627HF_LD_GPIO5);
res = 0xff;
/* Make sure these GPIO pins are enabled */
if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
goto exit;
}
/*
* Make sure the pins are configured for input
* There must be at least five (VRM 9), and possibly 6 (VRM 10)
*/
sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
if ((sel & 0x1f) != 0x1f) {
dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
"function\n");
goto exit;
}
dev_info(&pdev->dev, "Reading VID from GPIO5\n");
res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
exit:
superio_exit(sio_data);
return res;
}
static int w83687thf_read_vid(struct platform_device *pdev)
{
struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
int res = 0xff;
if (superio_enter(sio_data)) {
/*
* Some other driver reserved the address space for itself.
* We don't want to fail driver instantiation because of that,
* so display a warning and keep going.
*/
dev_warn(&pdev->dev,
"Can not read VID data: Failed to enable SuperIO access\n");
return res;
}
superio_select(sio_data, W83627HF_LD_HWM);
/* Make sure these GPIO pins are enabled */
if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
goto exit;
}
/* Make sure the pins are configured for input */
if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
dev_dbg(&pdev->dev, "VID configured as output, "
"no VID function\n");
goto exit;
}
res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
exit:
superio_exit(sio_data);
return res;
}
static void w83627hf_init_device(struct platform_device *pdev)
{
struct w83627hf_data *data = platform_get_drvdata(pdev);
int i;
enum chips type = data->type;
u8 tmp;
/* Minimize conflicts with other winbond i2c-only clients... */
/* disable i2c subclients... how to disable main i2c client?? */
/* force i2c address to relatively uncommon address */
if (type == w83627hf) {
w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
}
/* Read VID only once */
if (type == w83627hf || type == w83637hf) {
int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
} else if (type == w83627thf) {
data->vid = w83627thf_read_gpio5(pdev);
} else if (type == w83687thf) {
data->vid = w83687thf_read_vid(pdev);
}
/* Read VRM & OVT Config only once */
if (type == w83627thf || type == w83637hf || type == w83687thf) {
data->vrm_ovt =
w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
}
tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
for (i = 1; i <= 3; i++) {
if (!(tmp & BIT_SCFG1[i - 1])) {
data->sens[i - 1] = 4;
} else {
if (w83627hf_read_value
(data,
W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
data->sens[i - 1] = 1;
else
data->sens[i - 1] = 2;
}
if ((type == w83697hf) && (i == 2))
break;
}
if(init) {
/* Enable temp2 */
tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
if (tmp & 0x01) {
dev_warn(&pdev->dev, "Enabling temp2, readings "
"might not make sense\n");
w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
tmp & 0xfe);
}
/* Enable temp3 */
if (type != w83697hf) {
tmp = w83627hf_read_value(data,
W83627HF_REG_TEMP3_CONFIG);
if (tmp & 0x01) {
dev_warn(&pdev->dev, "Enabling temp3, "
"readings might not make sense\n");
w83627hf_write_value(data,
W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
}
}
}
/* Start monitoring */
w83627hf_write_value(data, W83781D_REG_CONFIG,
(w83627hf_read_value(data,
W83781D_REG_CONFIG) & 0xf7)
| 0x01);
/* Enable VBAT monitoring if needed */
tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
if (!(tmp & 0x01))
w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
}
/* use a different set of functions for in0 */
static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
{
long in0;
if ((data->vrm_ovt & 0x01) &&
(w83627thf == data->type || w83637hf == data->type
|| w83687thf == data->type))
/* use VRM9 calculation */
in0 = (long)((reg * 488 + 70000 + 50) / 100);
else
/* use VRM8 (standard) calculation */
in0 = (long)IN_FROM_REG(reg);
return sprintf(buf,"%ld\n", in0);
}
static ssize_t in0_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
return show_in_0(data, buf, data->in[0]);
}
static DEVICE_ATTR_RO(in0_input);
static ssize_t in0_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
return show_in_0(data, buf, data->in_min[0]);
}
static ssize_t in0_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if ((data->vrm_ovt & 0x01) &&
(w83627thf == data->type || w83637hf == data->type
|| w83687thf == data->type))
/* use VRM9 calculation */
data->in_min[0] =
clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
else
/* use VRM8 (standard) calculation */
data->in_min[0] = IN_TO_REG(val);
w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(in0_min);
static ssize_t in0_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
return show_in_0(data, buf, data->in_max[0]);
}
static ssize_t in0_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if ((data->vrm_ovt & 0x01) &&
(w83627thf == data->type || w83637hf == data->type
|| w83687thf == data->type))
/* use VRM9 calculation */
data->in_max[0] =
clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
else
/* use VRM8 (standard) calculation */
data->in_max[0] = IN_TO_REG(val);
w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(in0_max);
static ssize_t
alarm_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 9);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 10);
static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 16);
static SENSOR_DEVICE_ATTR_RO(in8_alarm, alarm, 17);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 13);
static ssize_t
beep_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
}
static ssize_t
beep_store(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
u8 reg;
unsigned long bit;
int err;
err = kstrtoul(buf, 10, &bit);
if (err)
return err;
if (bit & ~1)
return -EINVAL;
mutex_lock(&data->update_lock);
if (bit)
data->beep_mask |= (1 << bitnr);
else
data->beep_mask &= ~(1 << bitnr);
if (bitnr < 8) {
reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
if (bit)
reg |= (1 << bitnr);
else
reg &= ~(1 << bitnr);
w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
} else if (bitnr < 16) {
reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
if (bit)
reg |= (1 << (bitnr - 8));
else
reg &= ~(1 << (bitnr - 8));
w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
} else {
reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
if (bit)
reg |= (1 << (bitnr - 16));
else
reg &= ~(1 << (bitnr - 16));
w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(in0_beep, beep, 0);
static SENSOR_DEVICE_ATTR_RW(in1_beep, beep, 1);
static SENSOR_DEVICE_ATTR_RW(in2_beep, beep, 2);
static SENSOR_DEVICE_ATTR_RW(in3_beep, beep, 3);
static SENSOR_DEVICE_ATTR_RW(in4_beep, beep, 8);
static SENSOR_DEVICE_ATTR_RW(in5_beep, beep, 9);
static SENSOR_DEVICE_ATTR_RW(in6_beep, beep, 10);
static SENSOR_DEVICE_ATTR_RW(in7_beep, beep, 16);
static SENSOR_DEVICE_ATTR_RW(in8_beep, beep, 17);
static SENSOR_DEVICE_ATTR_RW(fan1_beep, beep, 6);
static SENSOR_DEVICE_ATTR_RW(fan2_beep, beep, 7);
static SENSOR_DEVICE_ATTR_RW(fan3_beep, beep, 11);
static SENSOR_DEVICE_ATTR_RW(temp1_beep, beep, 4);
static SENSOR_DEVICE_ATTR_RW(temp2_beep, beep, 5);
static SENSOR_DEVICE_ATTR_RW(temp3_beep, beep, 13);
static SENSOR_DEVICE_ATTR_RW(beep_enable, beep, 15);
static ssize_t
in_input_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
}
static ssize_t
in_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
}
static ssize_t
in_min_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = IN_TO_REG(val);
w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
in_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
}
static ssize_t
in_max_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = IN_TO_REG(val);
w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in1_input, in_input, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in_input, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in_input, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in_input, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, in_input, 5);
static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, in_input, 6);
static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, in_input, 7);
static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
static SENSOR_DEVICE_ATTR_RO(in8_input, in_input, 8);
static SENSOR_DEVICE_ATTR_RW(in8_min, in_min, 8);
static SENSOR_DEVICE_ATTR_RW(in8_max, in_max, 8);
static ssize_t
fan_input_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
(long)DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t
fan_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
(long)DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t
fan_min_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
static ssize_t
fan_div_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n",
(long) DIV_FROM_REG(data->fan_div[nr]));
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t
fan_div_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long min;
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* Save fan_min */
min = FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr]));
data->fan_div[nr] = DIV_TO_REG(val);
reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
& (nr==0 ? 0xcf : 0x3f))
| ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
& ~(1 << (5 + nr)))
| ((data->fan_div[nr] & 0x04) << (3 + nr));
w83627hf_write_value(data, W83781D_REG_VBAT, reg);
/* Restore fan_min */
data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static SENSOR_DEVICE_ATTR_RW(fan3_div, fan_div, 2);
static ssize_t
temp_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
u16 tmp = data->temp[nr];
return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
: (long) TEMP_FROM_REG(tmp));
}
static ssize_t
temp_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
u16 tmp = data->temp_max[nr];
return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
: (long) TEMP_FROM_REG(tmp));
}
static ssize_t
temp_max_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
u16 tmp;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
mutex_lock(&data->update_lock);
data->temp_max[nr] = tmp;
w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
temp_max_hyst_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
u16 tmp = data->temp_max_hyst[nr];
return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
: (long) TEMP_FROM_REG(tmp));
}
static ssize_t
temp_max_hyst_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
u16 tmp;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
mutex_lock(&data->update_lock);
data->temp_max_hyst[nr] = tmp;
w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp_max_hyst, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max_hyst, temp_max_hyst, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max_hyst, temp_max_hyst, 2);
static ssize_t
temp_type_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", (long) data->sens[nr]);
}
static ssize_t
temp_type_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long val;
u32 tmp;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (val) {
case 1: /* PII/Celeron diode */
tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
w83627hf_write_value(data, W83781D_REG_SCFG1,
tmp | BIT_SCFG1[nr]);
tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
w83627hf_write_value(data, W83781D_REG_SCFG2,
tmp | BIT_SCFG2[nr]);
data->sens[nr] = val;
break;
case 2: /* 3904 */
tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
w83627hf_write_value(data, W83781D_REG_SCFG1,
tmp | BIT_SCFG1[nr]);
tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
w83627hf_write_value(data, W83781D_REG_SCFG2,
tmp & ~BIT_SCFG2[nr]);
data->sens[nr] = val;
break;
case W83781D_DEFAULT_BETA:
dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
"instead\n", W83781D_DEFAULT_BETA);
fallthrough;
case 4: /* thermistor */
tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
w83627hf_write_value(data, W83781D_REG_SCFG1,
tmp & ~BIT_SCFG1[nr]);
data->sens[nr] = val;
break;
default:
dev_err(dev,
"Invalid sensor type %ld; must be 1, 2, or 4\n",
(long) val);
break;
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_type, temp_type, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_type, temp_type, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_type, temp_type, 2);
static ssize_t
alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", (long) data->alarms);
}
static DEVICE_ATTR_RO(alarms);
#define VIN_UNIT_ATTRS(_X_) \
&sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
&sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
&sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
&sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
&sensor_dev_attr_in##_X_##_beep.dev_attr.attr
#define FAN_UNIT_ATTRS(_X_) \
&sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
&sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
&sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
&sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
&sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
#define TEMP_UNIT_ATTRS(_X_) \
&sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
&sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
&sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
&sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
&sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
&sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
static ssize_t
beep_mask_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n",
(long)BEEP_MASK_FROM_REG(data->beep_mask));
}
static ssize_t
beep_mask_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* preserve beep enable */
data->beep_mask = (data->beep_mask & 0x8000)
| BEEP_MASK_TO_REG(val);
w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
data->beep_mask & 0xff);
w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
((data->beep_mask) >> 16) & 0xff);
w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
(data->beep_mask >> 8) & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(beep_mask);
static ssize_t
pwm_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
}
static ssize_t
pwm_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (data->type == w83627thf) {
/* bits 0-3 are reserved in 627THF */
data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
w83627hf_write_value(data,
W836X7HF_REG_PWM(data->type, nr),
data->pwm[nr] |
(w83627hf_read_value(data,
W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
} else {
data->pwm[nr] = PWM_TO_REG(val);
w83627hf_write_value(data,
W836X7HF_REG_PWM(data->type, nr),
data->pwm[nr]);
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
static ssize_t
name_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR_RO(name);
static struct attribute *w83627hf_attributes[] = {
&dev_attr_in0_input.attr,
&dev_attr_in0_min.attr,
&dev_attr_in0_max.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in0_beep.dev_attr.attr,
VIN_UNIT_ATTRS(2),
VIN_UNIT_ATTRS(3),
VIN_UNIT_ATTRS(4),
VIN_UNIT_ATTRS(7),
VIN_UNIT_ATTRS(8),
FAN_UNIT_ATTRS(1),
FAN_UNIT_ATTRS(2),
TEMP_UNIT_ATTRS(1),
TEMP_UNIT_ATTRS(2),
&dev_attr_alarms.attr,
&sensor_dev_attr_beep_enable.dev_attr.attr,
&dev_attr_beep_mask.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&dev_attr_name.attr,
NULL
};
static const struct attribute_group w83627hf_group = {
.attrs = w83627hf_attributes,
};
static ssize_t
pwm_freq_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
if (data->type == w83627hf)
return sprintf(buf, "%ld\n",
pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
else
return sprintf(buf, "%ld\n",
pwm_freq_from_reg(data->pwm_freq[nr]));
}
static ssize_t
pwm_freq_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
static const u8 mask[]={0xF8, 0x8F};
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (data->type == w83627hf) {
data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
(data->pwm_freq[nr] << (nr*4)) |
(w83627hf_read_value(data,
W83627HF_REG_PWM_FREQ) & mask[nr]));
} else {
data->pwm_freq[nr] = pwm_freq_to_reg(val);
w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
data->pwm_freq[nr]);
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_freq, pwm_freq, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_freq, pwm_freq, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_freq, pwm_freq, 2);
static ssize_t
cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t
vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%ld\n", (long) data->vrm);
}
static ssize_t
vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
static ssize_t
pwm_enable_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = w83627hf_update_device(dev);
return sprintf(buf, "%d\n", data->pwm_enable[nr]);
}
static ssize_t
pwm_enable_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(devattr)->index;
struct w83627hf_data *data = dev_get_drvdata(dev);
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (!val || val > 3) /* modes 1, 2 and 3 are supported */
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm_enable[nr] = val;
reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
static struct attribute *w83627hf_attributes_opt[] = {
VIN_UNIT_ATTRS(1),
VIN_UNIT_ATTRS(5),
VIN_UNIT_ATTRS(6),
FAN_UNIT_ATTRS(3),
TEMP_UNIT_ATTRS(3),
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
NULL
};
static const struct attribute_group w83627hf_group_opt = {
.attrs = w83627hf_attributes_opt,
};
static int w83627hf_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct w83627hf_sio_data *sio_data = dev_get_platdata(dev);
struct w83627hf_data *data;
struct resource *res;
int err, i;
static const char *names[] = {
"w83627hf",
"w83627thf",
"w83697hf",
"w83637hf",
"w83687thf",
};
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
(unsigned long)res->start,
(unsigned long)(res->start + WINB_REGION_SIZE - 1));
return -EBUSY;
}
data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->addr = res->start;
data->type = sio_data->type;
data->name = names[sio_data->type];
mutex_init(&data->lock);
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
/* Initialize the chip */
w83627hf_init_device(pdev);
/* A few vars need to be filled upon startup */
for (i = 0; i <= 2; i++)
data->fan_min[i] = w83627hf_read_value(
data, W83627HF_REG_FAN_MIN(i));
w83627hf_update_fan_div(data);
/* Register common device attributes */
err = sysfs_create_group(&dev->kobj, &w83627hf_group);
if (err)
return err;
/* Register chip-specific device attributes */
if (data->type == w83627hf || data->type == w83697hf)
if ((err = device_create_file(dev,
&sensor_dev_attr_in5_input.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in5_min.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in5_max.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in5_alarm.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in5_beep.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in6_input.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in6_min.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in6_max.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in6_alarm.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in6_beep.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_pwm1_freq.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_pwm2_freq.dev_attr)))
goto error;
if (data->type != w83697hf)
if ((err = device_create_file(dev,
&sensor_dev_attr_in1_input.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in1_min.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in1_max.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in1_alarm.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_in1_beep.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_fan3_input.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_fan3_min.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_fan3_div.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_fan3_alarm.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_fan3_beep.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_temp3_input.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_temp3_max.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_temp3_max_hyst.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_temp3_alarm.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_temp3_beep.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_temp3_type.dev_attr)))
goto error;
if (data->type != w83697hf && data->vid != 0xff) {
/* Convert VID to voltage based on VRM */
data->vrm = vid_which_vrm();
if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
|| (err = device_create_file(dev, &dev_attr_vrm)))
goto error;
}
if (data->type == w83627thf || data->type == w83637hf
|| data->type == w83687thf) {
err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
if (err)
goto error;
}
if (data->type == w83637hf || data->type == w83687thf)
if ((err = device_create_file(dev,
&sensor_dev_attr_pwm1_freq.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_pwm2_freq.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_pwm3_freq.dev_attr)))
goto error;
if (data->type != w83627hf)
if ((err = device_create_file(dev,
&sensor_dev_attr_pwm1_enable.dev_attr))
|| (err = device_create_file(dev,
&sensor_dev_attr_pwm2_enable.dev_attr)))
goto error;
if (data->type == w83627thf || data->type == w83637hf
|| data->type == w83687thf) {
err = device_create_file(dev,
&sensor_dev_attr_pwm3_enable.dev_attr);
if (err)
goto error;
}
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto error;
}
return 0;
error:
sysfs_remove_group(&dev->kobj, &w83627hf_group);
sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
return err;
}
static int w83627hf_remove(struct platform_device *pdev)
{
struct w83627hf_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
return 0;
}
static struct platform_driver w83627hf_driver = {
.driver = {
.name = DRVNAME,
.pm = W83627HF_DEV_PM_OPS,
},
.probe = w83627hf_probe,
.remove = w83627hf_remove,
};
static int __init w83627hf_find(int sioaddr, unsigned short *addr,
struct w83627hf_sio_data *sio_data)
{
int err;
u16 val;
static __initconst char *const names[] = {
"W83627HF",
"W83627THF",
"W83697HF",
"W83637HF",
"W83687THF",
};
sio_data->sioaddr = sioaddr;
err = superio_enter(sio_data);
if (err)
return err;
err = -ENODEV;
val = force_id ? force_id : superio_inb(sio_data, DEVID);
switch (val) {
case W627_DEVID:
sio_data->type = w83627hf;
break;
case W627THF_DEVID:
sio_data->type = w83627thf;
break;
case W697_DEVID:
sio_data->type = w83697hf;
break;
case W637_DEVID:
sio_data->type = w83637hf;
break;
case W687THF_DEVID:
sio_data->type = w83687thf;
break;
case 0xff: /* No device at all */
goto exit;
default:
pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
goto exit;
}
superio_select(sio_data, W83627HF_LD_HWM);
val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
superio_inb(sio_data, WINB_BASE_REG + 1);
*addr = val & WINB_ALIGNMENT;
if (*addr == 0) {
pr_warn("Base address not set, skipping\n");
goto exit;
}
val = superio_inb(sio_data, WINB_ACT_REG);
if (!(val & 0x01)) {
pr_warn("Enabling HWM logical device\n");
superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
}
err = 0;
pr_info(DRVNAME ": Found %s chip at %#x\n",
names[sio_data->type], *addr);
exit:
superio_exit(sio_data);
return err;
}
static int __init w83627hf_device_add(unsigned short address,
const struct w83627hf_sio_data *sio_data)
{
struct resource res = {
.start = address + WINB_REGION_OFFSET,
.end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
.name = DRVNAME,
.flags = IORESOURCE_IO,
};
int err;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit;
pdev = platform_device_alloc(DRVNAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add_data(pdev, sio_data,
sizeof(struct w83627hf_sio_data));
if (err) {
pr_err("Platform data allocation failed\n");
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static int __init sensors_w83627hf_init(void)
{
int err;
unsigned short address;
struct w83627hf_sio_data sio_data;
if (w83627hf_find(0x2e, &address, &sio_data)
&& w83627hf_find(0x4e, &address, &sio_data))
return -ENODEV;
err = platform_driver_register(&w83627hf_driver);
if (err)
goto exit;
/* Sets global pdev as a side effect */
err = w83627hf_device_add(address, &sio_data);
if (err)
goto exit_driver;
return 0;
exit_driver:
platform_driver_unregister(&w83627hf_driver);
exit:
return err;
}
static void __exit sensors_w83627hf_exit(void)
{
platform_device_unregister(pdev);
platform_driver_unregister(&w83627hf_driver);
}
MODULE_AUTHOR("Frodo Looijaard <[email protected]>, "
"Philip Edelbrock <[email protected]>, "
"and Mark Studebaker <[email protected]>");
MODULE_DESCRIPTION("W83627HF driver");
MODULE_LICENSE("GPL");
module_init(sensors_w83627hf_init);
module_exit(sensors_w83627hf_exit);
|
linux-master
|
drivers/hwmon/w83627hf.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ads7871 - driver for TI ADS7871 A/D converter
*
* Copyright (c) 2010 Paul Thomas <[email protected]>
*
* You need to have something like this in struct spi_board_info
* {
* .modalias = "ads7871",
* .max_speed_hz = 2*1000*1000,
* .chip_select = 0,
* .bus_num = 1,
* },
*/
/*From figure 18 in the datasheet*/
/*Register addresses*/
#define REG_LS_BYTE 0 /*A/D Output Data, LS Byte*/
#define REG_MS_BYTE 1 /*A/D Output Data, MS Byte*/
#define REG_PGA_VALID 2 /*PGA Valid Register*/
#define REG_AD_CONTROL 3 /*A/D Control Register*/
#define REG_GAIN_MUX 4 /*Gain/Mux Register*/
#define REG_IO_STATE 5 /*Digital I/O State Register*/
#define REG_IO_CONTROL 6 /*Digital I/O Control Register*/
#define REG_OSC_CONTROL 7 /*Rev/Oscillator Control Register*/
#define REG_SER_CONTROL 24 /*Serial Interface Control Register*/
#define REG_ID 31 /*ID Register*/
/*
* From figure 17 in the datasheet
* These bits get ORed with the address to form
* the instruction byte
*/
/*Instruction Bit masks*/
#define INST_MODE_BM (1 << 7)
#define INST_READ_BM (1 << 6)
#define INST_16BIT_BM (1 << 5)
/*From figure 18 in the datasheet*/
/*bit masks for Rev/Oscillator Control Register*/
#define MUX_CNV_BV 7
#define MUX_CNV_BM (1 << MUX_CNV_BV)
#define MUX_M3_BM (1 << 3) /*M3 selects single ended*/
#define MUX_G_BV 4 /*allows for reg = (gain << MUX_G_BV) | ...*/
/*From figure 18 in the datasheet*/
/*bit masks for Rev/Oscillator Control Register*/
#define OSC_OSCR_BM (1 << 5)
#define OSC_OSCE_BM (1 << 4)
#define OSC_REFE_BM (1 << 3)
#define OSC_BUFE_BM (1 << 2)
#define OSC_R2V_BM (1 << 1)
#define OSC_RBG_BM (1 << 0)
#include <linux/module.h>
#include <linux/init.h>
#include <linux/spi/spi.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/delay.h>
#define DEVICE_NAME "ads7871"
struct ads7871_data {
struct spi_device *spi;
};
static int ads7871_read_reg8(struct spi_device *spi, int reg)
{
int ret;
reg = reg | INST_READ_BM;
ret = spi_w8r8(spi, reg);
return ret;
}
static int ads7871_read_reg16(struct spi_device *spi, int reg)
{
int ret;
reg = reg | INST_READ_BM | INST_16BIT_BM;
ret = spi_w8r16(spi, reg);
return ret;
}
static int ads7871_write_reg8(struct spi_device *spi, int reg, u8 val)
{
u8 tmp[2] = {reg, val};
return spi_write(spi, tmp, sizeof(tmp));
}
static ssize_t voltage_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct ads7871_data *pdata = dev_get_drvdata(dev);
struct spi_device *spi = pdata->spi;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int ret, val, i = 0;
uint8_t channel, mux_cnv;
channel = attr->index;
/*
* TODO: add support for conversions
* other than single ended with a gain of 1
*/
/*MUX_M3_BM forces single ended*/
/*This is also where the gain of the PGA would be set*/
ads7871_write_reg8(spi, REG_GAIN_MUX,
(MUX_CNV_BM | MUX_M3_BM | channel));
ret = ads7871_read_reg8(spi, REG_GAIN_MUX);
mux_cnv = ((ret & MUX_CNV_BM) >> MUX_CNV_BV);
/*
* on 400MHz arm9 platform the conversion
* is already done when we do this test
*/
while ((i < 2) && mux_cnv) {
i++;
ret = ads7871_read_reg8(spi, REG_GAIN_MUX);
mux_cnv = ((ret & MUX_CNV_BM) >> MUX_CNV_BV);
msleep_interruptible(1);
}
if (mux_cnv == 0) {
val = ads7871_read_reg16(spi, REG_LS_BYTE);
/*result in volts*10000 = (val/8192)*2.5*10000*/
val = ((val >> 2) * 25000) / 8192;
return sprintf(buf, "%d\n", val);
} else {
return -1;
}
}
static SENSOR_DEVICE_ATTR_RO(in0_input, voltage, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, voltage, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, voltage, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, voltage, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, voltage, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, voltage, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, voltage, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, voltage, 7);
static struct attribute *ads7871_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(ads7871);
static int ads7871_probe(struct spi_device *spi)
{
struct device *dev = &spi->dev;
int ret;
uint8_t val;
struct ads7871_data *pdata;
struct device *hwmon_dev;
/* Configure the SPI bus */
spi->mode = (SPI_MODE_0);
spi->bits_per_word = 8;
spi_setup(spi);
ads7871_write_reg8(spi, REG_SER_CONTROL, 0);
ads7871_write_reg8(spi, REG_AD_CONTROL, 0);
val = (OSC_OSCR_BM | OSC_OSCE_BM | OSC_REFE_BM | OSC_BUFE_BM);
ads7871_write_reg8(spi, REG_OSC_CONTROL, val);
ret = ads7871_read_reg8(spi, REG_OSC_CONTROL);
dev_dbg(dev, "REG_OSC_CONTROL write:%x, read:%x\n", val, ret);
/*
* because there is no other error checking on an SPI bus
* we need to make sure we really have a chip
*/
if (val != ret)
return -ENODEV;
pdata = devm_kzalloc(dev, sizeof(struct ads7871_data), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
pdata->spi = spi;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, spi->modalias,
pdata,
ads7871_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct spi_driver ads7871_driver = {
.driver = {
.name = DEVICE_NAME,
},
.probe = ads7871_probe,
};
module_spi_driver(ads7871_driver);
MODULE_AUTHOR("Paul Thomas <[email protected]>");
MODULE_DESCRIPTION("TI ADS7871 A/D driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ads7871.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* System Control and Power Interface(SCPI) based hwmon sensor driver
*
* Copyright (C) 2015 ARM Ltd.
* Punit Agrawal <[email protected]>
*/
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/scpi_protocol.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/thermal.h>
struct sensor_data {
unsigned int scale;
struct scpi_sensor_info info;
struct device_attribute dev_attr_input;
struct device_attribute dev_attr_label;
char input[20];
char label[20];
};
struct scpi_thermal_zone {
int sensor_id;
struct scpi_sensors *scpi_sensors;
};
struct scpi_sensors {
struct scpi_ops *scpi_ops;
struct sensor_data *data;
struct list_head thermal_zones;
struct attribute **attrs;
struct attribute_group group;
const struct attribute_group *groups[2];
};
static const u32 gxbb_scpi_scale[] = {
[TEMPERATURE] = 1, /* (celsius) */
[VOLTAGE] = 1000, /* (millivolts) */
[CURRENT] = 1000, /* (milliamperes) */
[POWER] = 1000000, /* (microwatts) */
[ENERGY] = 1000000, /* (microjoules) */
};
static const u32 scpi_scale[] = {
[TEMPERATURE] = 1000, /* (millicelsius) */
[VOLTAGE] = 1000, /* (millivolts) */
[CURRENT] = 1000, /* (milliamperes) */
[POWER] = 1000000, /* (microwatts) */
[ENERGY] = 1000000, /* (microjoules) */
};
static void scpi_scale_reading(u64 *value, struct sensor_data *sensor)
{
if (scpi_scale[sensor->info.class] != sensor->scale) {
*value *= scpi_scale[sensor->info.class];
do_div(*value, sensor->scale);
}
}
static int scpi_read_temp(struct thermal_zone_device *tz, int *temp)
{
struct scpi_thermal_zone *zone = thermal_zone_device_priv(tz);
struct scpi_sensors *scpi_sensors = zone->scpi_sensors;
struct scpi_ops *scpi_ops = scpi_sensors->scpi_ops;
struct sensor_data *sensor = &scpi_sensors->data[zone->sensor_id];
u64 value;
int ret;
ret = scpi_ops->sensor_get_value(sensor->info.sensor_id, &value);
if (ret)
return ret;
scpi_scale_reading(&value, sensor);
*temp = value;
return 0;
}
/* hwmon callback functions */
static ssize_t
scpi_show_sensor(struct device *dev, struct device_attribute *attr, char *buf)
{
struct scpi_sensors *scpi_sensors = dev_get_drvdata(dev);
struct scpi_ops *scpi_ops = scpi_sensors->scpi_ops;
struct sensor_data *sensor;
u64 value;
int ret;
sensor = container_of(attr, struct sensor_data, dev_attr_input);
ret = scpi_ops->sensor_get_value(sensor->info.sensor_id, &value);
if (ret)
return ret;
scpi_scale_reading(&value, sensor);
/*
* Temperature sensor values are treated as signed values based on
* observation even though that is not explicitly specified, and
* because an unsigned u64 temperature does not really make practical
* sense especially when the temperature is below zero degrees Celsius.
*/
if (sensor->info.class == TEMPERATURE)
return sprintf(buf, "%lld\n", (s64)value);
return sprintf(buf, "%llu\n", value);
}
static ssize_t
scpi_show_label(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_data *sensor;
sensor = container_of(attr, struct sensor_data, dev_attr_label);
return sprintf(buf, "%s\n", sensor->info.name);
}
static const struct thermal_zone_device_ops scpi_sensor_ops = {
.get_temp = scpi_read_temp,
};
static const struct of_device_id scpi_of_match[] = {
{.compatible = "arm,scpi-sensors", .data = &scpi_scale},
{.compatible = "amlogic,meson-gxbb-scpi-sensors", .data = &gxbb_scpi_scale},
{},
};
MODULE_DEVICE_TABLE(of, scpi_of_match);
static int scpi_hwmon_probe(struct platform_device *pdev)
{
u16 nr_sensors, i;
const u32 *scale;
int num_temp = 0, num_volt = 0, num_current = 0, num_power = 0;
int num_energy = 0;
struct scpi_ops *scpi_ops;
struct device *hwdev, *dev = &pdev->dev;
struct scpi_sensors *scpi_sensors;
int idx, ret;
scpi_ops = get_scpi_ops();
if (!scpi_ops)
return -EPROBE_DEFER;
ret = scpi_ops->sensor_get_capability(&nr_sensors);
if (ret)
return ret;
if (!nr_sensors)
return -ENODEV;
scpi_sensors = devm_kzalloc(dev, sizeof(*scpi_sensors), GFP_KERNEL);
if (!scpi_sensors)
return -ENOMEM;
scpi_sensors->data = devm_kcalloc(dev, nr_sensors,
sizeof(*scpi_sensors->data), GFP_KERNEL);
if (!scpi_sensors->data)
return -ENOMEM;
scpi_sensors->attrs = devm_kcalloc(dev, (nr_sensors * 2) + 1,
sizeof(*scpi_sensors->attrs), GFP_KERNEL);
if (!scpi_sensors->attrs)
return -ENOMEM;
scpi_sensors->scpi_ops = scpi_ops;
scale = of_device_get_match_data(&pdev->dev);
if (!scale) {
dev_err(&pdev->dev, "Unable to initialize scpi-hwmon data\n");
return -ENODEV;
}
for (i = 0, idx = 0; i < nr_sensors; i++) {
struct sensor_data *sensor = &scpi_sensors->data[idx];
ret = scpi_ops->sensor_get_info(i, &sensor->info);
if (ret)
return ret;
switch (sensor->info.class) {
case TEMPERATURE:
snprintf(sensor->input, sizeof(sensor->input),
"temp%d_input", num_temp + 1);
snprintf(sensor->label, sizeof(sensor->input),
"temp%d_label", num_temp + 1);
num_temp++;
break;
case VOLTAGE:
snprintf(sensor->input, sizeof(sensor->input),
"in%d_input", num_volt);
snprintf(sensor->label, sizeof(sensor->input),
"in%d_label", num_volt);
num_volt++;
break;
case CURRENT:
snprintf(sensor->input, sizeof(sensor->input),
"curr%d_input", num_current + 1);
snprintf(sensor->label, sizeof(sensor->input),
"curr%d_label", num_current + 1);
num_current++;
break;
case POWER:
snprintf(sensor->input, sizeof(sensor->input),
"power%d_input", num_power + 1);
snprintf(sensor->label, sizeof(sensor->input),
"power%d_label", num_power + 1);
num_power++;
break;
case ENERGY:
snprintf(sensor->input, sizeof(sensor->input),
"energy%d_input", num_energy + 1);
snprintf(sensor->label, sizeof(sensor->input),
"energy%d_label", num_energy + 1);
num_energy++;
break;
default:
continue;
}
sensor->scale = scale[sensor->info.class];
sensor->dev_attr_input.attr.mode = 0444;
sensor->dev_attr_input.show = scpi_show_sensor;
sensor->dev_attr_input.attr.name = sensor->input;
sensor->dev_attr_label.attr.mode = 0444;
sensor->dev_attr_label.show = scpi_show_label;
sensor->dev_attr_label.attr.name = sensor->label;
scpi_sensors->attrs[idx << 1] = &sensor->dev_attr_input.attr;
scpi_sensors->attrs[(idx << 1) + 1] = &sensor->dev_attr_label.attr;
sysfs_attr_init(scpi_sensors->attrs[idx << 1]);
sysfs_attr_init(scpi_sensors->attrs[(idx << 1) + 1]);
idx++;
}
scpi_sensors->group.attrs = scpi_sensors->attrs;
scpi_sensors->groups[0] = &scpi_sensors->group;
platform_set_drvdata(pdev, scpi_sensors);
hwdev = devm_hwmon_device_register_with_groups(dev,
"scpi_sensors", scpi_sensors, scpi_sensors->groups);
if (IS_ERR(hwdev))
return PTR_ERR(hwdev);
/*
* Register the temperature sensors with the thermal framework
* to allow their usage in setting up the thermal zones from
* device tree.
*
* NOTE: Not all temperature sensors maybe used for thermal
* control
*/
INIT_LIST_HEAD(&scpi_sensors->thermal_zones);
for (i = 0; i < nr_sensors; i++) {
struct sensor_data *sensor = &scpi_sensors->data[i];
struct thermal_zone_device *z;
struct scpi_thermal_zone *zone;
if (sensor->info.class != TEMPERATURE)
continue;
zone = devm_kzalloc(dev, sizeof(*zone), GFP_KERNEL);
if (!zone)
return -ENOMEM;
zone->sensor_id = i;
zone->scpi_sensors = scpi_sensors;
z = devm_thermal_of_zone_register(dev,
sensor->info.sensor_id,
zone,
&scpi_sensor_ops);
/*
* The call to thermal_zone_of_sensor_register returns
* an error for sensors that are not associated with
* any thermal zones or if the thermal subsystem is
* not configured.
*/
if (IS_ERR(z))
devm_kfree(dev, zone);
}
return 0;
}
static struct platform_driver scpi_hwmon_platdrv = {
.driver = {
.name = "scpi-hwmon",
.of_match_table = scpi_of_match,
},
.probe = scpi_hwmon_probe,
};
module_platform_driver(scpi_hwmon_platdrv);
MODULE_AUTHOR("Punit Agrawal <[email protected]>");
MODULE_DESCRIPTION("ARM SCPI HWMON interface driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/scpi-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for PMBus devices
*
* Copyright (c) 2010, 2011 Ericsson AB.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/i2c.h>
#include <linux/pmbus.h>
#include "pmbus.h"
struct pmbus_device_info {
int pages;
u32 flags;
};
static const struct i2c_device_id pmbus_id[];
/*
* Find sensor groups and status registers on each page.
*/
static void pmbus_find_sensor_groups(struct i2c_client *client,
struct pmbus_driver_info *info)
{
int page;
/* Sensors detected on page 0 only */
if (pmbus_check_word_register(client, 0, PMBUS_READ_VIN))
info->func[0] |= PMBUS_HAVE_VIN;
if (pmbus_check_word_register(client, 0, PMBUS_READ_VCAP))
info->func[0] |= PMBUS_HAVE_VCAP;
if (pmbus_check_word_register(client, 0, PMBUS_READ_IIN))
info->func[0] |= PMBUS_HAVE_IIN;
if (pmbus_check_word_register(client, 0, PMBUS_READ_PIN))
info->func[0] |= PMBUS_HAVE_PIN;
if (info->func[0]
&& pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
info->func[0] |= PMBUS_HAVE_STATUS_INPUT;
if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
info->func[0] |= PMBUS_HAVE_FAN12;
if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
info->func[0] |= PMBUS_HAVE_STATUS_FAN12;
}
if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
info->func[0] |= PMBUS_HAVE_FAN34;
if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
info->func[0] |= PMBUS_HAVE_STATUS_FAN34;
}
if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
info->func[0] |= PMBUS_HAVE_TEMP;
if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
info->func[0] |= PMBUS_HAVE_TEMP2;
if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
info->func[0] |= PMBUS_HAVE_TEMP3;
if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
| PMBUS_HAVE_TEMP3)
&& pmbus_check_byte_register(client, 0,
PMBUS_STATUS_TEMPERATURE))
info->func[0] |= PMBUS_HAVE_STATUS_TEMP;
/* Sensors detected on all pages */
for (page = 0; page < info->pages; page++) {
if (pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) {
info->func[page] |= PMBUS_HAVE_VOUT;
if (pmbus_check_byte_register(client, page,
PMBUS_STATUS_VOUT))
info->func[page] |= PMBUS_HAVE_STATUS_VOUT;
}
if (pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) {
info->func[page] |= PMBUS_HAVE_IOUT;
if (pmbus_check_byte_register(client, 0,
PMBUS_STATUS_IOUT))
info->func[page] |= PMBUS_HAVE_STATUS_IOUT;
}
if (pmbus_check_word_register(client, page, PMBUS_READ_POUT))
info->func[page] |= PMBUS_HAVE_POUT;
}
}
/*
* Identify chip parameters.
*/
static int pmbus_identify(struct i2c_client *client,
struct pmbus_driver_info *info)
{
int ret = 0;
if (!info->pages) {
/*
* Check if the PAGE command is supported. If it is,
* keep setting the page number until it fails or until the
* maximum number of pages has been reached. Assume that
* this is the number of pages supported by the chip.
*/
if (pmbus_check_byte_register(client, 0, PMBUS_PAGE)) {
int page;
for (page = 1; page < PMBUS_PAGES; page++) {
if (pmbus_set_page(client, page, 0xff) < 0)
break;
}
pmbus_set_page(client, 0, 0xff);
info->pages = page;
} else {
info->pages = 1;
}
pmbus_clear_faults(client);
}
if (pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) {
int vout_mode, i;
vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
if (vout_mode >= 0 && vout_mode != 0xff) {
switch (vout_mode >> 5) {
case 0:
break;
case 1:
info->format[PSC_VOLTAGE_OUT] = vid;
for (i = 0; i < info->pages; i++)
info->vrm_version[i] = vr11;
break;
case 2:
info->format[PSC_VOLTAGE_OUT] = direct;
break;
default:
ret = -ENODEV;
goto abort;
}
}
}
/*
* We should check if the COEFFICIENTS register is supported.
* If it is, and the chip is configured for direct mode, we can read
* the coefficients from the chip, one set per group of sensor
* registers.
*
* To do this, we will need access to a chip which actually supports the
* COEFFICIENTS command, since the command is too complex to implement
* without testing it. Until then, abort if a chip configured for direct
* mode was detected.
*/
if (info->format[PSC_VOLTAGE_OUT] == direct) {
ret = -ENODEV;
goto abort;
}
/* Try to find sensor groups */
pmbus_find_sensor_groups(client, info);
abort:
return ret;
}
static int pmbus_probe(struct i2c_client *client)
{
struct pmbus_driver_info *info;
struct pmbus_platform_data *pdata = NULL;
struct device *dev = &client->dev;
struct pmbus_device_info *device_info;
info = devm_kzalloc(dev, sizeof(struct pmbus_driver_info), GFP_KERNEL);
if (!info)
return -ENOMEM;
device_info = (struct pmbus_device_info *)i2c_match_id(pmbus_id, client)->driver_data;
if (device_info->flags) {
pdata = devm_kzalloc(dev, sizeof(struct pmbus_platform_data),
GFP_KERNEL);
if (!pdata)
return -ENOMEM;
pdata->flags = device_info->flags;
}
info->pages = device_info->pages;
info->identify = pmbus_identify;
dev->platform_data = pdata;
return pmbus_do_probe(client, info);
}
static const struct pmbus_device_info pmbus_info_one = {
.pages = 1,
.flags = 0
};
static const struct pmbus_device_info pmbus_info_zero = {
.pages = 0,
.flags = 0
};
static const struct pmbus_device_info pmbus_info_one_skip = {
.pages = 1,
.flags = PMBUS_SKIP_STATUS_CHECK
};
static const struct pmbus_device_info pmbus_info_one_status = {
.pages = 1,
.flags = PMBUS_READ_STATUS_AFTER_FAILED_CHECK
};
/*
* Use driver_data to set the number of pages supported by the chip.
*/
static const struct i2c_device_id pmbus_id[] = {
{"adp4000", (kernel_ulong_t)&pmbus_info_one},
{"bmr310", (kernel_ulong_t)&pmbus_info_one_status},
{"bmr453", (kernel_ulong_t)&pmbus_info_one},
{"bmr454", (kernel_ulong_t)&pmbus_info_one},
{"bmr456", (kernel_ulong_t)&pmbus_info_one},
{"bmr457", (kernel_ulong_t)&pmbus_info_one},
{"bmr458", (kernel_ulong_t)&pmbus_info_one_status},
{"bmr480", (kernel_ulong_t)&pmbus_info_one_status},
{"bmr490", (kernel_ulong_t)&pmbus_info_one_status},
{"bmr491", (kernel_ulong_t)&pmbus_info_one_status},
{"bmr492", (kernel_ulong_t)&pmbus_info_one},
{"dps460", (kernel_ulong_t)&pmbus_info_one_skip},
{"dps650ab", (kernel_ulong_t)&pmbus_info_one_skip},
{"dps800", (kernel_ulong_t)&pmbus_info_one_skip},
{"max20796", (kernel_ulong_t)&pmbus_info_one},
{"mdt040", (kernel_ulong_t)&pmbus_info_one},
{"ncp4200", (kernel_ulong_t)&pmbus_info_one},
{"ncp4208", (kernel_ulong_t)&pmbus_info_one},
{"pdt003", (kernel_ulong_t)&pmbus_info_one},
{"pdt006", (kernel_ulong_t)&pmbus_info_one},
{"pdt012", (kernel_ulong_t)&pmbus_info_one},
{"pmbus", (kernel_ulong_t)&pmbus_info_zero},
{"sgd009", (kernel_ulong_t)&pmbus_info_one_skip},
{"tps40400", (kernel_ulong_t)&pmbus_info_one},
{"tps544b20", (kernel_ulong_t)&pmbus_info_one},
{"tps544b25", (kernel_ulong_t)&pmbus_info_one},
{"tps544c20", (kernel_ulong_t)&pmbus_info_one},
{"tps544c25", (kernel_ulong_t)&pmbus_info_one},
{"udt020", (kernel_ulong_t)&pmbus_info_one},
{}
};
MODULE_DEVICE_TABLE(i2c, pmbus_id);
/* This is the driver that will be inserted */
static struct i2c_driver pmbus_driver = {
.driver = {
.name = "pmbus",
},
.probe = pmbus_probe,
.id_table = pmbus_id,
};
module_i2c_driver(pmbus_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("Generic PMBus driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/pmbus.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for Infineon IR36021
*
* Copyright (c) 2021 Allied Telesis
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
static struct pmbus_driver_info ir36021_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.format[PSC_TEMPERATURE] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT
| PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT
| PMBUS_HAVE_PIN | PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
| PMBUS_HAVE_STATUS_TEMP,
};
static int ir36021_probe(struct i2c_client *client)
{
u8 buf[I2C_SMBUS_BLOCK_MAX];
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA
| I2C_FUNC_SMBUS_READ_WORD_DATA
| I2C_FUNC_SMBUS_READ_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_i2c_block_data(client, PMBUS_MFR_MODEL, 2, buf);
if (ret < 0) {
dev_err(&client->dev, "Failed to read PMBUS_MFR_MODEL\n");
return ret;
}
if (ret != 2 || buf[0] != 0x01 || buf[1] != 0x2d) {
dev_err(&client->dev, "MFR_MODEL unrecognised\n");
return -ENODEV;
}
return pmbus_do_probe(client, &ir36021_info);
}
static const struct i2c_device_id ir36021_id[] = {
{ "ir36021", 0 },
{},
};
MODULE_DEVICE_TABLE(i2c, ir36021_id);
static const struct of_device_id __maybe_unused ir36021_of_id[] = {
{ .compatible = "infineon,ir36021" },
{},
};
MODULE_DEVICE_TABLE(of, ir36021_of_id);
static struct i2c_driver ir36021_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "ir36021",
.of_match_table = of_match_ptr(ir36021_of_id),
},
.probe = ir36021_probe,
.id_table = ir36021_id,
};
module_i2c_driver(ir36021_driver);
MODULE_AUTHOR("Chris Packham <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Infineon IR36021");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/ir36021.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2019 Inspur Corp.
*/
#include <linux/debugfs.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pmbus.h>
#include <linux/hwmon-sysfs.h>
#include "pmbus.h"
#define IPSPS_REG_VENDOR_ID 0x99
#define IPSPS_REG_MODEL 0x9A
#define IPSPS_REG_FW_VERSION 0x9B
#define IPSPS_REG_PN 0x9C
#define IPSPS_REG_SN 0x9E
#define IPSPS_REG_HW_VERSION 0xB0
#define IPSPS_REG_MODE 0xFC
#define MODE_ACTIVE 0x55
#define MODE_STANDBY 0x0E
#define MODE_REDUNDANCY 0x00
#define MODE_ACTIVE_STRING "active"
#define MODE_STANDBY_STRING "standby"
#define MODE_REDUNDANCY_STRING "redundancy"
enum ipsps_index {
vendor,
model,
fw_version,
part_number,
serial_number,
hw_version,
mode,
num_regs,
};
static const u8 ipsps_regs[num_regs] = {
[vendor] = IPSPS_REG_VENDOR_ID,
[model] = IPSPS_REG_MODEL,
[fw_version] = IPSPS_REG_FW_VERSION,
[part_number] = IPSPS_REG_PN,
[serial_number] = IPSPS_REG_SN,
[hw_version] = IPSPS_REG_HW_VERSION,
[mode] = IPSPS_REG_MODE,
};
static ssize_t ipsps_string_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
u8 reg;
int rc;
char *p;
char data[I2C_SMBUS_BLOCK_MAX + 1];
struct i2c_client *client = to_i2c_client(dev->parent);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
reg = ipsps_regs[attr->index];
rc = i2c_smbus_read_block_data(client, reg, data);
if (rc < 0)
return rc;
/* filled with printable characters, ending with # */
p = memscan(data, '#', rc);
*p = '\0';
return sysfs_emit(buf, "%s\n", data);
}
static ssize_t ipsps_fw_version_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
u8 reg;
int rc;
u8 data[I2C_SMBUS_BLOCK_MAX] = { 0 };
struct i2c_client *client = to_i2c_client(dev->parent);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
reg = ipsps_regs[attr->index];
rc = i2c_smbus_read_block_data(client, reg, data);
if (rc < 0)
return rc;
if (rc != 6)
return -EPROTO;
return sysfs_emit(buf, "%u.%02u%u-%u.%02u\n",
data[1], data[2]/* < 100 */, data[3]/*< 10*/,
data[4], data[5]/* < 100 */);
}
static ssize_t ipsps_mode_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
u8 reg;
int rc;
struct i2c_client *client = to_i2c_client(dev->parent);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
reg = ipsps_regs[attr->index];
rc = i2c_smbus_read_byte_data(client, reg);
if (rc < 0)
return rc;
switch (rc) {
case MODE_ACTIVE:
return sysfs_emit(buf, "[%s] %s %s\n",
MODE_ACTIVE_STRING,
MODE_STANDBY_STRING, MODE_REDUNDANCY_STRING);
case MODE_STANDBY:
return sysfs_emit(buf, "%s [%s] %s\n",
MODE_ACTIVE_STRING,
MODE_STANDBY_STRING, MODE_REDUNDANCY_STRING);
case MODE_REDUNDANCY:
return sysfs_emit(buf, "%s %s [%s]\n",
MODE_ACTIVE_STRING,
MODE_STANDBY_STRING, MODE_REDUNDANCY_STRING);
default:
return sysfs_emit(buf, "unspecified\n");
}
}
static ssize_t ipsps_mode_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
u8 reg;
int rc;
struct i2c_client *client = to_i2c_client(dev->parent);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
reg = ipsps_regs[attr->index];
if (sysfs_streq(MODE_STANDBY_STRING, buf)) {
rc = i2c_smbus_write_byte_data(client, reg,
MODE_STANDBY);
if (rc < 0)
return rc;
return count;
} else if (sysfs_streq(MODE_ACTIVE_STRING, buf)) {
rc = i2c_smbus_write_byte_data(client, reg,
MODE_ACTIVE);
if (rc < 0)
return rc;
return count;
}
return -EINVAL;
}
static SENSOR_DEVICE_ATTR_RO(vendor, ipsps_string, vendor);
static SENSOR_DEVICE_ATTR_RO(model, ipsps_string, model);
static SENSOR_DEVICE_ATTR_RO(part_number, ipsps_string, part_number);
static SENSOR_DEVICE_ATTR_RO(serial_number, ipsps_string, serial_number);
static SENSOR_DEVICE_ATTR_RO(hw_version, ipsps_string, hw_version);
static SENSOR_DEVICE_ATTR_RO(fw_version, ipsps_fw_version, fw_version);
static SENSOR_DEVICE_ATTR_RW(mode, ipsps_mode, mode);
static struct attribute *ipsps_attrs[] = {
&sensor_dev_attr_vendor.dev_attr.attr,
&sensor_dev_attr_model.dev_attr.attr,
&sensor_dev_attr_part_number.dev_attr.attr,
&sensor_dev_attr_serial_number.dev_attr.attr,
&sensor_dev_attr_hw_version.dev_attr.attr,
&sensor_dev_attr_fw_version.dev_attr.attr,
&sensor_dev_attr_mode.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(ipsps);
static struct pmbus_driver_info ipsps_info = {
.pages = 1,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_POUT | PMBUS_HAVE_PIN |
PMBUS_HAVE_FAN12 | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 |
PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_STATUS_FAN12,
.groups = ipsps_groups,
};
static struct pmbus_platform_data ipsps_pdata = {
.flags = PMBUS_SKIP_STATUS_CHECK,
};
static int ipsps_probe(struct i2c_client *client)
{
client->dev.platform_data = &ipsps_pdata;
return pmbus_do_probe(client, &ipsps_info);
}
static const struct i2c_device_id ipsps_id[] = {
{ "ipsps1", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, ipsps_id);
#ifdef CONFIG_OF
static const struct of_device_id ipsps_of_match[] = {
{ .compatible = "inspur,ipsps1" },
{}
};
MODULE_DEVICE_TABLE(of, ipsps_of_match);
#endif
static struct i2c_driver ipsps_driver = {
.driver = {
.name = "inspur-ipsps",
.of_match_table = of_match_ptr(ipsps_of_match),
},
.probe = ipsps_probe,
.id_table = ipsps_id,
};
module_i2c_driver(ipsps_driver);
MODULE_AUTHOR("John Wang");
MODULE_DESCRIPTION("PMBus driver for Inspur Power System power supplies");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/inspur-ipsps.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for MPS MP5023 Hot-Swap Controller
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/of.h>
#include "pmbus.h"
static struct pmbus_driver_info mp5023_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_POWER] = direct,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_VOLTAGE_IN] = 32,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = 0,
.m[PSC_VOLTAGE_OUT] = 32,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 0,
.m[PSC_CURRENT_OUT] = 16,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 0,
.m[PSC_POWER] = 1,
.b[PSC_POWER] = 0,
.R[PSC_POWER] = 0,
.m[PSC_TEMPERATURE] = 2,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 0,
.func[0] =
PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_PIN |
PMBUS_HAVE_TEMP | PMBUS_HAVE_IOUT |
PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP,
};
static int mp5023_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &mp5023_info);
}
static const struct of_device_id __maybe_unused mp5023_of_match[] = {
{ .compatible = "mps,mp5023", },
{}
};
MODULE_DEVICE_TABLE(of, mp5023_of_match);
static struct i2c_driver mp5023_driver = {
.driver = {
.name = "mp5023",
.of_match_table = of_match_ptr(mp5023_of_match),
},
.probe = mp5023_probe,
};
module_i2c_driver(mp5023_driver);
MODULE_AUTHOR("Howard Chiu <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for MPS MP5023 HSC");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/mp5023.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Analog Devices ADM1275 Hot-Swap Controller
* and Digital Power Monitor
*
* Copyright (c) 2011 Ericsson AB.
* Copyright (c) 2018 Guenter Roeck
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/bitops.h>
#include <linux/bitfield.h>
#include <linux/log2.h>
#include "pmbus.h"
enum chips { adm1075, adm1272, adm1275, adm1276, adm1278, adm1293, adm1294 };
#define ADM1275_MFR_STATUS_IOUT_WARN2 BIT(0)
#define ADM1293_MFR_STATUS_VAUX_UV_WARN BIT(5)
#define ADM1293_MFR_STATUS_VAUX_OV_WARN BIT(6)
#define ADM1275_PEAK_IOUT 0xd0
#define ADM1275_PEAK_VIN 0xd1
#define ADM1275_PEAK_VOUT 0xd2
#define ADM1275_PMON_CONTROL 0xd3
#define ADM1275_PMON_CONFIG 0xd4
#define ADM1275_CONVERT_EN BIT(0)
#define ADM1275_VIN_VOUT_SELECT BIT(6)
#define ADM1275_VRANGE BIT(5)
#define ADM1075_IRANGE_50 BIT(4)
#define ADM1075_IRANGE_25 BIT(3)
#define ADM1075_IRANGE_MASK (BIT(3) | BIT(4))
#define ADM1272_IRANGE BIT(0)
#define ADM1278_TSFILT BIT(15)
#define ADM1278_TEMP1_EN BIT(3)
#define ADM1278_VIN_EN BIT(2)
#define ADM1278_VOUT_EN BIT(1)
#define ADM1278_PMON_DEFCONFIG (ADM1278_VOUT_EN | ADM1278_TEMP1_EN | ADM1278_TSFILT)
#define ADM1293_IRANGE_25 0
#define ADM1293_IRANGE_50 BIT(6)
#define ADM1293_IRANGE_100 BIT(7)
#define ADM1293_IRANGE_200 (BIT(6) | BIT(7))
#define ADM1293_IRANGE_MASK (BIT(6) | BIT(7))
#define ADM1293_VIN_SEL_012 BIT(2)
#define ADM1293_VIN_SEL_074 BIT(3)
#define ADM1293_VIN_SEL_210 (BIT(2) | BIT(3))
#define ADM1293_VIN_SEL_MASK (BIT(2) | BIT(3))
#define ADM1293_VAUX_EN BIT(1)
#define ADM1278_PEAK_TEMP 0xd7
#define ADM1275_IOUT_WARN2_LIMIT 0xd7
#define ADM1275_DEVICE_CONFIG 0xd8
#define ADM1275_IOUT_WARN2_SELECT BIT(4)
#define ADM1276_PEAK_PIN 0xda
#define ADM1075_READ_VAUX 0xdd
#define ADM1075_VAUX_OV_WARN_LIMIT 0xde
#define ADM1075_VAUX_UV_WARN_LIMIT 0xdf
#define ADM1293_IOUT_MIN 0xe3
#define ADM1293_PIN_MIN 0xe4
#define ADM1075_VAUX_STATUS 0xf6
#define ADM1075_VAUX_OV_WARN BIT(7)
#define ADM1075_VAUX_UV_WARN BIT(6)
#define ADM1275_VI_AVG_SHIFT 0
#define ADM1275_VI_AVG_MASK GENMASK(ADM1275_VI_AVG_SHIFT + 2, \
ADM1275_VI_AVG_SHIFT)
#define ADM1275_SAMPLES_AVG_MAX 128
#define ADM1278_PWR_AVG_SHIFT 11
#define ADM1278_PWR_AVG_MASK GENMASK(ADM1278_PWR_AVG_SHIFT + 2, \
ADM1278_PWR_AVG_SHIFT)
#define ADM1278_VI_AVG_SHIFT 8
#define ADM1278_VI_AVG_MASK GENMASK(ADM1278_VI_AVG_SHIFT + 2, \
ADM1278_VI_AVG_SHIFT)
struct adm1275_data {
int id;
bool have_oc_fault;
bool have_uc_fault;
bool have_vout;
bool have_vaux_status;
bool have_mfr_vaux_status;
bool have_iout_min;
bool have_pin_min;
bool have_pin_max;
bool have_temp_max;
bool have_power_sampling;
struct pmbus_driver_info info;
};
#define to_adm1275_data(x) container_of(x, struct adm1275_data, info)
struct coefficients {
s16 m;
s16 b;
s16 R;
};
static const struct coefficients adm1075_coefficients[] = {
[0] = { 27169, 0, -1 }, /* voltage */
[1] = { 806, 20475, -1 }, /* current, irange25 */
[2] = { 404, 20475, -1 }, /* current, irange50 */
[3] = { 8549, 0, -1 }, /* power, irange25 */
[4] = { 4279, 0, -1 }, /* power, irange50 */
};
static const struct coefficients adm1272_coefficients[] = {
[0] = { 6770, 0, -2 }, /* voltage, vrange 60V */
[1] = { 4062, 0, -2 }, /* voltage, vrange 100V */
[2] = { 1326, 20480, -1 }, /* current, vsense range 15mV */
[3] = { 663, 20480, -1 }, /* current, vsense range 30mV */
[4] = { 3512, 0, -2 }, /* power, vrange 60V, irange 15mV */
[5] = { 21071, 0, -3 }, /* power, vrange 100V, irange 15mV */
[6] = { 17561, 0, -3 }, /* power, vrange 60V, irange 30mV */
[7] = { 10535, 0, -3 }, /* power, vrange 100V, irange 30mV */
[8] = { 42, 31871, -1 }, /* temperature */
};
static const struct coefficients adm1275_coefficients[] = {
[0] = { 19199, 0, -2 }, /* voltage, vrange set */
[1] = { 6720, 0, -1 }, /* voltage, vrange not set */
[2] = { 807, 20475, -1 }, /* current */
};
static const struct coefficients adm1276_coefficients[] = {
[0] = { 19199, 0, -2 }, /* voltage, vrange set */
[1] = { 6720, 0, -1 }, /* voltage, vrange not set */
[2] = { 807, 20475, -1 }, /* current */
[3] = { 6043, 0, -2 }, /* power, vrange set */
[4] = { 2115, 0, -1 }, /* power, vrange not set */
};
static const struct coefficients adm1278_coefficients[] = {
[0] = { 19599, 0, -2 }, /* voltage */
[1] = { 800, 20475, -1 }, /* current */
[2] = { 6123, 0, -2 }, /* power */
[3] = { 42, 31880, -1 }, /* temperature */
};
static const struct coefficients adm1293_coefficients[] = {
[0] = { 3333, -1, 0 }, /* voltage, vrange 1.2V */
[1] = { 5552, -5, -1 }, /* voltage, vrange 7.4V */
[2] = { 19604, -50, -2 }, /* voltage, vrange 21V */
[3] = { 8000, -100, -2 }, /* current, irange25 */
[4] = { 4000, -100, -2 }, /* current, irange50 */
[5] = { 20000, -1000, -3 }, /* current, irange100 */
[6] = { 10000, -1000, -3 }, /* current, irange200 */
[7] = { 10417, 0, -1 }, /* power, 1.2V, irange25 */
[8] = { 5208, 0, -1 }, /* power, 1.2V, irange50 */
[9] = { 26042, 0, -2 }, /* power, 1.2V, irange100 */
[10] = { 13021, 0, -2 }, /* power, 1.2V, irange200 */
[11] = { 17351, 0, -2 }, /* power, 7.4V, irange25 */
[12] = { 8676, 0, -2 }, /* power, 7.4V, irange50 */
[13] = { 4338, 0, -2 }, /* power, 7.4V, irange100 */
[14] = { 21689, 0, -3 }, /* power, 7.4V, irange200 */
[15] = { 6126, 0, -2 }, /* power, 21V, irange25 */
[16] = { 30631, 0, -3 }, /* power, 21V, irange50 */
[17] = { 15316, 0, -3 }, /* power, 21V, irange100 */
[18] = { 7658, 0, -3 }, /* power, 21V, irange200 */
};
static int adm1275_read_samples(const struct adm1275_data *data,
struct i2c_client *client, bool is_power)
{
int shift, ret;
u16 mask;
/*
* The PMON configuration register is a 16-bit register only on chips
* supporting power average sampling. On other chips it is an 8-bit
* register.
*/
if (data->have_power_sampling) {
ret = i2c_smbus_read_word_data(client, ADM1275_PMON_CONFIG);
mask = is_power ? ADM1278_PWR_AVG_MASK : ADM1278_VI_AVG_MASK;
shift = is_power ? ADM1278_PWR_AVG_SHIFT : ADM1278_VI_AVG_SHIFT;
} else {
ret = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);
mask = ADM1275_VI_AVG_MASK;
shift = ADM1275_VI_AVG_SHIFT;
}
if (ret < 0)
return ret;
return (ret & mask) >> shift;
}
static int adm1275_write_pmon_config(const struct adm1275_data *data,
struct i2c_client *client, u16 word)
{
int ret, ret2;
ret = i2c_smbus_write_byte_data(client, ADM1275_PMON_CONTROL, 0);
if (ret)
return ret;
if (data->have_power_sampling)
ret = i2c_smbus_write_word_data(client, ADM1275_PMON_CONFIG,
word);
else
ret = i2c_smbus_write_byte_data(client, ADM1275_PMON_CONFIG,
word);
/*
* We still want to re-enable conversions if writing into
* ADM1275_PMON_CONFIG failed.
*/
ret2 = i2c_smbus_write_byte_data(client, ADM1275_PMON_CONTROL,
ADM1275_CONVERT_EN);
if (!ret)
ret = ret2;
return ret;
}
static int adm1275_write_samples(const struct adm1275_data *data,
struct i2c_client *client,
bool is_power, u16 word)
{
int shift, ret;
u16 mask;
if (data->have_power_sampling) {
ret = i2c_smbus_read_word_data(client, ADM1275_PMON_CONFIG);
mask = is_power ? ADM1278_PWR_AVG_MASK : ADM1278_VI_AVG_MASK;
shift = is_power ? ADM1278_PWR_AVG_SHIFT : ADM1278_VI_AVG_SHIFT;
} else {
ret = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);
mask = ADM1275_VI_AVG_MASK;
shift = ADM1275_VI_AVG_SHIFT;
}
if (ret < 0)
return ret;
word = (ret & ~mask) | ((word << shift) & mask);
return adm1275_write_pmon_config(data, client, word);
}
static int adm1275_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct adm1275_data *data = to_adm1275_data(info);
int ret = 0;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_IOUT_UC_FAULT_LIMIT:
if (!data->have_uc_fault)
return -ENXIO;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1275_IOUT_WARN2_LIMIT);
break;
case PMBUS_IOUT_OC_FAULT_LIMIT:
if (!data->have_oc_fault)
return -ENXIO;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1275_IOUT_WARN2_LIMIT);
break;
case PMBUS_VOUT_OV_WARN_LIMIT:
if (data->have_vout)
return -ENODATA;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1075_VAUX_OV_WARN_LIMIT);
break;
case PMBUS_VOUT_UV_WARN_LIMIT:
if (data->have_vout)
return -ENODATA;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1075_VAUX_UV_WARN_LIMIT);
break;
case PMBUS_READ_VOUT:
if (data->have_vout)
return -ENODATA;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1075_READ_VAUX);
break;
case PMBUS_VIRT_READ_IOUT_MIN:
if (!data->have_iout_min)
return -ENXIO;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1293_IOUT_MIN);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1275_PEAK_IOUT);
break;
case PMBUS_VIRT_READ_VOUT_MAX:
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1275_PEAK_VOUT);
break;
case PMBUS_VIRT_READ_VIN_MAX:
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1275_PEAK_VIN);
break;
case PMBUS_VIRT_READ_PIN_MIN:
if (!data->have_pin_min)
return -ENXIO;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1293_PIN_MIN);
break;
case PMBUS_VIRT_READ_PIN_MAX:
if (!data->have_pin_max)
return -ENXIO;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1276_PEAK_PIN);
break;
case PMBUS_VIRT_READ_TEMP_MAX:
if (!data->have_temp_max)
return -ENXIO;
ret = pmbus_read_word_data(client, 0, 0xff,
ADM1278_PEAK_TEMP);
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
case PMBUS_VIRT_RESET_VOUT_HISTORY:
case PMBUS_VIRT_RESET_VIN_HISTORY:
break;
case PMBUS_VIRT_RESET_PIN_HISTORY:
if (!data->have_pin_max)
return -ENXIO;
break;
case PMBUS_VIRT_RESET_TEMP_HISTORY:
if (!data->have_temp_max)
return -ENXIO;
break;
case PMBUS_VIRT_POWER_SAMPLES:
if (!data->have_power_sampling)
return -ENXIO;
ret = adm1275_read_samples(data, client, true);
if (ret < 0)
break;
ret = BIT(ret);
break;
case PMBUS_VIRT_IN_SAMPLES:
case PMBUS_VIRT_CURR_SAMPLES:
ret = adm1275_read_samples(data, client, false);
if (ret < 0)
break;
ret = BIT(ret);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int adm1275_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct adm1275_data *data = to_adm1275_data(info);
int ret;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_IOUT_UC_FAULT_LIMIT:
case PMBUS_IOUT_OC_FAULT_LIMIT:
ret = pmbus_write_word_data(client, 0, ADM1275_IOUT_WARN2_LIMIT,
word);
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
ret = pmbus_write_word_data(client, 0, ADM1275_PEAK_IOUT, 0);
if (!ret && data->have_iout_min)
ret = pmbus_write_word_data(client, 0,
ADM1293_IOUT_MIN, 0);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
ret = pmbus_write_word_data(client, 0, ADM1275_PEAK_VOUT, 0);
break;
case PMBUS_VIRT_RESET_VIN_HISTORY:
ret = pmbus_write_word_data(client, 0, ADM1275_PEAK_VIN, 0);
break;
case PMBUS_VIRT_RESET_PIN_HISTORY:
ret = pmbus_write_word_data(client, 0, ADM1276_PEAK_PIN, 0);
if (!ret && data->have_pin_min)
ret = pmbus_write_word_data(client, 0,
ADM1293_PIN_MIN, 0);
break;
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = pmbus_write_word_data(client, 0, ADM1278_PEAK_TEMP, 0);
break;
case PMBUS_VIRT_POWER_SAMPLES:
if (!data->have_power_sampling)
return -ENXIO;
word = clamp_val(word, 1, ADM1275_SAMPLES_AVG_MAX);
ret = adm1275_write_samples(data, client, true, ilog2(word));
break;
case PMBUS_VIRT_IN_SAMPLES:
case PMBUS_VIRT_CURR_SAMPLES:
word = clamp_val(word, 1, ADM1275_SAMPLES_AVG_MAX);
ret = adm1275_write_samples(data, client, false, ilog2(word));
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int adm1275_read_byte_data(struct i2c_client *client, int page, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct adm1275_data *data = to_adm1275_data(info);
int mfr_status, ret;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_STATUS_IOUT:
ret = pmbus_read_byte_data(client, page, PMBUS_STATUS_IOUT);
if (ret < 0)
break;
if (!data->have_oc_fault && !data->have_uc_fault)
break;
mfr_status = pmbus_read_byte_data(client, page,
PMBUS_STATUS_MFR_SPECIFIC);
if (mfr_status < 0)
return mfr_status;
if (mfr_status & ADM1275_MFR_STATUS_IOUT_WARN2) {
ret |= data->have_oc_fault ?
PB_IOUT_OC_FAULT : PB_IOUT_UC_FAULT;
}
break;
case PMBUS_STATUS_VOUT:
if (data->have_vout)
return -ENODATA;
ret = 0;
if (data->have_vaux_status) {
mfr_status = pmbus_read_byte_data(client, 0,
ADM1075_VAUX_STATUS);
if (mfr_status < 0)
return mfr_status;
if (mfr_status & ADM1075_VAUX_OV_WARN)
ret |= PB_VOLTAGE_OV_WARNING;
if (mfr_status & ADM1075_VAUX_UV_WARN)
ret |= PB_VOLTAGE_UV_WARNING;
} else if (data->have_mfr_vaux_status) {
mfr_status = pmbus_read_byte_data(client, page,
PMBUS_STATUS_MFR_SPECIFIC);
if (mfr_status < 0)
return mfr_status;
if (mfr_status & ADM1293_MFR_STATUS_VAUX_OV_WARN)
ret |= PB_VOLTAGE_OV_WARNING;
if (mfr_status & ADM1293_MFR_STATUS_VAUX_UV_WARN)
ret |= PB_VOLTAGE_UV_WARNING;
}
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static const struct i2c_device_id adm1275_id[] = {
{ "adm1075", adm1075 },
{ "adm1272", adm1272 },
{ "adm1275", adm1275 },
{ "adm1276", adm1276 },
{ "adm1278", adm1278 },
{ "adm1293", adm1293 },
{ "adm1294", adm1294 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adm1275_id);
/* Enable VOUT & TEMP1 if not enabled (disabled by default) */
static int adm1275_enable_vout_temp(struct adm1275_data *data,
struct i2c_client *client, int config)
{
int ret;
if ((config & ADM1278_PMON_DEFCONFIG) != ADM1278_PMON_DEFCONFIG) {
config |= ADM1278_PMON_DEFCONFIG;
ret = adm1275_write_pmon_config(data, client, config);
if (ret < 0) {
dev_err(&client->dev, "Failed to enable VOUT/TEMP1 monitoring\n");
return ret;
}
}
return 0;
}
static int adm1275_probe(struct i2c_client *client)
{
s32 (*config_read_fn)(const struct i2c_client *client, u8 reg);
u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
int config, device_config;
int ret;
struct pmbus_driver_info *info;
struct adm1275_data *data;
const struct i2c_device_id *mid;
const struct coefficients *coefficients;
int vindex = -1, voindex = -1, cindex = -1, pindex = -1;
int tindex = -1;
u32 shunt;
u32 avg;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA
| I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, block_buffer);
if (ret < 0) {
dev_err(&client->dev, "Failed to read Manufacturer ID\n");
return ret;
}
if (ret != 3 || strncmp(block_buffer, "ADI", 3)) {
dev_err(&client->dev, "Unsupported Manufacturer ID\n");
return -ENODEV;
}
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, block_buffer);
if (ret < 0) {
dev_err(&client->dev, "Failed to read Manufacturer Model\n");
return ret;
}
for (mid = adm1275_id; mid->name[0]; mid++) {
if (!strncasecmp(mid->name, block_buffer, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
if (strcmp(client->name, mid->name) != 0)
dev_notice(&client->dev,
"Device mismatch: Configured %s, detected %s\n",
client->name, mid->name);
if (mid->driver_data == adm1272 || mid->driver_data == adm1278 ||
mid->driver_data == adm1293 || mid->driver_data == adm1294)
config_read_fn = i2c_smbus_read_word_data;
else
config_read_fn = i2c_smbus_read_byte_data;
config = config_read_fn(client, ADM1275_PMON_CONFIG);
if (config < 0)
return config;
device_config = config_read_fn(client, ADM1275_DEVICE_CONFIG);
if (device_config < 0)
return device_config;
data = devm_kzalloc(&client->dev, sizeof(struct adm1275_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
if (of_property_read_u32(client->dev.of_node,
"shunt-resistor-micro-ohms", &shunt))
shunt = 1000; /* 1 mOhm if not set via DT */
if (shunt == 0)
return -EINVAL;
data->id = mid->driver_data;
info = &data->info;
info->pages = 1;
info->format[PSC_VOLTAGE_IN] = direct;
info->format[PSC_VOLTAGE_OUT] = direct;
info->format[PSC_CURRENT_OUT] = direct;
info->format[PSC_POWER] = direct;
info->format[PSC_TEMPERATURE] = direct;
info->func[0] = PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_SAMPLES;
info->read_word_data = adm1275_read_word_data;
info->read_byte_data = adm1275_read_byte_data;
info->write_word_data = adm1275_write_word_data;
switch (data->id) {
case adm1075:
if (device_config & ADM1275_IOUT_WARN2_SELECT)
data->have_oc_fault = true;
else
data->have_uc_fault = true;
data->have_pin_max = true;
data->have_vaux_status = true;
coefficients = adm1075_coefficients;
vindex = 0;
switch (config & ADM1075_IRANGE_MASK) {
case ADM1075_IRANGE_25:
cindex = 1;
pindex = 3;
break;
case ADM1075_IRANGE_50:
cindex = 2;
pindex = 4;
break;
default:
dev_err(&client->dev, "Invalid input current range");
break;
}
info->func[0] |= PMBUS_HAVE_VIN | PMBUS_HAVE_PIN
| PMBUS_HAVE_STATUS_INPUT;
if (config & ADM1275_VIN_VOUT_SELECT)
info->func[0] |=
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
break;
case adm1272:
data->have_vout = true;
data->have_pin_max = true;
data->have_temp_max = true;
data->have_power_sampling = true;
coefficients = adm1272_coefficients;
vindex = (config & ADM1275_VRANGE) ? 1 : 0;
cindex = (config & ADM1272_IRANGE) ? 3 : 2;
/* pindex depends on the combination of the above */
switch (config & (ADM1275_VRANGE | ADM1272_IRANGE)) {
case 0:
default:
pindex = 4;
break;
case ADM1275_VRANGE:
pindex = 5;
break;
case ADM1272_IRANGE:
pindex = 6;
break;
case ADM1275_VRANGE | ADM1272_IRANGE:
pindex = 7;
break;
}
tindex = 8;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
ret = adm1275_enable_vout_temp(data, client, config);
if (ret)
return ret;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
case adm1275:
if (device_config & ADM1275_IOUT_WARN2_SELECT)
data->have_oc_fault = true;
else
data->have_uc_fault = true;
data->have_vout = true;
coefficients = adm1275_coefficients;
vindex = (config & ADM1275_VRANGE) ? 0 : 1;
cindex = 2;
if (config & ADM1275_VIN_VOUT_SELECT)
info->func[0] |=
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
else
info->func[0] |=
PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT;
break;
case adm1276:
if (device_config & ADM1275_IOUT_WARN2_SELECT)
data->have_oc_fault = true;
else
data->have_uc_fault = true;
data->have_vout = true;
data->have_pin_max = true;
coefficients = adm1276_coefficients;
vindex = (config & ADM1275_VRANGE) ? 0 : 1;
cindex = 2;
pindex = (config & ADM1275_VRANGE) ? 3 : 4;
info->func[0] |= PMBUS_HAVE_VIN | PMBUS_HAVE_PIN
| PMBUS_HAVE_STATUS_INPUT;
if (config & ADM1275_VIN_VOUT_SELECT)
info->func[0] |=
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
break;
case adm1278:
data->have_vout = true;
data->have_pin_max = true;
data->have_temp_max = true;
data->have_power_sampling = true;
coefficients = adm1278_coefficients;
vindex = 0;
cindex = 1;
pindex = 2;
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
ret = adm1275_enable_vout_temp(data, client, config);
if (ret)
return ret;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
case adm1293:
case adm1294:
data->have_iout_min = true;
data->have_pin_min = true;
data->have_pin_max = true;
data->have_mfr_vaux_status = true;
data->have_power_sampling = true;
coefficients = adm1293_coefficients;
voindex = 0;
switch (config & ADM1293_VIN_SEL_MASK) {
case ADM1293_VIN_SEL_012: /* 1.2V */
vindex = 0;
break;
case ADM1293_VIN_SEL_074: /* 7.4V */
vindex = 1;
break;
case ADM1293_VIN_SEL_210: /* 21V */
vindex = 2;
break;
default: /* disabled */
break;
}
switch (config & ADM1293_IRANGE_MASK) {
case ADM1293_IRANGE_25:
cindex = 3;
break;
case ADM1293_IRANGE_50:
cindex = 4;
break;
case ADM1293_IRANGE_100:
cindex = 5;
break;
case ADM1293_IRANGE_200:
cindex = 6;
break;
}
if (vindex >= 0)
pindex = 7 + vindex * 4 + (cindex - 3);
if (config & ADM1293_VAUX_EN)
info->func[0] |=
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
info->func[0] |= PMBUS_HAVE_PIN |
PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT;
break;
default:
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
if (data->have_power_sampling &&
of_property_read_u32(client->dev.of_node,
"adi,power-sample-average", &avg) == 0) {
if (!avg || avg > ADM1275_SAMPLES_AVG_MAX ||
BIT(__fls(avg)) != avg) {
dev_err(&client->dev,
"Invalid number of power samples");
return -EINVAL;
}
ret = adm1275_write_samples(data, client, true, ilog2(avg));
if (ret < 0) {
dev_err(&client->dev,
"Setting power sample averaging failed with error %d",
ret);
return ret;
}
}
if (of_property_read_u32(client->dev.of_node,
"adi,volt-curr-sample-average", &avg) == 0) {
if (!avg || avg > ADM1275_SAMPLES_AVG_MAX ||
BIT(__fls(avg)) != avg) {
dev_err(&client->dev,
"Invalid number of voltage/current samples");
return -EINVAL;
}
ret = adm1275_write_samples(data, client, false, ilog2(avg));
if (ret < 0) {
dev_err(&client->dev,
"Setting voltage and current sample averaging failed with error %d",
ret);
return ret;
}
}
if (voindex < 0)
voindex = vindex;
if (vindex >= 0) {
info->m[PSC_VOLTAGE_IN] = coefficients[vindex].m;
info->b[PSC_VOLTAGE_IN] = coefficients[vindex].b;
info->R[PSC_VOLTAGE_IN] = coefficients[vindex].R;
}
if (voindex >= 0) {
info->m[PSC_VOLTAGE_OUT] = coefficients[voindex].m;
info->b[PSC_VOLTAGE_OUT] = coefficients[voindex].b;
info->R[PSC_VOLTAGE_OUT] = coefficients[voindex].R;
}
if (cindex >= 0) {
/* Scale current with sense resistor value */
info->m[PSC_CURRENT_OUT] =
coefficients[cindex].m * shunt / 1000;
info->b[PSC_CURRENT_OUT] = coefficients[cindex].b;
info->R[PSC_CURRENT_OUT] = coefficients[cindex].R;
}
if (pindex >= 0) {
info->m[PSC_POWER] =
coefficients[pindex].m * shunt / 1000;
info->b[PSC_POWER] = coefficients[pindex].b;
info->R[PSC_POWER] = coefficients[pindex].R;
}
if (tindex >= 0) {
info->m[PSC_TEMPERATURE] = coefficients[tindex].m;
info->b[PSC_TEMPERATURE] = coefficients[tindex].b;
info->R[PSC_TEMPERATURE] = coefficients[tindex].R;
}
return pmbus_do_probe(client, info);
}
static struct i2c_driver adm1275_driver = {
.driver = {
.name = "adm1275",
},
.probe = adm1275_probe,
.id_table = adm1275_id,
};
module_i2c_driver(adm1275_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for Analog Devices ADM1275 and compatibles");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/adm1275.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for TEXAS TPS546D24 buck converter
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pmbus.h>
#include "pmbus.h"
static struct pmbus_driver_info tps546d24_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_CURRENT_OUT] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
| PMBUS_HAVE_IOUT | PMBUS_HAVE_VOUT
| PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
};
static int tps546d24_probe(struct i2c_client *client)
{
int reg;
reg = i2c_smbus_read_byte_data(client, PMBUS_VOUT_MODE);
if (reg < 0)
return reg;
if (reg & 0x80) {
int err;
err = i2c_smbus_write_byte_data(client, PMBUS_VOUT_MODE, reg & 0x7f);
if (err < 0)
return err;
}
return pmbus_do_probe(client, &tps546d24_info);
}
static const struct i2c_device_id tps546d24_id[] = {
{"tps546d24", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, tps546d24_id);
static const struct of_device_id __maybe_unused tps546d24_of_match[] = {
{.compatible = "ti,tps546d24"},
{}
};
MODULE_DEVICE_TABLE(of, tps546d24_of_match);
/* This is the driver that will be inserted */
static struct i2c_driver tps546d24_driver = {
.driver = {
.name = "tps546d24",
.of_match_table = of_match_ptr(tps546d24_of_match),
},
.probe = tps546d24_probe,
.id_table = tps546d24_id,
};
module_i2c_driver(tps546d24_driver);
MODULE_AUTHOR("Duke Du <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for TI tps546d24");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/tps546d24.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Delta DPS920AB PSU
*
* Copyright (C) 2021 Delta Networks, Inc.
* Copyright (C) 2021 Sartura Ltd.
*/
#include <linux/debugfs.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/of.h>
#include "pmbus.h"
struct dps920ab_data {
char *mfr_model;
char *mfr_id;
};
static int dps920ab_read_word_data(struct i2c_client *client, int page, int phase, int reg)
{
/*
* This masks commands which are not supported.
* PSU advertises that all features are supported,
* in reality that unfortunately is not true.
* So enable only those that the datasheet confirms.
*/
switch (reg) {
case PMBUS_FAN_COMMAND_1:
case PMBUS_IOUT_OC_WARN_LIMIT:
case PMBUS_STATUS_WORD:
case PMBUS_READ_VIN:
case PMBUS_READ_IIN:
case PMBUS_READ_VOUT:
case PMBUS_READ_IOUT:
case PMBUS_READ_TEMPERATURE_1:
case PMBUS_READ_TEMPERATURE_2:
case PMBUS_READ_TEMPERATURE_3:
case PMBUS_READ_FAN_SPEED_1:
case PMBUS_READ_POUT:
case PMBUS_READ_PIN:
case PMBUS_MFR_VOUT_MIN:
case PMBUS_MFR_VOUT_MAX:
case PMBUS_MFR_IOUT_MAX:
case PMBUS_MFR_POUT_MAX:
return pmbus_read_word_data(client, page, phase, reg);
default:
return -ENXIO;
}
}
static int dps920ab_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
/*
* This masks commands which are not supported.
* PSU only has one R/W register and that is
* for the fan.
*/
switch (reg) {
case PMBUS_FAN_COMMAND_1:
return pmbus_write_word_data(client, page, reg, word);
default:
return -EACCES;
}
}
static struct pmbus_driver_info dps920ab_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.format[PSC_FAN] = linear,
.format[PSC_TEMPERATURE] = linear,
.func[0] =
PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT | PMBUS_HAVE_POUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_TEMP3 |
PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 |
PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP,
.read_word_data = dps920ab_read_word_data,
.write_word_data = dps920ab_write_word_data,
};
static int dps920ab_mfr_id_show(struct seq_file *s, void *data)
{
struct dps920ab_data *priv = s->private;
seq_printf(s, "%s\n", priv->mfr_id);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(dps920ab_mfr_id);
static int dps920ab_mfr_model_show(struct seq_file *s, void *data)
{
struct dps920ab_data *priv = s->private;
seq_printf(s, "%s\n", priv->mfr_model);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(dps920ab_mfr_model);
static void dps920ab_init_debugfs(struct dps920ab_data *data, struct i2c_client *client)
{
struct dentry *debugfs_dir;
struct dentry *root;
root = pmbus_get_debugfs_dir(client);
if (!root)
return;
debugfs_dir = debugfs_create_dir(client->name, root);
debugfs_create_file("mfr_id",
0400,
debugfs_dir,
data,
&dps920ab_mfr_id_fops);
debugfs_create_file("mfr_model",
0400,
debugfs_dir,
data,
&dps920ab_mfr_model_fops);
}
static int dps920ab_probe(struct i2c_client *client)
{
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
struct dps920ab_data *data;
int ret;
data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
if (ret < 0) {
dev_err(&client->dev, "Failed to read Manufacturer ID\n");
return ret;
}
buf[ret] = '\0';
if (ret != 5 || strncmp(buf, "DELTA", 5)) {
buf[ret] = '\0';
dev_err(&client->dev, "Unsupported Manufacturer ID '%s'\n", buf);
return -ENODEV;
}
data->mfr_id = devm_kstrdup(&client->dev, buf, GFP_KERNEL);
if (!data->mfr_id)
return -ENOMEM;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (ret < 0) {
dev_err(&client->dev, "Failed to read Manufacturer Model\n");
return ret;
}
buf[ret] = '\0';
if (ret != 11 || strncmp(buf, "DPS-920AB", 9)) {
dev_err(&client->dev, "Unsupported Manufacturer Model '%s'\n", buf);
return -ENODEV;
}
data->mfr_model = devm_kstrdup(&client->dev, buf, GFP_KERNEL);
if (!data->mfr_model)
return -ENOMEM;
ret = pmbus_do_probe(client, &dps920ab_info);
if (ret)
return ret;
dps920ab_init_debugfs(data, client);
return 0;
}
static const struct of_device_id __maybe_unused dps920ab_of_match[] = {
{ .compatible = "delta,dps920ab", },
{}
};
MODULE_DEVICE_TABLE(of, dps920ab_of_match);
static struct i2c_driver dps920ab_driver = {
.driver = {
.name = "dps920ab",
.of_match_table = of_match_ptr(dps920ab_of_match),
},
.probe = dps920ab_probe,
};
module_i2c_driver(dps920ab_driver);
MODULE_AUTHOR("Robert Marko <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Delta DPS920AB PSU");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/dps920ab.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for MPS Multi-phase Digital VR Controllers
*
* Copyright (C) 2020 Nvidia Technologies Ltd.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include "pmbus.h"
/* Vendor specific registers. */
#define MP2975_MFR_APS_HYS_R2 0x0d
#define MP2975_MFR_SLOPE_TRIM3 0x1d
#define MP2975_MFR_VR_MULTI_CONFIG_R1 0x0d
#define MP2975_MFR_VR_MULTI_CONFIG_R2 0x1d
#define MP2975_MFR_APS_DECAY_ADV 0x56
#define MP2975_MFR_DC_LOOP_CTRL 0x59
#define MP2975_MFR_OCP_UCP_PHASE_SET 0x65
#define MP2975_MFR_VR_CONFIG1 0x68
#define MP2975_MFR_READ_CS1_2 0x82
#define MP2975_MFR_READ_CS3_4 0x83
#define MP2975_MFR_READ_CS5_6 0x84
#define MP2975_MFR_READ_CS7_8 0x85
#define MP2975_MFR_READ_CS9_10 0x86
#define MP2975_MFR_READ_CS11_12 0x87
#define MP2975_MFR_READ_IOUT_PK 0x90
#define MP2975_MFR_READ_POUT_PK 0x91
#define MP2975_MFR_READ_VREF_R1 0xa1
#define MP2975_MFR_READ_VREF_R2 0xa3
#define MP2975_MFR_OVP_TH_SET 0xe5
#define MP2975_MFR_UVP_SET 0xe6
#define MP2973_MFR_RESO_SET 0xc7
#define MP2975_VOUT_FORMAT BIT(15)
#define MP2975_VID_STEP_SEL_R1 BIT(4)
#define MP2975_IMVP9_EN_R1 BIT(13)
#define MP2975_VID_STEP_SEL_R2 BIT(3)
#define MP2975_IMVP9_EN_R2 BIT(12)
#define MP2975_PRT_THRES_DIV_OV_EN BIT(14)
#define MP2975_DRMOS_KCS GENMASK(13, 12)
#define MP2975_PROT_DEV_OV_OFF 10
#define MP2975_PROT_DEV_OV_ON 5
#define MP2975_SENSE_AMPL BIT(11)
#define MP2975_SENSE_AMPL_UNIT 1
#define MP2975_SENSE_AMPL_HALF 2
#define MP2975_VIN_UV_LIMIT_UNIT 8
#define MP2973_VOUT_FORMAT_R1 GENMASK(7, 6)
#define MP2973_VOUT_FORMAT_R2 GENMASK(4, 3)
#define MP2973_VOUT_FORMAT_DIRECT_R1 BIT(7)
#define MP2973_VOUT_FORMAT_LINEAR_R1 BIT(6)
#define MP2973_VOUT_FORMAT_DIRECT_R2 BIT(4)
#define MP2973_VOUT_FORMAT_LINEAR_R2 BIT(3)
#define MP2973_MFR_VR_MULTI_CONFIG_R1 0x0d
#define MP2973_MFR_VR_MULTI_CONFIG_R2 0x1d
#define MP2973_VID_STEP_SEL_R1 BIT(4)
#define MP2973_IMVP9_EN_R1 BIT(14)
#define MP2973_VID_STEP_SEL_R2 BIT(3)
#define MP2973_IMVP9_EN_R2 BIT(13)
#define MP2973_MFR_OCP_TOTAL_SET 0x5f
#define MP2973_OCP_TOTAL_CUR_MASK GENMASK(6, 0)
#define MP2973_MFR_OCP_LEVEL_RES BIT(15)
#define MP2973_MFR_READ_IOUT_PK 0x90
#define MP2973_MFR_READ_POUT_PK 0x91
#define MP2975_MAX_PHASE_RAIL1 8
#define MP2975_MAX_PHASE_RAIL2 4
#define MP2973_MAX_PHASE_RAIL1 14
#define MP2973_MAX_PHASE_RAIL2 6
#define MP2971_MAX_PHASE_RAIL1 8
#define MP2971_MAX_PHASE_RAIL2 3
#define MP2975_PAGE_NUM 2
#define MP2975_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \
PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL)
enum chips {
mp2971, mp2973, mp2975
};
static const int mp2975_max_phases[][MP2975_PAGE_NUM] = {
[mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 },
[mp2973] = { MP2973_MAX_PHASE_RAIL1, MP2973_MAX_PHASE_RAIL2 },
[mp2971] = { MP2971_MAX_PHASE_RAIL1, MP2971_MAX_PHASE_RAIL2 },
};
struct mp2975_data {
struct pmbus_driver_info info;
enum chips chip_id;
int vout_scale;
int max_phases[MP2975_PAGE_NUM];
int vid_step[MP2975_PAGE_NUM];
int vref[MP2975_PAGE_NUM];
int vref_off[MP2975_PAGE_NUM];
int vout_max[MP2975_PAGE_NUM];
int vout_ov_fixed[MP2975_PAGE_NUM];
int curr_sense_gain[MP2975_PAGE_NUM];
};
static const struct i2c_device_id mp2975_id[] = {
{"mp2971", mp2971},
{"mp2973", mp2973},
{"mp2975", mp2975},
{}
};
MODULE_DEVICE_TABLE(i2c, mp2975_id);
static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = {
PMBUS_REGULATOR("vout", 0),
PMBUS_REGULATOR("vout", 1),
};
#define to_mp2975_data(x) container_of(x, struct mp2975_data, info)
static int
mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg,
u16 mask)
{
int ret = pmbus_read_word_data(client, page, phase, reg);
return (ret > 0) ? ret & mask : ret;
}
static int
mp2975_vid2direct(int vrf, int val)
{
switch (vrf) {
case vr12:
if (val >= 0x01)
return 250 + (val - 1) * 5;
break;
case vr13:
if (val >= 0x01)
return 500 + (val - 1) * 10;
break;
case imvp9:
if (val >= 0x01)
return 200 + (val - 1) * 10;
break;
default:
return -EINVAL;
}
return 0;
}
#define MAX_LIN_MANTISSA (1023 * 1000)
#define MIN_LIN_MANTISSA (511 * 1000)
/* Converts a milli-unit DIRECT value to LINEAR11 format */
static u16 mp2975_data2reg_linear11(s64 val)
{
s16 exponent = 0, mantissa;
bool negative = false;
/* simple case */
if (val == 0)
return 0;
/* Reduce large mantissa until it fits into 10 bit */
while (val >= MAX_LIN_MANTISSA && exponent < 15) {
exponent++;
val >>= 1;
}
/* Increase small mantissa to improve precision */
while (val < MIN_LIN_MANTISSA && exponent > -15) {
exponent--;
val <<= 1;
}
/* Convert mantissa from milli-units to units */
mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff);
/* restore sign */
if (negative)
mantissa = -mantissa;
/* Convert to 5 bit exponent, 11 bit mantissa */
return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
}
static int
mp2975_read_phase(struct i2c_client *client, struct mp2975_data *data,
int page, int phase, u8 reg)
{
int ph_curr, ret;
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
if (!((phase + 1) % MP2975_PAGE_NUM))
ret >>= 8;
ret &= 0xff;
/*
* Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs)
* where:
* - Kcs is the DrMOS current sense gain of power stage, which is
* obtained from the register MP2975_MFR_VR_CONFIG1, bits 13-12 with
* the following selection of DrMOS (data->curr_sense_gain[page]):
* 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A.
* - Rcs is the internal phase current sense resistor which is constant
* value 1kΩ.
*/
ph_curr = ret * 100 - 9800;
/*
* Current phase sensing, providing by the device is not accurate
* for the light load. This because sampling of current occurrence of
* bit weight has a big deviation for light load. For handling such
* case phase current is represented as the maximum between the value
* calculated above and total rail current divided by number phases.
*/
ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT);
if (ret < 0)
return ret;
return max_t(int, DIV_ROUND_CLOSEST(ret, data->info.phases[page]),
DIV_ROUND_CLOSEST(ph_curr, data->curr_sense_gain[page]));
}
static int
mp2975_read_phases(struct i2c_client *client, struct mp2975_data *data,
int page, int phase)
{
int ret;
if (page) {
switch (phase) {
case 0 ... 1:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS7_8);
break;
case 2 ... 3:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS9_10);
break;
case 4 ... 5:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS11_12);
break;
default:
return -ENODATA;
}
} else {
switch (phase) {
case 0 ... 1:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS1_2);
break;
case 2 ... 3:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS3_4);
break;
case 4 ... 5:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS5_6);
break;
case 6 ... 7:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS7_8);
break;
case 8 ... 9:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS9_10);
break;
case 10 ... 11:
ret = mp2975_read_phase(client, data, page, phase,
MP2975_MFR_READ_CS11_12);
break;
default:
return -ENODATA;
}
}
return ret;
}
static int mp2973_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct mp2975_data *data = to_mp2975_data(info);
int ret;
switch (reg) {
case PMBUS_OT_FAULT_LIMIT:
ret = mp2975_read_word_helper(client, page, phase, reg,
GENMASK(7, 0));
break;
case PMBUS_VIN_OV_FAULT_LIMIT:
ret = mp2975_read_word_helper(client, page, phase, reg,
GENMASK(7, 0));
if (ret < 0)
return ret;
ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT);
break;
case PMBUS_VOUT_OV_FAULT_LIMIT:
/*
* MP2971 and mp2973 only supports tracking (ovp1) mode.
*/
ret = mp2975_read_word_helper(client, page, phase,
MP2975_MFR_OVP_TH_SET,
GENMASK(2, 0));
if (ret < 0)
return ret;
ret = data->vout_max[page] + 50 * (ret + 1);
break;
case PMBUS_VOUT_UV_FAULT_LIMIT:
ret = mp2975_read_word_helper(client, page, phase, reg,
GENMASK(8, 0));
if (ret < 0)
return ret;
ret = mp2975_vid2direct(info->vrm_version[page], ret);
break;
case PMBUS_VIRT_READ_POUT_MAX:
ret = pmbus_read_word_data(client, page, phase,
MP2973_MFR_READ_POUT_PK);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
ret = pmbus_read_word_data(client, page, phase,
MP2973_MFR_READ_IOUT_PK);
break;
case PMBUS_IOUT_OC_FAULT_LIMIT:
ret = mp2975_read_word_helper(client, page, phase,
MP2973_MFR_OCP_TOTAL_SET,
GENMASK(15, 0));
if (ret < 0)
return ret;
if (ret & MP2973_MFR_OCP_LEVEL_RES)
ret = 2 * (ret & MP2973_OCP_TOTAL_CUR_MASK);
else
ret = ret & MP2973_OCP_TOTAL_CUR_MASK;
ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000);
break;
case PMBUS_UT_WARN_LIMIT:
case PMBUS_UT_FAULT_LIMIT:
case PMBUS_VIN_UV_WARN_LIMIT:
case PMBUS_VIN_UV_FAULT_LIMIT:
case PMBUS_VOUT_UV_WARN_LIMIT:
case PMBUS_VOUT_OV_WARN_LIMIT:
case PMBUS_VIN_OV_WARN_LIMIT:
case PMBUS_IIN_OC_FAULT_LIMIT:
case PMBUS_IOUT_OC_LV_FAULT_LIMIT:
case PMBUS_IOUT_OC_WARN_LIMIT:
case PMBUS_IOUT_UC_FAULT_LIMIT:
case PMBUS_POUT_OP_FAULT_LIMIT:
case PMBUS_POUT_OP_WARN_LIMIT:
case PMBUS_PIN_OP_WARN_LIMIT:
return -ENXIO;
default:
return -ENODATA;
}
return ret;
}
static int mp2975_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct mp2975_data *data = to_mp2975_data(info);
int ret;
switch (reg) {
case PMBUS_STATUS_WORD:
/* MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. */
ret = pmbus_read_word_data(client, page, phase, reg);
ret ^= PB_STATUS_POWER_GOOD_N;
break;
case PMBUS_OT_FAULT_LIMIT:
ret = mp2975_read_word_helper(client, page, phase, reg,
GENMASK(7, 0));
break;
case PMBUS_VIN_OV_FAULT_LIMIT:
ret = mp2975_read_word_helper(client, page, phase, reg,
GENMASK(7, 0));
if (ret < 0)
return ret;
ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT);
break;
case PMBUS_VOUT_OV_FAULT_LIMIT:
/*
* Register provides two values for over-voltage protection
* threshold for fixed (ovp2) and tracking (ovp1) modes. The
* minimum of these two values is provided as over-voltage
* fault alarm.
*/
ret = mp2975_read_word_helper(client, page, phase,
MP2975_MFR_OVP_TH_SET,
GENMASK(2, 0));
if (ret < 0)
return ret;
ret = min_t(int, data->vout_max[page] + 50 * (ret + 1),
data->vout_ov_fixed[page]);
break;
case PMBUS_VOUT_UV_FAULT_LIMIT:
ret = mp2975_read_word_helper(client, page, phase,
MP2975_MFR_UVP_SET,
GENMASK(2, 0));
if (ret < 0)
return ret;
ret = DIV_ROUND_CLOSEST(data->vref[page] * 10 - 50 *
(ret + 1) * data->vout_scale, 10);
break;
case PMBUS_VIRT_READ_POUT_MAX:
ret = mp2975_read_word_helper(client, page, phase,
MP2975_MFR_READ_POUT_PK,
GENMASK(12, 0));
if (ret < 0)
return ret;
ret = DIV_ROUND_CLOSEST(ret, 4);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
ret = mp2975_read_word_helper(client, page, phase,
MP2975_MFR_READ_IOUT_PK,
GENMASK(12, 0));
if (ret < 0)
return ret;
ret = DIV_ROUND_CLOSEST(ret, 4);
break;
case PMBUS_READ_IOUT:
ret = mp2975_read_phases(client, data, page, phase);
if (ret < 0)
return ret;
break;
case PMBUS_UT_WARN_LIMIT:
case PMBUS_UT_FAULT_LIMIT:
case PMBUS_VIN_UV_WARN_LIMIT:
case PMBUS_VIN_UV_FAULT_LIMIT:
case PMBUS_VOUT_UV_WARN_LIMIT:
case PMBUS_VOUT_OV_WARN_LIMIT:
case PMBUS_VIN_OV_WARN_LIMIT:
case PMBUS_IIN_OC_FAULT_LIMIT:
case PMBUS_IOUT_OC_LV_FAULT_LIMIT:
case PMBUS_IIN_OC_WARN_LIMIT:
case PMBUS_IOUT_OC_WARN_LIMIT:
case PMBUS_IOUT_OC_FAULT_LIMIT:
case PMBUS_IOUT_UC_FAULT_LIMIT:
case PMBUS_POUT_OP_FAULT_LIMIT:
case PMBUS_POUT_OP_WARN_LIMIT:
case PMBUS_PIN_OP_WARN_LIMIT:
return -ENXIO;
default:
return -ENODATA;
}
return ret;
}
static int mp2975_identify_multiphase_rail2(struct i2c_client *client,
struct mp2975_data *data)
{
int ret;
/*
* Identify multiphase for rail 2 - could be from 0 to data->max_phases[1].
* In case phase number is zero – only page zero is supported
*/
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
if (ret < 0)
return ret;
ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R2);
if (ret < 0)
return ret;
ret &= GENMASK(2, 0);
return (ret >= data->max_phases[1]) ? data->max_phases[1] : ret;
}
static void mp2975_set_phase_rail1(struct pmbus_driver_info *info)
{
int i;
for (i = 0 ; i < info->phases[0]; i++)
info->pfunc[i] = PMBUS_HAVE_IOUT;
}
static void
mp2975_set_phase_rail2(struct pmbus_driver_info *info, int num_phases)
{
int i;
/* Set phases for rail 2 from upper to lower. */
for (i = 1; i <= num_phases; i++)
info->pfunc[MP2975_MAX_PHASE_RAIL1 - i] = PMBUS_HAVE_IOUT;
}
static int
mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data,
struct pmbus_driver_info *info)
{
int num_phases2, ret;
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
if (ret < 0)
return ret;
/* Identify multiphase for rail 1 - could be from 1 to data->max_phases[0]. */
ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R1);
if (ret <= 0)
return ret;
info->phases[0] = ret & GENMASK(3, 0);
/*
* The device provides a total of $n PWM pins, and can be configured
* to different phase count applications for rail 1 and rail 2.
* Rail 1 can be set to $n phases, while rail 2 can be set to less than
* that. When rail 1’s phase count is configured as 0, rail
* 1 operates with 1-phase DCM. When rail 2 phase count is configured
* as 0, rail 2 is disabled.
*/
if (info->phases[0] > data->max_phases[0])
return -EINVAL;
if (data->chip_id == mp2975) {
mp2975_set_phase_rail1(info);
num_phases2 = min(data->max_phases[0] - info->phases[0],
data->max_phases[1]);
if (info->phases[1] && info->phases[1] <= num_phases2)
mp2975_set_phase_rail2(info, num_phases2);
}
return 0;
}
static int
mp2975_identify_vid(struct i2c_client *client, struct mp2975_data *data,
struct pmbus_driver_info *info, u32 reg, int page,
u32 imvp_bit, u32 vr_bit)
{
int ret;
/* Identify VID mode and step selection. */
ret = i2c_smbus_read_word_data(client, reg);
if (ret < 0)
return ret;
if (ret & imvp_bit) {
info->vrm_version[page] = imvp9;
data->vid_step[page] = MP2975_PROT_DEV_OV_OFF;
} else if (ret & vr_bit) {
info->vrm_version[page] = vr12;
data->vid_step[page] = MP2975_PROT_DEV_OV_ON;
} else {
info->vrm_version[page] = vr13;
data->vid_step[page] = MP2975_PROT_DEV_OV_OFF;
}
return 0;
}
static int
mp2975_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data,
struct pmbus_driver_info *info)
{
int ret;
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
if (ret < 0)
return ret;
/* Identify VID mode for rail 1. */
ret = mp2975_identify_vid(client, data, info,
MP2975_MFR_VR_MULTI_CONFIG_R1, 0,
MP2975_IMVP9_EN_R1, MP2975_VID_STEP_SEL_R1);
if (ret < 0)
return ret;
/* Identify VID mode for rail 2, if connected. */
if (info->phases[1])
ret = mp2975_identify_vid(client, data, info,
MP2975_MFR_VR_MULTI_CONFIG_R2, 1,
MP2975_IMVP9_EN_R2,
MP2975_VID_STEP_SEL_R2);
return ret;
}
static int
mp2973_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data,
struct pmbus_driver_info *info)
{
int ret;
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
if (ret < 0)
return ret;
/* Identify VID mode for rail 1. */
ret = mp2975_identify_vid(client, data, info,
MP2973_MFR_VR_MULTI_CONFIG_R1, 0,
MP2973_IMVP9_EN_R1, MP2973_VID_STEP_SEL_R1);
if (ret < 0)
return ret;
/* Identify VID mode for rail 2, if connected. */
if (info->phases[1])
ret = mp2975_identify_vid(client, data, info,
MP2973_MFR_VR_MULTI_CONFIG_R2, 1,
MP2973_IMVP9_EN_R2,
MP2973_VID_STEP_SEL_R2);
return ret;
}
static int
mp2975_current_sense_gain_get(struct i2c_client *client,
struct mp2975_data *data)
{
int i, ret;
/*
* Obtain DrMOS current sense gain of power stage from the register
* MP2975_MFR_VR_CONFIG1, bits 13-12. The value is selected as below:
* 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other
* values are invalid.
*/
for (i = 0 ; i < data->info.pages; i++) {
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
if (ret < 0)
return ret;
ret = i2c_smbus_read_word_data(client,
MP2975_MFR_VR_CONFIG1);
if (ret < 0)
return ret;
switch ((ret & MP2975_DRMOS_KCS) >> 12) {
case 0:
data->curr_sense_gain[i] = 50;
break;
case 1:
data->curr_sense_gain[i] = 85;
break;
case 2:
data->curr_sense_gain[i] = 97;
break;
default:
data->curr_sense_gain[i] = 100;
break;
}
}
return 0;
}
static int
mp2975_vref_get(struct i2c_client *client, struct mp2975_data *data,
struct pmbus_driver_info *info)
{
int ret;
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 3);
if (ret < 0)
return ret;
/* Get voltage reference value for rail 1. */
ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R1);
if (ret < 0)
return ret;
data->vref[0] = ret * data->vid_step[0];
/* Get voltage reference value for rail 2, if connected. */
if (data->info.pages == MP2975_PAGE_NUM) {
ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R2);
if (ret < 0)
return ret;
data->vref[1] = ret * data->vid_step[1];
}
return 0;
}
static int
mp2975_vref_offset_get(struct i2c_client *client, struct mp2975_data *data,
int page)
{
int ret;
ret = i2c_smbus_read_word_data(client, MP2975_MFR_OVP_TH_SET);
if (ret < 0)
return ret;
switch ((ret & GENMASK(5, 3)) >> 3) {
case 1:
data->vref_off[page] = 140;
break;
case 2:
data->vref_off[page] = 220;
break;
case 4:
data->vref_off[page] = 400;
break;
default:
return -EINVAL;
}
return 0;
}
static int
mp2975_vout_max_get(struct i2c_client *client, struct mp2975_data *data,
struct pmbus_driver_info *info, int page)
{
int ret;
/* Get maximum reference voltage of VID-DAC in VID format. */
ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_MAX);
if (ret < 0)
return ret;
data->vout_max[page] = mp2975_vid2direct(info->vrm_version[page], ret &
GENMASK(8, 0));
return 0;
}
static int
mp2975_set_vout_format(struct i2c_client *client,
struct mp2975_data *data, int page)
{
int ret, i;
/* Enable DIRECT VOUT format 1mV/LSB */
if (data->chip_id == mp2975) {
ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL);
if (ret < 0)
return ret;
if (ret & MP2975_VOUT_FORMAT) {
ret &= ~MP2975_VOUT_FORMAT;
ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret);
}
} else {
ret = i2c_smbus_read_word_data(client, MP2973_MFR_RESO_SET);
if (ret < 0)
return ret;
i = ret;
if (page == 0) {
i &= ~MP2973_VOUT_FORMAT_R1;
i |= MP2973_VOUT_FORMAT_DIRECT_R1;
} else {
i &= ~MP2973_VOUT_FORMAT_R2;
i |= MP2973_VOUT_FORMAT_DIRECT_R2;
}
if (i != ret)
ret = i2c_smbus_write_word_data(client, MP2973_MFR_RESO_SET, i);
}
return ret;
}
static int
mp2975_vout_ov_scale_get(struct i2c_client *client, struct mp2975_data *data,
struct pmbus_driver_info *info)
{
int thres_dev, sense_ampl, ret;
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
if (ret < 0)
return ret;
/*
* Get divider for over- and under-voltage protection thresholds
* configuration from the Advanced Options of Auto Phase Shedding and
* decay register.
*/
ret = i2c_smbus_read_word_data(client, MP2975_MFR_APS_DECAY_ADV);
if (ret < 0)
return ret;
thres_dev = ret & MP2975_PRT_THRES_DIV_OV_EN ? MP2975_PROT_DEV_OV_ON :
MP2975_PROT_DEV_OV_OFF;
/* Select the gain of remote sense amplifier. */
ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_SCALE_LOOP);
if (ret < 0)
return ret;
sense_ampl = ret & MP2975_SENSE_AMPL ? MP2975_SENSE_AMPL_HALF :
MP2975_SENSE_AMPL_UNIT;
data->vout_scale = sense_ampl * thres_dev;
return 0;
}
static int
mp2975_vout_per_rail_config_get(struct i2c_client *client,
struct mp2975_data *data,
struct pmbus_driver_info *info)
{
int i, ret;
for (i = 0; i < data->info.pages; i++) {
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
if (ret < 0)
continue;
/* Set VOUT format for READ_VOUT command : direct. */
ret = mp2975_set_vout_format(client, data, i);
if (ret < 0)
return ret;
/* Obtain maximum voltage values. */
ret = mp2975_vout_max_get(client, data, info, i);
if (ret < 0)
return ret;
/* Skip if reading Vref is unsupported */
if (data->chip_id != mp2975)
continue;
/* Obtain voltage reference offsets. */
ret = mp2975_vref_offset_get(client, data, i);
if (ret < 0)
return ret;
/*
* Set over-voltage fixed value. Thresholds are provided as
* fixed value, and tracking value. The minimum of them are
* exposed as over-voltage critical threshold.
*/
data->vout_ov_fixed[i] = data->vref[i] +
DIV_ROUND_CLOSEST(data->vref_off[i] *
data->vout_scale,
10);
}
return 0;
}
static struct pmbus_driver_info mp2975_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_POWER] = direct,
.m[PSC_TEMPERATURE] = 1,
.m[PSC_VOLTAGE_OUT] = 1,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_CURRENT_OUT] = 1,
.m[PSC_POWER] = 1,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL,
.read_word_data = mp2975_read_word_data,
#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)
.num_regulators = 1,
.reg_desc = mp2975_reg_desc,
#endif
};
static struct pmbus_driver_info mp2973_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.m[PSC_VOLTAGE_OUT] = 1,
.R[PSC_VOLTAGE_OUT] = 3,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
.read_word_data = mp2973_read_word_data,
#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)
.num_regulators = 1,
.reg_desc = mp2975_reg_desc,
#endif
};
static int mp2975_probe(struct i2c_client *client)
{
struct pmbus_driver_info *info;
struct mp2975_data *data;
int ret;
data = devm_kzalloc(&client->dev, sizeof(struct mp2975_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
if (client->dev.of_node)
data->chip_id = (enum chips)(unsigned long)of_device_get_match_data(&client->dev);
else
data->chip_id = i2c_match_id(mp2975_id, client)->driver_data;
memcpy(data->max_phases, mp2975_max_phases[data->chip_id],
sizeof(data->max_phases));
if (data->chip_id == mp2975)
memcpy(&data->info, &mp2975_info, sizeof(*info));
else
memcpy(&data->info, &mp2973_info, sizeof(*info));
info = &data->info;
/* Identify multiphase configuration for rail 2. */
ret = mp2975_identify_multiphase_rail2(client, data);
if (ret < 0)
return ret;
if (ret) {
/* Two rails are connected. */
data->info.pages = MP2975_PAGE_NUM;
data->info.phases[1] = ret;
data->info.func[1] = MP2975_RAIL2_FUNC;
if (IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR))
data->info.num_regulators = MP2975_PAGE_NUM;
}
/* Identify multiphase configuration. */
ret = mp2975_identify_multiphase(client, data, info);
if (ret)
return ret;
if (data->chip_id == mp2975) {
/* Identify VID setting per rail. */
ret = mp2975_identify_rails_vid(client, data, info);
if (ret < 0)
return ret;
/* Obtain current sense gain of power stage. */
ret = mp2975_current_sense_gain_get(client, data);
if (ret)
return ret;
/* Obtain voltage reference values. */
ret = mp2975_vref_get(client, data, info);
if (ret)
return ret;
/* Obtain vout over-voltage scales. */
ret = mp2975_vout_ov_scale_get(client, data, info);
if (ret < 0)
return ret;
} else {
/* Identify VID setting per rail. */
ret = mp2973_identify_rails_vid(client, data, info);
if (ret < 0)
return ret;
}
/* Obtain offsets, maximum and format for vout. */
ret = mp2975_vout_per_rail_config_get(client, data, info);
if (ret)
return ret;
return pmbus_do_probe(client, info);
}
static const struct of_device_id __maybe_unused mp2975_of_match[] = {
{.compatible = "mps,mp2971", .data = (void *)mp2971},
{.compatible = "mps,mp2973", .data = (void *)mp2973},
{.compatible = "mps,mp2975", .data = (void *)mp2975},
{}
};
MODULE_DEVICE_TABLE(of, mp2975_of_match);
static struct i2c_driver mp2975_driver = {
.driver = {
.name = "mp2975",
.of_match_table = of_match_ptr(mp2975_of_match),
},
.probe = mp2975_probe,
.id_table = mp2975_id,
};
module_i2c_driver(mp2975_driver);
MODULE_AUTHOR("Vadim Pasternak <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for MPS MP2975 device");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/mp2975.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2017 IBM Corp.
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/debugfs.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/i2c.h>
#include <linux/jiffies.h>
#include <linux/leds.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/pmbus.h>
#include "pmbus.h"
#define CFFPS_CCIN_CMD 0xBD
#define CFFPS_FW_CMD 0xFA
#define CFFPS1_FW_NUM_BYTES 4
#define CFFPS2_FW_NUM_WORDS 3
#define CFFPS_SYS_CONFIG_CMD 0xDA
#define CFFPS_12VCS_VOUT_CMD 0xDE
#define CFFPS_INPUT_HISTORY_CMD 0xD6
#define CFFPS_INPUT_HISTORY_SIZE 101
#define CFFPS_CCIN_REVISION GENMASK(7, 0)
#define CFFPS_CCIN_REVISION_LEGACY 0xde
#define CFFPS_CCIN_VERSION GENMASK(15, 8)
#define CFFPS_CCIN_VERSION_1 0x2b
#define CFFPS_CCIN_VERSION_2 0x2e
#define CFFPS_CCIN_VERSION_3 0x51
/* STATUS_MFR_SPECIFIC bits */
#define CFFPS_MFR_FAN_FAULT BIT(0)
#define CFFPS_MFR_THERMAL_FAULT BIT(1)
#define CFFPS_MFR_OV_FAULT BIT(2)
#define CFFPS_MFR_UV_FAULT BIT(3)
#define CFFPS_MFR_PS_KILL BIT(4)
#define CFFPS_MFR_OC_FAULT BIT(5)
#define CFFPS_MFR_VAUX_FAULT BIT(6)
#define CFFPS_MFR_CURRENT_SHARE_WARNING BIT(7)
#define CFFPS_LED_BLINK (BIT(0) | BIT(6))
#define CFFPS_LED_ON (BIT(1) | BIT(6))
#define CFFPS_LED_OFF (BIT(2) | BIT(6))
#define CFFPS_BLINK_RATE_MS 250
enum {
CFFPS_DEBUGFS_MAX_POWER_OUT = 0,
CFFPS_DEBUGFS_CCIN,
CFFPS_DEBUGFS_FW,
CFFPS_DEBUGFS_ON_OFF_CONFIG,
CFFPS_DEBUGFS_NUM_ENTRIES
};
enum versions { cffps1, cffps2, cffps_unknown };
struct ibm_cffps {
enum versions version;
struct i2c_client *client;
u8 input_history[CFFPS_INPUT_HISTORY_SIZE];
int debugfs_entries[CFFPS_DEBUGFS_NUM_ENTRIES];
char led_name[32];
u8 led_state;
struct led_classdev led;
};
#define to_psu(x, y) container_of((x), struct ibm_cffps, debugfs_entries[(y)])
static ssize_t ibm_cffps_debugfs_read_input_history(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
{
int rc;
u8 cmd = CFFPS_INPUT_HISTORY_CMD;
struct ibm_cffps *psu = file->private_data;
struct i2c_msg msg[2] = {
{
.addr = psu->client->addr,
.flags = psu->client->flags,
.len = 1,
.buf = &cmd,
}, {
.addr = psu->client->addr,
.flags = psu->client->flags | I2C_M_RD,
.len = CFFPS_INPUT_HISTORY_SIZE,
.buf = psu->input_history,
},
};
if (!*ppos) {
rc = pmbus_lock_interruptible(psu->client);
if (rc)
return rc;
rc = pmbus_set_page(psu->client, 0, 0xff);
if (rc) {
pmbus_unlock(psu->client);
return rc;
}
/*
* Use a raw i2c transfer, since we need more bytes
* than Linux I2C supports through smbus xfr (only 32).
*/
rc = i2c_transfer(psu->client->adapter, msg, 2);
pmbus_unlock(psu->client);
if (rc < 0)
return rc;
}
return simple_read_from_buffer(buf, count, ppos,
psu->input_history + 1,
psu->input_history[0]);
}
static const struct file_operations ibm_cffps_input_history_fops = {
.llseek = noop_llseek,
.read = ibm_cffps_debugfs_read_input_history,
.open = simple_open,
};
static ssize_t ibm_cffps_debugfs_read(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
{
int i, rc;
int *idxp = file->private_data;
int idx = *idxp;
struct ibm_cffps *psu = to_psu(idxp, idx);
char data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
rc = pmbus_lock_interruptible(psu->client);
if (rc)
return rc;
rc = pmbus_set_page(psu->client, 0, 0xff);
if (rc)
goto unlock;
switch (idx) {
case CFFPS_DEBUGFS_MAX_POWER_OUT:
if (psu->version == cffps1)
rc = i2c_smbus_read_word_swapped(psu->client, PMBUS_MFR_POUT_MAX);
else
rc = i2c_smbus_read_word_data(psu->client, PMBUS_MFR_POUT_MAX);
if (rc >= 0)
rc = snprintf(data, I2C_SMBUS_BLOCK_MAX, "%d", rc);
break;
case CFFPS_DEBUGFS_CCIN:
rc = i2c_smbus_read_word_swapped(psu->client, CFFPS_CCIN_CMD);
if (rc >= 0)
rc = snprintf(data, 5, "%04X", rc);
break;
case CFFPS_DEBUGFS_FW:
switch (psu->version) {
case cffps1:
for (i = 0; i < CFFPS1_FW_NUM_BYTES; ++i) {
rc = i2c_smbus_read_byte_data(psu->client, CFFPS_FW_CMD + i);
if (rc < 0)
goto unlock;
snprintf(&data[i * 2], 3, "%02X", rc);
}
rc = i * 2;
break;
case cffps2:
for (i = 0; i < CFFPS2_FW_NUM_WORDS; ++i) {
rc = i2c_smbus_read_word_data(psu->client, CFFPS_FW_CMD + i);
if (rc < 0)
goto unlock;
snprintf(&data[i * 4], 5, "%04X", rc);
}
rc = i * 4;
break;
default:
rc = -EOPNOTSUPP;
break;
}
break;
case CFFPS_DEBUGFS_ON_OFF_CONFIG:
rc = i2c_smbus_read_byte_data(psu->client, PMBUS_ON_OFF_CONFIG);
if (rc >= 0)
rc = snprintf(data, 3, "%02x", rc);
break;
default:
rc = -EINVAL;
break;
}
unlock:
pmbus_unlock(psu->client);
if (rc < 0)
return rc;
data[rc] = '\n';
rc += 2;
return simple_read_from_buffer(buf, count, ppos, data, rc);
}
static ssize_t ibm_cffps_debugfs_write(struct file *file,
const char __user *buf, size_t count,
loff_t *ppos)
{
u8 data;
ssize_t rc;
int *idxp = file->private_data;
int idx = *idxp;
struct ibm_cffps *psu = to_psu(idxp, idx);
switch (idx) {
case CFFPS_DEBUGFS_ON_OFF_CONFIG:
rc = simple_write_to_buffer(&data, 1, ppos, buf, count);
if (rc <= 0)
return rc;
rc = pmbus_lock_interruptible(psu->client);
if (rc)
return rc;
rc = pmbus_set_page(psu->client, 0, 0xff);
if (rc) {
pmbus_unlock(psu->client);
return rc;
}
rc = i2c_smbus_write_byte_data(psu->client, PMBUS_ON_OFF_CONFIG, data);
pmbus_unlock(psu->client);
if (rc)
return rc;
rc = 1;
break;
default:
return -EINVAL;
}
return rc;
}
static const struct file_operations ibm_cffps_fops = {
.llseek = noop_llseek,
.read = ibm_cffps_debugfs_read,
.write = ibm_cffps_debugfs_write,
.open = simple_open,
};
static int ibm_cffps_read_byte_data(struct i2c_client *client, int page,
int reg)
{
int rc, mfr;
switch (reg) {
case PMBUS_STATUS_VOUT:
case PMBUS_STATUS_IOUT:
case PMBUS_STATUS_TEMPERATURE:
case PMBUS_STATUS_FAN_12:
rc = pmbus_read_byte_data(client, page, reg);
if (rc < 0)
return rc;
mfr = pmbus_read_byte_data(client, page,
PMBUS_STATUS_MFR_SPECIFIC);
if (mfr < 0)
/*
* Return the status register instead of an error,
* since we successfully read status.
*/
return rc;
/* Add MFR_SPECIFIC bits to the standard pmbus status regs. */
if (reg == PMBUS_STATUS_FAN_12) {
if (mfr & CFFPS_MFR_FAN_FAULT)
rc |= PB_FAN_FAN1_FAULT;
} else if (reg == PMBUS_STATUS_TEMPERATURE) {
if (mfr & CFFPS_MFR_THERMAL_FAULT)
rc |= PB_TEMP_OT_FAULT;
} else if (reg == PMBUS_STATUS_VOUT) {
if (mfr & (CFFPS_MFR_OV_FAULT | CFFPS_MFR_VAUX_FAULT))
rc |= PB_VOLTAGE_OV_FAULT;
if (mfr & CFFPS_MFR_UV_FAULT)
rc |= PB_VOLTAGE_UV_FAULT;
} else if (reg == PMBUS_STATUS_IOUT) {
if (mfr & CFFPS_MFR_OC_FAULT)
rc |= PB_IOUT_OC_FAULT;
if (mfr & CFFPS_MFR_CURRENT_SHARE_WARNING)
rc |= PB_CURRENT_SHARE_FAULT;
}
break;
default:
rc = -ENODATA;
break;
}
return rc;
}
static int ibm_cffps_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int rc, mfr;
switch (reg) {
case PMBUS_STATUS_WORD:
rc = pmbus_read_word_data(client, page, phase, reg);
if (rc < 0)
return rc;
mfr = pmbus_read_byte_data(client, page,
PMBUS_STATUS_MFR_SPECIFIC);
if (mfr < 0)
/*
* Return the status register instead of an error,
* since we successfully read status.
*/
return rc;
if (mfr & CFFPS_MFR_PS_KILL)
rc |= PB_STATUS_OFF;
break;
case PMBUS_VIRT_READ_VMON:
rc = pmbus_read_word_data(client, page, phase,
CFFPS_12VCS_VOUT_CMD);
break;
default:
rc = -ENODATA;
break;
}
return rc;
}
static int ibm_cffps_led_brightness_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
int rc;
u8 next_led_state;
struct ibm_cffps *psu = container_of(led_cdev, struct ibm_cffps, led);
if (brightness == LED_OFF) {
next_led_state = CFFPS_LED_OFF;
} else {
brightness = LED_FULL;
if (psu->led_state != CFFPS_LED_BLINK)
next_led_state = CFFPS_LED_ON;
else
next_led_state = CFFPS_LED_BLINK;
}
dev_dbg(&psu->client->dev, "LED brightness set: %d. Command: %d.\n",
brightness, next_led_state);
rc = pmbus_lock_interruptible(psu->client);
if (rc)
return rc;
rc = pmbus_set_page(psu->client, 0, 0xff);
if (rc) {
pmbus_unlock(psu->client);
return rc;
}
rc = i2c_smbus_write_byte_data(psu->client, CFFPS_SYS_CONFIG_CMD,
next_led_state);
pmbus_unlock(psu->client);
if (rc < 0)
return rc;
psu->led_state = next_led_state;
led_cdev->brightness = brightness;
return 0;
}
static int ibm_cffps_led_blink_set(struct led_classdev *led_cdev,
unsigned long *delay_on,
unsigned long *delay_off)
{
int rc;
struct ibm_cffps *psu = container_of(led_cdev, struct ibm_cffps, led);
dev_dbg(&psu->client->dev, "LED blink set.\n");
rc = pmbus_lock_interruptible(psu->client);
if (rc)
return rc;
rc = pmbus_set_page(psu->client, 0, 0xff);
if (rc) {
pmbus_unlock(psu->client);
return rc;
}
rc = i2c_smbus_write_byte_data(psu->client, CFFPS_SYS_CONFIG_CMD,
CFFPS_LED_BLINK);
pmbus_unlock(psu->client);
if (rc < 0)
return rc;
psu->led_state = CFFPS_LED_BLINK;
led_cdev->brightness = LED_FULL;
*delay_on = CFFPS_BLINK_RATE_MS;
*delay_off = CFFPS_BLINK_RATE_MS;
return 0;
}
static void ibm_cffps_create_led_class(struct ibm_cffps *psu)
{
int rc;
struct i2c_client *client = psu->client;
struct device *dev = &client->dev;
snprintf(psu->led_name, sizeof(psu->led_name), "%s-%02x", client->name,
client->addr);
psu->led.name = psu->led_name;
psu->led.max_brightness = LED_FULL;
psu->led.brightness_set_blocking = ibm_cffps_led_brightness_set;
psu->led.blink_set = ibm_cffps_led_blink_set;
rc = devm_led_classdev_register(dev, &psu->led);
if (rc)
dev_warn(dev, "failed to register led class: %d\n", rc);
else
i2c_smbus_write_byte_data(client, CFFPS_SYS_CONFIG_CMD,
CFFPS_LED_OFF);
}
static struct pmbus_driver_info ibm_cffps_info[] = {
[cffps1] = {
.pages = 1,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_FAN12 | PMBUS_HAVE_TEMP |
PMBUS_HAVE_TEMP2 | PMBUS_HAVE_TEMP3 |
PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_FAN12,
.read_byte_data = ibm_cffps_read_byte_data,
.read_word_data = ibm_cffps_read_word_data,
},
[cffps2] = {
.pages = 2,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_FAN12 | PMBUS_HAVE_TEMP |
PMBUS_HAVE_TEMP2 | PMBUS_HAVE_TEMP3 |
PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_FAN12 | PMBUS_HAVE_VMON,
.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 |
PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_STATUS_TEMP,
.read_byte_data = ibm_cffps_read_byte_data,
.read_word_data = ibm_cffps_read_word_data,
},
};
static struct pmbus_platform_data ibm_cffps_pdata = {
.flags = PMBUS_SKIP_STATUS_CHECK | PMBUS_NO_CAPABILITY,
};
static const struct i2c_device_id ibm_cffps_id[] = {
{ "ibm_cffps1", cffps1 },
{ "ibm_cffps2", cffps2 },
{ "ibm_cffps", cffps_unknown },
{}
};
MODULE_DEVICE_TABLE(i2c, ibm_cffps_id);
static int ibm_cffps_probe(struct i2c_client *client)
{
int i, rc;
enum versions vs = cffps_unknown;
struct dentry *debugfs;
struct ibm_cffps *psu;
const void *md = of_device_get_match_data(&client->dev);
const struct i2c_device_id *id;
if (md) {
vs = (uintptr_t)md;
} else {
id = i2c_match_id(ibm_cffps_id, client);
if (id)
vs = (enum versions)id->driver_data;
}
if (vs == cffps_unknown) {
u16 ccin_revision = 0;
u16 ccin_version = CFFPS_CCIN_VERSION_1;
int ccin = i2c_smbus_read_word_swapped(client, CFFPS_CCIN_CMD);
char mfg_id[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
if (ccin > 0) {
ccin_revision = FIELD_GET(CFFPS_CCIN_REVISION, ccin);
ccin_version = FIELD_GET(CFFPS_CCIN_VERSION, ccin);
}
rc = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, mfg_id);
if (rc < 0) {
dev_err(&client->dev, "Failed to read Manufacturer ID\n");
return rc;
}
switch (ccin_version) {
default:
case CFFPS_CCIN_VERSION_1:
if ((strncmp(mfg_id, "ACBE", 4) == 0) ||
(strncmp(mfg_id, "ARTE", 4) == 0))
vs = cffps1;
else
vs = cffps2;
break;
case CFFPS_CCIN_VERSION_2:
vs = cffps2;
break;
case CFFPS_CCIN_VERSION_3:
if (ccin_revision == CFFPS_CCIN_REVISION_LEGACY)
vs = cffps1;
else
vs = cffps2;
break;
}
/* Set the client name to include the version number. */
snprintf(client->name, I2C_NAME_SIZE, "cffps%d", vs + 1);
}
client->dev.platform_data = &ibm_cffps_pdata;
rc = pmbus_do_probe(client, &ibm_cffps_info[vs]);
if (rc)
return rc;
/*
* Don't fail the probe if there isn't enough memory for leds and
* debugfs.
*/
psu = devm_kzalloc(&client->dev, sizeof(*psu), GFP_KERNEL);
if (!psu)
return 0;
psu->version = vs;
psu->client = client;
ibm_cffps_create_led_class(psu);
/* Don't fail the probe if we can't create debugfs */
debugfs = pmbus_get_debugfs_dir(client);
if (!debugfs)
return 0;
for (i = 0; i < CFFPS_DEBUGFS_NUM_ENTRIES; ++i)
psu->debugfs_entries[i] = i;
debugfs_create_file("input_history", 0444, debugfs, psu, &ibm_cffps_input_history_fops);
debugfs_create_file("max_power_out", 0444, debugfs,
&psu->debugfs_entries[CFFPS_DEBUGFS_MAX_POWER_OUT],
&ibm_cffps_fops);
debugfs_create_file("ccin", 0444, debugfs,
&psu->debugfs_entries[CFFPS_DEBUGFS_CCIN],
&ibm_cffps_fops);
debugfs_create_file("fw_version", 0444, debugfs,
&psu->debugfs_entries[CFFPS_DEBUGFS_FW],
&ibm_cffps_fops);
debugfs_create_file("on_off_config", 0644, debugfs,
&psu->debugfs_entries[CFFPS_DEBUGFS_ON_OFF_CONFIG],
&ibm_cffps_fops);
/* For compatibility with users of the old naming scheme. */
debugfs_create_symlink(client->name, debugfs, ".");
return 0;
}
static const struct of_device_id ibm_cffps_of_match[] = {
{
.compatible = "ibm,cffps1",
.data = (void *)cffps1
},
{
.compatible = "ibm,cffps2",
.data = (void *)cffps2
},
{
.compatible = "ibm,cffps",
.data = (void *)cffps_unknown
},
{}
};
MODULE_DEVICE_TABLE(of, ibm_cffps_of_match);
static struct i2c_driver ibm_cffps_driver = {
.driver = {
.name = "ibm-cffps",
.of_match_table = ibm_cffps_of_match,
},
.probe = ibm_cffps_probe,
.id_table = ibm_cffps_id,
};
module_i2c_driver(ibm_cffps_driver);
MODULE_AUTHOR("Eddie James");
MODULE_DESCRIPTION("PMBus driver for IBM Common Form Factor power supplies");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/ibm-cffps.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for Infineon IR38064
*
* Copyright (c) 2017 Google Inc
*
* VOUT_MODE is not supported by the device. The driver fakes VOUT linear16
* mode with exponent value -8 as direct mode with m=256/b=0/R=0.
*
* The device supports VOUT_PEAK, IOUT_PEAK, and TEMPERATURE_PEAK, however
* this driver does not currently support them.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regulator/driver.h>
#include "pmbus.h"
#if IS_ENABLED(CONFIG_SENSORS_IR38064_REGULATOR)
static const struct regulator_desc ir38064_reg_desc[] = {
PMBUS_REGULATOR("vout", 0),
};
#endif /* CONFIG_SENSORS_IR38064_REGULATOR */
static struct pmbus_driver_info ir38064_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.format[PSC_TEMPERATURE] = linear,
.m[PSC_VOLTAGE_OUT] = 256,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 0,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT,
#if IS_ENABLED(CONFIG_SENSORS_IR38064_REGULATOR)
.num_regulators = 1,
.reg_desc = ir38064_reg_desc,
#endif
};
static int ir38064_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &ir38064_info);
}
static const struct i2c_device_id ir38064_id[] = {
{"ir38060", 0},
{"ir38064", 0},
{"ir38164", 0},
{"ir38263", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, ir38064_id);
static const struct of_device_id __maybe_unused ir38064_of_match[] = {
{ .compatible = "infineon,ir38060" },
{ .compatible = "infineon,ir38064" },
{ .compatible = "infineon,ir38164" },
{ .compatible = "infineon,ir38263" },
{}
};
MODULE_DEVICE_TABLE(of, ir38064_of_match);
/* This is the driver that will be inserted */
static struct i2c_driver ir38064_driver = {
.driver = {
.name = "ir38064",
.of_match_table = of_match_ptr(ir38064_of_match),
},
.probe = ir38064_probe,
.id_table = ir38064_id,
};
module_i2c_driver(ir38064_driver);
MODULE_AUTHOR("Maxim Sloyko <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Infineon IR38064 and compatible chips");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/ir38064.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for Analog Devices LT7182S
*
* Copyright (c) 2022 Guenter Roeck
*
*/
#include <linux/bits.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include "pmbus.h"
#define LT7182S_NUM_PAGES 2
#define MFR_READ_EXTVCC 0xcd
#define MFR_READ_ITH 0xce
#define MFR_CONFIG_ALL_LT7182S 0xd1
#define MFR_IOUT_PEAK 0xd7
#define MFR_ADC_CONTROL_LT7182S 0xd8
#define MFR_DEBUG_TELEMETRY BIT(0)
#define MFR_VOUT_PEAK 0xdd
#define MFR_VIN_PEAK 0xde
#define MFR_TEMPERATURE_1_PEAK 0xdf
#define MFR_CLEAR_PEAKS 0xe3
#define MFR_CONFIG_IEEE BIT(8)
static int lt7182s_read_word_data(struct i2c_client *client, int page, int phase, int reg)
{
int ret;
switch (reg) {
case PMBUS_VIRT_READ_VMON:
if (page == 0 || page == 1)
ret = pmbus_read_word_data(client, page, phase, MFR_READ_ITH);
else
ret = pmbus_read_word_data(client, 0, phase, MFR_READ_EXTVCC);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
ret = pmbus_read_word_data(client, page, phase, MFR_IOUT_PEAK);
break;
case PMBUS_VIRT_READ_VOUT_MAX:
ret = pmbus_read_word_data(client, page, phase, MFR_VOUT_PEAK);
break;
case PMBUS_VIRT_READ_VIN_MAX:
ret = pmbus_read_word_data(client, page, phase, MFR_VIN_PEAK);
break;
case PMBUS_VIRT_READ_TEMP_MAX:
ret = pmbus_read_word_data(client, page, phase, MFR_TEMPERATURE_1_PEAK);
break;
case PMBUS_VIRT_RESET_VIN_HISTORY:
ret = (page == 0) ? 0 : -ENODATA;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int lt7182s_write_word_data(struct i2c_client *client, int page, int reg, u16 word)
{
int ret;
switch (reg) {
case PMBUS_VIRT_RESET_VIN_HISTORY:
ret = pmbus_write_byte(client, 0, MFR_CLEAR_PEAKS);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static struct pmbus_driver_info lt7182s_info = {
.pages = LT7182S_NUM_PAGES,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_POWER] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_POUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP,
.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_POUT |
PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_STATUS_INPUT,
.read_word_data = lt7182s_read_word_data,
.write_word_data = lt7182s_write_word_data,
};
static int lt7182s_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct pmbus_driver_info *info;
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA |
I2C_FUNC_SMBUS_READ_WORD_DATA |
I2C_FUNC_SMBUS_READ_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
if (ret < 0) {
dev_err(dev, "Failed to read PMBUS_MFR_ID\n");
return ret;
}
if (ret != 3 || strncmp(buf, "ADI", 3)) {
buf[ret] = '\0';
dev_err(dev, "Manufacturer '%s' not supported\n", buf);
return -ENODEV;
}
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (ret < 0) {
dev_err(dev, "Failed to read PMBUS_MFR_MODEL\n");
return ret;
}
if (ret != 7 || strncmp(buf, "LT7182S", 7)) {
buf[ret] = '\0';
dev_err(dev, "Model '%s' not supported\n", buf);
return -ENODEV;
}
info = devm_kmemdup(dev, <7182s_info,
sizeof(struct pmbus_driver_info), GFP_KERNEL);
if (!info)
return -ENOMEM;
/* Set data format to IEEE754 if configured */
ret = i2c_smbus_read_word_data(client, MFR_CONFIG_ALL_LT7182S);
if (ret < 0)
return ret;
if (ret & MFR_CONFIG_IEEE) {
info->format[PSC_VOLTAGE_IN] = ieee754;
info->format[PSC_VOLTAGE_OUT] = ieee754;
info->format[PSC_CURRENT_IN] = ieee754;
info->format[PSC_CURRENT_OUT] = ieee754;
info->format[PSC_TEMPERATURE] = ieee754;
info->format[PSC_POWER] = ieee754;
}
/* Enable VMON output if configured */
ret = i2c_smbus_read_byte_data(client, MFR_ADC_CONTROL_LT7182S);
if (ret < 0)
return ret;
if (ret & MFR_DEBUG_TELEMETRY) {
info->pages = 3;
info->func[0] |= PMBUS_HAVE_VMON;
info->func[1] |= PMBUS_HAVE_VMON;
info->func[2] = PMBUS_HAVE_VMON;
}
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id lt7182s_id[] = {
{ "lt7182s", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, lt7182s_id);
static const struct of_device_id __maybe_unused lt7182s_of_match[] = {
{ .compatible = "adi,lt7182s" },
{}
};
static struct i2c_driver lt7182s_driver = {
.driver = {
.name = "lt7182s",
.of_match_table = of_match_ptr(lt7182s_of_match),
},
.probe = lt7182s_probe,
.id_table = lt7182s_id,
};
module_i2c_driver(lt7182s_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Analog Devices LT7182S");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/lt7182s.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for LTC2978 and compatible chips.
*
* Copyright (c) 2011 Ericsson AB.
* Copyright (c) 2013, 2014, 2015 Guenter Roeck
* Copyright (c) 2015 Linear Technology
* Copyright (c) 2018 Analog Devices Inc.
*/
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/regulator/driver.h>
#include "pmbus.h"
enum chips {
/* Managers */
ltc2972, ltc2974, ltc2975, ltc2977, ltc2978, ltc2979, ltc2980,
/* Controllers */
ltc3880, ltc3882, ltc3883, ltc3884, ltc3886, ltc3887, ltc3889, ltc7132, ltc7880,
/* Modules */
ltm2987, ltm4664, ltm4675, ltm4676, ltm4677, ltm4678, ltm4680, ltm4686,
ltm4700,
};
/* Common for all chips */
#define LTC2978_MFR_VOUT_PEAK 0xdd
#define LTC2978_MFR_VIN_PEAK 0xde
#define LTC2978_MFR_TEMPERATURE_PEAK 0xdf
#define LTC2978_MFR_SPECIAL_ID 0xe7 /* Undocumented on LTC3882 */
#define LTC2978_MFR_COMMON 0xef
/* LTC2974, LTC2975, LCT2977, LTC2980, LTC2978, and LTM2987 */
#define LTC2978_MFR_VOUT_MIN 0xfb
#define LTC2978_MFR_VIN_MIN 0xfc
#define LTC2978_MFR_TEMPERATURE_MIN 0xfd
/* LTC2974, LTC2975 */
#define LTC2974_MFR_IOUT_PEAK 0xd7
#define LTC2974_MFR_IOUT_MIN 0xd8
/* LTC3880, LTC3882, LTC3883, LTC3887, LTM4675, LTM4676, LTC7132 */
#define LTC3880_MFR_IOUT_PEAK 0xd7
#define LTC3880_MFR_CLEAR_PEAKS 0xe3
#define LTC3880_MFR_TEMPERATURE2_PEAK 0xf4
/* LTC3883, LTC3884, LTC3886, LTC3889, LTC7132, LTC7880 */
#define LTC3883_MFR_IIN_PEAK 0xe1
/* LTC2975 only */
#define LTC2975_MFR_IIN_PEAK 0xc4
#define LTC2975_MFR_IIN_MIN 0xc5
#define LTC2975_MFR_PIN_PEAK 0xc6
#define LTC2975_MFR_PIN_MIN 0xc7
#define LTC2978_ID_MASK 0xfff0
#define LTC2972_ID 0x0310
#define LTC2974_ID 0x0210
#define LTC2975_ID 0x0220
#define LTC2977_ID 0x0130
#define LTC2978_ID_REV1 0x0110 /* Early revision */
#define LTC2978_ID_REV2 0x0120
#define LTC2979_ID_A 0x8060
#define LTC2979_ID_B 0x8070
#define LTC2980_ID_A 0x8030 /* A/B for two die IDs */
#define LTC2980_ID_B 0x8040
#define LTC3880_ID 0x4020
#define LTC3882_ID 0x4200
#define LTC3882_ID_D1 0x4240 /* Dash 1 */
#define LTC3883_ID 0x4300
#define LTC3884_ID 0x4C00
#define LTC3886_ID 0x4600
#define LTC3887_ID 0x4700
#define LTC3889_ID 0x4900
#define LTC7132_ID 0x4CE0
#define LTC7880_ID 0x49E0
#define LTM2987_ID_A 0x8010 /* A/B for two die IDs */
#define LTM2987_ID_B 0x8020
#define LTM4664_ID 0x4120
#define LTM4675_ID 0x47a0
#define LTM4676_ID_REV1 0x4400
#define LTM4676_ID_REV2 0x4480
#define LTM4676A_ID 0x47e0
#define LTM4677_ID_REV1 0x47B0
#define LTM4677_ID_REV2 0x47D0
#define LTM4678_ID_REV1 0x4100
#define LTM4678_ID_REV2 0x4110
#define LTM4680_ID 0x4140
#define LTM4686_ID 0x4770
#define LTM4700_ID 0x4130
#define LTC2972_NUM_PAGES 2
#define LTC2974_NUM_PAGES 4
#define LTC2978_NUM_PAGES 8
#define LTC3880_NUM_PAGES 2
#define LTC3883_NUM_PAGES 1
#define LTC_POLL_TIMEOUT 100 /* in milli-seconds */
#define LTC_NOT_BUSY BIT(6)
#define LTC_NOT_PENDING BIT(5)
/*
* LTC2978 clears peak data whenever the CLEAR_FAULTS command is executed, which
* happens pretty much each time chip data is updated. Raw peak data therefore
* does not provide much value. To be able to provide useful peak data, keep an
* internal cache of measured peak data, which is only cleared if an explicit
* "clear peak" command is executed for the sensor in question.
*/
struct ltc2978_data {
enum chips id;
u16 vin_min, vin_max;
u16 temp_min[LTC2974_NUM_PAGES], temp_max[LTC2974_NUM_PAGES];
u16 vout_min[LTC2978_NUM_PAGES], vout_max[LTC2978_NUM_PAGES];
u16 iout_min[LTC2974_NUM_PAGES], iout_max[LTC2974_NUM_PAGES];
u16 iin_min, iin_max;
u16 pin_min, pin_max;
u16 temp2_max;
struct pmbus_driver_info info;
u32 features;
};
#define to_ltc2978_data(x) container_of(x, struct ltc2978_data, info)
#define FEAT_CLEAR_PEAKS BIT(0)
#define FEAT_NEEDS_POLLING BIT(1)
#define has_clear_peaks(d) ((d)->features & FEAT_CLEAR_PEAKS)
#define needs_polling(d) ((d)->features & FEAT_NEEDS_POLLING)
static int ltc_wait_ready(struct i2c_client *client)
{
unsigned long timeout = jiffies + msecs_to_jiffies(LTC_POLL_TIMEOUT);
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int status;
u8 mask;
if (!needs_polling(data))
return 0;
/*
* LTC3883 does not support LTC_NOT_PENDING, even though
* the datasheet claims that it does.
*/
mask = LTC_NOT_BUSY;
if (data->id != ltc3883)
mask |= LTC_NOT_PENDING;
do {
status = pmbus_read_byte_data(client, 0, LTC2978_MFR_COMMON);
if (status == -EBADMSG || status == -ENXIO) {
/* PEC error or NACK: chip may be busy, try again */
usleep_range(50, 100);
continue;
}
if (status < 0)
return status;
if ((status & mask) == mask)
return 0;
usleep_range(50, 100);
} while (time_before(jiffies, timeout));
return -ETIMEDOUT;
}
static int ltc_read_word_data(struct i2c_client *client, int page, int phase,
int reg)
{
int ret;
ret = ltc_wait_ready(client);
if (ret < 0)
return ret;
return pmbus_read_word_data(client, page, 0xff, reg);
}
static int ltc_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret;
ret = ltc_wait_ready(client);
if (ret < 0)
return ret;
return pmbus_read_byte_data(client, page, reg);
}
static int ltc_write_byte_data(struct i2c_client *client, int page, int reg, u8 value)
{
int ret;
ret = ltc_wait_ready(client);
if (ret < 0)
return ret;
return pmbus_write_byte_data(client, page, reg, value);
}
static int ltc_write_byte(struct i2c_client *client, int page, u8 byte)
{
int ret;
ret = ltc_wait_ready(client);
if (ret < 0)
return ret;
return pmbus_write_byte(client, page, byte);
}
static inline int lin11_to_val(int data)
{
s16 e = ((s16)data) >> 11;
s32 m = (((s16)(data << 5)) >> 5);
/*
* mantissa is 10 bit + sign, exponent adds up to 15 bit.
* Add 6 bit to exponent for maximum accuracy (10 + 15 + 6 = 31).
*/
e += 6;
return (e < 0 ? m >> -e : m << e);
}
static int ltc_get_max(struct ltc2978_data *data, struct i2c_client *client,
int page, int reg, u16 *pmax)
{
int ret;
ret = ltc_read_word_data(client, page, 0xff, reg);
if (ret >= 0) {
if (lin11_to_val(ret) > lin11_to_val(*pmax))
*pmax = ret;
ret = *pmax;
}
return ret;
}
static int ltc_get_min(struct ltc2978_data *data, struct i2c_client *client,
int page, int reg, u16 *pmin)
{
int ret;
ret = ltc_read_word_data(client, page, 0xff, reg);
if (ret >= 0) {
if (lin11_to_val(ret) < lin11_to_val(*pmin))
*pmin = ret;
ret = *pmin;
}
return ret;
}
static int ltc2978_read_word_data_common(struct i2c_client *client, int page,
int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_READ_VIN_MAX:
ret = ltc_get_max(data, client, page, LTC2978_MFR_VIN_PEAK,
&data->vin_max);
break;
case PMBUS_VIRT_READ_VOUT_MAX:
ret = ltc_read_word_data(client, page, 0xff,
LTC2978_MFR_VOUT_PEAK);
if (ret >= 0) {
/*
* VOUT is 16 bit unsigned with fixed exponent,
* so we can compare it directly
*/
if (ret > data->vout_max[page])
data->vout_max[page] = ret;
ret = data->vout_max[page];
}
break;
case PMBUS_VIRT_READ_TEMP_MAX:
ret = ltc_get_max(data, client, page,
LTC2978_MFR_TEMPERATURE_PEAK,
&data->temp_max[page]);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
case PMBUS_VIRT_RESET_VIN_HISTORY:
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = 0;
break;
default:
ret = ltc_wait_ready(client);
if (ret < 0)
return ret;
ret = -ENODATA;
break;
}
return ret;
}
static int ltc2978_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_READ_VIN_MIN:
ret = ltc_get_min(data, client, page, LTC2978_MFR_VIN_MIN,
&data->vin_min);
break;
case PMBUS_VIRT_READ_VOUT_MIN:
ret = ltc_read_word_data(client, page, phase,
LTC2978_MFR_VOUT_MIN);
if (ret >= 0) {
/*
* VOUT_MIN is known to not be supported on some lots
* of LTC2978 revision 1, and will return the maximum
* possible voltage if read. If VOUT_MAX is valid and
* lower than the reading of VOUT_MIN, use it instead.
*/
if (data->vout_max[page] && ret > data->vout_max[page])
ret = data->vout_max[page];
if (ret < data->vout_min[page])
data->vout_min[page] = ret;
ret = data->vout_min[page];
}
break;
case PMBUS_VIRT_READ_TEMP_MIN:
ret = ltc_get_min(data, client, page,
LTC2978_MFR_TEMPERATURE_MIN,
&data->temp_min[page]);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
case PMBUS_VIRT_RESET_IOUT_HISTORY:
case PMBUS_VIRT_READ_TEMP2_MAX:
case PMBUS_VIRT_RESET_TEMP2_HISTORY:
ret = -ENXIO;
break;
default:
ret = ltc2978_read_word_data_common(client, page, reg);
break;
}
return ret;
}
static int ltc2974_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_READ_IOUT_MAX:
ret = ltc_get_max(data, client, page, LTC2974_MFR_IOUT_PEAK,
&data->iout_max[page]);
break;
case PMBUS_VIRT_READ_IOUT_MIN:
ret = ltc_get_min(data, client, page, LTC2974_MFR_IOUT_MIN,
&data->iout_min[page]);
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
ret = 0;
break;
default:
ret = ltc2978_read_word_data(client, page, phase, reg);
break;
}
return ret;
}
static int ltc2975_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_READ_IIN_MAX:
ret = ltc_get_max(data, client, page, LTC2975_MFR_IIN_PEAK,
&data->iin_max);
break;
case PMBUS_VIRT_READ_IIN_MIN:
ret = ltc_get_min(data, client, page, LTC2975_MFR_IIN_MIN,
&data->iin_min);
break;
case PMBUS_VIRT_READ_PIN_MAX:
ret = ltc_get_max(data, client, page, LTC2975_MFR_PIN_PEAK,
&data->pin_max);
break;
case PMBUS_VIRT_READ_PIN_MIN:
ret = ltc_get_min(data, client, page, LTC2975_MFR_PIN_MIN,
&data->pin_min);
break;
case PMBUS_VIRT_RESET_IIN_HISTORY:
case PMBUS_VIRT_RESET_PIN_HISTORY:
ret = 0;
break;
default:
ret = ltc2978_read_word_data(client, page, phase, reg);
break;
}
return ret;
}
static int ltc3880_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_READ_IOUT_MAX:
ret = ltc_get_max(data, client, page, LTC3880_MFR_IOUT_PEAK,
&data->iout_max[page]);
break;
case PMBUS_VIRT_READ_TEMP2_MAX:
ret = ltc_get_max(data, client, page,
LTC3880_MFR_TEMPERATURE2_PEAK,
&data->temp2_max);
break;
case PMBUS_VIRT_READ_VIN_MIN:
case PMBUS_VIRT_READ_VOUT_MIN:
case PMBUS_VIRT_READ_TEMP_MIN:
ret = -ENXIO;
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
case PMBUS_VIRT_RESET_TEMP2_HISTORY:
ret = 0;
break;
default:
ret = ltc2978_read_word_data_common(client, page, reg);
break;
}
return ret;
}
static int ltc3883_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_READ_IIN_MAX:
ret = ltc_get_max(data, client, page, LTC3883_MFR_IIN_PEAK,
&data->iin_max);
break;
case PMBUS_VIRT_RESET_IIN_HISTORY:
ret = 0;
break;
default:
ret = ltc3880_read_word_data(client, page, phase, reg);
break;
}
return ret;
}
static int ltc2978_clear_peaks(struct ltc2978_data *data,
struct i2c_client *client, int page)
{
int ret;
if (has_clear_peaks(data))
ret = ltc_write_byte(client, 0, LTC3880_MFR_CLEAR_PEAKS);
else
ret = ltc_write_byte(client, page, PMBUS_CLEAR_FAULTS);
return ret;
}
static int ltc2978_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ltc2978_data *data = to_ltc2978_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_RESET_IIN_HISTORY:
data->iin_max = 0x7c00;
data->iin_min = 0x7bff;
ret = ltc2978_clear_peaks(data, client, 0);
break;
case PMBUS_VIRT_RESET_PIN_HISTORY:
data->pin_max = 0x7c00;
data->pin_min = 0x7bff;
ret = ltc2978_clear_peaks(data, client, 0);
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
data->iout_max[page] = 0x7c00;
data->iout_min[page] = 0xfbff;
ret = ltc2978_clear_peaks(data, client, page);
break;
case PMBUS_VIRT_RESET_TEMP2_HISTORY:
data->temp2_max = 0x7c00;
ret = ltc2978_clear_peaks(data, client, page);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
data->vout_min[page] = 0xffff;
data->vout_max[page] = 0;
ret = ltc2978_clear_peaks(data, client, page);
break;
case PMBUS_VIRT_RESET_VIN_HISTORY:
data->vin_min = 0x7bff;
data->vin_max = 0x7c00;
ret = ltc2978_clear_peaks(data, client, page);
break;
case PMBUS_VIRT_RESET_TEMP_HISTORY:
data->temp_min[page] = 0x7bff;
data->temp_max[page] = 0x7c00;
ret = ltc2978_clear_peaks(data, client, page);
break;
default:
ret = ltc_wait_ready(client);
if (ret < 0)
return ret;
ret = -ENODATA;
break;
}
return ret;
}
static const struct i2c_device_id ltc2978_id[] = {
{"ltc2972", ltc2972},
{"ltc2974", ltc2974},
{"ltc2975", ltc2975},
{"ltc2977", ltc2977},
{"ltc2978", ltc2978},
{"ltc2979", ltc2979},
{"ltc2980", ltc2980},
{"ltc3880", ltc3880},
{"ltc3882", ltc3882},
{"ltc3883", ltc3883},
{"ltc3884", ltc3884},
{"ltc3886", ltc3886},
{"ltc3887", ltc3887},
{"ltc3889", ltc3889},
{"ltc7132", ltc7132},
{"ltc7880", ltc7880},
{"ltm2987", ltm2987},
{"ltm4664", ltm4664},
{"ltm4675", ltm4675},
{"ltm4676", ltm4676},
{"ltm4677", ltm4677},
{"ltm4678", ltm4678},
{"ltm4680", ltm4680},
{"ltm4686", ltm4686},
{"ltm4700", ltm4700},
{}
};
MODULE_DEVICE_TABLE(i2c, ltc2978_id);
#if IS_ENABLED(CONFIG_SENSORS_LTC2978_REGULATOR)
#define LTC2978_ADC_RES 0xFFFF
#define LTC2978_N_ADC 122
#define LTC2978_MAX_UV (LTC2978_ADC_RES * LTC2978_N_ADC)
#define LTC2978_UV_STEP 1000
#define LTC2978_N_VOLTAGES ((LTC2978_MAX_UV / LTC2978_UV_STEP) + 1)
static const struct regulator_desc ltc2978_reg_desc[] = {
PMBUS_REGULATOR_STEP("vout", 0, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
PMBUS_REGULATOR_STEP("vout", 1, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
PMBUS_REGULATOR_STEP("vout", 2, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
PMBUS_REGULATOR_STEP("vout", 3, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
PMBUS_REGULATOR_STEP("vout", 4, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
PMBUS_REGULATOR_STEP("vout", 5, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
PMBUS_REGULATOR_STEP("vout", 6, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
PMBUS_REGULATOR_STEP("vout", 7, LTC2978_N_VOLTAGES, LTC2978_UV_STEP, 0),
};
static const struct regulator_desc ltc2978_reg_desc_default[] = {
PMBUS_REGULATOR("vout", 0),
PMBUS_REGULATOR("vout", 1),
PMBUS_REGULATOR("vout", 2),
PMBUS_REGULATOR("vout", 3),
PMBUS_REGULATOR("vout", 4),
PMBUS_REGULATOR("vout", 5),
PMBUS_REGULATOR("vout", 6),
PMBUS_REGULATOR("vout", 7),
};
#endif /* CONFIG_SENSORS_LTC2978_REGULATOR */
static int ltc2978_get_id(struct i2c_client *client)
{
int chip_id;
chip_id = i2c_smbus_read_word_data(client, LTC2978_MFR_SPECIAL_ID);
if (chip_id < 0) {
const struct i2c_device_id *id;
u8 buf[I2C_SMBUS_BLOCK_MAX];
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
if (ret < 0)
return ret;
if (ret < 3 || strncmp(buf, "LTC", 3))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (ret < 0)
return ret;
for (id = <c2978_id[0]; strlen(id->name); id++) {
if (!strncasecmp(id->name, buf, strlen(id->name)))
return (int)id->driver_data;
}
return -ENODEV;
}
chip_id &= LTC2978_ID_MASK;
if (chip_id == LTC2972_ID)
return ltc2972;
else if (chip_id == LTC2974_ID)
return ltc2974;
else if (chip_id == LTC2975_ID)
return ltc2975;
else if (chip_id == LTC2977_ID)
return ltc2977;
else if (chip_id == LTC2978_ID_REV1 || chip_id == LTC2978_ID_REV2)
return ltc2978;
else if (chip_id == LTC2979_ID_A || chip_id == LTC2979_ID_B)
return ltc2979;
else if (chip_id == LTC2980_ID_A || chip_id == LTC2980_ID_B)
return ltc2980;
else if (chip_id == LTC3880_ID)
return ltc3880;
else if (chip_id == LTC3882_ID || chip_id == LTC3882_ID_D1)
return ltc3882;
else if (chip_id == LTC3883_ID)
return ltc3883;
else if (chip_id == LTC3884_ID)
return ltc3884;
else if (chip_id == LTC3886_ID)
return ltc3886;
else if (chip_id == LTC3887_ID)
return ltc3887;
else if (chip_id == LTC3889_ID)
return ltc3889;
else if (chip_id == LTC7132_ID)
return ltc7132;
else if (chip_id == LTC7880_ID)
return ltc7880;
else if (chip_id == LTM2987_ID_A || chip_id == LTM2987_ID_B)
return ltm2987;
else if (chip_id == LTM4664_ID)
return ltm4664;
else if (chip_id == LTM4675_ID)
return ltm4675;
else if (chip_id == LTM4676_ID_REV1 || chip_id == LTM4676_ID_REV2 ||
chip_id == LTM4676A_ID)
return ltm4676;
else if (chip_id == LTM4677_ID_REV1 || chip_id == LTM4677_ID_REV2)
return ltm4677;
else if (chip_id == LTM4678_ID_REV1 || chip_id == LTM4678_ID_REV2)
return ltm4678;
else if (chip_id == LTM4680_ID)
return ltm4680;
else if (chip_id == LTM4686_ID)
return ltm4686;
else if (chip_id == LTM4700_ID)
return ltm4700;
dev_err(&client->dev, "Unsupported chip ID 0x%x\n", chip_id);
return -ENODEV;
}
static int ltc2978_probe(struct i2c_client *client)
{
int i, chip_id;
struct ltc2978_data *data;
struct pmbus_driver_info *info;
const struct i2c_device_id *id;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_WORD_DATA))
return -ENODEV;
data = devm_kzalloc(&client->dev, sizeof(struct ltc2978_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
chip_id = ltc2978_get_id(client);
if (chip_id < 0)
return chip_id;
data->id = chip_id;
id = i2c_match_id(ltc2978_id, client);
if (data->id != id->driver_data)
dev_warn(&client->dev,
"Device mismatch: Configured %s (%d), detected %d\n",
id->name,
(int) id->driver_data,
chip_id);
info = &data->info;
info->write_word_data = ltc2978_write_word_data;
info->write_byte = ltc_write_byte;
info->write_byte_data = ltc_write_byte_data;
info->read_word_data = ltc_read_word_data;
info->read_byte_data = ltc_read_byte_data;
data->vin_min = 0x7bff;
data->vin_max = 0x7c00;
for (i = 0; i < ARRAY_SIZE(data->vout_min); i++)
data->vout_min[i] = 0xffff;
for (i = 0; i < ARRAY_SIZE(data->iout_min); i++)
data->iout_min[i] = 0xfbff;
for (i = 0; i < ARRAY_SIZE(data->iout_max); i++)
data->iout_max[i] = 0x7c00;
for (i = 0; i < ARRAY_SIZE(data->temp_min); i++)
data->temp_min[i] = 0x7bff;
for (i = 0; i < ARRAY_SIZE(data->temp_max); i++)
data->temp_max[i] = 0x7c00;
data->temp2_max = 0x7c00;
switch (data->id) {
case ltc2972:
info->read_word_data = ltc2975_read_word_data;
info->pages = LTC2972_NUM_PAGES;
info->func[0] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
| PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP2;
for (i = 0; i < info->pages; i++) {
info->func[i] |= PMBUS_HAVE_VOUT
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
}
break;
case ltc2974:
info->read_word_data = ltc2974_read_word_data;
info->pages = LTC2974_NUM_PAGES;
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP2;
for (i = 0; i < info->pages; i++) {
info->func[i] |= PMBUS_HAVE_VOUT
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
}
break;
case ltc2975:
info->read_word_data = ltc2975_read_word_data;
info->pages = LTC2974_NUM_PAGES;
info->func[0] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
| PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP2;
for (i = 0; i < info->pages; i++) {
info->func[i] |= PMBUS_HAVE_VOUT
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
}
break;
case ltc2977:
case ltc2978:
case ltc2979:
case ltc2980:
case ltm2987:
info->read_word_data = ltc2978_read_word_data;
info->pages = LTC2978_NUM_PAGES;
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
for (i = 1; i < LTC2978_NUM_PAGES; i++) {
info->func[i] = PMBUS_HAVE_VOUT
| PMBUS_HAVE_STATUS_VOUT;
}
break;
case ltc3880:
case ltc3887:
case ltm4675:
case ltm4676:
case ltm4677:
case ltm4686:
data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
info->read_word_data = ltc3880_read_word_data;
info->pages = LTC3880_NUM_PAGES;
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
| PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
break;
case ltc3882:
data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
info->read_word_data = ltc3880_read_word_data;
info->pages = LTC3880_NUM_PAGES;
info->func[0] = PMBUS_HAVE_VIN
| PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
break;
case ltc3883:
data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
info->read_word_data = ltc3883_read_word_data;
info->pages = LTC3883_NUM_PAGES;
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
| PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_PIN | PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
break;
case ltc3884:
case ltc3886:
case ltc3889:
case ltc7132:
case ltc7880:
case ltm4664:
case ltm4678:
case ltm4680:
case ltm4700:
data->features |= FEAT_CLEAR_PEAKS | FEAT_NEEDS_POLLING;
info->read_word_data = ltc3883_read_word_data;
info->pages = LTC3880_NUM_PAGES;
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
| PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_PIN | PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
break;
default:
return -ENODEV;
}
#if IS_ENABLED(CONFIG_SENSORS_LTC2978_REGULATOR)
info->num_regulators = info->pages;
switch (data->id) {
case ltc2972:
case ltc2974:
case ltc2975:
case ltc2977:
case ltc2978:
case ltc2979:
case ltc2980:
case ltm2987:
info->reg_desc = ltc2978_reg_desc;
if (info->num_regulators > ARRAY_SIZE(ltc2978_reg_desc)) {
dev_warn(&client->dev, "num_regulators too large!");
info->num_regulators = ARRAY_SIZE(ltc2978_reg_desc);
}
break;
default:
info->reg_desc = ltc2978_reg_desc_default;
if (info->num_regulators > ARRAY_SIZE(ltc2978_reg_desc_default)) {
dev_warn(&client->dev, "num_regulators too large!");
info->num_regulators =
ARRAY_SIZE(ltc2978_reg_desc_default);
}
break;
}
#endif
return pmbus_do_probe(client, info);
}
#ifdef CONFIG_OF
static const struct of_device_id ltc2978_of_match[] = {
{ .compatible = "lltc,ltc2972" },
{ .compatible = "lltc,ltc2974" },
{ .compatible = "lltc,ltc2975" },
{ .compatible = "lltc,ltc2977" },
{ .compatible = "lltc,ltc2978" },
{ .compatible = "lltc,ltc2979" },
{ .compatible = "lltc,ltc2980" },
{ .compatible = "lltc,ltc3880" },
{ .compatible = "lltc,ltc3882" },
{ .compatible = "lltc,ltc3883" },
{ .compatible = "lltc,ltc3884" },
{ .compatible = "lltc,ltc3886" },
{ .compatible = "lltc,ltc3887" },
{ .compatible = "lltc,ltc3889" },
{ .compatible = "lltc,ltc7132" },
{ .compatible = "lltc,ltc7880" },
{ .compatible = "lltc,ltm2987" },
{ .compatible = "lltc,ltm4664" },
{ .compatible = "lltc,ltm4675" },
{ .compatible = "lltc,ltm4676" },
{ .compatible = "lltc,ltm4677" },
{ .compatible = "lltc,ltm4678" },
{ .compatible = "lltc,ltm4680" },
{ .compatible = "lltc,ltm4686" },
{ .compatible = "lltc,ltm4700" },
{ }
};
MODULE_DEVICE_TABLE(of, ltc2978_of_match);
#endif
static struct i2c_driver ltc2978_driver = {
.driver = {
.name = "ltc2978",
.of_match_table = of_match_ptr(ltc2978_of_match),
},
.probe = ltc2978_probe,
.id_table = ltc2978_id,
};
module_i2c_driver(ltc2978_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for LTC2978 and compatible chips");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/ltc2978.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for MPS Multi-phase Digital VR Controllers
*
* Copyright (C) 2020 Nvidia Technologies Ltd.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
/* Vendor specific registers. */
#define MP2888_MFR_SYS_CONFIG 0x44
#define MP2888_MFR_READ_CS1_2 0x73
#define MP2888_MFR_READ_CS3_4 0x74
#define MP2888_MFR_READ_CS5_6 0x75
#define MP2888_MFR_READ_CS7_8 0x76
#define MP2888_MFR_READ_CS9_10 0x77
#define MP2888_MFR_VR_CONFIG1 0xe1
#define MP2888_TOTAL_CURRENT_RESOLUTION BIT(3)
#define MP2888_PHASE_CURRENT_RESOLUTION BIT(4)
#define MP2888_DRMOS_KCS GENMASK(2, 0)
#define MP2888_TEMP_UNIT 10
#define MP2888_MAX_PHASE 10
struct mp2888_data {
struct pmbus_driver_info info;
int total_curr_resolution;
int phase_curr_resolution;
int curr_sense_gain;
};
#define to_mp2888_data(x) container_of(x, struct mp2888_data, info)
static int mp2888_read_byte_data(struct i2c_client *client, int page, int reg)
{
switch (reg) {
case PMBUS_VOUT_MODE:
/* Enforce VOUT direct format. */
return PB_VOUT_MODE_DIRECT;
default:
return -ENODATA;
}
}
static int
mp2888_current_sense_gain_and_resolution_get(struct i2c_client *client, struct mp2888_data *data)
{
int ret;
/*
* Obtain DrMOS current sense gain of power stage from the register
* , bits 0-2. The value is selected as below:
* 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other
* values are reserved.
*/
ret = i2c_smbus_read_word_data(client, MP2888_MFR_SYS_CONFIG);
if (ret < 0)
return ret;
switch (ret & MP2888_DRMOS_KCS) {
case 0:
data->curr_sense_gain = 85;
break;
case 1:
data->curr_sense_gain = 97;
break;
case 2:
data->curr_sense_gain = 100;
break;
case 3:
data->curr_sense_gain = 50;
break;
default:
return -EINVAL;
}
/*
* Obtain resolution selector for total and phase current report and protection.
* 0: original resolution; 1: half resolution (in such case phase current value should
* be doubled.
*/
data->total_curr_resolution = (ret & MP2888_TOTAL_CURRENT_RESOLUTION) >> 3;
data->phase_curr_resolution = (ret & MP2888_PHASE_CURRENT_RESOLUTION) >> 4;
return 0;
}
static int
mp2888_read_phase(struct i2c_client *client, struct mp2888_data *data, int page, int phase, u8 reg)
{
int ret;
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
if (!((phase + 1) % 2))
ret >>= 8;
ret &= 0xff;
/*
* Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs)
* where:
* - Kcs is the DrMOS current sense gain of power stage, which is obtained from the
* register MP2888_MFR_VR_CONFIG1, bits 13-12 with the following selection of DrMOS
* (data->curr_sense_gain):
* 00b - 8.5µA/A, 01b - 9.7µA/A, 1b - 10µA/A, 11b - 5µA/A.
* - Rcs is the internal phase current sense resistor. This parameter depends on hardware
* assembly. By default it is set to 1kΩ. In case of different assembly, user should
* scale this parameter by dividing it by Rcs.
* If phase current resolution bit is set to 1, READ_CSx value should be doubled.
* Note, that current phase sensing, providing by the device is not accurate. This is
* because sampling of current occurrence of bit weight has a big deviation, especially for
* light load.
*/
ret = DIV_ROUND_CLOSEST(ret * 200 - 19600, data->curr_sense_gain);
/* Scale according to total current resolution. */
ret = (data->total_curr_resolution) ? ret * 2 : ret;
return ret;
}
static int
mp2888_read_phases(struct i2c_client *client, struct mp2888_data *data, int page, int phase)
{
int ret;
switch (phase) {
case 0 ... 1:
ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS1_2);
break;
case 2 ... 3:
ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS3_4);
break;
case 4 ... 5:
ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS5_6);
break;
case 6 ... 7:
ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS7_8);
break;
case 8 ... 9:
ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS9_10);
break;
default:
return -ENODATA;
}
return ret;
}
static int mp2888_read_word_data(struct i2c_client *client, int page, int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct mp2888_data *data = to_mp2888_data(info);
int ret;
switch (reg) {
case PMBUS_READ_VIN:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret <= 0)
return ret;
/*
* READ_VIN requires fixup to scale it to linear11 format. Register data format
* provides 10 bits for mantissa and 6 bits for exponent. Bits 15:10 are set with
* the fixed value 111011b.
*/
ret = (ret & GENMASK(9, 0)) | ((ret & GENMASK(31, 10)) << 1);
break;
case PMBUS_OT_WARN_LIMIT:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
/*
* Chip reports limits in degrees C, but the actual temperature in 10th of
* degrees C - scaling is needed to match both.
*/
ret *= MP2888_TEMP_UNIT;
break;
case PMBUS_READ_IOUT:
if (phase != 0xff)
return mp2888_read_phases(client, data, page, phase);
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
/*
* READ_IOUT register has unused bits 15:12 with fixed value 1110b. Clear these
* bits and scale with total current resolution. Data is provided in direct format.
*/
ret &= GENMASK(11, 0);
ret = data->total_curr_resolution ? ret * 2 : ret;
break;
case PMBUS_IOUT_OC_WARN_LIMIT:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
ret &= GENMASK(9, 0);
/*
* Chip reports limits with resolution 1A or 2A, if total current resolution bit is
* set 1. Actual current is reported with 0.25A or respectively 0.5A resolution.
* Scaling is needed to match both.
*/
ret = data->total_curr_resolution ? ret * 8 : ret * 4;
break;
case PMBUS_READ_POUT:
case PMBUS_READ_PIN:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
ret = data->total_curr_resolution ? ret : DIV_ROUND_CLOSEST(ret, 2);
break;
case PMBUS_POUT_OP_WARN_LIMIT:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
/*
* Chip reports limits with resolution 1W or 2W, if total current resolution bit is
* set 1. Actual power is reported with 0.5W or 1W respectively resolution. Scaling
* is needed to match both.
*/
ret = data->total_curr_resolution ? ret * 2 : ret;
break;
/*
* The below registers are not implemented by device or implemented not according to the
* spec. Skip all of them to avoid exposing non-relevant inputs to sysfs.
*/
case PMBUS_OT_FAULT_LIMIT:
case PMBUS_UT_WARN_LIMIT:
case PMBUS_UT_FAULT_LIMIT:
case PMBUS_VIN_UV_FAULT_LIMIT:
case PMBUS_VOUT_UV_WARN_LIMIT:
case PMBUS_VOUT_OV_WARN_LIMIT:
case PMBUS_VOUT_UV_FAULT_LIMIT:
case PMBUS_VOUT_OV_FAULT_LIMIT:
case PMBUS_VIN_OV_WARN_LIMIT:
case PMBUS_IOUT_OC_LV_FAULT_LIMIT:
case PMBUS_IOUT_OC_FAULT_LIMIT:
case PMBUS_POUT_MAX:
case PMBUS_IOUT_UC_FAULT_LIMIT:
case PMBUS_POUT_OP_FAULT_LIMIT:
case PMBUS_PIN_OP_WARN_LIMIT:
case PMBUS_MFR_VIN_MIN:
case PMBUS_MFR_VOUT_MIN:
case PMBUS_MFR_VIN_MAX:
case PMBUS_MFR_VOUT_MAX:
case PMBUS_MFR_IIN_MAX:
case PMBUS_MFR_IOUT_MAX:
case PMBUS_MFR_PIN_MAX:
case PMBUS_MFR_POUT_MAX:
case PMBUS_MFR_MAX_TEMP_1:
return -ENXIO;
default:
return -ENODATA;
}
return ret;
}
static int mp2888_write_word_data(struct i2c_client *client, int page, int reg, u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct mp2888_data *data = to_mp2888_data(info);
switch (reg) {
case PMBUS_OT_WARN_LIMIT:
word = DIV_ROUND_CLOSEST(word, MP2888_TEMP_UNIT);
/* Drop unused bits 15:8. */
word = clamp_val(word, 0, GENMASK(7, 0));
break;
case PMBUS_IOUT_OC_WARN_LIMIT:
/* Fix limit according to total curent resolution. */
word = data->total_curr_resolution ? DIV_ROUND_CLOSEST(word, 8) :
DIV_ROUND_CLOSEST(word, 4);
/* Drop unused bits 15:10. */
word = clamp_val(word, 0, GENMASK(9, 0));
break;
case PMBUS_POUT_OP_WARN_LIMIT:
/* Fix limit according to total curent resolution. */
word = data->total_curr_resolution ? DIV_ROUND_CLOSEST(word, 4) :
DIV_ROUND_CLOSEST(word, 2);
/* Drop unused bits 15:10. */
word = clamp_val(word, 0, GENMASK(9, 0));
break;
default:
return -ENODATA;
}
return pmbus_write_word_data(client, page, reg, word);
}
static int
mp2888_identify_multiphase(struct i2c_client *client, struct mp2888_data *data,
struct pmbus_driver_info *info)
{
int ret;
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
if (ret < 0)
return ret;
/* Identify multiphase number - could be from 1 to 10. */
ret = i2c_smbus_read_word_data(client, MP2888_MFR_VR_CONFIG1);
if (ret <= 0)
return ret;
info->phases[0] = ret & GENMASK(3, 0);
/*
* The device provides a total of 10 PWM pins, and can be configured to different phase
* count applications for rail.
*/
if (info->phases[0] > MP2888_MAX_PHASE)
return -EINVAL;
return 0;
}
static struct pmbus_driver_info mp2888_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_POWER] = direct,
.m[PSC_TEMPERATURE] = 1,
.R[PSC_TEMPERATURE] = 1,
.m[PSC_VOLTAGE_OUT] = 1,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_CURRENT_OUT] = 4,
.m[PSC_POWER] = 1,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_PHASE_VIRTUAL,
.pfunc[0] = PMBUS_HAVE_IOUT,
.pfunc[1] = PMBUS_HAVE_IOUT,
.pfunc[2] = PMBUS_HAVE_IOUT,
.pfunc[3] = PMBUS_HAVE_IOUT,
.pfunc[4] = PMBUS_HAVE_IOUT,
.pfunc[5] = PMBUS_HAVE_IOUT,
.pfunc[6] = PMBUS_HAVE_IOUT,
.pfunc[7] = PMBUS_HAVE_IOUT,
.pfunc[8] = PMBUS_HAVE_IOUT,
.pfunc[9] = PMBUS_HAVE_IOUT,
.read_byte_data = mp2888_read_byte_data,
.read_word_data = mp2888_read_word_data,
.write_word_data = mp2888_write_word_data,
};
static int mp2888_probe(struct i2c_client *client)
{
struct pmbus_driver_info *info;
struct mp2888_data *data;
int ret;
data = devm_kzalloc(&client->dev, sizeof(struct mp2888_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
memcpy(&data->info, &mp2888_info, sizeof(*info));
info = &data->info;
/* Identify multiphase configuration. */
ret = mp2888_identify_multiphase(client, data, info);
if (ret)
return ret;
/* Obtain current sense gain of power stage and current resolution. */
ret = mp2888_current_sense_gain_and_resolution_get(client, data);
if (ret)
return ret;
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id mp2888_id[] = {
{"mp2888", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, mp2888_id);
static const struct of_device_id __maybe_unused mp2888_of_match[] = {
{.compatible = "mps,mp2888"},
{}
};
MODULE_DEVICE_TABLE(of, mp2888_of_match);
static struct i2c_driver mp2888_driver = {
.driver = {
.name = "mp2888",
.of_match_table = of_match_ptr(mp2888_of_match),
},
.probe = mp2888_probe,
.id_table = mp2888_id,
};
module_i2c_driver(mp2888_driver);
MODULE_AUTHOR("Vadim Pasternak <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for MPS MP2888 device");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/mp2888.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for Infineon PXE1610
*
* Copyright (c) 2019 Facebook Inc
*
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
#define PXE1610_NUM_PAGES 3
/* Identify chip parameters. */
static int pxe1610_identify(struct i2c_client *client,
struct pmbus_driver_info *info)
{
int i;
for (i = 0; i < PXE1610_NUM_PAGES; i++) {
if (pmbus_check_byte_register(client, i, PMBUS_VOUT_MODE)) {
u8 vout_mode;
int ret;
/* Read the register with VOUT scaling value.*/
ret = pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
if (ret < 0)
return ret;
vout_mode = ret & GENMASK(4, 0);
switch (vout_mode) {
case 1:
info->vrm_version[i] = vr12;
break;
case 2:
info->vrm_version[i] = vr13;
break;
default:
/*
* If prior pages are available limit operation
* to them
*/
if (i != 0) {
info->pages = i;
return 0;
}
return -ENODEV;
}
}
}
return 0;
}
static struct pmbus_driver_info pxe1610_info = {
.pages = PXE1610_NUM_PAGES,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = vid,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_POWER] = linear,
.func[0] = PMBUS_HAVE_VIN
| PMBUS_HAVE_VOUT | PMBUS_HAVE_IIN
| PMBUS_HAVE_IOUT | PMBUS_HAVE_PIN
| PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP,
.func[1] = PMBUS_HAVE_VIN
| PMBUS_HAVE_VOUT | PMBUS_HAVE_IIN
| PMBUS_HAVE_IOUT | PMBUS_HAVE_PIN
| PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP,
.func[2] = PMBUS_HAVE_VIN
| PMBUS_HAVE_VOUT | PMBUS_HAVE_IIN
| PMBUS_HAVE_IOUT | PMBUS_HAVE_PIN
| PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP,
.identify = pxe1610_identify,
};
static int pxe1610_probe(struct i2c_client *client)
{
struct pmbus_driver_info *info;
u8 buf[I2C_SMBUS_BLOCK_MAX];
int ret;
if (!i2c_check_functionality(
client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA
| I2C_FUNC_SMBUS_READ_WORD_DATA
| I2C_FUNC_SMBUS_READ_BLOCK_DATA))
return -ENODEV;
/*
* By default this device doesn't boot to page 0, so set page 0
* to access all pmbus registers.
*/
i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
/* Read Manufacturer id */
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
if (ret < 0) {
dev_err(&client->dev, "Failed to read PMBUS_MFR_ID\n");
return ret;
}
if (ret != 2 || strncmp(buf, "XP", 2)) {
dev_err(&client->dev, "MFR_ID unrecognized\n");
return -ENODEV;
}
info = devm_kmemdup(&client->dev, &pxe1610_info,
sizeof(struct pmbus_driver_info),
GFP_KERNEL);
if (!info)
return -ENOMEM;
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id pxe1610_id[] = {
{"pxe1610", 0},
{"pxe1110", 0},
{"pxm1310", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, pxe1610_id);
static struct i2c_driver pxe1610_driver = {
.driver = {
.name = "pxe1610",
},
.probe = pxe1610_probe,
.id_table = pxe1610_id,
};
module_i2c_driver(pxe1610_driver);
MODULE_AUTHOR("Vijay Khemka <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Infineon PXE1610, PXE1110 and PXM1310");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/pxe1610.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for Infineon TDA38640
*
* Copyright (c) 2023 9elements GmbH
*
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regulator/driver.h>
#include "pmbus.h"
static const struct regulator_desc __maybe_unused tda38640_reg_desc[] = {
PMBUS_REGULATOR("vout", 0),
};
static struct pmbus_driver_info tda38640_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_POWER] = linear,
.format[PSC_TEMPERATURE] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IIN
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT | PMBUS_HAVE_PIN,
#if IS_ENABLED(CONFIG_SENSORS_TDA38640_REGULATOR)
.num_regulators = 1,
.reg_desc = tda38640_reg_desc,
#endif
};
static int tda38640_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &tda38640_info);
}
static const struct i2c_device_id tda38640_id[] = {
{"tda38640", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, tda38640_id);
static const struct of_device_id __maybe_unused tda38640_of_match[] = {
{ .compatible = "infineon,tda38640"},
{ },
};
MODULE_DEVICE_TABLE(of, tda38640_of_match);
/* This is the driver that will be inserted */
static struct i2c_driver tda38640_driver = {
.driver = {
.name = "tda38640",
.of_match_table = of_match_ptr(tda38640_of_match),
},
.probe = tda38640_probe,
.id_table = tda38640_id,
};
module_i2c_driver(tda38640_driver);
MODULE_AUTHOR("Patrick Rudolph <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Infineon TDA38640");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/tda38640.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Maxim MAX8688
*
* Copyright (c) 2011 Ericsson AB.
*/
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include "pmbus.h"
#define MAX8688_MFR_VOUT_PEAK 0xd4
#define MAX8688_MFR_IOUT_PEAK 0xd5
#define MAX8688_MFR_TEMPERATURE_PEAK 0xd6
#define MAX8688_MFG_STATUS 0xd8
#define MAX8688_STATUS_OC_FAULT BIT(4)
#define MAX8688_STATUS_OV_FAULT BIT(5)
#define MAX8688_STATUS_OV_WARNING BIT(8)
#define MAX8688_STATUS_UV_FAULT BIT(9)
#define MAX8688_STATUS_UV_WARNING BIT(10)
#define MAX8688_STATUS_UC_FAULT BIT(11)
#define MAX8688_STATUS_OC_WARNING BIT(12)
#define MAX8688_STATUS_OT_FAULT BIT(13)
#define MAX8688_STATUS_OT_WARNING BIT(14)
static int max8688_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_VIRT_READ_VOUT_MAX:
ret = pmbus_read_word_data(client, 0, 0xff,
MAX8688_MFR_VOUT_PEAK);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
ret = pmbus_read_word_data(client, 0, 0xff,
MAX8688_MFR_IOUT_PEAK);
break;
case PMBUS_VIRT_READ_TEMP_MAX:
ret = pmbus_read_word_data(client, 0, 0xff,
MAX8688_MFR_TEMPERATURE_PEAK);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
case PMBUS_VIRT_RESET_IOUT_HISTORY:
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = 0;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int max8688_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
int ret;
switch (reg) {
case PMBUS_VIRT_RESET_VOUT_HISTORY:
ret = pmbus_write_word_data(client, 0, MAX8688_MFR_VOUT_PEAK,
0);
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
ret = pmbus_write_word_data(client, 0, MAX8688_MFR_IOUT_PEAK,
0);
break;
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = pmbus_write_word_data(client, 0,
MAX8688_MFR_TEMPERATURE_PEAK,
0xffff);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int max8688_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret = 0;
int mfg_status;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_STATUS_VOUT:
mfg_status = pmbus_read_word_data(client, 0, 0xff,
MAX8688_MFG_STATUS);
if (mfg_status < 0)
return mfg_status;
if (mfg_status & MAX8688_STATUS_UV_WARNING)
ret |= PB_VOLTAGE_UV_WARNING;
if (mfg_status & MAX8688_STATUS_UV_FAULT)
ret |= PB_VOLTAGE_UV_FAULT;
if (mfg_status & MAX8688_STATUS_OV_WARNING)
ret |= PB_VOLTAGE_OV_WARNING;
if (mfg_status & MAX8688_STATUS_OV_FAULT)
ret |= PB_VOLTAGE_OV_FAULT;
break;
case PMBUS_STATUS_IOUT:
mfg_status = pmbus_read_word_data(client, 0, 0xff,
MAX8688_MFG_STATUS);
if (mfg_status < 0)
return mfg_status;
if (mfg_status & MAX8688_STATUS_UC_FAULT)
ret |= PB_IOUT_UC_FAULT;
if (mfg_status & MAX8688_STATUS_OC_WARNING)
ret |= PB_IOUT_OC_WARNING;
if (mfg_status & MAX8688_STATUS_OC_FAULT)
ret |= PB_IOUT_OC_FAULT;
break;
case PMBUS_STATUS_TEMPERATURE:
mfg_status = pmbus_read_word_data(client, 0, 0xff,
MAX8688_MFG_STATUS);
if (mfg_status < 0)
return mfg_status;
if (mfg_status & MAX8688_STATUS_OT_WARNING)
ret |= PB_TEMP_OT_WARNING;
if (mfg_status & MAX8688_STATUS_OT_FAULT)
ret |= PB_TEMP_OT_FAULT;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static struct pmbus_driver_info max8688_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.format[PSC_CURRENT_OUT] = direct,
.m[PSC_VOLTAGE_IN] = 19995,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = -1,
.m[PSC_VOLTAGE_OUT] = 19995,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = -1,
.m[PSC_CURRENT_OUT] = 23109,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = -2,
.m[PSC_TEMPERATURE] = -7612,
.b[PSC_TEMPERATURE] = 335,
.R[PSC_TEMPERATURE] = -3,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_STATUS_TEMP,
.read_byte_data = max8688_read_byte_data,
.read_word_data = max8688_read_word_data,
.write_word_data = max8688_write_word_data,
};
static int max8688_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &max8688_info);
}
static const struct i2c_device_id max8688_id[] = {
{"max8688", 0},
{ }
};
MODULE_DEVICE_TABLE(i2c, max8688_id);
/* This is the driver that will be inserted */
static struct i2c_driver max8688_driver = {
.driver = {
.name = "max8688",
},
.probe = max8688_probe,
.id_table = max8688_id,
};
module_i2c_driver(max8688_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for Maxim MAX8688");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/max8688.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for the STPDDC60 controller
*
* Copyright (c) 2021 Flextronics International Sweden AB.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/pmbus.h>
#include "pmbus.h"
#define STPDDC60_MFR_READ_VOUT 0xd2
#define STPDDC60_MFR_OV_LIMIT_OFFSET 0xe5
#define STPDDC60_MFR_UV_LIMIT_OFFSET 0xe6
static const struct i2c_device_id stpddc60_id[] = {
{"stpddc60", 0},
{"bmr481", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, stpddc60_id);
static struct pmbus_driver_info stpddc60_info = {
.pages = 1,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT,
};
/*
* Calculate the closest absolute offset between commanded vout value
* and limit value in steps of 50mv in the range 0 (50mv) to 7 (400mv).
* Return 0 if the upper limit is lower than vout or if the lower limit
* is higher than vout.
*/
static u8 stpddc60_get_offset(int vout, u16 limit, bool over)
{
int offset;
long v, l;
v = 250 + (vout - 1) * 5; /* Convert VID to mv */
l = (limit * 1000L) >> 8; /* Convert LINEAR to mv */
if (over == (l < v))
return 0;
offset = DIV_ROUND_CLOSEST(abs(l - v), 50);
if (offset > 0)
offset--;
return clamp_val(offset, 0, 7);
}
/*
* Adjust the linear format word to use the given fixed exponent.
*/
static u16 stpddc60_adjust_linear(u16 word, s16 fixed)
{
s16 e, m, d;
e = ((s16)word) >> 11;
m = ((s16)((word & 0x7ff) << 5)) >> 5;
d = e - fixed;
if (d >= 0)
m <<= d;
else
m >>= -d;
return clamp_val(m, 0, 0x3ff) | ((fixed << 11) & 0xf800);
}
/*
* The VOUT_COMMAND register uses the VID format but the vout alarm limit
* registers use the LINEAR format so we override VOUT_MODE here to force
* LINEAR format for all registers.
*/
static int stpddc60_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_VOUT_MODE:
ret = 0x18;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
/*
* The vout related registers return values in LINEAR11 format when LINEAR16
* is expected. Clear the top 5 bits to set the exponent part to zero to
* convert the value to LINEAR16 format.
*/
static int stpddc60_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_READ_VOUT:
ret = pmbus_read_word_data(client, page, phase,
STPDDC60_MFR_READ_VOUT);
if (ret < 0)
return ret;
ret &= 0x7ff;
break;
case PMBUS_VOUT_OV_FAULT_LIMIT:
case PMBUS_VOUT_UV_FAULT_LIMIT:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
ret &= 0x7ff;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
/*
* The vout under- and over-voltage limits are set as an offset relative to
* the commanded vout voltage. The vin, iout, pout and temp limits must use
* the same fixed exponent the chip uses to encode the data when read.
*/
static int stpddc60_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
int ret;
u8 offset;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_VOUT_OV_FAULT_LIMIT:
ret = pmbus_read_word_data(client, page, 0xff,
PMBUS_VOUT_COMMAND);
if (ret < 0)
return ret;
offset = stpddc60_get_offset(ret, word, true);
ret = pmbus_write_byte_data(client, page,
STPDDC60_MFR_OV_LIMIT_OFFSET,
offset);
break;
case PMBUS_VOUT_UV_FAULT_LIMIT:
ret = pmbus_read_word_data(client, page, 0xff,
PMBUS_VOUT_COMMAND);
if (ret < 0)
return ret;
offset = stpddc60_get_offset(ret, word, false);
ret = pmbus_write_byte_data(client, page,
STPDDC60_MFR_UV_LIMIT_OFFSET,
offset);
break;
case PMBUS_VIN_OV_FAULT_LIMIT:
case PMBUS_VIN_UV_FAULT_LIMIT:
case PMBUS_OT_FAULT_LIMIT:
case PMBUS_OT_WARN_LIMIT:
case PMBUS_IOUT_OC_FAULT_LIMIT:
case PMBUS_IOUT_OC_WARN_LIMIT:
case PMBUS_POUT_OP_FAULT_LIMIT:
ret = pmbus_read_word_data(client, page, 0xff, reg);
if (ret < 0)
return ret;
word = stpddc60_adjust_linear(word, ret >> 11);
ret = pmbus_write_word_data(client, page, reg, word);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int stpddc60_probe(struct i2c_client *client)
{
int status;
u8 device_id[I2C_SMBUS_BLOCK_MAX + 1];
const struct i2c_device_id *mid;
struct pmbus_driver_info *info = &stpddc60_info;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA
| I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
status = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, device_id);
if (status < 0) {
dev_err(&client->dev, "Failed to read Manufacturer Model\n");
return status;
}
for (mid = stpddc60_id; mid->name[0]; mid++) {
if (!strncasecmp(mid->name, device_id, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
info->read_byte_data = stpddc60_read_byte_data;
info->read_word_data = stpddc60_read_word_data;
info->write_word_data = stpddc60_write_word_data;
status = pmbus_do_probe(client, info);
if (status < 0)
return status;
pmbus_set_update(client, PMBUS_VOUT_OV_FAULT_LIMIT, true);
pmbus_set_update(client, PMBUS_VOUT_UV_FAULT_LIMIT, true);
return 0;
}
static struct i2c_driver stpddc60_driver = {
.driver = {
.name = "stpddc60",
},
.probe = stpddc60_probe,
.id_table = stpddc60_id,
};
module_i2c_driver(stpddc60_driver);
MODULE_AUTHOR("Erik Rosen <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for ST STPDDC60");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/stpddc60.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* mpq7932.c - hwmon with optional regulator driver for mps mpq7932
* Copyright 2022 Monolithic Power Systems, Inc
*
* Author: Saravanan Sekar <[email protected]>
*/
#include <linux/bits.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/pmbus.h>
#include "pmbus.h"
#define MPQ7932_BUCK_UV_MIN 206250
#define MPQ7932_UV_STEP 6250
#define MPQ7932_N_VOLTAGES 256
#define MPQ7932_VOUT_MAX 0xFF
#define MPQ7932_NUM_PAGES 6
#define MPQ7932_TON_DELAY 0x60
#define MPQ7932_VOUT_STARTUP_SLEW 0xA3
#define MPQ7932_VOUT_SHUTDOWN_SLEW 0xA5
#define MPQ7932_VOUT_SLEW_MASK GENMASK(1, 0)
#define MPQ7932_TON_DELAY_MASK GENMASK(4, 0)
struct mpq7932_data {
struct pmbus_driver_info info;
struct pmbus_platform_data pdata;
};
#if IS_ENABLED(CONFIG_SENSORS_MPQ7932_REGULATOR)
static struct regulator_desc mpq7932_regulators_desc[] = {
PMBUS_REGULATOR_STEP("buck", 0, MPQ7932_N_VOLTAGES,
MPQ7932_UV_STEP, MPQ7932_BUCK_UV_MIN),
PMBUS_REGULATOR_STEP("buck", 1, MPQ7932_N_VOLTAGES,
MPQ7932_UV_STEP, MPQ7932_BUCK_UV_MIN),
PMBUS_REGULATOR_STEP("buck", 2, MPQ7932_N_VOLTAGES,
MPQ7932_UV_STEP, MPQ7932_BUCK_UV_MIN),
PMBUS_REGULATOR_STEP("buck", 3, MPQ7932_N_VOLTAGES,
MPQ7932_UV_STEP, MPQ7932_BUCK_UV_MIN),
PMBUS_REGULATOR_STEP("buck", 4, MPQ7932_N_VOLTAGES,
MPQ7932_UV_STEP, MPQ7932_BUCK_UV_MIN),
PMBUS_REGULATOR_STEP("buck", 5, MPQ7932_N_VOLTAGES,
MPQ7932_UV_STEP, MPQ7932_BUCK_UV_MIN),
};
#endif
static int mpq7932_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
switch (reg) {
/*
* chip supports only byte access for VOUT_COMMAND otherwise
* access results -EREMOTEIO
*/
case PMBUS_VOUT_COMMAND:
return pmbus_write_byte_data(client, page, reg, word & 0xFF);
default:
return -ENODATA;
}
}
static int mpq7932_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
switch (reg) {
/*
* chip supports neither (PMBUS_VOUT_MARGIN_HIGH, PMBUS_VOUT_MARGIN_LOW)
* nor (PMBUS_MFR_VOUT_MIN, PMBUS_MFR_VOUT_MAX). As a result set voltage
* fails due to error in pmbus_regulator_get_low_margin, so faked.
*/
case PMBUS_MFR_VOUT_MIN:
return 0;
case PMBUS_MFR_VOUT_MAX:
return MPQ7932_VOUT_MAX;
/*
* chip supports only byte access for VOUT_COMMAND otherwise
* access results in -EREMOTEIO
*/
case PMBUS_READ_VOUT:
return pmbus_read_byte_data(client, page, PMBUS_VOUT_COMMAND);
default:
return -ENODATA;
}
}
static int mpq7932_probe(struct i2c_client *client)
{
struct mpq7932_data *data;
struct pmbus_driver_info *info;
struct device *dev = &client->dev;
int i;
data = devm_kzalloc(dev, sizeof(struct mpq7932_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
info = &data->info;
info->pages = MPQ7932_NUM_PAGES;
info->format[PSC_VOLTAGE_OUT] = direct;
info->m[PSC_VOLTAGE_OUT] = 160;
info->b[PSC_VOLTAGE_OUT] = -33;
for (i = 0; i < info->pages; i++) {
info->func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_STATUS_TEMP;
}
#if IS_ENABLED(CONFIG_SENSORS_MPQ7932_REGULATOR)
info->num_regulators = ARRAY_SIZE(mpq7932_regulators_desc);
info->reg_desc = mpq7932_regulators_desc;
#endif
info->read_word_data = mpq7932_read_word_data;
info->write_word_data = mpq7932_write_word_data;
data->pdata.flags = PMBUS_NO_CAPABILITY;
dev->platform_data = &data->pdata;
return pmbus_do_probe(client, info);
}
static const struct of_device_id mpq7932_of_match[] = {
{ .compatible = "mps,mpq7932"},
{},
};
MODULE_DEVICE_TABLE(of, mpq7932_of_match);
static const struct i2c_device_id mpq7932_id[] = {
{ "mpq7932", },
{ },
};
MODULE_DEVICE_TABLE(i2c, mpq7932_id);
static struct i2c_driver mpq7932_regulator_driver = {
.driver = {
.name = "mpq7932",
.of_match_table = mpq7932_of_match,
},
.probe = mpq7932_probe,
.id_table = mpq7932_id,
};
module_i2c_driver(mpq7932_regulator_driver);
MODULE_AUTHOR("Saravanan Sekar <[email protected]>");
MODULE_DESCRIPTION("MPQ7932 PMIC regulator driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/mpq7932.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for MAX20710, MAX20730, MAX20734, and MAX20743 Integrated,
* Step-Down Switching Regulators
*
* Copyright 2019 Google LLC.
* Copyright 2020 Maxim Integrated
*/
#include <linux/bits.h>
#include <linux/debugfs.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/pmbus.h>
#include <linux/util_macros.h>
#include "pmbus.h"
enum chips {
max20710,
max20730,
max20734,
max20743
};
enum {
MAX20730_DEBUGFS_VOUT_MIN = 0,
MAX20730_DEBUGFS_FREQUENCY,
MAX20730_DEBUGFS_PG_DELAY,
MAX20730_DEBUGFS_INTERNAL_GAIN,
MAX20730_DEBUGFS_BOOT_VOLTAGE,
MAX20730_DEBUGFS_OUT_V_RAMP_RATE,
MAX20730_DEBUGFS_OC_PROTECT_MODE,
MAX20730_DEBUGFS_SS_TIMING,
MAX20730_DEBUGFS_IMAX,
MAX20730_DEBUGFS_OPERATION,
MAX20730_DEBUGFS_ON_OFF_CONFIG,
MAX20730_DEBUGFS_SMBALERT_MASK,
MAX20730_DEBUGFS_VOUT_MODE,
MAX20730_DEBUGFS_VOUT_COMMAND,
MAX20730_DEBUGFS_VOUT_MAX,
MAX20730_DEBUGFS_NUM_ENTRIES
};
struct max20730_data {
enum chips id;
struct pmbus_driver_info info;
struct mutex lock; /* Used to protect against parallel writes */
u16 mfr_devset1;
u16 mfr_devset2;
u16 mfr_voutmin;
u32 vout_voltage_divider[2];
};
#define to_max20730_data(x) container_of(x, struct max20730_data, info)
#define VOLT_FROM_REG(val) DIV_ROUND_CLOSEST((val), 1 << 9)
#define PMBUS_SMB_ALERT_MASK 0x1B
#define MAX20730_MFR_VOUT_MIN 0xd1
#define MAX20730_MFR_DEVSET1 0xd2
#define MAX20730_MFR_DEVSET2 0xd3
#define MAX20730_MFR_VOUT_MIN_MASK GENMASK(9, 0)
#define MAX20730_MFR_VOUT_MIN_BIT_POS 0
#define MAX20730_MFR_DEVSET1_RGAIN_MASK (BIT(13) | BIT(14))
#define MAX20730_MFR_DEVSET1_OTP_MASK (BIT(11) | BIT(12))
#define MAX20730_MFR_DEVSET1_VBOOT_MASK (BIT(8) | BIT(9))
#define MAX20730_MFR_DEVSET1_OCP_MASK (BIT(5) | BIT(6))
#define MAX20730_MFR_DEVSET1_FSW_MASK GENMASK(4, 2)
#define MAX20730_MFR_DEVSET1_TSTAT_MASK (BIT(0) | BIT(1))
#define MAX20730_MFR_DEVSET1_RGAIN_BIT_POS 13
#define MAX20730_MFR_DEVSET1_OTP_BIT_POS 11
#define MAX20730_MFR_DEVSET1_VBOOT_BIT_POS 8
#define MAX20730_MFR_DEVSET1_OCP_BIT_POS 5
#define MAX20730_MFR_DEVSET1_FSW_BIT_POS 2
#define MAX20730_MFR_DEVSET1_TSTAT_BIT_POS 0
#define MAX20730_MFR_DEVSET2_IMAX_MASK GENMASK(10, 8)
#define MAX20730_MFR_DEVSET2_VRATE (BIT(6) | BIT(7))
#define MAX20730_MFR_DEVSET2_OCPM_MASK BIT(5)
#define MAX20730_MFR_DEVSET2_SS_MASK (BIT(0) | BIT(1))
#define MAX20730_MFR_DEVSET2_IMAX_BIT_POS 8
#define MAX20730_MFR_DEVSET2_VRATE_BIT_POS 6
#define MAX20730_MFR_DEVSET2_OCPM_BIT_POS 5
#define MAX20730_MFR_DEVSET2_SS_BIT_POS 0
#define DEBUG_FS_DATA_MAX 16
struct max20730_debugfs_data {
struct i2c_client *client;
int debugfs_entries[MAX20730_DEBUGFS_NUM_ENTRIES];
};
#define to_psu(x, y) container_of((x), \
struct max20730_debugfs_data, debugfs_entries[(y)])
#ifdef CONFIG_DEBUG_FS
static ssize_t max20730_debugfs_read(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
{
int ret, len;
int *idxp = file->private_data;
int idx = *idxp;
struct max20730_debugfs_data *psu = to_psu(idxp, idx);
const struct pmbus_driver_info *info;
const struct max20730_data *data;
char tbuf[DEBUG_FS_DATA_MAX] = { 0 };
char *result = tbuf;
u16 val;
info = pmbus_get_driver_info(psu->client);
data = to_max20730_data(info);
switch (idx) {
case MAX20730_DEBUGFS_VOUT_MIN:
ret = VOLT_FROM_REG(data->mfr_voutmin * 10000);
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d.%d\n",
ret / 10000, ret % 10000);
break;
case MAX20730_DEBUGFS_FREQUENCY:
val = (data->mfr_devset1 & MAX20730_MFR_DEVSET1_FSW_MASK)
>> MAX20730_MFR_DEVSET1_FSW_BIT_POS;
if (val == 0)
ret = 400;
else if (val == 1)
ret = 500;
else if (val == 2 || val == 3)
ret = 600;
else if (val == 4)
ret = 700;
else if (val == 5)
ret = 800;
else
ret = 900;
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret);
break;
case MAX20730_DEBUGFS_PG_DELAY:
val = (data->mfr_devset1 & MAX20730_MFR_DEVSET1_TSTAT_MASK)
>> MAX20730_MFR_DEVSET1_TSTAT_BIT_POS;
if (val == 0)
result = "2000\n";
else if (val == 1)
result = "125\n";
else if (val == 2)
result = "62.5\n";
else
result = "32\n";
break;
case MAX20730_DEBUGFS_INTERNAL_GAIN:
val = (data->mfr_devset1 & MAX20730_MFR_DEVSET1_RGAIN_MASK)
>> MAX20730_MFR_DEVSET1_RGAIN_BIT_POS;
if (data->id == max20734) {
/* AN6209 */
if (val == 0)
result = "0.8\n";
else if (val == 1)
result = "3.2\n";
else if (val == 2)
result = "1.6\n";
else
result = "6.4\n";
} else if (data->id == max20730 || data->id == max20710) {
/* AN6042 or AN6140 */
if (val == 0)
result = "0.9\n";
else if (val == 1)
result = "3.6\n";
else if (val == 2)
result = "1.8\n";
else
result = "7.2\n";
} else if (data->id == max20743) {
/* AN6042 */
if (val == 0)
result = "0.45\n";
else if (val == 1)
result = "1.8\n";
else if (val == 2)
result = "0.9\n";
else
result = "3.6\n";
} else {
result = "Not supported\n";
}
break;
case MAX20730_DEBUGFS_BOOT_VOLTAGE:
val = (data->mfr_devset1 & MAX20730_MFR_DEVSET1_VBOOT_MASK)
>> MAX20730_MFR_DEVSET1_VBOOT_BIT_POS;
if (val == 0)
result = "0.6484\n";
else if (val == 1)
result = "0.8984\n";
else if (val == 2)
result = "1.0\n";
else
result = "Invalid\n";
break;
case MAX20730_DEBUGFS_OUT_V_RAMP_RATE:
val = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_VRATE)
>> MAX20730_MFR_DEVSET2_VRATE_BIT_POS;
if (val == 0)
result = "4\n";
else if (val == 1)
result = "2\n";
else if (val == 2)
result = "1\n";
else
result = "Invalid\n";
break;
case MAX20730_DEBUGFS_OC_PROTECT_MODE:
ret = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_OCPM_MASK)
>> MAX20730_MFR_DEVSET2_OCPM_BIT_POS;
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret);
break;
case MAX20730_DEBUGFS_SS_TIMING:
val = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_SS_MASK)
>> MAX20730_MFR_DEVSET2_SS_BIT_POS;
if (val == 0)
result = "0.75\n";
else if (val == 1)
result = "1.5\n";
else if (val == 2)
result = "3\n";
else
result = "6\n";
break;
case MAX20730_DEBUGFS_IMAX:
ret = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_IMAX_MASK)
>> MAX20730_MFR_DEVSET2_IMAX_BIT_POS;
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret);
break;
case MAX20730_DEBUGFS_OPERATION:
ret = i2c_smbus_read_byte_data(psu->client, PMBUS_OPERATION);
if (ret < 0)
return ret;
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret);
break;
case MAX20730_DEBUGFS_ON_OFF_CONFIG:
ret = i2c_smbus_read_byte_data(psu->client, PMBUS_ON_OFF_CONFIG);
if (ret < 0)
return ret;
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret);
break;
case MAX20730_DEBUGFS_SMBALERT_MASK:
ret = i2c_smbus_read_word_data(psu->client,
PMBUS_SMB_ALERT_MASK);
if (ret < 0)
return ret;
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret);
break;
case MAX20730_DEBUGFS_VOUT_MODE:
ret = i2c_smbus_read_byte_data(psu->client, PMBUS_VOUT_MODE);
if (ret < 0)
return ret;
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret);
break;
case MAX20730_DEBUGFS_VOUT_COMMAND:
ret = i2c_smbus_read_word_data(psu->client, PMBUS_VOUT_COMMAND);
if (ret < 0)
return ret;
ret = VOLT_FROM_REG(ret * 10000);
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX,
"%d.%d\n", ret / 10000, ret % 10000);
break;
case MAX20730_DEBUGFS_VOUT_MAX:
ret = i2c_smbus_read_word_data(psu->client, PMBUS_VOUT_MAX);
if (ret < 0)
return ret;
ret = VOLT_FROM_REG(ret * 10000);
len = scnprintf(tbuf, DEBUG_FS_DATA_MAX,
"%d.%d\n", ret / 10000, ret % 10000);
break;
default:
result = "Invalid\n";
}
len = strlen(result);
return simple_read_from_buffer(buf, count, ppos, result, len);
}
static const struct file_operations max20730_fops = {
.llseek = noop_llseek,
.read = max20730_debugfs_read,
.write = NULL,
.open = simple_open,
};
static int max20730_init_debugfs(struct i2c_client *client,
struct max20730_data *data)
{
int ret, i;
struct dentry *debugfs;
struct dentry *max20730_dir;
struct max20730_debugfs_data *psu;
ret = i2c_smbus_read_word_data(client, MAX20730_MFR_DEVSET2);
if (ret < 0)
return ret;
data->mfr_devset2 = ret;
ret = i2c_smbus_read_word_data(client, MAX20730_MFR_VOUT_MIN);
if (ret < 0)
return ret;
data->mfr_voutmin = ret;
psu = devm_kzalloc(&client->dev, sizeof(*psu), GFP_KERNEL);
if (!psu)
return -ENOMEM;
psu->client = client;
debugfs = pmbus_get_debugfs_dir(client);
if (!debugfs)
return -ENOENT;
max20730_dir = debugfs_create_dir(client->name, debugfs);
for (i = 0; i < MAX20730_DEBUGFS_NUM_ENTRIES; ++i)
psu->debugfs_entries[i] = i;
debugfs_create_file("vout_min", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_VOUT_MIN],
&max20730_fops);
debugfs_create_file("frequency", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_FREQUENCY],
&max20730_fops);
debugfs_create_file("power_good_delay", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_PG_DELAY],
&max20730_fops);
debugfs_create_file("internal_gain", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_INTERNAL_GAIN],
&max20730_fops);
debugfs_create_file("boot_voltage", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_BOOT_VOLTAGE],
&max20730_fops);
debugfs_create_file("out_voltage_ramp_rate", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_OUT_V_RAMP_RATE],
&max20730_fops);
debugfs_create_file("oc_protection_mode", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_OC_PROTECT_MODE],
&max20730_fops);
debugfs_create_file("soft_start_timing", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_SS_TIMING],
&max20730_fops);
debugfs_create_file("imax", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_IMAX],
&max20730_fops);
debugfs_create_file("operation", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_OPERATION],
&max20730_fops);
debugfs_create_file("on_off_config", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_ON_OFF_CONFIG],
&max20730_fops);
debugfs_create_file("smbalert_mask", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_SMBALERT_MASK],
&max20730_fops);
debugfs_create_file("vout_mode", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_VOUT_MODE],
&max20730_fops);
debugfs_create_file("vout_command", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_VOUT_COMMAND],
&max20730_fops);
debugfs_create_file("vout_max", 0444, max20730_dir,
&psu->debugfs_entries[MAX20730_DEBUGFS_VOUT_MAX],
&max20730_fops);
return 0;
}
#else
static int max20730_init_debugfs(struct i2c_client *client,
struct max20730_data *data)
{
return 0;
}
#endif /* CONFIG_DEBUG_FS */
static const struct i2c_device_id max20730_id[];
/*
* Convert discreet value to direct data format. Strictly speaking, all passed
* values are constants, so we could do that calculation manually. On the
* downside, that would make the driver more difficult to maintain, so lets
* use this approach.
*/
static u16 val_to_direct(int v, enum pmbus_sensor_classes class,
const struct pmbus_driver_info *info)
{
int R = info->R[class] - 3; /* take milli-units into account */
int b = info->b[class] * 1000;
long d;
d = v * info->m[class] + b;
/*
* R < 0 is true for all callers, so we don't need to bother
* about the R > 0 case.
*/
while (R < 0) {
d = DIV_ROUND_CLOSEST(d, 10);
R++;
}
return (u16)d;
}
static long direct_to_val(u16 w, enum pmbus_sensor_classes class,
const struct pmbus_driver_info *info)
{
int R = info->R[class] - 3;
int b = info->b[class] * 1000;
int m = info->m[class];
long d = (s16)w;
if (m == 0)
return 0;
while (R < 0) {
d *= 10;
R++;
}
d = (d - b) / m;
return d;
}
static u32 max_current[][5] = {
[max20710] = { 6200, 8000, 9700, 11600 },
[max20730] = { 13000, 16600, 20100, 23600 },
[max20734] = { 21000, 27000, 32000, 38000 },
[max20743] = { 18900, 24100, 29200, 34100 },
};
static int max20730_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct max20730_data *data = to_max20730_data(info);
int ret = 0;
u32 max_c;
switch (reg) {
case PMBUS_OT_FAULT_LIMIT:
switch ((data->mfr_devset1 >> 11) & 0x3) {
case 0x0:
ret = val_to_direct(150000, PSC_TEMPERATURE, info);
break;
case 0x1:
ret = val_to_direct(130000, PSC_TEMPERATURE, info);
break;
default:
ret = -ENODATA;
break;
}
break;
case PMBUS_IOUT_OC_FAULT_LIMIT:
max_c = max_current[data->id][(data->mfr_devset1 >> 5) & 0x3];
ret = val_to_direct(max_c, PSC_CURRENT_OUT, info);
break;
case PMBUS_READ_VOUT:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret > 0 && data->vout_voltage_divider[0] && data->vout_voltage_divider[1]) {
u64 temp = DIV_ROUND_CLOSEST_ULL((u64)ret * data->vout_voltage_divider[1],
data->vout_voltage_divider[0]);
ret = clamp_val(temp, 0, 0xffff);
}
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int max20730_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
struct pmbus_driver_info *info;
struct max20730_data *data;
u16 devset1;
int ret = 0;
int idx;
info = (struct pmbus_driver_info *)pmbus_get_driver_info(client);
data = to_max20730_data(info);
mutex_lock(&data->lock);
devset1 = data->mfr_devset1;
switch (reg) {
case PMBUS_OT_FAULT_LIMIT:
devset1 &= ~(BIT(11) | BIT(12));
if (direct_to_val(word, PSC_TEMPERATURE, info) < 140000)
devset1 |= BIT(11);
break;
case PMBUS_IOUT_OC_FAULT_LIMIT:
devset1 &= ~(BIT(5) | BIT(6));
idx = find_closest(direct_to_val(word, PSC_CURRENT_OUT, info),
max_current[data->id], 4);
devset1 |= (idx << 5);
break;
default:
ret = -ENODATA;
break;
}
if (!ret && devset1 != data->mfr_devset1) {
ret = i2c_smbus_write_word_data(client, MAX20730_MFR_DEVSET1,
devset1);
if (!ret) {
data->mfr_devset1 = devset1;
pmbus_clear_cache(client);
}
}
mutex_unlock(&data->lock);
return ret;
}
static const struct pmbus_driver_info max20730_info[] = {
[max20710] = {
.pages = 1,
.read_word_data = max20730_read_word_data,
.write_word_data = max20730_write_word_data,
/* Source : Maxim AN6140 and AN6042 */
.format[PSC_TEMPERATURE] = direct,
.m[PSC_TEMPERATURE] = 21,
.b[PSC_TEMPERATURE] = 5887,
.R[PSC_TEMPERATURE] = -1,
.format[PSC_VOLTAGE_IN] = direct,
.m[PSC_VOLTAGE_IN] = 3609,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = -2,
.format[PSC_CURRENT_OUT] = direct,
.m[PSC_CURRENT_OUT] = 153,
.b[PSC_CURRENT_OUT] = 4976,
.R[PSC_CURRENT_OUT] = -1,
.format[PSC_VOLTAGE_OUT] = linear,
.func[0] = PMBUS_HAVE_VIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_INPUT,
},
[max20730] = {
.pages = 1,
.read_word_data = max20730_read_word_data,
.write_word_data = max20730_write_word_data,
/* Source : Maxim AN6042 */
.format[PSC_TEMPERATURE] = direct,
.m[PSC_TEMPERATURE] = 21,
.b[PSC_TEMPERATURE] = 5887,
.R[PSC_TEMPERATURE] = -1,
.format[PSC_VOLTAGE_IN] = direct,
.m[PSC_VOLTAGE_IN] = 3609,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = -2,
/*
* Values in the datasheet are adjusted for temperature and
* for the relationship between Vin and Vout.
* Unfortunately, the data sheet suggests that Vout measurement
* may be scaled with a resistor array. This is indeed the case
* at least on the evaulation boards. As a result, any in-driver
* adjustments would either be wrong or require elaborate means
* to configure the scaling. Instead of doing that, just report
* raw values and let userspace handle adjustments.
*/
.format[PSC_CURRENT_OUT] = direct,
.m[PSC_CURRENT_OUT] = 153,
.b[PSC_CURRENT_OUT] = 4976,
.R[PSC_CURRENT_OUT] = -1,
.format[PSC_VOLTAGE_OUT] = linear,
.func[0] = PMBUS_HAVE_VIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_INPUT,
},
[max20734] = {
.pages = 1,
.read_word_data = max20730_read_word_data,
.write_word_data = max20730_write_word_data,
/* Source : Maxim AN6209 */
.format[PSC_TEMPERATURE] = direct,
.m[PSC_TEMPERATURE] = 21,
.b[PSC_TEMPERATURE] = 5887,
.R[PSC_TEMPERATURE] = -1,
.format[PSC_VOLTAGE_IN] = direct,
.m[PSC_VOLTAGE_IN] = 3592,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = -2,
.format[PSC_CURRENT_OUT] = direct,
.m[PSC_CURRENT_OUT] = 111,
.b[PSC_CURRENT_OUT] = 3461,
.R[PSC_CURRENT_OUT] = -1,
.format[PSC_VOLTAGE_OUT] = linear,
.func[0] = PMBUS_HAVE_VIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_INPUT,
},
[max20743] = {
.pages = 1,
.read_word_data = max20730_read_word_data,
.write_word_data = max20730_write_word_data,
/* Source : Maxim AN6042 */
.format[PSC_TEMPERATURE] = direct,
.m[PSC_TEMPERATURE] = 21,
.b[PSC_TEMPERATURE] = 5887,
.R[PSC_TEMPERATURE] = -1,
.format[PSC_VOLTAGE_IN] = direct,
.m[PSC_VOLTAGE_IN] = 3597,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = -2,
.format[PSC_CURRENT_OUT] = direct,
.m[PSC_CURRENT_OUT] = 95,
.b[PSC_CURRENT_OUT] = 5014,
.R[PSC_CURRENT_OUT] = -1,
.format[PSC_VOLTAGE_OUT] = linear,
.func[0] = PMBUS_HAVE_VIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_INPUT,
},
};
static int max20730_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
struct max20730_data *data;
enum chips chip_id;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA |
I2C_FUNC_SMBUS_READ_WORD_DATA |
I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
if (ret < 0) {
dev_err(&client->dev, "Failed to read Manufacturer ID\n");
return ret;
}
if (ret != 5 || strncmp(buf, "MAXIM", 5)) {
buf[ret] = '\0';
dev_err(dev, "Unsupported Manufacturer ID '%s'\n", buf);
return -ENODEV;
}
/*
* The chips support reading PMBUS_MFR_MODEL. On both MAX20730
* and MAX20734, reading it returns M20743. Presumably that is
* the reason why the command is not documented. Unfortunately,
* that means that there is no reliable means to detect the chip.
* However, we can at least detect the chip series. Compare
* the returned value against 'M20743' and bail out if there is
* a mismatch. If that doesn't work for all chips, we may have
* to remove this check.
*/
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (ret < 0) {
dev_err(dev, "Failed to read Manufacturer Model\n");
return ret;
}
if (ret != 6 || strncmp(buf, "M20743", 6)) {
buf[ret] = '\0';
dev_err(dev, "Unsupported Manufacturer Model '%s'\n", buf);
return -ENODEV;
}
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_REVISION, buf);
if (ret < 0) {
dev_err(dev, "Failed to read Manufacturer Revision\n");
return ret;
}
if (ret != 1 || buf[0] != 'F') {
buf[ret] = '\0';
dev_err(dev, "Unsupported Manufacturer Revision '%s'\n", buf);
return -ENODEV;
}
if (client->dev.of_node)
chip_id = (uintptr_t)of_device_get_match_data(dev);
else
chip_id = i2c_match_id(max20730_id, client)->driver_data;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->id = chip_id;
mutex_init(&data->lock);
memcpy(&data->info, &max20730_info[chip_id], sizeof(data->info));
if (of_property_read_u32_array(client->dev.of_node, "vout-voltage-divider",
data->vout_voltage_divider,
ARRAY_SIZE(data->vout_voltage_divider)) != 0)
memset(data->vout_voltage_divider, 0, sizeof(data->vout_voltage_divider));
if (data->vout_voltage_divider[1] < data->vout_voltage_divider[0]) {
dev_err(dev,
"The total resistance of voltage divider is less than output resistance\n");
return -EINVAL;
}
ret = i2c_smbus_read_word_data(client, MAX20730_MFR_DEVSET1);
if (ret < 0)
return ret;
data->mfr_devset1 = ret;
ret = pmbus_do_probe(client, &data->info);
if (ret < 0)
return ret;
ret = max20730_init_debugfs(client, data);
if (ret)
dev_warn(dev, "Failed to register debugfs: %d\n",
ret);
return 0;
}
static const struct i2c_device_id max20730_id[] = {
{ "max20710", max20710 },
{ "max20730", max20730 },
{ "max20734", max20734 },
{ "max20743", max20743 },
{ },
};
MODULE_DEVICE_TABLE(i2c, max20730_id);
static const struct of_device_id max20730_of_match[] = {
{ .compatible = "maxim,max20710", .data = (void *)max20710 },
{ .compatible = "maxim,max20730", .data = (void *)max20730 },
{ .compatible = "maxim,max20734", .data = (void *)max20734 },
{ .compatible = "maxim,max20743", .data = (void *)max20743 },
{ },
};
MODULE_DEVICE_TABLE(of, max20730_of_match);
static struct i2c_driver max20730_driver = {
.driver = {
.name = "max20730",
.of_match_table = max20730_of_match,
},
.probe = max20730_probe,
.id_table = max20730_id,
};
module_i2c_driver(max20730_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Maxim MAX20710 / MAX20730 / MAX20734 / MAX20743");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/max20730.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Maxim MAX20751
*
* Copyright (c) 2015 Guenter Roeck
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include "pmbus.h"
static struct pmbus_driver_info max20751_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = vid,
.vrm_version[0] = vr12,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT,
};
static int max20751_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &max20751_info);
}
static const struct i2c_device_id max20751_id[] = {
{"max20751", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, max20751_id);
static struct i2c_driver max20751_driver = {
.driver = {
.name = "max20751",
},
.probe = max20751_probe,
.id_table = max20751_id,
};
module_i2c_driver(max20751_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Maxim MAX20751");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/max20751.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers
*
* Copyright (c) 2022 Infineon Technologies. All rights reserved.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
#define XDPE152_PAGE_NUM 2
static struct pmbus_driver_info xdpe152_info = {
.pages = XDPE152_PAGE_NUM,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
};
static int xdpe152_probe(struct i2c_client *client)
{
struct pmbus_driver_info *info;
info = devm_kmemdup(&client->dev, &xdpe152_info, sizeof(*info),
GFP_KERNEL);
if (!info)
return -ENOMEM;
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id xdpe152_id[] = {
{"xdpe152c4", 0},
{"xdpe15284", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, xdpe152_id);
static const struct of_device_id __maybe_unused xdpe152_of_match[] = {
{.compatible = "infineon,xdpe152c4"},
{.compatible = "infineon,xdpe15284"},
{}
};
MODULE_DEVICE_TABLE(of, xdpe152_of_match);
static struct i2c_driver xdpe152_driver = {
.driver = {
.name = "xdpe152c4",
.of_match_table = of_match_ptr(xdpe152_of_match),
},
.probe = xdpe152_probe,
.id_table = xdpe152_id,
};
module_i2c_driver(xdpe152_driver);
MODULE_AUTHOR("Greg Schwendimann <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Infineon XDPE152 family");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/xdpe152c4.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Maxim MAX16064
*
* Copyright (c) 2011 Ericsson AB.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include "pmbus.h"
#define MAX16064_MFR_VOUT_PEAK 0xd4
#define MAX16064_MFR_TEMPERATURE_PEAK 0xd6
static int max16064_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
switch (reg) {
case PMBUS_VIRT_READ_VOUT_MAX:
ret = pmbus_read_word_data(client, page, phase,
MAX16064_MFR_VOUT_PEAK);
break;
case PMBUS_VIRT_READ_TEMP_MAX:
ret = pmbus_read_word_data(client, page, phase,
MAX16064_MFR_TEMPERATURE_PEAK);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = 0;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int max16064_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
int ret;
switch (reg) {
case PMBUS_VIRT_RESET_VOUT_HISTORY:
ret = pmbus_write_word_data(client, page,
MAX16064_MFR_VOUT_PEAK, 0);
break;
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = pmbus_write_word_data(client, page,
MAX16064_MFR_TEMPERATURE_PEAK,
0xffff);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static struct pmbus_driver_info max16064_info = {
.pages = 4,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_VOLTAGE_IN] = 19995,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = -1,
.m[PSC_VOLTAGE_OUT] = 19995,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = -1,
.m[PSC_TEMPERATURE] = -7612,
.b[PSC_TEMPERATURE] = 335,
.R[PSC_TEMPERATURE] = -3,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_TEMP
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_TEMP,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[2] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[3] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.read_word_data = max16064_read_word_data,
.write_word_data = max16064_write_word_data,
};
static int max16064_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &max16064_info);
}
static const struct i2c_device_id max16064_id[] = {
{"max16064", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, max16064_id);
/* This is the driver that will be inserted */
static struct i2c_driver max16064_driver = {
.driver = {
.name = "max16064",
},
.probe = max16064_probe,
.id_table = max16064_id,
};
module_i2c_driver(max16064_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for Maxim MAX16064");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/max16064.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Hardware monitoring driver for Maxim MAX16508, MAX16600, MAX16601,
* and MAX16602.
*
* Implementation notes:
*
* This chip series supports two rails, VCORE and VSA. Telemetry information
* for the two rails is reported in two subsequent I2C addresses. The driver
* instantiates a dummy I2C client at the second I2C address to report
* information for the VSA rail in a single instance of the driver.
* Telemetry for the VSA rail is reported to the PMBus core in PMBus page 2.
*
* The chip reports input current using two separate methods. The input current
* reported with the standard READ_IIN command is derived from the output
* current. The first method is reported to the PMBus core with PMBus page 0,
* the second method is reported with PMBus page 1.
*
* The chip supports reading per-phase temperatures and per-phase input/output
* currents for VCORE. Telemetry is reported in vendor specific registers.
* The driver translates the vendor specific register values to PMBus standard
* register values and reports per-phase information in PMBus page 0.
*
* Copyright 2019, 2020 Google LLC.
*/
#include <linux/bits.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
enum chips { max16508, max16600, max16601, max16602 };
#define REG_DEFAULT_NUM_POP 0xc4
#define REG_SETPT_DVID 0xd1
#define DAC_10MV_MODE BIT(4)
#define REG_IOUT_AVG_PK 0xee
#define REG_IIN_SENSOR 0xf1
#define REG_TOTAL_INPUT_POWER 0xf2
#define REG_PHASE_ID 0xf3
#define CORE_RAIL_INDICATOR BIT(7)
#define REG_PHASE_REPORTING 0xf4
#define MAX16601_NUM_PHASES 8
struct max16601_data {
enum chips id;
struct pmbus_driver_info info;
struct i2c_client *vsa;
int iout_avg_pkg;
};
#define to_max16601_data(x) container_of(x, struct max16601_data, info)
static int max16601_read_byte(struct i2c_client *client, int page, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max16601_data *data = to_max16601_data(info);
if (page > 0) {
if (page == 2) /* VSA */
return i2c_smbus_read_byte_data(data->vsa, reg);
return -EOPNOTSUPP;
}
return -ENODATA;
}
static int max16601_read_word(struct i2c_client *client, int page, int phase,
int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max16601_data *data = to_max16601_data(info);
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
int ret;
switch (page) {
case 0: /* VCORE */
if (phase == 0xff)
return -ENODATA;
switch (reg) {
case PMBUS_READ_IIN:
case PMBUS_READ_IOUT:
case PMBUS_READ_TEMPERATURE_1:
ret = i2c_smbus_write_byte_data(client, REG_PHASE_ID,
phase);
if (ret)
return ret;
ret = i2c_smbus_read_block_data(client,
REG_PHASE_REPORTING,
buf);
if (ret < 0)
return ret;
if (ret < 6)
return -EIO;
switch (reg) {
case PMBUS_READ_TEMPERATURE_1:
return buf[1] << 8 | buf[0];
case PMBUS_READ_IOUT:
return buf[3] << 8 | buf[2];
case PMBUS_READ_IIN:
return buf[5] << 8 | buf[4];
default:
break;
}
}
return -EOPNOTSUPP;
case 1: /* VCORE, read IIN/PIN from sensor element */
switch (reg) {
case PMBUS_READ_IIN:
return i2c_smbus_read_word_data(client, REG_IIN_SENSOR);
case PMBUS_READ_PIN:
return i2c_smbus_read_word_data(client,
REG_TOTAL_INPUT_POWER);
default:
break;
}
return -EOPNOTSUPP;
case 2: /* VSA */
switch (reg) {
case PMBUS_VIRT_READ_IOUT_MAX:
ret = i2c_smbus_read_word_data(data->vsa,
REG_IOUT_AVG_PK);
if (ret < 0)
return ret;
if (sign_extend32(ret, 10) >
sign_extend32(data->iout_avg_pkg, 10))
data->iout_avg_pkg = ret;
return data->iout_avg_pkg;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
return 0;
case PMBUS_IOUT_OC_FAULT_LIMIT:
case PMBUS_IOUT_OC_WARN_LIMIT:
case PMBUS_OT_FAULT_LIMIT:
case PMBUS_OT_WARN_LIMIT:
case PMBUS_READ_IIN:
case PMBUS_READ_IOUT:
case PMBUS_READ_TEMPERATURE_1:
case PMBUS_STATUS_WORD:
return i2c_smbus_read_word_data(data->vsa, reg);
default:
return -EOPNOTSUPP;
}
default:
return -EOPNOTSUPP;
}
}
static int max16601_write_byte(struct i2c_client *client, int page, u8 reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max16601_data *data = to_max16601_data(info);
if (page == 2) {
if (reg == PMBUS_CLEAR_FAULTS)
return i2c_smbus_write_byte(data->vsa, reg);
return -EOPNOTSUPP;
}
return -ENODATA;
}
static int max16601_write_word(struct i2c_client *client, int page, int reg,
u16 value)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max16601_data *data = to_max16601_data(info);
switch (page) {
case 0: /* VCORE */
return -ENODATA;
case 1: /* VCORE IIN/PIN from sensor element */
default:
return -EOPNOTSUPP;
case 2: /* VSA */
switch (reg) {
case PMBUS_VIRT_RESET_IOUT_HISTORY:
data->iout_avg_pkg = 0xfc00;
return 0;
case PMBUS_IOUT_OC_FAULT_LIMIT:
case PMBUS_IOUT_OC_WARN_LIMIT:
case PMBUS_OT_FAULT_LIMIT:
case PMBUS_OT_WARN_LIMIT:
return i2c_smbus_write_word_data(data->vsa, reg, value);
default:
return -EOPNOTSUPP;
}
}
}
static int max16601_identify(struct i2c_client *client,
struct pmbus_driver_info *info)
{
struct max16601_data *data = to_max16601_data(info);
int reg;
reg = i2c_smbus_read_byte_data(client, REG_SETPT_DVID);
if (reg < 0)
return reg;
if (reg & DAC_10MV_MODE)
info->vrm_version[0] = vr13;
else
info->vrm_version[0] = vr12;
if (data->id != max16600 && data->id != max16601 && data->id != max16602)
return 0;
reg = i2c_smbus_read_byte_data(client, REG_DEFAULT_NUM_POP);
if (reg < 0)
return reg;
/*
* If REG_DEFAULT_NUM_POP returns 0, we don't know how many phases
* are populated. Stick with the default in that case.
*/
reg &= 0x0f;
if (reg && reg <= MAX16601_NUM_PHASES)
info->phases[0] = reg;
return 0;
}
static struct pmbus_driver_info max16601_info = {
.pages = 3,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = vid,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_POWER] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT | PMBUS_PAGE_VIRTUAL | PMBUS_PHASE_VIRTUAL,
.func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_PAGE_VIRTUAL,
.func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_PAGE_VIRTUAL,
.phases[0] = MAX16601_NUM_PHASES,
.pfunc[0] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
.pfunc[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
.pfunc[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
.pfunc[3] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
.pfunc[4] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
.pfunc[5] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
.pfunc[6] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
.pfunc[7] = PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT,
.identify = max16601_identify,
.read_byte_data = max16601_read_byte,
.read_word_data = max16601_read_word,
.write_byte = max16601_write_byte,
.write_word_data = max16601_write_word,
};
static void max16601_remove(void *_data)
{
struct max16601_data *data = _data;
i2c_unregister_device(data->vsa);
}
static const struct i2c_device_id max16601_id[] = {
{"max16508", max16508},
{"max16600", max16600},
{"max16601", max16601},
{"max16602", max16602},
{}
};
MODULE_DEVICE_TABLE(i2c, max16601_id);
static int max16601_get_id(struct i2c_client *client)
{
struct device *dev = &client->dev;
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
enum chips id;
int ret;
ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
if (ret < 0 || ret < 11)
return -ENODEV;
/*
* PMBUS_IC_DEVICE_ID is expected to return MAX1660[012]y.xx",
* "MAX16500y.xx".cdxxcccccccccc, or "MAX16508y.xx".
*/
if (!strncmp(buf, "MAX16500", 8) || !strncmp(buf, "MAX16508", 8)) {
id = max16508;
} else if (!strncmp(buf, "MAX16600", 8)) {
id = max16600;
} else if (!strncmp(buf, "MAX16601", 8)) {
id = max16601;
} else if (!strncmp(buf, "MAX16602", 8)) {
id = max16602;
} else {
buf[ret] = '\0';
dev_err(dev, "Unsupported chip '%s'\n", buf);
return -ENODEV;
}
return id;
}
static int max16601_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
const struct i2c_device_id *id;
struct max16601_data *data;
int ret, chip_id;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA |
I2C_FUNC_SMBUS_READ_BLOCK_DATA))
return -ENODEV;
chip_id = max16601_get_id(client);
if (chip_id < 0)
return chip_id;
id = i2c_match_id(max16601_id, client);
if (chip_id != id->driver_data)
dev_warn(&client->dev,
"Device mismatch: Configured %s (%d), detected %d\n",
id->name, (int) id->driver_data, chip_id);
ret = i2c_smbus_read_byte_data(client, REG_PHASE_ID);
if (ret < 0)
return ret;
if (!(ret & CORE_RAIL_INDICATOR)) {
dev_err(dev,
"Driver must be instantiated on CORE rail I2C address\n");
return -ENODEV;
}
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->id = chip_id;
data->iout_avg_pkg = 0xfc00;
data->vsa = i2c_new_dummy_device(client->adapter, client->addr + 1);
if (IS_ERR(data->vsa)) {
dev_err(dev, "Failed to register VSA client\n");
return PTR_ERR(data->vsa);
}
ret = devm_add_action_or_reset(dev, max16601_remove, data);
if (ret)
return ret;
data->info = max16601_info;
return pmbus_do_probe(client, &data->info);
}
static struct i2c_driver max16601_driver = {
.driver = {
.name = "max16601",
},
.probe = max16601_probe,
.id_table = max16601_id,
};
module_i2c_driver(max16601_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Maxim MAX16601");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/max16601.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2023 IBM Corp.
*/
#include <linux/debugfs.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/i2c.h>
#include <linux/minmax.h>
#include <linux/module.h>
#include <linux/pmbus.h>
#include <linux/hwmon-sysfs.h>
#include "pmbus.h"
#define ACBEL_MFR_FW_REVISION 0xd9
static ssize_t acbel_fsg032_debugfs_read(struct file *file, char __user *buf, size_t count,
loff_t *ppos)
{
struct i2c_client *client = file->private_data;
u8 data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
char out[8];
int rc;
rc = i2c_smbus_read_block_data(client, ACBEL_MFR_FW_REVISION, data);
if (rc < 0)
return rc;
rc = snprintf(out, sizeof(out), "%*phN\n", min(rc, 3), data);
return simple_read_from_buffer(buf, count, ppos, out, rc);
}
static const struct file_operations acbel_debugfs_ops = {
.llseek = noop_llseek,
.read = acbel_fsg032_debugfs_read,
.write = NULL,
.open = simple_open,
};
static void acbel_fsg032_init_debugfs(struct i2c_client *client)
{
struct dentry *debugfs = pmbus_get_debugfs_dir(client);
if (!debugfs)
return;
debugfs_create_file("fw_version", 0444, debugfs, client, &acbel_debugfs_ops);
}
static const struct i2c_device_id acbel_fsg032_id[] = {
{ "acbel_fsg032" },
{}
};
static struct pmbus_driver_info acbel_fsg032_info = {
.pages = 1,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT | PMBUS_HAVE_POUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_TEMP3 |
PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_FAN12,
};
static int acbel_fsg032_probe(struct i2c_client *client)
{
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
struct device *dev = &client->dev;
int rc;
rc = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
if (rc < 0) {
dev_err(dev, "Failed to read PMBUS_MFR_ID\n");
return rc;
}
if (strncmp(buf, "ACBEL", 5)) {
buf[rc] = '\0';
dev_err(dev, "Manufacturer '%s' not supported\n", buf);
return -ENODEV;
}
rc = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (rc < 0) {
dev_err(dev, "Failed to read PMBUS_MFR_MODEL\n");
return rc;
}
if (strncmp(buf, "FSG032", 6)) {
buf[rc] = '\0';
dev_err(dev, "Model '%s' not supported\n", buf);
return -ENODEV;
}
rc = pmbus_do_probe(client, &acbel_fsg032_info);
if (rc)
return rc;
acbel_fsg032_init_debugfs(client);
return 0;
}
static const struct of_device_id acbel_fsg032_of_match[] = {
{ .compatible = "acbel,fsg032" },
{}
};
MODULE_DEVICE_TABLE(of, acbel_fsg032_of_match);
static struct i2c_driver acbel_fsg032_driver = {
.driver = {
.name = "acbel-fsg032",
.of_match_table = acbel_fsg032_of_match,
},
.probe = acbel_fsg032_probe,
.id_table = acbel_fsg032_id,
};
module_i2c_driver(acbel_fsg032_driver);
MODULE_AUTHOR("Lakshmi Yadlapati");
MODULE_DESCRIPTION("PMBus driver for AcBel Power System power supplies");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/acbel-fsg032.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Delta modules, Q54SJ108A2 series 1/4 Brick DC/DC
* Regulated Power Module
*
* Copyright 2020 Delta LLC.
*/
#include <linux/debugfs.h>
#include <linux/i2c.h>
#include <linux/kstrtox.h>
#include <linux/module.h>
#include <linux/of.h>
#include "pmbus.h"
#define STORE_DEFAULT_ALL 0x11
#define ERASE_BLACKBOX_DATA 0xD1
#define READ_HISTORY_EVENT_NUMBER 0xD2
#define READ_HISTORY_EVENTS 0xE0
#define SET_HISTORY_EVENT_OFFSET 0xE1
#define PMBUS_FLASH_KEY_WRITE 0xEC
enum chips {
q54sj108a2
};
enum {
Q54SJ108A2_DEBUGFS_OPERATION = 0,
Q54SJ108A2_DEBUGFS_CLEARFAULT,
Q54SJ108A2_DEBUGFS_WRITEPROTECT,
Q54SJ108A2_DEBUGFS_STOREDEFAULT,
Q54SJ108A2_DEBUGFS_VOOV_RESPONSE,
Q54SJ108A2_DEBUGFS_IOOC_RESPONSE,
Q54SJ108A2_DEBUGFS_PMBUS_VERSION,
Q54SJ108A2_DEBUGFS_MFR_ID,
Q54SJ108A2_DEBUGFS_MFR_MODEL,
Q54SJ108A2_DEBUGFS_MFR_REVISION,
Q54SJ108A2_DEBUGFS_MFR_LOCATION,
Q54SJ108A2_DEBUGFS_BLACKBOX_ERASE,
Q54SJ108A2_DEBUGFS_BLACKBOX_READ_OFFSET,
Q54SJ108A2_DEBUGFS_BLACKBOX_SET_OFFSET,
Q54SJ108A2_DEBUGFS_BLACKBOX_READ,
Q54SJ108A2_DEBUGFS_FLASH_KEY,
Q54SJ108A2_DEBUGFS_NUM_ENTRIES
};
struct q54sj108a2_data {
enum chips chip;
struct i2c_client *client;
int debugfs_entries[Q54SJ108A2_DEBUGFS_NUM_ENTRIES];
};
#define to_psu(x, y) container_of((x), struct q54sj108a2_data, debugfs_entries[(y)])
static struct pmbus_driver_info q54sj108a2_info[] = {
[q54sj108a2] = {
.pages = 1,
/* Source : Delta Q54SJ108A2 */
.format[PSC_TEMPERATURE] = linear,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.func[0] = PMBUS_HAVE_VIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_INPUT,
},
};
static ssize_t q54sj108a2_debugfs_read(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
{
int rc;
int *idxp = file->private_data;
int idx = *idxp;
struct q54sj108a2_data *psu = to_psu(idxp, idx);
char data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
char data_char[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
char *res;
switch (idx) {
case Q54SJ108A2_DEBUGFS_OPERATION:
rc = i2c_smbus_read_byte_data(psu->client, PMBUS_OPERATION);
if (rc < 0)
return rc;
rc = snprintf(data, 3, "%02x", rc);
break;
case Q54SJ108A2_DEBUGFS_WRITEPROTECT:
rc = i2c_smbus_read_byte_data(psu->client, PMBUS_WRITE_PROTECT);
if (rc < 0)
return rc;
rc = snprintf(data, 3, "%02x", rc);
break;
case Q54SJ108A2_DEBUGFS_VOOV_RESPONSE:
rc = i2c_smbus_read_byte_data(psu->client, PMBUS_VOUT_OV_FAULT_RESPONSE);
if (rc < 0)
return rc;
rc = snprintf(data, 3, "%02x", rc);
break;
case Q54SJ108A2_DEBUGFS_IOOC_RESPONSE:
rc = i2c_smbus_read_byte_data(psu->client, PMBUS_IOUT_OC_FAULT_RESPONSE);
if (rc < 0)
return rc;
rc = snprintf(data, 3, "%02x", rc);
break;
case Q54SJ108A2_DEBUGFS_PMBUS_VERSION:
rc = i2c_smbus_read_byte_data(psu->client, PMBUS_REVISION);
if (rc < 0)
return rc;
rc = snprintf(data, 3, "%02x", rc);
break;
case Q54SJ108A2_DEBUGFS_MFR_ID:
rc = i2c_smbus_read_block_data(psu->client, PMBUS_MFR_ID, data);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_MFR_MODEL:
rc = i2c_smbus_read_block_data(psu->client, PMBUS_MFR_MODEL, data);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_MFR_REVISION:
rc = i2c_smbus_read_block_data(psu->client, PMBUS_MFR_REVISION, data);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_MFR_LOCATION:
rc = i2c_smbus_read_block_data(psu->client, PMBUS_MFR_LOCATION, data);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_BLACKBOX_READ_OFFSET:
rc = i2c_smbus_read_byte_data(psu->client, READ_HISTORY_EVENT_NUMBER);
if (rc < 0)
return rc;
rc = snprintf(data, 3, "%02x", rc);
break;
case Q54SJ108A2_DEBUGFS_BLACKBOX_READ:
rc = i2c_smbus_read_block_data(psu->client, READ_HISTORY_EVENTS, data);
if (rc < 0)
return rc;
res = bin2hex(data, data_char, 32);
rc = res - data;
break;
case Q54SJ108A2_DEBUGFS_FLASH_KEY:
rc = i2c_smbus_read_block_data(psu->client, PMBUS_FLASH_KEY_WRITE, data);
if (rc < 0)
return rc;
res = bin2hex(data, data_char, 4);
rc = res - data;
break;
default:
return -EINVAL;
}
data[rc] = '\n';
rc += 2;
return simple_read_from_buffer(buf, count, ppos, data, rc);
}
static ssize_t q54sj108a2_debugfs_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
u8 flash_key[4];
u8 dst_data;
ssize_t rc;
int *idxp = file->private_data;
int idx = *idxp;
struct q54sj108a2_data *psu = to_psu(idxp, idx);
rc = i2c_smbus_write_byte_data(psu->client, PMBUS_WRITE_PROTECT, 0);
if (rc)
return rc;
switch (idx) {
case Q54SJ108A2_DEBUGFS_OPERATION:
rc = kstrtou8_from_user(buf, count, 0, &dst_data);
if (rc < 0)
return rc;
rc = i2c_smbus_write_byte_data(psu->client, PMBUS_OPERATION, dst_data);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_CLEARFAULT:
rc = i2c_smbus_write_byte(psu->client, PMBUS_CLEAR_FAULTS);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_STOREDEFAULT:
flash_key[0] = 0x7E;
flash_key[1] = 0x15;
flash_key[2] = 0xDC;
flash_key[3] = 0x42;
rc = i2c_smbus_write_block_data(psu->client, PMBUS_FLASH_KEY_WRITE, 4, flash_key);
if (rc < 0)
return rc;
rc = i2c_smbus_write_byte(psu->client, STORE_DEFAULT_ALL);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_VOOV_RESPONSE:
rc = kstrtou8_from_user(buf, count, 0, &dst_data);
if (rc < 0)
return rc;
rc = i2c_smbus_write_byte_data(psu->client, PMBUS_VOUT_OV_FAULT_RESPONSE, dst_data);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_IOOC_RESPONSE:
rc = kstrtou8_from_user(buf, count, 0, &dst_data);
if (rc < 0)
return rc;
rc = i2c_smbus_write_byte_data(psu->client, PMBUS_IOUT_OC_FAULT_RESPONSE, dst_data);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_BLACKBOX_ERASE:
rc = i2c_smbus_write_byte(psu->client, ERASE_BLACKBOX_DATA);
if (rc < 0)
return rc;
break;
case Q54SJ108A2_DEBUGFS_BLACKBOX_SET_OFFSET:
rc = kstrtou8_from_user(buf, count, 0, &dst_data);
if (rc < 0)
return rc;
rc = i2c_smbus_write_byte_data(psu->client, SET_HISTORY_EVENT_OFFSET, dst_data);
if (rc < 0)
return rc;
break;
default:
return -EINVAL;
}
return count;
}
static const struct file_operations q54sj108a2_fops = {
.llseek = noop_llseek,
.read = q54sj108a2_debugfs_read,
.write = q54sj108a2_debugfs_write,
.open = simple_open,
};
static const struct i2c_device_id q54sj108a2_id[] = {
{ "q54sj108a2", q54sj108a2 },
{ },
};
MODULE_DEVICE_TABLE(i2c, q54sj108a2_id);
static int q54sj108a2_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
enum chips chip_id;
int ret, i;
struct dentry *debugfs;
struct dentry *q54sj108a2_dir;
struct q54sj108a2_data *psu;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA |
I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
if (client->dev.of_node)
chip_id = (enum chips)(unsigned long)of_device_get_match_data(dev);
else
chip_id = i2c_match_id(q54sj108a2_id, client)->driver_data;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
if (ret < 0) {
dev_err(&client->dev, "Failed to read Manufacturer ID\n");
return ret;
}
if (ret != 6 || strncmp(buf, "DELTA", 5)) {
buf[ret] = '\0';
dev_err(dev, "Unsupported Manufacturer ID '%s'\n", buf);
return -ENODEV;
}
/*
* The chips support reading PMBUS_MFR_MODEL.
*/
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (ret < 0) {
dev_err(dev, "Failed to read Manufacturer Model\n");
return ret;
}
if (ret != 14 || strncmp(buf, "Q54SJ108A2", 10)) {
buf[ret] = '\0';
dev_err(dev, "Unsupported Manufacturer Model '%s'\n", buf);
return -ENODEV;
}
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_REVISION, buf);
if (ret < 0) {
dev_err(dev, "Failed to read Manufacturer Revision\n");
return ret;
}
if (ret != 4 || buf[0] != 'S') {
buf[ret] = '\0';
dev_err(dev, "Unsupported Manufacturer Revision '%s'\n", buf);
return -ENODEV;
}
ret = pmbus_do_probe(client, &q54sj108a2_info[chip_id]);
if (ret)
return ret;
psu = devm_kzalloc(&client->dev, sizeof(*psu), GFP_KERNEL);
if (!psu)
return 0;
psu->client = client;
debugfs = pmbus_get_debugfs_dir(client);
q54sj108a2_dir = debugfs_create_dir(client->name, debugfs);
for (i = 0; i < Q54SJ108A2_DEBUGFS_NUM_ENTRIES; ++i)
psu->debugfs_entries[i] = i;
debugfs_create_file("operation", 0644, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_OPERATION],
&q54sj108a2_fops);
debugfs_create_file("clear_fault", 0200, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_CLEARFAULT],
&q54sj108a2_fops);
debugfs_create_file("write_protect", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_WRITEPROTECT],
&q54sj108a2_fops);
debugfs_create_file("store_default", 0200, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_STOREDEFAULT],
&q54sj108a2_fops);
debugfs_create_file("vo_ov_response", 0644, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_VOOV_RESPONSE],
&q54sj108a2_fops);
debugfs_create_file("io_oc_response", 0644, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_IOOC_RESPONSE],
&q54sj108a2_fops);
debugfs_create_file("pmbus_revision", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_PMBUS_VERSION],
&q54sj108a2_fops);
debugfs_create_file("mfr_id", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_MFR_ID],
&q54sj108a2_fops);
debugfs_create_file("mfr_model", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_MFR_MODEL],
&q54sj108a2_fops);
debugfs_create_file("mfr_revision", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_MFR_REVISION],
&q54sj108a2_fops);
debugfs_create_file("mfr_location", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_MFR_LOCATION],
&q54sj108a2_fops);
debugfs_create_file("blackbox_erase", 0200, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_ERASE],
&q54sj108a2_fops);
debugfs_create_file("blackbox_read_offset", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_READ_OFFSET],
&q54sj108a2_fops);
debugfs_create_file("blackbox_set_offset", 0200, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_SET_OFFSET],
&q54sj108a2_fops);
debugfs_create_file("blackbox_read", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_READ],
&q54sj108a2_fops);
debugfs_create_file("flash_key", 0444, q54sj108a2_dir,
&psu->debugfs_entries[Q54SJ108A2_DEBUGFS_FLASH_KEY],
&q54sj108a2_fops);
return 0;
}
static const struct of_device_id q54sj108a2_of_match[] = {
{ .compatible = "delta,q54sj108a2", .data = (void *)q54sj108a2 },
{ },
};
MODULE_DEVICE_TABLE(of, q54sj108a2_of_match);
static struct i2c_driver q54sj108a2_driver = {
.driver = {
.name = "q54sj108a2",
.of_match_table = q54sj108a2_of_match,
},
.probe = q54sj108a2_probe,
.id_table = q54sj108a2_id,
};
module_i2c_driver(q54sj108a2_driver);
MODULE_AUTHOR("Xiao.Ma <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Delta Q54SJ108A2 series modules");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/q54sj108a2.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* ADM1266 - Cascadable Super Sequencer with Margin
* Control and Fault Recording
*
* Copyright 2020 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/crc8.h>
#include <linux/debugfs.h>
#include <linux/gpio/driver.h>
#include <linux/i2c.h>
#include <linux/i2c-smbus.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/nvmem-consumer.h>
#include <linux/nvmem-provider.h>
#include "pmbus.h"
#include <linux/slab.h>
#include <linux/timekeeping.h>
#define ADM1266_BLACKBOX_CONFIG 0xD3
#define ADM1266_PDIO_CONFIG 0xD4
#define ADM1266_READ_STATE 0xD9
#define ADM1266_READ_BLACKBOX 0xDE
#define ADM1266_SET_RTC 0xDF
#define ADM1266_GPIO_CONFIG 0xE1
#define ADM1266_BLACKBOX_INFO 0xE6
#define ADM1266_PDIO_STATUS 0xE9
#define ADM1266_GPIO_STATUS 0xEA
/* ADM1266 GPIO defines */
#define ADM1266_GPIO_NR 9
#define ADM1266_GPIO_FUNCTIONS(x) FIELD_GET(BIT(0), x)
#define ADM1266_GPIO_INPUT_EN(x) FIELD_GET(BIT(2), x)
#define ADM1266_GPIO_OUTPUT_EN(x) FIELD_GET(BIT(3), x)
#define ADM1266_GPIO_OPEN_DRAIN(x) FIELD_GET(BIT(4), x)
/* ADM1266 PDIO defines */
#define ADM1266_PDIO_NR 16
#define ADM1266_PDIO_PIN_CFG(x) FIELD_GET(GENMASK(15, 13), x)
#define ADM1266_PDIO_GLITCH_FILT(x) FIELD_GET(GENMASK(12, 9), x)
#define ADM1266_PDIO_OUT_CFG(x) FIELD_GET(GENMASK(2, 0), x)
#define ADM1266_BLACKBOX_OFFSET 0
#define ADM1266_BLACKBOX_SIZE 64
#define ADM1266_PMBUS_BLOCK_MAX 255
struct adm1266_data {
struct pmbus_driver_info info;
struct gpio_chip gc;
const char *gpio_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR];
struct i2c_client *client;
struct dentry *debugfs_dir;
struct nvmem_config nvmem_config;
struct nvmem_device *nvmem;
u8 *dev_mem;
struct mutex buf_mutex;
u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
};
static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
{
.name = "blackbox",
.offset = ADM1266_BLACKBOX_OFFSET,
.bytes = 2048,
},
};
DECLARE_CRC8_TABLE(pmbus_crc_table);
/*
* Different from Block Read as it sends data and waits for the slave to
* return a value dependent on that data. The protocol is simply a Write Block
* followed by a Read Block without the Read-Block command field and the
* Write-Block STOP bit.
*/
static int adm1266_pmbus_block_xfer(struct adm1266_data *data, u8 cmd, u8 w_len, u8 *data_w,
u8 *data_r)
{
struct i2c_client *client = data->client;
struct i2c_msg msgs[2] = {
{
.addr = client->addr,
.flags = I2C_M_DMA_SAFE,
.buf = data->write_buf,
.len = w_len + 2,
},
{
.addr = client->addr,
.flags = I2C_M_RD | I2C_M_DMA_SAFE,
.buf = data->read_buf,
.len = ADM1266_PMBUS_BLOCK_MAX + 2,
}
};
u8 addr;
u8 crc;
int ret;
mutex_lock(&data->buf_mutex);
msgs[0].buf[0] = cmd;
msgs[0].buf[1] = w_len;
memcpy(&msgs[0].buf[2], data_w, w_len);
ret = i2c_transfer(client->adapter, msgs, 2);
if (ret != 2) {
if (ret >= 0)
ret = -EPROTO;
mutex_unlock(&data->buf_mutex);
return ret;
}
if (client->flags & I2C_CLIENT_PEC) {
addr = i2c_8bit_addr_from_msg(&msgs[0]);
crc = crc8(pmbus_crc_table, &addr, 1, 0);
crc = crc8(pmbus_crc_table, msgs[0].buf, msgs[0].len, crc);
addr = i2c_8bit_addr_from_msg(&msgs[1]);
crc = crc8(pmbus_crc_table, &addr, 1, crc);
crc = crc8(pmbus_crc_table, msgs[1].buf, msgs[1].buf[0] + 1, crc);
if (crc != msgs[1].buf[msgs[1].buf[0] + 1]) {
mutex_unlock(&data->buf_mutex);
return -EBADMSG;
}
}
memcpy(data_r, &msgs[1].buf[1], msgs[1].buf[0]);
ret = msgs[1].buf[0];
mutex_unlock(&data->buf_mutex);
return ret;
}
static const unsigned int adm1266_gpio_mapping[ADM1266_GPIO_NR][2] = {
{1, 0},
{2, 1},
{3, 2},
{4, 8},
{5, 9},
{6, 10},
{7, 11},
{8, 6},
{9, 7},
};
static const char *adm1266_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR] = {
"GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6", "GPIO7", "GPIO8",
"GPIO9", "PDIO1", "PDIO2", "PDIO3", "PDIO4", "PDIO5", "PDIO6",
"PDIO7", "PDIO8", "PDIO9", "PDIO10", "PDIO11", "PDIO12", "PDIO13",
"PDIO14", "PDIO15", "PDIO16",
};
static int adm1266_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct adm1266_data *data = gpiochip_get_data(chip);
u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
unsigned long pins_status;
unsigned int pmbus_cmd;
int ret;
if (offset < ADM1266_GPIO_NR)
pmbus_cmd = ADM1266_GPIO_STATUS;
else
pmbus_cmd = ADM1266_PDIO_STATUS;
ret = i2c_smbus_read_block_data(data->client, pmbus_cmd, read_buf);
if (ret < 0)
return ret;
pins_status = read_buf[0] + (read_buf[1] << 8);
if (offset < ADM1266_GPIO_NR)
return test_bit(adm1266_gpio_mapping[offset][1], &pins_status);
return test_bit(offset - ADM1266_GPIO_NR, &pins_status);
}
static int adm1266_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
unsigned long *bits)
{
struct adm1266_data *data = gpiochip_get_data(chip);
u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
unsigned long status;
unsigned int gpio_nr;
int ret;
ret = i2c_smbus_read_block_data(data->client, ADM1266_GPIO_STATUS, read_buf);
if (ret < 0)
return ret;
status = read_buf[0] + (read_buf[1] << 8);
*bits = 0;
for_each_set_bit(gpio_nr, mask, ADM1266_GPIO_NR) {
if (test_bit(adm1266_gpio_mapping[gpio_nr][1], &status))
set_bit(gpio_nr, bits);
}
ret = i2c_smbus_read_block_data(data->client, ADM1266_PDIO_STATUS, read_buf);
if (ret < 0)
return ret;
status = read_buf[0] + (read_buf[1] << 8);
*bits = 0;
for_each_set_bit_from(gpio_nr, mask, ADM1266_GPIO_NR + ADM1266_PDIO_STATUS) {
if (test_bit(gpio_nr - ADM1266_GPIO_NR, &status))
set_bit(gpio_nr, bits);
}
return 0;
}
static void adm1266_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
struct adm1266_data *data = gpiochip_get_data(chip);
u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
unsigned long gpio_config;
unsigned long pdio_config;
unsigned long pin_cfg;
u8 write_cmd;
int ret;
int i;
for (i = 0; i < ADM1266_GPIO_NR; i++) {
write_cmd = adm1266_gpio_mapping[i][1];
ret = adm1266_pmbus_block_xfer(data, ADM1266_GPIO_CONFIG, 1, &write_cmd, read_buf);
if (ret != 2)
return;
gpio_config = read_buf[0];
seq_puts(s, adm1266_names[i]);
seq_puts(s, " ( ");
if (!ADM1266_GPIO_FUNCTIONS(gpio_config)) {
seq_puts(s, "high-Z )\n");
continue;
}
if (ADM1266_GPIO_INPUT_EN(gpio_config))
seq_puts(s, "input ");
if (ADM1266_GPIO_OUTPUT_EN(gpio_config))
seq_puts(s, "output ");
if (ADM1266_GPIO_OPEN_DRAIN(gpio_config))
seq_puts(s, "open-drain )\n");
else
seq_puts(s, "push-pull )\n");
}
write_cmd = 0xFF;
ret = adm1266_pmbus_block_xfer(data, ADM1266_PDIO_CONFIG, 1, &write_cmd, read_buf);
if (ret != 32)
return;
for (i = 0; i < ADM1266_PDIO_NR; i++) {
seq_puts(s, adm1266_names[ADM1266_GPIO_NR + i]);
pdio_config = read_buf[2 * i];
pdio_config += (read_buf[2 * i + 1] << 8);
pin_cfg = ADM1266_PDIO_PIN_CFG(pdio_config);
seq_puts(s, " ( ");
if (!pin_cfg || pin_cfg > 5) {
seq_puts(s, "high-Z )\n");
continue;
}
if (pin_cfg & BIT(0))
seq_puts(s, "output ");
if (pin_cfg & BIT(1))
seq_puts(s, "input ");
seq_puts(s, ")\n");
}
}
static int adm1266_config_gpio(struct adm1266_data *data)
{
const char *name = dev_name(&data->client->dev);
char *gpio_name;
int ret;
int i;
for (i = 0; i < ARRAY_SIZE(data->gpio_names); i++) {
gpio_name = devm_kasprintf(&data->client->dev, GFP_KERNEL, "adm1266-%x-%s",
data->client->addr, adm1266_names[i]);
if (!gpio_name)
return -ENOMEM;
data->gpio_names[i] = gpio_name;
}
data->gc.label = name;
data->gc.parent = &data->client->dev;
data->gc.owner = THIS_MODULE;
data->gc.can_sleep = true;
data->gc.base = -1;
data->gc.names = data->gpio_names;
data->gc.ngpio = ARRAY_SIZE(data->gpio_names);
data->gc.get = adm1266_gpio_get;
data->gc.get_multiple = adm1266_gpio_get_multiple;
data->gc.dbg_show = adm1266_gpio_dbg_show;
ret = devm_gpiochip_add_data(&data->client->dev, &data->gc, data);
if (ret)
dev_err(&data->client->dev, "GPIO registering failed (%d)\n", ret);
return ret;
}
static int adm1266_state_read(struct seq_file *s, void *pdata)
{
struct device *dev = s->private;
struct i2c_client *client = to_i2c_client(dev);
int ret;
ret = i2c_smbus_read_word_data(client, ADM1266_READ_STATE);
if (ret < 0)
return ret;
seq_printf(s, "%d\n", ret);
return 0;
}
static void adm1266_init_debugfs(struct adm1266_data *data)
{
struct dentry *root;
root = pmbus_get_debugfs_dir(data->client);
if (!root)
return;
data->debugfs_dir = debugfs_create_dir(data->client->name, root);
debugfs_create_devm_seqfile(&data->client->dev, "sequencer_state", data->debugfs_dir,
adm1266_state_read);
}
static int adm1266_nvmem_read_blackbox(struct adm1266_data *data, u8 *read_buff)
{
int record_count;
char index;
u8 buf[5];
int ret;
ret = i2c_smbus_read_block_data(data->client, ADM1266_BLACKBOX_INFO, buf);
if (ret < 0)
return ret;
if (ret != 4)
return -EIO;
record_count = buf[3];
for (index = 0; index < record_count; index++) {
ret = adm1266_pmbus_block_xfer(data, ADM1266_READ_BLACKBOX, 1, &index, read_buff);
if (ret < 0)
return ret;
if (ret != ADM1266_BLACKBOX_SIZE)
return -EIO;
read_buff += ADM1266_BLACKBOX_SIZE;
}
return 0;
}
static int adm1266_nvmem_read(void *priv, unsigned int offset, void *val, size_t bytes)
{
struct adm1266_data *data = priv;
int ret;
if (offset + bytes > data->nvmem_config.size)
return -EINVAL;
if (offset == 0) {
memset(data->dev_mem, 0, data->nvmem_config.size);
ret = adm1266_nvmem_read_blackbox(data, data->dev_mem);
if (ret) {
dev_err(&data->client->dev, "Could not read blackbox!");
return ret;
}
}
memcpy(val, data->dev_mem + offset, bytes);
return 0;
}
static int adm1266_config_nvmem(struct adm1266_data *data)
{
data->nvmem_config.name = dev_name(&data->client->dev);
data->nvmem_config.dev = &data->client->dev;
data->nvmem_config.root_only = true;
data->nvmem_config.read_only = true;
data->nvmem_config.owner = THIS_MODULE;
data->nvmem_config.reg_read = adm1266_nvmem_read;
data->nvmem_config.cells = adm1266_nvmem_cells;
data->nvmem_config.ncells = ARRAY_SIZE(adm1266_nvmem_cells);
data->nvmem_config.priv = data;
data->nvmem_config.stride = 1;
data->nvmem_config.word_size = 1;
data->nvmem_config.size = adm1266_nvmem_cells[0].bytes;
data->dev_mem = devm_kzalloc(&data->client->dev, data->nvmem_config.size, GFP_KERNEL);
if (!data->dev_mem)
return -ENOMEM;
data->nvmem = devm_nvmem_register(&data->client->dev, &data->nvmem_config);
if (IS_ERR(data->nvmem)) {
dev_err(&data->client->dev, "Could not register nvmem!");
return PTR_ERR(data->nvmem);
}
return 0;
}
static int adm1266_set_rtc(struct adm1266_data *data)
{
time64_t kt;
char write_buf[6];
int i;
kt = ktime_get_seconds();
memset(write_buf, 0, sizeof(write_buf));
for (i = 0; i < 4; i++)
write_buf[2 + i] = (kt >> (i * 8)) & 0xFF;
return i2c_smbus_write_block_data(data->client, ADM1266_SET_RTC, sizeof(write_buf),
write_buf);
}
static int adm1266_probe(struct i2c_client *client)
{
struct adm1266_data *data;
int ret;
int i;
data = devm_kzalloc(&client->dev, sizeof(struct adm1266_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
data->info.pages = 17;
data->info.format[PSC_VOLTAGE_OUT] = linear;
for (i = 0; i < data->info.pages; i++)
data->info.func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
crc8_populate_msb(pmbus_crc_table, 0x7);
mutex_init(&data->buf_mutex);
ret = adm1266_config_gpio(data);
if (ret < 0)
return ret;
ret = adm1266_set_rtc(data);
if (ret < 0)
return ret;
ret = adm1266_config_nvmem(data);
if (ret < 0)
return ret;
ret = pmbus_do_probe(client, &data->info);
if (ret)
return ret;
adm1266_init_debugfs(data);
return 0;
}
static const struct of_device_id adm1266_of_match[] = {
{ .compatible = "adi,adm1266" },
{ }
};
MODULE_DEVICE_TABLE(of, adm1266_of_match);
static const struct i2c_device_id adm1266_id[] = {
{ "adm1266", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adm1266_id);
static struct i2c_driver adm1266_driver = {
.driver = {
.name = "adm1266",
.of_match_table = adm1266_of_match,
},
.probe = adm1266_probe,
.id_table = adm1266_id,
};
module_i2c_driver(adm1266_driver);
MODULE_AUTHOR("Alexandru Tachici <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Analog Devices ADM1266");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/adm1266.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Maxim MAX34440/MAX34441
*
* Copyright (c) 2011 Ericsson AB.
* Copyright (c) 2012 Guenter Roeck
*/
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include "pmbus.h"
enum chips { max34440, max34441, max34446, max34451, max34460, max34461 };
#define MAX34440_MFR_VOUT_PEAK 0xd4
#define MAX34440_MFR_IOUT_PEAK 0xd5
#define MAX34440_MFR_TEMPERATURE_PEAK 0xd6
#define MAX34440_MFR_VOUT_MIN 0xd7
#define MAX34446_MFR_POUT_PEAK 0xe0
#define MAX34446_MFR_POUT_AVG 0xe1
#define MAX34446_MFR_IOUT_AVG 0xe2
#define MAX34446_MFR_TEMPERATURE_AVG 0xe3
#define MAX34440_STATUS_OC_WARN BIT(0)
#define MAX34440_STATUS_OC_FAULT BIT(1)
#define MAX34440_STATUS_OT_FAULT BIT(5)
#define MAX34440_STATUS_OT_WARN BIT(6)
/*
* The whole max344* family have IOUT_OC_WARN_LIMIT and IOUT_OC_FAULT_LIMIT
* swapped from the standard pmbus spec addresses.
*/
#define MAX34440_IOUT_OC_WARN_LIMIT 0x46
#define MAX34440_IOUT_OC_FAULT_LIMIT 0x4A
#define MAX34451_MFR_CHANNEL_CONFIG 0xe4
#define MAX34451_MFR_CHANNEL_CONFIG_SEL_MASK 0x3f
struct max34440_data {
int id;
struct pmbus_driver_info info;
};
#define to_max34440_data(x) container_of(x, struct max34440_data, info)
static const struct i2c_device_id max34440_id[];
static int max34440_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct max34440_data *data = to_max34440_data(info);
switch (reg) {
case PMBUS_IOUT_OC_FAULT_LIMIT:
ret = pmbus_read_word_data(client, page, phase,
MAX34440_IOUT_OC_FAULT_LIMIT);
break;
case PMBUS_IOUT_OC_WARN_LIMIT:
ret = pmbus_read_word_data(client, page, phase,
MAX34440_IOUT_OC_WARN_LIMIT);
break;
case PMBUS_VIRT_READ_VOUT_MIN:
ret = pmbus_read_word_data(client, page, phase,
MAX34440_MFR_VOUT_MIN);
break;
case PMBUS_VIRT_READ_VOUT_MAX:
ret = pmbus_read_word_data(client, page, phase,
MAX34440_MFR_VOUT_PEAK);
break;
case PMBUS_VIRT_READ_IOUT_AVG:
if (data->id != max34446 && data->id != max34451)
return -ENXIO;
ret = pmbus_read_word_data(client, page, phase,
MAX34446_MFR_IOUT_AVG);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
ret = pmbus_read_word_data(client, page, phase,
MAX34440_MFR_IOUT_PEAK);
break;
case PMBUS_VIRT_READ_POUT_AVG:
if (data->id != max34446)
return -ENXIO;
ret = pmbus_read_word_data(client, page, phase,
MAX34446_MFR_POUT_AVG);
break;
case PMBUS_VIRT_READ_POUT_MAX:
if (data->id != max34446)
return -ENXIO;
ret = pmbus_read_word_data(client, page, phase,
MAX34446_MFR_POUT_PEAK);
break;
case PMBUS_VIRT_READ_TEMP_AVG:
if (data->id != max34446 && data->id != max34460 &&
data->id != max34461)
return -ENXIO;
ret = pmbus_read_word_data(client, page, phase,
MAX34446_MFR_TEMPERATURE_AVG);
break;
case PMBUS_VIRT_READ_TEMP_MAX:
ret = pmbus_read_word_data(client, page, phase,
MAX34440_MFR_TEMPERATURE_PEAK);
break;
case PMBUS_VIRT_RESET_POUT_HISTORY:
if (data->id != max34446)
return -ENXIO;
ret = 0;
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
case PMBUS_VIRT_RESET_IOUT_HISTORY:
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = 0;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int max34440_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct max34440_data *data = to_max34440_data(info);
int ret;
switch (reg) {
case PMBUS_IOUT_OC_FAULT_LIMIT:
ret = pmbus_write_word_data(client, page, MAX34440_IOUT_OC_FAULT_LIMIT,
word);
break;
case PMBUS_IOUT_OC_WARN_LIMIT:
ret = pmbus_write_word_data(client, page, MAX34440_IOUT_OC_WARN_LIMIT,
word);
break;
case PMBUS_VIRT_RESET_POUT_HISTORY:
ret = pmbus_write_word_data(client, page,
MAX34446_MFR_POUT_PEAK, 0);
if (ret)
break;
ret = pmbus_write_word_data(client, page,
MAX34446_MFR_POUT_AVG, 0);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
ret = pmbus_write_word_data(client, page,
MAX34440_MFR_VOUT_MIN, 0x7fff);
if (ret)
break;
ret = pmbus_write_word_data(client, page,
MAX34440_MFR_VOUT_PEAK, 0);
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
ret = pmbus_write_word_data(client, page,
MAX34440_MFR_IOUT_PEAK, 0);
if (!ret && (data->id == max34446 || data->id == max34451))
ret = pmbus_write_word_data(client, page,
MAX34446_MFR_IOUT_AVG, 0);
break;
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = pmbus_write_word_data(client, page,
MAX34440_MFR_TEMPERATURE_PEAK,
0x8000);
if (!ret && data->id == max34446)
ret = pmbus_write_word_data(client, page,
MAX34446_MFR_TEMPERATURE_AVG, 0);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int max34440_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret = 0;
int mfg_status;
if (page >= 0) {
ret = pmbus_set_page(client, page, 0xff);
if (ret < 0)
return ret;
}
switch (reg) {
case PMBUS_STATUS_IOUT:
mfg_status = pmbus_read_word_data(client, 0, 0xff,
PMBUS_STATUS_MFR_SPECIFIC);
if (mfg_status < 0)
return mfg_status;
if (mfg_status & MAX34440_STATUS_OC_WARN)
ret |= PB_IOUT_OC_WARNING;
if (mfg_status & MAX34440_STATUS_OC_FAULT)
ret |= PB_IOUT_OC_FAULT;
break;
case PMBUS_STATUS_TEMPERATURE:
mfg_status = pmbus_read_word_data(client, 0, 0xff,
PMBUS_STATUS_MFR_SPECIFIC);
if (mfg_status < 0)
return mfg_status;
if (mfg_status & MAX34440_STATUS_OT_WARN)
ret |= PB_TEMP_OT_WARNING;
if (mfg_status & MAX34440_STATUS_OT_FAULT)
ret |= PB_TEMP_OT_FAULT;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int max34451_set_supported_funcs(struct i2c_client *client,
struct max34440_data *data)
{
/*
* Each of the channel 0-15 can be configured to monitor the following
* functions based on MFR_CHANNEL_CONFIG[5:0]
* 0x10: Sequencing + voltage monitoring (only valid for PAGES 0–11)
* 0x20: Voltage monitoring (no sequencing)
* 0x21: Voltage read only
* 0x22: Current monitoring
* 0x23: Current read only
* 0x30: General-purpose input active low
* 0x34: General-purpose input active high
* 0x00: Disabled
*/
int page, rv;
for (page = 0; page < 16; page++) {
rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
if (rv < 0)
return rv;
rv = i2c_smbus_read_word_data(client,
MAX34451_MFR_CHANNEL_CONFIG);
if (rv < 0)
return rv;
switch (rv & MAX34451_MFR_CHANNEL_CONFIG_SEL_MASK) {
case 0x10:
case 0x20:
data->info.func[page] = PMBUS_HAVE_VOUT |
PMBUS_HAVE_STATUS_VOUT;
break;
case 0x21:
data->info.func[page] = PMBUS_HAVE_VOUT;
break;
case 0x22:
data->info.func[page] = PMBUS_HAVE_IOUT |
PMBUS_HAVE_STATUS_IOUT;
break;
case 0x23:
data->info.func[page] = PMBUS_HAVE_IOUT;
break;
default:
break;
}
}
return 0;
}
static struct pmbus_driver_info max34440_info[] = {
[max34440] = {
.pages = 14,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.format[PSC_CURRENT_OUT] = direct,
.m[PSC_VOLTAGE_IN] = 1,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = 3, /* R = 0 in datasheet reflects mV */
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3, /* R = 0 in datasheet reflects mV */
.m[PSC_CURRENT_OUT] = 1,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 3, /* R = 0 in datasheet reflects mA */
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 2,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[2] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[3] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[4] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[5] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[6] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[7] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[8] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[9] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[10] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[11] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[12] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[13] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.read_byte_data = max34440_read_byte_data,
.read_word_data = max34440_read_word_data,
.write_word_data = max34440_write_word_data,
},
[max34441] = {
.pages = 12,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_FAN] = direct,
.m[PSC_VOLTAGE_IN] = 1,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = 3,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_CURRENT_OUT] = 1,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 3,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 2,
.m[PSC_FAN] = 1,
.b[PSC_FAN] = 0,
.R[PSC_FAN] = 0,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[2] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[3] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[4] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[5] = PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12,
.func[6] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[7] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[8] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[9] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[10] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[11] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.read_byte_data = max34440_read_byte_data,
.read_word_data = max34440_read_word_data,
.write_word_data = max34440_write_word_data,
},
[max34446] = {
.pages = 7,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_POWER] = direct,
.m[PSC_VOLTAGE_IN] = 1,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = 3,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_CURRENT_OUT] = 1,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 3,
.m[PSC_POWER] = 1,
.b[PSC_POWER] = 0,
.R[PSC_POWER] = 3,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 2,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[2] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
.func[3] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[4] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[5] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[6] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.read_byte_data = max34440_read_byte_data,
.read_word_data = max34440_read_word_data,
.write_word_data = max34440_write_word_data,
},
[max34451] = {
.pages = 21,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.format[PSC_CURRENT_OUT] = direct,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_CURRENT_OUT] = 1,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 2,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 2,
/* func 0-15 is set dynamically before probing */
.func[16] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[17] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[18] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[19] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[20] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.read_word_data = max34440_read_word_data,
.write_word_data = max34440_write_word_data,
},
[max34460] = {
.pages = 18,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 2,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[2] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[3] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[4] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[5] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[6] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[7] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[8] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[9] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[10] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[11] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[13] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[14] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[15] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[16] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[17] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.read_word_data = max34440_read_word_data,
.write_word_data = max34440_write_word_data,
},
[max34461] = {
.pages = 23,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 2,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[2] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[3] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[4] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[5] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[6] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[7] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[8] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[9] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[10] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[11] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[12] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[13] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[14] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
.func[15] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT,
/* page 16 is reserved */
.func[17] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[18] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[19] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[20] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.func[21] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
.read_word_data = max34440_read_word_data,
.write_word_data = max34440_write_word_data,
},
};
static int max34440_probe(struct i2c_client *client)
{
struct max34440_data *data;
int rv;
data = devm_kzalloc(&client->dev, sizeof(struct max34440_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
data->id = i2c_match_id(max34440_id, client)->driver_data;
data->info = max34440_info[data->id];
if (data->id == max34451) {
rv = max34451_set_supported_funcs(client, data);
if (rv)
return rv;
}
return pmbus_do_probe(client, &data->info);
}
static const struct i2c_device_id max34440_id[] = {
{"max34440", max34440},
{"max34441", max34441},
{"max34446", max34446},
{"max34451", max34451},
{"max34460", max34460},
{"max34461", max34461},
{}
};
MODULE_DEVICE_TABLE(i2c, max34440_id);
/* This is the driver that will be inserted */
static struct i2c_driver max34440_driver = {
.driver = {
.name = "max34440",
},
.probe = max34440_probe,
.id_table = max34440_id,
};
module_i2c_driver(max34440_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for Maxim MAX34440/MAX34441");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/max34440.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for PIM4006, PIM4328 and PIM4820
*
* Copyright (c) 2021 Flextronics International Sweden AB
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pmbus.h>
#include <linux/slab.h>
#include "pmbus.h"
enum chips { pim4006, pim4328, pim4820 };
struct pim4328_data {
enum chips id;
struct pmbus_driver_info info;
};
#define to_pim4328_data(x) container_of(x, struct pim4328_data, info)
/* PIM4006 and PIM4328 */
#define PIM4328_MFR_READ_VINA 0xd3
#define PIM4328_MFR_READ_VINB 0xd4
/* PIM4006 */
#define PIM4328_MFR_READ_IINA 0xd6
#define PIM4328_MFR_READ_IINB 0xd7
#define PIM4328_MFR_FET_CHECKSTATUS 0xd9
/* PIM4328 */
#define PIM4328_MFR_STATUS_BITS 0xd5
/* PIM4820 */
#define PIM4328_MFR_READ_STATUS 0xd0
static const struct i2c_device_id pim4328_id[] = {
{"bmr455", pim4328},
{"pim4006", pim4006},
{"pim4106", pim4006},
{"pim4206", pim4006},
{"pim4306", pim4006},
{"pim4328", pim4328},
{"pim4406", pim4006},
{"pim4820", pim4820},
{}
};
MODULE_DEVICE_TABLE(i2c, pim4328_id);
static int pim4328_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
if (page > 0)
return -ENXIO;
if (phase == 0xff)
return -ENODATA;
switch (reg) {
case PMBUS_READ_VIN:
ret = pmbus_read_word_data(client, page, phase,
phase == 0 ? PIM4328_MFR_READ_VINA
: PIM4328_MFR_READ_VINB);
break;
case PMBUS_READ_IIN:
ret = pmbus_read_word_data(client, page, phase,
phase == 0 ? PIM4328_MFR_READ_IINA
: PIM4328_MFR_READ_IINB);
break;
default:
ret = -ENODATA;
}
return ret;
}
static int pim4328_read_byte_data(struct i2c_client *client, int page, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct pim4328_data *data = to_pim4328_data(info);
int ret, status;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_STATUS_BYTE:
ret = pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE);
if (ret < 0)
return ret;
if (data->id == pim4006) {
status = pmbus_read_word_data(client, page, 0xff,
PIM4328_MFR_FET_CHECKSTATUS);
if (status < 0)
return status;
if (status & 0x0630) /* Input UV */
ret |= PB_STATUS_VIN_UV;
} else if (data->id == pim4328) {
status = pmbus_read_byte_data(client, page,
PIM4328_MFR_STATUS_BITS);
if (status < 0)
return status;
if (status & 0x04) /* Input UV */
ret |= PB_STATUS_VIN_UV;
if (status & 0x40) /* Output UV */
ret |= PB_STATUS_NONE_ABOVE;
} else if (data->id == pim4820) {
status = pmbus_read_byte_data(client, page,
PIM4328_MFR_READ_STATUS);
if (status < 0)
return status;
if (status & 0x05) /* Input OV or OC */
ret |= PB_STATUS_NONE_ABOVE;
if (status & 0x1a) /* Input UV */
ret |= PB_STATUS_VIN_UV;
if (status & 0x40) /* OT */
ret |= PB_STATUS_TEMPERATURE;
}
break;
default:
ret = -ENODATA;
}
return ret;
}
static int pim4328_probe(struct i2c_client *client)
{
int status;
u8 device_id[I2C_SMBUS_BLOCK_MAX + 1];
const struct i2c_device_id *mid;
struct pim4328_data *data;
struct pmbus_driver_info *info;
struct pmbus_platform_data *pdata;
struct device *dev = &client->dev;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA
| I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
data = devm_kzalloc(&client->dev, sizeof(struct pim4328_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
status = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, device_id);
if (status < 0) {
dev_err(&client->dev, "Failed to read Manufacturer Model\n");
return status;
}
for (mid = pim4328_id; mid->name[0]; mid++) {
if (!strncasecmp(mid->name, device_id, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
if (strcmp(client->name, mid->name))
dev_notice(&client->dev,
"Device mismatch: Configured %s, detected %s\n",
client->name, mid->name);
data->id = mid->driver_data;
info = &data->info;
info->pages = 1;
info->read_byte_data = pim4328_read_byte_data;
info->read_word_data = pim4328_read_word_data;
pdata = devm_kzalloc(dev, sizeof(struct pmbus_platform_data),
GFP_KERNEL);
if (!pdata)
return -ENOMEM;
dev->platform_data = pdata;
pdata->flags = PMBUS_NO_CAPABILITY | PMBUS_NO_WRITE_PROTECT;
switch (data->id) {
case pim4006:
info->phases[0] = 2;
info->func[0] = PMBUS_PHASE_VIRTUAL | PMBUS_HAVE_VIN
| PMBUS_HAVE_TEMP | PMBUS_HAVE_IOUT;
info->pfunc[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN;
info->pfunc[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN;
break;
case pim4328:
info->phases[0] = 2;
info->func[0] = PMBUS_PHASE_VIRTUAL
| PMBUS_HAVE_VCAP | PMBUS_HAVE_VIN
| PMBUS_HAVE_TEMP | PMBUS_HAVE_IOUT;
info->pfunc[0] = PMBUS_HAVE_VIN;
info->pfunc[1] = PMBUS_HAVE_VIN;
info->format[PSC_VOLTAGE_IN] = direct;
info->format[PSC_TEMPERATURE] = direct;
info->format[PSC_CURRENT_OUT] = direct;
pdata->flags |= PMBUS_USE_COEFFICIENTS_CMD;
break;
case pim4820:
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_TEMP
| PMBUS_HAVE_IIN;
info->format[PSC_VOLTAGE_IN] = direct;
info->format[PSC_TEMPERATURE] = direct;
info->format[PSC_CURRENT_IN] = direct;
pdata->flags |= PMBUS_USE_COEFFICIENTS_CMD;
break;
default:
return -ENODEV;
}
return pmbus_do_probe(client, info);
}
static struct i2c_driver pim4328_driver = {
.driver = {
.name = "pim4328",
},
.probe = pim4328_probe,
.id_table = pim4328_id,
};
module_i2c_driver(pim4328_driver);
MODULE_AUTHOR("Erik Rosen <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for PIM4006, PIM4328, PIM4820 power interface modules");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/pim4328.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for LTC3815
*
* Copyright (c) 2015 Linear Technology
* Copyright (c) 2015 Guenter Roeck
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
#define LTC3815_MFR_IOUT_PEAK 0xd7
#define LTC3815_MFR_VOUT_PEAK 0xdd
#define LTC3815_MFR_VIN_PEAK 0xde
#define LTC3815_MFR_TEMP_PEAK 0xdf
#define LTC3815_MFR_IIN_PEAK 0xe1
#define LTC3815_MFR_SPECIAL_ID 0xe7
#define LTC3815_ID 0x8000
#define LTC3815_ID_MASK 0xff00
static int ltc3815_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret;
switch (reg) {
case PMBUS_VOUT_MODE:
/*
* The chip returns 0x3e, suggesting VID mode with manufacturer
* specific VID codes. Since the output voltage is reported
* with a LSB of 0.5mV, override and report direct mode with
* appropriate coefficients.
*/
ret = 0x40;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int ltc3815_write_byte(struct i2c_client *client, int page, u8 reg)
{
int ret;
switch (reg) {
case PMBUS_CLEAR_FAULTS:
/*
* LTC3815 does not support the CLEAR_FAULTS command.
* Emulate it by clearing the status register.
*/
ret = pmbus_read_word_data(client, 0, 0xff, PMBUS_STATUS_WORD);
if (ret > 0) {
pmbus_write_word_data(client, 0, PMBUS_STATUS_WORD,
ret);
ret = 0;
}
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int ltc3815_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
switch (reg) {
case PMBUS_VIRT_READ_VIN_MAX:
ret = pmbus_read_word_data(client, page, phase,
LTC3815_MFR_VIN_PEAK);
break;
case PMBUS_VIRT_READ_VOUT_MAX:
ret = pmbus_read_word_data(client, page, phase,
LTC3815_MFR_VOUT_PEAK);
break;
case PMBUS_VIRT_READ_TEMP_MAX:
ret = pmbus_read_word_data(client, page, phase,
LTC3815_MFR_TEMP_PEAK);
break;
case PMBUS_VIRT_READ_IOUT_MAX:
ret = pmbus_read_word_data(client, page, phase,
LTC3815_MFR_IOUT_PEAK);
break;
case PMBUS_VIRT_READ_IIN_MAX:
ret = pmbus_read_word_data(client, page, phase,
LTC3815_MFR_IIN_PEAK);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
case PMBUS_VIRT_RESET_VIN_HISTORY:
case PMBUS_VIRT_RESET_TEMP_HISTORY:
case PMBUS_VIRT_RESET_IOUT_HISTORY:
case PMBUS_VIRT_RESET_IIN_HISTORY:
ret = 0;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int ltc3815_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
int ret;
switch (reg) {
case PMBUS_VIRT_RESET_IIN_HISTORY:
ret = pmbus_write_word_data(client, page,
LTC3815_MFR_IIN_PEAK, 0);
break;
case PMBUS_VIRT_RESET_IOUT_HISTORY:
ret = pmbus_write_word_data(client, page,
LTC3815_MFR_IOUT_PEAK, 0);
break;
case PMBUS_VIRT_RESET_VOUT_HISTORY:
ret = pmbus_write_word_data(client, page,
LTC3815_MFR_VOUT_PEAK, 0);
break;
case PMBUS_VIRT_RESET_VIN_HISTORY:
ret = pmbus_write_word_data(client, page,
LTC3815_MFR_VIN_PEAK, 0);
break;
case PMBUS_VIRT_RESET_TEMP_HISTORY:
ret = pmbus_write_word_data(client, page,
LTC3815_MFR_TEMP_PEAK, 0);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static const struct i2c_device_id ltc3815_id[] = {
{"ltc3815", 0},
{ }
};
MODULE_DEVICE_TABLE(i2c, ltc3815_id);
static struct pmbus_driver_info ltc3815_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_CURRENT_IN] = direct,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_VOLTAGE_IN] = 250,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = 0,
.m[PSC_VOLTAGE_OUT] = 2,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_CURRENT_IN] = 1,
.b[PSC_CURRENT_IN] = 0,
.R[PSC_CURRENT_IN] = 2,
.m[PSC_CURRENT_OUT] = 1,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 2,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 0,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP,
.read_byte_data = ltc3815_read_byte_data,
.read_word_data = ltc3815_read_word_data,
.write_byte = ltc3815_write_byte,
.write_word_data = ltc3815_write_word_data,
};
static int ltc3815_probe(struct i2c_client *client)
{
int chip_id;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_WORD_DATA))
return -ENODEV;
chip_id = i2c_smbus_read_word_data(client, LTC3815_MFR_SPECIAL_ID);
if (chip_id < 0)
return chip_id;
if ((chip_id & LTC3815_ID_MASK) != LTC3815_ID)
return -ENODEV;
return pmbus_do_probe(client, <c3815_info);
}
static struct i2c_driver ltc3815_driver = {
.driver = {
.name = "ltc3815",
},
.probe = ltc3815_probe,
.id_table = ltc3815_id,
};
module_i2c_driver(ltc3815_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for LTC3815");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/ltc3815.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for TI TPS40422
*
* Copyright (c) 2014 Nokia Solutions and Networks.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include "pmbus.h"
static struct pmbus_driver_info tps40422_info = {
.pages = 2,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_TEMPERATURE] = linear,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_TEMP2
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_TEMP2
| PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
};
static int tps40422_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &tps40422_info);
}
static const struct i2c_device_id tps40422_id[] = {
{"tps40422", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, tps40422_id);
/* This is the driver that will be inserted */
static struct i2c_driver tps40422_driver = {
.driver = {
.name = "tps40422",
},
.probe = tps40422_probe,
.id_table = tps40422_id,
};
module_i2c_driver(tps40422_driver);
MODULE_AUTHOR("Zhu Laiwen <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for TI TPS40422");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/tps40422.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for FSP 3Y-Power PSUs
*
* Copyright (c) 2021 Václav Kubernát, CESNET
*
* This driver is mostly reverse engineered with the help of a tool called pmbus_peek written by
* David Brownell (and later adopted by Jan Kundrát). The device has some sort of a timing issue
* when switching pages, details are explained in the code. The driver support is limited. It
* exposes only the values, that have been tested to work correctly. Unsupported values either
* aren't supported by the devices or their encondings are unknown.
*/
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
#define YM2151_PAGE_12V_LOG 0x00
#define YM2151_PAGE_12V_REAL 0x00
#define YM2151_PAGE_5VSB_LOG 0x01
#define YM2151_PAGE_5VSB_REAL 0x20
#define YH5151E_PAGE_12V_LOG 0x00
#define YH5151E_PAGE_12V_REAL 0x00
#define YH5151E_PAGE_5V_LOG 0x01
#define YH5151E_PAGE_5V_REAL 0x10
#define YH5151E_PAGE_3V3_LOG 0x02
#define YH5151E_PAGE_3V3_REAL 0x11
enum chips {
ym2151e,
yh5151e
};
struct fsp3y_data {
struct pmbus_driver_info info;
int chip;
int page;
bool vout_linear_11;
};
#define to_fsp3y_data(x) container_of(x, struct fsp3y_data, info)
static int page_log_to_page_real(int page_log, enum chips chip)
{
switch (chip) {
case ym2151e:
switch (page_log) {
case YM2151_PAGE_12V_LOG:
return YM2151_PAGE_12V_REAL;
case YM2151_PAGE_5VSB_LOG:
return YM2151_PAGE_5VSB_REAL;
}
return -EINVAL;
case yh5151e:
switch (page_log) {
case YH5151E_PAGE_12V_LOG:
return YH5151E_PAGE_12V_REAL;
case YH5151E_PAGE_5V_LOG:
return YH5151E_PAGE_5V_REAL;
case YH5151E_PAGE_3V3_LOG:
return YH5151E_PAGE_3V3_REAL;
}
return -EINVAL;
}
return -EINVAL;
}
static int set_page(struct i2c_client *client, int page_log)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct fsp3y_data *data = to_fsp3y_data(info);
int rv;
int page_real;
if (page_log < 0)
return 0;
page_real = page_log_to_page_real(page_log, data->chip);
if (page_real < 0)
return page_real;
if (data->page != page_real) {
rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page_real);
if (rv < 0)
return rv;
data->page = page_real;
/*
* Testing showed that the device has a timing issue. After
* setting a page, it takes a while, before the device actually
* gives the correct values from the correct page. 20 ms was
* tested to be enough to not give wrong values (15 ms wasn't
* enough).
*/
usleep_range(20000, 30000);
}
return 0;
}
static int fsp3y_read_byte_data(struct i2c_client *client, int page, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct fsp3y_data *data = to_fsp3y_data(info);
int rv;
/*
* Inject an exponent for non-compliant YH5151-E.
*/
if (data->vout_linear_11 && reg == PMBUS_VOUT_MODE)
return 0x1A;
rv = set_page(client, page);
if (rv < 0)
return rv;
return i2c_smbus_read_byte_data(client, reg);
}
static int fsp3y_read_word_data(struct i2c_client *client, int page, int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct fsp3y_data *data = to_fsp3y_data(info);
int rv;
/*
* This masks commands which weren't tested to work correctly. Some of
* the masked commands return 0xFFFF. These would probably get tagged as
* invalid by pmbus_core. Other ones do return values which might be
* useful (that is, they are not 0xFFFF), but their encoding is unknown,
* and so they are unsupported.
*/
switch (reg) {
case PMBUS_READ_FAN_SPEED_1:
case PMBUS_READ_IIN:
case PMBUS_READ_IOUT:
case PMBUS_READ_PIN:
case PMBUS_READ_POUT:
case PMBUS_READ_TEMPERATURE_1:
case PMBUS_READ_TEMPERATURE_2:
case PMBUS_READ_TEMPERATURE_3:
case PMBUS_READ_VIN:
case PMBUS_READ_VOUT:
case PMBUS_STATUS_WORD:
break;
default:
return -ENXIO;
}
rv = set_page(client, page);
if (rv < 0)
return rv;
rv = i2c_smbus_read_word_data(client, reg);
if (rv < 0)
return rv;
/*
* Handle YH-5151E non-compliant linear11 vout voltage.
*/
if (data->vout_linear_11 && reg == PMBUS_READ_VOUT)
rv = sign_extend32(rv, 10) & 0xffff;
return rv;
}
static struct pmbus_driver_info fsp3y_info[] = {
[ym2151e] = {
.pages = 2,
.func[YM2151_PAGE_12V_LOG] =
PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_POUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 |
PMBUS_HAVE_VIN | PMBUS_HAVE_IIN |
PMBUS_HAVE_FAN12,
.func[YM2151_PAGE_5VSB_LOG] =
PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT,
.read_word_data = fsp3y_read_word_data,
.read_byte_data = fsp3y_read_byte_data,
},
[yh5151e] = {
.pages = 3,
.func[YH5151E_PAGE_12V_LOG] =
PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_POUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_TEMP3,
.func[YH5151E_PAGE_5V_LOG] =
PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_POUT,
.func[YH5151E_PAGE_3V3_LOG] =
PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT |
PMBUS_HAVE_POUT,
.read_word_data = fsp3y_read_word_data,
.read_byte_data = fsp3y_read_byte_data,
}
};
static int fsp3y_detect(struct i2c_client *client)
{
int rv;
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
rv = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (rv < 0)
return rv;
buf[rv] = '\0';
if (rv == 8) {
if (!strcmp(buf, "YM-2151E"))
return ym2151e;
else if (!strcmp(buf, "YH-5151E"))
return yh5151e;
}
dev_err(&client->dev, "Unsupported model %.*s\n", rv, buf);
return -ENODEV;
}
static const struct i2c_device_id fsp3y_id[] = {
{"ym2151e", ym2151e},
{"yh5151e", yh5151e},
{ }
};
static int fsp3y_probe(struct i2c_client *client)
{
struct fsp3y_data *data;
const struct i2c_device_id *id;
int rv;
data = devm_kzalloc(&client->dev, sizeof(struct fsp3y_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->chip = fsp3y_detect(client);
if (data->chip < 0)
return data->chip;
id = i2c_match_id(fsp3y_id, client);
if (data->chip != id->driver_data)
dev_warn(&client->dev, "Device mismatch: Configured %s (%d), detected %d\n",
id->name, (int)id->driver_data, data->chip);
rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
if (rv < 0)
return rv;
data->page = rv;
data->info = fsp3y_info[data->chip];
/*
* YH-5151E sometimes reports vout in linear11 and sometimes in
* linear16. This depends on the exact individual piece of hardware. One
* YH-5151E can use linear16 and another might use linear11 instead.
*
* The format can be recognized by reading VOUT_MODE - if it doesn't
* report a valid exponent, then vout uses linear11. Otherwise, the
* device is compliant and uses linear16.
*/
data->vout_linear_11 = false;
if (data->chip == yh5151e) {
rv = i2c_smbus_read_byte_data(client, PMBUS_VOUT_MODE);
if (rv < 0)
return rv;
if (rv == 0xFF)
data->vout_linear_11 = true;
}
return pmbus_do_probe(client, &data->info);
}
MODULE_DEVICE_TABLE(i2c, fsp3y_id);
static struct i2c_driver fsp3y_driver = {
.driver = {
.name = "fsp3y",
},
.probe = fsp3y_probe,
.id_table = fsp3y_id
};
module_i2c_driver(fsp3y_driver);
MODULE_AUTHOR("Václav Kubernát");
MODULE_DESCRIPTION("PMBus driver for FSP/3Y-Power power supplies");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/fsp-3y.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2017 IBM Corp.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include "pmbus.h"
enum max31785_regs {
MFR_REVISION = 0x9b,
MFR_FAN_CONFIG = 0xf1,
};
#define MAX31785 0x3030
#define MAX31785A 0x3040
#define MAX31785B 0x3061
#define MFR_FAN_CONFIG_DUAL_TACH BIT(12)
#define MAX31785_NR_PAGES 23
#define MAX31785_NR_FAN_PAGES 6
static int max31785_read_byte_data(struct i2c_client *client, int page,
int reg)
{
if (page < MAX31785_NR_PAGES)
return -ENODATA;
switch (reg) {
case PMBUS_VOUT_MODE:
return -ENOTSUPP;
case PMBUS_FAN_CONFIG_12:
return pmbus_read_byte_data(client, page - MAX31785_NR_PAGES,
reg);
}
return -ENODATA;
}
static int max31785_write_byte(struct i2c_client *client, int page, u8 value)
{
if (page < MAX31785_NR_PAGES)
return -ENODATA;
return -ENOTSUPP;
}
static int max31785_read_long_data(struct i2c_client *client, int page,
int reg, u32 *data)
{
unsigned char cmdbuf[1];
unsigned char rspbuf[4];
int rc;
struct i2c_msg msg[2] = {
{
.addr = client->addr,
.flags = 0,
.len = sizeof(cmdbuf),
.buf = cmdbuf,
},
{
.addr = client->addr,
.flags = I2C_M_RD,
.len = sizeof(rspbuf),
.buf = rspbuf,
},
};
cmdbuf[0] = reg;
rc = pmbus_set_page(client, page, 0xff);
if (rc < 0)
return rc;
rc = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
if (rc < 0)
return rc;
*data = (rspbuf[0] << (0 * 8)) | (rspbuf[1] << (1 * 8)) |
(rspbuf[2] << (2 * 8)) | (rspbuf[3] << (3 * 8));
return rc;
}
static int max31785_get_pwm(struct i2c_client *client, int page)
{
int rv;
rv = pmbus_get_fan_rate_device(client, page, 0, percent);
if (rv < 0)
return rv;
else if (rv >= 0x8000)
return 0;
else if (rv >= 0x2711)
return 0x2710;
return rv;
}
static int max31785_get_pwm_mode(struct i2c_client *client, int page)
{
int config;
int command;
config = pmbus_read_byte_data(client, page, PMBUS_FAN_CONFIG_12);
if (config < 0)
return config;
command = pmbus_read_word_data(client, page, 0xff, PMBUS_FAN_COMMAND_1);
if (command < 0)
return command;
if (config & PB_FAN_1_RPM)
return (command >= 0x8000) ? 3 : 2;
if (command >= 0x8000)
return 3;
else if (command >= 0x2711)
return 0;
return 1;
}
static int max31785_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
u32 val;
int rv;
switch (reg) {
case PMBUS_READ_FAN_SPEED_1:
if (page < MAX31785_NR_PAGES)
return -ENODATA;
rv = max31785_read_long_data(client, page - MAX31785_NR_PAGES,
reg, &val);
if (rv < 0)
return rv;
rv = (val >> 16) & 0xffff;
break;
case PMBUS_FAN_COMMAND_1:
/*
* PMBUS_FAN_COMMAND_x is probed to judge whether or not to
* expose fan control registers.
*
* Don't expose fan_target attribute for virtual pages.
*/
rv = (page >= MAX31785_NR_PAGES) ? -ENOTSUPP : -ENODATA;
break;
case PMBUS_VIRT_PWM_1:
rv = max31785_get_pwm(client, page);
break;
case PMBUS_VIRT_PWM_ENABLE_1:
rv = max31785_get_pwm_mode(client, page);
break;
default:
rv = -ENODATA;
break;
}
return rv;
}
static inline u32 max31785_scale_pwm(u32 sensor_val)
{
/*
* The datasheet describes the accepted value range for manual PWM as
* [0, 0x2710], while the hwmon pwmX sysfs interface accepts values in
* [0, 255]. The MAX31785 uses DIRECT mode to scale the FAN_COMMAND
* registers and in PWM mode the coefficients are m=1, b=0, R=2. The
* important observation here is that 0x2710 == 10000 == 100 * 100.
*
* R=2 (== 10^2 == 100) accounts for scaling the value provided at the
* sysfs interface into the required hardware resolution, but it does
* not yet yield a value that we can write to the device (this initial
* scaling is handled by pmbus_data2reg()). Multiplying by 100 below
* translates the parameter value into the percentage units required by
* PMBus, and then we scale back by 255 as required by the hwmon pwmX
* interface to yield the percentage value at the appropriate
* resolution for hardware.
*/
return (sensor_val * 100) / 255;
}
static int max31785_pwm_enable(struct i2c_client *client, int page,
u16 word)
{
int config = 0;
int rate;
switch (word) {
case 0:
rate = 0x7fff;
break;
case 1:
rate = pmbus_get_fan_rate_cached(client, page, 0, percent);
if (rate < 0)
return rate;
rate = max31785_scale_pwm(rate);
break;
case 2:
config = PB_FAN_1_RPM;
rate = pmbus_get_fan_rate_cached(client, page, 0, rpm);
if (rate < 0)
return rate;
break;
case 3:
rate = 0xffff;
break;
default:
return -EINVAL;
}
return pmbus_update_fan(client, page, 0, config, PB_FAN_1_RPM, rate);
}
static int max31785_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
switch (reg) {
case PMBUS_VIRT_PWM_1:
return pmbus_update_fan(client, page, 0, 0, PB_FAN_1_RPM,
max31785_scale_pwm(word));
case PMBUS_VIRT_PWM_ENABLE_1:
return max31785_pwm_enable(client, page, word);
default:
break;
}
return -ENODATA;
}
#define MAX31785_FAN_FUNCS \
(PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 | PMBUS_HAVE_PWM12)
#define MAX31785_TEMP_FUNCS \
(PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP)
#define MAX31785_VOUT_FUNCS \
(PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT)
static const struct pmbus_driver_info max31785_info = {
.pages = MAX31785_NR_PAGES,
.write_word_data = max31785_write_word_data,
.read_byte_data = max31785_read_byte_data,
.read_word_data = max31785_read_word_data,
.write_byte = max31785_write_byte,
/* RPM */
.format[PSC_FAN] = direct,
.m[PSC_FAN] = 1,
.b[PSC_FAN] = 0,
.R[PSC_FAN] = 0,
/* PWM */
.format[PSC_PWM] = direct,
.m[PSC_PWM] = 1,
.b[PSC_PWM] = 0,
.R[PSC_PWM] = 2,
.func[0] = MAX31785_FAN_FUNCS,
.func[1] = MAX31785_FAN_FUNCS,
.func[2] = MAX31785_FAN_FUNCS,
.func[3] = MAX31785_FAN_FUNCS,
.func[4] = MAX31785_FAN_FUNCS,
.func[5] = MAX31785_FAN_FUNCS,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 2,
.func[6] = MAX31785_TEMP_FUNCS,
.func[7] = MAX31785_TEMP_FUNCS,
.func[8] = MAX31785_TEMP_FUNCS,
.func[9] = MAX31785_TEMP_FUNCS,
.func[10] = MAX31785_TEMP_FUNCS,
.func[11] = MAX31785_TEMP_FUNCS,
.func[12] = MAX31785_TEMP_FUNCS,
.func[13] = MAX31785_TEMP_FUNCS,
.func[14] = MAX31785_TEMP_FUNCS,
.func[15] = MAX31785_TEMP_FUNCS,
.func[16] = MAX31785_TEMP_FUNCS,
.format[PSC_VOLTAGE_OUT] = direct,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 0,
.func[17] = MAX31785_VOUT_FUNCS,
.func[18] = MAX31785_VOUT_FUNCS,
.func[19] = MAX31785_VOUT_FUNCS,
.func[20] = MAX31785_VOUT_FUNCS,
.func[21] = MAX31785_VOUT_FUNCS,
.func[22] = MAX31785_VOUT_FUNCS,
};
static int max31785_configure_dual_tach(struct i2c_client *client,
struct pmbus_driver_info *info)
{
int ret;
int i;
for (i = 0; i < MAX31785_NR_FAN_PAGES; i++) {
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
if (ret < 0)
return ret;
ret = i2c_smbus_read_word_data(client, MFR_FAN_CONFIG);
if (ret < 0)
return ret;
if (ret & MFR_FAN_CONFIG_DUAL_TACH) {
int virtual = MAX31785_NR_PAGES + i;
info->pages = virtual + 1;
info->func[virtual] |= PMBUS_HAVE_FAN12;
info->func[virtual] |= PMBUS_PAGE_VIRTUAL;
}
}
return 0;
}
static int max31785_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct pmbus_driver_info *info;
bool dual_tach = false;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
info = devm_kzalloc(dev, sizeof(struct pmbus_driver_info), GFP_KERNEL);
if (!info)
return -ENOMEM;
*info = max31785_info;
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 255);
if (ret < 0)
return ret;
ret = i2c_smbus_read_word_data(client, MFR_REVISION);
if (ret < 0)
return ret;
if (ret == MAX31785A || ret == MAX31785B) {
dual_tach = true;
} else if (ret == MAX31785) {
if (!strcmp("max31785a", client->name) ||
!strcmp("max31785b", client->name))
dev_warn(dev, "Expected max31785a/b, found max31785: cannot provide secondary tachometer readings\n");
} else {
dev_err(dev, "Unrecognized MAX31785 revision: %x\n", ret);
return -ENODEV;
}
if (dual_tach) {
ret = max31785_configure_dual_tach(client, info);
if (ret < 0)
return ret;
}
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id max31785_id[] = {
{ "max31785", 0 },
{ "max31785a", 0 },
{ "max31785b", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, max31785_id);
static const struct of_device_id max31785_of_match[] = {
{ .compatible = "maxim,max31785" },
{ .compatible = "maxim,max31785a" },
{ .compatible = "maxim,max31785b" },
{ },
};
MODULE_DEVICE_TABLE(of, max31785_of_match);
static struct i2c_driver max31785_driver = {
.driver = {
.name = "max31785",
.of_match_table = max31785_of_match,
},
.probe = max31785_probe,
.id_table = max31785_id,
};
module_i2c_driver(max31785_driver);
MODULE_AUTHOR("Andrew Jeffery <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for the Maxim MAX31785");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
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linux-master
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drivers/hwmon/pmbus/max31785.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Maxim MAX15301
*
* Copyright (c) 2021 Flextronics International Sweden AB
*
* Even though the specification does not specifically mention it,
* extensive empirical testing has revealed that auto-detection of
* limit-registers will fail in a random fashion unless the delay
* parameter is set to above about 80us. The default delay is set
* to 100us to include some safety margin.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/ktime.h>
#include <linux/delay.h>
#include <linux/pmbus.h>
#include "pmbus.h"
static const struct i2c_device_id max15301_id[] = {
{"bmr461", 0},
{"max15301", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, max15301_id);
struct max15301_data {
int id;
ktime_t access; /* Chip access time */
int delay; /* Delay between chip accesses in us */
struct pmbus_driver_info info;
};
#define to_max15301_data(x) container_of(x, struct max15301_data, info)
#define MAX15301_WAIT_TIME 100 /* us */
static ushort delay = MAX15301_WAIT_TIME;
module_param(delay, ushort, 0644);
MODULE_PARM_DESC(delay, "Delay between chip accesses in us");
static struct max15301_data max15301_data = {
.info = {
.pages = 1,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
| PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT,
}
};
/* This chip needs a delay between accesses */
static inline void max15301_wait(const struct max15301_data *data)
{
if (data->delay) {
s64 delta = ktime_us_delta(ktime_get(), data->access);
if (delta < data->delay)
udelay(data->delay - delta);
}
}
static int max15301_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max15301_data *data = to_max15301_data(info);
int ret;
if (page > 0)
return -ENXIO;
if (reg >= PMBUS_VIRT_BASE)
return -ENXIO;
max15301_wait(data);
ret = pmbus_read_word_data(client, page, phase, reg);
data->access = ktime_get();
return ret;
}
static int max15301_read_byte_data(struct i2c_client *client, int page, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max15301_data *data = to_max15301_data(info);
int ret;
if (page > 0)
return -ENXIO;
max15301_wait(data);
ret = pmbus_read_byte_data(client, page, reg);
data->access = ktime_get();
return ret;
}
static int max15301_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max15301_data *data = to_max15301_data(info);
int ret;
if (page > 0)
return -ENXIO;
if (reg >= PMBUS_VIRT_BASE)
return -ENXIO;
max15301_wait(data);
ret = pmbus_write_word_data(client, page, reg, word);
data->access = ktime_get();
return ret;
}
static int max15301_write_byte(struct i2c_client *client, int page, u8 value)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct max15301_data *data = to_max15301_data(info);
int ret;
if (page > 0)
return -ENXIO;
max15301_wait(data);
ret = pmbus_write_byte(client, page, value);
data->access = ktime_get();
return ret;
}
static int max15301_probe(struct i2c_client *client)
{
int status;
u8 device_id[I2C_SMBUS_BLOCK_MAX + 1];
const struct i2c_device_id *mid;
struct pmbus_driver_info *info = &max15301_data.info;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA
| I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
status = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, device_id);
if (status < 0) {
dev_err(&client->dev, "Failed to read Device Id\n");
return status;
}
for (mid = max15301_id; mid->name[0]; mid++) {
if (!strncasecmp(mid->name, device_id, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
max15301_data.delay = delay;
info->read_byte_data = max15301_read_byte_data;
info->read_word_data = max15301_read_word_data;
info->write_byte = max15301_write_byte;
info->write_word_data = max15301_write_word_data;
return pmbus_do_probe(client, info);
}
static struct i2c_driver max15301_driver = {
.driver = {
.name = "max15301",
},
.probe = max15301_probe,
.id_table = max15301_id,
};
module_i2c_driver(max15301_driver);
MODULE_AUTHOR("Erik Rosen <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Maxim MAX15301");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
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linux-master
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drivers/hwmon/pmbus/max15301.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for PMBus devices
*
* Copyright (c) 2010, 2011 Ericsson AB.
* Copyright (c) 2012 Guenter Roeck
*/
#include <linux/debugfs.h>
#include <linux/kernel.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/pmbus.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/of.h>
#include <linux/thermal.h>
#include "pmbus.h"
/*
* Number of additional attribute pointers to allocate
* with each call to krealloc
*/
#define PMBUS_ATTR_ALLOC_SIZE 32
#define PMBUS_NAME_SIZE 24
struct pmbus_sensor {
struct pmbus_sensor *next;
char name[PMBUS_NAME_SIZE]; /* sysfs sensor name */
struct device_attribute attribute;
u8 page; /* page number */
u8 phase; /* phase number, 0xff for all phases */
u16 reg; /* register */
enum pmbus_sensor_classes class; /* sensor class */
bool update; /* runtime sensor update needed */
bool convert; /* Whether or not to apply linear/vid/direct */
int data; /* Sensor data.
Negative if there was a read error */
};
#define to_pmbus_sensor(_attr) \
container_of(_attr, struct pmbus_sensor, attribute)
struct pmbus_boolean {
char name[PMBUS_NAME_SIZE]; /* sysfs boolean name */
struct sensor_device_attribute attribute;
struct pmbus_sensor *s1;
struct pmbus_sensor *s2;
};
#define to_pmbus_boolean(_attr) \
container_of(_attr, struct pmbus_boolean, attribute)
struct pmbus_label {
char name[PMBUS_NAME_SIZE]; /* sysfs label name */
struct device_attribute attribute;
char label[PMBUS_NAME_SIZE]; /* label */
};
#define to_pmbus_label(_attr) \
container_of(_attr, struct pmbus_label, attribute)
/* Macros for converting between sensor index and register/page/status mask */
#define PB_STATUS_MASK 0xffff
#define PB_REG_SHIFT 16
#define PB_REG_MASK 0x3ff
#define PB_PAGE_SHIFT 26
#define PB_PAGE_MASK 0x3f
#define pb_reg_to_index(page, reg, mask) (((page) << PB_PAGE_SHIFT) | \
((reg) << PB_REG_SHIFT) | (mask))
#define pb_index_to_page(index) (((index) >> PB_PAGE_SHIFT) & PB_PAGE_MASK)
#define pb_index_to_reg(index) (((index) >> PB_REG_SHIFT) & PB_REG_MASK)
#define pb_index_to_mask(index) ((index) & PB_STATUS_MASK)
struct pmbus_data {
struct device *dev;
struct device *hwmon_dev;
struct regulator_dev **rdevs;
u32 flags; /* from platform data */
int exponent[PMBUS_PAGES];
/* linear mode: exponent for output voltages */
const struct pmbus_driver_info *info;
int max_attributes;
int num_attributes;
struct attribute_group group;
const struct attribute_group **groups;
struct dentry *debugfs; /* debugfs device directory */
struct pmbus_sensor *sensors;
struct mutex update_lock;
bool has_status_word; /* device uses STATUS_WORD register */
int (*read_status)(struct i2c_client *client, int page);
s16 currpage; /* current page, -1 for unknown/unset */
s16 currphase; /* current phase, 0xff for all, -1 for unknown/unset */
int vout_low[PMBUS_PAGES]; /* voltage low margin */
int vout_high[PMBUS_PAGES]; /* voltage high margin */
};
struct pmbus_debugfs_entry {
struct i2c_client *client;
u8 page;
u8 reg;
};
static const int pmbus_fan_rpm_mask[] = {
PB_FAN_1_RPM,
PB_FAN_2_RPM,
PB_FAN_1_RPM,
PB_FAN_2_RPM,
};
static const int pmbus_fan_config_registers[] = {
PMBUS_FAN_CONFIG_12,
PMBUS_FAN_CONFIG_12,
PMBUS_FAN_CONFIG_34,
PMBUS_FAN_CONFIG_34
};
static const int pmbus_fan_command_registers[] = {
PMBUS_FAN_COMMAND_1,
PMBUS_FAN_COMMAND_2,
PMBUS_FAN_COMMAND_3,
PMBUS_FAN_COMMAND_4,
};
void pmbus_clear_cache(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor *sensor;
for (sensor = data->sensors; sensor; sensor = sensor->next)
sensor->data = -ENODATA;
}
EXPORT_SYMBOL_NS_GPL(pmbus_clear_cache, PMBUS);
void pmbus_set_update(struct i2c_client *client, u8 reg, bool update)
{
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor *sensor;
for (sensor = data->sensors; sensor; sensor = sensor->next)
if (sensor->reg == reg)
sensor->update = update;
}
EXPORT_SYMBOL_NS_GPL(pmbus_set_update, PMBUS);
int pmbus_set_page(struct i2c_client *client, int page, int phase)
{
struct pmbus_data *data = i2c_get_clientdata(client);
int rv;
if (page < 0)
return 0;
if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
data->info->pages > 1 && page != data->currpage) {
rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
if (rv < 0)
return rv;
rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
if (rv < 0)
return rv;
if (rv != page)
return -EIO;
}
data->currpage = page;
if (data->info->phases[page] && data->currphase != phase &&
!(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) {
rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
phase);
if (rv)
return rv;
}
data->currphase = phase;
return 0;
}
EXPORT_SYMBOL_NS_GPL(pmbus_set_page, PMBUS);
int pmbus_write_byte(struct i2c_client *client, int page, u8 value)
{
int rv;
rv = pmbus_set_page(client, page, 0xff);
if (rv < 0)
return rv;
return i2c_smbus_write_byte(client, value);
}
EXPORT_SYMBOL_NS_GPL(pmbus_write_byte, PMBUS);
/*
* _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if
* a device specific mapping function exists and calls it if necessary.
*/
static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value)
{
struct pmbus_data *data = i2c_get_clientdata(client);
const struct pmbus_driver_info *info = data->info;
int status;
if (info->write_byte) {
status = info->write_byte(client, page, value);
if (status != -ENODATA)
return status;
}
return pmbus_write_byte(client, page, value);
}
int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
u16 word)
{
int rv;
rv = pmbus_set_page(client, page, 0xff);
if (rv < 0)
return rv;
return i2c_smbus_write_word_data(client, reg, word);
}
EXPORT_SYMBOL_NS_GPL(pmbus_write_word_data, PMBUS);
static int pmbus_write_virt_reg(struct i2c_client *client, int page, int reg,
u16 word)
{
int bit;
int id;
int rv;
switch (reg) {
case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
id = reg - PMBUS_VIRT_FAN_TARGET_1;
bit = pmbus_fan_rpm_mask[id];
rv = pmbus_update_fan(client, page, id, bit, bit, word);
break;
default:
rv = -ENXIO;
break;
}
return rv;
}
/*
* _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if
* a device specific mapping function exists and calls it if necessary.
*/
static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
struct pmbus_data *data = i2c_get_clientdata(client);
const struct pmbus_driver_info *info = data->info;
int status;
if (info->write_word_data) {
status = info->write_word_data(client, page, reg, word);
if (status != -ENODATA)
return status;
}
if (reg >= PMBUS_VIRT_BASE)
return pmbus_write_virt_reg(client, page, reg, word);
return pmbus_write_word_data(client, page, reg, word);
}
/*
* _pmbus_write_byte_data() is similar to pmbus_write_byte_data(), but checks if
* a device specific mapping function exists and calls it if necessary.
*/
static int _pmbus_write_byte_data(struct i2c_client *client, int page, int reg, u8 value)
{
struct pmbus_data *data = i2c_get_clientdata(client);
const struct pmbus_driver_info *info = data->info;
int status;
if (info->write_byte_data) {
status = info->write_byte_data(client, page, reg, value);
if (status != -ENODATA)
return status;
}
return pmbus_write_byte_data(client, page, reg, value);
}
/*
* _pmbus_read_byte_data() is similar to pmbus_read_byte_data(), but checks if
* a device specific mapping function exists and calls it if necessary.
*/
static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg)
{
struct pmbus_data *data = i2c_get_clientdata(client);
const struct pmbus_driver_info *info = data->info;
int status;
if (info->read_byte_data) {
status = info->read_byte_data(client, page, reg);
if (status != -ENODATA)
return status;
}
return pmbus_read_byte_data(client, page, reg);
}
int pmbus_update_fan(struct i2c_client *client, int page, int id,
u8 config, u8 mask, u16 command)
{
int from;
int rv;
u8 to;
from = _pmbus_read_byte_data(client, page,
pmbus_fan_config_registers[id]);
if (from < 0)
return from;
to = (from & ~mask) | (config & mask);
if (to != from) {
rv = _pmbus_write_byte_data(client, page,
pmbus_fan_config_registers[id], to);
if (rv < 0)
return rv;
}
return _pmbus_write_word_data(client, page,
pmbus_fan_command_registers[id], command);
}
EXPORT_SYMBOL_NS_GPL(pmbus_update_fan, PMBUS);
int pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg)
{
int rv;
rv = pmbus_set_page(client, page, phase);
if (rv < 0)
return rv;
return i2c_smbus_read_word_data(client, reg);
}
EXPORT_SYMBOL_NS_GPL(pmbus_read_word_data, PMBUS);
static int pmbus_read_virt_reg(struct i2c_client *client, int page, int reg)
{
int rv;
int id;
switch (reg) {
case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
id = reg - PMBUS_VIRT_FAN_TARGET_1;
rv = pmbus_get_fan_rate_device(client, page, id, rpm);
break;
default:
rv = -ENXIO;
break;
}
return rv;
}
/*
* _pmbus_read_word_data() is similar to pmbus_read_word_data(), but checks if
* a device specific mapping function exists and calls it if necessary.
*/
static int _pmbus_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
struct pmbus_data *data = i2c_get_clientdata(client);
const struct pmbus_driver_info *info = data->info;
int status;
if (info->read_word_data) {
status = info->read_word_data(client, page, phase, reg);
if (status != -ENODATA)
return status;
}
if (reg >= PMBUS_VIRT_BASE)
return pmbus_read_virt_reg(client, page, reg);
return pmbus_read_word_data(client, page, phase, reg);
}
/* Same as above, but without phase parameter, for use in check functions */
static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg)
{
return _pmbus_read_word_data(client, page, 0xff, reg);
}
int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg)
{
int rv;
rv = pmbus_set_page(client, page, 0xff);
if (rv < 0)
return rv;
return i2c_smbus_read_byte_data(client, reg);
}
EXPORT_SYMBOL_NS_GPL(pmbus_read_byte_data, PMBUS);
int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value)
{
int rv;
rv = pmbus_set_page(client, page, 0xff);
if (rv < 0)
return rv;
return i2c_smbus_write_byte_data(client, reg, value);
}
EXPORT_SYMBOL_NS_GPL(pmbus_write_byte_data, PMBUS);
int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
u8 mask, u8 value)
{
unsigned int tmp;
int rv;
rv = _pmbus_read_byte_data(client, page, reg);
if (rv < 0)
return rv;
tmp = (rv & ~mask) | (value & mask);
if (tmp != rv)
rv = _pmbus_write_byte_data(client, page, reg, tmp);
return rv;
}
EXPORT_SYMBOL_NS_GPL(pmbus_update_byte_data, PMBUS);
static int pmbus_read_block_data(struct i2c_client *client, int page, u8 reg,
char *data_buf)
{
int rv;
rv = pmbus_set_page(client, page, 0xff);
if (rv < 0)
return rv;
return i2c_smbus_read_block_data(client, reg, data_buf);
}
static struct pmbus_sensor *pmbus_find_sensor(struct pmbus_data *data, int page,
int reg)
{
struct pmbus_sensor *sensor;
for (sensor = data->sensors; sensor; sensor = sensor->next) {
if (sensor->page == page && sensor->reg == reg)
return sensor;
}
return ERR_PTR(-EINVAL);
}
static int pmbus_get_fan_rate(struct i2c_client *client, int page, int id,
enum pmbus_fan_mode mode,
bool from_cache)
{
struct pmbus_data *data = i2c_get_clientdata(client);
bool want_rpm, have_rpm;
struct pmbus_sensor *s;
int config;
int reg;
want_rpm = (mode == rpm);
if (from_cache) {
reg = want_rpm ? PMBUS_VIRT_FAN_TARGET_1 : PMBUS_VIRT_PWM_1;
s = pmbus_find_sensor(data, page, reg + id);
if (IS_ERR(s))
return PTR_ERR(s);
return s->data;
}
config = _pmbus_read_byte_data(client, page,
pmbus_fan_config_registers[id]);
if (config < 0)
return config;
have_rpm = !!(config & pmbus_fan_rpm_mask[id]);
if (want_rpm == have_rpm)
return pmbus_read_word_data(client, page, 0xff,
pmbus_fan_command_registers[id]);
/* Can't sensibly map between RPM and PWM, just return zero */
return 0;
}
int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
enum pmbus_fan_mode mode)
{
return pmbus_get_fan_rate(client, page, id, mode, false);
}
EXPORT_SYMBOL_NS_GPL(pmbus_get_fan_rate_device, PMBUS);
int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
enum pmbus_fan_mode mode)
{
return pmbus_get_fan_rate(client, page, id, mode, true);
}
EXPORT_SYMBOL_NS_GPL(pmbus_get_fan_rate_cached, PMBUS);
static void pmbus_clear_fault_page(struct i2c_client *client, int page)
{
_pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS);
}
void pmbus_clear_faults(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
int i;
for (i = 0; i < data->info->pages; i++)
pmbus_clear_fault_page(client, i);
}
EXPORT_SYMBOL_NS_GPL(pmbus_clear_faults, PMBUS);
static int pmbus_check_status_cml(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
int status, status2;
status = data->read_status(client, -1);
if (status < 0 || (status & PB_STATUS_CML)) {
status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND))
return -EIO;
}
return 0;
}
static bool pmbus_check_register(struct i2c_client *client,
int (*func)(struct i2c_client *client,
int page, int reg),
int page, int reg)
{
int rv;
struct pmbus_data *data = i2c_get_clientdata(client);
rv = func(client, page, reg);
if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK))
rv = pmbus_check_status_cml(client);
if (rv < 0 && (data->flags & PMBUS_READ_STATUS_AFTER_FAILED_CHECK))
data->read_status(client, -1);
if (reg < PMBUS_VIRT_BASE)
pmbus_clear_fault_page(client, -1);
return rv >= 0;
}
static bool pmbus_check_status_register(struct i2c_client *client, int page)
{
int status;
struct pmbus_data *data = i2c_get_clientdata(client);
status = data->read_status(client, page);
if (status >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK) &&
(status & PB_STATUS_CML)) {
status = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
if (status < 0 || (status & PB_CML_FAULT_INVALID_COMMAND))
status = -EIO;
}
pmbus_clear_fault_page(client, -1);
return status >= 0;
}
bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg)
{
return pmbus_check_register(client, _pmbus_read_byte_data, page, reg);
}
EXPORT_SYMBOL_NS_GPL(pmbus_check_byte_register, PMBUS);
bool pmbus_check_word_register(struct i2c_client *client, int page, int reg)
{
return pmbus_check_register(client, __pmbus_read_word_data, page, reg);
}
EXPORT_SYMBOL_NS_GPL(pmbus_check_word_register, PMBUS);
static bool __maybe_unused pmbus_check_block_register(struct i2c_client *client,
int page, int reg)
{
int rv;
struct pmbus_data *data = i2c_get_clientdata(client);
char data_buf[I2C_SMBUS_BLOCK_MAX + 2];
rv = pmbus_read_block_data(client, page, reg, data_buf);
if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK))
rv = pmbus_check_status_cml(client);
if (rv < 0 && (data->flags & PMBUS_READ_STATUS_AFTER_FAILED_CHECK))
data->read_status(client, -1);
pmbus_clear_fault_page(client, -1);
return rv >= 0;
}
const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
return data->info;
}
EXPORT_SYMBOL_NS_GPL(pmbus_get_driver_info, PMBUS);
static int pmbus_get_status(struct i2c_client *client, int page, int reg)
{
struct pmbus_data *data = i2c_get_clientdata(client);
int status;
switch (reg) {
case PMBUS_STATUS_WORD:
status = data->read_status(client, page);
break;
default:
status = _pmbus_read_byte_data(client, page, reg);
break;
}
if (status < 0)
pmbus_clear_faults(client);
return status;
}
static void pmbus_update_sensor_data(struct i2c_client *client, struct pmbus_sensor *sensor)
{
if (sensor->data < 0 || sensor->update)
sensor->data = _pmbus_read_word_data(client, sensor->page,
sensor->phase, sensor->reg);
}
/*
* Convert ieee754 sensor values to milli- or micro-units
* depending on sensor type.
*
* ieee754 data format:
* bit 15: sign
* bit 10..14: exponent
* bit 0..9: mantissa
* exponent=0:
* v=(−1)^signbit * 2^(−14) * 0.significantbits
* exponent=1..30:
* v=(−1)^signbit * 2^(exponent - 15) * 1.significantbits
* exponent=31:
* v=NaN
*
* Add the number mantissa bits into the calculations for simplicity.
* To do that, add '10' to the exponent. By doing that, we can just add
* 0x400 to normal values and get the expected result.
*/
static long pmbus_reg2data_ieee754(struct pmbus_data *data,
struct pmbus_sensor *sensor)
{
int exponent;
bool sign;
long val;
/* only support half precision for now */
sign = sensor->data & 0x8000;
exponent = (sensor->data >> 10) & 0x1f;
val = sensor->data & 0x3ff;
if (exponent == 0) { /* subnormal */
exponent = -(14 + 10);
} else if (exponent == 0x1f) { /* NaN, convert to min/max */
exponent = 0;
val = 65504;
} else {
exponent -= (15 + 10); /* normal */
val |= 0x400;
}
/* scale result to milli-units for all sensors except fans */
if (sensor->class != PSC_FAN)
val = val * 1000L;
/* scale result to micro-units for power sensors */
if (sensor->class == PSC_POWER)
val = val * 1000L;
if (exponent >= 0)
val <<= exponent;
else
val >>= -exponent;
if (sign)
val = -val;
return val;
}
/*
* Convert linear sensor values to milli- or micro-units
* depending on sensor type.
*/
static s64 pmbus_reg2data_linear(struct pmbus_data *data,
struct pmbus_sensor *sensor)
{
s16 exponent;
s32 mantissa;
s64 val;
if (sensor->class == PSC_VOLTAGE_OUT) { /* LINEAR16 */
exponent = data->exponent[sensor->page];
mantissa = (u16) sensor->data;
} else { /* LINEAR11 */
exponent = ((s16)sensor->data) >> 11;
mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5;
}
val = mantissa;
/* scale result to milli-units for all sensors except fans */
if (sensor->class != PSC_FAN)
val = val * 1000LL;
/* scale result to micro-units for power sensors */
if (sensor->class == PSC_POWER)
val = val * 1000LL;
if (exponent >= 0)
val <<= exponent;
else
val >>= -exponent;
return val;
}
/*
* Convert direct sensor values to milli- or micro-units
* depending on sensor type.
*/
static s64 pmbus_reg2data_direct(struct pmbus_data *data,
struct pmbus_sensor *sensor)
{
s64 b, val = (s16)sensor->data;
s32 m, R;
m = data->info->m[sensor->class];
b = data->info->b[sensor->class];
R = data->info->R[sensor->class];
if (m == 0)
return 0;
/* X = 1/m * (Y * 10^-R - b) */
R = -R;
/* scale result to milli-units for everything but fans */
if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
R += 3;
b *= 1000;
}
/* scale result to micro-units for power sensors */
if (sensor->class == PSC_POWER) {
R += 3;
b *= 1000;
}
while (R > 0) {
val *= 10;
R--;
}
while (R < 0) {
val = div_s64(val + 5LL, 10L); /* round closest */
R++;
}
val = div_s64(val - b, m);
return val;
}
/*
* Convert VID sensor values to milli- or micro-units
* depending on sensor type.
*/
static s64 pmbus_reg2data_vid(struct pmbus_data *data,
struct pmbus_sensor *sensor)
{
long val = sensor->data;
long rv = 0;
switch (data->info->vrm_version[sensor->page]) {
case vr11:
if (val >= 0x02 && val <= 0xb2)
rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
break;
case vr12:
if (val >= 0x01)
rv = 250 + (val - 1) * 5;
break;
case vr13:
if (val >= 0x01)
rv = 500 + (val - 1) * 10;
break;
case imvp9:
if (val >= 0x01)
rv = 200 + (val - 1) * 10;
break;
case amd625mv:
if (val >= 0x0 && val <= 0xd8)
rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
break;
}
return rv;
}
static s64 pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor)
{
s64 val;
if (!sensor->convert)
return sensor->data;
switch (data->info->format[sensor->class]) {
case direct:
val = pmbus_reg2data_direct(data, sensor);
break;
case vid:
val = pmbus_reg2data_vid(data, sensor);
break;
case ieee754:
val = pmbus_reg2data_ieee754(data, sensor);
break;
case linear:
default:
val = pmbus_reg2data_linear(data, sensor);
break;
}
return val;
}
#define MAX_IEEE_MANTISSA (0x7ff * 1000)
#define MIN_IEEE_MANTISSA (0x400 * 1000)
static u16 pmbus_data2reg_ieee754(struct pmbus_data *data,
struct pmbus_sensor *sensor, long val)
{
u16 exponent = (15 + 10);
long mantissa;
u16 sign = 0;
/* simple case */
if (val == 0)
return 0;
if (val < 0) {
sign = 0x8000;
val = -val;
}
/* Power is in uW. Convert to mW before converting. */
if (sensor->class == PSC_POWER)
val = DIV_ROUND_CLOSEST(val, 1000L);
/*
* For simplicity, convert fan data to milli-units
* before calculating the exponent.
*/
if (sensor->class == PSC_FAN)
val = val * 1000;
/* Reduce large mantissa until it fits into 10 bit */
while (val > MAX_IEEE_MANTISSA && exponent < 30) {
exponent++;
val >>= 1;
}
/*
* Increase small mantissa to generate valid 'normal'
* number
*/
while (val < MIN_IEEE_MANTISSA && exponent > 1) {
exponent--;
val <<= 1;
}
/* Convert mantissa from milli-units to units */
mantissa = DIV_ROUND_CLOSEST(val, 1000);
/*
* Ensure that the resulting number is within range.
* Valid range is 0x400..0x7ff, where bit 10 reflects
* the implied high bit in normalized ieee754 numbers.
* Set the range to 0x400..0x7ff to reflect this.
* The upper bit is then removed by the mask against
* 0x3ff in the final assignment.
*/
if (mantissa > 0x7ff)
mantissa = 0x7ff;
else if (mantissa < 0x400)
mantissa = 0x400;
/* Convert to sign, 5 bit exponent, 10 bit mantissa */
return sign | (mantissa & 0x3ff) | ((exponent << 10) & 0x7c00);
}
#define MAX_LIN_MANTISSA (1023 * 1000)
#define MIN_LIN_MANTISSA (511 * 1000)
static u16 pmbus_data2reg_linear(struct pmbus_data *data,
struct pmbus_sensor *sensor, s64 val)
{
s16 exponent = 0, mantissa;
bool negative = false;
/* simple case */
if (val == 0)
return 0;
if (sensor->class == PSC_VOLTAGE_OUT) {
/* LINEAR16 does not support negative voltages */
if (val < 0)
return 0;
/*
* For a static exponents, we don't have a choice
* but to adjust the value to it.
*/
if (data->exponent[sensor->page] < 0)
val <<= -data->exponent[sensor->page];
else
val >>= data->exponent[sensor->page];
val = DIV_ROUND_CLOSEST_ULL(val, 1000);
return clamp_val(val, 0, 0xffff);
}
if (val < 0) {
negative = true;
val = -val;
}
/* Power is in uW. Convert to mW before converting. */
if (sensor->class == PSC_POWER)
val = DIV_ROUND_CLOSEST_ULL(val, 1000);
/*
* For simplicity, convert fan data to milli-units
* before calculating the exponent.
*/
if (sensor->class == PSC_FAN)
val = val * 1000LL;
/* Reduce large mantissa until it fits into 10 bit */
while (val >= MAX_LIN_MANTISSA && exponent < 15) {
exponent++;
val >>= 1;
}
/* Increase small mantissa to improve precision */
while (val < MIN_LIN_MANTISSA && exponent > -15) {
exponent--;
val <<= 1;
}
/* Convert mantissa from milli-units to units */
mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff);
/* restore sign */
if (negative)
mantissa = -mantissa;
/* Convert to 5 bit exponent, 11 bit mantissa */
return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
}
static u16 pmbus_data2reg_direct(struct pmbus_data *data,
struct pmbus_sensor *sensor, s64 val)
{
s64 b;
s32 m, R;
m = data->info->m[sensor->class];
b = data->info->b[sensor->class];
R = data->info->R[sensor->class];
/* Power is in uW. Adjust R and b. */
if (sensor->class == PSC_POWER) {
R -= 3;
b *= 1000;
}
/* Calculate Y = (m * X + b) * 10^R */
if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
R -= 3; /* Adjust R and b for data in milli-units */
b *= 1000;
}
val = val * m + b;
while (R > 0) {
val *= 10;
R--;
}
while (R < 0) {
val = div_s64(val + 5LL, 10L); /* round closest */
R++;
}
return (u16)clamp_val(val, S16_MIN, S16_MAX);
}
static u16 pmbus_data2reg_vid(struct pmbus_data *data,
struct pmbus_sensor *sensor, s64 val)
{
val = clamp_val(val, 500, 1600);
return 2 + DIV_ROUND_CLOSEST_ULL((1600LL - val) * 100LL, 625);
}
static u16 pmbus_data2reg(struct pmbus_data *data,
struct pmbus_sensor *sensor, s64 val)
{
u16 regval;
if (!sensor->convert)
return val;
switch (data->info->format[sensor->class]) {
case direct:
regval = pmbus_data2reg_direct(data, sensor, val);
break;
case vid:
regval = pmbus_data2reg_vid(data, sensor, val);
break;
case ieee754:
regval = pmbus_data2reg_ieee754(data, sensor, val);
break;
case linear:
default:
regval = pmbus_data2reg_linear(data, sensor, val);
break;
}
return regval;
}
/*
* Return boolean calculated from converted data.
* <index> defines a status register index and mask.
* The mask is in the lower 8 bits, the register index is in bits 8..23.
*
* The associated pmbus_boolean structure contains optional pointers to two
* sensor attributes. If specified, those attributes are compared against each
* other to determine if a limit has been exceeded.
*
* If the sensor attribute pointers are NULL, the function returns true if
* (status[reg] & mask) is true.
*
* If sensor attribute pointers are provided, a comparison against a specified
* limit has to be performed to determine the boolean result.
* In this case, the function returns true if v1 >= v2 (where v1 and v2 are
* sensor values referenced by sensor attribute pointers s1 and s2).
*
* To determine if an object exceeds upper limits, specify <s1,s2> = <v,limit>.
* To determine if an object exceeds lower limits, specify <s1,s2> = <limit,v>.
*
* If a negative value is stored in any of the referenced registers, this value
* reflects an error code which will be returned.
*/
static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b,
int index)
{
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor *s1 = b->s1;
struct pmbus_sensor *s2 = b->s2;
u16 mask = pb_index_to_mask(index);
u8 page = pb_index_to_page(index);
u16 reg = pb_index_to_reg(index);
int ret, status;
u16 regval;
mutex_lock(&data->update_lock);
status = pmbus_get_status(client, page, reg);
if (status < 0) {
ret = status;
goto unlock;
}
if (s1)
pmbus_update_sensor_data(client, s1);
if (s2)
pmbus_update_sensor_data(client, s2);
regval = status & mask;
if (regval) {
ret = _pmbus_write_byte_data(client, page, reg, regval);
if (ret)
goto unlock;
}
if (s1 && s2) {
s64 v1, v2;
if (s1->data < 0) {
ret = s1->data;
goto unlock;
}
if (s2->data < 0) {
ret = s2->data;
goto unlock;
}
v1 = pmbus_reg2data(data, s1);
v2 = pmbus_reg2data(data, s2);
ret = !!(regval && v1 >= v2);
} else {
ret = !!regval;
}
unlock:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t pmbus_show_boolean(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct pmbus_boolean *boolean = to_pmbus_boolean(attr);
struct i2c_client *client = to_i2c_client(dev->parent);
int val;
val = pmbus_get_boolean(client, boolean, attr->index);
if (val < 0)
return val;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t pmbus_show_sensor(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
struct pmbus_data *data = i2c_get_clientdata(client);
ssize_t ret;
mutex_lock(&data->update_lock);
pmbus_update_sensor_data(client, sensor);
if (sensor->data < 0)
ret = sensor->data;
else
ret = sysfs_emit(buf, "%lld\n", pmbus_reg2data(data, sensor));
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t pmbus_set_sensor(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
ssize_t rv = count;
s64 val;
int ret;
u16 regval;
if (kstrtos64(buf, 10, &val) < 0)
return -EINVAL;
mutex_lock(&data->update_lock);
regval = pmbus_data2reg(data, sensor, val);
ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval);
if (ret < 0)
rv = ret;
else
sensor->data = -ENODATA;
mutex_unlock(&data->update_lock);
return rv;
}
static ssize_t pmbus_show_label(struct device *dev,
struct device_attribute *da, char *buf)
{
struct pmbus_label *label = to_pmbus_label(da);
return sysfs_emit(buf, "%s\n", label->label);
}
static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr)
{
if (data->num_attributes >= data->max_attributes - 1) {
int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE;
void *new_attrs = devm_krealloc_array(data->dev, data->group.attrs,
new_max_attrs, sizeof(void *),
GFP_KERNEL);
if (!new_attrs)
return -ENOMEM;
data->group.attrs = new_attrs;
data->max_attributes = new_max_attrs;
}
data->group.attrs[data->num_attributes++] = attr;
data->group.attrs[data->num_attributes] = NULL;
return 0;
}
static void pmbus_dev_attr_init(struct device_attribute *dev_attr,
const char *name,
umode_t mode,
ssize_t (*show)(struct device *dev,
struct device_attribute *attr,
char *buf),
ssize_t (*store)(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count))
{
sysfs_attr_init(&dev_attr->attr);
dev_attr->attr.name = name;
dev_attr->attr.mode = mode;
dev_attr->show = show;
dev_attr->store = store;
}
static void pmbus_attr_init(struct sensor_device_attribute *a,
const char *name,
umode_t mode,
ssize_t (*show)(struct device *dev,
struct device_attribute *attr,
char *buf),
ssize_t (*store)(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count),
int idx)
{
pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store);
a->index = idx;
}
static int pmbus_add_boolean(struct pmbus_data *data,
const char *name, const char *type, int seq,
struct pmbus_sensor *s1,
struct pmbus_sensor *s2,
u8 page, u16 reg, u16 mask)
{
struct pmbus_boolean *boolean;
struct sensor_device_attribute *a;
if (WARN((s1 && !s2) || (!s1 && s2), "Bad s1/s2 parameters\n"))
return -EINVAL;
boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL);
if (!boolean)
return -ENOMEM;
a = &boolean->attribute;
snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s",
name, seq, type);
boolean->s1 = s1;
boolean->s2 = s2;
pmbus_attr_init(a, boolean->name, 0444, pmbus_show_boolean, NULL,
pb_reg_to_index(page, reg, mask));
return pmbus_add_attribute(data, &a->dev_attr.attr);
}
/* of thermal for pmbus temperature sensors */
struct pmbus_thermal_data {
struct pmbus_data *pmbus_data;
struct pmbus_sensor *sensor;
};
static int pmbus_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
{
struct pmbus_thermal_data *tdata = thermal_zone_device_priv(tz);
struct pmbus_sensor *sensor = tdata->sensor;
struct pmbus_data *pmbus_data = tdata->pmbus_data;
struct i2c_client *client = to_i2c_client(pmbus_data->dev);
struct device *dev = pmbus_data->hwmon_dev;
int ret = 0;
if (!dev) {
/* May not even get to hwmon yet */
*temp = 0;
return 0;
}
mutex_lock(&pmbus_data->update_lock);
pmbus_update_sensor_data(client, sensor);
if (sensor->data < 0)
ret = sensor->data;
else
*temp = (int)pmbus_reg2data(pmbus_data, sensor);
mutex_unlock(&pmbus_data->update_lock);
return ret;
}
static const struct thermal_zone_device_ops pmbus_thermal_ops = {
.get_temp = pmbus_thermal_get_temp,
};
static int pmbus_thermal_add_sensor(struct pmbus_data *pmbus_data,
struct pmbus_sensor *sensor, int index)
{
struct device *dev = pmbus_data->dev;
struct pmbus_thermal_data *tdata;
struct thermal_zone_device *tzd;
tdata = devm_kzalloc(dev, sizeof(*tdata), GFP_KERNEL);
if (!tdata)
return -ENOMEM;
tdata->sensor = sensor;
tdata->pmbus_data = pmbus_data;
tzd = devm_thermal_of_zone_register(dev, index, tdata,
&pmbus_thermal_ops);
/*
* If CONFIG_THERMAL_OF is disabled, this returns -ENODEV,
* so ignore that error but forward any other error.
*/
if (IS_ERR(tzd) && (PTR_ERR(tzd) != -ENODEV))
return PTR_ERR(tzd);
return 0;
}
static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data,
const char *name, const char *type,
int seq, int page, int phase,
int reg,
enum pmbus_sensor_classes class,
bool update, bool readonly,
bool convert)
{
struct pmbus_sensor *sensor;
struct device_attribute *a;
sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL);
if (!sensor)
return NULL;
a = &sensor->attribute;
if (type)
snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s",
name, seq, type);
else
snprintf(sensor->name, sizeof(sensor->name), "%s%d",
name, seq);
if (data->flags & PMBUS_WRITE_PROTECTED)
readonly = true;
sensor->page = page;
sensor->phase = phase;
sensor->reg = reg;
sensor->class = class;
sensor->update = update;
sensor->convert = convert;
sensor->data = -ENODATA;
pmbus_dev_attr_init(a, sensor->name,
readonly ? 0444 : 0644,
pmbus_show_sensor, pmbus_set_sensor);
if (pmbus_add_attribute(data, &a->attr))
return NULL;
sensor->next = data->sensors;
data->sensors = sensor;
/* temperature sensors with _input values are registered with thermal */
if (class == PSC_TEMPERATURE && strcmp(type, "input") == 0)
pmbus_thermal_add_sensor(data, sensor, seq);
return sensor;
}
static int pmbus_add_label(struct pmbus_data *data,
const char *name, int seq,
const char *lstring, int index, int phase)
{
struct pmbus_label *label;
struct device_attribute *a;
label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL);
if (!label)
return -ENOMEM;
a = &label->attribute;
snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq);
if (!index) {
if (phase == 0xff)
strncpy(label->label, lstring,
sizeof(label->label) - 1);
else
snprintf(label->label, sizeof(label->label), "%s.%d",
lstring, phase);
} else {
if (phase == 0xff)
snprintf(label->label, sizeof(label->label), "%s%d",
lstring, index);
else
snprintf(label->label, sizeof(label->label), "%s%d.%d",
lstring, index, phase);
}
pmbus_dev_attr_init(a, label->name, 0444, pmbus_show_label, NULL);
return pmbus_add_attribute(data, &a->attr);
}
/*
* Search for attributes. Allocate sensors, booleans, and labels as needed.
*/
/*
* The pmbus_limit_attr structure describes a single limit attribute
* and its associated alarm attribute.
*/
struct pmbus_limit_attr {
u16 reg; /* Limit register */
u16 sbit; /* Alarm attribute status bit */
bool update; /* True if register needs updates */
bool low; /* True if low limit; for limits with compare
functions only */
const char *attr; /* Attribute name */
const char *alarm; /* Alarm attribute name */
};
/*
* The pmbus_sensor_attr structure describes one sensor attribute. This
* description includes a reference to the associated limit attributes.
*/
struct pmbus_sensor_attr {
u16 reg; /* sensor register */
u16 gbit; /* generic status bit */
u8 nlimit; /* # of limit registers */
enum pmbus_sensor_classes class;/* sensor class */
const char *label; /* sensor label */
bool paged; /* true if paged sensor */
bool update; /* true if update needed */
bool compare; /* true if compare function needed */
u32 func; /* sensor mask */
u32 sfunc; /* sensor status mask */
int sreg; /* status register */
const struct pmbus_limit_attr *limit;/* limit registers */
};
/*
* Add a set of limit attributes and, if supported, the associated
* alarm attributes.
* returns 0 if no alarm register found, 1 if an alarm register was found,
* < 0 on errors.
*/
static int pmbus_add_limit_attrs(struct i2c_client *client,
struct pmbus_data *data,
const struct pmbus_driver_info *info,
const char *name, int index, int page,
struct pmbus_sensor *base,
const struct pmbus_sensor_attr *attr)
{
const struct pmbus_limit_attr *l = attr->limit;
int nlimit = attr->nlimit;
int have_alarm = 0;
int i, ret;
struct pmbus_sensor *curr;
for (i = 0; i < nlimit; i++) {
if (pmbus_check_word_register(client, page, l->reg)) {
curr = pmbus_add_sensor(data, name, l->attr, index,
page, 0xff, l->reg, attr->class,
attr->update || l->update,
false, true);
if (!curr)
return -ENOMEM;
if (l->sbit && (info->func[page] & attr->sfunc)) {
ret = pmbus_add_boolean(data, name,
l->alarm, index,
attr->compare ? l->low ? curr : base
: NULL,
attr->compare ? l->low ? base : curr
: NULL,
page, attr->sreg, l->sbit);
if (ret)
return ret;
have_alarm = 1;
}
}
l++;
}
return have_alarm;
}
static int pmbus_add_sensor_attrs_one(struct i2c_client *client,
struct pmbus_data *data,
const struct pmbus_driver_info *info,
const char *name,
int index, int page, int phase,
const struct pmbus_sensor_attr *attr,
bool paged)
{
struct pmbus_sensor *base;
bool upper = !!(attr->gbit & 0xff00); /* need to check STATUS_WORD */
int ret;
if (attr->label) {
ret = pmbus_add_label(data, name, index, attr->label,
paged ? page + 1 : 0, phase);
if (ret)
return ret;
}
base = pmbus_add_sensor(data, name, "input", index, page, phase,
attr->reg, attr->class, true, true, true);
if (!base)
return -ENOMEM;
/* No limit and alarm attributes for phase specific sensors */
if (attr->sfunc && phase == 0xff) {
ret = pmbus_add_limit_attrs(client, data, info, name,
index, page, base, attr);
if (ret < 0)
return ret;
/*
* Add generic alarm attribute only if there are no individual
* alarm attributes, if there is a global alarm bit, and if
* the generic status register (word or byte, depending on
* which global bit is set) for this page is accessible.
*/
if (!ret && attr->gbit &&
(!upper || data->has_status_word) &&
pmbus_check_status_register(client, page)) {
ret = pmbus_add_boolean(data, name, "alarm", index,
NULL, NULL,
page, PMBUS_STATUS_WORD,
attr->gbit);
if (ret)
return ret;
}
}
return 0;
}
static bool pmbus_sensor_is_paged(const struct pmbus_driver_info *info,
const struct pmbus_sensor_attr *attr)
{
int p;
if (attr->paged)
return true;
/*
* Some attributes may be present on more than one page despite
* not being marked with the paged attribute. If that is the case,
* then treat the sensor as being paged and add the page suffix to the
* attribute name.
* We don't just add the paged attribute to all such attributes, in
* order to maintain the un-suffixed labels in the case where the
* attribute is only on page 0.
*/
for (p = 1; p < info->pages; p++) {
if (info->func[p] & attr->func)
return true;
}
return false;
}
static int pmbus_add_sensor_attrs(struct i2c_client *client,
struct pmbus_data *data,
const char *name,
const struct pmbus_sensor_attr *attrs,
int nattrs)
{
const struct pmbus_driver_info *info = data->info;
int index, i;
int ret;
index = 1;
for (i = 0; i < nattrs; i++) {
int page, pages;
bool paged = pmbus_sensor_is_paged(info, attrs);
pages = paged ? info->pages : 1;
for (page = 0; page < pages; page++) {
if (info->func[page] & attrs->func) {
ret = pmbus_add_sensor_attrs_one(client, data, info,
name, index, page,
0xff, attrs, paged);
if (ret)
return ret;
index++;
}
if (info->phases[page]) {
int phase;
for (phase = 0; phase < info->phases[page];
phase++) {
if (!(info->pfunc[phase] & attrs->func))
continue;
ret = pmbus_add_sensor_attrs_one(client,
data, info, name, index, page,
phase, attrs, paged);
if (ret)
return ret;
index++;
}
}
}
attrs++;
}
return 0;
}
static const struct pmbus_limit_attr vin_limit_attrs[] = {
{
.reg = PMBUS_VIN_UV_WARN_LIMIT,
.attr = "min",
.alarm = "min_alarm",
.sbit = PB_VOLTAGE_UV_WARNING,
}, {
.reg = PMBUS_VIN_UV_FAULT_LIMIT,
.attr = "lcrit",
.alarm = "lcrit_alarm",
.sbit = PB_VOLTAGE_UV_FAULT | PB_VOLTAGE_VIN_OFF,
}, {
.reg = PMBUS_VIN_OV_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_VOLTAGE_OV_WARNING,
}, {
.reg = PMBUS_VIN_OV_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_VOLTAGE_OV_FAULT,
}, {
.reg = PMBUS_VIRT_READ_VIN_AVG,
.update = true,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_VIN_MIN,
.update = true,
.attr = "lowest",
}, {
.reg = PMBUS_VIRT_READ_VIN_MAX,
.update = true,
.attr = "highest",
}, {
.reg = PMBUS_VIRT_RESET_VIN_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_VIN_MIN,
.attr = "rated_min",
}, {
.reg = PMBUS_MFR_VIN_MAX,
.attr = "rated_max",
},
};
static const struct pmbus_limit_attr vmon_limit_attrs[] = {
{
.reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT,
.attr = "min",
.alarm = "min_alarm",
.sbit = PB_VOLTAGE_UV_WARNING,
}, {
.reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
.attr = "lcrit",
.alarm = "lcrit_alarm",
.sbit = PB_VOLTAGE_UV_FAULT,
}, {
.reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_VOLTAGE_OV_WARNING,
}, {
.reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_VOLTAGE_OV_FAULT,
}
};
static const struct pmbus_limit_attr vout_limit_attrs[] = {
{
.reg = PMBUS_VOUT_UV_WARN_LIMIT,
.attr = "min",
.alarm = "min_alarm",
.sbit = PB_VOLTAGE_UV_WARNING,
}, {
.reg = PMBUS_VOUT_UV_FAULT_LIMIT,
.attr = "lcrit",
.alarm = "lcrit_alarm",
.sbit = PB_VOLTAGE_UV_FAULT,
}, {
.reg = PMBUS_VOUT_OV_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_VOLTAGE_OV_WARNING,
}, {
.reg = PMBUS_VOUT_OV_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_VOLTAGE_OV_FAULT,
}, {
.reg = PMBUS_VIRT_READ_VOUT_AVG,
.update = true,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_VOUT_MIN,
.update = true,
.attr = "lowest",
}, {
.reg = PMBUS_VIRT_READ_VOUT_MAX,
.update = true,
.attr = "highest",
}, {
.reg = PMBUS_VIRT_RESET_VOUT_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_VOUT_MIN,
.attr = "rated_min",
}, {
.reg = PMBUS_MFR_VOUT_MAX,
.attr = "rated_max",
},
};
static const struct pmbus_sensor_attr voltage_attributes[] = {
{
.reg = PMBUS_READ_VIN,
.class = PSC_VOLTAGE_IN,
.label = "vin",
.func = PMBUS_HAVE_VIN,
.sfunc = PMBUS_HAVE_STATUS_INPUT,
.sreg = PMBUS_STATUS_INPUT,
.gbit = PB_STATUS_VIN_UV,
.limit = vin_limit_attrs,
.nlimit = ARRAY_SIZE(vin_limit_attrs),
}, {
.reg = PMBUS_VIRT_READ_VMON,
.class = PSC_VOLTAGE_IN,
.label = "vmon",
.func = PMBUS_HAVE_VMON,
.sfunc = PMBUS_HAVE_STATUS_VMON,
.sreg = PMBUS_VIRT_STATUS_VMON,
.limit = vmon_limit_attrs,
.nlimit = ARRAY_SIZE(vmon_limit_attrs),
}, {
.reg = PMBUS_READ_VCAP,
.class = PSC_VOLTAGE_IN,
.label = "vcap",
.func = PMBUS_HAVE_VCAP,
}, {
.reg = PMBUS_READ_VOUT,
.class = PSC_VOLTAGE_OUT,
.label = "vout",
.paged = true,
.func = PMBUS_HAVE_VOUT,
.sfunc = PMBUS_HAVE_STATUS_VOUT,
.sreg = PMBUS_STATUS_VOUT,
.gbit = PB_STATUS_VOUT_OV,
.limit = vout_limit_attrs,
.nlimit = ARRAY_SIZE(vout_limit_attrs),
}
};
/* Current attributes */
static const struct pmbus_limit_attr iin_limit_attrs[] = {
{
.reg = PMBUS_IIN_OC_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_IIN_OC_WARNING,
}, {
.reg = PMBUS_IIN_OC_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_IIN_OC_FAULT,
}, {
.reg = PMBUS_VIRT_READ_IIN_AVG,
.update = true,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_IIN_MIN,
.update = true,
.attr = "lowest",
}, {
.reg = PMBUS_VIRT_READ_IIN_MAX,
.update = true,
.attr = "highest",
}, {
.reg = PMBUS_VIRT_RESET_IIN_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_IIN_MAX,
.attr = "rated_max",
},
};
static const struct pmbus_limit_attr iout_limit_attrs[] = {
{
.reg = PMBUS_IOUT_OC_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_IOUT_OC_WARNING,
}, {
.reg = PMBUS_IOUT_UC_FAULT_LIMIT,
.attr = "lcrit",
.alarm = "lcrit_alarm",
.sbit = PB_IOUT_UC_FAULT,
}, {
.reg = PMBUS_IOUT_OC_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_IOUT_OC_FAULT,
}, {
.reg = PMBUS_VIRT_READ_IOUT_AVG,
.update = true,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_IOUT_MIN,
.update = true,
.attr = "lowest",
}, {
.reg = PMBUS_VIRT_READ_IOUT_MAX,
.update = true,
.attr = "highest",
}, {
.reg = PMBUS_VIRT_RESET_IOUT_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_IOUT_MAX,
.attr = "rated_max",
},
};
static const struct pmbus_sensor_attr current_attributes[] = {
{
.reg = PMBUS_READ_IIN,
.class = PSC_CURRENT_IN,
.label = "iin",
.func = PMBUS_HAVE_IIN,
.sfunc = PMBUS_HAVE_STATUS_INPUT,
.sreg = PMBUS_STATUS_INPUT,
.gbit = PB_STATUS_INPUT,
.limit = iin_limit_attrs,
.nlimit = ARRAY_SIZE(iin_limit_attrs),
}, {
.reg = PMBUS_READ_IOUT,
.class = PSC_CURRENT_OUT,
.label = "iout",
.paged = true,
.func = PMBUS_HAVE_IOUT,
.sfunc = PMBUS_HAVE_STATUS_IOUT,
.sreg = PMBUS_STATUS_IOUT,
.gbit = PB_STATUS_IOUT_OC,
.limit = iout_limit_attrs,
.nlimit = ARRAY_SIZE(iout_limit_attrs),
}
};
/* Power attributes */
static const struct pmbus_limit_attr pin_limit_attrs[] = {
{
.reg = PMBUS_PIN_OP_WARN_LIMIT,
.attr = "max",
.alarm = "alarm",
.sbit = PB_PIN_OP_WARNING,
}, {
.reg = PMBUS_VIRT_READ_PIN_AVG,
.update = true,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_PIN_MIN,
.update = true,
.attr = "input_lowest",
}, {
.reg = PMBUS_VIRT_READ_PIN_MAX,
.update = true,
.attr = "input_highest",
}, {
.reg = PMBUS_VIRT_RESET_PIN_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_PIN_MAX,
.attr = "rated_max",
},
};
static const struct pmbus_limit_attr pout_limit_attrs[] = {
{
.reg = PMBUS_POUT_MAX,
.attr = "cap",
.alarm = "cap_alarm",
.sbit = PB_POWER_LIMITING,
}, {
.reg = PMBUS_POUT_OP_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_POUT_OP_WARNING,
}, {
.reg = PMBUS_POUT_OP_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_POUT_OP_FAULT,
}, {
.reg = PMBUS_VIRT_READ_POUT_AVG,
.update = true,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_POUT_MIN,
.update = true,
.attr = "input_lowest",
}, {
.reg = PMBUS_VIRT_READ_POUT_MAX,
.update = true,
.attr = "input_highest",
}, {
.reg = PMBUS_VIRT_RESET_POUT_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_POUT_MAX,
.attr = "rated_max",
},
};
static const struct pmbus_sensor_attr power_attributes[] = {
{
.reg = PMBUS_READ_PIN,
.class = PSC_POWER,
.label = "pin",
.func = PMBUS_HAVE_PIN,
.sfunc = PMBUS_HAVE_STATUS_INPUT,
.sreg = PMBUS_STATUS_INPUT,
.gbit = PB_STATUS_INPUT,
.limit = pin_limit_attrs,
.nlimit = ARRAY_SIZE(pin_limit_attrs),
}, {
.reg = PMBUS_READ_POUT,
.class = PSC_POWER,
.label = "pout",
.paged = true,
.func = PMBUS_HAVE_POUT,
.sfunc = PMBUS_HAVE_STATUS_IOUT,
.sreg = PMBUS_STATUS_IOUT,
.limit = pout_limit_attrs,
.nlimit = ARRAY_SIZE(pout_limit_attrs),
}
};
/* Temperature atributes */
static const struct pmbus_limit_attr temp_limit_attrs[] = {
{
.reg = PMBUS_UT_WARN_LIMIT,
.low = true,
.attr = "min",
.alarm = "min_alarm",
.sbit = PB_TEMP_UT_WARNING,
}, {
.reg = PMBUS_UT_FAULT_LIMIT,
.low = true,
.attr = "lcrit",
.alarm = "lcrit_alarm",
.sbit = PB_TEMP_UT_FAULT,
}, {
.reg = PMBUS_OT_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_TEMP_OT_WARNING,
}, {
.reg = PMBUS_OT_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_TEMP_OT_FAULT,
}, {
.reg = PMBUS_VIRT_READ_TEMP_MIN,
.attr = "lowest",
}, {
.reg = PMBUS_VIRT_READ_TEMP_AVG,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_TEMP_MAX,
.attr = "highest",
}, {
.reg = PMBUS_VIRT_RESET_TEMP_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_MAX_TEMP_1,
.attr = "rated_max",
},
};
static const struct pmbus_limit_attr temp_limit_attrs2[] = {
{
.reg = PMBUS_UT_WARN_LIMIT,
.low = true,
.attr = "min",
.alarm = "min_alarm",
.sbit = PB_TEMP_UT_WARNING,
}, {
.reg = PMBUS_UT_FAULT_LIMIT,
.low = true,
.attr = "lcrit",
.alarm = "lcrit_alarm",
.sbit = PB_TEMP_UT_FAULT,
}, {
.reg = PMBUS_OT_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_TEMP_OT_WARNING,
}, {
.reg = PMBUS_OT_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_TEMP_OT_FAULT,
}, {
.reg = PMBUS_VIRT_READ_TEMP2_MIN,
.attr = "lowest",
}, {
.reg = PMBUS_VIRT_READ_TEMP2_AVG,
.attr = "average",
}, {
.reg = PMBUS_VIRT_READ_TEMP2_MAX,
.attr = "highest",
}, {
.reg = PMBUS_VIRT_RESET_TEMP2_HISTORY,
.attr = "reset_history",
}, {
.reg = PMBUS_MFR_MAX_TEMP_2,
.attr = "rated_max",
},
};
static const struct pmbus_limit_attr temp_limit_attrs3[] = {
{
.reg = PMBUS_UT_WARN_LIMIT,
.low = true,
.attr = "min",
.alarm = "min_alarm",
.sbit = PB_TEMP_UT_WARNING,
}, {
.reg = PMBUS_UT_FAULT_LIMIT,
.low = true,
.attr = "lcrit",
.alarm = "lcrit_alarm",
.sbit = PB_TEMP_UT_FAULT,
}, {
.reg = PMBUS_OT_WARN_LIMIT,
.attr = "max",
.alarm = "max_alarm",
.sbit = PB_TEMP_OT_WARNING,
}, {
.reg = PMBUS_OT_FAULT_LIMIT,
.attr = "crit",
.alarm = "crit_alarm",
.sbit = PB_TEMP_OT_FAULT,
}, {
.reg = PMBUS_MFR_MAX_TEMP_3,
.attr = "rated_max",
},
};
static const struct pmbus_sensor_attr temp_attributes[] = {
{
.reg = PMBUS_READ_TEMPERATURE_1,
.class = PSC_TEMPERATURE,
.paged = true,
.update = true,
.compare = true,
.func = PMBUS_HAVE_TEMP,
.sfunc = PMBUS_HAVE_STATUS_TEMP,
.sreg = PMBUS_STATUS_TEMPERATURE,
.gbit = PB_STATUS_TEMPERATURE,
.limit = temp_limit_attrs,
.nlimit = ARRAY_SIZE(temp_limit_attrs),
}, {
.reg = PMBUS_READ_TEMPERATURE_2,
.class = PSC_TEMPERATURE,
.paged = true,
.update = true,
.compare = true,
.func = PMBUS_HAVE_TEMP2,
.sfunc = PMBUS_HAVE_STATUS_TEMP,
.sreg = PMBUS_STATUS_TEMPERATURE,
.gbit = PB_STATUS_TEMPERATURE,
.limit = temp_limit_attrs2,
.nlimit = ARRAY_SIZE(temp_limit_attrs2),
}, {
.reg = PMBUS_READ_TEMPERATURE_3,
.class = PSC_TEMPERATURE,
.paged = true,
.update = true,
.compare = true,
.func = PMBUS_HAVE_TEMP3,
.sfunc = PMBUS_HAVE_STATUS_TEMP,
.sreg = PMBUS_STATUS_TEMPERATURE,
.gbit = PB_STATUS_TEMPERATURE,
.limit = temp_limit_attrs3,
.nlimit = ARRAY_SIZE(temp_limit_attrs3),
}
};
static const int pmbus_fan_registers[] = {
PMBUS_READ_FAN_SPEED_1,
PMBUS_READ_FAN_SPEED_2,
PMBUS_READ_FAN_SPEED_3,
PMBUS_READ_FAN_SPEED_4
};
static const int pmbus_fan_status_registers[] = {
PMBUS_STATUS_FAN_12,
PMBUS_STATUS_FAN_12,
PMBUS_STATUS_FAN_34,
PMBUS_STATUS_FAN_34
};
static const u32 pmbus_fan_flags[] = {
PMBUS_HAVE_FAN12,
PMBUS_HAVE_FAN12,
PMBUS_HAVE_FAN34,
PMBUS_HAVE_FAN34
};
static const u32 pmbus_fan_status_flags[] = {
PMBUS_HAVE_STATUS_FAN12,
PMBUS_HAVE_STATUS_FAN12,
PMBUS_HAVE_STATUS_FAN34,
PMBUS_HAVE_STATUS_FAN34
};
/* Fans */
/* Precondition: FAN_CONFIG_x_y and FAN_COMMAND_x must exist for the fan ID */
static int pmbus_add_fan_ctrl(struct i2c_client *client,
struct pmbus_data *data, int index, int page, int id,
u8 config)
{
struct pmbus_sensor *sensor;
sensor = pmbus_add_sensor(data, "fan", "target", index, page,
0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN,
false, false, true);
if (!sensor)
return -ENOMEM;
if (!((data->info->func[page] & PMBUS_HAVE_PWM12) ||
(data->info->func[page] & PMBUS_HAVE_PWM34)))
return 0;
sensor = pmbus_add_sensor(data, "pwm", NULL, index, page,
0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM,
false, false, true);
if (!sensor)
return -ENOMEM;
sensor = pmbus_add_sensor(data, "pwm", "enable", index, page,
0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM,
true, false, false);
if (!sensor)
return -ENOMEM;
return 0;
}
static int pmbus_add_fan_attributes(struct i2c_client *client,
struct pmbus_data *data)
{
const struct pmbus_driver_info *info = data->info;
int index = 1;
int page;
int ret;
for (page = 0; page < info->pages; page++) {
int f;
for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) {
int regval;
if (!(info->func[page] & pmbus_fan_flags[f]))
break;
if (!pmbus_check_word_register(client, page,
pmbus_fan_registers[f]))
break;
/*
* Skip fan if not installed.
* Each fan configuration register covers multiple fans,
* so we have to do some magic.
*/
regval = _pmbus_read_byte_data(client, page,
pmbus_fan_config_registers[f]);
if (regval < 0 ||
(!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4)))))
continue;
if (pmbus_add_sensor(data, "fan", "input", index,
page, 0xff, pmbus_fan_registers[f],
PSC_FAN, true, true, true) == NULL)
return -ENOMEM;
/* Fan control */
if (pmbus_check_word_register(client, page,
pmbus_fan_command_registers[f])) {
ret = pmbus_add_fan_ctrl(client, data, index,
page, f, regval);
if (ret < 0)
return ret;
}
/*
* Each fan status register covers multiple fans,
* so we have to do some magic.
*/
if ((info->func[page] & pmbus_fan_status_flags[f]) &&
pmbus_check_byte_register(client,
page, pmbus_fan_status_registers[f])) {
int reg;
if (f > 1) /* fan 3, 4 */
reg = PMBUS_STATUS_FAN_34;
else
reg = PMBUS_STATUS_FAN_12;
ret = pmbus_add_boolean(data, "fan",
"alarm", index, NULL, NULL, page, reg,
PB_FAN_FAN1_WARNING >> (f & 1));
if (ret)
return ret;
ret = pmbus_add_boolean(data, "fan",
"fault", index, NULL, NULL, page, reg,
PB_FAN_FAN1_FAULT >> (f & 1));
if (ret)
return ret;
}
index++;
}
}
return 0;
}
struct pmbus_samples_attr {
int reg;
char *name;
};
struct pmbus_samples_reg {
int page;
struct pmbus_samples_attr *attr;
struct device_attribute dev_attr;
};
static struct pmbus_samples_attr pmbus_samples_registers[] = {
{
.reg = PMBUS_VIRT_SAMPLES,
.name = "samples",
}, {
.reg = PMBUS_VIRT_IN_SAMPLES,
.name = "in_samples",
}, {
.reg = PMBUS_VIRT_CURR_SAMPLES,
.name = "curr_samples",
}, {
.reg = PMBUS_VIRT_POWER_SAMPLES,
.name = "power_samples",
}, {
.reg = PMBUS_VIRT_TEMP_SAMPLES,
.name = "temp_samples",
}
};
#define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr)
static ssize_t pmbus_show_samples(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int val;
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_samples_reg *reg = to_samples_reg(devattr);
struct pmbus_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg);
mutex_unlock(&data->update_lock);
if (val < 0)
return val;
return sysfs_emit(buf, "%d\n", val);
}
static ssize_t pmbus_set_samples(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
int ret;
long val;
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_samples_reg *reg = to_samples_reg(devattr);
struct pmbus_data *data = i2c_get_clientdata(client);
if (kstrtol(buf, 0, &val) < 0)
return -EINVAL;
mutex_lock(&data->update_lock);
ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val);
mutex_unlock(&data->update_lock);
return ret ? : count;
}
static int pmbus_add_samples_attr(struct pmbus_data *data, int page,
struct pmbus_samples_attr *attr)
{
struct pmbus_samples_reg *reg;
reg = devm_kzalloc(data->dev, sizeof(*reg), GFP_KERNEL);
if (!reg)
return -ENOMEM;
reg->attr = attr;
reg->page = page;
pmbus_dev_attr_init(®->dev_attr, attr->name, 0644,
pmbus_show_samples, pmbus_set_samples);
return pmbus_add_attribute(data, ®->dev_attr.attr);
}
static int pmbus_add_samples_attributes(struct i2c_client *client,
struct pmbus_data *data)
{
const struct pmbus_driver_info *info = data->info;
int s;
if (!(info->func[0] & PMBUS_HAVE_SAMPLES))
return 0;
for (s = 0; s < ARRAY_SIZE(pmbus_samples_registers); s++) {
struct pmbus_samples_attr *attr;
int ret;
attr = &pmbus_samples_registers[s];
if (!pmbus_check_word_register(client, 0, attr->reg))
continue;
ret = pmbus_add_samples_attr(data, 0, attr);
if (ret)
return ret;
}
return 0;
}
static int pmbus_find_attributes(struct i2c_client *client,
struct pmbus_data *data)
{
int ret;
/* Voltage sensors */
ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes,
ARRAY_SIZE(voltage_attributes));
if (ret)
return ret;
/* Current sensors */
ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes,
ARRAY_SIZE(current_attributes));
if (ret)
return ret;
/* Power sensors */
ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes,
ARRAY_SIZE(power_attributes));
if (ret)
return ret;
/* Temperature sensors */
ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes,
ARRAY_SIZE(temp_attributes));
if (ret)
return ret;
/* Fans */
ret = pmbus_add_fan_attributes(client, data);
if (ret)
return ret;
ret = pmbus_add_samples_attributes(client, data);
return ret;
}
/*
* The pmbus_class_attr_map structure maps one sensor class to
* it's corresponding sensor attributes array.
*/
struct pmbus_class_attr_map {
enum pmbus_sensor_classes class;
int nattr;
const struct pmbus_sensor_attr *attr;
};
static const struct pmbus_class_attr_map class_attr_map[] = {
{
.class = PSC_VOLTAGE_IN,
.attr = voltage_attributes,
.nattr = ARRAY_SIZE(voltage_attributes),
}, {
.class = PSC_VOLTAGE_OUT,
.attr = voltage_attributes,
.nattr = ARRAY_SIZE(voltage_attributes),
}, {
.class = PSC_CURRENT_IN,
.attr = current_attributes,
.nattr = ARRAY_SIZE(current_attributes),
}, {
.class = PSC_CURRENT_OUT,
.attr = current_attributes,
.nattr = ARRAY_SIZE(current_attributes),
}, {
.class = PSC_POWER,
.attr = power_attributes,
.nattr = ARRAY_SIZE(power_attributes),
}, {
.class = PSC_TEMPERATURE,
.attr = temp_attributes,
.nattr = ARRAY_SIZE(temp_attributes),
}
};
/*
* Read the coefficients for direct mode.
*/
static int pmbus_read_coefficients(struct i2c_client *client,
struct pmbus_driver_info *info,
const struct pmbus_sensor_attr *attr)
{
int rv;
union i2c_smbus_data data;
enum pmbus_sensor_classes class = attr->class;
s8 R;
s16 m, b;
data.block[0] = 2;
data.block[1] = attr->reg;
data.block[2] = 0x01;
rv = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
I2C_SMBUS_WRITE, PMBUS_COEFFICIENTS,
I2C_SMBUS_BLOCK_PROC_CALL, &data);
if (rv < 0)
return rv;
if (data.block[0] != 5)
return -EIO;
m = data.block[1] | (data.block[2] << 8);
b = data.block[3] | (data.block[4] << 8);
R = data.block[5];
info->m[class] = m;
info->b[class] = b;
info->R[class] = R;
return rv;
}
static int pmbus_init_coefficients(struct i2c_client *client,
struct pmbus_driver_info *info)
{
int i, n, ret = -EINVAL;
const struct pmbus_class_attr_map *map;
const struct pmbus_sensor_attr *attr;
for (i = 0; i < ARRAY_SIZE(class_attr_map); i++) {
map = &class_attr_map[i];
if (info->format[map->class] != direct)
continue;
for (n = 0; n < map->nattr; n++) {
attr = &map->attr[n];
if (map->class != attr->class)
continue;
ret = pmbus_read_coefficients(client, info, attr);
if (ret >= 0)
break;
}
if (ret < 0) {
dev_err(&client->dev,
"No coefficients found for sensor class %d\n",
map->class);
return -EINVAL;
}
}
return 0;
}
/*
* Identify chip parameters.
* This function is called for all chips.
*/
static int pmbus_identify_common(struct i2c_client *client,
struct pmbus_data *data, int page)
{
int vout_mode = -1;
if (pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE))
vout_mode = _pmbus_read_byte_data(client, page,
PMBUS_VOUT_MODE);
if (vout_mode >= 0 && vout_mode != 0xff) {
/*
* Not all chips support the VOUT_MODE command,
* so a failure to read it is not an error.
*/
switch (vout_mode >> 5) {
case 0: /* linear mode */
if (data->info->format[PSC_VOLTAGE_OUT] != linear)
return -ENODEV;
data->exponent[page] = ((s8)(vout_mode << 3)) >> 3;
break;
case 1: /* VID mode */
if (data->info->format[PSC_VOLTAGE_OUT] != vid)
return -ENODEV;
break;
case 2: /* direct mode */
if (data->info->format[PSC_VOLTAGE_OUT] != direct)
return -ENODEV;
break;
case 3: /* ieee 754 half precision */
if (data->info->format[PSC_VOLTAGE_OUT] != ieee754)
return -ENODEV;
break;
default:
return -ENODEV;
}
}
return 0;
}
static int pmbus_read_status_byte(struct i2c_client *client, int page)
{
return _pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE);
}
static int pmbus_read_status_word(struct i2c_client *client, int page)
{
return _pmbus_read_word_data(client, page, 0xff, PMBUS_STATUS_WORD);
}
/* PEC attribute support */
static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
char *buf)
{
struct i2c_client *client = to_i2c_client(dev);
return sysfs_emit(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
}
static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
bool enable;
int err;
err = kstrtobool(buf, &enable);
if (err < 0)
return err;
if (enable)
client->flags |= I2C_CLIENT_PEC;
else
client->flags &= ~I2C_CLIENT_PEC;
return count;
}
static DEVICE_ATTR_RW(pec);
static void pmbus_remove_pec(void *dev)
{
device_remove_file(dev, &dev_attr_pec);
}
static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
struct pmbus_driver_info *info)
{
struct device *dev = &client->dev;
int page, ret;
/*
* Figure out if PEC is enabled before accessing any other register.
* Make sure PEC is disabled, will be enabled later if needed.
*/
client->flags &= ~I2C_CLIENT_PEC;
/* Enable PEC if the controller and bus supports it */
if (!(data->flags & PMBUS_NO_CAPABILITY)) {
ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK)) {
if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_PEC))
client->flags |= I2C_CLIENT_PEC;
}
}
/*
* Some PMBus chips don't support PMBUS_STATUS_WORD, so try
* to use PMBUS_STATUS_BYTE instead if that is the case.
* Bail out if both registers are not supported.
*/
data->read_status = pmbus_read_status_word;
ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD);
if (ret < 0 || ret == 0xffff) {
data->read_status = pmbus_read_status_byte;
ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE);
if (ret < 0 || ret == 0xff) {
dev_err(dev, "PMBus status register not found\n");
return -ENODEV;
}
} else {
data->has_status_word = true;
}
/*
* Check if the chip is write protected. If it is, we can not clear
* faults, and we should not try it. Also, in that case, writes into
* limit registers need to be disabled.
*/
if (!(data->flags & PMBUS_NO_WRITE_PROTECT)) {
ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT);
if (ret > 0 && (ret & PB_WP_ANY))
data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK;
}
if (data->info->pages)
pmbus_clear_faults(client);
else
pmbus_clear_fault_page(client, -1);
if (info->identify) {
ret = (*info->identify)(client, info);
if (ret < 0) {
dev_err(dev, "Chip identification failed\n");
return ret;
}
}
if (info->pages <= 0 || info->pages > PMBUS_PAGES) {
dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages);
return -ENODEV;
}
for (page = 0; page < info->pages; page++) {
ret = pmbus_identify_common(client, data, page);
if (ret < 0) {
dev_err(dev, "Failed to identify chip capabilities\n");
return ret;
}
}
if (data->flags & PMBUS_USE_COEFFICIENTS_CMD) {
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BLOCK_PROC_CALL))
return -ENODEV;
ret = pmbus_init_coefficients(client, info);
if (ret < 0)
return ret;
}
if (client->flags & I2C_CLIENT_PEC) {
/*
* If I2C_CLIENT_PEC is set here, both the I2C adapter and the
* chip support PEC. Add 'pec' attribute to client device to let
* the user control it.
*/
ret = device_create_file(dev, &dev_attr_pec);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, pmbus_remove_pec, dev);
if (ret)
return ret;
}
return 0;
}
/* A PMBus status flag and the corresponding REGULATOR_ERROR_* and REGULATOR_EVENTS_* flag */
struct pmbus_status_assoc {
int pflag, rflag, eflag;
};
/* PMBus->regulator bit mappings for a PMBus status register */
struct pmbus_status_category {
int func;
int reg;
const struct pmbus_status_assoc *bits; /* zero-terminated */
};
static const struct pmbus_status_category __maybe_unused pmbus_status_flag_map[] = {
{
.func = PMBUS_HAVE_STATUS_VOUT,
.reg = PMBUS_STATUS_VOUT,
.bits = (const struct pmbus_status_assoc[]) {
{ PB_VOLTAGE_UV_WARNING, REGULATOR_ERROR_UNDER_VOLTAGE_WARN,
REGULATOR_EVENT_UNDER_VOLTAGE_WARN },
{ PB_VOLTAGE_UV_FAULT, REGULATOR_ERROR_UNDER_VOLTAGE,
REGULATOR_EVENT_UNDER_VOLTAGE },
{ PB_VOLTAGE_OV_WARNING, REGULATOR_ERROR_OVER_VOLTAGE_WARN,
REGULATOR_EVENT_OVER_VOLTAGE_WARN },
{ PB_VOLTAGE_OV_FAULT, REGULATOR_ERROR_REGULATION_OUT,
REGULATOR_EVENT_OVER_VOLTAGE_WARN },
{ },
},
}, {
.func = PMBUS_HAVE_STATUS_IOUT,
.reg = PMBUS_STATUS_IOUT,
.bits = (const struct pmbus_status_assoc[]) {
{ PB_IOUT_OC_WARNING, REGULATOR_ERROR_OVER_CURRENT_WARN,
REGULATOR_EVENT_OVER_CURRENT_WARN },
{ PB_IOUT_OC_FAULT, REGULATOR_ERROR_OVER_CURRENT,
REGULATOR_EVENT_OVER_CURRENT },
{ PB_IOUT_OC_LV_FAULT, REGULATOR_ERROR_OVER_CURRENT,
REGULATOR_EVENT_OVER_CURRENT },
{ },
},
}, {
.func = PMBUS_HAVE_STATUS_TEMP,
.reg = PMBUS_STATUS_TEMPERATURE,
.bits = (const struct pmbus_status_assoc[]) {
{ PB_TEMP_OT_WARNING, REGULATOR_ERROR_OVER_TEMP_WARN,
REGULATOR_EVENT_OVER_TEMP_WARN },
{ PB_TEMP_OT_FAULT, REGULATOR_ERROR_OVER_TEMP,
REGULATOR_EVENT_OVER_TEMP },
{ },
},
},
};
static int _pmbus_is_enabled(struct i2c_client *client, u8 page)
{
int ret;
ret = _pmbus_read_byte_data(client, page, PMBUS_OPERATION);
if (ret < 0)
return ret;
return !!(ret & PB_OPERATION_CONTROL_ON);
}
static int __maybe_unused pmbus_is_enabled(struct i2c_client *client, u8 page)
{
struct pmbus_data *data = i2c_get_clientdata(client);
int ret;
mutex_lock(&data->update_lock);
ret = _pmbus_is_enabled(client, page);
mutex_unlock(&data->update_lock);
return ret;
}
#define to_dev_attr(_dev_attr) \
container_of(_dev_attr, struct device_attribute, attr)
static void pmbus_notify(struct pmbus_data *data, int page, int reg, int flags)
{
int i;
for (i = 0; i < data->num_attributes; i++) {
struct device_attribute *da = to_dev_attr(data->group.attrs[i]);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int index = attr->index;
u16 smask = pb_index_to_mask(index);
u8 spage = pb_index_to_page(index);
u16 sreg = pb_index_to_reg(index);
if (reg == sreg && page == spage && (smask & flags)) {
dev_dbg(data->dev, "sysfs notify: %s", da->attr.name);
sysfs_notify(&data->dev->kobj, NULL, da->attr.name);
kobject_uevent(&data->dev->kobj, KOBJ_CHANGE);
flags &= ~smask;
}
if (!flags)
break;
}
}
static int _pmbus_get_flags(struct pmbus_data *data, u8 page, unsigned int *flags,
unsigned int *event, bool notify)
{
int i, status;
const struct pmbus_status_category *cat;
const struct pmbus_status_assoc *bit;
struct device *dev = data->dev;
struct i2c_client *client = to_i2c_client(dev);
int func = data->info->func[page];
*flags = 0;
*event = 0;
for (i = 0; i < ARRAY_SIZE(pmbus_status_flag_map); i++) {
cat = &pmbus_status_flag_map[i];
if (!(func & cat->func))
continue;
status = _pmbus_read_byte_data(client, page, cat->reg);
if (status < 0)
return status;
for (bit = cat->bits; bit->pflag; bit++)
if (status & bit->pflag) {
*flags |= bit->rflag;
*event |= bit->eflag;
}
if (notify && status)
pmbus_notify(data, page, cat->reg, status);
}
/*
* Map what bits of STATUS_{WORD,BYTE} we can to REGULATOR_ERROR_*
* bits. Some of the other bits are tempting (especially for cases
* where we don't have the relevant PMBUS_HAVE_STATUS_*
* functionality), but there's an unfortunate ambiguity in that
* they're defined as indicating a fault *or* a warning, so we can't
* easily determine whether to report REGULATOR_ERROR_<foo> or
* REGULATOR_ERROR_<foo>_WARN.
*/
status = pmbus_get_status(client, page, PMBUS_STATUS_WORD);
if (status < 0)
return status;
if (_pmbus_is_enabled(client, page)) {
if (status & PB_STATUS_OFF) {
*flags |= REGULATOR_ERROR_FAIL;
*event |= REGULATOR_EVENT_FAIL;
}
if (status & PB_STATUS_POWER_GOOD_N) {
*flags |= REGULATOR_ERROR_REGULATION_OUT;
*event |= REGULATOR_EVENT_REGULATION_OUT;
}
}
/*
* Unlike most other status bits, PB_STATUS_{IOUT_OC,VOUT_OV} are
* defined strictly as fault indicators (not warnings).
*/
if (status & PB_STATUS_IOUT_OC) {
*flags |= REGULATOR_ERROR_OVER_CURRENT;
*event |= REGULATOR_EVENT_OVER_CURRENT;
}
if (status & PB_STATUS_VOUT_OV) {
*flags |= REGULATOR_ERROR_REGULATION_OUT;
*event |= REGULATOR_EVENT_FAIL;
}
/*
* If we haven't discovered any thermal faults or warnings via
* PMBUS_STATUS_TEMPERATURE, map PB_STATUS_TEMPERATURE to a warning as
* a (conservative) best-effort interpretation.
*/
if (!(*flags & (REGULATOR_ERROR_OVER_TEMP | REGULATOR_ERROR_OVER_TEMP_WARN)) &&
(status & PB_STATUS_TEMPERATURE)) {
*flags |= REGULATOR_ERROR_OVER_TEMP_WARN;
*event |= REGULATOR_EVENT_OVER_TEMP_WARN;
}
return 0;
}
static int __maybe_unused pmbus_get_flags(struct pmbus_data *data, u8 page, unsigned int *flags,
unsigned int *event, bool notify)
{
int ret;
mutex_lock(&data->update_lock);
ret = _pmbus_get_flags(data, page, flags, event, notify);
mutex_unlock(&data->update_lock);
return ret;
}
#if IS_ENABLED(CONFIG_REGULATOR)
static int pmbus_regulator_is_enabled(struct regulator_dev *rdev)
{
struct device *dev = rdev_get_dev(rdev);
struct i2c_client *client = to_i2c_client(dev->parent);
return pmbus_is_enabled(client, rdev_get_id(rdev));
}
static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable)
{
struct device *dev = rdev_get_dev(rdev);
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_data *data = i2c_get_clientdata(client);
u8 page = rdev_get_id(rdev);
int ret;
mutex_lock(&data->update_lock);
ret = pmbus_update_byte_data(client, page, PMBUS_OPERATION,
PB_OPERATION_CONTROL_ON,
enable ? PB_OPERATION_CONTROL_ON : 0);
mutex_unlock(&data->update_lock);
return ret;
}
static int pmbus_regulator_enable(struct regulator_dev *rdev)
{
return _pmbus_regulator_on_off(rdev, 1);
}
static int pmbus_regulator_disable(struct regulator_dev *rdev)
{
return _pmbus_regulator_on_off(rdev, 0);
}
static int pmbus_regulator_get_error_flags(struct regulator_dev *rdev, unsigned int *flags)
{
struct device *dev = rdev_get_dev(rdev);
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_data *data = i2c_get_clientdata(client);
int event;
return pmbus_get_flags(data, rdev_get_id(rdev), flags, &event, false);
}
static int pmbus_regulator_get_status(struct regulator_dev *rdev)
{
struct device *dev = rdev_get_dev(rdev);
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_data *data = i2c_get_clientdata(client);
u8 page = rdev_get_id(rdev);
int status, ret;
int event;
mutex_lock(&data->update_lock);
status = pmbus_get_status(client, page, PMBUS_STATUS_WORD);
if (status < 0) {
ret = status;
goto unlock;
}
if (status & PB_STATUS_OFF) {
ret = REGULATOR_STATUS_OFF;
goto unlock;
}
/* If regulator is ON & reports power good then return ON */
if (!(status & PB_STATUS_POWER_GOOD_N)) {
ret = REGULATOR_STATUS_ON;
goto unlock;
}
ret = _pmbus_get_flags(data, rdev_get_id(rdev), &status, &event, false);
if (ret)
goto unlock;
if (status & (REGULATOR_ERROR_UNDER_VOLTAGE | REGULATOR_ERROR_OVER_CURRENT |
REGULATOR_ERROR_REGULATION_OUT | REGULATOR_ERROR_FAIL | REGULATOR_ERROR_OVER_TEMP)) {
ret = REGULATOR_STATUS_ERROR;
goto unlock;
}
ret = REGULATOR_STATUS_UNDEFINED;
unlock:
mutex_unlock(&data->update_lock);
return ret;
}
static int pmbus_regulator_get_low_margin(struct i2c_client *client, int page)
{
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor s = {
.page = page,
.class = PSC_VOLTAGE_OUT,
.convert = true,
.data = -1,
};
if (data->vout_low[page] < 0) {
if (pmbus_check_word_register(client, page, PMBUS_MFR_VOUT_MIN))
s.data = _pmbus_read_word_data(client, page, 0xff,
PMBUS_MFR_VOUT_MIN);
if (s.data < 0) {
s.data = _pmbus_read_word_data(client, page, 0xff,
PMBUS_VOUT_MARGIN_LOW);
if (s.data < 0)
return s.data;
}
data->vout_low[page] = pmbus_reg2data(data, &s);
}
return data->vout_low[page];
}
static int pmbus_regulator_get_high_margin(struct i2c_client *client, int page)
{
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor s = {
.page = page,
.class = PSC_VOLTAGE_OUT,
.convert = true,
.data = -1,
};
if (data->vout_high[page] < 0) {
if (pmbus_check_word_register(client, page, PMBUS_MFR_VOUT_MAX))
s.data = _pmbus_read_word_data(client, page, 0xff,
PMBUS_MFR_VOUT_MAX);
if (s.data < 0) {
s.data = _pmbus_read_word_data(client, page, 0xff,
PMBUS_VOUT_MARGIN_HIGH);
if (s.data < 0)
return s.data;
}
data->vout_high[page] = pmbus_reg2data(data, &s);
}
return data->vout_high[page];
}
static int pmbus_regulator_get_voltage(struct regulator_dev *rdev)
{
struct device *dev = rdev_get_dev(rdev);
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor s = {
.page = rdev_get_id(rdev),
.class = PSC_VOLTAGE_OUT,
.convert = true,
};
s.data = _pmbus_read_word_data(client, s.page, 0xff, PMBUS_READ_VOUT);
if (s.data < 0)
return s.data;
return (int)pmbus_reg2data(data, &s) * 1000; /* unit is uV */
}
static int pmbus_regulator_set_voltage(struct regulator_dev *rdev, int min_uv,
int max_uv, unsigned int *selector)
{
struct device *dev = rdev_get_dev(rdev);
struct i2c_client *client = to_i2c_client(dev->parent);
struct pmbus_data *data = i2c_get_clientdata(client);
struct pmbus_sensor s = {
.page = rdev_get_id(rdev),
.class = PSC_VOLTAGE_OUT,
.convert = true,
.data = -1,
};
int val = DIV_ROUND_CLOSEST(min_uv, 1000); /* convert to mV */
int low, high;
*selector = 0;
low = pmbus_regulator_get_low_margin(client, s.page);
if (low < 0)
return low;
high = pmbus_regulator_get_high_margin(client, s.page);
if (high < 0)
return high;
/* Make sure we are within margins */
if (low > val)
val = low;
if (high < val)
val = high;
val = pmbus_data2reg(data, &s, val);
return _pmbus_write_word_data(client, s.page, PMBUS_VOUT_COMMAND, (u16)val);
}
static int pmbus_regulator_list_voltage(struct regulator_dev *rdev,
unsigned int selector)
{
struct device *dev = rdev_get_dev(rdev);
struct i2c_client *client = to_i2c_client(dev->parent);
int val, low, high;
if (selector >= rdev->desc->n_voltages ||
selector < rdev->desc->linear_min_sel)
return -EINVAL;
selector -= rdev->desc->linear_min_sel;
val = DIV_ROUND_CLOSEST(rdev->desc->min_uV +
(rdev->desc->uV_step * selector), 1000); /* convert to mV */
low = pmbus_regulator_get_low_margin(client, rdev_get_id(rdev));
if (low < 0)
return low;
high = pmbus_regulator_get_high_margin(client, rdev_get_id(rdev));
if (high < 0)
return high;
if (val >= low && val <= high)
return val * 1000; /* unit is uV */
return 0;
}
const struct regulator_ops pmbus_regulator_ops = {
.enable = pmbus_regulator_enable,
.disable = pmbus_regulator_disable,
.is_enabled = pmbus_regulator_is_enabled,
.get_error_flags = pmbus_regulator_get_error_flags,
.get_status = pmbus_regulator_get_status,
.get_voltage = pmbus_regulator_get_voltage,
.set_voltage = pmbus_regulator_set_voltage,
.list_voltage = pmbus_regulator_list_voltage,
};
EXPORT_SYMBOL_NS_GPL(pmbus_regulator_ops, PMBUS);
static int pmbus_regulator_register(struct pmbus_data *data)
{
struct device *dev = data->dev;
const struct pmbus_driver_info *info = data->info;
const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
int i;
data->rdevs = devm_kzalloc(dev, sizeof(struct regulator_dev *) * info->num_regulators,
GFP_KERNEL);
if (!data->rdevs)
return -ENOMEM;
for (i = 0; i < info->num_regulators; i++) {
struct regulator_config config = { };
config.dev = dev;
config.driver_data = data;
if (pdata && pdata->reg_init_data)
config.init_data = &pdata->reg_init_data[i];
data->rdevs[i] = devm_regulator_register(dev, &info->reg_desc[i],
&config);
if (IS_ERR(data->rdevs[i]))
return dev_err_probe(dev, PTR_ERR(data->rdevs[i]),
"Failed to register %s regulator\n",
info->reg_desc[i].name);
}
return 0;
}
static int pmbus_regulator_notify(struct pmbus_data *data, int page, int event)
{
int j;
for (j = 0; j < data->info->num_regulators; j++) {
if (page == rdev_get_id(data->rdevs[j])) {
regulator_notifier_call_chain(data->rdevs[j], event, NULL);
break;
}
}
return 0;
}
#else
static int pmbus_regulator_register(struct pmbus_data *data)
{
return 0;
}
static int pmbus_regulator_notify(struct pmbus_data *data, int page, int event)
{
return 0;
}
#endif
static int pmbus_write_smbalert_mask(struct i2c_client *client, u8 page, u8 reg, u8 val)
{
return pmbus_write_word_data(client, page, PMBUS_SMBALERT_MASK, reg | (val << 8));
}
static irqreturn_t pmbus_fault_handler(int irq, void *pdata)
{
struct pmbus_data *data = pdata;
struct i2c_client *client = to_i2c_client(data->dev);
int i, status, event;
mutex_lock(&data->update_lock);
for (i = 0; i < data->info->pages; i++) {
_pmbus_get_flags(data, i, &status, &event, true);
if (event)
pmbus_regulator_notify(data, i, event);
}
pmbus_clear_faults(client);
mutex_unlock(&data->update_lock);
return IRQ_HANDLED;
}
static int pmbus_irq_setup(struct i2c_client *client, struct pmbus_data *data)
{
struct device *dev = &client->dev;
const struct pmbus_status_category *cat;
const struct pmbus_status_assoc *bit;
int i, j, err, func;
u8 mask;
static const u8 misc_status[] = {PMBUS_STATUS_CML, PMBUS_STATUS_OTHER,
PMBUS_STATUS_MFR_SPECIFIC, PMBUS_STATUS_FAN_12,
PMBUS_STATUS_FAN_34};
if (!client->irq)
return 0;
for (i = 0; i < data->info->pages; i++) {
func = data->info->func[i];
for (j = 0; j < ARRAY_SIZE(pmbus_status_flag_map); j++) {
cat = &pmbus_status_flag_map[j];
if (!(func & cat->func))
continue;
mask = 0;
for (bit = cat->bits; bit->pflag; bit++)
mask |= bit->pflag;
err = pmbus_write_smbalert_mask(client, i, cat->reg, ~mask);
if (err)
dev_dbg_once(dev, "Failed to set smbalert for reg 0x%02x\n",
cat->reg);
}
for (j = 0; j < ARRAY_SIZE(misc_status); j++)
pmbus_write_smbalert_mask(client, i, misc_status[j], 0xff);
}
/* Register notifiers */
err = devm_request_threaded_irq(dev, client->irq, NULL, pmbus_fault_handler,
IRQF_ONESHOT, "pmbus-irq", data);
if (err) {
dev_err(dev, "failed to request an irq %d\n", err);
return err;
}
return 0;
}
static struct dentry *pmbus_debugfs_dir; /* pmbus debugfs directory */
#if IS_ENABLED(CONFIG_DEBUG_FS)
static int pmbus_debugfs_get(void *data, u64 *val)
{
int rc;
struct pmbus_debugfs_entry *entry = data;
struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
rc = mutex_lock_interruptible(&pdata->update_lock);
if (rc)
return rc;
rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg);
mutex_unlock(&pdata->update_lock);
if (rc < 0)
return rc;
*val = rc;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops, pmbus_debugfs_get, NULL,
"0x%02llx\n");
static int pmbus_debugfs_get_status(void *data, u64 *val)
{
int rc;
struct pmbus_debugfs_entry *entry = data;
struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
rc = mutex_lock_interruptible(&pdata->update_lock);
if (rc)
return rc;
rc = pdata->read_status(entry->client, entry->page);
mutex_unlock(&pdata->update_lock);
if (rc < 0)
return rc;
*val = rc;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_status, pmbus_debugfs_get_status,
NULL, "0x%04llx\n");
static ssize_t pmbus_debugfs_mfr_read(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
{
int rc;
struct pmbus_debugfs_entry *entry = file->private_data;
struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
char data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
rc = mutex_lock_interruptible(&pdata->update_lock);
if (rc)
return rc;
rc = pmbus_read_block_data(entry->client, entry->page, entry->reg,
data);
mutex_unlock(&pdata->update_lock);
if (rc < 0)
return rc;
/* Add newline at the end of a read data */
data[rc] = '\n';
/* Include newline into the length */
rc += 1;
return simple_read_from_buffer(buf, count, ppos, data, rc);
}
static const struct file_operations pmbus_debugfs_ops_mfr = {
.llseek = noop_llseek,
.read = pmbus_debugfs_mfr_read,
.write = NULL,
.open = simple_open,
};
static void pmbus_remove_debugfs(void *data)
{
struct dentry *entry = data;
debugfs_remove_recursive(entry);
}
static int pmbus_init_debugfs(struct i2c_client *client,
struct pmbus_data *data)
{
int i, idx = 0;
char name[PMBUS_NAME_SIZE];
struct pmbus_debugfs_entry *entries;
if (!pmbus_debugfs_dir)
return -ENODEV;
/*
* Create the debugfs directory for this device. Use the hwmon device
* name to avoid conflicts (hwmon numbers are globally unique).
*/
data->debugfs = debugfs_create_dir(dev_name(data->hwmon_dev),
pmbus_debugfs_dir);
if (IS_ERR_OR_NULL(data->debugfs)) {
data->debugfs = NULL;
return -ENODEV;
}
/*
* Allocate the max possible entries we need.
* 6 entries device-specific
* 10 entries page-specific
*/
entries = devm_kcalloc(data->dev,
6 + data->info->pages * 10, sizeof(*entries),
GFP_KERNEL);
if (!entries)
return -ENOMEM;
/*
* Add device-specific entries.
* Please note that the PMBUS standard allows all registers to be
* page-specific.
* To reduce the number of debugfs entries for devices with many pages
* assume that values of the following registers are the same for all
* pages and report values only for page 0.
*/
if (pmbus_check_block_register(client, 0, PMBUS_MFR_ID)) {
entries[idx].client = client;
entries[idx].page = 0;
entries[idx].reg = PMBUS_MFR_ID;
debugfs_create_file("mfr_id", 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops_mfr);
}
if (pmbus_check_block_register(client, 0, PMBUS_MFR_MODEL)) {
entries[idx].client = client;
entries[idx].page = 0;
entries[idx].reg = PMBUS_MFR_MODEL;
debugfs_create_file("mfr_model", 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops_mfr);
}
if (pmbus_check_block_register(client, 0, PMBUS_MFR_REVISION)) {
entries[idx].client = client;
entries[idx].page = 0;
entries[idx].reg = PMBUS_MFR_REVISION;
debugfs_create_file("mfr_revision", 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops_mfr);
}
if (pmbus_check_block_register(client, 0, PMBUS_MFR_LOCATION)) {
entries[idx].client = client;
entries[idx].page = 0;
entries[idx].reg = PMBUS_MFR_LOCATION;
debugfs_create_file("mfr_location", 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops_mfr);
}
if (pmbus_check_block_register(client, 0, PMBUS_MFR_DATE)) {
entries[idx].client = client;
entries[idx].page = 0;
entries[idx].reg = PMBUS_MFR_DATE;
debugfs_create_file("mfr_date", 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops_mfr);
}
if (pmbus_check_block_register(client, 0, PMBUS_MFR_SERIAL)) {
entries[idx].client = client;
entries[idx].page = 0;
entries[idx].reg = PMBUS_MFR_SERIAL;
debugfs_create_file("mfr_serial", 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops_mfr);
}
/* Add page specific entries */
for (i = 0; i < data->info->pages; ++i) {
/* Check accessibility of status register if it's not page 0 */
if (!i || pmbus_check_status_register(client, i)) {
/* No need to set reg as we have special read op. */
entries[idx].client = client;
entries[idx].page = i;
scnprintf(name, PMBUS_NAME_SIZE, "status%d", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops_status);
}
if (data->info->func[i] & PMBUS_HAVE_STATUS_VOUT) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_VOUT;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_vout", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (data->info->func[i] & PMBUS_HAVE_STATUS_IOUT) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_IOUT;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_iout", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (data->info->func[i] & PMBUS_HAVE_STATUS_INPUT) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_INPUT;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_input", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (data->info->func[i] & PMBUS_HAVE_STATUS_TEMP) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_TEMPERATURE;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_temp", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (pmbus_check_byte_register(client, i, PMBUS_STATUS_CML)) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_CML;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_cml", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (pmbus_check_byte_register(client, i, PMBUS_STATUS_OTHER)) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_OTHER;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_other", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (pmbus_check_byte_register(client, i,
PMBUS_STATUS_MFR_SPECIFIC)) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_MFR_SPECIFIC;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_mfr", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN12) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_FAN_12;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan12", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN34) {
entries[idx].client = client;
entries[idx].page = i;
entries[idx].reg = PMBUS_STATUS_FAN_34;
scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan34", i);
debugfs_create_file(name, 0444, data->debugfs,
&entries[idx++],
&pmbus_debugfs_ops);
}
}
return devm_add_action_or_reset(data->dev,
pmbus_remove_debugfs, data->debugfs);
}
#else
static int pmbus_init_debugfs(struct i2c_client *client,
struct pmbus_data *data)
{
return 0;
}
#endif /* IS_ENABLED(CONFIG_DEBUG_FS) */
int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info)
{
struct device *dev = &client->dev;
const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
struct pmbus_data *data;
size_t groups_num = 0;
int ret;
int i;
char *name;
if (!info)
return -ENODEV;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE
| I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
if (info->groups)
while (info->groups[groups_num])
groups_num++;
data->groups = devm_kcalloc(dev, groups_num + 2, sizeof(void *),
GFP_KERNEL);
if (!data->groups)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
data->dev = dev;
if (pdata)
data->flags = pdata->flags;
data->info = info;
data->currpage = -1;
data->currphase = -1;
for (i = 0; i < ARRAY_SIZE(data->vout_low); i++) {
data->vout_low[i] = -1;
data->vout_high[i] = -1;
}
ret = pmbus_init_common(client, data, info);
if (ret < 0)
return ret;
ret = pmbus_find_attributes(client, data);
if (ret)
return ret;
/*
* If there are no attributes, something is wrong.
* Bail out instead of trying to register nothing.
*/
if (!data->num_attributes) {
dev_err(dev, "No attributes found\n");
return -ENODEV;
}
name = devm_kstrdup(dev, client->name, GFP_KERNEL);
if (!name)
return -ENOMEM;
strreplace(name, '-', '_');
data->groups[0] = &data->group;
memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num);
data->hwmon_dev = devm_hwmon_device_register_with_groups(dev,
name, data, data->groups);
if (IS_ERR(data->hwmon_dev)) {
dev_err(dev, "Failed to register hwmon device\n");
return PTR_ERR(data->hwmon_dev);
}
ret = pmbus_regulator_register(data);
if (ret)
return ret;
ret = pmbus_irq_setup(client, data);
if (ret)
return ret;
ret = pmbus_init_debugfs(client, data);
if (ret)
dev_warn(dev, "Failed to register debugfs\n");
return 0;
}
EXPORT_SYMBOL_NS_GPL(pmbus_do_probe, PMBUS);
struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
return data->debugfs;
}
EXPORT_SYMBOL_NS_GPL(pmbus_get_debugfs_dir, PMBUS);
int pmbus_lock_interruptible(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
return mutex_lock_interruptible(&data->update_lock);
}
EXPORT_SYMBOL_NS_GPL(pmbus_lock_interruptible, PMBUS);
void pmbus_unlock(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
mutex_unlock(&data->update_lock);
}
EXPORT_SYMBOL_NS_GPL(pmbus_unlock, PMBUS);
static int __init pmbus_core_init(void)
{
pmbus_debugfs_dir = debugfs_create_dir("pmbus", NULL);
if (IS_ERR(pmbus_debugfs_dir))
pmbus_debugfs_dir = NULL;
return 0;
}
static void __exit pmbus_core_exit(void)
{
debugfs_remove_recursive(pmbus_debugfs_dir);
}
module_init(pmbus_core_init);
module_exit(pmbus_core_exit);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus core driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/pmbus/pmbus_core.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers
*
* Copyright (c) 2020 Mellanox Technologies. All rights reserved.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regulator/driver.h>
#include "pmbus.h"
#define XDPE122_PROT_VR12_5MV 0x01 /* VR12.0 mode, 5-mV DAC */
#define XDPE122_PROT_VR12_5_10MV 0x02 /* VR12.5 mode, 10-mV DAC */
#define XDPE122_PROT_IMVP9_10MV 0x03 /* IMVP9 mode, 10-mV DAC */
#define XDPE122_AMD_625MV 0x10 /* AMD mode 6.25mV */
#define XDPE122_PAGE_NUM 2
static int xdpe122_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
long val;
s16 exponent;
s32 mantissa;
int ret;
switch (reg) {
case PMBUS_VOUT_OV_FAULT_LIMIT:
case PMBUS_VOUT_UV_FAULT_LIMIT:
ret = pmbus_read_word_data(client, page, phase, reg);
if (ret < 0)
return ret;
/* Convert register value to LINEAR11 data. */
exponent = ((s16)ret) >> 11;
mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5;
val = mantissa * 1000L;
if (exponent >= 0)
val <<= exponent;
else
val >>= -exponent;
/* Convert data to VID register. */
switch (info->vrm_version[page]) {
case vr13:
if (val >= 500)
return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
return 0;
case vr12:
if (val >= 250)
return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
return 0;
case imvp9:
if (val >= 200)
return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
return 0;
case amd625mv:
if (val >= 200 && val <= 1550)
return DIV_ROUND_CLOSEST((1550 - val) * 100,
625);
return 0;
default:
return -EINVAL;
}
default:
return -ENODATA;
}
return 0;
}
static int xdpe122_identify(struct i2c_client *client,
struct pmbus_driver_info *info)
{
u8 vout_params;
int i, ret, vout_mode;
vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
if (vout_mode >= 0 && vout_mode != 0xff) {
switch (vout_mode >> 5) {
case 0:
info->format[PSC_VOLTAGE_OUT] = linear;
return 0;
case 1:
info->format[PSC_VOLTAGE_OUT] = vid;
info->read_word_data = xdpe122_read_word_data;
break;
default:
return -ENODEV;
}
}
for (i = 0; i < XDPE122_PAGE_NUM; i++) {
/* Read the register with VOUT scaling value.*/
ret = pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
if (ret < 0)
return ret;
vout_params = ret & GENMASK(4, 0);
switch (vout_params) {
case XDPE122_PROT_VR12_5_10MV:
info->vrm_version[i] = vr13;
break;
case XDPE122_PROT_VR12_5MV:
info->vrm_version[i] = vr12;
break;
case XDPE122_PROT_IMVP9_10MV:
info->vrm_version[i] = imvp9;
break;
case XDPE122_AMD_625MV:
info->vrm_version[i] = amd625mv;
break;
default:
return -EINVAL;
}
}
return 0;
}
static const struct regulator_desc __maybe_unused xdpe122_reg_desc[] = {
PMBUS_REGULATOR("vout", 0),
PMBUS_REGULATOR("vout", 1),
};
static struct pmbus_driver_info xdpe122_info = {
.pages = XDPE122_PAGE_NUM,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
.identify = xdpe122_identify,
#if IS_ENABLED(CONFIG_SENSORS_XDPE122_REGULATOR)
.num_regulators = 2,
.reg_desc = xdpe122_reg_desc,
#endif
};
static int xdpe122_probe(struct i2c_client *client)
{
struct pmbus_driver_info *info;
info = devm_kmemdup(&client->dev, &xdpe122_info, sizeof(*info),
GFP_KERNEL);
if (!info)
return -ENOMEM;
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id xdpe122_id[] = {
{"xdpe11280", 0},
{"xdpe12254", 0},
{"xdpe12284", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, xdpe122_id);
static const struct of_device_id __maybe_unused xdpe122_of_match[] = {
{.compatible = "infineon,xdpe11280"},
{.compatible = "infineon,xdpe12254"},
{.compatible = "infineon,xdpe12284"},
{}
};
MODULE_DEVICE_TABLE(of, xdpe122_of_match);
static struct i2c_driver xdpe122_driver = {
.driver = {
.name = "xdpe12284",
.of_match_table = of_match_ptr(xdpe122_of_match),
},
.probe = xdpe122_probe,
.id_table = xdpe122_id,
};
module_i2c_driver(xdpe122_driver);
MODULE_AUTHOR("Vadim Pasternak <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Infineon XDPE122 family");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/xdpe12284.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for ZL6100 and compatibles
*
* Copyright (c) 2011 Ericsson AB.
* Copyright (c) 2012 Guenter Roeck
*/
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/ktime.h>
#include <linux/delay.h>
#include "pmbus.h"
enum chips { zl2004, zl2005, zl2006, zl2008, zl2105, zl2106, zl6100, zl6105,
zl8802, zl9101, zl9117, zls1003, zls4009 };
struct zl6100_data {
int id;
ktime_t access; /* chip access time */
int delay; /* Delay between chip accesses in uS */
struct pmbus_driver_info info;
};
#define to_zl6100_data(x) container_of(x, struct zl6100_data, info)
#define ZL6100_MFR_CONFIG 0xd0
#define ZL6100_DEVICE_ID 0xe4
#define ZL6100_MFR_XTEMP_ENABLE BIT(7)
#define ZL8802_MFR_USER_GLOBAL_CONFIG 0xe9
#define ZL8802_MFR_TMON_ENABLE BIT(12)
#define ZL8802_MFR_USER_CONFIG 0xd1
#define ZL8802_MFR_XTEMP_ENABLE_2 BIT(1)
#define ZL8802_MFR_DDC_CONFIG 0xd3
#define ZL8802_MFR_PHASES_MASK 0x0007
#define MFR_VMON_OV_FAULT_LIMIT 0xf5
#define MFR_VMON_UV_FAULT_LIMIT 0xf6
#define MFR_READ_VMON 0xf7
#define VMON_UV_WARNING BIT(5)
#define VMON_OV_WARNING BIT(4)
#define VMON_UV_FAULT BIT(1)
#define VMON_OV_FAULT BIT(0)
#define ZL6100_WAIT_TIME 1000 /* uS */
static ushort delay = ZL6100_WAIT_TIME;
module_param(delay, ushort, 0644);
MODULE_PARM_DESC(delay, "Delay between chip accesses in uS");
/* Convert linear sensor value to milli-units */
static long zl6100_l2d(s16 l)
{
s16 exponent;
s32 mantissa;
long val;
exponent = l >> 11;
mantissa = ((s16)((l & 0x7ff) << 5)) >> 5;
val = mantissa;
/* scale result to milli-units */
val = val * 1000L;
if (exponent >= 0)
val <<= exponent;
else
val >>= -exponent;
return val;
}
#define MAX_MANTISSA (1023 * 1000)
#define MIN_MANTISSA (511 * 1000)
static u16 zl6100_d2l(long val)
{
s16 exponent = 0, mantissa;
bool negative = false;
/* simple case */
if (val == 0)
return 0;
if (val < 0) {
negative = true;
val = -val;
}
/* Reduce large mantissa until it fits into 10 bit */
while (val >= MAX_MANTISSA && exponent < 15) {
exponent++;
val >>= 1;
}
/* Increase small mantissa to improve precision */
while (val < MIN_MANTISSA && exponent > -15) {
exponent--;
val <<= 1;
}
/* Convert mantissa from milli-units to units */
mantissa = DIV_ROUND_CLOSEST(val, 1000);
/* Ensure that resulting number is within range */
if (mantissa > 0x3ff)
mantissa = 0x3ff;
/* restore sign */
if (negative)
mantissa = -mantissa;
/* Convert to 5 bit exponent, 11 bit mantissa */
return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
}
/* Some chips need a delay between accesses */
static inline void zl6100_wait(const struct zl6100_data *data)
{
if (data->delay) {
s64 delta = ktime_us_delta(ktime_get(), data->access);
if (delta < data->delay)
udelay(data->delay - delta);
}
}
static int zl6100_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct zl6100_data *data = to_zl6100_data(info);
int ret, vreg;
if (page >= info->pages)
return -ENXIO;
if (data->id == zl2005) {
/*
* Limit register detection is not reliable on ZL2005.
* Make sure registers are not erroneously detected.
*/
switch (reg) {
case PMBUS_VOUT_OV_WARN_LIMIT:
case PMBUS_VOUT_UV_WARN_LIMIT:
case PMBUS_IOUT_OC_WARN_LIMIT:
return -ENXIO;
}
}
switch (reg) {
case PMBUS_VIRT_READ_VMON:
vreg = MFR_READ_VMON;
break;
case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
case PMBUS_VIRT_VMON_OV_FAULT_LIMIT:
vreg = MFR_VMON_OV_FAULT_LIMIT;
break;
case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
case PMBUS_VIRT_VMON_UV_FAULT_LIMIT:
vreg = MFR_VMON_UV_FAULT_LIMIT;
break;
default:
if (reg >= PMBUS_VIRT_BASE)
return -ENXIO;
vreg = reg;
break;
}
zl6100_wait(data);
ret = pmbus_read_word_data(client, page, phase, vreg);
data->access = ktime_get();
if (ret < 0)
return ret;
switch (reg) {
case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
ret = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(ret) * 9, 10));
break;
case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
ret = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(ret) * 11, 10));
break;
}
return ret;
}
static int zl6100_read_byte_data(struct i2c_client *client, int page, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct zl6100_data *data = to_zl6100_data(info);
int ret, status;
if (page >= info->pages)
return -ENXIO;
zl6100_wait(data);
switch (reg) {
case PMBUS_VIRT_STATUS_VMON:
ret = pmbus_read_byte_data(client, 0,
PMBUS_STATUS_MFR_SPECIFIC);
if (ret < 0)
break;
status = 0;
if (ret & VMON_UV_WARNING)
status |= PB_VOLTAGE_UV_WARNING;
if (ret & VMON_OV_WARNING)
status |= PB_VOLTAGE_OV_WARNING;
if (ret & VMON_UV_FAULT)
status |= PB_VOLTAGE_UV_FAULT;
if (ret & VMON_OV_FAULT)
status |= PB_VOLTAGE_OV_FAULT;
ret = status;
break;
default:
ret = pmbus_read_byte_data(client, page, reg);
break;
}
data->access = ktime_get();
return ret;
}
static int zl6100_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct zl6100_data *data = to_zl6100_data(info);
int ret, vreg;
if (page >= info->pages)
return -ENXIO;
switch (reg) {
case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
word = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(word) * 10, 9));
vreg = MFR_VMON_OV_FAULT_LIMIT;
pmbus_clear_cache(client);
break;
case PMBUS_VIRT_VMON_OV_FAULT_LIMIT:
vreg = MFR_VMON_OV_FAULT_LIMIT;
pmbus_clear_cache(client);
break;
case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
word = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(word) * 10, 11));
vreg = MFR_VMON_UV_FAULT_LIMIT;
pmbus_clear_cache(client);
break;
case PMBUS_VIRT_VMON_UV_FAULT_LIMIT:
vreg = MFR_VMON_UV_FAULT_LIMIT;
pmbus_clear_cache(client);
break;
default:
if (reg >= PMBUS_VIRT_BASE)
return -ENXIO;
vreg = reg;
}
zl6100_wait(data);
ret = pmbus_write_word_data(client, page, vreg, word);
data->access = ktime_get();
return ret;
}
static int zl6100_write_byte(struct i2c_client *client, int page, u8 value)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct zl6100_data *data = to_zl6100_data(info);
int ret;
if (page >= info->pages)
return -ENXIO;
zl6100_wait(data);
ret = pmbus_write_byte(client, page, value);
data->access = ktime_get();
return ret;
}
static const struct i2c_device_id zl6100_id[] = {
{"bmr450", zl2005},
{"bmr451", zl2005},
{"bmr462", zl2008},
{"bmr463", zl2008},
{"bmr464", zl2008},
{"bmr465", zls4009},
{"bmr466", zls1003},
{"bmr467", zls4009},
{"bmr469", zl8802},
{"zl2004", zl2004},
{"zl2005", zl2005},
{"zl2006", zl2006},
{"zl2008", zl2008},
{"zl2105", zl2105},
{"zl2106", zl2106},
{"zl6100", zl6100},
{"zl6105", zl6105},
{"zl8802", zl8802},
{"zl9101", zl9101},
{"zl9117", zl9117},
{"zls1003", zls1003},
{"zls4009", zls4009},
{ }
};
MODULE_DEVICE_TABLE(i2c, zl6100_id);
static int zl6100_probe(struct i2c_client *client)
{
int ret, i;
struct zl6100_data *data;
struct pmbus_driver_info *info;
u8 device_id[I2C_SMBUS_BLOCK_MAX + 1];
const struct i2c_device_id *mid;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_WORD_DATA
| I2C_FUNC_SMBUS_READ_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, ZL6100_DEVICE_ID,
device_id);
if (ret < 0) {
dev_err(&client->dev, "Failed to read device ID\n");
return ret;
}
device_id[ret] = '\0';
dev_info(&client->dev, "Device ID %s\n", device_id);
mid = NULL;
for (mid = zl6100_id; mid->name[0]; mid++) {
if (!strncasecmp(mid->name, device_id, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
if (strcmp(client->name, mid->name) != 0)
dev_notice(&client->dev,
"Device mismatch: Configured %s, detected %s\n",
client->name, mid->name);
data = devm_kzalloc(&client->dev, sizeof(struct zl6100_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
data->id = mid->driver_data;
/*
* According to information from the chip vendor, all currently
* supported chips are known to require a wait time between I2C
* accesses.
*/
data->delay = delay;
/*
* Since there was a direct I2C device access above, wait before
* accessing the chip again.
*/
data->access = ktime_get();
zl6100_wait(data);
info = &data->info;
info->pages = 1;
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
/*
* ZL2004, ZL8802, ZL9101M, ZL9117M and ZLS4009 support monitoring
* an extra voltage (VMON for ZL2004, ZL8802 and ZLS4009,
* VDRV for ZL9101M and ZL9117M). Report it as vmon.
*/
if (data->id == zl2004 || data->id == zl8802 || data->id == zl9101 ||
data->id == zl9117 || data->id == zls4009)
info->func[0] |= PMBUS_HAVE_VMON | PMBUS_HAVE_STATUS_VMON;
/*
* ZL8802 has two outputs that can be used either independently or in
* a current sharing configuration. The driver uses the DDC_CONFIG
* register to check if the module is running with independent or
* shared outputs. If the module is in shared output mode, only one
* output voltage will be reported.
*/
if (data->id == zl8802) {
info->pages = 2;
info->func[0] |= PMBUS_HAVE_IIN;
ret = i2c_smbus_read_word_data(client, ZL8802_MFR_DDC_CONFIG);
if (ret < 0)
return ret;
data->access = ktime_get();
zl6100_wait(data);
if (ret & ZL8802_MFR_PHASES_MASK)
info->func[1] |= PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
else
info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT;
for (i = 0; i < 2; i++) {
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
if (ret < 0)
return ret;
data->access = ktime_get();
zl6100_wait(data);
ret = i2c_smbus_read_word_data(client, ZL8802_MFR_USER_CONFIG);
if (ret < 0)
return ret;
if (ret & ZL8802_MFR_XTEMP_ENABLE_2)
info->func[i] |= PMBUS_HAVE_TEMP2;
data->access = ktime_get();
zl6100_wait(data);
}
ret = i2c_smbus_read_word_data(client, ZL8802_MFR_USER_GLOBAL_CONFIG);
if (ret < 0)
return ret;
if (ret & ZL8802_MFR_TMON_ENABLE)
info->func[0] |= PMBUS_HAVE_TEMP3;
} else {
ret = i2c_smbus_read_word_data(client, ZL6100_MFR_CONFIG);
if (ret < 0)
return ret;
if (ret & ZL6100_MFR_XTEMP_ENABLE)
info->func[0] |= PMBUS_HAVE_TEMP2;
}
data->access = ktime_get();
zl6100_wait(data);
info->read_word_data = zl6100_read_word_data;
info->read_byte_data = zl6100_read_byte_data;
info->write_word_data = zl6100_write_word_data;
info->write_byte = zl6100_write_byte;
return pmbus_do_probe(client, info);
}
static struct i2c_driver zl6100_driver = {
.driver = {
.name = "zl6100",
},
.probe = zl6100_probe,
.id_table = zl6100_id,
};
module_i2c_driver(zl6100_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for ZL6100 and compatibles");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/zl6100.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for the Infineon IRPS5401M PMIC.
*
* Copyright (c) 2019 SED Systems, a division of Calian Ltd.
*
* The device supports VOUT_PEAK, IOUT_PEAK, and TEMPERATURE_PEAK, however
* this driver does not currently support them.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include "pmbus.h"
#define IRPS5401_SW_FUNC (PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | \
PMBUS_HAVE_STATUS_INPUT | \
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \
PMBUS_HAVE_PIN | PMBUS_HAVE_POUT | \
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP)
#define IRPS5401_LDO_FUNC (PMBUS_HAVE_VIN | \
PMBUS_HAVE_STATUS_INPUT | \
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \
PMBUS_HAVE_PIN | PMBUS_HAVE_POUT | \
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP)
static struct pmbus_driver_info irps5401_info = {
.pages = 5,
.func[0] = IRPS5401_SW_FUNC,
.func[1] = IRPS5401_SW_FUNC,
.func[2] = IRPS5401_SW_FUNC,
.func[3] = IRPS5401_SW_FUNC,
.func[4] = IRPS5401_LDO_FUNC,
};
static int irps5401_probe(struct i2c_client *client)
{
return pmbus_do_probe(client, &irps5401_info);
}
static const struct i2c_device_id irps5401_id[] = {
{"irps5401", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, irps5401_id);
static struct i2c_driver irps5401_driver = {
.driver = {
.name = "irps5401",
},
.probe = irps5401_probe,
.id_table = irps5401_id,
};
module_i2c_driver(irps5401_driver);
MODULE_AUTHOR("Robert Hancock");
MODULE_DESCRIPTION("PMBus driver for Infineon IRPS5401");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/irps5401.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for BluTek BPA-RS600 Power Supplies
*
* Copyright 2021 Allied Telesis Labs
*/
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pmbus.h>
#include "pmbus.h"
enum chips { bpa_rs600, bpd_rs600 };
static int bpa_rs600_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_FAN_CONFIG_12:
/*
* Two fans are reported in PMBUS_FAN_CONFIG_12 but there is
* only one fan in the module. Mask out the FAN2 bits.
*/
ret = pmbus_read_byte_data(client, 0, PMBUS_FAN_CONFIG_12);
if (ret >= 0)
ret &= ~(PB_FAN_2_INSTALLED | PB_FAN_2_PULSE_MASK);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
/*
* The BPA-RS600 violates the PMBus spec. Specifically it treats the
* mantissa as unsigned. Deal with this here to allow the PMBus core
* to work with correctly encoded data.
*/
static int bpa_rs600_read_vin(struct i2c_client *client)
{
int ret, exponent, mantissa;
ret = pmbus_read_word_data(client, 0, 0xff, PMBUS_READ_VIN);
if (ret < 0)
return ret;
if (ret & BIT(10)) {
exponent = ret >> 11;
mantissa = ret & 0x7ff;
exponent++;
mantissa >>= 1;
ret = (exponent << 11) | mantissa;
}
return ret;
}
/*
* Firmware V5.70 incorrectly reports 1640W for MFR_PIN_MAX.
* Deal with this by returning a sensible value.
*/
static int bpa_rs600_read_pin_max(struct i2c_client *client)
{
int ret;
ret = pmbus_read_word_data(client, 0, 0xff, PMBUS_MFR_PIN_MAX);
if (ret < 0)
return ret;
/* Detect invalid 1640W (linear encoding) */
if (ret == 0x0b34)
/* Report 700W (linear encoding) */
return 0x095e;
return ret;
}
static int bpa_rs600_read_word_data(struct i2c_client *client, int page, int phase, int reg)
{
int ret;
if (page > 0)
return -ENXIO;
switch (reg) {
case PMBUS_VIN_UV_WARN_LIMIT:
case PMBUS_VIN_OV_WARN_LIMIT:
case PMBUS_VOUT_UV_WARN_LIMIT:
case PMBUS_VOUT_OV_WARN_LIMIT:
case PMBUS_IIN_OC_WARN_LIMIT:
case PMBUS_IOUT_OC_WARN_LIMIT:
case PMBUS_PIN_OP_WARN_LIMIT:
case PMBUS_POUT_OP_WARN_LIMIT:
case PMBUS_VIN_UV_FAULT_LIMIT:
case PMBUS_VIN_OV_FAULT_LIMIT:
case PMBUS_VOUT_UV_FAULT_LIMIT:
case PMBUS_VOUT_OV_FAULT_LIMIT:
/* These commands return data but it is invalid/un-documented */
ret = -ENXIO;
break;
case PMBUS_READ_VIN:
ret = bpa_rs600_read_vin(client);
break;
case PMBUS_MFR_PIN_MAX:
ret = bpa_rs600_read_pin_max(client);
break;
default:
if (reg >= PMBUS_VIRT_BASE)
ret = -ENXIO;
else
ret = -ENODATA;
break;
}
return ret;
}
static struct pmbus_driver_info bpa_rs600_info = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_FAN] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_POUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 |
PMBUS_HAVE_FAN12 |
PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_STATUS_FAN12,
.read_byte_data = bpa_rs600_read_byte_data,
.read_word_data = bpa_rs600_read_word_data,
};
static const struct i2c_device_id bpa_rs600_id[] = {
{ "bpa-rs600", bpa_rs600 },
{ "bpd-rs600", bpd_rs600 },
{},
};
MODULE_DEVICE_TABLE(i2c, bpa_rs600_id);
static int bpa_rs600_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
int ret;
const struct i2c_device_id *mid;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA
| I2C_FUNC_SMBUS_READ_WORD_DATA
| I2C_FUNC_SMBUS_READ_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
if (ret < 0) {
dev_err(dev, "Failed to read Manufacturer Model\n");
return ret;
}
for (mid = bpa_rs600_id; mid->name[0]; mid++) {
if (!strncasecmp(buf, mid->name, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
buf[ret] = '\0';
dev_err(dev, "Unsupported Manufacturer Model '%s'\n", buf);
return -ENODEV;
}
return pmbus_do_probe(client, &bpa_rs600_info);
}
static const struct of_device_id __maybe_unused bpa_rs600_of_match[] = {
{ .compatible = "blutek,bpa-rs600" },
{},
};
MODULE_DEVICE_TABLE(of, bpa_rs600_of_match);
static struct i2c_driver bpa_rs600_driver = {
.driver = {
.name = "bpa-rs600",
.of_match_table = of_match_ptr(bpa_rs600_of_match),
},
.probe = bpa_rs600_probe,
.id_table = bpa_rs600_id,
};
module_i2c_driver(bpa_rs600_driver);
MODULE_AUTHOR("Chris Packham");
MODULE_DESCRIPTION("PMBus driver for BluTek BPA-RS600");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/bpa-rs600.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for Vicor PLI1209BC Digital Supervisor
*
* Copyright (c) 2022 9elements GmbH
*/
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pmbus.h>
#include <linux/regulator/driver.h>
#include "pmbus.h"
/*
* The capability command is only supported at page 0. Probing the device while
* the page register is set to 1 will falsely enable PEC support. Disable
* capability probing accordingly, since the PLI1209BC does not have any
* additional capabilities.
*/
static struct pmbus_platform_data pli1209bc_plat_data = {
.flags = PMBUS_NO_CAPABILITY,
};
static int pli1209bc_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int data;
switch (reg) {
/* PMBUS_READ_POUT uses a direct format with R=0 */
case PMBUS_READ_POUT:
data = pmbus_read_word_data(client, page, phase, reg);
if (data < 0)
return data;
data = sign_extend32(data, 15) * 10;
return clamp_val(data, -32768, 32767) & 0xffff;
/*
* PMBUS_READ_VOUT and PMBUS_READ_TEMPERATURE_1 return invalid data
* when the BCM is turned off. Since it is not possible to return
* ENODATA error, return zero instead.
*/
case PMBUS_READ_VOUT:
case PMBUS_READ_TEMPERATURE_1:
data = pmbus_read_word_data(client, page, phase,
PMBUS_STATUS_WORD);
if (data < 0)
return data;
if (data & PB_STATUS_POWER_GOOD_N)
return 0;
return pmbus_read_word_data(client, page, phase, reg);
default:
return -ENODATA;
}
}
static int pli1209bc_write_byte(struct i2c_client *client, int page, u8 reg)
{
int ret;
switch (reg) {
case PMBUS_CLEAR_FAULTS:
ret = pmbus_write_byte(client, page, reg);
/*
* PLI1209 takes 230 usec to execute the CLEAR_FAULTS command.
* During that time it's busy and NACKs all requests on the
* SMBUS interface. It also NACKs reads on PMBUS_STATUS_BYTE
* making it impossible to poll the BUSY flag.
*
* Just wait for not BUSY unconditionally.
*/
usleep_range(250, 300);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
#if IS_ENABLED(CONFIG_SENSORS_PLI1209BC_REGULATOR)
static const struct regulator_desc pli1209bc_reg_desc = {
.name = "vout2",
.id = 1,
.of_match = of_match_ptr("vout2"),
.regulators_node = of_match_ptr("regulators"),
.ops = &pmbus_regulator_ops,
.type = REGULATOR_VOLTAGE,
.owner = THIS_MODULE,
};
#endif
static struct pmbus_driver_info pli1209bc_info = {
.pages = 2,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_CURRENT_IN] = direct,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_POWER] = direct,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_VOLTAGE_IN] = 1,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = 1,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 1,
.m[PSC_CURRENT_IN] = 1,
.b[PSC_CURRENT_IN] = 0,
.R[PSC_CURRENT_IN] = 3,
.m[PSC_CURRENT_OUT] = 1,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 2,
.m[PSC_POWER] = 1,
.b[PSC_POWER] = 0,
.R[PSC_POWER] = 1,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 0,
/*
* Page 0 sums up all attributes except voltage readings.
* The pli1209 digital supervisor only contains a single BCM, making
* page 0 redundant.
*/
.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT
| PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT
| PMBUS_HAVE_PIN | PMBUS_HAVE_POUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_STATUS_INPUT,
.read_word_data = pli1209bc_read_word_data,
.write_byte = pli1209bc_write_byte,
#if IS_ENABLED(CONFIG_SENSORS_PLI1209BC_REGULATOR)
.num_regulators = 1,
.reg_desc = &pli1209bc_reg_desc,
#endif
};
static int pli1209bc_probe(struct i2c_client *client)
{
client->dev.platform_data = &pli1209bc_plat_data;
return pmbus_do_probe(client, &pli1209bc_info);
}
static const struct i2c_device_id pli1209bc_id[] = {
{"pli1209bc", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, pli1209bc_id);
#ifdef CONFIG_OF
static const struct of_device_id pli1209bc_of_match[] = {
{ .compatible = "vicor,pli1209bc" },
{ },
};
MODULE_DEVICE_TABLE(of, pli1209bc_of_match);
#endif
static struct i2c_driver pli1209bc_driver = {
.driver = {
.name = "pli1209bc",
.of_match_table = of_match_ptr(pli1209bc_of_match),
},
.probe = pli1209bc_probe,
.id_table = pli1209bc_id,
};
module_i2c_driver(pli1209bc_driver);
MODULE_AUTHOR("Marcello Sylvester Bauer <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Vicor PLI1209BC");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/pli1209bc.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for BEL PFE family power supplies.
*
* Copyright (c) 2019 Facebook Inc.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pmbus.h>
#include "pmbus.h"
enum chips {pfe1100, pfe3000};
/*
* Disable status check because some devices report communication error
* (invalid command) for VOUT_MODE command (0x20) although the correct
* VOUT_MODE (0x16) is returned: it leads to incorrect exponent in linear
* mode.
* This affects both pfe3000 and pfe1100.
*/
static struct pmbus_platform_data pfe_plat_data = {
.flags = PMBUS_SKIP_STATUS_CHECK,
};
static struct pmbus_driver_info pfe_driver_info[] = {
[pfe1100] = {
.pages = 1,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_FAN] = linear,
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_POUT |
PMBUS_HAVE_VIN | PMBUS_HAVE_IIN |
PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 |
PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_FAN12,
},
[pfe3000] = {
.pages = 7,
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = linear,
.format[PSC_CURRENT_IN] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_FAN] = linear,
/* Page 0: V1. */
.func[0] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_POUT | PMBUS_HAVE_FAN12 |
PMBUS_HAVE_VIN | PMBUS_HAVE_IIN |
PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 |
PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_VCAP,
/* Page 1: Vsb. */
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_POUT,
/*
* Page 2: V1 Ishare.
* Page 3: Reserved.
* Page 4: V1 Cathode.
* Page 5: Vsb Cathode.
* Page 6: V1 Sense.
*/
.func[2] = PMBUS_HAVE_VOUT,
.func[4] = PMBUS_HAVE_VOUT,
.func[5] = PMBUS_HAVE_VOUT,
.func[6] = PMBUS_HAVE_VOUT,
},
};
static const struct i2c_device_id pfe_device_id[];
static int pfe_pmbus_probe(struct i2c_client *client)
{
int model;
model = (int)i2c_match_id(pfe_device_id, client)->driver_data;
client->dev.platform_data = &pfe_plat_data;
/*
* PFE3000-12-069RA devices may not stay in page 0 during device
* probe which leads to probe failure (read status word failed).
* So let's set the device to page 0 at the beginning.
*/
if (model == pfe3000)
i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
return pmbus_do_probe(client, &pfe_driver_info[model]);
}
static const struct i2c_device_id pfe_device_id[] = {
{"pfe1100", pfe1100},
{"pfe3000", pfe3000},
{}
};
MODULE_DEVICE_TABLE(i2c, pfe_device_id);
static struct i2c_driver pfe_pmbus_driver = {
.driver = {
.name = "bel-pfe",
},
.probe = pfe_pmbus_probe,
.id_table = pfe_device_id,
};
module_i2c_driver(pfe_pmbus_driver);
MODULE_AUTHOR("Tao Ren <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for BEL PFE Family Power Supplies");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/bel-pfe.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for ucd9200 series Digital PWM System Controllers
*
* Copyright (C) 2011 Ericsson AB.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/pmbus.h>
#include "pmbus.h"
#define UCD9200_PHASE_INFO 0xd2
#define UCD9200_DEVICE_ID 0xfd
enum chips { ucd9200, ucd9220, ucd9222, ucd9224, ucd9240, ucd9244, ucd9246,
ucd9248 };
static const struct i2c_device_id ucd9200_id[] = {
{"ucd9200", ucd9200},
{"ucd9220", ucd9220},
{"ucd9222", ucd9222},
{"ucd9224", ucd9224},
{"ucd9240", ucd9240},
{"ucd9244", ucd9244},
{"ucd9246", ucd9246},
{"ucd9248", ucd9248},
{}
};
MODULE_DEVICE_TABLE(i2c, ucd9200_id);
static const struct of_device_id __maybe_unused ucd9200_of_match[] = {
{
.compatible = "ti,cd9200",
.data = (void *)ucd9200
},
{
.compatible = "ti,cd9220",
.data = (void *)ucd9220
},
{
.compatible = "ti,cd9222",
.data = (void *)ucd9222
},
{
.compatible = "ti,cd9224",
.data = (void *)ucd9224
},
{
.compatible = "ti,cd9240",
.data = (void *)ucd9240
},
{
.compatible = "ti,cd9244",
.data = (void *)ucd9244
},
{
.compatible = "ti,cd9246",
.data = (void *)ucd9246
},
{
.compatible = "ti,cd9248",
.data = (void *)ucd9248
},
{ },
};
MODULE_DEVICE_TABLE(of, ucd9200_of_match);
static int ucd9200_probe(struct i2c_client *client)
{
u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
struct pmbus_driver_info *info;
const struct i2c_device_id *mid;
enum chips chip;
int i, j, ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, UCD9200_DEVICE_ID,
block_buffer);
if (ret < 0) {
dev_err(&client->dev, "Failed to read device ID\n");
return ret;
}
block_buffer[ret] = '\0';
dev_info(&client->dev, "Device ID %s\n", block_buffer);
for (mid = ucd9200_id; mid->name[0]; mid++) {
if (!strncasecmp(mid->name, block_buffer, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
if (client->dev.of_node)
chip = (uintptr_t)of_device_get_match_data(&client->dev);
else
chip = mid->driver_data;
if (chip != ucd9200 && strcmp(client->name, mid->name) != 0)
dev_notice(&client->dev,
"Device mismatch: Configured %s, detected %s\n",
client->name, mid->name);
info = devm_kzalloc(&client->dev, sizeof(struct pmbus_driver_info),
GFP_KERNEL);
if (!info)
return -ENOMEM;
ret = i2c_smbus_read_block_data(client, UCD9200_PHASE_INFO,
block_buffer);
if (ret < 0) {
dev_err(&client->dev, "Failed to read phase information\n");
return ret;
}
/*
* Calculate number of configured pages (rails) from PHASE_INFO
* register.
* Rails have to be sequential, so we can abort after finding
* the first unconfigured rail.
*/
info->pages = 0;
for (i = 0; i < ret; i++) {
if (!block_buffer[i])
break;
info->pages++;
}
if (!info->pages) {
dev_err(&client->dev, "No rails configured\n");
return -ENODEV;
}
dev_info(&client->dev, "%d rails configured\n", info->pages);
/*
* Set PHASE registers on all pages to 0xff to ensure that phase
* specific commands will apply to all phases of a given page (rail).
* This only affects the READ_IOUT and READ_TEMPERATURE2 registers.
* READ_IOUT will return the sum of currents of all phases of a rail,
* and READ_TEMPERATURE2 will return the maximum temperature detected
* for the phases of the rail.
*/
for (i = 0; i < info->pages; i++) {
/*
* Setting PAGE & PHASE fails once in a while for no obvious
* reason, so we need to retry a couple of times.
*/
for (j = 0; j < 3; j++) {
ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
if (ret < 0)
continue;
ret = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
0xff);
if (ret < 0)
continue;
break;
}
if (ret < 0) {
dev_err(&client->dev,
"Failed to initialize PHASE registers\n");
return ret;
}
}
if (info->pages > 1)
i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP |
PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
for (i = 1; i < info->pages; i++)
info->func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_POUT |
PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
/* ucd9240 supports a single fan */
if (mid->driver_data == ucd9240)
info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12;
return pmbus_do_probe(client, info);
}
/* This is the driver that will be inserted */
static struct i2c_driver ucd9200_driver = {
.driver = {
.name = "ucd9200",
.of_match_table = of_match_ptr(ucd9200_of_match),
},
.probe = ucd9200_probe,
.id_table = ucd9200_id,
};
module_i2c_driver(ucd9200_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for TI UCD922x, UCD924x");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/ucd9200.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Texas Instruments TPS53679
*
* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
* Copyright (c) 2017 Vadim Pasternak <[email protected]>
*/
#include <linux/bits.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include "pmbus.h"
enum chips {
tps53647, tps53667, tps53676, tps53679, tps53681, tps53688
};
#define TPS53647_PAGE_NUM 1
#define TPS53676_USER_DATA_03 0xb3
#define TPS53676_MAX_PHASES 7
#define TPS53679_PROT_VR12_5MV 0x01 /* VR12.0 mode, 5-mV DAC */
#define TPS53679_PROT_VR12_5_10MV 0x02 /* VR12.5 mode, 10-mV DAC */
#define TPS53679_PROT_VR13_10MV 0x04 /* VR13.0 mode, 10-mV DAC */
#define TPS53679_PROT_IMVP8_5MV 0x05 /* IMVP8 mode, 5-mV DAC */
#define TPS53679_PROT_VR13_5MV 0x07 /* VR13.0 mode, 5-mV DAC */
#define TPS53679_PAGE_NUM 2
#define TPS53681_DEVICE_ID 0x81
#define TPS53681_PMBUS_REVISION 0x33
#define TPS53681_MFR_SPECIFIC_20 0xe4 /* Number of phases, per page */
static const struct i2c_device_id tps53679_id[];
static int tps53679_identify_mode(struct i2c_client *client,
struct pmbus_driver_info *info)
{
u8 vout_params;
int i, ret;
for (i = 0; i < info->pages; i++) {
/* Read the register with VOUT scaling value.*/
ret = pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
if (ret < 0)
return ret;
vout_params = ret & GENMASK(4, 0);
switch (vout_params) {
case TPS53679_PROT_VR13_10MV:
case TPS53679_PROT_VR12_5_10MV:
info->vrm_version[i] = vr13;
break;
case TPS53679_PROT_VR13_5MV:
case TPS53679_PROT_VR12_5MV:
case TPS53679_PROT_IMVP8_5MV:
info->vrm_version[i] = vr12;
break;
default:
return -EINVAL;
}
}
return 0;
}
static int tps53679_identify_phases(struct i2c_client *client,
struct pmbus_driver_info *info)
{
int ret;
/* On TPS53681, only channel A provides per-phase output current */
ret = pmbus_read_byte_data(client, 0, TPS53681_MFR_SPECIFIC_20);
if (ret < 0)
return ret;
info->phases[0] = (ret & 0x07) + 1;
return 0;
}
static int tps53679_identify_chip(struct i2c_client *client,
u8 revision, u16 id)
{
u8 buf[I2C_SMBUS_BLOCK_MAX];
int ret;
ret = pmbus_read_byte_data(client, 0, PMBUS_REVISION);
if (ret < 0)
return ret;
if (ret != revision) {
dev_err(&client->dev, "Unexpected PMBus revision 0x%x\n", ret);
return -ENODEV;
}
ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
if (ret < 0)
return ret;
if (ret != 1 || buf[0] != id) {
dev_err(&client->dev, "Unexpected device ID 0x%x\n", buf[0]);
return -ENODEV;
}
return 0;
}
/*
* Common identification function for chips with multi-phase support.
* Since those chips have special configuration registers, we want to have
* some level of reassurance that we are really talking with the chip
* being probed. Check PMBus revision and chip ID.
*/
static int tps53679_identify_multiphase(struct i2c_client *client,
struct pmbus_driver_info *info,
int pmbus_rev, int device_id)
{
int ret;
ret = tps53679_identify_chip(client, pmbus_rev, device_id);
if (ret < 0)
return ret;
ret = tps53679_identify_mode(client, info);
if (ret < 0)
return ret;
return tps53679_identify_phases(client, info);
}
static int tps53679_identify(struct i2c_client *client,
struct pmbus_driver_info *info)
{
return tps53679_identify_mode(client, info);
}
static int tps53681_identify(struct i2c_client *client,
struct pmbus_driver_info *info)
{
return tps53679_identify_multiphase(client, info,
TPS53681_PMBUS_REVISION,
TPS53681_DEVICE_ID);
}
static int tps53676_identify(struct i2c_client *client,
struct pmbus_driver_info *info)
{
u8 buf[I2C_SMBUS_BLOCK_MAX];
int phases_a = 0, phases_b = 0;
int i, ret;
ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
if (ret < 0)
return ret;
if (strncmp("TI\x53\x67\x60", buf, 5)) {
dev_err(&client->dev, "Unexpected device ID: %s\n", buf);
return -ENODEV;
}
ret = i2c_smbus_read_block_data(client, TPS53676_USER_DATA_03, buf);
if (ret < 0)
return ret;
if (ret != 24)
return -EIO;
for (i = 0; i < 2 * TPS53676_MAX_PHASES; i += 2) {
if (buf[i + 1] & 0x80) {
if (buf[i] & 0x08)
phases_b++;
else
phases_a++;
}
}
info->format[PSC_VOLTAGE_OUT] = linear;
info->pages = 1;
info->phases[0] = phases_a;
if (phases_b > 0) {
info->pages = 2;
info->phases[1] = phases_b;
}
return 0;
}
static int tps53681_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
/*
* For reading the total output current (READ_IOUT) for all phases,
* the chip datasheet is a bit vague. It says "PHASE must be set to
* FFh to access all phases simultaneously. PHASE may also be set to
* 80h readack (!) the total phase current".
* Experiments show that the command does _not_ report the total
* current for all phases if the phase is set to 0xff. Instead, it
* appears to report the current of one of the phases. Override phase
* parameter with 0x80 when reading the total output current on page 0.
*/
if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff)
return pmbus_read_word_data(client, page, 0x80, reg);
return -ENODATA;
}
static struct pmbus_driver_info tps53679_info = {
.format[PSC_VOLTAGE_IN] = linear,
.format[PSC_VOLTAGE_OUT] = vid,
.format[PSC_TEMPERATURE] = linear,
.format[PSC_CURRENT_OUT] = linear,
.format[PSC_POWER] = linear,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
PMBUS_HAVE_STATUS_INPUT |
PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT,
.func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
PMBUS_HAVE_POUT,
.pfunc[0] = PMBUS_HAVE_IOUT,
.pfunc[1] = PMBUS_HAVE_IOUT,
.pfunc[2] = PMBUS_HAVE_IOUT,
.pfunc[3] = PMBUS_HAVE_IOUT,
.pfunc[4] = PMBUS_HAVE_IOUT,
.pfunc[5] = PMBUS_HAVE_IOUT,
.pfunc[6] = PMBUS_HAVE_IOUT,
};
static int tps53679_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct pmbus_driver_info *info;
enum chips chip_id;
if (dev->of_node)
chip_id = (uintptr_t)of_device_get_match_data(dev);
else
chip_id = i2c_match_id(tps53679_id, client)->driver_data;
info = devm_kmemdup(dev, &tps53679_info, sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;
switch (chip_id) {
case tps53647:
case tps53667:
info->pages = TPS53647_PAGE_NUM;
info->identify = tps53679_identify;
break;
case tps53676:
info->identify = tps53676_identify;
break;
case tps53679:
case tps53688:
info->pages = TPS53679_PAGE_NUM;
info->identify = tps53679_identify;
break;
case tps53681:
info->pages = TPS53679_PAGE_NUM;
info->phases[0] = 6;
info->identify = tps53681_identify;
info->read_word_data = tps53681_read_word_data;
break;
default:
return -ENODEV;
}
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id tps53679_id[] = {
{"bmr474", tps53676},
{"tps53647", tps53647},
{"tps53667", tps53667},
{"tps53676", tps53676},
{"tps53679", tps53679},
{"tps53681", tps53681},
{"tps53688", tps53688},
{}
};
MODULE_DEVICE_TABLE(i2c, tps53679_id);
static const struct of_device_id __maybe_unused tps53679_of_match[] = {
{.compatible = "ti,tps53647", .data = (void *)tps53647},
{.compatible = "ti,tps53667", .data = (void *)tps53667},
{.compatible = "ti,tps53676", .data = (void *)tps53676},
{.compatible = "ti,tps53679", .data = (void *)tps53679},
{.compatible = "ti,tps53681", .data = (void *)tps53681},
{.compatible = "ti,tps53688", .data = (void *)tps53688},
{}
};
MODULE_DEVICE_TABLE(of, tps53679_of_match);
static struct i2c_driver tps53679_driver = {
.driver = {
.name = "tps53679",
.of_match_table = of_match_ptr(tps53679_of_match),
},
.probe = tps53679_probe,
.id_table = tps53679_id,
};
module_i2c_driver(tps53679_driver);
MODULE_AUTHOR("Vadim Pasternak <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS53679");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/tps53679.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Hardware monitoring driver for Renesas Digital Multiphase Voltage Regulators
*
* Copyright (c) 2017 Google Inc
* Copyright (c) 2020 Renesas Electronics America
*
*/
#include <linux/err.h>
#include <linux/hwmon-sysfs.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/sysfs.h>
#include "pmbus.h"
#define ISL68137_VOUT_AVS 0x30
#define RAA_DMPVR2_READ_VMON 0xc8
enum chips {
isl68137,
isl68220,
isl68221,
isl68222,
isl68223,
isl68224,
isl68225,
isl68226,
isl68227,
isl68229,
isl68233,
isl68239,
isl69222,
isl69223,
isl69224,
isl69225,
isl69227,
isl69228,
isl69234,
isl69236,
isl69239,
isl69242,
isl69243,
isl69247,
isl69248,
isl69254,
isl69255,
isl69256,
isl69259,
isl69260,
isl69268,
isl69269,
isl69298,
raa228000,
raa228004,
raa228006,
raa228228,
raa229001,
raa229004,
};
enum variants {
raa_dmpvr1_2rail,
raa_dmpvr2_1rail,
raa_dmpvr2_2rail,
raa_dmpvr2_2rail_nontc,
raa_dmpvr2_3rail,
raa_dmpvr2_hv,
};
static const struct i2c_device_id raa_dmpvr_id[];
static ssize_t isl68137_avs_enable_show_page(struct i2c_client *client,
int page,
char *buf)
{
int val = pmbus_read_byte_data(client, page, PMBUS_OPERATION);
return sprintf(buf, "%d\n",
(val & ISL68137_VOUT_AVS) == ISL68137_VOUT_AVS ? 1 : 0);
}
static ssize_t isl68137_avs_enable_store_page(struct i2c_client *client,
int page,
const char *buf, size_t count)
{
int rc, op_val;
bool result;
rc = kstrtobool(buf, &result);
if (rc)
return rc;
op_val = result ? ISL68137_VOUT_AVS : 0;
/*
* Writes to VOUT setpoint over AVSBus will persist after the VRM is
* switched to PMBus control. Switching back to AVSBus control
* restores this persisted setpoint rather than re-initializing to
* PMBus VOUT_COMMAND. Writing VOUT_COMMAND first over PMBus before
* enabling AVS control is the workaround.
*/
if (op_val == ISL68137_VOUT_AVS) {
rc = pmbus_read_word_data(client, page, 0xff,
PMBUS_VOUT_COMMAND);
if (rc < 0)
return rc;
rc = pmbus_write_word_data(client, page, PMBUS_VOUT_COMMAND,
rc);
if (rc < 0)
return rc;
}
rc = pmbus_update_byte_data(client, page, PMBUS_OPERATION,
ISL68137_VOUT_AVS, op_val);
return (rc < 0) ? rc : count;
}
static ssize_t isl68137_avs_enable_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct i2c_client *client = to_i2c_client(dev->parent);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
return isl68137_avs_enable_show_page(client, attr->index, buf);
}
static ssize_t isl68137_avs_enable_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev->parent);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
return isl68137_avs_enable_store_page(client, attr->index, buf, count);
}
static SENSOR_DEVICE_ATTR_RW(avs0_enable, isl68137_avs_enable, 0);
static SENSOR_DEVICE_ATTR_RW(avs1_enable, isl68137_avs_enable, 1);
static struct attribute *enable_attrs[] = {
&sensor_dev_attr_avs0_enable.dev_attr.attr,
&sensor_dev_attr_avs1_enable.dev_attr.attr,
NULL,
};
static const struct attribute_group enable_group = {
.attrs = enable_attrs,
};
static const struct attribute_group *isl68137_attribute_groups[] = {
&enable_group,
NULL,
};
static int raa_dmpvr2_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
switch (reg) {
case PMBUS_VIRT_READ_VMON:
ret = pmbus_read_word_data(client, page, phase,
RAA_DMPVR2_READ_VMON);
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static struct pmbus_driver_info raa_dmpvr_info = {
.pages = 3,
.format[PSC_VOLTAGE_IN] = direct,
.format[PSC_VOLTAGE_OUT] = direct,
.format[PSC_CURRENT_IN] = direct,
.format[PSC_CURRENT_OUT] = direct,
.format[PSC_POWER] = direct,
.format[PSC_TEMPERATURE] = direct,
.m[PSC_VOLTAGE_IN] = 1,
.b[PSC_VOLTAGE_IN] = 0,
.R[PSC_VOLTAGE_IN] = 2,
.m[PSC_VOLTAGE_OUT] = 1,
.b[PSC_VOLTAGE_OUT] = 0,
.R[PSC_VOLTAGE_OUT] = 3,
.m[PSC_CURRENT_IN] = 1,
.b[PSC_CURRENT_IN] = 0,
.R[PSC_CURRENT_IN] = 2,
.m[PSC_CURRENT_OUT] = 1,
.b[PSC_CURRENT_OUT] = 0,
.R[PSC_CURRENT_OUT] = 1,
.m[PSC_POWER] = 1,
.b[PSC_POWER] = 0,
.R[PSC_POWER] = 0,
.m[PSC_TEMPERATURE] = 1,
.b[PSC_TEMPERATURE] = 0,
.R[PSC_TEMPERATURE] = 0,
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
| PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
| PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT
| PMBUS_HAVE_VMON,
.func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
| PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
.func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
| PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
| PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
};
static int isl68137_probe(struct i2c_client *client)
{
struct pmbus_driver_info *info;
info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;
memcpy(info, &raa_dmpvr_info, sizeof(*info));
switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) {
case raa_dmpvr1_2rail:
info->pages = 2;
info->R[PSC_VOLTAGE_IN] = 3;
info->func[0] &= ~PMBUS_HAVE_VMON;
info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
| PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
| PMBUS_HAVE_POUT;
info->groups = isl68137_attribute_groups;
break;
case raa_dmpvr2_1rail:
info->pages = 1;
info->read_word_data = raa_dmpvr2_read_word_data;
break;
case raa_dmpvr2_2rail_nontc:
info->func[0] &= ~PMBUS_HAVE_TEMP3;
info->func[1] &= ~PMBUS_HAVE_TEMP3;
fallthrough;
case raa_dmpvr2_2rail:
info->pages = 2;
info->read_word_data = raa_dmpvr2_read_word_data;
break;
case raa_dmpvr2_3rail:
info->read_word_data = raa_dmpvr2_read_word_data;
break;
case raa_dmpvr2_hv:
info->pages = 1;
info->R[PSC_VOLTAGE_IN] = 1;
info->m[PSC_VOLTAGE_OUT] = 2;
info->R[PSC_VOLTAGE_OUT] = 2;
info->m[PSC_CURRENT_IN] = 2;
info->m[PSC_POWER] = 2;
info->R[PSC_POWER] = -1;
info->read_word_data = raa_dmpvr2_read_word_data;
break;
default:
return -ENODEV;
}
return pmbus_do_probe(client, info);
}
static const struct i2c_device_id raa_dmpvr_id[] = {
{"isl68137", raa_dmpvr1_2rail},
{"isl68220", raa_dmpvr2_2rail},
{"isl68221", raa_dmpvr2_3rail},
{"isl68222", raa_dmpvr2_2rail},
{"isl68223", raa_dmpvr2_2rail},
{"isl68224", raa_dmpvr2_3rail},
{"isl68225", raa_dmpvr2_2rail},
{"isl68226", raa_dmpvr2_3rail},
{"isl68227", raa_dmpvr2_1rail},
{"isl68229", raa_dmpvr2_3rail},
{"isl68233", raa_dmpvr2_2rail},
{"isl68239", raa_dmpvr2_3rail},
{"isl69222", raa_dmpvr2_2rail},
{"isl69223", raa_dmpvr2_3rail},
{"isl69224", raa_dmpvr2_2rail},
{"isl69225", raa_dmpvr2_2rail},
{"isl69227", raa_dmpvr2_3rail},
{"isl69228", raa_dmpvr2_3rail},
{"isl69234", raa_dmpvr2_2rail},
{"isl69236", raa_dmpvr2_2rail},
{"isl69239", raa_dmpvr2_3rail},
{"isl69242", raa_dmpvr2_2rail},
{"isl69243", raa_dmpvr2_1rail},
{"isl69247", raa_dmpvr2_2rail},
{"isl69248", raa_dmpvr2_2rail},
{"isl69254", raa_dmpvr2_2rail},
{"isl69255", raa_dmpvr2_2rail},
{"isl69256", raa_dmpvr2_2rail},
{"isl69259", raa_dmpvr2_2rail},
{"isl69260", raa_dmpvr2_2rail},
{"isl69268", raa_dmpvr2_2rail},
{"isl69269", raa_dmpvr2_3rail},
{"isl69298", raa_dmpvr2_2rail},
{"raa228000", raa_dmpvr2_hv},
{"raa228004", raa_dmpvr2_hv},
{"raa228006", raa_dmpvr2_hv},
{"raa228228", raa_dmpvr2_2rail_nontc},
{"raa229001", raa_dmpvr2_2rail},
{"raa229004", raa_dmpvr2_2rail},
{}
};
MODULE_DEVICE_TABLE(i2c, raa_dmpvr_id);
/* This is the driver that will be inserted */
static struct i2c_driver isl68137_driver = {
.driver = {
.name = "isl68137",
},
.probe = isl68137_probe,
.id_table = raa_dmpvr_id,
};
module_i2c_driver(isl68137_driver);
MODULE_AUTHOR("Maxim Sloyko <[email protected]>");
MODULE_DESCRIPTION("PMBus driver for Renesas digital multiphase voltage regulators");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/isl68137.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for UCD90xxx Sequencer and System Health
* Controller series
*
* Copyright (C) 2011 Ericsson AB.
*/
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/pmbus.h>
#include <linux/gpio/driver.h>
#include <linux/timekeeping.h>
#include "pmbus.h"
enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
ucd90910 };
#define UCD9000_MONITOR_CONFIG 0xd5
#define UCD9000_NUM_PAGES 0xd6
#define UCD9000_FAN_CONFIG_INDEX 0xe7
#define UCD9000_FAN_CONFIG 0xe8
#define UCD9000_MFR_STATUS 0xf3
#define UCD9000_GPIO_SELECT 0xfa
#define UCD9000_GPIO_CONFIG 0xfb
#define UCD9000_DEVICE_ID 0xfd
/* GPIO CONFIG bits */
#define UCD9000_GPIO_CONFIG_ENABLE BIT(0)
#define UCD9000_GPIO_CONFIG_OUT_ENABLE BIT(1)
#define UCD9000_GPIO_CONFIG_OUT_VALUE BIT(2)
#define UCD9000_GPIO_CONFIG_STATUS BIT(3)
#define UCD9000_GPIO_INPUT 0
#define UCD9000_GPIO_OUTPUT 1
#define UCD9000_MON_TYPE(x) (((x) >> 5) & 0x07)
#define UCD9000_MON_PAGE(x) ((x) & 0x1f)
#define UCD9000_MON_VOLTAGE 1
#define UCD9000_MON_TEMPERATURE 2
#define UCD9000_MON_CURRENT 3
#define UCD9000_MON_VOLTAGE_HW 4
#define UCD9000_NUM_FAN 4
#define UCD9000_GPIO_NAME_LEN 16
#define UCD9090_NUM_GPIOS 23
#define UCD901XX_NUM_GPIOS 26
#define UCD90320_NUM_GPIOS 84
#define UCD90910_NUM_GPIOS 26
#define UCD9000_DEBUGFS_NAME_LEN 24
#define UCD9000_GPI_COUNT 8
#define UCD90320_GPI_COUNT 32
struct ucd9000_data {
u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX];
struct pmbus_driver_info info;
#ifdef CONFIG_GPIOLIB
struct gpio_chip gpio;
#endif
struct dentry *debugfs;
ktime_t write_time;
};
#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info)
struct ucd9000_debugfs_entry {
struct i2c_client *client;
u8 index;
};
/*
* It has been observed that the UCD90320 randomly fails register access when
* doing another access right on the back of a register write. To mitigate this
* make sure that there is a minimum delay between a write access and the
* following access. The 250us is based on experimental data. At a delay of
* 200us the issue seems to go away. Add a bit of extra margin to allow for
* system to system differences.
*/
#define UCD90320_WAIT_DELAY_US 250
static inline void ucd90320_wait(const struct ucd9000_data *data)
{
s64 delta = ktime_us_delta(ktime_get(), data->write_time);
if (delta < UCD90320_WAIT_DELAY_US)
udelay(UCD90320_WAIT_DELAY_US - delta);
}
static int ucd90320_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ucd9000_data *data = to_ucd9000_data(info);
if (reg >= PMBUS_VIRT_BASE)
return -ENXIO;
ucd90320_wait(data);
return pmbus_read_word_data(client, page, phase, reg);
}
static int ucd90320_read_byte_data(struct i2c_client *client, int page, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ucd9000_data *data = to_ucd9000_data(info);
ucd90320_wait(data);
return pmbus_read_byte_data(client, page, reg);
}
static int ucd90320_write_word_data(struct i2c_client *client, int page,
int reg, u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ucd9000_data *data = to_ucd9000_data(info);
int ret;
ucd90320_wait(data);
ret = pmbus_write_word_data(client, page, reg, word);
data->write_time = ktime_get();
return ret;
}
static int ucd90320_write_byte(struct i2c_client *client, int page, u8 value)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
struct ucd9000_data *data = to_ucd9000_data(info);
int ret;
ucd90320_wait(data);
ret = pmbus_write_byte(client, page, value);
data->write_time = ktime_get();
return ret;
}
static int ucd9000_get_fan_config(struct i2c_client *client, int fan)
{
int fan_config = 0;
struct ucd9000_data *data
= to_ucd9000_data(pmbus_get_driver_info(client));
if (data->fan_data[fan][3] & 1)
fan_config |= PB_FAN_2_INSTALLED; /* Use lower bit position */
/* Pulses/revolution */
fan_config |= (data->fan_data[fan][3] & 0x06) >> 1;
return fan_config;
}
static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret = 0;
int fan_config;
switch (reg) {
case PMBUS_FAN_CONFIG_12:
if (page > 0)
return -ENXIO;
ret = ucd9000_get_fan_config(client, 0);
if (ret < 0)
return ret;
fan_config = ret << 4;
ret = ucd9000_get_fan_config(client, 1);
if (ret < 0)
return ret;
fan_config |= ret;
ret = fan_config;
break;
case PMBUS_FAN_CONFIG_34:
if (page > 0)
return -ENXIO;
ret = ucd9000_get_fan_config(client, 2);
if (ret < 0)
return ret;
fan_config = ret << 4;
ret = ucd9000_get_fan_config(client, 3);
if (ret < 0)
return ret;
fan_config |= ret;
ret = fan_config;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static const struct i2c_device_id ucd9000_id[] = {
{"ucd9000", ucd9000},
{"ucd90120", ucd90120},
{"ucd90124", ucd90124},
{"ucd90160", ucd90160},
{"ucd90320", ucd90320},
{"ucd9090", ucd9090},
{"ucd90910", ucd90910},
{}
};
MODULE_DEVICE_TABLE(i2c, ucd9000_id);
static const struct of_device_id __maybe_unused ucd9000_of_match[] = {
{
.compatible = "ti,ucd9000",
.data = (void *)ucd9000
},
{
.compatible = "ti,ucd90120",
.data = (void *)ucd90120
},
{
.compatible = "ti,ucd90124",
.data = (void *)ucd90124
},
{
.compatible = "ti,ucd90160",
.data = (void *)ucd90160
},
{
.compatible = "ti,ucd90320",
.data = (void *)ucd90320
},
{
.compatible = "ti,ucd9090",
.data = (void *)ucd9090
},
{
.compatible = "ti,ucd90910",
.data = (void *)ucd90910
},
{ },
};
MODULE_DEVICE_TABLE(of, ucd9000_of_match);
#ifdef CONFIG_GPIOLIB
static int ucd9000_gpio_read_config(struct i2c_client *client,
unsigned int offset)
{
int ret;
/* No page set required */
ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset);
if (ret < 0)
return ret;
return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG);
}
static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset)
{
struct i2c_client *client = gpiochip_get_data(gc);
int ret;
ret = ucd9000_gpio_read_config(client, offset);
if (ret < 0)
return ret;
return !!(ret & UCD9000_GPIO_CONFIG_STATUS);
}
static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset,
int value)
{
struct i2c_client *client = gpiochip_get_data(gc);
int ret;
ret = ucd9000_gpio_read_config(client, offset);
if (ret < 0) {
dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n",
offset, ret);
return;
}
if (value) {
if (ret & UCD9000_GPIO_CONFIG_STATUS)
return;
ret |= UCD9000_GPIO_CONFIG_STATUS;
} else {
if (!(ret & UCD9000_GPIO_CONFIG_STATUS))
return;
ret &= ~UCD9000_GPIO_CONFIG_STATUS;
}
ret |= UCD9000_GPIO_CONFIG_ENABLE;
/* Page set not required */
ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
if (ret < 0) {
dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
offset, ret);
return;
}
ret &= ~UCD9000_GPIO_CONFIG_ENABLE;
ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
if (ret < 0)
dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
offset, ret);
}
static int ucd9000_gpio_get_direction(struct gpio_chip *gc,
unsigned int offset)
{
struct i2c_client *client = gpiochip_get_data(gc);
int ret;
ret = ucd9000_gpio_read_config(client, offset);
if (ret < 0)
return ret;
return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE);
}
static int ucd9000_gpio_set_direction(struct gpio_chip *gc,
unsigned int offset, bool direction_out,
int requested_out)
{
struct i2c_client *client = gpiochip_get_data(gc);
int ret, config, out_val;
ret = ucd9000_gpio_read_config(client, offset);
if (ret < 0)
return ret;
if (direction_out) {
out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0;
if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) {
if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val)
return 0;
} else {
ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE;
}
if (out_val)
ret |= UCD9000_GPIO_CONFIG_OUT_VALUE;
else
ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE;
} else {
if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE))
return 0;
ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE;
}
ret |= UCD9000_GPIO_CONFIG_ENABLE;
config = ret;
/* Page set not required */
ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
if (ret < 0)
return ret;
config &= ~UCD9000_GPIO_CONFIG_ENABLE;
return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
}
static int ucd9000_gpio_direction_input(struct gpio_chip *gc,
unsigned int offset)
{
return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0);
}
static int ucd9000_gpio_direction_output(struct gpio_chip *gc,
unsigned int offset, int val)
{
return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT,
val);
}
static void ucd9000_probe_gpio(struct i2c_client *client,
const struct i2c_device_id *mid,
struct ucd9000_data *data)
{
int rc;
switch (mid->driver_data) {
case ucd9090:
data->gpio.ngpio = UCD9090_NUM_GPIOS;
break;
case ucd90120:
case ucd90124:
case ucd90160:
data->gpio.ngpio = UCD901XX_NUM_GPIOS;
break;
case ucd90320:
data->gpio.ngpio = UCD90320_NUM_GPIOS;
break;
case ucd90910:
data->gpio.ngpio = UCD90910_NUM_GPIOS;
break;
default:
return; /* GPIO support is optional. */
}
/*
* Pinmux support has not been added to the new gpio_chip.
* This support should be added when possible given the mux
* behavior of these IO devices.
*/
data->gpio.label = client->name;
data->gpio.get_direction = ucd9000_gpio_get_direction;
data->gpio.direction_input = ucd9000_gpio_direction_input;
data->gpio.direction_output = ucd9000_gpio_direction_output;
data->gpio.get = ucd9000_gpio_get;
data->gpio.set = ucd9000_gpio_set;
data->gpio.can_sleep = true;
data->gpio.base = -1;
data->gpio.parent = &client->dev;
rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client);
if (rc)
dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc);
}
#else
static void ucd9000_probe_gpio(struct i2c_client *client,
const struct i2c_device_id *mid,
struct ucd9000_data *data)
{
}
#endif /* CONFIG_GPIOLIB */
#ifdef CONFIG_DEBUG_FS
static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer)
{
int ret = pmbus_set_page(client, 0, 0xff);
if (ret < 0)
return ret;
return i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer);
}
static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val)
{
struct ucd9000_debugfs_entry *entry = data;
struct i2c_client *client = entry->client;
u8 buffer[I2C_SMBUS_BLOCK_MAX];
int ret, i;
ret = ucd9000_get_mfr_status(client, buffer);
if (ret < 0)
return ret;
/*
* GPI fault bits are in sets of 8, two bytes from end of response.
*/
i = ret - 3 - entry->index / 8;
if (i >= 0)
*val = !!(buffer[i] & BIT(entry->index % 8));
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit,
ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n");
static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file,
char __user *buf, size_t count,
loff_t *ppos)
{
struct i2c_client *client = file->private_data;
u8 buffer[I2C_SMBUS_BLOCK_MAX];
char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2];
char *res;
int rc;
rc = ucd9000_get_mfr_status(client, buffer);
if (rc < 0)
return rc;
res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX));
*res++ = '\n';
*res = 0;
return simple_read_from_buffer(buf, count, ppos, str, res - str);
}
static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = {
.llseek = noop_llseek,
.read = ucd9000_debugfs_read_mfr_status,
.open = simple_open,
};
static int ucd9000_init_debugfs(struct i2c_client *client,
const struct i2c_device_id *mid,
struct ucd9000_data *data)
{
struct dentry *debugfs;
struct ucd9000_debugfs_entry *entries;
int i, gpi_count;
char name[UCD9000_DEBUGFS_NAME_LEN];
debugfs = pmbus_get_debugfs_dir(client);
if (!debugfs)
return -ENOENT;
data->debugfs = debugfs_create_dir(client->name, debugfs);
/*
* Of the chips this driver supports, only the UCD9090, UCD90160,
* UCD90320, and UCD90910 report GPI faults in their MFR_STATUS
* register, so only create the GPI fault debugfs attributes for those
* chips.
*/
if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 ||
mid->driver_data == ucd90320 || mid->driver_data == ucd90910) {
gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT
: UCD9000_GPI_COUNT;
entries = devm_kcalloc(&client->dev,
gpi_count, sizeof(*entries),
GFP_KERNEL);
if (!entries)
return -ENOMEM;
for (i = 0; i < gpi_count; i++) {
entries[i].client = client;
entries[i].index = i;
scnprintf(name, UCD9000_DEBUGFS_NAME_LEN,
"gpi%d_alarm", i + 1);
debugfs_create_file(name, 0444, data->debugfs,
&entries[i],
&ucd9000_debugfs_mfr_status_bit);
}
}
scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status");
debugfs_create_file(name, 0444, data->debugfs, client,
&ucd9000_debugfs_show_mfr_status_fops);
return 0;
}
#else
static int ucd9000_init_debugfs(struct i2c_client *client,
const struct i2c_device_id *mid,
struct ucd9000_data *data)
{
return 0;
}
#endif /* CONFIG_DEBUG_FS */
static int ucd9000_probe(struct i2c_client *client)
{
u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
struct ucd9000_data *data;
struct pmbus_driver_info *info;
const struct i2c_device_id *mid;
enum chips chip;
int i, ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_BLOCK_DATA))
return -ENODEV;
ret = i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
block_buffer);
if (ret < 0) {
dev_err(&client->dev, "Failed to read device ID\n");
return ret;
}
block_buffer[ret] = '\0';
dev_info(&client->dev, "Device ID %s\n", block_buffer);
for (mid = ucd9000_id; mid->name[0]; mid++) {
if (!strncasecmp(mid->name, block_buffer, strlen(mid->name)))
break;
}
if (!mid->name[0]) {
dev_err(&client->dev, "Unsupported device\n");
return -ENODEV;
}
if (client->dev.of_node)
chip = (uintptr_t)of_device_get_match_data(&client->dev);
else
chip = mid->driver_data;
if (chip != ucd9000 && strcmp(client->name, mid->name) != 0)
dev_notice(&client->dev,
"Device mismatch: Configured %s, detected %s\n",
client->name, mid->name);
data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
info = &data->info;
ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES);
if (ret < 0) {
dev_err(&client->dev,
"Failed to read number of active pages\n");
return ret;
}
info->pages = ret;
if (!info->pages) {
dev_err(&client->dev, "No pages configured\n");
return -ENODEV;
}
/* The internal temperature sensor is always active */
info->func[0] = PMBUS_HAVE_TEMP;
/* Everything else is configurable */
ret = i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG,
block_buffer);
if (ret <= 0) {
dev_err(&client->dev, "Failed to read configuration data\n");
return -ENODEV;
}
for (i = 0; i < ret; i++) {
int page = UCD9000_MON_PAGE(block_buffer[i]);
if (page >= info->pages)
continue;
switch (UCD9000_MON_TYPE(block_buffer[i])) {
case UCD9000_MON_VOLTAGE:
case UCD9000_MON_VOLTAGE_HW:
info->func[page] |= PMBUS_HAVE_VOUT
| PMBUS_HAVE_STATUS_VOUT;
break;
case UCD9000_MON_TEMPERATURE:
info->func[page] |= PMBUS_HAVE_TEMP2
| PMBUS_HAVE_STATUS_TEMP;
break;
case UCD9000_MON_CURRENT:
info->func[page] |= PMBUS_HAVE_IOUT
| PMBUS_HAVE_STATUS_IOUT;
break;
default:
break;
}
}
/* Fan configuration */
if (mid->driver_data == ucd90124) {
for (i = 0; i < UCD9000_NUM_FAN; i++) {
i2c_smbus_write_byte_data(client,
UCD9000_FAN_CONFIG_INDEX, i);
ret = i2c_smbus_read_block_data(client,
UCD9000_FAN_CONFIG,
data->fan_data[i]);
if (ret < 0)
return ret;
}
i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0);
info->read_byte_data = ucd9000_read_byte_data;
info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12
| PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34;
} else if (mid->driver_data == ucd90320) {
info->read_byte_data = ucd90320_read_byte_data;
info->read_word_data = ucd90320_read_word_data;
info->write_byte = ucd90320_write_byte;
info->write_word_data = ucd90320_write_word_data;
}
ucd9000_probe_gpio(client, mid, data);
ret = pmbus_do_probe(client, info);
if (ret)
return ret;
ret = ucd9000_init_debugfs(client, mid, data);
if (ret)
dev_warn(&client->dev, "Failed to register debugfs: %d\n",
ret);
return 0;
}
/* This is the driver that will be inserted */
static struct i2c_driver ucd9000_driver = {
.driver = {
.name = "ucd9000",
.of_match_table = of_match_ptr(ucd9000_of_match),
},
.probe = ucd9000_probe,
.id_table = ucd9000_id,
};
module_i2c_driver(ucd9000_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/ucd9000.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for LM25056 / LM25066 / LM5064 / LM5066
*
* Copyright (c) 2011 Ericsson AB.
* Copyright (c) 2013 Guenter Roeck
*/
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/log2.h>
#include <linux/of_device.h>
#include "pmbus.h"
enum chips { lm25056, lm25066, lm5064, lm5066, lm5066i };
#define LM25066_READ_VAUX 0xd0
#define LM25066_MFR_READ_IIN 0xd1
#define LM25066_MFR_READ_PIN 0xd2
#define LM25066_MFR_IIN_OC_WARN_LIMIT 0xd3
#define LM25066_MFR_PIN_OP_WARN_LIMIT 0xd4
#define LM25066_READ_PIN_PEAK 0xd5
#define LM25066_CLEAR_PIN_PEAK 0xd6
#define LM25066_DEVICE_SETUP 0xd9
#define LM25066_READ_AVG_VIN 0xdc
#define LM25066_SAMPLES_FOR_AVG 0xdb
#define LM25066_READ_AVG_VOUT 0xdd
#define LM25066_READ_AVG_IIN 0xde
#define LM25066_READ_AVG_PIN 0xdf
#define LM25066_DEV_SETUP_CL BIT(4) /* Current limit */
#define LM25066_SAMPLES_FOR_AVG_MAX 4096
/* LM25056 only */
#define LM25056_VAUX_OV_WARN_LIMIT 0xe3
#define LM25056_VAUX_UV_WARN_LIMIT 0xe4
#define LM25056_MFR_STS_VAUX_OV_WARN BIT(1)
#define LM25056_MFR_STS_VAUX_UV_WARN BIT(0)
struct __coeff {
short m, b, R;
};
#define PSC_CURRENT_IN_L (PSC_NUM_CLASSES)
#define PSC_POWER_L (PSC_NUM_CLASSES + 1)
static const struct __coeff lm25066_coeff[][PSC_NUM_CLASSES + 2] = {
[lm25056] = {
[PSC_VOLTAGE_IN] = {
.m = 16296,
.b = 1343,
.R = -2,
},
[PSC_CURRENT_IN] = {
.m = 13797,
.b = -1833,
.R = -2,
},
[PSC_CURRENT_IN_L] = {
.m = 6726,
.b = -537,
.R = -2,
},
[PSC_POWER] = {
.m = 5501,
.b = -2908,
.R = -3,
},
[PSC_POWER_L] = {
.m = 26882,
.b = -5646,
.R = -4,
},
[PSC_TEMPERATURE] = {
.m = 1580,
.b = -14500,
.R = -2,
},
},
[lm25066] = {
[PSC_VOLTAGE_IN] = {
.m = 22070,
.b = -1800,
.R = -2,
},
[PSC_VOLTAGE_OUT] = {
.m = 22070,
.b = -1800,
.R = -2,
},
[PSC_CURRENT_IN] = {
.m = 13661,
.b = -5200,
.R = -2,
},
[PSC_CURRENT_IN_L] = {
.m = 6854,
.b = -3100,
.R = -2,
},
[PSC_POWER] = {
.m = 736,
.b = -3300,
.R = -2,
},
[PSC_POWER_L] = {
.m = 369,
.b = -1900,
.R = -2,
},
[PSC_TEMPERATURE] = {
.m = 16,
},
},
[lm5064] = {
[PSC_VOLTAGE_IN] = {
.m = 4611,
.b = -642,
.R = -2,
},
[PSC_VOLTAGE_OUT] = {
.m = 4621,
.b = 423,
.R = -2,
},
[PSC_CURRENT_IN] = {
.m = 10742,
.b = 1552,
.R = -2,
},
[PSC_CURRENT_IN_L] = {
.m = 5456,
.b = 2118,
.R = -2,
},
[PSC_POWER] = {
.m = 1204,
.b = 8524,
.R = -3,
},
[PSC_POWER_L] = {
.m = 612,
.b = 11202,
.R = -3,
},
[PSC_TEMPERATURE] = {
.m = 16,
},
},
[lm5066] = {
[PSC_VOLTAGE_IN] = {
.m = 4587,
.b = -1200,
.R = -2,
},
[PSC_VOLTAGE_OUT] = {
.m = 4587,
.b = -2400,
.R = -2,
},
[PSC_CURRENT_IN] = {
.m = 10753,
.b = -1200,
.R = -2,
},
[PSC_CURRENT_IN_L] = {
.m = 5405,
.b = -600,
.R = -2,
},
[PSC_POWER] = {
.m = 1204,
.b = -6000,
.R = -3,
},
[PSC_POWER_L] = {
.m = 605,
.b = -8000,
.R = -3,
},
[PSC_TEMPERATURE] = {
.m = 16,
},
},
[lm5066i] = {
[PSC_VOLTAGE_IN] = {
.m = 4617,
.b = -140,
.R = -2,
},
[PSC_VOLTAGE_OUT] = {
.m = 4602,
.b = 500,
.R = -2,
},
[PSC_CURRENT_IN] = {
.m = 15076,
.b = -504,
.R = -2,
},
[PSC_CURRENT_IN_L] = {
.m = 7645,
.b = 100,
.R = -2,
},
[PSC_POWER] = {
.m = 1701,
.b = -4000,
.R = -3,
},
[PSC_POWER_L] = {
.m = 861,
.b = -965,
.R = -3,
},
[PSC_TEMPERATURE] = {
.m = 16,
},
},
};
struct lm25066_data {
int id;
u16 rlimit; /* Maximum register value */
struct pmbus_driver_info info;
};
#define to_lm25066_data(x) container_of(x, struct lm25066_data, info)
static int lm25066_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct lm25066_data *data = to_lm25066_data(info);
int ret;
switch (reg) {
case PMBUS_VIRT_READ_VMON:
ret = pmbus_read_word_data(client, 0, 0xff, LM25066_READ_VAUX);
if (ret < 0)
break;
/* Adjust returned value to match VIN coefficients */
switch (data->id) {
case lm25056:
/* VIN: 6.14 mV VAUX: 293 uV LSB */
ret = DIV_ROUND_CLOSEST(ret * 293, 6140);
break;
case lm25066:
/* VIN: 4.54 mV VAUX: 283.2 uV LSB */
ret = DIV_ROUND_CLOSEST(ret * 2832, 45400);
break;
case lm5064:
/* VIN: 4.53 mV VAUX: 700 uV LSB */
ret = DIV_ROUND_CLOSEST(ret * 70, 453);
break;
case lm5066:
case lm5066i:
/* VIN: 2.18 mV VAUX: 725 uV LSB */
ret = DIV_ROUND_CLOSEST(ret * 725, 2180);
break;
}
break;
case PMBUS_READ_IIN:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_MFR_READ_IIN);
break;
case PMBUS_READ_PIN:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_MFR_READ_PIN);
break;
case PMBUS_IIN_OC_WARN_LIMIT:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_MFR_IIN_OC_WARN_LIMIT);
break;
case PMBUS_PIN_OP_WARN_LIMIT:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_MFR_PIN_OP_WARN_LIMIT);
break;
case PMBUS_VIRT_READ_VIN_AVG:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_READ_AVG_VIN);
break;
case PMBUS_VIRT_READ_VOUT_AVG:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_READ_AVG_VOUT);
break;
case PMBUS_VIRT_READ_IIN_AVG:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_READ_AVG_IIN);
break;
case PMBUS_VIRT_READ_PIN_AVG:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_READ_AVG_PIN);
break;
case PMBUS_VIRT_READ_PIN_MAX:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25066_READ_PIN_PEAK);
break;
case PMBUS_VIRT_RESET_PIN_HISTORY:
ret = 0;
break;
case PMBUS_VIRT_SAMPLES:
ret = pmbus_read_byte_data(client, 0, LM25066_SAMPLES_FOR_AVG);
if (ret < 0)
break;
ret = 1 << ret;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int lm25056_read_word_data(struct i2c_client *client, int page,
int phase, int reg)
{
int ret;
switch (reg) {
case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25056_VAUX_UV_WARN_LIMIT);
if (ret < 0)
break;
/* Adjust returned value to match VIN coefficients */
ret = DIV_ROUND_CLOSEST(ret * 293, 6140);
break;
case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
ret = pmbus_read_word_data(client, 0, 0xff,
LM25056_VAUX_OV_WARN_LIMIT);
if (ret < 0)
break;
/* Adjust returned value to match VIN coefficients */
ret = DIV_ROUND_CLOSEST(ret * 293, 6140);
break;
default:
ret = lm25066_read_word_data(client, page, phase, reg);
break;
}
return ret;
}
static int lm25056_read_byte_data(struct i2c_client *client, int page, int reg)
{
int ret, s;
switch (reg) {
case PMBUS_VIRT_STATUS_VMON:
ret = pmbus_read_byte_data(client, 0,
PMBUS_STATUS_MFR_SPECIFIC);
if (ret < 0)
break;
s = 0;
if (ret & LM25056_MFR_STS_VAUX_UV_WARN)
s |= PB_VOLTAGE_UV_WARNING;
if (ret & LM25056_MFR_STS_VAUX_OV_WARN)
s |= PB_VOLTAGE_OV_WARNING;
ret = s;
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
static int lm25066_write_word_data(struct i2c_client *client, int page, int reg,
u16 word)
{
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
const struct lm25066_data *data = to_lm25066_data(info);
int ret;
switch (reg) {
case PMBUS_POUT_OP_FAULT_LIMIT:
case PMBUS_POUT_OP_WARN_LIMIT:
case PMBUS_VOUT_UV_WARN_LIMIT:
case PMBUS_OT_FAULT_LIMIT:
case PMBUS_OT_WARN_LIMIT:
case PMBUS_IIN_OC_FAULT_LIMIT:
case PMBUS_VIN_UV_WARN_LIMIT:
case PMBUS_VIN_UV_FAULT_LIMIT:
case PMBUS_VIN_OV_FAULT_LIMIT:
case PMBUS_VIN_OV_WARN_LIMIT:
word = ((s16)word < 0) ? 0 : clamp_val(word, 0, data->rlimit);
ret = pmbus_write_word_data(client, 0, reg, word);
break;
case PMBUS_IIN_OC_WARN_LIMIT:
word = ((s16)word < 0) ? 0 : clamp_val(word, 0, data->rlimit);
ret = pmbus_write_word_data(client, 0,
LM25066_MFR_IIN_OC_WARN_LIMIT,
word);
break;
case PMBUS_PIN_OP_WARN_LIMIT:
word = ((s16)word < 0) ? 0 : clamp_val(word, 0, data->rlimit);
ret = pmbus_write_word_data(client, 0,
LM25066_MFR_PIN_OP_WARN_LIMIT,
word);
break;
case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
/* Adjust from VIN coefficients (for LM25056) */
word = DIV_ROUND_CLOSEST((int)word * 6140, 293);
word = ((s16)word < 0) ? 0 : clamp_val(word, 0, data->rlimit);
ret = pmbus_write_word_data(client, 0,
LM25056_VAUX_UV_WARN_LIMIT, word);
break;
case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
/* Adjust from VIN coefficients (for LM25056) */
word = DIV_ROUND_CLOSEST((int)word * 6140, 293);
word = ((s16)word < 0) ? 0 : clamp_val(word, 0, data->rlimit);
ret = pmbus_write_word_data(client, 0,
LM25056_VAUX_OV_WARN_LIMIT, word);
break;
case PMBUS_VIRT_RESET_PIN_HISTORY:
ret = pmbus_write_byte(client, 0, LM25066_CLEAR_PIN_PEAK);
break;
case PMBUS_VIRT_SAMPLES:
word = clamp_val(word, 1, LM25066_SAMPLES_FOR_AVG_MAX);
ret = pmbus_write_byte_data(client, 0, LM25066_SAMPLES_FOR_AVG,
ilog2(word));
break;
default:
ret = -ENODATA;
break;
}
return ret;
}
#if IS_ENABLED(CONFIG_SENSORS_LM25066_REGULATOR)
static const struct regulator_desc lm25066_reg_desc[] = {
PMBUS_REGULATOR("vout", 0),
};
#endif
static const struct i2c_device_id lm25066_id[] = {
{"lm25056", lm25056},
{"lm25066", lm25066},
{"lm5064", lm5064},
{"lm5066", lm5066},
{"lm5066i", lm5066i},
{ }
};
MODULE_DEVICE_TABLE(i2c, lm25066_id);
static const struct of_device_id __maybe_unused lm25066_of_match[] = {
{ .compatible = "ti,lm25056", .data = (void *)lm25056, },
{ .compatible = "ti,lm25066", .data = (void *)lm25066, },
{ .compatible = "ti,lm5064", .data = (void *)lm5064, },
{ .compatible = "ti,lm5066", .data = (void *)lm5066, },
{ .compatible = "ti,lm5066i", .data = (void *)lm5066i, },
{ },
};
MODULE_DEVICE_TABLE(of, lm25066_of_match);
static int lm25066_probe(struct i2c_client *client)
{
int config;
u32 shunt;
struct lm25066_data *data;
struct pmbus_driver_info *info;
const struct __coeff *coeff;
const struct of_device_id *of_id;
const struct i2c_device_id *i2c_id;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_BYTE_DATA))
return -ENODEV;
data = devm_kzalloc(&client->dev, sizeof(struct lm25066_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
config = i2c_smbus_read_byte_data(client, LM25066_DEVICE_SETUP);
if (config < 0)
return config;
i2c_id = i2c_match_id(lm25066_id, client);
of_id = of_match_device(lm25066_of_match, &client->dev);
if (of_id && (unsigned long)of_id->data != i2c_id->driver_data)
dev_notice(&client->dev, "Device mismatch: %s in device tree, %s detected\n",
of_id->name, i2c_id->name);
data->id = i2c_id->driver_data;
info = &data->info;
info->pages = 1;
info->format[PSC_VOLTAGE_IN] = direct;
info->format[PSC_VOLTAGE_OUT] = direct;
info->format[PSC_CURRENT_IN] = direct;
info->format[PSC_TEMPERATURE] = direct;
info->format[PSC_POWER] = direct;
info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VMON
| PMBUS_HAVE_PIN | PMBUS_HAVE_IIN | PMBUS_HAVE_STATUS_INPUT
| PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_SAMPLES;
if (data->id == lm25056) {
info->func[0] |= PMBUS_HAVE_STATUS_VMON;
info->read_word_data = lm25056_read_word_data;
info->read_byte_data = lm25056_read_byte_data;
data->rlimit = 0x0fff;
} else {
info->func[0] |= PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
info->read_word_data = lm25066_read_word_data;
data->rlimit = 0x0fff;
}
info->write_word_data = lm25066_write_word_data;
coeff = &lm25066_coeff[data->id][0];
info->m[PSC_TEMPERATURE] = coeff[PSC_TEMPERATURE].m;
info->b[PSC_TEMPERATURE] = coeff[PSC_TEMPERATURE].b;
info->R[PSC_TEMPERATURE] = coeff[PSC_TEMPERATURE].R;
info->m[PSC_VOLTAGE_IN] = coeff[PSC_VOLTAGE_IN].m;
info->b[PSC_VOLTAGE_IN] = coeff[PSC_VOLTAGE_IN].b;
info->R[PSC_VOLTAGE_IN] = coeff[PSC_VOLTAGE_IN].R;
info->m[PSC_VOLTAGE_OUT] = coeff[PSC_VOLTAGE_OUT].m;
info->b[PSC_VOLTAGE_OUT] = coeff[PSC_VOLTAGE_OUT].b;
info->R[PSC_VOLTAGE_OUT] = coeff[PSC_VOLTAGE_OUT].R;
info->R[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN].R;
info->R[PSC_POWER] = coeff[PSC_POWER].R;
if (config & LM25066_DEV_SETUP_CL) {
info->m[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN_L].m;
info->b[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN_L].b;
info->m[PSC_POWER] = coeff[PSC_POWER_L].m;
info->b[PSC_POWER] = coeff[PSC_POWER_L].b;
} else {
info->m[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN].m;
info->b[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN].b;
info->m[PSC_POWER] = coeff[PSC_POWER].m;
info->b[PSC_POWER] = coeff[PSC_POWER].b;
}
/*
* Values in the TI datasheets are normalized for a 1mOhm sense
* resistor; assume that unless DT specifies a value explicitly.
*/
if (of_property_read_u32(client->dev.of_node, "shunt-resistor-micro-ohms", &shunt))
shunt = 1000;
info->m[PSC_CURRENT_IN] = info->m[PSC_CURRENT_IN] * shunt / 1000;
info->m[PSC_POWER] = info->m[PSC_POWER] * shunt / 1000;
#if IS_ENABLED(CONFIG_SENSORS_LM25066_REGULATOR)
/* LM25056 doesn't support OPERATION */
if (data->id != lm25056) {
info->num_regulators = ARRAY_SIZE(lm25066_reg_desc);
info->reg_desc = lm25066_reg_desc;
}
#endif
return pmbus_do_probe(client, info);
}
/* This is the driver that will be inserted */
static struct i2c_driver lm25066_driver = {
.driver = {
.name = "lm25066",
.of_match_table = of_match_ptr(lm25066_of_match),
},
.probe = lm25066_probe,
.id_table = lm25066_id,
};
module_i2c_driver(lm25066_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("PMBus driver for LM25066 and compatible chips");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(PMBUS);
|
linux-master
|
drivers/hwmon/pmbus/lm25066.c
|
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