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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 MaxLinear, Inc.
*
* This driver is a hardware monitoring driver for PVT controller
* (MR75203) which is used to configure & control Moortec embedded
* analog IP to enable multiple embedded temperature sensor(TS),
* voltage monitor(VM) & process detector(PD) modules.
*/
#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/debugfs.h>
#include <linux/hwmon.h>
#include <linux/kstrtox.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/units.h>
/* PVT Common register */
#define PVT_IP_CONFIG 0x04
#define TS_NUM_MSK GENMASK(4, 0)
#define TS_NUM_SFT 0
#define PD_NUM_MSK GENMASK(12, 8)
#define PD_NUM_SFT 8
#define VM_NUM_MSK GENMASK(20, 16)
#define VM_NUM_SFT 16
#define CH_NUM_MSK GENMASK(31, 24)
#define CH_NUM_SFT 24
#define VM_NUM_MAX (VM_NUM_MSK >> VM_NUM_SFT)
/* Macro Common Register */
#define CLK_SYNTH 0x00
#define CLK_SYNTH_LO_SFT 0
#define CLK_SYNTH_HI_SFT 8
#define CLK_SYNTH_HOLD_SFT 16
#define CLK_SYNTH_EN BIT(24)
#define CLK_SYS_CYCLES_MAX 514
#define CLK_SYS_CYCLES_MIN 2
#define SDIF_DISABLE 0x04
#define SDIF_STAT 0x08
#define SDIF_BUSY BIT(0)
#define SDIF_LOCK BIT(1)
#define SDIF_W 0x0c
#define SDIF_PROG BIT(31)
#define SDIF_WRN_W BIT(27)
#define SDIF_WRN_R 0x00
#define SDIF_ADDR_SFT 24
#define SDIF_HALT 0x10
#define SDIF_CTRL 0x14
#define SDIF_SMPL_CTRL 0x20
/* TS & PD Individual Macro Register */
#define COM_REG_SIZE 0x40
#define SDIF_DONE(n) (COM_REG_SIZE + 0x14 + 0x40 * (n))
#define SDIF_SMPL_DONE BIT(0)
#define SDIF_DATA(n) (COM_REG_SIZE + 0x18 + 0x40 * (n))
#define SAMPLE_DATA_MSK GENMASK(15, 0)
#define HILO_RESET(n) (COM_REG_SIZE + 0x2c + 0x40 * (n))
/* VM Individual Macro Register */
#define VM_COM_REG_SIZE 0x200
#define VM_SDIF_DONE(vm) (VM_COM_REG_SIZE + 0x34 + 0x200 * (vm))
#define VM_SDIF_DATA(vm, ch) \
(VM_COM_REG_SIZE + 0x40 + 0x200 * (vm) + 0x4 * (ch))
/* SDA Slave Register */
#define IP_CTRL 0x00
#define IP_RST_REL BIT(1)
#define IP_RUN_CONT BIT(3)
#define IP_AUTO BIT(8)
#define IP_VM_MODE BIT(10)
#define IP_CFG 0x01
#define CFG0_MODE_2 BIT(0)
#define CFG0_PARALLEL_OUT 0
#define CFG0_12_BIT 0
#define CFG1_VOL_MEAS_MODE 0
#define CFG1_PARALLEL_OUT 0
#define CFG1_14_BIT 0
#define IP_DATA 0x03
#define IP_POLL 0x04
#define VM_CH_INIT BIT(20)
#define VM_CH_REQ BIT(21)
#define IP_TMR 0x05
#define POWER_DELAY_CYCLE_256 0x100
#define POWER_DELAY_CYCLE_64 0x40
#define PVT_POLL_DELAY_US 20
#define PVT_POLL_TIMEOUT_US 20000
#define PVT_CONV_BITS 10
#define PVT_N_CONST 90
#define PVT_R_CONST 245805
#define PVT_TEMP_MIN_mC -40000
#define PVT_TEMP_MAX_mC 125000
/* Temperature coefficients for series 5 */
#define PVT_SERIES5_H_CONST 200000
#define PVT_SERIES5_G_CONST 60000
#define PVT_SERIES5_J_CONST -100
#define PVT_SERIES5_CAL5_CONST 4094
/* Temperature coefficients for series 6 */
#define PVT_SERIES6_H_CONST 249400
#define PVT_SERIES6_G_CONST 57400
#define PVT_SERIES6_J_CONST 0
#define PVT_SERIES6_CAL5_CONST 4096
#define TEMPERATURE_SENSOR_SERIES_5 5
#define TEMPERATURE_SENSOR_SERIES_6 6
#define PRE_SCALER_X1 1
#define PRE_SCALER_X2 2
/**
* struct voltage_device - VM single input parameters.
* @vm_map: Map channel number to VM index.
* @ch_map: Map channel number to channel index.
* @pre_scaler: Pre scaler value (1 or 2) used to normalize the voltage output
* result.
*
* The structure provides mapping between channel-number (0..N-1) to VM-index
* (0..num_vm-1) and channel-index (0..ch_num-1) where N = num_vm * ch_num.
* It also provides normalization factor for the VM equation.
*/
struct voltage_device {
u32 vm_map;
u32 ch_map;
u32 pre_scaler;
};
/**
* struct voltage_channels - VM channel count.
* @total: Total number of channels in all VMs.
* @max: Maximum number of channels among all VMs.
*
* The structure provides channel count information across all VMs.
*/
struct voltage_channels {
u32 total;
u8 max;
};
struct temp_coeff {
u32 h;
u32 g;
u32 cal5;
s32 j;
};
struct pvt_device {
struct regmap *c_map;
struct regmap *t_map;
struct regmap *p_map;
struct regmap *v_map;
struct clk *clk;
struct reset_control *rst;
struct dentry *dbgfs_dir;
struct voltage_device *vd;
struct voltage_channels vm_channels;
struct temp_coeff ts_coeff;
u32 t_num;
u32 p_num;
u32 v_num;
u32 ip_freq;
};
static ssize_t pvt_ts_coeff_j_read(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
struct pvt_device *pvt = file->private_data;
unsigned int len;
char buf[13];
len = scnprintf(buf, sizeof(buf), "%d\n", pvt->ts_coeff.j);
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
}
static ssize_t pvt_ts_coeff_j_write(struct file *file,
const char __user *user_buf,
size_t count, loff_t *ppos)
{
struct pvt_device *pvt = file->private_data;
int ret;
ret = kstrtos32_from_user(user_buf, count, 0, &pvt->ts_coeff.j);
if (ret)
return ret;
return count;
}
static const struct file_operations pvt_ts_coeff_j_fops = {
.read = pvt_ts_coeff_j_read,
.write = pvt_ts_coeff_j_write,
.open = simple_open,
.owner = THIS_MODULE,
.llseek = default_llseek,
};
static void devm_pvt_ts_dbgfs_remove(void *data)
{
struct pvt_device *pvt = (struct pvt_device *)data;
debugfs_remove_recursive(pvt->dbgfs_dir);
pvt->dbgfs_dir = NULL;
}
static int pvt_ts_dbgfs_create(struct pvt_device *pvt, struct device *dev)
{
pvt->dbgfs_dir = debugfs_create_dir(dev_name(dev), NULL);
debugfs_create_u32("ts_coeff_h", 0644, pvt->dbgfs_dir,
&pvt->ts_coeff.h);
debugfs_create_u32("ts_coeff_g", 0644, pvt->dbgfs_dir,
&pvt->ts_coeff.g);
debugfs_create_u32("ts_coeff_cal5", 0644, pvt->dbgfs_dir,
&pvt->ts_coeff.cal5);
debugfs_create_file("ts_coeff_j", 0644, pvt->dbgfs_dir, pvt,
&pvt_ts_coeff_j_fops);
return devm_add_action_or_reset(dev, devm_pvt_ts_dbgfs_remove, pvt);
}
static umode_t pvt_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_temp:
if (attr == hwmon_temp_input)
return 0444;
break;
case hwmon_in:
if (attr == hwmon_in_input)
return 0444;
break;
default:
break;
}
return 0;
}
static long pvt_calc_temp(struct pvt_device *pvt, u32 nbs)
{
/*
* Convert the register value to degrees centigrade temperature:
* T = G + H * (n / cal5 - 0.5) + J * F
*/
struct temp_coeff *ts_coeff = &pvt->ts_coeff;
s64 tmp = ts_coeff->g +
div_s64(ts_coeff->h * (s64)nbs, ts_coeff->cal5) -
ts_coeff->h / 2 +
div_s64(ts_coeff->j * (s64)pvt->ip_freq, HZ_PER_MHZ);
return clamp_val(tmp, PVT_TEMP_MIN_mC, PVT_TEMP_MAX_mC);
}
static int pvt_read_temp(struct device *dev, u32 attr, int channel, long *val)
{
struct pvt_device *pvt = dev_get_drvdata(dev);
struct regmap *t_map = pvt->t_map;
u32 stat, nbs;
int ret;
switch (attr) {
case hwmon_temp_input:
ret = regmap_read_poll_timeout(t_map, SDIF_DONE(channel),
stat, stat & SDIF_SMPL_DONE,
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
ret = regmap_read(t_map, SDIF_DATA(channel), &nbs);
if (ret < 0)
return ret;
nbs &= SAMPLE_DATA_MSK;
/*
* Convert the register value to
* degrees centigrade temperature
*/
*val = pvt_calc_temp(pvt, nbs);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int pvt_read_in(struct device *dev, u32 attr, int channel, long *val)
{
struct pvt_device *pvt = dev_get_drvdata(dev);
struct regmap *v_map = pvt->v_map;
u32 n, stat, pre_scaler;
u8 vm_idx, ch_idx;
int ret;
if (channel >= pvt->vm_channels.total)
return -EINVAL;
vm_idx = pvt->vd[channel].vm_map;
ch_idx = pvt->vd[channel].ch_map;
switch (attr) {
case hwmon_in_input:
ret = regmap_read_poll_timeout(v_map, VM_SDIF_DONE(vm_idx),
stat, stat & SDIF_SMPL_DONE,
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
ret = regmap_read(v_map, VM_SDIF_DATA(vm_idx, ch_idx), &n);
if (ret < 0)
return ret;
n &= SAMPLE_DATA_MSK;
pre_scaler = pvt->vd[channel].pre_scaler;
/*
* Convert the N bitstream count into voltage.
* To support negative voltage calculation for 64bit machines
* n must be cast to long, since n and *val differ both in
* signedness and in size.
* Division is used instead of right shift, because for signed
* numbers, the sign bit is used to fill the vacated bit
* positions, and if the number is negative, 1 is used.
* BIT(x) may not be used instead of (1 << x) because it's
* unsigned.
*/
*val = pre_scaler * (PVT_N_CONST * (long)n - PVT_R_CONST) /
(1 << PVT_CONV_BITS);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int pvt_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_temp:
return pvt_read_temp(dev, attr, channel, val);
case hwmon_in:
return pvt_read_in(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static struct hwmon_channel_info pvt_temp = {
.type = hwmon_temp,
};
static struct hwmon_channel_info pvt_in = {
.type = hwmon_in,
};
static const struct hwmon_ops pvt_hwmon_ops = {
.is_visible = pvt_is_visible,
.read = pvt_read,
};
static struct hwmon_chip_info pvt_chip_info = {
.ops = &pvt_hwmon_ops,
};
static int pvt_init(struct pvt_device *pvt)
{
u16 sys_freq, key, middle, low = 4, high = 8;
struct regmap *t_map = pvt->t_map;
struct regmap *p_map = pvt->p_map;
struct regmap *v_map = pvt->v_map;
u32 t_num = pvt->t_num;
u32 p_num = pvt->p_num;
u32 v_num = pvt->v_num;
u32 clk_synth, val;
int ret;
sys_freq = clk_get_rate(pvt->clk) / HZ_PER_MHZ;
while (high >= low) {
middle = (low + high + 1) / 2;
key = DIV_ROUND_CLOSEST(sys_freq, middle);
if (key > CLK_SYS_CYCLES_MAX) {
low = middle + 1;
continue;
} else if (key < CLK_SYS_CYCLES_MIN) {
high = middle - 1;
continue;
} else {
break;
}
}
/*
* The system supports 'clk_sys' to 'clk_ip' frequency ratios
* from 2:1 to 512:1
*/
key = clamp_val(key, CLK_SYS_CYCLES_MIN, CLK_SYS_CYCLES_MAX) - 2;
clk_synth = ((key + 1) >> 1) << CLK_SYNTH_LO_SFT |
(key >> 1) << CLK_SYNTH_HI_SFT |
(key >> 1) << CLK_SYNTH_HOLD_SFT | CLK_SYNTH_EN;
pvt->ip_freq = clk_get_rate(pvt->clk) / (key + 2);
if (t_num) {
ret = regmap_write(t_map, SDIF_SMPL_CTRL, 0x0);
if (ret < 0)
return ret;
ret = regmap_write(t_map, SDIF_HALT, 0x0);
if (ret < 0)
return ret;
ret = regmap_write(t_map, CLK_SYNTH, clk_synth);
if (ret < 0)
return ret;
ret = regmap_write(t_map, SDIF_DISABLE, 0x0);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(t_map, SDIF_STAT,
val, !(val & SDIF_BUSY),
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
val = CFG0_MODE_2 | CFG0_PARALLEL_OUT | CFG0_12_BIT |
IP_CFG << SDIF_ADDR_SFT | SDIF_WRN_W | SDIF_PROG;
ret = regmap_write(t_map, SDIF_W, val);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(t_map, SDIF_STAT,
val, !(val & SDIF_BUSY),
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
val = POWER_DELAY_CYCLE_256 | IP_TMR << SDIF_ADDR_SFT |
SDIF_WRN_W | SDIF_PROG;
ret = regmap_write(t_map, SDIF_W, val);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(t_map, SDIF_STAT,
val, !(val & SDIF_BUSY),
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
val = IP_RST_REL | IP_RUN_CONT | IP_AUTO |
IP_CTRL << SDIF_ADDR_SFT |
SDIF_WRN_W | SDIF_PROG;
ret = regmap_write(t_map, SDIF_W, val);
if (ret < 0)
return ret;
}
if (p_num) {
ret = regmap_write(p_map, SDIF_HALT, 0x0);
if (ret < 0)
return ret;
ret = regmap_write(p_map, SDIF_DISABLE, BIT(p_num) - 1);
if (ret < 0)
return ret;
ret = regmap_write(p_map, CLK_SYNTH, clk_synth);
if (ret < 0)
return ret;
}
if (v_num) {
ret = regmap_write(v_map, SDIF_SMPL_CTRL, 0x0);
if (ret < 0)
return ret;
ret = regmap_write(v_map, SDIF_HALT, 0x0);
if (ret < 0)
return ret;
ret = regmap_write(v_map, CLK_SYNTH, clk_synth);
if (ret < 0)
return ret;
ret = regmap_write(v_map, SDIF_DISABLE, 0x0);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(v_map, SDIF_STAT,
val, !(val & SDIF_BUSY),
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
val = (BIT(pvt->vm_channels.max) - 1) | VM_CH_INIT |
IP_POLL << SDIF_ADDR_SFT | SDIF_WRN_W | SDIF_PROG;
ret = regmap_write(v_map, SDIF_W, val);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(v_map, SDIF_STAT,
val, !(val & SDIF_BUSY),
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
val = CFG1_VOL_MEAS_MODE | CFG1_PARALLEL_OUT |
CFG1_14_BIT | IP_CFG << SDIF_ADDR_SFT |
SDIF_WRN_W | SDIF_PROG;
ret = regmap_write(v_map, SDIF_W, val);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(v_map, SDIF_STAT,
val, !(val & SDIF_BUSY),
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
val = POWER_DELAY_CYCLE_64 | IP_TMR << SDIF_ADDR_SFT |
SDIF_WRN_W | SDIF_PROG;
ret = regmap_write(v_map, SDIF_W, val);
if (ret < 0)
return ret;
ret = regmap_read_poll_timeout(v_map, SDIF_STAT,
val, !(val & SDIF_BUSY),
PVT_POLL_DELAY_US,
PVT_POLL_TIMEOUT_US);
if (ret)
return ret;
val = IP_RST_REL | IP_RUN_CONT | IP_AUTO | IP_VM_MODE |
IP_CTRL << SDIF_ADDR_SFT |
SDIF_WRN_W | SDIF_PROG;
ret = regmap_write(v_map, SDIF_W, val);
if (ret < 0)
return ret;
}
return 0;
}
static struct regmap_config pvt_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
};
static int pvt_get_regmap(struct platform_device *pdev, char *reg_name,
struct pvt_device *pvt)
{
struct device *dev = &pdev->dev;
struct regmap **reg_map;
void __iomem *io_base;
if (!strcmp(reg_name, "common"))
reg_map = &pvt->c_map;
else if (!strcmp(reg_name, "ts"))
reg_map = &pvt->t_map;
else if (!strcmp(reg_name, "pd"))
reg_map = &pvt->p_map;
else if (!strcmp(reg_name, "vm"))
reg_map = &pvt->v_map;
else
return -EINVAL;
io_base = devm_platform_ioremap_resource_byname(pdev, reg_name);
if (IS_ERR(io_base))
return PTR_ERR(io_base);
pvt_regmap_config.name = reg_name;
*reg_map = devm_regmap_init_mmio(dev, io_base, &pvt_regmap_config);
if (IS_ERR(*reg_map)) {
dev_err(dev, "failed to init register map\n");
return PTR_ERR(*reg_map);
}
return 0;
}
static void pvt_reset_control_assert(void *data)
{
struct pvt_device *pvt = data;
reset_control_assert(pvt->rst);
}
static int pvt_reset_control_deassert(struct device *dev, struct pvt_device *pvt)
{
int ret;
ret = reset_control_deassert(pvt->rst);
if (ret)
return ret;
return devm_add_action_or_reset(dev, pvt_reset_control_assert, pvt);
}
static int pvt_get_active_channel(struct device *dev, struct pvt_device *pvt,
u32 vm_num, u32 ch_num, u8 *vm_idx)
{
u8 vm_active_ch[VM_NUM_MAX];
int ret, i, j, k;
ret = device_property_read_u8_array(dev, "moortec,vm-active-channels",
vm_active_ch, vm_num);
if (ret) {
/*
* Incase "moortec,vm-active-channels" property is not defined,
* we assume each VM sensor has all of its channels active.
*/
memset(vm_active_ch, ch_num, vm_num);
pvt->vm_channels.max = ch_num;
pvt->vm_channels.total = ch_num * vm_num;
} else {
for (i = 0; i < vm_num; i++) {
if (vm_active_ch[i] > ch_num) {
dev_err(dev, "invalid active channels: %u\n",
vm_active_ch[i]);
return -EINVAL;
}
pvt->vm_channels.total += vm_active_ch[i];
if (vm_active_ch[i] > pvt->vm_channels.max)
pvt->vm_channels.max = vm_active_ch[i];
}
}
/*
* Map between the channel-number to VM-index and channel-index.
* Example - 3 VMs, "moortec,vm_active_ch" = <5 2 4>:
* vm_map = [0 0 0 0 0 1 1 2 2 2 2]
* ch_map = [0 1 2 3 4 0 1 0 1 2 3]
*/
pvt->vd = devm_kcalloc(dev, pvt->vm_channels.total, sizeof(*pvt->vd),
GFP_KERNEL);
if (!pvt->vd)
return -ENOMEM;
k = 0;
for (i = 0; i < vm_num; i++) {
for (j = 0; j < vm_active_ch[i]; j++) {
pvt->vd[k].vm_map = vm_idx[i];
pvt->vd[k].ch_map = j;
k++;
}
}
return 0;
}
static int pvt_get_pre_scaler(struct device *dev, struct pvt_device *pvt)
{
u8 *pre_scaler_ch_list;
int i, ret, num_ch;
u32 channel;
/* Set default pre-scaler value to be 1. */
for (i = 0; i < pvt->vm_channels.total; i++)
pvt->vd[i].pre_scaler = PRE_SCALER_X1;
/* Get number of channels configured in "moortec,vm-pre-scaler-x2". */
num_ch = device_property_count_u8(dev, "moortec,vm-pre-scaler-x2");
if (num_ch <= 0)
return 0;
pre_scaler_ch_list = kcalloc(num_ch, sizeof(*pre_scaler_ch_list),
GFP_KERNEL);
if (!pre_scaler_ch_list)
return -ENOMEM;
/* Get list of all channels that have pre-scaler of 2. */
ret = device_property_read_u8_array(dev, "moortec,vm-pre-scaler-x2",
pre_scaler_ch_list, num_ch);
if (ret)
goto out;
for (i = 0; i < num_ch; i++) {
channel = pre_scaler_ch_list[i];
pvt->vd[channel].pre_scaler = PRE_SCALER_X2;
}
out:
kfree(pre_scaler_ch_list);
return ret;
}
static int pvt_set_temp_coeff(struct device *dev, struct pvt_device *pvt)
{
struct temp_coeff *ts_coeff = &pvt->ts_coeff;
u32 series;
int ret;
/* Incase ts-series property is not defined, use default 5. */
ret = device_property_read_u32(dev, "moortec,ts-series", &series);
if (ret)
series = TEMPERATURE_SENSOR_SERIES_5;
switch (series) {
case TEMPERATURE_SENSOR_SERIES_5:
ts_coeff->h = PVT_SERIES5_H_CONST;
ts_coeff->g = PVT_SERIES5_G_CONST;
ts_coeff->j = PVT_SERIES5_J_CONST;
ts_coeff->cal5 = PVT_SERIES5_CAL5_CONST;
break;
case TEMPERATURE_SENSOR_SERIES_6:
ts_coeff->h = PVT_SERIES6_H_CONST;
ts_coeff->g = PVT_SERIES6_G_CONST;
ts_coeff->j = PVT_SERIES6_J_CONST;
ts_coeff->cal5 = PVT_SERIES6_CAL5_CONST;
break;
default:
dev_err(dev, "invalid temperature sensor series (%u)\n",
series);
return -EINVAL;
}
dev_dbg(dev, "temperature sensor series = %u\n", series);
/* Override ts-coeff-h/g/j/cal5 if they are defined. */
device_property_read_u32(dev, "moortec,ts-coeff-h", &ts_coeff->h);
device_property_read_u32(dev, "moortec,ts-coeff-g", &ts_coeff->g);
device_property_read_u32(dev, "moortec,ts-coeff-j", &ts_coeff->j);
device_property_read_u32(dev, "moortec,ts-coeff-cal5", &ts_coeff->cal5);
dev_dbg(dev, "ts-coeff: h = %u, g = %u, j = %d, cal5 = %u\n",
ts_coeff->h, ts_coeff->g, ts_coeff->j, ts_coeff->cal5);
return 0;
}
static int mr75203_probe(struct platform_device *pdev)
{
u32 ts_num, vm_num, pd_num, ch_num, val, index, i;
const struct hwmon_channel_info **pvt_info;
struct device *dev = &pdev->dev;
u32 *temp_config, *in_config;
struct device *hwmon_dev;
struct pvt_device *pvt;
int ret;
pvt = devm_kzalloc(dev, sizeof(*pvt), GFP_KERNEL);
if (!pvt)
return -ENOMEM;
ret = pvt_get_regmap(pdev, "common", pvt);
if (ret)
return ret;
pvt->clk = devm_clk_get_enabled(dev, NULL);
if (IS_ERR(pvt->clk))
return dev_err_probe(dev, PTR_ERR(pvt->clk), "failed to get clock\n");
pvt->rst = devm_reset_control_get_optional_exclusive(dev, NULL);
if (IS_ERR(pvt->rst))
return dev_err_probe(dev, PTR_ERR(pvt->rst),
"failed to get reset control\n");
if (pvt->rst) {
ret = pvt_reset_control_deassert(dev, pvt);
if (ret)
return dev_err_probe(dev, ret,
"cannot deassert reset control\n");
}
ret = regmap_read(pvt->c_map, PVT_IP_CONFIG, &val);
if (ret < 0)
return ret;
ts_num = (val & TS_NUM_MSK) >> TS_NUM_SFT;
pd_num = (val & PD_NUM_MSK) >> PD_NUM_SFT;
vm_num = (val & VM_NUM_MSK) >> VM_NUM_SFT;
ch_num = (val & CH_NUM_MSK) >> CH_NUM_SFT;
pvt->t_num = ts_num;
pvt->p_num = pd_num;
pvt->v_num = vm_num;
val = 0;
if (ts_num)
val++;
if (vm_num)
val++;
if (!val)
return -ENODEV;
pvt_info = devm_kcalloc(dev, val + 2, sizeof(*pvt_info), GFP_KERNEL);
if (!pvt_info)
return -ENOMEM;
pvt_info[0] = HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ);
index = 1;
if (ts_num) {
ret = pvt_get_regmap(pdev, "ts", pvt);
if (ret)
return ret;
ret = pvt_set_temp_coeff(dev, pvt);
if (ret)
return ret;
temp_config = devm_kcalloc(dev, ts_num + 1,
sizeof(*temp_config), GFP_KERNEL);
if (!temp_config)
return -ENOMEM;
memset32(temp_config, HWMON_T_INPUT, ts_num);
pvt_temp.config = temp_config;
pvt_info[index++] = &pvt_temp;
pvt_ts_dbgfs_create(pvt, dev);
}
if (pd_num) {
ret = pvt_get_regmap(pdev, "pd", pvt);
if (ret)
return ret;
}
if (vm_num) {
u8 vm_idx[VM_NUM_MAX];
ret = pvt_get_regmap(pdev, "vm", pvt);
if (ret)
return ret;
ret = device_property_read_u8_array(dev, "intel,vm-map", vm_idx,
vm_num);
if (ret) {
/*
* Incase intel,vm-map property is not defined, we
* assume incremental channel numbers.
*/
for (i = 0; i < vm_num; i++)
vm_idx[i] = i;
} else {
for (i = 0; i < vm_num; i++)
if (vm_idx[i] >= vm_num || vm_idx[i] == 0xff) {
pvt->v_num = i;
vm_num = i;
break;
}
}
ret = pvt_get_active_channel(dev, pvt, vm_num, ch_num, vm_idx);
if (ret)
return ret;
ret = pvt_get_pre_scaler(dev, pvt);
if (ret)
return ret;
in_config = devm_kcalloc(dev, pvt->vm_channels.total + 1,
sizeof(*in_config), GFP_KERNEL);
if (!in_config)
return -ENOMEM;
memset32(in_config, HWMON_I_INPUT, pvt->vm_channels.total);
in_config[pvt->vm_channels.total] = 0;
pvt_in.config = in_config;
pvt_info[index++] = &pvt_in;
}
ret = pvt_init(pvt);
if (ret) {
dev_err(dev, "failed to init pvt: %d\n", ret);
return ret;
}
pvt_chip_info.info = pvt_info;
hwmon_dev = devm_hwmon_device_register_with_info(dev, "pvt",
pvt,
&pvt_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id moortec_pvt_of_match[] = {
{ .compatible = "moortec,mr75203" },
{ }
};
MODULE_DEVICE_TABLE(of, moortec_pvt_of_match);
static struct platform_driver moortec_pvt_driver = {
.driver = {
.name = "moortec-pvt",
.of_match_table = moortec_pvt_of_match,
},
.probe = mr75203_probe,
};
module_platform_driver(moortec_pvt_driver);
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/mr75203.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices LTC2947 high precision power and energy monitor
*
* Copyright 2019 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include "ltc2947.h"
/* register's */
#define LTC2947_REG_PAGE_CTRL 0xFF
#define LTC2947_REG_CTRL 0xF0
#define LTC2947_REG_TBCTL 0xE9
#define LTC2947_CONT_MODE_MASK BIT(3)
#define LTC2947_CONT_MODE(x) FIELD_PREP(LTC2947_CONT_MODE_MASK, x)
#define LTC2947_PRE_MASK GENMASK(2, 0)
#define LTC2947_PRE(x) FIELD_PREP(LTC2947_PRE_MASK, x)
#define LTC2947_DIV_MASK GENMASK(7, 3)
#define LTC2947_DIV(x) FIELD_PREP(LTC2947_DIV_MASK, x)
#define LTC2947_SHUTDOWN_MASK BIT(0)
#define LTC2947_REG_ACCUM_POL 0xE1
#define LTC2947_ACCUM_POL_1_MASK GENMASK(1, 0)
#define LTC2947_ACCUM_POL_1(x) FIELD_PREP(LTC2947_ACCUM_POL_1_MASK, x)
#define LTC2947_ACCUM_POL_2_MASK GENMASK(3, 2)
#define LTC2947_ACCUM_POL_2(x) FIELD_PREP(LTC2947_ACCUM_POL_2_MASK, x)
#define LTC2947_REG_ACCUM_DEADBAND 0xE4
#define LTC2947_REG_GPIOSTATCTL 0x67
#define LTC2947_GPIO_EN_MASK BIT(0)
#define LTC2947_GPIO_EN(x) FIELD_PREP(LTC2947_GPIO_EN_MASK, x)
#define LTC2947_GPIO_FAN_EN_MASK BIT(6)
#define LTC2947_GPIO_FAN_EN(x) FIELD_PREP(LTC2947_GPIO_FAN_EN_MASK, x)
#define LTC2947_GPIO_FAN_POL_MASK BIT(7)
#define LTC2947_GPIO_FAN_POL(x) FIELD_PREP(LTC2947_GPIO_FAN_POL_MASK, x)
#define LTC2947_REG_GPIO_ACCUM 0xE3
/* 200Khz */
#define LTC2947_CLK_MIN 200000
/* 25Mhz */
#define LTC2947_CLK_MAX 25000000
#define LTC2947_PAGE0 0
#define LTC2947_PAGE1 1
/* Voltage registers */
#define LTC2947_REG_VOLTAGE 0xA0
#define LTC2947_REG_VOLTAGE_MAX 0x50
#define LTC2947_REG_VOLTAGE_MIN 0x52
#define LTC2947_REG_VOLTAGE_THRE_H 0x90
#define LTC2947_REG_VOLTAGE_THRE_L 0x92
#define LTC2947_REG_DVCC 0xA4
#define LTC2947_REG_DVCC_MAX 0x58
#define LTC2947_REG_DVCC_MIN 0x5A
#define LTC2947_REG_DVCC_THRE_H 0x98
#define LTC2947_REG_DVCC_THRE_L 0x9A
#define LTC2947_VOLTAGE_GEN_CHAN 0
#define LTC2947_VOLTAGE_DVCC_CHAN 1
/* in mV */
#define VOLTAGE_MAX 15500
#define VOLTAGE_MIN -300
#define VDVCC_MAX 15000
#define VDVCC_MIN 4750
/* Current registers */
#define LTC2947_REG_CURRENT 0x90
#define LTC2947_REG_CURRENT_MAX 0x40
#define LTC2947_REG_CURRENT_MIN 0x42
#define LTC2947_REG_CURRENT_THRE_H 0x80
#define LTC2947_REG_CURRENT_THRE_L 0x82
/* in mA */
#define CURRENT_MAX 30000
#define CURRENT_MIN -30000
/* Power registers */
#define LTC2947_REG_POWER 0x93
#define LTC2947_REG_POWER_MAX 0x44
#define LTC2947_REG_POWER_MIN 0x46
#define LTC2947_REG_POWER_THRE_H 0x84
#define LTC2947_REG_POWER_THRE_L 0x86
/* in uW */
#define POWER_MAX 450000000
#define POWER_MIN -450000000
/* Temperature registers */
#define LTC2947_REG_TEMP 0xA2
#define LTC2947_REG_TEMP_MAX 0x54
#define LTC2947_REG_TEMP_MIN 0x56
#define LTC2947_REG_TEMP_THRE_H 0x94
#define LTC2947_REG_TEMP_THRE_L 0x96
#define LTC2947_REG_TEMP_FAN_THRE_H 0x9C
#define LTC2947_REG_TEMP_FAN_THRE_L 0x9E
#define LTC2947_TEMP_FAN_CHAN 1
/* in millidegress Celsius */
#define TEMP_MAX 85000
#define TEMP_MIN -40000
/* Energy registers */
#define LTC2947_REG_ENERGY1 0x06
#define LTC2947_REG_ENERGY2 0x16
/* Status/Alarm/Overflow registers */
#define LTC2947_REG_STATUS 0x80
#define LTC2947_REG_STATVT 0x81
#define LTC2947_REG_STATIP 0x82
#define LTC2947_REG_STATVDVCC 0x87
#define LTC2947_ALERTS_SIZE (LTC2947_REG_STATVDVCC - LTC2947_REG_STATUS)
#define LTC2947_MAX_VOLTAGE_MASK BIT(0)
#define LTC2947_MIN_VOLTAGE_MASK BIT(1)
#define LTC2947_MAX_CURRENT_MASK BIT(0)
#define LTC2947_MIN_CURRENT_MASK BIT(1)
#define LTC2947_MAX_POWER_MASK BIT(2)
#define LTC2947_MIN_POWER_MASK BIT(3)
#define LTC2947_MAX_TEMP_MASK BIT(2)
#define LTC2947_MIN_TEMP_MASK BIT(3)
#define LTC2947_MAX_TEMP_FAN_MASK BIT(4)
#define LTC2947_MIN_TEMP_FAN_MASK BIT(5)
struct ltc2947_data {
struct regmap *map;
struct device *dev;
/*
* The mutex is needed because the device has 2 memory pages. When
* reading/writing the correct page needs to be set so that, the
* complete sequence select_page->read/write needs to be protected.
*/
struct mutex lock;
u32 lsb_energy;
bool gpio_out;
};
static int __ltc2947_val_read16(const struct ltc2947_data *st, const u8 reg,
u64 *val)
{
__be16 __val = 0;
int ret;
ret = regmap_bulk_read(st->map, reg, &__val, 2);
if (ret)
return ret;
*val = be16_to_cpu(__val);
return 0;
}
static int __ltc2947_val_read24(const struct ltc2947_data *st, const u8 reg,
u64 *val)
{
__be32 __val = 0;
int ret;
ret = regmap_bulk_read(st->map, reg, &__val, 3);
if (ret)
return ret;
*val = be32_to_cpu(__val) >> 8;
return 0;
}
static int __ltc2947_val_read64(const struct ltc2947_data *st, const u8 reg,
u64 *val)
{
__be64 __val = 0;
int ret;
ret = regmap_bulk_read(st->map, reg, &__val, 6);
if (ret)
return ret;
*val = be64_to_cpu(__val) >> 16;
return 0;
}
static int ltc2947_val_read(struct ltc2947_data *st, const u8 reg,
const u8 page, const size_t size, s64 *val)
{
int ret;
u64 __val = 0;
mutex_lock(&st->lock);
ret = regmap_write(st->map, LTC2947_REG_PAGE_CTRL, page);
if (ret) {
mutex_unlock(&st->lock);
return ret;
}
dev_dbg(st->dev, "Read val, reg:%02X, p:%d sz:%zu\n", reg, page,
size);
switch (size) {
case 2:
ret = __ltc2947_val_read16(st, reg, &__val);
break;
case 3:
ret = __ltc2947_val_read24(st, reg, &__val);
break;
case 6:
ret = __ltc2947_val_read64(st, reg, &__val);
break;
default:
ret = -EINVAL;
break;
}
mutex_unlock(&st->lock);
if (ret)
return ret;
*val = sign_extend64(__val, (8 * size) - 1);
dev_dbg(st->dev, "Got s:%lld, u:%016llX\n", *val, __val);
return 0;
}
static int __ltc2947_val_write64(const struct ltc2947_data *st, const u8 reg,
const u64 val)
{
__be64 __val;
__val = cpu_to_be64(val << 16);
return regmap_bulk_write(st->map, reg, &__val, 6);
}
static int __ltc2947_val_write16(const struct ltc2947_data *st, const u8 reg,
const u16 val)
{
__be16 __val;
__val = cpu_to_be16(val);
return regmap_bulk_write(st->map, reg, &__val, 2);
}
static int ltc2947_val_write(struct ltc2947_data *st, const u8 reg,
const u8 page, const size_t size, const u64 val)
{
int ret;
mutex_lock(&st->lock);
/* set device on correct page */
ret = regmap_write(st->map, LTC2947_REG_PAGE_CTRL, page);
if (ret) {
mutex_unlock(&st->lock);
return ret;
}
dev_dbg(st->dev, "Write val, r:%02X, p:%d, sz:%zu, val:%016llX\n",
reg, page, size, val);
switch (size) {
case 2:
ret = __ltc2947_val_write16(st, reg, val);
break;
case 6:
ret = __ltc2947_val_write64(st, reg, val);
break;
default:
ret = -EINVAL;
break;
}
mutex_unlock(&st->lock);
return ret;
}
static int ltc2947_reset_history(struct ltc2947_data *st, const u8 reg_h,
const u8 reg_l)
{
int ret;
/*
* let's reset the tracking register's. Tracking register's have all
* 2 bytes size
*/
ret = ltc2947_val_write(st, reg_h, LTC2947_PAGE0, 2, 0x8000U);
if (ret)
return ret;
return ltc2947_val_write(st, reg_l, LTC2947_PAGE0, 2, 0x7FFFU);
}
static int ltc2947_alarm_read(struct ltc2947_data *st, const u8 reg,
const u32 mask, long *val)
{
u8 offset = reg - LTC2947_REG_STATUS;
/* +1 to include status reg */
char alarms[LTC2947_ALERTS_SIZE + 1];
int ret = 0;
memset(alarms, 0, sizeof(alarms));
mutex_lock(&st->lock);
ret = regmap_write(st->map, LTC2947_REG_PAGE_CTRL, LTC2947_PAGE0);
if (ret)
goto unlock;
dev_dbg(st->dev, "Read alarm, reg:%02X, mask:%02X\n", reg, mask);
/*
* As stated in the datasheet, when Threshold and Overflow registers
* are used, the status and all alert registers must be read in one
* multi-byte transaction.
*/
ret = regmap_bulk_read(st->map, LTC2947_REG_STATUS, alarms,
sizeof(alarms));
if (ret)
goto unlock;
/* get the alarm */
*val = !!(alarms[offset] & mask);
unlock:
mutex_unlock(&st->lock);
return ret;
}
static ssize_t ltc2947_show_value(struct device *dev,
struct device_attribute *da, char *buf)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int ret;
s64 val = 0;
ret = ltc2947_val_read(st, attr->index, LTC2947_PAGE0, 6, &val);
if (ret)
return ret;
/* value in microJoule. st->lsb_energy was multiplied by 10E9 */
val = div_s64(val * st->lsb_energy, 1000);
return sprintf(buf, "%lld\n", val);
}
static int ltc2947_read_temp(struct device *dev, const u32 attr, long *val,
const int channel)
{
int ret;
struct ltc2947_data *st = dev_get_drvdata(dev);
s64 __val = 0;
switch (attr) {
case hwmon_temp_input:
ret = ltc2947_val_read(st, LTC2947_REG_TEMP, LTC2947_PAGE0,
2, &__val);
break;
case hwmon_temp_highest:
ret = ltc2947_val_read(st, LTC2947_REG_TEMP_MAX, LTC2947_PAGE0,
2, &__val);
break;
case hwmon_temp_lowest:
ret = ltc2947_val_read(st, LTC2947_REG_TEMP_MIN, LTC2947_PAGE0,
2, &__val);
break;
case hwmon_temp_max_alarm:
if (channel == LTC2947_TEMP_FAN_CHAN)
return ltc2947_alarm_read(st, LTC2947_REG_STATVT,
LTC2947_MAX_TEMP_FAN_MASK,
val);
return ltc2947_alarm_read(st, LTC2947_REG_STATVT,
LTC2947_MAX_TEMP_MASK, val);
case hwmon_temp_min_alarm:
if (channel == LTC2947_TEMP_FAN_CHAN)
return ltc2947_alarm_read(st, LTC2947_REG_STATVT,
LTC2947_MIN_TEMP_FAN_MASK,
val);
return ltc2947_alarm_read(st, LTC2947_REG_STATVT,
LTC2947_MIN_TEMP_MASK, val);
case hwmon_temp_max:
if (channel == LTC2947_TEMP_FAN_CHAN)
ret = ltc2947_val_read(st, LTC2947_REG_TEMP_FAN_THRE_H,
LTC2947_PAGE1, 2, &__val);
else
ret = ltc2947_val_read(st, LTC2947_REG_TEMP_THRE_H,
LTC2947_PAGE1, 2, &__val);
break;
case hwmon_temp_min:
if (channel == LTC2947_TEMP_FAN_CHAN)
ret = ltc2947_val_read(st, LTC2947_REG_TEMP_FAN_THRE_L,
LTC2947_PAGE1, 2, &__val);
else
ret = ltc2947_val_read(st, LTC2947_REG_TEMP_THRE_L,
LTC2947_PAGE1, 2, &__val);
break;
default:
return -ENOTSUPP;
}
if (ret)
return ret;
/* in milidegrees celcius, temp is given by: */
*val = (__val * 204) + 5500;
return 0;
}
static int ltc2947_read_power(struct device *dev, const u32 attr, long *val)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
int ret;
u32 lsb = 200000; /* in uW */
s64 __val = 0;
switch (attr) {
case hwmon_power_input:
ret = ltc2947_val_read(st, LTC2947_REG_POWER, LTC2947_PAGE0,
3, &__val);
lsb = 50000;
break;
case hwmon_power_input_highest:
ret = ltc2947_val_read(st, LTC2947_REG_POWER_MAX, LTC2947_PAGE0,
2, &__val);
break;
case hwmon_power_input_lowest:
ret = ltc2947_val_read(st, LTC2947_REG_POWER_MIN, LTC2947_PAGE0,
2, &__val);
break;
case hwmon_power_max_alarm:
return ltc2947_alarm_read(st, LTC2947_REG_STATIP,
LTC2947_MAX_POWER_MASK, val);
case hwmon_power_min_alarm:
return ltc2947_alarm_read(st, LTC2947_REG_STATIP,
LTC2947_MIN_POWER_MASK, val);
case hwmon_power_max:
ret = ltc2947_val_read(st, LTC2947_REG_POWER_THRE_H,
LTC2947_PAGE1, 2, &__val);
break;
case hwmon_power_min:
ret = ltc2947_val_read(st, LTC2947_REG_POWER_THRE_L,
LTC2947_PAGE1, 2, &__val);
break;
default:
return -ENOTSUPP;
}
if (ret)
return ret;
*val = __val * lsb;
return 0;
}
static int ltc2947_read_curr(struct device *dev, const u32 attr, long *val)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
int ret;
u8 lsb = 12; /* in mA */
s64 __val = 0;
switch (attr) {
case hwmon_curr_input:
ret = ltc2947_val_read(st, LTC2947_REG_CURRENT,
LTC2947_PAGE0, 3, &__val);
lsb = 3;
break;
case hwmon_curr_highest:
ret = ltc2947_val_read(st, LTC2947_REG_CURRENT_MAX,
LTC2947_PAGE0, 2, &__val);
break;
case hwmon_curr_lowest:
ret = ltc2947_val_read(st, LTC2947_REG_CURRENT_MIN,
LTC2947_PAGE0, 2, &__val);
break;
case hwmon_curr_max_alarm:
return ltc2947_alarm_read(st, LTC2947_REG_STATIP,
LTC2947_MAX_CURRENT_MASK, val);
case hwmon_curr_min_alarm:
return ltc2947_alarm_read(st, LTC2947_REG_STATIP,
LTC2947_MIN_CURRENT_MASK, val);
case hwmon_curr_max:
ret = ltc2947_val_read(st, LTC2947_REG_CURRENT_THRE_H,
LTC2947_PAGE1, 2, &__val);
break;
case hwmon_curr_min:
ret = ltc2947_val_read(st, LTC2947_REG_CURRENT_THRE_L,
LTC2947_PAGE1, 2, &__val);
break;
default:
return -ENOTSUPP;
}
if (ret)
return ret;
*val = __val * lsb;
return 0;
}
static int ltc2947_read_in(struct device *dev, const u32 attr, long *val,
const int channel)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
int ret;
u8 lsb = 2; /* in mV */
s64 __val = 0;
if (channel < 0 || channel > LTC2947_VOLTAGE_DVCC_CHAN) {
dev_err(st->dev, "Invalid chan%d for voltage", channel);
return -EINVAL;
}
switch (attr) {
case hwmon_in_input:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN) {
ret = ltc2947_val_read(st, LTC2947_REG_DVCC,
LTC2947_PAGE0, 2, &__val);
lsb = 145;
} else {
ret = ltc2947_val_read(st, LTC2947_REG_VOLTAGE,
LTC2947_PAGE0, 2, &__val);
}
break;
case hwmon_in_highest:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN) {
ret = ltc2947_val_read(st, LTC2947_REG_DVCC_MAX,
LTC2947_PAGE0, 2, &__val);
lsb = 145;
} else {
ret = ltc2947_val_read(st, LTC2947_REG_VOLTAGE_MAX,
LTC2947_PAGE0, 2, &__val);
}
break;
case hwmon_in_lowest:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN) {
ret = ltc2947_val_read(st, LTC2947_REG_DVCC_MIN,
LTC2947_PAGE0, 2, &__val);
lsb = 145;
} else {
ret = ltc2947_val_read(st, LTC2947_REG_VOLTAGE_MIN,
LTC2947_PAGE0, 2, &__val);
}
break;
case hwmon_in_max_alarm:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN)
return ltc2947_alarm_read(st, LTC2947_REG_STATVDVCC,
LTC2947_MAX_VOLTAGE_MASK,
val);
return ltc2947_alarm_read(st, LTC2947_REG_STATVT,
LTC2947_MAX_VOLTAGE_MASK, val);
case hwmon_in_min_alarm:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN)
return ltc2947_alarm_read(st, LTC2947_REG_STATVDVCC,
LTC2947_MIN_VOLTAGE_MASK,
val);
return ltc2947_alarm_read(st, LTC2947_REG_STATVT,
LTC2947_MIN_VOLTAGE_MASK, val);
case hwmon_in_max:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN) {
ret = ltc2947_val_read(st, LTC2947_REG_DVCC_THRE_H,
LTC2947_PAGE1, 2, &__val);
lsb = 145;
} else {
ret = ltc2947_val_read(st, LTC2947_REG_VOLTAGE_THRE_H,
LTC2947_PAGE1, 2, &__val);
}
break;
case hwmon_in_min:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN) {
ret = ltc2947_val_read(st, LTC2947_REG_DVCC_THRE_L,
LTC2947_PAGE1, 2, &__val);
lsb = 145;
} else {
ret = ltc2947_val_read(st, LTC2947_REG_VOLTAGE_THRE_L,
LTC2947_PAGE1, 2, &__val);
}
break;
default:
return -ENOTSUPP;
}
if (ret)
return ret;
*val = __val * lsb;
return 0;
}
static int ltc2947_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_in:
return ltc2947_read_in(dev, attr, val, channel);
case hwmon_curr:
return ltc2947_read_curr(dev, attr, val);
case hwmon_power:
return ltc2947_read_power(dev, attr, val);
case hwmon_temp:
return ltc2947_read_temp(dev, attr, val, channel);
default:
return -ENOTSUPP;
}
}
static int ltc2947_write_temp(struct device *dev, const u32 attr,
long val, const int channel)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
if (channel < 0 || channel > LTC2947_TEMP_FAN_CHAN) {
dev_err(st->dev, "Invalid chan%d for temperature", channel);
return -EINVAL;
}
switch (attr) {
case hwmon_temp_reset_history:
if (val != 1)
return -EINVAL;
return ltc2947_reset_history(st, LTC2947_REG_TEMP_MAX,
LTC2947_REG_TEMP_MIN);
case hwmon_temp_max:
val = clamp_val(val, TEMP_MIN, TEMP_MAX);
if (channel == LTC2947_TEMP_FAN_CHAN) {
if (!st->gpio_out)
return -ENOTSUPP;
return ltc2947_val_write(st,
LTC2947_REG_TEMP_FAN_THRE_H,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val - 550, 204));
}
return ltc2947_val_write(st, LTC2947_REG_TEMP_THRE_H,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val - 550, 204));
case hwmon_temp_min:
val = clamp_val(val, TEMP_MIN, TEMP_MAX);
if (channel == LTC2947_TEMP_FAN_CHAN) {
if (!st->gpio_out)
return -ENOTSUPP;
return ltc2947_val_write(st,
LTC2947_REG_TEMP_FAN_THRE_L,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val - 550, 204));
}
return ltc2947_val_write(st, LTC2947_REG_TEMP_THRE_L,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val - 550, 204));
default:
return -ENOTSUPP;
}
}
static int ltc2947_write_power(struct device *dev, const u32 attr,
long val)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
switch (attr) {
case hwmon_power_reset_history:
if (val != 1)
return -EINVAL;
return ltc2947_reset_history(st, LTC2947_REG_POWER_MAX,
LTC2947_REG_POWER_MIN);
case hwmon_power_max:
val = clamp_val(val, POWER_MIN, POWER_MAX);
return ltc2947_val_write(st, LTC2947_REG_POWER_THRE_H,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 200000));
case hwmon_power_min:
val = clamp_val(val, POWER_MIN, POWER_MAX);
return ltc2947_val_write(st, LTC2947_REG_POWER_THRE_L,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 200000));
default:
return -ENOTSUPP;
}
}
static int ltc2947_write_curr(struct device *dev, const u32 attr,
long val)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
switch (attr) {
case hwmon_curr_reset_history:
if (val != 1)
return -EINVAL;
return ltc2947_reset_history(st, LTC2947_REG_CURRENT_MAX,
LTC2947_REG_CURRENT_MIN);
case hwmon_curr_max:
val = clamp_val(val, CURRENT_MIN, CURRENT_MAX);
return ltc2947_val_write(st, LTC2947_REG_CURRENT_THRE_H,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 12));
case hwmon_curr_min:
val = clamp_val(val, CURRENT_MIN, CURRENT_MAX);
return ltc2947_val_write(st, LTC2947_REG_CURRENT_THRE_L,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 12));
default:
return -ENOTSUPP;
}
}
static int ltc2947_write_in(struct device *dev, const u32 attr, long val,
const int channel)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
if (channel > LTC2947_VOLTAGE_DVCC_CHAN) {
dev_err(st->dev, "Invalid chan%d for voltage", channel);
return -EINVAL;
}
switch (attr) {
case hwmon_in_reset_history:
if (val != 1)
return -EINVAL;
if (channel == LTC2947_VOLTAGE_DVCC_CHAN)
return ltc2947_reset_history(st, LTC2947_REG_DVCC_MAX,
LTC2947_REG_DVCC_MIN);
return ltc2947_reset_history(st, LTC2947_REG_VOLTAGE_MAX,
LTC2947_REG_VOLTAGE_MIN);
case hwmon_in_max:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN) {
val = clamp_val(val, VDVCC_MIN, VDVCC_MAX);
return ltc2947_val_write(st, LTC2947_REG_DVCC_THRE_H,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 145));
}
val = clamp_val(val, VOLTAGE_MIN, VOLTAGE_MAX);
return ltc2947_val_write(st, LTC2947_REG_VOLTAGE_THRE_H,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 2));
case hwmon_in_min:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN) {
val = clamp_val(val, VDVCC_MIN, VDVCC_MAX);
return ltc2947_val_write(st, LTC2947_REG_DVCC_THRE_L,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 145));
}
val = clamp_val(val, VOLTAGE_MIN, VOLTAGE_MAX);
return ltc2947_val_write(st, LTC2947_REG_VOLTAGE_THRE_L,
LTC2947_PAGE1, 2,
DIV_ROUND_CLOSEST(val, 2));
default:
return -ENOTSUPP;
}
}
static int ltc2947_write(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_in:
return ltc2947_write_in(dev, attr, val, channel);
case hwmon_curr:
return ltc2947_write_curr(dev, attr, val);
case hwmon_power:
return ltc2947_write_power(dev, attr, val);
case hwmon_temp:
return ltc2947_write_temp(dev, attr, val, channel);
default:
return -ENOTSUPP;
}
}
static int ltc2947_read_labels(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
switch (type) {
case hwmon_in:
if (channel == LTC2947_VOLTAGE_DVCC_CHAN)
*str = "DVCC";
else
*str = "VP-VM";
return 0;
case hwmon_curr:
*str = "IP-IM";
return 0;
case hwmon_temp:
if (channel == LTC2947_TEMP_FAN_CHAN)
*str = "TEMPFAN";
else
*str = "Ambient";
return 0;
case hwmon_power:
*str = "Power";
return 0;
default:
return -ENOTSUPP;
}
}
static int ltc2947_in_is_visible(const u32 attr)
{
switch (attr) {
case hwmon_in_input:
case hwmon_in_highest:
case hwmon_in_lowest:
case hwmon_in_max_alarm:
case hwmon_in_min_alarm:
case hwmon_in_label:
return 0444;
case hwmon_in_reset_history:
return 0200;
case hwmon_in_max:
case hwmon_in_min:
return 0644;
default:
return 0;
}
}
static int ltc2947_curr_is_visible(const u32 attr)
{
switch (attr) {
case hwmon_curr_input:
case hwmon_curr_highest:
case hwmon_curr_lowest:
case hwmon_curr_max_alarm:
case hwmon_curr_min_alarm:
case hwmon_curr_label:
return 0444;
case hwmon_curr_reset_history:
return 0200;
case hwmon_curr_max:
case hwmon_curr_min:
return 0644;
default:
return 0;
}
}
static int ltc2947_power_is_visible(const u32 attr)
{
switch (attr) {
case hwmon_power_input:
case hwmon_power_input_highest:
case hwmon_power_input_lowest:
case hwmon_power_label:
case hwmon_power_max_alarm:
case hwmon_power_min_alarm:
return 0444;
case hwmon_power_reset_history:
return 0200;
case hwmon_power_max:
case hwmon_power_min:
return 0644;
default:
return 0;
}
}
static int ltc2947_temp_is_visible(const u32 attr)
{
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_highest:
case hwmon_temp_lowest:
case hwmon_temp_max_alarm:
case hwmon_temp_min_alarm:
case hwmon_temp_label:
return 0444;
case hwmon_temp_reset_history:
return 0200;
case hwmon_temp_max:
case hwmon_temp_min:
return 0644;
default:
return 0;
}
}
static umode_t ltc2947_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_in:
return ltc2947_in_is_visible(attr);
case hwmon_curr:
return ltc2947_curr_is_visible(attr);
case hwmon_power:
return ltc2947_power_is_visible(attr);
case hwmon_temp:
return ltc2947_temp_is_visible(attr);
default:
return 0;
}
}
static const struct hwmon_channel_info * const ltc2947_info[] = {
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
HWMON_I_MAX | HWMON_I_MIN | HWMON_I_RESET_HISTORY |
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM |
HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
HWMON_I_MAX | HWMON_I_MIN | HWMON_I_RESET_HISTORY |
HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM |
HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LOWEST | HWMON_C_HIGHEST |
HWMON_C_MAX | HWMON_C_MIN | HWMON_C_RESET_HISTORY |
HWMON_C_MIN_ALARM | HWMON_C_MAX_ALARM |
HWMON_C_LABEL),
HWMON_CHANNEL_INFO(power,
HWMON_P_INPUT | HWMON_P_INPUT_LOWEST |
HWMON_P_INPUT_HIGHEST | HWMON_P_MAX | HWMON_P_MIN |
HWMON_P_RESET_HISTORY | HWMON_P_MAX_ALARM |
HWMON_P_MIN_ALARM | HWMON_P_LABEL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_LOWEST | HWMON_T_HIGHEST |
HWMON_T_MAX | HWMON_T_MIN | HWMON_T_RESET_HISTORY |
HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
HWMON_T_LABEL,
HWMON_T_MAX_ALARM | HWMON_T_MIN_ALARM | HWMON_T_MAX |
HWMON_T_MIN | HWMON_T_LABEL),
NULL
};
static const struct hwmon_ops ltc2947_hwmon_ops = {
.is_visible = ltc2947_is_visible,
.read = ltc2947_read,
.write = ltc2947_write,
.read_string = ltc2947_read_labels,
};
static const struct hwmon_chip_info ltc2947_chip_info = {
.ops = <c2947_hwmon_ops,
.info = ltc2947_info,
};
/* energy attributes are 6bytes wide so we need u64 */
static SENSOR_DEVICE_ATTR(energy1_input, 0444, ltc2947_show_value, NULL,
LTC2947_REG_ENERGY1);
static SENSOR_DEVICE_ATTR(energy2_input, 0444, ltc2947_show_value, NULL,
LTC2947_REG_ENERGY2);
static struct attribute *ltc2947_attrs[] = {
&sensor_dev_attr_energy1_input.dev_attr.attr,
&sensor_dev_attr_energy2_input.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(ltc2947);
static int ltc2947_setup(struct ltc2947_data *st)
{
int ret;
struct clk *extclk;
u32 dummy, deadband, pol;
u32 accum[2];
/* clear status register by reading it */
ret = regmap_read(st->map, LTC2947_REG_STATUS, &dummy);
if (ret)
return ret;
/*
* Set max/min for power here since the default values x scale
* would overflow on 32bit arch
*/
ret = ltc2947_val_write(st, LTC2947_REG_POWER_THRE_H, LTC2947_PAGE1, 2,
POWER_MAX / 200000);
if (ret)
return ret;
ret = ltc2947_val_write(st, LTC2947_REG_POWER_THRE_L, LTC2947_PAGE1, 2,
POWER_MIN / 200000);
if (ret)
return ret;
/* check external clock presence */
extclk = devm_clk_get_optional_enabled(st->dev, NULL);
if (IS_ERR(extclk))
return dev_err_probe(st->dev, PTR_ERR(extclk),
"Failed to get external clock\n");
if (extclk) {
unsigned long rate_hz;
u8 pre = 0, div, tbctl;
u64 aux;
/* let's calculate and set the right valus in TBCTL */
rate_hz = clk_get_rate(extclk);
if (rate_hz < LTC2947_CLK_MIN || rate_hz > LTC2947_CLK_MAX) {
dev_err(st->dev, "Invalid rate:%lu for external clock",
rate_hz);
return -EINVAL;
}
/* as in table 1 of the datasheet */
if (rate_hz >= LTC2947_CLK_MIN && rate_hz <= 1000000)
pre = 0;
else if (rate_hz > 1000000 && rate_hz <= 2000000)
pre = 1;
else if (rate_hz > 2000000 && rate_hz <= 4000000)
pre = 2;
else if (rate_hz > 4000000 && rate_hz <= 8000000)
pre = 3;
else if (rate_hz > 8000000 && rate_hz <= 16000000)
pre = 4;
else if (rate_hz > 16000000 && rate_hz <= LTC2947_CLK_MAX)
pre = 5;
/*
* Div is given by:
* floor(fref / (2^PRE * 32768))
*/
div = rate_hz / ((1 << pre) * 32768);
tbctl = LTC2947_PRE(pre) | LTC2947_DIV(div);
ret = regmap_write(st->map, LTC2947_REG_TBCTL, tbctl);
if (ret)
return ret;
/*
* The energy lsb is given by (in W*s):
* 06416 * (1/fref) * 2^PRE * (DIV + 1)
* The value is multiplied by 10E9
*/
aux = (div + 1) * ((1 << pre) * 641600000ULL);
st->lsb_energy = DIV_ROUND_CLOSEST_ULL(aux, rate_hz);
} else {
/* 19.89E-6 * 10E9 */
st->lsb_energy = 19890;
}
ret = of_property_read_u32_array(st->dev->of_node,
"adi,accumulator-ctl-pol", accum,
ARRAY_SIZE(accum));
if (!ret) {
u32 accum_reg = LTC2947_ACCUM_POL_1(accum[0]) |
LTC2947_ACCUM_POL_2(accum[1]);
ret = regmap_write(st->map, LTC2947_REG_ACCUM_POL, accum_reg);
if (ret)
return ret;
}
ret = of_property_read_u32(st->dev->of_node,
"adi,accumulation-deadband-microamp",
&deadband);
if (!ret) {
/* the LSB is the same as the current, so 3mA */
ret = regmap_write(st->map, LTC2947_REG_ACCUM_DEADBAND,
deadband / (1000 * 3));
if (ret)
return ret;
}
/* check gpio cfg */
ret = of_property_read_u32(st->dev->of_node, "adi,gpio-out-pol", &pol);
if (!ret) {
/* setup GPIO as output */
u32 gpio_ctl = LTC2947_GPIO_EN(1) | LTC2947_GPIO_FAN_EN(1) |
LTC2947_GPIO_FAN_POL(pol);
st->gpio_out = true;
ret = regmap_write(st->map, LTC2947_REG_GPIOSTATCTL, gpio_ctl);
if (ret)
return ret;
}
ret = of_property_read_u32_array(st->dev->of_node, "adi,gpio-in-accum",
accum, ARRAY_SIZE(accum));
if (!ret) {
/*
* Setup the accum options. The gpioctl is already defined as
* input by default.
*/
u32 accum_val = LTC2947_ACCUM_POL_1(accum[0]) |
LTC2947_ACCUM_POL_2(accum[1]);
if (st->gpio_out) {
dev_err(st->dev,
"Cannot have input gpio config if already configured as output");
return -EINVAL;
}
ret = regmap_write(st->map, LTC2947_REG_GPIO_ACCUM, accum_val);
if (ret)
return ret;
}
/* set continuos mode */
return regmap_update_bits(st->map, LTC2947_REG_CTRL,
LTC2947_CONT_MODE_MASK, LTC2947_CONT_MODE(1));
}
int ltc2947_core_probe(struct regmap *map, const char *name)
{
struct ltc2947_data *st;
struct device *dev = regmap_get_device(map);
struct device *hwmon;
int ret;
st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
st->map = map;
st->dev = dev;
dev_set_drvdata(dev, st);
mutex_init(&st->lock);
ret = ltc2947_setup(st);
if (ret)
return ret;
hwmon = devm_hwmon_device_register_with_info(dev, name, st,
<c2947_chip_info,
ltc2947_groups);
return PTR_ERR_OR_ZERO(hwmon);
}
EXPORT_SYMBOL_GPL(ltc2947_core_probe);
static int ltc2947_resume(struct device *dev)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
u32 ctrl = 0;
int ret;
/* dummy read to wake the device */
ret = regmap_read(st->map, LTC2947_REG_CTRL, &ctrl);
if (ret)
return ret;
/*
* Wait for the device. It takes 100ms to wake up so, 10ms extra
* should be enough.
*/
msleep(110);
ret = regmap_read(st->map, LTC2947_REG_CTRL, &ctrl);
if (ret)
return ret;
/* ctrl should be 0 */
if (ctrl != 0) {
dev_err(st->dev, "Device failed to wake up, ctl:%02X\n", ctrl);
return -ETIMEDOUT;
}
/* set continuous mode */
return regmap_update_bits(st->map, LTC2947_REG_CTRL,
LTC2947_CONT_MODE_MASK, LTC2947_CONT_MODE(1));
}
static int ltc2947_suspend(struct device *dev)
{
struct ltc2947_data *st = dev_get_drvdata(dev);
return regmap_update_bits(st->map, LTC2947_REG_CTRL,
LTC2947_SHUTDOWN_MASK, 1);
}
EXPORT_SIMPLE_DEV_PM_OPS(ltc2947_pm_ops, ltc2947_suspend, ltc2947_resume);
const struct of_device_id ltc2947_of_match[] = {
{ .compatible = "adi,ltc2947" },
{}
};
EXPORT_SYMBOL_GPL(ltc2947_of_match);
MODULE_DEVICE_TABLE(of, ltc2947_of_match);
MODULE_AUTHOR("Nuno Sa <[email protected]>");
MODULE_DESCRIPTION("LTC2947 power and energy monitor core driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ltc2947-core.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* nct7802 - Driver for Nuvoton NCT7802Y
*
* Copyright (C) 2014 Guenter Roeck <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#define DRVNAME "nct7802"
static const u8 REG_VOLTAGE[5] = { 0x09, 0x0a, 0x0c, 0x0d, 0x0e };
static const u8 REG_VOLTAGE_LIMIT_LSB[2][5] = {
{ 0x46, 0x00, 0x40, 0x42, 0x44 },
{ 0x45, 0x00, 0x3f, 0x41, 0x43 },
};
static const u8 REG_VOLTAGE_LIMIT_MSB[5] = { 0x48, 0x00, 0x47, 0x47, 0x48 };
static const u8 REG_VOLTAGE_LIMIT_MSB_SHIFT[2][5] = {
{ 0, 0, 4, 0, 4 },
{ 2, 0, 6, 2, 6 },
};
#define REG_BANK 0x00
#define REG_TEMP_LSB 0x05
#define REG_TEMP_PECI_LSB 0x08
#define REG_VOLTAGE_LOW 0x0f
#define REG_FANCOUNT_LOW 0x13
#define REG_START 0x21
#define REG_MODE 0x22 /* 7.2.32 Mode Selection Register */
#define REG_PECI_ENABLE 0x23
#define REG_FAN_ENABLE 0x24
#define REG_VMON_ENABLE 0x25
#define REG_PWM(x) (0x60 + (x))
#define REG_SMARTFAN_EN(x) (0x64 + (x) / 2)
#define SMARTFAN_EN_SHIFT(x) ((x) % 2 * 4)
#define REG_VENDOR_ID 0xfd
#define REG_CHIP_ID 0xfe
#define REG_VERSION_ID 0xff
/*
* Resistance temperature detector (RTD) modes according to 7.2.32 Mode
* Selection Register
*/
#define RTD_MODE_CURRENT 0x1
#define RTD_MODE_THERMISTOR 0x2
#define RTD_MODE_VOLTAGE 0x3
#define MODE_RTD_MASK 0x3
#define MODE_LTD_EN 0x40
/*
* Bit offset for sensors modes in REG_MODE.
* Valid for index 0..2, indicating RTD1..3.
*/
#define MODE_BIT_OFFSET_RTD(index) ((index) * 2)
/*
* Data structures and manipulation thereof
*/
struct nct7802_data {
struct regmap *regmap;
struct mutex access_lock; /* for multi-byte read and write operations */
u8 in_status;
struct mutex in_alarm_lock;
};
static ssize_t temp_type_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct nct7802_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
unsigned int mode;
int ret;
ret = regmap_read(data->regmap, REG_MODE, &mode);
if (ret < 0)
return ret;
return sprintf(buf, "%u\n", (mode >> (2 * sattr->index) & 3) + 2);
}
static ssize_t temp_type_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct nct7802_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
unsigned int type;
int err;
err = kstrtouint(buf, 0, &type);
if (err < 0)
return err;
if (sattr->index == 2 && type != 4) /* RD3 */
return -EINVAL;
if (type < 3 || type > 4)
return -EINVAL;
err = regmap_update_bits(data->regmap, REG_MODE,
3 << 2 * sattr->index, (type - 2) << 2 * sattr->index);
return err ? : count;
}
static ssize_t pwm_mode_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
unsigned int regval;
int ret;
if (sattr->index > 1)
return sprintf(buf, "1\n");
ret = regmap_read(data->regmap, 0x5E, ®val);
if (ret < 0)
return ret;
return sprintf(buf, "%u\n", !(regval & (1 << sattr->index)));
}
static ssize_t pwm_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct nct7802_data *data = dev_get_drvdata(dev);
unsigned int val;
int ret;
if (!attr->index)
return sprintf(buf, "255\n");
ret = regmap_read(data->regmap, attr->index, &val);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", val);
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct nct7802_data *data = dev_get_drvdata(dev);
int err;
u8 val;
err = kstrtou8(buf, 0, &val);
if (err < 0)
return err;
err = regmap_write(data->regmap, attr->index, val);
return err ? : count;
}
static ssize_t pwm_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct nct7802_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
unsigned int reg, enabled;
int ret;
ret = regmap_read(data->regmap, REG_SMARTFAN_EN(sattr->index), ®);
if (ret < 0)
return ret;
enabled = reg >> SMARTFAN_EN_SHIFT(sattr->index) & 1;
return sprintf(buf, "%u\n", enabled + 1);
}
static ssize_t pwm_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct7802_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
u8 val;
int ret;
ret = kstrtou8(buf, 0, &val);
if (ret < 0)
return ret;
if (val < 1 || val > 2)
return -EINVAL;
ret = regmap_update_bits(data->regmap, REG_SMARTFAN_EN(sattr->index),
1 << SMARTFAN_EN_SHIFT(sattr->index),
(val - 1) << SMARTFAN_EN_SHIFT(sattr->index));
return ret ? : count;
}
static int nct7802_read_temp(struct nct7802_data *data,
u8 reg_temp, u8 reg_temp_low, int *temp)
{
unsigned int t1, t2 = 0;
int err;
*temp = 0;
mutex_lock(&data->access_lock);
err = regmap_read(data->regmap, reg_temp, &t1);
if (err < 0)
goto abort;
t1 <<= 8;
if (reg_temp_low) { /* 11 bit data */
err = regmap_read(data->regmap, reg_temp_low, &t2);
if (err < 0)
goto abort;
}
t1 |= t2 & 0xe0;
*temp = (s16)t1 / 32 * 125;
abort:
mutex_unlock(&data->access_lock);
return err;
}
static int nct7802_read_fan(struct nct7802_data *data, u8 reg_fan)
{
unsigned int f1, f2;
int ret;
mutex_lock(&data->access_lock);
ret = regmap_read(data->regmap, reg_fan, &f1);
if (ret < 0)
goto abort;
ret = regmap_read(data->regmap, REG_FANCOUNT_LOW, &f2);
if (ret < 0)
goto abort;
ret = (f1 << 5) | (f2 >> 3);
/* convert fan count to rpm */
if (ret == 0x1fff) /* maximum value, assume fan is stopped */
ret = 0;
else if (ret)
ret = DIV_ROUND_CLOSEST(1350000U, ret);
abort:
mutex_unlock(&data->access_lock);
return ret;
}
static int nct7802_read_fan_min(struct nct7802_data *data, u8 reg_fan_low,
u8 reg_fan_high)
{
unsigned int f1, f2;
int ret;
mutex_lock(&data->access_lock);
ret = regmap_read(data->regmap, reg_fan_low, &f1);
if (ret < 0)
goto abort;
ret = regmap_read(data->regmap, reg_fan_high, &f2);
if (ret < 0)
goto abort;
ret = f1 | ((f2 & 0xf8) << 5);
/* convert fan count to rpm */
if (ret == 0x1fff) /* maximum value, assume no limit */
ret = 0;
else if (ret)
ret = DIV_ROUND_CLOSEST(1350000U, ret);
else
ret = 1350000U;
abort:
mutex_unlock(&data->access_lock);
return ret;
}
static int nct7802_write_fan_min(struct nct7802_data *data, u8 reg_fan_low,
u8 reg_fan_high, unsigned long limit)
{
int err;
if (limit)
limit = DIV_ROUND_CLOSEST(1350000U, limit);
else
limit = 0x1fff;
limit = clamp_val(limit, 0, 0x1fff);
mutex_lock(&data->access_lock);
err = regmap_write(data->regmap, reg_fan_low, limit & 0xff);
if (err < 0)
goto abort;
err = regmap_write(data->regmap, reg_fan_high, (limit & 0x1f00) >> 5);
abort:
mutex_unlock(&data->access_lock);
return err;
}
static u8 nct7802_vmul[] = { 4, 2, 2, 2, 2 };
static int nct7802_read_voltage(struct nct7802_data *data, int nr, int index)
{
unsigned int v1, v2;
int ret;
mutex_lock(&data->access_lock);
if (index == 0) { /* voltage */
ret = regmap_read(data->regmap, REG_VOLTAGE[nr], &v1);
if (ret < 0)
goto abort;
ret = regmap_read(data->regmap, REG_VOLTAGE_LOW, &v2);
if (ret < 0)
goto abort;
ret = ((v1 << 2) | (v2 >> 6)) * nct7802_vmul[nr];
} else { /* limit */
int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr];
ret = regmap_read(data->regmap,
REG_VOLTAGE_LIMIT_LSB[index - 1][nr], &v1);
if (ret < 0)
goto abort;
ret = regmap_read(data->regmap, REG_VOLTAGE_LIMIT_MSB[nr],
&v2);
if (ret < 0)
goto abort;
ret = (v1 | ((v2 << shift) & 0x300)) * nct7802_vmul[nr];
}
abort:
mutex_unlock(&data->access_lock);
return ret;
}
static int nct7802_write_voltage(struct nct7802_data *data, int nr, int index,
unsigned long voltage)
{
int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr];
int err;
voltage = clamp_val(voltage, 0, 0x3ff * nct7802_vmul[nr]);
voltage = DIV_ROUND_CLOSEST(voltage, nct7802_vmul[nr]);
mutex_lock(&data->access_lock);
err = regmap_write(data->regmap,
REG_VOLTAGE_LIMIT_LSB[index - 1][nr],
voltage & 0xff);
if (err < 0)
goto abort;
err = regmap_update_bits(data->regmap, REG_VOLTAGE_LIMIT_MSB[nr],
0x0300 >> shift, (voltage & 0x0300) >> shift);
abort:
mutex_unlock(&data->access_lock);
return err;
}
static ssize_t in_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
int voltage;
voltage = nct7802_read_voltage(data, sattr->nr, sattr->index);
if (voltage < 0)
return voltage;
return sprintf(buf, "%d\n", voltage);
}
static ssize_t in_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
int index = sattr->index;
int nr = sattr->nr;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
err = nct7802_write_voltage(data, nr, index, val);
return err ? : count;
}
static ssize_t in_alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
int volt, min, max, ret;
unsigned int val;
mutex_lock(&data->in_alarm_lock);
/*
* The SMI Voltage status register is the only register giving a status
* for voltages. A bit is set for each input crossing a threshold, in
* both direction, but the "inside" or "outside" limits info is not
* available. Also this register is cleared on read.
* Note: this is not explicitly spelled out in the datasheet, but
* from experiment.
* To deal with this we use a status cache with one validity bit and
* one status bit for each input. Validity is cleared at startup and
* each time the register reports a change, and the status is processed
* by software based on current input value and limits.
*/
ret = regmap_read(data->regmap, 0x1e, &val); /* SMI Voltage status */
if (ret < 0)
goto abort;
/* invalidate cached status for all inputs crossing a threshold */
data->in_status &= ~((val & 0x0f) << 4);
/* if cached status for requested input is invalid, update it */
if (!(data->in_status & (0x10 << sattr->index))) {
ret = nct7802_read_voltage(data, sattr->nr, 0);
if (ret < 0)
goto abort;
volt = ret;
ret = nct7802_read_voltage(data, sattr->nr, 1);
if (ret < 0)
goto abort;
min = ret;
ret = nct7802_read_voltage(data, sattr->nr, 2);
if (ret < 0)
goto abort;
max = ret;
if (volt < min || volt > max)
data->in_status |= (1 << sattr->index);
else
data->in_status &= ~(1 << sattr->index);
data->in_status |= 0x10 << sattr->index;
}
ret = sprintf(buf, "%u\n", !!(data->in_status & (1 << sattr->index)));
abort:
mutex_unlock(&data->in_alarm_lock);
return ret;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct nct7802_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int err, temp;
err = nct7802_read_temp(data, sattr->nr, sattr->index, &temp);
if (err < 0)
return err;
return sprintf(buf, "%d\n", temp);
}
static ssize_t temp_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
int nr = sattr->nr;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
val = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);
err = regmap_write(data->regmap, nr, val & 0xff);
return err ? : count;
}
static ssize_t fan_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
int speed;
speed = nct7802_read_fan(data, sattr->index);
if (speed < 0)
return speed;
return sprintf(buf, "%d\n", speed);
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
int speed;
speed = nct7802_read_fan_min(data, sattr->nr, sattr->index);
if (speed < 0)
return speed;
return sprintf(buf, "%d\n", speed);
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
err = nct7802_write_fan_min(data, sattr->nr, sattr->index, val);
return err ? : count;
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct nct7802_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int bit = sattr->index;
unsigned int val;
int ret;
ret = regmap_read(data->regmap, sattr->nr, &val);
if (ret < 0)
return ret;
return sprintf(buf, "%u\n", !!(val & (1 << bit)));
}
static ssize_t
beep_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
err = regmap_read(data->regmap, sattr->nr, ®val);
if (err)
return err;
return sprintf(buf, "%u\n", !!(regval & (1 << sattr->index)));
}
static ssize_t
beep_store(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct7802_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > 1)
return -EINVAL;
err = regmap_update_bits(data->regmap, sattr->nr, 1 << sattr->index,
val ? 1 << sattr->index : 0);
return err ? : count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_type, temp_type, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, 0x01, REG_TEMP_LSB);
static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, 0x31, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, 0x30, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, 0x3a, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_type, temp_type, 1);
static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, 0x02, REG_TEMP_LSB);
static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, 0x33, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, 0x32, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, 0x3b, 0);
static SENSOR_DEVICE_ATTR_RW(temp3_type, temp_type, 2);
static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, 0x03, REG_TEMP_LSB);
static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, 0x35, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, 0x34, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, 0x3c, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp4_input, temp, 0x04, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp4_min, temp, 0x37, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp4_max, temp, 0x36, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp4_crit, temp, 0x3d, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp5_input, temp, 0x06, REG_TEMP_PECI_LSB);
static SENSOR_DEVICE_ATTR_2_RW(temp5_min, temp, 0x39, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp5_max, temp, 0x38, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp5_crit, temp, 0x3e, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp6_input, temp, 0x07, REG_TEMP_PECI_LSB);
static SENSOR_DEVICE_ATTR_2_RO(temp1_min_alarm, alarm, 0x18, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp2_min_alarm, alarm, 0x18, 1);
static SENSOR_DEVICE_ATTR_2_RO(temp3_min_alarm, alarm, 0x18, 2);
static SENSOR_DEVICE_ATTR_2_RO(temp4_min_alarm, alarm, 0x18, 3);
static SENSOR_DEVICE_ATTR_2_RO(temp5_min_alarm, alarm, 0x18, 4);
static SENSOR_DEVICE_ATTR_2_RO(temp1_max_alarm, alarm, 0x19, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp2_max_alarm, alarm, 0x19, 1);
static SENSOR_DEVICE_ATTR_2_RO(temp3_max_alarm, alarm, 0x19, 2);
static SENSOR_DEVICE_ATTR_2_RO(temp4_max_alarm, alarm, 0x19, 3);
static SENSOR_DEVICE_ATTR_2_RO(temp5_max_alarm, alarm, 0x19, 4);
static SENSOR_DEVICE_ATTR_2_RO(temp1_crit_alarm, alarm, 0x1b, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp2_crit_alarm, alarm, 0x1b, 1);
static SENSOR_DEVICE_ATTR_2_RO(temp3_crit_alarm, alarm, 0x1b, 2);
static SENSOR_DEVICE_ATTR_2_RO(temp4_crit_alarm, alarm, 0x1b, 3);
static SENSOR_DEVICE_ATTR_2_RO(temp5_crit_alarm, alarm, 0x1b, 4);
static SENSOR_DEVICE_ATTR_2_RO(temp1_fault, alarm, 0x17, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp2_fault, alarm, 0x17, 1);
static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, alarm, 0x17, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp1_beep, beep, 0x5c, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp2_beep, beep, 0x5c, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp3_beep, beep, 0x5c, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp4_beep, beep, 0x5c, 3);
static SENSOR_DEVICE_ATTR_2_RW(temp5_beep, beep, 0x5c, 4);
static SENSOR_DEVICE_ATTR_2_RW(temp6_beep, beep, 0x5c, 5);
static struct attribute *nct7802_temp_attrs[] = {
&sensor_dev_attr_temp1_type.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
&sensor_dev_attr_temp1_beep.dev_attr.attr,
&sensor_dev_attr_temp2_type.dev_attr.attr, /* 10 */
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp2_beep.dev_attr.attr,
&sensor_dev_attr_temp3_type.dev_attr.attr, /* 20 */
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_crit.dev_attr.attr,
&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_temp3_beep.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr, /* 30 */
&sensor_dev_attr_temp4_min.dev_attr.attr,
&sensor_dev_attr_temp4_max.dev_attr.attr,
&sensor_dev_attr_temp4_crit.dev_attr.attr,
&sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_beep.dev_attr.attr,
&sensor_dev_attr_temp5_input.dev_attr.attr, /* 38 */
&sensor_dev_attr_temp5_min.dev_attr.attr,
&sensor_dev_attr_temp5_max.dev_attr.attr,
&sensor_dev_attr_temp5_crit.dev_attr.attr,
&sensor_dev_attr_temp5_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_beep.dev_attr.attr,
&sensor_dev_attr_temp6_input.dev_attr.attr, /* 46 */
&sensor_dev_attr_temp6_beep.dev_attr.attr,
NULL
};
static umode_t nct7802_temp_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct7802_data *data = dev_get_drvdata(dev);
unsigned int reg;
int err;
err = regmap_read(data->regmap, REG_MODE, ®);
if (err < 0)
return 0;
if (index < 10 &&
(reg & 03) != 0x01 && (reg & 0x03) != 0x02) /* RD1 */
return 0;
if (index >= 10 && index < 20 &&
(reg & 0x0c) != 0x04 && (reg & 0x0c) != 0x08) /* RD2 */
return 0;
if (index >= 20 && index < 30 && (reg & 0x30) != 0x20) /* RD3 */
return 0;
if (index >= 30 && index < 38) /* local */
return attr->mode;
err = regmap_read(data->regmap, REG_PECI_ENABLE, ®);
if (err < 0)
return 0;
if (index >= 38 && index < 46 && !(reg & 0x01)) /* PECI 0 */
return 0;
if (index >= 46 && !(reg & 0x02)) /* PECI 1 */
return 0;
return attr->mode;
}
static const struct attribute_group nct7802_temp_group = {
.attrs = nct7802_temp_attrs,
.is_visible = nct7802_temp_is_visible,
};
static SENSOR_DEVICE_ATTR_2_RO(in0_input, in, 0, 0);
static SENSOR_DEVICE_ATTR_2_RW(in0_min, in, 0, 1);
static SENSOR_DEVICE_ATTR_2_RW(in0_max, in, 0, 2);
static SENSOR_DEVICE_ATTR_2_RO(in0_alarm, in_alarm, 0, 3);
static SENSOR_DEVICE_ATTR_2_RW(in0_beep, beep, 0x5a, 3);
static SENSOR_DEVICE_ATTR_2_RO(in1_input, in, 1, 0);
static SENSOR_DEVICE_ATTR_2_RO(in2_input, in, 2, 0);
static SENSOR_DEVICE_ATTR_2_RW(in2_min, in, 2, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_max, in, 2, 2);
static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, in_alarm, 2, 0);
static SENSOR_DEVICE_ATTR_2_RW(in2_beep, beep, 0x5a, 0);
static SENSOR_DEVICE_ATTR_2_RO(in3_input, in, 3, 0);
static SENSOR_DEVICE_ATTR_2_RW(in3_min, in, 3, 1);
static SENSOR_DEVICE_ATTR_2_RW(in3_max, in, 3, 2);
static SENSOR_DEVICE_ATTR_2_RO(in3_alarm, in_alarm, 3, 1);
static SENSOR_DEVICE_ATTR_2_RW(in3_beep, beep, 0x5a, 1);
static SENSOR_DEVICE_ATTR_2_RO(in4_input, in, 4, 0);
static SENSOR_DEVICE_ATTR_2_RW(in4_min, in, 4, 1);
static SENSOR_DEVICE_ATTR_2_RW(in4_max, in, 4, 2);
static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, in_alarm, 4, 2);
static SENSOR_DEVICE_ATTR_2_RW(in4_beep, beep, 0x5a, 2);
static struct attribute *nct7802_in_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in0_beep.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr, /* 5 */
&sensor_dev_attr_in2_input.dev_attr.attr, /* 6 */
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in2_beep.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr, /* 11 */
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in3_beep.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr, /* 16 */
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in4_beep.dev_attr.attr,
NULL,
};
static umode_t nct7802_in_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct7802_data *data = dev_get_drvdata(dev);
unsigned int reg;
int err;
if (index < 6) /* VCC, VCORE */
return attr->mode;
err = regmap_read(data->regmap, REG_MODE, ®);
if (err < 0)
return 0;
if (index >= 6 && index < 11 && (reg & 0x03) != 0x03) /* VSEN1 */
return 0;
if (index >= 11 && index < 16 && (reg & 0x0c) != 0x0c) /* VSEN2 */
return 0;
if (index >= 16 && (reg & 0x30) != 0x30) /* VSEN3 */
return 0;
return attr->mode;
}
static const struct attribute_group nct7802_in_group = {
.attrs = nct7802_in_attrs,
.is_visible = nct7802_in_is_visible,
};
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0x10);
static SENSOR_DEVICE_ATTR_2_RW(fan1_min, fan_min, 0x49, 0x4c);
static SENSOR_DEVICE_ATTR_2_RO(fan1_alarm, alarm, 0x1a, 0);
static SENSOR_DEVICE_ATTR_2_RW(fan1_beep, beep, 0x5b, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 0x11);
static SENSOR_DEVICE_ATTR_2_RW(fan2_min, fan_min, 0x4a, 0x4d);
static SENSOR_DEVICE_ATTR_2_RO(fan2_alarm, alarm, 0x1a, 1);
static SENSOR_DEVICE_ATTR_2_RW(fan2_beep, beep, 0x5b, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan, 0x12);
static SENSOR_DEVICE_ATTR_2_RW(fan3_min, fan_min, 0x4b, 0x4e);
static SENSOR_DEVICE_ATTR_2_RO(fan3_alarm, alarm, 0x1a, 2);
static SENSOR_DEVICE_ATTR_2_RW(fan3_beep, beep, 0x5b, 2);
/* 7.2.89 Fan Control Output Type */
static SENSOR_DEVICE_ATTR_RO(pwm1_mode, pwm_mode, 0);
static SENSOR_DEVICE_ATTR_RO(pwm2_mode, pwm_mode, 1);
static SENSOR_DEVICE_ATTR_RO(pwm3_mode, pwm_mode, 2);
/* 7.2.91... Fan Control Output Value */
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, REG_PWM(0));
static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, REG_PWM(1));
static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, REG_PWM(2));
/* 7.2.95... Temperature to Fan mapping Relationships Register */
static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
static struct attribute *nct7802_fan_attrs[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_beep.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_beep.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_beep.dev_attr.attr,
NULL
};
static umode_t nct7802_fan_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct7802_data *data = dev_get_drvdata(dev);
int fan = index / 4; /* 4 attributes per fan */
unsigned int reg;
int err;
err = regmap_read(data->regmap, REG_FAN_ENABLE, ®);
if (err < 0 || !(reg & (1 << fan)))
return 0;
return attr->mode;
}
static const struct attribute_group nct7802_fan_group = {
.attrs = nct7802_fan_attrs,
.is_visible = nct7802_fan_is_visible,
};
static struct attribute *nct7802_pwm_attrs[] = {
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_mode.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_mode.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_mode.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
NULL
};
static const struct attribute_group nct7802_pwm_group = {
.attrs = nct7802_pwm_attrs,
};
/* 7.2.115... 0x80-0x83, 0x84 Temperature (X-axis) transition */
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point1_temp, temp, 0x80, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point2_temp, temp, 0x81, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point3_temp, temp, 0x82, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point4_temp, temp, 0x83, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point5_temp, temp, 0x84, 0);
/* 7.2.120... 0x85-0x88 PWM (Y-axis) transition */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_pwm, pwm, 0x85);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_pwm, pwm, 0x86);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_pwm, pwm, 0x87);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_pwm, pwm, 0x88);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point5_pwm, pwm, 0);
/* 7.2.124 Table 2 X-axis Transition Point 1 Register */
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point1_temp, temp, 0x90, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point2_temp, temp, 0x91, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point3_temp, temp, 0x92, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point4_temp, temp, 0x93, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point5_temp, temp, 0x94, 0);
/* 7.2.129 Table 2 Y-axis Transition Point 1 Register */
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_point1_pwm, pwm, 0x95);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_point2_pwm, pwm, 0x96);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_point3_pwm, pwm, 0x97);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_point4_pwm, pwm, 0x98);
static SENSOR_DEVICE_ATTR_RO(pwm2_auto_point5_pwm, pwm, 0);
/* 7.2.133 Table 3 X-axis Transition Point 1 Register */
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point1_temp, temp, 0xA0, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point2_temp, temp, 0xA1, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point3_temp, temp, 0xA2, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point4_temp, temp, 0xA3, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point5_temp, temp, 0xA4, 0);
/* 7.2.138 Table 3 Y-axis Transition Point 1 Register */
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_point1_pwm, pwm, 0xA5);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_point2_pwm, pwm, 0xA6);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_point3_pwm, pwm, 0xA7);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_point4_pwm, pwm, 0xA8);
static SENSOR_DEVICE_ATTR_RO(pwm3_auto_point5_pwm, pwm, 0);
static struct attribute *nct7802_auto_point_attrs[] = {
&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point5_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point5_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point5_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point5_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point5_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point5_pwm.dev_attr.attr,
NULL
};
static const struct attribute_group nct7802_auto_point_group = {
.attrs = nct7802_auto_point_attrs,
};
static const struct attribute_group *nct7802_groups[] = {
&nct7802_temp_group,
&nct7802_in_group,
&nct7802_fan_group,
&nct7802_pwm_group,
&nct7802_auto_point_group,
NULL
};
static int nct7802_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
int reg;
/*
* Chip identification registers are only available in bank 0,
* so only attempt chip detection if bank 0 is selected
*/
reg = i2c_smbus_read_byte_data(client, REG_BANK);
if (reg != 0x00)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, REG_VENDOR_ID);
if (reg != 0x50)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, REG_CHIP_ID);
if (reg != 0xc3)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, REG_VERSION_ID);
if (reg < 0 || (reg & 0xf0) != 0x20)
return -ENODEV;
/* Also validate lower bits of voltage and temperature registers */
reg = i2c_smbus_read_byte_data(client, REG_TEMP_LSB);
if (reg < 0 || (reg & 0x1f))
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, REG_TEMP_PECI_LSB);
if (reg < 0 || (reg & 0x3f))
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, REG_VOLTAGE_LOW);
if (reg < 0 || (reg & 0x3f))
return -ENODEV;
strscpy(info->type, "nct7802", I2C_NAME_SIZE);
return 0;
}
static bool nct7802_regmap_is_volatile(struct device *dev, unsigned int reg)
{
return (reg != REG_BANK && reg <= 0x20) ||
(reg >= REG_PWM(0) && reg <= REG_PWM(2));
}
static const struct regmap_config nct7802_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = nct7802_regmap_is_volatile,
};
static int nct7802_get_channel_config(struct device *dev,
struct device_node *node, u8 *mode_mask,
u8 *mode_val)
{
u32 reg;
const char *type_str, *md_str;
u8 md;
if (!node->name || of_node_cmp(node->name, "channel"))
return 0;
if (of_property_read_u32(node, "reg", ®)) {
dev_err(dev, "Could not read reg value for '%s'\n",
node->full_name);
return -EINVAL;
}
if (reg > 3) {
dev_err(dev, "Invalid reg (%u) in '%s'\n", reg,
node->full_name);
return -EINVAL;
}
if (reg == 0) {
if (!of_device_is_available(node))
*mode_val &= ~MODE_LTD_EN;
else
*mode_val |= MODE_LTD_EN;
*mode_mask |= MODE_LTD_EN;
return 0;
}
/* At this point we have reg >= 1 && reg <= 3 */
if (!of_device_is_available(node)) {
*mode_val &= ~(MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1));
*mode_mask |= MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1);
return 0;
}
if (of_property_read_string(node, "sensor-type", &type_str)) {
dev_err(dev, "No type for '%s'\n", node->full_name);
return -EINVAL;
}
if (!strcmp(type_str, "voltage")) {
*mode_val |= (RTD_MODE_VOLTAGE & MODE_RTD_MASK)
<< MODE_BIT_OFFSET_RTD(reg - 1);
*mode_mask |= MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1);
return 0;
}
if (strcmp(type_str, "temperature")) {
dev_err(dev, "Invalid type '%s' for '%s'\n", type_str,
node->full_name);
return -EINVAL;
}
if (reg == 3) {
/* RTD3 only supports thermistor mode */
md = RTD_MODE_THERMISTOR;
} else {
if (of_property_read_string(node, "temperature-mode",
&md_str)) {
dev_err(dev, "No mode for '%s'\n", node->full_name);
return -EINVAL;
}
if (!strcmp(md_str, "thermal-diode"))
md = RTD_MODE_CURRENT;
else if (!strcmp(md_str, "thermistor"))
md = RTD_MODE_THERMISTOR;
else {
dev_err(dev, "Invalid mode '%s' for '%s'\n", md_str,
node->full_name);
return -EINVAL;
}
}
*mode_val |= (md & MODE_RTD_MASK) << MODE_BIT_OFFSET_RTD(reg - 1);
*mode_mask |= MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1);
return 0;
}
static int nct7802_configure_channels(struct device *dev,
struct nct7802_data *data)
{
/* Enable local temperature sensor by default */
u8 mode_mask = MODE_LTD_EN, mode_val = MODE_LTD_EN;
struct device_node *node;
int err;
if (dev->of_node) {
for_each_child_of_node(dev->of_node, node) {
err = nct7802_get_channel_config(dev, node, &mode_mask,
&mode_val);
if (err) {
of_node_put(node);
return err;
}
}
}
return regmap_update_bits(data->regmap, REG_MODE, mode_mask, mode_val);
}
static int nct7802_init_chip(struct device *dev, struct nct7802_data *data)
{
int err;
/* Enable ADC */
err = regmap_update_bits(data->regmap, REG_START, 0x01, 0x01);
if (err)
return err;
err = nct7802_configure_channels(dev, data);
if (err)
return err;
/* Enable Vcore and VCC voltage monitoring */
return regmap_update_bits(data->regmap, REG_VMON_ENABLE, 0x03, 0x03);
}
static int nct7802_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct nct7802_data *data;
struct device *hwmon_dev;
int ret;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
data->regmap = devm_regmap_init_i2c(client, &nct7802_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
mutex_init(&data->access_lock);
mutex_init(&data->in_alarm_lock);
ret = nct7802_init_chip(dev, data);
if (ret < 0)
return ret;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
nct7802_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const unsigned short nct7802_address_list[] = {
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
};
static const struct i2c_device_id nct7802_idtable[] = {
{ "nct7802", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, nct7802_idtable);
static struct i2c_driver nct7802_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = DRVNAME,
},
.detect = nct7802_detect,
.probe = nct7802_probe,
.id_table = nct7802_idtable,
.address_list = nct7802_address_list,
};
module_i2c_driver(nct7802_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("NCT7802Y Hardware Monitoring Driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/nct7802.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Maxim MAX197 A/D Converter driver
*
* Copyright (c) 2012 Savoir-faire Linux Inc.
* Vivien Didelot <[email protected]>
*
* For further information, see the Documentation/hwmon/max197.rst file.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/sysfs.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/platform_device.h>
#include <linux/platform_data/max197.h>
#define MAX199_LIMIT 4000 /* 4V */
#define MAX197_LIMIT 10000 /* 10V */
#define MAX197_NUM_CH 8 /* 8 Analog Input Channels */
/* Control byte format */
#define MAX197_BIP (1 << 3) /* Bipolarity */
#define MAX197_RNG (1 << 4) /* Full range */
#define MAX197_SCALE 12207 /* Scale coefficient for raw data */
/* List of supported chips */
enum max197_chips { max197, max199 };
/**
* struct max197_data - device instance specific data
* @pdata: Platform data.
* @hwmon_dev: The hwmon device.
* @lock: Read/Write mutex.
* @limit: Max range value (10V for MAX197, 4V for MAX199).
* @scale: Need to scale.
* @ctrl_bytes: Channels control byte.
*/
struct max197_data {
struct max197_platform_data *pdata;
struct device *hwmon_dev;
struct mutex lock;
int limit;
bool scale;
u8 ctrl_bytes[MAX197_NUM_CH];
};
static inline void max197_set_unipolarity(struct max197_data *data, int channel)
{
data->ctrl_bytes[channel] &= ~MAX197_BIP;
}
static inline void max197_set_bipolarity(struct max197_data *data, int channel)
{
data->ctrl_bytes[channel] |= MAX197_BIP;
}
static inline void max197_set_half_range(struct max197_data *data, int channel)
{
data->ctrl_bytes[channel] &= ~MAX197_RNG;
}
static inline void max197_set_full_range(struct max197_data *data, int channel)
{
data->ctrl_bytes[channel] |= MAX197_RNG;
}
static inline bool max197_is_bipolar(struct max197_data *data, int channel)
{
return data->ctrl_bytes[channel] & MAX197_BIP;
}
static inline bool max197_is_full_range(struct max197_data *data, int channel)
{
return data->ctrl_bytes[channel] & MAX197_RNG;
}
/* Function called on read access on in{0,1,2,3,4,5,6,7}_{min,max} */
static ssize_t max197_show_range(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct max197_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
int channel = attr->index;
bool is_min = attr->nr;
int range;
if (mutex_lock_interruptible(&data->lock))
return -ERESTARTSYS;
range = max197_is_full_range(data, channel) ?
data->limit : data->limit / 2;
if (is_min) {
if (max197_is_bipolar(data, channel))
range = -range;
else
range = 0;
}
mutex_unlock(&data->lock);
return sprintf(buf, "%d\n", range);
}
/* Function called on write access on in{0,1,2,3,4,5,6,7}_{min,max} */
static ssize_t max197_store_range(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct max197_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
int channel = attr->index;
bool is_min = attr->nr;
long value;
int half = data->limit / 2;
int full = data->limit;
if (kstrtol(buf, 10, &value))
return -EINVAL;
if (is_min) {
if (value <= -full)
value = -full;
else if (value < 0)
value = -half;
else
value = 0;
} else {
if (value >= full)
value = full;
else
value = half;
}
if (mutex_lock_interruptible(&data->lock))
return -ERESTARTSYS;
if (value == 0) {
/* We can deduce only the polarity */
max197_set_unipolarity(data, channel);
} else if (value == -half) {
max197_set_bipolarity(data, channel);
max197_set_half_range(data, channel);
} else if (value == -full) {
max197_set_bipolarity(data, channel);
max197_set_full_range(data, channel);
} else if (value == half) {
/* We can deduce only the range */
max197_set_half_range(data, channel);
} else if (value == full) {
/* We can deduce only the range */
max197_set_full_range(data, channel);
}
mutex_unlock(&data->lock);
return count;
}
/* Function called on read access on in{0,1,2,3,4,5,6,7}_input */
static ssize_t max197_show_input(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct max197_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int channel = attr->index;
s32 value;
int ret;
if (mutex_lock_interruptible(&data->lock))
return -ERESTARTSYS;
ret = data->pdata->convert(data->ctrl_bytes[channel]);
if (ret < 0) {
dev_err(dev, "conversion failed\n");
goto unlock;
}
value = ret;
/*
* Coefficient to apply on raw value.
* See Table 1. Full Scale and Zero Scale in the MAX197 datasheet.
*/
if (data->scale) {
value *= MAX197_SCALE;
if (max197_is_full_range(data, channel))
value *= 2;
value /= 10000;
}
ret = sprintf(buf, "%d\n", value);
unlock:
mutex_unlock(&data->lock);
return ret;
}
static ssize_t name_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct platform_device *pdev = to_platform_device(dev);
return sprintf(buf, "%s\n", pdev->name);
}
#define MAX197_SENSOR_DEVICE_ATTR_CH(chan) \
static SENSOR_DEVICE_ATTR(in##chan##_input, S_IRUGO, \
max197_show_input, NULL, chan); \
static SENSOR_DEVICE_ATTR_2(in##chan##_min, S_IRUGO | S_IWUSR, \
max197_show_range, \
max197_store_range, \
true, chan); \
static SENSOR_DEVICE_ATTR_2(in##chan##_max, S_IRUGO | S_IWUSR, \
max197_show_range, \
max197_store_range, \
false, chan)
#define MAX197_SENSOR_DEV_ATTR_IN(chan) \
&sensor_dev_attr_in##chan##_input.dev_attr.attr, \
&sensor_dev_attr_in##chan##_max.dev_attr.attr, \
&sensor_dev_attr_in##chan##_min.dev_attr.attr
static DEVICE_ATTR_RO(name);
MAX197_SENSOR_DEVICE_ATTR_CH(0);
MAX197_SENSOR_DEVICE_ATTR_CH(1);
MAX197_SENSOR_DEVICE_ATTR_CH(2);
MAX197_SENSOR_DEVICE_ATTR_CH(3);
MAX197_SENSOR_DEVICE_ATTR_CH(4);
MAX197_SENSOR_DEVICE_ATTR_CH(5);
MAX197_SENSOR_DEVICE_ATTR_CH(6);
MAX197_SENSOR_DEVICE_ATTR_CH(7);
static const struct attribute_group max197_sysfs_group = {
.attrs = (struct attribute *[]) {
&dev_attr_name.attr,
MAX197_SENSOR_DEV_ATTR_IN(0),
MAX197_SENSOR_DEV_ATTR_IN(1),
MAX197_SENSOR_DEV_ATTR_IN(2),
MAX197_SENSOR_DEV_ATTR_IN(3),
MAX197_SENSOR_DEV_ATTR_IN(4),
MAX197_SENSOR_DEV_ATTR_IN(5),
MAX197_SENSOR_DEV_ATTR_IN(6),
MAX197_SENSOR_DEV_ATTR_IN(7),
NULL
},
};
static int max197_probe(struct platform_device *pdev)
{
int ch, ret;
struct max197_data *data;
struct max197_platform_data *pdata = dev_get_platdata(&pdev->dev);
enum max197_chips chip = platform_get_device_id(pdev)->driver_data;
if (pdata == NULL) {
dev_err(&pdev->dev, "no platform data supplied\n");
return -EINVAL;
}
if (pdata->convert == NULL) {
dev_err(&pdev->dev, "no convert function supplied\n");
return -EINVAL;
}
data = devm_kzalloc(&pdev->dev, sizeof(struct max197_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->pdata = pdata;
mutex_init(&data->lock);
if (chip == max197) {
data->limit = MAX197_LIMIT;
data->scale = true;
} else {
data->limit = MAX199_LIMIT;
data->scale = false;
}
for (ch = 0; ch < MAX197_NUM_CH; ch++)
data->ctrl_bytes[ch] = (u8) ch;
platform_set_drvdata(pdev, data);
ret = sysfs_create_group(&pdev->dev.kobj, &max197_sysfs_group);
if (ret) {
dev_err(&pdev->dev, "sysfs create group failed\n");
return ret;
}
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
ret = PTR_ERR(data->hwmon_dev);
dev_err(&pdev->dev, "hwmon device register failed\n");
goto error;
}
return 0;
error:
sysfs_remove_group(&pdev->dev.kobj, &max197_sysfs_group);
return ret;
}
static int max197_remove(struct platform_device *pdev)
{
struct max197_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &max197_sysfs_group);
return 0;
}
static const struct platform_device_id max197_device_ids[] = {
{ "max197", max197 },
{ "max199", max199 },
{ }
};
MODULE_DEVICE_TABLE(platform, max197_device_ids);
static struct platform_driver max197_driver = {
.driver = {
.name = "max197",
},
.probe = max197_probe,
.remove = max197_remove,
.id_table = max197_device_ids,
};
module_platform_driver(max197_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Savoir-faire Linux Inc. <[email protected]>");
MODULE_DESCRIPTION("Maxim MAX197 A/D Converter driver");
|
linux-master
|
drivers/hwmon/max197.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
* chips integrated hardware monitoring features
* Copyright (C) 2005-2006 Jean Delvare <[email protected]>
*
* The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
* complete hardware monitoring features: voltage, fan and temperature
* sensors, and manual and automatic fan speed control.
*
* The F71872F/FG is almost the same, with two more voltages monitored,
* and 6 VID inputs.
*
* The F71806F/FG is essentially the same as the F71872F/FG. It even has
* the same chip ID, so the driver can't differentiate between.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/ioport.h>
#include <linux/acpi.h>
#include <linux/io.h>
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static struct platform_device *pdev;
#define DRVNAME "f71805f"
enum kinds { f71805f, f71872f };
/*
* Super-I/O constants and functions
*/
#define F71805F_LD_HWM 0x04
#define SIO_REG_LDSEL 0x07 /* Logical device select */
#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
#define SIO_REG_DEVREV 0x22 /* Device revision */
#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
#define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
#define SIO_REG_ENABLE 0x30 /* Logical device enable */
#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
#define SIO_FINTEK_ID 0x1934
#define SIO_F71805F_ID 0x0406
#define SIO_F71872F_ID 0x0341
static inline int
superio_inb(int base, int reg)
{
outb(reg, base);
return inb(base + 1);
}
static int
superio_inw(int base, int reg)
{
int val;
outb(reg++, base);
val = inb(base + 1) << 8;
outb(reg, base);
val |= inb(base + 1);
return val;
}
static inline void
superio_select(int base, int ld)
{
outb(SIO_REG_LDSEL, base);
outb(ld, base + 1);
}
static inline int
superio_enter(int base)
{
if (!request_muxed_region(base, 2, DRVNAME))
return -EBUSY;
outb(0x87, base);
outb(0x87, base);
return 0;
}
static inline void
superio_exit(int base)
{
outb(0xaa, base);
release_region(base, 2);
}
/*
* ISA constants
*/
#define REGION_LENGTH 8
#define ADDR_REG_OFFSET 5
#define DATA_REG_OFFSET 6
/*
* Registers
*/
/* in nr from 0 to 10 (8-bit values) */
#define F71805F_REG_IN(nr) (0x10 + (nr))
#define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
#define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
/* fan nr from 0 to 2 (12-bit values, two registers) */
#define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
#define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
#define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
#define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
#define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
#define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
/* temp nr from 0 to 2 (8-bit values) */
#define F71805F_REG_TEMP(nr) (0x1B + (nr))
#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
#define F71805F_REG_TEMP_MODE 0x01
/* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
/* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
#define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
(0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
#define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
(0xA4 + 0x10 * (pwmnr) + \
2 * (2 - (apnr)))
#define F71805F_REG_START 0x00
/* status nr from 0 to 2 */
#define F71805F_REG_STATUS(nr) (0x36 + (nr))
/* individual register bits */
#define FAN_CTRL_DC_MODE 0x10
#define FAN_CTRL_LATCH_FULL 0x08
#define FAN_CTRL_MODE_MASK 0x03
#define FAN_CTRL_MODE_SPEED 0x00
#define FAN_CTRL_MODE_TEMPERATURE 0x01
#define FAN_CTRL_MODE_MANUAL 0x02
/*
* Data structures and manipulation thereof
*/
struct f71805f_auto_point {
u8 temp[3];
u16 fan[3];
};
struct f71805f_data {
unsigned short addr;
const char *name;
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
unsigned long last_limits; /* In jiffies */
/* Register values */
u8 in[11];
u8 in_high[11];
u8 in_low[11];
u16 has_in;
u16 fan[3];
u16 fan_low[3];
u16 fan_target[3];
u8 fan_ctrl[3];
u8 pwm[3];
u8 pwm_freq[3];
u8 temp[3];
u8 temp_high[3];
u8 temp_hyst[3];
u8 temp_mode;
unsigned long alarms;
struct f71805f_auto_point auto_points[3];
};
struct f71805f_sio_data {
enum kinds kind;
u8 fnsel1;
};
static inline long in_from_reg(u8 reg)
{
return reg * 8;
}
/* The 2 least significant bits are not used */
static inline u8 in_to_reg(long val)
{
if (val <= 0)
return 0;
if (val >= 2016)
return 0xfc;
return ((val + 16) / 32) << 2;
}
/* in0 is downscaled by a factor 2 internally */
static inline long in0_from_reg(u8 reg)
{
return reg * 16;
}
static inline u8 in0_to_reg(long val)
{
if (val <= 0)
return 0;
if (val >= 4032)
return 0xfc;
return ((val + 32) / 64) << 2;
}
/* The 4 most significant bits are not used */
static inline long fan_from_reg(u16 reg)
{
reg &= 0xfff;
if (!reg || reg == 0xfff)
return 0;
return 1500000 / reg;
}
static inline u16 fan_to_reg(long rpm)
{
/*
* If the low limit is set below what the chip can measure,
* store the largest possible 12-bit value in the registers,
* so that no alarm will ever trigger.
*/
if (rpm < 367)
return 0xfff;
return 1500000 / rpm;
}
static inline unsigned long pwm_freq_from_reg(u8 reg)
{
unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
reg &= 0x7f;
if (reg == 0)
reg++;
return clock / (reg << 8);
}
static inline u8 pwm_freq_to_reg(unsigned long val)
{
if (val >= 187500) /* The highest we can do */
return 0x80;
if (val >= 1475) /* Use 48 MHz clock */
return 0x80 | (48000000UL / (val << 8));
if (val < 31) /* The lowest we can do */
return 0x7f;
else /* Use 1 MHz clock */
return 1000000UL / (val << 8);
}
static inline int pwm_mode_from_reg(u8 reg)
{
return !(reg & FAN_CTRL_DC_MODE);
}
static inline long temp_from_reg(u8 reg)
{
return reg * 1000;
}
static inline u8 temp_to_reg(long val)
{
if (val <= 0)
return 0;
if (val >= 1000 * 0xff)
return 0xff;
return (val + 500) / 1000;
}
/*
* Device I/O access
*/
/* Must be called with data->update_lock held, except during initialization */
static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
{
outb(reg, data->addr + ADDR_REG_OFFSET);
return inb(data->addr + DATA_REG_OFFSET);
}
/* Must be called with data->update_lock held, except during initialization */
static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
{
outb(reg, data->addr + ADDR_REG_OFFSET);
outb(val, data->addr + DATA_REG_OFFSET);
}
/*
* It is important to read the MSB first, because doing so latches the
* value of the LSB, so we are sure both bytes belong to the same value.
* Must be called with data->update_lock held, except during initialization
*/
static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
{
u16 val;
outb(reg, data->addr + ADDR_REG_OFFSET);
val = inb(data->addr + DATA_REG_OFFSET) << 8;
outb(++reg, data->addr + ADDR_REG_OFFSET);
val |= inb(data->addr + DATA_REG_OFFSET);
return val;
}
/* Must be called with data->update_lock held, except during initialization */
static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
{
outb(reg, data->addr + ADDR_REG_OFFSET);
outb(val >> 8, data->addr + DATA_REG_OFFSET);
outb(++reg, data->addr + ADDR_REG_OFFSET);
outb(val & 0xff, data->addr + DATA_REG_OFFSET);
}
static struct f71805f_data *f71805f_update_device(struct device *dev)
{
struct f71805f_data *data = dev_get_drvdata(dev);
int nr, apnr;
mutex_lock(&data->update_lock);
/* Limit registers cache is refreshed after 60 seconds */
if (time_after(jiffies, data->last_updated + 60 * HZ)
|| !data->valid) {
for (nr = 0; nr < 11; nr++) {
if (!(data->has_in & (1 << nr)))
continue;
data->in_high[nr] = f71805f_read8(data,
F71805F_REG_IN_HIGH(nr));
data->in_low[nr] = f71805f_read8(data,
F71805F_REG_IN_LOW(nr));
}
for (nr = 0; nr < 3; nr++) {
data->fan_low[nr] = f71805f_read16(data,
F71805F_REG_FAN_LOW(nr));
data->fan_target[nr] = f71805f_read16(data,
F71805F_REG_FAN_TARGET(nr));
data->pwm_freq[nr] = f71805f_read8(data,
F71805F_REG_PWM_FREQ(nr));
}
for (nr = 0; nr < 3; nr++) {
data->temp_high[nr] = f71805f_read8(data,
F71805F_REG_TEMP_HIGH(nr));
data->temp_hyst[nr] = f71805f_read8(data,
F71805F_REG_TEMP_HYST(nr));
}
data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
for (nr = 0; nr < 3; nr++) {
for (apnr = 0; apnr < 3; apnr++) {
data->auto_points[nr].temp[apnr] =
f71805f_read8(data,
F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
apnr));
data->auto_points[nr].fan[apnr] =
f71805f_read16(data,
F71805F_REG_PWM_AUTO_POINT_FAN(nr,
apnr));
}
}
data->last_limits = jiffies;
}
/* Measurement registers cache is refreshed after 1 second */
if (time_after(jiffies, data->last_updated + HZ)
|| !data->valid) {
for (nr = 0; nr < 11; nr++) {
if (!(data->has_in & (1 << nr)))
continue;
data->in[nr] = f71805f_read8(data,
F71805F_REG_IN(nr));
}
for (nr = 0; nr < 3; nr++) {
data->fan[nr] = f71805f_read16(data,
F71805F_REG_FAN(nr));
data->fan_ctrl[nr] = f71805f_read8(data,
F71805F_REG_FAN_CTRL(nr));
data->pwm[nr] = f71805f_read8(data,
F71805F_REG_PWM_DUTY(nr));
}
for (nr = 0; nr < 3; nr++) {
data->temp[nr] = f71805f_read8(data,
F71805F_REG_TEMP(nr));
}
data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
+ (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
+ (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs interface
*/
static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
}
static ssize_t show_in0_max(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
}
static ssize_t show_in0_min(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
}
static ssize_t set_in0_max(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_high[nr] = in0_to_reg(val);
f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t set_in0_min(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_low[nr] = in0_to_reg(val);
f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
}
static ssize_t show_in_max(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
}
static ssize_t show_in_min(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
}
static ssize_t set_in_max(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_high[nr] = in_to_reg(val);
f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t set_in_min(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_low[nr] = in_to_reg(val);
f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
}
static ssize_t show_fan_min(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
}
static ssize_t show_fan_target(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
}
static ssize_t set_fan_min(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_low[nr] = fan_to_reg(val);
f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t set_fan_target(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_target[nr] = fan_to_reg(val);
f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
data->fan_target[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%d\n", (int)data->pwm[nr]);
}
static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
int mode;
switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
case FAN_CTRL_MODE_SPEED:
mode = 3;
break;
case FAN_CTRL_MODE_TEMPERATURE:
mode = 2;
break;
default: /* MANUAL */
mode = 1;
}
return sprintf(buf, "%d\n", mode);
}
static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
}
static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
}
static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm[nr] = val;
f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static struct attribute *f71805f_attr_pwm[];
static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val < 1 || val > 3)
return -EINVAL;
if (val > 1) { /* Automatic mode, user can't set PWM value */
if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
S_IRUGO))
dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
}
mutex_lock(&data->update_lock);
reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
& ~FAN_CTRL_MODE_MASK;
switch (val) {
case 1:
reg |= FAN_CTRL_MODE_MANUAL;
break;
case 2:
reg |= FAN_CTRL_MODE_TEMPERATURE;
break;
case 3:
reg |= FAN_CTRL_MODE_SPEED;
break;
}
data->fan_ctrl[nr] = reg;
f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
mutex_unlock(&data->update_lock);
if (val == 1) { /* Manual mode, user can set PWM value */
if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
S_IRUGO | S_IWUSR))
dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
}
return count;
}
static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm_freq[nr] = pwm_freq_to_reg(val);
f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm_auto_point_temp(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
int pwmnr = attr->nr;
int apnr = attr->index;
return sprintf(buf, "%ld\n",
temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
}
static ssize_t set_pwm_auto_point_temp(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
int pwmnr = attr->nr;
int apnr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
data->auto_points[pwmnr].temp[apnr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm_auto_point_fan(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
int pwmnr = attr->nr;
int apnr = attr->index;
return sprintf(buf, "%ld\n",
fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
}
static ssize_t set_pwm_auto_point_fan(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
int pwmnr = attr->nr;
int apnr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
data->auto_points[pwmnr].fan[apnr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
}
static ssize_t show_temp_max(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
}
static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
}
static ssize_t show_temp_type(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
/* 3 is diode, 4 is thermistor */
return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
}
static ssize_t set_temp_max(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_high[nr] = temp_to_reg(val);
f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71805f_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_hyst[nr] = temp_to_reg(val);
f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t alarms_in_show(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
}
static ssize_t alarms_fan_show(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
}
static ssize_t alarms_temp_show(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
}
static ssize_t show_alarm(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = f71805f_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
int bitnr = attr->index;
return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
}
static ssize_t name_show(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71805f_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
show_in0_max, set_in0_max, 0);
static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
show_in0_min, set_in0_min, 0);
static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 1);
static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 1);
static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 2);
static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 2);
static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 3);
static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 3);
static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 4);
static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 4);
static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 5);
static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 5);
static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 6);
static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 6);
static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 7);
static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 7);
static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
show_in_max, set_in_max, 8);
static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
show_in_min, set_in_min, 8);
static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
show_in0_max, set_in0_max, 9);
static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
show_in0_min, set_in0_min, 9);
static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
show_in0_max, set_in0_max, 10);
static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
show_in0_min, set_in0_min, 10);
static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
show_fan_min, set_fan_min, 0);
static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
show_fan_target, set_fan_target, 0);
static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
show_fan_min, set_fan_min, 1);
static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
show_fan_target, set_fan_target, 1);
static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
show_fan_min, set_fan_min, 2);
static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
show_fan_target, set_fan_target, 2);
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
show_temp_max, set_temp_max, 0);
static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
show_temp_hyst, set_temp_hyst, 0);
static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
show_temp_max, set_temp_max, 1);
static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
show_temp_hyst, set_temp_hyst, 1);
static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
show_temp_max, set_temp_max, 2);
static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
show_temp_hyst, set_temp_hyst, 2);
static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
/*
* pwm (value) files are created read-only, write permission is
* then added or removed dynamically as needed
*/
static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 0);
static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
show_pwm_freq, set_pwm_freq, 0);
static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 1);
static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
show_pwm_freq, set_pwm_freq, 1);
static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 2);
static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
show_pwm_freq, set_pwm_freq, 2);
static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
0, 0);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
0, 0);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
0, 1);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
0, 1);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
0, 2);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
0, 2);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1, 0);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1, 0);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1, 1);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1, 1);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1, 2);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1, 2);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
2, 0);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
2, 0);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
2, 1);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
2, 1);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
show_pwm_auto_point_temp, set_pwm_auto_point_temp,
2, 2);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
show_pwm_auto_point_fan, set_pwm_auto_point_fan,
2, 2);
static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
static DEVICE_ATTR_RO(alarms_in);
static DEVICE_ATTR_RO(alarms_fan);
static DEVICE_ATTR_RO(alarms_temp);
static DEVICE_ATTR_RO(name);
static struct attribute *f71805f_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_target.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_target.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_target.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_mode.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_mode.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_mode.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_type.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_type.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_type.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
&dev_attr_alarms_in.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&dev_attr_alarms_temp.attr,
&dev_attr_alarms_fan.attr,
&dev_attr_name.attr,
NULL
};
static const struct attribute_group f71805f_group = {
.attrs = f71805f_attributes,
};
static struct attribute *f71805f_attributes_optin[4][5] = {
{
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
NULL
}, {
&sensor_dev_attr_in8_input.dev_attr.attr,
&sensor_dev_attr_in8_max.dev_attr.attr,
&sensor_dev_attr_in8_min.dev_attr.attr,
&sensor_dev_attr_in8_alarm.dev_attr.attr,
NULL
}, {
&sensor_dev_attr_in9_input.dev_attr.attr,
&sensor_dev_attr_in9_max.dev_attr.attr,
&sensor_dev_attr_in9_min.dev_attr.attr,
&sensor_dev_attr_in9_alarm.dev_attr.attr,
NULL
}, {
&sensor_dev_attr_in10_input.dev_attr.attr,
&sensor_dev_attr_in10_max.dev_attr.attr,
&sensor_dev_attr_in10_min.dev_attr.attr,
&sensor_dev_attr_in10_alarm.dev_attr.attr,
NULL
}
};
static const struct attribute_group f71805f_group_optin[4] = {
{ .attrs = f71805f_attributes_optin[0] },
{ .attrs = f71805f_attributes_optin[1] },
{ .attrs = f71805f_attributes_optin[2] },
{ .attrs = f71805f_attributes_optin[3] },
};
/*
* We don't include pwm_freq files in the arrays above, because they must be
* created conditionally (only if pwm_mode is 1 == PWM)
*/
static struct attribute *f71805f_attributes_pwm_freq[] = {
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
NULL
};
static const struct attribute_group f71805f_group_pwm_freq = {
.attrs = f71805f_attributes_pwm_freq,
};
/* We also need an indexed access to pwmN files to toggle writability */
static struct attribute *f71805f_attr_pwm[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
};
/*
* Device registration and initialization
*/
static void f71805f_init_device(struct f71805f_data *data)
{
u8 reg;
int i;
reg = f71805f_read8(data, F71805F_REG_START);
if ((reg & 0x41) != 0x01) {
pr_debug("Starting monitoring operations\n");
f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
}
/*
* Fan monitoring can be disabled. If it is, we won't be polling
* the register values, and won't create the related sysfs files.
*/
for (i = 0; i < 3; i++) {
data->fan_ctrl[i] = f71805f_read8(data,
F71805F_REG_FAN_CTRL(i));
/*
* Clear latch full bit, else "speed mode" fan speed control
* doesn't work
*/
if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
data->fan_ctrl[i]);
}
}
}
static int f71805f_probe(struct platform_device *pdev)
{
struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
struct f71805f_data *data;
struct resource *res;
int i, err;
static const char * const names[] = {
"f71805f",
"f71872f",
};
data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
DRVNAME)) {
dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
(unsigned long)(res->start + ADDR_REG_OFFSET),
(unsigned long)(res->start + ADDR_REG_OFFSET + 1));
return -EBUSY;
}
data->addr = res->start;
data->name = names[sio_data->kind];
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
/* Some voltage inputs depend on chip model and configuration */
switch (sio_data->kind) {
case f71805f:
data->has_in = 0x1ff;
break;
case f71872f:
data->has_in = 0x6ef;
if (sio_data->fnsel1 & 0x01)
data->has_in |= (1 << 4); /* in4 */
if (sio_data->fnsel1 & 0x02)
data->has_in |= (1 << 8); /* in8 */
break;
}
/* Initialize the F71805F chip */
f71805f_init_device(data);
/* Register sysfs interface files */
err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
if (err)
return err;
if (data->has_in & (1 << 4)) { /* in4 */
err = sysfs_create_group(&pdev->dev.kobj,
&f71805f_group_optin[0]);
if (err)
goto exit_remove_files;
}
if (data->has_in & (1 << 8)) { /* in8 */
err = sysfs_create_group(&pdev->dev.kobj,
&f71805f_group_optin[1]);
if (err)
goto exit_remove_files;
}
if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
err = sysfs_create_group(&pdev->dev.kobj,
&f71805f_group_optin[2]);
if (err)
goto exit_remove_files;
}
if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
err = sysfs_create_group(&pdev->dev.kobj,
&f71805f_group_optin[3]);
if (err)
goto exit_remove_files;
}
for (i = 0; i < 3; i++) {
/* If control mode is PWM, create pwm_freq file */
if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
err = sysfs_create_file(&pdev->dev.kobj,
f71805f_attributes_pwm_freq[i]);
if (err)
goto exit_remove_files;
}
/* If PWM is in manual mode, add write permission */
if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
err = sysfs_chmod_file(&pdev->dev.kobj,
f71805f_attr_pwm[i],
S_IRUGO | S_IWUSR);
if (err) {
dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
i + 1);
goto exit_remove_files;
}
}
}
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
goto exit_remove_files;
}
return 0;
exit_remove_files:
sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
for (i = 0; i < 4; i++)
sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
return err;
}
static int f71805f_remove(struct platform_device *pdev)
{
struct f71805f_data *data = platform_get_drvdata(pdev);
int i;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
for (i = 0; i < 4; i++)
sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
return 0;
}
static struct platform_driver f71805f_driver = {
.driver = {
.name = DRVNAME,
},
.probe = f71805f_probe,
.remove = f71805f_remove,
};
static int __init f71805f_device_add(unsigned short address,
const struct f71805f_sio_data *sio_data)
{
struct resource res = {
.start = address,
.end = address + REGION_LENGTH - 1,
.flags = IORESOURCE_IO,
};
int err;
pdev = platform_device_alloc(DRVNAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
res.name = pdev->name;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit_device_put;
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add_data(pdev, sio_data,
sizeof(struct f71805f_sio_data));
if (err) {
pr_err("Platform data allocation failed\n");
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static int __init f71805f_find(int sioaddr, unsigned short *address,
struct f71805f_sio_data *sio_data)
{
int err;
u16 devid;
static const char * const names[] = {
"F71805F/FG",
"F71872F/FG or F71806F/FG",
};
err = superio_enter(sioaddr);
if (err)
return err;
err = -ENODEV;
devid = superio_inw(sioaddr, SIO_REG_MANID);
if (devid != SIO_FINTEK_ID)
goto exit;
devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
switch (devid) {
case SIO_F71805F_ID:
sio_data->kind = f71805f;
break;
case SIO_F71872F_ID:
sio_data->kind = f71872f;
sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
break;
default:
pr_info("Unsupported Fintek device, skipping\n");
goto exit;
}
superio_select(sioaddr, F71805F_LD_HWM);
if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
pr_warn("Device not activated, skipping\n");
goto exit;
}
*address = superio_inw(sioaddr, SIO_REG_ADDR);
if (*address == 0) {
pr_warn("Base address not set, skipping\n");
goto exit;
}
*address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
err = 0;
pr_info("Found %s chip at %#x, revision %u\n",
names[sio_data->kind], *address,
superio_inb(sioaddr, SIO_REG_DEVREV));
exit:
superio_exit(sioaddr);
return err;
}
static int __init f71805f_init(void)
{
int err;
unsigned short address;
struct f71805f_sio_data sio_data;
if (f71805f_find(0x2e, &address, &sio_data)
&& f71805f_find(0x4e, &address, &sio_data))
return -ENODEV;
err = platform_driver_register(&f71805f_driver);
if (err)
goto exit;
/* Sets global pdev as a side effect */
err = f71805f_device_add(address, &sio_data);
if (err)
goto exit_driver;
return 0;
exit_driver:
platform_driver_unregister(&f71805f_driver);
exit:
return err;
}
static void __exit f71805f_exit(void)
{
platform_device_unregister(pdev);
platform_driver_unregister(&f71805f_driver);
}
MODULE_AUTHOR("Jean Delvare <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
module_init(f71805f_init);
module_exit(f71805f_exit);
|
linux-master
|
drivers/hwmon/f71805f.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Intel MAX 10 BMC HWMON Driver
*
* Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
*
*/
#include <linux/device.h>
#include <linux/hwmon.h>
#include <linux/mfd/intel-m10-bmc.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
struct m10bmc_sdata {
unsigned int reg_input;
unsigned int reg_max;
unsigned int reg_crit;
unsigned int reg_hyst;
unsigned int reg_min;
unsigned int multiplier;
const char *label;
};
struct m10bmc_hwmon_board_data {
const struct m10bmc_sdata *tables[hwmon_max];
const struct hwmon_channel_info * const *hinfo;
};
struct m10bmc_hwmon {
struct device *dev;
struct hwmon_chip_info chip;
char *hw_name;
struct intel_m10bmc *m10bmc;
const struct m10bmc_hwmon_board_data *bdata;
};
static const struct m10bmc_sdata n3000bmc_temp_tbl[] = {
{ 0x100, 0x104, 0x108, 0x10c, 0x0, 500, "Board Temperature" },
{ 0x110, 0x114, 0x118, 0x0, 0x0, 500, "FPGA Die Temperature" },
{ 0x11c, 0x124, 0x120, 0x0, 0x0, 500, "QSFP0 Temperature" },
{ 0x12c, 0x134, 0x130, 0x0, 0x0, 500, "QSFP1 Temperature" },
{ 0x168, 0x0, 0x0, 0x0, 0x0, 500, "Retimer A Temperature" },
{ 0x16c, 0x0, 0x0, 0x0, 0x0, 500, "Retimer A SerDes Temperature" },
{ 0x170, 0x0, 0x0, 0x0, 0x0, 500, "Retimer B Temperature" },
{ 0x174, 0x0, 0x0, 0x0, 0x0, 500, "Retimer B SerDes Temperature" },
};
static const struct m10bmc_sdata n3000bmc_in_tbl[] = {
{ 0x128, 0x0, 0x0, 0x0, 0x0, 1, "QSFP0 Supply Voltage" },
{ 0x138, 0x0, 0x0, 0x0, 0x0, 1, "QSFP1 Supply Voltage" },
{ 0x13c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA Core Voltage" },
{ 0x144, 0x0, 0x0, 0x0, 0x0, 1, "12V Backplane Voltage" },
{ 0x14c, 0x0, 0x0, 0x0, 0x0, 1, "1.2V Voltage" },
{ 0x150, 0x0, 0x0, 0x0, 0x0, 1, "12V AUX Voltage" },
{ 0x158, 0x0, 0x0, 0x0, 0x0, 1, "1.8V Voltage" },
{ 0x15c, 0x0, 0x0, 0x0, 0x0, 1, "3.3V Voltage" },
};
static const struct m10bmc_sdata n3000bmc_curr_tbl[] = {
{ 0x140, 0x0, 0x0, 0x0, 0x0, 1, "FPGA Core Current" },
{ 0x148, 0x0, 0x0, 0x0, 0x0, 1, "12V Backplane Current" },
{ 0x154, 0x0, 0x0, 0x0, 0x0, 1, "12V AUX Current" },
};
static const struct m10bmc_sdata n3000bmc_power_tbl[] = {
{ 0x160, 0x0, 0x0, 0x0, 0x0, 1000, "Board Power" },
};
static const struct hwmon_channel_info * const n3000bmc_hinfo[] = {
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL),
HWMON_CHANNEL_INFO(power,
HWMON_P_INPUT | HWMON_P_LABEL),
NULL
};
static const struct m10bmc_sdata d5005bmc_temp_tbl[] = {
{ 0x100, 0x104, 0x108, 0x10c, 0x0, 500, "Board Inlet Air Temperature" },
{ 0x110, 0x114, 0x118, 0x0, 0x0, 500, "FPGA Core Temperature" },
{ 0x11c, 0x120, 0x124, 0x128, 0x0, 500, "Board Exhaust Air Temperature" },
{ 0x12c, 0x130, 0x134, 0x0, 0x0, 500, "FPGA Transceiver Temperature" },
{ 0x138, 0x13c, 0x140, 0x144, 0x0, 500, "RDIMM0 Temperature" },
{ 0x148, 0x14c, 0x150, 0x154, 0x0, 500, "RDIMM1 Temperature" },
{ 0x158, 0x15c, 0x160, 0x164, 0x0, 500, "RDIMM2 Temperature" },
{ 0x168, 0x16c, 0x170, 0x174, 0x0, 500, "RDIMM3 Temperature" },
{ 0x178, 0x17c, 0x180, 0x0, 0x0, 500, "QSFP0 Temperature" },
{ 0x188, 0x18c, 0x190, 0x0, 0x0, 500, "QSFP1 Temperature" },
{ 0x1a0, 0x1a4, 0x1a8, 0x0, 0x0, 500, "3.3v Temperature" },
{ 0x1bc, 0x1c0, 0x1c4, 0x0, 0x0, 500, "VCCERAM Temperature" },
{ 0x1d8, 0x1dc, 0x1e0, 0x0, 0x0, 500, "VCCR Temperature" },
{ 0x1f4, 0x1f8, 0x1fc, 0x0, 0x0, 500, "VCCT Temperature" },
{ 0x210, 0x214, 0x218, 0x0, 0x0, 500, "1.8v Temperature" },
{ 0x22c, 0x230, 0x234, 0x0, 0x0, 500, "12v Backplane Temperature" },
{ 0x248, 0x24c, 0x250, 0x0, 0x0, 500, "12v AUX Temperature" },
};
static const struct m10bmc_sdata d5005bmc_in_tbl[] = {
{ 0x184, 0x0, 0x0, 0x0, 0x0, 1, "QSFP0 Supply Voltage" },
{ 0x194, 0x0, 0x0, 0x0, 0x0, 1, "QSFP1 Supply Voltage" },
{ 0x198, 0x0, 0x0, 0x0, 0x0, 1, "FPGA Core Voltage" },
{ 0x1ac, 0x1b0, 0x1b4, 0x0, 0x0, 1, "3.3v Voltage" },
{ 0x1c8, 0x1cc, 0x1d0, 0x0, 0x0, 1, "VCCERAM Voltage" },
{ 0x1e4, 0x1e8, 0x1ec, 0x0, 0x0, 1, "VCCR Voltage" },
{ 0x200, 0x204, 0x208, 0x0, 0x0, 1, "VCCT Voltage" },
{ 0x21c, 0x220, 0x224, 0x0, 0x0, 1, "1.8v Voltage" },
{ 0x238, 0x0, 0x0, 0x0, 0x23c, 1, "12v Backplane Voltage" },
{ 0x254, 0x0, 0x0, 0x0, 0x258, 1, "12v AUX Voltage" },
};
static const struct m10bmc_sdata d5005bmc_curr_tbl[] = {
{ 0x19c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA Core Current" },
{ 0x1b8, 0x0, 0x0, 0x0, 0x0, 1, "3.3v Current" },
{ 0x1d4, 0x0, 0x0, 0x0, 0x0, 1, "VCCERAM Current" },
{ 0x1f0, 0x0, 0x0, 0x0, 0x0, 1, "VCCR Current" },
{ 0x20c, 0x0, 0x0, 0x0, 0x0, 1, "VCCT Current" },
{ 0x228, 0x0, 0x0, 0x0, 0x0, 1, "1.8v Current" },
{ 0x240, 0x244, 0x0, 0x0, 0x0, 1, "12v Backplane Current" },
{ 0x25c, 0x260, 0x0, 0x0, 0x0, 1, "12v AUX Current" },
};
static const struct m10bmc_hwmon_board_data n3000bmc_hwmon_bdata = {
.tables = {
[hwmon_temp] = n3000bmc_temp_tbl,
[hwmon_in] = n3000bmc_in_tbl,
[hwmon_curr] = n3000bmc_curr_tbl,
[hwmon_power] = n3000bmc_power_tbl,
},
.hinfo = n3000bmc_hinfo,
};
static const struct hwmon_channel_info * const d5005bmc_hinfo[] = {
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_CRIT |
HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_CRIT |
HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_CRIT |
HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_CRIT |
HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_CRIT |
HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_LABEL),
NULL
};
static const struct m10bmc_hwmon_board_data d5005bmc_hwmon_bdata = {
.tables = {
[hwmon_temp] = d5005bmc_temp_tbl,
[hwmon_in] = d5005bmc_in_tbl,
[hwmon_curr] = d5005bmc_curr_tbl,
},
.hinfo = d5005bmc_hinfo,
};
static const struct m10bmc_sdata n5010bmc_temp_tbl[] = {
{ 0x100, 0x0, 0x104, 0x0, 0x0, 1000, "Board Local Temperature" },
{ 0x108, 0x0, 0x10c, 0x0, 0x0, 1000, "FPGA 1 Temperature" },
{ 0x110, 0x0, 0x114, 0x0, 0x0, 1000, "FPGA 2 Temperature" },
{ 0x118, 0x0, 0x0, 0x0, 0x0, 1000, "Card Top Temperature" },
{ 0x11c, 0x0, 0x0, 0x0, 0x0, 1000, "Card Bottom Temperature" },
{ 0x128, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 1.2V Temperature" },
{ 0x134, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 5V Temperature" },
{ 0x140, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.9V Temperature" },
{ 0x14c, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.85V Temperature" },
{ 0x158, 0x0, 0x0, 0x0, 0x0, 1000, "AUX 12V Temperature" },
{ 0x164, 0x0, 0x0, 0x0, 0x0, 1000, "Backplane 12V Temperature" },
{ 0x1a8, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-1 Temperature" },
{ 0x1ac, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-2 Temperature" },
{ 0x1b0, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-3 Temperature" },
{ 0x1b4, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-4 Temperature" },
{ 0x1b8, 0x0, 0x0, 0x0, 0x0, 1000, "CVL1 Internal Temperature" },
{ 0x1bc, 0x0, 0x0, 0x0, 0x0, 1000, "CVL2 Internal Temperature" },
};
static const struct m10bmc_sdata n5010bmc_in_tbl[] = {
{ 0x120, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Voltage" },
{ 0x12c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Voltage" },
{ 0x138, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Voltage" },
{ 0x144, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Voltage" },
{ 0x150, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Voltage" },
{ 0x15c, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Voltage" },
{ 0x16c, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Voltage" },
{ 0x17c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Voltage" },
{ 0x184, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Voltage" },
{ 0x18c, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Voltage" },
{ 0x194, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Voltage" },
{ 0x19c, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Voltage" },
{ 0x1a4, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Voltage" },
};
static const struct m10bmc_sdata n5010bmc_curr_tbl[] = {
{ 0x124, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Current" },
{ 0x130, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Current" },
{ 0x13c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Current" },
{ 0x148, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Current" },
{ 0x154, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Current" },
{ 0x160, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Current" },
{ 0x168, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Current" },
{ 0x178, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Current" },
{ 0x180, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Current" },
{ 0x188, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Current" },
{ 0x190, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Current" },
{ 0x198, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Current" },
{ 0x1a0, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Current" },
};
static const struct hwmon_channel_info * const n5010bmc_hinfo[] = {
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL),
NULL
};
static const struct m10bmc_hwmon_board_data n5010bmc_hwmon_bdata = {
.tables = {
[hwmon_temp] = n5010bmc_temp_tbl,
[hwmon_in] = n5010bmc_in_tbl,
[hwmon_curr] = n5010bmc_curr_tbl,
},
.hinfo = n5010bmc_hinfo,
};
static const struct m10bmc_sdata n6000bmc_temp_tbl[] = {
{ 0x444, 0x448, 0x44c, 0x0, 0x0, 500, "FPGA E-TILE Temperature #1" },
{ 0x450, 0x454, 0x458, 0x0, 0x0, 500, "FPGA E-TILE Temperature #2" },
{ 0x45c, 0x460, 0x464, 0x0, 0x0, 500, "FPGA E-TILE Temperature #3" },
{ 0x468, 0x46c, 0x470, 0x0, 0x0, 500, "FPGA E-TILE Temperature #4" },
{ 0x474, 0x478, 0x47c, 0x0, 0x0, 500, "FPGA P-TILE Temperature" },
{ 0x484, 0x488, 0x48c, 0x0, 0x0, 500, "FPGA FABRIC Digital Temperature #1" },
{ 0x490, 0x494, 0x498, 0x0, 0x0, 500, "FPGA FABRIC Digital Temperature #2" },
{ 0x49c, 0x4a0, 0x4a4, 0x0, 0x0, 500, "FPGA FABRIC Digital Temperature #3" },
{ 0x4a8, 0x4ac, 0x4b0, 0x0, 0x0, 500, "FPGA FABRIC Digital Temperature #4" },
{ 0x4b4, 0x4b8, 0x4bc, 0x0, 0x0, 500, "FPGA FABRIC Digital Temperature #5" },
{ 0x4c0, 0x4c4, 0x4c8, 0x0, 0x0, 500, "FPGA FABRIC Remote Digital Temperature #1" },
{ 0x4cc, 0x4d0, 0x4d4, 0x0, 0x0, 500, "FPGA FABRIC Remote Digital Temperature #2" },
{ 0x4d8, 0x4dc, 0x4e0, 0x0, 0x0, 500, "FPGA FABRIC Remote Digital Temperature #3" },
{ 0x4e4, 0x4e8, 0x4ec, 0x0, 0x0, 500, "FPGA FABRIC Remote Digital Temperature #4" },
{ 0x4f0, 0x4f4, 0x4f8, 0x52c, 0x0, 500, "Board Top Near FPGA Temperature" },
{ 0x4fc, 0x500, 0x504, 0x52c, 0x0, 500, "Board Bottom Near CVL Temperature" },
{ 0x508, 0x50c, 0x510, 0x52c, 0x0, 500, "Board Top East Near VRs Temperature" },
{ 0x514, 0x518, 0x51c, 0x52c, 0x0, 500, "Columbiaville Die Temperature" },
{ 0x520, 0x524, 0x528, 0x52c, 0x0, 500, "Board Rear Side Temperature" },
{ 0x530, 0x534, 0x538, 0x52c, 0x0, 500, "Board Front Side Temperature" },
{ 0x53c, 0x540, 0x544, 0x0, 0x0, 500, "QSFP1 Case Temperature" },
{ 0x548, 0x54c, 0x550, 0x0, 0x0, 500, "QSFP2 Case Temperature" },
{ 0x554, 0x0, 0x0, 0x0, 0x0, 500, "FPGA Core Voltage Phase 0 VR Temperature" },
{ 0x560, 0x0, 0x0, 0x0, 0x0, 500, "FPGA Core Voltage Phase 1 VR Temperature" },
{ 0x56c, 0x0, 0x0, 0x0, 0x0, 500, "FPGA Core Voltage Phase 2 VR Temperature" },
{ 0x578, 0x0, 0x0, 0x0, 0x0, 500, "FPGA Core Voltage VR Controller Temperature" },
{ 0x584, 0x0, 0x0, 0x0, 0x0, 500, "FPGA VCCH VR Temperature" },
{ 0x590, 0x0, 0x0, 0x0, 0x0, 500, "FPGA VCC_1V2 VR Temperature" },
{ 0x59c, 0x0, 0x0, 0x0, 0x0, 500, "FPGA VCCH, VCC_1V2 VR Controller Temperature" },
{ 0x5a8, 0x0, 0x0, 0x0, 0x0, 500, "3V3 VR Temperature" },
{ 0x5b4, 0x0, 0x0, 0x0, 0x0, 500, "CVL Core Voltage VR Temperature" },
{ 0x5c4, 0x5c8, 0x5cc, 0x5c0, 0x0, 500, "FPGA P-Tile Temperature [Remote]" },
{ 0x5d0, 0x5d4, 0x5d8, 0x5c0, 0x0, 500, "FPGA E-Tile Temperature [Remote]" },
{ 0x5dc, 0x5e0, 0x5e4, 0x5c0, 0x0, 500, "FPGA SDM Temperature [Remote]" },
{ 0x5e8, 0x5ec, 0x5f0, 0x5c0, 0x0, 500, "FPGA Corner Temperature [Remote]" },
};
static const struct m10bmc_sdata n6000bmc_in_tbl[] = {
{ 0x5f4, 0x0, 0x0, 0x0, 0x0, 1, "Inlet 12V PCIe Rail Voltage" },
{ 0x60c, 0x0, 0x0, 0x0, 0x0, 1, "Inlet 12V Aux Rail Voltage" },
{ 0x624, 0x0, 0x0, 0x0, 0x0, 1, "Inlet 3V3 PCIe Rail Voltage" },
{ 0x63c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA Core Voltage Rail Voltage" },
{ 0x644, 0x0, 0x0, 0x0, 0x0, 1, "FPGA VCCH Rail Voltage" },
{ 0x64c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA VCC_1V2 Rail Voltage" },
{ 0x654, 0x0, 0x0, 0x0, 0x0, 1, "FPGA VCCH_GXER_1V1, VCCA_1V8 Voltage" },
{ 0x664, 0x0, 0x0, 0x0, 0x0, 1, "FPGA VCCIO_1V2 Voltage" },
{ 0x674, 0x0, 0x0, 0x0, 0x0, 1, "CVL Non Core Rails Inlet Voltage" },
{ 0x684, 0x0, 0x0, 0x0, 0x0, 1, "MAX10 & Board CLK PWR 3V3 Inlet Voltage" },
{ 0x694, 0x0, 0x0, 0x0, 0x0, 1, "CVL Core Voltage Rail Voltage" },
{ 0x6ac, 0x0, 0x0, 0x0, 0x0, 1, "Board 3V3 VR Voltage" },
{ 0x6b4, 0x0, 0x0, 0x0, 0x0, 1, "QSFP 3V3 Rail Voltage" },
{ 0x6c4, 0x0, 0x0, 0x0, 0x0, 1, "QSFP (Primary) Supply Rail Voltage" },
{ 0x6c8, 0x0, 0x0, 0x0, 0x0, 1, "QSFP (Secondary) Supply Rail Voltage" },
{ 0x6cc, 0x0, 0x0, 0x0, 0x0, 1, "VCCCLK_GXER_2V5 Voltage" },
{ 0x6d0, 0x0, 0x0, 0x0, 0x0, 1, "AVDDH_1V1_CVL Voltage" },
{ 0x6d4, 0x0, 0x0, 0x0, 0x0, 1, "VDDH_1V8_CVL Voltage" },
{ 0x6d8, 0x0, 0x0, 0x0, 0x0, 1, "VCCA_PLL Voltage" },
{ 0x6e0, 0x0, 0x0, 0x0, 0x0, 1, "VCCRT_GXER_0V9 Voltage" },
{ 0x6e8, 0x0, 0x0, 0x0, 0x0, 1, "VCCRT_GXPL_0V9 Voltage" },
{ 0x6f0, 0x0, 0x0, 0x0, 0x0, 1, "VCCH_GXPL_1V8 Voltage" },
{ 0x6f4, 0x0, 0x0, 0x0, 0x0, 1, "VCCPT_1V8 Voltage" },
{ 0x6fc, 0x0, 0x0, 0x0, 0x0, 1, "VCC_3V3_M10 Voltage" },
{ 0x700, 0x0, 0x0, 0x0, 0x0, 1, "VCC_1V8_M10 Voltage" },
{ 0x704, 0x0, 0x0, 0x0, 0x0, 1, "VCC_1V2_EMIF1_2_3 Voltage" },
{ 0x70c, 0x0, 0x0, 0x0, 0x0, 1, "VCC_1V2_EMIF4_5 Voltage" },
{ 0x714, 0x0, 0x0, 0x0, 0x0, 1, "VCCA_1V8 Voltage" },
{ 0x718, 0x0, 0x0, 0x0, 0x0, 1, "VCCH_GXER_1V1 Voltage" },
{ 0x71c, 0x0, 0x0, 0x0, 0x0, 1, "AVDD_ETH_0V9_CVL Voltage" },
{ 0x720, 0x0, 0x0, 0x0, 0x0, 1, "AVDD_PCIE_0V9_CVL Voltage" },
};
static const struct m10bmc_sdata n6000bmc_curr_tbl[] = {
{ 0x600, 0x604, 0x608, 0x0, 0x0, 1, "Inlet 12V PCIe Rail Current" },
{ 0x618, 0x61c, 0x620, 0x0, 0x0, 1, "Inlet 12V Aux Rail Current" },
{ 0x630, 0x634, 0x638, 0x0, 0x0, 1, "Inlet 3V3 PCIe Rail Current" },
{ 0x640, 0x0, 0x0, 0x0, 0x0, 1, "FPGA Core Voltage Rail Current" },
{ 0x648, 0x0, 0x0, 0x0, 0x0, 1, "FPGA VCCH Rail Current" },
{ 0x650, 0x0, 0x0, 0x0, 0x0, 1, "FPGA VCC_1V2 Rail Current" },
{ 0x658, 0x65c, 0x660, 0x0, 0x0, 1, "FPGA VCCH_GXER_1V1, VCCA_1V8 Current" },
{ 0x668, 0x66c, 0x670, 0x0, 0x0, 1, "FPGA VCCIO_1V2 Current" },
{ 0x678, 0x67c, 0x680, 0x0, 0x0, 1, "CVL Non Core Rails Inlet Current" },
{ 0x688, 0x68c, 0x690, 0x0, 0x0, 1, "MAX10 & Board CLK PWR 3V3 Inlet Current" },
{ 0x698, 0x0, 0x0, 0x0, 0x0, 1, "CVL Core Voltage Rail Current" },
{ 0x6b0, 0x0, 0x0, 0x0, 0x0, 1, "Board 3V3 VR Current" },
{ 0x6b8, 0x6bc, 0x6c0, 0x0, 0x0, 1, "QSFP 3V3 Rail Current" },
};
static const struct m10bmc_sdata n6000bmc_power_tbl[] = {
{ 0x724, 0x0, 0x0, 0x0, 0x0, 1, "Board Power" },
};
static const struct hwmon_channel_info * const n6000bmc_hinfo[] = {
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_LABEL),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_MAX | HWMON_C_CRIT |
HWMON_C_LABEL),
HWMON_CHANNEL_INFO(power,
HWMON_P_INPUT | HWMON_P_LABEL),
NULL
};
static const struct m10bmc_hwmon_board_data n6000bmc_hwmon_bdata = {
.tables = {
[hwmon_temp] = n6000bmc_temp_tbl,
[hwmon_in] = n6000bmc_in_tbl,
[hwmon_curr] = n6000bmc_curr_tbl,
[hwmon_power] = n6000bmc_power_tbl,
},
.hinfo = n6000bmc_hinfo,
};
static umode_t
m10bmc_hwmon_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
return 0444;
}
static const struct m10bmc_sdata *
find_sensor_data(struct m10bmc_hwmon *hw, enum hwmon_sensor_types type,
int channel)
{
const struct m10bmc_sdata *tbl;
tbl = hw->bdata->tables[type];
if (!tbl)
return ERR_PTR(-EOPNOTSUPP);
return &tbl[channel];
}
static int do_sensor_read(struct m10bmc_hwmon *hw,
const struct m10bmc_sdata *data,
unsigned int regoff, long *val)
{
unsigned int regval;
int ret;
ret = m10bmc_sys_read(hw->m10bmc, regoff, ®val);
if (ret)
return ret;
/*
* BMC Firmware will return 0xdeadbeef if the sensor value is invalid
* at that time. This usually happens on sensor channels which connect
* to external pluggable modules, e.g. QSFP temperature and voltage.
* When the QSFP is unplugged from cage, driver will get 0xdeadbeef
* from their registers.
*/
if (regval == 0xdeadbeef)
return -ENODATA;
*val = regval * data->multiplier;
return 0;
}
static int m10bmc_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct m10bmc_hwmon *hw = dev_get_drvdata(dev);
unsigned int reg = 0, reg_hyst = 0;
const struct m10bmc_sdata *data;
long hyst, value;
int ret;
data = find_sensor_data(hw, type, channel);
if (IS_ERR(data))
return PTR_ERR(data);
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
reg = data->reg_input;
break;
case hwmon_temp_max_hyst:
reg_hyst = data->reg_hyst;
fallthrough;
case hwmon_temp_max:
reg = data->reg_max;
break;
case hwmon_temp_crit_hyst:
reg_hyst = data->reg_hyst;
fallthrough;
case hwmon_temp_crit:
reg = data->reg_crit;
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_input:
reg = data->reg_input;
break;
case hwmon_in_max:
reg = data->reg_max;
break;
case hwmon_in_crit:
reg = data->reg_crit;
break;
case hwmon_in_min:
reg = data->reg_min;
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_curr:
switch (attr) {
case hwmon_curr_input:
reg = data->reg_input;
break;
case hwmon_curr_max:
reg = data->reg_max;
break;
case hwmon_curr_crit:
reg = data->reg_crit;
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_power:
switch (attr) {
case hwmon_power_input:
reg = data->reg_input;
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
if (!reg)
return -EOPNOTSUPP;
ret = do_sensor_read(hw, data, reg, &value);
if (ret)
return ret;
if (reg_hyst) {
ret = do_sensor_read(hw, data, reg_hyst, &hyst);
if (ret)
return ret;
value -= hyst;
}
*val = value;
return 0;
}
static int m10bmc_hwmon_read_string(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
struct m10bmc_hwmon *hw = dev_get_drvdata(dev);
const struct m10bmc_sdata *data;
data = find_sensor_data(hw, type, channel);
if (IS_ERR(data))
return PTR_ERR(data);
*str = data->label;
return 0;
}
static const struct hwmon_ops m10bmc_hwmon_ops = {
.is_visible = m10bmc_hwmon_is_visible,
.read = m10bmc_hwmon_read,
.read_string = m10bmc_hwmon_read_string,
};
static int m10bmc_hwmon_probe(struct platform_device *pdev)
{
const struct platform_device_id *id = platform_get_device_id(pdev);
struct intel_m10bmc *m10bmc = dev_get_drvdata(pdev->dev.parent);
struct device *hwmon_dev, *dev = &pdev->dev;
struct m10bmc_hwmon *hw;
hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
if (!hw)
return -ENOMEM;
hw->dev = dev;
hw->m10bmc = m10bmc;
hw->bdata = (const struct m10bmc_hwmon_board_data *)id->driver_data;
hw->chip.info = hw->bdata->hinfo;
hw->chip.ops = &m10bmc_hwmon_ops;
hw->hw_name = devm_hwmon_sanitize_name(dev, id->name);
if (IS_ERR(hw->hw_name))
return PTR_ERR(hw->hw_name);
hwmon_dev = devm_hwmon_device_register_with_info(dev, hw->hw_name,
hw, &hw->chip, NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct platform_device_id intel_m10bmc_hwmon_ids[] = {
{
.name = "n3000bmc-hwmon",
.driver_data = (unsigned long)&n3000bmc_hwmon_bdata,
},
{
.name = "d5005bmc-hwmon",
.driver_data = (unsigned long)&d5005bmc_hwmon_bdata,
},
{
.name = "n5010bmc-hwmon",
.driver_data = (unsigned long)&n5010bmc_hwmon_bdata,
},
{
.name = "n6000bmc-hwmon",
.driver_data = (unsigned long)&n6000bmc_hwmon_bdata,
},
{ }
};
static struct platform_driver intel_m10bmc_hwmon_driver = {
.probe = m10bmc_hwmon_probe,
.driver = {
.name = "intel-m10-bmc-hwmon",
},
.id_table = intel_m10bmc_hwmon_ids,
};
module_platform_driver(intel_m10bmc_hwmon_driver);
MODULE_DEVICE_TABLE(platform, intel_m10bmc_hwmon_ids);
MODULE_AUTHOR("Intel Corporation");
MODULE_DESCRIPTION("Intel MAX 10 BMC hardware monitor");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(INTEL_M10_BMC_CORE);
|
linux-master
|
drivers/hwmon/intel-m10-bmc-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* smsc47m1.c - Part of lm_sensors, Linux kernel modules
* for hardware monitoring
*
* Supports the SMSC LPC47B27x, LPC47M10x, LPC47M112, LPC47M13x,
* LPC47M14x, LPC47M15x, LPC47M192, LPC47M292 and LPC47M997
* Super-I/O chips.
*
* Copyright (C) 2002 Mark D. Studebaker <[email protected]>
* Copyright (C) 2004-2007 Jean Delvare <[email protected]>
* Ported to Linux 2.6 by Gabriele Gorla <[email protected]>
* and Jean Delvare
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/acpi.h>
#include <linux/io.h>
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static struct platform_device *pdev;
#define DRVNAME "smsc47m1"
enum chips { smsc47m1, smsc47m2 };
/* Super-I/0 registers and commands */
#define REG 0x2e /* The register to read/write */
#define VAL 0x2f /* The value to read/write */
static inline void
superio_outb(int reg, int val)
{
outb(reg, REG);
outb(val, VAL);
}
static inline int
superio_inb(int reg)
{
outb(reg, REG);
return inb(VAL);
}
/* logical device for fans is 0x0A */
#define superio_select() superio_outb(0x07, 0x0A)
static inline int
superio_enter(void)
{
if (!request_muxed_region(REG, 2, DRVNAME))
return -EBUSY;
outb(0x55, REG);
return 0;
}
static inline void
superio_exit(void)
{
outb(0xAA, REG);
release_region(REG, 2);
}
#define SUPERIO_REG_ACT 0x30
#define SUPERIO_REG_BASE 0x60
#define SUPERIO_REG_DEVID 0x20
#define SUPERIO_REG_DEVREV 0x21
/* Logical device registers */
#define SMSC_EXTENT 0x80
/* nr is 0 or 1 in the macros below */
#define SMSC47M1_REG_ALARM 0x04
#define SMSC47M1_REG_TPIN(nr) (0x34 - (nr))
#define SMSC47M1_REG_PPIN(nr) (0x36 - (nr))
#define SMSC47M1_REG_FANDIV 0x58
static const u8 SMSC47M1_REG_FAN[3] = { 0x59, 0x5a, 0x6b };
static const u8 SMSC47M1_REG_FAN_PRELOAD[3] = { 0x5b, 0x5c, 0x6c };
static const u8 SMSC47M1_REG_PWM[3] = { 0x56, 0x57, 0x69 };
#define SMSC47M2_REG_ALARM6 0x09
#define SMSC47M2_REG_TPIN1 0x38
#define SMSC47M2_REG_TPIN2 0x37
#define SMSC47M2_REG_TPIN3 0x2d
#define SMSC47M2_REG_PPIN3 0x2c
#define SMSC47M2_REG_FANDIV3 0x6a
#define MIN_FROM_REG(reg, div) ((reg) >= 192 ? 0 : \
983040 / ((192 - (reg)) * (div)))
#define FAN_FROM_REG(reg, div, preload) ((reg) <= (preload) || (reg) == 255 ? \
0 : \
983040 / (((reg) - (preload)) * (div)))
#define DIV_FROM_REG(reg) (1 << (reg))
#define PWM_FROM_REG(reg) (((reg) & 0x7E) << 1)
#define PWM_EN_FROM_REG(reg) ((~(reg)) & 0x01)
#define PWM_TO_REG(reg) (((reg) >> 1) & 0x7E)
struct smsc47m1_data {
unsigned short addr;
const char *name;
enum chips type;
struct device *hwmon_dev;
struct mutex update_lock;
unsigned long last_updated; /* In jiffies */
u8 fan[3]; /* Register value */
u8 fan_preload[3]; /* Register value */
u8 fan_div[3]; /* Register encoding, shifted right */
u8 alarms; /* Register encoding */
u8 pwm[3]; /* Register value (bit 0 is disable) */
};
struct smsc47m1_sio_data {
enum chips type;
u8 activate; /* Remember initial device state */
};
static inline int smsc47m1_read_value(struct smsc47m1_data *data, u8 reg)
{
return inb_p(data->addr + reg);
}
static inline void smsc47m1_write_value(struct smsc47m1_data *data, u8 reg,
u8 value)
{
outb_p(value, data->addr + reg);
}
static struct smsc47m1_data *smsc47m1_update_device(struct device *dev,
int init)
{
struct smsc47m1_data *data = dev_get_drvdata(dev);
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || init) {
int i, fan_nr;
fan_nr = data->type == smsc47m2 ? 3 : 2;
for (i = 0; i < fan_nr; i++) {
data->fan[i] = smsc47m1_read_value(data,
SMSC47M1_REG_FAN[i]);
data->fan_preload[i] = smsc47m1_read_value(data,
SMSC47M1_REG_FAN_PRELOAD[i]);
data->pwm[i] = smsc47m1_read_value(data,
SMSC47M1_REG_PWM[i]);
}
i = smsc47m1_read_value(data, SMSC47M1_REG_FANDIV);
data->fan_div[0] = (i >> 4) & 0x03;
data->fan_div[1] = i >> 6;
data->alarms = smsc47m1_read_value(data,
SMSC47M1_REG_ALARM) >> 6;
/* Clear alarms if needed */
if (data->alarms)
smsc47m1_write_value(data, SMSC47M1_REG_ALARM, 0xC0);
if (fan_nr >= 3) {
data->fan_div[2] = (smsc47m1_read_value(data,
SMSC47M2_REG_FANDIV3) >> 4) & 0x03;
data->alarms |= (smsc47m1_read_value(data,
SMSC47M2_REG_ALARM6) & 0x40) >> 4;
/* Clear alarm if needed */
if (data->alarms & 0x04)
smsc47m1_write_value(data,
SMSC47M2_REG_ALARM6,
0x40);
}
data->last_updated = jiffies;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t fan_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = smsc47m1_update_device(dev, 0);
int nr = attr->index;
/*
* This chip (stupidly) stops monitoring fan speed if PWM is
* enabled and duty cycle is 0%. This is fine if the monitoring
* and control concern the same fan, but troublesome if they are
* not (which could as well happen).
*/
int rpm = (data->pwm[nr] & 0x7F) == 0x00 ? 0 :
FAN_FROM_REG(data->fan[nr],
DIV_FROM_REG(data->fan_div[nr]),
data->fan_preload[nr]);
return sprintf(buf, "%d\n", rpm);
}
static ssize_t fan_min_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = smsc47m1_update_device(dev, 0);
int nr = attr->index;
int rpm = MIN_FROM_REG(data->fan_preload[nr],
DIV_FROM_REG(data->fan_div[nr]));
return sprintf(buf, "%d\n", rpm);
}
static ssize_t fan_div_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = smsc47m1_update_device(dev, 0);
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[attr->index]));
}
static ssize_t fan_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int bitnr = to_sensor_dev_attr(devattr)->index;
struct smsc47m1_data *data = smsc47m1_update_device(dev, 0);
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static ssize_t pwm_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = smsc47m1_update_device(dev, 0);
return sprintf(buf, "%d\n", PWM_FROM_REG(data->pwm[attr->index]));
}
static ssize_t pwm_en_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = smsc47m1_update_device(dev, 0);
return sprintf(buf, "%d\n", PWM_EN_FROM_REG(data->pwm[attr->index]));
}
static ssize_t alarms_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct smsc47m1_data *data = smsc47m1_update_device(dev, 0);
return sprintf(buf, "%d\n", data->alarms);
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = dev_get_drvdata(dev);
int nr = attr->index;
long rpmdiv;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
rpmdiv = val * DIV_FROM_REG(data->fan_div[nr]);
if (983040 > 192 * rpmdiv || 2 * rpmdiv > 983040) {
mutex_unlock(&data->update_lock);
return -EINVAL;
}
data->fan_preload[nr] = 192 - ((983040 + rpmdiv / 2) / rpmdiv);
smsc47m1_write_value(data, SMSC47M1_REG_FAN_PRELOAD[nr],
data->fan_preload[nr]);
mutex_unlock(&data->update_lock);
return count;
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan clock divider. This follows the principle
* of least surprise; the user doesn't expect the fan minimum to change just
* because the divider changed.
*/
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = dev_get_drvdata(dev);
int nr = attr->index;
long new_div;
int err;
long tmp;
u8 old_div = DIV_FROM_REG(data->fan_div[nr]);
err = kstrtol(buf, 10, &new_div);
if (err)
return err;
if (new_div == old_div) /* No change */
return count;
mutex_lock(&data->update_lock);
switch (new_div) {
case 1:
data->fan_div[nr] = 0;
break;
case 2:
data->fan_div[nr] = 1;
break;
case 4:
data->fan_div[nr] = 2;
break;
case 8:
data->fan_div[nr] = 3;
break;
default:
mutex_unlock(&data->update_lock);
return -EINVAL;
}
switch (nr) {
case 0:
case 1:
tmp = smsc47m1_read_value(data, SMSC47M1_REG_FANDIV)
& ~(0x03 << (4 + 2 * nr));
tmp |= data->fan_div[nr] << (4 + 2 * nr);
smsc47m1_write_value(data, SMSC47M1_REG_FANDIV, tmp);
break;
case 2:
tmp = smsc47m1_read_value(data, SMSC47M2_REG_FANDIV3) & 0xCF;
tmp |= data->fan_div[2] << 4;
smsc47m1_write_value(data, SMSC47M2_REG_FANDIV3, tmp);
break;
default:
BUG();
}
/* Preserve fan min */
tmp = 192 - (old_div * (192 - data->fan_preload[nr])
+ new_div / 2) / new_div;
data->fan_preload[nr] = clamp_val(tmp, 0, 191);
smsc47m1_write_value(data, SMSC47M1_REG_FAN_PRELOAD[nr],
data->fan_preload[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = dev_get_drvdata(dev);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
if (val < 0 || val > 255)
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm[nr] &= 0x81; /* Preserve additional bits */
data->pwm[nr] |= PWM_TO_REG(val);
smsc47m1_write_value(data, SMSC47M1_REG_PWM[nr],
data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm_en_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47m1_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm[nr] &= 0xFE; /* preserve the other bits */
data->pwm[nr] |= !val;
smsc47m1_write_value(data, SMSC47M1_REG_PWM[nr],
data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, fan_alarm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_en, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, fan_alarm, 1);
static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_en, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan, 2);
static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
static SENSOR_DEVICE_ATTR_RW(fan3_div, fan_div, 2);
static SENSOR_DEVICE_ATTR_RO(fan3_alarm, fan_alarm, 2);
static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_en, 2);
static DEVICE_ATTR_RO(alarms);
static ssize_t name_show(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct smsc47m1_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR_RO(name);
static struct attribute *smsc47m1_attributes_fan1[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group smsc47m1_group_fan1 = {
.attrs = smsc47m1_attributes_fan1,
};
static struct attribute *smsc47m1_attributes_fan2[] = {
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group smsc47m1_group_fan2 = {
.attrs = smsc47m1_attributes_fan2,
};
static struct attribute *smsc47m1_attributes_fan3[] = {
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_div.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group smsc47m1_group_fan3 = {
.attrs = smsc47m1_attributes_fan3,
};
static struct attribute *smsc47m1_attributes_pwm1[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
NULL
};
static const struct attribute_group smsc47m1_group_pwm1 = {
.attrs = smsc47m1_attributes_pwm1,
};
static struct attribute *smsc47m1_attributes_pwm2[] = {
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
NULL
};
static const struct attribute_group smsc47m1_group_pwm2 = {
.attrs = smsc47m1_attributes_pwm2,
};
static struct attribute *smsc47m1_attributes_pwm3[] = {
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
NULL
};
static const struct attribute_group smsc47m1_group_pwm3 = {
.attrs = smsc47m1_attributes_pwm3,
};
static struct attribute *smsc47m1_attributes[] = {
&dev_attr_alarms.attr,
&dev_attr_name.attr,
NULL
};
static const struct attribute_group smsc47m1_group = {
.attrs = smsc47m1_attributes,
};
static int __init smsc47m1_find(struct smsc47m1_sio_data *sio_data)
{
u8 val;
unsigned short addr;
int err;
err = superio_enter();
if (err)
return err;
val = force_id ? force_id : superio_inb(SUPERIO_REG_DEVID);
/*
* SMSC LPC47M10x/LPC47M112/LPC47M13x (device id 0x59), LPC47M14x
* (device id 0x5F) and LPC47B27x (device id 0x51) have fan control.
* The LPC47M15x and LPC47M192 chips "with hardware monitoring block"
* can do much more besides (device id 0x60).
* The LPC47M997 is undocumented, but seems to be compatible with
* the LPC47M192, and has the same device id.
* The LPC47M292 (device id 0x6B) is somewhat compatible, but it
* supports a 3rd fan, and the pin configuration registers are
* unfortunately different.
* The LPC47M233 has the same device id (0x6B) but is not compatible.
* We check the high bit of the device revision register to
* differentiate them.
*/
switch (val) {
case 0x51:
pr_info("Found SMSC LPC47B27x\n");
sio_data->type = smsc47m1;
break;
case 0x59:
pr_info("Found SMSC LPC47M10x/LPC47M112/LPC47M13x\n");
sio_data->type = smsc47m1;
break;
case 0x5F:
pr_info("Found SMSC LPC47M14x\n");
sio_data->type = smsc47m1;
break;
case 0x60:
pr_info("Found SMSC LPC47M15x/LPC47M192/LPC47M997\n");
sio_data->type = smsc47m1;
break;
case 0x6B:
if (superio_inb(SUPERIO_REG_DEVREV) & 0x80) {
pr_debug("Found SMSC LPC47M233, unsupported\n");
superio_exit();
return -ENODEV;
}
pr_info("Found SMSC LPC47M292\n");
sio_data->type = smsc47m2;
break;
default:
superio_exit();
return -ENODEV;
}
superio_select();
addr = (superio_inb(SUPERIO_REG_BASE) << 8)
| superio_inb(SUPERIO_REG_BASE + 1);
if (addr == 0) {
pr_info("Device address not set, will not use\n");
superio_exit();
return -ENODEV;
}
/*
* Enable only if address is set (needed at least on the
* Compaq Presario S4000NX)
*/
sio_data->activate = superio_inb(SUPERIO_REG_ACT);
if ((sio_data->activate & 0x01) == 0) {
pr_info("Enabling device\n");
superio_outb(SUPERIO_REG_ACT, sio_data->activate | 0x01);
}
superio_exit();
return addr;
}
/* Restore device to its initial state */
static void smsc47m1_restore(const struct smsc47m1_sio_data *sio_data)
{
if ((sio_data->activate & 0x01) == 0) {
if (!superio_enter()) {
superio_select();
pr_info("Disabling device\n");
superio_outb(SUPERIO_REG_ACT, sio_data->activate);
superio_exit();
} else {
pr_warn("Failed to disable device\n");
}
}
}
#define CHECK 1
#define REQUEST 2
/*
* This function can be used to:
* - test for resource conflicts with ACPI
* - request the resources
* We only allocate the I/O ports we really need, to minimize the risk of
* conflicts with ACPI or with other drivers.
*/
static int __init smsc47m1_handle_resources(unsigned short address,
enum chips type, int action,
struct device *dev)
{
static const u8 ports_m1[] = {
/* register, region length */
0x04, 1,
0x33, 4,
0x56, 7,
};
static const u8 ports_m2[] = {
/* register, region length */
0x04, 1,
0x09, 1,
0x2c, 2,
0x35, 4,
0x56, 7,
0x69, 4,
};
int i, ports_size, err;
const u8 *ports;
switch (type) {
case smsc47m1:
default:
ports = ports_m1;
ports_size = ARRAY_SIZE(ports_m1);
break;
case smsc47m2:
ports = ports_m2;
ports_size = ARRAY_SIZE(ports_m2);
break;
}
for (i = 0; i + 1 < ports_size; i += 2) {
unsigned short start = address + ports[i];
unsigned short len = ports[i + 1];
switch (action) {
case CHECK:
/* Only check for conflicts */
err = acpi_check_region(start, len, DRVNAME);
if (err)
return err;
break;
case REQUEST:
/* Request the resources */
if (!devm_request_region(dev, start, len, DRVNAME)) {
dev_err(dev,
"Region 0x%x-0x%x already in use!\n",
start, start + len);
return -EBUSY;
}
break;
}
}
return 0;
}
static void smsc47m1_remove_files(struct device *dev)
{
sysfs_remove_group(&dev->kobj, &smsc47m1_group);
sysfs_remove_group(&dev->kobj, &smsc47m1_group_fan1);
sysfs_remove_group(&dev->kobj, &smsc47m1_group_fan2);
sysfs_remove_group(&dev->kobj, &smsc47m1_group_fan3);
sysfs_remove_group(&dev->kobj, &smsc47m1_group_pwm1);
sysfs_remove_group(&dev->kobj, &smsc47m1_group_pwm2);
sysfs_remove_group(&dev->kobj, &smsc47m1_group_pwm3);
}
static int __init smsc47m1_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct smsc47m1_sio_data *sio_data = dev_get_platdata(dev);
struct smsc47m1_data *data;
struct resource *res;
int err;
int fan1, fan2, fan3, pwm1, pwm2, pwm3;
static const char * const names[] = {
"smsc47m1",
"smsc47m2",
};
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
err = smsc47m1_handle_resources(res->start, sio_data->type,
REQUEST, dev);
if (err < 0)
return err;
data = devm_kzalloc(dev, sizeof(struct smsc47m1_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->addr = res->start;
data->type = sio_data->type;
data->name = names[sio_data->type];
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
/*
* If no function is properly configured, there's no point in
* actually registering the chip.
*/
pwm1 = (smsc47m1_read_value(data, SMSC47M1_REG_PPIN(0)) & 0x05)
== 0x04;
pwm2 = (smsc47m1_read_value(data, SMSC47M1_REG_PPIN(1)) & 0x05)
== 0x04;
if (data->type == smsc47m2) {
fan1 = (smsc47m1_read_value(data, SMSC47M2_REG_TPIN1)
& 0x0d) == 0x09;
fan2 = (smsc47m1_read_value(data, SMSC47M2_REG_TPIN2)
& 0x0d) == 0x09;
fan3 = (smsc47m1_read_value(data, SMSC47M2_REG_TPIN3)
& 0x0d) == 0x0d;
pwm3 = (smsc47m1_read_value(data, SMSC47M2_REG_PPIN3)
& 0x0d) == 0x08;
} else {
fan1 = (smsc47m1_read_value(data, SMSC47M1_REG_TPIN(0))
& 0x05) == 0x05;
fan2 = (smsc47m1_read_value(data, SMSC47M1_REG_TPIN(1))
& 0x05) == 0x05;
fan3 = 0;
pwm3 = 0;
}
if (!(fan1 || fan2 || fan3 || pwm1 || pwm2 || pwm3)) {
dev_warn(dev, "Device not configured, will not use\n");
return -ENODEV;
}
/*
* Some values (fan min, clock dividers, pwm registers) may be
* needed before any update is triggered, so we better read them
* at least once here. We don't usually do it that way, but in
* this particular case, manually reading 5 registers out of 8
* doesn't make much sense and we're better using the existing
* function.
*/
smsc47m1_update_device(dev, 1);
/* Register sysfs hooks */
if (fan1) {
err = sysfs_create_group(&dev->kobj,
&smsc47m1_group_fan1);
if (err)
goto error_remove_files;
} else
dev_dbg(dev, "Fan 1 not enabled by hardware, skipping\n");
if (fan2) {
err = sysfs_create_group(&dev->kobj,
&smsc47m1_group_fan2);
if (err)
goto error_remove_files;
} else
dev_dbg(dev, "Fan 2 not enabled by hardware, skipping\n");
if (fan3) {
err = sysfs_create_group(&dev->kobj,
&smsc47m1_group_fan3);
if (err)
goto error_remove_files;
} else if (data->type == smsc47m2)
dev_dbg(dev, "Fan 3 not enabled by hardware, skipping\n");
if (pwm1) {
err = sysfs_create_group(&dev->kobj,
&smsc47m1_group_pwm1);
if (err)
goto error_remove_files;
} else
dev_dbg(dev, "PWM 1 not enabled by hardware, skipping\n");
if (pwm2) {
err = sysfs_create_group(&dev->kobj,
&smsc47m1_group_pwm2);
if (err)
goto error_remove_files;
} else
dev_dbg(dev, "PWM 2 not enabled by hardware, skipping\n");
if (pwm3) {
err = sysfs_create_group(&dev->kobj,
&smsc47m1_group_pwm3);
if (err)
goto error_remove_files;
} else if (data->type == smsc47m2)
dev_dbg(dev, "PWM 3 not enabled by hardware, skipping\n");
err = sysfs_create_group(&dev->kobj, &smsc47m1_group);
if (err)
goto error_remove_files;
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto error_remove_files;
}
return 0;
error_remove_files:
smsc47m1_remove_files(dev);
return err;
}
static int __exit smsc47m1_remove(struct platform_device *pdev)
{
struct smsc47m1_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
smsc47m1_remove_files(&pdev->dev);
return 0;
}
static struct platform_driver smsc47m1_driver = {
.driver = {
.name = DRVNAME,
},
.remove = __exit_p(smsc47m1_remove),
};
static int __init smsc47m1_device_add(unsigned short address,
const struct smsc47m1_sio_data *sio_data)
{
struct resource res = {
.start = address,
.end = address + SMSC_EXTENT - 1,
.name = DRVNAME,
.flags = IORESOURCE_IO,
};
int err;
err = smsc47m1_handle_resources(address, sio_data->type, CHECK, NULL);
if (err)
goto exit;
pdev = platform_device_alloc(DRVNAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add_data(pdev, sio_data,
sizeof(struct smsc47m1_sio_data));
if (err) {
pr_err("Platform data allocation failed\n");
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static int __init sm_smsc47m1_init(void)
{
int err;
unsigned short address;
struct smsc47m1_sio_data sio_data;
err = smsc47m1_find(&sio_data);
if (err < 0)
return err;
address = err;
/* Sets global pdev as a side effect */
err = smsc47m1_device_add(address, &sio_data);
if (err)
return err;
err = platform_driver_probe(&smsc47m1_driver, smsc47m1_probe);
if (err)
goto exit_device;
return 0;
exit_device:
platform_device_unregister(pdev);
smsc47m1_restore(&sio_data);
return err;
}
static void __exit sm_smsc47m1_exit(void)
{
platform_driver_unregister(&smsc47m1_driver);
smsc47m1_restore(dev_get_platdata(&pdev->dev));
platform_device_unregister(pdev);
}
MODULE_AUTHOR("Mark D. Studebaker <[email protected]>");
MODULE_DESCRIPTION("SMSC LPC47M1xx fan sensors driver");
MODULE_LICENSE("GPL");
module_init(sm_smsc47m1_init);
module_exit(sm_smsc47m1_exit);
|
linux-master
|
drivers/hwmon/smsc47m1.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm78.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (c) 1998, 1999 Frodo Looijaard <[email protected]>
* Copyright (c) 2007, 2011 Jean Delvare <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-vid.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#ifdef CONFIG_ISA
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/io.h>
#endif
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
0x2e, 0x2f, I2C_CLIENT_END };
enum chips { lm78, lm79 };
/* Many LM78 constants specified below */
/* Length of ISA address segment */
#define LM78_EXTENT 8
/* Where are the ISA address/data registers relative to the base address */
#define LM78_ADDR_REG_OFFSET 5
#define LM78_DATA_REG_OFFSET 6
/* The LM78 registers */
#define LM78_REG_IN_MAX(nr) (0x2b + (nr) * 2)
#define LM78_REG_IN_MIN(nr) (0x2c + (nr) * 2)
#define LM78_REG_IN(nr) (0x20 + (nr))
#define LM78_REG_FAN_MIN(nr) (0x3b + (nr))
#define LM78_REG_FAN(nr) (0x28 + (nr))
#define LM78_REG_TEMP 0x27
#define LM78_REG_TEMP_OVER 0x39
#define LM78_REG_TEMP_HYST 0x3a
#define LM78_REG_ALARM1 0x41
#define LM78_REG_ALARM2 0x42
#define LM78_REG_VID_FANDIV 0x47
#define LM78_REG_CONFIG 0x40
#define LM78_REG_CHIPID 0x49
#define LM78_REG_I2C_ADDR 0x48
/*
* Conversions. Rounding and limit checking is only done on the TO_REG
* variants.
*/
/*
* IN: mV (0V to 4.08V)
* REG: 16mV/bit
*/
static inline u8 IN_TO_REG(unsigned long val)
{
unsigned long nval = clamp_val(val, 0, 4080);
return (nval + 8) / 16;
}
#define IN_FROM_REG(val) ((val) * 16)
static inline u8 FAN_TO_REG(long rpm, int div)
{
if (rpm <= 0)
return 255;
if (rpm > 1350000)
return 1;
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
static inline int FAN_FROM_REG(u8 val, int div)
{
return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div);
}
/*
* TEMP: mC (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static inline s8 TEMP_TO_REG(long val)
{
int nval = clamp_val(val, -128000, 127000) ;
return nval < 0 ? (nval - 500) / 1000 : (nval + 500) / 1000;
}
static inline int TEMP_FROM_REG(s8 val)
{
return val * 1000;
}
#define DIV_FROM_REG(val) (1 << (val))
struct lm78_data {
struct i2c_client *client;
struct mutex lock;
enum chips type;
/* For ISA device only */
const char *name;
int isa_addr;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 in[7]; /* Register value */
u8 in_max[7]; /* Register value */
u8 in_min[7]; /* Register value */
u8 fan[3]; /* Register value */
u8 fan_min[3]; /* Register value */
s8 temp; /* Register value */
s8 temp_over; /* Register value */
s8 temp_hyst; /* Register value */
u8 fan_div[3]; /* Register encoding, shifted right */
u8 vid; /* Register encoding, combined */
u16 alarms; /* Register encoding, combined */
};
static int lm78_read_value(struct lm78_data *data, u8 reg);
static int lm78_write_value(struct lm78_data *data, u8 reg, u8 value);
static struct lm78_data *lm78_update_device(struct device *dev);
static void lm78_init_device(struct lm78_data *data);
/* 7 Voltages */
static ssize_t in_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", IN_FROM_REG(data->in[attr->index]));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[attr->index]));
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[attr->index]));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = IN_TO_REG(val);
lm78_write_value(data, LM78_REG_IN_MIN(nr), data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = IN_TO_REG(val);
lm78_write_value(data, LM78_REG_IN_MAX(nr), data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, in, 5);
static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, in, 6);
static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
/* Temperature */
static ssize_t temp1_input_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp));
}
static ssize_t temp1_max_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_over));
}
static ssize_t temp1_max_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
struct lm78_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_over = TEMP_TO_REG(val);
lm78_write_value(data, LM78_REG_TEMP_OVER, data->temp_over);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp1_max_hyst_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_hyst));
}
static ssize_t temp1_max_hyst_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct lm78_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_hyst = TEMP_TO_REG(val);
lm78_write_value(data, LM78_REG_TEMP_HYST, data->temp_hyst);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RO(temp1_input);
static DEVICE_ATTR_RW(temp1_max);
static DEVICE_ATTR_RW(temp1_max_hyst);
/* 3 Fans */
static ssize_t fan_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = lm78_update_device(dev);
int nr = attr->index;
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = lm78_update_device(dev);
int nr = attr->index;
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
lm78_write_value(data, LM78_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_div_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[attr->index]));
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t fan_div_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm78_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long min;
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
min = FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr]));
switch (val) {
case 1:
data->fan_div[nr] = 0;
break;
case 2:
data->fan_div[nr] = 1;
break;
case 4:
data->fan_div[nr] = 2;
break;
case 8:
data->fan_div[nr] = 3;
break;
default:
dev_err(dev,
"fan_div value %ld not supported. Choose one of 1, 2, 4 or 8!\n",
val);
mutex_unlock(&data->update_lock);
return -EINVAL;
}
reg = lm78_read_value(data, LM78_REG_VID_FANDIV);
switch (nr) {
case 0:
reg = (reg & 0xcf) | (data->fan_div[nr] << 4);
break;
case 1:
reg = (reg & 0x3f) | (data->fan_div[nr] << 6);
break;
}
lm78_write_value(data, LM78_REG_VID_FANDIV, reg);
data->fan_min[nr] =
FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
lm78_write_value(data, LM78_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan, 2);
static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
/* Fan 3 divisor is locked in H/W */
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_div, fan_div, 2);
/* VID */
static ssize_t cpu0_vid_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, 82));
}
static DEVICE_ATTR_RO(cpu0_vid);
/* Alarms */
static ssize_t alarms_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct lm78_data *data = lm78_update_device(dev);
return sprintf(buf, "%u\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t alarm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct lm78_data *data = lm78_update_device(dev);
int nr = to_sensor_dev_attr(da)->index;
return sprintf(buf, "%u\n", (data->alarms >> nr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 9);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 10);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
static struct attribute *lm78_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&dev_attr_temp1_input.attr,
&dev_attr_temp1_max.attr,
&dev_attr_temp1_max_hyst.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_div.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_cpu0_vid.attr,
NULL
};
ATTRIBUTE_GROUPS(lm78);
/*
* ISA related code
*/
#ifdef CONFIG_ISA
/* ISA device, if found */
static struct platform_device *pdev;
static unsigned short isa_address = 0x290;
static struct lm78_data *lm78_data_if_isa(void)
{
return pdev ? platform_get_drvdata(pdev) : NULL;
}
/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
static int lm78_alias_detect(struct i2c_client *client, u8 chipid)
{
struct lm78_data *isa;
int i;
if (!pdev) /* No ISA chip */
return 0;
isa = platform_get_drvdata(pdev);
if (lm78_read_value(isa, LM78_REG_I2C_ADDR) != client->addr)
return 0; /* Address doesn't match */
if ((lm78_read_value(isa, LM78_REG_CHIPID) & 0xfe) != (chipid & 0xfe))
return 0; /* Chip type doesn't match */
/*
* We compare all the limit registers, the config register and the
* interrupt mask registers
*/
for (i = 0x2b; i <= 0x3d; i++) {
if (lm78_read_value(isa, i) !=
i2c_smbus_read_byte_data(client, i))
return 0;
}
if (lm78_read_value(isa, LM78_REG_CONFIG) !=
i2c_smbus_read_byte_data(client, LM78_REG_CONFIG))
return 0;
for (i = 0x43; i <= 0x46; i++) {
if (lm78_read_value(isa, i) !=
i2c_smbus_read_byte_data(client, i))
return 0;
}
return 1;
}
#else /* !CONFIG_ISA */
static int lm78_alias_detect(struct i2c_client *client, u8 chipid)
{
return 0;
}
static struct lm78_data *lm78_data_if_isa(void)
{
return NULL;
}
#endif /* CONFIG_ISA */
static int lm78_i2c_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
int i;
struct lm78_data *isa = lm78_data_if_isa();
const char *client_name;
struct i2c_adapter *adapter = client->adapter;
int address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/*
* We block updates of the ISA device to minimize the risk of
* concurrent access to the same LM78 chip through different
* interfaces.
*/
if (isa)
mutex_lock(&isa->update_lock);
if ((i2c_smbus_read_byte_data(client, LM78_REG_CONFIG) & 0x80)
|| i2c_smbus_read_byte_data(client, LM78_REG_I2C_ADDR) != address)
goto err_nodev;
/* Explicitly prevent the misdetection of Winbond chips */
i = i2c_smbus_read_byte_data(client, 0x4f);
if (i == 0xa3 || i == 0x5c)
goto err_nodev;
/* Determine the chip type. */
i = i2c_smbus_read_byte_data(client, LM78_REG_CHIPID);
if (i == 0x00 || i == 0x20 /* LM78 */
|| i == 0x40) /* LM78-J */
client_name = "lm78";
else if ((i & 0xfe) == 0xc0)
client_name = "lm79";
else
goto err_nodev;
if (lm78_alias_detect(client, i)) {
dev_dbg(&adapter->dev,
"Device at 0x%02x appears to be the same as ISA device\n",
address);
goto err_nodev;
}
if (isa)
mutex_unlock(&isa->update_lock);
strscpy(info->type, client_name, I2C_NAME_SIZE);
return 0;
err_nodev:
if (isa)
mutex_unlock(&isa->update_lock);
return -ENODEV;
}
static const struct i2c_device_id lm78_i2c_id[];
static int lm78_i2c_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct lm78_data *data;
data = devm_kzalloc(dev, sizeof(struct lm78_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
data->type = i2c_match_id(lm78_i2c_id, client)->driver_data;
/* Initialize the LM78 chip */
lm78_init_device(data);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, lm78_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id lm78_i2c_id[] = {
{ "lm78", lm78 },
{ "lm79", lm79 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm78_i2c_id);
static struct i2c_driver lm78_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm78",
},
.probe = lm78_i2c_probe,
.id_table = lm78_i2c_id,
.detect = lm78_i2c_detect,
.address_list = normal_i2c,
};
/*
* The SMBus locks itself, but ISA access must be locked explicitly!
* We don't want to lock the whole ISA bus, so we lock each client
* separately.
* We ignore the LM78 BUSY flag at this moment - it could lead to deadlocks,
* would slow down the LM78 access and should not be necessary.
*/
static int lm78_read_value(struct lm78_data *data, u8 reg)
{
struct i2c_client *client = data->client;
#ifdef CONFIG_ISA
if (!client) { /* ISA device */
int res;
mutex_lock(&data->lock);
outb_p(reg, data->isa_addr + LM78_ADDR_REG_OFFSET);
res = inb_p(data->isa_addr + LM78_DATA_REG_OFFSET);
mutex_unlock(&data->lock);
return res;
} else
#endif
return i2c_smbus_read_byte_data(client, reg);
}
static int lm78_write_value(struct lm78_data *data, u8 reg, u8 value)
{
struct i2c_client *client = data->client;
#ifdef CONFIG_ISA
if (!client) { /* ISA device */
mutex_lock(&data->lock);
outb_p(reg, data->isa_addr + LM78_ADDR_REG_OFFSET);
outb_p(value, data->isa_addr + LM78_DATA_REG_OFFSET);
mutex_unlock(&data->lock);
return 0;
} else
#endif
return i2c_smbus_write_byte_data(client, reg, value);
}
static void lm78_init_device(struct lm78_data *data)
{
u8 config;
int i;
/* Start monitoring */
config = lm78_read_value(data, LM78_REG_CONFIG);
if ((config & 0x09) != 0x01)
lm78_write_value(data, LM78_REG_CONFIG,
(config & 0xf7) | 0x01);
/* A few vars need to be filled upon startup */
for (i = 0; i < 3; i++) {
data->fan_min[i] = lm78_read_value(data,
LM78_REG_FAN_MIN(i));
}
mutex_init(&data->update_lock);
}
static struct lm78_data *lm78_update_device(struct device *dev)
{
struct lm78_data *data = dev_get_drvdata(dev);
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
dev_dbg(dev, "Starting lm78 update\n");
for (i = 0; i <= 6; i++) {
data->in[i] =
lm78_read_value(data, LM78_REG_IN(i));
data->in_min[i] =
lm78_read_value(data, LM78_REG_IN_MIN(i));
data->in_max[i] =
lm78_read_value(data, LM78_REG_IN_MAX(i));
}
for (i = 0; i < 3; i++) {
data->fan[i] =
lm78_read_value(data, LM78_REG_FAN(i));
data->fan_min[i] =
lm78_read_value(data, LM78_REG_FAN_MIN(i));
}
data->temp = lm78_read_value(data, LM78_REG_TEMP);
data->temp_over =
lm78_read_value(data, LM78_REG_TEMP_OVER);
data->temp_hyst =
lm78_read_value(data, LM78_REG_TEMP_HYST);
i = lm78_read_value(data, LM78_REG_VID_FANDIV);
data->vid = i & 0x0f;
if (data->type == lm79)
data->vid |=
(lm78_read_value(data, LM78_REG_CHIPID) &
0x01) << 4;
else
data->vid |= 0x10;
data->fan_div[0] = (i >> 4) & 0x03;
data->fan_div[1] = i >> 6;
data->alarms = lm78_read_value(data, LM78_REG_ALARM1) +
(lm78_read_value(data, LM78_REG_ALARM2) << 8);
data->last_updated = jiffies;
data->valid = true;
data->fan_div[2] = 1;
}
mutex_unlock(&data->update_lock);
return data;
}
#ifdef CONFIG_ISA
static int lm78_isa_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device *hwmon_dev;
struct lm78_data *data;
struct resource *res;
/* Reserve the ISA region */
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(dev, res->start + LM78_ADDR_REG_OFFSET,
2, "lm78"))
return -EBUSY;
data = devm_kzalloc(dev, sizeof(struct lm78_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->lock);
data->isa_addr = res->start;
platform_set_drvdata(pdev, data);
if (lm78_read_value(data, LM78_REG_CHIPID) & 0x80) {
data->type = lm79;
data->name = "lm79";
} else {
data->type = lm78;
data->name = "lm78";
}
/* Initialize the LM78 chip */
lm78_init_device(data);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
data, lm78_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct platform_driver lm78_isa_driver = {
.driver = {
.name = "lm78",
},
.probe = lm78_isa_probe,
};
/* return 1 if a supported chip is found, 0 otherwise */
static int __init lm78_isa_found(unsigned short address)
{
int val, save, found = 0;
int port;
/*
* Some boards declare base+0 to base+7 as a PNP device, some base+4
* to base+7 and some base+5 to base+6. So we better request each port
* individually for the probing phase.
*/
for (port = address; port < address + LM78_EXTENT; port++) {
if (!request_region(port, 1, "lm78")) {
pr_debug("Failed to request port 0x%x\n", port);
goto release;
}
}
#define REALLY_SLOW_IO
/*
* We need the timeouts for at least some LM78-like
* chips. But only if we read 'undefined' registers.
*/
val = inb_p(address + 1);
if (inb_p(address + 2) != val
|| inb_p(address + 3) != val
|| inb_p(address + 7) != val)
goto release;
#undef REALLY_SLOW_IO
/*
* We should be able to change the 7 LSB of the address port. The
* MSB (busy flag) should be clear initially, set after the write.
*/
save = inb_p(address + LM78_ADDR_REG_OFFSET);
if (save & 0x80)
goto release;
val = ~save & 0x7f;
outb_p(val, address + LM78_ADDR_REG_OFFSET);
if (inb_p(address + LM78_ADDR_REG_OFFSET) != (val | 0x80)) {
outb_p(save, address + LM78_ADDR_REG_OFFSET);
goto release;
}
/* We found a device, now see if it could be an LM78 */
outb_p(LM78_REG_CONFIG, address + LM78_ADDR_REG_OFFSET);
val = inb_p(address + LM78_DATA_REG_OFFSET);
if (val & 0x80)
goto release;
outb_p(LM78_REG_I2C_ADDR, address + LM78_ADDR_REG_OFFSET);
val = inb_p(address + LM78_DATA_REG_OFFSET);
if (val < 0x03 || val > 0x77) /* Not a valid I2C address */
goto release;
/* The busy flag should be clear again */
if (inb_p(address + LM78_ADDR_REG_OFFSET) & 0x80)
goto release;
/* Explicitly prevent the misdetection of Winbond chips */
outb_p(0x4f, address + LM78_ADDR_REG_OFFSET);
val = inb_p(address + LM78_DATA_REG_OFFSET);
if (val == 0xa3 || val == 0x5c)
goto release;
/* Explicitly prevent the misdetection of ITE chips */
outb_p(0x58, address + LM78_ADDR_REG_OFFSET);
val = inb_p(address + LM78_DATA_REG_OFFSET);
if (val == 0x90)
goto release;
/* Determine the chip type */
outb_p(LM78_REG_CHIPID, address + LM78_ADDR_REG_OFFSET);
val = inb_p(address + LM78_DATA_REG_OFFSET);
if (val == 0x00 || val == 0x20 /* LM78 */
|| val == 0x40 /* LM78-J */
|| (val & 0xfe) == 0xc0) /* LM79 */
found = 1;
if (found)
pr_info("Found an %s chip at %#x\n",
val & 0x80 ? "LM79" : "LM78", (int)address);
release:
for (port--; port >= address; port--)
release_region(port, 1);
return found;
}
static int __init lm78_isa_device_add(unsigned short address)
{
struct resource res = {
.start = address,
.end = address + LM78_EXTENT - 1,
.name = "lm78",
.flags = IORESOURCE_IO,
};
int err;
pdev = platform_device_alloc("lm78", address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
pdev = NULL;
return err;
}
static int __init lm78_isa_register(void)
{
int res;
if (lm78_isa_found(isa_address)) {
res = platform_driver_register(&lm78_isa_driver);
if (res)
goto exit;
/* Sets global pdev as a side effect */
res = lm78_isa_device_add(isa_address);
if (res)
goto exit_unreg_isa_driver;
}
return 0;
exit_unreg_isa_driver:
platform_driver_unregister(&lm78_isa_driver);
exit:
return res;
}
static void lm78_isa_unregister(void)
{
if (pdev) {
platform_device_unregister(pdev);
platform_driver_unregister(&lm78_isa_driver);
}
}
#else /* !CONFIG_ISA */
static int __init lm78_isa_register(void)
{
return 0;
}
static void lm78_isa_unregister(void)
{
}
#endif /* CONFIG_ISA */
static int __init sm_lm78_init(void)
{
int res;
/*
* We register the ISA device first, so that we can skip the
* registration of an I2C interface to the same device.
*/
res = lm78_isa_register();
if (res)
goto exit;
res = i2c_add_driver(&lm78_driver);
if (res)
goto exit_unreg_isa_device;
return 0;
exit_unreg_isa_device:
lm78_isa_unregister();
exit:
return res;
}
static void __exit sm_lm78_exit(void)
{
lm78_isa_unregister();
i2c_del_driver(&lm78_driver);
}
MODULE_AUTHOR("Frodo Looijaard, Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("LM78/LM79 driver");
MODULE_LICENSE("GPL");
module_init(sm_lm78_init);
module_exit(sm_lm78_exit);
|
linux-master
|
drivers/hwmon/lm78.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADT7310/ADT7310 digital temperature sensor driver
*
* Copyright 2012-2013 Analog Devices Inc.
* Author: Lars-Peter Clausen <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <asm/unaligned.h>
#include "adt7x10.h"
#define ADT7310_STATUS 0
#define ADT7310_CONFIG 1
#define ADT7310_TEMPERATURE 2
#define ADT7310_ID 3
#define ADT7310_T_CRIT 4
#define ADT7310_T_HYST 5
#define ADT7310_T_ALARM_HIGH 6
#define ADT7310_T_ALARM_LOW 7
static const u8 adt7310_reg_table[] = {
[ADT7X10_TEMPERATURE] = ADT7310_TEMPERATURE,
[ADT7X10_STATUS] = ADT7310_STATUS,
[ADT7X10_CONFIG] = ADT7310_CONFIG,
[ADT7X10_T_ALARM_HIGH] = ADT7310_T_ALARM_HIGH,
[ADT7X10_T_ALARM_LOW] = ADT7310_T_ALARM_LOW,
[ADT7X10_T_CRIT] = ADT7310_T_CRIT,
[ADT7X10_T_HYST] = ADT7310_T_HYST,
[ADT7X10_ID] = ADT7310_ID,
};
#define ADT7310_CMD_REG_OFFSET 3
#define ADT7310_CMD_READ 0x40
#define AD7310_COMMAND(reg) (adt7310_reg_table[(reg)] << ADT7310_CMD_REG_OFFSET)
static int adt7310_spi_read_word(struct spi_device *spi, u8 reg)
{
return spi_w8r16be(spi, AD7310_COMMAND(reg) | ADT7310_CMD_READ);
}
static int adt7310_spi_write_word(struct spi_device *spi, u8 reg, u16 data)
{
u8 buf[3];
buf[0] = AD7310_COMMAND(reg);
put_unaligned_be16(data, &buf[1]);
return spi_write(spi, buf, sizeof(buf));
}
static int adt7310_spi_read_byte(struct spi_device *spi, u8 reg)
{
return spi_w8r8(spi, AD7310_COMMAND(reg) | ADT7310_CMD_READ);
}
static int adt7310_spi_write_byte(struct spi_device *spi, u8 reg, u8 data)
{
u8 buf[2];
buf[0] = AD7310_COMMAND(reg);
buf[1] = data;
return spi_write(spi, buf, sizeof(buf));
}
static bool adt7310_regmap_is_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case ADT7X10_TEMPERATURE:
case ADT7X10_STATUS:
return true;
default:
return false;
}
}
static int adt7310_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct spi_device *spi = context;
int regval;
switch (reg) {
case ADT7X10_TEMPERATURE:
case ADT7X10_T_ALARM_HIGH:
case ADT7X10_T_ALARM_LOW:
case ADT7X10_T_CRIT:
regval = adt7310_spi_read_word(spi, reg);
break;
default:
regval = adt7310_spi_read_byte(spi, reg);
break;
}
if (regval < 0)
return regval;
*val = regval;
return 0;
}
static int adt7310_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct spi_device *spi = context;
int ret;
switch (reg) {
case ADT7X10_TEMPERATURE:
case ADT7X10_T_ALARM_HIGH:
case ADT7X10_T_ALARM_LOW:
case ADT7X10_T_CRIT:
ret = adt7310_spi_write_word(spi, reg, val);
break;
default:
ret = adt7310_spi_write_byte(spi, reg, val);
break;
}
return ret;
}
static const struct regmap_config adt7310_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = adt7310_regmap_is_volatile,
.reg_read = adt7310_reg_read,
.reg_write = adt7310_reg_write,
};
static int adt7310_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
regmap = devm_regmap_init(&spi->dev, NULL, spi, &adt7310_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adt7x10_probe(&spi->dev, spi_get_device_id(spi)->name, spi->irq,
regmap);
}
static const struct spi_device_id adt7310_id[] = {
{ "adt7310", 0 },
{ "adt7320", 0 },
{}
};
MODULE_DEVICE_TABLE(spi, adt7310_id);
static struct spi_driver adt7310_driver = {
.driver = {
.name = "adt7310",
.pm = pm_sleep_ptr(&adt7x10_dev_pm_ops),
},
.probe = adt7310_spi_probe,
.id_table = adt7310_id,
};
module_spi_driver(adt7310_driver);
MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");
MODULE_DESCRIPTION("ADT7310/ADT7320 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/adt7310.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* emc2103.c - Support for SMSC EMC2103
* Copyright (c) 2010 SMSC
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
/* Addresses scanned */
static const unsigned short normal_i2c[] = { 0x2E, I2C_CLIENT_END };
static const u8 REG_TEMP[4] = { 0x00, 0x02, 0x04, 0x06 };
static const u8 REG_TEMP_MIN[4] = { 0x3c, 0x38, 0x39, 0x3a };
static const u8 REG_TEMP_MAX[4] = { 0x34, 0x30, 0x31, 0x32 };
#define REG_CONF1 0x20
#define REG_TEMP_MAX_ALARM 0x24
#define REG_TEMP_MIN_ALARM 0x25
#define REG_FAN_CONF1 0x42
#define REG_FAN_TARGET_LO 0x4c
#define REG_FAN_TARGET_HI 0x4d
#define REG_FAN_TACH_HI 0x4e
#define REG_FAN_TACH_LO 0x4f
#define REG_PRODUCT_ID 0xfd
#define REG_MFG_ID 0xfe
/* equation 4 from datasheet: rpm = (3932160 * multipler) / count */
#define FAN_RPM_FACTOR 3932160
/*
* 2103-2 and 2103-4's 3rd temperature sensor can be connected to two diodes
* in anti-parallel mode, and in this configuration both can be read
* independently (so we have 4 temperature inputs). The device can't
* detect if it's connected in this mode, so we have to manually enable
* it. Default is to leave the device in the state it's already in (-1).
* This parameter allows APD mode to be optionally forced on or off
*/
static int apd = -1;
module_param(apd, bint, 0);
MODULE_PARM_DESC(apd, "Set to zero to disable anti-parallel diode mode");
struct temperature {
s8 degrees;
u8 fraction; /* 0-7 multiples of 0.125 */
};
struct emc2103_data {
struct i2c_client *client;
const struct attribute_group *groups[4];
struct mutex update_lock;
bool valid; /* registers are valid */
bool fan_rpm_control;
int temp_count; /* num of temp sensors */
unsigned long last_updated; /* in jiffies */
struct temperature temp[4]; /* internal + 3 external */
s8 temp_min[4]; /* no fractional part */
s8 temp_max[4]; /* no fractional part */
u8 temp_min_alarm;
u8 temp_max_alarm;
u8 fan_multiplier;
u16 fan_tach;
u16 fan_target;
};
static int read_u8_from_i2c(struct i2c_client *client, u8 i2c_reg, u8 *output)
{
int status = i2c_smbus_read_byte_data(client, i2c_reg);
if (status < 0) {
dev_warn(&client->dev, "reg 0x%02x, err %d\n",
i2c_reg, status);
} else {
*output = status;
}
return status;
}
static void read_temp_from_i2c(struct i2c_client *client, u8 i2c_reg,
struct temperature *temp)
{
u8 degrees, fractional;
if (read_u8_from_i2c(client, i2c_reg, °rees) < 0)
return;
if (read_u8_from_i2c(client, i2c_reg + 1, &fractional) < 0)
return;
temp->degrees = degrees;
temp->fraction = (fractional & 0xe0) >> 5;
}
static void read_fan_from_i2c(struct i2c_client *client, u16 *output,
u8 hi_addr, u8 lo_addr)
{
u8 high_byte, lo_byte;
if (read_u8_from_i2c(client, hi_addr, &high_byte) < 0)
return;
if (read_u8_from_i2c(client, lo_addr, &lo_byte) < 0)
return;
*output = ((u16)high_byte << 5) | (lo_byte >> 3);
}
static void write_fan_target_to_i2c(struct i2c_client *client, u16 new_target)
{
u8 high_byte = (new_target & 0x1fe0) >> 5;
u8 low_byte = (new_target & 0x001f) << 3;
i2c_smbus_write_byte_data(client, REG_FAN_TARGET_LO, low_byte);
i2c_smbus_write_byte_data(client, REG_FAN_TARGET_HI, high_byte);
}
static void read_fan_config_from_i2c(struct i2c_client *client)
{
struct emc2103_data *data = i2c_get_clientdata(client);
u8 conf1;
if (read_u8_from_i2c(client, REG_FAN_CONF1, &conf1) < 0)
return;
data->fan_multiplier = 1 << ((conf1 & 0x60) >> 5);
data->fan_rpm_control = (conf1 & 0x80) != 0;
}
static struct emc2103_data *emc2103_update_device(struct device *dev)
{
struct emc2103_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
int i;
for (i = 0; i < data->temp_count; i++) {
read_temp_from_i2c(client, REG_TEMP[i], &data->temp[i]);
read_u8_from_i2c(client, REG_TEMP_MIN[i],
&data->temp_min[i]);
read_u8_from_i2c(client, REG_TEMP_MAX[i],
&data->temp_max[i]);
}
read_u8_from_i2c(client, REG_TEMP_MIN_ALARM,
&data->temp_min_alarm);
read_u8_from_i2c(client, REG_TEMP_MAX_ALARM,
&data->temp_max_alarm);
read_fan_from_i2c(client, &data->fan_tach,
REG_FAN_TACH_HI, REG_FAN_TACH_LO);
read_fan_from_i2c(client, &data->fan_target,
REG_FAN_TARGET_HI, REG_FAN_TARGET_LO);
read_fan_config_from_i2c(client);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t
temp_show(struct device *dev, struct device_attribute *da, char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = emc2103_update_device(dev);
int millidegrees = data->temp[nr].degrees * 1000
+ data->temp[nr].fraction * 125;
return sprintf(buf, "%d\n", millidegrees);
}
static ssize_t
temp_min_show(struct device *dev, struct device_attribute *da, char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = emc2103_update_device(dev);
int millidegrees = data->temp_min[nr] * 1000;
return sprintf(buf, "%d\n", millidegrees);
}
static ssize_t
temp_max_show(struct device *dev, struct device_attribute *da, char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = emc2103_update_device(dev);
int millidegrees = data->temp_max[nr] * 1000;
return sprintf(buf, "%d\n", millidegrees);
}
static ssize_t
temp_fault_show(struct device *dev, struct device_attribute *da, char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = emc2103_update_device(dev);
bool fault = (data->temp[nr].degrees == -128);
return sprintf(buf, "%d\n", fault ? 1 : 0);
}
static ssize_t
temp_min_alarm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = emc2103_update_device(dev);
bool alarm = data->temp_min_alarm & (1 << nr);
return sprintf(buf, "%d\n", alarm ? 1 : 0);
}
static ssize_t
temp_max_alarm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = emc2103_update_device(dev);
bool alarm = data->temp_max_alarm & (1 << nr);
return sprintf(buf, "%d\n", alarm ? 1 : 0);
}
static ssize_t temp_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int result = kstrtol(buf, 10, &val);
if (result < 0)
return result;
val = DIV_ROUND_CLOSEST(clamp_val(val, -63000, 127000), 1000);
mutex_lock(&data->update_lock);
data->temp_min[nr] = val;
i2c_smbus_write_byte_data(client, REG_TEMP_MIN[nr], val);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_max_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(da)->index;
struct emc2103_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int result = kstrtol(buf, 10, &val);
if (result < 0)
return result;
val = DIV_ROUND_CLOSEST(clamp_val(val, -63000, 127000), 1000);
mutex_lock(&data->update_lock);
data->temp_max[nr] = val;
i2c_smbus_write_byte_data(client, REG_TEMP_MAX[nr], val);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
fan1_input_show(struct device *dev, struct device_attribute *da, char *buf)
{
struct emc2103_data *data = emc2103_update_device(dev);
int rpm = 0;
if (data->fan_tach != 0)
rpm = (FAN_RPM_FACTOR * data->fan_multiplier) / data->fan_tach;
return sprintf(buf, "%d\n", rpm);
}
static ssize_t
fan1_div_show(struct device *dev, struct device_attribute *da, char *buf)
{
struct emc2103_data *data = emc2103_update_device(dev);
int fan_div = 8 / data->fan_multiplier;
return sprintf(buf, "%d\n", fan_div);
}
/*
* Note: we also update the fan target here, because its value is
* determined in part by the fan clock divider. This follows the principle
* of least surprise; the user doesn't expect the fan target to change just
* because the divider changed.
*/
static ssize_t fan1_div_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct emc2103_data *data = emc2103_update_device(dev);
struct i2c_client *client = data->client;
int new_range_bits, old_div = 8 / data->fan_multiplier;
long new_div;
int status = kstrtol(buf, 10, &new_div);
if (status < 0)
return status;
if (new_div == old_div) /* No change */
return count;
switch (new_div) {
case 1:
new_range_bits = 3;
break;
case 2:
new_range_bits = 2;
break;
case 4:
new_range_bits = 1;
break;
case 8:
new_range_bits = 0;
break;
default:
return -EINVAL;
}
mutex_lock(&data->update_lock);
status = i2c_smbus_read_byte_data(client, REG_FAN_CONF1);
if (status < 0) {
dev_dbg(&client->dev, "reg 0x%02x, err %d\n",
REG_FAN_CONF1, status);
mutex_unlock(&data->update_lock);
return status;
}
status &= 0x9F;
status |= (new_range_bits << 5);
i2c_smbus_write_byte_data(client, REG_FAN_CONF1, status);
data->fan_multiplier = 8 / new_div;
/* update fan target if high byte is not disabled */
if ((data->fan_target & 0x1fe0) != 0x1fe0) {
u16 new_target = (data->fan_target * old_div) / new_div;
data->fan_target = min(new_target, (u16)0x1fff);
write_fan_target_to_i2c(client, data->fan_target);
}
/* invalidate data to force re-read from hardware */
data->valid = false;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
fan1_target_show(struct device *dev, struct device_attribute *da, char *buf)
{
struct emc2103_data *data = emc2103_update_device(dev);
int rpm = 0;
/* high byte of 0xff indicates disabled so return 0 */
if ((data->fan_target != 0) && ((data->fan_target & 0x1fe0) != 0x1fe0))
rpm = (FAN_RPM_FACTOR * data->fan_multiplier)
/ data->fan_target;
return sprintf(buf, "%d\n", rpm);
}
static ssize_t fan1_target_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
struct emc2103_data *data = emc2103_update_device(dev);
struct i2c_client *client = data->client;
unsigned long rpm_target;
int result = kstrtoul(buf, 10, &rpm_target);
if (result < 0)
return result;
/* Datasheet states 16384 as maximum RPM target (table 3.2) */
rpm_target = clamp_val(rpm_target, 0, 16384);
mutex_lock(&data->update_lock);
if (rpm_target == 0)
data->fan_target = 0x1fff;
else
data->fan_target = clamp_val(
(FAN_RPM_FACTOR * data->fan_multiplier) / rpm_target,
0, 0x1fff);
write_fan_target_to_i2c(client, data->fan_target);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
fan1_fault_show(struct device *dev, struct device_attribute *da, char *buf)
{
struct emc2103_data *data = emc2103_update_device(dev);
bool fault = ((data->fan_tach & 0x1fe0) == 0x1fe0);
return sprintf(buf, "%d\n", fault ? 1 : 0);
}
static ssize_t
pwm1_enable_show(struct device *dev, struct device_attribute *da, char *buf)
{
struct emc2103_data *data = emc2103_update_device(dev);
return sprintf(buf, "%d\n", data->fan_rpm_control ? 3 : 0);
}
static ssize_t pwm1_enable_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
struct emc2103_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long new_value;
u8 conf_reg;
int result = kstrtol(buf, 10, &new_value);
if (result < 0)
return result;
mutex_lock(&data->update_lock);
switch (new_value) {
case 0:
data->fan_rpm_control = false;
break;
case 3:
data->fan_rpm_control = true;
break;
default:
count = -EINVAL;
goto err;
}
result = read_u8_from_i2c(client, REG_FAN_CONF1, &conf_reg);
if (result < 0) {
count = result;
goto err;
}
if (data->fan_rpm_control)
conf_reg |= 0x80;
else
conf_reg &= ~0x80;
i2c_smbus_write_byte_data(client, REG_FAN_CONF1, conf_reg);
err:
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_fault, temp_fault, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, temp_min_alarm, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, temp_max_alarm, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, temp_fault, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_min_alarm, temp_min_alarm, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, temp_max_alarm, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
static SENSOR_DEVICE_ATTR_RO(temp3_fault, temp_fault, 2);
static SENSOR_DEVICE_ATTR_RO(temp3_min_alarm, temp_min_alarm, 2);
static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, temp_max_alarm, 2);
static SENSOR_DEVICE_ATTR_RO(temp4_input, temp, 3);
static SENSOR_DEVICE_ATTR_RW(temp4_min, temp_min, 3);
static SENSOR_DEVICE_ATTR_RW(temp4_max, temp_max, 3);
static SENSOR_DEVICE_ATTR_RO(temp4_fault, temp_fault, 3);
static SENSOR_DEVICE_ATTR_RO(temp4_min_alarm, temp_min_alarm, 3);
static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, temp_max_alarm, 3);
static DEVICE_ATTR_RO(fan1_input);
static DEVICE_ATTR_RW(fan1_div);
static DEVICE_ATTR_RW(fan1_target);
static DEVICE_ATTR_RO(fan1_fault);
static DEVICE_ATTR_RW(pwm1_enable);
/* sensors present on all models */
static struct attribute *emc2103_attributes[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&dev_attr_fan1_input.attr,
&dev_attr_fan1_div.attr,
&dev_attr_fan1_target.attr,
&dev_attr_fan1_fault.attr,
&dev_attr_pwm1_enable.attr,
NULL
};
/* extra temperature sensors only present on 2103-2 and 2103-4 */
static struct attribute *emc2103_attributes_temp3[] = {
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
NULL
};
/* extra temperature sensors only present on 2103-2 and 2103-4 in APD mode */
static struct attribute *emc2103_attributes_temp4[] = {
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_temp4_min.dev_attr.attr,
&sensor_dev_attr_temp4_max.dev_attr.attr,
&sensor_dev_attr_temp4_fault.dev_attr.attr,
&sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group emc2103_group = {
.attrs = emc2103_attributes,
};
static const struct attribute_group emc2103_temp3_group = {
.attrs = emc2103_attributes_temp3,
};
static const struct attribute_group emc2103_temp4_group = {
.attrs = emc2103_attributes_temp4,
};
static int
emc2103_probe(struct i2c_client *client)
{
struct emc2103_data *data;
struct device *hwmon_dev;
int status, idx = 0;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -EIO;
data = devm_kzalloc(&client->dev, sizeof(struct emc2103_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->client = client;
mutex_init(&data->update_lock);
/* 2103-2 and 2103-4 have 3 external diodes, 2103-1 has 1 */
status = i2c_smbus_read_byte_data(client, REG_PRODUCT_ID);
if (status == 0x24) {
/* 2103-1 only has 1 external diode */
data->temp_count = 2;
} else {
/* 2103-2 and 2103-4 have 3 or 4 external diodes */
status = i2c_smbus_read_byte_data(client, REG_CONF1);
if (status < 0) {
dev_dbg(&client->dev, "reg 0x%02x, err %d\n", REG_CONF1,
status);
return status;
}
/* detect current state of hardware */
data->temp_count = (status & 0x01) ? 4 : 3;
/* force APD state if module parameter is set */
if (apd == 0) {
/* force APD mode off */
data->temp_count = 3;
status &= ~(0x01);
i2c_smbus_write_byte_data(client, REG_CONF1, status);
} else if (apd == 1) {
/* force APD mode on */
data->temp_count = 4;
status |= 0x01;
i2c_smbus_write_byte_data(client, REG_CONF1, status);
}
}
/* sysfs hooks */
data->groups[idx++] = &emc2103_group;
if (data->temp_count >= 3)
data->groups[idx++] = &emc2103_temp3_group;
if (data->temp_count == 4)
data->groups[idx++] = &emc2103_temp4_group;
hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
client->name, data,
data->groups);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
dev_info(&client->dev, "%s: sensor '%s'\n",
dev_name(hwmon_dev), client->name);
return 0;
}
static const struct i2c_device_id emc2103_ids[] = {
{ "emc2103", 0, },
{ /* LIST END */ }
};
MODULE_DEVICE_TABLE(i2c, emc2103_ids);
/* Return 0 if detection is successful, -ENODEV otherwise */
static int
emc2103_detect(struct i2c_client *new_client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = new_client->adapter;
int manufacturer, product;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
manufacturer = i2c_smbus_read_byte_data(new_client, REG_MFG_ID);
if (manufacturer != 0x5D)
return -ENODEV;
product = i2c_smbus_read_byte_data(new_client, REG_PRODUCT_ID);
if ((product != 0x24) && (product != 0x26))
return -ENODEV;
strscpy(info->type, "emc2103", I2C_NAME_SIZE);
return 0;
}
static struct i2c_driver emc2103_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "emc2103",
},
.probe = emc2103_probe,
.id_table = emc2103_ids,
.detect = emc2103_detect,
.address_list = normal_i2c,
};
module_i2c_driver(emc2103_driver);
MODULE_AUTHOR("Steve Glendinning <[email protected]>");
MODULE_DESCRIPTION("SMSC EMC2103 hwmon driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/emc2103.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* tc654.c - Linux kernel modules for fan speed controller
*
* Copyright (C) 2016 Allied Telesis Labs NZ
*/
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/thermal.h>
#include <linux/util_macros.h>
enum tc654_regs {
TC654_REG_RPM1 = 0x00, /* RPM Output 1 */
TC654_REG_RPM2 = 0x01, /* RPM Output 2 */
TC654_REG_FAN_FAULT1 = 0x02, /* Fan Fault 1 Threshold */
TC654_REG_FAN_FAULT2 = 0x03, /* Fan Fault 2 Threshold */
TC654_REG_CONFIG = 0x04, /* Configuration */
TC654_REG_STATUS = 0x05, /* Status */
TC654_REG_DUTY_CYCLE = 0x06, /* Fan Speed Duty Cycle */
TC654_REG_MFR_ID = 0x07, /* Manufacturer Identification */
TC654_REG_VER_ID = 0x08, /* Version Identification */
};
/* Macros to easily index the registers */
#define TC654_REG_RPM(idx) (TC654_REG_RPM1 + (idx))
#define TC654_REG_FAN_FAULT(idx) (TC654_REG_FAN_FAULT1 + (idx))
/* Config register bits */
#define TC654_REG_CONFIG_RES BIT(6) /* Resolution Selection */
#define TC654_REG_CONFIG_DUTYC BIT(5) /* Duty Cycle Control */
#define TC654_REG_CONFIG_SDM BIT(0) /* Shutdown Mode */
/* Status register bits */
#define TC654_REG_STATUS_F2F BIT(1) /* Fan 2 Fault */
#define TC654_REG_STATUS_F1F BIT(0) /* Fan 1 Fault */
/* RPM resolution for RPM Output registers */
#define TC654_HIGH_RPM_RESOLUTION 25 /* 25 RPM resolution */
#define TC654_LOW_RPM_RESOLUTION 50 /* 50 RPM resolution */
/* Convert to the fan fault RPM threshold from register value */
#define TC654_FAN_FAULT_FROM_REG(val) ((val) * 50) /* 50 RPM resolution */
/* Convert to register value from the fan fault RPM threshold */
#define TC654_FAN_FAULT_TO_REG(val) (((val) / 50) & 0xff)
/* Register data is read (and cached) at most once per second. */
#define TC654_UPDATE_INTERVAL HZ
struct tc654_data {
struct i2c_client *client;
/* update mutex */
struct mutex update_lock;
/* tc654 register cache */
bool valid;
unsigned long last_updated; /* in jiffies */
u8 rpm_output[2]; /* The fan RPM data for fans 1 and 2 is then
* written to registers RPM1 and RPM2
*/
u8 fan_fault[2]; /* The Fan Fault Threshold Registers are used to
* set the fan fault threshold levels for fan 1
* and fan 2
*/
u8 config; /* The Configuration Register is an 8-bit read/
* writable multi-function control register
* 7: Fan Fault Clear
* 1 = Clear Fan Fault
* 0 = Normal Operation (default)
* 6: Resolution Selection for RPM Output Registers
* RPM Output Registers (RPM1 and RPM2) will be
* set for
* 1 = 25 RPM (9-bit) resolution
* 0 = 50 RPM (8-bit) resolution (default)
* 5: Duty Cycle Control Method
* The V OUT duty cycle will be controlled via
* 1 = the SMBus interface.
* 0 = via the V IN analog input pin. (default)
* 4,3: Fan 2 Pulses Per Rotation
* 00 = 1
* 01 = 2 (default)
* 10 = 4
* 11 = 8
* 2,1: Fan 1 Pulses Per Rotation
* 00 = 1
* 01 = 2 (default)
* 10 = 4
* 11 = 8
* 0: Shutdown Mode
* 1 = Shutdown mode.
* 0 = Normal operation. (default)
*/
u8 status; /* The Status register provides all the information
* about what is going on within the TC654/TC655
* devices.
* 7,6: Unimplemented, Read as '0'
* 5: Over-Temperature Fault Condition
* 1 = Over-Temperature condition has occurred
* 0 = Normal operation. V IN is less than 2.6V
* 4: RPM2 Counter Overflow
* 1 = Fault condition
* 0 = Normal operation
* 3: RPM1 Counter Overflow
* 1 = Fault condition
* 0 = Normal operation
* 2: V IN Input Status
* 1 = V IN is open
* 0 = Normal operation. voltage present at V IN
* 1: Fan 2 Fault
* 1 = Fault condition
* 0 = Normal operation
* 0: Fan 1 Fault
* 1 = Fault condition
* 0 = Normal operation
*/
u8 duty_cycle; /* The DUTY_CYCLE register is a 4-bit read/
* writable register used to control the duty
* cycle of the V OUT output.
*/
};
/* helper to grab and cache data, at most one time per second */
static struct tc654_data *tc654_update_client(struct device *dev)
{
struct tc654_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret = 0;
mutex_lock(&data->update_lock);
if (time_before(jiffies, data->last_updated + TC654_UPDATE_INTERVAL) &&
likely(data->valid))
goto out;
ret = i2c_smbus_read_byte_data(client, TC654_REG_RPM(0));
if (ret < 0)
goto out;
data->rpm_output[0] = ret;
ret = i2c_smbus_read_byte_data(client, TC654_REG_RPM(1));
if (ret < 0)
goto out;
data->rpm_output[1] = ret;
ret = i2c_smbus_read_byte_data(client, TC654_REG_FAN_FAULT(0));
if (ret < 0)
goto out;
data->fan_fault[0] = ret;
ret = i2c_smbus_read_byte_data(client, TC654_REG_FAN_FAULT(1));
if (ret < 0)
goto out;
data->fan_fault[1] = ret;
ret = i2c_smbus_read_byte_data(client, TC654_REG_CONFIG);
if (ret < 0)
goto out;
data->config = ret;
ret = i2c_smbus_read_byte_data(client, TC654_REG_STATUS);
if (ret < 0)
goto out;
data->status = ret;
ret = i2c_smbus_read_byte_data(client, TC654_REG_DUTY_CYCLE);
if (ret < 0)
goto out;
data->duty_cycle = ret & 0x0f;
data->last_updated = jiffies;
data->valid = true;
out:
mutex_unlock(&data->update_lock);
if (ret < 0) /* upon error, encode it in return value */
data = ERR_PTR(ret);
return data;
}
/*
* sysfs attributes
*/
static ssize_t fan_show(struct device *dev, struct device_attribute *da,
char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct tc654_data *data = tc654_update_client(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
if (data->config & TC654_REG_CONFIG_RES)
val = data->rpm_output[nr] * TC654_HIGH_RPM_RESOLUTION;
else
val = data->rpm_output[nr] * TC654_LOW_RPM_RESOLUTION;
return sprintf(buf, "%d\n", val);
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *da,
char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct tc654_data *data = tc654_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
TC654_FAN_FAULT_FROM_REG(data->fan_fault[nr]));
}
static ssize_t fan_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(da)->index;
struct tc654_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
val = clamp_val(val, 0, 12750);
mutex_lock(&data->update_lock);
data->fan_fault[nr] = TC654_FAN_FAULT_TO_REG(val);
ret = i2c_smbus_write_byte_data(client, TC654_REG_FAN_FAULT(nr),
data->fan_fault[nr]);
mutex_unlock(&data->update_lock);
return ret < 0 ? ret : count;
}
static ssize_t fan_alarm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct tc654_data *data = tc654_update_client(dev);
int val;
if (IS_ERR(data))
return PTR_ERR(data);
if (nr == 0)
val = !!(data->status & TC654_REG_STATUS_F1F);
else
val = !!(data->status & TC654_REG_STATUS_F2F);
return sprintf(buf, "%d\n", val);
}
static const u8 TC654_FAN_PULSE_SHIFT[] = { 1, 3 };
static ssize_t fan_pulses_show(struct device *dev,
struct device_attribute *da, char *buf)
{
int nr = to_sensor_dev_attr(da)->index;
struct tc654_data *data = tc654_update_client(dev);
u8 val;
if (IS_ERR(data))
return PTR_ERR(data);
val = BIT((data->config >> TC654_FAN_PULSE_SHIFT[nr]) & 0x03);
return sprintf(buf, "%d\n", val);
}
static ssize_t fan_pulses_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(da)->index;
struct tc654_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 config;
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
switch (val) {
case 1:
config = 0;
break;
case 2:
config = 1;
break;
case 4:
config = 2;
break;
case 8:
config = 3;
break;
default:
return -EINVAL;
}
mutex_lock(&data->update_lock);
data->config &= ~(0x03 << TC654_FAN_PULSE_SHIFT[nr]);
data->config |= (config << TC654_FAN_PULSE_SHIFT[nr]);
ret = i2c_smbus_write_byte_data(client, TC654_REG_CONFIG, data->config);
mutex_unlock(&data->update_lock);
return ret < 0 ? ret : count;
}
static ssize_t pwm_mode_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct tc654_data *data = tc654_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", !!(data->config & TC654_REG_CONFIG_DUTYC));
}
static ssize_t pwm_mode_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct tc654_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
if (val != 0 && val != 1)
return -EINVAL;
mutex_lock(&data->update_lock);
if (val)
data->config |= TC654_REG_CONFIG_DUTYC;
else
data->config &= ~TC654_REG_CONFIG_DUTYC;
ret = i2c_smbus_write_byte_data(client, TC654_REG_CONFIG, data->config);
mutex_unlock(&data->update_lock);
return ret < 0 ? ret : count;
}
static const int tc654_pwm_map[16] = { 77, 88, 102, 112, 124, 136, 148, 160,
172, 184, 196, 207, 219, 231, 243, 255};
static ssize_t pwm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct tc654_data *data = tc654_update_client(dev);
int pwm;
if (IS_ERR(data))
return PTR_ERR(data);
if (data->config & TC654_REG_CONFIG_SDM)
pwm = 0;
else
pwm = tc654_pwm_map[data->duty_cycle];
return sprintf(buf, "%d\n", pwm);
}
static int _set_pwm(struct tc654_data *data, unsigned long val)
{
struct i2c_client *client = data->client;
int ret;
mutex_lock(&data->update_lock);
if (val == 0) {
data->config |= TC654_REG_CONFIG_SDM;
data->duty_cycle = 0;
} else {
data->config &= ~TC654_REG_CONFIG_SDM;
data->duty_cycle = val - 1;
}
ret = i2c_smbus_write_byte_data(client, TC654_REG_CONFIG, data->config);
if (ret < 0)
goto out;
ret = i2c_smbus_write_byte_data(client, TC654_REG_DUTY_CYCLE,
data->duty_cycle);
out:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct tc654_data *data = dev_get_drvdata(dev);
unsigned long val;
int ret;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
if (val > 255)
return -EINVAL;
if (val > 0)
val = find_closest(val, tc654_pwm_map, ARRAY_SIZE(tc654_pwm_map)) + 1;
ret = _set_pwm(data, val);
return ret < 0 ? ret : count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, fan_alarm, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, fan_alarm, 1);
static SENSOR_DEVICE_ATTR_RW(fan1_pulses, fan_pulses, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_pulses, fan_pulses, 1);
static SENSOR_DEVICE_ATTR_RW(pwm1_mode, pwm_mode, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
/* Driver data */
static struct attribute *tc654_attrs[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_pulses.dev_attr.attr,
&sensor_dev_attr_fan2_pulses.dev_attr.attr,
&sensor_dev_attr_pwm1_mode.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(tc654);
/*
* thermal cooling device functions
*
* Account for the "ShutDown Mode (SDM)" state by offsetting
* the 16 PWM duty cycle states by 1.
*
* State 0 = 0% PWM | Shutdown - Fan(s) are off
* State 1 = 30% PWM | duty_cycle = 0
* State 2 = ~35% PWM | duty_cycle = 1
* [...]
* State 15 = ~95% PWM | duty_cycle = 14
* State 16 = 100% PWM | duty_cycle = 15
*/
#define TC654_MAX_COOLING_STATE 16
static int tc654_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state)
{
*state = TC654_MAX_COOLING_STATE;
return 0;
}
static int tc654_get_cur_state(struct thermal_cooling_device *cdev, unsigned long *state)
{
struct tc654_data *data = tc654_update_client(cdev->devdata);
if (IS_ERR(data))
return PTR_ERR(data);
if (data->config & TC654_REG_CONFIG_SDM)
*state = 0; /* FAN is off */
else
*state = data->duty_cycle + 1; /* offset PWM States by 1 */
return 0;
}
static int tc654_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
{
struct tc654_data *data = tc654_update_client(cdev->devdata);
if (IS_ERR(data))
return PTR_ERR(data);
return _set_pwm(data, clamp_val(state, 0, TC654_MAX_COOLING_STATE));
}
static const struct thermal_cooling_device_ops tc654_fan_cool_ops = {
.get_max_state = tc654_get_max_state,
.get_cur_state = tc654_get_cur_state,
.set_cur_state = tc654_set_cur_state,
};
/*
* device probe and removal
*/
static int tc654_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct tc654_data *data;
struct device *hwmon_dev;
int ret;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(struct tc654_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
ret = i2c_smbus_read_byte_data(client, TC654_REG_CONFIG);
if (ret < 0)
return ret;
data->config = ret;
hwmon_dev =
devm_hwmon_device_register_with_groups(dev, client->name, data,
tc654_groups);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
if (IS_ENABLED(CONFIG_THERMAL)) {
struct thermal_cooling_device *cdev;
cdev = devm_thermal_of_cooling_device_register(dev, dev->of_node, client->name,
hwmon_dev, &tc654_fan_cool_ops);
return PTR_ERR_OR_ZERO(cdev);
}
return 0;
}
static const struct i2c_device_id tc654_id[] = {
{"tc654", 0},
{"tc655", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, tc654_id);
static struct i2c_driver tc654_driver = {
.driver = {
.name = "tc654",
},
.probe = tc654_probe,
.id_table = tc654_id,
};
module_i2c_driver(tc654_driver);
MODULE_AUTHOR("Allied Telesis Labs");
MODULE_DESCRIPTION("Microchip TC654/TC655 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/tc654.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* w83795.c - Linux kernel driver for hardware monitoring
* Copyright (C) 2008 Nuvoton Technology Corp.
* Wei Song
* Copyright (C) 2010 Jean Delvare <[email protected]>
*
* Supports following chips:
*
* Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
* w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
* w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/jiffies.h>
#include <linux/util_macros.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = {
0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
};
static bool reset;
module_param(reset, bool, 0);
MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
#define W83795_REG_BANKSEL 0x00
#define W83795_REG_VENDORID 0xfd
#define W83795_REG_CHIPID 0xfe
#define W83795_REG_DEVICEID 0xfb
#define W83795_REG_DEVICEID_A 0xff
#define W83795_REG_I2C_ADDR 0xfc
#define W83795_REG_CONFIG 0x01
#define W83795_REG_CONFIG_CONFIG48 0x04
#define W83795_REG_CONFIG_START 0x01
/* Multi-Function Pin Ctrl Registers */
#define W83795_REG_VOLT_CTRL1 0x02
#define W83795_REG_VOLT_CTRL2 0x03
#define W83795_REG_TEMP_CTRL1 0x04
#define W83795_REG_TEMP_CTRL2 0x05
#define W83795_REG_FANIN_CTRL1 0x06
#define W83795_REG_FANIN_CTRL2 0x07
#define W83795_REG_VMIGB_CTRL 0x08
#define TEMP_READ 0
#define TEMP_CRIT 1
#define TEMP_CRIT_HYST 2
#define TEMP_WARN 3
#define TEMP_WARN_HYST 4
/*
* only crit and crit_hyst affect real-time alarm status
* current crit crit_hyst warn warn_hyst
*/
static const u16 W83795_REG_TEMP[][5] = {
{0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
{0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
{0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
{0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
{0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
{0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
};
#define IN_READ 0
#define IN_MAX 1
#define IN_LOW 2
static const u16 W83795_REG_IN[][3] = {
/* Current, HL, LL */
{0x10, 0x70, 0x71}, /* VSEN1 */
{0x11, 0x72, 0x73}, /* VSEN2 */
{0x12, 0x74, 0x75}, /* VSEN3 */
{0x13, 0x76, 0x77}, /* VSEN4 */
{0x14, 0x78, 0x79}, /* VSEN5 */
{0x15, 0x7a, 0x7b}, /* VSEN6 */
{0x16, 0x7c, 0x7d}, /* VSEN7 */
{0x17, 0x7e, 0x7f}, /* VSEN8 */
{0x18, 0x80, 0x81}, /* VSEN9 */
{0x19, 0x82, 0x83}, /* VSEN10 */
{0x1A, 0x84, 0x85}, /* VSEN11 */
{0x1B, 0x86, 0x87}, /* VTT */
{0x1C, 0x88, 0x89}, /* 3VDD */
{0x1D, 0x8a, 0x8b}, /* 3VSB */
{0x1E, 0x8c, 0x8d}, /* VBAT */
{0x1F, 0xa6, 0xa7}, /* VSEN12 */
{0x20, 0xaa, 0xab}, /* VSEN13 */
{0x21, 0x96, 0x97}, /* VSEN14 */
{0x22, 0x9a, 0x9b}, /* VSEN15 */
{0x23, 0x9e, 0x9f}, /* VSEN16 */
{0x24, 0xa2, 0xa3}, /* VSEN17 */
};
#define W83795_REG_VRLSB 0x3C
static const u8 W83795_REG_IN_HL_LSB[] = {
0x8e, /* VSEN1-4 */
0x90, /* VSEN5-8 */
0x92, /* VSEN9-11 */
0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
0xa8, /* VSEN12 */
0xac, /* VSEN13 */
0x98, /* VSEN14 */
0x9c, /* VSEN15 */
0xa0, /* VSEN16 */
0xa4, /* VSEN17 */
};
#define IN_LSB_REG(index, type) \
(((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
: (W83795_REG_IN_HL_LSB[(index)] + 1))
#define IN_LSB_SHIFT 0
#define IN_LSB_IDX 1
static const u8 IN_LSB_SHIFT_IDX[][2] = {
/* High/Low LSB shift, LSB No. */
{0x00, 0x00}, /* VSEN1 */
{0x02, 0x00}, /* VSEN2 */
{0x04, 0x00}, /* VSEN3 */
{0x06, 0x00}, /* VSEN4 */
{0x00, 0x01}, /* VSEN5 */
{0x02, 0x01}, /* VSEN6 */
{0x04, 0x01}, /* VSEN7 */
{0x06, 0x01}, /* VSEN8 */
{0x00, 0x02}, /* VSEN9 */
{0x02, 0x02}, /* VSEN10 */
{0x04, 0x02}, /* VSEN11 */
{0x00, 0x03}, /* VTT */
{0x02, 0x03}, /* 3VDD */
{0x04, 0x03}, /* 3VSB */
{0x06, 0x03}, /* VBAT */
{0x06, 0x04}, /* VSEN12 */
{0x06, 0x05}, /* VSEN13 */
{0x06, 0x06}, /* VSEN14 */
{0x06, 0x07}, /* VSEN15 */
{0x06, 0x08}, /* VSEN16 */
{0x06, 0x09}, /* VSEN17 */
};
#define W83795_REG_FAN(index) (0x2E + (index))
#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
(((index) & 1) ? 4 : 0)
#define W83795_REG_VID_CTRL 0x6A
#define W83795_REG_ALARM_CTRL 0x40
#define ALARM_CTRL_RTSACS (1 << 7)
#define W83795_REG_ALARM(index) (0x41 + (index))
#define W83795_REG_CLR_CHASSIS 0x4D
#define W83795_REG_BEEP(index) (0x50 + (index))
#define W83795_REG_OVT_CFG 0x58
#define OVT_CFG_SEL (1 << 7)
#define W83795_REG_FCMS1 0x201
#define W83795_REG_FCMS2 0x208
#define W83795_REG_TFMR(index) (0x202 + (index))
#define W83795_REG_FOMC 0x20F
#define W83795_REG_TSS(index) (0x209 + (index))
#define TSS_MAP_RESERVED 0xff
static const u8 tss_map[4][6] = {
{ 0, 1, 2, 3, 4, 5},
{ 6, 7, 8, 9, 0, 1},
{10, 11, 12, 13, 2, 3},
{ 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
};
#define PWM_OUTPUT 0
#define PWM_FREQ 1
#define PWM_START 2
#define PWM_NONSTOP 3
#define PWM_STOP_TIME 4
#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
#define W83795_REG_TFTS 0x250
#define TEMP_PWM_TTTI 0
#define TEMP_PWM_CTFS 1
#define TEMP_PWM_HCT 2
#define TEMP_PWM_HOT 3
#define W83795_REG_TTTI(index) (0x260 + (index))
#define W83795_REG_CTFS(index) (0x268 + (index))
#define W83795_REG_HT(index) (0x270 + (index))
#define SF4_TEMP 0
#define SF4_PWM 1
#define W83795_REG_SF4_TEMP(temp_num, index) \
(0x280 + 0x10 * (temp_num) + (index))
#define W83795_REG_SF4_PWM(temp_num, index) \
(0x288 + 0x10 * (temp_num) + (index))
#define W83795_REG_DTSC 0x301
#define W83795_REG_DTSE 0x302
#define W83795_REG_DTS(index) (0x26 + (index))
#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
#define DTS_CRIT 0
#define DTS_CRIT_HYST 1
#define DTS_WARN 2
#define DTS_WARN_HYST 3
#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
#define SETUP_PWM_DEFAULT 0
#define SETUP_PWM_UPTIME 1
#define SETUP_PWM_DOWNTIME 2
#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
static inline u16 in_from_reg(u8 index, u16 val)
{
/* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
if (index >= 12 && index <= 14)
return val * 6;
else
return val * 2;
}
static inline u16 in_to_reg(u8 index, u16 val)
{
if (index >= 12 && index <= 14)
return val / 6;
else
return val / 2;
}
static inline unsigned long fan_from_reg(u16 val)
{
if ((val == 0xfff) || (val == 0))
return 0;
return 1350000UL / val;
}
static inline u16 fan_to_reg(long rpm)
{
if (rpm <= 0)
return 0x0fff;
return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
}
static inline unsigned long time_from_reg(u8 reg)
{
return reg * 100;
}
static inline u8 time_to_reg(unsigned long val)
{
return clamp_val((val + 50) / 100, 0, 0xff);
}
static inline long temp_from_reg(s8 reg)
{
return reg * 1000;
}
static inline s8 temp_to_reg(long val, s8 min, s8 max)
{
return clamp_val(val / 1000, min, max);
}
static const u16 pwm_freq_cksel0[16] = {
1024, 512, 341, 256, 205, 171, 146, 128,
85, 64, 32, 16, 8, 4, 2, 1
};
static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
{
unsigned long base_clock;
if (reg & 0x80) {
base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
return base_clock / ((reg & 0x7f) + 1);
} else
return pwm_freq_cksel0[reg & 0x0f];
}
static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
{
unsigned long base_clock;
u8 reg0, reg1;
unsigned long best0, best1;
/* Best fit for cksel = 0 */
reg0 = find_closest_descending(val, pwm_freq_cksel0,
ARRAY_SIZE(pwm_freq_cksel0));
if (val < 375) /* cksel = 1 can't beat this */
return reg0;
best0 = pwm_freq_cksel0[reg0];
/* Best fit for cksel = 1 */
base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
reg1 = clamp_val(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
best1 = base_clock / reg1;
reg1 = 0x80 | (reg1 - 1);
/* Choose the closest one */
if (abs(val - best0) > abs(val - best1))
return reg1;
else
return reg0;
}
enum chip_types {w83795g, w83795adg};
struct w83795_data {
struct device *hwmon_dev;
struct mutex update_lock;
unsigned long last_updated; /* In jiffies */
enum chip_types chip_type;
u8 bank;
u32 has_in; /* Enable monitor VIN or not */
u8 has_dyn_in; /* Only in2-0 can have this */
u16 in[21][3]; /* Register value, read/high/low */
u8 in_lsb[10][3]; /* LSB Register value, high/low */
u8 has_gain; /* has gain: in17-20 * 8 */
u16 has_fan; /* Enable fan14-1 or not */
u16 fan[14]; /* Register value combine */
u16 fan_min[14]; /* Register value combine */
u8 has_temp; /* Enable monitor temp6-1 or not */
s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
u8 temp_read_vrlsb[6];
u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
u8 temp_src[3]; /* Register value */
u8 enable_dts; /*
* Enable PECI and SB-TSI,
* bit 0: =1 enable, =0 disable,
* bit 1: =1 AMD SB-TSI, =0 Intel PECI
*/
u8 has_dts; /* Enable monitor DTS temp */
s8 dts[8]; /* Register value */
u8 dts_read_vrlsb[8]; /* Register value */
s8 dts_ext[4]; /* Register value */
u8 has_pwm; /*
* 795g supports 8 pwm, 795adg only supports 2,
* no config register, only affected by chip
* type
*/
u8 pwm[8][5]; /*
* Register value, output, freq, start,
* non stop, stop time
*/
u16 clkin; /* CLKIN frequency in kHz */
u8 pwm_fcms[2]; /* Register value */
u8 pwm_tfmr[6]; /* Register value */
u8 pwm_fomc; /* Register value */
u16 target_speed[8]; /*
* Register value, target speed for speed
* cruise
*/
u8 tol_speed; /* tolerance of target speed */
u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
u8 setup_pwm[3]; /* Register value */
u8 alarms[6]; /* Register value */
u8 enable_beep;
u8 beeps[6]; /* Register value */
bool valid;
char valid_limits;
char valid_pwm_config;
};
/*
* Hardware access
* We assume that nobdody can change the bank outside the driver.
*/
/* Must be called with data->update_lock held, except during initialization */
static int w83795_set_bank(struct i2c_client *client, u8 bank)
{
struct w83795_data *data = i2c_get_clientdata(client);
int err;
/* If the same bank is already set, nothing to do */
if ((data->bank & 0x07) == bank)
return 0;
/* Change to new bank, preserve all other bits */
bank |= data->bank & ~0x07;
err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
if (err < 0) {
dev_err(&client->dev,
"Failed to set bank to %d, err %d\n",
(int)bank, err);
return err;
}
data->bank = bank;
return 0;
}
/* Must be called with data->update_lock held, except during initialization */
static u8 w83795_read(struct i2c_client *client, u16 reg)
{
int err;
err = w83795_set_bank(client, reg >> 8);
if (err < 0)
return 0x00; /* Arbitrary */
err = i2c_smbus_read_byte_data(client, reg & 0xff);
if (err < 0) {
dev_err(&client->dev,
"Failed to read from register 0x%03x, err %d\n",
(int)reg, err);
return 0x00; /* Arbitrary */
}
return err;
}
/* Must be called with data->update_lock held, except during initialization */
static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
{
int err;
err = w83795_set_bank(client, reg >> 8);
if (err < 0)
return err;
err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
if (err < 0)
dev_err(&client->dev,
"Failed to write to register 0x%03x, err %d\n",
(int)reg, err);
return err;
}
static void w83795_update_limits(struct i2c_client *client)
{
struct w83795_data *data = i2c_get_clientdata(client);
int i, limit;
u8 lsb;
/* Read the voltage limits */
for (i = 0; i < ARRAY_SIZE(data->in); i++) {
if (!(data->has_in & (1 << i)))
continue;
data->in[i][IN_MAX] =
w83795_read(client, W83795_REG_IN[i][IN_MAX]);
data->in[i][IN_LOW] =
w83795_read(client, W83795_REG_IN[i][IN_LOW]);
}
for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
if ((i == 2 && data->chip_type == w83795adg) ||
(i >= 4 && !(data->has_in & (1 << (i + 11)))))
continue;
data->in_lsb[i][IN_MAX] =
w83795_read(client, IN_LSB_REG(i, IN_MAX));
data->in_lsb[i][IN_LOW] =
w83795_read(client, IN_LSB_REG(i, IN_LOW));
}
/* Read the fan limits */
lsb = 0; /* Silent false gcc warning */
for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
/*
* Each register contains LSB for 2 fans, but we want to
* read it only once to save time
*/
if ((i & 1) == 0 && (data->has_fan & (3 << i)))
lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
if (!(data->has_fan & (1 << i)))
continue;
data->fan_min[i] =
w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
data->fan_min[i] |=
(lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
}
/* Read the temperature limits */
for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
if (!(data->has_temp & (1 << i)))
continue;
for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
data->temp[i][limit] =
w83795_read(client, W83795_REG_TEMP[i][limit]);
}
/* Read the DTS limits */
if (data->enable_dts) {
for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
data->dts_ext[limit] =
w83795_read(client, W83795_REG_DTS_EXT(limit));
}
/* Read beep settings */
if (data->enable_beep) {
for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
data->beeps[i] =
w83795_read(client, W83795_REG_BEEP(i));
}
data->valid_limits = 1;
}
static struct w83795_data *w83795_update_pwm_config(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
int i, tmp;
mutex_lock(&data->update_lock);
if (data->valid_pwm_config)
goto END;
/* Read temperature source selection */
for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
/* Read automatic fan speed control settings */
data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
for (i = 0; i < data->has_pwm; i++) {
for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
data->pwm[i][tmp] =
w83795_read(client, W83795_REG_PWM(i, tmp));
}
for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
data->target_speed[i] =
w83795_read(client, W83795_REG_FTSH(i)) << 4;
data->target_speed[i] |=
w83795_read(client, W83795_REG_FTSL(i)) >> 4;
}
data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
data->pwm_temp[i][TEMP_PWM_TTTI] =
w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
data->pwm_temp[i][TEMP_PWM_CTFS] =
w83795_read(client, W83795_REG_CTFS(i));
tmp = w83795_read(client, W83795_REG_HT(i));
data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
}
/* Read SmartFanIV trip points */
for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
for (tmp = 0; tmp < 7; tmp++) {
data->sf4_reg[i][SF4_TEMP][tmp] =
w83795_read(client,
W83795_REG_SF4_TEMP(i, tmp));
data->sf4_reg[i][SF4_PWM][tmp] =
w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
}
}
/* Read setup PWM */
for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
data->setup_pwm[i] =
w83795_read(client, W83795_REG_SETUP_PWM(i));
data->valid_pwm_config = 1;
END:
mutex_unlock(&data->update_lock);
return data;
}
static struct w83795_data *w83795_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
u16 tmp;
u8 intrusion;
int i;
mutex_lock(&data->update_lock);
if (!data->valid_limits)
w83795_update_limits(client);
if (!(time_after(jiffies, data->last_updated + HZ * 2)
|| !data->valid))
goto END;
/* Update the voltages value */
for (i = 0; i < ARRAY_SIZE(data->in); i++) {
if (!(data->has_in & (1 << i)))
continue;
tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
data->in[i][IN_READ] = tmp;
}
/* in0-2 can have dynamic limits (W83795G only) */
if (data->has_dyn_in) {
u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
for (i = 0; i < 3; i++) {
if (!(data->has_dyn_in & (1 << i)))
continue;
data->in[i][IN_MAX] =
w83795_read(client, W83795_REG_IN[i][IN_MAX]);
data->in[i][IN_LOW] =
w83795_read(client, W83795_REG_IN[i][IN_LOW]);
data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
}
}
/* Update fan */
for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
if (!(data->has_fan & (1 << i)))
continue;
data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
}
/* Update temperature */
for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
data->temp[i][TEMP_READ] =
w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
data->temp_read_vrlsb[i] =
w83795_read(client, W83795_REG_VRLSB);
}
/* Update dts temperature */
if (data->enable_dts) {
for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
if (!(data->has_dts & (1 << i)))
continue;
data->dts[i] =
w83795_read(client, W83795_REG_DTS(i));
data->dts_read_vrlsb[i] =
w83795_read(client, W83795_REG_VRLSB);
}
}
/* Update pwm output */
for (i = 0; i < data->has_pwm; i++) {
data->pwm[i][PWM_OUTPUT] =
w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
}
/*
* Update intrusion and alarms
* It is important to read intrusion first, because reading from
* register SMI STS6 clears the interrupt status temporarily.
*/
tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
/* Switch to interrupt status for intrusion if needed */
if (tmp & ALARM_CTRL_RTSACS)
w83795_write(client, W83795_REG_ALARM_CTRL,
tmp & ~ALARM_CTRL_RTSACS);
intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6);
/* Switch to real-time alarms */
w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS);
for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
data->alarms[5] |= intrusion;
/* Restore original configuration if needed */
if (!(tmp & ALARM_CTRL_RTSACS))
w83795_write(client, W83795_REG_ALARM_CTRL,
tmp & ~ALARM_CTRL_RTSACS);
data->last_updated = jiffies;
data->valid = true;
END:
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs attributes
*/
#define ALARM_STATUS 0
#define BEEP_ENABLE 1
static ssize_t
show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = w83795_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index >> 3;
int bit = sensor_attr->index & 0x07;
u8 val;
if (nr == ALARM_STATUS)
val = (data->alarms[index] >> bit) & 1;
else /* BEEP_ENABLE */
val = (data->beeps[index] >> bit) & 1;
return sprintf(buf, "%u\n", val);
}
static ssize_t
store_beep(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index >> 3;
int shift = sensor_attr->index & 0x07;
u8 beep_bit = 1 << shift;
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
if (val != 0 && val != 1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
data->beeps[index] &= ~beep_bit;
data->beeps[index] |= val << shift;
w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
mutex_unlock(&data->update_lock);
return count;
}
/* Write 0 to clear chassis alarm */
static ssize_t
store_chassis_clear(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0 || val != 0)
return -EINVAL;
mutex_lock(&data->update_lock);
val = w83795_read(client, W83795_REG_CLR_CHASSIS);
val |= 0x80;
w83795_write(client, W83795_REG_CLR_CHASSIS, val);
/* Clear status and force cache refresh */
w83795_read(client, W83795_REG_ALARM(5));
data->valid = false;
mutex_unlock(&data->update_lock);
return count;
}
#define FAN_INPUT 0
#define FAN_MIN 1
static ssize_t
show_fan(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83795_data *data = w83795_update_device(dev);
u16 val;
if (nr == FAN_INPUT)
val = data->fan[index] & 0x0fff;
else
val = data->fan_min[index] & 0x0fff;
return sprintf(buf, "%lu\n", fan_from_reg(val));
}
static ssize_t
store_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
unsigned long val;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
val = fan_to_reg(val);
mutex_lock(&data->update_lock);
data->fan_min[index] = val;
w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
val &= 0x0f;
if (index & 1) {
val <<= 4;
val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
& 0x0f;
} else {
val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
& 0xf0;
}
w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data;
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned int val;
data = nr == PWM_OUTPUT ? w83795_update_device(dev)
: w83795_update_pwm_config(dev);
switch (nr) {
case PWM_STOP_TIME:
val = time_from_reg(data->pwm[index][nr]);
break;
case PWM_FREQ:
val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
break;
default:
val = data->pwm[index][nr];
break;
}
return sprintf(buf, "%u\n", val);
}
static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
mutex_lock(&data->update_lock);
switch (nr) {
case PWM_STOP_TIME:
val = time_to_reg(val);
break;
case PWM_FREQ:
val = pwm_freq_to_reg(val, data->clkin);
break;
default:
val = clamp_val(val, 0, 0xff);
break;
}
w83795_write(client, W83795_REG_PWM(index, nr), val);
data->pwm[index][nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
struct w83795_data *data = w83795_update_pwm_config(dev);
int index = sensor_attr->index;
u8 tmp;
/* Speed cruise mode */
if (data->pwm_fcms[0] & (1 << index)) {
tmp = 2;
goto out;
}
/* Thermal cruise or SmartFan IV mode */
for (tmp = 0; tmp < 6; tmp++) {
if (data->pwm_tfmr[tmp] & (1 << index)) {
tmp = 3;
goto out;
}
}
/* Manual mode */
tmp = 1;
out:
return sprintf(buf, "%u\n", tmp);
}
static ssize_t
store_pwm_enable(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
unsigned long val;
int i;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
if (val < 1 || val > 2)
return -EINVAL;
#ifndef CONFIG_SENSORS_W83795_FANCTRL
if (val > 1) {
dev_warn(dev, "Automatic fan speed control support disabled\n");
dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n");
return -EOPNOTSUPP;
}
#endif
mutex_lock(&data->update_lock);
switch (val) {
case 1:
/* Clear speed cruise mode bits */
data->pwm_fcms[0] &= ~(1 << index);
w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
/* Clear thermal cruise mode bits */
for (i = 0; i < 6; i++) {
data->pwm_tfmr[i] &= ~(1 << index);
w83795_write(client, W83795_REG_TFMR(i),
data->pwm_tfmr[i]);
}
break;
case 2:
data->pwm_fcms[0] |= (1 << index);
w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
break;
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = w83795_update_pwm_config(dev);
int index = to_sensor_dev_attr_2(attr)->index;
unsigned int mode;
if (data->pwm_fomc & (1 << index))
mode = 0; /* DC */
else
mode = 1; /* PWM */
return sprintf(buf, "%u\n", mode);
}
/*
* Check whether a given temperature source can ever be useful.
* Returns the number of selectable temperature channels which are
* enabled.
*/
static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
{
int useful = 0, i;
for (i = 0; i < 4; i++) {
if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
continue;
if (tss_map[i][tsrc] < 6) /* Analog */
useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
else /* Digital */
useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
}
return useful;
}
static ssize_t
show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
struct w83795_data *data = w83795_update_pwm_config(dev);
int index = sensor_attr->index;
u8 tmp = data->temp_src[index / 2];
if (index & 1)
tmp >>= 4; /* Pick high nibble */
else
tmp &= 0x0f; /* Pick low nibble */
/* Look-up the actual temperature channel number */
if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED)
return -EINVAL; /* Shouldn't happen */
return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1);
}
static ssize_t
store_temp_src(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
int tmp;
unsigned long channel;
u8 val = index / 2;
if (kstrtoul(buf, 10, &channel) < 0 ||
channel < 1 || channel > 14)
return -EINVAL;
/* Check if request can be fulfilled */
for (tmp = 0; tmp < 4; tmp++) {
if (tss_map[tmp][index] == channel - 1)
break;
}
if (tmp == 4) /* No match */
return -EINVAL;
mutex_lock(&data->update_lock);
if (index & 1) {
tmp <<= 4;
data->temp_src[val] &= 0x0f;
} else {
data->temp_src[val] &= 0xf0;
}
data->temp_src[val] |= tmp;
w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
mutex_unlock(&data->update_lock);
return count;
}
#define TEMP_PWM_ENABLE 0
#define TEMP_PWM_FAN_MAP 1
static ssize_t
show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
u8 tmp = 0xff;
switch (nr) {
case TEMP_PWM_ENABLE:
tmp = (data->pwm_fcms[1] >> index) & 1;
if (tmp)
tmp = 4;
else
tmp = 3;
break;
case TEMP_PWM_FAN_MAP:
tmp = data->pwm_tfmr[index];
break;
}
return sprintf(buf, "%u\n", tmp);
}
static ssize_t
store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long tmp;
if (kstrtoul(buf, 10, &tmp) < 0)
return -EINVAL;
switch (nr) {
case TEMP_PWM_ENABLE:
if (tmp != 3 && tmp != 4)
return -EINVAL;
tmp -= 3;
mutex_lock(&data->update_lock);
data->pwm_fcms[1] &= ~(1 << index);
data->pwm_fcms[1] |= tmp << index;
w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
mutex_unlock(&data->update_lock);
break;
case TEMP_PWM_FAN_MAP:
mutex_lock(&data->update_lock);
tmp = clamp_val(tmp, 0, 0xff);
w83795_write(client, W83795_REG_TFMR(index), tmp);
data->pwm_tfmr[index] = tmp;
mutex_unlock(&data->update_lock);
break;
}
return count;
}
#define FANIN_TARGET 0
#define FANIN_TOL 1
static ssize_t
show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
u16 tmp = 0;
switch (nr) {
case FANIN_TARGET:
tmp = fan_from_reg(data->target_speed[index]);
break;
case FANIN_TOL:
tmp = data->tol_speed;
break;
}
return sprintf(buf, "%u\n", tmp);
}
static ssize_t
store_fanin(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
mutex_lock(&data->update_lock);
switch (nr) {
case FANIN_TARGET:
val = fan_to_reg(clamp_val(val, 0, 0xfff));
w83795_write(client, W83795_REG_FTSH(index), val >> 4);
w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
data->target_speed[index] = val;
break;
case FANIN_TOL:
val = clamp_val(val, 0, 0x3f);
w83795_write(client, W83795_REG_TFTS, val);
data->tol_speed = val;
break;
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
long tmp = temp_from_reg(data->pwm_temp[index][nr]);
return sprintf(buf, "%ld\n", tmp);
}
static ssize_t
store_temp_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long val;
u8 tmp;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
val /= 1000;
mutex_lock(&data->update_lock);
switch (nr) {
case TEMP_PWM_TTTI:
val = clamp_val(val, 0, 0x7f);
w83795_write(client, W83795_REG_TTTI(index), val);
break;
case TEMP_PWM_CTFS:
val = clamp_val(val, 0, 0x7f);
w83795_write(client, W83795_REG_CTFS(index), val);
break;
case TEMP_PWM_HCT:
val = clamp_val(val, 0, 0x0f);
tmp = w83795_read(client, W83795_REG_HT(index));
tmp &= 0x0f;
tmp |= (val << 4) & 0xf0;
w83795_write(client, W83795_REG_HT(index), tmp);
break;
case TEMP_PWM_HOT:
val = clamp_val(val, 0, 0x0f);
tmp = w83795_read(client, W83795_REG_HT(index));
tmp &= 0xf0;
tmp |= val & 0x0f;
w83795_write(client, W83795_REG_HT(index), tmp);
break;
}
data->pwm_temp[index][nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
}
static ssize_t
store_sf4_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
mutex_lock(&data->update_lock);
w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
data->sf4_reg[index][SF4_PWM][nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = w83795_update_pwm_config(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
return sprintf(buf, "%u\n",
(data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
}
static ssize_t
store_sf4_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
val /= 1000;
mutex_lock(&data->update_lock);
w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
data->sf4_reg[index][SF4_TEMP][nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83795_data *data = w83795_update_device(dev);
long temp = temp_from_reg(data->temp[index][nr]);
if (nr == TEMP_READ)
temp += (data->temp_read_vrlsb[index] >> 6) * 250;
return sprintf(buf, "%ld\n", temp);
}
static ssize_t
store_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
long tmp;
if (kstrtol(buf, 10, &tmp) < 0)
return -EINVAL;
mutex_lock(&data->update_lock);
data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = dev_get_drvdata(dev);
int tmp;
if (data->enable_dts & 2)
tmp = 5;
else
tmp = 6;
return sprintf(buf, "%d\n", tmp);
}
static ssize_t
show_dts(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
struct w83795_data *data = w83795_update_device(dev);
long temp = temp_from_reg(data->dts[index]);
temp += (data->dts_read_vrlsb[index] >> 6) * 250;
return sprintf(buf, "%ld\n", temp);
}
static ssize_t
show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
struct w83795_data *data = dev_get_drvdata(dev);
long temp = temp_from_reg(data->dts_ext[nr]);
return sprintf(buf, "%ld\n", temp);
}
static ssize_t
store_dts_ext(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
long tmp;
if (kstrtol(buf, 10, &tmp) < 0)
return -EINVAL;
mutex_lock(&data->update_lock);
data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83795_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
int tmp;
if (data->temp_mode & (1 << index))
tmp = 3; /* Thermal diode */
else
tmp = 4; /* Thermistor */
return sprintf(buf, "%d\n", tmp);
}
/* Only for temp1-4 (temp5-6 can only be thermistor) */
static ssize_t
store_temp_mode(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int index = sensor_attr->index;
int reg_shift;
unsigned long val;
u8 tmp;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
if ((val != 4) && (val != 3))
return -EINVAL;
mutex_lock(&data->update_lock);
if (val == 3) {
/* Thermal diode */
val = 0x01;
data->temp_mode |= 1 << index;
} else if (val == 4) {
/* Thermistor */
val = 0x03;
data->temp_mode &= ~(1 << index);
}
reg_shift = 2 * index;
tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
tmp &= ~(0x03 << reg_shift);
tmp |= val << reg_shift;
w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
mutex_unlock(&data->update_lock);
return count;
}
/* show/store VIN */
static ssize_t
show_in(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83795_data *data = w83795_update_device(dev);
u16 val = data->in[index][nr];
u8 lsb_idx;
switch (nr) {
case IN_READ:
/* calculate this value again by sensors as sensors3.conf */
if ((index >= 17) &&
!((data->has_gain >> (index - 17)) & 1))
val *= 8;
break;
case IN_MAX:
case IN_LOW:
lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
val <<= 2;
val |= (data->in_lsb[lsb_idx][nr] >>
IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
if ((index >= 17) &&
!((data->has_gain >> (index - 17)) & 1))
val *= 8;
break;
}
val = in_from_reg(index, val);
return sprintf(buf, "%d\n", val);
}
static ssize_t
store_in(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
unsigned long val;
u8 tmp;
u8 lsb_idx;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
val = in_to_reg(index, val);
if ((index >= 17) &&
!((data->has_gain >> (index - 17)) & 1))
val /= 8;
val = clamp_val(val, 0, 0x3FF);
mutex_lock(&data->update_lock);
lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
data->in_lsb[lsb_idx][nr] = tmp;
tmp = (val >> 2) & 0xff;
w83795_write(client, W83795_REG_IN[index][nr], tmp);
data->in[index][nr] = tmp;
mutex_unlock(&data->update_lock);
return count;
}
#ifdef CONFIG_SENSORS_W83795_FANCTRL
static ssize_t
show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
struct w83795_data *data = w83795_update_pwm_config(dev);
u16 val = data->setup_pwm[nr];
switch (nr) {
case SETUP_PWM_UPTIME:
case SETUP_PWM_DOWNTIME:
val = time_from_reg(val);
break;
}
return sprintf(buf, "%d\n", val);
}
static ssize_t
store_sf_setup(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
struct i2c_client *client = to_i2c_client(dev);
struct w83795_data *data = i2c_get_clientdata(client);
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
switch (nr) {
case SETUP_PWM_DEFAULT:
val = clamp_val(val, 0, 0xff);
break;
case SETUP_PWM_UPTIME:
case SETUP_PWM_DOWNTIME:
val = time_to_reg(val);
if (val == 0)
return -EINVAL;
break;
}
mutex_lock(&data->update_lock);
data->setup_pwm[nr] = val;
w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
mutex_unlock(&data->update_lock);
return count;
}
#endif
#define NOT_USED -1
/*
* Don't change the attribute order, _max, _min and _beep are accessed by index
* somewhere else in the code
*/
#define SENSOR_ATTR_IN(index) { \
SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
IN_READ, index), \
SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
store_in, IN_MAX, index), \
SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
store_in, IN_LOW, index), \
SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
show_alarm_beep, store_beep, BEEP_ENABLE, \
index + ((index > 14) ? 1 : 0)) }
/*
* Don't change the attribute order, _beep is accessed by index
* somewhere else in the code
*/
#define SENSOR_ATTR_FAN(index) { \
SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
NULL, FAN_INPUT, index - 1), \
SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
show_fan, store_fan_min, FAN_MIN, index - 1), \
SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
NULL, ALARM_STATUS, index + 31), \
SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
#define SENSOR_ATTR_PWM(index) { \
SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
store_pwm, PWM_OUTPUT, index - 1), \
SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \
show_pwm_mode, NULL, NOT_USED, index - 1), \
SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
show_pwm, store_pwm, PWM_FREQ, index - 1), \
SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
show_pwm, store_pwm, PWM_START, index - 1), \
SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
show_fanin, store_fanin, FANIN_TARGET, index - 1) }
/*
* Don't change the attribute order, _beep is accessed by index
* somewhere else in the code
*/
#define SENSOR_ATTR_DTS(index) { \
SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
show_dts_mode, NULL, NOT_USED, index - 7), \
SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
NULL, NOT_USED, index - 7), \
SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
store_dts_ext, DTS_CRIT, NOT_USED), \
SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
store_dts_ext, DTS_WARN, NOT_USED), \
SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
/*
* Don't change the attribute order, _beep is accessed by index
* somewhere else in the code
*/
#define SENSOR_ATTR_TEMP(index) { \
SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 5 ? S_IWUSR : 0), \
show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
NULL, TEMP_READ, index - 1), \
SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
store_temp, TEMP_CRIT, index - 1), \
SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
store_temp, TEMP_WARN, index - 1), \
SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
show_alarm_beep, NULL, ALARM_STATUS, \
index + (index > 4 ? 11 : 17)), \
SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
show_alarm_beep, store_beep, BEEP_ENABLE, \
index + (index > 4 ? 11 : 17)), \
SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
show_temp_pwm_enable, store_temp_pwm_enable, \
TEMP_PWM_ENABLE, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
show_temp_pwm_enable, store_temp_pwm_enable, \
TEMP_PWM_FAN_MAP, index - 1), \
SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
show_sf4_temp, store_sf4_temp, 0, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
show_sf4_temp, store_sf4_temp, 1, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
show_sf4_temp, store_sf4_temp, 2, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
show_sf4_temp, store_sf4_temp, 3, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
show_sf4_temp, store_sf4_temp, 4, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
show_sf4_temp, store_sf4_temp, 5, index - 1), \
SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
show_sf4_temp, store_sf4_temp, 6, index - 1) }
static struct sensor_device_attribute_2 w83795_in[][5] = {
SENSOR_ATTR_IN(0),
SENSOR_ATTR_IN(1),
SENSOR_ATTR_IN(2),
SENSOR_ATTR_IN(3),
SENSOR_ATTR_IN(4),
SENSOR_ATTR_IN(5),
SENSOR_ATTR_IN(6),
SENSOR_ATTR_IN(7),
SENSOR_ATTR_IN(8),
SENSOR_ATTR_IN(9),
SENSOR_ATTR_IN(10),
SENSOR_ATTR_IN(11),
SENSOR_ATTR_IN(12),
SENSOR_ATTR_IN(13),
SENSOR_ATTR_IN(14),
SENSOR_ATTR_IN(15),
SENSOR_ATTR_IN(16),
SENSOR_ATTR_IN(17),
SENSOR_ATTR_IN(18),
SENSOR_ATTR_IN(19),
SENSOR_ATTR_IN(20),
};
static const struct sensor_device_attribute_2 w83795_fan[][4] = {
SENSOR_ATTR_FAN(1),
SENSOR_ATTR_FAN(2),
SENSOR_ATTR_FAN(3),
SENSOR_ATTR_FAN(4),
SENSOR_ATTR_FAN(5),
SENSOR_ATTR_FAN(6),
SENSOR_ATTR_FAN(7),
SENSOR_ATTR_FAN(8),
SENSOR_ATTR_FAN(9),
SENSOR_ATTR_FAN(10),
SENSOR_ATTR_FAN(11),
SENSOR_ATTR_FAN(12),
SENSOR_ATTR_FAN(13),
SENSOR_ATTR_FAN(14),
};
static const struct sensor_device_attribute_2 w83795_temp[][28] = {
SENSOR_ATTR_TEMP(1),
SENSOR_ATTR_TEMP(2),
SENSOR_ATTR_TEMP(3),
SENSOR_ATTR_TEMP(4),
SENSOR_ATTR_TEMP(5),
SENSOR_ATTR_TEMP(6),
};
static const struct sensor_device_attribute_2 w83795_dts[][8] = {
SENSOR_ATTR_DTS(7),
SENSOR_ATTR_DTS(8),
SENSOR_ATTR_DTS(9),
SENSOR_ATTR_DTS(10),
SENSOR_ATTR_DTS(11),
SENSOR_ATTR_DTS(12),
SENSOR_ATTR_DTS(13),
SENSOR_ATTR_DTS(14),
};
static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
SENSOR_ATTR_PWM(1),
SENSOR_ATTR_PWM(2),
SENSOR_ATTR_PWM(3),
SENSOR_ATTR_PWM(4),
SENSOR_ATTR_PWM(5),
SENSOR_ATTR_PWM(6),
SENSOR_ATTR_PWM(7),
SENSOR_ATTR_PWM(8),
};
static const struct sensor_device_attribute_2 w83795_tss[6] = {
SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
show_temp_src, store_temp_src, NOT_USED, 0),
SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
show_temp_src, store_temp_src, NOT_USED, 1),
SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
show_temp_src, store_temp_src, NOT_USED, 2),
SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
show_temp_src, store_temp_src, NOT_USED, 3),
SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
show_temp_src, store_temp_src, NOT_USED, 4),
SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
show_temp_src, store_temp_src, NOT_USED, 5),
};
static const struct sensor_device_attribute_2 sda_single_files[] = {
SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
store_chassis_clear, ALARM_STATUS, 46),
#ifdef CONFIG_SENSORS_W83795_FANCTRL
SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
store_fanin, FANIN_TOL, NOT_USED),
SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
#endif
};
static const struct sensor_device_attribute_2 sda_beep_files[] = {
SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
store_beep, BEEP_ENABLE, 46),
SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
store_beep, BEEP_ENABLE, 47),
};
/*
* Driver interface
*/
static void w83795_init_client(struct i2c_client *client)
{
struct w83795_data *data = i2c_get_clientdata(client);
static const u16 clkin[4] = { /* in kHz */
14318, 24000, 33333, 48000
};
u8 config;
if (reset)
w83795_write(client, W83795_REG_CONFIG, 0x80);
/* Start monitoring if needed */
config = w83795_read(client, W83795_REG_CONFIG);
if (!(config & W83795_REG_CONFIG_START)) {
dev_info(&client->dev, "Enabling monitoring operations\n");
w83795_write(client, W83795_REG_CONFIG,
config | W83795_REG_CONFIG_START);
}
data->clkin = clkin[(config >> 3) & 0x3];
dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
}
static int w83795_get_device_id(struct i2c_client *client)
{
int device_id;
device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
/*
* Special case for rev. A chips; can't be checked first because later
* revisions emulate this for compatibility
*/
if (device_id < 0 || (device_id & 0xf0) != 0x50) {
int alt_id;
alt_id = i2c_smbus_read_byte_data(client,
W83795_REG_DEVICEID_A);
if (alt_id == 0x50)
device_id = alt_id;
}
return device_id;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int w83795_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
int bank, vendor_id, device_id, expected, i2c_addr, config;
struct i2c_adapter *adapter = client->adapter;
unsigned short address = client->addr;
const char *chip_name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
if (bank < 0 || (bank & 0x7c)) {
dev_dbg(&adapter->dev,
"w83795: Detection failed at addr 0x%02hx, check %s\n",
address, "bank");
return -ENODEV;
}
/* Check Nuvoton vendor ID */
vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
expected = bank & 0x80 ? 0x5c : 0xa3;
if (vendor_id != expected) {
dev_dbg(&adapter->dev,
"w83795: Detection failed at addr 0x%02hx, check %s\n",
address, "vendor id");
return -ENODEV;
}
/* Check device ID */
device_id = w83795_get_device_id(client) |
(i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
if ((device_id >> 4) != 0x795) {
dev_dbg(&adapter->dev,
"w83795: Detection failed at addr 0x%02hx, check %s\n",
address, "device id\n");
return -ENODEV;
}
/*
* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
* should match
*/
if ((bank & 0x07) == 0) {
i2c_addr = i2c_smbus_read_byte_data(client,
W83795_REG_I2C_ADDR);
if ((i2c_addr & 0x7f) != address) {
dev_dbg(&adapter->dev,
"w83795: Detection failed at addr 0x%02hx, "
"check %s\n", address, "i2c addr");
return -ENODEV;
}
}
/*
* Check 795 chip type: 795G or 795ADG
* Usually we don't write to chips during detection, but here we don't
* quite have the choice; hopefully it's OK, we are about to return
* success anyway
*/
if ((bank & 0x07) != 0)
i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
bank & ~0x07);
config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
if (config & W83795_REG_CONFIG_CONFIG48)
chip_name = "w83795adg";
else
chip_name = "w83795g";
strscpy(info->type, chip_name, I2C_NAME_SIZE);
dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
'A' + (device_id & 0xf), address);
return 0;
}
#ifdef CONFIG_SENSORS_W83795_FANCTRL
#define NUM_PWM_ATTRIBUTES ARRAY_SIZE(w83795_pwm[0])
#define NUM_TEMP_ATTRIBUTES ARRAY_SIZE(w83795_temp[0])
#else
#define NUM_PWM_ATTRIBUTES 4
#define NUM_TEMP_ATTRIBUTES 8
#endif
static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
const struct device_attribute *))
{
struct w83795_data *data = dev_get_drvdata(dev);
int err, i, j;
for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
if (!(data->has_in & (1 << i)))
continue;
for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
if (j == 4 && !data->enable_beep)
continue;
err = fn(dev, &w83795_in[i][j].dev_attr);
if (err)
return err;
}
}
for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
if (!(data->has_fan & (1 << i)))
continue;
for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
if (j == 3 && !data->enable_beep)
continue;
err = fn(dev, &w83795_fan[i][j].dev_attr);
if (err)
return err;
}
}
for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
j = w83795_tss_useful(data, i);
if (!j)
continue;
err = fn(dev, &w83795_tss[i].dev_attr);
if (err)
return err;
}
for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
err = fn(dev, &sda_single_files[i].dev_attr);
if (err)
return err;
}
if (data->enable_beep) {
for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) {
err = fn(dev, &sda_beep_files[i].dev_attr);
if (err)
return err;
}
}
for (i = 0; i < data->has_pwm; i++) {
for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) {
err = fn(dev, &w83795_pwm[i][j].dev_attr);
if (err)
return err;
}
}
for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
if (!(data->has_temp & (1 << i)))
continue;
for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) {
if (j == 7 && !data->enable_beep)
continue;
err = fn(dev, &w83795_temp[i][j].dev_attr);
if (err)
return err;
}
}
if (data->enable_dts) {
for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
if (!(data->has_dts & (1 << i)))
continue;
for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
if (j == 7 && !data->enable_beep)
continue;
err = fn(dev, &w83795_dts[i][j].dev_attr);
if (err)
return err;
}
}
}
return 0;
}
/* We need a wrapper that fits in w83795_handle_files */
static int device_remove_file_wrapper(struct device *dev,
const struct device_attribute *attr)
{
device_remove_file(dev, attr);
return 0;
}
static void w83795_check_dynamic_in_limits(struct i2c_client *client)
{
struct w83795_data *data = i2c_get_clientdata(client);
u8 vid_ctl;
int i, err_max, err_min;
vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
/* Return immediately if VRM isn't configured */
if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
return;
data->has_dyn_in = (vid_ctl >> 3) & 0x07;
for (i = 0; i < 2; i++) {
if (!(data->has_dyn_in & (1 << i)))
continue;
/* Voltage limits in dynamic mode, switch to read-only */
err_max = sysfs_chmod_file(&client->dev.kobj,
&w83795_in[i][2].dev_attr.attr,
S_IRUGO);
err_min = sysfs_chmod_file(&client->dev.kobj,
&w83795_in[i][3].dev_attr.attr,
S_IRUGO);
if (err_max || err_min)
dev_warn(&client->dev,
"Failed to set in%d limits read-only (%d, %d)\n",
i, err_max, err_min);
else
dev_info(&client->dev,
"in%d limits set dynamically from VID\n", i);
}
}
/* Check pins that can be used for either temperature or voltage monitoring */
static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
int temp_chan, int in_chan)
{
/* config is a 2-bit value */
switch (config) {
case 0x2: /* Voltage monitoring */
data->has_in |= 1 << in_chan;
break;
case 0x1: /* Thermal diode */
if (temp_chan >= 4)
break;
data->temp_mode |= 1 << temp_chan;
fallthrough;
case 0x3: /* Thermistor */
data->has_temp |= 1 << temp_chan;
break;
}
}
static const struct i2c_device_id w83795_id[];
static int w83795_probe(struct i2c_client *client)
{
int i;
u8 tmp;
struct device *dev = &client->dev;
struct w83795_data *data;
int err;
data = devm_kzalloc(dev, sizeof(struct w83795_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->chip_type = i2c_match_id(w83795_id, client)->driver_data;
data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
mutex_init(&data->update_lock);
/* Initialize the chip */
w83795_init_client(client);
/* Check which voltages and fans are present */
data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
| (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
| (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
/* Check which analog temperatures and extra voltages are present */
tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
if (tmp & 0x20)
data->enable_dts = 1;
w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
w83795_apply_temp_config(data, tmp >> 6, 3, 20);
w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
/* Check DTS enable status */
if (data->enable_dts) {
if (1 & w83795_read(client, W83795_REG_DTSC))
data->enable_dts |= 2;
data->has_dts = w83795_read(client, W83795_REG_DTSE);
}
/* Report PECI Tbase values */
if (data->enable_dts == 1) {
for (i = 0; i < 8; i++) {
if (!(data->has_dts & (1 << i)))
continue;
tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
dev_info(&client->dev,
"PECI agent %d Tbase temperature: %u\n",
i + 1, (unsigned int)tmp & 0x7f);
}
}
data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
/* pwm and smart fan */
if (data->chip_type == w83795g)
data->has_pwm = 8;
else
data->has_pwm = 2;
/* Check if BEEP pin is available */
if (data->chip_type == w83795g) {
/* The W83795G has a dedicated BEEP pin */
data->enable_beep = 1;
} else {
/*
* The W83795ADG has a shared pin for OVT# and BEEP, so you
* can't have both
*/
tmp = w83795_read(client, W83795_REG_OVT_CFG);
if ((tmp & OVT_CFG_SEL) == 0)
data->enable_beep = 1;
}
err = w83795_handle_files(dev, device_create_file);
if (err)
goto exit_remove;
if (data->chip_type == w83795g)
w83795_check_dynamic_in_limits(client);
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
return 0;
exit_remove:
w83795_handle_files(dev, device_remove_file_wrapper);
return err;
}
static void w83795_remove(struct i2c_client *client)
{
struct w83795_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
w83795_handle_files(&client->dev, device_remove_file_wrapper);
}
static const struct i2c_device_id w83795_id[] = {
{ "w83795g", w83795g },
{ "w83795adg", w83795adg },
{ }
};
MODULE_DEVICE_TABLE(i2c, w83795_id);
static struct i2c_driver w83795_driver = {
.driver = {
.name = "w83795",
},
.probe = w83795_probe,
.remove = w83795_remove,
.id_table = w83795_id,
.class = I2C_CLASS_HWMON,
.detect = w83795_detect,
.address_list = normal_i2c,
};
module_i2c_driver(w83795_driver);
MODULE_AUTHOR("Wei Song, Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/w83795.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* sl28cpld hardware monitoring driver
*
* Copyright 2020 Kontron Europe GmbH
*/
#include <linux/bitfield.h>
#include <linux/hwmon.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#define FAN_INPUT 0x00
#define FAN_SCALE_X8 BIT(7)
#define FAN_VALUE_MASK GENMASK(6, 0)
struct sl28cpld_hwmon {
struct regmap *regmap;
u32 offset;
};
static umode_t sl28cpld_hwmon_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
return 0444;
}
static int sl28cpld_hwmon_read(struct device *dev,
enum hwmon_sensor_types type, u32 attr,
int channel, long *input)
{
struct sl28cpld_hwmon *hwmon = dev_get_drvdata(dev);
unsigned int value;
int ret;
switch (attr) {
case hwmon_fan_input:
ret = regmap_read(hwmon->regmap, hwmon->offset + FAN_INPUT,
&value);
if (ret)
return ret;
/*
* The register has a 7 bit value and 1 bit which indicates the
* scale. If the MSB is set, then the lower 7 bit has to be
* multiplied by 8, to get the correct reading.
*/
if (value & FAN_SCALE_X8)
value = FIELD_GET(FAN_VALUE_MASK, value) << 3;
/*
* The counter period is 1000ms and the sysfs specification
* says we should assume 2 pulses per revolution.
*/
value *= 60 / 2;
break;
default:
return -EOPNOTSUPP;
}
*input = value;
return 0;
}
static const struct hwmon_channel_info * const sl28cpld_hwmon_info[] = {
HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT),
NULL
};
static const struct hwmon_ops sl28cpld_hwmon_ops = {
.is_visible = sl28cpld_hwmon_is_visible,
.read = sl28cpld_hwmon_read,
};
static const struct hwmon_chip_info sl28cpld_hwmon_chip_info = {
.ops = &sl28cpld_hwmon_ops,
.info = sl28cpld_hwmon_info,
};
static int sl28cpld_hwmon_probe(struct platform_device *pdev)
{
struct sl28cpld_hwmon *hwmon;
struct device *hwmon_dev;
int ret;
if (!pdev->dev.parent)
return -ENODEV;
hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL);
if (!hwmon)
return -ENOMEM;
hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL);
if (!hwmon->regmap)
return -ENODEV;
ret = device_property_read_u32(&pdev->dev, "reg", &hwmon->offset);
if (ret)
return -EINVAL;
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
"sl28cpld_hwmon", hwmon,
&sl28cpld_hwmon_chip_info, NULL);
if (IS_ERR(hwmon_dev))
dev_err(&pdev->dev, "failed to register as hwmon device");
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id sl28cpld_hwmon_of_match[] = {
{ .compatible = "kontron,sl28cpld-fan" },
{}
};
MODULE_DEVICE_TABLE(of, sl28cpld_hwmon_of_match);
static struct platform_driver sl28cpld_hwmon_driver = {
.probe = sl28cpld_hwmon_probe,
.driver = {
.name = "sl28cpld-fan",
.of_match_table = sl28cpld_hwmon_of_match,
},
};
module_platform_driver(sl28cpld_hwmon_driver);
MODULE_DESCRIPTION("sl28cpld Hardware Monitoring Driver");
MODULE_AUTHOR("Michael Walle <[email protected]>");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/sl28cpld-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2001-2004 Aurelien Jarno <[email protected]>
* Ported to Linux 2.6 by Aurelien Jarno <[email protected]> with
* the help of Jean Delvare <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/kstrtox.h>
/* Insmod parameters */
static int input_mode;
module_param(input_mode, int, 0);
MODULE_PARM_DESC(input_mode,
"Analog input mode:\n"
" 0 = four single ended inputs\n"
" 1 = three differential inputs\n"
" 2 = single ended and differential mixed\n"
" 3 = two differential inputs\n");
/*
* The PCF8591 control byte
* 7 6 5 4 3 2 1 0
* | 0 |AOEF| AIP | 0 |AINC| AICH |
*/
/* Analog Output Enable Flag (analog output active if 1) */
#define PCF8591_CONTROL_AOEF 0x40
/*
* Analog Input Programming
* 0x00 = four single ended inputs
* 0x10 = three differential inputs
* 0x20 = single ended and differential mixed
* 0x30 = two differential inputs
*/
#define PCF8591_CONTROL_AIP_MASK 0x30
/* Autoincrement Flag (switch on if 1) */
#define PCF8591_CONTROL_AINC 0x04
/*
* Channel selection
* 0x00 = channel 0
* 0x01 = channel 1
* 0x02 = channel 2
* 0x03 = channel 3
*/
#define PCF8591_CONTROL_AICH_MASK 0x03
/* Initial values */
#define PCF8591_INIT_CONTROL ((input_mode << 4) | PCF8591_CONTROL_AOEF)
#define PCF8591_INIT_AOUT 0 /* DAC out = 0 */
/* Conversions */
#define REG_TO_SIGNED(reg) (((reg) & 0x80) ? ((reg) - 256) : (reg))
struct pcf8591_data {
struct device *hwmon_dev;
struct mutex update_lock;
u8 control;
u8 aout;
};
static void pcf8591_init_client(struct i2c_client *client);
static int pcf8591_read_channel(struct device *dev, int channel);
/* following are the sysfs callback functions */
#define show_in_channel(channel) \
static ssize_t show_in##channel##_input(struct device *dev, \
struct device_attribute *attr, \
char *buf) \
{ \
return sprintf(buf, "%d\n", pcf8591_read_channel(dev, channel));\
} \
static DEVICE_ATTR(in##channel##_input, S_IRUGO, \
show_in##channel##_input, NULL);
show_in_channel(0);
show_in_channel(1);
show_in_channel(2);
show_in_channel(3);
static ssize_t out0_output_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct pcf8591_data *data = i2c_get_clientdata(to_i2c_client(dev));
return sprintf(buf, "%d\n", data->aout * 10);
}
static ssize_t out0_output_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
unsigned long val;
struct i2c_client *client = to_i2c_client(dev);
struct pcf8591_data *data = i2c_get_clientdata(client);
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
val /= 10;
if (val > 255)
return -EINVAL;
data->aout = val;
i2c_smbus_write_byte_data(client, data->control, data->aout);
return count;
}
static DEVICE_ATTR_RW(out0_output);
static ssize_t out0_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct pcf8591_data *data = i2c_get_clientdata(to_i2c_client(dev));
return sprintf(buf, "%u\n", !(!(data->control & PCF8591_CONTROL_AOEF)));
}
static ssize_t out0_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct pcf8591_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (val)
data->control |= PCF8591_CONTROL_AOEF;
else
data->control &= ~PCF8591_CONTROL_AOEF;
i2c_smbus_write_byte(client, data->control);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(out0_enable);
static struct attribute *pcf8591_attributes[] = {
&dev_attr_out0_enable.attr,
&dev_attr_out0_output.attr,
&dev_attr_in0_input.attr,
&dev_attr_in1_input.attr,
NULL
};
static const struct attribute_group pcf8591_attr_group = {
.attrs = pcf8591_attributes,
};
static struct attribute *pcf8591_attributes_opt[] = {
&dev_attr_in2_input.attr,
&dev_attr_in3_input.attr,
NULL
};
static const struct attribute_group pcf8591_attr_group_opt = {
.attrs = pcf8591_attributes_opt,
};
/*
* Real code
*/
static int pcf8591_probe(struct i2c_client *client)
{
struct pcf8591_data *data;
int err;
data = devm_kzalloc(&client->dev, sizeof(struct pcf8591_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
/* Initialize the PCF8591 chip */
pcf8591_init_client(client);
/* Register sysfs hooks */
err = sysfs_create_group(&client->dev.kobj, &pcf8591_attr_group);
if (err)
return err;
/* Register input2 if not in "two differential inputs" mode */
if (input_mode != 3) {
err = device_create_file(&client->dev, &dev_attr_in2_input);
if (err)
goto exit_sysfs_remove;
}
/* Register input3 only in "four single ended inputs" mode */
if (input_mode == 0) {
err = device_create_file(&client->dev, &dev_attr_in3_input);
if (err)
goto exit_sysfs_remove;
}
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_sysfs_remove;
}
return 0;
exit_sysfs_remove:
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group_opt);
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group);
return err;
}
static void pcf8591_remove(struct i2c_client *client)
{
struct pcf8591_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group_opt);
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group);
}
/* Called when we have found a new PCF8591. */
static void pcf8591_init_client(struct i2c_client *client)
{
struct pcf8591_data *data = i2c_get_clientdata(client);
data->control = PCF8591_INIT_CONTROL;
data->aout = PCF8591_INIT_AOUT;
i2c_smbus_write_byte_data(client, data->control, data->aout);
/*
* The first byte transmitted contains the conversion code of the
* previous read cycle. FLUSH IT!
*/
i2c_smbus_read_byte(client);
}
static int pcf8591_read_channel(struct device *dev, int channel)
{
u8 value;
struct i2c_client *client = to_i2c_client(dev);
struct pcf8591_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
if ((data->control & PCF8591_CONTROL_AICH_MASK) != channel) {
data->control = (data->control & ~PCF8591_CONTROL_AICH_MASK)
| channel;
i2c_smbus_write_byte(client, data->control);
/*
* The first byte transmitted contains the conversion code of
* the previous read cycle. FLUSH IT!
*/
i2c_smbus_read_byte(client);
}
value = i2c_smbus_read_byte(client);
mutex_unlock(&data->update_lock);
if ((channel == 2 && input_mode == 2) ||
(channel != 3 && (input_mode == 1 || input_mode == 3)))
return 10 * REG_TO_SIGNED(value);
else
return 10 * value;
}
static const struct i2c_device_id pcf8591_id[] = {
{ "pcf8591", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, pcf8591_id);
static struct i2c_driver pcf8591_driver = {
.driver = {
.name = "pcf8591",
},
.probe = pcf8591_probe,
.remove = pcf8591_remove,
.id_table = pcf8591_id,
};
static int __init pcf8591_init(void)
{
if (input_mode < 0 || input_mode > 3) {
pr_warn("invalid input_mode (%d)\n", input_mode);
input_mode = 0;
}
return i2c_add_driver(&pcf8591_driver);
}
static void __exit pcf8591_exit(void)
{
i2c_del_driver(&pcf8591_driver);
}
MODULE_AUTHOR("Aurelien Jarno <[email protected]>");
MODULE_DESCRIPTION("PCF8591 driver");
MODULE_LICENSE("GPL");
module_init(pcf8591_init);
module_exit(pcf8591_exit);
|
linux-master
|
drivers/hwmon/pcf8591.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* A hwmon driver for the IBM PowerExecutive temperature/power sensors
* Copyright (C) 2007 IBM
*
* Author: Darrick J. Wong <[email protected]>
*/
#include <linux/ipmi.h>
#include <linux/module.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/err.h>
#define REFRESH_INTERVAL (2 * HZ)
#define DRVNAME "ibmpex"
#define PEX_GET_VERSION 1
#define PEX_GET_SENSOR_COUNT 2
#define PEX_GET_SENSOR_NAME 3
#define PEX_RESET_HIGH_LOW 4
#define PEX_GET_SENSOR_DATA 6
#define PEX_NET_FUNCTION 0x3A
#define PEX_COMMAND 0x3C
static inline u16 extract_value(const char *data, int offset)
{
return be16_to_cpup((__be16 *)&data[offset]);
}
#define TEMP_SENSOR 1
#define POWER_SENSOR 2
#define PEX_SENSOR_TYPE_LEN 3
static u8 const power_sensor_sig[] = {0x70, 0x77, 0x72};
static u8 const temp_sensor_sig[] = {0x74, 0x65, 0x6D};
#define PEX_MULT_LEN 2
static u8 const watt_sensor_sig[] = {0x41, 0x43};
#define PEX_NUM_SENSOR_FUNCS 3
static const char * const sensor_name_suffixes[] = {
"",
"_lowest",
"_highest"
};
static void ibmpex_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data);
static void ibmpex_register_bmc(int iface, struct device *dev);
static void ibmpex_bmc_gone(int iface);
struct ibmpex_sensor_data {
int in_use;
s16 values[PEX_NUM_SENSOR_FUNCS];
int multiplier;
struct sensor_device_attribute_2 attr[PEX_NUM_SENSOR_FUNCS];
};
struct ibmpex_bmc_data {
struct list_head list;
struct device *hwmon_dev;
struct device *bmc_device;
struct mutex lock;
bool valid;
unsigned long last_updated; /* In jiffies */
struct ipmi_addr address;
struct completion read_complete;
struct ipmi_user *user;
int interface;
struct kernel_ipmi_msg tx_message;
unsigned char tx_msg_data[IPMI_MAX_MSG_LENGTH];
long tx_msgid;
unsigned char rx_msg_data[IPMI_MAX_MSG_LENGTH];
unsigned long rx_msg_len;
unsigned char rx_result;
int rx_recv_type;
unsigned char sensor_major;
unsigned char sensor_minor;
unsigned char num_sensors;
struct ibmpex_sensor_data *sensors;
};
struct ibmpex_driver_data {
struct list_head bmc_data;
struct ipmi_smi_watcher bmc_events;
struct ipmi_user_hndl ipmi_hndlrs;
};
static struct ibmpex_driver_data driver_data = {
.bmc_data = LIST_HEAD_INIT(driver_data.bmc_data),
.bmc_events = {
.owner = THIS_MODULE,
.new_smi = ibmpex_register_bmc,
.smi_gone = ibmpex_bmc_gone,
},
.ipmi_hndlrs = {
.ipmi_recv_hndl = ibmpex_msg_handler,
},
};
static int ibmpex_send_message(struct ibmpex_bmc_data *data)
{
int err;
err = ipmi_validate_addr(&data->address, sizeof(data->address));
if (err)
goto out;
data->tx_msgid++;
err = ipmi_request_settime(data->user, &data->address, data->tx_msgid,
&data->tx_message, data, 0, 0, 0);
if (err)
goto out1;
return 0;
out1:
dev_err(data->bmc_device, "request_settime=%x\n", err);
return err;
out:
dev_err(data->bmc_device, "validate_addr=%x\n", err);
return err;
}
static int ibmpex_ver_check(struct ibmpex_bmc_data *data)
{
data->tx_msg_data[0] = PEX_GET_VERSION;
data->tx_message.data_len = 1;
ibmpex_send_message(data);
wait_for_completion(&data->read_complete);
if (data->rx_result || data->rx_msg_len != 6)
return -ENOENT;
data->sensor_major = data->rx_msg_data[0];
data->sensor_minor = data->rx_msg_data[1];
dev_info(data->bmc_device,
"Found BMC with sensor interface v%d.%d %d-%02d-%02d on interface %d\n",
data->sensor_major,
data->sensor_minor,
extract_value(data->rx_msg_data, 2),
data->rx_msg_data[4],
data->rx_msg_data[5],
data->interface);
return 0;
}
static int ibmpex_query_sensor_count(struct ibmpex_bmc_data *data)
{
data->tx_msg_data[0] = PEX_GET_SENSOR_COUNT;
data->tx_message.data_len = 1;
ibmpex_send_message(data);
wait_for_completion(&data->read_complete);
if (data->rx_result || data->rx_msg_len != 1)
return -ENOENT;
return data->rx_msg_data[0];
}
static int ibmpex_query_sensor_name(struct ibmpex_bmc_data *data, int sensor)
{
data->tx_msg_data[0] = PEX_GET_SENSOR_NAME;
data->tx_msg_data[1] = sensor;
data->tx_message.data_len = 2;
ibmpex_send_message(data);
wait_for_completion(&data->read_complete);
if (data->rx_result || data->rx_msg_len < 1)
return -ENOENT;
return 0;
}
static int ibmpex_query_sensor_data(struct ibmpex_bmc_data *data, int sensor)
{
data->tx_msg_data[0] = PEX_GET_SENSOR_DATA;
data->tx_msg_data[1] = sensor;
data->tx_message.data_len = 2;
ibmpex_send_message(data);
wait_for_completion(&data->read_complete);
if (data->rx_result || data->rx_msg_len < 26) {
dev_err(data->bmc_device, "Error reading sensor %d.\n",
sensor);
return -ENOENT;
}
return 0;
}
static int ibmpex_reset_high_low_data(struct ibmpex_bmc_data *data)
{
data->tx_msg_data[0] = PEX_RESET_HIGH_LOW;
data->tx_message.data_len = 1;
ibmpex_send_message(data);
wait_for_completion(&data->read_complete);
return 0;
}
static void ibmpex_update_device(struct ibmpex_bmc_data *data)
{
int i, err;
mutex_lock(&data->lock);
if (time_before(jiffies, data->last_updated + REFRESH_INTERVAL) &&
data->valid)
goto out;
for (i = 0; i < data->num_sensors; i++) {
if (!data->sensors[i].in_use)
continue;
err = ibmpex_query_sensor_data(data, i);
if (err)
continue;
data->sensors[i].values[0] =
extract_value(data->rx_msg_data, 16);
data->sensors[i].values[1] =
extract_value(data->rx_msg_data, 18);
data->sensors[i].values[2] =
extract_value(data->rx_msg_data, 20);
}
data->last_updated = jiffies;
data->valid = true;
out:
mutex_unlock(&data->lock);
}
static struct ibmpex_bmc_data *get_bmc_data(int iface)
{
struct ibmpex_bmc_data *p, *next;
list_for_each_entry_safe(p, next, &driver_data.bmc_data, list)
if (p->interface == iface)
return p;
return NULL;
}
static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
return sprintf(buf, "%s\n", DRVNAME);
}
static SENSOR_DEVICE_ATTR_RO(name, name, 0);
static ssize_t ibmpex_show_sensor(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
struct ibmpex_bmc_data *data = dev_get_drvdata(dev);
int mult = data->sensors[attr->index].multiplier;
ibmpex_update_device(data);
return sprintf(buf, "%d\n",
data->sensors[attr->index].values[attr->nr] * mult);
}
static ssize_t ibmpex_high_low_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct ibmpex_bmc_data *data = dev_get_drvdata(dev);
ibmpex_reset_high_low_data(data);
return count;
}
static SENSOR_DEVICE_ATTR_WO(reset_high_low, ibmpex_high_low, 0);
static int is_power_sensor(const char *sensor_id, int len)
{
if (len < PEX_SENSOR_TYPE_LEN)
return 0;
if (!memcmp(sensor_id, power_sensor_sig, PEX_SENSOR_TYPE_LEN))
return 1;
return 0;
}
static int is_temp_sensor(const char *sensor_id, int len)
{
if (len < PEX_SENSOR_TYPE_LEN)
return 0;
if (!memcmp(sensor_id, temp_sensor_sig, PEX_SENSOR_TYPE_LEN))
return 1;
return 0;
}
static int power_sensor_multiplier(struct ibmpex_bmc_data *data,
const char *sensor_id, int len)
{
int i;
if (data->sensor_major == 2)
return 1000000;
for (i = PEX_SENSOR_TYPE_LEN; i < len - 1; i++)
if (!memcmp(&sensor_id[i], watt_sensor_sig, PEX_MULT_LEN))
return 1000000;
return 100000;
}
static int create_sensor(struct ibmpex_bmc_data *data, int type,
int counter, int sensor, int func)
{
int err;
char *n;
n = kmalloc(32, GFP_KERNEL);
if (!n)
return -ENOMEM;
if (type == TEMP_SENSOR)
sprintf(n, "temp%d_input%s",
counter, sensor_name_suffixes[func]);
else if (type == POWER_SENSOR)
sprintf(n, "power%d_average%s",
counter, sensor_name_suffixes[func]);
sysfs_attr_init(&data->sensors[sensor].attr[func].dev_attr.attr);
data->sensors[sensor].attr[func].dev_attr.attr.name = n;
data->sensors[sensor].attr[func].dev_attr.attr.mode = 0444;
data->sensors[sensor].attr[func].dev_attr.show = ibmpex_show_sensor;
data->sensors[sensor].attr[func].index = sensor;
data->sensors[sensor].attr[func].nr = func;
err = device_create_file(data->bmc_device,
&data->sensors[sensor].attr[func].dev_attr);
if (err) {
data->sensors[sensor].attr[func].dev_attr.attr.name = NULL;
kfree(n);
return err;
}
return 0;
}
static int ibmpex_find_sensors(struct ibmpex_bmc_data *data)
{
int i, j, err;
int sensor_type;
int sensor_counter;
int num_power = 0;
int num_temp = 0;
err = ibmpex_query_sensor_count(data);
if (err <= 0)
return -ENOENT;
data->num_sensors = err;
data->sensors = kcalloc(data->num_sensors, sizeof(*data->sensors),
GFP_KERNEL);
if (!data->sensors)
return -ENOMEM;
for (i = 0; i < data->num_sensors; i++) {
err = ibmpex_query_sensor_name(data, i);
if (err)
continue;
if (is_power_sensor(data->rx_msg_data, data->rx_msg_len)) {
sensor_type = POWER_SENSOR;
num_power++;
sensor_counter = num_power;
data->sensors[i].multiplier =
power_sensor_multiplier(data,
data->rx_msg_data,
data->rx_msg_len);
} else if (is_temp_sensor(data->rx_msg_data,
data->rx_msg_len)) {
sensor_type = TEMP_SENSOR;
num_temp++;
sensor_counter = num_temp;
data->sensors[i].multiplier = 1000;
} else
continue;
data->sensors[i].in_use = 1;
/* Create attributes */
for (j = 0; j < PEX_NUM_SENSOR_FUNCS; j++) {
err = create_sensor(data, sensor_type, sensor_counter,
i, j);
if (err)
goto exit_remove;
}
}
err = device_create_file(data->bmc_device,
&sensor_dev_attr_reset_high_low.dev_attr);
if (err)
goto exit_remove;
err = device_create_file(data->bmc_device,
&sensor_dev_attr_name.dev_attr);
if (err)
goto exit_remove;
return 0;
exit_remove:
device_remove_file(data->bmc_device,
&sensor_dev_attr_reset_high_low.dev_attr);
device_remove_file(data->bmc_device, &sensor_dev_attr_name.dev_attr);
for (i = 0; i < data->num_sensors; i++)
for (j = 0; j < PEX_NUM_SENSOR_FUNCS; j++) {
if (!data->sensors[i].attr[j].dev_attr.attr.name)
continue;
device_remove_file(data->bmc_device,
&data->sensors[i].attr[j].dev_attr);
kfree(data->sensors[i].attr[j].dev_attr.attr.name);
}
kfree(data->sensors);
return err;
}
static void ibmpex_register_bmc(int iface, struct device *dev)
{
struct ibmpex_bmc_data *data;
int err;
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data)
return;
data->address.addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE;
data->address.channel = IPMI_BMC_CHANNEL;
data->address.data[0] = 0;
data->interface = iface;
data->bmc_device = dev;
/* Create IPMI messaging interface user */
err = ipmi_create_user(data->interface, &driver_data.ipmi_hndlrs,
data, &data->user);
if (err < 0) {
dev_err(dev,
"Unable to register user with IPMI interface %d\n",
data->interface);
goto out;
}
mutex_init(&data->lock);
/* Initialize message */
data->tx_msgid = 0;
init_completion(&data->read_complete);
data->tx_message.netfn = PEX_NET_FUNCTION;
data->tx_message.cmd = PEX_COMMAND;
data->tx_message.data = data->tx_msg_data;
/* Does this BMC support PowerExecutive? */
err = ibmpex_ver_check(data);
if (err)
goto out_user;
/* Register the BMC as a HWMON class device */
data->hwmon_dev = hwmon_device_register(data->bmc_device);
if (IS_ERR(data->hwmon_dev)) {
dev_err(data->bmc_device,
"Unable to register hwmon device for IPMI interface %d\n",
data->interface);
goto out_user;
}
/* finally add the new bmc data to the bmc data list */
dev_set_drvdata(dev, data);
list_add_tail(&data->list, &driver_data.bmc_data);
/* Now go find all the sensors */
err = ibmpex_find_sensors(data);
if (err) {
dev_err(data->bmc_device, "Error %d finding sensors\n", err);
goto out_register;
}
return;
out_register:
list_del(&data->list);
hwmon_device_unregister(data->hwmon_dev);
out_user:
ipmi_destroy_user(data->user);
out:
kfree(data);
}
static void ibmpex_bmc_delete(struct ibmpex_bmc_data *data)
{
int i, j;
device_remove_file(data->bmc_device,
&sensor_dev_attr_reset_high_low.dev_attr);
device_remove_file(data->bmc_device, &sensor_dev_attr_name.dev_attr);
for (i = 0; i < data->num_sensors; i++)
for (j = 0; j < PEX_NUM_SENSOR_FUNCS; j++) {
if (!data->sensors[i].attr[j].dev_attr.attr.name)
continue;
device_remove_file(data->bmc_device,
&data->sensors[i].attr[j].dev_attr);
kfree(data->sensors[i].attr[j].dev_attr.attr.name);
}
list_del(&data->list);
dev_set_drvdata(data->bmc_device, NULL);
hwmon_device_unregister(data->hwmon_dev);
ipmi_destroy_user(data->user);
kfree(data->sensors);
kfree(data);
}
static void ibmpex_bmc_gone(int iface)
{
struct ibmpex_bmc_data *data = get_bmc_data(iface);
if (!data)
return;
ibmpex_bmc_delete(data);
}
static void ibmpex_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data)
{
struct ibmpex_bmc_data *data = user_msg_data;
if (msg->msgid != data->tx_msgid) {
dev_err(data->bmc_device,
"Mismatch between received msgid (%02x) and transmitted msgid (%02x)!\n",
(int)msg->msgid,
(int)data->tx_msgid);
ipmi_free_recv_msg(msg);
return;
}
data->rx_recv_type = msg->recv_type;
if (msg->msg.data_len > 0)
data->rx_result = msg->msg.data[0];
else
data->rx_result = IPMI_UNKNOWN_ERR_COMPLETION_CODE;
if (msg->msg.data_len > 1) {
data->rx_msg_len = msg->msg.data_len - 1;
memcpy(data->rx_msg_data, msg->msg.data + 1, data->rx_msg_len);
} else
data->rx_msg_len = 0;
ipmi_free_recv_msg(msg);
complete(&data->read_complete);
}
static int __init ibmpex_init(void)
{
return ipmi_smi_watcher_register(&driver_data.bmc_events);
}
static void __exit ibmpex_exit(void)
{
struct ibmpex_bmc_data *p, *next;
ipmi_smi_watcher_unregister(&driver_data.bmc_events);
list_for_each_entry_safe(p, next, &driver_data.bmc_data, list)
ibmpex_bmc_delete(p);
}
MODULE_AUTHOR("Darrick J. Wong <[email protected]>");
MODULE_DESCRIPTION("IBM PowerExecutive power/temperature sensor driver");
MODULE_LICENSE("GPL");
module_init(ibmpex_init);
module_exit(ibmpex_exit);
MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3350-*");
MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3550-*");
MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3650-*");
MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3655-*");
MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3755-*");
|
linux-master
|
drivers/hwmon/ibmpex.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Maxim MAX6620
*
* Originally from L. Grunenberg.
* (C) 2012 by L. Grunenberg <[email protected]>
*
* Copyright (c) 2021 Dell Inc. or its subsidiaries. All Rights Reserved.
*
* based on code written by :
* 2007 by Hans J. Koch <[email protected]>
* John Morris <[email protected]>
* Copyright (c) 2003 Spirent Communications
* and Claus Gindhart <[email protected]>
*
* This module has only been tested with the MAX6620 chip.
*
* The datasheet was last seen at:
*
* http://pdfserv.maxim-ic.com/en/ds/MAX6620.pdf
*
*/
#include <linux/bits.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/slab.h>
/*
* MAX 6620 registers
*/
#define MAX6620_REG_CONFIG 0x00
#define MAX6620_REG_FAULT 0x01
#define MAX6620_REG_CONF_FAN0 0x02
#define MAX6620_REG_CONF_FAN1 0x03
#define MAX6620_REG_CONF_FAN2 0x04
#define MAX6620_REG_CONF_FAN3 0x05
#define MAX6620_REG_DYN_FAN0 0x06
#define MAX6620_REG_DYN_FAN1 0x07
#define MAX6620_REG_DYN_FAN2 0x08
#define MAX6620_REG_DYN_FAN3 0x09
#define MAX6620_REG_TACH0 0x10
#define MAX6620_REG_TACH1 0x12
#define MAX6620_REG_TACH2 0x14
#define MAX6620_REG_TACH3 0x16
#define MAX6620_REG_VOLT0 0x18
#define MAX6620_REG_VOLT1 0x1A
#define MAX6620_REG_VOLT2 0x1C
#define MAX6620_REG_VOLT3 0x1E
#define MAX6620_REG_TAR0 0x20
#define MAX6620_REG_TAR1 0x22
#define MAX6620_REG_TAR2 0x24
#define MAX6620_REG_TAR3 0x26
#define MAX6620_REG_DAC0 0x28
#define MAX6620_REG_DAC1 0x2A
#define MAX6620_REG_DAC2 0x2C
#define MAX6620_REG_DAC3 0x2E
/*
* Config register bits
*/
#define MAX6620_CFG_RUN BIT(7)
#define MAX6620_CFG_POR BIT(6)
#define MAX6620_CFG_TIMEOUT BIT(5)
#define MAX6620_CFG_FULLFAN BIT(4)
#define MAX6620_CFG_OSC BIT(3)
#define MAX6620_CFG_WD_MASK (BIT(2) | BIT(1))
#define MAX6620_CFG_WD_2 BIT(1)
#define MAX6620_CFG_WD_6 BIT(2)
#define MAX6620_CFG_WD10 (BIT(2) | BIT(1))
#define MAX6620_CFG_WD BIT(0)
/*
* Failure status register bits
*/
#define MAX6620_FAIL_TACH0 BIT(4)
#define MAX6620_FAIL_TACH1 BIT(5)
#define MAX6620_FAIL_TACH2 BIT(6)
#define MAX6620_FAIL_TACH3 BIT(7)
#define MAX6620_FAIL_MASK0 BIT(0)
#define MAX6620_FAIL_MASK1 BIT(1)
#define MAX6620_FAIL_MASK2 BIT(2)
#define MAX6620_FAIL_MASK3 BIT(3)
#define MAX6620_CLOCK_FREQ 8192 /* Clock frequency in Hz */
#define MAX6620_PULSE_PER_REV 2 /* Tachometer pulses per revolution */
/* Minimum and maximum values of the FAN-RPM */
#define FAN_RPM_MIN 240
#define FAN_RPM_MAX 30000
static const u8 config_reg[] = {
MAX6620_REG_CONF_FAN0,
MAX6620_REG_CONF_FAN1,
MAX6620_REG_CONF_FAN2,
MAX6620_REG_CONF_FAN3,
};
static const u8 dyn_reg[] = {
MAX6620_REG_DYN_FAN0,
MAX6620_REG_DYN_FAN1,
MAX6620_REG_DYN_FAN2,
MAX6620_REG_DYN_FAN3,
};
static const u8 tach_reg[] = {
MAX6620_REG_TACH0,
MAX6620_REG_TACH1,
MAX6620_REG_TACH2,
MAX6620_REG_TACH3,
};
static const u8 target_reg[] = {
MAX6620_REG_TAR0,
MAX6620_REG_TAR1,
MAX6620_REG_TAR2,
MAX6620_REG_TAR3,
};
/*
* Client data (each client gets its own)
*/
struct max6620_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* register values */
u8 fancfg[4];
u8 fandyn[4];
u8 fault;
u16 tach[4];
u16 target[4];
};
static u8 max6620_fan_div_from_reg(u8 val)
{
return BIT((val & 0xE0) >> 5);
}
static u16 max6620_fan_rpm_to_tach(u8 div, int rpm)
{
return (60 * div * MAX6620_CLOCK_FREQ) / (rpm * MAX6620_PULSE_PER_REV);
}
static int max6620_fan_tach_to_rpm(u8 div, u16 tach)
{
return (60 * div * MAX6620_CLOCK_FREQ) / (tach * MAX6620_PULSE_PER_REV);
}
static int max6620_update_device(struct device *dev)
{
struct max6620_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i;
int ret = 0;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
for (i = 0; i < 4; i++) {
ret = i2c_smbus_read_byte_data(client, config_reg[i]);
if (ret < 0)
goto error;
data->fancfg[i] = ret;
ret = i2c_smbus_read_byte_data(client, dyn_reg[i]);
if (ret < 0)
goto error;
data->fandyn[i] = ret;
ret = i2c_smbus_read_byte_data(client, tach_reg[i]);
if (ret < 0)
goto error;
data->tach[i] = (ret << 3) & 0x7f8;
ret = i2c_smbus_read_byte_data(client, tach_reg[i] + 1);
if (ret < 0)
goto error;
data->tach[i] |= (ret >> 5) & 0x7;
ret = i2c_smbus_read_byte_data(client, target_reg[i]);
if (ret < 0)
goto error;
data->target[i] = (ret << 3) & 0x7f8;
ret = i2c_smbus_read_byte_data(client, target_reg[i] + 1);
if (ret < 0)
goto error;
data->target[i] |= (ret >> 5) & 0x7;
}
/*
* Alarms are cleared on read in case the condition that
* caused the alarm is removed. Keep the value latched here
* for providing the register through different alarm files.
*/
ret = i2c_smbus_read_byte_data(client, MAX6620_REG_FAULT);
if (ret < 0)
goto error;
data->fault |= (ret >> 4) & (ret & 0x0F);
data->last_updated = jiffies;
data->valid = true;
}
error:
mutex_unlock(&data->update_lock);
return ret;
}
static umode_t
max6620_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
int channel)
{
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_alarm:
case hwmon_fan_input:
return 0444;
case hwmon_fan_div:
case hwmon_fan_target:
return 0644;
default:
break;
}
break;
default:
break;
}
return 0;
}
static int
max6620_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
struct max6620_data *data;
struct i2c_client *client;
int ret;
u8 div;
u8 val1;
u8 val2;
ret = max6620_update_device(dev);
if (ret < 0)
return ret;
data = dev_get_drvdata(dev);
client = data->client;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_alarm:
mutex_lock(&data->update_lock);
*val = !!(data->fault & BIT(channel));
/* Setting TACH count to re-enable fan fault detection */
if (*val == 1) {
val1 = (data->target[channel] >> 3) & 0xff;
val2 = (data->target[channel] << 5) & 0xe0;
ret = i2c_smbus_write_byte_data(client,
target_reg[channel], val1);
if (ret < 0) {
mutex_unlock(&data->update_lock);
return ret;
}
ret = i2c_smbus_write_byte_data(client,
target_reg[channel] + 1, val2);
if (ret < 0) {
mutex_unlock(&data->update_lock);
return ret;
}
data->fault &= ~BIT(channel);
}
mutex_unlock(&data->update_lock);
break;
case hwmon_fan_div:
*val = max6620_fan_div_from_reg(data->fandyn[channel]);
break;
case hwmon_fan_input:
if (data->tach[channel] == 0) {
*val = 0;
} else {
div = max6620_fan_div_from_reg(data->fandyn[channel]);
*val = max6620_fan_tach_to_rpm(div, data->tach[channel]);
}
break;
case hwmon_fan_target:
if (data->target[channel] == 0) {
*val = 0;
} else {
div = max6620_fan_div_from_reg(data->fandyn[channel]);
*val = max6620_fan_tach_to_rpm(div, data->target[channel]);
}
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int
max6620_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long val)
{
struct max6620_data *data;
struct i2c_client *client;
int ret;
u8 div;
u16 tach;
u8 val1;
u8 val2;
ret = max6620_update_device(dev);
if (ret < 0)
return ret;
data = dev_get_drvdata(dev);
client = data->client;
mutex_lock(&data->update_lock);
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_div:
switch (val) {
case 1:
div = 0;
break;
case 2:
div = 1;
break;
case 4:
div = 2;
break;
case 8:
div = 3;
break;
case 16:
div = 4;
break;
case 32:
div = 5;
break;
default:
ret = -EINVAL;
goto error;
}
data->fandyn[channel] &= 0x1F;
data->fandyn[channel] |= div << 5;
ret = i2c_smbus_write_byte_data(client, dyn_reg[channel],
data->fandyn[channel]);
break;
case hwmon_fan_target:
val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
div = max6620_fan_div_from_reg(data->fandyn[channel]);
tach = max6620_fan_rpm_to_tach(div, val);
val1 = (tach >> 3) & 0xff;
val2 = (tach << 5) & 0xe0;
ret = i2c_smbus_write_byte_data(client, target_reg[channel], val1);
if (ret < 0)
break;
ret = i2c_smbus_write_byte_data(client, target_reg[channel] + 1, val2);
if (ret < 0)
break;
/* Setting TACH count re-enables fan fault detection */
data->fault &= ~BIT(channel);
break;
default:
ret = -EOPNOTSUPP;
break;
}
break;
default:
ret = -EOPNOTSUPP;
break;
}
error:
mutex_unlock(&data->update_lock);
return ret;
}
static const struct hwmon_channel_info * const max6620_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM),
NULL
};
static const struct hwmon_ops max6620_hwmon_ops = {
.read = max6620_read,
.write = max6620_write,
.is_visible = max6620_is_visible,
};
static const struct hwmon_chip_info max6620_chip_info = {
.ops = &max6620_hwmon_ops,
.info = max6620_info,
};
static int max6620_init_client(struct max6620_data *data)
{
struct i2c_client *client = data->client;
int config;
int err;
int i;
int reg;
config = i2c_smbus_read_byte_data(client, MAX6620_REG_CONFIG);
if (config < 0) {
dev_err(&client->dev, "Error reading config, aborting.\n");
return config;
}
/*
* Set bit 4, disable other fans from going full speed on a fail
* failure.
*/
err = i2c_smbus_write_byte_data(client, MAX6620_REG_CONFIG, config | 0x10);
if (err < 0) {
dev_err(&client->dev, "Config write error, aborting.\n");
return err;
}
for (i = 0; i < 4; i++) {
reg = i2c_smbus_read_byte_data(client, config_reg[i]);
if (reg < 0)
return reg;
data->fancfg[i] = reg;
/* Enable RPM mode */
data->fancfg[i] |= 0xa8;
err = i2c_smbus_write_byte_data(client, config_reg[i], data->fancfg[i]);
if (err < 0)
return err;
/* 2 counts (001) and Rate change 100 (0.125 secs) */
data->fandyn[i] = 0x30;
err = i2c_smbus_write_byte_data(client, dyn_reg[i], data->fandyn[i]);
if (err < 0)
return err;
}
return 0;
}
static int max6620_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct max6620_data *data;
struct device *hwmon_dev;
int err;
data = devm_kzalloc(dev, sizeof(struct max6620_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
err = max6620_init_client(data);
if (err)
return err;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&max6620_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max6620_id[] = {
{ "max6620", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max6620_id);
static struct i2c_driver max6620_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "max6620",
},
.probe = max6620_probe,
.id_table = max6620_id,
};
module_i2c_driver(max6620_driver);
MODULE_AUTHOR("Lucas Grunenberg");
MODULE_DESCRIPTION("MAX6620 sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max6620.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* Honeywell HIH-6130/HIH-6131 humidity and temperature sensor driver
*
* Copyright (C) 2012 Iain Paton <[email protected]>
*
* heavily based on the sht21 driver
* Copyright (C) 2010 Urs Fleisch <[email protected]>
*
* Data sheets available (2012-06-22) at
* http://sensing.honeywell.com/index.php?ci_id=3106&la_id=1&defId=44872
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
/**
* struct hih6130 - HIH-6130 device specific data
* @client: pointer to I2C client device
* @lock: mutex to protect measurement values
* @valid: only false before first measurement is taken
* @last_update: time of last update (jiffies)
* @temperature: cached temperature measurement value
* @humidity: cached humidity measurement value
* @write_length: length for I2C measurement request
*/
struct hih6130 {
struct i2c_client *client;
struct mutex lock;
bool valid;
unsigned long last_update;
int temperature;
int humidity;
size_t write_length;
};
/**
* hih6130_temp_ticks_to_millicelsius() - convert raw temperature ticks to
* milli celsius
* @ticks: temperature ticks value received from sensor
*/
static inline int hih6130_temp_ticks_to_millicelsius(int ticks)
{
ticks = ticks >> 2;
/*
* from data sheet section 5.0
* Formula T = ( ticks / ( 2^14 - 2 ) ) * 165 -40
*/
return (DIV_ROUND_CLOSEST(ticks * 1650, 16382) - 400) * 100;
}
/**
* hih6130_rh_ticks_to_per_cent_mille() - convert raw humidity ticks to
* one-thousandths of a percent relative humidity
* @ticks: humidity ticks value received from sensor
*/
static inline int hih6130_rh_ticks_to_per_cent_mille(int ticks)
{
ticks &= ~0xC000; /* clear status bits */
/*
* from data sheet section 4.0
* Formula RH = ( ticks / ( 2^14 -2 ) ) * 100
*/
return DIV_ROUND_CLOSEST(ticks * 1000, 16382) * 100;
}
/**
* hih6130_update_measurements() - get updated measurements from device
* @dev: device
*
* Returns 0 on success, else negative errno.
*/
static int hih6130_update_measurements(struct device *dev)
{
struct hih6130 *hih6130 = dev_get_drvdata(dev);
struct i2c_client *client = hih6130->client;
int ret = 0;
int t;
unsigned char tmp[4];
struct i2c_msg msgs[1] = {
{
.addr = client->addr,
.flags = I2C_M_RD,
.len = 4,
.buf = tmp,
}
};
mutex_lock(&hih6130->lock);
/*
* While the measurement can be completed in ~40ms the sensor takes
* much longer to react to a change in external conditions. How quickly
* it reacts depends on airflow and other factors outwith our control.
* The datasheet specifies maximum 'Response time' for humidity at 8s
* and temperature at 30s under specified conditions.
* We therefore choose to only read the sensor at most once per second.
* This trades off pointless activity polling the sensor much faster
* than it can react against better response times in conditions more
* favourable than specified in the datasheet.
*/
if (time_after(jiffies, hih6130->last_update + HZ) || !hih6130->valid) {
/*
* Write to slave address to request a measurement.
* According with the datasheet it should be with no data, but
* for systems with I2C bus drivers that do not allow zero
* length packets we write one dummy byte to allow sensor
* measurements on them.
*/
tmp[0] = 0;
ret = i2c_master_send(client, tmp, hih6130->write_length);
if (ret < 0)
goto out;
/* measurement cycle time is ~36.65msec */
msleep(40);
ret = i2c_transfer(client->adapter, msgs, 1);
if (ret < 0)
goto out;
if ((tmp[0] & 0xC0) != 0) {
dev_err(&client->dev, "Error while reading measurement result\n");
ret = -EIO;
goto out;
}
t = (tmp[0] << 8) + tmp[1];
hih6130->humidity = hih6130_rh_ticks_to_per_cent_mille(t);
t = (tmp[2] << 8) + tmp[3];
hih6130->temperature = hih6130_temp_ticks_to_millicelsius(t);
hih6130->last_update = jiffies;
hih6130->valid = true;
}
out:
mutex_unlock(&hih6130->lock);
return ret >= 0 ? 0 : ret;
}
/**
* hih6130_temperature_show() - show temperature measurement value in sysfs
* @dev: device
* @attr: device attribute
* @buf: sysfs buffer (PAGE_SIZE) where measurement values are written to
*
* Will be called on read access to temp1_input sysfs attribute.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t hih6130_temperature_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct hih6130 *hih6130 = dev_get_drvdata(dev);
int ret;
ret = hih6130_update_measurements(dev);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", hih6130->temperature);
}
/**
* hih6130_humidity_show() - show humidity measurement value in sysfs
* @dev: device
* @attr: device attribute
* @buf: sysfs buffer (PAGE_SIZE) where measurement values are written to
*
* Will be called on read access to humidity1_input sysfs attribute.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t hih6130_humidity_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct hih6130 *hih6130 = dev_get_drvdata(dev);
int ret;
ret = hih6130_update_measurements(dev);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", hih6130->humidity);
}
/* sysfs attributes */
static SENSOR_DEVICE_ATTR_RO(temp1_input, hih6130_temperature, 0);
static SENSOR_DEVICE_ATTR_RO(humidity1_input, hih6130_humidity, 0);
static struct attribute *hih6130_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_humidity1_input.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(hih6130);
static int hih6130_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct hih6130 *hih6130;
struct device *hwmon_dev;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "adapter does not support true I2C\n");
return -ENODEV;
}
hih6130 = devm_kzalloc(dev, sizeof(*hih6130), GFP_KERNEL);
if (!hih6130)
return -ENOMEM;
hih6130->client = client;
mutex_init(&hih6130->lock);
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_QUICK))
hih6130->write_length = 1;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
hih6130,
hih6130_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/* Device ID table */
static const struct i2c_device_id hih6130_id[] = {
{ "hih6130", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, hih6130_id);
static const struct of_device_id __maybe_unused hih6130_of_match[] = {
{ .compatible = "honeywell,hih6130", },
{ }
};
MODULE_DEVICE_TABLE(of, hih6130_of_match);
static struct i2c_driver hih6130_driver = {
.driver = {
.name = "hih6130",
.of_match_table = of_match_ptr(hih6130_of_match),
},
.probe = hih6130_probe,
.id_table = hih6130_id,
};
module_i2c_driver(hih6130_driver);
MODULE_AUTHOR("Iain Paton <[email protected]>");
MODULE_DESCRIPTION("Honeywell HIH-6130 humidity and temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/hih6130.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Reverse-engineered NZXT RGB & Fan Controller/Smart Device v2 driver.
*
* Copyright (c) 2021 Aleksandr Mezin
*/
#include <linux/hid.h>
#include <linux/hwmon.h>
#include <linux/math.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/wait.h>
#include <asm/byteorder.h>
#include <asm/unaligned.h>
/*
* The device has only 3 fan channels/connectors. But all HID reports have
* space reserved for up to 8 channels.
*/
#define FAN_CHANNELS 3
#define FAN_CHANNELS_MAX 8
#define UPDATE_INTERVAL_DEFAULT_MS 1000
/* These strings match labels on the device exactly */
static const char *const fan_label[] = {
"FAN 1",
"FAN 2",
"FAN 3",
};
static const char *const curr_label[] = {
"FAN 1 Current",
"FAN 2 Current",
"FAN 3 Current",
};
static const char *const in_label[] = {
"FAN 1 Voltage",
"FAN 2 Voltage",
"FAN 3 Voltage",
};
enum {
INPUT_REPORT_ID_FAN_CONFIG = 0x61,
INPUT_REPORT_ID_FAN_STATUS = 0x67,
};
enum {
FAN_STATUS_REPORT_SPEED = 0x02,
FAN_STATUS_REPORT_VOLTAGE = 0x04,
};
enum {
FAN_TYPE_NONE = 0,
FAN_TYPE_DC = 1,
FAN_TYPE_PWM = 2,
};
struct unknown_static_data {
/*
* Some configuration data? Stays the same after fan speed changes,
* changes in fan configuration, reboots and driver reloads.
*
* The same data in multiple report types.
*
* Byte 12 seems to be the number of fan channels, but I am not sure.
*/
u8 unknown1[14];
} __packed;
/*
* The device sends this input report in response to "detect fans" command:
* a 2-byte output report { 0x60, 0x03 }.
*/
struct fan_config_report {
/* report_id should be INPUT_REPORT_ID_FAN_CONFIG = 0x61 */
u8 report_id;
/* Always 0x03 */
u8 magic;
struct unknown_static_data unknown_data;
/* Fan type as detected by the device. See FAN_TYPE_* enum. */
u8 fan_type[FAN_CHANNELS_MAX];
} __packed;
/*
* The device sends these reports at a fixed interval (update interval) -
* one report with type = FAN_STATUS_REPORT_SPEED, and one report with type =
* FAN_STATUS_REPORT_VOLTAGE per update interval.
*/
struct fan_status_report {
/* report_id should be INPUT_REPORT_ID_STATUS = 0x67 */
u8 report_id;
/* FAN_STATUS_REPORT_SPEED = 0x02 or FAN_STATUS_REPORT_VOLTAGE = 0x04 */
u8 type;
struct unknown_static_data unknown_data;
/* Fan type as detected by the device. See FAN_TYPE_* enum. */
u8 fan_type[FAN_CHANNELS_MAX];
union {
/* When type == FAN_STATUS_REPORT_SPEED */
struct {
/*
* Fan speed, in RPM. Zero for channels without fans
* connected.
*/
__le16 fan_rpm[FAN_CHANNELS_MAX];
/*
* Fan duty cycle, in percent. Non-zero even for
* channels without fans connected.
*/
u8 duty_percent[FAN_CHANNELS_MAX];
/*
* Exactly the same values as duty_percent[], non-zero
* for disconnected fans too.
*/
u8 duty_percent_dup[FAN_CHANNELS_MAX];
/* "Case Noise" in db */
u8 noise_db;
} __packed fan_speed;
/* When type == FAN_STATUS_REPORT_VOLTAGE */
struct {
/*
* Voltage, in millivolts. Non-zero even when fan is
* not connected.
*/
__le16 fan_in[FAN_CHANNELS_MAX];
/*
* Current, in milliamperes. Near-zero when
* disconnected.
*/
__le16 fan_current[FAN_CHANNELS_MAX];
} __packed fan_voltage;
} __packed;
} __packed;
#define OUTPUT_REPORT_SIZE 64
enum {
OUTPUT_REPORT_ID_INIT_COMMAND = 0x60,
OUTPUT_REPORT_ID_SET_FAN_SPEED = 0x62,
};
enum {
INIT_COMMAND_SET_UPDATE_INTERVAL = 0x02,
INIT_COMMAND_DETECT_FANS = 0x03,
};
/*
* This output report sets pwm duty cycle/target fan speed for one or more
* channels.
*/
struct set_fan_speed_report {
/* report_id should be OUTPUT_REPORT_ID_SET_FAN_SPEED = 0x62 */
u8 report_id;
/* Should be 0x01 */
u8 magic;
/* To change fan speed on i-th channel, set i-th bit here */
u8 channel_bit_mask;
/*
* Fan duty cycle/target speed in percent. For voltage-controlled fans,
* the minimal voltage (duty_percent = 1) is about 9V.
* Setting duty_percent to 0 (if the channel is selected in
* channel_bit_mask) turns off the fan completely (regardless of the
* control mode).
*/
u8 duty_percent[FAN_CHANNELS_MAX];
} __packed;
struct drvdata {
struct hid_device *hid;
struct device *hwmon;
u8 fan_duty_percent[FAN_CHANNELS];
u16 fan_rpm[FAN_CHANNELS];
bool pwm_status_received;
u16 fan_in[FAN_CHANNELS];
u16 fan_curr[FAN_CHANNELS];
bool voltage_status_received;
u8 fan_type[FAN_CHANNELS];
bool fan_config_received;
/*
* wq is used to wait for *_received flags to become true.
* All accesses to *_received flags and fan_* arrays are performed with
* wq.lock held.
*/
wait_queue_head_t wq;
/*
* mutex is used to:
* 1) Prevent concurrent conflicting changes to update interval and pwm
* values (after sending an output hid report, the corresponding field
* in drvdata must be updated, and only then new output reports can be
* sent).
* 2) Synchronize access to output_buffer (well, the buffer is here,
* because synchronization is necessary anyway - so why not get rid of
* a kmalloc?).
*/
struct mutex mutex;
long update_interval;
u8 output_buffer[OUTPUT_REPORT_SIZE];
};
static long scale_pwm_value(long val, long orig_max, long new_max)
{
if (val <= 0)
return 0;
/*
* Positive values should not become zero: 0 completely turns off the
* fan.
*/
return max(1L, DIV_ROUND_CLOSEST(min(val, orig_max) * new_max, orig_max));
}
static void handle_fan_config_report(struct drvdata *drvdata, void *data, int size)
{
struct fan_config_report *report = data;
int i;
if (size < sizeof(struct fan_config_report))
return;
if (report->magic != 0x03)
return;
spin_lock(&drvdata->wq.lock);
for (i = 0; i < FAN_CHANNELS; i++)
drvdata->fan_type[i] = report->fan_type[i];
drvdata->fan_config_received = true;
wake_up_all_locked(&drvdata->wq);
spin_unlock(&drvdata->wq.lock);
}
static void handle_fan_status_report(struct drvdata *drvdata, void *data, int size)
{
struct fan_status_report *report = data;
int i;
if (size < sizeof(struct fan_status_report))
return;
spin_lock(&drvdata->wq.lock);
/*
* The device sends INPUT_REPORT_ID_FAN_CONFIG = 0x61 report in response
* to "detect fans" command. Only accept other data after getting 0x61,
* to make sure that fan detection is complete. In particular, fan
* detection resets pwm values.
*/
if (!drvdata->fan_config_received) {
spin_unlock(&drvdata->wq.lock);
return;
}
for (i = 0; i < FAN_CHANNELS; i++) {
if (drvdata->fan_type[i] == report->fan_type[i])
continue;
/*
* This should not happen (if my expectations about the device
* are correct).
*
* Even if the userspace sends fan detect command through
* hidraw, fan config report should arrive first.
*/
hid_warn_once(drvdata->hid,
"Fan %d type changed unexpectedly from %d to %d",
i, drvdata->fan_type[i], report->fan_type[i]);
drvdata->fan_type[i] = report->fan_type[i];
}
switch (report->type) {
case FAN_STATUS_REPORT_SPEED:
for (i = 0; i < FAN_CHANNELS; i++) {
drvdata->fan_rpm[i] =
get_unaligned_le16(&report->fan_speed.fan_rpm[i]);
drvdata->fan_duty_percent[i] =
report->fan_speed.duty_percent[i];
}
drvdata->pwm_status_received = true;
wake_up_all_locked(&drvdata->wq);
break;
case FAN_STATUS_REPORT_VOLTAGE:
for (i = 0; i < FAN_CHANNELS; i++) {
drvdata->fan_in[i] =
get_unaligned_le16(&report->fan_voltage.fan_in[i]);
drvdata->fan_curr[i] =
get_unaligned_le16(&report->fan_voltage.fan_current[i]);
}
drvdata->voltage_status_received = true;
wake_up_all_locked(&drvdata->wq);
break;
}
spin_unlock(&drvdata->wq.lock);
}
static umode_t nzxt_smart2_hwmon_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
case hwmon_pwm_enable:
return 0644;
default:
return 0444;
}
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return 0644;
default:
return 0444;
}
default:
return 0444;
}
}
static int nzxt_smart2_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct drvdata *drvdata = dev_get_drvdata(dev);
int res = -EINVAL;
if (type == hwmon_chip) {
switch (attr) {
case hwmon_chip_update_interval:
*val = drvdata->update_interval;
return 0;
default:
return -EINVAL;
}
}
spin_lock_irq(&drvdata->wq.lock);
switch (type) {
case hwmon_pwm:
/*
* fancontrol:
* 1) remembers pwm* values when it starts
* 2) needs pwm*_enable to be 1 on controlled fans
* So make sure we have correct data before allowing pwm* reads.
* Returning errors for pwm of fan speed read can even cause
* fancontrol to shut down. So the wait is unavoidable.
*/
switch (attr) {
case hwmon_pwm_enable:
res = wait_event_interruptible_locked_irq(drvdata->wq,
drvdata->fan_config_received);
if (res)
goto unlock;
*val = drvdata->fan_type[channel] != FAN_TYPE_NONE;
break;
case hwmon_pwm_mode:
res = wait_event_interruptible_locked_irq(drvdata->wq,
drvdata->fan_config_received);
if (res)
goto unlock;
*val = drvdata->fan_type[channel] == FAN_TYPE_PWM;
break;
case hwmon_pwm_input:
res = wait_event_interruptible_locked_irq(drvdata->wq,
drvdata->pwm_status_received);
if (res)
goto unlock;
*val = scale_pwm_value(drvdata->fan_duty_percent[channel],
100, 255);
break;
}
break;
case hwmon_fan:
/*
* It's not strictly necessary to wait for *_received in the
* remaining cases (fancontrol doesn't care about them). But I'm
* doing it to have consistent behavior.
*/
if (attr == hwmon_fan_input) {
res = wait_event_interruptible_locked_irq(drvdata->wq,
drvdata->pwm_status_received);
if (res)
goto unlock;
*val = drvdata->fan_rpm[channel];
}
break;
case hwmon_in:
if (attr == hwmon_in_input) {
res = wait_event_interruptible_locked_irq(drvdata->wq,
drvdata->voltage_status_received);
if (res)
goto unlock;
*val = drvdata->fan_in[channel];
}
break;
case hwmon_curr:
if (attr == hwmon_curr_input) {
res = wait_event_interruptible_locked_irq(drvdata->wq,
drvdata->voltage_status_received);
if (res)
goto unlock;
*val = drvdata->fan_curr[channel];
}
break;
default:
break;
}
unlock:
spin_unlock_irq(&drvdata->wq.lock);
return res;
}
static int send_output_report(struct drvdata *drvdata, const void *data,
size_t data_size)
{
int ret;
if (data_size > sizeof(drvdata->output_buffer))
return -EINVAL;
memcpy(drvdata->output_buffer, data, data_size);
if (data_size < sizeof(drvdata->output_buffer))
memset(drvdata->output_buffer + data_size, 0,
sizeof(drvdata->output_buffer) - data_size);
ret = hid_hw_output_report(drvdata->hid, drvdata->output_buffer,
sizeof(drvdata->output_buffer));
return ret < 0 ? ret : 0;
}
static int set_pwm(struct drvdata *drvdata, int channel, long val)
{
int ret;
u8 duty_percent = scale_pwm_value(val, 255, 100);
struct set_fan_speed_report report = {
.report_id = OUTPUT_REPORT_ID_SET_FAN_SPEED,
.magic = 1,
.channel_bit_mask = 1 << channel
};
ret = mutex_lock_interruptible(&drvdata->mutex);
if (ret)
return ret;
report.duty_percent[channel] = duty_percent;
ret = send_output_report(drvdata, &report, sizeof(report));
if (ret)
goto unlock;
/*
* pwmconfig and fancontrol scripts expect pwm writes to take effect
* immediately (i. e. read from pwm* sysfs should return the value
* written into it). The device seems to always accept pwm values - even
* when there is no fan connected - so update pwm status without waiting
* for a report, to make pwmconfig and fancontrol happy. Worst case -
* if the device didn't accept new pwm value for some reason (never seen
* this in practice) - it will be reported incorrectly only until next
* update. This avoids "fan stuck" messages from pwmconfig, and
* fancontrol setting fan speed to 100% during shutdown.
*/
spin_lock_bh(&drvdata->wq.lock);
drvdata->fan_duty_percent[channel] = duty_percent;
spin_unlock_bh(&drvdata->wq.lock);
unlock:
mutex_unlock(&drvdata->mutex);
return ret;
}
/*
* Workaround for fancontrol/pwmconfig trying to write to pwm*_enable even if it
* already is 1 and read-only. Otherwise, fancontrol won't restore pwm on
* shutdown properly.
*/
static int set_pwm_enable(struct drvdata *drvdata, int channel, long val)
{
long expected_val;
int res;
spin_lock_irq(&drvdata->wq.lock);
res = wait_event_interruptible_locked_irq(drvdata->wq,
drvdata->fan_config_received);
if (res) {
spin_unlock_irq(&drvdata->wq.lock);
return res;
}
expected_val = drvdata->fan_type[channel] != FAN_TYPE_NONE;
spin_unlock_irq(&drvdata->wq.lock);
return (val == expected_val) ? 0 : -EOPNOTSUPP;
}
/*
* Control byte | Actual update interval in seconds
* 0xff | 65.5
* 0xf7 | 63.46
* 0x7f | 32.74
* 0x3f | 16.36
* 0x1f | 8.17
* 0x0f | 4.07
* 0x07 | 2.02
* 0x03 | 1.00
* 0x02 | 0.744
* 0x01 | 0.488
* 0x00 | 0.25
*/
static u8 update_interval_to_control_byte(long interval)
{
if (interval <= 250)
return 0;
return clamp_val(1 + DIV_ROUND_CLOSEST(interval - 488, 256), 0, 255);
}
static long control_byte_to_update_interval(u8 control_byte)
{
if (control_byte == 0)
return 250;
return 488 + (control_byte - 1) * 256;
}
static int set_update_interval(struct drvdata *drvdata, long val)
{
u8 control = update_interval_to_control_byte(val);
u8 report[] = {
OUTPUT_REPORT_ID_INIT_COMMAND,
INIT_COMMAND_SET_UPDATE_INTERVAL,
0x01,
0xe8,
control,
0x01,
0xe8,
control,
};
int ret;
ret = send_output_report(drvdata, report, sizeof(report));
if (ret)
return ret;
drvdata->update_interval = control_byte_to_update_interval(control);
return 0;
}
static int init_device(struct drvdata *drvdata, long update_interval)
{
int ret;
static const u8 detect_fans_report[] = {
OUTPUT_REPORT_ID_INIT_COMMAND,
INIT_COMMAND_DETECT_FANS,
};
ret = send_output_report(drvdata, detect_fans_report,
sizeof(detect_fans_report));
if (ret)
return ret;
return set_update_interval(drvdata, update_interval);
}
static int nzxt_smart2_hwmon_write(struct device *dev,
enum hwmon_sensor_types type, u32 attr,
int channel, long val)
{
struct drvdata *drvdata = dev_get_drvdata(dev);
int ret;
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_enable:
return set_pwm_enable(drvdata, channel, val);
case hwmon_pwm_input:
return set_pwm(drvdata, channel, val);
default:
return -EINVAL;
}
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
ret = mutex_lock_interruptible(&drvdata->mutex);
if (ret)
return ret;
ret = set_update_interval(drvdata, val);
mutex_unlock(&drvdata->mutex);
return ret;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int nzxt_smart2_hwmon_read_string(struct device *dev,
enum hwmon_sensor_types type, u32 attr,
int channel, const char **str)
{
switch (type) {
case hwmon_fan:
*str = fan_label[channel];
return 0;
case hwmon_curr:
*str = curr_label[channel];
return 0;
case hwmon_in:
*str = in_label[channel];
return 0;
default:
return -EINVAL;
}
}
static const struct hwmon_ops nzxt_smart2_hwmon_ops = {
.is_visible = nzxt_smart2_hwmon_is_visible,
.read = nzxt_smart2_hwmon_read,
.read_string = nzxt_smart2_hwmon_read_string,
.write = nzxt_smart2_hwmon_write,
};
static const struct hwmon_channel_info * const nzxt_smart2_channel_info[] = {
HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_LABEL),
HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT | HWMON_PWM_MODE | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_MODE | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_MODE | HWMON_PWM_ENABLE),
HWMON_CHANNEL_INFO(in, HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL),
HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL),
NULL
};
static const struct hwmon_chip_info nzxt_smart2_chip_info = {
.ops = &nzxt_smart2_hwmon_ops,
.info = nzxt_smart2_channel_info,
};
static int nzxt_smart2_hid_raw_event(struct hid_device *hdev,
struct hid_report *report, u8 *data, int size)
{
struct drvdata *drvdata = hid_get_drvdata(hdev);
u8 report_id = *data;
switch (report_id) {
case INPUT_REPORT_ID_FAN_CONFIG:
handle_fan_config_report(drvdata, data, size);
break;
case INPUT_REPORT_ID_FAN_STATUS:
handle_fan_status_report(drvdata, data, size);
break;
}
return 0;
}
static int __maybe_unused nzxt_smart2_hid_reset_resume(struct hid_device *hdev)
{
struct drvdata *drvdata = hid_get_drvdata(hdev);
/*
* Userspace is still frozen (so no concurrent sysfs attribute access
* is possible), but raw_event can already be called concurrently.
*/
spin_lock_bh(&drvdata->wq.lock);
drvdata->fan_config_received = false;
drvdata->pwm_status_received = false;
drvdata->voltage_status_received = false;
spin_unlock_bh(&drvdata->wq.lock);
return init_device(drvdata, drvdata->update_interval);
}
static void mutex_fini(void *lock)
{
mutex_destroy(lock);
}
static int nzxt_smart2_hid_probe(struct hid_device *hdev,
const struct hid_device_id *id)
{
struct drvdata *drvdata;
int ret;
drvdata = devm_kzalloc(&hdev->dev, sizeof(struct drvdata), GFP_KERNEL);
if (!drvdata)
return -ENOMEM;
drvdata->hid = hdev;
hid_set_drvdata(hdev, drvdata);
init_waitqueue_head(&drvdata->wq);
mutex_init(&drvdata->mutex);
ret = devm_add_action_or_reset(&hdev->dev, mutex_fini, &drvdata->mutex);
if (ret)
return ret;
ret = hid_parse(hdev);
if (ret)
return ret;
ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
if (ret)
return ret;
ret = hid_hw_open(hdev);
if (ret)
goto out_hw_stop;
hid_device_io_start(hdev);
init_device(drvdata, UPDATE_INTERVAL_DEFAULT_MS);
drvdata->hwmon =
hwmon_device_register_with_info(&hdev->dev, "nzxtsmart2", drvdata,
&nzxt_smart2_chip_info, NULL);
if (IS_ERR(drvdata->hwmon)) {
ret = PTR_ERR(drvdata->hwmon);
goto out_hw_close;
}
return 0;
out_hw_close:
hid_hw_close(hdev);
out_hw_stop:
hid_hw_stop(hdev);
return ret;
}
static void nzxt_smart2_hid_remove(struct hid_device *hdev)
{
struct drvdata *drvdata = hid_get_drvdata(hdev);
hwmon_device_unregister(drvdata->hwmon);
hid_hw_close(hdev);
hid_hw_stop(hdev);
}
static const struct hid_device_id nzxt_smart2_hid_id_table[] = {
{ HID_USB_DEVICE(0x1e71, 0x2006) }, /* NZXT Smart Device V2 */
{ HID_USB_DEVICE(0x1e71, 0x200d) }, /* NZXT Smart Device V2 */
{ HID_USB_DEVICE(0x1e71, 0x200f) }, /* NZXT Smart Device V2 */
{ HID_USB_DEVICE(0x1e71, 0x2009) }, /* NZXT RGB & Fan Controller */
{ HID_USB_DEVICE(0x1e71, 0x200e) }, /* NZXT RGB & Fan Controller */
{ HID_USB_DEVICE(0x1e71, 0x2010) }, /* NZXT RGB & Fan Controller */
{ HID_USB_DEVICE(0x1e71, 0x2011) }, /* NZXT RGB & Fan Controller (6 RGB) */
{ HID_USB_DEVICE(0x1e71, 0x2019) }, /* NZXT RGB & Fan Controller (6 RGB) */
{},
};
static struct hid_driver nzxt_smart2_hid_driver = {
.name = "nzxt-smart2",
.id_table = nzxt_smart2_hid_id_table,
.probe = nzxt_smart2_hid_probe,
.remove = nzxt_smart2_hid_remove,
.raw_event = nzxt_smart2_hid_raw_event,
#ifdef CONFIG_PM
.reset_resume = nzxt_smart2_hid_reset_resume,
#endif
};
static int __init nzxt_smart2_init(void)
{
return hid_register_driver(&nzxt_smart2_hid_driver);
}
static void __exit nzxt_smart2_exit(void)
{
hid_unregister_driver(&nzxt_smart2_hid_driver);
}
MODULE_DEVICE_TABLE(hid, nzxt_smart2_hid_id_table);
MODULE_AUTHOR("Aleksandr Mezin <[email protected]>");
MODULE_DESCRIPTION("Driver for NZXT RGB & Fan Controller/Smart Device V2");
MODULE_LICENSE("GPL");
/*
* With module_init()/module_hid_driver() and the driver built into the kernel:
*
* Driver 'nzxt_smart2' was unable to register with bus_type 'hid' because the
* bus was not initialized.
*/
late_initcall(nzxt_smart2_init);
module_exit(nzxt_smart2_exit);
|
linux-master
|
drivers/hwmon/nzxt-smart2.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* hwmon driver for Aquacomputer devices (D5 Next, Farbwerk, Farbwerk 360, Octo,
* Quadro, High Flow Next, Aquaero, Aquastream Ultimate, Leakshield)
*
* Aquacomputer devices send HID reports (with ID 0x01) every second to report
* sensor values, except for devices that communicate through the
* legacy way (currently, Poweradjust 3).
*
* Copyright 2021 Aleksa Savic <[email protected]>
* Copyright 2022 Jack Doan <[email protected]>
*/
#include <linux/crc16.h>
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <linux/hid.h>
#include <linux/hwmon.h>
#include <linux/jiffies.h>
#include <linux/ktime.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/seq_file.h>
#include <asm/unaligned.h>
#define USB_VENDOR_ID_AQUACOMPUTER 0x0c70
#define USB_PRODUCT_ID_AQUAERO 0xf001
#define USB_PRODUCT_ID_FARBWERK 0xf00a
#define USB_PRODUCT_ID_QUADRO 0xf00d
#define USB_PRODUCT_ID_D5NEXT 0xf00e
#define USB_PRODUCT_ID_FARBWERK360 0xf010
#define USB_PRODUCT_ID_OCTO 0xf011
#define USB_PRODUCT_ID_HIGHFLOWNEXT 0xf012
#define USB_PRODUCT_ID_LEAKSHIELD 0xf014
#define USB_PRODUCT_ID_AQUASTREAMXT 0xf0b6
#define USB_PRODUCT_ID_AQUASTREAMULT 0xf00b
#define USB_PRODUCT_ID_POWERADJUST3 0xf0bd
enum kinds {
d5next, farbwerk, farbwerk360, octo, quadro,
highflownext, aquaero, poweradjust3, aquastreamult,
aquastreamxt, leakshield
};
static const char *const aqc_device_names[] = {
[d5next] = "d5next",
[farbwerk] = "farbwerk",
[farbwerk360] = "farbwerk360",
[octo] = "octo",
[quadro] = "quadro",
[highflownext] = "highflownext",
[leakshield] = "leakshield",
[aquastreamxt] = "aquastreamxt",
[aquaero] = "aquaero",
[aquastreamult] = "aquastreamultimate",
[poweradjust3] = "poweradjust3"
};
#define DRIVER_NAME "aquacomputer_d5next"
#define STATUS_REPORT_ID 0x01
#define STATUS_UPDATE_INTERVAL (2 * HZ) /* In seconds */
#define SERIAL_PART_OFFSET 2
#define CTRL_REPORT_ID 0x03
#define AQUAERO_CTRL_REPORT_ID 0x0b
#define CTRL_REPORT_DELAY 200 /* ms */
/* The HID report that the official software always sends
* after writing values, currently same for all devices
*/
#define SECONDARY_CTRL_REPORT_ID 0x02
#define SECONDARY_CTRL_REPORT_SIZE 0x0B
static u8 secondary_ctrl_report[] = {
0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x34, 0xC6
};
/* Secondary HID report values for Aquaero */
#define AQUAERO_SECONDARY_CTRL_REPORT_ID 0x06
#define AQUAERO_SECONDARY_CTRL_REPORT_SIZE 0x07
static u8 aquaero_secondary_ctrl_report[] = {
0x06, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00
};
/* Report IDs for legacy devices */
#define AQUASTREAMXT_STATUS_REPORT_ID 0x04
#define POWERADJUST3_STATUS_REPORT_ID 0x03
/* Data types for reading and writing control reports */
#define AQC_8 0
#define AQC_BE16 1
/* Info, sensor sizes and offsets for most Aquacomputer devices */
#define AQC_SERIAL_START 0x3
#define AQC_FIRMWARE_VERSION 0xD
#define AQC_SENSOR_SIZE 0x02
#define AQC_SENSOR_NA 0x7FFF
#define AQC_FAN_PERCENT_OFFSET 0x00
#define AQC_FAN_VOLTAGE_OFFSET 0x02
#define AQC_FAN_CURRENT_OFFSET 0x04
#define AQC_FAN_POWER_OFFSET 0x06
#define AQC_FAN_SPEED_OFFSET 0x08
/* Specs of the Aquaero fan controllers */
#define AQUAERO_SERIAL_START 0x07
#define AQUAERO_FIRMWARE_VERSION 0x0B
#define AQUAERO_NUM_FANS 4
#define AQUAERO_NUM_SENSORS 8
#define AQUAERO_NUM_VIRTUAL_SENSORS 8
#define AQUAERO_NUM_CALC_VIRTUAL_SENSORS 4
#define AQUAERO_NUM_FLOW_SENSORS 2
#define AQUAERO_CTRL_REPORT_SIZE 0xa93
#define AQUAERO_CTRL_PRESET_ID 0x5c
#define AQUAERO_CTRL_PRESET_SIZE 0x02
#define AQUAERO_CTRL_PRESET_START 0x55c
/* Sensor report offsets for Aquaero fan controllers */
#define AQUAERO_SENSOR_START 0x65
#define AQUAERO_VIRTUAL_SENSOR_START 0x85
#define AQUAERO_CALC_VIRTUAL_SENSOR_START 0x95
#define AQUAERO_FLOW_SENSORS_START 0xF9
#define AQUAERO_FAN_VOLTAGE_OFFSET 0x04
#define AQUAERO_FAN_CURRENT_OFFSET 0x06
#define AQUAERO_FAN_POWER_OFFSET 0x08
#define AQUAERO_FAN_SPEED_OFFSET 0x00
static u16 aquaero_sensor_fan_offsets[] = { 0x167, 0x173, 0x17f, 0x18B };
/* Control report offsets for the Aquaero fan controllers */
#define AQUAERO_TEMP_CTRL_OFFSET 0xdb
#define AQUAERO_FAN_CTRL_MIN_PWR_OFFSET 0x04
#define AQUAERO_FAN_CTRL_MAX_PWR_OFFSET 0x06
#define AQUAERO_FAN_CTRL_SRC_OFFSET 0x10
static u16 aquaero_ctrl_fan_offsets[] = { 0x20c, 0x220, 0x234, 0x248 };
/* Specs of the D5 Next pump */
#define D5NEXT_NUM_FANS 2
#define D5NEXT_NUM_SENSORS 1
#define D5NEXT_NUM_VIRTUAL_SENSORS 8
#define D5NEXT_CTRL_REPORT_SIZE 0x329
/* Sensor report offsets for the D5 Next pump */
#define D5NEXT_POWER_CYCLES 0x18
#define D5NEXT_COOLANT_TEMP 0x57
#define D5NEXT_PUMP_OFFSET 0x6c
#define D5NEXT_FAN_OFFSET 0x5f
#define D5NEXT_5V_VOLTAGE 0x39
#define D5NEXT_12V_VOLTAGE 0x37
#define D5NEXT_VIRTUAL_SENSORS_START 0x3f
static u16 d5next_sensor_fan_offsets[] = { D5NEXT_PUMP_OFFSET, D5NEXT_FAN_OFFSET };
/* Control report offsets for the D5 Next pump */
#define D5NEXT_TEMP_CTRL_OFFSET 0x2D /* Temperature sensor offsets location */
static u16 d5next_ctrl_fan_offsets[] = { 0x97, 0x42 }; /* Pump and fan speed (from 0-100%) */
/* Specs of the Aquastream Ultimate pump */
/* Pump does not follow the standard structure, so only consider the fan */
#define AQUASTREAMULT_NUM_FANS 1
#define AQUASTREAMULT_NUM_SENSORS 2
/* Sensor report offsets for the Aquastream Ultimate pump */
#define AQUASTREAMULT_SENSOR_START 0x2D
#define AQUASTREAMULT_PUMP_OFFSET 0x51
#define AQUASTREAMULT_PUMP_VOLTAGE 0x3D
#define AQUASTREAMULT_PUMP_CURRENT 0x53
#define AQUASTREAMULT_PUMP_POWER 0x55
#define AQUASTREAMULT_FAN_OFFSET 0x41
#define AQUASTREAMULT_PRESSURE_OFFSET 0x57
#define AQUASTREAMULT_FLOW_SENSOR_OFFSET 0x37
#define AQUASTREAMULT_FAN_VOLTAGE_OFFSET 0x02
#define AQUASTREAMULT_FAN_CURRENT_OFFSET 0x00
#define AQUASTREAMULT_FAN_POWER_OFFSET 0x04
#define AQUASTREAMULT_FAN_SPEED_OFFSET 0x06
static u16 aquastreamult_sensor_fan_offsets[] = { AQUASTREAMULT_FAN_OFFSET };
/* Spec and sensor report offset for the Farbwerk RGB controller */
#define FARBWERK_NUM_SENSORS 4
#define FARBWERK_SENSOR_START 0x2f
/* Specs of the Farbwerk 360 RGB controller */
#define FARBWERK360_NUM_SENSORS 4
#define FARBWERK360_NUM_VIRTUAL_SENSORS 16
#define FARBWERK360_CTRL_REPORT_SIZE 0x682
/* Sensor report offsets for the Farbwerk 360 */
#define FARBWERK360_SENSOR_START 0x32
#define FARBWERK360_VIRTUAL_SENSORS_START 0x3a
/* Control report offsets for the Farbwerk 360 */
#define FARBWERK360_TEMP_CTRL_OFFSET 0x8
/* Specs of the Octo fan controller */
#define OCTO_NUM_FANS 8
#define OCTO_NUM_SENSORS 4
#define OCTO_NUM_VIRTUAL_SENSORS 16
#define OCTO_CTRL_REPORT_SIZE 0x65F
/* Sensor report offsets for the Octo */
#define OCTO_POWER_CYCLES 0x18
#define OCTO_SENSOR_START 0x3D
#define OCTO_VIRTUAL_SENSORS_START 0x45
static u16 octo_sensor_fan_offsets[] = { 0x7D, 0x8A, 0x97, 0xA4, 0xB1, 0xBE, 0xCB, 0xD8 };
/* Control report offsets for the Octo */
#define OCTO_TEMP_CTRL_OFFSET 0xA
/* Fan speed offsets (0-100%) */
static u16 octo_ctrl_fan_offsets[] = { 0x5B, 0xB0, 0x105, 0x15A, 0x1AF, 0x204, 0x259, 0x2AE };
/* Specs of Quadro fan controller */
#define QUADRO_NUM_FANS 4
#define QUADRO_NUM_SENSORS 4
#define QUADRO_NUM_VIRTUAL_SENSORS 16
#define QUADRO_NUM_FLOW_SENSORS 1
#define QUADRO_CTRL_REPORT_SIZE 0x3c1
/* Sensor report offsets for the Quadro */
#define QUADRO_POWER_CYCLES 0x18
#define QUADRO_SENSOR_START 0x34
#define QUADRO_VIRTUAL_SENSORS_START 0x3c
#define QUADRO_FLOW_SENSOR_OFFSET 0x6e
static u16 quadro_sensor_fan_offsets[] = { 0x70, 0x7D, 0x8A, 0x97 };
/* Control report offsets for the Quadro */
#define QUADRO_TEMP_CTRL_OFFSET 0xA
#define QUADRO_FLOW_PULSES_CTRL_OFFSET 0x6
static u16 quadro_ctrl_fan_offsets[] = { 0x37, 0x8c, 0xe1, 0x136 }; /* Fan speed offsets (0-100%) */
/* Specs of High Flow Next flow sensor */
#define HIGHFLOWNEXT_NUM_SENSORS 2
#define HIGHFLOWNEXT_NUM_FLOW_SENSORS 1
/* Sensor report offsets for the High Flow Next */
#define HIGHFLOWNEXT_SENSOR_START 85
#define HIGHFLOWNEXT_FLOW 81
#define HIGHFLOWNEXT_WATER_QUALITY 89
#define HIGHFLOWNEXT_POWER 91
#define HIGHFLOWNEXT_CONDUCTIVITY 95
#define HIGHFLOWNEXT_5V_VOLTAGE 97
#define HIGHFLOWNEXT_5V_VOLTAGE_USB 99
/* Specs of the Leakshield */
#define LEAKSHIELD_NUM_SENSORS 2
/* Sensor report offsets for Leakshield */
#define LEAKSHIELD_PRESSURE_ADJUSTED 285
#define LEAKSHIELD_TEMPERATURE_1 265
#define LEAKSHIELD_TEMPERATURE_2 287
#define LEAKSHIELD_PRESSURE_MIN 291
#define LEAKSHIELD_PRESSURE_TARGET 293
#define LEAKSHIELD_PRESSURE_MAX 295
#define LEAKSHIELD_PUMP_RPM_IN 101
#define LEAKSHIELD_FLOW_IN 111
#define LEAKSHIELD_RESERVOIR_VOLUME 313
#define LEAKSHIELD_RESERVOIR_FILLED 311
/* Specs of the Aquastream XT pump */
#define AQUASTREAMXT_SERIAL_START 0x3a
#define AQUASTREAMXT_FIRMWARE_VERSION 0x32
#define AQUASTREAMXT_NUM_FANS 2
#define AQUASTREAMXT_NUM_SENSORS 3
#define AQUASTREAMXT_FAN_STOPPED 0x4
#define AQUASTREAMXT_PUMP_CONVERSION_CONST 45000000
#define AQUASTREAMXT_FAN_CONVERSION_CONST 5646000
#define AQUASTREAMXT_SENSOR_REPORT_SIZE 0x42
/* Sensor report offsets and info for Aquastream XT */
#define AQUASTREAMXT_SENSOR_START 0xd
#define AQUASTREAMXT_FAN_VOLTAGE_OFFSET 0x7
#define AQUASTREAMXT_FAN_STATUS_OFFSET 0x1d
#define AQUASTREAMXT_PUMP_VOLTAGE_OFFSET 0x9
#define AQUASTREAMXT_PUMP_CURR_OFFSET 0xb
static u16 aquastreamxt_sensor_fan_offsets[] = { 0x13, 0x1b };
/* Specs of the Poweradjust 3 */
#define POWERADJUST3_NUM_SENSORS 1
#define POWERADJUST3_SENSOR_REPORT_SIZE 0x32
/* Sensor report offsets for the Poweradjust 3 */
#define POWERADJUST3_SENSOR_START 0x03
/* Labels for D5 Next */
static const char *const label_d5next_temp[] = {
"Coolant temp"
};
static const char *const label_d5next_speeds[] = {
"Pump speed",
"Fan speed"
};
static const char *const label_d5next_power[] = {
"Pump power",
"Fan power"
};
static const char *const label_d5next_voltages[] = {
"Pump voltage",
"Fan voltage",
"+5V voltage",
"+12V voltage"
};
static const char *const label_d5next_current[] = {
"Pump current",
"Fan current"
};
/* Labels for Aquaero, Farbwerk, Farbwerk 360 and Octo and Quadro temperature sensors */
static const char *const label_temp_sensors[] = {
"Sensor 1",
"Sensor 2",
"Sensor 3",
"Sensor 4",
"Sensor 5",
"Sensor 6",
"Sensor 7",
"Sensor 8"
};
static const char *const label_virtual_temp_sensors[] = {
"Virtual sensor 1",
"Virtual sensor 2",
"Virtual sensor 3",
"Virtual sensor 4",
"Virtual sensor 5",
"Virtual sensor 6",
"Virtual sensor 7",
"Virtual sensor 8",
"Virtual sensor 9",
"Virtual sensor 10",
"Virtual sensor 11",
"Virtual sensor 12",
"Virtual sensor 13",
"Virtual sensor 14",
"Virtual sensor 15",
"Virtual sensor 16",
};
static const char *const label_aquaero_calc_temp_sensors[] = {
"Calc. virtual sensor 1",
"Calc. virtual sensor 2",
"Calc. virtual sensor 3",
"Calc. virtual sensor 4"
};
/* Labels for Octo and Quadro (except speed) */
static const char *const label_fan_speed[] = {
"Fan 1 speed",
"Fan 2 speed",
"Fan 3 speed",
"Fan 4 speed",
"Fan 5 speed",
"Fan 6 speed",
"Fan 7 speed",
"Fan 8 speed"
};
static const char *const label_fan_power[] = {
"Fan 1 power",
"Fan 2 power",
"Fan 3 power",
"Fan 4 power",
"Fan 5 power",
"Fan 6 power",
"Fan 7 power",
"Fan 8 power"
};
static const char *const label_fan_voltage[] = {
"Fan 1 voltage",
"Fan 2 voltage",
"Fan 3 voltage",
"Fan 4 voltage",
"Fan 5 voltage",
"Fan 6 voltage",
"Fan 7 voltage",
"Fan 8 voltage"
};
static const char *const label_fan_current[] = {
"Fan 1 current",
"Fan 2 current",
"Fan 3 current",
"Fan 4 current",
"Fan 5 current",
"Fan 6 current",
"Fan 7 current",
"Fan 8 current"
};
/* Labels for Quadro fan speeds */
static const char *const label_quadro_speeds[] = {
"Fan 1 speed",
"Fan 2 speed",
"Fan 3 speed",
"Fan 4 speed",
"Flow speed [dL/h]"
};
/* Labels for Aquaero fan speeds */
static const char *const label_aquaero_speeds[] = {
"Fan 1 speed",
"Fan 2 speed",
"Fan 3 speed",
"Fan 4 speed",
"Flow sensor 1 [dL/h]",
"Flow sensor 2 [dL/h]"
};
/* Labels for High Flow Next */
static const char *const label_highflownext_temp_sensors[] = {
"Coolant temp",
"External sensor"
};
static const char *const label_highflownext_fan_speed[] = {
"Flow [dL/h]",
"Water quality [%]",
"Conductivity [nS/cm]",
};
static const char *const label_highflownext_power[] = {
"Dissipated power",
};
static const char *const label_highflownext_voltage[] = {
"+5V voltage",
"+5V USB voltage"
};
/* Labels for Leakshield */
static const char *const label_leakshield_temp_sensors[] = {
"Temperature 1",
"Temperature 2"
};
static const char *const label_leakshield_fan_speed[] = {
"Pressure [ubar]",
"User-Provided Pump Speed",
"User-Provided Flow [dL/h]",
"Reservoir Volume [ml]",
"Reservoir Filled [ml]",
};
/* Labels for Aquastream XT */
static const char *const label_aquastreamxt_temp_sensors[] = {
"Fan IC temp",
"External sensor",
"Coolant temp"
};
/* Labels for Aquastream Ultimate */
static const char *const label_aquastreamult_temp[] = {
"Coolant temp",
"External temp"
};
static const char *const label_aquastreamult_speeds[] = {
"Fan speed",
"Pump speed",
"Pressure [mbar]",
"Flow speed [dL/h]"
};
static const char *const label_aquastreamult_power[] = {
"Fan power",
"Pump power"
};
static const char *const label_aquastreamult_voltages[] = {
"Fan voltage",
"Pump voltage"
};
static const char *const label_aquastreamult_current[] = {
"Fan current",
"Pump current"
};
/* Labels for Poweradjust 3 */
static const char *const label_poweradjust3_temp_sensors[] = {
"External sensor"
};
struct aqc_fan_structure_offsets {
u8 voltage;
u8 curr;
u8 power;
u8 speed;
};
/* Fan structure offsets for Aquaero */
static struct aqc_fan_structure_offsets aqc_aquaero_fan_structure = {
.voltage = AQUAERO_FAN_VOLTAGE_OFFSET,
.curr = AQUAERO_FAN_CURRENT_OFFSET,
.power = AQUAERO_FAN_POWER_OFFSET,
.speed = AQUAERO_FAN_SPEED_OFFSET
};
/* Fan structure offsets for Aquastream Ultimate */
static struct aqc_fan_structure_offsets aqc_aquastreamult_fan_structure = {
.voltage = AQUASTREAMULT_FAN_VOLTAGE_OFFSET,
.curr = AQUASTREAMULT_FAN_CURRENT_OFFSET,
.power = AQUASTREAMULT_FAN_POWER_OFFSET,
.speed = AQUASTREAMULT_FAN_SPEED_OFFSET
};
/* Fan structure offsets for all devices except those above */
static struct aqc_fan_structure_offsets aqc_general_fan_structure = {
.voltage = AQC_FAN_VOLTAGE_OFFSET,
.curr = AQC_FAN_CURRENT_OFFSET,
.power = AQC_FAN_POWER_OFFSET,
.speed = AQC_FAN_SPEED_OFFSET
};
struct aqc_data {
struct hid_device *hdev;
struct device *hwmon_dev;
struct dentry *debugfs;
struct mutex mutex; /* Used for locking access when reading and writing PWM values */
enum kinds kind;
const char *name;
int status_report_id; /* Used for legacy devices, report is stored in buffer */
int ctrl_report_id;
int secondary_ctrl_report_id;
int secondary_ctrl_report_size;
u8 *secondary_ctrl_report;
ktime_t last_ctrl_report_op;
int ctrl_report_delay; /* Delay between two ctrl report operations, in ms */
int buffer_size;
u8 *buffer;
int checksum_start;
int checksum_length;
int checksum_offset;
int num_fans;
u16 *fan_sensor_offsets;
u16 *fan_ctrl_offsets;
int num_temp_sensors;
int temp_sensor_start_offset;
int num_virtual_temp_sensors;
int virtual_temp_sensor_start_offset;
int num_calc_virt_temp_sensors;
int calc_virt_temp_sensor_start_offset;
u16 temp_ctrl_offset;
u16 power_cycle_count_offset;
int num_flow_sensors;
u8 flow_sensors_start_offset;
u8 flow_pulses_ctrl_offset;
struct aqc_fan_structure_offsets *fan_structure;
/* General info, same across all devices */
u8 serial_number_start_offset;
u32 serial_number[2];
u8 firmware_version_offset;
u16 firmware_version;
/* How many times the device was powered on, if available */
u32 power_cycles;
/* Sensor values */
s32 temp_input[20]; /* Max 4 physical and 16 virtual or 8 physical and 12 virtual */
s32 speed_input[8];
u32 speed_input_min[1];
u32 speed_input_target[1];
u32 speed_input_max[1];
u32 power_input[8];
u16 voltage_input[8];
u16 current_input[8];
/* Label values */
const char *const *temp_label;
const char *const *virtual_temp_label;
const char *const *calc_virt_temp_label; /* For Aquaero */
const char *const *speed_label;
const char *const *power_label;
const char *const *voltage_label;
const char *const *current_label;
unsigned long updated;
};
/* Converts from centi-percent */
static int aqc_percent_to_pwm(u16 val)
{
return DIV_ROUND_CLOSEST(val * 255, 100 * 100);
}
/* Converts to centi-percent */
static int aqc_pwm_to_percent(long val)
{
if (val < 0 || val > 255)
return -EINVAL;
return DIV_ROUND_CLOSEST(val * 100 * 100, 255);
}
/* Converts raw value for Aquastream XT pump speed to RPM */
static int aqc_aquastreamxt_convert_pump_rpm(u16 val)
{
if (val > 0)
return DIV_ROUND_CLOSEST(AQUASTREAMXT_PUMP_CONVERSION_CONST, val);
return 0;
}
/* Converts raw value for Aquastream XT fan speed to RPM */
static int aqc_aquastreamxt_convert_fan_rpm(u16 val)
{
if (val > 0)
return DIV_ROUND_CLOSEST(AQUASTREAMXT_FAN_CONVERSION_CONST, val);
return 0;
}
static void aqc_delay_ctrl_report(struct aqc_data *priv)
{
/*
* If previous read or write is too close to this one, delay the current operation
* to give the device enough time to process the previous one.
*/
if (priv->ctrl_report_delay) {
s64 delta = ktime_ms_delta(ktime_get(), priv->last_ctrl_report_op);
if (delta < priv->ctrl_report_delay)
msleep(priv->ctrl_report_delay - delta);
}
}
/* Expects the mutex to be locked */
static int aqc_get_ctrl_data(struct aqc_data *priv)
{
int ret;
aqc_delay_ctrl_report(priv);
memset(priv->buffer, 0x00, priv->buffer_size);
ret = hid_hw_raw_request(priv->hdev, priv->ctrl_report_id, priv->buffer, priv->buffer_size,
HID_FEATURE_REPORT, HID_REQ_GET_REPORT);
if (ret < 0)
ret = -ENODATA;
priv->last_ctrl_report_op = ktime_get();
return ret;
}
/* Expects the mutex to be locked */
static int aqc_send_ctrl_data(struct aqc_data *priv)
{
int ret;
u16 checksum;
aqc_delay_ctrl_report(priv);
/* Checksum is not needed for Aquaero */
if (priv->kind != aquaero) {
/* Init and xorout value for CRC-16/USB is 0xffff */
checksum = crc16(0xffff, priv->buffer + priv->checksum_start,
priv->checksum_length);
checksum ^= 0xffff;
/* Place the new checksum at the end of the report */
put_unaligned_be16(checksum, priv->buffer + priv->checksum_offset);
}
/* Send the patched up report back to the device */
ret = hid_hw_raw_request(priv->hdev, priv->ctrl_report_id, priv->buffer, priv->buffer_size,
HID_FEATURE_REPORT, HID_REQ_SET_REPORT);
if (ret < 0)
goto record_access_and_ret;
/* The official software sends this report after every change, so do it here as well */
ret = hid_hw_raw_request(priv->hdev, priv->secondary_ctrl_report_id,
priv->secondary_ctrl_report, priv->secondary_ctrl_report_size,
HID_FEATURE_REPORT, HID_REQ_SET_REPORT);
record_access_and_ret:
priv->last_ctrl_report_op = ktime_get();
return ret;
}
/* Refreshes the control buffer and stores value at offset in val */
static int aqc_get_ctrl_val(struct aqc_data *priv, int offset, long *val, int type)
{
int ret;
mutex_lock(&priv->mutex);
ret = aqc_get_ctrl_data(priv);
if (ret < 0)
goto unlock_and_return;
switch (type) {
case AQC_BE16:
*val = (s16)get_unaligned_be16(priv->buffer + offset);
break;
case AQC_8:
*val = priv->buffer[offset];
break;
default:
ret = -EINVAL;
}
unlock_and_return:
mutex_unlock(&priv->mutex);
return ret;
}
static int aqc_set_ctrl_vals(struct aqc_data *priv, int *offsets, long *vals, int *types, int len)
{
int ret, i;
mutex_lock(&priv->mutex);
ret = aqc_get_ctrl_data(priv);
if (ret < 0)
goto unlock_and_return;
for (i = 0; i < len; i++) {
switch (types[i]) {
case AQC_BE16:
put_unaligned_be16((s16)vals[i], priv->buffer + offsets[i]);
break;
case AQC_8:
priv->buffer[offsets[i]] = (u8)vals[i];
break;
default:
ret = -EINVAL;
}
}
if (ret < 0)
goto unlock_and_return;
ret = aqc_send_ctrl_data(priv);
unlock_and_return:
mutex_unlock(&priv->mutex);
return ret;
}
static int aqc_set_ctrl_val(struct aqc_data *priv, int offset, long val, int type)
{
return aqc_set_ctrl_vals(priv, &offset, &val, &type, 1);
}
static umode_t aqc_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel)
{
const struct aqc_data *priv = data;
switch (type) {
case hwmon_temp:
if (channel < priv->num_temp_sensors) {
switch (attr) {
case hwmon_temp_label:
case hwmon_temp_input:
return 0444;
case hwmon_temp_offset:
if (priv->temp_ctrl_offset != 0)
return 0644;
break;
default:
break;
}
}
if (channel <
priv->num_temp_sensors + priv->num_virtual_temp_sensors +
priv->num_calc_virt_temp_sensors)
switch (attr) {
case hwmon_temp_label:
case hwmon_temp_input:
return 0444;
default:
break;
}
break;
case hwmon_pwm:
if (priv->fan_ctrl_offsets && channel < priv->num_fans) {
switch (attr) {
case hwmon_pwm_input:
return 0644;
default:
break;
}
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_label:
switch (priv->kind) {
case aquastreamult:
/*
* Special case to support pump RPM, fan RPM,
* pressure and flow sensor
*/
if (channel < 4)
return 0444;
break;
case highflownext:
/* Special case to support flow sensor, water quality
* and conductivity
*/
if (channel < 3)
return 0444;
break;
case leakshield:
/* Special case for Leakshield sensors */
if (channel < 5)
return 0444;
break;
case aquaero:
case quadro:
/* Special case to support flow sensors */
if (channel < priv->num_fans + priv->num_flow_sensors)
return 0444;
break;
default:
if (channel < priv->num_fans)
return 0444;
break;
}
break;
case hwmon_fan_pulses:
/* Special case for Quadro flow sensor */
if (priv->kind == quadro && channel == priv->num_fans)
return 0644;
break;
case hwmon_fan_min:
case hwmon_fan_max:
case hwmon_fan_target:
/* Special case for Leakshield pressure sensor */
if (priv->kind == leakshield && channel == 0)
return 0444;
break;
default:
break;
}
break;
case hwmon_power:
switch (priv->kind) {
case aquastreamult:
/* Special case to support pump and fan power */
if (channel < 2)
return 0444;
break;
case highflownext:
/* Special case to support one power sensor */
if (channel == 0)
return 0444;
break;
case aquastreamxt:
break;
default:
if (channel < priv->num_fans)
return 0444;
break;
}
break;
case hwmon_curr:
switch (priv->kind) {
case aquastreamult:
/* Special case to support pump and fan current */
if (channel < 2)
return 0444;
break;
case aquastreamxt:
/* Special case to support pump current */
if (channel == 0)
return 0444;
break;
default:
if (channel < priv->num_fans)
return 0444;
break;
}
break;
case hwmon_in:
switch (priv->kind) {
case d5next:
/* Special case to support +5V and +12V voltage sensors */
if (channel < priv->num_fans + 2)
return 0444;
break;
case aquastreamult:
case highflownext:
/* Special case to support two voltage sensors */
if (channel < 2)
return 0444;
break;
default:
if (channel < priv->num_fans)
return 0444;
break;
}
break;
default:
break;
}
return 0;
}
/* Read device sensors by manually requesting the sensor report (legacy way) */
static int aqc_legacy_read(struct aqc_data *priv)
{
int ret, i, sensor_value;
mutex_lock(&priv->mutex);
memset(priv->buffer, 0x00, priv->buffer_size);
ret = hid_hw_raw_request(priv->hdev, priv->status_report_id, priv->buffer,
priv->buffer_size, HID_FEATURE_REPORT, HID_REQ_GET_REPORT);
if (ret < 0)
goto unlock_and_return;
/* Temperature sensor readings */
for (i = 0; i < priv->num_temp_sensors; i++) {
sensor_value = get_unaligned_le16(priv->buffer + priv->temp_sensor_start_offset +
i * AQC_SENSOR_SIZE);
priv->temp_input[i] = sensor_value * 10;
}
/* Special-case sensor readings */
switch (priv->kind) {
case aquastreamxt:
/* Info provided with every report */
priv->serial_number[0] = get_unaligned_le16(priv->buffer +
priv->serial_number_start_offset);
priv->firmware_version =
get_unaligned_le16(priv->buffer + priv->firmware_version_offset);
/* Read pump speed in RPM */
sensor_value = get_unaligned_le16(priv->buffer + priv->fan_sensor_offsets[0]);
priv->speed_input[0] = aqc_aquastreamxt_convert_pump_rpm(sensor_value);
/* Read fan speed in RPM, if available */
sensor_value = get_unaligned_le16(priv->buffer + AQUASTREAMXT_FAN_STATUS_OFFSET);
if (sensor_value == AQUASTREAMXT_FAN_STOPPED) {
priv->speed_input[1] = 0;
} else {
sensor_value =
get_unaligned_le16(priv->buffer + priv->fan_sensor_offsets[1]);
priv->speed_input[1] = aqc_aquastreamxt_convert_fan_rpm(sensor_value);
}
/* Calculation derived from linear regression */
sensor_value = get_unaligned_le16(priv->buffer + AQUASTREAMXT_PUMP_CURR_OFFSET);
priv->current_input[0] = DIV_ROUND_CLOSEST(sensor_value * 176, 100) - 52;
sensor_value = get_unaligned_le16(priv->buffer + AQUASTREAMXT_PUMP_VOLTAGE_OFFSET);
priv->voltage_input[0] = DIV_ROUND_CLOSEST(sensor_value * 1000, 61);
sensor_value = get_unaligned_le16(priv->buffer + AQUASTREAMXT_FAN_VOLTAGE_OFFSET);
priv->voltage_input[1] = DIV_ROUND_CLOSEST(sensor_value * 1000, 63);
break;
default:
break;
}
priv->updated = jiffies;
unlock_and_return:
mutex_unlock(&priv->mutex);
return ret;
}
static int aqc_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
int ret;
struct aqc_data *priv = dev_get_drvdata(dev);
if (time_after(jiffies, priv->updated + STATUS_UPDATE_INTERVAL)) {
if (priv->status_report_id != 0) {
/* Legacy devices require manual reads */
ret = aqc_legacy_read(priv);
if (ret < 0)
return -ENODATA;
} else {
return -ENODATA;
}
}
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
if (priv->temp_input[channel] == -ENODATA)
return -ENODATA;
*val = priv->temp_input[channel];
break;
case hwmon_temp_offset:
ret =
aqc_get_ctrl_val(priv, priv->temp_ctrl_offset +
channel * AQC_SENSOR_SIZE, val, AQC_BE16);
if (ret < 0)
return ret;
*val *= 10;
break;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
if (priv->speed_input[channel] == -ENODATA)
return -ENODATA;
*val = priv->speed_input[channel];
break;
case hwmon_fan_min:
*val = priv->speed_input_min[channel];
break;
case hwmon_fan_max:
*val = priv->speed_input_max[channel];
break;
case hwmon_fan_target:
*val = priv->speed_input_target[channel];
break;
case hwmon_fan_pulses:
ret = aqc_get_ctrl_val(priv, priv->flow_pulses_ctrl_offset,
val, AQC_BE16);
if (ret < 0)
return ret;
break;
default:
break;
}
break;
case hwmon_power:
*val = priv->power_input[channel];
break;
case hwmon_pwm:
switch (priv->kind) {
case aquaero:
ret = aqc_get_ctrl_val(priv,
AQUAERO_CTRL_PRESET_START + channel * AQUAERO_CTRL_PRESET_SIZE,
val, AQC_BE16);
if (ret < 0)
return ret;
*val = aqc_percent_to_pwm(*val);
break;
default:
ret = aqc_get_ctrl_val(priv, priv->fan_ctrl_offsets[channel],
val, AQC_BE16);
if (ret < 0)
return ret;
*val = aqc_percent_to_pwm(*val);
break;
}
break;
case hwmon_in:
*val = priv->voltage_input[channel];
break;
case hwmon_curr:
*val = priv->current_input[channel];
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int aqc_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, const char **str)
{
struct aqc_data *priv = dev_get_drvdata(dev);
/* Number of sensors that are not calculated */
int num_non_calc_sensors = priv->num_temp_sensors + priv->num_virtual_temp_sensors;
switch (type) {
case hwmon_temp:
if (channel < priv->num_temp_sensors) {
*str = priv->temp_label[channel];
} else {
if (priv->kind == aquaero && channel >= num_non_calc_sensors)
*str =
priv->calc_virt_temp_label[channel - num_non_calc_sensors];
else
*str = priv->virtual_temp_label[channel - priv->num_temp_sensors];
}
break;
case hwmon_fan:
*str = priv->speed_label[channel];
break;
case hwmon_power:
*str = priv->power_label[channel];
break;
case hwmon_in:
*str = priv->voltage_label[channel];
break;
case hwmon_curr:
*str = priv->current_label[channel];
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int aqc_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long val)
{
int ret, pwm_value;
/* Arrays for setting multiple values at once in the control report */
int ctrl_values_offsets[4];
long ctrl_values[4];
int ctrl_values_types[4];
struct aqc_data *priv = dev_get_drvdata(dev);
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_offset:
/* Limit temp offset to +/- 15K as in the official software */
val = clamp_val(val, -15000, 15000) / 10;
ret =
aqc_set_ctrl_val(priv, priv->temp_ctrl_offset +
channel * AQC_SENSOR_SIZE, val, AQC_BE16);
if (ret < 0)
return ret;
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_pulses:
val = clamp_val(val, 10, 1000);
ret = aqc_set_ctrl_val(priv, priv->flow_pulses_ctrl_offset,
val, AQC_BE16);
if (ret < 0)
return ret;
break;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
pwm_value = aqc_pwm_to_percent(val);
if (pwm_value < 0)
return pwm_value;
switch (priv->kind) {
case aquaero:
/* Write pwm value to preset corresponding to the channel */
ctrl_values_offsets[0] = AQUAERO_CTRL_PRESET_START +
channel * AQUAERO_CTRL_PRESET_SIZE;
ctrl_values[0] = pwm_value;
ctrl_values_types[0] = AQC_BE16;
/* Write preset number in fan control source */
ctrl_values_offsets[1] = priv->fan_ctrl_offsets[channel] +
AQUAERO_FAN_CTRL_SRC_OFFSET;
ctrl_values[1] = AQUAERO_CTRL_PRESET_ID + channel;
ctrl_values_types[1] = AQC_BE16;
/* Set minimum power to 0 to allow the fan to turn off */
ctrl_values_offsets[2] = priv->fan_ctrl_offsets[channel] +
AQUAERO_FAN_CTRL_MIN_PWR_OFFSET;
ctrl_values[2] = 0;
ctrl_values_types[2] = AQC_BE16;
/* Set maximum power to 255 to allow the fan to reach max speed */
ctrl_values_offsets[3] = priv->fan_ctrl_offsets[channel] +
AQUAERO_FAN_CTRL_MAX_PWR_OFFSET;
ctrl_values[3] = aqc_pwm_to_percent(255);
ctrl_values_types[3] = AQC_BE16;
ret = aqc_set_ctrl_vals(priv, ctrl_values_offsets, ctrl_values,
ctrl_values_types, 4);
if (ret < 0)
return ret;
break;
default:
ret = aqc_set_ctrl_val(priv, priv->fan_ctrl_offsets[channel],
pwm_value, AQC_BE16);
if (ret < 0)
return ret;
break;
}
break;
default:
break;
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static const struct hwmon_ops aqc_hwmon_ops = {
.is_visible = aqc_is_visible,
.read = aqc_read,
.read_string = aqc_read_string,
.write = aqc_write
};
static const struct hwmon_channel_info * const aqc_info[] = {
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL),
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_LABEL | HWMON_F_MIN | HWMON_F_MAX |
HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_LABEL | HWMON_F_PULSES,
HWMON_F_INPUT | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_LABEL),
HWMON_CHANNEL_INFO(power,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL,
HWMON_P_INPUT | HWMON_P_LABEL),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL,
HWMON_C_INPUT | HWMON_C_LABEL),
NULL
};
static const struct hwmon_chip_info aqc_chip_info = {
.ops = &aqc_hwmon_ops,
.info = aqc_info,
};
static int aqc_raw_event(struct hid_device *hdev, struct hid_report *report, u8 *data, int size)
{
int i, j, sensor_value;
struct aqc_data *priv;
if (report->id != STATUS_REPORT_ID)
return 0;
priv = hid_get_drvdata(hdev);
/* Info provided with every report */
priv->serial_number[0] = get_unaligned_be16(data + priv->serial_number_start_offset);
priv->serial_number[1] = get_unaligned_be16(data + priv->serial_number_start_offset +
SERIAL_PART_OFFSET);
priv->firmware_version = get_unaligned_be16(data + priv->firmware_version_offset);
/* Physical temperature sensor readings */
for (i = 0; i < priv->num_temp_sensors; i++) {
sensor_value = get_unaligned_be16(data +
priv->temp_sensor_start_offset +
i * AQC_SENSOR_SIZE);
if (sensor_value == AQC_SENSOR_NA)
priv->temp_input[i] = -ENODATA;
else
priv->temp_input[i] = sensor_value * 10;
}
/* Virtual temperature sensor readings */
for (j = 0; j < priv->num_virtual_temp_sensors; j++) {
sensor_value = get_unaligned_be16(data +
priv->virtual_temp_sensor_start_offset +
j * AQC_SENSOR_SIZE);
if (sensor_value == AQC_SENSOR_NA)
priv->temp_input[i] = -ENODATA;
else
priv->temp_input[i] = sensor_value * 10;
i++;
}
/* Fan speed and related readings */
for (i = 0; i < priv->num_fans; i++) {
priv->speed_input[i] =
get_unaligned_be16(data + priv->fan_sensor_offsets[i] +
priv->fan_structure->speed);
priv->power_input[i] =
get_unaligned_be16(data + priv->fan_sensor_offsets[i] +
priv->fan_structure->power) * 10000;
priv->voltage_input[i] =
get_unaligned_be16(data + priv->fan_sensor_offsets[i] +
priv->fan_structure->voltage) * 10;
priv->current_input[i] =
get_unaligned_be16(data + priv->fan_sensor_offsets[i] +
priv->fan_structure->curr);
}
/* Flow sensor readings */
for (j = 0; j < priv->num_flow_sensors; j++) {
priv->speed_input[i] = get_unaligned_be16(data + priv->flow_sensors_start_offset +
j * AQC_SENSOR_SIZE);
i++;
}
if (priv->power_cycle_count_offset != 0)
priv->power_cycles = get_unaligned_be32(data + priv->power_cycle_count_offset);
/* Special-case sensor readings */
switch (priv->kind) {
case aquaero:
/* Read calculated virtual temp sensors */
i = priv->num_temp_sensors + priv->num_virtual_temp_sensors;
for (j = 0; j < priv->num_calc_virt_temp_sensors; j++) {
sensor_value = get_unaligned_be16(data +
priv->calc_virt_temp_sensor_start_offset +
j * AQC_SENSOR_SIZE);
if (sensor_value == AQC_SENSOR_NA)
priv->temp_input[i] = -ENODATA;
else
priv->temp_input[i] = sensor_value * 10;
i++;
}
break;
case aquastreamult:
priv->speed_input[1] = get_unaligned_be16(data + AQUASTREAMULT_PUMP_OFFSET);
priv->speed_input[2] = get_unaligned_be16(data + AQUASTREAMULT_PRESSURE_OFFSET);
priv->speed_input[3] = get_unaligned_be16(data + AQUASTREAMULT_FLOW_SENSOR_OFFSET);
priv->power_input[1] = get_unaligned_be16(data + AQUASTREAMULT_PUMP_POWER) * 10000;
priv->voltage_input[1] = get_unaligned_be16(data + AQUASTREAMULT_PUMP_VOLTAGE) * 10;
priv->current_input[1] = get_unaligned_be16(data + AQUASTREAMULT_PUMP_CURRENT);
break;
case d5next:
priv->voltage_input[2] = get_unaligned_be16(data + D5NEXT_5V_VOLTAGE) * 10;
priv->voltage_input[3] = get_unaligned_be16(data + D5NEXT_12V_VOLTAGE) * 10;
break;
case highflownext:
/* If external temp sensor is not connected, its power reading is also N/A */
if (priv->temp_input[1] == -ENODATA)
priv->power_input[0] = -ENODATA;
else
priv->power_input[0] =
get_unaligned_be16(data + HIGHFLOWNEXT_POWER) * 1000000;
priv->voltage_input[0] = get_unaligned_be16(data + HIGHFLOWNEXT_5V_VOLTAGE) * 10;
priv->voltage_input[1] =
get_unaligned_be16(data + HIGHFLOWNEXT_5V_VOLTAGE_USB) * 10;
priv->speed_input[1] = get_unaligned_be16(data + HIGHFLOWNEXT_WATER_QUALITY);
priv->speed_input[2] = get_unaligned_be16(data + HIGHFLOWNEXT_CONDUCTIVITY);
break;
case leakshield:
priv->speed_input[0] =
((s16)get_unaligned_be16(data + LEAKSHIELD_PRESSURE_ADJUSTED)) * 100;
priv->speed_input_min[0] = get_unaligned_be16(data + LEAKSHIELD_PRESSURE_MIN) * 100;
priv->speed_input_target[0] =
get_unaligned_be16(data + LEAKSHIELD_PRESSURE_TARGET) * 100;
priv->speed_input_max[0] = get_unaligned_be16(data + LEAKSHIELD_PRESSURE_MAX) * 100;
priv->speed_input[1] = get_unaligned_be16(data + LEAKSHIELD_PUMP_RPM_IN);
if (priv->speed_input[1] == AQC_SENSOR_NA)
priv->speed_input[1] = -ENODATA;
priv->speed_input[2] = get_unaligned_be16(data + LEAKSHIELD_FLOW_IN);
if (priv->speed_input[2] == AQC_SENSOR_NA)
priv->speed_input[2] = -ENODATA;
priv->speed_input[3] = get_unaligned_be16(data + LEAKSHIELD_RESERVOIR_VOLUME);
priv->speed_input[4] = get_unaligned_be16(data + LEAKSHIELD_RESERVOIR_FILLED);
/* Second temp sensor is not positioned after the first one, read it here */
priv->temp_input[1] = get_unaligned_be16(data + LEAKSHIELD_TEMPERATURE_2) * 10;
break;
default:
break;
}
priv->updated = jiffies;
return 0;
}
#ifdef CONFIG_DEBUG_FS
static int serial_number_show(struct seq_file *seqf, void *unused)
{
struct aqc_data *priv = seqf->private;
seq_printf(seqf, "%05u-%05u\n", priv->serial_number[0], priv->serial_number[1]);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(serial_number);
static int firmware_version_show(struct seq_file *seqf, void *unused)
{
struct aqc_data *priv = seqf->private;
seq_printf(seqf, "%u\n", priv->firmware_version);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(firmware_version);
static int power_cycles_show(struct seq_file *seqf, void *unused)
{
struct aqc_data *priv = seqf->private;
seq_printf(seqf, "%u\n", priv->power_cycles);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(power_cycles);
static void aqc_debugfs_init(struct aqc_data *priv)
{
char name[64];
scnprintf(name, sizeof(name), "%s_%s-%s", "aquacomputer", priv->name,
dev_name(&priv->hdev->dev));
priv->debugfs = debugfs_create_dir(name, NULL);
if (priv->serial_number_start_offset != 0)
debugfs_create_file("serial_number", 0444, priv->debugfs, priv,
&serial_number_fops);
if (priv->firmware_version_offset != 0)
debugfs_create_file("firmware_version", 0444, priv->debugfs, priv,
&firmware_version_fops);
if (priv->power_cycle_count_offset != 0)
debugfs_create_file("power_cycles", 0444, priv->debugfs, priv, &power_cycles_fops);
}
#else
static void aqc_debugfs_init(struct aqc_data *priv)
{
}
#endif
static int aqc_probe(struct hid_device *hdev, const struct hid_device_id *id)
{
struct aqc_data *priv;
int ret;
priv = devm_kzalloc(&hdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->hdev = hdev;
hid_set_drvdata(hdev, priv);
priv->updated = jiffies - STATUS_UPDATE_INTERVAL;
ret = hid_parse(hdev);
if (ret)
return ret;
ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
if (ret)
return ret;
ret = hid_hw_open(hdev);
if (ret)
goto fail_and_stop;
switch (hdev->product) {
case USB_PRODUCT_ID_AQUAERO:
/*
* Aquaero presents itself as three HID devices under the same product ID:
* "aquaero keyboard/mouse", "aquaero System Control" and "aquaero Device",
* which is the one we want to communicate with. Unlike most other Aquacomputer
* devices, Aquaero does not return meaningful data when explicitly requested
* using GET_FEATURE_REPORT.
*
* The difference between "aquaero Device" and the other two is in the collections
* they present. The two other devices have the type of the second element in
* their respective collections set to 1, while the real device has it set to 0.
*/
if (hdev->collection[1].type != 0) {
ret = -ENODEV;
goto fail_and_close;
}
priv->kind = aquaero;
priv->num_fans = AQUAERO_NUM_FANS;
priv->fan_sensor_offsets = aquaero_sensor_fan_offsets;
priv->fan_ctrl_offsets = aquaero_ctrl_fan_offsets;
priv->num_temp_sensors = AQUAERO_NUM_SENSORS;
priv->temp_sensor_start_offset = AQUAERO_SENSOR_START;
priv->num_virtual_temp_sensors = AQUAERO_NUM_VIRTUAL_SENSORS;
priv->virtual_temp_sensor_start_offset = AQUAERO_VIRTUAL_SENSOR_START;
priv->num_calc_virt_temp_sensors = AQUAERO_NUM_CALC_VIRTUAL_SENSORS;
priv->calc_virt_temp_sensor_start_offset = AQUAERO_CALC_VIRTUAL_SENSOR_START;
priv->num_flow_sensors = AQUAERO_NUM_FLOW_SENSORS;
priv->flow_sensors_start_offset = AQUAERO_FLOW_SENSORS_START;
priv->buffer_size = AQUAERO_CTRL_REPORT_SIZE;
priv->temp_ctrl_offset = AQUAERO_TEMP_CTRL_OFFSET;
priv->ctrl_report_delay = CTRL_REPORT_DELAY;
priv->temp_label = label_temp_sensors;
priv->virtual_temp_label = label_virtual_temp_sensors;
priv->calc_virt_temp_label = label_aquaero_calc_temp_sensors;
priv->speed_label = label_aquaero_speeds;
priv->power_label = label_fan_power;
priv->voltage_label = label_fan_voltage;
priv->current_label = label_fan_current;
break;
case USB_PRODUCT_ID_D5NEXT:
priv->kind = d5next;
priv->num_fans = D5NEXT_NUM_FANS;
priv->fan_sensor_offsets = d5next_sensor_fan_offsets;
priv->fan_ctrl_offsets = d5next_ctrl_fan_offsets;
priv->num_temp_sensors = D5NEXT_NUM_SENSORS;
priv->temp_sensor_start_offset = D5NEXT_COOLANT_TEMP;
priv->num_virtual_temp_sensors = D5NEXT_NUM_VIRTUAL_SENSORS;
priv->virtual_temp_sensor_start_offset = D5NEXT_VIRTUAL_SENSORS_START;
priv->temp_ctrl_offset = D5NEXT_TEMP_CTRL_OFFSET;
priv->buffer_size = D5NEXT_CTRL_REPORT_SIZE;
priv->ctrl_report_delay = CTRL_REPORT_DELAY;
priv->power_cycle_count_offset = D5NEXT_POWER_CYCLES;
priv->temp_label = label_d5next_temp;
priv->virtual_temp_label = label_virtual_temp_sensors;
priv->speed_label = label_d5next_speeds;
priv->power_label = label_d5next_power;
priv->voltage_label = label_d5next_voltages;
priv->current_label = label_d5next_current;
break;
case USB_PRODUCT_ID_FARBWERK:
priv->kind = farbwerk;
priv->num_fans = 0;
priv->num_temp_sensors = FARBWERK_NUM_SENSORS;
priv->temp_sensor_start_offset = FARBWERK_SENSOR_START;
priv->temp_label = label_temp_sensors;
break;
case USB_PRODUCT_ID_FARBWERK360:
priv->kind = farbwerk360;
priv->num_fans = 0;
priv->num_temp_sensors = FARBWERK360_NUM_SENSORS;
priv->temp_sensor_start_offset = FARBWERK360_SENSOR_START;
priv->num_virtual_temp_sensors = FARBWERK360_NUM_VIRTUAL_SENSORS;
priv->virtual_temp_sensor_start_offset = FARBWERK360_VIRTUAL_SENSORS_START;
priv->temp_ctrl_offset = FARBWERK360_TEMP_CTRL_OFFSET;
priv->buffer_size = FARBWERK360_CTRL_REPORT_SIZE;
priv->temp_label = label_temp_sensors;
priv->virtual_temp_label = label_virtual_temp_sensors;
break;
case USB_PRODUCT_ID_OCTO:
priv->kind = octo;
priv->num_fans = OCTO_NUM_FANS;
priv->fan_sensor_offsets = octo_sensor_fan_offsets;
priv->fan_ctrl_offsets = octo_ctrl_fan_offsets;
priv->num_temp_sensors = OCTO_NUM_SENSORS;
priv->temp_sensor_start_offset = OCTO_SENSOR_START;
priv->num_virtual_temp_sensors = OCTO_NUM_VIRTUAL_SENSORS;
priv->virtual_temp_sensor_start_offset = OCTO_VIRTUAL_SENSORS_START;
priv->temp_ctrl_offset = OCTO_TEMP_CTRL_OFFSET;
priv->buffer_size = OCTO_CTRL_REPORT_SIZE;
priv->ctrl_report_delay = CTRL_REPORT_DELAY;
priv->power_cycle_count_offset = OCTO_POWER_CYCLES;
priv->temp_label = label_temp_sensors;
priv->virtual_temp_label = label_virtual_temp_sensors;
priv->speed_label = label_fan_speed;
priv->power_label = label_fan_power;
priv->voltage_label = label_fan_voltage;
priv->current_label = label_fan_current;
break;
case USB_PRODUCT_ID_QUADRO:
priv->kind = quadro;
priv->num_fans = QUADRO_NUM_FANS;
priv->fan_sensor_offsets = quadro_sensor_fan_offsets;
priv->fan_ctrl_offsets = quadro_ctrl_fan_offsets;
priv->num_temp_sensors = QUADRO_NUM_SENSORS;
priv->temp_sensor_start_offset = QUADRO_SENSOR_START;
priv->num_virtual_temp_sensors = QUADRO_NUM_VIRTUAL_SENSORS;
priv->virtual_temp_sensor_start_offset = QUADRO_VIRTUAL_SENSORS_START;
priv->num_flow_sensors = QUADRO_NUM_FLOW_SENSORS;
priv->flow_sensors_start_offset = QUADRO_FLOW_SENSOR_OFFSET;
priv->temp_ctrl_offset = QUADRO_TEMP_CTRL_OFFSET;
priv->buffer_size = QUADRO_CTRL_REPORT_SIZE;
priv->ctrl_report_delay = CTRL_REPORT_DELAY;
priv->flow_pulses_ctrl_offset = QUADRO_FLOW_PULSES_CTRL_OFFSET;
priv->power_cycle_count_offset = QUADRO_POWER_CYCLES;
priv->temp_label = label_temp_sensors;
priv->virtual_temp_label = label_virtual_temp_sensors;
priv->speed_label = label_quadro_speeds;
priv->power_label = label_fan_power;
priv->voltage_label = label_fan_voltage;
priv->current_label = label_fan_current;
break;
case USB_PRODUCT_ID_HIGHFLOWNEXT:
priv->kind = highflownext;
priv->num_fans = 0;
priv->num_temp_sensors = HIGHFLOWNEXT_NUM_SENSORS;
priv->temp_sensor_start_offset = HIGHFLOWNEXT_SENSOR_START;
priv->num_flow_sensors = HIGHFLOWNEXT_NUM_FLOW_SENSORS;
priv->flow_sensors_start_offset = HIGHFLOWNEXT_FLOW;
priv->power_cycle_count_offset = QUADRO_POWER_CYCLES;
priv->temp_label = label_highflownext_temp_sensors;
priv->speed_label = label_highflownext_fan_speed;
priv->power_label = label_highflownext_power;
priv->voltage_label = label_highflownext_voltage;
break;
case USB_PRODUCT_ID_LEAKSHIELD:
/*
* Choose the right Leakshield device, because
* the other one acts as a keyboard
*/
if (hdev->type != 2) {
ret = -ENODEV;
goto fail_and_close;
}
priv->kind = leakshield;
priv->num_fans = 0;
priv->num_temp_sensors = LEAKSHIELD_NUM_SENSORS;
priv->temp_sensor_start_offset = LEAKSHIELD_TEMPERATURE_1;
priv->temp_label = label_leakshield_temp_sensors;
priv->speed_label = label_leakshield_fan_speed;
break;
case USB_PRODUCT_ID_AQUASTREAMXT:
priv->kind = aquastreamxt;
priv->num_fans = AQUASTREAMXT_NUM_FANS;
priv->fan_sensor_offsets = aquastreamxt_sensor_fan_offsets;
priv->num_temp_sensors = AQUASTREAMXT_NUM_SENSORS;
priv->temp_sensor_start_offset = AQUASTREAMXT_SENSOR_START;
priv->buffer_size = AQUASTREAMXT_SENSOR_REPORT_SIZE;
priv->temp_label = label_aquastreamxt_temp_sensors;
priv->speed_label = label_d5next_speeds;
priv->voltage_label = label_d5next_voltages;
priv->current_label = label_d5next_current;
break;
case USB_PRODUCT_ID_AQUASTREAMULT:
priv->kind = aquastreamult;
priv->num_fans = AQUASTREAMULT_NUM_FANS;
priv->fan_sensor_offsets = aquastreamult_sensor_fan_offsets;
priv->num_temp_sensors = AQUASTREAMULT_NUM_SENSORS;
priv->temp_sensor_start_offset = AQUASTREAMULT_SENSOR_START;
priv->temp_label = label_aquastreamult_temp;
priv->speed_label = label_aquastreamult_speeds;
priv->power_label = label_aquastreamult_power;
priv->voltage_label = label_aquastreamult_voltages;
priv->current_label = label_aquastreamult_current;
break;
case USB_PRODUCT_ID_POWERADJUST3:
priv->kind = poweradjust3;
priv->num_fans = 0;
priv->num_temp_sensors = POWERADJUST3_NUM_SENSORS;
priv->temp_sensor_start_offset = POWERADJUST3_SENSOR_START;
priv->buffer_size = POWERADJUST3_SENSOR_REPORT_SIZE;
priv->temp_label = label_poweradjust3_temp_sensors;
break;
default:
break;
}
switch (priv->kind) {
case aquaero:
priv->serial_number_start_offset = AQUAERO_SERIAL_START;
priv->firmware_version_offset = AQUAERO_FIRMWARE_VERSION;
priv->fan_structure = &aqc_aquaero_fan_structure;
priv->ctrl_report_id = AQUAERO_CTRL_REPORT_ID;
priv->secondary_ctrl_report_id = AQUAERO_SECONDARY_CTRL_REPORT_ID;
priv->secondary_ctrl_report_size = AQUAERO_SECONDARY_CTRL_REPORT_SIZE;
priv->secondary_ctrl_report = aquaero_secondary_ctrl_report;
break;
case poweradjust3:
priv->status_report_id = POWERADJUST3_STATUS_REPORT_ID;
break;
case aquastreamxt:
priv->serial_number_start_offset = AQUASTREAMXT_SERIAL_START;
priv->firmware_version_offset = AQUASTREAMXT_FIRMWARE_VERSION;
priv->status_report_id = AQUASTREAMXT_STATUS_REPORT_ID;
break;
default:
priv->serial_number_start_offset = AQC_SERIAL_START;
priv->firmware_version_offset = AQC_FIRMWARE_VERSION;
priv->ctrl_report_id = CTRL_REPORT_ID;
priv->secondary_ctrl_report_id = SECONDARY_CTRL_REPORT_ID;
priv->secondary_ctrl_report_size = SECONDARY_CTRL_REPORT_SIZE;
priv->secondary_ctrl_report = secondary_ctrl_report;
if (priv->kind == aquastreamult)
priv->fan_structure = &aqc_aquastreamult_fan_structure;
else
priv->fan_structure = &aqc_general_fan_structure;
break;
}
if (priv->buffer_size != 0) {
priv->checksum_start = 0x01;
priv->checksum_length = priv->buffer_size - 3;
priv->checksum_offset = priv->buffer_size - 2;
}
priv->name = aqc_device_names[priv->kind];
priv->buffer = devm_kzalloc(&hdev->dev, priv->buffer_size, GFP_KERNEL);
if (!priv->buffer) {
ret = -ENOMEM;
goto fail_and_close;
}
mutex_init(&priv->mutex);
priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, priv->name, priv,
&aqc_chip_info, NULL);
if (IS_ERR(priv->hwmon_dev)) {
ret = PTR_ERR(priv->hwmon_dev);
goto fail_and_close;
}
aqc_debugfs_init(priv);
return 0;
fail_and_close:
hid_hw_close(hdev);
fail_and_stop:
hid_hw_stop(hdev);
return ret;
}
static void aqc_remove(struct hid_device *hdev)
{
struct aqc_data *priv = hid_get_drvdata(hdev);
debugfs_remove_recursive(priv->debugfs);
hwmon_device_unregister(priv->hwmon_dev);
hid_hw_close(hdev);
hid_hw_stop(hdev);
}
static const struct hid_device_id aqc_table[] = {
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_AQUAERO) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_D5NEXT) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_FARBWERK) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_FARBWERK360) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_OCTO) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_QUADRO) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_HIGHFLOWNEXT) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_LEAKSHIELD) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_AQUASTREAMXT) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_AQUASTREAMULT) },
{ HID_USB_DEVICE(USB_VENDOR_ID_AQUACOMPUTER, USB_PRODUCT_ID_POWERADJUST3) },
{ }
};
MODULE_DEVICE_TABLE(hid, aqc_table);
static struct hid_driver aqc_driver = {
.name = DRIVER_NAME,
.id_table = aqc_table,
.probe = aqc_probe,
.remove = aqc_remove,
.raw_event = aqc_raw_event,
};
static int __init aqc_init(void)
{
return hid_register_driver(&aqc_driver);
}
static void __exit aqc_exit(void)
{
hid_unregister_driver(&aqc_driver);
}
/* Request to initialize after the HID bus to ensure it's not being loaded before */
late_initcall(aqc_init);
module_exit(aqc_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Aleksa Savic <[email protected]>");
MODULE_AUTHOR("Jack Doan <[email protected]>");
MODULE_DESCRIPTION("Hwmon driver for Aquacomputer devices");
|
linux-master
|
drivers/hwmon/aquacomputer_d5next.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* Sensirion SHT21 humidity and temperature sensor driver
*
* Copyright (C) 2010 Urs Fleisch <[email protected]>
*
* Data sheet available at https://www.sensirion.com/file/datasheet_sht21
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/jiffies.h>
/* I2C command bytes */
#define SHT21_TRIG_T_MEASUREMENT_HM 0xe3
#define SHT21_TRIG_RH_MEASUREMENT_HM 0xe5
#define SHT21_READ_SNB_CMD1 0xFA
#define SHT21_READ_SNB_CMD2 0x0F
#define SHT21_READ_SNAC_CMD1 0xFC
#define SHT21_READ_SNAC_CMD2 0xC9
/**
* struct sht21 - SHT21 device specific data
* @client: I2C client device
* @lock: mutex to protect measurement values
* @last_update: time of last update (jiffies)
* @temperature: cached temperature measurement value
* @humidity: cached humidity measurement value
* @valid: only 0 before first measurement is taken
* @eic: cached electronic identification code text
*/
struct sht21 {
struct i2c_client *client;
struct mutex lock;
unsigned long last_update;
int temperature;
int humidity;
bool valid;
char eic[18];
};
/**
* sht21_temp_ticks_to_millicelsius() - convert raw temperature ticks to
* milli celsius
* @ticks: temperature ticks value received from sensor
*/
static inline int sht21_temp_ticks_to_millicelsius(int ticks)
{
ticks &= ~0x0003; /* clear status bits */
/*
* Formula T = -46.85 + 175.72 * ST / 2^16 from data sheet 6.2,
* optimized for integer fixed point (3 digits) arithmetic
*/
return ((21965 * ticks) >> 13) - 46850;
}
/**
* sht21_rh_ticks_to_per_cent_mille() - convert raw humidity ticks to
* one-thousandths of a percent relative humidity
* @ticks: humidity ticks value received from sensor
*/
static inline int sht21_rh_ticks_to_per_cent_mille(int ticks)
{
ticks &= ~0x0003; /* clear status bits */
/*
* Formula RH = -6 + 125 * SRH / 2^16 from data sheet 6.1,
* optimized for integer fixed point (3 digits) arithmetic
*/
return ((15625 * ticks) >> 13) - 6000;
}
/**
* sht21_update_measurements() - get updated measurements from device
* @dev: device
*
* Returns 0 on success, else negative errno.
*/
static int sht21_update_measurements(struct device *dev)
{
int ret = 0;
struct sht21 *sht21 = dev_get_drvdata(dev);
struct i2c_client *client = sht21->client;
mutex_lock(&sht21->lock);
/*
* Data sheet 2.4:
* SHT2x should not be active for more than 10% of the time - e.g.
* maximum two measurements per second at 12bit accuracy shall be made.
*/
if (time_after(jiffies, sht21->last_update + HZ / 2) || !sht21->valid) {
ret = i2c_smbus_read_word_swapped(client,
SHT21_TRIG_T_MEASUREMENT_HM);
if (ret < 0)
goto out;
sht21->temperature = sht21_temp_ticks_to_millicelsius(ret);
ret = i2c_smbus_read_word_swapped(client,
SHT21_TRIG_RH_MEASUREMENT_HM);
if (ret < 0)
goto out;
sht21->humidity = sht21_rh_ticks_to_per_cent_mille(ret);
sht21->last_update = jiffies;
sht21->valid = true;
}
out:
mutex_unlock(&sht21->lock);
return ret >= 0 ? 0 : ret;
}
/**
* sht21_temperature_show() - show temperature measurement value in sysfs
* @dev: device
* @attr: device attribute
* @buf: sysfs buffer (PAGE_SIZE) where measurement values are written to
*
* Will be called on read access to temp1_input sysfs attribute.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t sht21_temperature_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct sht21 *sht21 = dev_get_drvdata(dev);
int ret;
ret = sht21_update_measurements(dev);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", sht21->temperature);
}
/**
* sht21_humidity_show() - show humidity measurement value in sysfs
* @dev: device
* @attr: device attribute
* @buf: sysfs buffer (PAGE_SIZE) where measurement values are written to
*
* Will be called on read access to humidity1_input sysfs attribute.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t sht21_humidity_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sht21 *sht21 = dev_get_drvdata(dev);
int ret;
ret = sht21_update_measurements(dev);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", sht21->humidity);
}
static ssize_t eic_read(struct sht21 *sht21)
{
struct i2c_client *client = sht21->client;
u8 tx[2];
u8 rx[8];
u8 eic[8];
struct i2c_msg msgs[2] = {
{
.addr = client->addr,
.flags = 0,
.len = 2,
.buf = tx,
},
{
.addr = client->addr,
.flags = I2C_M_RD,
.len = 8,
.buf = rx,
},
};
int ret;
tx[0] = SHT21_READ_SNB_CMD1;
tx[1] = SHT21_READ_SNB_CMD2;
ret = i2c_transfer(client->adapter, msgs, 2);
if (ret < 0)
goto out;
eic[2] = rx[0];
eic[3] = rx[2];
eic[4] = rx[4];
eic[5] = rx[6];
tx[0] = SHT21_READ_SNAC_CMD1;
tx[1] = SHT21_READ_SNAC_CMD2;
msgs[1].len = 6;
ret = i2c_transfer(client->adapter, msgs, 2);
if (ret < 0)
goto out;
eic[0] = rx[3];
eic[1] = rx[4];
eic[6] = rx[0];
eic[7] = rx[1];
ret = snprintf(sht21->eic, sizeof(sht21->eic),
"%02x%02x%02x%02x%02x%02x%02x%02x\n",
eic[0], eic[1], eic[2], eic[3],
eic[4], eic[5], eic[6], eic[7]);
out:
if (ret < 0)
sht21->eic[0] = 0;
return ret;
}
/**
* eic_show() - show Electronic Identification Code in sysfs
* @dev: device
* @attr: device attribute
* @buf: sysfs buffer (PAGE_SIZE) where EIC is written
*
* Will be called on read access to eic sysfs attribute.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t eic_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct sht21 *sht21 = dev_get_drvdata(dev);
int ret;
ret = sizeof(sht21->eic) - 1;
mutex_lock(&sht21->lock);
if (!sht21->eic[0])
ret = eic_read(sht21);
if (ret > 0)
memcpy(buf, sht21->eic, ret);
mutex_unlock(&sht21->lock);
return ret;
}
/* sysfs attributes */
static SENSOR_DEVICE_ATTR_RO(temp1_input, sht21_temperature, 0);
static SENSOR_DEVICE_ATTR_RO(humidity1_input, sht21_humidity, 0);
static DEVICE_ATTR_RO(eic);
static struct attribute *sht21_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_humidity1_input.dev_attr.attr,
&dev_attr_eic.attr,
NULL
};
ATTRIBUTE_GROUPS(sht21);
static int sht21_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct sht21 *sht21;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WORD_DATA)) {
dev_err(&client->dev,
"adapter does not support SMBus word transactions\n");
return -ENODEV;
}
sht21 = devm_kzalloc(dev, sizeof(*sht21), GFP_KERNEL);
if (!sht21)
return -ENOMEM;
sht21->client = client;
mutex_init(&sht21->lock);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
sht21, sht21_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/* Device ID table */
static const struct i2c_device_id sht21_id[] = {
{ "sht21", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, sht21_id);
static struct i2c_driver sht21_driver = {
.driver.name = "sht21",
.probe = sht21_probe,
.id_table = sht21_id,
};
module_i2c_driver(sht21_driver);
MODULE_AUTHOR("Urs Fleisch <[email protected]>");
MODULE_DESCRIPTION("Sensirion SHT21 humidity and temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/sht21.c
|
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
//
// Copyright (c) 2018 Mellanox Technologies. All rights reserved.
// Copyright (c) 2018 Vadim Pasternak <[email protected]>
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/platform_data/mlxreg.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/thermal.h>
#define MLXREG_FAN_MAX_TACHO 24
#define MLXREG_FAN_MAX_PWM 4
#define MLXREG_FAN_PWM_NOT_CONNECTED 0xff
#define MLXREG_FAN_MAX_STATE 10
#define MLXREG_FAN_MIN_DUTY 51 /* 20% */
#define MLXREG_FAN_MAX_DUTY 255 /* 100% */
#define MLXREG_FAN_SPEED_MIN_LEVEL 2 /* 20 percent */
#define MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF 44
#define MLXREG_FAN_TACHO_DIV_MIN 283
#define MLXREG_FAN_TACHO_DIV_DEF (MLXREG_FAN_TACHO_DIV_MIN * 4)
#define MLXREG_FAN_TACHO_DIV_SCALE_MAX 64
/*
* FAN datasheet defines the formula for RPM calculations as RPM = 15/t-high.
* The logic in a programmable device measures the time t-high by sampling the
* tachometer every t-sample (with the default value 11.32 uS) and increment
* a counter (N) as long as the pulse has not change:
* RPM = 15 / (t-sample * (K + Regval)), where:
* Regval: is the value read from the programmable device register;
* - 0xff - represents tachometer fault;
* - 0xfe - represents tachometer minimum value , which is 4444 RPM;
* - 0x00 - represents tachometer maximum value , which is 300000 RPM;
* K: is 44 and it represents the minimum allowed samples per pulse;
* N: is equal K + Regval;
* In order to calculate RPM from the register value the following formula is
* used: RPM = 15 / ((Regval + K) * 11.32) * 10^(-6)), which in the
* default case is modified to:
* RPM = 15000000 * 100 / ((Regval + 44) * 1132);
* - for Regval 0x00, RPM will be 15000000 * 100 / (44 * 1132) = 30115;
* - for Regval 0xfe, RPM will be 15000000 * 100 / ((254 + 44) * 1132) = 4446;
* In common case the formula is modified to:
* RPM = 15000000 * 100 / ((Regval + samples) * divider).
*/
#define MLXREG_FAN_GET_RPM(rval, d, s) (DIV_ROUND_CLOSEST(15000000 * 100, \
((rval) + (s)) * (d)))
#define MLXREG_FAN_GET_FAULT(val, mask) ((val) == (mask))
#define MLXREG_FAN_PWM_DUTY2STATE(duty) (DIV_ROUND_CLOSEST((duty) * \
MLXREG_FAN_MAX_STATE, \
MLXREG_FAN_MAX_DUTY))
#define MLXREG_FAN_PWM_STATE2DUTY(stat) (DIV_ROUND_CLOSEST((stat) * \
MLXREG_FAN_MAX_DUTY, \
MLXREG_FAN_MAX_STATE))
struct mlxreg_fan;
/*
* struct mlxreg_fan_tacho - tachometer data (internal use):
*
* @connected: indicates if tachometer is connected;
* @reg: register offset;
* @mask: fault mask;
* @prsnt: present register offset;
*/
struct mlxreg_fan_tacho {
bool connected;
u32 reg;
u32 mask;
u32 prsnt;
};
/*
* struct mlxreg_fan_pwm - PWM data (internal use):
*
* @fan: private data;
* @connected: indicates if PWM is connected;
* @reg: register offset;
* @cooling: cooling device levels;
* @last_hwmon_state: last cooling state set by hwmon subsystem;
* @last_thermal_state: last cooling state set by thermal subsystem;
* @cdev: cooling device;
*/
struct mlxreg_fan_pwm {
struct mlxreg_fan *fan;
bool connected;
u32 reg;
unsigned long last_hwmon_state;
unsigned long last_thermal_state;
struct thermal_cooling_device *cdev;
};
/*
* struct mlxreg_fan - private data (internal use):
*
* @dev: basic device;
* @regmap: register map of parent device;
* @tacho: tachometer data;
* @pwm: PWM data;
* @tachos_per_drwr - number of tachometers per drawer;
* @samples: minimum allowed samples per pulse;
* @divider: divider value for tachometer RPM calculation;
*/
struct mlxreg_fan {
struct device *dev;
void *regmap;
struct mlxreg_core_platform_data *pdata;
struct mlxreg_fan_tacho tacho[MLXREG_FAN_MAX_TACHO];
struct mlxreg_fan_pwm pwm[MLXREG_FAN_MAX_PWM];
int tachos_per_drwr;
int samples;
int divider;
};
static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev,
unsigned long state);
static int
mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
struct mlxreg_fan *fan = dev_get_drvdata(dev);
struct mlxreg_fan_tacho *tacho;
struct mlxreg_fan_pwm *pwm;
u32 regval;
int err;
switch (type) {
case hwmon_fan:
tacho = &fan->tacho[channel];
switch (attr) {
case hwmon_fan_input:
/*
* Check FAN presence: FAN related bit in presence register is one,
* if FAN is physically connected, zero - otherwise.
*/
if (tacho->prsnt && fan->tachos_per_drwr) {
err = regmap_read(fan->regmap, tacho->prsnt, ®val);
if (err)
return err;
/*
* Map channel to presence bit - drawer can be equipped with
* one or few FANs, while presence is indicated per drawer.
*/
if (BIT(channel / fan->tachos_per_drwr) & regval) {
/* FAN is not connected - return zero for FAN speed. */
*val = 0;
return 0;
}
}
err = regmap_read(fan->regmap, tacho->reg, ®val);
if (err)
return err;
if (MLXREG_FAN_GET_FAULT(regval, tacho->mask)) {
/* FAN is broken - return zero for FAN speed. */
*val = 0;
return 0;
}
*val = MLXREG_FAN_GET_RPM(regval, fan->divider,
fan->samples);
break;
case hwmon_fan_fault:
err = regmap_read(fan->regmap, tacho->reg, ®val);
if (err)
return err;
*val = MLXREG_FAN_GET_FAULT(regval, tacho->mask);
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_pwm:
pwm = &fan->pwm[channel];
switch (attr) {
case hwmon_pwm_input:
err = regmap_read(fan->regmap, pwm->reg, ®val);
if (err)
return err;
*val = regval;
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int
mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long val)
{
struct mlxreg_fan *fan = dev_get_drvdata(dev);
struct mlxreg_fan_pwm *pwm;
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
if (val < MLXREG_FAN_MIN_DUTY ||
val > MLXREG_FAN_MAX_DUTY)
return -EINVAL;
pwm = &fan->pwm[channel];
/* If thermal is configured - handle PWM limit setting. */
if (IS_REACHABLE(CONFIG_THERMAL)) {
pwm->last_hwmon_state = MLXREG_FAN_PWM_DUTY2STATE(val);
/*
* Update PWM only in case requested state is not less than the
* last thermal state.
*/
if (pwm->last_hwmon_state >= pwm->last_thermal_state)
return mlxreg_fan_set_cur_state(pwm->cdev,
pwm->last_hwmon_state);
return 0;
}
return regmap_write(fan->regmap, pwm->reg, val);
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return -EOPNOTSUPP;
}
static umode_t
mlxreg_fan_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
int channel)
{
switch (type) {
case hwmon_fan:
if (!(((struct mlxreg_fan *)data)->tacho[channel].connected))
return 0;
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_fault:
return 0444;
default:
break;
}
break;
case hwmon_pwm:
if (!(((struct mlxreg_fan *)data)->pwm[channel].connected))
return 0;
switch (attr) {
case hwmon_pwm_input:
return 0644;
default:
break;
}
break;
default:
break;
}
return 0;
}
static char *mlxreg_fan_name[] = {
"mlxreg_fan",
"mlxreg_fan1",
"mlxreg_fan2",
"mlxreg_fan3",
};
static const struct hwmon_channel_info * const mlxreg_fan_hwmon_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT),
NULL
};
static const struct hwmon_ops mlxreg_fan_hwmon_hwmon_ops = {
.is_visible = mlxreg_fan_is_visible,
.read = mlxreg_fan_read,
.write = mlxreg_fan_write,
};
static const struct hwmon_chip_info mlxreg_fan_hwmon_chip_info = {
.ops = &mlxreg_fan_hwmon_hwmon_ops,
.info = mlxreg_fan_hwmon_info,
};
static int mlxreg_fan_get_max_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
*state = MLXREG_FAN_MAX_STATE;
return 0;
}
static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
struct mlxreg_fan_pwm *pwm = cdev->devdata;
struct mlxreg_fan *fan = pwm->fan;
u32 regval;
int err;
err = regmap_read(fan->regmap, pwm->reg, ®val);
if (err) {
dev_err(fan->dev, "Failed to query PWM duty\n");
return err;
}
*state = MLXREG_FAN_PWM_DUTY2STATE(regval);
return 0;
}
static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev,
unsigned long state)
{
struct mlxreg_fan_pwm *pwm = cdev->devdata;
struct mlxreg_fan *fan = pwm->fan;
int err;
if (state > MLXREG_FAN_MAX_STATE)
return -EINVAL;
/* Save thermal state. */
pwm->last_thermal_state = state;
state = max_t(unsigned long, state, pwm->last_hwmon_state);
err = regmap_write(fan->regmap, pwm->reg,
MLXREG_FAN_PWM_STATE2DUTY(state));
if (err) {
dev_err(fan->dev, "Failed to write PWM duty\n");
return err;
}
return 0;
}
static const struct thermal_cooling_device_ops mlxreg_fan_cooling_ops = {
.get_max_state = mlxreg_fan_get_max_state,
.get_cur_state = mlxreg_fan_get_cur_state,
.set_cur_state = mlxreg_fan_set_cur_state,
};
static int mlxreg_fan_connect_verify(struct mlxreg_fan *fan,
struct mlxreg_core_data *data)
{
u32 regval;
int err;
err = regmap_read(fan->regmap, data->capability, ®val);
if (err) {
dev_err(fan->dev, "Failed to query capability register 0x%08x\n",
data->capability);
return err;
}
return !!(regval & data->bit);
}
static int mlxreg_pwm_connect_verify(struct mlxreg_fan *fan,
struct mlxreg_core_data *data)
{
u32 regval;
int err;
err = regmap_read(fan->regmap, data->reg, ®val);
if (err) {
dev_err(fan->dev, "Failed to query pwm register 0x%08x\n",
data->reg);
return err;
}
return regval != MLXREG_FAN_PWM_NOT_CONNECTED;
}
static int mlxreg_fan_speed_divider_get(struct mlxreg_fan *fan,
struct mlxreg_core_data *data)
{
u32 regval;
int err;
err = regmap_read(fan->regmap, data->capability, ®val);
if (err) {
dev_err(fan->dev, "Failed to query capability register 0x%08x\n",
data->capability);
return err;
}
/*
* Set divider value according to the capability register, in case it
* contains valid value. Otherwise use default value. The purpose of
* this validation is to protect against the old hardware, in which
* this register can return zero.
*/
if (regval > 0 && regval <= MLXREG_FAN_TACHO_DIV_SCALE_MAX)
fan->divider = regval * MLXREG_FAN_TACHO_DIV_MIN;
return 0;
}
static int mlxreg_fan_config(struct mlxreg_fan *fan,
struct mlxreg_core_platform_data *pdata)
{
int tacho_num = 0, tacho_avail = 0, pwm_num = 0, i;
struct mlxreg_core_data *data = pdata->data;
bool configured = false;
int err;
fan->samples = MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF;
fan->divider = MLXREG_FAN_TACHO_DIV_DEF;
for (i = 0; i < pdata->counter; i++, data++) {
if (strnstr(data->label, "tacho", sizeof(data->label))) {
if (tacho_num == MLXREG_FAN_MAX_TACHO) {
dev_err(fan->dev, "too many tacho entries: %s\n",
data->label);
return -EINVAL;
}
if (data->capability) {
err = mlxreg_fan_connect_verify(fan, data);
if (err < 0)
return err;
else if (!err) {
tacho_num++;
continue;
}
}
fan->tacho[tacho_num].reg = data->reg;
fan->tacho[tacho_num].mask = data->mask;
fan->tacho[tacho_num].prsnt = data->reg_prsnt;
fan->tacho[tacho_num++].connected = true;
tacho_avail++;
} else if (strnstr(data->label, "pwm", sizeof(data->label))) {
if (pwm_num == MLXREG_FAN_MAX_TACHO) {
dev_err(fan->dev, "too many pwm entries: %s\n",
data->label);
return -EINVAL;
}
/* Validate if more then one PWM is connected. */
if (pwm_num) {
err = mlxreg_pwm_connect_verify(fan, data);
if (err < 0)
return err;
else if (!err)
continue;
}
fan->pwm[pwm_num].reg = data->reg;
fan->pwm[pwm_num].connected = true;
pwm_num++;
} else if (strnstr(data->label, "conf", sizeof(data->label))) {
if (configured) {
dev_err(fan->dev, "duplicate conf entry: %s\n",
data->label);
return -EINVAL;
}
/* Validate that conf parameters are not zeros. */
if (!data->mask && !data->bit && !data->capability) {
dev_err(fan->dev, "invalid conf entry params: %s\n",
data->label);
return -EINVAL;
}
if (data->capability) {
err = mlxreg_fan_speed_divider_get(fan, data);
if (err)
return err;
} else {
if (data->mask)
fan->samples = data->mask;
if (data->bit)
fan->divider = data->bit;
}
configured = true;
} else {
dev_err(fan->dev, "invalid label: %s\n", data->label);
return -EINVAL;
}
}
if (pdata->capability) {
int drwr_avail;
u32 regval;
/* Obtain the number of FAN drawers, supported by system. */
err = regmap_read(fan->regmap, pdata->capability, ®val);
if (err) {
dev_err(fan->dev, "Failed to query capability register 0x%08x\n",
pdata->capability);
return err;
}
drwr_avail = hweight32(regval);
if (!tacho_avail || !drwr_avail || tacho_avail < drwr_avail) {
dev_err(fan->dev, "Configuration is invalid: drawers num %d tachos num %d\n",
drwr_avail, tacho_avail);
return -EINVAL;
}
/* Set the number of tachometers per one drawer. */
fan->tachos_per_drwr = tacho_avail / drwr_avail;
}
return 0;
}
static int mlxreg_fan_cooling_config(struct device *dev, struct mlxreg_fan *fan)
{
int i;
for (i = 0; i < MLXREG_FAN_MAX_PWM; i++) {
struct mlxreg_fan_pwm *pwm = &fan->pwm[i];
if (!pwm->connected)
continue;
pwm->fan = fan;
pwm->cdev = devm_thermal_of_cooling_device_register(dev, NULL, mlxreg_fan_name[i],
pwm, &mlxreg_fan_cooling_ops);
if (IS_ERR(pwm->cdev)) {
dev_err(dev, "Failed to register cooling device\n");
return PTR_ERR(pwm->cdev);
}
/* Set minimal PWM speed. */
pwm->last_hwmon_state = MLXREG_FAN_PWM_DUTY2STATE(MLXREG_FAN_MIN_DUTY);
}
return 0;
}
static int mlxreg_fan_probe(struct platform_device *pdev)
{
struct mlxreg_core_platform_data *pdata;
struct device *dev = &pdev->dev;
struct mlxreg_fan *fan;
struct device *hwm;
int err;
pdata = dev_get_platdata(dev);
if (!pdata) {
dev_err(dev, "Failed to get platform data.\n");
return -EINVAL;
}
fan = devm_kzalloc(dev, sizeof(*fan), GFP_KERNEL);
if (!fan)
return -ENOMEM;
fan->dev = dev;
fan->regmap = pdata->regmap;
err = mlxreg_fan_config(fan, pdata);
if (err)
return err;
hwm = devm_hwmon_device_register_with_info(dev, "mlxreg_fan",
fan,
&mlxreg_fan_hwmon_chip_info,
NULL);
if (IS_ERR(hwm)) {
dev_err(dev, "Failed to register hwmon device\n");
return PTR_ERR(hwm);
}
if (IS_REACHABLE(CONFIG_THERMAL))
err = mlxreg_fan_cooling_config(dev, fan);
return err;
}
static struct platform_driver mlxreg_fan_driver = {
.driver = {
.name = "mlxreg-fan",
},
.probe = mlxreg_fan_probe,
};
module_platform_driver(mlxreg_fan_driver);
MODULE_AUTHOR("Vadim Pasternak <[email protected]>");
MODULE_DESCRIPTION("Mellanox FAN driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:mlxreg-fan");
|
linux-master
|
drivers/hwmon/mlxreg-fan.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* adt7475 - Thermal sensor driver for the ADT7475 chip and derivatives
* Copyright (C) 2007-2008, Advanced Micro Devices, Inc.
* Copyright (C) 2008 Jordan Crouse <[email protected]>
* Copyright (C) 2008 Hans de Goede <[email protected]>
* Copyright (C) 2009 Jean Delvare <[email protected]>
*
* Derived from the lm83 driver by Jean Delvare
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/jiffies.h>
#include <linux/of.h>
#include <linux/util_macros.h>
/* Indexes for the sysfs hooks */
#define INPUT 0
#define MIN 1
#define MAX 2
#define CONTROL 3
#define OFFSET 3
#define AUTOMIN 4
#define THERM 5
#define HYSTERSIS 6
/*
* These are unique identifiers for the sysfs functions - unlike the
* numbers above, these are not also indexes into an array
*/
#define ALARM 9
#define FAULT 10
/* 7475 Common Registers */
#define REG_DEVREV2 0x12 /* ADT7490 only */
#define REG_VTT 0x1E /* ADT7490 only */
#define REG_EXTEND3 0x1F /* ADT7490 only */
#define REG_VOLTAGE_BASE 0x20
#define REG_TEMP_BASE 0x25
#define REG_TACH_BASE 0x28
#define REG_PWM_BASE 0x30
#define REG_PWM_MAX_BASE 0x38
#define REG_DEVID 0x3D
#define REG_VENDID 0x3E
#define REG_DEVID2 0x3F
#define REG_CONFIG1 0x40
#define REG_STATUS1 0x41
#define REG_STATUS2 0x42
#define REG_VID 0x43 /* ADT7476 only */
#define REG_VOLTAGE_MIN_BASE 0x44
#define REG_VOLTAGE_MAX_BASE 0x45
#define REG_TEMP_MIN_BASE 0x4E
#define REG_TEMP_MAX_BASE 0x4F
#define REG_TACH_MIN_BASE 0x54
#define REG_PWM_CONFIG_BASE 0x5C
#define REG_TEMP_TRANGE_BASE 0x5F
#define REG_ENHANCE_ACOUSTICS1 0x62
#define REG_ENHANCE_ACOUSTICS2 0x63
#define REG_PWM_MIN_BASE 0x64
#define REG_TEMP_TMIN_BASE 0x67
#define REG_TEMP_THERM_BASE 0x6A
#define REG_REMOTE1_HYSTERSIS 0x6D
#define REG_REMOTE2_HYSTERSIS 0x6E
#define REG_TEMP_OFFSET_BASE 0x70
#define REG_CONFIG2 0x73
#define REG_EXTEND1 0x76
#define REG_EXTEND2 0x77
#define REG_CONFIG3 0x78
#define REG_CONFIG5 0x7C
#define REG_CONFIG4 0x7D
#define REG_STATUS4 0x81 /* ADT7490 only */
#define REG_VTT_MIN 0x84 /* ADT7490 only */
#define REG_VTT_MAX 0x86 /* ADT7490 only */
#define VID_VIDSEL 0x80 /* ADT7476 only */
#define CONFIG2_ATTN 0x20
#define CONFIG3_SMBALERT 0x01
#define CONFIG3_THERM 0x02
#define CONFIG4_PINFUNC 0x03
#define CONFIG4_THERM 0x01
#define CONFIG4_SMBALERT 0x02
#define CONFIG4_MAXDUTY 0x08
#define CONFIG4_ATTN_IN10 0x30
#define CONFIG4_ATTN_IN43 0xC0
#define CONFIG5_TWOSCOMP 0x01
#define CONFIG5_TEMPOFFSET 0x02
#define CONFIG5_VIDGPIO 0x10 /* ADT7476 only */
/* ADT7475 Settings */
#define ADT7475_VOLTAGE_COUNT 5 /* Not counting Vtt */
#define ADT7475_TEMP_COUNT 3
#define ADT7475_TACH_COUNT 4
#define ADT7475_PWM_COUNT 3
/* Macro to read the registers */
#define adt7475_read(reg) i2c_smbus_read_byte_data(client, (reg))
/* Macros to easily index the registers */
#define TACH_REG(idx) (REG_TACH_BASE + ((idx) * 2))
#define TACH_MIN_REG(idx) (REG_TACH_MIN_BASE + ((idx) * 2))
#define PWM_REG(idx) (REG_PWM_BASE + (idx))
#define PWM_MAX_REG(idx) (REG_PWM_MAX_BASE + (idx))
#define PWM_MIN_REG(idx) (REG_PWM_MIN_BASE + (idx))
#define PWM_CONFIG_REG(idx) (REG_PWM_CONFIG_BASE + (idx))
#define VOLTAGE_REG(idx) (REG_VOLTAGE_BASE + (idx))
#define VOLTAGE_MIN_REG(idx) (REG_VOLTAGE_MIN_BASE + ((idx) * 2))
#define VOLTAGE_MAX_REG(idx) (REG_VOLTAGE_MAX_BASE + ((idx) * 2))
#define TEMP_REG(idx) (REG_TEMP_BASE + (idx))
#define TEMP_MIN_REG(idx) (REG_TEMP_MIN_BASE + ((idx) * 2))
#define TEMP_MAX_REG(idx) (REG_TEMP_MAX_BASE + ((idx) * 2))
#define TEMP_TMIN_REG(idx) (REG_TEMP_TMIN_BASE + (idx))
#define TEMP_THERM_REG(idx) (REG_TEMP_THERM_BASE + (idx))
#define TEMP_OFFSET_REG(idx) (REG_TEMP_OFFSET_BASE + (idx))
#define TEMP_TRANGE_REG(idx) (REG_TEMP_TRANGE_BASE + (idx))
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
enum chips { adt7473, adt7475, adt7476, adt7490 };
static const struct i2c_device_id adt7475_id[] = {
{ "adt7473", adt7473 },
{ "adt7475", adt7475 },
{ "adt7476", adt7476 },
{ "adt7490", adt7490 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adt7475_id);
static const struct of_device_id __maybe_unused adt7475_of_match[] = {
{
.compatible = "adi,adt7473",
.data = (void *)adt7473
},
{
.compatible = "adi,adt7475",
.data = (void *)adt7475
},
{
.compatible = "adi,adt7476",
.data = (void *)adt7476
},
{
.compatible = "adi,adt7490",
.data = (void *)adt7490
},
{ },
};
MODULE_DEVICE_TABLE(of, adt7475_of_match);
struct adt7475_data {
struct i2c_client *client;
struct mutex lock;
unsigned long measure_updated;
bool valid;
u8 config2;
u8 config4;
u8 config5;
u8 has_voltage;
u8 bypass_attn; /* Bypass voltage attenuator */
u8 has_pwm2:1;
u8 has_fan4:1;
u8 has_vid:1;
u32 alarms;
u16 voltage[3][6];
u16 temp[7][3];
u16 tach[2][4];
u8 pwm[4][3];
u8 range[3];
u8 pwmctl[3];
u8 pwmchan[3];
u8 enh_acoustics[2];
u8 vid;
u8 vrm;
const struct attribute_group *groups[9];
};
static struct i2c_driver adt7475_driver;
static struct adt7475_data *adt7475_update_device(struct device *dev);
static void adt7475_read_hystersis(struct i2c_client *client);
static void adt7475_read_pwm(struct i2c_client *client, int index);
/* Given a temp value, convert it to register value */
static inline u16 temp2reg(struct adt7475_data *data, long val)
{
u16 ret;
if (!(data->config5 & CONFIG5_TWOSCOMP)) {
val = clamp_val(val, -64000, 191000);
ret = (val + 64500) / 1000;
} else {
val = clamp_val(val, -128000, 127000);
if (val < -500)
ret = (256500 + val) / 1000;
else
ret = (val + 500) / 1000;
}
return ret << 2;
}
/* Given a register value, convert it to a real temp value */
static inline int reg2temp(struct adt7475_data *data, u16 reg)
{
if (data->config5 & CONFIG5_TWOSCOMP) {
if (reg >= 512)
return (reg - 1024) * 250;
else
return reg * 250;
} else
return (reg - 256) * 250;
}
static inline int tach2rpm(u16 tach)
{
if (tach == 0 || tach == 0xFFFF)
return 0;
return (90000 * 60) / tach;
}
static inline u16 rpm2tach(unsigned long rpm)
{
if (rpm == 0)
return 0;
return clamp_val((90000 * 60) / rpm, 1, 0xFFFF);
}
/* Scaling factors for voltage inputs, taken from the ADT7490 datasheet */
static const int adt7473_in_scaling[ADT7475_VOLTAGE_COUNT + 1][2] = {
{ 45, 94 }, /* +2.5V */
{ 175, 525 }, /* Vccp */
{ 68, 71 }, /* Vcc */
{ 93, 47 }, /* +5V */
{ 120, 20 }, /* +12V */
{ 45, 45 }, /* Vtt */
};
static inline int reg2volt(int channel, u16 reg, u8 bypass_attn)
{
const int *r = adt7473_in_scaling[channel];
if (bypass_attn & (1 << channel))
return DIV_ROUND_CLOSEST(reg * 2250, 1024);
return DIV_ROUND_CLOSEST(reg * (r[0] + r[1]) * 2250, r[1] * 1024);
}
static inline u16 volt2reg(int channel, long volt, u8 bypass_attn)
{
const int *r = adt7473_in_scaling[channel];
long reg;
if (bypass_attn & (1 << channel))
reg = DIV_ROUND_CLOSEST(volt * 1024, 2250);
else
reg = DIV_ROUND_CLOSEST(volt * r[1] * 1024,
(r[0] + r[1]) * 2250);
return clamp_val(reg, 0, 1023) & (0xff << 2);
}
static int adt7475_read_word(struct i2c_client *client, int reg)
{
int val1, val2;
val1 = i2c_smbus_read_byte_data(client, reg);
if (val1 < 0)
return val1;
val2 = i2c_smbus_read_byte_data(client, reg + 1);
if (val2 < 0)
return val2;
return val1 | (val2 << 8);
}
static void adt7475_write_word(struct i2c_client *client, int reg, u16 val)
{
i2c_smbus_write_byte_data(client, reg + 1, val >> 8);
i2c_smbus_write_byte_data(client, reg, val & 0xFF);
}
static ssize_t voltage_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
unsigned short val;
if (IS_ERR(data))
return PTR_ERR(data);
switch (sattr->nr) {
case ALARM:
return sprintf(buf, "%d\n",
(data->alarms >> sattr->index) & 1);
default:
val = data->voltage[sattr->nr][sattr->index];
return sprintf(buf, "%d\n",
reg2volt(sattr->index, val, data->bypass_attn));
}
}
static ssize_t voltage_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned char reg;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
data->voltage[sattr->nr][sattr->index] =
volt2reg(sattr->index, val, data->bypass_attn);
if (sattr->index < ADT7475_VOLTAGE_COUNT) {
if (sattr->nr == MIN)
reg = VOLTAGE_MIN_REG(sattr->index);
else
reg = VOLTAGE_MAX_REG(sattr->index);
} else {
if (sattr->nr == MIN)
reg = REG_VTT_MIN;
else
reg = REG_VTT_MAX;
}
i2c_smbus_write_byte_data(client, reg,
data->voltage[sattr->nr][sattr->index] >> 2);
mutex_unlock(&data->lock);
return count;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int out;
if (IS_ERR(data))
return PTR_ERR(data);
switch (sattr->nr) {
case HYSTERSIS:
mutex_lock(&data->lock);
out = data->temp[sattr->nr][sattr->index];
if (sattr->index != 1)
out = (out >> 4) & 0xF;
else
out = (out & 0xF);
/*
* Show the value as an absolute number tied to
* THERM
*/
out = reg2temp(data, data->temp[THERM][sattr->index]) -
out * 1000;
mutex_unlock(&data->lock);
break;
case OFFSET:
/*
* Offset is always 2's complement, regardless of the
* setting in CONFIG5
*/
mutex_lock(&data->lock);
out = (s8)data->temp[sattr->nr][sattr->index];
if (data->config5 & CONFIG5_TEMPOFFSET)
out *= 1000;
else
out *= 500;
mutex_unlock(&data->lock);
break;
case ALARM:
out = (data->alarms >> (sattr->index + 4)) & 1;
break;
case FAULT:
/* Note - only for remote1 and remote2 */
out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000));
break;
default:
/* All other temp values are in the configured format */
out = reg2temp(data, data->temp[sattr->nr][sattr->index]);
}
return sprintf(buf, "%d\n", out);
}
static ssize_t temp_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned char reg = 0;
u8 out;
int temp;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
/* We need the config register in all cases for temp <-> reg conv. */
data->config5 = adt7475_read(REG_CONFIG5);
switch (sattr->nr) {
case OFFSET:
if (data->config5 & CONFIG5_TEMPOFFSET) {
val = clamp_val(val, -63000, 127000);
out = data->temp[OFFSET][sattr->index] = val / 1000;
} else {
val = clamp_val(val, -63000, 64000);
out = data->temp[OFFSET][sattr->index] = val / 500;
}
break;
case HYSTERSIS:
/*
* The value will be given as an absolute value, turn it
* into an offset based on THERM
*/
/* Read fresh THERM and HYSTERSIS values from the chip */
data->temp[THERM][sattr->index] =
adt7475_read(TEMP_THERM_REG(sattr->index)) << 2;
adt7475_read_hystersis(client);
temp = reg2temp(data, data->temp[THERM][sattr->index]);
val = clamp_val(val, temp - 15000, temp);
val = (temp - val) / 1000;
if (sattr->index != 1) {
data->temp[HYSTERSIS][sattr->index] &= 0x0F;
data->temp[HYSTERSIS][sattr->index] |= (val & 0xF) << 4;
} else {
data->temp[HYSTERSIS][sattr->index] &= 0xF0;
data->temp[HYSTERSIS][sattr->index] |= (val & 0xF);
}
out = data->temp[HYSTERSIS][sattr->index];
break;
default:
data->temp[sattr->nr][sattr->index] = temp2reg(data, val);
/*
* We maintain an extra 2 digits of precision for simplicity
* - shift those back off before writing the value
*/
out = (u8) (data->temp[sattr->nr][sattr->index] >> 2);
}
switch (sattr->nr) {
case MIN:
reg = TEMP_MIN_REG(sattr->index);
break;
case MAX:
reg = TEMP_MAX_REG(sattr->index);
break;
case OFFSET:
reg = TEMP_OFFSET_REG(sattr->index);
break;
case AUTOMIN:
reg = TEMP_TMIN_REG(sattr->index);
break;
case THERM:
reg = TEMP_THERM_REG(sattr->index);
break;
case HYSTERSIS:
if (sattr->index != 2)
reg = REG_REMOTE1_HYSTERSIS;
else
reg = REG_REMOTE2_HYSTERSIS;
break;
}
i2c_smbus_write_byte_data(client, reg, out);
mutex_unlock(&data->lock);
return count;
}
/* Assuming CONFIG6[SLOW] is 0 */
static const int ad7475_st_map[] = {
37500, 18800, 12500, 7500, 4700, 3100, 1600, 800,
};
static ssize_t temp_st_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
long val;
switch (sattr->index) {
case 0:
val = data->enh_acoustics[0] & 0xf;
break;
case 1:
val = data->enh_acoustics[1] & 0xf;
break;
case 2:
default:
val = (data->enh_acoustics[1] >> 4) & 0xf;
break;
}
if (val & 0x8)
return sprintf(buf, "%d\n", ad7475_st_map[val & 0x7]);
else
return sprintf(buf, "0\n");
}
static ssize_t temp_st_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned char reg;
int shift, idx;
ulong val;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
switch (sattr->index) {
case 0:
reg = REG_ENHANCE_ACOUSTICS1;
shift = 0;
idx = 0;
break;
case 1:
reg = REG_ENHANCE_ACOUSTICS2;
shift = 0;
idx = 1;
break;
case 2:
default:
reg = REG_ENHANCE_ACOUSTICS2;
shift = 4;
idx = 1;
break;
}
if (val > 0) {
val = find_closest_descending(val, ad7475_st_map,
ARRAY_SIZE(ad7475_st_map));
val |= 0x8;
}
mutex_lock(&data->lock);
data->enh_acoustics[idx] &= ~(0xf << shift);
data->enh_acoustics[idx] |= (val << shift);
i2c_smbus_write_byte_data(client, reg, data->enh_acoustics[idx]);
mutex_unlock(&data->lock);
return count;
}
/*
* Table of autorange values - the user will write the value in millidegrees,
* and we'll convert it
*/
static const int autorange_table[] = {
2000, 2500, 3330, 4000, 5000, 6670, 8000,
10000, 13330, 16000, 20000, 26670, 32000, 40000,
53330, 80000
};
static ssize_t point2_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int out, val;
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->lock);
out = (data->range[sattr->index] >> 4) & 0x0F;
val = reg2temp(data, data->temp[AUTOMIN][sattr->index]);
mutex_unlock(&data->lock);
return sprintf(buf, "%d\n", val + autorange_table[out]);
}
static ssize_t point2_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int temp;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
/* Get a fresh copy of the needed registers */
data->config5 = adt7475_read(REG_CONFIG5);
data->temp[AUTOMIN][sattr->index] =
adt7475_read(TEMP_TMIN_REG(sattr->index)) << 2;
data->range[sattr->index] =
adt7475_read(TEMP_TRANGE_REG(sattr->index));
/*
* The user will write an absolute value, so subtract the start point
* to figure the range
*/
temp = reg2temp(data, data->temp[AUTOMIN][sattr->index]);
val = clamp_val(val, temp + autorange_table[0],
temp + autorange_table[ARRAY_SIZE(autorange_table) - 1]);
val -= temp;
/* Find the nearest table entry to what the user wrote */
val = find_closest(val, autorange_table, ARRAY_SIZE(autorange_table));
data->range[sattr->index] &= ~0xF0;
data->range[sattr->index] |= val << 4;
i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index),
data->range[sattr->index]);
mutex_unlock(&data->lock);
return count;
}
static ssize_t tach_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int out;
if (IS_ERR(data))
return PTR_ERR(data);
if (sattr->nr == ALARM)
out = (data->alarms >> (sattr->index + 10)) & 1;
else
out = tach2rpm(data->tach[sattr->nr][sattr->index]);
return sprintf(buf, "%d\n", out);
}
static ssize_t tach_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
data->tach[MIN][sattr->index] = rpm2tach(val);
adt7475_write_word(client, TACH_MIN_REG(sattr->index),
data->tach[MIN][sattr->index]);
mutex_unlock(&data->lock);
return count;
}
static ssize_t pwm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->pwm[sattr->nr][sattr->index]);
}
static ssize_t pwmchan_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->pwmchan[sattr->index]);
}
static ssize_t pwmctrl_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->pwmctl[sattr->index]);
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned char reg = 0;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
switch (sattr->nr) {
case INPUT:
/* Get a fresh value for CONTROL */
data->pwm[CONTROL][sattr->index] =
adt7475_read(PWM_CONFIG_REG(sattr->index));
/*
* If we are not in manual mode, then we shouldn't allow
* the user to set the pwm speed
*/
if (((data->pwm[CONTROL][sattr->index] >> 5) & 7) != 7) {
mutex_unlock(&data->lock);
return count;
}
reg = PWM_REG(sattr->index);
break;
case MIN:
reg = PWM_MIN_REG(sattr->index);
break;
case MAX:
reg = PWM_MAX_REG(sattr->index);
break;
}
data->pwm[sattr->nr][sattr->index] = clamp_val(val, 0, 0xFF);
i2c_smbus_write_byte_data(client, reg,
data->pwm[sattr->nr][sattr->index]);
mutex_unlock(&data->lock);
return count;
}
static ssize_t stall_disable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
u8 mask = BIT(5 + sattr->index);
return sprintf(buf, "%d\n", !!(data->enh_acoustics[0] & mask));
}
static ssize_t stall_disable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
u8 mask = BIT(5 + sattr->index);
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
data->enh_acoustics[0] &= ~mask;
if (val)
data->enh_acoustics[0] |= mask;
i2c_smbus_write_byte_data(client, REG_ENHANCE_ACOUSTICS1,
data->enh_acoustics[0]);
mutex_unlock(&data->lock);
return count;
}
/* Called by set_pwmctrl and set_pwmchan */
static int hw_set_pwm(struct i2c_client *client, int index,
unsigned int pwmctl, unsigned int pwmchan)
{
struct adt7475_data *data = i2c_get_clientdata(client);
long val = 0;
switch (pwmctl) {
case 0:
val = 0x03; /* Run at full speed */
break;
case 1:
val = 0x07; /* Manual mode */
break;
case 2:
switch (pwmchan) {
case 1:
/* Remote1 controls PWM */
val = 0x00;
break;
case 2:
/* local controls PWM */
val = 0x01;
break;
case 4:
/* remote2 controls PWM */
val = 0x02;
break;
case 6:
/* local/remote2 control PWM */
val = 0x05;
break;
case 7:
/* All three control PWM */
val = 0x06;
break;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
}
data->pwmctl[index] = pwmctl;
data->pwmchan[index] = pwmchan;
data->pwm[CONTROL][index] &= ~0xE0;
data->pwm[CONTROL][index] |= (val & 7) << 5;
i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
data->pwm[CONTROL][index]);
return 0;
}
static ssize_t pwmchan_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int r;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
/* Read Modify Write PWM values */
adt7475_read_pwm(client, sattr->index);
r = hw_set_pwm(client, sattr->index, data->pwmctl[sattr->index], val);
if (r)
count = r;
mutex_unlock(&data->lock);
return count;
}
static ssize_t pwmctrl_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int r;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->lock);
/* Read Modify Write PWM values */
adt7475_read_pwm(client, sattr->index);
r = hw_set_pwm(client, sattr->index, val, data->pwmchan[sattr->index]);
if (r)
count = r;
mutex_unlock(&data->lock);
return count;
}
/* List of frequencies for the PWM */
static const int pwmfreq_table[] = {
11, 14, 22, 29, 35, 44, 58, 88, 22500
};
static ssize_t pwmfreq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int idx;
if (IS_ERR(data))
return PTR_ERR(data);
idx = clamp_val(data->range[sattr->index] & 0xf, 0,
ARRAY_SIZE(pwmfreq_table) - 1);
return sprintf(buf, "%d\n", pwmfreq_table[idx]);
}
static ssize_t pwmfreq_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int out;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
out = find_closest(val, pwmfreq_table, ARRAY_SIZE(pwmfreq_table));
mutex_lock(&data->lock);
data->range[sattr->index] =
adt7475_read(TEMP_TRANGE_REG(sattr->index));
data->range[sattr->index] &= ~0xf;
data->range[sattr->index] |= out;
i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index),
data->range[sattr->index]);
mutex_unlock(&data->lock);
return count;
}
static ssize_t pwm_use_point2_pwm_at_crit_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", !!(data->config4 & CONFIG4_MAXDUTY));
}
static ssize_t pwm_use_point2_pwm_at_crit_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
if (val != 0 && val != 1)
return -EINVAL;
mutex_lock(&data->lock);
data->config4 = i2c_smbus_read_byte_data(client, REG_CONFIG4);
if (val)
data->config4 |= CONFIG4_MAXDUTY;
else
data->config4 &= ~CONFIG4_MAXDUTY;
i2c_smbus_write_byte_data(client, REG_CONFIG4, data->config4);
mutex_unlock(&data->lock);
return count;
}
static ssize_t vrm_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct adt7475_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", (int)data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct adt7475_data *data = dev_get_drvdata(dev);
long val;
if (kstrtol(buf, 10, &val))
return -EINVAL;
if (val < 0 || val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct adt7475_data *data = adt7475_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static SENSOR_DEVICE_ATTR_2_RO(in0_input, voltage, INPUT, 0);
static SENSOR_DEVICE_ATTR_2_RW(in0_max, voltage, MAX, 0);
static SENSOR_DEVICE_ATTR_2_RW(in0_min, voltage, MIN, 0);
static SENSOR_DEVICE_ATTR_2_RO(in0_alarm, voltage, ALARM, 0);
static SENSOR_DEVICE_ATTR_2_RO(in1_input, voltage, INPUT, 1);
static SENSOR_DEVICE_ATTR_2_RW(in1_max, voltage, MAX, 1);
static SENSOR_DEVICE_ATTR_2_RW(in1_min, voltage, MIN, 1);
static SENSOR_DEVICE_ATTR_2_RO(in1_alarm, voltage, ALARM, 1);
static SENSOR_DEVICE_ATTR_2_RO(in2_input, voltage, INPUT, 2);
static SENSOR_DEVICE_ATTR_2_RW(in2_max, voltage, MAX, 2);
static SENSOR_DEVICE_ATTR_2_RW(in2_min, voltage, MIN, 2);
static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, voltage, ALARM, 2);
static SENSOR_DEVICE_ATTR_2_RO(in3_input, voltage, INPUT, 3);
static SENSOR_DEVICE_ATTR_2_RW(in3_max, voltage, MAX, 3);
static SENSOR_DEVICE_ATTR_2_RW(in3_min, voltage, MIN, 3);
static SENSOR_DEVICE_ATTR_2_RO(in3_alarm, voltage, ALARM, 3);
static SENSOR_DEVICE_ATTR_2_RO(in4_input, voltage, INPUT, 4);
static SENSOR_DEVICE_ATTR_2_RW(in4_max, voltage, MAX, 4);
static SENSOR_DEVICE_ATTR_2_RW(in4_min, voltage, MIN, 4);
static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, voltage, ALARM, 8);
static SENSOR_DEVICE_ATTR_2_RO(in5_input, voltage, INPUT, 5);
static SENSOR_DEVICE_ATTR_2_RW(in5_max, voltage, MAX, 5);
static SENSOR_DEVICE_ATTR_2_RW(in5_min, voltage, MIN, 5);
static SENSOR_DEVICE_ATTR_2_RO(in5_alarm, voltage, ALARM, 31);
static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, INPUT, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp1_alarm, temp, ALARM, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp1_fault, temp, FAULT, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, MAX, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, MIN, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_offset, temp, OFFSET, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point1_temp, temp, AUTOMIN, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point2_temp, point2, 0, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, THERM, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_crit_hyst, temp, HYSTERSIS, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_smoothing, temp_st, 0, 0);
static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, INPUT, 1);
static SENSOR_DEVICE_ATTR_2_RO(temp2_alarm, temp, ALARM, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, MAX, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, MIN, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, OFFSET, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point1_temp, temp, AUTOMIN, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point2_temp, point2, 0, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, THERM, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_crit_hyst, temp, HYSTERSIS, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_smoothing, temp_st, 0, 1);
static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, INPUT, 2);
static SENSOR_DEVICE_ATTR_2_RO(temp3_alarm, temp, ALARM, 2);
static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, temp, FAULT, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, MAX, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, MIN, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_offset, temp, OFFSET, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point1_temp, temp, AUTOMIN, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point2_temp, point2, 0, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, THERM, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_crit_hyst, temp, HYSTERSIS, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_smoothing, temp_st, 0, 2);
static SENSOR_DEVICE_ATTR_2_RO(fan1_input, tach, INPUT, 0);
static SENSOR_DEVICE_ATTR_2_RW(fan1_min, tach, MIN, 0);
static SENSOR_DEVICE_ATTR_2_RO(fan1_alarm, tach, ALARM, 0);
static SENSOR_DEVICE_ATTR_2_RO(fan2_input, tach, INPUT, 1);
static SENSOR_DEVICE_ATTR_2_RW(fan2_min, tach, MIN, 1);
static SENSOR_DEVICE_ATTR_2_RO(fan2_alarm, tach, ALARM, 1);
static SENSOR_DEVICE_ATTR_2_RO(fan3_input, tach, INPUT, 2);
static SENSOR_DEVICE_ATTR_2_RW(fan3_min, tach, MIN, 2);
static SENSOR_DEVICE_ATTR_2_RO(fan3_alarm, tach, ALARM, 2);
static SENSOR_DEVICE_ATTR_2_RO(fan4_input, tach, INPUT, 3);
static SENSOR_DEVICE_ATTR_2_RW(fan4_min, tach, MIN, 3);
static SENSOR_DEVICE_ATTR_2_RO(fan4_alarm, tach, ALARM, 3);
static SENSOR_DEVICE_ATTR_2_RW(pwm1, pwm, INPUT, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_freq, pwmfreq, INPUT, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_enable, pwmctrl, INPUT, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_channels_temp, pwmchan, INPUT, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point1_pwm, pwm, MIN, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point2_pwm, pwm, MAX, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm1_stall_disable, stall_disable, 0, 0);
static SENSOR_DEVICE_ATTR_2_RW(pwm2, pwm, INPUT, 1);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_freq, pwmfreq, INPUT, 1);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_enable, pwmctrl, INPUT, 1);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_channels_temp, pwmchan, INPUT, 1);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point1_pwm, pwm, MIN, 1);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point2_pwm, pwm, MAX, 1);
static SENSOR_DEVICE_ATTR_2_RW(pwm2_stall_disable, stall_disable, 0, 1);
static SENSOR_DEVICE_ATTR_2_RW(pwm3, pwm, INPUT, 2);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_freq, pwmfreq, INPUT, 2);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_enable, pwmctrl, INPUT, 2);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_channels_temp, pwmchan, INPUT, 2);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point1_pwm, pwm, MIN, 2);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point2_pwm, pwm, MAX, 2);
static SENSOR_DEVICE_ATTR_2_RW(pwm3_stall_disable, stall_disable, 0, 2);
/* Non-standard name, might need revisiting */
static DEVICE_ATTR_RW(pwm_use_point2_pwm_at_crit);
static DEVICE_ATTR_RW(vrm);
static DEVICE_ATTR_RO(cpu0_vid);
static struct attribute *adt7475_attrs[] = {
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_offset.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_smoothing.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_smoothing.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
&sensor_dev_attr_temp3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp3_crit.dev_attr.attr,
&sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_smoothing.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_stall_disable.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_stall_disable.dev_attr.attr,
&dev_attr_pwm_use_point2_pwm_at_crit.attr,
NULL,
};
static struct attribute *fan4_attrs[] = {
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan4_alarm.dev_attr.attr,
NULL
};
static struct attribute *pwm2_attrs[] = {
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_stall_disable.dev_attr.attr,
NULL
};
static struct attribute *in0_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
NULL
};
static struct attribute *in3_attrs[] = {
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
NULL
};
static struct attribute *in4_attrs[] = {
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
NULL
};
static struct attribute *in5_attrs[] = {
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
NULL
};
static struct attribute *vid_attrs[] = {
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
NULL
};
static const struct attribute_group adt7475_attr_group = { .attrs = adt7475_attrs };
static const struct attribute_group fan4_attr_group = { .attrs = fan4_attrs };
static const struct attribute_group pwm2_attr_group = { .attrs = pwm2_attrs };
static const struct attribute_group in0_attr_group = { .attrs = in0_attrs };
static const struct attribute_group in3_attr_group = { .attrs = in3_attrs };
static const struct attribute_group in4_attr_group = { .attrs = in4_attrs };
static const struct attribute_group in5_attr_group = { .attrs = in5_attrs };
static const struct attribute_group vid_attr_group = { .attrs = vid_attrs };
static int adt7475_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int vendid, devid, devid2;
const char *name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
vendid = adt7475_read(REG_VENDID);
devid2 = adt7475_read(REG_DEVID2);
if (vendid != 0x41 || /* Analog Devices */
(devid2 & 0xf8) != 0x68)
return -ENODEV;
devid = adt7475_read(REG_DEVID);
if (devid == 0x73)
name = "adt7473";
else if (devid == 0x75 && client->addr == 0x2e)
name = "adt7475";
else if (devid == 0x76)
name = "adt7476";
else if ((devid2 & 0xfc) == 0x6c)
name = "adt7490";
else {
dev_dbg(&adapter->dev,
"Couldn't detect an ADT7473/75/76/90 part at "
"0x%02x\n", (unsigned int)client->addr);
return -ENODEV;
}
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static int adt7475_update_limits(struct i2c_client *client)
{
struct adt7475_data *data = i2c_get_clientdata(client);
int i;
int ret;
ret = adt7475_read(REG_CONFIG4);
if (ret < 0)
return ret;
data->config4 = ret;
ret = adt7475_read(REG_CONFIG5);
if (ret < 0)
return ret;
data->config5 = ret;
for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
if (!(data->has_voltage & (1 << i)))
continue;
/* Adjust values so they match the input precision */
ret = adt7475_read(VOLTAGE_MIN_REG(i));
if (ret < 0)
return ret;
data->voltage[MIN][i] = ret << 2;
ret = adt7475_read(VOLTAGE_MAX_REG(i));
if (ret < 0)
return ret;
data->voltage[MAX][i] = ret << 2;
}
if (data->has_voltage & (1 << 5)) {
ret = adt7475_read(REG_VTT_MIN);
if (ret < 0)
return ret;
data->voltage[MIN][5] = ret << 2;
ret = adt7475_read(REG_VTT_MAX);
if (ret < 0)
return ret;
data->voltage[MAX][5] = ret << 2;
}
for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
/* Adjust values so they match the input precision */
ret = adt7475_read(TEMP_MIN_REG(i));
if (ret < 0)
return ret;
data->temp[MIN][i] = ret << 2;
ret = adt7475_read(TEMP_MAX_REG(i));
if (ret < 0)
return ret;
data->temp[MAX][i] = ret << 2;
ret = adt7475_read(TEMP_TMIN_REG(i));
if (ret < 0)
return ret;
data->temp[AUTOMIN][i] = ret << 2;
ret = adt7475_read(TEMP_THERM_REG(i));
if (ret < 0)
return ret;
data->temp[THERM][i] = ret << 2;
ret = adt7475_read(TEMP_OFFSET_REG(i));
if (ret < 0)
return ret;
data->temp[OFFSET][i] = ret;
}
adt7475_read_hystersis(client);
for (i = 0; i < ADT7475_TACH_COUNT; i++) {
if (i == 3 && !data->has_fan4)
continue;
ret = adt7475_read_word(client, TACH_MIN_REG(i));
if (ret < 0)
return ret;
data->tach[MIN][i] = ret;
}
for (i = 0; i < ADT7475_PWM_COUNT; i++) {
if (i == 1 && !data->has_pwm2)
continue;
ret = adt7475_read(PWM_MAX_REG(i));
if (ret < 0)
return ret;
data->pwm[MAX][i] = ret;
ret = adt7475_read(PWM_MIN_REG(i));
if (ret < 0)
return ret;
data->pwm[MIN][i] = ret;
/* Set the channel and control information */
adt7475_read_pwm(client, i);
}
ret = adt7475_read(TEMP_TRANGE_REG(0));
if (ret < 0)
return ret;
data->range[0] = ret;
ret = adt7475_read(TEMP_TRANGE_REG(1));
if (ret < 0)
return ret;
data->range[1] = ret;
ret = adt7475_read(TEMP_TRANGE_REG(2));
if (ret < 0)
return ret;
data->range[2] = ret;
return 0;
}
static int load_config3(const struct i2c_client *client, const char *propname)
{
const char *function;
u8 config3;
int ret;
ret = device_property_read_string(&client->dev, propname, &function);
if (!ret) {
ret = adt7475_read(REG_CONFIG3);
if (ret < 0)
return ret;
config3 = ret & ~CONFIG3_SMBALERT;
if (!strcmp("pwm2", function))
;
else if (!strcmp("smbalert#", function))
config3 |= CONFIG3_SMBALERT;
else
return -EINVAL;
return i2c_smbus_write_byte_data(client, REG_CONFIG3, config3);
}
return 0;
}
static int load_config4(const struct i2c_client *client, const char *propname)
{
const char *function;
u8 config4;
int ret;
ret = device_property_read_string(&client->dev, propname, &function);
if (!ret) {
ret = adt7475_read(REG_CONFIG4);
if (ret < 0)
return ret;
config4 = ret & ~CONFIG4_PINFUNC;
if (!strcmp("tach4", function))
;
else if (!strcmp("therm#", function))
config4 |= CONFIG4_THERM;
else if (!strcmp("smbalert#", function))
config4 |= CONFIG4_SMBALERT;
else if (!strcmp("gpio", function))
config4 |= CONFIG4_PINFUNC;
else
return -EINVAL;
return i2c_smbus_write_byte_data(client, REG_CONFIG4, config4);
}
return 0;
}
static int load_config(const struct i2c_client *client, enum chips chip)
{
int err;
const char *prop1, *prop2;
switch (chip) {
case adt7473:
case adt7475:
prop1 = "adi,pin5-function";
prop2 = "adi,pin9-function";
break;
case adt7476:
case adt7490:
prop1 = "adi,pin10-function";
prop2 = "adi,pin14-function";
break;
}
err = load_config3(client, prop1);
if (err) {
dev_err(&client->dev, "failed to configure %s\n", prop1);
return err;
}
err = load_config4(client, prop2);
if (err) {
dev_err(&client->dev, "failed to configure %s\n", prop2);
return err;
}
return 0;
}
static int set_property_bit(const struct i2c_client *client, char *property,
u8 *config, u8 bit_index)
{
u32 prop_value = 0;
int ret = device_property_read_u32(&client->dev, property,
&prop_value);
if (!ret) {
if (prop_value)
*config |= (1 << bit_index);
else
*config &= ~(1 << bit_index);
}
return ret;
}
static int load_attenuators(const struct i2c_client *client, enum chips chip,
struct adt7475_data *data)
{
switch (chip) {
case adt7476:
case adt7490:
set_property_bit(client, "adi,bypass-attenuator-in0",
&data->config4, 4);
set_property_bit(client, "adi,bypass-attenuator-in1",
&data->config4, 5);
set_property_bit(client, "adi,bypass-attenuator-in3",
&data->config4, 6);
set_property_bit(client, "adi,bypass-attenuator-in4",
&data->config4, 7);
return i2c_smbus_write_byte_data(client, REG_CONFIG4,
data->config4);
case adt7473:
case adt7475:
set_property_bit(client, "adi,bypass-attenuator-in1",
&data->config2, 5);
return i2c_smbus_write_byte_data(client, REG_CONFIG2,
data->config2);
}
return 0;
}
static int adt7475_set_pwm_polarity(struct i2c_client *client)
{
u32 states[ADT7475_PWM_COUNT];
int ret, i;
u8 val;
ret = device_property_read_u32_array(&client->dev,
"adi,pwm-active-state", states,
ARRAY_SIZE(states));
if (ret)
return ret;
for (i = 0; i < ADT7475_PWM_COUNT; i++) {
ret = adt7475_read(PWM_CONFIG_REG(i));
if (ret < 0)
return ret;
val = ret;
if (states[i])
val &= ~BIT(4);
else
val |= BIT(4);
ret = i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(i), val);
if (ret)
return ret;
}
return 0;
}
static int adt7475_probe(struct i2c_client *client)
{
enum chips chip;
static const char * const names[] = {
[adt7473] = "ADT7473",
[adt7475] = "ADT7475",
[adt7476] = "ADT7476",
[adt7490] = "ADT7490",
};
struct adt7475_data *data;
struct device *hwmon_dev;
int i, ret = 0, revision, group_num = 0;
u8 config3;
const struct i2c_device_id *id = i2c_match_id(adt7475_id, client);
data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
mutex_init(&data->lock);
data->client = client;
i2c_set_clientdata(client, data);
if (client->dev.of_node)
chip = (uintptr_t)of_device_get_match_data(&client->dev);
else
chip = id->driver_data;
/* Initialize device-specific values */
switch (chip) {
case adt7476:
data->has_voltage = 0x0e; /* in1 to in3 */
revision = adt7475_read(REG_DEVID2) & 0x07;
break;
case adt7490:
data->has_voltage = 0x3e; /* in1 to in5 */
revision = adt7475_read(REG_DEVID2) & 0x03;
if (revision == 0x03)
revision += adt7475_read(REG_DEVREV2);
break;
default:
data->has_voltage = 0x06; /* in1, in2 */
revision = adt7475_read(REG_DEVID2) & 0x07;
}
ret = load_config(client, chip);
if (ret)
return ret;
config3 = adt7475_read(REG_CONFIG3);
/* Pin PWM2 may alternatively be used for ALERT output */
if (!(config3 & CONFIG3_SMBALERT))
data->has_pwm2 = 1;
/* Meaning of this bit is inverted for the ADT7473-1 */
if (id->driver_data == adt7473 && revision >= 1)
data->has_pwm2 = !data->has_pwm2;
data->config4 = adt7475_read(REG_CONFIG4);
/* Pin TACH4 may alternatively be used for THERM */
if ((data->config4 & CONFIG4_PINFUNC) == 0x0)
data->has_fan4 = 1;
/*
* THERM configuration is more complex on the ADT7476 and ADT7490,
* because 2 different pins (TACH4 and +2.5 Vin) can be used for
* this function
*/
if (id->driver_data == adt7490) {
if ((data->config4 & CONFIG4_PINFUNC) == 0x1 &&
!(config3 & CONFIG3_THERM))
data->has_fan4 = 1;
}
if (id->driver_data == adt7476 || id->driver_data == adt7490) {
if (!(config3 & CONFIG3_THERM) ||
(data->config4 & CONFIG4_PINFUNC) == 0x1)
data->has_voltage |= (1 << 0); /* in0 */
}
/*
* On the ADT7476, the +12V input pin may instead be used as VID5,
* and VID pins may alternatively be used as GPIO
*/
if (id->driver_data == adt7476) {
u8 vid = adt7475_read(REG_VID);
if (!(vid & VID_VIDSEL))
data->has_voltage |= (1 << 4); /* in4 */
data->has_vid = !(adt7475_read(REG_CONFIG5) & CONFIG5_VIDGPIO);
}
/* Voltage attenuators can be bypassed, globally or individually */
data->config2 = adt7475_read(REG_CONFIG2);
ret = load_attenuators(client, chip, data);
if (ret)
dev_warn(&client->dev, "Error configuring attenuator bypass\n");
if (data->config2 & CONFIG2_ATTN) {
data->bypass_attn = (0x3 << 3) | 0x3;
} else {
data->bypass_attn = ((data->config4 & CONFIG4_ATTN_IN10) >> 4) |
((data->config4 & CONFIG4_ATTN_IN43) >> 3);
}
data->bypass_attn &= data->has_voltage;
/*
* Call adt7475_read_pwm for all pwm's as this will reprogram any
* pwm's which are disabled to manual mode with 0% duty cycle
*/
for (i = 0; i < ADT7475_PWM_COUNT; i++)
adt7475_read_pwm(client, i);
ret = adt7475_set_pwm_polarity(client);
if (ret && ret != -EINVAL)
dev_warn(&client->dev, "Error configuring pwm polarity\n");
/* Start monitoring */
switch (chip) {
case adt7475:
case adt7476:
i2c_smbus_write_byte_data(client, REG_CONFIG1,
adt7475_read(REG_CONFIG1) | 0x01);
break;
default:
break;
}
data->groups[group_num++] = &adt7475_attr_group;
/* Features that can be disabled individually */
if (data->has_fan4) {
data->groups[group_num++] = &fan4_attr_group;
}
if (data->has_pwm2) {
data->groups[group_num++] = &pwm2_attr_group;
}
if (data->has_voltage & (1 << 0)) {
data->groups[group_num++] = &in0_attr_group;
}
if (data->has_voltage & (1 << 3)) {
data->groups[group_num++] = &in3_attr_group;
}
if (data->has_voltage & (1 << 4)) {
data->groups[group_num++] = &in4_attr_group;
}
if (data->has_voltage & (1 << 5)) {
data->groups[group_num++] = &in5_attr_group;
}
if (data->has_vid) {
data->vrm = vid_which_vrm();
data->groups[group_num] = &vid_attr_group;
}
/* register device with all the acquired attributes */
hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
client->name, data,
data->groups);
if (IS_ERR(hwmon_dev)) {
ret = PTR_ERR(hwmon_dev);
return ret;
}
dev_info(&client->dev, "%s device, revision %d\n",
names[id->driver_data], revision);
if ((data->has_voltage & 0x11) || data->has_fan4 || data->has_pwm2)
dev_info(&client->dev, "Optional features:%s%s%s%s%s\n",
(data->has_voltage & (1 << 0)) ? " in0" : "",
(data->has_voltage & (1 << 4)) ? " in4" : "",
data->has_fan4 ? " fan4" : "",
data->has_pwm2 ? " pwm2" : "",
data->has_vid ? " vid" : "");
if (data->bypass_attn)
dev_info(&client->dev, "Bypassing attenuators on:%s%s%s%s\n",
(data->bypass_attn & (1 << 0)) ? " in0" : "",
(data->bypass_attn & (1 << 1)) ? " in1" : "",
(data->bypass_attn & (1 << 3)) ? " in3" : "",
(data->bypass_attn & (1 << 4)) ? " in4" : "");
/* Limits and settings, should never change update more than once */
ret = adt7475_update_limits(client);
if (ret)
return ret;
return 0;
}
static struct i2c_driver adt7475_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adt7475",
.of_match_table = of_match_ptr(adt7475_of_match),
},
.probe = adt7475_probe,
.id_table = adt7475_id,
.detect = adt7475_detect,
.address_list = normal_i2c,
};
static void adt7475_read_hystersis(struct i2c_client *client)
{
struct adt7475_data *data = i2c_get_clientdata(client);
data->temp[HYSTERSIS][0] = (u16) adt7475_read(REG_REMOTE1_HYSTERSIS);
data->temp[HYSTERSIS][1] = data->temp[HYSTERSIS][0];
data->temp[HYSTERSIS][2] = (u16) adt7475_read(REG_REMOTE2_HYSTERSIS);
}
static void adt7475_read_pwm(struct i2c_client *client, int index)
{
struct adt7475_data *data = i2c_get_clientdata(client);
unsigned int v;
data->pwm[CONTROL][index] = adt7475_read(PWM_CONFIG_REG(index));
/*
* Figure out the internal value for pwmctrl and pwmchan
* based on the current settings
*/
v = (data->pwm[CONTROL][index] >> 5) & 7;
if (v == 3)
data->pwmctl[index] = 0;
else if (v == 7)
data->pwmctl[index] = 1;
else if (v == 4) {
/*
* The fan is disabled - we don't want to
* support that, so change to manual mode and
* set the duty cycle to 0 instead
*/
data->pwm[INPUT][index] = 0;
data->pwm[CONTROL][index] &= ~0xE0;
data->pwm[CONTROL][index] |= (7 << 5);
i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
data->pwm[INPUT][index]);
i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
data->pwm[CONTROL][index]);
data->pwmctl[index] = 1;
} else {
data->pwmctl[index] = 2;
switch (v) {
case 0:
data->pwmchan[index] = 1;
break;
case 1:
data->pwmchan[index] = 2;
break;
case 2:
data->pwmchan[index] = 4;
break;
case 5:
data->pwmchan[index] = 6;
break;
case 6:
data->pwmchan[index] = 7;
break;
}
}
}
static int adt7475_update_measure(struct device *dev)
{
struct adt7475_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u16 ext;
int i;
int ret;
ret = adt7475_read(REG_STATUS2);
if (ret < 0)
return ret;
data->alarms = ret << 8;
ret = adt7475_read(REG_STATUS1);
if (ret < 0)
return ret;
data->alarms |= ret;
ret = adt7475_read(REG_EXTEND2);
if (ret < 0)
return ret;
ext = (ret << 8);
ret = adt7475_read(REG_EXTEND1);
if (ret < 0)
return ret;
ext |= ret;
for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
if (!(data->has_voltage & (1 << i)))
continue;
ret = adt7475_read(VOLTAGE_REG(i));
if (ret < 0)
return ret;
data->voltage[INPUT][i] =
(ret << 2) |
((ext >> (i * 2)) & 3);
}
for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
ret = adt7475_read(TEMP_REG(i));
if (ret < 0)
return ret;
data->temp[INPUT][i] =
(ret << 2) |
((ext >> ((i + 5) * 2)) & 3);
}
if (data->has_voltage & (1 << 5)) {
ret = adt7475_read(REG_STATUS4);
if (ret < 0)
return ret;
data->alarms |= ret << 24;
ret = adt7475_read(REG_EXTEND3);
if (ret < 0)
return ret;
ext = ret;
ret = adt7475_read(REG_VTT);
if (ret < 0)
return ret;
data->voltage[INPUT][5] = ret << 2 |
((ext >> 4) & 3);
}
for (i = 0; i < ADT7475_TACH_COUNT; i++) {
if (i == 3 && !data->has_fan4)
continue;
ret = adt7475_read_word(client, TACH_REG(i));
if (ret < 0)
return ret;
data->tach[INPUT][i] = ret;
}
/* Updated by hw when in auto mode */
for (i = 0; i < ADT7475_PWM_COUNT; i++) {
if (i == 1 && !data->has_pwm2)
continue;
ret = adt7475_read(PWM_REG(i));
if (ret < 0)
return ret;
data->pwm[INPUT][i] = ret;
}
if (data->has_vid) {
ret = adt7475_read(REG_VID);
if (ret < 0)
return ret;
data->vid = ret & 0x3f;
}
return 0;
}
static struct adt7475_data *adt7475_update_device(struct device *dev)
{
struct adt7475_data *data = dev_get_drvdata(dev);
int ret;
mutex_lock(&data->lock);
/* Measurement values update every 2 seconds */
if (time_after(jiffies, data->measure_updated + HZ * 2) ||
!data->valid) {
ret = adt7475_update_measure(dev);
if (ret) {
data->valid = false;
mutex_unlock(&data->lock);
return ERR_PTR(ret);
}
data->measure_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->lock);
return data;
}
module_i2c_driver(adt7475_driver);
MODULE_AUTHOR("Advanced Micro Devices, Inc");
MODULE_DESCRIPTION("adt7475 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/adt7475.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* APM X-Gene SoC Hardware Monitoring Driver
*
* Copyright (c) 2016, Applied Micro Circuits Corporation
* Author: Loc Ho <[email protected]>
* Hoan Tran <[email protected]>
*
* This driver provides the following features:
* - Retrieve CPU total power (uW)
* - Retrieve IO total power (uW)
* - Retrieve SoC temperature (milli-degree C) and alarm
*/
#include <linux/acpi.h>
#include <linux/dma-mapping.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/kfifo.h>
#include <linux/mailbox_controller.h>
#include <linux/mailbox_client.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <acpi/pcc.h>
/* SLIMpro message defines */
#define MSG_TYPE_DBG 0
#define MSG_TYPE_ERR 7
#define MSG_TYPE_PWRMGMT 9
#define MSG_TYPE(v) (((v) & 0xF0000000) >> 28)
#define MSG_TYPE_SET(v) (((v) << 28) & 0xF0000000)
#define MSG_SUBTYPE(v) (((v) & 0x0F000000) >> 24)
#define MSG_SUBTYPE_SET(v) (((v) << 24) & 0x0F000000)
#define DBG_SUBTYPE_SENSOR_READ 4
#define SENSOR_RD_MSG 0x04FFE902
#define SENSOR_RD_EN_ADDR(a) ((a) & 0x000FFFFF)
#define PMD_PWR_REG 0x20
#define PMD_PWR_MW_REG 0x26
#define SOC_PWR_REG 0x21
#define SOC_PWR_MW_REG 0x27
#define SOC_TEMP_REG 0x10
#define TEMP_NEGATIVE_BIT 8
#define SENSOR_INVALID_DATA BIT(15)
#define PWRMGMT_SUBTYPE_TPC 1
#define TPC_ALARM 2
#define TPC_GET_ALARM 3
#define TPC_CMD(v) (((v) & 0x00FF0000) >> 16)
#define TPC_CMD_SET(v) (((v) << 16) & 0x00FF0000)
#define TPC_EN_MSG(hndl, cmd, type) \
(MSG_TYPE_SET(MSG_TYPE_PWRMGMT) | \
MSG_SUBTYPE_SET(hndl) | TPC_CMD_SET(cmd) | type)
/* PCC defines */
#define PCC_SIGNATURE_MASK 0x50424300
#define PCCC_GENERATE_DB_INT BIT(15)
#define PCCS_CMD_COMPLETE BIT(0)
#define PCCS_SCI_DOORBEL BIT(1)
#define PCCS_PLATFORM_NOTIFICATION BIT(3)
/*
* Arbitrary retries in case the remote processor is slow to respond
* to PCC commands
*/
#define PCC_NUM_RETRIES 500
#define ASYNC_MSG_FIFO_SIZE 16
#define MBOX_OP_TIMEOUTMS 1000
#define WATT_TO_mWATT(x) ((x) * 1000)
#define mWATT_TO_uWATT(x) ((x) * 1000)
#define CELSIUS_TO_mCELSIUS(x) ((x) * 1000)
#define to_xgene_hwmon_dev(cl) \
container_of(cl, struct xgene_hwmon_dev, mbox_client)
enum xgene_hwmon_version {
XGENE_HWMON_V1 = 0,
XGENE_HWMON_V2 = 1,
};
struct slimpro_resp_msg {
u32 msg;
u32 param1;
u32 param2;
} __packed;
struct xgene_hwmon_dev {
struct device *dev;
struct mbox_chan *mbox_chan;
struct pcc_mbox_chan *pcc_chan;
struct mbox_client mbox_client;
int mbox_idx;
spinlock_t kfifo_lock;
struct mutex rd_mutex;
struct completion rd_complete;
int resp_pending;
struct slimpro_resp_msg sync_msg;
struct work_struct workq;
struct kfifo_rec_ptr_1 async_msg_fifo;
struct device *hwmon_dev;
bool temp_critical_alarm;
phys_addr_t comm_base_addr;
void *pcc_comm_addr;
u64 usecs_lat;
};
/*
* This function tests and clears a bitmask then returns its old value
*/
static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
{
u16 ret, val;
val = le16_to_cpu(READ_ONCE(*addr));
ret = val & mask;
val &= ~mask;
WRITE_ONCE(*addr, cpu_to_le16(val));
return ret;
}
static int xgene_hwmon_pcc_rd(struct xgene_hwmon_dev *ctx, u32 *msg)
{
struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
u32 *ptr = (void *)(generic_comm_base + 1);
int rc, i;
u16 val;
mutex_lock(&ctx->rd_mutex);
init_completion(&ctx->rd_complete);
ctx->resp_pending = true;
/* Write signature for subspace */
WRITE_ONCE(generic_comm_base->signature,
cpu_to_le32(PCC_SIGNATURE_MASK | ctx->mbox_idx));
/* Write to the shared command region */
WRITE_ONCE(generic_comm_base->command,
cpu_to_le16(MSG_TYPE(msg[0]) | PCCC_GENERATE_DB_INT));
/* Flip CMD COMPLETE bit */
val = le16_to_cpu(READ_ONCE(generic_comm_base->status));
val &= ~PCCS_CMD_COMPLETE;
WRITE_ONCE(generic_comm_base->status, cpu_to_le16(val));
/* Copy the message to the PCC comm space */
for (i = 0; i < sizeof(struct slimpro_resp_msg) / 4; i++)
WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
/* Ring the doorbell */
rc = mbox_send_message(ctx->mbox_chan, msg);
if (rc < 0) {
dev_err(ctx->dev, "Mailbox send error %d\n", rc);
goto err;
}
if (!wait_for_completion_timeout(&ctx->rd_complete,
usecs_to_jiffies(ctx->usecs_lat))) {
dev_err(ctx->dev, "Mailbox operation timed out\n");
rc = -ETIMEDOUT;
goto err;
}
/* Check for error message */
if (MSG_TYPE(ctx->sync_msg.msg) == MSG_TYPE_ERR) {
rc = -EINVAL;
goto err;
}
msg[0] = ctx->sync_msg.msg;
msg[1] = ctx->sync_msg.param1;
msg[2] = ctx->sync_msg.param2;
err:
mbox_chan_txdone(ctx->mbox_chan, 0);
ctx->resp_pending = false;
mutex_unlock(&ctx->rd_mutex);
return rc;
}
static int xgene_hwmon_rd(struct xgene_hwmon_dev *ctx, u32 *msg)
{
int rc;
mutex_lock(&ctx->rd_mutex);
init_completion(&ctx->rd_complete);
ctx->resp_pending = true;
rc = mbox_send_message(ctx->mbox_chan, msg);
if (rc < 0) {
dev_err(ctx->dev, "Mailbox send error %d\n", rc);
goto err;
}
if (!wait_for_completion_timeout(&ctx->rd_complete,
msecs_to_jiffies(MBOX_OP_TIMEOUTMS))) {
dev_err(ctx->dev, "Mailbox operation timed out\n");
rc = -ETIMEDOUT;
goto err;
}
/* Check for error message */
if (MSG_TYPE(ctx->sync_msg.msg) == MSG_TYPE_ERR) {
rc = -EINVAL;
goto err;
}
msg[0] = ctx->sync_msg.msg;
msg[1] = ctx->sync_msg.param1;
msg[2] = ctx->sync_msg.param2;
err:
ctx->resp_pending = false;
mutex_unlock(&ctx->rd_mutex);
return rc;
}
static int xgene_hwmon_reg_map_rd(struct xgene_hwmon_dev *ctx, u32 addr,
u32 *data)
{
u32 msg[3];
int rc;
msg[0] = SENSOR_RD_MSG;
msg[1] = SENSOR_RD_EN_ADDR(addr);
msg[2] = 0;
if (acpi_disabled)
rc = xgene_hwmon_rd(ctx, msg);
else
rc = xgene_hwmon_pcc_rd(ctx, msg);
if (rc < 0)
return rc;
/*
* Check if sensor data is valid.
*/
if (msg[1] & SENSOR_INVALID_DATA)
return -ENODATA;
*data = msg[1];
return rc;
}
static int xgene_hwmon_get_notification_msg(struct xgene_hwmon_dev *ctx,
u32 *amsg)
{
u32 msg[3];
int rc;
msg[0] = TPC_EN_MSG(PWRMGMT_SUBTYPE_TPC, TPC_GET_ALARM, 0);
msg[1] = 0;
msg[2] = 0;
rc = xgene_hwmon_pcc_rd(ctx, msg);
if (rc < 0)
return rc;
amsg[0] = msg[0];
amsg[1] = msg[1];
amsg[2] = msg[2];
return rc;
}
static int xgene_hwmon_get_cpu_pwr(struct xgene_hwmon_dev *ctx, u32 *val)
{
u32 watt, mwatt;
int rc;
rc = xgene_hwmon_reg_map_rd(ctx, PMD_PWR_REG, &watt);
if (rc < 0)
return rc;
rc = xgene_hwmon_reg_map_rd(ctx, PMD_PWR_MW_REG, &mwatt);
if (rc < 0)
return rc;
*val = WATT_TO_mWATT(watt) + mwatt;
return 0;
}
static int xgene_hwmon_get_io_pwr(struct xgene_hwmon_dev *ctx, u32 *val)
{
u32 watt, mwatt;
int rc;
rc = xgene_hwmon_reg_map_rd(ctx, SOC_PWR_REG, &watt);
if (rc < 0)
return rc;
rc = xgene_hwmon_reg_map_rd(ctx, SOC_PWR_MW_REG, &mwatt);
if (rc < 0)
return rc;
*val = WATT_TO_mWATT(watt) + mwatt;
return 0;
}
static int xgene_hwmon_get_temp(struct xgene_hwmon_dev *ctx, u32 *val)
{
return xgene_hwmon_reg_map_rd(ctx, SOC_TEMP_REG, val);
}
/*
* Sensor temperature/power functions
*/
static ssize_t temp1_input_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
int rc, temp;
u32 val;
rc = xgene_hwmon_get_temp(ctx, &val);
if (rc < 0)
return rc;
temp = sign_extend32(val, TEMP_NEGATIVE_BIT);
return sysfs_emit(buf, "%d\n", CELSIUS_TO_mCELSIUS(temp));
}
static ssize_t temp1_label_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return sysfs_emit(buf, "SoC Temperature\n");
}
static ssize_t temp1_critical_alarm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
return sysfs_emit(buf, "%d\n", ctx->temp_critical_alarm);
}
static ssize_t power1_label_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return sysfs_emit(buf, "CPU power\n");
}
static ssize_t power2_label_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return sysfs_emit(buf, "IO power\n");
}
static ssize_t power1_input_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
u32 val;
int rc;
rc = xgene_hwmon_get_cpu_pwr(ctx, &val);
if (rc < 0)
return rc;
return sysfs_emit(buf, "%u\n", mWATT_TO_uWATT(val));
}
static ssize_t power2_input_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
u32 val;
int rc;
rc = xgene_hwmon_get_io_pwr(ctx, &val);
if (rc < 0)
return rc;
return sysfs_emit(buf, "%u\n", mWATT_TO_uWATT(val));
}
static DEVICE_ATTR_RO(temp1_label);
static DEVICE_ATTR_RO(temp1_input);
static DEVICE_ATTR_RO(temp1_critical_alarm);
static DEVICE_ATTR_RO(power1_label);
static DEVICE_ATTR_RO(power1_input);
static DEVICE_ATTR_RO(power2_label);
static DEVICE_ATTR_RO(power2_input);
static struct attribute *xgene_hwmon_attrs[] = {
&dev_attr_temp1_label.attr,
&dev_attr_temp1_input.attr,
&dev_attr_temp1_critical_alarm.attr,
&dev_attr_power1_label.attr,
&dev_attr_power1_input.attr,
&dev_attr_power2_label.attr,
&dev_attr_power2_input.attr,
NULL,
};
ATTRIBUTE_GROUPS(xgene_hwmon);
static int xgene_hwmon_tpc_alarm(struct xgene_hwmon_dev *ctx,
struct slimpro_resp_msg *amsg)
{
ctx->temp_critical_alarm = !!amsg->param2;
sysfs_notify(&ctx->dev->kobj, NULL, "temp1_critical_alarm");
return 0;
}
static void xgene_hwmon_process_pwrmsg(struct xgene_hwmon_dev *ctx,
struct slimpro_resp_msg *amsg)
{
if ((MSG_SUBTYPE(amsg->msg) == PWRMGMT_SUBTYPE_TPC) &&
(TPC_CMD(amsg->msg) == TPC_ALARM))
xgene_hwmon_tpc_alarm(ctx, amsg);
}
/*
* This function is called to process async work queue
*/
static void xgene_hwmon_evt_work(struct work_struct *work)
{
struct slimpro_resp_msg amsg;
struct xgene_hwmon_dev *ctx;
int ret;
ctx = container_of(work, struct xgene_hwmon_dev, workq);
while (kfifo_out_spinlocked(&ctx->async_msg_fifo, &amsg,
sizeof(struct slimpro_resp_msg),
&ctx->kfifo_lock)) {
/*
* If PCC, send a consumer command to Platform to get info
* If Slimpro Mailbox, get message from specific FIFO
*/
if (!acpi_disabled) {
ret = xgene_hwmon_get_notification_msg(ctx,
(u32 *)&amsg);
if (ret < 0)
continue;
}
if (MSG_TYPE(amsg.msg) == MSG_TYPE_PWRMGMT)
xgene_hwmon_process_pwrmsg(ctx, &amsg);
}
}
static int xgene_hwmon_rx_ready(struct xgene_hwmon_dev *ctx, void *msg)
{
if (IS_ERR_OR_NULL(ctx->hwmon_dev) && !ctx->resp_pending) {
/* Enqueue to the FIFO */
kfifo_in_spinlocked(&ctx->async_msg_fifo, msg,
sizeof(struct slimpro_resp_msg),
&ctx->kfifo_lock);
return -ENODEV;
}
return 0;
}
/*
* This function is called when the SLIMpro Mailbox received a message
*/
static void xgene_hwmon_rx_cb(struct mbox_client *cl, void *msg)
{
struct xgene_hwmon_dev *ctx = to_xgene_hwmon_dev(cl);
/*
* While the driver registers with the mailbox framework, an interrupt
* can be pending before the probe function completes its
* initialization. If such condition occurs, just queue up the message
* as the driver is not ready for servicing the callback.
*/
if (xgene_hwmon_rx_ready(ctx, msg) < 0)
return;
/*
* Response message format:
* msg[0] is the return code of the operation
* msg[1] is the first parameter word
* msg[2] is the second parameter word
*
* As message only supports dword size, just assign it.
*/
/* Check for sync query */
if (ctx->resp_pending &&
((MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_ERR) ||
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_DBG &&
MSG_SUBTYPE(((u32 *)msg)[0]) == DBG_SUBTYPE_SENSOR_READ) ||
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_PWRMGMT &&
MSG_SUBTYPE(((u32 *)msg)[0]) == PWRMGMT_SUBTYPE_TPC &&
TPC_CMD(((u32 *)msg)[0]) == TPC_ALARM))) {
ctx->sync_msg.msg = ((u32 *)msg)[0];
ctx->sync_msg.param1 = ((u32 *)msg)[1];
ctx->sync_msg.param2 = ((u32 *)msg)[2];
/* Operation waiting for response */
complete(&ctx->rd_complete);
return;
}
/* Enqueue to the FIFO */
kfifo_in_spinlocked(&ctx->async_msg_fifo, msg,
sizeof(struct slimpro_resp_msg), &ctx->kfifo_lock);
/* Schedule the bottom handler */
schedule_work(&ctx->workq);
}
/*
* This function is called when the PCC Mailbox received a message
*/
static void xgene_hwmon_pcc_rx_cb(struct mbox_client *cl, void *msg)
{
struct xgene_hwmon_dev *ctx = to_xgene_hwmon_dev(cl);
struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
struct slimpro_resp_msg amsg;
/*
* While the driver registers with the mailbox framework, an interrupt
* can be pending before the probe function completes its
* initialization. If such condition occurs, just queue up the message
* as the driver is not ready for servicing the callback.
*/
if (xgene_hwmon_rx_ready(ctx, &amsg) < 0)
return;
msg = generic_comm_base + 1;
/* Check if platform sends interrupt */
if (!xgene_word_tst_and_clr(&generic_comm_base->status,
PCCS_SCI_DOORBEL))
return;
/*
* Response message format:
* msg[0] is the return code of the operation
* msg[1] is the first parameter word
* msg[2] is the second parameter word
*
* As message only supports dword size, just assign it.
*/
/* Check for sync query */
if (ctx->resp_pending &&
((MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_ERR) ||
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_DBG &&
MSG_SUBTYPE(((u32 *)msg)[0]) == DBG_SUBTYPE_SENSOR_READ) ||
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_PWRMGMT &&
MSG_SUBTYPE(((u32 *)msg)[0]) == PWRMGMT_SUBTYPE_TPC &&
TPC_CMD(((u32 *)msg)[0]) == TPC_ALARM))) {
/* Check if platform completes command */
if (xgene_word_tst_and_clr(&generic_comm_base->status,
PCCS_CMD_COMPLETE)) {
ctx->sync_msg.msg = ((u32 *)msg)[0];
ctx->sync_msg.param1 = ((u32 *)msg)[1];
ctx->sync_msg.param2 = ((u32 *)msg)[2];
/* Operation waiting for response */
complete(&ctx->rd_complete);
return;
}
}
/*
* Platform notifies interrupt to OSPM.
* OPSM schedules a consumer command to get this information
* in a workqueue. Platform must wait until OSPM has issued
* a consumer command that serves this notification.
*/
/* Enqueue to the FIFO */
kfifo_in_spinlocked(&ctx->async_msg_fifo, &amsg,
sizeof(struct slimpro_resp_msg), &ctx->kfifo_lock);
/* Schedule the bottom handler */
schedule_work(&ctx->workq);
}
static void xgene_hwmon_tx_done(struct mbox_client *cl, void *msg, int ret)
{
if (ret) {
dev_dbg(cl->dev, "TX did not complete: CMD sent:%x, ret:%d\n",
*(u16 *)msg, ret);
} else {
dev_dbg(cl->dev, "TX completed. CMD sent:%x, ret:%d\n",
*(u16 *)msg, ret);
}
}
#ifdef CONFIG_ACPI
static const struct acpi_device_id xgene_hwmon_acpi_match[] = {
{"APMC0D29", XGENE_HWMON_V1},
{"APMC0D8A", XGENE_HWMON_V2},
{},
};
MODULE_DEVICE_TABLE(acpi, xgene_hwmon_acpi_match);
#endif
static int xgene_hwmon_probe(struct platform_device *pdev)
{
struct xgene_hwmon_dev *ctx;
struct mbox_client *cl;
int rc;
ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
if (!ctx)
return -ENOMEM;
ctx->dev = &pdev->dev;
platform_set_drvdata(pdev, ctx);
cl = &ctx->mbox_client;
spin_lock_init(&ctx->kfifo_lock);
mutex_init(&ctx->rd_mutex);
rc = kfifo_alloc(&ctx->async_msg_fifo,
sizeof(struct slimpro_resp_msg) * ASYNC_MSG_FIFO_SIZE,
GFP_KERNEL);
if (rc)
return -ENOMEM;
INIT_WORK(&ctx->workq, xgene_hwmon_evt_work);
/* Request mailbox channel */
cl->dev = &pdev->dev;
cl->tx_done = xgene_hwmon_tx_done;
cl->tx_block = false;
cl->tx_tout = MBOX_OP_TIMEOUTMS;
cl->knows_txdone = false;
if (acpi_disabled) {
cl->rx_callback = xgene_hwmon_rx_cb;
ctx->mbox_chan = mbox_request_channel(cl, 0);
if (IS_ERR(ctx->mbox_chan)) {
dev_err(&pdev->dev,
"SLIMpro mailbox channel request failed\n");
rc = -ENODEV;
goto out_mbox_free;
}
} else {
struct pcc_mbox_chan *pcc_chan;
const struct acpi_device_id *acpi_id;
int version;
acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table,
&pdev->dev);
if (!acpi_id) {
rc = -EINVAL;
goto out_mbox_free;
}
version = (int)acpi_id->driver_data;
if (device_property_read_u32(&pdev->dev, "pcc-channel",
&ctx->mbox_idx)) {
dev_err(&pdev->dev, "no pcc-channel property\n");
rc = -ENODEV;
goto out_mbox_free;
}
cl->rx_callback = xgene_hwmon_pcc_rx_cb;
pcc_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
if (IS_ERR(pcc_chan)) {
dev_err(&pdev->dev,
"PPC channel request failed\n");
rc = -ENODEV;
goto out_mbox_free;
}
ctx->pcc_chan = pcc_chan;
ctx->mbox_chan = pcc_chan->mchan;
if (!ctx->mbox_chan->mbox->txdone_irq) {
dev_err(&pdev->dev, "PCC IRQ not supported\n");
rc = -ENODEV;
goto out;
}
/*
* This is the shared communication region
* for the OS and Platform to communicate over.
*/
ctx->comm_base_addr = pcc_chan->shmem_base_addr;
if (ctx->comm_base_addr) {
if (version == XGENE_HWMON_V2)
ctx->pcc_comm_addr = (void __force *)devm_ioremap(&pdev->dev,
ctx->comm_base_addr,
pcc_chan->shmem_size);
else
ctx->pcc_comm_addr = devm_memremap(&pdev->dev,
ctx->comm_base_addr,
pcc_chan->shmem_size,
MEMREMAP_WB);
} else {
dev_err(&pdev->dev, "Failed to get PCC comm region\n");
rc = -ENODEV;
goto out;
}
if (!ctx->pcc_comm_addr) {
dev_err(&pdev->dev,
"Failed to ioremap PCC comm region\n");
rc = -ENOMEM;
goto out;
}
/*
* pcc_chan->latency is just a Nominal value. In reality
* the remote processor could be much slower to reply.
* So add an arbitrary amount of wait on top of Nominal.
*/
ctx->usecs_lat = PCC_NUM_RETRIES * pcc_chan->latency;
}
ctx->hwmon_dev = hwmon_device_register_with_groups(ctx->dev,
"apm_xgene",
ctx,
xgene_hwmon_groups);
if (IS_ERR(ctx->hwmon_dev)) {
dev_err(&pdev->dev, "Failed to register HW monitor device\n");
rc = PTR_ERR(ctx->hwmon_dev);
goto out;
}
/*
* Schedule the bottom handler if there is a pending message.
*/
schedule_work(&ctx->workq);
dev_info(&pdev->dev, "APM X-Gene SoC HW monitor driver registered\n");
return 0;
out:
if (acpi_disabled)
mbox_free_channel(ctx->mbox_chan);
else
pcc_mbox_free_channel(ctx->pcc_chan);
out_mbox_free:
kfifo_free(&ctx->async_msg_fifo);
return rc;
}
static int xgene_hwmon_remove(struct platform_device *pdev)
{
struct xgene_hwmon_dev *ctx = platform_get_drvdata(pdev);
cancel_work_sync(&ctx->workq);
hwmon_device_unregister(ctx->hwmon_dev);
kfifo_free(&ctx->async_msg_fifo);
if (acpi_disabled)
mbox_free_channel(ctx->mbox_chan);
else
pcc_mbox_free_channel(ctx->pcc_chan);
return 0;
}
static const struct of_device_id xgene_hwmon_of_match[] = {
{.compatible = "apm,xgene-slimpro-hwmon"},
{}
};
MODULE_DEVICE_TABLE(of, xgene_hwmon_of_match);
static struct platform_driver xgene_hwmon_driver = {
.probe = xgene_hwmon_probe,
.remove = xgene_hwmon_remove,
.driver = {
.name = "xgene-slimpro-hwmon",
.of_match_table = xgene_hwmon_of_match,
.acpi_match_table = ACPI_PTR(xgene_hwmon_acpi_match),
},
};
module_platform_driver(xgene_hwmon_driver);
MODULE_DESCRIPTION("APM X-Gene SoC hardware monitor");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/xgene-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm85.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (c) 1998, 1999 Frodo Looijaard <[email protected]>
* Copyright (c) 2002, 2003 Philip Pokorny <[email protected]>
* Copyright (c) 2003 Margit Schubert-While <[email protected]>
* Copyright (c) 2004 Justin Thiessen <[email protected]>
* Copyright (C) 2007--2014 Jean Delvare <[email protected]>
*
* Chip details at <http://www.national.com/ds/LM/LM85.pdf>
*/
#include <linux/module.h>
#include <linux/of.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-vid.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/util_macros.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
enum chips {
lm85, lm96000,
adm1027, adt7463, adt7468,
emc6d100, emc6d102, emc6d103, emc6d103s
};
/* The LM85 registers */
#define LM85_REG_IN(nr) (0x20 + (nr))
#define LM85_REG_IN_MIN(nr) (0x44 + (nr) * 2)
#define LM85_REG_IN_MAX(nr) (0x45 + (nr) * 2)
#define LM85_REG_TEMP(nr) (0x25 + (nr))
#define LM85_REG_TEMP_MIN(nr) (0x4e + (nr) * 2)
#define LM85_REG_TEMP_MAX(nr) (0x4f + (nr) * 2)
/* Fan speeds are LSB, MSB (2 bytes) */
#define LM85_REG_FAN(nr) (0x28 + (nr) * 2)
#define LM85_REG_FAN_MIN(nr) (0x54 + (nr) * 2)
#define LM85_REG_PWM(nr) (0x30 + (nr))
#define LM85_REG_COMPANY 0x3e
#define LM85_REG_VERSTEP 0x3f
#define ADT7468_REG_CFG5 0x7c
#define ADT7468_OFF64 (1 << 0)
#define ADT7468_HFPWM (1 << 1)
#define IS_ADT7468_OFF64(data) \
((data)->type == adt7468 && !((data)->cfg5 & ADT7468_OFF64))
#define IS_ADT7468_HFPWM(data) \
((data)->type == adt7468 && !((data)->cfg5 & ADT7468_HFPWM))
/* These are the recognized values for the above regs */
#define LM85_COMPANY_NATIONAL 0x01
#define LM85_COMPANY_ANALOG_DEV 0x41
#define LM85_COMPANY_SMSC 0x5c
#define LM85_VERSTEP_LM85C 0x60
#define LM85_VERSTEP_LM85B 0x62
#define LM85_VERSTEP_LM96000_1 0x68
#define LM85_VERSTEP_LM96000_2 0x69
#define LM85_VERSTEP_ADM1027 0x60
#define LM85_VERSTEP_ADT7463 0x62
#define LM85_VERSTEP_ADT7463C 0x6A
#define LM85_VERSTEP_ADT7468_1 0x71
#define LM85_VERSTEP_ADT7468_2 0x72
#define LM85_VERSTEP_EMC6D100_A0 0x60
#define LM85_VERSTEP_EMC6D100_A1 0x61
#define LM85_VERSTEP_EMC6D102 0x65
#define LM85_VERSTEP_EMC6D103_A0 0x68
#define LM85_VERSTEP_EMC6D103_A1 0x69
#define LM85_VERSTEP_EMC6D103S 0x6A /* Also known as EMC6D103:A2 */
#define LM85_REG_CONFIG 0x40
#define LM85_REG_ALARM1 0x41
#define LM85_REG_ALARM2 0x42
#define LM85_REG_VID 0x43
/* Automated FAN control */
#define LM85_REG_AFAN_CONFIG(nr) (0x5c + (nr))
#define LM85_REG_AFAN_RANGE(nr) (0x5f + (nr))
#define LM85_REG_AFAN_SPIKE1 0x62
#define LM85_REG_AFAN_MINPWM(nr) (0x64 + (nr))
#define LM85_REG_AFAN_LIMIT(nr) (0x67 + (nr))
#define LM85_REG_AFAN_CRITICAL(nr) (0x6a + (nr))
#define LM85_REG_AFAN_HYST1 0x6d
#define LM85_REG_AFAN_HYST2 0x6e
#define ADM1027_REG_EXTEND_ADC1 0x76
#define ADM1027_REG_EXTEND_ADC2 0x77
#define EMC6D100_REG_ALARM3 0x7d
/* IN5, IN6 and IN7 */
#define EMC6D100_REG_IN(nr) (0x70 + ((nr) - 5))
#define EMC6D100_REG_IN_MIN(nr) (0x73 + ((nr) - 5) * 2)
#define EMC6D100_REG_IN_MAX(nr) (0x74 + ((nr) - 5) * 2)
#define EMC6D102_REG_EXTEND_ADC1 0x85
#define EMC6D102_REG_EXTEND_ADC2 0x86
#define EMC6D102_REG_EXTEND_ADC3 0x87
#define EMC6D102_REG_EXTEND_ADC4 0x88
/*
* Conversions. Rounding and limit checking is only done on the TO_REG
* variants. Note that you should be a bit careful with which arguments
* these macros are called: arguments may be evaluated more than once.
*/
/* IN are scaled according to built-in resistors */
static const int lm85_scaling[] = { /* .001 Volts */
2500, 2250, 3300, 5000, 12000,
3300, 1500, 1800 /*EMC6D100*/
};
#define SCALE(val, from, to) (((val) * (to) + ((from) / 2)) / (from))
#define INS_TO_REG(n, val) \
SCALE(clamp_val(val, 0, 255 * lm85_scaling[n] / 192), \
lm85_scaling[n], 192)
#define INSEXT_FROM_REG(n, val, ext) \
SCALE(((val) << 4) + (ext), 192 << 4, lm85_scaling[n])
#define INS_FROM_REG(n, val) SCALE((val), 192, lm85_scaling[n])
/* FAN speed is measured using 90kHz clock */
static inline u16 FAN_TO_REG(unsigned long val)
{
if (!val)
return 0xffff;
return clamp_val(5400000 / val, 1, 0xfffe);
}
#define FAN_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
5400000 / (val))
/* Temperature is reported in .001 degC increments */
#define TEMP_TO_REG(val) \
DIV_ROUND_CLOSEST(clamp_val((val), -127000, 127000), 1000)
#define TEMPEXT_FROM_REG(val, ext) \
SCALE(((val) << 4) + (ext), 16, 1000)
#define TEMP_FROM_REG(val) ((val) * 1000)
#define PWM_TO_REG(val) clamp_val(val, 0, 255)
#define PWM_FROM_REG(val) (val)
/*
* ZONEs have the following parameters:
* Limit (low) temp, 1. degC
* Hysteresis (below limit), 1. degC (0-15)
* Range of speed control, .1 degC (2-80)
* Critical (high) temp, 1. degC
*
* FAN PWMs have the following parameters:
* Reference Zone, 1, 2, 3, etc.
* Spinup time, .05 sec
* PWM value at limit/low temp, 1 count
* PWM Frequency, 1. Hz
* PWM is Min or OFF below limit, flag
* Invert PWM output, flag
*
* Some chips filter the temp, others the fan.
* Filter constant (or disabled) .1 seconds
*/
/* These are the zone temperature range encodings in .001 degree C */
static const int lm85_range_map[] = {
2000, 2500, 3300, 4000, 5000, 6600, 8000, 10000,
13300, 16000, 20000, 26600, 32000, 40000, 53300, 80000
};
static int RANGE_TO_REG(long range)
{
return find_closest(range, lm85_range_map, ARRAY_SIZE(lm85_range_map));
}
#define RANGE_FROM_REG(val) lm85_range_map[(val) & 0x0f]
/* These are the PWM frequency encodings */
static const int lm85_freq_map[] = { /* 1 Hz */
10, 15, 23, 30, 38, 47, 61, 94
};
static const int lm96000_freq_map[] = { /* 1 Hz */
10, 15, 23, 30, 38, 47, 61, 94,
22500, 24000, 25700, 25700, 27700, 27700, 30000, 30000
};
static const int adm1027_freq_map[] = { /* 1 Hz */
11, 15, 22, 29, 35, 44, 59, 88
};
static int FREQ_TO_REG(const int *map,
unsigned int map_size, unsigned long freq)
{
return find_closest(freq, map, map_size);
}
static int FREQ_FROM_REG(const int *map, unsigned int map_size, u8 reg)
{
return map[reg % map_size];
}
/*
* Since we can't use strings, I'm abusing these numbers
* to stand in for the following meanings:
* 1 -- PWM responds to Zone 1
* 2 -- PWM responds to Zone 2
* 3 -- PWM responds to Zone 3
* 23 -- PWM responds to the higher temp of Zone 2 or 3
* 123 -- PWM responds to highest of Zone 1, 2, or 3
* 0 -- PWM is always at 0% (ie, off)
* -1 -- PWM is always at 100%
* -2 -- PWM responds to manual control
*/
static const int lm85_zone_map[] = { 1, 2, 3, -1, 0, 23, 123, -2 };
#define ZONE_FROM_REG(val) lm85_zone_map[(val) >> 5]
static int ZONE_TO_REG(int zone)
{
int i;
for (i = 0; i <= 7; ++i)
if (zone == lm85_zone_map[i])
break;
if (i > 7) /* Not found. */
i = 3; /* Always 100% */
return i << 5;
}
#define HYST_TO_REG(val) clamp_val(((val) + 500) / 1000, 0, 15)
#define HYST_FROM_REG(val) ((val) * 1000)
/*
* Chip sampling rates
*
* Some sensors are not updated more frequently than once per second
* so it doesn't make sense to read them more often than that.
* We cache the results and return the saved data if the driver
* is called again before a second has elapsed.
*
* Also, there is significant configuration data for this chip
* given the automatic PWM fan control that is possible. There
* are about 47 bytes of config data to only 22 bytes of actual
* readings. So, we keep the config data up to date in the cache
* when it is written and only sample it once every 1 *minute*
*/
#define LM85_DATA_INTERVAL (HZ + HZ / 2)
#define LM85_CONFIG_INTERVAL (1 * 60 * HZ)
/*
* LM85 can automatically adjust fan speeds based on temperature
* This structure encapsulates an entire Zone config. There are
* three zones (one for each temperature input) on the lm85
*/
struct lm85_zone {
s8 limit; /* Low temp limit */
u8 hyst; /* Low limit hysteresis. (0-15) */
u8 range; /* Temp range, encoded */
s8 critical; /* "All fans ON" temp limit */
u8 max_desired; /*
* Actual "max" temperature specified. Preserved
* to prevent "drift" as other autofan control
* values change.
*/
};
struct lm85_autofan {
u8 config; /* Register value */
u8 min_pwm; /* Minimum PWM value, encoded */
u8 min_off; /* Min PWM or OFF below "limit", flag */
};
/*
* For each registered chip, we need to keep some data in memory.
* The structure is dynamically allocated.
*/
struct lm85_data {
struct i2c_client *client;
const struct attribute_group *groups[6];
const int *freq_map;
unsigned int freq_map_size;
enum chips type;
bool has_vid5; /* true if VID5 is configured for ADT7463 or ADT7468 */
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_reading; /* In jiffies */
unsigned long last_config; /* In jiffies */
u8 in[8]; /* Register value */
u8 in_max[8]; /* Register value */
u8 in_min[8]; /* Register value */
s8 temp[3]; /* Register value */
s8 temp_min[3]; /* Register value */
s8 temp_max[3]; /* Register value */
u16 fan[4]; /* Register value */
u16 fan_min[4]; /* Register value */
u8 pwm[3]; /* Register value */
u8 pwm_freq[3]; /* Register encoding */
u8 temp_ext[3]; /* Decoded values */
u8 in_ext[8]; /* Decoded values */
u8 vid; /* Register value */
u8 vrm; /* VRM version */
u32 alarms; /* Register encoding, combined */
u8 cfg5; /* Config Register 5 on ADT7468 */
struct lm85_autofan autofan[3];
struct lm85_zone zone[3];
};
static int lm85_read_value(struct i2c_client *client, u8 reg)
{
int res;
/* What size location is it? */
switch (reg) {
case LM85_REG_FAN(0): /* Read WORD data */
case LM85_REG_FAN(1):
case LM85_REG_FAN(2):
case LM85_REG_FAN(3):
case LM85_REG_FAN_MIN(0):
case LM85_REG_FAN_MIN(1):
case LM85_REG_FAN_MIN(2):
case LM85_REG_FAN_MIN(3):
case LM85_REG_ALARM1: /* Read both bytes at once */
res = i2c_smbus_read_byte_data(client, reg) & 0xff;
res |= i2c_smbus_read_byte_data(client, reg + 1) << 8;
break;
default: /* Read BYTE data */
res = i2c_smbus_read_byte_data(client, reg);
break;
}
return res;
}
static void lm85_write_value(struct i2c_client *client, u8 reg, int value)
{
switch (reg) {
case LM85_REG_FAN(0): /* Write WORD data */
case LM85_REG_FAN(1):
case LM85_REG_FAN(2):
case LM85_REG_FAN(3):
case LM85_REG_FAN_MIN(0):
case LM85_REG_FAN_MIN(1):
case LM85_REG_FAN_MIN(2):
case LM85_REG_FAN_MIN(3):
/* NOTE: ALARM is read only, so not included here */
i2c_smbus_write_byte_data(client, reg, value & 0xff);
i2c_smbus_write_byte_data(client, reg + 1, value >> 8);
break;
default: /* Write BYTE data */
i2c_smbus_write_byte_data(client, reg, value);
break;
}
}
static struct lm85_data *lm85_update_device(struct device *dev)
{
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i;
mutex_lock(&data->update_lock);
if (!data->valid ||
time_after(jiffies, data->last_reading + LM85_DATA_INTERVAL)) {
/* Things that change quickly */
dev_dbg(&client->dev, "Reading sensor values\n");
/*
* Have to read extended bits first to "freeze" the
* more significant bits that are read later.
* There are 2 additional resolution bits per channel and we
* have room for 4, so we shift them to the left.
*/
if (data->type == adm1027 || data->type == adt7463 ||
data->type == adt7468) {
int ext1 = lm85_read_value(client,
ADM1027_REG_EXTEND_ADC1);
int ext2 = lm85_read_value(client,
ADM1027_REG_EXTEND_ADC2);
int val = (ext1 << 8) + ext2;
for (i = 0; i <= 4; i++)
data->in_ext[i] =
((val >> (i * 2)) & 0x03) << 2;
for (i = 0; i <= 2; i++)
data->temp_ext[i] =
(val >> ((i + 4) * 2)) & 0x0c;
}
data->vid = lm85_read_value(client, LM85_REG_VID);
for (i = 0; i <= 3; ++i) {
data->in[i] =
lm85_read_value(client, LM85_REG_IN(i));
data->fan[i] =
lm85_read_value(client, LM85_REG_FAN(i));
}
if (!data->has_vid5)
data->in[4] = lm85_read_value(client, LM85_REG_IN(4));
if (data->type == adt7468)
data->cfg5 = lm85_read_value(client, ADT7468_REG_CFG5);
for (i = 0; i <= 2; ++i) {
data->temp[i] =
lm85_read_value(client, LM85_REG_TEMP(i));
data->pwm[i] =
lm85_read_value(client, LM85_REG_PWM(i));
if (IS_ADT7468_OFF64(data))
data->temp[i] -= 64;
}
data->alarms = lm85_read_value(client, LM85_REG_ALARM1);
if (data->type == emc6d100) {
/* Three more voltage sensors */
for (i = 5; i <= 7; ++i) {
data->in[i] = lm85_read_value(client,
EMC6D100_REG_IN(i));
}
/* More alarm bits */
data->alarms |= lm85_read_value(client,
EMC6D100_REG_ALARM3) << 16;
} else if (data->type == emc6d102 || data->type == emc6d103 ||
data->type == emc6d103s) {
/*
* Have to read LSB bits after the MSB ones because
* the reading of the MSB bits has frozen the
* LSBs (backward from the ADM1027).
*/
int ext1 = lm85_read_value(client,
EMC6D102_REG_EXTEND_ADC1);
int ext2 = lm85_read_value(client,
EMC6D102_REG_EXTEND_ADC2);
int ext3 = lm85_read_value(client,
EMC6D102_REG_EXTEND_ADC3);
int ext4 = lm85_read_value(client,
EMC6D102_REG_EXTEND_ADC4);
data->in_ext[0] = ext3 & 0x0f;
data->in_ext[1] = ext4 & 0x0f;
data->in_ext[2] = ext4 >> 4;
data->in_ext[3] = ext3 >> 4;
data->in_ext[4] = ext2 >> 4;
data->temp_ext[0] = ext1 & 0x0f;
data->temp_ext[1] = ext2 & 0x0f;
data->temp_ext[2] = ext1 >> 4;
}
data->last_reading = jiffies;
} /* last_reading */
if (!data->valid ||
time_after(jiffies, data->last_config + LM85_CONFIG_INTERVAL)) {
/* Things that don't change often */
dev_dbg(&client->dev, "Reading config values\n");
for (i = 0; i <= 3; ++i) {
data->in_min[i] =
lm85_read_value(client, LM85_REG_IN_MIN(i));
data->in_max[i] =
lm85_read_value(client, LM85_REG_IN_MAX(i));
data->fan_min[i] =
lm85_read_value(client, LM85_REG_FAN_MIN(i));
}
if (!data->has_vid5) {
data->in_min[4] = lm85_read_value(client,
LM85_REG_IN_MIN(4));
data->in_max[4] = lm85_read_value(client,
LM85_REG_IN_MAX(4));
}
if (data->type == emc6d100) {
for (i = 5; i <= 7; ++i) {
data->in_min[i] = lm85_read_value(client,
EMC6D100_REG_IN_MIN(i));
data->in_max[i] = lm85_read_value(client,
EMC6D100_REG_IN_MAX(i));
}
}
for (i = 0; i <= 2; ++i) {
int val;
data->temp_min[i] =
lm85_read_value(client, LM85_REG_TEMP_MIN(i));
data->temp_max[i] =
lm85_read_value(client, LM85_REG_TEMP_MAX(i));
data->autofan[i].config =
lm85_read_value(client, LM85_REG_AFAN_CONFIG(i));
val = lm85_read_value(client, LM85_REG_AFAN_RANGE(i));
data->pwm_freq[i] = val % data->freq_map_size;
data->zone[i].range = val >> 4;
data->autofan[i].min_pwm =
lm85_read_value(client, LM85_REG_AFAN_MINPWM(i));
data->zone[i].limit =
lm85_read_value(client, LM85_REG_AFAN_LIMIT(i));
data->zone[i].critical =
lm85_read_value(client, LM85_REG_AFAN_CRITICAL(i));
if (IS_ADT7468_OFF64(data)) {
data->temp_min[i] -= 64;
data->temp_max[i] -= 64;
data->zone[i].limit -= 64;
data->zone[i].critical -= 64;
}
}
if (data->type != emc6d103s) {
i = lm85_read_value(client, LM85_REG_AFAN_SPIKE1);
data->autofan[0].min_off = (i & 0x20) != 0;
data->autofan[1].min_off = (i & 0x40) != 0;
data->autofan[2].min_off = (i & 0x80) != 0;
i = lm85_read_value(client, LM85_REG_AFAN_HYST1);
data->zone[0].hyst = i >> 4;
data->zone[1].hyst = i & 0x0f;
i = lm85_read_value(client, LM85_REG_AFAN_HYST2);
data->zone[2].hyst = i >> 4;
}
data->last_config = jiffies;
} /* last_config */
data->valid = true;
mutex_unlock(&data->update_lock);
return data;
}
/* 4 Fans */
static ssize_t fan_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr]));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr]));
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val);
lm85_write_value(client, LM85_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan, 2);
static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
static SENSOR_DEVICE_ATTR_RO(fan4_input, fan, 3);
static SENSOR_DEVICE_ATTR_RW(fan4_min, fan_min, 3);
/* vid, vrm, alarms */
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm85_data *data = lm85_update_device(dev);
int vid;
if (data->has_vid5) {
/* 6-pin VID (VRM 10) */
vid = vid_from_reg(data->vid & 0x3f, data->vrm);
} else {
/* 5-pin VID (VRM 9) */
vid = vid_from_reg(data->vid & 0x1f, data->vrm);
}
return sprintf(buf, "%d\n", vid);
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm85_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%ld\n", (long) data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm85_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%u\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%u\n", (data->alarms >> nr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 18);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 16);
static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 17);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(temp1_fault, alarm, 14);
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 15);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 10);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 12);
static SENSOR_DEVICE_ATTR_RO(fan4_alarm, alarm, 13);
/* pwm */
static ssize_t pwm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", PWM_FROM_REG(data->pwm[nr]));
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm[nr] = PWM_TO_REG(val);
lm85_write_value(client, LM85_REG_PWM(nr), data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
int pwm_zone, enable;
pwm_zone = ZONE_FROM_REG(data->autofan[nr].config);
switch (pwm_zone) {
case -1: /* PWM is always at 100% */
enable = 0;
break;
case 0: /* PWM is always at 0% */
case -2: /* PWM responds to manual control */
enable = 1;
break;
default: /* PWM in automatic mode */
enable = 2;
}
return sprintf(buf, "%d\n", enable);
}
static ssize_t pwm_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 config;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
switch (val) {
case 0:
config = 3;
break;
case 1:
config = 7;
break;
case 2:
/*
* Here we have to choose arbitrarily one of the 5 possible
* configurations; I go for the safest
*/
config = 6;
break;
default:
return -EINVAL;
}
mutex_lock(&data->update_lock);
data->autofan[nr].config = lm85_read_value(client,
LM85_REG_AFAN_CONFIG(nr));
data->autofan[nr].config = (data->autofan[nr].config & ~0xe0)
| (config << 5);
lm85_write_value(client, LM85_REG_AFAN_CONFIG(nr),
data->autofan[nr].config);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm_freq_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
int freq;
if (IS_ADT7468_HFPWM(data))
freq = 22500;
else
freq = FREQ_FROM_REG(data->freq_map, data->freq_map_size,
data->pwm_freq[nr]);
return sprintf(buf, "%d\n", freq);
}
static ssize_t pwm_freq_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/*
* The ADT7468 has a special high-frequency PWM output mode,
* where all PWM outputs are driven by a 22.5 kHz clock.
* This might confuse the user, but there's not much we can do.
*/
if (data->type == adt7468 && val >= 11300) { /* High freq. mode */
data->cfg5 &= ~ADT7468_HFPWM;
lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5);
} else { /* Low freq. mode */
data->pwm_freq[nr] = FREQ_TO_REG(data->freq_map,
data->freq_map_size, val);
lm85_write_value(client, LM85_REG_AFAN_RANGE(nr),
(data->zone[nr].range << 4)
| data->pwm_freq[nr]);
if (data->type == adt7468) {
data->cfg5 |= ADT7468_HFPWM;
lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5);
}
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_freq, pwm_freq, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
static SENSOR_DEVICE_ATTR_RW(pwm2_freq, pwm_freq, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
static SENSOR_DEVICE_ATTR_RW(pwm3_freq, pwm_freq, 2);
/* Voltages */
static ssize_t in_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", INSEXT_FROM_REG(nr, data->in[nr],
data->in_ext[nr]));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(nr, data->in_min[nr]));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = INS_TO_REG(nr, val);
lm85_write_value(client, LM85_REG_IN_MIN(nr), data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(nr, data->in_max[nr]));
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = INS_TO_REG(nr, val);
lm85_write_value(client, LM85_REG_IN_MAX(nr), data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, in, 5);
static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, in, 6);
static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, in, 7);
static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
/* Temps */
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", TEMPEXT_FROM_REG(data->temp[nr],
data->temp_ext[nr]));
}
static ssize_t temp_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_min[nr]));
}
static ssize_t temp_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
if (IS_ADT7468_OFF64(data))
val += 64;
mutex_lock(&data->update_lock);
data->temp_min[nr] = TEMP_TO_REG(val);
lm85_write_value(client, LM85_REG_TEMP_MIN(nr), data->temp_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[nr]));
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
if (IS_ADT7468_OFF64(data))
val += 64;
mutex_lock(&data->update_lock);
data->temp_max[nr] = TEMP_TO_REG(val);
lm85_write_value(client, LM85_REG_TEMP_MAX(nr), data->temp_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
/* Automatic PWM control */
static ssize_t pwm_auto_channels_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", ZONE_FROM_REG(data->autofan[nr].config));
}
static ssize_t pwm_auto_channels_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->autofan[nr].config = (data->autofan[nr].config & (~0xe0))
| ZONE_TO_REG(val);
lm85_write_value(client, LM85_REG_AFAN_CONFIG(nr),
data->autofan[nr].config);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm_auto_pwm_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", PWM_FROM_REG(data->autofan[nr].min_pwm));
}
static ssize_t pwm_auto_pwm_min_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->autofan[nr].min_pwm = PWM_TO_REG(val);
lm85_write_value(client, LM85_REG_AFAN_MINPWM(nr),
data->autofan[nr].min_pwm);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm_auto_pwm_minctl_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", data->autofan[nr].min_off);
}
static ssize_t pwm_auto_pwm_minctl_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 tmp;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->autofan[nr].min_off = val;
tmp = lm85_read_value(client, LM85_REG_AFAN_SPIKE1);
tmp &= ~(0x20 << nr);
if (data->autofan[nr].min_off)
tmp |= 0x20 << nr;
lm85_write_value(client, LM85_REG_AFAN_SPIKE1, tmp);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_channels, pwm_auto_channels, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_pwm_min, pwm_auto_pwm_min, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_pwm_minctl, pwm_auto_pwm_minctl, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_channels, pwm_auto_channels, 1);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_pwm_min, pwm_auto_pwm_min, 1);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_pwm_minctl, pwm_auto_pwm_minctl, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_channels, pwm_auto_channels, 2);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_pwm_min, pwm_auto_pwm_min, 2);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_pwm_minctl, pwm_auto_pwm_minctl, 2);
/* Temperature settings for automatic PWM control */
static ssize_t temp_auto_temp_off_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->zone[nr].limit) -
HYST_FROM_REG(data->zone[nr].hyst));
}
static ssize_t temp_auto_temp_off_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int min;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
min = TEMP_FROM_REG(data->zone[nr].limit);
data->zone[nr].hyst = HYST_TO_REG(min - val);
if (nr == 0 || nr == 1) {
lm85_write_value(client, LM85_REG_AFAN_HYST1,
(data->zone[0].hyst << 4)
| data->zone[1].hyst);
} else {
lm85_write_value(client, LM85_REG_AFAN_HYST2,
(data->zone[2].hyst << 4));
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_auto_temp_min_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->zone[nr].limit));
}
static ssize_t temp_auto_temp_min_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->zone[nr].limit = TEMP_TO_REG(val);
lm85_write_value(client, LM85_REG_AFAN_LIMIT(nr),
data->zone[nr].limit);
/* Update temp_auto_max and temp_auto_range */
data->zone[nr].range = RANGE_TO_REG(
TEMP_FROM_REG(data->zone[nr].max_desired) -
TEMP_FROM_REG(data->zone[nr].limit));
lm85_write_value(client, LM85_REG_AFAN_RANGE(nr),
((data->zone[nr].range & 0x0f) << 4)
| data->pwm_freq[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_auto_temp_max_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->zone[nr].limit) +
RANGE_FROM_REG(data->zone[nr].range));
}
static ssize_t temp_auto_temp_max_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int min;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
min = TEMP_FROM_REG(data->zone[nr].limit);
data->zone[nr].max_desired = TEMP_TO_REG(val);
data->zone[nr].range = RANGE_TO_REG(
val - min);
lm85_write_value(client, LM85_REG_AFAN_RANGE(nr),
((data->zone[nr].range & 0x0f) << 4)
| data->pwm_freq[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_auto_temp_crit_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = lm85_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->zone[nr].critical));
}
static ssize_t temp_auto_temp_crit_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct lm85_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->zone[nr].critical = TEMP_TO_REG(val);
lm85_write_value(client, LM85_REG_AFAN_CRITICAL(nr),
data->zone[nr].critical);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_auto_temp_off, temp_auto_temp_off, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_auto_temp_min, temp_auto_temp_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_auto_temp_max, temp_auto_temp_max, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_auto_temp_crit, temp_auto_temp_crit, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_temp_off, temp_auto_temp_off, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_temp_min, temp_auto_temp_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_temp_max, temp_auto_temp_max, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_temp_crit, temp_auto_temp_crit, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_temp_off, temp_auto_temp_off, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_temp_min, temp_auto_temp_min, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_temp_max, temp_auto_temp_max, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_temp_crit, temp_auto_temp_crit, 2);
static struct attribute *lm85_attributes[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_fan4_alarm.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_temp1_auto_temp_min.dev_attr.attr,
&sensor_dev_attr_temp2_auto_temp_min.dev_attr.attr,
&sensor_dev_attr_temp3_auto_temp_min.dev_attr.attr,
&sensor_dev_attr_temp1_auto_temp_max.dev_attr.attr,
&sensor_dev_attr_temp2_auto_temp_max.dev_attr.attr,
&sensor_dev_attr_temp3_auto_temp_max.dev_attr.attr,
&sensor_dev_attr_temp1_auto_temp_crit.dev_attr.attr,
&sensor_dev_attr_temp2_auto_temp_crit.dev_attr.attr,
&sensor_dev_attr_temp3_auto_temp_crit.dev_attr.attr,
&dev_attr_vrm.attr,
&dev_attr_cpu0_vid.attr,
&dev_attr_alarms.attr,
NULL
};
static const struct attribute_group lm85_group = {
.attrs = lm85_attributes,
};
static struct attribute *lm85_attributes_minctl[] = {
&sensor_dev_attr_pwm1_auto_pwm_minctl.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_pwm_minctl.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_pwm_minctl.dev_attr.attr,
NULL
};
static const struct attribute_group lm85_group_minctl = {
.attrs = lm85_attributes_minctl,
};
static struct attribute *lm85_attributes_temp_off[] = {
&sensor_dev_attr_temp1_auto_temp_off.dev_attr.attr,
&sensor_dev_attr_temp2_auto_temp_off.dev_attr.attr,
&sensor_dev_attr_temp3_auto_temp_off.dev_attr.attr,
NULL
};
static const struct attribute_group lm85_group_temp_off = {
.attrs = lm85_attributes_temp_off,
};
static struct attribute *lm85_attributes_in4[] = {
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm85_group_in4 = {
.attrs = lm85_attributes_in4,
};
static struct attribute *lm85_attributes_in567[] = {
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm85_group_in567 = {
.attrs = lm85_attributes_in567,
};
static void lm85_init_client(struct i2c_client *client)
{
int value;
/* Start monitoring if needed */
value = lm85_read_value(client, LM85_REG_CONFIG);
if (!(value & 0x01)) {
dev_info(&client->dev, "Starting monitoring\n");
lm85_write_value(client, LM85_REG_CONFIG, value | 0x01);
}
/* Warn about unusual configuration bits */
if (value & 0x02)
dev_warn(&client->dev, "Device configuration is locked\n");
if (!(value & 0x04))
dev_warn(&client->dev, "Device is not ready\n");
}
static int lm85_is_fake(struct i2c_client *client)
{
/*
* Differenciate between real LM96000 and Winbond WPCD377I. The latter
* emulate the former except that it has no hardware monitoring function
* so the readings are always 0.
*/
int i;
u8 in_temp, fan;
for (i = 0; i < 8; i++) {
in_temp = i2c_smbus_read_byte_data(client, 0x20 + i);
fan = i2c_smbus_read_byte_data(client, 0x28 + i);
if (in_temp != 0x00 || fan != 0xff)
return 0;
}
return 1;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm85_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int address = client->addr;
const char *type_name = NULL;
int company, verstep;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
/* We need to be able to do byte I/O */
return -ENODEV;
}
/* Determine the chip type */
company = lm85_read_value(client, LM85_REG_COMPANY);
verstep = lm85_read_value(client, LM85_REG_VERSTEP);
dev_dbg(&adapter->dev,
"Detecting device at 0x%02x with COMPANY: 0x%02x and VERSTEP: 0x%02x\n",
address, company, verstep);
if (company == LM85_COMPANY_NATIONAL) {
switch (verstep) {
case LM85_VERSTEP_LM85C:
type_name = "lm85c";
break;
case LM85_VERSTEP_LM85B:
type_name = "lm85b";
break;
case LM85_VERSTEP_LM96000_1:
case LM85_VERSTEP_LM96000_2:
/* Check for Winbond WPCD377I */
if (lm85_is_fake(client)) {
dev_dbg(&adapter->dev,
"Found Winbond WPCD377I, ignoring\n");
return -ENODEV;
}
type_name = "lm96000";
break;
}
} else if (company == LM85_COMPANY_ANALOG_DEV) {
switch (verstep) {
case LM85_VERSTEP_ADM1027:
type_name = "adm1027";
break;
case LM85_VERSTEP_ADT7463:
case LM85_VERSTEP_ADT7463C:
type_name = "adt7463";
break;
case LM85_VERSTEP_ADT7468_1:
case LM85_VERSTEP_ADT7468_2:
type_name = "adt7468";
break;
}
} else if (company == LM85_COMPANY_SMSC) {
switch (verstep) {
case LM85_VERSTEP_EMC6D100_A0:
case LM85_VERSTEP_EMC6D100_A1:
/* Note: we can't tell a '100 from a '101 */
type_name = "emc6d100";
break;
case LM85_VERSTEP_EMC6D102:
type_name = "emc6d102";
break;
case LM85_VERSTEP_EMC6D103_A0:
case LM85_VERSTEP_EMC6D103_A1:
type_name = "emc6d103";
break;
case LM85_VERSTEP_EMC6D103S:
type_name = "emc6d103s";
break;
}
}
if (!type_name)
return -ENODEV;
strscpy(info->type, type_name, I2C_NAME_SIZE);
return 0;
}
static const struct i2c_device_id lm85_id[];
static int lm85_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct lm85_data *data;
int idx = 0;
data = devm_kzalloc(dev, sizeof(struct lm85_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
if (client->dev.of_node)
data->type = (uintptr_t)of_device_get_match_data(&client->dev);
else
data->type = i2c_match_id(lm85_id, client)->driver_data;
mutex_init(&data->update_lock);
/* Fill in the chip specific driver values */
switch (data->type) {
case adm1027:
case adt7463:
case adt7468:
case emc6d100:
case emc6d102:
case emc6d103:
case emc6d103s:
data->freq_map = adm1027_freq_map;
data->freq_map_size = ARRAY_SIZE(adm1027_freq_map);
break;
case lm96000:
data->freq_map = lm96000_freq_map;
data->freq_map_size = ARRAY_SIZE(lm96000_freq_map);
break;
default:
data->freq_map = lm85_freq_map;
data->freq_map_size = ARRAY_SIZE(lm85_freq_map);
}
/* Set the VRM version */
data->vrm = vid_which_vrm();
/* Initialize the LM85 chip */
lm85_init_client(client);
/* sysfs hooks */
data->groups[idx++] = &lm85_group;
/* minctl and temp_off exist on all chips except emc6d103s */
if (data->type != emc6d103s) {
data->groups[idx++] = &lm85_group_minctl;
data->groups[idx++] = &lm85_group_temp_off;
}
/*
* The ADT7463/68 have an optional VRM 10 mode where pin 21 is used
* as a sixth digital VID input rather than an analog input.
*/
if (data->type == adt7463 || data->type == adt7468) {
u8 vid = lm85_read_value(client, LM85_REG_VID);
if (vid & 0x80)
data->has_vid5 = true;
}
if (!data->has_vid5)
data->groups[idx++] = &lm85_group_in4;
/* The EMC6D100 has 3 additional voltage inputs */
if (data->type == emc6d100)
data->groups[idx++] = &lm85_group_in567;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id lm85_id[] = {
{ "adm1027", adm1027 },
{ "adt7463", adt7463 },
{ "adt7468", adt7468 },
{ "lm85", lm85 },
{ "lm85b", lm85 },
{ "lm85c", lm85 },
{ "lm96000", lm96000 },
{ "emc6d100", emc6d100 },
{ "emc6d101", emc6d100 },
{ "emc6d102", emc6d102 },
{ "emc6d103", emc6d103 },
{ "emc6d103s", emc6d103s },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm85_id);
static const struct of_device_id __maybe_unused lm85_of_match[] = {
{
.compatible = "adi,adm1027",
.data = (void *)adm1027
},
{
.compatible = "adi,adt7463",
.data = (void *)adt7463
},
{
.compatible = "adi,adt7468",
.data = (void *)adt7468
},
{
.compatible = "national,lm85",
.data = (void *)lm85
},
{
.compatible = "national,lm85b",
.data = (void *)lm85
},
{
.compatible = "national,lm85c",
.data = (void *)lm85
},
{
.compatible = "ti,lm96000",
.data = (void *)lm96000
},
{
.compatible = "smsc,emc6d100",
.data = (void *)emc6d100
},
{
.compatible = "smsc,emc6d101",
.data = (void *)emc6d100
},
{
.compatible = "smsc,emc6d102",
.data = (void *)emc6d102
},
{
.compatible = "smsc,emc6d103",
.data = (void *)emc6d103
},
{
.compatible = "smsc,emc6d103s",
.data = (void *)emc6d103s
},
{ },
};
MODULE_DEVICE_TABLE(of, lm85_of_match);
static struct i2c_driver lm85_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm85",
.of_match_table = of_match_ptr(lm85_of_match),
},
.probe = lm85_probe,
.id_table = lm85_id,
.detect = lm85_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm85_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Philip Pokorny <[email protected]>, "
"Margit Schubert-While <[email protected]>, "
"Justin Thiessen <[email protected]>");
MODULE_DESCRIPTION("LM85-B, LM85-C driver");
|
linux-master
|
drivers/hwmon/lm85.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* dell-smm-hwmon.c -- Linux driver for accessing the SMM BIOS on Dell laptops.
*
* Copyright (C) 2001 Massimo Dal Zotto <[email protected]>
*
* Hwmon integration:
* Copyright (C) 2011 Jean Delvare <[email protected]>
* Copyright (C) 2013, 2014 Guenter Roeck <[email protected]>
* Copyright (C) 2014, 2015 Pali Rohár <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/capability.h>
#include <linux/cpu.h>
#include <linux/ctype.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/kconfig.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/smp.h>
#include <linux/string.h>
#include <linux/thermal.h>
#include <linux/types.h>
#include <linux/uaccess.h>
#include <linux/i8k.h>
#define I8K_SMM_FN_STATUS 0x0025
#define I8K_SMM_POWER_STATUS 0x0069
#define I8K_SMM_SET_FAN 0x01a3
#define I8K_SMM_GET_FAN 0x00a3
#define I8K_SMM_GET_SPEED 0x02a3
#define I8K_SMM_GET_FAN_TYPE 0x03a3
#define I8K_SMM_GET_NOM_SPEED 0x04a3
#define I8K_SMM_GET_TEMP 0x10a3
#define I8K_SMM_GET_TEMP_TYPE 0x11a3
#define I8K_SMM_GET_DELL_SIG1 0xfea3
#define I8K_SMM_GET_DELL_SIG2 0xffa3
/* in usecs */
#define DELL_SMM_MAX_DURATION 250000
#define I8K_FAN_MULT 30
#define I8K_FAN_RPM_THRESHOLD 1000
#define I8K_MAX_TEMP 127
#define I8K_FN_NONE 0x00
#define I8K_FN_UP 0x01
#define I8K_FN_DOWN 0x02
#define I8K_FN_MUTE 0x04
#define I8K_FN_MASK 0x07
#define I8K_FN_SHIFT 8
#define I8K_POWER_AC 0x05
#define I8K_POWER_BATTERY 0x01
#define DELL_SMM_NO_TEMP 10
#define DELL_SMM_NO_FANS 3
struct dell_smm_data {
struct mutex i8k_mutex; /* lock for sensors writes */
char bios_version[4];
char bios_machineid[16];
uint i8k_fan_mult;
uint i8k_pwm_mult;
uint i8k_fan_max;
bool disallow_fan_type_call;
bool disallow_fan_support;
unsigned int manual_fan;
unsigned int auto_fan;
int temp_type[DELL_SMM_NO_TEMP];
bool fan[DELL_SMM_NO_FANS];
int fan_type[DELL_SMM_NO_FANS];
int *fan_nominal_speed[DELL_SMM_NO_FANS];
};
struct dell_smm_cooling_data {
u8 fan_num;
struct dell_smm_data *data;
};
MODULE_AUTHOR("Massimo Dal Zotto ([email protected])");
MODULE_AUTHOR("Pali Rohár <[email protected]>");
MODULE_DESCRIPTION("Dell laptop SMM BIOS hwmon driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("i8k");
static bool force;
module_param_unsafe(force, bool, 0);
MODULE_PARM_DESC(force, "Force loading without checking for supported models and features");
static bool ignore_dmi;
module_param(ignore_dmi, bool, 0);
MODULE_PARM_DESC(ignore_dmi, "Continue probing hardware even if DMI data does not match");
#if IS_ENABLED(CONFIG_I8K)
static bool restricted = true;
module_param(restricted, bool, 0);
MODULE_PARM_DESC(restricted, "Restrict fan control and serial number to CAP_SYS_ADMIN (default: 1)");
static bool power_status;
module_param(power_status, bool, 0600);
MODULE_PARM_DESC(power_status, "Report power status in /proc/i8k (default: 0)");
#endif
static uint fan_mult;
module_param(fan_mult, uint, 0);
MODULE_PARM_DESC(fan_mult, "Factor to multiply fan speed with (default: autodetect)");
static uint fan_max;
module_param(fan_max, uint, 0);
MODULE_PARM_DESC(fan_max, "Maximum configurable fan speed (default: autodetect)");
struct smm_regs {
unsigned int eax;
unsigned int ebx;
unsigned int ecx;
unsigned int edx;
unsigned int esi;
unsigned int edi;
};
static const char * const temp_labels[] = {
"CPU",
"GPU",
"SODIMM",
"Other",
"Ambient",
"Other",
};
static const char * const fan_labels[] = {
"Processor Fan",
"Motherboard Fan",
"Video Fan",
"Power Supply Fan",
"Chipset Fan",
"Other Fan",
};
static const char * const docking_labels[] = {
"Docking Processor Fan",
"Docking Motherboard Fan",
"Docking Video Fan",
"Docking Power Supply Fan",
"Docking Chipset Fan",
"Docking Other Fan",
};
static inline const char __init *i8k_get_dmi_data(int field)
{
const char *dmi_data = dmi_get_system_info(field);
return dmi_data && *dmi_data ? dmi_data : "?";
}
/*
* Call the System Management Mode BIOS. Code provided by Jonathan Buzzard.
*/
static int i8k_smm_func(void *par)
{
ktime_t calltime = ktime_get();
struct smm_regs *regs = par;
int eax = regs->eax;
int ebx = regs->ebx;
unsigned char carry;
long long duration;
/* SMM requires CPU 0 */
if (smp_processor_id() != 0)
return -EBUSY;
asm volatile("out %%al,$0xb2\n\t"
"out %%al,$0x84\n\t"
"setc %0\n"
: "=mr" (carry),
"+a" (regs->eax),
"+b" (regs->ebx),
"+c" (regs->ecx),
"+d" (regs->edx),
"+S" (regs->esi),
"+D" (regs->edi));
duration = ktime_us_delta(ktime_get(), calltime);
pr_debug("smm(0x%.4x 0x%.4x) = 0x%.4x carry: %d (took %7lld usecs)\n",
eax, ebx, regs->eax & 0xffff, carry, duration);
if (duration > DELL_SMM_MAX_DURATION)
pr_warn_once("SMM call took %lld usecs!\n", duration);
if (carry || (regs->eax & 0xffff) == 0xffff || regs->eax == eax)
return -EINVAL;
return 0;
}
/*
* Call the System Management Mode BIOS.
*/
static int i8k_smm(struct smm_regs *regs)
{
int ret;
cpus_read_lock();
ret = smp_call_on_cpu(0, i8k_smm_func, regs, true);
cpus_read_unlock();
return ret;
}
/*
* Read the fan status.
*/
static int i8k_get_fan_status(const struct dell_smm_data *data, u8 fan)
{
struct smm_regs regs = {
.eax = I8K_SMM_GET_FAN,
.ebx = fan,
};
if (data->disallow_fan_support)
return -EINVAL;
return i8k_smm(®s) ? : regs.eax & 0xff;
}
/*
* Read the fan speed in RPM.
*/
static int i8k_get_fan_speed(const struct dell_smm_data *data, u8 fan)
{
struct smm_regs regs = {
.eax = I8K_SMM_GET_SPEED,
.ebx = fan,
};
if (data->disallow_fan_support)
return -EINVAL;
return i8k_smm(®s) ? : (regs.eax & 0xffff) * data->i8k_fan_mult;
}
/*
* Read the fan type.
*/
static int _i8k_get_fan_type(const struct dell_smm_data *data, u8 fan)
{
struct smm_regs regs = {
.eax = I8K_SMM_GET_FAN_TYPE,
.ebx = fan,
};
if (data->disallow_fan_support || data->disallow_fan_type_call)
return -EINVAL;
return i8k_smm(®s) ? : regs.eax & 0xff;
}
static int i8k_get_fan_type(struct dell_smm_data *data, u8 fan)
{
/* I8K_SMM_GET_FAN_TYPE SMM call is expensive, so cache values */
if (data->fan_type[fan] == INT_MIN)
data->fan_type[fan] = _i8k_get_fan_type(data, fan);
return data->fan_type[fan];
}
/*
* Read the fan nominal rpm for specific fan speed.
*/
static int __init i8k_get_fan_nominal_speed(const struct dell_smm_data *data, u8 fan, int speed)
{
struct smm_regs regs = {
.eax = I8K_SMM_GET_NOM_SPEED,
.ebx = fan | (speed << 8),
};
if (data->disallow_fan_support)
return -EINVAL;
return i8k_smm(®s) ? : (regs.eax & 0xffff);
}
/*
* Enable or disable automatic BIOS fan control support
*/
static int i8k_enable_fan_auto_mode(const struct dell_smm_data *data, bool enable)
{
struct smm_regs regs = { };
if (data->disallow_fan_support)
return -EINVAL;
regs.eax = enable ? data->auto_fan : data->manual_fan;
return i8k_smm(®s);
}
/*
* Set the fan speed (off, low, high, ...).
*/
static int i8k_set_fan(const struct dell_smm_data *data, u8 fan, int speed)
{
struct smm_regs regs = { .eax = I8K_SMM_SET_FAN, };
if (data->disallow_fan_support)
return -EINVAL;
speed = (speed < 0) ? 0 : ((speed > data->i8k_fan_max) ? data->i8k_fan_max : speed);
regs.ebx = fan | (speed << 8);
return i8k_smm(®s);
}
static int __init i8k_get_temp_type(u8 sensor)
{
struct smm_regs regs = {
.eax = I8K_SMM_GET_TEMP_TYPE,
.ebx = sensor,
};
return i8k_smm(®s) ? : regs.eax & 0xff;
}
/*
* Read the cpu temperature.
*/
static int _i8k_get_temp(u8 sensor)
{
struct smm_regs regs = {
.eax = I8K_SMM_GET_TEMP,
.ebx = sensor,
};
return i8k_smm(®s) ? : regs.eax & 0xff;
}
static int i8k_get_temp(u8 sensor)
{
int temp = _i8k_get_temp(sensor);
/*
* Sometimes the temperature sensor returns 0x99, which is out of range.
* In this case we retry (once) before returning an error.
# 1003655137 00000058 00005a4b
# 1003655138 00000099 00003a80 <--- 0x99 = 153 degrees
# 1003655139 00000054 00005c52
*/
if (temp == 0x99) {
msleep(100);
temp = _i8k_get_temp(sensor);
}
/*
* Return -ENODATA for all invalid temperatures.
*
* Known instances are the 0x99 value as seen above as well as
* 0xc1 (193), which may be returned when trying to read the GPU
* temperature if the system supports a GPU and it is currently
* turned off.
*/
if (temp > I8K_MAX_TEMP)
return -ENODATA;
return temp;
}
static int __init i8k_get_dell_signature(int req_fn)
{
struct smm_regs regs = { .eax = req_fn, };
int rc;
rc = i8k_smm(®s);
if (rc < 0)
return rc;
return regs.eax == 1145651527 && regs.edx == 1145392204 ? 0 : -1;
}
#if IS_ENABLED(CONFIG_I8K)
/*
* Read the Fn key status.
*/
static int i8k_get_fn_status(void)
{
struct smm_regs regs = { .eax = I8K_SMM_FN_STATUS, };
int rc;
rc = i8k_smm(®s);
if (rc < 0)
return rc;
switch ((regs.eax >> I8K_FN_SHIFT) & I8K_FN_MASK) {
case I8K_FN_UP:
return I8K_VOL_UP;
case I8K_FN_DOWN:
return I8K_VOL_DOWN;
case I8K_FN_MUTE:
return I8K_VOL_MUTE;
default:
return 0;
}
}
/*
* Read the power status.
*/
static int i8k_get_power_status(void)
{
struct smm_regs regs = { .eax = I8K_SMM_POWER_STATUS, };
int rc;
rc = i8k_smm(®s);
if (rc < 0)
return rc;
return (regs.eax & 0xff) == I8K_POWER_AC ? I8K_AC : I8K_BATTERY;
}
/*
* Procfs interface
*/
static long i8k_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
{
struct dell_smm_data *data = pde_data(file_inode(fp));
int __user *argp = (int __user *)arg;
int speed, err;
int val = 0;
if (!argp)
return -EINVAL;
switch (cmd) {
case I8K_BIOS_VERSION:
if (!isdigit(data->bios_version[0]) || !isdigit(data->bios_version[1]) ||
!isdigit(data->bios_version[2]))
return -EINVAL;
val = (data->bios_version[0] << 16) |
(data->bios_version[1] << 8) | data->bios_version[2];
if (copy_to_user(argp, &val, sizeof(val)))
return -EFAULT;
return 0;
case I8K_MACHINE_ID:
if (restricted && !capable(CAP_SYS_ADMIN))
return -EPERM;
if (copy_to_user(argp, data->bios_machineid, sizeof(data->bios_machineid)))
return -EFAULT;
return 0;
case I8K_FN_STATUS:
val = i8k_get_fn_status();
break;
case I8K_POWER_STATUS:
val = i8k_get_power_status();
break;
case I8K_GET_TEMP:
val = i8k_get_temp(0);
break;
case I8K_GET_SPEED:
if (copy_from_user(&val, argp, sizeof(int)))
return -EFAULT;
if (val > U8_MAX || val < 0)
return -EINVAL;
val = i8k_get_fan_speed(data, val);
break;
case I8K_GET_FAN:
if (copy_from_user(&val, argp, sizeof(int)))
return -EFAULT;
if (val > U8_MAX || val < 0)
return -EINVAL;
val = i8k_get_fan_status(data, val);
break;
case I8K_SET_FAN:
if (restricted && !capable(CAP_SYS_ADMIN))
return -EPERM;
if (copy_from_user(&val, argp, sizeof(int)))
return -EFAULT;
if (val > U8_MAX || val < 0)
return -EINVAL;
if (copy_from_user(&speed, argp + 1, sizeof(int)))
return -EFAULT;
mutex_lock(&data->i8k_mutex);
err = i8k_set_fan(data, val, speed);
if (err < 0)
val = err;
else
val = i8k_get_fan_status(data, val);
mutex_unlock(&data->i8k_mutex);
break;
default:
return -ENOIOCTLCMD;
}
if (val < 0)
return val;
if (copy_to_user(argp, &val, sizeof(int)))
return -EFAULT;
return 0;
}
/*
* Print the information for /proc/i8k.
*/
static int i8k_proc_show(struct seq_file *seq, void *offset)
{
struct dell_smm_data *data = seq->private;
int fn_key, cpu_temp, ac_power;
int left_fan, right_fan, left_speed, right_speed;
cpu_temp = i8k_get_temp(0); /* 11100 µs */
left_fan = i8k_get_fan_status(data, I8K_FAN_LEFT); /* 580 µs */
right_fan = i8k_get_fan_status(data, I8K_FAN_RIGHT); /* 580 µs */
left_speed = i8k_get_fan_speed(data, I8K_FAN_LEFT); /* 580 µs */
right_speed = i8k_get_fan_speed(data, I8K_FAN_RIGHT); /* 580 µs */
fn_key = i8k_get_fn_status(); /* 750 µs */
if (power_status)
ac_power = i8k_get_power_status(); /* 14700 µs */
else
ac_power = -1;
/*
* Info:
*
* 1) Format version (this will change if format changes)
* 2) BIOS version
* 3) BIOS machine ID
* 4) Cpu temperature
* 5) Left fan status
* 6) Right fan status
* 7) Left fan speed
* 8) Right fan speed
* 9) AC power
* 10) Fn Key status
*/
seq_printf(seq, "%s %s %s %d %d %d %d %d %d %d\n",
I8K_PROC_FMT,
data->bios_version,
(restricted && !capable(CAP_SYS_ADMIN)) ? "-1" : data->bios_machineid,
cpu_temp,
left_fan, right_fan, left_speed, right_speed,
ac_power, fn_key);
return 0;
}
static int i8k_open_fs(struct inode *inode, struct file *file)
{
return single_open(file, i8k_proc_show, pde_data(inode));
}
static const struct proc_ops i8k_proc_ops = {
.proc_open = i8k_open_fs,
.proc_read = seq_read,
.proc_lseek = seq_lseek,
.proc_release = single_release,
.proc_ioctl = i8k_ioctl,
};
static void i8k_exit_procfs(void *param)
{
remove_proc_entry("i8k", NULL);
}
static void __init i8k_init_procfs(struct device *dev)
{
struct dell_smm_data *data = dev_get_drvdata(dev);
/* Only register exit function if creation was successful */
if (proc_create_data("i8k", 0, NULL, &i8k_proc_ops, data))
devm_add_action_or_reset(dev, i8k_exit_procfs, NULL);
}
#else
static void __init i8k_init_procfs(struct device *dev)
{
}
#endif
static int dell_smm_get_max_state(struct thermal_cooling_device *dev, unsigned long *state)
{
struct dell_smm_cooling_data *cdata = dev->devdata;
*state = cdata->data->i8k_fan_max;
return 0;
}
static int dell_smm_get_cur_state(struct thermal_cooling_device *dev, unsigned long *state)
{
struct dell_smm_cooling_data *cdata = dev->devdata;
int ret;
ret = i8k_get_fan_status(cdata->data, cdata->fan_num);
if (ret < 0)
return ret;
*state = ret;
return 0;
}
static int dell_smm_set_cur_state(struct thermal_cooling_device *dev, unsigned long state)
{
struct dell_smm_cooling_data *cdata = dev->devdata;
struct dell_smm_data *data = cdata->data;
int ret;
if (state > data->i8k_fan_max)
return -EINVAL;
mutex_lock(&data->i8k_mutex);
ret = i8k_set_fan(data, cdata->fan_num, (int)state);
mutex_unlock(&data->i8k_mutex);
return ret;
}
static const struct thermal_cooling_device_ops dell_smm_cooling_ops = {
.get_max_state = dell_smm_get_max_state,
.get_cur_state = dell_smm_get_cur_state,
.set_cur_state = dell_smm_set_cur_state,
};
static umode_t dell_smm_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
int channel)
{
const struct dell_smm_data *data = drvdata;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
/* _i8k_get_temp() is fine since we do not care about the actual value */
if (data->temp_type[channel] >= 0 || _i8k_get_temp(channel) >= 0)
return 0444;
break;
case hwmon_temp_label:
if (data->temp_type[channel] >= 0)
return 0444;
break;
default:
break;
}
break;
case hwmon_fan:
if (data->disallow_fan_support)
break;
switch (attr) {
case hwmon_fan_input:
if (data->fan[channel])
return 0444;
break;
case hwmon_fan_label:
if (data->fan[channel] && !data->disallow_fan_type_call)
return 0444;
break;
case hwmon_fan_min:
case hwmon_fan_max:
case hwmon_fan_target:
if (data->fan_nominal_speed[channel])
return 0444;
break;
default:
break;
}
break;
case hwmon_pwm:
if (data->disallow_fan_support)
break;
switch (attr) {
case hwmon_pwm_input:
if (data->fan[channel])
return 0644;
break;
case hwmon_pwm_enable:
if (data->auto_fan)
/*
* There is no command for retrieve the current status
* from BIOS, and userspace/firmware itself can change
* it.
* Thus we can only provide write-only access for now.
*/
return 0200;
break;
default:
break;
}
break;
default:
break;
}
return 0;
}
static int dell_smm_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long *val)
{
struct dell_smm_data *data = dev_get_drvdata(dev);
int mult = data->i8k_fan_mult;
int ret;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
ret = i8k_get_temp(channel);
if (ret < 0)
return ret;
*val = ret * 1000;
return 0;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
ret = i8k_get_fan_speed(data, channel);
if (ret < 0)
return ret;
*val = ret;
return 0;
case hwmon_fan_min:
*val = data->fan_nominal_speed[channel][0] * mult;
return 0;
case hwmon_fan_max:
*val = data->fan_nominal_speed[channel][data->i8k_fan_max] * mult;
return 0;
case hwmon_fan_target:
ret = i8k_get_fan_status(data, channel);
if (ret < 0)
return ret;
if (ret > data->i8k_fan_max)
ret = data->i8k_fan_max;
*val = data->fan_nominal_speed[channel][ret] * mult;
return 0;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
ret = i8k_get_fan_status(data, channel);
if (ret < 0)
return ret;
*val = clamp_val(ret * data->i8k_pwm_mult, 0, 255);
return 0;
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static const char *dell_smm_fan_label(struct dell_smm_data *data, int channel)
{
bool dock = false;
int type = i8k_get_fan_type(data, channel);
if (type < 0)
return ERR_PTR(type);
if (type & 0x10) {
dock = true;
type &= 0x0F;
}
if (type >= ARRAY_SIZE(fan_labels))
type = ARRAY_SIZE(fan_labels) - 1;
return dock ? docking_labels[type] : fan_labels[type];
}
static int dell_smm_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, const char **str)
{
struct dell_smm_data *data = dev_get_drvdata(dev);
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_label:
*str = temp_labels[data->temp_type[channel]];
return 0;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_label:
*str = dell_smm_fan_label(data, channel);
return PTR_ERR_OR_ZERO(*str);
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static int dell_smm_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long val)
{
struct dell_smm_data *data = dev_get_drvdata(dev);
unsigned long pwm;
bool enable;
int err;
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
pwm = clamp_val(DIV_ROUND_CLOSEST(val, data->i8k_pwm_mult), 0,
data->i8k_fan_max);
mutex_lock(&data->i8k_mutex);
err = i8k_set_fan(data, channel, pwm);
mutex_unlock(&data->i8k_mutex);
if (err < 0)
return err;
return 0;
case hwmon_pwm_enable:
if (!val)
return -EINVAL;
if (val == 1)
enable = false;
else
enable = true;
mutex_lock(&data->i8k_mutex);
err = i8k_enable_fan_auto_mode(data, enable);
mutex_unlock(&data->i8k_mutex);
if (err < 0)
return err;
return 0;
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static const struct hwmon_ops dell_smm_ops = {
.is_visible = dell_smm_is_visible,
.read = dell_smm_read,
.read_string = dell_smm_read_string,
.write = dell_smm_write,
};
static const struct hwmon_channel_info * const dell_smm_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL
),
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_LABEL | HWMON_F_MIN | HWMON_F_MAX |
HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_LABEL | HWMON_F_MIN | HWMON_F_MAX |
HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_LABEL | HWMON_F_MIN | HWMON_F_MAX |
HWMON_F_TARGET
),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT,
HWMON_PWM_INPUT
),
NULL
};
static const struct hwmon_chip_info dell_smm_chip_info = {
.ops = &dell_smm_ops,
.info = dell_smm_info,
};
static int __init dell_smm_init_cdev(struct device *dev, u8 fan_num)
{
struct dell_smm_data *data = dev_get_drvdata(dev);
struct thermal_cooling_device *cdev;
struct dell_smm_cooling_data *cdata;
int ret = 0;
char *name;
name = kasprintf(GFP_KERNEL, "dell-smm-fan%u", fan_num + 1);
if (!name)
return -ENOMEM;
cdata = devm_kmalloc(dev, sizeof(*cdata), GFP_KERNEL);
if (cdata) {
cdata->fan_num = fan_num;
cdata->data = data;
cdev = devm_thermal_of_cooling_device_register(dev, NULL, name, cdata,
&dell_smm_cooling_ops);
if (IS_ERR(cdev)) {
devm_kfree(dev, cdata);
ret = PTR_ERR(cdev);
}
} else {
ret = -ENOMEM;
}
kfree(name);
return ret;
}
static int __init dell_smm_init_hwmon(struct device *dev)
{
struct dell_smm_data *data = dev_get_drvdata(dev);
struct device *dell_smm_hwmon_dev;
int state, err;
u8 i;
for (i = 0; i < DELL_SMM_NO_TEMP; i++) {
data->temp_type[i] = i8k_get_temp_type(i);
if (data->temp_type[i] < 0)
continue;
if (data->temp_type[i] >= ARRAY_SIZE(temp_labels))
data->temp_type[i] = ARRAY_SIZE(temp_labels) - 1;
}
for (i = 0; i < DELL_SMM_NO_FANS; i++) {
data->fan_type[i] = INT_MIN;
err = i8k_get_fan_status(data, i);
if (err < 0)
err = i8k_get_fan_type(data, i);
if (err < 0)
continue;
data->fan[i] = true;
/* the cooling device is not critical, ignore failures */
if (IS_REACHABLE(CONFIG_THERMAL)) {
err = dell_smm_init_cdev(dev, i);
if (err < 0)
dev_warn(dev, "Failed to register cooling device for fan %u\n",
i + 1);
}
data->fan_nominal_speed[i] = devm_kmalloc_array(dev, data->i8k_fan_max + 1,
sizeof(*data->fan_nominal_speed[i]),
GFP_KERNEL);
if (!data->fan_nominal_speed[i])
continue;
for (state = 0; state <= data->i8k_fan_max; state++) {
err = i8k_get_fan_nominal_speed(data, i, state);
if (err < 0) {
/* Mark nominal speed table as invalid in case of error */
devm_kfree(dev, data->fan_nominal_speed[i]);
data->fan_nominal_speed[i] = NULL;
break;
}
data->fan_nominal_speed[i][state] = err;
/*
* Autodetect fan multiplier based on nominal rpm if multiplier
* was not specified as module param or in DMI. If fan reports
* rpm value too high then set multiplier to 1.
*/
if (!fan_mult && err > I8K_FAN_RPM_THRESHOLD)
data->i8k_fan_mult = 1;
}
}
dell_smm_hwmon_dev = devm_hwmon_device_register_with_info(dev, "dell_smm", data,
&dell_smm_chip_info, NULL);
return PTR_ERR_OR_ZERO(dell_smm_hwmon_dev);
}
struct i8k_config_data {
uint fan_mult;
uint fan_max;
};
enum i8k_configs {
DELL_LATITUDE_D520,
DELL_PRECISION_490,
DELL_STUDIO,
DELL_XPS,
};
/*
* Only use for machines which need some special configuration
* in order to work correctly (e.g. if autoconfig fails on this machines).
*/
static const struct i8k_config_data i8k_config_data[] __initconst = {
[DELL_LATITUDE_D520] = {
.fan_mult = 1,
.fan_max = I8K_FAN_TURBO,
},
[DELL_PRECISION_490] = {
.fan_mult = 1,
.fan_max = I8K_FAN_TURBO,
},
[DELL_STUDIO] = {
.fan_mult = 1,
.fan_max = I8K_FAN_HIGH,
},
[DELL_XPS] = {
.fan_mult = 1,
.fan_max = I8K_FAN_HIGH,
},
};
static const struct dmi_system_id i8k_dmi_table[] __initconst = {
{
.ident = "Dell G5 5590",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "G5 5590"),
},
},
{
.ident = "Dell Inspiron",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer"),
DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron"),
},
},
{
.ident = "Dell Latitude",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer"),
DMI_MATCH(DMI_PRODUCT_NAME, "Latitude"),
},
},
{
.ident = "Dell Inspiron 2",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron"),
},
},
{
.ident = "Dell Latitude D520",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Latitude D520"),
},
.driver_data = (void *)&i8k_config_data[DELL_LATITUDE_D520],
},
{
.ident = "Dell Latitude 2",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Latitude"),
},
},
{ /* UK Inspiron 6400 */
.ident = "Dell Inspiron 3",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "MM061"),
},
},
{
.ident = "Dell Inspiron 3",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "MP061"),
},
},
{
.ident = "Dell Precision 490",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME,
"Precision WorkStation 490"),
},
.driver_data = (void *)&i8k_config_data[DELL_PRECISION_490],
},
{
.ident = "Dell Precision",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Precision"),
},
},
{
.ident = "Dell Vostro",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Vostro"),
},
},
{
.ident = "Dell Studio",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Studio"),
},
.driver_data = (void *)&i8k_config_data[DELL_STUDIO],
},
{
.ident = "Dell XPS M140",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "MXC051"),
},
.driver_data = (void *)&i8k_config_data[DELL_XPS],
},
{
.ident = "Dell XPS",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "XPS"),
},
},
{ }
};
MODULE_DEVICE_TABLE(dmi, i8k_dmi_table);
/*
* On some machines once I8K_SMM_GET_FAN_TYPE is issued then CPU fan speed
* randomly going up and down due to bug in Dell SMM or BIOS. Here is blacklist
* of affected Dell machines for which we disallow I8K_SMM_GET_FAN_TYPE call.
* See bug: https://bugzilla.kernel.org/show_bug.cgi?id=100121
*/
static const struct dmi_system_id i8k_blacklist_fan_type_dmi_table[] __initconst = {
{
.ident = "Dell Studio XPS 8000",
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Studio XPS 8000"),
},
},
{
.ident = "Dell Studio XPS 8100",
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Studio XPS 8100"),
},
},
{
.ident = "Dell Inspiron 580",
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Inspiron 580 "),
},
},
{
.ident = "Dell Inspiron 3505",
.matches = {
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Inspiron 3505"),
},
},
{ }
};
/*
* On some machines all fan related SMM functions implemented by Dell BIOS
* firmware freeze kernel for about 500ms. Until Dell fixes these problems fan
* support for affected blacklisted Dell machines stay disabled.
* See bug: https://bugzilla.kernel.org/show_bug.cgi?id=195751
*/
static const struct dmi_system_id i8k_blacklist_fan_support_dmi_table[] __initconst = {
{
.ident = "Dell Inspiron 7720",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Inspiron 7720"),
},
},
{
.ident = "Dell Vostro 3360",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Vostro 3360"),
},
},
{
.ident = "Dell XPS13 9333",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "XPS13 9333"),
},
},
{
.ident = "Dell XPS 15 L502X",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Dell System XPS L502X"),
},
},
{ }
};
struct i8k_fan_control_data {
unsigned int manual_fan;
unsigned int auto_fan;
};
enum i8k_fan_controls {
I8K_FAN_34A3_35A3,
};
static const struct i8k_fan_control_data i8k_fan_control_data[] __initconst = {
[I8K_FAN_34A3_35A3] = {
.manual_fan = 0x34a3,
.auto_fan = 0x35a3,
},
};
static const struct dmi_system_id i8k_whitelist_fan_control[] __initconst = {
{
.ident = "Dell Latitude 5480",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Latitude 5480"),
},
.driver_data = (void *)&i8k_fan_control_data[I8K_FAN_34A3_35A3],
},
{
.ident = "Dell Latitude E6440",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Latitude E6440"),
},
.driver_data = (void *)&i8k_fan_control_data[I8K_FAN_34A3_35A3],
},
{
.ident = "Dell Latitude E7440",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Latitude E7440"),
},
.driver_data = (void *)&i8k_fan_control_data[I8K_FAN_34A3_35A3],
},
{
.ident = "Dell Precision 5530",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Precision 5530"),
},
.driver_data = (void *)&i8k_fan_control_data[I8K_FAN_34A3_35A3],
},
{
.ident = "Dell Precision 7510",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Precision 7510"),
},
.driver_data = (void *)&i8k_fan_control_data[I8K_FAN_34A3_35A3],
},
{
.ident = "Dell XPS 13 7390",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "XPS 13 7390"),
},
.driver_data = (void *)&i8k_fan_control_data[I8K_FAN_34A3_35A3],
},
{ }
};
static int __init dell_smm_probe(struct platform_device *pdev)
{
struct dell_smm_data *data;
const struct dmi_system_id *id, *fan_control;
int ret;
data = devm_kzalloc(&pdev->dev, sizeof(struct dell_smm_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->i8k_mutex);
platform_set_drvdata(pdev, data);
if (dmi_check_system(i8k_blacklist_fan_support_dmi_table)) {
if (!force) {
dev_notice(&pdev->dev, "Disabling fan support due to BIOS bugs\n");
data->disallow_fan_support = true;
} else {
dev_warn(&pdev->dev, "Enabling fan support despite BIOS bugs\n");
}
}
if (dmi_check_system(i8k_blacklist_fan_type_dmi_table)) {
if (!force) {
dev_notice(&pdev->dev, "Disabling fan type call due to BIOS bugs\n");
data->disallow_fan_type_call = true;
} else {
dev_warn(&pdev->dev, "Enabling fan type call despite BIOS bugs\n");
}
}
strscpy(data->bios_version, i8k_get_dmi_data(DMI_BIOS_VERSION),
sizeof(data->bios_version));
strscpy(data->bios_machineid, i8k_get_dmi_data(DMI_PRODUCT_SERIAL),
sizeof(data->bios_machineid));
/*
* Set fan multiplier and maximal fan speed from dmi config
* Values specified in module parameters override values from dmi
*/
id = dmi_first_match(i8k_dmi_table);
if (id && id->driver_data) {
const struct i8k_config_data *conf = id->driver_data;
if (!fan_mult && conf->fan_mult)
fan_mult = conf->fan_mult;
if (!fan_max && conf->fan_max)
fan_max = conf->fan_max;
}
/* All options must not be 0 */
data->i8k_fan_mult = fan_mult ? : I8K_FAN_MULT;
data->i8k_fan_max = fan_max ? : I8K_FAN_HIGH;
data->i8k_pwm_mult = DIV_ROUND_UP(255, data->i8k_fan_max);
fan_control = dmi_first_match(i8k_whitelist_fan_control);
if (fan_control && fan_control->driver_data) {
const struct i8k_fan_control_data *control = fan_control->driver_data;
data->manual_fan = control->manual_fan;
data->auto_fan = control->auto_fan;
dev_info(&pdev->dev, "enabling support for setting automatic/manual fan control\n");
}
ret = dell_smm_init_hwmon(&pdev->dev);
if (ret)
return ret;
i8k_init_procfs(&pdev->dev);
return 0;
}
static struct platform_driver dell_smm_driver = {
.driver = {
.name = KBUILD_MODNAME,
},
};
static struct platform_device *dell_smm_device;
/*
* Probe for the presence of a supported laptop.
*/
static int __init i8k_init(void)
{
/*
* Get DMI information
*/
if (!dmi_check_system(i8k_dmi_table)) {
if (!ignore_dmi && !force)
return -ENODEV;
pr_info("not running on a supported Dell system.\n");
pr_info("vendor=%s, model=%s, version=%s\n",
i8k_get_dmi_data(DMI_SYS_VENDOR),
i8k_get_dmi_data(DMI_PRODUCT_NAME),
i8k_get_dmi_data(DMI_BIOS_VERSION));
}
/*
* Get SMM Dell signature
*/
if (i8k_get_dell_signature(I8K_SMM_GET_DELL_SIG1) &&
i8k_get_dell_signature(I8K_SMM_GET_DELL_SIG2)) {
if (!force)
return -ENODEV;
pr_err("Unable to get Dell SMM signature\n");
}
dell_smm_device = platform_create_bundle(&dell_smm_driver, dell_smm_probe, NULL, 0, NULL,
0);
return PTR_ERR_OR_ZERO(dell_smm_device);
}
static void __exit i8k_exit(void)
{
platform_device_unregister(dell_smm_device);
platform_driver_unregister(&dell_smm_driver);
}
module_init(i8k_init);
module_exit(i8k_exit);
|
linux-master
|
drivers/hwmon/dell-smm-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* nct6775 - Platform driver for the hardware monitoring
* functionality of Nuvoton NCT677x Super-I/O chips
*
* Copyright (C) 2012 Guenter Roeck <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include "nct6775.h"
enum sensor_access { access_direct, access_asuswmi };
static const char * const nct6775_sio_names[] __initconst = {
"NCT6106D",
"NCT6116D",
"NCT6775F",
"NCT6776D/F",
"NCT6779D",
"NCT6791D",
"NCT6792D",
"NCT6793D",
"NCT6795D",
"NCT6796D",
"NCT6797D",
"NCT6798D",
"NCT6796D-S/NCT6799D-R",
};
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static unsigned short fan_debounce;
module_param(fan_debounce, ushort, 0);
MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
#define DRVNAME "nct6775"
#define NCT6775_PORT_CHIPID 0x58
/*
* ISA constants
*/
#define IOREGION_ALIGNMENT (~7)
#define IOREGION_OFFSET 5
#define IOREGION_LENGTH 2
#define ADDR_REG_OFFSET 0
#define DATA_REG_OFFSET 1
/*
* Super-I/O constants and functions
*/
#define NCT6775_LD_ACPI 0x0a
#define NCT6775_LD_HWM 0x0b
#define NCT6775_LD_VID 0x0d
#define NCT6775_LD_12 0x12
#define SIO_REG_LDSEL 0x07 /* Logical device select */
#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
#define SIO_REG_ENABLE 0x30 /* Logical device enable */
#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
#define SIO_NCT6106_ID 0xc450
#define SIO_NCT6116_ID 0xd280
#define SIO_NCT6775_ID 0xb470
#define SIO_NCT6776_ID 0xc330
#define SIO_NCT6779_ID 0xc560
#define SIO_NCT6791_ID 0xc800
#define SIO_NCT6792_ID 0xc910
#define SIO_NCT6793_ID 0xd120
#define SIO_NCT6795_ID 0xd350
#define SIO_NCT6796_ID 0xd420
#define SIO_NCT6797_ID 0xd450
#define SIO_NCT6798_ID 0xd428
#define SIO_NCT6799_ID 0xd800
#define SIO_ID_MASK 0xFFF8
/*
* Control registers
*/
#define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
struct nct6775_sio_data {
int sioreg;
int ld;
enum kinds kind;
enum sensor_access access;
/* superio_() callbacks */
void (*sio_outb)(struct nct6775_sio_data *sio_data, int reg, int val);
int (*sio_inb)(struct nct6775_sio_data *sio_data, int reg);
void (*sio_select)(struct nct6775_sio_data *sio_data, int ld);
int (*sio_enter)(struct nct6775_sio_data *sio_data);
void (*sio_exit)(struct nct6775_sio_data *sio_data);
};
#define ASUSWMI_METHOD "WMBD"
#define ASUSWMI_METHODID_RSIO 0x5253494F
#define ASUSWMI_METHODID_WSIO 0x5753494F
#define ASUSWMI_METHODID_RHWM 0x5248574D
#define ASUSWMI_METHODID_WHWM 0x5748574D
#define ASUSWMI_UNSUPPORTED_METHOD 0xFFFFFFFE
#define ASUSWMI_DEVICE_HID "PNP0C14"
#define ASUSWMI_DEVICE_UID "ASUSWMI"
#define ASUSMSI_DEVICE_UID "AsusMbSwInterface"
#if IS_ENABLED(CONFIG_ACPI)
/*
* ASUS boards have only one device with WMI "WMBD" method and have provided
* access to only one SuperIO chip at 0x0290.
*/
static struct acpi_device *asus_acpi_dev;
#endif
static int nct6775_asuswmi_evaluate_method(u32 method_id, u8 bank, u8 reg, u8 val, u32 *retval)
{
#if IS_ENABLED(CONFIG_ACPI)
acpi_handle handle = acpi_device_handle(asus_acpi_dev);
u32 args = bank | (reg << 8) | (val << 16);
struct acpi_object_list input;
union acpi_object params[3];
unsigned long long result;
acpi_status status;
params[0].type = ACPI_TYPE_INTEGER;
params[0].integer.value = 0;
params[1].type = ACPI_TYPE_INTEGER;
params[1].integer.value = method_id;
params[2].type = ACPI_TYPE_BUFFER;
params[2].buffer.length = sizeof(args);
params[2].buffer.pointer = (void *)&args;
input.count = 3;
input.pointer = params;
status = acpi_evaluate_integer(handle, ASUSWMI_METHOD, &input, &result);
if (ACPI_FAILURE(status))
return -EIO;
if (retval)
*retval = result;
return 0;
#else
return -EOPNOTSUPP;
#endif
}
static inline int nct6775_asuswmi_write(u8 bank, u8 reg, u8 val)
{
return nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_WHWM, bank,
reg, val, NULL);
}
static inline int nct6775_asuswmi_read(u8 bank, u8 reg, u8 *val)
{
u32 ret, tmp = 0;
ret = nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_RHWM, bank,
reg, 0, &tmp);
*val = tmp;
return ret;
}
static int superio_wmi_inb(struct nct6775_sio_data *sio_data, int reg)
{
int tmp = 0;
nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_RSIO, sio_data->ld,
reg, 0, &tmp);
return tmp;
}
static void superio_wmi_outb(struct nct6775_sio_data *sio_data, int reg, int val)
{
nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_WSIO, sio_data->ld,
reg, val, NULL);
}
static void superio_wmi_select(struct nct6775_sio_data *sio_data, int ld)
{
sio_data->ld = ld;
}
static int superio_wmi_enter(struct nct6775_sio_data *sio_data)
{
return 0;
}
static void superio_wmi_exit(struct nct6775_sio_data *sio_data)
{
}
static void superio_outb(struct nct6775_sio_data *sio_data, int reg, int val)
{
int ioreg = sio_data->sioreg;
outb(reg, ioreg);
outb(val, ioreg + 1);
}
static int superio_inb(struct nct6775_sio_data *sio_data, int reg)
{
int ioreg = sio_data->sioreg;
outb(reg, ioreg);
return inb(ioreg + 1);
}
static void superio_select(struct nct6775_sio_data *sio_data, int ld)
{
int ioreg = sio_data->sioreg;
outb(SIO_REG_LDSEL, ioreg);
outb(ld, ioreg + 1);
}
static int superio_enter(struct nct6775_sio_data *sio_data)
{
int ioreg = sio_data->sioreg;
/*
* Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
*/
if (!request_muxed_region(ioreg, 2, DRVNAME))
return -EBUSY;
outb(0x87, ioreg);
outb(0x87, ioreg);
return 0;
}
static void superio_exit(struct nct6775_sio_data *sio_data)
{
int ioreg = sio_data->sioreg;
outb(0xaa, ioreg);
outb(0x02, ioreg);
outb(0x02, ioreg + 1);
release_region(ioreg, 2);
}
static inline void nct6775_wmi_set_bank(struct nct6775_data *data, u16 reg)
{
u8 bank = reg >> 8;
data->bank = bank;
}
static int nct6775_wmi_reg_read(void *ctx, unsigned int reg, unsigned int *val)
{
struct nct6775_data *data = ctx;
int err, word_sized = nct6775_reg_is_word_sized(data, reg);
u8 tmp = 0;
u16 res;
nct6775_wmi_set_bank(data, reg);
err = nct6775_asuswmi_read(data->bank, reg & 0xff, &tmp);
if (err)
return err;
res = tmp;
if (word_sized) {
err = nct6775_asuswmi_read(data->bank, (reg & 0xff) + 1, &tmp);
if (err)
return err;
res = (res << 8) + tmp;
}
*val = res;
return 0;
}
static int nct6775_wmi_reg_write(void *ctx, unsigned int reg, unsigned int value)
{
struct nct6775_data *data = ctx;
int res, word_sized = nct6775_reg_is_word_sized(data, reg);
nct6775_wmi_set_bank(data, reg);
if (word_sized) {
res = nct6775_asuswmi_write(data->bank, reg & 0xff, value >> 8);
if (res)
return res;
res = nct6775_asuswmi_write(data->bank, (reg & 0xff) + 1, value);
} else {
res = nct6775_asuswmi_write(data->bank, reg & 0xff, value);
}
return res;
}
/*
* On older chips, only registers 0x50-0x5f are banked.
* On more recent chips, all registers are banked.
* Assume that is the case and set the bank number for each access.
* Cache the bank number so it only needs to be set if it changes.
*/
static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
{
u8 bank = reg >> 8;
if (data->bank != bank) {
outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
outb_p(bank, data->addr + DATA_REG_OFFSET);
data->bank = bank;
}
}
static int nct6775_reg_read(void *ctx, unsigned int reg, unsigned int *val)
{
struct nct6775_data *data = ctx;
int word_sized = nct6775_reg_is_word_sized(data, reg);
nct6775_set_bank(data, reg);
outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
*val = inb_p(data->addr + DATA_REG_OFFSET);
if (word_sized) {
outb_p((reg & 0xff) + 1,
data->addr + ADDR_REG_OFFSET);
*val = (*val << 8) + inb_p(data->addr + DATA_REG_OFFSET);
}
return 0;
}
static int nct6775_reg_write(void *ctx, unsigned int reg, unsigned int value)
{
struct nct6775_data *data = ctx;
int word_sized = nct6775_reg_is_word_sized(data, reg);
nct6775_set_bank(data, reg);
outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
if (word_sized) {
outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
outb_p((reg & 0xff) + 1,
data->addr + ADDR_REG_OFFSET);
}
outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
return 0;
}
static void nct6791_enable_io_mapping(struct nct6775_sio_data *sio_data)
{
int val;
val = sio_data->sio_inb(sio_data, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
if (val & 0x10) {
pr_info("Enabling hardware monitor logical device mappings.\n");
sio_data->sio_outb(sio_data, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
val & ~0x10);
}
}
static int nct6775_suspend(struct device *dev)
{
int err;
u16 tmp;
struct nct6775_data *data = nct6775_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
mutex_lock(&data->update_lock);
err = nct6775_read_value(data, data->REG_VBAT, &tmp);
if (err)
goto out;
data->vbat = tmp;
if (data->kind == nct6775) {
err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &tmp);
if (err)
goto out;
data->fandiv1 = tmp;
err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &tmp);
if (err)
goto out;
data->fandiv2 = tmp;
}
out:
mutex_unlock(&data->update_lock);
return err;
}
static int nct6775_resume(struct device *dev)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
int i, j, err = 0;
u8 reg;
mutex_lock(&data->update_lock);
data->bank = 0xff; /* Force initial bank selection */
err = sio_data->sio_enter(sio_data);
if (err)
goto abort;
sio_data->sio_select(sio_data, NCT6775_LD_HWM);
reg = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
if (reg != data->sio_reg_enable)
sio_data->sio_outb(sio_data, SIO_REG_ENABLE, data->sio_reg_enable);
if (data->kind == nct6791 || data->kind == nct6792 ||
data->kind == nct6793 || data->kind == nct6795 ||
data->kind == nct6796 || data->kind == nct6797 ||
data->kind == nct6798 || data->kind == nct6799)
nct6791_enable_io_mapping(sio_data);
sio_data->sio_exit(sio_data);
/* Restore limits */
for (i = 0; i < data->in_num; i++) {
if (!(data->have_in & BIT(i)))
continue;
err = nct6775_write_value(data, data->REG_IN_MINMAX[0][i], data->in[i][1]);
if (err)
goto abort;
err = nct6775_write_value(data, data->REG_IN_MINMAX[1][i], data->in[i][2]);
if (err)
goto abort;
}
for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
if (!(data->has_fan_min & BIT(i)))
continue;
err = nct6775_write_value(data, data->REG_FAN_MIN[i], data->fan_min[i]);
if (err)
goto abort;
}
for (i = 0; i < NUM_TEMP; i++) {
if (!(data->have_temp & BIT(i)))
continue;
for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
if (data->reg_temp[j][i]) {
err = nct6775_write_temp(data, data->reg_temp[j][i],
data->temp[j][i]);
if (err)
goto abort;
}
}
/* Restore other settings */
err = nct6775_write_value(data, data->REG_VBAT, data->vbat);
if (err)
goto abort;
if (data->kind == nct6775) {
err = nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
if (err)
goto abort;
err = nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
}
abort:
/* Force re-reading all values */
data->valid = false;
mutex_unlock(&data->update_lock);
return err;
}
static DEFINE_SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
static void
nct6775_check_fan_inputs(struct nct6775_data *data, struct nct6775_sio_data *sio_data)
{
bool fan3pin = false, fan4pin = false, fan4min = false;
bool fan5pin = false, fan6pin = false, fan7pin = false;
bool pwm3pin = false, pwm4pin = false, pwm5pin = false;
bool pwm6pin = false, pwm7pin = false;
/* Store SIO_REG_ENABLE for use during resume */
sio_data->sio_select(sio_data, NCT6775_LD_HWM);
data->sio_reg_enable = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
/* fan4 and fan5 share some pins with the GPIO and serial flash */
if (data->kind == nct6775) {
int cr2c = sio_data->sio_inb(sio_data, 0x2c);
fan3pin = cr2c & BIT(6);
pwm3pin = cr2c & BIT(7);
/* On NCT6775, fan4 shares pins with the fdc interface */
fan4pin = !(sio_data->sio_inb(sio_data, 0x2A) & 0x80);
} else if (data->kind == nct6776) {
bool gpok = sio_data->sio_inb(sio_data, 0x27) & 0x80;
const char *board_vendor, *board_name;
board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
board_name = dmi_get_system_info(DMI_BOARD_NAME);
if (board_name && board_vendor &&
!strcmp(board_vendor, "ASRock")) {
/*
* Auxiliary fan monitoring is not enabled on ASRock
* Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
* Observed with BIOS version 2.00.
*/
if (!strcmp(board_name, "Z77 Pro4-M")) {
if ((data->sio_reg_enable & 0xe0) != 0xe0) {
data->sio_reg_enable |= 0xe0;
sio_data->sio_outb(sio_data, SIO_REG_ENABLE,
data->sio_reg_enable);
}
}
}
if (data->sio_reg_enable & 0x80)
fan3pin = gpok;
else
fan3pin = !(sio_data->sio_inb(sio_data, 0x24) & 0x40);
if (data->sio_reg_enable & 0x40)
fan4pin = gpok;
else
fan4pin = sio_data->sio_inb(sio_data, 0x1C) & 0x01;
if (data->sio_reg_enable & 0x20)
fan5pin = gpok;
else
fan5pin = sio_data->sio_inb(sio_data, 0x1C) & 0x02;
fan4min = fan4pin;
pwm3pin = fan3pin;
} else if (data->kind == nct6106) {
int cr24 = sio_data->sio_inb(sio_data, 0x24);
fan3pin = !(cr24 & 0x80);
pwm3pin = cr24 & 0x08;
} else if (data->kind == nct6116) {
int cr1a = sio_data->sio_inb(sio_data, 0x1a);
int cr1b = sio_data->sio_inb(sio_data, 0x1b);
int cr24 = sio_data->sio_inb(sio_data, 0x24);
int cr2a = sio_data->sio_inb(sio_data, 0x2a);
int cr2b = sio_data->sio_inb(sio_data, 0x2b);
int cr2f = sio_data->sio_inb(sio_data, 0x2f);
fan3pin = !(cr2b & 0x10);
fan4pin = (cr2b & 0x80) || // pin 1(2)
(!(cr2f & 0x10) && (cr1a & 0x04)); // pin 65(66)
fan5pin = (cr2b & 0x80) || // pin 126(127)
(!(cr1b & 0x03) && (cr2a & 0x02)); // pin 94(96)
pwm3pin = fan3pin && (cr24 & 0x08);
pwm4pin = fan4pin;
pwm5pin = fan5pin;
} else {
/*
* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D, NCT6796D,
* NCT6797D, NCT6798D, NCT6799D
*/
int cr1a = sio_data->sio_inb(sio_data, 0x1a);
int cr1b = sio_data->sio_inb(sio_data, 0x1b);
int cr1c = sio_data->sio_inb(sio_data, 0x1c);
int cr1d = sio_data->sio_inb(sio_data, 0x1d);
int cr2a = sio_data->sio_inb(sio_data, 0x2a);
int cr2b = sio_data->sio_inb(sio_data, 0x2b);
int cr2d = sio_data->sio_inb(sio_data, 0x2d);
int cr2f = sio_data->sio_inb(sio_data, 0x2f);
bool vsb_ctl_en = cr2f & BIT(0);
bool dsw_en = cr2f & BIT(3);
bool ddr4_en = cr2f & BIT(4);
bool as_seq1_en = cr2f & BIT(7);
int cre0;
int cre6;
int creb;
int cred;
cre6 = sio_data->sio_inb(sio_data, 0xe6);
sio_data->sio_select(sio_data, NCT6775_LD_12);
cre0 = sio_data->sio_inb(sio_data, 0xe0);
creb = sio_data->sio_inb(sio_data, 0xeb);
cred = sio_data->sio_inb(sio_data, 0xed);
fan3pin = !(cr1c & BIT(5));
fan4pin = !(cr1c & BIT(6));
fan5pin = !(cr1c & BIT(7));
pwm3pin = !(cr1c & BIT(0));
pwm4pin = !(cr1c & BIT(1));
pwm5pin = !(cr1c & BIT(2));
switch (data->kind) {
case nct6791:
fan6pin = cr2d & BIT(1);
pwm6pin = cr2d & BIT(0);
break;
case nct6792:
fan6pin = !dsw_en && (cr2d & BIT(1));
pwm6pin = !dsw_en && (cr2d & BIT(0));
break;
case nct6793:
fan5pin |= cr1b & BIT(5);
fan5pin |= creb & BIT(5);
fan6pin = !dsw_en && (cr2d & BIT(1));
fan6pin |= creb & BIT(3);
pwm5pin |= cr2d & BIT(7);
pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
pwm6pin = !dsw_en && (cr2d & BIT(0));
pwm6pin |= creb & BIT(2);
break;
case nct6795:
fan5pin |= cr1b & BIT(5);
fan5pin |= creb & BIT(5);
fan6pin = (cr2a & BIT(4)) &&
(!dsw_en || (cred & BIT(4)));
fan6pin |= creb & BIT(3);
pwm5pin |= cr2d & BIT(7);
pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
pwm6pin |= creb & BIT(2);
break;
case nct6796:
fan5pin |= cr1b & BIT(5);
fan5pin |= (cre0 & BIT(3)) && !(cr1b & BIT(0));
fan5pin |= creb & BIT(5);
fan6pin = (cr2a & BIT(4)) &&
(!dsw_en || (cred & BIT(4)));
fan6pin |= creb & BIT(3);
fan7pin = !(cr2b & BIT(2));
pwm5pin |= cr2d & BIT(7);
pwm5pin |= (cre0 & BIT(4)) && !(cr1b & BIT(0));
pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
pwm6pin |= creb & BIT(2);
pwm7pin = !(cr1d & (BIT(2) | BIT(3)));
break;
case nct6797:
fan5pin |= !ddr4_en && (cr1b & BIT(5));
fan5pin |= creb & BIT(5);
fan6pin = cr2a & BIT(4);
fan6pin |= creb & BIT(3);
fan7pin = cr1a & BIT(1);
pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
pwm5pin |= !ddr4_en && (cr2d & BIT(7));
pwm6pin = creb & BIT(2);
pwm6pin |= cred & BIT(2);
pwm7pin = cr1d & BIT(4);
break;
case nct6798:
fan6pin = !(cr1b & BIT(0)) && (cre0 & BIT(3));
fan6pin |= cr2a & BIT(4);
fan6pin |= creb & BIT(5);
fan7pin = cr1b & BIT(5);
fan7pin |= !(cr2b & BIT(2));
fan7pin |= creb & BIT(3);
pwm6pin = !(cr1b & BIT(0)) && (cre0 & BIT(4));
pwm6pin |= !(cred & BIT(2)) && (cr2a & BIT(3));
pwm6pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
pwm7pin = !(cr1d & (BIT(2) | BIT(3)));
pwm7pin |= cr2d & BIT(7);
pwm7pin |= creb & BIT(2);
break;
case nct6799:
fan4pin = cr1c & BIT(6);
fan5pin = cr1c & BIT(7);
fan6pin = !(cr1b & BIT(0)) && (cre0 & BIT(3));
fan6pin |= cre6 & BIT(5);
fan6pin |= creb & BIT(5);
fan6pin |= !as_seq1_en && (cr2a & BIT(4));
fan7pin = cr1b & BIT(5);
fan7pin |= !vsb_ctl_en && !(cr2b & BIT(2));
fan7pin |= creb & BIT(3);
pwm6pin = !(cr1b & BIT(0)) && (cre0 & BIT(4));
pwm6pin |= !as_seq1_en && !(cred & BIT(2)) && (cr2a & BIT(3));
pwm6pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
pwm6pin |= cre6 & BIT(3);
pwm7pin = !vsb_ctl_en && !(cr1d & (BIT(2) | BIT(3)));
pwm7pin |= creb & BIT(2);
pwm7pin |= cr2d & BIT(7);
break;
default: /* NCT6779D */
break;
}
fan4min = fan4pin;
}
/* fan 1 and 2 (0x03) are always present */
data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
(fan5pin << 4) | (fan6pin << 5) | (fan7pin << 6);
data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
(fan5pin << 4) | (fan6pin << 5) | (fan7pin << 6);
data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
(pwm5pin << 4) | (pwm6pin << 5) | (pwm7pin << 6);
}
static ssize_t
cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
/* Case open detection */
static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
static ssize_t
clear_caseopen(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct nct6775_sio_data *sio_data = data->driver_data;
int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
unsigned long val;
u8 reg;
int ret;
if (kstrtoul(buf, 10, &val) || val != 0)
return -EINVAL;
mutex_lock(&data->update_lock);
/*
* Use CR registers to clear caseopen status.
* The CR registers are the same for all chips, and not all chips
* support clearing the caseopen status through "regular" registers.
*/
ret = sio_data->sio_enter(sio_data);
if (ret) {
count = ret;
goto error;
}
sio_data->sio_select(sio_data, NCT6775_LD_ACPI);
reg = sio_data->sio_inb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
sio_data->sio_outb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
sio_data->sio_outb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
sio_data->sio_exit(sio_data);
data->valid = false; /* Force cache refresh */
error:
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR(intrusion0_alarm, 0644, nct6775_show_alarm,
clear_caseopen, INTRUSION_ALARM_BASE);
static SENSOR_DEVICE_ATTR(intrusion1_alarm, 0644, nct6775_show_alarm,
clear_caseopen, INTRUSION_ALARM_BASE + 1);
static SENSOR_DEVICE_ATTR(intrusion0_beep, 0644, nct6775_show_beep,
nct6775_store_beep, INTRUSION_ALARM_BASE);
static SENSOR_DEVICE_ATTR(intrusion1_beep, 0644, nct6775_show_beep,
nct6775_store_beep, INTRUSION_ALARM_BASE + 1);
static SENSOR_DEVICE_ATTR(beep_enable, 0644, nct6775_show_beep,
nct6775_store_beep, BEEP_ENABLE_BASE);
static umode_t nct6775_other_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6775_data *data = dev_get_drvdata(dev);
if (index == 0 && !data->have_vid)
return 0;
if (index == 1 || index == 2) {
if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
return 0;
}
if (index == 3 || index == 4) {
if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
return 0;
}
return nct6775_attr_mode(data, attr);
}
/*
* nct6775_other_is_visible uses the index into the following array
* to determine if attributes should be created or not.
* Any change in order or content must be matched.
*/
static struct attribute *nct6775_attributes_other[] = {
&dev_attr_cpu0_vid.attr, /* 0 */
&sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
&sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
&sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
&sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
&sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
NULL
};
static const struct attribute_group nct6775_group_other = {
.attrs = nct6775_attributes_other,
.is_visible = nct6775_other_is_visible,
};
static int nct6775_platform_probe_init(struct nct6775_data *data)
{
int err;
u8 cr2a;
struct nct6775_sio_data *sio_data = data->driver_data;
err = sio_data->sio_enter(sio_data);
if (err)
return err;
cr2a = sio_data->sio_inb(sio_data, 0x2a);
switch (data->kind) {
case nct6775:
data->have_vid = (cr2a & 0x40);
break;
case nct6776:
data->have_vid = (cr2a & 0x60) == 0x40;
break;
case nct6106:
case nct6116:
case nct6779:
case nct6791:
case nct6792:
case nct6793:
case nct6795:
case nct6796:
case nct6797:
case nct6798:
case nct6799:
break;
}
/*
* Read VID value
* We can get the VID input values directly at logical device D 0xe3.
*/
if (data->have_vid) {
sio_data->sio_select(sio_data, NCT6775_LD_VID);
data->vid = sio_data->sio_inb(sio_data, 0xe3);
data->vrm = vid_which_vrm();
}
if (fan_debounce) {
u8 tmp;
sio_data->sio_select(sio_data, NCT6775_LD_HWM);
tmp = sio_data->sio_inb(sio_data,
NCT6775_REG_CR_FAN_DEBOUNCE);
switch (data->kind) {
case nct6106:
case nct6116:
tmp |= 0xe0;
break;
case nct6775:
tmp |= 0x1e;
break;
case nct6776:
case nct6779:
tmp |= 0x3e;
break;
case nct6791:
case nct6792:
case nct6793:
case nct6795:
case nct6796:
case nct6797:
case nct6798:
case nct6799:
tmp |= 0x7e;
break;
}
sio_data->sio_outb(sio_data, NCT6775_REG_CR_FAN_DEBOUNCE,
tmp);
pr_info("Enabled fan debounce for chip %s\n", data->name);
}
nct6775_check_fan_inputs(data, sio_data);
sio_data->sio_exit(sio_data);
return nct6775_add_attr_group(data, &nct6775_group_other);
}
static const struct regmap_config nct6775_regmap_config = {
.reg_bits = 16,
.val_bits = 16,
.reg_read = nct6775_reg_read,
.reg_write = nct6775_reg_write,
};
static const struct regmap_config nct6775_wmi_regmap_config = {
.reg_bits = 16,
.val_bits = 16,
.reg_read = nct6775_wmi_reg_read,
.reg_write = nct6775_wmi_reg_write,
};
static int nct6775_platform_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
struct nct6775_data *data;
struct resource *res;
const struct regmap_config *regmapcfg;
if (sio_data->access == access_direct) {
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH, DRVNAME))
return -EBUSY;
}
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->kind = sio_data->kind;
data->sioreg = sio_data->sioreg;
if (sio_data->access == access_direct) {
data->addr = res->start;
regmapcfg = &nct6775_regmap_config;
} else {
regmapcfg = &nct6775_wmi_regmap_config;
}
platform_set_drvdata(pdev, data);
data->driver_data = sio_data;
data->driver_init = nct6775_platform_probe_init;
return nct6775_probe(&pdev->dev, data, regmapcfg);
}
static struct platform_driver nct6775_driver = {
.driver = {
.name = DRVNAME,
.pm = pm_sleep_ptr(&nct6775_dev_pm_ops),
},
.probe = nct6775_platform_probe,
};
/* nct6775_find() looks for a '627 in the Super-I/O config space */
static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
{
u16 val;
int err;
int addr;
sio_data->access = access_direct;
sio_data->sioreg = sioaddr;
err = sio_data->sio_enter(sio_data);
if (err)
return err;
val = (sio_data->sio_inb(sio_data, SIO_REG_DEVID) << 8) |
sio_data->sio_inb(sio_data, SIO_REG_DEVID + 1);
if (force_id && val != 0xffff)
val = force_id;
switch (val & SIO_ID_MASK) {
case SIO_NCT6106_ID:
sio_data->kind = nct6106;
break;
case SIO_NCT6116_ID:
sio_data->kind = nct6116;
break;
case SIO_NCT6775_ID:
sio_data->kind = nct6775;
break;
case SIO_NCT6776_ID:
sio_data->kind = nct6776;
break;
case SIO_NCT6779_ID:
sio_data->kind = nct6779;
break;
case SIO_NCT6791_ID:
sio_data->kind = nct6791;
break;
case SIO_NCT6792_ID:
sio_data->kind = nct6792;
break;
case SIO_NCT6793_ID:
sio_data->kind = nct6793;
break;
case SIO_NCT6795_ID:
sio_data->kind = nct6795;
break;
case SIO_NCT6796_ID:
sio_data->kind = nct6796;
break;
case SIO_NCT6797_ID:
sio_data->kind = nct6797;
break;
case SIO_NCT6798_ID:
sio_data->kind = nct6798;
break;
case SIO_NCT6799_ID:
sio_data->kind = nct6799;
break;
default:
if (val != 0xffff)
pr_debug("unsupported chip ID: 0x%04x\n", val);
sio_data->sio_exit(sio_data);
return -ENODEV;
}
/* We have a known chip, find the HWM I/O address */
sio_data->sio_select(sio_data, NCT6775_LD_HWM);
val = (sio_data->sio_inb(sio_data, SIO_REG_ADDR) << 8)
| sio_data->sio_inb(sio_data, SIO_REG_ADDR + 1);
addr = val & IOREGION_ALIGNMENT;
if (addr == 0) {
pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
sio_data->sio_exit(sio_data);
return -ENODEV;
}
/* Activate logical device if needed */
val = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
if (!(val & 0x01)) {
pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
sio_data->sio_outb(sio_data, SIO_REG_ENABLE, val | 0x01);
}
if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
sio_data->kind == nct6793 || sio_data->kind == nct6795 ||
sio_data->kind == nct6796 || sio_data->kind == nct6797 ||
sio_data->kind == nct6798 || sio_data->kind == nct6799)
nct6791_enable_io_mapping(sio_data);
sio_data->sio_exit(sio_data);
pr_info("Found %s or compatible chip at %#x:%#x\n",
nct6775_sio_names[sio_data->kind], sioaddr, addr);
return addr;
}
/*
* when Super-I/O functions move to a separate file, the Super-I/O
* bus will manage the lifetime of the device and this module will only keep
* track of the nct6775 driver. But since we use platform_device_alloc(), we
* must keep track of the device
*/
static struct platform_device *pdev[2];
static const char * const asus_wmi_boards[] = {
"B360M-BASALT",
"B360M-D3H",
"EX-B360M-V",
"EX-B360M-V3",
"EX-B360M-V5",
"EX-B460M-V5",
"EX-H410M-V3",
"PRIME A520M-A",
"PRIME A520M-A II",
"PRIME A520M-E",
"PRIME A520M-K",
"PRIME B360-PLUS",
"PRIME B360M-A",
"PRIME B360M-C",
"PRIME B360M-D",
"PRIME B360M-K",
"PRIME B460-PLUS",
"PRIME B460I-PLUS",
"PRIME B460M-A",
"PRIME B460M-A R2.0",
"PRIME B460M-K",
"PRIME B550-PLUS",
"PRIME B550-PLUS AC-HES",
"PRIME B550M-A",
"PRIME B550M-A (WI-FI)",
"PRIME B550M-A AC",
"PRIME B550M-A WIFI II",
"PRIME B550M-K",
"PRIME H310-PLUS",
"PRIME H310I-PLUS",
"PRIME H310M-A",
"PRIME H310M-C",
"PRIME H310M-D",
"PRIME H310M-DASH",
"PRIME H310M-E",
"PRIME H310M-E/BR",
"PRIME H310M-F",
"PRIME H310M-K",
"PRIME H310T",
"PRIME H370-A",
"PRIME H370-PLUS",
"PRIME H370M-PLUS",
"PRIME H410I-PLUS",
"PRIME H410M-A",
"PRIME H410M-D",
"PRIME H410M-E",
"PRIME H410M-F",
"PRIME H410M-K",
"PRIME H410M-K R2.0",
"PRIME H410M-R",
"PRIME H470-PLUS",
"PRIME H470M-PLUS",
"PRIME H510M-K R2.0",
"PRIME Q370M-C",
"PRIME X570-P",
"PRIME X570-PRO",
"PRIME Z390-A",
"PRIME Z390-A/H10",
"PRIME Z390-P",
"PRIME Z390M-PLUS",
"PRIME Z490-A",
"PRIME Z490-P",
"PRIME Z490-V",
"PRIME Z490M-PLUS",
"PRO B460M-C",
"PRO H410M-C",
"PRO H410T",
"PRO Q470M-C",
"Pro A520M-C",
"Pro A520M-C II",
"Pro B550M-C",
"Pro WS X570-ACE",
"ProArt B550-CREATOR",
"ProArt X570-CREATOR WIFI",
"ProArt Z490-CREATOR 10G",
"ROG CROSSHAIR VIII DARK HERO",
"ROG CROSSHAIR VIII EXTREME",
"ROG CROSSHAIR VIII FORMULA",
"ROG CROSSHAIR VIII HERO",
"ROG CROSSHAIR VIII HERO (WI-FI)",
"ROG CROSSHAIR VIII IMPACT",
"ROG MAXIMUS XI APEX",
"ROG MAXIMUS XI CODE",
"ROG MAXIMUS XI EXTREME",
"ROG MAXIMUS XI FORMULA",
"ROG MAXIMUS XI GENE",
"ROG MAXIMUS XI HERO",
"ROG MAXIMUS XI HERO (WI-FI)",
"ROG MAXIMUS XII APEX",
"ROG MAXIMUS XII EXTREME",
"ROG MAXIMUS XII FORMULA",
"ROG MAXIMUS XII HERO (WI-FI)",
"ROG STRIX B360-F GAMING",
"ROG STRIX B360-G GAMING",
"ROG STRIX B360-H GAMING",
"ROG STRIX B360-H GAMING/OPTANE",
"ROG STRIX B360-I GAMING",
"ROG STRIX B460-F GAMING",
"ROG STRIX B460-G GAMING",
"ROG STRIX B460-H GAMING",
"ROG STRIX B460-I GAMING",
"ROG STRIX B550-A GAMING",
"ROG STRIX B550-E GAMING",
"ROG STRIX B550-F GAMING",
"ROG STRIX B550-F GAMING (WI-FI)",
"ROG STRIX B550-F GAMING WIFI II",
"ROG STRIX B550-I GAMING",
"ROG STRIX B550-XE GAMING WIFI",
"ROG STRIX H370-F GAMING",
"ROG STRIX H370-I GAMING",
"ROG STRIX H470-I GAMING",
"ROG STRIX X570-E GAMING",
"ROG STRIX X570-E GAMING WIFI II",
"ROG STRIX X570-F GAMING",
"ROG STRIX X570-I GAMING",
"ROG STRIX Z390-E GAMING",
"ROG STRIX Z390-F GAMING",
"ROG STRIX Z390-H GAMING",
"ROG STRIX Z390-I GAMING",
"ROG STRIX Z490-A GAMING",
"ROG STRIX Z490-E GAMING",
"ROG STRIX Z490-F GAMING",
"ROG STRIX Z490-G GAMING",
"ROG STRIX Z490-G GAMING (WI-FI)",
"ROG STRIX Z490-H GAMING",
"ROG STRIX Z490-I GAMING",
"TUF B360-PLUS GAMING",
"TUF B360-PRO GAMING",
"TUF B360-PRO GAMING (WI-FI)",
"TUF B360M-E GAMING",
"TUF B360M-PLUS GAMING",
"TUF B360M-PLUS GAMING S",
"TUF B360M-PLUS GAMING/BR",
"TUF GAMING A520M-PLUS",
"TUF GAMING A520M-PLUS II",
"TUF GAMING A520M-PLUS WIFI",
"TUF GAMING B460-PLUS",
"TUF GAMING B460-PRO (WI-FI)",
"TUF GAMING B460M-PLUS",
"TUF GAMING B460M-PLUS (WI-FI)",
"TUF GAMING B460M-PRO",
"TUF GAMING B550-PLUS",
"TUF GAMING B550-PLUS (WI-FI)",
"TUF GAMING B550-PLUS WIFI II",
"TUF GAMING B550-PRO",
"TUF GAMING B550M ZAKU (WI-FI)",
"TUF GAMING B550M-E",
"TUF GAMING B550M-E WIFI",
"TUF GAMING B550M-PLUS",
"TUF GAMING B550M-PLUS (WI-FI)",
"TUF GAMING B550M-PLUS WIFI II",
"TUF GAMING H470-PRO",
"TUF GAMING H470-PRO (WI-FI)",
"TUF GAMING X570-PLUS",
"TUF GAMING X570-PLUS (WI-FI)",
"TUF GAMING X570-PLUS_BR",
"TUF GAMING X570-PRO (WI-FI)",
"TUF GAMING X570-PRO WIFI II",
"TUF GAMING Z490-PLUS",
"TUF GAMING Z490-PLUS (WI-FI)",
"TUF H310-PLUS GAMING",
"TUF H310M-PLUS GAMING",
"TUF H310M-PLUS GAMING/BR",
"TUF H370-PRO GAMING",
"TUF H370-PRO GAMING (WI-FI)",
"TUF Z390-PLUS GAMING",
"TUF Z390-PLUS GAMING (WI-FI)",
"TUF Z390-PRO GAMING",
"TUF Z390M-PRO GAMING",
"TUF Z390M-PRO GAMING (WI-FI)",
"WS Z390 PRO",
"Z490-GUNDAM (WI-FI)",
};
static const char * const asus_msi_boards[] = {
"B560M-P",
"EX-B560M-V5",
"EX-B660M-V5 D4",
"EX-B660M-V5 PRO D4",
"EX-B760M-V5 D4",
"EX-H510M-V3",
"EX-H610M-V3 D4",
"PRIME A620M-A",
"PRIME B560-PLUS",
"PRIME B560-PLUS AC-HES",
"PRIME B560M-A",
"PRIME B560M-A AC",
"PRIME B560M-K",
"PRIME B650-PLUS",
"PRIME B650M-A",
"PRIME B650M-A AX",
"PRIME B650M-A AX II",
"PRIME B650M-A II",
"PRIME B650M-A WIFI",
"PRIME B650M-A WIFI II",
"PRIME B660-PLUS D4",
"PRIME B660M-A AC D4",
"PRIME B660M-A D4",
"PRIME B660M-A WIFI D4",
"PRIME B760-PLUS",
"PRIME B760-PLUS D4",
"PRIME B760M-A",
"PRIME B760M-A AX D4",
"PRIME B760M-A D4",
"PRIME B760M-A WIFI",
"PRIME B760M-A WIFI D4",
"PRIME B760M-AJ D4",
"PRIME B760M-K D4",
"PRIME H510M-A",
"PRIME H510M-A WIFI",
"PRIME H510M-D",
"PRIME H510M-E",
"PRIME H510M-F",
"PRIME H510M-K",
"PRIME H510M-R",
"PRIME H510T2/CSM",
"PRIME H570-PLUS",
"PRIME H570M-PLUS",
"PRIME H610I-PLUS D4",
"PRIME H610M-A D4",
"PRIME H610M-A WIFI D4",
"PRIME H610M-D D4",
"PRIME H610M-E D4",
"PRIME H610M-F D4",
"PRIME H610M-K D4",
"PRIME H610M-R D4",
"PRIME H670-PLUS D4",
"PRIME H770-PLUS D4",
"PRIME X670-P",
"PRIME X670-P WIFI",
"PRIME X670E-PRO WIFI",
"PRIME Z590-A",
"PRIME Z590-P",
"PRIME Z590-P WIFI",
"PRIME Z590-V",
"PRIME Z590M-PLUS",
"PRIME Z690-A",
"PRIME Z690-P",
"PRIME Z690-P D4",
"PRIME Z690-P WIFI",
"PRIME Z690-P WIFI D4",
"PRIME Z690M-PLUS D4",
"PRIME Z790-A WIFI",
"PRIME Z790-P",
"PRIME Z790-P D4",
"PRIME Z790-P WIFI",
"PRIME Z790-P WIFI D4",
"PRIME Z790M-PLUS",
"PRIME Z790M-PLUS D4",
"Pro B560M-C",
"Pro B560M-CT",
"Pro B660M-C",
"Pro B660M-C D4",
"Pro B760M-C",
"Pro B760M-CT",
"Pro H510M-C",
"Pro H510M-CT",
"Pro H610M-C",
"Pro H610M-C D4",
"Pro H610M-CT D4",
"Pro H610T D4",
"Pro Q670M-C",
"Pro WS W680-ACE",
"Pro WS W680-ACE IPMI",
"Pro WS W790-ACE",
"Pro WS W790E-SAGE SE",
"ProArt B650-CREATOR",
"ProArt B660-CREATOR D4",
"ProArt B760-CREATOR D4",
"ProArt X670E-CREATOR WIFI",
"ProArt Z690-CREATOR WIFI",
"ProArt Z790-CREATOR WIFI",
"ROG CROSSHAIR X670E EXTREME",
"ROG CROSSHAIR X670E GENE",
"ROG CROSSHAIR X670E HERO",
"ROG MAXIMUS XIII APEX",
"ROG MAXIMUS XIII EXTREME",
"ROG MAXIMUS XIII EXTREME GLACIAL",
"ROG MAXIMUS XIII HERO",
"ROG MAXIMUS Z690 APEX",
"ROG MAXIMUS Z690 EXTREME",
"ROG MAXIMUS Z690 EXTREME GLACIAL",
"ROG MAXIMUS Z690 FORMULA",
"ROG MAXIMUS Z690 HERO",
"ROG MAXIMUS Z690 HERO EVA",
"ROG MAXIMUS Z790 APEX",
"ROG MAXIMUS Z790 EXTREME",
"ROG MAXIMUS Z790 HERO",
"ROG STRIX B560-A GAMING WIFI",
"ROG STRIX B560-E GAMING WIFI",
"ROG STRIX B560-F GAMING WIFI",
"ROG STRIX B560-G GAMING WIFI",
"ROG STRIX B560-I GAMING WIFI",
"ROG STRIX B650-A GAMING WIFI",
"ROG STRIX B650E-E GAMING WIFI",
"ROG STRIX B650E-F GAMING WIFI",
"ROG STRIX B650E-I GAMING WIFI",
"ROG STRIX B660-A GAMING WIFI",
"ROG STRIX B660-A GAMING WIFI D4",
"ROG STRIX B660-F GAMING WIFI",
"ROG STRIX B660-G GAMING WIFI",
"ROG STRIX B660-I GAMING WIFI",
"ROG STRIX B760-A GAMING WIFI",
"ROG STRIX B760-A GAMING WIFI D4",
"ROG STRIX B760-F GAMING WIFI",
"ROG STRIX B760-G GAMING WIFI",
"ROG STRIX B760-G GAMING WIFI D4",
"ROG STRIX B760-I GAMING WIFI",
"ROG STRIX X670E-A GAMING WIFI",
"ROG STRIX X670E-E GAMING WIFI",
"ROG STRIX X670E-F GAMING WIFI",
"ROG STRIX X670E-I GAMING WIFI",
"ROG STRIX Z590-A GAMING WIFI",
"ROG STRIX Z590-A GAMING WIFI II",
"ROG STRIX Z590-E GAMING WIFI",
"ROG STRIX Z590-F GAMING WIFI",
"ROG STRIX Z590-I GAMING WIFI",
"ROG STRIX Z690-A GAMING WIFI",
"ROG STRIX Z690-A GAMING WIFI D4",
"ROG STRIX Z690-E GAMING WIFI",
"ROG STRIX Z690-F GAMING WIFI",
"ROG STRIX Z690-G GAMING WIFI",
"ROG STRIX Z690-I GAMING WIFI",
"ROG STRIX Z790-A GAMING WIFI",
"ROG STRIX Z790-A GAMING WIFI D4",
"ROG STRIX Z790-E GAMING WIFI",
"ROG STRIX Z790-F GAMING WIFI",
"ROG STRIX Z790-H GAMING WIFI",
"ROG STRIX Z790-I GAMING WIFI",
"TUF GAMING A620M-PLUS",
"TUF GAMING A620M-PLUS WIFI",
"TUF GAMING B560-PLUS WIFI",
"TUF GAMING B560M-E",
"TUF GAMING B560M-PLUS",
"TUF GAMING B560M-PLUS WIFI",
"TUF GAMING B650-PLUS",
"TUF GAMING B650-PLUS WIFI",
"TUF GAMING B650M-PLUS",
"TUF GAMING B650M-PLUS WIFI",
"TUF GAMING B660-PLUS WIFI D4",
"TUF GAMING B660M-E D4",
"TUF GAMING B660M-PLUS D4",
"TUF GAMING B660M-PLUS WIFI",
"TUF GAMING B660M-PLUS WIFI D4",
"TUF GAMING B760-PLUS WIFI",
"TUF GAMING B760-PLUS WIFI D4",
"TUF GAMING B760M-BTF WIFI D4",
"TUF GAMING B760M-E D4",
"TUF GAMING B760M-PLUS",
"TUF GAMING B760M-PLUS D4",
"TUF GAMING B760M-PLUS WIFI",
"TUF GAMING B760M-PLUS WIFI D4",
"TUF GAMING H570-PRO",
"TUF GAMING H570-PRO WIFI",
"TUF GAMING H670-PRO WIFI D4",
"TUF GAMING H770-PRO WIFI",
"TUF GAMING X670E-PLUS",
"TUF GAMING X670E-PLUS WIFI",
"TUF GAMING Z590-PLUS",
"TUF GAMING Z590-PLUS WIFI",
"TUF GAMING Z690-PLUS",
"TUF GAMING Z690-PLUS D4",
"TUF GAMING Z690-PLUS WIFI",
"TUF GAMING Z690-PLUS WIFI D4",
"TUF GAMING Z790-PLUS D4",
"TUF GAMING Z790-PLUS WIFI",
"TUF GAMING Z790-PLUS WIFI D4",
"Z590 WIFI GUNDAM EDITION",
};
#if IS_ENABLED(CONFIG_ACPI)
/*
* Callback for acpi_bus_for_each_dev() to find the right device
* by _UID and _HID and return 1 to stop iteration.
*/
static int nct6775_asuswmi_device_match(struct device *dev, void *data)
{
struct acpi_device *adev = to_acpi_device(dev);
const char *uid = acpi_device_uid(adev);
const char *hid = acpi_device_hid(adev);
if (hid && !strcmp(hid, ASUSWMI_DEVICE_HID) && uid && !strcmp(uid, data)) {
asus_acpi_dev = adev;
return 1;
}
return 0;
}
#endif
static enum sensor_access nct6775_determine_access(const char *device_uid)
{
#if IS_ENABLED(CONFIG_ACPI)
u8 tmp;
acpi_bus_for_each_dev(nct6775_asuswmi_device_match, (void *)device_uid);
if (!asus_acpi_dev)
return access_direct;
/* if reading chip id via ACPI succeeds, use WMI "WMBD" method for access */
if (!nct6775_asuswmi_read(0, NCT6775_PORT_CHIPID, &tmp) && tmp) {
pr_debug("Using Asus WMBD method of %s to access %#x chip.\n", device_uid, tmp);
return access_asuswmi;
}
#endif
return access_direct;
}
static int __init sensors_nct6775_platform_init(void)
{
int i, err;
bool found = false;
int address;
struct resource res;
struct nct6775_sio_data sio_data;
int sioaddr[2] = { 0x2e, 0x4e };
enum sensor_access access = access_direct;
const char *board_vendor, *board_name;
err = platform_driver_register(&nct6775_driver);
if (err)
return err;
board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
board_name = dmi_get_system_info(DMI_BOARD_NAME);
if (board_name && board_vendor &&
!strcmp(board_vendor, "ASUSTeK COMPUTER INC.")) {
err = match_string(asus_wmi_boards, ARRAY_SIZE(asus_wmi_boards),
board_name);
if (err >= 0)
access = nct6775_determine_access(ASUSWMI_DEVICE_UID);
err = match_string(asus_msi_boards, ARRAY_SIZE(asus_msi_boards),
board_name);
if (err >= 0)
access = nct6775_determine_access(ASUSMSI_DEVICE_UID);
}
/*
* initialize sio_data->kind and sio_data->sioreg.
*
* when Super-I/O functions move to a separate file, the Super-I/O
* driver will probe 0x2e and 0x4e and auto-detect the presence of a
* nct6775 hardware monitor, and call probe()
*/
for (i = 0; i < ARRAY_SIZE(pdev); i++) {
sio_data.sio_outb = superio_outb;
sio_data.sio_inb = superio_inb;
sio_data.sio_select = superio_select;
sio_data.sio_enter = superio_enter;
sio_data.sio_exit = superio_exit;
address = nct6775_find(sioaddr[i], &sio_data);
if (address <= 0)
continue;
found = true;
sio_data.access = access;
if (access == access_asuswmi) {
sio_data.sio_outb = superio_wmi_outb;
sio_data.sio_inb = superio_wmi_inb;
sio_data.sio_select = superio_wmi_select;
sio_data.sio_enter = superio_wmi_enter;
sio_data.sio_exit = superio_wmi_exit;
}
pdev[i] = platform_device_alloc(DRVNAME, address);
if (!pdev[i]) {
err = -ENOMEM;
goto exit_device_unregister;
}
err = platform_device_add_data(pdev[i], &sio_data,
sizeof(struct nct6775_sio_data));
if (err)
goto exit_device_put;
if (sio_data.access == access_direct) {
memset(&res, 0, sizeof(res));
res.name = DRVNAME;
res.start = address + IOREGION_OFFSET;
res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
res.flags = IORESOURCE_IO;
err = acpi_check_resource_conflict(&res);
if (err) {
platform_device_put(pdev[i]);
pdev[i] = NULL;
continue;
}
err = platform_device_add_resources(pdev[i], &res, 1);
if (err)
goto exit_device_put;
}
/* platform_device_add calls probe() */
err = platform_device_add(pdev[i]);
if (err)
goto exit_device_put;
}
if (!found) {
err = -ENODEV;
goto exit_unregister;
}
return 0;
exit_device_put:
platform_device_put(pdev[i]);
exit_device_unregister:
while (i--)
platform_device_unregister(pdev[i]);
exit_unregister:
platform_driver_unregister(&nct6775_driver);
return err;
}
static void __exit sensors_nct6775_platform_exit(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(pdev); i++)
platform_device_unregister(pdev[i]);
platform_driver_unregister(&nct6775_driver);
}
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("Platform driver for NCT6775F and compatible chips");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(HWMON_NCT6775);
module_init(sensors_nct6775_platform_init);
module_exit(sensors_nct6775_platform_exit);
|
linux-master
|
drivers/hwmon/nct6775-platform.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* hwmon.c - part of lm_sensors, Linux kernel modules for hardware monitoring
*
* This file defines the sysfs class "hwmon", for use by sensors drivers.
*
* Copyright (C) 2005 Mark M. Hoffman <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gfp.h>
#include <linux/hwmon.h>
#include <linux/idr.h>
#include <linux/kstrtox.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/thermal.h>
#define CREATE_TRACE_POINTS
#include <trace/events/hwmon.h>
#define HWMON_ID_PREFIX "hwmon"
#define HWMON_ID_FORMAT HWMON_ID_PREFIX "%d"
struct hwmon_device {
const char *name;
const char *label;
struct device dev;
const struct hwmon_chip_info *chip;
struct list_head tzdata;
struct attribute_group group;
const struct attribute_group **groups;
};
#define to_hwmon_device(d) container_of(d, struct hwmon_device, dev)
#define MAX_SYSFS_ATTR_NAME_LENGTH 32
struct hwmon_device_attribute {
struct device_attribute dev_attr;
const struct hwmon_ops *ops;
enum hwmon_sensor_types type;
u32 attr;
int index;
char name[MAX_SYSFS_ATTR_NAME_LENGTH];
};
#define to_hwmon_attr(d) \
container_of(d, struct hwmon_device_attribute, dev_attr)
#define to_dev_attr(a) container_of(a, struct device_attribute, attr)
/*
* Thermal zone information
*/
struct hwmon_thermal_data {
struct list_head node; /* hwmon tzdata list entry */
struct device *dev; /* Reference to hwmon device */
int index; /* sensor index */
struct thermal_zone_device *tzd;/* thermal zone device */
};
static ssize_t
name_show(struct device *dev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%s\n", to_hwmon_device(dev)->name);
}
static DEVICE_ATTR_RO(name);
static ssize_t
label_show(struct device *dev, struct device_attribute *attr, char *buf)
{
return sysfs_emit(buf, "%s\n", to_hwmon_device(dev)->label);
}
static DEVICE_ATTR_RO(label);
static struct attribute *hwmon_dev_attrs[] = {
&dev_attr_name.attr,
&dev_attr_label.attr,
NULL
};
static umode_t hwmon_dev_attr_is_visible(struct kobject *kobj,
struct attribute *attr, int n)
{
struct device *dev = kobj_to_dev(kobj);
struct hwmon_device *hdev = to_hwmon_device(dev);
if (attr == &dev_attr_name.attr && hdev->name == NULL)
return 0;
if (attr == &dev_attr_label.attr && hdev->label == NULL)
return 0;
return attr->mode;
}
static const struct attribute_group hwmon_dev_attr_group = {
.attrs = hwmon_dev_attrs,
.is_visible = hwmon_dev_attr_is_visible,
};
static const struct attribute_group *hwmon_dev_attr_groups[] = {
&hwmon_dev_attr_group,
NULL
};
static void hwmon_free_attrs(struct attribute **attrs)
{
int i;
for (i = 0; attrs[i]; i++) {
struct device_attribute *dattr = to_dev_attr(attrs[i]);
struct hwmon_device_attribute *hattr = to_hwmon_attr(dattr);
kfree(hattr);
}
kfree(attrs);
}
static void hwmon_dev_release(struct device *dev)
{
struct hwmon_device *hwdev = to_hwmon_device(dev);
if (hwdev->group.attrs)
hwmon_free_attrs(hwdev->group.attrs);
kfree(hwdev->groups);
kfree(hwdev->label);
kfree(hwdev);
}
static struct class hwmon_class = {
.name = "hwmon",
.dev_groups = hwmon_dev_attr_groups,
.dev_release = hwmon_dev_release,
};
static DEFINE_IDA(hwmon_ida);
/* Thermal zone handling */
/*
* The complex conditional is necessary to avoid a cyclic dependency
* between hwmon and thermal_sys modules.
*/
#ifdef CONFIG_THERMAL_OF
static int hwmon_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
{
struct hwmon_thermal_data *tdata = thermal_zone_device_priv(tz);
struct hwmon_device *hwdev = to_hwmon_device(tdata->dev);
int ret;
long t;
ret = hwdev->chip->ops->read(tdata->dev, hwmon_temp, hwmon_temp_input,
tdata->index, &t);
if (ret < 0)
return ret;
*temp = t;
return 0;
}
static int hwmon_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
{
struct hwmon_thermal_data *tdata = thermal_zone_device_priv(tz);
struct hwmon_device *hwdev = to_hwmon_device(tdata->dev);
const struct hwmon_chip_info *chip = hwdev->chip;
const struct hwmon_channel_info * const *info = chip->info;
unsigned int i;
int err;
if (!chip->ops->write)
return 0;
for (i = 0; info[i] && info[i]->type != hwmon_temp; i++)
continue;
if (!info[i])
return 0;
if (info[i]->config[tdata->index] & HWMON_T_MIN) {
err = chip->ops->write(tdata->dev, hwmon_temp,
hwmon_temp_min, tdata->index, low);
if (err && err != -EOPNOTSUPP)
return err;
}
if (info[i]->config[tdata->index] & HWMON_T_MAX) {
err = chip->ops->write(tdata->dev, hwmon_temp,
hwmon_temp_max, tdata->index, high);
if (err && err != -EOPNOTSUPP)
return err;
}
return 0;
}
static const struct thermal_zone_device_ops hwmon_thermal_ops = {
.get_temp = hwmon_thermal_get_temp,
.set_trips = hwmon_thermal_set_trips,
};
static void hwmon_thermal_remove_sensor(void *data)
{
list_del(data);
}
static int hwmon_thermal_add_sensor(struct device *dev, int index)
{
struct hwmon_device *hwdev = to_hwmon_device(dev);
struct hwmon_thermal_data *tdata;
struct thermal_zone_device *tzd;
int err;
tdata = devm_kzalloc(dev, sizeof(*tdata), GFP_KERNEL);
if (!tdata)
return -ENOMEM;
tdata->dev = dev;
tdata->index = index;
tzd = devm_thermal_of_zone_register(dev, index, tdata,
&hwmon_thermal_ops);
if (IS_ERR(tzd)) {
if (PTR_ERR(tzd) != -ENODEV)
return PTR_ERR(tzd);
dev_info(dev, "temp%d_input not attached to any thermal zone\n",
index + 1);
devm_kfree(dev, tdata);
return 0;
}
err = devm_add_action(dev, hwmon_thermal_remove_sensor, &tdata->node);
if (err)
return err;
tdata->tzd = tzd;
list_add(&tdata->node, &hwdev->tzdata);
return 0;
}
static int hwmon_thermal_register_sensors(struct device *dev)
{
struct hwmon_device *hwdev = to_hwmon_device(dev);
const struct hwmon_chip_info *chip = hwdev->chip;
const struct hwmon_channel_info * const *info = chip->info;
void *drvdata = dev_get_drvdata(dev);
int i;
for (i = 1; info[i]; i++) {
int j;
if (info[i]->type != hwmon_temp)
continue;
for (j = 0; info[i]->config[j]; j++) {
int err;
if (!(info[i]->config[j] & HWMON_T_INPUT) ||
!chip->ops->is_visible(drvdata, hwmon_temp,
hwmon_temp_input, j))
continue;
err = hwmon_thermal_add_sensor(dev, j);
if (err)
return err;
}
}
return 0;
}
static void hwmon_thermal_notify(struct device *dev, int index)
{
struct hwmon_device *hwdev = to_hwmon_device(dev);
struct hwmon_thermal_data *tzdata;
list_for_each_entry(tzdata, &hwdev->tzdata, node) {
if (tzdata->index == index) {
thermal_zone_device_update(tzdata->tzd,
THERMAL_EVENT_UNSPECIFIED);
}
}
}
#else
static int hwmon_thermal_register_sensors(struct device *dev)
{
return 0;
}
static void hwmon_thermal_notify(struct device *dev, int index) { }
#endif /* IS_REACHABLE(CONFIG_THERMAL) && ... */
static int hwmon_attr_base(enum hwmon_sensor_types type)
{
if (type == hwmon_in || type == hwmon_intrusion)
return 0;
return 1;
}
/* sysfs attribute management */
static ssize_t hwmon_attr_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct hwmon_device_attribute *hattr = to_hwmon_attr(devattr);
long val;
int ret;
ret = hattr->ops->read(dev, hattr->type, hattr->attr, hattr->index,
&val);
if (ret < 0)
return ret;
trace_hwmon_attr_show(hattr->index + hwmon_attr_base(hattr->type),
hattr->name, val);
return sprintf(buf, "%ld\n", val);
}
static ssize_t hwmon_attr_show_string(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct hwmon_device_attribute *hattr = to_hwmon_attr(devattr);
enum hwmon_sensor_types type = hattr->type;
const char *s;
int ret;
ret = hattr->ops->read_string(dev, hattr->type, hattr->attr,
hattr->index, &s);
if (ret < 0)
return ret;
trace_hwmon_attr_show_string(hattr->index + hwmon_attr_base(type),
hattr->name, s);
return sprintf(buf, "%s\n", s);
}
static ssize_t hwmon_attr_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct hwmon_device_attribute *hattr = to_hwmon_attr(devattr);
long val;
int ret;
ret = kstrtol(buf, 10, &val);
if (ret < 0)
return ret;
ret = hattr->ops->write(dev, hattr->type, hattr->attr, hattr->index,
val);
if (ret < 0)
return ret;
trace_hwmon_attr_store(hattr->index + hwmon_attr_base(hattr->type),
hattr->name, val);
return count;
}
static bool is_string_attr(enum hwmon_sensor_types type, u32 attr)
{
return (type == hwmon_temp && attr == hwmon_temp_label) ||
(type == hwmon_in && attr == hwmon_in_label) ||
(type == hwmon_curr && attr == hwmon_curr_label) ||
(type == hwmon_power && attr == hwmon_power_label) ||
(type == hwmon_energy && attr == hwmon_energy_label) ||
(type == hwmon_humidity && attr == hwmon_humidity_label) ||
(type == hwmon_fan && attr == hwmon_fan_label);
}
static struct attribute *hwmon_genattr(const void *drvdata,
enum hwmon_sensor_types type,
u32 attr,
int index,
const char *template,
const struct hwmon_ops *ops)
{
struct hwmon_device_attribute *hattr;
struct device_attribute *dattr;
struct attribute *a;
umode_t mode;
const char *name;
bool is_string = is_string_attr(type, attr);
/* The attribute is invisible if there is no template string */
if (!template)
return ERR_PTR(-ENOENT);
mode = ops->is_visible(drvdata, type, attr, index);
if (!mode)
return ERR_PTR(-ENOENT);
if ((mode & 0444) && ((is_string && !ops->read_string) ||
(!is_string && !ops->read)))
return ERR_PTR(-EINVAL);
if ((mode & 0222) && !ops->write)
return ERR_PTR(-EINVAL);
hattr = kzalloc(sizeof(*hattr), GFP_KERNEL);
if (!hattr)
return ERR_PTR(-ENOMEM);
if (type == hwmon_chip) {
name = template;
} else {
scnprintf(hattr->name, sizeof(hattr->name), template,
index + hwmon_attr_base(type));
name = hattr->name;
}
hattr->type = type;
hattr->attr = attr;
hattr->index = index;
hattr->ops = ops;
dattr = &hattr->dev_attr;
dattr->show = is_string ? hwmon_attr_show_string : hwmon_attr_show;
dattr->store = hwmon_attr_store;
a = &dattr->attr;
sysfs_attr_init(a);
a->name = name;
a->mode = mode;
return a;
}
/*
* Chip attributes are not attribute templates but actual sysfs attributes.
* See hwmon_genattr() for special handling.
*/
static const char * const hwmon_chip_attrs[] = {
[hwmon_chip_temp_reset_history] = "temp_reset_history",
[hwmon_chip_in_reset_history] = "in_reset_history",
[hwmon_chip_curr_reset_history] = "curr_reset_history",
[hwmon_chip_power_reset_history] = "power_reset_history",
[hwmon_chip_update_interval] = "update_interval",
[hwmon_chip_alarms] = "alarms",
[hwmon_chip_samples] = "samples",
[hwmon_chip_curr_samples] = "curr_samples",
[hwmon_chip_in_samples] = "in_samples",
[hwmon_chip_power_samples] = "power_samples",
[hwmon_chip_temp_samples] = "temp_samples",
[hwmon_chip_beep_enable] = "beep_enable",
};
static const char * const hwmon_temp_attr_templates[] = {
[hwmon_temp_enable] = "temp%d_enable",
[hwmon_temp_input] = "temp%d_input",
[hwmon_temp_type] = "temp%d_type",
[hwmon_temp_lcrit] = "temp%d_lcrit",
[hwmon_temp_lcrit_hyst] = "temp%d_lcrit_hyst",
[hwmon_temp_min] = "temp%d_min",
[hwmon_temp_min_hyst] = "temp%d_min_hyst",
[hwmon_temp_max] = "temp%d_max",
[hwmon_temp_max_hyst] = "temp%d_max_hyst",
[hwmon_temp_crit] = "temp%d_crit",
[hwmon_temp_crit_hyst] = "temp%d_crit_hyst",
[hwmon_temp_emergency] = "temp%d_emergency",
[hwmon_temp_emergency_hyst] = "temp%d_emergency_hyst",
[hwmon_temp_alarm] = "temp%d_alarm",
[hwmon_temp_lcrit_alarm] = "temp%d_lcrit_alarm",
[hwmon_temp_min_alarm] = "temp%d_min_alarm",
[hwmon_temp_max_alarm] = "temp%d_max_alarm",
[hwmon_temp_crit_alarm] = "temp%d_crit_alarm",
[hwmon_temp_emergency_alarm] = "temp%d_emergency_alarm",
[hwmon_temp_fault] = "temp%d_fault",
[hwmon_temp_offset] = "temp%d_offset",
[hwmon_temp_label] = "temp%d_label",
[hwmon_temp_lowest] = "temp%d_lowest",
[hwmon_temp_highest] = "temp%d_highest",
[hwmon_temp_reset_history] = "temp%d_reset_history",
[hwmon_temp_rated_min] = "temp%d_rated_min",
[hwmon_temp_rated_max] = "temp%d_rated_max",
[hwmon_temp_beep] = "temp%d_beep",
};
static const char * const hwmon_in_attr_templates[] = {
[hwmon_in_enable] = "in%d_enable",
[hwmon_in_input] = "in%d_input",
[hwmon_in_min] = "in%d_min",
[hwmon_in_max] = "in%d_max",
[hwmon_in_lcrit] = "in%d_lcrit",
[hwmon_in_crit] = "in%d_crit",
[hwmon_in_average] = "in%d_average",
[hwmon_in_lowest] = "in%d_lowest",
[hwmon_in_highest] = "in%d_highest",
[hwmon_in_reset_history] = "in%d_reset_history",
[hwmon_in_label] = "in%d_label",
[hwmon_in_alarm] = "in%d_alarm",
[hwmon_in_min_alarm] = "in%d_min_alarm",
[hwmon_in_max_alarm] = "in%d_max_alarm",
[hwmon_in_lcrit_alarm] = "in%d_lcrit_alarm",
[hwmon_in_crit_alarm] = "in%d_crit_alarm",
[hwmon_in_rated_min] = "in%d_rated_min",
[hwmon_in_rated_max] = "in%d_rated_max",
[hwmon_in_beep] = "in%d_beep",
};
static const char * const hwmon_curr_attr_templates[] = {
[hwmon_curr_enable] = "curr%d_enable",
[hwmon_curr_input] = "curr%d_input",
[hwmon_curr_min] = "curr%d_min",
[hwmon_curr_max] = "curr%d_max",
[hwmon_curr_lcrit] = "curr%d_lcrit",
[hwmon_curr_crit] = "curr%d_crit",
[hwmon_curr_average] = "curr%d_average",
[hwmon_curr_lowest] = "curr%d_lowest",
[hwmon_curr_highest] = "curr%d_highest",
[hwmon_curr_reset_history] = "curr%d_reset_history",
[hwmon_curr_label] = "curr%d_label",
[hwmon_curr_alarm] = "curr%d_alarm",
[hwmon_curr_min_alarm] = "curr%d_min_alarm",
[hwmon_curr_max_alarm] = "curr%d_max_alarm",
[hwmon_curr_lcrit_alarm] = "curr%d_lcrit_alarm",
[hwmon_curr_crit_alarm] = "curr%d_crit_alarm",
[hwmon_curr_rated_min] = "curr%d_rated_min",
[hwmon_curr_rated_max] = "curr%d_rated_max",
[hwmon_curr_beep] = "curr%d_beep",
};
static const char * const hwmon_power_attr_templates[] = {
[hwmon_power_enable] = "power%d_enable",
[hwmon_power_average] = "power%d_average",
[hwmon_power_average_interval] = "power%d_average_interval",
[hwmon_power_average_interval_max] = "power%d_interval_max",
[hwmon_power_average_interval_min] = "power%d_interval_min",
[hwmon_power_average_highest] = "power%d_average_highest",
[hwmon_power_average_lowest] = "power%d_average_lowest",
[hwmon_power_average_max] = "power%d_average_max",
[hwmon_power_average_min] = "power%d_average_min",
[hwmon_power_input] = "power%d_input",
[hwmon_power_input_highest] = "power%d_input_highest",
[hwmon_power_input_lowest] = "power%d_input_lowest",
[hwmon_power_reset_history] = "power%d_reset_history",
[hwmon_power_accuracy] = "power%d_accuracy",
[hwmon_power_cap] = "power%d_cap",
[hwmon_power_cap_hyst] = "power%d_cap_hyst",
[hwmon_power_cap_max] = "power%d_cap_max",
[hwmon_power_cap_min] = "power%d_cap_min",
[hwmon_power_min] = "power%d_min",
[hwmon_power_max] = "power%d_max",
[hwmon_power_lcrit] = "power%d_lcrit",
[hwmon_power_crit] = "power%d_crit",
[hwmon_power_label] = "power%d_label",
[hwmon_power_alarm] = "power%d_alarm",
[hwmon_power_cap_alarm] = "power%d_cap_alarm",
[hwmon_power_min_alarm] = "power%d_min_alarm",
[hwmon_power_max_alarm] = "power%d_max_alarm",
[hwmon_power_lcrit_alarm] = "power%d_lcrit_alarm",
[hwmon_power_crit_alarm] = "power%d_crit_alarm",
[hwmon_power_rated_min] = "power%d_rated_min",
[hwmon_power_rated_max] = "power%d_rated_max",
};
static const char * const hwmon_energy_attr_templates[] = {
[hwmon_energy_enable] = "energy%d_enable",
[hwmon_energy_input] = "energy%d_input",
[hwmon_energy_label] = "energy%d_label",
};
static const char * const hwmon_humidity_attr_templates[] = {
[hwmon_humidity_enable] = "humidity%d_enable",
[hwmon_humidity_input] = "humidity%d_input",
[hwmon_humidity_label] = "humidity%d_label",
[hwmon_humidity_min] = "humidity%d_min",
[hwmon_humidity_min_hyst] = "humidity%d_min_hyst",
[hwmon_humidity_max] = "humidity%d_max",
[hwmon_humidity_max_hyst] = "humidity%d_max_hyst",
[hwmon_humidity_alarm] = "humidity%d_alarm",
[hwmon_humidity_fault] = "humidity%d_fault",
[hwmon_humidity_rated_min] = "humidity%d_rated_min",
[hwmon_humidity_rated_max] = "humidity%d_rated_max",
};
static const char * const hwmon_fan_attr_templates[] = {
[hwmon_fan_enable] = "fan%d_enable",
[hwmon_fan_input] = "fan%d_input",
[hwmon_fan_label] = "fan%d_label",
[hwmon_fan_min] = "fan%d_min",
[hwmon_fan_max] = "fan%d_max",
[hwmon_fan_div] = "fan%d_div",
[hwmon_fan_pulses] = "fan%d_pulses",
[hwmon_fan_target] = "fan%d_target",
[hwmon_fan_alarm] = "fan%d_alarm",
[hwmon_fan_min_alarm] = "fan%d_min_alarm",
[hwmon_fan_max_alarm] = "fan%d_max_alarm",
[hwmon_fan_fault] = "fan%d_fault",
[hwmon_fan_beep] = "fan%d_beep",
};
static const char * const hwmon_pwm_attr_templates[] = {
[hwmon_pwm_input] = "pwm%d",
[hwmon_pwm_enable] = "pwm%d_enable",
[hwmon_pwm_mode] = "pwm%d_mode",
[hwmon_pwm_freq] = "pwm%d_freq",
[hwmon_pwm_auto_channels_temp] = "pwm%d_auto_channels_temp",
};
static const char * const hwmon_intrusion_attr_templates[] = {
[hwmon_intrusion_alarm] = "intrusion%d_alarm",
[hwmon_intrusion_beep] = "intrusion%d_beep",
};
static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attrs,
[hwmon_temp] = hwmon_temp_attr_templates,
[hwmon_in] = hwmon_in_attr_templates,
[hwmon_curr] = hwmon_curr_attr_templates,
[hwmon_power] = hwmon_power_attr_templates,
[hwmon_energy] = hwmon_energy_attr_templates,
[hwmon_humidity] = hwmon_humidity_attr_templates,
[hwmon_fan] = hwmon_fan_attr_templates,
[hwmon_pwm] = hwmon_pwm_attr_templates,
[hwmon_intrusion] = hwmon_intrusion_attr_templates,
};
static const int __templates_size[] = {
[hwmon_chip] = ARRAY_SIZE(hwmon_chip_attrs),
[hwmon_temp] = ARRAY_SIZE(hwmon_temp_attr_templates),
[hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
[hwmon_curr] = ARRAY_SIZE(hwmon_curr_attr_templates),
[hwmon_power] = ARRAY_SIZE(hwmon_power_attr_templates),
[hwmon_energy] = ARRAY_SIZE(hwmon_energy_attr_templates),
[hwmon_humidity] = ARRAY_SIZE(hwmon_humidity_attr_templates),
[hwmon_fan] = ARRAY_SIZE(hwmon_fan_attr_templates),
[hwmon_pwm] = ARRAY_SIZE(hwmon_pwm_attr_templates),
[hwmon_intrusion] = ARRAY_SIZE(hwmon_intrusion_attr_templates),
};
int hwmon_notify_event(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel)
{
char event[MAX_SYSFS_ATTR_NAME_LENGTH + 5];
char sattr[MAX_SYSFS_ATTR_NAME_LENGTH];
char *envp[] = { event, NULL };
const char * const *templates;
const char *template;
int base;
if (type >= ARRAY_SIZE(__templates))
return -EINVAL;
if (attr >= __templates_size[type])
return -EINVAL;
templates = __templates[type];
template = templates[attr];
base = hwmon_attr_base(type);
scnprintf(sattr, MAX_SYSFS_ATTR_NAME_LENGTH, template, base + channel);
scnprintf(event, sizeof(event), "NAME=%s", sattr);
sysfs_notify(&dev->kobj, NULL, sattr);
kobject_uevent_env(&dev->kobj, KOBJ_CHANGE, envp);
if (type == hwmon_temp)
hwmon_thermal_notify(dev, channel);
return 0;
}
EXPORT_SYMBOL_GPL(hwmon_notify_event);
static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
{
int i, n;
for (i = n = 0; info->config[i]; i++)
n += hweight32(info->config[i]);
return n;
}
static int hwmon_genattrs(const void *drvdata,
struct attribute **attrs,
const struct hwmon_ops *ops,
const struct hwmon_channel_info *info)
{
const char * const *templates;
int template_size;
int i, aindex = 0;
if (info->type >= ARRAY_SIZE(__templates))
return -EINVAL;
templates = __templates[info->type];
template_size = __templates_size[info->type];
for (i = 0; info->config[i]; i++) {
u32 attr_mask = info->config[i];
u32 attr;
while (attr_mask) {
struct attribute *a;
attr = __ffs(attr_mask);
attr_mask &= ~BIT(attr);
if (attr >= template_size)
return -EINVAL;
a = hwmon_genattr(drvdata, info->type, attr, i,
templates[attr], ops);
if (IS_ERR(a)) {
if (PTR_ERR(a) != -ENOENT)
return PTR_ERR(a);
continue;
}
attrs[aindex++] = a;
}
}
return aindex;
}
static struct attribute **
__hwmon_create_attrs(const void *drvdata, const struct hwmon_chip_info *chip)
{
int ret, i, aindex = 0, nattrs = 0;
struct attribute **attrs;
for (i = 0; chip->info[i]; i++)
nattrs += hwmon_num_channel_attrs(chip->info[i]);
if (nattrs == 0)
return ERR_PTR(-EINVAL);
attrs = kcalloc(nattrs + 1, sizeof(*attrs), GFP_KERNEL);
if (!attrs)
return ERR_PTR(-ENOMEM);
for (i = 0; chip->info[i]; i++) {
ret = hwmon_genattrs(drvdata, &attrs[aindex], chip->ops,
chip->info[i]);
if (ret < 0) {
hwmon_free_attrs(attrs);
return ERR_PTR(ret);
}
aindex += ret;
}
return attrs;
}
static struct device *
__hwmon_device_register(struct device *dev, const char *name, void *drvdata,
const struct hwmon_chip_info *chip,
const struct attribute_group **groups)
{
struct hwmon_device *hwdev;
const char *label;
struct device *hdev;
struct device *tdev = dev;
int i, err, id;
/* Complain about invalid characters in hwmon name attribute */
if (name && (!strlen(name) || strpbrk(name, "-* \t\n")))
dev_warn(dev,
"hwmon: '%s' is not a valid name attribute, please fix\n",
name);
id = ida_alloc(&hwmon_ida, GFP_KERNEL);
if (id < 0)
return ERR_PTR(id);
hwdev = kzalloc(sizeof(*hwdev), GFP_KERNEL);
if (hwdev == NULL) {
err = -ENOMEM;
goto ida_remove;
}
hdev = &hwdev->dev;
if (chip) {
struct attribute **attrs;
int ngroups = 2; /* terminating NULL plus &hwdev->groups */
if (groups)
for (i = 0; groups[i]; i++)
ngroups++;
hwdev->groups = kcalloc(ngroups, sizeof(*groups), GFP_KERNEL);
if (!hwdev->groups) {
err = -ENOMEM;
goto free_hwmon;
}
attrs = __hwmon_create_attrs(drvdata, chip);
if (IS_ERR(attrs)) {
err = PTR_ERR(attrs);
goto free_hwmon;
}
hwdev->group.attrs = attrs;
ngroups = 0;
hwdev->groups[ngroups++] = &hwdev->group;
if (groups) {
for (i = 0; groups[i]; i++)
hwdev->groups[ngroups++] = groups[i];
}
hdev->groups = hwdev->groups;
} else {
hdev->groups = groups;
}
if (dev && device_property_present(dev, "label")) {
err = device_property_read_string(dev, "label", &label);
if (err < 0)
goto free_hwmon;
hwdev->label = kstrdup(label, GFP_KERNEL);
if (hwdev->label == NULL) {
err = -ENOMEM;
goto free_hwmon;
}
}
hwdev->name = name;
hdev->class = &hwmon_class;
hdev->parent = dev;
while (tdev && !tdev->of_node)
tdev = tdev->parent;
hdev->of_node = tdev ? tdev->of_node : NULL;
hwdev->chip = chip;
dev_set_drvdata(hdev, drvdata);
dev_set_name(hdev, HWMON_ID_FORMAT, id);
err = device_register(hdev);
if (err) {
put_device(hdev);
goto ida_remove;
}
INIT_LIST_HEAD(&hwdev->tzdata);
if (hdev->of_node && chip && chip->ops->read &&
chip->info[0]->type == hwmon_chip &&
(chip->info[0]->config[0] & HWMON_C_REGISTER_TZ)) {
err = hwmon_thermal_register_sensors(hdev);
if (err) {
device_unregister(hdev);
/*
* Don't worry about hwdev; hwmon_dev_release(), called
* from device_unregister(), will free it.
*/
goto ida_remove;
}
}
return hdev;
free_hwmon:
hwmon_dev_release(hdev);
ida_remove:
ida_free(&hwmon_ida, id);
return ERR_PTR(err);
}
/**
* hwmon_device_register_with_groups - register w/ hwmon
* @dev: the parent device
* @name: hwmon name attribute
* @drvdata: driver data to attach to created device
* @groups: List of attribute groups to create
*
* hwmon_device_unregister() must be called when the device is no
* longer needed.
*
* Returns the pointer to the new device.
*/
struct device *
hwmon_device_register_with_groups(struct device *dev, const char *name,
void *drvdata,
const struct attribute_group **groups)
{
if (!name)
return ERR_PTR(-EINVAL);
return __hwmon_device_register(dev, name, drvdata, NULL, groups);
}
EXPORT_SYMBOL_GPL(hwmon_device_register_with_groups);
/**
* hwmon_device_register_with_info - register w/ hwmon
* @dev: the parent device (mandatory)
* @name: hwmon name attribute (mandatory)
* @drvdata: driver data to attach to created device (optional)
* @chip: pointer to hwmon chip information (mandatory)
* @extra_groups: pointer to list of additional non-standard attribute groups
* (optional)
*
* hwmon_device_unregister() must be called when the device is no
* longer needed.
*
* Returns the pointer to the new device.
*/
struct device *
hwmon_device_register_with_info(struct device *dev, const char *name,
void *drvdata,
const struct hwmon_chip_info *chip,
const struct attribute_group **extra_groups)
{
if (!dev || !name || !chip)
return ERR_PTR(-EINVAL);
if (!chip->ops || !chip->ops->is_visible || !chip->info)
return ERR_PTR(-EINVAL);
return __hwmon_device_register(dev, name, drvdata, chip, extra_groups);
}
EXPORT_SYMBOL_GPL(hwmon_device_register_with_info);
/**
* hwmon_device_register_for_thermal - register hwmon device for thermal subsystem
* @dev: the parent device
* @name: hwmon name attribute
* @drvdata: driver data to attach to created device
*
* The use of this function is restricted. It is provided for legacy reasons
* and must only be called from the thermal subsystem.
*
* hwmon_device_unregister() must be called when the device is no
* longer needed.
*
* Returns the pointer to the new device.
*/
struct device *
hwmon_device_register_for_thermal(struct device *dev, const char *name,
void *drvdata)
{
if (!name || !dev)
return ERR_PTR(-EINVAL);
return __hwmon_device_register(dev, name, drvdata, NULL, NULL);
}
EXPORT_SYMBOL_NS_GPL(hwmon_device_register_for_thermal, HWMON_THERMAL);
/**
* hwmon_device_register - register w/ hwmon
* @dev: the device to register
*
* hwmon_device_unregister() must be called when the device is no
* longer needed.
*
* Returns the pointer to the new device.
*/
struct device *hwmon_device_register(struct device *dev)
{
dev_warn(dev,
"hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().\n");
return __hwmon_device_register(dev, NULL, NULL, NULL, NULL);
}
EXPORT_SYMBOL_GPL(hwmon_device_register);
/**
* hwmon_device_unregister - removes the previously registered class device
*
* @dev: the class device to destroy
*/
void hwmon_device_unregister(struct device *dev)
{
int id;
if (likely(sscanf(dev_name(dev), HWMON_ID_FORMAT, &id) == 1)) {
device_unregister(dev);
ida_free(&hwmon_ida, id);
} else
dev_dbg(dev->parent,
"hwmon_device_unregister() failed: bad class ID!\n");
}
EXPORT_SYMBOL_GPL(hwmon_device_unregister);
static void devm_hwmon_release(struct device *dev, void *res)
{
struct device *hwdev = *(struct device **)res;
hwmon_device_unregister(hwdev);
}
/**
* devm_hwmon_device_register_with_groups - register w/ hwmon
* @dev: the parent device
* @name: hwmon name attribute
* @drvdata: driver data to attach to created device
* @groups: List of attribute groups to create
*
* Returns the pointer to the new device. The new device is automatically
* unregistered with the parent device.
*/
struct device *
devm_hwmon_device_register_with_groups(struct device *dev, const char *name,
void *drvdata,
const struct attribute_group **groups)
{
struct device **ptr, *hwdev;
if (!dev)
return ERR_PTR(-EINVAL);
ptr = devres_alloc(devm_hwmon_release, sizeof(*ptr), GFP_KERNEL);
if (!ptr)
return ERR_PTR(-ENOMEM);
hwdev = hwmon_device_register_with_groups(dev, name, drvdata, groups);
if (IS_ERR(hwdev))
goto error;
*ptr = hwdev;
devres_add(dev, ptr);
return hwdev;
error:
devres_free(ptr);
return hwdev;
}
EXPORT_SYMBOL_GPL(devm_hwmon_device_register_with_groups);
/**
* devm_hwmon_device_register_with_info - register w/ hwmon
* @dev: the parent device
* @name: hwmon name attribute
* @drvdata: driver data to attach to created device
* @chip: pointer to hwmon chip information
* @extra_groups: pointer to list of driver specific attribute groups
*
* Returns the pointer to the new device. The new device is automatically
* unregistered with the parent device.
*/
struct device *
devm_hwmon_device_register_with_info(struct device *dev, const char *name,
void *drvdata,
const struct hwmon_chip_info *chip,
const struct attribute_group **extra_groups)
{
struct device **ptr, *hwdev;
if (!dev)
return ERR_PTR(-EINVAL);
ptr = devres_alloc(devm_hwmon_release, sizeof(*ptr), GFP_KERNEL);
if (!ptr)
return ERR_PTR(-ENOMEM);
hwdev = hwmon_device_register_with_info(dev, name, drvdata, chip,
extra_groups);
if (IS_ERR(hwdev))
goto error;
*ptr = hwdev;
devres_add(dev, ptr);
return hwdev;
error:
devres_free(ptr);
return hwdev;
}
EXPORT_SYMBOL_GPL(devm_hwmon_device_register_with_info);
static int devm_hwmon_match(struct device *dev, void *res, void *data)
{
struct device **hwdev = res;
return *hwdev == data;
}
/**
* devm_hwmon_device_unregister - removes a previously registered hwmon device
*
* @dev: the parent device of the device to unregister
*/
void devm_hwmon_device_unregister(struct device *dev)
{
WARN_ON(devres_release(dev, devm_hwmon_release, devm_hwmon_match, dev));
}
EXPORT_SYMBOL_GPL(devm_hwmon_device_unregister);
static char *__hwmon_sanitize_name(struct device *dev, const char *old_name)
{
char *name, *p;
if (dev)
name = devm_kstrdup(dev, old_name, GFP_KERNEL);
else
name = kstrdup(old_name, GFP_KERNEL);
if (!name)
return ERR_PTR(-ENOMEM);
for (p = name; *p; p++)
if (hwmon_is_bad_char(*p))
*p = '_';
return name;
}
/**
* hwmon_sanitize_name - Replaces invalid characters in a hwmon name
* @name: NUL-terminated name
*
* Allocates a new string where any invalid characters will be replaced
* by an underscore. It is the responsibility of the caller to release
* the memory.
*
* Returns newly allocated name, or ERR_PTR on error.
*/
char *hwmon_sanitize_name(const char *name)
{
return __hwmon_sanitize_name(NULL, name);
}
EXPORT_SYMBOL_GPL(hwmon_sanitize_name);
/**
* devm_hwmon_sanitize_name - resource managed hwmon_sanitize_name()
* @dev: device to allocate memory for
* @name: NUL-terminated name
*
* Allocates a new string where any invalid characters will be replaced
* by an underscore.
*
* Returns newly allocated name, or ERR_PTR on error.
*/
char *devm_hwmon_sanitize_name(struct device *dev, const char *name)
{
if (!dev)
return ERR_PTR(-EINVAL);
return __hwmon_sanitize_name(dev, name);
}
EXPORT_SYMBOL_GPL(devm_hwmon_sanitize_name);
static void __init hwmon_pci_quirks(void)
{
#if defined CONFIG_X86 && defined CONFIG_PCI
struct pci_dev *sb;
u16 base;
u8 enable;
/* Open access to 0x295-0x296 on MSI MS-7031 */
sb = pci_get_device(PCI_VENDOR_ID_ATI, 0x436c, NULL);
if (sb) {
if (sb->subsystem_vendor == 0x1462 && /* MSI */
sb->subsystem_device == 0x0031) { /* MS-7031 */
pci_read_config_byte(sb, 0x48, &enable);
pci_read_config_word(sb, 0x64, &base);
if (base == 0 && !(enable & BIT(2))) {
dev_info(&sb->dev,
"Opening wide generic port at 0x295\n");
pci_write_config_word(sb, 0x64, 0x295);
pci_write_config_byte(sb, 0x48,
enable | BIT(2));
}
}
pci_dev_put(sb);
}
#endif
}
static int __init hwmon_init(void)
{
int err;
hwmon_pci_quirks();
err = class_register(&hwmon_class);
if (err) {
pr_err("couldn't register hwmon sysfs class\n");
return err;
}
return 0;
}
static void __exit hwmon_exit(void)
{
class_unregister(&hwmon_class);
}
subsys_initcall(hwmon_init);
module_exit(hwmon_exit);
MODULE_AUTHOR("Mark M. Hoffman <[email protected]>");
MODULE_DESCRIPTION("hardware monitoring sysfs/class support");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/hwmon.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/polynomial.h>
#include <linux/regmap.h>
/*
* The original translation formulae of the temperature (in degrees of Celsius)
* are as follows:
*
* T = -3.4627e-11*(N^4) + 1.1023e-7*(N^3) + -1.9165e-4*(N^2) +
* 3.0604e-1*(N^1) + -5.6197e1
*
* where [-56.197, 136.402]C and N = [0, 1023].
*
* They must be accordingly altered to be suitable for the integer arithmetics.
* The technique is called 'factor redistribution', which just makes sure the
* multiplications and divisions are made so to have a result of the operations
* within the integer numbers limit. In addition we need to translate the
* formulae to accept millidegrees of Celsius. Here what it looks like after
* the alterations:
*
* T = -34627e-12*(N^4) + 110230e-9*(N^3) + -191650e-6*(N^2) +
* 306040e-3*(N^1) + -56197
*
* where T = [-56197, 136402]mC and N = [0, 1023].
*/
static const struct polynomial poly_N_to_temp = {
.terms = {
{4, -34627, 1000, 1},
{3, 110230, 1000, 1},
{2, -191650, 1000, 1},
{1, 306040, 1000, 1},
{0, -56197, 1, 1}
}
};
#define PVT_SENSOR_CTRL 0x0 /* unused */
#define PVT_SENSOR_CFG 0x4
#define SENSOR_CFG_CLK_CFG GENMASK(27, 20)
#define SENSOR_CFG_TRIM_VAL GENMASK(13, 9)
#define SENSOR_CFG_SAMPLE_ENA BIT(8)
#define SENSOR_CFG_START_CAPTURE BIT(7)
#define SENSOR_CFG_CONTINIOUS_MODE BIT(6)
#define SENSOR_CFG_PSAMPLE_ENA GENMASK(1, 0)
#define PVT_SENSOR_STAT 0x8
#define SENSOR_STAT_DATA_VALID BIT(10)
#define SENSOR_STAT_DATA GENMASK(9, 0)
#define FAN_CFG 0x0
#define FAN_CFG_DUTY_CYCLE GENMASK(23, 16)
#define INV_POL BIT(3)
#define GATE_ENA BIT(2)
#define PWM_OPEN_COL_ENA BIT(1)
#define FAN_STAT_CFG BIT(0)
#define FAN_PWM_FREQ 0x4
#define FAN_PWM_CYC_10US GENMASK(25, 15)
#define FAN_PWM_FREQ_FREQ GENMASK(14, 0)
#define FAN_CNT 0xc
#define FAN_CNT_DATA GENMASK(15, 0)
#define LAN966X_PVT_CLK 1200000 /* 1.2 MHz */
struct lan966x_hwmon {
struct regmap *regmap_pvt;
struct regmap *regmap_fan;
struct clk *clk;
unsigned long clk_rate;
};
static int lan966x_hwmon_read_temp(struct device *dev, long *val)
{
struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
unsigned int data;
int ret;
ret = regmap_read(hwmon->regmap_pvt, PVT_SENSOR_STAT, &data);
if (ret < 0)
return ret;
if (!(data & SENSOR_STAT_DATA_VALID))
return -ENODATA;
*val = polynomial_calc(&poly_N_to_temp,
FIELD_GET(SENSOR_STAT_DATA, data));
return 0;
}
static int lan966x_hwmon_read_fan(struct device *dev, long *val)
{
struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
unsigned int data;
int ret;
ret = regmap_read(hwmon->regmap_fan, FAN_CNT, &data);
if (ret < 0)
return ret;
/*
* Data is given in pulses per second. Assume two pulses
* per revolution.
*/
*val = FIELD_GET(FAN_CNT_DATA, data) * 60 / 2;
return 0;
}
static int lan966x_hwmon_read_pwm(struct device *dev, long *val)
{
struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
unsigned int data;
int ret;
ret = regmap_read(hwmon->regmap_fan, FAN_CFG, &data);
if (ret < 0)
return ret;
*val = FIELD_GET(FAN_CFG_DUTY_CYCLE, data);
return 0;
}
static int lan966x_hwmon_read_pwm_freq(struct device *dev, long *val)
{
struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
unsigned long tmp;
unsigned int data;
int ret;
ret = regmap_read(hwmon->regmap_fan, FAN_PWM_FREQ, &data);
if (ret < 0)
return ret;
/*
* Datasheet says it is sys_clk / 256 / pwm_freq. But in reality
* it is sys_clk / 256 / (pwm_freq + 1).
*/
data = FIELD_GET(FAN_PWM_FREQ_FREQ, data) + 1;
tmp = DIV_ROUND_CLOSEST(hwmon->clk_rate, 256);
*val = DIV_ROUND_CLOSEST(tmp, data);
return 0;
}
static int lan966x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_temp:
return lan966x_hwmon_read_temp(dev, val);
case hwmon_fan:
return lan966x_hwmon_read_fan(dev, val);
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
return lan966x_hwmon_read_pwm(dev, val);
case hwmon_pwm_freq:
return lan966x_hwmon_read_pwm_freq(dev, val);
default:
return -EOPNOTSUPP;
}
default:
return -EOPNOTSUPP;
}
}
static int lan966x_hwmon_write_pwm(struct device *dev, long val)
{
struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
if (val < 0 || val > 255)
return -EINVAL;
return regmap_update_bits(hwmon->regmap_fan, FAN_CFG,
FAN_CFG_DUTY_CYCLE,
FIELD_PREP(FAN_CFG_DUTY_CYCLE, val));
}
static int lan966x_hwmon_write_pwm_freq(struct device *dev, long val)
{
struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
if (val <= 0)
return -EINVAL;
val = DIV_ROUND_CLOSEST(hwmon->clk_rate, val);
val = DIV_ROUND_CLOSEST(val, 256) - 1;
val = clamp_val(val, 0, FAN_PWM_FREQ_FREQ);
return regmap_update_bits(hwmon->regmap_fan, FAN_PWM_FREQ,
FAN_PWM_FREQ_FREQ,
FIELD_PREP(FAN_PWM_FREQ_FREQ, val));
}
static int lan966x_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
return lan966x_hwmon_write_pwm(dev, val);
case hwmon_pwm_freq:
return lan966x_hwmon_write_pwm_freq(dev, val);
default:
return -EOPNOTSUPP;
}
default:
return -EOPNOTSUPP;
}
}
static umode_t lan966x_hwmon_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
umode_t mode = 0;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
mode = 0444;
break;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
mode = 0444;
break;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
case hwmon_pwm_freq:
mode = 0644;
break;
default:
break;
}
break;
default:
break;
}
return mode;
}
static const struct hwmon_channel_info * const lan966x_hwmon_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT),
HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT | HWMON_PWM_FREQ),
NULL
};
static const struct hwmon_ops lan966x_hwmon_ops = {
.is_visible = lan966x_hwmon_is_visible,
.read = lan966x_hwmon_read,
.write = lan966x_hwmon_write,
};
static const struct hwmon_chip_info lan966x_hwmon_chip_info = {
.ops = &lan966x_hwmon_ops,
.info = lan966x_hwmon_info,
};
static void lan966x_hwmon_disable(void *data)
{
struct lan966x_hwmon *hwmon = data;
regmap_update_bits(hwmon->regmap_pvt, PVT_SENSOR_CFG,
SENSOR_CFG_SAMPLE_ENA | SENSOR_CFG_CONTINIOUS_MODE,
0);
}
static int lan966x_hwmon_enable(struct device *dev,
struct lan966x_hwmon *hwmon)
{
unsigned int mask = SENSOR_CFG_CLK_CFG |
SENSOR_CFG_SAMPLE_ENA |
SENSOR_CFG_START_CAPTURE |
SENSOR_CFG_CONTINIOUS_MODE |
SENSOR_CFG_PSAMPLE_ENA;
unsigned int val;
unsigned int div;
int ret;
/* enable continuous mode */
val = SENSOR_CFG_SAMPLE_ENA | SENSOR_CFG_CONTINIOUS_MODE;
/* set PVT clock to be between 1.15 and 1.25 MHz */
div = DIV_ROUND_CLOSEST(hwmon->clk_rate, LAN966X_PVT_CLK);
val |= FIELD_PREP(SENSOR_CFG_CLK_CFG, div);
ret = regmap_update_bits(hwmon->regmap_pvt, PVT_SENSOR_CFG,
mask, val);
if (ret)
return ret;
return devm_add_action_or_reset(dev, lan966x_hwmon_disable, hwmon);
}
static struct regmap *lan966x_init_regmap(struct platform_device *pdev,
const char *name)
{
struct regmap_config regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
};
void __iomem *base;
base = devm_platform_ioremap_resource_byname(pdev, name);
if (IS_ERR(base))
return ERR_CAST(base);
regmap_config.name = name;
return devm_regmap_init_mmio(&pdev->dev, base, ®map_config);
}
static int lan966x_hwmon_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct lan966x_hwmon *hwmon;
struct device *hwmon_dev;
int ret;
hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
if (!hwmon)
return -ENOMEM;
hwmon->clk = devm_clk_get_enabled(dev, NULL);
if (IS_ERR(hwmon->clk))
return dev_err_probe(dev, PTR_ERR(hwmon->clk),
"failed to get clock\n");
hwmon->clk_rate = clk_get_rate(hwmon->clk);
hwmon->regmap_pvt = lan966x_init_regmap(pdev, "pvt");
if (IS_ERR(hwmon->regmap_pvt))
return dev_err_probe(dev, PTR_ERR(hwmon->regmap_pvt),
"failed to get regmap for PVT registers\n");
hwmon->regmap_fan = lan966x_init_regmap(pdev, "fan");
if (IS_ERR(hwmon->regmap_fan))
return dev_err_probe(dev, PTR_ERR(hwmon->regmap_fan),
"failed to get regmap for fan registers\n");
ret = lan966x_hwmon_enable(dev, hwmon);
if (ret)
return dev_err_probe(dev, ret, "failed to enable sensor\n");
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
"lan966x_hwmon", hwmon,
&lan966x_hwmon_chip_info, NULL);
if (IS_ERR(hwmon_dev))
return dev_err_probe(dev, PTR_ERR(hwmon_dev),
"failed to register hwmon device\n");
return 0;
}
static const struct of_device_id lan966x_hwmon_of_match[] = {
{ .compatible = "microchip,lan9668-hwmon" },
{}
};
MODULE_DEVICE_TABLE(of, lan966x_hwmon_of_match);
static struct platform_driver lan966x_hwmon_driver = {
.probe = lan966x_hwmon_probe,
.driver = {
.name = "lan966x-hwmon",
.of_match_table = lan966x_hwmon_of_match,
},
};
module_platform_driver(lan966x_hwmon_driver);
MODULE_DESCRIPTION("LAN966x Hardware Monitoring Driver");
MODULE_AUTHOR("Michael Walle <[email protected]>");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lan966x-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* pc87360.c - Part of lm_sensors, Linux kernel modules
* for hardware monitoring
* Copyright (C) 2004, 2007 Jean Delvare <[email protected]>
*
* Copied from smsc47m1.c:
* Copyright (C) 2002 Mark D. Studebaker <[email protected]>
*
* Supports the following chips:
*
* Chip #vin #fan #pwm #temp devid
* PC87360 - 2 2 - 0xE1
* PC87363 - 2 2 - 0xE8
* PC87364 - 3 3 - 0xE4
* PC87365 11 3 3 2 0xE5
* PC87366 11 3 3 3-4 0xE9
*
* This driver assumes that no more than one chip is present, and one of
* the standard Super-I/O addresses is used (0x2E/0x2F or 0x4E/0x4F).
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/acpi.h>
#include <linux/io.h>
#define DRIVER_NAME "pc87360"
/* (temp & vin) channel conversion status register flags (pdf sec.11.5.12) */
#define CHAN_CNVRTD 0x80 /* new data ready */
#define CHAN_ENA 0x01 /* enabled channel (temp or vin) */
#define CHAN_ALM_ENA 0x10 /* propagate to alarms-reg ?? (chk val!) */
#define CHAN_READY (CHAN_ENA|CHAN_CNVRTD) /* sample ready mask */
#define TEMP_OTS_OE 0x20 /* OTS Output Enable */
#define VIN_RW1C_MASK (CHAN_READY|CHAN_ALM_MAX|CHAN_ALM_MIN) /* 0x87 */
#define TEMP_RW1C_MASK (VIN_RW1C_MASK|TEMP_ALM_CRIT|TEMP_FAULT) /* 0xCF */
static u8 devid;
static struct platform_device *pdev;
static unsigned short extra_isa[3];
static u8 confreg[4];
static int init = 1;
module_param(init, int, 0);
MODULE_PARM_DESC(init,
"Chip initialization level:\n"
" 0: None\n"
"*1: Forcibly enable internal voltage and temperature channels, except in9\n"
" 2: Forcibly enable all voltage and temperature channels, except in9\n"
" 3: Forcibly enable all voltage and temperature channels, including in9");
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
/*
* Super-I/O registers and operations
*/
#define DEV 0x07 /* Register: Logical device select */
#define DEVID 0x20 /* Register: Device ID */
#define ACT 0x30 /* Register: Device activation */
#define BASE 0x60 /* Register: Base address */
#define FSCM 0x09 /* Logical device: fans */
#define VLM 0x0d /* Logical device: voltages */
#define TMS 0x0e /* Logical device: temperatures */
#define LDNI_MAX 3
static const u8 logdev[LDNI_MAX] = { FSCM, VLM, TMS };
#define LD_FAN 0
#define LD_IN 1
#define LD_TEMP 2
static inline void superio_outb(int sioaddr, int reg, int val)
{
outb(reg, sioaddr);
outb(val, sioaddr + 1);
}
static inline int superio_inb(int sioaddr, int reg)
{
outb(reg, sioaddr);
return inb(sioaddr + 1);
}
static inline void superio_exit(int sioaddr)
{
outb(0x02, sioaddr);
outb(0x02, sioaddr + 1);
}
/*
* Logical devices
*/
#define PC87360_EXTENT 0x10
#define PC87365_REG_BANK 0x09
#define NO_BANK 0xff
/*
* Fan registers and conversions
*/
/* nr has to be 0 or 1 (PC87360/87363) or 2 (PC87364/87365/87366) */
#define PC87360_REG_PRESCALE(nr) (0x00 + 2 * (nr))
#define PC87360_REG_PWM(nr) (0x01 + 2 * (nr))
#define PC87360_REG_FAN_MIN(nr) (0x06 + 3 * (nr))
#define PC87360_REG_FAN(nr) (0x07 + 3 * (nr))
#define PC87360_REG_FAN_STATUS(nr) (0x08 + 3 * (nr))
#define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : \
480000 / ((val) * (div)))
#define FAN_TO_REG(val, div) ((val) <= 100 ? 0 : \
480000 / ((val) * (div)))
#define FAN_DIV_FROM_REG(val) (1 << (((val) >> 5) & 0x03))
#define FAN_STATUS_FROM_REG(val) ((val) & 0x07)
#define FAN_CONFIG_MONITOR(val, nr) (((val) >> (2 + (nr) * 3)) & 1)
#define FAN_CONFIG_CONTROL(val, nr) (((val) >> (3 + (nr) * 3)) & 1)
#define FAN_CONFIG_INVERT(val, nr) (((val) >> (4 + (nr) * 3)) & 1)
#define PWM_FROM_REG(val, inv) ((inv) ? 255 - (val) : (val))
static inline u8 PWM_TO_REG(int val, int inv)
{
if (inv)
val = 255 - val;
if (val < 0)
return 0;
if (val > 255)
return 255;
return val;
}
/*
* Voltage registers and conversions
*/
#define PC87365_REG_IN_CONVRATE 0x07
#define PC87365_REG_IN_CONFIG 0x08
#define PC87365_REG_IN 0x0B
#define PC87365_REG_IN_MIN 0x0D
#define PC87365_REG_IN_MAX 0x0C
#define PC87365_REG_IN_STATUS 0x0A
#define PC87365_REG_IN_ALARMS1 0x00
#define PC87365_REG_IN_ALARMS2 0x01
#define PC87365_REG_VID 0x06
#define IN_FROM_REG(val, ref) (((val) * (ref) + 128) / 256)
#define IN_TO_REG(val, ref) ((val) < 0 ? 0 : \
(val) * 256 >= (ref) * 255 ? 255 : \
((val) * 256 + (ref) / 2) / (ref))
/*
* Temperature registers and conversions
*/
#define PC87365_REG_TEMP_CONFIG 0x08
#define PC87365_REG_TEMP 0x0B
#define PC87365_REG_TEMP_MIN 0x0D
#define PC87365_REG_TEMP_MAX 0x0C
#define PC87365_REG_TEMP_CRIT 0x0E
#define PC87365_REG_TEMP_STATUS 0x0A
#define PC87365_REG_TEMP_ALARMS 0x00
#define TEMP_FROM_REG(val) ((val) * 1000)
#define TEMP_TO_REG(val) ((val) < -55000 ? -55 : \
(val) > 127000 ? 127 : \
(val) < 0 ? ((val) - 500) / 1000 : \
((val) + 500) / 1000)
/*
* Device data
*/
struct pc87360_data {
const char *name;
struct device *hwmon_dev;
struct mutex lock;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
int address[3];
u8 fannr, innr, tempnr;
u8 fan[3]; /* Register value */
u8 fan_min[3]; /* Register value */
u8 fan_status[3]; /* Register value */
u8 pwm[3]; /* Register value */
u16 fan_conf; /* Configuration register values, combined */
u16 in_vref; /* 1 mV/bit */
u8 in[14]; /* Register value */
u8 in_min[14]; /* Register value */
u8 in_max[14]; /* Register value */
u8 in_crit[3]; /* Register value */
u8 in_status[14]; /* Register value */
u16 in_alarms; /* Register values, combined, masked */
u8 vid_conf; /* Configuration register value */
u8 vrm;
u8 vid; /* Register value */
s8 temp[3]; /* Register value */
s8 temp_min[3]; /* Register value */
s8 temp_max[3]; /* Register value */
s8 temp_crit[3]; /* Register value */
u8 temp_status[3]; /* Register value */
u8 temp_alarms; /* Register value, masked */
};
/*
* ldi is the logical device index
* bank is for voltages and temperatures only
*/
static int pc87360_read_value(struct pc87360_data *data, u8 ldi, u8 bank,
u8 reg)
{
int res;
mutex_lock(&(data->lock));
if (bank != NO_BANK)
outb_p(bank, data->address[ldi] + PC87365_REG_BANK);
res = inb_p(data->address[ldi] + reg);
mutex_unlock(&(data->lock));
return res;
}
static void pc87360_write_value(struct pc87360_data *data, u8 ldi, u8 bank,
u8 reg, u8 value)
{
mutex_lock(&(data->lock));
if (bank != NO_BANK)
outb_p(bank, data->address[ldi] + PC87365_REG_BANK);
outb_p(value, data->address[ldi] + reg);
mutex_unlock(&(data->lock));
}
static void pc87360_autodiv(struct device *dev, int nr)
{
struct pc87360_data *data = dev_get_drvdata(dev);
u8 old_min = data->fan_min[nr];
/* Increase clock divider if needed and possible */
if ((data->fan_status[nr] & 0x04) /* overflow flag */
|| (data->fan[nr] >= 224)) { /* next to overflow */
if ((data->fan_status[nr] & 0x60) != 0x60) {
data->fan_status[nr] += 0x20;
data->fan_min[nr] >>= 1;
data->fan[nr] >>= 1;
dev_dbg(dev,
"Increasing clock divider to %d for fan %d\n",
FAN_DIV_FROM_REG(data->fan_status[nr]), nr + 1);
}
} else {
/* Decrease clock divider if possible */
while (!(data->fan_min[nr] & 0x80) /* min "nails" divider */
&& data->fan[nr] < 85 /* bad accuracy */
&& (data->fan_status[nr] & 0x60) != 0x00) {
data->fan_status[nr] -= 0x20;
data->fan_min[nr] <<= 1;
data->fan[nr] <<= 1;
dev_dbg(dev,
"Decreasing clock divider to %d for fan %d\n",
FAN_DIV_FROM_REG(data->fan_status[nr]),
nr + 1);
}
}
/* Write new fan min if it changed */
if (old_min != data->fan_min[nr]) {
pc87360_write_value(data, LD_FAN, NO_BANK,
PC87360_REG_FAN_MIN(nr),
data->fan_min[nr]);
}
}
static struct pc87360_data *pc87360_update_device(struct device *dev)
{
struct pc87360_data *data = dev_get_drvdata(dev);
u8 i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ * 2) || !data->valid) {
dev_dbg(dev, "Data update\n");
/* Fans */
for (i = 0; i < data->fannr; i++) {
if (FAN_CONFIG_MONITOR(data->fan_conf, i)) {
data->fan_status[i] =
pc87360_read_value(data, LD_FAN,
NO_BANK, PC87360_REG_FAN_STATUS(i));
data->fan[i] = pc87360_read_value(data, LD_FAN,
NO_BANK, PC87360_REG_FAN(i));
data->fan_min[i] = pc87360_read_value(data,
LD_FAN, NO_BANK,
PC87360_REG_FAN_MIN(i));
/* Change clock divider if needed */
pc87360_autodiv(dev, i);
/* Clear bits and write new divider */
pc87360_write_value(data, LD_FAN, NO_BANK,
PC87360_REG_FAN_STATUS(i),
data->fan_status[i]);
}
if (FAN_CONFIG_CONTROL(data->fan_conf, i))
data->pwm[i] = pc87360_read_value(data, LD_FAN,
NO_BANK, PC87360_REG_PWM(i));
}
/* Voltages */
for (i = 0; i < data->innr; i++) {
data->in_status[i] = pc87360_read_value(data, LD_IN, i,
PC87365_REG_IN_STATUS);
/* Clear bits */
pc87360_write_value(data, LD_IN, i,
PC87365_REG_IN_STATUS,
data->in_status[i]);
if ((data->in_status[i] & CHAN_READY) == CHAN_READY) {
data->in[i] = pc87360_read_value(data, LD_IN,
i, PC87365_REG_IN);
}
if (data->in_status[i] & CHAN_ENA) {
data->in_min[i] = pc87360_read_value(data,
LD_IN, i,
PC87365_REG_IN_MIN);
data->in_max[i] = pc87360_read_value(data,
LD_IN, i,
PC87365_REG_IN_MAX);
if (i >= 11)
data->in_crit[i-11] =
pc87360_read_value(data, LD_IN,
i, PC87365_REG_TEMP_CRIT);
}
}
if (data->innr) {
data->in_alarms = pc87360_read_value(data, LD_IN,
NO_BANK, PC87365_REG_IN_ALARMS1)
| ((pc87360_read_value(data, LD_IN,
NO_BANK, PC87365_REG_IN_ALARMS2)
& 0x07) << 8);
data->vid = (data->vid_conf & 0xE0) ?
pc87360_read_value(data, LD_IN,
NO_BANK, PC87365_REG_VID) : 0x1F;
}
/* Temperatures */
for (i = 0; i < data->tempnr; i++) {
data->temp_status[i] = pc87360_read_value(data,
LD_TEMP, i,
PC87365_REG_TEMP_STATUS);
/* Clear bits */
pc87360_write_value(data, LD_TEMP, i,
PC87365_REG_TEMP_STATUS,
data->temp_status[i]);
if ((data->temp_status[i] & CHAN_READY) == CHAN_READY) {
data->temp[i] = pc87360_read_value(data,
LD_TEMP, i,
PC87365_REG_TEMP);
}
if (data->temp_status[i] & CHAN_ENA) {
data->temp_min[i] = pc87360_read_value(data,
LD_TEMP, i,
PC87365_REG_TEMP_MIN);
data->temp_max[i] = pc87360_read_value(data,
LD_TEMP, i,
PC87365_REG_TEMP_MAX);
data->temp_crit[i] = pc87360_read_value(data,
LD_TEMP, i,
PC87365_REG_TEMP_CRIT);
}
}
if (data->tempnr) {
data->temp_alarms = pc87360_read_value(data, LD_TEMP,
NO_BANK, PC87365_REG_TEMP_ALARMS)
& 0x3F;
}
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t in_input_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", IN_FROM_REG(data->in[attr->index],
data->in_vref));
}
static struct sensor_device_attribute in_input[] = {
SENSOR_ATTR_RO(in0_input, in_input, 0),
SENSOR_ATTR_RO(in1_input, in_input, 1),
SENSOR_ATTR_RO(in2_input, in_input, 2),
SENSOR_ATTR_RO(in3_input, in_input, 3),
SENSOR_ATTR_RO(in4_input, in_input, 4),
SENSOR_ATTR_RO(in5_input, in_input, 5),
SENSOR_ATTR_RO(in6_input, in_input, 6),
SENSOR_ATTR_RO(in7_input, in_input, 7),
SENSOR_ATTR_RO(in8_input, in_input, 8),
SENSOR_ATTR_RO(in9_input, in_input, 9),
SENSOR_ATTR_RO(in10_input, in_input, 10),
};
static ssize_t in_status_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", data->in_status[attr->index]);
}
static struct sensor_device_attribute in_status[] = {
SENSOR_ATTR_RO(in0_status, in_status, 0),
SENSOR_ATTR_RO(in1_status, in_status, 1),
SENSOR_ATTR_RO(in2_status, in_status, 2),
SENSOR_ATTR_RO(in3_status, in_status, 3),
SENSOR_ATTR_RO(in4_status, in_status, 4),
SENSOR_ATTR_RO(in5_status, in_status, 5),
SENSOR_ATTR_RO(in6_status, in_status, 6),
SENSOR_ATTR_RO(in7_status, in_status, 7),
SENSOR_ATTR_RO(in8_status, in_status, 8),
SENSOR_ATTR_RO(in9_status, in_status, 9),
SENSOR_ATTR_RO(in10_status, in_status, 10),
};
static ssize_t in_min_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", IN_FROM_REG(data->in_min[attr->index],
data->in_vref));
}
static ssize_t in_min_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[attr->index] = IN_TO_REG(val, data->in_vref);
pc87360_write_value(data, LD_IN, attr->index, PC87365_REG_IN_MIN,
data->in_min[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute in_min[] = {
SENSOR_ATTR_RW(in0_min, in_min, 0),
SENSOR_ATTR_RW(in1_min, in_min, 1),
SENSOR_ATTR_RW(in2_min, in_min, 2),
SENSOR_ATTR_RW(in3_min, in_min, 3),
SENSOR_ATTR_RW(in4_min, in_min, 4),
SENSOR_ATTR_RW(in5_min, in_min, 5),
SENSOR_ATTR_RW(in6_min, in_min, 6),
SENSOR_ATTR_RW(in7_min, in_min, 7),
SENSOR_ATTR_RW(in8_min, in_min, 8),
SENSOR_ATTR_RW(in9_min, in_min, 9),
SENSOR_ATTR_RW(in10_min, in_min, 10),
};
static ssize_t in_max_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", IN_FROM_REG(data->in_max[attr->index],
data->in_vref));
}
static ssize_t in_max_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[attr->index] = IN_TO_REG(val,
data->in_vref);
pc87360_write_value(data, LD_IN, attr->index, PC87365_REG_IN_MAX,
data->in_max[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute in_max[] = {
SENSOR_ATTR_RW(in0_max, in_max, 0),
SENSOR_ATTR_RW(in1_max, in_max, 1),
SENSOR_ATTR_RW(in2_max, in_max, 2),
SENSOR_ATTR_RW(in3_max, in_max, 3),
SENSOR_ATTR_RW(in4_max, in_max, 4),
SENSOR_ATTR_RW(in5_max, in_max, 5),
SENSOR_ATTR_RW(in6_max, in_max, 6),
SENSOR_ATTR_RW(in7_max, in_max, 7),
SENSOR_ATTR_RW(in8_max, in_max, 8),
SENSOR_ATTR_RW(in9_max, in_max, 9),
SENSOR_ATTR_RW(in10_max, in_max, 10),
};
/* (temp & vin) channel status register alarm bits (pdf sec.11.5.12) */
#define CHAN_ALM_MIN 0x02 /* min limit crossed */
#define CHAN_ALM_MAX 0x04 /* max limit exceeded */
#define TEMP_ALM_CRIT 0x08 /* temp crit exceeded (temp only) */
/*
* show_in_min/max_alarm() reads data from the per-channel status
* register (sec 11.5.12), not the vin event status registers (sec
* 11.5.2) that (legacy) show_in_alarm() resds (via data->in_alarms)
*/
static ssize_t in_min_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->in_status[nr] & CHAN_ALM_MIN));
}
static struct sensor_device_attribute in_min_alarm[] = {
SENSOR_ATTR_RO(in0_min_alarm, in_min_alarm, 0),
SENSOR_ATTR_RO(in1_min_alarm, in_min_alarm, 1),
SENSOR_ATTR_RO(in2_min_alarm, in_min_alarm, 2),
SENSOR_ATTR_RO(in3_min_alarm, in_min_alarm, 3),
SENSOR_ATTR_RO(in4_min_alarm, in_min_alarm, 4),
SENSOR_ATTR_RO(in5_min_alarm, in_min_alarm, 5),
SENSOR_ATTR_RO(in6_min_alarm, in_min_alarm, 6),
SENSOR_ATTR_RO(in7_min_alarm, in_min_alarm, 7),
SENSOR_ATTR_RO(in8_min_alarm, in_min_alarm, 8),
SENSOR_ATTR_RO(in9_min_alarm, in_min_alarm, 9),
SENSOR_ATTR_RO(in10_min_alarm, in_min_alarm, 10),
};
static ssize_t in_max_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->in_status[nr] & CHAN_ALM_MAX));
}
static struct sensor_device_attribute in_max_alarm[] = {
SENSOR_ATTR_RO(in0_max_alarm, in_max_alarm, 0),
SENSOR_ATTR_RO(in1_max_alarm, in_max_alarm, 1),
SENSOR_ATTR_RO(in2_max_alarm, in_max_alarm, 2),
SENSOR_ATTR_RO(in3_max_alarm, in_max_alarm, 3),
SENSOR_ATTR_RO(in4_max_alarm, in_max_alarm, 4),
SENSOR_ATTR_RO(in5_max_alarm, in_max_alarm, 5),
SENSOR_ATTR_RO(in6_max_alarm, in_max_alarm, 6),
SENSOR_ATTR_RO(in7_max_alarm, in_max_alarm, 7),
SENSOR_ATTR_RO(in8_max_alarm, in_max_alarm, 8),
SENSOR_ATTR_RO(in9_max_alarm, in_max_alarm, 9),
SENSOR_ATTR_RO(in10_max_alarm, in_max_alarm, 10),
};
#define VIN_UNIT_ATTRS(X) \
&in_input[X].dev_attr.attr, \
&in_status[X].dev_attr.attr, \
&in_min[X].dev_attr.attr, \
&in_max[X].dev_attr.attr, \
&in_min_alarm[X].dev_attr.attr, \
&in_max_alarm[X].dev_attr.attr
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct pc87360_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%u\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct pc87360_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
static ssize_t alarms_in_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", data->in_alarms);
}
static DEVICE_ATTR_RO(alarms_in);
static struct attribute *pc8736x_vin_attr_array[] = {
VIN_UNIT_ATTRS(0),
VIN_UNIT_ATTRS(1),
VIN_UNIT_ATTRS(2),
VIN_UNIT_ATTRS(3),
VIN_UNIT_ATTRS(4),
VIN_UNIT_ATTRS(5),
VIN_UNIT_ATTRS(6),
VIN_UNIT_ATTRS(7),
VIN_UNIT_ATTRS(8),
VIN_UNIT_ATTRS(9),
VIN_UNIT_ATTRS(10),
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
&dev_attr_alarms_in.attr,
NULL
};
static const struct attribute_group pc8736x_vin_group = {
.attrs = pc8736x_vin_attr_array,
};
static ssize_t therm_input_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", IN_FROM_REG(data->in[attr->index],
data->in_vref));
}
/*
* the +11 term below reflects the fact that VLM units 11,12,13 are
* used in the chip to measure voltage across the thermistors
*/
static struct sensor_device_attribute therm_input[] = {
SENSOR_ATTR_RO(temp4_input, therm_input, 0 + 11),
SENSOR_ATTR_RO(temp5_input, therm_input, 1 + 11),
SENSOR_ATTR_RO(temp6_input, therm_input, 2 + 11),
};
static ssize_t therm_status_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", data->in_status[attr->index]);
}
static struct sensor_device_attribute therm_status[] = {
SENSOR_ATTR_RO(temp4_status, therm_status, 0 + 11),
SENSOR_ATTR_RO(temp5_status, therm_status, 1 + 11),
SENSOR_ATTR_RO(temp6_status, therm_status, 2 + 11),
};
static ssize_t therm_min_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", IN_FROM_REG(data->in_min[attr->index],
data->in_vref));
}
static ssize_t therm_min_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[attr->index] = IN_TO_REG(val, data->in_vref);
pc87360_write_value(data, LD_IN, attr->index, PC87365_REG_TEMP_MIN,
data->in_min[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute therm_min[] = {
SENSOR_ATTR_RW(temp4_min, therm_min, 0 + 11),
SENSOR_ATTR_RW(temp5_min, therm_min, 1 + 11),
SENSOR_ATTR_RW(temp6_min, therm_min, 2 + 11),
};
static ssize_t therm_max_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", IN_FROM_REG(data->in_max[attr->index],
data->in_vref));
}
static ssize_t therm_max_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[attr->index] = IN_TO_REG(val, data->in_vref);
pc87360_write_value(data, LD_IN, attr->index, PC87365_REG_TEMP_MAX,
data->in_max[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute therm_max[] = {
SENSOR_ATTR_RW(temp4_max, therm_max, 0 + 11),
SENSOR_ATTR_RW(temp5_max, therm_max, 1 + 11),
SENSOR_ATTR_RW(temp6_max, therm_max, 2 + 11),
};
static ssize_t therm_crit_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", IN_FROM_REG(data->in_crit[attr->index-11],
data->in_vref));
}
static ssize_t therm_crit_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_crit[attr->index-11] = IN_TO_REG(val, data->in_vref);
pc87360_write_value(data, LD_IN, attr->index, PC87365_REG_TEMP_CRIT,
data->in_crit[attr->index-11]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute therm_crit[] = {
SENSOR_ATTR_RW(temp4_crit, therm_crit, 0 + 11),
SENSOR_ATTR_RW(temp5_crit, therm_crit, 1 + 11),
SENSOR_ATTR_RW(temp6_crit, therm_crit, 2 + 11),
};
/*
* show_therm_min/max_alarm() reads data from the per-channel voltage
* status register (sec 11.5.12)
*/
static ssize_t therm_min_alarm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->in_status[nr] & CHAN_ALM_MIN));
}
static struct sensor_device_attribute therm_min_alarm[] = {
SENSOR_ATTR_RO(temp4_min_alarm, therm_min_alarm, 0 + 11),
SENSOR_ATTR_RO(temp5_min_alarm, therm_min_alarm, 1 + 11),
SENSOR_ATTR_RO(temp6_min_alarm, therm_min_alarm, 2 + 11),
};
static ssize_t therm_max_alarm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->in_status[nr] & CHAN_ALM_MAX));
}
static struct sensor_device_attribute therm_max_alarm[] = {
SENSOR_ATTR_RO(temp4_max_alarm, therm_max_alarm, 0 + 11),
SENSOR_ATTR_RO(temp5_max_alarm, therm_max_alarm, 1 + 11),
SENSOR_ATTR_RO(temp6_max_alarm, therm_max_alarm, 2 + 11),
};
static ssize_t therm_crit_alarm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->in_status[nr] & TEMP_ALM_CRIT));
}
static struct sensor_device_attribute therm_crit_alarm[] = {
SENSOR_ATTR_RO(temp4_crit_alarm, therm_crit_alarm, 0 + 11),
SENSOR_ATTR_RO(temp5_crit_alarm, therm_crit_alarm, 1 + 11),
SENSOR_ATTR_RO(temp6_crit_alarm, therm_crit_alarm, 2 + 11),
};
#define THERM_UNIT_ATTRS(X) \
&therm_input[X].dev_attr.attr, \
&therm_status[X].dev_attr.attr, \
&therm_min[X].dev_attr.attr, \
&therm_max[X].dev_attr.attr, \
&therm_crit[X].dev_attr.attr, \
&therm_min_alarm[X].dev_attr.attr, \
&therm_max_alarm[X].dev_attr.attr, \
&therm_crit_alarm[X].dev_attr.attr
static struct attribute *pc8736x_therm_attr_array[] = {
THERM_UNIT_ATTRS(0),
THERM_UNIT_ATTRS(1),
THERM_UNIT_ATTRS(2),
NULL
};
static const struct attribute_group pc8736x_therm_group = {
.attrs = pc8736x_therm_attr_array,
};
static ssize_t temp_input_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[attr->index]));
}
static struct sensor_device_attribute temp_input[] = {
SENSOR_ATTR_RO(temp1_input, temp_input, 0),
SENSOR_ATTR_RO(temp2_input, temp_input, 1),
SENSOR_ATTR_RO(temp3_input, temp_input, 2),
};
static ssize_t temp_status_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%d\n", data->temp_status[attr->index]);
}
static struct sensor_device_attribute temp_status[] = {
SENSOR_ATTR_RO(temp1_status, temp_status, 0),
SENSOR_ATTR_RO(temp2_status, temp_status, 1),
SENSOR_ATTR_RO(temp3_status, temp_status, 2),
};
static ssize_t temp_min_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_min[attr->index]));
}
static ssize_t temp_min_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_min[attr->index] = TEMP_TO_REG(val);
pc87360_write_value(data, LD_TEMP, attr->index, PC87365_REG_TEMP_MIN,
data->temp_min[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute temp_min[] = {
SENSOR_ATTR_RW(temp1_min, temp_min, 0),
SENSOR_ATTR_RW(temp2_min, temp_min, 1),
SENSOR_ATTR_RW(temp3_min, temp_min, 2),
};
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[attr->index]));
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_max[attr->index] = TEMP_TO_REG(val);
pc87360_write_value(data, LD_TEMP, attr->index, PC87365_REG_TEMP_MAX,
data->temp_max[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute temp_max[] = {
SENSOR_ATTR_RW(temp1_max, temp_max, 0),
SENSOR_ATTR_RW(temp2_max, temp_max, 1),
SENSOR_ATTR_RW(temp3_max, temp_max, 2),
};
static ssize_t temp_crit_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%d\n",
TEMP_FROM_REG(data->temp_crit[attr->index]));
}
static ssize_t temp_crit_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_crit[attr->index] = TEMP_TO_REG(val);
pc87360_write_value(data, LD_TEMP, attr->index, PC87365_REG_TEMP_CRIT,
data->temp_crit[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute temp_crit[] = {
SENSOR_ATTR_RW(temp1_crit, temp_crit, 0),
SENSOR_ATTR_RW(temp2_crit, temp_crit, 1),
SENSOR_ATTR_RW(temp3_crit, temp_crit, 2),
};
/*
* temp_min/max_alarm_show() reads data from the per-channel status
* register (sec 12.3.7), not the temp event status registers (sec
* 12.3.2) that show_temp_alarm() reads (via data->temp_alarms)
*/
static ssize_t temp_min_alarm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->temp_status[nr] & CHAN_ALM_MIN));
}
static struct sensor_device_attribute temp_min_alarm[] = {
SENSOR_ATTR_RO(temp1_min_alarm, temp_min_alarm, 0),
SENSOR_ATTR_RO(temp2_min_alarm, temp_min_alarm, 1),
SENSOR_ATTR_RO(temp3_min_alarm, temp_min_alarm, 2),
};
static ssize_t temp_max_alarm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->temp_status[nr] & CHAN_ALM_MAX));
}
static struct sensor_device_attribute temp_max_alarm[] = {
SENSOR_ATTR_RO(temp1_max_alarm, temp_max_alarm, 0),
SENSOR_ATTR_RO(temp2_max_alarm, temp_max_alarm, 1),
SENSOR_ATTR_RO(temp3_max_alarm, temp_max_alarm, 2),
};
static ssize_t temp_crit_alarm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->temp_status[nr] & TEMP_ALM_CRIT));
}
static struct sensor_device_attribute temp_crit_alarm[] = {
SENSOR_ATTR_RO(temp1_crit_alarm, temp_crit_alarm, 0),
SENSOR_ATTR_RO(temp2_crit_alarm, temp_crit_alarm, 1),
SENSOR_ATTR_RO(temp3_crit_alarm, temp_crit_alarm, 2),
};
#define TEMP_FAULT 0x40 /* open diode */
static ssize_t temp_fault_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
unsigned nr = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%u\n", !!(data->temp_status[nr] & TEMP_FAULT));
}
static struct sensor_device_attribute temp_fault[] = {
SENSOR_ATTR_RO(temp1_fault, temp_fault, 0),
SENSOR_ATTR_RO(temp2_fault, temp_fault, 1),
SENSOR_ATTR_RO(temp3_fault, temp_fault, 2),
};
#define TEMP_UNIT_ATTRS(X) \
{ &temp_input[X].dev_attr.attr, \
&temp_status[X].dev_attr.attr, \
&temp_min[X].dev_attr.attr, \
&temp_max[X].dev_attr.attr, \
&temp_crit[X].dev_attr.attr, \
&temp_min_alarm[X].dev_attr.attr, \
&temp_max_alarm[X].dev_attr.attr, \
&temp_crit_alarm[X].dev_attr.attr, \
&temp_fault[X].dev_attr.attr, \
NULL \
}
static struct attribute *pc8736x_temp_attr[][10] = {
TEMP_UNIT_ATTRS(0),
TEMP_UNIT_ATTRS(1),
TEMP_UNIT_ATTRS(2)
};
static const struct attribute_group pc8736x_temp_attr_group[] = {
{ .attrs = pc8736x_temp_attr[0] },
{ .attrs = pc8736x_temp_attr[1] },
{ .attrs = pc8736x_temp_attr[2] }
};
static ssize_t alarms_temp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", data->temp_alarms);
}
static DEVICE_ATTR_RO(alarms_temp);
static ssize_t fan_input_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", FAN_FROM_REG(data->fan[attr->index],
FAN_DIV_FROM_REG(data->fan_status[attr->index])));
}
static struct sensor_device_attribute fan_input[] = {
SENSOR_ATTR_RO(fan1_input, fan_input, 0),
SENSOR_ATTR_RO(fan2_input, fan_input, 1),
SENSOR_ATTR_RO(fan3_input, fan_input, 2),
};
static ssize_t fan_status_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n",
FAN_STATUS_FROM_REG(data->fan_status[attr->index]));
}
static struct sensor_device_attribute fan_status[] = {
SENSOR_ATTR_RO(fan1_status, fan_status, 0),
SENSOR_ATTR_RO(fan2_status, fan_status, 1),
SENSOR_ATTR_RO(fan3_status, fan_status, 2),
};
static ssize_t fan_div_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n",
FAN_DIV_FROM_REG(data->fan_status[attr->index]));
}
static struct sensor_device_attribute fan_div[] = {
SENSOR_ATTR_RO(fan1_div, fan_div, 0),
SENSOR_ATTR_RO(fan2_div, fan_div, 1),
SENSOR_ATTR_RO(fan3_div, fan_div, 2),
};
static ssize_t fan_min_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n", FAN_FROM_REG(data->fan_min[attr->index],
FAN_DIV_FROM_REG(data->fan_status[attr->index])));
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long fan_min;
int err;
err = kstrtol(buf, 10, &fan_min);
if (err)
return err;
mutex_lock(&data->update_lock);
fan_min = FAN_TO_REG(fan_min,
FAN_DIV_FROM_REG(data->fan_status[attr->index]));
/* If it wouldn't fit, change clock divisor */
while (fan_min > 255
&& (data->fan_status[attr->index] & 0x60) != 0x60) {
fan_min >>= 1;
data->fan[attr->index] >>= 1;
data->fan_status[attr->index] += 0x20;
}
data->fan_min[attr->index] = fan_min > 255 ? 255 : fan_min;
pc87360_write_value(data, LD_FAN, NO_BANK,
PC87360_REG_FAN_MIN(attr->index),
data->fan_min[attr->index]);
/* Write new divider, preserve alarm bits */
pc87360_write_value(data, LD_FAN, NO_BANK,
PC87360_REG_FAN_STATUS(attr->index),
data->fan_status[attr->index] & 0xF9);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute fan_min[] = {
SENSOR_ATTR_RW(fan1_min, fan_min, 0),
SENSOR_ATTR_RW(fan2_min, fan_min, 1),
SENSOR_ATTR_RW(fan3_min, fan_min, 2),
};
#define FAN_UNIT_ATTRS(X) \
{ &fan_input[X].dev_attr.attr, \
&fan_status[X].dev_attr.attr, \
&fan_div[X].dev_attr.attr, \
&fan_min[X].dev_attr.attr, \
NULL \
}
static struct attribute *pc8736x_fan_attr[][5] = {
FAN_UNIT_ATTRS(0),
FAN_UNIT_ATTRS(1),
FAN_UNIT_ATTRS(2)
};
static const struct attribute_group pc8736x_fan_attr_group[] = {
{ .attrs = pc8736x_fan_attr[0], },
{ .attrs = pc8736x_fan_attr[1], },
{ .attrs = pc8736x_fan_attr[2], },
};
static ssize_t pwm_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = pc87360_update_device(dev);
return sprintf(buf, "%u\n",
PWM_FROM_REG(data->pwm[attr->index],
FAN_CONFIG_INVERT(data->fan_conf,
attr->index)));
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct pc87360_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm[attr->index] = PWM_TO_REG(val,
FAN_CONFIG_INVERT(data->fan_conf, attr->index));
pc87360_write_value(data, LD_FAN, NO_BANK, PC87360_REG_PWM(attr->index),
data->pwm[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute pwm[] = {
SENSOR_ATTR_RW(pwm1, pwm, 0),
SENSOR_ATTR_RW(pwm2, pwm, 1),
SENSOR_ATTR_RW(pwm3, pwm, 2),
};
static ssize_t name_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct pc87360_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR_RO(name);
static void pc87360_remove_files(struct device *dev)
{
int i;
device_remove_file(dev, &dev_attr_name);
device_remove_file(dev, &dev_attr_alarms_temp);
for (i = 0; i < ARRAY_SIZE(pc8736x_temp_attr_group); i++)
sysfs_remove_group(&dev->kobj, &pc8736x_temp_attr_group[i]);
for (i = 0; i < ARRAY_SIZE(pc8736x_fan_attr_group); i++) {
sysfs_remove_group(&pdev->dev.kobj, &pc8736x_fan_attr_group[i]);
device_remove_file(dev, &pwm[i].dev_attr);
}
sysfs_remove_group(&dev->kobj, &pc8736x_therm_group);
sysfs_remove_group(&dev->kobj, &pc8736x_vin_group);
}
static void pc87360_init_device(struct platform_device *pdev,
int use_thermistors)
{
struct pc87360_data *data = platform_get_drvdata(pdev);
int i, nr;
const u8 init_in[14] = { 2, 2, 2, 2, 2, 2, 2, 1, 1, 3, 1, 2, 2, 2 };
const u8 init_temp[3] = { 2, 2, 1 };
u8 reg;
if (init >= 2 && data->innr) {
reg = pc87360_read_value(data, LD_IN, NO_BANK,
PC87365_REG_IN_CONVRATE);
dev_info(&pdev->dev,
"VLM conversion set to 1s period, 160us delay\n");
pc87360_write_value(data, LD_IN, NO_BANK,
PC87365_REG_IN_CONVRATE,
(reg & 0xC0) | 0x11);
}
nr = data->innr < 11 ? data->innr : 11;
for (i = 0; i < nr; i++) {
reg = pc87360_read_value(data, LD_IN, i,
PC87365_REG_IN_STATUS);
dev_dbg(&pdev->dev, "bios in%d status:0x%02x\n", i, reg);
if (init >= init_in[i]) {
/* Forcibly enable voltage channel */
if (!(reg & CHAN_ENA)) {
dev_dbg(&pdev->dev, "Forcibly enabling in%d\n",
i);
pc87360_write_value(data, LD_IN, i,
PC87365_REG_IN_STATUS,
(reg & 0x68) | 0x87);
}
}
}
/*
* We can't blindly trust the Super-I/O space configuration bit,
* most BIOS won't set it properly
*/
dev_dbg(&pdev->dev, "bios thermistors:%d\n", use_thermistors);
for (i = 11; i < data->innr; i++) {
reg = pc87360_read_value(data, LD_IN, i,
PC87365_REG_TEMP_STATUS);
use_thermistors = use_thermistors || (reg & CHAN_ENA);
/* thermistors are temp[4-6], measured on vin[11-14] */
dev_dbg(&pdev->dev, "bios temp%d_status:0x%02x\n", i-7, reg);
}
dev_dbg(&pdev->dev, "using thermistors:%d\n", use_thermistors);
i = use_thermistors ? 2 : 0;
for (; i < data->tempnr; i++) {
reg = pc87360_read_value(data, LD_TEMP, i,
PC87365_REG_TEMP_STATUS);
dev_dbg(&pdev->dev, "bios temp%d_status:0x%02x\n", i + 1, reg);
if (init >= init_temp[i]) {
/* Forcibly enable temperature channel */
if (!(reg & CHAN_ENA)) {
dev_dbg(&pdev->dev,
"Forcibly enabling temp%d\n", i + 1);
pc87360_write_value(data, LD_TEMP, i,
PC87365_REG_TEMP_STATUS,
0xCF);
}
}
}
if (use_thermistors) {
for (i = 11; i < data->innr; i++) {
if (init >= init_in[i]) {
/*
* The pin may already be used by thermal
* diodes
*/
reg = pc87360_read_value(data, LD_TEMP,
(i - 11) / 2, PC87365_REG_TEMP_STATUS);
if (reg & CHAN_ENA) {
dev_dbg(&pdev->dev,
"Skipping temp%d, pin already in use by temp%d\n",
i - 7, (i - 11) / 2);
continue;
}
/* Forcibly enable thermistor channel */
reg = pc87360_read_value(data, LD_IN, i,
PC87365_REG_IN_STATUS);
if (!(reg & CHAN_ENA)) {
dev_dbg(&pdev->dev,
"Forcibly enabling temp%d\n",
i - 7);
pc87360_write_value(data, LD_IN, i,
PC87365_REG_TEMP_STATUS,
(reg & 0x60) | 0x8F);
}
}
}
}
if (data->innr) {
reg = pc87360_read_value(data, LD_IN, NO_BANK,
PC87365_REG_IN_CONFIG);
dev_dbg(&pdev->dev, "bios vin-cfg:0x%02x\n", reg);
if (reg & CHAN_ENA) {
dev_dbg(&pdev->dev,
"Forcibly enabling monitoring (VLM)\n");
pc87360_write_value(data, LD_IN, NO_BANK,
PC87365_REG_IN_CONFIG,
reg & 0xFE);
}
}
if (data->tempnr) {
reg = pc87360_read_value(data, LD_TEMP, NO_BANK,
PC87365_REG_TEMP_CONFIG);
dev_dbg(&pdev->dev, "bios temp-cfg:0x%02x\n", reg);
if (reg & CHAN_ENA) {
dev_dbg(&pdev->dev,
"Forcibly enabling monitoring (TMS)\n");
pc87360_write_value(data, LD_TEMP, NO_BANK,
PC87365_REG_TEMP_CONFIG,
reg & 0xFE);
}
if (init >= 2) {
/* Chip config as documented by National Semi. */
pc87360_write_value(data, LD_TEMP, 0xF, 0xA, 0x08);
/*
* We voluntarily omit the bank here, in case the
* sequence itself matters. It shouldn't be a problem,
* since nobody else is supposed to access the
* device at that point.
*/
pc87360_write_value(data, LD_TEMP, NO_BANK, 0xB, 0x04);
pc87360_write_value(data, LD_TEMP, NO_BANK, 0xC, 0x35);
pc87360_write_value(data, LD_TEMP, NO_BANK, 0xD, 0x05);
pc87360_write_value(data, LD_TEMP, NO_BANK, 0xE, 0x05);
}
}
}
static int pc87360_probe(struct platform_device *pdev)
{
int i;
struct pc87360_data *data;
int err = 0;
const char *name;
int use_thermistors = 0;
struct device *dev = &pdev->dev;
data = devm_kzalloc(dev, sizeof(struct pc87360_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
switch (devid) {
default:
name = "pc87360";
data->fannr = 2;
break;
case 0xe8:
name = "pc87363";
data->fannr = 2;
break;
case 0xe4:
name = "pc87364";
data->fannr = 3;
break;
case 0xe5:
name = "pc87365";
data->fannr = extra_isa[0] ? 3 : 0;
data->innr = extra_isa[1] ? 11 : 0;
data->tempnr = extra_isa[2] ? 2 : 0;
break;
case 0xe9:
name = "pc87366";
data->fannr = extra_isa[0] ? 3 : 0;
data->innr = extra_isa[1] ? 14 : 0;
data->tempnr = extra_isa[2] ? 3 : 0;
break;
}
data->name = name;
mutex_init(&data->lock);
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
for (i = 0; i < LDNI_MAX; i++) {
data->address[i] = extra_isa[i];
if (data->address[i]
&& !devm_request_region(dev, extra_isa[i], PC87360_EXTENT,
DRIVER_NAME)) {
dev_err(dev,
"Region 0x%x-0x%x already in use!\n",
extra_isa[i], extra_isa[i]+PC87360_EXTENT-1);
return -EBUSY;
}
}
/* Retrieve the fans configuration from Super-I/O space */
if (data->fannr)
data->fan_conf = confreg[0] | (confreg[1] << 8);
/*
* Use the correct reference voltage
* Unless both the VLM and the TMS logical devices agree to
* use an external Vref, the internal one is used.
*/
if (data->innr) {
i = pc87360_read_value(data, LD_IN, NO_BANK,
PC87365_REG_IN_CONFIG);
if (data->tempnr) {
i &= pc87360_read_value(data, LD_TEMP, NO_BANK,
PC87365_REG_TEMP_CONFIG);
}
data->in_vref = (i&0x02) ? 3025 : 2966;
dev_dbg(dev, "Using %s reference voltage\n",
(i&0x02) ? "external" : "internal");
data->vid_conf = confreg[3];
data->vrm = vid_which_vrm();
}
/* Fan clock dividers may be needed before any data is read */
for (i = 0; i < data->fannr; i++) {
if (FAN_CONFIG_MONITOR(data->fan_conf, i))
data->fan_status[i] = pc87360_read_value(data,
LD_FAN, NO_BANK,
PC87360_REG_FAN_STATUS(i));
}
if (init > 0) {
if (devid == 0xe9 && data->address[1]) /* PC87366 */
use_thermistors = confreg[2] & 0x40;
pc87360_init_device(pdev, use_thermistors);
}
/* Register all-or-nothing sysfs groups */
if (data->innr) {
err = sysfs_create_group(&dev->kobj, &pc8736x_vin_group);
if (err)
goto error;
}
if (data->innr == 14) {
err = sysfs_create_group(&dev->kobj, &pc8736x_therm_group);
if (err)
goto error;
}
/* create device attr-files for varying sysfs groups */
if (data->tempnr) {
for (i = 0; i < data->tempnr; i++) {
err = sysfs_create_group(&dev->kobj,
&pc8736x_temp_attr_group[i]);
if (err)
goto error;
}
err = device_create_file(dev, &dev_attr_alarms_temp);
if (err)
goto error;
}
for (i = 0; i < data->fannr; i++) {
if (FAN_CONFIG_MONITOR(data->fan_conf, i)) {
err = sysfs_create_group(&dev->kobj,
&pc8736x_fan_attr_group[i]);
if (err)
goto error;
}
if (FAN_CONFIG_CONTROL(data->fan_conf, i)) {
err = device_create_file(dev, &pwm[i].dev_attr);
if (err)
goto error;
}
}
err = device_create_file(dev, &dev_attr_name);
if (err)
goto error;
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto error;
}
return 0;
error:
pc87360_remove_files(dev);
return err;
}
static int pc87360_remove(struct platform_device *pdev)
{
struct pc87360_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
pc87360_remove_files(&pdev->dev);
return 0;
}
/*
* Driver data
*/
static struct platform_driver pc87360_driver = {
.driver = {
.name = DRIVER_NAME,
},
.probe = pc87360_probe,
.remove = pc87360_remove,
};
/*
* Device detection, registration and update
*/
static int __init pc87360_find(int sioaddr, u8 *devid,
unsigned short *addresses)
{
u16 val;
int i;
int nrdev; /* logical device count */
/* No superio_enter */
/* Identify device */
val = force_id ? force_id : superio_inb(sioaddr, DEVID);
switch (val) {
case 0xE1: /* PC87360 */
case 0xE8: /* PC87363 */
case 0xE4: /* PC87364 */
nrdev = 1;
break;
case 0xE5: /* PC87365 */
case 0xE9: /* PC87366 */
nrdev = 3;
break;
default:
superio_exit(sioaddr);
return -ENODEV;
}
/* Remember the device id */
*devid = val;
for (i = 0; i < nrdev; i++) {
/* select logical device */
superio_outb(sioaddr, DEV, logdev[i]);
val = superio_inb(sioaddr, ACT);
if (!(val & 0x01)) {
pr_info("Device 0x%02x not activated\n", logdev[i]);
continue;
}
val = (superio_inb(sioaddr, BASE) << 8)
| superio_inb(sioaddr, BASE + 1);
if (!val) {
pr_info("Base address not set for device 0x%02x\n",
logdev[i]);
continue;
}
addresses[i] = val;
if (i == 0) { /* Fans */
confreg[0] = superio_inb(sioaddr, 0xF0);
confreg[1] = superio_inb(sioaddr, 0xF1);
pr_debug("Fan %d: mon=%d ctrl=%d inv=%d\n", 1,
(confreg[0] >> 2) & 1, (confreg[0] >> 3) & 1,
(confreg[0] >> 4) & 1);
pr_debug("Fan %d: mon=%d ctrl=%d inv=%d\n", 2,
(confreg[0] >> 5) & 1, (confreg[0] >> 6) & 1,
(confreg[0] >> 7) & 1);
pr_debug("Fan %d: mon=%d ctrl=%d inv=%d\n", 3,
confreg[1] & 1, (confreg[1] >> 1) & 1,
(confreg[1] >> 2) & 1);
} else if (i == 1) { /* Voltages */
/* Are we using thermistors? */
if (*devid == 0xE9) { /* PC87366 */
/*
* These registers are not logical-device
* specific, just that we won't need them if
* we don't use the VLM device
*/
confreg[2] = superio_inb(sioaddr, 0x2B);
confreg[3] = superio_inb(sioaddr, 0x25);
if (confreg[2] & 0x40) {
pr_info("Using thermistors for temperature monitoring\n");
}
if (confreg[3] & 0xE0) {
pr_info("VID inputs routed (mode %u)\n",
confreg[3] >> 5);
}
}
}
}
superio_exit(sioaddr);
return 0;
}
static int __init pc87360_device_add(unsigned short address)
{
struct resource res[3];
int err, i, res_count;
pdev = platform_device_alloc("pc87360", address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
memset(res, 0, 3 * sizeof(struct resource));
res_count = 0;
for (i = 0; i < 3; i++) {
if (!extra_isa[i])
continue;
res[res_count].start = extra_isa[i];
res[res_count].end = extra_isa[i] + PC87360_EXTENT - 1;
res[res_count].name = "pc87360";
res[res_count].flags = IORESOURCE_IO;
err = acpi_check_resource_conflict(&res[res_count]);
if (err)
goto exit_device_put;
res_count++;
}
err = platform_device_add_resources(pdev, res, res_count);
if (err) {
pr_err("Device resources addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static int __init pc87360_init(void)
{
int err, i;
unsigned short address = 0;
if (pc87360_find(0x2e, &devid, extra_isa)
&& pc87360_find(0x4e, &devid, extra_isa)) {
pr_warn("PC8736x not detected, module not inserted\n");
return -ENODEV;
}
/* Arbitrarily pick one of the addresses */
for (i = 0; i < 3; i++) {
if (extra_isa[i] != 0x0000) {
address = extra_isa[i];
break;
}
}
if (address == 0x0000) {
pr_warn("No active logical device, module not inserted\n");
return -ENODEV;
}
err = platform_driver_register(&pc87360_driver);
if (err)
goto exit;
/* Sets global pdev as a side effect */
err = pc87360_device_add(address);
if (err)
goto exit_driver;
return 0;
exit_driver:
platform_driver_unregister(&pc87360_driver);
exit:
return err;
}
static void __exit pc87360_exit(void)
{
platform_device_unregister(pdev);
platform_driver_unregister(&pc87360_driver);
}
MODULE_AUTHOR("Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("PC8736x hardware monitor");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRIVER_NAME);
module_init(pc87360_init);
module_exit(pc87360_exit);
|
linux-master
|
drivers/hwmon/pc87360.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* pwm-fan.c - Hwmon driver for fans connected to PWM lines.
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
*
* Author: Kamil Debski <[email protected]>
*/
#include <linux/hwmon.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/regulator/consumer.h>
#include <linux/sysfs.h>
#include <linux/thermal.h>
#include <linux/timer.h>
#define MAX_PWM 255
struct pwm_fan_tach {
int irq;
atomic_t pulses;
unsigned int rpm;
u8 pulses_per_revolution;
};
enum pwm_fan_enable_mode {
pwm_off_reg_off,
pwm_disable_reg_enable,
pwm_enable_reg_enable,
pwm_disable_reg_disable,
};
struct pwm_fan_ctx {
struct device *dev;
struct mutex lock;
struct pwm_device *pwm;
struct pwm_state pwm_state;
struct regulator *reg_en;
enum pwm_fan_enable_mode enable_mode;
bool regulator_enabled;
bool enabled;
int tach_count;
struct pwm_fan_tach *tachs;
ktime_t sample_start;
struct timer_list rpm_timer;
unsigned int pwm_value;
unsigned int pwm_fan_state;
unsigned int pwm_fan_max_state;
unsigned int *pwm_fan_cooling_levels;
struct thermal_cooling_device *cdev;
struct hwmon_chip_info info;
struct hwmon_channel_info fan_channel;
};
/* This handler assumes self resetting edge triggered interrupt. */
static irqreturn_t pulse_handler(int irq, void *dev_id)
{
struct pwm_fan_tach *tach = dev_id;
atomic_inc(&tach->pulses);
return IRQ_HANDLED;
}
static void sample_timer(struct timer_list *t)
{
struct pwm_fan_ctx *ctx = from_timer(ctx, t, rpm_timer);
unsigned int delta = ktime_ms_delta(ktime_get(), ctx->sample_start);
int i;
if (delta) {
for (i = 0; i < ctx->tach_count; i++) {
struct pwm_fan_tach *tach = &ctx->tachs[i];
int pulses;
pulses = atomic_read(&tach->pulses);
atomic_sub(pulses, &tach->pulses);
tach->rpm = (unsigned int)(pulses * 1000 * 60) /
(tach->pulses_per_revolution * delta);
}
ctx->sample_start = ktime_get();
}
mod_timer(&ctx->rpm_timer, jiffies + HZ);
}
static void pwm_fan_enable_mode_2_state(int enable_mode,
struct pwm_state *state,
bool *enable_regulator)
{
switch (enable_mode) {
case pwm_disable_reg_enable:
/* disable pwm, keep regulator enabled */
state->enabled = false;
*enable_regulator = true;
break;
case pwm_enable_reg_enable:
/* keep pwm and regulator enabled */
state->enabled = true;
*enable_regulator = true;
break;
case pwm_off_reg_off:
case pwm_disable_reg_disable:
/* disable pwm and regulator */
state->enabled = false;
*enable_regulator = false;
}
}
static int pwm_fan_switch_power(struct pwm_fan_ctx *ctx, bool on)
{
int ret = 0;
if (!ctx->reg_en)
return ret;
if (!ctx->regulator_enabled && on) {
ret = regulator_enable(ctx->reg_en);
if (ret == 0)
ctx->regulator_enabled = true;
} else if (ctx->regulator_enabled && !on) {
ret = regulator_disable(ctx->reg_en);
if (ret == 0)
ctx->regulator_enabled = false;
}
return ret;
}
static int pwm_fan_power_on(struct pwm_fan_ctx *ctx)
{
struct pwm_state *state = &ctx->pwm_state;
int ret;
if (ctx->enabled)
return 0;
ret = pwm_fan_switch_power(ctx, true);
if (ret < 0) {
dev_err(ctx->dev, "failed to enable power supply\n");
return ret;
}
state->enabled = true;
ret = pwm_apply_state(ctx->pwm, state);
if (ret) {
dev_err(ctx->dev, "failed to enable PWM\n");
goto disable_regulator;
}
ctx->enabled = true;
return 0;
disable_regulator:
pwm_fan_switch_power(ctx, false);
return ret;
}
static int pwm_fan_power_off(struct pwm_fan_ctx *ctx)
{
struct pwm_state *state = &ctx->pwm_state;
bool enable_regulator = false;
int ret;
if (!ctx->enabled)
return 0;
pwm_fan_enable_mode_2_state(ctx->enable_mode,
state,
&enable_regulator);
state->enabled = false;
state->duty_cycle = 0;
ret = pwm_apply_state(ctx->pwm, state);
if (ret) {
dev_err(ctx->dev, "failed to disable PWM\n");
return ret;
}
pwm_fan_switch_power(ctx, enable_regulator);
ctx->enabled = false;
return 0;
}
static int __set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm)
{
struct pwm_state *state = &ctx->pwm_state;
unsigned long period;
int ret = 0;
if (pwm > 0) {
if (ctx->enable_mode == pwm_off_reg_off)
/* pwm-fan hard disabled */
return 0;
period = state->period;
state->duty_cycle = DIV_ROUND_UP(pwm * (period - 1), MAX_PWM);
ret = pwm_apply_state(ctx->pwm, state);
if (ret)
return ret;
ret = pwm_fan_power_on(ctx);
} else {
ret = pwm_fan_power_off(ctx);
}
if (!ret)
ctx->pwm_value = pwm;
return ret;
}
static int set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm)
{
int ret;
mutex_lock(&ctx->lock);
ret = __set_pwm(ctx, pwm);
mutex_unlock(&ctx->lock);
return ret;
}
static void pwm_fan_update_state(struct pwm_fan_ctx *ctx, unsigned long pwm)
{
int i;
for (i = 0; i < ctx->pwm_fan_max_state; ++i)
if (pwm < ctx->pwm_fan_cooling_levels[i + 1])
break;
ctx->pwm_fan_state = i;
}
static int pwm_fan_update_enable(struct pwm_fan_ctx *ctx, long val)
{
int ret = 0;
int old_val;
mutex_lock(&ctx->lock);
if (ctx->enable_mode == val)
goto out;
old_val = ctx->enable_mode;
ctx->enable_mode = val;
if (val == 0) {
/* Disable pwm-fan unconditionally */
if (ctx->enabled)
ret = __set_pwm(ctx, 0);
else
ret = pwm_fan_switch_power(ctx, false);
if (ret)
ctx->enable_mode = old_val;
pwm_fan_update_state(ctx, 0);
} else {
/*
* Change PWM and/or regulator state if currently disabled
* Nothing to do if currently enabled
*/
if (!ctx->enabled) {
struct pwm_state *state = &ctx->pwm_state;
bool enable_regulator = false;
state->duty_cycle = 0;
pwm_fan_enable_mode_2_state(val,
state,
&enable_regulator);
pwm_apply_state(ctx->pwm, state);
pwm_fan_switch_power(ctx, enable_regulator);
pwm_fan_update_state(ctx, 0);
}
}
out:
mutex_unlock(&ctx->lock);
return ret;
}
static int pwm_fan_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
int ret;
switch (attr) {
case hwmon_pwm_input:
if (val < 0 || val > MAX_PWM)
return -EINVAL;
ret = set_pwm(ctx, val);
if (ret)
return ret;
pwm_fan_update_state(ctx, val);
break;
case hwmon_pwm_enable:
if (val < 0 || val > 3)
ret = -EINVAL;
else
ret = pwm_fan_update_enable(ctx, val);
return ret;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int pwm_fan_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
*val = ctx->pwm_value;
return 0;
case hwmon_pwm_enable:
*val = ctx->enable_mode;
return 0;
}
return -EOPNOTSUPP;
case hwmon_fan:
*val = ctx->tachs[channel].rpm;
return 0;
default:
return -ENOTSUPP;
}
}
static umode_t pwm_fan_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_pwm:
return 0644;
case hwmon_fan:
return 0444;
default:
return 0;
}
}
static const struct hwmon_ops pwm_fan_hwmon_ops = {
.is_visible = pwm_fan_is_visible,
.read = pwm_fan_read,
.write = pwm_fan_write,
};
/* thermal cooling device callbacks */
static int pwm_fan_get_max_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
struct pwm_fan_ctx *ctx = cdev->devdata;
if (!ctx)
return -EINVAL;
*state = ctx->pwm_fan_max_state;
return 0;
}
static int pwm_fan_get_cur_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
struct pwm_fan_ctx *ctx = cdev->devdata;
if (!ctx)
return -EINVAL;
*state = ctx->pwm_fan_state;
return 0;
}
static int
pwm_fan_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
{
struct pwm_fan_ctx *ctx = cdev->devdata;
int ret;
if (!ctx || (state > ctx->pwm_fan_max_state))
return -EINVAL;
if (state == ctx->pwm_fan_state)
return 0;
ret = set_pwm(ctx, ctx->pwm_fan_cooling_levels[state]);
if (ret) {
dev_err(&cdev->device, "Cannot set pwm!\n");
return ret;
}
ctx->pwm_fan_state = state;
return ret;
}
static const struct thermal_cooling_device_ops pwm_fan_cooling_ops = {
.get_max_state = pwm_fan_get_max_state,
.get_cur_state = pwm_fan_get_cur_state,
.set_cur_state = pwm_fan_set_cur_state,
};
static int pwm_fan_of_get_cooling_data(struct device *dev,
struct pwm_fan_ctx *ctx)
{
struct device_node *np = dev->of_node;
int num, i, ret;
if (!of_property_present(np, "cooling-levels"))
return 0;
ret = of_property_count_u32_elems(np, "cooling-levels");
if (ret <= 0) {
dev_err(dev, "Wrong data!\n");
return ret ? : -EINVAL;
}
num = ret;
ctx->pwm_fan_cooling_levels = devm_kcalloc(dev, num, sizeof(u32),
GFP_KERNEL);
if (!ctx->pwm_fan_cooling_levels)
return -ENOMEM;
ret = of_property_read_u32_array(np, "cooling-levels",
ctx->pwm_fan_cooling_levels, num);
if (ret) {
dev_err(dev, "Property 'cooling-levels' cannot be read!\n");
return ret;
}
for (i = 0; i < num; i++) {
if (ctx->pwm_fan_cooling_levels[i] > MAX_PWM) {
dev_err(dev, "PWM fan state[%d]:%d > %d\n", i,
ctx->pwm_fan_cooling_levels[i], MAX_PWM);
return -EINVAL;
}
}
ctx->pwm_fan_max_state = num - 1;
return 0;
}
static void pwm_fan_cleanup(void *__ctx)
{
struct pwm_fan_ctx *ctx = __ctx;
del_timer_sync(&ctx->rpm_timer);
/* Switch off everything */
ctx->enable_mode = pwm_disable_reg_disable;
pwm_fan_power_off(ctx);
}
static int pwm_fan_probe(struct platform_device *pdev)
{
struct thermal_cooling_device *cdev;
struct device *dev = &pdev->dev;
struct pwm_fan_ctx *ctx;
struct device *hwmon;
int ret;
const struct hwmon_channel_info **channels;
u32 *fan_channel_config;
int channel_count = 1; /* We always have a PWM channel. */
int i;
ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
if (!ctx)
return -ENOMEM;
mutex_init(&ctx->lock);
ctx->dev = &pdev->dev;
ctx->pwm = devm_pwm_get(dev, NULL);
if (IS_ERR(ctx->pwm))
return dev_err_probe(dev, PTR_ERR(ctx->pwm), "Could not get PWM\n");
platform_set_drvdata(pdev, ctx);
ctx->reg_en = devm_regulator_get_optional(dev, "fan");
if (IS_ERR(ctx->reg_en)) {
if (PTR_ERR(ctx->reg_en) != -ENODEV)
return PTR_ERR(ctx->reg_en);
ctx->reg_en = NULL;
}
pwm_init_state(ctx->pwm, &ctx->pwm_state);
/*
* PWM fans are controlled solely by the duty cycle of the PWM signal,
* they do not care about the exact timing. Thus set usage_power to true
* to allow less flexible hardware to work as a PWM source for fan
* control.
*/
ctx->pwm_state.usage_power = true;
/*
* set_pwm assumes that MAX_PWM * (period - 1) fits into an unsigned
* long. Check this here to prevent the fan running at a too low
* frequency.
*/
if (ctx->pwm_state.period > ULONG_MAX / MAX_PWM + 1) {
dev_err(dev, "Configured period too big\n");
return -EINVAL;
}
ctx->enable_mode = pwm_disable_reg_enable;
/*
* Set duty cycle to maximum allowed and enable PWM output as well as
* the regulator. In case of error nothing is changed
*/
ret = set_pwm(ctx, MAX_PWM);
if (ret) {
dev_err(dev, "Failed to configure PWM: %d\n", ret);
return ret;
}
timer_setup(&ctx->rpm_timer, sample_timer, 0);
ret = devm_add_action_or_reset(dev, pwm_fan_cleanup, ctx);
if (ret)
return ret;
ctx->tach_count = platform_irq_count(pdev);
if (ctx->tach_count < 0)
return dev_err_probe(dev, ctx->tach_count,
"Could not get number of fan tachometer inputs\n");
dev_dbg(dev, "%d fan tachometer inputs\n", ctx->tach_count);
if (ctx->tach_count) {
channel_count++; /* We also have a FAN channel. */
ctx->tachs = devm_kcalloc(dev, ctx->tach_count,
sizeof(struct pwm_fan_tach),
GFP_KERNEL);
if (!ctx->tachs)
return -ENOMEM;
ctx->fan_channel.type = hwmon_fan;
fan_channel_config = devm_kcalloc(dev, ctx->tach_count + 1,
sizeof(u32), GFP_KERNEL);
if (!fan_channel_config)
return -ENOMEM;
ctx->fan_channel.config = fan_channel_config;
}
channels = devm_kcalloc(dev, channel_count + 1,
sizeof(struct hwmon_channel_info *), GFP_KERNEL);
if (!channels)
return -ENOMEM;
channels[0] = HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT | HWMON_PWM_ENABLE);
for (i = 0; i < ctx->tach_count; i++) {
struct pwm_fan_tach *tach = &ctx->tachs[i];
u32 ppr = 2;
tach->irq = platform_get_irq(pdev, i);
if (tach->irq == -EPROBE_DEFER)
return tach->irq;
if (tach->irq > 0) {
ret = devm_request_irq(dev, tach->irq, pulse_handler, 0,
pdev->name, tach);
if (ret) {
dev_err(dev,
"Failed to request interrupt: %d\n",
ret);
return ret;
}
}
of_property_read_u32_index(dev->of_node,
"pulses-per-revolution",
i,
&ppr);
tach->pulses_per_revolution = ppr;
if (!tach->pulses_per_revolution) {
dev_err(dev, "pulses-per-revolution can't be zero.\n");
return -EINVAL;
}
fan_channel_config[i] = HWMON_F_INPUT;
dev_dbg(dev, "tach%d: irq=%d, pulses_per_revolution=%d\n",
i, tach->irq, tach->pulses_per_revolution);
}
if (ctx->tach_count > 0) {
ctx->sample_start = ktime_get();
mod_timer(&ctx->rpm_timer, jiffies + HZ);
channels[1] = &ctx->fan_channel;
}
ctx->info.ops = &pwm_fan_hwmon_ops;
ctx->info.info = channels;
hwmon = devm_hwmon_device_register_with_info(dev, "pwmfan",
ctx, &ctx->info, NULL);
if (IS_ERR(hwmon)) {
dev_err(dev, "Failed to register hwmon device\n");
return PTR_ERR(hwmon);
}
ret = pwm_fan_of_get_cooling_data(dev, ctx);
if (ret)
return ret;
ctx->pwm_fan_state = ctx->pwm_fan_max_state;
if (IS_ENABLED(CONFIG_THERMAL)) {
cdev = devm_thermal_of_cooling_device_register(dev,
dev->of_node, "pwm-fan", ctx, &pwm_fan_cooling_ops);
if (IS_ERR(cdev)) {
ret = PTR_ERR(cdev);
dev_err(dev,
"Failed to register pwm-fan as cooling device: %d\n",
ret);
return ret;
}
ctx->cdev = cdev;
}
return 0;
}
static void pwm_fan_shutdown(struct platform_device *pdev)
{
struct pwm_fan_ctx *ctx = platform_get_drvdata(pdev);
pwm_fan_cleanup(ctx);
}
static int pwm_fan_suspend(struct device *dev)
{
struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
return pwm_fan_power_off(ctx);
}
static int pwm_fan_resume(struct device *dev)
{
struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
return set_pwm(ctx, ctx->pwm_value);
}
static DEFINE_SIMPLE_DEV_PM_OPS(pwm_fan_pm, pwm_fan_suspend, pwm_fan_resume);
static const struct of_device_id of_pwm_fan_match[] = {
{ .compatible = "pwm-fan", },
{},
};
MODULE_DEVICE_TABLE(of, of_pwm_fan_match);
static struct platform_driver pwm_fan_driver = {
.probe = pwm_fan_probe,
.shutdown = pwm_fan_shutdown,
.driver = {
.name = "pwm-fan",
.pm = pm_sleep_ptr(&pwm_fan_pm),
.of_match_table = of_pwm_fan_match,
},
};
module_platform_driver(pwm_fan_driver);
MODULE_AUTHOR("Kamil Debski <[email protected]>");
MODULE_ALIAS("platform:pwm-fan");
MODULE_DESCRIPTION("PWM FAN driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/pwm-fan.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* nct6775-i2c - I2C driver for the hardware monitoring functionality of
* Nuvoton NCT677x Super-I/O chips
*
* Copyright (C) 2022 Zev Weiss <[email protected]>
*
* This driver interacts with the chip via it's "back door" i2c interface, as
* is often exposed to a BMC. Because the host may still be operating the
* chip via the ("front door") LPC interface, this driver cannot assume that
* it actually has full control of the chip, and in particular must avoid
* making any changes that could confuse the host's LPC usage of it. It thus
* operates in a strictly read-only fashion, with the only exception being the
* bank-select register (which seems, thankfully, to be replicated for the i2c
* interface so it doesn't affect the LPC interface).
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#include "nct6775.h"
static int nct6775_i2c_read(void *ctx, unsigned int reg, unsigned int *val)
{
int ret;
u32 tmp;
u8 bank = reg >> 8;
struct nct6775_data *data = ctx;
struct i2c_client *client = data->driver_data;
if (bank != data->bank) {
ret = i2c_smbus_write_byte_data(client, NCT6775_REG_BANK, bank);
if (ret)
return ret;
data->bank = bank;
}
ret = i2c_smbus_read_byte_data(client, reg & 0xff);
if (ret < 0)
return ret;
tmp = ret;
if (nct6775_reg_is_word_sized(data, reg)) {
ret = i2c_smbus_read_byte_data(client, (reg & 0xff) + 1);
if (ret < 0)
return ret;
tmp = (tmp << 8) | ret;
}
*val = tmp;
return 0;
}
/*
* The write operation is a dummy so as not to disturb anything being done
* with the chip via LPC.
*/
static int nct6775_i2c_write(void *ctx, unsigned int reg, unsigned int value)
{
struct nct6775_data *data = ctx;
struct i2c_client *client = data->driver_data;
dev_dbg(&client->dev, "skipping attempted write: %02x -> %03x\n", value, reg);
/*
* This is a lie, but writing anything but the bank-select register is
* something this driver shouldn't be doing.
*/
return 0;
}
static const struct of_device_id __maybe_unused nct6775_i2c_of_match[] = {
{ .compatible = "nuvoton,nct6106", .data = (void *)nct6106, },
{ .compatible = "nuvoton,nct6116", .data = (void *)nct6116, },
{ .compatible = "nuvoton,nct6775", .data = (void *)nct6775, },
{ .compatible = "nuvoton,nct6776", .data = (void *)nct6776, },
{ .compatible = "nuvoton,nct6779", .data = (void *)nct6779, },
{ .compatible = "nuvoton,nct6791", .data = (void *)nct6791, },
{ .compatible = "nuvoton,nct6792", .data = (void *)nct6792, },
{ .compatible = "nuvoton,nct6793", .data = (void *)nct6793, },
{ .compatible = "nuvoton,nct6795", .data = (void *)nct6795, },
{ .compatible = "nuvoton,nct6796", .data = (void *)nct6796, },
{ .compatible = "nuvoton,nct6797", .data = (void *)nct6797, },
{ .compatible = "nuvoton,nct6798", .data = (void *)nct6798, },
{ .compatible = "nuvoton,nct6799", .data = (void *)nct6799, },
{ },
};
MODULE_DEVICE_TABLE(of, nct6775_i2c_of_match);
static const struct i2c_device_id nct6775_i2c_id[] = {
{ "nct6106", nct6106 },
{ "nct6116", nct6116 },
{ "nct6775", nct6775 },
{ "nct6776", nct6776 },
{ "nct6779", nct6779 },
{ "nct6791", nct6791 },
{ "nct6792", nct6792 },
{ "nct6793", nct6793 },
{ "nct6795", nct6795 },
{ "nct6796", nct6796 },
{ "nct6797", nct6797 },
{ "nct6798", nct6798 },
{ "nct6799", nct6799 },
{ }
};
MODULE_DEVICE_TABLE(i2c, nct6775_i2c_id);
static int nct6775_i2c_probe_init(struct nct6775_data *data)
{
u32 tsi_channel_mask;
struct i2c_client *client = data->driver_data;
/*
* The i2c interface doesn't provide access to the control registers
* needed to determine the presence of other fans, but fans 1 and 2
* are (in principle) always there.
*
* In practice this is perhaps a little silly, because the system
* using this driver is mostly likely a BMC, and hence probably has
* totally separate fan tachs & pwms of its own that are actually
* controlling/monitoring the fans -- these are thus unlikely to be
* doing anything actually useful.
*/
data->has_fan = 0x03;
data->has_fan_min = 0x03;
data->has_pwm = 0x03;
/*
* Because on a BMC this driver may be bound very shortly after power
* is first applied to the device, the automatic TSI channel detection
* in nct6775_probe() (which has already been run at this point) may
* not find anything if a channel hasn't yet produced a temperature
* reading. Augment whatever was found via autodetection (if
* anything) with the channels DT says should be active.
*/
if (!of_property_read_u32(client->dev.of_node, "nuvoton,tsi-channel-mask",
&tsi_channel_mask))
data->have_tsi_temp |= tsi_channel_mask & GENMASK(NUM_TSI_TEMP - 1, 0);
return 0;
}
static const struct regmap_config nct6775_i2c_regmap_config = {
.reg_bits = 16,
.val_bits = 16,
.reg_read = nct6775_i2c_read,
.reg_write = nct6775_i2c_write,
};
static int nct6775_i2c_probe(struct i2c_client *client)
{
struct nct6775_data *data;
const struct of_device_id *of_id;
const struct i2c_device_id *i2c_id;
struct device *dev = &client->dev;
of_id = of_match_device(nct6775_i2c_of_match, dev);
i2c_id = i2c_match_id(nct6775_i2c_id, client);
if (of_id && (unsigned long)of_id->data != i2c_id->driver_data)
dev_notice(dev, "Device mismatch: %s in device tree, %s detected\n",
of_id->name, i2c_id->name);
data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->kind = i2c_id->driver_data;
data->read_only = true;
data->driver_data = client;
data->driver_init = nct6775_i2c_probe_init;
return nct6775_probe(dev, data, &nct6775_i2c_regmap_config);
}
static struct i2c_driver nct6775_i2c_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "nct6775-i2c",
.of_match_table = of_match_ptr(nct6775_i2c_of_match),
},
.probe = nct6775_i2c_probe,
.id_table = nct6775_i2c_id,
};
module_i2c_driver(nct6775_i2c_driver);
MODULE_AUTHOR("Zev Weiss <[email protected]>");
MODULE_DESCRIPTION("I2C driver for NCT6775F and compatible chips");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(HWMON_NCT6775);
|
linux-master
|
drivers/hwmon/nct6775-i2c.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* An hwmon driver for the Analog Devices AD7416/17/18
* Copyright (C) 2006-07 Tower Technologies
*
* Author: Alessandro Zummo <[email protected]>
*
* Based on lm75.c
* Copyright (C) 1998-99 Frodo Looijaard <[email protected]>
*/
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include "lm75.h"
#define DRV_VERSION "0.4"
enum chips { ad7416, ad7417, ad7418 };
/* AD7418 registers */
#define AD7418_REG_TEMP_IN 0x00
#define AD7418_REG_CONF 0x01
#define AD7418_REG_TEMP_HYST 0x02
#define AD7418_REG_TEMP_OS 0x03
#define AD7418_REG_ADC 0x04
#define AD7418_REG_CONF2 0x05
#define AD7418_REG_ADC_CH(x) ((x) << 5)
#define AD7418_CH_TEMP AD7418_REG_ADC_CH(0)
static const u8 AD7418_REG_TEMP[] = { AD7418_REG_TEMP_IN,
AD7418_REG_TEMP_HYST,
AD7418_REG_TEMP_OS };
struct ad7418_data {
struct i2c_client *client;
enum chips type;
struct mutex lock;
int adc_max; /* number of ADC channels */
bool valid;
unsigned long last_updated; /* In jiffies */
s16 temp[3]; /* Register values */
u16 in[4];
};
static int ad7418_update_device(struct device *dev)
{
struct ad7418_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
s32 val;
mutex_lock(&data->lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
u8 cfg;
int i, ch;
/* read config register and clear channel bits */
val = i2c_smbus_read_byte_data(client, AD7418_REG_CONF);
if (val < 0)
goto abort;
cfg = val;
cfg &= 0x1F;
val = i2c_smbus_write_byte_data(client, AD7418_REG_CONF,
cfg | AD7418_CH_TEMP);
if (val < 0)
goto abort;
udelay(30);
for (i = 0; i < 3; i++) {
val = i2c_smbus_read_word_swapped(client,
AD7418_REG_TEMP[i]);
if (val < 0)
goto abort;
data->temp[i] = val;
}
for (i = 0, ch = 4; i < data->adc_max; i++, ch--) {
val = i2c_smbus_write_byte_data(client, AD7418_REG_CONF,
cfg | AD7418_REG_ADC_CH(ch));
if (val < 0)
goto abort;
udelay(15);
val = i2c_smbus_read_word_swapped(client,
AD7418_REG_ADC);
if (val < 0)
goto abort;
data->in[data->adc_max - 1 - i] = val;
}
/* restore old configuration value */
val = i2c_smbus_write_word_swapped(client, AD7418_REG_CONF,
cfg);
if (val < 0)
goto abort;
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->lock);
return 0;
abort:
data->valid = false;
mutex_unlock(&data->lock);
return val;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct ad7418_data *data = dev_get_drvdata(dev);
int ret;
ret = ad7418_update_device(dev);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n",
LM75_TEMP_FROM_REG(data->temp[attr->index]));
}
static ssize_t adc_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct ad7418_data *data = dev_get_drvdata(dev);
int ret;
ret = ad7418_update_device(dev);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n",
((data->in[attr->index] >> 6) * 2500 + 512) / 1024);
}
static ssize_t temp_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct ad7418_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long temp;
int ret = kstrtol(buf, 10, &temp);
if (ret < 0)
return ret;
mutex_lock(&data->lock);
data->temp[attr->index] = LM75_TEMP_TO_REG(temp);
i2c_smbus_write_word_swapped(client,
AD7418_REG_TEMP[attr->index],
data->temp[attr->index]);
mutex_unlock(&data->lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, 2);
static SENSOR_DEVICE_ATTR_RO(in1_input, adc, 0);
static SENSOR_DEVICE_ATTR_RO(in2_input, adc, 1);
static SENSOR_DEVICE_ATTR_RO(in3_input, adc, 2);
static SENSOR_DEVICE_ATTR_RO(in4_input, adc, 3);
static struct attribute *ad7416_attrs[] = {
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(ad7416);
static struct attribute *ad7417_attrs[] = {
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(ad7417);
static struct attribute *ad7418_attrs[] = {
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(ad7418);
static void ad7418_init_client(struct i2c_client *client)
{
struct ad7418_data *data = i2c_get_clientdata(client);
int reg = i2c_smbus_read_byte_data(client, AD7418_REG_CONF);
if (reg < 0) {
dev_err(&client->dev, "cannot read configuration register\n");
} else {
dev_info(&client->dev, "configuring for mode 1\n");
i2c_smbus_write_byte_data(client, AD7418_REG_CONF, reg & 0xfe);
if (data->type == ad7417 || data->type == ad7418)
i2c_smbus_write_byte_data(client,
AD7418_REG_CONF2, 0x00);
}
}
static const struct i2c_device_id ad7418_id[];
static int ad7418_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct i2c_adapter *adapter = client->adapter;
struct ad7418_data *data;
struct device *hwmon_dev;
const struct attribute_group **attr_groups = NULL;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -EOPNOTSUPP;
data = devm_kzalloc(dev, sizeof(struct ad7418_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->lock);
data->client = client;
if (dev->of_node)
data->type = (uintptr_t)of_device_get_match_data(dev);
else
data->type = i2c_match_id(ad7418_id, client)->driver_data;
switch (data->type) {
case ad7416:
data->adc_max = 0;
attr_groups = ad7416_groups;
break;
case ad7417:
data->adc_max = 4;
attr_groups = ad7417_groups;
break;
case ad7418:
data->adc_max = 1;
attr_groups = ad7418_groups;
break;
}
dev_info(dev, "%s chip found\n", client->name);
/* Initialize the AD7418 chip */
ad7418_init_client(client);
hwmon_dev = devm_hwmon_device_register_with_groups(dev,
client->name,
data, attr_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ad7418_id[] = {
{ "ad7416", ad7416 },
{ "ad7417", ad7417 },
{ "ad7418", ad7418 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ad7418_id);
static const struct of_device_id ad7418_dt_ids[] = {
{ .compatible = "adi,ad7416", .data = (void *)ad7416, },
{ .compatible = "adi,ad7417", .data = (void *)ad7417, },
{ .compatible = "adi,ad7418", .data = (void *)ad7418, },
{ }
};
MODULE_DEVICE_TABLE(of, ad7418_dt_ids);
static struct i2c_driver ad7418_driver = {
.driver = {
.name = "ad7418",
.of_match_table = ad7418_dt_ids,
},
.probe = ad7418_probe,
.id_table = ad7418_id,
};
module_i2c_driver(ad7418_driver);
MODULE_AUTHOR("Alessandro Zummo <[email protected]>");
MODULE_DESCRIPTION("AD7416/17/18 driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);
|
linux-master
|
drivers/hwmon/ad7418.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2016 Google, Inc
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/gpio/consumer.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/reset.h>
#include <linux/sysfs.h>
#include <linux/thermal.h>
/* ASPEED PWM & FAN Tach Register Definition */
#define ASPEED_PTCR_CTRL 0x00
#define ASPEED_PTCR_CLK_CTRL 0x04
#define ASPEED_PTCR_DUTY0_CTRL 0x08
#define ASPEED_PTCR_DUTY1_CTRL 0x0c
#define ASPEED_PTCR_TYPEM_CTRL 0x10
#define ASPEED_PTCR_TYPEM_CTRL1 0x14
#define ASPEED_PTCR_TYPEN_CTRL 0x18
#define ASPEED_PTCR_TYPEN_CTRL1 0x1c
#define ASPEED_PTCR_TACH_SOURCE 0x20
#define ASPEED_PTCR_TRIGGER 0x28
#define ASPEED_PTCR_RESULT 0x2c
#define ASPEED_PTCR_INTR_CTRL 0x30
#define ASPEED_PTCR_INTR_STS 0x34
#define ASPEED_PTCR_TYPEM_LIMIT 0x38
#define ASPEED_PTCR_TYPEN_LIMIT 0x3C
#define ASPEED_PTCR_CTRL_EXT 0x40
#define ASPEED_PTCR_CLK_CTRL_EXT 0x44
#define ASPEED_PTCR_DUTY2_CTRL 0x48
#define ASPEED_PTCR_DUTY3_CTRL 0x4c
#define ASPEED_PTCR_TYPEO_CTRL 0x50
#define ASPEED_PTCR_TYPEO_CTRL1 0x54
#define ASPEED_PTCR_TACH_SOURCE_EXT 0x60
#define ASPEED_PTCR_TYPEO_LIMIT 0x78
/* ASPEED_PTCR_CTRL : 0x00 - General Control Register */
#define ASPEED_PTCR_CTRL_SET_PWMD_TYPE_PART1 15
#define ASPEED_PTCR_CTRL_SET_PWMD_TYPE_PART2 6
#define ASPEED_PTCR_CTRL_SET_PWMD_TYPE_MASK (BIT(7) | BIT(15))
#define ASPEED_PTCR_CTRL_SET_PWMC_TYPE_PART1 14
#define ASPEED_PTCR_CTRL_SET_PWMC_TYPE_PART2 5
#define ASPEED_PTCR_CTRL_SET_PWMC_TYPE_MASK (BIT(6) | BIT(14))
#define ASPEED_PTCR_CTRL_SET_PWMB_TYPE_PART1 13
#define ASPEED_PTCR_CTRL_SET_PWMB_TYPE_PART2 4
#define ASPEED_PTCR_CTRL_SET_PWMB_TYPE_MASK (BIT(5) | BIT(13))
#define ASPEED_PTCR_CTRL_SET_PWMA_TYPE_PART1 12
#define ASPEED_PTCR_CTRL_SET_PWMA_TYPE_PART2 3
#define ASPEED_PTCR_CTRL_SET_PWMA_TYPE_MASK (BIT(4) | BIT(12))
#define ASPEED_PTCR_CTRL_FAN_NUM_EN(x) BIT(16 + (x))
#define ASPEED_PTCR_CTRL_PWMD_EN BIT(11)
#define ASPEED_PTCR_CTRL_PWMC_EN BIT(10)
#define ASPEED_PTCR_CTRL_PWMB_EN BIT(9)
#define ASPEED_PTCR_CTRL_PWMA_EN BIT(8)
#define ASPEED_PTCR_CTRL_CLK_SRC BIT(1)
#define ASPEED_PTCR_CTRL_CLK_EN BIT(0)
/* ASPEED_PTCR_CLK_CTRL : 0x04 - Clock Control Register */
/* TYPE N */
#define ASPEED_PTCR_CLK_CTRL_TYPEN_MASK GENMASK(31, 16)
#define ASPEED_PTCR_CLK_CTRL_TYPEN_UNIT 24
#define ASPEED_PTCR_CLK_CTRL_TYPEN_H 20
#define ASPEED_PTCR_CLK_CTRL_TYPEN_L 16
/* TYPE M */
#define ASPEED_PTCR_CLK_CTRL_TYPEM_MASK GENMASK(15, 0)
#define ASPEED_PTCR_CLK_CTRL_TYPEM_UNIT 8
#define ASPEED_PTCR_CLK_CTRL_TYPEM_H 4
#define ASPEED_PTCR_CLK_CTRL_TYPEM_L 0
/*
* ASPEED_PTCR_DUTY_CTRL/1/2/3 : 0x08/0x0C/0x48/0x4C - PWM-FAN duty control
* 0/1/2/3 register
*/
#define DUTY_CTRL_PWM2_FALL_POINT 24
#define DUTY_CTRL_PWM2_RISE_POINT 16
#define DUTY_CTRL_PWM2_RISE_FALL_MASK GENMASK(31, 16)
#define DUTY_CTRL_PWM1_FALL_POINT 8
#define DUTY_CTRL_PWM1_RISE_POINT 0
#define DUTY_CTRL_PWM1_RISE_FALL_MASK GENMASK(15, 0)
/* ASPEED_PTCR_TYPEM_CTRL : 0x10/0x18/0x50 - Type M/N/O Ctrl 0 Register */
#define TYPE_CTRL_FAN_MASK (GENMASK(5, 1) | GENMASK(31, 16))
#define TYPE_CTRL_FAN1_MASK GENMASK(31, 0)
#define TYPE_CTRL_FAN_PERIOD 16
#define TYPE_CTRL_FAN_MODE 4
#define TYPE_CTRL_FAN_DIVISION 1
#define TYPE_CTRL_FAN_TYPE_EN 1
/* ASPEED_PTCR_TACH_SOURCE : 0x20/0x60 - Tach Source Register */
/* bit [0,1] at 0x20, bit [2] at 0x60 */
#define TACH_PWM_SOURCE_BIT01(x) ((x) * 2)
#define TACH_PWM_SOURCE_BIT2(x) ((x) * 2)
#define TACH_PWM_SOURCE_MASK_BIT01(x) (0x3 << ((x) * 2))
#define TACH_PWM_SOURCE_MASK_BIT2(x) BIT((x) * 2)
/* ASPEED_PTCR_RESULT : 0x2c - Result Register */
#define RESULT_STATUS_MASK BIT(31)
#define RESULT_VALUE_MASK 0xfffff
/* ASPEED_PTCR_CTRL_EXT : 0x40 - General Control Extension #1 Register */
#define ASPEED_PTCR_CTRL_SET_PWMH_TYPE_PART1 15
#define ASPEED_PTCR_CTRL_SET_PWMH_TYPE_PART2 6
#define ASPEED_PTCR_CTRL_SET_PWMH_TYPE_MASK (BIT(7) | BIT(15))
#define ASPEED_PTCR_CTRL_SET_PWMG_TYPE_PART1 14
#define ASPEED_PTCR_CTRL_SET_PWMG_TYPE_PART2 5
#define ASPEED_PTCR_CTRL_SET_PWMG_TYPE_MASK (BIT(6) | BIT(14))
#define ASPEED_PTCR_CTRL_SET_PWMF_TYPE_PART1 13
#define ASPEED_PTCR_CTRL_SET_PWMF_TYPE_PART2 4
#define ASPEED_PTCR_CTRL_SET_PWMF_TYPE_MASK (BIT(5) | BIT(13))
#define ASPEED_PTCR_CTRL_SET_PWME_TYPE_PART1 12
#define ASPEED_PTCR_CTRL_SET_PWME_TYPE_PART2 3
#define ASPEED_PTCR_CTRL_SET_PWME_TYPE_MASK (BIT(4) | BIT(12))
#define ASPEED_PTCR_CTRL_PWMH_EN BIT(11)
#define ASPEED_PTCR_CTRL_PWMG_EN BIT(10)
#define ASPEED_PTCR_CTRL_PWMF_EN BIT(9)
#define ASPEED_PTCR_CTRL_PWME_EN BIT(8)
/* ASPEED_PTCR_CLK_EXT_CTRL : 0x44 - Clock Control Extension #1 Register */
/* TYPE O */
#define ASPEED_PTCR_CLK_CTRL_TYPEO_MASK GENMASK(15, 0)
#define ASPEED_PTCR_CLK_CTRL_TYPEO_UNIT 8
#define ASPEED_PTCR_CLK_CTRL_TYPEO_H 4
#define ASPEED_PTCR_CLK_CTRL_TYPEO_L 0
#define PWM_MAX 255
#define BOTH_EDGES 0x02 /* 10b */
#define M_PWM_DIV_H 0x00
#define M_PWM_DIV_L 0x05
#define M_PWM_PERIOD 0x5F
#define M_TACH_CLK_DIV 0x00
/*
* 5:4 Type N fan tach mode selection bit:
* 00: falling
* 01: rising
* 10: both
* 11: reserved.
*/
#define M_TACH_MODE 0x02 /* 10b */
#define M_TACH_UNIT 0x0420
#define INIT_FAN_CTRL 0xFF
/* How long we sleep in us while waiting for an RPM result. */
#define ASPEED_RPM_STATUS_SLEEP_USEC 500
#define MAX_CDEV_NAME_LEN 16
struct aspeed_cooling_device {
char name[16];
struct aspeed_pwm_tacho_data *priv;
struct thermal_cooling_device *tcdev;
int pwm_port;
u8 *cooling_levels;
u8 max_state;
u8 cur_state;
};
struct aspeed_pwm_tacho_data {
struct regmap *regmap;
struct reset_control *rst;
unsigned long clk_freq;
bool pwm_present[8];
bool fan_tach_present[16];
u8 type_pwm_clock_unit[3];
u8 type_pwm_clock_division_h[3];
u8 type_pwm_clock_division_l[3];
u8 type_fan_tach_clock_division[3];
u8 type_fan_tach_mode[3];
u16 type_fan_tach_unit[3];
u8 pwm_port_type[8];
u8 pwm_port_fan_ctrl[8];
u8 fan_tach_ch_source[16];
struct aspeed_cooling_device *cdev[8];
const struct attribute_group *groups[3];
};
enum type { TYPEM, TYPEN, TYPEO };
struct type_params {
u32 l_value;
u32 h_value;
u32 unit_value;
u32 clk_ctrl_mask;
u32 clk_ctrl_reg;
u32 ctrl_reg;
u32 ctrl_reg1;
};
static const struct type_params type_params[] = {
[TYPEM] = {
.l_value = ASPEED_PTCR_CLK_CTRL_TYPEM_L,
.h_value = ASPEED_PTCR_CLK_CTRL_TYPEM_H,
.unit_value = ASPEED_PTCR_CLK_CTRL_TYPEM_UNIT,
.clk_ctrl_mask = ASPEED_PTCR_CLK_CTRL_TYPEM_MASK,
.clk_ctrl_reg = ASPEED_PTCR_CLK_CTRL,
.ctrl_reg = ASPEED_PTCR_TYPEM_CTRL,
.ctrl_reg1 = ASPEED_PTCR_TYPEM_CTRL1,
},
[TYPEN] = {
.l_value = ASPEED_PTCR_CLK_CTRL_TYPEN_L,
.h_value = ASPEED_PTCR_CLK_CTRL_TYPEN_H,
.unit_value = ASPEED_PTCR_CLK_CTRL_TYPEN_UNIT,
.clk_ctrl_mask = ASPEED_PTCR_CLK_CTRL_TYPEN_MASK,
.clk_ctrl_reg = ASPEED_PTCR_CLK_CTRL,
.ctrl_reg = ASPEED_PTCR_TYPEN_CTRL,
.ctrl_reg1 = ASPEED_PTCR_TYPEN_CTRL1,
},
[TYPEO] = {
.l_value = ASPEED_PTCR_CLK_CTRL_TYPEO_L,
.h_value = ASPEED_PTCR_CLK_CTRL_TYPEO_H,
.unit_value = ASPEED_PTCR_CLK_CTRL_TYPEO_UNIT,
.clk_ctrl_mask = ASPEED_PTCR_CLK_CTRL_TYPEO_MASK,
.clk_ctrl_reg = ASPEED_PTCR_CLK_CTRL_EXT,
.ctrl_reg = ASPEED_PTCR_TYPEO_CTRL,
.ctrl_reg1 = ASPEED_PTCR_TYPEO_CTRL1,
}
};
enum pwm_port { PWMA, PWMB, PWMC, PWMD, PWME, PWMF, PWMG, PWMH };
struct pwm_port_params {
u32 pwm_en;
u32 ctrl_reg;
u32 type_part1;
u32 type_part2;
u32 type_mask;
u32 duty_ctrl_rise_point;
u32 duty_ctrl_fall_point;
u32 duty_ctrl_reg;
u32 duty_ctrl_rise_fall_mask;
};
static const struct pwm_port_params pwm_port_params[] = {
[PWMA] = {
.pwm_en = ASPEED_PTCR_CTRL_PWMA_EN,
.ctrl_reg = ASPEED_PTCR_CTRL,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWMA_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWMA_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWMA_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM1_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM1_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY0_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM1_RISE_FALL_MASK,
},
[PWMB] = {
.pwm_en = ASPEED_PTCR_CTRL_PWMB_EN,
.ctrl_reg = ASPEED_PTCR_CTRL,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWMB_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWMB_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWMB_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM2_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM2_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY0_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM2_RISE_FALL_MASK,
},
[PWMC] = {
.pwm_en = ASPEED_PTCR_CTRL_PWMC_EN,
.ctrl_reg = ASPEED_PTCR_CTRL,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWMC_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWMC_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWMC_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM1_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM1_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY1_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM1_RISE_FALL_MASK,
},
[PWMD] = {
.pwm_en = ASPEED_PTCR_CTRL_PWMD_EN,
.ctrl_reg = ASPEED_PTCR_CTRL,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWMD_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWMD_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWMD_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM2_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM2_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY1_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM2_RISE_FALL_MASK,
},
[PWME] = {
.pwm_en = ASPEED_PTCR_CTRL_PWME_EN,
.ctrl_reg = ASPEED_PTCR_CTRL_EXT,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWME_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWME_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWME_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM1_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM1_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY2_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM1_RISE_FALL_MASK,
},
[PWMF] = {
.pwm_en = ASPEED_PTCR_CTRL_PWMF_EN,
.ctrl_reg = ASPEED_PTCR_CTRL_EXT,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWMF_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWMF_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWMF_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM2_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM2_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY2_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM2_RISE_FALL_MASK,
},
[PWMG] = {
.pwm_en = ASPEED_PTCR_CTRL_PWMG_EN,
.ctrl_reg = ASPEED_PTCR_CTRL_EXT,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWMG_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWMG_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWMG_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM1_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM1_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY3_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM1_RISE_FALL_MASK,
},
[PWMH] = {
.pwm_en = ASPEED_PTCR_CTRL_PWMH_EN,
.ctrl_reg = ASPEED_PTCR_CTRL_EXT,
.type_part1 = ASPEED_PTCR_CTRL_SET_PWMH_TYPE_PART1,
.type_part2 = ASPEED_PTCR_CTRL_SET_PWMH_TYPE_PART2,
.type_mask = ASPEED_PTCR_CTRL_SET_PWMH_TYPE_MASK,
.duty_ctrl_rise_point = DUTY_CTRL_PWM2_RISE_POINT,
.duty_ctrl_fall_point = DUTY_CTRL_PWM2_FALL_POINT,
.duty_ctrl_reg = ASPEED_PTCR_DUTY3_CTRL,
.duty_ctrl_rise_fall_mask = DUTY_CTRL_PWM2_RISE_FALL_MASK,
}
};
static int regmap_aspeed_pwm_tacho_reg_write(void *context, unsigned int reg,
unsigned int val)
{
void __iomem *regs = (void __iomem *)context;
writel(val, regs + reg);
return 0;
}
static int regmap_aspeed_pwm_tacho_reg_read(void *context, unsigned int reg,
unsigned int *val)
{
void __iomem *regs = (void __iomem *)context;
*val = readl(regs + reg);
return 0;
}
static const struct regmap_config aspeed_pwm_tacho_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = ASPEED_PTCR_TYPEO_LIMIT,
.reg_write = regmap_aspeed_pwm_tacho_reg_write,
.reg_read = regmap_aspeed_pwm_tacho_reg_read,
.fast_io = true,
};
static void aspeed_set_clock_enable(struct regmap *regmap, bool val)
{
regmap_update_bits(regmap, ASPEED_PTCR_CTRL,
ASPEED_PTCR_CTRL_CLK_EN,
val ? ASPEED_PTCR_CTRL_CLK_EN : 0);
}
static void aspeed_set_clock_source(struct regmap *regmap, int val)
{
regmap_update_bits(regmap, ASPEED_PTCR_CTRL,
ASPEED_PTCR_CTRL_CLK_SRC,
val ? ASPEED_PTCR_CTRL_CLK_SRC : 0);
}
static void aspeed_set_pwm_clock_values(struct regmap *regmap, u8 type,
u8 div_high, u8 div_low, u8 unit)
{
u32 reg_value = ((div_high << type_params[type].h_value) |
(div_low << type_params[type].l_value) |
(unit << type_params[type].unit_value));
regmap_update_bits(regmap, type_params[type].clk_ctrl_reg,
type_params[type].clk_ctrl_mask, reg_value);
}
static void aspeed_set_pwm_port_enable(struct regmap *regmap, u8 pwm_port,
bool enable)
{
regmap_update_bits(regmap, pwm_port_params[pwm_port].ctrl_reg,
pwm_port_params[pwm_port].pwm_en,
enable ? pwm_port_params[pwm_port].pwm_en : 0);
}
static void aspeed_set_pwm_port_type(struct regmap *regmap,
u8 pwm_port, u8 type)
{
u32 reg_value = (type & 0x1) << pwm_port_params[pwm_port].type_part1;
reg_value |= (type & 0x2) << pwm_port_params[pwm_port].type_part2;
regmap_update_bits(regmap, pwm_port_params[pwm_port].ctrl_reg,
pwm_port_params[pwm_port].type_mask, reg_value);
}
static void aspeed_set_pwm_port_duty_rising_falling(struct regmap *regmap,
u8 pwm_port, u8 rising,
u8 falling)
{
u32 reg_value = (rising <<
pwm_port_params[pwm_port].duty_ctrl_rise_point);
reg_value |= (falling <<
pwm_port_params[pwm_port].duty_ctrl_fall_point);
regmap_update_bits(regmap, pwm_port_params[pwm_port].duty_ctrl_reg,
pwm_port_params[pwm_port].duty_ctrl_rise_fall_mask,
reg_value);
}
static void aspeed_set_tacho_type_enable(struct regmap *regmap, u8 type,
bool enable)
{
regmap_update_bits(regmap, type_params[type].ctrl_reg,
TYPE_CTRL_FAN_TYPE_EN,
enable ? TYPE_CTRL_FAN_TYPE_EN : 0);
}
static void aspeed_set_tacho_type_values(struct regmap *regmap, u8 type,
u8 mode, u16 unit, u8 division)
{
u32 reg_value = ((mode << TYPE_CTRL_FAN_MODE) |
(unit << TYPE_CTRL_FAN_PERIOD) |
(division << TYPE_CTRL_FAN_DIVISION));
regmap_update_bits(regmap, type_params[type].ctrl_reg,
TYPE_CTRL_FAN_MASK, reg_value);
regmap_update_bits(regmap, type_params[type].ctrl_reg1,
TYPE_CTRL_FAN1_MASK, unit << 16);
}
static void aspeed_set_fan_tach_ch_enable(struct regmap *regmap, u8 fan_tach_ch,
bool enable)
{
regmap_update_bits(regmap, ASPEED_PTCR_CTRL,
ASPEED_PTCR_CTRL_FAN_NUM_EN(fan_tach_ch),
enable ?
ASPEED_PTCR_CTRL_FAN_NUM_EN(fan_tach_ch) : 0);
}
static void aspeed_set_fan_tach_ch_source(struct regmap *regmap, u8 fan_tach_ch,
u8 fan_tach_ch_source)
{
u32 reg_value1 = ((fan_tach_ch_source & 0x3) <<
TACH_PWM_SOURCE_BIT01(fan_tach_ch));
u32 reg_value2 = (((fan_tach_ch_source & 0x4) >> 2) <<
TACH_PWM_SOURCE_BIT2(fan_tach_ch));
regmap_update_bits(regmap, ASPEED_PTCR_TACH_SOURCE,
TACH_PWM_SOURCE_MASK_BIT01(fan_tach_ch),
reg_value1);
regmap_update_bits(regmap, ASPEED_PTCR_TACH_SOURCE_EXT,
TACH_PWM_SOURCE_MASK_BIT2(fan_tach_ch),
reg_value2);
}
static void aspeed_set_pwm_port_fan_ctrl(struct aspeed_pwm_tacho_data *priv,
u8 index, u8 fan_ctrl)
{
u16 period, dc_time_on;
period = priv->type_pwm_clock_unit[priv->pwm_port_type[index]];
period += 1;
dc_time_on = (fan_ctrl * period) / PWM_MAX;
if (dc_time_on == 0) {
aspeed_set_pwm_port_enable(priv->regmap, index, false);
} else {
if (dc_time_on == period)
dc_time_on = 0;
aspeed_set_pwm_port_duty_rising_falling(priv->regmap, index, 0,
dc_time_on);
aspeed_set_pwm_port_enable(priv->regmap, index, true);
}
}
static u32 aspeed_get_fan_tach_ch_measure_period(struct aspeed_pwm_tacho_data
*priv, u8 type)
{
u32 clk;
u16 tacho_unit;
u8 clk_unit, div_h, div_l, tacho_div;
clk = priv->clk_freq;
clk_unit = priv->type_pwm_clock_unit[type];
div_h = priv->type_pwm_clock_division_h[type];
div_h = 0x1 << div_h;
div_l = priv->type_pwm_clock_division_l[type];
if (div_l == 0)
div_l = 1;
else
div_l = div_l * 2;
tacho_unit = priv->type_fan_tach_unit[type];
tacho_div = priv->type_fan_tach_clock_division[type];
tacho_div = 0x4 << (tacho_div * 2);
return clk / (clk_unit * div_h * div_l * tacho_div * tacho_unit);
}
static int aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv,
u8 fan_tach_ch)
{
u32 raw_data, tach_div, clk_source, msec, usec, val;
u8 fan_tach_ch_source, type, mode, both;
int ret;
regmap_write(priv->regmap, ASPEED_PTCR_TRIGGER, 0);
regmap_write(priv->regmap, ASPEED_PTCR_TRIGGER, 0x1 << fan_tach_ch);
fan_tach_ch_source = priv->fan_tach_ch_source[fan_tach_ch];
type = priv->pwm_port_type[fan_tach_ch_source];
msec = (1000 / aspeed_get_fan_tach_ch_measure_period(priv, type));
usec = msec * 1000;
ret = regmap_read_poll_timeout(
priv->regmap,
ASPEED_PTCR_RESULT,
val,
(val & RESULT_STATUS_MASK),
ASPEED_RPM_STATUS_SLEEP_USEC,
usec);
/* return -ETIMEDOUT if we didn't get an answer. */
if (ret)
return ret;
raw_data = val & RESULT_VALUE_MASK;
tach_div = priv->type_fan_tach_clock_division[type];
/*
* We need the mode to determine if the raw_data is double (from
* counting both edges).
*/
mode = priv->type_fan_tach_mode[type];
both = (mode & BOTH_EDGES) ? 1 : 0;
tach_div = (0x4 << both) << (tach_div * 2);
clk_source = priv->clk_freq;
if (raw_data == 0)
return 0;
return (clk_source * 60) / (2 * raw_data * tach_div);
}
static ssize_t pwm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int index = sensor_attr->index;
int ret;
struct aspeed_pwm_tacho_data *priv = dev_get_drvdata(dev);
long fan_ctrl;
ret = kstrtol(buf, 10, &fan_ctrl);
if (ret != 0)
return ret;
if (fan_ctrl < 0 || fan_ctrl > PWM_MAX)
return -EINVAL;
if (priv->pwm_port_fan_ctrl[index] == fan_ctrl)
return count;
priv->pwm_port_fan_ctrl[index] = fan_ctrl;
aspeed_set_pwm_port_fan_ctrl(priv, index, fan_ctrl);
return count;
}
static ssize_t pwm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int index = sensor_attr->index;
struct aspeed_pwm_tacho_data *priv = dev_get_drvdata(dev);
return sprintf(buf, "%u\n", priv->pwm_port_fan_ctrl[index]);
}
static ssize_t rpm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int index = sensor_attr->index;
int rpm;
struct aspeed_pwm_tacho_data *priv = dev_get_drvdata(dev);
rpm = aspeed_get_fan_tach_ch_rpm(priv, index);
if (rpm < 0)
return rpm;
return sprintf(buf, "%d\n", rpm);
}
static umode_t pwm_is_visible(struct kobject *kobj,
struct attribute *a, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct aspeed_pwm_tacho_data *priv = dev_get_drvdata(dev);
if (!priv->pwm_present[index])
return 0;
return a->mode;
}
static umode_t fan_dev_is_visible(struct kobject *kobj,
struct attribute *a, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct aspeed_pwm_tacho_data *priv = dev_get_drvdata(dev);
if (!priv->fan_tach_present[index])
return 0;
return a->mode;
}
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
static SENSOR_DEVICE_ATTR_RW(pwm4, pwm, 3);
static SENSOR_DEVICE_ATTR_RW(pwm5, pwm, 4);
static SENSOR_DEVICE_ATTR_RW(pwm6, pwm, 5);
static SENSOR_DEVICE_ATTR_RW(pwm7, pwm, 6);
static SENSOR_DEVICE_ATTR_RW(pwm8, pwm, 7);
static struct attribute *pwm_dev_attrs[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm4.dev_attr.attr,
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm6.dev_attr.attr,
&sensor_dev_attr_pwm7.dev_attr.attr,
&sensor_dev_attr_pwm8.dev_attr.attr,
NULL,
};
static const struct attribute_group pwm_dev_group = {
.attrs = pwm_dev_attrs,
.is_visible = pwm_is_visible,
};
static SENSOR_DEVICE_ATTR_RO(fan1_input, rpm, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, rpm, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, rpm, 2);
static SENSOR_DEVICE_ATTR_RO(fan4_input, rpm, 3);
static SENSOR_DEVICE_ATTR_RO(fan5_input, rpm, 4);
static SENSOR_DEVICE_ATTR_RO(fan6_input, rpm, 5);
static SENSOR_DEVICE_ATTR_RO(fan7_input, rpm, 6);
static SENSOR_DEVICE_ATTR_RO(fan8_input, rpm, 7);
static SENSOR_DEVICE_ATTR_RO(fan9_input, rpm, 8);
static SENSOR_DEVICE_ATTR_RO(fan10_input, rpm, 9);
static SENSOR_DEVICE_ATTR_RO(fan11_input, rpm, 10);
static SENSOR_DEVICE_ATTR_RO(fan12_input, rpm, 11);
static SENSOR_DEVICE_ATTR_RO(fan13_input, rpm, 12);
static SENSOR_DEVICE_ATTR_RO(fan14_input, rpm, 13);
static SENSOR_DEVICE_ATTR_RO(fan15_input, rpm, 14);
static SENSOR_DEVICE_ATTR_RO(fan16_input, rpm, 15);
static struct attribute *fan_dev_attrs[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan5_input.dev_attr.attr,
&sensor_dev_attr_fan6_input.dev_attr.attr,
&sensor_dev_attr_fan7_input.dev_attr.attr,
&sensor_dev_attr_fan8_input.dev_attr.attr,
&sensor_dev_attr_fan9_input.dev_attr.attr,
&sensor_dev_attr_fan10_input.dev_attr.attr,
&sensor_dev_attr_fan11_input.dev_attr.attr,
&sensor_dev_attr_fan12_input.dev_attr.attr,
&sensor_dev_attr_fan13_input.dev_attr.attr,
&sensor_dev_attr_fan14_input.dev_attr.attr,
&sensor_dev_attr_fan15_input.dev_attr.attr,
&sensor_dev_attr_fan16_input.dev_attr.attr,
NULL
};
static const struct attribute_group fan_dev_group = {
.attrs = fan_dev_attrs,
.is_visible = fan_dev_is_visible,
};
/*
* The clock type is type M :
* The PWM frequency = 24MHz / (type M clock division L bit *
* type M clock division H bit * (type M PWM period bit + 1))
*/
static void aspeed_create_type(struct aspeed_pwm_tacho_data *priv)
{
priv->type_pwm_clock_division_h[TYPEM] = M_PWM_DIV_H;
priv->type_pwm_clock_division_l[TYPEM] = M_PWM_DIV_L;
priv->type_pwm_clock_unit[TYPEM] = M_PWM_PERIOD;
aspeed_set_pwm_clock_values(priv->regmap, TYPEM, M_PWM_DIV_H,
M_PWM_DIV_L, M_PWM_PERIOD);
aspeed_set_tacho_type_enable(priv->regmap, TYPEM, true);
priv->type_fan_tach_clock_division[TYPEM] = M_TACH_CLK_DIV;
priv->type_fan_tach_unit[TYPEM] = M_TACH_UNIT;
priv->type_fan_tach_mode[TYPEM] = M_TACH_MODE;
aspeed_set_tacho_type_values(priv->regmap, TYPEM, M_TACH_MODE,
M_TACH_UNIT, M_TACH_CLK_DIV);
}
static void aspeed_create_pwm_port(struct aspeed_pwm_tacho_data *priv,
u8 pwm_port)
{
aspeed_set_pwm_port_enable(priv->regmap, pwm_port, true);
priv->pwm_present[pwm_port] = true;
priv->pwm_port_type[pwm_port] = TYPEM;
aspeed_set_pwm_port_type(priv->regmap, pwm_port, TYPEM);
priv->pwm_port_fan_ctrl[pwm_port] = INIT_FAN_CTRL;
aspeed_set_pwm_port_fan_ctrl(priv, pwm_port, INIT_FAN_CTRL);
}
static void aspeed_create_fan_tach_channel(struct aspeed_pwm_tacho_data *priv,
u8 *fan_tach_ch,
int count,
u8 pwm_source)
{
u8 val, index;
for (val = 0; val < count; val++) {
index = fan_tach_ch[val];
aspeed_set_fan_tach_ch_enable(priv->regmap, index, true);
priv->fan_tach_present[index] = true;
priv->fan_tach_ch_source[index] = pwm_source;
aspeed_set_fan_tach_ch_source(priv->regmap, index, pwm_source);
}
}
static int
aspeed_pwm_cz_get_max_state(struct thermal_cooling_device *tcdev,
unsigned long *state)
{
struct aspeed_cooling_device *cdev = tcdev->devdata;
*state = cdev->max_state;
return 0;
}
static int
aspeed_pwm_cz_get_cur_state(struct thermal_cooling_device *tcdev,
unsigned long *state)
{
struct aspeed_cooling_device *cdev = tcdev->devdata;
*state = cdev->cur_state;
return 0;
}
static int
aspeed_pwm_cz_set_cur_state(struct thermal_cooling_device *tcdev,
unsigned long state)
{
struct aspeed_cooling_device *cdev = tcdev->devdata;
if (state > cdev->max_state)
return -EINVAL;
cdev->cur_state = state;
cdev->priv->pwm_port_fan_ctrl[cdev->pwm_port] =
cdev->cooling_levels[cdev->cur_state];
aspeed_set_pwm_port_fan_ctrl(cdev->priv, cdev->pwm_port,
cdev->cooling_levels[cdev->cur_state]);
return 0;
}
static const struct thermal_cooling_device_ops aspeed_pwm_cool_ops = {
.get_max_state = aspeed_pwm_cz_get_max_state,
.get_cur_state = aspeed_pwm_cz_get_cur_state,
.set_cur_state = aspeed_pwm_cz_set_cur_state,
};
static int aspeed_create_pwm_cooling(struct device *dev,
struct device_node *child,
struct aspeed_pwm_tacho_data *priv,
u32 pwm_port, u8 num_levels)
{
int ret;
struct aspeed_cooling_device *cdev;
cdev = devm_kzalloc(dev, sizeof(*cdev), GFP_KERNEL);
if (!cdev)
return -ENOMEM;
cdev->cooling_levels = devm_kzalloc(dev, num_levels, GFP_KERNEL);
if (!cdev->cooling_levels)
return -ENOMEM;
cdev->max_state = num_levels - 1;
ret = of_property_read_u8_array(child, "cooling-levels",
cdev->cooling_levels,
num_levels);
if (ret) {
dev_err(dev, "Property 'cooling-levels' cannot be read.\n");
return ret;
}
snprintf(cdev->name, MAX_CDEV_NAME_LEN, "%pOFn%d", child, pwm_port);
cdev->tcdev = devm_thermal_of_cooling_device_register(dev, child,
cdev->name, cdev, &aspeed_pwm_cool_ops);
if (IS_ERR(cdev->tcdev))
return PTR_ERR(cdev->tcdev);
cdev->priv = priv;
cdev->pwm_port = pwm_port;
priv->cdev[pwm_port] = cdev;
return 0;
}
static int aspeed_create_fan(struct device *dev,
struct device_node *child,
struct aspeed_pwm_tacho_data *priv)
{
u8 *fan_tach_ch;
u32 pwm_port;
int ret, count;
ret = of_property_read_u32(child, "reg", &pwm_port);
if (ret)
return ret;
if (pwm_port >= ARRAY_SIZE(pwm_port_params))
return -EINVAL;
aspeed_create_pwm_port(priv, (u8)pwm_port);
ret = of_property_count_u8_elems(child, "cooling-levels");
if (ret > 0) {
ret = aspeed_create_pwm_cooling(dev, child, priv, pwm_port,
ret);
if (ret)
return ret;
}
count = of_property_count_u8_elems(child, "aspeed,fan-tach-ch");
if (count < 1)
return -EINVAL;
fan_tach_ch = devm_kcalloc(dev, count, sizeof(*fan_tach_ch),
GFP_KERNEL);
if (!fan_tach_ch)
return -ENOMEM;
ret = of_property_read_u8_array(child, "aspeed,fan-tach-ch",
fan_tach_ch, count);
if (ret)
return ret;
aspeed_create_fan_tach_channel(priv, fan_tach_ch, count, pwm_port);
return 0;
}
static void aspeed_pwm_tacho_remove(void *data)
{
struct aspeed_pwm_tacho_data *priv = data;
reset_control_assert(priv->rst);
}
static int aspeed_pwm_tacho_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np, *child;
struct aspeed_pwm_tacho_data *priv;
void __iomem *regs;
struct device *hwmon;
struct clk *clk;
int ret;
np = dev->of_node;
regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(regs))
return PTR_ERR(regs);
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->regmap = devm_regmap_init(dev, NULL, (__force void *)regs,
&aspeed_pwm_tacho_regmap_config);
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);
priv->rst = devm_reset_control_get_exclusive(dev, NULL);
if (IS_ERR(priv->rst)) {
dev_err(dev,
"missing or invalid reset controller device tree entry");
return PTR_ERR(priv->rst);
}
reset_control_deassert(priv->rst);
ret = devm_add_action_or_reset(dev, aspeed_pwm_tacho_remove, priv);
if (ret)
return ret;
regmap_write(priv->regmap, ASPEED_PTCR_TACH_SOURCE, 0);
regmap_write(priv->regmap, ASPEED_PTCR_TACH_SOURCE_EXT, 0);
clk = devm_clk_get(dev, NULL);
if (IS_ERR(clk))
return -ENODEV;
priv->clk_freq = clk_get_rate(clk);
aspeed_set_clock_enable(priv->regmap, true);
aspeed_set_clock_source(priv->regmap, 0);
aspeed_create_type(priv);
for_each_child_of_node(np, child) {
ret = aspeed_create_fan(dev, child, priv);
if (ret) {
of_node_put(child);
return ret;
}
}
priv->groups[0] = &pwm_dev_group;
priv->groups[1] = &fan_dev_group;
priv->groups[2] = NULL;
hwmon = devm_hwmon_device_register_with_groups(dev,
"aspeed_pwm_tacho",
priv, priv->groups);
return PTR_ERR_OR_ZERO(hwmon);
}
static const struct of_device_id of_pwm_tacho_match_table[] = {
{ .compatible = "aspeed,ast2400-pwm-tacho", },
{ .compatible = "aspeed,ast2500-pwm-tacho", },
{},
};
MODULE_DEVICE_TABLE(of, of_pwm_tacho_match_table);
static struct platform_driver aspeed_pwm_tacho_driver = {
.probe = aspeed_pwm_tacho_probe,
.driver = {
.name = "aspeed_pwm_tacho",
.of_match_table = of_pwm_tacho_match_table,
},
};
module_platform_driver(aspeed_pwm_tacho_driver);
MODULE_AUTHOR("Jaghathiswari Rankappagounder Natarajan <[email protected]>");
MODULE_DESCRIPTION("ASPEED PWM and Fan Tacho device driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/aspeed-pwm-tacho.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x, SCH5027,
* and SCH5127 Super-I/O chips integrated hardware monitoring
* features.
* Copyright (c) 2007, 2008, 2009, 2010 Juerg Haefliger <[email protected]>
*
* This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
* the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus
* if a SCH311x or SCH5127 chip is found. Both types of chips have very
* similar hardware monitoring capabilities but differ in the way they can be
* accessed.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/acpi.h>
#include <linux/io.h>
/* ISA device, if found */
static struct platform_device *pdev;
/* Module load parameters */
static bool force_start;
module_param(force_start, bool, 0);
MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static bool probe_all_addr;
module_param(probe_all_addr, bool, 0);
MODULE_PARM_DESC(probe_all_addr,
"Include probing of non-standard LPC addresses");
/* Addresses to scan */
static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
enum chips { dme1737, sch5027, sch311x, sch5127 };
#define DO_REPORT "Please report to the driver maintainer."
/* ---------------------------------------------------------------------
* Registers
*
* The sensors are defined as follows:
*
* Voltages Temperatures
* -------- ------------
* in0 +5VTR (+5V stdby) temp1 Remote diode 1
* in1 Vccp (proc core) temp2 Internal temp
* in2 VCC (internal +3.3V) temp3 Remote diode 2
* in3 +5V
* in4 +12V
* in5 VTR (+3.3V stby)
* in6 Vbat
* in7 Vtrip (sch5127 only)
*
* --------------------------------------------------------------------- */
/* Voltages (in) numbered 0-7 (ix) */
#define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) : \
(ix) < 7 ? 0x94 + (ix) : \
0x1f)
#define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
: 0x91 + (ix) * 2)
#define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
: 0x92 + (ix) * 2)
/* Temperatures (temp) numbered 0-2 (ix) */
#define DME1737_REG_TEMP(ix) (0x25 + (ix))
#define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
#define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
#define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
: 0x1c + (ix))
/*
* Voltage and temperature LSBs
* The LSBs (4 bits each) are stored in 5 registers with the following layouts:
* IN_TEMP_LSB(0) = [in5, in6]
* IN_TEMP_LSB(1) = [temp3, temp1]
* IN_TEMP_LSB(2) = [in4, temp2]
* IN_TEMP_LSB(3) = [in3, in0]
* IN_TEMP_LSB(4) = [in2, in1]
* IN_TEMP_LSB(5) = [res, in7]
*/
#define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0, 5};
static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4, 4};
static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
/* Fans numbered 0-5 (ix) */
#define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
: 0xa1 + (ix) * 2)
#define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
: 0xa5 + (ix) * 2)
#define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
: 0xb2 + (ix))
#define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
/* PWMs numbered 0-2, 4-5 (ix) */
#define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
: 0xa1 + (ix))
#define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
#define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
#define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
: 0xa3 + (ix))
/*
* The layout of the ramp rate registers is different from the other pwm
* registers. The bits for the 3 PWMs are stored in 2 registers:
* PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
* PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0]
*/
#define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
/* Thermal zones 0-2 */
#define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
#define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
/*
* The layout of the hysteresis registers is different from the other zone
* registers. The bits for the 3 zones are stored in 2 registers:
* ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
* ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES]
*/
#define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
/*
* Alarm registers and bit mapping
* The 3 8-bit alarm registers will be concatenated to a single 32-bit
* alarm value [0, ALARM3, ALARM2, ALARM1].
*/
#define DME1737_REG_ALARM1 0x41
#define DME1737_REG_ALARM2 0x42
#define DME1737_REG_ALARM3 0x83
static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17, 18};
static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
/* Miscellaneous registers */
#define DME1737_REG_DEVICE 0x3d
#define DME1737_REG_COMPANY 0x3e
#define DME1737_REG_VERSTEP 0x3f
#define DME1737_REG_CONFIG 0x40
#define DME1737_REG_CONFIG2 0x7f
#define DME1737_REG_VID 0x43
#define DME1737_REG_TACH_PWM 0x81
/* ---------------------------------------------------------------------
* Misc defines
* --------------------------------------------------------------------- */
/* Chip identification */
#define DME1737_COMPANY_SMSC 0x5c
#define DME1737_VERSTEP 0x88
#define DME1737_VERSTEP_MASK 0xf8
#define SCH311X_DEVICE 0x8c
#define SCH5027_VERSTEP 0x69
#define SCH5127_DEVICE 0x8e
/* Device ID values (global configuration register index 0x20) */
#define DME1737_ID_1 0x77
#define DME1737_ID_2 0x78
#define SCH3112_ID 0x7c
#define SCH3114_ID 0x7d
#define SCH3116_ID 0x7f
#define SCH5027_ID 0x89
#define SCH5127_ID 0x86
/* Length of ISA address segment */
#define DME1737_EXTENT 2
/* chip-dependent features */
#define HAS_TEMP_OFFSET (1 << 0) /* bit 0 */
#define HAS_VID (1 << 1) /* bit 1 */
#define HAS_ZONE3 (1 << 2) /* bit 2 */
#define HAS_ZONE_HYST (1 << 3) /* bit 3 */
#define HAS_PWM_MIN (1 << 4) /* bit 4 */
#define HAS_FAN(ix) (1 << ((ix) + 5)) /* bits 5-10 */
#define HAS_PWM(ix) (1 << ((ix) + 11)) /* bits 11-16 */
#define HAS_IN7 (1 << 17) /* bit 17 */
/* ---------------------------------------------------------------------
* Data structures and manipulation thereof
* --------------------------------------------------------------------- */
struct dme1737_data {
struct i2c_client *client; /* for I2C devices only */
struct device *hwmon_dev;
const char *name;
unsigned int addr; /* for ISA devices only */
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_update; /* in jiffies */
unsigned long last_vbat; /* in jiffies */
enum chips type;
const int *in_nominal; /* pointer to IN_NOMINAL array */
u8 vid;
u8 pwm_rr_en;
u32 has_features;
/* Register values */
u16 in[8];
u8 in_min[8];
u8 in_max[8];
s16 temp[3];
s8 temp_min[3];
s8 temp_max[3];
s8 temp_offset[3];
u8 config;
u8 config2;
u8 vrm;
u16 fan[6];
u16 fan_min[6];
u8 fan_max[2];
u8 fan_opt[6];
u8 pwm[6];
u8 pwm_min[3];
u8 pwm_config[3];
u8 pwm_acz[3];
u8 pwm_freq[6];
u8 pwm_rr[2];
s8 zone_low[3];
s8 zone_abs[3];
u8 zone_hyst[2];
u32 alarms;
};
/* Nominal voltage values */
static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300,
3300};
static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300,
3300};
static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300,
3300};
static const int IN_NOMINAL_SCH5127[] = {2500, 2250, 3300, 1125, 1125, 3300,
3300, 1500};
#define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \
(type) == sch5027 ? IN_NOMINAL_SCH5027 : \
(type) == sch5127 ? IN_NOMINAL_SCH5127 : \
IN_NOMINAL_DME1737)
/*
* Voltage input
* Voltage inputs have 16 bits resolution, limit values have 8 bits
* resolution.
*/
static inline int IN_FROM_REG(int reg, int nominal, int res)
{
return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2));
}
static inline int IN_TO_REG(long val, int nominal)
{
val = clamp_val(val, 0, 255 * nominal / 192);
return DIV_ROUND_CLOSEST(val * 192, nominal);
}
/*
* Temperature input
* The register values represent temperatures in 2's complement notation from
* -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
* values have 8 bits resolution.
*/
static inline int TEMP_FROM_REG(int reg, int res)
{
return (reg * 1000) >> (res - 8);
}
static inline int TEMP_TO_REG(long val)
{
val = clamp_val(val, -128000, 127000);
return DIV_ROUND_CLOSEST(val, 1000);
}
/* Temperature range */
static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
10000, 13333, 16000, 20000, 26666, 32000,
40000, 53333, 80000};
static inline int TEMP_RANGE_FROM_REG(int reg)
{
return TEMP_RANGE[(reg >> 4) & 0x0f];
}
static int TEMP_RANGE_TO_REG(long val, int reg)
{
int i;
for (i = 15; i > 0; i--) {
if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2)
break;
}
return (reg & 0x0f) | (i << 4);
}
/*
* Temperature hysteresis
* Register layout:
* reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
* reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx]
*/
static inline int TEMP_HYST_FROM_REG(int reg, int ix)
{
return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
}
static inline int TEMP_HYST_TO_REG(int temp, long hyst, int ix, int reg)
{
hyst = clamp_val(hyst, temp - 15000, temp);
hyst = DIV_ROUND_CLOSEST(temp - hyst, 1000);
return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
}
/* Fan input RPM */
static inline int FAN_FROM_REG(int reg, int tpc)
{
if (tpc)
return tpc * reg;
else
return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg;
}
static inline int FAN_TO_REG(long val, int tpc)
{
if (tpc) {
return clamp_val(val / tpc, 0, 0xffff);
} else {
return (val <= 0) ? 0xffff :
clamp_val(90000 * 60 / val, 0, 0xfffe);
}
}
/*
* Fan TPC (tach pulse count)
* Converts a register value to a TPC multiplier or returns 0 if the tachometer
* is configured in legacy (non-tpc) mode
*/
static inline int FAN_TPC_FROM_REG(int reg)
{
return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
}
/*
* Fan type
* The type of a fan is expressed in number of pulses-per-revolution that it
* emits
*/
static inline int FAN_TYPE_FROM_REG(int reg)
{
int edge = (reg >> 1) & 0x03;
return (edge > 0) ? 1 << (edge - 1) : 0;
}
static inline int FAN_TYPE_TO_REG(long val, int reg)
{
int edge = (val == 4) ? 3 : val;
return (reg & 0xf9) | (edge << 1);
}
/* Fan max RPM */
static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
0x11, 0x0f, 0x0e};
static int FAN_MAX_FROM_REG(int reg)
{
int i;
for (i = 10; i > 0; i--) {
if (reg == FAN_MAX[i])
break;
}
return 1000 + i * 500;
}
static int FAN_MAX_TO_REG(long val)
{
int i;
for (i = 10; i > 0; i--) {
if (val > (1000 + (i - 1) * 500))
break;
}
return FAN_MAX[i];
}
/*
* PWM enable
* Register to enable mapping:
* 000: 2 fan on zone 1 auto
* 001: 2 fan on zone 2 auto
* 010: 2 fan on zone 3 auto
* 011: 0 fan full on
* 100: -1 fan disabled
* 101: 2 fan on hottest of zones 2,3 auto
* 110: 2 fan on hottest of zones 1,2,3 auto
* 111: 1 fan in manual mode
*/
static inline int PWM_EN_FROM_REG(int reg)
{
static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
return en[(reg >> 5) & 0x07];
}
static inline int PWM_EN_TO_REG(int val, int reg)
{
int en = (val == 1) ? 7 : 3;
return (reg & 0x1f) | ((en & 0x07) << 5);
}
/*
* PWM auto channels zone
* Register to auto channels zone mapping (ACZ is a bitfield with bit x
* corresponding to zone x+1):
* 000: 001 fan on zone 1 auto
* 001: 010 fan on zone 2 auto
* 010: 100 fan on zone 3 auto
* 011: 000 fan full on
* 100: 000 fan disabled
* 101: 110 fan on hottest of zones 2,3 auto
* 110: 111 fan on hottest of zones 1,2,3 auto
* 111: 000 fan in manual mode
*/
static inline int PWM_ACZ_FROM_REG(int reg)
{
static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
return acz[(reg >> 5) & 0x07];
}
static inline int PWM_ACZ_TO_REG(long val, int reg)
{
int acz = (val == 4) ? 2 : val - 1;
return (reg & 0x1f) | ((acz & 0x07) << 5);
}
/* PWM frequency */
static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
15000, 20000, 30000, 25000, 0, 0, 0, 0};
static inline int PWM_FREQ_FROM_REG(int reg)
{
return PWM_FREQ[reg & 0x0f];
}
static int PWM_FREQ_TO_REG(long val, int reg)
{
int i;
/* the first two cases are special - stupid chip design! */
if (val > 27500) {
i = 10;
} else if (val > 22500) {
i = 11;
} else {
for (i = 9; i > 0; i--) {
if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2)
break;
}
}
return (reg & 0xf0) | i;
}
/*
* PWM ramp rate
* Register layout:
* reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
* reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0]
*/
static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
static inline int PWM_RR_FROM_REG(int reg, int ix)
{
int rr = (ix == 1) ? reg >> 4 : reg;
return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
}
static int PWM_RR_TO_REG(long val, int ix, int reg)
{
int i;
for (i = 0; i < 7; i++) {
if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2)
break;
}
return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
}
/* PWM ramp rate enable */
static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
{
return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
}
static inline int PWM_RR_EN_TO_REG(long val, int ix, int reg)
{
int en = (ix == 1) ? 0x80 : 0x08;
return val ? reg | en : reg & ~en;
}
/*
* PWM min/off
* The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
* the register layout).
*/
static inline int PWM_OFF_FROM_REG(int reg, int ix)
{
return (reg >> (ix + 5)) & 0x01;
}
static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
{
return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
}
/* ---------------------------------------------------------------------
* Device I/O access
*
* ISA access is performed through an index/data register pair and needs to
* be protected by a mutex during runtime (not required for initialization).
* We use data->update_lock for this and need to ensure that we acquire it
* before calling dme1737_read or dme1737_write.
* --------------------------------------------------------------------- */
static u8 dme1737_read(const struct dme1737_data *data, u8 reg)
{
struct i2c_client *client = data->client;
s32 val;
if (client) { /* I2C device */
val = i2c_smbus_read_byte_data(client, reg);
if (val < 0) {
dev_warn(&client->dev,
"Read from register 0x%02x failed! %s\n",
reg, DO_REPORT);
}
} else { /* ISA device */
outb(reg, data->addr);
val = inb(data->addr + 1);
}
return val;
}
static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val)
{
struct i2c_client *client = data->client;
s32 res = 0;
if (client) { /* I2C device */
res = i2c_smbus_write_byte_data(client, reg, val);
if (res < 0) {
dev_warn(&client->dev,
"Write to register 0x%02x failed! %s\n",
reg, DO_REPORT);
}
} else { /* ISA device */
outb(reg, data->addr);
outb(val, data->addr + 1);
}
return res;
}
static struct dme1737_data *dme1737_update_device(struct device *dev)
{
struct dme1737_data *data = dev_get_drvdata(dev);
int ix;
u8 lsb[6];
mutex_lock(&data->update_lock);
/* Enable a Vbat monitoring cycle every 10 mins */
if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data,
DME1737_REG_CONFIG) | 0x10);
data->last_vbat = jiffies;
}
/* Sample register contents every 1 sec */
if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
if (data->has_features & HAS_VID) {
data->vid = dme1737_read(data, DME1737_REG_VID) &
0x3f;
}
/* In (voltage) registers */
for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
/*
* Voltage inputs are stored as 16 bit values even
* though they have only 12 bits resolution. This is
* to make it consistent with the temp inputs.
*/
if (ix == 7 && !(data->has_features & HAS_IN7))
continue;
data->in[ix] = dme1737_read(data,
DME1737_REG_IN(ix)) << 8;
data->in_min[ix] = dme1737_read(data,
DME1737_REG_IN_MIN(ix));
data->in_max[ix] = dme1737_read(data,
DME1737_REG_IN_MAX(ix));
}
/* Temp registers */
for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
/*
* Temp inputs are stored as 16 bit values even
* though they have only 12 bits resolution. This is
* to take advantage of implicit conversions between
* register values (2's complement) and temp values
* (signed decimal).
*/
data->temp[ix] = dme1737_read(data,
DME1737_REG_TEMP(ix)) << 8;
data->temp_min[ix] = dme1737_read(data,
DME1737_REG_TEMP_MIN(ix));
data->temp_max[ix] = dme1737_read(data,
DME1737_REG_TEMP_MAX(ix));
if (data->has_features & HAS_TEMP_OFFSET) {
data->temp_offset[ix] = dme1737_read(data,
DME1737_REG_TEMP_OFFSET(ix));
}
}
/*
* In and temp LSB registers
* The LSBs are latched when the MSBs are read, so the order in
* which the registers are read (MSB first, then LSB) is
* important!
*/
for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
if (ix == 5 && !(data->has_features & HAS_IN7))
continue;
lsb[ix] = dme1737_read(data,
DME1737_REG_IN_TEMP_LSB(ix));
}
for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
if (ix == 7 && !(data->has_features & HAS_IN7))
continue;
data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
}
for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
}
/* Fan registers */
for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
/*
* Skip reading registers if optional fans are not
* present
*/
if (!(data->has_features & HAS_FAN(ix)))
continue;
data->fan[ix] = dme1737_read(data,
DME1737_REG_FAN(ix));
data->fan[ix] |= dme1737_read(data,
DME1737_REG_FAN(ix) + 1) << 8;
data->fan_min[ix] = dme1737_read(data,
DME1737_REG_FAN_MIN(ix));
data->fan_min[ix] |= dme1737_read(data,
DME1737_REG_FAN_MIN(ix) + 1) << 8;
data->fan_opt[ix] = dme1737_read(data,
DME1737_REG_FAN_OPT(ix));
/* fan_max exists only for fan[5-6] */
if (ix > 3) {
data->fan_max[ix - 4] = dme1737_read(data,
DME1737_REG_FAN_MAX(ix));
}
}
/* PWM registers */
for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
/*
* Skip reading registers if optional PWMs are not
* present
*/
if (!(data->has_features & HAS_PWM(ix)))
continue;
data->pwm[ix] = dme1737_read(data,
DME1737_REG_PWM(ix));
data->pwm_freq[ix] = dme1737_read(data,
DME1737_REG_PWM_FREQ(ix));
/* pwm_config and pwm_min exist only for pwm[1-3] */
if (ix < 3) {
data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
data->pwm_min[ix] = dme1737_read(data,
DME1737_REG_PWM_MIN(ix));
}
}
for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
data->pwm_rr[ix] = dme1737_read(data,
DME1737_REG_PWM_RR(ix));
}
/* Thermal zone registers */
for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
/* Skip reading registers if zone3 is not present */
if ((ix == 2) && !(data->has_features & HAS_ZONE3))
continue;
/* sch5127 zone2 registers are special */
if ((ix == 1) && (data->type == sch5127)) {
data->zone_low[1] = dme1737_read(data,
DME1737_REG_ZONE_LOW(2));
data->zone_abs[1] = dme1737_read(data,
DME1737_REG_ZONE_ABS(2));
} else {
data->zone_low[ix] = dme1737_read(data,
DME1737_REG_ZONE_LOW(ix));
data->zone_abs[ix] = dme1737_read(data,
DME1737_REG_ZONE_ABS(ix));
}
}
if (data->has_features & HAS_ZONE_HYST) {
for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
data->zone_hyst[ix] = dme1737_read(data,
DME1737_REG_ZONE_HYST(ix));
}
}
/* Alarm registers */
data->alarms = dme1737_read(data,
DME1737_REG_ALARM1);
/*
* Bit 7 tells us if the other alarm registers are non-zero and
* therefore also need to be read
*/
if (data->alarms & 0x80) {
data->alarms |= dme1737_read(data,
DME1737_REG_ALARM2) << 8;
data->alarms |= dme1737_read(data,
DME1737_REG_ALARM3) << 16;
}
/*
* The ISA chips require explicit clearing of alarm bits.
* Don't worry, an alarm will come back if the condition
* that causes it still exists
*/
if (!data->client) {
if (data->alarms & 0xff0000)
dme1737_write(data, DME1737_REG_ALARM3, 0xff);
if (data->alarms & 0xff00)
dme1737_write(data, DME1737_REG_ALARM2, 0xff);
if (data->alarms & 0xff)
dme1737_write(data, DME1737_REG_ALARM1, 0xff);
}
data->last_update = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* ---------------------------------------------------------------------
* Voltage sysfs attributes
* ix = [0-7]
* --------------------------------------------------------------------- */
#define SYS_IN_INPUT 0
#define SYS_IN_MIN 1
#define SYS_IN_MAX 2
#define SYS_IN_ALARM 3
static ssize_t show_in(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct dme1737_data *data = dme1737_update_device(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SYS_IN_INPUT:
res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16);
break;
case SYS_IN_MIN:
res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8);
break;
case SYS_IN_MAX:
res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8);
break;
case SYS_IN_ALARM:
res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
break;
default:
res = 0;
dev_dbg(dev, "Unknown function %d.\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_in(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SYS_IN_MIN:
data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]);
dme1737_write(data, DME1737_REG_IN_MIN(ix),
data->in_min[ix]);
break;
case SYS_IN_MAX:
data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]);
dme1737_write(data, DME1737_REG_IN_MAX(ix),
data->in_max[ix]);
break;
default:
dev_dbg(dev, "Unknown function %d.\n", fn);
}
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* Temperature sysfs attributes
* ix = [0-2]
* --------------------------------------------------------------------- */
#define SYS_TEMP_INPUT 0
#define SYS_TEMP_MIN 1
#define SYS_TEMP_MAX 2
#define SYS_TEMP_OFFSET 3
#define SYS_TEMP_ALARM 4
#define SYS_TEMP_FAULT 5
static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct dme1737_data *data = dme1737_update_device(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SYS_TEMP_INPUT:
res = TEMP_FROM_REG(data->temp[ix], 16);
break;
case SYS_TEMP_MIN:
res = TEMP_FROM_REG(data->temp_min[ix], 8);
break;
case SYS_TEMP_MAX:
res = TEMP_FROM_REG(data->temp_max[ix], 8);
break;
case SYS_TEMP_OFFSET:
res = TEMP_FROM_REG(data->temp_offset[ix], 8);
break;
case SYS_TEMP_ALARM:
res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
break;
case SYS_TEMP_FAULT:
res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
break;
default:
res = 0;
dev_dbg(dev, "Unknown function %d.\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SYS_TEMP_MIN:
data->temp_min[ix] = TEMP_TO_REG(val);
dme1737_write(data, DME1737_REG_TEMP_MIN(ix),
data->temp_min[ix]);
break;
case SYS_TEMP_MAX:
data->temp_max[ix] = TEMP_TO_REG(val);
dme1737_write(data, DME1737_REG_TEMP_MAX(ix),
data->temp_max[ix]);
break;
case SYS_TEMP_OFFSET:
data->temp_offset[ix] = TEMP_TO_REG(val);
dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix),
data->temp_offset[ix]);
break;
default:
dev_dbg(dev, "Unknown function %d.\n", fn);
}
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* Zone sysfs attributes
* ix = [0-2]
* --------------------------------------------------------------------- */
#define SYS_ZONE_AUTO_CHANNELS_TEMP 0
#define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
#define SYS_ZONE_AUTO_POINT1_TEMP 2
#define SYS_ZONE_AUTO_POINT2_TEMP 3
#define SYS_ZONE_AUTO_POINT3_TEMP 4
static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct dme1737_data *data = dme1737_update_device(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SYS_ZONE_AUTO_CHANNELS_TEMP:
/* check config2 for non-standard temp-to-zone mapping */
if ((ix == 1) && (data->config2 & 0x02))
res = 4;
else
res = 1 << ix;
break;
case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
res = TEMP_FROM_REG(data->zone_low[ix], 8) -
TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
break;
case SYS_ZONE_AUTO_POINT1_TEMP:
res = TEMP_FROM_REG(data->zone_low[ix], 8);
break;
case SYS_ZONE_AUTO_POINT2_TEMP:
/* pwm_freq holds the temp range bits in the upper nibble */
res = TEMP_FROM_REG(data->zone_low[ix], 8) +
TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
break;
case SYS_ZONE_AUTO_POINT3_TEMP:
res = TEMP_FROM_REG(data->zone_abs[ix], 8);
break;
default:
res = 0;
dev_dbg(dev, "Unknown function %d.\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
long val;
int temp;
int err;
u8 reg;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
/* Refresh the cache */
data->zone_low[ix] = dme1737_read(data,
DME1737_REG_ZONE_LOW(ix));
/* Modify the temp hyst value */
temp = TEMP_FROM_REG(data->zone_low[ix], 8);
reg = dme1737_read(data, DME1737_REG_ZONE_HYST(ix == 2));
data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(temp, val, ix, reg);
dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2),
data->zone_hyst[ix == 2]);
break;
case SYS_ZONE_AUTO_POINT1_TEMP:
data->zone_low[ix] = TEMP_TO_REG(val);
dme1737_write(data, DME1737_REG_ZONE_LOW(ix),
data->zone_low[ix]);
break;
case SYS_ZONE_AUTO_POINT2_TEMP:
/* Refresh the cache */
data->zone_low[ix] = dme1737_read(data,
DME1737_REG_ZONE_LOW(ix));
/*
* Modify the temp range value (which is stored in the upper
* nibble of the pwm_freq register)
*/
temp = TEMP_FROM_REG(data->zone_low[ix], 8);
val = clamp_val(val, temp, temp + 80000);
reg = dme1737_read(data, DME1737_REG_PWM_FREQ(ix));
data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - temp, reg);
dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
data->pwm_freq[ix]);
break;
case SYS_ZONE_AUTO_POINT3_TEMP:
data->zone_abs[ix] = TEMP_TO_REG(val);
dme1737_write(data, DME1737_REG_ZONE_ABS(ix),
data->zone_abs[ix]);
break;
default:
dev_dbg(dev, "Unknown function %d.\n", fn);
}
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* Fan sysfs attributes
* ix = [0-5]
* --------------------------------------------------------------------- */
#define SYS_FAN_INPUT 0
#define SYS_FAN_MIN 1
#define SYS_FAN_MAX 2
#define SYS_FAN_ALARM 3
#define SYS_FAN_TYPE 4
static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct dme1737_data *data = dme1737_update_device(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SYS_FAN_INPUT:
res = FAN_FROM_REG(data->fan[ix],
ix < 4 ? 0 :
FAN_TPC_FROM_REG(data->fan_opt[ix]));
break;
case SYS_FAN_MIN:
res = FAN_FROM_REG(data->fan_min[ix],
ix < 4 ? 0 :
FAN_TPC_FROM_REG(data->fan_opt[ix]));
break;
case SYS_FAN_MAX:
/* only valid for fan[5-6] */
res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
break;
case SYS_FAN_ALARM:
res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
break;
case SYS_FAN_TYPE:
/* only valid for fan[1-4] */
res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
break;
default:
res = 0;
dev_dbg(dev, "Unknown function %d.\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SYS_FAN_MIN:
if (ix < 4) {
data->fan_min[ix] = FAN_TO_REG(val, 0);
} else {
/* Refresh the cache */
data->fan_opt[ix] = dme1737_read(data,
DME1737_REG_FAN_OPT(ix));
/* Modify the fan min value */
data->fan_min[ix] = FAN_TO_REG(val,
FAN_TPC_FROM_REG(data->fan_opt[ix]));
}
dme1737_write(data, DME1737_REG_FAN_MIN(ix),
data->fan_min[ix] & 0xff);
dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1,
data->fan_min[ix] >> 8);
break;
case SYS_FAN_MAX:
/* Only valid for fan[5-6] */
data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
dme1737_write(data, DME1737_REG_FAN_MAX(ix),
data->fan_max[ix - 4]);
break;
case SYS_FAN_TYPE:
/* Only valid for fan[1-4] */
if (!(val == 1 || val == 2 || val == 4)) {
count = -EINVAL;
dev_warn(dev,
"Fan type value %ld not supported. Choose one of 1, 2, or 4.\n",
val);
goto exit;
}
data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data,
DME1737_REG_FAN_OPT(ix)));
dme1737_write(data, DME1737_REG_FAN_OPT(ix),
data->fan_opt[ix]);
break;
default:
dev_dbg(dev, "Unknown function %d.\n", fn);
}
exit:
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* PWM sysfs attributes
* ix = [0-4]
* --------------------------------------------------------------------- */
#define SYS_PWM 0
#define SYS_PWM_FREQ 1
#define SYS_PWM_ENABLE 2
#define SYS_PWM_RAMP_RATE 3
#define SYS_PWM_AUTO_CHANNELS_ZONE 4
#define SYS_PWM_AUTO_PWM_MIN 5
#define SYS_PWM_AUTO_POINT1_PWM 6
#define SYS_PWM_AUTO_POINT2_PWM 7
static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct dme1737_data *data = dme1737_update_device(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SYS_PWM:
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0)
res = 255;
else
res = data->pwm[ix];
break;
case SYS_PWM_FREQ:
res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
break;
case SYS_PWM_ENABLE:
if (ix >= 3)
res = 1; /* pwm[5-6] hard-wired to manual mode */
else
res = PWM_EN_FROM_REG(data->pwm_config[ix]);
break;
case SYS_PWM_RAMP_RATE:
/* Only valid for pwm[1-3] */
res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
break;
case SYS_PWM_AUTO_CHANNELS_ZONE:
/* Only valid for pwm[1-3] */
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2)
res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
else
res = data->pwm_acz[ix];
break;
case SYS_PWM_AUTO_PWM_MIN:
/* Only valid for pwm[1-3] */
if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix))
res = data->pwm_min[ix];
else
res = 0;
break;
case SYS_PWM_AUTO_POINT1_PWM:
/* Only valid for pwm[1-3] */
res = data->pwm_min[ix];
break;
case SYS_PWM_AUTO_POINT2_PWM:
/* Only valid for pwm[1-3] */
res = 255; /* hard-wired */
break;
default:
res = 0;
dev_dbg(dev, "Unknown function %d.\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static struct attribute *dme1737_pwm_chmod_attr[];
static void dme1737_chmod_file(struct device*, struct attribute*, umode_t);
static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SYS_PWM:
data->pwm[ix] = clamp_val(val, 0, 255);
dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]);
break;
case SYS_PWM_FREQ:
data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data,
DME1737_REG_PWM_FREQ(ix)));
dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
data->pwm_freq[ix]);
break;
case SYS_PWM_ENABLE:
/* Only valid for pwm[1-3] */
if (val < 0 || val > 2) {
count = -EINVAL;
dev_warn(dev,
"PWM enable %ld not supported. Choose one of 0, 1, or 2.\n",
val);
goto exit;
}
/* Refresh the cache */
data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
/* Bail out if no change */
goto exit;
}
/* Do some housekeeping if we are currently in auto mode */
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
/* Save the current zone channel assignment */
data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
data->pwm_config[ix]);
/* Save the current ramp rate state and disable it */
data->pwm_rr[ix > 0] = dme1737_read(data,
DME1737_REG_PWM_RR(ix > 0));
data->pwm_rr_en &= ~(1 << ix);
if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
data->pwm_rr_en |= (1 << ix);
data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
data->pwm_rr[ix > 0]);
dme1737_write(data,
DME1737_REG_PWM_RR(ix > 0),
data->pwm_rr[ix > 0]);
}
}
/* Set the new PWM mode */
switch (val) {
case 0:
/* Change permissions of pwm[ix] to read-only */
dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
S_IRUGO);
/* Turn fan fully on */
data->pwm_config[ix] = PWM_EN_TO_REG(0,
data->pwm_config[ix]);
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
break;
case 1:
/* Turn on manual mode */
data->pwm_config[ix] = PWM_EN_TO_REG(1,
data->pwm_config[ix]);
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
/* Change permissions of pwm[ix] to read-writeable */
dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
S_IRUGO | S_IWUSR);
break;
case 2:
/* Change permissions of pwm[ix] to read-only */
dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
S_IRUGO);
/*
* Turn on auto mode using the saved zone channel
* assignment
*/
data->pwm_config[ix] = PWM_ACZ_TO_REG(
data->pwm_acz[ix],
data->pwm_config[ix]);
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
/* Enable PWM ramp rate if previously enabled */
if (data->pwm_rr_en & (1 << ix)) {
data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
dme1737_read(data,
DME1737_REG_PWM_RR(ix > 0)));
dme1737_write(data,
DME1737_REG_PWM_RR(ix > 0),
data->pwm_rr[ix > 0]);
}
break;
}
break;
case SYS_PWM_RAMP_RATE:
/* Only valid for pwm[1-3] */
/* Refresh the cache */
data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
data->pwm_rr[ix > 0] = dme1737_read(data,
DME1737_REG_PWM_RR(ix > 0));
/* Set the ramp rate value */
if (val > 0) {
data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
data->pwm_rr[ix > 0]);
}
/*
* Enable/disable the feature only if the associated PWM
* output is in automatic mode.
*/
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
data->pwm_rr[ix > 0]);
}
dme1737_write(data, DME1737_REG_PWM_RR(ix > 0),
data->pwm_rr[ix > 0]);
break;
case SYS_PWM_AUTO_CHANNELS_ZONE:
/* Only valid for pwm[1-3] */
if (!(val == 1 || val == 2 || val == 4 ||
val == 6 || val == 7)) {
count = -EINVAL;
dev_warn(dev,
"PWM auto channels zone %ld not supported. Choose one of 1, 2, 4, 6, "
"or 7.\n", val);
goto exit;
}
/* Refresh the cache */
data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
/*
* PWM is already in auto mode so update the temp
* channel assignment
*/
data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
data->pwm_config[ix]);
dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
} else {
/*
* PWM is not in auto mode so we save the temp
* channel assignment for later use
*/
data->pwm_acz[ix] = val;
}
break;
case SYS_PWM_AUTO_PWM_MIN:
/* Only valid for pwm[1-3] */
/* Refresh the cache */
data->pwm_min[ix] = dme1737_read(data,
DME1737_REG_PWM_MIN(ix));
/*
* There are only 2 values supported for the auto_pwm_min
* value: 0 or auto_point1_pwm. So if the temperature drops
* below the auto_point1_temp_hyst value, the fan either turns
* off or runs at auto_point1_pwm duty-cycle.
*/
if (val > ((data->pwm_min[ix] + 1) / 2)) {
data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
dme1737_read(data,
DME1737_REG_PWM_RR(0)));
} else {
data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
dme1737_read(data,
DME1737_REG_PWM_RR(0)));
}
dme1737_write(data, DME1737_REG_PWM_RR(0),
data->pwm_rr[0]);
break;
case SYS_PWM_AUTO_POINT1_PWM:
/* Only valid for pwm[1-3] */
data->pwm_min[ix] = clamp_val(val, 0, 255);
dme1737_write(data, DME1737_REG_PWM_MIN(ix),
data->pwm_min[ix]);
break;
default:
dev_dbg(dev, "Unknown function %d.\n", fn);
}
exit:
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* Miscellaneous sysfs attributes
* --------------------------------------------------------------------- */
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct i2c_client *client = to_i2c_client(dev);
struct dme1737_data *data = i2c_get_clientdata(client);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct dme1737_data *data = dme1737_update_device(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static ssize_t name_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct dme1737_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
/* ---------------------------------------------------------------------
* Sysfs device attribute defines and structs
* --------------------------------------------------------------------- */
/* Voltages 0-7 */
#define SENSOR_DEVICE_ATTR_IN(ix) \
static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
show_in, NULL, SYS_IN_INPUT, ix); \
static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
show_in, set_in, SYS_IN_MIN, ix); \
static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
show_in, set_in, SYS_IN_MAX, ix); \
static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
show_in, NULL, SYS_IN_ALARM, ix)
SENSOR_DEVICE_ATTR_IN(0);
SENSOR_DEVICE_ATTR_IN(1);
SENSOR_DEVICE_ATTR_IN(2);
SENSOR_DEVICE_ATTR_IN(3);
SENSOR_DEVICE_ATTR_IN(4);
SENSOR_DEVICE_ATTR_IN(5);
SENSOR_DEVICE_ATTR_IN(6);
SENSOR_DEVICE_ATTR_IN(7);
/* Temperatures 1-3 */
#define SENSOR_DEVICE_ATTR_TEMP(ix) \
static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
show_temp, NULL, SYS_TEMP_FAULT, ix-1)
SENSOR_DEVICE_ATTR_TEMP(1);
SENSOR_DEVICE_ATTR_TEMP(2);
SENSOR_DEVICE_ATTR_TEMP(3);
/* Zones 1-3 */
#define SENSOR_DEVICE_ATTR_ZONE(ix) \
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
SENSOR_DEVICE_ATTR_ZONE(1);
SENSOR_DEVICE_ATTR_ZONE(2);
SENSOR_DEVICE_ATTR_ZONE(3);
/* Fans 1-4 */
#define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
show_fan, NULL, SYS_FAN_INPUT, ix-1); \
static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
show_fan, set_fan, SYS_FAN_MIN, ix-1); \
static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
show_fan, NULL, SYS_FAN_ALARM, ix-1); \
static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
show_fan, set_fan, SYS_FAN_TYPE, ix-1)
SENSOR_DEVICE_ATTR_FAN_1TO4(1);
SENSOR_DEVICE_ATTR_FAN_1TO4(2);
SENSOR_DEVICE_ATTR_FAN_1TO4(3);
SENSOR_DEVICE_ATTR_FAN_1TO4(4);
/* Fans 5-6 */
#define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
show_fan, NULL, SYS_FAN_INPUT, ix-1); \
static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
show_fan, set_fan, SYS_FAN_MIN, ix-1); \
static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
show_fan, NULL, SYS_FAN_ALARM, ix-1); \
static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
show_fan, set_fan, SYS_FAN_MAX, ix-1)
SENSOR_DEVICE_ATTR_FAN_5TO6(5);
SENSOR_DEVICE_ATTR_FAN_5TO6(6);
/* PWMs 1-3 */
#define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
SENSOR_DEVICE_ATTR_PWM_1TO3(1);
SENSOR_DEVICE_ATTR_PWM_1TO3(2);
SENSOR_DEVICE_ATTR_PWM_1TO3(3);
/* PWMs 5-6 */
#define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
SENSOR_DEVICE_ATTR_PWM_5TO6(5);
SENSOR_DEVICE_ATTR_PWM_5TO6(6);
/* Misc */
static DEVICE_ATTR_RW(vrm);
static DEVICE_ATTR_RO(cpu0_vid);
static DEVICE_ATTR_RO(name); /* for ISA devices */
/*
* This struct holds all the attributes that are always present and need to be
* created unconditionally. The attributes that need modification of their
* permissions are created read-only and write permissions are added or removed
* on the fly when required
*/
static struct attribute *dme1737_attr[] = {
/* Voltages */
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
/* Temperatures */
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
/* Zones */
&sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_group = {
.attrs = dme1737_attr,
};
/*
* The following struct holds temp offset attributes, which are not available
* in all chips. The following chips support them:
* DME1737, SCH311x
*/
static struct attribute *dme1737_temp_offset_attr[] = {
&sensor_dev_attr_temp1_offset.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_temp_offset_group = {
.attrs = dme1737_temp_offset_attr,
};
/*
* The following struct holds VID related attributes, which are not available
* in all chips. The following chips support them:
* DME1737
*/
static struct attribute *dme1737_vid_attr[] = {
&dev_attr_vrm.attr,
&dev_attr_cpu0_vid.attr,
NULL
};
static const struct attribute_group dme1737_vid_group = {
.attrs = dme1737_vid_attr,
};
/*
* The following struct holds temp zone 3 related attributes, which are not
* available in all chips. The following chips support them:
* DME1737, SCH311x, SCH5027
*/
static struct attribute *dme1737_zone3_attr[] = {
&sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_zone3_group = {
.attrs = dme1737_zone3_attr,
};
/*
* The following struct holds temp zone hysteresis related attributes, which
* are not available in all chips. The following chips support them:
* DME1737, SCH311x
*/
static struct attribute *dme1737_zone_hyst_attr[] = {
&sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_zone_hyst_group = {
.attrs = dme1737_zone_hyst_attr,
};
/*
* The following struct holds voltage in7 related attributes, which
* are not available in all chips. The following chips support them:
* SCH5127
*/
static struct attribute *dme1737_in7_attr[] = {
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_in7_group = {
.attrs = dme1737_in7_attr,
};
/*
* The following structs hold the PWM attributes, some of which are optional.
* Their creation depends on the chip configuration which is determined during
* module load.
*/
static struct attribute *dme1737_pwm1_attr[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm2_attr[] = {
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm3_attr[] = {
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm5_attr[] = {
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm5_freq.dev_attr.attr,
&sensor_dev_attr_pwm5_enable.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm6_attr[] = {
&sensor_dev_attr_pwm6.dev_attr.attr,
&sensor_dev_attr_pwm6_freq.dev_attr.attr,
&sensor_dev_attr_pwm6_enable.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_pwm_group[] = {
{ .attrs = dme1737_pwm1_attr },
{ .attrs = dme1737_pwm2_attr },
{ .attrs = dme1737_pwm3_attr },
{ .attrs = NULL },
{ .attrs = dme1737_pwm5_attr },
{ .attrs = dme1737_pwm6_attr },
};
/*
* The following struct holds auto PWM min attributes, which are not available
* in all chips. Their creation depends on the chip type which is determined
* during module load.
*/
static struct attribute *dme1737_auto_pwm_min_attr[] = {
&sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
};
/*
* The following structs hold the fan attributes, some of which are optional.
* Their creation depends on the chip configuration which is determined during
* module load.
*/
static struct attribute *dme1737_fan1_attr[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_fan2_attr[] = {
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_fan3_attr[] = {
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_fan4_attr[] = {
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan4_alarm.dev_attr.attr,
&sensor_dev_attr_fan4_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_fan5_attr[] = {
&sensor_dev_attr_fan5_input.dev_attr.attr,
&sensor_dev_attr_fan5_min.dev_attr.attr,
&sensor_dev_attr_fan5_alarm.dev_attr.attr,
&sensor_dev_attr_fan5_max.dev_attr.attr,
NULL
};
static struct attribute *dme1737_fan6_attr[] = {
&sensor_dev_attr_fan6_input.dev_attr.attr,
&sensor_dev_attr_fan6_min.dev_attr.attr,
&sensor_dev_attr_fan6_alarm.dev_attr.attr,
&sensor_dev_attr_fan6_max.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_fan_group[] = {
{ .attrs = dme1737_fan1_attr },
{ .attrs = dme1737_fan2_attr },
{ .attrs = dme1737_fan3_attr },
{ .attrs = dme1737_fan4_attr },
{ .attrs = dme1737_fan5_attr },
{ .attrs = dme1737_fan6_attr },
};
/*
* The permissions of the following zone attributes are changed to read-
* writeable if the chip is *not* locked. Otherwise they stay read-only.
*/
static struct attribute *dme1737_zone_chmod_attr[] = {
&sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_zone_chmod_group = {
.attrs = dme1737_zone_chmod_attr,
};
/*
* The permissions of the following zone 3 attributes are changed to read-
* writeable if the chip is *not* locked. Otherwise they stay read-only.
*/
static struct attribute *dme1737_zone3_chmod_attr[] = {
&sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_zone3_chmod_group = {
.attrs = dme1737_zone3_chmod_attr,
};
/*
* The permissions of the following PWM attributes are changed to read-
* writeable if the chip is *not* locked and the respective PWM is available.
* Otherwise they stay read-only.
*/
static struct attribute *dme1737_pwm1_chmod_attr[] = {
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm2_chmod_attr[] = {
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm3_chmod_attr[] = {
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm5_chmod_attr[] = {
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm5_freq.dev_attr.attr,
NULL
};
static struct attribute *dme1737_pwm6_chmod_attr[] = {
&sensor_dev_attr_pwm6.dev_attr.attr,
&sensor_dev_attr_pwm6_freq.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_pwm_chmod_group[] = {
{ .attrs = dme1737_pwm1_chmod_attr },
{ .attrs = dme1737_pwm2_chmod_attr },
{ .attrs = dme1737_pwm3_chmod_attr },
{ .attrs = NULL },
{ .attrs = dme1737_pwm5_chmod_attr },
{ .attrs = dme1737_pwm6_chmod_attr },
};
/*
* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
* chip is not locked. Otherwise they are read-only.
*/
static struct attribute *dme1737_pwm_chmod_attr[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
};
/* ---------------------------------------------------------------------
* Super-IO functions
* --------------------------------------------------------------------- */
static inline void dme1737_sio_enter(int sio_cip)
{
outb(0x55, sio_cip);
}
static inline void dme1737_sio_exit(int sio_cip)
{
outb(0xaa, sio_cip);
}
static inline int dme1737_sio_inb(int sio_cip, int reg)
{
outb(reg, sio_cip);
return inb(sio_cip + 1);
}
static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
{
outb(reg, sio_cip);
outb(val, sio_cip + 1);
}
/* ---------------------------------------------------------------------
* Device initialization
* --------------------------------------------------------------------- */
static int dme1737_i2c_get_features(int, struct dme1737_data*);
static void dme1737_chmod_file(struct device *dev,
struct attribute *attr, umode_t mode)
{
if (sysfs_chmod_file(&dev->kobj, attr, mode)) {
dev_warn(dev, "Failed to change permissions of %s.\n",
attr->name);
}
}
static void dme1737_chmod_group(struct device *dev,
const struct attribute_group *group,
umode_t mode)
{
struct attribute **attr;
for (attr = group->attrs; *attr; attr++)
dme1737_chmod_file(dev, *attr, mode);
}
static void dme1737_remove_files(struct device *dev)
{
struct dme1737_data *data = dev_get_drvdata(dev);
int ix;
for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
if (data->has_features & HAS_FAN(ix)) {
sysfs_remove_group(&dev->kobj,
&dme1737_fan_group[ix]);
}
}
for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
if (data->has_features & HAS_PWM(ix)) {
sysfs_remove_group(&dev->kobj,
&dme1737_pwm_group[ix]);
if ((data->has_features & HAS_PWM_MIN) && ix < 3) {
sysfs_remove_file(&dev->kobj,
dme1737_auto_pwm_min_attr[ix]);
}
}
}
if (data->has_features & HAS_TEMP_OFFSET)
sysfs_remove_group(&dev->kobj, &dme1737_temp_offset_group);
if (data->has_features & HAS_VID)
sysfs_remove_group(&dev->kobj, &dme1737_vid_group);
if (data->has_features & HAS_ZONE3)
sysfs_remove_group(&dev->kobj, &dme1737_zone3_group);
if (data->has_features & HAS_ZONE_HYST)
sysfs_remove_group(&dev->kobj, &dme1737_zone_hyst_group);
if (data->has_features & HAS_IN7)
sysfs_remove_group(&dev->kobj, &dme1737_in7_group);
sysfs_remove_group(&dev->kobj, &dme1737_group);
if (!data->client)
sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
}
static int dme1737_create_files(struct device *dev)
{
struct dme1737_data *data = dev_get_drvdata(dev);
int err, ix;
/* Create a name attribute for ISA devices */
if (!data->client) {
err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr);
if (err)
goto exit;
}
/* Create standard sysfs attributes */
err = sysfs_create_group(&dev->kobj, &dme1737_group);
if (err)
goto exit_remove;
/* Create chip-dependent sysfs attributes */
if (data->has_features & HAS_TEMP_OFFSET) {
err = sysfs_create_group(&dev->kobj,
&dme1737_temp_offset_group);
if (err)
goto exit_remove;
}
if (data->has_features & HAS_VID) {
err = sysfs_create_group(&dev->kobj, &dme1737_vid_group);
if (err)
goto exit_remove;
}
if (data->has_features & HAS_ZONE3) {
err = sysfs_create_group(&dev->kobj, &dme1737_zone3_group);
if (err)
goto exit_remove;
}
if (data->has_features & HAS_ZONE_HYST) {
err = sysfs_create_group(&dev->kobj, &dme1737_zone_hyst_group);
if (err)
goto exit_remove;
}
if (data->has_features & HAS_IN7) {
err = sysfs_create_group(&dev->kobj, &dme1737_in7_group);
if (err)
goto exit_remove;
}
/* Create fan sysfs attributes */
for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
if (data->has_features & HAS_FAN(ix)) {
err = sysfs_create_group(&dev->kobj,
&dme1737_fan_group[ix]);
if (err)
goto exit_remove;
}
}
/* Create PWM sysfs attributes */
for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
if (data->has_features & HAS_PWM(ix)) {
err = sysfs_create_group(&dev->kobj,
&dme1737_pwm_group[ix]);
if (err)
goto exit_remove;
if ((data->has_features & HAS_PWM_MIN) && (ix < 3)) {
err = sysfs_create_file(&dev->kobj,
dme1737_auto_pwm_min_attr[ix]);
if (err)
goto exit_remove;
}
}
}
/*
* Inform if the device is locked. Otherwise change the permissions of
* selected attributes from read-only to read-writeable.
*/
if (data->config & 0x02) {
dev_info(dev,
"Device is locked. Some attributes will be read-only.\n");
} else {
/* Change permissions of zone sysfs attributes */
dme1737_chmod_group(dev, &dme1737_zone_chmod_group,
S_IRUGO | S_IWUSR);
/* Change permissions of chip-dependent sysfs attributes */
if (data->has_features & HAS_TEMP_OFFSET) {
dme1737_chmod_group(dev, &dme1737_temp_offset_group,
S_IRUGO | S_IWUSR);
}
if (data->has_features & HAS_ZONE3) {
dme1737_chmod_group(dev, &dme1737_zone3_chmod_group,
S_IRUGO | S_IWUSR);
}
if (data->has_features & HAS_ZONE_HYST) {
dme1737_chmod_group(dev, &dme1737_zone_hyst_group,
S_IRUGO | S_IWUSR);
}
/* Change permissions of PWM sysfs attributes */
for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) {
if (data->has_features & HAS_PWM(ix)) {
dme1737_chmod_group(dev,
&dme1737_pwm_chmod_group[ix],
S_IRUGO | S_IWUSR);
if ((data->has_features & HAS_PWM_MIN) &&
ix < 3) {
dme1737_chmod_file(dev,
dme1737_auto_pwm_min_attr[ix],
S_IRUGO | S_IWUSR);
}
}
}
/* Change permissions of pwm[1-3] if in manual mode */
for (ix = 0; ix < 3; ix++) {
if ((data->has_features & HAS_PWM(ix)) &&
(PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
dme1737_chmod_file(dev,
dme1737_pwm_chmod_attr[ix],
S_IRUGO | S_IWUSR);
}
}
}
return 0;
exit_remove:
dme1737_remove_files(dev);
exit:
return err;
}
static int dme1737_init_device(struct device *dev)
{
struct dme1737_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ix;
u8 reg;
/* Point to the right nominal voltages array */
data->in_nominal = IN_NOMINAL(data->type);
data->config = dme1737_read(data, DME1737_REG_CONFIG);
/* Inform if part is not monitoring/started */
if (!(data->config & 0x01)) {
if (!force_start) {
dev_err(dev,
"Device is not monitoring. Use the force_start load parameter to override.\n");
return -EFAULT;
}
/* Force monitoring */
data->config |= 0x01;
dme1737_write(data, DME1737_REG_CONFIG, data->config);
}
/* Inform if part is not ready */
if (!(data->config & 0x04)) {
dev_err(dev, "Device is not ready.\n");
return -EFAULT;
}
/*
* Determine which optional fan and pwm features are enabled (only
* valid for I2C devices)
*/
if (client) { /* I2C chip */
data->config2 = dme1737_read(data, DME1737_REG_CONFIG2);
/* Check if optional fan3 input is enabled */
if (data->config2 & 0x04)
data->has_features |= HAS_FAN(2);
/*
* Fan4 and pwm3 are only available if the client's I2C address
* is the default 0x2e. Otherwise the I/Os associated with
* these functions are used for addr enable/select.
*/
if (client->addr == 0x2e)
data->has_features |= HAS_FAN(3) | HAS_PWM(2);
/*
* Determine which of the optional fan[5-6] and pwm[5-6]
* features are enabled. For this, we need to query the runtime
* registers through the Super-IO LPC interface. Try both
* config ports 0x2e and 0x4e.
*/
if (dme1737_i2c_get_features(0x2e, data) &&
dme1737_i2c_get_features(0x4e, data)) {
dev_warn(dev,
"Failed to query Super-IO for optional features.\n");
}
}
/* Fan[1-2] and pwm[1-2] are present in all chips */
data->has_features |= HAS_FAN(0) | HAS_FAN(1) | HAS_PWM(0) | HAS_PWM(1);
/* Chip-dependent features */
switch (data->type) {
case dme1737:
data->has_features |= HAS_TEMP_OFFSET | HAS_VID | HAS_ZONE3 |
HAS_ZONE_HYST | HAS_PWM_MIN;
break;
case sch311x:
data->has_features |= HAS_TEMP_OFFSET | HAS_ZONE3 |
HAS_ZONE_HYST | HAS_PWM_MIN | HAS_FAN(2) | HAS_PWM(2);
break;
case sch5027:
data->has_features |= HAS_ZONE3;
break;
case sch5127:
data->has_features |= HAS_FAN(2) | HAS_PWM(2) | HAS_IN7;
break;
default:
break;
}
dev_info(dev,
"Optional features: pwm3=%s, pwm5=%s, pwm6=%s, fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
(data->has_features & HAS_PWM(2)) ? "yes" : "no",
(data->has_features & HAS_PWM(4)) ? "yes" : "no",
(data->has_features & HAS_PWM(5)) ? "yes" : "no",
(data->has_features & HAS_FAN(2)) ? "yes" : "no",
(data->has_features & HAS_FAN(3)) ? "yes" : "no",
(data->has_features & HAS_FAN(4)) ? "yes" : "no",
(data->has_features & HAS_FAN(5)) ? "yes" : "no");
reg = dme1737_read(data, DME1737_REG_TACH_PWM);
/* Inform if fan-to-pwm mapping differs from the default */
if (client && reg != 0xa4) { /* I2C chip */
dev_warn(dev,
"Non-standard fan to pwm mapping: fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, fan4->pwm%d. %s\n",
(reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1,
DO_REPORT);
} else if (!client && reg != 0x24) { /* ISA chip */
dev_warn(dev,
"Non-standard fan to pwm mapping: fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. %s\n",
(reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
((reg >> 4) & 0x03) + 1, DO_REPORT);
}
/*
* Switch pwm[1-3] to manual mode if they are currently disabled and
* set the duty-cycles to 0% (which is identical to the PWMs being
* disabled).
*/
if (!(data->config & 0x02)) {
for (ix = 0; ix < 3; ix++) {
data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
if ((data->has_features & HAS_PWM(ix)) &&
(PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
dev_info(dev,
"Switching pwm%d to manual mode.\n",
ix + 1);
data->pwm_config[ix] = PWM_EN_TO_REG(1,
data->pwm_config[ix]);
dme1737_write(data, DME1737_REG_PWM(ix), 0);
dme1737_write(data,
DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
}
}
}
/* Initialize the default PWM auto channels zone (acz) assignments */
data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
/* Set VRM */
if (data->has_features & HAS_VID)
data->vrm = vid_which_vrm();
return 0;
}
/* ---------------------------------------------------------------------
* I2C device detection and registration
* --------------------------------------------------------------------- */
static struct i2c_driver dme1737_i2c_driver;
static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
{
int err = 0, reg;
u16 addr;
dme1737_sio_enter(sio_cip);
/*
* Check device ID
* We currently know about two kinds of DME1737 and SCH5027.
*/
reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
if (!(reg == DME1737_ID_1 || reg == DME1737_ID_2 ||
reg == SCH5027_ID)) {
err = -ENODEV;
goto exit;
}
/* Select logical device A (runtime registers) */
dme1737_sio_outb(sio_cip, 0x07, 0x0a);
/* Get the base address of the runtime registers */
addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
dme1737_sio_inb(sio_cip, 0x61);
if (!addr) {
err = -ENODEV;
goto exit;
}
/*
* Read the runtime registers to determine which optional features
* are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
* to '10' if the respective feature is enabled.
*/
if ((inb(addr + 0x43) & 0x0c) == 0x08) /* fan6 */
data->has_features |= HAS_FAN(5);
if ((inb(addr + 0x44) & 0x0c) == 0x08) /* pwm6 */
data->has_features |= HAS_PWM(5);
if ((inb(addr + 0x45) & 0x0c) == 0x08) /* fan5 */
data->has_features |= HAS_FAN(4);
if ((inb(addr + 0x46) & 0x0c) == 0x08) /* pwm5 */
data->has_features |= HAS_PWM(4);
exit:
dme1737_sio_exit(sio_cip);
return err;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int dme1737_i2c_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
struct device *dev = &adapter->dev;
u8 company, verstep = 0;
const char *name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY);
verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP);
if (company == DME1737_COMPANY_SMSC &&
verstep == SCH5027_VERSTEP) {
name = "sch5027";
} else if (company == DME1737_COMPANY_SMSC &&
(verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) {
name = "dme1737";
} else {
return -ENODEV;
}
dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n",
verstep == SCH5027_VERSTEP ? "SCH5027" : "DME1737",
client->addr, verstep);
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static const struct i2c_device_id dme1737_id[];
static int dme1737_i2c_probe(struct i2c_client *client)
{
struct dme1737_data *data;
struct device *dev = &client->dev;
int err;
data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->type = i2c_match_id(dme1737_id, client)->driver_data;
data->client = client;
data->name = client->name;
mutex_init(&data->update_lock);
/* Initialize the DME1737 chip */
err = dme1737_init_device(dev);
if (err) {
dev_err(dev, "Failed to initialize device.\n");
return err;
}
/* Create sysfs files */
err = dme1737_create_files(dev);
if (err) {
dev_err(dev, "Failed to create sysfs files.\n");
return err;
}
/* Register device */
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
dev_err(dev, "Failed to register device.\n");
err = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
return 0;
exit_remove:
dme1737_remove_files(dev);
return err;
}
static void dme1737_i2c_remove(struct i2c_client *client)
{
struct dme1737_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
dme1737_remove_files(&client->dev);
}
static const struct i2c_device_id dme1737_id[] = {
{ "dme1737", dme1737 },
{ "sch5027", sch5027 },
{ }
};
MODULE_DEVICE_TABLE(i2c, dme1737_id);
static struct i2c_driver dme1737_i2c_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "dme1737",
},
.probe = dme1737_i2c_probe,
.remove = dme1737_i2c_remove,
.id_table = dme1737_id,
.detect = dme1737_i2c_detect,
.address_list = normal_i2c,
};
/* ---------------------------------------------------------------------
* ISA device detection and registration
* --------------------------------------------------------------------- */
static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
{
int err = 0, reg;
unsigned short base_addr;
dme1737_sio_enter(sio_cip);
/*
* Check device ID
* We currently know about SCH3112, SCH3114, SCH3116, and SCH5127
*/
reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
if (!(reg == SCH3112_ID || reg == SCH3114_ID || reg == SCH3116_ID ||
reg == SCH5127_ID)) {
err = -ENODEV;
goto exit;
}
/* Select logical device A (runtime registers) */
dme1737_sio_outb(sio_cip, 0x07, 0x0a);
/* Get the base address of the runtime registers */
base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
dme1737_sio_inb(sio_cip, 0x61);
if (!base_addr) {
pr_err("Base address not set\n");
err = -ENODEV;
goto exit;
}
/*
* Access to the hwmon registers is through an index/data register
* pair located at offset 0x70/0x71.
*/
*addr = base_addr + 0x70;
exit:
dme1737_sio_exit(sio_cip);
return err;
}
static int __init dme1737_isa_device_add(unsigned short addr)
{
struct resource res = {
.start = addr,
.end = addr + DME1737_EXTENT - 1,
.name = "dme1737",
.flags = IORESOURCE_IO,
};
int err;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit;
pdev = platform_device_alloc("dme1737", addr);
if (!pdev) {
pr_err("Failed to allocate device\n");
err = -ENOMEM;
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Failed to add device resource (err = %d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Failed to add device (err = %d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
pdev = NULL;
exit:
return err;
}
static int dme1737_isa_probe(struct platform_device *pdev)
{
u8 company, device;
struct resource *res;
struct dme1737_data *data;
struct device *dev = &pdev->dev;
int err;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(dev, res->start, DME1737_EXTENT, "dme1737")) {
dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
(unsigned short)res->start,
(unsigned short)res->start + DME1737_EXTENT - 1);
return -EBUSY;
}
data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->addr = res->start;
platform_set_drvdata(pdev, data);
/* Skip chip detection if module is loaded with force_id parameter */
switch (force_id) {
case SCH3112_ID:
case SCH3114_ID:
case SCH3116_ID:
data->type = sch311x;
break;
case SCH5127_ID:
data->type = sch5127;
break;
default:
company = dme1737_read(data, DME1737_REG_COMPANY);
device = dme1737_read(data, DME1737_REG_DEVICE);
if ((company == DME1737_COMPANY_SMSC) &&
(device == SCH311X_DEVICE)) {
data->type = sch311x;
} else if ((company == DME1737_COMPANY_SMSC) &&
(device == SCH5127_DEVICE)) {
data->type = sch5127;
} else {
return -ENODEV;
}
}
if (data->type == sch5127)
data->name = "sch5127";
else
data->name = "sch311x";
/* Initialize the mutex */
mutex_init(&data->update_lock);
dev_info(dev, "Found a %s chip at 0x%04x\n",
data->type == sch5127 ? "SCH5127" : "SCH311x", data->addr);
/* Initialize the chip */
err = dme1737_init_device(dev);
if (err) {
dev_err(dev, "Failed to initialize device.\n");
return err;
}
/* Create sysfs files */
err = dme1737_create_files(dev);
if (err) {
dev_err(dev, "Failed to create sysfs files.\n");
return err;
}
/* Register device */
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
dev_err(dev, "Failed to register device.\n");
err = PTR_ERR(data->hwmon_dev);
goto exit_remove_files;
}
return 0;
exit_remove_files:
dme1737_remove_files(dev);
return err;
}
static int dme1737_isa_remove(struct platform_device *pdev)
{
struct dme1737_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
dme1737_remove_files(&pdev->dev);
return 0;
}
static struct platform_driver dme1737_isa_driver = {
.driver = {
.name = "dme1737",
},
.probe = dme1737_isa_probe,
.remove = dme1737_isa_remove,
};
/* ---------------------------------------------------------------------
* Module initialization and cleanup
* --------------------------------------------------------------------- */
static int __init dme1737_init(void)
{
int err;
unsigned short addr;
err = i2c_add_driver(&dme1737_i2c_driver);
if (err)
goto exit;
if (dme1737_isa_detect(0x2e, &addr) &&
dme1737_isa_detect(0x4e, &addr) &&
(!probe_all_addr ||
(dme1737_isa_detect(0x162e, &addr) &&
dme1737_isa_detect(0x164e, &addr)))) {
/* Return 0 if we didn't find an ISA device */
return 0;
}
err = platform_driver_register(&dme1737_isa_driver);
if (err)
goto exit_del_i2c_driver;
/* Sets global pdev as a side effect */
err = dme1737_isa_device_add(addr);
if (err)
goto exit_del_isa_driver;
return 0;
exit_del_isa_driver:
platform_driver_unregister(&dme1737_isa_driver);
exit_del_i2c_driver:
i2c_del_driver(&dme1737_i2c_driver);
exit:
return err;
}
static void __exit dme1737_exit(void)
{
if (pdev) {
platform_device_unregister(pdev);
platform_driver_unregister(&dme1737_isa_driver);
}
i2c_del_driver(&dme1737_i2c_driver);
}
MODULE_AUTHOR("Juerg Haefliger <[email protected]>");
MODULE_DESCRIPTION("DME1737 sensors");
MODULE_LICENSE("GPL");
module_init(dme1737_init);
module_exit(dme1737_exit);
|
linux-master
|
drivers/hwmon/dme1737.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) Linumiz 2021
*
* sht4x.c - Linux hwmon driver for SHT4x Temperature and Humidity sensor
*
* Author: Navin Sankar Velliangiri <[email protected]>
*/
#include <linux/crc8.h>
#include <linux/delay.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/jiffies.h>
#include <linux/module.h>
/*
* Poll intervals (in milliseconds)
*/
#define SHT4X_MIN_POLL_INTERVAL 2000
/*
* I2C command delays (in microseconds)
*/
#define SHT4X_MEAS_DELAY_HPM 8200 /* see t_MEAS,h in datasheet */
#define SHT4X_DELAY_EXTRA 10000
/*
* Command Bytes
*/
#define SHT4X_CMD_MEASURE_HPM 0b11111101
#define SHT4X_CMD_RESET 0b10010100
#define SHT4X_CMD_LEN 1
#define SHT4X_CRC8_LEN 1
#define SHT4X_WORD_LEN 2
#define SHT4X_RESPONSE_LENGTH 6
#define SHT4X_CRC8_POLYNOMIAL 0x31
#define SHT4X_CRC8_INIT 0xff
#define SHT4X_MIN_TEMPERATURE -45000
#define SHT4X_MAX_TEMPERATURE 125000
#define SHT4X_MIN_HUMIDITY 0
#define SHT4X_MAX_HUMIDITY 100000
DECLARE_CRC8_TABLE(sht4x_crc8_table);
/**
* struct sht4x_data - All the data required to operate an SHT4X chip
* @client: the i2c client associated with the SHT4X
* @lock: a mutex that is used to prevent parallel access to the i2c client
* @update_interval: the minimum poll interval
* @last_updated: the previous time that the SHT4X was polled
* @temperature: the latest temperature value received from the SHT4X
* @humidity: the latest humidity value received from the SHT4X
*/
struct sht4x_data {
struct i2c_client *client;
struct mutex lock; /* atomic read data updates */
bool valid; /* validity of fields below */
long update_interval; /* in milli-seconds */
long last_updated; /* in jiffies */
s32 temperature;
s32 humidity;
};
/**
* sht4x_read_values() - read and parse the raw data from the SHT4X
* @sht4x_data: the struct sht4x_data to use for the lock
* Return: 0 if successful, -ERRNO if not
*/
static int sht4x_read_values(struct sht4x_data *data)
{
int ret = 0;
u16 t_ticks, rh_ticks;
unsigned long next_update;
struct i2c_client *client = data->client;
u8 crc;
u8 cmd[SHT4X_CMD_LEN] = {SHT4X_CMD_MEASURE_HPM};
u8 raw_data[SHT4X_RESPONSE_LENGTH];
mutex_lock(&data->lock);
next_update = data->last_updated +
msecs_to_jiffies(data->update_interval);
if (data->valid && time_before_eq(jiffies, next_update))
goto unlock;
ret = i2c_master_send(client, cmd, SHT4X_CMD_LEN);
if (ret < 0)
goto unlock;
usleep_range(SHT4X_MEAS_DELAY_HPM, SHT4X_MEAS_DELAY_HPM + SHT4X_DELAY_EXTRA);
ret = i2c_master_recv(client, raw_data, SHT4X_RESPONSE_LENGTH);
if (ret != SHT4X_RESPONSE_LENGTH) {
if (ret >= 0)
ret = -ENODATA;
goto unlock;
}
t_ticks = raw_data[0] << 8 | raw_data[1];
rh_ticks = raw_data[3] << 8 | raw_data[4];
crc = crc8(sht4x_crc8_table, &raw_data[0], SHT4X_WORD_LEN, CRC8_INIT_VALUE);
if (crc != raw_data[2]) {
dev_err(&client->dev, "data integrity check failed\n");
ret = -EIO;
goto unlock;
}
crc = crc8(sht4x_crc8_table, &raw_data[3], SHT4X_WORD_LEN, CRC8_INIT_VALUE);
if (crc != raw_data[5]) {
dev_err(&client->dev, "data integrity check failed\n");
ret = -EIO;
goto unlock;
}
data->temperature = ((21875 * (int32_t)t_ticks) >> 13) - 45000;
data->humidity = ((15625 * (int32_t)rh_ticks) >> 13) - 6000;
data->last_updated = jiffies;
data->valid = true;
ret = 0;
unlock:
mutex_unlock(&data->lock);
return ret;
}
static ssize_t sht4x_interval_write(struct sht4x_data *data, long val)
{
data->update_interval = clamp_val(val, SHT4X_MIN_POLL_INTERVAL, INT_MAX);
return 0;
}
/* sht4x_interval_read() - read the minimum poll interval in milliseconds */
static size_t sht4x_interval_read(struct sht4x_data *data, long *val)
{
*val = data->update_interval;
return 0;
}
/* sht4x_temperature1_read() - read the temperature in millidegrees */
static int sht4x_temperature1_read(struct sht4x_data *data, long *val)
{
int ret;
ret = sht4x_read_values(data);
if (ret < 0)
return ret;
*val = data->temperature;
return 0;
}
/* sht4x_humidity1_read() - read a relative humidity in millipercent */
static int sht4x_humidity1_read(struct sht4x_data *data, long *val)
{
int ret;
ret = sht4x_read_values(data);
if (ret < 0)
return ret;
*val = data->humidity;
return 0;
}
static umode_t sht4x_hwmon_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_temp:
case hwmon_humidity:
return 0444;
case hwmon_chip:
return 0644;
default:
return 0;
}
}
static int sht4x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct sht4x_data *data = dev_get_drvdata(dev);
switch (type) {
case hwmon_temp:
return sht4x_temperature1_read(data, val);
case hwmon_humidity:
return sht4x_humidity1_read(data, val);
case hwmon_chip:
return sht4x_interval_read(data, val);
default:
return -EOPNOTSUPP;
}
}
static int sht4x_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct sht4x_data *data = dev_get_drvdata(dev);
switch (type) {
case hwmon_chip:
return sht4x_interval_write(data, val);
default:
return -EOPNOTSUPP;
}
}
static const struct hwmon_channel_info * const sht4x_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
HWMON_CHANNEL_INFO(humidity, HWMON_H_INPUT),
NULL,
};
static const struct hwmon_ops sht4x_hwmon_ops = {
.is_visible = sht4x_hwmon_visible,
.read = sht4x_hwmon_read,
.write = sht4x_hwmon_write,
};
static const struct hwmon_chip_info sht4x_chip_info = {
.ops = &sht4x_hwmon_ops,
.info = sht4x_info,
};
static int sht4x_probe(struct i2c_client *client)
{
struct device *device = &client->dev;
struct device *hwmon_dev;
struct sht4x_data *data;
u8 cmd[] = {SHT4X_CMD_RESET};
int ret;
/*
* we require full i2c support since the sht4x uses multi-byte read and
* writes as well as multi-byte commands which are not supported by
* the smbus protocol
*/
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
return -EOPNOTSUPP;
data = devm_kzalloc(device, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->update_interval = SHT4X_MIN_POLL_INTERVAL;
data->client = client;
mutex_init(&data->lock);
crc8_populate_msb(sht4x_crc8_table, SHT4X_CRC8_POLYNOMIAL);
ret = i2c_master_send(client, cmd, SHT4X_CMD_LEN);
if (ret < 0)
return ret;
if (ret != SHT4X_CMD_LEN)
return -EIO;
hwmon_dev = devm_hwmon_device_register_with_info(device,
client->name,
data,
&sht4x_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id sht4x_id[] = {
{ "sht4x", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, sht4x_id);
static const struct of_device_id sht4x_of_match[] = {
{ .compatible = "sensirion,sht4x" },
{ }
};
MODULE_DEVICE_TABLE(of, sht4x_of_match);
static struct i2c_driver sht4x_driver = {
.driver = {
.name = "sht4x",
.of_match_table = sht4x_of_match,
},
.probe = sht4x_probe,
.id_table = sht4x_id,
};
module_i2c_driver(sht4x_driver);
MODULE_AUTHOR("Navin Sankar Velliangiri <[email protected]>");
MODULE_DESCRIPTION("Sensirion SHT4x humidity and temperature sensor driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/sht4x.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2004, 2005 Winbond Electronics Corp.
* Shane Huang,
* Rudolf Marek <[email protected]>
*
* Note:
* 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
* 2. This driver is only for Winbond W83792D C version device, there
* are also some motherboards with B version W83792D device. The
* calculation method to in6-in7(measured value, limits) is a little
* different between C and B version. C or B version can be identified
* by CR[0x49h].
*/
/*
* Supports following chips:
*
* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83792d 9 7 7 3 0x7a 0x5ca3 yes no
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/jiffies.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
I2C_CLIENT_END };
/* Insmod parameters */
static unsigned short force_subclients[4];
module_param_array(force_subclients, short, NULL, 0);
MODULE_PARM_DESC(force_subclients,
"List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
static bool init;
module_param(init, bool, 0);
MODULE_PARM_DESC(init, "Set to one to force chip initialization");
/* The W83792D registers */
static const u8 W83792D_REG_IN[9] = {
0x20, /* Vcore A in DataSheet */
0x21, /* Vcore B in DataSheet */
0x22, /* VIN0 in DataSheet */
0x23, /* VIN1 in DataSheet */
0x24, /* VIN2 in DataSheet */
0x25, /* VIN3 in DataSheet */
0x26, /* 5VCC in DataSheet */
0xB0, /* 5VSB in DataSheet */
0xB1 /* VBAT in DataSheet */
};
#define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
#define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
static const u8 W83792D_REG_IN_MAX[9] = {
0x2B, /* Vcore A High Limit in DataSheet */
0x2D, /* Vcore B High Limit in DataSheet */
0x2F, /* VIN0 High Limit in DataSheet */
0x31, /* VIN1 High Limit in DataSheet */
0x33, /* VIN2 High Limit in DataSheet */
0x35, /* VIN3 High Limit in DataSheet */
0x37, /* 5VCC High Limit in DataSheet */
0xB4, /* 5VSB High Limit in DataSheet */
0xB6 /* VBAT High Limit in DataSheet */
};
static const u8 W83792D_REG_IN_MIN[9] = {
0x2C, /* Vcore A Low Limit in DataSheet */
0x2E, /* Vcore B Low Limit in DataSheet */
0x30, /* VIN0 Low Limit in DataSheet */
0x32, /* VIN1 Low Limit in DataSheet */
0x34, /* VIN2 Low Limit in DataSheet */
0x36, /* VIN3 Low Limit in DataSheet */
0x38, /* 5VCC Low Limit in DataSheet */
0xB5, /* 5VSB Low Limit in DataSheet */
0xB7 /* VBAT Low Limit in DataSheet */
};
static const u8 W83792D_REG_FAN[7] = {
0x28, /* FAN 1 Count in DataSheet */
0x29, /* FAN 2 Count in DataSheet */
0x2A, /* FAN 3 Count in DataSheet */
0xB8, /* FAN 4 Count in DataSheet */
0xB9, /* FAN 5 Count in DataSheet */
0xBA, /* FAN 6 Count in DataSheet */
0xBE /* FAN 7 Count in DataSheet */
};
static const u8 W83792D_REG_FAN_MIN[7] = {
0x3B, /* FAN 1 Count Low Limit in DataSheet */
0x3C, /* FAN 2 Count Low Limit in DataSheet */
0x3D, /* FAN 3 Count Low Limit in DataSheet */
0xBB, /* FAN 4 Count Low Limit in DataSheet */
0xBC, /* FAN 5 Count Low Limit in DataSheet */
0xBD, /* FAN 6 Count Low Limit in DataSheet */
0xBF /* FAN 7 Count Low Limit in DataSheet */
};
#define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
static const u8 W83792D_REG_FAN_DIV[4] = {
0x47, /* contains FAN2 and FAN1 Divisor */
0x5B, /* contains FAN4 and FAN3 Divisor */
0x5C, /* contains FAN6 and FAN5 Divisor */
0x9E /* contains FAN7 Divisor. */
};
static const u8 W83792D_REG_PWM[7] = {
0x81, /* FAN 1 Duty Cycle, be used to control */
0x83, /* FAN 2 Duty Cycle, be used to control */
0x94, /* FAN 3 Duty Cycle, be used to control */
0xA3, /* FAN 4 Duty Cycle, be used to control */
0xA4, /* FAN 5 Duty Cycle, be used to control */
0xA5, /* FAN 6 Duty Cycle, be used to control */
0xA6 /* FAN 7 Duty Cycle, be used to control */
};
#define W83792D_REG_BANK 0x4E
#define W83792D_REG_TEMP2_CONFIG 0xC2
#define W83792D_REG_TEMP3_CONFIG 0xCA
static const u8 W83792D_REG_TEMP1[3] = {
0x27, /* TEMP 1 in DataSheet */
0x39, /* TEMP 1 Over in DataSheet */
0x3A, /* TEMP 1 Hyst in DataSheet */
};
static const u8 W83792D_REG_TEMP_ADD[2][6] = {
{ 0xC0, /* TEMP 2 in DataSheet */
0xC1, /* TEMP 2(0.5 deg) in DataSheet */
0xC5, /* TEMP 2 Over High part in DataSheet */
0xC6, /* TEMP 2 Over Low part in DataSheet */
0xC3, /* TEMP 2 Thyst High part in DataSheet */
0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
{ 0xC8, /* TEMP 3 in DataSheet */
0xC9, /* TEMP 3(0.5 deg) in DataSheet */
0xCD, /* TEMP 3 Over High part in DataSheet */
0xCE, /* TEMP 3 Over Low part in DataSheet */
0xCB, /* TEMP 3 Thyst High part in DataSheet */
0xCC } /* TEMP 3 Thyst Low part in DataSheet */
};
static const u8 W83792D_REG_THERMAL[3] = {
0x85, /* SmartFanI: Fan1 target value */
0x86, /* SmartFanI: Fan2 target value */
0x96 /* SmartFanI: Fan3 target value */
};
static const u8 W83792D_REG_TOLERANCE[3] = {
0x87, /* (bit3-0)SmartFan Fan1 tolerance */
0x87, /* (bit7-4)SmartFan Fan2 tolerance */
0x97 /* (bit3-0)SmartFan Fan3 tolerance */
};
static const u8 W83792D_REG_POINTS[3][4] = {
{ 0x85, /* SmartFanII: Fan1 temp point 1 */
0xE3, /* SmartFanII: Fan1 temp point 2 */
0xE4, /* SmartFanII: Fan1 temp point 3 */
0xE5 }, /* SmartFanII: Fan1 temp point 4 */
{ 0x86, /* SmartFanII: Fan2 temp point 1 */
0xE6, /* SmartFanII: Fan2 temp point 2 */
0xE7, /* SmartFanII: Fan2 temp point 3 */
0xE8 }, /* SmartFanII: Fan2 temp point 4 */
{ 0x96, /* SmartFanII: Fan3 temp point 1 */
0xE9, /* SmartFanII: Fan3 temp point 2 */
0xEA, /* SmartFanII: Fan3 temp point 3 */
0xEB } /* SmartFanII: Fan3 temp point 4 */
};
static const u8 W83792D_REG_LEVELS[3][4] = {
{ 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
{ 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
{ 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
};
#define W83792D_REG_GPIO_EN 0x1A
#define W83792D_REG_CONFIG 0x40
#define W83792D_REG_VID_FANDIV 0x47
#define W83792D_REG_CHIPID 0x49
#define W83792D_REG_WCHIPID 0x58
#define W83792D_REG_CHIPMAN 0x4F
#define W83792D_REG_PIN 0x4B
#define W83792D_REG_I2C_SUBADDR 0x4A
#define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
#define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
#define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
#define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
#define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
/* control in0/in1 's limit modifiability */
#define W83792D_REG_VID_IN_B 0x17
#define W83792D_REG_VBAT 0x5D
#define W83792D_REG_I2C_ADDR 0x48
/*
* Conversions. Rounding and limit checking is only done on the TO_REG
* variants. Note that you should be a bit careful with which arguments
* these macros are called: arguments may be evaluated more than once.
* Fixing this is just not worth it.
*/
#define IN_FROM_REG(nr, val) (((nr) <= 1) ? ((val) * 2) : \
((((nr) == 6) || ((nr) == 7)) ? ((val) * 6) : ((val) * 4)))
#define IN_TO_REG(nr, val) (((nr) <= 1) ? ((val) / 2) : \
((((nr) == 6) || ((nr) == 7)) ? ((val) / 6) : ((val) / 4)))
static inline u8
FAN_TO_REG(long rpm, int div)
{
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
((val) == 255 ? 0 : \
1350000 / ((val) * (div))))
/* for temp1 */
#define TEMP1_TO_REG(val) (clamp_val(((val) < 0 ? (val) + 0x100 * 1000 \
: (val)) / 1000, 0, 0xff))
#define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
/* for temp2 and temp3, because they need additional resolution */
#define TEMP_ADD_FROM_REG(val1, val2) \
((((val1) & 0x80 ? (val1)-0x100 \
: (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
#define TEMP_ADD_TO_REG_HIGH(val) \
(clamp_val(((val) < 0 ? (val) + 0x100 * 1000 : (val)) / 1000, 0, 0xff))
#define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
#define DIV_FROM_REG(val) (1 << (val))
static inline u8
DIV_TO_REG(long val)
{
int i;
val = clamp_val(val, 1, 128) >> 1;
for (i = 0; i < 7; i++) {
if (val == 0)
break;
val >>= 1;
}
return (u8)i;
}
struct w83792d_data {
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 in[9]; /* Register value */
u8 in_max[9]; /* Register value */
u8 in_min[9]; /* Register value */
u16 low_bits; /* Additional resolution to voltage in6-0 */
u8 fan[7]; /* Register value */
u8 fan_min[7]; /* Register value */
u8 temp1[3]; /* current, over, thyst */
u8 temp_add[2][6]; /* Register value */
u8 fan_div[7]; /* Register encoding, shifted right */
u8 pwm[7]; /* The 7 PWM outputs */
u8 pwmenable[3];
u32 alarms; /* realtime status register encoding,combined */
u8 chassis; /* Chassis status */
u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
};
static int w83792d_probe(struct i2c_client *client);
static int w83792d_detect(struct i2c_client *client,
struct i2c_board_info *info);
static void w83792d_remove(struct i2c_client *client);
static struct w83792d_data *w83792d_update_device(struct device *dev);
#ifdef DEBUG
static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
#endif
static void w83792d_init_client(struct i2c_client *client);
static const struct i2c_device_id w83792d_id[] = {
{ "w83792d", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, w83792d_id);
static struct i2c_driver w83792d_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "w83792d",
},
.probe = w83792d_probe,
.remove = w83792d_remove,
.id_table = w83792d_id,
.detect = w83792d_detect,
.address_list = normal_i2c,
};
static inline long in_count_from_reg(int nr, struct w83792d_data *data)
{
/* in7 and in8 do not have low bits, but the formula still works */
return (data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03);
}
/*
* The SMBus locks itself. The Winbond W83792D chip has a bank register,
* but the driver only accesses registers in bank 0, so we don't have
* to switch banks and lock access between switches.
*/
static inline int w83792d_read_value(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_byte_data(client, reg);
}
static inline int
w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
{
return i2c_smbus_write_byte_data(client, reg, value);
}
/* following are the sysfs callback functions */
static ssize_t show_in(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%ld\n",
IN_FROM_REG(nr, in_count_from_reg(nr, data)));
}
#define show_in_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
struct sensor_device_attribute *sensor_attr \
= to_sensor_dev_attr(attr); \
int nr = sensor_attr->index; \
struct w83792d_data *data = w83792d_update_device(dev); \
return sprintf(buf, "%ld\n", \
(long)(IN_FROM_REG(nr, data->reg[nr]) * 4)); \
}
show_in_reg(in_min);
show_in_reg(in_max);
#define store_in_reg(REG, reg) \
static ssize_t store_in_##reg(struct device *dev, \
struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
struct sensor_device_attribute *sensor_attr \
= to_sensor_dev_attr(attr); \
int nr = sensor_attr->index; \
struct i2c_client *client = to_i2c_client(dev); \
struct w83792d_data *data = i2c_get_clientdata(client); \
unsigned long val; \
int err = kstrtoul(buf, 10, &val); \
if (err) \
return err; \
mutex_lock(&data->update_lock); \
data->in_##reg[nr] = clamp_val(IN_TO_REG(nr, val) / 4, 0, 255); \
w83792d_write_value(client, W83792D_REG_IN_##REG[nr], \
data->in_##reg[nr]); \
mutex_unlock(&data->update_lock); \
\
return count; \
}
store_in_reg(MIN, min);
store_in_reg(MAX, max);
#define show_fan_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
struct sensor_device_attribute *sensor_attr \
= to_sensor_dev_attr(attr); \
int nr = sensor_attr->index - 1; \
struct w83792d_data *data = w83792d_update_device(dev); \
return sprintf(buf, "%d\n", \
FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
}
show_fan_reg(fan);
show_fan_reg(fan_min);
static ssize_t
store_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index - 1;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_fan_div(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t
store_fan_div(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index - 1;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
unsigned long min;
/*u8 reg;*/
u8 fan_div_reg = 0;
u8 tmp_fan_div;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
/* Save fan_min */
mutex_lock(&data->update_lock);
min = FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr]));
data->fan_div[nr] = DIV_TO_REG(val);
fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
: ((data->fan_div[nr]) & 0x07);
w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
fan_div_reg | tmp_fan_div);
/* Restore fan_min */
data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
/* read/write the temperature1, includes measured value and limits */
static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
}
static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp1[nr] = TEMP1_TO_REG(val);
w83792d_write_value(client, W83792D_REG_TEMP1[nr],
data->temp1[nr]);
mutex_unlock(&data->update_lock);
return count;
}
/* read/write the temperature2-3, includes measured value and limits */
static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sensor_attr
= to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%ld\n",
(long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
data->temp_add[nr][index+1]));
}
static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr
= to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
data->temp_add[nr][index]);
w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
data->temp_add[nr][index+1]);
mutex_unlock(&data->update_lock);
return count;
}
/* get realtime status of all sensors items: voltage, temp, fan */
static ssize_t
alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%d\n", data->alarms);
}
static ssize_t show_alarm(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%d\n", (data->alarms >> nr) & 1);
}
static ssize_t
show_pwm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%d\n", (data->pwm[nr] & 0x0f) << 4);
}
static ssize_t
show_pwmenable(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index - 1;
struct w83792d_data *data = w83792d_update_device(dev);
long pwm_enable_tmp = 1;
switch (data->pwmenable[nr]) {
case 0:
pwm_enable_tmp = 1; /* manual mode */
break;
case 1:
pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
break;
case 2:
pwm_enable_tmp = 2; /* Smart Fan II */
break;
}
return sprintf(buf, "%ld\n", pwm_enable_tmp);
}
static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, 0, 255) >> 4;
mutex_lock(&data->update_lock);
val |= w83792d_read_value(client, W83792D_REG_PWM[nr]) & 0xf0;
data->pwm[nr] = val;
w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
store_pwmenable(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index - 1;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val < 1 || val > 3)
return -EINVAL;
mutex_lock(&data->update_lock);
switch (val) {
case 1:
data->pwmenable[nr] = 0; /* manual mode */
break;
case 2:
data->pwmenable[nr] = 2; /* Smart Fan II */
break;
case 3:
data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
break;
}
cfg1_tmp = data->pwmenable[0];
cfg2_tmp = (data->pwmenable[1]) << 2;
cfg3_tmp = (data->pwmenable[2]) << 4;
cfg4_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG) & 0xc0;
fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_pwm_mode(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%d\n", data->pwm[nr] >> 7);
}
static ssize_t
store_pwm_mode(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm[nr] = w83792d_read_value(client, W83792D_REG_PWM[nr]);
if (val) { /* PWM mode */
data->pwm[nr] |= 0x80;
} else { /* DC mode */
data->pwm[nr] &= 0x7f;
}
w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
intrusion0_alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%d\n", data->chassis);
}
static ssize_t
intrusion0_alarm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
unsigned long val;
u8 reg;
if (kstrtoul(buf, 10, &val) || val != 0)
return -EINVAL;
mutex_lock(&data->update_lock);
reg = w83792d_read_value(client, W83792D_REG_CHASSIS_CLR);
w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, reg | 0x80);
data->valid = false; /* Force cache refresh */
mutex_unlock(&data->update_lock);
return count;
}
/* For Smart Fan I / Thermal Cruise */
static ssize_t
show_thermal_cruise(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
}
static ssize_t
store_thermal_cruise(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index - 1;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
u8 target_tmp = 0, target_mask = 0;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
target_tmp = val;
target_tmp = target_tmp & 0x7f;
mutex_lock(&data->update_lock);
target_mask = w83792d_read_value(client,
W83792D_REG_THERMAL[nr]) & 0x80;
data->thermal_cruise[nr] = clamp_val(target_tmp, 0, 255);
w83792d_write_value(client, W83792D_REG_THERMAL[nr],
(data->thermal_cruise[nr]) | target_mask);
mutex_unlock(&data->update_lock);
return count;
}
/* For Smart Fan I/Thermal Cruise and Smart Fan II */
static ssize_t
show_tolerance(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
}
static ssize_t
store_tolerance(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index - 1;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
u8 tol_tmp, tol_mask;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
tol_mask = w83792d_read_value(client,
W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
tol_tmp = clamp_val(val, 0, 15);
tol_tmp &= 0x0f;
data->tolerance[nr] = tol_tmp;
if (nr == 1)
tol_tmp <<= 4;
w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
tol_mask | tol_tmp);
mutex_unlock(&data->update_lock);
return count;
}
/* For Smart Fan II */
static ssize_t
show_sf2_point(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sensor_attr
= to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
}
static ssize_t
store_sf2_point(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr
= to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr - 1;
int index = sensor_attr->index - 1;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
u8 mask_tmp = 0;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->sf2_points[index][nr] = clamp_val(val, 0, 127);
mask_tmp = w83792d_read_value(client,
W83792D_REG_POINTS[index][nr]) & 0x80;
w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
mask_tmp|data->sf2_points[index][nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
show_sf2_level(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sensor_attr
= to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index;
struct w83792d_data *data = w83792d_update_device(dev);
return sprintf(buf, "%d\n",
(((data->sf2_levels[index-1][nr]) * 100) / 15));
}
static ssize_t
store_sf2_level(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sensor_attr
= to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int index = sensor_attr->index - 1;
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
u8 mask_tmp = 0, level_tmp = 0;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->sf2_levels[index][nr] = clamp_val((val * 15) / 100, 0, 15);
mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
& ((nr == 3) ? 0xf0 : 0x0f);
if (nr == 3)
level_tmp = data->sf2_levels[index][nr];
else
level_tmp = data->sf2_levels[index][nr] << 4;
w83792d_write_value(client, W83792D_REG_LEVELS[index][nr],
level_tmp | mask_tmp);
mutex_unlock(&data->update_lock);
return count;
}
static int
w83792d_detect_subclients(struct i2c_client *new_client)
{
int i, id;
int address = new_client->addr;
u8 val;
struct i2c_adapter *adapter = new_client->adapter;
id = i2c_adapter_id(adapter);
if (force_subclients[0] == id && force_subclients[1] == address) {
for (i = 2; i <= 3; i++) {
if (force_subclients[i] < 0x48 ||
force_subclients[i] > 0x4f) {
dev_err(&new_client->dev,
"invalid subclient address %d; must be 0x48-0x4f\n",
force_subclients[i]);
return -ENODEV;
}
}
w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
(force_subclients[2] & 0x07) |
((force_subclients[3] & 0x07) << 4));
}
val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
if (!(val & 0x88) && (val & 0x7) == ((val >> 4) & 0x7)) {
dev_err(&new_client->dev,
"duplicate addresses 0x%x, use force_subclient\n", 0x48 + (val & 0x7));
return -ENODEV;
}
if (!(val & 0x08))
devm_i2c_new_dummy_device(&new_client->dev, adapter, 0x48 + (val & 0x7));
if (!(val & 0x80))
devm_i2c_new_dummy_device(&new_client->dev, adapter, 0x48 + ((val >> 4) & 0x7));
return 0;
}
static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in, NULL, 0);
static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
static SENSOR_DEVICE_ATTR(in0_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 0);
static SENSOR_DEVICE_ATTR(in1_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 1);
static SENSOR_DEVICE_ATTR(in2_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 2);
static SENSOR_DEVICE_ATTR(in3_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 3);
static SENSOR_DEVICE_ATTR(in4_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 4);
static SENSOR_DEVICE_ATTR(in5_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 5);
static SENSOR_DEVICE_ATTR(in6_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 6);
static SENSOR_DEVICE_ATTR(in7_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 7);
static SENSOR_DEVICE_ATTR(in8_min, S_IWUSR | S_IRUGO,
show_in_min, store_in_min, 8);
static SENSOR_DEVICE_ATTR(in0_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 0);
static SENSOR_DEVICE_ATTR(in1_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 1);
static SENSOR_DEVICE_ATTR(in2_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 2);
static SENSOR_DEVICE_ATTR(in3_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 3);
static SENSOR_DEVICE_ATTR(in4_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 4);
static SENSOR_DEVICE_ATTR(in5_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 5);
static SENSOR_DEVICE_ATTR(in6_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 6);
static SENSOR_DEVICE_ATTR(in7_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 7);
static SENSOR_DEVICE_ATTR(in8_max, S_IWUSR | S_IRUGO,
show_in_max, store_in_max, 8);
static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0);
static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0);
static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0);
static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR,
show_temp1, store_temp1, 0, 1);
static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp23,
store_temp23, 0, 2);
static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp23,
store_temp23, 1, 2);
static SENSOR_DEVICE_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR,
show_temp1, store_temp1, 0, 2);
static SENSOR_DEVICE_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR,
show_temp23, store_temp23, 0, 4);
static SENSOR_DEVICE_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR,
show_temp23, store_temp23, 1, 4);
static DEVICE_ATTR_RO(alarms);
static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 4);
static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 5);
static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 6);
static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 7);
static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 8);
static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 9);
static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 10);
static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 11);
static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 12);
static SENSOR_DEVICE_ATTR(fan7_alarm, S_IRUGO, show_alarm, NULL, 15);
static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 19);
static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 20);
static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 21);
static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 22);
static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 23);
static DEVICE_ATTR_RW(intrusion0_alarm);
static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0);
static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1);
static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2);
static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3);
static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4);
static SENSOR_DEVICE_ATTR(pwm6, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 5);
static SENSOR_DEVICE_ATTR(pwm7, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 6);
static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
show_pwmenable, store_pwmenable, 1);
static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
show_pwmenable, store_pwmenable, 2);
static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
show_pwmenable, store_pwmenable, 3);
static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO,
show_pwm_mode, store_pwm_mode, 0);
static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO,
show_pwm_mode, store_pwm_mode, 1);
static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO,
show_pwm_mode, store_pwm_mode, 2);
static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO,
show_pwm_mode, store_pwm_mode, 3);
static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO,
show_pwm_mode, store_pwm_mode, 4);
static SENSOR_DEVICE_ATTR(pwm6_mode, S_IWUSR | S_IRUGO,
show_pwm_mode, store_pwm_mode, 5);
static SENSOR_DEVICE_ATTR(pwm7_mode, S_IWUSR | S_IRUGO,
show_pwm_mode, store_pwm_mode, 6);
static SENSOR_DEVICE_ATTR(tolerance1, S_IWUSR | S_IRUGO,
show_tolerance, store_tolerance, 1);
static SENSOR_DEVICE_ATTR(tolerance2, S_IWUSR | S_IRUGO,
show_tolerance, store_tolerance, 2);
static SENSOR_DEVICE_ATTR(tolerance3, S_IWUSR | S_IRUGO,
show_tolerance, store_tolerance, 3);
static SENSOR_DEVICE_ATTR(thermal_cruise1, S_IWUSR | S_IRUGO,
show_thermal_cruise, store_thermal_cruise, 1);
static SENSOR_DEVICE_ATTR(thermal_cruise2, S_IWUSR | S_IRUGO,
show_thermal_cruise, store_thermal_cruise, 2);
static SENSOR_DEVICE_ATTR(thermal_cruise3, S_IWUSR | S_IRUGO,
show_thermal_cruise, store_thermal_cruise, 3);
static SENSOR_DEVICE_ATTR_2(sf2_point1_fan1, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 1, 1);
static SENSOR_DEVICE_ATTR_2(sf2_point2_fan1, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 2, 1);
static SENSOR_DEVICE_ATTR_2(sf2_point3_fan1, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 3, 1);
static SENSOR_DEVICE_ATTR_2(sf2_point4_fan1, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 4, 1);
static SENSOR_DEVICE_ATTR_2(sf2_point1_fan2, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 1, 2);
static SENSOR_DEVICE_ATTR_2(sf2_point2_fan2, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 2, 2);
static SENSOR_DEVICE_ATTR_2(sf2_point3_fan2, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 3, 2);
static SENSOR_DEVICE_ATTR_2(sf2_point4_fan2, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 4, 2);
static SENSOR_DEVICE_ATTR_2(sf2_point1_fan3, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 1, 3);
static SENSOR_DEVICE_ATTR_2(sf2_point2_fan3, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 2, 3);
static SENSOR_DEVICE_ATTR_2(sf2_point3_fan3, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 3, 3);
static SENSOR_DEVICE_ATTR_2(sf2_point4_fan3, S_IRUGO | S_IWUSR,
show_sf2_point, store_sf2_point, 4, 3);
static SENSOR_DEVICE_ATTR_2(sf2_level1_fan1, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 1, 1);
static SENSOR_DEVICE_ATTR_2(sf2_level2_fan1, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 2, 1);
static SENSOR_DEVICE_ATTR_2(sf2_level3_fan1, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 3, 1);
static SENSOR_DEVICE_ATTR_2(sf2_level1_fan2, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 1, 2);
static SENSOR_DEVICE_ATTR_2(sf2_level2_fan2, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 2, 2);
static SENSOR_DEVICE_ATTR_2(sf2_level3_fan2, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 3, 2);
static SENSOR_DEVICE_ATTR_2(sf2_level1_fan3, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 1, 3);
static SENSOR_DEVICE_ATTR_2(sf2_level2_fan3, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 2, 3);
static SENSOR_DEVICE_ATTR_2(sf2_level3_fan3, S_IRUGO | S_IWUSR,
show_sf2_level, store_sf2_level, 3, 3);
static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 1);
static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 2);
static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 3);
static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 4);
static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 5);
static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 6);
static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 7);
static SENSOR_DEVICE_ATTR(fan1_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 1);
static SENSOR_DEVICE_ATTR(fan2_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 2);
static SENSOR_DEVICE_ATTR(fan3_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 3);
static SENSOR_DEVICE_ATTR(fan4_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 4);
static SENSOR_DEVICE_ATTR(fan5_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 5);
static SENSOR_DEVICE_ATTR(fan6_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 6);
static SENSOR_DEVICE_ATTR(fan7_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 7);
static SENSOR_DEVICE_ATTR(fan1_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 1);
static SENSOR_DEVICE_ATTR(fan2_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 2);
static SENSOR_DEVICE_ATTR(fan3_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 3);
static SENSOR_DEVICE_ATTR(fan4_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 4);
static SENSOR_DEVICE_ATTR(fan5_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 5);
static SENSOR_DEVICE_ATTR(fan6_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 6);
static SENSOR_DEVICE_ATTR(fan7_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 7);
static struct attribute *w83792d_attributes_fan[4][7] = {
{
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan4_div.dev_attr.attr,
&sensor_dev_attr_fan4_alarm.dev_attr.attr,
&sensor_dev_attr_pwm4.dev_attr.attr,
&sensor_dev_attr_pwm4_mode.dev_attr.attr,
NULL
}, {
&sensor_dev_attr_fan5_input.dev_attr.attr,
&sensor_dev_attr_fan5_min.dev_attr.attr,
&sensor_dev_attr_fan5_div.dev_attr.attr,
&sensor_dev_attr_fan5_alarm.dev_attr.attr,
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm5_mode.dev_attr.attr,
NULL
}, {
&sensor_dev_attr_fan6_input.dev_attr.attr,
&sensor_dev_attr_fan6_min.dev_attr.attr,
&sensor_dev_attr_fan6_div.dev_attr.attr,
&sensor_dev_attr_fan6_alarm.dev_attr.attr,
&sensor_dev_attr_pwm6.dev_attr.attr,
&sensor_dev_attr_pwm6_mode.dev_attr.attr,
NULL
}, {
&sensor_dev_attr_fan7_input.dev_attr.attr,
&sensor_dev_attr_fan7_min.dev_attr.attr,
&sensor_dev_attr_fan7_div.dev_attr.attr,
&sensor_dev_attr_fan7_alarm.dev_attr.attr,
&sensor_dev_attr_pwm7.dev_attr.attr,
&sensor_dev_attr_pwm7_mode.dev_attr.attr,
NULL
}
};
static const struct attribute_group w83792d_group_fan[4] = {
{ .attrs = w83792d_attributes_fan[0] },
{ .attrs = w83792d_attributes_fan[1] },
{ .attrs = w83792d_attributes_fan[2] },
{ .attrs = w83792d_attributes_fan[3] },
};
static struct attribute *w83792d_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in8_input.dev_attr.attr,
&sensor_dev_attr_in8_max.dev_attr.attr,
&sensor_dev_attr_in8_min.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
&sensor_dev_attr_in8_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_mode.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_mode.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_mode.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_intrusion0_alarm.attr,
&sensor_dev_attr_tolerance1.dev_attr.attr,
&sensor_dev_attr_thermal_cruise1.dev_attr.attr,
&sensor_dev_attr_tolerance2.dev_attr.attr,
&sensor_dev_attr_thermal_cruise2.dev_attr.attr,
&sensor_dev_attr_tolerance3.dev_attr.attr,
&sensor_dev_attr_thermal_cruise3.dev_attr.attr,
&sensor_dev_attr_sf2_point1_fan1.dev_attr.attr,
&sensor_dev_attr_sf2_point2_fan1.dev_attr.attr,
&sensor_dev_attr_sf2_point3_fan1.dev_attr.attr,
&sensor_dev_attr_sf2_point4_fan1.dev_attr.attr,
&sensor_dev_attr_sf2_point1_fan2.dev_attr.attr,
&sensor_dev_attr_sf2_point2_fan2.dev_attr.attr,
&sensor_dev_attr_sf2_point3_fan2.dev_attr.attr,
&sensor_dev_attr_sf2_point4_fan2.dev_attr.attr,
&sensor_dev_attr_sf2_point1_fan3.dev_attr.attr,
&sensor_dev_attr_sf2_point2_fan3.dev_attr.attr,
&sensor_dev_attr_sf2_point3_fan3.dev_attr.attr,
&sensor_dev_attr_sf2_point4_fan3.dev_attr.attr,
&sensor_dev_attr_sf2_level1_fan1.dev_attr.attr,
&sensor_dev_attr_sf2_level2_fan1.dev_attr.attr,
&sensor_dev_attr_sf2_level3_fan1.dev_attr.attr,
&sensor_dev_attr_sf2_level1_fan2.dev_attr.attr,
&sensor_dev_attr_sf2_level2_fan2.dev_attr.attr,
&sensor_dev_attr_sf2_level3_fan2.dev_attr.attr,
&sensor_dev_attr_sf2_level1_fan3.dev_attr.attr,
&sensor_dev_attr_sf2_level2_fan3.dev_attr.attr,
&sensor_dev_attr_sf2_level3_fan3.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_div.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group w83792d_group = {
.attrs = w83792d_attributes,
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int
w83792d_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int val1, val2;
unsigned short address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
if (w83792d_read_value(client, W83792D_REG_CONFIG) & 0x80)
return -ENODEV;
val1 = w83792d_read_value(client, W83792D_REG_BANK);
val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
/* Check for Winbond ID if in bank 0 */
if (!(val1 & 0x07)) { /* is Bank0 */
if ((!(val1 & 0x80) && val2 != 0xa3) ||
((val1 & 0x80) && val2 != 0x5c))
return -ENODEV;
}
/*
* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
* should match
*/
if (w83792d_read_value(client, W83792D_REG_I2C_ADDR) != address)
return -ENODEV;
/* Put it now into bank 0 and Vendor ID High Byte */
w83792d_write_value(client,
W83792D_REG_BANK,
(w83792d_read_value(client,
W83792D_REG_BANK) & 0x78) | 0x80);
/* Determine the chip type. */
val1 = w83792d_read_value(client, W83792D_REG_WCHIPID);
val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
if (val1 != 0x7a || val2 != 0x5c)
return -ENODEV;
strscpy(info->type, "w83792d", I2C_NAME_SIZE);
return 0;
}
static int
w83792d_probe(struct i2c_client *client)
{
struct w83792d_data *data;
struct device *dev = &client->dev;
int i, val1, err;
data = devm_kzalloc(dev, sizeof(struct w83792d_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
err = w83792d_detect_subclients(client);
if (err)
return err;
/* Initialize the chip */
w83792d_init_client(client);
/* A few vars need to be filled upon startup */
for (i = 0; i < 7; i++) {
data->fan_min[i] = w83792d_read_value(client,
W83792D_REG_FAN_MIN[i]);
}
/* Register sysfs hooks */
err = sysfs_create_group(&dev->kobj, &w83792d_group);
if (err)
return err;
/*
* Read GPIO enable register to check if pins for fan 4,5 are used as
* GPIO
*/
val1 = w83792d_read_value(client, W83792D_REG_GPIO_EN);
if (!(val1 & 0x40)) {
err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[0]);
if (err)
goto exit_remove_files;
}
if (!(val1 & 0x20)) {
err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[1]);
if (err)
goto exit_remove_files;
}
val1 = w83792d_read_value(client, W83792D_REG_PIN);
if (val1 & 0x40) {
err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[2]);
if (err)
goto exit_remove_files;
}
if (val1 & 0x04) {
err = sysfs_create_group(&dev->kobj, &w83792d_group_fan[3]);
if (err)
goto exit_remove_files;
}
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove_files;
}
return 0;
exit_remove_files:
sysfs_remove_group(&dev->kobj, &w83792d_group);
for (i = 0; i < ARRAY_SIZE(w83792d_group_fan); i++)
sysfs_remove_group(&dev->kobj, &w83792d_group_fan[i]);
return err;
}
static void
w83792d_remove(struct i2c_client *client)
{
struct w83792d_data *data = i2c_get_clientdata(client);
int i;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &w83792d_group);
for (i = 0; i < ARRAY_SIZE(w83792d_group_fan); i++)
sysfs_remove_group(&client->dev.kobj,
&w83792d_group_fan[i]);
}
static void
w83792d_init_client(struct i2c_client *client)
{
u8 temp2_cfg, temp3_cfg, vid_in_b;
if (init)
w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
/*
* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
* W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
* vin0/vin1 can be modified by user;
* W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
* vin0/vin1 auto-updated, can NOT be modified by user.
*/
vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
w83792d_write_value(client, W83792D_REG_VID_IN_B,
vid_in_b & 0xbf);
temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
temp2_cfg & 0xe6);
w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
temp3_cfg & 0xe6);
/* Start monitoring */
w83792d_write_value(client, W83792D_REG_CONFIG,
(w83792d_read_value(client,
W83792D_REG_CONFIG) & 0xf7)
| 0x01);
}
static struct w83792d_data *w83792d_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83792d_data *data = i2c_get_clientdata(client);
int i, j;
u8 reg_array_tmp[4], reg_tmp;
mutex_lock(&data->update_lock);
if (time_after
(jiffies - data->last_updated, (unsigned long) (HZ * 3))
|| time_before(jiffies, data->last_updated) || !data->valid) {
dev_dbg(dev, "Starting device update\n");
/* Update the voltages measured value and limits */
for (i = 0; i < 9; i++) {
data->in[i] = w83792d_read_value(client,
W83792D_REG_IN[i]);
data->in_max[i] = w83792d_read_value(client,
W83792D_REG_IN_MAX[i]);
data->in_min[i] = w83792d_read_value(client,
W83792D_REG_IN_MIN[i]);
}
data->low_bits = w83792d_read_value(client,
W83792D_REG_LOW_BITS1) +
(w83792d_read_value(client,
W83792D_REG_LOW_BITS2) << 8);
for (i = 0; i < 7; i++) {
/* Update the Fan measured value and limits */
data->fan[i] = w83792d_read_value(client,
W83792D_REG_FAN[i]);
data->fan_min[i] = w83792d_read_value(client,
W83792D_REG_FAN_MIN[i]);
/* Update the PWM/DC Value and PWM/DC flag */
data->pwm[i] = w83792d_read_value(client,
W83792D_REG_PWM[i]);
}
reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
data->pwmenable[0] = reg_tmp & 0x03;
data->pwmenable[1] = (reg_tmp>>2) & 0x03;
data->pwmenable[2] = (reg_tmp>>4) & 0x03;
for (i = 0; i < 3; i++) {
data->temp1[i] = w83792d_read_value(client,
W83792D_REG_TEMP1[i]);
}
for (i = 0; i < 2; i++) {
for (j = 0; j < 6; j++) {
data->temp_add[i][j] = w83792d_read_value(
client, W83792D_REG_TEMP_ADD[i][j]);
}
}
/* Update the Fan Divisor */
for (i = 0; i < 4; i++) {
reg_array_tmp[i] = w83792d_read_value(client,
W83792D_REG_FAN_DIV[i]);
}
data->fan_div[0] = reg_array_tmp[0] & 0x07;
data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
data->fan_div[2] = reg_array_tmp[1] & 0x07;
data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
data->fan_div[4] = reg_array_tmp[2] & 0x07;
data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
data->fan_div[6] = reg_array_tmp[3] & 0x07;
/* Update the realtime status */
data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
(w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
(w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
/* Update CaseOpen status and it's CLR_CHS. */
data->chassis = (w83792d_read_value(client,
W83792D_REG_CHASSIS) >> 5) & 0x01;
/* Update Thermal Cruise/Smart Fan I target value */
for (i = 0; i < 3; i++) {
data->thermal_cruise[i] =
w83792d_read_value(client,
W83792D_REG_THERMAL[i]) & 0x7f;
}
/* Update Smart Fan I/II tolerance */
reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
data->tolerance[0] = reg_tmp & 0x0f;
data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
data->tolerance[2] = w83792d_read_value(client,
W83792D_REG_TOLERANCE[2]) & 0x0f;
/* Update Smart Fan II temperature points */
for (i = 0; i < 3; i++) {
for (j = 0; j < 4; j++) {
data->sf2_points[i][j]
= w83792d_read_value(client,
W83792D_REG_POINTS[i][j]) & 0x7f;
}
}
/* Update Smart Fan II duty cycle levels */
for (i = 0; i < 3; i++) {
reg_tmp = w83792d_read_value(client,
W83792D_REG_LEVELS[i][0]);
data->sf2_levels[i][0] = reg_tmp & 0x0f;
data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
reg_tmp = w83792d_read_value(client,
W83792D_REG_LEVELS[i][2]);
data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
data->sf2_levels[i][3] = reg_tmp & 0x0f;
}
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
#ifdef DEBUG
w83792d_print_debug(data, dev);
#endif
return data;
}
#ifdef DEBUG
static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
{
int i = 0, j = 0;
dev_dbg(dev, "==========The following is the debug message...========\n");
dev_dbg(dev, "9 set of Voltages: =====>\n");
for (i = 0; i < 9; i++) {
dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
}
dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
for (i = 0; i < 7; i++) {
dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
}
dev_dbg(dev, "3 set of Temperatures: =====>\n");
for (i = 0; i < 3; i++)
dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
for (i = 0; i < 2; i++) {
for (j = 0; j < 6; j++) {
dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
data->temp_add[i][j]);
}
}
for (i = 0; i < 7; i++)
dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
dev_dbg(dev, "==========End of the debug message...================\n");
dev_dbg(dev, "\n");
}
#endif
module_i2c_driver(w83792d_driver);
MODULE_AUTHOR("Shane Huang (Winbond)");
MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/w83792d.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Support for the FTS Systemmonitoring Chip "Teutates"
*
* Copyright (C) 2016 Fujitsu Technology Solutions GmbH,
* Thilo Cestonaro <[email protected]>
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/math.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/watchdog.h>
#define FTS_DEVICE_ID_REG 0x0000
#define FTS_DEVICE_REVISION_REG 0x0001
#define FTS_DEVICE_STATUS_REG 0x0004
#define FTS_SATELLITE_STATUS_REG 0x0005
#define FTS_EVENT_STATUS_REG 0x0006
#define FTS_GLOBAL_CONTROL_REG 0x0007
#define FTS_DEVICE_DETECT_REG_1 0x0C
#define FTS_DEVICE_DETECT_REG_2 0x0D
#define FTS_DEVICE_DETECT_REG_3 0x0E
#define FTS_SENSOR_EVENT_REG 0x0010
#define FTS_FAN_EVENT_REG 0x0014
#define FTS_FAN_PRESENT_REG 0x0015
#define FTS_POWER_ON_TIME_COUNTER_A 0x007A
#define FTS_POWER_ON_TIME_COUNTER_B 0x007B
#define FTS_POWER_ON_TIME_COUNTER_C 0x007C
#define FTS_PAGE_SELECT_REG 0x007F
#define FTS_WATCHDOG_TIME_PRESET 0x000B
#define FTS_WATCHDOG_CONTROL 0x5081
#define FTS_NO_FAN_SENSORS 0x08
#define FTS_NO_TEMP_SENSORS 0x10
#define FTS_NO_VOLT_SENSORS 0x04
#define FTS_FAN_SOURCE_INVALID 0xff
static const unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END };
static const struct i2c_device_id fts_id[] = {
{ "ftsteutates", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, fts_id);
enum WATCHDOG_RESOLUTION {
seconds = 1,
minutes = 60
};
struct fts_data {
struct i2c_client *client;
/* update sensor data lock */
struct mutex update_lock;
/* read/write register lock */
struct mutex access_lock;
unsigned long last_updated; /* in jiffies */
struct watchdog_device wdd;
enum WATCHDOG_RESOLUTION resolution;
bool valid; /* false until following fields are valid */
u8 volt[FTS_NO_VOLT_SENSORS];
u8 temp_input[FTS_NO_TEMP_SENSORS];
u8 temp_alarm;
u8 fan_present;
u8 fan_input[FTS_NO_FAN_SENSORS]; /* in rps */
u8 fan_source[FTS_NO_FAN_SENSORS];
u8 fan_alarm;
};
#define FTS_REG_FAN_INPUT(idx) ((idx) + 0x20)
#define FTS_REG_FAN_SOURCE(idx) ((idx) + 0x30)
#define FTS_REG_FAN_CONTROL(idx) (((idx) << 16) + 0x4881)
#define FTS_REG_TEMP_INPUT(idx) ((idx) + 0x40)
#define FTS_REG_TEMP_CONTROL(idx) (((idx) << 16) + 0x0681)
#define FTS_REG_VOLT(idx) ((idx) + 0x18)
/*****************************************************************************/
/* I2C Helper functions */
/*****************************************************************************/
static int fts_read_byte(struct i2c_client *client, unsigned short reg)
{
int ret;
unsigned char page = reg >> 8;
struct fts_data *data = dev_get_drvdata(&client->dev);
mutex_lock(&data->access_lock);
dev_dbg(&client->dev, "page select - page: 0x%.02x\n", page);
ret = i2c_smbus_write_byte_data(client, FTS_PAGE_SELECT_REG, page);
if (ret < 0)
goto error;
reg &= 0xFF;
ret = i2c_smbus_read_byte_data(client, reg);
dev_dbg(&client->dev, "read - reg: 0x%.02x: val: 0x%.02x\n", reg, ret);
error:
mutex_unlock(&data->access_lock);
return ret;
}
static int fts_write_byte(struct i2c_client *client, unsigned short reg,
unsigned char value)
{
int ret;
unsigned char page = reg >> 8;
struct fts_data *data = dev_get_drvdata(&client->dev);
mutex_lock(&data->access_lock);
dev_dbg(&client->dev, "page select - page: 0x%.02x\n", page);
ret = i2c_smbus_write_byte_data(client, FTS_PAGE_SELECT_REG, page);
if (ret < 0)
goto error;
reg &= 0xFF;
dev_dbg(&client->dev,
"write - reg: 0x%.02x: val: 0x%.02x\n", reg, value);
ret = i2c_smbus_write_byte_data(client, reg, value);
error:
mutex_unlock(&data->access_lock);
return ret;
}
/*****************************************************************************/
/* Data Updater Helper function */
/*****************************************************************************/
static int fts_update_device(struct fts_data *data)
{
int i;
int err = 0;
mutex_lock(&data->update_lock);
if (!time_after(jiffies, data->last_updated + 2 * HZ) && data->valid)
goto exit;
err = fts_read_byte(data->client, FTS_DEVICE_STATUS_REG);
if (err < 0)
goto exit;
data->valid = !!(err & 0x02); /* Data not ready yet */
if (unlikely(!data->valid)) {
err = -EAGAIN;
goto exit;
}
err = fts_read_byte(data->client, FTS_FAN_PRESENT_REG);
if (err < 0)
goto exit;
data->fan_present = err;
err = fts_read_byte(data->client, FTS_FAN_EVENT_REG);
if (err < 0)
goto exit;
data->fan_alarm = err;
for (i = 0; i < FTS_NO_FAN_SENSORS; i++) {
if (data->fan_present & BIT(i)) {
err = fts_read_byte(data->client, FTS_REG_FAN_INPUT(i));
if (err < 0)
goto exit;
data->fan_input[i] = err;
err = fts_read_byte(data->client,
FTS_REG_FAN_SOURCE(i));
if (err < 0)
goto exit;
data->fan_source[i] = err;
} else {
data->fan_input[i] = 0;
data->fan_source[i] = FTS_FAN_SOURCE_INVALID;
}
}
err = fts_read_byte(data->client, FTS_SENSOR_EVENT_REG);
if (err < 0)
goto exit;
data->temp_alarm = err;
for (i = 0; i < FTS_NO_TEMP_SENSORS; i++) {
err = fts_read_byte(data->client, FTS_REG_TEMP_INPUT(i));
if (err < 0)
goto exit;
data->temp_input[i] = err;
}
for (i = 0; i < FTS_NO_VOLT_SENSORS; i++) {
err = fts_read_byte(data->client, FTS_REG_VOLT(i));
if (err < 0)
goto exit;
data->volt[i] = err;
}
data->last_updated = jiffies;
err = 0;
exit:
mutex_unlock(&data->update_lock);
return err;
}
/*****************************************************************************/
/* Watchdog functions */
/*****************************************************************************/
static int fts_wd_set_resolution(struct fts_data *data,
enum WATCHDOG_RESOLUTION resolution)
{
int ret;
if (data->resolution == resolution)
return 0;
ret = fts_read_byte(data->client, FTS_WATCHDOG_CONTROL);
if (ret < 0)
return ret;
if ((resolution == seconds && ret & BIT(1)) ||
(resolution == minutes && (ret & BIT(1)) == 0)) {
data->resolution = resolution;
return 0;
}
if (resolution == seconds)
ret |= BIT(1);
else
ret &= ~BIT(1);
ret = fts_write_byte(data->client, FTS_WATCHDOG_CONTROL, ret);
if (ret < 0)
return ret;
data->resolution = resolution;
return ret;
}
static int fts_wd_set_timeout(struct watchdog_device *wdd, unsigned int timeout)
{
struct fts_data *data;
enum WATCHDOG_RESOLUTION resolution = seconds;
int ret;
data = watchdog_get_drvdata(wdd);
/* switch watchdog resolution to minutes if timeout does not fit
* into a byte
*/
if (timeout > 0xFF) {
timeout = DIV_ROUND_UP(timeout, 60) * 60;
resolution = minutes;
}
ret = fts_wd_set_resolution(data, resolution);
if (ret < 0)
return ret;
wdd->timeout = timeout;
return 0;
}
static int fts_wd_start(struct watchdog_device *wdd)
{
struct fts_data *data = watchdog_get_drvdata(wdd);
return fts_write_byte(data->client, FTS_WATCHDOG_TIME_PRESET,
wdd->timeout / (u8)data->resolution);
}
static int fts_wd_stop(struct watchdog_device *wdd)
{
struct fts_data *data;
data = watchdog_get_drvdata(wdd);
return fts_write_byte(data->client, FTS_WATCHDOG_TIME_PRESET, 0);
}
static const struct watchdog_info fts_wd_info = {
.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
.identity = "FTS Teutates Hardware Watchdog",
};
static const struct watchdog_ops fts_wd_ops = {
.owner = THIS_MODULE,
.start = fts_wd_start,
.stop = fts_wd_stop,
.set_timeout = fts_wd_set_timeout,
};
static int fts_watchdog_init(struct fts_data *data)
{
int timeout, ret;
watchdog_set_drvdata(&data->wdd, data);
timeout = fts_read_byte(data->client, FTS_WATCHDOG_TIME_PRESET);
if (timeout < 0)
return timeout;
/* watchdog not running, set timeout to a default of 60 sec. */
if (timeout == 0) {
ret = fts_wd_set_resolution(data, seconds);
if (ret < 0)
return ret;
data->wdd.timeout = 60;
} else {
ret = fts_read_byte(data->client, FTS_WATCHDOG_CONTROL);
if (ret < 0)
return ret;
data->resolution = ret & BIT(1) ? seconds : minutes;
data->wdd.timeout = timeout * (u8)data->resolution;
set_bit(WDOG_HW_RUNNING, &data->wdd.status);
}
/* Register our watchdog part */
data->wdd.info = &fts_wd_info;
data->wdd.ops = &fts_wd_ops;
data->wdd.parent = &data->client->dev;
data->wdd.min_timeout = 1;
/* max timeout 255 minutes. */
data->wdd.max_hw_heartbeat_ms = 0xFF * 60 * MSEC_PER_SEC;
return devm_watchdog_register_device(&data->client->dev, &data->wdd);
}
static umode_t fts_is_visible(const void *devdata, enum hwmon_sensor_types type, u32 attr,
int channel)
{
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_fault:
return 0444;
case hwmon_temp_alarm:
return 0644;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_fault:
return 0444;
case hwmon_fan_alarm:
return 0644;
default:
break;
}
break;
case hwmon_pwm:
case hwmon_in:
return 0444;
default:
break;
}
return 0;
}
static int fts_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long *val)
{
struct fts_data *data = dev_get_drvdata(dev);
int ret = fts_update_device(data);
if (ret < 0)
return ret;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
*val = (data->temp_input[channel] - 64) * 1000;
return 0;
case hwmon_temp_alarm:
*val = !!(data->temp_alarm & BIT(channel));
return 0;
case hwmon_temp_fault:
/* 00h Temperature = Sensor Error */;
*val = (data->temp_input[channel] == 0);
return 0;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
*val = data->fan_input[channel] * 60;
return 0;
case hwmon_fan_alarm:
*val = !!(data->fan_alarm & BIT(channel));
return 0;
case hwmon_fan_fault:
*val = !(data->fan_present & BIT(channel));
return 0;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_auto_channels_temp:
if (data->fan_source[channel] == FTS_FAN_SOURCE_INVALID)
*val = 0;
else
*val = BIT(data->fan_source[channel]);
return 0;
default:
break;
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_input:
*val = DIV_ROUND_CLOSEST(data->volt[channel] * 3300, 255);
return 0;
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static int fts_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long val)
{
struct fts_data *data = dev_get_drvdata(dev);
int ret = fts_update_device(data);
if (ret < 0)
return ret;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_alarm:
if (val)
return -EINVAL;
mutex_lock(&data->update_lock);
ret = fts_read_byte(data->client, FTS_REG_TEMP_CONTROL(channel));
if (ret >= 0)
ret = fts_write_byte(data->client, FTS_REG_TEMP_CONTROL(channel),
ret | 0x1);
if (ret >= 0)
data->valid = false;
mutex_unlock(&data->update_lock);
if (ret < 0)
return ret;
return 0;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_alarm:
if (val)
return -EINVAL;
mutex_lock(&data->update_lock);
ret = fts_read_byte(data->client, FTS_REG_FAN_CONTROL(channel));
if (ret >= 0)
ret = fts_write_byte(data->client, FTS_REG_FAN_CONTROL(channel),
ret | 0x1);
if (ret >= 0)
data->valid = false;
mutex_unlock(&data->update_lock);
if (ret < 0)
return ret;
return 0;
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static const struct hwmon_ops fts_ops = {
.is_visible = fts_is_visible,
.read = fts_read,
.write = fts_write,
};
static const struct hwmon_channel_info * const fts_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_FAULT
),
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_ALARM | HWMON_F_FAULT
),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_AUTO_CHANNELS_TEMP,
HWMON_PWM_AUTO_CHANNELS_TEMP,
HWMON_PWM_AUTO_CHANNELS_TEMP,
HWMON_PWM_AUTO_CHANNELS_TEMP,
HWMON_PWM_AUTO_CHANNELS_TEMP,
HWMON_PWM_AUTO_CHANNELS_TEMP,
HWMON_PWM_AUTO_CHANNELS_TEMP,
HWMON_PWM_AUTO_CHANNELS_TEMP
),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT,
HWMON_I_INPUT,
HWMON_I_INPUT,
HWMON_I_INPUT
),
NULL
};
static const struct hwmon_chip_info fts_chip_info = {
.ops = &fts_ops,
.info = fts_info,
};
/*****************************************************************************/
/* Module initialization / remove functions */
/*****************************************************************************/
static int fts_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
int val;
/* detection works with revision greater or equal to 0x2b */
val = i2c_smbus_read_byte_data(client, FTS_DEVICE_REVISION_REG);
if (val < 0x2b)
return -ENODEV;
/* Device Detect Regs must have 0x17 0x34 and 0x54 */
val = i2c_smbus_read_byte_data(client, FTS_DEVICE_DETECT_REG_1);
if (val != 0x17)
return -ENODEV;
val = i2c_smbus_read_byte_data(client, FTS_DEVICE_DETECT_REG_2);
if (val != 0x34)
return -ENODEV;
val = i2c_smbus_read_byte_data(client, FTS_DEVICE_DETECT_REG_3);
if (val != 0x54)
return -ENODEV;
/*
* 0x10 == Baseboard Management Controller, 0x01 == Teutates
* Device ID Reg needs to be 0x11
*/
val = i2c_smbus_read_byte_data(client, FTS_DEVICE_ID_REG);
if (val != 0x11)
return -ENODEV;
strscpy(info->type, fts_id[0].name, I2C_NAME_SIZE);
info->flags = 0;
return 0;
}
static int fts_probe(struct i2c_client *client)
{
u8 revision;
struct fts_data *data;
int err;
s8 deviceid;
struct device *hwmon_dev;
if (client->addr != 0x73)
return -ENODEV;
/* Baseboard Management Controller check */
deviceid = i2c_smbus_read_byte_data(client, FTS_DEVICE_ID_REG);
if (deviceid > 0 && (deviceid & 0xF0) == 0x10) {
switch (deviceid & 0x0F) {
case 0x01:
break;
default:
dev_dbg(&client->dev,
"No Baseboard Management Controller\n");
return -ENODEV;
}
} else {
dev_dbg(&client->dev, "No fujitsu board\n");
return -ENODEV;
}
data = devm_kzalloc(&client->dev, sizeof(struct fts_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->update_lock);
mutex_init(&data->access_lock);
data->client = client;
dev_set_drvdata(&client->dev, data);
err = i2c_smbus_read_byte_data(client, FTS_DEVICE_REVISION_REG);
if (err < 0)
return err;
revision = err;
hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, "ftsteutates", data,
&fts_chip_info, NULL);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
err = fts_watchdog_init(data);
if (err)
return err;
dev_info(&client->dev, "Detected FTS Teutates chip, revision: %d.%d\n",
(revision & 0xF0) >> 4, revision & 0x0F);
return 0;
}
/*****************************************************************************/
/* Module Details */
/*****************************************************************************/
static struct i2c_driver fts_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "ftsteutates",
},
.id_table = fts_id,
.probe = fts_probe,
.detect = fts_detect,
.address_list = normal_i2c,
};
module_i2c_driver(fts_driver);
MODULE_AUTHOR("Thilo Cestonaro <[email protected]>");
MODULE_DESCRIPTION("FTS Teutates driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ftsteutates.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* System Control and Management Interface(SCMI) based hwmon sensor driver
*
* Copyright (C) 2018-2021 ARM Ltd.
* Sudeep Holla <[email protected]>
*/
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/scmi_protocol.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/thermal.h>
static const struct scmi_sensor_proto_ops *sensor_ops;
struct scmi_sensors {
const struct scmi_protocol_handle *ph;
const struct scmi_sensor_info **info[hwmon_max];
};
struct scmi_thermal_sensor {
const struct scmi_protocol_handle *ph;
const struct scmi_sensor_info *info;
};
static inline u64 __pow10(u8 x)
{
u64 r = 1;
while (x--)
r *= 10;
return r;
}
static int scmi_hwmon_scale(const struct scmi_sensor_info *sensor, u64 *value)
{
int scale = sensor->scale;
u64 f;
switch (sensor->type) {
case TEMPERATURE_C:
case VOLTAGE:
case CURRENT:
scale += 3;
break;
case POWER:
case ENERGY:
scale += 6;
break;
default:
break;
}
if (scale == 0)
return 0;
if (abs(scale) > 19)
return -E2BIG;
f = __pow10(abs(scale));
if (scale > 0)
*value *= f;
else
*value = div64_u64(*value, f);
return 0;
}
static int scmi_hwmon_read_scaled_value(const struct scmi_protocol_handle *ph,
const struct scmi_sensor_info *sensor,
long *val)
{
int ret;
u64 value;
ret = sensor_ops->reading_get(ph, sensor->id, &value);
if (ret)
return ret;
ret = scmi_hwmon_scale(sensor, &value);
if (!ret)
*val = value;
return ret;
}
static int scmi_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
const struct scmi_sensor_info *sensor;
struct scmi_sensors *scmi_sensors = dev_get_drvdata(dev);
sensor = *(scmi_sensors->info[type] + channel);
return scmi_hwmon_read_scaled_value(scmi_sensors->ph, sensor, val);
}
static int
scmi_hwmon_read_string(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
const struct scmi_sensor_info *sensor;
struct scmi_sensors *scmi_sensors = dev_get_drvdata(dev);
sensor = *(scmi_sensors->info[type] + channel);
*str = sensor->name;
return 0;
}
static umode_t
scmi_hwmon_is_visible(const void *drvdata, enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct scmi_sensor_info *sensor;
const struct scmi_sensors *scmi_sensors = drvdata;
sensor = *(scmi_sensors->info[type] + channel);
if (sensor)
return 0444;
return 0;
}
static const struct hwmon_ops scmi_hwmon_ops = {
.is_visible = scmi_hwmon_is_visible,
.read = scmi_hwmon_read,
.read_string = scmi_hwmon_read_string,
};
static struct hwmon_chip_info scmi_chip_info = {
.ops = &scmi_hwmon_ops,
.info = NULL,
};
static int scmi_hwmon_thermal_get_temp(struct thermal_zone_device *tz,
int *temp)
{
int ret;
long value;
struct scmi_thermal_sensor *th_sensor = thermal_zone_device_priv(tz);
ret = scmi_hwmon_read_scaled_value(th_sensor->ph, th_sensor->info,
&value);
if (!ret)
*temp = value;
return ret;
}
static const struct thermal_zone_device_ops scmi_hwmon_thermal_ops = {
.get_temp = scmi_hwmon_thermal_get_temp,
};
static int scmi_hwmon_add_chan_info(struct hwmon_channel_info *scmi_hwmon_chan,
struct device *dev, int num,
enum hwmon_sensor_types type, u32 config)
{
int i;
u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
if (!cfg)
return -ENOMEM;
scmi_hwmon_chan->type = type;
scmi_hwmon_chan->config = cfg;
for (i = 0; i < num; i++, cfg++)
*cfg = config;
return 0;
}
static enum hwmon_sensor_types scmi_types[] = {
[TEMPERATURE_C] = hwmon_temp,
[VOLTAGE] = hwmon_in,
[CURRENT] = hwmon_curr,
[POWER] = hwmon_power,
[ENERGY] = hwmon_energy,
};
static u32 hwmon_attributes[hwmon_max] = {
[hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
[hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
[hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
[hwmon_power] = HWMON_P_INPUT | HWMON_P_LABEL,
[hwmon_energy] = HWMON_E_INPUT | HWMON_E_LABEL,
};
static int scmi_thermal_sensor_register(struct device *dev,
const struct scmi_protocol_handle *ph,
const struct scmi_sensor_info *sensor)
{
struct scmi_thermal_sensor *th_sensor;
struct thermal_zone_device *tzd;
th_sensor = devm_kzalloc(dev, sizeof(*th_sensor), GFP_KERNEL);
if (!th_sensor)
return -ENOMEM;
th_sensor->ph = ph;
th_sensor->info = sensor;
/*
* Try to register a temperature sensor with the Thermal Framework:
* skip sensors not defined as part of any thermal zone (-ENODEV) but
* report any other errors related to misconfigured zones/sensors.
*/
tzd = devm_thermal_of_zone_register(dev, th_sensor->info->id, th_sensor,
&scmi_hwmon_thermal_ops);
if (IS_ERR(tzd)) {
devm_kfree(dev, th_sensor);
if (PTR_ERR(tzd) != -ENODEV)
return PTR_ERR(tzd);
dev_dbg(dev, "Sensor '%s' not attached to any thermal zone.\n",
sensor->name);
} else {
dev_dbg(dev, "Sensor '%s' attached to thermal zone ID:%d\n",
sensor->name, thermal_zone_device_id(tzd));
}
return 0;
}
static int scmi_hwmon_probe(struct scmi_device *sdev)
{
int i, idx;
u16 nr_sensors;
enum hwmon_sensor_types type;
struct scmi_sensors *scmi_sensors;
const struct scmi_sensor_info *sensor;
int nr_count[hwmon_max] = {0}, nr_types = 0, nr_count_temp = 0;
const struct hwmon_chip_info *chip_info;
struct device *hwdev, *dev = &sdev->dev;
struct hwmon_channel_info *scmi_hwmon_chan;
const struct hwmon_channel_info **ptr_scmi_ci;
const struct scmi_handle *handle = sdev->handle;
struct scmi_protocol_handle *ph;
if (!handle)
return -ENODEV;
sensor_ops = handle->devm_protocol_get(sdev, SCMI_PROTOCOL_SENSOR, &ph);
if (IS_ERR(sensor_ops))
return PTR_ERR(sensor_ops);
nr_sensors = sensor_ops->count_get(ph);
if (!nr_sensors)
return -EIO;
scmi_sensors = devm_kzalloc(dev, sizeof(*scmi_sensors), GFP_KERNEL);
if (!scmi_sensors)
return -ENOMEM;
scmi_sensors->ph = ph;
for (i = 0; i < nr_sensors; i++) {
sensor = sensor_ops->info_get(ph, i);
if (!sensor)
return -EINVAL;
switch (sensor->type) {
case TEMPERATURE_C:
case VOLTAGE:
case CURRENT:
case POWER:
case ENERGY:
type = scmi_types[sensor->type];
if (!nr_count[type])
nr_types++;
nr_count[type]++;
break;
}
}
if (nr_count[hwmon_temp])
nr_count_temp = nr_count[hwmon_temp];
scmi_hwmon_chan = devm_kcalloc(dev, nr_types, sizeof(*scmi_hwmon_chan),
GFP_KERNEL);
if (!scmi_hwmon_chan)
return -ENOMEM;
ptr_scmi_ci = devm_kcalloc(dev, nr_types + 1, sizeof(*ptr_scmi_ci),
GFP_KERNEL);
if (!ptr_scmi_ci)
return -ENOMEM;
scmi_chip_info.info = ptr_scmi_ci;
chip_info = &scmi_chip_info;
for (type = 0; type < hwmon_max; type++) {
if (!nr_count[type])
continue;
scmi_hwmon_add_chan_info(scmi_hwmon_chan, dev, nr_count[type],
type, hwmon_attributes[type]);
*ptr_scmi_ci++ = scmi_hwmon_chan++;
scmi_sensors->info[type] =
devm_kcalloc(dev, nr_count[type],
sizeof(*scmi_sensors->info), GFP_KERNEL);
if (!scmi_sensors->info[type])
return -ENOMEM;
}
for (i = nr_sensors - 1; i >= 0 ; i--) {
sensor = sensor_ops->info_get(ph, i);
if (!sensor)
continue;
switch (sensor->type) {
case TEMPERATURE_C:
case VOLTAGE:
case CURRENT:
case POWER:
case ENERGY:
type = scmi_types[sensor->type];
idx = --nr_count[type];
*(scmi_sensors->info[type] + idx) = sensor;
break;
}
}
hwdev = devm_hwmon_device_register_with_info(dev, "scmi_sensors",
scmi_sensors, chip_info,
NULL);
if (IS_ERR(hwdev))
return PTR_ERR(hwdev);
for (i = 0; i < nr_count_temp; i++) {
int ret;
sensor = *(scmi_sensors->info[hwmon_temp] + i);
if (!sensor)
continue;
/*
* Warn on any misconfiguration related to thermal zones but
* bail out of probing only on memory errors.
*/
ret = scmi_thermal_sensor_register(dev, ph, sensor);
if (ret) {
if (ret == -ENOMEM)
return ret;
dev_warn(dev,
"Thermal zone misconfigured for %s. err=%d\n",
sensor->name, ret);
}
}
return 0;
}
static const struct scmi_device_id scmi_id_table[] = {
{ SCMI_PROTOCOL_SENSOR, "hwmon" },
{ },
};
MODULE_DEVICE_TABLE(scmi, scmi_id_table);
static struct scmi_driver scmi_hwmon_drv = {
.name = "scmi-hwmon",
.probe = scmi_hwmon_probe,
.id_table = scmi_id_table,
};
module_scmi_driver(scmi_hwmon_drv);
MODULE_AUTHOR("Sudeep Holla <[email protected]>");
MODULE_DESCRIPTION("ARM SCMI HWMON interface driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/scmi-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* vt1211.c - driver for the VIA VT1211 Super-I/O chip integrated hardware
* monitoring features
* Copyright (C) 2006 Juerg Haefliger <[email protected]>
*
* This driver is based on the driver for kernel 2.4 by Mark D. Studebaker
* and its port to kernel 2.6 by Lars Ekman.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/ioport.h>
#include <linux/acpi.h>
#include <linux/io.h>
static int uch_config = -1;
module_param(uch_config, int, 0);
MODULE_PARM_DESC(uch_config, "Initialize the universal channel configuration");
static int int_mode = -1;
module_param(int_mode, int, 0);
MODULE_PARM_DESC(int_mode, "Force the temperature interrupt mode");
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static struct platform_device *pdev;
#define DRVNAME "vt1211"
/* ---------------------------------------------------------------------
* Registers
*
* The sensors are defined as follows.
*
* Sensor Voltage Mode Temp Mode Notes (from the datasheet)
* -------- ------------ --------- --------------------------
* Reading 1 temp1 Intel thermal diode
* Reading 3 temp2 Internal thermal diode
* UCH1/Reading2 in0 temp3 NTC type thermistor
* UCH2 in1 temp4 +2.5V
* UCH3 in2 temp5 VccP
* UCH4 in3 temp6 +5V
* UCH5 in4 temp7 +12V
* 3.3V in5 Internal VDD (+3.3V)
*
* --------------------------------------------------------------------- */
/* Voltages (in) numbered 0-5 (ix) */
#define VT1211_REG_IN(ix) (0x21 + (ix))
#define VT1211_REG_IN_MIN(ix) ((ix) == 0 ? 0x3e : 0x2a + 2 * (ix))
#define VT1211_REG_IN_MAX(ix) ((ix) == 0 ? 0x3d : 0x29 + 2 * (ix))
/* Temperatures (temp) numbered 0-6 (ix) */
static u8 regtemp[] = {0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25};
static u8 regtempmax[] = {0x39, 0x1d, 0x3d, 0x2b, 0x2d, 0x2f, 0x31};
static u8 regtemphyst[] = {0x3a, 0x1e, 0x3e, 0x2c, 0x2e, 0x30, 0x32};
/* Fans numbered 0-1 (ix) */
#define VT1211_REG_FAN(ix) (0x29 + (ix))
#define VT1211_REG_FAN_MIN(ix) (0x3b + (ix))
#define VT1211_REG_FAN_DIV 0x47
/* PWMs numbered 0-1 (ix) */
/* Auto points numbered 0-3 (ap) */
#define VT1211_REG_PWM(ix) (0x60 + (ix))
#define VT1211_REG_PWM_CLK 0x50
#define VT1211_REG_PWM_CTL 0x51
#define VT1211_REG_PWM_AUTO_TEMP(ap) (0x55 - (ap))
#define VT1211_REG_PWM_AUTO_PWM(ix, ap) (0x58 + 2 * (ix) - (ap))
/* Miscellaneous registers */
#define VT1211_REG_CONFIG 0x40
#define VT1211_REG_ALARM1 0x41
#define VT1211_REG_ALARM2 0x42
#define VT1211_REG_VID 0x45
#define VT1211_REG_UCH_CONFIG 0x4a
#define VT1211_REG_TEMP1_CONFIG 0x4b
#define VT1211_REG_TEMP2_CONFIG 0x4c
/* In, temp & fan alarm bits */
static const u8 bitalarmin[] = {11, 0, 1, 3, 8, 2, 9};
static const u8 bitalarmtemp[] = {4, 15, 11, 0, 1, 3, 8};
static const u8 bitalarmfan[] = {6, 7};
/* ---------------------------------------------------------------------
* Data structures and manipulation thereof
* --------------------------------------------------------------------- */
struct vt1211_data {
unsigned short addr;
const char *name;
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
/* Register values */
u8 in[6];
u8 in_max[6];
u8 in_min[6];
u8 temp[7];
u8 temp_max[7];
u8 temp_hyst[7];
u8 fan[2];
u8 fan_min[2];
u8 fan_div[2];
u8 fan_ctl;
u8 pwm[2];
u8 pwm_ctl[2];
u8 pwm_clk;
u8 pwm_auto_temp[4];
u8 pwm_auto_pwm[2][4];
u8 vid; /* Read once at init time */
u8 vrm;
u8 uch_config; /* Read once at init time */
u16 alarms;
};
/* ix = [0-5] */
#define ISVOLT(ix, uch_config) ((ix) > 4 ? 1 : \
!(((uch_config) >> ((ix) + 2)) & 1))
/* ix = [0-6] */
#define ISTEMP(ix, uch_config) ((ix) < 2 ? 1 : \
((uch_config) >> (ix)) & 1)
/*
* in5 (ix = 5) is special. It's the internal 3.3V so it's scaled in the
* driver according to the VT1211 BIOS porting guide
*/
#define IN_FROM_REG(ix, reg) ((reg) < 3 ? 0 : (ix) == 5 ? \
(((reg) - 3) * 15882 + 479) / 958 : \
(((reg) - 3) * 10000 + 479) / 958)
#define IN_TO_REG(ix, val) (clamp_val((ix) == 5 ? \
((val) * 958 + 7941) / 15882 + 3 : \
((val) * 958 + 5000) / 10000 + 3, 0, 255))
/*
* temp1 (ix = 0) is an intel thermal diode which is scaled in user space.
* temp2 (ix = 1) is the internal temp diode so it's scaled in the driver
* according to some measurements that I took on an EPIA M10000.
* temp3-7 are thermistor based so the driver returns the voltage measured at
* the pin (range 0V - 2.2V).
*/
#define TEMP_FROM_REG(ix, reg) ((ix) == 0 ? (reg) * 1000 : \
(ix) == 1 ? (reg) < 51 ? 0 : \
((reg) - 51) * 1000 : \
((253 - (reg)) * 2200 + 105) / 210)
#define TEMP_TO_REG(ix, val) clamp_val( \
((ix) == 0 ? ((val) + 500) / 1000 : \
(ix) == 1 ? ((val) + 500) / 1000 + 51 : \
253 - ((val) * 210 + 1100) / 2200), 0, 255)
#define DIV_FROM_REG(reg) (1 << (reg))
#define RPM_FROM_REG(reg, div) (((reg) == 0) || ((reg) == 255) ? 0 : \
1310720 / (reg) / DIV_FROM_REG(div))
#define RPM_TO_REG(val, div) ((val) == 0 ? 255 : \
clamp_val((1310720 / (val) / \
DIV_FROM_REG(div)), 1, 254))
/* ---------------------------------------------------------------------
* Super-I/O constants and functions
* --------------------------------------------------------------------- */
/*
* Configuration index port registers
* The vt1211 can live at 2 different addresses so we need to probe both
*/
#define SIO_REG_CIP1 0x2e
#define SIO_REG_CIP2 0x4e
/* Configuration registers */
#define SIO_VT1211_LDN 0x07 /* logical device number */
#define SIO_VT1211_DEVID 0x20 /* device ID */
#define SIO_VT1211_DEVREV 0x21 /* device revision */
#define SIO_VT1211_ACTIVE 0x30 /* HW monitor active */
#define SIO_VT1211_BADDR 0x60 /* base I/O address */
#define SIO_VT1211_ID 0x3c /* VT1211 device ID */
/* VT1211 logical device numbers */
#define SIO_VT1211_LDN_HWMON 0x0b /* HW monitor */
static inline int superio_inb(int sio_cip, int reg)
{
outb(reg, sio_cip);
return inb(sio_cip + 1);
}
static inline void superio_select(int sio_cip, int ldn)
{
outb(SIO_VT1211_LDN, sio_cip);
outb(ldn, sio_cip + 1);
}
static inline int superio_enter(int sio_cip)
{
if (!request_muxed_region(sio_cip, 2, DRVNAME))
return -EBUSY;
outb(0x87, sio_cip);
outb(0x87, sio_cip);
return 0;
}
static inline void superio_exit(int sio_cip)
{
outb(0xaa, sio_cip);
release_region(sio_cip, 2);
}
/* ---------------------------------------------------------------------
* Device I/O access
* --------------------------------------------------------------------- */
static inline u8 vt1211_read8(struct vt1211_data *data, u8 reg)
{
return inb(data->addr + reg);
}
static inline void vt1211_write8(struct vt1211_data *data, u8 reg, u8 val)
{
outb(val, data->addr + reg);
}
static struct vt1211_data *vt1211_update_device(struct device *dev)
{
struct vt1211_data *data = dev_get_drvdata(dev);
int ix, val;
mutex_lock(&data->update_lock);
/* registers cache is refreshed after 1 second */
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
/* read VID */
data->vid = vt1211_read8(data, VT1211_REG_VID) & 0x1f;
/* voltage (in) registers */
for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
if (ISVOLT(ix, data->uch_config)) {
data->in[ix] = vt1211_read8(data,
VT1211_REG_IN(ix));
data->in_min[ix] = vt1211_read8(data,
VT1211_REG_IN_MIN(ix));
data->in_max[ix] = vt1211_read8(data,
VT1211_REG_IN_MAX(ix));
}
}
/* temp registers */
for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
if (ISTEMP(ix, data->uch_config)) {
data->temp[ix] = vt1211_read8(data,
regtemp[ix]);
data->temp_max[ix] = vt1211_read8(data,
regtempmax[ix]);
data->temp_hyst[ix] = vt1211_read8(data,
regtemphyst[ix]);
}
}
/* fan & pwm registers */
for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
data->fan[ix] = vt1211_read8(data,
VT1211_REG_FAN(ix));
data->fan_min[ix] = vt1211_read8(data,
VT1211_REG_FAN_MIN(ix));
data->pwm[ix] = vt1211_read8(data,
VT1211_REG_PWM(ix));
}
val = vt1211_read8(data, VT1211_REG_FAN_DIV);
data->fan_div[0] = (val >> 4) & 3;
data->fan_div[1] = (val >> 6) & 3;
data->fan_ctl = val & 0xf;
val = vt1211_read8(data, VT1211_REG_PWM_CTL);
data->pwm_ctl[0] = val & 0xf;
data->pwm_ctl[1] = (val >> 4) & 0xf;
data->pwm_clk = vt1211_read8(data, VT1211_REG_PWM_CLK);
/* pwm & temp auto point registers */
data->pwm_auto_pwm[0][1] = vt1211_read8(data,
VT1211_REG_PWM_AUTO_PWM(0, 1));
data->pwm_auto_pwm[0][2] = vt1211_read8(data,
VT1211_REG_PWM_AUTO_PWM(0, 2));
data->pwm_auto_pwm[1][1] = vt1211_read8(data,
VT1211_REG_PWM_AUTO_PWM(1, 1));
data->pwm_auto_pwm[1][2] = vt1211_read8(data,
VT1211_REG_PWM_AUTO_PWM(1, 2));
for (ix = 0; ix < ARRAY_SIZE(data->pwm_auto_temp); ix++) {
data->pwm_auto_temp[ix] = vt1211_read8(data,
VT1211_REG_PWM_AUTO_TEMP(ix));
}
/* alarm registers */
data->alarms = (vt1211_read8(data, VT1211_REG_ALARM2) << 8) |
vt1211_read8(data, VT1211_REG_ALARM1);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* ---------------------------------------------------------------------
* Voltage sysfs interfaces
* ix = [0-5]
* --------------------------------------------------------------------- */
#define SHOW_IN_INPUT 0
#define SHOW_SET_IN_MIN 1
#define SHOW_SET_IN_MAX 2
#define SHOW_IN_ALARM 3
static ssize_t show_in(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = vt1211_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SHOW_IN_INPUT:
res = IN_FROM_REG(ix, data->in[ix]);
break;
case SHOW_SET_IN_MIN:
res = IN_FROM_REG(ix, data->in_min[ix]);
break;
case SHOW_SET_IN_MAX:
res = IN_FROM_REG(ix, data->in_max[ix]);
break;
case SHOW_IN_ALARM:
res = (data->alarms >> bitalarmin[ix]) & 1;
break;
default:
res = 0;
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_in(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct vt1211_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SHOW_SET_IN_MIN:
data->in_min[ix] = IN_TO_REG(ix, val);
vt1211_write8(data, VT1211_REG_IN_MIN(ix), data->in_min[ix]);
break;
case SHOW_SET_IN_MAX:
data->in_max[ix] = IN_TO_REG(ix, val);
vt1211_write8(data, VT1211_REG_IN_MAX(ix), data->in_max[ix]);
break;
default:
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* Temperature sysfs interfaces
* ix = [0-6]
* --------------------------------------------------------------------- */
#define SHOW_TEMP_INPUT 0
#define SHOW_SET_TEMP_MAX 1
#define SHOW_SET_TEMP_MAX_HYST 2
#define SHOW_TEMP_ALARM 3
static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = vt1211_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SHOW_TEMP_INPUT:
res = TEMP_FROM_REG(ix, data->temp[ix]);
break;
case SHOW_SET_TEMP_MAX:
res = TEMP_FROM_REG(ix, data->temp_max[ix]);
break;
case SHOW_SET_TEMP_MAX_HYST:
res = TEMP_FROM_REG(ix, data->temp_hyst[ix]);
break;
case SHOW_TEMP_ALARM:
res = (data->alarms >> bitalarmtemp[ix]) & 1;
break;
default:
res = 0;
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct vt1211_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SHOW_SET_TEMP_MAX:
data->temp_max[ix] = TEMP_TO_REG(ix, val);
vt1211_write8(data, regtempmax[ix],
data->temp_max[ix]);
break;
case SHOW_SET_TEMP_MAX_HYST:
data->temp_hyst[ix] = TEMP_TO_REG(ix, val);
vt1211_write8(data, regtemphyst[ix],
data->temp_hyst[ix]);
break;
default:
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* Fan sysfs interfaces
* ix = [0-1]
* --------------------------------------------------------------------- */
#define SHOW_FAN_INPUT 0
#define SHOW_SET_FAN_MIN 1
#define SHOW_SET_FAN_DIV 2
#define SHOW_FAN_ALARM 3
static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = vt1211_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SHOW_FAN_INPUT:
res = RPM_FROM_REG(data->fan[ix], data->fan_div[ix]);
break;
case SHOW_SET_FAN_MIN:
res = RPM_FROM_REG(data->fan_min[ix], data->fan_div[ix]);
break;
case SHOW_SET_FAN_DIV:
res = DIV_FROM_REG(data->fan_div[ix]);
break;
case SHOW_FAN_ALARM:
res = (data->alarms >> bitalarmfan[ix]) & 1;
break;
default:
res = 0;
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct vt1211_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* sync the data cache */
reg = vt1211_read8(data, VT1211_REG_FAN_DIV);
data->fan_div[0] = (reg >> 4) & 3;
data->fan_div[1] = (reg >> 6) & 3;
data->fan_ctl = reg & 0xf;
switch (fn) {
case SHOW_SET_FAN_MIN:
data->fan_min[ix] = RPM_TO_REG(val, data->fan_div[ix]);
vt1211_write8(data, VT1211_REG_FAN_MIN(ix),
data->fan_min[ix]);
break;
case SHOW_SET_FAN_DIV:
switch (val) {
case 1:
data->fan_div[ix] = 0;
break;
case 2:
data->fan_div[ix] = 1;
break;
case 4:
data->fan_div[ix] = 2;
break;
case 8:
data->fan_div[ix] = 3;
break;
default:
count = -EINVAL;
dev_warn(dev,
"fan div value %ld not supported. Choose one of 1, 2, 4, or 8.\n",
val);
goto EXIT;
}
vt1211_write8(data, VT1211_REG_FAN_DIV,
((data->fan_div[1] << 6) |
(data->fan_div[0] << 4) |
data->fan_ctl));
break;
default:
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
EXIT:
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* PWM sysfs interfaces
* ix = [0-1]
* --------------------------------------------------------------------- */
#define SHOW_PWM 0
#define SHOW_SET_PWM_ENABLE 1
#define SHOW_SET_PWM_FREQ 2
#define SHOW_SET_PWM_AUTO_CHANNELS_TEMP 3
static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = vt1211_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int res;
switch (fn) {
case SHOW_PWM:
res = data->pwm[ix];
break;
case SHOW_SET_PWM_ENABLE:
res = ((data->pwm_ctl[ix] >> 3) & 1) ? 2 : 0;
break;
case SHOW_SET_PWM_FREQ:
res = 90000 >> (data->pwm_clk & 7);
break;
case SHOW_SET_PWM_AUTO_CHANNELS_TEMP:
res = (data->pwm_ctl[ix] & 7) + 1;
break;
default:
res = 0;
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
return sprintf(buf, "%d\n", res);
}
static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct vt1211_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int fn = sensor_attr_2->nr;
int tmp, reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (fn) {
case SHOW_SET_PWM_ENABLE:
/* sync the data cache */
reg = vt1211_read8(data, VT1211_REG_FAN_DIV);
data->fan_div[0] = (reg >> 4) & 3;
data->fan_div[1] = (reg >> 6) & 3;
data->fan_ctl = reg & 0xf;
reg = vt1211_read8(data, VT1211_REG_PWM_CTL);
data->pwm_ctl[0] = reg & 0xf;
data->pwm_ctl[1] = (reg >> 4) & 0xf;
switch (val) {
case 0:
data->pwm_ctl[ix] &= 7;
/*
* disable SmartGuardian if both PWM outputs are
* disabled
*/
if ((data->pwm_ctl[ix ^ 1] & 1) == 0)
data->fan_ctl &= 0xe;
break;
case 2:
data->pwm_ctl[ix] |= 8;
data->fan_ctl |= 1;
break;
default:
count = -EINVAL;
dev_warn(dev,
"pwm mode %ld not supported. Choose one of 0 or 2.\n",
val);
goto EXIT;
}
vt1211_write8(data, VT1211_REG_PWM_CTL,
((data->pwm_ctl[1] << 4) |
data->pwm_ctl[0]));
vt1211_write8(data, VT1211_REG_FAN_DIV,
((data->fan_div[1] << 6) |
(data->fan_div[0] << 4) |
data->fan_ctl));
break;
case SHOW_SET_PWM_FREQ:
val = 135000 / clamp_val(val, 135000 >> 7, 135000);
/* calculate tmp = log2(val) */
tmp = 0;
for (val >>= 1; val > 0; val >>= 1)
tmp++;
/* sync the data cache */
reg = vt1211_read8(data, VT1211_REG_PWM_CLK);
data->pwm_clk = (reg & 0xf8) | tmp;
vt1211_write8(data, VT1211_REG_PWM_CLK, data->pwm_clk);
break;
case SHOW_SET_PWM_AUTO_CHANNELS_TEMP:
if (val < 1 || val > 7) {
count = -EINVAL;
dev_warn(dev,
"temp channel %ld not supported. Choose a value between 1 and 7.\n",
val);
goto EXIT;
}
if (!ISTEMP(val - 1, data->uch_config)) {
count = -EINVAL;
dev_warn(dev, "temp channel %ld is not available.\n",
val);
goto EXIT;
}
/* sync the data cache */
reg = vt1211_read8(data, VT1211_REG_PWM_CTL);
data->pwm_ctl[0] = reg & 0xf;
data->pwm_ctl[1] = (reg >> 4) & 0xf;
data->pwm_ctl[ix] = (data->pwm_ctl[ix] & 8) | (val - 1);
vt1211_write8(data, VT1211_REG_PWM_CTL,
((data->pwm_ctl[1] << 4) | data->pwm_ctl[0]));
break;
default:
dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
}
EXIT:
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* PWM auto point definitions
* ix = [0-1]
* ap = [0-3]
* --------------------------------------------------------------------- */
/*
* pwm[ix+1]_auto_point[ap+1]_temp mapping table:
* Note that there is only a single set of temp auto points that controls both
* PWM controllers. We still create 2 sets of sysfs files to make it look
* more consistent even though they map to the same registers.
*
* ix ap : description
* -------------------
* 0 0 : pwm1/2 off temperature (pwm_auto_temp[0])
* 0 1 : pwm1/2 low speed temperature (pwm_auto_temp[1])
* 0 2 : pwm1/2 high speed temperature (pwm_auto_temp[2])
* 0 3 : pwm1/2 full speed temperature (pwm_auto_temp[3])
* 1 0 : pwm1/2 off temperature (pwm_auto_temp[0])
* 1 1 : pwm1/2 low speed temperature (pwm_auto_temp[1])
* 1 2 : pwm1/2 high speed temperature (pwm_auto_temp[2])
* 1 3 : pwm1/2 full speed temperature (pwm_auto_temp[3])
*/
static ssize_t show_pwm_auto_point_temp(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = vt1211_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int ap = sensor_attr_2->nr;
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->pwm_ctl[ix] & 7,
data->pwm_auto_temp[ap]));
}
static ssize_t set_pwm_auto_point_temp(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct vt1211_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int ap = sensor_attr_2->nr;
int reg;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* sync the data cache */
reg = vt1211_read8(data, VT1211_REG_PWM_CTL);
data->pwm_ctl[0] = reg & 0xf;
data->pwm_ctl[1] = (reg >> 4) & 0xf;
data->pwm_auto_temp[ap] = TEMP_TO_REG(data->pwm_ctl[ix] & 7, val);
vt1211_write8(data, VT1211_REG_PWM_AUTO_TEMP(ap),
data->pwm_auto_temp[ap]);
mutex_unlock(&data->update_lock);
return count;
}
/*
* pwm[ix+1]_auto_point[ap+1]_pwm mapping table:
* Note that the PWM auto points 0 & 3 are hard-wired in the VT1211 and can't
* be changed.
*
* ix ap : description
* -------------------
* 0 0 : pwm1 off (pwm_auto_pwm[0][0], hard-wired to 0)
* 0 1 : pwm1 low speed duty cycle (pwm_auto_pwm[0][1])
* 0 2 : pwm1 high speed duty cycle (pwm_auto_pwm[0][2])
* 0 3 : pwm1 full speed (pwm_auto_pwm[0][3], hard-wired to 255)
* 1 0 : pwm2 off (pwm_auto_pwm[1][0], hard-wired to 0)
* 1 1 : pwm2 low speed duty cycle (pwm_auto_pwm[1][1])
* 1 2 : pwm2 high speed duty cycle (pwm_auto_pwm[1][2])
* 1 3 : pwm2 full speed (pwm_auto_pwm[1][3], hard-wired to 255)
*/
static ssize_t show_pwm_auto_point_pwm(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = vt1211_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int ap = sensor_attr_2->nr;
return sprintf(buf, "%d\n", data->pwm_auto_pwm[ix][ap]);
}
static ssize_t set_pwm_auto_point_pwm(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct vt1211_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr_2 =
to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
int ap = sensor_attr_2->nr;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm_auto_pwm[ix][ap] = clamp_val(val, 0, 255);
vt1211_write8(data, VT1211_REG_PWM_AUTO_PWM(ix, ap),
data->pwm_auto_pwm[ix][ap]);
mutex_unlock(&data->update_lock);
return count;
}
/* ---------------------------------------------------------------------
* Miscellaneous sysfs interfaces (VRM, VID, name, and (legacy) alarms)
* --------------------------------------------------------------------- */
static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct vt1211_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct vt1211_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static ssize_t show_name(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct vt1211_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static ssize_t show_alarms(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct vt1211_data *data = vt1211_update_device(dev);
return sprintf(buf, "%d\n", data->alarms);
}
/* ---------------------------------------------------------------------
* Device attribute structs
* --------------------------------------------------------------------- */
#define SENSOR_ATTR_IN(ix) \
{ SENSOR_ATTR_2(in##ix##_input, S_IRUGO, \
show_in, NULL, SHOW_IN_INPUT, ix), \
SENSOR_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
show_in, set_in, SHOW_SET_IN_MIN, ix), \
SENSOR_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
show_in, set_in, SHOW_SET_IN_MAX, ix), \
SENSOR_ATTR_2(in##ix##_alarm, S_IRUGO, \
show_in, NULL, SHOW_IN_ALARM, ix) \
}
static struct sensor_device_attribute_2 vt1211_sysfs_in[][4] = {
SENSOR_ATTR_IN(0),
SENSOR_ATTR_IN(1),
SENSOR_ATTR_IN(2),
SENSOR_ATTR_IN(3),
SENSOR_ATTR_IN(4),
SENSOR_ATTR_IN(5)
};
#define IN_UNIT_ATTRS(X) \
{ &vt1211_sysfs_in[X][0].dev_attr.attr, \
&vt1211_sysfs_in[X][1].dev_attr.attr, \
&vt1211_sysfs_in[X][2].dev_attr.attr, \
&vt1211_sysfs_in[X][3].dev_attr.attr, \
NULL \
}
static struct attribute *vt1211_in_attr[][5] = {
IN_UNIT_ATTRS(0),
IN_UNIT_ATTRS(1),
IN_UNIT_ATTRS(2),
IN_UNIT_ATTRS(3),
IN_UNIT_ATTRS(4),
IN_UNIT_ATTRS(5)
};
static const struct attribute_group vt1211_in_attr_group[] = {
{ .attrs = vt1211_in_attr[0] },
{ .attrs = vt1211_in_attr[1] },
{ .attrs = vt1211_in_attr[2] },
{ .attrs = vt1211_in_attr[3] },
{ .attrs = vt1211_in_attr[4] },
{ .attrs = vt1211_in_attr[5] }
};
#define SENSOR_ATTR_TEMP(ix) \
{ SENSOR_ATTR_2(temp##ix##_input, S_IRUGO, \
show_temp, NULL, SHOW_TEMP_INPUT, ix-1), \
SENSOR_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
show_temp, set_temp, SHOW_SET_TEMP_MAX, ix-1), \
SENSOR_ATTR_2(temp##ix##_max_hyst, S_IRUGO | S_IWUSR, \
show_temp, set_temp, SHOW_SET_TEMP_MAX_HYST, ix-1), \
SENSOR_ATTR_2(temp##ix##_alarm, S_IRUGO, \
show_temp, NULL, SHOW_TEMP_ALARM, ix-1) \
}
static struct sensor_device_attribute_2 vt1211_sysfs_temp[][4] = {
SENSOR_ATTR_TEMP(1),
SENSOR_ATTR_TEMP(2),
SENSOR_ATTR_TEMP(3),
SENSOR_ATTR_TEMP(4),
SENSOR_ATTR_TEMP(5),
SENSOR_ATTR_TEMP(6),
SENSOR_ATTR_TEMP(7),
};
#define TEMP_UNIT_ATTRS(X) \
{ &vt1211_sysfs_temp[X][0].dev_attr.attr, \
&vt1211_sysfs_temp[X][1].dev_attr.attr, \
&vt1211_sysfs_temp[X][2].dev_attr.attr, \
&vt1211_sysfs_temp[X][3].dev_attr.attr, \
NULL \
}
static struct attribute *vt1211_temp_attr[][5] = {
TEMP_UNIT_ATTRS(0),
TEMP_UNIT_ATTRS(1),
TEMP_UNIT_ATTRS(2),
TEMP_UNIT_ATTRS(3),
TEMP_UNIT_ATTRS(4),
TEMP_UNIT_ATTRS(5),
TEMP_UNIT_ATTRS(6)
};
static const struct attribute_group vt1211_temp_attr_group[] = {
{ .attrs = vt1211_temp_attr[0] },
{ .attrs = vt1211_temp_attr[1] },
{ .attrs = vt1211_temp_attr[2] },
{ .attrs = vt1211_temp_attr[3] },
{ .attrs = vt1211_temp_attr[4] },
{ .attrs = vt1211_temp_attr[5] },
{ .attrs = vt1211_temp_attr[6] }
};
#define SENSOR_ATTR_FAN(ix) \
SENSOR_ATTR_2(fan##ix##_input, S_IRUGO, \
show_fan, NULL, SHOW_FAN_INPUT, ix-1), \
SENSOR_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
show_fan, set_fan, SHOW_SET_FAN_MIN, ix-1), \
SENSOR_ATTR_2(fan##ix##_div, S_IRUGO | S_IWUSR, \
show_fan, set_fan, SHOW_SET_FAN_DIV, ix-1), \
SENSOR_ATTR_2(fan##ix##_alarm, S_IRUGO, \
show_fan, NULL, SHOW_FAN_ALARM, ix-1)
#define SENSOR_ATTR_PWM(ix) \
SENSOR_ATTR_2(pwm##ix, S_IRUGO, \
show_pwm, NULL, SHOW_PWM, ix-1), \
SENSOR_ATTR_2(pwm##ix##_enable, S_IRUGO | S_IWUSR, \
show_pwm, set_pwm, SHOW_SET_PWM_ENABLE, ix-1), \
SENSOR_ATTR_2(pwm##ix##_auto_channels_temp, S_IRUGO | S_IWUSR, \
show_pwm, set_pwm, SHOW_SET_PWM_AUTO_CHANNELS_TEMP, ix-1)
#define SENSOR_ATTR_PWM_FREQ(ix) \
SENSOR_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
show_pwm, set_pwm, SHOW_SET_PWM_FREQ, ix-1)
#define SENSOR_ATTR_PWM_FREQ_RO(ix) \
SENSOR_ATTR_2(pwm##ix##_freq, S_IRUGO, \
show_pwm, NULL, SHOW_SET_PWM_FREQ, ix-1)
#define SENSOR_ATTR_PWM_AUTO_POINT_TEMP(ix, ap) \
SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_temp, S_IRUGO | S_IWUSR, \
show_pwm_auto_point_temp, set_pwm_auto_point_temp, \
ap-1, ix-1)
#define SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(ix, ap) \
SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_temp, S_IRUGO, \
show_pwm_auto_point_temp, NULL, \
ap-1, ix-1)
#define SENSOR_ATTR_PWM_AUTO_POINT_PWM(ix, ap) \
SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_pwm, S_IRUGO | S_IWUSR, \
show_pwm_auto_point_pwm, set_pwm_auto_point_pwm, \
ap-1, ix-1)
#define SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(ix, ap) \
SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_pwm, S_IRUGO, \
show_pwm_auto_point_pwm, NULL, \
ap-1, ix-1)
static struct sensor_device_attribute_2 vt1211_sysfs_fan_pwm[] = {
SENSOR_ATTR_FAN(1),
SENSOR_ATTR_FAN(2),
SENSOR_ATTR_PWM(1),
SENSOR_ATTR_PWM(2),
SENSOR_ATTR_PWM_FREQ(1),
SENSOR_ATTR_PWM_FREQ_RO(2),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 1),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 2),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 3),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 4),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 1),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 2),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 3),
SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 4),
SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(1, 1),
SENSOR_ATTR_PWM_AUTO_POINT_PWM(1, 2),
SENSOR_ATTR_PWM_AUTO_POINT_PWM(1, 3),
SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(1, 4),
SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(2, 1),
SENSOR_ATTR_PWM_AUTO_POINT_PWM(2, 2),
SENSOR_ATTR_PWM_AUTO_POINT_PWM(2, 3),
SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(2, 4),
};
static struct device_attribute vt1211_sysfs_misc[] = {
__ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm),
__ATTR(cpu0_vid, S_IRUGO, show_vid, NULL),
__ATTR(name, S_IRUGO, show_name, NULL),
__ATTR(alarms, S_IRUGO, show_alarms, NULL),
};
/* ---------------------------------------------------------------------
* Device registration and initialization
* --------------------------------------------------------------------- */
static void vt1211_init_device(struct vt1211_data *data)
{
/* set VRM */
data->vrm = vid_which_vrm();
/* Read (and initialize) UCH config */
data->uch_config = vt1211_read8(data, VT1211_REG_UCH_CONFIG);
if (uch_config > -1) {
data->uch_config = (data->uch_config & 0x83) |
(uch_config << 2);
vt1211_write8(data, VT1211_REG_UCH_CONFIG, data->uch_config);
}
/*
* Initialize the interrupt mode (if request at module load time).
* The VT1211 implements 3 different modes for clearing interrupts:
* 0: Clear INT when status register is read. Regenerate INT as long
* as temp stays above hysteresis limit.
* 1: Clear INT when status register is read. DON'T regenerate INT
* until temp falls below hysteresis limit and exceeds hot limit
* again.
* 2: Clear INT when temp falls below max limit.
*
* The driver only allows to force mode 0 since that's the only one
* that makes sense for 'sensors'
*/
if (int_mode == 0) {
vt1211_write8(data, VT1211_REG_TEMP1_CONFIG, 0);
vt1211_write8(data, VT1211_REG_TEMP2_CONFIG, 0);
}
/* Fill in some hard wired values into our data struct */
data->pwm_auto_pwm[0][3] = 255;
data->pwm_auto_pwm[1][3] = 255;
}
static void vt1211_remove_sysfs(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
int i;
for (i = 0; i < ARRAY_SIZE(vt1211_in_attr_group); i++)
sysfs_remove_group(&dev->kobj, &vt1211_in_attr_group[i]);
for (i = 0; i < ARRAY_SIZE(vt1211_temp_attr_group); i++)
sysfs_remove_group(&dev->kobj, &vt1211_temp_attr_group[i]);
for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_fan_pwm); i++) {
device_remove_file(dev,
&vt1211_sysfs_fan_pwm[i].dev_attr);
}
for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_misc); i++)
device_remove_file(dev, &vt1211_sysfs_misc[i]);
}
static int vt1211_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct vt1211_data *data;
struct resource *res;
int i, err;
data = devm_kzalloc(dev, sizeof(struct vt1211_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(dev, res->start, resource_size(res),
DRVNAME)) {
dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
(unsigned long)res->start, (unsigned long)res->end);
return -EBUSY;
}
data->addr = res->start;
data->name = DRVNAME;
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
/* Initialize the VT1211 chip */
vt1211_init_device(data);
/* Create sysfs interface files */
for (i = 0; i < ARRAY_SIZE(vt1211_in_attr_group); i++) {
if (ISVOLT(i, data->uch_config)) {
err = sysfs_create_group(&dev->kobj,
&vt1211_in_attr_group[i]);
if (err)
goto EXIT_DEV_REMOVE;
}
}
for (i = 0; i < ARRAY_SIZE(vt1211_temp_attr_group); i++) {
if (ISTEMP(i, data->uch_config)) {
err = sysfs_create_group(&dev->kobj,
&vt1211_temp_attr_group[i]);
if (err)
goto EXIT_DEV_REMOVE;
}
}
for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_fan_pwm); i++) {
err = device_create_file(dev,
&vt1211_sysfs_fan_pwm[i].dev_attr);
if (err)
goto EXIT_DEV_REMOVE;
}
for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_misc); i++) {
err = device_create_file(dev,
&vt1211_sysfs_misc[i]);
if (err)
goto EXIT_DEV_REMOVE;
}
/* Register device */
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
dev_err(dev, "Class registration failed (%d)\n", err);
goto EXIT_DEV_REMOVE_SILENT;
}
return 0;
EXIT_DEV_REMOVE:
dev_err(dev, "Sysfs interface creation failed (%d)\n", err);
EXIT_DEV_REMOVE_SILENT:
vt1211_remove_sysfs(pdev);
return err;
}
static int vt1211_remove(struct platform_device *pdev)
{
struct vt1211_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
vt1211_remove_sysfs(pdev);
return 0;
}
static struct platform_driver vt1211_driver = {
.driver = {
.name = DRVNAME,
},
.probe = vt1211_probe,
.remove = vt1211_remove,
};
static int __init vt1211_device_add(unsigned short address)
{
struct resource res = {
.start = address,
.end = address + 0x7f,
.flags = IORESOURCE_IO,
};
int err;
pdev = platform_device_alloc(DRVNAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed (%d)\n", err);
goto EXIT;
}
res.name = pdev->name;
err = acpi_check_resource_conflict(&res);
if (err)
goto EXIT_DEV_PUT;
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto EXIT_DEV_PUT;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto EXIT_DEV_PUT;
}
return 0;
EXIT_DEV_PUT:
platform_device_put(pdev);
EXIT:
return err;
}
static int __init vt1211_find(int sio_cip, unsigned short *address)
{
int err;
int devid;
err = superio_enter(sio_cip);
if (err)
return err;
err = -ENODEV;
devid = force_id ? force_id : superio_inb(sio_cip, SIO_VT1211_DEVID);
if (devid != SIO_VT1211_ID)
goto EXIT;
superio_select(sio_cip, SIO_VT1211_LDN_HWMON);
if ((superio_inb(sio_cip, SIO_VT1211_ACTIVE) & 1) == 0) {
pr_warn("HW monitor is disabled, skipping\n");
goto EXIT;
}
*address = ((superio_inb(sio_cip, SIO_VT1211_BADDR) << 8) |
(superio_inb(sio_cip, SIO_VT1211_BADDR + 1))) & 0xff00;
if (*address == 0) {
pr_warn("Base address is not set, skipping\n");
goto EXIT;
}
err = 0;
pr_info("Found VT1211 chip at 0x%04x, revision %u\n",
*address, superio_inb(sio_cip, SIO_VT1211_DEVREV));
EXIT:
superio_exit(sio_cip);
return err;
}
static int __init vt1211_init(void)
{
int err;
unsigned short address = 0;
err = vt1211_find(SIO_REG_CIP1, &address);
if (err) {
err = vt1211_find(SIO_REG_CIP2, &address);
if (err)
goto EXIT;
}
if ((uch_config < -1) || (uch_config > 31)) {
err = -EINVAL;
pr_warn("Invalid UCH configuration %d. Choose a value between 0 and 31.\n",
uch_config);
goto EXIT;
}
if ((int_mode < -1) || (int_mode > 0)) {
err = -EINVAL;
pr_warn("Invalid interrupt mode %d. Only mode 0 is supported.\n",
int_mode);
goto EXIT;
}
err = platform_driver_register(&vt1211_driver);
if (err)
goto EXIT;
/* Sets global pdev as a side effect */
err = vt1211_device_add(address);
if (err)
goto EXIT_DRV_UNREGISTER;
return 0;
EXIT_DRV_UNREGISTER:
platform_driver_unregister(&vt1211_driver);
EXIT:
return err;
}
static void __exit vt1211_exit(void)
{
platform_device_unregister(pdev);
platform_driver_unregister(&vt1211_driver);
}
MODULE_AUTHOR("Juerg Haefliger <[email protected]>");
MODULE_DESCRIPTION("VT1211 sensors");
MODULE_LICENSE("GPL");
module_init(vt1211_init);
module_exit(vt1211_exit);
|
linux-master
|
drivers/hwmon/vt1211.c
|
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* LTC2992 - Dual Wide Range Power Monitor
*
* Copyright 2020 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/regmap.h>
#define LTC2992_CTRLB 0x01
#define LTC2992_FAULT1 0x03
#define LTC2992_POWER1 0x05
#define LTC2992_POWER1_MAX 0x08
#define LTC2992_POWER1_MIN 0x0B
#define LTC2992_POWER1_MAX_THRESH 0x0E
#define LTC2992_POWER1_MIN_THRESH 0x11
#define LTC2992_DSENSE1 0x14
#define LTC2992_DSENSE1_MAX 0x16
#define LTC2992_DSENSE1_MIN 0x18
#define LTC2992_DSENSE1_MAX_THRESH 0x1A
#define LTC2992_DSENSE1_MIN_THRESH 0x1C
#define LTC2992_SENSE1 0x1E
#define LTC2992_SENSE1_MAX 0x20
#define LTC2992_SENSE1_MIN 0x22
#define LTC2992_SENSE1_MAX_THRESH 0x24
#define LTC2992_SENSE1_MIN_THRESH 0x26
#define LTC2992_G1 0x28
#define LTC2992_G1_MAX 0x2A
#define LTC2992_G1_MIN 0x2C
#define LTC2992_G1_MAX_THRESH 0x2E
#define LTC2992_G1_MIN_THRESH 0x30
#define LTC2992_FAULT2 0x35
#define LTC2992_G2 0x5A
#define LTC2992_G2_MAX 0x5C
#define LTC2992_G2_MIN 0x5E
#define LTC2992_G2_MAX_THRESH 0x60
#define LTC2992_G2_MIN_THRESH 0x62
#define LTC2992_G3 0x64
#define LTC2992_G3_MAX 0x66
#define LTC2992_G3_MIN 0x68
#define LTC2992_G3_MAX_THRESH 0x6A
#define LTC2992_G3_MIN_THRESH 0x6C
#define LTC2992_G4 0x6E
#define LTC2992_G4_MAX 0x70
#define LTC2992_G4_MIN 0x72
#define LTC2992_G4_MAX_THRESH 0x74
#define LTC2992_G4_MIN_THRESH 0x76
#define LTC2992_FAULT3 0x92
#define LTC2992_GPIO_STATUS 0x95
#define LTC2992_GPIO_IO_CTRL 0x96
#define LTC2992_GPIO_CTRL 0x97
#define LTC2992_POWER(x) (LTC2992_POWER1 + ((x) * 0x32))
#define LTC2992_POWER_MAX(x) (LTC2992_POWER1_MAX + ((x) * 0x32))
#define LTC2992_POWER_MIN(x) (LTC2992_POWER1_MIN + ((x) * 0x32))
#define LTC2992_POWER_MAX_THRESH(x) (LTC2992_POWER1_MAX_THRESH + ((x) * 0x32))
#define LTC2992_POWER_MIN_THRESH(x) (LTC2992_POWER1_MIN_THRESH + ((x) * 0x32))
#define LTC2992_DSENSE(x) (LTC2992_DSENSE1 + ((x) * 0x32))
#define LTC2992_DSENSE_MAX(x) (LTC2992_DSENSE1_MAX + ((x) * 0x32))
#define LTC2992_DSENSE_MIN(x) (LTC2992_DSENSE1_MIN + ((x) * 0x32))
#define LTC2992_DSENSE_MAX_THRESH(x) (LTC2992_DSENSE1_MAX_THRESH + ((x) * 0x32))
#define LTC2992_DSENSE_MIN_THRESH(x) (LTC2992_DSENSE1_MIN_THRESH + ((x) * 0x32))
#define LTC2992_SENSE(x) (LTC2992_SENSE1 + ((x) * 0x32))
#define LTC2992_SENSE_MAX(x) (LTC2992_SENSE1_MAX + ((x) * 0x32))
#define LTC2992_SENSE_MIN(x) (LTC2992_SENSE1_MIN + ((x) * 0x32))
#define LTC2992_SENSE_MAX_THRESH(x) (LTC2992_SENSE1_MAX_THRESH + ((x) * 0x32))
#define LTC2992_SENSE_MIN_THRESH(x) (LTC2992_SENSE1_MIN_THRESH + ((x) * 0x32))
#define LTC2992_POWER_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
#define LTC2992_SENSE_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
#define LTC2992_DSENSE_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
/* CTRLB register bitfields */
#define LTC2992_RESET_HISTORY BIT(3)
/* FAULT1 FAULT2 registers common bitfields */
#define LTC2992_POWER_FAULT_MSK(x) (BIT(6) << (x))
#define LTC2992_DSENSE_FAULT_MSK(x) (BIT(4) << (x))
#define LTC2992_SENSE_FAULT_MSK(x) (BIT(2) << (x))
/* FAULT1 bitfields */
#define LTC2992_GPIO1_FAULT_MSK(x) (BIT(0) << (x))
/* FAULT2 bitfields */
#define LTC2992_GPIO2_FAULT_MSK(x) (BIT(0) << (x))
/* FAULT3 bitfields */
#define LTC2992_GPIO3_FAULT_MSK(x) (BIT(6) << (x))
#define LTC2992_GPIO4_FAULT_MSK(x) (BIT(4) << (x))
#define LTC2992_IADC_NANOV_LSB 12500
#define LTC2992_VADC_UV_LSB 25000
#define LTC2992_VADC_GPIO_UV_LSB 500
#define LTC2992_GPIO_NR 4
#define LTC2992_GPIO1_BIT 7
#define LTC2992_GPIO2_BIT 6
#define LTC2992_GPIO3_BIT 0
#define LTC2992_GPIO4_BIT 6
#define LTC2992_GPIO_BIT(x) (LTC2992_GPIO_NR - (x) - 1)
struct ltc2992_state {
struct i2c_client *client;
struct gpio_chip gc;
struct mutex gpio_mutex; /* lock for gpio access */
const char *gpio_names[LTC2992_GPIO_NR];
struct regmap *regmap;
u32 r_sense_uohm[2];
};
struct ltc2992_gpio_regs {
u8 data;
u8 max;
u8 min;
u8 max_thresh;
u8 min_thresh;
u8 alarm;
u8 min_alarm_msk;
u8 max_alarm_msk;
u8 ctrl;
u8 ctrl_bit;
};
static const struct ltc2992_gpio_regs ltc2992_gpio_addr_map[] = {
{
.data = LTC2992_G1,
.max = LTC2992_G1_MAX,
.min = LTC2992_G1_MIN,
.max_thresh = LTC2992_G1_MAX_THRESH,
.min_thresh = LTC2992_G1_MIN_THRESH,
.alarm = LTC2992_FAULT1,
.min_alarm_msk = LTC2992_GPIO1_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO1_FAULT_MSK(1),
.ctrl = LTC2992_GPIO_IO_CTRL,
.ctrl_bit = LTC2992_GPIO1_BIT,
},
{
.data = LTC2992_G2,
.max = LTC2992_G2_MAX,
.min = LTC2992_G2_MIN,
.max_thresh = LTC2992_G2_MAX_THRESH,
.min_thresh = LTC2992_G2_MIN_THRESH,
.alarm = LTC2992_FAULT2,
.min_alarm_msk = LTC2992_GPIO2_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO2_FAULT_MSK(1),
.ctrl = LTC2992_GPIO_IO_CTRL,
.ctrl_bit = LTC2992_GPIO2_BIT,
},
{
.data = LTC2992_G3,
.max = LTC2992_G3_MAX,
.min = LTC2992_G3_MIN,
.max_thresh = LTC2992_G3_MAX_THRESH,
.min_thresh = LTC2992_G3_MIN_THRESH,
.alarm = LTC2992_FAULT3,
.min_alarm_msk = LTC2992_GPIO3_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO3_FAULT_MSK(1),
.ctrl = LTC2992_GPIO_IO_CTRL,
.ctrl_bit = LTC2992_GPIO3_BIT,
},
{
.data = LTC2992_G4,
.max = LTC2992_G4_MAX,
.min = LTC2992_G4_MIN,
.max_thresh = LTC2992_G4_MAX_THRESH,
.min_thresh = LTC2992_G4_MIN_THRESH,
.alarm = LTC2992_FAULT3,
.min_alarm_msk = LTC2992_GPIO4_FAULT_MSK(0),
.max_alarm_msk = LTC2992_GPIO4_FAULT_MSK(1),
.ctrl = LTC2992_GPIO_CTRL,
.ctrl_bit = LTC2992_GPIO4_BIT,
},
};
static const char *ltc2992_gpio_names[LTC2992_GPIO_NR] = {
"GPIO1", "GPIO2", "GPIO3", "GPIO4",
};
static int ltc2992_read_reg(struct ltc2992_state *st, u8 addr, const u8 reg_len)
{
u8 regvals[4];
int val;
int ret;
int i;
ret = regmap_bulk_read(st->regmap, addr, regvals, reg_len);
if (ret < 0)
return ret;
val = 0;
for (i = 0; i < reg_len; i++)
val |= regvals[reg_len - i - 1] << (i * 8);
return val;
}
static int ltc2992_write_reg(struct ltc2992_state *st, u8 addr, const u8 reg_len, u32 val)
{
u8 regvals[4];
int i;
for (i = 0; i < reg_len; i++)
regvals[reg_len - i - 1] = (val >> (i * 8)) & 0xFF;
return regmap_bulk_write(st->regmap, addr, regvals, reg_len);
}
static int ltc2992_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct ltc2992_state *st = gpiochip_get_data(chip);
unsigned long gpio_status;
int reg;
mutex_lock(&st->gpio_mutex);
reg = ltc2992_read_reg(st, LTC2992_GPIO_STATUS, 1);
mutex_unlock(&st->gpio_mutex);
if (reg < 0)
return reg;
gpio_status = reg;
return !test_bit(LTC2992_GPIO_BIT(offset), &gpio_status);
}
static int ltc2992_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
unsigned long *bits)
{
struct ltc2992_state *st = gpiochip_get_data(chip);
unsigned long gpio_status;
unsigned int gpio_nr;
int reg;
mutex_lock(&st->gpio_mutex);
reg = ltc2992_read_reg(st, LTC2992_GPIO_STATUS, 1);
mutex_unlock(&st->gpio_mutex);
if (reg < 0)
return reg;
gpio_status = reg;
for_each_set_bit(gpio_nr, mask, LTC2992_GPIO_NR) {
if (test_bit(LTC2992_GPIO_BIT(gpio_nr), &gpio_status))
set_bit(gpio_nr, bits);
}
return 0;
}
static void ltc2992_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
{
struct ltc2992_state *st = gpiochip_get_data(chip);
unsigned long gpio_ctrl;
int reg;
mutex_lock(&st->gpio_mutex);
reg = ltc2992_read_reg(st, ltc2992_gpio_addr_map[offset].ctrl, 1);
if (reg < 0) {
mutex_unlock(&st->gpio_mutex);
return;
}
gpio_ctrl = reg;
assign_bit(ltc2992_gpio_addr_map[offset].ctrl_bit, &gpio_ctrl, value);
ltc2992_write_reg(st, ltc2992_gpio_addr_map[offset].ctrl, 1, gpio_ctrl);
mutex_unlock(&st->gpio_mutex);
}
static void ltc2992_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask,
unsigned long *bits)
{
struct ltc2992_state *st = gpiochip_get_data(chip);
unsigned long gpio_ctrl_io = 0;
unsigned long gpio_ctrl = 0;
unsigned int gpio_nr;
for_each_set_bit(gpio_nr, mask, LTC2992_GPIO_NR) {
if (gpio_nr < 3)
assign_bit(ltc2992_gpio_addr_map[gpio_nr].ctrl_bit, &gpio_ctrl_io, true);
if (gpio_nr == 3)
assign_bit(ltc2992_gpio_addr_map[gpio_nr].ctrl_bit, &gpio_ctrl, true);
}
mutex_lock(&st->gpio_mutex);
ltc2992_write_reg(st, LTC2992_GPIO_IO_CTRL, 1, gpio_ctrl_io);
ltc2992_write_reg(st, LTC2992_GPIO_CTRL, 1, gpio_ctrl);
mutex_unlock(&st->gpio_mutex);
}
static int ltc2992_config_gpio(struct ltc2992_state *st)
{
const char *name = dev_name(&st->client->dev);
char *gpio_name;
int ret;
int i;
ret = ltc2992_write_reg(st, LTC2992_GPIO_IO_CTRL, 1, 0);
if (ret < 0)
return ret;
mutex_init(&st->gpio_mutex);
for (i = 0; i < ARRAY_SIZE(st->gpio_names); i++) {
gpio_name = devm_kasprintf(&st->client->dev, GFP_KERNEL, "ltc2992-%x-%s",
st->client->addr, ltc2992_gpio_names[i]);
if (!gpio_name)
return -ENOMEM;
st->gpio_names[i] = gpio_name;
}
st->gc.label = name;
st->gc.parent = &st->client->dev;
st->gc.owner = THIS_MODULE;
st->gc.can_sleep = true;
st->gc.base = -1;
st->gc.names = st->gpio_names;
st->gc.ngpio = ARRAY_SIZE(st->gpio_names);
st->gc.get = ltc2992_gpio_get;
st->gc.get_multiple = ltc2992_gpio_get_multiple;
st->gc.set = ltc2992_gpio_set;
st->gc.set_multiple = ltc2992_gpio_set_multiple;
ret = devm_gpiochip_add_data(&st->client->dev, &st->gc, st);
if (ret)
dev_err(&st->client->dev, "GPIO registering failed (%d)\n", ret);
return ret;
}
static umode_t ltc2992_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
int channel)
{
const struct ltc2992_state *st = data;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_in_reset_history:
return 0200;
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_input:
case hwmon_in_lowest:
case hwmon_in_highest:
case hwmon_in_min_alarm:
case hwmon_in_max_alarm:
return 0444;
case hwmon_in_min:
case hwmon_in_max:
return 0644;
}
break;
case hwmon_curr:
switch (attr) {
case hwmon_curr_input:
case hwmon_curr_lowest:
case hwmon_curr_highest:
case hwmon_curr_min_alarm:
case hwmon_curr_max_alarm:
if (st->r_sense_uohm[channel])
return 0444;
break;
case hwmon_curr_min:
case hwmon_curr_max:
if (st->r_sense_uohm[channel])
return 0644;
break;
}
break;
case hwmon_power:
switch (attr) {
case hwmon_power_input:
case hwmon_power_input_lowest:
case hwmon_power_input_highest:
case hwmon_power_min_alarm:
case hwmon_power_max_alarm:
if (st->r_sense_uohm[channel])
return 0444;
break;
case hwmon_power_min:
case hwmon_power_max:
if (st->r_sense_uohm[channel])
return 0644;
break;
}
break;
default:
break;
}
return 0;
}
static int ltc2992_get_voltage(struct ltc2992_state *st, u32 reg, u32 scale, long *val)
{
int reg_val;
reg_val = ltc2992_read_reg(st, reg, 2);
if (reg_val < 0)
return reg_val;
reg_val = reg_val >> 4;
*val = DIV_ROUND_CLOSEST(reg_val * scale, 1000);
return 0;
}
static int ltc2992_set_voltage(struct ltc2992_state *st, u32 reg, u32 scale, long val)
{
val = DIV_ROUND_CLOSEST(val * 1000, scale);
val = val << 4;
return ltc2992_write_reg(st, reg, 2, val);
}
static int ltc2992_read_gpio_alarm(struct ltc2992_state *st, int nr_gpio, u32 attr, long *val)
{
int reg_val;
u32 mask;
if (attr == hwmon_in_max_alarm)
mask = ltc2992_gpio_addr_map[nr_gpio].max_alarm_msk;
else
mask = ltc2992_gpio_addr_map[nr_gpio].min_alarm_msk;
reg_val = ltc2992_read_reg(st, ltc2992_gpio_addr_map[nr_gpio].alarm, 1);
if (reg_val < 0)
return reg_val;
*val = !!(reg_val & mask);
reg_val &= ~mask;
return ltc2992_write_reg(st, ltc2992_gpio_addr_map[nr_gpio].alarm, 1, reg_val);
}
static int ltc2992_read_gpios_in(struct device *dev, u32 attr, int nr_gpio, long *val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
switch (attr) {
case hwmon_in_input:
reg = ltc2992_gpio_addr_map[nr_gpio].data;
break;
case hwmon_in_lowest:
reg = ltc2992_gpio_addr_map[nr_gpio].min;
break;
case hwmon_in_highest:
reg = ltc2992_gpio_addr_map[nr_gpio].max;
break;
case hwmon_in_min:
reg = ltc2992_gpio_addr_map[nr_gpio].min_thresh;
break;
case hwmon_in_max:
reg = ltc2992_gpio_addr_map[nr_gpio].max_thresh;
break;
case hwmon_in_min_alarm:
case hwmon_in_max_alarm:
return ltc2992_read_gpio_alarm(st, nr_gpio, attr, val);
default:
return -EOPNOTSUPP;
}
return ltc2992_get_voltage(st, reg, LTC2992_VADC_GPIO_UV_LSB, val);
}
static int ltc2992_read_in_alarm(struct ltc2992_state *st, int channel, long *val, u32 attr)
{
int reg_val;
u32 mask;
if (attr == hwmon_in_max_alarm)
mask = LTC2992_SENSE_FAULT_MSK(1);
else
mask = LTC2992_SENSE_FAULT_MSK(0);
reg_val = ltc2992_read_reg(st, LTC2992_SENSE_FAULT(channel), 1);
if (reg_val < 0)
return reg_val;
*val = !!(reg_val & mask);
reg_val &= ~mask;
return ltc2992_write_reg(st, LTC2992_SENSE_FAULT(channel), 1, reg_val);
}
static int ltc2992_read_in(struct device *dev, u32 attr, int channel, long *val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
if (channel > 1)
return ltc2992_read_gpios_in(dev, attr, channel - 2, val);
switch (attr) {
case hwmon_in_input:
reg = LTC2992_SENSE(channel);
break;
case hwmon_in_lowest:
reg = LTC2992_SENSE_MIN(channel);
break;
case hwmon_in_highest:
reg = LTC2992_SENSE_MAX(channel);
break;
case hwmon_in_min:
reg = LTC2992_SENSE_MIN_THRESH(channel);
break;
case hwmon_in_max:
reg = LTC2992_SENSE_MAX_THRESH(channel);
break;
case hwmon_in_min_alarm:
case hwmon_in_max_alarm:
return ltc2992_read_in_alarm(st, channel, val, attr);
default:
return -EOPNOTSUPP;
}
return ltc2992_get_voltage(st, reg, LTC2992_VADC_UV_LSB, val);
}
static int ltc2992_get_current(struct ltc2992_state *st, u32 reg, u32 channel, long *val)
{
int reg_val;
reg_val = ltc2992_read_reg(st, reg, 2);
if (reg_val < 0)
return reg_val;
reg_val = reg_val >> 4;
*val = DIV_ROUND_CLOSEST(reg_val * LTC2992_IADC_NANOV_LSB, st->r_sense_uohm[channel]);
return 0;
}
static int ltc2992_set_current(struct ltc2992_state *st, u32 reg, u32 channel, long val)
{
u32 reg_val;
reg_val = DIV_ROUND_CLOSEST(val * st->r_sense_uohm[channel], LTC2992_IADC_NANOV_LSB);
reg_val = reg_val << 4;
return ltc2992_write_reg(st, reg, 2, reg_val);
}
static int ltc2992_read_curr_alarm(struct ltc2992_state *st, int channel, long *val, u32 attr)
{
int reg_val;
u32 mask;
if (attr == hwmon_curr_max_alarm)
mask = LTC2992_DSENSE_FAULT_MSK(1);
else
mask = LTC2992_DSENSE_FAULT_MSK(0);
reg_val = ltc2992_read_reg(st, LTC2992_DSENSE_FAULT(channel), 1);
if (reg_val < 0)
return reg_val;
*val = !!(reg_val & mask);
reg_val &= ~mask;
return ltc2992_write_reg(st, LTC2992_DSENSE_FAULT(channel), 1, reg_val);
}
static int ltc2992_read_curr(struct device *dev, u32 attr, int channel, long *val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
switch (attr) {
case hwmon_curr_input:
reg = LTC2992_DSENSE(channel);
break;
case hwmon_curr_lowest:
reg = LTC2992_DSENSE_MIN(channel);
break;
case hwmon_curr_highest:
reg = LTC2992_DSENSE_MAX(channel);
break;
case hwmon_curr_min:
reg = LTC2992_DSENSE_MIN_THRESH(channel);
break;
case hwmon_curr_max:
reg = LTC2992_DSENSE_MAX_THRESH(channel);
break;
case hwmon_curr_min_alarm:
case hwmon_curr_max_alarm:
return ltc2992_read_curr_alarm(st, channel, val, attr);
default:
return -EOPNOTSUPP;
}
return ltc2992_get_current(st, reg, channel, val);
}
static int ltc2992_get_power(struct ltc2992_state *st, u32 reg, u32 channel, long *val)
{
int reg_val;
reg_val = ltc2992_read_reg(st, reg, 3);
if (reg_val < 0)
return reg_val;
*val = mul_u64_u32_div(reg_val, LTC2992_VADC_UV_LSB * LTC2992_IADC_NANOV_LSB,
st->r_sense_uohm[channel] * 1000);
return 0;
}
static int ltc2992_set_power(struct ltc2992_state *st, u32 reg, u32 channel, long val)
{
u32 reg_val;
reg_val = mul_u64_u32_div(val, st->r_sense_uohm[channel] * 1000,
LTC2992_VADC_UV_LSB * LTC2992_IADC_NANOV_LSB);
return ltc2992_write_reg(st, reg, 3, reg_val);
}
static int ltc2992_read_power_alarm(struct ltc2992_state *st, int channel, long *val, u32 attr)
{
int reg_val;
u32 mask;
if (attr == hwmon_power_max_alarm)
mask = LTC2992_POWER_FAULT_MSK(1);
else
mask = LTC2992_POWER_FAULT_MSK(0);
reg_val = ltc2992_read_reg(st, LTC2992_POWER_FAULT(channel), 1);
if (reg_val < 0)
return reg_val;
*val = !!(reg_val & mask);
reg_val &= ~mask;
return ltc2992_write_reg(st, LTC2992_POWER_FAULT(channel), 1, reg_val);
}
static int ltc2992_read_power(struct device *dev, u32 attr, int channel, long *val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
switch (attr) {
case hwmon_power_input:
reg = LTC2992_POWER(channel);
break;
case hwmon_power_input_lowest:
reg = LTC2992_POWER_MIN(channel);
break;
case hwmon_power_input_highest:
reg = LTC2992_POWER_MAX(channel);
break;
case hwmon_power_min:
reg = LTC2992_POWER_MIN_THRESH(channel);
break;
case hwmon_power_max:
reg = LTC2992_POWER_MAX_THRESH(channel);
break;
case hwmon_power_min_alarm:
case hwmon_power_max_alarm:
return ltc2992_read_power_alarm(st, channel, val, attr);
default:
return -EOPNOTSUPP;
}
return ltc2992_get_power(st, reg, channel, val);
}
static int ltc2992_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long *val)
{
switch (type) {
case hwmon_in:
return ltc2992_read_in(dev, attr, channel, val);
case hwmon_curr:
return ltc2992_read_curr(dev, attr, channel, val);
case hwmon_power:
return ltc2992_read_power(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int ltc2992_write_curr(struct device *dev, u32 attr, int channel, long val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
switch (attr) {
case hwmon_curr_min:
reg = LTC2992_DSENSE_MIN_THRESH(channel);
break;
case hwmon_curr_max:
reg = LTC2992_DSENSE_MAX_THRESH(channel);
break;
default:
return -EOPNOTSUPP;
}
return ltc2992_set_current(st, reg, channel, val);
}
static int ltc2992_write_gpios_in(struct device *dev, u32 attr, int nr_gpio, long val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
switch (attr) {
case hwmon_in_min:
reg = ltc2992_gpio_addr_map[nr_gpio].min_thresh;
break;
case hwmon_in_max:
reg = ltc2992_gpio_addr_map[nr_gpio].max_thresh;
break;
default:
return -EOPNOTSUPP;
}
return ltc2992_set_voltage(st, reg, LTC2992_VADC_GPIO_UV_LSB, val);
}
static int ltc2992_write_in(struct device *dev, u32 attr, int channel, long val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
if (channel > 1)
return ltc2992_write_gpios_in(dev, attr, channel - 2, val);
switch (attr) {
case hwmon_in_min:
reg = LTC2992_SENSE_MIN_THRESH(channel);
break;
case hwmon_in_max:
reg = LTC2992_SENSE_MAX_THRESH(channel);
break;
default:
return -EOPNOTSUPP;
}
return ltc2992_set_voltage(st, reg, LTC2992_VADC_UV_LSB, val);
}
static int ltc2992_write_power(struct device *dev, u32 attr, int channel, long val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
u32 reg;
switch (attr) {
case hwmon_power_min:
reg = LTC2992_POWER_MIN_THRESH(channel);
break;
case hwmon_power_max:
reg = LTC2992_POWER_MAX_THRESH(channel);
break;
default:
return -EOPNOTSUPP;
}
return ltc2992_set_power(st, reg, channel, val);
}
static int ltc2992_write_chip(struct device *dev, u32 attr, int channel, long val)
{
struct ltc2992_state *st = dev_get_drvdata(dev);
switch (attr) {
case hwmon_chip_in_reset_history:
return regmap_update_bits(st->regmap, LTC2992_CTRLB, LTC2992_RESET_HISTORY,
LTC2992_RESET_HISTORY);
default:
return -EOPNOTSUPP;
}
}
static int ltc2992_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long val)
{
switch (type) {
case hwmon_chip:
return ltc2992_write_chip(dev, attr, channel, val);
case hwmon_in:
return ltc2992_write_in(dev, attr, channel, val);
case hwmon_curr:
return ltc2992_write_curr(dev, attr, channel, val);
case hwmon_power:
return ltc2992_write_power(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static const struct hwmon_ops ltc2992_hwmon_ops = {
.is_visible = ltc2992_is_visible,
.read = ltc2992_read,
.write = ltc2992_write,
};
static const struct hwmon_channel_info * const ltc2992_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_IN_RESET_HISTORY),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN |
HWMON_I_MAX | HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN |
HWMON_I_MAX | HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN |
HWMON_I_MAX | HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN |
HWMON_I_MAX | HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN |
HWMON_I_MAX | HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM,
HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST | HWMON_I_MIN |
HWMON_I_MAX | HWMON_I_MIN_ALARM | HWMON_I_MAX_ALARM),
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_LOWEST | HWMON_C_HIGHEST | HWMON_C_MIN |
HWMON_C_MAX | HWMON_C_MIN_ALARM | HWMON_C_MAX_ALARM,
HWMON_C_INPUT | HWMON_C_LOWEST | HWMON_C_HIGHEST | HWMON_C_MIN |
HWMON_C_MAX | HWMON_C_MIN_ALARM | HWMON_C_MAX_ALARM),
HWMON_CHANNEL_INFO(power,
HWMON_P_INPUT | HWMON_P_INPUT_LOWEST | HWMON_P_INPUT_HIGHEST |
HWMON_P_MIN | HWMON_P_MAX | HWMON_P_MIN_ALARM | HWMON_P_MAX_ALARM,
HWMON_P_INPUT | HWMON_P_INPUT_LOWEST | HWMON_P_INPUT_HIGHEST |
HWMON_P_MIN | HWMON_P_MAX | HWMON_P_MIN_ALARM | HWMON_P_MAX_ALARM),
NULL
};
static const struct hwmon_chip_info ltc2992_chip_info = {
.ops = <c2992_hwmon_ops,
.info = ltc2992_info,
};
static const struct regmap_config ltc2992_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xE8,
};
static int ltc2992_parse_dt(struct ltc2992_state *st)
{
struct fwnode_handle *fwnode;
struct fwnode_handle *child;
u32 addr;
u32 val;
int ret;
fwnode = dev_fwnode(&st->client->dev);
fwnode_for_each_available_child_node(fwnode, child) {
ret = fwnode_property_read_u32(child, "reg", &addr);
if (ret < 0) {
fwnode_handle_put(child);
return ret;
}
if (addr > 1) {
fwnode_handle_put(child);
return -EINVAL;
}
ret = fwnode_property_read_u32(child, "shunt-resistor-micro-ohms", &val);
if (!ret)
st->r_sense_uohm[addr] = val;
}
return 0;
}
static int ltc2992_i2c_probe(struct i2c_client *client)
{
struct device *hwmon_dev;
struct ltc2992_state *st;
int ret;
st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
st->client = client;
st->regmap = devm_regmap_init_i2c(client, <c2992_regmap_config);
if (IS_ERR(st->regmap))
return PTR_ERR(st->regmap);
ret = ltc2992_parse_dt(st);
if (ret < 0)
return ret;
ret = ltc2992_config_gpio(st);
if (ret < 0)
return ret;
hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, client->name, st,
<c2992_chip_info, NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id ltc2992_of_match[] = {
{ .compatible = "adi,ltc2992" },
{ }
};
MODULE_DEVICE_TABLE(of, ltc2992_of_match);
static const struct i2c_device_id ltc2992_i2c_id[] = {
{"ltc2992", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, ltc2992_i2c_id);
static struct i2c_driver ltc2992_i2c_driver = {
.driver = {
.name = "ltc2992",
.of_match_table = ltc2992_of_match,
},
.probe = ltc2992_i2c_probe,
.id_table = ltc2992_i2c_id,
};
module_i2c_driver(ltc2992_i2c_driver);
MODULE_AUTHOR("Alexandru Tachici <[email protected]>");
MODULE_DESCRIPTION("Hwmon driver for Linear Technology 2992");
MODULE_LICENSE("Dual BSD/GPL");
|
linux-master
|
drivers/hwmon/ltc2992.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* adm1026.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2002, 2003 Philip Pokorny <[email protected]>
* Copyright (C) 2004 Justin Thiessen <[email protected]>
*
* Chip details at:
*
* <https://www.onsemi.com/PowerSolutions/product.do?id=ADM1026>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
static int gpio_input[17] = { -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1 };
static int gpio_output[17] = { -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1 };
static int gpio_inverted[17] = { -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1 };
static int gpio_normal[17] = { -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1 };
static int gpio_fan[8] = { -1, -1, -1, -1, -1, -1, -1, -1 };
module_param_array(gpio_input, int, NULL, 0);
MODULE_PARM_DESC(gpio_input, "List of GPIO pins (0-16) to program as inputs");
module_param_array(gpio_output, int, NULL, 0);
MODULE_PARM_DESC(gpio_output,
"List of GPIO pins (0-16) to program as outputs");
module_param_array(gpio_inverted, int, NULL, 0);
MODULE_PARM_DESC(gpio_inverted,
"List of GPIO pins (0-16) to program as inverted");
module_param_array(gpio_normal, int, NULL, 0);
MODULE_PARM_DESC(gpio_normal,
"List of GPIO pins (0-16) to program as normal/non-inverted");
module_param_array(gpio_fan, int, NULL, 0);
MODULE_PARM_DESC(gpio_fan, "List of GPIO pins (0-7) to program as fan tachs");
/* Many ADM1026 constants specified below */
/* The ADM1026 registers */
#define ADM1026_REG_CONFIG1 0x00
#define CFG1_MONITOR 0x01
#define CFG1_INT_ENABLE 0x02
#define CFG1_INT_CLEAR 0x04
#define CFG1_AIN8_9 0x08
#define CFG1_THERM_HOT 0x10
#define CFG1_DAC_AFC 0x20
#define CFG1_PWM_AFC 0x40
#define CFG1_RESET 0x80
#define ADM1026_REG_CONFIG2 0x01
/* CONFIG2 controls FAN0/GPIO0 through FAN7/GPIO7 */
#define ADM1026_REG_CONFIG3 0x07
#define CFG3_GPIO16_ENABLE 0x01
#define CFG3_CI_CLEAR 0x02
#define CFG3_VREF_250 0x04
#define CFG3_GPIO16_DIR 0x40
#define CFG3_GPIO16_POL 0x80
#define ADM1026_REG_E2CONFIG 0x13
#define E2CFG_READ 0x01
#define E2CFG_WRITE 0x02
#define E2CFG_ERASE 0x04
#define E2CFG_ROM 0x08
#define E2CFG_CLK_EXT 0x80
/*
* There are 10 general analog inputs and 7 dedicated inputs
* They are:
* 0 - 9 = AIN0 - AIN9
* 10 = Vbat
* 11 = 3.3V Standby
* 12 = 3.3V Main
* 13 = +5V
* 14 = Vccp (CPU core voltage)
* 15 = +12V
* 16 = -12V
*/
static u16 ADM1026_REG_IN[] = {
0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
0x36, 0x37, 0x27, 0x29, 0x26, 0x2a,
0x2b, 0x2c, 0x2d, 0x2e, 0x2f
};
static u16 ADM1026_REG_IN_MIN[] = {
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d,
0x5e, 0x5f, 0x6d, 0x49, 0x6b, 0x4a,
0x4b, 0x4c, 0x4d, 0x4e, 0x4f
};
static u16 ADM1026_REG_IN_MAX[] = {
0x50, 0x51, 0x52, 0x53, 0x54, 0x55,
0x56, 0x57, 0x6c, 0x41, 0x6a, 0x42,
0x43, 0x44, 0x45, 0x46, 0x47
};
/*
* Temperatures are:
* 0 - Internal
* 1 - External 1
* 2 - External 2
*/
static u16 ADM1026_REG_TEMP[] = { 0x1f, 0x28, 0x29 };
static u16 ADM1026_REG_TEMP_MIN[] = { 0x69, 0x48, 0x49 };
static u16 ADM1026_REG_TEMP_MAX[] = { 0x68, 0x40, 0x41 };
static u16 ADM1026_REG_TEMP_TMIN[] = { 0x10, 0x11, 0x12 };
static u16 ADM1026_REG_TEMP_THERM[] = { 0x0d, 0x0e, 0x0f };
static u16 ADM1026_REG_TEMP_OFFSET[] = { 0x1e, 0x6e, 0x6f };
#define ADM1026_REG_FAN(nr) (0x38 + (nr))
#define ADM1026_REG_FAN_MIN(nr) (0x60 + (nr))
#define ADM1026_REG_FAN_DIV_0_3 0x02
#define ADM1026_REG_FAN_DIV_4_7 0x03
#define ADM1026_REG_DAC 0x04
#define ADM1026_REG_PWM 0x05
#define ADM1026_REG_GPIO_CFG_0_3 0x08
#define ADM1026_REG_GPIO_CFG_4_7 0x09
#define ADM1026_REG_GPIO_CFG_8_11 0x0a
#define ADM1026_REG_GPIO_CFG_12_15 0x0b
/* CFG_16 in REG_CFG3 */
#define ADM1026_REG_GPIO_STATUS_0_7 0x24
#define ADM1026_REG_GPIO_STATUS_8_15 0x25
/* STATUS_16 in REG_STATUS4 */
#define ADM1026_REG_GPIO_MASK_0_7 0x1c
#define ADM1026_REG_GPIO_MASK_8_15 0x1d
/* MASK_16 in REG_MASK4 */
#define ADM1026_REG_COMPANY 0x16
#define ADM1026_REG_VERSTEP 0x17
/* These are the recognized values for the above regs */
#define ADM1026_COMPANY_ANALOG_DEV 0x41
#define ADM1026_VERSTEP_GENERIC 0x40
#define ADM1026_VERSTEP_ADM1026 0x44
#define ADM1026_REG_MASK1 0x18
#define ADM1026_REG_MASK2 0x19
#define ADM1026_REG_MASK3 0x1a
#define ADM1026_REG_MASK4 0x1b
#define ADM1026_REG_STATUS1 0x20
#define ADM1026_REG_STATUS2 0x21
#define ADM1026_REG_STATUS3 0x22
#define ADM1026_REG_STATUS4 0x23
#define ADM1026_FAN_ACTIVATION_TEMP_HYST -6
#define ADM1026_FAN_CONTROL_TEMP_RANGE 20
#define ADM1026_PWM_MAX 255
/*
* Conversions. Rounding and limit checking is only done on the TO_REG
* variants. Note that you should be a bit careful with which arguments
* these macros are called: arguments may be evaluated more than once.
*/
/*
* IN are scaled according to built-in resistors. These are the
* voltages corresponding to 3/4 of full scale (192 or 0xc0)
* NOTE: The -12V input needs an additional factor to account
* for the Vref pullup resistor.
* NEG12_OFFSET = SCALE * Vref / V-192 - Vref
* = 13875 * 2.50 / 1.875 - 2500
* = 16000
*
* The values in this table are based on Table II, page 15 of the
* datasheet.
*/
static int adm1026_scaling[] = { /* .001 Volts */
2250, 2250, 2250, 2250, 2250, 2250,
1875, 1875, 1875, 1875, 3000, 3330,
3330, 4995, 2250, 12000, 13875
};
#define NEG12_OFFSET 16000
#define SCALE(val, from, to) (((val)*(to) + ((from)/2))/(from))
#define INS_TO_REG(n, val) \
SCALE(clamp_val(val, 0, 255 * adm1026_scaling[n] / 192), \
adm1026_scaling[n], 192)
#define INS_FROM_REG(n, val) (SCALE(val, 192, adm1026_scaling[n]))
/*
* FAN speed is measured using 22.5kHz clock and counts for 2 pulses
* and we assume a 2 pulse-per-rev fan tach signal
* 22500 kHz * 60 (sec/min) * 2 (pulse) / 2 (pulse/rev) == 1350000
*/
#define FAN_TO_REG(val, div) ((val) <= 0 ? 0xff : \
clamp_val(1350000 / ((val) * (div)), \
1, 254))
#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 0xff ? 0 : \
1350000 / ((val) * (div)))
#define DIV_FROM_REG(val) (1 << (val))
#define DIV_TO_REG(val) ((val) >= 8 ? 3 : (val) >= 4 ? 2 : (val) >= 2 ? 1 : 0)
/* Temperature is reported in 1 degC increments */
#define TEMP_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), \
1000)
#define TEMP_FROM_REG(val) ((val) * 1000)
#define OFFSET_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), \
1000)
#define OFFSET_FROM_REG(val) ((val) * 1000)
#define PWM_TO_REG(val) (clamp_val(val, 0, 255))
#define PWM_FROM_REG(val) (val)
#define PWM_MIN_TO_REG(val) ((val) & 0xf0)
#define PWM_MIN_FROM_REG(val) (((val) & 0xf0) + ((val) >> 4))
/*
* Analog output is a voltage, and scaled to millivolts. The datasheet
* indicates that the DAC could be used to drive the fans, but in our
* example board (Arima HDAMA) it isn't connected to the fans at all.
*/
#define DAC_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val(val, 0, 2500) * 255, \
2500)
#define DAC_FROM_REG(val) (((val) * 2500) / 255)
/*
* Chip sampling rates
*
* Some sensors are not updated more frequently than once per second
* so it doesn't make sense to read them more often than that.
* We cache the results and return the saved data if the driver
* is called again before a second has elapsed.
*
* Also, there is significant configuration data for this chip
* So, we keep the config data up to date in the cache
* when it is written and only sample it once every 5 *minutes*
*/
#define ADM1026_DATA_INTERVAL (1 * HZ)
#define ADM1026_CONFIG_INTERVAL (5 * 60 * HZ)
/*
* We allow for multiple chips in a single system.
*
* For each registered ADM1026, we need to keep state information
* at client->data. The adm1026_data structure is dynamically
* allocated, when a new client structure is allocated.
*/
struct pwm_data {
u8 pwm;
u8 enable;
u8 auto_pwm_min;
};
struct adm1026_data {
struct i2c_client *client;
const struct attribute_group *groups[3];
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_reading; /* In jiffies */
unsigned long last_config; /* In jiffies */
u8 in[17]; /* Register value */
u8 in_max[17]; /* Register value */
u8 in_min[17]; /* Register value */
s8 temp[3]; /* Register value */
s8 temp_min[3]; /* Register value */
s8 temp_max[3]; /* Register value */
s8 temp_tmin[3]; /* Register value */
s8 temp_crit[3]; /* Register value */
s8 temp_offset[3]; /* Register value */
u8 fan[8]; /* Register value */
u8 fan_min[8]; /* Register value */
u8 fan_div[8]; /* Decoded value */
struct pwm_data pwm1; /* Pwm control values */
u8 vrm; /* VRM version */
u8 analog_out; /* Register value (DAC) */
long alarms; /* Register encoding, combined */
long alarm_mask; /* Register encoding, combined */
long gpio; /* Register encoding, combined */
long gpio_mask; /* Register encoding, combined */
u8 gpio_config[17]; /* Decoded value */
u8 config1; /* Register value */
u8 config2; /* Register value */
u8 config3; /* Register value */
};
static int adm1026_read_value(struct i2c_client *client, u8 reg)
{
int res;
if (reg < 0x80) {
/* "RAM" locations */
res = i2c_smbus_read_byte_data(client, reg) & 0xff;
} else {
/* EEPROM, do nothing */
res = 0;
}
return res;
}
static int adm1026_write_value(struct i2c_client *client, u8 reg, int value)
{
int res;
if (reg < 0x80) {
/* "RAM" locations */
res = i2c_smbus_write_byte_data(client, reg, value);
} else {
/* EEPROM, do nothing */
res = 0;
}
return res;
}
static struct adm1026_data *adm1026_update_device(struct device *dev)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i;
long value, alarms, gpio;
mutex_lock(&data->update_lock);
if (!data->valid
|| time_after(jiffies,
data->last_reading + ADM1026_DATA_INTERVAL)) {
/* Things that change quickly */
dev_dbg(&client->dev, "Reading sensor values\n");
for (i = 0; i <= 16; ++i) {
data->in[i] =
adm1026_read_value(client, ADM1026_REG_IN[i]);
}
for (i = 0; i <= 7; ++i) {
data->fan[i] =
adm1026_read_value(client, ADM1026_REG_FAN(i));
}
for (i = 0; i <= 2; ++i) {
/*
* NOTE: temp[] is s8 and we assume 2's complement
* "conversion" in the assignment
*/
data->temp[i] =
adm1026_read_value(client, ADM1026_REG_TEMP[i]);
}
data->pwm1.pwm = adm1026_read_value(client,
ADM1026_REG_PWM);
data->analog_out = adm1026_read_value(client,
ADM1026_REG_DAC);
/* GPIO16 is MSbit of alarms, move it to gpio */
alarms = adm1026_read_value(client, ADM1026_REG_STATUS4);
gpio = alarms & 0x80 ? 0x0100 : 0; /* GPIO16 */
alarms &= 0x7f;
alarms <<= 8;
alarms |= adm1026_read_value(client, ADM1026_REG_STATUS3);
alarms <<= 8;
alarms |= adm1026_read_value(client, ADM1026_REG_STATUS2);
alarms <<= 8;
alarms |= adm1026_read_value(client, ADM1026_REG_STATUS1);
data->alarms = alarms;
/* Read the GPIO values */
gpio |= adm1026_read_value(client,
ADM1026_REG_GPIO_STATUS_8_15);
gpio <<= 8;
gpio |= adm1026_read_value(client,
ADM1026_REG_GPIO_STATUS_0_7);
data->gpio = gpio;
data->last_reading = jiffies;
} /* last_reading */
if (!data->valid ||
time_after(jiffies, data->last_config + ADM1026_CONFIG_INTERVAL)) {
/* Things that don't change often */
dev_dbg(&client->dev, "Reading config values\n");
for (i = 0; i <= 16; ++i) {
data->in_min[i] = adm1026_read_value(client,
ADM1026_REG_IN_MIN[i]);
data->in_max[i] = adm1026_read_value(client,
ADM1026_REG_IN_MAX[i]);
}
value = adm1026_read_value(client, ADM1026_REG_FAN_DIV_0_3)
| (adm1026_read_value(client, ADM1026_REG_FAN_DIV_4_7)
<< 8);
for (i = 0; i <= 7; ++i) {
data->fan_min[i] = adm1026_read_value(client,
ADM1026_REG_FAN_MIN(i));
data->fan_div[i] = DIV_FROM_REG(value & 0x03);
value >>= 2;
}
for (i = 0; i <= 2; ++i) {
/*
* NOTE: temp_xxx[] are s8 and we assume 2's
* complement "conversion" in the assignment
*/
data->temp_min[i] = adm1026_read_value(client,
ADM1026_REG_TEMP_MIN[i]);
data->temp_max[i] = adm1026_read_value(client,
ADM1026_REG_TEMP_MAX[i]);
data->temp_tmin[i] = adm1026_read_value(client,
ADM1026_REG_TEMP_TMIN[i]);
data->temp_crit[i] = adm1026_read_value(client,
ADM1026_REG_TEMP_THERM[i]);
data->temp_offset[i] = adm1026_read_value(client,
ADM1026_REG_TEMP_OFFSET[i]);
}
/* Read the STATUS/alarm masks */
alarms = adm1026_read_value(client, ADM1026_REG_MASK4);
gpio = alarms & 0x80 ? 0x0100 : 0; /* GPIO16 */
alarms = (alarms & 0x7f) << 8;
alarms |= adm1026_read_value(client, ADM1026_REG_MASK3);
alarms <<= 8;
alarms |= adm1026_read_value(client, ADM1026_REG_MASK2);
alarms <<= 8;
alarms |= adm1026_read_value(client, ADM1026_REG_MASK1);
data->alarm_mask = alarms;
/* Read the GPIO values */
gpio |= adm1026_read_value(client,
ADM1026_REG_GPIO_MASK_8_15);
gpio <<= 8;
gpio |= adm1026_read_value(client, ADM1026_REG_GPIO_MASK_0_7);
data->gpio_mask = gpio;
/* Read various values from CONFIG1 */
data->config1 = adm1026_read_value(client,
ADM1026_REG_CONFIG1);
if (data->config1 & CFG1_PWM_AFC) {
data->pwm1.enable = 2;
data->pwm1.auto_pwm_min =
PWM_MIN_FROM_REG(data->pwm1.pwm);
}
/* Read the GPIO config */
data->config2 = adm1026_read_value(client,
ADM1026_REG_CONFIG2);
data->config3 = adm1026_read_value(client,
ADM1026_REG_CONFIG3);
data->gpio_config[16] = (data->config3 >> 6) & 0x03;
value = 0;
for (i = 0; i <= 15; ++i) {
if ((i & 0x03) == 0) {
value = adm1026_read_value(client,
ADM1026_REG_GPIO_CFG_0_3 + i/4);
}
data->gpio_config[i] = value & 0x03;
value >>= 2;
}
data->last_config = jiffies;
} /* last_config */
data->valid = true;
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t in_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(nr, data->in[nr]));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(nr, data->in_min[nr]));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = INS_TO_REG(nr, val);
adm1026_write_value(client, ADM1026_REG_IN_MIN[nr], data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(nr, data->in_max[nr]));
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = INS_TO_REG(nr, val);
adm1026_write_value(client, ADM1026_REG_IN_MAX[nr], data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, in, 5);
static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, in, 6);
static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, in, 7);
static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
static SENSOR_DEVICE_ATTR_RO(in8_input, in, 8);
static SENSOR_DEVICE_ATTR_RW(in8_min, in_min, 8);
static SENSOR_DEVICE_ATTR_RW(in8_max, in_max, 8);
static SENSOR_DEVICE_ATTR_RO(in9_input, in, 9);
static SENSOR_DEVICE_ATTR_RW(in9_min, in_min, 9);
static SENSOR_DEVICE_ATTR_RW(in9_max, in_max, 9);
static SENSOR_DEVICE_ATTR_RO(in10_input, in, 10);
static SENSOR_DEVICE_ATTR_RW(in10_min, in_min, 10);
static SENSOR_DEVICE_ATTR_RW(in10_max, in_max, 10);
static SENSOR_DEVICE_ATTR_RO(in11_input, in, 11);
static SENSOR_DEVICE_ATTR_RW(in11_min, in_min, 11);
static SENSOR_DEVICE_ATTR_RW(in11_max, in_max, 11);
static SENSOR_DEVICE_ATTR_RO(in12_input, in, 12);
static SENSOR_DEVICE_ATTR_RW(in12_min, in_min, 12);
static SENSOR_DEVICE_ATTR_RW(in12_max, in_max, 12);
static SENSOR_DEVICE_ATTR_RO(in13_input, in, 13);
static SENSOR_DEVICE_ATTR_RW(in13_min, in_min, 13);
static SENSOR_DEVICE_ATTR_RW(in13_max, in_max, 13);
static SENSOR_DEVICE_ATTR_RO(in14_input, in, 14);
static SENSOR_DEVICE_ATTR_RW(in14_min, in_min, 14);
static SENSOR_DEVICE_ATTR_RW(in14_max, in_max, 14);
static SENSOR_DEVICE_ATTR_RO(in15_input, in, 15);
static SENSOR_DEVICE_ATTR_RW(in15_min, in_min, 15);
static SENSOR_DEVICE_ATTR_RW(in15_max, in_max, 15);
static ssize_t in16_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(16, data->in[16]) -
NEG12_OFFSET);
}
static ssize_t in16_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(16, data->in_min[16])
- NEG12_OFFSET);
}
static ssize_t in16_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[16] = INS_TO_REG(16,
clamp_val(val, INT_MIN,
INT_MAX - NEG12_OFFSET) +
NEG12_OFFSET);
adm1026_write_value(client, ADM1026_REG_IN_MIN[16], data->in_min[16]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in16_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", INS_FROM_REG(16, data->in_max[16])
- NEG12_OFFSET);
}
static ssize_t in16_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[16] = INS_TO_REG(16,
clamp_val(val, INT_MIN,
INT_MAX - NEG12_OFFSET) +
NEG12_OFFSET);
adm1026_write_value(client, ADM1026_REG_IN_MAX[16], data->in_max[16]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in16_input, in16, 16);
static SENSOR_DEVICE_ATTR_RW(in16_min, in16_min, 16);
static SENSOR_DEVICE_ATTR_RW(in16_max, in16_max, 16);
/* Now add fan read/write functions */
static ssize_t fan_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
data->fan_div[nr]));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
data->fan_div[nr]));
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, data->fan_div[nr]);
adm1026_write_value(client, ADM1026_REG_FAN_MIN(nr),
data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RO(fan3_input, fan, 2);
static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
static SENSOR_DEVICE_ATTR_RO(fan4_input, fan, 3);
static SENSOR_DEVICE_ATTR_RW(fan4_min, fan_min, 3);
static SENSOR_DEVICE_ATTR_RO(fan5_input, fan, 4);
static SENSOR_DEVICE_ATTR_RW(fan5_min, fan_min, 4);
static SENSOR_DEVICE_ATTR_RO(fan6_input, fan, 5);
static SENSOR_DEVICE_ATTR_RW(fan6_min, fan_min, 5);
static SENSOR_DEVICE_ATTR_RO(fan7_input, fan, 6);
static SENSOR_DEVICE_ATTR_RW(fan7_min, fan_min, 6);
static SENSOR_DEVICE_ATTR_RO(fan8_input, fan, 7);
static SENSOR_DEVICE_ATTR_RW(fan8_min, fan_min, 7);
/* Adjust fan_min to account for new fan divisor */
static void fixup_fan_min(struct device *dev, int fan, int old_div)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int new_min;
int new_div = data->fan_div[fan];
/* 0 and 0xff are special. Don't adjust them */
if (data->fan_min[fan] == 0 || data->fan_min[fan] == 0xff)
return;
new_min = data->fan_min[fan] * old_div / new_div;
new_min = clamp_val(new_min, 1, 254);
data->fan_min[fan] = new_min;
adm1026_write_value(client, ADM1026_REG_FAN_MIN(fan), new_min);
}
/* Now add fan_div read/write functions */
static ssize_t fan_div_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", data->fan_div[nr]);
}
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int orig_div, new_div;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
new_div = DIV_TO_REG(val);
mutex_lock(&data->update_lock);
orig_div = data->fan_div[nr];
data->fan_div[nr] = DIV_FROM_REG(new_div);
if (nr < 4) { /* 0 <= nr < 4 */
adm1026_write_value(client, ADM1026_REG_FAN_DIV_0_3,
(DIV_TO_REG(data->fan_div[0]) << 0) |
(DIV_TO_REG(data->fan_div[1]) << 2) |
(DIV_TO_REG(data->fan_div[2]) << 4) |
(DIV_TO_REG(data->fan_div[3]) << 6));
} else { /* 3 < nr < 8 */
adm1026_write_value(client, ADM1026_REG_FAN_DIV_4_7,
(DIV_TO_REG(data->fan_div[4]) << 0) |
(DIV_TO_REG(data->fan_div[5]) << 2) |
(DIV_TO_REG(data->fan_div[6]) << 4) |
(DIV_TO_REG(data->fan_div[7]) << 6));
}
if (data->fan_div[nr] != orig_div)
fixup_fan_min(dev, nr, orig_div);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static SENSOR_DEVICE_ATTR_RW(fan3_div, fan_div, 2);
static SENSOR_DEVICE_ATTR_RW(fan4_div, fan_div, 3);
static SENSOR_DEVICE_ATTR_RW(fan5_div, fan_div, 4);
static SENSOR_DEVICE_ATTR_RW(fan6_div, fan_div, 5);
static SENSOR_DEVICE_ATTR_RW(fan7_div, fan_div, 6);
static SENSOR_DEVICE_ATTR_RW(fan8_div, fan_div, 7);
/* Temps */
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
}
static ssize_t temp_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_min[nr]));
}
static ssize_t temp_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_min[nr] = TEMP_TO_REG(val);
adm1026_write_value(client, ADM1026_REG_TEMP_MIN[nr],
data->temp_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[nr]));
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_max[nr] = TEMP_TO_REG(val);
adm1026_write_value(client, ADM1026_REG_TEMP_MAX[nr],
data->temp_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
static ssize_t temp_offset_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_offset[nr]));
}
static ssize_t temp_offset_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_offset[nr] = TEMP_TO_REG(val);
adm1026_write_value(client, ADM1026_REG_TEMP_OFFSET[nr],
data->temp_offset[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_offset, temp_offset, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_offset, temp_offset, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_offset, temp_offset, 2);
static ssize_t temp_auto_point1_temp_hyst_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(
ADM1026_FAN_ACTIVATION_TEMP_HYST + data->temp_tmin[nr]));
}
static ssize_t temp_auto_point2_temp_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_tmin[nr] +
ADM1026_FAN_CONTROL_TEMP_RANGE));
}
static ssize_t temp_auto_point1_temp_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_tmin[nr]));
}
static ssize_t temp_auto_point1_temp_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_tmin[nr] = TEMP_TO_REG(val);
adm1026_write_value(client, ADM1026_REG_TEMP_TMIN[nr],
data->temp_tmin[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_auto_point1_temp, temp_auto_point1_temp, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_auto_point1_temp_hyst,
temp_auto_point1_temp_hyst, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_auto_point2_temp, temp_auto_point2_temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_auto_point1_temp, temp_auto_point1_temp, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_auto_point1_temp_hyst,
temp_auto_point1_temp_hyst, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_auto_point2_temp, temp_auto_point2_temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_auto_point1_temp, temp_auto_point1_temp, 2);
static SENSOR_DEVICE_ATTR_RO(temp3_auto_point1_temp_hyst,
temp_auto_point1_temp_hyst, 2);
static SENSOR_DEVICE_ATTR_RO(temp3_auto_point2_temp, temp_auto_point2_temp, 2);
static ssize_t show_temp_crit_enable(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", (data->config1 & CFG1_THERM_HOT) >> 4);
}
static ssize_t set_temp_crit_enable(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->config1 = (data->config1 & ~CFG1_THERM_HOT) | (val << 4);
adm1026_write_value(client, ADM1026_REG_CONFIG1, data->config1);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR(temp1_crit_enable, 0644, show_temp_crit_enable,
set_temp_crit_enable);
static DEVICE_ATTR(temp2_crit_enable, 0644, show_temp_crit_enable,
set_temp_crit_enable);
static DEVICE_ATTR(temp3_crit_enable, 0644, show_temp_crit_enable,
set_temp_crit_enable);
static ssize_t temp_crit_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_crit[nr]));
}
static ssize_t temp_crit_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_crit[nr] = TEMP_TO_REG(val);
adm1026_write_value(client, ADM1026_REG_TEMP_THERM[nr],
data->temp_crit[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(temp1_crit, temp_crit, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_crit, temp_crit, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_crit, temp_crit, 2);
static ssize_t analog_out_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", DAC_FROM_REG(data->analog_out));
}
static ssize_t analog_out_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->analog_out = DAC_TO_REG(val);
adm1026_write_value(client, ADM1026_REG_DAC, data->analog_out);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(analog_out);
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
int vid = (data->gpio >> 11) & 0x1f;
dev_dbg(dev, "Setting VID from GPIO11-15.\n");
return sprintf(buf, "%d\n", vid_from_reg(vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%ld\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%ld\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in9_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in11_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in12_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in13_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(in14_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(in15_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(in16_alarm, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 9);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 10);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 12);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 13);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 14);
static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 15);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 16);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 17);
static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 18);
static SENSOR_DEVICE_ATTR_RO(fan4_alarm, alarm, 19);
static SENSOR_DEVICE_ATTR_RO(fan5_alarm, alarm, 20);
static SENSOR_DEVICE_ATTR_RO(fan6_alarm, alarm, 21);
static SENSOR_DEVICE_ATTR_RO(fan7_alarm, alarm, 22);
static SENSOR_DEVICE_ATTR_RO(fan8_alarm, alarm, 23);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 24);
static SENSOR_DEVICE_ATTR_RO(in10_alarm, alarm, 25);
static SENSOR_DEVICE_ATTR_RO(in8_alarm, alarm, 26);
static ssize_t alarm_mask_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%ld\n", data->alarm_mask);
}
static ssize_t alarm_mask_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long mask;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->alarm_mask = val & 0x7fffffff;
mask = data->alarm_mask
| (data->gpio_mask & 0x10000 ? 0x80000000 : 0);
adm1026_write_value(client, ADM1026_REG_MASK1,
mask & 0xff);
mask >>= 8;
adm1026_write_value(client, ADM1026_REG_MASK2,
mask & 0xff);
mask >>= 8;
adm1026_write_value(client, ADM1026_REG_MASK3,
mask & 0xff);
mask >>= 8;
adm1026_write_value(client, ADM1026_REG_MASK4,
mask & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(alarm_mask);
static ssize_t gpio_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%ld\n", data->gpio);
}
static ssize_t gpio_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long gpio;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->gpio = val & 0x1ffff;
gpio = data->gpio;
adm1026_write_value(client, ADM1026_REG_GPIO_STATUS_0_7, gpio & 0xff);
gpio >>= 8;
adm1026_write_value(client, ADM1026_REG_GPIO_STATUS_8_15, gpio & 0xff);
gpio = ((gpio >> 1) & 0x80) | (data->alarms >> 24 & 0x7f);
adm1026_write_value(client, ADM1026_REG_STATUS4, gpio & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(gpio);
static ssize_t gpio_mask_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%ld\n", data->gpio_mask);
}
static ssize_t gpio_mask_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long mask;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->gpio_mask = val & 0x1ffff;
mask = data->gpio_mask;
adm1026_write_value(client, ADM1026_REG_GPIO_MASK_0_7, mask & 0xff);
mask >>= 8;
adm1026_write_value(client, ADM1026_REG_GPIO_MASK_8_15, mask & 0xff);
mask = ((mask >> 1) & 0x80) | (data->alarm_mask >> 24 & 0x7f);
adm1026_write_value(client, ADM1026_REG_MASK1, mask & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(gpio_mask);
static ssize_t pwm1_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", PWM_FROM_REG(data->pwm1.pwm));
}
static ssize_t pwm1_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
if (data->pwm1.enable == 1) {
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm1.pwm = PWM_TO_REG(val);
adm1026_write_value(client, ADM1026_REG_PWM, data->pwm1.pwm);
mutex_unlock(&data->update_lock);
}
return count;
}
static ssize_t temp1_auto_point1_pwm_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", data->pwm1.auto_pwm_min);
}
static ssize_t temp1_auto_point1_pwm_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm1.auto_pwm_min = clamp_val(val, 0, 255);
if (data->pwm1.enable == 2) { /* apply immediately */
data->pwm1.pwm = PWM_TO_REG((data->pwm1.pwm & 0x0f) |
PWM_MIN_TO_REG(data->pwm1.auto_pwm_min));
adm1026_write_value(client, ADM1026_REG_PWM, data->pwm1.pwm);
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp1_auto_point2_pwm_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%d\n", ADM1026_PWM_MAX);
}
static ssize_t pwm1_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm1026_data *data = adm1026_update_device(dev);
return sprintf(buf, "%d\n", data->pwm1.enable);
}
static ssize_t pwm1_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm1026_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int old_enable;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val >= 3)
return -EINVAL;
mutex_lock(&data->update_lock);
old_enable = data->pwm1.enable;
data->pwm1.enable = val;
data->config1 = (data->config1 & ~CFG1_PWM_AFC)
| ((val == 2) ? CFG1_PWM_AFC : 0);
adm1026_write_value(client, ADM1026_REG_CONFIG1, data->config1);
if (val == 2) { /* apply pwm1_auto_pwm_min to pwm1 */
data->pwm1.pwm = PWM_TO_REG((data->pwm1.pwm & 0x0f) |
PWM_MIN_TO_REG(data->pwm1.auto_pwm_min));
adm1026_write_value(client, ADM1026_REG_PWM, data->pwm1.pwm);
} else if (!((old_enable == 1) && (val == 1))) {
/* set pwm to safe value */
data->pwm1.pwm = 255;
adm1026_write_value(client, ADM1026_REG_PWM, data->pwm1.pwm);
}
mutex_unlock(&data->update_lock);
return count;
}
/* enable PWM fan control */
static DEVICE_ATTR_RW(pwm1);
static DEVICE_ATTR(pwm2, 0644, pwm1_show, pwm1_store);
static DEVICE_ATTR(pwm3, 0644, pwm1_show, pwm1_store);
static DEVICE_ATTR_RW(pwm1_enable);
static DEVICE_ATTR(pwm2_enable, 0644, pwm1_enable_show,
pwm1_enable_store);
static DEVICE_ATTR(pwm3_enable, 0644, pwm1_enable_show,
pwm1_enable_store);
static DEVICE_ATTR_RW(temp1_auto_point1_pwm);
static DEVICE_ATTR(temp2_auto_point1_pwm, 0644,
temp1_auto_point1_pwm_show, temp1_auto_point1_pwm_store);
static DEVICE_ATTR(temp3_auto_point1_pwm, 0644,
temp1_auto_point1_pwm_show, temp1_auto_point1_pwm_store);
static DEVICE_ATTR_RO(temp1_auto_point2_pwm);
static DEVICE_ATTR(temp2_auto_point2_pwm, 0444, temp1_auto_point2_pwm_show,
NULL);
static DEVICE_ATTR(temp3_auto_point2_pwm, 0444, temp1_auto_point2_pwm_show,
NULL);
static struct attribute *adm1026_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
&sensor_dev_attr_in10_input.dev_attr.attr,
&sensor_dev_attr_in10_max.dev_attr.attr,
&sensor_dev_attr_in10_min.dev_attr.attr,
&sensor_dev_attr_in10_alarm.dev_attr.attr,
&sensor_dev_attr_in11_input.dev_attr.attr,
&sensor_dev_attr_in11_max.dev_attr.attr,
&sensor_dev_attr_in11_min.dev_attr.attr,
&sensor_dev_attr_in11_alarm.dev_attr.attr,
&sensor_dev_attr_in12_input.dev_attr.attr,
&sensor_dev_attr_in12_max.dev_attr.attr,
&sensor_dev_attr_in12_min.dev_attr.attr,
&sensor_dev_attr_in12_alarm.dev_attr.attr,
&sensor_dev_attr_in13_input.dev_attr.attr,
&sensor_dev_attr_in13_max.dev_attr.attr,
&sensor_dev_attr_in13_min.dev_attr.attr,
&sensor_dev_attr_in13_alarm.dev_attr.attr,
&sensor_dev_attr_in14_input.dev_attr.attr,
&sensor_dev_attr_in14_max.dev_attr.attr,
&sensor_dev_attr_in14_min.dev_attr.attr,
&sensor_dev_attr_in14_alarm.dev_attr.attr,
&sensor_dev_attr_in15_input.dev_attr.attr,
&sensor_dev_attr_in15_max.dev_attr.attr,
&sensor_dev_attr_in15_min.dev_attr.attr,
&sensor_dev_attr_in15_alarm.dev_attr.attr,
&sensor_dev_attr_in16_input.dev_attr.attr,
&sensor_dev_attr_in16_max.dev_attr.attr,
&sensor_dev_attr_in16_min.dev_attr.attr,
&sensor_dev_attr_in16_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_div.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan4_div.dev_attr.attr,
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan4_alarm.dev_attr.attr,
&sensor_dev_attr_fan5_input.dev_attr.attr,
&sensor_dev_attr_fan5_div.dev_attr.attr,
&sensor_dev_attr_fan5_min.dev_attr.attr,
&sensor_dev_attr_fan5_alarm.dev_attr.attr,
&sensor_dev_attr_fan6_input.dev_attr.attr,
&sensor_dev_attr_fan6_div.dev_attr.attr,
&sensor_dev_attr_fan6_min.dev_attr.attr,
&sensor_dev_attr_fan6_alarm.dev_attr.attr,
&sensor_dev_attr_fan7_input.dev_attr.attr,
&sensor_dev_attr_fan7_div.dev_attr.attr,
&sensor_dev_attr_fan7_min.dev_attr.attr,
&sensor_dev_attr_fan7_alarm.dev_attr.attr,
&sensor_dev_attr_fan8_input.dev_attr.attr,
&sensor_dev_attr_fan8_div.dev_attr.attr,
&sensor_dev_attr_fan8_min.dev_attr.attr,
&sensor_dev_attr_fan8_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_offset.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&dev_attr_temp1_crit_enable.attr,
&dev_attr_temp2_crit_enable.attr,
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
&dev_attr_alarms.attr,
&dev_attr_alarm_mask.attr,
&dev_attr_gpio.attr,
&dev_attr_gpio_mask.attr,
&dev_attr_pwm1.attr,
&dev_attr_pwm2.attr,
&dev_attr_pwm3.attr,
&dev_attr_pwm1_enable.attr,
&dev_attr_pwm2_enable.attr,
&dev_attr_pwm3_enable.attr,
&dev_attr_temp1_auto_point1_pwm.attr,
&dev_attr_temp2_auto_point1_pwm.attr,
&dev_attr_temp1_auto_point2_pwm.attr,
&dev_attr_temp2_auto_point2_pwm.attr,
&dev_attr_analog_out.attr,
NULL
};
static const struct attribute_group adm1026_group = {
.attrs = adm1026_attributes,
};
static struct attribute *adm1026_attributes_temp3[] = {
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
&sensor_dev_attr_temp3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp3_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp3_crit.dev_attr.attr,
&dev_attr_temp3_crit_enable.attr,
&dev_attr_temp3_auto_point1_pwm.attr,
&dev_attr_temp3_auto_point2_pwm.attr,
NULL
};
static const struct attribute_group adm1026_group_temp3 = {
.attrs = adm1026_attributes_temp3,
};
static struct attribute *adm1026_attributes_in8_9[] = {
&sensor_dev_attr_in8_input.dev_attr.attr,
&sensor_dev_attr_in8_max.dev_attr.attr,
&sensor_dev_attr_in8_min.dev_attr.attr,
&sensor_dev_attr_in8_alarm.dev_attr.attr,
&sensor_dev_attr_in9_input.dev_attr.attr,
&sensor_dev_attr_in9_max.dev_attr.attr,
&sensor_dev_attr_in9_min.dev_attr.attr,
&sensor_dev_attr_in9_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group adm1026_group_in8_9 = {
.attrs = adm1026_attributes_in8_9,
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int adm1026_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int address = client->addr;
int company, verstep;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
/* We need to be able to do byte I/O */
return -ENODEV;
}
/* Now, we do the remaining detection. */
company = adm1026_read_value(client, ADM1026_REG_COMPANY);
verstep = adm1026_read_value(client, ADM1026_REG_VERSTEP);
dev_dbg(&adapter->dev,
"Detecting device at %d,0x%02x with COMPANY: 0x%02x and VERSTEP: 0x%02x\n",
i2c_adapter_id(client->adapter), client->addr,
company, verstep);
/* Determine the chip type. */
dev_dbg(&adapter->dev, "Autodetecting device at %d,0x%02x...\n",
i2c_adapter_id(adapter), address);
if (company == ADM1026_COMPANY_ANALOG_DEV
&& verstep == ADM1026_VERSTEP_ADM1026) {
/* Analog Devices ADM1026 */
} else if (company == ADM1026_COMPANY_ANALOG_DEV
&& (verstep & 0xf0) == ADM1026_VERSTEP_GENERIC) {
dev_err(&adapter->dev,
"Unrecognized stepping 0x%02x. Defaulting to ADM1026.\n",
verstep);
} else if ((verstep & 0xf0) == ADM1026_VERSTEP_GENERIC) {
dev_err(&adapter->dev,
"Found version/stepping 0x%02x. Assuming generic ADM1026.\n",
verstep);
} else {
dev_dbg(&adapter->dev, "Autodetection failed\n");
/* Not an ADM1026... */
return -ENODEV;
}
strscpy(info->type, "adm1026", I2C_NAME_SIZE);
return 0;
}
static void adm1026_print_gpio(struct i2c_client *client)
{
struct adm1026_data *data = i2c_get_clientdata(client);
int i;
dev_dbg(&client->dev, "GPIO config is:\n");
for (i = 0; i <= 7; ++i) {
if (data->config2 & (1 << i)) {
dev_dbg(&client->dev, "\t%sGP%s%d\n",
data->gpio_config[i] & 0x02 ? "" : "!",
data->gpio_config[i] & 0x01 ? "OUT" : "IN",
i);
} else {
dev_dbg(&client->dev, "\tFAN%d\n", i);
}
}
for (i = 8; i <= 15; ++i) {
dev_dbg(&client->dev, "\t%sGP%s%d\n",
data->gpio_config[i] & 0x02 ? "" : "!",
data->gpio_config[i] & 0x01 ? "OUT" : "IN",
i);
}
if (data->config3 & CFG3_GPIO16_ENABLE) {
dev_dbg(&client->dev, "\t%sGP%s16\n",
data->gpio_config[16] & 0x02 ? "" : "!",
data->gpio_config[16] & 0x01 ? "OUT" : "IN");
} else {
/* GPIO16 is THERM */
dev_dbg(&client->dev, "\tTHERM\n");
}
}
static void adm1026_fixup_gpio(struct i2c_client *client)
{
struct adm1026_data *data = i2c_get_clientdata(client);
int i;
int value;
/* Make the changes requested. */
/*
* We may need to unlock/stop monitoring or soft-reset the
* chip before we can make changes. This hasn't been
* tested much. FIXME
*/
/* Make outputs */
for (i = 0; i <= 16; ++i) {
if (gpio_output[i] >= 0 && gpio_output[i] <= 16)
data->gpio_config[gpio_output[i]] |= 0x01;
/* if GPIO0-7 is output, it isn't a FAN tach */
if (gpio_output[i] >= 0 && gpio_output[i] <= 7)
data->config2 |= 1 << gpio_output[i];
}
/* Input overrides output */
for (i = 0; i <= 16; ++i) {
if (gpio_input[i] >= 0 && gpio_input[i] <= 16)
data->gpio_config[gpio_input[i]] &= ~0x01;
/* if GPIO0-7 is input, it isn't a FAN tach */
if (gpio_input[i] >= 0 && gpio_input[i] <= 7)
data->config2 |= 1 << gpio_input[i];
}
/* Inverted */
for (i = 0; i <= 16; ++i) {
if (gpio_inverted[i] >= 0 && gpio_inverted[i] <= 16)
data->gpio_config[gpio_inverted[i]] &= ~0x02;
}
/* Normal overrides inverted */
for (i = 0; i <= 16; ++i) {
if (gpio_normal[i] >= 0 && gpio_normal[i] <= 16)
data->gpio_config[gpio_normal[i]] |= 0x02;
}
/* Fan overrides input and output */
for (i = 0; i <= 7; ++i) {
if (gpio_fan[i] >= 0 && gpio_fan[i] <= 7)
data->config2 &= ~(1 << gpio_fan[i]);
}
/* Write new configs to registers */
adm1026_write_value(client, ADM1026_REG_CONFIG2, data->config2);
data->config3 = (data->config3 & 0x3f)
| ((data->gpio_config[16] & 0x03) << 6);
adm1026_write_value(client, ADM1026_REG_CONFIG3, data->config3);
for (i = 15, value = 0; i >= 0; --i) {
value <<= 2;
value |= data->gpio_config[i] & 0x03;
if ((i & 0x03) == 0) {
adm1026_write_value(client,
ADM1026_REG_GPIO_CFG_0_3 + i/4,
value);
value = 0;
}
}
/* Print the new config */
adm1026_print_gpio(client);
}
static void adm1026_init_client(struct i2c_client *client)
{
int value, i;
struct adm1026_data *data = i2c_get_clientdata(client);
dev_dbg(&client->dev, "Initializing device\n");
/* Read chip config */
data->config1 = adm1026_read_value(client, ADM1026_REG_CONFIG1);
data->config2 = adm1026_read_value(client, ADM1026_REG_CONFIG2);
data->config3 = adm1026_read_value(client, ADM1026_REG_CONFIG3);
/* Inform user of chip config */
dev_dbg(&client->dev, "ADM1026_REG_CONFIG1 is: 0x%02x\n",
data->config1);
if ((data->config1 & CFG1_MONITOR) == 0) {
dev_dbg(&client->dev,
"Monitoring not currently enabled.\n");
}
if (data->config1 & CFG1_INT_ENABLE) {
dev_dbg(&client->dev,
"SMBALERT interrupts are enabled.\n");
}
if (data->config1 & CFG1_AIN8_9) {
dev_dbg(&client->dev,
"in8 and in9 enabled. temp3 disabled.\n");
} else {
dev_dbg(&client->dev,
"temp3 enabled. in8 and in9 disabled.\n");
}
if (data->config1 & CFG1_THERM_HOT) {
dev_dbg(&client->dev,
"Automatic THERM, PWM, and temp limits enabled.\n");
}
if (data->config3 & CFG3_GPIO16_ENABLE) {
dev_dbg(&client->dev,
"GPIO16 enabled. THERM pin disabled.\n");
} else {
dev_dbg(&client->dev,
"THERM pin enabled. GPIO16 disabled.\n");
}
if (data->config3 & CFG3_VREF_250)
dev_dbg(&client->dev, "Vref is 2.50 Volts.\n");
else
dev_dbg(&client->dev, "Vref is 1.82 Volts.\n");
/* Read and pick apart the existing GPIO configuration */
value = 0;
for (i = 0; i <= 15; ++i) {
if ((i & 0x03) == 0) {
value = adm1026_read_value(client,
ADM1026_REG_GPIO_CFG_0_3 + i / 4);
}
data->gpio_config[i] = value & 0x03;
value >>= 2;
}
data->gpio_config[16] = (data->config3 >> 6) & 0x03;
/* ... and then print it */
adm1026_print_gpio(client);
/*
* If the user asks us to reprogram the GPIO config, then
* do it now.
*/
if (gpio_input[0] != -1 || gpio_output[0] != -1
|| gpio_inverted[0] != -1 || gpio_normal[0] != -1
|| gpio_fan[0] != -1) {
adm1026_fixup_gpio(client);
}
/*
* WE INTENTIONALLY make no changes to the limits,
* offsets, pwms, fans and zones. If they were
* configured, we don't want to mess with them.
* If they weren't, the default is 100% PWM, no
* control and will suffice until 'sensors -s'
* can be run by the user. We DO set the default
* value for pwm1.auto_pwm_min to its maximum
* so that enabling automatic pwm fan control
* without first setting a value for pwm1.auto_pwm_min
* will not result in potentially dangerous fan speed decrease.
*/
data->pwm1.auto_pwm_min = 255;
/* Start monitoring */
value = adm1026_read_value(client, ADM1026_REG_CONFIG1);
/* Set MONITOR, clear interrupt acknowledge and s/w reset */
value = (value | CFG1_MONITOR) & (~CFG1_INT_CLEAR & ~CFG1_RESET);
dev_dbg(&client->dev, "Setting CONFIG to: 0x%02x\n", value);
data->config1 = value;
adm1026_write_value(client, ADM1026_REG_CONFIG1, value);
/* initialize fan_div[] to hardware defaults */
value = adm1026_read_value(client, ADM1026_REG_FAN_DIV_0_3) |
(adm1026_read_value(client, ADM1026_REG_FAN_DIV_4_7) << 8);
for (i = 0; i <= 7; ++i) {
data->fan_div[i] = DIV_FROM_REG(value & 0x03);
value >>= 2;
}
}
static int adm1026_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct adm1026_data *data;
data = devm_kzalloc(dev, sizeof(struct adm1026_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->client = client;
mutex_init(&data->update_lock);
/* Set the VRM version */
data->vrm = vid_which_vrm();
/* Initialize the ADM1026 chip */
adm1026_init_client(client);
/* sysfs hooks */
data->groups[0] = &adm1026_group;
if (data->config1 & CFG1_AIN8_9)
data->groups[1] = &adm1026_group_in8_9;
else
data->groups[1] = &adm1026_group_temp3;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id adm1026_id[] = {
{ "adm1026", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adm1026_id);
static struct i2c_driver adm1026_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1026",
},
.probe = adm1026_probe,
.id_table = adm1026_id,
.detect = adm1026_detect,
.address_list = normal_i2c,
};
module_i2c_driver(adm1026_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Philip Pokorny <[email protected]>, "
"Justin Thiessen <[email protected]>");
MODULE_DESCRIPTION("ADM1026 driver");
|
linux-master
|
drivers/hwmon/adm1026.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* INA3221 Triple Current/Voltage Monitor
*
* Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
* Andrew F. Davis <[email protected]>
*/
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/util_macros.h>
#define INA3221_DRIVER_NAME "ina3221"
#define INA3221_CONFIG 0x00
#define INA3221_SHUNT1 0x01
#define INA3221_BUS1 0x02
#define INA3221_SHUNT2 0x03
#define INA3221_BUS2 0x04
#define INA3221_SHUNT3 0x05
#define INA3221_BUS3 0x06
#define INA3221_CRIT1 0x07
#define INA3221_WARN1 0x08
#define INA3221_CRIT2 0x09
#define INA3221_WARN2 0x0a
#define INA3221_CRIT3 0x0b
#define INA3221_WARN3 0x0c
#define INA3221_SHUNT_SUM 0x0d
#define INA3221_CRIT_SUM 0x0e
#define INA3221_MASK_ENABLE 0x0f
#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0)
#define INA3221_CONFIG_MODE_POWERDOWN 0
#define INA3221_CONFIG_MODE_SHUNT BIT(0)
#define INA3221_CONFIG_MODE_BUS BIT(1)
#define INA3221_CONFIG_MODE_CONTINUOUS BIT(2)
#define INA3221_CONFIG_VSH_CT_SHIFT 3
#define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3)
#define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3)
#define INA3221_CONFIG_VBUS_CT_SHIFT 6
#define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6)
#define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6)
#define INA3221_CONFIG_AVG_SHIFT 9
#define INA3221_CONFIG_AVG_MASK GENMASK(11, 9)
#define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9)
#define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12)
#define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x))
#define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12)
#define INA3221_CONFIG_DEFAULT 0x7127
#define INA3221_RSHUNT_DEFAULT 10000
enum ina3221_fields {
/* Configuration */
F_RST,
/* Status Flags */
F_CVRF,
/* Warning Flags */
F_WF3, F_WF2, F_WF1,
/* Alert Flags: SF is the summation-alert flag */
F_SF, F_CF3, F_CF2, F_CF1,
/* sentinel */
F_MAX_FIELDS
};
static const struct reg_field ina3221_reg_fields[] = {
[F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
[F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
[F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
[F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
[F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
[F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
[F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
[F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
[F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
};
enum ina3221_channels {
INA3221_CHANNEL1,
INA3221_CHANNEL2,
INA3221_CHANNEL3,
INA3221_NUM_CHANNELS
};
/**
* struct ina3221_input - channel input source specific information
* @label: label of channel input source
* @shunt_resistor: shunt resistor value of channel input source
* @disconnected: connection status of channel input source
*/
struct ina3221_input {
const char *label;
int shunt_resistor;
bool disconnected;
};
/**
* struct ina3221_data - device specific information
* @pm_dev: Device pointer for pm runtime
* @regmap: Register map of the device
* @fields: Register fields of the device
* @inputs: Array of channel input source specific structures
* @lock: mutex lock to serialize sysfs attribute accesses
* @reg_config: Register value of INA3221_CONFIG
* @summation_shunt_resistor: equivalent shunt resistor value for summation
* @single_shot: running in single-shot operating mode
*/
struct ina3221_data {
struct device *pm_dev;
struct regmap *regmap;
struct regmap_field *fields[F_MAX_FIELDS];
struct ina3221_input inputs[INA3221_NUM_CHANNELS];
struct mutex lock;
u32 reg_config;
int summation_shunt_resistor;
bool single_shot;
};
static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
{
/* Summation channel checks shunt resistor values */
if (channel > INA3221_CHANNEL3)
return ina->summation_shunt_resistor != 0;
return pm_runtime_active(ina->pm_dev) &&
(ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
}
/*
* Helper function to return the resistor value for current summation.
*
* There is a condition to calculate current summation -- all the shunt
* resistor values should be the same, so as to simply fit the formula:
* current summation = shunt voltage summation / shunt resistor
*
* Returns the equivalent shunt resistor value on success or 0 on failure
*/
static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
{
struct ina3221_input *input = ina->inputs;
int i, shunt_resistor = 0;
for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
if (input[i].disconnected || !input[i].shunt_resistor)
continue;
if (!shunt_resistor) {
/* Found the reference shunt resistor value */
shunt_resistor = input[i].shunt_resistor;
} else {
/* No summation if resistor values are different */
if (shunt_resistor != input[i].shunt_resistor)
return 0;
}
}
return shunt_resistor;
}
/* Lookup table for Bus and Shunt conversion times in usec */
static const u16 ina3221_conv_time[] = {
140, 204, 332, 588, 1100, 2116, 4156, 8244,
};
/* Lookup table for number of samples using in averaging mode */
static const int ina3221_avg_samples[] = {
1, 4, 16, 64, 128, 256, 512, 1024,
};
/* Converting update_interval in msec to conversion time in usec */
static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
{
u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
u32 samples_idx = INA3221_CONFIG_AVG(config);
u32 samples = ina3221_avg_samples[samples_idx];
/* Bisect the result to Bus and Shunt conversion times */
return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
}
/* Converting CONFIG register value to update_interval in usec */
static inline u32 ina3221_reg_to_interval_us(u16 config)
{
u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
/* Calculate total conversion time */
return channels * (vbus_ct + vsh_ct);
}
static inline int ina3221_wait_for_data(struct ina3221_data *ina)
{
u32 wait, cvrf;
wait = ina3221_reg_to_interval_us(ina->reg_config);
/* Polling the CVRF bit to make sure read data is ready */
return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
cvrf, cvrf, wait, wait * 2);
}
static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
int *val)
{
unsigned int regval;
int ret;
ret = regmap_read(ina->regmap, reg, ®val);
if (ret)
return ret;
/*
* Shunt Voltage Sum register has 14-bit value with 1-bit shift
* Other Shunt Voltage registers have 12 bits with 3-bit shift
*/
if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
*val = sign_extend32(regval >> 1, 14);
else
*val = sign_extend32(regval >> 3, 12);
return 0;
}
static const u8 ina3221_in_reg[] = {
INA3221_BUS1,
INA3221_BUS2,
INA3221_BUS3,
INA3221_SHUNT1,
INA3221_SHUNT2,
INA3221_SHUNT3,
INA3221_SHUNT_SUM,
};
static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
int regval;
switch (attr) {
case hwmon_chip_samples:
regval = INA3221_CONFIG_AVG(ina->reg_config);
*val = ina3221_avg_samples[regval];
return 0;
case hwmon_chip_update_interval:
/* Return in msec */
*val = ina3221_reg_to_interval_us(ina->reg_config);
*val = DIV_ROUND_CLOSEST(*val, 1000);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
{
const bool is_shunt = channel > INA3221_CHANNEL3;
struct ina3221_data *ina = dev_get_drvdata(dev);
u8 reg = ina3221_in_reg[channel];
int regval, ret;
/*
* Translate shunt channel index to sensor channel index except
* the 7th channel (6 since being 0-aligned) is for summation.
*/
if (channel != 6)
channel %= INA3221_NUM_CHANNELS;
switch (attr) {
case hwmon_in_input:
if (!ina3221_is_enabled(ina, channel))
return -ENODATA;
/* Write CONFIG register to trigger a single-shot measurement */
if (ina->single_shot) {
regmap_write(ina->regmap, INA3221_CONFIG,
ina->reg_config);
ret = ina3221_wait_for_data(ina);
if (ret)
return ret;
}
ret = ina3221_read_value(ina, reg, ®val);
if (ret)
return ret;
/*
* Scale of shunt voltage (uV): LSB is 40uV
* Scale of bus voltage (mV): LSB is 8mV
*/
*val = regval * (is_shunt ? 40 : 8);
return 0;
case hwmon_in_enable:
*val = ina3221_is_enabled(ina, channel);
return 0;
default:
return -EOPNOTSUPP;
}
}
static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
[hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
INA3221_SHUNT3, INA3221_SHUNT_SUM },
[hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
[hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
INA3221_CRIT3, INA3221_CRIT_SUM },
[hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
[hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
};
static int ina3221_read_curr(struct device *dev, u32 attr,
int channel, long *val)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
struct ina3221_input *input = ina->inputs;
u8 reg = ina3221_curr_reg[attr][channel];
int resistance_uo, voltage_nv;
int regval, ret;
if (channel > INA3221_CHANNEL3)
resistance_uo = ina->summation_shunt_resistor;
else
resistance_uo = input[channel].shunt_resistor;
switch (attr) {
case hwmon_curr_input:
if (!ina3221_is_enabled(ina, channel))
return -ENODATA;
/* Write CONFIG register to trigger a single-shot measurement */
if (ina->single_shot) {
regmap_write(ina->regmap, INA3221_CONFIG,
ina->reg_config);
ret = ina3221_wait_for_data(ina);
if (ret)
return ret;
}
fallthrough;
case hwmon_curr_crit:
case hwmon_curr_max:
if (!resistance_uo)
return -ENODATA;
ret = ina3221_read_value(ina, reg, ®val);
if (ret)
return ret;
/* Scale of shunt voltage: LSB is 40uV (40000nV) */
voltage_nv = regval * 40000;
/* Return current in mA */
*val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
return 0;
case hwmon_curr_crit_alarm:
case hwmon_curr_max_alarm:
/* No actual register read if channel is disabled */
if (!ina3221_is_enabled(ina, channel)) {
/* Return 0 for alert flags */
*val = 0;
return 0;
}
ret = regmap_field_read(ina->fields[reg], ®val);
if (ret)
return ret;
*val = regval;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int ina3221_write_chip(struct device *dev, u32 attr, long val)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
int ret, idx;
u32 tmp;
switch (attr) {
case hwmon_chip_samples:
idx = find_closest(val, ina3221_avg_samples,
ARRAY_SIZE(ina3221_avg_samples));
tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
(idx << INA3221_CONFIG_AVG_SHIFT);
ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
if (ret)
return ret;
/* Update reg_config accordingly */
ina->reg_config = tmp;
return 0;
case hwmon_chip_update_interval:
tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
idx = find_closest(tmp, ina3221_conv_time,
ARRAY_SIZE(ina3221_conv_time));
/* Update Bus and Shunt voltage conversion times */
tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
tmp = (ina->reg_config & ~tmp) |
(idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
(idx << INA3221_CONFIG_VSH_CT_SHIFT);
ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
if (ret)
return ret;
/* Update reg_config accordingly */
ina->reg_config = tmp;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int ina3221_write_curr(struct device *dev, u32 attr,
int channel, long val)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
struct ina3221_input *input = ina->inputs;
u8 reg = ina3221_curr_reg[attr][channel];
int resistance_uo, current_ma, voltage_uv;
int regval;
if (channel > INA3221_CHANNEL3)
resistance_uo = ina->summation_shunt_resistor;
else
resistance_uo = input[channel].shunt_resistor;
if (!resistance_uo)
return -EOPNOTSUPP;
/* clamp current */
current_ma = clamp_val(val,
INT_MIN / resistance_uo,
INT_MAX / resistance_uo);
voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
/* clamp voltage */
voltage_uv = clamp_val(voltage_uv, -163800, 163800);
/*
* Formula to convert voltage_uv to register value:
* regval = (voltage_uv / scale) << shift
* Note:
* The scale is 40uV for all shunt voltage registers
* Shunt Voltage Sum register left-shifts 1 bit
* All other Shunt Voltage registers shift 3 bits
* Results:
* SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
* SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
*/
if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
else
regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
return regmap_write(ina->regmap, reg, regval);
}
static int ina3221_write_enable(struct device *dev, int channel, bool enable)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
u16 config_old = ina->reg_config & mask;
u32 tmp;
int ret;
config = enable ? mask : 0;
/* Bypass if enable status is not being changed */
if (config_old == config)
return 0;
/* For enabling routine, increase refcount and resume() at first */
if (enable) {
ret = pm_runtime_resume_and_get(ina->pm_dev);
if (ret < 0) {
dev_err(dev, "Failed to get PM runtime\n");
return ret;
}
}
/* Enable or disable the channel */
tmp = (ina->reg_config & ~mask) | (config & mask);
ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
if (ret)
goto fail;
/* Cache the latest config register value */
ina->reg_config = tmp;
/* For disabling routine, decrease refcount or suspend() at last */
if (!enable)
pm_runtime_put_sync(ina->pm_dev);
return 0;
fail:
if (enable) {
dev_err(dev, "Failed to enable channel %d: error %d\n",
channel, ret);
pm_runtime_put_sync(ina->pm_dev);
}
return ret;
}
static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
int ret;
mutex_lock(&ina->lock);
switch (type) {
case hwmon_chip:
ret = ina3221_read_chip(dev, attr, val);
break;
case hwmon_in:
/* 0-align channel ID */
ret = ina3221_read_in(dev, attr, channel - 1, val);
break;
case hwmon_curr:
ret = ina3221_read_curr(dev, attr, channel, val);
break;
default:
ret = -EOPNOTSUPP;
break;
}
mutex_unlock(&ina->lock);
return ret;
}
static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
int ret;
mutex_lock(&ina->lock);
switch (type) {
case hwmon_chip:
ret = ina3221_write_chip(dev, attr, val);
break;
case hwmon_in:
/* 0-align channel ID */
ret = ina3221_write_enable(dev, channel - 1, val);
break;
case hwmon_curr:
ret = ina3221_write_curr(dev, attr, channel, val);
break;
default:
ret = -EOPNOTSUPP;
break;
}
mutex_unlock(&ina->lock);
return ret;
}
static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
int index = channel - 1;
if (channel == 7)
*str = "sum of shunt voltages";
else
*str = ina->inputs[index].label;
return 0;
}
static umode_t ina3221_is_visible(const void *drvdata,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct ina3221_data *ina = drvdata;
const struct ina3221_input *input = NULL;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_samples:
case hwmon_chip_update_interval:
return 0644;
default:
return 0;
}
case hwmon_in:
/* Ignore in0_ */
if (channel == 0)
return 0;
switch (attr) {
case hwmon_in_label:
if (channel - 1 <= INA3221_CHANNEL3)
input = &ina->inputs[channel - 1];
else if (channel == 7)
return 0444;
/* Hide label node if label is not provided */
return (input && input->label) ? 0444 : 0;
case hwmon_in_input:
return 0444;
case hwmon_in_enable:
return 0644;
default:
return 0;
}
case hwmon_curr:
switch (attr) {
case hwmon_curr_input:
case hwmon_curr_crit_alarm:
case hwmon_curr_max_alarm:
return 0444;
case hwmon_curr_crit:
case hwmon_curr_max:
return 0644;
default:
return 0;
}
default:
return 0;
}
}
#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
HWMON_C_MAX | HWMON_C_MAX_ALARM)
static const struct hwmon_channel_info * const ina3221_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_SAMPLES,
HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(in,
/* 0: dummy, skipped in is_visible */
HWMON_I_INPUT,
/* 1-3: input voltage Channels */
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
/* 4-6: shunt voltage Channels */
HWMON_I_INPUT,
HWMON_I_INPUT,
HWMON_I_INPUT,
/* 7: summation of shunt voltage channels */
HWMON_I_INPUT | HWMON_I_LABEL),
HWMON_CHANNEL_INFO(curr,
/* 1-3: current channels*/
INA3221_HWMON_CURR_CONFIG,
INA3221_HWMON_CURR_CONFIG,
INA3221_HWMON_CURR_CONFIG,
/* 4: summation of current channels */
HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
NULL
};
static const struct hwmon_ops ina3221_hwmon_ops = {
.is_visible = ina3221_is_visible,
.read_string = ina3221_read_string,
.read = ina3221_read,
.write = ina3221_write,
};
static const struct hwmon_chip_info ina3221_chip_info = {
.ops = &ina3221_hwmon_ops,
.info = ina3221_info,
};
/* Extra attribute groups */
static ssize_t ina3221_shunt_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
struct ina3221_data *ina = dev_get_drvdata(dev);
unsigned int channel = sd_attr->index;
struct ina3221_input *input = &ina->inputs[channel];
return sysfs_emit(buf, "%d\n", input->shunt_resistor);
}
static ssize_t ina3221_shunt_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
struct ina3221_data *ina = dev_get_drvdata(dev);
unsigned int channel = sd_attr->index;
struct ina3221_input *input = &ina->inputs[channel];
int val;
int ret;
ret = kstrtoint(buf, 0, &val);
if (ret)
return ret;
val = clamp_val(val, 1, INT_MAX);
input->shunt_resistor = val;
/* Update summation_shunt_resistor for summation channel */
ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
return count;
}
/* shunt resistance */
static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
static struct attribute *ina3221_attrs[] = {
&sensor_dev_attr_shunt1_resistor.dev_attr.attr,
&sensor_dev_attr_shunt2_resistor.dev_attr.attr,
&sensor_dev_attr_shunt3_resistor.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(ina3221);
static const struct regmap_range ina3221_yes_ranges[] = {
regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
};
static const struct regmap_access_table ina3221_volatile_table = {
.yes_ranges = ina3221_yes_ranges,
.n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
};
static const struct regmap_config ina3221_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.cache_type = REGCACHE_RBTREE,
.volatile_table = &ina3221_volatile_table,
};
static int ina3221_probe_child_from_dt(struct device *dev,
struct device_node *child,
struct ina3221_data *ina)
{
struct ina3221_input *input;
u32 val;
int ret;
ret = of_property_read_u32(child, "reg", &val);
if (ret) {
dev_err(dev, "missing reg property of %pOFn\n", child);
return ret;
} else if (val > INA3221_CHANNEL3) {
dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
return -EINVAL;
}
input = &ina->inputs[val];
/* Log the disconnected channel input */
if (!of_device_is_available(child)) {
input->disconnected = true;
return 0;
}
/* Save the connected input label if available */
of_property_read_string(child, "label", &input->label);
/* Overwrite default shunt resistor value optionally */
if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
if (val < 1 || val > INT_MAX) {
dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
val, child);
return -EINVAL;
}
input->shunt_resistor = val;
}
return 0;
}
static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
{
const struct device_node *np = dev->of_node;
struct device_node *child;
int ret;
/* Compatible with non-DT platforms */
if (!np)
return 0;
ina->single_shot = of_property_read_bool(np, "ti,single-shot");
for_each_child_of_node(np, child) {
ret = ina3221_probe_child_from_dt(dev, child, ina);
if (ret) {
of_node_put(child);
return ret;
}
}
return 0;
}
static int ina3221_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct ina3221_data *ina;
struct device *hwmon_dev;
int i, ret;
ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
if (!ina)
return -ENOMEM;
ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
if (IS_ERR(ina->regmap)) {
dev_err(dev, "Unable to allocate register map\n");
return PTR_ERR(ina->regmap);
}
for (i = 0; i < F_MAX_FIELDS; i++) {
ina->fields[i] = devm_regmap_field_alloc(dev,
ina->regmap,
ina3221_reg_fields[i]);
if (IS_ERR(ina->fields[i])) {
dev_err(dev, "Unable to allocate regmap fields\n");
return PTR_ERR(ina->fields[i]);
}
}
for (i = 0; i < INA3221_NUM_CHANNELS; i++)
ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
ret = ina3221_probe_from_dt(dev, ina);
if (ret) {
dev_err(dev, "Unable to probe from device tree\n");
return ret;
}
/* The driver will be reset, so use reset value */
ina->reg_config = INA3221_CONFIG_DEFAULT;
/* Clear continuous bit to use single-shot mode */
if (ina->single_shot)
ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
/* Disable channels if their inputs are disconnected */
for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
if (ina->inputs[i].disconnected)
ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
}
/* Initialize summation_shunt_resistor for summation channel control */
ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
ina->pm_dev = dev;
mutex_init(&ina->lock);
dev_set_drvdata(dev, ina);
/* Enable PM runtime -- status is suspended by default */
pm_runtime_enable(ina->pm_dev);
/* Initialize (resume) the device */
for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
if (ina->inputs[i].disconnected)
continue;
/* Match the refcount with number of enabled channels */
ret = pm_runtime_get_sync(ina->pm_dev);
if (ret < 0)
goto fail;
}
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
&ina3221_chip_info,
ina3221_groups);
if (IS_ERR(hwmon_dev)) {
dev_err(dev, "Unable to register hwmon device\n");
ret = PTR_ERR(hwmon_dev);
goto fail;
}
return 0;
fail:
pm_runtime_disable(ina->pm_dev);
pm_runtime_set_suspended(ina->pm_dev);
/* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
for (i = 0; i < INA3221_NUM_CHANNELS; i++)
pm_runtime_put_noidle(ina->pm_dev);
mutex_destroy(&ina->lock);
return ret;
}
static void ina3221_remove(struct i2c_client *client)
{
struct ina3221_data *ina = dev_get_drvdata(&client->dev);
int i;
pm_runtime_disable(ina->pm_dev);
pm_runtime_set_suspended(ina->pm_dev);
/* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
for (i = 0; i < INA3221_NUM_CHANNELS; i++)
pm_runtime_put_noidle(ina->pm_dev);
mutex_destroy(&ina->lock);
}
static int ina3221_suspend(struct device *dev)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
int ret;
/* Save config register value and enable cache-only */
ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
if (ret)
return ret;
/* Set to power-down mode for power saving */
ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
INA3221_CONFIG_MODE_MASK,
INA3221_CONFIG_MODE_POWERDOWN);
if (ret)
return ret;
regcache_cache_only(ina->regmap, true);
regcache_mark_dirty(ina->regmap);
return 0;
}
static int ina3221_resume(struct device *dev)
{
struct ina3221_data *ina = dev_get_drvdata(dev);
int ret;
regcache_cache_only(ina->regmap, false);
/* Software reset the chip */
ret = regmap_field_write(ina->fields[F_RST], true);
if (ret) {
dev_err(dev, "Unable to reset device\n");
return ret;
}
/* Restore cached register values to hardware */
ret = regcache_sync(ina->regmap);
if (ret)
return ret;
/* Restore config register value to hardware */
ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
if (ret)
return ret;
/* Initialize summation channel control */
if (ina->summation_shunt_resistor) {
/*
* Take all three channels into summation by default
* Shunt measurements of disconnected channels should
* be 0, so it does not matter for summation.
*/
ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
INA3221_MASK_ENABLE_SCC_MASK,
INA3221_MASK_ENABLE_SCC_MASK);
if (ret) {
dev_err(dev, "Unable to control summation channel\n");
return ret;
}
}
return 0;
}
static DEFINE_RUNTIME_DEV_PM_OPS(ina3221_pm, ina3221_suspend, ina3221_resume,
NULL);
static const struct of_device_id ina3221_of_match_table[] = {
{ .compatible = "ti,ina3221", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
static const struct i2c_device_id ina3221_ids[] = {
{ "ina3221", 0 },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(i2c, ina3221_ids);
static struct i2c_driver ina3221_i2c_driver = {
.probe = ina3221_probe,
.remove = ina3221_remove,
.driver = {
.name = INA3221_DRIVER_NAME,
.of_match_table = ina3221_of_match_table,
.pm = pm_ptr(&ina3221_pm),
},
.id_table = ina3221_ids,
};
module_i2c_driver(ina3221_i2c_driver);
MODULE_AUTHOR("Andrew F. Davis <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/ina3221.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADT7410/ADT7420 digital temperature sensor driver
*
* Copyright 2012-2013 Analog Devices Inc.
* Author: Lars-Peter Clausen <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include "adt7x10.h"
static bool adt7410_regmap_is_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case ADT7X10_TEMPERATURE:
case ADT7X10_STATUS:
return true;
default:
return false;
}
}
static int adt7410_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct i2c_client *client = context;
int regval;
switch (reg) {
case ADT7X10_TEMPERATURE:
case ADT7X10_T_ALARM_HIGH:
case ADT7X10_T_ALARM_LOW:
case ADT7X10_T_CRIT:
regval = i2c_smbus_read_word_swapped(client, reg);
break;
default:
regval = i2c_smbus_read_byte_data(client, reg);
break;
}
if (regval < 0)
return regval;
*val = regval;
return 0;
}
static int adt7410_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct i2c_client *client = context;
int ret;
switch (reg) {
case ADT7X10_TEMPERATURE:
case ADT7X10_T_ALARM_HIGH:
case ADT7X10_T_ALARM_LOW:
case ADT7X10_T_CRIT:
ret = i2c_smbus_write_word_swapped(client, reg, val);
break;
default:
ret = i2c_smbus_write_byte_data(client, reg, val);
break;
}
return ret;
}
static const struct regmap_config adt7410_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.max_register = ADT7X10_ID,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = adt7410_regmap_is_volatile,
.reg_read = adt7410_reg_read,
.reg_write = adt7410_reg_write,
};
static int adt7410_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
regmap = devm_regmap_init(&client->dev, NULL, client,
&adt7410_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adt7x10_probe(&client->dev, client->name, client->irq, regmap);
}
static const struct i2c_device_id adt7410_ids[] = {
{ "adt7410", 0 },
{ "adt7420", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, adt7410_ids);
static struct i2c_driver adt7410_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adt7410",
.pm = pm_sleep_ptr(&adt7x10_dev_pm_ops),
},
.probe = adt7410_i2c_probe,
.id_table = adt7410_ids,
.address_list = I2C_ADDRS(0x48, 0x49, 0x4a, 0x4b),
};
module_i2c_driver(adt7410_driver);
MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");
MODULE_DESCRIPTION("ADT7410/AD7420 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/adt7410.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for Gateworks System Controller Hardware Monitor module
*
* Copyright (C) 2020 Gateworks Corporation
*/
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/mfd/gsc.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/platform_data/gsc_hwmon.h>
#define GSC_HWMON_MAX_TEMP_CH 16
#define GSC_HWMON_MAX_IN_CH 16
#define GSC_HWMON_MAX_FAN_CH 16
#define GSC_HWMON_RESOLUTION 12
#define GSC_HWMON_VREF 2500
struct gsc_hwmon_data {
struct gsc_dev *gsc;
struct gsc_hwmon_platform_data *pdata;
struct regmap *regmap;
const struct gsc_hwmon_channel *temp_ch[GSC_HWMON_MAX_TEMP_CH];
const struct gsc_hwmon_channel *in_ch[GSC_HWMON_MAX_IN_CH];
const struct gsc_hwmon_channel *fan_ch[GSC_HWMON_MAX_FAN_CH];
u32 temp_config[GSC_HWMON_MAX_TEMP_CH + 1];
u32 in_config[GSC_HWMON_MAX_IN_CH + 1];
u32 fan_config[GSC_HWMON_MAX_FAN_CH + 1];
struct hwmon_channel_info temp_info;
struct hwmon_channel_info in_info;
struct hwmon_channel_info fan_info;
const struct hwmon_channel_info *info[4];
struct hwmon_chip_info chip;
};
static struct regmap_bus gsc_hwmon_regmap_bus = {
.reg_read = gsc_read,
.reg_write = gsc_write,
};
static const struct regmap_config gsc_hwmon_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.cache_type = REGCACHE_NONE,
};
static ssize_t pwm_auto_point_temp_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct gsc_hwmon_data *hwmon = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
u8 reg = hwmon->pdata->fan_base + (2 * attr->index);
u8 regs[2];
int ret;
ret = regmap_bulk_read(hwmon->regmap, reg, regs, 2);
if (ret)
return ret;
ret = regs[0] | regs[1] << 8;
return sprintf(buf, "%d\n", ret * 10);
}
static ssize_t pwm_auto_point_temp_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct gsc_hwmon_data *hwmon = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
u8 reg = hwmon->pdata->fan_base + (2 * attr->index);
u8 regs[2];
long temp;
int err;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
temp = clamp_val(temp, 0, 100000);
temp = DIV_ROUND_CLOSEST(temp, 100);
regs[0] = temp & 0xff;
regs[1] = (temp >> 8) & 0xff;
err = regmap_bulk_write(hwmon->regmap, reg, regs, 2);
if (err)
return err;
return count;
}
static ssize_t pwm_auto_point_pwm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
return sprintf(buf, "%d\n", 255 * (50 + (attr->index * 10)));
}
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point1_pwm, pwm_auto_point_pwm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp, pwm_auto_point_temp, 0);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point2_pwm, pwm_auto_point_pwm, 1);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp, pwm_auto_point_temp, 1);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point3_pwm, pwm_auto_point_pwm, 2);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp, pwm_auto_point_temp, 2);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point4_pwm, pwm_auto_point_pwm, 3);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp, pwm_auto_point_temp, 3);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point5_pwm, pwm_auto_point_pwm, 4);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point5_temp, pwm_auto_point_temp, 4);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point6_pwm, pwm_auto_point_pwm, 5);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point6_temp, pwm_auto_point_temp, 5);
static struct attribute *gsc_hwmon_attributes[] = {
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point5_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point5_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point6_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point6_temp.dev_attr.attr,
NULL
};
static const struct attribute_group gsc_hwmon_group = {
.attrs = gsc_hwmon_attributes,
};
__ATTRIBUTE_GROUPS(gsc_hwmon);
static int
gsc_hwmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
struct gsc_hwmon_data *hwmon = dev_get_drvdata(dev);
const struct gsc_hwmon_channel *ch;
int sz, ret;
long tmp;
u8 buf[3];
switch (type) {
case hwmon_in:
ch = hwmon->in_ch[channel];
break;
case hwmon_temp:
ch = hwmon->temp_ch[channel];
break;
case hwmon_fan:
ch = hwmon->fan_ch[channel];
break;
default:
return -EOPNOTSUPP;
}
sz = (ch->mode == mode_voltage_24bit) ? 3 : 2;
ret = regmap_bulk_read(hwmon->regmap, ch->reg, buf, sz);
if (ret)
return ret;
tmp = 0;
while (sz-- > 0)
tmp |= (buf[sz] << (8 * sz));
switch (ch->mode) {
case mode_temperature:
if (tmp > 0x8000)
tmp -= 0xffff;
tmp *= 100; /* convert to millidegrees celsius */
break;
case mode_voltage_raw:
tmp = clamp_val(tmp, 0, BIT(GSC_HWMON_RESOLUTION));
/* scale based on ref voltage and ADC resolution */
tmp *= GSC_HWMON_VREF;
tmp >>= GSC_HWMON_RESOLUTION;
/* scale based on optional voltage divider */
if (ch->vdiv[0] && ch->vdiv[1]) {
tmp *= (ch->vdiv[0] + ch->vdiv[1]);
tmp /= ch->vdiv[1];
}
/* adjust by uV offset */
tmp += ch->mvoffset;
break;
case mode_fan:
tmp *= 30; /* convert to revolutions per minute */
break;
case mode_voltage_24bit:
case mode_voltage_16bit:
/* no adjustment needed */
break;
}
*val = tmp;
return 0;
}
static int
gsc_hwmon_read_string(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, const char **buf)
{
struct gsc_hwmon_data *hwmon = dev_get_drvdata(dev);
switch (type) {
case hwmon_in:
*buf = hwmon->in_ch[channel]->name;
break;
case hwmon_temp:
*buf = hwmon->temp_ch[channel]->name;
break;
case hwmon_fan:
*buf = hwmon->fan_ch[channel]->name;
break;
default:
return -ENOTSUPP;
}
return 0;
}
static umode_t
gsc_hwmon_is_visible(const void *_data, enum hwmon_sensor_types type, u32 attr,
int ch)
{
return 0444;
}
static const struct hwmon_ops gsc_hwmon_ops = {
.is_visible = gsc_hwmon_is_visible,
.read = gsc_hwmon_read,
.read_string = gsc_hwmon_read_string,
};
static struct gsc_hwmon_platform_data *
gsc_hwmon_get_devtree_pdata(struct device *dev)
{
struct gsc_hwmon_platform_data *pdata;
struct gsc_hwmon_channel *ch;
struct fwnode_handle *child;
struct device_node *fan;
int nchannels;
nchannels = device_get_child_node_count(dev);
if (nchannels == 0)
return ERR_PTR(-ENODEV);
pdata = devm_kzalloc(dev, struct_size(pdata, channels, nchannels),
GFP_KERNEL);
if (!pdata)
return ERR_PTR(-ENOMEM);
pdata->nchannels = nchannels;
/* fan controller base address */
of_node_get(dev->parent->of_node);
fan = of_find_compatible_node(dev->parent->of_node, NULL, "gw,gsc-fan");
if (fan && of_property_read_u32(fan, "reg", &pdata->fan_base)) {
of_node_put(fan);
dev_err(dev, "fan node without base\n");
return ERR_PTR(-EINVAL);
}
of_node_put(fan);
ch = pdata->channels;
/* allocate structures for channels and count instances of each type */
device_for_each_child_node(dev, child) {
if (fwnode_property_read_string(child, "label", &ch->name)) {
dev_err(dev, "channel without label\n");
fwnode_handle_put(child);
return ERR_PTR(-EINVAL);
}
if (fwnode_property_read_u32(child, "reg", &ch->reg)) {
dev_err(dev, "channel without reg\n");
fwnode_handle_put(child);
return ERR_PTR(-EINVAL);
}
if (fwnode_property_read_u32(child, "gw,mode", &ch->mode)) {
dev_err(dev, "channel without mode\n");
fwnode_handle_put(child);
return ERR_PTR(-EINVAL);
}
if (ch->mode > mode_max) {
dev_err(dev, "invalid channel mode\n");
fwnode_handle_put(child);
return ERR_PTR(-EINVAL);
}
if (!fwnode_property_read_u32(child,
"gw,voltage-offset-microvolt",
&ch->mvoffset))
ch->mvoffset /= 1000;
fwnode_property_read_u32_array(child,
"gw,voltage-divider-ohms",
ch->vdiv, ARRAY_SIZE(ch->vdiv));
ch++;
}
return pdata;
}
static int gsc_hwmon_probe(struct platform_device *pdev)
{
struct gsc_dev *gsc = dev_get_drvdata(pdev->dev.parent);
struct device *dev = &pdev->dev;
struct device *hwmon_dev;
struct gsc_hwmon_platform_data *pdata = dev_get_platdata(dev);
struct gsc_hwmon_data *hwmon;
const struct attribute_group **groups;
int i, i_in, i_temp, i_fan;
if (!pdata) {
pdata = gsc_hwmon_get_devtree_pdata(dev);
if (IS_ERR(pdata))
return PTR_ERR(pdata);
}
hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
if (!hwmon)
return -ENOMEM;
hwmon->gsc = gsc;
hwmon->pdata = pdata;
hwmon->regmap = devm_regmap_init(dev, &gsc_hwmon_regmap_bus,
gsc->i2c_hwmon,
&gsc_hwmon_regmap_config);
if (IS_ERR(hwmon->regmap))
return PTR_ERR(hwmon->regmap);
for (i = 0, i_in = 0, i_temp = 0, i_fan = 0; i < hwmon->pdata->nchannels; i++) {
const struct gsc_hwmon_channel *ch = &pdata->channels[i];
switch (ch->mode) {
case mode_temperature:
if (i_temp == GSC_HWMON_MAX_TEMP_CH) {
dev_err(gsc->dev, "too many temp channels\n");
return -EINVAL;
}
hwmon->temp_ch[i_temp] = ch;
hwmon->temp_config[i_temp] = HWMON_T_INPUT |
HWMON_T_LABEL;
i_temp++;
break;
case mode_fan:
if (i_fan == GSC_HWMON_MAX_FAN_CH) {
dev_err(gsc->dev, "too many fan channels\n");
return -EINVAL;
}
hwmon->fan_ch[i_fan] = ch;
hwmon->fan_config[i_fan] = HWMON_F_INPUT |
HWMON_F_LABEL;
i_fan++;
break;
case mode_voltage_24bit:
case mode_voltage_16bit:
case mode_voltage_raw:
if (i_in == GSC_HWMON_MAX_IN_CH) {
dev_err(gsc->dev, "too many input channels\n");
return -EINVAL;
}
hwmon->in_ch[i_in] = ch;
hwmon->in_config[i_in] =
HWMON_I_INPUT | HWMON_I_LABEL;
i_in++;
break;
default:
dev_err(gsc->dev, "invalid mode: %d\n", ch->mode);
return -EINVAL;
}
}
/* setup config structures */
hwmon->chip.ops = &gsc_hwmon_ops;
hwmon->chip.info = hwmon->info;
hwmon->info[0] = &hwmon->temp_info;
hwmon->info[1] = &hwmon->in_info;
hwmon->info[2] = &hwmon->fan_info;
hwmon->temp_info.type = hwmon_temp;
hwmon->temp_info.config = hwmon->temp_config;
hwmon->in_info.type = hwmon_in;
hwmon->in_info.config = hwmon->in_config;
hwmon->fan_info.type = hwmon_fan;
hwmon->fan_info.config = hwmon->fan_config;
groups = pdata->fan_base ? gsc_hwmon_groups : NULL;
hwmon_dev = devm_hwmon_device_register_with_info(dev,
KBUILD_MODNAME, hwmon,
&hwmon->chip, groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id gsc_hwmon_of_match[] = {
{ .compatible = "gw,gsc-adc", },
{}
};
static struct platform_driver gsc_hwmon_driver = {
.driver = {
.name = "gsc-hwmon",
.of_match_table = gsc_hwmon_of_match,
},
.probe = gsc_hwmon_probe,
};
module_platform_driver(gsc_hwmon_driver);
MODULE_AUTHOR("Tim Harvey <[email protected]>");
MODULE_DESCRIPTION("GSC hardware monitor driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/gsc-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* tmp421.c
*
* Copyright (C) 2009 Andre Prendel <[email protected]>
* Preliminary support by:
* Melvin Rook, Raymond Ng
*/
/*
* Driver for the Texas Instruments TMP421 SMBus temperature sensor IC.
* Supported models: TMP421, TMP422, TMP423, TMP441, TMP442
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/sysfs.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2a, 0x4c, 0x4d, 0x4e, 0x4f,
I2C_CLIENT_END };
enum chips { tmp421, tmp422, tmp423, tmp441, tmp442 };
#define MAX_CHANNELS 4
/* The TMP421 registers */
#define TMP421_STATUS_REG 0x08
#define TMP421_CONFIG_REG_1 0x09
#define TMP421_CONFIG_REG_2 0x0A
#define TMP421_CONFIG_REG_REN(x) (BIT(3 + (x)))
#define TMP421_CONFIG_REG_REN_MASK GENMASK(6, 3)
#define TMP421_CONVERSION_RATE_REG 0x0B
#define TMP421_N_FACTOR_REG_1 0x21
#define TMP421_MANUFACTURER_ID_REG 0xFE
#define TMP421_DEVICE_ID_REG 0xFF
static const u8 TMP421_TEMP_MSB[MAX_CHANNELS] = { 0x00, 0x01, 0x02, 0x03 };
static const u8 TMP421_TEMP_LSB[MAX_CHANNELS] = { 0x10, 0x11, 0x12, 0x13 };
/* Flags */
#define TMP421_CONFIG_SHUTDOWN 0x40
#define TMP421_CONFIG_RANGE 0x04
/* Manufacturer / Device ID's */
#define TMP421_MANUFACTURER_ID 0x55
#define TMP421_DEVICE_ID 0x21
#define TMP422_DEVICE_ID 0x22
#define TMP423_DEVICE_ID 0x23
#define TMP441_DEVICE_ID 0x41
#define TMP442_DEVICE_ID 0x42
static const struct i2c_device_id tmp421_id[] = {
{ "tmp421", 2 },
{ "tmp422", 3 },
{ "tmp423", 4 },
{ "tmp441", 2 },
{ "tmp442", 3 },
{ }
};
MODULE_DEVICE_TABLE(i2c, tmp421_id);
static const struct of_device_id __maybe_unused tmp421_of_match[] = {
{
.compatible = "ti,tmp421",
.data = (void *)2
},
{
.compatible = "ti,tmp422",
.data = (void *)3
},
{
.compatible = "ti,tmp423",
.data = (void *)4
},
{
.compatible = "ti,tmp441",
.data = (void *)2
},
{
.compatible = "ti,tmp442",
.data = (void *)3
},
{ },
};
MODULE_DEVICE_TABLE(of, tmp421_of_match);
struct tmp421_channel {
const char *label;
bool enabled;
s16 temp;
};
struct tmp421_data {
struct i2c_client *client;
struct mutex update_lock;
u32 temp_config[MAX_CHANNELS + 1];
struct hwmon_channel_info temp_info;
const struct hwmon_channel_info *info[2];
struct hwmon_chip_info chip;
bool valid;
unsigned long last_updated;
unsigned long channels;
u8 config;
struct tmp421_channel channel[MAX_CHANNELS];
};
static int temp_from_raw(u16 reg, bool extended)
{
/* Mask out status bits */
int temp = reg & ~0xf;
if (extended)
temp = temp - 64 * 256;
else
temp = (s16)temp;
return DIV_ROUND_CLOSEST(temp * 1000, 256);
}
static int tmp421_update_device(struct tmp421_data *data)
{
struct i2c_client *client = data->client;
int ret = 0;
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + (HZ / 2)) ||
!data->valid) {
ret = i2c_smbus_read_byte_data(client, TMP421_CONFIG_REG_1);
if (ret < 0)
goto exit;
data->config = ret;
for (i = 0; i < data->channels; i++) {
ret = i2c_smbus_read_byte_data(client, TMP421_TEMP_MSB[i]);
if (ret < 0)
goto exit;
data->channel[i].temp = ret << 8;
ret = i2c_smbus_read_byte_data(client, TMP421_TEMP_LSB[i]);
if (ret < 0)
goto exit;
data->channel[i].temp |= ret;
}
data->last_updated = jiffies;
data->valid = true;
}
exit:
mutex_unlock(&data->update_lock);
if (ret < 0) {
data->valid = false;
return ret;
}
return 0;
}
static int tmp421_enable_channels(struct tmp421_data *data)
{
int err;
struct i2c_client *client = data->client;
struct device *dev = &client->dev;
int old = i2c_smbus_read_byte_data(client, TMP421_CONFIG_REG_2);
int new, i;
if (old < 0) {
dev_err(dev, "error reading register, can't disable channels\n");
return old;
}
new = old & ~TMP421_CONFIG_REG_REN_MASK;
for (i = 0; i < data->channels; i++)
if (data->channel[i].enabled)
new |= TMP421_CONFIG_REG_REN(i);
if (new == old)
return 0;
err = i2c_smbus_write_byte_data(client, TMP421_CONFIG_REG_2, new);
if (err < 0)
dev_err(dev, "error writing register, can't disable channels\n");
return err;
}
static int tmp421_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct tmp421_data *tmp421 = dev_get_drvdata(dev);
int ret = 0;
ret = tmp421_update_device(tmp421);
if (ret)
return ret;
switch (attr) {
case hwmon_temp_input:
if (!tmp421->channel[channel].enabled)
return -ENODATA;
*val = temp_from_raw(tmp421->channel[channel].temp,
tmp421->config & TMP421_CONFIG_RANGE);
return 0;
case hwmon_temp_fault:
if (!tmp421->channel[channel].enabled)
return -ENODATA;
/*
* Any of OPEN or /PVLD bits indicate a hardware mulfunction
* and the conversion result may be incorrect
*/
*val = !!(tmp421->channel[channel].temp & 0x03);
return 0;
case hwmon_temp_enable:
*val = tmp421->channel[channel].enabled;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int tmp421_read_string(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
struct tmp421_data *data = dev_get_drvdata(dev);
*str = data->channel[channel].label;
return 0;
}
static int tmp421_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct tmp421_data *data = dev_get_drvdata(dev);
int ret;
switch (attr) {
case hwmon_temp_enable:
data->channel[channel].enabled = val;
ret = tmp421_enable_channels(data);
break;
default:
ret = -EOPNOTSUPP;
}
return ret;
}
static umode_t tmp421_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (attr) {
case hwmon_temp_fault:
case hwmon_temp_input:
return 0444;
case hwmon_temp_label:
return 0444;
case hwmon_temp_enable:
return 0644;
default:
return 0;
}
}
static int tmp421_init_client(struct tmp421_data *data)
{
int config, config_orig;
struct i2c_client *client = data->client;
/* Set the conversion rate to 2 Hz */
i2c_smbus_write_byte_data(client, TMP421_CONVERSION_RATE_REG, 0x05);
/* Start conversions (disable shutdown if necessary) */
config = i2c_smbus_read_byte_data(client, TMP421_CONFIG_REG_1);
if (config < 0) {
dev_err(&client->dev,
"Could not read configuration register (%d)\n", config);
return config;
}
config_orig = config;
config &= ~TMP421_CONFIG_SHUTDOWN;
if (config != config_orig) {
dev_info(&client->dev, "Enable monitoring chip\n");
i2c_smbus_write_byte_data(client, TMP421_CONFIG_REG_1, config);
}
return tmp421_enable_channels(data);
}
static int tmp421_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
enum chips kind;
struct i2c_adapter *adapter = client->adapter;
static const char * const names[] = {
"TMP421", "TMP422", "TMP423",
"TMP441", "TMP442"
};
int addr = client->addr;
u8 reg;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, TMP421_MANUFACTURER_ID_REG);
if (reg != TMP421_MANUFACTURER_ID)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, TMP421_CONVERSION_RATE_REG);
if (reg & 0xf8)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, TMP421_STATUS_REG);
if (reg & 0x7f)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, TMP421_DEVICE_ID_REG);
switch (reg) {
case TMP421_DEVICE_ID:
kind = tmp421;
break;
case TMP422_DEVICE_ID:
if (addr == 0x2a)
return -ENODEV;
kind = tmp422;
break;
case TMP423_DEVICE_ID:
if (addr != 0x4c && addr != 0x4d)
return -ENODEV;
kind = tmp423;
break;
case TMP441_DEVICE_ID:
kind = tmp441;
break;
case TMP442_DEVICE_ID:
if (addr != 0x4c && addr != 0x4d)
return -ENODEV;
kind = tmp442;
break;
default:
return -ENODEV;
}
strscpy(info->type, tmp421_id[kind].name, I2C_NAME_SIZE);
dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n",
names[kind], client->addr);
return 0;
}
static int tmp421_probe_child_from_dt(struct i2c_client *client,
struct device_node *child,
struct tmp421_data *data)
{
struct device *dev = &client->dev;
u32 i;
s32 val;
int err;
err = of_property_read_u32(child, "reg", &i);
if (err) {
dev_err(dev, "missing reg property of %pOFn\n", child);
return err;
}
if (i >= data->channels) {
dev_err(dev, "invalid reg %d of %pOFn\n", i, child);
return -EINVAL;
}
of_property_read_string(child, "label", &data->channel[i].label);
if (data->channel[i].label)
data->temp_config[i] |= HWMON_T_LABEL;
data->channel[i].enabled = of_device_is_available(child);
err = of_property_read_s32(child, "ti,n-factor", &val);
if (!err) {
if (i == 0) {
dev_err(dev, "n-factor can't be set for internal channel\n");
return -EINVAL;
}
if (val > 127 || val < -128) {
dev_err(dev, "n-factor for channel %d invalid (%d)\n",
i, val);
return -EINVAL;
}
i2c_smbus_write_byte_data(client, TMP421_N_FACTOR_REG_1 + i - 1,
val);
}
return 0;
}
static int tmp421_probe_from_dt(struct i2c_client *client, struct tmp421_data *data)
{
struct device *dev = &client->dev;
const struct device_node *np = dev->of_node;
struct device_node *child;
int err;
for_each_child_of_node(np, child) {
if (strcmp(child->name, "channel"))
continue;
err = tmp421_probe_child_from_dt(client, child, data);
if (err) {
of_node_put(child);
return err;
}
}
return 0;
}
static const struct hwmon_ops tmp421_ops = {
.is_visible = tmp421_is_visible,
.read = tmp421_read,
.read_string = tmp421_read_string,
.write = tmp421_write,
};
static int tmp421_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct tmp421_data *data;
int i, err;
data = devm_kzalloc(dev, sizeof(struct tmp421_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->update_lock);
if (client->dev.of_node)
data->channels = (unsigned long)
of_device_get_match_data(&client->dev);
else
data->channels = i2c_match_id(tmp421_id, client)->driver_data;
data->client = client;
for (i = 0; i < data->channels; i++) {
data->temp_config[i] = HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_ENABLE;
data->channel[i].enabled = true;
}
err = tmp421_probe_from_dt(client, data);
if (err)
return err;
err = tmp421_init_client(data);
if (err)
return err;
data->chip.ops = &tmp421_ops;
data->chip.info = data->info;
data->info[0] = &data->temp_info;
data->temp_info.type = hwmon_temp;
data->temp_info.config = data->temp_config;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&data->chip,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct i2c_driver tmp421_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "tmp421",
.of_match_table = of_match_ptr(tmp421_of_match),
},
.probe = tmp421_probe,
.id_table = tmp421_id,
.detect = tmp421_detect,
.address_list = normal_i2c,
};
module_i2c_driver(tmp421_driver);
MODULE_AUTHOR("Andre Prendel <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments TMP421/422/423/441/442 temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/tmp421.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2012 Guenter Roeck <[email protected]>
*
* based on max1668.c
* Copyright (c) 2011 David George <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/platform_data/max6697.h>
enum chips { max6581, max6602, max6622, max6636, max6689, max6693, max6694,
max6697, max6698, max6699 };
/* Report local sensor as temp1 */
static const u8 MAX6697_REG_TEMP[] = {
0x07, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x08 };
static const u8 MAX6697_REG_TEMP_EXT[] = {
0x57, 0x09, 0x52, 0x53, 0x54, 0x55, 0x56, 0 };
static const u8 MAX6697_REG_MAX[] = {
0x17, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x18 };
static const u8 MAX6697_REG_CRIT[] = {
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27 };
/*
* Map device tree / platform data register bit map to chip bit map.
* Applies to alert register and over-temperature register.
*/
#define MAX6697_ALERT_MAP_BITS(reg) ((((reg) & 0x7e) >> 1) | \
(((reg) & 0x01) << 6) | ((reg) & 0x80))
#define MAX6697_OVERT_MAP_BITS(reg) (((reg) >> 1) | (((reg) & 0x01) << 7))
#define MAX6697_REG_STAT(n) (0x44 + (n))
#define MAX6697_REG_CONFIG 0x41
#define MAX6581_CONF_EXTENDED (1 << 1)
#define MAX6693_CONF_BETA (1 << 2)
#define MAX6697_CONF_RESISTANCE (1 << 3)
#define MAX6697_CONF_TIMEOUT (1 << 5)
#define MAX6697_REG_ALERT_MASK 0x42
#define MAX6697_REG_OVERT_MASK 0x43
#define MAX6581_REG_RESISTANCE 0x4a
#define MAX6581_REG_IDEALITY 0x4b
#define MAX6581_REG_IDEALITY_SELECT 0x4c
#define MAX6581_REG_OFFSET 0x4d
#define MAX6581_REG_OFFSET_SELECT 0x4e
#define MAX6581_OFFSET_MIN -31750
#define MAX6581_OFFSET_MAX 31750
#define MAX6697_CONV_TIME 156 /* ms per channel, worst case */
struct max6697_chip_data {
int channels;
u32 have_ext;
u32 have_crit;
u32 have_fault;
u8 valid_conf;
const u8 *alarm_map;
};
struct max6697_data {
struct i2c_client *client;
enum chips type;
const struct max6697_chip_data *chip;
int update_interval; /* in milli-seconds */
int temp_offset; /* in degrees C */
struct mutex update_lock;
unsigned long last_updated; /* In jiffies */
bool valid; /* true if following fields are valid */
/* 1x local and up to 7x remote */
u8 temp[8][4]; /* [nr][0]=temp [1]=ext [2]=max [3]=crit */
#define MAX6697_TEMP_INPUT 0
#define MAX6697_TEMP_EXT 1
#define MAX6697_TEMP_MAX 2
#define MAX6697_TEMP_CRIT 3
u32 alarms;
};
/* Diode fault status bits on MAX6581 are right shifted by one bit */
static const u8 max6581_alarm_map[] = {
0, 0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23 };
static const struct max6697_chip_data max6697_chip_data[] = {
[max6581] = {
.channels = 8,
.have_crit = 0xff,
.have_ext = 0x7f,
.have_fault = 0xfe,
.valid_conf = MAX6581_CONF_EXTENDED | MAX6697_CONF_TIMEOUT,
.alarm_map = max6581_alarm_map,
},
[max6602] = {
.channels = 5,
.have_crit = 0x12,
.have_ext = 0x02,
.have_fault = 0x1e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
},
[max6622] = {
.channels = 5,
.have_crit = 0x12,
.have_ext = 0x02,
.have_fault = 0x1e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
},
[max6636] = {
.channels = 7,
.have_crit = 0x72,
.have_ext = 0x02,
.have_fault = 0x7e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
},
[max6689] = {
.channels = 7,
.have_crit = 0x72,
.have_ext = 0x02,
.have_fault = 0x7e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
},
[max6693] = {
.channels = 7,
.have_crit = 0x72,
.have_ext = 0x02,
.have_fault = 0x7e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
MAX6697_CONF_TIMEOUT,
},
[max6694] = {
.channels = 5,
.have_crit = 0x12,
.have_ext = 0x02,
.have_fault = 0x1e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
MAX6697_CONF_TIMEOUT,
},
[max6697] = {
.channels = 7,
.have_crit = 0x72,
.have_ext = 0x02,
.have_fault = 0x7e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
},
[max6698] = {
.channels = 7,
.have_crit = 0x72,
.have_ext = 0x02,
.have_fault = 0x0e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
},
[max6699] = {
.channels = 5,
.have_crit = 0x12,
.have_ext = 0x02,
.have_fault = 0x1e,
.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
},
};
static inline int max6581_offset_to_millic(int val)
{
return sign_extend32(val, 7) * 250;
}
static struct max6697_data *max6697_update_device(struct device *dev)
{
struct max6697_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct max6697_data *ret = data;
int val;
int i;
u32 alarms;
mutex_lock(&data->update_lock);
if (data->valid &&
!time_after(jiffies, data->last_updated
+ msecs_to_jiffies(data->update_interval)))
goto abort;
for (i = 0; i < data->chip->channels; i++) {
if (data->chip->have_ext & (1 << i)) {
val = i2c_smbus_read_byte_data(client,
MAX6697_REG_TEMP_EXT[i]);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp[i][MAX6697_TEMP_EXT] = val;
}
val = i2c_smbus_read_byte_data(client, MAX6697_REG_TEMP[i]);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp[i][MAX6697_TEMP_INPUT] = val;
val = i2c_smbus_read_byte_data(client, MAX6697_REG_MAX[i]);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp[i][MAX6697_TEMP_MAX] = val;
if (data->chip->have_crit & (1 << i)) {
val = i2c_smbus_read_byte_data(client,
MAX6697_REG_CRIT[i]);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp[i][MAX6697_TEMP_CRIT] = val;
}
}
alarms = 0;
for (i = 0; i < 3; i++) {
val = i2c_smbus_read_byte_data(client, MAX6697_REG_STAT(i));
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
alarms = (alarms << 8) | val;
}
data->alarms = alarms;
data->last_updated = jiffies;
data->valid = true;
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t temp_input_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct max6697_data *data = max6697_update_device(dev);
int temp;
if (IS_ERR(data))
return PTR_ERR(data);
temp = (data->temp[index][MAX6697_TEMP_INPUT] - data->temp_offset) << 3;
temp |= data->temp[index][MAX6697_TEMP_EXT] >> 5;
return sprintf(buf, "%d\n", temp * 125);
}
static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
int nr = to_sensor_dev_attr_2(devattr)->nr;
int index = to_sensor_dev_attr_2(devattr)->index;
struct max6697_data *data = max6697_update_device(dev);
int temp;
if (IS_ERR(data))
return PTR_ERR(data);
temp = data->temp[nr][index];
temp -= data->temp_offset;
return sprintf(buf, "%d\n", temp * 1000);
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int index = to_sensor_dev_attr(attr)->index;
struct max6697_data *data = max6697_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
if (data->chip->alarm_map)
index = data->chip->alarm_map[index];
return sprintf(buf, "%u\n", (data->alarms >> index) & 0x1);
}
static ssize_t temp_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr_2(devattr)->nr;
int index = to_sensor_dev_attr_2(devattr)->index;
struct max6697_data *data = dev_get_drvdata(dev);
long temp;
int ret;
ret = kstrtol(buf, 10, &temp);
if (ret < 0)
return ret;
mutex_lock(&data->update_lock);
temp = DIV_ROUND_CLOSEST(temp, 1000) + data->temp_offset;
temp = clamp_val(temp, 0, data->type == max6581 ? 255 : 127);
data->temp[nr][index] = temp;
ret = i2c_smbus_write_byte_data(data->client,
index == 2 ? MAX6697_REG_MAX[nr]
: MAX6697_REG_CRIT[nr],
temp);
mutex_unlock(&data->update_lock);
return ret < 0 ? ret : count;
}
static ssize_t offset_store(struct device *dev, struct device_attribute *devattr, const char *buf,
size_t count)
{
int val, ret, index, select;
struct max6697_data *data;
bool channel_enabled;
long temp;
index = to_sensor_dev_attr(devattr)->index;
data = dev_get_drvdata(dev);
ret = kstrtol(buf, 10, &temp);
if (ret < 0)
return ret;
mutex_lock(&data->update_lock);
select = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET_SELECT);
if (select < 0) {
ret = select;
goto abort;
}
channel_enabled = (select & (1 << (index - 1)));
temp = clamp_val(temp, MAX6581_OFFSET_MIN, MAX6581_OFFSET_MAX);
val = DIV_ROUND_CLOSEST(temp, 250);
/* disable the offset for channel if the new offset is 0 */
if (val == 0) {
if (channel_enabled)
ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET_SELECT,
select & ~(1 << (index - 1)));
ret = ret < 0 ? ret : count;
goto abort;
}
if (!channel_enabled) {
ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET_SELECT,
select | (1 << (index - 1)));
if (ret < 0)
goto abort;
}
ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET, val);
ret = ret < 0 ? ret : count;
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t offset_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
struct max6697_data *data;
int select, ret, index;
index = to_sensor_dev_attr(devattr)->index;
data = dev_get_drvdata(dev);
mutex_lock(&data->update_lock);
select = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET_SELECT);
if (select < 0)
ret = select;
else if (select & (1 << (index - 1)))
ret = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET);
else
ret = 0;
mutex_unlock(&data->update_lock);
return ret < 0 ? ret : sprintf(buf, "%d\n", max6581_offset_to_millic(ret));
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, 0, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, 0, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, 1, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, 1, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp_input, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, 2, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, 2, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp4_input, temp_input, 3);
static SENSOR_DEVICE_ATTR_2_RW(temp4_max, temp, 3, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp4_crit, temp, 3, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp5_input, temp_input, 4);
static SENSOR_DEVICE_ATTR_2_RW(temp5_max, temp, 4, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp5_crit, temp, 4, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp6_input, temp_input, 5);
static SENSOR_DEVICE_ATTR_2_RW(temp6_max, temp, 5, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp6_crit, temp, 5, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp7_input, temp_input, 6);
static SENSOR_DEVICE_ATTR_2_RW(temp7_max, temp, 6, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp7_crit, temp, 6, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp8_input, temp_input, 7);
static SENSOR_DEVICE_ATTR_2_RW(temp8_max, temp, 7, MAX6697_TEMP_MAX);
static SENSOR_DEVICE_ATTR_2_RW(temp8_crit, temp, 7, MAX6697_TEMP_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 22);
static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, alarm, 16);
static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, alarm, 17);
static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, alarm, 18);
static SENSOR_DEVICE_ATTR_RO(temp5_max_alarm, alarm, 19);
static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, alarm, 20);
static SENSOR_DEVICE_ATTR_RO(temp7_max_alarm, alarm, 21);
static SENSOR_DEVICE_ATTR_RO(temp8_max_alarm, alarm, 23);
static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 14);
static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, alarm, 9);
static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, alarm, 10);
static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, alarm, 12);
static SENSOR_DEVICE_ATTR_RO(temp7_crit_alarm, alarm, 13);
static SENSOR_DEVICE_ATTR_RO(temp8_crit_alarm, alarm, 15);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(temp4_fault, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(temp5_fault, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(temp6_fault, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(temp7_fault, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(temp8_fault, alarm, 7);
/* There is no offset for local temperature so starting from temp2 */
static SENSOR_DEVICE_ATTR_RW(temp2_offset, offset, 1);
static SENSOR_DEVICE_ATTR_RW(temp3_offset, offset, 2);
static SENSOR_DEVICE_ATTR_RW(temp4_offset, offset, 3);
static SENSOR_DEVICE_ATTR_RW(temp5_offset, offset, 4);
static SENSOR_DEVICE_ATTR_RW(temp6_offset, offset, 5);
static SENSOR_DEVICE_ATTR_RW(temp7_offset, offset, 6);
static SENSOR_DEVICE_ATTR_RW(temp8_offset, offset, 7);
static DEVICE_ATTR(dummy, 0, NULL, NULL);
static umode_t max6697_is_visible(struct kobject *kobj, struct attribute *attr,
int index)
{
struct device *dev = kobj_to_dev(kobj);
struct max6697_data *data = dev_get_drvdata(dev);
const struct max6697_chip_data *chip = data->chip;
int channel = index / 7; /* channel number */
int nr = index % 7; /* attribute index within channel */
if (channel >= chip->channels)
return 0;
if ((nr == 3 || nr == 4) && !(chip->have_crit & (1 << channel)))
return 0;
if (nr == 5 && !(chip->have_fault & (1 << channel)))
return 0;
/* offset reg is only supported on max6581 remote channels */
if (nr == 6)
if (data->type != max6581 || channel == 0)
return 0;
return attr->mode;
}
/*
* max6697_is_visible uses the index into the following array to determine
* if attributes should be created or not. Any change in order or content
* must be matched in max6697_is_visible.
*/
static struct attribute *max6697_attributes[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
&dev_attr_dummy.attr,
&dev_attr_dummy.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_crit.dev_attr.attr,
&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_temp4_max.dev_attr.attr,
&sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_crit.dev_attr.attr,
&sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_fault.dev_attr.attr,
&sensor_dev_attr_temp4_offset.dev_attr.attr,
&sensor_dev_attr_temp5_input.dev_attr.attr,
&sensor_dev_attr_temp5_max.dev_attr.attr,
&sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_crit.dev_attr.attr,
&sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_fault.dev_attr.attr,
&sensor_dev_attr_temp5_offset.dev_attr.attr,
&sensor_dev_attr_temp6_input.dev_attr.attr,
&sensor_dev_attr_temp6_max.dev_attr.attr,
&sensor_dev_attr_temp6_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp6_crit.dev_attr.attr,
&sensor_dev_attr_temp6_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp6_fault.dev_attr.attr,
&sensor_dev_attr_temp6_offset.dev_attr.attr,
&sensor_dev_attr_temp7_input.dev_attr.attr,
&sensor_dev_attr_temp7_max.dev_attr.attr,
&sensor_dev_attr_temp7_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp7_crit.dev_attr.attr,
&sensor_dev_attr_temp7_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp7_fault.dev_attr.attr,
&sensor_dev_attr_temp7_offset.dev_attr.attr,
&sensor_dev_attr_temp8_input.dev_attr.attr,
&sensor_dev_attr_temp8_max.dev_attr.attr,
&sensor_dev_attr_temp8_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp8_crit.dev_attr.attr,
&sensor_dev_attr_temp8_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp8_fault.dev_attr.attr,
&sensor_dev_attr_temp8_offset.dev_attr.attr,
NULL
};
static const struct attribute_group max6697_group = {
.attrs = max6697_attributes, .is_visible = max6697_is_visible,
};
__ATTRIBUTE_GROUPS(max6697);
static void max6697_get_config_of(struct device_node *node,
struct max6697_platform_data *pdata)
{
int len;
const __be32 *prop;
pdata->smbus_timeout_disable =
of_property_read_bool(node, "smbus-timeout-disable");
pdata->extended_range_enable =
of_property_read_bool(node, "extended-range-enable");
pdata->beta_compensation =
of_property_read_bool(node, "beta-compensation-enable");
prop = of_get_property(node, "alert-mask", &len);
if (prop && len == sizeof(u32))
pdata->alert_mask = be32_to_cpu(prop[0]);
prop = of_get_property(node, "over-temperature-mask", &len);
if (prop && len == sizeof(u32))
pdata->over_temperature_mask = be32_to_cpu(prop[0]);
prop = of_get_property(node, "resistance-cancellation", &len);
if (prop) {
if (len == sizeof(u32))
pdata->resistance_cancellation = be32_to_cpu(prop[0]);
else
pdata->resistance_cancellation = 0xfe;
}
prop = of_get_property(node, "transistor-ideality", &len);
if (prop && len == 2 * sizeof(u32)) {
pdata->ideality_mask = be32_to_cpu(prop[0]);
pdata->ideality_value = be32_to_cpu(prop[1]);
}
}
static int max6697_init_chip(struct max6697_data *data,
struct i2c_client *client)
{
struct max6697_platform_data *pdata = dev_get_platdata(&client->dev);
struct max6697_platform_data p;
const struct max6697_chip_data *chip = data->chip;
int factor = chip->channels;
int ret, reg;
/*
* Don't touch configuration if neither platform data nor OF
* configuration was specified. If that is the case, use the
* current chip configuration.
*/
if (!pdata && !client->dev.of_node) {
reg = i2c_smbus_read_byte_data(client, MAX6697_REG_CONFIG);
if (reg < 0)
return reg;
if (data->type == max6581) {
if (reg & MAX6581_CONF_EXTENDED)
data->temp_offset = 64;
reg = i2c_smbus_read_byte_data(client,
MAX6581_REG_RESISTANCE);
if (reg < 0)
return reg;
factor += hweight8(reg);
} else {
if (reg & MAX6697_CONF_RESISTANCE)
factor++;
}
goto done;
}
if (client->dev.of_node) {
memset(&p, 0, sizeof(p));
max6697_get_config_of(client->dev.of_node, &p);
pdata = &p;
}
reg = 0;
if (pdata->smbus_timeout_disable &&
(chip->valid_conf & MAX6697_CONF_TIMEOUT)) {
reg |= MAX6697_CONF_TIMEOUT;
}
if (pdata->extended_range_enable &&
(chip->valid_conf & MAX6581_CONF_EXTENDED)) {
reg |= MAX6581_CONF_EXTENDED;
data->temp_offset = 64;
}
if (pdata->resistance_cancellation &&
(chip->valid_conf & MAX6697_CONF_RESISTANCE)) {
reg |= MAX6697_CONF_RESISTANCE;
factor++;
}
if (pdata->beta_compensation &&
(chip->valid_conf & MAX6693_CONF_BETA)) {
reg |= MAX6693_CONF_BETA;
}
ret = i2c_smbus_write_byte_data(client, MAX6697_REG_CONFIG, reg);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(client, MAX6697_REG_ALERT_MASK,
MAX6697_ALERT_MAP_BITS(pdata->alert_mask));
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(client, MAX6697_REG_OVERT_MASK,
MAX6697_OVERT_MAP_BITS(pdata->over_temperature_mask));
if (ret < 0)
return ret;
if (data->type == max6581) {
factor += hweight8(pdata->resistance_cancellation >> 1);
ret = i2c_smbus_write_byte_data(client, MAX6581_REG_RESISTANCE,
pdata->resistance_cancellation >> 1);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(client, MAX6581_REG_IDEALITY,
pdata->ideality_value);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(client,
MAX6581_REG_IDEALITY_SELECT,
pdata->ideality_mask >> 1);
if (ret < 0)
return ret;
}
done:
data->update_interval = factor * MAX6697_CONV_TIME;
return 0;
}
static const struct i2c_device_id max6697_id[];
static int max6697_probe(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
struct device *dev = &client->dev;
struct max6697_data *data;
struct device *hwmon_dev;
int err;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(struct max6697_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
if (client->dev.of_node)
data->type = (uintptr_t)of_device_get_match_data(&client->dev);
else
data->type = i2c_match_id(max6697_id, client)->driver_data;
data->chip = &max6697_chip_data[data->type];
data->client = client;
mutex_init(&data->update_lock);
err = max6697_init_chip(data, client);
if (err)
return err;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
max6697_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max6697_id[] = {
{ "max6581", max6581 },
{ "max6602", max6602 },
{ "max6622", max6622 },
{ "max6636", max6636 },
{ "max6689", max6689 },
{ "max6693", max6693 },
{ "max6694", max6694 },
{ "max6697", max6697 },
{ "max6698", max6698 },
{ "max6699", max6699 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max6697_id);
static const struct of_device_id __maybe_unused max6697_of_match[] = {
{
.compatible = "maxim,max6581",
.data = (void *)max6581
},
{
.compatible = "maxim,max6602",
.data = (void *)max6602
},
{
.compatible = "maxim,max6622",
.data = (void *)max6622
},
{
.compatible = "maxim,max6636",
.data = (void *)max6636
},
{
.compatible = "maxim,max6689",
.data = (void *)max6689
},
{
.compatible = "maxim,max6693",
.data = (void *)max6693
},
{
.compatible = "maxim,max6694",
.data = (void *)max6694
},
{
.compatible = "maxim,max6697",
.data = (void *)max6697
},
{
.compatible = "maxim,max6698",
.data = (void *)max6698
},
{
.compatible = "maxim,max6699",
.data = (void *)max6699
},
{ },
};
MODULE_DEVICE_TABLE(of, max6697_of_match);
static struct i2c_driver max6697_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "max6697",
.of_match_table = of_match_ptr(max6697_of_match),
},
.probe = max6697_probe,
.id_table = max6697_id,
};
module_i2c_driver(max6697_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("MAX6697 temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max6697.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* max31790.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring.
*
* (C) 2015 by Il Han <[email protected]>
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/slab.h>
/* MAX31790 registers */
#define MAX31790_REG_GLOBAL_CONFIG 0x00
#define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch))
#define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch))
#define MAX31790_REG_FAN_FAULT_STATUS2 0x10
#define MAX31790_REG_FAN_FAULT_STATUS1 0x11
#define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2)
#define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2)
#define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2)
#define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2)
/* Fan Config register bits */
#define MAX31790_FAN_CFG_RPM_MODE 0x80
#define MAX31790_FAN_CFG_CTRL_MON 0x10
#define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08
#define MAX31790_FAN_CFG_TACH_INPUT 0x01
/* Fan Dynamics register bits */
#define MAX31790_FAN_DYN_SR_SHIFT 5
#define MAX31790_FAN_DYN_SR_MASK 0xE0
#define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \
>> MAX31790_FAN_DYN_SR_SHIFT)
#define FAN_RPM_MIN 120
#define FAN_RPM_MAX 7864320
#define FAN_COUNT_REG_MAX 0xffe0
#define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \
((60 * (sr) * 8192) / ((reg) >> 4)) : \
FAN_RPM_MAX)
#define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2))
#define NR_CHANNEL 6
/*
* Client data (each client gets its own)
*/
struct max31790_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid; /* zero until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* register values */
u8 fan_config[NR_CHANNEL];
u8 fan_dynamics[NR_CHANNEL];
u16 fault_status;
u16 tach[NR_CHANNEL * 2];
u16 pwm[NR_CHANNEL];
u16 target_count[NR_CHANNEL];
};
static struct max31790_data *max31790_update_device(struct device *dev)
{
struct max31790_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct max31790_data *ret = data;
int i;
int rv;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
rv = i2c_smbus_read_byte_data(client,
MAX31790_REG_FAN_FAULT_STATUS1);
if (rv < 0)
goto abort;
data->fault_status |= rv & 0x3F;
rv = i2c_smbus_read_byte_data(client,
MAX31790_REG_FAN_FAULT_STATUS2);
if (rv < 0)
goto abort;
data->fault_status |= (rv & 0x3F) << 6;
for (i = 0; i < NR_CHANNEL; i++) {
rv = i2c_smbus_read_word_swapped(client,
MAX31790_REG_TACH_COUNT(i));
if (rv < 0)
goto abort;
data->tach[i] = rv;
if (data->fan_config[i]
& MAX31790_FAN_CFG_TACH_INPUT) {
rv = i2c_smbus_read_word_swapped(client,
MAX31790_REG_TACH_COUNT(NR_CHANNEL
+ i));
if (rv < 0)
goto abort;
data->tach[NR_CHANNEL + i] = rv;
} else {
rv = i2c_smbus_read_word_swapped(client,
MAX31790_REG_PWM_DUTY_CYCLE(i));
if (rv < 0)
goto abort;
data->pwm[i] = rv;
rv = i2c_smbus_read_word_swapped(client,
MAX31790_REG_TARGET_COUNT(i));
if (rv < 0)
goto abort;
data->target_count[i] = rv;
}
}
data->last_updated = jiffies;
data->valid = true;
}
goto done;
abort:
data->valid = false;
ret = ERR_PTR(rv);
done:
mutex_unlock(&data->update_lock);
return ret;
}
static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };
static u8 get_tach_period(u8 fan_dynamics)
{
return tach_period[SR_FROM_REG(fan_dynamics)];
}
static u8 bits_for_tach_period(int rpm)
{
u8 bits;
if (rpm < 500)
bits = 0x0;
else if (rpm < 1000)
bits = 0x1;
else if (rpm < 2000)
bits = 0x2;
else if (rpm < 4000)
bits = 0x3;
else if (rpm < 8000)
bits = 0x4;
else
bits = 0x5;
return bits;
}
static int max31790_read_fan(struct device *dev, u32 attr, int channel,
long *val)
{
struct max31790_data *data = max31790_update_device(dev);
int sr, rpm;
if (IS_ERR(data))
return PTR_ERR(data);
switch (attr) {
case hwmon_fan_input:
sr = get_tach_period(data->fan_dynamics[channel % NR_CHANNEL]);
if (data->tach[channel] == FAN_COUNT_REG_MAX)
rpm = 0;
else
rpm = RPM_FROM_REG(data->tach[channel], sr);
*val = rpm;
return 0;
case hwmon_fan_target:
sr = get_tach_period(data->fan_dynamics[channel]);
rpm = RPM_FROM_REG(data->target_count[channel], sr);
*val = rpm;
return 0;
case hwmon_fan_fault:
mutex_lock(&data->update_lock);
*val = !!(data->fault_status & (1 << channel));
data->fault_status &= ~(1 << channel);
/*
* If a fault bit is set, we need to write into one of the fan
* configuration registers to clear it. Note that this also
* clears the fault for the companion channel if enabled.
*/
if (*val) {
int reg = MAX31790_REG_TARGET_COUNT(channel % NR_CHANNEL);
i2c_smbus_write_byte_data(data->client, reg,
data->target_count[channel % NR_CHANNEL] >> 8);
}
mutex_unlock(&data->update_lock);
return 0;
case hwmon_fan_enable:
*val = !!(data->fan_config[channel] & MAX31790_FAN_CFG_TACH_INPUT_EN);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int max31790_write_fan(struct device *dev, u32 attr, int channel,
long val)
{
struct max31790_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int target_count;
int err = 0;
u8 bits, fan_config;
int sr;
mutex_lock(&data->update_lock);
switch (attr) {
case hwmon_fan_target:
val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
bits = bits_for_tach_period(val);
data->fan_dynamics[channel] =
((data->fan_dynamics[channel] &
~MAX31790_FAN_DYN_SR_MASK) |
(bits << MAX31790_FAN_DYN_SR_SHIFT));
err = i2c_smbus_write_byte_data(client,
MAX31790_REG_FAN_DYNAMICS(channel),
data->fan_dynamics[channel]);
if (err < 0)
break;
sr = get_tach_period(data->fan_dynamics[channel]);
target_count = RPM_TO_REG(val, sr);
target_count = clamp_val(target_count, 0x1, 0x7FF);
data->target_count[channel] = target_count << 5;
err = i2c_smbus_write_word_swapped(client,
MAX31790_REG_TARGET_COUNT(channel),
data->target_count[channel]);
break;
case hwmon_fan_enable:
fan_config = data->fan_config[channel];
if (val == 0) {
fan_config &= ~MAX31790_FAN_CFG_TACH_INPUT_EN;
} else if (val == 1) {
fan_config |= MAX31790_FAN_CFG_TACH_INPUT_EN;
} else {
err = -EINVAL;
break;
}
if (fan_config != data->fan_config[channel]) {
err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel),
fan_config);
if (!err)
data->fan_config[channel] = fan_config;
}
break;
default:
err = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return err;
}
static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
{
const struct max31790_data *data = _data;
u8 fan_config = data->fan_config[channel % NR_CHANNEL];
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_fault:
if (channel < NR_CHANNEL ||
(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
return 0444;
return 0;
case hwmon_fan_target:
if (channel < NR_CHANNEL &&
!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
return 0644;
return 0;
case hwmon_fan_enable:
if (channel < NR_CHANNEL)
return 0644;
return 0;
default:
return 0;
}
}
static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
long *val)
{
struct max31790_data *data = max31790_update_device(dev);
u8 fan_config;
if (IS_ERR(data))
return PTR_ERR(data);
fan_config = data->fan_config[channel];
switch (attr) {
case hwmon_pwm_input:
*val = data->pwm[channel] >> 8;
return 0;
case hwmon_pwm_enable:
if (fan_config & MAX31790_FAN_CFG_CTRL_MON)
*val = 0;
else if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
*val = 2;
else
*val = 1;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
long val)
{
struct max31790_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 fan_config;
int err = 0;
mutex_lock(&data->update_lock);
switch (attr) {
case hwmon_pwm_input:
if (val < 0 || val > 255) {
err = -EINVAL;
break;
}
data->valid = false;
err = i2c_smbus_write_word_swapped(client,
MAX31790_REG_PWMOUT(channel),
val << 8);
break;
case hwmon_pwm_enable:
fan_config = data->fan_config[channel];
if (val == 0) {
fan_config |= MAX31790_FAN_CFG_CTRL_MON;
/*
* Disable RPM mode; otherwise disabling fan speed
* monitoring is not possible.
*/
fan_config &= ~MAX31790_FAN_CFG_RPM_MODE;
} else if (val == 1) {
fan_config &= ~(MAX31790_FAN_CFG_CTRL_MON | MAX31790_FAN_CFG_RPM_MODE);
} else if (val == 2) {
fan_config &= ~MAX31790_FAN_CFG_CTRL_MON;
/*
* The chip sets MAX31790_FAN_CFG_TACH_INPUT_EN on its
* own if MAX31790_FAN_CFG_RPM_MODE is set.
* Do it here as well to reflect the actual register
* value in the cache.
*/
fan_config |= (MAX31790_FAN_CFG_RPM_MODE | MAX31790_FAN_CFG_TACH_INPUT_EN);
} else {
err = -EINVAL;
break;
}
if (fan_config != data->fan_config[channel]) {
err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel),
fan_config);
if (!err)
data->fan_config[channel] = fan_config;
}
break;
default:
err = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return err;
}
static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
{
const struct max31790_data *data = _data;
u8 fan_config = data->fan_config[channel];
switch (attr) {
case hwmon_pwm_input:
case hwmon_pwm_enable:
if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
return 0644;
return 0;
default:
return 0;
}
}
static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_fan:
return max31790_read_fan(dev, attr, channel, val);
case hwmon_pwm:
return max31790_read_pwm(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_fan:
return max31790_write_fan(dev, attr, channel, val);
case hwmon_pwm:
return max31790_write_pwm(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t max31790_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_fan:
return max31790_fan_is_visible(data, attr, channel);
case hwmon_pwm:
return max31790_pwm_is_visible(data, attr, channel);
default:
return 0;
}
}
static const struct hwmon_channel_info * const max31790_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT,
HWMON_F_INPUT | HWMON_F_FAULT),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
NULL
};
static const struct hwmon_ops max31790_hwmon_ops = {
.is_visible = max31790_is_visible,
.read = max31790_read,
.write = max31790_write,
};
static const struct hwmon_chip_info max31790_chip_info = {
.ops = &max31790_hwmon_ops,
.info = max31790_info,
};
static int max31790_init_client(struct i2c_client *client,
struct max31790_data *data)
{
int i, rv;
for (i = 0; i < NR_CHANNEL; i++) {
rv = i2c_smbus_read_byte_data(client,
MAX31790_REG_FAN_CONFIG(i));
if (rv < 0)
return rv;
data->fan_config[i] = rv;
rv = i2c_smbus_read_byte_data(client,
MAX31790_REG_FAN_DYNAMICS(i));
if (rv < 0)
return rv;
data->fan_dynamics[i] = rv;
}
return 0;
}
static int max31790_probe(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
struct device *dev = &client->dev;
struct max31790_data *data;
struct device *hwmon_dev;
int err;
if (!i2c_check_functionality(adapter,
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/*
* Initialize the max31790 chip
*/
err = max31790_init_client(client, data);
if (err)
return err;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&max31790_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max31790_id[] = {
{ "max31790", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max31790_id);
static struct i2c_driver max31790_driver = {
.class = I2C_CLASS_HWMON,
.probe = max31790_probe,
.driver = {
.name = "max31790",
},
.id_table = max31790_id,
};
module_i2c_driver(max31790_driver);
MODULE_AUTHOR("Il Han <[email protected]>");
MODULE_DESCRIPTION("MAX31790 sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max31790.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for TI ADC128D818 System Monitor with Temperature Sensor
*
* Copyright (c) 2014 Guenter Roeck
*
* Derived from lm80.c
* Copyright (C) 1998, 1999 Frodo Looijaard <[email protected]>
* and Philip Edelbrock <[email protected]>
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/regulator/consumer.h>
#include <linux/mutex.h>
#include <linux/bitops.h>
#include <linux/of.h>
/* Addresses to scan
* The chip also supports addresses 0x35..0x37. Don't scan those addresses
* since they are also used by some EEPROMs, which may result in false
* positives.
*/
static const unsigned short normal_i2c[] = {
0x1d, 0x1e, 0x1f, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
/* registers */
#define ADC128_REG_IN_MAX(nr) (0x2a + (nr) * 2)
#define ADC128_REG_IN_MIN(nr) (0x2b + (nr) * 2)
#define ADC128_REG_IN(nr) (0x20 + (nr))
#define ADC128_REG_TEMP 0x27
#define ADC128_REG_TEMP_MAX 0x38
#define ADC128_REG_TEMP_HYST 0x39
#define ADC128_REG_CONFIG 0x00
#define ADC128_REG_ALARM 0x01
#define ADC128_REG_MASK 0x03
#define ADC128_REG_CONV_RATE 0x07
#define ADC128_REG_ONESHOT 0x09
#define ADC128_REG_SHUTDOWN 0x0a
#define ADC128_REG_CONFIG_ADV 0x0b
#define ADC128_REG_BUSY_STATUS 0x0c
#define ADC128_REG_MAN_ID 0x3e
#define ADC128_REG_DEV_ID 0x3f
/* No. of voltage entries in adc128_attrs */
#define ADC128_ATTR_NUM_VOLT (8 * 4)
/* Voltage inputs visible per operation mode */
static const u8 num_inputs[] = { 7, 8, 4, 6 };
struct adc128_data {
struct i2c_client *client;
struct regulator *regulator;
int vref; /* Reference voltage in mV */
struct mutex update_lock;
u8 mode; /* Operation mode */
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u16 in[3][8]; /* Register value, normalized to 12 bit
* 0: input voltage
* 1: min limit
* 2: max limit
*/
s16 temp[3]; /* Register value, normalized to 9 bit
* 0: sensor 1: limit 2: hyst
*/
u8 alarms; /* alarm register value */
};
static struct adc128_data *adc128_update_device(struct device *dev)
{
struct adc128_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct adc128_data *ret = data;
int i, rv;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
for (i = 0; i < num_inputs[data->mode]; i++) {
rv = i2c_smbus_read_word_swapped(client,
ADC128_REG_IN(i));
if (rv < 0)
goto abort;
data->in[0][i] = rv >> 4;
rv = i2c_smbus_read_byte_data(client,
ADC128_REG_IN_MIN(i));
if (rv < 0)
goto abort;
data->in[1][i] = rv << 4;
rv = i2c_smbus_read_byte_data(client,
ADC128_REG_IN_MAX(i));
if (rv < 0)
goto abort;
data->in[2][i] = rv << 4;
}
if (data->mode != 1) {
rv = i2c_smbus_read_word_swapped(client,
ADC128_REG_TEMP);
if (rv < 0)
goto abort;
data->temp[0] = rv >> 7;
rv = i2c_smbus_read_byte_data(client,
ADC128_REG_TEMP_MAX);
if (rv < 0)
goto abort;
data->temp[1] = rv << 1;
rv = i2c_smbus_read_byte_data(client,
ADC128_REG_TEMP_HYST);
if (rv < 0)
goto abort;
data->temp[2] = rv << 1;
}
rv = i2c_smbus_read_byte_data(client, ADC128_REG_ALARM);
if (rv < 0)
goto abort;
data->alarms |= rv;
data->last_updated = jiffies;
data->valid = true;
}
goto done;
abort:
ret = ERR_PTR(rv);
data->valid = false;
done:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t adc128_in_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adc128_data *data = adc128_update_device(dev);
int index = to_sensor_dev_attr_2(attr)->index;
int nr = to_sensor_dev_attr_2(attr)->nr;
int val;
if (IS_ERR(data))
return PTR_ERR(data);
val = DIV_ROUND_CLOSEST(data->in[index][nr] * data->vref, 4095);
return sprintf(buf, "%d\n", val);
}
static ssize_t adc128_in_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct adc128_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr_2(attr)->index;
int nr = to_sensor_dev_attr_2(attr)->nr;
u8 reg, regval;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
mutex_lock(&data->update_lock);
/* 10 mV LSB on limit registers */
regval = clamp_val(DIV_ROUND_CLOSEST(val, 10), 0, 255);
data->in[index][nr] = regval << 4;
reg = index == 1 ? ADC128_REG_IN_MIN(nr) : ADC128_REG_IN_MAX(nr);
i2c_smbus_write_byte_data(data->client, reg, regval);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t adc128_temp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adc128_data *data = adc128_update_device(dev);
int index = to_sensor_dev_attr(attr)->index;
int temp;
if (IS_ERR(data))
return PTR_ERR(data);
temp = sign_extend32(data->temp[index], 8);
return sprintf(buf, "%d\n", temp * 500);/* 0.5 degrees C resolution */
}
static ssize_t adc128_temp_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct adc128_data *data = dev_get_drvdata(dev);
int index = to_sensor_dev_attr(attr)->index;
long val;
int err;
s8 regval;
err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
mutex_lock(&data->update_lock);
regval = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
data->temp[index] = regval << 1;
i2c_smbus_write_byte_data(data->client,
index == 1 ? ADC128_REG_TEMP_MAX
: ADC128_REG_TEMP_HYST,
regval);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t adc128_alarm_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adc128_data *data = adc128_update_device(dev);
int mask = 1 << to_sensor_dev_attr(attr)->index;
u8 alarms;
if (IS_ERR(data))
return PTR_ERR(data);
/*
* Clear an alarm after reporting it to user space. If it is still
* active, the next update sequence will set the alarm bit again.
*/
alarms = data->alarms;
data->alarms &= ~mask;
return sprintf(buf, "%u\n", !!(alarms & mask));
}
static umode_t adc128_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct adc128_data *data = dev_get_drvdata(dev);
if (index < ADC128_ATTR_NUM_VOLT) {
/* Voltage, visible according to num_inputs[] */
if (index >= num_inputs[data->mode] * 4)
return 0;
} else {
/* Temperature, visible if not in mode 1 */
if (data->mode == 1)
return 0;
}
return attr->mode;
}
static SENSOR_DEVICE_ATTR_2_RO(in0_input, adc128_in, 0, 0);
static SENSOR_DEVICE_ATTR_2_RW(in0_min, adc128_in, 0, 1);
static SENSOR_DEVICE_ATTR_2_RW(in0_max, adc128_in, 0, 2);
static SENSOR_DEVICE_ATTR_2_RO(in1_input, adc128_in, 1, 0);
static SENSOR_DEVICE_ATTR_2_RW(in1_min, adc128_in, 1, 1);
static SENSOR_DEVICE_ATTR_2_RW(in1_max, adc128_in, 1, 2);
static SENSOR_DEVICE_ATTR_2_RO(in2_input, adc128_in, 2, 0);
static SENSOR_DEVICE_ATTR_2_RW(in2_min, adc128_in, 2, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_max, adc128_in, 2, 2);
static SENSOR_DEVICE_ATTR_2_RO(in3_input, adc128_in, 3, 0);
static SENSOR_DEVICE_ATTR_2_RW(in3_min, adc128_in, 3, 1);
static SENSOR_DEVICE_ATTR_2_RW(in3_max, adc128_in, 3, 2);
static SENSOR_DEVICE_ATTR_2_RO(in4_input, adc128_in, 4, 0);
static SENSOR_DEVICE_ATTR_2_RW(in4_min, adc128_in, 4, 1);
static SENSOR_DEVICE_ATTR_2_RW(in4_max, adc128_in, 4, 2);
static SENSOR_DEVICE_ATTR_2_RO(in5_input, adc128_in, 5, 0);
static SENSOR_DEVICE_ATTR_2_RW(in5_min, adc128_in, 5, 1);
static SENSOR_DEVICE_ATTR_2_RW(in5_max, adc128_in, 5, 2);
static SENSOR_DEVICE_ATTR_2_RO(in6_input, adc128_in, 6, 0);
static SENSOR_DEVICE_ATTR_2_RW(in6_min, adc128_in, 6, 1);
static SENSOR_DEVICE_ATTR_2_RW(in6_max, adc128_in, 6, 2);
static SENSOR_DEVICE_ATTR_2_RO(in7_input, adc128_in, 7, 0);
static SENSOR_DEVICE_ATTR_2_RW(in7_min, adc128_in, 7, 1);
static SENSOR_DEVICE_ATTR_2_RW(in7_max, adc128_in, 7, 2);
static SENSOR_DEVICE_ATTR_RO(temp1_input, adc128_temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, adc128_temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, adc128_temp, 2);
static SENSOR_DEVICE_ATTR_RO(in0_alarm, adc128_alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, adc128_alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, adc128_alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, adc128_alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, adc128_alarm, 4);
static SENSOR_DEVICE_ATTR_RO(in5_alarm, adc128_alarm, 5);
static SENSOR_DEVICE_ATTR_RO(in6_alarm, adc128_alarm, 6);
static SENSOR_DEVICE_ATTR_RO(in7_alarm, adc128_alarm, 7);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, adc128_alarm, 7);
static struct attribute *adc128_attrs[] = {
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
NULL
};
static const struct attribute_group adc128_group = {
.attrs = adc128_attrs,
.is_visible = adc128_is_visible,
};
__ATTRIBUTE_GROUPS(adc128);
static int adc128_detect(struct i2c_client *client, struct i2c_board_info *info)
{
int man_id, dev_id;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
man_id = i2c_smbus_read_byte_data(client, ADC128_REG_MAN_ID);
dev_id = i2c_smbus_read_byte_data(client, ADC128_REG_DEV_ID);
if (man_id != 0x01 || dev_id != 0x09)
return -ENODEV;
/* Check unused bits for confirmation */
if (i2c_smbus_read_byte_data(client, ADC128_REG_CONFIG) & 0xf4)
return -ENODEV;
if (i2c_smbus_read_byte_data(client, ADC128_REG_CONV_RATE) & 0xfe)
return -ENODEV;
if (i2c_smbus_read_byte_data(client, ADC128_REG_ONESHOT) & 0xfe)
return -ENODEV;
if (i2c_smbus_read_byte_data(client, ADC128_REG_SHUTDOWN) & 0xfe)
return -ENODEV;
if (i2c_smbus_read_byte_data(client, ADC128_REG_CONFIG_ADV) & 0xf8)
return -ENODEV;
if (i2c_smbus_read_byte_data(client, ADC128_REG_BUSY_STATUS) & 0xfc)
return -ENODEV;
strscpy(info->type, "adc128d818", I2C_NAME_SIZE);
return 0;
}
static int adc128_init_client(struct adc128_data *data)
{
struct i2c_client *client = data->client;
int err;
u8 regval = 0x0;
/*
* Reset chip to defaults.
* This makes most other initializations unnecessary.
*/
err = i2c_smbus_write_byte_data(client, ADC128_REG_CONFIG, 0x80);
if (err)
return err;
/* Set operation mode, if non-default */
if (data->mode != 0)
regval |= data->mode << 1;
/* If external vref is selected, configure the chip to use it */
if (data->regulator)
regval |= 0x01;
/* Write advanced configuration register */
if (regval != 0x0) {
err = i2c_smbus_write_byte_data(client, ADC128_REG_CONFIG_ADV,
regval);
if (err)
return err;
}
/* Start monitoring */
err = i2c_smbus_write_byte_data(client, ADC128_REG_CONFIG, 0x01);
if (err)
return err;
return 0;
}
static int adc128_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct regulator *regulator;
struct device *hwmon_dev;
struct adc128_data *data;
int err, vref;
data = devm_kzalloc(dev, sizeof(struct adc128_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
/* vref is optional. If specified, is used as chip reference voltage */
regulator = devm_regulator_get_optional(dev, "vref");
if (!IS_ERR(regulator)) {
data->regulator = regulator;
err = regulator_enable(regulator);
if (err < 0)
return err;
vref = regulator_get_voltage(regulator);
if (vref < 0) {
err = vref;
goto error;
}
data->vref = DIV_ROUND_CLOSEST(vref, 1000);
} else {
data->vref = 2560; /* 2.56V, in mV */
}
/* Operation mode is optional. If unspecified, keep current mode */
if (of_property_read_u8(dev->of_node, "ti,mode", &data->mode) == 0) {
if (data->mode > 3) {
dev_err(dev, "invalid operation mode %d\n",
data->mode);
err = -EINVAL;
goto error;
}
} else {
err = i2c_smbus_read_byte_data(client, ADC128_REG_CONFIG_ADV);
if (err < 0)
goto error;
data->mode = (err >> 1) & ADC128_REG_MASK;
}
data->client = client;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
/* Initialize the chip */
err = adc128_init_client(data);
if (err < 0)
goto error;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, adc128_groups);
if (IS_ERR(hwmon_dev)) {
err = PTR_ERR(hwmon_dev);
goto error;
}
return 0;
error:
if (data->regulator)
regulator_disable(data->regulator);
return err;
}
static void adc128_remove(struct i2c_client *client)
{
struct adc128_data *data = i2c_get_clientdata(client);
if (data->regulator)
regulator_disable(data->regulator);
}
static const struct i2c_device_id adc128_id[] = {
{ "adc128d818", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adc128_id);
static const struct of_device_id __maybe_unused adc128_of_match[] = {
{ .compatible = "ti,adc128d818" },
{ },
};
MODULE_DEVICE_TABLE(of, adc128_of_match);
static struct i2c_driver adc128_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adc128d818",
.of_match_table = of_match_ptr(adc128_of_match),
},
.probe = adc128_probe,
.remove = adc128_remove,
.id_table = adc128_id,
.detect = adc128_detect,
.address_list = normal_i2c,
};
module_i2c_driver(adc128_driver);
MODULE_AUTHOR("Guenter Roeck");
MODULE_DESCRIPTION("Driver for ADC128D818");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/adc128d818.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* sis5595.c - Part of lm_sensors, Linux kernel modules
* for hardware monitoring
*
* Copyright (C) 1998 - 2001 Frodo Looijaard <[email protected]>,
* Kyösti Mälkki <[email protected]>, and
* Mark D. Studebaker <[email protected]>
* Ported to Linux 2.6 by Aurelien Jarno <[email protected]> with
* the help of Jean Delvare <[email protected]>
*/
/*
* SiS southbridge has a LM78-like chip integrated on the same IC.
* This driver is a customized copy of lm78.c
*
* Supports following revisions:
* Version PCI ID PCI Revision
* 1 1039/0008 AF or less
* 2 1039/0008 B0 or greater
*
* Note: these chips contain a 0008 device which is incompatible with the
* 5595. We recognize these by the presence of the listed
* "blacklist" PCI ID and refuse to load.
*
* NOT SUPPORTED PCI ID BLACKLIST PCI ID
* 540 0008 0540
* 550 0008 0550
* 5513 0008 5511
* 5581 0008 5597
* 5582 0008 5597
* 5597 0008 5597
* 5598 0008 5597/5598
* 630 0008 0630
* 645 0008 0645
* 730 0008 0730
* 735 0008 0735
*/
#define DRIVER_NAME "sis5595"
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/acpi.h>
#include <linux/io.h>
/*
* If force_addr is set to anything different from 0, we forcibly enable
* the device at the given address.
*/
static u16 force_addr;
module_param(force_addr, ushort, 0);
MODULE_PARM_DESC(force_addr,
"Initialize the base address of the sensors");
static struct platform_device *pdev;
/* Many SIS5595 constants specified below */
/* Length of ISA address segment */
#define SIS5595_EXTENT 8
/* PCI Config Registers */
#define SIS5595_BASE_REG 0x68
#define SIS5595_PIN_REG 0x7A
#define SIS5595_ENABLE_REG 0x7B
/* Where are the ISA address/data registers relative to the base address */
#define SIS5595_ADDR_REG_OFFSET 5
#define SIS5595_DATA_REG_OFFSET 6
/* The SIS5595 registers */
#define SIS5595_REG_IN_MAX(nr) (0x2b + (nr) * 2)
#define SIS5595_REG_IN_MIN(nr) (0x2c + (nr) * 2)
#define SIS5595_REG_IN(nr) (0x20 + (nr))
#define SIS5595_REG_FAN_MIN(nr) (0x3b + (nr))
#define SIS5595_REG_FAN(nr) (0x28 + (nr))
/*
* On the first version of the chip, the temp registers are separate.
* On the second version,
* TEMP pin is shared with IN4, configured in PCI register 0x7A.
* The registers are the same as well.
* OVER and HYST are really MAX and MIN.
*/
#define REV2MIN 0xb0
#define SIS5595_REG_TEMP (((data->revision) >= REV2MIN) ? \
SIS5595_REG_IN(4) : 0x27)
#define SIS5595_REG_TEMP_OVER (((data->revision) >= REV2MIN) ? \
SIS5595_REG_IN_MAX(4) : 0x39)
#define SIS5595_REG_TEMP_HYST (((data->revision) >= REV2MIN) ? \
SIS5595_REG_IN_MIN(4) : 0x3a)
#define SIS5595_REG_CONFIG 0x40
#define SIS5595_REG_ALARM1 0x41
#define SIS5595_REG_ALARM2 0x42
#define SIS5595_REG_FANDIV 0x47
/*
* Conversions. Limit checking is only done on the TO_REG
* variants.
*/
/*
* IN: mV, (0V to 4.08V)
* REG: 16mV/bit
*/
static inline u8 IN_TO_REG(unsigned long val)
{
unsigned long nval = clamp_val(val, 0, 4080);
return (nval + 8) / 16;
}
#define IN_FROM_REG(val) ((val) * 16)
static inline u8 FAN_TO_REG(long rpm, int div)
{
if (rpm <= 0)
return 255;
if (rpm > 1350000)
return 1;
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
static inline int FAN_FROM_REG(u8 val, int div)
{
return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div);
}
/*
* TEMP: mC (-54.12C to +157.53C)
* REG: 0.83C/bit + 52.12, two's complement
*/
static inline int TEMP_FROM_REG(s8 val)
{
return val * 830 + 52120;
}
static inline s8 TEMP_TO_REG(long val)
{
int nval = clamp_val(val, -54120, 157530) ;
return nval < 0 ? (nval - 5212 - 415) / 830 : (nval - 5212 + 415) / 830;
}
/*
* FAN DIV: 1, 2, 4, or 8 (defaults to 2)
* REG: 0, 1, 2, or 3 (respectively) (defaults to 1)
*/
static inline u8 DIV_TO_REG(int val)
{
return val == 8 ? 3 : val == 4 ? 2 : val == 1 ? 0 : 1;
}
#define DIV_FROM_REG(val) (1 << (val))
/*
* For each registered chip, we need to keep some data in memory.
* The structure is dynamically allocated.
*/
struct sis5595_data {
unsigned short addr;
const char *name;
struct device *hwmon_dev;
struct mutex lock;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
char maxins; /* == 3 if temp enabled, otherwise == 4 */
u8 revision; /* Reg. value */
u8 in[5]; /* Register value */
u8 in_max[5]; /* Register value */
u8 in_min[5]; /* Register value */
u8 fan[2]; /* Register value */
u8 fan_min[2]; /* Register value */
s8 temp; /* Register value */
s8 temp_over; /* Register value */
s8 temp_hyst; /* Register value */
u8 fan_div[2]; /* Register encoding, shifted right */
u16 alarms; /* Register encoding, combined */
};
static struct pci_dev *s_bridge; /* pointer to the (only) sis5595 */
/* ISA access must be locked explicitly. */
static int sis5595_read_value(struct sis5595_data *data, u8 reg)
{
int res;
mutex_lock(&data->lock);
outb_p(reg, data->addr + SIS5595_ADDR_REG_OFFSET);
res = inb_p(data->addr + SIS5595_DATA_REG_OFFSET);
mutex_unlock(&data->lock);
return res;
}
static void sis5595_write_value(struct sis5595_data *data, u8 reg, u8 value)
{
mutex_lock(&data->lock);
outb_p(reg, data->addr + SIS5595_ADDR_REG_OFFSET);
outb_p(value, data->addr + SIS5595_DATA_REG_OFFSET);
mutex_unlock(&data->lock);
}
static struct sis5595_data *sis5595_update_device(struct device *dev)
{
struct sis5595_data *data = dev_get_drvdata(dev);
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
for (i = 0; i <= data->maxins; i++) {
data->in[i] =
sis5595_read_value(data, SIS5595_REG_IN(i));
data->in_min[i] =
sis5595_read_value(data,
SIS5595_REG_IN_MIN(i));
data->in_max[i] =
sis5595_read_value(data,
SIS5595_REG_IN_MAX(i));
}
for (i = 0; i < 2; i++) {
data->fan[i] =
sis5595_read_value(data, SIS5595_REG_FAN(i));
data->fan_min[i] =
sis5595_read_value(data,
SIS5595_REG_FAN_MIN(i));
}
if (data->maxins == 3) {
data->temp =
sis5595_read_value(data, SIS5595_REG_TEMP);
data->temp_over =
sis5595_read_value(data, SIS5595_REG_TEMP_OVER);
data->temp_hyst =
sis5595_read_value(data, SIS5595_REG_TEMP_HYST);
}
i = sis5595_read_value(data, SIS5595_REG_FANDIV);
data->fan_div[0] = (i >> 4) & 0x03;
data->fan_div[1] = i >> 6;
data->alarms =
sis5595_read_value(data, SIS5595_REG_ALARM1) |
(sis5595_read_value(data, SIS5595_REG_ALARM2) << 8);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* 4 Voltages */
static ssize_t in_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sis5595_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = IN_TO_REG(val);
sis5595_write_value(data, SIS5595_REG_IN_MIN(nr), data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sis5595_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = IN_TO_REG(val);
sis5595_write_value(data, SIS5595_REG_IN_MAX(nr), data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
/* Temperature */
static ssize_t temp1_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp));
}
static ssize_t temp1_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_over));
}
static ssize_t temp1_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sis5595_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_over = TEMP_TO_REG(val);
sis5595_write_value(data, SIS5595_REG_TEMP_OVER, data->temp_over);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp1_max_hyst_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_hyst));
}
static ssize_t temp1_max_hyst_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct sis5595_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_hyst = TEMP_TO_REG(val);
sis5595_write_value(data, SIS5595_REG_TEMP_HYST, data->temp_hyst);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RO(temp1_input);
static DEVICE_ATTR_RW(temp1_max);
static DEVICE_ATTR_RW(temp1_max_hyst);
/* 2 Fans */
static ssize_t fan_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sis5595_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
sis5595_write_value(data, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_div_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t fan_div_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sis5595_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
unsigned long min;
int reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
min = FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr]));
reg = sis5595_read_value(data, SIS5595_REG_FANDIV);
switch (val) {
case 1:
data->fan_div[nr] = 0;
break;
case 2:
data->fan_div[nr] = 1;
break;
case 4:
data->fan_div[nr] = 2;
break;
case 8:
data->fan_div[nr] = 3;
break;
default:
dev_err(dev,
"fan_div value %ld not supported. Choose one of 1, 2, 4 or 8!\n",
val);
mutex_unlock(&data->update_lock);
return -EINVAL;
}
switch (nr) {
case 0:
reg = (reg & 0xcf) | (data->fan_div[nr] << 4);
break;
case 1:
reg = (reg & 0x3f) | (data->fan_div[nr] << 6);
break;
}
sis5595_write_value(data, SIS5595_REG_FANDIV, reg);
data->fan_min[nr] =
FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
sis5595_write_value(data, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
/* Alarms */
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
return sprintf(buf, "%d\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t alarm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sis5595_data *data = sis5595_update_device(dev);
int nr = to_sensor_dev_attr(da)->index;
return sprintf(buf, "%u\n", (data->alarms >> nr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 15);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 15);
static ssize_t name_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sis5595_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR_RO(name);
static struct attribute *sis5595_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_name.attr,
NULL
};
static const struct attribute_group sis5595_group = {
.attrs = sis5595_attributes,
};
static struct attribute *sis5595_attributes_in4[] = {
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group sis5595_group_in4 = {
.attrs = sis5595_attributes_in4,
};
static struct attribute *sis5595_attributes_temp1[] = {
&dev_attr_temp1_input.attr,
&dev_attr_temp1_max.attr,
&dev_attr_temp1_max_hyst.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group sis5595_group_temp1 = {
.attrs = sis5595_attributes_temp1,
};
/* Called when we have found a new SIS5595. */
static void sis5595_init_device(struct sis5595_data *data)
{
u8 config = sis5595_read_value(data, SIS5595_REG_CONFIG);
if (!(config & 0x01))
sis5595_write_value(data, SIS5595_REG_CONFIG,
(config & 0xf7) | 0x01);
}
/* This is called when the module is loaded */
static int sis5595_probe(struct platform_device *pdev)
{
int err = 0;
int i;
struct sis5595_data *data;
struct resource *res;
char val;
/* Reserve the ISA region */
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev, res->start, SIS5595_EXTENT,
DRIVER_NAME))
return -EBUSY;
data = devm_kzalloc(&pdev->dev, sizeof(struct sis5595_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->lock);
mutex_init(&data->update_lock);
data->addr = res->start;
data->name = DRIVER_NAME;
platform_set_drvdata(pdev, data);
/*
* Check revision and pin registers to determine whether 4 or 5 voltages
*/
data->revision = s_bridge->revision;
/* 4 voltages, 1 temp */
data->maxins = 3;
if (data->revision >= REV2MIN) {
pci_read_config_byte(s_bridge, SIS5595_PIN_REG, &val);
if (!(val & 0x80))
/* 5 voltages, no temps */
data->maxins = 4;
}
/* Initialize the SIS5595 chip */
sis5595_init_device(data);
/* A few vars need to be filled upon startup */
for (i = 0; i < 2; i++) {
data->fan_min[i] = sis5595_read_value(data,
SIS5595_REG_FAN_MIN(i));
}
/* Register sysfs hooks */
err = sysfs_create_group(&pdev->dev.kobj, &sis5595_group);
if (err)
return err;
if (data->maxins == 4) {
err = sysfs_create_group(&pdev->dev.kobj, &sis5595_group_in4);
if (err)
goto exit_remove_files;
} else {
err = sysfs_create_group(&pdev->dev.kobj, &sis5595_group_temp1);
if (err)
goto exit_remove_files;
}
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove_files;
}
return 0;
exit_remove_files:
sysfs_remove_group(&pdev->dev.kobj, &sis5595_group);
sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_in4);
sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_temp1);
return err;
}
static int sis5595_remove(struct platform_device *pdev)
{
struct sis5595_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &sis5595_group);
sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_in4);
sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_temp1);
return 0;
}
static const struct pci_device_id sis5595_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, sis5595_pci_ids);
static int blacklist[] = {
PCI_DEVICE_ID_SI_540,
PCI_DEVICE_ID_SI_550,
PCI_DEVICE_ID_SI_630,
PCI_DEVICE_ID_SI_645,
PCI_DEVICE_ID_SI_730,
PCI_DEVICE_ID_SI_735,
PCI_DEVICE_ID_SI_5511, /*
* 5513 chip has the 0008 device but
* that ID shows up in other chips so we
* use the 5511 ID for recognition
*/
PCI_DEVICE_ID_SI_5597,
PCI_DEVICE_ID_SI_5598,
0 };
static int sis5595_device_add(unsigned short address)
{
struct resource res = {
.start = address,
.end = address + SIS5595_EXTENT - 1,
.name = DRIVER_NAME,
.flags = IORESOURCE_IO,
};
int err;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit;
pdev = platform_device_alloc(DRIVER_NAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static struct platform_driver sis5595_driver = {
.driver = {
.name = DRIVER_NAME,
},
.probe = sis5595_probe,
.remove = sis5595_remove,
};
static int sis5595_pci_probe(struct pci_dev *dev,
const struct pci_device_id *id)
{
u16 address;
u8 enable;
int *i, err;
for (i = blacklist; *i != 0; i++) {
struct pci_dev *d;
d = pci_get_device(PCI_VENDOR_ID_SI, *i, NULL);
if (d) {
dev_err(&d->dev,
"Looked for SIS5595 but found unsupported device %.4x\n",
*i);
pci_dev_put(d);
return -ENODEV;
}
}
force_addr &= ~(SIS5595_EXTENT - 1);
if (force_addr) {
dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", force_addr);
pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
}
err = pci_read_config_word(dev, SIS5595_BASE_REG, &address);
if (err != PCIBIOS_SUCCESSFUL) {
dev_err(&dev->dev, "Failed to read ISA address\n");
return -ENODEV;
}
address &= ~(SIS5595_EXTENT - 1);
if (!address) {
dev_err(&dev->dev,
"Base address not set - upgrade BIOS or use force_addr=0xaddr\n");
return -ENODEV;
}
if (force_addr && address != force_addr) {
/* doesn't work for some chips? */
dev_err(&dev->dev, "Failed to force ISA address\n");
return -ENODEV;
}
err = pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable);
if (err != PCIBIOS_SUCCESSFUL) {
dev_err(&dev->dev, "Failed to read enable register\n");
return -ENODEV;
}
if (!(enable & 0x80)) {
err = pci_write_config_byte(dev, SIS5595_ENABLE_REG, enable | 0x80);
if (err != PCIBIOS_SUCCESSFUL)
goto enable_fail;
err = pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable);
if (err != PCIBIOS_SUCCESSFUL)
goto enable_fail;
/* doesn't work for some chips! */
if (!(enable & 0x80))
goto enable_fail;
}
if (platform_driver_register(&sis5595_driver)) {
dev_dbg(&dev->dev, "Failed to register sis5595 driver\n");
goto exit;
}
s_bridge = pci_dev_get(dev);
/* Sets global pdev as a side effect */
if (sis5595_device_add(address))
goto exit_unregister;
/*
* Always return failure here. This is to allow other drivers to bind
* to this pci device. We don't really want to have control over the
* pci device, we only wanted to read as few register values from it.
*/
return -ENODEV;
enable_fail:
dev_err(&dev->dev, "Failed to enable HWM device\n");
goto exit;
exit_unregister:
pci_dev_put(dev);
platform_driver_unregister(&sis5595_driver);
exit:
return -ENODEV;
}
static struct pci_driver sis5595_pci_driver = {
.name = DRIVER_NAME,
.id_table = sis5595_pci_ids,
.probe = sis5595_pci_probe,
};
static int __init sm_sis5595_init(void)
{
return pci_register_driver(&sis5595_pci_driver);
}
static void __exit sm_sis5595_exit(void)
{
pci_unregister_driver(&sis5595_pci_driver);
if (s_bridge != NULL) {
platform_device_unregister(pdev);
platform_driver_unregister(&sis5595_driver);
pci_dev_put(s_bridge);
s_bridge = NULL;
}
}
MODULE_AUTHOR("Aurelien Jarno <[email protected]>");
MODULE_DESCRIPTION("SiS 5595 Sensor device");
MODULE_LICENSE("GPL");
module_init(sm_sis5595_init);
module_exit(sm_sis5595_exit);
|
linux-master
|
drivers/hwmon/sis5595.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* Sensirion SHT3x-DIS humidity and temperature sensor driver.
* The SHT3x comes in many different versions, this driver is for the
* I2C version only.
*
* Copyright (C) 2016 Sensirion AG, Switzerland
* Author: David Frey <[email protected]>
* Author: Pascal Sachs <[email protected]>
*/
#include <asm/page.h>
#include <linux/crc8.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
/* commands (high repeatability mode) */
static const unsigned char sht3x_cmd_measure_single_hpm[] = { 0x24, 0x00 };
/* commands (medium repeatability mode) */
static const unsigned char sht3x_cmd_measure_single_mpm[] = { 0x24, 0x0b };
/* commands (low repeatability mode) */
static const unsigned char sht3x_cmd_measure_single_lpm[] = { 0x24, 0x16 };
/* commands for periodic mode */
static const unsigned char sht3x_cmd_measure_periodic_mode[] = { 0xe0, 0x00 };
static const unsigned char sht3x_cmd_break[] = { 0x30, 0x93 };
/* commands for heater control */
static const unsigned char sht3x_cmd_heater_on[] = { 0x30, 0x6d };
static const unsigned char sht3x_cmd_heater_off[] = { 0x30, 0x66 };
/* other commands */
static const unsigned char sht3x_cmd_read_status_reg[] = { 0xf3, 0x2d };
static const unsigned char sht3x_cmd_clear_status_reg[] = { 0x30, 0x41 };
/* delays for single-shot mode i2c commands, both in us */
#define SHT3X_SINGLE_WAIT_TIME_HPM 15000
#define SHT3X_SINGLE_WAIT_TIME_MPM 6000
#define SHT3X_SINGLE_WAIT_TIME_LPM 4000
#define SHT3X_WORD_LEN 2
#define SHT3X_CMD_LENGTH 2
#define SHT3X_CRC8_LEN 1
#define SHT3X_RESPONSE_LENGTH 6
#define SHT3X_CRC8_POLYNOMIAL 0x31
#define SHT3X_CRC8_INIT 0xFF
#define SHT3X_MIN_TEMPERATURE -45000
#define SHT3X_MAX_TEMPERATURE 130000
#define SHT3X_MIN_HUMIDITY 0
#define SHT3X_MAX_HUMIDITY 100000
enum sht3x_chips {
sht3x,
sts3x,
};
enum sht3x_limits {
limit_max = 0,
limit_max_hyst,
limit_min,
limit_min_hyst,
};
enum sht3x_repeatability {
low_repeatability,
medium_repeatability,
high_repeatability,
};
DECLARE_CRC8_TABLE(sht3x_crc8_table);
/* periodic measure commands (high repeatability mode) */
static const char periodic_measure_commands_hpm[][SHT3X_CMD_LENGTH] = {
/* 0.5 measurements per second */
{0x20, 0x32},
/* 1 measurements per second */
{0x21, 0x30},
/* 2 measurements per second */
{0x22, 0x36},
/* 4 measurements per second */
{0x23, 0x34},
/* 10 measurements per second */
{0x27, 0x37},
};
/* periodic measure commands (medium repeatability) */
static const char periodic_measure_commands_mpm[][SHT3X_CMD_LENGTH] = {
/* 0.5 measurements per second */
{0x20, 0x24},
/* 1 measurements per second */
{0x21, 0x26},
/* 2 measurements per second */
{0x22, 0x20},
/* 4 measurements per second */
{0x23, 0x22},
/* 10 measurements per second */
{0x27, 0x21},
};
/* periodic measure commands (low repeatability mode) */
static const char periodic_measure_commands_lpm[][SHT3X_CMD_LENGTH] = {
/* 0.5 measurements per second */
{0x20, 0x2f},
/* 1 measurements per second */
{0x21, 0x2d},
/* 2 measurements per second */
{0x22, 0x2b},
/* 4 measurements per second */
{0x23, 0x29},
/* 10 measurements per second */
{0x27, 0x2a},
};
struct sht3x_limit_commands {
const char read_command[SHT3X_CMD_LENGTH];
const char write_command[SHT3X_CMD_LENGTH];
};
static const struct sht3x_limit_commands limit_commands[] = {
/* temp1_max, humidity1_max */
[limit_max] = { {0xe1, 0x1f}, {0x61, 0x1d} },
/* temp_1_max_hyst, humidity1_max_hyst */
[limit_max_hyst] = { {0xe1, 0x14}, {0x61, 0x16} },
/* temp1_min, humidity1_min */
[limit_min] = { {0xe1, 0x02}, {0x61, 0x00} },
/* temp_1_min_hyst, humidity1_min_hyst */
[limit_min_hyst] = { {0xe1, 0x09}, {0x61, 0x0B} },
};
#define SHT3X_NUM_LIMIT_CMD ARRAY_SIZE(limit_commands)
static const u16 mode_to_update_interval[] = {
0,
2000,
1000,
500,
250,
100,
};
static const struct hwmon_channel_info * const sht3x_channel_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MIN |
HWMON_T_MIN_HYST | HWMON_T_MAX |
HWMON_T_MAX_HYST | HWMON_T_ALARM),
HWMON_CHANNEL_INFO(humidity, HWMON_H_INPUT | HWMON_H_MIN |
HWMON_H_MIN_HYST | HWMON_H_MAX |
HWMON_H_MAX_HYST | HWMON_H_ALARM),
NULL,
};
struct sht3x_data {
struct i2c_client *client;
enum sht3x_chips chip_id;
struct mutex i2c_lock; /* lock for sending i2c commands */
struct mutex data_lock; /* lock for updating driver data */
u8 mode;
const unsigned char *command;
u32 wait_time; /* in us*/
unsigned long last_update; /* last update in periodic mode*/
enum sht3x_repeatability repeatability;
/*
* cached values for temperature and humidity and limits
* the limits arrays have the following order:
* max, max_hyst, min, min_hyst
*/
int temperature;
int temperature_limits[SHT3X_NUM_LIMIT_CMD];
u32 humidity;
u32 humidity_limits[SHT3X_NUM_LIMIT_CMD];
};
static u8 get_mode_from_update_interval(u16 value)
{
size_t index;
u8 number_of_modes = ARRAY_SIZE(mode_to_update_interval);
if (value == 0)
return 0;
/* find next faster update interval */
for (index = 1; index < number_of_modes; index++) {
if (mode_to_update_interval[index] <= value)
return index;
}
return number_of_modes - 1;
}
static int sht3x_read_from_command(struct i2c_client *client,
struct sht3x_data *data,
const char *command,
char *buf, int length, u32 wait_time)
{
int ret;
mutex_lock(&data->i2c_lock);
ret = i2c_master_send(client, command, SHT3X_CMD_LENGTH);
if (ret != SHT3X_CMD_LENGTH) {
ret = ret < 0 ? ret : -EIO;
goto out;
}
if (wait_time)
usleep_range(wait_time, wait_time + 1000);
ret = i2c_master_recv(client, buf, length);
if (ret != length) {
ret = ret < 0 ? ret : -EIO;
goto out;
}
ret = 0;
out:
mutex_unlock(&data->i2c_lock);
return ret;
}
static int sht3x_extract_temperature(u16 raw)
{
/*
* From datasheet:
* T = -45 + 175 * ST / 2^16
* Adapted for integer fixed point (3 digit) arithmetic.
*/
return ((21875 * (int)raw) >> 13) - 45000;
}
static u32 sht3x_extract_humidity(u16 raw)
{
/*
* From datasheet:
* RH = 100 * SRH / 2^16
* Adapted for integer fixed point (3 digit) arithmetic.
*/
return (12500 * (u32)raw) >> 13;
}
static struct sht3x_data *sht3x_update_client(struct device *dev)
{
struct sht3x_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u16 interval_ms = mode_to_update_interval[data->mode];
unsigned long interval_jiffies = msecs_to_jiffies(interval_ms);
unsigned char buf[SHT3X_RESPONSE_LENGTH];
u16 val;
int ret = 0;
mutex_lock(&data->data_lock);
/*
* Only update cached readings once per update interval in periodic
* mode. In single shot mode the sensor measures values on demand, so
* every time the sysfs interface is called, a measurement is triggered.
* In periodic mode however, the measurement process is handled
* internally by the sensor and reading out sensor values only makes
* sense if a new reading is available.
*/
if (time_after(jiffies, data->last_update + interval_jiffies)) {
ret = sht3x_read_from_command(client, data, data->command, buf,
sizeof(buf), data->wait_time);
if (ret)
goto out;
val = be16_to_cpup((__be16 *)buf);
data->temperature = sht3x_extract_temperature(val);
val = be16_to_cpup((__be16 *)(buf + 3));
data->humidity = sht3x_extract_humidity(val);
data->last_update = jiffies;
}
out:
mutex_unlock(&data->data_lock);
if (ret)
return ERR_PTR(ret);
return data;
}
static int temp1_input_read(struct device *dev)
{
struct sht3x_data *data = sht3x_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return data->temperature;
}
static int humidity1_input_read(struct device *dev)
{
struct sht3x_data *data = sht3x_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return data->humidity;
}
/*
* limits_update must only be called from probe or with data_lock held
*/
static int limits_update(struct sht3x_data *data)
{
int ret;
u8 index;
int temperature;
u32 humidity;
u16 raw;
char buffer[SHT3X_RESPONSE_LENGTH];
const struct sht3x_limit_commands *commands;
struct i2c_client *client = data->client;
for (index = 0; index < SHT3X_NUM_LIMIT_CMD; index++) {
commands = &limit_commands[index];
ret = sht3x_read_from_command(client, data,
commands->read_command, buffer,
SHT3X_RESPONSE_LENGTH, 0);
if (ret)
return ret;
raw = be16_to_cpup((__be16 *)buffer);
temperature = sht3x_extract_temperature((raw & 0x01ff) << 7);
humidity = sht3x_extract_humidity(raw & 0xfe00);
data->temperature_limits[index] = temperature;
data->humidity_limits[index] = humidity;
}
return ret;
}
static int temp1_limit_read(struct device *dev, int index)
{
struct sht3x_data *data = dev_get_drvdata(dev);
return data->temperature_limits[index];
}
static int humidity1_limit_read(struct device *dev, int index)
{
struct sht3x_data *data = dev_get_drvdata(dev);
return data->humidity_limits[index];
}
/*
* limit_write must only be called with data_lock held
*/
static size_t limit_write(struct device *dev,
u8 index,
int temperature,
u32 humidity)
{
char buffer[SHT3X_CMD_LENGTH + SHT3X_WORD_LEN + SHT3X_CRC8_LEN];
char *position = buffer;
int ret;
u16 raw;
struct sht3x_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
const struct sht3x_limit_commands *commands;
commands = &limit_commands[index];
memcpy(position, commands->write_command, SHT3X_CMD_LENGTH);
position += SHT3X_CMD_LENGTH;
/*
* ST = (T + 45) / 175 * 2^16
* SRH = RH / 100 * 2^16
* adapted for fixed point arithmetic and packed the same as
* in limit_read()
*/
raw = ((u32)(temperature + 45000) * 24543) >> (16 + 7);
raw |= ((humidity * 42950) >> 16) & 0xfe00;
*((__be16 *)position) = cpu_to_be16(raw);
position += SHT3X_WORD_LEN;
*position = crc8(sht3x_crc8_table,
position - SHT3X_WORD_LEN,
SHT3X_WORD_LEN,
SHT3X_CRC8_INIT);
mutex_lock(&data->i2c_lock);
ret = i2c_master_send(client, buffer, sizeof(buffer));
mutex_unlock(&data->i2c_lock);
if (ret != sizeof(buffer))
return ret < 0 ? ret : -EIO;
data->temperature_limits[index] = temperature;
data->humidity_limits[index] = humidity;
return 0;
}
static int temp1_limit_write(struct device *dev, int index, int val)
{
int temperature;
int ret;
struct sht3x_data *data = dev_get_drvdata(dev);
temperature = clamp_val(val, SHT3X_MIN_TEMPERATURE,
SHT3X_MAX_TEMPERATURE);
mutex_lock(&data->data_lock);
ret = limit_write(dev, index, temperature,
data->humidity_limits[index]);
mutex_unlock(&data->data_lock);
return ret;
}
static int humidity1_limit_write(struct device *dev, int index, int val)
{
u32 humidity;
int ret;
struct sht3x_data *data = dev_get_drvdata(dev);
humidity = clamp_val(val, SHT3X_MIN_HUMIDITY, SHT3X_MAX_HUMIDITY);
mutex_lock(&data->data_lock);
ret = limit_write(dev, index, data->temperature_limits[index],
humidity);
mutex_unlock(&data->data_lock);
return ret;
}
static void sht3x_select_command(struct sht3x_data *data)
{
/*
* For single-shot mode, only non blocking mode is support,
* we have to wait ourselves for result.
*/
if (data->mode > 0) {
data->command = sht3x_cmd_measure_periodic_mode;
data->wait_time = 0;
} else {
if (data->repeatability == high_repeatability) {
data->command = sht3x_cmd_measure_single_hpm;
data->wait_time = SHT3X_SINGLE_WAIT_TIME_HPM;
} else if (data->repeatability == medium_repeatability) {
data->command = sht3x_cmd_measure_single_mpm;
data->wait_time = SHT3X_SINGLE_WAIT_TIME_MPM;
} else {
data->command = sht3x_cmd_measure_single_lpm;
data->wait_time = SHT3X_SINGLE_WAIT_TIME_LPM;
}
}
}
static int status_register_read(struct device *dev,
char *buffer, int length)
{
int ret;
struct sht3x_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
ret = sht3x_read_from_command(client, data, sht3x_cmd_read_status_reg,
buffer, length, 0);
return ret;
}
static int temp1_alarm_read(struct device *dev)
{
char buffer[SHT3X_WORD_LEN + SHT3X_CRC8_LEN];
int ret;
ret = status_register_read(dev, buffer,
SHT3X_WORD_LEN + SHT3X_CRC8_LEN);
if (ret)
return ret;
return !!(buffer[0] & 0x04);
}
static int humidity1_alarm_read(struct device *dev)
{
char buffer[SHT3X_WORD_LEN + SHT3X_CRC8_LEN];
int ret;
ret = status_register_read(dev, buffer,
SHT3X_WORD_LEN + SHT3X_CRC8_LEN);
if (ret)
return ret;
return !!(buffer[0] & 0x08);
}
static ssize_t heater_enable_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
char buffer[SHT3X_WORD_LEN + SHT3X_CRC8_LEN];
int ret;
ret = status_register_read(dev, buffer,
SHT3X_WORD_LEN + SHT3X_CRC8_LEN);
if (ret)
return ret;
return sysfs_emit(buf, "%d\n", !!(buffer[0] & 0x20));
}
static ssize_t heater_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf,
size_t count)
{
struct sht3x_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
bool status;
ret = kstrtobool(buf, &status);
if (ret)
return ret;
mutex_lock(&data->i2c_lock);
if (status)
ret = i2c_master_send(client, (char *)&sht3x_cmd_heater_on,
SHT3X_CMD_LENGTH);
else
ret = i2c_master_send(client, (char *)&sht3x_cmd_heater_off,
SHT3X_CMD_LENGTH);
mutex_unlock(&data->i2c_lock);
return ret;
}
static int update_interval_read(struct device *dev)
{
struct sht3x_data *data = dev_get_drvdata(dev);
return mode_to_update_interval[data->mode];
}
static int update_interval_write(struct device *dev, int val)
{
u8 mode;
int ret;
const char *command;
struct sht3x_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
mode = get_mode_from_update_interval(val);
mutex_lock(&data->data_lock);
/* mode did not change */
if (mode == data->mode) {
mutex_unlock(&data->data_lock);
return 0;
}
mutex_lock(&data->i2c_lock);
/*
* Abort periodic measure mode.
* To do any changes to the configuration while in periodic mode, we
* have to send a break command to the sensor, which then falls back
* to single shot (mode = 0).
*/
if (data->mode > 0) {
ret = i2c_master_send(client, sht3x_cmd_break,
SHT3X_CMD_LENGTH);
if (ret != SHT3X_CMD_LENGTH)
goto out;
data->mode = 0;
}
if (mode > 0) {
if (data->repeatability == high_repeatability)
command = periodic_measure_commands_hpm[mode - 1];
else if (data->repeatability == medium_repeatability)
command = periodic_measure_commands_mpm[mode - 1];
else
command = periodic_measure_commands_lpm[mode - 1];
/* select mode */
ret = i2c_master_send(client, command, SHT3X_CMD_LENGTH);
if (ret != SHT3X_CMD_LENGTH)
goto out;
}
/* select mode and command */
data->mode = mode;
sht3x_select_command(data);
out:
mutex_unlock(&data->i2c_lock);
mutex_unlock(&data->data_lock);
if (ret != SHT3X_CMD_LENGTH)
return ret < 0 ? ret : -EIO;
return 0;
}
static ssize_t repeatability_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct sht3x_data *data = dev_get_drvdata(dev);
return sysfs_emit(buf, "%d\n", data->repeatability);
}
static ssize_t repeatability_store(struct device *dev,
struct device_attribute *attr,
const char *buf,
size_t count)
{
int ret;
u8 val;
struct sht3x_data *data = dev_get_drvdata(dev);
ret = kstrtou8(buf, 0, &val);
if (ret)
return ret;
if (val > 2)
return -EINVAL;
data->repeatability = val;
return count;
}
static SENSOR_DEVICE_ATTR_RW(heater_enable, heater_enable, 0);
static SENSOR_DEVICE_ATTR_RW(repeatability, repeatability, 0);
static struct attribute *sht3x_attrs[] = {
&sensor_dev_attr_heater_enable.dev_attr.attr,
&sensor_dev_attr_repeatability.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(sht3x);
static umode_t sht3x_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct sht3x_data *chip_data = data;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return 0644;
default:
break;
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_alarm:
return 0444;
case hwmon_temp_max:
case hwmon_temp_max_hyst:
case hwmon_temp_min:
case hwmon_temp_min_hyst:
return 0644;
default:
break;
}
break;
case hwmon_humidity:
if (chip_data->chip_id == sts3x)
break;
switch (attr) {
case hwmon_humidity_input:
case hwmon_humidity_alarm:
return 0444;
case hwmon_humidity_max:
case hwmon_humidity_max_hyst:
case hwmon_humidity_min:
case hwmon_humidity_min_hyst:
return 0644;
default:
break;
}
break;
default:
break;
}
return 0;
}
static int sht3x_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
enum sht3x_limits index;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
*val = update_interval_read(dev);
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
*val = temp1_input_read(dev);
break;
case hwmon_temp_alarm:
*val = temp1_alarm_read(dev);
break;
case hwmon_temp_max:
index = limit_max;
*val = temp1_limit_read(dev, index);
break;
case hwmon_temp_max_hyst:
index = limit_max_hyst;
*val = temp1_limit_read(dev, index);
break;
case hwmon_temp_min:
index = limit_min;
*val = temp1_limit_read(dev, index);
break;
case hwmon_temp_min_hyst:
index = limit_min_hyst;
*val = temp1_limit_read(dev, index);
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_humidity:
switch (attr) {
case hwmon_humidity_input:
*val = humidity1_input_read(dev);
break;
case hwmon_humidity_alarm:
*val = humidity1_alarm_read(dev);
break;
case hwmon_humidity_max:
index = limit_max;
*val = humidity1_limit_read(dev, index);
break;
case hwmon_humidity_max_hyst:
index = limit_max_hyst;
*val = humidity1_limit_read(dev, index);
break;
case hwmon_humidity_min:
index = limit_min;
*val = humidity1_limit_read(dev, index);
break;
case hwmon_humidity_min_hyst:
index = limit_min_hyst;
*val = humidity1_limit_read(dev, index);
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int sht3x_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
enum sht3x_limits index;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
return update_interval_write(dev, val);
default:
return -EOPNOTSUPP;
}
case hwmon_temp:
switch (attr) {
case hwmon_temp_max:
index = limit_max;
break;
case hwmon_temp_max_hyst:
index = limit_max_hyst;
break;
case hwmon_temp_min:
index = limit_min;
break;
case hwmon_temp_min_hyst:
index = limit_min_hyst;
break;
default:
return -EOPNOTSUPP;
}
return temp1_limit_write(dev, index, val);
case hwmon_humidity:
switch (attr) {
case hwmon_humidity_max:
index = limit_max;
break;
case hwmon_humidity_max_hyst:
index = limit_max_hyst;
break;
case hwmon_humidity_min:
index = limit_min;
break;
case hwmon_humidity_min_hyst:
index = limit_min_hyst;
break;
default:
return -EOPNOTSUPP;
}
return humidity1_limit_write(dev, index, val);
default:
return -EOPNOTSUPP;
}
}
static const struct hwmon_ops sht3x_ops = {
.is_visible = sht3x_is_visible,
.read = sht3x_read,
.write = sht3x_write,
};
static const struct hwmon_chip_info sht3x_chip_info = {
.ops = &sht3x_ops,
.info = sht3x_channel_info,
};
/* device ID table */
static const struct i2c_device_id sht3x_ids[] = {
{"sht3x", sht3x},
{"sts3x", sts3x},
{}
};
MODULE_DEVICE_TABLE(i2c, sht3x_ids);
static int sht3x_probe(struct i2c_client *client)
{
int ret;
struct sht3x_data *data;
struct device *hwmon_dev;
struct i2c_adapter *adap = client->adapter;
struct device *dev = &client->dev;
/*
* we require full i2c support since the sht3x uses multi-byte read and
* writes as well as multi-byte commands which are not supported by
* the smbus protocol
*/
if (!i2c_check_functionality(adap, I2C_FUNC_I2C))
return -ENODEV;
ret = i2c_master_send(client, sht3x_cmd_clear_status_reg,
SHT3X_CMD_LENGTH);
if (ret != SHT3X_CMD_LENGTH)
return ret < 0 ? ret : -ENODEV;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->repeatability = high_repeatability;
data->mode = 0;
data->last_update = jiffies - msecs_to_jiffies(3000);
data->client = client;
data->chip_id = i2c_match_id(sht3x_ids, client)->driver_data;
crc8_populate_msb(sht3x_crc8_table, SHT3X_CRC8_POLYNOMIAL);
sht3x_select_command(data);
mutex_init(&data->i2c_lock);
mutex_init(&data->data_lock);
/*
* An attempt to read limits register too early
* causes a NACK response from the chip.
* Waiting for an empirical delay of 500 us solves the issue.
*/
usleep_range(500, 600);
ret = limits_update(data);
if (ret)
return ret;
hwmon_dev = devm_hwmon_device_register_with_info(dev,
client->name,
data,
&sht3x_chip_info,
sht3x_groups);
if (IS_ERR(hwmon_dev))
dev_dbg(dev, "unable to register hwmon device\n");
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct i2c_driver sht3x_i2c_driver = {
.driver.name = "sht3x",
.probe = sht3x_probe,
.id_table = sht3x_ids,
};
module_i2c_driver(sht3x_i2c_driver);
MODULE_AUTHOR("David Frey <[email protected]>");
MODULE_AUTHOR("Pascal Sachs <[email protected]>");
MODULE_DESCRIPTION("Sensirion SHT3x humidity and temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/sht3x.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Fan Control HDL CORE driver
*
* Copyright 2019 Analog Devices Inc.
*/
#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/fpga/adi-axi-common.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
/* register map */
#define ADI_REG_RSTN 0x0080
#define ADI_REG_PWM_WIDTH 0x0084
#define ADI_REG_TACH_PERIOD 0x0088
#define ADI_REG_TACH_TOLERANCE 0x008c
#define ADI_REG_PWM_PERIOD 0x00c0
#define ADI_REG_TACH_MEASUR 0x00c4
#define ADI_REG_TEMPERATURE 0x00c8
#define ADI_REG_TEMP_00_H 0x0100
#define ADI_REG_TEMP_25_L 0x0104
#define ADI_REG_TEMP_25_H 0x0108
#define ADI_REG_TEMP_50_L 0x010c
#define ADI_REG_TEMP_50_H 0x0110
#define ADI_REG_TEMP_75_L 0x0114
#define ADI_REG_TEMP_75_H 0x0118
#define ADI_REG_TEMP_100_L 0x011c
#define ADI_REG_IRQ_MASK 0x0040
#define ADI_REG_IRQ_PENDING 0x0044
#define ADI_REG_IRQ_SRC 0x0048
/* IRQ sources */
#define ADI_IRQ_SRC_PWM_CHANGED BIT(0)
#define ADI_IRQ_SRC_TACH_ERR BIT(1)
#define ADI_IRQ_SRC_TEMP_INCREASE BIT(2)
#define ADI_IRQ_SRC_NEW_MEASUR BIT(3)
#define ADI_IRQ_SRC_MASK GENMASK(3, 0)
#define ADI_IRQ_MASK_OUT_ALL 0xFFFFFFFFU
#define SYSFS_PWM_MAX 255
struct axi_fan_control_data {
void __iomem *base;
struct device *hdev;
unsigned long clk_rate;
int irq;
/* pulses per revolution */
u32 ppr;
bool hw_pwm_req;
bool update_tacho_params;
u8 fan_fault;
};
static inline void axi_iowrite(const u32 val, const u32 reg,
const struct axi_fan_control_data *ctl)
{
iowrite32(val, ctl->base + reg);
}
static inline u32 axi_ioread(const u32 reg,
const struct axi_fan_control_data *ctl)
{
return ioread32(ctl->base + reg);
}
/*
* The core calculates the temperature as:
* T = /raw * 509.3140064 / 65535) - 280.2308787
*/
static ssize_t axi_fan_control_show(struct device *dev, struct device_attribute *da, char *buf)
{
struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u32 temp = axi_ioread(attr->index, ctl);
temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230;
return sprintf(buf, "%u\n", temp);
}
static ssize_t axi_fan_control_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u32 temp;
int ret;
ret = kstrtou32(buf, 10, &temp);
if (ret)
return ret;
temp = DIV_ROUND_CLOSEST_ULL((temp + 280230) * 65535ULL, 509314);
axi_iowrite(temp, attr->index, ctl);
return count;
}
static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl)
{
u32 pwm_width = axi_ioread(ADI_REG_PWM_WIDTH, ctl);
u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
/*
* PWM_PERIOD is a RO register set by the core. It should never be 0.
* For now we are trusting the HW...
*/
return DIV_ROUND_CLOSEST(pwm_width * SYSFS_PWM_MAX, pwm_period);
}
static int axi_fan_control_set_pwm_duty(const long val,
struct axi_fan_control_data *ctl)
{
u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
u32 new_width;
long __val = clamp_val(val, 0, SYSFS_PWM_MAX);
new_width = DIV_ROUND_CLOSEST(__val * pwm_period, SYSFS_PWM_MAX);
axi_iowrite(new_width, ADI_REG_PWM_WIDTH, ctl);
return 0;
}
static long axi_fan_control_get_fan_rpm(const struct axi_fan_control_data *ctl)
{
const u32 tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
if (tach == 0)
/* should we return error, EAGAIN maybe? */
return 0;
/*
* The tacho period should be:
* TACH = 60/(ppr * rpm), where rpm is revolutions per second
* and ppr is pulses per revolution.
* Given the tacho period, we can multiply it by the input clock
* so that we know how many clocks we need to have this period.
* From this, we can derive the RPM value.
*/
return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach);
}
static int axi_fan_control_read_temp(struct device *dev, u32 attr, long *val)
{
struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
long raw_temp;
switch (attr) {
case hwmon_temp_input:
raw_temp = axi_ioread(ADI_REG_TEMPERATURE, ctl);
/*
* The formula for the temperature is:
* T = (ADC * 501.3743 / 2^bits) - 273.6777
* It's multiplied by 1000 to have millidegrees as
* specified by the hwmon sysfs interface.
*/
*val = ((raw_temp * 501374) >> 16) - 273677;
return 0;
default:
return -ENOTSUPP;
}
}
static int axi_fan_control_read_fan(struct device *dev, u32 attr, long *val)
{
struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
switch (attr) {
case hwmon_fan_fault:
*val = ctl->fan_fault;
/* clear it now */
ctl->fan_fault = 0;
return 0;
case hwmon_fan_input:
*val = axi_fan_control_get_fan_rpm(ctl);
return 0;
default:
return -ENOTSUPP;
}
}
static int axi_fan_control_read_pwm(struct device *dev, u32 attr, long *val)
{
struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
switch (attr) {
case hwmon_pwm_input:
*val = axi_fan_control_get_pwm_duty(ctl);
return 0;
default:
return -ENOTSUPP;
}
}
static int axi_fan_control_write_pwm(struct device *dev, u32 attr, long val)
{
struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
switch (attr) {
case hwmon_pwm_input:
return axi_fan_control_set_pwm_duty(val, ctl);
default:
return -ENOTSUPP;
}
}
static int axi_fan_control_read_labels(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
switch (type) {
case hwmon_fan:
*str = "FAN";
return 0;
case hwmon_temp:
*str = "SYSMON4";
return 0;
default:
return -ENOTSUPP;
}
}
static int axi_fan_control_read(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_fan:
return axi_fan_control_read_fan(dev, attr, val);
case hwmon_pwm:
return axi_fan_control_read_pwm(dev, attr, val);
case hwmon_temp:
return axi_fan_control_read_temp(dev, attr, val);
default:
return -ENOTSUPP;
}
}
static int axi_fan_control_write(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_pwm:
return axi_fan_control_write_pwm(dev, attr, val);
default:
return -ENOTSUPP;
}
}
static umode_t axi_fan_control_fan_is_visible(const u32 attr)
{
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_fault:
case hwmon_fan_label:
return 0444;
default:
return 0;
}
}
static umode_t axi_fan_control_pwm_is_visible(const u32 attr)
{
switch (attr) {
case hwmon_pwm_input:
return 0644;
default:
return 0;
}
}
static umode_t axi_fan_control_temp_is_visible(const u32 attr)
{
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_label:
return 0444;
default:
return 0;
}
}
static umode_t axi_fan_control_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_fan:
return axi_fan_control_fan_is_visible(attr);
case hwmon_pwm:
return axi_fan_control_pwm_is_visible(attr);
case hwmon_temp:
return axi_fan_control_temp_is_visible(attr);
default:
return 0;
}
}
/*
* This core has two main ways of changing the PWM duty cycle. It is done,
* either by a request from userspace (writing on pwm1_input) or by the
* core itself. When the change is done by the core, it will use predefined
* parameters to evaluate the tach signal and, on that case we cannot set them.
* On the other hand, when the request is done by the user, with some arbitrary
* value that the core does not now about, we have to provide the tach
* parameters so that, the core can evaluate the signal. On the IRQ handler we
* distinguish this by using the ADI_IRQ_SRC_TEMP_INCREASE interrupt. This tell
* us that the CORE requested a new duty cycle. After this, there is 5s delay
* on which the core waits for the fan rotation speed to stabilize. After this
* we get ADI_IRQ_SRC_PWM_CHANGED irq where we will decide if we need to set
* the tach parameters or not on the next tach measurement cycle (corresponding
* already to the ney duty cycle) based on the %ctl->hw_pwm_req flag.
*/
static irqreturn_t axi_fan_control_irq_handler(int irq, void *data)
{
struct axi_fan_control_data *ctl = (struct axi_fan_control_data *)data;
u32 irq_pending = axi_ioread(ADI_REG_IRQ_PENDING, ctl);
u32 clear_mask;
if (irq_pending & ADI_IRQ_SRC_TEMP_INCREASE)
/* hardware requested a new pwm */
ctl->hw_pwm_req = true;
if (irq_pending & ADI_IRQ_SRC_PWM_CHANGED) {
/*
* if the pwm changes on behalf of software,
* we need to provide new tacho parameters to the core.
* Wait for the next measurement for that...
*/
if (!ctl->hw_pwm_req) {
ctl->update_tacho_params = true;
} else {
ctl->hw_pwm_req = false;
hwmon_notify_event(ctl->hdev, hwmon_pwm,
hwmon_pwm_input, 0);
}
}
if (irq_pending & ADI_IRQ_SRC_NEW_MEASUR) {
if (ctl->update_tacho_params) {
u32 new_tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
/* get 25% tolerance */
u32 tach_tol = DIV_ROUND_CLOSEST(new_tach * 25, 100);
/* set new tacho parameters */
axi_iowrite(new_tach, ADI_REG_TACH_PERIOD, ctl);
axi_iowrite(tach_tol, ADI_REG_TACH_TOLERANCE, ctl);
ctl->update_tacho_params = false;
}
}
if (irq_pending & ADI_IRQ_SRC_TACH_ERR)
ctl->fan_fault = 1;
/* clear all interrupts */
clear_mask = irq_pending & ADI_IRQ_SRC_MASK;
axi_iowrite(clear_mask, ADI_REG_IRQ_PENDING, ctl);
return IRQ_HANDLED;
}
static int axi_fan_control_init(struct axi_fan_control_data *ctl,
const struct device_node *np)
{
int ret;
/* get fan pulses per revolution */
ret = of_property_read_u32(np, "pulses-per-revolution", &ctl->ppr);
if (ret)
return ret;
/* 1, 2 and 4 are the typical and accepted values */
if (ctl->ppr != 1 && ctl->ppr != 2 && ctl->ppr != 4)
return -EINVAL;
/*
* Enable all IRQs
*/
axi_iowrite(ADI_IRQ_MASK_OUT_ALL &
~(ADI_IRQ_SRC_NEW_MEASUR | ADI_IRQ_SRC_TACH_ERR |
ADI_IRQ_SRC_PWM_CHANGED | ADI_IRQ_SRC_TEMP_INCREASE),
ADI_REG_IRQ_MASK, ctl);
/* bring the device out of reset */
axi_iowrite(0x01, ADI_REG_RSTN, ctl);
return ret;
}
static const struct hwmon_channel_info * const axi_fan_control_info[] = {
HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT),
HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_LABEL),
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_LABEL),
NULL
};
static const struct hwmon_ops axi_fan_control_hwmon_ops = {
.is_visible = axi_fan_control_is_visible,
.read = axi_fan_control_read,
.write = axi_fan_control_write,
.read_string = axi_fan_control_read_labels,
};
static const struct hwmon_chip_info axi_chip_info = {
.ops = &axi_fan_control_hwmon_ops,
.info = axi_fan_control_info,
};
/* temperature threshold below which PWM should be 0% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp_hyst, axi_fan_control, ADI_REG_TEMP_00_H);
/* temperature threshold above which PWM should be 25% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp, axi_fan_control, ADI_REG_TEMP_25_L);
/* temperature threshold below which PWM should be 25% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp_hyst, axi_fan_control, ADI_REG_TEMP_25_H);
/* temperature threshold above which PWM should be 50% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp, axi_fan_control, ADI_REG_TEMP_50_L);
/* temperature threshold below which PWM should be 50% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp_hyst, axi_fan_control, ADI_REG_TEMP_50_H);
/* temperature threshold above which PWM should be 75% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp, axi_fan_control, ADI_REG_TEMP_75_L);
/* temperature threshold below which PWM should be 75% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp_hyst, axi_fan_control, ADI_REG_TEMP_75_H);
/* temperature threshold above which PWM should be 100% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp, axi_fan_control, ADI_REG_TEMP_100_L);
static struct attribute *axi_fan_control_attrs[] = {
&sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(axi_fan_control);
static const u32 version_1_0_0 = ADI_AXI_PCORE_VER(1, 0, 'a');
static const struct of_device_id axi_fan_control_of_match[] = {
{ .compatible = "adi,axi-fan-control-1.00.a",
.data = (void *)&version_1_0_0},
{},
};
MODULE_DEVICE_TABLE(of, axi_fan_control_of_match);
static int axi_fan_control_probe(struct platform_device *pdev)
{
struct axi_fan_control_data *ctl;
struct clk *clk;
const struct of_device_id *id;
const char *name = "axi_fan_control";
u32 version;
int ret;
id = of_match_node(axi_fan_control_of_match, pdev->dev.of_node);
if (!id)
return -EINVAL;
ctl = devm_kzalloc(&pdev->dev, sizeof(*ctl), GFP_KERNEL);
if (!ctl)
return -ENOMEM;
ctl->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(ctl->base))
return PTR_ERR(ctl->base);
clk = devm_clk_get_enabled(&pdev->dev, NULL);
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "clk_get failed with %ld\n", PTR_ERR(clk));
return PTR_ERR(clk);
}
ctl->clk_rate = clk_get_rate(clk);
if (!ctl->clk_rate)
return -EINVAL;
version = axi_ioread(ADI_AXI_REG_VERSION, ctl);
if (ADI_AXI_PCORE_VER_MAJOR(version) !=
ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data))) {
dev_err(&pdev->dev, "Major version mismatch. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data)),
ADI_AXI_PCORE_VER_MINOR((*(u32 *)id->data)),
ADI_AXI_PCORE_VER_PATCH((*(u32 *)id->data)),
ADI_AXI_PCORE_VER_MAJOR(version),
ADI_AXI_PCORE_VER_MINOR(version),
ADI_AXI_PCORE_VER_PATCH(version));
return -ENODEV;
}
ctl->irq = platform_get_irq(pdev, 0);
if (ctl->irq < 0)
return ctl->irq;
ret = devm_request_threaded_irq(&pdev->dev, ctl->irq, NULL,
axi_fan_control_irq_handler,
IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
pdev->driver_override, ctl);
if (ret) {
dev_err(&pdev->dev, "failed to request an irq, %d", ret);
return ret;
}
ret = axi_fan_control_init(ctl, pdev->dev.of_node);
if (ret) {
dev_err(&pdev->dev, "Failed to initialize device\n");
return ret;
}
ctl->hdev = devm_hwmon_device_register_with_info(&pdev->dev,
name,
ctl,
&axi_chip_info,
axi_fan_control_groups);
return PTR_ERR_OR_ZERO(ctl->hdev);
}
static struct platform_driver axi_fan_control_driver = {
.driver = {
.name = "axi_fan_control_driver",
.of_match_table = axi_fan_control_of_match,
},
.probe = axi_fan_control_probe,
};
module_platform_driver(axi_fan_control_driver);
MODULE_AUTHOR("Nuno Sa <[email protected]>");
MODULE_DESCRIPTION("Analog Devices Fan Control HDL CORE driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/axi-fan-control.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Raspberry Pi voltage sensor driver
*
* Based on firmware/raspberrypi.c by Noralf Trønnes
*
* Copyright (C) 2018 Stefan Wahren <[email protected]>
*/
#include <linux/device.h>
#include <linux/devm-helpers.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <soc/bcm2835/raspberrypi-firmware.h>
#define UNDERVOLTAGE_STICKY_BIT BIT(16)
struct rpi_hwmon_data {
struct device *hwmon_dev;
struct rpi_firmware *fw;
u32 last_throttled;
struct delayed_work get_values_poll_work;
};
static void rpi_firmware_get_throttled(struct rpi_hwmon_data *data)
{
u32 new_uv, old_uv, value;
int ret;
/* Request firmware to clear sticky bits */
value = 0xffff;
ret = rpi_firmware_property(data->fw, RPI_FIRMWARE_GET_THROTTLED,
&value, sizeof(value));
if (ret) {
dev_err_once(data->hwmon_dev, "Failed to get throttled (%d)\n",
ret);
return;
}
new_uv = value & UNDERVOLTAGE_STICKY_BIT;
old_uv = data->last_throttled & UNDERVOLTAGE_STICKY_BIT;
data->last_throttled = value;
if (new_uv == old_uv)
return;
if (new_uv)
dev_crit(data->hwmon_dev, "Undervoltage detected!\n");
else
dev_info(data->hwmon_dev, "Voltage normalised\n");
hwmon_notify_event(data->hwmon_dev, hwmon_in, hwmon_in_lcrit_alarm, 0);
}
static void get_values_poll(struct work_struct *work)
{
struct rpi_hwmon_data *data;
data = container_of(work, struct rpi_hwmon_data,
get_values_poll_work.work);
rpi_firmware_get_throttled(data);
/*
* We can't run faster than the sticky shift (100ms) since we get
* flipping in the sticky bits that are cleared.
*/
schedule_delayed_work(&data->get_values_poll_work, 2 * HZ);
}
static int rpi_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct rpi_hwmon_data *data = dev_get_drvdata(dev);
*val = !!(data->last_throttled & UNDERVOLTAGE_STICKY_BIT);
return 0;
}
static umode_t rpi_is_visible(const void *_data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
return 0444;
}
static const struct hwmon_channel_info * const rpi_info[] = {
HWMON_CHANNEL_INFO(in,
HWMON_I_LCRIT_ALARM),
NULL
};
static const struct hwmon_ops rpi_hwmon_ops = {
.is_visible = rpi_is_visible,
.read = rpi_read,
};
static const struct hwmon_chip_info rpi_chip_info = {
.ops = &rpi_hwmon_ops,
.info = rpi_info,
};
static int rpi_hwmon_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct rpi_hwmon_data *data;
int ret;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
/* Parent driver assure that firmware is correct */
data->fw = dev_get_drvdata(dev->parent);
data->hwmon_dev = devm_hwmon_device_register_with_info(dev, "rpi_volt",
data,
&rpi_chip_info,
NULL);
if (IS_ERR(data->hwmon_dev))
return PTR_ERR(data->hwmon_dev);
ret = devm_delayed_work_autocancel(dev, &data->get_values_poll_work,
get_values_poll);
if (ret)
return ret;
platform_set_drvdata(pdev, data);
schedule_delayed_work(&data->get_values_poll_work, 2 * HZ);
return 0;
}
static struct platform_driver rpi_hwmon_driver = {
.probe = rpi_hwmon_probe,
.driver = {
.name = "raspberrypi-hwmon",
},
};
module_platform_driver(rpi_hwmon_driver);
MODULE_AUTHOR("Stefan Wahren <[email protected]>");
MODULE_DESCRIPTION("Raspberry Pi voltage sensor driver");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:raspberrypi-hwmon");
|
linux-master
|
drivers/hwmon/raspberrypi-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Linear Technology LTC4222 Dual Hot Swap controller
*
* Copyright (c) 2014 Guenter Roeck
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/bitops.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
#include <linux/regmap.h>
/* chip registers */
#define LTC4222_CONTROL1 0xd0
#define LTC4222_ALERT1 0xd1
#define LTC4222_STATUS1 0xd2
#define LTC4222_FAULT1 0xd3
#define LTC4222_CONTROL2 0xd4
#define LTC4222_ALERT2 0xd5
#define LTC4222_STATUS2 0xd6
#define LTC4222_FAULT2 0xd7
#define LTC4222_SOURCE1 0xd8
#define LTC4222_SOURCE2 0xda
#define LTC4222_ADIN1 0xdc
#define LTC4222_ADIN2 0xde
#define LTC4222_SENSE1 0xe0
#define LTC4222_SENSE2 0xe2
#define LTC4222_ADC_CONTROL 0xe4
/*
* Fault register bits
*/
#define FAULT_OV BIT(0)
#define FAULT_UV BIT(1)
#define FAULT_OC BIT(2)
#define FAULT_POWER_BAD BIT(3)
#define FAULT_FET_BAD BIT(5)
/* Return the voltage from the given register in mV or mA */
static int ltc4222_get_value(struct device *dev, u8 reg)
{
struct regmap *regmap = dev_get_drvdata(dev);
unsigned int val;
u8 buf[2];
int ret;
ret = regmap_bulk_read(regmap, reg, buf, 2);
if (ret < 0)
return ret;
val = ((buf[0] << 8) + buf[1]) >> 6;
switch (reg) {
case LTC4222_ADIN1:
case LTC4222_ADIN2:
/* 1.25 mV resolution. Convert to mV. */
val = DIV_ROUND_CLOSEST(val * 5, 4);
break;
case LTC4222_SOURCE1:
case LTC4222_SOURCE2:
/* 31.25 mV resolution. Convert to mV. */
val = DIV_ROUND_CLOSEST(val * 125, 4);
break;
case LTC4222_SENSE1:
case LTC4222_SENSE2:
/*
* 62.5 uV resolution. Convert to current as measured with
* an 1 mOhm sense resistor, in mA. If a different sense
* resistor is installed, calculate the actual current by
* dividing the reported current by the sense resistor value
* in mOhm.
*/
val = DIV_ROUND_CLOSEST(val * 125, 2);
break;
default:
return -EINVAL;
}
return val;
}
static ssize_t ltc4222_value_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int value;
value = ltc4222_get_value(dev, attr->index);
if (value < 0)
return value;
return sysfs_emit(buf, "%d\n", value);
}
static ssize_t ltc4222_bool_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(da);
struct regmap *regmap = dev_get_drvdata(dev);
unsigned int fault;
int ret;
ret = regmap_read(regmap, attr->nr, &fault);
if (ret < 0)
return ret;
fault &= attr->index;
if (fault) /* Clear reported faults in chip register */
regmap_update_bits(regmap, attr->nr, attr->index, 0);
return sysfs_emit(buf, "%d\n", !!fault);
}
/* Voltages */
static SENSOR_DEVICE_ATTR_RO(in1_input, ltc4222_value, LTC4222_SOURCE1);
static SENSOR_DEVICE_ATTR_RO(in2_input, ltc4222_value, LTC4222_ADIN1);
static SENSOR_DEVICE_ATTR_RO(in3_input, ltc4222_value, LTC4222_SOURCE2);
static SENSOR_DEVICE_ATTR_RO(in4_input, ltc4222_value, LTC4222_ADIN2);
/*
* Voltage alarms
* UV/OV faults are associated with the input voltage, and power bad and fet
* faults are associated with the output voltage.
*/
static SENSOR_DEVICE_ATTR_2_RO(in1_min_alarm, ltc4222_bool, LTC4222_FAULT1,
FAULT_UV);
static SENSOR_DEVICE_ATTR_2_RO(in1_max_alarm, ltc4222_bool, LTC4222_FAULT1,
FAULT_OV);
static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, ltc4222_bool, LTC4222_FAULT1,
FAULT_POWER_BAD | FAULT_FET_BAD);
static SENSOR_DEVICE_ATTR_2_RO(in3_min_alarm, ltc4222_bool, LTC4222_FAULT2,
FAULT_UV);
static SENSOR_DEVICE_ATTR_2_RO(in3_max_alarm, ltc4222_bool, LTC4222_FAULT2,
FAULT_OV);
static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, ltc4222_bool, LTC4222_FAULT2,
FAULT_POWER_BAD | FAULT_FET_BAD);
/* Current (via sense resistor) */
static SENSOR_DEVICE_ATTR_RO(curr1_input, ltc4222_value, LTC4222_SENSE1);
static SENSOR_DEVICE_ATTR_RO(curr2_input, ltc4222_value, LTC4222_SENSE2);
/* Overcurrent alarm */
static SENSOR_DEVICE_ATTR_2_RO(curr1_max_alarm, ltc4222_bool, LTC4222_FAULT1,
FAULT_OC);
static SENSOR_DEVICE_ATTR_2_RO(curr2_max_alarm, ltc4222_bool, LTC4222_FAULT2,
FAULT_OC);
static struct attribute *ltc4222_attrs[] = {
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min_alarm.dev_attr.attr,
&sensor_dev_attr_in1_max_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min_alarm.dev_attr.attr,
&sensor_dev_attr_in3_max_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_curr1_max_alarm.dev_attr.attr,
&sensor_dev_attr_curr2_input.dev_attr.attr,
&sensor_dev_attr_curr2_max_alarm.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(ltc4222);
static const struct regmap_config ltc4222_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = LTC4222_ADC_CONTROL,
};
static int ltc4222_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, <c4222_regmap_config);
if (IS_ERR(regmap)) {
dev_err(dev, "failed to allocate register map\n");
return PTR_ERR(regmap);
}
/* Clear faults */
regmap_write(regmap, LTC4222_FAULT1, 0x00);
regmap_write(regmap, LTC4222_FAULT2, 0x00);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
regmap,
ltc4222_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ltc4222_id[] = {
{"ltc4222", 0},
{ }
};
MODULE_DEVICE_TABLE(i2c, ltc4222_id);
static struct i2c_driver ltc4222_driver = {
.driver = {
.name = "ltc4222",
},
.probe = ltc4222_probe,
.id_table = ltc4222_id,
};
module_i2c_driver(ltc4222_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("LTC4222 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ltc4222.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* max31722 - hwmon driver for Maxim Integrated MAX31722/MAX31723 SPI
* digital thermometer and thermostats.
*
* Copyright (c) 2016, Intel Corporation.
*/
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#define MAX31722_REG_CFG 0x00
#define MAX31722_REG_TEMP_LSB 0x01
#define MAX31722_MODE_CONTINUOUS 0x00
#define MAX31722_MODE_STANDBY 0x01
#define MAX31722_MODE_MASK 0xFE
#define MAX31722_RESOLUTION_12BIT 0x06
#define MAX31722_WRITE_MASK 0x80
struct max31722_data {
struct device *hwmon_dev;
struct spi_device *spi_device;
u8 mode;
};
static int max31722_set_mode(struct max31722_data *data, u8 mode)
{
int ret;
struct spi_device *spi = data->spi_device;
u8 buf[2] = {
MAX31722_REG_CFG | MAX31722_WRITE_MASK,
(data->mode & MAX31722_MODE_MASK) | mode
};
ret = spi_write(spi, &buf, sizeof(buf));
if (ret < 0) {
dev_err(&spi->dev, "failed to set sensor mode.\n");
return ret;
}
data->mode = (data->mode & MAX31722_MODE_MASK) | mode;
return 0;
}
static ssize_t max31722_temp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
ssize_t ret;
struct max31722_data *data = dev_get_drvdata(dev);
ret = spi_w8r16(data->spi_device, MAX31722_REG_TEMP_LSB);
if (ret < 0)
return ret;
/* Keep 12 bits and multiply by the scale of 62.5 millidegrees/bit. */
return sprintf(buf, "%d\n", (s16)le16_to_cpu(ret) * 125 / 32);
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, max31722_temp, 0);
static struct attribute *max31722_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(max31722);
static int max31722_probe(struct spi_device *spi)
{
int ret;
struct max31722_data *data;
data = devm_kzalloc(&spi->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
spi_set_drvdata(spi, data);
data->spi_device = spi;
/*
* Set SD bit to 0 so we can have continuous measurements.
* Set resolution to 12 bits for maximum precision.
*/
data->mode = MAX31722_MODE_CONTINUOUS | MAX31722_RESOLUTION_12BIT;
ret = max31722_set_mode(data, MAX31722_MODE_CONTINUOUS);
if (ret < 0)
return ret;
data->hwmon_dev = hwmon_device_register_with_groups(&spi->dev,
spi->modalias,
data,
max31722_groups);
if (IS_ERR(data->hwmon_dev)) {
max31722_set_mode(data, MAX31722_MODE_STANDBY);
return PTR_ERR(data->hwmon_dev);
}
return 0;
}
static void max31722_remove(struct spi_device *spi)
{
struct max31722_data *data = spi_get_drvdata(spi);
int ret;
hwmon_device_unregister(data->hwmon_dev);
ret = max31722_set_mode(data, MAX31722_MODE_STANDBY);
if (ret)
/* There is nothing we can do about this ... */
dev_warn(&spi->dev, "Failed to put device in stand-by mode\n");
}
static int max31722_suspend(struct device *dev)
{
struct spi_device *spi_device = to_spi_device(dev);
struct max31722_data *data = spi_get_drvdata(spi_device);
return max31722_set_mode(data, MAX31722_MODE_STANDBY);
}
static int max31722_resume(struct device *dev)
{
struct spi_device *spi_device = to_spi_device(dev);
struct max31722_data *data = spi_get_drvdata(spi_device);
return max31722_set_mode(data, MAX31722_MODE_CONTINUOUS);
}
static DEFINE_SIMPLE_DEV_PM_OPS(max31722_pm_ops, max31722_suspend, max31722_resume);
static const struct spi_device_id max31722_spi_id[] = {
{"max31722", 0},
{"max31723", 0},
{}
};
MODULE_DEVICE_TABLE(spi, max31722_spi_id);
static struct spi_driver max31722_driver = {
.driver = {
.name = "max31722",
.pm = pm_sleep_ptr(&max31722_pm_ops),
},
.probe = max31722_probe,
.remove = max31722_remove,
.id_table = max31722_spi_id,
};
module_spi_driver(max31722_driver);
MODULE_AUTHOR("Tiberiu Breana <[email protected]>");
MODULE_DESCRIPTION("max31722 sensor driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/max31722.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* adt7x10.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* This driver handles the ADT7410 and compatible digital temperature sensors.
* Hartmut Knaack <[email protected]> 2012-07-22
* based on lm75.c by Frodo Looijaard <[email protected]>
* and adt7410.c from iio-staging by Sonic Zhang <[email protected]>
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/regmap.h>
#include "adt7x10.h"
/*
* ADT7X10 status
*/
#define ADT7X10_STAT_T_LOW (1 << 4)
#define ADT7X10_STAT_T_HIGH (1 << 5)
#define ADT7X10_STAT_T_CRIT (1 << 6)
#define ADT7X10_STAT_NOT_RDY (1 << 7)
/*
* ADT7X10 config
*/
#define ADT7X10_FAULT_QUEUE_MASK (1 << 0 | 1 << 1)
#define ADT7X10_CT_POLARITY (1 << 2)
#define ADT7X10_INT_POLARITY (1 << 3)
#define ADT7X10_EVENT_MODE (1 << 4)
#define ADT7X10_MODE_MASK (1 << 5 | 1 << 6)
#define ADT7X10_FULL (0 << 5 | 0 << 6)
#define ADT7X10_PD (1 << 5 | 1 << 6)
#define ADT7X10_RESOLUTION (1 << 7)
/*
* ADT7X10 masks
*/
#define ADT7X10_T13_VALUE_MASK 0xFFF8
#define ADT7X10_T_HYST_MASK 0xF
/* straight from the datasheet */
#define ADT7X10_TEMP_MIN (-55000)
#define ADT7X10_TEMP_MAX 150000
/* Each client has this additional data */
struct adt7x10_data {
struct regmap *regmap;
struct mutex update_lock;
u8 config;
u8 oldconfig;
bool valid; /* true if temperature valid */
};
enum {
adt7x10_temperature = 0,
adt7x10_t_alarm_high,
adt7x10_t_alarm_low,
adt7x10_t_crit,
};
static const u8 ADT7X10_REG_TEMP[] = {
[adt7x10_temperature] = ADT7X10_TEMPERATURE, /* input */
[adt7x10_t_alarm_high] = ADT7X10_T_ALARM_HIGH, /* high */
[adt7x10_t_alarm_low] = ADT7X10_T_ALARM_LOW, /* low */
[adt7x10_t_crit] = ADT7X10_T_CRIT, /* critical */
};
static irqreturn_t adt7x10_irq_handler(int irq, void *private)
{
struct device *dev = private;
struct adt7x10_data *d = dev_get_drvdata(dev);
unsigned int status;
int ret;
ret = regmap_read(d->regmap, ADT7X10_STATUS, &status);
if (ret < 0)
return IRQ_HANDLED;
if (status & ADT7X10_STAT_T_HIGH)
hwmon_notify_event(dev, hwmon_temp, hwmon_temp_max_alarm, 0);
if (status & ADT7X10_STAT_T_LOW)
hwmon_notify_event(dev, hwmon_temp, hwmon_temp_min_alarm, 0);
if (status & ADT7X10_STAT_T_CRIT)
hwmon_notify_event(dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
return IRQ_HANDLED;
}
static int adt7x10_temp_ready(struct regmap *regmap)
{
unsigned int status;
int i, ret;
for (i = 0; i < 6; i++) {
ret = regmap_read(regmap, ADT7X10_STATUS, &status);
if (ret < 0)
return ret;
if (!(status & ADT7X10_STAT_NOT_RDY))
return 0;
msleep(60);
}
return -ETIMEDOUT;
}
static s16 ADT7X10_TEMP_TO_REG(long temp)
{
return DIV_ROUND_CLOSEST(clamp_val(temp, ADT7X10_TEMP_MIN,
ADT7X10_TEMP_MAX) * 128, 1000);
}
static int ADT7X10_REG_TO_TEMP(struct adt7x10_data *data, s16 reg)
{
/* in 13 bit mode, bits 0-2 are status flags - mask them out */
if (!(data->config & ADT7X10_RESOLUTION))
reg &= ADT7X10_T13_VALUE_MASK;
/*
* temperature is stored in twos complement format, in steps of
* 1/128°C
*/
return DIV_ROUND_CLOSEST(reg * 1000, 128);
}
/*-----------------------------------------------------------------------*/
static int adt7x10_temp_read(struct adt7x10_data *data, int index, long *val)
{
unsigned int regval;
int ret;
mutex_lock(&data->update_lock);
if (index == adt7x10_temperature && !data->valid) {
/* wait for valid temperature */
ret = adt7x10_temp_ready(data->regmap);
if (ret) {
mutex_unlock(&data->update_lock);
return ret;
}
data->valid = true;
}
mutex_unlock(&data->update_lock);
ret = regmap_read(data->regmap, ADT7X10_REG_TEMP[index], ®val);
if (ret)
return ret;
*val = ADT7X10_REG_TO_TEMP(data, regval);
return 0;
}
static int adt7x10_temp_write(struct adt7x10_data *data, int index, long temp)
{
int ret;
mutex_lock(&data->update_lock);
ret = regmap_write(data->regmap, ADT7X10_REG_TEMP[index],
ADT7X10_TEMP_TO_REG(temp));
mutex_unlock(&data->update_lock);
return ret;
}
static int adt7x10_hyst_read(struct adt7x10_data *data, int index, long *val)
{
int hyst, temp, ret;
mutex_lock(&data->update_lock);
ret = regmap_read(data->regmap, ADT7X10_T_HYST, &hyst);
if (ret) {
mutex_unlock(&data->update_lock);
return ret;
}
ret = regmap_read(data->regmap, ADT7X10_REG_TEMP[index], &temp);
mutex_unlock(&data->update_lock);
if (ret)
return ret;
hyst = (hyst & ADT7X10_T_HYST_MASK) * 1000;
/*
* hysteresis is stored as a 4 bit offset in the device, convert it
* to an absolute value
*/
/* min has positive offset, others have negative */
if (index == adt7x10_t_alarm_low)
hyst = -hyst;
*val = ADT7X10_REG_TO_TEMP(data, temp) - hyst;
return 0;
}
static int adt7x10_hyst_write(struct adt7x10_data *data, long hyst)
{
unsigned int regval;
int limit, ret;
mutex_lock(&data->update_lock);
/* convert absolute hysteresis value to a 4 bit delta value */
ret = regmap_read(data->regmap, ADT7X10_T_ALARM_HIGH, ®val);
if (ret < 0)
goto abort;
limit = ADT7X10_REG_TO_TEMP(data, regval);
hyst = clamp_val(hyst, ADT7X10_TEMP_MIN, ADT7X10_TEMP_MAX);
regval = clamp_val(DIV_ROUND_CLOSEST(limit - hyst, 1000), 0,
ADT7X10_T_HYST_MASK);
ret = regmap_write(data->regmap, ADT7X10_T_HYST, regval);
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static int adt7x10_alarm_read(struct adt7x10_data *data, int index, long *val)
{
unsigned int status;
int ret;
ret = regmap_read(data->regmap, ADT7X10_STATUS, &status);
if (ret < 0)
return ret;
*val = !!(status & index);
return 0;
}
static umode_t adt7x10_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (attr) {
case hwmon_temp_max:
case hwmon_temp_min:
case hwmon_temp_crit:
case hwmon_temp_max_hyst:
return 0644;
case hwmon_temp_input:
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
case hwmon_temp_min_hyst:
case hwmon_temp_crit_hyst:
return 0444;
default:
break;
}
return 0;
}
static int adt7x10_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct adt7x10_data *data = dev_get_drvdata(dev);
switch (attr) {
case hwmon_temp_input:
return adt7x10_temp_read(data, adt7x10_temperature, val);
case hwmon_temp_max:
return adt7x10_temp_read(data, adt7x10_t_alarm_high, val);
case hwmon_temp_min:
return adt7x10_temp_read(data, adt7x10_t_alarm_low, val);
case hwmon_temp_crit:
return adt7x10_temp_read(data, adt7x10_t_crit, val);
case hwmon_temp_max_hyst:
return adt7x10_hyst_read(data, adt7x10_t_alarm_high, val);
case hwmon_temp_min_hyst:
return adt7x10_hyst_read(data, adt7x10_t_alarm_low, val);
case hwmon_temp_crit_hyst:
return adt7x10_hyst_read(data, adt7x10_t_crit, val);
case hwmon_temp_min_alarm:
return adt7x10_alarm_read(data, ADT7X10_STAT_T_LOW, val);
case hwmon_temp_max_alarm:
return adt7x10_alarm_read(data, ADT7X10_STAT_T_HIGH, val);
case hwmon_temp_crit_alarm:
return adt7x10_alarm_read(data, ADT7X10_STAT_T_CRIT, val);
default:
return -EOPNOTSUPP;
}
}
static int adt7x10_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct adt7x10_data *data = dev_get_drvdata(dev);
switch (attr) {
case hwmon_temp_max:
return adt7x10_temp_write(data, adt7x10_t_alarm_high, val);
case hwmon_temp_min:
return adt7x10_temp_write(data, adt7x10_t_alarm_low, val);
case hwmon_temp_crit:
return adt7x10_temp_write(data, adt7x10_t_crit, val);
case hwmon_temp_max_hyst:
return adt7x10_hyst_write(data, val);
default:
return -EOPNOTSUPP;
}
}
static const struct hwmon_channel_info * const adt7x10_info[] = {
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
HWMON_T_CRIT | HWMON_T_MAX_HYST | HWMON_T_MIN_HYST |
HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM),
NULL,
};
static const struct hwmon_ops adt7x10_hwmon_ops = {
.is_visible = adt7x10_is_visible,
.read = adt7x10_read,
.write = adt7x10_write,
};
static const struct hwmon_chip_info adt7x10_chip_info = {
.ops = &adt7x10_hwmon_ops,
.info = adt7x10_info,
};
static void adt7x10_restore_config(void *private)
{
struct adt7x10_data *data = private;
regmap_write(data->regmap, ADT7X10_CONFIG, data->oldconfig);
}
int adt7x10_probe(struct device *dev, const char *name, int irq,
struct regmap *regmap)
{
struct adt7x10_data *data;
unsigned int config;
struct device *hdev;
int ret;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->regmap = regmap;
dev_set_drvdata(dev, data);
mutex_init(&data->update_lock);
/* configure as specified */
ret = regmap_read(regmap, ADT7X10_CONFIG, &config);
if (ret < 0) {
dev_dbg(dev, "Can't read config? %d\n", ret);
return ret;
}
data->oldconfig = config;
/*
* Set to 16 bit resolution, continous conversion and comparator mode.
*/
data->config = data->oldconfig;
data->config &= ~(ADT7X10_MODE_MASK | ADT7X10_CT_POLARITY |
ADT7X10_INT_POLARITY);
data->config |= ADT7X10_FULL | ADT7X10_RESOLUTION | ADT7X10_EVENT_MODE;
if (data->config != data->oldconfig) {
ret = regmap_write(regmap, ADT7X10_CONFIG, data->config);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, adt7x10_restore_config, data);
if (ret)
return ret;
}
dev_dbg(dev, "Config %02x\n", data->config);
hdev = devm_hwmon_device_register_with_info(dev, name, data,
&adt7x10_chip_info, NULL);
if (IS_ERR(hdev))
return PTR_ERR(hdev);
if (irq > 0) {
ret = devm_request_threaded_irq(dev, irq, NULL,
adt7x10_irq_handler,
IRQF_TRIGGER_FALLING |
IRQF_ONESHOT,
dev_name(dev), hdev);
if (ret)
return ret;
}
return 0;
}
EXPORT_SYMBOL_GPL(adt7x10_probe);
static int adt7x10_suspend(struct device *dev)
{
struct adt7x10_data *data = dev_get_drvdata(dev);
return regmap_write(data->regmap, ADT7X10_CONFIG,
data->config | ADT7X10_PD);
}
static int adt7x10_resume(struct device *dev)
{
struct adt7x10_data *data = dev_get_drvdata(dev);
return regmap_write(data->regmap, ADT7X10_CONFIG, data->config);
}
EXPORT_SIMPLE_DEV_PM_OPS(adt7x10_dev_pm_ops, adt7x10_suspend, adt7x10_resume);
MODULE_AUTHOR("Hartmut Knaack");
MODULE_DESCRIPTION("ADT7410/ADT7420, ADT7310/ADT7320 common code");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/adt7x10.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* nct6775 - Driver for the hardware monitoring functionality of
* Nuvoton NCT677x Super-I/O chips
*
* Copyright (C) 2012 Guenter Roeck <[email protected]>
*
* Derived from w83627ehf driver
* Copyright (C) 2005-2012 Jean Delvare <[email protected]>
* Copyright (C) 2006 Yuan Mu (Winbond),
* Rudolf Marek <[email protected]>
* David Hubbard <[email protected]>
* Daniel J Blueman <[email protected]>
* Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
*
* Shamelessly ripped from the w83627hf driver
* Copyright (C) 2003 Mark Studebaker
*
* Supports the following chips:
*
* Chip #vin #fan #pwm #temp chip IDs man ID
* nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
* nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3
* nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
* nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
* nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
* nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
* nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
* nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
* nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
* nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3
* nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3
* (0xd451)
* nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3
* (0xd429)
* nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3
* nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3
*
* #temp lists the number of monitored temperature sources (first value) plus
* the number of directly connectable temperature sensors (second value).
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/bitops.h>
#include <linux/nospec.h>
#include <linux/regmap.h>
#include "lm75.h"
#include "nct6775.h"
#undef DEFAULT_SYMBOL_NAMESPACE
#define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775
#define USE_ALTERNATE
/* used to set data->name = nct6775_device_names[data->sio_kind] */
static const char * const nct6775_device_names[] = {
"nct6106",
"nct6116",
"nct6775",
"nct6776",
"nct6779",
"nct6791",
"nct6792",
"nct6793",
"nct6795",
"nct6796",
"nct6797",
"nct6798",
"nct6799",
};
/* Common and NCT6775 specific data */
/*
* Voltage min/max registers for nr=7..14 are in bank 5
* min/max: 15-17 for NCT6799 only
*/
static const u16 NCT6775_REG_IN_MAX[] = {
0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 };
static const u16 NCT6775_REG_IN_MIN[] = {
0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 };
static const u16 NCT6775_REG_IN[] = {
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
};
#define NCT6775_REG_VBAT 0x5D
#define NCT6775_REG_DIODE 0x5E
#define NCT6775_DIODE_MASK 0x02
static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = {
0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
6, 7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
12, -1, /* intr0-intr1 */
};
static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = {
0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
6, 7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
12, -1, 21 /* intr0-intr1, beep_en */
};
/* DC or PWM output fan configuration */
static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
/* Advanced Fan control, some values are common for all fans */
static const u16 NCT6775_REG_TARGET[] = {
0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
static const u16 NCT6775_REG_FAN_MODE[] = {
0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
static const u16 NCT6775_REG_PWM[] = {
0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
static const u16 NCT6775_REG_PWM_READ[] = {
0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
0x641, 0x642, 0x643, 0x644 };
static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
static const u16 NCT6775_REG_TEMP[] = {
0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0, 0x152, 0x252, 0x628, 0x629, 0x62A };
static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
static const u16 NCT6775_REG_TEMP_SEL[] = {
0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
static const u16 NCT6775_REG_AUTO_TEMP[] = {
0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
static const u16 NCT6775_REG_AUTO_PWM[] = {
0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
#define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
#define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
static const char *const nct6775_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN",
"AMD SB-TSI",
"PECI Agent 0",
"PECI Agent 1",
"PECI Agent 2",
"PECI Agent 3",
"PECI Agent 4",
"PECI Agent 5",
"PECI Agent 6",
"PECI Agent 7",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"PCH_DIM0_TEMP",
"PCH_DIM1_TEMP",
"PCH_DIM2_TEMP",
"PCH_DIM3_TEMP"
};
#define NCT6775_TEMP_MASK 0x001ffffe
#define NCT6775_VIRT_TEMP_MASK 0x00000000
static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
[13] = 0x661,
[14] = 0x662,
[15] = 0x664,
};
static const u16 NCT6775_REG_TEMP_CRIT[32] = {
[4] = 0xa00,
[5] = 0xa01,
[6] = 0xa02,
[7] = 0xa03,
[8] = 0xa04,
[9] = 0xa05,
[10] = 0xa06,
[11] = 0xa07
};
static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
/* NCT6776 specific data */
/* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
#define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
#define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = {
0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
12, 9, /* intr0-intr1 */
};
/* 0xbf: nct6799 only */
static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
30, 31, 24 /* intr0-intr1, beep_en */
};
static const u16 NCT6776_REG_TOLERANCE_H[] = {
0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
static const u16 NCT6776_REG_FAN_MIN[] = {
0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
static const char *const nct6776_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"SMBUSMASTER 2",
"SMBUSMASTER 3",
"SMBUSMASTER 4",
"SMBUSMASTER 5",
"SMBUSMASTER 6",
"SMBUSMASTER 7",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"PCH_DIM0_TEMP",
"PCH_DIM1_TEMP",
"PCH_DIM2_TEMP",
"PCH_DIM3_TEMP",
"BYTE_TEMP"
};
#define NCT6776_TEMP_MASK 0x007ffffe
#define NCT6776_VIRT_TEMP_MASK 0x00000000
static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
[14] = 0x401,
[15] = 0x402,
[16] = 0x404,
};
static const u16 NCT6776_REG_TEMP_CRIT[32] = {
[11] = 0x709,
[12] = 0x70a,
};
static const u16 NCT6776_REG_TSI_TEMP[] = {
0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
/* NCT6779 specific data */
/*
* 15-17 for NCT6799 only, register labels are:
* CPUVC, VIN1, AVSB, 3VCC, VIN0, VIN8, VIN4, 3VSB
* VBAT, VTT, VIN5, VIN6, VIN2, VIN3, VIN7, VIN9
* VHIF, VIN10
*/
static const u16 NCT6779_REG_IN[] = {
0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f,
0x470, 0x471};
static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
0x459, 0x45A, 0x45B, 0x568 };
static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = {
0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
12, 9, /* intr0-intr1 */
};
static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
30, 31, 24 /* intr0-intr1, beep_en */
};
static const u16 NCT6779_REG_FAN[] = {
0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
#define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
static const u16 NCT6779_REG_CRITICAL_PWM[] = {
0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
0x18, 0x152 };
static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
0x3a, 0x153 };
static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
0x39, 0x155 };
static const u16 NCT6779_REG_TEMP_OFFSET[] = {
0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 };
static const char *const nct6779_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN0",
"AUXTIN1",
"AUXTIN2",
"AUXTIN3",
"",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"SMBUSMASTER 2",
"SMBUSMASTER 3",
"SMBUSMASTER 4",
"SMBUSMASTER 5",
"SMBUSMASTER 6",
"SMBUSMASTER 7",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"PCH_DIM0_TEMP",
"PCH_DIM1_TEMP",
"PCH_DIM2_TEMP",
"PCH_DIM3_TEMP",
"BYTE_TEMP",
"",
"",
"",
"",
"Virtual_TEMP"
};
#define NCT6779_TEMP_MASK 0x07ffff7e
#define NCT6779_VIRT_TEMP_MASK 0x00000000
#define NCT6791_TEMP_MASK 0x87ffff7e
#define NCT6791_VIRT_TEMP_MASK 0x80000000
static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
= { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
0x408, 0 };
static const u16 NCT6779_REG_TEMP_CRIT[32] = {
[15] = 0x709,
[16] = 0x70a,
};
/* NCT6791 specific data */
static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
0x459, 0x45A, 0x45B, 0x568, 0x45D };
static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = {
0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
12, 9, /* intr0-intr1 */
};
/* NCT6792/NCT6793 specific data */
static const u16 NCT6792_REG_TEMP_MON[] = {
0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
static const char *const nct6792_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN0",
"AUXTIN1",
"AUXTIN2",
"AUXTIN3",
"",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"SMBUSMASTER 2",
"SMBUSMASTER 3",
"SMBUSMASTER 4",
"SMBUSMASTER 5",
"SMBUSMASTER 6",
"SMBUSMASTER 7",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"PCH_DIM0_TEMP",
"PCH_DIM1_TEMP",
"PCH_DIM2_TEMP",
"PCH_DIM3_TEMP",
"BYTE_TEMP",
"PECI Agent 0 Calibration",
"PECI Agent 1 Calibration",
"",
"",
"Virtual_TEMP"
};
#define NCT6792_TEMP_MASK 0x9fffff7e
#define NCT6792_VIRT_TEMP_MASK 0x80000000
static const char *const nct6793_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN0",
"AUXTIN1",
"AUXTIN2",
"AUXTIN3",
"",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"",
"",
"",
"",
"",
"",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"Agent0 Dimm0 ",
"Agent0 Dimm1",
"Agent1 Dimm0",
"Agent1 Dimm1",
"BYTE_TEMP0",
"BYTE_TEMP1",
"PECI Agent 0 Calibration",
"PECI Agent 1 Calibration",
"",
"Virtual_TEMP"
};
#define NCT6793_TEMP_MASK 0xbfff037e
#define NCT6793_VIRT_TEMP_MASK 0x80000000
static const char *const nct6795_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN0",
"AUXTIN1",
"AUXTIN2",
"AUXTIN3",
"",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"SMBUSMASTER 2",
"SMBUSMASTER 3",
"SMBUSMASTER 4",
"SMBUSMASTER 5",
"SMBUSMASTER 6",
"SMBUSMASTER 7",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"Agent0 Dimm0",
"Agent0 Dimm1",
"Agent1 Dimm0",
"Agent1 Dimm1",
"BYTE_TEMP0",
"BYTE_TEMP1",
"PECI Agent 0 Calibration",
"PECI Agent 1 Calibration",
"",
"Virtual_TEMP"
};
#define NCT6795_TEMP_MASK 0xbfffff7e
#define NCT6795_VIRT_TEMP_MASK 0x80000000
static const char *const nct6796_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN0",
"AUXTIN1",
"AUXTIN2",
"AUXTIN3",
"AUXTIN4",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"Virtual_TEMP",
"Virtual_TEMP",
"",
"",
"",
"",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"Agent0 Dimm0",
"Agent0 Dimm1",
"Agent1 Dimm0",
"Agent1 Dimm1",
"BYTE_TEMP0",
"BYTE_TEMP1",
"PECI Agent 0 Calibration",
"PECI Agent 1 Calibration",
"",
"Virtual_TEMP"
};
#define NCT6796_TEMP_MASK 0xbfff0ffe
#define NCT6796_VIRT_TEMP_MASK 0x80000c00
static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
static const u16 NCT6798_REG_TEMP[] = {
0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a};
static const u16 NCT6798_REG_TEMP_SOURCE[] = {
0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b };
static const u16 NCT6798_REG_TEMP_MON[] = {
0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 };
static const u16 NCT6798_REG_TEMP_OVER[] = {
0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f };
static const u16 NCT6798_REG_TEMP_HYST[] = {
0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 };
static const u16 NCT6798_REG_TEMP_CRIT[32] = {
0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 };
static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = {
0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0,
0, 0, 0, 0, 0x4a2, 0, 0, 0,
0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
0x408, 0x419, 0x41a, 0x4f4, 0x4f5 };
static const char *const nct6798_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN0",
"AUXTIN1",
"AUXTIN2",
"AUXTIN3",
"AUXTIN4",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"Virtual_TEMP",
"Virtual_TEMP",
"",
"",
"",
"",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"Agent0 Dimm0",
"Agent0 Dimm1",
"Agent1 Dimm0",
"Agent1 Dimm1",
"BYTE_TEMP0",
"BYTE_TEMP1",
"PECI Agent 0 Calibration", /* undocumented */
"PECI Agent 1 Calibration", /* undocumented */
"",
"Virtual_TEMP"
};
#define NCT6798_TEMP_MASK 0xbfff0ffe
#define NCT6798_VIRT_TEMP_MASK 0x80000c00
static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = {
0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 };
static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = {
0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */
27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
4, 5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1, /* temp1-temp12 */
12, 9, /* intr0-intr1 */
};
static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */
25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1, /* temp1-temp12 */
30, 31, 24 /* intr0-intr1, beep_en */
};
/* PECI Calibration only for NCT6799D, not NCT6796D-S */
static const char *const nct6799_temp_label[] = {
"",
"SYSTIN",
"CPUTIN",
"AUXTIN0",
"AUXTIN1",
"AUXTIN2",
"AUXTIN3",
"AUXTIN4",
"SMBUSMASTER 0",
"SMBUSMASTER 1",
"Virtual_TEMP",
"Virtual_TEMP",
"",
"AUXTIN5",
"",
"",
"PECI Agent 0",
"PECI Agent 1",
"PCH_CHIP_CPU_MAX_TEMP",
"PCH_CHIP_TEMP",
"PCH_CPU_TEMP",
"PCH_MCH_TEMP",
"Agent0 Dimm0",
"Agent0 Dimm1",
"Agent1 Dimm0",
"Agent1 Dimm1",
"BYTE_TEMP0",
"BYTE_TEMP1",
"PECI/TSI Agent 0 Calibration",
"PECI/TSI Agent 1 Calibration",
"",
"Virtual_TEMP"
};
#define NCT6799_TEMP_MASK 0xbfff2ffe
#define NCT6799_VIRT_TEMP_MASK 0x80000c00
/* NCT6102D/NCT6106D specific data */
#define NCT6106_REG_VBAT 0x318
#define NCT6106_REG_DIODE 0x319
#define NCT6106_DIODE_MASK 0x01
static const u16 NCT6106_REG_IN_MAX[] = {
0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
static const u16 NCT6106_REG_IN_MIN[] = {
0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
static const u16 NCT6106_REG_IN[] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
static const u16 NCT6106_REG_TEMP_HYST[] = {
0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
static const u16 NCT6106_REG_TEMP_OVER[] = {
0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
static const u16 NCT6106_REG_TEMP_CONFIG[] = {
0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
static const u16 NCT6106_REG_TEMP_SOURCE[] = {
0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
0x11b, 0x12b, 0x13b };
static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
#define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = {
0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
48, -1, /* intr0-intr1 */
};
static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = {
0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
34, -1, 32 /* intr0-intr1, beep_en */
};
static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
[14] = 0x51,
[15] = 0x52,
[16] = 0x54,
};
static const u16 NCT6106_REG_TEMP_CRIT[32] = {
[11] = 0x204,
[12] = 0x205,
};
static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
/* NCT6112D/NCT6114D/NCT6116D specific data */
static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
static const u16 NCT6116_REG_TEMP_SOURCE[] = {
0xb0, 0xb1, 0xb2 };
static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
static const u16 NCT6116_REG_CRITICAL_PWM[] = {
0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
0x114, 0x124, 0x134, 0x194, 0x1a4 };
static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
0x115, 0x125, 0x135, 0x195, 0x1a5 };
static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
0x116, 0x126, 0x136, 0x196, 0x1a6 };
static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
0x117, 0x127, 0x137, 0x197, 0x1a7 };
static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
0x118, 0x128, 0x138, 0x198, 0x1a8 };
static const u16 NCT6116_REG_TOLERANCE_H[] = {
0x112, 0x122, 0x132, 0x192, 0x1a2 };
static const u16 NCT6116_REG_TARGET[] = {
0x111, 0x121, 0x131, 0x191, 0x1a1 };
static const u16 NCT6116_REG_AUTO_TEMP[] = {
0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
static const u16 NCT6116_REG_AUTO_PWM[] = {
0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = {
0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
48, -1, /* intr0-intr1 */
};
static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = {
0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
34, -1, 32 /* intr0-intr1, beep_en */
};
static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
{
if (mode == 0 && pwm == 255)
return off;
return mode + 1;
}
static int pwm_enable_to_reg(enum pwm_enable mode)
{
if (mode == off)
return 0;
return mode - 1;
}
/*
* Conversions
*/
/* 1 is DC mode, output in ms */
static unsigned int step_time_from_reg(u8 reg, u8 mode)
{
return mode ? 400 * reg : 100 * reg;
}
static u8 step_time_to_reg(unsigned int msec, u8 mode)
{
return clamp_val((mode ? (msec + 200) / 400 :
(msec + 50) / 100), 1, 255);
}
static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
{
if (reg == 0 || reg == 255)
return 0;
return 1350000U / (reg << divreg);
}
static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
{
if ((reg & 0xff1f) == 0xff1f)
return 0;
reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
if (reg == 0)
return 0;
return 1350000U / reg;
}
static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
{
if (reg == 0 || reg == 0xffff)
return 0;
/*
* Even though the registers are 16 bit wide, the fan divisor
* still applies.
*/
return 1350000U / (reg << divreg);
}
static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
{
return reg;
}
static u16 fan_to_reg(u32 fan, unsigned int divreg)
{
if (!fan)
return 0;
return (1350000U / fan) >> divreg;
}
static inline unsigned int
div_from_reg(u8 reg)
{
return BIT(reg);
}
/*
* Some of the voltage inputs have internal scaling, the tables below
* contain 8 (the ADC LSB in mV) * scaling factor * 100
*/
static const u16 scale_in[15] = {
800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
800, 800
};
/*
* NCT6798 scaling:
* CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2,
* IN3, IN7, IN9, VHIF, IN10
* 15-17 for NCT6799 only
*/
static const u16 scale_in_6798[NUM_IN] = {
800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800,
800, 800, 800, 1600, 800
};
static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales)
{
return DIV_ROUND_CLOSEST(reg * scales[nr], 100);
}
static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales)
{
return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255);
}
/* TSI temperatures are in 8.3 format */
static inline unsigned int tsi_temp_from_reg(unsigned int reg)
{
return (reg >> 5) * 125;
}
/*
* Data structures and manipulation thereof
*/
struct sensor_device_template {
struct device_attribute dev_attr;
union {
struct {
u8 nr;
u8 index;
} s;
int index;
} u;
bool s2; /* true if both index and nr are used */
};
struct sensor_device_attr_u {
union {
struct sensor_device_attribute a1;
struct sensor_device_attribute_2 a2;
} u;
char name[32];
};
#define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
.attr = {.name = _template, .mode = _mode }, \
.show = _show, \
.store = _store, \
}
#define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
{ .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
.u.index = _index, \
.s2 = false }
#define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
_nr, _index) \
{ .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
.u.s.index = _index, \
.u.s.nr = _nr, \
.s2 = true }
#define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
static struct sensor_device_template sensor_dev_template_##_name \
= SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
_index)
#define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
_nr, _index) \
static struct sensor_device_template sensor_dev_template_##_name \
= SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
_nr, _index)
struct sensor_template_group {
struct sensor_device_template **templates;
umode_t (*is_visible)(struct kobject *, struct attribute *, int);
int base;
};
static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data,
const struct sensor_template_group *tg, int repeat)
{
struct attribute_group *group;
struct sensor_device_attr_u *su;
struct sensor_device_attribute *a;
struct sensor_device_attribute_2 *a2;
struct attribute **attrs;
struct sensor_device_template **t;
int i, count;
if (repeat <= 0)
return -EINVAL;
t = tg->templates;
for (count = 0; *t; t++, count++)
;
if (count == 0)
return -EINVAL;
group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
if (group == NULL)
return -ENOMEM;
attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
GFP_KERNEL);
if (attrs == NULL)
return -ENOMEM;
su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
GFP_KERNEL);
if (su == NULL)
return -ENOMEM;
group->attrs = attrs;
group->is_visible = tg->is_visible;
for (i = 0; i < repeat; i++) {
t = tg->templates;
while (*t != NULL) {
snprintf(su->name, sizeof(su->name),
(*t)->dev_attr.attr.name, tg->base + i);
if ((*t)->s2) {
a2 = &su->u.a2;
sysfs_attr_init(&a2->dev_attr.attr);
a2->dev_attr.attr.name = su->name;
a2->nr = (*t)->u.s.nr + i;
a2->index = (*t)->u.s.index;
a2->dev_attr.attr.mode =
(*t)->dev_attr.attr.mode;
a2->dev_attr.show = (*t)->dev_attr.show;
a2->dev_attr.store = (*t)->dev_attr.store;
*attrs = &a2->dev_attr.attr;
} else {
a = &su->u.a1;
sysfs_attr_init(&a->dev_attr.attr);
a->dev_attr.attr.name = su->name;
a->index = (*t)->u.index + i;
a->dev_attr.attr.mode =
(*t)->dev_attr.attr.mode;
a->dev_attr.show = (*t)->dev_attr.show;
a->dev_attr.store = (*t)->dev_attr.store;
*attrs = &a->dev_attr.attr;
}
attrs++;
su++;
t++;
}
}
return nct6775_add_attr_group(data, group);
}
bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg)
{
switch (data->kind) {
case nct6106:
return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
(reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
reg == 0x111 || reg == 0x121 || reg == 0x131;
case nct6116:
return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
reg == 0x191 || reg == 0x1a1;
case nct6775:
return (((reg & 0xff00) == 0x100 ||
(reg & 0xff00) == 0x200) &&
((reg & 0x00ff) == 0x50 ||
(reg & 0x00ff) == 0x53 ||
(reg & 0x00ff) == 0x55)) ||
(reg & 0xfff0) == 0x630 ||
reg == 0x640 || reg == 0x642 ||
reg == 0x662 || reg == 0x669 ||
((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
reg == 0x73 || reg == 0x75 || reg == 0x77;
case nct6776:
return (((reg & 0xff00) == 0x100 ||
(reg & 0xff00) == 0x200) &&
((reg & 0x00ff) == 0x50 ||
(reg & 0x00ff) == 0x53 ||
(reg & 0x00ff) == 0x55)) ||
(reg & 0xfff0) == 0x630 ||
reg == 0x402 ||
(reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
reg == 0x640 || reg == 0x642 ||
((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
reg == 0x73 || reg == 0x75 || reg == 0x77;
case nct6779:
case nct6791:
case nct6792:
case nct6793:
case nct6795:
case nct6796:
case nct6797:
case nct6798:
case nct6799:
return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
(reg & 0xfff0) == 0x4c0 ||
reg == 0x402 ||
(reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
reg == 0x63a || reg == 0x63c || reg == 0x63e ||
reg == 0x640 || reg == 0x642 || reg == 0x64a ||
reg == 0x64c ||
reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
reg == 0x7b || reg == 0x7d;
}
return false;
}
EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized);
/* We left-align 8-bit temperature values to make the code simpler */
static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
{
int err;
err = nct6775_read_value(data, reg, val);
if (err)
return err;
if (!nct6775_reg_is_word_sized(data, reg))
*val <<= 8;
return 0;
}
/* This function assumes that the caller holds data->update_lock */
static int nct6775_write_fan_div(struct nct6775_data *data, int nr)
{
u16 reg;
int err;
u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2;
unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */
err = nct6775_read_value(data, fandiv_reg, ®);
if (err)
return err;
reg &= 0x70 >> oddshift;
reg |= (data->fan_div[nr] & 0x7) << oddshift;
return nct6775_write_value(data, fandiv_reg, reg);
}
static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
{
if (data->kind == nct6775)
return nct6775_write_fan_div(data, nr);
return 0;
}
static int nct6775_update_fan_div(struct nct6775_data *data)
{
int err;
u16 i;
err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i);
if (err)
return err;
data->fan_div[0] = i & 0x7;
data->fan_div[1] = (i & 0x70) >> 4;
err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i);
if (err)
return err;
data->fan_div[2] = i & 0x7;
if (data->has_fan & BIT(3))
data->fan_div[3] = (i & 0x70) >> 4;
return 0;
}
static int nct6775_update_fan_div_common(struct nct6775_data *data)
{
if (data->kind == nct6775)
return nct6775_update_fan_div(data);
return 0;
}
static int nct6775_init_fan_div(struct nct6775_data *data)
{
int i, err;
err = nct6775_update_fan_div_common(data);
if (err)
return err;
/*
* For all fans, start with highest divider value if the divider
* register is not initialized. This ensures that we get a
* reading from the fan count register, even if it is not optimal.
* We'll compute a better divider later on.
*/
for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
if (!(data->has_fan & BIT(i)))
continue;
if (data->fan_div[i] == 0) {
data->fan_div[i] = 7;
err = nct6775_write_fan_div_common(data, i);
if (err)
return err;
}
}
return 0;
}
static int nct6775_init_fan_common(struct device *dev,
struct nct6775_data *data)
{
int i, err;
u16 reg;
if (data->has_fan_div) {
err = nct6775_init_fan_div(data);
if (err)
return err;
}
/*
* If fan_min is not set (0), set it to 0xff to disable it. This
* prevents the unnecessary warning when fanX_min is reported as 0.
*/
for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
if (data->has_fan_min & BIT(i)) {
err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
if (err)
return err;
if (!reg) {
err = nct6775_write_value(data, data->REG_FAN_MIN[i],
data->has_fan_div ? 0xff : 0xff1f);
if (err)
return err;
}
}
}
return 0;
}
static int nct6775_select_fan_div(struct device *dev,
struct nct6775_data *data, int nr, u16 reg)
{
int err;
u8 fan_div = data->fan_div[nr];
u16 fan_min;
if (!data->has_fan_div)
return 0;
/*
* If we failed to measure the fan speed, or the reported value is not
* in the optimal range, and the clock divider can be modified,
* let's try that for next time.
*/
if (reg == 0x00 && fan_div < 0x07)
fan_div++;
else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
fan_div--;
if (fan_div != data->fan_div[nr]) {
dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
nr + 1, div_from_reg(data->fan_div[nr]),
div_from_reg(fan_div));
/* Preserve min limit if possible */
if (data->has_fan_min & BIT(nr)) {
fan_min = data->fan_min[nr];
if (fan_div > data->fan_div[nr]) {
if (fan_min != 255 && fan_min > 1)
fan_min >>= 1;
} else {
if (fan_min != 255) {
fan_min <<= 1;
if (fan_min > 254)
fan_min = 254;
}
}
if (fan_min != data->fan_min[nr]) {
data->fan_min[nr] = fan_min;
err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min);
if (err)
return err;
}
}
data->fan_div[nr] = fan_div;
err = nct6775_write_fan_div_common(data, nr);
if (err)
return err;
}
return 0;
}
static int nct6775_update_pwm(struct device *dev)
{
struct nct6775_data *data = dev_get_drvdata(dev);
int i, j, err;
u16 fanmodecfg, reg;
bool duty_is_dc;
for (i = 0; i < data->pwm_num; i++) {
if (!(data->has_pwm & BIT(i)))
continue;
err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®);
if (err)
return err;
duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
data->pwm_mode[i] = !duty_is_dc;
err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg);
if (err)
return err;
for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
err = nct6775_read_value(data, data->REG_PWM[j][i], ®);
if (err)
return err;
data->pwm[j][i] = reg;
}
}
data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
(fanmodecfg >> 4) & 7);
if (!data->temp_tolerance[0][i] ||
data->pwm_enable[i] != speed_cruise)
data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
if (!data->target_speed_tolerance[i] ||
data->pwm_enable[i] == speed_cruise) {
u8 t = fanmodecfg & 0x0f;
if (data->REG_TOLERANCE_H) {
err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
if (err)
return err;
t |= (reg & 0x70) >> 1;
}
data->target_speed_tolerance[i] = t;
}
err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®);
if (err)
return err;
data->temp_tolerance[1][i] = reg;
err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®);
if (err)
return err;
data->pwm_temp_sel[i] = reg & 0x1f;
/* If fan can stop, report floor as 0 */
if (reg & 0x80)
data->pwm[2][i] = 0;
if (!data->REG_WEIGHT_TEMP_SEL[i])
continue;
err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®);
if (err)
return err;
data->pwm_weight_temp_sel[i] = reg & 0x1f;
/* If weight is disabled, report weight source as 0 */
if (!(reg & 0x80))
data->pwm_weight_temp_sel[i] = 0;
/* Weight temp data */
for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®);
if (err)
return err;
data->weight_temp[j][i] = reg;
}
}
return 0;
}
static int nct6775_update_pwm_limits(struct device *dev)
{
struct nct6775_data *data = dev_get_drvdata(dev);
int i, j, err;
u16 reg, reg_t;
for (i = 0; i < data->pwm_num; i++) {
if (!(data->has_pwm & BIT(i)))
continue;
for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®);
if (err)
return err;
data->fan_time[j][i] = reg;
}
err = nct6775_read_value(data, data->REG_TARGET[i], ®_t);
if (err)
return err;
/* Update only in matching mode or if never updated */
if (!data->target_temp[i] ||
data->pwm_enable[i] == thermal_cruise)
data->target_temp[i] = reg_t & data->target_temp_mask;
if (!data->target_speed[i] ||
data->pwm_enable[i] == speed_cruise) {
if (data->REG_TOLERANCE_H) {
err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
if (err)
return err;
reg_t |= (reg & 0x0f) << 8;
}
data->target_speed[i] = reg_t;
}
for (j = 0; j < data->auto_pwm_num; j++) {
err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®);
if (err)
return err;
data->auto_pwm[i][j] = reg;
err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®);
if (err)
return err;
data->auto_temp[i][j] = reg;
}
/* critical auto_pwm temperature data */
err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®);
if (err)
return err;
data->auto_temp[i][data->auto_pwm_num] = reg;
switch (data->kind) {
case nct6775:
err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®);
if (err)
return err;
data->auto_pwm[i][data->auto_pwm_num] =
(reg & 0x02) ? 0xff : 0x00;
break;
case nct6776:
data->auto_pwm[i][data->auto_pwm_num] = 0xff;
break;
case nct6106:
case nct6116:
case nct6779:
case nct6791:
case nct6792:
case nct6793:
case nct6795:
case nct6796:
case nct6797:
case nct6798:
case nct6799:
err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®);
if (err)
return err;
if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®);
if (err)
return err;
} else {
reg = 0xff;
}
data->auto_pwm[i][data->auto_pwm_num] = reg;
break;
}
}
return 0;
}
struct nct6775_data *nct6775_update_device(struct device *dev)
{
struct nct6775_data *data = dev_get_drvdata(dev);
int i, j, err = 0;
u16 reg;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
/* Fan clock dividers */
err = nct6775_update_fan_div_common(data);
if (err)
goto out;
/* Measured voltages and limits */
for (i = 0; i < data->in_num; i++) {
if (!(data->have_in & BIT(i)))
continue;
err = nct6775_read_value(data, data->REG_VIN[i], ®);
if (err)
goto out;
data->in[i][0] = reg;
err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®);
if (err)
goto out;
data->in[i][1] = reg;
err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®);
if (err)
goto out;
data->in[i][2] = reg;
}
/* Measured fan speeds and limits */
for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
if (!(data->has_fan & BIT(i)))
continue;
err = nct6775_read_value(data, data->REG_FAN[i], ®);
if (err)
goto out;
data->rpm[i] = data->fan_from_reg(reg,
data->fan_div[i]);
if (data->has_fan_min & BIT(i)) {
err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
if (err)
goto out;
data->fan_min[i] = reg;
}
if (data->REG_FAN_PULSES[i]) {
err = nct6775_read_value(data, data->REG_FAN_PULSES[i], ®);
if (err)
goto out;
data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03;
}
err = nct6775_select_fan_div(dev, data, i, reg);
if (err)
goto out;
}
err = nct6775_update_pwm(dev);
if (err)
goto out;
err = nct6775_update_pwm_limits(dev);
if (err)
goto out;
/* Measured temperatures and limits */
for (i = 0; i < NUM_TEMP; i++) {
if (!(data->have_temp & BIT(i)))
continue;
for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
if (data->reg_temp[j][i]) {
err = nct6775_read_temp(data, data->reg_temp[j][i], ®);
if (err)
goto out;
data->temp[j][i] = reg;
}
}
if (i >= NUM_TEMP_FIXED ||
!(data->have_temp_fixed & BIT(i)))
continue;
err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®);
if (err)
goto out;
data->temp_offset[i] = reg;
}
for (i = 0; i < NUM_TSI_TEMP; i++) {
if (!(data->have_tsi_temp & BIT(i)))
continue;
err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®);
if (err)
goto out;
data->tsi_temp[i] = reg;
}
data->alarms = 0;
for (i = 0; i < NUM_REG_ALARM; i++) {
u16 alarm;
if (!data->REG_ALARM[i])
continue;
err = nct6775_read_value(data, data->REG_ALARM[i], &alarm);
if (err)
goto out;
data->alarms |= ((u64)alarm) << (i << 3);
}
data->beeps = 0;
for (i = 0; i < NUM_REG_BEEP; i++) {
u16 beep;
if (!data->REG_BEEP[i])
continue;
err = nct6775_read_value(data, data->REG_BEEP[i], &beep);
if (err)
goto out;
data->beeps |= ((u64)beep) << (i << 3);
}
data->last_updated = jiffies;
data->valid = true;
}
out:
mutex_unlock(&data->update_lock);
return err ? ERR_PTR(err) : data;
}
EXPORT_SYMBOL_GPL(nct6775_update_device);
/*
* Sysfs callback functions
*/
static ssize_t
show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int index = sattr->index;
int nr = sattr->nr;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%ld\n",
in_from_reg(data->in[nr][index], nr, data->scale_in));
}
static ssize_t
store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int index = sattr->index;
int nr = sattr->nr;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
mutex_lock(&data->update_lock);
data->in[nr][index] = in_to_reg(val, nr, data->scale_in);
err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]);
mutex_unlock(&data->update_lock);
return err ? : count;
}
ssize_t
nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr;
if (IS_ERR(data))
return PTR_ERR(data);
nr = data->ALARM_BITS[sattr->index];
return sprintf(buf, "%u\n",
(unsigned int)((data->alarms >> nr) & 0x01));
}
EXPORT_SYMBOL_GPL(nct6775_show_alarm);
static int find_temp_source(struct nct6775_data *data, int index, int count)
{
int source = data->temp_src[index];
int nr, err;
for (nr = 0; nr < count; nr++) {
u16 src;
err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src);
if (err)
return err;
if ((src & 0x1f) == source)
return nr;
}
return -ENODEV;
}
static ssize_t
show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6775_data *data = nct6775_update_device(dev);
unsigned int alarm = 0;
int nr;
if (IS_ERR(data))
return PTR_ERR(data);
/*
* For temperatures, there is no fixed mapping from registers to alarm
* bits. Alarm bits are determined by the temperature source mapping.
*/
nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
if (nr >= 0) {
int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
alarm = (data->alarms >> bit) & 0x01;
}
return sprintf(buf, "%u\n", alarm);
}
ssize_t
nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6775_data *data = nct6775_update_device(dev);
int nr;
if (IS_ERR(data))
return PTR_ERR(data);
nr = data->BEEP_BITS[sattr->index];
return sprintf(buf, "%u\n",
(unsigned int)((data->beeps >> nr) & 0x01));
}
EXPORT_SYMBOL_GPL(nct6775_show_beep);
ssize_t
nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct6775_data *data = dev_get_drvdata(dev);
int nr = data->BEEP_BITS[sattr->index];
int regindex = nr >> 3;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > 1)
return -EINVAL;
mutex_lock(&data->update_lock);
if (val)
data->beeps |= (1ULL << nr);
else
data->beeps &= ~(1ULL << nr);
err = nct6775_write_value(data, data->REG_BEEP[regindex],
(data->beeps >> (regindex << 3)) & 0xff);
mutex_unlock(&data->update_lock);
return err ? : count;
}
EXPORT_SYMBOL_GPL(nct6775_store_beep);
static ssize_t
show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
struct nct6775_data *data = nct6775_update_device(dev);
unsigned int beep = 0;
int nr;
if (IS_ERR(data))
return PTR_ERR(data);
/*
* For temperatures, there is no fixed mapping from registers to beep
* enable bits. Beep enable bits are determined by the temperature
* source mapping.
*/
nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
if (nr >= 0) {
int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
beep = (data->beeps >> bit) & 0x01;
}
return sprintf(buf, "%u\n", beep);
}
static ssize_t
store_temp_beep(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct nct6775_data *data = dev_get_drvdata(dev);
int nr, bit, regindex;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > 1)
return -EINVAL;
nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
if (nr < 0)
return nr;
bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
regindex = bit >> 3;
mutex_lock(&data->update_lock);
if (val)
data->beeps |= (1ULL << bit);
else
data->beeps &= ~(1ULL << bit);
err = nct6775_write_value(data, data->REG_BEEP[regindex],
(data->beeps >> (regindex << 3)) & 0xff);
mutex_unlock(&data->update_lock);
return err ? : count;
}
static umode_t nct6775_in_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6775_data *data = dev_get_drvdata(dev);
int in = index / 5; /* voltage index */
int nr = index % 5; /* attribute index */
if (nr == 1 && data->ALARM_BITS[in] == -1)
return 0;
if (!(data->have_in & BIT(in)))
return 0;
return nct6775_attr_mode(data, attr);
}
SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0);
SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0);
SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0);
SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1);
SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2);
/*
* nct6775_in_is_visible uses the index into the following array
* to determine if attributes should be created or not.
* Any change in order or content must be matched.
*/
static struct sensor_device_template *nct6775_attributes_in_template[] = {
&sensor_dev_template_in_input,
&sensor_dev_template_in_alarm,
&sensor_dev_template_in_beep,
&sensor_dev_template_in_min,
&sensor_dev_template_in_max,
NULL
};
static const struct sensor_template_group nct6775_in_template_group = {
.templates = nct6775_attributes_in_template,
.is_visible = nct6775_in_is_visible,
};
static ssize_t
show_fan(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->rpm[nr]);
}
static ssize_t
show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
data->fan_from_reg_min(data->fan_min[nr],
data->fan_div[nr]));
}
static ssize_t
show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
}
static ssize_t
store_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
unsigned int reg;
u8 new_div;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
mutex_lock(&data->update_lock);
if (!data->has_fan_div) {
/* NCT6776F or NCT6779D; we know this is a 13 bit register */
if (!val) {
val = 0xff1f;
} else {
if (val > 1350000U)
val = 135000U;
val = 1350000U / val;
val = (val & 0x1f) | ((val << 3) & 0xff00);
}
data->fan_min[nr] = val;
goto write_min; /* Leave fan divider alone */
}
if (!val) {
/* No min limit, alarm disabled */
data->fan_min[nr] = 255;
new_div = data->fan_div[nr]; /* No change */
dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
goto write_div;
}
reg = 1350000U / val;
if (reg >= 128 * 255) {
/*
* Speed below this value cannot possibly be represented,
* even with the highest divider (128)
*/
data->fan_min[nr] = 254;
new_div = 7; /* 128 == BIT(7) */
dev_warn(dev,
"fan%u low limit %lu below minimum %u, set to minimum\n",
nr + 1, val, data->fan_from_reg_min(254, 7));
} else if (!reg) {
/*
* Speed above this value cannot possibly be represented,
* even with the lowest divider (1)
*/
data->fan_min[nr] = 1;
new_div = 0; /* 1 == BIT(0) */
dev_warn(dev,
"fan%u low limit %lu above maximum %u, set to maximum\n",
nr + 1, val, data->fan_from_reg_min(1, 0));
} else {
/*
* Automatically pick the best divider, i.e. the one such
* that the min limit will correspond to a register value
* in the 96..192 range
*/
new_div = 0;
while (reg > 192 && new_div < 7) {
reg >>= 1;
new_div++;
}
data->fan_min[nr] = reg;
}
write_div:
/*
* Write both the fan clock divider (if it changed) and the new
* fan min (unconditionally)
*/
if (new_div != data->fan_div[nr]) {
dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
nr + 1, div_from_reg(data->fan_div[nr]),
div_from_reg(new_div));
data->fan_div[nr] = new_div;
err = nct6775_write_fan_div_common(data, nr);
if (err)
goto write_min;
/* Give the chip time to sample a new speed value */
data->last_updated = jiffies;
}
write_min:
err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int p;
if (IS_ERR(data))
return PTR_ERR(data);
p = data->fan_pulses[sattr->index];
return sprintf(buf, "%d\n", p ? : 4);
}
static ssize_t
store_fan_pulses(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err;
u16 reg;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > 4)
return -EINVAL;
mutex_lock(&data->update_lock);
data->fan_pulses[nr] = val & 3;
err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®);
if (err)
goto out;
reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
out:
mutex_unlock(&data->update_lock);
return err ? : count;
}
static umode_t nct6775_fan_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6775_data *data = dev_get_drvdata(dev);
int fan = index / 6; /* fan index */
int nr = index % 6; /* attribute index */
if (!(data->has_fan & BIT(fan)))
return 0;
if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
return 0;
if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
return 0;
if (nr == 3 && !data->REG_FAN_PULSES[fan])
return 0;
if (nr == 4 && !(data->has_fan_min & BIT(fan)))
return 0;
if (nr == 5 && data->kind != nct6775)
return 0;
return nct6775_attr_mode(data, attr);
}
SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0);
SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE);
SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep,
nct6775_store_beep, FAN_ALARM_BASE);
SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0);
SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0);
SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0);
/*
* nct6775_fan_is_visible uses the index into the following array
* to determine if attributes should be created or not.
* Any change in order or content must be matched.
*/
static struct sensor_device_template *nct6775_attributes_fan_template[] = {
&sensor_dev_template_fan_input,
&sensor_dev_template_fan_alarm, /* 1 */
&sensor_dev_template_fan_beep, /* 2 */
&sensor_dev_template_fan_pulses,
&sensor_dev_template_fan_min, /* 4 */
&sensor_dev_template_fan_div, /* 5 */
NULL
};
static const struct sensor_template_group nct6775_fan_template_group = {
.templates = nct6775_attributes_fan_template,
.is_visible = nct6775_fan_is_visible,
.base = 1,
};
static ssize_t
show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
}
static ssize_t
show_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
}
static ssize_t
store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
int err;
long val;
err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
mutex_lock(&data->update_lock);
data->temp[index][nr] = LM75_TEMP_TO_REG(val);
err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]);
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
}
static ssize_t
store_temp_offset(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
mutex_lock(&data->update_lock);
data->temp_offset[nr] = val;
err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
}
static ssize_t
store_temp_type(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err;
u8 vbit, dbit;
u16 vbat, diode;
if (IS_ERR(data))
return PTR_ERR(data);
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val != 1 && val != 3 && val != 4)
return -EINVAL;
mutex_lock(&data->update_lock);
data->temp_type[nr] = val;
vbit = 0x02 << nr;
dbit = data->DIODE_MASK << nr;
err = nct6775_read_value(data, data->REG_VBAT, &vbat);
if (err)
goto out;
vbat &= ~vbit;
err = nct6775_read_value(data, data->REG_DIODE, &diode);
if (err)
goto out;
diode &= ~dbit;
switch (val) {
case 1: /* CPU diode (diode, current mode) */
vbat |= vbit;
diode |= dbit;
break;
case 3: /* diode, voltage mode */
vbat |= dbit;
break;
case 4: /* thermistor */
break;
}
err = nct6775_write_value(data, data->REG_VBAT, vbat);
if (err)
goto out;
err = nct6775_write_value(data, data->REG_DIODE, diode);
out:
mutex_unlock(&data->update_lock);
return err ? : count;
}
static umode_t nct6775_temp_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6775_data *data = dev_get_drvdata(dev);
int temp = index / 10; /* temp index */
int nr = index % 10; /* attribute index */
if (!(data->have_temp & BIT(temp)))
return 0;
if (nr == 1 && !data->temp_label)
return 0;
if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
return 0; /* alarm */
if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
return 0; /* beep */
if (nr == 4 && !data->reg_temp[1][temp]) /* max */
return 0;
if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
return 0;
if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
return 0;
if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
return 0;
/* offset and type only apply to fixed sensors */
if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
return 0;
return nct6775_attr_mode(data, attr);
}
SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0);
SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0);
SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1);
SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2);
SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3);
SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4);
SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0);
SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0);
SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0);
SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0);
/*
* nct6775_temp_is_visible uses the index into the following array
* to determine if attributes should be created or not.
* Any change in order or content must be matched.
*/
static struct sensor_device_template *nct6775_attributes_temp_template[] = {
&sensor_dev_template_temp_input,
&sensor_dev_template_temp_label,
&sensor_dev_template_temp_alarm, /* 2 */
&sensor_dev_template_temp_beep, /* 3 */
&sensor_dev_template_temp_max, /* 4 */
&sensor_dev_template_temp_max_hyst, /* 5 */
&sensor_dev_template_temp_crit, /* 6 */
&sensor_dev_template_temp_lcrit, /* 7 */
&sensor_dev_template_temp_offset, /* 8 */
&sensor_dev_template_temp_type, /* 9 */
NULL
};
static const struct sensor_template_group nct6775_temp_template_group = {
.templates = nct6775_attributes_temp_template,
.is_visible = nct6775_temp_is_visible,
.base = 1,
};
static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index]));
}
static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index);
}
SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr,
int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6775_data *data = dev_get_drvdata(dev);
int temp = index / 2;
return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0;
}
/*
* The index calculation in nct6775_tsi_temp_is_visible() must be kept in
* sync with the size of this array.
*/
static struct sensor_device_template *nct6775_tsi_temp_template[] = {
&sensor_dev_template_tsi_temp_input,
&sensor_dev_template_tsi_temp_label,
NULL
};
static ssize_t
show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
}
static ssize_t
store_pwm_mode(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err;
u16 reg;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > 1)
return -EINVAL;
/* Setting DC mode (0) is not supported for all chips/channels */
if (data->REG_PWM_MODE[nr] == 0) {
if (!val)
return -EINVAL;
return count;
}
mutex_lock(&data->update_lock);
data->pwm_mode[nr] = val;
err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®);
if (err)
goto out;
reg &= ~data->PWM_MODE_MASK[nr];
if (!val)
reg |= data->PWM_MODE_MASK[nr];
err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
out:
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
int err;
u16 pwm;
if (IS_ERR(data))
return PTR_ERR(data);
/*
* For automatic fan control modes, show current pwm readings.
* Otherwise, show the configured value.
*/
if (index == 0 && data->pwm_enable[nr] > manual) {
err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm);
if (err)
return err;
} else {
pwm = data->pwm[index][nr];
}
return sprintf(buf, "%d\n", pwm);
}
static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
unsigned long val;
int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
int maxval[7]
= { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
int err;
u16 reg;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
val = clamp_val(val, minval[index], maxval[index]);
mutex_lock(&data->update_lock);
data->pwm[index][nr] = val;
err = nct6775_write_value(data, data->REG_PWM[index][nr], val);
if (err)
goto out;
if (index == 2) { /* floor: disable if val == 0 */
err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
if (err)
goto out;
reg &= 0x7f;
if (val)
reg |= 0x80;
err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
}
out:
mutex_unlock(&data->update_lock);
return err ? : count;
}
/* Returns 0 if OK, -EINVAL otherwise */
static int check_trip_points(struct nct6775_data *data, int nr)
{
int i;
for (i = 0; i < data->auto_pwm_num - 1; i++) {
if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
return -EINVAL;
}
for (i = 0; i < data->auto_pwm_num - 1; i++) {
if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
return -EINVAL;
}
/* validate critical temperature and pwm if enabled (pwm > 0) */
if (data->auto_pwm[nr][data->auto_pwm_num]) {
if (data->auto_temp[nr][data->auto_pwm_num - 1] >
data->auto_temp[nr][data->auto_pwm_num] ||
data->auto_pwm[nr][data->auto_pwm_num - 1] >
data->auto_pwm[nr][data->auto_pwm_num])
return -EINVAL;
}
return 0;
}
static int pwm_update_registers(struct nct6775_data *data, int nr)
{
u16 reg;
int err;
switch (data->pwm_enable[nr]) {
case off:
case manual:
break;
case speed_cruise:
err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
if (err)
return err;
reg = (reg & ~data->tolerance_mask) |
(data->target_speed_tolerance[nr] & data->tolerance_mask);
err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
if (err)
return err;
err = nct6775_write_value(data, data->REG_TARGET[nr],
data->target_speed[nr] & 0xff);
if (err)
return err;
if (data->REG_TOLERANCE_H) {
reg = (data->target_speed[nr] >> 8) & 0x0f;
reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
if (err)
return err;
}
break;
case thermal_cruise:
err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]);
if (err)
return err;
fallthrough;
default:
err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
if (err)
return err;
reg = (reg & ~data->tolerance_mask) |
data->temp_tolerance[0][nr];
err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
if (err)
return err;
break;
}
return 0;
}
static ssize_t
show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
}
static ssize_t
store_pwm_enable(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err;
u16 reg;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > sf4)
return -EINVAL;
if (val == sf3 && data->kind != nct6775)
return -EINVAL;
if (val == sf4 && check_trip_points(data, nr)) {
dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
dev_err(dev, "Adjust trip points and try again\n");
return -EINVAL;
}
mutex_lock(&data->update_lock);
data->pwm_enable[nr] = val;
if (val == off) {
/*
* turn off pwm control: select manual mode, set pwm to maximum
*/
data->pwm[0][nr] = 255;
err = nct6775_write_value(data, data->REG_PWM[0][nr], 255);
if (err)
goto out;
}
err = pwm_update_registers(data, nr);
if (err)
goto out;
err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
if (err)
goto out;
reg &= 0x0f;
reg |= pwm_enable_to_reg(val) << 4;
err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
out:
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
{
int i, sel = 0;
for (i = 0; i < NUM_TEMP; i++) {
if (!(data->have_temp & BIT(i)))
continue;
if (src == data->temp_src[i]) {
sel = i + 1;
break;
}
}
return sprintf(buf, "%d\n", sel);
}
static ssize_t
show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int index = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
}
static ssize_t
store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err, src;
u16 reg;
if (IS_ERR(data))
return PTR_ERR(data);
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val == 0 || val > NUM_TEMP)
return -EINVAL;
if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
return -EINVAL;
mutex_lock(&data->update_lock);
src = data->temp_src[val - 1];
data->pwm_temp_sel[nr] = src;
err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
if (err)
goto out;
reg &= 0xe0;
reg |= src;
err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
out:
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int index = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return show_pwm_temp_sel_common(data, buf,
data->pwm_weight_temp_sel[index]);
}
static ssize_t
store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err, src;
u16 reg;
if (IS_ERR(data))
return PTR_ERR(data);
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > NUM_TEMP)
return -EINVAL;
val = array_index_nospec(val, NUM_TEMP + 1);
if (val && (!(data->have_temp & BIT(val - 1)) ||
!data->temp_src[val - 1]))
return -EINVAL;
mutex_lock(&data->update_lock);
if (val) {
src = data->temp_src[val - 1];
data->pwm_weight_temp_sel[nr] = src;
err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
if (err)
goto out;
reg &= 0xe0;
reg |= (src | 0x80);
err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
} else {
data->pwm_weight_temp_sel[nr] = 0;
err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
if (err)
goto out;
reg &= 0x7f;
err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
}
out:
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
}
static ssize_t
store_target_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
data->target_temp_mask);
mutex_lock(&data->update_lock);
data->target_temp[nr] = val;
err = pwm_update_registers(data, nr);
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
fan_from_reg16(data->target_speed[nr],
data->fan_div[nr]));
}
static ssize_t
store_target_speed(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err;
u16 speed;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
val = clamp_val(val, 0, 1350000U);
speed = fan_to_reg(val, data->fan_div[nr]);
mutex_lock(&data->update_lock);
data->target_speed[nr] = speed;
err = pwm_update_registers(data, nr);
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_temp_tolerance(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
}
static ssize_t
store_temp_tolerance(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
/* Limit tolerance as needed */
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
mutex_lock(&data->update_lock);
data->temp_tolerance[index][nr] = val;
if (index)
err = pwm_update_registers(data, nr);
else
err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val);
mutex_unlock(&data->update_lock);
return err ? : count;
}
/*
* Fan speed tolerance is a tricky beast, since the associated register is
* a tick counter, but the value is reported and configured as rpm.
* Compute resulting low and high rpm values and report the difference.
* A fan speed tolerance only makes sense if a fan target speed has been
* configured, so only display values other than 0 if that is the case.
*/
static ssize_t
show_speed_tolerance(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
int target, tolerance = 0;
if (IS_ERR(data))
return PTR_ERR(data);
target = data->target_speed[nr];
if (target) {
int low = target - data->target_speed_tolerance[nr];
int high = target + data->target_speed_tolerance[nr];
if (low <= 0)
low = 1;
if (high > 0xffff)
high = 0xffff;
if (high < low)
high = low;
tolerance = (fan_from_reg16(low, data->fan_div[nr])
- fan_from_reg16(high, data->fan_div[nr])) / 2;
}
return sprintf(buf, "%d\n", tolerance);
}
static ssize_t
store_speed_tolerance(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
int nr = sattr->index;
unsigned long val;
int err;
int low, high;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val;
low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val;
if (low <= 0)
low = 1;
if (high < low)
high = low;
val = (fan_to_reg(low, data->fan_div[nr]) -
fan_to_reg(high, data->fan_div[nr])) / 2;
/* Limit tolerance as needed */
val = clamp_val(val, 0, data->speed_tolerance_limit);
mutex_lock(&data->update_lock);
data->target_speed_tolerance[nr] = val;
err = pwm_update_registers(data, nr);
mutex_unlock(&data->update_lock);
return err ? : count;
}
SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0);
SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0);
SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0);
SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0);
SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0);
SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0);
SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance,
store_speed_tolerance, 0);
/* Smart Fan registers */
static ssize_t
show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
}
static ssize_t
store_weight_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
mutex_lock(&data->update_lock);
data->weight_temp[index][nr] = val;
err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
mutex_unlock(&data->update_lock);
return err ? : count;
}
SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644,
show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
0644, show_weight_temp, store_weight_temp, 0, 0);
SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
0644, show_weight_temp, store_weight_temp, 0, 1);
SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
0644, show_weight_temp, store_weight_temp, 0, 2);
SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5);
SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6);
static ssize_t
show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
step_time_from_reg(data->fan_time[index][nr],
data->pwm_mode[nr]));
}
static ssize_t
store_fan_time(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
val = step_time_to_reg(val, data->pwm_mode[nr]);
mutex_lock(&data->update_lock);
data->fan_time[index][nr] = val;
err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
}
static ssize_t
store_auto_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int point = sattr->index;
unsigned long val;
int err;
u16 reg;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
if (val > 255)
return -EINVAL;
if (point == data->auto_pwm_num) {
if (data->kind != nct6775 && !val)
return -EINVAL;
if (data->kind != nct6779 && val)
val = 0xff;
}
mutex_lock(&data->update_lock);
data->auto_pwm[nr][point] = val;
if (point < data->auto_pwm_num) {
err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point),
data->auto_pwm[nr][point]);
} else {
switch (data->kind) {
case nct6775:
/* disable if needed (pwm == 0) */
err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®);
if (err)
break;
if (val)
reg |= 0x02;
else
reg &= ~0x02;
err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
break;
case nct6776:
break; /* always enabled, nothing to do */
case nct6106:
case nct6116:
case nct6779:
case nct6791:
case nct6792:
case nct6793:
case nct6795:
case nct6796:
case nct6797:
case nct6798:
case nct6799:
err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val);
if (err)
break;
err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®);
if (err)
break;
if (val == 255)
reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
else
reg |= data->CRITICAL_PWM_ENABLE_MASK;
err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);
break;
}
}
mutex_unlock(&data->update_lock);
return err ? : count;
}
static ssize_t
show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int point = sattr->index;
if (IS_ERR(data))
return PTR_ERR(data);
/*
* We don't know for sure if the temperature is signed or unsigned.
* Assume it is unsigned.
*/
return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
}
static ssize_t
store_auto_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int point = sattr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255000)
return -EINVAL;
mutex_lock(&data->update_lock);
data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
if (point < data->auto_pwm_num) {
err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point),
data->auto_temp[nr][point]);
} else {
err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
data->auto_temp[nr][point]);
}
mutex_unlock(&data->update_lock);
return err ? : count;
}
static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct nct6775_data *data = dev_get_drvdata(dev);
int pwm = index / 36; /* pwm index */
int nr = index % 36; /* attribute index */
if (!(data->has_pwm & BIT(pwm)))
return 0;
if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
if (!data->REG_WEIGHT_TEMP_SEL[pwm])
return 0;
if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
return 0;
if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
return 0;
if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
return 0;
if (nr >= 22 && nr <= 35) { /* auto point */
int api = (nr - 22) / 2; /* auto point index */
if (api > data->auto_pwm_num)
return 0;
}
return nct6775_attr_mode(data, attr);
}
SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0);
SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644,
show_fan_time, store_fan_time, 0, 1);
SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644,
show_fan_time, store_fan_time, 0, 2);
SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1);
SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2);
SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644,
show_temp_tolerance, store_temp_tolerance, 0, 0);
SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
0644, show_temp_tolerance, store_temp_tolerance, 0, 1);
SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3);
SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4);
SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
0644, show_auto_pwm, store_auto_pwm, 0, 0);
SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
0644, show_auto_temp, store_auto_temp, 0, 0);
SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
0644, show_auto_pwm, store_auto_pwm, 0, 1);
SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
0644, show_auto_temp, store_auto_temp, 0, 1);
SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
0644, show_auto_pwm, store_auto_pwm, 0, 2);
SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
0644, show_auto_temp, store_auto_temp, 0, 2);
SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
0644, show_auto_pwm, store_auto_pwm, 0, 3);
SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
0644, show_auto_temp, store_auto_temp, 0, 3);
SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
0644, show_auto_pwm, store_auto_pwm, 0, 4);
SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
0644, show_auto_temp, store_auto_temp, 0, 4);
SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
0644, show_auto_pwm, store_auto_pwm, 0, 5);
SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
0644, show_auto_temp, store_auto_temp, 0, 5);
SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
0644, show_auto_pwm, store_auto_pwm, 0, 6);
SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
0644, show_auto_temp, store_auto_temp, 0, 6);
/*
* nct6775_pwm_is_visible uses the index into the following array
* to determine if attributes should be created or not.
* Any change in order or content must be matched.
*/
static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
&sensor_dev_template_pwm,
&sensor_dev_template_pwm_mode,
&sensor_dev_template_pwm_enable,
&sensor_dev_template_pwm_temp_sel,
&sensor_dev_template_pwm_temp_tolerance,
&sensor_dev_template_pwm_crit_temp_tolerance,
&sensor_dev_template_pwm_target_temp,
&sensor_dev_template_fan_target,
&sensor_dev_template_fan_tolerance,
&sensor_dev_template_pwm_stop_time,
&sensor_dev_template_pwm_step_up_time,
&sensor_dev_template_pwm_step_down_time,
&sensor_dev_template_pwm_start,
&sensor_dev_template_pwm_floor,
&sensor_dev_template_pwm_weight_temp_sel, /* 14 */
&sensor_dev_template_pwm_weight_temp_step,
&sensor_dev_template_pwm_weight_temp_step_tol,
&sensor_dev_template_pwm_weight_temp_step_base,
&sensor_dev_template_pwm_weight_duty_step, /* 18 */
&sensor_dev_template_pwm_max, /* 19 */
&sensor_dev_template_pwm_step, /* 20 */
&sensor_dev_template_pwm_weight_duty_base, /* 21 */
&sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
&sensor_dev_template_pwm_auto_point1_temp,
&sensor_dev_template_pwm_auto_point2_pwm,
&sensor_dev_template_pwm_auto_point2_temp,
&sensor_dev_template_pwm_auto_point3_pwm,
&sensor_dev_template_pwm_auto_point3_temp,
&sensor_dev_template_pwm_auto_point4_pwm,
&sensor_dev_template_pwm_auto_point4_temp,
&sensor_dev_template_pwm_auto_point5_pwm,
&sensor_dev_template_pwm_auto_point5_temp,
&sensor_dev_template_pwm_auto_point6_pwm,
&sensor_dev_template_pwm_auto_point6_temp,
&sensor_dev_template_pwm_auto_point7_pwm,
&sensor_dev_template_pwm_auto_point7_temp, /* 35 */
NULL
};
static const struct sensor_template_group nct6775_pwm_template_group = {
.templates = nct6775_attributes_pwm_template,
.is_visible = nct6775_pwm_is_visible,
.base = 1,
};
static inline int nct6775_init_device(struct nct6775_data *data)
{
int i, err;
u16 tmp, diode;
/* Start monitoring if needed */
if (data->REG_CONFIG) {
err = nct6775_read_value(data, data->REG_CONFIG, &tmp);
if (err)
return err;
if (!(tmp & 0x01)) {
err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
if (err)
return err;
}
}
/* Enable temperature sensors if needed */
for (i = 0; i < NUM_TEMP; i++) {
if (!(data->have_temp & BIT(i)))
continue;
if (!data->reg_temp_config[i])
continue;
err = nct6775_read_value(data, data->reg_temp_config[i], &tmp);
if (err)
return err;
if (tmp & 0x01) {
err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe);
if (err)
return err;
}
}
/* Enable VBAT monitoring if needed */
err = nct6775_read_value(data, data->REG_VBAT, &tmp);
if (err)
return err;
if (!(tmp & 0x01)) {
err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
if (err)
return err;
}
err = nct6775_read_value(data, data->REG_DIODE, &diode);
if (err)
return err;
for (i = 0; i < data->temp_fixed_num; i++) {
if (!(data->have_temp_fixed & BIT(i)))
continue;
if ((tmp & (data->DIODE_MASK << i))) /* diode */
data->temp_type[i]
= 3 - ((diode >> i) & data->DIODE_MASK);
else /* thermistor */
data->temp_type[i] = 4;
}
return 0;
}
static int add_temp_sensors(struct nct6775_data *data, const u16 *regp,
int *available, int *mask)
{
int i, err;
u16 src;
for (i = 0; i < data->pwm_num && *available; i++) {
int index;
if (!regp[i])
continue;
err = nct6775_read_value(data, regp[i], &src);
if (err)
return err;
src &= 0x1f;
if (!src || (*mask & BIT(src)))
continue;
if (!(data->temp_mask & BIT(src)))
continue;
index = __ffs(*available);
err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
if (err)
return err;
*available &= ~BIT(index);
*mask |= BIT(src);
}
return 0;
}
int nct6775_probe(struct device *dev, struct nct6775_data *data,
const struct regmap_config *regmapcfg)
{
int i, s, err = 0;
int mask, available;
u16 src;
const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp;
struct device *hwmon_dev;
struct sensor_template_group tsi_temp_tg;
data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
mutex_init(&data->update_lock);
data->name = nct6775_device_names[data->kind];
data->bank = 0xff; /* Force initial bank selection */
data->scale_in = scale_in;
switch (data->kind) {
case nct6106:
data->in_num = 9;
data->pwm_num = 3;
data->auto_pwm_num = 4;
data->temp_fixed_num = 3;
data->num_temp_alarms = 6;
data->num_temp_beeps = 6;
data->fan_from_reg = fan_from_reg13;
data->fan_from_reg_min = fan_from_reg13;
data->temp_label = nct6776_temp_label;
data->temp_mask = NCT6776_TEMP_MASK;
data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
data->REG_VBAT = NCT6106_REG_VBAT;
data->REG_DIODE = NCT6106_REG_DIODE;
data->DIODE_MASK = NCT6106_DIODE_MASK;
data->REG_VIN = NCT6106_REG_IN;
data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
data->REG_TARGET = NCT6106_REG_TARGET;
data->REG_FAN = NCT6106_REG_FAN;
data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
data->REG_PWM[0] = NCT6116_REG_PWM;
data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
data->REG_PWM_READ = NCT6106_REG_PWM_READ;
data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
data->REG_CRITICAL_TEMP_TOLERANCE
= NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
data->CRITICAL_PWM_ENABLE_MASK
= NCT6106_CRITICAL_PWM_ENABLE_MASK;
data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6106_REG_ALARM;
data->ALARM_BITS = NCT6106_ALARM_BITS;
data->REG_BEEP = NCT6106_REG_BEEP;
data->BEEP_BITS = NCT6106_BEEP_BITS;
data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP;
reg_temp = NCT6106_REG_TEMP;
reg_temp_mon = NCT6106_REG_TEMP_MON;
num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP);
reg_temp_over = NCT6106_REG_TEMP_OVER;
reg_temp_hyst = NCT6106_REG_TEMP_HYST;
reg_temp_config = NCT6106_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6106_REG_TEMP_CRIT;
reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
break;
case nct6116:
data->in_num = 9;
data->pwm_num = 3;
data->auto_pwm_num = 4;
data->temp_fixed_num = 3;
data->num_temp_alarms = 3;
data->num_temp_beeps = 3;
data->fan_from_reg = fan_from_reg13;
data->fan_from_reg_min = fan_from_reg13;
data->temp_label = nct6776_temp_label;
data->temp_mask = NCT6776_TEMP_MASK;
data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
data->REG_VBAT = NCT6106_REG_VBAT;
data->REG_DIODE = NCT6106_REG_DIODE;
data->DIODE_MASK = NCT6106_DIODE_MASK;
data->REG_VIN = NCT6106_REG_IN;
data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
data->REG_TARGET = NCT6116_REG_TARGET;
data->REG_FAN = NCT6116_REG_FAN;
data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
data->REG_PWM[0] = NCT6116_REG_PWM;
data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
data->REG_PWM_READ = NCT6106_REG_PWM_READ;
data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
data->REG_CRITICAL_TEMP_TOLERANCE
= NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
data->CRITICAL_PWM_ENABLE_MASK
= NCT6106_CRITICAL_PWM_ENABLE_MASK;
data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE;
data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6106_REG_ALARM;
data->ALARM_BITS = NCT6116_ALARM_BITS;
data->REG_BEEP = NCT6106_REG_BEEP;
data->BEEP_BITS = NCT6116_BEEP_BITS;
data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP;
reg_temp = NCT6106_REG_TEMP;
reg_temp_mon = NCT6106_REG_TEMP_MON;
num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP);
reg_temp_over = NCT6106_REG_TEMP_OVER;
reg_temp_hyst = NCT6106_REG_TEMP_HYST;
reg_temp_config = NCT6106_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6106_REG_TEMP_CRIT;
reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
break;
case nct6775:
data->in_num = 9;
data->pwm_num = 3;
data->auto_pwm_num = 6;
data->has_fan_div = true;
data->temp_fixed_num = 3;
data->num_temp_alarms = 3;
data->num_temp_beeps = 3;
data->ALARM_BITS = NCT6775_ALARM_BITS;
data->BEEP_BITS = NCT6775_BEEP_BITS;
data->fan_from_reg = fan_from_reg16;
data->fan_from_reg_min = fan_from_reg8;
data->target_temp_mask = 0x7f;
data->tolerance_mask = 0x0f;
data->speed_tolerance_limit = 15;
data->temp_label = nct6775_temp_label;
data->temp_mask = NCT6775_TEMP_MASK;
data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
data->REG_CONFIG = NCT6775_REG_CONFIG;
data->REG_VBAT = NCT6775_REG_VBAT;
data->REG_DIODE = NCT6775_REG_DIODE;
data->DIODE_MASK = NCT6775_DIODE_MASK;
data->REG_VIN = NCT6775_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6775_REG_FAN;
data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
data->REG_PWM[0] = NCT6775_REG_PWM;
data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_CRITICAL_TEMP_TOLERANCE
= NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6775_REG_ALARM;
data->REG_BEEP = NCT6775_REG_BEEP;
data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP;
reg_temp = NCT6775_REG_TEMP;
reg_temp_mon = NCT6775_REG_TEMP_MON;
num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP);
reg_temp_over = NCT6775_REG_TEMP_OVER;
reg_temp_hyst = NCT6775_REG_TEMP_HYST;
reg_temp_config = NCT6775_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6775_REG_TEMP_CRIT;
break;
case nct6776:
data->in_num = 9;
data->pwm_num = 3;
data->auto_pwm_num = 4;
data->has_fan_div = false;
data->temp_fixed_num = 3;
data->num_temp_alarms = 3;
data->num_temp_beeps = 6;
data->ALARM_BITS = NCT6776_ALARM_BITS;
data->BEEP_BITS = NCT6776_BEEP_BITS;
data->fan_from_reg = fan_from_reg13;
data->fan_from_reg_min = fan_from_reg13;
data->target_temp_mask = 0xff;
data->tolerance_mask = 0x07;
data->speed_tolerance_limit = 63;
data->temp_label = nct6776_temp_label;
data->temp_mask = NCT6776_TEMP_MASK;
data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
data->REG_CONFIG = NCT6775_REG_CONFIG;
data->REG_VBAT = NCT6775_REG_VBAT;
data->REG_DIODE = NCT6775_REG_DIODE;
data->DIODE_MASK = NCT6775_DIODE_MASK;
data->REG_VIN = NCT6775_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6775_REG_FAN;
data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
data->REG_PWM[0] = NCT6775_REG_PWM;
data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_CRITICAL_TEMP_TOLERANCE
= NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6775_REG_ALARM;
data->REG_BEEP = NCT6776_REG_BEEP;
data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
reg_temp = NCT6775_REG_TEMP;
reg_temp_mon = NCT6775_REG_TEMP_MON;
num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
reg_temp_over = NCT6775_REG_TEMP_OVER;
reg_temp_hyst = NCT6775_REG_TEMP_HYST;
reg_temp_config = NCT6776_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6776_REG_TEMP_CRIT;
break;
case nct6779:
data->in_num = 15;
data->pwm_num = 5;
data->auto_pwm_num = 4;
data->has_fan_div = false;
data->temp_fixed_num = 6;
data->num_temp_alarms = 2;
data->num_temp_beeps = 2;
data->ALARM_BITS = NCT6779_ALARM_BITS;
data->BEEP_BITS = NCT6779_BEEP_BITS;
data->fan_from_reg = fan_from_reg_rpm;
data->fan_from_reg_min = fan_from_reg13;
data->target_temp_mask = 0xff;
data->tolerance_mask = 0x07;
data->speed_tolerance_limit = 63;
data->temp_label = nct6779_temp_label;
data->temp_mask = NCT6779_TEMP_MASK;
data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
data->REG_CONFIG = NCT6775_REG_CONFIG;
data->REG_VBAT = NCT6775_REG_VBAT;
data->REG_DIODE = NCT6775_REG_DIODE;
data->DIODE_MASK = NCT6775_DIODE_MASK;
data->REG_VIN = NCT6779_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6779_REG_FAN;
data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
data->REG_PWM[0] = NCT6775_REG_PWM;
data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_CRITICAL_TEMP_TOLERANCE
= NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
data->CRITICAL_PWM_ENABLE_MASK
= NCT6779_CRITICAL_PWM_ENABLE_MASK;
data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6779_REG_ALARM;
data->REG_BEEP = NCT6776_REG_BEEP;
data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
reg_temp = NCT6779_REG_TEMP;
reg_temp_mon = NCT6779_REG_TEMP_MON;
num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
reg_temp_over = NCT6779_REG_TEMP_OVER;
reg_temp_hyst = NCT6779_REG_TEMP_HYST;
reg_temp_config = NCT6779_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6779_REG_TEMP_CRIT;
break;
case nct6791:
case nct6792:
case nct6793:
case nct6795:
case nct6796:
case nct6797:
data->in_num = 15;
data->pwm_num = (data->kind == nct6796 ||
data->kind == nct6797) ? 7 : 6;
data->auto_pwm_num = 4;
data->has_fan_div = false;
data->temp_fixed_num = 6;
data->num_temp_alarms = 2;
data->num_temp_beeps = 2;
data->ALARM_BITS = NCT6791_ALARM_BITS;
data->BEEP_BITS = NCT6779_BEEP_BITS;
data->fan_from_reg = fan_from_reg_rpm;
data->fan_from_reg_min = fan_from_reg13;
data->target_temp_mask = 0xff;
data->tolerance_mask = 0x07;
data->speed_tolerance_limit = 63;
switch (data->kind) {
default:
case nct6791:
data->temp_label = nct6779_temp_label;
data->temp_mask = NCT6791_TEMP_MASK;
data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
break;
case nct6792:
data->temp_label = nct6792_temp_label;
data->temp_mask = NCT6792_TEMP_MASK;
data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
break;
case nct6793:
data->temp_label = nct6793_temp_label;
data->temp_mask = NCT6793_TEMP_MASK;
data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
break;
case nct6795:
case nct6797:
data->temp_label = nct6795_temp_label;
data->temp_mask = NCT6795_TEMP_MASK;
data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
break;
case nct6796:
data->temp_label = nct6796_temp_label;
data->temp_mask = NCT6796_TEMP_MASK;
data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
break;
}
data->REG_CONFIG = NCT6775_REG_CONFIG;
data->REG_VBAT = NCT6775_REG_VBAT;
data->REG_DIODE = NCT6775_REG_DIODE;
data->DIODE_MASK = NCT6775_DIODE_MASK;
data->REG_VIN = NCT6779_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6779_REG_FAN;
data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
data->REG_PWM[0] = NCT6775_REG_PWM;
data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_CRITICAL_TEMP_TOLERANCE
= NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
data->CRITICAL_PWM_ENABLE_MASK
= NCT6779_CRITICAL_PWM_ENABLE_MASK;
data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6791_REG_ALARM;
if (data->kind == nct6791)
data->REG_BEEP = NCT6776_REG_BEEP;
else
data->REG_BEEP = NCT6792_REG_BEEP;
switch (data->kind) {
case nct6791:
case nct6792:
case nct6793:
data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
break;
case nct6795:
case nct6796:
case nct6797:
data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
break;
default:
num_reg_tsi_temp = 0;
break;
}
reg_temp = NCT6779_REG_TEMP;
num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
if (data->kind == nct6791) {
reg_temp_mon = NCT6779_REG_TEMP_MON;
num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
} else {
reg_temp_mon = NCT6792_REG_TEMP_MON;
num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
}
reg_temp_over = NCT6779_REG_TEMP_OVER;
reg_temp_hyst = NCT6779_REG_TEMP_HYST;
reg_temp_config = NCT6779_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6779_REG_TEMP_CRIT;
break;
case nct6798:
case nct6799:
data->in_num = data->kind == nct6799 ? 18 : 15;
data->scale_in = scale_in_6798;
data->pwm_num = 7;
data->auto_pwm_num = 4;
data->has_fan_div = false;
data->temp_fixed_num = 6;
data->num_temp_alarms = 7;
data->num_temp_beeps = 8;
data->ALARM_BITS = NCT6799_ALARM_BITS;
data->BEEP_BITS = NCT6799_BEEP_BITS;
data->fan_from_reg = fan_from_reg_rpm;
data->fan_from_reg_min = fan_from_reg13;
data->target_temp_mask = 0xff;
data->tolerance_mask = 0x07;
data->speed_tolerance_limit = 63;
switch (data->kind) {
default:
case nct6798:
data->temp_label = nct6798_temp_label;
data->temp_mask = NCT6798_TEMP_MASK;
data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
break;
case nct6799:
data->temp_label = nct6799_temp_label;
data->temp_mask = NCT6799_TEMP_MASK;
data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK;
break;
}
data->REG_CONFIG = NCT6775_REG_CONFIG;
data->REG_VBAT = NCT6775_REG_VBAT;
data->REG_DIODE = NCT6775_REG_DIODE;
data->DIODE_MASK = NCT6775_DIODE_MASK;
data->REG_VIN = NCT6779_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6779_REG_FAN;
data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
data->REG_PWM[0] = NCT6775_REG_PWM;
data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK;
data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE;
data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6799_REG_ALARM;
data->REG_BEEP = NCT6792_REG_BEEP;
data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
reg_temp = NCT6798_REG_TEMP;
num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP);
reg_temp_mon = NCT6798_REG_TEMP_MON;
num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON);
reg_temp_over = NCT6798_REG_TEMP_OVER;
reg_temp_hyst = NCT6798_REG_TEMP_HYST;
reg_temp_config = NCT6779_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6798_REG_TEMP_CRIT;
break;
default:
return -ENODEV;
}
data->have_in = BIT(data->in_num) - 1;
data->have_temp = 0;
/*
* On some boards, not all available temperature sources are monitored,
* even though some of the monitoring registers are unused.
* Get list of unused monitoring registers, then detect if any fan
* controls are configured to use unmonitored temperature sources.
* If so, assign the unmonitored temperature sources to available
* monitoring registers.
*/
mask = 0;
available = 0;
for (i = 0; i < num_reg_temp; i++) {
if (reg_temp[i] == 0)
continue;
err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
if (err)
return err;
src &= 0x1f;
if (!src || (mask & BIT(src)))
available |= BIT(i);
mask |= BIT(src);
}
/*
* Now find unmonitored temperature registers and enable monitoring
* if additional monitoring registers are available.
*/
err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
if (err)
return err;
err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
if (err)
return err;
mask = 0;
s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
for (i = 0; i < num_reg_temp; i++) {
if (reg_temp[i] == 0)
continue;
err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
if (err)
return err;
src &= 0x1f;
if (!src || (mask & BIT(src)))
continue;
if (!(data->temp_mask & BIT(src))) {
dev_info(dev,
"Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
continue;
}
mask |= BIT(src);
/* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
if (src <= data->temp_fixed_num) {
data->have_temp |= BIT(src - 1);
data->have_temp_fixed |= BIT(src - 1);
data->reg_temp[0][src - 1] = reg_temp[i];
data->reg_temp[1][src - 1] = reg_temp_over[i];
data->reg_temp[2][src - 1] = reg_temp_hyst[i];
if (reg_temp_crit_h && reg_temp_crit_h[i])
data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
else if (reg_temp_crit[src - 1])
data->reg_temp[3][src - 1]
= reg_temp_crit[src - 1];
if (reg_temp_crit_l && reg_temp_crit_l[i])
data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
data->reg_temp_config[src - 1] = reg_temp_config[i];
data->temp_src[src - 1] = src;
continue;
}
if (s >= NUM_TEMP)
continue;
/* Use dynamic index for other sources */
data->have_temp |= BIT(s);
data->reg_temp[0][s] = reg_temp[i];
data->reg_temp[1][s] = reg_temp_over[i];
data->reg_temp[2][s] = reg_temp_hyst[i];
data->reg_temp_config[s] = reg_temp_config[i];
if (reg_temp_crit_h && reg_temp_crit_h[i])
data->reg_temp[3][s] = reg_temp_crit_h[i];
else if (reg_temp_crit[src - 1])
data->reg_temp[3][s] = reg_temp_crit[src - 1];
if (reg_temp_crit_l && reg_temp_crit_l[i])
data->reg_temp[4][s] = reg_temp_crit_l[i];
data->temp_src[s] = src;
s++;
}
/*
* Repeat with temperatures used for fan control.
* This set of registers does not support limits.
*/
for (i = 0; i < num_reg_temp_mon; i++) {
if (reg_temp_mon[i] == 0)
continue;
err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src);
if (err)
return err;
src &= 0x1f;
if (!src)
continue;
if (!(data->temp_mask & BIT(src))) {
dev_info(dev,
"Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
src, i, data->REG_TEMP_SEL[i],
reg_temp_mon[i]);
continue;
}
/*
* For virtual temperature sources, the 'virtual' temperature
* for each fan reflects a different temperature, and there
* are no duplicates.
*/
if (!(data->virt_temp_mask & BIT(src))) {
if (mask & BIT(src))
continue;
mask |= BIT(src);
}
/* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
if (src <= data->temp_fixed_num) {
if (data->have_temp & BIT(src - 1))
continue;
data->have_temp |= BIT(src - 1);
data->have_temp_fixed |= BIT(src - 1);
data->reg_temp[0][src - 1] = reg_temp_mon[i];
data->temp_src[src - 1] = src;
continue;
}
if (s >= NUM_TEMP)
continue;
/* Use dynamic index for other sources */
data->have_temp |= BIT(s);
data->reg_temp[0][s] = reg_temp_mon[i];
data->temp_src[s] = src;
s++;
}
#ifdef USE_ALTERNATE
/*
* Go through the list of alternate temp registers and enable
* if possible.
* The temperature is already monitored if the respective bit in <mask>
* is set.
*/
for (i = 0; i < 31; i++) {
if (!(data->temp_mask & BIT(i + 1)))
continue;
if (!reg_temp_alternate[i])
continue;
if (mask & BIT(i + 1))
continue;
if (i < data->temp_fixed_num) {
if (data->have_temp & BIT(i))
continue;
data->have_temp |= BIT(i);
data->have_temp_fixed |= BIT(i);
data->reg_temp[0][i] = reg_temp_alternate[i];
if (i < num_reg_temp) {
data->reg_temp[1][i] = reg_temp_over[i];
data->reg_temp[2][i] = reg_temp_hyst[i];
}
data->temp_src[i] = i + 1;
continue;
}
if (s >= NUM_TEMP) /* Abort if no more space */
break;
data->have_temp |= BIT(s);
data->reg_temp[0][s] = reg_temp_alternate[i];
data->temp_src[s] = i + 1;
s++;
}
#endif /* USE_ALTERNATE */
/* Check which TSIx_TEMP registers are active */
for (i = 0; i < num_reg_tsi_temp; i++) {
u16 tmp;
err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp);
if (err)
return err;
if (tmp)
data->have_tsi_temp |= BIT(i);
}
/* Initialize the chip */
err = nct6775_init_device(data);
if (err)
return err;
if (data->driver_init) {
err = data->driver_init(data);
if (err)
return err;
}
/* Read fan clock dividers immediately */
err = nct6775_init_fan_common(dev, data);
if (err)
return err;
/* Register sysfs hooks */
err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group,
data->pwm_num);
if (err)
return err;
err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group,
fls(data->have_in));
if (err)
return err;
err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group,
fls(data->has_fan));
if (err)
return err;
err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group,
fls(data->have_temp));
if (err)
return err;
if (data->have_tsi_temp) {
tsi_temp_tg.templates = nct6775_tsi_temp_template;
tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible;
tsi_temp_tg.base = fls(data->have_temp) + 1;
err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg,
fls(data->have_tsi_temp));
if (err)
return err;
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
EXPORT_SYMBOL_GPL(nct6775_probe);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/nct6775-core.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ds1621.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Christian W. Zuckschwerdt <[email protected]> 2000-11-23
* based on lm75.c by Frodo Looijaard <[email protected]>
* Ported to Linux 2.6 by Aurelien Jarno <[email protected]> with
* the help of Jean Delvare <[email protected]>
*
* The DS1621 device is a digital temperature/thermometer with 9-bit
* resolution, a thermal alarm output (Tout), and user-defined minimum
* and maximum temperature thresholds (TH and TL).
*
* The DS1625, DS1631, DS1721, and DS1731 are pin compatible with the DS1621
* and similar in operation, with slight variations as noted in the device
* datasheets (please refer to www.maximintegrated.com for specific
* device information).
*
* Since the DS1621 was the first chipset supported by this driver,
* most comments will refer to this chipset, but are actually general
* and concern all supported chipsets, unless mentioned otherwise.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/kernel.h>
/* Supported devices */
enum chips { ds1621, ds1625, ds1631, ds1721, ds1731 };
/* Insmod parameters */
static int polarity = -1;
module_param(polarity, int, 0);
MODULE_PARM_DESC(polarity, "Output's polarity: 0 = active high, 1 = active low");
/*
* The Configuration/Status register
*
* - DS1621:
* 7 6 5 4 3 2 1 0
* |Done|THF |TLF |NVB | X | X |POL |1SHOT|
*
* - DS1625:
* 7 6 5 4 3 2 1 0
* |Done|THF |TLF |NVB | 1 | 0 |POL |1SHOT|
*
* - DS1631, DS1731:
* 7 6 5 4 3 2 1 0
* |Done|THF |TLF |NVB | R1 | R0 |POL |1SHOT|
*
* - DS1721:
* 7 6 5 4 3 2 1 0
* |Done| X | X | U | R1 | R0 |POL |1SHOT|
*
* Where:
* - 'X' is Reserved
* - 'U' is Undefined
*/
#define DS1621_REG_CONFIG_NVB 0x10
#define DS1621_REG_CONFIG_RESOL 0x0C
#define DS1621_REG_CONFIG_POLARITY 0x02
#define DS1621_REG_CONFIG_1SHOT 0x01
#define DS1621_REG_CONFIG_DONE 0x80
#define DS1621_REG_CONFIG_RESOL_SHIFT 2
/* ds1721 conversion rates: {C/LSB, time(ms), resolution bit setting} */
static const unsigned short ds1721_convrates[] = {
94, /* 9-bits (0.5, 93.75, RES[0..1] = 0 */
188, /* 10-bits (0.25, 187.5, RES[0..1] = 1 */
375, /* 11-bits (0.125, 375, RES[0..1] = 2 */
750, /* 12-bits (0.0625, 750, RES[0..1] = 3 */
};
#define DS1621_CONVERSION_MAX 750
#define DS1625_CONVERSION_MAX 500
#define DS1621_TEMP_MAX 125000
#define DS1621_TEMP_MIN (-55000)
/* The DS1621 temperature registers */
static const u8 DS1621_REG_TEMP[3] = {
0xAA, /* input, word, RO */
0xA2, /* min, word, RW */
0xA1, /* max, word, RW */
};
#define DS1621_REG_CONF 0xAC /* byte, RW */
#define DS1621_COM_START 0xEE /* no data */
#define DS1721_COM_START 0x51 /* no data */
#define DS1621_COM_STOP 0x22 /* no data */
/* The DS1621 configuration register */
#define DS1621_ALARM_TEMP_HIGH 0x40
#define DS1621_ALARM_TEMP_LOW 0x20
/* Conversions */
#define ALARMS_FROM_REG(val) ((val) & \
(DS1621_ALARM_TEMP_HIGH | DS1621_ALARM_TEMP_LOW))
/* Each client has this additional data */
struct ds1621_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
enum chips kind; /* device type */
u16 temp[3]; /* Register values, word */
u8 conf; /* Register encoding, combined */
u8 zbits; /* Resolution encoded as number of
* zero bits */
u16 update_interval; /* Conversion rate in milliseconds */
};
static inline int DS1621_TEMP_FROM_REG(u16 reg)
{
return DIV_ROUND_CLOSEST(((s16)reg / 16) * 625, 10);
}
/*
* TEMP: 0.001C/bit (-55C to +125C)
* REG:
* - 1621, 1625: 0.5C/bit, 7 zero-bits
* - 1631, 1721, 1731: 0.0625C/bit, 4 zero-bits
*/
static inline u16 DS1621_TEMP_TO_REG(long temp, u8 zbits)
{
temp = clamp_val(temp, DS1621_TEMP_MIN, DS1621_TEMP_MAX);
temp = DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
return temp;
}
static void ds1621_init_client(struct ds1621_data *data,
struct i2c_client *client)
{
u8 conf, new_conf, sreg, resol;
new_conf = conf = i2c_smbus_read_byte_data(client, DS1621_REG_CONF);
/* switch to continuous conversion mode */
new_conf &= ~DS1621_REG_CONFIG_1SHOT;
/* setup output polarity */
if (polarity == 0)
new_conf &= ~DS1621_REG_CONFIG_POLARITY;
else if (polarity == 1)
new_conf |= DS1621_REG_CONFIG_POLARITY;
if (conf != new_conf)
i2c_smbus_write_byte_data(client, DS1621_REG_CONF, new_conf);
switch (data->kind) {
case ds1625:
data->update_interval = DS1625_CONVERSION_MAX;
data->zbits = 7;
sreg = DS1621_COM_START;
break;
case ds1631:
case ds1721:
case ds1731:
resol = (new_conf & DS1621_REG_CONFIG_RESOL) >>
DS1621_REG_CONFIG_RESOL_SHIFT;
data->update_interval = ds1721_convrates[resol];
data->zbits = 7 - resol;
sreg = DS1721_COM_START;
break;
default:
data->update_interval = DS1621_CONVERSION_MAX;
data->zbits = 7;
sreg = DS1621_COM_START;
break;
}
/* start conversion */
i2c_smbus_write_byte(client, sreg);
}
static struct ds1621_data *ds1621_update_client(struct device *dev)
{
struct ds1621_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 new_conf;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + data->update_interval) ||
!data->valid) {
int i;
dev_dbg(&client->dev, "Starting ds1621 update\n");
data->conf = i2c_smbus_read_byte_data(client, DS1621_REG_CONF);
for (i = 0; i < ARRAY_SIZE(data->temp); i++)
data->temp[i] = i2c_smbus_read_word_swapped(client,
DS1621_REG_TEMP[i]);
/* reset alarms if necessary */
new_conf = data->conf;
if (data->temp[0] > data->temp[1]) /* input > min */
new_conf &= ~DS1621_ALARM_TEMP_LOW;
if (data->temp[0] < data->temp[2]) /* input < max */
new_conf &= ~DS1621_ALARM_TEMP_HIGH;
if (data->conf != new_conf)
i2c_smbus_write_byte_data(client, DS1621_REG_CONF,
new_conf);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ds1621_data *data = ds1621_update_client(dev);
return sprintf(buf, "%d\n",
DS1621_TEMP_FROM_REG(data->temp[attr->index]));
}
static ssize_t temp_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ds1621_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp[attr->index] = DS1621_TEMP_TO_REG(val, data->zbits);
i2c_smbus_write_word_swapped(data->client, DS1621_REG_TEMP[attr->index],
data->temp[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t alarms_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct ds1621_data *data = ds1621_update_client(dev);
return sprintf(buf, "%d\n", ALARMS_FROM_REG(data->conf));
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ds1621_data *data = ds1621_update_client(dev);
return sprintf(buf, "%d\n", !!(data->conf & attr->index));
}
static ssize_t update_interval_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct ds1621_data *data = dev_get_drvdata(dev);
return sysfs_emit(buf, "%hu\n", data->update_interval);
}
static ssize_t update_interval_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct ds1621_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long convrate;
s32 err;
int resol = 0;
err = kstrtoul(buf, 10, &convrate);
if (err)
return err;
/* Convert rate into resolution bits */
while (resol < (ARRAY_SIZE(ds1721_convrates) - 1) &&
convrate > ds1721_convrates[resol])
resol++;
mutex_lock(&data->update_lock);
data->conf = i2c_smbus_read_byte_data(client, DS1621_REG_CONF);
data->conf &= ~DS1621_REG_CONFIG_RESOL;
data->conf |= (resol << DS1621_REG_CONFIG_RESOL_SHIFT);
i2c_smbus_write_byte_data(client, DS1621_REG_CONF, data->conf);
data->update_interval = ds1721_convrates[resol];
data->zbits = 7 - resol;
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RO(alarms);
static DEVICE_ATTR_RW(update_interval);
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, 2);
static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, alarm, DS1621_ALARM_TEMP_LOW);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, DS1621_ALARM_TEMP_HIGH);
static struct attribute *ds1621_attributes[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_update_interval.attr,
NULL
};
static umode_t ds1621_attribute_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct ds1621_data *data = dev_get_drvdata(dev);
if (attr == &dev_attr_update_interval.attr)
if (data->kind == ds1621 || data->kind == ds1625)
/* shhh, we're hiding update_interval */
return 0;
return attr->mode;
}
static const struct attribute_group ds1621_group = {
.attrs = ds1621_attributes,
.is_visible = ds1621_attribute_visible
};
__ATTRIBUTE_GROUPS(ds1621);
static const struct i2c_device_id ds1621_id[];
static int ds1621_probe(struct i2c_client *client)
{
struct ds1621_data *data;
struct device *hwmon_dev;
data = devm_kzalloc(&client->dev, sizeof(struct ds1621_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->update_lock);
data->kind = i2c_match_id(ds1621_id, client)->driver_data;
data->client = client;
/* Initialize the DS1621 chip */
ds1621_init_client(data, client);
hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
client->name, data,
ds1621_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ds1621_id[] = {
{ "ds1621", ds1621 },
{ "ds1625", ds1625 },
{ "ds1631", ds1631 },
{ "ds1721", ds1721 },
{ "ds1731", ds1731 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ds1621_id);
/* This is the driver that will be inserted */
static struct i2c_driver ds1621_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "ds1621",
},
.probe = ds1621_probe,
.id_table = ds1621_id,
};
module_i2c_driver(ds1621_driver);
MODULE_AUTHOR("Christian W. Zuckschwerdt <[email protected]>");
MODULE_DESCRIPTION("DS1621 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ds1621.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for Texas Instruments INA219, INA226 power monitor chips
*
* INA219:
* Zero Drift Bi-Directional Current/Power Monitor with I2C Interface
* Datasheet: https://www.ti.com/product/ina219
*
* INA220:
* Bi-Directional Current/Power Monitor with I2C Interface
* Datasheet: https://www.ti.com/product/ina220
*
* INA226:
* Bi-Directional Current/Power Monitor with I2C Interface
* Datasheet: https://www.ti.com/product/ina226
*
* INA230:
* Bi-directional Current/Power Monitor with I2C Interface
* Datasheet: https://www.ti.com/product/ina230
*
* Copyright (C) 2012 Lothar Felten <[email protected]>
* Thanks to Jan Volkering
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
#include <linux/of.h>
#include <linux/delay.h>
#include <linux/util_macros.h>
#include <linux/regmap.h>
#include <linux/platform_data/ina2xx.h>
/* common register definitions */
#define INA2XX_CONFIG 0x00
#define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
#define INA2XX_BUS_VOLTAGE 0x02 /* readonly */
#define INA2XX_POWER 0x03 /* readonly */
#define INA2XX_CURRENT 0x04 /* readonly */
#define INA2XX_CALIBRATION 0x05
/* INA226 register definitions */
#define INA226_MASK_ENABLE 0x06
#define INA226_ALERT_LIMIT 0x07
#define INA226_DIE_ID 0xFF
/* register count */
#define INA219_REGISTERS 6
#define INA226_REGISTERS 8
#define INA2XX_MAX_REGISTERS 8
/* settings - depend on use case */
#define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
#define INA226_CONFIG_DEFAULT 0x4527 /* averages=16 */
/* worst case is 68.10 ms (~14.6Hz, ina219) */
#define INA2XX_CONVERSION_RATE 15
#define INA2XX_MAX_DELAY 69 /* worst case delay in ms */
#define INA2XX_RSHUNT_DEFAULT 10000
/* bit mask for reading the averaging setting in the configuration register */
#define INA226_AVG_RD_MASK 0x0E00
#define INA226_READ_AVG(reg) (((reg) & INA226_AVG_RD_MASK) >> 9)
#define INA226_SHIFT_AVG(val) ((val) << 9)
/* bit number of alert functions in Mask/Enable Register */
#define INA226_SHUNT_OVER_VOLTAGE_BIT 15
#define INA226_SHUNT_UNDER_VOLTAGE_BIT 14
#define INA226_BUS_OVER_VOLTAGE_BIT 13
#define INA226_BUS_UNDER_VOLTAGE_BIT 12
#define INA226_POWER_OVER_LIMIT_BIT 11
/* bit mask for alert config bits of Mask/Enable Register */
#define INA226_ALERT_CONFIG_MASK 0xFC00
#define INA226_ALERT_FUNCTION_FLAG BIT(4)
/* common attrs, ina226 attrs and NULL */
#define INA2XX_MAX_ATTRIBUTE_GROUPS 3
/*
* Both bus voltage and shunt voltage conversion times for ina226 are set
* to 0b0100 on POR, which translates to 2200 microseconds in total.
*/
#define INA226_TOTAL_CONV_TIME_DEFAULT 2200
static struct regmap_config ina2xx_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
};
enum ina2xx_ids { ina219, ina226 };
struct ina2xx_config {
u16 config_default;
int calibration_value;
int registers;
int shunt_div;
int bus_voltage_shift;
int bus_voltage_lsb; /* uV */
int power_lsb_factor;
};
struct ina2xx_data {
const struct ina2xx_config *config;
long rshunt;
long current_lsb_uA;
long power_lsb_uW;
struct mutex config_lock;
struct regmap *regmap;
const struct attribute_group *groups[INA2XX_MAX_ATTRIBUTE_GROUPS];
};
static const struct ina2xx_config ina2xx_config[] = {
[ina219] = {
.config_default = INA219_CONFIG_DEFAULT,
.calibration_value = 4096,
.registers = INA219_REGISTERS,
.shunt_div = 100,
.bus_voltage_shift = 3,
.bus_voltage_lsb = 4000,
.power_lsb_factor = 20,
},
[ina226] = {
.config_default = INA226_CONFIG_DEFAULT,
.calibration_value = 2048,
.registers = INA226_REGISTERS,
.shunt_div = 400,
.bus_voltage_shift = 0,
.bus_voltage_lsb = 1250,
.power_lsb_factor = 25,
},
};
/*
* Available averaging rates for ina226. The indices correspond with
* the bit values expected by the chip (according to the ina226 datasheet,
* table 3 AVG bit settings, found at
* https://www.ti.com/lit/ds/symlink/ina226.pdf.
*/
static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
static int ina226_reg_to_interval(u16 config)
{
int avg = ina226_avg_tab[INA226_READ_AVG(config)];
/*
* Multiply the total conversion time by the number of averages.
* Return the result in milliseconds.
*/
return DIV_ROUND_CLOSEST(avg * INA226_TOTAL_CONV_TIME_DEFAULT, 1000);
}
/*
* Return the new, shifted AVG field value of CONFIG register,
* to use with regmap_update_bits
*/
static u16 ina226_interval_to_reg(int interval)
{
int avg, avg_bits;
avg = DIV_ROUND_CLOSEST(interval * 1000,
INA226_TOTAL_CONV_TIME_DEFAULT);
avg_bits = find_closest(avg, ina226_avg_tab,
ARRAY_SIZE(ina226_avg_tab));
return INA226_SHIFT_AVG(avg_bits);
}
/*
* Calibration register is set to the best value, which eliminates
* truncation errors on calculating current register in hardware.
* According to datasheet (eq. 3) the best values are 2048 for
* ina226 and 4096 for ina219. They are hardcoded as calibration_value.
*/
static int ina2xx_calibrate(struct ina2xx_data *data)
{
return regmap_write(data->regmap, INA2XX_CALIBRATION,
data->config->calibration_value);
}
/*
* Initialize the configuration and calibration registers.
*/
static int ina2xx_init(struct ina2xx_data *data)
{
int ret = regmap_write(data->regmap, INA2XX_CONFIG,
data->config->config_default);
if (ret < 0)
return ret;
return ina2xx_calibrate(data);
}
static int ina2xx_read_reg(struct device *dev, int reg, unsigned int *regval)
{
struct ina2xx_data *data = dev_get_drvdata(dev);
int ret, retry;
dev_dbg(dev, "Starting register %d read\n", reg);
for (retry = 5; retry; retry--) {
ret = regmap_read(data->regmap, reg, regval);
if (ret < 0)
return ret;
dev_dbg(dev, "read %d, val = 0x%04x\n", reg, *regval);
/*
* If the current value in the calibration register is 0, the
* power and current registers will also remain at 0. In case
* the chip has been reset let's check the calibration
* register and reinitialize if needed.
* We do that extra read of the calibration register if there
* is some hint of a chip reset.
*/
if (*regval == 0) {
unsigned int cal;
ret = regmap_read(data->regmap, INA2XX_CALIBRATION,
&cal);
if (ret < 0)
return ret;
if (cal == 0) {
dev_warn(dev, "chip not calibrated, reinitializing\n");
ret = ina2xx_init(data);
if (ret < 0)
return ret;
/*
* Let's make sure the power and current
* registers have been updated before trying
* again.
*/
msleep(INA2XX_MAX_DELAY);
continue;
}
}
return 0;
}
/*
* If we're here then although all write operations succeeded, the
* chip still returns 0 in the calibration register. Nothing more we
* can do here.
*/
dev_err(dev, "unable to reinitialize the chip\n");
return -ENODEV;
}
static int ina2xx_get_value(struct ina2xx_data *data, u8 reg,
unsigned int regval)
{
int val;
switch (reg) {
case INA2XX_SHUNT_VOLTAGE:
/* signed register */
val = DIV_ROUND_CLOSEST((s16)regval, data->config->shunt_div);
break;
case INA2XX_BUS_VOLTAGE:
val = (regval >> data->config->bus_voltage_shift)
* data->config->bus_voltage_lsb;
val = DIV_ROUND_CLOSEST(val, 1000);
break;
case INA2XX_POWER:
val = regval * data->power_lsb_uW;
break;
case INA2XX_CURRENT:
/* signed register, result in mA */
val = (s16)regval * data->current_lsb_uA;
val = DIV_ROUND_CLOSEST(val, 1000);
break;
case INA2XX_CALIBRATION:
val = regval;
break;
default:
/* programmer goofed */
WARN_ON_ONCE(1);
val = 0;
break;
}
return val;
}
static ssize_t ina2xx_value_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ina2xx_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err = ina2xx_read_reg(dev, attr->index, ®val);
if (err < 0)
return err;
return sysfs_emit(buf, "%d\n", ina2xx_get_value(data, attr->index, regval));
}
static int ina226_reg_to_alert(struct ina2xx_data *data, u8 bit, u16 regval)
{
int reg;
switch (bit) {
case INA226_SHUNT_OVER_VOLTAGE_BIT:
case INA226_SHUNT_UNDER_VOLTAGE_BIT:
reg = INA2XX_SHUNT_VOLTAGE;
break;
case INA226_BUS_OVER_VOLTAGE_BIT:
case INA226_BUS_UNDER_VOLTAGE_BIT:
reg = INA2XX_BUS_VOLTAGE;
break;
case INA226_POWER_OVER_LIMIT_BIT:
reg = INA2XX_POWER;
break;
default:
/* programmer goofed */
WARN_ON_ONCE(1);
return 0;
}
return ina2xx_get_value(data, reg, regval);
}
/*
* Turns alert limit values into register values.
* Opposite of the formula in ina2xx_get_value().
*/
static s16 ina226_alert_to_reg(struct ina2xx_data *data, u8 bit, int val)
{
switch (bit) {
case INA226_SHUNT_OVER_VOLTAGE_BIT:
case INA226_SHUNT_UNDER_VOLTAGE_BIT:
val *= data->config->shunt_div;
return clamp_val(val, SHRT_MIN, SHRT_MAX);
case INA226_BUS_OVER_VOLTAGE_BIT:
case INA226_BUS_UNDER_VOLTAGE_BIT:
val = (val * 1000) << data->config->bus_voltage_shift;
val = DIV_ROUND_CLOSEST(val, data->config->bus_voltage_lsb);
return clamp_val(val, 0, SHRT_MAX);
case INA226_POWER_OVER_LIMIT_BIT:
val = DIV_ROUND_CLOSEST(val, data->power_lsb_uW);
return clamp_val(val, 0, USHRT_MAX);
default:
/* programmer goofed */
WARN_ON_ONCE(1);
return 0;
}
}
static ssize_t ina226_alert_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ina2xx_data *data = dev_get_drvdata(dev);
int regval;
int val = 0;
int ret;
mutex_lock(&data->config_lock);
ret = regmap_read(data->regmap, INA226_MASK_ENABLE, ®val);
if (ret)
goto abort;
if (regval & BIT(attr->index)) {
ret = regmap_read(data->regmap, INA226_ALERT_LIMIT, ®val);
if (ret)
goto abort;
val = ina226_reg_to_alert(data, attr->index, regval);
}
ret = sysfs_emit(buf, "%d\n", val);
abort:
mutex_unlock(&data->config_lock);
return ret;
}
static ssize_t ina226_alert_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ina2xx_data *data = dev_get_drvdata(dev);
unsigned long val;
int ret;
ret = kstrtoul(buf, 10, &val);
if (ret < 0)
return ret;
/*
* Clear all alerts first to avoid accidentally triggering ALERT pin
* due to register write sequence. Then, only enable the alert
* if the value is non-zero.
*/
mutex_lock(&data->config_lock);
ret = regmap_update_bits(data->regmap, INA226_MASK_ENABLE,
INA226_ALERT_CONFIG_MASK, 0);
if (ret < 0)
goto abort;
ret = regmap_write(data->regmap, INA226_ALERT_LIMIT,
ina226_alert_to_reg(data, attr->index, val));
if (ret < 0)
goto abort;
if (val != 0) {
ret = regmap_update_bits(data->regmap, INA226_MASK_ENABLE,
INA226_ALERT_CONFIG_MASK,
BIT(attr->index));
if (ret < 0)
goto abort;
}
ret = count;
abort:
mutex_unlock(&data->config_lock);
return ret;
}
static ssize_t ina226_alarm_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ina2xx_data *data = dev_get_drvdata(dev);
int regval;
int alarm = 0;
int ret;
ret = regmap_read(data->regmap, INA226_MASK_ENABLE, ®val);
if (ret)
return ret;
alarm = (regval & BIT(attr->index)) &&
(regval & INA226_ALERT_FUNCTION_FLAG);
return sysfs_emit(buf, "%d\n", alarm);
}
/*
* In order to keep calibration register value fixed, the product
* of current_lsb and shunt_resistor should also be fixed and equal
* to shunt_voltage_lsb = 1 / shunt_div multiplied by 10^9 in order
* to keep the scale.
*/
static int ina2xx_set_shunt(struct ina2xx_data *data, long val)
{
unsigned int dividend = DIV_ROUND_CLOSEST(1000000000,
data->config->shunt_div);
if (val <= 0 || val > dividend)
return -EINVAL;
mutex_lock(&data->config_lock);
data->rshunt = val;
data->current_lsb_uA = DIV_ROUND_CLOSEST(dividend, val);
data->power_lsb_uW = data->config->power_lsb_factor *
data->current_lsb_uA;
mutex_unlock(&data->config_lock);
return 0;
}
static ssize_t ina2xx_shunt_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct ina2xx_data *data = dev_get_drvdata(dev);
return sysfs_emit(buf, "%li\n", data->rshunt);
}
static ssize_t ina2xx_shunt_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
unsigned long val;
int status;
struct ina2xx_data *data = dev_get_drvdata(dev);
status = kstrtoul(buf, 10, &val);
if (status < 0)
return status;
status = ina2xx_set_shunt(data, val);
if (status < 0)
return status;
return count;
}
static ssize_t ina226_interval_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct ina2xx_data *data = dev_get_drvdata(dev);
unsigned long val;
int status;
status = kstrtoul(buf, 10, &val);
if (status < 0)
return status;
if (val > INT_MAX || val == 0)
return -EINVAL;
status = regmap_update_bits(data->regmap, INA2XX_CONFIG,
INA226_AVG_RD_MASK,
ina226_interval_to_reg(val));
if (status < 0)
return status;
return count;
}
static ssize_t ina226_interval_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct ina2xx_data *data = dev_get_drvdata(dev);
int status;
unsigned int regval;
status = regmap_read(data->regmap, INA2XX_CONFIG, ®val);
if (status)
return status;
return sysfs_emit(buf, "%d\n", ina226_reg_to_interval(regval));
}
/* shunt voltage */
static SENSOR_DEVICE_ATTR_RO(in0_input, ina2xx_value, INA2XX_SHUNT_VOLTAGE);
/* shunt voltage over/under voltage alert setting and alarm */
static SENSOR_DEVICE_ATTR_RW(in0_crit, ina226_alert,
INA226_SHUNT_OVER_VOLTAGE_BIT);
static SENSOR_DEVICE_ATTR_RW(in0_lcrit, ina226_alert,
INA226_SHUNT_UNDER_VOLTAGE_BIT);
static SENSOR_DEVICE_ATTR_RO(in0_crit_alarm, ina226_alarm,
INA226_SHUNT_OVER_VOLTAGE_BIT);
static SENSOR_DEVICE_ATTR_RO(in0_lcrit_alarm, ina226_alarm,
INA226_SHUNT_UNDER_VOLTAGE_BIT);
/* bus voltage */
static SENSOR_DEVICE_ATTR_RO(in1_input, ina2xx_value, INA2XX_BUS_VOLTAGE);
/* bus voltage over/under voltage alert setting and alarm */
static SENSOR_DEVICE_ATTR_RW(in1_crit, ina226_alert,
INA226_BUS_OVER_VOLTAGE_BIT);
static SENSOR_DEVICE_ATTR_RW(in1_lcrit, ina226_alert,
INA226_BUS_UNDER_VOLTAGE_BIT);
static SENSOR_DEVICE_ATTR_RO(in1_crit_alarm, ina226_alarm,
INA226_BUS_OVER_VOLTAGE_BIT);
static SENSOR_DEVICE_ATTR_RO(in1_lcrit_alarm, ina226_alarm,
INA226_BUS_UNDER_VOLTAGE_BIT);
/* calculated current */
static SENSOR_DEVICE_ATTR_RO(curr1_input, ina2xx_value, INA2XX_CURRENT);
/* calculated power */
static SENSOR_DEVICE_ATTR_RO(power1_input, ina2xx_value, INA2XX_POWER);
/* over-limit power alert setting and alarm */
static SENSOR_DEVICE_ATTR_RW(power1_crit, ina226_alert,
INA226_POWER_OVER_LIMIT_BIT);
static SENSOR_DEVICE_ATTR_RO(power1_crit_alarm, ina226_alarm,
INA226_POWER_OVER_LIMIT_BIT);
/* shunt resistance */
static SENSOR_DEVICE_ATTR_RW(shunt_resistor, ina2xx_shunt, INA2XX_CALIBRATION);
/* update interval (ina226 only) */
static SENSOR_DEVICE_ATTR_RW(update_interval, ina226_interval, 0);
/* pointers to created device attributes */
static struct attribute *ina2xx_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_power1_input.dev_attr.attr,
&sensor_dev_attr_shunt_resistor.dev_attr.attr,
NULL,
};
static const struct attribute_group ina2xx_group = {
.attrs = ina2xx_attrs,
};
static struct attribute *ina226_attrs[] = {
&sensor_dev_attr_in0_crit.dev_attr.attr,
&sensor_dev_attr_in0_lcrit.dev_attr.attr,
&sensor_dev_attr_in0_crit_alarm.dev_attr.attr,
&sensor_dev_attr_in0_lcrit_alarm.dev_attr.attr,
&sensor_dev_attr_in1_crit.dev_attr.attr,
&sensor_dev_attr_in1_lcrit.dev_attr.attr,
&sensor_dev_attr_in1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_in1_lcrit_alarm.dev_attr.attr,
&sensor_dev_attr_power1_crit.dev_attr.attr,
&sensor_dev_attr_power1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_update_interval.dev_attr.attr,
NULL,
};
static const struct attribute_group ina226_group = {
.attrs = ina226_attrs,
};
static const struct i2c_device_id ina2xx_id[];
static int ina2xx_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct ina2xx_data *data;
struct device *hwmon_dev;
u32 val;
int ret, group = 0;
enum ina2xx_ids chip;
if (client->dev.of_node)
chip = (uintptr_t)of_device_get_match_data(&client->dev);
else
chip = i2c_match_id(ina2xx_id, client)->driver_data;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
/* set the device type */
data->config = &ina2xx_config[chip];
mutex_init(&data->config_lock);
if (of_property_read_u32(dev->of_node, "shunt-resistor", &val) < 0) {
struct ina2xx_platform_data *pdata = dev_get_platdata(dev);
if (pdata)
val = pdata->shunt_uohms;
else
val = INA2XX_RSHUNT_DEFAULT;
}
ina2xx_set_shunt(data, val);
ina2xx_regmap_config.max_register = data->config->registers;
data->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
if (IS_ERR(data->regmap)) {
dev_err(dev, "failed to allocate register map\n");
return PTR_ERR(data->regmap);
}
ret = devm_regulator_get_enable(dev, "vs");
if (ret)
return dev_err_probe(dev, ret, "failed to enable vs regulator\n");
ret = ina2xx_init(data);
if (ret < 0) {
dev_err(dev, "error configuring the device: %d\n", ret);
return -ENODEV;
}
data->groups[group++] = &ina2xx_group;
if (chip == ina226)
data->groups[group++] = &ina226_group;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
dev_info(dev, "power monitor %s (Rshunt = %li uOhm)\n",
client->name, data->rshunt);
return 0;
}
static const struct i2c_device_id ina2xx_id[] = {
{ "ina219", ina219 },
{ "ina220", ina219 },
{ "ina226", ina226 },
{ "ina230", ina226 },
{ "ina231", ina226 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ina2xx_id);
static const struct of_device_id __maybe_unused ina2xx_of_match[] = {
{
.compatible = "ti,ina219",
.data = (void *)ina219
},
{
.compatible = "ti,ina220",
.data = (void *)ina219
},
{
.compatible = "ti,ina226",
.data = (void *)ina226
},
{
.compatible = "ti,ina230",
.data = (void *)ina226
},
{
.compatible = "ti,ina231",
.data = (void *)ina226
},
{ },
};
MODULE_DEVICE_TABLE(of, ina2xx_of_match);
static struct i2c_driver ina2xx_driver = {
.driver = {
.name = "ina2xx",
.of_match_table = of_match_ptr(ina2xx_of_match),
},
.probe = ina2xx_probe,
.id_table = ina2xx_id,
};
module_i2c_driver(ina2xx_driver);
MODULE_AUTHOR("Lothar Felten <[email protected]>");
MODULE_DESCRIPTION("ina2xx driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ina2xx.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2006 by Hans Edgington <[email protected]> *
* Copyright (C) 2007-2011 Hans de Goede <[email protected]> *
* *
***************************************************************************/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/io.h>
#include <linux/acpi.h>
#define DRVNAME "f71882fg"
#define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
#define SIO_REG_LDSEL 0x07 /* Logical device select */
#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
#define SIO_REG_DEVREV 0x22 /* Device revision */
#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
#define SIO_REG_ENABLE 0x30 /* Logical device enable */
#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
#define SIO_F71808E_ID 0x0901 /* Chipset ID */
#define SIO_F71808A_ID 0x1001 /* Chipset ID */
#define SIO_F71858_ID 0x0507 /* Chipset ID */
#define SIO_F71862_ID 0x0601 /* Chipset ID */
#define SIO_F71868_ID 0x1106 /* Chipset ID */
#define SIO_F71869_ID 0x0814 /* Chipset ID */
#define SIO_F71869A_ID 0x1007 /* Chipset ID */
#define SIO_F71882_ID 0x0541 /* Chipset ID */
#define SIO_F71889_ID 0x0723 /* Chipset ID */
#define SIO_F71889E_ID 0x0909 /* Chipset ID */
#define SIO_F71889A_ID 0x1005 /* Chipset ID */
#define SIO_F8000_ID 0x0581 /* Chipset ID */
#define SIO_F81768D_ID 0x1210 /* Chipset ID */
#define SIO_F81865_ID 0x0704 /* Chipset ID */
#define SIO_F81866_ID 0x1010 /* Chipset ID */
#define SIO_F71858AD_ID 0x0903 /* Chipset ID */
#define SIO_F81966_ID 0x1502 /* Chipset ID */
#define REGION_LENGTH 8
#define ADDR_REG_OFFSET 5
#define DATA_REG_OFFSET 6
#define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
#define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
#define F71882FG_REG_IN(nr) (0x20 + (nr))
#define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
#define F81866_REG_IN_STATUS 0x16 /* F81866 only */
#define F81866_REG_IN_BEEP 0x17 /* F81866 only */
#define F81866_REG_IN1_HIGH 0x3a /* F81866 only */
#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
#define F71882FG_REG_FAN_STATUS 0x92
#define F71882FG_REG_FAN_BEEP 0x93
#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
#define F71882FG_REG_TEMP_STATUS 0x62
#define F71882FG_REG_TEMP_BEEP 0x63
#define F71882FG_REG_TEMP_CONFIG 0x69
#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
#define F71882FG_REG_TEMP_TYPE 0x6B
#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
#define F71882FG_REG_PWM_TYPE 0x94
#define F71882FG_REG_PWM_ENABLE 0x96
#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
#define F71882FG_REG_FAN_FAULT_T 0x9F
#define F71882FG_FAN_NEG_TEMP_EN 0x20
#define F71882FG_FAN_PROG_SEL 0x80
#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
#define F71882FG_REG_START 0x01
#define F71882FG_MAX_INS 11
#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a,
f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f,
f81866a};
static const char *const f71882fg_names[] = {
"f71808e",
"f71808a",
"f71858fg",
"f71862fg",
"f71868a",
"f71869", /* Both f71869f and f71869e, reg. compatible and same id */
"f71869a",
"f71882fg",
"f71889fg", /* f81801u too, same id */
"f71889ed",
"f71889a",
"f8000",
"f81768d",
"f81865f",
"f81866a",
};
static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
[f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 },
[f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 },
[f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
[f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
[f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
[f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
[f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
[f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
[f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
[f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
[f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
[f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
[f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
[f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
[f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
};
static const char f71882fg_has_in1_alarm[] = {
[f71808e] = 0,
[f71808a] = 0,
[f71858fg] = 0,
[f71862fg] = 0,
[f71868a] = 0,
[f71869] = 0,
[f71869a] = 0,
[f71882fg] = 1,
[f71889fg] = 1,
[f71889ed] = 1,
[f71889a] = 1,
[f8000] = 0,
[f81768d] = 1,
[f81865f] = 1,
[f81866a] = 1,
};
static const char f71882fg_fan_has_beep[] = {
[f71808e] = 0,
[f71808a] = 0,
[f71858fg] = 0,
[f71862fg] = 1,
[f71868a] = 1,
[f71869] = 1,
[f71869a] = 1,
[f71882fg] = 1,
[f71889fg] = 1,
[f71889ed] = 1,
[f71889a] = 1,
[f8000] = 0,
[f81768d] = 1,
[f81865f] = 1,
[f81866a] = 1,
};
static const char f71882fg_nr_fans[] = {
[f71808e] = 3,
[f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
[f71858fg] = 3,
[f71862fg] = 3,
[f71868a] = 3,
[f71869] = 3,
[f71869a] = 3,
[f71882fg] = 4,
[f71889fg] = 3,
[f71889ed] = 3,
[f71889a] = 3,
[f8000] = 3, /* +1 fan which is monitor only */
[f81768d] = 3,
[f81865f] = 2,
[f81866a] = 3,
};
static const char f71882fg_temp_has_beep[] = {
[f71808e] = 0,
[f71808a] = 1,
[f71858fg] = 0,
[f71862fg] = 1,
[f71868a] = 1,
[f71869] = 1,
[f71869a] = 1,
[f71882fg] = 1,
[f71889fg] = 1,
[f71889ed] = 1,
[f71889a] = 1,
[f8000] = 0,
[f81768d] = 1,
[f81865f] = 1,
[f81866a] = 1,
};
static const char f71882fg_nr_temps[] = {
[f71808e] = 2,
[f71808a] = 2,
[f71858fg] = 3,
[f71862fg] = 3,
[f71868a] = 3,
[f71869] = 3,
[f71869a] = 3,
[f71882fg] = 3,
[f71889fg] = 3,
[f71889ed] = 3,
[f71889a] = 3,
[f8000] = 3,
[f81768d] = 3,
[f81865f] = 2,
[f81866a] = 3,
};
static struct platform_device *f71882fg_pdev;
struct f71882fg_sio_data {
enum chips type;
};
struct f71882fg_data {
unsigned short addr;
enum chips type;
struct device *hwmon_dev;
struct mutex update_lock;
int temp_start; /* temp numbering start (0 or 1) */
bool valid; /* true if following fields are valid */
char auto_point_temp_signed;
unsigned long last_updated; /* In jiffies */
unsigned long last_limits; /* In jiffies */
/* Register Values */
u8 in[F71882FG_MAX_INS];
u8 in1_max;
u8 in_status;
u8 in_beep;
u16 fan[4];
u16 fan_target[4];
u16 fan_full_speed[4];
u8 fan_status;
u8 fan_beep;
/*
* Note: all models have max 3 temperature channels, but on some
* they are addressed as 0-2 and on others as 1-3, so for coding
* convenience we reserve space for 4 channels
*/
u16 temp[4];
u8 temp_ovt[4];
u8 temp_high[4];
u8 temp_hyst[2]; /* 2 hysts stored per reg */
u8 temp_type[4];
u8 temp_status;
u8 temp_beep;
u8 temp_diode_open;
u8 temp_config;
u8 pwm[4];
u8 pwm_enable;
u8 pwm_auto_point_hyst[2];
u8 pwm_auto_point_mapping[4];
u8 pwm_auto_point_pwm[4][5];
s8 pwm_auto_point_temp[4][4];
};
static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
{
u8 val;
outb(reg, data->addr + ADDR_REG_OFFSET);
val = inb(data->addr + DATA_REG_OFFSET);
return val;
}
static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
{
u16 val;
val = f71882fg_read8(data, reg) << 8;
val |= f71882fg_read8(data, reg + 1);
return val;
}
static inline int fan_from_reg(u16 reg)
{
return reg ? (1500000 / reg) : 0;
}
static inline u16 fan_to_reg(int fan)
{
return fan ? (1500000 / fan) : 0;
}
static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
{
outb(reg, data->addr + ADDR_REG_OFFSET);
outb(val, data->addr + DATA_REG_OFFSET);
}
static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
{
f71882fg_write8(data, reg, val >> 8);
f71882fg_write8(data, reg + 1, val & 0xff);
}
static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
{
if (data->type == f71858fg)
return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
else
return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
}
static struct f71882fg_data *f71882fg_update_device(struct device *dev)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int nr_fans = f71882fg_nr_fans[data->type];
int nr_temps = f71882fg_nr_temps[data->type];
int nr, reg, point;
mutex_lock(&data->update_lock);
/* Update once every 60 seconds */
if (time_after(jiffies, data->last_limits + 60 * HZ) ||
!data->valid) {
if (f71882fg_has_in1_alarm[data->type]) {
if (data->type == f81866a) {
data->in1_max =
f71882fg_read8(data,
F81866_REG_IN1_HIGH);
data->in_beep =
f71882fg_read8(data,
F81866_REG_IN_BEEP);
} else {
data->in1_max =
f71882fg_read8(data,
F71882FG_REG_IN1_HIGH);
data->in_beep =
f71882fg_read8(data,
F71882FG_REG_IN_BEEP);
}
}
/* Get High & boundary temps*/
for (nr = data->temp_start; nr < nr_temps + data->temp_start;
nr++) {
data->temp_ovt[nr] = f71882fg_read8(data,
F71882FG_REG_TEMP_OVT(nr));
data->temp_high[nr] = f71882fg_read8(data,
F71882FG_REG_TEMP_HIGH(nr));
}
if (data->type != f8000) {
data->temp_hyst[0] = f71882fg_read8(data,
F71882FG_REG_TEMP_HYST(0));
data->temp_hyst[1] = f71882fg_read8(data,
F71882FG_REG_TEMP_HYST(1));
}
/* All but the f71858fg / f8000 have this register */
if ((data->type != f71858fg) && (data->type != f8000)) {
reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
data->temp_type[1] = (reg & 0x02) ? 2 : 4;
data->temp_type[2] = (reg & 0x04) ? 2 : 4;
data->temp_type[3] = (reg & 0x08) ? 2 : 4;
}
if (f71882fg_fan_has_beep[data->type])
data->fan_beep = f71882fg_read8(data,
F71882FG_REG_FAN_BEEP);
if (f71882fg_temp_has_beep[data->type])
data->temp_beep = f71882fg_read8(data,
F71882FG_REG_TEMP_BEEP);
data->pwm_enable = f71882fg_read8(data,
F71882FG_REG_PWM_ENABLE);
data->pwm_auto_point_hyst[0] =
f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
data->pwm_auto_point_hyst[1] =
f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
for (nr = 0; nr < nr_fans; nr++) {
data->pwm_auto_point_mapping[nr] =
f71882fg_read8(data,
F71882FG_REG_POINT_MAPPING(nr));
switch (data->type) {
default:
for (point = 0; point < 5; point++) {
data->pwm_auto_point_pwm[nr][point] =
f71882fg_read8(data,
F71882FG_REG_POINT_PWM
(nr, point));
}
for (point = 0; point < 4; point++) {
data->pwm_auto_point_temp[nr][point] =
f71882fg_read8(data,
F71882FG_REG_POINT_TEMP
(nr, point));
}
break;
case f71808e:
case f71869:
data->pwm_auto_point_pwm[nr][0] =
f71882fg_read8(data,
F71882FG_REG_POINT_PWM(nr, 0));
fallthrough;
case f71862fg:
data->pwm_auto_point_pwm[nr][1] =
f71882fg_read8(data,
F71882FG_REG_POINT_PWM
(nr, 1));
data->pwm_auto_point_pwm[nr][4] =
f71882fg_read8(data,
F71882FG_REG_POINT_PWM
(nr, 4));
data->pwm_auto_point_temp[nr][0] =
f71882fg_read8(data,
F71882FG_REG_POINT_TEMP
(nr, 0));
data->pwm_auto_point_temp[nr][3] =
f71882fg_read8(data,
F71882FG_REG_POINT_TEMP
(nr, 3));
break;
}
}
data->last_limits = jiffies;
}
/* Update every second */
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
data->temp_status = f71882fg_read8(data,
F71882FG_REG_TEMP_STATUS);
data->temp_diode_open = f71882fg_read8(data,
F71882FG_REG_TEMP_DIODE_OPEN);
for (nr = data->temp_start; nr < nr_temps + data->temp_start;
nr++)
data->temp[nr] = f71882fg_read_temp(data, nr);
data->fan_status = f71882fg_read8(data,
F71882FG_REG_FAN_STATUS);
for (nr = 0; nr < nr_fans; nr++) {
data->fan[nr] = f71882fg_read16(data,
F71882FG_REG_FAN(nr));
data->fan_target[nr] =
f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
data->fan_full_speed[nr] =
f71882fg_read16(data,
F71882FG_REG_FAN_FULL_SPEED(nr));
data->pwm[nr] =
f71882fg_read8(data, F71882FG_REG_PWM(nr));
}
/* Some models have 1 more fan with limited capabilities */
if (data->type == f71808a) {
data->fan[2] = f71882fg_read16(data,
F71882FG_REG_FAN(2));
data->pwm[2] = f71882fg_read8(data,
F71882FG_REG_PWM(2));
}
if (data->type == f8000)
data->fan[3] = f71882fg_read16(data,
F71882FG_REG_FAN(3));
if (f71882fg_has_in1_alarm[data->type]) {
if (data->type == f81866a)
data->in_status = f71882fg_read8(data,
F81866_REG_IN_STATUS);
else
data->in_status = f71882fg_read8(data,
F71882FG_REG_IN_STATUS);
}
for (nr = 0; nr < F71882FG_MAX_INS; nr++)
if (f71882fg_has_in[data->type][nr])
data->in[nr] = f71882fg_read8(data,
F71882FG_REG_IN(nr));
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", f71882fg_names[data->type]);
}
static DEVICE_ATTR_RO(name);
static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
int sign, temp;
if (data->type == f71858fg) {
/* TEMP_TABLE_SEL 1 or 3 ? */
if (data->temp_config & 1) {
sign = data->temp[nr] & 0x0001;
temp = (data->temp[nr] >> 5) & 0x7ff;
} else {
sign = data->temp[nr] & 0x8000;
temp = (data->temp[nr] >> 5) & 0x3ff;
}
temp *= 125;
if (sign)
temp -= 128000;
} else {
temp = ((s8)data->temp[nr]) * 1000;
}
return sprintf(buf, "%d\n", temp);
}
static ssize_t show_temp_max(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
}
static ssize_t store_temp_max(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val /= 1000;
val = clamp_val(val, 0, 255);
mutex_lock(&data->update_lock);
f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
data->temp_high[nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
int temp_max_hyst;
mutex_lock(&data->update_lock);
if (nr & 1)
temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
else
temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", temp_max_hyst);
}
static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
ssize_t ret = count;
u8 reg;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val /= 1000;
mutex_lock(&data->update_lock);
/* convert abs to relative and check */
data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
val = data->temp_high[nr] - val;
/* convert value to register contents */
reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
if (nr & 1)
reg = (reg & 0x0f) | (val << 4);
else
reg = (reg & 0xf0) | val;
f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
data->temp_hyst[nr / 2] = reg;
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
if (data->temp_status & (1 << nr))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t show_temp_crit(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
}
static ssize_t store_temp_crit(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val /= 1000;
val = clamp_val(val, 0, 255);
mutex_lock(&data->update_lock);
f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
data->temp_ovt[nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
int temp_crit_hyst;
mutex_lock(&data->update_lock);
if (nr & 1)
temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
else
temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", temp_crit_hyst);
}
static ssize_t show_temp_fault(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
if (data->temp_diode_open & (1 << nr))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
/*
* Temp attr for the f71858fg, the f71858fg is special as it has its
* temperature indexes start at 0 (the others start at 1)
*/
static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 0),
SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
store_temp_max_hyst, 0, 0),
SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 0),
SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
0, 0),
SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 1),
SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
store_temp_max_hyst, 0, 1),
SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 1),
SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
0, 1),
SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 2),
SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
store_temp_max_hyst, 0, 2),
SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 2),
SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
0, 2),
SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
};
static ssize_t show_temp_type(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
return sprintf(buf, "%d\n", data->temp_type[nr]);
}
/* Temp attr for the standard models */
static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 1),
SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
store_temp_max_hyst, 0, 1),
/*
* Should really be temp1_max_alarm, but older versions did not handle
* the max and crit alarms separately and lm_sensors v2 depends on the
* presence of temp#_alarm files. The same goes for temp2/3 _alarm.
*/
SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 1),
SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
0, 1),
SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
}, {
SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 2),
SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
store_temp_max_hyst, 0, 2),
/* Should be temp2_max_alarm, see temp1_alarm note */
SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 2),
SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
0, 2),
SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
}, {
SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 3),
SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
store_temp_max_hyst, 0, 3),
/* Should be temp3_max_alarm, see temp1_alarm note */
SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 3),
SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
0, 3),
SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
} };
static ssize_t show_temp_beep(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
if (data->temp_beep & (1 << nr))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t store_temp_beep(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
unsigned long val;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
if (val)
data->temp_beep |= 1 << nr;
else
data->temp_beep &= ~(1 << nr);
f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
mutex_unlock(&data->update_lock);
return count;
}
/* Temp attr for models which can beep on temp alarm */
static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 1),
SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 5),
}, {
SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 2),
SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 6),
}, {
SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 3),
SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 7),
} };
static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { {
SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 0),
SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 4),
}, {
SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 1),
SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 5),
}, {
SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 2),
SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
store_temp_beep, 0, 6),
} };
/*
* Temp attr for the f8000
* Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
* is used as hysteresis value to clear alarms
* Also like the f71858fg its temperature indexes start at 0
*/
static struct sensor_device_attribute_2 f8000_temp_attr[] = {
SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 0),
SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 0),
SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 1),
SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 1),
SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
store_temp_crit, 0, 2),
SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
store_temp_max, 0, 2),
SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
};
static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
return sprintf(buf, "%d\n", data->in[nr] * 8);
}
/* in attr for all models */
static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9),
SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10),
};
static ssize_t show_in_max(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
return sprintf(buf, "%d\n", data->in1_max * 8);
}
static ssize_t store_in_max(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val /= 8;
val = clamp_val(val, 0, 255);
mutex_lock(&data->update_lock);
if (data->type == f81866a)
f71882fg_write8(data, F81866_REG_IN1_HIGH, val);
else
f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
data->in1_max = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_in_beep(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
if (data->in_beep & (1 << nr))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t store_in_beep(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
unsigned long val;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (data->type == f81866a)
data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP);
else
data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
if (val)
data->in_beep |= 1 << nr;
else
data->in_beep &= ~(1 << nr);
if (data->type == f81866a)
f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep);
else
f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_in_alarm(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
if (data->in_status & (1 << nr))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
/* For models with in1 alarm capability */
static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
0, 1),
SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
0, 1),
SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
};
static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
int speed = fan_from_reg(data->fan[nr]);
if (speed == FAN_MIN_DETECT)
speed = 0;
return sprintf(buf, "%d\n", speed);
}
static ssize_t show_fan_full_speed(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
int speed = fan_from_reg(data->fan_full_speed[nr]);
return sprintf(buf, "%d\n", speed);
}
static ssize_t store_fan_full_speed(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, 23, 1500000);
val = fan_to_reg(val);
mutex_lock(&data->update_lock);
f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
data->fan_full_speed[nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
if (data->fan_status & (1 << nr))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t show_pwm(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int val, nr = to_sensor_dev_attr_2(devattr)->index;
mutex_lock(&data->update_lock);
if (data->pwm_enable & (1 << (2 * nr)))
/* PWM mode */
val = data->pwm[nr];
else {
/* RPM mode */
if (fan_from_reg(data->fan_full_speed[nr]))
val = 255 * fan_from_reg(data->fan_target[nr])
/ fan_from_reg(data->fan_full_speed[nr]);
else
val = 0;
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", val);
}
static ssize_t store_pwm(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, 0, 255);
mutex_lock(&data->update_lock);
data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
(data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
count = -EROFS;
goto leave;
}
if (data->pwm_enable & (1 << (2 * nr))) {
/* PWM mode */
f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
data->pwm[nr] = val;
} else {
/* RPM mode */
int target, full_speed;
full_speed = f71882fg_read16(data,
F71882FG_REG_FAN_FULL_SPEED(nr));
target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
data->fan_target[nr] = target;
data->fan_full_speed[nr] = full_speed;
}
leave:
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm_enable(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int result = 0;
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
switch ((data->pwm_enable >> 2 * nr) & 3) {
case 0:
case 1:
result = 2; /* Normal auto mode */
break;
case 2:
result = 1; /* Manual mode */
break;
case 3:
if (data->type == f8000)
result = 3; /* Thermostat mode */
else
result = 1; /* Manual mode */
break;
}
return sprintf(buf, "%d\n", result);
}
static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
/* Special case for F8000 pwm channel 3 which only does auto mode */
if (data->type == f8000 && nr == 2 && val != 2)
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
/* Special case for F8000 auto PWM mode / Thermostat mode */
if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
switch (val) {
case 2:
data->pwm_enable &= ~(2 << (2 * nr));
break; /* Normal auto mode */
case 3:
data->pwm_enable |= 2 << (2 * nr);
break; /* Thermostat mode */
default:
count = -EINVAL;
goto leave;
}
} else {
switch (val) {
case 1:
/* The f71858fg does not support manual RPM mode */
if (data->type == f71858fg &&
((data->pwm_enable >> (2 * nr)) & 1)) {
count = -EINVAL;
goto leave;
}
data->pwm_enable |= 2 << (2 * nr);
break; /* Manual */
case 2:
data->pwm_enable &= ~(2 << (2 * nr));
break; /* Normal auto mode */
default:
count = -EINVAL;
goto leave;
}
}
f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
leave:
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm_interpolate(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int result;
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
return sprintf(buf, "%d\n", result);
}
static ssize_t store_pwm_interpolate(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
unsigned long val;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm_auto_point_mapping[nr] =
f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
if (val)
val = data->pwm_auto_point_mapping[nr] | (1 << 4);
else
val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
data->pwm_auto_point_mapping[nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
/* Fan / PWM attr common to all models */
static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
show_fan_full_speed,
store_fan_full_speed, 0, 0),
SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
store_pwm_enable, 0, 0),
SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
show_pwm_interpolate, store_pwm_interpolate, 0, 0),
}, {
SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
show_fan_full_speed,
store_fan_full_speed, 0, 1),
SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
store_pwm_enable, 0, 1),
SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
show_pwm_interpolate, store_pwm_interpolate, 0, 1),
}, {
SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
show_fan_full_speed,
store_fan_full_speed, 0, 2),
SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
store_pwm_enable, 0, 2),
SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
show_pwm_interpolate, store_pwm_interpolate, 0, 2),
}, {
SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
show_fan_full_speed,
store_fan_full_speed, 0, 3),
SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
store_pwm_enable, 0, 3),
SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
show_pwm_interpolate, store_pwm_interpolate, 0, 3),
} };
static ssize_t show_simple_pwm(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int val, nr = to_sensor_dev_attr_2(devattr)->index;
val = data->pwm[nr];
return sprintf(buf, "%d\n", val);
}
static ssize_t store_simple_pwm(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, 0, 255);
mutex_lock(&data->update_lock);
f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
data->pwm[nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
/* Attr for the third fan of the f71808a, which only has manual pwm */
static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
show_simple_pwm, store_simple_pwm, 0, 2),
};
static ssize_t show_fan_beep(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
if (data->fan_beep & (1 << nr))
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t store_fan_beep(struct device *dev, struct device_attribute
*devattr, const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
unsigned long val;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
if (val)
data->fan_beep |= 1 << nr;
else
data->fan_beep &= ~(1 << nr);
f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
mutex_unlock(&data->update_lock);
return count;
}
/* Attr for models which can beep on Fan alarm */
static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
store_fan_beep, 0, 0),
SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
store_fan_beep, 0, 1),
SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
store_fan_beep, 0, 2),
SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
store_fan_beep, 0, 3),
};
static ssize_t show_pwm_auto_point_channel(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
int result;
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
data->temp_start);
return sprintf(buf, "%d\n", result);
}
static ssize_t store_pwm_auto_point_channel(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
switch (val) {
case 1:
val = 0;
break;
case 2:
val = 1;
break;
case 4:
val = 2;
break;
default:
return -EINVAL;
}
val += data->temp_start;
mutex_lock(&data->update_lock);
data->pwm_auto_point_mapping[nr] =
f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
data->pwm_auto_point_mapping[nr] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm_auto_point_pwm(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
int result;
struct f71882fg_data *data = f71882fg_update_device(dev);
int pwm = to_sensor_dev_attr_2(devattr)->index;
int point = to_sensor_dev_attr_2(devattr)->nr;
mutex_lock(&data->update_lock);
if (data->pwm_enable & (1 << (2 * pwm))) {
/* PWM mode */
result = data->pwm_auto_point_pwm[pwm][point];
} else {
/* RPM mode */
result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", result);
}
static ssize_t store_pwm_auto_point_pwm(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, pwm = to_sensor_dev_attr_2(devattr)->index;
int point = to_sensor_dev_attr_2(devattr)->nr;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, 0, 255);
mutex_lock(&data->update_lock);
data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
if (data->pwm_enable & (1 << (2 * pwm))) {
/* PWM mode */
} else {
/* RPM mode */
if (val < 29) /* Prevent negative numbers */
val = 255;
else
val = (255 - val) * 32 / val;
}
f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
data->pwm_auto_point_pwm[pwm][point] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm_auto_point_temp(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
int result;
struct f71882fg_data *data = f71882fg_update_device(dev);
int pwm = to_sensor_dev_attr_2(devattr)->index;
int point = to_sensor_dev_attr_2(devattr)->nr;
result = data->pwm_auto_point_temp[pwm][point];
return sprintf(buf, "%d\n", 1000 * result);
}
static ssize_t store_pwm_auto_point_temp(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, pwm = to_sensor_dev_attr_2(devattr)->index;
int point = to_sensor_dev_attr_2(devattr)->nr;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val /= 1000;
if (data->auto_point_temp_signed)
val = clamp_val(val, -128, 127);
else
val = clamp_val(val, 0, 127);
mutex_lock(&data->update_lock);
f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
data->pwm_auto_point_temp[pwm][point] = val;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
int result = 0;
struct f71882fg_data *data = f71882fg_update_device(dev);
int nr = to_sensor_dev_attr_2(devattr)->index;
int point = to_sensor_dev_attr_2(devattr)->nr;
mutex_lock(&data->update_lock);
if (nr & 1)
result = data->pwm_auto_point_hyst[nr / 2] >> 4;
else
result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", result);
}
static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct f71882fg_data *data = dev_get_drvdata(dev);
int err, nr = to_sensor_dev_attr_2(devattr)->index;
int point = to_sensor_dev_attr_2(devattr)->nr;
u8 reg;
long val;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val /= 1000;
mutex_lock(&data->update_lock);
data->pwm_auto_point_temp[nr][point] =
f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
data->pwm_auto_point_temp[nr][point]);
val = data->pwm_auto_point_temp[nr][point] - val;
reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
if (nr & 1)
reg = (reg & 0x0f) | (val << 4);
else
reg = (reg & 0xf0) | val;
f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
data->pwm_auto_point_hyst[nr / 2] = reg;
mutex_unlock(&data->update_lock);
return count;
}
/*
* PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
* standard models
*/
static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 0),
SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 0),
SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 0),
SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 0),
SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 0),
}, {
SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 1),
SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 1),
SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 1),
SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 1),
SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 1),
}, {
SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 2),
SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 2),
SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 2),
SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 2),
SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 2),
} };
/*
* PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
* pwm setting when the temperature is above the pwmX_auto_point1_temp can be
* programmed instead of being hardcoded to 0xff
*/
static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 0),
SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 0),
SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 0),
SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 0),
SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 0),
}, {
SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 1),
SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 1),
SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 1),
SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 1),
SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 1),
}, {
SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 2),
SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 2),
SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 2),
SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 2),
SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 2),
} };
/* PWM attr for the standard models */
static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 0),
SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 0),
SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2, 0),
SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
3, 0),
SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 0),
SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1, 0),
SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2, 0),
SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 0),
SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 0),
SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 1, 0),
SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 2, 0),
SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 0),
}, {
SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 1),
SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 1),
SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2, 1),
SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
3, 1),
SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 1),
SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1, 1),
SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2, 1),
SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 1),
SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 1),
SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 1, 1),
SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 2, 1),
SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 1),
}, {
SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 2),
SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 2),
SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2, 2),
SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
3, 2),
SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 2),
SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1, 2),
SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2, 2),
SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 2),
SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 2),
SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 1, 2),
SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 2, 2),
SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 2),
}, {
SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 3),
SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 3),
SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 3),
SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2, 3),
SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
3, 3),
SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 3),
SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 3),
SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1, 3),
SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2, 3),
SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 3),
SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 3),
SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 1, 3),
SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 2, 3),
SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 3),
} };
/* Fan attr specific to the f8000 (4th fan input can only measure speed) */
static struct sensor_device_attribute_2 f8000_fan_attr[] = {
SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
};
/*
* PWM attr for the f8000, zones mapped to temp instead of to pwm!
* Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
* F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
*/
static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 0),
SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 2),
SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 2),
SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2, 2),
SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
3, 2),
SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 2),
SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 2),
SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1, 2),
SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2, 2),
SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 2),
SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 2),
SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 1, 2),
SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 2, 2),
SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 2),
}, {
SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 1),
SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 0),
SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 0),
SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2, 0),
SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
3, 0),
SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 0),
SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 0),
SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1, 0),
SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2, 0),
SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 0),
SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 0),
SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 1, 0),
SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 2, 0),
SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 0),
}, {
SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_channel,
store_pwm_auto_point_channel, 0, 2),
SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
0, 1),
SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1, 1),
SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2, 1),
SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
3, 1),
SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
4, 1),
SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
0, 1),
SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1, 1),
SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2, 1),
SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp, store_pwm_auto_point_temp,
3, 1),
SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
show_pwm_auto_point_temp_hyst,
store_pwm_auto_point_temp_hyst,
0, 1),
SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 1, 1),
SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 2, 1),
SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
show_pwm_auto_point_temp_hyst, NULL, 3, 1),
} };
/* Super I/O functions */
static inline int superio_inb(int base, int reg)
{
outb(reg, base);
return inb(base + 1);
}
static int superio_inw(int base, int reg)
{
int val;
val = superio_inb(base, reg) << 8;
val |= superio_inb(base, reg + 1);
return val;
}
static inline int superio_enter(int base)
{
/* Don't step on other drivers' I/O space by accident */
if (!request_muxed_region(base, 2, DRVNAME)) {
pr_err("I/O address 0x%04x already in use\n", base);
return -EBUSY;
}
/* according to the datasheet the key must be send twice! */
outb(SIO_UNLOCK_KEY, base);
outb(SIO_UNLOCK_KEY, base);
return 0;
}
static inline void superio_select(int base, int ld)
{
outb(SIO_REG_LDSEL, base);
outb(ld, base + 1);
}
static inline void superio_exit(int base)
{
outb(SIO_LOCK_KEY, base);
release_region(base, 2);
}
static int f71882fg_create_sysfs_files(struct platform_device *pdev,
struct sensor_device_attribute_2 *attr, int count)
{
int err, i;
for (i = 0; i < count; i++) {
err = device_create_file(&pdev->dev, &attr[i].dev_attr);
if (err)
return err;
}
return 0;
}
static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
struct sensor_device_attribute_2 *attr, int count)
{
int i;
for (i = 0; i < count; i++)
device_remove_file(&pdev->dev, &attr[i].dev_attr);
}
static int f71882fg_create_fan_sysfs_files(
struct platform_device *pdev, int idx)
{
struct f71882fg_data *data = platform_get_drvdata(pdev);
int err;
/* Sanity check the pwm setting */
err = 0;
switch (data->type) {
case f71858fg:
if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
err = 1;
break;
case f71862fg:
if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
err = 1;
break;
case f8000:
if (idx == 2)
err = data->pwm_enable & 0x20;
break;
default:
break;
}
if (err) {
dev_err(&pdev->dev,
"Invalid (reserved) pwm settings: 0x%02x, "
"skipping fan %d\n",
(data->pwm_enable >> (idx * 2)) & 3, idx + 1);
return 0; /* This is a non fatal condition */
}
err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
ARRAY_SIZE(fxxxx_fan_attr[0]));
if (err)
return err;
if (f71882fg_fan_has_beep[data->type]) {
err = f71882fg_create_sysfs_files(pdev,
&fxxxx_fan_beep_attr[idx],
1);
if (err)
return err;
}
dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
(data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
/* Check for unsupported auto pwm settings */
switch (data->type) {
case f71808e:
case f71808a:
case f71869:
case f71869a:
case f71889fg:
case f71889ed:
case f71889a:
data->pwm_auto_point_mapping[idx] =
f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
(data->pwm_auto_point_mapping[idx] & 3) == 0) {
dev_warn(&pdev->dev,
"Auto pwm controlled by raw digital "
"data, disabling pwm auto_point "
"sysfs attributes for fan %d\n", idx + 1);
return 0; /* This is a non fatal condition */
}
break;
default:
break;
}
switch (data->type) {
case f71862fg:
err = f71882fg_create_sysfs_files(pdev,
&f71862fg_auto_pwm_attr[idx][0],
ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
break;
case f71808e:
case f71869:
err = f71882fg_create_sysfs_files(pdev,
&f71869_auto_pwm_attr[idx][0],
ARRAY_SIZE(f71869_auto_pwm_attr[0]));
break;
case f8000:
err = f71882fg_create_sysfs_files(pdev,
&f8000_auto_pwm_attr[idx][0],
ARRAY_SIZE(f8000_auto_pwm_attr[0]));
break;
default:
err = f71882fg_create_sysfs_files(pdev,
&fxxxx_auto_pwm_attr[idx][0],
ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
}
return err;
}
static int f71882fg_remove(struct platform_device *pdev)
{
struct f71882fg_data *data = platform_get_drvdata(pdev);
int nr_fans = f71882fg_nr_fans[data->type];
int nr_temps = f71882fg_nr_temps[data->type];
int i;
u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
if (data->hwmon_dev)
hwmon_device_unregister(data->hwmon_dev);
device_remove_file(&pdev->dev, &dev_attr_name);
if (start_reg & 0x01) {
switch (data->type) {
case f71858fg:
if (data->temp_config & 0x10)
f71882fg_remove_sysfs_files(pdev,
f8000_temp_attr,
ARRAY_SIZE(f8000_temp_attr));
else
f71882fg_remove_sysfs_files(pdev,
f71858fg_temp_attr,
ARRAY_SIZE(f71858fg_temp_attr));
break;
case f8000:
f71882fg_remove_sysfs_files(pdev,
f8000_temp_attr,
ARRAY_SIZE(f8000_temp_attr));
break;
case f81866a:
f71882fg_remove_sysfs_files(pdev,
f71858fg_temp_attr,
ARRAY_SIZE(f71858fg_temp_attr));
break;
default:
f71882fg_remove_sysfs_files(pdev,
&fxxxx_temp_attr[0][0],
ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
}
if (f71882fg_temp_has_beep[data->type]) {
if (data->type == f81866a)
f71882fg_remove_sysfs_files(pdev,
&f81866_temp_beep_attr[0][0],
ARRAY_SIZE(f81866_temp_beep_attr[0])
* nr_temps);
else
f71882fg_remove_sysfs_files(pdev,
&fxxxx_temp_beep_attr[0][0],
ARRAY_SIZE(fxxxx_temp_beep_attr[0])
* nr_temps);
}
for (i = 0; i < F71882FG_MAX_INS; i++) {
if (f71882fg_has_in[data->type][i]) {
device_remove_file(&pdev->dev,
&fxxxx_in_attr[i].dev_attr);
}
}
if (f71882fg_has_in1_alarm[data->type]) {
f71882fg_remove_sysfs_files(pdev,
fxxxx_in1_alarm_attr,
ARRAY_SIZE(fxxxx_in1_alarm_attr));
}
}
if (start_reg & 0x02) {
f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
if (f71882fg_fan_has_beep[data->type]) {
f71882fg_remove_sysfs_files(pdev,
fxxxx_fan_beep_attr, nr_fans);
}
switch (data->type) {
case f71808a:
f71882fg_remove_sysfs_files(pdev,
&fxxxx_auto_pwm_attr[0][0],
ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
f71882fg_remove_sysfs_files(pdev,
f71808a_fan3_attr,
ARRAY_SIZE(f71808a_fan3_attr));
break;
case f71862fg:
f71882fg_remove_sysfs_files(pdev,
&f71862fg_auto_pwm_attr[0][0],
ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
nr_fans);
break;
case f71808e:
case f71869:
f71882fg_remove_sysfs_files(pdev,
&f71869_auto_pwm_attr[0][0],
ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
break;
case f8000:
f71882fg_remove_sysfs_files(pdev,
f8000_fan_attr,
ARRAY_SIZE(f8000_fan_attr));
f71882fg_remove_sysfs_files(pdev,
&f8000_auto_pwm_attr[0][0],
ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
break;
default:
f71882fg_remove_sysfs_files(pdev,
&fxxxx_auto_pwm_attr[0][0],
ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
}
}
return 0;
}
static int f71882fg_probe(struct platform_device *pdev)
{
struct f71882fg_data *data;
struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
int nr_fans = f71882fg_nr_fans[sio_data->type];
int nr_temps = f71882fg_nr_temps[sio_data->type];
int err, i;
int size;
u8 start_reg, reg;
data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
data->type = sio_data->type;
data->temp_start =
(data->type == f71858fg || data->type == f8000 ||
data->type == f81866a) ? 0 : 1;
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
start_reg = f71882fg_read8(data, F71882FG_REG_START);
if (start_reg & 0x04) {
dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
return -ENODEV;
}
if (!(start_reg & 0x03)) {
dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
return -ENODEV;
}
/* Register sysfs interface files */
err = device_create_file(&pdev->dev, &dev_attr_name);
if (err)
goto exit_unregister_sysfs;
if (start_reg & 0x01) {
switch (data->type) {
case f71858fg:
data->temp_config =
f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
if (data->temp_config & 0x10)
/*
* The f71858fg temperature alarms behave as
* the f8000 alarms in this mode
*/
err = f71882fg_create_sysfs_files(pdev,
f8000_temp_attr,
ARRAY_SIZE(f8000_temp_attr));
else
err = f71882fg_create_sysfs_files(pdev,
f71858fg_temp_attr,
ARRAY_SIZE(f71858fg_temp_attr));
break;
case f8000:
err = f71882fg_create_sysfs_files(pdev,
f8000_temp_attr,
ARRAY_SIZE(f8000_temp_attr));
break;
case f81866a:
err = f71882fg_create_sysfs_files(pdev,
f71858fg_temp_attr,
ARRAY_SIZE(f71858fg_temp_attr));
break;
default:
err = f71882fg_create_sysfs_files(pdev,
&fxxxx_temp_attr[0][0],
ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
}
if (err)
goto exit_unregister_sysfs;
if (f71882fg_temp_has_beep[data->type]) {
if (data->type == f81866a) {
size = ARRAY_SIZE(f81866_temp_beep_attr[0]);
err = f71882fg_create_sysfs_files(pdev,
&f81866_temp_beep_attr[0][0],
size * nr_temps);
} else {
size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]);
err = f71882fg_create_sysfs_files(pdev,
&fxxxx_temp_beep_attr[0][0],
size * nr_temps);
}
if (err)
goto exit_unregister_sysfs;
}
for (i = 0; i < F71882FG_MAX_INS; i++) {
if (f71882fg_has_in[data->type][i]) {
err = device_create_file(&pdev->dev,
&fxxxx_in_attr[i].dev_attr);
if (err)
goto exit_unregister_sysfs;
}
}
if (f71882fg_has_in1_alarm[data->type]) {
err = f71882fg_create_sysfs_files(pdev,
fxxxx_in1_alarm_attr,
ARRAY_SIZE(fxxxx_in1_alarm_attr));
if (err)
goto exit_unregister_sysfs;
}
}
if (start_reg & 0x02) {
switch (data->type) {
case f71808e:
case f71808a:
case f71869:
case f71869a:
/* These always have signed auto point temps */
data->auto_point_temp_signed = 1;
fallthrough; /* to select correct fan/pwm reg bank! */
case f71889fg:
case f71889ed:
case f71889a:
reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
if (reg & F71882FG_FAN_NEG_TEMP_EN)
data->auto_point_temp_signed = 1;
/* Ensure banked pwm registers point to right bank */
reg &= ~F71882FG_FAN_PROG_SEL;
f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
break;
default:
break;
}
data->pwm_enable =
f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
for (i = 0; i < nr_fans; i++) {
err = f71882fg_create_fan_sysfs_files(pdev, i);
if (err)
goto exit_unregister_sysfs;
}
/* Some types have 1 extra fan with limited functionality */
switch (data->type) {
case f71808a:
err = f71882fg_create_sysfs_files(pdev,
f71808a_fan3_attr,
ARRAY_SIZE(f71808a_fan3_attr));
break;
case f8000:
err = f71882fg_create_sysfs_files(pdev,
f8000_fan_attr,
ARRAY_SIZE(f8000_fan_attr));
break;
default:
break;
}
if (err)
goto exit_unregister_sysfs;
}
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
data->hwmon_dev = NULL;
goto exit_unregister_sysfs;
}
return 0;
exit_unregister_sysfs:
f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
return err; /* f71882fg_remove() also frees our data */
}
static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
{
u16 devid;
unsigned short address;
int err = superio_enter(sioaddr);
if (err)
return err;
devid = superio_inw(sioaddr, SIO_REG_MANID);
if (devid != SIO_FINTEK_ID) {
pr_debug("Not a Fintek device\n");
err = -ENODEV;
goto exit;
}
devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
switch (devid) {
case SIO_F71808E_ID:
sio_data->type = f71808e;
break;
case SIO_F71808A_ID:
sio_data->type = f71808a;
break;
case SIO_F71858_ID:
case SIO_F71858AD_ID:
sio_data->type = f71858fg;
break;
case SIO_F71862_ID:
sio_data->type = f71862fg;
break;
case SIO_F71868_ID:
sio_data->type = f71868a;
break;
case SIO_F71869_ID:
sio_data->type = f71869;
break;
case SIO_F71869A_ID:
sio_data->type = f71869a;
break;
case SIO_F71882_ID:
sio_data->type = f71882fg;
break;
case SIO_F71889_ID:
sio_data->type = f71889fg;
break;
case SIO_F71889E_ID:
sio_data->type = f71889ed;
break;
case SIO_F71889A_ID:
sio_data->type = f71889a;
break;
case SIO_F8000_ID:
sio_data->type = f8000;
break;
case SIO_F81768D_ID:
sio_data->type = f81768d;
break;
case SIO_F81865_ID:
sio_data->type = f81865f;
break;
case SIO_F81866_ID:
case SIO_F81966_ID:
sio_data->type = f81866a;
break;
default:
pr_info("Unsupported Fintek device: %04x\n",
(unsigned int)devid);
err = -ENODEV;
goto exit;
}
if (sio_data->type == f71858fg)
superio_select(sioaddr, SIO_F71858FG_LD_HWM);
else
superio_select(sioaddr, SIO_F71882FG_LD_HWM);
if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
pr_warn("Device not activated\n");
err = -ENODEV;
goto exit;
}
address = superio_inw(sioaddr, SIO_REG_ADDR);
if (address == 0) {
pr_warn("Base address not set\n");
err = -ENODEV;
goto exit;
}
address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
err = address;
pr_info("Found %s chip at %#x, revision %d\n",
f71882fg_names[sio_data->type], (unsigned int)address,
(int)superio_inb(sioaddr, SIO_REG_DEVREV));
exit:
superio_exit(sioaddr);
return err;
}
static int __init f71882fg_device_add(int address,
const struct f71882fg_sio_data *sio_data)
{
struct resource res = {
.start = address,
.end = address + REGION_LENGTH - 1,
.flags = IORESOURCE_IO,
};
int err;
f71882fg_pdev = platform_device_alloc(DRVNAME, address);
if (!f71882fg_pdev)
return -ENOMEM;
res.name = f71882fg_pdev->name;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit_device_put;
err = platform_device_add_resources(f71882fg_pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed\n");
goto exit_device_put;
}
err = platform_device_add_data(f71882fg_pdev, sio_data,
sizeof(struct f71882fg_sio_data));
if (err) {
pr_err("Platform data allocation failed\n");
goto exit_device_put;
}
err = platform_device_add(f71882fg_pdev);
if (err) {
pr_err("Device addition failed\n");
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(f71882fg_pdev);
return err;
}
static struct platform_driver f71882fg_driver = {
.driver = {
.name = DRVNAME,
},
.probe = f71882fg_probe,
.remove = f71882fg_remove,
};
static int __init f71882fg_init(void)
{
int err;
int address;
struct f71882fg_sio_data sio_data;
memset(&sio_data, 0, sizeof(sio_data));
address = f71882fg_find(0x2e, &sio_data);
if (address < 0)
address = f71882fg_find(0x4e, &sio_data);
if (address < 0)
return address;
err = platform_driver_register(&f71882fg_driver);
if (err)
return err;
err = f71882fg_device_add(address, &sio_data);
if (err)
goto exit_driver;
return 0;
exit_driver:
platform_driver_unregister(&f71882fg_driver);
return err;
}
static void __exit f71882fg_exit(void)
{
platform_device_unregister(f71882fg_pdev);
platform_driver_unregister(&f71882fg_driver);
}
MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
MODULE_AUTHOR("Hans Edgington, Hans de Goede <[email protected]>");
MODULE_LICENSE("GPL");
module_init(f71882fg_init);
module_exit(f71882fg_exit);
|
linux-master
|
drivers/hwmon/f71882fg.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm77.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
*
* Copyright (c) 2004 Andras BALI <[email protected]>
*
* Heavily based on lm75.c by Frodo Looijaard <[email protected]>. The LM77
* is a temperature sensor and thermal window comparator with 0.5 deg
* resolution made by National Semiconductor. Complete datasheet can be
* obtained at their site:
* http://www.national.com/pf/LM/LM77.html
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b,
I2C_CLIENT_END };
/* The LM77 registers */
#define LM77_REG_TEMP 0x00
#define LM77_REG_CONF 0x01
#define LM77_REG_TEMP_HYST 0x02
#define LM77_REG_TEMP_CRIT 0x03
#define LM77_REG_TEMP_MIN 0x04
#define LM77_REG_TEMP_MAX 0x05
enum temp_index {
t_input = 0,
t_crit,
t_min,
t_max,
t_hyst,
t_num_temp
};
static const u8 temp_regs[t_num_temp] = {
[t_input] = LM77_REG_TEMP,
[t_min] = LM77_REG_TEMP_MIN,
[t_max] = LM77_REG_TEMP_MAX,
[t_crit] = LM77_REG_TEMP_CRIT,
[t_hyst] = LM77_REG_TEMP_HYST,
};
/* Each client has this additional data */
struct lm77_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid;
unsigned long last_updated; /* In jiffies */
int temp[t_num_temp]; /* index using temp_index */
u8 alarms;
};
/* straight from the datasheet */
#define LM77_TEMP_MIN (-55000)
#define LM77_TEMP_MAX 125000
/*
* In the temperature registers, the low 3 bits are not part of the
* temperature values; they are the status bits.
*/
static inline s16 LM77_TEMP_TO_REG(int temp)
{
return (temp / 500) * 8;
}
static inline int LM77_TEMP_FROM_REG(s16 reg)
{
return (reg / 8) * 500;
}
/*
* All registers are word-sized, except for the configuration register.
* The LM77 uses the high-byte first convention.
*/
static u16 lm77_read_value(struct i2c_client *client, u8 reg)
{
if (reg == LM77_REG_CONF)
return i2c_smbus_read_byte_data(client, reg);
else
return i2c_smbus_read_word_swapped(client, reg);
}
static int lm77_write_value(struct i2c_client *client, u8 reg, u16 value)
{
if (reg == LM77_REG_CONF)
return i2c_smbus_write_byte_data(client, reg, value);
else
return i2c_smbus_write_word_swapped(client, reg, value);
}
static struct lm77_data *lm77_update_device(struct device *dev)
{
struct lm77_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
dev_dbg(&client->dev, "Starting lm77 update\n");
for (i = 0; i < t_num_temp; i++) {
data->temp[i] =
LM77_TEMP_FROM_REG(lm77_read_value(client,
temp_regs[i]));
}
data->alarms =
lm77_read_value(client, LM77_REG_TEMP) & 0x0007;
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* sysfs stuff */
static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm77_data *data = lm77_update_device(dev);
return sprintf(buf, "%d\n", data->temp[attr->index]);
}
static ssize_t temp_hyst_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm77_data *data = lm77_update_device(dev);
int nr = attr->index;
int temp;
temp = nr == t_min ? data->temp[nr] + data->temp[t_hyst] :
data->temp[nr] - data->temp[t_hyst];
return sprintf(buf, "%d\n", temp);
}
static ssize_t temp_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm77_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
val = clamp_val(val, LM77_TEMP_MIN, LM77_TEMP_MAX);
mutex_lock(&data->update_lock);
data->temp[nr] = val;
lm77_write_value(client, temp_regs[nr], LM77_TEMP_TO_REG(val));
mutex_unlock(&data->update_lock);
return count;
}
/*
* hysteresis is stored as a relative value on the chip, so it has to be
* converted first.
*/
static ssize_t temp_hyst_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct lm77_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
val = clamp_val(data->temp[t_crit] - val, LM77_TEMP_MIN, LM77_TEMP_MAX);
data->temp[t_hyst] = val;
lm77_write_value(client, LM77_REG_TEMP_HYST,
LM77_TEMP_TO_REG(data->temp[t_hyst]));
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct lm77_data *data = lm77_update_device(dev);
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, t_input);
static SENSOR_DEVICE_ATTR_RW(temp1_crit, temp, t_crit);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp, t_min);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, t_max);
static SENSOR_DEVICE_ATTR_RW(temp1_crit_hyst, temp_hyst, t_crit);
static SENSOR_DEVICE_ATTR_RO(temp1_min_hyst, temp_hyst, t_min);
static SENSOR_DEVICE_ATTR_RO(temp1_max_hyst, temp_hyst, t_max);
static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 1);
static struct attribute *lm77_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_min_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(lm77);
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm77_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int i, cur, conf, hyst, crit, min, max;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
/*
* Here comes the remaining detection. Since the LM77 has no
* register dedicated to identification, we have to rely on the
* following tricks:
*
* 1. the high 4 bits represent the sign and thus they should
* always be the same
* 2. the high 3 bits are unused in the configuration register
* 3. addresses 0x06 and 0x07 return the last read value
* 4. registers cycling over 8-address boundaries
*
* Word-sized registers are high-byte first.
*/
/* addresses cycling */
cur = i2c_smbus_read_word_data(client, 0);
conf = i2c_smbus_read_byte_data(client, 1);
hyst = i2c_smbus_read_word_data(client, 2);
crit = i2c_smbus_read_word_data(client, 3);
min = i2c_smbus_read_word_data(client, 4);
max = i2c_smbus_read_word_data(client, 5);
for (i = 8; i <= 0xff; i += 8) {
if (i2c_smbus_read_byte_data(client, i + 1) != conf
|| i2c_smbus_read_word_data(client, i + 2) != hyst
|| i2c_smbus_read_word_data(client, i + 3) != crit
|| i2c_smbus_read_word_data(client, i + 4) != min
|| i2c_smbus_read_word_data(client, i + 5) != max)
return -ENODEV;
}
/* sign bits */
if (((cur & 0x00f0) != 0xf0 && (cur & 0x00f0) != 0x0)
|| ((hyst & 0x00f0) != 0xf0 && (hyst & 0x00f0) != 0x0)
|| ((crit & 0x00f0) != 0xf0 && (crit & 0x00f0) != 0x0)
|| ((min & 0x00f0) != 0xf0 && (min & 0x00f0) != 0x0)
|| ((max & 0x00f0) != 0xf0 && (max & 0x00f0) != 0x0))
return -ENODEV;
/* unused bits */
if (conf & 0xe0)
return -ENODEV;
/* 0x06 and 0x07 return the last read value */
cur = i2c_smbus_read_word_data(client, 0);
if (i2c_smbus_read_word_data(client, 6) != cur
|| i2c_smbus_read_word_data(client, 7) != cur)
return -ENODEV;
hyst = i2c_smbus_read_word_data(client, 2);
if (i2c_smbus_read_word_data(client, 6) != hyst
|| i2c_smbus_read_word_data(client, 7) != hyst)
return -ENODEV;
min = i2c_smbus_read_word_data(client, 4);
if (i2c_smbus_read_word_data(client, 6) != min
|| i2c_smbus_read_word_data(client, 7) != min)
return -ENODEV;
strscpy(info->type, "lm77", I2C_NAME_SIZE);
return 0;
}
static void lm77_init_client(struct i2c_client *client)
{
/* Initialize the LM77 chip - turn off shutdown mode */
int conf = lm77_read_value(client, LM77_REG_CONF);
if (conf & 1)
lm77_write_value(client, LM77_REG_CONF, conf & 0xfe);
}
static int lm77_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct lm77_data *data;
data = devm_kzalloc(dev, sizeof(struct lm77_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Initialize the LM77 chip */
lm77_init_client(client);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, lm77_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id lm77_id[] = {
{ "lm77", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm77_id);
/* This is the driver that will be inserted */
static struct i2c_driver lm77_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm77",
},
.probe = lm77_probe,
.id_table = lm77_id,
.detect = lm77_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm77_driver);
MODULE_AUTHOR("Andras BALI <[email protected]>");
MODULE_DESCRIPTION("LM77 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm77.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm90.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2003-2010 Jean Delvare <[email protected]>
*
* Based on the lm83 driver. The LM90 is a sensor chip made by National
* Semiconductor. It reports up to two temperatures (its own plus up to
* one external one) with a 0.125 deg resolution (1 deg for local
* temperature) and a 3-4 deg accuracy.
*
* This driver also supports the LM89 and LM99, two other sensor chips
* made by National Semiconductor. Both have an increased remote
* temperature measurement accuracy (1 degree), and the LM99
* additionally shifts remote temperatures (measured and limits) by 16
* degrees, which allows for higher temperatures measurement.
* Note that there is no way to differentiate between both chips.
* When device is auto-detected, the driver will assume an LM99.
*
* This driver also supports the LM86, another sensor chip made by
* National Semiconductor. It is exactly similar to the LM90 except it
* has a higher accuracy.
*
* This driver also supports the ADM1032, a sensor chip made by Analog
* Devices. That chip is similar to the LM90, with a few differences
* that are not handled by this driver. Among others, it has a higher
* accuracy than the LM90, much like the LM86 does.
*
* This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
* chips made by Maxim. These chips are similar to the LM86.
* Note that there is no easy way to differentiate between the three
* variants. We use the device address to detect MAX6659, which will result
* in a detection as max6657 if it is on address 0x4c. The extra address
* and features of the MAX6659 are only supported if the chip is configured
* explicitly as max6659, or if its address is not 0x4c.
* These chips lack the remote temperature offset feature.
*
* This driver also supports the MAX6654 chip made by Maxim. This chip can be
* at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
* to MAX6657/MAX6658/MAX6659, but does not support critical temperature
* limits. Extended range is available by setting the configuration register
* accordingly, and is done during initialization. Extended precision is only
* available at conversion rates of 1 Hz and slower. Note that extended
* precision is not enabled by default, as this driver initializes all chips
* to 2 Hz by design. The driver also supports MAX6690, which is practically
* identical to MAX6654.
*
* This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
* MAX6692 chips made by Maxim. These are again similar to the LM86,
* but they use unsigned temperature values and can report temperatures
* from 0 to 145 degrees.
*
* This driver also supports the MAX6680 and MAX6681, two other sensor
* chips made by Maxim. These are quite similar to the other Maxim
* chips. The MAX6680 and MAX6681 only differ in the pinout so they can
* be treated identically.
*
* This driver also supports the MAX6695 and MAX6696, two other sensor
* chips made by Maxim. These are also quite similar to other Maxim
* chips, but support three temperature sensors instead of two. MAX6695
* and MAX6696 only differ in the pinout so they can be treated identically.
*
* This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
* NCT1008 from ON Semiconductor. The chips are supported in both compatibility
* and extended mode. They are mostly compatible with LM90 except for a data
* format difference for the temperature value registers.
*
* This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices
* / ON Semiconductor. The chips are similar to ADT7461 but support two external
* temperature sensors.
*
* This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor.
* The chips are similar to ADT7461/ADT7461A but have full PEC support
* (undocumented).
*
* This driver also supports the SA56004 from Philips. This device is
* pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
*
* This driver also supports the G781 from GMT. This device is compatible
* with the ADM1032.
*
* This driver also supports TMP451 and TMP461 from Texas Instruments.
* Those devices are supported in both compatibility and extended mode.
* They are mostly compatible with ADT7461 except for local temperature
* low byte register and max conversion rate.
*
* This driver also supports MAX1617 and various clones such as G767
* and NE1617. Such clones will be detected as MAX1617.
*
* This driver also supports NE1618 from Philips. It is similar to NE1617
* but supports 11 bit external temperature values.
*
* Since the LM90 was the first chipset supported by this driver, most
* comments will refer to this chipset, but are actually general and
* concern all supported chipsets, unless mentioned otherwise.
*/
#include <linux/bits.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/kstrtox.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
/* The maximum number of channels currently supported */
#define MAX_CHANNELS 3
/*
* Addresses to scan
* Address is fully defined internally and cannot be changed except for
* MAX6659, MAX6680 and MAX6681.
* LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
* MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
* ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
* have address 0x4d.
* MAX6647 has address 0x4e.
* MAX6659 can have address 0x4c, 0x4d or 0x4e.
* MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
* 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
* SA56004 can have address 0x48 through 0x4F.
*/
static const unsigned short normal_i2c[] = {
0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481,
g781, lm84, lm90, lm99,
max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696,
nct210, nct72, ne1618, sa56004, tmp451, tmp461, w83l771,
};
/*
* The LM90 registers
*/
#define LM90_REG_MAN_ID 0xFE
#define LM90_REG_CHIP_ID 0xFF
#define LM90_REG_CONFIG1 0x03
#define LM90_REG_CONFIG2 0xBF
#define LM90_REG_CONVRATE 0x04
#define LM90_REG_STATUS 0x02
#define LM90_REG_LOCAL_TEMP 0x00
#define LM90_REG_LOCAL_HIGH 0x05
#define LM90_REG_LOCAL_LOW 0x06
#define LM90_REG_LOCAL_CRIT 0x20
#define LM90_REG_REMOTE_TEMPH 0x01
#define LM90_REG_REMOTE_TEMPL 0x10
#define LM90_REG_REMOTE_OFFSH 0x11
#define LM90_REG_REMOTE_OFFSL 0x12
#define LM90_REG_REMOTE_HIGHH 0x07
#define LM90_REG_REMOTE_HIGHL 0x13
#define LM90_REG_REMOTE_LOWH 0x08
#define LM90_REG_REMOTE_LOWL 0x14
#define LM90_REG_REMOTE_CRIT 0x19
#define LM90_REG_TCRIT_HYST 0x21
/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
#define MAX6657_REG_LOCAL_TEMPL 0x11
#define MAX6696_REG_STATUS2 0x12
#define MAX6659_REG_REMOTE_EMERG 0x16
#define MAX6659_REG_LOCAL_EMERG 0x17
/* SA56004 registers */
#define SA56004_REG_LOCAL_TEMPL 0x22
#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
/* TMP451/TMP461 registers */
#define TMP451_REG_LOCAL_TEMPL 0x15
#define TMP451_REG_CONALERT 0x22
#define TMP461_REG_CHEN 0x16
#define TMP461_REG_DFC 0x24
/* ADT7481 registers */
#define ADT7481_REG_STATUS2 0x23
#define ADT7481_REG_CONFIG2 0x24
#define ADT7481_REG_MAN_ID 0x3e
#define ADT7481_REG_CHIP_ID 0x3d
/* Device features */
#define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */
#define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */
#define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */
#define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */
#define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */
#define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */
#define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */
#define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */
#define LM90_PAUSE_FOR_CONFIG BIT(8) /* Pause conversion for config */
#define LM90_HAVE_CRIT BIT(9) /* Chip supports CRIT/OVERT register */
#define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */
#define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */
#define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/
#define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */
#define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/
#define LM90_HAVE_LOW BIT(15) /* low limits */
#define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */
#define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */
#define LM90_HAVE_FAULTQUEUE BIT(18) /* configurable samples count */
/* LM90 status */
#define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */
#define LM90_STATUS_RTHRM BIT(1) /* remote THERM limit tripped */
#define LM90_STATUS_ROPEN BIT(2) /* remote is an open circuit */
#define LM90_STATUS_RLOW BIT(3) /* remote low temp limit tripped */
#define LM90_STATUS_RHIGH BIT(4) /* remote high temp limit tripped */
#define LM90_STATUS_LLOW BIT(5) /* local low temp limit tripped */
#define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */
#define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */
/* MAX6695/6696 and ADT7481 2nd status register */
#define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */
#define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */
#define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */
#define MAX6696_STATUS2_R2HIGH BIT(4) /* remote2 high temp limit tripped */
#define MAX6696_STATUS2_ROT2 BIT(5) /* remote emergency limit tripped */
#define MAX6696_STATUS2_R2OT2 BIT(6) /* remote2 emergency limit tripped */
#define MAX6696_STATUS2_LOT2 BIT(7) /* local emergency limit tripped */
/*
* Driver data (common to all clients)
*/
static const struct i2c_device_id lm90_id[] = {
{ "adm1020", max1617 },
{ "adm1021", max1617 },
{ "adm1023", adm1023 },
{ "adm1032", adm1032 },
{ "adt7421", adt7461a },
{ "adt7461", adt7461 },
{ "adt7461a", adt7461a },
{ "adt7481", adt7481 },
{ "adt7482", adt7481 },
{ "adt7483a", adt7481 },
{ "g781", g781 },
{ "gl523sm", max1617 },
{ "lm84", lm84 },
{ "lm86", lm90 },
{ "lm89", lm90 },
{ "lm90", lm90 },
{ "lm99", lm99 },
{ "max1617", max1617 },
{ "max6642", max6642 },
{ "max6646", max6646 },
{ "max6647", max6646 },
{ "max6648", max6648 },
{ "max6649", max6646 },
{ "max6654", max6654 },
{ "max6657", max6657 },
{ "max6658", max6657 },
{ "max6659", max6659 },
{ "max6680", max6680 },
{ "max6681", max6680 },
{ "max6690", max6654 },
{ "max6692", max6648 },
{ "max6695", max6696 },
{ "max6696", max6696 },
{ "mc1066", max1617 },
{ "nct1008", adt7461a },
{ "nct210", nct210 },
{ "nct214", nct72 },
{ "nct218", nct72 },
{ "nct72", nct72 },
{ "ne1618", ne1618 },
{ "w83l771", w83l771 },
{ "sa56004", sa56004 },
{ "thmc10", max1617 },
{ "tmp451", tmp451 },
{ "tmp461", tmp461 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm90_id);
static const struct of_device_id __maybe_unused lm90_of_match[] = {
{
.compatible = "adi,adm1032",
.data = (void *)adm1032
},
{
.compatible = "adi,adt7461",
.data = (void *)adt7461
},
{
.compatible = "adi,adt7461a",
.data = (void *)adt7461a
},
{
.compatible = "adi,adt7481",
.data = (void *)adt7481
},
{
.compatible = "gmt,g781",
.data = (void *)g781
},
{
.compatible = "national,lm90",
.data = (void *)lm90
},
{
.compatible = "national,lm86",
.data = (void *)lm90
},
{
.compatible = "national,lm89",
.data = (void *)lm90
},
{
.compatible = "national,lm99",
.data = (void *)lm99
},
{
.compatible = "dallas,max6646",
.data = (void *)max6646
},
{
.compatible = "dallas,max6647",
.data = (void *)max6646
},
{
.compatible = "dallas,max6649",
.data = (void *)max6646
},
{
.compatible = "dallas,max6654",
.data = (void *)max6654
},
{
.compatible = "dallas,max6657",
.data = (void *)max6657
},
{
.compatible = "dallas,max6658",
.data = (void *)max6657
},
{
.compatible = "dallas,max6659",
.data = (void *)max6659
},
{
.compatible = "dallas,max6680",
.data = (void *)max6680
},
{
.compatible = "dallas,max6681",
.data = (void *)max6680
},
{
.compatible = "dallas,max6695",
.data = (void *)max6696
},
{
.compatible = "dallas,max6696",
.data = (void *)max6696
},
{
.compatible = "onnn,nct1008",
.data = (void *)adt7461a
},
{
.compatible = "onnn,nct214",
.data = (void *)nct72
},
{
.compatible = "onnn,nct218",
.data = (void *)nct72
},
{
.compatible = "onnn,nct72",
.data = (void *)nct72
},
{
.compatible = "winbond,w83l771",
.data = (void *)w83l771
},
{
.compatible = "nxp,sa56004",
.data = (void *)sa56004
},
{
.compatible = "ti,tmp451",
.data = (void *)tmp451
},
{
.compatible = "ti,tmp461",
.data = (void *)tmp461
},
{ },
};
MODULE_DEVICE_TABLE(of, lm90_of_match);
/*
* chip type specific parameters
*/
struct lm90_params {
u32 flags; /* Capabilities */
u16 alert_alarms; /* Which alarm bits trigger ALERT# */
/* Upper 8 bits for max6695/96 */
u8 max_convrate; /* Maximum conversion rate register value */
u8 resolution; /* 16-bit resolution (default 11 bit) */
u8 reg_status2; /* 2nd status register (optional) */
u8 reg_local_ext; /* Extended local temp register (optional) */
u8 faultqueue_mask; /* fault queue bit mask */
u8 faultqueue_depth; /* fault queue depth if mask is used */
};
static const struct lm90_params lm90_params[] = {
[adm1023] = {
.flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT
| LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.resolution = 8,
.max_convrate = 7,
},
[adm1032] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
| LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS
| LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
| LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7c,
.max_convrate = 10,
},
[adt7461] = {
/*
* Standard temperature range is supposed to be unsigned,
* but that does not match reality. Negative temperatures
* are always reported.
*/
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
| LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7c,
.max_convrate = 10,
.resolution = 10,
},
[adt7461a] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
| LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS
| LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
| LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7c,
.max_convrate = 10,
},
[adt7481] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
| LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC
| LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW
| LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
| LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x1c7c,
.max_convrate = 11,
.resolution = 10,
.reg_status2 = ADT7481_REG_STATUS2,
},
[g781] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7c,
.max_convrate = 7,
},
[lm84] = {
.flags = LM90_HAVE_ALARMS,
.resolution = 8,
},
[lm90] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
| LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
| LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7b,
.max_convrate = 9,
.faultqueue_mask = BIT(0),
.faultqueue_depth = 3,
},
[lm99] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
| LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
| LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7b,
.max_convrate = 9,
.faultqueue_mask = BIT(0),
.faultqueue_depth = 3,
},
[max1617] = {
.flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT |
LM90_HAVE_LOW | LM90_HAVE_ALARMS,
.alert_alarms = 0x78,
.resolution = 8,
.max_convrate = 7,
},
[max6642] = {
.flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED
| LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x50,
.resolution = 10,
.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
.faultqueue_mask = BIT(4),
.faultqueue_depth = 2,
},
[max6646] = {
.flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT
| LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW
| LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.max_convrate = 6,
.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
},
[max6648] = {
.flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW
| LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.max_convrate = 6,
.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
},
[max6654] = {
.flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
| LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.max_convrate = 7,
.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
},
[max6657] = {
.flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.max_convrate = 8,
.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
},
[max6659] = {
.flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.max_convrate = 8,
.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
},
[max6680] = {
/*
* Apparent temperatures of 128 degrees C or higher are reported
* and treated as negative temperatures (meaning min_alarm will
* be set).
*/
.flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
| LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.max_convrate = 7,
},
[max6696] = {
.flags = LM90_HAVE_EMERGENCY
| LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x1c7c,
.max_convrate = 6,
.reg_status2 = MAX6696_REG_STATUS2,
.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
.faultqueue_mask = BIT(5),
.faultqueue_depth = 4,
},
[nct72] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
| LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP
| LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
| LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7c,
.max_convrate = 10,
.resolution = 10,
},
[nct210] = {
.flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT
| LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.resolution = 11,
.max_convrate = 7,
},
[ne1618] = {
.flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT
| LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.resolution = 11,
.max_convrate = 7,
},
[w83l771] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT,
.alert_alarms = 0x7c,
.max_convrate = 8,
},
[sa56004] = {
/*
* Apparent temperatures of 128 degrees C or higher are reported
* and treated as negative temperatures (meaning min_alarm will
* be set).
*/
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7b,
.max_convrate = 9,
.reg_local_ext = SA56004_REG_LOCAL_TEMPL,
.faultqueue_mask = BIT(0),
.faultqueue_depth = 3,
},
[tmp451] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
| LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW
| LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7c,
.max_convrate = 9,
.resolution = 12,
.reg_local_ext = TMP451_REG_LOCAL_TEMPL,
},
[tmp461] = {
.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
| LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
| LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
| LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
.alert_alarms = 0x7c,
.max_convrate = 9,
.resolution = 12,
.reg_local_ext = TMP451_REG_LOCAL_TEMPL,
},
};
/*
* temperature register index
*/
enum lm90_temp_reg_index {
LOCAL_LOW = 0,
LOCAL_HIGH,
LOCAL_CRIT,
REMOTE_CRIT,
LOCAL_EMERG, /* max6659 and max6695/96 */
REMOTE_EMERG, /* max6659 and max6695/96 */
REMOTE2_CRIT, /* max6695/96 only */
REMOTE2_EMERG, /* max6695/96 only */
REMOTE_TEMP,
REMOTE_LOW,
REMOTE_HIGH,
REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
LOCAL_TEMP,
REMOTE2_TEMP, /* max6695/96 only */
REMOTE2_LOW, /* max6695/96 only */
REMOTE2_HIGH, /* max6695/96 only */
REMOTE2_OFFSET,
TEMP_REG_NUM
};
/*
* Client data (each client gets its own)
*/
struct lm90_data {
struct i2c_client *client;
struct device *hwmon_dev;
u32 chip_config[2];
u32 channel_config[MAX_CHANNELS + 1];
const char *channel_label[MAX_CHANNELS];
struct hwmon_channel_info chip_info;
struct hwmon_channel_info temp_info;
const struct hwmon_channel_info *info[3];
struct hwmon_chip_info chip;
struct mutex update_lock;
struct delayed_work alert_work;
struct work_struct report_work;
bool valid; /* true if register values are valid */
bool alarms_valid; /* true if status register values are valid */
unsigned long last_updated; /* in jiffies */
unsigned long alarms_updated; /* in jiffies */
int kind;
u32 flags;
unsigned int update_interval; /* in milliseconds */
u8 config; /* Current configuration register value */
u8 config_orig; /* Original configuration register value */
u8 convrate_orig; /* Original conversion rate register value */
u8 resolution; /* temperature resolution in bit */
u16 alert_alarms; /* Which alarm bits trigger ALERT# */
/* Upper 8 bits for max6695/96 */
u8 max_convrate; /* Maximum conversion rate */
u8 reg_status2; /* 2nd status register (optional) */
u8 reg_local_ext; /* local extension register offset */
u8 reg_remote_ext; /* remote temperature low byte */
u8 faultqueue_mask; /* fault queue mask */
u8 faultqueue_depth; /* fault queue mask */
/* registers values */
u16 temp[TEMP_REG_NUM];
u8 temp_hyst;
u8 conalert;
u16 reported_alarms; /* alarms reported as sysfs/udev events */
u16 current_alarms; /* current alarms, reported by chip */
u16 alarms; /* alarms not yet reported to user */
};
/*
* Support functions
*/
/*
* If the chip supports PEC but not on write byte transactions, we need
* to explicitly ask for a transaction without PEC.
*/
static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value)
{
return i2c_smbus_xfer(client->adapter, client->addr,
client->flags & ~I2C_CLIENT_PEC,
I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
}
/*
* It is assumed that client->update_lock is held (unless we are in
* detection or initialization steps). This matters when PEC is enabled
* for chips with partial PEC support, because we don't want the address
* pointer to change between the write byte and the read byte transactions.
*/
static int lm90_read_reg(struct i2c_client *client, u8 reg)
{
struct lm90_data *data = i2c_get_clientdata(client);
bool partial_pec = (client->flags & I2C_CLIENT_PEC) &&
(data->flags & LM90_HAVE_PARTIAL_PEC);
int err;
if (partial_pec) {
err = lm90_write_no_pec(client, reg);
if (err)
return err;
return i2c_smbus_read_byte(client);
}
return i2c_smbus_read_byte_data(client, reg);
}
/*
* Return register write address
*
* The write address for registers 0x03 .. 0x08 is the read address plus 6.
* For other registers the write address matches the read address.
*/
static u8 lm90_write_reg_addr(u8 reg)
{
if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH)
return reg + 6;
return reg;
}
/*
* Write into LM90 register.
* Convert register address to write address if needed, then execute the
* operation.
*/
static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val)
{
return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val);
}
/*
* Write into 16-bit LM90 register.
* Convert register addresses to write address if needed, then execute the
* operation.
*/
static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val)
{
int ret;
ret = lm90_write_reg(client, regh, val >> 8);
if (ret < 0 || !regl)
return ret;
return lm90_write_reg(client, regl, val & 0xff);
}
static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl,
bool is_volatile)
{
int oldh, newh, l;
oldh = lm90_read_reg(client, regh);
if (oldh < 0)
return oldh;
if (!regl)
return oldh << 8;
l = lm90_read_reg(client, regl);
if (l < 0)
return l;
if (!is_volatile)
return (oldh << 8) | l;
/*
* For volatile registers we have to use a trick.
* We have to read two registers to have the sensor temperature,
* but we have to beware a conversion could occur between the
* readings. The datasheet says we should either use
* the one-shot conversion register, which we don't want to do
* (disables hardware monitoring) or monitor the busy bit, which is
* impossible (we can't read the values and monitor that bit at the
* exact same time). So the solution used here is to read the high
* the high byte again. If the new high byte matches the old one,
* then we have a valid reading. Otherwise we have to read the low
* byte again, and now we believe we have a correct reading.
*/
newh = lm90_read_reg(client, regh);
if (newh < 0)
return newh;
if (oldh != newh) {
l = lm90_read_reg(client, regl);
if (l < 0)
return l;
}
return (newh << 8) | l;
}
static int lm90_update_confreg(struct lm90_data *data, u8 config)
{
if (data->config != config) {
int err;
err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config);
if (err)
return err;
data->config = config;
}
return 0;
}
/*
* client->update_lock must be held when calling this function (unless we are
* in detection or initialization steps), and while a remote channel other
* than channel 0 is selected. Also, calling code must make sure to re-select
* external channel 0 before releasing the lock. This is necessary because
* various registers have different meanings as a result of selecting a
* non-default remote channel.
*/
static int lm90_select_remote_channel(struct lm90_data *data, bool second)
{
u8 config = data->config & ~0x08;
if (second)
config |= 0x08;
return lm90_update_confreg(data, config);
}
static int lm90_write_convrate(struct lm90_data *data, int val)
{
u8 config = data->config;
int err;
/* Save config and pause conversion */
if (data->flags & LM90_PAUSE_FOR_CONFIG) {
err = lm90_update_confreg(data, config | 0x40);
if (err < 0)
return err;
}
/* Set conv rate */
err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val);
/* Revert change to config */
lm90_update_confreg(data, config);
return err;
}
/*
* Set conversion rate.
* client->update_lock must be held when calling this function (unless we are
* in detection or initialization steps).
*/
static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
unsigned int interval)
{
unsigned int update_interval;
int i, err;
/* Shift calculations to avoid rounding errors */
interval <<= 6;
/* find the nearest update rate */
for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
i < data->max_convrate; i++, update_interval >>= 1)
if (interval >= update_interval * 3 / 4)
break;
err = lm90_write_convrate(data, i);
data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
return err;
}
static int lm90_set_faultqueue(struct i2c_client *client,
struct lm90_data *data, int val)
{
int err;
if (data->faultqueue_mask) {
err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ?
data->config & ~data->faultqueue_mask :
data->config | data->faultqueue_mask);
} else {
static const u8 values[4] = {0, 2, 6, 0x0e};
data->conalert = (data->conalert & 0xf1) | values[val - 1];
err = lm90_write_reg(data->client, TMP451_REG_CONALERT,
data->conalert);
}
return err;
}
static int lm90_update_limits(struct device *dev)
{
struct lm90_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int val;
if (data->flags & LM90_HAVE_CRIT) {
val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT);
if (val < 0)
return val;
data->temp[LOCAL_CRIT] = val << 8;
val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
if (val < 0)
return val;
data->temp[REMOTE_CRIT] = val << 8;
val = lm90_read_reg(client, LM90_REG_TCRIT_HYST);
if (val < 0)
return val;
data->temp_hyst = val;
}
if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) {
val = lm90_read_reg(client, TMP451_REG_CONALERT);
if (val < 0)
return val;
data->conalert = val;
}
val = lm90_read16(client, LM90_REG_REMOTE_LOWH,
(data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0,
false);
if (val < 0)
return val;
data->temp[REMOTE_LOW] = val;
val = lm90_read16(client, LM90_REG_REMOTE_HIGHH,
(data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0,
false);
if (val < 0)
return val;
data->temp[REMOTE_HIGH] = val;
if (data->flags & LM90_HAVE_OFFSET) {
val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
LM90_REG_REMOTE_OFFSL, false);
if (val < 0)
return val;
data->temp[REMOTE_OFFSET] = val;
}
if (data->flags & LM90_HAVE_EMERGENCY) {
val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG);
if (val < 0)
return val;
data->temp[LOCAL_EMERG] = val << 8;
val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
if (val < 0)
return val;
data->temp[REMOTE_EMERG] = val << 8;
}
if (data->flags & LM90_HAVE_TEMP3) {
val = lm90_select_remote_channel(data, true);
if (val < 0)
return val;
val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
if (val < 0)
return val;
data->temp[REMOTE2_CRIT] = val << 8;
if (data->flags & LM90_HAVE_EMERGENCY) {
val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
if (val < 0)
return val;
data->temp[REMOTE2_EMERG] = val << 8;
}
val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH);
if (val < 0)
return val;
data->temp[REMOTE2_LOW] = val << 8;
val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH);
if (val < 0)
return val;
data->temp[REMOTE2_HIGH] = val << 8;
if (data->flags & LM90_HAVE_OFFSET) {
val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
LM90_REG_REMOTE_OFFSL, false);
if (val < 0)
return val;
data->temp[REMOTE2_OFFSET] = val;
}
lm90_select_remote_channel(data, false);
}
return 0;
}
static void lm90_report_alarms(struct work_struct *work)
{
struct lm90_data *data = container_of(work, struct lm90_data, report_work);
u16 cleared_alarms, new_alarms, current_alarms;
struct device *hwmon_dev = data->hwmon_dev;
struct device *dev = &data->client->dev;
int st, st2;
current_alarms = data->current_alarms;
cleared_alarms = data->reported_alarms & ~current_alarms;
new_alarms = current_alarms & ~data->reported_alarms;
if (!cleared_alarms && !new_alarms)
return;
st = new_alarms & 0xff;
st2 = new_alarms >> 8;
if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
(st2 & MAX6696_STATUS2_LOT2))
dev_dbg(dev, "temp%d out of range, please check!\n", 1);
if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
(st2 & MAX6696_STATUS2_ROT2))
dev_dbg(dev, "temp%d out of range, please check!\n", 2);
if (st & LM90_STATUS_ROPEN)
dev_dbg(dev, "temp%d diode open, please check!\n", 2);
if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
dev_dbg(dev, "temp%d out of range, please check!\n", 3);
if (st2 & MAX6696_STATUS2_R2OPEN)
dev_dbg(dev, "temp%d diode open, please check!\n", 3);
st |= cleared_alarms & 0xff;
st2 |= cleared_alarms >> 8;
if (st & LM90_STATUS_LLOW)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);
if (st & LM90_STATUS_RLOW)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);
if (st2 & MAX6696_STATUS2_R2LOW)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);
if (st & LM90_STATUS_LHIGH)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);
if (st & LM90_STATUS_RHIGH)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);
if (st2 & MAX6696_STATUS2_R2HIGH)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);
if (st & LM90_STATUS_LTHRM)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
if (st & LM90_STATUS_RTHRM)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);
if (st2 & MAX6696_STATUS2_R2THRM)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);
if (st2 & MAX6696_STATUS2_LOT2)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);
if (st2 & MAX6696_STATUS2_ROT2)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);
if (st2 & MAX6696_STATUS2_R2OT2)
hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);
data->reported_alarms = current_alarms;
}
static int lm90_update_alarms_locked(struct lm90_data *data, bool force)
{
if (force || !data->alarms_valid ||
time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {
struct i2c_client *client = data->client;
bool check_enable;
u16 alarms;
int val;
data->alarms_valid = false;
val = lm90_read_reg(client, LM90_REG_STATUS);
if (val < 0)
return val;
alarms = val & ~LM90_STATUS_BUSY;
if (data->reg_status2) {
val = lm90_read_reg(client, data->reg_status2);
if (val < 0)
return val;
alarms |= val << 8;
}
/*
* If the update is forced (called from interrupt or alert
* handler) and alarm data is valid, the alarms may have been
* updated after the last update interval, and the status
* register may still be cleared. Only add additional alarms
* in this case. Alarms will be cleared later if appropriate.
*/
if (force && data->alarms_valid)
data->current_alarms |= alarms;
else
data->current_alarms = alarms;
data->alarms |= alarms;
check_enable = (client->irq || !(data->config_orig & 0x80)) &&
(data->config & 0x80);
if (force || check_enable)
schedule_work(&data->report_work);
/*
* Re-enable ALERT# output if it was originally enabled, relevant
* alarms are all clear, and alerts are currently disabled.
* Otherwise (re)schedule worker if needed.
*/
if (check_enable) {
if (!(data->current_alarms & data->alert_alarms)) {
dev_dbg(&client->dev, "Re-enabling ALERT#\n");
lm90_update_confreg(data, data->config & ~0x80);
/*
* We may have been called from the update handler.
* If so, the worker, if scheduled, is no longer
* needed. Cancel it. Don't synchronize because
* it may already be running.
*/
cancel_delayed_work(&data->alert_work);
} else {
schedule_delayed_work(&data->alert_work,
max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
}
}
data->alarms_updated = jiffies;
data->alarms_valid = true;
}
return 0;
}
static int lm90_update_alarms(struct lm90_data *data, bool force)
{
int err;
mutex_lock(&data->update_lock);
err = lm90_update_alarms_locked(data, force);
mutex_unlock(&data->update_lock);
return err;
}
static void lm90_alert_work(struct work_struct *__work)
{
struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);
struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);
/* Nothing to do if alerts are enabled */
if (!(data->config & 0x80))
return;
lm90_update_alarms(data, true);
}
static int lm90_update_device(struct device *dev)
{
struct lm90_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long next_update;
int val;
if (!data->valid) {
val = lm90_update_limits(dev);
if (val < 0)
return val;
}
next_update = data->last_updated +
msecs_to_jiffies(data->update_interval);
if (time_after(jiffies, next_update) || !data->valid) {
dev_dbg(&client->dev, "Updating lm90 data.\n");
data->valid = false;
val = lm90_read_reg(client, LM90_REG_LOCAL_LOW);
if (val < 0)
return val;
data->temp[LOCAL_LOW] = val << 8;
val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH);
if (val < 0)
return val;
data->temp[LOCAL_HIGH] = val << 8;
val = lm90_read16(client, LM90_REG_LOCAL_TEMP,
data->reg_local_ext, true);
if (val < 0)
return val;
data->temp[LOCAL_TEMP] = val;
val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
data->reg_remote_ext, true);
if (val < 0)
return val;
data->temp[REMOTE_TEMP] = val;
if (data->flags & LM90_HAVE_TEMP3) {
val = lm90_select_remote_channel(data, true);
if (val < 0)
return val;
val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
data->reg_remote_ext, true);
if (val < 0) {
lm90_select_remote_channel(data, false);
return val;
}
data->temp[REMOTE2_TEMP] = val;
lm90_select_remote_channel(data, false);
}
val = lm90_update_alarms_locked(data, false);
if (val < 0)
return val;
data->last_updated = jiffies;
data->valid = true;
}
return 0;
}
/* pec used for devices with PEC support */
static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
char *buf)
{
struct i2c_client *client = to_i2c_client(dev);
return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
}
static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err < 0)
return err;
switch (val) {
case 0:
client->flags &= ~I2C_CLIENT_PEC;
break;
case 1:
client->flags |= I2C_CLIENT_PEC;
break;
default:
return -EINVAL;
}
return count;
}
static DEVICE_ATTR_RW(pec);
static int lm90_temp_get_resolution(struct lm90_data *data, int index)
{
switch (index) {
case REMOTE_TEMP:
if (data->reg_remote_ext)
return data->resolution;
return 8;
case REMOTE_OFFSET:
case REMOTE2_OFFSET:
case REMOTE2_TEMP:
return data->resolution;
case LOCAL_TEMP:
if (data->reg_local_ext)
return data->resolution;
return 8;
case REMOTE_LOW:
case REMOTE_HIGH:
case REMOTE2_LOW:
case REMOTE2_HIGH:
if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
return data->resolution;
return 8;
default:
return 8;
}
}
static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution)
{
int val;
if (flags & LM90_HAVE_EXTENDED_TEMP)
val = regval - 0x4000;
else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED))
val = regval;
else
val = (s16)regval;
return ((val >> (16 - resolution)) * 1000) >> (resolution - 8);
}
static int lm90_get_temp(struct lm90_data *data, int index, int channel)
{
int temp = lm90_temp_from_reg(data->flags, data->temp[index],
lm90_temp_get_resolution(data, index));
/* +16 degrees offset for remote temperature on LM99 */
if (data->kind == lm99 && channel)
temp += 16000;
return temp;
}
static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution)
{
int fraction = resolution > 8 ?
1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0;
if (flags & LM90_HAVE_EXTENDED_TEMP) {
val = clamp_val(val, -64000, 191000 + fraction);
val += 64000;
} else if (flags & LM90_HAVE_EXT_UNSIGNED) {
val = clamp_val(val, 0, 255000 + fraction);
} else if (flags & LM90_HAVE_UNSIGNED_TEMP) {
val = clamp_val(val, 0, 127000 + fraction);
} else {
val = clamp_val(val, -128000, 127000 + fraction);
}
return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution);
}
static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val)
{
static const u8 regs[] = {
[LOCAL_LOW] = LM90_REG_LOCAL_LOW,
[LOCAL_HIGH] = LM90_REG_LOCAL_HIGH,
[LOCAL_CRIT] = LM90_REG_LOCAL_CRIT,
[REMOTE_CRIT] = LM90_REG_REMOTE_CRIT,
[LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG,
[REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG,
[REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT,
[REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG,
[REMOTE_LOW] = LM90_REG_REMOTE_LOWH,
[REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH,
[REMOTE2_LOW] = LM90_REG_REMOTE_LOWH,
[REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH,
};
struct i2c_client *client = data->client;
u8 regh = regs[index];
u8 regl = 0;
int err;
if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) {
if (index == REMOTE_LOW || index == REMOTE2_LOW)
regl = LM90_REG_REMOTE_LOWL;
else if (index == REMOTE_HIGH || index == REMOTE2_HIGH)
regl = LM90_REG_REMOTE_HIGHL;
}
/* +16 degrees offset for remote temperature on LM99 */
if (data->kind == lm99 && channel) {
/* prevent integer underflow */
val = max(val, -128000l);
val -= 16000;
}
data->temp[index] = lm90_temp_to_reg(data->flags, val,
lm90_temp_get_resolution(data, index));
if (channel > 1)
lm90_select_remote_channel(data, true);
err = lm90_write16(client, regh, regl, data->temp[index]);
if (channel > 1)
lm90_select_remote_channel(data, false);
return err;
}
static int lm90_get_temphyst(struct lm90_data *data, int index, int channel)
{
int temp = lm90_get_temp(data, index, channel);
return temp - data->temp_hyst * 1000;
}
static int lm90_set_temphyst(struct lm90_data *data, long val)
{
int temp = lm90_get_temp(data, LOCAL_CRIT, 0);
/* prevent integer overflow/underflow */
val = clamp_val(val, -128000l, 255000l);
data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31);
return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst);
}
static int lm90_get_temp_offset(struct lm90_data *data, int index)
{
int res = lm90_temp_get_resolution(data, index);
return lm90_temp_from_reg(0, data->temp[index], res);
}
static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val)
{
int err;
val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index));
/* For ADT7481 we can use the same registers for remote channel 1 and 2 */
if (channel > 1)
lm90_select_remote_channel(data, true);
err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val);
if (channel > 1)
lm90_select_remote_channel(data, false);
if (err)
return err;
data->temp[index] = val;
return 0;
}
static const u8 lm90_temp_index[MAX_CHANNELS] = {
LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
};
static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
};
static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
};
static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
};
static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
};
static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
-1, REMOTE_OFFSET, REMOTE2_OFFSET
};
static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };
static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };
static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };
static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };
static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };
static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
{
struct lm90_data *data = dev_get_drvdata(dev);
int err;
u16 bit;
mutex_lock(&data->update_lock);
err = lm90_update_device(dev);
mutex_unlock(&data->update_lock);
if (err)
return err;
switch (attr) {
case hwmon_temp_input:
*val = lm90_get_temp(data, lm90_temp_index[channel], channel);
break;
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
case hwmon_temp_emergency_alarm:
case hwmon_temp_fault:
switch (attr) {
case hwmon_temp_min_alarm:
bit = lm90_min_alarm_bits[channel];
break;
case hwmon_temp_max_alarm:
bit = lm90_max_alarm_bits[channel];
break;
case hwmon_temp_crit_alarm:
if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
bit = lm90_crit_alarm_bits_swapped[channel];
else
bit = lm90_crit_alarm_bits[channel];
break;
case hwmon_temp_emergency_alarm:
bit = lm90_emergency_alarm_bits[channel];
break;
case hwmon_temp_fault:
bit = lm90_fault_bits[channel];
break;
}
*val = !!(data->alarms & bit);
data->alarms &= ~bit;
data->alarms |= data->current_alarms;
break;
case hwmon_temp_min:
*val = lm90_get_temp(data, lm90_temp_min_index[channel], channel);
break;
case hwmon_temp_max:
*val = lm90_get_temp(data, lm90_temp_max_index[channel], channel);
break;
case hwmon_temp_crit:
*val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel);
break;
case hwmon_temp_crit_hyst:
*val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel);
break;
case hwmon_temp_emergency:
*val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel);
break;
case hwmon_temp_emergency_hyst:
*val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel);
break;
case hwmon_temp_offset:
*val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]);
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
{
struct lm90_data *data = dev_get_drvdata(dev);
int err;
mutex_lock(&data->update_lock);
err = lm90_update_device(dev);
if (err)
goto error;
switch (attr) {
case hwmon_temp_min:
err = lm90_set_temp(data, lm90_temp_min_index[channel],
channel, val);
break;
case hwmon_temp_max:
err = lm90_set_temp(data, lm90_temp_max_index[channel],
channel, val);
break;
case hwmon_temp_crit:
err = lm90_set_temp(data, lm90_temp_crit_index[channel],
channel, val);
break;
case hwmon_temp_crit_hyst:
err = lm90_set_temphyst(data, val);
break;
case hwmon_temp_emergency:
err = lm90_set_temp(data, lm90_temp_emerg_index[channel],
channel, val);
break;
case hwmon_temp_offset:
err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel],
channel, val);
break;
default:
err = -EOPNOTSUPP;
break;
}
error:
mutex_unlock(&data->update_lock);
return err;
}
static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
{
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
case hwmon_temp_emergency_alarm:
case hwmon_temp_emergency_hyst:
case hwmon_temp_fault:
case hwmon_temp_label:
return 0444;
case hwmon_temp_min:
case hwmon_temp_max:
case hwmon_temp_crit:
case hwmon_temp_emergency:
case hwmon_temp_offset:
return 0644;
case hwmon_temp_crit_hyst:
if (channel == 0)
return 0644;
return 0444;
default:
return 0;
}
}
static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
{
struct lm90_data *data = dev_get_drvdata(dev);
int err;
mutex_lock(&data->update_lock);
err = lm90_update_device(dev);
mutex_unlock(&data->update_lock);
if (err)
return err;
switch (attr) {
case hwmon_chip_update_interval:
*val = data->update_interval;
break;
case hwmon_chip_alarms:
*val = data->alarms;
break;
case hwmon_chip_temp_samples:
if (data->faultqueue_mask) {
*val = (data->config & data->faultqueue_mask) ?
data->faultqueue_depth : 1;
} else {
switch (data->conalert & 0x0e) {
case 0x0:
default:
*val = 1;
break;
case 0x2:
*val = 2;
break;
case 0x6:
*val = 3;
break;
case 0xe:
*val = 4;
break;
}
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
{
struct lm90_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int err;
mutex_lock(&data->update_lock);
err = lm90_update_device(dev);
if (err)
goto error;
switch (attr) {
case hwmon_chip_update_interval:
err = lm90_set_convrate(client, data,
clamp_val(val, 0, 100000));
break;
case hwmon_chip_temp_samples:
err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4));
break;
default:
err = -EOPNOTSUPP;
break;
}
error:
mutex_unlock(&data->update_lock);
return err;
}
static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
{
switch (attr) {
case hwmon_chip_update_interval:
case hwmon_chip_temp_samples:
return 0644;
case hwmon_chip_alarms:
return 0444;
default:
return 0;
}
}
static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_chip:
return lm90_chip_read(dev, attr, channel, val);
case hwmon_temp:
return lm90_temp_read(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
struct lm90_data *data = dev_get_drvdata(dev);
*str = data->channel_label[channel];
return 0;
}
static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_chip:
return lm90_chip_write(dev, attr, channel, val);
case hwmon_temp:
return lm90_temp_write(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_chip:
return lm90_chip_is_visible(data, attr, channel);
case hwmon_temp:
return lm90_temp_is_visible(data, attr, channel);
default:
return 0;
}
}
static const char *lm90_detect_lm84(struct i2c_client *client)
{
static const u8 regs[] = {
LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH,
LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH
};
int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
int reg1, reg2, reg3, reg4;
bool nonzero = false;
u8 ff = 0xff;
int i;
if (status < 0 || (status & 0xab))
return NULL;
/*
* For LM84, undefined registers return the most recent value.
* Repeat several times, each time checking against a different
* (presumably) existing register.
*/
for (i = 0; i < ARRAY_SIZE(regs); i++) {
reg1 = i2c_smbus_read_byte_data(client, regs[i]);
reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL);
reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
if (reg1 < 0)
return NULL;
/* If any register has a different value, this is not an LM84 */
if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1)
return NULL;
nonzero |= reg1 || reg2 || reg3 || reg4;
ff &= reg1;
}
/*
* If all registers always returned 0 or 0xff, all bets are off,
* and we can not make any predictions about the chip type.
*/
return nonzero && ff != 0xff ? "lm84" : NULL;
}
static const char *lm90_detect_max1617(struct i2c_client *client, int config1)
{
int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
int llo, rlo, lhi, rhi;
if (status < 0 || (status & 0x03))
return NULL;
if (config1 & 0x3f)
return NULL;
/*
* Fail if unsupported registers return anything but 0xff.
* The calling code already checked man_id and chip_id.
* A byte read operation repeats the most recent read operation
* and should also return 0xff.
*/
if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff ||
i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff ||
i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff ||
i2c_smbus_read_byte(client) != 0xff)
return NULL;
llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH);
if (llo < 0 || rlo < 0)
return NULL;
/*
* A byte read operation repeats the most recent read and should
* return the same value.
*/
if (i2c_smbus_read_byte(client) != rhi)
return NULL;
/*
* The following two checks are marginal since the checked values
* are strictly speaking valid.
*/
/* fail for negative high limits; this also catches read errors */
if ((s8)lhi < 0 || (s8)rhi < 0)
return NULL;
/* fail if low limits are larger than or equal to high limits */
if ((s8)llo >= lhi || (s8)rlo >= rhi)
return NULL;
if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
/*
* Word read operations return 0xff in second byte
*/
if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) !=
0xffff)
return NULL;
if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) !=
(config1 | 0xff00))
return NULL;
if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) !=
(lhi | 0xff00))
return NULL;
}
return "max1617";
}
static const char *lm90_detect_national(struct i2c_client *client, int chip_id,
int config1, int convrate)
{
int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
int address = client->addr;
const char *name = NULL;
if (config2 < 0)
return NULL;
if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09)
return NULL;
if (address != 0x4c && address != 0x4d)
return NULL;
switch (chip_id & 0xf0) {
case 0x10: /* LM86 */
if (address == 0x4c)
name = "lm86";
break;
case 0x20: /* LM90 */
if (address == 0x4c)
name = "lm90";
break;
case 0x30: /* LM89/LM99 */
name = "lm99"; /* detect LM89 as LM99 */
break;
default:
break;
}
return name;
}
static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1,
int convrate)
{
int address = client->addr;
const char *name = NULL;
switch (chip_id) {
case 0xca: /* NCT218 */
if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
convrate <= 0x0a)
name = "nct218";
break;
default:
break;
}
return name;
}
static const char *lm90_detect_analog(struct i2c_client *client, bool common_address,
int chip_id, int config1, int convrate)
{
int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2);
int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID);
int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID);
int address = client->addr;
const char *name = NULL;
if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0)
return NULL;
/*
* The following chips should be detected by this function. Known
* register values are listed. Registers 0x3d .. 0x3e are undocumented
* for most of the chips, yet appear to return a well defined value.
* Register 0xff is undocumented for some of the chips. Register 0x3f
* is undocumented for all chips, but also returns a well defined value.
* Values are as reported from real chips unless mentioned otherwise.
* The code below checks values for registers 0x3d, 0x3e, and 0xff,
* but not for register 0x3f.
*
* Chip Register
* 3d 3e 3f fe ff Notes
* ----------------------------------------------------------
* adm1020 00 00 00 41 39
* adm1021 00 00 00 41 03
* adm1021a 00 00 00 41 3c
* adm1023 00 00 00 41 3c same as adm1021a
* adm1032 00 00 00 41 42
*
* adt7421 21 41 04 41 04
* adt7461 00 00 00 41 51
* adt7461a 61 41 05 41 57
* adt7481 81 41 02 41 62
* adt7482 - - - 41 65 datasheet
* 82 41 05 41 75 real chip
* adt7483 83 41 04 41 94
*
* nct72 61 41 07 41 55
* nct210 00 00 00 41 3f
* nct214 61 41 08 41 5a
* nct1008 - - - 41 57 datasheet rev. 3
* 61 41 06 41 54 real chip
*
* nvt210 - - - 41 - datasheet
* nvt211 - - - 41 - datasheet
*/
switch (chip_id) {
case 0x00 ... 0x03: /* ADM1021 */
case 0x05 ... 0x0f:
if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
!(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
name = "adm1021";
break;
case 0x04: /* ADT7421 (undocumented) */
if (man_id2 == 0x41 && chip_id2 == 0x21 &&
(address == 0x4c || address == 0x4d) &&
(config1 & 0x0b) == 0x08 && convrate <= 0x0a)
name = "adt7421";
break;
case 0x30 ... 0x38: /* ADM1021A, ADM1023 */
case 0x3a ... 0x3e:
/*
* ADM1021A and compatible chips will be mis-detected as
* ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both
* found to have a Chip ID of 0x3c.
* ADM1021A does not officially support low byte registers
* (0x12 .. 0x14), but a chip labeled ADM1021A does support it.
* Official support for the temperature offset high byte
* register (0x11) was added to revision F of the ADM1021A
* datasheet.
* It is currently unknown if there is a means to distinguish
* ADM1021A from ADM1023, and/or if revisions of ADM1021A exist
* which differ in functionality from ADM1023.
*/
if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
!(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
name = "adm1023";
break;
case 0x39: /* ADM1020 (undocumented) */
if (man_id2 == 0x00 && chip_id2 == 0x00 &&
(address == 0x4c || address == 0x4d || address == 0x4e) &&
!(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
name = "adm1020";
break;
case 0x3f: /* NCT210 */
if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
!(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
name = "nct210";
break;
case 0x40 ... 0x4f: /* ADM1032 */
if (man_id2 == 0x00 && chip_id2 == 0x00 &&
(address == 0x4c || address == 0x4d) && !(config1 & 0x3f) &&
convrate <= 0x0a)
name = "adm1032";
break;
case 0x51: /* ADT7461 */
if (man_id2 == 0x00 && chip_id2 == 0x00 &&
(address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
convrate <= 0x0a)
name = "adt7461";
break;
case 0x54: /* NCT1008 */
if (man_id2 == 0x41 && chip_id2 == 0x61 &&
(address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
convrate <= 0x0a)
name = "nct1008";
break;
case 0x55: /* NCT72 */
if (man_id2 == 0x41 && chip_id2 == 0x61 &&
(address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
convrate <= 0x0a)
name = "nct72";
break;
case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */
if (man_id2 == 0x41 && chip_id2 == 0x61 &&
(address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
convrate <= 0x0a)
name = "adt7461a";
break;
case 0x5a: /* NCT214 */
if (man_id2 == 0x41 && chip_id2 == 0x61 &&
common_address && !(config1 & 0x1b) && convrate <= 0x0a)
name = "nct214";
break;
case 0x62: /* ADT7481, undocumented */
if (man_id2 == 0x41 && chip_id2 == 0x81 &&
(address == 0x4b || address == 0x4c) && !(config1 & 0x10) &&
!(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) {
name = "adt7481";
}
break;
case 0x65: /* ADT7482, datasheet */
case 0x75: /* ADT7482, real chip */
if (man_id2 == 0x41 && chip_id2 == 0x82 &&
address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) &&
convrate <= 0x0a)
name = "adt7482";
break;
case 0x94: /* ADT7483 */
if (man_id2 == 0x41 && chip_id2 == 0x83 &&
common_address &&
((address >= 0x18 && address <= 0x1a) ||
(address >= 0x29 && address <= 0x2b) ||
(address >= 0x4c && address <= 0x4e)) &&
!(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a)
name = "adt7483a";
break;
default:
break;
}
return name;
}
static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address,
int chip_id, int config1, int convrate)
{
int man_id, emerg, emerg2, status2;
int address = client->addr;
const char *name = NULL;
switch (chip_id) {
case 0x01:
if (!common_address)
break;
/*
* We read MAX6659_REG_REMOTE_EMERG twice, and re-read
* LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG
* exists, both readings will reflect the same value. Otherwise,
* the readings will be different.
*/
emerg = i2c_smbus_read_byte_data(client,
MAX6659_REG_REMOTE_EMERG);
man_id = i2c_smbus_read_byte_data(client,
LM90_REG_MAN_ID);
emerg2 = i2c_smbus_read_byte_data(client,
MAX6659_REG_REMOTE_EMERG);
status2 = i2c_smbus_read_byte_data(client,
MAX6696_REG_STATUS2);
if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
return NULL;
/*
* Even though MAX6695 and MAX6696 do not have a chip ID
* register, reading it returns 0x01. Bit 4 of the config1
* register is unused and should return zero when read. Bit 0 of
* the status2 register is unused and should return zero when
* read.
*
* MAX6695 and MAX6696 have an additional set of temperature
* limit registers. We can detect those chips by checking if
* one of those registers exists.
*/
if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 &&
convrate <= 0x07)
name = "max6696";
/*
* The chip_id register of the MAX6680 and MAX6681 holds the
* revision of the chip. The lowest bit of the config1 register
* is unused and should return zero when read, so should the
* second to last bit of config1 (software reset). Register
* address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and
* should differ from emerg2, and emerg2 should match man_id
* since it does not exist.
*/
else if (!(config1 & 0x03) && convrate <= 0x07 &&
emerg2 == man_id && emerg2 != status2)
name = "max6680";
/*
* MAX1617A does not have any extended registers (register
* address 0x10 or higher) except for manufacturer and
* device ID registers. Unlike other chips of this series,
* unsupported registers were observed to return a fixed value
* of 0x01.
* Note: Multiple chips with different markings labeled as
* "MAX1617" (no "A") were observed to report manufacturer ID
* 0x4d and device ID 0x01. It is unknown if other variants of
* MAX1617/MAX617A with different behavior exist. The detection
* code below works for those chips.
*/
else if (!(config1 & 0x03f) && convrate <= 0x07 &&
emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01)
name = "max1617";
break;
case 0x08:
/*
* The chip_id of the MAX6654 holds the revision of the chip.
* The lowest 3 bits of the config1 register are unused and
* should return zero when read.
*/
if (common_address && !(config1 & 0x07) && convrate <= 0x07)
name = "max6654";
break;
case 0x09:
/*
* The chip_id of the MAX6690 holds the revision of the chip.
* The lowest 3 bits of the config1 register are unused and
* should return zero when read.
* Note that MAX6654 and MAX6690 are practically the same chips.
* The only diference is the rated accuracy. Rev. 1 of the
* MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled
* MAX6654 was observed to have a chip ID of 0x09.
*/
if (common_address && !(config1 & 0x07) && convrate <= 0x07)
name = "max6690";
break;
case 0x4d:
/*
* MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
* register. Reading from that address will return the last
* read value, which in our case is those of the man_id
* register, or 0x4d.
* MAX6642 does not have a conversion rate register, nor low
* limit registers. Reading from those registers returns the
* last read value.
*
* For MAX6657, MAX6658 and MAX6659, the config1 register lacks
* a low nibble, so the value will be those of the previous
* read, so in our case again those of the man_id register.
* MAX6659 has a third set of upper temperature limit registers.
* Those registers also return values on MAX6657 and MAX6658,
* thus the only way to detect MAX6659 is by its address.
* For this reason it will be mis-detected as MAX6657 if its
* address is 0x4c.
*/
if (address >= 0x48 && address <= 0x4f && config1 == convrate &&
!(config1 & 0x0f)) {
int regval;
/*
* We know that this is not a MAX6657/58/59 because its
* configuration register has the wrong value and it does
* not appear to have a conversion rate register.
*/
/* re-read manufacturer ID to have a good baseline */
if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d)
break;
/* check various non-existing registers */
if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d ||
i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d ||
i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d)
break;
/* check for unused status register bits */
regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
if (regval < 0 || (regval & 0x2b))
break;
/* re-check unsupported registers */
if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval ||
i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval ||
i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval)
break;
name = "max6642";
} else if ((address == 0x4c || address == 0x4d || address == 0x4e) &&
(config1 & 0x1f) == 0x0d && convrate <= 0x09) {
if (address == 0x4c)
name = "max6657";
else
name = "max6659";
}
break;
case 0x59:
/*
* The chip_id register of the MAX6646/6647/6649 holds the
* revision of the chip. The lowest 6 bits of the config1
* register are unused and should return zero when read.
* The I2C address of MAX6648/6692 is fixed at 0x4c.
* MAX6646 is at address 0x4d, MAX6647 is at address 0x4e,
* and MAX6649 is at address 0x4c. A slight difference between
* the two sets of chips is that the remote temperature register
* reports different values if the DXP pin is open or shorted.
* We can use that information to help distinguish between the
* chips. MAX6648 will be mis-detected as MAX6649 if the remote
* diode is connected, but there isn't really anything we can
* do about that.
*/
if (!(config1 & 0x3f) && convrate <= 0x07) {
int temp;
switch (address) {
case 0x4c:
/*
* MAX6649 reports an external temperature
* value of 0xff if DXP is open or shorted.
* MAX6648 reports 0x80 in that case.
*/
temp = i2c_smbus_read_byte_data(client,
LM90_REG_REMOTE_TEMPH);
if (temp == 0x80)
name = "max6648";
else
name = "max6649";
break;
case 0x4d:
name = "max6646";
break;
case 0x4e:
name = "max6647";
break;
default:
break;
}
}
break;
default:
break;
}
return name;
}
static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id,
int config1, int convrate)
{
int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
int address = client->addr;
const char *name = NULL;
if (config2 < 0)
return NULL;
if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) {
if (chip_id == 0x01 && convrate <= 0x09) {
/* W83L771W/G */
name = "w83l771";
} else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) {
/* W83L771AWG/ASG */
name = "w83l771";
}
}
return name;
}
static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address,
int chip_id, int config1, int convrate)
{
int address = client->addr;
const char *name = NULL;
int config2;
switch (chip_id) {
case 0x00:
config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
if (config2 < 0)
return NULL;
if (address >= 0x48 && address <= 0x4f &&
!(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09)
name = "sa56004";
break;
case 0x80:
if (common_address && !(config1 & 0x3f) && convrate <= 0x07)
name = "ne1618";
break;
default:
break;
}
return name;
}
static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id,
int config1, int convrate)
{
int address = client->addr;
/*
* According to the datasheet, G781 is supposed to be at I2C Address
* 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C
* address 0x4d and have a chip ID of 0x03. However, when support
* for G781 was added, chips at 0x4c and 0x4d were found to have a
* chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with
* chip ID 0x03.
* To avoid detection failures, accept chip ID 0x01 and 0x03 at both
* addresses.
* G784 reports manufacturer ID 0x47 and chip ID 0x01. A public
* datasheet is not available. Extensive testing suggests that
* the chip appears to be fully compatible with G781.
* Available register dumps show that G751 also reports manufacturer
* ID 0x47 and chip ID 0x01 even though that chip does not officially
* support those registers. This makes chip detection somewhat
* vulnerable. To improve detection quality, read the offset low byte
* and alert fault queue registers and verify that only expected bits
* are set.
*/
if ((chip_id == 0x01 || chip_id == 0x03) &&
(address == 0x4c || address == 0x4d) &&
!(config1 & 0x3f) && convrate <= 0x08) {
int reg;
reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL);
if (reg < 0 || reg & 0x1f)
return NULL;
reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT);
if (reg < 0 || reg & 0xf1)
return NULL;
return "g781";
}
return NULL;
}
static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address,
int chip_id, int config1, int convrate)
{
if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) {
/* THMC10: Unsupported registers return 0xff */
if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff &&
i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff)
return "thmc10";
}
return NULL;
}
static const char *lm90_detect_ti(struct i2c_client *client, int chip_id,
int config1, int convrate)
{
int address = client->addr;
const char *name = NULL;
if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) {
int local_ext, conalert, chen, dfc;
local_ext = i2c_smbus_read_byte_data(client,
TMP451_REG_LOCAL_TEMPL);
conalert = i2c_smbus_read_byte_data(client,
TMP451_REG_CONALERT);
chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 &&
(chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) {
if (address == 0x4c && !(chen & 0x03))
name = "tmp451";
else if (address >= 0x48 && address <= 0x4f)
name = "tmp461";
}
}
return name;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int man_id, chip_id, config1, convrate, lhigh;
const char *name = NULL;
int address = client->addr;
bool common_address =
(address >= 0x18 && address <= 0x1a) ||
(address >= 0x29 && address <= 0x2b) ||
(address >= 0x4c && address <= 0x4e);
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/*
* Get well defined register value for chips with neither man_id nor
* chip_id registers.
*/
lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
/* detection and identification */
man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1);
convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0)
return -ENODEV;
/* Bail out immediately if all register report the same value */
if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate)
return -ENODEV;
/*
* If reading man_id and chip_id both return the same value as lhigh,
* the chip may not support those registers and return the most recent read
* value. Check again with a different register and handle accordingly.
*/
if (man_id == lhigh && chip_id == lhigh) {
convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
if (convrate < 0 || man_id < 0 || chip_id < 0)
return -ENODEV;
if (man_id == convrate && chip_id == convrate)
man_id = -1;
}
switch (man_id) {
case -1: /* Chip does not support man_id / chip_id */
if (common_address && !convrate && !(config1 & 0x7f))
name = lm90_detect_lm84(client);
break;
case 0x01: /* National Semiconductor */
name = lm90_detect_national(client, chip_id, config1, convrate);
break;
case 0x1a: /* ON */
name = lm90_detect_on(client, chip_id, config1, convrate);
break;
case 0x23: /* Genesys Logic */
if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
name = "gl523sm";
break;
case 0x41: /* Analog Devices */
name = lm90_detect_analog(client, common_address, chip_id, config1,
convrate);
break;
case 0x47: /* GMT */
name = lm90_detect_gmt(client, chip_id, config1, convrate);
break;
case 0x49: /* TI */
name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate);
break;
case 0x4d: /* Maxim Integrated */
name = lm90_detect_maxim(client, common_address, chip_id,
config1, convrate);
break;
case 0x54: /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */
if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
name = "mc1066";
break;
case 0x55: /* TI */
name = lm90_detect_ti(client, chip_id, config1, convrate);
break;
case 0x5c: /* Winbond/Nuvoton */
name = lm90_detect_nuvoton(client, chip_id, config1, convrate);
break;
case 0xa1: /* NXP Semiconductor/Philips */
name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate);
break;
case 0xff: /* MAX1617, G767, NE1617 */
if (common_address && chip_id == 0xff && convrate < 8)
name = lm90_detect_max1617(client, config1);
break;
default:
break;
}
if (!name) { /* identification failed */
dev_dbg(&adapter->dev,
"Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n",
client->addr, man_id, chip_id);
return -ENODEV;
}
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static void lm90_restore_conf(void *_data)
{
struct lm90_data *data = _data;
struct i2c_client *client = data->client;
cancel_delayed_work_sync(&data->alert_work);
cancel_work_sync(&data->report_work);
/* Restore initial configuration */
if (data->flags & LM90_HAVE_CONVRATE)
lm90_write_convrate(data, data->convrate_orig);
lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig);
}
static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
{
struct device_node *np = client->dev.of_node;
int config, convrate;
if (data->flags & LM90_HAVE_CONVRATE) {
convrate = lm90_read_reg(client, LM90_REG_CONVRATE);
if (convrate < 0)
return convrate;
data->convrate_orig = convrate;
lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
} else {
data->update_interval = 500;
}
/*
* Start the conversions.
*/
config = lm90_read_reg(client, LM90_REG_CONFIG1);
if (config < 0)
return config;
data->config_orig = config;
data->config = config;
/* Check Temperature Range Select */
if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
if (of_property_read_bool(np, "ti,extended-range-enable"))
config |= 0x04;
if (!(config & 0x04))
data->flags &= ~LM90_HAVE_EXTENDED_TEMP;
}
/*
* Put MAX6680/MAX8881 into extended resolution (bit 0x10,
* 0.125 degree resolution) and range (0x08, extend range
* to -64 degree) mode for the remote temperature sensor.
* Note that expeciments with an actual chip do not show a difference
* if bit 3 is set or not.
*/
if (data->kind == max6680)
config |= 0x18;
/*
* Put MAX6654 into extended range (0x20, extend minimum range from
* 0 degrees to -64 degrees). Note that extended resolution is not
* possible on the MAX6654 unless conversion rate is set to 1 Hz or
* slower, which is intentionally not done by default.
*/
if (data->kind == max6654)
config |= 0x20;
/*
* Select external channel 0 for devices with three sensors
*/
if (data->flags & LM90_HAVE_TEMP3)
config &= ~0x08;
/*
* Interrupt is enabled by default on reset, but it may be disabled
* by bootloader, unmask it.
*/
if (client->irq)
config &= ~0x80;
config &= 0xBF; /* run */
lm90_update_confreg(data, config);
return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
}
static bool lm90_is_tripped(struct i2c_client *client)
{
struct lm90_data *data = i2c_get_clientdata(client);
int ret;
ret = lm90_update_alarms(data, true);
if (ret < 0)
return false;
return !!data->current_alarms;
}
static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
{
struct i2c_client *client = dev_id;
if (lm90_is_tripped(client))
return IRQ_HANDLED;
else
return IRQ_NONE;
}
static void lm90_remove_pec(void *dev)
{
device_remove_file(dev, &dev_attr_pec);
}
static int lm90_probe_channel_from_dt(struct i2c_client *client,
struct device_node *child,
struct lm90_data *data)
{
u32 id;
s32 val;
int err;
struct device *dev = &client->dev;
err = of_property_read_u32(child, "reg", &id);
if (err) {
dev_err(dev, "missing reg property of %pOFn\n", child);
return err;
}
if (id >= MAX_CHANNELS) {
dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child);
return -EINVAL;
}
err = of_property_read_string(child, "label", &data->channel_label[id]);
if (err == -ENODATA || err == -EILSEQ) {
dev_err(dev, "invalid label property in %pOFn\n", child);
return err;
}
if (data->channel_label[id])
data->channel_config[id] |= HWMON_T_LABEL;
err = of_property_read_s32(child, "temperature-offset-millicelsius", &val);
if (!err) {
if (id == 0) {
dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n");
return -EINVAL;
}
err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val);
if (err) {
dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n",
val, id, err);
return err;
}
}
return 0;
}
static int lm90_parse_dt_channel_info(struct i2c_client *client,
struct lm90_data *data)
{
int err;
struct device_node *child;
struct device *dev = &client->dev;
const struct device_node *np = dev->of_node;
for_each_child_of_node(np, child) {
if (strcmp(child->name, "channel"))
continue;
err = lm90_probe_channel_from_dt(client, child, data);
if (err) {
of_node_put(child);
return err;
}
}
return 0;
}
static const struct hwmon_ops lm90_ops = {
.is_visible = lm90_is_visible,
.read = lm90_read,
.read_string = lm90_read_string,
.write = lm90_write,
};
static int lm90_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct i2c_adapter *adapter = client->adapter;
struct hwmon_channel_info *info;
struct device *hwmon_dev;
struct lm90_data *data;
int err;
err = devm_regulator_get_enable(dev, "vcc");
if (err)
return dev_err_probe(dev, err, "Failed to enable regulator\n");
data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);
INIT_WORK(&data->report_work, lm90_report_alarms);
/* Set the device type */
if (client->dev.of_node)
data->kind = (uintptr_t)of_device_get_match_data(&client->dev);
else
data->kind = i2c_match_id(lm90_id, client)->driver_data;
/*
* Different devices have different alarm bits triggering the
* ALERT# output
*/
data->alert_alarms = lm90_params[data->kind].alert_alarms;
data->resolution = lm90_params[data->kind].resolution ? : 11;
/* Set chip capabilities */
data->flags = lm90_params[data->kind].flags;
if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) &&
!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC))
data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC);
if ((data->flags & LM90_HAVE_PARTIAL_PEC) &&
!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
data->flags &= ~LM90_HAVE_PARTIAL_PEC;
data->chip.ops = &lm90_ops;
data->chip.info = data->info;
data->info[0] = &data->chip_info;
info = &data->chip_info;
info->type = hwmon_chip;
info->config = data->chip_config;
data->chip_config[0] = HWMON_C_REGISTER_TZ;
if (data->flags & LM90_HAVE_ALARMS)
data->chip_config[0] |= HWMON_C_ALARMS;
if (data->flags & LM90_HAVE_CONVRATE)
data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL;
if (data->flags & LM90_HAVE_FAULTQUEUE)
data->chip_config[0] |= HWMON_C_TEMP_SAMPLES;
data->info[1] = &data->temp_info;
info = &data->temp_info;
info->type = hwmon_temp;
info->config = data->channel_config;
data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX |
HWMON_T_MAX_ALARM;
data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX |
HWMON_T_MAX_ALARM | HWMON_T_FAULT;
if (data->flags & LM90_HAVE_LOW) {
data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
}
if (data->flags & LM90_HAVE_CRIT) {
data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
}
if (data->flags & LM90_HAVE_OFFSET)
data->channel_config[1] |= HWMON_T_OFFSET;
if (data->flags & LM90_HAVE_EMERGENCY) {
data->channel_config[0] |= HWMON_T_EMERGENCY |
HWMON_T_EMERGENCY_HYST;
data->channel_config[1] |= HWMON_T_EMERGENCY |
HWMON_T_EMERGENCY_HYST;
}
if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
}
if (data->flags & LM90_HAVE_TEMP3) {
data->channel_config[2] = HWMON_T_INPUT |
HWMON_T_MIN | HWMON_T_MAX |
HWMON_T_CRIT | HWMON_T_CRIT_HYST |
HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
if (data->flags & LM90_HAVE_EMERGENCY) {
data->channel_config[2] |= HWMON_T_EMERGENCY |
HWMON_T_EMERGENCY_HYST;
}
if (data->flags & LM90_HAVE_EMERGENCY_ALARM)
data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM;
if (data->flags & LM90_HAVE_OFFSET)
data->channel_config[2] |= HWMON_T_OFFSET;
}
data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask;
data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth;
data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
if (data->flags & LM90_HAVE_REMOTE_EXT)
data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;
data->reg_status2 = lm90_params[data->kind].reg_status2;
/* Set maximum conversion rate */
data->max_convrate = lm90_params[data->kind].max_convrate;
/* Parse device-tree channel information */
if (client->dev.of_node) {
err = lm90_parse_dt_channel_info(client, data);
if (err)
return err;
}
/* Initialize the LM90 chip */
err = lm90_init_client(client, data);
if (err < 0) {
dev_err(dev, "Failed to initialize device\n");
return err;
}
/*
* The 'pec' attribute is attached to the i2c device and thus created
* separately.
*/
if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) {
err = device_create_file(dev, &dev_attr_pec);
if (err)
return err;
err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
if (err)
return err;
}
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data, &data->chip,
NULL);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
data->hwmon_dev = hwmon_dev;
if (client->irq) {
dev_dbg(dev, "IRQ: %d\n", client->irq);
err = devm_request_threaded_irq(dev, client->irq,
NULL, lm90_irq_thread,
IRQF_ONESHOT, "lm90", client);
if (err < 0) {
dev_err(dev, "cannot request IRQ %d\n", client->irq);
return err;
}
}
return 0;
}
static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
unsigned int flag)
{
if (type != I2C_PROTOCOL_SMBUS_ALERT)
return;
if (lm90_is_tripped(client)) {
/*
* Disable ALERT# output, because these chips don't implement
* SMBus alert correctly; they should only hold the alert line
* low briefly.
*/
struct lm90_data *data = i2c_get_clientdata(client);
if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
(data->current_alarms & data->alert_alarms)) {
if (!(data->config & 0x80)) {
dev_dbg(&client->dev, "Disabling ALERT#\n");
lm90_update_confreg(data, data->config | 0x80);
}
schedule_delayed_work(&data->alert_work,
max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
}
} else {
dev_dbg(&client->dev, "Everything OK\n");
}
}
static int lm90_suspend(struct device *dev)
{
struct lm90_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
if (client->irq)
disable_irq(client->irq);
return 0;
}
static int lm90_resume(struct device *dev)
{
struct lm90_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
if (client->irq)
enable_irq(client->irq);
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
static struct i2c_driver lm90_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm90",
.of_match_table = of_match_ptr(lm90_of_match),
.pm = pm_sleep_ptr(&lm90_pm_ops),
},
.probe = lm90_probe,
.alert = lm90_alert,
.id_table = lm90_id,
.detect = lm90_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm90_driver);
MODULE_AUTHOR("Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("LM90/ADM1032 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm90.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* gl520sm.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (c) 1998, 1999 Frodo Looijaard <[email protected]>,
* Kyösti Mälkki <[email protected]>
* Copyright (c) 2005 Maarten Deprez <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
/* Type of the extra sensor */
static unsigned short extra_sensor_type;
module_param(extra_sensor_type, ushort, 0);
MODULE_PARM_DESC(extra_sensor_type, "Type of extra sensor (0=autodetect, 1=temperature, 2=voltage)");
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };
/*
* Many GL520 constants specified below
* One of the inputs can be configured as either temp or voltage.
* That's why _TEMP2 and _IN4 access the same register
*/
/* The GL520 registers */
#define GL520_REG_CHIP_ID 0x00
#define GL520_REG_REVISION 0x01
#define GL520_REG_CONF 0x03
#define GL520_REG_MASK 0x11
#define GL520_REG_VID_INPUT 0x02
static const u8 GL520_REG_IN_INPUT[] = { 0x15, 0x14, 0x13, 0x0d, 0x0e };
static const u8 GL520_REG_IN_LIMIT[] = { 0x0c, 0x09, 0x0a, 0x0b };
static const u8 GL520_REG_IN_MIN[] = { 0x0c, 0x09, 0x0a, 0x0b, 0x18 };
static const u8 GL520_REG_IN_MAX[] = { 0x0c, 0x09, 0x0a, 0x0b, 0x17 };
static const u8 GL520_REG_TEMP_INPUT[] = { 0x04, 0x0e };
static const u8 GL520_REG_TEMP_MAX[] = { 0x05, 0x17 };
static const u8 GL520_REG_TEMP_MAX_HYST[] = { 0x06, 0x18 };
#define GL520_REG_FAN_INPUT 0x07
#define GL520_REG_FAN_MIN 0x08
#define GL520_REG_FAN_DIV 0x0f
#define GL520_REG_FAN_OFF GL520_REG_FAN_DIV
#define GL520_REG_ALARMS 0x12
#define GL520_REG_BEEP_MASK 0x10
#define GL520_REG_BEEP_ENABLE GL520_REG_CONF
/* Client data */
struct gl520_data {
struct i2c_client *client;
const struct attribute_group *groups[3];
struct mutex update_lock;
bool valid; /* false until the following fields are valid */
unsigned long last_updated; /* in jiffies */
u8 vid;
u8 vrm;
u8 in_input[5]; /* [0] = VVD */
u8 in_min[5]; /* [0] = VDD */
u8 in_max[5]; /* [0] = VDD */
u8 fan_input[2];
u8 fan_min[2];
u8 fan_div[2];
u8 fan_off;
u8 temp_input[2];
u8 temp_max[2];
u8 temp_max_hyst[2];
u8 alarms;
u8 beep_enable;
u8 beep_mask;
u8 alarm_mask;
u8 two_temps;
};
/*
* Registers 0x07 to 0x0c are word-sized, others are byte-sized
* GL520 uses a high-byte first convention
*/
static int gl520_read_value(struct i2c_client *client, u8 reg)
{
if ((reg >= 0x07) && (reg <= 0x0c))
return i2c_smbus_read_word_swapped(client, reg);
else
return i2c_smbus_read_byte_data(client, reg);
}
static int gl520_write_value(struct i2c_client *client, u8 reg, u16 value)
{
if ((reg >= 0x07) && (reg <= 0x0c))
return i2c_smbus_write_word_swapped(client, reg, value);
else
return i2c_smbus_write_byte_data(client, reg, value);
}
static struct gl520_data *gl520_update_device(struct device *dev)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int val, i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + 2 * HZ) || !data->valid) {
dev_dbg(&client->dev, "Starting gl520sm update\n");
data->alarms = gl520_read_value(client, GL520_REG_ALARMS);
data->beep_mask = gl520_read_value(client, GL520_REG_BEEP_MASK);
data->vid = gl520_read_value(client,
GL520_REG_VID_INPUT) & 0x1f;
for (i = 0; i < 4; i++) {
data->in_input[i] = gl520_read_value(client,
GL520_REG_IN_INPUT[i]);
val = gl520_read_value(client, GL520_REG_IN_LIMIT[i]);
data->in_min[i] = val & 0xff;
data->in_max[i] = (val >> 8) & 0xff;
}
val = gl520_read_value(client, GL520_REG_FAN_INPUT);
data->fan_input[0] = (val >> 8) & 0xff;
data->fan_input[1] = val & 0xff;
val = gl520_read_value(client, GL520_REG_FAN_MIN);
data->fan_min[0] = (val >> 8) & 0xff;
data->fan_min[1] = val & 0xff;
data->temp_input[0] = gl520_read_value(client,
GL520_REG_TEMP_INPUT[0]);
data->temp_max[0] = gl520_read_value(client,
GL520_REG_TEMP_MAX[0]);
data->temp_max_hyst[0] = gl520_read_value(client,
GL520_REG_TEMP_MAX_HYST[0]);
val = gl520_read_value(client, GL520_REG_FAN_DIV);
data->fan_div[0] = (val >> 6) & 0x03;
data->fan_div[1] = (val >> 4) & 0x03;
data->fan_off = (val >> 2) & 0x01;
data->alarms &= data->alarm_mask;
val = gl520_read_value(client, GL520_REG_CONF);
data->beep_enable = !((val >> 2) & 1);
/* Temp1 and Vin4 are the same input */
if (data->two_temps) {
data->temp_input[1] = gl520_read_value(client,
GL520_REG_TEMP_INPUT[1]);
data->temp_max[1] = gl520_read_value(client,
GL520_REG_TEMP_MAX[1]);
data->temp_max_hyst[1] = gl520_read_value(client,
GL520_REG_TEMP_MAX_HYST[1]);
} else {
data->in_input[4] = gl520_read_value(client,
GL520_REG_IN_INPUT[4]);
data->in_min[4] = gl520_read_value(client,
GL520_REG_IN_MIN[4]);
data->in_max[4] = gl520_read_value(client,
GL520_REG_IN_MAX[4]);
}
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs stuff
*/
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%u\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
#define VDD_FROM_REG(val) DIV_ROUND_CLOSEST((val) * 95, 4)
#define VDD_CLAMP(val) clamp_val(val, 0, 255 * 95 / 4)
#define VDD_TO_REG(val) DIV_ROUND_CLOSEST(VDD_CLAMP(val) * 4, 95)
#define IN_FROM_REG(val) ((val) * 19)
#define IN_CLAMP(val) clamp_val(val, 0, 255 * 19)
#define IN_TO_REG(val) DIV_ROUND_CLOSEST(IN_CLAMP(val), 19)
static ssize_t in_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
u8 r = data->in_input[n];
if (n == 0)
return sprintf(buf, "%d\n", VDD_FROM_REG(r));
else
return sprintf(buf, "%d\n", IN_FROM_REG(r));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
u8 r = data->in_min[n];
if (n == 0)
return sprintf(buf, "%d\n", VDD_FROM_REG(r));
else
return sprintf(buf, "%d\n", IN_FROM_REG(r));
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
u8 r = data->in_max[n];
if (n == 0)
return sprintf(buf, "%d\n", VDD_FROM_REG(r));
else
return sprintf(buf, "%d\n", IN_FROM_REG(r));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int n = to_sensor_dev_attr(attr)->index;
u8 r;
long v;
int err;
err = kstrtol(buf, 10, &v);
if (err)
return err;
mutex_lock(&data->update_lock);
if (n == 0)
r = VDD_TO_REG(v);
else
r = IN_TO_REG(v);
data->in_min[n] = r;
if (n < 4)
gl520_write_value(client, GL520_REG_IN_MIN[n],
(gl520_read_value(client, GL520_REG_IN_MIN[n])
& ~0xff) | r);
else
gl520_write_value(client, GL520_REG_IN_MIN[n], r);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int n = to_sensor_dev_attr(attr)->index;
u8 r;
long v;
int err;
err = kstrtol(buf, 10, &v);
if (err)
return err;
if (n == 0)
r = VDD_TO_REG(v);
else
r = IN_TO_REG(v);
mutex_lock(&data->update_lock);
data->in_max[n] = r;
if (n < 4)
gl520_write_value(client, GL520_REG_IN_MAX[n],
(gl520_read_value(client, GL520_REG_IN_MAX[n])
& ~0xff00) | (r << 8));
else
gl520_write_value(client, GL520_REG_IN_MAX[n], r);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in_input, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in_input, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in_input, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in_input, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in_input, 4);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
#define DIV_FROM_REG(val) (1 << (val))
#define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : (480000 / ((val) << (div))))
#define FAN_BASE(div) (480000 >> (div))
#define FAN_CLAMP(val, div) clamp_val(val, FAN_BASE(div) / 255, \
FAN_BASE(div))
#define FAN_TO_REG(val, div) ((val) == 0 ? 0 : \
DIV_ROUND_CLOSEST(480000, \
FAN_CLAMP(val, div) << (div)))
static ssize_t fan_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_input[n],
data->fan_div[n]));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[n],
data->fan_div[n]));
}
static ssize_t fan_div_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[n]));
}
static ssize_t fan1_off_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", data->fan_off);
}
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int n = to_sensor_dev_attr(attr)->index;
u8 r;
unsigned long v;
int err;
err = kstrtoul(buf, 10, &v);
if (err)
return err;
mutex_lock(&data->update_lock);
r = FAN_TO_REG(v, data->fan_div[n]);
data->fan_min[n] = r;
if (n == 0)
gl520_write_value(client, GL520_REG_FAN_MIN,
(gl520_read_value(client, GL520_REG_FAN_MIN)
& ~0xff00) | (r << 8));
else
gl520_write_value(client, GL520_REG_FAN_MIN,
(gl520_read_value(client, GL520_REG_FAN_MIN)
& ~0xff) | r);
data->beep_mask = gl520_read_value(client, GL520_REG_BEEP_MASK);
if (data->fan_min[n] == 0)
data->alarm_mask &= (n == 0) ? ~0x20 : ~0x40;
else
data->alarm_mask |= (n == 0) ? 0x20 : 0x40;
data->beep_mask &= data->alarm_mask;
gl520_write_value(client, GL520_REG_BEEP_MASK, data->beep_mask);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int n = to_sensor_dev_attr(attr)->index;
u8 r;
unsigned long v;
int err;
err = kstrtoul(buf, 10, &v);
if (err)
return err;
switch (v) {
case 1:
r = 0;
break;
case 2:
r = 1;
break;
case 4:
r = 2;
break;
case 8:
r = 3;
break;
default:
dev_err(&client->dev,
"fan_div value %ld not supported. Choose one of 1, 2, 4 or 8!\n", v);
return -EINVAL;
}
mutex_lock(&data->update_lock);
data->fan_div[n] = r;
if (n == 0)
gl520_write_value(client, GL520_REG_FAN_DIV,
(gl520_read_value(client, GL520_REG_FAN_DIV)
& ~0xc0) | (r << 6));
else
gl520_write_value(client, GL520_REG_FAN_DIV,
(gl520_read_value(client, GL520_REG_FAN_DIV)
& ~0x30) | (r << 4));
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan1_off_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 r;
unsigned long v;
int err;
err = kstrtoul(buf, 10, &v);
if (err)
return err;
r = (v ? 1 : 0);
mutex_lock(&data->update_lock);
data->fan_off = r;
gl520_write_value(client, GL520_REG_FAN_OFF,
(gl520_read_value(client, GL520_REG_FAN_OFF)
& ~0x0c) | (r << 2));
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static DEVICE_ATTR_RW(fan1_off);
#define TEMP_FROM_REG(val) (((val) - 130) * 1000)
#define TEMP_CLAMP(val) clamp_val(val, -130000, 125000)
#define TEMP_TO_REG(val) (DIV_ROUND_CLOSEST(TEMP_CLAMP(val), 1000) + 130)
static ssize_t temp_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_input[n]));
}
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[n]));
}
static ssize_t temp_max_hyst_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int n = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max_hyst[n]));
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int n = to_sensor_dev_attr(attr)->index;
long v;
int err;
err = kstrtol(buf, 10, &v);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_max[n] = TEMP_TO_REG(v);
gl520_write_value(client, GL520_REG_TEMP_MAX[n], data->temp_max[n]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_max_hyst_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int n = to_sensor_dev_attr(attr)->index;
long v;
int err;
err = kstrtol(buf, 10, &v);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_max_hyst[n] = TEMP_TO_REG(v);
gl520_write_value(client, GL520_REG_TEMP_MAX_HYST[n],
data->temp_max_hyst[n]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp_max_hyst, 0);
static SENSOR_DEVICE_ATTR_RW(temp2_max_hyst, temp_max_hyst, 1);
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", data->alarms);
}
static ssize_t beep_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", data->beep_enable);
}
static ssize_t beep_mask_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", data->beep_mask);
}
static ssize_t beep_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
u8 r;
unsigned long v;
int err;
err = kstrtoul(buf, 10, &v);
if (err)
return err;
r = (v ? 0 : 1);
mutex_lock(&data->update_lock);
data->beep_enable = !r;
gl520_write_value(client, GL520_REG_BEEP_ENABLE,
(gl520_read_value(client, GL520_REG_BEEP_ENABLE)
& ~0x04) | (r << 2));
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t beep_mask_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long r;
int err;
err = kstrtoul(buf, 10, &r);
if (err)
return err;
mutex_lock(&data->update_lock);
r &= data->alarm_mask;
data->beep_mask = r;
gl520_write_value(client, GL520_REG_BEEP_MASK, r);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RO(alarms);
static DEVICE_ATTR_RW(beep_enable);
static DEVICE_ATTR_RW(beep_mask);
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bit_nr = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", (data->alarms >> bit_nr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 7);
static ssize_t beep_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct gl520_data *data = gl520_update_device(dev);
return sprintf(buf, "%d\n", (data->beep_mask >> bitnr) & 1);
}
static ssize_t beep_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct gl520_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int bitnr = to_sensor_dev_attr(attr)->index;
unsigned long bit;
int err;
err = kstrtoul(buf, 10, &bit);
if (err)
return err;
if (bit & ~1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->beep_mask = gl520_read_value(client, GL520_REG_BEEP_MASK);
if (bit)
data->beep_mask |= (1 << bitnr);
else
data->beep_mask &= ~(1 << bitnr);
gl520_write_value(client, GL520_REG_BEEP_MASK, data->beep_mask);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(in0_beep, beep, 0);
static SENSOR_DEVICE_ATTR_RW(in1_beep, beep, 1);
static SENSOR_DEVICE_ATTR_RW(in2_beep, beep, 2);
static SENSOR_DEVICE_ATTR_RW(in3_beep, beep, 3);
static SENSOR_DEVICE_ATTR_RW(temp1_beep, beep, 4);
static SENSOR_DEVICE_ATTR_RW(fan1_beep, beep, 5);
static SENSOR_DEVICE_ATTR_RW(fan2_beep, beep, 6);
static SENSOR_DEVICE_ATTR_RW(temp2_beep, beep, 7);
static SENSOR_DEVICE_ATTR_RW(in4_beep, beep, 7);
static struct attribute *gl520_attributes[] = {
&dev_attr_cpu0_vid.attr,
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in0_beep.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in1_beep.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in2_beep.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in3_beep.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_beep.dev_attr.attr,
&dev_attr_fan1_off.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_beep.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_beep.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_beep_enable.attr,
&dev_attr_beep_mask.attr,
NULL
};
static const struct attribute_group gl520_group = {
.attrs = gl520_attributes,
};
static struct attribute *gl520_attributes_in4[] = {
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in4_beep.dev_attr.attr,
NULL
};
static struct attribute *gl520_attributes_temp2[] = {
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_beep.dev_attr.attr,
NULL
};
static const struct attribute_group gl520_group_in4 = {
.attrs = gl520_attributes_in4,
};
static const struct attribute_group gl520_group_temp2 = {
.attrs = gl520_attributes_temp2,
};
/*
* Real code
*/
/* Return 0 if detection is successful, -ENODEV otherwise */
static int gl520_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
/* Determine the chip type. */
if ((gl520_read_value(client, GL520_REG_CHIP_ID) != 0x20) ||
((gl520_read_value(client, GL520_REG_REVISION) & 0x7f) != 0x00) ||
((gl520_read_value(client, GL520_REG_CONF) & 0x80) != 0x00)) {
dev_dbg(&client->dev, "Unknown chip type, skipping\n");
return -ENODEV;
}
strscpy(info->type, "gl520sm", I2C_NAME_SIZE);
return 0;
}
/* Called when we have found a new GL520SM. */
static void gl520_init_client(struct i2c_client *client)
{
struct gl520_data *data = i2c_get_clientdata(client);
u8 oldconf, conf;
conf = oldconf = gl520_read_value(client, GL520_REG_CONF);
data->alarm_mask = 0xff;
data->vrm = vid_which_vrm();
if (extra_sensor_type == 1)
conf &= ~0x10;
else if (extra_sensor_type == 2)
conf |= 0x10;
data->two_temps = !(conf & 0x10);
/* If IRQ# is disabled, we can safely force comparator mode */
if (!(conf & 0x20))
conf &= 0xf7;
/* Enable monitoring if needed */
conf |= 0x40;
if (conf != oldconf)
gl520_write_value(client, GL520_REG_CONF, conf);
gl520_update_device(&(client->dev));
if (data->fan_min[0] == 0)
data->alarm_mask &= ~0x20;
if (data->fan_min[1] == 0)
data->alarm_mask &= ~0x40;
data->beep_mask &= data->alarm_mask;
gl520_write_value(client, GL520_REG_BEEP_MASK, data->beep_mask);
}
static int gl520_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct gl520_data *data;
data = devm_kzalloc(dev, sizeof(struct gl520_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
data->client = client;
/* Initialize the GL520SM chip */
gl520_init_client(client);
/* sysfs hooks */
data->groups[0] = &gl520_group;
if (data->two_temps)
data->groups[1] = &gl520_group_temp2;
else
data->groups[1] = &gl520_group_in4;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id gl520_id[] = {
{ "gl520sm", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, gl520_id);
static struct i2c_driver gl520_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "gl520sm",
},
.probe = gl520_probe,
.id_table = gl520_id,
.detect = gl520_detect,
.address_list = normal_i2c,
};
module_i2c_driver(gl520_driver);
MODULE_AUTHOR("Frodo Looijaard <[email protected]>, "
"Kyösti Mälkki <[email protected]>, "
"Maarten Deprez <[email protected]>");
MODULE_DESCRIPTION("GL520SM driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/gl520sm.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ads7828.c - driver for TI ADS7828 8-channel A/D converter and compatibles
* (C) 2007 EADS Astrium
*
* This driver is based on the lm75 and other lm_sensors/hwmon drivers
*
* Written by Steve Hardy <[email protected]>
*
* ADS7830 support, by Guillaume Roguez <[email protected]>
*
* For further information, see the Documentation/hwmon/ads7828.rst file.
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_data/ads7828.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/regulator/consumer.h>
/* The ADS7828 registers */
#define ADS7828_CMD_SD_SE 0x80 /* Single ended inputs */
#define ADS7828_CMD_PD1 0x04 /* Internal vref OFF && A/D ON */
#define ADS7828_CMD_PD3 0x0C /* Internal vref ON && A/D ON */
#define ADS7828_INT_VREF_MV 2500 /* Internal vref is 2.5V, 2500mV */
#define ADS7828_EXT_VREF_MV_MIN 50 /* External vref min value 0.05V */
#define ADS7828_EXT_VREF_MV_MAX 5250 /* External vref max value 5.25V */
/* List of supported devices */
enum ads7828_chips { ads7828, ads7830 };
/* Client specific data */
struct ads7828_data {
struct regmap *regmap;
u8 cmd_byte; /* Command byte without channel bits */
unsigned int lsb_resol; /* Resolution of the ADC sample LSB */
};
/* Command byte C2,C1,C0 - see datasheet */
static inline u8 ads7828_cmd_byte(u8 cmd, int ch)
{
return cmd | (((ch >> 1) | (ch & 0x01) << 2) << 4);
}
/* sysfs callback function */
static ssize_t ads7828_in_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ads7828_data *data = dev_get_drvdata(dev);
u8 cmd = ads7828_cmd_byte(data->cmd_byte, attr->index);
unsigned int regval;
int err;
err = regmap_read(data->regmap, cmd, ®val);
if (err < 0)
return err;
return sprintf(buf, "%d\n",
DIV_ROUND_CLOSEST(regval * data->lsb_resol, 1000));
}
static SENSOR_DEVICE_ATTR_RO(in0_input, ads7828_in, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, ads7828_in, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, ads7828_in, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, ads7828_in, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, ads7828_in, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, ads7828_in, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, ads7828_in, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, ads7828_in, 7);
static struct attribute *ads7828_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(ads7828);
static const struct regmap_config ads2828_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
};
static const struct regmap_config ads2830_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static const struct i2c_device_id ads7828_device_ids[];
static int ads7828_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct ads7828_platform_data *pdata = dev_get_platdata(dev);
struct ads7828_data *data;
struct device *hwmon_dev;
unsigned int vref_mv = ADS7828_INT_VREF_MV;
unsigned int vref_uv;
bool diff_input = false;
bool ext_vref = false;
unsigned int regval;
enum ads7828_chips chip;
struct regulator *reg;
data = devm_kzalloc(dev, sizeof(struct ads7828_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
if (pdata) {
diff_input = pdata->diff_input;
ext_vref = pdata->ext_vref;
if (ext_vref && pdata->vref_mv)
vref_mv = pdata->vref_mv;
} else if (dev->of_node) {
diff_input = of_property_read_bool(dev->of_node,
"ti,differential-input");
reg = devm_regulator_get_optional(dev, "vref");
if (!IS_ERR(reg)) {
vref_uv = regulator_get_voltage(reg);
vref_mv = DIV_ROUND_CLOSEST(vref_uv, 1000);
if (vref_mv < ADS7828_EXT_VREF_MV_MIN ||
vref_mv > ADS7828_EXT_VREF_MV_MAX)
return -EINVAL;
ext_vref = true;
}
}
if (client->dev.of_node)
chip = (uintptr_t)of_device_get_match_data(&client->dev);
else
chip = i2c_match_id(ads7828_device_ids, client)->driver_data;
/* Bound Vref with min/max values */
vref_mv = clamp_val(vref_mv, ADS7828_EXT_VREF_MV_MIN,
ADS7828_EXT_VREF_MV_MAX);
/* ADS7828 uses 12-bit samples, while ADS7830 is 8-bit */
if (chip == ads7828) {
data->lsb_resol = DIV_ROUND_CLOSEST(vref_mv * 1000, 4096);
data->regmap = devm_regmap_init_i2c(client,
&ads2828_regmap_config);
} else {
data->lsb_resol = DIV_ROUND_CLOSEST(vref_mv * 1000, 256);
data->regmap = devm_regmap_init_i2c(client,
&ads2830_regmap_config);
}
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
data->cmd_byte = ext_vref ? ADS7828_CMD_PD1 : ADS7828_CMD_PD3;
if (!diff_input)
data->cmd_byte |= ADS7828_CMD_SD_SE;
/*
* Datasheet specifies internal reference voltage is disabled by
* default. The internal reference voltage needs to be enabled and
* voltage needs to settle before getting valid ADC data. So perform a
* dummy read to enable the internal reference voltage.
*/
if (!ext_vref)
regmap_read(data->regmap, data->cmd_byte, ®val);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
ads7828_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ads7828_device_ids[] = {
{ "ads7828", ads7828 },
{ "ads7830", ads7830 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ads7828_device_ids);
static const struct of_device_id __maybe_unused ads7828_of_match[] = {
{
.compatible = "ti,ads7828",
.data = (void *)ads7828
},
{
.compatible = "ti,ads7830",
.data = (void *)ads7830
},
{ },
};
MODULE_DEVICE_TABLE(of, ads7828_of_match);
static struct i2c_driver ads7828_driver = {
.driver = {
.name = "ads7828",
.of_match_table = of_match_ptr(ads7828_of_match),
},
.id_table = ads7828_device_ids,
.probe = ads7828_probe,
};
module_i2c_driver(ads7828_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Steve Hardy <[email protected]>");
MODULE_DESCRIPTION("Driver for TI ADS7828 A/D converter and compatibles");
|
linux-master
|
drivers/hwmon/ads7828.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* LM73 Sensor driver
* Based on LM75
*
* Copyright (C) 2007, CenoSYS (www.cenosys.com).
* Copyright (C) 2009, Bollore telecom (www.bolloretelecom.eu).
*
* Guillaume Ligneul <[email protected]>
* Adrien Demarez <[email protected]>
* Jeremy Laine <[email protected]>
* Chris Verges <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
/* Addresses scanned */
static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c,
0x4d, 0x4e, I2C_CLIENT_END };
/* LM73 registers */
#define LM73_REG_INPUT 0x00
#define LM73_REG_CONF 0x01
#define LM73_REG_MAX 0x02
#define LM73_REG_MIN 0x03
#define LM73_REG_CTRL 0x04
#define LM73_REG_ID 0x07
#define LM73_ID 0x9001 /* 0x0190, byte-swapped */
#define DRVNAME "lm73"
#define LM73_TEMP_MIN (-256000 / 250)
#define LM73_TEMP_MAX (255750 / 250)
#define LM73_CTRL_RES_SHIFT 5
#define LM73_CTRL_RES_MASK (BIT(5) | BIT(6))
#define LM73_CTRL_TO_MASK BIT(7)
#define LM73_CTRL_HI_SHIFT 2
#define LM73_CTRL_LO_SHIFT 1
static const unsigned short lm73_convrates[] = {
14, /* 11-bits (0.25000 C/LSB): RES1 Bit = 0, RES0 Bit = 0 */
28, /* 12-bits (0.12500 C/LSB): RES1 Bit = 0, RES0 Bit = 1 */
56, /* 13-bits (0.06250 C/LSB): RES1 Bit = 1, RES0 Bit = 0 */
112, /* 14-bits (0.03125 C/LSB): RES1 Bit = 1, RES0 Bit = 1 */
};
struct lm73_data {
struct i2c_client *client;
struct mutex lock;
u8 ctrl; /* control register value */
};
/*-----------------------------------------------------------------------*/
static ssize_t temp_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm73_data *data = dev_get_drvdata(dev);
long temp;
short value;
s32 err;
int status = kstrtol(buf, 10, &temp);
if (status < 0)
return status;
/* Write value */
value = clamp_val(temp / 250, LM73_TEMP_MIN, LM73_TEMP_MAX) << 5;
err = i2c_smbus_write_word_swapped(data->client, attr->index, value);
return (err < 0) ? err : count;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm73_data *data = dev_get_drvdata(dev);
int temp;
s32 err = i2c_smbus_read_word_swapped(data->client, attr->index);
if (err < 0)
return err;
/* use integer division instead of equivalent right shift to
guarantee arithmetic shift and preserve the sign */
temp = (((s16) err) * 250) / 32;
return sysfs_emit(buf, "%d\n", temp);
}
static ssize_t convrate_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct lm73_data *data = dev_get_drvdata(dev);
unsigned long convrate;
s32 err;
int res = 0;
err = kstrtoul(buf, 10, &convrate);
if (err < 0)
return err;
/*
* Convert the desired conversion rate into register bits.
* res is already initialized, and everything past the second-to-last
* value in the array is treated as belonging to the last value
* in the array.
*/
while (res < (ARRAY_SIZE(lm73_convrates) - 1) &&
convrate > lm73_convrates[res])
res++;
mutex_lock(&data->lock);
data->ctrl &= LM73_CTRL_TO_MASK;
data->ctrl |= res << LM73_CTRL_RES_SHIFT;
err = i2c_smbus_write_byte_data(data->client, LM73_REG_CTRL,
data->ctrl);
mutex_unlock(&data->lock);
if (err < 0)
return err;
return count;
}
static ssize_t convrate_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct lm73_data *data = dev_get_drvdata(dev);
int res;
res = (data->ctrl & LM73_CTRL_RES_MASK) >> LM73_CTRL_RES_SHIFT;
return sysfs_emit(buf, "%hu\n", lm73_convrates[res]);
}
static ssize_t maxmin_alarm_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct lm73_data *data = dev_get_drvdata(dev);
s32 ctrl;
mutex_lock(&data->lock);
ctrl = i2c_smbus_read_byte_data(data->client, LM73_REG_CTRL);
if (ctrl < 0)
goto abort;
data->ctrl = ctrl;
mutex_unlock(&data->lock);
return sysfs_emit(buf, "%d\n", (ctrl >> attr->index) & 1);
abort:
mutex_unlock(&data->lock);
return ctrl;
}
/*-----------------------------------------------------------------------*/
/* sysfs attributes for hwmon */
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, LM73_REG_MAX);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp, LM73_REG_MIN);
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, LM73_REG_INPUT);
static SENSOR_DEVICE_ATTR_RW(update_interval, convrate, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, maxmin_alarm,
LM73_CTRL_HI_SHIFT);
static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, maxmin_alarm,
LM73_CTRL_LO_SHIFT);
static struct attribute *lm73_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_update_interval.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(lm73);
/*-----------------------------------------------------------------------*/
/* device probe and removal */
static int
lm73_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct lm73_data *data;
int ctrl;
data = devm_kzalloc(dev, sizeof(struct lm73_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->lock);
ctrl = i2c_smbus_read_byte_data(client, LM73_REG_CTRL);
if (ctrl < 0)
return ctrl;
data->ctrl = ctrl;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, lm73_groups);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
dev_info(dev, "sensor '%s'\n", client->name);
return 0;
}
static const struct i2c_device_id lm73_ids[] = {
{ "lm73", 0 },
{ /* LIST END */ }
};
MODULE_DEVICE_TABLE(i2c, lm73_ids);
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm73_detect(struct i2c_client *new_client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = new_client->adapter;
int id, ctrl, conf;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
/*
* Do as much detection as possible with byte reads first, as word
* reads can confuse other devices.
*/
ctrl = i2c_smbus_read_byte_data(new_client, LM73_REG_CTRL);
if (ctrl < 0 || (ctrl & 0x10))
return -ENODEV;
conf = i2c_smbus_read_byte_data(new_client, LM73_REG_CONF);
if (conf < 0 || (conf & 0x0c))
return -ENODEV;
id = i2c_smbus_read_byte_data(new_client, LM73_REG_ID);
if (id < 0 || id != (LM73_ID & 0xff))
return -ENODEV;
/* Check device ID */
id = i2c_smbus_read_word_data(new_client, LM73_REG_ID);
if (id < 0 || id != LM73_ID)
return -ENODEV;
strscpy(info->type, "lm73", I2C_NAME_SIZE);
return 0;
}
static const struct of_device_id lm73_of_match[] = {
{
.compatible = "ti,lm73",
},
{ },
};
MODULE_DEVICE_TABLE(of, lm73_of_match);
static struct i2c_driver lm73_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm73",
.of_match_table = lm73_of_match,
},
.probe = lm73_probe,
.id_table = lm73_ids,
.detect = lm73_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm73_driver);
MODULE_AUTHOR("Guillaume Ligneul <[email protected]>");
MODULE_DESCRIPTION("LM73 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm73.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* ADM1177 Hot Swap Controller and Digital Power Monitor with Soft Start Pin
*
* Copyright 2015-2019 Analog Devices Inc.
*/
#include <linux/bits.h>
#include <linux/device.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
/* Command Byte Operations */
#define ADM1177_CMD_V_CONT BIT(0)
#define ADM1177_CMD_I_CONT BIT(2)
#define ADM1177_CMD_VRANGE BIT(4)
/* Extended Register */
#define ADM1177_REG_ALERT_TH 2
#define ADM1177_BITS 12
/**
* struct adm1177_state - driver instance specific data
* @client: pointer to i2c client
* @r_sense_uohm: current sense resistor value
* @alert_threshold_ua: current limit for shutdown
* @vrange_high: internal voltage divider
*/
struct adm1177_state {
struct i2c_client *client;
u32 r_sense_uohm;
u32 alert_threshold_ua;
bool vrange_high;
};
static int adm1177_read_raw(struct adm1177_state *st, u8 num, u8 *data)
{
return i2c_master_recv(st->client, data, num);
}
static int adm1177_write_cmd(struct adm1177_state *st, u8 cmd)
{
return i2c_smbus_write_byte(st->client, cmd);
}
static int adm1177_write_alert_thr(struct adm1177_state *st,
u32 alert_threshold_ua)
{
u64 val;
int ret;
val = 0xFFULL * alert_threshold_ua * st->r_sense_uohm;
val = div_u64(val, 105840000U);
val = div_u64(val, 1000U);
if (val > 0xFF)
val = 0xFF;
ret = i2c_smbus_write_byte_data(st->client, ADM1177_REG_ALERT_TH,
val);
if (ret)
return ret;
st->alert_threshold_ua = alert_threshold_ua;
return 0;
}
static int adm1177_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct adm1177_state *st = dev_get_drvdata(dev);
u8 data[3];
long dummy;
int ret;
switch (type) {
case hwmon_curr:
switch (attr) {
case hwmon_curr_input:
ret = adm1177_read_raw(st, 3, data);
if (ret < 0)
return ret;
dummy = (data[1] << 4) | (data[2] & 0xF);
/*
* convert to milliamperes
* ((105.84mV / 4096) x raw) / senseResistor(ohm)
*/
*val = div_u64((105840000ull * dummy),
4096 * st->r_sense_uohm);
return 0;
case hwmon_curr_max_alarm:
*val = st->alert_threshold_ua;
return 0;
default:
return -EOPNOTSUPP;
}
case hwmon_in:
ret = adm1177_read_raw(st, 3, data);
if (ret < 0)
return ret;
dummy = (data[0] << 4) | (data[2] >> 4);
/*
* convert to millivolts based on resistor devision
* (V_fullscale / 4096) * raw
*/
if (st->vrange_high)
dummy *= 26350;
else
dummy *= 6650;
*val = DIV_ROUND_CLOSEST(dummy, 4096);
return 0;
default:
return -EOPNOTSUPP;
}
}
static int adm1177_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct adm1177_state *st = dev_get_drvdata(dev);
switch (type) {
case hwmon_curr:
switch (attr) {
case hwmon_curr_max_alarm:
adm1177_write_alert_thr(st, val);
return 0;
default:
return -EOPNOTSUPP;
}
default:
return -EOPNOTSUPP;
}
}
static umode_t adm1177_is_visible(const void *data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct adm1177_state *st = data;
switch (type) {
case hwmon_in:
switch (attr) {
case hwmon_in_input:
return 0444;
}
break;
case hwmon_curr:
switch (attr) {
case hwmon_curr_input:
if (st->r_sense_uohm)
return 0444;
return 0;
case hwmon_curr_max_alarm:
if (st->r_sense_uohm)
return 0644;
return 0;
}
break;
default:
break;
}
return 0;
}
static const struct hwmon_channel_info * const adm1177_info[] = {
HWMON_CHANNEL_INFO(curr,
HWMON_C_INPUT | HWMON_C_MAX_ALARM),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT),
NULL
};
static const struct hwmon_ops adm1177_hwmon_ops = {
.is_visible = adm1177_is_visible,
.read = adm1177_read,
.write = adm1177_write,
};
static const struct hwmon_chip_info adm1177_chip_info = {
.ops = &adm1177_hwmon_ops,
.info = adm1177_info,
};
static int adm1177_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct adm1177_state *st;
u32 alert_threshold_ua;
int ret;
st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
st->client = client;
ret = devm_regulator_get_enable_optional(&client->dev, "vref");
if (ret == -EPROBE_DEFER)
return -EPROBE_DEFER;
if (device_property_read_u32(dev, "shunt-resistor-micro-ohms",
&st->r_sense_uohm))
st->r_sense_uohm = 0;
if (device_property_read_u32(dev, "adi,shutdown-threshold-microamp",
&alert_threshold_ua)) {
if (st->r_sense_uohm)
/*
* set maximum default value from datasheet based on
* shunt-resistor
*/
alert_threshold_ua = div_u64(105840000000,
st->r_sense_uohm);
else
alert_threshold_ua = 0;
}
st->vrange_high = device_property_read_bool(dev,
"adi,vrange-high-enable");
if (alert_threshold_ua && st->r_sense_uohm)
adm1177_write_alert_thr(st, alert_threshold_ua);
ret = adm1177_write_cmd(st, ADM1177_CMD_V_CONT |
ADM1177_CMD_I_CONT |
(st->vrange_high ? 0 : ADM1177_CMD_VRANGE));
if (ret)
return ret;
hwmon_dev =
devm_hwmon_device_register_with_info(dev, client->name, st,
&adm1177_chip_info, NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id adm1177_id[] = {
{"adm1177", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, adm1177_id);
static const struct of_device_id adm1177_dt_ids[] = {
{ .compatible = "adi,adm1177" },
{},
};
MODULE_DEVICE_TABLE(of, adm1177_dt_ids);
static struct i2c_driver adm1177_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1177",
.of_match_table = adm1177_dt_ids,
},
.probe = adm1177_probe,
.id_table = adm1177_id,
};
module_i2c_driver(adm1177_driver);
MODULE_AUTHOR("Beniamin Bia <[email protected]>");
MODULE_AUTHOR("Michael Hennerich <[email protected]>");
MODULE_DESCRIPTION("Analog Devices ADM1177 ADC driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/adm1177.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* w83791d.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
*
* Copyright (C) 2006-2007 Charles Spirakis <[email protected]>
*/
/*
* Supports following chips:
*
* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83791d 10 5 5 3 0x71 0x5ca3 yes no
*
* The w83791d chip appears to be part way between the 83781d and the
* 83792d. Thus, this file is derived from both the w83792d.c and
* w83781d.c files.
*
* The w83791g chip is the same as the w83791d but lead-free.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-vid.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/jiffies.h>
#define NUMBER_OF_VIN 10
#define NUMBER_OF_FANIN 5
#define NUMBER_OF_TEMPIN 3
#define NUMBER_OF_PWM 5
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
I2C_CLIENT_END };
/* Insmod parameters */
static unsigned short force_subclients[4];
module_param_array(force_subclients, short, NULL, 0);
MODULE_PARM_DESC(force_subclients,
"List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
static bool reset;
module_param(reset, bool, 0);
MODULE_PARM_DESC(reset, "Set to one to force a hardware chip reset");
static bool init;
module_param(init, bool, 0);
MODULE_PARM_DESC(init, "Set to one to force extra software initialization");
/* The W83791D registers */
static const u8 W83791D_REG_IN[NUMBER_OF_VIN] = {
0x20, /* VCOREA in DataSheet */
0x21, /* VINR0 in DataSheet */
0x22, /* +3.3VIN in DataSheet */
0x23, /* VDD5V in DataSheet */
0x24, /* +12VIN in DataSheet */
0x25, /* -12VIN in DataSheet */
0x26, /* -5VIN in DataSheet */
0xB0, /* 5VSB in DataSheet */
0xB1, /* VBAT in DataSheet */
0xB2 /* VINR1 in DataSheet */
};
static const u8 W83791D_REG_IN_MAX[NUMBER_OF_VIN] = {
0x2B, /* VCOREA High Limit in DataSheet */
0x2D, /* VINR0 High Limit in DataSheet */
0x2F, /* +3.3VIN High Limit in DataSheet */
0x31, /* VDD5V High Limit in DataSheet */
0x33, /* +12VIN High Limit in DataSheet */
0x35, /* -12VIN High Limit in DataSheet */
0x37, /* -5VIN High Limit in DataSheet */
0xB4, /* 5VSB High Limit in DataSheet */
0xB6, /* VBAT High Limit in DataSheet */
0xB8 /* VINR1 High Limit in DataSheet */
};
static const u8 W83791D_REG_IN_MIN[NUMBER_OF_VIN] = {
0x2C, /* VCOREA Low Limit in DataSheet */
0x2E, /* VINR0 Low Limit in DataSheet */
0x30, /* +3.3VIN Low Limit in DataSheet */
0x32, /* VDD5V Low Limit in DataSheet */
0x34, /* +12VIN Low Limit in DataSheet */
0x36, /* -12VIN Low Limit in DataSheet */
0x38, /* -5VIN Low Limit in DataSheet */
0xB5, /* 5VSB Low Limit in DataSheet */
0xB7, /* VBAT Low Limit in DataSheet */
0xB9 /* VINR1 Low Limit in DataSheet */
};
static const u8 W83791D_REG_FAN[NUMBER_OF_FANIN] = {
0x28, /* FAN 1 Count in DataSheet */
0x29, /* FAN 2 Count in DataSheet */
0x2A, /* FAN 3 Count in DataSheet */
0xBA, /* FAN 4 Count in DataSheet */
0xBB, /* FAN 5 Count in DataSheet */
};
static const u8 W83791D_REG_FAN_MIN[NUMBER_OF_FANIN] = {
0x3B, /* FAN 1 Count Low Limit in DataSheet */
0x3C, /* FAN 2 Count Low Limit in DataSheet */
0x3D, /* FAN 3 Count Low Limit in DataSheet */
0xBC, /* FAN 4 Count Low Limit in DataSheet */
0xBD, /* FAN 5 Count Low Limit in DataSheet */
};
static const u8 W83791D_REG_PWM[NUMBER_OF_PWM] = {
0x81, /* PWM 1 duty cycle register in DataSheet */
0x83, /* PWM 2 duty cycle register in DataSheet */
0x94, /* PWM 3 duty cycle register in DataSheet */
0xA0, /* PWM 4 duty cycle register in DataSheet */
0xA1, /* PWM 5 duty cycle register in DataSheet */
};
static const u8 W83791D_REG_TEMP_TARGET[3] = {
0x85, /* PWM 1 target temperature for temp 1 */
0x86, /* PWM 2 target temperature for temp 2 */
0x96, /* PWM 3 target temperature for temp 3 */
};
static const u8 W83791D_REG_TEMP_TOL[2] = {
0x87, /* PWM 1/2 temperature tolerance */
0x97, /* PWM 3 temperature tolerance */
};
static const u8 W83791D_REG_FAN_CFG[2] = {
0x84, /* FAN 1/2 configuration */
0x95, /* FAN 3 configuration */
};
static const u8 W83791D_REG_FAN_DIV[3] = {
0x47, /* contains FAN1 and FAN2 Divisor */
0x4b, /* contains FAN3 Divisor */
0x5C, /* contains FAN4 and FAN5 Divisor */
};
#define W83791D_REG_BANK 0x4E
#define W83791D_REG_TEMP2_CONFIG 0xC2
#define W83791D_REG_TEMP3_CONFIG 0xCA
static const u8 W83791D_REG_TEMP1[3] = {
0x27, /* TEMP 1 in DataSheet */
0x39, /* TEMP 1 Over in DataSheet */
0x3A, /* TEMP 1 Hyst in DataSheet */
};
static const u8 W83791D_REG_TEMP_ADD[2][6] = {
{0xC0, /* TEMP 2 in DataSheet */
0xC1, /* TEMP 2(0.5 deg) in DataSheet */
0xC5, /* TEMP 2 Over High part in DataSheet */
0xC6, /* TEMP 2 Over Low part in DataSheet */
0xC3, /* TEMP 2 Thyst High part in DataSheet */
0xC4}, /* TEMP 2 Thyst Low part in DataSheet */
{0xC8, /* TEMP 3 in DataSheet */
0xC9, /* TEMP 3(0.5 deg) in DataSheet */
0xCD, /* TEMP 3 Over High part in DataSheet */
0xCE, /* TEMP 3 Over Low part in DataSheet */
0xCB, /* TEMP 3 Thyst High part in DataSheet */
0xCC} /* TEMP 3 Thyst Low part in DataSheet */
};
#define W83791D_REG_BEEP_CONFIG 0x4D
static const u8 W83791D_REG_BEEP_CTRL[3] = {
0x56, /* BEEP Control Register 1 */
0x57, /* BEEP Control Register 2 */
0xA3, /* BEEP Control Register 3 */
};
#define W83791D_REG_GPIO 0x15
#define W83791D_REG_CONFIG 0x40
#define W83791D_REG_VID_FANDIV 0x47
#define W83791D_REG_DID_VID4 0x49
#define W83791D_REG_WCHIPID 0x58
#define W83791D_REG_CHIPMAN 0x4F
#define W83791D_REG_PIN 0x4B
#define W83791D_REG_I2C_SUBADDR 0x4A
#define W83791D_REG_ALARM1 0xA9 /* realtime status register1 */
#define W83791D_REG_ALARM2 0xAA /* realtime status register2 */
#define W83791D_REG_ALARM3 0xAB /* realtime status register3 */
#define W83791D_REG_VBAT 0x5D
#define W83791D_REG_I2C_ADDR 0x48
/*
* The SMBus locks itself. The Winbond W83791D has a bank select register
* (index 0x4e), but the driver only accesses registers in bank 0. Since
* we don't switch banks, we don't need any special code to handle
* locking access between bank switches
*/
static inline int w83791d_read(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_byte_data(client, reg);
}
static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value)
{
return i2c_smbus_write_byte_data(client, reg, value);
}
/*
* The analog voltage inputs have 16mV LSB. Since the sysfs output is
* in mV as would be measured on the chip input pin, need to just
* multiply/divide by 16 to translate from/to register values.
*/
#define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
#define IN_FROM_REG(val) ((val) * 16)
static u8 fan_to_reg(long rpm, int div)
{
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
((val) == 255 ? 0 : \
1350000 / ((val) * (div))))
/* for temp1 which is 8-bit resolution, LSB = 1 degree Celsius */
#define TEMP1_FROM_REG(val) ((val) * 1000)
#define TEMP1_TO_REG(val) ((val) <= -128000 ? -128 : \
(val) >= 127000 ? 127 : \
(val) < 0 ? ((val) - 500) / 1000 : \
((val) + 500) / 1000)
/*
* for temp2 and temp3 which are 9-bit resolution, LSB = 0.5 degree Celsius
* Assumes the top 8 bits are the integral amount and the bottom 8 bits
* are the fractional amount. Since we only have 0.5 degree resolution,
* the bottom 7 bits will always be zero
*/
#define TEMP23_FROM_REG(val) ((val) / 128 * 500)
#define TEMP23_TO_REG(val) (DIV_ROUND_CLOSEST(clamp_val((val), -128000, \
127500), 500) * 128)
/* for thermal cruise target temp, 7-bits, LSB = 1 degree Celsius */
#define TARGET_TEMP_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, 127000), \
1000)
/* for thermal cruise temp tolerance, 4-bits, LSB = 1 degree Celsius */
#define TOL_TEMP_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, 15000), \
1000)
#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
#define BEEP_MASK_FROM_REG(val) ((val) & 0xffffff)
#define DIV_FROM_REG(val) (1 << (val))
static u8 div_to_reg(int nr, long val)
{
int i;
/* fan divisors max out at 128 */
val = clamp_val(val, 1, 128) >> 1;
for (i = 0; i < 7; i++) {
if (val == 0)
break;
val >>= 1;
}
return (u8) i;
}
struct w83791d_data {
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
/* volts */
u8 in[NUMBER_OF_VIN]; /* Register value */
u8 in_max[NUMBER_OF_VIN]; /* Register value */
u8 in_min[NUMBER_OF_VIN]; /* Register value */
/* fans */
u8 fan[NUMBER_OF_FANIN]; /* Register value */
u8 fan_min[NUMBER_OF_FANIN]; /* Register value */
u8 fan_div[NUMBER_OF_FANIN]; /* Register encoding, shifted right */
/* Temperature sensors */
s8 temp1[3]; /* current, over, thyst */
s16 temp_add[2][3]; /* fixed point value. Top 8 bits are the
* integral part, bottom 8 bits are the
* fractional part. We only use the top
* 9 bits as the resolution is only
* to the 0.5 degree C...
* two sensors with three values
* (cur, over, hyst)
*/
/* PWMs */
u8 pwm[5]; /* pwm duty cycle */
u8 pwm_enable[3]; /* pwm enable status for fan 1-3
* (fan 4-5 only support manual mode)
*/
u8 temp_target[3]; /* pwm 1-3 target temperature */
u8 temp_tolerance[3]; /* pwm 1-3 temperature tolerance */
/* Misc */
u32 alarms; /* realtime status register encoding,combined */
u8 beep_enable; /* Global beep enable */
u32 beep_mask; /* Mask off specific beeps */
u8 vid; /* Register encoding, combined */
u8 vrm; /* hwmon-vid */
};
static int w83791d_probe(struct i2c_client *client);
static int w83791d_detect(struct i2c_client *client,
struct i2c_board_info *info);
static void w83791d_remove(struct i2c_client *client);
static int w83791d_read(struct i2c_client *client, u8 reg);
static int w83791d_write(struct i2c_client *client, u8 reg, u8 value);
static struct w83791d_data *w83791d_update_device(struct device *dev);
#ifdef DEBUG
static void w83791d_print_debug(struct w83791d_data *data, struct device *dev);
#endif
static void w83791d_init_client(struct i2c_client *client);
static const struct i2c_device_id w83791d_id[] = {
{ "w83791d", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, w83791d_id);
static struct i2c_driver w83791d_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "w83791d",
},
.probe = w83791d_probe,
.remove = w83791d_remove,
.id_table = w83791d_id,
.detect = w83791d_detect,
.address_list = normal_i2c,
};
/* following are the sysfs callback functions */
#define show_in_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
struct sensor_device_attribute *sensor_attr = \
to_sensor_dev_attr(attr); \
struct w83791d_data *data = w83791d_update_device(dev); \
int nr = sensor_attr->index; \
return sprintf(buf, "%d\n", IN_FROM_REG(data->reg[nr])); \
}
show_in_reg(in);
show_in_reg(in_min);
show_in_reg(in_max);
#define store_in_reg(REG, reg) \
static ssize_t store_in_##reg(struct device *dev, \
struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
struct sensor_device_attribute *sensor_attr = \
to_sensor_dev_attr(attr); \
struct i2c_client *client = to_i2c_client(dev); \
struct w83791d_data *data = i2c_get_clientdata(client); \
int nr = sensor_attr->index; \
unsigned long val; \
int err = kstrtoul(buf, 10, &val); \
if (err) \
return err; \
mutex_lock(&data->update_lock); \
data->in_##reg[nr] = IN_TO_REG(val); \
w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \
mutex_unlock(&data->update_lock); \
\
return count; \
}
store_in_reg(MIN, min);
store_in_reg(MAX, max);
static struct sensor_device_attribute sda_in_input[] = {
SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
};
static struct sensor_device_attribute sda_in_min[] = {
SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
};
static struct sensor_device_attribute sda_in_max[] = {
SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
};
static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr =
to_sensor_dev_attr(attr);
struct w83791d_data *data = w83791d_update_device(dev);
int bitnr = sensor_attr->index;
return sprintf(buf, "%d\n", (data->beep_mask >> bitnr) & 1);
}
static ssize_t store_beep(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr =
to_sensor_dev_attr(attr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int bitnr = sensor_attr->index;
int bytenr = bitnr / 8;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
val = val ? 1 : 0;
mutex_lock(&data->update_lock);
data->beep_mask &= ~(0xff << (bytenr * 8));
data->beep_mask |= w83791d_read(client, W83791D_REG_BEEP_CTRL[bytenr])
<< (bytenr * 8);
data->beep_mask &= ~(1 << bitnr);
data->beep_mask |= val << bitnr;
w83791d_write(client, W83791D_REG_BEEP_CTRL[bytenr],
(data->beep_mask >> (bytenr * 8)) & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr =
to_sensor_dev_attr(attr);
struct w83791d_data *data = w83791d_update_device(dev);
int bitnr = sensor_attr->index;
return sprintf(buf, "%d\n", (data->alarms >> bitnr) & 1);
}
/*
* Note: The bitmask for the beep enable/disable is different than
* the bitmask for the alarm.
*/
static struct sensor_device_attribute sda_in_beep[] = {
SENSOR_ATTR(in0_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 0),
SENSOR_ATTR(in1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 13),
SENSOR_ATTR(in2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 2),
SENSOR_ATTR(in3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 3),
SENSOR_ATTR(in4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 8),
SENSOR_ATTR(in5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 9),
SENSOR_ATTR(in6_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 10),
SENSOR_ATTR(in7_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 16),
SENSOR_ATTR(in8_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 17),
SENSOR_ATTR(in9_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 14),
};
static struct sensor_device_attribute sda_in_alarm[] = {
SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9),
SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10),
SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 19),
SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 20),
SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 14),
};
#define show_fan_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
struct sensor_device_attribute *sensor_attr = \
to_sensor_dev_attr(attr); \
struct w83791d_data *data = w83791d_update_device(dev); \
int nr = sensor_attr->index; \
return sprintf(buf, "%d\n", \
FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
}
show_fan_reg(fan);
show_fan_reg(fan_min);
static ssize_t store_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int nr = sensor_attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = fan_to_reg(val, DIV_FROM_REG(data->fan_div[nr]));
w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr]));
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int nr = sensor_attr->index;
unsigned long min;
u8 tmp_fan_div;
u8 fan_div_reg;
u8 vbat_reg;
int indx = 0;
u8 keep_mask = 0;
u8 new_shift = 0;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
/* Save fan_min */
min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
mutex_lock(&data->update_lock);
data->fan_div[nr] = div_to_reg(nr, val);
switch (nr) {
case 0:
indx = 0;
keep_mask = 0xcf;
new_shift = 4;
break;
case 1:
indx = 0;
keep_mask = 0x3f;
new_shift = 6;
break;
case 2:
indx = 1;
keep_mask = 0x3f;
new_shift = 6;
break;
case 3:
indx = 2;
keep_mask = 0xf8;
new_shift = 0;
break;
case 4:
indx = 2;
keep_mask = 0x8f;
new_shift = 4;
break;
#ifdef DEBUG
default:
dev_warn(dev, "store_fan_div: Unexpected nr seen: %d\n", nr);
count = -EINVAL;
goto err_exit;
#endif
}
fan_div_reg = w83791d_read(client, W83791D_REG_FAN_DIV[indx])
& keep_mask;
tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask;
w83791d_write(client, W83791D_REG_FAN_DIV[indx],
fan_div_reg | tmp_fan_div);
/* Bit 2 of fans 0-2 is stored in the vbat register (bits 5-7) */
if (nr < 3) {
keep_mask = ~(1 << (nr + 5));
vbat_reg = w83791d_read(client, W83791D_REG_VBAT)
& keep_mask;
tmp_fan_div = (data->fan_div[nr] << (3 + nr)) & ~keep_mask;
w83791d_write(client, W83791D_REG_VBAT,
vbat_reg | tmp_fan_div);
}
/* Restore fan_min */
data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr]));
w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
#ifdef DEBUG
err_exit:
#endif
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_fan_input[] = {
SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
};
static struct sensor_device_attribute sda_fan_min[] = {
SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 0),
SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 1),
SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 2),
SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 3),
SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO,
show_fan_min, store_fan_min, 4),
};
static struct sensor_device_attribute sda_fan_div[] = {
SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 0),
SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 1),
SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 2),
SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 3),
SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO,
show_fan_div, store_fan_div, 4),
};
static struct sensor_device_attribute sda_fan_beep[] = {
SENSOR_ATTR(fan1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 6),
SENSOR_ATTR(fan2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 7),
SENSOR_ATTR(fan3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 11),
SENSOR_ATTR(fan4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 21),
SENSOR_ATTR(fan5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 22),
};
static struct sensor_device_attribute sda_fan_alarm[] = {
SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 21),
SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 22),
};
/* read/write PWMs */
static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%u\n", data->pwm[nr]);
}
static ssize_t store_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int nr = sensor_attr->index;
unsigned long val;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm[nr] = clamp_val(val, 0, 255);
w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_pwm[] = {
SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO,
show_pwm, store_pwm, 0),
SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO,
show_pwm, store_pwm, 1),
SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO,
show_pwm, store_pwm, 2),
SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO,
show_pwm, store_pwm, 3),
SENSOR_ATTR(pwm5, S_IWUSR | S_IRUGO,
show_pwm, store_pwm, 4),
};
static ssize_t show_pwmenable(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%u\n", data->pwm_enable[nr] + 1);
}
static ssize_t store_pwmenable(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int nr = sensor_attr->index;
unsigned long val;
u8 reg_cfg_tmp;
u8 reg_idx = 0;
u8 val_shift = 0;
u8 keep_mask = 0;
int ret = kstrtoul(buf, 10, &val);
if (ret || val < 1 || val > 3)
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm_enable[nr] = val - 1;
switch (nr) {
case 0:
reg_idx = 0;
val_shift = 2;
keep_mask = 0xf3;
break;
case 1:
reg_idx = 0;
val_shift = 4;
keep_mask = 0xcf;
break;
case 2:
reg_idx = 1;
val_shift = 2;
keep_mask = 0xf3;
break;
}
reg_cfg_tmp = w83791d_read(client, W83791D_REG_FAN_CFG[reg_idx]);
reg_cfg_tmp = (reg_cfg_tmp & keep_mask) |
data->pwm_enable[nr] << val_shift;
w83791d_write(client, W83791D_REG_FAN_CFG[reg_idx], reg_cfg_tmp);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_pwmenable[] = {
SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
show_pwmenable, store_pwmenable, 0),
SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
show_pwmenable, store_pwmenable, 1),
SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
show_pwmenable, store_pwmenable, 2),
};
/* For Smart Fan I / Thermal Cruise */
static ssize_t show_temp_target(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct w83791d_data *data = w83791d_update_device(dev);
int nr = sensor_attr->index;
return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_target[nr]));
}
static ssize_t store_temp_target(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int nr = sensor_attr->index;
long val;
u8 target_mask;
if (kstrtol(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->update_lock);
data->temp_target[nr] = TARGET_TEMP_TO_REG(val);
target_mask = w83791d_read(client,
W83791D_REG_TEMP_TARGET[nr]) & 0x80;
w83791d_write(client, W83791D_REG_TEMP_TARGET[nr],
data->temp_target[nr] | target_mask);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_temp_target[] = {
SENSOR_ATTR(temp1_target, S_IWUSR | S_IRUGO,
show_temp_target, store_temp_target, 0),
SENSOR_ATTR(temp2_target, S_IWUSR | S_IRUGO,
show_temp_target, store_temp_target, 1),
SENSOR_ATTR(temp3_target, S_IWUSR | S_IRUGO,
show_temp_target, store_temp_target, 2),
};
static ssize_t show_temp_tolerance(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct w83791d_data *data = w83791d_update_device(dev);
int nr = sensor_attr->index;
return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_tolerance[nr]));
}
static ssize_t store_temp_tolerance(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int nr = sensor_attr->index;
unsigned long val;
u8 target_mask;
u8 reg_idx = 0;
u8 val_shift = 0;
u8 keep_mask = 0;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
switch (nr) {
case 0:
reg_idx = 0;
val_shift = 0;
keep_mask = 0xf0;
break;
case 1:
reg_idx = 0;
val_shift = 4;
keep_mask = 0x0f;
break;
case 2:
reg_idx = 1;
val_shift = 0;
keep_mask = 0xf0;
break;
}
mutex_lock(&data->update_lock);
data->temp_tolerance[nr] = TOL_TEMP_TO_REG(val);
target_mask = w83791d_read(client,
W83791D_REG_TEMP_TOL[reg_idx]) & keep_mask;
w83791d_write(client, W83791D_REG_TEMP_TOL[reg_idx],
(data->temp_tolerance[nr] << val_shift) | target_mask);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_temp_tolerance[] = {
SENSOR_ATTR(temp1_tolerance, S_IWUSR | S_IRUGO,
show_temp_tolerance, store_temp_tolerance, 0),
SENSOR_ATTR(temp2_tolerance, S_IWUSR | S_IRUGO,
show_temp_tolerance, store_temp_tolerance, 1),
SENSOR_ATTR(temp3_tolerance, S_IWUSR | S_IRUGO,
show_temp_tolerance, store_temp_tolerance, 2),
};
/* read/write the temperature1, includes measured value and limits */
static ssize_t show_temp1(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[attr->index]));
}
static ssize_t store_temp1(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp1[nr] = TEMP1_TO_REG(val);
w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]);
mutex_unlock(&data->update_lock);
return count;
}
/* read/write temperature2-3, includes measured value and limits */
static ssize_t show_temp23(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
struct w83791d_data *data = w83791d_update_device(dev);
int nr = attr->nr;
int index = attr->index;
return sprintf(buf, "%d\n", TEMP23_FROM_REG(data->temp_add[nr][index]));
}
static ssize_t store_temp23(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
long val;
int err;
int nr = attr->nr;
int index = attr->index;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_add[nr][index] = TEMP23_TO_REG(val);
w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2],
data->temp_add[nr][index] >> 8);
w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1],
data->temp_add[nr][index] & 0x80);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute_2 sda_temp_input[] = {
SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
};
static struct sensor_device_attribute_2 sda_temp_max[] = {
SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR,
show_temp1, store_temp1, 0, 1),
SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR,
show_temp23, store_temp23, 0, 1),
SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR,
show_temp23, store_temp23, 1, 1),
};
static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR,
show_temp1, store_temp1, 0, 2),
SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR,
show_temp23, store_temp23, 0, 2),
SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR,
show_temp23, store_temp23, 1, 2),
};
/*
* Note: The bitmask for the beep enable/disable is different than
* the bitmask for the alarm.
*/
static struct sensor_device_attribute sda_temp_beep[] = {
SENSOR_ATTR(temp1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 4),
SENSOR_ATTR(temp2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 5),
SENSOR_ATTR(temp3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 1),
};
static struct sensor_device_attribute sda_temp_alarm[] = {
SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
};
/* get realtime status of all sensors items: voltage, temp, fan */
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%u\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
/* Beep control */
#define GLOBAL_BEEP_ENABLE_SHIFT 15
#define GLOBAL_BEEP_ENABLE_MASK (1 << GLOBAL_BEEP_ENABLE_SHIFT)
static ssize_t show_beep_enable(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%d\n", data->beep_enable);
}
static ssize_t show_beep_mask(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%d\n", BEEP_MASK_FROM_REG(data->beep_mask));
}
static ssize_t store_beep_mask(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int i;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/*
* The beep_enable state overrides any enabling request from
* the masks
*/
data->beep_mask = BEEP_MASK_TO_REG(val) & ~GLOBAL_BEEP_ENABLE_MASK;
data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
val = data->beep_mask;
for (i = 0; i < 3; i++) {
w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff));
val >>= 8;
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t store_beep_enable(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->beep_enable = val ? 1 : 0;
/* Keep the full mask value in sync with the current enable */
data->beep_mask &= ~GLOBAL_BEEP_ENABLE_MASK;
data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
/*
* The global control is in the second beep control register
* so only need to update that register
*/
val = (data->beep_mask >> 8) & 0xff;
w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val);
mutex_unlock(&data->update_lock);
return count;
}
static struct sensor_device_attribute sda_beep_ctrl[] = {
SENSOR_ATTR(beep_enable, S_IRUGO | S_IWUSR,
show_beep_enable, store_beep_enable, 0),
SENSOR_ATTR(beep_mask, S_IRUGO | S_IWUSR,
show_beep_mask, store_beep_mask, 1)
};
/* cpu voltage regulation information */
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct w83791d_data *data = w83791d_update_device(dev);
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83791d_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%d\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct w83791d_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
/*
* No lock needed as vrm is internal to the driver
* (not read from a chip register) and so is not
* updated in w83791d_update_device()
*/
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val > 255)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
#define IN_UNIT_ATTRS(X) \
&sda_in_input[X].dev_attr.attr, \
&sda_in_min[X].dev_attr.attr, \
&sda_in_max[X].dev_attr.attr, \
&sda_in_beep[X].dev_attr.attr, \
&sda_in_alarm[X].dev_attr.attr
#define FAN_UNIT_ATTRS(X) \
&sda_fan_input[X].dev_attr.attr, \
&sda_fan_min[X].dev_attr.attr, \
&sda_fan_div[X].dev_attr.attr, \
&sda_fan_beep[X].dev_attr.attr, \
&sda_fan_alarm[X].dev_attr.attr
#define TEMP_UNIT_ATTRS(X) \
&sda_temp_input[X].dev_attr.attr, \
&sda_temp_max[X].dev_attr.attr, \
&sda_temp_max_hyst[X].dev_attr.attr, \
&sda_temp_beep[X].dev_attr.attr, \
&sda_temp_alarm[X].dev_attr.attr
static struct attribute *w83791d_attributes[] = {
IN_UNIT_ATTRS(0),
IN_UNIT_ATTRS(1),
IN_UNIT_ATTRS(2),
IN_UNIT_ATTRS(3),
IN_UNIT_ATTRS(4),
IN_UNIT_ATTRS(5),
IN_UNIT_ATTRS(6),
IN_UNIT_ATTRS(7),
IN_UNIT_ATTRS(8),
IN_UNIT_ATTRS(9),
FAN_UNIT_ATTRS(0),
FAN_UNIT_ATTRS(1),
FAN_UNIT_ATTRS(2),
TEMP_UNIT_ATTRS(0),
TEMP_UNIT_ATTRS(1),
TEMP_UNIT_ATTRS(2),
&dev_attr_alarms.attr,
&sda_beep_ctrl[0].dev_attr.attr,
&sda_beep_ctrl[1].dev_attr.attr,
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
&sda_pwm[0].dev_attr.attr,
&sda_pwm[1].dev_attr.attr,
&sda_pwm[2].dev_attr.attr,
&sda_pwmenable[0].dev_attr.attr,
&sda_pwmenable[1].dev_attr.attr,
&sda_pwmenable[2].dev_attr.attr,
&sda_temp_target[0].dev_attr.attr,
&sda_temp_target[1].dev_attr.attr,
&sda_temp_target[2].dev_attr.attr,
&sda_temp_tolerance[0].dev_attr.attr,
&sda_temp_tolerance[1].dev_attr.attr,
&sda_temp_tolerance[2].dev_attr.attr,
NULL
};
static const struct attribute_group w83791d_group = {
.attrs = w83791d_attributes,
};
/*
* Separate group of attributes for fan/pwm 4-5. Their pins can also be
* in use for GPIO in which case their sysfs-interface should not be made
* available
*/
static struct attribute *w83791d_attributes_fanpwm45[] = {
FAN_UNIT_ATTRS(3),
FAN_UNIT_ATTRS(4),
&sda_pwm[3].dev_attr.attr,
&sda_pwm[4].dev_attr.attr,
NULL
};
static const struct attribute_group w83791d_group_fanpwm45 = {
.attrs = w83791d_attributes_fanpwm45,
};
static int w83791d_detect_subclients(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
int address = client->addr;
int i, id;
u8 val;
id = i2c_adapter_id(adapter);
if (force_subclients[0] == id && force_subclients[1] == address) {
for (i = 2; i <= 3; i++) {
if (force_subclients[i] < 0x48 ||
force_subclients[i] > 0x4f) {
dev_err(&client->dev,
"invalid subclient "
"address %d; must be 0x48-0x4f\n",
force_subclients[i]);
return -ENODEV;
}
}
w83791d_write(client, W83791D_REG_I2C_SUBADDR,
(force_subclients[2] & 0x07) |
((force_subclients[3] & 0x07) << 4));
}
val = w83791d_read(client, W83791D_REG_I2C_SUBADDR);
if (!(val & 0x88) && (val & 0x7) == ((val >> 4) & 0x7)) {
dev_err(&client->dev,
"duplicate addresses 0x%x, use force_subclient\n", 0x48 + (val & 0x7));
return -ENODEV;
}
if (!(val & 0x08))
devm_i2c_new_dummy_device(&client->dev, adapter, 0x48 + (val & 0x7));
if (!(val & 0x80))
devm_i2c_new_dummy_device(&client->dev, adapter, 0x48 + ((val >> 4) & 0x7));
return 0;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int w83791d_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int val1, val2;
unsigned short address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80)
return -ENODEV;
val1 = w83791d_read(client, W83791D_REG_BANK);
val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
/* Check for Winbond ID if in bank 0 */
if (!(val1 & 0x07)) {
if ((!(val1 & 0x80) && val2 != 0xa3) ||
((val1 & 0x80) && val2 != 0x5c)) {
return -ENODEV;
}
}
/*
* If Winbond chip, address of chip and W83791D_REG_I2C_ADDR
* should match
*/
if (w83791d_read(client, W83791D_REG_I2C_ADDR) != address)
return -ENODEV;
/* We want bank 0 and Vendor ID high byte */
val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78;
w83791d_write(client, W83791D_REG_BANK, val1 | 0x80);
/* Verify it is a Winbond w83791d */
val1 = w83791d_read(client, W83791D_REG_WCHIPID);
val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
if (val1 != 0x71 || val2 != 0x5c)
return -ENODEV;
strscpy(info->type, "w83791d", I2C_NAME_SIZE);
return 0;
}
static int w83791d_probe(struct i2c_client *client)
{
struct w83791d_data *data;
struct device *dev = &client->dev;
int i, err;
u8 has_fanpwm45;
#ifdef DEBUG
int val1;
val1 = w83791d_read(client, W83791D_REG_DID_VID4);
dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n",
(val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1);
#endif
data = devm_kzalloc(&client->dev, sizeof(struct w83791d_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
err = w83791d_detect_subclients(client);
if (err)
return err;
/* Initialize the chip */
w83791d_init_client(client);
/*
* If the fan_div is changed, make sure there is a rational
* fan_min in place
*/
for (i = 0; i < NUMBER_OF_FANIN; i++)
data->fan_min[i] = w83791d_read(client, W83791D_REG_FAN_MIN[i]);
/* Register sysfs hooks */
err = sysfs_create_group(&client->dev.kobj, &w83791d_group);
if (err)
return err;
/* Check if pins of fan/pwm 4-5 are in use as GPIO */
has_fanpwm45 = w83791d_read(client, W83791D_REG_GPIO) & 0x10;
if (has_fanpwm45) {
err = sysfs_create_group(&client->dev.kobj,
&w83791d_group_fanpwm45);
if (err)
goto error4;
}
/* Everything is ready, now register the working device */
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto error5;
}
return 0;
error5:
if (has_fanpwm45)
sysfs_remove_group(&client->dev.kobj, &w83791d_group_fanpwm45);
error4:
sysfs_remove_group(&client->dev.kobj, &w83791d_group);
return err;
}
static void w83791d_remove(struct i2c_client *client)
{
struct w83791d_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &w83791d_group);
}
static void w83791d_init_client(struct i2c_client *client)
{
struct w83791d_data *data = i2c_get_clientdata(client);
u8 tmp;
u8 old_beep;
/*
* The difference between reset and init is that reset
* does a hard reset of the chip via index 0x40, bit 7,
* but init simply forces certain registers to have "sane"
* values. The hope is that the BIOS has done the right
* thing (which is why the default is reset=0, init=0),
* but if not, reset is the hard hammer and init
* is the soft mallet both of which are trying to whack
* things into place...
* NOTE: The data sheet makes a distinction between
* "power on defaults" and "reset by MR". As far as I can tell,
* the hard reset puts everything into a power-on state so I'm
* not sure what "reset by MR" means or how it can happen.
*/
if (reset || init) {
/* keep some BIOS settings when we... */
old_beep = w83791d_read(client, W83791D_REG_BEEP_CONFIG);
if (reset) {
/* ... reset the chip and ... */
w83791d_write(client, W83791D_REG_CONFIG, 0x80);
}
/* ... disable power-on abnormal beep */
w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80);
/* disable the global beep (not done by hard reset) */
tmp = w83791d_read(client, W83791D_REG_BEEP_CTRL[1]);
w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef);
if (init) {
/* Make sure monitoring is turned on for add-ons */
tmp = w83791d_read(client, W83791D_REG_TEMP2_CONFIG);
if (tmp & 1) {
w83791d_write(client, W83791D_REG_TEMP2_CONFIG,
tmp & 0xfe);
}
tmp = w83791d_read(client, W83791D_REG_TEMP3_CONFIG);
if (tmp & 1) {
w83791d_write(client, W83791D_REG_TEMP3_CONFIG,
tmp & 0xfe);
}
/* Start monitoring */
tmp = w83791d_read(client, W83791D_REG_CONFIG) & 0xf7;
w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01);
}
}
data->vrm = vid_which_vrm();
}
static struct w83791d_data *w83791d_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct w83791d_data *data = i2c_get_clientdata(client);
int i, j;
u8 reg_array_tmp[3];
u8 vbat_reg;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + (HZ * 3))
|| !data->valid) {
dev_dbg(dev, "Starting w83791d device update\n");
/* Update the voltages measured value and limits */
for (i = 0; i < NUMBER_OF_VIN; i++) {
data->in[i] = w83791d_read(client,
W83791D_REG_IN[i]);
data->in_max[i] = w83791d_read(client,
W83791D_REG_IN_MAX[i]);
data->in_min[i] = w83791d_read(client,
W83791D_REG_IN_MIN[i]);
}
/* Update the fan counts and limits */
for (i = 0; i < NUMBER_OF_FANIN; i++) {
/* Update the Fan measured value and limits */
data->fan[i] = w83791d_read(client,
W83791D_REG_FAN[i]);
data->fan_min[i] = w83791d_read(client,
W83791D_REG_FAN_MIN[i]);
}
/* Update the fan divisor */
for (i = 0; i < 3; i++) {
reg_array_tmp[i] = w83791d_read(client,
W83791D_REG_FAN_DIV[i]);
}
data->fan_div[0] = (reg_array_tmp[0] >> 4) & 0x03;
data->fan_div[1] = (reg_array_tmp[0] >> 6) & 0x03;
data->fan_div[2] = (reg_array_tmp[1] >> 6) & 0x03;
data->fan_div[3] = reg_array_tmp[2] & 0x07;
data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07;
/*
* The fan divisor for fans 0-2 get bit 2 from
* bits 5-7 respectively of vbat register
*/
vbat_reg = w83791d_read(client, W83791D_REG_VBAT);
for (i = 0; i < 3; i++)
data->fan_div[i] |= (vbat_reg >> (3 + i)) & 0x04;
/* Update PWM duty cycle */
for (i = 0; i < NUMBER_OF_PWM; i++) {
data->pwm[i] = w83791d_read(client,
W83791D_REG_PWM[i]);
}
/* Update PWM enable status */
for (i = 0; i < 2; i++) {
reg_array_tmp[i] = w83791d_read(client,
W83791D_REG_FAN_CFG[i]);
}
data->pwm_enable[0] = (reg_array_tmp[0] >> 2) & 0x03;
data->pwm_enable[1] = (reg_array_tmp[0] >> 4) & 0x03;
data->pwm_enable[2] = (reg_array_tmp[1] >> 2) & 0x03;
/* Update PWM target temperature */
for (i = 0; i < 3; i++) {
data->temp_target[i] = w83791d_read(client,
W83791D_REG_TEMP_TARGET[i]) & 0x7f;
}
/* Update PWM temperature tolerance */
for (i = 0; i < 2; i++) {
reg_array_tmp[i] = w83791d_read(client,
W83791D_REG_TEMP_TOL[i]);
}
data->temp_tolerance[0] = reg_array_tmp[0] & 0x0f;
data->temp_tolerance[1] = (reg_array_tmp[0] >> 4) & 0x0f;
data->temp_tolerance[2] = reg_array_tmp[1] & 0x0f;
/* Update the first temperature sensor */
for (i = 0; i < 3; i++) {
data->temp1[i] = w83791d_read(client,
W83791D_REG_TEMP1[i]);
}
/* Update the rest of the temperature sensors */
for (i = 0; i < 2; i++) {
for (j = 0; j < 3; j++) {
data->temp_add[i][j] =
(w83791d_read(client,
W83791D_REG_TEMP_ADD[i][j * 2]) << 8) |
w83791d_read(client,
W83791D_REG_TEMP_ADD[i][j * 2 + 1]);
}
}
/* Update the realtime status */
data->alarms =
w83791d_read(client, W83791D_REG_ALARM1) +
(w83791d_read(client, W83791D_REG_ALARM2) << 8) +
(w83791d_read(client, W83791D_REG_ALARM3) << 16);
/* Update the beep configuration information */
data->beep_mask =
w83791d_read(client, W83791D_REG_BEEP_CTRL[0]) +
(w83791d_read(client, W83791D_REG_BEEP_CTRL[1]) << 8) +
(w83791d_read(client, W83791D_REG_BEEP_CTRL[2]) << 16);
/* Extract global beep enable flag */
data->beep_enable =
(data->beep_mask >> GLOBAL_BEEP_ENABLE_SHIFT) & 0x01;
/* Update the cpu voltage information */
i = w83791d_read(client, W83791D_REG_VID_FANDIV);
data->vid = i & 0x0f;
data->vid |= (w83791d_read(client, W83791D_REG_DID_VID4) & 0x01)
<< 4;
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
#ifdef DEBUG
w83791d_print_debug(data, dev);
#endif
return data;
}
#ifdef DEBUG
static void w83791d_print_debug(struct w83791d_data *data, struct device *dev)
{
int i = 0, j = 0;
dev_dbg(dev, "======Start of w83791d debug values======\n");
dev_dbg(dev, "%d set of Voltages: ===>\n", NUMBER_OF_VIN);
for (i = 0; i < NUMBER_OF_VIN; i++) {
dev_dbg(dev, "vin[%d] is: 0x%02x\n", i, data->in[i]);
dev_dbg(dev, "vin[%d] min is: 0x%02x\n", i, data->in_min[i]);
dev_dbg(dev, "vin[%d] max is: 0x%02x\n", i, data->in_max[i]);
}
dev_dbg(dev, "%d set of Fan Counts/Divisors: ===>\n", NUMBER_OF_FANIN);
for (i = 0; i < NUMBER_OF_FANIN; i++) {
dev_dbg(dev, "fan[%d] is: 0x%02x\n", i, data->fan[i]);
dev_dbg(dev, "fan[%d] min is: 0x%02x\n", i, data->fan_min[i]);
dev_dbg(dev, "fan_div[%d] is: 0x%02x\n", i, data->fan_div[i]);
}
/*
* temperature math is signed, but only print out the
* bits that matter
*/
dev_dbg(dev, "%d set of Temperatures: ===>\n", NUMBER_OF_TEMPIN);
for (i = 0; i < 3; i++)
dev_dbg(dev, "temp1[%d] is: 0x%02x\n", i, (u8) data->temp1[i]);
for (i = 0; i < 2; i++) {
for (j = 0; j < 3; j++) {
dev_dbg(dev, "temp_add[%d][%d] is: 0x%04x\n", i, j,
(u16) data->temp_add[i][j]);
}
}
dev_dbg(dev, "Misc Information: ===>\n");
dev_dbg(dev, "alarm is: 0x%08x\n", data->alarms);
dev_dbg(dev, "beep_mask is: 0x%08x\n", data->beep_mask);
dev_dbg(dev, "beep_enable is: %d\n", data->beep_enable);
dev_dbg(dev, "vid is: 0x%02x\n", data->vid);
dev_dbg(dev, "vrm is: 0x%02x\n", data->vrm);
dev_dbg(dev, "=======End of w83791d debug values========\n");
dev_dbg(dev, "\n");
}
#endif
module_i2c_driver(w83791d_driver);
MODULE_AUTHOR("Charles Spirakis <[email protected]>");
MODULE_DESCRIPTION("W83791D driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/w83791d.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* emc1403.c - SMSC Thermal Driver
*
* Copyright (C) 2008 Intel Corp
*
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/sysfs.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#define THERMAL_PID_REG 0xfd
#define THERMAL_SMSC_ID_REG 0xfe
#define THERMAL_REVISION_REG 0xff
enum emc1403_chip { emc1402, emc1403, emc1404 };
struct thermal_data {
struct regmap *regmap;
struct mutex mutex;
const struct attribute_group *groups[4];
};
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sda = to_sensor_dev_attr(attr);
struct thermal_data *data = dev_get_drvdata(dev);
unsigned int val;
int retval;
retval = regmap_read(data->regmap, sda->index, &val);
if (retval < 0)
return retval;
return sprintf(buf, "%d000\n", val);
}
static ssize_t bit_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sda = to_sensor_dev_attr_2(attr);
struct thermal_data *data = dev_get_drvdata(dev);
unsigned int val;
int retval;
retval = regmap_read(data->regmap, sda->nr, &val);
if (retval < 0)
return retval;
return sprintf(buf, "%d\n", !!(val & sda->index));
}
static ssize_t temp_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sda = to_sensor_dev_attr(attr);
struct thermal_data *data = dev_get_drvdata(dev);
unsigned long val;
int retval;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
retval = regmap_write(data->regmap, sda->index,
DIV_ROUND_CLOSEST(val, 1000));
if (retval < 0)
return retval;
return count;
}
static ssize_t bit_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sda = to_sensor_dev_attr_2(attr);
struct thermal_data *data = dev_get_drvdata(dev);
unsigned long val;
int retval;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
retval = regmap_update_bits(data->regmap, sda->nr, sda->index,
val ? sda->index : 0);
if (retval < 0)
return retval;
return count;
}
static ssize_t show_hyst_common(struct device *dev,
struct device_attribute *attr, char *buf,
bool is_min)
{
struct sensor_device_attribute *sda = to_sensor_dev_attr(attr);
struct thermal_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
unsigned int limit;
unsigned int hyst;
int retval;
retval = regmap_read(regmap, sda->index, &limit);
if (retval < 0)
return retval;
retval = regmap_read(regmap, 0x21, &hyst);
if (retval < 0)
return retval;
return sprintf(buf, "%d000\n", is_min ? limit + hyst : limit - hyst);
}
static ssize_t hyst_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
return show_hyst_common(dev, attr, buf, false);
}
static ssize_t min_hyst_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return show_hyst_common(dev, attr, buf, true);
}
static ssize_t hyst_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sda = to_sensor_dev_attr(attr);
struct thermal_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
unsigned int limit;
int retval;
int hyst;
unsigned long val;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->mutex);
retval = regmap_read(regmap, sda->index, &limit);
if (retval < 0)
goto fail;
hyst = limit * 1000 - val;
hyst = clamp_val(DIV_ROUND_CLOSEST(hyst, 1000), 0, 255);
retval = regmap_write(regmap, 0x21, hyst);
if (retval == 0)
retval = count;
fail:
mutex_unlock(&data->mutex);
return retval;
}
/*
* Sensors. We pass the actual i2c register to the methods.
*/
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp, 0x06);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, 0x05);
static SENSOR_DEVICE_ATTR_RW(temp1_crit, temp, 0x20);
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0x00);
static SENSOR_DEVICE_ATTR_2_RO(temp1_min_alarm, bit, 0x36, 0x01);
static SENSOR_DEVICE_ATTR_2_RO(temp1_max_alarm, bit, 0x35, 0x01);
static SENSOR_DEVICE_ATTR_2_RO(temp1_crit_alarm, bit, 0x37, 0x01);
static SENSOR_DEVICE_ATTR_RO(temp1_min_hyst, min_hyst, 0x06);
static SENSOR_DEVICE_ATTR_RO(temp1_max_hyst, hyst, 0x05);
static SENSOR_DEVICE_ATTR_RW(temp1_crit_hyst, hyst, 0x20);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp, 0x08);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp, 0x07);
static SENSOR_DEVICE_ATTR_RW(temp2_crit, temp, 0x19);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 0x01);
static SENSOR_DEVICE_ATTR_2_RO(temp2_fault, bit, 0x1b, 0x02);
static SENSOR_DEVICE_ATTR_2_RO(temp2_min_alarm, bit, 0x36, 0x02);
static SENSOR_DEVICE_ATTR_2_RO(temp2_max_alarm, bit, 0x35, 0x02);
static SENSOR_DEVICE_ATTR_2_RO(temp2_crit_alarm, bit, 0x37, 0x02);
static SENSOR_DEVICE_ATTR_RO(temp2_min_hyst, min_hyst, 0x08);
static SENSOR_DEVICE_ATTR_RO(temp2_max_hyst, hyst, 0x07);
static SENSOR_DEVICE_ATTR_RO(temp2_crit_hyst, hyst, 0x19);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp, 0x16);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp, 0x15);
static SENSOR_DEVICE_ATTR_RW(temp3_crit, temp, 0x1A);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 0x23);
static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, bit, 0x1b, 0x04);
static SENSOR_DEVICE_ATTR_2_RO(temp3_min_alarm, bit, 0x36, 0x04);
static SENSOR_DEVICE_ATTR_2_RO(temp3_max_alarm, bit, 0x35, 0x04);
static SENSOR_DEVICE_ATTR_2_RO(temp3_crit_alarm, bit, 0x37, 0x04);
static SENSOR_DEVICE_ATTR_RO(temp3_min_hyst, min_hyst, 0x16);
static SENSOR_DEVICE_ATTR_RO(temp3_max_hyst, hyst, 0x15);
static SENSOR_DEVICE_ATTR_RO(temp3_crit_hyst, hyst, 0x1A);
static SENSOR_DEVICE_ATTR_RW(temp4_min, temp, 0x2D);
static SENSOR_DEVICE_ATTR_RW(temp4_max, temp, 0x2C);
static SENSOR_DEVICE_ATTR_RW(temp4_crit, temp, 0x30);
static SENSOR_DEVICE_ATTR_RO(temp4_input, temp, 0x2A);
static SENSOR_DEVICE_ATTR_2_RO(temp4_fault, bit, 0x1b, 0x08);
static SENSOR_DEVICE_ATTR_2_RO(temp4_min_alarm, bit, 0x36, 0x08);
static SENSOR_DEVICE_ATTR_2_RO(temp4_max_alarm, bit, 0x35, 0x08);
static SENSOR_DEVICE_ATTR_2_RO(temp4_crit_alarm, bit, 0x37, 0x08);
static SENSOR_DEVICE_ATTR_RO(temp4_min_hyst, min_hyst, 0x2D);
static SENSOR_DEVICE_ATTR_RO(temp4_max_hyst, hyst, 0x2C);
static SENSOR_DEVICE_ATTR_RO(temp4_crit_hyst, hyst, 0x30);
static SENSOR_DEVICE_ATTR_2_RW(power_state, bit, 0x03, 0x40);
static struct attribute *emc1402_attrs[] = {
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
&sensor_dev_attr_power_state.dev_attr.attr,
NULL
};
static const struct attribute_group emc1402_group = {
.attrs = emc1402_attrs,
};
static struct attribute *emc1403_attrs[] = {
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_crit.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_min_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
NULL
};
static const struct attribute_group emc1403_group = {
.attrs = emc1403_attrs,
};
static struct attribute *emc1404_attrs[] = {
&sensor_dev_attr_temp4_min.dev_attr.attr,
&sensor_dev_attr_temp4_max.dev_attr.attr,
&sensor_dev_attr_temp4_crit.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_temp4_fault.dev_attr.attr,
&sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_min_hyst.dev_attr.attr,
&sensor_dev_attr_temp4_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp4_crit_hyst.dev_attr.attr,
NULL
};
static const struct attribute_group emc1404_group = {
.attrs = emc1404_attrs,
};
/*
* EMC14x2 uses a different register and different bits to report alarm and
* fault status. For simplicity, provide a separate attribute group for this
* chip series.
* Since we can not re-use the same attribute names, create a separate attribute
* array.
*/
static struct sensor_device_attribute_2 emc1402_alarms[] = {
SENSOR_ATTR_2_RO(temp1_min_alarm, bit, 0x02, 0x20),
SENSOR_ATTR_2_RO(temp1_max_alarm, bit, 0x02, 0x40),
SENSOR_ATTR_2_RO(temp1_crit_alarm, bit, 0x02, 0x01),
SENSOR_ATTR_2_RO(temp2_fault, bit, 0x02, 0x04),
SENSOR_ATTR_2_RO(temp2_min_alarm, bit, 0x02, 0x08),
SENSOR_ATTR_2_RO(temp2_max_alarm, bit, 0x02, 0x10),
SENSOR_ATTR_2_RO(temp2_crit_alarm, bit, 0x02, 0x02),
};
static struct attribute *emc1402_alarm_attrs[] = {
&emc1402_alarms[0].dev_attr.attr,
&emc1402_alarms[1].dev_attr.attr,
&emc1402_alarms[2].dev_attr.attr,
&emc1402_alarms[3].dev_attr.attr,
&emc1402_alarms[4].dev_attr.attr,
&emc1402_alarms[5].dev_attr.attr,
&emc1402_alarms[6].dev_attr.attr,
NULL,
};
static const struct attribute_group emc1402_alarm_group = {
.attrs = emc1402_alarm_attrs,
};
static int emc1403_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
int id;
/* Check if thermal chip is SMSC and EMC1403 or EMC1423 */
id = i2c_smbus_read_byte_data(client, THERMAL_SMSC_ID_REG);
if (id != 0x5d)
return -ENODEV;
id = i2c_smbus_read_byte_data(client, THERMAL_PID_REG);
switch (id) {
case 0x20:
strscpy(info->type, "emc1402", I2C_NAME_SIZE);
break;
case 0x21:
strscpy(info->type, "emc1403", I2C_NAME_SIZE);
break;
case 0x22:
strscpy(info->type, "emc1422", I2C_NAME_SIZE);
break;
case 0x23:
strscpy(info->type, "emc1423", I2C_NAME_SIZE);
break;
case 0x25:
strscpy(info->type, "emc1404", I2C_NAME_SIZE);
break;
case 0x27:
strscpy(info->type, "emc1424", I2C_NAME_SIZE);
break;
default:
return -ENODEV;
}
id = i2c_smbus_read_byte_data(client, THERMAL_REVISION_REG);
if (id < 0x01 || id > 0x04)
return -ENODEV;
return 0;
}
static bool emc1403_regmap_is_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case 0x00: /* internal diode high byte */
case 0x01: /* external diode 1 high byte */
case 0x02: /* status */
case 0x10: /* external diode 1 low byte */
case 0x1b: /* external diode fault */
case 0x23: /* external diode 2 high byte */
case 0x24: /* external diode 2 low byte */
case 0x29: /* internal diode low byte */
case 0x2a: /* externl diode 3 high byte */
case 0x2b: /* external diode 3 low byte */
case 0x35: /* high limit status */
case 0x36: /* low limit status */
case 0x37: /* therm limit status */
return true;
default:
return false;
}
}
static const struct regmap_config emc1403_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = emc1403_regmap_is_volatile,
};
static const struct i2c_device_id emc1403_idtable[];
static int emc1403_probe(struct i2c_client *client)
{
struct thermal_data *data;
struct device *hwmon_dev;
const struct i2c_device_id *id = i2c_match_id(emc1403_idtable, client);
data = devm_kzalloc(&client->dev, sizeof(struct thermal_data),
GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
data->regmap = devm_regmap_init_i2c(client, &emc1403_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
mutex_init(&data->mutex);
switch (id->driver_data) {
case emc1404:
data->groups[2] = &emc1404_group;
fallthrough;
case emc1403:
data->groups[1] = &emc1403_group;
fallthrough;
case emc1402:
data->groups[0] = &emc1402_group;
}
if (id->driver_data == emc1402)
data->groups[1] = &emc1402_alarm_group;
hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
client->name, data,
data->groups);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
dev_info(&client->dev, "%s Thermal chip found\n", id->name);
return 0;
}
static const unsigned short emc1403_address_list[] = {
0x18, 0x1c, 0x29, 0x4c, 0x4d, 0x5c, I2C_CLIENT_END
};
/* Last digit of chip name indicates number of channels */
static const struct i2c_device_id emc1403_idtable[] = {
{ "emc1402", emc1402 },
{ "emc1403", emc1403 },
{ "emc1404", emc1404 },
{ "emc1412", emc1402 },
{ "emc1413", emc1403 },
{ "emc1414", emc1404 },
{ "emc1422", emc1402 },
{ "emc1423", emc1403 },
{ "emc1424", emc1404 },
{ }
};
MODULE_DEVICE_TABLE(i2c, emc1403_idtable);
static struct i2c_driver sensor_emc1403 = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "emc1403",
},
.detect = emc1403_detect,
.probe = emc1403_probe,
.id_table = emc1403_idtable,
.address_list = emc1403_address_list,
};
module_i2c_driver(sensor_emc1403);
MODULE_AUTHOR("Kalhan Trisal <[email protected]");
MODULE_DESCRIPTION("emc1403 Thermal Driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/emc1403.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ds620.c - Support for temperature sensor and thermostat DS620
*
* Copyright (C) 2010, 2011 Roland Stigge <[email protected]>
*
* based on ds1621.c by Christian W. Zuckschwerdt <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/platform_data/ds620.h>
/*
* Many DS620 constants specified below
* 15 14 13 12 11 10 09 08
* |Done|NVB |THF |TLF |R1 |R0 |AUTOC|1SHOT|
*
* 07 06 05 04 03 02 01 00
* |PO2 |PO1 |A2 |A1 |A0 | | | |
*/
#define DS620_REG_CONFIG_DONE 0x8000
#define DS620_REG_CONFIG_NVB 0x4000
#define DS620_REG_CONFIG_THF 0x2000
#define DS620_REG_CONFIG_TLF 0x1000
#define DS620_REG_CONFIG_R1 0x0800
#define DS620_REG_CONFIG_R0 0x0400
#define DS620_REG_CONFIG_AUTOC 0x0200
#define DS620_REG_CONFIG_1SHOT 0x0100
#define DS620_REG_CONFIG_PO2 0x0080
#define DS620_REG_CONFIG_PO1 0x0040
#define DS620_REG_CONFIG_A2 0x0020
#define DS620_REG_CONFIG_A1 0x0010
#define DS620_REG_CONFIG_A0 0x0008
/* The DS620 registers */
static const u8 DS620_REG_TEMP[3] = {
0xAA, /* input, word, RO */
0xA2, /* min, word, RW */
0xA0, /* max, word, RW */
};
#define DS620_REG_CONF 0xAC /* word, RW */
#define DS620_COM_START 0x51 /* no data */
#define DS620_COM_STOP 0x22 /* no data */
/* Each client has this additional data */
struct ds620_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
s16 temp[3]; /* Register values, word */
};
static void ds620_init_client(struct i2c_client *client)
{
struct ds620_platform_data *ds620_info = dev_get_platdata(&client->dev);
u16 conf, new_conf;
new_conf = conf =
i2c_smbus_read_word_swapped(client, DS620_REG_CONF);
/* switch to continuous conversion mode */
new_conf &= ~DS620_REG_CONFIG_1SHOT;
/* already high at power-on, but don't trust the BIOS! */
new_conf |= DS620_REG_CONFIG_PO2;
/* thermostat mode according to platform data */
if (ds620_info && ds620_info->pomode == 1)
new_conf &= ~DS620_REG_CONFIG_PO1; /* PO_LOW */
else if (ds620_info && ds620_info->pomode == 2)
new_conf |= DS620_REG_CONFIG_PO1; /* PO_HIGH */
else
new_conf &= ~DS620_REG_CONFIG_PO2; /* always low */
/* with highest precision */
new_conf |= DS620_REG_CONFIG_R1 | DS620_REG_CONFIG_R0;
if (conf != new_conf)
i2c_smbus_write_word_swapped(client, DS620_REG_CONF, new_conf);
/* start conversion */
i2c_smbus_write_byte(client, DS620_COM_START);
}
static struct ds620_data *ds620_update_client(struct device *dev)
{
struct ds620_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct ds620_data *ret = data;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
int i;
int res;
dev_dbg(&client->dev, "Starting ds620 update\n");
for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
res = i2c_smbus_read_word_swapped(client,
DS620_REG_TEMP[i]);
if (res < 0) {
ret = ERR_PTR(res);
goto abort;
}
data->temp[i] = res;
}
data->last_updated = jiffies;
data->valid = true;
}
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ds620_data *data = ds620_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", ((data->temp[attr->index] / 8) * 625) / 10);
}
static ssize_t temp_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int res;
long val;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ds620_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
res = kstrtol(buf, 10, &val);
if (res)
return res;
val = (clamp_val(val, -128000, 128000) * 10 / 625) * 8;
mutex_lock(&data->update_lock);
data->temp[attr->index] = val;
i2c_smbus_write_word_swapped(client, DS620_REG_TEMP[attr->index],
data->temp[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ds620_data *data = ds620_update_client(dev);
struct i2c_client *client;
u16 conf, new_conf;
int res;
if (IS_ERR(data))
return PTR_ERR(data);
client = data->client;
/* reset alarms if necessary */
res = i2c_smbus_read_word_swapped(client, DS620_REG_CONF);
if (res < 0)
return res;
new_conf = conf = res;
new_conf &= ~attr->index;
if (conf != new_conf) {
res = i2c_smbus_write_word_swapped(client, DS620_REG_CONF,
new_conf);
if (res < 0)
return res;
}
return sprintf(buf, "%d\n", !!(conf & attr->index));
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, 2);
static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, alarm, DS620_REG_CONFIG_TLF);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, DS620_REG_CONFIG_THF);
static struct attribute *ds620_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(ds620);
static int ds620_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct ds620_data *data;
data = devm_kzalloc(dev, sizeof(struct ds620_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Initialize the DS620 chip */
ds620_init_client(client);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, ds620_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ds620_id[] = {
{"ds620", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, ds620_id);
/* This is the driver that will be inserted */
static struct i2c_driver ds620_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "ds620",
},
.probe = ds620_probe,
.id_table = ds620_id,
};
module_i2c_driver(ds620_driver);
MODULE_AUTHOR("Roland Stigge <[email protected]>");
MODULE_DESCRIPTION("DS620 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ds620.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* HWMON driver for ASUS motherboards that provides sensor readouts via WMI
* interface present in the UEFI of the X370/X470/B450/X399 Ryzen motherboards.
*
* Copyright (C) 2018-2019 Ed Brindley <[email protected]>
*
* WMI interface provides:
* - CPU Core Voltage,
* - CPU SOC Voltage,
* - DRAM Voltage,
* - VDDP Voltage,
* - 1.8V PLL Voltage,
* - +12V Voltage,
* - +5V Voltage,
* - 3VSB Voltage,
* - VBAT Voltage,
* - AVCC3 Voltage,
* - SB 1.05V Voltage,
* - CPU Core Voltage,
* - CPU SOC Voltage,
* - DRAM Voltage,
* - CPU Fan RPM,
* - Chassis Fan 1 RPM,
* - Chassis Fan 2 RPM,
* - Chassis Fan 3 RPM,
* - HAMP Fan RPM,
* - Water Pump RPM,
* - CPU OPT RPM,
* - Water Flow RPM,
* - AIO Pump RPM,
* - CPU Temperature,
* - CPU Socket Temperature,
* - Motherboard Temperature,
* - Chipset Temperature,
* - Tsensor 1 Temperature,
* - CPU VRM Temperature,
* - Water In,
* - Water Out,
* - CPU VRM Output Current.
*/
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/units.h>
#include <linux/wmi.h>
#define ASUSWMI_MONITORING_GUID "466747A0-70EC-11DE-8A39-0800200C9A66"
#define ASUSWMI_METHODID_GET_VALUE 0x52574543 /* RWEC */
#define ASUSWMI_METHODID_UPDATE_BUFFER 0x51574543 /* QWEC */
#define ASUSWMI_METHODID_GET_INFO 0x50574543 /* PWEC */
#define ASUSWMI_METHODID_GET_NUMBER 0x50574572 /* PWEr */
#define ASUSWMI_METHODID_GET_VERSION 0x50574574 /* PWEt */
#define ASUS_WMI_MAX_STR_SIZE 32
#define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name) { \
.matches = { \
DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "ASUSTeK COMPUTER INC."), \
DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
}, \
}
static const struct dmi_system_id asus_wmi_dmi_table[] = {
DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X399-A"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VI EXTREME"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("CROSSHAIR VI HERO"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VI HERO (WI-FI AC)"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VII HERO"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VII HERO (WI-FI)"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B450-E GAMING"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B450-F GAMING"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B450-F GAMING II"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B450-I GAMING"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X399-E GAMING"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X470-F GAMING"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X470-I GAMING"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH EXTREME"),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH EXTREME ALPHA"),
{}
};
MODULE_DEVICE_TABLE(dmi, asus_wmi_dmi_table);
enum asus_wmi_sensor_class {
VOLTAGE = 0x0,
TEMPERATURE_C = 0x1,
FAN_RPM = 0x2,
CURRENT = 0x3,
WATER_FLOW = 0x4,
};
enum asus_wmi_location {
CPU = 0x0,
CPU_SOC = 0x1,
DRAM = 0x2,
MOTHERBOARD = 0x3,
CHIPSET = 0x4,
AUX = 0x5,
VRM = 0x6,
COOLER = 0x7
};
enum asus_wmi_type {
SIGNED_INT = 0x0,
UNSIGNED_INT = 0x1,
SCALED = 0x3,
};
enum asus_wmi_source {
SIO = 0x1,
EC = 0x2
};
static enum hwmon_sensor_types asus_data_types[] = {
[VOLTAGE] = hwmon_in,
[TEMPERATURE_C] = hwmon_temp,
[FAN_RPM] = hwmon_fan,
[CURRENT] = hwmon_curr,
[WATER_FLOW] = hwmon_fan,
};
static u32 hwmon_attributes[hwmon_max] = {
[hwmon_chip] = HWMON_C_REGISTER_TZ,
[hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
[hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
[hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
[hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL,
};
/**
* struct asus_wmi_sensor_info - sensor info.
* @id: sensor id.
* @data_type: sensor class e.g. voltage, temp etc.
* @location: sensor location.
* @name: sensor name.
* @source: sensor source.
* @type: sensor type signed, unsigned etc.
* @cached_value: cached sensor value.
*/
struct asus_wmi_sensor_info {
u32 id;
int data_type;
int location;
char name[ASUS_WMI_MAX_STR_SIZE];
int source;
int type;
long cached_value;
};
struct asus_wmi_wmi_info {
unsigned long source_last_updated[3]; /* in jiffies */
int sensor_count;
const struct asus_wmi_sensor_info **info[hwmon_max];
struct asus_wmi_sensor_info **info_by_id;
};
struct asus_wmi_sensors {
struct asus_wmi_wmi_info wmi;
/* lock access to internal cache */
struct mutex lock;
};
/*
* Universal method for calling WMI method
*/
static int asus_wmi_call_method(u32 method_id, u32 *args, struct acpi_buffer *output)
{
struct acpi_buffer input = {(acpi_size) sizeof(*args), args };
acpi_status status;
status = wmi_evaluate_method(ASUSWMI_MONITORING_GUID, 0,
method_id, &input, output);
if (ACPI_FAILURE(status))
return -EIO;
return 0;
}
/*
* Gets the version of the ASUS sensors interface implemented
*/
static int asus_wmi_get_version(u32 *version)
{
struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
u32 args[] = {0, 0, 0};
union acpi_object *obj;
int err;
err = asus_wmi_call_method(ASUSWMI_METHODID_GET_VERSION, args, &output);
if (err)
return err;
obj = output.pointer;
if (!obj)
return -EIO;
if (obj->type != ACPI_TYPE_INTEGER) {
err = -EIO;
goto out_free_obj;
}
err = 0;
*version = obj->integer.value;
out_free_obj:
ACPI_FREE(obj);
return err;
}
/*
* Gets the number of sensor items
*/
static int asus_wmi_get_item_count(u32 *count)
{
struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
u32 args[] = {0, 0, 0};
union acpi_object *obj;
int err;
err = asus_wmi_call_method(ASUSWMI_METHODID_GET_NUMBER, args, &output);
if (err)
return err;
obj = output.pointer;
if (!obj)
return -EIO;
if (obj->type != ACPI_TYPE_INTEGER) {
err = -EIO;
goto out_free_obj;
}
err = 0;
*count = obj->integer.value;
out_free_obj:
ACPI_FREE(obj);
return err;
}
static int asus_wmi_hwmon_add_chan_info(struct hwmon_channel_info *asus_wmi_hwmon_chan,
struct device *dev, int num,
enum hwmon_sensor_types type, u32 config)
{
u32 *cfg;
cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
if (!cfg)
return -ENOMEM;
asus_wmi_hwmon_chan->type = type;
asus_wmi_hwmon_chan->config = cfg;
memset32(cfg, config, num);
return 0;
}
/*
* For a given sensor item returns details e.g. type (voltage/temperature/fan speed etc), bank etc
*/
static int asus_wmi_sensor_info(int index, struct asus_wmi_sensor_info *s)
{
union acpi_object name_obj, data_type_obj, location_obj, source_obj, type_obj;
struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
u32 args[] = {index, 0};
union acpi_object *obj;
int err;
err = asus_wmi_call_method(ASUSWMI_METHODID_GET_INFO, args, &output);
if (err)
return err;
s->id = index;
obj = output.pointer;
if (!obj)
return -EIO;
if (obj->type != ACPI_TYPE_PACKAGE) {
err = -EIO;
goto out_free_obj;
}
if (obj->package.count != 5) {
err = -EIO;
goto out_free_obj;
}
name_obj = obj->package.elements[0];
if (name_obj.type != ACPI_TYPE_STRING) {
err = -EIO;
goto out_free_obj;
}
strncpy(s->name, name_obj.string.pointer, sizeof(s->name) - 1);
data_type_obj = obj->package.elements[1];
if (data_type_obj.type != ACPI_TYPE_INTEGER) {
err = -EIO;
goto out_free_obj;
}
s->data_type = data_type_obj.integer.value;
location_obj = obj->package.elements[2];
if (location_obj.type != ACPI_TYPE_INTEGER) {
err = -EIO;
goto out_free_obj;
}
s->location = location_obj.integer.value;
source_obj = obj->package.elements[3];
if (source_obj.type != ACPI_TYPE_INTEGER) {
err = -EIO;
goto out_free_obj;
}
s->source = source_obj.integer.value;
type_obj = obj->package.elements[4];
if (type_obj.type != ACPI_TYPE_INTEGER) {
err = -EIO;
goto out_free_obj;
}
err = 0;
s->type = type_obj.integer.value;
out_free_obj:
ACPI_FREE(obj);
return err;
}
static int asus_wmi_update_buffer(int source)
{
struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
u32 args[] = {source, 0};
return asus_wmi_call_method(ASUSWMI_METHODID_UPDATE_BUFFER, args, &output);
}
static int asus_wmi_get_sensor_value(u8 index, long *value)
{
struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
u32 args[] = {index, 0};
union acpi_object *obj;
int err;
err = asus_wmi_call_method(ASUSWMI_METHODID_GET_VALUE, args, &output);
if (err)
return err;
obj = output.pointer;
if (!obj)
return -EIO;
if (obj->type != ACPI_TYPE_INTEGER) {
err = -EIO;
goto out_free_obj;
}
err = 0;
*value = obj->integer.value;
out_free_obj:
ACPI_FREE(obj);
return err;
}
static int asus_wmi_update_values_for_source(u8 source, struct asus_wmi_sensors *sensor_data)
{
struct asus_wmi_sensor_info *sensor;
long value = 0;
int ret;
int i;
for (i = 0; i < sensor_data->wmi.sensor_count; i++) {
sensor = sensor_data->wmi.info_by_id[i];
if (sensor && sensor->source == source) {
ret = asus_wmi_get_sensor_value(sensor->id, &value);
if (ret)
return ret;
sensor->cached_value = value;
}
}
return 0;
}
static int asus_wmi_scale_sensor_value(u32 value, int data_type)
{
/* FAN_RPM and WATER_FLOW don't need scaling */
switch (data_type) {
case VOLTAGE:
/* value in microVolts */
return DIV_ROUND_CLOSEST(value, KILO);
case TEMPERATURE_C:
/* value in Celsius */
return value * MILLIDEGREE_PER_DEGREE;
case CURRENT:
/* value in Amperes */
return value * MILLI;
}
return value;
}
static int asus_wmi_get_cached_value_or_update(const struct asus_wmi_sensor_info *sensor,
struct asus_wmi_sensors *sensor_data,
u32 *value)
{
int ret = 0;
mutex_lock(&sensor_data->lock);
if (time_after(jiffies, sensor_data->wmi.source_last_updated[sensor->source] + HZ)) {
ret = asus_wmi_update_buffer(sensor->source);
if (ret)
goto unlock;
ret = asus_wmi_update_values_for_source(sensor->source, sensor_data);
if (ret)
goto unlock;
sensor_data->wmi.source_last_updated[sensor->source] = jiffies;
}
*value = sensor->cached_value;
unlock:
mutex_unlock(&sensor_data->lock);
return ret;
}
/* Now follow the functions that implement the hwmon interface */
static int asus_wmi_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
const struct asus_wmi_sensor_info *sensor;
u32 value = 0;
int ret;
struct asus_wmi_sensors *sensor_data = dev_get_drvdata(dev);
sensor = *(sensor_data->wmi.info[type] + channel);
ret = asus_wmi_get_cached_value_or_update(sensor, sensor_data, &value);
if (ret)
return ret;
*val = asus_wmi_scale_sensor_value(value, sensor->data_type);
return ret;
}
static int asus_wmi_hwmon_read_string(struct device *dev,
enum hwmon_sensor_types type, u32 attr,
int channel, const char **str)
{
struct asus_wmi_sensors *sensor_data = dev_get_drvdata(dev);
const struct asus_wmi_sensor_info *sensor;
sensor = *(sensor_data->wmi.info[type] + channel);
*str = sensor->name;
return 0;
}
static umode_t asus_wmi_hwmon_is_visible(const void *drvdata,
enum hwmon_sensor_types type, u32 attr,
int channel)
{
const struct asus_wmi_sensors *sensor_data = drvdata;
const struct asus_wmi_sensor_info *sensor;
sensor = *(sensor_data->wmi.info[type] + channel);
if (sensor)
return 0444;
return 0;
}
static const struct hwmon_ops asus_wmi_hwmon_ops = {
.is_visible = asus_wmi_hwmon_is_visible,
.read = asus_wmi_hwmon_read,
.read_string = asus_wmi_hwmon_read_string,
};
static struct hwmon_chip_info asus_wmi_chip_info = {
.ops = &asus_wmi_hwmon_ops,
.info = NULL,
};
static int asus_wmi_configure_sensor_setup(struct device *dev,
struct asus_wmi_sensors *sensor_data)
{
const struct hwmon_channel_info **ptr_asus_wmi_ci;
struct hwmon_channel_info *asus_wmi_hwmon_chan;
int nr_count[hwmon_max] = {}, nr_types = 0;
struct asus_wmi_sensor_info *temp_sensor;
const struct hwmon_chip_info *chip_info;
enum hwmon_sensor_types type;
struct device *hwdev;
int i, idx;
int err;
for (i = 0; i < sensor_data->wmi.sensor_count; i++) {
struct asus_wmi_sensor_info sensor;
err = asus_wmi_sensor_info(i, &sensor);
if (err)
return err;
switch (sensor.data_type) {
case TEMPERATURE_C:
case VOLTAGE:
case CURRENT:
case FAN_RPM:
case WATER_FLOW:
type = asus_data_types[sensor.data_type];
if (!nr_count[type])
nr_types++;
nr_count[type]++;
break;
}
}
if (nr_count[hwmon_temp])
nr_count[hwmon_chip]++, nr_types++;
asus_wmi_hwmon_chan = devm_kcalloc(dev, nr_types,
sizeof(*asus_wmi_hwmon_chan),
GFP_KERNEL);
if (!asus_wmi_hwmon_chan)
return -ENOMEM;
ptr_asus_wmi_ci = devm_kcalloc(dev, nr_types + 1,
sizeof(*ptr_asus_wmi_ci), GFP_KERNEL);
if (!ptr_asus_wmi_ci)
return -ENOMEM;
asus_wmi_chip_info.info = ptr_asus_wmi_ci;
chip_info = &asus_wmi_chip_info;
sensor_data->wmi.info_by_id = devm_kcalloc(dev, sensor_data->wmi.sensor_count,
sizeof(*sensor_data->wmi.info_by_id),
GFP_KERNEL);
if (!sensor_data->wmi.info_by_id)
return -ENOMEM;
for (type = 0; type < hwmon_max; type++) {
if (!nr_count[type])
continue;
err = asus_wmi_hwmon_add_chan_info(asus_wmi_hwmon_chan, dev,
nr_count[type], type,
hwmon_attributes[type]);
if (err)
return err;
*ptr_asus_wmi_ci++ = asus_wmi_hwmon_chan++;
sensor_data->wmi.info[type] = devm_kcalloc(dev,
nr_count[type],
sizeof(*sensor_data->wmi.info),
GFP_KERNEL);
if (!sensor_data->wmi.info[type])
return -ENOMEM;
}
for (i = sensor_data->wmi.sensor_count - 1; i >= 0; i--) {
temp_sensor = devm_kzalloc(dev, sizeof(*temp_sensor), GFP_KERNEL);
if (!temp_sensor)
return -ENOMEM;
err = asus_wmi_sensor_info(i, temp_sensor);
if (err)
continue;
switch (temp_sensor->data_type) {
case TEMPERATURE_C:
case VOLTAGE:
case CURRENT:
case FAN_RPM:
case WATER_FLOW:
type = asus_data_types[temp_sensor->data_type];
idx = --nr_count[type];
*(sensor_data->wmi.info[type] + idx) = temp_sensor;
sensor_data->wmi.info_by_id[i] = temp_sensor;
break;
}
}
dev_dbg(dev, "board has %d sensors",
sensor_data->wmi.sensor_count);
hwdev = devm_hwmon_device_register_with_info(dev, "asus_wmi_sensors",
sensor_data, chip_info, NULL);
return PTR_ERR_OR_ZERO(hwdev);
}
static int asus_wmi_probe(struct wmi_device *wdev, const void *context)
{
struct asus_wmi_sensors *sensor_data;
struct device *dev = &wdev->dev;
u32 version = 0;
if (!dmi_check_system(asus_wmi_dmi_table))
return -ENODEV;
sensor_data = devm_kzalloc(dev, sizeof(*sensor_data), GFP_KERNEL);
if (!sensor_data)
return -ENOMEM;
if (asus_wmi_get_version(&version))
return -ENODEV;
if (asus_wmi_get_item_count(&sensor_data->wmi.sensor_count))
return -ENODEV;
if (sensor_data->wmi.sensor_count <= 0 || version < 2) {
dev_info(dev, "version: %u with %d sensors is unsupported\n",
version, sensor_data->wmi.sensor_count);
return -ENODEV;
}
mutex_init(&sensor_data->lock);
dev_set_drvdata(dev, sensor_data);
return asus_wmi_configure_sensor_setup(dev, sensor_data);
}
static const struct wmi_device_id asus_wmi_id_table[] = {
{ ASUSWMI_MONITORING_GUID, NULL },
{ }
};
static struct wmi_driver asus_sensors_wmi_driver = {
.driver = {
.name = "asus_wmi_sensors",
},
.id_table = asus_wmi_id_table,
.probe = asus_wmi_probe,
};
module_wmi_driver(asus_sensors_wmi_driver);
MODULE_AUTHOR("Ed Brindley <[email protected]>");
MODULE_DESCRIPTION("Asus WMI Sensors Driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/asus_wmi_sensors.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (c) 1998 - 2001 Frodo Looijaard <[email protected]>,
* Philip Edelbrock <[email protected]>,
* and Mark Studebaker <[email protected]>
* Copyright (c) 2007 - 2008 Jean Delvare <[email protected]>
*/
/*
* Supports following chips:
*
* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* as99127f 7 3 0 3 0x31 0x12c3 yes no
* as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
* w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
* w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
* w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
*
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-vid.h>
#include <linux/hwmon-sysfs.h>
#include <linux/sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#ifdef CONFIG_ISA
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/io.h>
#endif
#include "lm75.h"
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
0x2e, 0x2f, I2C_CLIENT_END };
enum chips { w83781d, w83782d, w83783s, as99127f };
/* Insmod parameters */
static unsigned short force_subclients[4];
module_param_array(force_subclients, short, NULL, 0);
MODULE_PARM_DESC(force_subclients,
"List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
static bool reset;
module_param(reset, bool, 0);
MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
static bool init = 1;
module_param(init, bool, 0);
MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
/* Constants specified below */
/* Length of ISA address segment */
#define W83781D_EXTENT 8
/* Where are the ISA address/data registers relative to the base address */
#define W83781D_ADDR_REG_OFFSET 5
#define W83781D_DATA_REG_OFFSET 6
/* The device registers */
/* in nr from 0 to 8 */
#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
(0x554 + (((nr) - 7) * 2)))
#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
(0x555 + (((nr) - 7) * 2)))
#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
(0x550 + (nr) - 7))
/* fan nr from 0 to 2 */
#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
#define W83781D_REG_FAN(nr) (0x28 + (nr))
#define W83781D_REG_BANK 0x4E
#define W83781D_REG_TEMP2_CONFIG 0x152
#define W83781D_REG_TEMP3_CONFIG 0x252
/* temp nr from 1 to 3 */
#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
((nr == 2) ? (0x0150) : \
(0x27)))
#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
((nr == 2) ? (0x153) : \
(0x3A)))
#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
((nr == 2) ? (0x155) : \
(0x39)))
#define W83781D_REG_CONFIG 0x40
/* Interrupt status (W83781D, AS99127F) */
#define W83781D_REG_ALARM1 0x41
#define W83781D_REG_ALARM2 0x42
/* Real-time status (W83782D, W83783S) */
#define W83782D_REG_ALARM1 0x459
#define W83782D_REG_ALARM2 0x45A
#define W83782D_REG_ALARM3 0x45B
#define W83781D_REG_BEEP_CONFIG 0x4D
#define W83781D_REG_BEEP_INTS1 0x56
#define W83781D_REG_BEEP_INTS2 0x57
#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
#define W83781D_REG_VID_FANDIV 0x47
#define W83781D_REG_CHIPID 0x49
#define W83781D_REG_WCHIPID 0x58
#define W83781D_REG_CHIPMAN 0x4F
#define W83781D_REG_PIN 0x4B
/* 782D/783S only */
#define W83781D_REG_VBAT 0x5D
/* PWM 782D (1-4) and 783S (1-2) only */
static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
#define W83781D_REG_PWMCLK12 0x5C
#define W83781D_REG_PWMCLK34 0x45C
#define W83781D_REG_I2C_ADDR 0x48
#define W83781D_REG_I2C_SUBADDR 0x4A
/*
* The following are undocumented in the data sheets however we
* received the information in an email from Winbond tech support
*/
/* Sensor selection - not on 781d */
#define W83781D_REG_SCFG1 0x5D
static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
#define W83781D_REG_SCFG2 0x59
static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
#define W83781D_DEFAULT_BETA 3435
/* Conversions */
#define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
#define IN_FROM_REG(val) ((val) * 16)
static inline u8
FAN_TO_REG(long rpm, int div)
{
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
static inline long
FAN_FROM_REG(u8 val, int div)
{
if (val == 0)
return -1;
if (val == 255)
return 0;
return 1350000 / (val * div);
}
#define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
#define TEMP_FROM_REG(val) ((val) * 1000)
#define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
(~(val)) & 0x7fff : (val) & 0xff7fff)
#define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
(~(val)) & 0x7fff : (val) & 0xff7fff)
#define DIV_FROM_REG(val) (1 << (val))
static inline u8
DIV_TO_REG(long val, enum chips type)
{
int i;
val = clamp_val(val, 1,
((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
for (i = 0; i < 7; i++) {
if (val == 0)
break;
val >>= 1;
}
return i;
}
struct w83781d_data {
struct i2c_client *client;
struct device *hwmon_dev;
struct mutex lock;
enum chips type;
/* For ISA device only */
const char *name;
int isa_addr;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
struct i2c_client *lm75[2]; /* for secondary I2C addresses */
/* array of 2 pointers to subclients */
u8 in[9]; /* Register value - 8 & 9 for 782D only */
u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
u8 fan[3]; /* Register value */
u8 fan_min[3]; /* Register value */
s8 temp; /* Register value */
s8 temp_max; /* Register value */
s8 temp_max_hyst; /* Register value */
u16 temp_add[2]; /* Register value */
u16 temp_max_add[2]; /* Register value */
u16 temp_max_hyst_add[2]; /* Register value */
u8 fan_div[3]; /* Register encoding, shifted right */
u8 vid; /* Register encoding, combined */
u32 alarms; /* Register encoding, combined */
u32 beep_mask; /* Register encoding, combined */
u8 pwm[4]; /* Register value */
u8 pwm2_enable; /* Boolean */
u16 sens[3]; /*
* 782D/783S only.
* 1 = pentium diode; 2 = 3904 diode;
* 4 = thermistor
*/
u8 vrm;
};
static struct w83781d_data *w83781d_data_if_isa(void);
static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
static int w83781d_read_value(struct w83781d_data *data, u16 reg);
static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
static struct w83781d_data *w83781d_update_device(struct device *dev);
static void w83781d_init_device(struct device *dev);
/* following are the sysfs callback functions */
#define show_in_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
char *buf) \
{ \
struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
struct w83781d_data *data = w83781d_update_device(dev); \
return sprintf(buf, "%ld\n", \
(long)IN_FROM_REG(data->reg[attr->index])); \
}
show_in_reg(in);
show_in_reg(in_min);
show_in_reg(in_max);
#define store_in_reg(REG, reg) \
static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
*da, const char *buf, size_t count) \
{ \
struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
struct w83781d_data *data = dev_get_drvdata(dev); \
int nr = attr->index; \
unsigned long val; \
int err = kstrtoul(buf, 10, &val); \
if (err) \
return err; \
mutex_lock(&data->update_lock); \
data->in_##reg[nr] = IN_TO_REG(val); \
w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
data->in_##reg[nr]); \
\
mutex_unlock(&data->update_lock); \
return count; \
}
store_in_reg(MIN, min);
store_in_reg(MAX, max);
#define sysfs_in_offsets(offset) \
static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
show_in, NULL, offset); \
static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
show_in_min, store_in_min, offset); \
static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
show_in_max, store_in_max, offset)
sysfs_in_offsets(0);
sysfs_in_offsets(1);
sysfs_in_offsets(2);
sysfs_in_offsets(3);
sysfs_in_offsets(4);
sysfs_in_offsets(5);
sysfs_in_offsets(6);
sysfs_in_offsets(7);
sysfs_in_offsets(8);
#define show_fan_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
char *buf) \
{ \
struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
struct w83781d_data *data = w83781d_update_device(dev); \
return sprintf(buf, "%ld\n", \
FAN_FROM_REG(data->reg[attr->index], \
DIV_FROM_REG(data->fan_div[attr->index]))); \
}
show_fan_reg(fan);
show_fan_reg(fan_min);
static ssize_t
store_fan_min(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct w83781d_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] =
FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
show_fan_min, store_fan_min, 0);
static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
show_fan_min, store_fan_min, 1);
static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
show_fan_min, store_fan_min, 2);
#define show_temp_reg(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
char *buf) \
{ \
struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
struct w83781d_data *data = w83781d_update_device(dev); \
int nr = attr->index; \
if (nr >= 2) { /* TEMP2 and TEMP3 */ \
return sprintf(buf, "%d\n", \
LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
} else { /* TEMP1 */ \
return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
} \
}
show_temp_reg(temp);
show_temp_reg(temp_max);
show_temp_reg(temp_max_hyst);
#define store_temp_reg(REG, reg) \
static ssize_t store_temp_##reg(struct device *dev, \
struct device_attribute *da, const char *buf, size_t count) \
{ \
struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
struct w83781d_data *data = dev_get_drvdata(dev); \
int nr = attr->index; \
long val; \
int err = kstrtol(buf, 10, &val); \
if (err) \
return err; \
mutex_lock(&data->update_lock); \
\
if (nr >= 2) { /* TEMP2 and TEMP3 */ \
data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
data->temp_##reg##_add[nr-2]); \
} else { /* TEMP1 */ \
data->temp_##reg = TEMP_TO_REG(val); \
w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
data->temp_##reg); \
} \
\
mutex_unlock(&data->update_lock); \
return count; \
}
store_temp_reg(OVER, max);
store_temp_reg(HYST, max_hyst);
#define sysfs_temp_offsets(offset) \
static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
show_temp, NULL, offset); \
static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
show_temp_max, store_temp_max, offset); \
static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
show_temp_max_hyst, store_temp_max_hyst, offset);
sysfs_temp_offsets(1);
sysfs_temp_offsets(2);
sysfs_temp_offsets(3);
static ssize_t
cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t
vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83781d_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%ld\n", (long) data->vrm);
}
static ssize_t
vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
size_t count)
{
struct w83781d_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
data->vrm = clamp_val(val, 0, 255);
return count;
}
static DEVICE_ATTR_RW(vrm);
static ssize_t
alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
return sprintf(buf, "%u\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
/* The W83781D has a single alarm bit for temp2 and temp3 */
static ssize_t show_temp3_alarm(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
int bitnr = (data->type == w83781d) ? 5 : 13;
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
static ssize_t beep_mask_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
return sprintf(buf, "%ld\n",
(long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
}
static ssize_t
beep_mask_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct w83781d_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->beep_mask &= 0x8000; /* preserve beep enable */
data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
data->beep_mask & 0xff);
w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
(data->beep_mask >> 8) & 0xff);
if (data->type != w83781d && data->type != as99127f) {
w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
((data->beep_mask) >> 16) & 0xff);
}
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(beep_mask);
static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
}
static ssize_t
store_beep(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct w83781d_data *data = dev_get_drvdata(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
u8 reg;
unsigned long bit;
int err;
err = kstrtoul(buf, 10, &bit);
if (err)
return err;
if (bit & ~1)
return -EINVAL;
mutex_lock(&data->update_lock);
if (bit)
data->beep_mask |= (1 << bitnr);
else
data->beep_mask &= ~(1 << bitnr);
if (bitnr < 8) {
reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
if (bit)
reg |= (1 << bitnr);
else
reg &= ~(1 << bitnr);
w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
} else if (bitnr < 16) {
reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
if (bit)
reg |= (1 << (bitnr - 8));
else
reg &= ~(1 << (bitnr - 8));
w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
} else {
reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
if (bit)
reg |= (1 << (bitnr - 16));
else
reg &= ~(1 << (bitnr - 16));
w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
}
mutex_unlock(&data->update_lock);
return count;
}
/* The W83781D has a single beep bit for temp2 and temp3 */
static ssize_t show_temp3_beep(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
int bitnr = (data->type == w83781d) ? 5 : 13;
return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 0);
static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 1);
static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 2);
static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 3);
static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 8);
static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 9);
static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 10);
static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 16);
static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 17);
static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 6);
static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 7);
static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 11);
static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 4);
static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
show_beep, store_beep, 5);
static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
show_temp3_beep, store_beep, 13);
static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
show_beep, store_beep, 15);
static ssize_t
show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct w83781d_data *data = w83781d_update_device(dev);
return sprintf(buf, "%ld\n",
(long) DIV_FROM_REG(data->fan_div[attr->index]));
}
/*
* Note: we save and restore the fan minimum here, because its value is
* determined in part by the fan divisor. This follows the principle of
* least surprise; the user doesn't expect the fan minimum to change just
* because the divisor changed.
*/
static ssize_t
store_fan_div(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct w83781d_data *data = dev_get_drvdata(dev);
unsigned long min;
int nr = attr->index;
u8 reg;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
/* Save fan_min */
min = FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr]));
data->fan_div[nr] = DIV_TO_REG(val, data->type);
reg = (w83781d_read_value(data, nr == 2 ?
W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
& (nr == 0 ? 0xcf : 0x3f))
| ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
w83781d_write_value(data, nr == 2 ?
W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
/* w83781d and as99127f don't have extended divisor bits */
if (data->type != w83781d && data->type != as99127f) {
reg = (w83781d_read_value(data, W83781D_REG_VBAT)
& ~(1 << (5 + nr)))
| ((data->fan_div[nr] & 0x04) << (3 + nr));
w83781d_write_value(data, W83781D_REG_VBAT, reg);
}
/* Restore fan_min */
data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
show_fan_div, store_fan_div, 0);
static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
show_fan_div, store_fan_div, 1);
static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
show_fan_div, store_fan_div, 2);
static ssize_t
show_pwm(struct device *dev, struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct w83781d_data *data = w83781d_update_device(dev);
return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
}
static ssize_t
pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)
{
struct w83781d_data *data = w83781d_update_device(dev);
return sprintf(buf, "%d\n", (int)data->pwm2_enable);
}
static ssize_t
store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct w83781d_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->pwm[nr] = clamp_val(val, 0, 255);
w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t
pwm2_enable_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct w83781d_data *data = dev_get_drvdata(dev);
unsigned long val;
u32 reg;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (val) {
case 0:
case 1:
reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
w83781d_write_value(data, W83781D_REG_PWMCLK12,
(reg & 0xf7) | (val << 3));
reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
(reg & 0xef) | (!val << 4));
data->pwm2_enable = val;
break;
default:
mutex_unlock(&data->update_lock);
return -EINVAL;
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
/* only PWM2 can be enabled/disabled */
static DEVICE_ATTR_RW(pwm2_enable);
static ssize_t
show_sensor(struct device *dev, struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct w83781d_data *data = w83781d_update_device(dev);
return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
}
static ssize_t
store_sensor(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct w83781d_data *data = dev_get_drvdata(dev);
int nr = attr->index;
unsigned long val;
u32 tmp;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (val) {
case 1: /* PII/Celeron diode */
tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
w83781d_write_value(data, W83781D_REG_SCFG1,
tmp | BIT_SCFG1[nr]);
tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
w83781d_write_value(data, W83781D_REG_SCFG2,
tmp | BIT_SCFG2[nr]);
data->sens[nr] = val;
break;
case 2: /* 3904 */
tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
w83781d_write_value(data, W83781D_REG_SCFG1,
tmp | BIT_SCFG1[nr]);
tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
w83781d_write_value(data, W83781D_REG_SCFG2,
tmp & ~BIT_SCFG2[nr]);
data->sens[nr] = val;
break;
case W83781D_DEFAULT_BETA:
dev_warn(dev,
"Sensor type %d is deprecated, please use 4 instead\n",
W83781D_DEFAULT_BETA);
fallthrough;
case 4: /* thermistor */
tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
w83781d_write_value(data, W83781D_REG_SCFG1,
tmp & ~BIT_SCFG1[nr]);
data->sens[nr] = val;
break;
default:
dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
(long) val);
break;
}
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
show_sensor, store_sensor, 0);
static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
show_sensor, store_sensor, 1);
static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
show_sensor, store_sensor, 2);
/*
* Assumes that adapter is of I2C, not ISA variety.
* OTHERWISE DON'T CALL THIS
*/
static int
w83781d_detect_subclients(struct i2c_client *new_client)
{
int i, val1 = 0, id;
int err;
int address = new_client->addr;
unsigned short sc_addr[2];
struct i2c_adapter *adapter = new_client->adapter;
struct w83781d_data *data = i2c_get_clientdata(new_client);
enum chips kind = data->type;
int num_sc = 1;
id = i2c_adapter_id(adapter);
if (force_subclients[0] == id && force_subclients[1] == address) {
for (i = 2; i <= 3; i++) {
if (force_subclients[i] < 0x48 ||
force_subclients[i] > 0x4f) {
dev_err(&new_client->dev,
"Invalid subclient address %d; must be 0x48-0x4f\n",
force_subclients[i]);
err = -EINVAL;
goto ERROR_SC_1;
}
}
w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
(force_subclients[2] & 0x07) |
((force_subclients[3] & 0x07) << 4));
sc_addr[0] = force_subclients[2];
} else {
val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
sc_addr[0] = 0x48 + (val1 & 0x07);
}
if (kind != w83783s) {
num_sc = 2;
if (force_subclients[0] == id &&
force_subclients[1] == address) {
sc_addr[1] = force_subclients[3];
} else {
sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
}
if (sc_addr[0] == sc_addr[1]) {
dev_err(&new_client->dev,
"Duplicate addresses 0x%x for subclients.\n",
sc_addr[0]);
err = -EBUSY;
goto ERROR_SC_2;
}
}
for (i = 0; i < num_sc; i++) {
data->lm75[i] = i2c_new_dummy_device(adapter, sc_addr[i]);
if (IS_ERR(data->lm75[i])) {
dev_err(&new_client->dev,
"Subclient %d registration at address 0x%x failed.\n",
i, sc_addr[i]);
err = PTR_ERR(data->lm75[i]);
if (i == 1)
goto ERROR_SC_3;
goto ERROR_SC_2;
}
}
return 0;
/* Undo inits in case of errors */
ERROR_SC_3:
i2c_unregister_device(data->lm75[0]);
ERROR_SC_2:
ERROR_SC_1:
return err;
}
#define IN_UNIT_ATTRS(X) \
&sensor_dev_attr_in##X##_input.dev_attr.attr, \
&sensor_dev_attr_in##X##_min.dev_attr.attr, \
&sensor_dev_attr_in##X##_max.dev_attr.attr, \
&sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
&sensor_dev_attr_in##X##_beep.dev_attr.attr
#define FAN_UNIT_ATTRS(X) \
&sensor_dev_attr_fan##X##_input.dev_attr.attr, \
&sensor_dev_attr_fan##X##_min.dev_attr.attr, \
&sensor_dev_attr_fan##X##_div.dev_attr.attr, \
&sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
&sensor_dev_attr_fan##X##_beep.dev_attr.attr
#define TEMP_UNIT_ATTRS(X) \
&sensor_dev_attr_temp##X##_input.dev_attr.attr, \
&sensor_dev_attr_temp##X##_max.dev_attr.attr, \
&sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
&sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
&sensor_dev_attr_temp##X##_beep.dev_attr.attr
static struct attribute *w83781d_attributes[] = {
IN_UNIT_ATTRS(0),
IN_UNIT_ATTRS(2),
IN_UNIT_ATTRS(3),
IN_UNIT_ATTRS(4),
IN_UNIT_ATTRS(5),
IN_UNIT_ATTRS(6),
FAN_UNIT_ATTRS(1),
FAN_UNIT_ATTRS(2),
FAN_UNIT_ATTRS(3),
TEMP_UNIT_ATTRS(1),
TEMP_UNIT_ATTRS(2),
&dev_attr_cpu0_vid.attr,
&dev_attr_vrm.attr,
&dev_attr_alarms.attr,
&dev_attr_beep_mask.attr,
&sensor_dev_attr_beep_enable.dev_attr.attr,
NULL
};
static const struct attribute_group w83781d_group = {
.attrs = w83781d_attributes,
};
static struct attribute *w83781d_attributes_in1[] = {
IN_UNIT_ATTRS(1),
NULL
};
static const struct attribute_group w83781d_group_in1 = {
.attrs = w83781d_attributes_in1,
};
static struct attribute *w83781d_attributes_in78[] = {
IN_UNIT_ATTRS(7),
IN_UNIT_ATTRS(8),
NULL
};
static const struct attribute_group w83781d_group_in78 = {
.attrs = w83781d_attributes_in78,
};
static struct attribute *w83781d_attributes_temp3[] = {
TEMP_UNIT_ATTRS(3),
NULL
};
static const struct attribute_group w83781d_group_temp3 = {
.attrs = w83781d_attributes_temp3,
};
static struct attribute *w83781d_attributes_pwm12[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&dev_attr_pwm2_enable.attr,
NULL
};
static const struct attribute_group w83781d_group_pwm12 = {
.attrs = w83781d_attributes_pwm12,
};
static struct attribute *w83781d_attributes_pwm34[] = {
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm4.dev_attr.attr,
NULL
};
static const struct attribute_group w83781d_group_pwm34 = {
.attrs = w83781d_attributes_pwm34,
};
static struct attribute *w83781d_attributes_other[] = {
&sensor_dev_attr_temp1_type.dev_attr.attr,
&sensor_dev_attr_temp2_type.dev_attr.attr,
&sensor_dev_attr_temp3_type.dev_attr.attr,
NULL
};
static const struct attribute_group w83781d_group_other = {
.attrs = w83781d_attributes_other,
};
/* No clean up is done on error, it's up to the caller */
static int
w83781d_create_files(struct device *dev, int kind, int is_isa)
{
int err;
err = sysfs_create_group(&dev->kobj, &w83781d_group);
if (err)
return err;
if (kind != w83783s) {
err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
if (err)
return err;
}
if (kind != as99127f && kind != w83781d && kind != w83783s) {
err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
if (err)
return err;
}
if (kind != w83783s) {
err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
if (err)
return err;
if (kind != w83781d) {
err = sysfs_chmod_file(&dev->kobj,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
S_IRUGO | S_IWUSR);
if (err)
return err;
}
}
if (kind != w83781d && kind != as99127f) {
err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
if (err)
return err;
}
if (kind == w83782d && !is_isa) {
err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
if (err)
return err;
}
if (kind != as99127f && kind != w83781d) {
err = device_create_file(dev,
&sensor_dev_attr_temp1_type.dev_attr);
if (err)
return err;
err = device_create_file(dev,
&sensor_dev_attr_temp2_type.dev_attr);
if (err)
return err;
if (kind != w83783s) {
err = device_create_file(dev,
&sensor_dev_attr_temp3_type.dev_attr);
if (err)
return err;
}
}
return 0;
}
/* Return 0 if detection is successful, -ENODEV otherwise */
static int
w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
{
int val1, val2;
struct w83781d_data *isa = w83781d_data_if_isa();
struct i2c_adapter *adapter = client->adapter;
int address = client->addr;
const char *client_name;
enum vendor { winbond, asus } vendid;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/*
* We block updates of the ISA device to minimize the risk of
* concurrent access to the same W83781D chip through different
* interfaces.
*/
if (isa)
mutex_lock(&isa->update_lock);
if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
dev_dbg(&adapter->dev,
"Detection of w83781d chip failed at step 3\n");
goto err_nodev;
}
val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
/* Check for Winbond or Asus ID if in bank 0 */
if (!(val1 & 0x07) &&
((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
dev_dbg(&adapter->dev,
"Detection of w83781d chip failed at step 4\n");
goto err_nodev;
}
/*
* If Winbond SMBus, check address at 0x48.
* Asus doesn't support, except for as99127f rev.2
*/
if ((!(val1 & 0x80) && val2 == 0xa3) ||
((val1 & 0x80) && val2 == 0x5c)) {
if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
!= address) {
dev_dbg(&adapter->dev,
"Detection of w83781d chip failed at step 5\n");
goto err_nodev;
}
}
/* Put it now into bank 0 and Vendor ID High Byte */
i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
(i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
& 0x78) | 0x80);
/* Get the vendor ID */
val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
if (val2 == 0x5c)
vendid = winbond;
else if (val2 == 0x12)
vendid = asus;
else {
dev_dbg(&adapter->dev,
"w83781d chip vendor is neither Winbond nor Asus\n");
goto err_nodev;
}
/* Determine the chip type. */
val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
client_name = "w83781d";
else if (val1 == 0x30 && vendid == winbond)
client_name = "w83782d";
else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
client_name = "w83783s";
else if (val1 == 0x31)
client_name = "as99127f";
else
goto err_nodev;
if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
dev_dbg(&adapter->dev,
"Device at 0x%02x appears to be the same as ISA device\n",
address);
goto err_nodev;
}
if (isa)
mutex_unlock(&isa->update_lock);
strscpy(info->type, client_name, I2C_NAME_SIZE);
return 0;
err_nodev:
if (isa)
mutex_unlock(&isa->update_lock);
return -ENODEV;
}
static void w83781d_remove_files(struct device *dev)
{
sysfs_remove_group(&dev->kobj, &w83781d_group);
sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
sysfs_remove_group(&dev->kobj, &w83781d_group_other);
}
static const struct i2c_device_id w83781d_ids[];
static int w83781d_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct w83781d_data *data;
int err;
data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->lock);
mutex_init(&data->update_lock);
data->type = i2c_match_id(w83781d_ids, client)->driver_data;
data->client = client;
/* attach secondary i2c lm75-like clients */
err = w83781d_detect_subclients(client);
if (err)
return err;
/* Initialize the chip */
w83781d_init_device(dev);
/* Register sysfs hooks */
err = w83781d_create_files(dev, data->type, 0);
if (err)
goto exit_remove_files;
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove_files;
}
return 0;
exit_remove_files:
w83781d_remove_files(dev);
i2c_unregister_device(data->lm75[0]);
i2c_unregister_device(data->lm75[1]);
return err;
}
static void
w83781d_remove(struct i2c_client *client)
{
struct w83781d_data *data = i2c_get_clientdata(client);
struct device *dev = &client->dev;
hwmon_device_unregister(data->hwmon_dev);
w83781d_remove_files(dev);
i2c_unregister_device(data->lm75[0]);
i2c_unregister_device(data->lm75[1]);
}
static int
w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
{
struct i2c_client *client = data->client;
int res, bank;
struct i2c_client *cl;
bank = (reg >> 8) & 0x0f;
if (bank > 2)
/* switch banks */
i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
bank);
if (bank == 0 || bank > 2) {
res = i2c_smbus_read_byte_data(client, reg & 0xff);
} else {
/* switch to subclient */
cl = data->lm75[bank - 1];
/* convert from ISA to LM75 I2C addresses */
switch (reg & 0xff) {
case 0x50: /* TEMP */
res = i2c_smbus_read_word_swapped(cl, 0);
break;
case 0x52: /* CONFIG */
res = i2c_smbus_read_byte_data(cl, 1);
break;
case 0x53: /* HYST */
res = i2c_smbus_read_word_swapped(cl, 2);
break;
case 0x55: /* OVER */
default:
res = i2c_smbus_read_word_swapped(cl, 3);
break;
}
}
if (bank > 2)
i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
return res;
}
static int
w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
{
struct i2c_client *client = data->client;
int bank;
struct i2c_client *cl;
bank = (reg >> 8) & 0x0f;
if (bank > 2)
/* switch banks */
i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
bank);
if (bank == 0 || bank > 2) {
i2c_smbus_write_byte_data(client, reg & 0xff,
value & 0xff);
} else {
/* switch to subclient */
cl = data->lm75[bank - 1];
/* convert from ISA to LM75 I2C addresses */
switch (reg & 0xff) {
case 0x52: /* CONFIG */
i2c_smbus_write_byte_data(cl, 1, value & 0xff);
break;
case 0x53: /* HYST */
i2c_smbus_write_word_swapped(cl, 2, value);
break;
case 0x55: /* OVER */
i2c_smbus_write_word_swapped(cl, 3, value);
break;
}
}
if (bank > 2)
i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
return 0;
}
static void
w83781d_init_device(struct device *dev)
{
struct w83781d_data *data = dev_get_drvdata(dev);
int i, p;
int type = data->type;
u8 tmp;
if (reset && type != as99127f) { /*
* this resets registers we don't have
* documentation for on the as99127f
*/
/*
* Resetting the chip has been the default for a long time,
* but it causes the BIOS initializations (fan clock dividers,
* thermal sensor types...) to be lost, so it is now optional.
* It might even go away if nobody reports it as being useful,
* as I see very little reason why this would be needed at
* all.
*/
dev_info(dev,
"If reset=1 solved a problem you were having, please report!\n");
/* save these registers */
i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
/*
* Reset all except Watchdog values and last conversion values
* This sets fan-divs to 2, among others
*/
w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
/*
* Restore the registers and disable power-on abnormal beep.
* This saves FAN 1/2/3 input/output values set by BIOS.
*/
w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
/*
* Disable master beep-enable (reset turns it on).
* Individual beep_mask should be reset to off but for some
* reason disabling this bit helps some people not get beeped
*/
w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
}
/*
* Disable power-on abnormal beep, as advised by the datasheet.
* Already done if reset=1.
*/
if (init && !reset && type != as99127f) {
i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
}
data->vrm = vid_which_vrm();
if ((type != w83781d) && (type != as99127f)) {
tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
for (i = 1; i <= 3; i++) {
if (!(tmp & BIT_SCFG1[i - 1])) {
data->sens[i - 1] = 4;
} else {
if (w83781d_read_value
(data,
W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
data->sens[i - 1] = 1;
else
data->sens[i - 1] = 2;
}
if (type == w83783s && i == 2)
break;
}
}
if (init && type != as99127f) {
/* Enable temp2 */
tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
if (tmp & 0x01) {
dev_warn(dev,
"Enabling temp2, readings might not make sense\n");
w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
tmp & 0xfe);
}
/* Enable temp3 */
if (type != w83783s) {
tmp = w83781d_read_value(data,
W83781D_REG_TEMP3_CONFIG);
if (tmp & 0x01) {
dev_warn(dev,
"Enabling temp3, readings might not make sense\n");
w83781d_write_value(data,
W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
}
}
}
/* Start monitoring */
w83781d_write_value(data, W83781D_REG_CONFIG,
(w83781d_read_value(data,
W83781D_REG_CONFIG) & 0xf7)
| 0x01);
/* A few vars need to be filled upon startup */
for (i = 0; i < 3; i++) {
data->fan_min[i] = w83781d_read_value(data,
W83781D_REG_FAN_MIN(i));
}
mutex_init(&data->update_lock);
}
static struct w83781d_data *w83781d_update_device(struct device *dev)
{
struct w83781d_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
dev_dbg(dev, "Starting device update\n");
for (i = 0; i <= 8; i++) {
if (data->type == w83783s && i == 1)
continue; /* 783S has no in1 */
data->in[i] =
w83781d_read_value(data, W83781D_REG_IN(i));
data->in_min[i] =
w83781d_read_value(data, W83781D_REG_IN_MIN(i));
data->in_max[i] =
w83781d_read_value(data, W83781D_REG_IN_MAX(i));
if ((data->type != w83782d) && (i == 6))
break;
}
for (i = 0; i < 3; i++) {
data->fan[i] =
w83781d_read_value(data, W83781D_REG_FAN(i));
data->fan_min[i] =
w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
}
if (data->type != w83781d && data->type != as99127f) {
for (i = 0; i < 4; i++) {
data->pwm[i] =
w83781d_read_value(data,
W83781D_REG_PWM[i]);
/* Only W83782D on SMBus has PWM3 and PWM4 */
if ((data->type != w83782d || !client)
&& i == 1)
break;
}
/* Only PWM2 can be disabled */
data->pwm2_enable = (w83781d_read_value(data,
W83781D_REG_PWMCLK12) & 0x08) >> 3;
}
data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
data->temp_max =
w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
data->temp_max_hyst =
w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
data->temp_add[0] =
w83781d_read_value(data, W83781D_REG_TEMP(2));
data->temp_max_add[0] =
w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
data->temp_max_hyst_add[0] =
w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
if (data->type != w83783s) {
data->temp_add[1] =
w83781d_read_value(data, W83781D_REG_TEMP(3));
data->temp_max_add[1] =
w83781d_read_value(data,
W83781D_REG_TEMP_OVER(3));
data->temp_max_hyst_add[1] =
w83781d_read_value(data,
W83781D_REG_TEMP_HYST(3));
}
i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
data->vid = i & 0x0f;
data->vid |= (w83781d_read_value(data,
W83781D_REG_CHIPID) & 0x01) << 4;
data->fan_div[0] = (i >> 4) & 0x03;
data->fan_div[1] = (i >> 6) & 0x03;
data->fan_div[2] = (w83781d_read_value(data,
W83781D_REG_PIN) >> 6) & 0x03;
if ((data->type != w83781d) && (data->type != as99127f)) {
i = w83781d_read_value(data, W83781D_REG_VBAT);
data->fan_div[0] |= (i >> 3) & 0x04;
data->fan_div[1] |= (i >> 4) & 0x04;
data->fan_div[2] |= (i >> 5) & 0x04;
}
if (data->type == w83782d) {
data->alarms = w83781d_read_value(data,
W83782D_REG_ALARM1)
| (w83781d_read_value(data,
W83782D_REG_ALARM2) << 8)
| (w83781d_read_value(data,
W83782D_REG_ALARM3) << 16);
} else if (data->type == w83783s) {
data->alarms = w83781d_read_value(data,
W83782D_REG_ALARM1)
| (w83781d_read_value(data,
W83782D_REG_ALARM2) << 8);
} else {
/*
* No real-time status registers, fall back to
* interrupt status registers
*/
data->alarms = w83781d_read_value(data,
W83781D_REG_ALARM1)
| (w83781d_read_value(data,
W83781D_REG_ALARM2) << 8);
}
i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
data->beep_mask = (i << 8) +
w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
if ((data->type != w83781d) && (data->type != as99127f)) {
data->beep_mask |=
w83781d_read_value(data,
W83781D_REG_BEEP_INTS3) << 16;
}
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static const struct i2c_device_id w83781d_ids[] = {
{ "w83781d", w83781d, },
{ "w83782d", w83782d, },
{ "w83783s", w83783s, },
{ "as99127f", as99127f },
{ /* LIST END */ }
};
MODULE_DEVICE_TABLE(i2c, w83781d_ids);
static const struct of_device_id w83781d_of_match[] = {
{ .compatible = "winbond,w83781d" },
{ .compatible = "winbond,w83781g" },
{ .compatible = "winbond,w83782d" },
{ .compatible = "winbond,w83783s" },
{ .compatible = "asus,as99127f" },
{ },
};
MODULE_DEVICE_TABLE(of, w83781d_of_match);
static struct i2c_driver w83781d_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "w83781d",
.of_match_table = w83781d_of_match,
},
.probe = w83781d_probe,
.remove = w83781d_remove,
.id_table = w83781d_ids,
.detect = w83781d_detect,
.address_list = normal_i2c,
};
/*
* ISA related code
*/
#ifdef CONFIG_ISA
/* ISA device, if found */
static struct platform_device *pdev;
static unsigned short isa_address = 0x290;
/*
* I2C devices get this name attribute automatically, but for ISA devices
* we must create it by ourselves.
*/
static ssize_t
name_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
struct w83781d_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR_RO(name);
static struct w83781d_data *w83781d_data_if_isa(void)
{
return pdev ? platform_get_drvdata(pdev) : NULL;
}
/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
{
struct w83781d_data *isa;
int i;
if (!pdev) /* No ISA chip */
return 0;
isa = platform_get_drvdata(pdev);
if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
return 0; /* Address doesn't match */
if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
return 0; /* Chip type doesn't match */
/*
* We compare all the limit registers, the config register and the
* interrupt mask registers
*/
for (i = 0x2b; i <= 0x3d; i++) {
if (w83781d_read_value(isa, i) !=
i2c_smbus_read_byte_data(client, i))
return 0;
}
if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
return 0;
for (i = 0x43; i <= 0x46; i++) {
if (w83781d_read_value(isa, i) !=
i2c_smbus_read_byte_data(client, i))
return 0;
}
return 1;
}
static int
w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
{
int word_sized, res;
word_sized = (((reg & 0xff00) == 0x100)
|| ((reg & 0xff00) == 0x200))
&& (((reg & 0x00ff) == 0x50)
|| ((reg & 0x00ff) == 0x53)
|| ((reg & 0x00ff) == 0x55));
if (reg & 0xff00) {
outb_p(W83781D_REG_BANK,
data->isa_addr + W83781D_ADDR_REG_OFFSET);
outb_p(reg >> 8,
data->isa_addr + W83781D_DATA_REG_OFFSET);
}
outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
if (word_sized) {
outb_p((reg & 0xff) + 1,
data->isa_addr + W83781D_ADDR_REG_OFFSET);
res =
(res << 8) + inb_p(data->isa_addr +
W83781D_DATA_REG_OFFSET);
}
if (reg & 0xff00) {
outb_p(W83781D_REG_BANK,
data->isa_addr + W83781D_ADDR_REG_OFFSET);
outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
}
return res;
}
static void
w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
{
int word_sized;
word_sized = (((reg & 0xff00) == 0x100)
|| ((reg & 0xff00) == 0x200))
&& (((reg & 0x00ff) == 0x53)
|| ((reg & 0x00ff) == 0x55));
if (reg & 0xff00) {
outb_p(W83781D_REG_BANK,
data->isa_addr + W83781D_ADDR_REG_OFFSET);
outb_p(reg >> 8,
data->isa_addr + W83781D_DATA_REG_OFFSET);
}
outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
if (word_sized) {
outb_p(value >> 8,
data->isa_addr + W83781D_DATA_REG_OFFSET);
outb_p((reg & 0xff) + 1,
data->isa_addr + W83781D_ADDR_REG_OFFSET);
}
outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
if (reg & 0xff00) {
outb_p(W83781D_REG_BANK,
data->isa_addr + W83781D_ADDR_REG_OFFSET);
outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
}
}
/*
* The SMBus locks itself, usually, but nothing may access the Winbond between
* bank switches. ISA access must always be locked explicitly!
* We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
* would slow down the W83781D access and should not be necessary.
* There are some ugly typecasts here, but the good news is - they should
* nowhere else be necessary!
*/
static int
w83781d_read_value(struct w83781d_data *data, u16 reg)
{
struct i2c_client *client = data->client;
int res;
mutex_lock(&data->lock);
if (client)
res = w83781d_read_value_i2c(data, reg);
else
res = w83781d_read_value_isa(data, reg);
mutex_unlock(&data->lock);
return res;
}
static int
w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
{
struct i2c_client *client = data->client;
mutex_lock(&data->lock);
if (client)
w83781d_write_value_i2c(data, reg, value);
else
w83781d_write_value_isa(data, reg, value);
mutex_unlock(&data->lock);
return 0;
}
static int
w83781d_isa_probe(struct platform_device *pdev)
{
int err, reg;
struct w83781d_data *data;
struct resource *res;
/* Reserve the ISA region */
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev,
res->start + W83781D_ADDR_REG_OFFSET, 2,
"w83781d"))
return -EBUSY;
data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->lock);
data->isa_addr = res->start;
platform_set_drvdata(pdev, data);
reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
switch (reg) {
case 0x30:
data->type = w83782d;
data->name = "w83782d";
break;
default:
data->type = w83781d;
data->name = "w83781d";
}
/* Initialize the W83781D chip */
w83781d_init_device(&pdev->dev);
/* Register sysfs hooks */
err = w83781d_create_files(&pdev->dev, data->type, 1);
if (err)
goto exit_remove_files;
err = device_create_file(&pdev->dev, &dev_attr_name);
if (err)
goto exit_remove_files;
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove_files;
}
return 0;
exit_remove_files:
w83781d_remove_files(&pdev->dev);
device_remove_file(&pdev->dev, &dev_attr_name);
return err;
}
static int
w83781d_isa_remove(struct platform_device *pdev)
{
struct w83781d_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
w83781d_remove_files(&pdev->dev);
device_remove_file(&pdev->dev, &dev_attr_name);
return 0;
}
static struct platform_driver w83781d_isa_driver = {
.driver = {
.name = "w83781d",
},
.probe = w83781d_isa_probe,
.remove = w83781d_isa_remove,
};
/* return 1 if a supported chip is found, 0 otherwise */
static int __init
w83781d_isa_found(unsigned short address)
{
int val, save, found = 0;
int port;
/*
* Some boards declare base+0 to base+7 as a PNP device, some base+4
* to base+7 and some base+5 to base+6. So we better request each port
* individually for the probing phase.
*/
for (port = address; port < address + W83781D_EXTENT; port++) {
if (!request_region(port, 1, "w83781d")) {
pr_debug("Failed to request port 0x%x\n", port);
goto release;
}
}
#define REALLY_SLOW_IO
/*
* We need the timeouts for at least some W83781D-like
* chips. But only if we read 'undefined' registers.
*/
val = inb_p(address + 1);
if (inb_p(address + 2) != val
|| inb_p(address + 3) != val
|| inb_p(address + 7) != val) {
pr_debug("Detection failed at step %d\n", 1);
goto release;
}
#undef REALLY_SLOW_IO
/*
* We should be able to change the 7 LSB of the address port. The
* MSB (busy flag) should be clear initially, set after the write.
*/
save = inb_p(address + W83781D_ADDR_REG_OFFSET);
if (save & 0x80) {
pr_debug("Detection failed at step %d\n", 2);
goto release;
}
val = ~save & 0x7f;
outb_p(val, address + W83781D_ADDR_REG_OFFSET);
if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
outb_p(save, address + W83781D_ADDR_REG_OFFSET);
pr_debug("Detection failed at step %d\n", 3);
goto release;
}
/* We found a device, now see if it could be a W83781D */
outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
val = inb_p(address + W83781D_DATA_REG_OFFSET);
if (val & 0x80) {
pr_debug("Detection failed at step %d\n", 4);
goto release;
}
outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
save = inb_p(address + W83781D_DATA_REG_OFFSET);
outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
val = inb_p(address + W83781D_DATA_REG_OFFSET);
if ((!(save & 0x80) && (val != 0xa3))
|| ((save & 0x80) && (val != 0x5c))) {
pr_debug("Detection failed at step %d\n", 5);
goto release;
}
outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
val = inb_p(address + W83781D_DATA_REG_OFFSET);
if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
pr_debug("Detection failed at step %d\n", 6);
goto release;
}
/* The busy flag should be clear again */
if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
pr_debug("Detection failed at step %d\n", 7);
goto release;
}
/* Determine the chip type */
outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
save = inb_p(address + W83781D_DATA_REG_OFFSET);
outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
val = inb_p(address + W83781D_DATA_REG_OFFSET);
if ((val & 0xfe) == 0x10 /* W83781D */
|| val == 0x30) /* W83782D */
found = 1;
if (found)
pr_info("Found a %s chip at %#x\n",
val == 0x30 ? "W83782D" : "W83781D", (int)address);
release:
for (port--; port >= address; port--)
release_region(port, 1);
return found;
}
static int __init
w83781d_isa_device_add(unsigned short address)
{
struct resource res = {
.start = address,
.end = address + W83781D_EXTENT - 1,
.name = "w83781d",
.flags = IORESOURCE_IO,
};
int err;
pdev = platform_device_alloc("w83781d", address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
pdev = NULL;
return err;
}
static int __init
w83781d_isa_register(void)
{
int res;
if (w83781d_isa_found(isa_address)) {
res = platform_driver_register(&w83781d_isa_driver);
if (res)
goto exit;
/* Sets global pdev as a side effect */
res = w83781d_isa_device_add(isa_address);
if (res)
goto exit_unreg_isa_driver;
}
return 0;
exit_unreg_isa_driver:
platform_driver_unregister(&w83781d_isa_driver);
exit:
return res;
}
static void
w83781d_isa_unregister(void)
{
if (pdev) {
platform_device_unregister(pdev);
platform_driver_unregister(&w83781d_isa_driver);
}
}
#else /* !CONFIG_ISA */
static struct w83781d_data *w83781d_data_if_isa(void)
{
return NULL;
}
static int
w83781d_alias_detect(struct i2c_client *client, u8 chipid)
{
return 0;
}
static int
w83781d_read_value(struct w83781d_data *data, u16 reg)
{
int res;
mutex_lock(&data->lock);
res = w83781d_read_value_i2c(data, reg);
mutex_unlock(&data->lock);
return res;
}
static int
w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
{
mutex_lock(&data->lock);
w83781d_write_value_i2c(data, reg, value);
mutex_unlock(&data->lock);
return 0;
}
static int __init
w83781d_isa_register(void)
{
return 0;
}
static void
w83781d_isa_unregister(void)
{
}
#endif /* CONFIG_ISA */
static int __init
sensors_w83781d_init(void)
{
int res;
/*
* We register the ISA device first, so that we can skip the
* registration of an I2C interface to the same device.
*/
res = w83781d_isa_register();
if (res)
goto exit;
res = i2c_add_driver(&w83781d_driver);
if (res)
goto exit_unreg_isa;
return 0;
exit_unreg_isa:
w83781d_isa_unregister();
exit:
return res;
}
static void __exit
sensors_w83781d_exit(void)
{
w83781d_isa_unregister();
i2c_del_driver(&w83781d_driver);
}
MODULE_AUTHOR("Frodo Looijaard <[email protected]>, "
"Philip Edelbrock <[email protected]>, "
"and Mark Studebaker <[email protected]>");
MODULE_DESCRIPTION("W83781D driver");
MODULE_LICENSE("GPL");
module_init(sensors_w83781d_init);
module_exit(sensors_w83781d_exit);
|
linux-master
|
drivers/hwmon/w83781d.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware monitoring driver for Maxim MAX6621
*
* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
* Copyright (c) 2017 Vadim Pasternak <[email protected]>
*/
#include <linux/bitops.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regmap.h>
#define MAX6621_DRV_NAME "max6621"
#define MAX6621_TEMP_INPUT_REG_NUM 9
#define MAX6621_TEMP_INPUT_MIN -127000
#define MAX6621_TEMP_INPUT_MAX 128000
#define MAX6621_TEMP_ALERT_CHAN_SHIFT 1
#define MAX6621_TEMP_S0D0_REG 0x00
#define MAX6621_TEMP_S0D1_REG 0x01
#define MAX6621_TEMP_S1D0_REG 0x02
#define MAX6621_TEMP_S1D1_REG 0x03
#define MAX6621_TEMP_S2D0_REG 0x04
#define MAX6621_TEMP_S2D1_REG 0x05
#define MAX6621_TEMP_S3D0_REG 0x06
#define MAX6621_TEMP_S3D1_REG 0x07
#define MAX6621_TEMP_MAX_REG 0x08
#define MAX6621_TEMP_MAX_ADDR_REG 0x0a
#define MAX6621_TEMP_ALERT_CAUSE_REG 0x0b
#define MAX6621_CONFIG0_REG 0x0c
#define MAX6621_CONFIG1_REG 0x0d
#define MAX6621_CONFIG2_REG 0x0e
#define MAX6621_CONFIG3_REG 0x0f
#define MAX6621_TEMP_S0_ALERT_REG 0x10
#define MAX6621_TEMP_S1_ALERT_REG 0x11
#define MAX6621_TEMP_S2_ALERT_REG 0x12
#define MAX6621_TEMP_S3_ALERT_REG 0x13
#define MAX6621_CLEAR_ALERT_REG 0x15
#define MAX6621_REG_MAX (MAX6621_CLEAR_ALERT_REG + 1)
#define MAX6621_REG_TEMP_SHIFT 0x06
#define MAX6621_ENABLE_TEMP_ALERTS_BIT 4
#define MAX6621_ENABLE_I2C_CRC_BIT 5
#define MAX6621_ENABLE_ALTERNATE_DATA 6
#define MAX6621_ENABLE_LOCKUP_TO 7
#define MAX6621_ENABLE_S0D0_BIT 8
#define MAX6621_ENABLE_S3D1_BIT 15
#define MAX6621_ENABLE_TEMP_ALL GENMASK(MAX6621_ENABLE_S3D1_BIT, \
MAX6621_ENABLE_S0D0_BIT)
#define MAX6621_POLL_DELAY_MASK 0x5
#define MAX6621_CONFIG0_INIT (MAX6621_ENABLE_TEMP_ALL | \
BIT(MAX6621_ENABLE_LOCKUP_TO) | \
BIT(MAX6621_ENABLE_I2C_CRC_BIT) | \
MAX6621_POLL_DELAY_MASK)
#define MAX6621_PECI_BIT_TIME 0x2
#define MAX6621_PECI_RETRY_NUM 0x3
#define MAX6621_CONFIG1_INIT ((MAX6621_PECI_BIT_TIME << 8) | \
MAX6621_PECI_RETRY_NUM)
/* Error codes */
#define MAX6621_TRAN_FAILED 0x8100 /*
* PECI transaction failed for more
* than the configured number of
* consecutive retries.
*/
#define MAX6621_POOL_DIS 0x8101 /*
* Polling disabled for requested
* socket/domain.
*/
#define MAX6621_POOL_UNCOMPLETE 0x8102 /*
* First poll not yet completed for
* requested socket/domain (on
* startup).
*/
#define MAX6621_SD_DIS 0x8103 /*
* Read maximum temperature requested,
* but no sockets/domains enabled or
* all enabled sockets/domains have
* errors; or read maximum temperature
* address requested, but read maximum
* temperature was not called.
*/
#define MAX6621_ALERT_DIS 0x8104 /*
* Get alert socket/domain requested,
* but no alert active.
*/
#define MAX6621_PECI_ERR_MIN 0x8000 /* Intel spec PECI error min value. */
#define MAX6621_PECI_ERR_MAX 0x80ff /* Intel spec PECI error max value. */
static const u32 max6621_temp_regs[] = {
MAX6621_TEMP_MAX_REG, MAX6621_TEMP_S0D0_REG, MAX6621_TEMP_S1D0_REG,
MAX6621_TEMP_S2D0_REG, MAX6621_TEMP_S3D0_REG, MAX6621_TEMP_S0D1_REG,
MAX6621_TEMP_S1D1_REG, MAX6621_TEMP_S2D1_REG, MAX6621_TEMP_S3D1_REG,
};
static const char *const max6621_temp_labels[] = {
"maximum",
"socket0_0",
"socket1_0",
"socket2_0",
"socket3_0",
"socket0_1",
"socket1_1",
"socket2_1",
"socket3_1",
};
static const int max6621_temp_alert_chan2reg[] = {
MAX6621_TEMP_S0_ALERT_REG,
MAX6621_TEMP_S1_ALERT_REG,
MAX6621_TEMP_S2_ALERT_REG,
MAX6621_TEMP_S3_ALERT_REG,
};
/**
* struct max6621_data - private data:
*
* @client: I2C client;
* @regmap: register map handle;
* @input_chan2reg: mapping from channel to register;
*/
struct max6621_data {
struct i2c_client *client;
struct regmap *regmap;
int input_chan2reg[MAX6621_TEMP_INPUT_REG_NUM + 1];
};
static long max6621_temp_mc2reg(long val)
{
return (val / 1000L) << MAX6621_REG_TEMP_SHIFT;
}
static umode_t
max6621_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
int channel)
{
/* Skip channels which are not physically conncted. */
if (((struct max6621_data *)data)->input_chan2reg[channel] < 0)
return 0;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_label:
case hwmon_temp_crit_alarm:
return 0444;
case hwmon_temp_offset:
case hwmon_temp_crit:
return 0644;
default:
break;
}
break;
default:
break;
}
return 0;
}
static int max6621_verify_reg_data(struct device *dev, int regval)
{
if (regval >= MAX6621_PECI_ERR_MIN &&
regval <= MAX6621_PECI_ERR_MAX) {
dev_dbg(dev, "PECI error code - err 0x%04x.\n",
regval);
return -EIO;
}
switch (regval) {
case MAX6621_TRAN_FAILED:
dev_dbg(dev, "PECI transaction failed - err 0x%04x.\n",
regval);
return -EIO;
case MAX6621_POOL_DIS:
dev_dbg(dev, "Polling disabled - err 0x%04x.\n", regval);
return -EOPNOTSUPP;
case MAX6621_POOL_UNCOMPLETE:
dev_dbg(dev, "First poll not completed on startup - err 0x%04x.\n",
regval);
return -EIO;
case MAX6621_SD_DIS:
dev_dbg(dev, "Resource is disabled - err 0x%04x.\n", regval);
return -EOPNOTSUPP;
case MAX6621_ALERT_DIS:
dev_dbg(dev, "No alert active - err 0x%04x.\n", regval);
return -EOPNOTSUPP;
default:
return 0;
}
}
static int
max6621_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
struct max6621_data *data = dev_get_drvdata(dev);
u32 regval;
int reg;
s8 temp;
int ret;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
reg = data->input_chan2reg[channel];
ret = regmap_read(data->regmap, reg, ®val);
if (ret)
return ret;
ret = max6621_verify_reg_data(dev, regval);
if (ret)
return ret;
/*
* Bit MAX6621_REG_TEMP_SHIFT represents 1 degree step.
* The temperature is given in two's complement and 8
* bits is used for the register conversion.
*/
temp = (regval >> MAX6621_REG_TEMP_SHIFT);
*val = temp * 1000L;
break;
case hwmon_temp_offset:
ret = regmap_read(data->regmap, MAX6621_CONFIG2_REG,
®val);
if (ret)
return ret;
ret = max6621_verify_reg_data(dev, regval);
if (ret)
return ret;
*val = (regval >> MAX6621_REG_TEMP_SHIFT) *
1000L;
break;
case hwmon_temp_crit:
channel -= MAX6621_TEMP_ALERT_CHAN_SHIFT;
reg = max6621_temp_alert_chan2reg[channel];
ret = regmap_read(data->regmap, reg, ®val);
if (ret)
return ret;
ret = max6621_verify_reg_data(dev, regval);
if (ret)
return ret;
*val = regval * 1000L;
break;
case hwmon_temp_crit_alarm:
/*
* Set val to zero to recover the case, when reading
* MAX6621_TEMP_ALERT_CAUSE_REG results in for example
* MAX6621_ALERT_DIS. Reading will return with error,
* but in such case alarm should be returned as 0.
*/
*val = 0;
ret = regmap_read(data->regmap,
MAX6621_TEMP_ALERT_CAUSE_REG,
®val);
if (ret)
return ret;
ret = max6621_verify_reg_data(dev, regval);
if (ret) {
/* Do not report error if alert is disabled. */
if (regval == MAX6621_ALERT_DIS)
return 0;
else
return ret;
}
/*
* Clear the alert automatically, using send-byte
* smbus protocol for clearing alert.
*/
if (regval) {
ret = i2c_smbus_write_byte(data->client,
MAX6621_CLEAR_ALERT_REG);
if (ret)
return ret;
}
*val = !!regval;
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int
max6621_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long val)
{
struct max6621_data *data = dev_get_drvdata(dev);
u32 reg;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_offset:
/* Clamp to allowed range to prevent overflow. */
val = clamp_val(val, MAX6621_TEMP_INPUT_MIN,
MAX6621_TEMP_INPUT_MAX);
val = max6621_temp_mc2reg(val);
return regmap_write(data->regmap,
MAX6621_CONFIG2_REG, val);
case hwmon_temp_crit:
channel -= MAX6621_TEMP_ALERT_CHAN_SHIFT;
reg = max6621_temp_alert_chan2reg[channel];
/* Clamp to allowed range to prevent overflow. */
val = clamp_val(val, MAX6621_TEMP_INPUT_MIN,
MAX6621_TEMP_INPUT_MAX);
val = val / 1000L;
return regmap_write(data->regmap, reg, val);
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return -EOPNOTSUPP;
}
static int
max6621_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, const char **str)
{
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_label:
*str = max6621_temp_labels[channel];
return 0;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return -EOPNOTSUPP;
}
static bool max6621_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MAX6621_CONFIG0_REG:
case MAX6621_CONFIG1_REG:
case MAX6621_CONFIG2_REG:
case MAX6621_CONFIG3_REG:
case MAX6621_TEMP_S0_ALERT_REG:
case MAX6621_TEMP_S1_ALERT_REG:
case MAX6621_TEMP_S2_ALERT_REG:
case MAX6621_TEMP_S3_ALERT_REG:
case MAX6621_TEMP_ALERT_CAUSE_REG:
return true;
}
return false;
}
static bool max6621_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MAX6621_TEMP_S0D0_REG:
case MAX6621_TEMP_S0D1_REG:
case MAX6621_TEMP_S1D0_REG:
case MAX6621_TEMP_S1D1_REG:
case MAX6621_TEMP_S2D0_REG:
case MAX6621_TEMP_S2D1_REG:
case MAX6621_TEMP_S3D0_REG:
case MAX6621_TEMP_S3D1_REG:
case MAX6621_TEMP_MAX_REG:
case MAX6621_TEMP_MAX_ADDR_REG:
case MAX6621_CONFIG0_REG:
case MAX6621_CONFIG1_REG:
case MAX6621_CONFIG2_REG:
case MAX6621_CONFIG3_REG:
case MAX6621_TEMP_S0_ALERT_REG:
case MAX6621_TEMP_S1_ALERT_REG:
case MAX6621_TEMP_S2_ALERT_REG:
case MAX6621_TEMP_S3_ALERT_REG:
return true;
}
return false;
}
static bool max6621_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MAX6621_TEMP_S0D0_REG:
case MAX6621_TEMP_S0D1_REG:
case MAX6621_TEMP_S1D0_REG:
case MAX6621_TEMP_S1D1_REG:
case MAX6621_TEMP_S2D0_REG:
case MAX6621_TEMP_S2D1_REG:
case MAX6621_TEMP_S3D0_REG:
case MAX6621_TEMP_S3D1_REG:
case MAX6621_TEMP_MAX_REG:
case MAX6621_TEMP_S0_ALERT_REG:
case MAX6621_TEMP_S1_ALERT_REG:
case MAX6621_TEMP_S2_ALERT_REG:
case MAX6621_TEMP_S3_ALERT_REG:
case MAX6621_TEMP_ALERT_CAUSE_REG:
return true;
}
return false;
}
static const struct reg_default max6621_regmap_default[] = {
{ MAX6621_CONFIG0_REG, MAX6621_CONFIG0_INIT },
{ MAX6621_CONFIG1_REG, MAX6621_CONFIG1_INIT },
};
static const struct regmap_config max6621_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.max_register = MAX6621_REG_MAX,
.val_format_endian = REGMAP_ENDIAN_LITTLE,
.cache_type = REGCACHE_FLAT,
.writeable_reg = max6621_writeable_reg,
.readable_reg = max6621_readable_reg,
.volatile_reg = max6621_volatile_reg,
.reg_defaults = max6621_regmap_default,
.num_reg_defaults = ARRAY_SIZE(max6621_regmap_default),
};
static const struct hwmon_channel_info * const max6621_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL,
HWMON_T_INPUT | HWMON_T_LABEL),
NULL
};
static const struct hwmon_ops max6621_hwmon_ops = {
.read = max6621_read,
.write = max6621_write,
.read_string = max6621_read_string,
.is_visible = max6621_is_visible,
};
static const struct hwmon_chip_info max6621_chip_info = {
.ops = &max6621_hwmon_ops,
.info = max6621_info,
};
static int max6621_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct max6621_data *data;
struct device *hwmon_dev;
int i;
int ret;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->regmap = devm_regmap_init_i2c(client, &max6621_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
i2c_set_clientdata(client, data);
data->client = client;
/* Set CONFIG0 register masking temperature alerts and PEC. */
ret = regmap_write(data->regmap, MAX6621_CONFIG0_REG,
MAX6621_CONFIG0_INIT);
if (ret)
return ret;
/* Set CONFIG1 register for PEC access retry number. */
ret = regmap_write(data->regmap, MAX6621_CONFIG1_REG,
MAX6621_CONFIG1_INIT);
if (ret)
return ret;
/* Sync registers with hardware. */
regcache_mark_dirty(data->regmap);
ret = regcache_sync(data->regmap);
if (ret)
return ret;
/* Verify which temperature input registers are enabled. */
for (i = 0; i < MAX6621_TEMP_INPUT_REG_NUM; i++) {
ret = i2c_smbus_read_word_data(client, max6621_temp_regs[i]);
if (ret < 0)
return ret;
ret = max6621_verify_reg_data(dev, ret);
if (ret) {
data->input_chan2reg[i] = -1;
continue;
}
data->input_chan2reg[i] = max6621_temp_regs[i];
}
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&max6621_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max6621_id[] = {
{ MAX6621_DRV_NAME, 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max6621_id);
static const struct of_device_id __maybe_unused max6621_of_match[] = {
{ .compatible = "maxim,max6621" },
{ }
};
MODULE_DEVICE_TABLE(of, max6621_of_match);
static struct i2c_driver max6621_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = MAX6621_DRV_NAME,
.of_match_table = of_match_ptr(max6621_of_match),
},
.probe = max6621_probe,
.id_table = max6621_id,
};
module_i2c_driver(max6621_driver);
MODULE_AUTHOR("Vadim Pasternak <[email protected]>");
MODULE_DESCRIPTION("Driver for Maxim MAX6621");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max6621.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Linear Technology LTC2945 I2C Power Monitor
*
* Copyright (c) 2014 Guenter Roeck
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
#include <linux/regmap.h>
/* chip registers */
#define LTC2945_CONTROL 0x00
#define LTC2945_ALERT 0x01
#define LTC2945_STATUS 0x02
#define LTC2945_FAULT 0x03
#define LTC2945_POWER_H 0x05
#define LTC2945_MAX_POWER_H 0x08
#define LTC2945_MIN_POWER_H 0x0b
#define LTC2945_MAX_POWER_THRES_H 0x0e
#define LTC2945_MIN_POWER_THRES_H 0x11
#define LTC2945_SENSE_H 0x14
#define LTC2945_MAX_SENSE_H 0x16
#define LTC2945_MIN_SENSE_H 0x18
#define LTC2945_MAX_SENSE_THRES_H 0x1a
#define LTC2945_MIN_SENSE_THRES_H 0x1c
#define LTC2945_VIN_H 0x1e
#define LTC2945_MAX_VIN_H 0x20
#define LTC2945_MIN_VIN_H 0x22
#define LTC2945_MAX_VIN_THRES_H 0x24
#define LTC2945_MIN_VIN_THRES_H 0x26
#define LTC2945_ADIN_H 0x28
#define LTC2945_MAX_ADIN_H 0x2a
#define LTC2945_MIN_ADIN_H 0x2c
#define LTC2945_MAX_ADIN_THRES_H 0x2e
#define LTC2945_MIN_ADIN_THRES_H 0x30
#define LTC2945_MIN_ADIN_THRES_L 0x31
/* Fault register bits */
#define FAULT_ADIN_UV (1 << 0)
#define FAULT_ADIN_OV (1 << 1)
#define FAULT_VIN_UV (1 << 2)
#define FAULT_VIN_OV (1 << 3)
#define FAULT_SENSE_UV (1 << 4)
#define FAULT_SENSE_OV (1 << 5)
#define FAULT_POWER_UV (1 << 6)
#define FAULT_POWER_OV (1 << 7)
/* Control register bits */
#define CONTROL_MULT_SELECT (1 << 0)
#define CONTROL_TEST_MODE (1 << 4)
static const struct of_device_id __maybe_unused ltc2945_of_match[] = {
{ .compatible = "adi,ltc2945" },
{ }
};
MODULE_DEVICE_TABLE(of, ltc2945_of_match);
/**
* struct ltc2945_data - LTC2945 device data
* @regmap: regmap device
* @shunt_resistor: shunt resistor value in micro ohms (1000 by default)
*/
struct ltc2945_data {
struct regmap *regmap;
u32 shunt_resistor;
};
static inline bool is_power_reg(u8 reg)
{
return reg < LTC2945_SENSE_H;
}
/* Return the value from the given register in uW, mV, or mA */
static long long ltc2945_reg_to_val(struct device *dev, u8 reg)
{
struct ltc2945_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
u32 shunt_resistor = data->shunt_resistor;
unsigned int control;
u8 buf[3];
long long val;
int ret;
ret = regmap_bulk_read(regmap, reg, buf,
is_power_reg(reg) ? 3 : 2);
if (ret < 0)
return ret;
if (is_power_reg(reg)) {
/* 24-bit power */
val = (buf[0] << 16) + (buf[1] << 8) + buf[2];
} else {
/* 12-bit current, voltage */
val = (buf[0] << 4) + (buf[1] >> 4);
}
switch (reg) {
case LTC2945_POWER_H:
case LTC2945_MAX_POWER_H:
case LTC2945_MIN_POWER_H:
case LTC2945_MAX_POWER_THRES_H:
case LTC2945_MIN_POWER_THRES_H:
/*
* Convert to uW
* Control register bit 0 selects if voltage at SENSE+/VDD
* or voltage at ADIN is used to measure power.
*/
ret = regmap_read(regmap, LTC2945_CONTROL, &control);
if (ret < 0)
return ret;
if (control & CONTROL_MULT_SELECT) {
/* 25 mV * 25 uV = 0.625 uV resolution. */
val *= 625LL;
} else {
/* 0.5 mV * 25 uV = 0.0125 uV resolution. */
val = (val * 25LL) >> 1;
}
val *= 1000;
/* Overflow check: Assuming max 24-bit power, val is at most 53 bits right now. */
val = DIV_ROUND_CLOSEST_ULL(val, shunt_resistor);
/*
* Overflow check: After division, depending on shunt resistor,
* val can still be > 32 bits so returning long long makes sense
*/
break;
case LTC2945_VIN_H:
case LTC2945_MAX_VIN_H:
case LTC2945_MIN_VIN_H:
case LTC2945_MAX_VIN_THRES_H:
case LTC2945_MIN_VIN_THRES_H:
/* 25 mV resolution. Convert to mV. */
val *= 25;
break;
case LTC2945_ADIN_H:
case LTC2945_MAX_ADIN_H:
case LTC2945_MIN_ADIN_THRES_H:
case LTC2945_MAX_ADIN_THRES_H:
case LTC2945_MIN_ADIN_H:
/* 0.5mV resolution. Convert to mV. */
val = val >> 1;
break;
case LTC2945_SENSE_H:
case LTC2945_MAX_SENSE_H:
case LTC2945_MIN_SENSE_H:
case LTC2945_MAX_SENSE_THRES_H:
case LTC2945_MIN_SENSE_THRES_H:
/* 25 uV resolution. Convert to mA. */
val *= 25 * 1000;
/* Overflow check: Assuming max 12-bit sense, val is at most 27 bits right now */
val = DIV_ROUND_CLOSEST_ULL(val, shunt_resistor);
/* Overflow check: After division, <= 27 bits */
break;
default:
return -EINVAL;
}
return val;
}
static long long ltc2945_val_to_reg(struct device *dev, u8 reg,
unsigned long long val)
{
struct ltc2945_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
u32 shunt_resistor = data->shunt_resistor;
unsigned int control;
int ret;
/* Ensure we don't overflow */
val = clamp_val(val, 0, U32_MAX);
switch (reg) {
case LTC2945_POWER_H:
case LTC2945_MAX_POWER_H:
case LTC2945_MIN_POWER_H:
case LTC2945_MAX_POWER_THRES_H:
case LTC2945_MIN_POWER_THRES_H:
/*
* Control register bit 0 selects if voltage at SENSE+/VDD
* or voltage at ADIN is used to measure power, which in turn
* determines register calculations.
*/
ret = regmap_read(regmap, LTC2945_CONTROL, &control);
if (ret < 0)
return ret;
if (control & CONTROL_MULT_SELECT) {
/* 25 mV * 25 uV = 0.625 uV resolution. */
val *= shunt_resistor;
/* Overflow check: Assuming 32-bit val and shunt resistor, val <= 64bits */
val = DIV_ROUND_CLOSEST_ULL(val, 625 * 1000);
/* Overflow check: val is now <= 44 bits */
} else {
/* 0.5 mV * 25 uV = 0.0125 uV resolution. */
val *= shunt_resistor;
/* Overflow check: Assuming 32-bit val and shunt resistor, val <= 64bits */
val = DIV_ROUND_CLOSEST_ULL(val, 25 * 1000) * 2;
/* Overflow check: val is now <= 51 bits */
}
break;
case LTC2945_VIN_H:
case LTC2945_MAX_VIN_H:
case LTC2945_MIN_VIN_H:
case LTC2945_MAX_VIN_THRES_H:
case LTC2945_MIN_VIN_THRES_H:
/* 25 mV resolution. */
val = DIV_ROUND_CLOSEST_ULL(val, 25);
break;
case LTC2945_ADIN_H:
case LTC2945_MAX_ADIN_H:
case LTC2945_MIN_ADIN_THRES_H:
case LTC2945_MAX_ADIN_THRES_H:
case LTC2945_MIN_ADIN_H:
/* 0.5mV resolution. */
val *= 2;
break;
case LTC2945_SENSE_H:
case LTC2945_MAX_SENSE_H:
case LTC2945_MIN_SENSE_H:
case LTC2945_MAX_SENSE_THRES_H:
case LTC2945_MIN_SENSE_THRES_H:
/* 25 uV resolution. Convert to mA. */
val *= shunt_resistor;
/* Overflow check: Assuming 32-bit val and 32-bit shunt resistor, val is 64bits */
val = DIV_ROUND_CLOSEST_ULL(val, 25 * 1000);
/* Overflow check: val is now <= 50 bits */
break;
default:
return -EINVAL;
}
return val;
}
static ssize_t ltc2945_value_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
long long value;
value = ltc2945_reg_to_val(dev, attr->index);
if (value < 0)
return value;
return sysfs_emit(buf, "%lld\n", value);
}
static ssize_t ltc2945_value_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ltc2945_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
u8 reg = attr->index;
unsigned int val;
u8 regbuf[3];
int num_regs;
long long regval;
int ret;
ret = kstrtouint(buf, 10, &val);
if (ret)
return ret;
/* convert to register value, then clamp and write result */
regval = ltc2945_val_to_reg(dev, reg, val);
if (regval < 0)
return regval;
if (is_power_reg(reg)) {
regval = clamp_val(regval, 0, 0xffffff);
regbuf[0] = regval >> 16;
regbuf[1] = (regval >> 8) & 0xff;
regbuf[2] = regval;
num_regs = 3;
} else {
regval = clamp_val(regval, 0, 0xfff) << 4;
regbuf[0] = regval >> 8;
regbuf[1] = regval & 0xff;
num_regs = 2;
}
ret = regmap_bulk_write(regmap, reg, regbuf, num_regs);
return ret < 0 ? ret : count;
}
static ssize_t ltc2945_history_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ltc2945_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
u8 reg = attr->index;
int num_regs = is_power_reg(reg) ? 3 : 2;
u8 buf_min[3] = { 0xff, 0xff, 0xff };
u8 buf_max[3] = { 0, 0, 0 };
unsigned long val;
int ret;
ret = kstrtoul(buf, 10, &val);
if (ret)
return ret;
if (val != 1)
return -EINVAL;
ret = regmap_update_bits(regmap, LTC2945_CONTROL, CONTROL_TEST_MODE,
CONTROL_TEST_MODE);
/* Reset minimum */
ret = regmap_bulk_write(regmap, reg, buf_min, num_regs);
if (ret)
return ret;
switch (reg) {
case LTC2945_MIN_POWER_H:
reg = LTC2945_MAX_POWER_H;
break;
case LTC2945_MIN_SENSE_H:
reg = LTC2945_MAX_SENSE_H;
break;
case LTC2945_MIN_VIN_H:
reg = LTC2945_MAX_VIN_H;
break;
case LTC2945_MIN_ADIN_H:
reg = LTC2945_MAX_ADIN_H;
break;
default:
WARN_ONCE(1, "Bad register: 0x%x\n", reg);
return -EINVAL;
}
/* Reset maximum */
ret = regmap_bulk_write(regmap, reg, buf_max, num_regs);
/* Try resetting test mode even if there was an error */
regmap_update_bits(regmap, LTC2945_CONTROL, CONTROL_TEST_MODE, 0);
return ret ? : count;
}
static ssize_t ltc2945_bool_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct ltc2945_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
unsigned int fault;
int ret;
ret = regmap_read(regmap, LTC2945_FAULT, &fault);
if (ret < 0)
return ret;
fault &= attr->index;
if (fault) /* Clear reported faults in chip register */
regmap_update_bits(regmap, LTC2945_FAULT, attr->index, 0);
return sysfs_emit(buf, "%d\n", !!fault);
}
/* Input voltages */
static SENSOR_DEVICE_ATTR_RO(in1_input, ltc2945_value, LTC2945_VIN_H);
static SENSOR_DEVICE_ATTR_RW(in1_min, ltc2945_value, LTC2945_MIN_VIN_THRES_H);
static SENSOR_DEVICE_ATTR_RW(in1_max, ltc2945_value, LTC2945_MAX_VIN_THRES_H);
static SENSOR_DEVICE_ATTR_RO(in1_lowest, ltc2945_value, LTC2945_MIN_VIN_H);
static SENSOR_DEVICE_ATTR_RO(in1_highest, ltc2945_value, LTC2945_MAX_VIN_H);
static SENSOR_DEVICE_ATTR_WO(in1_reset_history, ltc2945_history,
LTC2945_MIN_VIN_H);
static SENSOR_DEVICE_ATTR_RO(in2_input, ltc2945_value, LTC2945_ADIN_H);
static SENSOR_DEVICE_ATTR_RW(in2_min, ltc2945_value, LTC2945_MIN_ADIN_THRES_H);
static SENSOR_DEVICE_ATTR_RW(in2_max, ltc2945_value, LTC2945_MAX_ADIN_THRES_H);
static SENSOR_DEVICE_ATTR_RO(in2_lowest, ltc2945_value, LTC2945_MIN_ADIN_H);
static SENSOR_DEVICE_ATTR_RO(in2_highest, ltc2945_value, LTC2945_MAX_ADIN_H);
static SENSOR_DEVICE_ATTR_WO(in2_reset_history, ltc2945_history,
LTC2945_MIN_ADIN_H);
/* Voltage alarms */
static SENSOR_DEVICE_ATTR_RO(in1_min_alarm, ltc2945_bool, FAULT_VIN_UV);
static SENSOR_DEVICE_ATTR_RO(in1_max_alarm, ltc2945_bool, FAULT_VIN_OV);
static SENSOR_DEVICE_ATTR_RO(in2_min_alarm, ltc2945_bool, FAULT_ADIN_UV);
static SENSOR_DEVICE_ATTR_RO(in2_max_alarm, ltc2945_bool, FAULT_ADIN_OV);
/* Currents (via sense resistor) */
static SENSOR_DEVICE_ATTR_RO(curr1_input, ltc2945_value, LTC2945_SENSE_H);
static SENSOR_DEVICE_ATTR_RW(curr1_min, ltc2945_value,
LTC2945_MIN_SENSE_THRES_H);
static SENSOR_DEVICE_ATTR_RW(curr1_max, ltc2945_value,
LTC2945_MAX_SENSE_THRES_H);
static SENSOR_DEVICE_ATTR_RO(curr1_lowest, ltc2945_value, LTC2945_MIN_SENSE_H);
static SENSOR_DEVICE_ATTR_RO(curr1_highest, ltc2945_value,
LTC2945_MAX_SENSE_H);
static SENSOR_DEVICE_ATTR_WO(curr1_reset_history, ltc2945_history,
LTC2945_MIN_SENSE_H);
/* Current alarms */
static SENSOR_DEVICE_ATTR_RO(curr1_min_alarm, ltc2945_bool, FAULT_SENSE_UV);
static SENSOR_DEVICE_ATTR_RO(curr1_max_alarm, ltc2945_bool, FAULT_SENSE_OV);
/* Power */
static SENSOR_DEVICE_ATTR_RO(power1_input, ltc2945_value, LTC2945_POWER_H);
static SENSOR_DEVICE_ATTR_RW(power1_min, ltc2945_value,
LTC2945_MIN_POWER_THRES_H);
static SENSOR_DEVICE_ATTR_RW(power1_max, ltc2945_value,
LTC2945_MAX_POWER_THRES_H);
static SENSOR_DEVICE_ATTR_RO(power1_input_lowest, ltc2945_value,
LTC2945_MIN_POWER_H);
static SENSOR_DEVICE_ATTR_RO(power1_input_highest, ltc2945_value,
LTC2945_MAX_POWER_H);
static SENSOR_DEVICE_ATTR_WO(power1_reset_history, ltc2945_history,
LTC2945_MIN_POWER_H);
/* Power alarms */
static SENSOR_DEVICE_ATTR_RO(power1_min_alarm, ltc2945_bool, FAULT_POWER_UV);
static SENSOR_DEVICE_ATTR_RO(power1_max_alarm, ltc2945_bool, FAULT_POWER_OV);
static struct attribute *ltc2945_attrs[] = {
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_lowest.dev_attr.attr,
&sensor_dev_attr_in1_highest.dev_attr.attr,
&sensor_dev_attr_in1_reset_history.dev_attr.attr,
&sensor_dev_attr_in1_min_alarm.dev_attr.attr,
&sensor_dev_attr_in1_max_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_lowest.dev_attr.attr,
&sensor_dev_attr_in2_highest.dev_attr.attr,
&sensor_dev_attr_in2_reset_history.dev_attr.attr,
&sensor_dev_attr_in2_min_alarm.dev_attr.attr,
&sensor_dev_attr_in2_max_alarm.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_curr1_min.dev_attr.attr,
&sensor_dev_attr_curr1_max.dev_attr.attr,
&sensor_dev_attr_curr1_lowest.dev_attr.attr,
&sensor_dev_attr_curr1_highest.dev_attr.attr,
&sensor_dev_attr_curr1_reset_history.dev_attr.attr,
&sensor_dev_attr_curr1_min_alarm.dev_attr.attr,
&sensor_dev_attr_curr1_max_alarm.dev_attr.attr,
&sensor_dev_attr_power1_input.dev_attr.attr,
&sensor_dev_attr_power1_min.dev_attr.attr,
&sensor_dev_attr_power1_max.dev_attr.attr,
&sensor_dev_attr_power1_input_lowest.dev_attr.attr,
&sensor_dev_attr_power1_input_highest.dev_attr.attr,
&sensor_dev_attr_power1_reset_history.dev_attr.attr,
&sensor_dev_attr_power1_min_alarm.dev_attr.attr,
&sensor_dev_attr_power1_max_alarm.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(ltc2945);
static const struct regmap_config ltc2945_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = LTC2945_MIN_ADIN_THRES_L,
};
static int ltc2945_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct regmap *regmap;
struct ltc2945_data *data;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
dev_set_drvdata(dev, data);
regmap = devm_regmap_init_i2c(client, <c2945_regmap_config);
if (IS_ERR(regmap)) {
dev_err(dev, "failed to allocate register map\n");
return PTR_ERR(regmap);
}
data->regmap = regmap;
if (device_property_read_u32(dev, "shunt-resistor-micro-ohms",
&data->shunt_resistor))
data->shunt_resistor = 1000;
if (data->shunt_resistor == 0)
return -EINVAL;
/* Clear faults */
regmap_write(regmap, LTC2945_FAULT, 0x00);
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
ltc2945_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id ltc2945_id[] = {
{"ltc2945", 0},
{ }
};
MODULE_DEVICE_TABLE(i2c, ltc2945_id);
static struct i2c_driver ltc2945_driver = {
.driver = {
.name = "ltc2945",
.of_match_table = of_match_ptr(ltc2945_of_match),
},
.probe = ltc2945_probe,
.id_table = ltc2945_id,
};
module_i2c_driver(ltc2945_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("LTC2945 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ltc2945.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* amc6821.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2009 T. Mertelj <[email protected]>
*
* Based on max6650.c:
* Copyright (C) 2007 Hans J. Koch <[email protected]>
*/
#include <linux/kernel.h> /* Needed for KERN_INFO */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
/*
* Addresses to scan.
*/
static const unsigned short normal_i2c[] = {0x18, 0x19, 0x1a, 0x2c, 0x2d, 0x2e,
0x4c, 0x4d, 0x4e, I2C_CLIENT_END};
/*
* Insmod parameters
*/
static int pwminv; /*Inverted PWM output. */
module_param(pwminv, int, 0444);
static int init = 1; /*Power-on initialization.*/
module_param(init, int, 0444);
enum chips { amc6821 };
#define AMC6821_REG_DEV_ID 0x3D
#define AMC6821_REG_COMP_ID 0x3E
#define AMC6821_REG_CONF1 0x00
#define AMC6821_REG_CONF2 0x01
#define AMC6821_REG_CONF3 0x3F
#define AMC6821_REG_CONF4 0x04
#define AMC6821_REG_STAT1 0x02
#define AMC6821_REG_STAT2 0x03
#define AMC6821_REG_TDATA_LOW 0x08
#define AMC6821_REG_TDATA_HI 0x09
#define AMC6821_REG_LTEMP_HI 0x0A
#define AMC6821_REG_RTEMP_HI 0x0B
#define AMC6821_REG_LTEMP_LIMIT_MIN 0x15
#define AMC6821_REG_LTEMP_LIMIT_MAX 0x14
#define AMC6821_REG_RTEMP_LIMIT_MIN 0x19
#define AMC6821_REG_RTEMP_LIMIT_MAX 0x18
#define AMC6821_REG_LTEMP_CRIT 0x1B
#define AMC6821_REG_RTEMP_CRIT 0x1D
#define AMC6821_REG_PSV_TEMP 0x1C
#define AMC6821_REG_DCY 0x22
#define AMC6821_REG_LTEMP_FAN_CTRL 0x24
#define AMC6821_REG_RTEMP_FAN_CTRL 0x25
#define AMC6821_REG_DCY_LOW_TEMP 0x21
#define AMC6821_REG_TACH_LLIMITL 0x10
#define AMC6821_REG_TACH_LLIMITH 0x11
#define AMC6821_REG_TACH_HLIMITL 0x12
#define AMC6821_REG_TACH_HLIMITH 0x13
#define AMC6821_CONF1_START 0x01
#define AMC6821_CONF1_FAN_INT_EN 0x02
#define AMC6821_CONF1_FANIE 0x04
#define AMC6821_CONF1_PWMINV 0x08
#define AMC6821_CONF1_FAN_FAULT_EN 0x10
#define AMC6821_CONF1_FDRC0 0x20
#define AMC6821_CONF1_FDRC1 0x40
#define AMC6821_CONF1_THERMOVIE 0x80
#define AMC6821_CONF2_PWM_EN 0x01
#define AMC6821_CONF2_TACH_MODE 0x02
#define AMC6821_CONF2_TACH_EN 0x04
#define AMC6821_CONF2_RTFIE 0x08
#define AMC6821_CONF2_LTOIE 0x10
#define AMC6821_CONF2_RTOIE 0x20
#define AMC6821_CONF2_PSVIE 0x40
#define AMC6821_CONF2_RST 0x80
#define AMC6821_CONF3_THERM_FAN_EN 0x80
#define AMC6821_CONF3_REV_MASK 0x0F
#define AMC6821_CONF4_OVREN 0x10
#define AMC6821_CONF4_TACH_FAST 0x20
#define AMC6821_CONF4_PSPR 0x40
#define AMC6821_CONF4_MODE 0x80
#define AMC6821_STAT1_RPM_ALARM 0x01
#define AMC6821_STAT1_FANS 0x02
#define AMC6821_STAT1_RTH 0x04
#define AMC6821_STAT1_RTL 0x08
#define AMC6821_STAT1_R_THERM 0x10
#define AMC6821_STAT1_RTF 0x20
#define AMC6821_STAT1_LTH 0x40
#define AMC6821_STAT1_LTL 0x80
#define AMC6821_STAT2_RTC 0x08
#define AMC6821_STAT2_LTC 0x10
#define AMC6821_STAT2_LPSV 0x20
#define AMC6821_STAT2_L_THERM 0x40
#define AMC6821_STAT2_THERM_IN 0x80
enum {IDX_TEMP1_INPUT = 0, IDX_TEMP1_MIN, IDX_TEMP1_MAX,
IDX_TEMP1_CRIT, IDX_TEMP2_INPUT, IDX_TEMP2_MIN,
IDX_TEMP2_MAX, IDX_TEMP2_CRIT,
TEMP_IDX_LEN, };
static const u8 temp_reg[] = {AMC6821_REG_LTEMP_HI,
AMC6821_REG_LTEMP_LIMIT_MIN,
AMC6821_REG_LTEMP_LIMIT_MAX,
AMC6821_REG_LTEMP_CRIT,
AMC6821_REG_RTEMP_HI,
AMC6821_REG_RTEMP_LIMIT_MIN,
AMC6821_REG_RTEMP_LIMIT_MAX,
AMC6821_REG_RTEMP_CRIT, };
enum {IDX_FAN1_INPUT = 0, IDX_FAN1_MIN, IDX_FAN1_MAX,
FAN1_IDX_LEN, };
static const u8 fan_reg_low[] = {AMC6821_REG_TDATA_LOW,
AMC6821_REG_TACH_LLIMITL,
AMC6821_REG_TACH_HLIMITL, };
static const u8 fan_reg_hi[] = {AMC6821_REG_TDATA_HI,
AMC6821_REG_TACH_LLIMITH,
AMC6821_REG_TACH_HLIMITH, };
/*
* Client data (each client gets its own)
*/
struct amc6821_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* register values */
int temp[TEMP_IDX_LEN];
u16 fan[FAN1_IDX_LEN];
u8 fan1_div;
u8 pwm1;
u8 temp1_auto_point_temp[3];
u8 temp2_auto_point_temp[3];
u8 pwm1_auto_point_pwm[3];
u8 pwm1_enable;
u8 pwm1_auto_channels_temp;
u8 stat1;
u8 stat2;
};
static struct amc6821_data *amc6821_update_device(struct device *dev)
{
struct amc6821_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int timeout = HZ;
u8 reg;
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + timeout) ||
!data->valid) {
for (i = 0; i < TEMP_IDX_LEN; i++)
data->temp[i] = (int8_t)i2c_smbus_read_byte_data(
client, temp_reg[i]);
data->stat1 = i2c_smbus_read_byte_data(client,
AMC6821_REG_STAT1);
data->stat2 = i2c_smbus_read_byte_data(client,
AMC6821_REG_STAT2);
data->pwm1 = i2c_smbus_read_byte_data(client,
AMC6821_REG_DCY);
for (i = 0; i < FAN1_IDX_LEN; i++) {
data->fan[i] = i2c_smbus_read_byte_data(
client,
fan_reg_low[i]);
data->fan[i] += i2c_smbus_read_byte_data(
client,
fan_reg_hi[i]) << 8;
}
data->fan1_div = i2c_smbus_read_byte_data(client,
AMC6821_REG_CONF4);
data->fan1_div = data->fan1_div & AMC6821_CONF4_PSPR ? 4 : 2;
data->pwm1_auto_point_pwm[0] = 0;
data->pwm1_auto_point_pwm[2] = 255;
data->pwm1_auto_point_pwm[1] = i2c_smbus_read_byte_data(client,
AMC6821_REG_DCY_LOW_TEMP);
data->temp1_auto_point_temp[0] =
i2c_smbus_read_byte_data(client,
AMC6821_REG_PSV_TEMP);
data->temp2_auto_point_temp[0] =
data->temp1_auto_point_temp[0];
reg = i2c_smbus_read_byte_data(client,
AMC6821_REG_LTEMP_FAN_CTRL);
data->temp1_auto_point_temp[1] = (reg & 0xF8) >> 1;
reg &= 0x07;
reg = 0x20 >> reg;
if (reg > 0)
data->temp1_auto_point_temp[2] =
data->temp1_auto_point_temp[1] +
(data->pwm1_auto_point_pwm[2] -
data->pwm1_auto_point_pwm[1]) / reg;
else
data->temp1_auto_point_temp[2] = 255;
reg = i2c_smbus_read_byte_data(client,
AMC6821_REG_RTEMP_FAN_CTRL);
data->temp2_auto_point_temp[1] = (reg & 0xF8) >> 1;
reg &= 0x07;
reg = 0x20 >> reg;
if (reg > 0)
data->temp2_auto_point_temp[2] =
data->temp2_auto_point_temp[1] +
(data->pwm1_auto_point_pwm[2] -
data->pwm1_auto_point_pwm[1]) / reg;
else
data->temp2_auto_point_temp[2] = 255;
reg = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
reg = (reg >> 5) & 0x3;
switch (reg) {
case 0: /*open loop: software sets pwm1*/
data->pwm1_auto_channels_temp = 0;
data->pwm1_enable = 1;
break;
case 2: /*closed loop: remote T (temp2)*/
data->pwm1_auto_channels_temp = 2;
data->pwm1_enable = 2;
break;
case 3: /*closed loop: local and remote T (temp2)*/
data->pwm1_auto_channels_temp = 3;
data->pwm1_enable = 3;
break;
case 1: /*
* semi-open loop: software sets rpm, chip controls
* pwm1, currently not implemented
*/
data->pwm1_auto_channels_temp = 0;
data->pwm1_enable = 0;
break;
}
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
int ix = to_sensor_dev_attr(devattr)->index;
return sprintf(buf, "%d\n", data->temp[ix] * 1000);
}
static ssize_t temp_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct amc6821_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ix = to_sensor_dev_attr(attr)->index;
long val;
int ret = kstrtol(buf, 10, &val);
if (ret)
return ret;
val = clamp_val(val / 1000, -128, 127);
mutex_lock(&data->update_lock);
data->temp[ix] = val;
if (i2c_smbus_write_byte_data(client, temp_reg[ix], data->temp[ix])) {
dev_err(&client->dev, "Register write error, aborting.\n");
count = -EIO;
}
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
int ix = to_sensor_dev_attr(devattr)->index;
u8 flag;
switch (ix) {
case IDX_TEMP1_MIN:
flag = data->stat1 & AMC6821_STAT1_LTL;
break;
case IDX_TEMP1_MAX:
flag = data->stat1 & AMC6821_STAT1_LTH;
break;
case IDX_TEMP1_CRIT:
flag = data->stat2 & AMC6821_STAT2_LTC;
break;
case IDX_TEMP2_MIN:
flag = data->stat1 & AMC6821_STAT1_RTL;
break;
case IDX_TEMP2_MAX:
flag = data->stat1 & AMC6821_STAT1_RTH;
break;
case IDX_TEMP2_CRIT:
flag = data->stat2 & AMC6821_STAT2_RTC;
break;
default:
dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
return -EINVAL;
}
if (flag)
return sprintf(buf, "1");
else
return sprintf(buf, "0");
}
static ssize_t temp2_fault_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
if (data->stat1 & AMC6821_STAT1_RTF)
return sprintf(buf, "1");
else
return sprintf(buf, "0");
}
static ssize_t pwm1_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
return sprintf(buf, "%d\n", data->pwm1);
}
static ssize_t pwm1_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct amc6821_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int ret = kstrtol(buf, 10, &val);
if (ret)
return ret;
mutex_lock(&data->update_lock);
data->pwm1 = clamp_val(val , 0, 255);
i2c_smbus_write_byte_data(client, AMC6821_REG_DCY, data->pwm1);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm1_enable_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
return sprintf(buf, "%d\n", data->pwm1_enable);
}
static ssize_t pwm1_enable_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct amc6821_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int config = kstrtol(buf, 10, &val);
if (config)
return config;
mutex_lock(&data->update_lock);
config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
if (config < 0) {
dev_err(&client->dev,
"Error reading configuration register, aborting.\n");
count = config;
goto unlock;
}
switch (val) {
case 1:
config &= ~AMC6821_CONF1_FDRC0;
config &= ~AMC6821_CONF1_FDRC1;
break;
case 2:
config &= ~AMC6821_CONF1_FDRC0;
config |= AMC6821_CONF1_FDRC1;
break;
case 3:
config |= AMC6821_CONF1_FDRC0;
config |= AMC6821_CONF1_FDRC1;
break;
default:
count = -EINVAL;
goto unlock;
}
if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF1, config)) {
dev_err(&client->dev,
"Configuration register write error, aborting.\n");
count = -EIO;
}
unlock:
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm1_auto_channels_temp_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
return sprintf(buf, "%d\n", data->pwm1_auto_channels_temp);
}
static ssize_t temp_auto_point_temp_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
int ix = to_sensor_dev_attr_2(devattr)->index;
int nr = to_sensor_dev_attr_2(devattr)->nr;
struct amc6821_data *data = amc6821_update_device(dev);
switch (nr) {
case 1:
return sprintf(buf, "%d\n",
data->temp1_auto_point_temp[ix] * 1000);
case 2:
return sprintf(buf, "%d\n",
data->temp2_auto_point_temp[ix] * 1000);
default:
dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
return -EINVAL;
}
}
static ssize_t pwm1_auto_point_pwm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
int ix = to_sensor_dev_attr(devattr)->index;
struct amc6821_data *data = amc6821_update_device(dev);
return sprintf(buf, "%d\n", data->pwm1_auto_point_pwm[ix]);
}
static inline ssize_t set_slope_register(struct i2c_client *client,
u8 reg,
u8 dpwm,
u8 *ptemp)
{
int dt;
u8 tmp;
dt = ptemp[2]-ptemp[1];
for (tmp = 4; tmp > 0; tmp--) {
if (dt * (0x20 >> tmp) >= dpwm)
break;
}
tmp |= (ptemp[1] & 0x7C) << 1;
if (i2c_smbus_write_byte_data(client,
reg, tmp)) {
dev_err(&client->dev, "Register write error, aborting.\n");
return -EIO;
}
return 0;
}
static ssize_t temp_auto_point_temp_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct amc6821_data *data = amc6821_update_device(dev);
struct i2c_client *client = data->client;
int ix = to_sensor_dev_attr_2(attr)->index;
int nr = to_sensor_dev_attr_2(attr)->nr;
u8 *ptemp;
u8 reg;
int dpwm;
long val;
int ret = kstrtol(buf, 10, &val);
if (ret)
return ret;
switch (nr) {
case 1:
ptemp = data->temp1_auto_point_temp;
reg = AMC6821_REG_LTEMP_FAN_CTRL;
break;
case 2:
ptemp = data->temp2_auto_point_temp;
reg = AMC6821_REG_RTEMP_FAN_CTRL;
break;
default:
dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
return -EINVAL;
}
mutex_lock(&data->update_lock);
data->valid = false;
switch (ix) {
case 0:
ptemp[0] = clamp_val(val / 1000, 0,
data->temp1_auto_point_temp[1]);
ptemp[0] = clamp_val(ptemp[0], 0,
data->temp2_auto_point_temp[1]);
ptemp[0] = clamp_val(ptemp[0], 0, 63);
if (i2c_smbus_write_byte_data(
client,
AMC6821_REG_PSV_TEMP,
ptemp[0])) {
dev_err(&client->dev,
"Register write error, aborting.\n");
count = -EIO;
}
goto EXIT;
case 1:
ptemp[1] = clamp_val(val / 1000, (ptemp[0] & 0x7C) + 4, 124);
ptemp[1] &= 0x7C;
ptemp[2] = clamp_val(ptemp[2], ptemp[1] + 1, 255);
break;
case 2:
ptemp[2] = clamp_val(val / 1000, ptemp[1]+1, 255);
break;
default:
dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
count = -EINVAL;
goto EXIT;
}
dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
if (set_slope_register(client, reg, dpwm, ptemp))
count = -EIO;
EXIT:
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm1_auto_point_pwm_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct amc6821_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int dpwm;
long val;
int ret = kstrtol(buf, 10, &val);
if (ret)
return ret;
mutex_lock(&data->update_lock);
data->pwm1_auto_point_pwm[1] = clamp_val(val, 0, 254);
if (i2c_smbus_write_byte_data(client, AMC6821_REG_DCY_LOW_TEMP,
data->pwm1_auto_point_pwm[1])) {
dev_err(&client->dev, "Register write error, aborting.\n");
count = -EIO;
goto EXIT;
}
dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
if (set_slope_register(client, AMC6821_REG_LTEMP_FAN_CTRL, dpwm,
data->temp1_auto_point_temp)) {
count = -EIO;
goto EXIT;
}
if (set_slope_register(client, AMC6821_REG_RTEMP_FAN_CTRL, dpwm,
data->temp2_auto_point_temp)) {
count = -EIO;
goto EXIT;
}
EXIT:
data->valid = false;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
int ix = to_sensor_dev_attr(devattr)->index;
if (0 == data->fan[ix])
return sprintf(buf, "0");
return sprintf(buf, "%d\n", (int)(6000000 / data->fan[ix]));
}
static ssize_t fan1_fault_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
if (data->stat1 & AMC6821_STAT1_FANS)
return sprintf(buf, "1");
else
return sprintf(buf, "0");
}
static ssize_t fan_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct amc6821_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int ix = to_sensor_dev_attr(attr)->index;
int ret = kstrtol(buf, 10, &val);
if (ret)
return ret;
val = 1 > val ? 0xFFFF : 6000000/val;
mutex_lock(&data->update_lock);
data->fan[ix] = (u16) clamp_val(val, 1, 0xFFFF);
if (i2c_smbus_write_byte_data(client, fan_reg_low[ix],
data->fan[ix] & 0xFF)) {
dev_err(&client->dev, "Register write error, aborting.\n");
count = -EIO;
goto EXIT;
}
if (i2c_smbus_write_byte_data(client,
fan_reg_hi[ix], data->fan[ix] >> 8)) {
dev_err(&client->dev, "Register write error, aborting.\n");
count = -EIO;
}
EXIT:
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan1_div_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct amc6821_data *data = amc6821_update_device(dev);
return sprintf(buf, "%d\n", data->fan1_div);
}
static ssize_t fan1_div_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct amc6821_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int config = kstrtol(buf, 10, &val);
if (config)
return config;
mutex_lock(&data->update_lock);
config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
if (config < 0) {
dev_err(&client->dev,
"Error reading configuration register, aborting.\n");
count = config;
goto EXIT;
}
switch (val) {
case 2:
config &= ~AMC6821_CONF4_PSPR;
data->fan1_div = 2;
break;
case 4:
config |= AMC6821_CONF4_PSPR;
data->fan1_div = 4;
break;
default:
count = -EINVAL;
goto EXIT;
}
if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4, config)) {
dev_err(&client->dev,
"Configuration register write error, aborting.\n");
count = -EIO;
}
EXIT:
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, IDX_TEMP1_INPUT);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp, IDX_TEMP1_MIN);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp, IDX_TEMP1_MAX);
static SENSOR_DEVICE_ATTR_RW(temp1_crit, temp, IDX_TEMP1_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, temp_alarm, IDX_TEMP1_MIN);
static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, temp_alarm, IDX_TEMP1_MAX);
static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, temp_alarm, IDX_TEMP1_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, IDX_TEMP2_INPUT);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp, IDX_TEMP2_MIN);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp, IDX_TEMP2_MAX);
static SENSOR_DEVICE_ATTR_RW(temp2_crit, temp, IDX_TEMP2_CRIT);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, temp2_fault, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_min_alarm, temp_alarm, IDX_TEMP2_MIN);
static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, temp_alarm, IDX_TEMP2_MAX);
static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, temp_alarm, IDX_TEMP2_CRIT);
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, IDX_FAN1_INPUT);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan, IDX_FAN1_MIN);
static SENSOR_DEVICE_ATTR_RW(fan1_max, fan, IDX_FAN1_MAX);
static SENSOR_DEVICE_ATTR_RO(fan1_fault, fan1_fault, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan1_div, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1, pwm1, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm1_enable, 0);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point1_pwm, pwm1_auto_point_pwm, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_pwm, pwm1_auto_point_pwm, 1);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point3_pwm, pwm1_auto_point_pwm, 2);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_channels_temp, pwm1_auto_channels_temp,
0);
static SENSOR_DEVICE_ATTR_2_RO(temp1_auto_point1_temp, temp_auto_point_temp,
1, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point2_temp, temp_auto_point_temp,
1, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point3_temp, temp_auto_point_temp,
1, 2);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point1_temp, temp_auto_point_temp,
2, 0);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point2_temp, temp_auto_point_temp,
2, 1);
static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point3_temp, temp_auto_point_temp,
2, 2);
static struct attribute *amc6821_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_max.dev_attr.attr,
&sensor_dev_attr_fan1_fault.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_temp2_auto_point3_temp.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(amc6821);
/* Return 0 if detection is successful, -ENODEV otherwise */
static int amc6821_detect(
struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int address = client->addr;
int dev_id, comp_id;
dev_dbg(&adapter->dev, "amc6821_detect called.\n");
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
dev_dbg(&adapter->dev,
"amc6821: I2C bus doesn't support byte mode, "
"skipping.\n");
return -ENODEV;
}
dev_id = i2c_smbus_read_byte_data(client, AMC6821_REG_DEV_ID);
comp_id = i2c_smbus_read_byte_data(client, AMC6821_REG_COMP_ID);
if (dev_id != 0x21 || comp_id != 0x49) {
dev_dbg(&adapter->dev,
"amc6821: detection failed at 0x%02x.\n",
address);
return -ENODEV;
}
/*
* Bit 7 of the address register is ignored, so we can check the
* ID registers again
*/
dev_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_DEV_ID);
comp_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_COMP_ID);
if (dev_id != 0x21 || comp_id != 0x49) {
dev_dbg(&adapter->dev,
"amc6821: detection failed at 0x%02x.\n",
address);
return -ENODEV;
}
dev_info(&adapter->dev, "amc6821: chip found at 0x%02x.\n", address);
strscpy(info->type, "amc6821", I2C_NAME_SIZE);
return 0;
}
static int amc6821_init_client(struct i2c_client *client)
{
int config;
int err = -EIO;
if (init) {
config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
if (config < 0) {
dev_err(&client->dev,
"Error reading configuration register, aborting.\n");
return err;
}
config |= AMC6821_CONF4_MODE;
if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4,
config)) {
dev_err(&client->dev,
"Configuration register write error, aborting.\n");
return err;
}
config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF3);
if (config < 0) {
dev_err(&client->dev,
"Error reading configuration register, aborting.\n");
return err;
}
dev_info(&client->dev, "Revision %d\n", config & 0x0f);
config &= ~AMC6821_CONF3_THERM_FAN_EN;
if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF3,
config)) {
dev_err(&client->dev,
"Configuration register write error, aborting.\n");
return err;
}
config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF2);
if (config < 0) {
dev_err(&client->dev,
"Error reading configuration register, aborting.\n");
return err;
}
config &= ~AMC6821_CONF2_RTFIE;
config &= ~AMC6821_CONF2_LTOIE;
config &= ~AMC6821_CONF2_RTOIE;
if (i2c_smbus_write_byte_data(client,
AMC6821_REG_CONF2, config)) {
dev_err(&client->dev,
"Configuration register write error, aborting.\n");
return err;
}
config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
if (config < 0) {
dev_err(&client->dev,
"Error reading configuration register, aborting.\n");
return err;
}
config &= ~AMC6821_CONF1_THERMOVIE;
config &= ~AMC6821_CONF1_FANIE;
config |= AMC6821_CONF1_START;
if (pwminv)
config |= AMC6821_CONF1_PWMINV;
else
config &= ~AMC6821_CONF1_PWMINV;
if (i2c_smbus_write_byte_data(
client, AMC6821_REG_CONF1, config)) {
dev_err(&client->dev,
"Configuration register write error, aborting.\n");
return err;
}
}
return 0;
}
static int amc6821_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct amc6821_data *data;
struct device *hwmon_dev;
int err;
data = devm_kzalloc(dev, sizeof(struct amc6821_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/*
* Initialize the amc6821 chip
*/
err = amc6821_init_client(client);
if (err)
return err;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
amc6821_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id amc6821_id[] = {
{ "amc6821", amc6821 },
{ }
};
MODULE_DEVICE_TABLE(i2c, amc6821_id);
static struct i2c_driver amc6821_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "amc6821",
},
.probe = amc6821_probe,
.id_table = amc6821_id,
.detect = amc6821_detect,
.address_list = normal_i2c,
};
module_i2c_driver(amc6821_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("T. Mertelj <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments amc6821 hwmon driver");
|
linux-master
|
drivers/hwmon/amc6821.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* sht15.c - support for the SHT15 Temperature and Humidity Sensor
*
* Portions Copyright (c) 2010-2012 Savoir-faire Linux Inc.
* Jerome Oufella <[email protected]>
* Vivien Didelot <[email protected]>
*
* Copyright (c) 2009 Jonathan Cameron
*
* Copyright (c) 2007 Wouter Horre
*
* For further information, see the Documentation/hwmon/sht15.rst file.
*/
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/err.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/atomic.h>
#include <linux/bitrev.h>
#include <linux/gpio/consumer.h>
#include <linux/of.h>
/* Commands */
#define SHT15_MEASURE_TEMP 0x03
#define SHT15_MEASURE_RH 0x05
#define SHT15_WRITE_STATUS 0x06
#define SHT15_READ_STATUS 0x07
#define SHT15_SOFT_RESET 0x1E
/* Min timings */
#define SHT15_TSCKL 100 /* (nsecs) clock low */
#define SHT15_TSCKH 100 /* (nsecs) clock high */
#define SHT15_TSU 150 /* (nsecs) data setup time */
#define SHT15_TSRST 11 /* (msecs) soft reset time */
/* Status Register Bits */
#define SHT15_STATUS_LOW_RESOLUTION 0x01
#define SHT15_STATUS_NO_OTP_RELOAD 0x02
#define SHT15_STATUS_HEATER 0x04
#define SHT15_STATUS_LOW_BATTERY 0x40
/* List of supported chips */
enum sht15_chips { sht10, sht11, sht15, sht71, sht75 };
/* Actions the driver may be doing */
enum sht15_state {
SHT15_READING_NOTHING,
SHT15_READING_TEMP,
SHT15_READING_HUMID
};
/**
* struct sht15_temppair - elements of voltage dependent temp calc
* @vdd: supply voltage in microvolts
* @d1: see data sheet
*/
struct sht15_temppair {
int vdd; /* microvolts */
int d1;
};
/* Table 9 from datasheet - relates temperature calculation to supply voltage */
static const struct sht15_temppair temppoints[] = {
{ 2500000, -39400 },
{ 3000000, -39600 },
{ 3500000, -39700 },
{ 4000000, -39800 },
{ 5000000, -40100 },
};
/* Table from CRC datasheet, section 2.4 */
static const u8 sht15_crc8_table[] = {
0, 49, 98, 83, 196, 245, 166, 151,
185, 136, 219, 234, 125, 76, 31, 46,
67, 114, 33, 16, 135, 182, 229, 212,
250, 203, 152, 169, 62, 15, 92, 109,
134, 183, 228, 213, 66, 115, 32, 17,
63, 14, 93, 108, 251, 202, 153, 168,
197, 244, 167, 150, 1, 48, 99, 82,
124, 77, 30, 47, 184, 137, 218, 235,
61, 12, 95, 110, 249, 200, 155, 170,
132, 181, 230, 215, 64, 113, 34, 19,
126, 79, 28, 45, 186, 139, 216, 233,
199, 246, 165, 148, 3, 50, 97, 80,
187, 138, 217, 232, 127, 78, 29, 44,
2, 51, 96, 81, 198, 247, 164, 149,
248, 201, 154, 171, 60, 13, 94, 111,
65, 112, 35, 18, 133, 180, 231, 214,
122, 75, 24, 41, 190, 143, 220, 237,
195, 242, 161, 144, 7, 54, 101, 84,
57, 8, 91, 106, 253, 204, 159, 174,
128, 177, 226, 211, 68, 117, 38, 23,
252, 205, 158, 175, 56, 9, 90, 107,
69, 116, 39, 22, 129, 176, 227, 210,
191, 142, 221, 236, 123, 74, 25, 40,
6, 55, 100, 85, 194, 243, 160, 145,
71, 118, 37, 20, 131, 178, 225, 208,
254, 207, 156, 173, 58, 11, 88, 105,
4, 53, 102, 87, 192, 241, 162, 147,
189, 140, 223, 238, 121, 72, 27, 42,
193, 240, 163, 146, 5, 52, 103, 86,
120, 73, 26, 43, 188, 141, 222, 239,
130, 179, 224, 209, 70, 119, 36, 21,
59, 10, 89, 104, 255, 206, 157, 172
};
/**
* struct sht15_data - device instance specific data
* @sck: clock GPIO line
* @data: data GPIO line
* @read_work: bh of interrupt handler.
* @wait_queue: wait queue for getting values from device.
* @val_temp: last temperature value read from device.
* @val_humid: last humidity value read from device.
* @val_status: last status register value read from device.
* @checksum_ok: last value read from the device passed CRC validation.
* @checksumming: flag used to enable the data validation with CRC.
* @state: state identifying the action the driver is doing.
* @measurements_valid: are the current stored measures valid (start condition).
* @status_valid: is the current stored status valid (start condition).
* @last_measurement: time of last measure.
* @last_status: time of last status reading.
* @read_lock: mutex to ensure only one read in progress at a time.
* @dev: associate device structure.
* @hwmon_dev: device associated with hwmon subsystem.
* @reg: associated regulator (if specified).
* @nb: notifier block to handle notifications of voltage
* changes.
* @supply_uv: local copy of supply voltage used to allow use of
* regulator consumer if available.
* @supply_uv_valid: indicates that an updated value has not yet been
* obtained from the regulator and so any calculations
* based upon it will be invalid.
* @update_supply_work: work struct that is used to update the supply_uv.
* @interrupt_handled: flag used to indicate a handler has been scheduled.
*/
struct sht15_data {
struct gpio_desc *sck;
struct gpio_desc *data;
struct work_struct read_work;
wait_queue_head_t wait_queue;
uint16_t val_temp;
uint16_t val_humid;
u8 val_status;
bool checksum_ok;
bool checksumming;
enum sht15_state state;
bool measurements_valid;
bool status_valid;
unsigned long last_measurement;
unsigned long last_status;
struct mutex read_lock;
struct device *dev;
struct device *hwmon_dev;
struct regulator *reg;
struct notifier_block nb;
int supply_uv;
bool supply_uv_valid;
struct work_struct update_supply_work;
atomic_t interrupt_handled;
};
/**
* sht15_crc8() - compute crc8
* @data: sht15 specific data.
* @value: sht15 retrieved data.
* @len: Length of retrieved data
*
* This implements section 2 of the CRC datasheet.
*/
static u8 sht15_crc8(struct sht15_data *data,
const u8 *value,
int len)
{
u8 crc = bitrev8(data->val_status & 0x0F);
while (len--) {
crc = sht15_crc8_table[*value ^ crc];
value++;
}
return crc;
}
/**
* sht15_connection_reset() - reset the comms interface
* @data: sht15 specific data
*
* This implements section 3.4 of the data sheet
*/
static int sht15_connection_reset(struct sht15_data *data)
{
int i, err;
err = gpiod_direction_output(data->data, 1);
if (err)
return err;
ndelay(SHT15_TSCKL);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
for (i = 0; i < 9; ++i) {
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSCKH);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
}
return 0;
}
/**
* sht15_send_bit() - send an individual bit to the device
* @data: device state data
* @val: value of bit to be sent
*/
static inline void sht15_send_bit(struct sht15_data *data, int val)
{
gpiod_set_value(data->data, val);
ndelay(SHT15_TSU);
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSCKH);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL); /* clock low time */
}
/**
* sht15_transmission_start() - specific sequence for new transmission
* @data: device state data
*
* Timings for this are not documented on the data sheet, so very
* conservative ones used in implementation. This implements
* figure 12 on the data sheet.
*/
static int sht15_transmission_start(struct sht15_data *data)
{
int err;
/* ensure data is high and output */
err = gpiod_direction_output(data->data, 1);
if (err)
return err;
ndelay(SHT15_TSU);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSCKH);
gpiod_set_value(data->data, 0);
ndelay(SHT15_TSU);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSCKH);
gpiod_set_value(data->data, 1);
ndelay(SHT15_TSU);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
return 0;
}
/**
* sht15_send_byte() - send a single byte to the device
* @data: device state
* @byte: value to be sent
*/
static void sht15_send_byte(struct sht15_data *data, u8 byte)
{
int i;
for (i = 0; i < 8; i++) {
sht15_send_bit(data, !!(byte & 0x80));
byte <<= 1;
}
}
/**
* sht15_wait_for_response() - checks for ack from device
* @data: device state
*/
static int sht15_wait_for_response(struct sht15_data *data)
{
int err;
err = gpiod_direction_input(data->data);
if (err)
return err;
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSCKH);
if (gpiod_get_value(data->data)) {
gpiod_set_value(data->sck, 0);
dev_err(data->dev, "Command not acknowledged\n");
err = sht15_connection_reset(data);
if (err)
return err;
return -EIO;
}
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
return 0;
}
/**
* sht15_send_cmd() - Sends a command to the device.
* @data: device state
* @cmd: command byte to be sent
*
* On entry, sck is output low, data is output pull high
* and the interrupt disabled.
*/
static int sht15_send_cmd(struct sht15_data *data, u8 cmd)
{
int err;
err = sht15_transmission_start(data);
if (err)
return err;
sht15_send_byte(data, cmd);
return sht15_wait_for_response(data);
}
/**
* sht15_soft_reset() - send a soft reset command
* @data: sht15 specific data.
*
* As described in section 3.2 of the datasheet.
*/
static int sht15_soft_reset(struct sht15_data *data)
{
int ret;
ret = sht15_send_cmd(data, SHT15_SOFT_RESET);
if (ret)
return ret;
msleep(SHT15_TSRST);
/* device resets default hardware status register value */
data->val_status = 0;
return ret;
}
/**
* sht15_ack() - send a ack
* @data: sht15 specific data.
*
* Each byte of data is acknowledged by pulling the data line
* low for one clock pulse.
*/
static int sht15_ack(struct sht15_data *data)
{
int err;
err = gpiod_direction_output(data->data, 0);
if (err)
return err;
ndelay(SHT15_TSU);
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSU);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSU);
gpiod_set_value(data->data, 1);
return gpiod_direction_input(data->data);
}
/**
* sht15_end_transmission() - notify device of end of transmission
* @data: device state.
*
* This is basically a NAK (single clock pulse, data high).
*/
static int sht15_end_transmission(struct sht15_data *data)
{
int err;
err = gpiod_direction_output(data->data, 1);
if (err)
return err;
ndelay(SHT15_TSU);
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSCKH);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
return 0;
}
/**
* sht15_read_byte() - Read a byte back from the device
* @data: device state.
*/
static u8 sht15_read_byte(struct sht15_data *data)
{
int i;
u8 byte = 0;
for (i = 0; i < 8; ++i) {
byte <<= 1;
gpiod_set_value(data->sck, 1);
ndelay(SHT15_TSCKH);
byte |= !!gpiod_get_value(data->data);
gpiod_set_value(data->sck, 0);
ndelay(SHT15_TSCKL);
}
return byte;
}
/**
* sht15_send_status() - write the status register byte
* @data: sht15 specific data.
* @status: the byte to set the status register with.
*
* As described in figure 14 and table 5 of the datasheet.
*/
static int sht15_send_status(struct sht15_data *data, u8 status)
{
int err;
err = sht15_send_cmd(data, SHT15_WRITE_STATUS);
if (err)
return err;
err = gpiod_direction_output(data->data, 1);
if (err)
return err;
ndelay(SHT15_TSU);
sht15_send_byte(data, status);
err = sht15_wait_for_response(data);
if (err)
return err;
data->val_status = status;
return 0;
}
/**
* sht15_update_status() - get updated status register from device if too old
* @data: device instance specific data.
*
* As described in figure 15 and table 5 of the datasheet.
*/
static int sht15_update_status(struct sht15_data *data)
{
int ret = 0;
u8 status;
u8 previous_config;
u8 dev_checksum = 0;
u8 checksum_vals[2];
int timeout = HZ;
mutex_lock(&data->read_lock);
if (time_after(jiffies, data->last_status + timeout)
|| !data->status_valid) {
ret = sht15_send_cmd(data, SHT15_READ_STATUS);
if (ret)
goto unlock;
status = sht15_read_byte(data);
if (data->checksumming) {
sht15_ack(data);
dev_checksum = bitrev8(sht15_read_byte(data));
checksum_vals[0] = SHT15_READ_STATUS;
checksum_vals[1] = status;
data->checksum_ok = (sht15_crc8(data, checksum_vals, 2)
== dev_checksum);
}
ret = sht15_end_transmission(data);
if (ret)
goto unlock;
/*
* Perform checksum validation on the received data.
* Specification mentions that in case a checksum verification
* fails, a soft reset command must be sent to the device.
*/
if (data->checksumming && !data->checksum_ok) {
previous_config = data->val_status & 0x07;
ret = sht15_soft_reset(data);
if (ret)
goto unlock;
if (previous_config) {
ret = sht15_send_status(data, previous_config);
if (ret) {
dev_err(data->dev,
"CRC validation failed, unable "
"to restore device settings\n");
goto unlock;
}
}
ret = -EAGAIN;
goto unlock;
}
data->val_status = status;
data->status_valid = true;
data->last_status = jiffies;
}
unlock:
mutex_unlock(&data->read_lock);
return ret;
}
/**
* sht15_measurement() - get a new value from device
* @data: device instance specific data
* @command: command sent to request value
* @timeout_msecs: timeout after which comms are assumed
* to have failed are reset.
*/
static int sht15_measurement(struct sht15_data *data,
int command,
int timeout_msecs)
{
int ret;
u8 previous_config;
ret = sht15_send_cmd(data, command);
if (ret)
return ret;
ret = gpiod_direction_input(data->data);
if (ret)
return ret;
atomic_set(&data->interrupt_handled, 0);
enable_irq(gpiod_to_irq(data->data));
if (gpiod_get_value(data->data) == 0) {
disable_irq_nosync(gpiod_to_irq(data->data));
/* Only relevant if the interrupt hasn't occurred. */
if (!atomic_read(&data->interrupt_handled))
schedule_work(&data->read_work);
}
ret = wait_event_timeout(data->wait_queue,
(data->state == SHT15_READING_NOTHING),
msecs_to_jiffies(timeout_msecs));
if (data->state != SHT15_READING_NOTHING) { /* I/O error occurred */
data->state = SHT15_READING_NOTHING;
return -EIO;
} else if (ret == 0) { /* timeout occurred */
disable_irq_nosync(gpiod_to_irq(data->data));
ret = sht15_connection_reset(data);
if (ret)
return ret;
return -ETIME;
}
/*
* Perform checksum validation on the received data.
* Specification mentions that in case a checksum verification fails,
* a soft reset command must be sent to the device.
*/
if (data->checksumming && !data->checksum_ok) {
previous_config = data->val_status & 0x07;
ret = sht15_soft_reset(data);
if (ret)
return ret;
if (previous_config) {
ret = sht15_send_status(data, previous_config);
if (ret) {
dev_err(data->dev,
"CRC validation failed, unable "
"to restore device settings\n");
return ret;
}
}
return -EAGAIN;
}
return 0;
}
/**
* sht15_update_measurements() - get updated measures from device if too old
* @data: device state
*/
static int sht15_update_measurements(struct sht15_data *data)
{
int ret = 0;
int timeout = HZ;
mutex_lock(&data->read_lock);
if (time_after(jiffies, data->last_measurement + timeout)
|| !data->measurements_valid) {
data->state = SHT15_READING_HUMID;
ret = sht15_measurement(data, SHT15_MEASURE_RH, 160);
if (ret)
goto unlock;
data->state = SHT15_READING_TEMP;
ret = sht15_measurement(data, SHT15_MEASURE_TEMP, 400);
if (ret)
goto unlock;
data->measurements_valid = true;
data->last_measurement = jiffies;
}
unlock:
mutex_unlock(&data->read_lock);
return ret;
}
/**
* sht15_calc_temp() - convert the raw reading to a temperature
* @data: device state
*
* As per section 4.3 of the data sheet.
*/
static inline int sht15_calc_temp(struct sht15_data *data)
{
int d1 = temppoints[0].d1;
int d2 = (data->val_status & SHT15_STATUS_LOW_RESOLUTION) ? 40 : 10;
int i;
for (i = ARRAY_SIZE(temppoints) - 1; i > 0; i--)
/* Find pointer to interpolate */
if (data->supply_uv > temppoints[i - 1].vdd) {
d1 = (data->supply_uv - temppoints[i - 1].vdd)
* (temppoints[i].d1 - temppoints[i - 1].d1)
/ (temppoints[i].vdd - temppoints[i - 1].vdd)
+ temppoints[i - 1].d1;
break;
}
return data->val_temp * d2 + d1;
}
/**
* sht15_calc_humid() - using last temperature convert raw to humid
* @data: device state
*
* This is the temperature compensated version as per section 4.2 of
* the data sheet.
*
* The sensor is assumed to be V3, which is compatible with V4.
* Humidity conversion coefficients are shown in table 7 of the datasheet.
*/
static inline int sht15_calc_humid(struct sht15_data *data)
{
int rh_linear; /* milli percent */
int temp = sht15_calc_temp(data);
int c2, c3;
int t2;
const int c1 = -4;
if (data->val_status & SHT15_STATUS_LOW_RESOLUTION) {
c2 = 648000; /* x 10 ^ -6 */
c3 = -7200; /* x 10 ^ -7 */
t2 = 1280;
} else {
c2 = 40500; /* x 10 ^ -6 */
c3 = -28; /* x 10 ^ -7 */
t2 = 80;
}
rh_linear = c1 * 1000
+ c2 * data->val_humid / 1000
+ (data->val_humid * data->val_humid * c3) / 10000;
return (temp - 25000) * (10000 + t2 * data->val_humid)
/ 1000000 + rh_linear;
}
/**
* sht15_status_show() - show status information in sysfs
* @dev: device.
* @attr: device attribute.
* @buf: sysfs buffer where information is written to.
*
* Will be called on read access to temp1_fault, humidity1_fault
* and heater_enable sysfs attributes.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t sht15_status_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ret;
struct sht15_data *data = dev_get_drvdata(dev);
u8 bit = to_sensor_dev_attr(attr)->index;
ret = sht15_update_status(data);
return ret ? ret : sprintf(buf, "%d\n", !!(data->val_status & bit));
}
/**
* sht15_status_store() - change heater state via sysfs
* @dev: device.
* @attr: device attribute.
* @buf: sysfs buffer to read the new heater state from.
* @count: length of the data.
*
* Will be called on write access to heater_enable sysfs attribute.
* Returns number of bytes actually decoded, negative errno on error.
*/
static ssize_t sht15_status_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int ret;
struct sht15_data *data = dev_get_drvdata(dev);
long value;
u8 status;
if (kstrtol(buf, 10, &value))
return -EINVAL;
mutex_lock(&data->read_lock);
status = data->val_status & 0x07;
if (!!value)
status |= SHT15_STATUS_HEATER;
else
status &= ~SHT15_STATUS_HEATER;
ret = sht15_send_status(data, status);
mutex_unlock(&data->read_lock);
return ret ? ret : count;
}
/**
* sht15_temp_show() - show temperature measurement value in sysfs
* @dev: device.
* @attr: device attribute.
* @buf: sysfs buffer where measurement values are written to.
*
* Will be called on read access to temp1_input sysfs attribute.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t sht15_temp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ret;
struct sht15_data *data = dev_get_drvdata(dev);
/* Technically no need to read humidity as well */
ret = sht15_update_measurements(data);
return ret ? ret : sprintf(buf, "%d\n",
sht15_calc_temp(data));
}
/**
* sht15_humidity_show() - show humidity measurement value in sysfs
* @dev: device.
* @attr: device attribute.
* @buf: sysfs buffer where measurement values are written to.
*
* Will be called on read access to humidity1_input sysfs attribute.
* Returns number of bytes written into buffer, negative errno on error.
*/
static ssize_t sht15_humidity_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ret;
struct sht15_data *data = dev_get_drvdata(dev);
ret = sht15_update_measurements(data);
return ret ? ret : sprintf(buf, "%d\n", sht15_calc_humid(data));
}
static ssize_t name_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct platform_device *pdev = to_platform_device(dev);
return sprintf(buf, "%s\n", pdev->name);
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, sht15_temp, 0);
static SENSOR_DEVICE_ATTR_RO(humidity1_input, sht15_humidity, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_fault, sht15_status,
SHT15_STATUS_LOW_BATTERY);
static SENSOR_DEVICE_ATTR_RO(humidity1_fault, sht15_status,
SHT15_STATUS_LOW_BATTERY);
static SENSOR_DEVICE_ATTR_RW(heater_enable, sht15_status, SHT15_STATUS_HEATER);
static DEVICE_ATTR_RO(name);
static struct attribute *sht15_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_humidity1_input.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
&sensor_dev_attr_humidity1_fault.dev_attr.attr,
&sensor_dev_attr_heater_enable.dev_attr.attr,
&dev_attr_name.attr,
NULL,
};
static const struct attribute_group sht15_attr_group = {
.attrs = sht15_attrs,
};
static irqreturn_t sht15_interrupt_fired(int irq, void *d)
{
struct sht15_data *data = d;
/* First disable the interrupt */
disable_irq_nosync(irq);
atomic_inc(&data->interrupt_handled);
/* Then schedule a reading work struct */
if (data->state != SHT15_READING_NOTHING)
schedule_work(&data->read_work);
return IRQ_HANDLED;
}
static void sht15_bh_read_data(struct work_struct *work_s)
{
uint16_t val = 0;
u8 dev_checksum = 0;
u8 checksum_vals[3];
struct sht15_data *data
= container_of(work_s, struct sht15_data,
read_work);
/* Firstly, verify the line is low */
if (gpiod_get_value(data->data)) {
/*
* If not, then start the interrupt again - care here as could
* have gone low in meantime so verify it hasn't!
*/
atomic_set(&data->interrupt_handled, 0);
enable_irq(gpiod_to_irq(data->data));
/* If still not occurred or another handler was scheduled */
if (gpiod_get_value(data->data)
|| atomic_read(&data->interrupt_handled))
return;
}
/* Read the data back from the device */
val = sht15_read_byte(data);
val <<= 8;
if (sht15_ack(data))
goto wakeup;
val |= sht15_read_byte(data);
if (data->checksumming) {
/*
* Ask the device for a checksum and read it back.
* Note: the device sends the checksum byte reversed.
*/
if (sht15_ack(data))
goto wakeup;
dev_checksum = bitrev8(sht15_read_byte(data));
checksum_vals[0] = (data->state == SHT15_READING_TEMP) ?
SHT15_MEASURE_TEMP : SHT15_MEASURE_RH;
checksum_vals[1] = (u8) (val >> 8);
checksum_vals[2] = (u8) val;
data->checksum_ok
= (sht15_crc8(data, checksum_vals, 3) == dev_checksum);
}
/* Tell the device we are done */
if (sht15_end_transmission(data))
goto wakeup;
switch (data->state) {
case SHT15_READING_TEMP:
data->val_temp = val;
break;
case SHT15_READING_HUMID:
data->val_humid = val;
break;
default:
break;
}
data->state = SHT15_READING_NOTHING;
wakeup:
wake_up(&data->wait_queue);
}
static void sht15_update_voltage(struct work_struct *work_s)
{
struct sht15_data *data
= container_of(work_s, struct sht15_data,
update_supply_work);
data->supply_uv = regulator_get_voltage(data->reg);
}
/**
* sht15_invalidate_voltage() - mark supply voltage invalid when notified by reg
* @nb: associated notification structure
* @event: voltage regulator state change event code
* @ignored: function parameter - ignored here
*
* Note that as the notification code holds the regulator lock, we have
* to schedule an update of the supply voltage rather than getting it directly.
*/
static int sht15_invalidate_voltage(struct notifier_block *nb,
unsigned long event,
void *ignored)
{
struct sht15_data *data = container_of(nb, struct sht15_data, nb);
if (event == REGULATOR_EVENT_VOLTAGE_CHANGE)
data->supply_uv_valid = false;
schedule_work(&data->update_supply_work);
return NOTIFY_OK;
}
#ifdef CONFIG_OF
static const struct of_device_id sht15_dt_match[] = {
{ .compatible = "sensirion,sht15" },
{ },
};
MODULE_DEVICE_TABLE(of, sht15_dt_match);
#endif
static int sht15_probe(struct platform_device *pdev)
{
int ret;
struct sht15_data *data;
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
INIT_WORK(&data->read_work, sht15_bh_read_data);
INIT_WORK(&data->update_supply_work, sht15_update_voltage);
platform_set_drvdata(pdev, data);
mutex_init(&data->read_lock);
data->dev = &pdev->dev;
init_waitqueue_head(&data->wait_queue);
/*
* If a regulator is available,
* query what the supply voltage actually is!
*/
data->reg = devm_regulator_get_optional(data->dev, "vcc");
if (!IS_ERR(data->reg)) {
int voltage;
voltage = regulator_get_voltage(data->reg);
if (voltage)
data->supply_uv = voltage;
ret = regulator_enable(data->reg);
if (ret != 0) {
dev_err(&pdev->dev,
"failed to enable regulator: %d\n", ret);
return ret;
}
/*
* Setup a notifier block to update this if another device
* causes the voltage to change
*/
data->nb.notifier_call = &sht15_invalidate_voltage;
ret = regulator_register_notifier(data->reg, &data->nb);
if (ret) {
dev_err(&pdev->dev,
"regulator notifier request failed\n");
regulator_disable(data->reg);
return ret;
}
}
/* Try requesting the GPIOs */
data->sck = devm_gpiod_get(&pdev->dev, "clk", GPIOD_OUT_LOW);
if (IS_ERR(data->sck)) {
ret = PTR_ERR(data->sck);
dev_err(&pdev->dev, "clock line GPIO request failed\n");
goto err_release_reg;
}
data->data = devm_gpiod_get(&pdev->dev, "data", GPIOD_IN);
if (IS_ERR(data->data)) {
ret = PTR_ERR(data->data);
dev_err(&pdev->dev, "data line GPIO request failed\n");
goto err_release_reg;
}
ret = devm_request_irq(&pdev->dev, gpiod_to_irq(data->data),
sht15_interrupt_fired,
IRQF_TRIGGER_FALLING,
"sht15 data",
data);
if (ret) {
dev_err(&pdev->dev, "failed to get irq for data line\n");
goto err_release_reg;
}
disable_irq_nosync(gpiod_to_irq(data->data));
ret = sht15_connection_reset(data);
if (ret)
goto err_release_reg;
ret = sht15_soft_reset(data);
if (ret)
goto err_release_reg;
ret = sysfs_create_group(&pdev->dev.kobj, &sht15_attr_group);
if (ret) {
dev_err(&pdev->dev, "sysfs create failed\n");
goto err_release_reg;
}
data->hwmon_dev = hwmon_device_register(data->dev);
if (IS_ERR(data->hwmon_dev)) {
ret = PTR_ERR(data->hwmon_dev);
goto err_release_sysfs_group;
}
return 0;
err_release_sysfs_group:
sysfs_remove_group(&pdev->dev.kobj, &sht15_attr_group);
err_release_reg:
if (!IS_ERR(data->reg)) {
regulator_unregister_notifier(data->reg, &data->nb);
regulator_disable(data->reg);
}
return ret;
}
static int sht15_remove(struct platform_device *pdev)
{
struct sht15_data *data = platform_get_drvdata(pdev);
int ret;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &sht15_attr_group);
ret = sht15_soft_reset(data);
if (ret)
dev_err(&pdev->dev, "Failed to reset device (%pe)\n", ERR_PTR(ret));
if (!IS_ERR(data->reg)) {
regulator_unregister_notifier(data->reg, &data->nb);
regulator_disable(data->reg);
}
return 0;
}
static const struct platform_device_id sht15_device_ids[] = {
{ "sht10", sht10 },
{ "sht11", sht11 },
{ "sht15", sht15 },
{ "sht71", sht71 },
{ "sht75", sht75 },
{ }
};
MODULE_DEVICE_TABLE(platform, sht15_device_ids);
static struct platform_driver sht15_driver = {
.driver = {
.name = "sht15",
.of_match_table = of_match_ptr(sht15_dt_match),
},
.probe = sht15_probe,
.remove = sht15_remove,
.id_table = sht15_device_ids,
};
module_platform_driver(sht15_driver);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Sensirion SHT15 temperature and humidity sensor driver");
|
linux-master
|
drivers/hwmon/sht15.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for
* Maxim MAX16065/MAX16066 12-Channel/8-Channel, Flash-Configurable
* System Managers with Nonvolatile Fault Registers
* Maxim MAX16067/MAX16068 6-Channel, Flash-Configurable System Managers
* with Nonvolatile Fault Registers
* Maxim MAX16070/MAX16071 12-Channel/8-Channel, Flash-Configurable System
* Monitors with Nonvolatile Fault Registers
*
* Copyright (C) 2011 Ericsson AB.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/jiffies.h>
enum chips { max16065, max16066, max16067, max16068, max16070, max16071 };
/*
* Registers
*/
#define MAX16065_ADC(x) ((x) * 2)
#define MAX16065_CURR_SENSE 0x18
#define MAX16065_CSP_ADC 0x19
#define MAX16065_FAULT(x) (0x1b + (x))
#define MAX16065_SCALE(x) (0x43 + (x))
#define MAX16065_CURR_CONTROL 0x47
#define MAX16065_LIMIT(l, x) (0x48 + (l) + (x) * 3) /*
* l: limit
* 0: min/max
* 1: crit
* 2: lcrit
* x: ADC index
*/
#define MAX16065_SW_ENABLE 0x73
#define MAX16065_WARNING_OV (1 << 3) /* Set if secondary threshold is OV
warning */
#define MAX16065_CURR_ENABLE (1 << 0)
#define MAX16065_NUM_LIMIT 3
#define MAX16065_NUM_ADC 12 /* maximum number of ADC channels */
static const int max16065_num_adc[] = {
[max16065] = 12,
[max16066] = 8,
[max16067] = 6,
[max16068] = 6,
[max16070] = 12,
[max16071] = 8,
};
static const bool max16065_have_secondary[] = {
[max16065] = true,
[max16066] = true,
[max16067] = false,
[max16068] = false,
[max16070] = true,
[max16071] = true,
};
static const bool max16065_have_current[] = {
[max16065] = true,
[max16066] = true,
[max16067] = false,
[max16068] = false,
[max16070] = true,
[max16071] = true,
};
struct max16065_data {
enum chips type;
struct i2c_client *client;
const struct attribute_group *groups[4];
struct mutex update_lock;
bool valid;
unsigned long last_updated; /* in jiffies */
int num_adc;
bool have_current;
int curr_gain;
/* limits are in mV */
int limit[MAX16065_NUM_LIMIT][MAX16065_NUM_ADC];
int range[MAX16065_NUM_ADC + 1];/* voltage range */
int adc[MAX16065_NUM_ADC + 1]; /* adc values (raw) including csp_adc */
int curr_sense;
int fault[2];
};
static const int max16065_adc_range[] = { 5560, 2780, 1390, 0 };
static const int max16065_csp_adc_range[] = { 7000, 14000 };
/* ADC registers have 10 bit resolution. */
static inline int ADC_TO_MV(int adc, int range)
{
return (adc * range) / 1024;
}
/*
* Limit registers have 8 bit resolution and match upper 8 bits of ADC
* registers.
*/
static inline int LIMIT_TO_MV(int limit, int range)
{
return limit * range / 256;
}
static inline int MV_TO_LIMIT(int mv, int range)
{
return clamp_val(DIV_ROUND_CLOSEST(mv * 256, range), 0, 255);
}
static inline int ADC_TO_CURR(int adc, int gain)
{
return adc * 1400000 / (gain * 255);
}
/*
* max16065_read_adc()
*
* Read 16 bit value from <reg>, <reg+1>.
* Upper 8 bits are in <reg>, lower 2 bits are in bits 7:6 of <reg+1>.
*/
static int max16065_read_adc(struct i2c_client *client, int reg)
{
int rv;
rv = i2c_smbus_read_word_swapped(client, reg);
if (unlikely(rv < 0))
return rv;
return rv >> 6;
}
static struct max16065_data *max16065_update_device(struct device *dev)
{
struct max16065_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
int i;
for (i = 0; i < data->num_adc; i++)
data->adc[i]
= max16065_read_adc(client, MAX16065_ADC(i));
if (data->have_current) {
data->adc[MAX16065_NUM_ADC]
= max16065_read_adc(client, MAX16065_CSP_ADC);
data->curr_sense
= i2c_smbus_read_byte_data(client,
MAX16065_CURR_SENSE);
}
for (i = 0; i < DIV_ROUND_UP(data->num_adc, 8); i++)
data->fault[i]
= i2c_smbus_read_byte_data(client, MAX16065_FAULT(i));
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t max16065_alarm_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute_2 *attr2 = to_sensor_dev_attr_2(da);
struct max16065_data *data = max16065_update_device(dev);
int val = data->fault[attr2->nr];
if (val < 0)
return val;
val &= (1 << attr2->index);
if (val)
i2c_smbus_write_byte_data(data->client,
MAX16065_FAULT(attr2->nr), val);
return sysfs_emit(buf, "%d\n", !!val);
}
static ssize_t max16065_input_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct max16065_data *data = max16065_update_device(dev);
int adc = data->adc[attr->index];
if (unlikely(adc < 0))
return adc;
return sysfs_emit(buf, "%d\n",
ADC_TO_MV(adc, data->range[attr->index]));
}
static ssize_t max16065_current_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct max16065_data *data = max16065_update_device(dev);
if (unlikely(data->curr_sense < 0))
return data->curr_sense;
return sysfs_emit(buf, "%d\n",
ADC_TO_CURR(data->curr_sense, data->curr_gain));
}
static ssize_t max16065_limit_store(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *attr2 = to_sensor_dev_attr_2(da);
struct max16065_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
int limit;
err = kstrtoul(buf, 10, &val);
if (unlikely(err < 0))
return err;
limit = MV_TO_LIMIT(val, data->range[attr2->index]);
mutex_lock(&data->update_lock);
data->limit[attr2->nr][attr2->index]
= LIMIT_TO_MV(limit, data->range[attr2->index]);
i2c_smbus_write_byte_data(data->client,
MAX16065_LIMIT(attr2->nr, attr2->index),
limit);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t max16065_limit_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute_2 *attr2 = to_sensor_dev_attr_2(da);
struct max16065_data *data = dev_get_drvdata(dev);
return sysfs_emit(buf, "%d\n",
data->limit[attr2->nr][attr2->index]);
}
/* Construct a sensor_device_attribute structure for each register */
/* Input voltages */
static SENSOR_DEVICE_ATTR_RO(in0_input, max16065_input, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, max16065_input, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, max16065_input, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, max16065_input, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, max16065_input, 4);
static SENSOR_DEVICE_ATTR_RO(in5_input, max16065_input, 5);
static SENSOR_DEVICE_ATTR_RO(in6_input, max16065_input, 6);
static SENSOR_DEVICE_ATTR_RO(in7_input, max16065_input, 7);
static SENSOR_DEVICE_ATTR_RO(in8_input, max16065_input, 8);
static SENSOR_DEVICE_ATTR_RO(in9_input, max16065_input, 9);
static SENSOR_DEVICE_ATTR_RO(in10_input, max16065_input, 10);
static SENSOR_DEVICE_ATTR_RO(in11_input, max16065_input, 11);
static SENSOR_DEVICE_ATTR_RO(in12_input, max16065_input, 12);
/* Input voltages lcrit */
static SENSOR_DEVICE_ATTR_2_RW(in0_lcrit, max16065_limit, 2, 0);
static SENSOR_DEVICE_ATTR_2_RW(in1_lcrit, max16065_limit, 2, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_lcrit, max16065_limit, 2, 2);
static SENSOR_DEVICE_ATTR_2_RW(in3_lcrit, max16065_limit, 2, 3);
static SENSOR_DEVICE_ATTR_2_RW(in4_lcrit, max16065_limit, 2, 4);
static SENSOR_DEVICE_ATTR_2_RW(in5_lcrit, max16065_limit, 2, 5);
static SENSOR_DEVICE_ATTR_2_RW(in6_lcrit, max16065_limit, 2, 6);
static SENSOR_DEVICE_ATTR_2_RW(in7_lcrit, max16065_limit, 2, 7);
static SENSOR_DEVICE_ATTR_2_RW(in8_lcrit, max16065_limit, 2, 8);
static SENSOR_DEVICE_ATTR_2_RW(in9_lcrit, max16065_limit, 2, 9);
static SENSOR_DEVICE_ATTR_2_RW(in10_lcrit, max16065_limit, 2, 10);
static SENSOR_DEVICE_ATTR_2_RW(in11_lcrit, max16065_limit, 2, 11);
/* Input voltages crit */
static SENSOR_DEVICE_ATTR_2_RW(in0_crit, max16065_limit, 1, 0);
static SENSOR_DEVICE_ATTR_2_RW(in1_crit, max16065_limit, 1, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_crit, max16065_limit, 1, 2);
static SENSOR_DEVICE_ATTR_2_RW(in3_crit, max16065_limit, 1, 3);
static SENSOR_DEVICE_ATTR_2_RW(in4_crit, max16065_limit, 1, 4);
static SENSOR_DEVICE_ATTR_2_RW(in5_crit, max16065_limit, 1, 5);
static SENSOR_DEVICE_ATTR_2_RW(in6_crit, max16065_limit, 1, 6);
static SENSOR_DEVICE_ATTR_2_RW(in7_crit, max16065_limit, 1, 7);
static SENSOR_DEVICE_ATTR_2_RW(in8_crit, max16065_limit, 1, 8);
static SENSOR_DEVICE_ATTR_2_RW(in9_crit, max16065_limit, 1, 9);
static SENSOR_DEVICE_ATTR_2_RW(in10_crit, max16065_limit, 1, 10);
static SENSOR_DEVICE_ATTR_2_RW(in11_crit, max16065_limit, 1, 11);
/* Input voltages min */
static SENSOR_DEVICE_ATTR_2_RW(in0_min, max16065_limit, 0, 0);
static SENSOR_DEVICE_ATTR_2_RW(in1_min, max16065_limit, 0, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_min, max16065_limit, 0, 2);
static SENSOR_DEVICE_ATTR_2_RW(in3_min, max16065_limit, 0, 3);
static SENSOR_DEVICE_ATTR_2_RW(in4_min, max16065_limit, 0, 4);
static SENSOR_DEVICE_ATTR_2_RW(in5_min, max16065_limit, 0, 5);
static SENSOR_DEVICE_ATTR_2_RW(in6_min, max16065_limit, 0, 6);
static SENSOR_DEVICE_ATTR_2_RW(in7_min, max16065_limit, 0, 7);
static SENSOR_DEVICE_ATTR_2_RW(in8_min, max16065_limit, 0, 8);
static SENSOR_DEVICE_ATTR_2_RW(in9_min, max16065_limit, 0, 9);
static SENSOR_DEVICE_ATTR_2_RW(in10_min, max16065_limit, 0, 10);
static SENSOR_DEVICE_ATTR_2_RW(in11_min, max16065_limit, 0, 11);
/* Input voltages max */
static SENSOR_DEVICE_ATTR_2_RW(in0_max, max16065_limit, 0, 0);
static SENSOR_DEVICE_ATTR_2_RW(in1_max, max16065_limit, 0, 1);
static SENSOR_DEVICE_ATTR_2_RW(in2_max, max16065_limit, 0, 2);
static SENSOR_DEVICE_ATTR_2_RW(in3_max, max16065_limit, 0, 3);
static SENSOR_DEVICE_ATTR_2_RW(in4_max, max16065_limit, 0, 4);
static SENSOR_DEVICE_ATTR_2_RW(in5_max, max16065_limit, 0, 5);
static SENSOR_DEVICE_ATTR_2_RW(in6_max, max16065_limit, 0, 6);
static SENSOR_DEVICE_ATTR_2_RW(in7_max, max16065_limit, 0, 7);
static SENSOR_DEVICE_ATTR_2_RW(in8_max, max16065_limit, 0, 8);
static SENSOR_DEVICE_ATTR_2_RW(in9_max, max16065_limit, 0, 9);
static SENSOR_DEVICE_ATTR_2_RW(in10_max, max16065_limit, 0, 10);
static SENSOR_DEVICE_ATTR_2_RW(in11_max, max16065_limit, 0, 11);
/* alarms */
static SENSOR_DEVICE_ATTR_2_RO(in0_alarm, max16065_alarm, 0, 0);
static SENSOR_DEVICE_ATTR_2_RO(in1_alarm, max16065_alarm, 0, 1);
static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, max16065_alarm, 0, 2);
static SENSOR_DEVICE_ATTR_2_RO(in3_alarm, max16065_alarm, 0, 3);
static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, max16065_alarm, 0, 4);
static SENSOR_DEVICE_ATTR_2_RO(in5_alarm, max16065_alarm, 0, 5);
static SENSOR_DEVICE_ATTR_2_RO(in6_alarm, max16065_alarm, 0, 6);
static SENSOR_DEVICE_ATTR_2_RO(in7_alarm, max16065_alarm, 0, 7);
static SENSOR_DEVICE_ATTR_2_RO(in8_alarm, max16065_alarm, 1, 0);
static SENSOR_DEVICE_ATTR_2_RO(in9_alarm, max16065_alarm, 1, 1);
static SENSOR_DEVICE_ATTR_2_RO(in10_alarm, max16065_alarm, 1, 2);
static SENSOR_DEVICE_ATTR_2_RO(in11_alarm, max16065_alarm, 1, 3);
/* Current and alarm */
static SENSOR_DEVICE_ATTR_RO(curr1_input, max16065_current, 0);
static SENSOR_DEVICE_ATTR_2_RO(curr1_alarm, max16065_alarm, 1, 4);
/*
* Finally, construct an array of pointers to members of the above objects,
* as required for sysfs_create_group()
*/
static struct attribute *max16065_basic_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_lcrit.dev_attr.attr,
&sensor_dev_attr_in0_crit.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_lcrit.dev_attr.attr,
&sensor_dev_attr_in1_crit.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_lcrit.dev_attr.attr,
&sensor_dev_attr_in2_crit.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_lcrit.dev_attr.attr,
&sensor_dev_attr_in3_crit.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_lcrit.dev_attr.attr,
&sensor_dev_attr_in4_crit.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_lcrit.dev_attr.attr,
&sensor_dev_attr_in5_crit.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_lcrit.dev_attr.attr,
&sensor_dev_attr_in6_crit.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_lcrit.dev_attr.attr,
&sensor_dev_attr_in7_crit.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
&sensor_dev_attr_in8_input.dev_attr.attr,
&sensor_dev_attr_in8_lcrit.dev_attr.attr,
&sensor_dev_attr_in8_crit.dev_attr.attr,
&sensor_dev_attr_in8_alarm.dev_attr.attr,
&sensor_dev_attr_in9_input.dev_attr.attr,
&sensor_dev_attr_in9_lcrit.dev_attr.attr,
&sensor_dev_attr_in9_crit.dev_attr.attr,
&sensor_dev_attr_in9_alarm.dev_attr.attr,
&sensor_dev_attr_in10_input.dev_attr.attr,
&sensor_dev_attr_in10_lcrit.dev_attr.attr,
&sensor_dev_attr_in10_crit.dev_attr.attr,
&sensor_dev_attr_in10_alarm.dev_attr.attr,
&sensor_dev_attr_in11_input.dev_attr.attr,
&sensor_dev_attr_in11_lcrit.dev_attr.attr,
&sensor_dev_attr_in11_crit.dev_attr.attr,
&sensor_dev_attr_in11_alarm.dev_attr.attr,
NULL
};
static struct attribute *max16065_current_attributes[] = {
&sensor_dev_attr_in12_input.dev_attr.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
&sensor_dev_attr_curr1_alarm.dev_attr.attr,
NULL
};
static struct attribute *max16065_min_attributes[] = {
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in8_min.dev_attr.attr,
&sensor_dev_attr_in9_min.dev_attr.attr,
&sensor_dev_attr_in10_min.dev_attr.attr,
&sensor_dev_attr_in11_min.dev_attr.attr,
NULL
};
static struct attribute *max16065_max_attributes[] = {
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in8_max.dev_attr.attr,
&sensor_dev_attr_in9_max.dev_attr.attr,
&sensor_dev_attr_in10_max.dev_attr.attr,
&sensor_dev_attr_in11_max.dev_attr.attr,
NULL
};
static umode_t max16065_basic_is_visible(struct kobject *kobj,
struct attribute *a, int n)
{
struct device *dev = kobj_to_dev(kobj);
struct max16065_data *data = dev_get_drvdata(dev);
int index = n / 4;
if (index >= data->num_adc || !data->range[index])
return 0;
return a->mode;
}
static umode_t max16065_secondary_is_visible(struct kobject *kobj,
struct attribute *a, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct max16065_data *data = dev_get_drvdata(dev);
if (index >= data->num_adc)
return 0;
return a->mode;
}
static const struct attribute_group max16065_basic_group = {
.attrs = max16065_basic_attributes,
.is_visible = max16065_basic_is_visible,
};
static const struct attribute_group max16065_current_group = {
.attrs = max16065_current_attributes,
};
static const struct attribute_group max16065_min_group = {
.attrs = max16065_min_attributes,
.is_visible = max16065_secondary_is_visible,
};
static const struct attribute_group max16065_max_group = {
.attrs = max16065_max_attributes,
.is_visible = max16065_secondary_is_visible,
};
static const struct i2c_device_id max16065_id[];
static int max16065_probe(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
struct max16065_data *data;
struct device *dev = &client->dev;
struct device *hwmon_dev;
int i, j, val;
bool have_secondary; /* true if chip has secondary limits */
bool secondary_is_max = false; /* secondary limits reflect max */
int groups = 0;
const struct i2c_device_id *id = i2c_match_id(max16065_id, client);
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_READ_WORD_DATA))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (unlikely(!data))
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
data->num_adc = max16065_num_adc[id->driver_data];
data->have_current = max16065_have_current[id->driver_data];
have_secondary = max16065_have_secondary[id->driver_data];
if (have_secondary) {
val = i2c_smbus_read_byte_data(client, MAX16065_SW_ENABLE);
if (unlikely(val < 0))
return val;
secondary_is_max = val & MAX16065_WARNING_OV;
}
/* Read scale registers, convert to range */
for (i = 0; i < DIV_ROUND_UP(data->num_adc, 4); i++) {
val = i2c_smbus_read_byte_data(client, MAX16065_SCALE(i));
if (unlikely(val < 0))
return val;
for (j = 0; j < 4 && i * 4 + j < data->num_adc; j++) {
data->range[i * 4 + j] =
max16065_adc_range[(val >> (j * 2)) & 0x3];
}
}
/* Read limits */
for (i = 0; i < MAX16065_NUM_LIMIT; i++) {
if (i == 0 && !have_secondary)
continue;
for (j = 0; j < data->num_adc; j++) {
val = i2c_smbus_read_byte_data(client,
MAX16065_LIMIT(i, j));
if (unlikely(val < 0))
return val;
data->limit[i][j] = LIMIT_TO_MV(val, data->range[j]);
}
}
/* sysfs hooks */
data->groups[groups++] = &max16065_basic_group;
if (have_secondary)
data->groups[groups++] = secondary_is_max ?
&max16065_max_group : &max16065_min_group;
if (data->have_current) {
val = i2c_smbus_read_byte_data(client, MAX16065_CURR_CONTROL);
if (unlikely(val < 0))
return val;
if (val & MAX16065_CURR_ENABLE) {
/*
* Current gain is 6, 12, 24, 48 based on values in
* bit 2,3.
*/
data->curr_gain = 6 << ((val >> 2) & 0x03);
data->range[MAX16065_NUM_ADC]
= max16065_csp_adc_range[(val >> 1) & 0x01];
data->groups[groups++] = &max16065_current_group;
} else {
data->have_current = false;
}
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max16065_id[] = {
{ "max16065", max16065 },
{ "max16066", max16066 },
{ "max16067", max16067 },
{ "max16068", max16068 },
{ "max16070", max16070 },
{ "max16071", max16071 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max16065_id);
/* This is the driver that will be inserted */
static struct i2c_driver max16065_driver = {
.driver = {
.name = "max16065",
},
.probe = max16065_probe,
.id_table = max16065_id,
};
module_i2c_driver(max16065_driver);
MODULE_AUTHOR("Guenter Roeck <[email protected]>");
MODULE_DESCRIPTION("MAX16065 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max16065.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* max1619.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2003-2004 Oleksij Rempel <[email protected]>
* Jean Delvare <[email protected]>
*
* Based on the lm90 driver. The MAX1619 is a sensor chip made by Maxim.
* It reports up to two temperatures (its own plus up to
* one external one). Complete datasheet can be
* obtained from Maxim's website at:
* http://pdfserv.maxim-ic.com/en/ds/MAX1619.pdf
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
static const unsigned short normal_i2c[] = {
0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
/*
* The MAX1619 registers
*/
#define MAX1619_REG_R_MAN_ID 0xFE
#define MAX1619_REG_R_CHIP_ID 0xFF
#define MAX1619_REG_R_CONFIG 0x03
#define MAX1619_REG_W_CONFIG 0x09
#define MAX1619_REG_R_CONVRATE 0x04
#define MAX1619_REG_W_CONVRATE 0x0A
#define MAX1619_REG_R_STATUS 0x02
#define MAX1619_REG_R_LOCAL_TEMP 0x00
#define MAX1619_REG_R_REMOTE_TEMP 0x01
#define MAX1619_REG_R_REMOTE_HIGH 0x07
#define MAX1619_REG_W_REMOTE_HIGH 0x0D
#define MAX1619_REG_R_REMOTE_LOW 0x08
#define MAX1619_REG_W_REMOTE_LOW 0x0E
#define MAX1619_REG_R_REMOTE_CRIT 0x10
#define MAX1619_REG_W_REMOTE_CRIT 0x12
#define MAX1619_REG_R_TCRIT_HYST 0x11
#define MAX1619_REG_W_TCRIT_HYST 0x13
/*
* Conversions
*/
static int temp_from_reg(int val)
{
return (val & 0x80 ? val-0x100 : val) * 1000;
}
static int temp_to_reg(int val)
{
return (val < 0 ? val+0x100*1000 : val) / 1000;
}
enum temp_index {
t_input1 = 0,
t_input2,
t_low2,
t_high2,
t_crit2,
t_hyst2,
t_num_regs
};
/*
* Client data (each client gets its own)
*/
struct max1619_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* registers values */
u8 temp[t_num_regs]; /* index with enum temp_index */
u8 alarms;
};
static const u8 regs_read[t_num_regs] = {
[t_input1] = MAX1619_REG_R_LOCAL_TEMP,
[t_input2] = MAX1619_REG_R_REMOTE_TEMP,
[t_low2] = MAX1619_REG_R_REMOTE_LOW,
[t_high2] = MAX1619_REG_R_REMOTE_HIGH,
[t_crit2] = MAX1619_REG_R_REMOTE_CRIT,
[t_hyst2] = MAX1619_REG_R_TCRIT_HYST,
};
static const u8 regs_write[t_num_regs] = {
[t_low2] = MAX1619_REG_W_REMOTE_LOW,
[t_high2] = MAX1619_REG_W_REMOTE_HIGH,
[t_crit2] = MAX1619_REG_W_REMOTE_CRIT,
[t_hyst2] = MAX1619_REG_W_TCRIT_HYST,
};
static struct max1619_data *max1619_update_device(struct device *dev)
{
struct max1619_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int config, i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ * 2) || !data->valid) {
dev_dbg(&client->dev, "Updating max1619 data.\n");
for (i = 0; i < t_num_regs; i++)
data->temp[i] = i2c_smbus_read_byte_data(client,
regs_read[i]);
data->alarms = i2c_smbus_read_byte_data(client,
MAX1619_REG_R_STATUS);
/* If OVERT polarity is low, reverse alarm bit */
config = i2c_smbus_read_byte_data(client, MAX1619_REG_R_CONFIG);
if (!(config & 0x20))
data->alarms ^= 0x02;
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs stuff
*/
static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct max1619_data *data = max1619_update_device(dev);
return sprintf(buf, "%d\n", temp_from_reg(data->temp[attr->index]));
}
static ssize_t temp_store(struct device *dev,
struct device_attribute *devattr, const char *buf,
size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct max1619_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp[attr->index] = temp_to_reg(val);
i2c_smbus_write_byte_data(client, regs_write[attr->index],
data->temp[attr->index]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct max1619_data *data = max1619_update_device(dev);
return sprintf(buf, "%d\n", data->alarms);
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct max1619_data *data = max1619_update_device(dev);
return sprintf(buf, "%d\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, t_input1);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, t_input2);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp, t_low2);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp, t_high2);
static SENSOR_DEVICE_ATTR_RW(temp2_crit, temp, t_crit2);
static SENSOR_DEVICE_ATTR_RW(temp2_crit_hyst, temp, t_hyst2);
static DEVICE_ATTR_RO(alarms);
static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(temp2_min_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, alarm, 4);
static struct attribute *max1619_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
&dev_attr_alarms.attr,
&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(max1619);
/* Return 0 if detection is successful, -ENODEV otherwise */
static int max1619_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
u8 reg_config, reg_convrate, reg_status, man_id, chip_id;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* detection */
reg_config = i2c_smbus_read_byte_data(client, MAX1619_REG_R_CONFIG);
reg_convrate = i2c_smbus_read_byte_data(client, MAX1619_REG_R_CONVRATE);
reg_status = i2c_smbus_read_byte_data(client, MAX1619_REG_R_STATUS);
if ((reg_config & 0x03) != 0x00
|| reg_convrate > 0x07 || (reg_status & 0x61) != 0x00) {
dev_dbg(&adapter->dev, "MAX1619 detection failed at 0x%02x\n",
client->addr);
return -ENODEV;
}
/* identification */
man_id = i2c_smbus_read_byte_data(client, MAX1619_REG_R_MAN_ID);
chip_id = i2c_smbus_read_byte_data(client, MAX1619_REG_R_CHIP_ID);
if (man_id != 0x4D || chip_id != 0x04) {
dev_info(&adapter->dev,
"Unsupported chip (man_id=0x%02X, chip_id=0x%02X).\n",
man_id, chip_id);
return -ENODEV;
}
strscpy(info->type, "max1619", I2C_NAME_SIZE);
return 0;
}
static void max1619_init_client(struct i2c_client *client)
{
u8 config;
/*
* Start the conversions.
*/
i2c_smbus_write_byte_data(client, MAX1619_REG_W_CONVRATE,
5); /* 2 Hz */
config = i2c_smbus_read_byte_data(client, MAX1619_REG_R_CONFIG);
if (config & 0x40)
i2c_smbus_write_byte_data(client, MAX1619_REG_W_CONFIG,
config & 0xBF); /* run */
}
static int max1619_probe(struct i2c_client *new_client)
{
struct max1619_data *data;
struct device *hwmon_dev;
data = devm_kzalloc(&new_client->dev, sizeof(struct max1619_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = new_client;
mutex_init(&data->update_lock);
/* Initialize the MAX1619 chip */
max1619_init_client(new_client);
hwmon_dev = devm_hwmon_device_register_with_groups(&new_client->dev,
new_client->name,
data,
max1619_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max1619_id[] = {
{ "max1619", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max1619_id);
#ifdef CONFIG_OF
static const struct of_device_id max1619_of_match[] = {
{ .compatible = "maxim,max1619", },
{},
};
MODULE_DEVICE_TABLE(of, max1619_of_match);
#endif
static struct i2c_driver max1619_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "max1619",
.of_match_table = of_match_ptr(max1619_of_match),
},
.probe = max1619_probe,
.id_table = max1619_id,
.detect = max1619_detect,
.address_list = normal_i2c,
};
module_i2c_driver(max1619_driver);
MODULE_AUTHOR("Oleksij Rempel <[email protected]>, Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("MAX1619 sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max1619.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* lm63.c - driver for the National Semiconductor LM63 temperature sensor
* with integrated fan control
* Copyright (C) 2004-2008 Jean Delvare <[email protected]>
* Based on the lm90 driver.
*
* The LM63 is a sensor chip made by National Semiconductor. It measures
* two temperatures (its own and one external one) and the speed of one
* fan, those speed it can additionally control. Complete datasheet can be
* obtained from National's website at:
* http://www.national.com/pf/LM/LM63.html
*
* The LM63 is basically an LM86 with fan speed monitoring and control
* capabilities added. It misses some of the LM86 features though:
* - No low limit for local temperature.
* - No critical limit for local temperature.
* - Critical limit for remote temperature can be changed only once. We
* will consider that the critical limit is read-only.
*
* The datasheet isn't very clear about what the tachometer reading is.
* I had a explanation from National Semiconductor though. The two lower
* bits of the read value have to be masked out. The value is still 16 bit
* in width.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/sysfs.h>
#include <linux/types.h>
/*
* Addresses to scan
* Address is fully defined internally and cannot be changed except for
* LM64 which has one pin dedicated to address selection.
* LM63 and LM96163 have address 0x4c.
* LM64 can have address 0x18 or 0x4e.
*/
static const unsigned short normal_i2c[] = { 0x18, 0x4c, 0x4e, I2C_CLIENT_END };
/*
* The LM63 registers
*/
#define LM63_REG_CONFIG1 0x03
#define LM63_REG_CONVRATE 0x04
#define LM63_REG_CONFIG2 0xBF
#define LM63_REG_CONFIG_FAN 0x4A
#define LM63_REG_TACH_COUNT_MSB 0x47
#define LM63_REG_TACH_COUNT_LSB 0x46
#define LM63_REG_TACH_LIMIT_MSB 0x49
#define LM63_REG_TACH_LIMIT_LSB 0x48
#define LM63_REG_PWM_VALUE 0x4C
#define LM63_REG_PWM_FREQ 0x4D
#define LM63_REG_LUT_TEMP_HYST 0x4F
#define LM63_REG_LUT_TEMP(nr) (0x50 + 2 * (nr))
#define LM63_REG_LUT_PWM(nr) (0x51 + 2 * (nr))
#define LM63_REG_LOCAL_TEMP 0x00
#define LM63_REG_LOCAL_HIGH 0x05
#define LM63_REG_REMOTE_TEMP_MSB 0x01
#define LM63_REG_REMOTE_TEMP_LSB 0x10
#define LM63_REG_REMOTE_OFFSET_MSB 0x11
#define LM63_REG_REMOTE_OFFSET_LSB 0x12
#define LM63_REG_REMOTE_HIGH_MSB 0x07
#define LM63_REG_REMOTE_HIGH_LSB 0x13
#define LM63_REG_REMOTE_LOW_MSB 0x08
#define LM63_REG_REMOTE_LOW_LSB 0x14
#define LM63_REG_REMOTE_TCRIT 0x19
#define LM63_REG_REMOTE_TCRIT_HYST 0x21
#define LM63_REG_ALERT_STATUS 0x02
#define LM63_REG_ALERT_MASK 0x16
#define LM63_REG_MAN_ID 0xFE
#define LM63_REG_CHIP_ID 0xFF
#define LM96163_REG_TRUTHERM 0x30
#define LM96163_REG_REMOTE_TEMP_U_MSB 0x31
#define LM96163_REG_REMOTE_TEMP_U_LSB 0x32
#define LM96163_REG_CONFIG_ENHANCED 0x45
#define LM63_MAX_CONVRATE 9
#define LM63_MAX_CONVRATE_HZ 32
#define LM96163_MAX_CONVRATE_HZ 26
/*
* Conversions and various macros
* For tachometer counts, the LM63 uses 16-bit values.
* For local temperature and high limit, remote critical limit and hysteresis
* value, it uses signed 8-bit values with LSB = 1 degree Celsius.
* For remote temperature, low and high limits, it uses signed 11-bit values
* with LSB = 0.125 degree Celsius, left-justified in 16-bit registers.
* For LM64 the actual remote diode temperature is 16 degree Celsius higher
* than the register reading. Remote temperature setpoints have to be
* adapted accordingly.
*/
#define FAN_FROM_REG(reg) ((reg) == 0xFFFC || (reg) == 0 ? 0 : \
5400000 / (reg))
#define FAN_TO_REG(val) ((val) <= 82 ? 0xFFFC : \
(5400000 / (val)) & 0xFFFC)
#define TEMP8_FROM_REG(reg) ((reg) * 1000)
#define TEMP8_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), -128000, \
127000), 1000)
#define TEMP8U_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, \
255000), 1000)
#define TEMP11_FROM_REG(reg) ((reg) / 32 * 125)
#define TEMP11_TO_REG(val) (DIV_ROUND_CLOSEST(clamp_val((val), -128000, \
127875), 125) * 32)
#define TEMP11U_TO_REG(val) (DIV_ROUND_CLOSEST(clamp_val((val), 0, \
255875), 125) * 32)
#define HYST_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, 127000), \
1000)
#define UPDATE_INTERVAL(max, rate) \
((1000 << (LM63_MAX_CONVRATE - (rate))) / (max))
enum chips { lm63, lm64, lm96163 };
/*
* Client data (each client gets its own)
*/
struct lm63_data {
struct i2c_client *client;
struct mutex update_lock;
const struct attribute_group *groups[5];
bool valid; /* false until following fields are valid */
char lut_valid; /* zero until lut fields are valid */
unsigned long last_updated; /* in jiffies */
unsigned long lut_last_updated; /* in jiffies */
enum chips kind;
int temp2_offset;
int update_interval; /* in milliseconds */
int max_convrate_hz;
int lut_size; /* 8 or 12 */
/* registers values */
u8 config, config_fan;
u16 fan[2]; /* 0: input
1: low limit */
u8 pwm1_freq;
u8 pwm1[13]; /* 0: current output
1-12: lookup table */
s8 temp8[15]; /* 0: local input
1: local high limit
2: remote critical limit
3-14: lookup table */
s16 temp11[4]; /* 0: remote input
1: remote low limit
2: remote high limit
3: remote offset */
u16 temp11u; /* remote input (unsigned) */
u8 temp2_crit_hyst;
u8 lut_temp_hyst;
u8 alarms;
bool pwm_highres;
bool lut_temp_highres;
bool remote_unsigned; /* true if unsigned remote upper limits */
bool trutherm;
};
static inline int temp8_from_reg(struct lm63_data *data, int nr)
{
if (data->remote_unsigned)
return TEMP8_FROM_REG((u8)data->temp8[nr]);
return TEMP8_FROM_REG(data->temp8[nr]);
}
static inline int lut_temp_from_reg(struct lm63_data *data, int nr)
{
return data->temp8[nr] * (data->lut_temp_highres ? 500 : 1000);
}
static inline int lut_temp_to_reg(struct lm63_data *data, long val)
{
val -= data->temp2_offset;
if (data->lut_temp_highres)
return DIV_ROUND_CLOSEST(clamp_val(val, 0, 127500), 500);
else
return DIV_ROUND_CLOSEST(clamp_val(val, 0, 127000), 1000);
}
/*
* Update the lookup table register cache.
* client->update_lock must be held when calling this function.
*/
static void lm63_update_lut(struct lm63_data *data)
{
struct i2c_client *client = data->client;
int i;
if (time_after(jiffies, data->lut_last_updated + 5 * HZ) ||
!data->lut_valid) {
for (i = 0; i < data->lut_size; i++) {
data->pwm1[1 + i] = i2c_smbus_read_byte_data(client,
LM63_REG_LUT_PWM(i));
data->temp8[3 + i] = i2c_smbus_read_byte_data(client,
LM63_REG_LUT_TEMP(i));
}
data->lut_temp_hyst = i2c_smbus_read_byte_data(client,
LM63_REG_LUT_TEMP_HYST);
data->lut_last_updated = jiffies;
data->lut_valid = 1;
}
}
static struct lm63_data *lm63_update_device(struct device *dev)
{
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long next_update;
mutex_lock(&data->update_lock);
next_update = data->last_updated +
msecs_to_jiffies(data->update_interval);
if (time_after(jiffies, next_update) || !data->valid) {
if (data->config & 0x04) { /* tachometer enabled */
/* order matters for fan1_input */
data->fan[0] = i2c_smbus_read_byte_data(client,
LM63_REG_TACH_COUNT_LSB) & 0xFC;
data->fan[0] |= i2c_smbus_read_byte_data(client,
LM63_REG_TACH_COUNT_MSB) << 8;
data->fan[1] = (i2c_smbus_read_byte_data(client,
LM63_REG_TACH_LIMIT_LSB) & 0xFC)
| (i2c_smbus_read_byte_data(client,
LM63_REG_TACH_LIMIT_MSB) << 8);
}
data->pwm1_freq = i2c_smbus_read_byte_data(client,
LM63_REG_PWM_FREQ);
if (data->pwm1_freq == 0)
data->pwm1_freq = 1;
data->pwm1[0] = i2c_smbus_read_byte_data(client,
LM63_REG_PWM_VALUE);
data->temp8[0] = i2c_smbus_read_byte_data(client,
LM63_REG_LOCAL_TEMP);
data->temp8[1] = i2c_smbus_read_byte_data(client,
LM63_REG_LOCAL_HIGH);
/* order matters for temp2_input */
data->temp11[0] = i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_TEMP_MSB) << 8;
data->temp11[0] |= i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_TEMP_LSB);
data->temp11[1] = (i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_LOW_MSB) << 8)
| i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_LOW_LSB);
data->temp11[2] = (i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_HIGH_MSB) << 8)
| i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_HIGH_LSB);
data->temp11[3] = (i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_OFFSET_MSB) << 8)
| i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_OFFSET_LSB);
if (data->kind == lm96163)
data->temp11u = (i2c_smbus_read_byte_data(client,
LM96163_REG_REMOTE_TEMP_U_MSB) << 8)
| i2c_smbus_read_byte_data(client,
LM96163_REG_REMOTE_TEMP_U_LSB);
data->temp8[2] = i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_TCRIT);
data->temp2_crit_hyst = i2c_smbus_read_byte_data(client,
LM63_REG_REMOTE_TCRIT_HYST);
data->alarms = i2c_smbus_read_byte_data(client,
LM63_REG_ALERT_STATUS) & 0x7F;
data->last_updated = jiffies;
data->valid = true;
}
lm63_update_lut(data);
mutex_unlock(&data->update_lock);
return data;
}
/*
* Trip points in the lookup table should be in ascending order for both
* temperatures and PWM output values.
*/
static int lm63_lut_looks_bad(struct device *dev, struct lm63_data *data)
{
int i;
mutex_lock(&data->update_lock);
lm63_update_lut(data);
for (i = 1; i < data->lut_size; i++) {
if (data->pwm1[1 + i - 1] > data->pwm1[1 + i]
|| data->temp8[3 + i - 1] > data->temp8[3 + i]) {
dev_warn(dev,
"Lookup table doesn't look sane (check entries %d and %d)\n",
i, i + 1);
break;
}
}
mutex_unlock(&data->update_lock);
return i == data->lut_size ? 0 : 1;
}
/*
* Sysfs callback functions and files
*/
static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[attr->index]));
}
static ssize_t set_fan(struct device *dev, struct device_attribute *dummy,
const char *buf, size_t count)
{
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan[1] = FAN_TO_REG(val);
i2c_smbus_write_byte_data(client, LM63_REG_TACH_LIMIT_LSB,
data->fan[1] & 0xFF);
i2c_smbus_write_byte_data(client, LM63_REG_TACH_LIMIT_MSB,
data->fan[1] >> 8);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_pwm1(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
int nr = attr->index;
int pwm;
if (data->pwm_highres)
pwm = data->pwm1[nr];
else
pwm = data->pwm1[nr] >= 2 * data->pwm1_freq ?
255 : (data->pwm1[nr] * 255 + data->pwm1_freq) /
(2 * data->pwm1_freq);
return sprintf(buf, "%d\n", pwm);
}
static ssize_t set_pwm1(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int nr = attr->index;
unsigned long val;
int err;
u8 reg;
if (!(data->config_fan & 0x20)) /* register is read-only */
return -EPERM;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
reg = nr ? LM63_REG_LUT_PWM(nr - 1) : LM63_REG_PWM_VALUE;
val = clamp_val(val, 0, 255);
mutex_lock(&data->update_lock);
data->pwm1[nr] = data->pwm_highres ? val :
(val * data->pwm1_freq * 2 + 127) / 255;
i2c_smbus_write_byte_data(client, reg, data->pwm1[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t pwm1_enable_show(struct device *dev,
struct device_attribute *dummy, char *buf)
{
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%d\n", data->config_fan & 0x20 ? 1 : 2);
}
static ssize_t pwm1_enable_store(struct device *dev,
struct device_attribute *dummy,
const char *buf, size_t count)
{
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
if (val < 1 || val > 2)
return -EINVAL;
/*
* Only let the user switch to automatic mode if the lookup table
* looks sane.
*/
if (val == 2 && lm63_lut_looks_bad(dev, data))
return -EPERM;
mutex_lock(&data->update_lock);
data->config_fan = i2c_smbus_read_byte_data(client,
LM63_REG_CONFIG_FAN);
if (val == 1)
data->config_fan |= 0x20;
else
data->config_fan &= ~0x20;
i2c_smbus_write_byte_data(client, LM63_REG_CONFIG_FAN,
data->config_fan);
mutex_unlock(&data->update_lock);
return count;
}
/*
* There are 8bit registers for both local(temp1) and remote(temp2) sensor.
* For remote sensor registers temp2_offset has to be considered,
* for local sensor it must not.
* So we need separate 8bit accessors for local and remote sensor.
*/
static ssize_t show_local_temp8(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%d\n", TEMP8_FROM_REG(data->temp8[attr->index]));
}
static ssize_t show_remote_temp8(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%d\n", temp8_from_reg(data, attr->index)
+ data->temp2_offset);
}
static ssize_t show_lut_temp(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%d\n", lut_temp_from_reg(data, attr->index)
+ data->temp2_offset);
}
static ssize_t set_temp8(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int nr = attr->index;
long val;
int err;
int temp;
u8 reg;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
switch (nr) {
case 2:
reg = LM63_REG_REMOTE_TCRIT;
if (data->remote_unsigned)
temp = TEMP8U_TO_REG(val - data->temp2_offset);
else
temp = TEMP8_TO_REG(val - data->temp2_offset);
break;
case 1:
reg = LM63_REG_LOCAL_HIGH;
temp = TEMP8_TO_REG(val);
break;
default: /* lookup table */
reg = LM63_REG_LUT_TEMP(nr - 3);
temp = lut_temp_to_reg(data, val);
}
data->temp8[nr] = temp;
i2c_smbus_write_byte_data(client, reg, temp);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_temp11(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
int nr = attr->index;
int temp;
if (!nr) {
/*
* Use unsigned temperature unless its value is zero.
* If it is zero, use signed temperature.
*/
if (data->temp11u)
temp = TEMP11_FROM_REG(data->temp11u);
else
temp = TEMP11_FROM_REG(data->temp11[nr]);
} else {
if (data->remote_unsigned && nr == 2)
temp = TEMP11_FROM_REG((u16)data->temp11[nr]);
else
temp = TEMP11_FROM_REG(data->temp11[nr]);
}
return sprintf(buf, "%d\n", temp + data->temp2_offset);
}
static ssize_t set_temp11(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
static const u8 reg[6] = {
LM63_REG_REMOTE_LOW_MSB,
LM63_REG_REMOTE_LOW_LSB,
LM63_REG_REMOTE_HIGH_MSB,
LM63_REG_REMOTE_HIGH_LSB,
LM63_REG_REMOTE_OFFSET_MSB,
LM63_REG_REMOTE_OFFSET_LSB,
};
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
int nr = attr->index;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
if (data->remote_unsigned && nr == 2)
data->temp11[nr] = TEMP11U_TO_REG(val - data->temp2_offset);
else
data->temp11[nr] = TEMP11_TO_REG(val - data->temp2_offset);
i2c_smbus_write_byte_data(client, reg[(nr - 1) * 2],
data->temp11[nr] >> 8);
i2c_smbus_write_byte_data(client, reg[(nr - 1) * 2 + 1],
data->temp11[nr] & 0xff);
mutex_unlock(&data->update_lock);
return count;
}
/*
* Hysteresis register holds a relative value, while we want to present
* an absolute to user-space
*/
static ssize_t temp2_crit_hyst_show(struct device *dev,
struct device_attribute *dummy, char *buf)
{
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%d\n", temp8_from_reg(data, 2)
+ data->temp2_offset
- TEMP8_FROM_REG(data->temp2_crit_hyst));
}
static ssize_t show_lut_temp_hyst(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%d\n", lut_temp_from_reg(data, attr->index)
+ data->temp2_offset
- TEMP8_FROM_REG(data->lut_temp_hyst));
}
/*
* And now the other way around, user-space provides an absolute
* hysteresis value and we have to store a relative one
*/
static ssize_t temp2_crit_hyst_store(struct device *dev,
struct device_attribute *dummy,
const char *buf, size_t count)
{
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
long hyst;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
hyst = temp8_from_reg(data, 2) + data->temp2_offset - val;
i2c_smbus_write_byte_data(client, LM63_REG_REMOTE_TCRIT_HYST,
HYST_TO_REG(hyst));
mutex_unlock(&data->update_lock);
return count;
}
/*
* Set conversion rate.
* client->update_lock must be held when calling this function.
*/
static void lm63_set_convrate(struct lm63_data *data, unsigned int interval)
{
struct i2c_client *client = data->client;
unsigned int update_interval;
int i;
/* Shift calculations to avoid rounding errors */
interval <<= 6;
/* find the nearest update rate */
update_interval = (1 << (LM63_MAX_CONVRATE + 6)) * 1000
/ data->max_convrate_hz;
for (i = 0; i < LM63_MAX_CONVRATE; i++, update_interval >>= 1)
if (interval >= update_interval * 3 / 4)
break;
i2c_smbus_write_byte_data(client, LM63_REG_CONVRATE, i);
data->update_interval = UPDATE_INTERVAL(data->max_convrate_hz, i);
}
static ssize_t update_interval_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm63_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%u\n", data->update_interval);
}
static ssize_t update_interval_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm63_data *data = dev_get_drvdata(dev);
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
lm63_set_convrate(data, clamp_val(val, 0, 100000));
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp2_type_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct lm63_data *data = dev_get_drvdata(dev);
return sprintf(buf, data->trutherm ? "1\n" : "2\n");
}
static ssize_t temp2_type_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct lm63_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned long val;
int ret;
u8 reg;
ret = kstrtoul(buf, 10, &val);
if (ret < 0)
return ret;
if (val != 1 && val != 2)
return -EINVAL;
mutex_lock(&data->update_lock);
data->trutherm = val == 1;
reg = i2c_smbus_read_byte_data(client, LM96163_REG_TRUTHERM) & ~0x02;
i2c_smbus_write_byte_data(client, LM96163_REG_TRUTHERM,
reg | (data->trutherm ? 0x02 : 0x00));
data->valid = false;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t alarms_show(struct device *dev, struct device_attribute *dummy,
char *buf)
{
struct lm63_data *data = lm63_update_device(dev);
return sprintf(buf, "%u\n", data->alarms);
}
static ssize_t show_alarm(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct lm63_data *data = lm63_update_device(dev);
int bitnr = attr->index;
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
static SENSOR_DEVICE_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan,
set_fan, 1);
static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm1, set_pwm1, 0);
static DEVICE_ATTR_RW(pwm1_enable);
static SENSOR_DEVICE_ATTR(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 1);
static SENSOR_DEVICE_ATTR(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 3);
static SENSOR_DEVICE_ATTR(pwm1_auto_point1_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 3);
static SENSOR_DEVICE_ATTR(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 2);
static SENSOR_DEVICE_ATTR(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 4);
static SENSOR_DEVICE_ATTR(pwm1_auto_point2_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 4);
static SENSOR_DEVICE_ATTR(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 3);
static SENSOR_DEVICE_ATTR(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 5);
static SENSOR_DEVICE_ATTR(pwm1_auto_point3_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 5);
static SENSOR_DEVICE_ATTR(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 4);
static SENSOR_DEVICE_ATTR(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 6);
static SENSOR_DEVICE_ATTR(pwm1_auto_point4_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 6);
static SENSOR_DEVICE_ATTR(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 5);
static SENSOR_DEVICE_ATTR(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 7);
static SENSOR_DEVICE_ATTR(pwm1_auto_point5_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 7);
static SENSOR_DEVICE_ATTR(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 6);
static SENSOR_DEVICE_ATTR(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 8);
static SENSOR_DEVICE_ATTR(pwm1_auto_point6_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 8);
static SENSOR_DEVICE_ATTR(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 7);
static SENSOR_DEVICE_ATTR(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 9);
static SENSOR_DEVICE_ATTR(pwm1_auto_point7_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 9);
static SENSOR_DEVICE_ATTR(pwm1_auto_point8_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 8);
static SENSOR_DEVICE_ATTR(pwm1_auto_point8_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 10);
static SENSOR_DEVICE_ATTR(pwm1_auto_point8_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 10);
static SENSOR_DEVICE_ATTR(pwm1_auto_point9_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 9);
static SENSOR_DEVICE_ATTR(pwm1_auto_point9_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 11);
static SENSOR_DEVICE_ATTR(pwm1_auto_point9_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 11);
static SENSOR_DEVICE_ATTR(pwm1_auto_point10_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 10);
static SENSOR_DEVICE_ATTR(pwm1_auto_point10_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 12);
static SENSOR_DEVICE_ATTR(pwm1_auto_point10_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 12);
static SENSOR_DEVICE_ATTR(pwm1_auto_point11_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 11);
static SENSOR_DEVICE_ATTR(pwm1_auto_point11_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 13);
static SENSOR_DEVICE_ATTR(pwm1_auto_point11_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 13);
static SENSOR_DEVICE_ATTR(pwm1_auto_point12_pwm, S_IWUSR | S_IRUGO,
show_pwm1, set_pwm1, 12);
static SENSOR_DEVICE_ATTR(pwm1_auto_point12_temp, S_IWUSR | S_IRUGO,
show_lut_temp, set_temp8, 14);
static SENSOR_DEVICE_ATTR(pwm1_auto_point12_temp_hyst, S_IRUGO,
show_lut_temp_hyst, NULL, 14);
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_local_temp8, NULL, 0);
static SENSOR_DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO, show_local_temp8,
set_temp8, 1);
static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp11, NULL, 0);
static SENSOR_DEVICE_ATTR(temp2_min, S_IWUSR | S_IRUGO, show_temp11,
set_temp11, 1);
static SENSOR_DEVICE_ATTR(temp2_max, S_IWUSR | S_IRUGO, show_temp11,
set_temp11, 2);
static SENSOR_DEVICE_ATTR(temp2_offset, S_IWUSR | S_IRUGO, show_temp11,
set_temp11, 3);
static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO, show_remote_temp8,
set_temp8, 2);
static DEVICE_ATTR_RW(temp2_crit_hyst);
static DEVICE_ATTR_RW(temp2_type);
/* Individual alarm files */
static SENSOR_DEVICE_ATTR(fan1_min_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO, show_alarm, NULL, 1);
static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 4);
static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 6);
/* Raw alarm file for compatibility */
static DEVICE_ATTR_RO(alarms);
static DEVICE_ATTR_RW(update_interval);
static struct attribute *lm63_attributes[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&dev_attr_pwm1_enable.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point5_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point5_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point5_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point6_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point6_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point6_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point7_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point7_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point7_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point8_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point8_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point8_temp_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&dev_attr_temp2_crit_hyst.attr,
&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_update_interval.attr,
NULL
};
static struct attribute *lm63_attributes_temp2_type[] = {
&dev_attr_temp2_type.attr,
NULL
};
static const struct attribute_group lm63_group_temp2_type = {
.attrs = lm63_attributes_temp2_type,
};
static struct attribute *lm63_attributes_extra_lut[] = {
&sensor_dev_attr_pwm1_auto_point9_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point9_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point9_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point10_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point10_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point10_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point11_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point11_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point11_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point12_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point12_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point12_temp_hyst.dev_attr.attr,
NULL
};
static const struct attribute_group lm63_group_extra_lut = {
.attrs = lm63_attributes_extra_lut,
};
/*
* On LM63, temp2_crit can be set only once, which should be job
* of the bootloader.
* On LM64, temp2_crit can always be set.
* On LM96163, temp2_crit can be set if bit 1 of the configuration
* register is true.
*/
static umode_t lm63_attribute_mode(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct lm63_data *data = dev_get_drvdata(dev);
if (attr == &sensor_dev_attr_temp2_crit.dev_attr.attr
&& (data->kind == lm64 ||
(data->kind == lm96163 && (data->config & 0x02))))
return attr->mode | S_IWUSR;
return attr->mode;
}
static const struct attribute_group lm63_group = {
.is_visible = lm63_attribute_mode,
.attrs = lm63_attributes,
};
static struct attribute *lm63_attributes_fan1[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_min_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group lm63_group_fan1 = {
.attrs = lm63_attributes_fan1,
};
/*
* Real code
*/
/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm63_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
u8 man_id, chip_id, reg_config1, reg_config2;
u8 reg_alert_status, reg_alert_mask;
int address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
man_id = i2c_smbus_read_byte_data(client, LM63_REG_MAN_ID);
chip_id = i2c_smbus_read_byte_data(client, LM63_REG_CHIP_ID);
reg_config1 = i2c_smbus_read_byte_data(client, LM63_REG_CONFIG1);
reg_config2 = i2c_smbus_read_byte_data(client, LM63_REG_CONFIG2);
reg_alert_status = i2c_smbus_read_byte_data(client,
LM63_REG_ALERT_STATUS);
reg_alert_mask = i2c_smbus_read_byte_data(client, LM63_REG_ALERT_MASK);
if (man_id != 0x01 /* National Semiconductor */
|| (reg_config1 & 0x18) != 0x00
|| (reg_config2 & 0xF8) != 0x00
|| (reg_alert_status & 0x20) != 0x00
|| (reg_alert_mask & 0xA4) != 0xA4) {
dev_dbg(&adapter->dev,
"Unsupported chip (man_id=0x%02X, chip_id=0x%02X)\n",
man_id, chip_id);
return -ENODEV;
}
if (chip_id == 0x41 && address == 0x4c)
strscpy(info->type, "lm63", I2C_NAME_SIZE);
else if (chip_id == 0x51 && (address == 0x18 || address == 0x4e))
strscpy(info->type, "lm64", I2C_NAME_SIZE);
else if (chip_id == 0x49 && address == 0x4c)
strscpy(info->type, "lm96163", I2C_NAME_SIZE);
else
return -ENODEV;
return 0;
}
/*
* Ideally we shouldn't have to initialize anything, since the BIOS
* should have taken care of everything
*/
static void lm63_init_client(struct lm63_data *data)
{
struct i2c_client *client = data->client;
struct device *dev = &client->dev;
u8 convrate;
data->config = i2c_smbus_read_byte_data(client, LM63_REG_CONFIG1);
data->config_fan = i2c_smbus_read_byte_data(client,
LM63_REG_CONFIG_FAN);
/* Start converting if needed */
if (data->config & 0x40) { /* standby */
dev_dbg(dev, "Switching to operational mode\n");
data->config &= 0xA7;
i2c_smbus_write_byte_data(client, LM63_REG_CONFIG1,
data->config);
}
/* Tachometer is always enabled on LM64 */
if (data->kind == lm64)
data->config |= 0x04;
/* We may need pwm1_freq before ever updating the client data */
data->pwm1_freq = i2c_smbus_read_byte_data(client, LM63_REG_PWM_FREQ);
if (data->pwm1_freq == 0)
data->pwm1_freq = 1;
switch (data->kind) {
case lm63:
case lm64:
data->max_convrate_hz = LM63_MAX_CONVRATE_HZ;
data->lut_size = 8;
break;
case lm96163:
data->max_convrate_hz = LM96163_MAX_CONVRATE_HZ;
data->lut_size = 12;
data->trutherm
= i2c_smbus_read_byte_data(client,
LM96163_REG_TRUTHERM) & 0x02;
break;
}
convrate = i2c_smbus_read_byte_data(client, LM63_REG_CONVRATE);
if (unlikely(convrate > LM63_MAX_CONVRATE))
convrate = LM63_MAX_CONVRATE;
data->update_interval = UPDATE_INTERVAL(data->max_convrate_hz,
convrate);
/*
* For LM96163, check if high resolution PWM
* and unsigned temperature format is enabled.
*/
if (data->kind == lm96163) {
u8 config_enhanced
= i2c_smbus_read_byte_data(client,
LM96163_REG_CONFIG_ENHANCED);
if (config_enhanced & 0x20)
data->lut_temp_highres = true;
if ((config_enhanced & 0x10)
&& !(data->config_fan & 0x08) && data->pwm1_freq == 8)
data->pwm_highres = true;
if (config_enhanced & 0x08)
data->remote_unsigned = true;
}
/* Show some debug info about the LM63 configuration */
if (data->kind == lm63)
dev_dbg(dev, "Alert/tach pin configured for %s\n",
(data->config & 0x04) ? "tachometer input" :
"alert output");
dev_dbg(dev, "PWM clock %s kHz, output frequency %u Hz\n",
(data->config_fan & 0x08) ? "1.4" : "360",
((data->config_fan & 0x08) ? 700 : 180000) / data->pwm1_freq);
dev_dbg(dev, "PWM output active %s, %s mode\n",
(data->config_fan & 0x10) ? "low" : "high",
(data->config_fan & 0x20) ? "manual" : "auto");
}
static const struct i2c_device_id lm63_id[];
static int lm63_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct lm63_data *data;
int groups = 0;
data = devm_kzalloc(dev, sizeof(struct lm63_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* Set the device type */
if (client->dev.of_node)
data->kind = (uintptr_t)of_device_get_match_data(&client->dev);
else
data->kind = i2c_match_id(lm63_id, client)->driver_data;
if (data->kind == lm64)
data->temp2_offset = 16000;
/* Initialize chip */
lm63_init_client(data);
/* Register sysfs hooks */
data->groups[groups++] = &lm63_group;
if (data->config & 0x04) /* tachometer enabled */
data->groups[groups++] = &lm63_group_fan1;
if (data->kind == lm96163) {
data->groups[groups++] = &lm63_group_temp2_type;
data->groups[groups++] = &lm63_group_extra_lut;
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/*
* Driver data (common to all clients)
*/
static const struct i2c_device_id lm63_id[] = {
{ "lm63", lm63 },
{ "lm64", lm64 },
{ "lm96163", lm96163 },
{ }
};
MODULE_DEVICE_TABLE(i2c, lm63_id);
static const struct of_device_id __maybe_unused lm63_of_match[] = {
{
.compatible = "national,lm63",
.data = (void *)lm63
},
{
.compatible = "national,lm64",
.data = (void *)lm64
},
{
.compatible = "national,lm96163",
.data = (void *)lm96163
},
{ },
};
MODULE_DEVICE_TABLE(of, lm63_of_match);
static struct i2c_driver lm63_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "lm63",
.of_match_table = of_match_ptr(lm63_of_match),
},
.probe = lm63_probe,
.id_table = lm63_id,
.detect = lm63_detect,
.address_list = normal_i2c,
};
module_i2c_driver(lm63_driver);
MODULE_AUTHOR("Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("LM63 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/lm63.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* via686a.c - Part of lm_sensors, Linux kernel modules
* for hardware monitoring
*
* Copyright (c) 1998 - 2002 Frodo Looijaard <[email protected]>,
* Kyösti Mälkki <[email protected]>,
* Mark Studebaker <[email protected]>,
* and Bob Dougherty <[email protected]>
*
* (Some conversion-factor data were contributed by Jonathan Teh Soon Yew
* <[email protected]> and Alex van Kaam <[email protected]>.)
*/
/*
* Supports the Via VT82C686A, VT82C686B south bridges.
* Reports all as a 686A.
* Warning - only supports a single device.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/acpi.h>
#include <linux/io.h>
#define DRIVER_NAME "via686a"
/*
* If force_addr is set to anything different from 0, we forcibly enable
* the device at the given address.
*/
static unsigned short force_addr;
module_param(force_addr, ushort, 0);
MODULE_PARM_DESC(force_addr,
"Initialize the base address of the sensors");
static struct platform_device *pdev;
/*
* The Via 686a southbridge has a LM78-like chip integrated on the same IC.
* This driver is a customized copy of lm78.c
*/
/* Many VIA686A constants specified below */
/* Length of ISA address segment */
#define VIA686A_EXTENT 0x80
#define VIA686A_BASE_REG 0x70
#define VIA686A_ENABLE_REG 0x74
/* The VIA686A registers */
/* ins numbered 0-4 */
#define VIA686A_REG_IN_MAX(nr) (0x2b + ((nr) * 2))
#define VIA686A_REG_IN_MIN(nr) (0x2c + ((nr) * 2))
#define VIA686A_REG_IN(nr) (0x22 + (nr))
/* fans numbered 1-2 */
#define VIA686A_REG_FAN_MIN(nr) (0x3a + (nr))
#define VIA686A_REG_FAN(nr) (0x28 + (nr))
/* temps numbered 1-3 */
static const u8 VIA686A_REG_TEMP[] = { 0x20, 0x21, 0x1f };
static const u8 VIA686A_REG_TEMP_OVER[] = { 0x39, 0x3d, 0x1d };
static const u8 VIA686A_REG_TEMP_HYST[] = { 0x3a, 0x3e, 0x1e };
/* bits 7-6 */
#define VIA686A_REG_TEMP_LOW1 0x4b
/* 2 = bits 5-4, 3 = bits 7-6 */
#define VIA686A_REG_TEMP_LOW23 0x49
#define VIA686A_REG_ALARM1 0x41
#define VIA686A_REG_ALARM2 0x42
#define VIA686A_REG_FANDIV 0x47
#define VIA686A_REG_CONFIG 0x40
/*
* The following register sets temp interrupt mode (bits 1-0 for temp1,
* 3-2 for temp2, 5-4 for temp3). Modes are:
* 00 interrupt stays as long as value is out-of-range
* 01 interrupt is cleared once register is read (default)
* 10 comparator mode- like 00, but ignores hysteresis
* 11 same as 00
*/
#define VIA686A_REG_TEMP_MODE 0x4b
/* We'll just assume that you want to set all 3 simultaneously: */
#define VIA686A_TEMP_MODE_MASK 0x3F
#define VIA686A_TEMP_MODE_CONTINUOUS 0x00
/*
* Conversions. Limit checking is only done on the TO_REG
* variants.
*
******** VOLTAGE CONVERSIONS (Bob Dougherty) ********
* From HWMon.cpp (Copyright 1998-2000 Jonathan Teh Soon Yew):
* voltagefactor[0]=1.25/2628; (2628/1.25=2102.4) // Vccp
* voltagefactor[1]=1.25/2628; (2628/1.25=2102.4) // +2.5V
* voltagefactor[2]=1.67/2628; (2628/1.67=1573.7) // +3.3V
* voltagefactor[3]=2.6/2628; (2628/2.60=1010.8) // +5V
* voltagefactor[4]=6.3/2628; (2628/6.30=417.14) // +12V
* in[i]=(data[i+2]*25.0+133)*voltagefactor[i];
* That is:
* volts = (25*regVal+133)*factor
* regVal = (volts/factor-133)/25
* (These conversions were contributed by Jonathan Teh Soon Yew
* <[email protected]>)
*/
static inline u8 IN_TO_REG(long val, int in_num)
{
/*
* To avoid floating point, we multiply constants by 10 (100 for +12V).
* Rounding is done (120500 is actually 133000 - 12500).
* Remember that val is expressed in 0.001V/bit, which is why we divide
* by an additional 10000 (100000 for +12V): 1000 for val and 10 (100)
* for the constants.
*/
if (in_num <= 1)
return (u8) clamp_val((val * 21024 - 1205000) / 250000, 0, 255);
else if (in_num == 2)
return (u8) clamp_val((val * 15737 - 1205000) / 250000, 0, 255);
else if (in_num == 3)
return (u8) clamp_val((val * 10108 - 1205000) / 250000, 0, 255);
else
return (u8) clamp_val((val * 41714 - 12050000) / 2500000, 0,
255);
}
static inline long IN_FROM_REG(u8 val, int in_num)
{
/*
* To avoid floating point, we multiply constants by 10 (100 for +12V).
* We also multiply them by 1000 because we want 0.001V/bit for the
* output value. Rounding is done.
*/
if (in_num <= 1)
return (long) ((250000 * val + 1330000 + 21024 / 2) / 21024);
else if (in_num == 2)
return (long) ((250000 * val + 1330000 + 15737 / 2) / 15737);
else if (in_num == 3)
return (long) ((250000 * val + 1330000 + 10108 / 2) / 10108);
else
return (long) ((2500000 * val + 13300000 + 41714 / 2) / 41714);
}
/********* FAN RPM CONVERSIONS ********/
/*
* Higher register values = slower fans (the fan's strobe gates a counter).
* But this chip saturates back at 0, not at 255 like all the other chips.
* So, 0 means 0 RPM
*/
static inline u8 FAN_TO_REG(long rpm, int div)
{
if (rpm == 0)
return 0;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 255);
}
#define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : (val) == 255 ? 0 : 1350000 / \
((val) * (div)))
/******** TEMP CONVERSIONS (Bob Dougherty) *********/
/*
* linear fits from HWMon.cpp (Copyright 1998-2000 Jonathan Teh Soon Yew)
* if(temp<169)
* return double(temp)*0.427-32.08;
* else if(temp>=169 && temp<=202)
* return double(temp)*0.582-58.16;
* else
* return double(temp)*0.924-127.33;
*
* A fifth-order polynomial fits the unofficial data (provided by Alex van
* Kaam <[email protected]>) a bit better. It also give more reasonable
* numbers on my machine (ie. they agree with what my BIOS tells me).
* Here's the fifth-order fit to the 8-bit data:
* temp = 1.625093e-10*val^5 - 1.001632e-07*val^4 + 2.457653e-05*val^3 -
* 2.967619e-03*val^2 + 2.175144e-01*val - 7.090067e+0.
*
* (2000-10-25- RFD: thanks to Uwe Andersen <[email protected]> for
* finding my typos in this formula!)
*
* Alas, none of the elegant function-fit solutions will work because we
* aren't allowed to use floating point in the kernel and doing it with
* integers doesn't provide enough precision. So we'll do boring old
* look-up table stuff. The unofficial data (see below) have effectively
* 7-bit resolution (they are rounded to the nearest degree). I'm assuming
* that the transfer function of the device is monotonic and smooth, so a
* smooth function fit to the data will allow us to get better precision.
* I used the 5th-order poly fit described above and solved for
* VIA register values 0-255. I *10 before rounding, so we get tenth-degree
* precision. (I could have done all 1024 values for our 10-bit readings,
* but the function is very linear in the useful range (0-80 deg C), so
* we'll just use linear interpolation for 10-bit readings.) So, temp_lut
* is the temp at via register values 0-255:
*/
static const s16 temp_lut[] = {
-709, -688, -667, -646, -627, -607, -589, -570, -553, -536, -519,
-503, -487, -471, -456, -442, -428, -414, -400, -387, -375,
-362, -350, -339, -327, -316, -305, -295, -285, -275, -265,
-255, -246, -237, -229, -220, -212, -204, -196, -188, -180,
-173, -166, -159, -152, -145, -139, -132, -126, -120, -114,
-108, -102, -96, -91, -85, -80, -74, -69, -64, -59, -54, -49,
-44, -39, -34, -29, -25, -20, -15, -11, -6, -2, 3, 7, 12, 16,
20, 25, 29, 33, 37, 42, 46, 50, 54, 59, 63, 67, 71, 75, 79, 84,
88, 92, 96, 100, 104, 109, 113, 117, 121, 125, 130, 134, 138,
142, 146, 151, 155, 159, 163, 168, 172, 176, 181, 185, 189,
193, 198, 202, 206, 211, 215, 219, 224, 228, 232, 237, 241,
245, 250, 254, 259, 263, 267, 272, 276, 281, 285, 290, 294,
299, 303, 307, 312, 316, 321, 325, 330, 334, 339, 344, 348,
353, 357, 362, 366, 371, 376, 380, 385, 390, 395, 399, 404,
409, 414, 419, 423, 428, 433, 438, 443, 449, 454, 459, 464,
469, 475, 480, 486, 491, 497, 502, 508, 514, 520, 526, 532,
538, 544, 551, 557, 564, 571, 578, 584, 592, 599, 606, 614,
621, 629, 637, 645, 654, 662, 671, 680, 689, 698, 708, 718,
728, 738, 749, 759, 770, 782, 793, 805, 818, 830, 843, 856,
870, 883, 898, 912, 927, 943, 958, 975, 991, 1008, 1026, 1044,
1062, 1081, 1101, 1121, 1141, 1162, 1184, 1206, 1229, 1252,
1276, 1301, 1326, 1352, 1378, 1406, 1434, 1462
};
/*
* the original LUT values from Alex van Kaam <[email protected]>
* (for via register values 12-240):
* {-50,-49,-47,-45,-43,-41,-39,-38,-37,-35,-34,-33,-32,-31,
* -30,-29,-28,-27,-26,-25,-24,-24,-23,-22,-21,-20,-20,-19,-18,-17,-17,-16,-15,
* -15,-14,-14,-13,-12,-12,-11,-11,-10,-9,-9,-8,-8,-7,-7,-6,-6,-5,-5,-4,-4,-3,
* -3,-2,-2,-1,-1,0,0,1,1,1,3,3,3,4,4,4,5,5,5,6,6,7,7,8,8,9,9,9,10,10,11,11,12,
* 12,12,13,13,13,14,14,15,15,16,16,16,17,17,18,18,19,19,20,20,21,21,21,22,22,
* 22,23,23,24,24,25,25,26,26,26,27,27,27,28,28,29,29,30,30,30,31,31,32,32,33,
* 33,34,34,35,35,35,36,36,37,37,38,38,39,39,40,40,41,41,42,42,43,43,44,44,45,
* 45,46,46,47,48,48,49,49,50,51,51,52,52,53,53,54,55,55,56,57,57,58,59,59,60,
* 61,62,62,63,64,65,66,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,83,84,
* 85,86,88,89,91,92,94,96,97,99,101,103,105,107,109,110};
*
*
* Here's the reverse LUT. I got it by doing a 6-th order poly fit (needed
* an extra term for a good fit to these inverse data!) and then
* solving for each temp value from -50 to 110 (the useable range for
* this chip). Here's the fit:
* viaRegVal = -1.160370e-10*val^6 +3.193693e-08*val^5 - 1.464447e-06*val^4
* - 2.525453e-04*val^3 + 1.424593e-02*val^2 + 2.148941e+00*val +7.275808e+01)
* Note that n=161:
*/
static const u8 via_lut[] = {
12, 12, 13, 14, 14, 15, 16, 16, 17, 18, 18, 19, 20, 20, 21, 22, 23,
23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 35, 36, 37, 39, 40,
41, 43, 45, 46, 48, 49, 51, 53, 55, 57, 59, 60, 62, 64, 66,
69, 71, 73, 75, 77, 79, 82, 84, 86, 88, 91, 93, 95, 98, 100,
103, 105, 107, 110, 112, 115, 117, 119, 122, 124, 126, 129,
131, 134, 136, 138, 140, 143, 145, 147, 150, 152, 154, 156,
158, 160, 162, 164, 166, 168, 170, 172, 174, 176, 178, 180,
182, 183, 185, 187, 188, 190, 192, 193, 195, 196, 198, 199,
200, 202, 203, 205, 206, 207, 208, 209, 210, 211, 212, 213,
214, 215, 216, 217, 218, 219, 220, 221, 222, 222, 223, 224,
225, 226, 226, 227, 228, 228, 229, 230, 230, 231, 232, 232,
233, 233, 234, 235, 235, 236, 236, 237, 237, 238, 238, 239,
239, 240
};
/*
* Converting temps to (8-bit) hyst and over registers
* No interpolation here.
* The +50 is because the temps start at -50
*/
static inline u8 TEMP_TO_REG(long val)
{
return via_lut[val <= -50000 ? 0 : val >= 110000 ? 160 :
(val < 0 ? val - 500 : val + 500) / 1000 + 50];
}
/* for 8-bit temperature hyst and over registers */
#define TEMP_FROM_REG(val) ((long)temp_lut[val] * 100)
/* for 10-bit temperature readings */
static inline long TEMP_FROM_REG10(u16 val)
{
u16 eight_bits = val >> 2;
u16 two_bits = val & 3;
/* no interpolation for these */
if (two_bits == 0 || eight_bits == 255)
return TEMP_FROM_REG(eight_bits);
/* do some linear interpolation */
return (temp_lut[eight_bits] * (4 - two_bits) +
temp_lut[eight_bits + 1] * two_bits) * 25;
}
#define DIV_FROM_REG(val) (1 << (val))
#define DIV_TO_REG(val) ((val) == 8 ? 3 : (val) == 4 ? 2 : (val) == 1 ? 0 : 1)
/*
* For each registered chip, we need to keep some data in memory.
* The structure is dynamically allocated.
*/
struct via686a_data {
unsigned short addr;
const char *name;
struct device *hwmon_dev;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 in[5]; /* Register value */
u8 in_max[5]; /* Register value */
u8 in_min[5]; /* Register value */
u8 fan[2]; /* Register value */
u8 fan_min[2]; /* Register value */
u16 temp[3]; /* Register value 10 bit */
u8 temp_over[3]; /* Register value */
u8 temp_hyst[3]; /* Register value */
u8 fan_div[2]; /* Register encoding, shifted right */
u16 alarms; /* Register encoding, combined */
};
static struct pci_dev *s_bridge; /* pointer to the (only) via686a */
static inline int via686a_read_value(struct via686a_data *data, u8 reg)
{
return inb_p(data->addr + reg);
}
static inline void via686a_write_value(struct via686a_data *data, u8 reg,
u8 value)
{
outb_p(value, data->addr + reg);
}
static void via686a_update_fan_div(struct via686a_data *data)
{
int reg = via686a_read_value(data, VIA686A_REG_FANDIV);
data->fan_div[0] = (reg >> 4) & 0x03;
data->fan_div[1] = reg >> 6;
}
static struct via686a_data *via686a_update_device(struct device *dev)
{
struct via686a_data *data = dev_get_drvdata(dev);
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
for (i = 0; i <= 4; i++) {
data->in[i] =
via686a_read_value(data, VIA686A_REG_IN(i));
data->in_min[i] = via686a_read_value(data,
VIA686A_REG_IN_MIN
(i));
data->in_max[i] =
via686a_read_value(data, VIA686A_REG_IN_MAX(i));
}
for (i = 1; i <= 2; i++) {
data->fan[i - 1] =
via686a_read_value(data, VIA686A_REG_FAN(i));
data->fan_min[i - 1] = via686a_read_value(data,
VIA686A_REG_FAN_MIN(i));
}
for (i = 0; i <= 2; i++) {
data->temp[i] = via686a_read_value(data,
VIA686A_REG_TEMP[i]) << 2;
data->temp_over[i] =
via686a_read_value(data,
VIA686A_REG_TEMP_OVER[i]);
data->temp_hyst[i] =
via686a_read_value(data,
VIA686A_REG_TEMP_HYST[i]);
}
/*
* add in lower 2 bits
* temp1 uses bits 7-6 of VIA686A_REG_TEMP_LOW1
* temp2 uses bits 5-4 of VIA686A_REG_TEMP_LOW23
* temp3 uses bits 7-6 of VIA686A_REG_TEMP_LOW23
*/
data->temp[0] |= (via686a_read_value(data,
VIA686A_REG_TEMP_LOW1)
& 0xc0) >> 6;
data->temp[1] |=
(via686a_read_value(data, VIA686A_REG_TEMP_LOW23) &
0x30) >> 4;
data->temp[2] |=
(via686a_read_value(data, VIA686A_REG_TEMP_LOW23) &
0xc0) >> 6;
via686a_update_fan_div(data);
data->alarms =
via686a_read_value(data,
VIA686A_REG_ALARM1) |
(via686a_read_value(data, VIA686A_REG_ALARM2) << 8);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/* following are the sysfs callback functions */
/* 7 voltage sensors */
static ssize_t in_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%ld\n", IN_FROM_REG(data->in[nr], nr));
}
static ssize_t in_min_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%ld\n", IN_FROM_REG(data->in_min[nr], nr));
}
static ssize_t in_max_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%ld\n", IN_FROM_REG(data->in_max[nr], nr));
}
static ssize_t in_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count) {
struct via686a_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_min[nr] = IN_TO_REG(val, nr);
via686a_write_value(data, VIA686A_REG_IN_MIN(nr),
data->in_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t in_max_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count) {
struct via686a_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->in_max[nr] = IN_TO_REG(val, nr);
via686a_write_value(data, VIA686A_REG_IN_MAX(nr),
data->in_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(in0_input, in, 0);
static SENSOR_DEVICE_ATTR_RW(in0_min, in_min, 0);
static SENSOR_DEVICE_ATTR_RW(in0_max, in_max, 0);
static SENSOR_DEVICE_ATTR_RO(in1_input, in, 1);
static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
static SENSOR_DEVICE_ATTR_RO(in2_input, in, 2);
static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
static SENSOR_DEVICE_ATTR_RO(in3_input, in, 3);
static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
static SENSOR_DEVICE_ATTR_RO(in4_input, in, 4);
static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
/* 3 temperatures */
static ssize_t temp_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%ld\n", TEMP_FROM_REG10(data->temp[nr]));
}
static ssize_t temp_over_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_over[nr]));
}
static ssize_t temp_hyst_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_hyst[nr]));
}
static ssize_t temp_over_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count) {
struct via686a_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_over[nr] = TEMP_TO_REG(val);
via686a_write_value(data, VIA686A_REG_TEMP_OVER[nr],
data->temp_over[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_hyst_store(struct device *dev,
struct device_attribute *da, const char *buf,
size_t count) {
struct via686a_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_hyst[nr] = TEMP_TO_REG(val);
via686a_write_value(data, VIA686A_REG_TEMP_HYST[nr],
data->temp_hyst[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_over, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp_hyst, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_over, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max_hyst, temp_hyst, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_over, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max_hyst, temp_hyst, 2);
/* 2 Fans */
static ssize_t fan_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n",
FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_div_show(struct device *dev, struct device_attribute *da,
char *buf) {
struct via686a_data *data = via686a_update_device(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
}
static ssize_t fan_min_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count) {
struct via686a_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
via686a_write_value(data, VIA686A_REG_FAN_MIN(nr+1), data->fan_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_div_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count) {
struct via686a_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int nr = attr->index;
int old;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
old = via686a_read_value(data, VIA686A_REG_FANDIV);
data->fan_div[nr] = DIV_TO_REG(val);
old = (old & 0x0f) | (data->fan_div[1] << 6) | (data->fan_div[0] << 4);
via686a_write_value(data, VIA686A_REG_FANDIV, old);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
/* Alarms */
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct via686a_data *data = via686a_update_device(dev);
return sprintf(buf, "%u\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct via686a_data *data = via686a_update_device(dev);
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 15);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
static ssize_t name_show(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct via686a_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR_RO(name);
static struct attribute *via686a_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_name.attr,
NULL
};
static const struct attribute_group via686a_group = {
.attrs = via686a_attributes,
};
static void via686a_init_device(struct via686a_data *data)
{
u8 reg;
/* Start monitoring */
reg = via686a_read_value(data, VIA686A_REG_CONFIG);
via686a_write_value(data, VIA686A_REG_CONFIG, (reg | 0x01) & 0x7F);
/* Configure temp interrupt mode for continuous-interrupt operation */
reg = via686a_read_value(data, VIA686A_REG_TEMP_MODE);
via686a_write_value(data, VIA686A_REG_TEMP_MODE,
(reg & ~VIA686A_TEMP_MODE_MASK)
| VIA686A_TEMP_MODE_CONTINUOUS);
/* Pre-read fan clock divisor values */
via686a_update_fan_div(data);
}
/* This is called when the module is loaded */
static int via686a_probe(struct platform_device *pdev)
{
struct via686a_data *data;
struct resource *res;
int err;
/* Reserve the ISA region */
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev, res->start, VIA686A_EXTENT,
DRIVER_NAME)) {
dev_err(&pdev->dev, "Region 0x%lx-0x%lx already in use!\n",
(unsigned long)res->start, (unsigned long)res->end);
return -ENODEV;
}
data = devm_kzalloc(&pdev->dev, sizeof(struct via686a_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
platform_set_drvdata(pdev, data);
data->addr = res->start;
data->name = DRIVER_NAME;
mutex_init(&data->update_lock);
/* Initialize the VIA686A chip */
via686a_init_device(data);
/* Register sysfs hooks */
err = sysfs_create_group(&pdev->dev.kobj, &via686a_group);
if (err)
return err;
data->hwmon_dev = hwmon_device_register(&pdev->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto exit_remove_files;
}
return 0;
exit_remove_files:
sysfs_remove_group(&pdev->dev.kobj, &via686a_group);
return err;
}
static int via686a_remove(struct platform_device *pdev)
{
struct via686a_data *data = platform_get_drvdata(pdev);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &via686a_group);
return 0;
}
static struct platform_driver via686a_driver = {
.driver = {
.name = DRIVER_NAME,
},
.probe = via686a_probe,
.remove = via686a_remove,
};
static const struct pci_device_id via686a_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4) },
{ }
};
MODULE_DEVICE_TABLE(pci, via686a_pci_ids);
static int via686a_device_add(unsigned short address)
{
struct resource res = {
.start = address,
.end = address + VIA686A_EXTENT - 1,
.name = DRIVER_NAME,
.flags = IORESOURCE_IO,
};
int err;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit;
pdev = platform_device_alloc(DRIVER_NAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static int via686a_pci_probe(struct pci_dev *dev,
const struct pci_device_id *id)
{
u16 address, val;
int ret;
if (force_addr) {
address = force_addr & ~(VIA686A_EXTENT - 1);
dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address);
ret = pci_write_config_word(dev, VIA686A_BASE_REG, address | 1);
if (ret != PCIBIOS_SUCCESSFUL)
return -ENODEV;
}
ret = pci_read_config_word(dev, VIA686A_BASE_REG, &val);
if (ret != PCIBIOS_SUCCESSFUL)
return -ENODEV;
address = val & ~(VIA686A_EXTENT - 1);
if (address == 0) {
dev_err(&dev->dev,
"base address not set - upgrade BIOS or use force_addr=0xaddr\n");
return -ENODEV;
}
ret = pci_read_config_word(dev, VIA686A_ENABLE_REG, &val);
if (ret != PCIBIOS_SUCCESSFUL)
return -ENODEV;
if (!(val & 0x0001)) {
if (!force_addr) {
dev_warn(&dev->dev,
"Sensors disabled, enable with force_addr=0x%x\n",
address);
return -ENODEV;
}
dev_warn(&dev->dev, "Enabling sensors\n");
ret = pci_write_config_word(dev, VIA686A_ENABLE_REG, val | 0x1);
if (ret != PCIBIOS_SUCCESSFUL)
return -ENODEV;
}
if (platform_driver_register(&via686a_driver))
goto exit;
/* Sets global pdev as a side effect */
if (via686a_device_add(address))
goto exit_unregister;
/*
* Always return failure here. This is to allow other drivers to bind
* to this pci device. We don't really want to have control over the
* pci device, we only wanted to read as few register values from it.
*/
s_bridge = pci_dev_get(dev);
return -ENODEV;
exit_unregister:
platform_driver_unregister(&via686a_driver);
exit:
return -ENODEV;
}
static struct pci_driver via686a_pci_driver = {
.name = DRIVER_NAME,
.id_table = via686a_pci_ids,
.probe = via686a_pci_probe,
};
static int __init sm_via686a_init(void)
{
return pci_register_driver(&via686a_pci_driver);
}
static void __exit sm_via686a_exit(void)
{
pci_unregister_driver(&via686a_pci_driver);
if (s_bridge != NULL) {
platform_device_unregister(pdev);
platform_driver_unregister(&via686a_driver);
pci_dev_put(s_bridge);
s_bridge = NULL;
}
}
MODULE_AUTHOR("Kyösti Mälkki <[email protected]>, "
"Mark Studebaker <[email protected]> "
"and Bob Dougherty <[email protected]>");
MODULE_DESCRIPTION("VIA 686A Sensor device");
MODULE_LICENSE("GPL");
module_init(sm_via686a_init);
module_exit(sm_via686a_exit);
|
linux-master
|
drivers/hwmon/via686a.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* it87.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring.
*
* The IT8705F is an LPC-based Super I/O part that contains UARTs, a
* parallel port, an IR port, a MIDI port, a floppy controller, etc., in
* addition to an Environment Controller (Enhanced Hardware Monitor and
* Fan Controller)
*
* This driver supports only the Environment Controller in the IT8705F and
* similar parts. The other devices are supported by different drivers.
*
* Supports: IT8603E Super I/O chip w/LPC interface
* IT8620E Super I/O chip w/LPC interface
* IT8622E Super I/O chip w/LPC interface
* IT8623E Super I/O chip w/LPC interface
* IT8628E Super I/O chip w/LPC interface
* IT8705F Super I/O chip w/LPC interface
* IT8712F Super I/O chip w/LPC interface
* IT8716F Super I/O chip w/LPC interface
* IT8718F Super I/O chip w/LPC interface
* IT8720F Super I/O chip w/LPC interface
* IT8721F Super I/O chip w/LPC interface
* IT8726F Super I/O chip w/LPC interface
* IT8728F Super I/O chip w/LPC interface
* IT8732F Super I/O chip w/LPC interface
* IT8758E Super I/O chip w/LPC interface
* IT8771E Super I/O chip w/LPC interface
* IT8772E Super I/O chip w/LPC interface
* IT8781F Super I/O chip w/LPC interface
* IT8782F Super I/O chip w/LPC interface
* IT8783E/F Super I/O chip w/LPC interface
* IT8786E Super I/O chip w/LPC interface
* IT8790E Super I/O chip w/LPC interface
* IT8792E Super I/O chip w/LPC interface
* IT87952E Super I/O chip w/LPC interface
* Sis950 A clone of the IT8705F
*
* Copyright (C) 2001 Chris Gauthron
* Copyright (C) 2005-2010 Jean Delvare <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/string.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
#include <linux/io.h>
#define DRVNAME "it87"
enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
it8771, it8772, it8781, it8782, it8783, it8786, it8790,
it8792, it8603, it8620, it8622, it8628, it87952 };
static struct platform_device *it87_pdev[2];
#define REG_2E 0x2e /* The register to read/write */
#define REG_4E 0x4e /* Secondary register to read/write */
#define DEV 0x07 /* Register: Logical device select */
#define PME 0x04 /* The device with the fan registers in it */
/* The device with the IT8718F/IT8720F VID value in it */
#define GPIO 0x07
#define DEVID 0x20 /* Register: Device ID */
#define DEVREV 0x22 /* Register: Device Revision */
static inline void __superio_enter(int ioreg)
{
outb(0x87, ioreg);
outb(0x01, ioreg);
outb(0x55, ioreg);
outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
}
static inline int superio_inb(int ioreg, int reg)
{
outb(reg, ioreg);
return inb(ioreg + 1);
}
static inline void superio_outb(int ioreg, int reg, int val)
{
outb(reg, ioreg);
outb(val, ioreg + 1);
}
static int superio_inw(int ioreg, int reg)
{
int val;
outb(reg++, ioreg);
val = inb(ioreg + 1) << 8;
outb(reg, ioreg);
val |= inb(ioreg + 1);
return val;
}
static inline void superio_select(int ioreg, int ldn)
{
outb(DEV, ioreg);
outb(ldn, ioreg + 1);
}
static inline int superio_enter(int ioreg)
{
/*
* Try to reserve ioreg and ioreg + 1 for exclusive access.
*/
if (!request_muxed_region(ioreg, 2, DRVNAME))
return -EBUSY;
__superio_enter(ioreg);
return 0;
}
static inline void superio_exit(int ioreg, bool noexit)
{
if (!noexit) {
outb(0x02, ioreg);
outb(0x02, ioreg + 1);
}
release_region(ioreg, 2);
}
/* Logical device 4 registers */
#define IT8712F_DEVID 0x8712
#define IT8705F_DEVID 0x8705
#define IT8716F_DEVID 0x8716
#define IT8718F_DEVID 0x8718
#define IT8720F_DEVID 0x8720
#define IT8721F_DEVID 0x8721
#define IT8726F_DEVID 0x8726
#define IT8728F_DEVID 0x8728
#define IT8732F_DEVID 0x8732
#define IT8792E_DEVID 0x8733
#define IT8771E_DEVID 0x8771
#define IT8772E_DEVID 0x8772
#define IT8781F_DEVID 0x8781
#define IT8782F_DEVID 0x8782
#define IT8783E_DEVID 0x8783
#define IT8786E_DEVID 0x8786
#define IT8790E_DEVID 0x8790
#define IT8603E_DEVID 0x8603
#define IT8620E_DEVID 0x8620
#define IT8622E_DEVID 0x8622
#define IT8623E_DEVID 0x8623
#define IT8628E_DEVID 0x8628
#define IT87952E_DEVID 0x8695
/* Logical device 4 (Environmental Monitor) registers */
#define IT87_ACT_REG 0x30
#define IT87_BASE_REG 0x60
#define IT87_SPECIAL_CFG_REG 0xf3 /* special configuration register */
/* Logical device 7 registers (IT8712F and later) */
#define IT87_SIO_GPIO1_REG 0x25
#define IT87_SIO_GPIO2_REG 0x26
#define IT87_SIO_GPIO3_REG 0x27
#define IT87_SIO_GPIO4_REG 0x28
#define IT87_SIO_GPIO5_REG 0x29
#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
#define IT87_SIO_VID_REG 0xfc /* VID value */
#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
/* Force chip IDs to specified values. Should only be used for testing */
static unsigned short force_id[2];
static unsigned int force_id_cnt;
/* ACPI resource conflicts are ignored if this parameter is set to 1 */
static bool ignore_resource_conflict;
/* Update battery voltage after every reading if true */
static bool update_vbat;
/* Not all BIOSes properly configure the PWM registers */
static bool fix_pwm_polarity;
/* Many IT87 constants specified below */
/* Length of ISA address segment */
#define IT87_EXTENT 8
/* Length of ISA address segment for Environmental Controller */
#define IT87_EC_EXTENT 2
/* Offset of EC registers from ISA base address */
#define IT87_EC_OFFSET 5
/* Where are the ISA address/data registers relative to the EC base address */
#define IT87_ADDR_REG_OFFSET 0
#define IT87_DATA_REG_OFFSET 1
/*----- The IT87 registers -----*/
#define IT87_REG_CONFIG 0x00
#define IT87_REG_ALARM1 0x01
#define IT87_REG_ALARM2 0x02
#define IT87_REG_ALARM3 0x03
/*
* The IT8718F and IT8720F have the VID value in a different register, in
* Super-I/O configuration space.
*/
#define IT87_REG_VID 0x0a
/* Interface Selection register on other chips */
#define IT87_REG_IFSEL 0x0a
/*
* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
* for fan divisors. Later IT8712F revisions must use 16-bit tachometer
* mode.
*/
#define IT87_REG_FAN_DIV 0x0b
#define IT87_REG_FAN_16BIT 0x0c
/*
* Monitors:
* - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
* - up to 6 temp (1 to 6)
* - up to 6 fan (1 to 6)
*/
static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
#define IT87_REG_FAN_MAIN_CTRL 0x13
#define IT87_REG_FAN_CTL 0x14
static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
#define IT87_REG_TEMP(nr) (0x29 + (nr))
#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
#define IT87_REG_VIN_ENABLE 0x50
#define IT87_REG_TEMP_ENABLE 0x51
#define IT87_REG_TEMP_EXTRA 0x55
#define IT87_REG_BEEP_ENABLE 0x5c
#define IT87_REG_CHIPID 0x58
static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
#define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
#define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
#define IT87_REG_TEMP456_ENABLE 0x77
#define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
#define NUM_VIN_LIMIT 8
#define NUM_TEMP 6
#define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
#define NUM_TEMP_LIMIT 3
#define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
#define NUM_FAN_DIV 3
#define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
#define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
struct it87_devices {
const char *name;
const char * const model;
u32 features;
u8 peci_mask;
u8 old_peci_mask;
u8 smbus_bitmap; /* SMBus enable bits in extra config register */
u8 ec_special_config;
};
#define FEAT_12MV_ADC BIT(0)
#define FEAT_NEWER_AUTOPWM BIT(1)
#define FEAT_OLD_AUTOPWM BIT(2)
#define FEAT_16BIT_FANS BIT(3)
#define FEAT_TEMP_OFFSET BIT(4)
#define FEAT_TEMP_PECI BIT(5)
#define FEAT_TEMP_OLD_PECI BIT(6)
#define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
#define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
#define FEAT_VID BIT(9) /* Set if chip supports VID */
#define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
#define FEAT_SIX_FANS BIT(11) /* Supports six fans */
#define FEAT_10_9MV_ADC BIT(12)
#define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
#define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
#define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
#define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
#define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
#define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
/*
* Disabling configuration mode on some chips can result in system
* hang-ups and access failures to the Super-IO chip at the
* second SIO address. Never exit configuration mode on these
* chips to avoid the problem.
*/
#define FEAT_CONF_NOEXIT BIT(19) /* Chip should not exit conf mode */
#define FEAT_FOUR_FANS BIT(20) /* Supports four fans */
#define FEAT_FOUR_PWM BIT(21) /* Supports four fan controls */
#define FEAT_FOUR_TEMP BIT(22)
#define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */
static const struct it87_devices it87_devices[] = {
[it87] = {
.name = "it87",
.model = "IT87F",
.features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
/* may need to overwrite */
},
[it8712] = {
.name = "it8712",
.model = "IT8712F",
.features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
/* may need to overwrite */
},
[it8716] = {
.name = "it8716",
.model = "IT8716F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
| FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
},
[it8718] = {
.name = "it8718",
.model = "IT8718F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.old_peci_mask = 0x4,
},
[it8720] = {
.name = "it8720",
.model = "IT8720F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.old_peci_mask = 0x4,
},
[it8721] = {
.name = "it8721",
.model = "IT8721F",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
| FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.peci_mask = 0x05,
.old_peci_mask = 0x02, /* Actually reports PCH */
},
[it8728] = {
.name = "it8728",
.model = "IT8728F",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
| FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.peci_mask = 0x07,
},
[it8732] = {
.name = "it8732",
.model = "IT8732F",
.features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
| FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
| FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
.peci_mask = 0x07,
.old_peci_mask = 0x02, /* Actually reports PCH */
},
[it8771] = {
.name = "it8771",
.model = "IT8771E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
/* PECI: guesswork */
/* 12mV ADC (OHM) */
/* 16 bit fans (OHM) */
/* three fans, always 16 bit (guesswork) */
.peci_mask = 0x07,
},
[it8772] = {
.name = "it8772",
.model = "IT8772E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
/* PECI (coreboot) */
/* 12mV ADC (HWSensors4, OHM) */
/* 16 bit fans (HWSensors4, OHM) */
/* three fans, always 16 bit (datasheet) */
.peci_mask = 0x07,
},
[it8781] = {
.name = "it8781",
.model = "IT8781F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.old_peci_mask = 0x4,
},
[it8782] = {
.name = "it8782",
.model = "IT8782F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.old_peci_mask = 0x4,
},
[it8783] = {
.name = "it8783",
.model = "IT8783E/F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.old_peci_mask = 0x4,
},
[it8786] = {
.name = "it8786",
.model = "IT8786E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.peci_mask = 0x07,
},
[it8790] = {
.name = "it8790",
.model = "IT8790E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF | FEAT_CONF_NOEXIT,
.peci_mask = 0x07,
},
[it8792] = {
.name = "it8792",
.model = "IT8792E/IT8795E",
.features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
| FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF
| FEAT_CONF_NOEXIT,
.peci_mask = 0x07,
.old_peci_mask = 0x02, /* Actually reports PCH */
},
[it8603] = {
.name = "it8603",
.model = "IT8603E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_AVCC3 | FEAT_PWM_FREQ2,
.peci_mask = 0x07,
},
[it8620] = {
.name = "it8620",
.model = "IT8620E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
| FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
| FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF,
.peci_mask = 0x07,
},
[it8622] = {
.name = "it8622",
.model = "IT8622E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
| FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
| FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_FOUR_TEMP,
.peci_mask = 0x07,
.smbus_bitmap = BIT(1) | BIT(2),
},
[it8628] = {
.name = "it8628",
.model = "IT8628E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
| FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
| FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF,
.peci_mask = 0x07,
},
[it87952] = {
.name = "it87952",
.model = "IT87952E",
.features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
| FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
| FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF
| FEAT_CONF_NOEXIT,
.peci_mask = 0x07,
.old_peci_mask = 0x02, /* Actually reports PCH */
},
};
#define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
#define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
#define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
#define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
#define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
#define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
((data)->peci_mask & BIT(nr)))
#define has_temp_old_peci(data, nr) \
(((data)->features & FEAT_TEMP_OLD_PECI) && \
((data)->old_peci_mask & BIT(nr)))
#define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
#define has_four_fans(data) ((data)->features & (FEAT_FOUR_FANS | \
FEAT_FIVE_FANS | \
FEAT_SIX_FANS))
#define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
FEAT_SIX_FANS))
#define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
#define has_vid(data) ((data)->features & FEAT_VID)
#define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
#define has_avcc3(data) ((data)->features & FEAT_AVCC3)
#define has_four_pwm(data) ((data)->features & (FEAT_FOUR_PWM | \
FEAT_FIVE_PWM | \
FEAT_SIX_PWM))
#define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM | \
FEAT_SIX_PWM))
#define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
#define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
#define has_four_temp(data) ((data)->features & FEAT_FOUR_TEMP)
#define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
#define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
#define has_conf_noexit(data) ((data)->features & FEAT_CONF_NOEXIT)
#define has_scaling(data) ((data)->features & (FEAT_12MV_ADC | \
FEAT_10_9MV_ADC))
#define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF)
struct it87_sio_data {
int sioaddr;
enum chips type;
/* Values read from Super-I/O config space */
u8 revision;
u8 vid_value;
u8 beep_pin;
u8 internal; /* Internal sensors can be labeled */
bool need_in7_reroute;
/* Features skipped based on config or DMI */
u16 skip_in;
u8 skip_vid;
u8 skip_fan;
u8 skip_pwm;
u8 skip_temp;
u8 smbus_bitmap;
u8 ec_special_config;
};
/*
* For each registered chip, we need to keep some data in memory.
* The structure is dynamically allocated.
*/
struct it87_data {
const struct attribute_group *groups[7];
int sioaddr;
enum chips type;
u32 features;
u8 peci_mask;
u8 old_peci_mask;
u8 smbus_bitmap; /* !=0 if SMBus needs to be disabled */
u8 ec_special_config; /* EC special config register restore value */
unsigned short addr;
const char *name;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u16 in_scaled; /* Internal voltage sensors are scaled */
u16 in_internal; /* Bitfield, internal sensors (for labels) */
u16 has_in; /* Bitfield, voltage sensors enabled */
u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
bool need_in7_reroute;
u8 has_fan; /* Bitfield, fans enabled */
u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
u8 has_temp; /* Bitfield, temp sensors enabled */
s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
bool has_vid; /* True if VID supported */
u8 vid; /* Register encoding, combined */
u8 vrm;
u32 alarms; /* Register encoding, combined */
bool has_beep; /* true if beep supported */
u8 beeps; /* Register encoding */
u8 fan_main_ctrl; /* Register value */
u8 fan_ctl; /* Register value */
/*
* The following 3 arrays correspond to the same registers up to
* the IT8720F. The meaning of bits 6-0 depends on the value of bit
* 7, and we want to preserve settings on mode changes, so we have
* to track all values separately.
* Starting with the IT8721F, the manual PWM duty cycles are stored
* in separate registers (8-bit values), so the separate tracking
* is no longer needed, but it is still done to keep the driver
* simple.
*/
u8 has_pwm; /* Bitfield, pwm control enabled */
u8 pwm_ctrl[NUM_PWM]; /* Register value */
u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
/* Automatic fan speed control registers */
u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
};
/* Board specific settings from DMI matching */
struct it87_dmi_data {
u8 skip_pwm; /* pwm channels to skip for this board */
};
/* Global for results from DMI matching, if needed */
static struct it87_dmi_data *dmi_data;
static int adc_lsb(const struct it87_data *data, int nr)
{
int lsb;
if (has_12mv_adc(data))
lsb = 120;
else if (has_10_9mv_adc(data))
lsb = 109;
else
lsb = 160;
if (data->in_scaled & BIT(nr))
lsb <<= 1;
return lsb;
}
static u8 in_to_reg(const struct it87_data *data, int nr, long val)
{
val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
return clamp_val(val, 0, 255);
}
static int in_from_reg(const struct it87_data *data, int nr, int val)
{
return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
}
static inline u8 FAN_TO_REG(long rpm, int div)
{
if (rpm == 0)
return 255;
rpm = clamp_val(rpm, 1, 1000000);
return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
}
static inline u16 FAN16_TO_REG(long rpm)
{
if (rpm == 0)
return 0xffff;
return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
}
#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
1350000 / ((val) * (div)))
/* The divider is fixed to 2 in 16-bit mode */
#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
1350000 / ((val) * 2))
#define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
((val) + 500) / 1000), -128, 127))
#define TEMP_FROM_REG(val) ((val) * 1000)
static u8 pwm_to_reg(const struct it87_data *data, long val)
{
if (has_newer_autopwm(data))
return val;
else
return val >> 1;
}
static int pwm_from_reg(const struct it87_data *data, u8 reg)
{
if (has_newer_autopwm(data))
return reg;
else
return (reg & 0x7f) << 1;
}
static int DIV_TO_REG(int val)
{
int answer = 0;
while (answer < 7 && (val >>= 1))
answer++;
return answer;
}
#define DIV_FROM_REG(val) BIT(val)
/*
* PWM base frequencies. The frequency has to be divided by either 128 or 256,
* depending on the chip type, to calculate the actual PWM frequency.
*
* Some of the chip datasheets suggest a base frequency of 51 kHz instead
* of 750 kHz for the slowest base frequency, resulting in a PWM frequency
* of 200 Hz. Sometimes both PWM frequency select registers are affected,
* sometimes just one. It is unknown if this is a datasheet error or real,
* so this is ignored for now.
*/
static const unsigned int pwm_freq[8] = {
48000000,
24000000,
12000000,
8000000,
6000000,
3000000,
1500000,
750000,
};
static int smbus_disable(struct it87_data *data)
{
int err;
if (data->smbus_bitmap) {
err = superio_enter(data->sioaddr);
if (err)
return err;
superio_select(data->sioaddr, PME);
superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
data->ec_special_config & ~data->smbus_bitmap);
superio_exit(data->sioaddr, has_conf_noexit(data));
}
return 0;
}
static int smbus_enable(struct it87_data *data)
{
int err;
if (data->smbus_bitmap) {
err = superio_enter(data->sioaddr);
if (err)
return err;
superio_select(data->sioaddr, PME);
superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
data->ec_special_config);
superio_exit(data->sioaddr, has_conf_noexit(data));
}
return 0;
}
/*
* Must be called with data->update_lock held, except during initialization.
* Must be called with SMBus accesses disabled.
* We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
* would slow down the IT87 access and should not be necessary.
*/
static int it87_read_value(struct it87_data *data, u8 reg)
{
outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
return inb_p(data->addr + IT87_DATA_REG_OFFSET);
}
/*
* Must be called with data->update_lock held, except during initialization.
* Must be called with SMBus accesses disabled.
* We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
* would slow down the IT87 access and should not be necessary.
*/
static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
{
outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
}
static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
{
data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
if (has_newer_autopwm(data)) {
data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
data->pwm_duty[nr] = it87_read_value(data,
IT87_REG_PWM_DUTY[nr]);
} else {
if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
else /* Manual mode */
data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
}
if (has_old_autopwm(data)) {
int i;
for (i = 0; i < 5 ; i++)
data->auto_temp[nr][i] = it87_read_value(data,
IT87_REG_AUTO_TEMP(nr, i));
for (i = 0; i < 3 ; i++)
data->auto_pwm[nr][i] = it87_read_value(data,
IT87_REG_AUTO_PWM(nr, i));
} else if (has_newer_autopwm(data)) {
int i;
/*
* 0: temperature hysteresis (base + 5)
* 1: fan off temperature (base + 0)
* 2: fan start temperature (base + 1)
* 3: fan max temperature (base + 2)
*/
data->auto_temp[nr][0] =
it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
for (i = 0; i < 3 ; i++)
data->auto_temp[nr][i + 1] =
it87_read_value(data,
IT87_REG_AUTO_TEMP(nr, i));
/*
* 0: start pwm value (base + 3)
* 1: pwm slope (base + 4, 1/8th pwm)
*/
data->auto_pwm[nr][0] =
it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
data->auto_pwm[nr][1] =
it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
}
}
static int it87_lock(struct it87_data *data)
{
int err;
mutex_lock(&data->update_lock);
err = smbus_disable(data);
if (err)
mutex_unlock(&data->update_lock);
return err;
}
static void it87_unlock(struct it87_data *data)
{
smbus_enable(data);
mutex_unlock(&data->update_lock);
}
static struct it87_data *it87_update_device(struct device *dev)
{
struct it87_data *data = dev_get_drvdata(dev);
struct it87_data *ret = data;
int err;
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
!data->valid) {
err = smbus_disable(data);
if (err) {
ret = ERR_PTR(err);
goto unlock;
}
if (update_vbat) {
/*
* Cleared after each update, so reenable. Value
* returned by this read will be previous value
*/
it87_write_value(data, IT87_REG_CONFIG,
it87_read_value(data, IT87_REG_CONFIG) | 0x40);
}
for (i = 0; i < NUM_VIN; i++) {
if (!(data->has_in & BIT(i)))
continue;
data->in[i][0] =
it87_read_value(data, IT87_REG_VIN[i]);
/* VBAT and AVCC don't have limit registers */
if (i >= NUM_VIN_LIMIT)
continue;
data->in[i][1] =
it87_read_value(data, IT87_REG_VIN_MIN(i));
data->in[i][2] =
it87_read_value(data, IT87_REG_VIN_MAX(i));
}
for (i = 0; i < NUM_FAN; i++) {
/* Skip disabled fans */
if (!(data->has_fan & BIT(i)))
continue;
data->fan[i][1] =
it87_read_value(data, IT87_REG_FAN_MIN[i]);
data->fan[i][0] = it87_read_value(data,
IT87_REG_FAN[i]);
/* Add high byte if in 16-bit mode */
if (has_16bit_fans(data)) {
data->fan[i][0] |= it87_read_value(data,
IT87_REG_FANX[i]) << 8;
data->fan[i][1] |= it87_read_value(data,
IT87_REG_FANX_MIN[i]) << 8;
}
}
for (i = 0; i < NUM_TEMP; i++) {
if (!(data->has_temp & BIT(i)))
continue;
data->temp[i][0] =
it87_read_value(data, IT87_REG_TEMP(i));
if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
data->temp[i][3] =
it87_read_value(data,
IT87_REG_TEMP_OFFSET[i]);
if (i >= NUM_TEMP_LIMIT)
continue;
data->temp[i][1] =
it87_read_value(data, IT87_REG_TEMP_LOW(i));
data->temp[i][2] =
it87_read_value(data, IT87_REG_TEMP_HIGH(i));
}
/* Newer chips don't have clock dividers */
if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
i = it87_read_value(data, IT87_REG_FAN_DIV);
data->fan_div[0] = i & 0x07;
data->fan_div[1] = (i >> 3) & 0x07;
data->fan_div[2] = (i & 0x40) ? 3 : 1;
}
data->alarms =
it87_read_value(data, IT87_REG_ALARM1) |
(it87_read_value(data, IT87_REG_ALARM2) << 8) |
(it87_read_value(data, IT87_REG_ALARM3) << 16);
data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
data->fan_main_ctrl = it87_read_value(data,
IT87_REG_FAN_MAIN_CTRL);
data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
for (i = 0; i < NUM_PWM; i++) {
if (!(data->has_pwm & BIT(i)))
continue;
it87_update_pwm_ctrl(data, i);
}
data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
/*
* The IT8705F does not have VID capability.
* The IT8718F and later don't use IT87_REG_VID for the
* same purpose.
*/
if (data->type == it8712 || data->type == it8716) {
data->vid = it87_read_value(data, IT87_REG_VID);
/*
* The older IT8712F revisions had only 5 VID pins,
* but we assume it is always safe to read 6 bits.
*/
data->vid &= 0x3f;
}
data->last_updated = jiffies;
data->valid = true;
smbus_enable(data);
}
unlock:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t show_in(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct it87_data *data = it87_update_device(dev);
int index = sattr->index;
int nr = sattr->nr;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
}
static ssize_t set_in(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
struct it87_data *data = dev_get_drvdata(dev);
int index = sattr->index;
int nr = sattr->nr;
unsigned long val;
int err;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
data->in[nr][index] = in_to_reg(data, nr, val);
it87_write_value(data,
index == 1 ? IT87_REG_VIN_MIN(nr)
: IT87_REG_VIN_MAX(nr),
data->in[nr][index]);
it87_unlock(data);
return count;
}
static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
0, 1);
static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
0, 2);
static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1, 1);
static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1, 2);
static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
2, 1);
static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
2, 2);
static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
3, 1);
static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
3, 2);
static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
4, 1);
static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
4, 2);
static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
5, 1);
static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
5, 2);
static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
6, 1);
static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
6, 2);
static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
7, 1);
static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
7, 2);
static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
/* Up to 6 temperatures */
static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
struct it87_data *data = it87_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
}
static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
struct it87_data *data = dev_get_drvdata(dev);
long val;
u8 reg, regval;
int err;
if (kstrtol(buf, 10, &val) < 0)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
switch (index) {
default:
case 1:
reg = IT87_REG_TEMP_LOW(nr);
break;
case 2:
reg = IT87_REG_TEMP_HIGH(nr);
break;
case 3:
regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
if (!(regval & 0x80)) {
regval |= 0x80;
it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
}
data->valid = false;
reg = IT87_REG_TEMP_OFFSET[nr];
break;
}
data->temp[nr][index] = TEMP_TO_REG(val);
it87_write_value(data, reg, data->temp[nr][index]);
it87_unlock(data);
return count;
}
static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
0, 1);
static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
0, 2);
static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
set_temp, 0, 3);
static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1, 1);
static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1, 2);
static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
set_temp, 1, 3);
static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
2, 1);
static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
2, 2);
static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
set_temp, 2, 3);
static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
static int get_temp_type(struct it87_data *data, int index)
{
/*
* 2 is deprecated;
* 3 = thermal diode;
* 4 = thermistor;
* 5 = AMDTSI;
* 6 = Intel PECI;
* 0 = disabled
*/
u8 reg, extra;
int ttype, type = 0;
/* Detect PECI vs. AMDTSI */
ttype = 6;
if ((has_temp_peci(data, index)) || data->type == it8721 ||
data->type == it8720) {
extra = it87_read_value(data, IT87_REG_IFSEL);
if ((extra & 0x70) == 0x40)
ttype = 5;
}
reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
/* Per chip special detection */
switch (data->type) {
case it8622:
if (!(reg & 0xc0) && index == 3)
type = ttype;
break;
default:
break;
}
if (type || index >= 3)
return type;
extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
(has_temp_old_peci(data, index) && (extra & 0x80)))
type = ttype; /* Intel PECI or AMDTSI */
else if (reg & BIT(index))
type = 3; /* thermal diode */
else if (reg & BIT(index + 3))
type = 4; /* thermistor */
return type;
}
static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = it87_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", get_temp_type(data, sensor_attr->index));
}
static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
struct it87_data *data = dev_get_drvdata(dev);
long val;
u8 reg, extra;
int err;
if (kstrtol(buf, 10, &val) < 0)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
reg &= ~(1 << nr);
reg &= ~(8 << nr);
if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
reg &= 0x3f;
extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
extra &= 0x7f;
if (val == 2) { /* backwards compatibility */
dev_warn(dev,
"Sensor type 2 is deprecated, please use 4 instead\n");
val = 4;
}
/* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
if (val == 3)
reg |= 1 << nr;
else if (val == 4)
reg |= 8 << nr;
else if (has_temp_peci(data, nr) && val == 6)
reg |= (nr + 1) << 6;
else if (has_temp_old_peci(data, nr) && val == 6)
extra |= 0x80;
else if (val != 0) {
count = -EINVAL;
goto unlock;
}
data->sensor = reg;
data->extra = extra;
it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
if (has_temp_old_peci(data, nr))
it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
data->valid = false; /* Force cache refresh */
unlock:
it87_unlock(data);
return count;
}
static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
set_temp_type, 0);
static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
set_temp_type, 1);
static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
set_temp_type, 2);
/* 6 Fans */
static int pwm_mode(const struct it87_data *data, int nr)
{
if (has_fanctl_onoff(data) && nr < 3 &&
!(data->fan_main_ctrl & BIT(nr)))
return 0; /* Full speed */
if (data->pwm_ctrl[nr] & 0x80)
return 2; /* Automatic mode */
if ((!has_fanctl_onoff(data) || nr >= 3) &&
data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
return 0; /* Full speed */
return 1; /* Manual mode */
}
static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
int speed;
struct it87_data *data = it87_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
speed = has_16bit_fans(data) ?
FAN16_FROM_REG(data->fan[nr][index]) :
FAN_FROM_REG(data->fan[nr][index],
DIV_FROM_REG(data->fan_div[nr]));
return sprintf(buf, "%d\n", speed);
}
static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = it87_update_device(dev);
int nr = sensor_attr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
}
static ssize_t show_pwm_enable(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = it87_update_device(dev);
int nr = sensor_attr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", pwm_mode(data, nr));
}
static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = it87_update_device(dev);
int nr = sensor_attr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
pwm_from_reg(data, data->pwm_duty[nr]));
}
static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = it87_update_device(dev);
int nr = sensor_attr->index;
unsigned int freq;
int index;
if (IS_ERR(data))
return PTR_ERR(data);
if (has_pwm_freq2(data) && nr == 1)
index = (data->extra >> 4) & 0x07;
else
index = (data->fan_ctl >> 4) & 0x07;
freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
return sprintf(buf, "%u\n", freq);
}
static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
int nr = sattr->nr;
int index = sattr->index;
struct it87_data *data = dev_get_drvdata(dev);
long val;
int err;
u8 reg;
if (kstrtol(buf, 10, &val) < 0)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
if (has_16bit_fans(data)) {
data->fan[nr][index] = FAN16_TO_REG(val);
it87_write_value(data, IT87_REG_FAN_MIN[nr],
data->fan[nr][index] & 0xff);
it87_write_value(data, IT87_REG_FANX_MIN[nr],
data->fan[nr][index] >> 8);
} else {
reg = it87_read_value(data, IT87_REG_FAN_DIV);
switch (nr) {
case 0:
data->fan_div[nr] = reg & 0x07;
break;
case 1:
data->fan_div[nr] = (reg >> 3) & 0x07;
break;
case 2:
data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
break;
}
data->fan[nr][index] =
FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
it87_write_value(data, IT87_REG_FAN_MIN[nr],
data->fan[nr][index]);
}
it87_unlock(data);
return count;
}
static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = dev_get_drvdata(dev);
int nr = sensor_attr->index;
unsigned long val;
int min, err;
u8 old;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
old = it87_read_value(data, IT87_REG_FAN_DIV);
/* Save fan min limit */
min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
switch (nr) {
case 0:
case 1:
data->fan_div[nr] = DIV_TO_REG(val);
break;
case 2:
if (val < 8)
data->fan_div[nr] = 1;
else
data->fan_div[nr] = 3;
}
val = old & 0x80;
val |= (data->fan_div[0] & 0x07);
val |= (data->fan_div[1] & 0x07) << 3;
if (data->fan_div[2] == 3)
val |= 0x1 << 6;
it87_write_value(data, IT87_REG_FAN_DIV, val);
/* Restore fan min limit */
data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
it87_unlock(data);
return count;
}
/* Returns 0 if OK, -EINVAL otherwise */
static int check_trip_points(struct device *dev, int nr)
{
const struct it87_data *data = dev_get_drvdata(dev);
int i, err = 0;
if (has_old_autopwm(data)) {
for (i = 0; i < 3; i++) {
if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
err = -EINVAL;
}
for (i = 0; i < 2; i++) {
if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
err = -EINVAL;
}
} else if (has_newer_autopwm(data)) {
for (i = 1; i < 3; i++) {
if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
err = -EINVAL;
}
}
if (err) {
dev_err(dev,
"Inconsistent trip points, not switching to automatic mode\n");
dev_err(dev, "Adjust the trip points and try again\n");
}
return err;
}
static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = dev_get_drvdata(dev);
int nr = sensor_attr->index;
long val;
int err;
if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
return -EINVAL;
/* Check trip points before switching to automatic mode */
if (val == 2) {
if (check_trip_points(dev, nr) < 0)
return -EINVAL;
}
err = it87_lock(data);
if (err)
return err;
if (val == 0) {
if (nr < 3 && has_fanctl_onoff(data)) {
int tmp;
/* make sure the fan is on when in on/off mode */
tmp = it87_read_value(data, IT87_REG_FAN_CTL);
it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
/* set on/off mode */
data->fan_main_ctrl &= ~BIT(nr);
it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
data->fan_main_ctrl);
} else {
u8 ctrl;
/* No on/off mode, set maximum pwm value */
data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
it87_write_value(data, IT87_REG_PWM_DUTY[nr],
data->pwm_duty[nr]);
/* and set manual mode */
if (has_newer_autopwm(data)) {
ctrl = (data->pwm_ctrl[nr] & 0x7c) |
data->pwm_temp_map[nr];
} else {
ctrl = data->pwm_duty[nr];
}
data->pwm_ctrl[nr] = ctrl;
it87_write_value(data, IT87_REG_PWM[nr], ctrl);
}
} else {
u8 ctrl;
if (has_newer_autopwm(data)) {
ctrl = (data->pwm_ctrl[nr] & 0x7c) |
data->pwm_temp_map[nr];
if (val != 1)
ctrl |= 0x80;
} else {
ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
}
data->pwm_ctrl[nr] = ctrl;
it87_write_value(data, IT87_REG_PWM[nr], ctrl);
if (has_fanctl_onoff(data) && nr < 3) {
/* set SmartGuardian mode */
data->fan_main_ctrl |= BIT(nr);
it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
data->fan_main_ctrl);
}
}
it87_unlock(data);
return count;
}
static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = dev_get_drvdata(dev);
int nr = sensor_attr->index;
long val;
int err;
if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
it87_update_pwm_ctrl(data, nr);
if (has_newer_autopwm(data)) {
/*
* If we are in automatic mode, the PWM duty cycle register
* is read-only so we can't write the value.
*/
if (data->pwm_ctrl[nr] & 0x80) {
count = -EBUSY;
goto unlock;
}
data->pwm_duty[nr] = pwm_to_reg(data, val);
it87_write_value(data, IT87_REG_PWM_DUTY[nr],
data->pwm_duty[nr]);
} else {
data->pwm_duty[nr] = pwm_to_reg(data, val);
/*
* If we are in manual mode, write the duty cycle immediately;
* otherwise, just store it for later use.
*/
if (!(data->pwm_ctrl[nr] & 0x80)) {
data->pwm_ctrl[nr] = data->pwm_duty[nr];
it87_write_value(data, IT87_REG_PWM[nr],
data->pwm_ctrl[nr]);
}
}
unlock:
it87_unlock(data);
return count;
}
static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = dev_get_drvdata(dev);
int nr = sensor_attr->index;
unsigned long val;
int err;
int i;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
val = clamp_val(val, 0, 1000000);
val *= has_newer_autopwm(data) ? 256 : 128;
/* Search for the nearest available frequency */
for (i = 0; i < 7; i++) {
if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
break;
}
err = it87_lock(data);
if (err)
return err;
if (nr == 0) {
data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
data->fan_ctl |= i << 4;
it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
} else {
data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
data->extra |= i << 4;
it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
}
it87_unlock(data);
return count;
}
static ssize_t show_pwm_temp_map(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = it87_update_device(dev);
int nr = sensor_attr->index;
int map;
if (IS_ERR(data))
return PTR_ERR(data);
map = data->pwm_temp_map[nr];
if (map >= 3)
map = 0; /* Should never happen */
if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
map += 3;
return sprintf(buf, "%d\n", (int)BIT(map));
}
static ssize_t set_pwm_temp_map(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
struct it87_data *data = dev_get_drvdata(dev);
int nr = sensor_attr->index;
long val;
int err;
u8 reg;
if (kstrtol(buf, 10, &val) < 0)
return -EINVAL;
if (nr >= 3)
val -= 3;
switch (val) {
case BIT(0):
reg = 0x00;
break;
case BIT(1):
reg = 0x01;
break;
case BIT(2):
reg = 0x02;
break;
default:
return -EINVAL;
}
err = it87_lock(data);
if (err)
return err;
it87_update_pwm_ctrl(data, nr);
data->pwm_temp_map[nr] = reg;
/*
* If we are in automatic mode, write the temp mapping immediately;
* otherwise, just store it for later use.
*/
if (data->pwm_ctrl[nr] & 0x80) {
data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
data->pwm_temp_map[nr];
it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
}
it87_unlock(data);
return count;
}
static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct it87_data *data = it87_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int point = sensor_attr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n",
pwm_from_reg(data, data->auto_pwm[nr][point]));
}
static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct it87_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int point = sensor_attr->index;
int regaddr;
long val;
int err;
if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
data->auto_pwm[nr][point] = pwm_to_reg(data, val);
if (has_newer_autopwm(data))
regaddr = IT87_REG_AUTO_TEMP(nr, 3);
else
regaddr = IT87_REG_AUTO_PWM(nr, point);
it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
it87_unlock(data);
return count;
}
static ssize_t show_auto_pwm_slope(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct it87_data *data = it87_update_device(dev);
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
}
static ssize_t set_auto_pwm_slope(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct it87_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
int nr = sensor_attr->index;
unsigned long val;
int err;
if (kstrtoul(buf, 10, &val) < 0 || val > 127)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
data->auto_pwm[nr][1]);
it87_unlock(data);
return count;
}
static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct it87_data *data = it87_update_device(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int point = sensor_attr->index;
int reg;
if (IS_ERR(data))
return PTR_ERR(data);
if (has_old_autopwm(data) || point)
reg = data->auto_temp[nr][point];
else
reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
}
static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct it87_data *data = dev_get_drvdata(dev);
struct sensor_device_attribute_2 *sensor_attr =
to_sensor_dev_attr_2(attr);
int nr = sensor_attr->nr;
int point = sensor_attr->index;
long val;
int reg;
int err;
if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
if (has_newer_autopwm(data) && !point) {
reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
data->auto_temp[nr][0] = reg;
it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
} else {
reg = TEMP_TO_REG(val);
data->auto_temp[nr][point] = reg;
if (has_newer_autopwm(data))
point--;
it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
}
it87_unlock(data);
return count;
}
static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
0, 1);
static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
set_fan_div, 0);
static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1, 1);
static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
set_fan_div, 1);
static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2, 1);
static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
set_fan_div, 2);
static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
3, 1);
static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
4, 1);
static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
5, 1);
static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 0);
static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
set_pwm_freq, 0);
static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
show_pwm_temp_map, set_pwm_temp_map, 0);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 0, 0);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 0, 1);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 0, 2);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
show_auto_pwm, NULL, 0, 3);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 0, 1);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 0, 0);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 0, 2);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 0, 3);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 0, 4);
static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 0, 0);
static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
show_auto_pwm_slope, set_auto_pwm_slope, 0);
static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 1);
static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
show_pwm_temp_map, set_pwm_temp_map, 1);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 1, 0);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 1, 1);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 1, 2);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
show_auto_pwm, NULL, 1, 3);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 1, 1);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 1, 0);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 1, 2);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 1, 3);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 1, 4);
static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 1, 0);
static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
show_auto_pwm_slope, set_auto_pwm_slope, 1);
static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 2);
static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
show_pwm_temp_map, set_pwm_temp_map, 2);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 2, 0);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 2, 1);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 2, 2);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
show_auto_pwm, NULL, 2, 3);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 1);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 0);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 2);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 3);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 4);
static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 2, 0);
static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
show_auto_pwm_slope, set_auto_pwm_slope, 2);
static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 3);
static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
show_pwm_temp_map, set_pwm_temp_map, 3);
static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 1);
static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 0);
static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 2);
static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 3);
static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 3, 0);
static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
show_auto_pwm_slope, set_auto_pwm_slope, 3);
static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 4);
static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
show_pwm_temp_map, set_pwm_temp_map, 4);
static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 1);
static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 0);
static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 2);
static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 3);
static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 4, 0);
static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
show_auto_pwm_slope, set_auto_pwm_slope, 4);
static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 5);
static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
show_pwm_temp_map, set_pwm_temp_map, 5);
static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 1);
static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 0);
static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 2);
static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
show_auto_temp, set_auto_temp, 2, 3);
static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
show_auto_pwm, set_auto_pwm, 5, 0);
static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
show_auto_pwm_slope, set_auto_pwm_slope, 5);
/* Alarms */
static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct it87_data *data = it87_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", data->alarms);
}
static DEVICE_ATTR_RO(alarms);
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct it87_data *data = it87_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static ssize_t clear_intrusion(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct it87_data *data = dev_get_drvdata(dev);
int err, config;
long val;
if (kstrtol(buf, 10, &val) < 0 || val != 0)
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
config = it87_read_value(data, IT87_REG_CONFIG);
if (config < 0) {
count = config;
} else {
config |= BIT(5);
it87_write_value(data, IT87_REG_CONFIG, config);
/* Invalidate cache to force re-read */
data->valid = false;
}
it87_unlock(data);
return count;
}
static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
show_alarm, clear_intrusion, 4);
static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct it87_data *data = it87_update_device(dev);
int bitnr = to_sensor_dev_attr(attr)->index;
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
}
static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct it87_data *data = dev_get_drvdata(dev);
long val;
int err;
if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
return -EINVAL;
err = it87_lock(data);
if (err)
return err;
data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
if (val)
data->beeps |= BIT(bitnr);
else
data->beeps &= ~BIT(bitnr);
it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
it87_unlock(data);
return count;
}
static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
show_beep, set_beep, 1);
static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
/* fanX_beep writability is set later */
static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
show_beep, set_beep, 2);
static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct it87_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%u\n", data->vrm);
}
static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct it87_data *data = dev_get_drvdata(dev);
unsigned long val;
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
data->vrm = val;
return count;
}
static DEVICE_ATTR_RW(vrm);
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct it87_data *data = it87_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t show_label(struct device *dev, struct device_attribute *attr,
char *buf)
{
static const char * const labels[] = {
"+5V",
"5VSB",
"Vbat",
"AVCC",
};
static const char * const labels_it8721[] = {
"+3.3V",
"3VSB",
"Vbat",
"+3.3V",
};
struct it87_data *data = dev_get_drvdata(dev);
int nr = to_sensor_dev_attr(attr)->index;
const char *label;
if (has_vin3_5v(data) && nr == 0)
label = labels[0];
else if (has_scaling(data))
label = labels_it8721[nr];
else
label = labels[nr];
return sprintf(buf, "%s\n", label);
}
static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
/* AVCC3 */
static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
static umode_t it87_in_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct it87_data *data = dev_get_drvdata(dev);
int i = index / 5; /* voltage index */
int a = index % 5; /* attribute index */
if (index >= 40) { /* in8 and higher only have input attributes */
i = index - 40 + 8;
a = 0;
}
if (!(data->has_in & BIT(i)))
return 0;
if (a == 4 && !data->has_beep)
return 0;
return attr->mode;
}
static struct attribute *it87_attributes_in[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
&sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_min.dev_attr.attr,
&sensor_dev_attr_in7_max.dev_attr.attr,
&sensor_dev_attr_in7_alarm.dev_attr.attr,
&sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
&sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
&sensor_dev_attr_in9_input.dev_attr.attr,
&sensor_dev_attr_in10_input.dev_attr.attr,
&sensor_dev_attr_in11_input.dev_attr.attr,
&sensor_dev_attr_in12_input.dev_attr.attr,
NULL
};
static const struct attribute_group it87_group_in = {
.attrs = it87_attributes_in,
.is_visible = it87_in_is_visible,
};
static umode_t it87_temp_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct it87_data *data = dev_get_drvdata(dev);
int i = index / 7; /* temperature index */
int a = index % 7; /* attribute index */
if (index >= 21) {
i = index - 21 + 3;
a = 0;
}
if (!(data->has_temp & BIT(i)))
return 0;
if (a == 3) {
if (get_temp_type(data, i) == 0)
return 0;
return attr->mode;
}
if (a == 5 && !has_temp_offset(data))
return 0;
if (a == 6 && !data->has_beep)
return 0;
return attr->mode;
}
static struct attribute *it87_attributes_temp[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_type.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
&sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
&sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_type.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp2_beep.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_type.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
&sensor_dev_attr_temp3_beep.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
&sensor_dev_attr_temp5_input.dev_attr.attr,
&sensor_dev_attr_temp6_input.dev_attr.attr,
NULL
};
static const struct attribute_group it87_group_temp = {
.attrs = it87_attributes_temp,
.is_visible = it87_temp_is_visible,
};
static umode_t it87_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct it87_data *data = dev_get_drvdata(dev);
if ((index == 2 || index == 3) && !data->has_vid)
return 0;
if (index > 3 && !(data->in_internal & BIT(index - 4)))
return 0;
return attr->mode;
}
static struct attribute *it87_attributes[] = {
&dev_attr_alarms.attr,
&sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
&dev_attr_vrm.attr, /* 2 */
&dev_attr_cpu0_vid.attr, /* 3 */
&sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
&sensor_dev_attr_in7_label.dev_attr.attr,
&sensor_dev_attr_in8_label.dev_attr.attr,
&sensor_dev_attr_in9_label.dev_attr.attr,
NULL
};
static const struct attribute_group it87_group = {
.attrs = it87_attributes,
.is_visible = it87_is_visible,
};
static umode_t it87_fan_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct it87_data *data = dev_get_drvdata(dev);
int i = index / 5; /* fan index */
int a = index % 5; /* attribute index */
if (index >= 15) { /* fan 4..6 don't have divisor attributes */
i = (index - 15) / 4 + 3;
a = (index - 15) % 4;
}
if (!(data->has_fan & BIT(i)))
return 0;
if (a == 3) { /* beep */
if (!data->has_beep)
return 0;
/* first fan beep attribute is writable */
if (i == __ffs(data->has_fan))
return attr->mode | S_IWUSR;
}
if (a == 4 && has_16bit_fans(data)) /* divisor */
return 0;
return attr->mode;
}
static struct attribute *it87_attributes_fan[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
&sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_beep.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_beep.dev_attr.attr,
&sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
&sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan4_alarm.dev_attr.attr,
&sensor_dev_attr_fan4_beep.dev_attr.attr,
&sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
&sensor_dev_attr_fan5_min.dev_attr.attr,
&sensor_dev_attr_fan5_alarm.dev_attr.attr,
&sensor_dev_attr_fan5_beep.dev_attr.attr,
&sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
&sensor_dev_attr_fan6_min.dev_attr.attr,
&sensor_dev_attr_fan6_alarm.dev_attr.attr,
&sensor_dev_attr_fan6_beep.dev_attr.attr,
NULL
};
static const struct attribute_group it87_group_fan = {
.attrs = it87_attributes_fan,
.is_visible = it87_fan_is_visible,
};
static umode_t it87_pwm_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct it87_data *data = dev_get_drvdata(dev);
int i = index / 4; /* pwm index */
int a = index % 4; /* attribute index */
if (!(data->has_pwm & BIT(i)))
return 0;
/* pwmX_auto_channels_temp is only writable if auto pwm is supported */
if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
return attr->mode | S_IWUSR;
/* pwm2_freq is writable if there are two pwm frequency selects */
if (has_pwm_freq2(data) && i == 1 && a == 2)
return attr->mode | S_IWUSR;
return attr->mode;
}
static struct attribute *it87_attributes_pwm[] = {
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm4_enable.dev_attr.attr,
&sensor_dev_attr_pwm4.dev_attr.attr,
&sensor_dev_attr_pwm4_freq.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm5_enable.dev_attr.attr,
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm5_freq.dev_attr.attr,
&sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm6_enable.dev_attr.attr,
&sensor_dev_attr_pwm6.dev_attr.attr,
&sensor_dev_attr_pwm6_freq.dev_attr.attr,
&sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
NULL
};
static const struct attribute_group it87_group_pwm = {
.attrs = it87_attributes_pwm,
.is_visible = it87_pwm_is_visible,
};
static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct it87_data *data = dev_get_drvdata(dev);
int i = index / 11; /* pwm index */
int a = index % 11; /* attribute index */
if (index >= 33) { /* pwm 4..6 */
i = (index - 33) / 6 + 3;
a = (index - 33) % 6 + 4;
}
if (!(data->has_pwm & BIT(i)))
return 0;
if (has_newer_autopwm(data)) {
if (a < 4) /* no auto point pwm */
return 0;
if (a == 8) /* no auto_point4 */
return 0;
}
if (has_old_autopwm(data)) {
if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
return 0;
}
return attr->mode;
}
static struct attribute *it87_attributes_auto_pwm[] = {
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
&sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
&sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
&sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
&sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
&sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
&sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
&sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
NULL,
};
static const struct attribute_group it87_group_auto_pwm = {
.attrs = it87_attributes_auto_pwm,
.is_visible = it87_auto_pwm_is_visible,
};
/* SuperIO detection - will change isa_address if a chip is found */
static int __init it87_find(int sioaddr, unsigned short *address,
struct it87_sio_data *sio_data, int chip_cnt)
{
int err;
u16 chip_type;
const struct it87_devices *config = NULL;
err = superio_enter(sioaddr);
if (err)
return err;
err = -ENODEV;
chip_type = superio_inw(sioaddr, DEVID);
/* check first for a valid chip before forcing chip id */
if (chip_type == 0xffff)
goto exit;
if (force_id_cnt == 1) {
/* If only one value given use for all chips */
if (force_id[0])
chip_type = force_id[0];
} else if (force_id[chip_cnt])
chip_type = force_id[chip_cnt];
switch (chip_type) {
case IT8705F_DEVID:
sio_data->type = it87;
break;
case IT8712F_DEVID:
sio_data->type = it8712;
break;
case IT8716F_DEVID:
case IT8726F_DEVID:
sio_data->type = it8716;
break;
case IT8718F_DEVID:
sio_data->type = it8718;
break;
case IT8720F_DEVID:
sio_data->type = it8720;
break;
case IT8721F_DEVID:
sio_data->type = it8721;
break;
case IT8728F_DEVID:
sio_data->type = it8728;
break;
case IT8732F_DEVID:
sio_data->type = it8732;
break;
case IT8792E_DEVID:
sio_data->type = it8792;
break;
case IT8771E_DEVID:
sio_data->type = it8771;
break;
case IT8772E_DEVID:
sio_data->type = it8772;
break;
case IT8781F_DEVID:
sio_data->type = it8781;
break;
case IT8782F_DEVID:
sio_data->type = it8782;
break;
case IT8783E_DEVID:
sio_data->type = it8783;
break;
case IT8786E_DEVID:
sio_data->type = it8786;
break;
case IT8790E_DEVID:
sio_data->type = it8790;
break;
case IT8603E_DEVID:
case IT8623E_DEVID:
sio_data->type = it8603;
break;
case IT8620E_DEVID:
sio_data->type = it8620;
break;
case IT8622E_DEVID:
sio_data->type = it8622;
break;
case IT8628E_DEVID:
sio_data->type = it8628;
break;
case IT87952E_DEVID:
sio_data->type = it87952;
break;
case 0xffff: /* No device at all */
goto exit;
default:
pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
goto exit;
}
config = &it87_devices[sio_data->type];
superio_select(sioaddr, PME);
if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
pr_info("Device (chip %s ioreg 0x%x) not activated, skipping\n",
config->model, sioaddr);
goto exit;
}
*address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
if (*address == 0) {
pr_info("Base address not set (chip %s ioreg 0x%x), skipping\n",
config->model, sioaddr);
goto exit;
}
err = 0;
sio_data->sioaddr = sioaddr;
sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
pr_info("Found %s chip at 0x%x, revision %d\n",
it87_devices[sio_data->type].model,
*address, sio_data->revision);
/* in7 (VSB or VCCH5V) is always internal on some chips */
if (has_in7_internal(config))
sio_data->internal |= BIT(1);
/* in8 (Vbat) is always internal */
sio_data->internal |= BIT(2);
/* in9 (AVCC3), always internal if supported */
if (has_avcc3(config))
sio_data->internal |= BIT(3); /* in9 is AVCC */
else
sio_data->skip_in |= BIT(9);
if (!has_four_pwm(config))
sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
else if (!has_five_pwm(config))
sio_data->skip_pwm |= BIT(4) | BIT(5);
else if (!has_six_pwm(config))
sio_data->skip_pwm |= BIT(5);
if (!has_vid(config))
sio_data->skip_vid = 1;
/* Read GPIO config and VID value from LDN 7 (GPIO) */
if (sio_data->type == it87) {
/* The IT8705F has a different LD number for GPIO */
superio_select(sioaddr, 5);
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else if (sio_data->type == it8783) {
int reg25, reg27, reg2a, reg2c, regef;
superio_select(sioaddr, GPIO);
reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
/* Check if fan3 is there or not */
if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
sio_data->skip_fan |= BIT(2);
if ((reg25 & BIT(4)) ||
(!(reg2a & BIT(1)) && (regef & BIT(0))))
sio_data->skip_pwm |= BIT(2);
/* Check if fan2 is there or not */
if (reg27 & BIT(7))
sio_data->skip_fan |= BIT(1);
if (reg27 & BIT(3))
sio_data->skip_pwm |= BIT(1);
/* VIN5 */
if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
sio_data->skip_in |= BIT(5); /* No VIN5 */
/* VIN6 */
if (reg27 & BIT(1))
sio_data->skip_in |= BIT(6); /* No VIN6 */
/*
* VIN7
* Does not depend on bit 2 of Reg2C, contrary to datasheet.
*/
if (reg27 & BIT(2)) {
/*
* The data sheet is a bit unclear regarding the
* internal voltage divider for VCCH5V. It says
* "This bit enables and switches VIN7 (pin 91) to the
* internal voltage divider for VCCH5V".
* This is different to other chips, where the internal
* voltage divider would connect VIN7 to an internal
* voltage source. Maybe that is the case here as well.
*
* Since we don't know for sure, re-route it if that is
* not the case, and ask the user to report if the
* resulting voltage is sane.
*/
if (!(reg2c & BIT(1))) {
reg2c |= BIT(1);
superio_outb(sioaddr, IT87_SIO_PINX2_REG,
reg2c);
sio_data->need_in7_reroute = true;
pr_notice("Routing internal VCCH5V to in7.\n");
}
pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
pr_notice("Please report if it displays a reasonable voltage.\n");
}
if (reg2c & BIT(0))
sio_data->internal |= BIT(0);
if (reg2c & BIT(1))
sio_data->internal |= BIT(1);
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else if (sio_data->type == it8603) {
int reg27, reg29;
superio_select(sioaddr, GPIO);
reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
/* Check if fan3 is there or not */
if (reg27 & BIT(6))
sio_data->skip_pwm |= BIT(2);
if (reg27 & BIT(7))
sio_data->skip_fan |= BIT(2);
/* Check if fan2 is there or not */
reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
if (reg29 & BIT(1))
sio_data->skip_pwm |= BIT(1);
if (reg29 & BIT(2))
sio_data->skip_fan |= BIT(1);
sio_data->skip_in |= BIT(5); /* No VIN5 */
sio_data->skip_in |= BIT(6); /* No VIN6 */
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else if (sio_data->type == it8620 || sio_data->type == it8628) {
int reg;
superio_select(sioaddr, GPIO);
/* Check for pwm5 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
if (reg & BIT(6))
sio_data->skip_pwm |= BIT(4);
/* Check for fan4, fan5 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
if (!(reg & BIT(5)))
sio_data->skip_fan |= BIT(3);
if (!(reg & BIT(4)))
sio_data->skip_fan |= BIT(4);
/* Check for pwm3, fan3 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
if (reg & BIT(6))
sio_data->skip_pwm |= BIT(2);
if (reg & BIT(7))
sio_data->skip_fan |= BIT(2);
/* Check for pwm4 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
if (reg & BIT(2))
sio_data->skip_pwm |= BIT(3);
/* Check for pwm2, fan2 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
if (reg & BIT(1))
sio_data->skip_pwm |= BIT(1);
if (reg & BIT(2))
sio_data->skip_fan |= BIT(1);
/* Check for pwm6, fan6 */
if (!(reg & BIT(7))) {
sio_data->skip_pwm |= BIT(5);
sio_data->skip_fan |= BIT(5);
}
/* Check if AVCC is on VIN3 */
reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
if (reg & BIT(0))
sio_data->internal |= BIT(0);
else
sio_data->skip_in |= BIT(9);
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else if (sio_data->type == it8622) {
int reg;
superio_select(sioaddr, GPIO);
/* Check for pwm4, fan4 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
if (reg & BIT(6))
sio_data->skip_fan |= BIT(3);
if (reg & BIT(5))
sio_data->skip_pwm |= BIT(3);
/* Check for pwm3, fan3, pwm5, fan5 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
if (reg & BIT(6))
sio_data->skip_pwm |= BIT(2);
if (reg & BIT(7))
sio_data->skip_fan |= BIT(2);
if (reg & BIT(3))
sio_data->skip_pwm |= BIT(4);
if (reg & BIT(1))
sio_data->skip_fan |= BIT(4);
/* Check for pwm2, fan2 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
if (reg & BIT(1))
sio_data->skip_pwm |= BIT(1);
if (reg & BIT(2))
sio_data->skip_fan |= BIT(1);
/* Check for AVCC */
reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
if (!(reg & BIT(0)))
sio_data->skip_in |= BIT(9);
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else if (sio_data->type == it8732) {
int reg;
superio_select(sioaddr, GPIO);
/* Check for pwm2, fan2 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
if (reg & BIT(1))
sio_data->skip_pwm |= BIT(1);
if (reg & BIT(2))
sio_data->skip_fan |= BIT(1);
/* Check for pwm3, fan3, fan4 */
reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
if (reg & BIT(6))
sio_data->skip_pwm |= BIT(2);
if (reg & BIT(7))
sio_data->skip_fan |= BIT(2);
if (reg & BIT(5))
sio_data->skip_fan |= BIT(3);
/* Check if AVCC is on VIN3 */
reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
if (reg & BIT(0))
sio_data->internal |= BIT(0);
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else {
int reg;
bool uart6;
superio_select(sioaddr, GPIO);
/* Check for fan4, fan5 */
if (has_five_fans(config)) {
reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
switch (sio_data->type) {
case it8718:
if (reg & BIT(5))
sio_data->skip_fan |= BIT(3);
if (reg & BIT(4))
sio_data->skip_fan |= BIT(4);
break;
case it8720:
case it8721:
case it8728:
if (!(reg & BIT(5)))
sio_data->skip_fan |= BIT(3);
if (!(reg & BIT(4)))
sio_data->skip_fan |= BIT(4);
break;
default:
break;
}
}
reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
if (!sio_data->skip_vid) {
/* We need at least 4 VID pins */
if (reg & 0x0f) {
pr_info("VID is disabled (pins used for GPIO)\n");
sio_data->skip_vid = 1;
}
}
/* Check if fan3 is there or not */
if (reg & BIT(6))
sio_data->skip_pwm |= BIT(2);
if (reg & BIT(7))
sio_data->skip_fan |= BIT(2);
/* Check if fan2 is there or not */
reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
if (reg & BIT(1))
sio_data->skip_pwm |= BIT(1);
if (reg & BIT(2))
sio_data->skip_fan |= BIT(1);
if ((sio_data->type == it8718 || sio_data->type == it8720) &&
!(sio_data->skip_vid))
sio_data->vid_value = superio_inb(sioaddr,
IT87_SIO_VID_REG);
reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
uart6 = sio_data->type == it8782 && (reg & BIT(2));
/*
* The IT8720F has no VIN7 pin, so VCCH5V should always be
* routed internally to VIN7 with an internal divider.
* Curiously, there still is a configuration bit to control
* this, which means it can be set incorrectly. And even
* more curiously, many boards out there are improperly
* configured, even though the IT8720F datasheet claims
* that the internal routing of VCCH5V to VIN7 is the default
* setting. So we force the internal routing in this case.
*
* On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
* If UART6 is enabled, re-route VIN7 to the internal divider
* if that is not already the case.
*/
if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
reg |= BIT(1);
superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
sio_data->need_in7_reroute = true;
pr_notice("Routing internal VCCH5V to in7\n");
}
if (reg & BIT(0))
sio_data->internal |= BIT(0);
if (reg & BIT(1))
sio_data->internal |= BIT(1);
/*
* On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
* While VIN7 can be routed to the internal voltage divider,
* VIN5 and VIN6 are not available if UART6 is enabled.
*
* Also, temp3 is not available if UART6 is enabled and TEMPIN3
* is the temperature source. Since we can not read the
* temperature source here, skip_temp is preliminary.
*/
if (uart6) {
sio_data->skip_in |= BIT(5) | BIT(6);
sio_data->skip_temp |= BIT(2);
}
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
}
if (sio_data->beep_pin)
pr_info("Beeping is supported\n");
/* Set values based on DMI matches */
if (dmi_data)
sio_data->skip_pwm |= dmi_data->skip_pwm;
if (config->smbus_bitmap) {
u8 reg;
superio_select(sioaddr, PME);
reg = superio_inb(sioaddr, IT87_SPECIAL_CFG_REG);
sio_data->ec_special_config = reg;
sio_data->smbus_bitmap = reg & config->smbus_bitmap;
}
exit:
superio_exit(sioaddr, config ? has_conf_noexit(config) : false);
return err;
}
/*
* Some chips seem to have default value 0xff for all limit
* registers. For low voltage limits it makes no sense and triggers
* alarms, so change to 0 instead. For high temperature limits, it
* means -1 degree C, which surprisingly doesn't trigger an alarm,
* but is still confusing, so change to 127 degrees C.
*/
static void it87_check_limit_regs(struct it87_data *data)
{
int i, reg;
for (i = 0; i < NUM_VIN_LIMIT; i++) {
reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
if (reg == 0xff)
it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
}
for (i = 0; i < NUM_TEMP_LIMIT; i++) {
reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
if (reg == 0xff)
it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
}
}
/* Check if voltage monitors are reset manually or by some reason */
static void it87_check_voltage_monitors_reset(struct it87_data *data)
{
int reg;
reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
if ((reg & 0xff) == 0) {
/* Enable all voltage monitors */
it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
}
}
/* Check if tachometers are reset manually or by some reason */
static void it87_check_tachometers_reset(struct platform_device *pdev)
{
struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
struct it87_data *data = platform_get_drvdata(pdev);
u8 mask, fan_main_ctrl;
mask = 0x70 & ~(sio_data->skip_fan << 4);
fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
if ((fan_main_ctrl & mask) == 0) {
/* Enable all fan tachometers */
fan_main_ctrl |= mask;
it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
fan_main_ctrl);
}
}
/* Set tachometers to 16-bit mode if needed */
static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
{
struct it87_data *data = platform_get_drvdata(pdev);
int reg;
if (!has_fan16_config(data))
return;
reg = it87_read_value(data, IT87_REG_FAN_16BIT);
if (~reg & 0x07 & data->has_fan) {
dev_dbg(&pdev->dev,
"Setting fan1-3 to 16-bit mode\n");
it87_write_value(data, IT87_REG_FAN_16BIT,
reg | 0x07);
}
}
static void it87_start_monitoring(struct it87_data *data)
{
it87_write_value(data, IT87_REG_CONFIG,
(it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
| (update_vbat ? 0x41 : 0x01));
}
/* Called when we have found a new IT87. */
static void it87_init_device(struct platform_device *pdev)
{
struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
struct it87_data *data = platform_get_drvdata(pdev);
int tmp, i;
/*
* For each PWM channel:
* - If it is in automatic mode, setting to manual mode should set
* the fan to full speed by default.
* - If it is in manual mode, we need a mapping to temperature
* channels to use when later setting to automatic mode later.
* Use a 1:1 mapping by default (we are clueless.)
* In both cases, the value can (and should) be changed by the user
* prior to switching to a different mode.
* Note that this is no longer needed for the IT8721F and later, as
* these have separate registers for the temperature mapping and the
* manual duty cycle.
*/
for (i = 0; i < NUM_AUTO_PWM; i++) {
data->pwm_temp_map[i] = i;
data->pwm_duty[i] = 0x7f; /* Full speed */
data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
}
it87_check_limit_regs(data);
/*
* Temperature channels are not forcibly enabled, as they can be
* set to two different sensor types and we can't guess which one
* is correct for a given system. These channels can be enabled at
* run-time through the temp{1-3}_type sysfs accessors if needed.
*/
it87_check_voltage_monitors_reset(data);
it87_check_tachometers_reset(pdev);
data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
it87_check_tachometers_16bit_mode(pdev);
/* Check for additional fans */
tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
if (has_four_fans(data) && (tmp & BIT(4)))
data->has_fan |= BIT(3); /* fan4 enabled */
if (has_five_fans(data) && (tmp & BIT(5)))
data->has_fan |= BIT(4); /* fan5 enabled */
if (has_six_fans(data) && (tmp & BIT(2)))
data->has_fan |= BIT(5); /* fan6 enabled */
/* Fan input pins may be used for alternative functions */
data->has_fan &= ~sio_data->skip_fan;
/* Check if pwm5, pwm6 are enabled */
if (has_six_pwm(data)) {
/* The following code may be IT8620E specific */
tmp = it87_read_value(data, IT87_REG_FAN_DIV);
if ((tmp & 0xc0) == 0xc0)
sio_data->skip_pwm |= BIT(4);
if (!(tmp & BIT(3)))
sio_data->skip_pwm |= BIT(5);
}
it87_start_monitoring(data);
}
/* Return 1 if and only if the PWM interface is safe to use */
static int it87_check_pwm(struct device *dev)
{
struct it87_data *data = dev_get_drvdata(dev);
/*
* Some BIOSes fail to correctly configure the IT87 fans. All fans off
* and polarity set to active low is sign that this is the case so we
* disable pwm control to protect the user.
*/
int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
if ((tmp & 0x87) == 0) {
if (fix_pwm_polarity) {
/*
* The user asks us to attempt a chip reconfiguration.
* This means switching to active high polarity and
* inverting all fan speed values.
*/
int i;
u8 pwm[3];
for (i = 0; i < ARRAY_SIZE(pwm); i++)
pwm[i] = it87_read_value(data,
IT87_REG_PWM[i]);
/*
* If any fan is in automatic pwm mode, the polarity
* might be correct, as suspicious as it seems, so we
* better don't change anything (but still disable the
* PWM interface).
*/
if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
dev_info(dev,
"Reconfiguring PWM to active high polarity\n");
it87_write_value(data, IT87_REG_FAN_CTL,
tmp | 0x87);
for (i = 0; i < 3; i++)
it87_write_value(data,
IT87_REG_PWM[i],
0x7f & ~pwm[i]);
return 1;
}
dev_info(dev,
"PWM configuration is too broken to be fixed\n");
}
return 0;
} else if (fix_pwm_polarity) {
dev_info(dev,
"PWM configuration looks sane, won't touch\n");
}
return 1;
}
static int it87_probe(struct platform_device *pdev)
{
struct it87_data *data;
struct resource *res;
struct device *dev = &pdev->dev;
struct it87_sio_data *sio_data = dev_get_platdata(dev);
int enable_pwm_interface;
struct device *hwmon_dev;
int err;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
DRVNAME)) {
dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
(unsigned long)res->start,
(unsigned long)(res->start + IT87_EC_EXTENT - 1));
return -EBUSY;
}
data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->addr = res->start;
data->sioaddr = sio_data->sioaddr;
data->type = sio_data->type;
data->smbus_bitmap = sio_data->smbus_bitmap;
data->ec_special_config = sio_data->ec_special_config;
data->features = it87_devices[sio_data->type].features;
data->peci_mask = it87_devices[sio_data->type].peci_mask;
data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
/*
* IT8705F Datasheet 0.4.1, 3h == Version G.
* IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
* These are the first revisions with 16-bit tachometer support.
*/
switch (data->type) {
case it87:
if (sio_data->revision >= 0x03) {
data->features &= ~FEAT_OLD_AUTOPWM;
data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
}
break;
case it8712:
if (sio_data->revision >= 0x08) {
data->features &= ~FEAT_OLD_AUTOPWM;
data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
FEAT_FIVE_FANS;
}
break;
default:
break;
}
platform_set_drvdata(pdev, data);
mutex_init(&data->update_lock);
err = smbus_disable(data);
if (err)
return err;
/* Now, we do the remaining detection. */
if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
smbus_enable(data);
return -ENODEV;
}
/* Check PWM configuration */
enable_pwm_interface = it87_check_pwm(dev);
if (!enable_pwm_interface)
dev_info(dev,
"Detected broken BIOS defaults, disabling PWM interface\n");
/* Starting with IT8721F, we handle scaling of internal voltages */
if (has_scaling(data)) {
if (sio_data->internal & BIT(0))
data->in_scaled |= BIT(3); /* in3 is AVCC */
if (sio_data->internal & BIT(1))
data->in_scaled |= BIT(7); /* in7 is VSB */
if (sio_data->internal & BIT(2))
data->in_scaled |= BIT(8); /* in8 is Vbat */
if (sio_data->internal & BIT(3))
data->in_scaled |= BIT(9); /* in9 is AVCC */
} else if (sio_data->type == it8781 || sio_data->type == it8782 ||
sio_data->type == it8783) {
if (sio_data->internal & BIT(0))
data->in_scaled |= BIT(3); /* in3 is VCC5V */
if (sio_data->internal & BIT(1))
data->in_scaled |= BIT(7); /* in7 is VCCH5V */
}
data->has_temp = 0x07;
if (sio_data->skip_temp & BIT(2)) {
if (sio_data->type == it8782 &&
!(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
data->has_temp &= ~BIT(2);
}
data->in_internal = sio_data->internal;
data->need_in7_reroute = sio_data->need_in7_reroute;
data->has_in = 0x3ff & ~sio_data->skip_in;
if (has_four_temp(data)) {
data->has_temp |= BIT(3);
} else if (has_six_temp(data)) {
u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
/* Check for additional temperature sensors */
if ((reg & 0x03) >= 0x02)
data->has_temp |= BIT(3);
if (((reg >> 2) & 0x03) >= 0x02)
data->has_temp |= BIT(4);
if (((reg >> 4) & 0x03) >= 0x02)
data->has_temp |= BIT(5);
/* Check for additional voltage sensors */
if ((reg & 0x03) == 0x01)
data->has_in |= BIT(10);
if (((reg >> 2) & 0x03) == 0x01)
data->has_in |= BIT(11);
if (((reg >> 4) & 0x03) == 0x01)
data->has_in |= BIT(12);
}
data->has_beep = !!sio_data->beep_pin;
/* Initialize the IT87 chip */
it87_init_device(pdev);
smbus_enable(data);
if (!sio_data->skip_vid) {
data->has_vid = true;
data->vrm = vid_which_vrm();
/* VID reading from Super-I/O config space if available */
data->vid = sio_data->vid_value;
}
/* Prepare for sysfs hooks */
data->groups[0] = &it87_group;
data->groups[1] = &it87_group_in;
data->groups[2] = &it87_group_temp;
data->groups[3] = &it87_group_fan;
if (enable_pwm_interface) {
data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
data->has_pwm &= ~sio_data->skip_pwm;
data->groups[4] = &it87_group_pwm;
if (has_old_autopwm(data) || has_newer_autopwm(data))
data->groups[5] = &it87_group_auto_pwm;
}
hwmon_dev = devm_hwmon_device_register_with_groups(dev,
it87_devices[sio_data->type].name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static void it87_resume_sio(struct platform_device *pdev)
{
struct it87_data *data = dev_get_drvdata(&pdev->dev);
int err;
int reg2c;
if (!data->need_in7_reroute)
return;
err = superio_enter(data->sioaddr);
if (err) {
dev_warn(&pdev->dev,
"Unable to enter Super I/O to reroute in7 (%d)",
err);
return;
}
superio_select(data->sioaddr, GPIO);
reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
if (!(reg2c & BIT(1))) {
dev_dbg(&pdev->dev,
"Routing internal VCCH5V to in7 again");
reg2c |= BIT(1);
superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
reg2c);
}
superio_exit(data->sioaddr, has_conf_noexit(data));
}
static int it87_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct it87_data *data = dev_get_drvdata(dev);
it87_resume_sio(pdev);
it87_lock(data);
it87_check_pwm(dev);
it87_check_limit_regs(data);
it87_check_voltage_monitors_reset(data);
it87_check_tachometers_reset(pdev);
it87_check_tachometers_16bit_mode(pdev);
it87_start_monitoring(data);
/* force update */
data->valid = false;
it87_unlock(data);
it87_update_device(dev);
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
static struct platform_driver it87_driver = {
.driver = {
.name = DRVNAME,
.pm = pm_sleep_ptr(&it87_dev_pm_ops),
},
.probe = it87_probe,
};
static int __init it87_device_add(int index, unsigned short address,
const struct it87_sio_data *sio_data)
{
struct platform_device *pdev;
struct resource res = {
.start = address + IT87_EC_OFFSET,
.end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
.name = DRVNAME,
.flags = IORESOURCE_IO,
};
int err;
err = acpi_check_resource_conflict(&res);
if (err) {
if (!ignore_resource_conflict)
return err;
}
pdev = platform_device_alloc(DRVNAME, address);
if (!pdev)
return -ENOMEM;
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add_data(pdev, sio_data,
sizeof(struct it87_sio_data));
if (err) {
pr_err("Platform data allocation failed\n");
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
it87_pdev[index] = pdev;
return 0;
exit_device_put:
platform_device_put(pdev);
return err;
}
/* callback function for DMI */
static int it87_dmi_cb(const struct dmi_system_id *dmi_entry)
{
dmi_data = dmi_entry->driver_data;
if (dmi_data && dmi_data->skip_pwm)
pr_info("Disabling pwm2 due to hardware constraints\n");
return 1;
}
/*
* On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
* (IT8792E) needs to be in configuration mode before accessing the first
* due to a bug in IT8792E which otherwise results in LPC bus access errors.
* This needs to be done before accessing the first Super-IO chip since
* the second chip may have been accessed prior to loading this driver.
*
* The problem is also reported to affect IT8795E, which is used on X299 boards
* and has the same chip ID as IT8792E (0x8733). It also appears to affect
* systems with IT8790E, which is used on some Z97X-Gaming boards as well as
* Z87X-OC.
* DMI entries for those systems will be added as they become available and
* as the problem is confirmed to affect those boards.
*/
static int it87_sio_force(const struct dmi_system_id *dmi_entry)
{
__superio_enter(REG_4E);
return it87_dmi_cb(dmi_entry);
};
/*
* On the Shuttle SN68PT, FAN_CTL2 is apparently not
* connected to a fan, but to something else. One user
* has reported instant system power-off when changing
* the PWM2 duty cycle, so we disable it.
* I use the board name string as the trigger in case
* the same board is ever used in other systems.
*/
static struct it87_dmi_data nvidia_fn68pt = {
.skip_pwm = BIT(1),
};
#define IT87_DMI_MATCH_VND(vendor, name, cb, data) \
{ \
.callback = cb, \
.matches = { \
DMI_EXACT_MATCH(DMI_BOARD_VENDOR, vendor), \
DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
}, \
.driver_data = data, \
}
#define IT87_DMI_MATCH_GBT(name, cb, data) \
IT87_DMI_MATCH_VND("Gigabyte Technology Co., Ltd.", name, cb, data)
static const struct dmi_system_id it87_dmi_table[] __initconst = {
IT87_DMI_MATCH_GBT("AB350", it87_sio_force, NULL),
/* ? + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("AX370", it87_sio_force, NULL),
/* ? + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("Z97X-Gaming G1", it87_sio_force, NULL),
/* ? + IT8790E */
IT87_DMI_MATCH_GBT("TRX40 AORUS XTREME", it87_sio_force, NULL),
/* IT8688E + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("Z390 AORUS ULTRA-CF", it87_sio_force, NULL),
/* IT8688E + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("B550 AORUS PRO AC", it87_sio_force, NULL),
/* IT8688E + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("X570 AORUS MASTER", it87_sio_force, NULL),
/* IT8688E + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("X570 AORUS PRO", it87_sio_force, NULL),
/* IT8688E + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("X570 AORUS PRO WIFI", it87_sio_force, NULL),
/* IT8688E + IT8792E/IT8795E */
IT87_DMI_MATCH_GBT("X570S AERO G", it87_sio_force, NULL),
/* IT8689E + IT87952E */
IT87_DMI_MATCH_GBT("Z690 AORUS PRO DDR4", it87_sio_force, NULL),
/* IT8689E + IT87952E */
IT87_DMI_MATCH_GBT("Z690 AORUS PRO", it87_sio_force, NULL),
/* IT8689E + IT87952E */
IT87_DMI_MATCH_VND("nVIDIA", "FN68PT", it87_dmi_cb, &nvidia_fn68pt),
{ }
};
MODULE_DEVICE_TABLE(dmi, it87_dmi_table);
static int __init sm_it87_init(void)
{
int sioaddr[2] = { REG_2E, REG_4E };
struct it87_sio_data sio_data;
unsigned short isa_address[2];
bool found = false;
int i, err;
err = platform_driver_register(&it87_driver);
if (err)
return err;
dmi_check_system(it87_dmi_table);
for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
memset(&sio_data, 0, sizeof(struct it87_sio_data));
isa_address[i] = 0;
err = it87_find(sioaddr[i], &isa_address[i], &sio_data, i);
if (err || isa_address[i] == 0)
continue;
/*
* Don't register second chip if its ISA address matches
* the first chip's ISA address.
*/
if (i && isa_address[i] == isa_address[0])
break;
err = it87_device_add(i, isa_address[i], &sio_data);
if (err)
goto exit_dev_unregister;
found = true;
/*
* IT8705F may respond on both SIO addresses.
* Stop probing after finding one.
*/
if (sio_data.type == it87)
break;
}
if (!found) {
err = -ENODEV;
goto exit_unregister;
}
return 0;
exit_dev_unregister:
/* NULL check handled by platform_device_unregister */
platform_device_unregister(it87_pdev[0]);
exit_unregister:
platform_driver_unregister(&it87_driver);
return err;
}
static void __exit sm_it87_exit(void)
{
/* NULL check handled by platform_device_unregister */
platform_device_unregister(it87_pdev[1]);
platform_device_unregister(it87_pdev[0]);
platform_driver_unregister(&it87_driver);
}
MODULE_AUTHOR("Chris Gauthron, Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
module_param_array(force_id, ushort, &force_id_cnt, 0);
MODULE_PARM_DESC(force_id, "Override one or more detected device ID(s)");
module_param(ignore_resource_conflict, bool, 0);
MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
module_param(update_vbat, bool, 0);
MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
module_param(fix_pwm_polarity, bool, 0);
MODULE_PARM_DESC(fix_pwm_polarity,
"Force PWM polarity to active high (DANGEROUS)");
MODULE_LICENSE("GPL");
module_init(sm_it87_init);
module_exit(sm_it87_exit);
|
linux-master
|
drivers/hwmon/it87.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* adm1029.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
*
* Copyright (C) 2006 Corentin LABBE <[email protected]>
*
* Based on LM83 Driver by Jean Delvare <[email protected]>
*
* Give only processor, motherboard temperatures and fan tachs
* Very rare chip please let me know if you use it
*
* http://www.analog.com/UploadedFiles/Data_Sheets/ADM1029.pdf
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
#include <linux/err.h>
#include <linux/mutex.h>
/*
* Addresses to scan
*/
static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
0x2e, 0x2f, I2C_CLIENT_END
};
/*
* The ADM1029 registers
* Manufacturer ID is 0x41 for Analog Devices
*/
#define ADM1029_REG_MAN_ID 0x0D
#define ADM1029_REG_CHIP_ID 0x0E
#define ADM1029_REG_CONFIG 0x01
#define ADM1029_REG_NB_FAN_SUPPORT 0x02
#define ADM1029_REG_TEMP_DEVICES_INSTALLED 0x06
#define ADM1029_REG_LOCAL_TEMP 0xA0
#define ADM1029_REG_REMOTE1_TEMP 0xA1
#define ADM1029_REG_REMOTE2_TEMP 0xA2
#define ADM1029_REG_LOCAL_TEMP_HIGH 0x90
#define ADM1029_REG_REMOTE1_TEMP_HIGH 0x91
#define ADM1029_REG_REMOTE2_TEMP_HIGH 0x92
#define ADM1029_REG_LOCAL_TEMP_LOW 0x98
#define ADM1029_REG_REMOTE1_TEMP_LOW 0x99
#define ADM1029_REG_REMOTE2_TEMP_LOW 0x9A
#define ADM1029_REG_FAN1 0x70
#define ADM1029_REG_FAN2 0x71
#define ADM1029_REG_FAN1_MIN 0x78
#define ADM1029_REG_FAN2_MIN 0x79
#define ADM1029_REG_FAN1_CONFIG 0x68
#define ADM1029_REG_FAN2_CONFIG 0x69
#define TEMP_FROM_REG(val) ((val) * 1000)
#define DIV_FROM_REG(val) (1 << (((val) >> 6) - 1))
/* Registers to be checked by adm1029_update_device() */
static const u8 ADM1029_REG_TEMP[] = {
ADM1029_REG_LOCAL_TEMP,
ADM1029_REG_REMOTE1_TEMP,
ADM1029_REG_REMOTE2_TEMP,
ADM1029_REG_LOCAL_TEMP_HIGH,
ADM1029_REG_REMOTE1_TEMP_HIGH,
ADM1029_REG_REMOTE2_TEMP_HIGH,
ADM1029_REG_LOCAL_TEMP_LOW,
ADM1029_REG_REMOTE1_TEMP_LOW,
ADM1029_REG_REMOTE2_TEMP_LOW,
};
static const u8 ADM1029_REG_FAN[] = {
ADM1029_REG_FAN1,
ADM1029_REG_FAN2,
ADM1029_REG_FAN1_MIN,
ADM1029_REG_FAN2_MIN,
};
static const u8 ADM1029_REG_FAN_DIV[] = {
ADM1029_REG_FAN1_CONFIG,
ADM1029_REG_FAN2_CONFIG,
};
/*
* Client data (each client gets its own)
*/
struct adm1029_data {
struct i2c_client *client;
struct mutex update_lock; /* protect register access */
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* registers values, signed for temperature, unsigned for other stuff */
s8 temp[ARRAY_SIZE(ADM1029_REG_TEMP)];
u8 fan[ARRAY_SIZE(ADM1029_REG_FAN)];
u8 fan_div[ARRAY_SIZE(ADM1029_REG_FAN_DIV)];
};
/*
* function that update the status of the chips (temperature for example)
*/
static struct adm1029_data *adm1029_update_device(struct device *dev)
{
struct adm1029_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
mutex_lock(&data->update_lock);
/*
* Use the "cache" Luke, don't recheck values
* if there are already checked not a long time later
*/
if (time_after(jiffies, data->last_updated + HZ * 2) || !data->valid) {
int nr;
dev_dbg(&client->dev, "Updating adm1029 data\n");
for (nr = 0; nr < ARRAY_SIZE(ADM1029_REG_TEMP); nr++) {
data->temp[nr] =
i2c_smbus_read_byte_data(client,
ADM1029_REG_TEMP[nr]);
}
for (nr = 0; nr < ARRAY_SIZE(ADM1029_REG_FAN); nr++) {
data->fan[nr] =
i2c_smbus_read_byte_data(client,
ADM1029_REG_FAN[nr]);
}
for (nr = 0; nr < ARRAY_SIZE(ADM1029_REG_FAN_DIV); nr++) {
data->fan_div[nr] =
i2c_smbus_read_byte_data(client,
ADM1029_REG_FAN_DIV[nr]);
}
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs stuff
*/
static ssize_t
temp_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adm1029_data *data = adm1029_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[attr->index]));
}
static ssize_t
fan_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adm1029_data *data = adm1029_update_device(dev);
u16 val;
if (data->fan[attr->index] == 0 ||
(data->fan_div[attr->index] & 0xC0) == 0 ||
data->fan[attr->index] == 255) {
return sprintf(buf, "0\n");
}
val = 1880 * 120 / DIV_FROM_REG(data->fan_div[attr->index])
/ data->fan[attr->index];
return sprintf(buf, "%d\n", val);
}
static ssize_t
fan_div_show(struct device *dev, struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adm1029_data *data = adm1029_update_device(dev);
if ((data->fan_div[attr->index] & 0xC0) == 0)
return sprintf(buf, "0\n");
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[attr->index]));
}
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct adm1029_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
u8 reg;
long val;
int ret = kstrtol(buf, 10, &val);
if (ret < 0)
return ret;
mutex_lock(&data->update_lock);
/*Read actual config */
reg = i2c_smbus_read_byte_data(client,
ADM1029_REG_FAN_DIV[attr->index]);
switch (val) {
case 1:
val = 1;
break;
case 2:
val = 2;
break;
case 4:
val = 3;
break;
default:
mutex_unlock(&data->update_lock);
dev_err(&client->dev,
"fan_div value %ld not supported. Choose one of 1, 2 or 4!\n",
val);
return -EINVAL;
}
/* Update the value */
reg = (reg & 0x3F) | (val << 6);
/* Update the cache */
data->fan_div[attr->index] = reg;
/* Write value */
i2c_smbus_write_byte_data(client,
ADM1029_REG_FAN_DIV[attr->index], reg);
mutex_unlock(&data->update_lock);
return count;
}
/* Access rights on sysfs. */
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RO(temp1_max, temp, 3);
static SENSOR_DEVICE_ATTR_RO(temp2_max, temp, 4);
static SENSOR_DEVICE_ATTR_RO(temp3_max, temp, 5);
static SENSOR_DEVICE_ATTR_RO(temp1_min, temp, 6);
static SENSOR_DEVICE_ATTR_RO(temp2_min, temp, 7);
static SENSOR_DEVICE_ATTR_RO(temp3_min, temp, 8);
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan, 1);
static SENSOR_DEVICE_ATTR_RO(fan1_min, fan, 2);
static SENSOR_DEVICE_ATTR_RO(fan2_min, fan, 3);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static struct attribute *adm1029_attrs[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(adm1029);
/*
* Real code
*/
/* Return 0 if detection is successful, -ENODEV otherwise */
static int adm1029_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
u8 man_id, chip_id, temp_devices_installed, nb_fan_support;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/*
* ADM1029 doesn't have CHIP ID, check just MAN ID
* For better detection we check also ADM1029_TEMP_DEVICES_INSTALLED,
* ADM1029_REG_NB_FAN_SUPPORT and compare it with possible values
* documented
*/
man_id = i2c_smbus_read_byte_data(client, ADM1029_REG_MAN_ID);
chip_id = i2c_smbus_read_byte_data(client, ADM1029_REG_CHIP_ID);
temp_devices_installed = i2c_smbus_read_byte_data(client,
ADM1029_REG_TEMP_DEVICES_INSTALLED);
nb_fan_support = i2c_smbus_read_byte_data(client,
ADM1029_REG_NB_FAN_SUPPORT);
/* 0x41 is Analog Devices */
if (man_id != 0x41 || (temp_devices_installed & 0xf9) != 0x01 ||
nb_fan_support != 0x03)
return -ENODEV;
if ((chip_id & 0xF0) != 0x00) {
/*
* There are no "official" CHIP ID, so actually
* we use Major/Minor revision for that
*/
pr_info("Unknown major revision %x, please let us know\n",
chip_id);
return -ENODEV;
}
strscpy(info->type, "adm1029", I2C_NAME_SIZE);
return 0;
}
static int adm1029_init_client(struct i2c_client *client)
{
u8 config;
config = i2c_smbus_read_byte_data(client, ADM1029_REG_CONFIG);
if ((config & 0x10) == 0) {
i2c_smbus_write_byte_data(client, ADM1029_REG_CONFIG,
config | 0x10);
}
/* recheck config */
config = i2c_smbus_read_byte_data(client, ADM1029_REG_CONFIG);
if ((config & 0x10) == 0) {
dev_err(&client->dev, "Initialization failed!\n");
return 0;
}
return 1;
}
static int adm1029_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct adm1029_data *data;
struct device *hwmon_dev;
data = devm_kzalloc(dev, sizeof(struct adm1029_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/*
* Initialize the ADM1029 chip
* Check config register
*/
if (adm1029_init_client(client) == 0)
return -ENODEV;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
adm1029_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id adm1029_id[] = {
{ "adm1029", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adm1029_id);
static struct i2c_driver adm1029_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1029",
},
.probe = adm1029_probe,
.id_table = adm1029_id,
.detect = adm1029_detect,
.address_list = normal_i2c,
};
module_i2c_driver(adm1029_driver);
MODULE_AUTHOR("Corentin LABBE <[email protected]>");
MODULE_DESCRIPTION("adm1029 driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/adm1029.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
*
* Copyright (C) 2012 ARM Limited
*/
#define DRVNAME "vexpress-hwmon"
#define pr_fmt(fmt) DRVNAME ": " fmt
#include <linux/device.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/vexpress.h>
struct vexpress_hwmon_data {
struct device *hwmon_dev;
struct regmap *reg;
};
static ssize_t vexpress_hwmon_label_show(struct device *dev,
struct device_attribute *dev_attr, char *buffer)
{
const char *label = of_get_property(dev->of_node, "label", NULL);
return sysfs_emit(buffer, "%s\n", label);
}
static ssize_t vexpress_hwmon_u32_show(struct device *dev,
struct device_attribute *dev_attr, char *buffer)
{
struct vexpress_hwmon_data *data = dev_get_drvdata(dev);
int err;
u32 value;
err = regmap_read(data->reg, 0, &value);
if (err)
return err;
return sysfs_emit(buffer, "%u\n", value /
to_sensor_dev_attr(dev_attr)->index);
}
static ssize_t vexpress_hwmon_u64_show(struct device *dev,
struct device_attribute *dev_attr, char *buffer)
{
struct vexpress_hwmon_data *data = dev_get_drvdata(dev);
int err;
u32 value_hi, value_lo;
err = regmap_read(data->reg, 0, &value_lo);
if (err)
return err;
err = regmap_read(data->reg, 1, &value_hi);
if (err)
return err;
return sysfs_emit(buffer, "%llu\n",
div_u64(((u64)value_hi << 32) | value_lo,
to_sensor_dev_attr(dev_attr)->index));
}
static umode_t vexpress_hwmon_attr_is_visible(struct kobject *kobj,
struct attribute *attr, int index)
{
struct device *dev = kobj_to_dev(kobj);
struct device_attribute *dev_attr = container_of(attr,
struct device_attribute, attr);
if (dev_attr->show == vexpress_hwmon_label_show &&
!of_get_property(dev->of_node, "label", NULL))
return 0;
return attr->mode;
}
struct vexpress_hwmon_type {
const char *name;
const struct attribute_group **attr_groups;
};
#if !defined(CONFIG_REGULATOR_VEXPRESS)
static DEVICE_ATTR(in1_label, 0444, vexpress_hwmon_label_show, NULL);
static SENSOR_DEVICE_ATTR_RO(in1_input, vexpress_hwmon_u32, 1000);
static struct attribute *vexpress_hwmon_attrs_volt[] = {
&dev_attr_in1_label.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
NULL
};
static struct attribute_group vexpress_hwmon_group_volt = {
.is_visible = vexpress_hwmon_attr_is_visible,
.attrs = vexpress_hwmon_attrs_volt,
};
static struct vexpress_hwmon_type vexpress_hwmon_volt = {
.name = "vexpress_volt",
.attr_groups = (const struct attribute_group *[]) {
&vexpress_hwmon_group_volt,
NULL,
},
};
#endif
static DEVICE_ATTR(curr1_label, 0444, vexpress_hwmon_label_show, NULL);
static SENSOR_DEVICE_ATTR_RO(curr1_input, vexpress_hwmon_u32, 1000);
static struct attribute *vexpress_hwmon_attrs_amp[] = {
&dev_attr_curr1_label.attr,
&sensor_dev_attr_curr1_input.dev_attr.attr,
NULL
};
static struct attribute_group vexpress_hwmon_group_amp = {
.is_visible = vexpress_hwmon_attr_is_visible,
.attrs = vexpress_hwmon_attrs_amp,
};
static struct vexpress_hwmon_type vexpress_hwmon_amp = {
.name = "vexpress_amp",
.attr_groups = (const struct attribute_group *[]) {
&vexpress_hwmon_group_amp,
NULL
},
};
static DEVICE_ATTR(temp1_label, 0444, vexpress_hwmon_label_show, NULL);
static SENSOR_DEVICE_ATTR_RO(temp1_input, vexpress_hwmon_u32, 1000);
static struct attribute *vexpress_hwmon_attrs_temp[] = {
&dev_attr_temp1_label.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
NULL
};
static struct attribute_group vexpress_hwmon_group_temp = {
.is_visible = vexpress_hwmon_attr_is_visible,
.attrs = vexpress_hwmon_attrs_temp,
};
static struct vexpress_hwmon_type vexpress_hwmon_temp = {
.name = "vexpress_temp",
.attr_groups = (const struct attribute_group *[]) {
&vexpress_hwmon_group_temp,
NULL
},
};
static DEVICE_ATTR(power1_label, 0444, vexpress_hwmon_label_show, NULL);
static SENSOR_DEVICE_ATTR_RO(power1_input, vexpress_hwmon_u32, 1);
static struct attribute *vexpress_hwmon_attrs_power[] = {
&dev_attr_power1_label.attr,
&sensor_dev_attr_power1_input.dev_attr.attr,
NULL
};
static struct attribute_group vexpress_hwmon_group_power = {
.is_visible = vexpress_hwmon_attr_is_visible,
.attrs = vexpress_hwmon_attrs_power,
};
static struct vexpress_hwmon_type vexpress_hwmon_power = {
.name = "vexpress_power",
.attr_groups = (const struct attribute_group *[]) {
&vexpress_hwmon_group_power,
NULL
},
};
static DEVICE_ATTR(energy1_label, 0444, vexpress_hwmon_label_show, NULL);
static SENSOR_DEVICE_ATTR_RO(energy1_input, vexpress_hwmon_u64, 1);
static struct attribute *vexpress_hwmon_attrs_energy[] = {
&dev_attr_energy1_label.attr,
&sensor_dev_attr_energy1_input.dev_attr.attr,
NULL
};
static struct attribute_group vexpress_hwmon_group_energy = {
.is_visible = vexpress_hwmon_attr_is_visible,
.attrs = vexpress_hwmon_attrs_energy,
};
static struct vexpress_hwmon_type vexpress_hwmon_energy = {
.name = "vexpress_energy",
.attr_groups = (const struct attribute_group *[]) {
&vexpress_hwmon_group_energy,
NULL
},
};
static const struct of_device_id vexpress_hwmon_of_match[] = {
#if !defined(CONFIG_REGULATOR_VEXPRESS)
{
.compatible = "arm,vexpress-volt",
.data = &vexpress_hwmon_volt,
},
#endif
{
.compatible = "arm,vexpress-amp",
.data = &vexpress_hwmon_amp,
}, {
.compatible = "arm,vexpress-temp",
.data = &vexpress_hwmon_temp,
}, {
.compatible = "arm,vexpress-power",
.data = &vexpress_hwmon_power,
}, {
.compatible = "arm,vexpress-energy",
.data = &vexpress_hwmon_energy,
},
{}
};
MODULE_DEVICE_TABLE(of, vexpress_hwmon_of_match);
static int vexpress_hwmon_probe(struct platform_device *pdev)
{
struct vexpress_hwmon_data *data;
const struct vexpress_hwmon_type *type;
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
platform_set_drvdata(pdev, data);
type = of_device_get_match_data(&pdev->dev);
if (!type)
return -ENODEV;
data->reg = devm_regmap_init_vexpress_config(&pdev->dev);
if (IS_ERR(data->reg))
return PTR_ERR(data->reg);
data->hwmon_dev = devm_hwmon_device_register_with_groups(&pdev->dev,
type->name, data, type->attr_groups);
return PTR_ERR_OR_ZERO(data->hwmon_dev);
}
static struct platform_driver vexpress_hwmon_driver = {
.probe = vexpress_hwmon_probe,
.driver = {
.name = DRVNAME,
.of_match_table = vexpress_hwmon_of_match,
},
};
module_platform_driver(vexpress_hwmon_driver);
MODULE_AUTHOR("Pawel Moll <[email protected]>");
MODULE_DESCRIPTION("Versatile Express hwmon sensors driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:vexpress-hwmon");
|
linux-master
|
drivers/hwmon/vexpress-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* thmc50.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 2007 Krzysztof Helt <[email protected]>
* Based on 2.4 driver by Frodo Looijaard <[email protected]> and
* Philip Edelbrock <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/jiffies.h>
MODULE_LICENSE("GPL");
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
/* Insmod parameters */
enum chips { thmc50, adm1022 };
static unsigned short adm1022_temp3[16];
static unsigned int adm1022_temp3_num;
module_param_array(adm1022_temp3, ushort, &adm1022_temp3_num, 0);
MODULE_PARM_DESC(adm1022_temp3,
"List of adapter,address pairs to enable 3rd temperature (ADM1022 only)");
/* Many THMC50 constants specified below */
/* The THMC50 registers */
#define THMC50_REG_CONF 0x40
#define THMC50_REG_COMPANY_ID 0x3E
#define THMC50_REG_DIE_CODE 0x3F
#define THMC50_REG_ANALOG_OUT 0x19
/*
* The mirror status register cannot be used as
* reading it does not clear alarms.
*/
#define THMC50_REG_INTR 0x41
static const u8 THMC50_REG_TEMP[] = { 0x27, 0x26, 0x20 };
static const u8 THMC50_REG_TEMP_MIN[] = { 0x3A, 0x38, 0x2C };
static const u8 THMC50_REG_TEMP_MAX[] = { 0x39, 0x37, 0x2B };
static const u8 THMC50_REG_TEMP_CRITICAL[] = { 0x13, 0x14, 0x14 };
static const u8 THMC50_REG_TEMP_DEFAULT[] = { 0x17, 0x18, 0x18 };
#define THMC50_REG_CONF_nFANOFF 0x20
#define THMC50_REG_CONF_PROGRAMMED 0x08
/* Each client has this additional data */
struct thmc50_data {
struct i2c_client *client;
const struct attribute_group *groups[3];
struct mutex update_lock;
enum chips type;
unsigned long last_updated; /* In jiffies */
char has_temp3; /* !=0 if it is ADM1022 in temp3 mode */
bool valid; /* true if following fields are valid */
/* Register values */
s8 temp_input[3];
s8 temp_max[3];
s8 temp_min[3];
s8 temp_critical[3];
u8 analog_out;
u8 alarms;
};
static struct thmc50_data *thmc50_update_device(struct device *dev)
{
struct thmc50_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int timeout = HZ / 5 + (data->type == thmc50 ? HZ : 0);
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + timeout)
|| !data->valid) {
int temps = data->has_temp3 ? 3 : 2;
int i;
int prog = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
prog &= THMC50_REG_CONF_PROGRAMMED;
for (i = 0; i < temps; i++) {
data->temp_input[i] = i2c_smbus_read_byte_data(client,
THMC50_REG_TEMP[i]);
data->temp_max[i] = i2c_smbus_read_byte_data(client,
THMC50_REG_TEMP_MAX[i]);
data->temp_min[i] = i2c_smbus_read_byte_data(client,
THMC50_REG_TEMP_MIN[i]);
data->temp_critical[i] =
i2c_smbus_read_byte_data(client,
prog ? THMC50_REG_TEMP_CRITICAL[i]
: THMC50_REG_TEMP_DEFAULT[i]);
}
data->analog_out =
i2c_smbus_read_byte_data(client, THMC50_REG_ANALOG_OUT);
data->alarms =
i2c_smbus_read_byte_data(client, THMC50_REG_INTR);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t analog_out_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct thmc50_data *data = thmc50_update_device(dev);
return sprintf(buf, "%d\n", data->analog_out);
}
static ssize_t analog_out_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct thmc50_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int config;
unsigned long tmp;
int err;
err = kstrtoul(buf, 10, &tmp);
if (err)
return err;
mutex_lock(&data->update_lock);
data->analog_out = clamp_val(tmp, 0, 255);
i2c_smbus_write_byte_data(client, THMC50_REG_ANALOG_OUT,
data->analog_out);
config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
if (data->analog_out == 0)
config &= ~THMC50_REG_CONF_nFANOFF;
else
config |= THMC50_REG_CONF_nFANOFF;
i2c_smbus_write_byte_data(client, THMC50_REG_CONF, config);
mutex_unlock(&data->update_lock);
return count;
}
/* There is only one PWM mode = DC */
static ssize_t pwm_mode_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, "0\n");
}
/* Temperatures */
static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct thmc50_data *data = thmc50_update_device(dev);
return sprintf(buf, "%d\n", data->temp_input[nr] * 1000);
}
static ssize_t temp_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct thmc50_data *data = thmc50_update_device(dev);
return sprintf(buf, "%d\n", data->temp_min[nr] * 1000);
}
static ssize_t temp_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct thmc50_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_min[nr] = clamp_val(val / 1000, -128, 127);
i2c_smbus_write_byte_data(client, THMC50_REG_TEMP_MIN[nr],
data->temp_min[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct thmc50_data *data = thmc50_update_device(dev);
return sprintf(buf, "%d\n", data->temp_max[nr] * 1000);
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int nr = to_sensor_dev_attr(attr)->index;
struct thmc50_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
data->temp_max[nr] = clamp_val(val / 1000, -128, 127);
i2c_smbus_write_byte_data(client, THMC50_REG_TEMP_MAX[nr],
data->temp_max[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_critical_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct thmc50_data *data = thmc50_update_device(dev);
return sprintf(buf, "%d\n", data->temp_critical[nr] * 1000);
}
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int index = to_sensor_dev_attr(attr)->index;
struct thmc50_data *data = thmc50_update_device(dev);
return sprintf(buf, "%u\n", (data->alarms >> index) & 1);
}
static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_min, temp_min, 0);
static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
static SENSOR_DEVICE_ATTR_RO(temp1_crit, temp_critical, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_min, temp_min, 1);
static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_crit, temp_critical, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_min, temp_min, 2);
static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
static SENSOR_DEVICE_ATTR_RO(temp3_crit, temp_critical, 2);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 7);
static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2);
static SENSOR_DEVICE_ATTR_RW(pwm1, analog_out, 0);
static SENSOR_DEVICE_ATTR_RO(pwm1_mode, pwm_mode, 0);
static struct attribute *thmc50_attributes[] = {
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_crit.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_mode.dev_attr.attr,
NULL
};
static const struct attribute_group thmc50_group = {
.attrs = thmc50_attributes,
};
/* for ADM1022 3rd temperature mode */
static struct attribute *temp3_attributes[] = {
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_crit.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
NULL
};
static const struct attribute_group temp3_group = {
.attrs = temp3_attributes,
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int thmc50_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
unsigned company;
unsigned revision;
unsigned config;
struct i2c_adapter *adapter = client->adapter;
const char *type_name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
pr_debug("thmc50: detect failed, smbus byte data not supported!\n");
return -ENODEV;
}
pr_debug("thmc50: Probing for THMC50 at 0x%2X on bus %d\n",
client->addr, i2c_adapter_id(client->adapter));
company = i2c_smbus_read_byte_data(client, THMC50_REG_COMPANY_ID);
revision = i2c_smbus_read_byte_data(client, THMC50_REG_DIE_CODE);
config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
if (revision < 0xc0 || (config & 0x10))
return -ENODEV;
if (company == 0x41) {
int id = i2c_adapter_id(client->adapter);
int i;
type_name = "adm1022";
for (i = 0; i + 1 < adm1022_temp3_num; i += 2)
if (adm1022_temp3[i] == id &&
adm1022_temp3[i + 1] == client->addr) {
/* enable 2nd remote temp */
config |= (1 << 7);
i2c_smbus_write_byte_data(client,
THMC50_REG_CONF,
config);
break;
}
} else if (company == 0x49) {
type_name = "thmc50";
} else {
pr_debug("thmc50: Detection of THMC50/ADM1022 failed\n");
return -ENODEV;
}
pr_debug("thmc50: Detected %s (version %x, revision %x)\n",
type_name, (revision >> 4) - 0xc, revision & 0xf);
strscpy(info->type, type_name, I2C_NAME_SIZE);
return 0;
}
static void thmc50_init_client(struct thmc50_data *data)
{
struct i2c_client *client = data->client;
int config;
data->analog_out = i2c_smbus_read_byte_data(client,
THMC50_REG_ANALOG_OUT);
/* set up to at least 1 */
if (data->analog_out == 0) {
data->analog_out = 1;
i2c_smbus_write_byte_data(client, THMC50_REG_ANALOG_OUT,
data->analog_out);
}
config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
config |= 0x1; /* start the chip if it is in standby mode */
if (data->type == adm1022 && (config & (1 << 7)))
data->has_temp3 = 1;
i2c_smbus_write_byte_data(client, THMC50_REG_CONF, config);
}
static const struct i2c_device_id thmc50_id[];
static int thmc50_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct thmc50_data *data;
struct device *hwmon_dev;
int idx = 0;
data = devm_kzalloc(dev, sizeof(struct thmc50_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
data->type = i2c_match_id(thmc50_id, client)->driver_data;
mutex_init(&data->update_lock);
thmc50_init_client(data);
/* sysfs hooks */
data->groups[idx++] = &thmc50_group;
/* Register additional ADM1022 sysfs hooks */
if (data->has_temp3)
data->groups[idx++] = &temp3_group;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id thmc50_id[] = {
{ "adm1022", adm1022 },
{ "thmc50", thmc50 },
{ }
};
MODULE_DEVICE_TABLE(i2c, thmc50_id);
static struct i2c_driver thmc50_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "thmc50",
},
.probe = thmc50_probe,
.id_table = thmc50_id,
.detect = thmc50_detect,
.address_list = normal_i2c,
};
module_i2c_driver(thmc50_driver);
MODULE_AUTHOR("Krzysztof Helt <[email protected]>");
MODULE_DESCRIPTION("THMC50 driver");
|
linux-master
|
drivers/hwmon/thmc50.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* Sensirion SHTC1 humidity and temperature sensor driver
*
* Copyright (C) 2014 Sensirion AG, Switzerland
* Author: Johannes Winkelmann <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/platform_data/shtc1.h>
#include <linux/of.h>
/* commands (high precision mode) */
static const unsigned char shtc1_cmd_measure_blocking_hpm[] = { 0x7C, 0xA2 };
static const unsigned char shtc1_cmd_measure_nonblocking_hpm[] = { 0x78, 0x66 };
/* commands (low precision mode) */
static const unsigned char shtc1_cmd_measure_blocking_lpm[] = { 0x64, 0x58 };
static const unsigned char shtc1_cmd_measure_nonblocking_lpm[] = { 0x60, 0x9c };
/* command for reading the ID register */
static const unsigned char shtc1_cmd_read_id_reg[] = { 0xef, 0xc8 };
/*
* constants for reading the ID register
* SHTC1: 0x0007 with mask 0x003f
* SHTW1: 0x0007 with mask 0x003f
* SHTC3: 0x0807 with mask 0x083f
*/
#define SHTC3_ID 0x0807
#define SHTC3_ID_MASK 0x083f
#define SHTC1_ID 0x0007
#define SHTC1_ID_MASK 0x003f
/* delays for non-blocking i2c commands, both in us */
#define SHTC1_NONBLOCKING_WAIT_TIME_HPM 14400
#define SHTC1_NONBLOCKING_WAIT_TIME_LPM 1000
#define SHTC3_NONBLOCKING_WAIT_TIME_HPM 12100
#define SHTC3_NONBLOCKING_WAIT_TIME_LPM 800
#define SHTC1_CMD_LENGTH 2
#define SHTC1_RESPONSE_LENGTH 6
enum shtcx_chips {
shtc1,
shtc3,
};
struct shtc1_data {
struct i2c_client *client;
struct mutex update_lock;
bool valid;
unsigned long last_updated; /* in jiffies */
const unsigned char *command;
unsigned int nonblocking_wait_time; /* in us */
struct shtc1_platform_data setup;
enum shtcx_chips chip;
int temperature; /* 1000 * temperature in dgr C */
int humidity; /* 1000 * relative humidity in %RH */
};
static int shtc1_update_values(struct i2c_client *client,
struct shtc1_data *data,
char *buf, int bufsize)
{
int ret = i2c_master_send(client, data->command, SHTC1_CMD_LENGTH);
if (ret != SHTC1_CMD_LENGTH) {
dev_err(&client->dev, "failed to send command: %d\n", ret);
return ret < 0 ? ret : -EIO;
}
/*
* In blocking mode (clock stretching mode) the I2C bus
* is blocked for other traffic, thus the call to i2c_master_recv()
* will wait until the data is ready. For non blocking mode, we
* have to wait ourselves.
*/
if (!data->setup.blocking_io)
usleep_range(data->nonblocking_wait_time,
data->nonblocking_wait_time + 1000);
ret = i2c_master_recv(client, buf, bufsize);
if (ret != bufsize) {
dev_err(&client->dev, "failed to read values: %d\n", ret);
return ret < 0 ? ret : -EIO;
}
return 0;
}
/* sysfs attributes */
static struct shtc1_data *shtc1_update_client(struct device *dev)
{
struct shtc1_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
unsigned char buf[SHTC1_RESPONSE_LENGTH];
int val;
int ret = 0;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ / 10) || !data->valid) {
ret = shtc1_update_values(client, data, buf, sizeof(buf));
if (ret)
goto out;
/*
* From datasheet:
* T = -45 + 175 * ST / 2^16
* RH = 100 * SRH / 2^16
*
* Adapted for integer fixed point (3 digit) arithmetic.
*/
val = be16_to_cpup((__be16 *)buf);
data->temperature = ((21875 * val) >> 13) - 45000;
val = be16_to_cpup((__be16 *)(buf + 3));
data->humidity = ((12500 * val) >> 13);
data->last_updated = jiffies;
data->valid = true;
}
out:
mutex_unlock(&data->update_lock);
return ret == 0 ? data : ERR_PTR(ret);
}
static ssize_t temp1_input_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct shtc1_data *data = shtc1_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->temperature);
}
static ssize_t humidity1_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct shtc1_data *data = shtc1_update_client(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->humidity);
}
static DEVICE_ATTR_RO(temp1_input);
static DEVICE_ATTR_RO(humidity1_input);
static struct attribute *shtc1_attrs[] = {
&dev_attr_temp1_input.attr,
&dev_attr_humidity1_input.attr,
NULL
};
ATTRIBUTE_GROUPS(shtc1);
static void shtc1_select_command(struct shtc1_data *data)
{
if (data->setup.high_precision) {
data->command = data->setup.blocking_io ?
shtc1_cmd_measure_blocking_hpm :
shtc1_cmd_measure_nonblocking_hpm;
data->nonblocking_wait_time = (data->chip == shtc1) ?
SHTC1_NONBLOCKING_WAIT_TIME_HPM :
SHTC3_NONBLOCKING_WAIT_TIME_HPM;
} else {
data->command = data->setup.blocking_io ?
shtc1_cmd_measure_blocking_lpm :
shtc1_cmd_measure_nonblocking_lpm;
data->nonblocking_wait_time = (data->chip == shtc1) ?
SHTC1_NONBLOCKING_WAIT_TIME_LPM :
SHTC3_NONBLOCKING_WAIT_TIME_LPM;
}
}
static const struct i2c_device_id shtc1_id[];
static int shtc1_probe(struct i2c_client *client)
{
int ret;
u16 id_reg;
char id_reg_buf[2];
struct shtc1_data *data;
struct device *hwmon_dev;
enum shtcx_chips chip = i2c_match_id(shtc1_id, client)->driver_data;
struct i2c_adapter *adap = client->adapter;
struct device *dev = &client->dev;
struct device_node *np = dev->of_node;
if (!i2c_check_functionality(adap, I2C_FUNC_I2C)) {
dev_err(dev, "plain i2c transactions not supported\n");
return -ENODEV;
}
ret = i2c_master_send(client, shtc1_cmd_read_id_reg, SHTC1_CMD_LENGTH);
if (ret != SHTC1_CMD_LENGTH) {
dev_err(dev, "could not send read_id_reg command: %d\n", ret);
return ret < 0 ? ret : -ENODEV;
}
ret = i2c_master_recv(client, id_reg_buf, sizeof(id_reg_buf));
if (ret != sizeof(id_reg_buf)) {
dev_err(dev, "could not read ID register: %d\n", ret);
return -ENODEV;
}
id_reg = be16_to_cpup((__be16 *)id_reg_buf);
if (chip == shtc3) {
if ((id_reg & SHTC3_ID_MASK) != SHTC3_ID) {
dev_err(dev, "SHTC3 ID register does not match\n");
return -ENODEV;
}
} else if ((id_reg & SHTC1_ID_MASK) != SHTC1_ID) {
dev_err(dev, "SHTC1 ID register does not match\n");
return -ENODEV;
}
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->setup.blocking_io = false;
data->setup.high_precision = true;
data->client = client;
data->chip = chip;
if (np) {
data->setup.blocking_io = of_property_read_bool(np, "sensirion,blocking-io");
data->setup.high_precision = !of_property_read_bool(np, "sensicon,low-precision");
} else {
if (client->dev.platform_data)
data->setup = *(struct shtc1_platform_data *)dev->platform_data;
}
shtc1_select_command(data);
mutex_init(&data->update_lock);
hwmon_dev = devm_hwmon_device_register_with_groups(dev,
client->name,
data,
shtc1_groups);
if (IS_ERR(hwmon_dev))
dev_dbg(dev, "unable to register hwmon device\n");
return PTR_ERR_OR_ZERO(hwmon_dev);
}
/* device ID table */
static const struct i2c_device_id shtc1_id[] = {
{ "shtc1", shtc1 },
{ "shtw1", shtc1 },
{ "shtc3", shtc3 },
{ }
};
MODULE_DEVICE_TABLE(i2c, shtc1_id);
static const struct of_device_id shtc1_of_match[] = {
{ .compatible = "sensirion,shtc1" },
{ .compatible = "sensirion,shtw1" },
{ .compatible = "sensirion,shtc3" },
{ }
};
MODULE_DEVICE_TABLE(of, shtc1_of_match);
static struct i2c_driver shtc1_i2c_driver = {
.driver = {
.name = "shtc1",
.of_match_table = shtc1_of_match,
},
.probe = shtc1_probe,
.id_table = shtc1_id,
};
module_i2c_driver(shtc1_i2c_driver);
MODULE_AUTHOR("Johannes Winkelmann <[email protected]>");
MODULE_DESCRIPTION("Sensirion SHTC1 humidity and temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/shtc1.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2011 David George <[email protected]>
*
* based on adm1021.c
* some credit to Christoph Scheurer, but largely a rewrite
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
/* Addresses to scan */
static const unsigned short max1668_addr_list[] = {
0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
/* max1668 registers */
#define MAX1668_REG_TEMP(nr) (nr)
#define MAX1668_REG_STAT1 0x05
#define MAX1668_REG_STAT2 0x06
#define MAX1668_REG_MAN_ID 0xfe
#define MAX1668_REG_DEV_ID 0xff
/* limits */
/* write high limits */
#define MAX1668_REG_LIMH_WR(nr) (0x13 + 2 * (nr))
/* write low limits */
#define MAX1668_REG_LIML_WR(nr) (0x14 + 2 * (nr))
/* read high limits */
#define MAX1668_REG_LIMH_RD(nr) (0x08 + 2 * (nr))
/* read low limits */
#define MAX1668_REG_LIML_RD(nr) (0x09 + 2 * (nr))
/* manufacturer and device ID Constants */
#define MAN_ID_MAXIM 0x4d
#define DEV_ID_MAX1668 0x3
#define DEV_ID_MAX1805 0x5
#define DEV_ID_MAX1989 0xb
/* read only mode module parameter */
static bool read_only;
module_param(read_only, bool, 0);
MODULE_PARM_DESC(read_only, "Don't set any values, read only mode");
enum chips { max1668, max1805, max1989 };
struct max1668_data {
struct i2c_client *client;
const struct attribute_group *groups[3];
enum chips type;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
/* 1x local and 4x remote */
s8 temp_max[5];
s8 temp_min[5];
s8 temp[5];
u16 alarms;
};
static struct max1668_data *max1668_update_device(struct device *dev)
{
struct max1668_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
struct max1668_data *ret = data;
s32 val;
int i;
mutex_lock(&data->update_lock);
if (data->valid && !time_after(jiffies,
data->last_updated + HZ + HZ / 2))
goto abort;
for (i = 0; i < 5; i++) {
val = i2c_smbus_read_byte_data(client, MAX1668_REG_TEMP(i));
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp[i] = (s8) val;
val = i2c_smbus_read_byte_data(client, MAX1668_REG_LIMH_RD(i));
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp_max[i] = (s8) val;
val = i2c_smbus_read_byte_data(client, MAX1668_REG_LIML_RD(i));
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->temp_min[i] = (s8) val;
}
val = i2c_smbus_read_byte_data(client, MAX1668_REG_STAT1);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->alarms = val << 8;
val = i2c_smbus_read_byte_data(client, MAX1668_REG_STAT2);
if (unlikely(val < 0)) {
ret = ERR_PTR(val);
goto abort;
}
data->alarms |= val;
data->last_updated = jiffies;
data->valid = true;
abort:
mutex_unlock(&data->update_lock);
return ret;
}
static ssize_t show_temp(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct max1668_data *data = max1668_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->temp[index] * 1000);
}
static ssize_t show_temp_max(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct max1668_data *data = max1668_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->temp_max[index] * 1000);
}
static ssize_t show_temp_min(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct max1668_data *data = max1668_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->temp_min[index] * 1000);
}
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
char *buf)
{
int index = to_sensor_dev_attr(attr)->index;
struct max1668_data *data = max1668_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n", (data->alarms >> index) & 0x1);
}
static ssize_t show_fault(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct max1668_data *data = max1668_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%u\n",
(data->alarms & (1 << 12)) && data->temp[index] == 127);
}
static ssize_t set_temp_max(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
int index = to_sensor_dev_attr(devattr)->index;
struct max1668_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long temp;
int ret;
ret = kstrtol(buf, 10, &temp);
if (ret < 0)
return ret;
mutex_lock(&data->update_lock);
data->temp_max[index] = clamp_val(temp/1000, -128, 127);
ret = i2c_smbus_write_byte_data(client,
MAX1668_REG_LIMH_WR(index),
data->temp_max[index]);
if (ret < 0)
count = ret;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t set_temp_min(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
int index = to_sensor_dev_attr(devattr)->index;
struct max1668_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
long temp;
int ret;
ret = kstrtol(buf, 10, &temp);
if (ret < 0)
return ret;
mutex_lock(&data->update_lock);
data->temp_min[index] = clamp_val(temp/1000, -128, 127);
ret = i2c_smbus_write_byte_data(client,
MAX1668_REG_LIML_WR(index),
data->temp_min[index]);
if (ret < 0)
count = ret;
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max,
set_temp_max, 0);
static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO, show_temp_min,
set_temp_min, 0);
static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO, show_temp_max,
set_temp_max, 1);
static SENSOR_DEVICE_ATTR(temp2_min, S_IRUGO, show_temp_min,
set_temp_min, 1);
static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO, show_temp_max,
set_temp_max, 2);
static SENSOR_DEVICE_ATTR(temp3_min, S_IRUGO, show_temp_min,
set_temp_min, 2);
static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3);
static SENSOR_DEVICE_ATTR(temp4_max, S_IRUGO, show_temp_max,
set_temp_max, 3);
static SENSOR_DEVICE_ATTR(temp4_min, S_IRUGO, show_temp_min,
set_temp_min, 3);
static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4);
static SENSOR_DEVICE_ATTR(temp5_max, S_IRUGO, show_temp_max,
set_temp_max, 4);
static SENSOR_DEVICE_ATTR(temp5_min, S_IRUGO, show_temp_min,
set_temp_min, 4);
static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 14);
static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, 13);
static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO, show_alarm, NULL, 7);
static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 6);
static SENSOR_DEVICE_ATTR(temp3_min_alarm, S_IRUGO, show_alarm, NULL, 5);
static SENSOR_DEVICE_ATTR(temp3_max_alarm, S_IRUGO, show_alarm, NULL, 4);
static SENSOR_DEVICE_ATTR(temp4_min_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(temp4_max_alarm, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(temp5_min_alarm, S_IRUGO, show_alarm, NULL, 1);
static SENSOR_DEVICE_ATTR(temp5_max_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_fault, NULL, 1);
static SENSOR_DEVICE_ATTR(temp3_fault, S_IRUGO, show_fault, NULL, 2);
static SENSOR_DEVICE_ATTR(temp4_fault, S_IRUGO, show_fault, NULL, 3);
static SENSOR_DEVICE_ATTR(temp5_fault, S_IRUGO, show_fault, NULL, 4);
/* Attributes common to MAX1668, MAX1989 and MAX1805 */
static struct attribute *max1668_attribute_common[] = {
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
NULL
};
/* Attributes not present on MAX1805 */
static struct attribute *max1668_attribute_unique[] = {
&sensor_dev_attr_temp4_max.dev_attr.attr,
&sensor_dev_attr_temp4_min.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_temp5_max.dev_attr.attr,
&sensor_dev_attr_temp5_min.dev_attr.attr,
&sensor_dev_attr_temp5_input.dev_attr.attr,
&sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
&sensor_dev_attr_temp5_min_alarm.dev_attr.attr,
&sensor_dev_attr_temp4_fault.dev_attr.attr,
&sensor_dev_attr_temp5_fault.dev_attr.attr,
NULL
};
static umode_t max1668_attribute_mode(struct kobject *kobj,
struct attribute *attr, int index)
{
umode_t ret = S_IRUGO;
if (read_only)
return ret;
if (attr == &sensor_dev_attr_temp1_max.dev_attr.attr ||
attr == &sensor_dev_attr_temp2_max.dev_attr.attr ||
attr == &sensor_dev_attr_temp3_max.dev_attr.attr ||
attr == &sensor_dev_attr_temp4_max.dev_attr.attr ||
attr == &sensor_dev_attr_temp5_max.dev_attr.attr ||
attr == &sensor_dev_attr_temp1_min.dev_attr.attr ||
attr == &sensor_dev_attr_temp2_min.dev_attr.attr ||
attr == &sensor_dev_attr_temp3_min.dev_attr.attr ||
attr == &sensor_dev_attr_temp4_min.dev_attr.attr ||
attr == &sensor_dev_attr_temp5_min.dev_attr.attr)
ret |= S_IWUSR;
return ret;
}
static const struct attribute_group max1668_group_common = {
.attrs = max1668_attribute_common,
.is_visible = max1668_attribute_mode
};
static const struct attribute_group max1668_group_unique = {
.attrs = max1668_attribute_unique,
.is_visible = max1668_attribute_mode
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int max1668_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
const char *type_name;
int man_id, dev_id;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* Check for unsupported part */
man_id = i2c_smbus_read_byte_data(client, MAX1668_REG_MAN_ID);
if (man_id != MAN_ID_MAXIM)
return -ENODEV;
dev_id = i2c_smbus_read_byte_data(client, MAX1668_REG_DEV_ID);
if (dev_id < 0)
return -ENODEV;
type_name = NULL;
if (dev_id == DEV_ID_MAX1668)
type_name = "max1668";
else if (dev_id == DEV_ID_MAX1805)
type_name = "max1805";
else if (dev_id == DEV_ID_MAX1989)
type_name = "max1989";
if (!type_name)
return -ENODEV;
strscpy(info->type, type_name, I2C_NAME_SIZE);
return 0;
}
static const struct i2c_device_id max1668_id[];
static int max1668_probe(struct i2c_client *client)
{
struct i2c_adapter *adapter = client->adapter;
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct max1668_data *data;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
data = devm_kzalloc(dev, sizeof(struct max1668_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
data->type = i2c_match_id(max1668_id, client)->driver_data;
mutex_init(&data->update_lock);
/* sysfs hooks */
data->groups[0] = &max1668_group_common;
if (data->type == max1668 || data->type == max1989)
data->groups[1] = &max1668_group_unique;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id max1668_id[] = {
{ "max1668", max1668 },
{ "max1805", max1805 },
{ "max1989", max1989 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max1668_id);
/* This is the driver that will be inserted */
static struct i2c_driver max1668_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "max1668",
},
.probe = max1668_probe,
.id_table = max1668_id,
.detect = max1668_detect,
.address_list = max1668_addr_list,
};
module_i2c_driver(max1668_driver);
MODULE_AUTHOR("David George <[email protected]>");
MODULE_DESCRIPTION("MAX1668 remote temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max1668.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* tmp401.c
*
* Copyright (C) 2007,2008 Hans de Goede <[email protected]>
* Preliminary tmp411 support by:
* Gabriel Konat, Sander Leget, Wouter Willems
* Copyright (C) 2009 Andre Prendel <[email protected]>
*
* Cleanup and support for TMP431 and TMP432 by Guenter Roeck
* Copyright (c) 2013 Guenter Roeck <[email protected]>
*/
/*
* Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
*
* Note this IC is in some aspect similar to the LM90, but it has quite a
* few differences too, for example the local temp has a higher resolution
* and thus has 16 bits registers for its value and limit instead of 8 bits.
*/
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/slab.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
0x4e, 0x4f, I2C_CLIENT_END };
enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 };
/*
* The TMP401 registers, note some registers have different addresses for
* reading and writing
*/
#define TMP401_STATUS 0x02
#define TMP401_CONFIG 0x03
#define TMP401_CONVERSION_RATE 0x04
#define TMP4XX_N_FACTOR_REG 0x18
#define TMP43X_BETA_RANGE 0x25
#define TMP401_TEMP_CRIT_HYST 0x21
#define TMP401_MANUFACTURER_ID_REG 0xFE
#define TMP401_DEVICE_ID_REG 0xFF
static const u8 TMP401_TEMP_MSB[7][3] = {
{ 0x00, 0x01, 0x23 }, /* temp */
{ 0x06, 0x08, 0x16 }, /* low limit */
{ 0x05, 0x07, 0x15 }, /* high limit */
{ 0x20, 0x19, 0x1a }, /* therm (crit) limit */
{ 0x30, 0x34, 0x00 }, /* lowest */
{ 0x32, 0xf6, 0x00 }, /* highest */
};
/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
static const u8 TMP432_STATUS_REG[] = {
0x1b, 0x36, 0x35, 0x37 };
/* Flags */
#define TMP401_CONFIG_RANGE BIT(2)
#define TMP401_CONFIG_SHUTDOWN BIT(6)
#define TMP401_STATUS_LOCAL_CRIT BIT(0)
#define TMP401_STATUS_REMOTE_CRIT BIT(1)
#define TMP401_STATUS_REMOTE_OPEN BIT(2)
#define TMP401_STATUS_REMOTE_LOW BIT(3)
#define TMP401_STATUS_REMOTE_HIGH BIT(4)
#define TMP401_STATUS_LOCAL_LOW BIT(5)
#define TMP401_STATUS_LOCAL_HIGH BIT(6)
/* On TMP432, each status has its own register */
#define TMP432_STATUS_LOCAL BIT(0)
#define TMP432_STATUS_REMOTE1 BIT(1)
#define TMP432_STATUS_REMOTE2 BIT(2)
/* Manufacturer / Device ID's */
#define TMP401_MANUFACTURER_ID 0x55
#define TMP401_DEVICE_ID 0x11
#define TMP411A_DEVICE_ID 0x12
#define TMP411B_DEVICE_ID 0x13
#define TMP411C_DEVICE_ID 0x10
#define TMP431_DEVICE_ID 0x31
#define TMP432_DEVICE_ID 0x32
#define TMP435_DEVICE_ID 0x35
/*
* Driver data (common to all clients)
*/
static const struct i2c_device_id tmp401_id[] = {
{ "tmp401", tmp401 },
{ "tmp411", tmp411 },
{ "tmp431", tmp431 },
{ "tmp432", tmp432 },
{ "tmp435", tmp435 },
{ }
};
MODULE_DEVICE_TABLE(i2c, tmp401_id);
/*
* Client data (each client gets its own)
*/
struct tmp401_data {
struct i2c_client *client;
struct regmap *regmap;
struct mutex update_lock;
enum chips kind;
bool extended_range;
/* hwmon API configuration data */
u32 chip_channel_config[4];
struct hwmon_channel_info chip_info;
u32 temp_channel_config[4];
struct hwmon_channel_info temp_info;
const struct hwmon_channel_info *info[3];
struct hwmon_chip_info chip;
};
/* regmap */
static bool tmp401_regmap_is_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case 0: /* local temp msb */
case 1: /* remote temp msb */
case 2: /* status */
case 0x10: /* remote temp lsb */
case 0x15: /* local temp lsb */
case 0x1b: /* status (tmp432) */
case 0x23 ... 0x24: /* remote temp 2 msb / lsb */
case 0x30 ... 0x37: /* lowest/highest temp; status (tmp432) */
return true;
default:
return false;
}
}
static int tmp401_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct tmp401_data *data = context;
struct i2c_client *client = data->client;
int regval;
switch (reg) {
case 0: /* local temp msb */
case 1: /* remote temp msb */
case 5: /* local temp high limit msb */
case 6: /* local temp low limit msb */
case 7: /* remote temp ligh limit msb */
case 8: /* remote temp low limit msb */
case 0x15: /* remote temp 2 high limit msb */
case 0x16: /* remote temp 2 low limit msb */
case 0x23: /* remote temp 2 msb */
case 0x30: /* local temp minimum, tmp411 */
case 0x32: /* local temp maximum, tmp411 */
case 0x34: /* remote temp minimum, tmp411 */
case 0xf6: /* remote temp maximum, tmp411 (really 0x36) */
/* work around register overlap between TMP411 and TMP432 */
if (reg == 0xf6)
reg = 0x36;
regval = i2c_smbus_read_word_swapped(client, reg);
if (regval < 0)
return regval;
*val = regval;
break;
case 0x19: /* critical limits, 8-bit registers */
case 0x1a:
case 0x20:
regval = i2c_smbus_read_byte_data(client, reg);
if (regval < 0)
return regval;
*val = regval << 8;
break;
case 0x1b:
case 0x35 ... 0x37:
if (data->kind == tmp432) {
regval = i2c_smbus_read_byte_data(client, reg);
if (regval < 0)
return regval;
*val = regval;
break;
}
/* simulate TMP432 status registers */
regval = i2c_smbus_read_byte_data(client, TMP401_STATUS);
if (regval < 0)
return regval;
*val = 0;
switch (reg) {
case 0x1b: /* open / fault */
if (regval & TMP401_STATUS_REMOTE_OPEN)
*val |= BIT(1);
break;
case 0x35: /* high limit */
if (regval & TMP401_STATUS_LOCAL_HIGH)
*val |= BIT(0);
if (regval & TMP401_STATUS_REMOTE_HIGH)
*val |= BIT(1);
break;
case 0x36: /* low limit */
if (regval & TMP401_STATUS_LOCAL_LOW)
*val |= BIT(0);
if (regval & TMP401_STATUS_REMOTE_LOW)
*val |= BIT(1);
break;
case 0x37: /* therm / crit limit */
if (regval & TMP401_STATUS_LOCAL_CRIT)
*val |= BIT(0);
if (regval & TMP401_STATUS_REMOTE_CRIT)
*val |= BIT(1);
break;
}
break;
default:
regval = i2c_smbus_read_byte_data(client, reg);
if (regval < 0)
return regval;
*val = regval;
break;
}
return 0;
}
static int tmp401_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct tmp401_data *data = context;
struct i2c_client *client = data->client;
switch (reg) {
case 0x05: /* local temp high limit msb */
case 0x06: /* local temp low limit msb */
case 0x07: /* remote temp ligh limit msb */
case 0x08: /* remote temp low limit msb */
reg += 6; /* adjust for register write address */
fallthrough;
case 0x15: /* remote temp 2 high limit msb */
case 0x16: /* remote temp 2 low limit msb */
return i2c_smbus_write_word_swapped(client, reg, val);
case 0x19: /* critical limits, 8-bit registers */
case 0x1a:
case 0x20:
return i2c_smbus_write_byte_data(client, reg, val >> 8);
case TMP401_CONVERSION_RATE:
case TMP401_CONFIG:
reg += 6; /* adjust for register write address */
fallthrough;
default:
return i2c_smbus_write_byte_data(client, reg, val);
}
}
static const struct regmap_config tmp401_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = tmp401_regmap_is_volatile,
.reg_read = tmp401_reg_read,
.reg_write = tmp401_reg_write,
};
/* temperature conversion */
static int tmp401_register_to_temp(u16 reg, bool extended)
{
int temp = reg;
if (extended)
temp -= 64 * 256;
return DIV_ROUND_CLOSEST(temp * 125, 32);
}
static u16 tmp401_temp_to_register(long temp, bool extended, int zbits)
{
if (extended) {
temp = clamp_val(temp, -64000, 191000);
temp += 64000;
} else {
temp = clamp_val(temp, 0, 127000);
}
return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
}
/* hwmon API functions */
static const u8 tmp401_temp_reg_index[] = {
[hwmon_temp_input] = 0,
[hwmon_temp_min] = 1,
[hwmon_temp_max] = 2,
[hwmon_temp_crit] = 3,
[hwmon_temp_lowest] = 4,
[hwmon_temp_highest] = 5,
};
static const u8 tmp401_status_reg_index[] = {
[hwmon_temp_fault] = 0,
[hwmon_temp_min_alarm] = 1,
[hwmon_temp_max_alarm] = 2,
[hwmon_temp_crit_alarm] = 3,
};
static int tmp401_temp_read(struct device *dev, u32 attr, int channel, long *val)
{
struct tmp401_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
unsigned int regval;
int reg, ret;
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_min:
case hwmon_temp_max:
case hwmon_temp_crit:
case hwmon_temp_lowest:
case hwmon_temp_highest:
reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
ret = regmap_read(regmap, reg, ®val);
if (ret < 0)
return ret;
*val = tmp401_register_to_temp(regval, data->extended_range);
break;
case hwmon_temp_crit_hyst:
mutex_lock(&data->update_lock);
reg = TMP401_TEMP_MSB[3][channel];
ret = regmap_read(regmap, reg, ®val);
if (ret < 0)
goto unlock;
*val = tmp401_register_to_temp(regval, data->extended_range);
ret = regmap_read(regmap, TMP401_TEMP_CRIT_HYST, ®val);
if (ret < 0)
goto unlock;
*val -= regval * 1000;
unlock:
mutex_unlock(&data->update_lock);
if (ret < 0)
return ret;
break;
case hwmon_temp_fault:
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
reg = TMP432_STATUS_REG[tmp401_status_reg_index[attr]];
ret = regmap_read(regmap, reg, ®val);
if (ret < 0)
return ret;
*val = !!(regval & BIT(channel));
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int tmp401_temp_write(struct device *dev, u32 attr, int channel,
long val)
{
struct tmp401_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
unsigned int regval;
int reg, ret, temp;
mutex_lock(&data->update_lock);
switch (attr) {
case hwmon_temp_min:
case hwmon_temp_max:
case hwmon_temp_crit:
reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
regval = tmp401_temp_to_register(val, data->extended_range,
attr == hwmon_temp_crit ? 8 : 4);
ret = regmap_write(regmap, reg, regval);
break;
case hwmon_temp_crit_hyst:
if (data->extended_range)
val = clamp_val(val, -64000, 191000);
else
val = clamp_val(val, 0, 127000);
reg = TMP401_TEMP_MSB[3][channel];
ret = regmap_read(regmap, reg, ®val);
if (ret < 0)
break;
temp = tmp401_register_to_temp(regval, data->extended_range);
val = clamp_val(val, temp - 255000, temp);
regval = ((temp - val) + 500) / 1000;
ret = regmap_write(regmap, TMP401_TEMP_CRIT_HYST, regval);
break;
default:
ret = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return ret;
}
static int tmp401_chip_read(struct device *dev, u32 attr, int channel, long *val)
{
struct tmp401_data *data = dev_get_drvdata(dev);
u32 regval;
int ret;
switch (attr) {
case hwmon_chip_update_interval:
ret = regmap_read(data->regmap, TMP401_CONVERSION_RATE, ®val);
if (ret < 0)
return ret;
*val = (1 << (7 - regval)) * 125;
break;
case hwmon_chip_temp_reset_history:
*val = 0;
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int tmp401_set_convrate(struct regmap *regmap, long val)
{
int rate;
/*
* For valid rates, interval can be calculated as
* interval = (1 << (7 - rate)) * 125;
* Rounded rate is therefore
* rate = 7 - __fls(interval * 4 / (125 * 3));
* Use clamp_val() to avoid overflows, and to ensure valid input
* for __fls.
*/
val = clamp_val(val, 125, 16000);
rate = 7 - __fls(val * 4 / (125 * 3));
return regmap_write(regmap, TMP401_CONVERSION_RATE, rate);
}
static int tmp401_chip_write(struct device *dev, u32 attr, int channel, long val)
{
struct tmp401_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
int err;
mutex_lock(&data->update_lock);
switch (attr) {
case hwmon_chip_update_interval:
err = tmp401_set_convrate(regmap, val);
break;
case hwmon_chip_temp_reset_history:
if (val != 1) {
err = -EINVAL;
break;
}
/*
* Reset history by writing any value to any of the
* minimum/maximum registers (0x30-0x37).
*/
err = regmap_write(regmap, 0x30, 0);
break;
default:
err = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return err;
}
static int tmp401_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_chip:
return tmp401_chip_read(dev, attr, channel, val);
case hwmon_temp:
return tmp401_temp_read(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int tmp401_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_chip:
return tmp401_chip_write(dev, attr, channel, val);
case hwmon_temp:
return tmp401_temp_write(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t tmp401_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_update_interval:
case hwmon_chip_temp_reset_history:
return 0644;
default:
break;
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
case hwmon_temp_fault:
case hwmon_temp_lowest:
case hwmon_temp_highest:
return 0444;
case hwmon_temp_min:
case hwmon_temp_max:
case hwmon_temp_crit:
case hwmon_temp_crit_hyst:
return 0644;
default:
break;
}
break;
default:
break;
}
return 0;
}
static const struct hwmon_ops tmp401_ops = {
.is_visible = tmp401_is_visible,
.read = tmp401_read,
.write = tmp401_write,
};
/* chip initialization, detect, probe */
static int tmp401_init_client(struct tmp401_data *data)
{
struct regmap *regmap = data->regmap;
u32 config, config_orig;
int ret;
u32 val = 0;
s32 nfactor = 0;
/* Set conversion rate to 2 Hz */
ret = regmap_write(regmap, TMP401_CONVERSION_RATE, 5);
if (ret < 0)
return ret;
/* Start conversions (disable shutdown if necessary) */
ret = regmap_read(regmap, TMP401_CONFIG, &config);
if (ret < 0)
return ret;
config_orig = config;
config &= ~TMP401_CONFIG_SHUTDOWN;
if (of_property_read_bool(data->client->dev.of_node, "ti,extended-range-enable")) {
/* Enable measurement over extended temperature range */
config |= TMP401_CONFIG_RANGE;
}
data->extended_range = !!(config & TMP401_CONFIG_RANGE);
if (config != config_orig) {
ret = regmap_write(regmap, TMP401_CONFIG, config);
if (ret < 0)
return ret;
}
ret = of_property_read_u32(data->client->dev.of_node, "ti,n-factor", &nfactor);
if (!ret) {
if (data->kind == tmp401) {
dev_err(&data->client->dev, "ti,tmp401 does not support n-factor correction\n");
return -EINVAL;
}
if (nfactor < -128 || nfactor > 127) {
dev_err(&data->client->dev, "n-factor is invalid (%d)\n", nfactor);
return -EINVAL;
}
ret = regmap_write(regmap, TMP4XX_N_FACTOR_REG, (unsigned int)nfactor);
if (ret < 0)
return ret;
}
ret = of_property_read_u32(data->client->dev.of_node, "ti,beta-compensation", &val);
if (!ret) {
if (data->kind == tmp401 || data->kind == tmp411) {
dev_err(&data->client->dev, "ti,tmp401 or ti,tmp411 does not support beta compensation\n");
return -EINVAL;
}
if (val > 15) {
dev_err(&data->client->dev, "beta-compensation is invalid (%u)\n", val);
return -EINVAL;
}
ret = regmap_write(regmap, TMP43X_BETA_RANGE, val);
if (ret < 0)
return ret;
}
return 0;
}
static int tmp401_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
enum chips kind;
struct i2c_adapter *adapter = client->adapter;
u8 reg;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* Detect and identify the chip */
reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
if (reg != TMP401_MANUFACTURER_ID)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
switch (reg) {
case TMP401_DEVICE_ID:
if (client->addr != 0x4c)
return -ENODEV;
kind = tmp401;
break;
case TMP411A_DEVICE_ID:
if (client->addr != 0x4c)
return -ENODEV;
kind = tmp411;
break;
case TMP411B_DEVICE_ID:
if (client->addr != 0x4d)
return -ENODEV;
kind = tmp411;
break;
case TMP411C_DEVICE_ID:
if (client->addr != 0x4e)
return -ENODEV;
kind = tmp411;
break;
case TMP431_DEVICE_ID:
if (client->addr != 0x4c && client->addr != 0x4d)
return -ENODEV;
kind = tmp431;
break;
case TMP432_DEVICE_ID:
if (client->addr != 0x4c && client->addr != 0x4d)
return -ENODEV;
kind = tmp432;
break;
case TMP435_DEVICE_ID:
kind = tmp435;
break;
default:
return -ENODEV;
}
reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG);
if (reg & 0x1b)
return -ENODEV;
reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE);
/* Datasheet says: 0x1-0x6 */
if (reg > 15)
return -ENODEV;
strscpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
return 0;
}
static int tmp401_probe(struct i2c_client *client)
{
static const char * const names[] = {
"TMP401", "TMP411", "TMP431", "TMP432", "TMP435"
};
struct device *dev = &client->dev;
struct hwmon_channel_info *info;
struct device *hwmon_dev;
struct tmp401_data *data;
int status;
data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
data->kind = i2c_match_id(tmp401_id, client)->driver_data;
data->regmap = devm_regmap_init(dev, NULL, data, &tmp401_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
/* initialize configuration data */
data->chip.ops = &tmp401_ops;
data->chip.info = data->info;
data->info[0] = &data->chip_info;
data->info[1] = &data->temp_info;
info = &data->chip_info;
info->type = hwmon_chip;
info->config = data->chip_channel_config;
data->chip_channel_config[0] = HWMON_C_UPDATE_INTERVAL;
info = &data->temp_info;
info->type = hwmon_temp;
info->config = data->temp_channel_config;
data->temp_channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
data->temp_channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
if (data->kind == tmp411) {
data->temp_channel_config[0] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
data->temp_channel_config[1] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
data->chip_channel_config[0] |= HWMON_C_TEMP_RESET_HISTORY;
}
if (data->kind == tmp432) {
data->temp_channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
}
/* Initialize the TMP401 chip */
status = tmp401_init_client(data);
if (status < 0)
return status;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
&data->chip, NULL);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
return 0;
}
static const struct of_device_id __maybe_unused tmp4xx_of_match[] = {
{ .compatible = "ti,tmp401", },
{ .compatible = "ti,tmp411", },
{ .compatible = "ti,tmp431", },
{ .compatible = "ti,tmp432", },
{ .compatible = "ti,tmp435", },
{ },
};
MODULE_DEVICE_TABLE(of, tmp4xx_of_match);
static struct i2c_driver tmp401_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "tmp401",
.of_match_table = of_match_ptr(tmp4xx_of_match),
},
.probe = tmp401_probe,
.id_table = tmp401_id,
.detect = tmp401_detect,
.address_list = normal_i2c,
};
module_i2c_driver(tmp401_driver);
MODULE_AUTHOR("Hans de Goede <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/tmp401.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* gl518sm.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
* Copyright (C) 1998, 1999 Frodo Looijaard <[email protected]> and
* Kyosti Malkki <[email protected]>
* Copyright (C) 2004 Hong-Gunn Chew <[email protected]> and
* Jean Delvare <[email protected]>
*
* Ported to Linux 2.6 by Hong-Gunn Chew with the help of Jean Delvare
* and advice of Greg Kroah-Hartman.
*
* Notes about the port:
* Release 0x00 of the GL518SM chipset doesn't support reading of in0,
* in1 nor in2. The original driver had an ugly workaround to get them
* anyway (changing limits and watching alarms trigger and wear off).
* We did not keep that part of the original driver in the Linux 2.6
* version, since it was making the driver significantly more complex
* with no real benefit.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };
enum chips { gl518sm_r00, gl518sm_r80 };
/* Many GL518 constants specified below */
/* The GL518 registers */
#define GL518_REG_CHIP_ID 0x00
#define GL518_REG_REVISION 0x01
#define GL518_REG_VENDOR_ID 0x02
#define GL518_REG_CONF 0x03
#define GL518_REG_TEMP_IN 0x04
#define GL518_REG_TEMP_MAX 0x05
#define GL518_REG_TEMP_HYST 0x06
#define GL518_REG_FAN_COUNT 0x07
#define GL518_REG_FAN_LIMIT 0x08
#define GL518_REG_VIN1_LIMIT 0x09
#define GL518_REG_VIN2_LIMIT 0x0a
#define GL518_REG_VIN3_LIMIT 0x0b
#define GL518_REG_VDD_LIMIT 0x0c
#define GL518_REG_VIN3 0x0d
#define GL518_REG_MISC 0x0f
#define GL518_REG_ALARM 0x10
#define GL518_REG_MASK 0x11
#define GL518_REG_INT 0x12
#define GL518_REG_VIN2 0x13
#define GL518_REG_VIN1 0x14
#define GL518_REG_VDD 0x15
/*
* Conversions. Rounding and limit checking is only done on the TO_REG
* variants. Note that you should be a bit careful with which arguments
* these macros are called: arguments may be evaluated more than once.
* Fixing this is just not worth it.
*/
#define RAW_FROM_REG(val) val
#define BOOL_FROM_REG(val) ((val) ? 0 : 1)
#define BOOL_TO_REG(val) ((val) ? 0 : 1)
#define TEMP_CLAMP(val) clamp_val(val, -119000, 136000)
#define TEMP_TO_REG(val) (DIV_ROUND_CLOSEST(TEMP_CLAMP(val), 1000) + 119)
#define TEMP_FROM_REG(val) (((val) - 119) * 1000)
static inline u8 FAN_TO_REG(long rpm, int div)
{
long rpmdiv;
if (rpm == 0)
return 0;
rpmdiv = clamp_val(rpm, 1, 960000) * div;
return clamp_val((480000 + rpmdiv / 2) / rpmdiv, 1, 255);
}
#define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : (480000 / ((val) * (div))))
#define IN_CLAMP(val) clamp_val(val, 0, 255 * 19)
#define IN_TO_REG(val) DIV_ROUND_CLOSEST(IN_CLAMP(val), 19)
#define IN_FROM_REG(val) ((val) * 19)
#define VDD_CLAMP(val) clamp_val(val, 0, 255 * 95 / 4)
#define VDD_TO_REG(val) DIV_ROUND_CLOSEST(VDD_CLAMP(val) * 4, 95)
#define VDD_FROM_REG(val) DIV_ROUND_CLOSEST((val) * 95, 4)
#define DIV_FROM_REG(val) (1 << (val))
#define BEEP_MASK_TO_REG(val) ((val) & 0x7f & data->alarm_mask)
#define BEEP_MASK_FROM_REG(val) ((val) & 0x7f)
/* Each client has this additional data */
struct gl518_data {
struct i2c_client *client;
const struct attribute_group *groups[3];
enum chips type;
struct mutex update_lock;
bool valid; /* true if following fields are valid */
unsigned long last_updated; /* In jiffies */
u8 voltage_in[4]; /* Register values; [0] = VDD */
u8 voltage_min[4]; /* Register values; [0] = VDD */
u8 voltage_max[4]; /* Register values; [0] = VDD */
u8 fan_in[2];
u8 fan_min[2];
u8 fan_div[2]; /* Register encoding, shifted right */
u8 fan_auto1; /* Boolean */
u8 temp_in; /* Register values */
u8 temp_max; /* Register values */
u8 temp_hyst; /* Register values */
u8 alarms; /* Register value */
u8 alarm_mask;
u8 beep_mask; /* Register value */
u8 beep_enable; /* Boolean */
};
/*
* Registers 0x07 to 0x0c are word-sized, others are byte-sized
* GL518 uses a high-byte first convention, which is exactly opposite to
* the SMBus standard.
*/
static int gl518_read_value(struct i2c_client *client, u8 reg)
{
if ((reg >= 0x07) && (reg <= 0x0c))
return i2c_smbus_read_word_swapped(client, reg);
else
return i2c_smbus_read_byte_data(client, reg);
}
static int gl518_write_value(struct i2c_client *client, u8 reg, u16 value)
{
if ((reg >= 0x07) && (reg <= 0x0c))
return i2c_smbus_write_word_swapped(client, reg, value);
else
return i2c_smbus_write_byte_data(client, reg, value);
}
static struct gl518_data *gl518_update_device(struct device *dev)
{
struct gl518_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int val;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
dev_dbg(&client->dev, "Starting gl518 update\n");
data->alarms = gl518_read_value(client, GL518_REG_INT);
data->beep_mask = gl518_read_value(client, GL518_REG_ALARM);
val = gl518_read_value(client, GL518_REG_VDD_LIMIT);
data->voltage_min[0] = val & 0xff;
data->voltage_max[0] = (val >> 8) & 0xff;
val = gl518_read_value(client, GL518_REG_VIN1_LIMIT);
data->voltage_min[1] = val & 0xff;
data->voltage_max[1] = (val >> 8) & 0xff;
val = gl518_read_value(client, GL518_REG_VIN2_LIMIT);
data->voltage_min[2] = val & 0xff;
data->voltage_max[2] = (val >> 8) & 0xff;
val = gl518_read_value(client, GL518_REG_VIN3_LIMIT);
data->voltage_min[3] = val & 0xff;
data->voltage_max[3] = (val >> 8) & 0xff;
val = gl518_read_value(client, GL518_REG_FAN_COUNT);
data->fan_in[0] = (val >> 8) & 0xff;
data->fan_in[1] = val & 0xff;
val = gl518_read_value(client, GL518_REG_FAN_LIMIT);
data->fan_min[0] = (val >> 8) & 0xff;
data->fan_min[1] = val & 0xff;
data->temp_in = gl518_read_value(client, GL518_REG_TEMP_IN);
data->temp_max =
gl518_read_value(client, GL518_REG_TEMP_MAX);
data->temp_hyst =
gl518_read_value(client, GL518_REG_TEMP_HYST);
val = gl518_read_value(client, GL518_REG_MISC);
data->fan_div[0] = (val >> 6) & 0x03;
data->fan_div[1] = (val >> 4) & 0x03;
data->fan_auto1 = (val >> 3) & 0x01;
data->alarms &= data->alarm_mask;
val = gl518_read_value(client, GL518_REG_CONF);
data->beep_enable = (val >> 2) & 1;
if (data->type != gl518sm_r00) {
data->voltage_in[0] =
gl518_read_value(client, GL518_REG_VDD);
data->voltage_in[1] =
gl518_read_value(client, GL518_REG_VIN1);
data->voltage_in[2] =
gl518_read_value(client, GL518_REG_VIN2);
}
data->voltage_in[3] =
gl518_read_value(client, GL518_REG_VIN3);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* Sysfs stuff
*/
#define show(type, suffix, value) \
static ssize_t show_##suffix(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ \
struct gl518_data *data = gl518_update_device(dev); \
return sprintf(buf, "%d\n", type##_FROM_REG(data->value)); \
}
show(TEMP, temp_input1, temp_in);
show(TEMP, temp_max1, temp_max);
show(TEMP, temp_hyst1, temp_hyst);
show(BOOL, fan_auto1, fan_auto1);
show(VDD, in_input0, voltage_in[0]);
show(IN, in_input1, voltage_in[1]);
show(IN, in_input2, voltage_in[2]);
show(IN, in_input3, voltage_in[3]);
show(VDD, in_min0, voltage_min[0]);
show(IN, in_min1, voltage_min[1]);
show(IN, in_min2, voltage_min[2]);
show(IN, in_min3, voltage_min[3]);
show(VDD, in_max0, voltage_max[0]);
show(IN, in_max1, voltage_max[1]);
show(IN, in_max2, voltage_max[2]);
show(IN, in_max3, voltage_max[3]);
show(RAW, alarms, alarms);
show(BOOL, beep_enable, beep_enable);
show(BEEP_MASK, beep_mask, beep_mask);
static ssize_t fan_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct gl518_data *data = gl518_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_in[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_min_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct gl518_data *data = gl518_update_device(dev);
return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
DIV_FROM_REG(data->fan_div[nr])));
}
static ssize_t fan_div_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int nr = to_sensor_dev_attr(attr)->index;
struct gl518_data *data = gl518_update_device(dev);
return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
}
#define set(type, suffix, value, reg) \
static ssize_t set_##suffix(struct device *dev, \
struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
struct gl518_data *data = dev_get_drvdata(dev); \
struct i2c_client *client = data->client; \
long val; \
int err = kstrtol(buf, 10, &val); \
if (err) \
return err; \
\
mutex_lock(&data->update_lock); \
data->value = type##_TO_REG(val); \
gl518_write_value(client, reg, data->value); \
mutex_unlock(&data->update_lock); \
return count; \
}
#define set_bits(type, suffix, value, reg, mask, shift) \
static ssize_t set_##suffix(struct device *dev, \
struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
struct gl518_data *data = dev_get_drvdata(dev); \
struct i2c_client *client = data->client; \
int regvalue; \
unsigned long val; \
int err = kstrtoul(buf, 10, &val); \
if (err) \
return err; \
\
mutex_lock(&data->update_lock); \
regvalue = gl518_read_value(client, reg); \
data->value = type##_TO_REG(val); \
regvalue = (regvalue & ~mask) | (data->value << shift); \
gl518_write_value(client, reg, regvalue); \
mutex_unlock(&data->update_lock); \
return count; \
}
#define set_low(type, suffix, value, reg) \
set_bits(type, suffix, value, reg, 0x00ff, 0)
#define set_high(type, suffix, value, reg) \
set_bits(type, suffix, value, reg, 0xff00, 8)
set(TEMP, temp_max1, temp_max, GL518_REG_TEMP_MAX);
set(TEMP, temp_hyst1, temp_hyst, GL518_REG_TEMP_HYST);
set_bits(BOOL, fan_auto1, fan_auto1, GL518_REG_MISC, 0x08, 3);
set_low(VDD, in_min0, voltage_min[0], GL518_REG_VDD_LIMIT);
set_low(IN, in_min1, voltage_min[1], GL518_REG_VIN1_LIMIT);
set_low(IN, in_min2, voltage_min[2], GL518_REG_VIN2_LIMIT);
set_low(IN, in_min3, voltage_min[3], GL518_REG_VIN3_LIMIT);
set_high(VDD, in_max0, voltage_max[0], GL518_REG_VDD_LIMIT);
set_high(IN, in_max1, voltage_max[1], GL518_REG_VIN1_LIMIT);
set_high(IN, in_max2, voltage_max[2], GL518_REG_VIN2_LIMIT);
set_high(IN, in_max3, voltage_max[3], GL518_REG_VIN3_LIMIT);
set_bits(BOOL, beep_enable, beep_enable, GL518_REG_CONF, 0x04, 2);
set(BEEP_MASK, beep_mask, beep_mask, GL518_REG_ALARM);
static ssize_t fan_min_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct gl518_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int nr = to_sensor_dev_attr(attr)->index;
int regvalue;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
mutex_lock(&data->update_lock);
regvalue = gl518_read_value(client, GL518_REG_FAN_LIMIT);
data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
regvalue = (regvalue & (0xff << (8 * nr)))
| (data->fan_min[nr] << (8 * (1 - nr)));
gl518_write_value(client, GL518_REG_FAN_LIMIT, regvalue);
data->beep_mask = gl518_read_value(client, GL518_REG_ALARM);
if (data->fan_min[nr] == 0)
data->alarm_mask &= ~(0x20 << nr);
else
data->alarm_mask |= (0x20 << nr);
data->beep_mask &= data->alarm_mask;
gl518_write_value(client, GL518_REG_ALARM, data->beep_mask);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct gl518_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int nr = to_sensor_dev_attr(attr)->index;
int regvalue;
unsigned long val;
int err;
err = kstrtoul(buf, 10, &val);
if (err)
return err;
switch (val) {
case 1:
val = 0;
break;
case 2:
val = 1;
break;
case 4:
val = 2;
break;
case 8:
val = 3;
break;
default:
dev_err(dev,
"Invalid fan clock divider %lu, choose one of 1, 2, 4 or 8\n",
val);
return -EINVAL;
}
mutex_lock(&data->update_lock);
regvalue = gl518_read_value(client, GL518_REG_MISC);
data->fan_div[nr] = val;
regvalue = (regvalue & ~(0xc0 >> (2 * nr)))
| (data->fan_div[nr] << (6 - 2 * nr));
gl518_write_value(client, GL518_REG_MISC, regvalue);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR(temp1_input, 0444, show_temp_input1, NULL);
static DEVICE_ATTR(temp1_max, 0644, show_temp_max1, set_temp_max1);
static DEVICE_ATTR(temp1_max_hyst, 0644,
show_temp_hyst1, set_temp_hyst1);
static DEVICE_ATTR(fan1_auto, 0644, show_fan_auto1, set_fan_auto1);
static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
static DEVICE_ATTR(in0_input, 0444, show_in_input0, NULL);
static DEVICE_ATTR(in1_input, 0444, show_in_input1, NULL);
static DEVICE_ATTR(in2_input, 0444, show_in_input2, NULL);
static DEVICE_ATTR(in3_input, 0444, show_in_input3, NULL);
static DEVICE_ATTR(in0_min, 0644, show_in_min0, set_in_min0);
static DEVICE_ATTR(in1_min, 0644, show_in_min1, set_in_min1);
static DEVICE_ATTR(in2_min, 0644, show_in_min2, set_in_min2);
static DEVICE_ATTR(in3_min, 0644, show_in_min3, set_in_min3);
static DEVICE_ATTR(in0_max, 0644, show_in_max0, set_in_max0);
static DEVICE_ATTR(in1_max, 0644, show_in_max1, set_in_max1);
static DEVICE_ATTR(in2_max, 0644, show_in_max2, set_in_max2);
static DEVICE_ATTR(in3_max, 0644, show_in_max3, set_in_max3);
static DEVICE_ATTR(alarms, 0444, show_alarms, NULL);
static DEVICE_ATTR(beep_enable, 0644,
show_beep_enable, set_beep_enable);
static DEVICE_ATTR(beep_mask, 0644,
show_beep_mask, set_beep_mask);
static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct gl518_data *data = gl518_update_device(dev);
return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
}
static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 5);
static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 6);
static ssize_t beep_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
int bitnr = to_sensor_dev_attr(attr)->index;
struct gl518_data *data = gl518_update_device(dev);
return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
}
static ssize_t beep_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct gl518_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int bitnr = to_sensor_dev_attr(attr)->index;
unsigned long bit;
int err;
err = kstrtoul(buf, 10, &bit);
if (err)
return err;
if (bit & ~1)
return -EINVAL;
mutex_lock(&data->update_lock);
data->beep_mask = gl518_read_value(client, GL518_REG_ALARM);
if (bit)
data->beep_mask |= (1 << bitnr);
else
data->beep_mask &= ~(1 << bitnr);
gl518_write_value(client, GL518_REG_ALARM, data->beep_mask);
mutex_unlock(&data->update_lock);
return count;
}
static SENSOR_DEVICE_ATTR_RW(in0_beep, beep, 0);
static SENSOR_DEVICE_ATTR_RW(in1_beep, beep, 1);
static SENSOR_DEVICE_ATTR_RW(in2_beep, beep, 2);
static SENSOR_DEVICE_ATTR_RW(in3_beep, beep, 3);
static SENSOR_DEVICE_ATTR_RW(temp1_beep, beep, 4);
static SENSOR_DEVICE_ATTR_RW(fan1_beep, beep, 5);
static SENSOR_DEVICE_ATTR_RW(fan2_beep, beep, 6);
static struct attribute *gl518_attributes[] = {
&dev_attr_in3_input.attr,
&dev_attr_in0_min.attr,
&dev_attr_in1_min.attr,
&dev_attr_in2_min.attr,
&dev_attr_in3_min.attr,
&dev_attr_in0_max.attr,
&dev_attr_in1_max.attr,
&dev_attr_in2_max.attr,
&dev_attr_in3_max.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in0_beep.dev_attr.attr,
&sensor_dev_attr_in1_beep.dev_attr.attr,
&sensor_dev_attr_in2_beep.dev_attr.attr,
&sensor_dev_attr_in3_beep.dev_attr.attr,
&dev_attr_fan1_auto.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
&sensor_dev_attr_fan2_div.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_beep.dev_attr.attr,
&sensor_dev_attr_fan2_beep.dev_attr.attr,
&dev_attr_temp1_input.attr,
&dev_attr_temp1_max.attr,
&dev_attr_temp1_max_hyst.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_beep.dev_attr.attr,
&dev_attr_alarms.attr,
&dev_attr_beep_enable.attr,
&dev_attr_beep_mask.attr,
NULL
};
static const struct attribute_group gl518_group = {
.attrs = gl518_attributes,
};
static struct attribute *gl518_attributes_r80[] = {
&dev_attr_in0_input.attr,
&dev_attr_in1_input.attr,
&dev_attr_in2_input.attr,
NULL
};
static const struct attribute_group gl518_group_r80 = {
.attrs = gl518_attributes_r80,
};
/*
* Real code
*/
/* Return 0 if detection is successful, -ENODEV otherwise */
static int gl518_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int rev;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
/* Now, we do the remaining detection. */
if ((gl518_read_value(client, GL518_REG_CHIP_ID) != 0x80)
|| (gl518_read_value(client, GL518_REG_CONF) & 0x80))
return -ENODEV;
/* Determine the chip type. */
rev = gl518_read_value(client, GL518_REG_REVISION);
if (rev != 0x00 && rev != 0x80)
return -ENODEV;
strscpy(info->type, "gl518sm", I2C_NAME_SIZE);
return 0;
}
/*
* Called when we have found a new GL518SM.
* Note that we preserve D4:NoFan2 and D2:beep_enable.
*/
static void gl518_init_client(struct i2c_client *client)
{
/* Make sure we leave D7:Reset untouched */
u8 regvalue = gl518_read_value(client, GL518_REG_CONF) & 0x7f;
/* Comparator mode (D3=0), standby mode (D6=0) */
gl518_write_value(client, GL518_REG_CONF, (regvalue &= 0x37));
/* Never interrupts */
gl518_write_value(client, GL518_REG_MASK, 0x00);
/* Clear status register (D5=1), start (D6=1) */
gl518_write_value(client, GL518_REG_CONF, 0x20 | regvalue);
gl518_write_value(client, GL518_REG_CONF, 0x40 | regvalue);
}
static int gl518_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct gl518_data *data;
int revision;
data = devm_kzalloc(dev, sizeof(struct gl518_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
revision = gl518_read_value(client, GL518_REG_REVISION);
data->type = revision == 0x80 ? gl518sm_r80 : gl518sm_r00;
mutex_init(&data->update_lock);
/* Initialize the GL518SM chip */
data->alarm_mask = 0xff;
gl518_init_client(client);
/* sysfs hooks */
data->groups[0] = &gl518_group;
if (data->type == gl518sm_r80)
data->groups[1] = &gl518_group_r80;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data, data->groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id gl518_id[] = {
{ "gl518sm", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, gl518_id);
static struct i2c_driver gl518_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "gl518sm",
},
.probe = gl518_probe,
.id_table = gl518_id,
.detect = gl518_detect,
.address_list = normal_i2c,
};
module_i2c_driver(gl518_driver);
MODULE_AUTHOR("Frodo Looijaard <[email protected]>, "
"Kyosti Malkki <[email protected]> and "
"Hong-Gunn Chew <[email protected]>");
MODULE_DESCRIPTION("GL518SM driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/gl518sm.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* max6650.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring.
*
* (C) 2007 by Hans J. Koch <[email protected]>
*
* based on code written by John Morris <[email protected]>
* Copyright (c) 2003 Spirent Communications
* and Claus Gindhart <[email protected]>
*
* This module has only been tested with the MAX6650 chip. It should
* also work with the MAX6651. It does not distinguish max6650 and max6651
* chips.
*
* The datasheet was last seen at:
*
* http://pdfserv.maxim-ic.com/en/ds/MAX6650-MAX6651.pdf
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/of_device.h>
#include <linux/thermal.h>
/*
* Insmod parameters
*/
/* fan_voltage: 5=5V fan, 12=12V fan, 0=don't change */
static int fan_voltage;
/* prescaler: Possible values are 1, 2, 4, 8, 16 or 0 for don't change */
static int prescaler;
/* clock: The clock frequency of the chip (max6651 can be clocked externally) */
static int clock = 254000;
module_param(fan_voltage, int, 0444);
module_param(prescaler, int, 0444);
module_param(clock, int, 0444);
/*
* MAX 6650/6651 registers
*/
#define MAX6650_REG_SPEED 0x00
#define MAX6650_REG_CONFIG 0x02
#define MAX6650_REG_GPIO_DEF 0x04
#define MAX6650_REG_DAC 0x06
#define MAX6650_REG_ALARM_EN 0x08
#define MAX6650_REG_ALARM 0x0A
#define MAX6650_REG_TACH0 0x0C
#define MAX6650_REG_TACH1 0x0E
#define MAX6650_REG_TACH2 0x10
#define MAX6650_REG_TACH3 0x12
#define MAX6650_REG_GPIO_STAT 0x14
#define MAX6650_REG_COUNT 0x16
/*
* Config register bits
*/
#define MAX6650_CFG_V12 0x08
#define MAX6650_CFG_PRESCALER_MASK 0x07
#define MAX6650_CFG_PRESCALER_2 0x01
#define MAX6650_CFG_PRESCALER_4 0x02
#define MAX6650_CFG_PRESCALER_8 0x03
#define MAX6650_CFG_PRESCALER_16 0x04
#define MAX6650_CFG_MODE_MASK 0x30
#define MAX6650_CFG_MODE_ON 0x00
#define MAX6650_CFG_MODE_OFF 0x10
#define MAX6650_CFG_MODE_CLOSED_LOOP 0x20
#define MAX6650_CFG_MODE_OPEN_LOOP 0x30
#define MAX6650_COUNT_MASK 0x03
/*
* Alarm status register bits
*/
#define MAX6650_ALRM_MAX 0x01
#define MAX6650_ALRM_MIN 0x02
#define MAX6650_ALRM_TACH 0x04
#define MAX6650_ALRM_GPIO1 0x08
#define MAX6650_ALRM_GPIO2 0x10
/* Minimum and maximum values of the FAN-RPM */
#define FAN_RPM_MIN 240
#define FAN_RPM_MAX 30000
#define DIV_FROM_REG(reg) (1 << ((reg) & 7))
#define DAC_LIMIT(v12) ((v12) ? 180 : 76)
/*
* Client data (each client gets its own)
*/
struct max6650_data {
struct i2c_client *client;
struct mutex update_lock; /* protect alarm register updates */
int nr_fans;
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* register values */
u8 speed;
u8 config;
u8 tach[4];
u8 count;
u8 dac;
u8 alarm;
u8 alarm_en;
unsigned long cooling_dev_state;
};
static const u8 tach_reg[] = {
MAX6650_REG_TACH0,
MAX6650_REG_TACH1,
MAX6650_REG_TACH2,
MAX6650_REG_TACH3,
};
static const struct of_device_id __maybe_unused max6650_dt_match[] = {
{
.compatible = "maxim,max6650",
.data = (void *)1
},
{
.compatible = "maxim,max6651",
.data = (void *)4
},
{ },
};
MODULE_DEVICE_TABLE(of, max6650_dt_match);
static int dac_to_pwm(int dac, bool v12)
{
/*
* Useful range for dac is 0-180 for 12V fans and 0-76 for 5V fans.
* Lower DAC values mean higher speeds.
*/
return clamp_val(255 - (255 * dac) / DAC_LIMIT(v12), 0, 255);
}
static u8 pwm_to_dac(unsigned int pwm, bool v12)
{
int limit = DAC_LIMIT(v12);
return limit - (limit * pwm) / 255;
}
static struct max6650_data *max6650_update_device(struct device *dev)
{
struct max6650_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int reg, err = 0;
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
for (i = 0; i < data->nr_fans; i++) {
reg = i2c_smbus_read_byte_data(client, tach_reg[i]);
if (reg < 0) {
err = reg;
goto error;
}
data->tach[i] = reg;
}
/*
* Alarms are cleared on read in case the condition that
* caused the alarm is removed. Keep the value latched here
* for providing the register through different alarm files.
*/
reg = i2c_smbus_read_byte_data(client, MAX6650_REG_ALARM);
if (reg < 0) {
err = reg;
goto error;
}
data->alarm |= reg;
data->last_updated = jiffies;
data->valid = true;
}
error:
mutex_unlock(&data->update_lock);
if (err)
data = ERR_PTR(err);
return data;
}
/*
* Change the operating mode of the chip (if needed).
* mode is one of the MAX6650_CFG_MODE_* values.
*/
static int max6650_set_operating_mode(struct max6650_data *data, u8 mode)
{
int result;
u8 config = data->config;
if (mode == (config & MAX6650_CFG_MODE_MASK))
return 0;
config = (config & ~MAX6650_CFG_MODE_MASK) | mode;
result = i2c_smbus_write_byte_data(data->client, MAX6650_REG_CONFIG,
config);
if (result < 0)
return result;
data->config = config;
return 0;
}
/*
* Set the fan speed to the specified RPM (or read back the RPM setting).
* This works in closed loop mode only. Use pwm1 for open loop speed setting.
*
* The MAX6650/1 will automatically control fan speed when in closed loop
* mode.
*
* Assumptions:
*
* 1) The MAX6650/1 internal 254kHz clock frequency is set correctly. Use
* the clock module parameter if you need to fine tune this.
*
* 2) The prescaler (low three bits of the config register) has already
* been set to an appropriate value. Use the prescaler module parameter
* if your BIOS doesn't initialize the chip properly.
*
* The relevant equations are given on pages 21 and 22 of the datasheet.
*
* From the datasheet, the relevant equation when in regulation is:
*
* [fCLK / (128 x (KTACH + 1))] = 2 x FanSpeed / KSCALE
*
* where:
*
* fCLK is the oscillator frequency (either the 254kHz internal
* oscillator or the externally applied clock)
*
* KTACH is the value in the speed register
*
* FanSpeed is the speed of the fan in rps
*
* KSCALE is the prescaler value (1, 2, 4, 8, or 16)
*
* When reading, we need to solve for FanSpeed. When writing, we need to
* solve for KTACH.
*
* Note: this tachometer is completely separate from the tachometers
* used to measure the fan speeds. Only one fan's speed (fan1) is
* controlled.
*/
static int max6650_set_target(struct max6650_data *data, unsigned long rpm)
{
int kscale, ktach;
if (rpm == 0)
return max6650_set_operating_mode(data, MAX6650_CFG_MODE_OFF);
rpm = clamp_val(rpm, FAN_RPM_MIN, FAN_RPM_MAX);
/*
* Divide the required speed by 60 to get from rpm to rps, then
* use the datasheet equation:
*
* KTACH = [(fCLK x KSCALE) / (256 x FanSpeed)] - 1
*/
kscale = DIV_FROM_REG(data->config);
ktach = ((clock * kscale) / (256 * rpm / 60)) - 1;
if (ktach < 0)
ktach = 0;
if (ktach > 255)
ktach = 255;
data->speed = ktach;
return i2c_smbus_write_byte_data(data->client, MAX6650_REG_SPEED,
data->speed);
}
/*
* Get gpio alarm status:
* Possible values:
* 0 = no alarm
* 1 = alarm
*/
static ssize_t alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct max6650_data *data = max6650_update_device(dev);
bool alarm;
if (IS_ERR(data))
return PTR_ERR(data);
alarm = data->alarm & attr->index;
if (alarm) {
mutex_lock(&data->update_lock);
data->alarm &= ~attr->index;
data->valid = false;
mutex_unlock(&data->update_lock);
}
return sprintf(buf, "%d\n", alarm);
}
static SENSOR_DEVICE_ATTR_RO(gpio1_alarm, alarm, MAX6650_ALRM_GPIO1);
static SENSOR_DEVICE_ATTR_RO(gpio2_alarm, alarm, MAX6650_ALRM_GPIO2);
static umode_t max6650_attrs_visible(struct kobject *kobj, struct attribute *a,
int n)
{
struct device *dev = kobj_to_dev(kobj);
struct max6650_data *data = dev_get_drvdata(dev);
struct device_attribute *devattr;
/*
* Hide the alarms that have not been enabled by the firmware
*/
devattr = container_of(a, struct device_attribute, attr);
if (devattr == &sensor_dev_attr_gpio1_alarm.dev_attr ||
devattr == &sensor_dev_attr_gpio2_alarm.dev_attr) {
if (!(data->alarm_en & to_sensor_dev_attr(devattr)->index))
return 0;
}
return a->mode;
}
static struct attribute *max6650_attrs[] = {
&sensor_dev_attr_gpio1_alarm.dev_attr.attr,
&sensor_dev_attr_gpio2_alarm.dev_attr.attr,
NULL
};
static const struct attribute_group max6650_group = {
.attrs = max6650_attrs,
.is_visible = max6650_attrs_visible,
};
static const struct attribute_group *max6650_groups[] = {
&max6650_group,
NULL
};
static int max6650_init_client(struct max6650_data *data,
struct i2c_client *client)
{
struct device *dev = &client->dev;
int reg;
int err;
u32 voltage;
u32 prescale;
u32 target_rpm;
if (of_property_read_u32(dev->of_node, "maxim,fan-microvolt",
&voltage))
voltage = fan_voltage;
else
voltage /= 1000000; /* Microvolts to volts */
if (of_property_read_u32(dev->of_node, "maxim,fan-prescale",
&prescale))
prescale = prescaler;
reg = i2c_smbus_read_byte_data(client, MAX6650_REG_CONFIG);
if (reg < 0) {
dev_err(dev, "Error reading config register, aborting.\n");
return reg;
}
switch (voltage) {
case 0:
break;
case 5:
reg &= ~MAX6650_CFG_V12;
break;
case 12:
reg |= MAX6650_CFG_V12;
break;
default:
dev_err(dev, "illegal value for fan_voltage (%d)\n", voltage);
}
switch (prescale) {
case 0:
break;
case 1:
reg &= ~MAX6650_CFG_PRESCALER_MASK;
break;
case 2:
reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
| MAX6650_CFG_PRESCALER_2;
break;
case 4:
reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
| MAX6650_CFG_PRESCALER_4;
break;
case 8:
reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
| MAX6650_CFG_PRESCALER_8;
break;
case 16:
reg = (reg & ~MAX6650_CFG_PRESCALER_MASK)
| MAX6650_CFG_PRESCALER_16;
break;
default:
dev_err(dev, "illegal value for prescaler (%d)\n", prescale);
}
dev_info(dev, "Fan voltage: %dV, prescaler: %d.\n",
(reg & MAX6650_CFG_V12) ? 12 : 5,
1 << (reg & MAX6650_CFG_PRESCALER_MASK));
err = i2c_smbus_write_byte_data(client, MAX6650_REG_CONFIG, reg);
if (err) {
dev_err(dev, "Config write error, aborting.\n");
return err;
}
data->config = reg;
reg = i2c_smbus_read_byte_data(client, MAX6650_REG_SPEED);
if (reg < 0) {
dev_err(dev, "Failed to read speed register, aborting.\n");
return reg;
}
data->speed = reg;
reg = i2c_smbus_read_byte_data(client, MAX6650_REG_DAC);
if (reg < 0) {
dev_err(dev, "Failed to read DAC register, aborting.\n");
return reg;
}
data->dac = reg;
reg = i2c_smbus_read_byte_data(client, MAX6650_REG_COUNT);
if (reg < 0) {
dev_err(dev, "Failed to read count register, aborting.\n");
return reg;
}
data->count = reg;
reg = i2c_smbus_read_byte_data(client, MAX6650_REG_ALARM_EN);
if (reg < 0) {
dev_err(dev, "Failed to read alarm configuration, aborting.\n");
return reg;
}
data->alarm_en = reg;
if (!of_property_read_u32(client->dev.of_node, "maxim,fan-target-rpm",
&target_rpm)) {
max6650_set_target(data, target_rpm);
max6650_set_operating_mode(data, MAX6650_CFG_MODE_CLOSED_LOOP);
}
return 0;
}
static int max6650_get_max_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
*state = 255;
return 0;
}
static int max6650_get_cur_state(struct thermal_cooling_device *cdev,
unsigned long *state)
{
struct max6650_data *data = cdev->devdata;
*state = data->cooling_dev_state;
return 0;
}
static int max6650_set_cur_state(struct thermal_cooling_device *cdev,
unsigned long state)
{
struct max6650_data *data = cdev->devdata;
struct i2c_client *client = data->client;
int err;
state = clamp_val(state, 0, 255);
mutex_lock(&data->update_lock);
data->dac = pwm_to_dac(state, data->config & MAX6650_CFG_V12);
err = i2c_smbus_write_byte_data(client, MAX6650_REG_DAC, data->dac);
if (!err) {
max6650_set_operating_mode(data, state ?
MAX6650_CFG_MODE_OPEN_LOOP :
MAX6650_CFG_MODE_OFF);
data->cooling_dev_state = state;
}
mutex_unlock(&data->update_lock);
return err;
}
static const struct thermal_cooling_device_ops max6650_cooling_ops = {
.get_max_state = max6650_get_max_state,
.get_cur_state = max6650_get_cur_state,
.set_cur_state = max6650_set_cur_state,
};
static int max6650_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct max6650_data *data = max6650_update_device(dev);
int mode;
if (IS_ERR(data))
return PTR_ERR(data);
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
*val = dac_to_pwm(data->dac,
data->config & MAX6650_CFG_V12);
break;
case hwmon_pwm_enable:
/*
* Possible values:
* 0 = Fan always on
* 1 = Open loop, Voltage is set according to speed,
* not regulated.
* 2 = Closed loop, RPM for all fans regulated by fan1
* tachometer
* 3 = Fan off
*/
mode = (data->config & MAX6650_CFG_MODE_MASK) >> 4;
*val = (4 - mode) & 3; /* {0 1 2 3} -> {0 3 2 1} */
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
/*
* Calculation details:
*
* Each tachometer counts over an interval given by the
* "count" register (0.25, 0.5, 1 or 2 seconds).
* The driver assumes that the fans produce two pulses
* per revolution (this seems to be the most common).
*/
*val = DIV_ROUND_CLOSEST(data->tach[channel] * 120,
DIV_FROM_REG(data->count));
break;
case hwmon_fan_div:
*val = DIV_FROM_REG(data->count);
break;
case hwmon_fan_target:
/*
* Use the datasheet equation:
* FanSpeed = KSCALE x fCLK / [256 x (KTACH + 1)]
* then multiply by 60 to give rpm.
*/
*val = 60 * DIV_FROM_REG(data->config) * clock /
(256 * (data->speed + 1));
break;
case hwmon_fan_min_alarm:
*val = !!(data->alarm & MAX6650_ALRM_MIN);
data->alarm &= ~MAX6650_ALRM_MIN;
data->valid = false;
break;
case hwmon_fan_max_alarm:
*val = !!(data->alarm & MAX6650_ALRM_MAX);
data->alarm &= ~MAX6650_ALRM_MAX;
data->valid = false;
break;
case hwmon_fan_fault:
*val = !!(data->alarm & MAX6650_ALRM_TACH);
data->alarm &= ~MAX6650_ALRM_TACH;
data->valid = false;
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static const u8 max6650_pwm_modes[] = {
MAX6650_CFG_MODE_ON,
MAX6650_CFG_MODE_OPEN_LOOP,
MAX6650_CFG_MODE_CLOSED_LOOP,
MAX6650_CFG_MODE_OFF,
};
static int max6650_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct max6650_data *data = dev_get_drvdata(dev);
int ret = 0;
u8 reg;
mutex_lock(&data->update_lock);
switch (type) {
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
reg = pwm_to_dac(clamp_val(val, 0, 255),
data->config & MAX6650_CFG_V12);
ret = i2c_smbus_write_byte_data(data->client,
MAX6650_REG_DAC, reg);
if (ret)
break;
data->dac = reg;
break;
case hwmon_pwm_enable:
if (val < 0 || val >= ARRAY_SIZE(max6650_pwm_modes)) {
ret = -EINVAL;
break;
}
ret = max6650_set_operating_mode(data,
max6650_pwm_modes[val]);
break;
default:
ret = -EOPNOTSUPP;
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_div:
switch (val) {
case 1:
reg = 0;
break;
case 2:
reg = 1;
break;
case 4:
reg = 2;
break;
case 8:
reg = 3;
break;
default:
ret = -EINVAL;
goto error;
}
ret = i2c_smbus_write_byte_data(data->client,
MAX6650_REG_COUNT, reg);
if (ret)
break;
data->count = reg;
break;
case hwmon_fan_target:
if (val < 0) {
ret = -EINVAL;
break;
}
ret = max6650_set_target(data, val);
break;
default:
ret = -EOPNOTSUPP;
break;
}
break;
default:
ret = -EOPNOTSUPP;
break;
}
error:
mutex_unlock(&data->update_lock);
return ret;
}
static umode_t max6650_is_visible(const void *_data,
enum hwmon_sensor_types type, u32 attr,
int channel)
{
const struct max6650_data *data = _data;
if (channel && (channel >= data->nr_fans || type != hwmon_fan))
return 0;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
return 0444;
case hwmon_fan_target:
case hwmon_fan_div:
return 0644;
case hwmon_fan_min_alarm:
if (data->alarm_en & MAX6650_ALRM_MIN)
return 0444;
break;
case hwmon_fan_max_alarm:
if (data->alarm_en & MAX6650_ALRM_MAX)
return 0444;
break;
case hwmon_fan_fault:
if (data->alarm_en & MAX6650_ALRM_TACH)
return 0444;
break;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
case hwmon_pwm_enable:
return 0644;
default:
break;
}
break;
default:
break;
}
return 0;
}
static const struct hwmon_channel_info * const max6650_info[] = {
HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_DIV |
HWMON_F_MIN_ALARM | HWMON_F_MAX_ALARM |
HWMON_F_FAULT,
HWMON_F_INPUT, HWMON_F_INPUT, HWMON_F_INPUT),
HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
NULL
};
static const struct hwmon_ops max6650_hwmon_ops = {
.read = max6650_read,
.write = max6650_write,
.is_visible = max6650_is_visible,
};
static const struct hwmon_chip_info max6650_chip_info = {
.ops = &max6650_hwmon_ops,
.info = max6650_info,
};
static const struct i2c_device_id max6650_id[];
static int max6650_probe(struct i2c_client *client)
{
struct thermal_cooling_device *cooling_dev;
struct device *dev = &client->dev;
const struct of_device_id *of_id =
of_match_device(of_match_ptr(max6650_dt_match), dev);
struct max6650_data *data;
struct device *hwmon_dev;
int err;
data = devm_kzalloc(dev, sizeof(struct max6650_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
data->nr_fans = of_id ? (int)(uintptr_t)of_id->data :
i2c_match_id(max6650_id, client)->driver_data;
/*
* Initialize the max6650 chip
*/
err = max6650_init_client(data, client);
if (err)
return err;
hwmon_dev = devm_hwmon_device_register_with_info(dev,
client->name, data,
&max6650_chip_info,
max6650_groups);
err = PTR_ERR_OR_ZERO(hwmon_dev);
if (err)
return err;
if (IS_ENABLED(CONFIG_THERMAL)) {
cooling_dev = devm_thermal_of_cooling_device_register(dev,
dev->of_node, client->name,
data, &max6650_cooling_ops);
if (IS_ERR(cooling_dev)) {
dev_warn(dev, "thermal cooling device register failed: %ld\n",
PTR_ERR(cooling_dev));
}
}
return 0;
}
static const struct i2c_device_id max6650_id[] = {
{ "max6650", 1 },
{ "max6651", 4 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max6650_id);
static struct i2c_driver max6650_driver = {
.driver = {
.name = "max6650",
.of_match_table = of_match_ptr(max6650_dt_match),
},
.probe = max6650_probe,
.id_table = max6650_id,
};
module_i2c_driver(max6650_driver);
MODULE_AUTHOR("Hans J. Koch");
MODULE_DESCRIPTION("MAX6650 sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/max6650.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* g760a - Driver for the Global Mixed-mode Technology Inc. G760A
* fan speed PWM controller chip
*
* Copyright (C) 2007 Herbert Valerio Riedel <[email protected]>
*
* Complete datasheet is available at GMT's website:
* http://www.gmt.com.tw/product/datasheet/EDS-760A.pdf
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
enum g760a_regs {
G760A_REG_SET_CNT = 0x00,
G760A_REG_ACT_CNT = 0x01,
G760A_REG_FAN_STA = 0x02
};
#define G760A_REG_FAN_STA_RPM_OFF 0x1 /* +/-20% off */
#define G760A_REG_FAN_STA_RPM_LOW 0x2 /* below 1920rpm */
/* register data is read (and cached) at most once per second */
#define G760A_UPDATE_INTERVAL (HZ)
struct g760a_data {
struct i2c_client *client;
struct mutex update_lock;
/* board specific parameters */
u32 clk; /* default 32kHz */
u16 fan_div; /* default P=2 */
/* g760a register cache */
unsigned int valid:1;
unsigned long last_updated; /* In jiffies */
u8 set_cnt; /* PWM (period) count number; 0xff stops fan */
u8 act_cnt; /* formula: cnt = (CLK * 30)/(rpm * P) */
u8 fan_sta; /* bit 0: set when actual fan speed more than 20%
* outside requested fan speed
* bit 1: set when fan speed below 1920 rpm
*/
};
#define G760A_DEFAULT_CLK 32768
#define G760A_DEFAULT_FAN_DIV 2
#define PWM_FROM_CNT(cnt) (0xff-(cnt))
#define PWM_TO_CNT(pwm) (0xff-(pwm))
static inline unsigned int rpm_from_cnt(u8 val, u32 clk, u16 div)
{
return ((val == 0x00) ? 0 : ((clk*30)/(val*div)));
}
/* read/write wrappers */
static int g760a_read_value(struct i2c_client *client, enum g760a_regs reg)
{
return i2c_smbus_read_byte_data(client, reg);
}
static int g760a_write_value(struct i2c_client *client, enum g760a_regs reg,
u16 value)
{
return i2c_smbus_write_byte_data(client, reg, value);
}
/*
* sysfs attributes
*/
static struct g760a_data *g760a_update_client(struct device *dev)
{
struct g760a_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + G760A_UPDATE_INTERVAL)
|| !data->valid) {
dev_dbg(&client->dev, "Starting g760a update\n");
data->set_cnt = g760a_read_value(client, G760A_REG_SET_CNT);
data->act_cnt = g760a_read_value(client, G760A_REG_ACT_CNT);
data->fan_sta = g760a_read_value(client, G760A_REG_FAN_STA);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t fan1_input_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct g760a_data *data = g760a_update_client(dev);
unsigned int rpm = 0;
mutex_lock(&data->update_lock);
if (!(data->fan_sta & G760A_REG_FAN_STA_RPM_LOW))
rpm = rpm_from_cnt(data->act_cnt, data->clk, data->fan_div);
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", rpm);
}
static ssize_t fan1_alarm_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct g760a_data *data = g760a_update_client(dev);
int fan_alarm = (data->fan_sta & G760A_REG_FAN_STA_RPM_OFF) ? 1 : 0;
return sprintf(buf, "%d\n", fan_alarm);
}
static ssize_t pwm1_show(struct device *dev, struct device_attribute *da,
char *buf)
{
struct g760a_data *data = g760a_update_client(dev);
return sprintf(buf, "%d\n", PWM_FROM_CNT(data->set_cnt));
}
static ssize_t pwm1_store(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct g760a_data *data = g760a_update_client(dev);
struct i2c_client *client = data->client;
unsigned long val;
if (kstrtoul(buf, 10, &val))
return -EINVAL;
mutex_lock(&data->update_lock);
data->set_cnt = PWM_TO_CNT(clamp_val(val, 0, 255));
g760a_write_value(client, G760A_REG_SET_CNT, data->set_cnt);
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(pwm1);
static DEVICE_ATTR_RO(fan1_input);
static DEVICE_ATTR_RO(fan1_alarm);
static struct attribute *g760a_attrs[] = {
&dev_attr_pwm1.attr,
&dev_attr_fan1_input.attr,
&dev_attr_fan1_alarm.attr,
NULL
};
ATTRIBUTE_GROUPS(g760a);
/*
* new-style driver model code
*/
static int g760a_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct g760a_data *data;
struct device *hwmon_dev;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -EIO;
data = devm_kzalloc(dev, sizeof(struct g760a_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
mutex_init(&data->update_lock);
/* setup default configuration for now */
data->fan_div = G760A_DEFAULT_FAN_DIV;
data->clk = G760A_DEFAULT_CLK;
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
data,
g760a_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id g760a_id[] = {
{ "g760a", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, g760a_id);
static struct i2c_driver g760a_driver = {
.driver = {
.name = "g760a",
},
.probe = g760a_probe,
.id_table = g760a_id,
};
module_i2c_driver(g760a_driver);
MODULE_AUTHOR("Herbert Valerio Riedel <[email protected]>");
MODULE_DESCRIPTION("GMT G760A driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/g760a.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* drivers/hwmon/wm831x-hwmon.c - Wolfson Microelectronics WM831x PMIC
* hardware monitoring features.
*
* Copyright (C) 2009 Wolfson Microelectronics plc
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/slab.h>
#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/auxadc.h>
static const char * const input_names[] = {
[WM831X_AUX_SYSVDD] = "SYSVDD",
[WM831X_AUX_USB] = "USB",
[WM831X_AUX_BKUP_BATT] = "Backup battery",
[WM831X_AUX_BATT] = "Battery",
[WM831X_AUX_WALL] = "WALL",
[WM831X_AUX_CHIP_TEMP] = "PMIC",
[WM831X_AUX_BATT_TEMP] = "Battery",
};
static ssize_t show_voltage(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct wm831x *wm831x = dev_get_drvdata(dev);
int channel = to_sensor_dev_attr(attr)->index;
int ret;
ret = wm831x_auxadc_read_uv(wm831x, channel);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", DIV_ROUND_CLOSEST(ret, 1000));
}
static ssize_t show_chip_temp(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct wm831x *wm831x = dev_get_drvdata(dev);
int channel = to_sensor_dev_attr(attr)->index;
int ret;
ret = wm831x_auxadc_read(wm831x, channel);
if (ret < 0)
return ret;
/* Degrees celsius = (512.18-ret) / 1.0983 */
ret = 512180 - (ret * 1000);
ret = DIV_ROUND_CLOSEST(ret * 10000, 10983);
return sprintf(buf, "%d\n", ret);
}
static ssize_t show_label(struct device *dev,
struct device_attribute *attr, char *buf)
{
int channel = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%s\n", input_names[channel]);
}
#define WM831X_VOLTAGE(id, name) \
static SENSOR_DEVICE_ATTR(in##id##_input, S_IRUGO, show_voltage, \
NULL, name)
#define WM831X_NAMED_VOLTAGE(id, name) \
WM831X_VOLTAGE(id, name); \
static SENSOR_DEVICE_ATTR(in##id##_label, S_IRUGO, show_label, \
NULL, name)
WM831X_VOLTAGE(0, WM831X_AUX_AUX1);
WM831X_VOLTAGE(1, WM831X_AUX_AUX2);
WM831X_VOLTAGE(2, WM831X_AUX_AUX3);
WM831X_VOLTAGE(3, WM831X_AUX_AUX4);
WM831X_NAMED_VOLTAGE(4, WM831X_AUX_SYSVDD);
WM831X_NAMED_VOLTAGE(5, WM831X_AUX_USB);
WM831X_NAMED_VOLTAGE(6, WM831X_AUX_BATT);
WM831X_NAMED_VOLTAGE(7, WM831X_AUX_WALL);
WM831X_NAMED_VOLTAGE(8, WM831X_AUX_BKUP_BATT);
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_chip_temp, NULL,
WM831X_AUX_CHIP_TEMP);
static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_label, NULL,
WM831X_AUX_CHIP_TEMP);
/*
* Report as a voltage since conversion depends on external components
* and that's what the ABI wants.
*/
static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_voltage, NULL,
WM831X_AUX_BATT_TEMP);
static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, show_label, NULL,
WM831X_AUX_BATT_TEMP);
static struct attribute *wm831x_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_label.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_label.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_label.dev_attr.attr,
&sensor_dev_attr_in7_input.dev_attr.attr,
&sensor_dev_attr_in7_label.dev_attr.attr,
&sensor_dev_attr_in8_input.dev_attr.attr,
&sensor_dev_attr_in8_label.dev_attr.attr,
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_label.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_label.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(wm831x);
static int wm831x_hwmon_probe(struct platform_device *pdev)
{
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
struct device *hwmon_dev;
hwmon_dev = devm_hwmon_device_register_with_groups(&pdev->dev, "wm831x",
wm831x,
wm831x_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct platform_driver wm831x_hwmon_driver = {
.probe = wm831x_hwmon_probe,
.driver = {
.name = "wm831x-hwmon",
},
};
module_platform_driver(wm831x_hwmon_driver);
MODULE_AUTHOR("Mark Brown <[email protected]>");
MODULE_DESCRIPTION("WM831x Hardware Monitoring");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:wm831x-hwmon");
|
linux-master
|
drivers/hwmon/wm831x-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* fschmd.c
*
* Copyright (C) 2007 - 2009 Hans de Goede <[email protected]>
*/
/*
* Merged Fujitsu Siemens hwmon driver, supporting the Poseidon, Hermes,
* Scylla, Heracles, Heimdall, Hades and Syleus chips
*
* Based on the original 2.4 fscscy, 2.6 fscpos, 2.6 fscher and 2.6
* (candidate) fschmd drivers:
* Copyright (C) 2006 Thilo Cestonaro
* <[email protected]>
* Copyright (C) 2004, 2005 Stefan Ott <[email protected]>
* Copyright (C) 2003, 2004 Reinhard Nissl <[email protected]>
* Copyright (c) 2001 Martin Knoblauch <[email protected], [email protected]>
* Copyright (C) 2000 Hermann Jung <[email protected]>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/dmi.h>
#include <linux/fs.h>
#include <linux/watchdog.h>
#include <linux/miscdevice.h>
#include <linux/uaccess.h>
#include <linux/kref.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END };
/* Insmod parameters */
static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
enum chips { fscpos, fscher, fscscy, fschrc, fschmd, fschds, fscsyl };
/*
* The FSCHMD registers and other defines
*/
/* chip identification */
#define FSCHMD_REG_IDENT_0 0x00
#define FSCHMD_REG_IDENT_1 0x01
#define FSCHMD_REG_IDENT_2 0x02
#define FSCHMD_REG_REVISION 0x03
/* global control and status */
#define FSCHMD_REG_EVENT_STATE 0x04
#define FSCHMD_REG_CONTROL 0x05
#define FSCHMD_CONTROL_ALERT_LED 0x01
/* watchdog */
static const u8 FSCHMD_REG_WDOG_CONTROL[7] = {
0x21, 0x21, 0x21, 0x21, 0x21, 0x28, 0x28 };
static const u8 FSCHMD_REG_WDOG_STATE[7] = {
0x23, 0x23, 0x23, 0x23, 0x23, 0x29, 0x29 };
static const u8 FSCHMD_REG_WDOG_PRESET[7] = {
0x28, 0x28, 0x28, 0x28, 0x28, 0x2a, 0x2a };
#define FSCHMD_WDOG_CONTROL_TRIGGER 0x10
#define FSCHMD_WDOG_CONTROL_STARTED 0x10 /* the same as trigger */
#define FSCHMD_WDOG_CONTROL_STOP 0x20
#define FSCHMD_WDOG_CONTROL_RESOLUTION 0x40
#define FSCHMD_WDOG_STATE_CARDRESET 0x02
/* voltages, weird order is to keep the same order as the old drivers */
static const u8 FSCHMD_REG_VOLT[7][6] = {
{ 0x45, 0x42, 0x48 }, /* pos */
{ 0x45, 0x42, 0x48 }, /* her */
{ 0x45, 0x42, 0x48 }, /* scy */
{ 0x45, 0x42, 0x48 }, /* hrc */
{ 0x45, 0x42, 0x48 }, /* hmd */
{ 0x21, 0x20, 0x22 }, /* hds */
{ 0x21, 0x20, 0x22, 0x23, 0x24, 0x25 }, /* syl */
};
static const int FSCHMD_NO_VOLT_SENSORS[7] = { 3, 3, 3, 3, 3, 3, 6 };
/*
* minimum pwm at which the fan is driven (pwm can be increased depending on
* the temp. Notice that for the scy some fans share there minimum speed.
* Also notice that with the scy the sensor order is different than with the
* other chips, this order was in the 2.4 driver and kept for consistency.
*/
static const u8 FSCHMD_REG_FAN_MIN[7][7] = {
{ 0x55, 0x65 }, /* pos */
{ 0x55, 0x65, 0xb5 }, /* her */
{ 0x65, 0x65, 0x55, 0xa5, 0x55, 0xa5 }, /* scy */
{ 0x55, 0x65, 0xa5, 0xb5 }, /* hrc */
{ 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hmd */
{ 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hds */
{ 0x54, 0x64, 0x74, 0x84, 0x94, 0xa4, 0xb4 }, /* syl */
};
/* actual fan speed */
static const u8 FSCHMD_REG_FAN_ACT[7][7] = {
{ 0x0e, 0x6b, 0xab }, /* pos */
{ 0x0e, 0x6b, 0xbb }, /* her */
{ 0x6b, 0x6c, 0x0e, 0xab, 0x5c, 0xbb }, /* scy */
{ 0x0e, 0x6b, 0xab, 0xbb }, /* hrc */
{ 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hmd */
{ 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hds */
{ 0x57, 0x67, 0x77, 0x87, 0x97, 0xa7, 0xb7 }, /* syl */
};
/* fan status registers */
static const u8 FSCHMD_REG_FAN_STATE[7][7] = {
{ 0x0d, 0x62, 0xa2 }, /* pos */
{ 0x0d, 0x62, 0xb2 }, /* her */
{ 0x62, 0x61, 0x0d, 0xa2, 0x52, 0xb2 }, /* scy */
{ 0x0d, 0x62, 0xa2, 0xb2 }, /* hrc */
{ 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hmd */
{ 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hds */
{ 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0 }, /* syl */
};
/* fan ripple / divider registers */
static const u8 FSCHMD_REG_FAN_RIPPLE[7][7] = {
{ 0x0f, 0x6f, 0xaf }, /* pos */
{ 0x0f, 0x6f, 0xbf }, /* her */
{ 0x6f, 0x6f, 0x0f, 0xaf, 0x0f, 0xbf }, /* scy */
{ 0x0f, 0x6f, 0xaf, 0xbf }, /* hrc */
{ 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hmd */
{ 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hds */
{ 0x56, 0x66, 0x76, 0x86, 0x96, 0xa6, 0xb6 }, /* syl */
};
static const int FSCHMD_NO_FAN_SENSORS[7] = { 3, 3, 6, 4, 5, 5, 7 };
/* Fan status register bitmasks */
#define FSCHMD_FAN_ALARM 0x04 /* called fault by FSC! */
#define FSCHMD_FAN_NOT_PRESENT 0x08
#define FSCHMD_FAN_DISABLED 0x80
/* actual temperature registers */
static const u8 FSCHMD_REG_TEMP_ACT[7][11] = {
{ 0x64, 0x32, 0x35 }, /* pos */
{ 0x64, 0x32, 0x35 }, /* her */
{ 0x64, 0xD0, 0x32, 0x35 }, /* scy */
{ 0x64, 0x32, 0x35 }, /* hrc */
{ 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hmd */
{ 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hds */
{ 0x58, 0x68, 0x78, 0x88, 0x98, 0xa8, /* syl */
0xb8, 0xc8, 0xd8, 0xe8, 0xf8 },
};
/* temperature state registers */
static const u8 FSCHMD_REG_TEMP_STATE[7][11] = {
{ 0x71, 0x81, 0x91 }, /* pos */
{ 0x71, 0x81, 0x91 }, /* her */
{ 0x71, 0xd1, 0x81, 0x91 }, /* scy */
{ 0x71, 0x81, 0x91 }, /* hrc */
{ 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hmd */
{ 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hds */
{ 0x59, 0x69, 0x79, 0x89, 0x99, 0xa9, /* syl */
0xb9, 0xc9, 0xd9, 0xe9, 0xf9 },
};
/*
* temperature high limit registers, FSC does not document these. Proven to be
* there with field testing on the fscher and fschrc, already supported / used
* in the fscscy 2.4 driver. FSC has confirmed that the fschmd has registers
* at these addresses, but doesn't want to confirm they are the same as with
* the fscher??
*/
static const u8 FSCHMD_REG_TEMP_LIMIT[7][11] = {
{ 0, 0, 0 }, /* pos */
{ 0x76, 0x86, 0x96 }, /* her */
{ 0x76, 0xd6, 0x86, 0x96 }, /* scy */
{ 0x76, 0x86, 0x96 }, /* hrc */
{ 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hmd */
{ 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hds */
{ 0x5a, 0x6a, 0x7a, 0x8a, 0x9a, 0xaa, /* syl */
0xba, 0xca, 0xda, 0xea, 0xfa },
};
/*
* These were found through experimenting with an fscher, currently they are
* not used, but we keep them around for future reference.
* On the fscsyl AUTOP1 lives at 0x#c (so 0x5c for fan1, 0x6c for fan2, etc),
* AUTOP2 lives at 0x#e, and 0x#1 is a bitmask defining which temps influence
* the fan speed.
* static const u8 FSCHER_REG_TEMP_AUTOP1[] = { 0x73, 0x83, 0x93 };
* static const u8 FSCHER_REG_TEMP_AUTOP2[] = { 0x75, 0x85, 0x95 };
*/
static const int FSCHMD_NO_TEMP_SENSORS[7] = { 3, 3, 4, 3, 5, 5, 11 };
/* temp status register bitmasks */
#define FSCHMD_TEMP_WORKING 0x01
#define FSCHMD_TEMP_ALERT 0x02
#define FSCHMD_TEMP_DISABLED 0x80
/* there only really is an alarm if the sensor is working and alert == 1 */
#define FSCHMD_TEMP_ALARM_MASK \
(FSCHMD_TEMP_WORKING | FSCHMD_TEMP_ALERT)
/*
* Functions declarations
*/
static int fschmd_probe(struct i2c_client *client);
static int fschmd_detect(struct i2c_client *client,
struct i2c_board_info *info);
static void fschmd_remove(struct i2c_client *client);
static struct fschmd_data *fschmd_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
static const struct i2c_device_id fschmd_id[] = {
{ "fscpos", fscpos },
{ "fscher", fscher },
{ "fscscy", fscscy },
{ "fschrc", fschrc },
{ "fschmd", fschmd },
{ "fschds", fschds },
{ "fscsyl", fscsyl },
{ }
};
MODULE_DEVICE_TABLE(i2c, fschmd_id);
static struct i2c_driver fschmd_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "fschmd",
},
.probe = fschmd_probe,
.remove = fschmd_remove,
.id_table = fschmd_id,
.detect = fschmd_detect,
.address_list = normal_i2c,
};
/*
* Client data (each client gets its own)
*/
struct fschmd_data {
struct i2c_client *client;
struct device *hwmon_dev;
struct mutex update_lock;
struct mutex watchdog_lock;
struct list_head list; /* member of the watchdog_data_list */
struct kref kref;
struct miscdevice watchdog_miscdev;
enum chips kind;
unsigned long watchdog_is_open;
char watchdog_expect_close;
char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
bool valid; /* false until following fields are valid */
unsigned long last_updated; /* in jiffies */
/* register values */
u8 revision; /* chip revision */
u8 global_control; /* global control register */
u8 watchdog_control; /* watchdog control register */
u8 watchdog_state; /* watchdog status register */
u8 watchdog_preset; /* watchdog counter preset on trigger val */
u8 volt[6]; /* voltage */
u8 temp_act[11]; /* temperature */
u8 temp_status[11]; /* status of sensor */
u8 temp_max[11]; /* high temp limit, notice: undocumented! */
u8 fan_act[7]; /* fans revolutions per second */
u8 fan_status[7]; /* fan status */
u8 fan_min[7]; /* fan min value for rps */
u8 fan_ripple[7]; /* divider for rps */
};
/*
* Global variables to hold information read from special DMI tables, which are
* available on FSC machines with an fscher or later chip. There is no need to
* protect these with a lock as they are only modified from our attach function
* which always gets called with the i2c-core lock held and never accessed
* before the attach function is done with them.
*/
static int dmi_mult[6] = { 490, 200, 100, 100, 200, 100 };
static int dmi_offset[6] = { 0, 0, 0, 0, 0, 0 };
static int dmi_vref = -1;
/*
* Somewhat ugly :( global data pointer list with all fschmd devices, so that
* we can find our device data as when using misc_register there is no other
* method to get to ones device data from the open fop.
*/
static LIST_HEAD(watchdog_data_list);
/* Note this lock not only protect list access, but also data.kref access */
static DEFINE_MUTEX(watchdog_data_mutex);
/*
* Release our data struct when we're detached from the i2c client *and* all
* references to our watchdog device are released
*/
static void fschmd_release_resources(struct kref *ref)
{
struct fschmd_data *data = container_of(ref, struct fschmd_data, kref);
kfree(data);
}
/*
* Sysfs attr show / store functions
*/
static ssize_t in_value_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
const int max_reading[3] = { 14200, 6600, 3300 };
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
if (data->kind == fscher || data->kind >= fschrc)
return sprintf(buf, "%d\n", (data->volt[index] * dmi_vref *
dmi_mult[index]) / 255 + dmi_offset[index]);
else
return sprintf(buf, "%d\n", (data->volt[index] *
max_reading[index] + 128) / 255);
}
#define TEMP_FROM_REG(val) (((val) - 128) * 1000)
static ssize_t temp_value_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_act[index]));
}
static ssize_t temp_max_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[index]));
}
static ssize_t temp_max_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = dev_get_drvdata(dev);
long v;
int err;
err = kstrtol(buf, 10, &v);
if (err)
return err;
v = clamp_val(v / 1000, -128, 127) + 128;
mutex_lock(&data->update_lock);
i2c_smbus_write_byte_data(to_i2c_client(dev),
FSCHMD_REG_TEMP_LIMIT[data->kind][index], v);
data->temp_max[index] = v;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t temp_fault_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
/* bit 0 set means sensor working ok, so no fault! */
if (data->temp_status[index] & FSCHMD_TEMP_WORKING)
return sprintf(buf, "0\n");
else
return sprintf(buf, "1\n");
}
static ssize_t temp_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
if ((data->temp_status[index] & FSCHMD_TEMP_ALARM_MASK) ==
FSCHMD_TEMP_ALARM_MASK)
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
#define RPM_FROM_REG(val) ((val) * 60)
static ssize_t fan_value_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
return sprintf(buf, "%u\n", RPM_FROM_REG(data->fan_act[index]));
}
static ssize_t fan_div_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
/* bits 2..7 reserved => mask with 3 */
return sprintf(buf, "%d\n", 1 << (data->fan_ripple[index] & 3));
}
static ssize_t fan_div_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
u8 reg;
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = dev_get_drvdata(dev);
/* supported values: 2, 4, 8 */
unsigned long v;
int err;
err = kstrtoul(buf, 10, &v);
if (err)
return err;
switch (v) {
case 2:
v = 1;
break;
case 4:
v = 2;
break;
case 8:
v = 3;
break;
default:
dev_err(dev,
"fan_div value %lu not supported. Choose one of 2, 4 or 8!\n",
v);
return -EINVAL;
}
mutex_lock(&data->update_lock);
reg = i2c_smbus_read_byte_data(to_i2c_client(dev),
FSCHMD_REG_FAN_RIPPLE[data->kind][index]);
/* bits 2..7 reserved => mask with 0x03 */
reg &= ~0x03;
reg |= v;
i2c_smbus_write_byte_data(to_i2c_client(dev),
FSCHMD_REG_FAN_RIPPLE[data->kind][index], reg);
data->fan_ripple[index] = reg;
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t fan_alarm_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
if (data->fan_status[index] & FSCHMD_FAN_ALARM)
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t fan_fault_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
if (data->fan_status[index] & FSCHMD_FAN_NOT_PRESENT)
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t pwm_auto_point1_pwm_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = fschmd_update_device(dev);
int val = data->fan_min[index];
/* 0 = allow turning off (except on the syl), 1-255 = 50-100% */
if (val || data->kind == fscsyl)
val = val / 2 + 128;
return sprintf(buf, "%d\n", val);
}
static ssize_t pwm_auto_point1_pwm_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
int index = to_sensor_dev_attr(devattr)->index;
struct fschmd_data *data = dev_get_drvdata(dev);
unsigned long v;
int err;
err = kstrtoul(buf, 10, &v);
if (err)
return err;
/* reg: 0 = allow turning off (except on the syl), 1-255 = 50-100% */
if (v || data->kind == fscsyl) {
v = clamp_val(v, 128, 255);
v = (v - 128) * 2 + 1;
}
mutex_lock(&data->update_lock);
i2c_smbus_write_byte_data(to_i2c_client(dev),
FSCHMD_REG_FAN_MIN[data->kind][index], v);
data->fan_min[index] = v;
mutex_unlock(&data->update_lock);
return count;
}
/*
* The FSC hwmon family has the ability to force an attached alert led to flash
* from software, we export this as an alert_led sysfs attr
*/
static ssize_t alert_led_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct fschmd_data *data = fschmd_update_device(dev);
if (data->global_control & FSCHMD_CONTROL_ALERT_LED)
return sprintf(buf, "1\n");
else
return sprintf(buf, "0\n");
}
static ssize_t alert_led_store(struct device *dev,
struct device_attribute *devattr, const char *buf, size_t count)
{
u8 reg;
struct fschmd_data *data = dev_get_drvdata(dev);
unsigned long v;
int err;
err = kstrtoul(buf, 10, &v);
if (err)
return err;
mutex_lock(&data->update_lock);
reg = i2c_smbus_read_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL);
if (v)
reg |= FSCHMD_CONTROL_ALERT_LED;
else
reg &= ~FSCHMD_CONTROL_ALERT_LED;
i2c_smbus_write_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL, reg);
data->global_control = reg;
mutex_unlock(&data->update_lock);
return count;
}
static DEVICE_ATTR_RW(alert_led);
static struct sensor_device_attribute fschmd_attr[] = {
SENSOR_ATTR_RO(in0_input, in_value, 0),
SENSOR_ATTR_RO(in1_input, in_value, 1),
SENSOR_ATTR_RO(in2_input, in_value, 2),
SENSOR_ATTR_RO(in3_input, in_value, 3),
SENSOR_ATTR_RO(in4_input, in_value, 4),
SENSOR_ATTR_RO(in5_input, in_value, 5),
};
static struct sensor_device_attribute fschmd_temp_attr[] = {
SENSOR_ATTR_RO(temp1_input, temp_value, 0),
SENSOR_ATTR_RW(temp1_max, temp_max, 0),
SENSOR_ATTR_RO(temp1_fault, temp_fault, 0),
SENSOR_ATTR_RO(temp1_alarm, temp_alarm, 0),
SENSOR_ATTR_RO(temp2_input, temp_value, 1),
SENSOR_ATTR_RW(temp2_max, temp_max, 1),
SENSOR_ATTR_RO(temp2_fault, temp_fault, 1),
SENSOR_ATTR_RO(temp2_alarm, temp_alarm, 1),
SENSOR_ATTR_RO(temp3_input, temp_value, 2),
SENSOR_ATTR_RW(temp3_max, temp_max, 2),
SENSOR_ATTR_RO(temp3_fault, temp_fault, 2),
SENSOR_ATTR_RO(temp3_alarm, temp_alarm, 2),
SENSOR_ATTR_RO(temp4_input, temp_value, 3),
SENSOR_ATTR_RW(temp4_max, temp_max, 3),
SENSOR_ATTR_RO(temp4_fault, temp_fault, 3),
SENSOR_ATTR_RO(temp4_alarm, temp_alarm, 3),
SENSOR_ATTR_RO(temp5_input, temp_value, 4),
SENSOR_ATTR_RW(temp5_max, temp_max, 4),
SENSOR_ATTR_RO(temp5_fault, temp_fault, 4),
SENSOR_ATTR_RO(temp5_alarm, temp_alarm, 4),
SENSOR_ATTR_RO(temp6_input, temp_value, 5),
SENSOR_ATTR_RW(temp6_max, temp_max, 5),
SENSOR_ATTR_RO(temp6_fault, temp_fault, 5),
SENSOR_ATTR_RO(temp6_alarm, temp_alarm, 5),
SENSOR_ATTR_RO(temp7_input, temp_value, 6),
SENSOR_ATTR_RW(temp7_max, temp_max, 6),
SENSOR_ATTR_RO(temp7_fault, temp_fault, 6),
SENSOR_ATTR_RO(temp7_alarm, temp_alarm, 6),
SENSOR_ATTR_RO(temp8_input, temp_value, 7),
SENSOR_ATTR_RW(temp8_max, temp_max, 7),
SENSOR_ATTR_RO(temp8_fault, temp_fault, 7),
SENSOR_ATTR_RO(temp8_alarm, temp_alarm, 7),
SENSOR_ATTR_RO(temp9_input, temp_value, 8),
SENSOR_ATTR_RW(temp9_max, temp_max, 8),
SENSOR_ATTR_RO(temp9_fault, temp_fault, 8),
SENSOR_ATTR_RO(temp9_alarm, temp_alarm, 8),
SENSOR_ATTR_RO(temp10_input, temp_value, 9),
SENSOR_ATTR_RW(temp10_max, temp_max, 9),
SENSOR_ATTR_RO(temp10_fault, temp_fault, 9),
SENSOR_ATTR_RO(temp10_alarm, temp_alarm, 9),
SENSOR_ATTR_RO(temp11_input, temp_value, 10),
SENSOR_ATTR_RW(temp11_max, temp_max, 10),
SENSOR_ATTR_RO(temp11_fault, temp_fault, 10),
SENSOR_ATTR_RO(temp11_alarm, temp_alarm, 10),
};
static struct sensor_device_attribute fschmd_fan_attr[] = {
SENSOR_ATTR_RO(fan1_input, fan_value, 0),
SENSOR_ATTR_RW(fan1_div, fan_div, 0),
SENSOR_ATTR_RO(fan1_alarm, fan_alarm, 0),
SENSOR_ATTR_RO(fan1_fault, fan_fault, 0),
SENSOR_ATTR_RW(pwm1_auto_point1_pwm, pwm_auto_point1_pwm, 0),
SENSOR_ATTR_RO(fan2_input, fan_value, 1),
SENSOR_ATTR_RW(fan2_div, fan_div, 1),
SENSOR_ATTR_RO(fan2_alarm, fan_alarm, 1),
SENSOR_ATTR_RO(fan2_fault, fan_fault, 1),
SENSOR_ATTR_RW(pwm2_auto_point1_pwm, pwm_auto_point1_pwm, 1),
SENSOR_ATTR_RO(fan3_input, fan_value, 2),
SENSOR_ATTR_RW(fan3_div, fan_div, 2),
SENSOR_ATTR_RO(fan3_alarm, fan_alarm, 2),
SENSOR_ATTR_RO(fan3_fault, fan_fault, 2),
SENSOR_ATTR_RW(pwm3_auto_point1_pwm, pwm_auto_point1_pwm, 2),
SENSOR_ATTR_RO(fan4_input, fan_value, 3),
SENSOR_ATTR_RW(fan4_div, fan_div, 3),
SENSOR_ATTR_RO(fan4_alarm, fan_alarm, 3),
SENSOR_ATTR_RO(fan4_fault, fan_fault, 3),
SENSOR_ATTR_RW(pwm4_auto_point1_pwm, pwm_auto_point1_pwm, 3),
SENSOR_ATTR_RO(fan5_input, fan_value, 4),
SENSOR_ATTR_RW(fan5_div, fan_div, 4),
SENSOR_ATTR_RO(fan5_alarm, fan_alarm, 4),
SENSOR_ATTR_RO(fan5_fault, fan_fault, 4),
SENSOR_ATTR_RW(pwm5_auto_point1_pwm, pwm_auto_point1_pwm, 4),
SENSOR_ATTR_RO(fan6_input, fan_value, 5),
SENSOR_ATTR_RW(fan6_div, fan_div, 5),
SENSOR_ATTR_RO(fan6_alarm, fan_alarm, 5),
SENSOR_ATTR_RO(fan6_fault, fan_fault, 5),
SENSOR_ATTR_RW(pwm6_auto_point1_pwm, pwm_auto_point1_pwm, 5),
SENSOR_ATTR_RO(fan7_input, fan_value, 6),
SENSOR_ATTR_RW(fan7_div, fan_div, 6),
SENSOR_ATTR_RO(fan7_alarm, fan_alarm, 6),
SENSOR_ATTR_RO(fan7_fault, fan_fault, 6),
SENSOR_ATTR_RW(pwm7_auto_point1_pwm, pwm_auto_point1_pwm, 6),
};
/*
* Watchdog routines
*/
static int watchdog_set_timeout(struct fschmd_data *data, int timeout)
{
int ret, resolution;
int kind = data->kind + 1; /* 0-x array index -> 1-x module param */
/* 2 second or 60 second resolution? */
if (timeout <= 510 || kind == fscpos || kind == fscscy)
resolution = 2;
else
resolution = 60;
if (timeout < resolution || timeout > (resolution * 255))
return -EINVAL;
mutex_lock(&data->watchdog_lock);
if (!data->client) {
ret = -ENODEV;
goto leave;
}
if (resolution == 2)
data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_RESOLUTION;
else
data->watchdog_control |= FSCHMD_WDOG_CONTROL_RESOLUTION;
data->watchdog_preset = DIV_ROUND_UP(timeout, resolution);
/* Write new timeout value */
i2c_smbus_write_byte_data(data->client,
FSCHMD_REG_WDOG_PRESET[data->kind], data->watchdog_preset);
/* Write new control register, do not trigger! */
i2c_smbus_write_byte_data(data->client,
FSCHMD_REG_WDOG_CONTROL[data->kind],
data->watchdog_control & ~FSCHMD_WDOG_CONTROL_TRIGGER);
ret = data->watchdog_preset * resolution;
leave:
mutex_unlock(&data->watchdog_lock);
return ret;
}
static int watchdog_get_timeout(struct fschmd_data *data)
{
int timeout;
mutex_lock(&data->watchdog_lock);
if (data->watchdog_control & FSCHMD_WDOG_CONTROL_RESOLUTION)
timeout = data->watchdog_preset * 60;
else
timeout = data->watchdog_preset * 2;
mutex_unlock(&data->watchdog_lock);
return timeout;
}
static int watchdog_trigger(struct fschmd_data *data)
{
int ret = 0;
mutex_lock(&data->watchdog_lock);
if (!data->client) {
ret = -ENODEV;
goto leave;
}
data->watchdog_control |= FSCHMD_WDOG_CONTROL_TRIGGER;
i2c_smbus_write_byte_data(data->client,
FSCHMD_REG_WDOG_CONTROL[data->kind],
data->watchdog_control);
leave:
mutex_unlock(&data->watchdog_lock);
return ret;
}
static int watchdog_stop(struct fschmd_data *data)
{
int ret = 0;
mutex_lock(&data->watchdog_lock);
if (!data->client) {
ret = -ENODEV;
goto leave;
}
data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_STARTED;
/*
* Don't store the stop flag in our watchdog control register copy, as
* its a write only bit (read always returns 0)
*/
i2c_smbus_write_byte_data(data->client,
FSCHMD_REG_WDOG_CONTROL[data->kind],
data->watchdog_control | FSCHMD_WDOG_CONTROL_STOP);
leave:
mutex_unlock(&data->watchdog_lock);
return ret;
}
static int watchdog_open(struct inode *inode, struct file *filp)
{
struct fschmd_data *pos, *data = NULL;
int watchdog_is_open;
/*
* We get called from drivers/char/misc.c with misc_mtx hold, and we
* call misc_register() from fschmd_probe() with watchdog_data_mutex
* hold, as misc_register() takes the misc_mtx lock, this is a possible
* deadlock, so we use mutex_trylock here.
*/
if (!mutex_trylock(&watchdog_data_mutex))
return -ERESTARTSYS;
list_for_each_entry(pos, &watchdog_data_list, list) {
if (pos->watchdog_miscdev.minor == iminor(inode)) {
data = pos;
break;
}
}
/* Note we can never not have found data, so we don't check for this */
watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
if (!watchdog_is_open)
kref_get(&data->kref);
mutex_unlock(&watchdog_data_mutex);
if (watchdog_is_open)
return -EBUSY;
/* Start the watchdog */
watchdog_trigger(data);
filp->private_data = data;
return stream_open(inode, filp);
}
static int watchdog_release(struct inode *inode, struct file *filp)
{
struct fschmd_data *data = filp->private_data;
if (data->watchdog_expect_close) {
watchdog_stop(data);
data->watchdog_expect_close = 0;
} else {
watchdog_trigger(data);
dev_crit(&data->client->dev,
"unexpected close, not stopping watchdog!\n");
}
clear_bit(0, &data->watchdog_is_open);
mutex_lock(&watchdog_data_mutex);
kref_put(&data->kref, fschmd_release_resources);
mutex_unlock(&watchdog_data_mutex);
return 0;
}
static ssize_t watchdog_write(struct file *filp, const char __user *buf,
size_t count, loff_t *offset)
{
int ret;
struct fschmd_data *data = filp->private_data;
if (count) {
if (!nowayout) {
size_t i;
/* Clear it in case it was set with a previous write */
data->watchdog_expect_close = 0;
for (i = 0; i != count; i++) {
char c;
if (get_user(c, buf + i))
return -EFAULT;
if (c == 'V')
data->watchdog_expect_close = 1;
}
}
ret = watchdog_trigger(data);
if (ret < 0)
return ret;
}
return count;
}
static long watchdog_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg)
{
struct watchdog_info ident = {
.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
WDIOF_CARDRESET,
.identity = "FSC watchdog"
};
int i, ret = 0;
struct fschmd_data *data = filp->private_data;
switch (cmd) {
case WDIOC_GETSUPPORT:
ident.firmware_version = data->revision;
if (!nowayout)
ident.options |= WDIOF_MAGICCLOSE;
if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
ret = -EFAULT;
break;
case WDIOC_GETSTATUS:
ret = put_user(0, (int __user *)arg);
break;
case WDIOC_GETBOOTSTATUS:
if (data->watchdog_state & FSCHMD_WDOG_STATE_CARDRESET)
ret = put_user(WDIOF_CARDRESET, (int __user *)arg);
else
ret = put_user(0, (int __user *)arg);
break;
case WDIOC_KEEPALIVE:
ret = watchdog_trigger(data);
break;
case WDIOC_GETTIMEOUT:
i = watchdog_get_timeout(data);
ret = put_user(i, (int __user *)arg);
break;
case WDIOC_SETTIMEOUT:
if (get_user(i, (int __user *)arg)) {
ret = -EFAULT;
break;
}
ret = watchdog_set_timeout(data, i);
if (ret > 0)
ret = put_user(ret, (int __user *)arg);
break;
case WDIOC_SETOPTIONS:
if (get_user(i, (int __user *)arg)) {
ret = -EFAULT;
break;
}
if (i & WDIOS_DISABLECARD)
ret = watchdog_stop(data);
else if (i & WDIOS_ENABLECARD)
ret = watchdog_trigger(data);
else
ret = -EINVAL;
break;
default:
ret = -ENOTTY;
}
return ret;
}
static const struct file_operations watchdog_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.open = watchdog_open,
.release = watchdog_release,
.write = watchdog_write,
.unlocked_ioctl = watchdog_ioctl,
.compat_ioctl = compat_ptr_ioctl,
};
/*
* Detect, register, unregister and update device functions
*/
/*
* DMI decode routine to read voltage scaling factors from special DMI tables,
* which are available on FSC machines with an fscher or later chip.
*/
static void fschmd_dmi_decode(const struct dmi_header *header, void *dummy)
{
int i, mult[3] = { 0 }, offset[3] = { 0 }, vref = 0, found = 0;
/*
* dmi code ugliness, we get passed the address of the contents of
* a complete DMI record, but in the form of a dmi_header pointer, in
* reality this address holds header->length bytes of which the header
* are the first 4 bytes
*/
u8 *dmi_data = (u8 *)header;
/* We are looking for OEM-specific type 185 */
if (header->type != 185)
return;
/*
* we are looking for what Siemens calls "subtype" 19, the subtype
* is stored in byte 5 of the dmi block
*/
if (header->length < 5 || dmi_data[4] != 19)
return;
/*
* After the subtype comes 1 unknown byte and then blocks of 5 bytes,
* consisting of what Siemens calls an "Entity" number, followed by
* 2 16-bit words in LSB first order
*/
for (i = 6; (i + 4) < header->length; i += 5) {
/* entity 1 - 3: voltage multiplier and offset */
if (dmi_data[i] >= 1 && dmi_data[i] <= 3) {
/* Our in sensors order and the DMI order differ */
const int shuffle[3] = { 1, 0, 2 };
int in = shuffle[dmi_data[i] - 1];
/* Check for twice the same entity */
if (found & (1 << in))
return;
mult[in] = dmi_data[i + 1] | (dmi_data[i + 2] << 8);
offset[in] = dmi_data[i + 3] | (dmi_data[i + 4] << 8);
found |= 1 << in;
}
/* entity 7: reference voltage */
if (dmi_data[i] == 7) {
/* Check for twice the same entity */
if (found & 0x08)
return;
vref = dmi_data[i + 1] | (dmi_data[i + 2] << 8);
found |= 0x08;
}
}
if (found == 0x0F) {
for (i = 0; i < 3; i++) {
dmi_mult[i] = mult[i] * 10;
dmi_offset[i] = offset[i] * 10;
}
/*
* According to the docs there should be separate dmi entries
* for the mult's and offsets of in3-5 of the syl, but on
* my test machine these are not present
*/
dmi_mult[3] = dmi_mult[2];
dmi_mult[4] = dmi_mult[1];
dmi_mult[5] = dmi_mult[2];
dmi_offset[3] = dmi_offset[2];
dmi_offset[4] = dmi_offset[1];
dmi_offset[5] = dmi_offset[2];
dmi_vref = vref;
}
}
static int fschmd_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
enum chips kind;
struct i2c_adapter *adapter = client->adapter;
char id[4];
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* Detect & Identify the chip */
id[0] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_0);
id[1] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_1);
id[2] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_2);
id[3] = '\0';
if (!strcmp(id, "PEG"))
kind = fscpos;
else if (!strcmp(id, "HER"))
kind = fscher;
else if (!strcmp(id, "SCY"))
kind = fscscy;
else if (!strcmp(id, "HRC"))
kind = fschrc;
else if (!strcmp(id, "HMD"))
kind = fschmd;
else if (!strcmp(id, "HDS"))
kind = fschds;
else if (!strcmp(id, "SYL"))
kind = fscsyl;
else
return -ENODEV;
strscpy(info->type, fschmd_id[kind].name, I2C_NAME_SIZE);
return 0;
}
static int fschmd_probe(struct i2c_client *client)
{
struct fschmd_data *data;
static const char * const names[7] = { "Poseidon", "Hermes", "Scylla",
"Heracles", "Heimdall", "Hades", "Syleus" };
static const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
int i, err;
enum chips kind = i2c_match_id(fschmd_id, client)->driver_data;
data = kzalloc(sizeof(struct fschmd_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
mutex_init(&data->watchdog_lock);
INIT_LIST_HEAD(&data->list);
kref_init(&data->kref);
/*
* Store client pointer in our data struct for watchdog usage
* (where the client is found through a data ptr instead of the
* otherway around)
*/
data->client = client;
data->kind = kind;
if (kind == fscpos) {
/*
* The Poseidon has hardwired temp limits, fill these
* in for the alarm resetting code
*/
data->temp_max[0] = 70 + 128;
data->temp_max[1] = 50 + 128;
data->temp_max[2] = 50 + 128;
}
/* Read the special DMI table for fscher and newer chips */
if ((kind == fscher || kind >= fschrc) && dmi_vref == -1) {
dmi_walk(fschmd_dmi_decode, NULL);
if (dmi_vref == -1) {
dev_warn(&client->dev,
"Couldn't get voltage scaling factors from "
"BIOS DMI table, using builtin defaults\n");
dmi_vref = 33;
}
}
/* Read in some never changing registers */
data->revision = i2c_smbus_read_byte_data(client, FSCHMD_REG_REVISION);
data->global_control = i2c_smbus_read_byte_data(client,
FSCHMD_REG_CONTROL);
data->watchdog_control = i2c_smbus_read_byte_data(client,
FSCHMD_REG_WDOG_CONTROL[data->kind]);
data->watchdog_state = i2c_smbus_read_byte_data(client,
FSCHMD_REG_WDOG_STATE[data->kind]);
data->watchdog_preset = i2c_smbus_read_byte_data(client,
FSCHMD_REG_WDOG_PRESET[data->kind]);
err = device_create_file(&client->dev, &dev_attr_alert_led);
if (err)
goto exit_detach;
for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++) {
err = device_create_file(&client->dev,
&fschmd_attr[i].dev_attr);
if (err)
goto exit_detach;
}
for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++) {
/* Poseidon doesn't have TEMP_LIMIT registers */
if (kind == fscpos && fschmd_temp_attr[i].dev_attr.show ==
temp_max_show)
continue;
if (kind == fscsyl) {
if (i % 4 == 0)
data->temp_status[i / 4] =
i2c_smbus_read_byte_data(client,
FSCHMD_REG_TEMP_STATE
[data->kind][i / 4]);
if (data->temp_status[i / 4] & FSCHMD_TEMP_DISABLED)
continue;
}
err = device_create_file(&client->dev,
&fschmd_temp_attr[i].dev_attr);
if (err)
goto exit_detach;
}
for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++) {
/* Poseidon doesn't have a FAN_MIN register for its 3rd fan */
if (kind == fscpos &&
!strcmp(fschmd_fan_attr[i].dev_attr.attr.name,
"pwm3_auto_point1_pwm"))
continue;
if (kind == fscsyl) {
if (i % 5 == 0)
data->fan_status[i / 5] =
i2c_smbus_read_byte_data(client,
FSCHMD_REG_FAN_STATE
[data->kind][i / 5]);
if (data->fan_status[i / 5] & FSCHMD_FAN_DISABLED)
continue;
}
err = device_create_file(&client->dev,
&fschmd_fan_attr[i].dev_attr);
if (err)
goto exit_detach;
}
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
data->hwmon_dev = NULL;
goto exit_detach;
}
/*
* We take the data_mutex lock early so that watchdog_open() cannot
* run when misc_register() has completed, but we've not yet added
* our data to the watchdog_data_list (and set the default timeout)
*/
mutex_lock(&watchdog_data_mutex);
for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
/* Register our watchdog part */
snprintf(data->watchdog_name, sizeof(data->watchdog_name),
"watchdog%c", (i == 0) ? '\0' : ('0' + i));
data->watchdog_miscdev.name = data->watchdog_name;
data->watchdog_miscdev.fops = &watchdog_fops;
data->watchdog_miscdev.minor = watchdog_minors[i];
err = misc_register(&data->watchdog_miscdev);
if (err == -EBUSY)
continue;
if (err) {
data->watchdog_miscdev.minor = 0;
dev_err(&client->dev,
"Registering watchdog chardev: %d\n", err);
break;
}
list_add(&data->list, &watchdog_data_list);
watchdog_set_timeout(data, 60);
dev_info(&client->dev,
"Registered watchdog chardev major 10, minor: %d\n",
watchdog_minors[i]);
break;
}
if (i == ARRAY_SIZE(watchdog_minors)) {
data->watchdog_miscdev.minor = 0;
dev_warn(&client->dev,
"Couldn't register watchdog chardev (due to no free minor)\n");
}
mutex_unlock(&watchdog_data_mutex);
dev_info(&client->dev, "Detected FSC %s chip, revision: %d\n",
names[data->kind], (int) data->revision);
return 0;
exit_detach:
fschmd_remove(client); /* will also free data for us */
return err;
}
static void fschmd_remove(struct i2c_client *client)
{
struct fschmd_data *data = i2c_get_clientdata(client);
int i;
/* Unregister the watchdog (if registered) */
if (data->watchdog_miscdev.minor) {
misc_deregister(&data->watchdog_miscdev);
if (data->watchdog_is_open) {
dev_warn(&client->dev,
"i2c client detached with watchdog open! "
"Stopping watchdog.\n");
watchdog_stop(data);
}
mutex_lock(&watchdog_data_mutex);
list_del(&data->list);
mutex_unlock(&watchdog_data_mutex);
/* Tell the watchdog code the client is gone */
mutex_lock(&data->watchdog_lock);
data->client = NULL;
mutex_unlock(&data->watchdog_lock);
}
/*
* Check if registered in case we're called from fschmd_detect
* to cleanup after an error
*/
if (data->hwmon_dev)
hwmon_device_unregister(data->hwmon_dev);
device_remove_file(&client->dev, &dev_attr_alert_led);
for (i = 0; i < (FSCHMD_NO_VOLT_SENSORS[data->kind]); i++)
device_remove_file(&client->dev, &fschmd_attr[i].dev_attr);
for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++)
device_remove_file(&client->dev,
&fschmd_temp_attr[i].dev_attr);
for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++)
device_remove_file(&client->dev,
&fschmd_fan_attr[i].dev_attr);
mutex_lock(&watchdog_data_mutex);
kref_put(&data->kref, fschmd_release_resources);
mutex_unlock(&watchdog_data_mutex);
}
static struct fschmd_data *fschmd_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct fschmd_data *data = i2c_get_clientdata(client);
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + 2 * HZ) || !data->valid) {
for (i = 0; i < FSCHMD_NO_TEMP_SENSORS[data->kind]; i++) {
data->temp_act[i] = i2c_smbus_read_byte_data(client,
FSCHMD_REG_TEMP_ACT[data->kind][i]);
data->temp_status[i] = i2c_smbus_read_byte_data(client,
FSCHMD_REG_TEMP_STATE[data->kind][i]);
/* The fscpos doesn't have TEMP_LIMIT registers */
if (FSCHMD_REG_TEMP_LIMIT[data->kind][i])
data->temp_max[i] = i2c_smbus_read_byte_data(
client,
FSCHMD_REG_TEMP_LIMIT[data->kind][i]);
/*
* reset alarm if the alarm condition is gone,
* the chip doesn't do this itself
*/
if ((data->temp_status[i] & FSCHMD_TEMP_ALARM_MASK) ==
FSCHMD_TEMP_ALARM_MASK &&
data->temp_act[i] < data->temp_max[i])
i2c_smbus_write_byte_data(client,
FSCHMD_REG_TEMP_STATE[data->kind][i],
data->temp_status[i]);
}
for (i = 0; i < FSCHMD_NO_FAN_SENSORS[data->kind]; i++) {
data->fan_act[i] = i2c_smbus_read_byte_data(client,
FSCHMD_REG_FAN_ACT[data->kind][i]);
data->fan_status[i] = i2c_smbus_read_byte_data(client,
FSCHMD_REG_FAN_STATE[data->kind][i]);
data->fan_ripple[i] = i2c_smbus_read_byte_data(client,
FSCHMD_REG_FAN_RIPPLE[data->kind][i]);
/* The fscpos third fan doesn't have a fan_min */
if (FSCHMD_REG_FAN_MIN[data->kind][i])
data->fan_min[i] = i2c_smbus_read_byte_data(
client,
FSCHMD_REG_FAN_MIN[data->kind][i]);
/* reset fan status if speed is back to > 0 */
if ((data->fan_status[i] & FSCHMD_FAN_ALARM) &&
data->fan_act[i])
i2c_smbus_write_byte_data(client,
FSCHMD_REG_FAN_STATE[data->kind][i],
data->fan_status[i]);
}
for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++)
data->volt[i] = i2c_smbus_read_byte_data(client,
FSCHMD_REG_VOLT[data->kind][i]);
data->last_updated = jiffies;
data->valid = true;
}
mutex_unlock(&data->update_lock);
return data;
}
module_i2c_driver(fschmd_driver);
MODULE_AUTHOR("Hans de Goede <[email protected]>");
MODULE_DESCRIPTION("FSC Poseidon, Hermes, Scylla, Heracles, Heimdall, Hades "
"and Syleus driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/fschmd.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* IBM PowerNV platform sensors for temperature/fan/voltage/power
* Copyright (C) 2014 IBM
*/
#define DRVNAME "ibmpowernv"
#define pr_fmt(fmt) DRVNAME ": " fmt
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <asm/opal.h>
#include <linux/err.h>
#include <asm/cputhreads.h>
#include <asm/smp.h>
#define MAX_ATTR_LEN 32
#define MAX_LABEL_LEN 64
/* Sensor suffix name from DT */
#define DT_FAULT_ATTR_SUFFIX "faulted"
#define DT_DATA_ATTR_SUFFIX "data"
#define DT_THRESHOLD_ATTR_SUFFIX "thrs"
/*
* Enumerates all the types of sensors in the POWERNV platform and does index
* into 'struct sensor_group'
*/
enum sensors {
FAN,
TEMP,
POWER_SUPPLY,
POWER_INPUT,
CURRENT,
ENERGY,
MAX_SENSOR_TYPE,
};
#define INVALID_INDEX (-1U)
/*
* 'compatible' string properties for sensor types as defined in old
* PowerNV firmware (skiboot). These are ordered as 'enum sensors'.
*/
static const char * const legacy_compatibles[] = {
"ibm,opal-sensor-cooling-fan",
"ibm,opal-sensor-amb-temp",
"ibm,opal-sensor-power-supply",
"ibm,opal-sensor-power"
};
static struct sensor_group {
const char *name; /* matches property 'sensor-type' */
struct attribute_group group;
u32 attr_count;
u32 hwmon_index;
} sensor_groups[] = {
{ "fan" },
{ "temp" },
{ "in" },
{ "power" },
{ "curr" },
{ "energy" },
};
struct sensor_data {
u32 id; /* An opaque id of the firmware for each sensor */
u32 hwmon_index;
u32 opal_index;
enum sensors type;
char label[MAX_LABEL_LEN];
char name[MAX_ATTR_LEN];
struct device_attribute dev_attr;
struct sensor_group_data *sgrp_data;
};
struct sensor_group_data {
struct mutex mutex;
u32 gid;
bool enable;
};
struct platform_data {
const struct attribute_group *attr_groups[MAX_SENSOR_TYPE + 1];
struct sensor_group_data *sgrp_data;
u32 sensors_count; /* Total count of sensors from each group */
u32 nr_sensor_groups; /* Total number of sensor groups */
};
static ssize_t show_sensor(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_data *sdata = container_of(devattr, struct sensor_data,
dev_attr);
ssize_t ret;
u64 x;
if (sdata->sgrp_data && !sdata->sgrp_data->enable)
return -ENODATA;
ret = opal_get_sensor_data_u64(sdata->id, &x);
if (ret)
return ret;
/* Convert temperature to milli-degrees */
if (sdata->type == TEMP)
x *= 1000;
/* Convert power to micro-watts */
else if (sdata->type == POWER_INPUT)
x *= 1000000;
return sprintf(buf, "%llu\n", x);
}
static ssize_t show_enable(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_data *sdata = container_of(devattr, struct sensor_data,
dev_attr);
return sprintf(buf, "%u\n", sdata->sgrp_data->enable);
}
static ssize_t store_enable(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_data *sdata = container_of(devattr, struct sensor_data,
dev_attr);
struct sensor_group_data *sgrp_data = sdata->sgrp_data;
int ret;
bool data;
ret = kstrtobool(buf, &data);
if (ret)
return ret;
ret = mutex_lock_interruptible(&sgrp_data->mutex);
if (ret)
return ret;
if (data != sgrp_data->enable) {
ret = sensor_group_enable(sgrp_data->gid, data);
if (!ret)
sgrp_data->enable = data;
}
if (!ret)
ret = count;
mutex_unlock(&sgrp_data->mutex);
return ret;
}
static ssize_t show_label(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_data *sdata = container_of(devattr, struct sensor_data,
dev_attr);
return sprintf(buf, "%s\n", sdata->label);
}
static int get_logical_cpu(int hwcpu)
{
int cpu;
for_each_possible_cpu(cpu)
if (get_hard_smp_processor_id(cpu) == hwcpu)
return cpu;
return -ENOENT;
}
static void make_sensor_label(struct device_node *np,
struct sensor_data *sdata, const char *label)
{
u32 id;
size_t n;
n = scnprintf(sdata->label, sizeof(sdata->label), "%s", label);
/*
* Core temp pretty print
*/
if (!of_property_read_u32(np, "ibm,pir", &id)) {
int cpuid = get_logical_cpu(id);
if (cpuid >= 0)
/*
* The digital thermal sensors are associated
* with a core.
*/
n += scnprintf(sdata->label + n,
sizeof(sdata->label) - n, " %d",
cpuid);
else
n += scnprintf(sdata->label + n,
sizeof(sdata->label) - n, " phy%d", id);
}
/*
* Membuffer pretty print
*/
if (!of_property_read_u32(np, "ibm,chip-id", &id))
n += scnprintf(sdata->label + n, sizeof(sdata->label) - n,
" %d", id & 0xffff);
}
static int get_sensor_index_attr(const char *name, u32 *index, char *attr)
{
char *hash_pos = strchr(name, '#');
char buf[8] = { 0 };
char *dash_pos;
u32 copy_len;
int err;
if (!hash_pos)
return -EINVAL;
dash_pos = strchr(hash_pos, '-');
if (!dash_pos)
return -EINVAL;
copy_len = dash_pos - hash_pos - 1;
if (copy_len >= sizeof(buf))
return -EINVAL;
strncpy(buf, hash_pos + 1, copy_len);
err = kstrtou32(buf, 10, index);
if (err)
return err;
strscpy(attr, dash_pos + 1, MAX_ATTR_LEN);
return 0;
}
static const char *convert_opal_attr_name(enum sensors type,
const char *opal_attr)
{
const char *attr_name = NULL;
if (!strcmp(opal_attr, DT_FAULT_ATTR_SUFFIX)) {
attr_name = "fault";
} else if (!strcmp(opal_attr, DT_DATA_ATTR_SUFFIX)) {
attr_name = "input";
} else if (!strcmp(opal_attr, DT_THRESHOLD_ATTR_SUFFIX)) {
if (type == TEMP)
attr_name = "max";
else if (type == FAN)
attr_name = "min";
}
return attr_name;
}
/*
* This function translates the DT node name into the 'hwmon' attribute name.
* IBMPOWERNV device node appear like cooling-fan#2-data, amb-temp#1-thrs etc.
* which need to be mapped as fan2_input, temp1_max respectively before
* populating them inside hwmon device class.
*/
static const char *parse_opal_node_name(const char *node_name,
enum sensors type, u32 *index)
{
char attr_suffix[MAX_ATTR_LEN];
const char *attr_name;
int err;
err = get_sensor_index_attr(node_name, index, attr_suffix);
if (err)
return ERR_PTR(err);
attr_name = convert_opal_attr_name(type, attr_suffix);
if (!attr_name)
return ERR_PTR(-ENOENT);
return attr_name;
}
static int get_sensor_type(struct device_node *np)
{
enum sensors type;
const char *str;
for (type = 0; type < ARRAY_SIZE(legacy_compatibles); type++) {
if (of_device_is_compatible(np, legacy_compatibles[type]))
return type;
}
/*
* Let's check if we have a newer device tree
*/
if (!of_device_is_compatible(np, "ibm,opal-sensor"))
return MAX_SENSOR_TYPE;
if (of_property_read_string(np, "sensor-type", &str))
return MAX_SENSOR_TYPE;
for (type = 0; type < MAX_SENSOR_TYPE; type++)
if (!strcmp(str, sensor_groups[type].name))
return type;
return MAX_SENSOR_TYPE;
}
static u32 get_sensor_hwmon_index(struct sensor_data *sdata,
struct sensor_data *sdata_table, int count)
{
int i;
/*
* We don't use the OPAL index on newer device trees
*/
if (sdata->opal_index != INVALID_INDEX) {
for (i = 0; i < count; i++)
if (sdata_table[i].opal_index == sdata->opal_index &&
sdata_table[i].type == sdata->type)
return sdata_table[i].hwmon_index;
}
return ++sensor_groups[sdata->type].hwmon_index;
}
static int init_sensor_group_data(struct platform_device *pdev,
struct platform_data *pdata)
{
struct sensor_group_data *sgrp_data;
struct device_node *groups, *sgrp;
int count = 0, ret = 0;
enum sensors type;
groups = of_find_compatible_node(NULL, NULL, "ibm,opal-sensor-group");
if (!groups)
return ret;
for_each_child_of_node(groups, sgrp) {
type = get_sensor_type(sgrp);
if (type != MAX_SENSOR_TYPE)
pdata->nr_sensor_groups++;
}
if (!pdata->nr_sensor_groups)
goto out;
sgrp_data = devm_kcalloc(&pdev->dev, pdata->nr_sensor_groups,
sizeof(*sgrp_data), GFP_KERNEL);
if (!sgrp_data) {
ret = -ENOMEM;
goto out;
}
for_each_child_of_node(groups, sgrp) {
u32 gid;
type = get_sensor_type(sgrp);
if (type == MAX_SENSOR_TYPE)
continue;
if (of_property_read_u32(sgrp, "sensor-group-id", &gid))
continue;
if (of_count_phandle_with_args(sgrp, "sensors", NULL) <= 0)
continue;
sensor_groups[type].attr_count++;
sgrp_data[count].gid = gid;
mutex_init(&sgrp_data[count].mutex);
sgrp_data[count++].enable = false;
}
pdata->sgrp_data = sgrp_data;
out:
of_node_put(groups);
return ret;
}
static struct sensor_group_data *get_sensor_group(struct platform_data *pdata,
struct device_node *node,
enum sensors gtype)
{
struct sensor_group_data *sgrp_data = pdata->sgrp_data;
struct device_node *groups, *sgrp;
groups = of_find_compatible_node(NULL, NULL, "ibm,opal-sensor-group");
if (!groups)
return NULL;
for_each_child_of_node(groups, sgrp) {
struct of_phandle_iterator it;
u32 gid;
int rc, i;
enum sensors type;
type = get_sensor_type(sgrp);
if (type != gtype)
continue;
if (of_property_read_u32(sgrp, "sensor-group-id", &gid))
continue;
of_for_each_phandle(&it, rc, sgrp, "sensors", NULL, 0)
if (it.phandle == node->phandle) {
of_node_put(it.node);
break;
}
if (rc)
continue;
for (i = 0; i < pdata->nr_sensor_groups; i++)
if (gid == sgrp_data[i].gid) {
of_node_put(sgrp);
of_node_put(groups);
return &sgrp_data[i];
}
}
of_node_put(groups);
return NULL;
}
static int populate_attr_groups(struct platform_device *pdev)
{
struct platform_data *pdata = platform_get_drvdata(pdev);
const struct attribute_group **pgroups = pdata->attr_groups;
struct device_node *opal, *np;
enum sensors type;
int ret;
ret = init_sensor_group_data(pdev, pdata);
if (ret)
return ret;
opal = of_find_node_by_path("/ibm,opal/sensors");
for_each_child_of_node(opal, np) {
const char *label;
type = get_sensor_type(np);
if (type == MAX_SENSOR_TYPE)
continue;
sensor_groups[type].attr_count++;
/*
* add attributes for labels, min and max
*/
if (!of_property_read_string(np, "label", &label))
sensor_groups[type].attr_count++;
if (of_property_present(np, "sensor-data-min"))
sensor_groups[type].attr_count++;
if (of_property_present(np, "sensor-data-max"))
sensor_groups[type].attr_count++;
}
of_node_put(opal);
for (type = 0; type < MAX_SENSOR_TYPE; type++) {
sensor_groups[type].group.attrs = devm_kcalloc(&pdev->dev,
sensor_groups[type].attr_count + 1,
sizeof(struct attribute *),
GFP_KERNEL);
if (!sensor_groups[type].group.attrs)
return -ENOMEM;
pgroups[type] = &sensor_groups[type].group;
pdata->sensors_count += sensor_groups[type].attr_count;
sensor_groups[type].attr_count = 0;
}
return 0;
}
static void create_hwmon_attr(struct sensor_data *sdata, const char *attr_name,
ssize_t (*show)(struct device *dev,
struct device_attribute *attr,
char *buf),
ssize_t (*store)(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count))
{
snprintf(sdata->name, MAX_ATTR_LEN, "%s%d_%s",
sensor_groups[sdata->type].name, sdata->hwmon_index,
attr_name);
sysfs_attr_init(&sdata->dev_attr.attr);
sdata->dev_attr.attr.name = sdata->name;
sdata->dev_attr.show = show;
if (store) {
sdata->dev_attr.store = store;
sdata->dev_attr.attr.mode = 0664;
} else {
sdata->dev_attr.attr.mode = 0444;
}
}
static void populate_sensor(struct sensor_data *sdata, int od, int hd, int sid,
const char *attr_name, enum sensors type,
const struct attribute_group *pgroup,
struct sensor_group_data *sgrp_data,
ssize_t (*show)(struct device *dev,
struct device_attribute *attr,
char *buf),
ssize_t (*store)(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count))
{
sdata->id = sid;
sdata->type = type;
sdata->opal_index = od;
sdata->hwmon_index = hd;
create_hwmon_attr(sdata, attr_name, show, store);
pgroup->attrs[sensor_groups[type].attr_count++] = &sdata->dev_attr.attr;
sdata->sgrp_data = sgrp_data;
}
static char *get_max_attr(enum sensors type)
{
switch (type) {
case POWER_INPUT:
return "input_highest";
default:
return "highest";
}
}
static char *get_min_attr(enum sensors type)
{
switch (type) {
case POWER_INPUT:
return "input_lowest";
default:
return "lowest";
}
}
/*
* Iterate through the device tree for each child of 'sensors' node, create
* a sysfs attribute file, the file is named by translating the DT node name
* to the name required by the higher 'hwmon' driver like fan1_input, temp1_max
* etc..
*/
static int create_device_attrs(struct platform_device *pdev)
{
struct platform_data *pdata = platform_get_drvdata(pdev);
const struct attribute_group **pgroups = pdata->attr_groups;
struct device_node *opal, *np;
struct sensor_data *sdata;
u32 count = 0;
u32 group_attr_id[MAX_SENSOR_TYPE] = {0};
sdata = devm_kcalloc(&pdev->dev,
pdata->sensors_count, sizeof(*sdata),
GFP_KERNEL);
if (!sdata)
return -ENOMEM;
opal = of_find_node_by_path("/ibm,opal/sensors");
for_each_child_of_node(opal, np) {
struct sensor_group_data *sgrp_data;
const char *attr_name;
u32 opal_index, hw_id;
u32 sensor_id;
const char *label;
enum sensors type;
type = get_sensor_type(np);
if (type == MAX_SENSOR_TYPE)
continue;
/*
* Newer device trees use a "sensor-data" property
* name for input.
*/
if (of_property_read_u32(np, "sensor-id", &sensor_id) &&
of_property_read_u32(np, "sensor-data", &sensor_id)) {
dev_info(&pdev->dev,
"'sensor-id' missing in the node '%pOFn'\n",
np);
continue;
}
sdata[count].id = sensor_id;
sdata[count].type = type;
/*
* If we can not parse the node name, it means we are
* running on a newer device tree. We can just forget
* about the OPAL index and use a defaut value for the
* hwmon attribute name
*/
attr_name = parse_opal_node_name(np->name, type, &opal_index);
if (IS_ERR(attr_name)) {
attr_name = "input";
opal_index = INVALID_INDEX;
}
hw_id = get_sensor_hwmon_index(&sdata[count], sdata, count);
sgrp_data = get_sensor_group(pdata, np, type);
populate_sensor(&sdata[count], opal_index, hw_id, sensor_id,
attr_name, type, pgroups[type], sgrp_data,
show_sensor, NULL);
count++;
if (!of_property_read_string(np, "label", &label)) {
/*
* For the label attribute, we can reuse the
* "properties" of the previous "input"
* attribute. They are related to the same
* sensor.
*/
make_sensor_label(np, &sdata[count], label);
populate_sensor(&sdata[count], opal_index, hw_id,
sensor_id, "label", type, pgroups[type],
NULL, show_label, NULL);
count++;
}
if (!of_property_read_u32(np, "sensor-data-max", &sensor_id)) {
attr_name = get_max_attr(type);
populate_sensor(&sdata[count], opal_index, hw_id,
sensor_id, attr_name, type,
pgroups[type], sgrp_data, show_sensor,
NULL);
count++;
}
if (!of_property_read_u32(np, "sensor-data-min", &sensor_id)) {
attr_name = get_min_attr(type);
populate_sensor(&sdata[count], opal_index, hw_id,
sensor_id, attr_name, type,
pgroups[type], sgrp_data, show_sensor,
NULL);
count++;
}
if (sgrp_data && !sgrp_data->enable) {
sgrp_data->enable = true;
hw_id = ++group_attr_id[type];
populate_sensor(&sdata[count], opal_index, hw_id,
sgrp_data->gid, "enable", type,
pgroups[type], sgrp_data, show_enable,
store_enable);
count++;
}
}
of_node_put(opal);
return 0;
}
static int ibmpowernv_probe(struct platform_device *pdev)
{
struct platform_data *pdata;
struct device *hwmon_dev;
int err;
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
platform_set_drvdata(pdev, pdata);
pdata->sensors_count = 0;
pdata->nr_sensor_groups = 0;
err = populate_attr_groups(pdev);
if (err)
return err;
/* Create sysfs attribute data for each sensor found in the DT */
err = create_device_attrs(pdev);
if (err)
return err;
/* Finally, register with hwmon */
hwmon_dev = devm_hwmon_device_register_with_groups(&pdev->dev, DRVNAME,
pdata,
pdata->attr_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct platform_device_id opal_sensor_driver_ids[] = {
{
.name = "opal-sensor",
},
{ }
};
MODULE_DEVICE_TABLE(platform, opal_sensor_driver_ids);
static const struct of_device_id opal_sensor_match[] = {
{ .compatible = "ibm,opal-sensor" },
{ },
};
MODULE_DEVICE_TABLE(of, opal_sensor_match);
static struct platform_driver ibmpowernv_driver = {
.probe = ibmpowernv_probe,
.id_table = opal_sensor_driver_ids,
.driver = {
.name = DRVNAME,
.of_match_table = opal_sensor_match,
},
};
module_platform_driver(ibmpowernv_driver);
MODULE_AUTHOR("Neelesh Gupta <[email protected]>");
MODULE_DESCRIPTION("IBM POWERNV platform sensors");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/ibmpowernv.c
|
// SPDX-License-Identifier: GPL-2.0+
/*
* HWMON driver for ASUS motherboards that publish some sensor values
* via the embedded controller registers.
*
* Copyright (C) 2021 Eugene Shalygin <[email protected]>
* EC provides:
* - Chipset temperature
* - CPU temperature
* - Motherboard temperature
* - T_Sensor temperature
* - VRM temperature
* - Water In temperature
* - Water Out temperature
* - CPU Optional fan RPM
* - Chipset fan RPM
* - VRM Heat Sink fan RPM
* - Water Flow fan RPM
* - CPU current
* - CPU core voltage
*/
#include <linux/acpi.h>
#include <linux/bitops.h>
#include <linux/dev_printk.h>
#include <linux/dmi.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/sort.h>
#include <linux/units.h>
#include <asm/unaligned.h>
static char *mutex_path_override;
/* Writing to this EC register switches EC bank */
#define ASUS_EC_BANK_REGISTER 0xff
#define SENSOR_LABEL_LEN 16
/*
* Arbitrary set max. allowed bank number. Required for sorting banks and
* currently is overkill with just 2 banks used at max, but for the sake
* of alignment let's set it to a higher value.
*/
#define ASUS_EC_MAX_BANK 3
#define ACPI_LOCK_DELAY_MS 500
/* ACPI mutex for locking access to the EC for the firmware */
#define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX"
#define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX"
#define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0"
#define MAX_IDENTICAL_BOARD_VARIATIONS 3
/* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */
#define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK"
typedef union {
u32 value;
struct {
u8 index;
u8 bank;
u8 size;
u8 dummy;
} components;
} sensor_address;
#define MAKE_SENSOR_ADDRESS(size, bank, index) { \
.value = (size << 16) + (bank << 8) + index \
}
static u32 hwmon_attributes[hwmon_max] = {
[hwmon_chip] = HWMON_C_REGISTER_TZ,
[hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
[hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
[hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
[hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL,
};
struct ec_sensor_info {
char label[SENSOR_LABEL_LEN];
enum hwmon_sensor_types type;
sensor_address addr;
};
#define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \
.label = sensor_label, .type = sensor_type, \
.addr = MAKE_SENSOR_ADDRESS(size, bank, index), \
}
enum ec_sensors {
/* chipset temperature [℃] */
ec_sensor_temp_chipset,
/* CPU temperature [℃] */
ec_sensor_temp_cpu,
/* CPU package temperature [℃] */
ec_sensor_temp_cpu_package,
/* motherboard temperature [℃] */
ec_sensor_temp_mb,
/* "T_Sensor" temperature sensor reading [℃] */
ec_sensor_temp_t_sensor,
/* VRM temperature [℃] */
ec_sensor_temp_vrm,
/* CPU Core voltage [mV] */
ec_sensor_in_cpu_core,
/* CPU_Opt fan [RPM] */
ec_sensor_fan_cpu_opt,
/* VRM heat sink fan [RPM] */
ec_sensor_fan_vrm_hs,
/* Chipset fan [RPM] */
ec_sensor_fan_chipset,
/* Water flow sensor reading [RPM] */
ec_sensor_fan_water_flow,
/* CPU current [A] */
ec_sensor_curr_cpu,
/* "Water_In" temperature sensor reading [℃] */
ec_sensor_temp_water_in,
/* "Water_Out" temperature sensor reading [℃] */
ec_sensor_temp_water_out,
/* "Water_Block_In" temperature sensor reading [℃] */
ec_sensor_temp_water_block_in,
/* "Water_Block_Out" temperature sensor reading [℃] */
ec_sensor_temp_water_block_out,
/* "T_sensor_2" temperature sensor reading [℃] */
ec_sensor_temp_t_sensor_2,
/* "Extra_1" temperature sensor reading [℃] */
ec_sensor_temp_sensor_extra_1,
/* "Extra_2" temperature sensor reading [℃] */
ec_sensor_temp_sensor_extra_2,
/* "Extra_3" temperature sensor reading [℃] */
ec_sensor_temp_sensor_extra_3,
};
#define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset)
#define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu)
#define SENSOR_TEMP_CPU_PACKAGE BIT(ec_sensor_temp_cpu_package)
#define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb)
#define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor)
#define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm)
#define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core)
#define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt)
#define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs)
#define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset)
#define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow)
#define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu)
#define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in)
#define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out)
#define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in)
#define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out)
#define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2)
#define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1)
#define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2)
#define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3)
enum board_family {
family_unknown,
family_amd_400_series,
family_amd_500_series,
family_amd_600_series,
family_intel_300_series,
family_intel_600_series
};
/* All the known sensors for ASUS EC controllers */
static const struct ec_sensor_info sensors_family_amd_400[] = {
[ec_sensor_temp_chipset] =
EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
[ec_sensor_temp_cpu] =
EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
[ec_sensor_temp_mb] =
EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
[ec_sensor_temp_t_sensor] =
EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
[ec_sensor_temp_vrm] =
EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
[ec_sensor_in_cpu_core] =
EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
[ec_sensor_fan_cpu_opt] =
EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc),
[ec_sensor_fan_vrm_hs] =
EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
[ec_sensor_fan_chipset] =
/* no chipset fans in this generation */
EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00),
[ec_sensor_fan_water_flow] =
EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4),
[ec_sensor_curr_cpu] =
EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
[ec_sensor_temp_water_in] =
EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d),
[ec_sensor_temp_water_out] =
EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b),
};
static const struct ec_sensor_info sensors_family_amd_500[] = {
[ec_sensor_temp_chipset] =
EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
[ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
[ec_sensor_temp_mb] =
EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
[ec_sensor_temp_t_sensor] =
EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
[ec_sensor_in_cpu_core] =
EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
[ec_sensor_fan_cpu_opt] =
EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
[ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
[ec_sensor_fan_chipset] =
EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4),
[ec_sensor_fan_water_flow] =
EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
[ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
[ec_sensor_temp_water_in] =
EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
[ec_sensor_temp_water_out] =
EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
[ec_sensor_temp_water_block_in] =
EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02),
[ec_sensor_temp_water_block_out] =
EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03),
[ec_sensor_temp_sensor_extra_1] =
EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09),
[ec_sensor_temp_t_sensor_2] =
EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a),
[ec_sensor_temp_sensor_extra_2] =
EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b),
[ec_sensor_temp_sensor_extra_3] =
EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c),
};
static const struct ec_sensor_info sensors_family_amd_600[] = {
[ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30),
[ec_sensor_temp_cpu_package] = EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
[ec_sensor_temp_mb] =
EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x32),
[ec_sensor_temp_vrm] =
EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33),
[ec_sensor_temp_water_in] =
EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
[ec_sensor_temp_water_out] =
EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
};
static const struct ec_sensor_info sensors_family_intel_300[] = {
[ec_sensor_temp_chipset] =
EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
[ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
[ec_sensor_temp_mb] =
EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
[ec_sensor_temp_t_sensor] =
EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
[ec_sensor_fan_cpu_opt] =
EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
[ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
[ec_sensor_fan_water_flow] =
EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
[ec_sensor_temp_water_in] =
EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
[ec_sensor_temp_water_out] =
EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
};
static const struct ec_sensor_info sensors_family_intel_600[] = {
[ec_sensor_temp_t_sensor] =
EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
};
/* Shortcuts for common combinations */
#define SENSOR_SET_TEMP_CHIPSET_CPU_MB \
(SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB)
#define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT)
#define SENSOR_SET_WATER_BLOCK \
(SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT)
struct ec_board_info {
unsigned long sensors;
/*
* Defines which mutex to use for guarding access to the state and the
* hardware. Can be either a full path to an AML mutex or the
* pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock,
* or left empty to use a regular mutex object, in which case access to
* the hardware is not guarded.
*/
const char *mutex_path;
enum board_family family;
};
static const struct ec_board_info board_info_prime_x470_pro = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
SENSOR_FAN_CPU_OPT |
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
.mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
.family = family_amd_400_series,
};
static const struct ec_board_info board_info_prime_x570_pro = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_pro_art_x570_creator_wifi = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_pro_art_b550_creator = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR |
SENSOR_FAN_CPU_OPT,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_pro_ws_x570_ace = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET |
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_crosshair_x670e_hero = {
.sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
SENSOR_SET_TEMP_WATER,
.mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
.family = family_amd_600_series,
};
static const struct ec_board_info board_info_crosshair_viii_dark_hero = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR |
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_crosshair_viii_hero = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR |
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU |
SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_maximus_xi_hero = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR |
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_intel_300_series,
};
static const struct ec_board_info board_info_crosshair_viii_impact = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_strix_b550_e_gaming = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
SENSOR_FAN_CPU_OPT,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_strix_b550_i_gaming = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU |
SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_strix_x570_e_gaming = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU |
SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_strix_x570_f_gaming = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_strix_x570_i_gaming = {
.sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
SENSOR_TEMP_T_SENSOR |
SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET |
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_amd_500_series,
};
static const struct ec_board_info board_info_strix_z390_f_gaming = {
.sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
SENSOR_TEMP_T_SENSOR |
SENSOR_FAN_CPU_OPT,
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
.family = family_intel_300_series,
};
static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = {
.sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
.mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
.family = family_intel_600_series,
};
static const struct ec_board_info board_info_zenith_ii_extreme = {
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS |
SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE |
SENSOR_SET_WATER_BLOCK |
SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3,
.mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
.family = family_amd_500_series,
};
#define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \
{ \
.matches = { \
DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \
"ASUSTeK COMPUTER INC."), \
DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
}, \
.driver_data = (void *)board_info, \
}
static const struct dmi_system_id dmi_table[] = {
DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO",
&board_info_prime_x470_pro),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO",
&board_info_prime_x570_pro),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI",
&board_info_pro_art_x570_creator_wifi),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt B550-CREATOR",
&board_info_pro_art_b550_creator),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE",
&board_info_pro_ws_x570_ace),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO",
&board_info_crosshair_viii_dark_hero),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA",
&board_info_crosshair_viii_hero),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO",
&board_info_crosshair_viii_hero),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)",
&board_info_crosshair_viii_hero),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E HERO",
&board_info_crosshair_x670e_hero),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO",
&board_info_maximus_xi_hero),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)",
&board_info_maximus_xi_hero),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT",
&board_info_crosshair_viii_impact),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING",
&board_info_strix_b550_e_gaming),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING",
&board_info_strix_b550_i_gaming),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING",
&board_info_strix_x570_e_gaming),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II",
&board_info_strix_x570_e_gaming_wifi_ii),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING",
&board_info_strix_x570_f_gaming),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING",
&board_info_strix_x570_i_gaming),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z390-F GAMING",
&board_info_strix_z390_f_gaming),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4",
&board_info_strix_z690_a_gaming_wifi_d4),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME",
&board_info_zenith_ii_extreme),
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME ALPHA",
&board_info_zenith_ii_extreme),
{},
};
struct ec_sensor {
unsigned int info_index;
s32 cached_value;
};
struct lock_data {
union {
acpi_handle aml;
/* global lock handle */
u32 glk;
} mutex;
bool (*lock)(struct lock_data *data);
bool (*unlock)(struct lock_data *data);
};
/*
* The next function pairs implement options for locking access to the
* state and the EC
*/
static bool lock_via_acpi_mutex(struct lock_data *data)
{
/*
* ASUS DSDT does not specify that access to the EC has to be guarded,
* but firmware does access it via ACPI
*/
return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml,
NULL, ACPI_LOCK_DELAY_MS));
}
static bool unlock_acpi_mutex(struct lock_data *data)
{
return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL));
}
static bool lock_via_global_acpi_lock(struct lock_data *data)
{
return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS,
&data->mutex.glk));
}
static bool unlock_global_acpi_lock(struct lock_data *data)
{
return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk));
}
struct ec_sensors_data {
const struct ec_board_info *board_info;
const struct ec_sensor_info *sensors_info;
struct ec_sensor *sensors;
/* EC registers to read from */
u16 *registers;
u8 *read_buffer;
/* sorted list of unique register banks */
u8 banks[ASUS_EC_MAX_BANK + 1];
/* in jiffies */
unsigned long last_updated;
struct lock_data lock_data;
/* number of board EC sensors */
u8 nr_sensors;
/*
* number of EC registers to read
* (sensor might span more than 1 register)
*/
u8 nr_registers;
/* number of unique register banks */
u8 nr_banks;
};
static u8 register_bank(u16 reg)
{
return reg >> 8;
}
static u8 register_index(u16 reg)
{
return reg & 0x00ff;
}
static bool is_sensor_data_signed(const struct ec_sensor_info *si)
{
/*
* guessed from WMI functions in DSDT code for boards
* of the X470 generation
*/
return si->type == hwmon_temp;
}
static const struct ec_sensor_info *
get_sensor_info(const struct ec_sensors_data *state, int index)
{
return state->sensors_info + state->sensors[index].info_index;
}
static int find_ec_sensor_index(const struct ec_sensors_data *ec,
enum hwmon_sensor_types type, int channel)
{
unsigned int i;
for (i = 0; i < ec->nr_sensors; i++) {
if (get_sensor_info(ec, i)->type == type) {
if (channel == 0)
return i;
channel--;
}
}
return -ENOENT;
}
static int bank_compare(const void *a, const void *b)
{
return *((const s8 *)a) - *((const s8 *)b);
}
static void setup_sensor_data(struct ec_sensors_data *ec)
{
struct ec_sensor *s = ec->sensors;
bool bank_found;
int i, j;
u8 bank;
ec->nr_banks = 0;
ec->nr_registers = 0;
for_each_set_bit(i, &ec->board_info->sensors,
BITS_PER_TYPE(ec->board_info->sensors)) {
s->info_index = i;
s->cached_value = 0;
ec->nr_registers +=
ec->sensors_info[s->info_index].addr.components.size;
bank_found = false;
bank = ec->sensors_info[s->info_index].addr.components.bank;
for (j = 0; j < ec->nr_banks; j++) {
if (ec->banks[j] == bank) {
bank_found = true;
break;
}
}
if (!bank_found) {
ec->banks[ec->nr_banks++] = bank;
}
s++;
}
sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL);
}
static void fill_ec_registers(struct ec_sensors_data *ec)
{
const struct ec_sensor_info *si;
unsigned int i, j, register_idx = 0;
for (i = 0; i < ec->nr_sensors; ++i) {
si = get_sensor_info(ec, i);
for (j = 0; j < si->addr.components.size; ++j, ++register_idx) {
ec->registers[register_idx] =
(si->addr.components.bank << 8) +
si->addr.components.index + j;
}
}
}
static int setup_lock_data(struct device *dev)
{
const char *mutex_path;
int status;
struct ec_sensors_data *state = dev_get_drvdata(dev);
mutex_path = mutex_path_override ?
mutex_path_override : state->board_info->mutex_path;
if (!mutex_path || !strlen(mutex_path)) {
dev_err(dev, "Hardware access guard mutex name is empty");
return -EINVAL;
}
if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) {
state->lock_data.mutex.glk = 0;
state->lock_data.lock = lock_via_global_acpi_lock;
state->lock_data.unlock = unlock_global_acpi_lock;
} else {
status = acpi_get_handle(NULL, (acpi_string)mutex_path,
&state->lock_data.mutex.aml);
if (ACPI_FAILURE(status)) {
dev_err(dev,
"Failed to get hardware access guard AML mutex '%s': error %d",
mutex_path, status);
return -ENOENT;
}
state->lock_data.lock = lock_via_acpi_mutex;
state->lock_data.unlock = unlock_acpi_mutex;
}
return 0;
}
static int asus_ec_bank_switch(u8 bank, u8 *old)
{
int status = 0;
if (old) {
status = ec_read(ASUS_EC_BANK_REGISTER, old);
}
if (status || (old && (*old == bank)))
return status;
return ec_write(ASUS_EC_BANK_REGISTER, bank);
}
static int asus_ec_block_read(const struct device *dev,
struct ec_sensors_data *ec)
{
int ireg, ibank, status;
u8 bank, reg_bank, prev_bank;
bank = 0;
status = asus_ec_bank_switch(bank, &prev_bank);
if (status) {
dev_warn(dev, "EC bank switch failed");
return status;
}
if (prev_bank) {
/* oops... somebody else is working with the EC too */
dev_warn(dev,
"Concurrent access to the ACPI EC detected.\nRace condition possible.");
}
/* read registers minimizing bank switches. */
for (ibank = 0; ibank < ec->nr_banks; ibank++) {
if (bank != ec->banks[ibank]) {
bank = ec->banks[ibank];
if (asus_ec_bank_switch(bank, NULL)) {
dev_warn(dev, "EC bank switch to %d failed",
bank);
break;
}
}
for (ireg = 0; ireg < ec->nr_registers; ireg++) {
reg_bank = register_bank(ec->registers[ireg]);
if (reg_bank < bank) {
continue;
}
ec_read(register_index(ec->registers[ireg]),
ec->read_buffer + ireg);
}
}
status = asus_ec_bank_switch(prev_bank, NULL);
return status;
}
static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data)
{
if (is_sensor_data_signed(si)) {
switch (si->addr.components.size) {
case 1:
return (s8)*data;
case 2:
return (s16)get_unaligned_be16(data);
case 4:
return (s32)get_unaligned_be32(data);
default:
return 0;
}
} else {
switch (si->addr.components.size) {
case 1:
return *data;
case 2:
return get_unaligned_be16(data);
case 4:
return get_unaligned_be32(data);
default:
return 0;
}
}
}
static void update_sensor_values(struct ec_sensors_data *ec, u8 *data)
{
const struct ec_sensor_info *si;
struct ec_sensor *s, *sensor_end;
sensor_end = ec->sensors + ec->nr_sensors;
for (s = ec->sensors; s != sensor_end; s++) {
si = ec->sensors_info + s->info_index;
s->cached_value = get_sensor_value(si, data);
data += si->addr.components.size;
}
}
static int update_ec_sensors(const struct device *dev,
struct ec_sensors_data *ec)
{
int status;
if (!ec->lock_data.lock(&ec->lock_data)) {
dev_warn(dev, "Failed to acquire mutex");
return -EBUSY;
}
status = asus_ec_block_read(dev, ec);
if (!status) {
update_sensor_values(ec, ec->read_buffer);
}
if (!ec->lock_data.unlock(&ec->lock_data))
dev_err(dev, "Failed to release mutex");
return status;
}
static long scale_sensor_value(s32 value, int data_type)
{
switch (data_type) {
case hwmon_curr:
case hwmon_temp:
return value * MILLI;
default:
return value;
}
}
static int get_cached_value_or_update(const struct device *dev,
int sensor_index,
struct ec_sensors_data *state, s32 *value)
{
if (time_after(jiffies, state->last_updated + HZ)) {
if (update_ec_sensors(dev, state)) {
dev_err(dev, "update_ec_sensors() failure\n");
return -EIO;
}
state->last_updated = jiffies;
}
*value = state->sensors[sensor_index].cached_value;
return 0;
}
/*
* Now follow the functions that implement the hwmon interface
*/
static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
int ret;
s32 value = 0;
struct ec_sensors_data *state = dev_get_drvdata(dev);
int sidx = find_ec_sensor_index(state, type, channel);
if (sidx < 0) {
return sidx;
}
ret = get_cached_value_or_update(dev, sidx, state, &value);
if (!ret) {
*val = scale_sensor_value(value,
get_sensor_info(state, sidx)->type);
}
return ret;
}
static int asus_ec_hwmon_read_string(struct device *dev,
enum hwmon_sensor_types type, u32 attr,
int channel, const char **str)
{
struct ec_sensors_data *state = dev_get_drvdata(dev);
int sensor_index = find_ec_sensor_index(state, type, channel);
*str = get_sensor_info(state, sensor_index)->label;
return 0;
}
static umode_t asus_ec_hwmon_is_visible(const void *drvdata,
enum hwmon_sensor_types type, u32 attr,
int channel)
{
const struct ec_sensors_data *state = drvdata;
return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0;
}
static int
asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan,
struct device *dev, int num,
enum hwmon_sensor_types type, u32 config)
{
int i;
u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
if (!cfg)
return -ENOMEM;
asus_ec_hwmon_chan->type = type;
asus_ec_hwmon_chan->config = cfg;
for (i = 0; i < num; i++, cfg++)
*cfg = config;
return 0;
}
static const struct hwmon_ops asus_ec_hwmon_ops = {
.is_visible = asus_ec_hwmon_is_visible,
.read = asus_ec_hwmon_read,
.read_string = asus_ec_hwmon_read_string,
};
static struct hwmon_chip_info asus_ec_chip_info = {
.ops = &asus_ec_hwmon_ops,
};
static const struct ec_board_info *get_board_info(void)
{
const struct dmi_system_id *dmi_entry;
dmi_entry = dmi_first_match(dmi_table);
return dmi_entry ? dmi_entry->driver_data : NULL;
}
static int asus_ec_probe(struct platform_device *pdev)
{
const struct hwmon_channel_info **ptr_asus_ec_ci;
int nr_count[hwmon_max] = { 0 }, nr_types = 0;
struct hwmon_channel_info *asus_ec_hwmon_chan;
const struct ec_board_info *pboard_info;
const struct hwmon_chip_info *chip_info;
struct device *dev = &pdev->dev;
struct ec_sensors_data *ec_data;
const struct ec_sensor_info *si;
enum hwmon_sensor_types type;
struct device *hwdev;
unsigned int i;
int status;
pboard_info = get_board_info();
if (!pboard_info)
return -ENODEV;
ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data),
GFP_KERNEL);
if (!ec_data)
return -ENOMEM;
dev_set_drvdata(dev, ec_data);
ec_data->board_info = pboard_info;
switch (ec_data->board_info->family) {
case family_amd_400_series:
ec_data->sensors_info = sensors_family_amd_400;
break;
case family_amd_500_series:
ec_data->sensors_info = sensors_family_amd_500;
break;
case family_amd_600_series:
ec_data->sensors_info = sensors_family_amd_600;
break;
case family_intel_300_series:
ec_data->sensors_info = sensors_family_intel_300;
break;
case family_intel_600_series:
ec_data->sensors_info = sensors_family_intel_600;
break;
default:
dev_err(dev, "Unknown board family: %d",
ec_data->board_info->family);
return -EINVAL;
}
ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors);
ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors,
sizeof(struct ec_sensor), GFP_KERNEL);
if (!ec_data->sensors)
return -ENOMEM;
status = setup_lock_data(dev);
if (status) {
dev_err(dev, "Failed to setup state/EC locking: %d", status);
return status;
}
setup_sensor_data(ec_data);
ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers,
sizeof(u16), GFP_KERNEL);
ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers,
sizeof(u8), GFP_KERNEL);
if (!ec_data->registers || !ec_data->read_buffer)
return -ENOMEM;
fill_ec_registers(ec_data);
for (i = 0; i < ec_data->nr_sensors; ++i) {
si = get_sensor_info(ec_data, i);
if (!nr_count[si->type])
++nr_types;
++nr_count[si->type];
}
if (nr_count[hwmon_temp])
nr_count[hwmon_chip]++, nr_types++;
asus_ec_hwmon_chan = devm_kcalloc(
dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL);
if (!asus_ec_hwmon_chan)
return -ENOMEM;
ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1,
sizeof(*ptr_asus_ec_ci), GFP_KERNEL);
if (!ptr_asus_ec_ci)
return -ENOMEM;
asus_ec_chip_info.info = ptr_asus_ec_ci;
chip_info = &asus_ec_chip_info;
for (type = 0; type < hwmon_max; ++type) {
if (!nr_count[type])
continue;
asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev,
nr_count[type], type,
hwmon_attributes[type]);
*ptr_asus_ec_ci++ = asus_ec_hwmon_chan++;
}
dev_info(dev, "board has %d EC sensors that span %d registers",
ec_data->nr_sensors, ec_data->nr_registers);
hwdev = devm_hwmon_device_register_with_info(dev, "asusec",
ec_data, chip_info, NULL);
return PTR_ERR_OR_ZERO(hwdev);
}
MODULE_DEVICE_TABLE(dmi, dmi_table);
static struct platform_driver asus_ec_sensors_platform_driver = {
.driver = {
.name = "asus-ec-sensors",
},
.probe = asus_ec_probe,
};
static struct platform_device *asus_ec_sensors_platform_device;
static int __init asus_ec_init(void)
{
asus_ec_sensors_platform_device =
platform_create_bundle(&asus_ec_sensors_platform_driver,
asus_ec_probe, NULL, 0, NULL, 0);
if (IS_ERR(asus_ec_sensors_platform_device))
return PTR_ERR(asus_ec_sensors_platform_device);
return 0;
}
static void __exit asus_ec_exit(void)
{
platform_device_unregister(asus_ec_sensors_platform_device);
platform_driver_unregister(&asus_ec_sensors_platform_driver);
}
module_init(asus_ec_init);
module_exit(asus_ec_exit);
module_param_named(mutex_path, mutex_path_override, charp, 0);
MODULE_PARM_DESC(mutex_path,
"Override ACPI mutex path used to guard access to hardware");
MODULE_AUTHOR("Eugene Shalygin <[email protected]>");
MODULE_DESCRIPTION(
"HWMON driver for sensors accessible via ACPI EC in ASUS motherboards");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/asus-ec-sensors.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* drivers/hwmon/wm8350-hwmon.c - Wolfson Microelectronics WM8350 PMIC
* hardware monitoring features.
*
* Copyright (C) 2009 Wolfson Microelectronics plc
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/comparator.h>
static const char * const input_names[] = {
[WM8350_AUXADC_USB] = "USB",
[WM8350_AUXADC_LINE] = "Line",
[WM8350_AUXADC_BATT] = "Battery",
};
static ssize_t show_voltage(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct wm8350 *wm8350 = dev_get_drvdata(dev);
int channel = to_sensor_dev_attr(attr)->index;
int val;
val = wm8350_read_auxadc(wm8350, channel, 0, 0) * WM8350_AUX_COEFF;
val = DIV_ROUND_CLOSEST(val, 1000);
return sprintf(buf, "%d\n", val);
}
static ssize_t show_label(struct device *dev,
struct device_attribute *attr, char *buf)
{
int channel = to_sensor_dev_attr(attr)->index;
return sprintf(buf, "%s\n", input_names[channel]);
}
#define WM8350_NAMED_VOLTAGE(id, name) \
static SENSOR_DEVICE_ATTR(in##id##_input, S_IRUGO, show_voltage,\
NULL, name); \
static SENSOR_DEVICE_ATTR(in##id##_label, S_IRUGO, show_label, \
NULL, name)
WM8350_NAMED_VOLTAGE(0, WM8350_AUXADC_USB);
WM8350_NAMED_VOLTAGE(1, WM8350_AUXADC_BATT);
WM8350_NAMED_VOLTAGE(2, WM8350_AUXADC_LINE);
static struct attribute *wm8350_attrs[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_label.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_label.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_label.dev_attr.attr,
NULL,
};
ATTRIBUTE_GROUPS(wm8350);
static int wm8350_hwmon_probe(struct platform_device *pdev)
{
struct wm8350 *wm8350 = platform_get_drvdata(pdev);
struct device *hwmon_dev;
hwmon_dev = devm_hwmon_device_register_with_groups(&pdev->dev, "wm8350",
wm8350,
wm8350_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct platform_driver wm8350_hwmon_driver = {
.probe = wm8350_hwmon_probe,
.driver = {
.name = "wm8350-hwmon",
},
};
module_platform_driver(wm8350_hwmon_driver);
MODULE_AUTHOR("Mark Brown <[email protected]>");
MODULE_DESCRIPTION("WM8350 Hardware Monitoring");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:wm8350-hwmon");
|
linux-master
|
drivers/hwmon/wm8350-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/* Driver for the Texas Instruments TMP464 SMBus temperature sensor IC.
* Supported models: TMP464, TMP468
* Copyright (C) 2022 Agathe Porte <[email protected]>
* Preliminary support by:
* Lionel Pouliquen <[email protected]>
*/
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/slab.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, I2C_CLIENT_END };
#define TMP464_NUM_CHANNELS 5 /* chan 0 is internal, 1-4 are remote */
#define TMP468_NUM_CHANNELS 9 /* chan 0 is internal, 1-8 are remote */
#define MAX_CHANNELS 9
#define TMP464_TEMP_REG(channel) (channel)
#define TMP464_TEMP_OFFSET_REG(channel) (0x40 + ((channel) - 1) * 8)
#define TMP464_N_FACTOR_REG(channel) (0x41 + ((channel) - 1) * 8)
static const u8 TMP464_THERM_LIMIT[MAX_CHANNELS] = {
0x39, 0x42, 0x4A, 0x52, 0x5A, 0x62, 0x6a, 0x72, 0x7a };
static const u8 TMP464_THERM2_LIMIT[MAX_CHANNELS] = {
0x3A, 0x43, 0x4B, 0x53, 0x5B, 0x63, 0x6b, 0x73, 0x7b };
#define TMP464_THERM_STATUS_REG 0x21
#define TMP464_THERM2_STATUS_REG 0x22
#define TMP464_REMOTE_OPEN_REG 0x23
#define TMP464_CONFIG_REG 0x30
#define TMP464_TEMP_HYST_REG 0x38
#define TMP464_LOCK_REG 0xc4
/* Identification */
#define TMP464_MANUFACTURER_ID_REG 0xFE
#define TMP464_DEVICE_ID_REG 0xFF
/* Flags */
#define TMP464_CONFIG_SHUTDOWN BIT(5)
#define TMP464_CONFIG_RANGE 0x04
#define TMP464_CONFIG_REG_REN(x) (BIT(7 + (x)))
#define TMP464_CONFIG_REG_REN_MASK GENMASK(15, 7)
#define TMP464_CONFIG_CONVERSION_RATE_B0 2
#define TMP464_CONFIG_CONVERSION_RATE_B2 4
#define TMP464_CONFIG_CONVERSION_RATE_MASK GENMASK(TMP464_CONFIG_CONVERSION_RATE_B2, \
TMP464_CONFIG_CONVERSION_RATE_B0)
#define TMP464_UNLOCK_VAL 0xeb19
#define TMP464_LOCK_VAL 0x5ca6
#define TMP464_LOCKED 0x8000
/* Manufacturer / Device ID's */
#define TMP464_MANUFACTURER_ID 0x5449
#define TMP464_DEVICE_ID 0x1468
#define TMP468_DEVICE_ID 0x0468
static const struct i2c_device_id tmp464_id[] = {
{ "tmp464", TMP464_NUM_CHANNELS },
{ "tmp468", TMP468_NUM_CHANNELS },
{ }
};
MODULE_DEVICE_TABLE(i2c, tmp464_id);
static const struct of_device_id __maybe_unused tmp464_of_match[] = {
{
.compatible = "ti,tmp464",
.data = (void *)TMP464_NUM_CHANNELS
},
{
.compatible = "ti,tmp468",
.data = (void *)TMP468_NUM_CHANNELS
},
{},
};
MODULE_DEVICE_TABLE(of, tmp464_of_match);
struct tmp464_channel {
const char *label;
bool enabled;
};
struct tmp464_data {
struct regmap *regmap;
struct mutex update_lock;
int channels;
s16 config_orig;
u16 open_reg;
unsigned long last_updated;
bool valid;
int update_interval;
struct tmp464_channel channel[MAX_CHANNELS];
};
static int temp_from_reg(s16 reg)
{
return DIV_ROUND_CLOSEST((reg >> 3) * 625, 10);
}
static s16 temp_to_limit_reg(long temp)
{
return DIV_ROUND_CLOSEST(temp, 500) << 6;
}
static s16 temp_to_offset_reg(long temp)
{
return DIV_ROUND_CLOSEST(temp * 10, 625) << 3;
}
static int tmp464_enable_channels(struct tmp464_data *data)
{
struct regmap *regmap = data->regmap;
u16 enable = 0;
int i;
for (i = 0; i < data->channels; i++)
if (data->channel[i].enabled)
enable |= TMP464_CONFIG_REG_REN(i);
return regmap_update_bits(regmap, TMP464_CONFIG_REG, TMP464_CONFIG_REG_REN_MASK, enable);
}
static int tmp464_chip_read(struct device *dev, u32 attr, int channel, long *val)
{
struct tmp464_data *data = dev_get_drvdata(dev);
switch (attr) {
case hwmon_chip_update_interval:
*val = data->update_interval;
return 0;
default:
return -EOPNOTSUPP;
}
}
static int tmp464_temp_read(struct device *dev, u32 attr, int channel, long *val)
{
struct tmp464_data *data = dev_get_drvdata(dev);
struct regmap *regmap = data->regmap;
unsigned int regval, regval2;
int err = 0;
mutex_lock(&data->update_lock);
switch (attr) {
case hwmon_temp_max_alarm:
err = regmap_read(regmap, TMP464_THERM_STATUS_REG, ®val);
if (err < 0)
break;
*val = !!(regval & BIT(channel + 7));
break;
case hwmon_temp_crit_alarm:
err = regmap_read(regmap, TMP464_THERM2_STATUS_REG, ®val);
if (err < 0)
break;
*val = !!(regval & BIT(channel + 7));
break;
case hwmon_temp_fault:
/*
* The chip clears TMP464_REMOTE_OPEN_REG after it is read
* and only updates it after the next measurement cycle is
* complete. That means we have to cache the value internally
* for one measurement cycle and report the cached value.
*/
if (!data->valid || time_after(jiffies, data->last_updated +
msecs_to_jiffies(data->update_interval))) {
err = regmap_read(regmap, TMP464_REMOTE_OPEN_REG, ®val);
if (err < 0)
break;
data->open_reg = regval;
data->last_updated = jiffies;
data->valid = true;
}
*val = !!(data->open_reg & BIT(channel + 7));
break;
case hwmon_temp_max_hyst:
err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], ®val);
if (err < 0)
break;
err = regmap_read(regmap, TMP464_TEMP_HYST_REG, ®val2);
if (err < 0)
break;
regval -= regval2;
*val = temp_from_reg(regval);
break;
case hwmon_temp_max:
err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], ®val);
if (err < 0)
break;
*val = temp_from_reg(regval);
break;
case hwmon_temp_crit_hyst:
err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], ®val);
if (err < 0)
break;
err = regmap_read(regmap, TMP464_TEMP_HYST_REG, ®val2);
if (err < 0)
break;
regval -= regval2;
*val = temp_from_reg(regval);
break;
case hwmon_temp_crit:
err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], ®val);
if (err < 0)
break;
*val = temp_from_reg(regval);
break;
case hwmon_temp_offset:
err = regmap_read(regmap, TMP464_TEMP_OFFSET_REG(channel), ®val);
if (err < 0)
break;
*val = temp_from_reg(regval);
break;
case hwmon_temp_input:
if (!data->channel[channel].enabled) {
err = -ENODATA;
break;
}
err = regmap_read(regmap, TMP464_TEMP_REG(channel), ®val);
if (err < 0)
break;
*val = temp_from_reg(regval);
break;
case hwmon_temp_enable:
*val = data->channel[channel].enabled;
break;
default:
err = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return err;
}
static int tmp464_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_chip:
return tmp464_chip_read(dev, attr, channel, val);
case hwmon_temp:
return tmp464_temp_read(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int tmp464_read_string(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
struct tmp464_data *data = dev_get_drvdata(dev);
*str = data->channel[channel].label;
return 0;
}
static int tmp464_set_convrate(struct tmp464_data *data, long interval)
{
int rate;
/*
* For valid rates, interval in milli-seconds can be calculated as
* interval = 125 << (7 - rate);
* or
* interval = (1 << (7 - rate)) * 125;
* The rate is therefore
* rate = 7 - __fls(interval / 125);
* and the rounded rate is
* rate = 7 - __fls(interval * 4 / (125 * 3));
* Use clamp_val() to avoid overflows, and to ensure valid input
* for __fls.
*/
interval = clamp_val(interval, 125, 16000);
rate = 7 - __fls(interval * 4 / (125 * 3));
data->update_interval = 125 << (7 - rate);
return regmap_update_bits(data->regmap, TMP464_CONFIG_REG,
TMP464_CONFIG_CONVERSION_RATE_MASK,
rate << TMP464_CONFIG_CONVERSION_RATE_B0);
}
static int tmp464_chip_write(struct tmp464_data *data, u32 attr, int channel, long val)
{
switch (attr) {
case hwmon_chip_update_interval:
return tmp464_set_convrate(data, val);
default:
return -EOPNOTSUPP;
}
}
static int tmp464_temp_write(struct tmp464_data *data, u32 attr, int channel, long val)
{
struct regmap *regmap = data->regmap;
unsigned int regval;
int err = 0;
switch (attr) {
case hwmon_temp_max_hyst:
err = regmap_read(regmap, TMP464_THERM_LIMIT[0], ®val);
if (err < 0)
break;
val = clamp_val(val, -256000, 256000); /* prevent overflow/underflow */
val = clamp_val(temp_from_reg(regval) - val, 0, 255000);
err = regmap_write(regmap, TMP464_TEMP_HYST_REG,
DIV_ROUND_CLOSEST(val, 1000) << 7);
break;
case hwmon_temp_max:
val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
err = regmap_write(regmap, TMP464_THERM_LIMIT[channel], val);
break;
case hwmon_temp_crit:
val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
err = regmap_write(regmap, TMP464_THERM2_LIMIT[channel], val);
break;
case hwmon_temp_offset:
val = temp_to_offset_reg(clamp_val(val, -128000, 127937));
err = regmap_write(regmap, TMP464_TEMP_OFFSET_REG(channel), val);
break;
case hwmon_temp_enable:
data->channel[channel].enabled = !!val;
err = tmp464_enable_channels(data);
break;
default:
err = -EOPNOTSUPP;
break;
}
return err;
}
static int tmp464_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct tmp464_data *data = dev_get_drvdata(dev);
int err;
mutex_lock(&data->update_lock);
switch (type) {
case hwmon_chip:
err = tmp464_chip_write(data, attr, channel, val);
break;
case hwmon_temp:
err = tmp464_temp_write(data, attr, channel, val);
break;
default:
err = -EOPNOTSUPP;
break;
}
mutex_unlock(&data->update_lock);
return err;
}
static umode_t tmp464_is_visible(const void *_data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct tmp464_data *data = _data;
if (channel >= data->channels)
return 0;
if (type == hwmon_chip) {
if (attr == hwmon_chip_update_interval)
return 0644;
return 0;
}
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_max_alarm:
case hwmon_temp_crit_alarm:
case hwmon_temp_crit_hyst:
return 0444;
case hwmon_temp_enable:
case hwmon_temp_max:
case hwmon_temp_crit:
return 0644;
case hwmon_temp_max_hyst:
if (!channel)
return 0644;
return 0444;
case hwmon_temp_label:
if (data->channel[channel].label)
return 0444;
return 0;
case hwmon_temp_fault:
if (channel)
return 0444;
return 0;
case hwmon_temp_offset:
if (channel)
return 0644;
return 0;
default:
return 0;
}
}
static void tmp464_restore_lock(void *regmap)
{
regmap_write(regmap, TMP464_LOCK_REG, TMP464_LOCK_VAL);
}
static void tmp464_restore_config(void *_data)
{
struct tmp464_data *data = _data;
regmap_write(data->regmap, TMP464_CONFIG_REG, data->config_orig);
}
static int tmp464_init_client(struct device *dev, struct tmp464_data *data)
{
struct regmap *regmap = data->regmap;
unsigned int regval;
int err;
err = regmap_read(regmap, TMP464_LOCK_REG, ®val);
if (err)
return err;
if (regval == TMP464_LOCKED) {
/* Explicitly unlock chip if it is locked */
err = regmap_write(regmap, TMP464_LOCK_REG, TMP464_UNLOCK_VAL);
if (err)
return err;
/* and lock it again when unloading the driver */
err = devm_add_action_or_reset(dev, tmp464_restore_lock, regmap);
if (err)
return err;
}
err = regmap_read(regmap, TMP464_CONFIG_REG, ®val);
if (err)
return err;
data->config_orig = regval;
err = devm_add_action_or_reset(dev, tmp464_restore_config, data);
if (err)
return err;
/* Default to 500 ms update interval */
err = regmap_update_bits(regmap, TMP464_CONFIG_REG,
TMP464_CONFIG_CONVERSION_RATE_MASK | TMP464_CONFIG_SHUTDOWN,
BIT(TMP464_CONFIG_CONVERSION_RATE_B0) |
BIT(TMP464_CONFIG_CONVERSION_RATE_B2));
if (err)
return err;
data->update_interval = 500;
return tmp464_enable_channels(data);
}
static int tmp464_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
char *name, *chip;
int reg;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
reg = i2c_smbus_read_word_swapped(client, TMP464_MANUFACTURER_ID_REG);
if (reg < 0)
return reg;
if (reg != TMP464_MANUFACTURER_ID)
return -ENODEV;
/* Check for "always return zero" bits */
reg = i2c_smbus_read_word_swapped(client, TMP464_THERM_STATUS_REG);
if (reg < 0)
return reg;
if (reg & 0x1f)
return -ENODEV;
reg = i2c_smbus_read_word_swapped(client, TMP464_THERM2_STATUS_REG);
if (reg < 0)
return reg;
if (reg & 0x1f)
return -ENODEV;
reg = i2c_smbus_read_word_swapped(client, TMP464_DEVICE_ID_REG);
if (reg < 0)
return reg;
switch (reg) {
case TMP464_DEVICE_ID:
name = "tmp464";
chip = "TMP464";
break;
case TMP468_DEVICE_ID:
name = "tmp468";
chip = "TMP468";
break;
default:
return -ENODEV;
}
strscpy(info->type, name, I2C_NAME_SIZE);
dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n", chip, client->addr);
return 0;
}
static int tmp464_probe_child_from_dt(struct device *dev,
struct device_node *child,
struct tmp464_data *data)
{
struct regmap *regmap = data->regmap;
u32 channel;
s32 nfactor;
int err;
err = of_property_read_u32(child, "reg", &channel);
if (err) {
dev_err(dev, "missing reg property of %pOFn\n", child);
return err;
}
if (channel >= data->channels) {
dev_err(dev, "invalid reg %d of %pOFn\n", channel, child);
return -EINVAL;
}
of_property_read_string(child, "label", &data->channel[channel].label);
data->channel[channel].enabled = of_device_is_available(child);
err = of_property_read_s32(child, "ti,n-factor", &nfactor);
if (err && err != -EINVAL)
return err;
if (!err) {
if (channel == 0) {
dev_err(dev, "n-factor can't be set for internal channel\n");
return -EINVAL;
}
if (nfactor > 127 || nfactor < -128) {
dev_err(dev, "n-factor for channel %d invalid (%d)\n",
channel, nfactor);
return -EINVAL;
}
err = regmap_write(regmap, TMP464_N_FACTOR_REG(channel),
(nfactor << 8) & 0xff00);
if (err)
return err;
}
return 0;
}
static int tmp464_probe_from_dt(struct device *dev, struct tmp464_data *data)
{
const struct device_node *np = dev->of_node;
struct device_node *child;
int err;
for_each_child_of_node(np, child) {
if (strcmp(child->name, "channel"))
continue;
err = tmp464_probe_child_from_dt(dev, child, data);
if (err) {
of_node_put(child);
return err;
}
}
return 0;
}
static const struct hwmon_ops tmp464_ops = {
.is_visible = tmp464_is_visible,
.read = tmp464_read,
.read_string = tmp464_read_string,
.write = tmp464_write,
};
static const struct hwmon_channel_info * const tmp464_info[] = {
HWMON_CHANNEL_INFO(chip,
HWMON_C_UPDATE_INTERVAL),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE),
NULL
};
static const struct hwmon_chip_info tmp464_chip_info = {
.ops = &tmp464_ops,
.info = tmp464_info,
};
/* regmap */
static bool tmp464_is_volatile_reg(struct device *dev, unsigned int reg)
{
return (reg < TMP464_TEMP_REG(TMP468_NUM_CHANNELS) ||
reg == TMP464_THERM_STATUS_REG ||
reg == TMP464_THERM2_STATUS_REG ||
reg == TMP464_REMOTE_OPEN_REG);
}
static const struct regmap_config tmp464_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.max_register = TMP464_DEVICE_ID_REG,
.volatile_reg = tmp464_is_volatile_reg,
.val_format_endian = REGMAP_ENDIAN_BIG,
.cache_type = REGCACHE_MAPLE,
.use_single_read = true,
.use_single_write = true,
};
static int tmp464_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct tmp464_data *data;
int i, err;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
dev_err(&client->dev, "i2c functionality check failed\n");
return -ENODEV;
}
data = devm_kzalloc(dev, sizeof(struct tmp464_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
mutex_init(&data->update_lock);
if (dev->of_node)
data->channels = (int)(unsigned long)of_device_get_match_data(&client->dev);
else
data->channels = i2c_match_id(tmp464_id, client)->driver_data;
data->regmap = devm_regmap_init_i2c(client, &tmp464_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
for (i = 0; i < data->channels; i++)
data->channel[i].enabled = true;
err = tmp464_init_client(dev, data);
if (err)
return err;
if (dev->of_node) {
err = tmp464_probe_from_dt(dev, data);
if (err)
return err;
}
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data, &tmp464_chip_info, NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct i2c_driver tmp464_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "tmp464",
.of_match_table = of_match_ptr(tmp464_of_match),
},
.probe = tmp464_probe,
.id_table = tmp464_id,
.detect = tmp464_detect,
.address_list = normal_i2c,
};
module_i2c_driver(tmp464_driver);
MODULE_AUTHOR("Agathe Porte <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments TMP464 temperature sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/tmp464.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* i5500_temp - Driver for Intel 5500/5520/X58 chipset thermal sensor
*
* Copyright (C) 2012, 2014 Jean Delvare <[email protected]>
*/
#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/device.h>
#include <linux/pci.h>
#include <linux/hwmon.h>
#include <linux/err.h>
#include <linux/mutex.h>
/* Register definitions from datasheet */
#define REG_TSTHRCATA 0xE2
#define REG_TSCTRL 0xE8
#define REG_TSTHRRPEX 0xEB
#define REG_TSTHRLO 0xEC
#define REG_TSTHRHI 0xEE
#define REG_CTHINT 0xF0
#define REG_TSFSC 0xF3
#define REG_CTSTS 0xF4
#define REG_TSTHRRQPI 0xF5
#define REG_CTCTRL 0xF7
#define REG_TSTIMER 0xF8
static umode_t i5500_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
int channel)
{
return 0444;
}
static int i5500_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
long *val)
{
struct pci_dev *pdev = to_pci_dev(dev->parent);
u16 tsthr;
s8 tsfsc;
u8 ctsts;
switch (type) {
case hwmon_temp:
switch (attr) {
/* Sensor resolution : 0.5 degree C */
case hwmon_temp_input:
pci_read_config_word(pdev, REG_TSTHRHI, &tsthr);
pci_read_config_byte(pdev, REG_TSFSC, &tsfsc);
*val = (tsthr - tsfsc) * 500;
return 0;
case hwmon_temp_max:
pci_read_config_word(pdev, REG_TSTHRHI, &tsthr);
*val = tsthr * 500;
return 0;
case hwmon_temp_max_hyst:
pci_read_config_word(pdev, REG_TSTHRLO, &tsthr);
*val = tsthr * 500;
return 0;
case hwmon_temp_crit:
pci_read_config_word(pdev, REG_TSTHRCATA, &tsthr);
*val = tsthr * 500;
return 0;
case hwmon_temp_max_alarm:
pci_read_config_byte(pdev, REG_CTSTS, &ctsts);
*val = !!(ctsts & BIT(1));
return 0;
case hwmon_temp_crit_alarm:
pci_read_config_byte(pdev, REG_CTSTS, &ctsts);
*val = !!(ctsts & BIT(0));
return 0;
default:
break;
}
break;
default:
break;
}
return -EOPNOTSUPP;
}
static const struct hwmon_ops i5500_ops = {
.is_visible = i5500_is_visible,
.read = i5500_read,
};
static const struct hwmon_channel_info * const i5500_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM
),
NULL
};
static const struct hwmon_chip_info i5500_chip_info = {
.ops = &i5500_ops,
.info = i5500_info,
};
static const struct pci_device_id i5500_temp_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x3438) },
{ 0 },
};
MODULE_DEVICE_TABLE(pci, i5500_temp_ids);
static int i5500_temp_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
int err;
struct device *hwmon_dev;
u32 tstimer;
s8 tsfsc;
err = pcim_enable_device(pdev);
if (err) {
dev_err(&pdev->dev, "Failed to enable device\n");
return err;
}
pci_read_config_byte(pdev, REG_TSFSC, &tsfsc);
pci_read_config_dword(pdev, REG_TSTIMER, &tstimer);
if (tsfsc == 0x7F && tstimer == 0x07D30D40) {
dev_notice(&pdev->dev, "Sensor seems to be disabled\n");
return -ENODEV;
}
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, "intel5500", NULL,
&i5500_chip_info, NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static struct pci_driver i5500_temp_driver = {
.name = "i5500_temp",
.id_table = i5500_temp_ids,
.probe = i5500_temp_probe,
};
module_pci_driver(i5500_temp_driver);
MODULE_AUTHOR("Jean Delvare <[email protected]>");
MODULE_DESCRIPTION("Intel 5500/5520/X58 chipset thermal sensor driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/i5500_temp.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* adm9240.c Part of lm_sensors, Linux kernel modules for hardware
* monitoring
*
* Copyright (C) 1999 Frodo Looijaard <[email protected]>
* Philip Edelbrock <[email protected]>
* Copyright (C) 2003 Michiel Rook <[email protected]>
* Copyright (C) 2005 Grant Coady <[email protected]> with valuable
* guidance from Jean Delvare
*
* Driver supports Analog Devices ADM9240
* Dallas Semiconductor DS1780
* National Semiconductor LM81
*
* ADM9240 is the reference, DS1780 and LM81 are register compatibles
*
* Voltage Six inputs are scaled by chip, VID also reported
* Temperature Chip temperature to 0.5'C, maximum and max_hysteris
* Fans 2 fans, low speed alarm, automatic fan clock divider
* Alarms 16-bit map of active alarms
* Analog Out 0..1250 mV output
*
* Chassis Intrusion: clear CI latch with 'echo 0 > intrusion0_alarm'
*
* Test hardware: Intel SE440BX-2 desktop motherboard --Grant
*
* LM81 extended temp reading not implemented
*/
#include <linux/bits.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
I2C_CLIENT_END };
enum chips { adm9240, ds1780, lm81 };
/* ADM9240 registers */
#define ADM9240_REG_MAN_ID 0x3e
#define ADM9240_REG_DIE_REV 0x3f
#define ADM9240_REG_CONFIG 0x40
#define ADM9240_REG_IN(nr) (0x20 + (nr)) /* 0..5 */
#define ADM9240_REG_IN_MAX(nr) (0x2b + (nr) * 2)
#define ADM9240_REG_IN_MIN(nr) (0x2c + (nr) * 2)
#define ADM9240_REG_FAN(nr) (0x28 + (nr)) /* 0..1 */
#define ADM9240_REG_FAN_MIN(nr) (0x3b + (nr))
#define ADM9240_REG_INT(nr) (0x41 + (nr))
#define ADM9240_REG_INT_MASK(nr) (0x43 + (nr))
#define ADM9240_REG_TEMP 0x27
#define ADM9240_REG_TEMP_MAX(nr) (0x39 + (nr)) /* 0, 1 = high, hyst */
#define ADM9240_REG_ANALOG_OUT 0x19
#define ADM9240_REG_CHASSIS_CLEAR 0x46
#define ADM9240_REG_VID_FAN_DIV 0x47
#define ADM9240_REG_I2C_ADDR 0x48
#define ADM9240_REG_VID4 0x49
#define ADM9240_REG_TEMP_CONF 0x4b
/* generalised scaling with integer rounding */
static inline int SCALE(long val, int mul, int div)
{
if (val < 0)
return (val * mul - div / 2) / div;
else
return (val * mul + div / 2) / div;
}
/* adm9240 internally scales voltage measurements */
static const u16 nom_mv[] = { 2500, 2700, 3300, 5000, 12000, 2700 };
static inline unsigned int IN_FROM_REG(u8 reg, int n)
{
return SCALE(reg, nom_mv[n], 192);
}
static inline u8 IN_TO_REG(unsigned long val, int n)
{
val = clamp_val(val, 0, nom_mv[n] * 255 / 192);
return SCALE(val, 192, nom_mv[n]);
}
/* temperature range: -40..125, 127 disables temperature alarm */
static inline s8 TEMP_TO_REG(long val)
{
val = clamp_val(val, -40000, 127000);
return SCALE(val, 1, 1000);
}
/* two fans, each with low fan speed limit */
static inline unsigned int FAN_FROM_REG(u8 reg, u8 div)
{
if (!reg) /* error */
return -1;
if (reg == 255)
return 0;
return SCALE(1350000, 1, reg * div);
}
/* analog out 0..1250mV */
static inline u8 AOUT_TO_REG(unsigned long val)
{
val = clamp_val(val, 0, 1250);
return SCALE(val, 255, 1250);
}
static inline unsigned int AOUT_FROM_REG(u8 reg)
{
return SCALE(reg, 1250, 255);
}
/* per client data */
struct adm9240_data {
struct device *dev;
struct regmap *regmap;
struct mutex update_lock;
u8 fan_div[2]; /* rw fan1_div, read-only accessor */
u8 vrm; /* -- vrm set on startup, no accessor */
};
/* write new fan div, callers must hold data->update_lock */
static int adm9240_write_fan_div(struct adm9240_data *data, int channel, u8 fan_div)
{
unsigned int reg, old, shift = (channel + 2) * 2;
int err;
err = regmap_read(data->regmap, ADM9240_REG_VID_FAN_DIV, ®);
if (err < 0)
return err;
old = (reg >> shift) & 3;
reg &= ~(3 << shift);
reg |= (fan_div << shift);
err = regmap_write(data->regmap, ADM9240_REG_VID_FAN_DIV, reg);
if (err < 0)
return err;
dev_dbg(data->dev,
"fan%d clock divider changed from %lu to %lu\n",
channel + 1, BIT(old), BIT(fan_div));
return 0;
}
/*
* set fan speed low limit:
*
* - value is zero: disable fan speed low limit alarm
*
* - value is below fan speed measurement range: enable fan speed low
* limit alarm to be asserted while fan speed too slow to measure
*
* - otherwise: select fan clock divider to suit fan speed low limit,
* measurement code may adjust registers to ensure fan speed reading
*/
static int adm9240_fan_min_write(struct adm9240_data *data, int channel, long val)
{
u8 new_div;
u8 fan_min;
int err;
mutex_lock(&data->update_lock);
if (!val) {
fan_min = 255;
new_div = data->fan_div[channel];
dev_dbg(data->dev, "fan%u low limit set disabled\n", channel + 1);
} else if (val < 1350000 / (8 * 254)) {
new_div = 3;
fan_min = 254;
dev_dbg(data->dev, "fan%u low limit set minimum %u\n",
channel + 1, FAN_FROM_REG(254, BIT(new_div)));
} else {
unsigned int new_min = 1350000 / val;
new_div = 0;
while (new_min > 192 && new_div < 3) {
new_div++;
new_min /= 2;
}
if (!new_min) /* keep > 0 */
new_min++;
fan_min = new_min;
dev_dbg(data->dev, "fan%u low limit set fan speed %u\n",
channel + 1, FAN_FROM_REG(new_min, BIT(new_div)));
}
if (new_div != data->fan_div[channel]) {
data->fan_div[channel] = new_div;
adm9240_write_fan_div(data, channel, new_div);
}
err = regmap_write(data->regmap, ADM9240_REG_FAN_MIN(channel), fan_min);
mutex_unlock(&data->update_lock);
return err;
}
static ssize_t cpu0_vid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm9240_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
u8 vid;
err = regmap_read(data->regmap, ADM9240_REG_VID_FAN_DIV, ®val);
if (err < 0)
return err;
vid = regval & 0x0f;
err = regmap_read(data->regmap, ADM9240_REG_VID4, ®val);
if (err < 0)
return err;
vid |= (regval & 1) << 4;
return sprintf(buf, "%d\n", vid_from_reg(vid, data->vrm));
}
static DEVICE_ATTR_RO(cpu0_vid);
static ssize_t aout_output_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct adm9240_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
err = regmap_read(data->regmap, ADM9240_REG_ANALOG_OUT, ®val);
if (err)
return err;
return sprintf(buf, "%d\n", AOUT_FROM_REG(regval));
}
static ssize_t aout_output_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct adm9240_data *data = dev_get_drvdata(dev);
long val;
int err;
err = kstrtol(buf, 10, &val);
if (err)
return err;
err = regmap_write(data->regmap, ADM9240_REG_ANALOG_OUT, AOUT_TO_REG(val));
return err < 0 ? err : count;
}
static DEVICE_ATTR_RW(aout_output);
static struct attribute *adm9240_attrs[] = {
&dev_attr_aout_output.attr,
&dev_attr_cpu0_vid.attr,
NULL
};
ATTRIBUTE_GROUPS(adm9240);
/*** sensor chip detect and driver install ***/
/* Return 0 if detection is successful, -ENODEV otherwise */
static int adm9240_detect(struct i2c_client *new_client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = new_client->adapter;
const char *name = "";
int address = new_client->addr;
u8 man_id, die_rev;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
/* verify chip: reg address should match i2c address */
if (i2c_smbus_read_byte_data(new_client, ADM9240_REG_I2C_ADDR) != address)
return -ENODEV;
/* check known chip manufacturer */
man_id = i2c_smbus_read_byte_data(new_client, ADM9240_REG_MAN_ID);
if (man_id == 0x23)
name = "adm9240";
else if (man_id == 0xda)
name = "ds1780";
else if (man_id == 0x01)
name = "lm81";
else
return -ENODEV;
/* successful detect, print chip info */
die_rev = i2c_smbus_read_byte_data(new_client, ADM9240_REG_DIE_REV);
dev_info(&adapter->dev, "found %s revision %u\n",
man_id == 0x23 ? "ADM9240" :
man_id == 0xda ? "DS1780" : "LM81", die_rev);
strscpy(info->type, name, I2C_NAME_SIZE);
return 0;
}
static int adm9240_init_client(struct adm9240_data *data)
{
unsigned int regval;
u8 conf, mode;
int err;
err = regmap_raw_read(data->regmap, ADM9240_REG_CONFIG, &conf, 1);
if (err < 0)
return err;
err = regmap_raw_read(data->regmap, ADM9240_REG_TEMP_CONF, &mode, 1);
if (err < 0)
return err;
mode &= 3;
data->vrm = vid_which_vrm(); /* need this to report vid as mV */
dev_info(data->dev, "Using VRM: %d.%d\n", data->vrm / 10,
data->vrm % 10);
if (conf & 1) { /* measurement cycle running: report state */
dev_info(data->dev, "status: config 0x%02x mode %u\n",
conf, mode);
} else { /* cold start: open limits before starting chip */
int i;
for (i = 0; i < 6; i++) {
err = regmap_write(data->regmap,
ADM9240_REG_IN_MIN(i), 0);
if (err < 0)
return err;
err = regmap_write(data->regmap,
ADM9240_REG_IN_MAX(i), 255);
if (err < 0)
return err;
}
for (i = 0; i < 2; i++) {
err = regmap_write(data->regmap,
ADM9240_REG_FAN_MIN(i), 255);
if (err < 0)
return err;
}
for (i = 0; i < 2; i++) {
err = regmap_write(data->regmap,
ADM9240_REG_TEMP_MAX(i), 127);
if (err < 0)
return err;
}
/* start measurement cycle */
err = regmap_write(data->regmap, ADM9240_REG_CONFIG, 1);
if (err < 0)
return err;
dev_info(data->dev,
"cold start: config was 0x%02x mode %u\n", conf, mode);
}
/* read fan divs */
err = regmap_read(data->regmap, ADM9240_REG_VID_FAN_DIV, ®val);
if (err < 0)
return err;
data->fan_div[0] = (regval >> 4) & 3;
data->fan_div[1] = (regval >> 6) & 3;
return 0;
}
static int adm9240_chip_read(struct device *dev, u32 attr, long *val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
u8 regs[2];
int err;
switch (attr) {
case hwmon_chip_alarms:
err = regmap_bulk_read(data->regmap, ADM9240_REG_INT(0), ®s, 2);
if (err < 0)
return err;
*val = regs[0] | regs[1] << 8;
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adm9240_intrusion_read(struct device *dev, u32 attr, long *val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
switch (attr) {
case hwmon_intrusion_alarm:
err = regmap_read(data->regmap, ADM9240_REG_INT(1), ®val);
if (err < 0)
return err;
*val = !!(regval & BIT(4));
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adm9240_intrusion_write(struct device *dev, u32 attr, long val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
int err;
switch (attr) {
case hwmon_intrusion_alarm:
if (val)
return -EINVAL;
err = regmap_write(data->regmap, ADM9240_REG_CHASSIS_CLEAR, 0x80);
if (err < 0)
return err;
dev_dbg(data->dev, "chassis intrusion latch cleared\n");
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adm9240_in_read(struct device *dev, u32 attr, int channel, long *val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
unsigned int regval;
int reg;
int err;
switch (attr) {
case hwmon_in_input:
reg = ADM9240_REG_IN(channel);
break;
case hwmon_in_min:
reg = ADM9240_REG_IN_MIN(channel);
break;
case hwmon_in_max:
reg = ADM9240_REG_IN_MAX(channel);
break;
case hwmon_in_alarm:
if (channel < 4) {
reg = ADM9240_REG_INT(0);
} else {
reg = ADM9240_REG_INT(1);
channel -= 4;
}
err = regmap_read(data->regmap, reg, ®val);
if (err < 0)
return err;
*val = !!(regval & BIT(channel));
return 0;
default:
return -EOPNOTSUPP;
}
err = regmap_read(data->regmap, reg, ®val);
if (err < 0)
return err;
*val = IN_FROM_REG(regval, channel);
return 0;
}
static int adm9240_in_write(struct device *dev, u32 attr, int channel, long val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
int reg;
switch (attr) {
case hwmon_in_min:
reg = ADM9240_REG_IN_MIN(channel);
break;
case hwmon_in_max:
reg = ADM9240_REG_IN_MAX(channel);
break;
default:
return -EOPNOTSUPP;
}
return regmap_write(data->regmap, reg, IN_TO_REG(val, channel));
}
static int adm9240_fan_read(struct device *dev, u32 attr, int channel, long *val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err;
switch (attr) {
case hwmon_fan_input:
mutex_lock(&data->update_lock);
err = regmap_read(data->regmap, ADM9240_REG_FAN(channel), ®val);
if (err < 0) {
mutex_unlock(&data->update_lock);
return err;
}
if (regval == 255 && data->fan_div[channel] < 3) {
/* adjust fan clock divider on overflow */
err = adm9240_write_fan_div(data, channel,
++data->fan_div[channel]);
if (err) {
mutex_unlock(&data->update_lock);
return err;
}
}
*val = FAN_FROM_REG(regval, BIT(data->fan_div[channel]));
mutex_unlock(&data->update_lock);
break;
case hwmon_fan_div:
*val = BIT(data->fan_div[channel]);
break;
case hwmon_fan_min:
err = regmap_read(data->regmap, ADM9240_REG_FAN_MIN(channel), ®val);
if (err < 0)
return err;
*val = FAN_FROM_REG(regval, BIT(data->fan_div[channel]));
break;
case hwmon_fan_alarm:
err = regmap_read(data->regmap, ADM9240_REG_INT(0), ®val);
if (err < 0)
return err;
*val = !!(regval & BIT(channel + 6));
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adm9240_fan_write(struct device *dev, u32 attr, int channel, long val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
int err;
switch (attr) {
case hwmon_fan_min:
err = adm9240_fan_min_write(data, channel, val);
if (err < 0)
return err;
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adm9240_temp_read(struct device *dev, u32 attr, int channel, long *val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
unsigned int regval;
int err, temp;
switch (attr) {
case hwmon_temp_input:
err = regmap_read(data->regmap, ADM9240_REG_TEMP, ®val);
if (err < 0)
return err;
temp = regval << 1;
err = regmap_read(data->regmap, ADM9240_REG_TEMP_CONF, ®val);
if (err < 0)
return err;
temp |= regval >> 7;
*val = sign_extend32(temp, 8) * 500;
break;
case hwmon_temp_max:
err = regmap_read(data->regmap, ADM9240_REG_TEMP_MAX(0), ®val);
if (err < 0)
return err;
*val = (s8)regval * 1000;
break;
case hwmon_temp_max_hyst:
err = regmap_read(data->regmap, ADM9240_REG_TEMP_MAX(1), ®val);
if (err < 0)
return err;
*val = (s8)regval * 1000;
break;
case hwmon_temp_alarm:
err = regmap_read(data->regmap, ADM9240_REG_INT(0), ®val);
if (err < 0)
return err;
*val = !!(regval & BIT(4));
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adm9240_temp_write(struct device *dev, u32 attr, int channel, long val)
{
struct adm9240_data *data = dev_get_drvdata(dev);
int reg;
switch (attr) {
case hwmon_temp_max:
reg = ADM9240_REG_TEMP_MAX(0);
break;
case hwmon_temp_max_hyst:
reg = ADM9240_REG_TEMP_MAX(1);
break;
default:
return -EOPNOTSUPP;
}
return regmap_write(data->regmap, reg, TEMP_TO_REG(val));
}
static int adm9240_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
switch (type) {
case hwmon_chip:
return adm9240_chip_read(dev, attr, val);
case hwmon_intrusion:
return adm9240_intrusion_read(dev, attr, val);
case hwmon_in:
return adm9240_in_read(dev, attr, channel, val);
case hwmon_fan:
return adm9240_fan_read(dev, attr, channel, val);
case hwmon_temp:
return adm9240_temp_read(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int adm9240_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long val)
{
switch (type) {
case hwmon_intrusion:
return adm9240_intrusion_write(dev, attr, val);
case hwmon_in:
return adm9240_in_write(dev, attr, channel, val);
case hwmon_fan:
return adm9240_fan_write(dev, attr, channel, val);
case hwmon_temp:
return adm9240_temp_write(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t adm9240_is_visible(const void *_data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
umode_t mode = 0;
switch (type) {
case hwmon_chip:
switch (attr) {
case hwmon_chip_alarms:
mode = 0444;
break;
default:
break;
}
break;
case hwmon_intrusion:
switch (attr) {
case hwmon_intrusion_alarm:
mode = 0644;
break;
default:
break;
}
break;
case hwmon_temp:
switch (attr) {
case hwmon_temp:
case hwmon_temp_alarm:
mode = 0444;
break;
case hwmon_temp_max:
case hwmon_temp_max_hyst:
mode = 0644;
break;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_div:
case hwmon_fan_alarm:
mode = 0444;
break;
case hwmon_fan_min:
mode = 0644;
break;
default:
break;
}
break;
case hwmon_in:
switch (attr) {
case hwmon_in_input:
case hwmon_in_alarm:
mode = 0444;
break;
case hwmon_in_min:
case hwmon_in_max:
mode = 0644;
break;
default:
break;
}
break;
default:
break;
}
return mode;
}
static const struct hwmon_ops adm9240_hwmon_ops = {
.is_visible = adm9240_is_visible,
.read = adm9240_read,
.write = adm9240_write,
};
static const struct hwmon_channel_info * const adm9240_info[] = {
HWMON_CHANNEL_INFO(chip, HWMON_C_ALARMS),
HWMON_CHANNEL_INFO(intrusion, HWMON_INTRUSION_ALARM),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_ALARM),
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM),
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_DIV | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_DIV | HWMON_F_ALARM),
NULL
};
static const struct hwmon_chip_info adm9240_chip_info = {
.ops = &adm9240_hwmon_ops,
.info = adm9240_info,
};
static bool adm9240_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case ADM9240_REG_IN(0) ... ADM9240_REG_IN(5):
case ADM9240_REG_FAN(0) ... ADM9240_REG_FAN(1):
case ADM9240_REG_INT(0) ... ADM9240_REG_INT(1):
case ADM9240_REG_TEMP:
case ADM9240_REG_TEMP_CONF:
case ADM9240_REG_VID_FAN_DIV:
case ADM9240_REG_VID4:
case ADM9240_REG_ANALOG_OUT:
return true;
default:
return false;
}
}
static const struct regmap_config adm9240_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.use_single_read = true,
.use_single_write = true,
.volatile_reg = adm9240_volatile_reg,
};
static int adm9240_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device *hwmon_dev;
struct adm9240_data *data;
int err;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->dev = dev;
mutex_init(&data->update_lock);
data->regmap = devm_regmap_init_i2c(client, &adm9240_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
err = adm9240_init_client(data);
if (err < 0)
return err;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
&adm9240_chip_info,
adm9240_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id adm9240_id[] = {
{ "adm9240", adm9240 },
{ "ds1780", ds1780 },
{ "lm81", lm81 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adm9240_id);
static struct i2c_driver adm9240_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adm9240",
},
.probe = adm9240_probe,
.id_table = adm9240_id,
.detect = adm9240_detect,
.address_list = normal_i2c,
};
module_i2c_driver(adm9240_driver);
MODULE_AUTHOR("Michiel Rook <[email protected]>, "
"Grant Coady <[email protected]> and others");
MODULE_DESCRIPTION("ADM9240/DS1780/LM81 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/adm9240.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* A hwmon driver for the Analog Devices ADT7470
* Copyright (C) 2007 IBM
*
* Author: Darrick J. Wong <[email protected]>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/log2.h>
#include <linux/kthread.h>
#include <linux/regmap.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/util_macros.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { 0x2C, 0x2E, 0x2F, I2C_CLIENT_END };
/* ADT7470 registers */
#define ADT7470_REG_BASE_ADDR 0x20
#define ADT7470_REG_TEMP_BASE_ADDR 0x20
#define ADT7470_REG_TEMP_MAX_ADDR 0x29
#define ADT7470_REG_FAN_BASE_ADDR 0x2A
#define ADT7470_REG_FAN_MAX_ADDR 0x31
#define ADT7470_REG_PWM_BASE_ADDR 0x32
#define ADT7470_REG_PWM_MAX_ADDR 0x35
#define ADT7470_REG_PWM_MAX_BASE_ADDR 0x38
#define ADT7470_REG_PWM_MAX_MAX_ADDR 0x3B
#define ADT7470_REG_CFG 0x40
#define ADT7470_STRT_MASK 0x01
#define ADT7470_TEST_MASK 0x02
#define ADT7470_FSPD_MASK 0x04
#define ADT7470_T05_STB_MASK 0x80
#define ADT7470_REG_ALARM1 0x41
#define ADT7470_R1T_ALARM 0x01
#define ADT7470_R2T_ALARM 0x02
#define ADT7470_R3T_ALARM 0x04
#define ADT7470_R4T_ALARM 0x08
#define ADT7470_R5T_ALARM 0x10
#define ADT7470_R6T_ALARM 0x20
#define ADT7470_R7T_ALARM 0x40
#define ADT7470_OOL_ALARM 0x80
#define ADT7470_REG_ALARM2 0x42
#define ADT7470_R8T_ALARM 0x01
#define ADT7470_R9T_ALARM 0x02
#define ADT7470_R10T_ALARM 0x04
#define ADT7470_FAN1_ALARM 0x10
#define ADT7470_FAN2_ALARM 0x20
#define ADT7470_FAN3_ALARM 0x40
#define ADT7470_FAN4_ALARM 0x80
#define ADT7470_REG_TEMP_LIMITS_BASE_ADDR 0x44
#define ADT7470_REG_TEMP_LIMITS_MAX_ADDR 0x57
#define ADT7470_REG_FAN_MIN_BASE_ADDR 0x58
#define ADT7470_REG_FAN_MIN_MAX_ADDR 0x5F
#define ADT7470_REG_FAN_MAX_BASE_ADDR 0x60
#define ADT7470_REG_FAN_MAX_MAX_ADDR 0x67
#define ADT7470_REG_PWM_CFG_BASE_ADDR 0x68
#define ADT7470_REG_PWM12_CFG 0x68
#define ADT7470_PWM2_AUTO_MASK 0x40
#define ADT7470_PWM1_AUTO_MASK 0x80
#define ADT7470_PWM_AUTO_MASK 0xC0
#define ADT7470_REG_PWM34_CFG 0x69
#define ADT7470_PWM3_AUTO_MASK 0x40
#define ADT7470_PWM4_AUTO_MASK 0x80
#define ADT7470_REG_PWM_MIN_BASE_ADDR 0x6A
#define ADT7470_REG_PWM_MIN_MAX_ADDR 0x6D
#define ADT7470_REG_PWM_TEMP_MIN_BASE_ADDR 0x6E
#define ADT7470_REG_PWM_TEMP_MIN_MAX_ADDR 0x71
#define ADT7470_REG_CFG_2 0x74
#define ADT7470_REG_ACOUSTICS12 0x75
#define ADT7470_REG_ACOUSTICS34 0x76
#define ADT7470_REG_DEVICE 0x3D
#define ADT7470_REG_VENDOR 0x3E
#define ADT7470_REG_REVISION 0x3F
#define ADT7470_REG_ALARM1_MASK 0x72
#define ADT7470_REG_ALARM2_MASK 0x73
#define ADT7470_REG_PWM_AUTO_TEMP_BASE_ADDR 0x7C
#define ADT7470_REG_PWM_AUTO_TEMP_MAX_ADDR 0x7D
#define ADT7470_REG_MAX_ADDR 0x81
#define ADT7470_TEMP_COUNT 10
#define ADT7470_TEMP_REG(x) (ADT7470_REG_TEMP_BASE_ADDR + (x))
#define ADT7470_TEMP_MIN_REG(x) (ADT7470_REG_TEMP_LIMITS_BASE_ADDR + ((x) * 2))
#define ADT7470_TEMP_MAX_REG(x) (ADT7470_REG_TEMP_LIMITS_BASE_ADDR + \
((x) * 2) + 1)
#define ADT7470_FAN_COUNT 4
#define ADT7470_REG_FAN(x) (ADT7470_REG_FAN_BASE_ADDR + ((x) * 2))
#define ADT7470_REG_FAN_MIN(x) (ADT7470_REG_FAN_MIN_BASE_ADDR + ((x) * 2))
#define ADT7470_REG_FAN_MAX(x) (ADT7470_REG_FAN_MAX_BASE_ADDR + ((x) * 2))
#define ADT7470_PWM_COUNT 4
#define ADT7470_REG_PWM(x) (ADT7470_REG_PWM_BASE_ADDR + (x))
#define ADT7470_REG_PWM_MAX(x) (ADT7470_REG_PWM_MAX_BASE_ADDR + (x))
#define ADT7470_REG_PWM_MIN(x) (ADT7470_REG_PWM_MIN_BASE_ADDR + (x))
#define ADT7470_REG_PWM_TMIN(x) (ADT7470_REG_PWM_TEMP_MIN_BASE_ADDR + (x))
#define ADT7470_REG_PWM_CFG(x) (ADT7470_REG_PWM_CFG_BASE_ADDR + ((x) / 2))
#define ADT7470_REG_PWM_AUTO_TEMP(x) (ADT7470_REG_PWM_AUTO_TEMP_BASE_ADDR + \
((x) / 2))
#define ALARM2(x) ((x) << 8)
#define ADT7470_VENDOR 0x41
#define ADT7470_DEVICE 0x70
/* datasheet only mentions a revision 2 */
#define ADT7470_REVISION 0x02
/* "all temps" according to hwmon sysfs interface spec */
#define ADT7470_PWM_ALL_TEMPS 0x3FF
/* How often do we reread sensors values? (In jiffies) */
#define SENSOR_REFRESH_INTERVAL (5 * HZ)
/* How often do we reread sensor limit values? (In jiffies) */
#define LIMIT_REFRESH_INTERVAL (60 * HZ)
/* Wait at least 200ms per sensor for 10 sensors */
#define TEMP_COLLECTION_TIME 2000
/* auto update thing won't fire more than every 2s */
#define AUTO_UPDATE_INTERVAL 2000
/* datasheet says to divide this number by the fan reading to get fan rpm */
#define FAN_PERIOD_TO_RPM(x) ((90000 * 60) / (x))
#define FAN_RPM_TO_PERIOD FAN_PERIOD_TO_RPM
#define FAN_PERIOD_INVALID 65535
#define FAN_DATA_VALID(x) ((x) && (x) != FAN_PERIOD_INVALID)
/* Config registers 1 and 2 include fields for selecting the PWM frequency */
#define ADT7470_CFG_LF 0x40
#define ADT7470_FREQ_MASK 0x70
#define ADT7470_FREQ_SHIFT 4
struct adt7470_data {
struct regmap *regmap;
struct mutex lock;
char sensors_valid;
char limits_valid;
unsigned long sensors_last_updated; /* In jiffies */
unsigned long limits_last_updated; /* In jiffies */
int num_temp_sensors; /* -1 = probe */
int temperatures_probed;
s8 temp[ADT7470_TEMP_COUNT];
s8 temp_min[ADT7470_TEMP_COUNT];
s8 temp_max[ADT7470_TEMP_COUNT];
u16 fan[ADT7470_FAN_COUNT];
u16 fan_min[ADT7470_FAN_COUNT];
u16 fan_max[ADT7470_FAN_COUNT];
u16 alarm;
u16 alarms_mask;
u8 force_pwm_max;
u8 pwm[ADT7470_PWM_COUNT];
u8 pwm_max[ADT7470_PWM_COUNT];
u8 pwm_automatic[ADT7470_PWM_COUNT];
u8 pwm_min[ADT7470_PWM_COUNT];
s8 pwm_tmin[ADT7470_PWM_COUNT];
u8 pwm_auto_temp[ADT7470_PWM_COUNT];
struct task_struct *auto_update;
unsigned int auto_update_interval;
};
/*
* 16-bit registers on the ADT7470 are low-byte first. The data sheet says
* that the low byte must be read before the high byte.
*/
static inline int adt7470_read_word_data(struct adt7470_data *data, unsigned int reg,
unsigned int *val)
{
u8 regval[2];
int err;
err = regmap_bulk_read(data->regmap, reg, ®val, 2);
if (err < 0)
return err;
*val = regval[0] | (regval[1] << 8);
return 0;
}
static inline int adt7470_write_word_data(struct adt7470_data *data, unsigned int reg,
unsigned int val)
{
u8 regval[2];
regval[0] = val & 0xFF;
regval[1] = val >> 8;
return regmap_bulk_write(data->regmap, reg, ®val, 2);
}
/* Probe for temperature sensors. Assumes lock is held */
static int adt7470_read_temperatures(struct adt7470_data *data)
{
unsigned long res;
unsigned int pwm_cfg[2];
int err;
int i;
u8 pwm[ADT7470_FAN_COUNT];
/* save pwm[1-4] config register */
err = regmap_read(data->regmap, ADT7470_REG_PWM_CFG(0), &pwm_cfg[0]);
if (err < 0)
return err;
err = regmap_read(data->regmap, ADT7470_REG_PWM_CFG(2), &pwm_cfg[1]);
if (err < 0)
return err;
/* set manual pwm to whatever it is set to now */
err = regmap_bulk_read(data->regmap, ADT7470_REG_PWM(0), &pwm[0],
ADT7470_PWM_COUNT);
if (err < 0)
return err;
/* put pwm in manual mode */
err = regmap_update_bits(data->regmap, ADT7470_REG_PWM_CFG(0),
ADT7470_PWM_AUTO_MASK, 0);
if (err < 0)
return err;
err = regmap_update_bits(data->regmap, ADT7470_REG_PWM_CFG(2),
ADT7470_PWM_AUTO_MASK, 0);
if (err < 0)
return err;
/* write pwm control to whatever it was */
err = regmap_bulk_write(data->regmap, ADT7470_REG_PWM(0), &pwm[0],
ADT7470_PWM_COUNT);
if (err < 0)
return err;
/* start reading temperature sensors */
err = regmap_update_bits(data->regmap, ADT7470_REG_CFG,
ADT7470_T05_STB_MASK, ADT7470_T05_STB_MASK);
if (err < 0)
return err;
/* Delay is 200ms * number of temp sensors. */
res = msleep_interruptible((data->num_temp_sensors >= 0 ?
data->num_temp_sensors * 200 :
TEMP_COLLECTION_TIME));
/* done reading temperature sensors */
err = regmap_update_bits(data->regmap, ADT7470_REG_CFG,
ADT7470_T05_STB_MASK, 0);
if (err < 0)
return err;
/* restore pwm[1-4] config registers */
err = regmap_write(data->regmap, ADT7470_REG_PWM_CFG(0), pwm_cfg[0]);
if (err < 0)
return err;
err = regmap_write(data->regmap, ADT7470_REG_PWM_CFG(2), pwm_cfg[1]);
if (err < 0)
return err;
if (res)
return -EAGAIN;
/* Only count fans if we have to */
if (data->num_temp_sensors >= 0)
return 0;
err = regmap_bulk_read(data->regmap, ADT7470_TEMP_REG(0), &data->temp[0],
ADT7470_TEMP_COUNT);
if (err < 0)
return err;
for (i = 0; i < ADT7470_TEMP_COUNT; i++) {
if (data->temp[i])
data->num_temp_sensors = i + 1;
}
data->temperatures_probed = 1;
return 0;
}
static int adt7470_update_thread(void *p)
{
struct i2c_client *client = p;
struct adt7470_data *data = i2c_get_clientdata(client);
while (!kthread_should_stop()) {
mutex_lock(&data->lock);
adt7470_read_temperatures(data);
mutex_unlock(&data->lock);
if (kthread_should_stop())
break;
schedule_timeout_interruptible(msecs_to_jiffies(data->auto_update_interval));
}
return 0;
}
static int adt7470_update_sensors(struct adt7470_data *data)
{
unsigned int val;
int err;
int i;
if (!data->temperatures_probed)
err = adt7470_read_temperatures(data);
else
err = regmap_bulk_read(data->regmap, ADT7470_TEMP_REG(0), &data->temp[0],
ADT7470_TEMP_COUNT);
if (err < 0)
return err;
for (i = 0; i < ADT7470_FAN_COUNT; i++) {
err = adt7470_read_word_data(data, ADT7470_REG_FAN(i), &val);
if (err < 0)
return err;
data->fan[i] = val;
}
err = regmap_bulk_read(data->regmap, ADT7470_REG_PWM(0), &data->pwm[0], ADT7470_PWM_COUNT);
if (err < 0)
return err;
for (i = 0; i < ADT7470_PWM_COUNT; i++) {
unsigned int mask;
if (i % 2)
mask = ADT7470_PWM2_AUTO_MASK;
else
mask = ADT7470_PWM1_AUTO_MASK;
err = regmap_read(data->regmap, ADT7470_REG_PWM_CFG(i), &val);
if (err < 0)
return err;
data->pwm_automatic[i] = !!(val & mask);
err = regmap_read(data->regmap, ADT7470_REG_PWM_AUTO_TEMP(i), &val);
if (err < 0)
return err;
if (!(i % 2))
data->pwm_auto_temp[i] = val >> 4;
else
data->pwm_auto_temp[i] = val & 0xF;
}
err = regmap_read(data->regmap, ADT7470_REG_CFG, &val);
if (err < 0)
return err;
data->force_pwm_max = !!(val & ADT7470_FSPD_MASK);
err = regmap_read(data->regmap, ADT7470_REG_ALARM1, &val);
if (err < 0)
return err;
data->alarm = val;
if (data->alarm & ADT7470_OOL_ALARM) {
err = regmap_read(data->regmap, ADT7470_REG_ALARM2, &val);
if (err < 0)
return err;
data->alarm |= ALARM2(val);
}
err = adt7470_read_word_data(data, ADT7470_REG_ALARM1_MASK, &val);
if (err < 0)
return err;
data->alarms_mask = val;
return 0;
}
static int adt7470_update_limits(struct adt7470_data *data)
{
unsigned int val;
int err;
int i;
for (i = 0; i < ADT7470_TEMP_COUNT; i++) {
err = regmap_read(data->regmap, ADT7470_TEMP_MIN_REG(i), &val);
if (err < 0)
return err;
data->temp_min[i] = (s8)val;
err = regmap_read(data->regmap, ADT7470_TEMP_MAX_REG(i), &val);
if (err < 0)
return err;
data->temp_max[i] = (s8)val;
}
for (i = 0; i < ADT7470_FAN_COUNT; i++) {
err = adt7470_read_word_data(data, ADT7470_REG_FAN_MIN(i), &val);
if (err < 0)
return err;
data->fan_min[i] = val;
err = adt7470_read_word_data(data, ADT7470_REG_FAN_MAX(i), &val);
if (err < 0)
return err;
data->fan_max[i] = val;
}
for (i = 0; i < ADT7470_PWM_COUNT; i++) {
err = regmap_read(data->regmap, ADT7470_REG_PWM_MAX(i), &val);
if (err < 0)
return err;
data->pwm_max[i] = val;
err = regmap_read(data->regmap, ADT7470_REG_PWM_MIN(i), &val);
if (err < 0)
return err;
data->pwm_min[i] = val;
err = regmap_read(data->regmap, ADT7470_REG_PWM_TMIN(i), &val);
if (err < 0)
return err;
data->pwm_tmin[i] = (s8)val;
}
return 0;
}
static struct adt7470_data *adt7470_update_device(struct device *dev)
{
struct adt7470_data *data = dev_get_drvdata(dev);
unsigned long local_jiffies = jiffies;
int need_sensors = 1;
int need_limits = 1;
int err;
/*
* Figure out if we need to update the shadow registers.
* Lockless means that we may occasionally report out of
* date data.
*/
if (time_before(local_jiffies, data->sensors_last_updated +
SENSOR_REFRESH_INTERVAL) &&
data->sensors_valid)
need_sensors = 0;
if (time_before(local_jiffies, data->limits_last_updated +
LIMIT_REFRESH_INTERVAL) &&
data->limits_valid)
need_limits = 0;
if (!need_sensors && !need_limits)
return data;
mutex_lock(&data->lock);
if (need_sensors) {
err = adt7470_update_sensors(data);
if (err < 0)
goto out;
data->sensors_last_updated = local_jiffies;
data->sensors_valid = 1;
}
if (need_limits) {
err = adt7470_update_limits(data);
if (err < 0)
goto out;
data->limits_last_updated = local_jiffies;
data->limits_valid = 1;
}
out:
mutex_unlock(&data->lock);
return err < 0 ? ERR_PTR(err) : data;
}
static ssize_t auto_update_interval_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->auto_update_interval);
}
static ssize_t auto_update_interval_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct adt7470_data *data = dev_get_drvdata(dev);
long temp;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
temp = clamp_val(temp, 0, 60000);
mutex_lock(&data->lock);
data->auto_update_interval = temp;
mutex_unlock(&data->lock);
return count;
}
static ssize_t num_temp_sensors_show(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->num_temp_sensors);
}
static ssize_t num_temp_sensors_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct adt7470_data *data = dev_get_drvdata(dev);
long temp;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
temp = clamp_val(temp, -1, 10);
mutex_lock(&data->lock);
data->num_temp_sensors = temp;
if (temp < 0)
data->temperatures_probed = 0;
mutex_unlock(&data->lock);
return count;
}
static int adt7470_temp_read(struct device *dev, u32 attr, int channel, long *val)
{
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
switch (attr) {
case hwmon_temp_input:
*val = 1000 * data->temp[channel];
break;
case hwmon_temp_min:
*val = 1000 * data->temp_min[channel];
break;
case hwmon_temp_max:
*val = 1000 * data->temp_max[channel];
break;
case hwmon_temp_alarm:
*val = !!(data->alarm & channel);
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adt7470_temp_write(struct device *dev, u32 attr, int channel, long val)
{
struct adt7470_data *data = dev_get_drvdata(dev);
int err;
val = clamp_val(val, -128000, 127000);
val = DIV_ROUND_CLOSEST(val, 1000);
switch (attr) {
case hwmon_temp_min:
mutex_lock(&data->lock);
data->temp_min[channel] = val;
err = regmap_write(data->regmap, ADT7470_TEMP_MIN_REG(channel), val);
mutex_unlock(&data->lock);
break;
case hwmon_temp_max:
mutex_lock(&data->lock);
data->temp_max[channel] = val;
err = regmap_write(data->regmap, ADT7470_TEMP_MAX_REG(channel), val);
mutex_unlock(&data->lock);
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static ssize_t alarm_mask_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%x\n", data->alarms_mask);
}
static ssize_t alarm_mask_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct adt7470_data *data = dev_get_drvdata(dev);
long mask;
int err;
if (kstrtoul(buf, 0, &mask))
return -EINVAL;
if (mask & ~0xffff)
return -EINVAL;
mutex_lock(&data->lock);
data->alarms_mask = mask;
err = adt7470_write_word_data(data, ADT7470_REG_ALARM1_MASK, mask);
mutex_unlock(&data->lock);
return err < 0 ? err : count;
}
static int adt7470_fan_read(struct device *dev, u32 attr, int channel, long *val)
{
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
switch (attr) {
case hwmon_fan_input:
if (FAN_DATA_VALID(data->fan[channel]))
*val = FAN_PERIOD_TO_RPM(data->fan[channel]);
else
*val = 0;
break;
case hwmon_fan_min:
if (FAN_DATA_VALID(data->fan_min[channel]))
*val = FAN_PERIOD_TO_RPM(data->fan_min[channel]);
else
*val = 0;
break;
case hwmon_fan_max:
if (FAN_DATA_VALID(data->fan_max[channel]))
*val = FAN_PERIOD_TO_RPM(data->fan_max[channel]);
else
*val = 0;
break;
case hwmon_fan_alarm:
*val = !!(data->alarm & (1 << (12 + channel)));
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int adt7470_fan_write(struct device *dev, u32 attr, int channel, long val)
{
struct adt7470_data *data = dev_get_drvdata(dev);
int err;
if (val <= 0)
return -EINVAL;
val = FAN_RPM_TO_PERIOD(val);
val = clamp_val(val, 1, 65534);
switch (attr) {
case hwmon_fan_min:
mutex_lock(&data->lock);
data->fan_min[channel] = val;
err = adt7470_write_word_data(data, ADT7470_REG_FAN_MIN(channel), val);
mutex_unlock(&data->lock);
break;
case hwmon_fan_max:
mutex_lock(&data->lock);
data->fan_max[channel] = val;
err = adt7470_write_word_data(data, ADT7470_REG_FAN_MAX(channel), val);
mutex_unlock(&data->lock);
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static ssize_t force_pwm_max_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->force_pwm_max);
}
static ssize_t force_pwm_max_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct adt7470_data *data = dev_get_drvdata(dev);
long temp;
int err;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
mutex_lock(&data->lock);
data->force_pwm_max = temp;
err = regmap_update_bits(data->regmap, ADT7470_REG_CFG,
ADT7470_FSPD_MASK,
temp ? ADT7470_FSPD_MASK : 0);
mutex_unlock(&data->lock);
return err < 0 ? err : count;
}
/* These are the valid PWM frequencies to the nearest Hz */
static const int adt7470_freq_map[] = {
11, 15, 22, 29, 35, 44, 59, 88, 1400, 22500
};
static int pwm1_freq_get(struct device *dev)
{
struct adt7470_data *data = dev_get_drvdata(dev);
unsigned int cfg_reg_1, cfg_reg_2;
int index;
int err;
mutex_lock(&data->lock);
err = regmap_read(data->regmap, ADT7470_REG_CFG, &cfg_reg_1);
if (err < 0)
goto out;
err = regmap_read(data->regmap, ADT7470_REG_CFG_2, &cfg_reg_2);
if (err < 0)
goto out;
mutex_unlock(&data->lock);
index = (cfg_reg_2 & ADT7470_FREQ_MASK) >> ADT7470_FREQ_SHIFT;
if (!(cfg_reg_1 & ADT7470_CFG_LF))
index += 8;
if (index >= ARRAY_SIZE(adt7470_freq_map))
index = ARRAY_SIZE(adt7470_freq_map) - 1;
return adt7470_freq_map[index];
out:
mutex_unlock(&data->lock);
return err;
}
static int adt7470_pwm_read(struct device *dev, u32 attr, int channel, long *val)
{
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
switch (attr) {
case hwmon_pwm_input:
*val = data->pwm[channel];
break;
case hwmon_pwm_enable:
*val = 1 + data->pwm_automatic[channel];
break;
case hwmon_pwm_freq:
*val = pwm1_freq_get(dev);
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static int pwm1_freq_set(struct device *dev, long freq)
{
struct adt7470_data *data = dev_get_drvdata(dev);
unsigned int low_freq = ADT7470_CFG_LF;
int index;
int err;
/* Round the user value given to the closest available frequency */
index = find_closest(freq, adt7470_freq_map,
ARRAY_SIZE(adt7470_freq_map));
if (index >= 8) {
index -= 8;
low_freq = 0;
}
mutex_lock(&data->lock);
/* Configuration Register 1 */
err = regmap_update_bits(data->regmap, ADT7470_REG_CFG,
ADT7470_CFG_LF, low_freq);
if (err < 0)
goto out;
/* Configuration Register 2 */
err = regmap_update_bits(data->regmap, ADT7470_REG_CFG_2,
ADT7470_FREQ_MASK,
index << ADT7470_FREQ_SHIFT);
out:
mutex_unlock(&data->lock);
return err;
}
static int adt7470_pwm_write(struct device *dev, u32 attr, int channel, long val)
{
struct adt7470_data *data = dev_get_drvdata(dev);
unsigned int pwm_auto_reg_mask;
int err;
switch (attr) {
case hwmon_pwm_input:
val = clamp_val(val, 0, 255);
mutex_lock(&data->lock);
data->pwm[channel] = val;
err = regmap_write(data->regmap, ADT7470_REG_PWM(channel),
data->pwm[channel]);
mutex_unlock(&data->lock);
break;
case hwmon_pwm_enable:
if (channel % 2)
pwm_auto_reg_mask = ADT7470_PWM2_AUTO_MASK;
else
pwm_auto_reg_mask = ADT7470_PWM1_AUTO_MASK;
if (val != 2 && val != 1)
return -EINVAL;
val--;
mutex_lock(&data->lock);
data->pwm_automatic[channel] = val;
err = regmap_update_bits(data->regmap, ADT7470_REG_PWM_CFG(channel),
pwm_auto_reg_mask,
val ? pwm_auto_reg_mask : 0);
mutex_unlock(&data->lock);
break;
case hwmon_pwm_freq:
err = pwm1_freq_set(dev, val);
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static ssize_t pwm_max_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->pwm_max[attr->index]);
}
static ssize_t pwm_max_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = dev_get_drvdata(dev);
long temp;
int err;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
temp = clamp_val(temp, 0, 255);
mutex_lock(&data->lock);
data->pwm_max[attr->index] = temp;
err = regmap_write(data->regmap, ADT7470_REG_PWM_MAX(attr->index),
temp);
mutex_unlock(&data->lock);
return err < 0 ? err : count;
}
static ssize_t pwm_min_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", data->pwm_min[attr->index]);
}
static ssize_t pwm_min_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = dev_get_drvdata(dev);
long temp;
int err;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
temp = clamp_val(temp, 0, 255);
mutex_lock(&data->lock);
data->pwm_min[attr->index] = temp;
err = regmap_write(data->regmap, ADT7470_REG_PWM_MIN(attr->index),
temp);
mutex_unlock(&data->lock);
return err < 0 ? err : count;
}
static ssize_t pwm_tmax_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
/* the datasheet says that tmax = tmin + 20C */
return sprintf(buf, "%d\n", 1000 * (20 + data->pwm_tmin[attr->index]));
}
static ssize_t pwm_tmin_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = adt7470_update_device(dev);
if (IS_ERR(data))
return PTR_ERR(data);
return sprintf(buf, "%d\n", 1000 * data->pwm_tmin[attr->index]);
}
static ssize_t pwm_tmin_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = dev_get_drvdata(dev);
long temp;
int err;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
temp = clamp_val(temp, -128000, 127000);
temp = DIV_ROUND_CLOSEST(temp, 1000);
mutex_lock(&data->lock);
data->pwm_tmin[attr->index] = temp;
err = regmap_write(data->regmap, ADT7470_REG_PWM_TMIN(attr->index),
temp);
mutex_unlock(&data->lock);
return err < 0 ? err : count;
}
static ssize_t pwm_auto_temp_show(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = adt7470_update_device(dev);
u8 ctrl;
if (IS_ERR(data))
return PTR_ERR(data);
ctrl = data->pwm_auto_temp[attr->index];
if (ctrl)
return sprintf(buf, "%d\n", 1 << (ctrl - 1));
else
return sprintf(buf, "%d\n", ADT7470_PWM_ALL_TEMPS);
}
static int cvt_auto_temp(int input)
{
if (input == ADT7470_PWM_ALL_TEMPS)
return 0;
if (input < 1 || !is_power_of_2(input))
return -EINVAL;
return ilog2(input) + 1;
}
static ssize_t pwm_auto_temp_store(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct adt7470_data *data = dev_get_drvdata(dev);
int pwm_auto_reg = ADT7470_REG_PWM_AUTO_TEMP(attr->index);
unsigned int mask, val;
long temp;
int err;
if (kstrtol(buf, 10, &temp))
return -EINVAL;
temp = cvt_auto_temp(temp);
if (temp < 0)
return temp;
mutex_lock(&data->lock);
data->pwm_automatic[attr->index] = temp;
if (!(attr->index % 2)) {
mask = 0xF0;
val = (temp << 4) & 0xF0;
} else {
mask = 0x0F;
val = temp & 0x0F;
}
err = regmap_update_bits(data->regmap, pwm_auto_reg, mask, val);
mutex_unlock(&data->lock);
return err < 0 ? err : count;
}
static DEVICE_ATTR_RW(alarm_mask);
static DEVICE_ATTR_RW(num_temp_sensors);
static DEVICE_ATTR_RW(auto_update_interval);
static SENSOR_DEVICE_ATTR_RW(force_pwm_max, force_pwm_max, 0);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_pwm, pwm_min, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_point1_pwm, pwm_min, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_point1_pwm, pwm_min, 2);
static SENSOR_DEVICE_ATTR_RW(pwm4_auto_point1_pwm, pwm_min, 3);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_pwm, pwm_max, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_point2_pwm, pwm_max, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_point2_pwm, pwm_max, 2);
static SENSOR_DEVICE_ATTR_RW(pwm4_auto_point2_pwm, pwm_max, 3);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp, pwm_tmin, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_point1_temp, pwm_tmin, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_point1_temp, pwm_tmin, 2);
static SENSOR_DEVICE_ATTR_RW(pwm4_auto_point1_temp, pwm_tmin, 3);
static SENSOR_DEVICE_ATTR_RO(pwm1_auto_point2_temp, pwm_tmax, 0);
static SENSOR_DEVICE_ATTR_RO(pwm2_auto_point2_temp, pwm_tmax, 1);
static SENSOR_DEVICE_ATTR_RO(pwm3_auto_point2_temp, pwm_tmax, 2);
static SENSOR_DEVICE_ATTR_RO(pwm4_auto_point2_temp, pwm_tmax, 3);
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_channels_temp, pwm_auto_temp, 0);
static SENSOR_DEVICE_ATTR_RW(pwm2_auto_channels_temp, pwm_auto_temp, 1);
static SENSOR_DEVICE_ATTR_RW(pwm3_auto_channels_temp, pwm_auto_temp, 2);
static SENSOR_DEVICE_ATTR_RW(pwm4_auto_channels_temp, pwm_auto_temp, 3);
static struct attribute *adt7470_attrs[] = {
&dev_attr_alarm_mask.attr,
&dev_attr_num_temp_sensors.attr,
&dev_attr_auto_update_interval.attr,
&sensor_dev_attr_force_pwm_max.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_point2_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(adt7470);
static int adt7470_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
switch (type) {
case hwmon_temp:
return adt7470_temp_read(dev, attr, channel, val);
case hwmon_fan:
return adt7470_fan_read(dev, attr, channel, val);
case hwmon_pwm:
return adt7470_pwm_read(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int adt7470_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long val)
{
switch (type) {
case hwmon_temp:
return adt7470_temp_write(dev, attr, channel, val);
case hwmon_fan:
return adt7470_fan_write(dev, attr, channel, val);
case hwmon_pwm:
return adt7470_pwm_write(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t adt7470_is_visible(const void *_data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
umode_t mode = 0;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp:
case hwmon_temp_alarm:
mode = 0444;
break;
case hwmon_temp_min:
case hwmon_temp_max:
mode = 0644;
break;
default:
break;
}
break;
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_alarm:
mode = 0444;
break;
case hwmon_fan_min:
case hwmon_fan_max:
mode = 0644;
break;
default:
break;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_input:
case hwmon_pwm_enable:
mode = 0644;
break;
case hwmon_pwm_freq:
if (channel == 0)
mode = 0644;
else
mode = 0;
break;
default:
break;
}
break;
default:
break;
}
return mode;
}
static const struct hwmon_ops adt7470_hwmon_ops = {
.is_visible = adt7470_is_visible,
.read = adt7470_read,
.write = adt7470_write,
};
static const struct hwmon_channel_info * const adt7470_info[] = {
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_ALARM),
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_MAX | HWMON_F_DIV | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_MAX | HWMON_F_DIV | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_MAX | HWMON_F_DIV | HWMON_F_ALARM,
HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_MAX | HWMON_F_DIV | HWMON_F_ALARM),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE | HWMON_PWM_FREQ,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
NULL
};
static const struct hwmon_chip_info adt7470_chip_info = {
.ops = &adt7470_hwmon_ops,
.info = adt7470_info,
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int adt7470_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int vendor, device, revision;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
vendor = i2c_smbus_read_byte_data(client, ADT7470_REG_VENDOR);
if (vendor != ADT7470_VENDOR)
return -ENODEV;
device = i2c_smbus_read_byte_data(client, ADT7470_REG_DEVICE);
if (device != ADT7470_DEVICE)
return -ENODEV;
revision = i2c_smbus_read_byte_data(client, ADT7470_REG_REVISION);
if (revision != ADT7470_REVISION)
return -ENODEV;
strscpy(info->type, "adt7470", I2C_NAME_SIZE);
return 0;
}
static const struct regmap_config adt7470_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.use_single_read = true,
.use_single_write = true,
};
static int adt7470_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct adt7470_data *data;
struct device *hwmon_dev;
int err;
data = devm_kzalloc(dev, sizeof(struct adt7470_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->num_temp_sensors = -1;
data->auto_update_interval = AUTO_UPDATE_INTERVAL;
data->regmap = devm_regmap_init_i2c(client, &adt7470_regmap_config);
if (IS_ERR(data->regmap))
return PTR_ERR(data->regmap);
i2c_set_clientdata(client, data);
mutex_init(&data->lock);
dev_info(&client->dev, "%s chip found\n", client->name);
/* Initialize the ADT7470 chip */
err = regmap_update_bits(data->regmap, ADT7470_REG_CFG,
ADT7470_STRT_MASK | ADT7470_TEST_MASK,
ADT7470_STRT_MASK | ADT7470_TEST_MASK);
if (err < 0)
return err;
/* Register sysfs hooks */
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
&adt7470_chip_info,
adt7470_groups);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
data->auto_update = kthread_run(adt7470_update_thread, client, "%s",
dev_name(hwmon_dev));
if (IS_ERR(data->auto_update))
return PTR_ERR(data->auto_update);
return 0;
}
static void adt7470_remove(struct i2c_client *client)
{
struct adt7470_data *data = i2c_get_clientdata(client);
kthread_stop(data->auto_update);
}
static const struct i2c_device_id adt7470_id[] = {
{ "adt7470", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adt7470_id);
static struct i2c_driver adt7470_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "adt7470",
},
.probe = adt7470_probe,
.remove = adt7470_remove,
.id_table = adt7470_id,
.detect = adt7470_detect,
.address_list = normal_i2c,
};
module_i2c_driver(adt7470_driver);
MODULE_AUTHOR("Darrick J. Wong <[email protected]>");
MODULE_DESCRIPTION("ADT7470 driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/adt7470.c
|
// SPDX-License-Identifier: GPL-2.0
/*
* Synaptics AS370 SoC Hardware Monitoring Driver
*
* Copyright (C) 2018 Synaptics Incorporated
* Author: Jisheng Zhang <[email protected]>
*/
#include <linux/bitops.h>
#include <linux/hwmon.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#define CTRL 0x0
#define PD BIT(0)
#define EN BIT(1)
#define T_SEL BIT(2)
#define V_SEL BIT(3)
#define NMOS_SEL BIT(8)
#define PMOS_SEL BIT(9)
#define STS 0x4
#define BN_MASK GENMASK(11, 0)
#define EOC BIT(12)
struct as370_hwmon {
void __iomem *base;
};
static void init_pvt(struct as370_hwmon *hwmon)
{
u32 val;
void __iomem *addr = hwmon->base + CTRL;
val = PD;
writel_relaxed(val, addr);
val |= T_SEL;
writel_relaxed(val, addr);
val |= EN;
writel_relaxed(val, addr);
val &= ~PD;
writel_relaxed(val, addr);
}
static int as370_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *temp)
{
int val;
struct as370_hwmon *hwmon = dev_get_drvdata(dev);
switch (attr) {
case hwmon_temp_input:
val = readl_relaxed(hwmon->base + STS) & BN_MASK;
*temp = DIV_ROUND_CLOSEST(val * 251802, 4096) - 85525;
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static umode_t
as370_hwmon_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
if (type != hwmon_temp)
return 0;
switch (attr) {
case hwmon_temp_input:
return 0444;
default:
return 0;
}
}
static const struct hwmon_channel_info * const as370_hwmon_info[] = {
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
NULL
};
static const struct hwmon_ops as370_hwmon_ops = {
.is_visible = as370_hwmon_is_visible,
.read = as370_hwmon_read,
};
static const struct hwmon_chip_info as370_chip_info = {
.ops = &as370_hwmon_ops,
.info = as370_hwmon_info,
};
static int as370_hwmon_probe(struct platform_device *pdev)
{
struct device *hwmon_dev;
struct as370_hwmon *hwmon;
struct device *dev = &pdev->dev;
hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
if (!hwmon)
return -ENOMEM;
hwmon->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(hwmon->base))
return PTR_ERR(hwmon->base);
init_pvt(hwmon);
hwmon_dev = devm_hwmon_device_register_with_info(dev,
"as370",
hwmon,
&as370_chip_info,
NULL);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct of_device_id as370_hwmon_match[] = {
{ .compatible = "syna,as370-hwmon" },
{},
};
MODULE_DEVICE_TABLE(of, as370_hwmon_match);
static struct platform_driver as370_hwmon_driver = {
.probe = as370_hwmon_probe,
.driver = {
.name = "as370-hwmon",
.of_match_table = as370_hwmon_match,
},
};
module_platform_driver(as370_hwmon_driver);
MODULE_AUTHOR("Jisheng Zhang<[email protected]>");
MODULE_DESCRIPTION("Synaptics AS370 SoC hardware monitor");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/as370-hwmon.c
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for the ADT7411 (I2C/SPI 8 channel 10 bit ADC & temperature-sensor)
*
* Copyright (C) 2008, 2010 Pengutronix
*
* TODO: SPI, use power-down mode for suspend?, interrupt handling?
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/slab.h>
#define ADT7411_REG_STAT_1 0x00
#define ADT7411_STAT_1_INT_TEMP_HIGH BIT(0)
#define ADT7411_STAT_1_INT_TEMP_LOW BIT(1)
#define ADT7411_STAT_1_EXT_TEMP_HIGH_AIN1 BIT(2)
#define ADT7411_STAT_1_EXT_TEMP_LOW BIT(3)
#define ADT7411_STAT_1_EXT_TEMP_FAULT BIT(4)
#define ADT7411_STAT_1_AIN2 BIT(5)
#define ADT7411_STAT_1_AIN3 BIT(6)
#define ADT7411_STAT_1_AIN4 BIT(7)
#define ADT7411_REG_STAT_2 0x01
#define ADT7411_STAT_2_AIN5 BIT(0)
#define ADT7411_STAT_2_AIN6 BIT(1)
#define ADT7411_STAT_2_AIN7 BIT(2)
#define ADT7411_STAT_2_AIN8 BIT(3)
#define ADT7411_STAT_2_VDD BIT(4)
#define ADT7411_REG_INT_TEMP_VDD_LSB 0x03
#define ADT7411_REG_EXT_TEMP_AIN14_LSB 0x04
#define ADT7411_REG_VDD_MSB 0x06
#define ADT7411_REG_INT_TEMP_MSB 0x07
#define ADT7411_REG_EXT_TEMP_AIN1_MSB 0x08
#define ADT7411_REG_CFG1 0x18
#define ADT7411_CFG1_START_MONITOR BIT(0)
#define ADT7411_CFG1_RESERVED_BIT1 BIT(1)
#define ADT7411_CFG1_EXT_TDM BIT(2)
#define ADT7411_CFG1_RESERVED_BIT3 BIT(3)
#define ADT7411_REG_CFG2 0x19
#define ADT7411_CFG2_DISABLE_AVG BIT(5)
#define ADT7411_REG_CFG3 0x1a
#define ADT7411_CFG3_ADC_CLK_225 BIT(0)
#define ADT7411_CFG3_RESERVED_BIT1 BIT(1)
#define ADT7411_CFG3_RESERVED_BIT2 BIT(2)
#define ADT7411_CFG3_RESERVED_BIT3 BIT(3)
#define ADT7411_CFG3_REF_VDD BIT(4)
#define ADT7411_REG_VDD_HIGH 0x23
#define ADT7411_REG_VDD_LOW 0x24
#define ADT7411_REG_TEMP_HIGH(nr) (0x25 + 2 * (nr))
#define ADT7411_REG_TEMP_LOW(nr) (0x26 + 2 * (nr))
#define ADT7411_REG_IN_HIGH(nr) ((nr) > 1 \
? 0x2b + 2 * ((nr)-2) \
: 0x27)
#define ADT7411_REG_IN_LOW(nr) ((nr) > 1 \
? 0x2c + 2 * ((nr)-2) \
: 0x28)
#define ADT7411_REG_DEVICE_ID 0x4d
#define ADT7411_REG_MANUFACTURER_ID 0x4e
#define ADT7411_DEVICE_ID 0x2
#define ADT7411_MANUFACTURER_ID 0x41
static const unsigned short normal_i2c[] = { 0x48, 0x4a, 0x4b, I2C_CLIENT_END };
static const u8 adt7411_in_alarm_reg[] = {
ADT7411_REG_STAT_2,
ADT7411_REG_STAT_1,
ADT7411_REG_STAT_1,
ADT7411_REG_STAT_1,
ADT7411_REG_STAT_1,
ADT7411_REG_STAT_2,
ADT7411_REG_STAT_2,
ADT7411_REG_STAT_2,
ADT7411_REG_STAT_2,
};
static const u8 adt7411_in_alarm_bits[] = {
ADT7411_STAT_2_VDD,
ADT7411_STAT_1_EXT_TEMP_HIGH_AIN1,
ADT7411_STAT_1_AIN2,
ADT7411_STAT_1_AIN3,
ADT7411_STAT_1_AIN4,
ADT7411_STAT_2_AIN5,
ADT7411_STAT_2_AIN6,
ADT7411_STAT_2_AIN7,
ADT7411_STAT_2_AIN8,
};
struct adt7411_data {
struct mutex device_lock; /* for "atomic" device accesses */
struct mutex update_lock;
unsigned long next_update;
long vref_cached;
struct i2c_client *client;
bool use_ext_temp;
};
/*
* When reading a register containing (up to 4) lsb, all associated
* msb-registers get locked by the hardware. After _one_ of those msb is read,
* _all_ are unlocked. In order to use this locking correctly, reading lsb/msb
* is protected here with a mutex, too.
*/
static int adt7411_read_10_bit(struct i2c_client *client, u8 lsb_reg,
u8 msb_reg, u8 lsb_shift)
{
struct adt7411_data *data = i2c_get_clientdata(client);
int val, tmp;
mutex_lock(&data->device_lock);
val = i2c_smbus_read_byte_data(client, lsb_reg);
if (val < 0)
goto exit_unlock;
tmp = (val >> lsb_shift) & 3;
val = i2c_smbus_read_byte_data(client, msb_reg);
if (val >= 0)
val = (val << 2) | tmp;
exit_unlock:
mutex_unlock(&data->device_lock);
return val;
}
static int adt7411_modify_bit(struct i2c_client *client, u8 reg, u8 bit,
bool flag)
{
struct adt7411_data *data = i2c_get_clientdata(client);
int ret, val;
mutex_lock(&data->device_lock);
ret = i2c_smbus_read_byte_data(client, reg);
if (ret < 0)
goto exit_unlock;
if (flag)
val = ret | bit;
else
val = ret & ~bit;
ret = i2c_smbus_write_byte_data(client, reg, val);
exit_unlock:
mutex_unlock(&data->device_lock);
return ret;
}
static ssize_t adt7411_show_bit(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct sensor_device_attribute_2 *attr2 = to_sensor_dev_attr_2(attr);
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret = i2c_smbus_read_byte_data(client, attr2->index);
return ret < 0 ? ret : sprintf(buf, "%u\n", !!(ret & attr2->nr));
}
static ssize_t adt7411_set_bit(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct sensor_device_attribute_2 *s_attr2 = to_sensor_dev_attr_2(attr);
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
unsigned long flag;
ret = kstrtoul(buf, 0, &flag);
if (ret || flag > 1)
return -EINVAL;
ret = adt7411_modify_bit(client, s_attr2->index, s_attr2->nr, flag);
/* force update */
mutex_lock(&data->update_lock);
data->next_update = jiffies;
mutex_unlock(&data->update_lock);
return ret < 0 ? ret : count;
}
#define ADT7411_BIT_ATTR(__name, __reg, __bit) \
SENSOR_DEVICE_ATTR_2(__name, S_IRUGO | S_IWUSR, adt7411_show_bit, \
adt7411_set_bit, __bit, __reg)
static ADT7411_BIT_ATTR(no_average, ADT7411_REG_CFG2, ADT7411_CFG2_DISABLE_AVG);
static ADT7411_BIT_ATTR(fast_sampling, ADT7411_REG_CFG3, ADT7411_CFG3_ADC_CLK_225);
static ADT7411_BIT_ATTR(adc_ref_vdd, ADT7411_REG_CFG3, ADT7411_CFG3_REF_VDD);
static struct attribute *adt7411_attrs[] = {
&sensor_dev_attr_no_average.dev_attr.attr,
&sensor_dev_attr_fast_sampling.dev_attr.attr,
&sensor_dev_attr_adc_ref_vdd.dev_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(adt7411);
static int adt7411_read_in_alarm(struct device *dev, int channel, long *val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
ret = i2c_smbus_read_byte_data(client, adt7411_in_alarm_reg[channel]);
if (ret < 0)
return ret;
*val = !!(ret & adt7411_in_alarm_bits[channel]);
return 0;
}
static int adt7411_read_in_vdd(struct device *dev, u32 attr, long *val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
switch (attr) {
case hwmon_in_input:
ret = adt7411_read_10_bit(client, ADT7411_REG_INT_TEMP_VDD_LSB,
ADT7411_REG_VDD_MSB, 2);
if (ret < 0)
return ret;
*val = ret * 7000 / 1024;
return 0;
case hwmon_in_min:
ret = i2c_smbus_read_byte_data(client, ADT7411_REG_VDD_LOW);
if (ret < 0)
return ret;
*val = ret * 7000 / 256;
return 0;
case hwmon_in_max:
ret = i2c_smbus_read_byte_data(client, ADT7411_REG_VDD_HIGH);
if (ret < 0)
return ret;
*val = ret * 7000 / 256;
return 0;
case hwmon_in_alarm:
return adt7411_read_in_alarm(dev, 0, val);
default:
return -EOPNOTSUPP;
}
}
static int adt7411_update_vref(struct device *dev)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int val;
if (time_after_eq(jiffies, data->next_update)) {
val = i2c_smbus_read_byte_data(client, ADT7411_REG_CFG3);
if (val < 0)
return val;
if (val & ADT7411_CFG3_REF_VDD) {
val = adt7411_read_in_vdd(dev, hwmon_in_input,
&data->vref_cached);
if (val < 0)
return val;
} else {
data->vref_cached = 2250;
}
data->next_update = jiffies + HZ;
}
return 0;
}
static int adt7411_read_in_chan(struct device *dev, u32 attr, int channel,
long *val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
int reg, lsb_reg, lsb_shift;
int nr = channel - 1;
mutex_lock(&data->update_lock);
ret = adt7411_update_vref(dev);
if (ret < 0)
goto exit_unlock;
switch (attr) {
case hwmon_in_input:
lsb_reg = ADT7411_REG_EXT_TEMP_AIN14_LSB + (nr >> 2);
lsb_shift = 2 * (nr & 0x03);
ret = adt7411_read_10_bit(client, lsb_reg,
ADT7411_REG_EXT_TEMP_AIN1_MSB + nr,
lsb_shift);
if (ret < 0)
goto exit_unlock;
*val = ret * data->vref_cached / 1024;
ret = 0;
break;
case hwmon_in_min:
case hwmon_in_max:
reg = (attr == hwmon_in_min)
? ADT7411_REG_IN_LOW(channel)
: ADT7411_REG_IN_HIGH(channel);
ret = i2c_smbus_read_byte_data(client, reg);
if (ret < 0)
goto exit_unlock;
*val = ret * data->vref_cached / 256;
ret = 0;
break;
case hwmon_in_alarm:
ret = adt7411_read_in_alarm(dev, channel, val);
break;
default:
ret = -EOPNOTSUPP;
break;
}
exit_unlock:
mutex_unlock(&data->update_lock);
return ret;
}
static int adt7411_read_in(struct device *dev, u32 attr, int channel,
long *val)
{
if (channel == 0)
return adt7411_read_in_vdd(dev, attr, val);
else
return adt7411_read_in_chan(dev, attr, channel, val);
}
static int adt7411_read_temp_alarm(struct device *dev, u32 attr, int channel,
long *val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret, bit;
ret = i2c_smbus_read_byte_data(client, ADT7411_REG_STAT_1);
if (ret < 0)
return ret;
switch (attr) {
case hwmon_temp_min_alarm:
bit = channel ? ADT7411_STAT_1_EXT_TEMP_LOW
: ADT7411_STAT_1_INT_TEMP_LOW;
break;
case hwmon_temp_max_alarm:
bit = channel ? ADT7411_STAT_1_EXT_TEMP_HIGH_AIN1
: ADT7411_STAT_1_INT_TEMP_HIGH;
break;
case hwmon_temp_fault:
bit = ADT7411_STAT_1_EXT_TEMP_FAULT;
break;
default:
return -EOPNOTSUPP;
}
*val = !!(ret & bit);
return 0;
}
static int adt7411_read_temp(struct device *dev, u32 attr, int channel,
long *val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret, reg, regl, regh;
switch (attr) {
case hwmon_temp_input:
regl = channel ? ADT7411_REG_EXT_TEMP_AIN14_LSB :
ADT7411_REG_INT_TEMP_VDD_LSB;
regh = channel ? ADT7411_REG_EXT_TEMP_AIN1_MSB :
ADT7411_REG_INT_TEMP_MSB;
ret = adt7411_read_10_bit(client, regl, regh, 0);
if (ret < 0)
return ret;
ret = ret & 0x200 ? ret - 0x400 : ret; /* 10 bit signed */
*val = ret * 250;
return 0;
case hwmon_temp_min:
case hwmon_temp_max:
reg = (attr == hwmon_temp_min)
? ADT7411_REG_TEMP_LOW(channel)
: ADT7411_REG_TEMP_HIGH(channel);
ret = i2c_smbus_read_byte_data(client, reg);
if (ret < 0)
return ret;
ret = ret & 0x80 ? ret - 0x100 : ret; /* 8 bit signed */
*val = ret * 1000;
return 0;
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_fault:
return adt7411_read_temp_alarm(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int adt7411_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
switch (type) {
case hwmon_in:
return adt7411_read_in(dev, attr, channel, val);
case hwmon_temp:
return adt7411_read_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static int adt7411_write_in_vdd(struct device *dev, u32 attr, long val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int reg;
val = clamp_val(val, 0, 255 * 7000 / 256);
val = DIV_ROUND_CLOSEST(val * 256, 7000);
switch (attr) {
case hwmon_in_min:
reg = ADT7411_REG_VDD_LOW;
break;
case hwmon_in_max:
reg = ADT7411_REG_VDD_HIGH;
break;
default:
return -EOPNOTSUPP;
}
return i2c_smbus_write_byte_data(client, reg, val);
}
static int adt7411_write_in_chan(struct device *dev, u32 attr, int channel,
long val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret, reg;
mutex_lock(&data->update_lock);
ret = adt7411_update_vref(dev);
if (ret < 0)
goto exit_unlock;
val = clamp_val(val, 0, 255 * data->vref_cached / 256);
val = DIV_ROUND_CLOSEST(val * 256, data->vref_cached);
switch (attr) {
case hwmon_in_min:
reg = ADT7411_REG_IN_LOW(channel);
break;
case hwmon_in_max:
reg = ADT7411_REG_IN_HIGH(channel);
break;
default:
ret = -EOPNOTSUPP;
goto exit_unlock;
}
ret = i2c_smbus_write_byte_data(client, reg, val);
exit_unlock:
mutex_unlock(&data->update_lock);
return ret;
}
static int adt7411_write_in(struct device *dev, u32 attr, int channel,
long val)
{
if (channel == 0)
return adt7411_write_in_vdd(dev, attr, val);
else
return adt7411_write_in_chan(dev, attr, channel, val);
}
static int adt7411_write_temp(struct device *dev, u32 attr, int channel,
long val)
{
struct adt7411_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int reg;
val = clamp_val(val, -128000, 127000);
val = DIV_ROUND_CLOSEST(val, 1000);
switch (attr) {
case hwmon_temp_min:
reg = ADT7411_REG_TEMP_LOW(channel);
break;
case hwmon_temp_max:
reg = ADT7411_REG_TEMP_HIGH(channel);
break;
default:
return -EOPNOTSUPP;
}
return i2c_smbus_write_byte_data(client, reg, val);
}
static int adt7411_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
case hwmon_in:
return adt7411_write_in(dev, attr, channel, val);
case hwmon_temp:
return adt7411_write_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
}
static umode_t adt7411_is_visible(const void *_data,
enum hwmon_sensor_types type,
u32 attr, int channel)
{
const struct adt7411_data *data = _data;
bool visible;
switch (type) {
case hwmon_in:
visible = channel == 0 || channel >= 3 || !data->use_ext_temp;
switch (attr) {
case hwmon_in_input:
case hwmon_in_alarm:
return visible ? S_IRUGO : 0;
case hwmon_in_min:
case hwmon_in_max:
return visible ? S_IRUGO | S_IWUSR : 0;
}
break;
case hwmon_temp:
visible = channel == 0 || data->use_ext_temp;
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_min_alarm:
case hwmon_temp_max_alarm:
case hwmon_temp_fault:
return visible ? S_IRUGO : 0;
case hwmon_temp_min:
case hwmon_temp_max:
return visible ? S_IRUGO | S_IWUSR : 0;
}
break;
default:
break;
}
return 0;
}
static int adt7411_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
int val;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -ENODEV;
val = i2c_smbus_read_byte_data(client, ADT7411_REG_MANUFACTURER_ID);
if (val < 0 || val != ADT7411_MANUFACTURER_ID) {
dev_dbg(&client->dev,
"Wrong manufacturer ID. Got %d, expected %d\n",
val, ADT7411_MANUFACTURER_ID);
return -ENODEV;
}
val = i2c_smbus_read_byte_data(client, ADT7411_REG_DEVICE_ID);
if (val < 0 || val != ADT7411_DEVICE_ID) {
dev_dbg(&client->dev,
"Wrong device ID. Got %d, expected %d\n",
val, ADT7411_DEVICE_ID);
return -ENODEV;
}
strscpy(info->type, "adt7411", I2C_NAME_SIZE);
return 0;
}
static int adt7411_init_device(struct adt7411_data *data)
{
int ret;
u8 val;
ret = i2c_smbus_read_byte_data(data->client, ADT7411_REG_CFG3);
if (ret < 0)
return ret;
/*
* We must only write zero to bit 1 and bit 2 and only one to bit 3
* according to the datasheet.
*/
val = ret;
val &= ~(ADT7411_CFG3_RESERVED_BIT1 | ADT7411_CFG3_RESERVED_BIT2);
val |= ADT7411_CFG3_RESERVED_BIT3;
ret = i2c_smbus_write_byte_data(data->client, ADT7411_REG_CFG3, val);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(data->client, ADT7411_REG_CFG1);
if (ret < 0)
return ret;
data->use_ext_temp = ret & ADT7411_CFG1_EXT_TDM;
/*
* We must only write zero to bit 1 and only one to bit 3 according to
* the datasheet.
*/
val = ret;
val &= ~ADT7411_CFG1_RESERVED_BIT1;
val |= ADT7411_CFG1_RESERVED_BIT3;
/* enable monitoring */
val |= ADT7411_CFG1_START_MONITOR;
return i2c_smbus_write_byte_data(data->client, ADT7411_REG_CFG1, val);
}
static const struct hwmon_channel_info * const adt7411_info[] = {
HWMON_CHANNEL_INFO(in,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM,
HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX | HWMON_I_ALARM),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MIN_ALARM |
HWMON_T_MAX | HWMON_T_MAX_ALARM,
HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MIN_ALARM |
HWMON_T_MAX | HWMON_T_MAX_ALARM | HWMON_T_FAULT),
NULL
};
static const struct hwmon_ops adt7411_hwmon_ops = {
.is_visible = adt7411_is_visible,
.read = adt7411_read,
.write = adt7411_write,
};
static const struct hwmon_chip_info adt7411_chip_info = {
.ops = &adt7411_hwmon_ops,
.info = adt7411_info,
};
static int adt7411_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct adt7411_data *data;
struct device *hwmon_dev;
int ret;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
data->client = client;
mutex_init(&data->device_lock);
mutex_init(&data->update_lock);
ret = adt7411_init_device(data);
if (ret < 0)
return ret;
/* force update on first occasion */
data->next_update = jiffies;
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
data,
&adt7411_chip_info,
adt7411_groups);
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static const struct i2c_device_id adt7411_id[] = {
{ "adt7411", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, adt7411_id);
static struct i2c_driver adt7411_driver = {
.driver = {
.name = "adt7411",
},
.probe = adt7411_probe,
.id_table = adt7411_id,
.detect = adt7411_detect,
.address_list = normal_i2c,
.class = I2C_CLASS_HWMON,
};
module_i2c_driver(adt7411_driver);
MODULE_AUTHOR("Sascha Hauer, Wolfram Sang <[email protected]>");
MODULE_DESCRIPTION("ADT7411 driver");
MODULE_LICENSE("GPL v2");
|
linux-master
|
drivers/hwmon/adt7411.c
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* This is a non-complete driver implementation for the
* HS3001 humidity and temperature sensor and compatibles. It does not include
* the configuration possibilities, where it needs to be set to 'programming mode'
* during power-up.
*
*
* Copyright (C) 2023 SYS TEC electronic AG
* Author: Andre Werner <[email protected]>
*/
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/slab.h>
#include <linux/types.h>
/* Measurement times */
#define HS3001_WAKEUP_TIME 100 /* us */
#define HS3001_8BIT_RESOLUTION 550 /* us */
#define HS3001_10BIT_RESOLUTION 1310 /* us */
#define HS3001_12BIT_RESOLUTION 4500 /* us */
#define HS3001_14BIT_RESOLUTION 16900 /* us */
#define HS3001_RESPONSE_LENGTH 4
#define HS3001_FIXPOINT_ARITH 1000U
#define HS3001_MASK_HUMIDITY_0X3FFF GENMASK(13, 0)
#define HS3001_MASK_STATUS_0XC0 GENMASK(7, 6)
/* Definitions for Status Bits of A/D Data */
#define HS3001_DATA_VALID 0x00 /* Valid Data */
#define HS3001_DATA_STALE 0x01 /* Stale Data */
struct hs3001_data {
struct i2c_client *client;
struct mutex i2c_lock; /* lock for sending i2c commands */
u32 wait_time; /* in us */
int temperature; /* in milli degree */
u32 humidity; /* in milli % */
};
static int hs3001_extract_temperature(u16 raw)
{
/* fixpoint arithmetic 1 digit */
u32 temp = (raw >> 2) * HS3001_FIXPOINT_ARITH * 165;
temp /= (1 << 14) - 1;
return (int)temp - 40 * HS3001_FIXPOINT_ARITH;
}
static u32 hs3001_extract_humidity(u16 raw)
{
u32 hum = (raw & HS3001_MASK_HUMIDITY_0X3FFF) * HS3001_FIXPOINT_ARITH * 100;
return hum /= (1 << 14) - 1;
}
static int hs3001_data_fetch_command(struct i2c_client *client,
struct hs3001_data *data)
{
int ret;
u8 buf[HS3001_RESPONSE_LENGTH];
u8 hs3001_status;
ret = i2c_master_recv(client, buf, HS3001_RESPONSE_LENGTH);
if (ret != HS3001_RESPONSE_LENGTH) {
ret = ret < 0 ? ret : -EIO;
dev_dbg(&client->dev,
"Error in i2c communication. Error code: %d.\n", ret);
return ret;
}
hs3001_status = FIELD_GET(HS3001_MASK_STATUS_0XC0, buf[0]);
if (hs3001_status == HS3001_DATA_STALE) {
dev_dbg(&client->dev, "Sensor busy.\n");
return -EBUSY;
}
if (hs3001_status != HS3001_DATA_VALID) {
dev_dbg(&client->dev, "Data invalid.\n");
return -EIO;
}
data->humidity =
hs3001_extract_humidity(be16_to_cpup((__be16 *)&buf[0]));
data->temperature =
hs3001_extract_temperature(be16_to_cpup((__be16 *)&buf[2]));
return 0;
}
static umode_t hs3001_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
/* Both, humidity and temperature can only be read. */
return 0444;
}
static int hs3001_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct hs3001_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int ret;
mutex_lock(&data->i2c_lock);
ret = i2c_master_send(client, NULL, 0);
if (ret < 0) {
mutex_unlock(&data->i2c_lock);
return ret;
}
/*
* Sensor needs some time to process measurement depending on
* resolution (ref. datasheet)
*/
fsleep(data->wait_time);
ret = hs3001_data_fetch_command(client, data);
mutex_unlock(&data->i2c_lock);
if (ret < 0)
return ret;
switch (type) {
case hwmon_temp:
switch (attr) {
case hwmon_temp_input:
*val = data->temperature;
break;
default:
return -EINVAL;
}
break;
case hwmon_humidity:
switch (attr) {
case hwmon_humidity_input:
*val = data->humidity;
break;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
}
return 0;
}
static const struct hwmon_channel_info *hs3001_info[] = {
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
HWMON_CHANNEL_INFO(humidity, HWMON_H_INPUT),
NULL
};
static const struct hwmon_ops hs3001_hwmon_ops = {
.is_visible = hs3001_is_visible,
.read = hs3001_read,
};
static const struct hwmon_chip_info hs3001_chip_info = {
.ops = &hs3001_hwmon_ops,
.info = hs3001_info,
};
/* device ID table */
static const struct i2c_device_id hs3001_ids[] = {
{ "hs3001", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, hs3001_ids);
static const struct of_device_id hs3001_of_match[] = {
{.compatible = "renesas,hs3001"},
{ },
};
MODULE_DEVICE_TABLE(of, hs3001_of_match);
static int hs3001_probe(struct i2c_client *client)
{
struct hs3001_data *data;
struct device *hwmon_dev;
struct device *dev = &client->dev;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
return -EOPNOTSUPP;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
/*
* Measurement time = wake-up time + measurement time temperature
* + measurement time humidity. This is currently static, because
* enabling programming mode is not supported, yet.
*/
data->wait_time = (HS3001_WAKEUP_TIME + HS3001_14BIT_RESOLUTION +
HS3001_14BIT_RESOLUTION);
mutex_init(&data->i2c_lock);
hwmon_dev = devm_hwmon_device_register_with_info(dev,
client->name,
data,
&hs3001_chip_info,
NULL);
if (IS_ERR(hwmon_dev))
return dev_err_probe(dev, PTR_ERR(hwmon_dev),
"Unable to register hwmon device.\n");
return 0;
}
static struct i2c_driver hs3001_i2c_driver = {
.driver = {
.name = "hs3001",
.of_match_table = hs3001_of_match,
},
.probe = hs3001_probe,
.id_table = hs3001_ids,
};
module_i2c_driver(hs3001_i2c_driver);
MODULE_AUTHOR("Andre Werner <[email protected]>");
MODULE_DESCRIPTION("HS3001 humidity and temperature sensor base driver");
MODULE_LICENSE("GPL");
|
linux-master
|
drivers/hwmon/hs3001.c
|
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