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0 | static void qemu_laio_process_completion(struct qemu_laiocb *laiocb) { int ret; ret = laiocb->ret; if (ret != -ECANCELED) { if (ret == laiocb->nbytes) { ret = 0; } else if (ret >= 0) { /* Short reads mean EOF, pad with zeros. */ if (laiocb->is_read) { qemu_iovec_memset(laiocb->qiov, ret, 0, laiocb->qiov->size - ret); } else { ret = -ENOSPC; } } } laiocb->ret = ret; if (laiocb->co) { qemu_coroutine_enter(laiocb->co); } else { laiocb->common.cb(laiocb->common.opaque, ret); qemu_aio_unref(laiocb); } } | 14,937 |
0 | static void aio_epoll_disable(AioContext *ctx) { ctx->epoll_available = false; if (!ctx->epoll_enabled) { return; } ctx->epoll_enabled = false; close(ctx->epollfd); } | 14,938 |
0 | static void pc_machine_initfn(Object *obj) { PCMachineState *pcms = PC_MACHINE(obj); object_property_add(obj, PC_MACHINE_MEMHP_REGION_SIZE, "int", pc_machine_get_hotplug_memory_region_size, NULL, NULL, NULL, &error_abort); pcms->max_ram_below_4g = 0xe0000000; /* 3.5G */ object_property_add(obj, PC_MACHINE_MAX_RAM_BELOW_4G, "size", pc_machine_get_max_ram_below_4g, pc_machine_set_max_ram_below_4g, NULL, NULL, &error_abort); object_property_set_description(obj, PC_MACHINE_MAX_RAM_BELOW_4G, "Maximum ram below the 4G boundary (32bit boundary)", &error_abort); pcms->smm = ON_OFF_AUTO_AUTO; object_property_add(obj, PC_MACHINE_SMM, "OnOffAuto", pc_machine_get_smm, pc_machine_set_smm, NULL, NULL, &error_abort); object_property_set_description(obj, PC_MACHINE_SMM, "Enable SMM (pc & q35)", &error_abort); pcms->vmport = ON_OFF_AUTO_AUTO; object_property_add(obj, PC_MACHINE_VMPORT, "OnOffAuto", pc_machine_get_vmport, pc_machine_set_vmport, NULL, NULL, &error_abort); object_property_set_description(obj, PC_MACHINE_VMPORT, "Enable vmport (pc & q35)", &error_abort); /* nvdimm is disabled on default. */ pcms->acpi_nvdimm_state.is_enabled = false; object_property_add_bool(obj, PC_MACHINE_NVDIMM, pc_machine_get_nvdimm, pc_machine_set_nvdimm, &error_abort); } | 14,940 |
0 | static unsigned int dec_move_rs(DisasContext *dc) { DIS(fprintf (logfile, "move $r%u, $s%u\n", dc->op1, dc->op2)); cris_cc_mask(dc, 0); tcg_gen_helper_0_2(helper_movl_sreg_reg, tcg_const_tl(dc->op2), tcg_const_tl(dc->op1)); return 2; } | 14,941 |
1 | int ff_qsv_encode(AVCodecContext *avctx, QSVEncContext *q, AVPacket *pkt, const AVFrame *frame, int *got_packet) { mfxBitstream bs = { { { 0 } } }; mfxFrameSurface1 *surf = NULL; mfxSyncPoint sync = NULL; int ret; if (frame) { ret = submit_frame(q, frame, &surf); if (ret < 0) { av_log(avctx, AV_LOG_ERROR, "Error submitting the frame for encoding.\n"); return ret; } } ret = ff_alloc_packet(pkt, q->packet_size); if (ret < 0) { av_log(avctx, AV_LOG_ERROR, "Error allocating the output packet\n"); return ret; } bs.Data = pkt->data; bs.MaxLength = pkt->size; do { ret = MFXVideoENCODE_EncodeFrameAsync(q->session, NULL, surf, &bs, &sync); if (ret == MFX_WRN_DEVICE_BUSY) av_usleep(1); } while (ret > 0); if (ret < 0) return (ret == MFX_ERR_MORE_DATA) ? 0 : ff_qsv_error(ret); if (ret == MFX_WRN_INCOMPATIBLE_VIDEO_PARAM && frame->interlaced_frame) print_interlace_msg(avctx, q); if (sync) { MFXVideoCORE_SyncOperation(q->session, sync, 60000); if (bs.FrameType & MFX_FRAMETYPE_I || bs.FrameType & MFX_FRAMETYPE_xI) avctx->coded_frame->pict_type = AV_PICTURE_TYPE_I; else if (bs.FrameType & MFX_FRAMETYPE_P || bs.FrameType & MFX_FRAMETYPE_xP) avctx->coded_frame->pict_type = AV_PICTURE_TYPE_P; else if (bs.FrameType & MFX_FRAMETYPE_B || bs.FrameType & MFX_FRAMETYPE_xB) avctx->coded_frame->pict_type = AV_PICTURE_TYPE_B; pkt->dts = av_rescale_q(bs.DecodeTimeStamp, (AVRational){1, 90000}, avctx->time_base); pkt->pts = av_rescale_q(bs.TimeStamp, (AVRational){1, 90000}, avctx->time_base); pkt->size = bs.DataLength; if (bs.FrameType & MFX_FRAMETYPE_IDR || bs.FrameType & MFX_FRAMETYPE_xIDR) pkt->flags |= AV_PKT_FLAG_KEY; *got_packet = 1; } return 0; } | 14,944 |
1 | static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) { ds1225y_t *NVRAM = opaque; int64_t pos; pos = addr - NVRAM->mem_base; if (ds1225y_set_to_mode(NVRAM, writemode, "wb")) { qemu_fseek(NVRAM->file, pos, SEEK_SET); qemu_put_byte(NVRAM->file, (int)value); } } | 14,945 |
1 | static av_cold int xvid_encode_close(AVCodecContext *avctx) { struct xvid_context *x = avctx->priv_data; xvid_encore(x->encoder_handle, XVID_ENC_DESTROY, NULL, NULL); if( avctx->extradata != NULL ) av_free(avctx->extradata); if( x->twopassbuffer != NULL ) { av_free(x->twopassbuffer); av_free(x->old_twopassbuffer); } if( x->twopassfile != NULL ) av_free(x->twopassfile); if( x->intra_matrix != NULL ) av_free(x->intra_matrix); if( x->inter_matrix != NULL ) av_free(x->inter_matrix); return 0; } | 14,946 |
0 | int attribute_align_arg avcodec_open2(AVCodecContext *avctx, const AVCodec *codec, AVDictionary **options) { int ret = 0; AVDictionary *tmp = NULL; if (avcodec_is_open(avctx)) return 0; if ((!codec && !avctx->codec)) { av_log(avctx, AV_LOG_ERROR, "No codec provided to avcodec_open2()\n"); return AVERROR(EINVAL); } if ((codec && avctx->codec && codec != avctx->codec)) { av_log(avctx, AV_LOG_ERROR, "This AVCodecContext was allocated for %s, " "but %s passed to avcodec_open2()\n", avctx->codec->name, codec->name); return AVERROR(EINVAL); } if (!codec) codec = avctx->codec; if (avctx->extradata_size < 0 || avctx->extradata_size >= FF_MAX_EXTRADATA_SIZE) return AVERROR(EINVAL); if (options) av_dict_copy(&tmp, *options, 0); ret = ff_lock_avcodec(avctx); if (ret < 0) return ret; avctx->internal = av_mallocz(sizeof(AVCodecInternal)); if (!avctx->internal) { ret = AVERROR(ENOMEM); goto end; } avctx->internal->pool = av_mallocz(sizeof(*avctx->internal->pool)); if (!avctx->internal->pool) { ret = AVERROR(ENOMEM); goto free_and_end; } if (codec->priv_data_size > 0) { if (!avctx->priv_data) { avctx->priv_data = av_mallocz(codec->priv_data_size); if (!avctx->priv_data) { ret = AVERROR(ENOMEM); goto end; } if (codec->priv_class) { *(const AVClass **)avctx->priv_data = codec->priv_class; av_opt_set_defaults(avctx->priv_data); } } if (codec->priv_class && (ret = av_opt_set_dict(avctx->priv_data, &tmp)) < 0) goto free_and_end; } else { avctx->priv_data = NULL; } if ((ret = av_opt_set_dict(avctx, &tmp)) < 0) goto free_and_end; //We only call avcodec_set_dimensions() for non h264 codecs so as not to overwrite previously setup dimensions if (!( avctx->coded_width && avctx->coded_height && avctx->width && avctx->height && avctx->codec_id == AV_CODEC_ID_H264)){ if (avctx->coded_width && avctx->coded_height) avcodec_set_dimensions(avctx, avctx->coded_width, avctx->coded_height); else if (avctx->width && avctx->height) avcodec_set_dimensions(avctx, avctx->width, avctx->height); } if ((avctx->coded_width || avctx->coded_height || avctx->width || avctx->height) && ( av_image_check_size(avctx->coded_width, avctx->coded_height, 0, avctx) < 0 || av_image_check_size(avctx->width, avctx->height, 0, avctx) < 0)) { av_log(avctx, AV_LOG_WARNING, "Ignoring invalid width/height values\n"); avcodec_set_dimensions(avctx, 0, 0); } /* if the decoder init function was already called previously, * free the already allocated subtitle_header before overwriting it */ if (av_codec_is_decoder(codec)) av_freep(&avctx->subtitle_header); if (avctx->channels > FF_SANE_NB_CHANNELS) { ret = AVERROR(EINVAL); goto free_and_end; } avctx->codec = codec; if ((avctx->codec_type == AVMEDIA_TYPE_UNKNOWN || avctx->codec_type == codec->type) && avctx->codec_id == AV_CODEC_ID_NONE) { avctx->codec_type = codec->type; avctx->codec_id = codec->id; } if (avctx->codec_id != codec->id || (avctx->codec_type != codec->type && avctx->codec_type != AVMEDIA_TYPE_ATTACHMENT)) { av_log(avctx, AV_LOG_ERROR, "Codec type or id mismatches\n"); ret = AVERROR(EINVAL); goto free_and_end; } avctx->frame_number = 0; avctx->codec_descriptor = avcodec_descriptor_get(avctx->codec_id); if (avctx->codec->capabilities & CODEC_CAP_EXPERIMENTAL && avctx->strict_std_compliance > FF_COMPLIANCE_EXPERIMENTAL) { const char *codec_string = av_codec_is_encoder(codec) ? "encoder" : "decoder"; AVCodec *codec2; av_log(NULL, AV_LOG_ERROR, "The %s '%s' is experimental but experimental codecs are not enabled, " "add '-strict %d' if you want to use it.\n", codec_string, codec->name, FF_COMPLIANCE_EXPERIMENTAL); codec2 = av_codec_is_encoder(codec) ? avcodec_find_encoder(codec->id) : avcodec_find_decoder(codec->id); if (!(codec2->capabilities & CODEC_CAP_EXPERIMENTAL)) av_log(NULL, AV_LOG_ERROR, "Alternatively use the non experimental %s '%s'.\n", codec_string, codec2->name); ret = AVERROR_EXPERIMENTAL; goto free_and_end; } if (avctx->codec_type == AVMEDIA_TYPE_AUDIO && (!avctx->time_base.num || !avctx->time_base.den)) { avctx->time_base.num = 1; avctx->time_base.den = avctx->sample_rate; } if (!HAVE_THREADS) av_log(avctx, AV_LOG_WARNING, "Warning: not compiled with thread support, using thread emulation\n"); if (HAVE_THREADS) { ff_unlock_avcodec(); //we will instanciate a few encoders thus kick the counter to prevent false detection of a problem ret = ff_frame_thread_encoder_init(avctx, options ? *options : NULL); ff_lock_avcodec(avctx); if (ret < 0) goto free_and_end; } if (HAVE_THREADS && !avctx->thread_opaque && !(avctx->internal->frame_thread_encoder && (avctx->active_thread_type&FF_THREAD_FRAME))) { ret = ff_thread_init(avctx); if (ret < 0) { goto free_and_end; } } if (!HAVE_THREADS && !(codec->capabilities & CODEC_CAP_AUTO_THREADS)) avctx->thread_count = 1; if (avctx->codec->max_lowres < avctx->lowres || avctx->lowres < 0) { av_log(avctx, AV_LOG_ERROR, "The maximum value for lowres supported by the decoder is %d\n", avctx->codec->max_lowres); ret = AVERROR(EINVAL); goto free_and_end; } if (av_codec_is_encoder(avctx->codec)) { int i; if (avctx->codec->sample_fmts) { for (i = 0; avctx->codec->sample_fmts[i] != AV_SAMPLE_FMT_NONE; i++) { if (avctx->sample_fmt == avctx->codec->sample_fmts[i]) break; if (avctx->channels == 1 && av_get_planar_sample_fmt(avctx->sample_fmt) == av_get_planar_sample_fmt(avctx->codec->sample_fmts[i])) { avctx->sample_fmt = avctx->codec->sample_fmts[i]; break; } } if (avctx->codec->sample_fmts[i] == AV_SAMPLE_FMT_NONE) { char buf[128]; snprintf(buf, sizeof(buf), "%d", avctx->sample_fmt); av_log(avctx, AV_LOG_ERROR, "Specified sample format %s is invalid or not supported\n", (char *)av_x_if_null(av_get_sample_fmt_name(avctx->sample_fmt), buf)); ret = AVERROR(EINVAL); goto free_and_end; } } if (avctx->codec->pix_fmts) { for (i = 0; avctx->codec->pix_fmts[i] != AV_PIX_FMT_NONE; i++) if (avctx->pix_fmt == avctx->codec->pix_fmts[i]) break; if (avctx->codec->pix_fmts[i] == AV_PIX_FMT_NONE && !((avctx->codec_id == AV_CODEC_ID_MJPEG || avctx->codec_id == AV_CODEC_ID_LJPEG) && avctx->strict_std_compliance <= FF_COMPLIANCE_UNOFFICIAL)) { char buf[128]; snprintf(buf, sizeof(buf), "%d", avctx->pix_fmt); av_log(avctx, AV_LOG_ERROR, "Specified pixel format %s is invalid or not supported\n", (char *)av_x_if_null(av_get_pix_fmt_name(avctx->pix_fmt), buf)); ret = AVERROR(EINVAL); goto free_and_end; } } if (avctx->codec->supported_samplerates) { for (i = 0; avctx->codec->supported_samplerates[i] != 0; i++) if (avctx->sample_rate == avctx->codec->supported_samplerates[i]) break; if (avctx->codec->supported_samplerates[i] == 0) { av_log(avctx, AV_LOG_ERROR, "Specified sample rate %d is not supported\n", avctx->sample_rate); ret = AVERROR(EINVAL); goto free_and_end; } } if (avctx->codec->channel_layouts) { if (!avctx->channel_layout) { av_log(avctx, AV_LOG_WARNING, "Channel layout not specified\n"); } else { for (i = 0; avctx->codec->channel_layouts[i] != 0; i++) if (avctx->channel_layout == avctx->codec->channel_layouts[i]) break; if (avctx->codec->channel_layouts[i] == 0) { char buf[512]; av_get_channel_layout_string(buf, sizeof(buf), -1, avctx->channel_layout); av_log(avctx, AV_LOG_ERROR, "Specified channel layout '%s' is not supported\n", buf); ret = AVERROR(EINVAL); goto free_and_end; } } } if (avctx->channel_layout && avctx->channels) { int channels = av_get_channel_layout_nb_channels(avctx->channel_layout); if (channels != avctx->channels) { char buf[512]; av_get_channel_layout_string(buf, sizeof(buf), -1, avctx->channel_layout); av_log(avctx, AV_LOG_ERROR, "Channel layout '%s' with %d channels does not match number of specified channels %d\n", buf, channels, avctx->channels); ret = AVERROR(EINVAL); goto free_and_end; } } else if (avctx->channel_layout) { avctx->channels = av_get_channel_layout_nb_channels(avctx->channel_layout); } if(avctx->codec_type == AVMEDIA_TYPE_VIDEO && avctx->codec_id != AV_CODEC_ID_PNG // For mplayer ) { if (avctx->width <= 0 || avctx->height <= 0) { av_log(avctx, AV_LOG_ERROR, "dimensions not set\n"); ret = AVERROR(EINVAL); goto free_and_end; } } if ( (avctx->codec_type == AVMEDIA_TYPE_VIDEO || avctx->codec_type == AVMEDIA_TYPE_AUDIO) && avctx->bit_rate>0 && avctx->bit_rate<1000) { av_log(avctx, AV_LOG_WARNING, "Bitrate %d is extremely low, maybe you mean %dk\n", avctx->bit_rate, avctx->bit_rate); } if (!avctx->rc_initial_buffer_occupancy) avctx->rc_initial_buffer_occupancy = avctx->rc_buffer_size * 3 / 4; } avctx->pts_correction_num_faulty_pts = avctx->pts_correction_num_faulty_dts = 0; avctx->pts_correction_last_pts = avctx->pts_correction_last_dts = INT64_MIN; if ( avctx->codec->init && (!(avctx->active_thread_type&FF_THREAD_FRAME) || avctx->internal->frame_thread_encoder)) { ret = avctx->codec->init(avctx); if (ret < 0) { goto free_and_end; } } ret=0; if (av_codec_is_decoder(avctx->codec)) { if (!avctx->bit_rate) avctx->bit_rate = get_bit_rate(avctx); /* validate channel layout from the decoder */ if (avctx->channel_layout) { int channels = av_get_channel_layout_nb_channels(avctx->channel_layout); if (!avctx->channels) avctx->channels = channels; else if (channels != avctx->channels) { char buf[512]; av_get_channel_layout_string(buf, sizeof(buf), -1, avctx->channel_layout); av_log(avctx, AV_LOG_WARNING, "Channel layout '%s' with %d channels does not match specified number of channels %d: " "ignoring specified channel layout\n", buf, channels, avctx->channels); avctx->channel_layout = 0; } } if (avctx->channels && avctx->channels < 0 || avctx->channels > FF_SANE_NB_CHANNELS) { ret = AVERROR(EINVAL); goto free_and_end; } if (avctx->sub_charenc) { if (avctx->codec_type != AVMEDIA_TYPE_SUBTITLE) { av_log(avctx, AV_LOG_ERROR, "Character encoding is only " "supported with subtitles codecs\n"); ret = AVERROR(EINVAL); goto free_and_end; } else if (avctx->codec_descriptor->props & AV_CODEC_PROP_BITMAP_SUB) { av_log(avctx, AV_LOG_WARNING, "Codec '%s' is bitmap-based, " "subtitles character encoding will be ignored\n", avctx->codec_descriptor->name); avctx->sub_charenc_mode = FF_SUB_CHARENC_MODE_DO_NOTHING; } else { /* input character encoding is set for a text based subtitle * codec at this point */ if (avctx->sub_charenc_mode == FF_SUB_CHARENC_MODE_AUTOMATIC) avctx->sub_charenc_mode = FF_SUB_CHARENC_MODE_PRE_DECODER; if (avctx->sub_charenc_mode == FF_SUB_CHARENC_MODE_PRE_DECODER) { #if CONFIG_ICONV iconv_t cd = iconv_open("UTF-8", avctx->sub_charenc); if (cd == (iconv_t)-1) { av_log(avctx, AV_LOG_ERROR, "Unable to open iconv context " "with input character encoding \"%s\"\n", avctx->sub_charenc); ret = AVERROR(errno); goto free_and_end; } iconv_close(cd); #else av_log(avctx, AV_LOG_ERROR, "Character encoding subtitles " "conversion needs a libavcodec built with iconv support " "for this codec\n"); ret = AVERROR(ENOSYS); goto free_and_end; #endif } } } } end: ff_unlock_avcodec(); if (options) { av_dict_free(options); *options = tmp; } return ret; free_and_end: av_dict_free(&tmp); av_freep(&avctx->priv_data); if (avctx->internal) av_freep(&avctx->internal->pool); av_freep(&avctx->internal); avctx->codec = NULL; goto end; } | 14,948 |
0 | unsigned long av_adler32_update(unsigned long adler, const uint8_t * buf, unsigned int len) { unsigned long s1 = adler & 0xffff; unsigned long s2 = adler >> 16; while (len > 0) { #if CONFIG_SMALL while (len > 4 && s2 < (1U << 31)) { DO4(buf); len -= 4; } #else while (len > 16 && s2 < (1U << 31)) { DO16(buf); len -= 16; } #endif DO1(buf); len--; s1 %= BASE; s2 %= BASE; } return (s2 << 16) | s1; } | 14,949 |
0 | static int mpc_read_seek(AVFormatContext *s, int stream_index, int64_t timestamp, int flags) { AVStream *st = s->streams[stream_index]; MPCContext *c = s->priv_data; AVPacket pkt1, *pkt = &pkt1; int ret; int index = av_index_search_timestamp(st, timestamp - DELAY_FRAMES, flags); uint32_t lastframe; /* if found, seek there */ if (index >= 0){ c->curframe = st->index_entries[index].pos; return 0; } /* if timestamp is out of bounds, return error */ if(timestamp < 0 || timestamp >= c->fcount) return -1; timestamp -= DELAY_FRAMES; /* seek to the furthest known position and read packets until we reach desired position */ lastframe = c->curframe; if(c->frames_noted) c->curframe = c->frames_noted - 1; while(c->curframe < timestamp){ ret = av_read_frame(s, pkt); if (ret < 0){ c->curframe = lastframe; return ret; } av_free_packet(pkt); } return 0; } | 14,950 |
0 | av_cold void ff_gradfun_init_x86(GradFunContext *gf) { int cpu_flags = av_get_cpu_flags(); if (HAVE_MMX2 && cpu_flags & AV_CPU_FLAG_MMX2) gf->filter_line = gradfun_filter_line_mmx2; if (HAVE_SSSE3 && cpu_flags & AV_CPU_FLAG_SSSE3) gf->filter_line = gradfun_filter_line_ssse3; if (HAVE_SSE && cpu_flags & AV_CPU_FLAG_SSE2) gf->blur_line = gradfun_blur_line_sse2; } | 14,952 |
0 | static int ioreq_map(struct ioreq *ioreq) { int gnt = ioreq->blkdev->xendev.gnttabdev; int i; if (ioreq->v.niov == 0) { return 0; } if (batch_maps) { ioreq->pages = xc_gnttab_map_grant_refs (gnt, ioreq->v.niov, ioreq->domids, ioreq->refs, ioreq->prot); if (ioreq->pages == NULL) { xen_be_printf(&ioreq->blkdev->xendev, 0, "can't map %d grant refs (%s, %d maps)\n", ioreq->v.niov, strerror(errno), ioreq->blkdev->cnt_map); return -1; } for (i = 0; i < ioreq->v.niov; i++) { ioreq->v.iov[i].iov_base = ioreq->pages + i * XC_PAGE_SIZE + (uintptr_t)ioreq->v.iov[i].iov_base; } ioreq->blkdev->cnt_map += ioreq->v.niov; } else { for (i = 0; i < ioreq->v.niov; i++) { ioreq->page[i] = xc_gnttab_map_grant_ref (gnt, ioreq->domids[i], ioreq->refs[i], ioreq->prot); if (ioreq->page[i] == NULL) { xen_be_printf(&ioreq->blkdev->xendev, 0, "can't map grant ref %d (%s, %d maps)\n", ioreq->refs[i], strerror(errno), ioreq->blkdev->cnt_map); ioreq_unmap(ioreq); return -1; } ioreq->v.iov[i].iov_base = ioreq->page[i] + (uintptr_t)ioreq->v.iov[i].iov_base; ioreq->blkdev->cnt_map++; } } return 0; } | 14,953 |
0 | static CharDriverState *qemu_chr_open_ringbuf(ChardevRingbuf *opts, Error **errp) { CharDriverState *chr; RingBufCharDriver *d; chr = g_malloc0(sizeof(CharDriverState)); d = g_malloc(sizeof(*d)); d->size = opts->has_size ? opts->size : 65536; /* The size must be power of 2 */ if (d->size & (d->size - 1)) { error_setg(errp, "size of ringbuf chardev must be power of two"); goto fail; } d->prod = 0; d->cons = 0; d->cbuf = g_malloc0(d->size); chr->opaque = d; chr->chr_write = ringbuf_chr_write; chr->chr_close = ringbuf_chr_close; return chr; fail: g_free(d); g_free(chr); return NULL; } | 14,954 |
0 | static void mcf_fec_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { mcf_fec_state *s = (mcf_fec_state *)opaque; switch (addr & 0x3ff) { case 0x004: s->eir &= ~value; break; case 0x008: s->eimr = value; break; case 0x010: /* RDAR */ if ((s->ecr & FEC_EN) && !s->rx_enabled) { DPRINTF("RX enable\n"); mcf_fec_enable_rx(s); } break; case 0x014: /* TDAR */ if (s->ecr & FEC_EN) { mcf_fec_do_tx(s); } break; case 0x024: s->ecr = value; if (value & FEC_RESET) { DPRINTF("Reset\n"); mcf_fec_reset(s); } if ((s->ecr & FEC_EN) == 0) { s->rx_enabled = 0; } break; case 0x040: s->mmfr = value; s->eir |= FEC_INT_MII; break; case 0x044: s->mscr = value & 0xfe; break; case 0x064: /* TODO: Implement MIB. */ break; case 0x084: s->rcr = value & 0x07ff003f; /* TODO: Implement LOOP mode. */ break; case 0x0c4: /* TCR */ /* We transmit immediately, so raise GRA immediately. */ s->tcr = value; if (value & 1) s->eir |= FEC_INT_GRA; break; case 0x0e4: /* PALR */ s->conf.macaddr.a[0] = value >> 24; s->conf.macaddr.a[1] = value >> 16; s->conf.macaddr.a[2] = value >> 8; s->conf.macaddr.a[3] = value; break; case 0x0e8: /* PAUR */ s->conf.macaddr.a[4] = value >> 24; s->conf.macaddr.a[5] = value >> 16; break; case 0x0ec: /* OPD */ break; case 0x118: case 0x11c: case 0x120: case 0x124: /* TODO: implement MAC hash filtering. */ break; case 0x144: s->tfwr = value & 3; break; case 0x14c: /* FRBR writes ignored. */ break; case 0x150: s->rfsr = (value & 0x3fc) | 0x400; break; case 0x180: s->erdsr = value & ~3; s->rx_descriptor = s->erdsr; break; case 0x184: s->etdsr = value & ~3; s->tx_descriptor = s->etdsr; break; case 0x188: s->emrbr = value & 0x7f0; break; default: hw_error("mcf_fec_write Bad address 0x%x\n", (int)addr); } mcf_fec_update(s); } | 14,955 |
0 | static int vmdk_open_vmdk4(BlockDriverState *bs, BlockDriverState *file, int flags) { int ret; uint32_t magic; uint32_t l1_size, l1_entry_sectors; VMDK4Header header; VmdkExtent *extent; int64_t l1_backup_offset = 0; ret = bdrv_pread(file, sizeof(magic), &header, sizeof(header)); if (ret < 0) { return ret; } if (header.capacity == 0) { uint64_t desc_offset = le64_to_cpu(header.desc_offset); if (desc_offset) { return vmdk_open_desc_file(bs, flags, desc_offset << 9); } } if (le64_to_cpu(header.gd_offset) == VMDK4_GD_AT_END) { /* * The footer takes precedence over the header, so read it in. The * footer starts at offset -1024 from the end: One sector for the * footer, and another one for the end-of-stream marker. */ struct { struct { uint64_t val; uint32_t size; uint32_t type; uint8_t pad[512 - 16]; } QEMU_PACKED footer_marker; uint32_t magic; VMDK4Header header; uint8_t pad[512 - 4 - sizeof(VMDK4Header)]; struct { uint64_t val; uint32_t size; uint32_t type; uint8_t pad[512 - 16]; } QEMU_PACKED eos_marker; } QEMU_PACKED footer; ret = bdrv_pread(file, bs->file->total_sectors * 512 - 1536, &footer, sizeof(footer)); if (ret < 0) { return ret; } /* Some sanity checks for the footer */ if (be32_to_cpu(footer.magic) != VMDK4_MAGIC || le32_to_cpu(footer.footer_marker.size) != 0 || le32_to_cpu(footer.footer_marker.type) != MARKER_FOOTER || le64_to_cpu(footer.eos_marker.val) != 0 || le32_to_cpu(footer.eos_marker.size) != 0 || le32_to_cpu(footer.eos_marker.type) != MARKER_END_OF_STREAM) { return -EINVAL; } header = footer.header; } if (le32_to_cpu(header.version) >= 3) { char buf[64]; snprintf(buf, sizeof(buf), "VMDK version %d", le32_to_cpu(header.version)); qerror_report(QERR_UNKNOWN_BLOCK_FORMAT_FEATURE, bs->device_name, "vmdk", buf); return -ENOTSUP; } l1_entry_sectors = le32_to_cpu(header.num_gtes_per_gte) * le64_to_cpu(header.granularity); if (l1_entry_sectors == 0) { return -EINVAL; } l1_size = (le64_to_cpu(header.capacity) + l1_entry_sectors - 1) / l1_entry_sectors; if (le32_to_cpu(header.flags) & VMDK4_FLAG_RGD) { l1_backup_offset = le64_to_cpu(header.rgd_offset) << 9; } extent = vmdk_add_extent(bs, file, false, le64_to_cpu(header.capacity), le64_to_cpu(header.gd_offset) << 9, l1_backup_offset, l1_size, le32_to_cpu(header.num_gtes_per_gte), le64_to_cpu(header.granularity)); extent->compressed = le16_to_cpu(header.compressAlgorithm) == VMDK4_COMPRESSION_DEFLATE; extent->has_marker = le32_to_cpu(header.flags) & VMDK4_FLAG_MARKER; extent->version = le32_to_cpu(header.version); extent->has_zero_grain = le32_to_cpu(header.flags) & VMDK4_FLAG_ZERO_GRAIN; ret = vmdk_init_tables(bs, extent); if (ret) { /* free extent allocated by vmdk_add_extent */ vmdk_free_last_extent(bs); } return ret; } | 14,956 |
0 | int bdrv_write_zeroes(BlockDriverState *bs, int64_t sector_num, int nb_sectors, BdrvRequestFlags flags) { return bdrv_rw_co(bs, sector_num, NULL, nb_sectors, true, BDRV_REQ_ZERO_WRITE | flags); } | 14,957 |
0 | static char *usb_get_fw_dev_path(DeviceState *qdev) { USBDevice *dev = DO_UPCAST(USBDevice, qdev, qdev); char *fw_path, *in; int pos = 0; long nr; fw_path = qemu_malloc(32 + strlen(dev->port->path) * 6); in = dev->port->path; while (true) { nr = strtol(in, &in, 10); if (in[0] == '.') { /* some hub between root port and device */ pos += sprintf(fw_path + pos, "hub@%ld/", nr); in++; } else { /* the device itself */ pos += sprintf(fw_path + pos, "%s@%ld", qdev_fw_name(qdev), nr); break; } } return fw_path; } | 14,959 |
0 | static void arm_sysctl_write(void *opaque, target_phys_addr_t offset, uint64_t val, unsigned size) { arm_sysctl_state *s = (arm_sysctl_state *)opaque; switch (offset) { case 0x08: /* LED */ s->leds = val; case 0x0c: /* OSC0 */ case 0x10: /* OSC1 */ case 0x14: /* OSC2 */ case 0x18: /* OSC3 */ case 0x1c: /* OSC4 */ /* ??? */ break; case 0x20: /* LOCK */ if (val == LOCK_VALUE) s->lockval = val; else s->lockval = val & 0x7fff; break; case 0x28: /* CFGDATA1 */ /* ??? Need to implement this. */ s->cfgdata1 = val; break; case 0x2c: /* CFGDATA2 */ /* ??? Need to implement this. */ s->cfgdata2 = val; break; case 0x30: /* FLAGSSET */ s->flags |= val; break; case 0x34: /* FLAGSCLR */ s->flags &= ~val; break; case 0x38: /* NVFLAGSSET */ s->nvflags |= val; break; case 0x3c: /* NVFLAGSCLR */ s->nvflags &= ~val; break; case 0x40: /* RESETCTL */ switch (board_id(s)) { case BOARD_ID_PB926: if (s->lockval == LOCK_VALUE) { s->resetlevel = val; if (val & 0x100) { qemu_system_reset_request(); } } break; case BOARD_ID_PBX: case BOARD_ID_PBA8: if (s->lockval == LOCK_VALUE) { s->resetlevel = val; if (val & 0x04) { qemu_system_reset_request(); } } break; case BOARD_ID_VEXPRESS: case BOARD_ID_EB: default: /* reserved: RAZ/WI */ break; } break; case 0x44: /* PCICTL */ /* nothing to do. */ break; case 0x4c: /* FLASH */ break; case 0x50: /* CLCD */ switch (board_id(s)) { case BOARD_ID_PB926: /* On 926 bits 13:8 are R/O, bits 1:0 control * the mux that defines how to interpret the PL110 * graphics format, and other bits are r/w but we * don't implement them to do anything. */ s->sys_clcd &= 0x3f00; s->sys_clcd |= val & ~0x3f00; qemu_set_irq(s->pl110_mux_ctrl, val & 3); break; case BOARD_ID_EB: /* The EB is the same except that there is no mux since * the EB has a PL111. */ s->sys_clcd &= 0x3f00; s->sys_clcd |= val & ~0x3f00; break; case BOARD_ID_PBA8: case BOARD_ID_PBX: /* On PBA8 and PBX bit 7 is r/w and all other bits * are either r/o or RAZ/WI. */ s->sys_clcd &= (1 << 7); s->sys_clcd |= val & ~(1 << 7); break; case BOARD_ID_VEXPRESS: default: /* On VExpress this register is unimplemented and will RAZ/WI */ break; } case 0x54: /* CLCDSER */ case 0x64: /* DMAPSR0 */ case 0x68: /* DMAPSR1 */ case 0x6c: /* DMAPSR2 */ case 0x70: /* IOSEL */ case 0x74: /* PLDCTL */ case 0x80: /* BUSID */ case 0x84: /* PROCID0 */ case 0x88: /* PROCID1 */ case 0x8c: /* OSCRESET0 */ case 0x90: /* OSCRESET1 */ case 0x94: /* OSCRESET2 */ case 0x98: /* OSCRESET3 */ case 0x9c: /* OSCRESET4 */ break; case 0xa0: /* SYS_CFGDATA */ if (board_id(s) != BOARD_ID_VEXPRESS) { goto bad_reg; } s->sys_cfgdata = val; return; case 0xa4: /* SYS_CFGCTRL */ if (board_id(s) != BOARD_ID_VEXPRESS) { goto bad_reg; } s->sys_cfgctrl = val & ~(3 << 18); s->sys_cfgstat = 1; /* complete */ switch (s->sys_cfgctrl) { case 0xc0800000: /* SYS_CFG_SHUTDOWN to motherboard */ qemu_system_shutdown_request(); break; case 0xc0900000: /* SYS_CFG_REBOOT to motherboard */ qemu_system_reset_request(); break; default: s->sys_cfgstat |= 2; /* error */ } return; case 0xa8: /* SYS_CFGSTAT */ if (board_id(s) != BOARD_ID_VEXPRESS) { goto bad_reg; } s->sys_cfgstat = val & 3; return; default: bad_reg: printf ("arm_sysctl_write: Bad register offset 0x%x\n", (int)offset); return; } } | 14,960 |
0 | uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, uint32_t type) { const uintptr_t ra = GETPC(); const uint8_t mod = env->regs[0] & 0x80ULL; const uint8_t fc = env->regs[0] & 0x7fULL; CPUState *cs = CPU(s390_env_get_cpu(env)); uint8_t subfunc[16] = { 0 }; uint64_t param_addr; int i; switch (type) { case S390_FEAT_TYPE_KMAC: case S390_FEAT_TYPE_KIMD: case S390_FEAT_TYPE_KLMD: case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { cpu_restore_state(cs, ra); program_interrupt(env, PGM_SPECIFICATION, 4); return 0; } break; } s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { cpu_restore_state(cs, ra); program_interrupt(env, PGM_SPECIFICATION, 4); return 0; } switch (fc) { case 0: /* query subfunction */ for (i = 0; i < 16; i++) { param_addr = wrap_address(env, env->regs[1] + i); cpu_stb_data_ra(env, param_addr, subfunc[i], ra); } break; default: /* we don't implement any other subfunction yet */ g_assert_not_reached(); } return 0; } | 14,961 |
0 | void usb_desc_attach(USBDevice *dev) { const USBDesc *desc = usb_device_get_usb_desc(dev); assert(desc != NULL); if (desc->super && (dev->port->speedmask & USB_SPEED_MASK_SUPER)) { dev->speed = USB_SPEED_SUPER; } else if (desc->high && (dev->port->speedmask & USB_SPEED_MASK_HIGH)) { dev->speed = USB_SPEED_HIGH; } else if (desc->full && (dev->port->speedmask & USB_SPEED_MASK_FULL)) { dev->speed = USB_SPEED_FULL; } else { return; } usb_desc_setdefaults(dev); } | 14,964 |
0 | void register_displaychangelistener(DisplayChangeListener *dcl) { static DisplaySurface *dummy; QemuConsole *con; trace_displaychangelistener_register(dcl, dcl->ops->dpy_name); dcl->ds = get_alloc_displaystate(); QLIST_INSERT_HEAD(&dcl->ds->listeners, dcl, next); gui_setup_refresh(dcl->ds); if (dcl->con) { dcl->con->dcls++; con = dcl->con; } else { con = active_console; } if (dcl->ops->dpy_gfx_switch) { if (con) { dcl->ops->dpy_gfx_switch(dcl, con->surface); } else { if (!dummy) { dummy = qemu_create_dummy_surface(); } dcl->ops->dpy_gfx_switch(dcl, dummy); } } } | 14,966 |
0 | void bdrv_set_io_limits(BlockDriverState *bs, ThrottleConfig *cfg) { int i; throttle_config(&bs->throttle_state, cfg); for (i = 0; i < 2; i++) { qemu_co_enter_next(&bs->throttled_reqs[i]); } } | 14,967 |
0 | void s390_init_cpus(MachineState *machine) { int i; gchar *name; if (machine->cpu_model == NULL) { machine->cpu_model = "host"; } cpu_states = g_malloc0(sizeof(S390CPU *) * max_cpus); for (i = 0; i < max_cpus; i++) { name = g_strdup_printf("cpu[%i]", i); object_property_add_link(OBJECT(machine), name, TYPE_S390_CPU, (Object **) &cpu_states[i], object_property_allow_set_link, OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); g_free(name); } for (i = 0; i < smp_cpus; i++) { cpu_s390x_init(machine->cpu_model); } } | 14,969 |
0 | static int qemu_rbd_create(const char *filename, QEMUOptionParameter *options) { int64_t bytes = 0; int64_t objsize; int obj_order = 0; char pool[RBD_MAX_POOL_NAME_SIZE]; char name[RBD_MAX_IMAGE_NAME_SIZE]; char snap_buf[RBD_MAX_SNAP_NAME_SIZE]; char conf[RBD_MAX_CONF_SIZE]; rados_t cluster; rados_ioctx_t io_ctx; int ret; if (qemu_rbd_parsename(filename, pool, sizeof(pool), snap_buf, sizeof(snap_buf), name, sizeof(name), conf, sizeof(conf)) < 0) { return -EINVAL; } /* Read out options */ while (options && options->name) { if (!strcmp(options->name, BLOCK_OPT_SIZE)) { bytes = options->value.n; } else if (!strcmp(options->name, BLOCK_OPT_CLUSTER_SIZE)) { if (options->value.n) { objsize = options->value.n; if ((objsize - 1) & objsize) { /* not a power of 2? */ error_report("obj size needs to be power of 2"); return -EINVAL; } if (objsize < 4096) { error_report("obj size too small"); return -EINVAL; } obj_order = ffs(objsize) - 1; } } options++; } if (rados_create(&cluster, NULL) < 0) { error_report("error initializing"); return -EIO; } if (strstr(conf, "conf=") == NULL) { if (rados_conf_read_file(cluster, NULL) < 0) { error_report("error reading config file"); rados_shutdown(cluster); return -EIO; } } if (conf[0] != '\0' && qemu_rbd_set_conf(cluster, conf) < 0) { error_report("error setting config options"); rados_shutdown(cluster); return -EIO; } if (rados_connect(cluster) < 0) { error_report("error connecting"); rados_shutdown(cluster); return -EIO; } if (rados_ioctx_create(cluster, pool, &io_ctx) < 0) { error_report("error opening pool %s", pool); rados_shutdown(cluster); return -EIO; } ret = rbd_create(io_ctx, name, bytes, &obj_order); rados_ioctx_destroy(io_ctx); rados_shutdown(cluster); return ret; } | 14,970 |
0 | static void init_proc_401x2 (CPUPPCState *env) { } | 14,972 |
0 | static int check_pow_970FX (CPUPPCState *env) { if (env->spr[SPR_HID0] & 0x00600000) return 1; return 0; } | 14,973 |
0 | int ff_listen_bind(int fd, const struct sockaddr *addr, socklen_t addrlen, int timeout) { int ret; int reuse = 1; struct pollfd lp = { fd, POLLIN, 0 }; setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &reuse, sizeof(reuse)); ret = bind(fd, addr, addrlen); if (ret) return ff_neterrno(); ret = listen(fd, 1); if (ret) return ff_neterrno(); ret = poll(&lp, 1, timeout >= 0 ? timeout : -1); if (ret <= 0) return AVERROR(ETIMEDOUT); ret = accept(fd, NULL, NULL); if (ret < 0) return ff_neterrno(); closesocket(fd); ff_socket_nonblock(ret, 1); return ret; } | 14,974 |
0 | void qmp_x_blockdev_insert_medium(const char *device, const char *node_name, Error **errp) { BlockDriverState *bs; bs = bdrv_find_node(node_name); if (!bs) { error_setg(errp, "Node '%s' not found", node_name); return; } if (bs->blk) { error_setg(errp, "Node '%s' is already in use by '%s'", node_name, blk_name(bs->blk)); return; } qmp_blockdev_insert_anon_medium(device, bs, errp); } | 14,975 |
0 | int bdrv_pwritev(BlockDriverState *bs, int64_t offset, QEMUIOVector *qiov) { int ret; ret = bdrv_prwv_co(bs, offset, qiov, true, 0); if (ret < 0) { return ret; } return qiov->size; } | 14,977 |
0 | void qemu_input_event_send(QemuConsole *src, InputEvent *evt) { QemuInputHandlerState *s; if (!runstate_is_running() && !runstate_check(RUN_STATE_SUSPENDED)) { return; } qemu_input_event_trace(src, evt); /* pre processing */ if (graphic_rotate && (evt->type == INPUT_EVENT_KIND_ABS)) { qemu_input_transform_abs_rotate(evt); } /* send event */ s = qemu_input_find_handler(1 << evt->type, src); if (!s) { return; } s->handler->event(s->dev, src, evt); s->events++; } | 14,978 |
0 | static void omap_wd_timer_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size) { struct omap_watchdog_timer_s *s = (struct omap_watchdog_timer_s *) opaque; if (size != 2) { return omap_badwidth_write16(opaque, addr, value); } switch (addr) { case 0x00: /* CNTL_TIMER */ omap_timer_sync(&s->timer); s->timer.ptv = (value >> 9) & 7; s->timer.ar = (value >> 8) & 1; s->timer.st = (value >> 7) & 1; s->free = (value >> 1) & 1; omap_timer_update(&s->timer); break; case 0x04: /* LOAD_TIMER */ s->timer.reset_val = value & 0xffff; break; case 0x08: /* TIMER_MODE */ if (!s->mode && ((value >> 15) & 1)) omap_clk_get(s->timer.clk); s->mode |= (value >> 15) & 1; if (s->last_wr == 0xf5) { if ((value & 0xff) == 0xa0) { if (s->mode) { s->mode = 0; omap_clk_put(s->timer.clk); } } else { /* XXX: on T|E hardware somehow this has no effect, * on Zire 71 it works as specified. */ s->reset = 1; qemu_system_reset_request(); } } s->last_wr = value & 0xff; break; default: OMAP_BAD_REG(addr); } } | 14,979 |
0 | static void nested_struct_compare(UserDefNested *udnp1, UserDefNested *udnp2) { g_assert(udnp1); g_assert(udnp2); g_assert_cmpstr(udnp1->string0, ==, udnp2->string0); g_assert_cmpstr(udnp1->dict1.string1, ==, udnp2->dict1.string1); g_assert_cmpint(udnp1->dict1.dict2.userdef1->base->integer, ==, udnp2->dict1.dict2.userdef1->base->integer); g_assert_cmpstr(udnp1->dict1.dict2.userdef1->string, ==, udnp2->dict1.dict2.userdef1->string); g_assert_cmpstr(udnp1->dict1.dict2.string2, ==, udnp2->dict1.dict2.string2); g_assert(udnp1->dict1.has_dict3 == udnp2->dict1.has_dict3); g_assert_cmpint(udnp1->dict1.dict3.userdef2->base->integer, ==, udnp2->dict1.dict3.userdef2->base->integer); g_assert_cmpstr(udnp1->dict1.dict3.userdef2->string, ==, udnp2->dict1.dict3.userdef2->string); g_assert_cmpstr(udnp1->dict1.dict3.string3, ==, udnp2->dict1.dict3.string3); } | 14,981 |
0 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); S390CPUClass *scc = S390_CPU_GET_CLASS(dev); S390CPU *cpu = S390_CPU(dev); CPUS390XState *env = &cpu->env; Error *err = NULL; cpu_exec_init(cs, &err); if (err != NULL) { error_propagate(errp, err); return; } #if !defined(CONFIG_USER_ONLY) qemu_register_reset(s390_cpu_machine_reset_cb, cpu); #endif env->cpu_num = scc->next_cpu_id++; s390_cpu_gdb_init(cs); qemu_init_vcpu(cs); #if !defined(CONFIG_USER_ONLY) run_on_cpu(cs, s390_do_cpu_full_reset, cs); #else cpu_reset(cs); #endif scc->parent_realize(dev, errp); } | 14,983 |
0 | static uint64_t musicpal_lcd_read(void *opaque, target_phys_addr_t offset, unsigned size) { musicpal_lcd_state *s = opaque; switch (offset) { case MP_LCD_IRQCTRL: return s->irqctrl; default: return 0; } } | 14,984 |
0 | static void cmd_seek(IDEState *s, uint8_t* buf) { unsigned int lba; uint64_t total_sectors = s->nb_sectors >> 2; if (total_sectors == 0) { ide_atapi_cmd_error(s, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT); return; } lba = ube32_to_cpu(buf + 2); if (lba >= total_sectors) { ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR); return; } ide_atapi_cmd_ok(s); } | 14,986 |
0 | static void test_visitor_in_alternate(TestInputVisitorData *data, const void *unused) { Visitor *v; Error *err = NULL; UserDefAlternate *tmp; WrapAlternate *wrap; v = visitor_input_test_init(data, "42"); visit_type_UserDefAlternate(v, NULL, &tmp, &error_abort); g_assert_cmpint(tmp->type, ==, QTYPE_QINT); g_assert_cmpint(tmp->u.i, ==, 42); qapi_free_UserDefAlternate(tmp); v = visitor_input_test_init(data, "'string'"); visit_type_UserDefAlternate(v, NULL, &tmp, &error_abort); g_assert_cmpint(tmp->type, ==, QTYPE_QSTRING); g_assert_cmpstr(tmp->u.s, ==, "string"); qapi_free_UserDefAlternate(tmp); v = visitor_input_test_init(data, "{'integer':1, 'string':'str', " "'enum1':'value1', 'boolean':true}"); visit_type_UserDefAlternate(v, NULL, &tmp, &error_abort); g_assert_cmpint(tmp->type, ==, QTYPE_QDICT); g_assert_cmpint(tmp->u.udfu->integer, ==, 1); g_assert_cmpstr(tmp->u.udfu->string, ==, "str"); g_assert_cmpint(tmp->u.udfu->enum1, ==, ENUM_ONE_VALUE1); g_assert_cmpint(tmp->u.udfu->u.value1->boolean, ==, true); g_assert_cmpint(tmp->u.udfu->u.value1->has_a_b, ==, false); qapi_free_UserDefAlternate(tmp); v = visitor_input_test_init(data, "false"); visit_type_UserDefAlternate(v, NULL, &tmp, &err); error_free_or_abort(&err); qapi_free_UserDefAlternate(tmp); v = visitor_input_test_init(data, "{ 'alt': 42 }"); visit_type_WrapAlternate(v, NULL, &wrap, &error_abort); g_assert_cmpint(wrap->alt->type, ==, QTYPE_QINT); g_assert_cmpint(wrap->alt->u.i, ==, 42); qapi_free_WrapAlternate(wrap); v = visitor_input_test_init(data, "{ 'alt': 'string' }"); visit_type_WrapAlternate(v, NULL, &wrap, &error_abort); g_assert_cmpint(wrap->alt->type, ==, QTYPE_QSTRING); g_assert_cmpstr(wrap->alt->u.s, ==, "string"); qapi_free_WrapAlternate(wrap); v = visitor_input_test_init(data, "{ 'alt': {'integer':1, 'string':'str', " "'enum1':'value1', 'boolean':true} }"); visit_type_WrapAlternate(v, NULL, &wrap, &error_abort); g_assert_cmpint(wrap->alt->type, ==, QTYPE_QDICT); g_assert_cmpint(wrap->alt->u.udfu->integer, ==, 1); g_assert_cmpstr(wrap->alt->u.udfu->string, ==, "str"); g_assert_cmpint(wrap->alt->u.udfu->enum1, ==, ENUM_ONE_VALUE1); g_assert_cmpint(wrap->alt->u.udfu->u.value1->boolean, ==, true); g_assert_cmpint(wrap->alt->u.udfu->u.value1->has_a_b, ==, false); qapi_free_WrapAlternate(wrap); } | 14,987 |
0 | static int hls_read_header(AVFormatContext *s) { void *u = (s->flags & AVFMT_FLAG_CUSTOM_IO) ? NULL : s->pb; HLSContext *c = s->priv_data; int ret = 0, i; int highest_cur_seq_no = 0; c->ctx = s; c->interrupt_callback = &s->interrupt_callback; c->strict_std_compliance = s->strict_std_compliance; c->first_packet = 1; c->first_timestamp = AV_NOPTS_VALUE; c->cur_timestamp = AV_NOPTS_VALUE; if (u) { // get the previous user agent & set back to null if string size is zero update_options(&c->user_agent, "user-agent", u); // get the previous cookies & set back to null if string size is zero update_options(&c->cookies, "cookies", u); // get the previous headers & set back to null if string size is zero update_options(&c->headers, "headers", u); // get the previous http proxt & set back to null if string size is zero update_options(&c->http_proxy, "http_proxy", u); } if ((ret = parse_playlist(c, s->filename, NULL, s->pb)) < 0) goto fail; if ((ret = save_avio_options(s)) < 0) goto fail; /* Some HLS servers don't like being sent the range header */ av_dict_set(&c->avio_opts, "seekable", "0", 0); if (c->n_variants == 0) { av_log(NULL, AV_LOG_WARNING, "Empty playlist\n"); ret = AVERROR_EOF; goto fail; } /* If the playlist only contained playlists (Master Playlist), * parse each individual playlist. */ if (c->n_playlists > 1 || c->playlists[0]->n_segments == 0) { for (i = 0; i < c->n_playlists; i++) { struct playlist *pls = c->playlists[i]; if ((ret = parse_playlist(c, pls->url, pls, NULL)) < 0) goto fail; } } if (c->variants[0]->playlists[0]->n_segments == 0) { av_log(NULL, AV_LOG_WARNING, "Empty playlist\n"); ret = AVERROR_EOF; goto fail; } /* If this isn't a live stream, calculate the total duration of the * stream. */ if (c->variants[0]->playlists[0]->finished) { int64_t duration = 0; for (i = 0; i < c->variants[0]->playlists[0]->n_segments; i++) duration += c->variants[0]->playlists[0]->segments[i]->duration; s->duration = duration; } /* Associate renditions with variants */ for (i = 0; i < c->n_variants; i++) { struct variant *var = c->variants[i]; if (var->audio_group[0]) add_renditions_to_variant(c, var, AVMEDIA_TYPE_AUDIO, var->audio_group); if (var->video_group[0]) add_renditions_to_variant(c, var, AVMEDIA_TYPE_VIDEO, var->video_group); if (var->subtitles_group[0]) add_renditions_to_variant(c, var, AVMEDIA_TYPE_SUBTITLE, var->subtitles_group); } /* Create a program for each variant */ for (i = 0; i < c->n_variants; i++) { struct variant *v = c->variants[i]; AVProgram *program; program = av_new_program(s, i); if (!program) goto fail; av_dict_set_int(&program->metadata, "variant_bitrate", v->bandwidth, 0); } /* Select the starting segments */ for (i = 0; i < c->n_playlists; i++) { struct playlist *pls = c->playlists[i]; if (pls->n_segments == 0) continue; pls->cur_seq_no = select_cur_seq_no(c, pls); highest_cur_seq_no = FFMAX(highest_cur_seq_no, pls->cur_seq_no); } /* Open the demuxer for each playlist */ for (i = 0; i < c->n_playlists; i++) { struct playlist *pls = c->playlists[i]; AVInputFormat *in_fmt = NULL; if (!(pls->ctx = avformat_alloc_context())) { ret = AVERROR(ENOMEM); goto fail; } if (pls->n_segments == 0) continue; pls->index = i; pls->needed = 1; pls->parent = s; /* * If this is a live stream and this playlist looks like it is one segment * behind, try to sync it up so that every substream starts at the same * time position (so e.g. avformat_find_stream_info() will see packets from * all active streams within the first few seconds). This is not very generic, * though, as the sequence numbers are technically independent. */ if (!pls->finished && pls->cur_seq_no == highest_cur_seq_no - 1 && highest_cur_seq_no < pls->start_seq_no + pls->n_segments) { pls->cur_seq_no = highest_cur_seq_no; } pls->read_buffer = av_malloc(INITIAL_BUFFER_SIZE); if (!pls->read_buffer){ ret = AVERROR(ENOMEM); avformat_free_context(pls->ctx); pls->ctx = NULL; goto fail; } ffio_init_context(&pls->pb, pls->read_buffer, INITIAL_BUFFER_SIZE, 0, pls, read_data, NULL, NULL); pls->pb.seekable = 0; ret = av_probe_input_buffer(&pls->pb, &in_fmt, pls->segments[0]->url, NULL, 0, 0); if (ret < 0) { /* Free the ctx - it isn't initialized properly at this point, * so avformat_close_input shouldn't be called. If * avformat_open_input fails below, it frees and zeros the * context, so it doesn't need any special treatment like this. */ av_log(s, AV_LOG_ERROR, "Error when loading first segment '%s'\n", pls->segments[0]->url); avformat_free_context(pls->ctx); pls->ctx = NULL; goto fail; } pls->ctx->pb = &pls->pb; pls->ctx->io_open = nested_io_open; if ((ret = ff_copy_whiteblacklists(pls->ctx, s)) < 0) goto fail; ret = avformat_open_input(&pls->ctx, pls->segments[0]->url, in_fmt, NULL); if (ret < 0) goto fail; if (pls->id3_deferred_extra && pls->ctx->nb_streams == 1) { ff_id3v2_parse_apic(pls->ctx, &pls->id3_deferred_extra); avformat_queue_attached_pictures(pls->ctx); ff_id3v2_free_extra_meta(&pls->id3_deferred_extra); pls->id3_deferred_extra = NULL; } pls->ctx->ctx_flags &= ~AVFMTCTX_NOHEADER; ret = avformat_find_stream_info(pls->ctx, NULL); if (ret < 0) goto fail; if (pls->is_id3_timestamped == -1) av_log(s, AV_LOG_WARNING, "No expected HTTP requests have been made\n"); /* Create new AVStreams for each stream in this playlist */ ret = update_streams_from_subdemuxer(s, pls); if (ret < 0) goto fail; add_metadata_from_renditions(s, pls, AVMEDIA_TYPE_AUDIO); add_metadata_from_renditions(s, pls, AVMEDIA_TYPE_VIDEO); add_metadata_from_renditions(s, pls, AVMEDIA_TYPE_SUBTITLE); } return 0; fail: free_playlist_list(c); free_variant_list(c); free_rendition_list(c); return ret; } | 14,989 |
1 | void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn) { spapr_hcall_fn old_fn; assert(opcode <= MAX_HCALL_OPCODE); assert((opcode & 0x3) == 0); old_fn = hypercall_table[opcode / 4]; assert(!old_fn || (fn == old_fn)); hypercall_table[opcode / 4] = fn; } | 14,990 |
1 | static av_cold int init_subtitles(AVFilterContext *ctx, const char *args) { int ret, sid; AVFormatContext *fmt = NULL; AVCodecContext *dec_ctx = NULL; AVCodec *dec = NULL; AVStream *st; AVPacket pkt; AssContext *ass = ctx->priv; /* Init libass */ ret = init(ctx, args, &subtitles_class); if (ret < 0) return ret; ass->track = ass_new_track(ass->library); if (!ass->track) { av_log(ctx, AV_LOG_ERROR, "Could not create a libass track\n"); return AVERROR(EINVAL); } /* Open subtitles file */ ret = avformat_open_input(&fmt, ass->filename, NULL, NULL); if (ret < 0) { av_log(ctx, AV_LOG_ERROR, "Unable to open %s\n", ass->filename); goto end; } ret = avformat_find_stream_info(fmt, NULL); if (ret < 0) goto end; /* Locate subtitles stream */ ret = av_find_best_stream(fmt, AVMEDIA_TYPE_SUBTITLE, -1, -1, NULL, 0); if (ret < 0) { av_log(ctx, AV_LOG_ERROR, "Unable to locate subtitle stream in %s\n", ass->filename); goto end; } sid = ret; st = fmt->streams[sid]; /* Open decoder */ dec_ctx = st->codec; dec = avcodec_find_decoder(dec_ctx->codec_id); if (!dec) { av_log(ctx, AV_LOG_ERROR, "Failed to find subtitle codec %s\n", avcodec_get_name(dec_ctx->codec_id)); return AVERROR(EINVAL); } ret = avcodec_open2(dec_ctx, dec, NULL); if (ret < 0) goto end; /* Decode subtitles and push them into the renderer (libass) */ if (dec_ctx->subtitle_header) ass_process_codec_private(ass->track, dec_ctx->subtitle_header, dec_ctx->subtitle_header_size); av_init_packet(&pkt); pkt.data = NULL; pkt.size = 0; while (av_read_frame(fmt, &pkt) >= 0) { int i, got_subtitle; AVSubtitle sub; if (pkt.stream_index == sid) { ret = avcodec_decode_subtitle2(dec_ctx, &sub, &got_subtitle, &pkt); if (ret < 0 || !got_subtitle) break; for (i = 0; i < sub.num_rects; i++) { char *ass_line = sub.rects[i]->ass; if (!ass_line) break; ass_process_data(ass->track, ass_line, strlen(ass_line)); } } av_free_packet(&pkt); avsubtitle_free(&sub); } end: if (fmt) avformat_close_input(&fmt); if (dec_ctx) avcodec_close(dec_ctx); return ret; } | 14,991 |
1 | static void start_ahci_device(AHCIQState *ahci) { /* Map AHCI's ABAR (BAR5) */ ahci->hba_base = qpci_iomap(ahci->dev, 5, &ahci->barsize); /* turns on pci.cmd.iose, pci.cmd.mse and pci.cmd.bme */ qpci_device_enable(ahci->dev); } | 14,992 |
1 | static void rv30_loop_filter(RV34DecContext *r, int row) { MpegEncContext *s = &r->s; int mb_pos, mb_x; int i, j, k; uint8_t *Y, *C; int loc_lim, cur_lim, left_lim = 0, top_lim = 0; mb_pos = row * s->mb_stride; for(mb_x = 0; mb_x < s->mb_width; mb_x++, mb_pos++){ int mbtype = s->current_picture_ptr->mb_type[mb_pos]; if(IS_INTRA(mbtype) || IS_SEPARATE_DC(mbtype)) r->deblock_coefs[mb_pos] = 0xFFFF; if(IS_INTRA(mbtype)) r->cbp_chroma[mb_pos] = 0xFF; } /* all vertical edges are filtered first * and horizontal edges are filtered on the next iteration */ mb_pos = row * s->mb_stride; for(mb_x = 0; mb_x < s->mb_width; mb_x++, mb_pos++){ cur_lim = rv30_loop_filt_lim[s->current_picture_ptr->qscale_table[mb_pos]]; if(mb_x) left_lim = rv30_loop_filt_lim[s->current_picture_ptr->qscale_table[mb_pos - 1]]; for(j = 0; j < 16; j += 4){ Y = s->current_picture_ptr->f.data[0] + mb_x*16 + (row*16 + j) * s->linesize + 4 * !mb_x; for(i = !mb_x; i < 4; i++, Y += 4){ int ij = i + j; loc_lim = 0; if(r->deblock_coefs[mb_pos] & (1 << ij)) loc_lim = cur_lim; else if(!i && r->deblock_coefs[mb_pos - 1] & (1 << (ij + 3))) loc_lim = left_lim; else if( i && r->deblock_coefs[mb_pos] & (1 << (ij - 1))) loc_lim = cur_lim; if(loc_lim) rv30_weak_loop_filter(Y, 1, s->linesize, loc_lim); } } for(k = 0; k < 2; k++){ int cur_cbp, left_cbp = 0; cur_cbp = (r->cbp_chroma[mb_pos] >> (k*4)) & 0xF; if(mb_x) left_cbp = (r->cbp_chroma[mb_pos - 1] >> (k*4)) & 0xF; for(j = 0; j < 8; j += 4){ C = s->current_picture_ptr->f.data[k + 1] + mb_x*8 + (row*8 + j) * s->uvlinesize + 4 * !mb_x; for(i = !mb_x; i < 2; i++, C += 4){ int ij = i + (j >> 1); loc_lim = 0; if (cur_cbp & (1 << ij)) loc_lim = cur_lim; else if(!i && left_cbp & (1 << (ij + 1))) loc_lim = left_lim; else if( i && cur_cbp & (1 << (ij - 1))) loc_lim = cur_lim; if(loc_lim) rv30_weak_loop_filter(C, 1, s->uvlinesize, loc_lim); } } } } mb_pos = row * s->mb_stride; for(mb_x = 0; mb_x < s->mb_width; mb_x++, mb_pos++){ cur_lim = rv30_loop_filt_lim[s->current_picture_ptr->qscale_table[mb_pos]]; if(row) top_lim = rv30_loop_filt_lim[s->current_picture_ptr->qscale_table[mb_pos - s->mb_stride]]; for(j = 4*!row; j < 16; j += 4){ Y = s->current_picture_ptr->f.data[0] + mb_x*16 + (row*16 + j) * s->linesize; for(i = 0; i < 4; i++, Y += 4){ int ij = i + j; loc_lim = 0; if(r->deblock_coefs[mb_pos] & (1 << ij)) loc_lim = cur_lim; else if(!j && r->deblock_coefs[mb_pos - s->mb_stride] & (1 << (ij + 12))) loc_lim = top_lim; else if( j && r->deblock_coefs[mb_pos] & (1 << (ij - 4))) loc_lim = cur_lim; if(loc_lim) rv30_weak_loop_filter(Y, s->linesize, 1, loc_lim); } } for(k = 0; k < 2; k++){ int cur_cbp, top_cbp = 0; cur_cbp = (r->cbp_chroma[mb_pos] >> (k*4)) & 0xF; if(row) top_cbp = (r->cbp_chroma[mb_pos - s->mb_stride] >> (k*4)) & 0xF; for(j = 4*!row; j < 8; j += 4){ C = s->current_picture_ptr->f.data[k+1] + mb_x*8 + (row*8 + j) * s->uvlinesize; for(i = 0; i < 2; i++, C += 4){ int ij = i + (j >> 1); loc_lim = 0; if (r->cbp_chroma[mb_pos] & (1 << ij)) loc_lim = cur_lim; else if(!j && top_cbp & (1 << (ij + 2))) loc_lim = top_lim; else if( j && cur_cbp & (1 << (ij - 2))) loc_lim = cur_lim; if(loc_lim) rv30_weak_loop_filter(C, s->uvlinesize, 1, loc_lim); } } } } } | 14,993 |
1 | static void alac_linear_predictor(AlacEncodeContext *s, int ch) { int i; LPCContext lpc = s->lpc[ch]; if(lpc.lpc_order == 31) { s->predictor_buf[0] = s->sample_buf[ch][0]; for(i=1; i<s->avctx->frame_size; i++) s->predictor_buf[i] = s->sample_buf[ch][i] - s->sample_buf[ch][i-1]; return; } // generalised linear predictor if(lpc.lpc_order > 0) { int32_t *samples = s->sample_buf[ch]; int32_t *residual = s->predictor_buf; // generate warm-up samples residual[0] = samples[0]; for(i=1;i<=lpc.lpc_order;i++) residual[i] = samples[i] - samples[i-1]; // perform lpc on remaining samples for(i = lpc.lpc_order + 1; i < s->avctx->frame_size; i++) { int sum = 1 << (lpc.lpc_quant - 1), res_val, j; for (j = 0; j < lpc.lpc_order; j++) { sum += (samples[lpc.lpc_order-j] - samples[0]) * lpc.lpc_coeff[j]; } sum >>= lpc.lpc_quant; sum += samples[0]; residual[i] = samples[lpc.lpc_order+1] - sum; res_val = residual[i]; if(res_val) { int index = lpc.lpc_order - 1; int neg = (res_val < 0); while(index >= 0 && (neg ? (res_val < 0):(res_val > 0))) { int val = samples[0] - samples[lpc.lpc_order - index]; int sign = (val ? FFSIGN(val) : 0); if(neg) sign*=-1; lpc.lpc_coeff[index] -= sign; val *= sign; res_val -= ((val >> lpc.lpc_quant) * (lpc.lpc_order - index)); index--; } } samples++; } } } | 14,994 |
1 | static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx) { int rs, rt, rd, sa; uint32_t op1, op2; rs = (ctx->opcode >> 21) & 0x1f; rt = (ctx->opcode >> 16) & 0x1f; rd = (ctx->opcode >> 11) & 0x1f; sa = (ctx->opcode >> 6) & 0x1f; op1 = MASK_SPECIAL3(ctx->opcode); case OPC_EXT: case OPC_INS: check_insn(ctx, ISA_MIPS32R2); gen_bitops(ctx, op1, rt, rs, sa, rd); break; case OPC_BSHFL: op2 = MASK_BSHFL(ctx->opcode); switch (op2) { case OPC_ALIGN ... OPC_ALIGN_END: case OPC_BITSWAP: check_insn(ctx, ISA_MIPS32R6); decode_opc_special3_r6(env, ctx); break; default: check_insn(ctx, ISA_MIPS32R2); gen_bshfl(ctx, op2, rt, rd); break; break; #if defined(TARGET_MIPS64) case OPC_DEXTM ... OPC_DEXT: case OPC_DINSM ... OPC_DINS: check_insn(ctx, ISA_MIPS64R2); check_mips_64(ctx); gen_bitops(ctx, op1, rt, rs, sa, rd); break; case OPC_DBSHFL: op2 = MASK_DBSHFL(ctx->opcode); switch (op2) { case OPC_DALIGN ... OPC_DALIGN_END: case OPC_DBITSWAP: check_insn(ctx, ISA_MIPS32R6); decode_opc_special3_r6(env, ctx); break; default: check_insn(ctx, ISA_MIPS64R2); check_mips_64(ctx); op2 = MASK_DBSHFL(ctx->opcode); gen_bshfl(ctx, op2, rt, rd); break; break; #endif case OPC_RDHWR: gen_rdhwr(ctx, rt, rd, extract32(ctx->opcode, 6, 3)); break; case OPC_FORK: check_insn(ctx, ASE_MT); { TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); gen_load_gpr(t0, rt); gen_load_gpr(t1, rs); gen_helper_fork(t0, t1); tcg_temp_free(t0); tcg_temp_free(t1); break; case OPC_YIELD: check_insn(ctx, ASE_MT); { TCGv t0 = tcg_temp_new(); gen_load_gpr(t0, rs); gen_helper_yield(t0, cpu_env, t0); gen_store_gpr(t0, rd); tcg_temp_free(t0); break; default: if (ctx->insn_flags & ISA_MIPS32R6) { decode_opc_special3_r6(env, ctx); } else { decode_opc_special3_legacy(env, ctx); | 14,995 |
1 | static int parse_psfile(AVFilterContext *ctx, const char *fname) { CurvesContext *curves = ctx->priv; uint8_t *buf; size_t size; int i, ret, av_unused(version), nb_curves; AVBPrint ptstr; static const int comp_ids[] = {3, 0, 1, 2}; av_bprint_init(&ptstr, 0, AV_BPRINT_SIZE_AUTOMATIC); ret = av_file_map(fname, &buf, &size, 0, NULL); if (ret < 0) return ret; #define READ16(dst) do { \ if (size < 2) \ return AVERROR_INVALIDDATA; \ dst = AV_RB16(buf); \ buf += 2; \ size -= 2; \ } while (0) READ16(version); READ16(nb_curves); for (i = 0; i < FFMIN(nb_curves, FF_ARRAY_ELEMS(comp_ids)); i++) { int nb_points, n; av_bprint_clear(&ptstr); READ16(nb_points); for (n = 0; n < nb_points; n++) { int y, x; READ16(y); READ16(x); av_bprintf(&ptstr, "%f/%f ", x / 255., y / 255.); } if (*ptstr.str) { char **pts = &curves->comp_points_str[comp_ids[i]]; if (!*pts) { *pts = av_strdup(ptstr.str); av_log(ctx, AV_LOG_DEBUG, "curves %d (intid=%d) [%d points]: [%s]\n", i, comp_ids[i], nb_points, *pts); if (!*pts) { ret = AVERROR(ENOMEM); goto end; } } } } end: av_bprint_finalize(&ptstr, NULL); av_file_unmap(buf, size); return ret; } | 14,996 |
1 | static int svq3_decode_slice_header(AVCodecContext *avctx) { SVQ3Context *svq3 = avctx->priv_data; H264Context *h = &svq3->h; MpegEncContext *s = &h->s; const int mb_xy = h->mb_xy; int i, header; header = get_bits(&s->gb, 8); if (((header & 0x9F) != 1 && (header & 0x9F) != 2) || (header & 0x60) == 0) { /* TODO: what? */ av_log(avctx, AV_LOG_ERROR, "unsupported slice header (%02X)\n", header); return -1; } else { int length = header >> 5 & 3; svq3->next_slice_index = get_bits_count(&s->gb) + 8 * show_bits(&s->gb, 8 * length) + 8 * length; if (svq3->next_slice_index > s->gb.size_in_bits) { av_log(avctx, AV_LOG_ERROR, "slice after bitstream end\n"); return -1; } s->gb.size_in_bits = svq3->next_slice_index - 8 * (length - 1); skip_bits(&s->gb, 8); if (svq3->watermark_key) { uint32_t header = AV_RL32(&s->gb.buffer[(get_bits_count(&s->gb) >> 3) + 1]); AV_WL32(&s->gb.buffer[(get_bits_count(&s->gb) >> 3) + 1], header ^ svq3->watermark_key); } if (length > 0) { memcpy((uint8_t *) &s->gb.buffer[get_bits_count(&s->gb) >> 3], &s->gb.buffer[s->gb.size_in_bits >> 3], length - 1); } skip_bits_long(&s->gb, 0); } if ((i = svq3_get_ue_golomb(&s->gb)) == INVALID_VLC || i >= 3) { av_log(h->s.avctx, AV_LOG_ERROR, "illegal slice type %d \n", i); return -1; } h->slice_type = golomb_to_pict_type[i]; if ((header & 0x9F) == 2) { i = (s->mb_num < 64) ? 6 : (1 + av_log2(s->mb_num - 1)); s->mb_skip_run = get_bits(&s->gb, i) - (s->mb_y * s->mb_width + s->mb_x); } else { skip_bits1(&s->gb); s->mb_skip_run = 0; } h->slice_num = get_bits(&s->gb, 8); s->qscale = get_bits(&s->gb, 5); s->adaptive_quant = get_bits1(&s->gb); /* unknown fields */ skip_bits1(&s->gb); if (svq3->unknown_flag) skip_bits1(&s->gb); skip_bits1(&s->gb); skip_bits(&s->gb, 2); while (get_bits1(&s->gb)) skip_bits(&s->gb, 8); /* reset intra predictors and invalidate motion vector references */ if (s->mb_x > 0) { memset(h->intra4x4_pred_mode + h->mb2br_xy[mb_xy - 1] + 3, -1, 4 * sizeof(int8_t)); memset(h->intra4x4_pred_mode + h->mb2br_xy[mb_xy - s->mb_x], -1, 8 * sizeof(int8_t) * s->mb_x); } if (s->mb_y > 0) { memset(h->intra4x4_pred_mode + h->mb2br_xy[mb_xy - s->mb_stride], -1, 8 * sizeof(int8_t) * (s->mb_width - s->mb_x)); if (s->mb_x > 0) h->intra4x4_pred_mode[h->mb2br_xy[mb_xy - s->mb_stride - 1] + 3] = -1; } return 0; } | 14,997 |
1 | static int blk_send_response_one(struct ioreq *ioreq) { struct XenBlkDev *blkdev = ioreq->blkdev; int send_notify = 0; int have_requests = 0; blkif_response_t resp; void *dst; resp.id = ioreq->req.id; resp.operation = ioreq->req.operation; resp.status = ioreq->status; /* Place on the response ring for the relevant domain. */ switch (blkdev->protocol) { case BLKIF_PROTOCOL_NATIVE: dst = RING_GET_RESPONSE(&blkdev->rings.native, blkdev->rings.native.rsp_prod_pvt); break; case BLKIF_PROTOCOL_X86_32: dst = RING_GET_RESPONSE(&blkdev->rings.x86_32_part, blkdev->rings.x86_32_part.rsp_prod_pvt); break; case BLKIF_PROTOCOL_X86_64: dst = RING_GET_RESPONSE(&blkdev->rings.x86_64_part, blkdev->rings.x86_64_part.rsp_prod_pvt); break; default: dst = NULL; } memcpy(dst, &resp, sizeof(resp)); blkdev->rings.common.rsp_prod_pvt++; RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(&blkdev->rings.common, send_notify); if (blkdev->rings.common.rsp_prod_pvt == blkdev->rings.common.req_cons) { /* * Tail check for pending requests. Allows frontend to avoid * notifications if requests are already in flight (lower * overheads and promotes batching). */ RING_FINAL_CHECK_FOR_REQUESTS(&blkdev->rings.common, have_requests); } else if (RING_HAS_UNCONSUMED_REQUESTS(&blkdev->rings.common)) { have_requests = 1; } if (have_requests) { blkdev->more_work++; } return send_notify; } | 14,998 |
1 | void s390_ipl_prepare_cpu(S390CPU *cpu) { S390IPLState *ipl = get_ipl_device(); cpu->env.psw.addr = ipl->start_addr; cpu->env.psw.mask = IPL_PSW_MASK; if (!ipl->kernel || ipl->iplb_valid) { cpu->env.psw.addr = ipl->bios_start_addr; if (!ipl->iplb_valid) { ipl->iplb_valid = s390_gen_initial_iplb(ipl); } } if (ipl->netboot) { if (load_netboot_image(&err) < 0) { error_report_err(err); vm_stop(RUN_STATE_INTERNAL_ERROR); } ipl->iplb.ccw.netboot_start_addr = ipl->start_addr; } } | 14,999 |
1 | static void rtas_ibm_os_term(PowerPCCPU *cpu, sPAPRMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { target_ulong ret = 0; qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, &error_abort); rtas_st(rets, 0, ret); } | 15,003 |
1 | int av_probe_input_buffer(AVIOContext *pb, AVInputFormat **fmt, const char *filename, void *logctx, unsigned int offset, unsigned int max_probe_size) { AVProbeData pd = { filename ? filename : "", NULL, -offset }; unsigned char *buf = NULL; int ret = 0, probe_size; if (!max_probe_size) { max_probe_size = PROBE_BUF_MAX; } else if (max_probe_size > PROBE_BUF_MAX) { max_probe_size = PROBE_BUF_MAX; } else if (max_probe_size < PROBE_BUF_MIN) { return AVERROR(EINVAL); } if (offset >= max_probe_size) { return AVERROR(EINVAL); } for(probe_size= PROBE_BUF_MIN; probe_size<=max_probe_size && !*fmt; probe_size = FFMIN(probe_size<<1, FFMAX(max_probe_size, probe_size+1))) { int score = probe_size < max_probe_size ? AVPROBE_SCORE_RETRY : 0; int buf_offset = (probe_size == PROBE_BUF_MIN) ? 0 : probe_size>>1; void *buftmp; if (probe_size < offset) { continue; } /* read probe data */ buftmp = av_realloc(buf, probe_size + AVPROBE_PADDING_SIZE); if(!buftmp){ av_free(buf); return AVERROR(ENOMEM); } buf=buftmp; if ((ret = avio_read(pb, buf + buf_offset, probe_size - buf_offset)) < 0) { /* fail if error was not end of file, otherwise, lower score */ if (ret != AVERROR_EOF) { av_free(buf); return ret; } score = 0; ret = 0; /* error was end of file, nothing read */ } pd.buf_size += ret; pd.buf = &buf[offset]; memset(pd.buf + pd.buf_size, 0, AVPROBE_PADDING_SIZE); /* guess file format */ *fmt = av_probe_input_format2(&pd, 1, &score); if(*fmt){ if(score <= AVPROBE_SCORE_RETRY){ //this can only be true in the last iteration av_log(logctx, AV_LOG_WARNING, "Format %s detected only with low score of %d, misdetection possible!\n", (*fmt)->name, score); }else av_log(logctx, AV_LOG_DEBUG, "Format %s probed with size=%d and score=%d\n", (*fmt)->name, probe_size, score); } } if (!*fmt) { av_free(buf); return AVERROR_INVALIDDATA; } /* rewind. reuse probe buffer to avoid seeking */ if ((ret = ffio_rewind_with_probe_data(pb, buf, pd.buf_size)) < 0) av_free(buf); return ret; } | 15,004 |
1 | static int mov_read_stsz(MOVContext *c, AVIOContext *pb, MOVAtom atom) { AVStream *st; MOVStreamContext *sc; unsigned int i, entries, sample_size, field_size, num_bytes; GetBitContext gb; unsigned char* buf; if (c->fc->nb_streams < 1) return 0; st = c->fc->streams[c->fc->nb_streams-1]; sc = st->priv_data; avio_r8(pb); /* version */ avio_rb24(pb); /* flags */ if (atom.type == MKTAG('s','t','s','z')) { sample_size = avio_rb32(pb); if (!sc->sample_size) /* do not overwrite value computed in stsd */ sc->sample_size = sample_size; field_size = 32; } else { sample_size = 0; avio_rb24(pb); /* reserved */ field_size = avio_r8(pb); } entries = avio_rb32(pb); av_log(c->fc, AV_LOG_TRACE, "sample_size = %d sample_count = %d\n", sc->sample_size, entries); sc->sample_count = entries; if (sample_size) return 0; if (field_size != 4 && field_size != 8 && field_size != 16 && field_size != 32) { av_log(c->fc, AV_LOG_ERROR, "Invalid sample field size %d\n", field_size); return AVERROR_INVALIDDATA; } if (!entries) return 0; if (entries >= UINT_MAX / sizeof(int) || entries >= (UINT_MAX - 4) / field_size) return AVERROR_INVALIDDATA; sc->sample_sizes = av_malloc(entries * sizeof(int)); if (!sc->sample_sizes) return AVERROR(ENOMEM); num_bytes = (entries*field_size+4)>>3; buf = av_malloc(num_bytes+FF_INPUT_BUFFER_PADDING_SIZE); if (!buf) { av_freep(&sc->sample_sizes); return AVERROR(ENOMEM); } if (avio_read(pb, buf, num_bytes) < num_bytes) { av_freep(&sc->sample_sizes); av_free(buf); return AVERROR_INVALIDDATA; } init_get_bits(&gb, buf, 8*num_bytes); for (i = 0; i < entries && !pb->eof_reached; i++) { sc->sample_sizes[i] = get_bits_long(&gb, field_size); sc->data_size += sc->sample_sizes[i]; } sc->sample_count = i; av_free(buf); if (pb->eof_reached) return AVERROR_EOF; return 0; } | 15,005 |
0 | static inline void writer_print_string(WriterContext *wctx, const char *key, const char *val, int opt) { const struct section *section = wctx->section[wctx->level]; if (opt && !(wctx->writer->flags & WRITER_FLAG_DISPLAY_OPTIONAL_FIELDS)) return; if (section->show_all_entries || av_dict_get(section->entries_to_show, key, NULL, 0)) { wctx->writer->print_string(wctx, key, val); wctx->nb_item[wctx->level]++; } } | 15,006 |
0 | static int verify_expr(AVExpr *e) { if (!e) return 0; switch (e->type) { case e_value: case e_const: return 1; case e_func0: case e_func1: case e_squish: case e_ld: case e_gauss: case e_isnan: case e_floor: case e_ceil: case e_trunc: case e_sqrt: case e_not: case e_random: return verify_expr(e->param[0]) && !e->param[2]; case e_taylor: return verify_expr(e->param[0]) && verify_expr(e->param[1]) && (!e->param[2] || verify_expr(e->param[2])); default: return verify_expr(e->param[0]) && verify_expr(e->param[1]) && !e->param[2]; } } | 15,007 |
0 | void ff_put_h264_qpel4_mc10_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { avc_luma_hz_qrt_4w_msa(src - 2, stride, dst, stride, 4, 0); } | 15,008 |
0 | static int mov_read_stco(MOVContext *c, ByteIOContext *pb, MOVAtom atom) { AVStream *st = c->fc->streams[c->fc->nb_streams-1]; MOVStreamContext *sc = st->priv_data; unsigned int i, entries; get_byte(pb); /* version */ get_be24(pb); /* flags */ entries = get_be32(pb); if(entries >= UINT_MAX/sizeof(int64_t)) return -1; sc->chunk_offsets = av_malloc(entries * sizeof(int64_t)); if (!sc->chunk_offsets) return AVERROR(ENOMEM); sc->chunk_count = entries; if (atom.type == MKTAG('s','t','c','o')) for(i=0; i<entries; i++) sc->chunk_offsets[i] = get_be32(pb); else if (atom.type == MKTAG('c','o','6','4')) for(i=0; i<entries; i++) sc->chunk_offsets[i] = get_be64(pb); else return -1; return 0; } | 15,009 |
0 | void ff_acelp_lspd2lpc(const double *lsp, float *lpc) { double pa[6], qa[6]; int i; lsp2polyf(lsp, pa, 5); lsp2polyf(lsp + 1, qa, 5); for (i=4; i>=0; i--) { double paf = pa[i+1] + pa[i]; double qaf = qa[i+1] - qa[i]; lpc[i ] = 0.5*(paf+qaf); lpc[9-i] = 0.5*(paf-qaf); } } | 15,010 |
0 | void ff_put_h264_qpel8_mc33_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { avc_luma_hv_qrt_8w_msa(src + stride - 2, src - (stride * 2) + sizeof(uint8_t), stride, dst, stride, 8); } | 15,011 |
0 | static void gen_load_store_alignment(DisasContext *dc, int shift, TCGv_i32 addr, bool no_hw_alignment) { if (!option_enabled(dc, XTENSA_OPTION_UNALIGNED_EXCEPTION)) { tcg_gen_andi_i32(addr, addr, ~0 << shift); } else if (option_enabled(dc, XTENSA_OPTION_HW_ALIGNMENT) && no_hw_alignment) { int label = gen_new_label(); TCGv_i32 tmp = tcg_temp_new_i32(); tcg_gen_andi_i32(tmp, addr, ~(~0 << shift)); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label); gen_exception_cause_vaddr(dc, LOAD_STORE_ALIGNMENT_CAUSE, addr); gen_set_label(label); tcg_temp_free(tmp); } } | 15,012 |
0 | DISAS_INSN(cas2w) { uint16_t ext1, ext2; TCGv addr1, addr2; TCGv regs; /* cas2 Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) */ ext1 = read_im16(env, s); if (ext1 & 0x8000) { /* Address Register */ addr1 = AREG(ext1, 12); } else { /* Data Register */ addr1 = DREG(ext1, 12); } ext2 = read_im16(env, s); if (ext2 & 0x8000) { /* Address Register */ addr2 = AREG(ext2, 12); } else { /* Data Register */ addr2 = DREG(ext2, 12); } /* if (R1) == Dc1 && (R2) == Dc2 then * (R1) = Du1 * (R2) = Du2 * else * Dc1 = (R1) * Dc2 = (R2) */ regs = tcg_const_i32(REG(ext2, 6) | (REG(ext1, 6) << 3) | (REG(ext2, 0) << 6) | (REG(ext1, 0) << 9)); gen_helper_cas2w(cpu_env, regs, addr1, addr2); tcg_temp_free(regs); /* Note that cas2w also assigned to env->cc_op. */ s->cc_op = CC_OP_CMPW; s->cc_op_synced = 1; } | 15,013 |
0 | bool timerlist_run_timers(QEMUTimerList *timer_list) { QEMUTimer *ts; int64_t current_time; bool progress = false; QEMUTimerCB *cb; void *opaque; if (!atomic_read(&timer_list->active_timers)) { return false; } qemu_event_reset(&timer_list->timers_done_ev); if (!timer_list->clock->enabled) { goto out; } switch (timer_list->clock->type) { case QEMU_CLOCK_REALTIME: break; default: case QEMU_CLOCK_VIRTUAL: if (!replay_checkpoint(CHECKPOINT_CLOCK_VIRTUAL)) { goto out; } break; case QEMU_CLOCK_HOST: if (!replay_checkpoint(CHECKPOINT_CLOCK_HOST)) { goto out; } break; case QEMU_CLOCK_VIRTUAL_RT: if (!replay_checkpoint(CHECKPOINT_CLOCK_VIRTUAL_RT)) { goto out; } break; } current_time = qemu_clock_get_ns(timer_list->clock->type); for(;;) { qemu_mutex_lock(&timer_list->active_timers_lock); ts = timer_list->active_timers; if (!timer_expired_ns(ts, current_time)) { qemu_mutex_unlock(&timer_list->active_timers_lock); break; } /* remove timer from the list before calling the callback */ timer_list->active_timers = ts->next; ts->next = NULL; ts->expire_time = -1; cb = ts->cb; opaque = ts->opaque; qemu_mutex_unlock(&timer_list->active_timers_lock); /* run the callback (the timer list can be modified) */ cb(opaque); progress = true; } out: qemu_event_set(&timer_list->timers_done_ev); return progress; } | 15,014 |
0 | static int qemu_rdma_broken_ipv6_kernel(Error **errp, struct ibv_context *verbs) { struct ibv_port_attr port_attr; /* This bug only exists in linux, to our knowledge. */ #ifdef CONFIG_LINUX /* * Verbs are only NULL if management has bound to '[::]'. * * Let's iterate through all the devices and see if there any pure IB * devices (non-ethernet). * * If not, then we can safely proceed with the migration. * Otherwise, there are no guarantees until the bug is fixed in linux. */ if (!verbs) { int num_devices, x; struct ibv_device ** dev_list = ibv_get_device_list(&num_devices); bool roce_found = false; bool ib_found = false; for (x = 0; x < num_devices; x++) { verbs = ibv_open_device(dev_list[x]); if (ibv_query_port(verbs, 1, &port_attr)) { ibv_close_device(verbs); ERROR(errp, "Could not query initial IB port"); return -EINVAL; } if (port_attr.link_layer == IBV_LINK_LAYER_INFINIBAND) { ib_found = true; } else if (port_attr.link_layer == IBV_LINK_LAYER_ETHERNET) { roce_found = true; } ibv_close_device(verbs); } if (roce_found) { if (ib_found) { fprintf(stderr, "WARN: migrations may fail:" " IPv6 over RoCE / iWARP in linux" " is broken. But since you appear to have a" " mixed RoCE / IB environment, be sure to only" " migrate over the IB fabric until the kernel " " fixes the bug.\n"); } else { ERROR(errp, "You only have RoCE / iWARP devices in your systems" " and your management software has specified '[::]'" ", but IPv6 over RoCE / iWARP is not supported in Linux."); return -ENONET; } } return 0; } /* * If we have a verbs context, that means that some other than '[::]' was * used by the management software for binding. In which case we can actually * warn the user about a potential broken kernel; */ /* IB ports start with 1, not 0 */ if (ibv_query_port(verbs, 1, &port_attr)) { ERROR(errp, "Could not query initial IB port"); return -EINVAL; } if (port_attr.link_layer == IBV_LINK_LAYER_ETHERNET) { ERROR(errp, "Linux kernel's RoCE / iWARP does not support IPv6 " "(but patches on linux-rdma in progress)"); return -ENONET; } #endif return 0; } | 15,015 |
0 | static void slavio_set_irq(void *opaque, int irq, int level) { SLAVIO_INTCTLState *s = opaque; DPRINTF("Set cpu %d irq %d level %d\n", s->target_cpu, irq, level); if (irq < 32) { uint32_t mask = 1 << irq; uint32_t pil = s->intbit_to_level[irq]; if (pil > 0) { if (level) { s->intregm_pending |= mask; s->intreg_pending[s->target_cpu] |= 1 << pil; slavio_check_interrupts(s); } else { s->intregm_pending &= ~mask; s->intreg_pending[s->target_cpu] &= ~(1 << pil); } } } } | 15,017 |
0 | int css_register_io_adapter(CssIoAdapterType type, uint8_t isc, bool swap, bool maskable, uint32_t *id) { IoAdapter *adapter; bool found = false; int ret; S390FLICState *fs = s390_get_flic(); S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs); *id = 0; QTAILQ_FOREACH(adapter, &channel_subsys.io_adapters, sibling) { if ((adapter->type == type) && (adapter->isc == isc)) { *id = adapter->id; found = true; ret = 0; break; } if (adapter->id >= *id) { *id = adapter->id + 1; } } if (found) { goto out; } adapter = g_new0(IoAdapter, 1); ret = fsc->register_io_adapter(fs, *id, isc, swap, maskable); if (ret == 0) { adapter->id = *id; adapter->isc = isc; adapter->type = type; QTAILQ_INSERT_TAIL(&channel_subsys.io_adapters, adapter, sibling); } else { g_free(adapter); fprintf(stderr, "Unexpected error %d when registering adapter %d\n", ret, *id); } out: return ret; } | 15,018 |
0 | static int ppce500_load_device_tree(CPUPPCState *env, QEMUMachineInitArgs *args, PPCE500Params *params, hwaddr addr, hwaddr initrd_base, hwaddr initrd_size) { int ret = -1; uint64_t mem_reg_property[] = { 0, cpu_to_be64(args->ram_size) }; int fdt_size; void *fdt; uint8_t hypercall[16]; uint32_t clock_freq = 400000000; uint32_t tb_freq = 400000000; int i; char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus"; char soc[128]; char mpic[128]; uint32_t mpic_ph; uint32_t msi_ph; char gutil[128]; char pci[128]; char msi[128]; uint32_t *pci_map = NULL; int len; uint32_t pci_ranges[14] = { 0x2000000, 0x0, 0xc0000000, 0x0, 0xc0000000, 0x0, 0x20000000, 0x1000000, 0x0, 0x0, 0x0, 0xe1000000, 0x0, 0x10000, }; QemuOpts *machine_opts = qemu_get_machine_opts(); const char *dtb_file = qemu_opt_get(machine_opts, "dtb"); const char *toplevel_compat = qemu_opt_get(machine_opts, "dt_compatible"); if (dtb_file) { char *filename; filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, dtb_file); if (!filename) { goto out; } fdt = load_device_tree(filename, &fdt_size); if (!fdt) { goto out; } goto done; } fdt = create_device_tree(&fdt_size); if (fdt == NULL) { goto out; } /* Manipulate device tree in memory. */ qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 2); qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 2); qemu_devtree_add_subnode(fdt, "/memory"); qemu_devtree_setprop_string(fdt, "/memory", "device_type", "memory"); qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property, sizeof(mem_reg_property)); qemu_devtree_add_subnode(fdt, "/chosen"); if (initrd_size) { ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start", initrd_base); if (ret < 0) { fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n"); } ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end", (initrd_base + initrd_size)); if (ret < 0) { fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n"); } } ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", args->kernel_cmdline); if (ret < 0) fprintf(stderr, "couldn't set /chosen/bootargs\n"); if (kvm_enabled()) { /* Read out host's frequencies */ clock_freq = kvmppc_get_clockfreq(); tb_freq = kvmppc_get_tbfreq(); /* indicate KVM hypercall interface */ qemu_devtree_add_subnode(fdt, "/hypervisor"); qemu_devtree_setprop_string(fdt, "/hypervisor", "compatible", "linux,kvm"); kvmppc_get_hypercall(env, hypercall, sizeof(hypercall)); qemu_devtree_setprop(fdt, "/hypervisor", "hcall-instructions", hypercall, sizeof(hypercall)); /* if KVM supports the idle hcall, set property indicating this */ if (kvmppc_get_hasidle(env)) { qemu_devtree_setprop(fdt, "/hypervisor", "has-idle", NULL, 0); } } /* Create CPU nodes */ qemu_devtree_add_subnode(fdt, "/cpus"); qemu_devtree_setprop_cell(fdt, "/cpus", "#address-cells", 1); qemu_devtree_setprop_cell(fdt, "/cpus", "#size-cells", 0); /* We need to generate the cpu nodes in reverse order, so Linux can pick the first node as boot node and be happy */ for (i = smp_cpus - 1; i >= 0; i--) { CPUState *cpu; char cpu_name[128]; uint64_t cpu_release_addr = MPC8544_SPIN_BASE + (i * 0x20); cpu = qemu_get_cpu(i); if (cpu == NULL) { continue; } env = cpu->env_ptr; snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x", cpu->cpu_index); qemu_devtree_add_subnode(fdt, cpu_name); qemu_devtree_setprop_cell(fdt, cpu_name, "clock-frequency", clock_freq); qemu_devtree_setprop_cell(fdt, cpu_name, "timebase-frequency", tb_freq); qemu_devtree_setprop_string(fdt, cpu_name, "device_type", "cpu"); qemu_devtree_setprop_cell(fdt, cpu_name, "reg", cpu->cpu_index); qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-line-size", env->dcache_line_size); qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-line-size", env->icache_line_size); qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000); qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000); qemu_devtree_setprop_cell(fdt, cpu_name, "bus-frequency", 0); if (cpu->cpu_index) { qemu_devtree_setprop_string(fdt, cpu_name, "status", "disabled"); qemu_devtree_setprop_string(fdt, cpu_name, "enable-method", "spin-table"); qemu_devtree_setprop_u64(fdt, cpu_name, "cpu-release-addr", cpu_release_addr); } else { qemu_devtree_setprop_string(fdt, cpu_name, "status", "okay"); } } qemu_devtree_add_subnode(fdt, "/aliases"); /* XXX These should go into their respective devices' code */ snprintf(soc, sizeof(soc), "/soc@%llx", MPC8544_CCSRBAR_BASE); qemu_devtree_add_subnode(fdt, soc); qemu_devtree_setprop_string(fdt, soc, "device_type", "soc"); qemu_devtree_setprop(fdt, soc, "compatible", compatible_sb, sizeof(compatible_sb)); qemu_devtree_setprop_cell(fdt, soc, "#address-cells", 1); qemu_devtree_setprop_cell(fdt, soc, "#size-cells", 1); qemu_devtree_setprop_cells(fdt, soc, "ranges", 0x0, MPC8544_CCSRBAR_BASE >> 32, MPC8544_CCSRBAR_BASE, MPC8544_CCSRBAR_SIZE); /* XXX should contain a reasonable value */ qemu_devtree_setprop_cell(fdt, soc, "bus-frequency", 0); snprintf(mpic, sizeof(mpic), "%s/pic@%llx", soc, MPC8544_MPIC_REGS_OFFSET); qemu_devtree_add_subnode(fdt, mpic); qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic"); qemu_devtree_setprop_string(fdt, mpic, "compatible", "fsl,mpic"); qemu_devtree_setprop_cells(fdt, mpic, "reg", MPC8544_MPIC_REGS_OFFSET, 0x40000); qemu_devtree_setprop_cell(fdt, mpic, "#address-cells", 0); qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 2); mpic_ph = qemu_devtree_alloc_phandle(fdt); qemu_devtree_setprop_cell(fdt, mpic, "phandle", mpic_ph); qemu_devtree_setprop_cell(fdt, mpic, "linux,phandle", mpic_ph); qemu_devtree_setprop(fdt, mpic, "interrupt-controller", NULL, 0); /* * We have to generate ser1 first, because Linux takes the first * device it finds in the dt as serial output device. And we generate * devices in reverse order to the dt. */ dt_serial_create(fdt, MPC8544_SERIAL1_REGS_OFFSET, soc, mpic, "serial1", 1, false); dt_serial_create(fdt, MPC8544_SERIAL0_REGS_OFFSET, soc, mpic, "serial0", 0, true); snprintf(gutil, sizeof(gutil), "%s/global-utilities@%llx", soc, MPC8544_UTIL_OFFSET); qemu_devtree_add_subnode(fdt, gutil); qemu_devtree_setprop_string(fdt, gutil, "compatible", "fsl,mpc8544-guts"); qemu_devtree_setprop_cells(fdt, gutil, "reg", MPC8544_UTIL_OFFSET, 0x1000); qemu_devtree_setprop(fdt, gutil, "fsl,has-rstcr", NULL, 0); snprintf(msi, sizeof(msi), "/%s/msi@%llx", soc, MPC8544_MSI_REGS_OFFSET); qemu_devtree_add_subnode(fdt, msi); qemu_devtree_setprop_string(fdt, msi, "compatible", "fsl,mpic-msi"); qemu_devtree_setprop_cells(fdt, msi, "reg", MPC8544_MSI_REGS_OFFSET, 0x200); msi_ph = qemu_devtree_alloc_phandle(fdt); qemu_devtree_setprop_cells(fdt, msi, "msi-available-ranges", 0x0, 0x100); qemu_devtree_setprop_phandle(fdt, msi, "interrupt-parent", mpic); qemu_devtree_setprop_cells(fdt, msi, "interrupts", 0xe0, 0x0, 0xe1, 0x0, 0xe2, 0x0, 0xe3, 0x0, 0xe4, 0x0, 0xe5, 0x0, 0xe6, 0x0, 0xe7, 0x0); qemu_devtree_setprop_cell(fdt, msi, "phandle", msi_ph); qemu_devtree_setprop_cell(fdt, msi, "linux,phandle", msi_ph); snprintf(pci, sizeof(pci), "/pci@%llx", MPC8544_PCI_REGS_BASE); qemu_devtree_add_subnode(fdt, pci); qemu_devtree_setprop_cell(fdt, pci, "cell-index", 0); qemu_devtree_setprop_string(fdt, pci, "compatible", "fsl,mpc8540-pci"); qemu_devtree_setprop_string(fdt, pci, "device_type", "pci"); qemu_devtree_setprop_cells(fdt, pci, "interrupt-map-mask", 0xf800, 0x0, 0x0, 0x7); pci_map = pci_map_create(fdt, qemu_devtree_get_phandle(fdt, mpic), params->pci_first_slot, params->pci_nr_slots, &len); qemu_devtree_setprop(fdt, pci, "interrupt-map", pci_map, len); qemu_devtree_setprop_phandle(fdt, pci, "interrupt-parent", mpic); qemu_devtree_setprop_cells(fdt, pci, "interrupts", 24, 2); qemu_devtree_setprop_cells(fdt, pci, "bus-range", 0, 255); for (i = 0; i < 14; i++) { pci_ranges[i] = cpu_to_be32(pci_ranges[i]); } qemu_devtree_setprop_cell(fdt, pci, "fsl,msi", msi_ph); qemu_devtree_setprop(fdt, pci, "ranges", pci_ranges, sizeof(pci_ranges)); qemu_devtree_setprop_cells(fdt, pci, "reg", MPC8544_PCI_REGS_BASE >> 32, MPC8544_PCI_REGS_BASE, 0, 0x1000); qemu_devtree_setprop_cell(fdt, pci, "clock-frequency", 66666666); qemu_devtree_setprop_cell(fdt, pci, "#interrupt-cells", 1); qemu_devtree_setprop_cell(fdt, pci, "#size-cells", 2); qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3); qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci); params->fixup_devtree(params, fdt); if (toplevel_compat) { qemu_devtree_setprop(fdt, "/", "compatible", toplevel_compat, strlen(toplevel_compat) + 1); } done: qemu_devtree_dumpdtb(fdt, fdt_size); ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr); if (ret < 0) { goto out; } g_free(fdt); ret = fdt_size; out: g_free(pci_map); return ret; } | 15,019 |
0 | static void acpi_get_pci_holes(Range *hole, Range *hole64) { Object *pci_host; pci_host = acpi_get_i386_pci_host(); g_assert(pci_host); hole->begin = object_property_get_int(pci_host, PCI_HOST_PROP_PCI_HOLE_START, NULL); hole->end = object_property_get_int(pci_host, PCI_HOST_PROP_PCI_HOLE_END, NULL); hole64->begin = object_property_get_int(pci_host, PCI_HOST_PROP_PCI_HOLE64_START, NULL); hole64->end = object_property_get_int(pci_host, PCI_HOST_PROP_PCI_HOLE64_END, NULL); } | 15,020 |
0 | static void colo_compare_complete(UserCreatable *uc, Error **errp) { CompareState *s = COLO_COMPARE(uc); Chardev *chr; char thread_name[64]; static int compare_id; if (!s->pri_indev || !s->sec_indev || !s->outdev) { error_setg(errp, "colo compare needs 'primary_in' ," "'secondary_in','outdev' property set"); return; } else if (!strcmp(s->pri_indev, s->outdev) || !strcmp(s->sec_indev, s->outdev) || !strcmp(s->pri_indev, s->sec_indev)) { error_setg(errp, "'indev' and 'outdev' could not be same " "for compare module"); return; } if (find_and_check_chardev(&chr, s->pri_indev, errp) || !qemu_chr_fe_init(&s->chr_pri_in, chr, errp)) { return; } if (find_and_check_chardev(&chr, s->sec_indev, errp) || !qemu_chr_fe_init(&s->chr_sec_in, chr, errp)) { return; } if (find_and_check_chardev(&chr, s->outdev, errp) || !qemu_chr_fe_init(&s->chr_out, chr, errp)) { return; } net_socket_rs_init(&s->pri_rs, compare_pri_rs_finalize, s->vnet_hdr); net_socket_rs_init(&s->sec_rs, compare_sec_rs_finalize, s->vnet_hdr); g_queue_init(&s->conn_list); s->connection_track_table = g_hash_table_new_full(connection_key_hash, connection_key_equal, g_free, connection_destroy); sprintf(thread_name, "colo-compare %d", compare_id); qemu_thread_create(&s->thread, thread_name, colo_compare_thread, s, QEMU_THREAD_JOINABLE); compare_id++; return; } | 15,021 |
0 | ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, MemoryRegion *mr) { RAMBlock *new_block; size = TARGET_PAGE_ALIGN(size); new_block = g_malloc0(sizeof(*new_block)); new_block->mr = mr; new_block->offset = find_ram_offset(size); if (host) { new_block->host = host; new_block->flags |= RAM_PREALLOC_MASK; } else { if (mem_path) { #if defined (__linux__) && !defined(TARGET_S390X) new_block->host = file_ram_alloc(new_block, size, mem_path); if (!new_block->host) { new_block->host = qemu_vmalloc(size); qemu_madvise(new_block->host, size, QEMU_MADV_MERGEABLE); } #else fprintf(stderr, "-mem-path option unsupported\n"); exit(1); #endif } else { #if defined(TARGET_S390X) && defined(CONFIG_KVM) /* S390 KVM requires the topmost vma of the RAM to be smaller than an system defined value, which is at least 256GB. Larger systems have larger values. We put the guest between the end of data segment (system break) and this value. We use 32GB as a base to have enough room for the system break to grow. */ new_block->host = mmap((void*)0x800000000, size, PROT_EXEC|PROT_READ|PROT_WRITE, MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); if (new_block->host == MAP_FAILED) { fprintf(stderr, "Allocating RAM failed\n"); abort(); } #else if (xen_enabled()) { xen_ram_alloc(new_block->offset, size, mr); } else { new_block->host = qemu_vmalloc(size); } #endif qemu_madvise(new_block->host, size, QEMU_MADV_MERGEABLE); } } new_block->length = size; QLIST_INSERT_HEAD(&ram_list.blocks, new_block, next); ram_list.phys_dirty = g_realloc(ram_list.phys_dirty, last_ram_offset() >> TARGET_PAGE_BITS); cpu_physical_memory_set_dirty_range(new_block->offset, size, 0xff); if (kvm_enabled()) kvm_setup_guest_memory(new_block->host, size); return new_block->offset; } | 15,024 |
0 | static void x86_iommu_realize(DeviceState *dev, Error **errp) { X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev); X86IOMMUClass *x86_class = X86_IOMMU_GET_CLASS(dev); MachineState *ms = MACHINE(qdev_get_machine()); MachineClass *mc = MACHINE_GET_CLASS(ms); PCMachineState *pcms = PC_MACHINE(object_dynamic_cast(OBJECT(ms), TYPE_PC_MACHINE)); QLIST_INIT(&x86_iommu->iec_notifiers); if (!pcms) { error_setg(errp, "Machine-type '%s' not supported by IOMMU", mc->name); return; } if (x86_class->realize) { x86_class->realize(dev, errp); } x86_iommu_set_default(X86_IOMMU_DEVICE(dev)); } | 15,025 |
0 | static uint64_t cs_read (void *opaque, target_phys_addr_t addr, unsigned size) { CSState *s = opaque; uint32_t saddr, iaddr, ret; saddr = addr; iaddr = ~0U; switch (saddr) { case Index_Address: ret = s->regs[saddr] & ~0x80; break; case Index_Data: if (!(s->dregs[MODE_And_ID] & MODE2)) iaddr = s->regs[Index_Address] & 0x0f; else iaddr = s->regs[Index_Address] & 0x1f; ret = s->dregs[iaddr]; if (iaddr == Error_Status_And_Initialization) { /* keep SEAL happy */ if (s->aci_counter) { ret |= 1 << 5; s->aci_counter -= 1; } } break; default: ret = s->regs[saddr]; break; } dolog ("read %d:%d -> %d\n", saddr, iaddr, ret); return ret; } | 15,028 |
0 | static int mmu_translate_region(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t entry, int level, target_ulong *raddr, int *flags, int rw) { CPUState *cs = CPU(s390_env_get_cpu(env)); uint64_t origin, offs, new_entry; const int pchks[4] = { PGM_SEGMENT_TRANS, PGM_REG_THIRD_TRANS, PGM_REG_SEC_TRANS, PGM_REG_FIRST_TRANS }; PTE_DPRINTF("%s: 0x%" PRIx64 "\n", __func__, entry); origin = entry & _REGION_ENTRY_ORIGIN; offs = (vaddr >> (17 + 11 * level / 4)) & 0x3ff8; new_entry = ldq_phys(cs->as, origin + offs); PTE_DPRINTF("%s: 0x%" PRIx64 " + 0x%" PRIx64 " => 0x%016" PRIx64 "\n", __func__, origin, offs, new_entry); if ((new_entry & _REGION_ENTRY_INV) != 0) { /* XXX different regions have different faults */ DPRINTF("%s: invalid region\n", __func__); trigger_page_fault(env, vaddr, PGM_SEGMENT_TRANS, asc, rw); return -1; } if ((new_entry & _REGION_ENTRY_TYPE_MASK) != level) { trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); return -1; } /* XXX region protection flags */ /* *flags &= ~PAGE_WRITE */ if (level == _ASCE_TYPE_SEGMENT) { return mmu_translate_segment(env, vaddr, asc, new_entry, raddr, flags, rw); } /* Check region table offset and length */ offs = (vaddr >> (28 + 11 * (level - 4) / 4)) & 3; if (offs < ((new_entry & _REGION_ENTRY_TF) >> 6) || offs > (new_entry & _REGION_ENTRY_LENGTH)) { DPRINTF("%s: invalid offset or len (%lx)\n", __func__, new_entry); trigger_page_fault(env, vaddr, pchks[level / 4 - 1], asc, rw); return -1; } /* yet another region */ return mmu_translate_region(env, vaddr, asc, new_entry, level - 4, raddr, flags, rw); } | 15,029 |
0 | static void sunkbd_handle_event(DeviceState *dev, QemuConsole *src, InputEvent *evt) { ChannelState *s = (ChannelState *)dev; int qcode, keycode; InputKeyEvent *key; assert(evt->type == INPUT_EVENT_KIND_KEY); key = evt->u.key; qcode = qemu_input_key_value_to_qcode(key->key); trace_escc_sunkbd_event_in(qcode, QKeyCode_lookup[qcode], key->down); if (qcode == Q_KEY_CODE_CAPS_LOCK) { if (key->down) { s->caps_lock_mode ^= 1; if (s->caps_lock_mode == 2) { return; /* Drop second press */ } } else { s->caps_lock_mode ^= 2; if (s->caps_lock_mode == 3) { return; /* Drop first release */ } } } if (qcode == Q_KEY_CODE_NUM_LOCK) { if (key->down) { s->num_lock_mode ^= 1; if (s->num_lock_mode == 2) { return; /* Drop second press */ } } else { s->num_lock_mode ^= 2; if (s->num_lock_mode == 3) { return; /* Drop first release */ } } } keycode = qcode_to_keycode[qcode]; if (!key->down) { keycode |= 0x80; } trace_escc_sunkbd_event_out(keycode); put_queue(s, keycode); } | 15,030 |
0 | static void fmod_write_sample (HWVoiceOut *hw, uint8_t *dst, int dst_len) { int src_len1 = dst_len; int src_len2 = 0; int pos = hw->rpos + dst_len; st_sample_t *src1 = hw->mix_buf + hw->rpos; st_sample_t *src2 = NULL; if (pos > hw->samples) { src_len1 = hw->samples - hw->rpos; src2 = hw->mix_buf; src_len2 = dst_len - src_len1; pos = src_len2; } if (src_len1) { hw->clip (dst, src1, src_len1); } if (src_len2) { dst = advance (dst, src_len1 << hw->info.shift); hw->clip (dst, src2, src_len2); } hw->rpos = pos % hw->samples; } | 15,031 |
0 | static void dealloc_helper(void *native_in, VisitorFunc visit, Error **errp) { QapiDeallocVisitor *qdv = qapi_dealloc_visitor_new(); visit(qapi_dealloc_get_visitor(qdv), &native_in, errp); qapi_dealloc_visitor_cleanup(qdv); } | 15,032 |
0 | static void deinterlace_bottom_field_inplace(uint8_t *src1, int src_wrap, int width, int height) { uint8_t *src_m1, *src_0, *src_p1, *src_p2; int y; uint8_t *buf; buf = av_malloc(width); src_m1 = src1; memcpy(buf,src_m1,width); src_0=&src_m1[src_wrap]; src_p1=&src_0[src_wrap]; src_p2=&src_p1[src_wrap]; for(y=0;y<(height-2);y+=2) { deinterlace_line_inplace(buf,src_m1,src_0,src_p1,src_p2,width); src_m1 = src_p1; src_0 = src_p2; src_p1 += 2*src_wrap; src_p2 += 2*src_wrap; } /* do last line */ deinterlace_line_inplace(buf,src_m1,src_0,src_0,src_0,width); av_free(buf); } | 15,033 |
0 | bool net_tx_pkt_parse(struct NetTxPkt *pkt) { return net_tx_pkt_parse_headers(pkt) && net_tx_pkt_rebuild_payload(pkt); } | 15,034 |
0 | CPUState *ppc405ep_init (target_phys_addr_t ram_bases[2], target_phys_addr_t ram_sizes[2], uint32_t sysclk, qemu_irq **picp, int do_init) { clk_setup_t clk_setup[PPC405EP_CLK_NB], tlb_clk_setup; qemu_irq dma_irqs[4], gpt_irqs[5], mal_irqs[4]; CPUState *env; qemu_irq *pic, *irqs; memset(clk_setup, 0, sizeof(clk_setup)); /* init CPUs */ env = ppc4xx_init("405ep", &clk_setup[PPC405EP_CPU_CLK], &tlb_clk_setup, sysclk); clk_setup[PPC405EP_CPU_CLK].cb = tlb_clk_setup.cb; clk_setup[PPC405EP_CPU_CLK].opaque = tlb_clk_setup.opaque; /* Internal devices init */ /* Memory mapped devices registers */ /* PLB arbitrer */ ppc4xx_plb_init(env); /* PLB to OPB bridge */ ppc4xx_pob_init(env); /* OBP arbitrer */ ppc4xx_opba_init(0xef600600); /* Universal interrupt controller */ irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]; pic = ppcuic_init(env, irqs, 0x0C0, 0, 1); *picp = pic; /* SDRAM controller */ /* XXX 405EP has no ECC interrupt */ ppc4xx_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init); /* External bus controller */ ppc405_ebc_init(env); /* DMA controller */ dma_irqs[0] = pic[5]; dma_irqs[1] = pic[6]; dma_irqs[2] = pic[7]; dma_irqs[3] = pic[8]; ppc405_dma_init(env, dma_irqs); /* IIC controller */ ppc405_i2c_init(0xef600500, pic[2]); /* GPIO */ ppc405_gpio_init(0xef600700); /* Serial ports */ if (serial_hds[0] != NULL) { serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE, serial_hds[0], 1, 1); } if (serial_hds[1] != NULL) { serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE, serial_hds[1], 1, 1); } /* OCM */ ppc405_ocm_init(env); /* GPT */ gpt_irqs[0] = pic[19]; gpt_irqs[1] = pic[20]; gpt_irqs[2] = pic[21]; gpt_irqs[3] = pic[22]; gpt_irqs[4] = pic[23]; ppc4xx_gpt_init(0xef600000, gpt_irqs); /* PCI */ /* Uses pic[3], pic[16], pic[18] */ /* MAL */ mal_irqs[0] = pic[11]; mal_irqs[1] = pic[12]; mal_irqs[2] = pic[13]; mal_irqs[3] = pic[14]; ppc405_mal_init(env, mal_irqs); /* Ethernet */ /* Uses pic[9], pic[15], pic[17] */ /* CPU control */ ppc405ep_cpc_init(env, clk_setup, sysclk); return env; } | 15,035 |
0 | void address_space_sync_dirty_bitmap(AddressSpace *as) { FlatView *view; FlatRange *fr; view = as->current_map; FOR_EACH_FLAT_RANGE(fr, view) { MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); } } | 15,036 |
0 | static uint32_t nam_readb (void *opaque, uint32_t addr) { PCIAC97LinkState *d = opaque; AC97LinkState *s = &d->ac97; dolog ("U nam readb %#x\n", addr); s->cas = 0; return ~0U; } | 15,037 |
0 | static target_ulong h_client_architecture_support(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { /* Working address in data buffer */ target_ulong addr = ppc64_phys_to_real(args[0]); target_ulong ov_table; uint32_t cas_pvr; sPAPROptionVector *ov1_guest, *ov5_guest, *ov5_cas_old, *ov5_updates; bool guest_radix; Error *local_err = NULL; bool raw_mode_supported = false; cas_pvr = cas_check_pvr(spapr, cpu, &addr, &raw_mode_supported, &local_err); if (local_err) { error_report_err(local_err); return H_HARDWARE; } /* Update CPUs */ if (cpu->compat_pvr != cas_pvr) { ppc_set_compat_all(cas_pvr, &local_err); if (local_err) { /* We fail to set compat mode (likely because running with KVM PR), * but maybe we can fallback to raw mode if the guest supports it. */ if (!raw_mode_supported) { error_report_err(local_err); return H_HARDWARE; } local_err = NULL; } } /* For the future use: here @ov_table points to the first option vector */ ov_table = addr; ov1_guest = spapr_ovec_parse_vector(ov_table, 1); ov5_guest = spapr_ovec_parse_vector(ov_table, 5); if (spapr_ovec_test(ov5_guest, OV5_MMU_BOTH)) { error_report("guest requested hash and radix MMU, which is invalid."); exit(EXIT_FAILURE); } /* The radix/hash bit in byte 24 requires special handling: */ guest_radix = spapr_ovec_test(ov5_guest, OV5_MMU_RADIX_300); spapr_ovec_clear(ov5_guest, OV5_MMU_RADIX_300); /* * HPT resizing is a bit of a special case, because when enabled * we assume an HPT guest will support it until it says it * doesn't, instead of assuming it won't support it until it says * it does. Strictly speaking that approach could break for * guests which don't make a CAS call, but those are so old we * don't care about them. Without that assumption we'd have to * make at least a temporary allocation of an HPT sized for max * memory, which could be impossibly difficult under KVM HV if * maxram is large. */ if (!guest_radix && !spapr_ovec_test(ov5_guest, OV5_HPT_RESIZE)) { int maxshift = spapr_hpt_shift_for_ramsize(MACHINE(spapr)->maxram_size); if (spapr->resize_hpt == SPAPR_RESIZE_HPT_REQUIRED) { error_report( "h_client_architecture_support: Guest doesn't support HPT resizing, but resize-hpt=required"); exit(1); } if (spapr->htab_shift < maxshift) { /* Guest doesn't know about HPT resizing, so we * pre-emptively resize for the maximum permitted RAM. At * the point this is called, nothing should have been * entered into the existing HPT */ spapr_reallocate_hpt(spapr, maxshift, &error_fatal); if (kvm_enabled()) { /* For KVM PR, update the HPT pointer */ target_ulong sdr1 = (target_ulong)(uintptr_t)spapr->htab | (spapr->htab_shift - 18); kvmppc_update_sdr1(sdr1); } } } /* NOTE: there are actually a number of ov5 bits where input from the * guest is always zero, and the platform/QEMU enables them independently * of guest input. To model these properly we'd want some sort of mask, * but since they only currently apply to memory migration as defined * by LoPAPR 1.1, 14.5.4.8, which QEMU doesn't implement, we don't need * to worry about this for now. */ ov5_cas_old = spapr_ovec_clone(spapr->ov5_cas); /* also clear the radix/hash bit from the current ov5_cas bits to * be in sync with the newly ov5 bits. Else the radix bit will be * seen as being removed and this will generate a reset loop */ spapr_ovec_clear(ov5_cas_old, OV5_MMU_RADIX_300); /* full range of negotiated ov5 capabilities */ spapr_ovec_intersect(spapr->ov5_cas, spapr->ov5, ov5_guest); spapr_ovec_cleanup(ov5_guest); /* capabilities that have been added since CAS-generated guest reset. * if capabilities have since been removed, generate another reset */ ov5_updates = spapr_ovec_new(); spapr->cas_reboot = spapr_ovec_diff(ov5_updates, ov5_cas_old, spapr->ov5_cas); /* Now that processing is finished, set the radix/hash bit for the * guest if it requested a valid mode; otherwise terminate the boot. */ if (guest_radix) { if (kvm_enabled() && !kvmppc_has_cap_mmu_radix()) { error_report("Guest requested unavailable MMU mode (radix)."); exit(EXIT_FAILURE); } spapr_ovec_set(spapr->ov5_cas, OV5_MMU_RADIX_300); } else { if (kvm_enabled() && kvmppc_has_cap_mmu_radix() && !kvmppc_has_cap_mmu_hash_v3()) { error_report("Guest requested unavailable MMU mode (hash)."); exit(EXIT_FAILURE); } } spapr->cas_legacy_guest_workaround = !spapr_ovec_test(ov1_guest, OV1_PPC_3_00); if (!spapr->cas_reboot) { spapr->cas_reboot = (spapr_h_cas_compose_response(spapr, args[1], args[2], ov5_updates) != 0); } spapr_ovec_cleanup(ov5_updates); if (spapr->cas_reboot) { qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); } else { /* If ppc_spapr_reset() did not set up a HPT but one is necessary * (because the guest isn't going to use radix) then set it up here. */ if ((spapr->patb_entry & PATBE1_GR) && !guest_radix) { /* legacy hash or new hash: */ spapr_setup_hpt_and_vrma(spapr); } } return H_SUCCESS; } | 15,038 |
0 | static int mode_sense_page(SCSIDiskState *s, int page, uint8_t **p_outbuf, int page_control) { static const int mode_sense_valid[0x3f] = { [MODE_PAGE_HD_GEOMETRY] = (1 << TYPE_DISK), [MODE_PAGE_FLEXIBLE_DISK_GEOMETRY] = (1 << TYPE_DISK), [MODE_PAGE_CACHING] = (1 << TYPE_DISK) | (1 << TYPE_ROM), [MODE_PAGE_CAPABILITIES] = (1 << TYPE_ROM), }; BlockDriverState *bdrv = s->bs; int cylinders, heads, secs; uint8_t *p = *p_outbuf; if ((mode_sense_valid[page] & (1 << s->qdev.type)) == 0) { return -1; } p[0] = page; /* * If Changeable Values are requested, a mask denoting those mode parameters * that are changeable shall be returned. As we currently don't support * parameter changes via MODE_SELECT all bits are returned set to zero. * The buffer was already menset to zero by the caller of this function. */ switch (page) { case MODE_PAGE_HD_GEOMETRY: p[1] = 0x16; if (page_control == 1) { /* Changeable Values */ break; } /* if a geometry hint is available, use it */ bdrv_get_geometry_hint(bdrv, &cylinders, &heads, &secs); p[2] = (cylinders >> 16) & 0xff; p[3] = (cylinders >> 8) & 0xff; p[4] = cylinders & 0xff; p[5] = heads & 0xff; /* Write precomp start cylinder, disabled */ p[6] = (cylinders >> 16) & 0xff; p[7] = (cylinders >> 8) & 0xff; p[8] = cylinders & 0xff; /* Reduced current start cylinder, disabled */ p[9] = (cylinders >> 16) & 0xff; p[10] = (cylinders >> 8) & 0xff; p[11] = cylinders & 0xff; /* Device step rate [ns], 200ns */ p[12] = 0; p[13] = 200; /* Landing zone cylinder */ p[14] = 0xff; p[15] = 0xff; p[16] = 0xff; /* Medium rotation rate [rpm], 5400 rpm */ p[20] = (5400 >> 8) & 0xff; p[21] = 5400 & 0xff; break; case MODE_PAGE_FLEXIBLE_DISK_GEOMETRY: p[1] = 0x1e; if (page_control == 1) { /* Changeable Values */ break; } /* Transfer rate [kbit/s], 5Mbit/s */ p[2] = 5000 >> 8; p[3] = 5000 & 0xff; /* if a geometry hint is available, use it */ bdrv_get_geometry_hint(bdrv, &cylinders, &heads, &secs); p[4] = heads & 0xff; p[5] = secs & 0xff; p[6] = s->cluster_size * 2; p[8] = (cylinders >> 8) & 0xff; p[9] = cylinders & 0xff; /* Write precomp start cylinder, disabled */ p[10] = (cylinders >> 8) & 0xff; p[11] = cylinders & 0xff; /* Reduced current start cylinder, disabled */ p[12] = (cylinders >> 8) & 0xff; p[13] = cylinders & 0xff; /* Device step rate [100us], 100us */ p[14] = 0; p[15] = 1; /* Device step pulse width [us], 1us */ p[16] = 1; /* Device head settle delay [100us], 100us */ p[17] = 0; p[18] = 1; /* Motor on delay [0.1s], 0.1s */ p[19] = 1; /* Motor off delay [0.1s], 0.1s */ p[20] = 1; /* Medium rotation rate [rpm], 5400 rpm */ p[28] = (5400 >> 8) & 0xff; p[29] = 5400 & 0xff; break; case MODE_PAGE_CACHING: p[0] = 8; p[1] = 0x12; if (page_control == 1) { /* Changeable Values */ break; } if (bdrv_enable_write_cache(s->bs)) { p[2] = 4; /* WCE */ } break; case MODE_PAGE_CAPABILITIES: p[1] = 0x14; if (page_control == 1) { /* Changeable Values */ break; } p[2] = 3; // CD-R & CD-RW read p[3] = 0; // Writing not supported p[4] = 0x7f; /* Audio, composite, digital out, mode 2 form 1&2, multi session */ p[5] = 0xff; /* CD DA, DA accurate, RW supported, RW corrected, C2 errors, ISRC, UPC, Bar code */ p[6] = 0x2d | (s->tray_locked ? 2 : 0); /* Locking supported, jumper present, eject, tray */ p[7] = 0; /* no volume & mute control, no changer */ p[8] = (50 * 176) >> 8; // 50x read speed p[9] = (50 * 176) & 0xff; p[10] = 0 >> 8; // No volume p[11] = 0 & 0xff; p[12] = 2048 >> 8; // 2M buffer p[13] = 2048 & 0xff; p[14] = (16 * 176) >> 8; // 16x read speed current p[15] = (16 * 176) & 0xff; p[18] = (16 * 176) >> 8; // 16x write speed p[19] = (16 * 176) & 0xff; p[20] = (16 * 176) >> 8; // 16x write speed current p[21] = (16 * 176) & 0xff; break; default: return -1; } *p_outbuf += p[1] + 2; return p[1] + 2; } | 15,039 |
0 | int cpu_get_memory_mapping(MemoryMappingList *list, CPUArchState *env) { if (!(env->cr[0] & CR0_PG_MASK)) { /* paging is disabled */ return 0; } if (env->cr[4] & CR4_PAE_MASK) { #ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { target_phys_addr_t pml4e_addr; pml4e_addr = (env->cr[3] & ~0xfff) & env->a20_mask; walk_pml4e(list, pml4e_addr, env->a20_mask); } else #endif { target_phys_addr_t pdpe_addr; pdpe_addr = (env->cr[3] & ~0x1f) & env->a20_mask; walk_pdpe2(list, pdpe_addr, env->a20_mask); } } else { target_phys_addr_t pde_addr; bool pse; pde_addr = (env->cr[3] & ~0xfff) & env->a20_mask; pse = !!(env->cr[4] & CR4_PSE_MASK); walk_pde2(list, pde_addr, env->a20_mask, pse); } return 0; } | 15,040 |
0 | void ff_h264_filter_mb_fast( H264Context *h, int mb_x, int mb_y, uint8_t *img_y, uint8_t *img_cb, uint8_t *img_cr, unsigned int linesize, unsigned int uvlinesize) { MpegEncContext * const s = &h->s; int mb_xy; int mb_type, left_type, top_type; int qp, qp0, qp1, qpc, qpc0, qpc1, qp_thresh; int chroma = !(CONFIG_GRAY && (s->flags&CODEC_FLAG_GRAY)); int chroma444 = CHROMA444; mb_xy = h->mb_xy; if(!h->h264dsp.h264_loop_filter_strength || h->pps.chroma_qp_diff) { ff_h264_filter_mb(h, mb_x, mb_y, img_y, img_cb, img_cr, linesize, uvlinesize); return; } assert(!FRAME_MBAFF); left_type= h->left_type[LTOP]; top_type= h->top_type; mb_type = s->current_picture.mb_type[mb_xy]; qp = s->current_picture.qscale_table[mb_xy]; qp0 = s->current_picture.qscale_table[mb_xy-1]; qp1 = s->current_picture.qscale_table[h->top_mb_xy]; qpc = get_chroma_qp( h, 0, qp ); qpc0 = get_chroma_qp( h, 0, qp0 ); qpc1 = get_chroma_qp( h, 0, qp1 ); qp0 = (qp + qp0 + 1) >> 1; qp1 = (qp + qp1 + 1) >> 1; qpc0 = (qpc + qpc0 + 1) >> 1; qpc1 = (qpc + qpc1 + 1) >> 1; qp_thresh = 15+52 - h->slice_alpha_c0_offset; if(qp <= qp_thresh && qp0 <= qp_thresh && qp1 <= qp_thresh && qpc <= qp_thresh && qpc0 <= qp_thresh && qpc1 <= qp_thresh) return; if( IS_INTRA(mb_type) ) { int16_t bS4[4] = {4,4,4,4}; int16_t bS3[4] = {3,3,3,3}; int16_t *bSH = FIELD_PICTURE ? bS3 : bS4; if(left_type) filter_mb_edgev( &img_y[4*0], linesize, bS4, qp0, h); if( IS_8x8DCT(mb_type) ) { filter_mb_edgev( &img_y[4*2], linesize, bS3, qp, h); if(top_type){ filter_mb_edgeh( &img_y[4*0*linesize], linesize, bSH, qp1, h); } filter_mb_edgeh( &img_y[4*2*linesize], linesize, bS3, qp, h); } else { filter_mb_edgev( &img_y[4*1], linesize, bS3, qp, h); filter_mb_edgev( &img_y[4*2], linesize, bS3, qp, h); filter_mb_edgev( &img_y[4*3], linesize, bS3, qp, h); if(top_type){ filter_mb_edgeh( &img_y[4*0*linesize], linesize, bSH, qp1, h); } filter_mb_edgeh( &img_y[4*1*linesize], linesize, bS3, qp, h); filter_mb_edgeh( &img_y[4*2*linesize], linesize, bS3, qp, h); filter_mb_edgeh( &img_y[4*3*linesize], linesize, bS3, qp, h); } if(chroma){ if(chroma444){ if(left_type){ filter_mb_edgev( &img_cb[4*0], linesize, bS4, qpc0, h); filter_mb_edgev( &img_cr[4*0], linesize, bS4, qpc0, h); } if( IS_8x8DCT(mb_type) ) { filter_mb_edgev( &img_cb[4*2], linesize, bS3, qpc, h); filter_mb_edgev( &img_cr[4*2], linesize, bS3, qpc, h); if(top_type){ filter_mb_edgeh( &img_cb[4*0*linesize], linesize, bSH, qpc1, h); filter_mb_edgeh( &img_cr[4*0*linesize], linesize, bSH, qpc1, h); } filter_mb_edgeh( &img_cb[4*2*linesize], linesize, bS3, qpc, h); filter_mb_edgeh( &img_cr[4*2*linesize], linesize, bS3, qpc, h); } else { filter_mb_edgev( &img_cb[4*1], linesize, bS3, qpc, h); filter_mb_edgev( &img_cr[4*1], linesize, bS3, qpc, h); filter_mb_edgev( &img_cb[4*2], linesize, bS3, qpc, h); filter_mb_edgev( &img_cr[4*2], linesize, bS3, qpc, h); filter_mb_edgev( &img_cb[4*3], linesize, bS3, qpc, h); filter_mb_edgev( &img_cr[4*3], linesize, bS3, qpc, h); if(top_type){ filter_mb_edgeh( &img_cb[4*0*linesize], linesize, bSH, qpc1, h); filter_mb_edgeh( &img_cr[4*0*linesize], linesize, bSH, qpc1, h); } filter_mb_edgeh( &img_cb[4*1*linesize], linesize, bS3, qpc, h); filter_mb_edgeh( &img_cr[4*1*linesize], linesize, bS3, qpc, h); filter_mb_edgeh( &img_cb[4*2*linesize], linesize, bS3, qpc, h); filter_mb_edgeh( &img_cr[4*2*linesize], linesize, bS3, qpc, h); filter_mb_edgeh( &img_cb[4*3*linesize], linesize, bS3, qpc, h); filter_mb_edgeh( &img_cr[4*3*linesize], linesize, bS3, qpc, h); } }else{ if(left_type){ filter_mb_edgecv( &img_cb[2*0], uvlinesize, bS4, qpc0, h); filter_mb_edgecv( &img_cr[2*0], uvlinesize, bS4, qpc0, h); } filter_mb_edgecv( &img_cb[2*2], uvlinesize, bS3, qpc, h); filter_mb_edgecv( &img_cr[2*2], uvlinesize, bS3, qpc, h); if(top_type){ filter_mb_edgech( &img_cb[2*0*uvlinesize], uvlinesize, bSH, qpc1, h); filter_mb_edgech( &img_cr[2*0*uvlinesize], uvlinesize, bSH, qpc1, h); } filter_mb_edgech( &img_cb[2*2*uvlinesize], uvlinesize, bS3, qpc, h); filter_mb_edgech( &img_cr[2*2*uvlinesize], uvlinesize, bS3, qpc, h); } } return; } else { LOCAL_ALIGNED_8(int16_t, bS, [2], [4][4]); int edges; if( IS_8x8DCT(mb_type) && (h->cbp&7) == 7 ) { edges = 4; AV_WN64A(bS[0][0], 0x0002000200020002ULL); AV_WN64A(bS[0][2], 0x0002000200020002ULL); AV_WN64A(bS[1][0], 0x0002000200020002ULL); AV_WN64A(bS[1][2], 0x0002000200020002ULL); } else { int mask_edge1 = (3*(((5*mb_type)>>5)&1)) | (mb_type>>4); //(mb_type & (MB_TYPE_16x16 | MB_TYPE_8x16)) ? 3 : (mb_type & MB_TYPE_16x8) ? 1 : 0; int mask_edge0 = 3*((mask_edge1>>1) & ((5*left_type)>>5)&1); // (mb_type & (MB_TYPE_16x16 | MB_TYPE_8x16)) && (h->left_type[LTOP] & (MB_TYPE_16x16 | MB_TYPE_8x16)) ? 3 : 0; int step = 1+(mb_type>>24); //IS_8x8DCT(mb_type) ? 2 : 1; edges = 4 - 3*((mb_type>>3) & !(h->cbp & 15)); //(mb_type & MB_TYPE_16x16) && !(h->cbp & 15) ? 1 : 4; h->h264dsp.h264_loop_filter_strength( bS, h->non_zero_count_cache, h->ref_cache, h->mv_cache, h->list_count==2, edges, step, mask_edge0, mask_edge1, FIELD_PICTURE); } if( IS_INTRA(left_type) ) AV_WN64A(bS[0][0], 0x0004000400040004ULL); if( IS_INTRA(top_type) ) AV_WN64A(bS[1][0], FIELD_PICTURE ? 0x0003000300030003ULL : 0x0004000400040004ULL); #define FILTER(hv,dir,edge)\ if(AV_RN64A(bS[dir][edge])) { \ filter_mb_edge##hv( &img_y[4*edge*(dir?linesize:1)], linesize, bS[dir][edge], edge ? qp : qp##dir, h );\ if(chroma){\ if(chroma444){\ filter_mb_edge##hv( &img_cb[4*edge*(dir?linesize:1)], linesize, bS[dir][edge], edge ? qpc : qpc##dir, h );\ filter_mb_edge##hv( &img_cr[4*edge*(dir?linesize:1)], linesize, bS[dir][edge], edge ? qpc : qpc##dir, h );\ } else if(!(edge&1)) {\ filter_mb_edgec##hv( &img_cb[2*edge*(dir?uvlinesize:1)], uvlinesize, bS[dir][edge], edge ? qpc : qpc##dir, h );\ filter_mb_edgec##hv( &img_cr[2*edge*(dir?uvlinesize:1)], uvlinesize, bS[dir][edge], edge ? qpc : qpc##dir, h );\ }\ }\ } if(left_type) FILTER(v,0,0); if( edges == 1 ) { if(top_type) FILTER(h,1,0); } else if( IS_8x8DCT(mb_type) ) { FILTER(v,0,2); if(top_type) FILTER(h,1,0); FILTER(h,1,2); } else { FILTER(v,0,1); FILTER(v,0,2); FILTER(v,0,3); if(top_type) FILTER(h,1,0); FILTER(h,1,1); FILTER(h,1,2); FILTER(h,1,3); } #undef FILTER } } | 15,042 |
0 | static inline void downmix_2f_1r_to_mono(float *samples) { int i; for (i = 0; i < 256; i++) { samples[i] += (samples[i + 256] + samples[i + 512]); samples[i + 256] = samples[i + 512] = 0; } } | 15,043 |
0 | static void do_bit_allocation1(AC3DecodeContext *ctx, int chnl) { ac3_audio_block *ab = &ctx->audio_block; int sdecay, fdecay, sgain, dbknee, floor; int lowcomp = 0, fgain = 0, snroffset = 0, fastleak = 0, slowleak = 0; int psd[256], bndpsd[50], excite[50], mask[50], delta; int start = 0, end = 0, bin = 0, i = 0, j = 0, k = 0, lastbin = 0, bndstrt = 0; int bndend = 0, begin = 0, deltnseg = 0, band = 0, seg = 0, address = 0; int fscod = ctx->sync_info.fscod; uint8_t *exps, *deltoffst = 0, *deltlen = 0, *deltba = 0; uint8_t *baps; int do_delta = 0; /* initialization */ sdecay = sdecaytab[ab->sdcycod]; fdecay = fdecaytab[ab->fdcycod]; sgain = sgaintab[ab->sgaincod]; dbknee = dbkneetab[ab->dbpbcod]; floor = floortab[ab->floorcod]; if (chnl == 5) { start = ab->cplstrtmant; end = ab->cplendmant; fgain = fgaintab[ab->cplfgaincod]; snroffset = (((ab->csnroffst - 15) << 4) + ab->cplfsnroffst) << 2; fastleak = (ab->cplfleak << 8) + 768; slowleak = (ab->cplsleak << 8) + 768; exps = ab->dcplexps; baps = ab->cplbap; if (ab->cpldeltbae == AC3_DBASTR_NEW || ab->cpldeltbae == AC3_DBASTR_REUSE) { do_delta = 1; deltnseg = ab->cpldeltnseg; deltoffst = ab->cpldeltoffst; deltlen = ab->cpldeltlen; deltba = ab->cpldeltba; } } else if (chnl == 6) { start = 0; end = 7; lowcomp = 0; fastleak = 0; slowleak = 0; fgain = fgaintab[ab->lfefgaincod]; snroffset = (((ab->csnroffst - 15) << 4) + ab->lfefsnroffst) << 2; exps = ab->dlfeexps; baps = ab->lfebap; } else { start = 0; end = ab->endmant[chnl]; lowcomp = 0; fastleak = 0; slowleak = 0; fgain = fgaintab[ab->fgaincod[chnl]]; snroffset = (((ab->csnroffst - 15) << 4) + ab->fsnroffst[chnl]) << 2; exps = ab->dexps[chnl]; baps = ab->bap[chnl]; if (ab->deltbae[chnl] == AC3_DBASTR_NEW || ab->deltbae[chnl] == AC3_DBASTR_REUSE) { do_delta = 1; deltnseg = ab->deltnseg[chnl]; deltoffst = ab->deltoffst[chnl]; deltlen = ab->deltlen[chnl]; deltba = ab->deltba[chnl]; } } for (bin = start; bin < end; bin++) /* exponent mapping into psd */ psd[bin] = (3072 - ((int)(exps[bin]) << 7)); /* psd integration */ j = start; k = masktab[start]; do { lastbin = FFMIN(bndtab[k] + bndsz[k], end); bndpsd[k] = psd[j]; j++; for (i = j; i < lastbin; i++) { bndpsd[k] = logadd(bndpsd[k], psd[j]); j++; } k++; } while (end > lastbin); /* compute the excite function */ bndstrt = masktab[start]; bndend = masktab[end - 1] + 1; if (bndstrt == 0) { lowcomp = calc_lowcomp(lowcomp, bndpsd[0], bndpsd[1], 0); excite[0] = bndpsd[0] - fgain - lowcomp; lowcomp = calc_lowcomp(lowcomp, bndpsd[1], bndpsd[2], 1); excite[1] = bndpsd[1] - fgain - lowcomp; begin = 7; for (bin = 2; bin < 7; bin++) { if (bndend != 7 || bin != 6) lowcomp = calc_lowcomp(lowcomp, bndpsd[bin], bndpsd[bin + 1], bin); fastleak = bndpsd[bin] - fgain; slowleak = bndpsd[bin] - sgain; excite[bin] = fastleak - lowcomp; if (bndend != 7 || bin != 6) if (bndpsd[bin] <= bndpsd[bin + 1]) { begin = bin + 1; break; } } for (bin = begin; bin < FFMIN(bndend, 22); bin++) { if (bndend != 7 || bin != 6) lowcomp = calc_lowcomp(lowcomp, bndpsd[bin], bndpsd[bin + 1], bin); fastleak -= fdecay; fastleak = FFMAX(fastleak, bndpsd[bin] - fgain); slowleak -= sdecay; slowleak = FFMAX(slowleak, bndpsd[bin] - sgain); excite[bin] = FFMAX(fastleak - lowcomp, slowleak); } begin = 22; } else { begin = bndstrt; } for (bin = begin; bin < bndend; bin++) { fastleak -= fdecay; fastleak = FFMAX(fastleak, bndpsd[bin] - fgain); slowleak -= sdecay; slowleak = FFMAX(slowleak, bndpsd[bin] - sgain); excite[bin] = FFMAX(fastleak, slowleak); } /* compute the masking curve */ for (bin = bndstrt; bin < bndend; bin++) { if (bndpsd[bin] < dbknee) excite[bin] += ((dbknee - bndpsd[bin]) >> 2); mask[bin] = FFMAX(excite[bin], hth[bin][fscod]); } /* apply the delta bit allocation */ if (do_delta) { band = 0; for (seg = 0; seg < deltnseg + 1; seg++) { band += (int)(deltoffst[seg]); if ((int)(deltba[seg]) >= 4) delta = ((int)(deltba[seg]) - 3) << 7; else delta = ((int)(deltba[seg]) - 4) << 7; for (k = 0; k < (int)(deltlen[seg]); k++) { mask[band] += delta; band++; } } } /*compute the bit allocation */ i = start; j = masktab[start]; do { lastbin = FFMIN(bndtab[j] + bndsz[j], end); mask[j] -= snroffset; mask[j] -= floor; if (mask[j] < 0) mask[j] = 0; mask[j] &= 0x1fe0; mask[j] += floor; for (k = i; k < lastbin; k++) { address = (psd[i] - mask[j]) >> 5; address = FFMIN(63, FFMAX(0, address)); baps[i] = baptab[address]; i++; } j++; } while (end > lastbin); } | 15,044 |
0 | static int add_shorts_metadata(int count, const char *name, const char *sep, TiffContext *s) { char *ap; int i; int16_t *sp; if (bytestream2_get_bytes_left(&s->gb) < count * sizeof(int16_t)) return -1; sp = av_malloc(count * sizeof(int16_t)); if (!sp) return AVERROR(ENOMEM); for (i = 0; i < count; i++) sp[i] = tget_short(&s->gb, s->le); ap = shorts2str(sp, count, sep); av_freep(&sp); if (!ap) return AVERROR(ENOMEM); av_dict_set(&s->picture.metadata, name, ap, AV_DICT_DONT_STRDUP_VAL); return 0; } | 15,045 |
0 | int av_open_input_file(AVFormatContext **ic_ptr, const char *filename, AVInputFormat *fmt, int buf_size, AVFormatParameters *ap) { int err; AVProbeData probe_data, *pd = &probe_data; ByteIOContext *pb = NULL; void *logctx= ap && ap->prealloced_context ? *ic_ptr : NULL; pd->filename = ""; if (filename) pd->filename = filename; pd->buf = NULL; pd->buf_size = 0; if (!fmt) { /* guess format if no file can be opened */ fmt = av_probe_input_format(pd, 0); } /* Do not open file if the format does not need it. XXX: specific hack needed to handle RTSP/TCP */ if (!fmt || !(fmt->flags & AVFMT_NOFILE)) { /* if no file needed do not try to open one */ if ((err=url_fopen(&pb, filename, URL_RDONLY)) < 0) { goto fail; } if (buf_size > 0) { url_setbufsize(pb, buf_size); } if ((err = ff_probe_input_buffer(&pb, &fmt, filename, logctx, 0, 0)) < 0) { goto fail; } } /* if still no format found, error */ if (!fmt) { err = AVERROR_NOFMT; goto fail; } /* check filename in case an image number is expected */ if (fmt->flags & AVFMT_NEEDNUMBER) { if (!av_filename_number_test(filename)) { err = AVERROR_NUMEXPECTED; goto fail; } } err = av_open_input_stream(ic_ptr, pb, filename, fmt, ap); if (err) goto fail; return 0; fail: av_freep(&pd->buf); if (pb) url_fclose(pb); if (ap && ap->prealloced_context) av_free(*ic_ptr); *ic_ptr = NULL; return err; } | 15,046 |
0 | static int amr_probe(AVProbeData *p) { //Only check for "#!AMR" which could be amr-wb, amr-nb. //This will also trigger multichannel files: "#!AMR_MC1.0\n" and //"#!AMR-WB_MC1.0\n" (not supported) if (p->buf_size < 5) return 0; if(memcmp(p->buf,AMR_header,5)==0) return AVPROBE_SCORE_MAX; else return 0; } | 15,047 |
0 | static int http_read_stream(URLContext *h, uint8_t *buf, int size) { HTTPContext *s = h->priv_data; int err, new_location, read_ret; int64_t seek_ret; int reconnect_delay = 0; if (!s->hd) return AVERROR_EOF; if (s->end_chunked_post && !s->end_header) { err = http_read_header(h, &new_location); if (err < 0) return err; } #if CONFIG_ZLIB if (s->compressed) return http_buf_read_compressed(h, buf, size); #endif /* CONFIG_ZLIB */ read_ret = http_buf_read(h, buf, size); while ((read_ret < 0 && s->reconnect && (!h->is_streamed || s->reconnect_streamed) && s->filesize > 0 && s->off < s->filesize) || (read_ret == AVERROR_EOF && s->reconnect_at_eof && (!h->is_streamed || s->reconnect_streamed))) { uint64_t target = h->is_streamed ? 0 : s->off; if (read_ret == AVERROR_EXIT) return read_ret; if (reconnect_delay > s->reconnect_delay_max) return AVERROR(EIO); av_log(h, AV_LOG_WARNING, "Will reconnect at %"PRIu64" in %d second(s), error=%s.\n", s->off, reconnect_delay, av_err2str(read_ret)); err = ff_network_sleep_interruptible(1000U*1000*reconnect_delay, &h->interrupt_callback); if (err != AVERROR(ETIMEDOUT)) return err; reconnect_delay = 1 + 2*reconnect_delay; seek_ret = http_seek_internal(h, target, SEEK_SET, 1); if (seek_ret >= 0 && seek_ret != target) { av_log(h, AV_LOG_ERROR, "Failed to reconnect at %"PRIu64".\n", target); return read_ret; } read_ret = http_buf_read(h, buf, size); } return read_ret; } | 15,048 |
0 | static int yuv4_probe(AVProbeData *pd) { /* check file header */ if (pd->buf_size <= sizeof(Y4M_MAGIC)) return 0; if (strncmp(pd->buf, Y4M_MAGIC, sizeof(Y4M_MAGIC)-1)==0) return AVPROBE_SCORE_MAX; else return 0; } | 15,049 |
0 | static rwpipe *rwpipe_open( int argc, char *argv[] ) { rwpipe *this = av_mallocz( sizeof( rwpipe ) ); if ( this != NULL ) { int input[ 2 ]; int output[ 2 ]; pipe( input ); pipe( output ); this->pid = fork(); if ( this->pid == 0 ) { #define COMMAND_SIZE 10240 char *command = av_mallocz( COMMAND_SIZE ); int i; strcpy( command, "" ); for ( i = 0; i < argc; i ++ ) { av_strlcat( command, argv[ i ], COMMAND_SIZE ); av_strlcat( command, " ", COMMAND_SIZE ); } dup2( output[ 0 ], STDIN_FILENO ); dup2( input[ 1 ], STDOUT_FILENO ); close( input[ 0 ] ); close( input[ 1 ] ); close( output[ 0 ] ); close( output[ 1 ] ); execl("/bin/sh", "sh", "-c", command, (char*)NULL ); _exit( 255 ); } else { close( input[ 1 ] ); close( output[ 0 ] ); this->reader = fdopen( input[ 0 ], "r" ); this->writer = fdopen( output[ 1 ], "w" ); } } return this; } | 15,050 |
0 | static int validate_codec_tag(AVFormatContext *s, AVStream *st) { const AVCodecTag *avctag; int n; enum AVCodecID id = AV_CODEC_ID_NONE; unsigned int tag = 0; /** * Check that tag + id is in the table * If neither is in the table -> OK * If tag is in the table with another id -> FAIL * If id is in the table with another tag -> FAIL unless strict < normal */ for (n = 0; s->oformat->codec_tag[n]; n++) { avctag = s->oformat->codec_tag[n]; while (avctag->id != AV_CODEC_ID_NONE) { if (avpriv_toupper4(avctag->tag) == avpriv_toupper4(st->codec->codec_tag)) { id = avctag->id; if (id == st->codec->codec_id) return 1; } if (avctag->id == st->codec->codec_id) tag = avctag->tag; avctag++; } } if (id != AV_CODEC_ID_NONE) return 0; if (tag && (st->codec->strict_std_compliance >= FF_COMPLIANCE_NORMAL)) return 0; return 1; } | 15,052 |
0 | int coroutine_fn bdrv_co_preadv(BdrvChild *child, int64_t offset, unsigned int bytes, QEMUIOVector *qiov, BdrvRequestFlags flags) { BlockDriverState *bs = child->bs; BlockDriver *drv = bs->drv; BdrvTrackedRequest req; uint64_t align = bs->bl.request_alignment; uint8_t *head_buf = NULL; uint8_t *tail_buf = NULL; QEMUIOVector local_qiov; bool use_local_qiov = false; int ret; if (!drv) { return -ENOMEDIUM; } ret = bdrv_check_byte_request(bs, offset, bytes); if (ret < 0) { return ret; } bdrv_inc_in_flight(bs); /* Don't do copy-on-read if we read data before write operation */ if (bs->copy_on_read && !(flags & BDRV_REQ_NO_SERIALISING)) { flags |= BDRV_REQ_COPY_ON_READ; } /* Align read if necessary by padding qiov */ if (offset & (align - 1)) { head_buf = qemu_blockalign(bs, align); qemu_iovec_init(&local_qiov, qiov->niov + 2); qemu_iovec_add(&local_qiov, head_buf, offset & (align - 1)); qemu_iovec_concat(&local_qiov, qiov, 0, qiov->size); use_local_qiov = true; bytes += offset & (align - 1); offset = offset & ~(align - 1); } if ((offset + bytes) & (align - 1)) { if (!use_local_qiov) { qemu_iovec_init(&local_qiov, qiov->niov + 1); qemu_iovec_concat(&local_qiov, qiov, 0, qiov->size); use_local_qiov = true; } tail_buf = qemu_blockalign(bs, align); qemu_iovec_add(&local_qiov, tail_buf, align - ((offset + bytes) & (align - 1))); bytes = ROUND_UP(bytes, align); } tracked_request_begin(&req, bs, offset, bytes, BDRV_TRACKED_READ); ret = bdrv_aligned_preadv(bs, &req, offset, bytes, align, use_local_qiov ? &local_qiov : qiov, flags); tracked_request_end(&req); bdrv_dec_in_flight(bs); if (use_local_qiov) { qemu_iovec_destroy(&local_qiov); qemu_vfree(head_buf); qemu_vfree(tail_buf); } return ret; } | 15,053 |
0 | static coroutine_fn int qcow2_co_flush_to_os(BlockDriverState *bs) { BDRVQcow2State *s = bs->opaque; int ret; qemu_co_mutex_lock(&s->lock); ret = qcow2_cache_flush(bs, s->l2_table_cache); if (ret < 0) { qemu_co_mutex_unlock(&s->lock); return ret; } if (qcow2_need_accurate_refcounts(s)) { ret = qcow2_cache_flush(bs, s->refcount_block_cache); if (ret < 0) { qemu_co_mutex_unlock(&s->lock); return ret; } } qemu_co_mutex_unlock(&s->lock); return 0; } | 15,054 |
0 | static void test_submit_many(void) { WorkerTestData data[100]; int i; /* Start more work items than there will be threads. */ for (i = 0; i < 100; i++) { data[i].n = 0; data[i].ret = -EINPROGRESS; thread_pool_submit_aio(worker_cb, &data[i], done_cb, &data[i]); } active = 100; while (active > 0) { qemu_aio_wait(); } for (i = 0; i < 100; i++) { g_assert_cmpint(data[i].n, ==, 1); g_assert_cmpint(data[i].ret, ==, 0); } } | 15,056 |
0 | static inline void gen_op_jnz_ecx(TCGMemOp size, int label1) { tcg_gen_mov_tl(cpu_tmp0, cpu_regs[R_ECX]); gen_extu(size, cpu_tmp0); tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1); } | 15,057 |
0 | static int local_opendir(FsContext *ctx, V9fsPath *fs_path, V9fsFidOpenState *fs) { char buffer[PATH_MAX]; char *path = fs_path->data; fs->dir = opendir(rpath(ctx, path, buffer)); if (!fs->dir) { return -1; } return 0; } | 15,058 |
0 | void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val) { LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val); ioport_write(1, addr, val); #ifdef CONFIG_KQEMU if (env) env->last_io_time = cpu_get_time_fast(); #endif } | 15,060 |
0 | static void virtio_blk_device_realize(DeviceState *dev, Error **errp) { VirtIODevice *vdev = VIRTIO_DEVICE(dev); VirtIOBlock *s = VIRTIO_BLK(dev); VirtIOBlkConf *conf = &s->conf; Error *err = NULL; static int virtio_blk_id; if (!conf->conf.bs) { error_setg(errp, "drive property not set"); return; } if (!bdrv_is_inserted(conf->conf.bs)) { error_setg(errp, "Device needs media, but drive is empty"); return; } blkconf_serial(&conf->conf, &conf->serial); s->original_wce = bdrv_enable_write_cache(conf->conf.bs); blkconf_geometry(&conf->conf, NULL, 65535, 255, 255, &err); if (err) { error_propagate(errp, err); return; } virtio_init(vdev, "virtio-blk", VIRTIO_ID_BLOCK, sizeof(struct virtio_blk_config)); s->bs = conf->conf.bs; s->rq = NULL; s->sector_mask = (s->conf.conf.logical_block_size / BDRV_SECTOR_SIZE) - 1; s->vq = virtio_add_queue(vdev, 128, virtio_blk_handle_output); s->complete_request = virtio_blk_complete_request; virtio_blk_data_plane_create(vdev, conf, &s->dataplane, &err); if (err != NULL) { error_propagate(errp, err); virtio_cleanup(vdev); return; } s->migration_state_notifier.notify = virtio_blk_migration_state_changed; add_migration_state_change_notifier(&s->migration_state_notifier); s->change = qemu_add_vm_change_state_handler(virtio_blk_dma_restart_cb, s); register_savevm(dev, "virtio-blk", virtio_blk_id++, 2, virtio_blk_save, virtio_blk_load, s); bdrv_set_dev_ops(s->bs, &virtio_block_ops, s); bdrv_set_guest_block_size(s->bs, s->conf.conf.logical_block_size); bdrv_iostatus_enable(s->bs); } | 15,062 |
0 | yuv2gray16_2_c_template(SwsContext *c, const uint16_t *buf0, const uint16_t *buf1, const uint16_t *ubuf0, const uint16_t *ubuf1, const uint16_t *vbuf0, const uint16_t *vbuf1, const uint16_t *abuf0, const uint16_t *abuf1, uint8_t *dest, int dstW, int yalpha, int uvalpha, int y, enum PixelFormat target) { int yalpha1 = 4095 - yalpha; \ int i; for (i = 0; i < (dstW >> 1); i++) { const int i2 = 2 * i; int Y1 = (buf0[i2 ] * yalpha1 + buf1[i2 ] * yalpha) >> 11; int Y2 = (buf0[i2+1] * yalpha1 + buf1[i2+1] * yalpha) >> 11; output_pixel(&dest[2 * i2 + 0], Y1); output_pixel(&dest[2 * i2 + 2], Y2); } } | 15,063 |
0 | dma_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) { hw_error("Unsupported short waccess. reg=" TARGET_FMT_plx "\n", addr); } | 15,064 |
0 | set_interrupt_cause(E1000State *s, int index, uint32_t val) { if (val) val |= E1000_ICR_INT_ASSERTED; s->mac_reg[ICR] = val; s->mac_reg[ICS] = val; qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0); } | 15,065 |
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