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1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.3.4 Measurement reporting delay | In order to save battery lifetime, in idle mode no measurements are performed for DCA. ISCP measurements are started at all establishments. Taking into account that the measured interference of the timeslots is preferable averaged over [FFS] frames, the measurement reporting delay in connecting phase shall not exceed [FFS] milliseconds. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4 Timing characterisitics | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1 Timing Advance (TA) Requirements | For 1.28 Mcps TDD the timing advance in the UE is adjusted by means of uplink synchronisation. For the random access procedure the node B commands the UE to adjust its synchronisation shift by means of signalling the received position of the UpPTS in the FPACH. During the connection the node B measures the timing in the uplink and transmits a SS (Synchronisation Shift) command to the UE at least once per sub-frame.
These SS commands determined whether the UE synchronisation shift is either left unchanged, or adjusted 1 step up or 1 step down. The step size of the SS adjustment is (k/8)Tc where k (=1,2, …,8) is signalled by higher layer signalling. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1.1 Uplink synchronization control requirements for UE for 1.28 Mcps TDD option | Uplink synchronization control is the ability of the UE transmitter to adjust its TX timing in accordance with one or more SS commands received in the downlink. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1.1.1 Uplink synchronization control steps | The SS step is the change in UE transmission timing in response to a single SS command, SS_cmd, received by the UE. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1.1.1.1 Minimum requirement | The UE transmitter shall have the capability of changing the transmission timing with a step size of 1/8, 2/8, 3/8, …, 1 chip according to the value of SS, n=(1,2,…,14) time slot after the SS_cmd arrived (closed loop). For the open loop any step being a multiple of 1/8 chip has to be allowed.
a) The minimum transmission timing step SS,min due to closed loop uplink synchronization control shall be within the range shown in Table 4.6.
b) In case uplink synchronization control implies to perform a bigger step than the minimum step the UE shall perform the a multiple number of minimum steps m. Within the implementation grid of the applicable timing steps of the UE the step being closest to the required step should be executed.
Table 4.6: Uplink synchronisation control range
SS_ cmd
Uplink synchronisation control range for minimum step
1/8 chip step size
Lower
Upper
Up
1/9 chip – 0.1 ppm
1/7 chip + 0.1 ppm
Down
1/9 chip – 0.1 ppm
1/7 chip + 0.1 ppm |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1.1.2 Timing Advance (TADV) for 1.28 Mcps TDD | This measurement refers to TS 25.225 subsection 5.1.14. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1.1.2.1 Accuracy requirements | Table 4.7
Parameter
Unit
Accuracy
Conditions
Range [chips]
Timing Advance
chips period
+/- 0.125
0, …, 255.875 |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1.1.2.2 Range/mapping | The reporting range for Timing Advance is from 0 ... 255.875 chips.
In table 4.8 the mapping of the measured quantity is defined. The signalling range may be larger than the guaranteed accuracy range.
Table 4.8
Reported value
Measured quantity value
Unit
TIMING_ADVANCE_0000
Timing Advance < 0
chip
TIMING_ADVANCE_0001
0 Timing Advance < 0.125
chip
TIMING_ADVANCE_0002
0.125 Timing Advance < 0.25
chip
…
…
…
TIMING_ADVANCE_1024
127.875 Timing Advance < 128
chip
…
…
…
TIMING_ADVANCE_2045
255.625 Timing Advance < 255.75
chip
TIMING_ADVANCE_2046
255.75 Timing Advance < 255.875
chip
TIMING_ADVANCE_2047
255.875 RX Timing Advance
chip
NOTE: This measurement can be used for timing advance (synchronisation shift) calculation for uplink synchronisation or location services. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.1.1.2.2.1 Explanation difference | In 3.84 Mcps TDD timing advance control is carried out by means of higher layer signalling: The network transmits a highly protected timing advance command containing the total timing advance and the UE executes it. Consequently the network can be sure of the timing advance applied by the UE.
In 1.28 Mcps TDD the network transmits SS symbols giving commands like a step up or down or no change at all in every sub-frame. These SS symbols are not protected by a special channel coding including CRC etc. Consequently, the network cannot know whether is commands have been executed or not. Thus, the network cannot obtain the timing advance of the UE by tracking its SS commands. Instead, the UE has to measure its timing advance and transmit it to the network by means of the timing advance measurement. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.2 Cell synchronisation accuracy | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.2.0 Explanation | Considering intersystem compatibility , cell synchronisaton accuracy is the same as 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.2.1 Definition | (void) |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.4.2.2 Minimum Requirements | (void) |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5 UE Measurements Procedures | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.1 Measurements in CELL_DCH State | The monitor mechanism in this state is ffs for 1.28 chip rate TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.1.0 Explanation | This section contains requirements on the UE regarding measurement reporting in CELL_DCH State. Because of the difference between the frame structure of 1.28 Mcps and that of 3.84 Mcps, the idle time slots which can be used for monitoring will be different, hence the detail of this subclause would be different compared with 3.84 Mcps. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.1.1 Introduction | (void) |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.1.2 Requirements | (void) |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.2 Measurements in CELL_FACH State | Commons with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.2.0 Explanation | The section describes the requirements on the UE regarding measurement reporting in CELL_FACH state. The requirements independent with bandwidth and chip rate should be the same. Hence the contents need no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.2.1 Introduction | (void) |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.5.2.2 Requirements | (void) |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6 Measurements Performance Requirements | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1 Measurements Performance for UE | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1 Performance for UE Measurements in Downlink (RX) | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.1 P-CCPCH RSCP (1.28 Mcps TDD) | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.1.1 Explanation | The result of this measurement is not energy and it is independent with the bandwidth, so there should not be modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.2 CPICH Measurements (FDD) | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.3 Timeslot ISCP | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.3.1 Explanation | The result of this measurement is not energy and it is independent with the bandwidth, so there should not be modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.4 UTRA carrier RSSI | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.4.1 Explanation | This measurement relies on the signal-detecting algorithm which independent with the bandwidth and chip rate, so it needs no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.5 GSM carrier RSSI | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.5.1 Explanation | This measurement relies on GSM, so it needs no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.6 SIR | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.6.1 Explanation | This measurement mainly used to meet the requirement of service performance which independent with the bandwidth and chip rate, so there should be no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.7 Transport channel BLER | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.7.1 Explanation | This measurement is mainly used to meet the requirement of service performance which independent with the bandwidth and chip rate, so there should be no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.8 SFN-SFN observed time difference | The measurement period for CELL_DCH state can be found in section 4.5. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.8.1 Accuracy requirements | Table 4.9: SFN-SFN observed time difference accuracy
Parameter
Unit
Accuracy
Conditions
Io [dBm]
SFN-SFN observed time difference
Chip
+/-0,5 for type 1 but +/- 0.125 for type 2
-94...-50 |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.8.2 Range/mapping | The reporting range for SFN-SFN observed time difference type 1 is from 0 ... 3276800 chip.
In table 4.10 mapping of the measured quantity is defined. Signalling range may be larger than the guaranteed accuracy range.
Table 4.10
Reported value
Measured quantity value
Unit
T1_SFN-SFN_TIME _0000000
0 SFN-SFN observed time difference type 1 < 1
chip
T1_SFN-SFN_TIME _0000001
1 SFN-SFN observed time difference type 1 < 2
chip
T1_SFN-SFN_TIME _0000002
2 SFN-SFN observed time difference type 1 < 3
chip
…
…
…
T1_SFN-SFN_TIME _3276797
3276797 SFN-SFN observed time difference type 1 < 3276798
chip
T1_SFN-SFN_TIME _3276798
3276798 SFN-SFN observed time difference type 1 < 3276799
chip
T1_SFN-SFN_TIME _3276799
3276799 SFN-SFN observed time difference type 1 < 3276800
chip
The reporting range for SFN-SFN observed time difference type 2 is from –6400 ... +6400 chip.
In table 4.11 mapping of the measured quantity is defined. Signalling range may be larger than the guaranteed accuracy range.
Table 4.11
Reported value
Measured quantity value
Unit
T2_SFN-SFN_TIME _00000
SFN-SFN observed time difference type 2 < -6390,00
chip
T2_SFN-SFN_TIME _00001
-6390,00 SFN-SFN observed time difference type 2 < -6399,75
chip
T2_SFN-SFN_TIME _00002
-6399,75 SFN-SFN observed time difference type 2 < -6399,50
chip
…
…
…
T2_SFN-SFN_TIME _51199
6399,50 SFN-SFN observed time difference type 2 < 6399,75
chip
T2_SFN-SFN_TIME _51200
6399,75 SFN-SFN observed time difference type 2 < 6400,00
chip
T2_SFN-SFN_TIME _51201
6400,00 SFN-SFN observed time difference type 2
chip |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.8.3 Explanation difference | In 1.28 Mcps TDD there are 12800chips per frame while in 3.84 Mcps TDD there are 38400chips. According to this chip number difference, the observed time difference range in type 1 should be changed correspondingly.
There are 3 kind of special time slot (DwPTS, UpPTS and GP) in 1.28 Mcps TDD frame structure (see section 7.2.1 ‘frame structure’ in TR 25.928). When calculation the SFN-SFN observed time difference in type 2, it needs to consider the position and affection of these 3 special time slots.
Let us suppose:
TRxTSi : time of start of timeslot#0 received of the serving TDD cell i.
TRxTSk : time of start of timeslot#0 received from the target UTRA cell k that is closest in time to the start of the timeslot of the serving TDD cell i.
SFN-SFN observed time difference = TRxTSk - TRxTSi, in chips, which means to calculate the the time difference of the start position of the current frame in cell i to the closest starting position of one frame in cell k.
Editor Note: Here in type 2 we only consider to measure the difference of two cells of 1.28 Mcps TDD. The measurement method is like that in TS 25.215. In type 2 measurement of TS 25.215, it measures the time difference of the start position of the P-CPICH of two cells. That is just something like in 1.28 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.9 Observed time difference to GSM cell | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.9.1 Explanation | For different systems, the measurement that is used to realize the compatibility should be the same. So it is independent with bandwidth and chip rate and there should be no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.10 UE GPS Timing of Cell Frames for LCS | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.10.1 Explanation | The GPS timing of cell frames should be the same for different systems having LCS, so it needs no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.11 SFN-CFN observed time difference | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.1.11.1 Explanation | For the measurement used for the interwork between cells, which belong to the same system or different systems, should be the same and independent with bandwidth and chip rate. So it needs no modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.2 Performance for UE Measurements in Uplink (TX) | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.2.1 UE transmitted power | Common with 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.1.2.1.1 Explanation | The UE transmitted power is represented by energy density and it is independent with the bandwidth, so there should not be modification. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2 Measurements Performance for UTRAN | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1 Performance for UTRAN Measurements in Uplink (RX) | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.1 RSCP | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.2 Timeslot ISCP | Common with 3.84 Mcps TDD option |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.3 RSSI | Common with 3.84 Mcps TDD option |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.4 SIR | Common with 3.84 Mcps TDD option |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.5 Transport Channel BER | Common with 3.84 Mcps TDD option |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.6 RX Timing Deviation | The definition of RX Timing Deviation here is common with 3.84 Mcps but only accuracy and range are different between two TDD mode. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.6.1 Accuracy requirements | Table 4.12
Parameter
Unit
Accuracy
Conditions
Range [chips]
RX Timing Deviation
chips period
+/- 0.125
-128, …, 128 |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.6.2 Range/mapping | The reporting range for RX Timing Deviation is from-128 ... 128 chips.
In table 4.13 mapping of the measured quantity is defined. Signaling range may be larger than the guaranteed accuracy range.
Table 4.13
Reported value
Measured quantity value
Unit
RX_TIME_DEV_0001
RX Timing Deviation < –128,000
chip
RX_TIME_DEV_0002
-128,000 RX Timing Deviation < -127,875
chip
RX_TIME_DEV_0003
-127,875 RX Timing Deviation < -127,750
chip
…
…
…
RX_TIME_DEV_1024
000,000 RX Timing Deviation < 000,125
chip
…
…
…
RX_TIME_DEV_2046
127,750 RX Timing Deviation < 127,875
chip
RX_TIME_DEV_2047
127,875 RX Timing Deviation < 128,000
chip
RX_TIME_DEV_2048
128,000 RX Timing Deviation
chip
NOTE: This measurement can be used for timing advance (synchronisation shift) calculation for uplink synchronisation or location services. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.6.3 Explanation difference | In 3.84 Mcps TDD the ‘RX Timing Deviation’ measurement is only needed to report to the higher layer for timing advance calculation or location services. It does not need to measure this value continuously.
While in 1.28 Mcps TDD this measurement is not only reported to higher layer, but also severed as a physical signal (‘Synchronization Shift’ or ‘SS’) to keep uplink synchronization. It needs to be refreshed every 5ms (every sub-frame). The resolution requirement is 1/8 chip as described in section 10.2 ‘Timing Advance’ of TR25.928 [10].
Because SS is served as a physical layer signal in 1.28 Mcps TDD, it needs to consider how to map this value onto data burst. When in random access procedure the SS control step should have a large range to quickly establish the uplink synchronization. While in normal working procedure to maintain the uplink synchronization it should use as little bits as possible to reduce the affection to the DPCH capacity. These considerations are described in section 10.2 ‘Timing Advance’ and section 8.2.2 ‘Coding of Synchronization Shift’ of TR25.928 [10].
Others section of 4.6.2.1 are common with 25.123 [3] |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.7 SYNC-UL Timing Deviation for 1.28 Mcps | This measurement refers to TS 25.225 [13]subsection 5.2.8.1. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.7.1 Accuracy requirements | Table 4.14
Parameter
Unit
Accuracy
Conditions
Range [chips]
SYNC-UL Timing Deviation
chips period
+/- 0.125
0, …, 255.875 |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.7.2 Range/mapping | The reporting range for SYNC-UL Timing Deviation is from 0 ... 255.875 chips.
In table 4.15 the mapping of the measured quantity is defined. Signaling range may be larger than the guaranteed accuracy range.
Table 4.15
Reported value
Measured quantity value
Unit
SYNC_UL_TIME_DEV_0000
SYNC-UL Timing Deviation < 0
chip
SYNC_UL_TIME_DEV_0001
0 SYNC-UL Timing Deviation < 0.125
chip
SYNC_UL_TIME_DEV_0002
0.125 SYNC-UL Timing Deviation < 0.25
chip
…
…
…
SYNC_UL_TIME_DEV_1024
127.875 SYNC-UL Timing Deviation < 128
chip
…
…
…
SYNC_UL_TIME_DEV_2045
255.625 SYNC-UL Timing Deviation < 255.75
chip
SYNC_UL_TIME_DEV_2046
255.75 SYNC-UL Timing Deviation < 255.875
chip
SYNC_UL_TIME_DEV_2047
255.875 SYNC-UL Timing Deviation
chip
NOTE: This measurement can be used for timing advance (synchronisation shift) calculation for uplink synchronisation or location services. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.1.7.3 Explanation difference | In 1.28 Mcps TDD there is a two step approach for the random access procedure. In the first step the UpPCH is transmitted by the UE. The node B received the UpPCH and responds with the FPACH which contains the received position of the SYNC-UL sequence. This allows the UE to adjust its timing advance for the PRACH in order to allow the node B to receive the PRACH synchronously with the other physicals channels in the time slot carrying the PRACH.
As there is a special time slot of random access in 3.84 Mcps TDD there is no need for this measurement in 3.84 Mcps TDD. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.2 Performance for UTRAN Measurements in Downlink (TX) | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.2.1 Transmitted carrier power | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.2.1.1 Explanation | These parameters in this section are not energy ,so they are independent with bandwidth . There need not to any change compare with the 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.6.2.2.2 Transmitted code power | Common with 3.84 Mcps TDD option.
4.6.2.2.2.1 explanation
These parameters in this section are not energy ,so they are independent with bandwidth. There need not to any change compare with the 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7 FPACH physical layer information field definition (1.28 Mcps TDD) | 1.28 Mcps TDD introduces the FPACH (Forward Physical Access CHannel) which carries physical layer information. Two of these information fields are the ‘received starting position of the UpPCH’ (Uplink Pilot CHannel) and the ‘transmit power level command for the RACH message’. Both information fields are directly (received starting position of the UpPCH) or can be indirectly (transmit power level command for the RACH message) derived from measurements but are no measurements themselves. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7.0 Explanation difference | In 1.28 Mcps TDD the random access procedure follows a two step approach. After the 1st step (UpPCH) the FPACH also carries the information fields related to the initialisation of uplink synchronisation control and uplink power control for the PRACH (2nd step). This is ensuring that the PRACH can be transmitted in the time slots carrying the DPCH. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7.1 Received starting position of the UpPCH (UpPCHPOS) (1.28 Mcps TDD) | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7.1.1 Range/mapping | Table 4.16
Range/mapping
UpPCHPOS FIELD is given with a resolution of 1/8 chip with the range [0,255.875] chip.
UpPCHPOS FIELD shall be transmitted in the FPACH where:
UpPCHPOS FIELD_LEV_0000: UpPCHPOS < 0 chip
UpPCHPOS FIELD_LEV_0001: 0 chip UpPCHPOS < 0.125 chip
UpPCHPOS FIELD_LEV_0002: 0.125 chip UpPCHPOS < 0.25 chip
...
UpPCHPOS FIELD_LEV_2045: 255.625 chip UpPCHPOS < 255.75 chip
UpPCHPOS FIELD_LEV_2046: 255.75 chip UpPCHPOS < 255.875 chip
UpPCHPOS FIELD_LEV_2047: 255.875 chip UpPCHPOS |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7.1.2 Accuracy requirements | Table 4.17
Parameter
Unit
Accuracy
Conditions
Range [chips]
Received starting position of the UpPCH
chips period
+/- 0.125
0, …, 255.875 |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7.2 Transmit Power Level Command for the RACH message (1.28 Mcps TDD) | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7.2.1 Range/mapping | Table 4.18
Range/mapping
PRXPRACH,des FIELD is given with a resolution of 0.5 dB with the range [-120,-80] dBm.
PRXPRACH,des FIELD shall be transmitted in the FPACH where:
PRXPRACH,des FIELD_LEV_00: PRXPRACH,des < -120 dBm
PRXPRACH,des FIELD_LEV_01: -120 dBm PRXPRACH,des < -119.5 dBm
PRXPRACH,des FIELD_LEV_02: -119.5 dBm PRXPRACH,des < -119 dBm
...
PRXPRACH,des FIELD_LEV_78: -81 dBm PRXPRACH,des < -80.5 dBm
PRXPRACH,des FIELD_LEV_79: -80.5 dBm PRXPRACH,des < -80 dBm
PRXPRACH,des FIELD_LEV_80: -80 dBm PRXPRACH,des |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 4.7.2.2 Accuracy requirements | Since this is a desired RX power at the node B and this is no measured value and the derivation of this value in the node B is implementation specific, accuracy requirements are not applicable. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5 UE Radio Transmission and Reception | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1 Frequency bands and channel arrangement | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.1 General | The information presented in this section is based on a chip rate of 1.28 Mcps. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.2 Frequency bands | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.3 TX–RX frequency separation | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.3.1 Description | No TX-RX frequency separation is required as Time Division Duplex (TDD) is employed. Each subframe of 1.28 Mcps TDD consists of 7 main timeslots (TS0 ~ TS6) where TS0 (before DL to UL switching point) are always allocated DL, the timeslots (at least the first one) before the switching point (vice versa) are allocated UL and the timeslots after the switching point (vice versa) are allocated DL. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.3.2 Explanation of difference | The frame structure for 3.84 Mcps TDD and 1.28 Mcps TDD is different. For 3.84 Mcps TDD, each TDMA frame consists of 15 timeslots where each timeslot can be allocated to either transmit or receive. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.4 Channel arrangement | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.4.1 Channel spacing | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.4.1.1 Background | The chip rate is 1.28 Mcps with a roll-off factor of 0.22, therefore the occupied bandwidth is1.6MHz. It is just nominal 1.6MHz, and it is also flexible to adjust the channel raster step 200kHz to narrow as 1.4MHz for strict requirement situations if needed. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.4.1.2 Channel spacing | The channel spacing for 1.28 Mcps chip rate option is 1.6MHz. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.4.2 Channel raster | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.1.4.3 Channel number | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2 Transmitter characteristics | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2.1 General | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2.2 Transmit power | |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2.2.1 User Equipment maximum output power | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2.3 UE frequency stability | Common with 3.84 Mcps TDD option. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2.4 Output power dynamics | Power control is used to limit the interference level. |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2.4.1 Open loop power control | Open loop power control is the ability of the UE transmitter to sets its output power to a specific value. The open loop power control tolerance is given in Table 5.1 |
1cc4b09fd057c9a5cf925fb9b5a5f4e7 | 25.945 | 5.2.4.1.1 Minimum requirement | The UE open loop power is defined as the average power in a timeslot or ON power duration, whichever is available, and they are measured with a filter that has a Root-Raised Cosine (RRC) filter response with a roll off and a bandwidth equal to the chip rate.
Table 5.1: Open loop power control
Normal conditions
± 9 dB
Extreme conditions
± 12 dB |
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