project
stringclasses 2
values | commit_id
stringlengths 40
40
| target
int64 0
1
| func
stringlengths 26
142k
| idx
int64 0
27.3k
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|---|---|---|---|---|
qemu | 3a55fc0f243104998bee5106b121cff257df5d33 | 1 | static void ivshmem_check_version(void *opaque, const uint8_t * buf, int size)
{
IVShmemState *s = opaque;
int tmp;
int64_t version;
if (!fifo_update_and_get_i64(s, buf, size, &version)) {
return;
}
tmp = qemu_chr_fe_get_msgfd(s->server_chr);
if (tmp != -1 || version != IVSHMEM_PROTOCOL_VERSION) {
fprintf(stderr, "incompatible version, you are connecting to a ivshmem-"
"server using a different protocol please check your setup\n");
qemu_chr_add_handlers(s->server_chr, NULL, NULL, NULL, s);
return;
}
IVSHMEM_DPRINTF("version check ok, switch to real chardev handler\n");
qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
NULL, s);
}
| 10,832 |
FFmpeg | 675cfb2f86a0bd76b0784da0c7ec9a9225e37353 | 1 | static int parse_dsd_prop(AVFormatContext *s, AVStream *st, uint64_t eof)
{
AVIOContext *pb = s->pb;
char abss[24];
int hour, min, sec, i, ret, config;
int dsd_layout[6];
ID3v2ExtraMeta *id3v2_extra_meta;
while (avio_tell(pb) + 12 <= eof) {
uint32_t tag = avio_rl32(pb);
uint64_t size = avio_rb64(pb);
uint64_t orig_pos = avio_tell(pb);
switch(tag) {
case MKTAG('A','B','S','S'):
if (size < 8)
return AVERROR_INVALIDDATA;
hour = avio_rb16(pb);
min = avio_r8(pb);
sec = avio_r8(pb);
snprintf(abss, sizeof(abss), "%02dh:%02dm:%02ds:%d", hour, min, sec, avio_rb32(pb));
av_dict_set(&st->metadata, "absolute_start_time", abss, 0);
break;
case MKTAG('C','H','N','L'):
if (size < 2)
return AVERROR_INVALIDDATA;
st->codecpar->channels = avio_rb16(pb);
if (size < 2 + st->codecpar->channels * 4)
return AVERROR_INVALIDDATA;
st->codecpar->channel_layout = 0;
if (st->codecpar->channels > FF_ARRAY_ELEMS(dsd_layout)) {
avpriv_request_sample(s, "channel layout");
break;
}
for (i = 0; i < st->codecpar->channels; i++)
dsd_layout[i] = avio_rl32(pb);
for (i = 0; i < FF_ARRAY_ELEMS(dsd_channel_layout); i++) {
const DSDLayoutDesc * d = &dsd_channel_layout[i];
if (av_get_channel_layout_nb_channels(d->layout) == st->codecpar->channels &&
!memcmp(d->dsd_layout, dsd_layout, st->codecpar->channels * sizeof(uint32_t))) {
st->codecpar->channel_layout = d->layout;
break;
}
}
break;
case MKTAG('C','M','P','R'):
if (size < 4)
return AVERROR_INVALIDDATA;
tag = avio_rl32(pb);
st->codecpar->codec_id = ff_codec_get_id(dsd_codec_tags, tag);
if (!st->codecpar->codec_id) {
av_log(s, AV_LOG_ERROR, "'%c%c%c%c' compression is not supported\n",
tag&0xFF, (tag>>8)&0xFF, (tag>>16)&0xFF, (tag>>24)&0xFF);
return AVERROR_PATCHWELCOME;
}
break;
case MKTAG('F','S',' ',' '):
if (size < 4)
return AVERROR_INVALIDDATA;
st->codecpar->sample_rate = avio_rb32(pb) / 8;
break;
case MKTAG('I','D','3',' '):
id3v2_extra_meta = NULL;
ff_id3v2_read(s, ID3v2_DEFAULT_MAGIC, &id3v2_extra_meta, size);
if (id3v2_extra_meta) {
if ((ret = ff_id3v2_parse_apic(s, &id3v2_extra_meta)) < 0) {
ff_id3v2_free_extra_meta(&id3v2_extra_meta);
return ret;
}
ff_id3v2_free_extra_meta(&id3v2_extra_meta);
}
if (size < avio_tell(pb) - orig_pos) {
av_log(s, AV_LOG_ERROR, "id3 exceeds chunk size\n");
return AVERROR_INVALIDDATA;
}
break;
case MKTAG('L','S','C','O'):
if (size < 2)
return AVERROR_INVALIDDATA;
config = avio_rb16(pb);
if (config != 0xFFFF) {
if (config < FF_ARRAY_ELEMS(dsd_loudspeaker_config))
st->codecpar->channel_layout = dsd_loudspeaker_config[config];
if (!st->codecpar->channel_layout)
avpriv_request_sample(s, "loudspeaker configuration %d", config);
}
break;
}
avio_skip(pb, size - (avio_tell(pb) - orig_pos) + (size & 1));
}
return 0;
}
| 10,833 |
FFmpeg | c89658008705d949c319df3fa6f400c481ad73e1 | 0 | static int tcp_read_packet(AVFormatContext *s, RTSPStream **prtsp_st,
uint8_t *buf, int buf_size)
{
RTSPState *rt = s->priv_data;
int id, len, i, ret;
RTSPStream *rtsp_st;
#ifdef DEBUG_RTP_TCP
dprintf(s, "tcp_read_packet:\n");
#endif
redo:
for(;;) {
RTSPMessageHeader reply;
ret = rtsp_read_reply(s, &reply, NULL, 1);
if (ret == -1)
return -1;
if (ret == 1) /* received '$' */
break;
/* XXX: parse message */
if (rt->state != RTSP_STATE_PLAYING)
return 0;
}
ret = url_read_complete(rt->rtsp_hd, buf, 3);
if (ret != 3)
return -1;
id = buf[0];
len = AV_RB16(buf + 1);
#ifdef DEBUG_RTP_TCP
dprintf(s, "id=%d len=%d\n", id, len);
#endif
if (len > buf_size || len < 12)
goto redo;
/* get the data */
ret = url_read_complete(rt->rtsp_hd, buf, len);
if (ret != len)
return -1;
if (rt->transport == RTSP_TRANSPORT_RDT &&
ff_rdt_parse_header(buf, len, &id, NULL, NULL, NULL, NULL) < 0)
return -1;
/* find the matching stream */
for(i = 0; i < rt->nb_rtsp_streams; i++) {
rtsp_st = rt->rtsp_streams[i];
if (id >= rtsp_st->interleaved_min &&
id <= rtsp_st->interleaved_max)
goto found;
}
goto redo;
found:
*prtsp_st = rtsp_st;
return len;
}
| 10,834 |
FFmpeg | 1ea3c03743ec6a7c33312896de3bbdbe7f60d0f5 | 1 | static int read_ts(const char *s, int64_t *start, int *duration)
{
int64_t end;
int hh1, mm1, ss1, ms1;
int hh2, mm2, ss2, ms2;
if (sscanf(s, "%u:%u:%u.%u,%u:%u:%u.%u",
&hh1, &mm1, &ss1, &ms1, &hh2, &mm2, &ss2, &ms2) == 8) {
end = (hh2*3600 + mm2*60 + ss2) * 100 + ms2;
*start = (hh1*3600 + mm1*60 + ss1) * 100 + ms1;
*duration = end - *start;
return 0;
}
return -1;
}
| 10,837 |
FFmpeg | a9d4a6ef3437d316450c2e30b9ed6a8fd4df4804 | 1 | static int rm_read_header_old(AVFormatContext *s, AVFormatParameters *ap)
{
RMContext *rm = s->priv_data;
AVStream *st;
rm->old_format = 1;
st = av_new_stream(s, 0);
if (!st)
goto fail;
rm_read_audio_stream_info(s, st, 1);
return 0;
fail:
return -1;
}
| 10,838 |
qemu | 60fe637bf0e4d7989e21e50f52526444765c63b4 | 1 | static void alloc_aio_bitmap(BlkMigDevState *bmds)
{
BlockDriverState *bs = bmds->bs;
int64_t bitmap_size;
bitmap_size = bdrv_nb_sectors(bs) + BDRV_SECTORS_PER_DIRTY_CHUNK * 8 - 1;
bitmap_size /= BDRV_SECTORS_PER_DIRTY_CHUNK * 8;
bmds->aio_bitmap = g_malloc0(bitmap_size);
}
| 10,839 |
qemu | 7fb394ad8a7c4609cefa2136dec16cf65d028f40 | 1 | static uint8_t *xen_map_cache_unlocked(hwaddr phys_addr, hwaddr size,
uint8_t lock, bool dma)
{
MapCacheEntry *entry, *pentry = NULL;
hwaddr address_index;
hwaddr address_offset;
hwaddr cache_size = size;
hwaddr test_bit_size;
bool translated G_GNUC_UNUSED = false;
bool dummy = false;
tryagain:
address_index = phys_addr >> MCACHE_BUCKET_SHIFT;
address_offset = phys_addr & (MCACHE_BUCKET_SIZE - 1);
trace_xen_map_cache(phys_addr);
/* test_bit_size is always a multiple of XC_PAGE_SIZE */
if (size) {
test_bit_size = size + (phys_addr & (XC_PAGE_SIZE - 1));
if (test_bit_size % XC_PAGE_SIZE) {
test_bit_size += XC_PAGE_SIZE - (test_bit_size % XC_PAGE_SIZE);
}
} else {
test_bit_size = XC_PAGE_SIZE;
}
if (mapcache->last_entry != NULL &&
mapcache->last_entry->paddr_index == address_index &&
!lock && !size &&
test_bits(address_offset >> XC_PAGE_SHIFT,
test_bit_size >> XC_PAGE_SHIFT,
mapcache->last_entry->valid_mapping)) {
trace_xen_map_cache_return(mapcache->last_entry->vaddr_base + address_offset);
return mapcache->last_entry->vaddr_base + address_offset;
}
/* size is always a multiple of MCACHE_BUCKET_SIZE */
if (size) {
cache_size = size + address_offset;
if (cache_size % MCACHE_BUCKET_SIZE) {
cache_size += MCACHE_BUCKET_SIZE - (cache_size % MCACHE_BUCKET_SIZE);
}
} else {
cache_size = MCACHE_BUCKET_SIZE;
}
entry = &mapcache->entry[address_index % mapcache->nr_buckets];
while (entry && entry->lock && entry->vaddr_base &&
(entry->paddr_index != address_index || entry->size != cache_size ||
!test_bits(address_offset >> XC_PAGE_SHIFT,
test_bit_size >> XC_PAGE_SHIFT,
entry->valid_mapping))) {
pentry = entry;
entry = entry->next;
}
if (!entry) {
entry = g_malloc0(sizeof (MapCacheEntry));
pentry->next = entry;
xen_remap_bucket(entry, NULL, cache_size, address_index, dummy);
} else if (!entry->lock) {
if (!entry->vaddr_base || entry->paddr_index != address_index ||
entry->size != cache_size ||
!test_bits(address_offset >> XC_PAGE_SHIFT,
test_bit_size >> XC_PAGE_SHIFT,
entry->valid_mapping)) {
xen_remap_bucket(entry, NULL, cache_size, address_index, dummy);
}
}
if(!test_bits(address_offset >> XC_PAGE_SHIFT,
test_bit_size >> XC_PAGE_SHIFT,
entry->valid_mapping)) {
mapcache->last_entry = NULL;
#ifdef XEN_COMPAT_PHYSMAP
if (!translated && mapcache->phys_offset_to_gaddr) {
phys_addr = mapcache->phys_offset_to_gaddr(phys_addr, size, mapcache->opaque);
translated = true;
goto tryagain;
}
#endif
if (!dummy && runstate_check(RUN_STATE_INMIGRATE)) {
dummy = true;
goto tryagain;
}
trace_xen_map_cache_return(NULL);
return NULL;
}
mapcache->last_entry = entry;
if (lock) {
MapCacheRev *reventry = g_malloc0(sizeof(MapCacheRev));
entry->lock++;
reventry->dma = dma;
reventry->vaddr_req = mapcache->last_entry->vaddr_base + address_offset;
reventry->paddr_index = mapcache->last_entry->paddr_index;
reventry->size = entry->size;
QTAILQ_INSERT_HEAD(&mapcache->locked_entries, reventry, next);
}
trace_xen_map_cache_return(mapcache->last_entry->vaddr_base + address_offset);
return mapcache->last_entry->vaddr_base + address_offset;
}
| 10,841 |
qemu | 3b3284486be6898937395fac3ddbd2e68c5cb52f | 1 | static void disas_arm_insn(CPUARMState * env, DisasContext *s)
{
unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh;
TCGv tmp;
TCGv tmp2;
TCGv tmp3;
TCGv addr;
TCGv_i64 tmp64;
insn = arm_ldl_code(env, s->pc, s->bswap_code);
s->pc += 4;
/* M variants do not implement ARM mode. */
if (IS_M(env))
goto illegal_op;
cond = insn >> 28;
if (cond == 0xf){
/* In ARMv3 and v4 the NV condition is UNPREDICTABLE; we
* choose to UNDEF. In ARMv5 and above the space is used
* for miscellaneous unconditional instructions.
*/
ARCH(5);
/* Unconditional instructions. */
if (((insn >> 25) & 7) == 1) {
/* NEON Data processing. */
if (!arm_feature(env, ARM_FEATURE_NEON))
goto illegal_op;
if (disas_neon_data_insn(env, s, insn))
goto illegal_op;
}
if ((insn & 0x0f100000) == 0x04000000) {
/* NEON load/store. */
if (!arm_feature(env, ARM_FEATURE_NEON))
goto illegal_op;
if (disas_neon_ls_insn(env, s, insn))
goto illegal_op;
}
if (((insn & 0x0f30f000) == 0x0510f000) ||
((insn & 0x0f30f010) == 0x0710f000)) {
if ((insn & (1 << 22)) == 0) {
/* PLDW; v7MP */
if (!arm_feature(env, ARM_FEATURE_V7MP)) {
goto illegal_op;
}
}
/* Otherwise PLD; v5TE+ */
ARCH(5TE);
}
if (((insn & 0x0f70f000) == 0x0450f000) ||
((insn & 0x0f70f010) == 0x0650f000)) {
ARCH(7);
return; /* PLI; V7 */
}
if (((insn & 0x0f700000) == 0x04100000) ||
((insn & 0x0f700010) == 0x06100000)) {
if (!arm_feature(env, ARM_FEATURE_V7MP)) {
goto illegal_op;
}
return; /* v7MP: Unallocated memory hint: must NOP */
}
if ((insn & 0x0ffffdff) == 0x01010000) {
ARCH(6);
/* setend */
if (((insn >> 9) & 1) != s->bswap_code) {
/* Dynamic endianness switching not implemented. */
goto illegal_op;
}
} else if ((insn & 0x0fffff00) == 0x057ff000) {
switch ((insn >> 4) & 0xf) {
case 1: /* clrex */
ARCH(6K);
gen_clrex(s);
case 4: /* dsb */
case 5: /* dmb */
case 6: /* isb */
ARCH(7);
/* We don't emulate caches so these are a no-op. */
default:
goto illegal_op;
}
} else if ((insn & 0x0e5fffe0) == 0x084d0500) {
/* srs */
if (IS_USER(s)) {
goto illegal_op;
}
ARCH(6);
gen_srs(s, (insn & 0x1f), (insn >> 23) & 3, insn & (1 << 21));
} else if ((insn & 0x0e50ffe0) == 0x08100a00) {
/* rfe */
int32_t offset;
if (IS_USER(s))
goto illegal_op;
ARCH(6);
rn = (insn >> 16) & 0xf;
addr = load_reg(s, rn);
i = (insn >> 23) & 3;
switch (i) {
case 0: offset = -4; break; /* DA */
case 1: offset = 0; break; /* IA */
case 2: offset = -8; break; /* DB */
case 3: offset = 4; break; /* IB */
default: abort();
}
if (offset)
tcg_gen_addi_i32(addr, addr, offset);
/* Load PC into tmp and CPSR into tmp2. */
tmp = gen_ld32(addr, 0);
tcg_gen_addi_i32(addr, addr, 4);
tmp2 = gen_ld32(addr, 0);
if (insn & (1 << 21)) {
/* Base writeback. */
switch (i) {
case 0: offset = -8; break;
case 1: offset = 4; break;
case 2: offset = -4; break;
case 3: offset = 0; break;
default: abort();
}
if (offset)
tcg_gen_addi_i32(addr, addr, offset);
store_reg(s, rn, addr);
} else {
tcg_temp_free_i32(addr);
}
gen_rfe(s, tmp, tmp2);
} else if ((insn & 0x0e000000) == 0x0a000000) {
/* branch link and change to thumb (blx <offset>) */
int32_t offset;
val = (uint32_t)s->pc;
tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, val);
store_reg(s, 14, tmp);
/* Sign-extend the 24-bit offset */
offset = (((int32_t)insn) << 8) >> 8;
/* offset * 4 + bit24 * 2 + (thumb bit) */
val += (offset << 2) | ((insn >> 23) & 2) | 1;
/* pipeline offset */
val += 4;
/* protected by ARCH(5); above, near the start of uncond block */
gen_bx_im(s, val);
} else if ((insn & 0x0e000f00) == 0x0c000100) {
if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
/* iWMMXt register transfer. */
if (env->cp15.c15_cpar & (1 << 1))
if (!disas_iwmmxt_insn(env, s, insn))
}
} else if ((insn & 0x0fe00000) == 0x0c400000) {
/* Coprocessor double register transfer. */
ARCH(5TE);
} else if ((insn & 0x0f000010) == 0x0e000010) {
/* Additional coprocessor register transfer. */
} else if ((insn & 0x0ff10020) == 0x01000000) {
uint32_t mask;
uint32_t val;
/* cps (privileged) */
if (IS_USER(s))
mask = val = 0;
if (insn & (1 << 19)) {
if (insn & (1 << 8))
mask |= CPSR_A;
if (insn & (1 << 7))
mask |= CPSR_I;
if (insn & (1 << 6))
mask |= CPSR_F;
if (insn & (1 << 18))
val |= mask;
}
if (insn & (1 << 17)) {
mask |= CPSR_M;
val |= (insn & 0x1f);
}
if (mask) {
gen_set_psr_im(s, mask, 0, val);
}
}
goto illegal_op;
}
if (cond != 0xe) {
/* if not always execute, we generate a conditional jump to
next instruction */
s->condlabel = gen_new_label();
gen_test_cc(cond ^ 1, s->condlabel);
s->condjmp = 1;
}
if ((insn & 0x0f900000) == 0x03000000) {
if ((insn & (1 << 21)) == 0) {
ARCH(6T2);
rd = (insn >> 12) & 0xf;
val = ((insn >> 4) & 0xf000) | (insn & 0xfff);
if ((insn & (1 << 22)) == 0) {
/* MOVW */
tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, val);
} else {
/* MOVT */
tmp = load_reg(s, rd);
tcg_gen_ext16u_i32(tmp, tmp);
tcg_gen_ori_i32(tmp, tmp, val << 16);
}
store_reg(s, rd, tmp);
} else {
if (((insn >> 12) & 0xf) != 0xf)
goto illegal_op;
if (((insn >> 16) & 0xf) == 0) {
gen_nop_hint(s, insn & 0xff);
} else {
/* CPSR = immediate */
val = insn & 0xff;
shift = ((insn >> 8) & 0xf) * 2;
if (shift)
val = (val >> shift) | (val << (32 - shift));
i = ((insn & (1 << 22)) != 0);
if (gen_set_psr_im(s, msr_mask(env, s, (insn >> 16) & 0xf, i), i, val))
goto illegal_op;
}
}
} else if ((insn & 0x0f900000) == 0x01000000
&& (insn & 0x00000090) != 0x00000090) {
/* miscellaneous instructions */
op1 = (insn >> 21) & 3;
sh = (insn >> 4) & 0xf;
rm = insn & 0xf;
switch (sh) {
case 0x0: /* move program status register */
if (op1 & 1) {
/* PSR = reg */
tmp = load_reg(s, rm);
i = ((op1 & 2) != 0);
if (gen_set_psr(s, msr_mask(env, s, (insn >> 16) & 0xf, i), i, tmp))
goto illegal_op;
} else {
/* reg = PSR */
rd = (insn >> 12) & 0xf;
if (op1 & 2) {
if (IS_USER(s))
goto illegal_op;
tmp = load_cpu_field(spsr);
} else {
tmp = tcg_temp_new_i32();
gen_helper_cpsr_read(tmp, cpu_env);
}
store_reg(s, rd, tmp);
}
break;
case 0x1:
if (op1 == 1) {
/* branch/exchange thumb (bx). */
ARCH(4T);
tmp = load_reg(s, rm);
gen_bx(s, tmp);
} else if (op1 == 3) {
/* clz */
ARCH(5);
rd = (insn >> 12) & 0xf;
tmp = load_reg(s, rm);
gen_helper_clz(tmp, tmp);
store_reg(s, rd, tmp);
} else {
goto illegal_op;
}
break;
case 0x2:
if (op1 == 1) {
ARCH(5J); /* bxj */
/* Trivial implementation equivalent to bx. */
tmp = load_reg(s, rm);
gen_bx(s, tmp);
} else {
goto illegal_op;
}
break;
case 0x3:
if (op1 != 1)
goto illegal_op;
ARCH(5);
/* branch link/exchange thumb (blx) */
tmp = load_reg(s, rm);
tmp2 = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp2, s->pc);
store_reg(s, 14, tmp2);
gen_bx(s, tmp);
break;
case 0x5: /* saturating add/subtract */
ARCH(5TE);
rd = (insn >> 12) & 0xf;
rn = (insn >> 16) & 0xf;
tmp = load_reg(s, rm);
tmp2 = load_reg(s, rn);
if (op1 & 2)
gen_helper_double_saturate(tmp2, cpu_env, tmp2);
if (op1 & 1)
gen_helper_sub_saturate(tmp, cpu_env, tmp, tmp2);
else
gen_helper_add_saturate(tmp, cpu_env, tmp, tmp2);
tcg_temp_free_i32(tmp2);
store_reg(s, rd, tmp);
break;
case 7:
/* SMC instruction (op1 == 3)
and undefined instructions (op1 == 0 || op1 == 2)
will trap */
if (op1 != 1) {
goto illegal_op;
}
/* bkpt */
ARCH(5);
gen_exception_insn(s, 4, EXCP_BKPT);
break;
case 0x8: /* signed multiply */
case 0xa:
case 0xc:
case 0xe:
ARCH(5TE);
rs = (insn >> 8) & 0xf;
rn = (insn >> 12) & 0xf;
rd = (insn >> 16) & 0xf;
if (op1 == 1) {
/* (32 * 16) >> 16 */
tmp = load_reg(s, rm);
tmp2 = load_reg(s, rs);
if (sh & 4)
tcg_gen_sari_i32(tmp2, tmp2, 16);
else
gen_sxth(tmp2);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
tcg_gen_shri_i64(tmp64, tmp64, 16);
tmp = tcg_temp_new_i32();
tcg_gen_trunc_i64_i32(tmp, tmp64);
tcg_temp_free_i64(tmp64);
if ((sh & 2) == 0) {
tmp2 = load_reg(s, rn);
gen_helper_add_setq(tmp, cpu_env, tmp, tmp2);
tcg_temp_free_i32(tmp2);
}
store_reg(s, rd, tmp);
} else {
/* 16 * 16 */
tmp = load_reg(s, rm);
tmp2 = load_reg(s, rs);
gen_mulxy(tmp, tmp2, sh & 2, sh & 4);
tcg_temp_free_i32(tmp2);
if (op1 == 2) {
tmp64 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp64, tmp);
tcg_temp_free_i32(tmp);
gen_addq(s, tmp64, rn, rd);
gen_storeq_reg(s, rn, rd, tmp64);
tcg_temp_free_i64(tmp64);
} else {
if (op1 == 0) {
tmp2 = load_reg(s, rn);
gen_helper_add_setq(tmp, cpu_env, tmp, tmp2);
tcg_temp_free_i32(tmp2);
}
store_reg(s, rd, tmp);
}
}
break;
default:
goto illegal_op;
}
} else if (((insn & 0x0e000000) == 0 &&
(insn & 0x00000090) != 0x90) ||
((insn & 0x0e000000) == (1 << 25))) {
int set_cc, logic_cc, shiftop;
op1 = (insn >> 21) & 0xf;
set_cc = (insn >> 20) & 1;
logic_cc = table_logic_cc[op1] & set_cc;
/* data processing instruction */
if (insn & (1 << 25)) {
/* immediate operand */
val = insn & 0xff;
shift = ((insn >> 8) & 0xf) * 2;
if (shift) {
val = (val >> shift) | (val << (32 - shift));
}
tmp2 = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp2, val);
if (logic_cc && shift) {
gen_set_CF_bit31(tmp2);
}
} else {
/* register */
rm = (insn) & 0xf;
tmp2 = load_reg(s, rm);
shiftop = (insn >> 5) & 3;
if (!(insn & (1 << 4))) {
shift = (insn >> 7) & 0x1f;
gen_arm_shift_im(tmp2, shiftop, shift, logic_cc);
} else {
rs = (insn >> 8) & 0xf;
tmp = load_reg(s, rs);
gen_arm_shift_reg(tmp2, shiftop, tmp, logic_cc);
}
}
if (op1 != 0x0f && op1 != 0x0d) {
rn = (insn >> 16) & 0xf;
tmp = load_reg(s, rn);
} else {
TCGV_UNUSED(tmp);
}
rd = (insn >> 12) & 0xf;
switch(op1) {
case 0x00:
tcg_gen_and_i32(tmp, tmp, tmp2);
if (logic_cc) {
gen_logic_CC(tmp);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x01:
tcg_gen_xor_i32(tmp, tmp, tmp2);
if (logic_cc) {
gen_logic_CC(tmp);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x02:
if (set_cc && rd == 15) {
/* SUBS r15, ... is used for exception return. */
if (IS_USER(s)) {
goto illegal_op;
}
gen_sub_CC(tmp, tmp, tmp2);
gen_exception_return(s, tmp);
} else {
if (set_cc) {
gen_sub_CC(tmp, tmp, tmp2);
} else {
tcg_gen_sub_i32(tmp, tmp, tmp2);
}
store_reg_bx(env, s, rd, tmp);
}
break;
case 0x03:
if (set_cc) {
gen_sub_CC(tmp, tmp2, tmp);
} else {
tcg_gen_sub_i32(tmp, tmp2, tmp);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x04:
if (set_cc) {
gen_add_CC(tmp, tmp, tmp2);
} else {
tcg_gen_add_i32(tmp, tmp, tmp2);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x05:
if (set_cc) {
gen_adc_CC(tmp, tmp, tmp2);
} else {
gen_add_carry(tmp, tmp, tmp2);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x06:
if (set_cc) {
gen_sbc_CC(tmp, tmp, tmp2);
} else {
gen_sub_carry(tmp, tmp, tmp2);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x07:
if (set_cc) {
gen_sbc_CC(tmp, tmp2, tmp);
} else {
gen_sub_carry(tmp, tmp2, tmp);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x08:
if (set_cc) {
tcg_gen_and_i32(tmp, tmp, tmp2);
gen_logic_CC(tmp);
}
tcg_temp_free_i32(tmp);
break;
case 0x09:
if (set_cc) {
tcg_gen_xor_i32(tmp, tmp, tmp2);
gen_logic_CC(tmp);
}
tcg_temp_free_i32(tmp);
break;
case 0x0a:
if (set_cc) {
gen_sub_CC(tmp, tmp, tmp2);
}
tcg_temp_free_i32(tmp);
break;
case 0x0b:
if (set_cc) {
gen_add_CC(tmp, tmp, tmp2);
}
tcg_temp_free_i32(tmp);
break;
case 0x0c:
tcg_gen_or_i32(tmp, tmp, tmp2);
if (logic_cc) {
gen_logic_CC(tmp);
}
store_reg_bx(env, s, rd, tmp);
break;
case 0x0d:
if (logic_cc && rd == 15) {
/* MOVS r15, ... is used for exception return. */
if (IS_USER(s)) {
goto illegal_op;
}
gen_exception_return(s, tmp2);
} else {
if (logic_cc) {
gen_logic_CC(tmp2);
}
store_reg_bx(env, s, rd, tmp2);
}
break;
case 0x0e:
tcg_gen_andc_i32(tmp, tmp, tmp2);
if (logic_cc) {
gen_logic_CC(tmp);
}
store_reg_bx(env, s, rd, tmp);
break;
default:
case 0x0f:
tcg_gen_not_i32(tmp2, tmp2);
if (logic_cc) {
gen_logic_CC(tmp2);
}
store_reg_bx(env, s, rd, tmp2);
break;
}
if (op1 != 0x0f && op1 != 0x0d) {
tcg_temp_free_i32(tmp2);
}
} else {
/* other instructions */
op1 = (insn >> 24) & 0xf;
switch(op1) {
case 0x0:
case 0x1:
/* multiplies, extra load/stores */
sh = (insn >> 5) & 3;
if (sh == 0) {
if (op1 == 0x0) {
rd = (insn >> 16) & 0xf;
rn = (insn >> 12) & 0xf;
rs = (insn >> 8) & 0xf;
rm = (insn) & 0xf;
op1 = (insn >> 20) & 0xf;
switch (op1) {
case 0: case 1: case 2: case 3: case 6:
/* 32 bit mul */
tmp = load_reg(s, rs);
tmp2 = load_reg(s, rm);
tcg_gen_mul_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
if (insn & (1 << 22)) {
/* Subtract (mls) */
ARCH(6T2);
tmp2 = load_reg(s, rn);
tcg_gen_sub_i32(tmp, tmp2, tmp);
tcg_temp_free_i32(tmp2);
} else if (insn & (1 << 21)) {
/* Add */
tmp2 = load_reg(s, rn);
tcg_gen_add_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
}
if (insn & (1 << 20))
gen_logic_CC(tmp);
store_reg(s, rd, tmp);
break;
case 4:
/* 64 bit mul double accumulate (UMAAL) */
ARCH(6);
tmp = load_reg(s, rs);
tmp2 = load_reg(s, rm);
tmp64 = gen_mulu_i64_i32(tmp, tmp2);
gen_addq_lo(s, tmp64, rn);
gen_addq_lo(s, tmp64, rd);
gen_storeq_reg(s, rn, rd, tmp64);
tcg_temp_free_i64(tmp64);
break;
case 8: case 9: case 10: case 11:
case 12: case 13: case 14: case 15:
/* 64 bit mul: UMULL, UMLAL, SMULL, SMLAL. */
tmp = load_reg(s, rs);
tmp2 = load_reg(s, rm);
if (insn & (1 << 22)) {
tcg_gen_muls2_i32(tmp, tmp2, tmp, tmp2);
} else {
tcg_gen_mulu2_i32(tmp, tmp2, tmp, tmp2);
}
if (insn & (1 << 21)) { /* mult accumulate */
TCGv al = load_reg(s, rn);
TCGv ah = load_reg(s, rd);
tcg_gen_add2_i32(tmp, tmp2, tmp, tmp2, al, ah);
tcg_temp_free(al);
tcg_temp_free(ah);
}
if (insn & (1 << 20)) {
gen_logicq_cc(tmp, tmp2);
}
store_reg(s, rn, tmp);
store_reg(s, rd, tmp2);
break;
default:
goto illegal_op;
}
} else {
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
if (insn & (1 << 23)) {
/* load/store exclusive */
op1 = (insn >> 21) & 0x3;
if (op1)
ARCH(6K);
else
ARCH(6);
addr = tcg_temp_local_new_i32();
load_reg_var(s, addr, rn);
if (insn & (1 << 20)) {
switch (op1) {
case 0: /* ldrex */
gen_load_exclusive(s, rd, 15, addr, 2);
break;
case 1: /* ldrexd */
gen_load_exclusive(s, rd, rd + 1, addr, 3);
break;
case 2: /* ldrexb */
gen_load_exclusive(s, rd, 15, addr, 0);
break;
case 3: /* ldrexh */
gen_load_exclusive(s, rd, 15, addr, 1);
break;
default:
abort();
}
} else {
rm = insn & 0xf;
switch (op1) {
case 0: /* strex */
gen_store_exclusive(s, rd, rm, 15, addr, 2);
break;
case 1: /* strexd */
gen_store_exclusive(s, rd, rm, rm + 1, addr, 3);
break;
case 2: /* strexb */
gen_store_exclusive(s, rd, rm, 15, addr, 0);
break;
case 3: /* strexh */
gen_store_exclusive(s, rd, rm, 15, addr, 1);
break;
default:
abort();
}
}
tcg_temp_free(addr);
} else {
/* SWP instruction */
rm = (insn) & 0xf;
/* ??? This is not really atomic. However we know
we never have multiple CPUs running in parallel,
so it is good enough. */
addr = load_reg(s, rn);
tmp = load_reg(s, rm);
if (insn & (1 << 22)) {
tmp2 = gen_ld8u(addr, IS_USER(s));
gen_st8(tmp, addr, IS_USER(s));
} else {
tmp2 = gen_ld32(addr, IS_USER(s));
gen_st32(tmp, addr, IS_USER(s));
}
tcg_temp_free_i32(addr);
store_reg(s, rd, tmp2);
}
}
} else {
int address_offset;
int load;
/* Misc load/store */
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
addr = load_reg(s, rn);
if (insn & (1 << 24))
gen_add_datah_offset(s, insn, 0, addr);
address_offset = 0;
if (insn & (1 << 20)) {
/* load */
switch(sh) {
case 1:
tmp = gen_ld16u(addr, IS_USER(s));
break;
case 2:
tmp = gen_ld8s(addr, IS_USER(s));
break;
default:
case 3:
tmp = gen_ld16s(addr, IS_USER(s));
break;
}
load = 1;
} else if (sh & 2) {
ARCH(5TE);
/* doubleword */
if (sh & 1) {
/* store */
tmp = load_reg(s, rd);
gen_st32(tmp, addr, IS_USER(s));
tcg_gen_addi_i32(addr, addr, 4);
tmp = load_reg(s, rd + 1);
gen_st32(tmp, addr, IS_USER(s));
load = 0;
} else {
/* load */
tmp = gen_ld32(addr, IS_USER(s));
store_reg(s, rd, tmp);
tcg_gen_addi_i32(addr, addr, 4);
tmp = gen_ld32(addr, IS_USER(s));
rd++;
load = 1;
}
address_offset = -4;
} else {
/* store */
tmp = load_reg(s, rd);
gen_st16(tmp, addr, IS_USER(s));
load = 0;
}
/* Perform base writeback before the loaded value to
ensure correct behavior with overlapping index registers.
ldrd with base writeback is is undefined if the
destination and index registers overlap. */
if (!(insn & (1 << 24))) {
gen_add_datah_offset(s, insn, address_offset, addr);
store_reg(s, rn, addr);
} else if (insn & (1 << 21)) {
if (address_offset)
tcg_gen_addi_i32(addr, addr, address_offset);
store_reg(s, rn, addr);
} else {
tcg_temp_free_i32(addr);
}
if (load) {
/* Complete the load. */
store_reg(s, rd, tmp);
}
}
break;
case 0x4:
case 0x5:
goto do_ldst;
case 0x6:
case 0x7:
if (insn & (1 << 4)) {
ARCH(6);
/* Armv6 Media instructions. */
rm = insn & 0xf;
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
rs = (insn >> 8) & 0xf;
switch ((insn >> 23) & 3) {
case 0: /* Parallel add/subtract. */
op1 = (insn >> 20) & 7;
tmp = load_reg(s, rn);
tmp2 = load_reg(s, rm);
sh = (insn >> 5) & 7;
if ((op1 & 3) == 0 || sh == 5 || sh == 6)
goto illegal_op;
gen_arm_parallel_addsub(op1, sh, tmp, tmp2);
tcg_temp_free_i32(tmp2);
store_reg(s, rd, tmp);
break;
case 1:
if ((insn & 0x00700020) == 0) {
/* Halfword pack. */
tmp = load_reg(s, rn);
tmp2 = load_reg(s, rm);
shift = (insn >> 7) & 0x1f;
if (insn & (1 << 6)) {
/* pkhtb */
if (shift == 0)
shift = 31;
tcg_gen_sari_i32(tmp2, tmp2, shift);
tcg_gen_andi_i32(tmp, tmp, 0xffff0000);
tcg_gen_ext16u_i32(tmp2, tmp2);
} else {
/* pkhbt */
if (shift)
tcg_gen_shli_i32(tmp2, tmp2, shift);
tcg_gen_ext16u_i32(tmp, tmp);
tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000);
}
tcg_gen_or_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
store_reg(s, rd, tmp);
} else if ((insn & 0x00200020) == 0x00200000) {
/* [us]sat */
tmp = load_reg(s, rm);
shift = (insn >> 7) & 0x1f;
if (insn & (1 << 6)) {
if (shift == 0)
shift = 31;
tcg_gen_sari_i32(tmp, tmp, shift);
} else {
tcg_gen_shli_i32(tmp, tmp, shift);
}
sh = (insn >> 16) & 0x1f;
tmp2 = tcg_const_i32(sh);
if (insn & (1 << 22))
gen_helper_usat(tmp, cpu_env, tmp, tmp2);
else
gen_helper_ssat(tmp, cpu_env, tmp, tmp2);
tcg_temp_free_i32(tmp2);
store_reg(s, rd, tmp);
} else if ((insn & 0x00300fe0) == 0x00200f20) {
/* [us]sat16 */
tmp = load_reg(s, rm);
sh = (insn >> 16) & 0x1f;
tmp2 = tcg_const_i32(sh);
if (insn & (1 << 22))
gen_helper_usat16(tmp, cpu_env, tmp, tmp2);
else
gen_helper_ssat16(tmp, cpu_env, tmp, tmp2);
tcg_temp_free_i32(tmp2);
store_reg(s, rd, tmp);
} else if ((insn & 0x00700fe0) == 0x00000fa0) {
/* Select bytes. */
tmp = load_reg(s, rn);
tmp2 = load_reg(s, rm);
tmp3 = tcg_temp_new_i32();
tcg_gen_ld_i32(tmp3, cpu_env, offsetof(CPUARMState, GE));
gen_helper_sel_flags(tmp, tmp3, tmp, tmp2);
tcg_temp_free_i32(tmp3);
tcg_temp_free_i32(tmp2);
store_reg(s, rd, tmp);
} else if ((insn & 0x000003e0) == 0x00000060) {
tmp = load_reg(s, rm);
shift = (insn >> 10) & 3;
/* ??? In many cases it's not necessary to do a
rotate, a shift is sufficient. */
if (shift != 0)
tcg_gen_rotri_i32(tmp, tmp, shift * 8);
op1 = (insn >> 20) & 7;
switch (op1) {
case 0: gen_sxtb16(tmp); break;
case 2: gen_sxtb(tmp); break;
case 3: gen_sxth(tmp); break;
case 4: gen_uxtb16(tmp); break;
case 6: gen_uxtb(tmp); break;
case 7: gen_uxth(tmp); break;
default: goto illegal_op;
}
if (rn != 15) {
tmp2 = load_reg(s, rn);
if ((op1 & 3) == 0) {
gen_add16(tmp, tmp2);
} else {
tcg_gen_add_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
}
}
store_reg(s, rd, tmp);
} else if ((insn & 0x003f0f60) == 0x003f0f20) {
/* rev */
tmp = load_reg(s, rm);
if (insn & (1 << 22)) {
if (insn & (1 << 7)) {
gen_revsh(tmp);
} else {
ARCH(6T2);
gen_helper_rbit(tmp, tmp);
}
} else {
if (insn & (1 << 7))
gen_rev16(tmp);
else
tcg_gen_bswap32_i32(tmp, tmp);
}
store_reg(s, rd, tmp);
} else {
goto illegal_op;
}
break;
case 2: /* Multiplies (Type 3). */
switch ((insn >> 20) & 0x7) {
case 5:
if (((insn >> 6) ^ (insn >> 7)) & 1) {
/* op2 not 00x or 11x : UNDEF */
goto illegal_op;
}
/* Signed multiply most significant [accumulate].
(SMMUL, SMMLA, SMMLS) */
tmp = load_reg(s, rm);
tmp2 = load_reg(s, rs);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
if (rd != 15) {
tmp = load_reg(s, rd);
if (insn & (1 << 6)) {
tmp64 = gen_subq_msw(tmp64, tmp);
} else {
tmp64 = gen_addq_msw(tmp64, tmp);
}
}
if (insn & (1 << 5)) {
tcg_gen_addi_i64(tmp64, tmp64, 0x80000000u);
}
tcg_gen_shri_i64(tmp64, tmp64, 32);
tmp = tcg_temp_new_i32();
tcg_gen_trunc_i64_i32(tmp, tmp64);
tcg_temp_free_i64(tmp64);
store_reg(s, rn, tmp);
break;
case 0:
case 4:
/* SMLAD, SMUAD, SMLSD, SMUSD, SMLALD, SMLSLD */
if (insn & (1 << 7)) {
goto illegal_op;
}
tmp = load_reg(s, rm);
tmp2 = load_reg(s, rs);
if (insn & (1 << 5))
gen_swap_half(tmp2);
gen_smul_dual(tmp, tmp2);
if (insn & (1 << 6)) {
/* This subtraction cannot overflow. */
tcg_gen_sub_i32(tmp, tmp, tmp2);
} else {
/* This addition cannot overflow 32 bits;
* however it may overflow considered as a signed
* operation, in which case we must set the Q flag.
*/
gen_helper_add_setq(tmp, cpu_env, tmp, tmp2);
}
tcg_temp_free_i32(tmp2);
if (insn & (1 << 22)) {
/* smlald, smlsld */
tmp64 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp64, tmp);
tcg_temp_free_i32(tmp);
gen_addq(s, tmp64, rd, rn);
gen_storeq_reg(s, rd, rn, tmp64);
tcg_temp_free_i64(tmp64);
} else {
/* smuad, smusd, smlad, smlsd */
if (rd != 15)
{
tmp2 = load_reg(s, rd);
gen_helper_add_setq(tmp, cpu_env, tmp, tmp2);
tcg_temp_free_i32(tmp2);
}
store_reg(s, rn, tmp);
}
break;
case 1:
case 3:
/* SDIV, UDIV */
if (!arm_feature(env, ARM_FEATURE_ARM_DIV)) {
goto illegal_op;
}
if (((insn >> 5) & 7) || (rd != 15)) {
goto illegal_op;
}
tmp = load_reg(s, rm);
tmp2 = load_reg(s, rs);
if (insn & (1 << 21)) {
gen_helper_udiv(tmp, tmp, tmp2);
} else {
gen_helper_sdiv(tmp, tmp, tmp2);
}
tcg_temp_free_i32(tmp2);
store_reg(s, rn, tmp);
break;
default:
goto illegal_op;
}
break;
case 3:
op1 = ((insn >> 17) & 0x38) | ((insn >> 5) & 7);
switch (op1) {
case 0: /* Unsigned sum of absolute differences. */
ARCH(6);
tmp = load_reg(s, rm);
tmp2 = load_reg(s, rs);
gen_helper_usad8(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
if (rd != 15) {
tmp2 = load_reg(s, rd);
tcg_gen_add_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
}
store_reg(s, rn, tmp);
break;
case 0x20: case 0x24: case 0x28: case 0x2c:
/* Bitfield insert/clear. */
ARCH(6T2);
shift = (insn >> 7) & 0x1f;
i = (insn >> 16) & 0x1f;
i = i + 1 - shift;
if (rm == 15) {
tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, 0);
} else {
tmp = load_reg(s, rm);
}
if (i != 32) {
tmp2 = load_reg(s, rd);
tcg_gen_deposit_i32(tmp, tmp2, tmp, shift, i);
tcg_temp_free_i32(tmp2);
}
store_reg(s, rd, tmp);
break;
case 0x12: case 0x16: case 0x1a: case 0x1e: /* sbfx */
case 0x32: case 0x36: case 0x3a: case 0x3e: /* ubfx */
ARCH(6T2);
tmp = load_reg(s, rm);
shift = (insn >> 7) & 0x1f;
i = ((insn >> 16) & 0x1f) + 1;
if (shift + i > 32)
goto illegal_op;
if (i < 32) {
if (op1 & 0x20) {
gen_ubfx(tmp, shift, (1u << i) - 1);
} else {
gen_sbfx(tmp, shift, i);
}
}
store_reg(s, rd, tmp);
break;
default:
goto illegal_op;
}
break;
}
break;
}
do_ldst:
/* Check for undefined extension instructions
* per the ARM Bible IE:
* xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
*/
sh = (0xf << 20) | (0xf << 4);
if (op1 == 0x7 && ((insn & sh) == sh))
{
goto illegal_op;
}
/* load/store byte/word */
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
tmp2 = load_reg(s, rn);
i = (IS_USER(s) || (insn & 0x01200000) == 0x00200000);
if (insn & (1 << 24))
gen_add_data_offset(s, insn, tmp2);
if (insn & (1 << 20)) {
/* load */
if (insn & (1 << 22)) {
tmp = gen_ld8u(tmp2, i);
} else {
tmp = gen_ld32(tmp2, i);
}
} else {
/* store */
tmp = load_reg(s, rd);
if (insn & (1 << 22))
gen_st8(tmp, tmp2, i);
else
gen_st32(tmp, tmp2, i);
}
if (!(insn & (1 << 24))) {
gen_add_data_offset(s, insn, tmp2);
store_reg(s, rn, tmp2);
} else if (insn & (1 << 21)) {
store_reg(s, rn, tmp2);
} else {
tcg_temp_free_i32(tmp2);
}
if (insn & (1 << 20)) {
/* Complete the load. */
store_reg_from_load(env, s, rd, tmp);
}
break;
case 0x08:
case 0x09:
{
int j, n, user, loaded_base;
TCGv loaded_var;
/* load/store multiple words */
/* XXX: store correct base if write back */
user = 0;
if (insn & (1 << 22)) {
if (IS_USER(s))
goto illegal_op; /* only usable in supervisor mode */
if ((insn & (1 << 15)) == 0)
user = 1;
}
rn = (insn >> 16) & 0xf;
addr = load_reg(s, rn);
/* compute total size */
loaded_base = 0;
TCGV_UNUSED(loaded_var);
n = 0;
for(i=0;i<16;i++) {
if (insn & (1 << i))
n++;
}
/* XXX: test invalid n == 0 case ? */
if (insn & (1 << 23)) {
if (insn & (1 << 24)) {
/* pre increment */
tcg_gen_addi_i32(addr, addr, 4);
} else {
/* post increment */
}
} else {
if (insn & (1 << 24)) {
/* pre decrement */
tcg_gen_addi_i32(addr, addr, -(n * 4));
} else {
/* post decrement */
if (n != 1)
tcg_gen_addi_i32(addr, addr, -((n - 1) * 4));
}
}
j = 0;
for(i=0;i<16;i++) {
if (insn & (1 << i)) {
if (insn & (1 << 20)) {
/* load */
tmp = gen_ld32(addr, IS_USER(s));
if (user) {
tmp2 = tcg_const_i32(i);
gen_helper_set_user_reg(cpu_env, tmp2, tmp);
tcg_temp_free_i32(tmp2);
tcg_temp_free_i32(tmp);
} else if (i == rn) {
loaded_var = tmp;
loaded_base = 1;
} else {
store_reg_from_load(env, s, i, tmp);
}
} else {
/* store */
if (i == 15) {
/* special case: r15 = PC + 8 */
val = (long)s->pc + 4;
tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, val);
} else if (user) {
tmp = tcg_temp_new_i32();
tmp2 = tcg_const_i32(i);
gen_helper_get_user_reg(tmp, cpu_env, tmp2);
tcg_temp_free_i32(tmp2);
} else {
tmp = load_reg(s, i);
}
gen_st32(tmp, addr, IS_USER(s));
}
j++;
/* no need to add after the last transfer */
if (j != n)
tcg_gen_addi_i32(addr, addr, 4);
}
}
if (insn & (1 << 21)) {
/* write back */
if (insn & (1 << 23)) {
if (insn & (1 << 24)) {
/* pre increment */
} else {
/* post increment */
tcg_gen_addi_i32(addr, addr, 4);
}
} else {
if (insn & (1 << 24)) {
/* pre decrement */
if (n != 1)
tcg_gen_addi_i32(addr, addr, -((n - 1) * 4));
} else {
/* post decrement */
tcg_gen_addi_i32(addr, addr, -(n * 4));
}
}
store_reg(s, rn, addr);
} else {
tcg_temp_free_i32(addr);
}
if (loaded_base) {
store_reg(s, rn, loaded_var);
}
if ((insn & (1 << 22)) && !user) {
/* Restore CPSR from SPSR. */
tmp = load_cpu_field(spsr);
gen_set_cpsr(tmp, 0xffffffff);
tcg_temp_free_i32(tmp);
s->is_jmp = DISAS_UPDATE;
}
}
break;
case 0xa:
case 0xb:
{
int32_t offset;
/* branch (and link) */
val = (int32_t)s->pc;
if (insn & (1 << 24)) {
tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, val);
store_reg(s, 14, tmp);
}
offset = (((int32_t)insn << 8) >> 8);
val += (offset << 2) + 4;
gen_jmp(s, val);
}
break;
case 0xc:
case 0xd:
case 0xe:
/* Coprocessor. */
if (disas_coproc_insn(env, s, insn))
goto illegal_op;
break;
case 0xf:
/* swi */
gen_set_pc_im(s->pc);
s->is_jmp = DISAS_SWI;
break;
default:
illegal_op:
gen_exception_insn(s, 4, EXCP_UDEF);
break;
}
}
} | 10,844 |
FFmpeg | 8cd1c0febe88b757e915e9af15559575c21ca728 | 1 | static const uint8_t *pcx_rle_decode(const uint8_t *src, uint8_t *dst,
unsigned int bytes_per_scanline, int compressed) {
unsigned int i = 0;
unsigned char run, value;
if (compressed) {
while (i<bytes_per_scanline) {
run = 1;
value = *src++;
if (value >= 0xc0) {
run = value & 0x3f;
value = *src++;
}
while (i<bytes_per_scanline && run--)
dst[i++] = value;
}
} else {
memcpy(dst, src, bytes_per_scanline);
src += bytes_per_scanline;
}
return src;
}
| 10,845 |
qemu | 6d0ceb80ffe18ad4b28aab7356f440636c0be7be | 1 | static int coroutine_fn blkreplay_co_flush(BlockDriverState *bs)
{
uint64_t reqid = request_id++;
int ret = bdrv_co_flush(bs->file->bs);
block_request_create(reqid, bs, qemu_coroutine_self());
qemu_coroutine_yield();
return ret;
}
| 10,846 |
qemu | b946a1533209f61a93e34898aebb5b43154b99c3 | 1 | USBDevice *usb_net_init(NICInfo *nd)
{
USBNetState *s;
s = qemu_mallocz(sizeof(USBNetState));
s->dev.speed = USB_SPEED_FULL;
s->dev.handle_packet = usb_generic_handle_packet;
s->dev.handle_reset = usb_net_handle_reset;
s->dev.handle_control = usb_net_handle_control;
s->dev.handle_data = usb_net_handle_data;
s->dev.handle_destroy = usb_net_handle_destroy;
s->rndis = 1;
s->rndis_state = RNDIS_UNINITIALIZED;
s->medium = 0; /* NDIS_MEDIUM_802_3 */
s->speed = 1000000; /* 100MBps, in 100Bps units */
s->media_state = 0; /* NDIS_MEDIA_STATE_CONNECTED */;
s->filter = 0;
s->vendorid = 0x1234;
memcpy(s->mac, nd->macaddr, 6);
TAILQ_INIT(&s->rndis_resp);
pstrcpy(s->dev.devname, sizeof(s->dev.devname),
"QEMU USB Network Interface");
s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
usbnet_receive, usbnet_can_receive, s);
qemu_format_nic_info_str(s->vc, s->mac);
snprintf(s->usbstring_mac, sizeof(s->usbstring_mac),
"%02x%02x%02x%02x%02x%02x",
0x40, s->mac[1], s->mac[2],
s->mac[3], s->mac[4], s->mac[5]);
fprintf(stderr, "usbnet: initialized mac %02x:%02x:%02x:%02x:%02x:%02x\n",
s->mac[0], s->mac[1], s->mac[2],
s->mac[3], s->mac[4], s->mac[5]);
return (USBDevice *) s;
}
| 10,848 |
FFmpeg | d3958ab4edf49cb760412d8687c870d349f692c7 | 1 | x11grab_read_header(AVFormatContext *s1)
{
struct x11_grab *x11grab = s1->priv_data;
Display *dpy;
AVStream *st = NULL;
enum PixelFormat input_pixfmt;
XImage *image;
int x_off = 0;
int y_off = 0;
int screen;
int use_shm;
char *param, *offset;
int ret = 0;
AVRational framerate;
param = av_strdup(s1->filename);
if (!param)
goto out;
offset = strchr(param, '+');
if (offset) {
sscanf(offset, "%d,%d", &x_off, &y_off);
x11grab->draw_mouse = !strstr(offset, "nomouse");
*offset= 0;
}
if ((ret = av_parse_video_size(&x11grab->width, &x11grab->height, x11grab->video_size)) < 0) {
av_log(s1, AV_LOG_ERROR, "Couldn't parse video size.\n");
goto out;
}
if ((ret = av_parse_video_rate(&framerate, x11grab->framerate)) < 0) {
av_log(s1, AV_LOG_ERROR, "Could not parse framerate: %s.\n", x11grab->framerate);
goto out;
}
av_log(s1, AV_LOG_INFO, "device: %s -> display: %s x: %d y: %d width: %d height: %d\n",
s1->filename, param, x_off, y_off, x11grab->width, x11grab->height);
dpy = XOpenDisplay(param);
if(!dpy) {
av_log(s1, AV_LOG_ERROR, "Could not open X display.\n");
ret = AVERROR(EIO);
goto out;
}
st = avformat_new_stream(s1, NULL);
if (!st) {
ret = AVERROR(ENOMEM);
goto out;
}
avpriv_set_pts_info(st, 64, 1, 1000000); /* 64 bits pts in us */
screen = DefaultScreen(dpy);
if (x11grab->follow_mouse) {
int screen_w, screen_h;
Window w;
screen_w = DisplayWidth(dpy, screen);
screen_h = DisplayHeight(dpy, screen);
XQueryPointer(dpy, RootWindow(dpy, screen), &w, &w, &x_off, &y_off, &ret, &ret, &ret);
x_off -= x11grab->width / 2;
y_off -= x11grab->height / 2;
x_off = FFMIN(FFMAX(x_off, 0), screen_w - x11grab->width);
y_off = FFMIN(FFMAX(y_off, 0), screen_h - x11grab->height);
av_log(s1, AV_LOG_INFO, "followmouse is enabled, resetting grabbing region to x: %d y: %d\n", x_off, y_off);
}
use_shm = XShmQueryExtension(dpy);
av_log(s1, AV_LOG_INFO, "shared memory extension %s found\n", use_shm ? "" : "not");
if(use_shm) {
int scr = XDefaultScreen(dpy);
image = XShmCreateImage(dpy,
DefaultVisual(dpy, scr),
DefaultDepth(dpy, scr),
ZPixmap,
NULL,
&x11grab->shminfo,
x11grab->width, x11grab->height);
x11grab->shminfo.shmid = shmget(IPC_PRIVATE,
image->bytes_per_line * image->height,
IPC_CREAT|0777);
if (x11grab->shminfo.shmid == -1) {
av_log(s1, AV_LOG_ERROR, "Fatal: Can't get shared memory!\n");
ret = AVERROR(ENOMEM);
goto out;
}
x11grab->shminfo.shmaddr = image->data = shmat(x11grab->shminfo.shmid, 0, 0);
x11grab->shminfo.readOnly = False;
if (!XShmAttach(dpy, &x11grab->shminfo)) {
av_log(s1, AV_LOG_ERROR, "Fatal: Failed to attach shared memory!\n");
/* needs some better error subroutine :) */
ret = AVERROR(EIO);
goto out;
}
} else {
image = XGetImage(dpy, RootWindow(dpy, screen),
x_off,y_off,
x11grab->width, x11grab->height,
AllPlanes, ZPixmap);
}
switch (image->bits_per_pixel) {
case 8:
av_log (s1, AV_LOG_DEBUG, "8 bit palette\n");
input_pixfmt = PIX_FMT_PAL8;
break;
case 16:
if ( image->red_mask == 0xf800 &&
image->green_mask == 0x07e0 &&
image->blue_mask == 0x001f ) {
av_log (s1, AV_LOG_DEBUG, "16 bit RGB565\n");
input_pixfmt = PIX_FMT_RGB565;
} else if (image->red_mask == 0x7c00 &&
image->green_mask == 0x03e0 &&
image->blue_mask == 0x001f ) {
av_log(s1, AV_LOG_DEBUG, "16 bit RGB555\n");
input_pixfmt = PIX_FMT_RGB555;
} else {
av_log(s1, AV_LOG_ERROR, "RGB ordering at image depth %i not supported ... aborting\n", image->bits_per_pixel);
av_log(s1, AV_LOG_ERROR, "color masks: r 0x%.6lx g 0x%.6lx b 0x%.6lx\n", image->red_mask, image->green_mask, image->blue_mask);
ret = AVERROR(EIO);
goto out;
}
break;
case 24:
if ( image->red_mask == 0xff0000 &&
image->green_mask == 0x00ff00 &&
image->blue_mask == 0x0000ff ) {
input_pixfmt = PIX_FMT_BGR24;
} else if ( image->red_mask == 0x0000ff &&
image->green_mask == 0x00ff00 &&
image->blue_mask == 0xff0000 ) {
input_pixfmt = PIX_FMT_RGB24;
} else {
av_log(s1, AV_LOG_ERROR,"rgb ordering at image depth %i not supported ... aborting\n", image->bits_per_pixel);
av_log(s1, AV_LOG_ERROR, "color masks: r 0x%.6lx g 0x%.6lx b 0x%.6lx\n", image->red_mask, image->green_mask, image->blue_mask);
ret = AVERROR(EIO);
goto out;
}
break;
case 32:
input_pixfmt = PIX_FMT_RGB32;
break;
default:
av_log(s1, AV_LOG_ERROR, "image depth %i not supported ... aborting\n", image->bits_per_pixel);
ret = AVERROR(EINVAL);
goto out;
}
x11grab->frame_size = x11grab->width * x11grab->height * image->bits_per_pixel/8;
x11grab->dpy = dpy;
x11grab->time_base = (AVRational){framerate.den, framerate.num};
x11grab->time_frame = av_gettime() / av_q2d(x11grab->time_base);
x11grab->x_off = x_off;
x11grab->y_off = y_off;
x11grab->image = image;
x11grab->use_shm = use_shm;
st->codec->codec_type = AVMEDIA_TYPE_VIDEO;
st->codec->codec_id = CODEC_ID_RAWVIDEO;
st->codec->width = x11grab->width;
st->codec->height = x11grab->height;
st->codec->pix_fmt = input_pixfmt;
st->codec->time_base = x11grab->time_base;
st->codec->bit_rate = x11grab->frame_size * 1/av_q2d(x11grab->time_base) * 8;
out:
return ret;
} | 10,850 |
FFmpeg | a5ee04c3e0f3c0f84089100b65bb09552ce1bdf8 | 1 | static int mpc7_decode_frame(AVCodecContext * avctx,
void *data, int *data_size,
uint8_t * buf, int buf_size)
{
MPCContext *c = avctx->priv_data;
GetBitContext gb;
uint8_t *bits;
int i, j, ch, t;
int mb = -1;
Band bands[BANDS];
int Q[2][MPC_FRAME_SIZE];
int off;
float mul;
int bits_used, bits_avail;
memset(bands, 0, sizeof(bands));
if(buf_size <= 4){
av_log(avctx, AV_LOG_ERROR, "Too small buffer passed (%i bytes)\n", buf_size);
}
bits = av_malloc((buf_size - 1) & ~3);
c->dsp.bswap_buf(bits, buf + 4, (buf_size - 4) >> 2);
init_get_bits(&gb, bits, (buf_size - 4)* 8);
skip_bits(&gb, buf[0]);
/* read subband indexes */
for(i = 0; i <= c->bands; i++){
for(ch = 0; ch < 2; ch++){
if(i) t = get_vlc2(&gb, hdr_vlc.table, MPC7_HDR_BITS, 1) - 5;
if(!i || (t == 4)) bands[i].res[ch] = get_bits(&gb, 4);
else bands[i].res[ch] = bands[i-1].res[ch] + t;
}
if(bands[i].res[0] || bands[i].res[1]){
mb = i;
if(c->MSS) bands[i].msf = get_bits1(&gb);
}
}
/* get scale indexes coding method */
for(i = 0; i <= mb; i++)
for(ch = 0; ch < 2; ch++)
if(bands[i].res[ch]) bands[i].scfi[ch] = get_vlc2(&gb, scfi_vlc.table, MPC7_SCFI_BITS, 1);
/* get scale indexes */
for(i = 0; i <= mb; i++){
for(ch = 0; ch < 2; ch++){
if(bands[i].res[ch]){
bands[i].scf_idx[ch][2] = c->oldDSCF[ch][i];
t = get_vlc2(&gb, dscf_vlc.table, MPC7_DSCF_BITS, 1) - 7;
bands[i].scf_idx[ch][0] = (t == 8) ? get_bits(&gb, 6) : (bands[i].scf_idx[ch][2] + t);
switch(bands[i].scfi[ch]){
case 0:
t = get_vlc2(&gb, dscf_vlc.table, MPC7_DSCF_BITS, 1) - 7;
bands[i].scf_idx[ch][1] = (t == 8) ? get_bits(&gb, 6) : (bands[i].scf_idx[ch][0] + t);
t = get_vlc2(&gb, dscf_vlc.table, MPC7_DSCF_BITS, 1) - 7;
bands[i].scf_idx[ch][2] = (t == 8) ? get_bits(&gb, 6) : (bands[i].scf_idx[ch][1] + t);
break;
case 1:
t = get_vlc2(&gb, dscf_vlc.table, MPC7_DSCF_BITS, 1) - 7;
bands[i].scf_idx[ch][1] = (t == 8) ? get_bits(&gb, 6) : (bands[i].scf_idx[ch][0] + t);
bands[i].scf_idx[ch][2] = bands[i].scf_idx[ch][1];
break;
case 2:
bands[i].scf_idx[ch][1] = bands[i].scf_idx[ch][0];
t = get_vlc2(&gb, dscf_vlc.table, MPC7_DSCF_BITS, 1) - 7;
bands[i].scf_idx[ch][2] = (t == 8) ? get_bits(&gb, 6) : (bands[i].scf_idx[ch][1] + t);
break;
case 3:
bands[i].scf_idx[ch][2] = bands[i].scf_idx[ch][1] = bands[i].scf_idx[ch][0];
break;
}
c->oldDSCF[ch][i] = bands[i].scf_idx[ch][2];
}
}
}
/* get quantizers */
memset(Q, 0, sizeof(Q));
off = 0;
for(i = 0; i < BANDS; i++, off += SAMPLES_PER_BAND)
for(ch = 0; ch < 2; ch++)
idx_to_quant(c, &gb, bands[i].res[ch], Q[ch] + off);
/* dequantize */
memset(c->sb_samples, 0, sizeof(c->sb_samples));
off = 0;
for(i = 0; i <= mb; i++, off += SAMPLES_PER_BAND){
for(ch = 0; ch < 2; ch++){
if(bands[i].res[ch]){
j = 0;
mul = mpc_CC[bands[i].res[ch]] * mpc7_SCF[bands[i].scf_idx[ch][0]];
for(; j < 12; j++)
c->sb_samples[ch][j][i] = mul * Q[ch][j + off];
mul = mpc_CC[bands[i].res[ch]] * mpc7_SCF[bands[i].scf_idx[ch][1]];
for(; j < 24; j++)
c->sb_samples[ch][j][i] = mul * Q[ch][j + off];
mul = mpc_CC[bands[i].res[ch]] * mpc7_SCF[bands[i].scf_idx[ch][2]];
for(; j < 36; j++)
c->sb_samples[ch][j][i] = mul * Q[ch][j + off];
}
}
if(bands[i].msf){
int t1, t2;
for(j = 0; j < SAMPLES_PER_BAND; j++){
t1 = c->sb_samples[0][j][i];
t2 = c->sb_samples[1][j][i];
c->sb_samples[0][j][i] = t1 + t2;
c->sb_samples[1][j][i] = t1 - t2;
}
}
}
mpc_synth(c, data);
av_free(bits);
bits_used = get_bits_count(&gb);
bits_avail = (buf_size - 4) * 8;
if(!buf[1] && ((bits_avail < bits_used) || (bits_used + 32 <= bits_avail))){
av_log(NULL,0, "Error decoding frame: used %i of %i bits\n", bits_used, bits_avail);
return -1;
}
if(c->frames_to_skip){
c->frames_to_skip--;
*data_size = 0;
return buf_size;
}
*data_size = (buf[1] ? c->lastframelen : MPC_FRAME_SIZE) * 4;
return buf_size;
}
| 10,851 |
FFmpeg | 7a961a46ba28e49f88ff0e81b96395c96b424634 | 1 | void register_avcodec(AVCodec *codec)
{
AVCodec **p;
p = &first_avcodec;
while (*p != NULL) p = &(*p)->next;
*p = codec;
codec->next = NULL;
} | 10,852 |
qemu | 4f4321c11ff6e98583846bfd6f0e81954924b003 | 1 | static int uhci_broadcast_packet(UHCIState *s, USBPacket *p)
{
int i, ret;
DPRINTF("uhci: packet enter. pid %s addr 0x%02x ep %d len %d\n",
pid2str(p->pid), p->devaddr, p->devep, p->len);
if (p->pid == USB_TOKEN_OUT || p->pid == USB_TOKEN_SETUP)
dump_data(p->data, p->len);
ret = USB_RET_NODEV;
for (i = 0; i < NB_PORTS && ret == USB_RET_NODEV; i++) {
UHCIPort *port = &s->ports[i];
USBDevice *dev = port->port.dev;
if (dev && (port->ctrl & UHCI_PORT_EN))
ret = usb_handle_packet(dev, p);
}
DPRINTF("uhci: packet exit. ret %d len %d\n", ret, p->len);
if (p->pid == USB_TOKEN_IN && ret > 0)
dump_data(p->data, ret);
return ret;
}
| 10,853 |
qemu | b5bd049fa907bccc4600ad1855e1c9c0e62f0be3 | 1 | static int vfio_early_setup_msix(VFIOPCIDevice *vdev)
{
uint8_t pos;
uint16_t ctrl;
uint32_t table, pba;
int fd = vdev->vbasedev.fd;
pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX);
if (!pos) {
return 0;
}
if (pread(fd, &ctrl, sizeof(ctrl),
vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
return -errno;
}
if (pread(fd, &table, sizeof(table),
vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) {
return -errno;
}
if (pread(fd, &pba, sizeof(pba),
vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) {
return -errno;
}
ctrl = le16_to_cpu(ctrl);
table = le32_to_cpu(table);
pba = le32_to_cpu(pba);
vdev->msix = g_malloc0(sizeof(*(vdev->msix)));
vdev->msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
vdev->msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
vdev->msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
/*
* Test the size of the pba_offset variable and catch if it extends outside
* of the specified BAR. If it is the case, we need to apply a hardware
* specific quirk if the device is known or we have a broken configuration.
*/
if (vdev->msix->pba_offset >=
vdev->bars[vdev->msix->pba_bar].region.size) {
PCIDevice *pdev = &vdev->pdev;
uint16_t vendor = pci_get_word(pdev->config + PCI_VENDOR_ID);
uint16_t device = pci_get_word(pdev->config + PCI_DEVICE_ID);
/*
* Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
* adapters. The T5 hardware returns an incorrect value of 0x8000 for
* the VF PBA offset while the BAR itself is only 8k. The correct value
* is 0x1000, so we hard code that here.
*/
if (vendor == PCI_VENDOR_ID_CHELSIO && (device & 0xff00) == 0x5800) {
vdev->msix->pba_offset = 0x1000;
} else {
error_report("vfio: Hardware reports invalid configuration, "
"MSIX PBA outside of specified BAR");
return -EINVAL;
}
}
trace_vfio_early_setup_msix(vdev->vbasedev.name, pos,
vdev->msix->table_bar,
vdev->msix->table_offset,
vdev->msix->entries);
return 0;
}
| 10,854 |
qemu | 12848bfc5d719bad536c5448205a3226be1fda47 | 1 | static int local_mkdir(FsContext *fs_ctx, const char *path, FsCred *credp)
{
int err = -1;
int serrno = 0;
/* Determine the security model */
if (fs_ctx->fs_sm == SM_MAPPED) {
err = mkdir(rpath(fs_ctx, path), SM_LOCAL_DIR_MODE_BITS);
if (err == -1) {
return err;
}
credp->fc_mode = credp->fc_mode|S_IFDIR;
err = local_set_xattr(rpath(fs_ctx, path), credp);
if (err == -1) {
serrno = errno;
goto err_end;
}
} else if (fs_ctx->fs_sm == SM_PASSTHROUGH) {
err = mkdir(rpath(fs_ctx, path), credp->fc_mode);
if (err == -1) {
return err;
}
err = local_post_create_passthrough(fs_ctx, path, credp);
if (err == -1) {
serrno = errno;
goto err_end;
}
}
return err;
err_end:
remove(rpath(fs_ctx, path));
errno = serrno;
return err;
}
| 10,855 |
FFmpeg | a960f3b91876d50d9a1bff63d11b2a5a6a16fd89 | 1 | static int pmp_header(AVFormatContext *s)
{
PMPContext *pmp = s->priv_data;
AVIOContext *pb = s->pb;
int tb_num, tb_den;
uint32_t index_cnt;
int audio_codec_id = AV_CODEC_ID_NONE;
int srate, channels;
int i;
uint64_t pos;
int64_t fsize = avio_size(pb);
AVStream *vst = avformat_new_stream(s, NULL);
if (!vst)
return AVERROR(ENOMEM);
vst->codec->codec_type = AVMEDIA_TYPE_VIDEO;
avio_skip(pb, 8);
switch (avio_rl32(pb)) {
case 0:
vst->codec->codec_id = AV_CODEC_ID_MPEG4;
break;
case 1:
vst->codec->codec_id = AV_CODEC_ID_H264;
break;
default:
av_log(s, AV_LOG_ERROR, "Unsupported video format\n");
break;
}
index_cnt = avio_rl32(pb);
vst->codec->width = avio_rl32(pb);
vst->codec->height = avio_rl32(pb);
tb_num = avio_rl32(pb);
tb_den = avio_rl32(pb);
avpriv_set_pts_info(vst, 32, tb_num, tb_den);
vst->nb_frames = index_cnt;
vst->duration = index_cnt;
switch (avio_rl32(pb)) {
case 0:
audio_codec_id = AV_CODEC_ID_MP3;
break;
case 1:
av_log(s, AV_LOG_ERROR, "AAC not yet correctly supported\n");
audio_codec_id = AV_CODEC_ID_AAC;
break;
default:
av_log(s, AV_LOG_ERROR, "Unsupported audio format\n");
break;
}
pmp->num_streams = avio_rl16(pb) + 1;
avio_skip(pb, 10);
srate = avio_rl32(pb);
channels = avio_rl32(pb) + 1;
pos = avio_tell(pb) + 4*index_cnt;
for (i = 0; i < index_cnt; i++) {
uint32_t size = avio_rl32(pb);
int flags = size & 1 ? AVINDEX_KEYFRAME : 0;
if (url_feof(pb)) {
av_log(s, AV_LOG_FATAL, "Encountered EOF while reading index.\n");
return AVERROR_INVALIDDATA;
}
size >>= 1;
if (size < 9 + 4*pmp->num_streams) {
av_log(s, AV_LOG_ERROR, "Packet too small\n");
return AVERROR_INVALIDDATA;
}
av_add_index_entry(vst, pos, i, size, 0, flags);
pos += size;
if (fsize > 0 && i == 0 && pos > fsize) {
av_log(s, AV_LOG_ERROR, "File ends before first packet\n");
return AVERROR_INVALIDDATA;
}
}
for (i = 1; i < pmp->num_streams; i++) {
AVStream *ast = avformat_new_stream(s, NULL);
if (!ast)
return AVERROR(ENOMEM);
ast->codec->codec_type = AVMEDIA_TYPE_AUDIO;
ast->codec->codec_id = audio_codec_id;
ast->codec->channels = channels;
ast->codec->sample_rate = srate;
avpriv_set_pts_info(ast, 32, 1, srate);
}
return 0;
}
| 10,856 |
qemu | 469936ae0a9891b2de7e46743f683535b0819bee | 1 | cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
const char *name, struct SegmentCache *sc)
{
#ifdef TARGET_X86_64
if (env->hflags & HF_CS64_MASK) {
cpu_fprintf(f, "%-3s=%04x %016" PRIx64 " %08x %08x", name,
sc->selector, sc->base, sc->limit, sc->flags & 0x00ffff00);
} else
#endif
{
cpu_fprintf(f, "%-3s=%04x %08x %08x %08x", name, sc->selector,
(uint32_t)sc->base, sc->limit, sc->flags & 0x00ffff00);
}
if (!(env->hflags & HF_PE_MASK) || !(sc->flags & DESC_P_MASK))
goto done;
cpu_fprintf(f, " DPL=%d ", (sc->flags & DESC_DPL_MASK) >> DESC_DPL_SHIFT);
if (sc->flags & DESC_S_MASK) {
if (sc->flags & DESC_CS_MASK) {
cpu_fprintf(f, (sc->flags & DESC_L_MASK) ? "CS64" :
((sc->flags & DESC_B_MASK) ? "CS32" : "CS16"));
cpu_fprintf(f, " [%c%c", (sc->flags & DESC_C_MASK) ? 'C' : '-',
(sc->flags & DESC_R_MASK) ? 'R' : '-');
} else {
cpu_fprintf(f, (sc->flags & DESC_B_MASK) ? "DS " : "DS16");
cpu_fprintf(f, " [%c%c", (sc->flags & DESC_E_MASK) ? 'E' : '-',
(sc->flags & DESC_W_MASK) ? 'W' : '-');
}
cpu_fprintf(f, "%c]", (sc->flags & DESC_A_MASK) ? 'A' : '-');
} else {
static const char *sys_type_name[2][16] = {
{ /* 32 bit mode */
"Reserved", "TSS16-avl", "LDT", "TSS16-busy",
"CallGate16", "TaskGate", "IntGate16", "TrapGate16",
"Reserved", "TSS32-avl", "Reserved", "TSS32-busy",
"CallGate32", "Reserved", "IntGate32", "TrapGate32"
},
{ /* 64 bit mode */
"<hiword>", "Reserved", "LDT", "Reserved", "Reserved",
"Reserved", "Reserved", "Reserved", "Reserved",
"TSS64-avl", "Reserved", "TSS64-busy", "CallGate64",
"Reserved", "IntGate64", "TrapGate64"
}
};
cpu_fprintf(f, "%s",
sys_type_name[(env->hflags & HF_LMA_MASK) ? 1 : 0]
[(sc->flags & DESC_TYPE_MASK)
>> DESC_TYPE_SHIFT]);
}
done:
cpu_fprintf(f, "\n");
}
| 10,858 |
FFmpeg | e6aed5f404a0983b2971c90e9022f6964a75de0b | 1 | static int encode_frame(AVCodecContext *avctx,
uint8_t *buf, int buf_size,
void *data)
{
int tileno, ret;
J2kEncoderContext *s = avctx->priv_data;
// init:
s->buf = s->buf_start = buf;
s->buf_end = buf + buf_size;
s->picture = data;
s->lambda = s->picture->quality * LAMBDA_SCALE;
copy_frame(s);
reinit(s);
if (s->buf_end - s->buf < 2)
return -1;
bytestream_put_be16(&s->buf, J2K_SOC);
if (ret = put_siz(s))
return ret;
if (ret = put_cod(s))
return ret;
if (ret = put_qcd(s, 0))
return ret;
for (tileno = 0; tileno < s->numXtiles * s->numYtiles; tileno++){
uint8_t *psotptr;
if ((psotptr = put_sot(s, tileno)) < 0)
return psotptr;
if (s->buf_end - s->buf < 2)
return -1;
bytestream_put_be16(&s->buf, J2K_SOD);
if (ret = encode_tile(s, s->tile + tileno, tileno))
return ret;
bytestream_put_be32(&psotptr, s->buf - psotptr + 6);
}
if (s->buf_end - s->buf < 2)
return -1;
bytestream_put_be16(&s->buf, J2K_EOC);
av_log(s->avctx, AV_LOG_DEBUG, "end\n");
return s->buf - s->buf_start;
}
| 10,859 |
qemu | d9bce9d99f4656ae0b0127f7472db9067b8f84ab | 1 | void do_POWER_divs (void)
{
if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
T0 = (long)((-1) * (T0 >> 31));
env->spr[SPR_MQ] = 0;
} else {
env->spr[SPR_MQ] = T0 % T1;
T0 = Ts0 / Ts1;
}
}
| 10,861 |
FFmpeg | 5a3a906ba29b53fa34d3047af78d9f8fd7678256 | 1 | static void vqa_decode_chunk(VqaContext *s)
{
unsigned int chunk_type;
unsigned int chunk_size;
int byte_skip;
unsigned int index = 0;
int i;
unsigned char r, g, b;
int index_shift;
int cbf0_chunk = -1;
int cbfz_chunk = -1;
int cbp0_chunk = -1;
int cbpz_chunk = -1;
int cpl0_chunk = -1;
int cplz_chunk = -1;
int vptz_chunk = -1;
int x, y;
int lines = 0;
int pixel_ptr;
int vector_index = 0;
int lobyte = 0;
int hibyte = 0;
int lobytes = 0;
int hibytes = s->decode_buffer_size / 2;
/* first, traverse through the frame and find the subchunks */
while (index < s->size) {
chunk_type = AV_RB32(&s->buf[index]);
chunk_size = AV_RB32(&s->buf[index + 4]);
switch (chunk_type) {
case CBF0_TAG:
cbf0_chunk = index;
break;
case CBFZ_TAG:
cbfz_chunk = index;
break;
case CBP0_TAG:
cbp0_chunk = index;
break;
case CBPZ_TAG:
cbpz_chunk = index;
break;
case CPL0_TAG:
cpl0_chunk = index;
break;
case CPLZ_TAG:
cplz_chunk = index;
break;
case VPTZ_TAG:
vptz_chunk = index;
break;
default:
av_log(s->avctx, AV_LOG_ERROR, " VQA video: Found unknown chunk type: %c%c%c%c (%08X)\n",
(chunk_type >> 24) & 0xFF,
(chunk_type >> 16) & 0xFF,
(chunk_type >> 8) & 0xFF,
(chunk_type >> 0) & 0xFF,
chunk_type);
break;
}
byte_skip = chunk_size & 0x01;
index += (CHUNK_PREAMBLE_SIZE + chunk_size + byte_skip);
}
/* next, deal with the palette */
if ((cpl0_chunk != -1) && (cplz_chunk != -1)) {
/* a chunk should not have both chunk types */
av_log(s->avctx, AV_LOG_ERROR, " VQA video: problem: found both CPL0 and CPLZ chunks\n");
return;
}
/* decompress the palette chunk */
if (cplz_chunk != -1) {
/* yet to be handled */
}
/* convert the RGB palette into the machine's endian format */
if (cpl0_chunk != -1) {
chunk_size = AV_RB32(&s->buf[cpl0_chunk + 4]);
/* sanity check the palette size */
if (chunk_size / 3 > 256) {
av_log(s->avctx, AV_LOG_ERROR, " VQA video: problem: found a palette chunk with %d colors\n",
chunk_size / 3);
return;
}
cpl0_chunk += CHUNK_PREAMBLE_SIZE;
for (i = 0; i < chunk_size / 3; i++) {
/* scale by 4 to transform 6-bit palette -> 8-bit */
r = s->buf[cpl0_chunk++] * 4;
g = s->buf[cpl0_chunk++] * 4;
b = s->buf[cpl0_chunk++] * 4;
s->palette[i] = (r << 16) | (g << 8) | (b);
}
}
/* next, look for a full codebook */
if ((cbf0_chunk != -1) && (cbfz_chunk != -1)) {
/* a chunk should not have both chunk types */
av_log(s->avctx, AV_LOG_ERROR, " VQA video: problem: found both CBF0 and CBFZ chunks\n");
return;
}
/* decompress the full codebook chunk */
if (cbfz_chunk != -1) {
chunk_size = AV_RB32(&s->buf[cbfz_chunk + 4]);
cbfz_chunk += CHUNK_PREAMBLE_SIZE;
decode_format80(&s->buf[cbfz_chunk], chunk_size,
s->codebook, s->codebook_size, 0);
}
/* copy a full codebook */
if (cbf0_chunk != -1) {
chunk_size = AV_RB32(&s->buf[cbf0_chunk + 4]);
/* sanity check the full codebook size */
if (chunk_size > MAX_CODEBOOK_SIZE) {
av_log(s->avctx, AV_LOG_ERROR, " VQA video: problem: CBF0 chunk too large (0x%X bytes)\n",
chunk_size);
return;
}
cbf0_chunk += CHUNK_PREAMBLE_SIZE;
memcpy(s->codebook, &s->buf[cbf0_chunk], chunk_size);
}
/* decode the frame */
if (vptz_chunk == -1) {
/* something is wrong if there is no VPTZ chunk */
av_log(s->avctx, AV_LOG_ERROR, " VQA video: problem: no VPTZ chunk found\n");
return;
}
chunk_size = AV_RB32(&s->buf[vptz_chunk + 4]);
vptz_chunk += CHUNK_PREAMBLE_SIZE;
decode_format80(&s->buf[vptz_chunk], chunk_size,
s->decode_buffer, s->decode_buffer_size, 1);
/* render the final PAL8 frame */
if (s->vector_height == 4)
index_shift = 4;
else
index_shift = 3;
for (y = 0; y < s->frame.linesize[0] * s->height;
y += s->frame.linesize[0] * s->vector_height) {
for (x = y; x < y + s->width; x += 4, lobytes++, hibytes++) {
pixel_ptr = x;
/* get the vector index, the method for which varies according to
* VQA file version */
switch (s->vqa_version) {
case 1:
lobyte = s->decode_buffer[lobytes * 2];
hibyte = s->decode_buffer[(lobytes * 2) + 1];
vector_index = ((hibyte << 8) | lobyte) >> 3;
vector_index <<= index_shift;
lines = s->vector_height;
/* uniform color fill - a quick hack */
if (hibyte == 0xFF) {
while (lines--) {
s->frame.data[0][pixel_ptr + 0] = 255 - lobyte;
s->frame.data[0][pixel_ptr + 1] = 255 - lobyte;
s->frame.data[0][pixel_ptr + 2] = 255 - lobyte;
s->frame.data[0][pixel_ptr + 3] = 255 - lobyte;
pixel_ptr += s->frame.linesize[0];
}
lines=0;
}
break;
case 2:
lobyte = s->decode_buffer[lobytes];
hibyte = s->decode_buffer[hibytes];
vector_index = (hibyte << 8) | lobyte;
vector_index <<= index_shift;
lines = s->vector_height;
break;
case 3:
/* not implemented yet */
lines = 0;
break;
}
while (lines--) {
s->frame.data[0][pixel_ptr + 0] = s->codebook[vector_index++];
s->frame.data[0][pixel_ptr + 1] = s->codebook[vector_index++];
s->frame.data[0][pixel_ptr + 2] = s->codebook[vector_index++];
s->frame.data[0][pixel_ptr + 3] = s->codebook[vector_index++];
pixel_ptr += s->frame.linesize[0];
}
}
}
/* handle partial codebook */
if ((cbp0_chunk != -1) && (cbpz_chunk != -1)) {
/* a chunk should not have both chunk types */
av_log(s->avctx, AV_LOG_ERROR, " VQA video: problem: found both CBP0 and CBPZ chunks\n");
return;
}
if (cbp0_chunk != -1) {
chunk_size = AV_RB32(&s->buf[cbp0_chunk + 4]);
cbp0_chunk += CHUNK_PREAMBLE_SIZE;
/* accumulate partial codebook */
memcpy(&s->next_codebook_buffer[s->next_codebook_buffer_index],
&s->buf[cbp0_chunk], chunk_size);
s->next_codebook_buffer_index += chunk_size;
s->partial_countdown--;
if (s->partial_countdown == 0) {
/* time to replace codebook */
memcpy(s->codebook, s->next_codebook_buffer,
s->next_codebook_buffer_index);
/* reset accounting */
s->next_codebook_buffer_index = 0;
s->partial_countdown = s->partial_count;
}
}
if (cbpz_chunk != -1) {
chunk_size = AV_RB32(&s->buf[cbpz_chunk + 4]);
cbpz_chunk += CHUNK_PREAMBLE_SIZE;
/* accumulate partial codebook */
memcpy(&s->next_codebook_buffer[s->next_codebook_buffer_index],
&s->buf[cbpz_chunk], chunk_size);
s->next_codebook_buffer_index += chunk_size;
s->partial_countdown--;
if (s->partial_countdown == 0) {
/* decompress codebook */
decode_format80(s->next_codebook_buffer,
s->next_codebook_buffer_index,
s->codebook, s->codebook_size, 0);
/* reset accounting */
s->next_codebook_buffer_index = 0;
s->partial_countdown = s->partial_count;
}
}
}
| 10,863 |
FFmpeg | 7cc84d241ba6ef8e27e4d057176a4ad385ad3d59 | 1 | int decode_luma_intra_block(VC9Context *v, int mquant)
{
GetBitContext *gb = &v->s.gb;
int dcdiff;
dcdiff = get_vlc2(gb, v->luma_dc_vlc->table,
DC_VLC_BITS, 2);
if (dcdiff)
{
if (dcdiff == 119 /* ESC index value */)
{
/* TODO: Optimize */
if (mquant == 1) dcdiff = get_bits(gb, 10);
else if (mquant == 2) dcdiff = get_bits(gb, 9);
else dcdiff = get_bits(gb, 8);
}
else
{
if (mquant == 1)
dcdiff = (dcdiff<<2) + get_bits(gb, 2) - 3;
else if (mquant == 2)
dcdiff = (dcdiff<<1) + get_bits(gb, 1) - 1;
}
if (get_bits(gb, 1))
dcdiff = -dcdiff;
}
/* FIXME: 8.1.1.15, p(1)13, coeff scaling for Adv Profile */
return 0;
}
| 10,864 |
qemu | cf5f7937b05c84d5565134f058c00cd48304a117 | 1 | static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs)
{
ARMCPU *cpu = s->cpu;
uint32_t val;
switch (offset) {
case 4: /* Interrupt Control Type. */
return ((s->num_irq - NVIC_FIRST_IRQ) / 32) - 1;
case 0x380 ... 0x3bf: /* NVIC_ITNS<n> */
{
int startvec = 32 * (offset - 0x380) + NVIC_FIRST_IRQ;
int i;
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
val = 0;
for (i = 0; i < 32 && startvec + i < s->num_irq; i++) {
if (s->itns[startvec + i]) {
val |= (1 << i);
}
}
return val;
}
case 0xd00: /* CPUID Base. */
return cpu->midr;
case 0xd04: /* Interrupt Control State (ICSR) */
/* VECTACTIVE */
val = cpu->env.v7m.exception;
/* VECTPENDING */
val |= (s->vectpending & 0xff) << 12;
/* ISRPENDING - set if any external IRQ is pending */
if (nvic_isrpending(s)) {
val |= (1 << 22);
}
/* RETTOBASE - set if only one handler is active */
if (nvic_rettobase(s)) {
val |= (1 << 11);
}
if (attrs.secure) {
/* PENDSTSET */
if (s->sec_vectors[ARMV7M_EXCP_SYSTICK].pending) {
val |= (1 << 26);
}
/* PENDSVSET */
if (s->sec_vectors[ARMV7M_EXCP_PENDSV].pending) {
val |= (1 << 28);
}
} else {
/* PENDSTSET */
if (s->vectors[ARMV7M_EXCP_SYSTICK].pending) {
val |= (1 << 26);
}
/* PENDSVSET */
if (s->vectors[ARMV7M_EXCP_PENDSV].pending) {
val |= (1 << 28);
}
}
/* NMIPENDSET */
if ((cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK) &&
s->vectors[ARMV7M_EXCP_NMI].pending) {
val |= (1 << 31);
}
/* ISRPREEMPT: RES0 when halting debug not implemented */
/* STTNS: RES0 for the Main Extension */
return val;
case 0xd08: /* Vector Table Offset. */
return cpu->env.v7m.vecbase[attrs.secure];
case 0xd0c: /* Application Interrupt/Reset Control (AIRCR) */
val = 0xfa050000 | (s->prigroup[attrs.secure] << 8);
if (attrs.secure) {
/* s->aircr stores PRIS, BFHFNMINS, SYSRESETREQS */
val |= cpu->env.v7m.aircr;
} else {
if (arm_feature(&cpu->env, ARM_FEATURE_V8)) {
/* BFHFNMINS is R/O from NS; other bits are RAZ/WI. If
* security isn't supported then BFHFNMINS is RAO (and
* the bit in env.v7m.aircr is always set).
*/
val |= cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK;
}
}
return val;
case 0xd10: /* System Control. */
/* TODO: Implement SLEEPONEXIT. */
return 0;
case 0xd14: /* Configuration Control. */
/* The BFHFNMIGN bit is the only non-banked bit; we
* keep it in the non-secure copy of the register.
*/
val = cpu->env.v7m.ccr[attrs.secure];
val |= cpu->env.v7m.ccr[M_REG_NS] & R_V7M_CCR_BFHFNMIGN_MASK;
return val;
case 0xd24: /* System Handler Control and State (SHCSR) */
val = 0;
if (attrs.secure) {
if (s->sec_vectors[ARMV7M_EXCP_MEM].active) {
val |= (1 << 0);
}
if (s->sec_vectors[ARMV7M_EXCP_HARD].active) {
val |= (1 << 2);
}
if (s->sec_vectors[ARMV7M_EXCP_USAGE].active) {
val |= (1 << 3);
}
if (s->sec_vectors[ARMV7M_EXCP_SVC].active) {
val |= (1 << 7);
}
if (s->sec_vectors[ARMV7M_EXCP_PENDSV].active) {
val |= (1 << 10);
}
if (s->sec_vectors[ARMV7M_EXCP_SYSTICK].active) {
val |= (1 << 11);
}
if (s->sec_vectors[ARMV7M_EXCP_USAGE].pending) {
val |= (1 << 12);
}
if (s->sec_vectors[ARMV7M_EXCP_MEM].pending) {
val |= (1 << 13);
}
if (s->sec_vectors[ARMV7M_EXCP_SVC].pending) {
val |= (1 << 15);
}
if (s->sec_vectors[ARMV7M_EXCP_MEM].enabled) {
val |= (1 << 16);
}
if (s->sec_vectors[ARMV7M_EXCP_USAGE].enabled) {
val |= (1 << 18);
}
if (s->sec_vectors[ARMV7M_EXCP_HARD].pending) {
val |= (1 << 21);
}
/* SecureFault is not banked but is always RAZ/WI to NS */
if (s->vectors[ARMV7M_EXCP_SECURE].active) {
val |= (1 << 4);
}
if (s->vectors[ARMV7M_EXCP_SECURE].enabled) {
val |= (1 << 19);
}
if (s->vectors[ARMV7M_EXCP_SECURE].pending) {
val |= (1 << 20);
}
} else {
if (s->vectors[ARMV7M_EXCP_MEM].active) {
val |= (1 << 0);
}
if (arm_feature(&cpu->env, ARM_FEATURE_V8)) {
/* HARDFAULTACT, HARDFAULTPENDED not present in v7M */
if (s->vectors[ARMV7M_EXCP_HARD].active) {
val |= (1 << 2);
}
if (s->vectors[ARMV7M_EXCP_HARD].pending) {
val |= (1 << 21);
}
}
if (s->vectors[ARMV7M_EXCP_USAGE].active) {
val |= (1 << 3);
}
if (s->vectors[ARMV7M_EXCP_SVC].active) {
val |= (1 << 7);
}
if (s->vectors[ARMV7M_EXCP_PENDSV].active) {
val |= (1 << 10);
}
if (s->vectors[ARMV7M_EXCP_SYSTICK].active) {
val |= (1 << 11);
}
if (s->vectors[ARMV7M_EXCP_USAGE].pending) {
val |= (1 << 12);
}
if (s->vectors[ARMV7M_EXCP_MEM].pending) {
val |= (1 << 13);
}
if (s->vectors[ARMV7M_EXCP_SVC].pending) {
val |= (1 << 15);
}
if (s->vectors[ARMV7M_EXCP_MEM].enabled) {
val |= (1 << 16);
}
if (s->vectors[ARMV7M_EXCP_USAGE].enabled) {
val |= (1 << 18);
}
}
if (attrs.secure || (cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) {
if (s->vectors[ARMV7M_EXCP_BUS].active) {
val |= (1 << 1);
}
if (s->vectors[ARMV7M_EXCP_BUS].pending) {
val |= (1 << 14);
}
if (s->vectors[ARMV7M_EXCP_BUS].enabled) {
val |= (1 << 17);
}
if (arm_feature(&cpu->env, ARM_FEATURE_V8) &&
s->vectors[ARMV7M_EXCP_NMI].active) {
/* NMIACT is not present in v7M */
val |= (1 << 5);
}
}
/* TODO: this is RAZ/WI from NS if DEMCR.SDME is set */
if (s->vectors[ARMV7M_EXCP_DEBUG].active) {
val |= (1 << 8);
}
return val;
case 0xd28: /* Configurable Fault Status. */
/* The BFSR bits [15:8] are shared between security states
* and we store them in the NS copy
*/
val = cpu->env.v7m.cfsr[attrs.secure];
val |= cpu->env.v7m.cfsr[M_REG_NS] & R_V7M_CFSR_BFSR_MASK;
return val;
case 0xd2c: /* Hard Fault Status. */
return cpu->env.v7m.hfsr;
case 0xd30: /* Debug Fault Status. */
return cpu->env.v7m.dfsr;
case 0xd34: /* MMFAR MemManage Fault Address */
return cpu->env.v7m.mmfar[attrs.secure];
case 0xd38: /* Bus Fault Address. */
return cpu->env.v7m.bfar;
case 0xd3c: /* Aux Fault Status. */
/* TODO: Implement fault status registers. */
qemu_log_mask(LOG_UNIMP,
"Aux Fault status registers unimplemented\n");
return 0;
case 0xd40: /* PFR0. */
return 0x00000030;
case 0xd44: /* PRF1. */
return 0x00000200;
case 0xd48: /* DFR0. */
return 0x00100000;
case 0xd4c: /* AFR0. */
return 0x00000000;
case 0xd50: /* MMFR0. */
return 0x00000030;
case 0xd54: /* MMFR1. */
return 0x00000000;
case 0xd58: /* MMFR2. */
return 0x00000000;
case 0xd5c: /* MMFR3. */
return 0x00000000;
case 0xd60: /* ISAR0. */
return 0x01141110;
case 0xd64: /* ISAR1. */
return 0x02111000;
case 0xd68: /* ISAR2. */
return 0x21112231;
case 0xd6c: /* ISAR3. */
return 0x01111110;
case 0xd70: /* ISAR4. */
return 0x01310102;
/* TODO: Implement debug registers. */
case 0xd90: /* MPU_TYPE */
/* Unified MPU; if the MPU is not present this value is zero */
return cpu->pmsav7_dregion << 8;
break;
case 0xd94: /* MPU_CTRL */
return cpu->env.v7m.mpu_ctrl[attrs.secure];
case 0xd98: /* MPU_RNR */
return cpu->env.pmsav7.rnr[attrs.secure];
case 0xd9c: /* MPU_RBAR */
case 0xda4: /* MPU_RBAR_A1 */
case 0xdac: /* MPU_RBAR_A2 */
case 0xdb4: /* MPU_RBAR_A3 */
{
int region = cpu->env.pmsav7.rnr[attrs.secure];
if (arm_feature(&cpu->env, ARM_FEATURE_V8)) {
/* PMSAv8M handling of the aliases is different from v7M:
* aliases A1, A2, A3 override the low two bits of the region
* number in MPU_RNR, and there is no 'region' field in the
* RBAR register.
*/
int aliasno = (offset - 0xd9c) / 8; /* 0..3 */
if (aliasno) {
region = deposit32(region, 0, 2, aliasno);
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return cpu->env.pmsav8.rbar[attrs.secure][region];
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return (cpu->env.pmsav7.drbar[region] & 0x1f) | (region & 0xf);
}
case 0xda0: /* MPU_RASR (v7M), MPU_RLAR (v8M) */
case 0xda8: /* MPU_RASR_A1 (v7M), MPU_RLAR_A1 (v8M) */
case 0xdb0: /* MPU_RASR_A2 (v7M), MPU_RLAR_A2 (v8M) */
case 0xdb8: /* MPU_RASR_A3 (v7M), MPU_RLAR_A3 (v8M) */
{
int region = cpu->env.pmsav7.rnr[attrs.secure];
if (arm_feature(&cpu->env, ARM_FEATURE_V8)) {
/* PMSAv8M handling of the aliases is different from v7M:
* aliases A1, A2, A3 override the low two bits of the region
* number in MPU_RNR.
*/
int aliasno = (offset - 0xda0) / 8; /* 0..3 */
if (aliasno) {
region = deposit32(region, 0, 2, aliasno);
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return cpu->env.pmsav8.rlar[attrs.secure][region];
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return ((cpu->env.pmsav7.dracr[region] & 0xffff) << 16) |
(cpu->env.pmsav7.drsr[region] & 0xffff);
}
case 0xdc0: /* MPU_MAIR0 */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
return cpu->env.pmsav8.mair0[attrs.secure];
case 0xdc4: /* MPU_MAIR1 */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
return cpu->env.pmsav8.mair1[attrs.secure];
case 0xdd0: /* SAU_CTRL */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
return cpu->env.sau.ctrl;
case 0xdd4: /* SAU_TYPE */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
return cpu->sau_sregion;
case 0xdd8: /* SAU_RNR */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
return cpu->env.sau.rnr;
case 0xddc: /* SAU_RBAR */
{
int region = cpu->env.sau.rnr;
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
if (region >= cpu->sau_sregion) {
return 0;
}
return cpu->env.sau.rbar[region];
}
case 0xde0: /* SAU_RLAR */
{
int region = cpu->env.sau.rnr;
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
if (region >= cpu->sau_sregion) {
return 0;
}
return cpu->env.sau.rlar[region];
}
case 0xde4: /* SFSR */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
return cpu->env.v7m.sfsr;
case 0xde8: /* SFAR */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
if (!attrs.secure) {
return 0;
}
return cpu->env.v7m.sfar;
default:
bad_offset:
qemu_log_mask(LOG_GUEST_ERROR, "NVIC: Bad read offset 0x%x\n", offset);
return 0;
}
}
| 10,865 |
FFmpeg | 57d77b3963ce1023eaf5ada8cba58b9379405cc8 | 0 | static int init_opencl_env(GPUEnv *gpu_env, AVOpenCLExternalEnv *ext_opencl_env)
{
size_t device_length;
cl_int status;
cl_uint num_platforms, num_devices;
cl_platform_id *platform_ids = NULL;
cl_context_properties cps[3];
char platform_name[100];
int i, ret = 0;
cl_device_type device_type[] = {CL_DEVICE_TYPE_GPU, CL_DEVICE_TYPE_CPU, CL_DEVICE_TYPE_DEFAULT};
if (ext_opencl_env) {
if (gpu_env->is_user_created)
return 0;
gpu_env->platform_id = ext_opencl_env->platform_id;
gpu_env->is_user_created = 1;
gpu_env->command_queue = ext_opencl_env->command_queue;
gpu_env->context = ext_opencl_env->context;
gpu_env->device_ids = ext_opencl_env->device_ids;
gpu_env->device_id = ext_opencl_env->device_id;
gpu_env->device_type = ext_opencl_env->device_type;
} else {
if (!gpu_env->is_user_created) {
status = clGetPlatformIDs(0, NULL, &num_platforms);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL platform ids: %s\n", opencl_errstr(status));
return AVERROR_EXTERNAL;
}
if (gpu_env->usr_spec_dev_info.platform_idx >= 0) {
if (num_platforms < gpu_env->usr_spec_dev_info.platform_idx + 1) {
av_log(&openclutils, AV_LOG_ERROR, "User set platform index not exist\n");
return AVERROR(EINVAL);
}
}
if (num_platforms > 0) {
platform_ids = av_mallocz(num_platforms * sizeof(cl_platform_id));
if (!platform_ids) {
ret = AVERROR(ENOMEM);
goto end;
}
status = clGetPlatformIDs(num_platforms, platform_ids, NULL);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL platform ids: %s\n", opencl_errstr(status));
ret = AVERROR_EXTERNAL;
goto end;
}
i = 0;
if (gpu_env->usr_spec_dev_info.platform_idx >= 0) {
i = gpu_env->usr_spec_dev_info.platform_idx;
}
while (i < num_platforms) {
status = clGetPlatformInfo(platform_ids[i], CL_PLATFORM_VENDOR,
sizeof(platform_name), platform_name,
NULL);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL platform info: %s\n", opencl_errstr(status));
ret = AVERROR_EXTERNAL;
goto end;
}
gpu_env->platform_id = platform_ids[i];
status = clGetDeviceIDs(gpu_env->platform_id, CL_DEVICE_TYPE_GPU,
0, NULL, &num_devices);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL device number:%s\n", opencl_errstr(status));
ret = AVERROR_EXTERNAL;
goto end;
}
if (num_devices == 0) {
//find CPU device
status = clGetDeviceIDs(gpu_env->platform_id, CL_DEVICE_TYPE_CPU,
0, NULL, &num_devices);
}
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL device ids: %s\n", opencl_errstr(status));
ret = AVERROR(EINVAL);
goto end;
}
if (num_devices)
break;
if (gpu_env->usr_spec_dev_info.platform_idx >= 0) {
av_log(&openclutils, AV_LOG_ERROR, "Device number of user set platform is 0\n");
ret = AVERROR_EXTERNAL;
goto end;
}
i++;
}
}
if (!gpu_env->platform_id) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL platforms\n");
ret = AVERROR_EXTERNAL;
goto end;
}
if (gpu_env->usr_spec_dev_info.dev_idx >= 0) {
if (num_devices < gpu_env->usr_spec_dev_info.dev_idx + 1) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL device idx in the user set platform\n");
ret = AVERROR(EINVAL);
goto end;
}
}
/*
* Use available platform.
*/
av_log(&openclutils, AV_LOG_VERBOSE, "Platform Name: %s\n", platform_name);
cps[0] = CL_CONTEXT_PLATFORM;
cps[1] = (cl_context_properties)gpu_env->platform_id;
cps[2] = 0;
/* Check for GPU. */
for (i = 0; i < sizeof(device_type); i++) {
gpu_env->device_type = device_type[i];
gpu_env->context = clCreateContextFromType(cps, gpu_env->device_type,
NULL, NULL, &status);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL context from device type: %s\n", opencl_errstr(status));
ret = AVERROR_EXTERNAL;
goto end;
}
if (gpu_env->context)
break;
}
if (!gpu_env->context) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL context from device type\n");
ret = AVERROR_EXTERNAL;
goto end;
}
/* Detect OpenCL devices. */
/* First, get the size of device list data */
status = clGetContextInfo(gpu_env->context, CL_CONTEXT_DEVICES,
0, NULL, &device_length);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL device length: %s\n", opencl_errstr(status));
ret = AVERROR_EXTERNAL;
goto end;
}
if (device_length == 0) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL device length\n");
ret = AVERROR_EXTERNAL;
goto end;
}
/* Now allocate memory for device list based on the size we got earlier */
gpu_env->device_ids = av_mallocz(device_length);
if (!gpu_env->device_ids) {
ret = AVERROR(ENOMEM);
goto end;
}
/* Now, get the device list data */
status = clGetContextInfo(gpu_env->context, CL_CONTEXT_DEVICES, device_length,
gpu_env->device_ids, NULL);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not get OpenCL context info: %s\n", opencl_errstr(status));
ret = AVERROR_EXTERNAL;
goto end;
}
/* Create OpenCL command queue. */
i = 0;
if (gpu_env->usr_spec_dev_info.dev_idx >= 0) {
i = gpu_env->usr_spec_dev_info.dev_idx;
}
gpu_env->command_queue = clCreateCommandQueue(gpu_env->context, gpu_env->device_ids[i],
0, &status);
if (status != CL_SUCCESS) {
av_log(&openclutils, AV_LOG_ERROR, "Could not create OpenCL command queue: %s\n", opencl_errstr(status));
ret = AVERROR_EXTERNAL;
goto end;
}
}
}
end:
av_free(platform_ids);
return ret;
}
| 10,866 |
qemu | cd98639f673d92836b6b5fd60279b411748f2f1e | 1 | static int vhost_user_call(struct vhost_dev *dev, unsigned long int request,
void *arg)
{
VhostUserMsg msg;
VhostUserRequest msg_request;
struct vhost_vring_file *file = 0;
int need_reply = 0;
int fds[VHOST_MEMORY_MAX_NREGIONS];
int i, fd;
size_t fd_num = 0;
assert(dev->vhost_ops->backend_type == VHOST_BACKEND_TYPE_USER);
msg_request = vhost_user_request_translate(request);
msg.request = msg_request;
msg.flags = VHOST_USER_VERSION;
msg.size = 0;
switch (request) {
case VHOST_GET_FEATURES:
need_reply = 1;
break;
case VHOST_SET_FEATURES:
case VHOST_SET_LOG_BASE:
msg.u64 = *((__u64 *) arg);
msg.size = sizeof(m.u64);
break;
case VHOST_SET_OWNER:
case VHOST_RESET_OWNER:
break;
case VHOST_SET_MEM_TABLE:
for (i = 0; i < dev->mem->nregions; ++i) {
struct vhost_memory_region *reg = dev->mem->regions + i;
ram_addr_t ram_addr;
qemu_ram_addr_from_host((void *)reg->userspace_addr, &ram_addr);
fd = qemu_get_ram_fd(ram_addr);
if (fd > 0) {
msg.memory.regions[fd_num].userspace_addr = reg->userspace_addr;
msg.memory.regions[fd_num].memory_size = reg->memory_size;
msg.memory.regions[fd_num].guest_phys_addr = reg->guest_phys_addr;
msg.memory.regions[fd_num].mmap_offset = reg->userspace_addr -
(uintptr_t) qemu_get_ram_block_host_ptr(reg->guest_phys_addr);
assert(fd_num < VHOST_MEMORY_MAX_NREGIONS);
fds[fd_num++] = fd;
}
}
msg.memory.nregions = fd_num;
if (!fd_num) {
error_report("Failed initializing vhost-user memory map\n"
"consider using -object memory-backend-file share=on\n");
return -1;
}
msg.size = sizeof(m.memory.nregions);
msg.size += sizeof(m.memory.padding);
msg.size += fd_num * sizeof(VhostUserMemoryRegion);
break;
case VHOST_SET_LOG_FD:
fds[fd_num++] = *((int *) arg);
break;
case VHOST_SET_VRING_NUM:
case VHOST_SET_VRING_BASE:
memcpy(&msg.state, arg, sizeof(struct vhost_vring_state));
msg.size = sizeof(m.state);
break;
case VHOST_GET_VRING_BASE:
memcpy(&msg.state, arg, sizeof(struct vhost_vring_state));
msg.size = sizeof(m.state);
need_reply = 1;
break;
case VHOST_SET_VRING_ADDR:
memcpy(&msg.addr, arg, sizeof(struct vhost_vring_addr));
msg.size = sizeof(m.addr);
break;
case VHOST_SET_VRING_KICK:
case VHOST_SET_VRING_CALL:
case VHOST_SET_VRING_ERR:
file = arg;
msg.u64 = file->index & VHOST_USER_VRING_IDX_MASK;
msg.size = sizeof(m.u64);
if (ioeventfd_enabled() && file->fd > 0) {
fds[fd_num++] = file->fd;
} else {
msg.u64 |= VHOST_USER_VRING_NOFD_MASK;
}
break;
default:
error_report("vhost-user trying to send unhandled ioctl\n");
return -1;
break;
}
if (vhost_user_write(dev, &msg, fds, fd_num) < 0) {
return 0;
}
if (need_reply) {
if (vhost_user_read(dev, &msg) < 0) {
return 0;
}
if (msg_request != msg.request) {
error_report("Received unexpected msg type."
" Expected %d received %d\n", msg_request, msg.request);
return -1;
}
switch (msg_request) {
case VHOST_USER_GET_FEATURES:
if (msg.size != sizeof(m.u64)) {
error_report("Received bad msg size.\n");
return -1;
}
*((__u64 *) arg) = msg.u64;
break;
case VHOST_USER_GET_VRING_BASE:
if (msg.size != sizeof(m.state)) {
error_report("Received bad msg size.\n");
return -1;
}
memcpy(arg, &msg.state, sizeof(struct vhost_vring_state));
break;
default:
error_report("Received unexpected msg type.\n");
return -1;
break;
}
}
return 0;
}
| 10,870 |
qemu | 6ff5816478940c76d3412593e503f644af531d49 | 1 | static int nbd_receive_list(QIOChannel *ioc, char **name, Error **errp)
{
uint64_t magic;
uint32_t opt;
uint32_t type;
uint32_t len;
uint32_t namelen;
*name = NULL;
if (read_sync(ioc, &magic, sizeof(magic)) != sizeof(magic)) {
error_setg(errp, "failed to read list option magic");
return -1;
}
magic = be64_to_cpu(magic);
if (magic != NBD_REP_MAGIC) {
error_setg(errp, "Unexpected option list magic");
return -1;
}
if (read_sync(ioc, &opt, sizeof(opt)) != sizeof(opt)) {
error_setg(errp, "failed to read list option");
return -1;
}
opt = be32_to_cpu(opt);
if (opt != NBD_OPT_LIST) {
error_setg(errp, "Unexpected option type %x expected %x",
opt, NBD_OPT_LIST);
return -1;
}
if (read_sync(ioc, &type, sizeof(type)) != sizeof(type)) {
error_setg(errp, "failed to read list option type");
return -1;
}
type = be32_to_cpu(type);
if (type == NBD_REP_ERR_UNSUP) {
return 0;
}
if (nbd_handle_reply_err(opt, type, errp) < 0) {
return -1;
}
if (read_sync(ioc, &len, sizeof(len)) != sizeof(len)) {
error_setg(errp, "failed to read option length");
return -1;
}
len = be32_to_cpu(len);
if (type == NBD_REP_ACK) {
if (len != 0) {
error_setg(errp, "length too long for option end");
return -1;
}
} else if (type == NBD_REP_SERVER) {
if (read_sync(ioc, &namelen, sizeof(namelen)) != sizeof(namelen)) {
error_setg(errp, "failed to read option name length");
return -1;
}
namelen = be32_to_cpu(namelen);
if (len != (namelen + sizeof(namelen))) {
error_setg(errp, "incorrect option mame length");
return -1;
}
if (namelen > 255) {
error_setg(errp, "export name length too long %d", namelen);
return -1;
}
*name = g_new0(char, namelen + 1);
if (read_sync(ioc, *name, namelen) != namelen) {
error_setg(errp, "failed to read export name");
g_free(*name);
*name = NULL;
return -1;
}
(*name)[namelen] = '\0';
} else {
error_setg(errp, "Unexpected reply type %x expected %x",
type, NBD_REP_SERVER);
return -1;
}
return 1;
}
| 10,871 |
qemu | b5806108d20fc32b4692e721d8bd6376f4ca4a69 | 1 | int64_t throttle_compute_wait(LeakyBucket *bkt)
{
double extra; /* the number of extra units blocking the io */
double bucket_size; /* I/O before throttling to bkt->avg */
double burst_bucket_size; /* Before throttling to bkt->max */
if (!bkt->avg) {
return 0;
}
if (!bkt->max) {
/* If bkt->max is 0 we still want to allow short bursts of I/O
* from the guest, otherwise every other request will be throttled
* and performance will suffer considerably. */
bucket_size = (double) bkt->avg / 10;
burst_bucket_size = 0;
} else {
/* If we have a burst limit then we have to wait until all I/O
* at burst rate has finished before throttling to bkt->avg */
bucket_size = bkt->max * bkt->burst_length;
burst_bucket_size = (double) bkt->max / 10;
}
/* If the main bucket is full then we have to wait */
extra = bkt->level - bucket_size;
if (extra > 0) {
return throttle_do_compute_wait(bkt->avg, extra);
}
/* If the main bucket is not full yet we still have to check the
* burst bucket in order to enforce the burst limit */
if (bkt->burst_length > 1) {
extra = bkt->burst_level - burst_bucket_size;
if (extra > 0) {
return throttle_do_compute_wait(bkt->max, extra);
}
}
return 0;
} | 10,872 |
qemu | ac43fa508cc1cfe6d6f67c8eb99dc012e52c164e | 1 | static uint64_t pci_host_data_read(void *opaque,
hwaddr addr, unsigned len)
{
PCIHostState *s = opaque;
uint32_t val;
if (!(s->config_reg & (1 << 31)))
return 0xffffffff;
val = pci_data_read(s->bus, s->config_reg | (addr & 3), len);
PCI_DPRINTF("read addr " TARGET_FMT_plx " len %d val %x\n",
addr, len, val);
return val;
}
| 10,873 |
qemu | b4ba67d9a702507793c2724e56f98e9b0f7be02b | 1 | static void test_tco_timeout(void)
{
TestData d;
const uint16_t ticks = TCO_SECS_TO_TICKS(4);
uint32_t val;
int ret;
d.args = NULL;
d.noreboot = true;
test_init(&d);
stop_tco(&d);
clear_tco_status(&d);
reset_on_second_timeout(false);
set_tco_timeout(&d, ticks);
load_tco(&d);
start_tco(&d);
clock_step(ticks * TCO_TICK_NSEC);
/* test first timeout */
val = qpci_io_readw(d.dev, d.tco_io_base + TCO1_STS);
ret = val & TCO_TIMEOUT ? 1 : 0;
g_assert(ret == 1);
/* test clearing timeout bit */
val |= TCO_TIMEOUT;
qpci_io_writew(d.dev, d.tco_io_base + TCO1_STS, val);
val = qpci_io_readw(d.dev, d.tco_io_base + TCO1_STS);
ret = val & TCO_TIMEOUT ? 1 : 0;
g_assert(ret == 0);
/* test second timeout */
clock_step(ticks * TCO_TICK_NSEC);
val = qpci_io_readw(d.dev, d.tco_io_base + TCO1_STS);
ret = val & TCO_TIMEOUT ? 1 : 0;
g_assert(ret == 1);
val = qpci_io_readw(d.dev, d.tco_io_base + TCO2_STS);
ret = val & TCO_SECOND_TO_STS ? 1 : 0;
g_assert(ret == 1);
stop_tco(&d);
qtest_end();
}
| 10,874 |
qemu | 53cb28cbfea038f8ad50132dc8a684e638c7d48b | 0 | hwaddr memory_region_section_get_iotlb(CPUArchState *env,
MemoryRegionSection *section,
target_ulong vaddr,
hwaddr paddr, hwaddr xlat,
int prot,
target_ulong *address)
{
hwaddr iotlb;
CPUWatchpoint *wp;
if (memory_region_is_ram(section->mr)) {
/* Normal RAM. */
iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
+ xlat;
if (!section->readonly) {
iotlb |= PHYS_SECTION_NOTDIRTY;
} else {
iotlb |= PHYS_SECTION_ROM;
}
} else {
iotlb = section - address_space_memory.dispatch->sections;
iotlb += xlat;
}
/* Make accesses to pages with watchpoints go via the
watchpoint trap routines. */
QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) {
/* Avoid trapping reads of pages with a write breakpoint. */
if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
iotlb = PHYS_SECTION_WATCH + paddr;
*address |= TLB_MMIO;
break;
}
}
}
return iotlb;
}
| 10,876 |
qemu | de9e9d9f17a36ff76c1a02a5348835e5e0a081b0 | 0 | static inline void gen_op_eval_fbule(TCGv dst, TCGv src,
unsigned int fcc_offset)
{
gen_mov_reg_FCC0(dst, src, fcc_offset);
tcg_gen_xori_tl(dst, dst, 0x1);
gen_mov_reg_FCC1(cpu_tmp0, src, fcc_offset);
tcg_gen_and_tl(dst, dst, cpu_tmp0);
tcg_gen_xori_tl(dst, dst, 0x1);
}
| 10,878 |
qemu | c92cfba822245c42fec611f310ed74c1821be3d2 | 0 | PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
{
PXA2xxState *s;
int i;
DriveInfo *dinfo;
s = g_new0(PXA2xxState, 1);
s->cpu = cpu_arm_init("pxa255");
if (s->cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0);
/* SDRAM & Internal Memory Storage */
memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size,
&error_fatal);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
memory_region_init_ram(&s->internal, NULL, "pxa255.internal",
PXA2XX_INTERNAL_SIZE, &error_fatal);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);
s->pic = pxa2xx_pic_init(0x40d00000, s->cpu);
s->dma = pxa255_dma_init(0x40000000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_DMA));
sysbus_create_varargs("pxa25x-timer", 0x40a00000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_OST_0 + 0),
qdev_get_gpio_in(s->pic, PXA2XX_PIC_OST_0 + 1),
qdev_get_gpio_in(s->pic, PXA2XX_PIC_OST_0 + 2),
qdev_get_gpio_in(s->pic, PXA2XX_PIC_OST_0 + 3),
NULL);
s->gpio = pxa2xx_gpio_init(0x40e00000, s->cpu, s->pic, 85);
dinfo = drive_get(IF_SD, 0, 0);
if (!dinfo) {
fprintf(stderr, "qemu: missing SecureDigital device\n");
exit(1);
}
s->mmc = pxa2xx_mmci_init(address_space, 0x41100000,
blk_by_legacy_dinfo(dinfo),
qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
serial_mm_init(address_space, pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
} else {
break;
}
}
if (serial_hds[i])
s->fir = pxa2xx_fir_init(address_space, 0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_ICP),
serial_hds[i]);
s->lcd = pxa2xx_lcdc_init(address_space, 0x44000000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_LCD));
s->cm_base = 0x41300000;
s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
s->clkcfg = 0x00000009; /* Turbo mode active */
memory_region_init_io(&s->cm_iomem, NULL, &pxa2xx_cm_ops, s, "pxa2xx-cm", 0x1000);
memory_region_add_subregion(address_space, s->cm_base, &s->cm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_cm, s);
pxa2xx_setup_cp14(s);
s->mm_base = 0x48000000;
s->mm_regs[MDMRS >> 2] = 0x00020002;
s->mm_regs[MDREFR >> 2] = 0x03ca4000;
s->mm_regs[MECR >> 2] = 0x00000001; /* Two PC Card sockets */
memory_region_init_io(&s->mm_iomem, NULL, &pxa2xx_mm_ops, s, "pxa2xx-mm", 0x1000);
memory_region_add_subregion(address_space, s->mm_base, &s->mm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_mm, s);
s->pm_base = 0x40f00000;
memory_region_init_io(&s->pm_iomem, NULL, &pxa2xx_pm_ops, s, "pxa2xx-pm", 0x100);
memory_region_add_subregion(address_space, s->pm_base, &s->pm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_pm, s);
for (i = 0; pxa255_ssp[i].io_base; i ++);
s->ssp = g_new0(SSIBus *, i);
for (i = 0; pxa255_ssp[i].io_base; i ++) {
DeviceState *dev;
dev = sysbus_create_simple(TYPE_PXA2XX_SSP, pxa255_ssp[i].io_base,
qdev_get_gpio_in(s->pic, pxa255_ssp[i].irqn));
s->ssp[i] = (SSIBus *)qdev_get_child_bus(dev, "ssi");
}
if (usb_enabled()) {
sysbus_create_simple("sysbus-ohci", 0x4c000000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_USBH1));
}
s->pcmcia[0] = pxa2xx_pcmcia_init(address_space, 0x20000000);
s->pcmcia[1] = pxa2xx_pcmcia_init(address_space, 0x30000000);
sysbus_create_simple(TYPE_PXA2XX_RTC, 0x40900000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_RTCALARM));
s->i2c[0] = pxa2xx_i2c_init(0x40301600,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_I2C), 0xffff);
s->i2c[1] = pxa2xx_i2c_init(0x40f00100,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_PWRI2C), 0xff);
s->i2s = pxa2xx_i2s_init(address_space, 0x40400000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_I2S),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_I2S),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_I2S));
/* GPIO1 resets the processor */
/* The handler can be overridden by board-specific code */
qdev_connect_gpio_out(s->gpio, 1, s->reset);
return s;
}
| 10,879 |
FFmpeg | 5049f6b772891cdf4030a9d572362efc8f7ae97f | 0 | static int jpeg_parse_packet(AVFormatContext *ctx, PayloadContext *jpeg,
AVStream *st, AVPacket *pkt, uint32_t *timestamp,
const uint8_t *buf, int len, uint16_t seq,
int flags)
{
uint8_t type, q, width, height;
const uint8_t *qtables = NULL;
uint16_t qtable_len;
uint32_t off;
int ret;
if (len < 8) {
av_log(ctx, AV_LOG_ERROR, "Too short RTP/JPEG packet.\n");
return AVERROR_INVALIDDATA;
}
/* Parse the main JPEG header. */
off = AV_RB24(buf + 1); /* fragment byte offset */
type = AV_RB8(buf + 4); /* id of jpeg decoder params */
q = AV_RB8(buf + 5); /* quantization factor (or table id) */
width = AV_RB8(buf + 6); /* frame width in 8 pixel blocks */
height = AV_RB8(buf + 7); /* frame height in 8 pixel blocks */
buf += 8;
len -= 8;
/* Parse the restart marker header. */
if (type > 63) {
av_log(ctx, AV_LOG_ERROR,
"Unimplemented RTP/JPEG restart marker header.\n");
return AVERROR_PATCHWELCOME;
}
if (type > 1) {
av_log(ctx, AV_LOG_ERROR, "Unimplemented RTP/JPEG type %d\n", type);
return AVERROR_PATCHWELCOME;
}
/* Parse the quantization table header. */
if (off == 0) {
/* Start of JPEG data packet. */
uint8_t new_qtables[128];
uint8_t hdr[1024];
if (q > 127) {
uint8_t precision;
if (len < 4) {
av_log(ctx, AV_LOG_ERROR, "Too short RTP/JPEG packet.\n");
return AVERROR_INVALIDDATA;
}
/* The first byte is reserved for future use. */
precision = AV_RB8(buf + 1); /* size of coefficients */
qtable_len = AV_RB16(buf + 2); /* length in bytes */
buf += 4;
len -= 4;
if (precision)
av_log(ctx, AV_LOG_WARNING, "Only 8-bit precision is supported.\n");
if (qtable_len > 0) {
if (len < qtable_len) {
av_log(ctx, AV_LOG_ERROR, "Too short RTP/JPEG packet.\n");
return AVERROR_INVALIDDATA;
}
qtables = buf;
buf += qtable_len;
len -= qtable_len;
if (q < 255) {
if (jpeg->qtables_len[q - 128] &&
(jpeg->qtables_len[q - 128] != qtable_len ||
memcmp(qtables, &jpeg->qtables[q - 128][0], qtable_len))) {
av_log(ctx, AV_LOG_WARNING,
"Quantization tables for q=%d changed\n", q);
} else if (!jpeg->qtables_len[q - 128] && qtable_len <= 128) {
memcpy(&jpeg->qtables[q - 128][0], qtables,
qtable_len);
jpeg->qtables_len[q - 128] = qtable_len;
}
}
} else {
if (q == 255) {
av_log(ctx, AV_LOG_ERROR,
"Invalid RTP/JPEG packet. Quantization tables not found.\n");
return AVERROR_INVALIDDATA;
}
if (!jpeg->qtables_len[q - 128]) {
av_log(ctx, AV_LOG_ERROR,
"No quantization tables known for q=%d yet.\n", q);
return AVERROR_INVALIDDATA;
}
qtables = &jpeg->qtables[q - 128][0];
qtable_len = jpeg->qtables_len[q - 128];
}
} else { /* q <= 127 */
if (q == 0 || q > 99) {
av_log(ctx, AV_LOG_ERROR, "Reserved q value %d\n", q);
return AVERROR_INVALIDDATA;
}
create_default_qtables(new_qtables, q);
qtables = new_qtables;
qtable_len = sizeof(new_qtables);
}
/* Skip the current frame in case of the end packet
* has been lost somewhere. */
ffio_free_dyn_buf(&jpeg->frame);
if ((ret = avio_open_dyn_buf(&jpeg->frame)) < 0)
return ret;
jpeg->timestamp = *timestamp;
/* Generate a frame and scan headers that can be prepended to the
* RTP/JPEG data payload to produce a JPEG compressed image in
* interchange format. */
jpeg->hdr_size = jpeg_create_header(hdr, sizeof(hdr), type, width,
height, qtables,
qtable_len / 64);
/* Copy JPEG header to frame buffer. */
avio_write(jpeg->frame, hdr, jpeg->hdr_size);
}
if (!jpeg->frame) {
av_log(ctx, AV_LOG_ERROR,
"Received packet without a start chunk; dropping frame.\n");
return AVERROR(EAGAIN);
}
if (jpeg->timestamp != *timestamp) {
/* Skip the current frame if timestamp is incorrect.
* A start packet has been lost somewhere. */
ffio_free_dyn_buf(&jpeg->frame);
av_log(ctx, AV_LOG_ERROR, "RTP timestamps don't match.\n");
return AVERROR_INVALIDDATA;
}
if (off != avio_tell(jpeg->frame) - jpeg->hdr_size) {
av_log(ctx, AV_LOG_ERROR,
"Missing packets; dropping frame.\n");
return AVERROR(EAGAIN);
}
/* Copy data to frame buffer. */
avio_write(jpeg->frame, buf, len);
if (flags & RTP_FLAG_MARKER) {
/* End of JPEG data packet. */
uint8_t buf[2] = { 0xff, EOI };
/* Put EOI marker. */
avio_write(jpeg->frame, buf, sizeof(buf));
/* Prepare the JPEG packet. */
if ((ret = ff_rtp_finalize_packet(pkt, &jpeg->frame, st->index)) < 0) {
av_log(ctx, AV_LOG_ERROR,
"Error occurred when getting frame buffer.\n");
return ret;
}
return 0;
}
return AVERROR(EAGAIN);
}
| 10,880 |
qemu | e387c33892be35ca70255739a2fe118f76c95ac3 | 0 | int kvm_on_sigbus_vcpu(CPUState *env, int code, void *addr)
{
#if defined(KVM_CAP_MCE)
struct kvm_x86_mce mce = {
.bank = 9,
};
void *vaddr;
ram_addr_t ram_addr;
target_phys_addr_t paddr;
int r;
if ((env->mcg_cap & MCG_SER_P) && addr
&& (code == BUS_MCEERR_AR
|| code == BUS_MCEERR_AO)) {
if (code == BUS_MCEERR_AR) {
/* Fake an Intel architectural Data Load SRAR UCR */
mce.status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN
| MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S
| MCI_STATUS_AR | 0x134;
mce.misc = (MCM_ADDR_PHYS << 6) | 0xc;
mce.mcg_status = MCG_STATUS_MCIP | MCG_STATUS_EIPV;
} else {
/*
* If there is an MCE excpetion being processed, ignore
* this SRAO MCE
*/
if (kvm_mce_in_progress(env)) {
return 0;
}
/* Fake an Intel architectural Memory scrubbing UCR */
mce.status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN
| MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S
| 0xc0;
mce.misc = (MCM_ADDR_PHYS << 6) | 0xc;
mce.mcg_status = MCG_STATUS_MCIP | MCG_STATUS_RIPV;
}
vaddr = (void *)addr;
if (qemu_ram_addr_from_host(vaddr, &ram_addr) ||
!kvm_physical_memory_addr_from_ram(env->kvm_state, ram_addr, &paddr)) {
fprintf(stderr, "Hardware memory error for memory used by "
"QEMU itself instead of guest system!\n");
/* Hope we are lucky for AO MCE */
if (code == BUS_MCEERR_AO) {
return 0;
} else {
hardware_memory_error();
}
}
mce.addr = paddr;
r = kvm_set_mce(env, &mce);
if (r < 0) {
fprintf(stderr, "kvm_set_mce: %s\n", strerror(errno));
abort();
}
kvm_mce_broadcast_rest(env);
} else
#endif
{
if (code == BUS_MCEERR_AO) {
return 0;
} else if (code == BUS_MCEERR_AR) {
hardware_memory_error();
} else {
return 1;
}
}
return 0;
}
| 10,881 |
qemu | 28143b409f698210d85165ca518235ac7e7c5ac5 | 0 | int kvm_has_pit_state2(void)
{
return 0;
}
| 10,882 |
qemu | a8170e5e97ad17ca169c64ba87ae2f53850dab4c | 0 | void mcf_fec_init(MemoryRegion *sysmem, NICInfo *nd,
target_phys_addr_t base, qemu_irq *irq)
{
mcf_fec_state *s;
qemu_check_nic_model(nd, "mcf_fec");
s = (mcf_fec_state *)g_malloc0(sizeof(mcf_fec_state));
s->sysmem = sysmem;
s->irq = irq;
memory_region_init_io(&s->iomem, &mcf_fec_ops, s, "fec", 0x400);
memory_region_add_subregion(sysmem, base, &s->iomem);
s->conf.macaddr = nd->macaddr;
s->conf.peer = nd->netdev;
s->nic = qemu_new_nic(&net_mcf_fec_info, &s->conf, nd->model, nd->name, s);
qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
}
| 10,883 |
qemu | 42a268c241183877192c376d03bd9b6d527407c7 | 0 | static void dec10_reg_scc(DisasContext *dc)
{
int cond = dc->dst;
LOG_DIS("s%s $r%u\n", cc_name(cond), dc->src);
if (cond != CC_A)
{
int l1;
gen_tst_cc (dc, cpu_R[dc->src], cond);
l1 = gen_new_label();
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[dc->src], 0, l1);
tcg_gen_movi_tl(cpu_R[dc->src], 1);
gen_set_label(l1);
} else {
tcg_gen_movi_tl(cpu_R[dc->src], 1);
}
cris_cc_mask(dc, 0);
}
| 10,884 |
qemu | 5255fcf8e47acd059e2f0d414841c40231c1bd22 | 0 | void armv7m_nvic_acknowledge_irq(void *opaque)
{
NVICState *s = (NVICState *)opaque;
CPUARMState *env = &s->cpu->env;
const int pending = s->vectpending;
const int running = nvic_exec_prio(s);
int pendgroupprio;
VecInfo *vec;
assert(pending > ARMV7M_EXCP_RESET && pending < s->num_irq);
vec = &s->vectors[pending];
assert(vec->enabled);
assert(vec->pending);
pendgroupprio = vec->prio;
if (pendgroupprio > 0) {
pendgroupprio &= nvic_gprio_mask(s);
}
assert(pendgroupprio < running);
trace_nvic_acknowledge_irq(pending, vec->prio);
vec->active = 1;
vec->pending = 0;
env->v7m.exception = s->vectpending;
nvic_irq_update(s);
}
| 10,885 |
qemu | db39fcf1f690b02d612e2bfc00980700887abe03 | 0 | static CharDriverState *text_console_init(ChardevVC *vc)
{
CharDriverState *chr;
QemuConsole *s;
unsigned width = 0;
unsigned height = 0;
chr = g_malloc0(sizeof(CharDriverState));
if (vc->has_width) {
width = vc->width;
} else if (vc->has_cols) {
width = vc->cols * FONT_WIDTH;
}
if (vc->has_height) {
height = vc->height;
} else if (vc->has_rows) {
height = vc->rows * FONT_HEIGHT;
}
trace_console_txt_new(width, height);
if (width == 0 || height == 0) {
s = new_console(NULL, TEXT_CONSOLE, 0);
} else {
s = new_console(NULL, TEXT_CONSOLE_FIXED_SIZE, 0);
s->surface = qemu_create_displaysurface(width, height);
}
if (!s) {
g_free(chr);
return NULL;
}
s->chr = chr;
chr->opaque = s;
chr->chr_set_echo = text_console_set_echo;
/* console/chardev init sometimes completes elsewhere in a 2nd
* stage, so defer OPENED events until they are fully initialized
*/
chr->explicit_be_open = true;
if (display_state) {
text_console_do_init(chr, display_state);
}
return chr;
}
| 10,886 |
qemu | 9be385980d37e8f4fd33f605f5fb1c3d144170a8 | 0 | static char *spapr_vio_get_dev_name(DeviceState *qdev)
{
VIOsPAPRDevice *dev = VIO_SPAPR_DEVICE(qdev);
VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
char *name;
/* Device tree style name device@reg */
name = g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
return name;
}
| 10,887 |
qemu | 1964a397063967acc5ce71a2a24ed26e74824ee1 | 0 | static int64_t migration_get_rate_limit(void *opaque)
{
MigrationState *s = opaque;
return s->xfer_limit;
}
| 10,888 |
qemu | 5a2223ca26b1a34e131b5b9a63599d9426d2c25c | 0 | static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
{
AcpiPciHpState *s = opaque;
uint32_t val = 0;
int bsel = s->hotplug_select;
if (bsel < 0 || bsel > ACPI_PCIHP_MAX_HOTPLUG_BUS) {
return 0;
}
switch (addr) {
case PCI_UP_BASE - PCI_HOTPLUG_ADDR:
/* Manufacture an "up" value to cause a device check on any hotplug
* slot with a device. Extra device checks are harmless. */
val = s->acpi_pcihp_pci_status[bsel].device_present &
s->acpi_pcihp_pci_status[bsel].hotplug_enable;
ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
break;
case PCI_DOWN_BASE - PCI_HOTPLUG_ADDR:
val = s->acpi_pcihp_pci_status[bsel].down;
ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
break;
case PCI_EJ_BASE - PCI_HOTPLUG_ADDR:
/* No feature defined yet */
ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
break;
case PCI_RMV_BASE - PCI_HOTPLUG_ADDR:
val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
break;
case PCI_SEL_BASE - PCI_HOTPLUG_ADDR:
val = s->hotplug_select;
ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
default:
break;
}
return val;
}
| 10,890 |
FFmpeg | 202a6697ba54293235ce2d7bd5724f4f461e417f | 0 | rdt_new_extradata (void)
{
PayloadContext *rdt = av_mallocz(sizeof(PayloadContext));
av_open_input_stream(&rdt->rmctx, NULL, "", &rdt_demuxer, NULL);
return rdt;
}
| 10,891 |
qemu | d5b68844e6f7c13d30b46cc92ba468e5f92119a6 | 0 | BlockInfoList *qmp_query_block(Error **errp)
{
BlockInfoList *head = NULL, **p_next = &head;
BlockBackend *blk;
Error *local_err = NULL;
for (blk = blk_next(NULL); blk; blk = blk_next(blk)) {
BlockInfoList *info = g_malloc0(sizeof(*info));
bdrv_query_info(blk, &info->value, &local_err);
if (local_err) {
error_propagate(errp, local_err);
g_free(info);
qapi_free_BlockInfoList(head);
return NULL;
}
*p_next = info;
p_next = &info->next;
}
return head;
}
| 10,892 |
qemu | db1e80ee2ed6fc9eb6b203873b39752144f5577f | 0 | static int vhdx_create_new_region_table(BlockDriverState *bs,
uint64_t image_size,
uint32_t block_size,
uint32_t sector_size,
uint32_t log_size,
bool use_zero_blocks,
VHDXImageType type,
uint64_t *metadata_offset)
{
int ret = 0;
uint32_t offset = 0;
void *buffer = NULL;
uint64_t bat_file_offset;
uint32_t bat_length;
BDRVVHDXState *s = NULL;
VHDXRegionTableHeader *region_table;
VHDXRegionTableEntry *rt_bat;
VHDXRegionTableEntry *rt_metadata;
assert(metadata_offset != NULL);
/* Populate enough of the BDRVVHDXState to be able to use the
* pre-existing BAT calculation, translation, and update functions */
s = g_new0(BDRVVHDXState, 1);
s->chunk_ratio = (VHDX_MAX_SECTORS_PER_BLOCK) *
(uint64_t) sector_size / (uint64_t) block_size;
s->sectors_per_block = block_size / sector_size;
s->virtual_disk_size = image_size;
s->block_size = block_size;
s->logical_sector_size = sector_size;
vhdx_set_shift_bits(s);
vhdx_calc_bat_entries(s);
/* At this point the VHDX state is populated enough for creation */
/* a single buffer is used so we can calculate the checksum over the
* entire 64KB block */
buffer = g_malloc0(VHDX_HEADER_BLOCK_SIZE);
region_table = buffer;
offset += sizeof(VHDXRegionTableHeader);
rt_bat = buffer + offset;
offset += sizeof(VHDXRegionTableEntry);
rt_metadata = buffer + offset;
region_table->signature = VHDX_REGION_SIGNATURE;
region_table->entry_count = 2; /* BAT and Metadata */
rt_bat->guid = bat_guid;
rt_bat->length = ROUND_UP(s->bat_entries * sizeof(VHDXBatEntry), MiB);
rt_bat->file_offset = ROUND_UP(VHDX_HEADER_SECTION_END + log_size, MiB);
s->bat_offset = rt_bat->file_offset;
rt_metadata->guid = metadata_guid;
rt_metadata->file_offset = ROUND_UP(rt_bat->file_offset + rt_bat->length,
MiB);
rt_metadata->length = 1 * MiB; /* min size, and more than enough */
*metadata_offset = rt_metadata->file_offset;
bat_file_offset = rt_bat->file_offset;
bat_length = rt_bat->length;
vhdx_region_header_le_export(region_table);
vhdx_region_entry_le_export(rt_bat);
vhdx_region_entry_le_export(rt_metadata);
vhdx_update_checksum(buffer, VHDX_HEADER_BLOCK_SIZE,
offsetof(VHDXRegionTableHeader, checksum));
/* The region table gives us the data we need to create the BAT,
* so do that now */
ret = vhdx_create_bat(bs, s, image_size, type, use_zero_blocks,
bat_file_offset, bat_length);
if (ret < 0) {
goto exit;
}
/* Now write out the region headers to disk */
ret = bdrv_pwrite(bs, VHDX_REGION_TABLE_OFFSET, buffer,
VHDX_HEADER_BLOCK_SIZE);
if (ret < 0) {
goto exit;
}
ret = bdrv_pwrite(bs, VHDX_REGION_TABLE2_OFFSET, buffer,
VHDX_HEADER_BLOCK_SIZE);
if (ret < 0) {
goto exit;
}
exit:
g_free(s);
g_free(buffer);
return ret;
}
| 10,893 |
qemu | 8417f904bad50021b432dfea12613345d9fb1f68 | 0 | void s390_cpu_do_interrupt(CPUState *cs)
{
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
qemu_log_mask(CPU_LOG_INT, "%s: %d at pc=%" PRIx64 "\n",
__func__, cs->exception_index, env->psw.addr);
s390_cpu_set_state(CPU_STATE_OPERATING, cpu);
/* handle machine checks */
if ((env->psw.mask & PSW_MASK_MCHECK) &&
(cs->exception_index == -1)) {
if (env->pending_int & INTERRUPT_MCHK) {
cs->exception_index = EXCP_MCHK;
}
}
/* handle external interrupts */
if ((env->psw.mask & PSW_MASK_EXT) &&
cs->exception_index == -1 &&
(env->pending_int & INTERRUPT_EXT)) {
cs->exception_index = EXCP_EXT;
}
/* handle I/O interrupts */
if ((env->psw.mask & PSW_MASK_IO) &&
(cs->exception_index == -1)) {
if (env->pending_int & INTERRUPT_IO) {
cs->exception_index = EXCP_IO;
}
}
switch (cs->exception_index) {
case EXCP_PGM:
do_program_interrupt(env);
break;
case EXCP_SVC:
do_svc_interrupt(env);
break;
case EXCP_EXT:
do_ext_interrupt(env);
break;
case EXCP_IO:
do_io_interrupt(env);
break;
case EXCP_MCHK:
do_mchk_interrupt(env);
break;
}
cs->exception_index = -1;
if (!env->pending_int) {
cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
}
}
| 10,894 |
qemu | db0a762e4be965b8976abe9df82c6d47c57336fc | 0 | static int handle_primary_tcp_pkt(NetFilterState *nf,
Connection *conn,
Packet *pkt)
{
struct tcphdr *tcp_pkt;
tcp_pkt = (struct tcphdr *)pkt->transport_header;
if (trace_event_get_state(TRACE_COLO_FILTER_REWRITER_DEBUG)) {
trace_colo_filter_rewriter_pkt_info(__func__,
inet_ntoa(pkt->ip->ip_src), inet_ntoa(pkt->ip->ip_dst),
ntohl(tcp_pkt->th_seq), ntohl(tcp_pkt->th_ack),
tcp_pkt->th_flags);
trace_colo_filter_rewriter_conn_offset(conn->offset);
}
if (((tcp_pkt->th_flags & (TH_ACK | TH_SYN)) == TH_SYN)) {
/*
* we use this flag update offset func
* run once in independent tcp connection
*/
conn->syn_flag = 1;
}
if (((tcp_pkt->th_flags & (TH_ACK | TH_SYN)) == TH_ACK)) {
if (conn->syn_flag) {
/*
* offset = secondary_seq - primary seq
* ack packet sent by guest from primary node,
* so we use th_ack - 1 get primary_seq
*/
conn->offset -= (ntohl(tcp_pkt->th_ack) - 1);
conn->syn_flag = 0;
}
/* handle packets to the secondary from the primary */
tcp_pkt->th_ack = htonl(ntohl(tcp_pkt->th_ack) + conn->offset);
net_checksum_calculate((uint8_t *)pkt->data, pkt->size);
}
return 0;
}
| 10,895 |
qemu | 4534ff5426afeeae5238ba10a696cafa9a0168ee | 0 | static int bdrv_qed_check(BlockDriverState *bs, BdrvCheckResult *result)
{
BDRVQEDState *s = bs->opaque;
return qed_check(s, result, false);
}
| 10,896 |
qemu | a0efbf16604770b9d805bcf210ec29942321134f | 0 | static void q35_host_initfn(Object *obj)
{
Q35PCIHost *s = Q35_HOST_DEVICE(obj);
PCIHostState *phb = PCI_HOST_BRIDGE(obj);
memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb,
"pci-conf-idx", 4);
memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb,
"pci-conf-data", 4);
object_initialize(&s->mch, sizeof(s->mch), TYPE_MCH_PCI_DEVICE);
object_property_add_child(OBJECT(s), "mch", OBJECT(&s->mch), NULL);
qdev_prop_set_uint32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "int",
q35_host_get_pci_hole_start,
NULL, NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_END, "int",
q35_host_get_pci_hole_end,
NULL, NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_START, "int",
q35_host_get_pci_hole64_start,
NULL, NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_END, "int",
q35_host_get_pci_hole64_end,
NULL, NULL, NULL, NULL);
object_property_add(obj, PCIE_HOST_MCFG_SIZE, "int",
q35_host_get_mmcfg_size,
NULL, NULL, NULL, NULL);
object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.ram_memory,
qdev_prop_allow_set_link_before_realize, 0, NULL);
object_property_add_link(obj, MCH_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.pci_address_space,
qdev_prop_allow_set_link_before_realize, 0, NULL);
object_property_add_link(obj, MCH_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.system_memory,
qdev_prop_allow_set_link_before_realize, 0, NULL);
object_property_add_link(obj, MCH_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.address_space_io,
qdev_prop_allow_set_link_before_realize, 0, NULL);
/* Leave enough space for the biggest MCFG BAR */
/* TODO: this matches current bios behaviour, but
* it's not a power of two, which means an MTRR
* can't cover it exactly.
*/
s->mch.pci_hole.begin = MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT +
MCH_HOST_BRIDGE_PCIEXBAR_MAX;
s->mch.pci_hole.end = IO_APIC_DEFAULT_ADDRESS;
}
| 10,898 |
qemu | fd56e0612b6454a282fa6a953fdb09281a98c589 | 0 | static PXBDev *convert_to_pxb(PCIDevice *dev)
{
return pci_bus_is_express(dev->bus) ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
}
| 10,900 |
qemu | ee640c625e190a0c0e6b8966adc0e4720fb75200 | 1 | static void ivshmem_common_realize(PCIDevice *dev, Error **errp)
{
IVShmemState *s = IVSHMEM_COMMON(dev);
Error *err = NULL;
uint8_t *pci_conf;
uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_PREFETCH;
Error *local_err = NULL;
/* IRQFD requires MSI */
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
!ivshmem_has_feature(s, IVSHMEM_MSI)) {
error_setg(errp, "ioeventfd/irqfd requires MSI");
return;
}
pci_conf = dev->config;
pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
"ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
/* region for registers*/
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
&s->ivshmem_mmio);
if (s->not_legacy_32bit) {
attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
}
if (s->hostmem != NULL) {
IVSHMEM_DPRINTF("using hostmem\n");
s->ivshmem_bar2 = host_memory_backend_get_memory(s->hostmem,
&error_abort);
} else {
Chardev *chr = qemu_chr_fe_get_driver(&s->server_chr);
assert(chr);
IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
chr->filename);
/* we allocate enough space for 16 peers and grow as needed */
resize_peers(s, 16);
/*
* Receive setup messages from server synchronously.
* Older versions did it asynchronously, but that creates a
* number of entertaining race conditions.
*/
ivshmem_recv_setup(s, &err);
if (err) {
error_propagate(errp, err);
return;
}
if (s->master == ON_OFF_AUTO_ON && s->vm_id != 0) {
error_setg(errp,
"master must connect to the server before any peers");
return;
}
qemu_chr_fe_set_handlers(&s->server_chr, ivshmem_can_receive,
ivshmem_read, NULL, s, NULL, true);
if (ivshmem_setup_interrupts(s) < 0) {
error_setg(errp, "failed to initialize interrupts");
return;
}
}
if (s->master == ON_OFF_AUTO_AUTO) {
s->master = s->vm_id == 0 ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
}
if (!ivshmem_is_master(s)) {
error_setg(&s->migration_blocker,
"Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
migrate_add_blocker(s->migration_blocker, &local_err);
if (local_err) {
error_propagate(errp, local_err);
error_free(s->migration_blocker);
return;
}
}
vmstate_register_ram(s->ivshmem_bar2, DEVICE(s));
pci_register_bar(PCI_DEVICE(s), 2, attr, s->ivshmem_bar2);
}
| 10,901 |
FFmpeg | e55e8b2c362a60bad66929d83d8c83b0d7f5ffc9 | 1 | int attribute_align_arg avcodec_decode_audio4(AVCodecContext *avctx,
AVFrame *frame,
int *got_frame_ptr,
AVPacket *avpkt)
{
AVCodecInternal *avci = avctx->internal;
int planar, channels;
int ret = 0;
*got_frame_ptr = 0;
avctx->pkt = avpkt;
if (!avpkt->data && avpkt->size) {
av_log(avctx, AV_LOG_ERROR, "invalid packet: NULL data, size != 0\n");
return AVERROR(EINVAL);
}
apply_param_change(avctx, avpkt);
avcodec_get_frame_defaults(frame);
if (!avctx->refcounted_frames)
av_frame_unref(&avci->to_free);
if ((avctx->codec->capabilities & CODEC_CAP_DELAY) || avpkt->size) {
ret = avctx->codec->decode(avctx, frame, got_frame_ptr, avpkt);
if (ret >= 0 && *got_frame_ptr) {
avctx->frame_number++;
frame->pkt_dts = avpkt->dts;
if (frame->format == AV_SAMPLE_FMT_NONE)
frame->format = avctx->sample_fmt;
if (!avctx->refcounted_frames) {
avci->to_free = *frame;
avci->to_free.extended_data = avci->to_free.data;
memset(frame->buf, 0, sizeof(frame->buf));
frame->extended_buf = NULL;
frame->nb_extended_buf = 0;
}
}
if (ret < 0 && frame->data[0])
av_frame_unref(frame);
}
/* many decoders assign whole AVFrames, thus overwriting extended_data;
* make sure it's set correctly; assume decoders that actually use
* extended_data are doing it correctly */
planar = av_sample_fmt_is_planar(frame->format);
channels = av_get_channel_layout_nb_channels(frame->channel_layout);
if (!(planar && channels > AV_NUM_DATA_POINTERS))
frame->extended_data = frame->data;
return ret;
}
| 10,902 |
FFmpeg | 50be207759aa7a69a27de585f7d870ec41eba036 | 1 | static void extrapolate_isf(float isf[LP_ORDER_16k])
{
float diff_isf[LP_ORDER - 2], diff_mean;
float *diff_hi = diff_isf - LP_ORDER + 1; // diff array for extrapolated indexes
float corr_lag[3];
float est, scale;
int i, i_max_corr;
isf[LP_ORDER_16k - 1] = isf[LP_ORDER - 1];
/* Calculate the difference vector */
for (i = 0; i < LP_ORDER - 2; i++)
diff_isf[i] = isf[i + 1] - isf[i];
diff_mean = 0.0;
for (i = 2; i < LP_ORDER - 2; i++)
diff_mean += diff_isf[i] * (1.0f / (LP_ORDER - 4));
/* Find which is the maximum autocorrelation */
i_max_corr = 0;
for (i = 0; i < 3; i++) {
corr_lag[i] = auto_correlation(diff_isf, diff_mean, i + 2);
if (corr_lag[i] > corr_lag[i_max_corr])
i_max_corr = i;
}
i_max_corr++;
for (i = LP_ORDER - 1; i < LP_ORDER_16k - 1; i++)
isf[i] = isf[i - 1] + isf[i - 1 - i_max_corr]
- isf[i - 2 - i_max_corr];
/* Calculate an estimate for ISF(18) and scale ISF based on the error */
est = 7965 + (isf[2] - isf[3] - isf[4]) / 6.0;
scale = 0.5 * (FFMIN(est, 7600) - isf[LP_ORDER - 2]) /
(isf[LP_ORDER_16k - 2] - isf[LP_ORDER - 2]);
for (i = LP_ORDER - 1; i < LP_ORDER_16k - 1; i++)
diff_hi[i] = scale * (isf[i] - isf[i - 1]);
/* Stability insurance */
for (i = LP_ORDER; i < LP_ORDER_16k - 1; i++)
if (diff_hi[i] + diff_hi[i - 1] < 5.0) {
if (diff_hi[i] > diff_hi[i - 1]) {
diff_hi[i - 1] = 5.0 - diff_hi[i];
} else
diff_hi[i] = 5.0 - diff_hi[i - 1];
}
for (i = LP_ORDER - 1; i < LP_ORDER_16k - 1; i++)
isf[i] = isf[i - 1] + diff_hi[i] * (1.0f / (1 << 15));
/* Scale the ISF vector for 16000 Hz */
for (i = 0; i < LP_ORDER_16k - 1; i++)
isf[i] *= 0.8;
}
| 10,903 |
qemu | 7f0278435df1fa845b3bd9556942f89296d4246b | 1 | QString *qobject_to_qstring(const QObject *obj)
{
if (qobject_type(obj) != QTYPE_QSTRING)
return NULL;
return container_of(obj, QString, base);
}
| 10,904 |
qemu | 9b2fadda3e0196ffd485adde4fe9cdd6fae35300 | 1 | static void gen_mfmsr(DisasContext *ctx)
{
#if defined(CONFIG_USER_ONLY)
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
#else
if (unlikely(ctx->pr)) {
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
return;
}
tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_msr);
#endif
}
| 10,905 |
qemu | 79b78a6bd47722ce23bc74287cd6322756698f09 | 1 | static void spapr_add_lmbs(DeviceState *dev, uint64_t addr, uint64_t size,
uint32_t node, Error **errp)
{
sPAPRDRConnector *drc;
sPAPRDRConnectorClass *drck;
uint32_t nr_lmbs = size/SPAPR_MEMORY_BLOCK_SIZE;
int i, fdt_offset, fdt_size;
void *fdt;
for (i = 0; i < nr_lmbs; i++) {
drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
addr/SPAPR_MEMORY_BLOCK_SIZE);
g_assert(drc);
fdt = create_device_tree(&fdt_size);
fdt_offset = spapr_populate_memory_node(fdt, node, addr,
SPAPR_MEMORY_BLOCK_SIZE);
drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, errp);
addr += SPAPR_MEMORY_BLOCK_SIZE;
}
/* send hotplug notification to the
* guest only in case of hotplugged memory
*/
if (dev->hotplugged) {
spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB, nr_lmbs);
}
}
| 10,906 |
qemu | b5eff355460643d09e533024360fe0522f368c07 | 1 | static int bdrv_wr_badreq_bytes(BlockDriverState *bs,
int64_t offset, int count)
{
int64_t size = bs->total_sectors << SECTOR_BITS;
if (count < 0 ||
offset < 0)
return 1;
if (offset > size - count) {
if (bs->autogrow)
bs->total_sectors = (offset + count + SECTOR_SIZE - 1) >> SECTOR_BITS;
else
return 1;
}
return 0;
}
| 10,907 |
qemu | e49c63d5b3234da0debf53cab7ee67de3a4a6a80 | 1 | static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
Error **errp)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
MachineClass *mc = MACHINE_GET_CLASS(spapr);
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
CPUCore *cc = CPU_CORE(dev);
CPUState *cs = CPU(core->threads);
sPAPRDRConnector *drc;
Error *local_err = NULL;
void *fdt = NULL;
int fdt_offset = 0;
int smt = kvmppc_smt_threads();
CPUArchId *core_slot;
int index;
bool hotplugged = spapr_drc_hotplugged(dev);
core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
if (!core_slot) {
error_setg(errp, "Unable to find CPU core with core-id: %d",
cc->core_id);
return;
}
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, index * smt);
g_assert(drc || !mc->has_hotpluggable_cpus);
fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
if (drc) {
spapr_drc_attach(drc, dev, fdt, fdt_offset, &local_err);
if (local_err) {
g_free(fdt);
error_propagate(errp, local_err);
return;
}
if (hotplugged) {
/*
* Send hotplug notification interrupt to the guest only
* in case of hotplugged CPUs.
*/
spapr_hotplug_req_add_by_index(drc);
} else {
spapr_drc_reset(drc);
}
}
core_slot->cpu = OBJECT(dev);
if (smc->pre_2_10_has_unused_icps) {
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc));
const char *typename = object_class_get_name(scc->cpu_class);
size_t size = object_type_get_instance_size(typename);
int i;
for (i = 0; i < cc->nr_threads; i++) {
sPAPRCPUCore *sc = SPAPR_CPU_CORE(dev);
void *obj = sc->threads + i * size;
cs = CPU(obj);
pre_2_10_vmstate_unregister_dummy_icp(cs->cpu_index);
}
}
}
| 10,908 |
FFmpeg | a34dfc93efe380dd9c2b147e227caa14b063d32f | 0 | static void do_video_out(AVFormatContext *s,
OutputStream *ost,
AVFrame *next_picture,
double sync_ipts)
{
int ret, format_video_sync;
AVPacket pkt;
AVCodecContext *enc = ost->enc_ctx;
AVCodecContext *mux_enc = ost->st->codec;
int nb_frames, nb0_frames, i;
double delta, delta0;
double duration = 0;
int frame_size = 0;
InputStream *ist = NULL;
AVFilterContext *filter = ost->filter->filter;
if (ost->source_index >= 0)
ist = input_streams[ost->source_index];
if (filter->inputs[0]->frame_rate.num > 0 &&
filter->inputs[0]->frame_rate.den > 0)
duration = 1/(av_q2d(filter->inputs[0]->frame_rate) * av_q2d(enc->time_base));
if(ist && ist->st->start_time != AV_NOPTS_VALUE && ist->st->first_dts != AV_NOPTS_VALUE && ost->frame_rate.num)
duration = FFMIN(duration, 1/(av_q2d(ost->frame_rate) * av_q2d(enc->time_base)));
if (!ost->filters_script &&
!ost->filters &&
next_picture &&
ist &&
lrintf(av_frame_get_pkt_duration(next_picture) * av_q2d(ist->st->time_base) / av_q2d(enc->time_base)) > 0) {
duration = lrintf(av_frame_get_pkt_duration(next_picture) * av_q2d(ist->st->time_base) / av_q2d(enc->time_base));
}
if (!next_picture) {
//end, flushing
nb0_frames = nb_frames = mid_pred(ost->last_nb0_frames[0],
ost->last_nb0_frames[1],
ost->last_nb0_frames[2]);
} else {
delta0 = sync_ipts - ost->sync_opts;
delta = delta0 + duration;
/* by default, we output a single frame */
nb0_frames = 0;
nb_frames = 1;
format_video_sync = video_sync_method;
if (format_video_sync == VSYNC_AUTO) {
if(!strcmp(s->oformat->name, "avi")) {
format_video_sync = VSYNC_VFR;
} else
format_video_sync = (s->oformat->flags & AVFMT_VARIABLE_FPS) ? ((s->oformat->flags & AVFMT_NOTIMESTAMPS) ? VSYNC_PASSTHROUGH : VSYNC_VFR) : VSYNC_CFR;
if ( ist
&& format_video_sync == VSYNC_CFR
&& input_files[ist->file_index]->ctx->nb_streams == 1
&& input_files[ist->file_index]->input_ts_offset == 0) {
format_video_sync = VSYNC_VSCFR;
}
if (format_video_sync == VSYNC_CFR && copy_ts) {
format_video_sync = VSYNC_VSCFR;
}
}
if (delta0 < 0 &&
delta > 0 &&
format_video_sync != VSYNC_PASSTHROUGH &&
format_video_sync != VSYNC_DROP) {
double cor = FFMIN(-delta0, duration);
if (delta0 < -0.6) {
av_log(NULL, AV_LOG_WARNING, "Past duration %f too large\n", -delta0);
} else
av_log(NULL, AV_LOG_DEBUG, "Cliping frame in rate conversion by %f\n", -delta0);
sync_ipts += cor;
duration -= cor;
delta0 += cor;
}
switch (format_video_sync) {
case VSYNC_VSCFR:
if (ost->frame_number == 0 && delta - duration >= 0.5) {
av_log(NULL, AV_LOG_DEBUG, "Not duplicating %d initial frames\n", (int)lrintf(delta - duration));
delta = duration;
delta0 = 0;
ost->sync_opts = lrint(sync_ipts);
}
case VSYNC_CFR:
// FIXME set to 0.5 after we fix some dts/pts bugs like in avidec.c
if (frame_drop_threshold && delta < frame_drop_threshold && ost->frame_number) {
nb_frames = 0;
} else if (delta < -1.1)
nb_frames = 0;
else if (delta > 1.1) {
nb_frames = lrintf(delta);
if (delta0 > 1.1)
nb0_frames = lrintf(delta0 - 0.6);
}
break;
case VSYNC_VFR:
if (delta <= -0.6)
nb_frames = 0;
else if (delta > 0.6)
ost->sync_opts = lrint(sync_ipts);
break;
case VSYNC_DROP:
case VSYNC_PASSTHROUGH:
ost->sync_opts = lrint(sync_ipts);
break;
default:
av_assert0(0);
}
}
nb_frames = FFMIN(nb_frames, ost->max_frames - ost->frame_number);
nb0_frames = FFMIN(nb0_frames, nb_frames);
memmove(ost->last_nb0_frames + 1,
ost->last_nb0_frames,
sizeof(ost->last_nb0_frames[0]) * (FF_ARRAY_ELEMS(ost->last_nb0_frames) - 1));
ost->last_nb0_frames[0] = nb0_frames;
if (nb0_frames == 0 && ost->last_droped) {
nb_frames_drop++;
av_log(NULL, AV_LOG_VERBOSE,
"*** dropping frame %d from stream %d at ts %"PRId64"\n",
ost->frame_number, ost->st->index, ost->last_frame->pts);
}
if (nb_frames > (nb0_frames && ost->last_droped) + (nb_frames > nb0_frames)) {
if (nb_frames > dts_error_threshold * 30) {
av_log(NULL, AV_LOG_ERROR, "%d frame duplication too large, skipping\n", nb_frames - 1);
nb_frames_drop++;
return;
}
nb_frames_dup += nb_frames - (nb0_frames && ost->last_droped) - (nb_frames > nb0_frames);
av_log(NULL, AV_LOG_VERBOSE, "*** %d dup!\n", nb_frames - 1);
}
ost->last_droped = nb_frames == nb0_frames && next_picture;
/* duplicates frame if needed */
for (i = 0; i < nb_frames; i++) {
AVFrame *in_picture;
av_init_packet(&pkt);
pkt.data = NULL;
pkt.size = 0;
if (i < nb0_frames && ost->last_frame) {
in_picture = ost->last_frame;
} else
in_picture = next_picture;
if (!in_picture)
return;
in_picture->pts = ost->sync_opts;
#if 1
if (!check_recording_time(ost))
#else
if (ost->frame_number >= ost->max_frames)
#endif
return;
if (s->oformat->flags & AVFMT_RAWPICTURE &&
enc->codec->id == AV_CODEC_ID_RAWVIDEO) {
/* raw pictures are written as AVPicture structure to
avoid any copies. We support temporarily the older
method. */
if (in_picture->interlaced_frame)
mux_enc->field_order = in_picture->top_field_first ? AV_FIELD_TB:AV_FIELD_BT;
else
mux_enc->field_order = AV_FIELD_PROGRESSIVE;
pkt.data = (uint8_t *)in_picture;
pkt.size = sizeof(AVPicture);
pkt.pts = av_rescale_q(in_picture->pts, enc->time_base, ost->st->time_base);
pkt.flags |= AV_PKT_FLAG_KEY;
write_frame(s, &pkt, ost);
} else {
int got_packet, forced_keyframe = 0;
double pts_time;
if (enc->flags & (AV_CODEC_FLAG_INTERLACED_DCT | AV_CODEC_FLAG_INTERLACED_ME) &&
ost->top_field_first >= 0)
in_picture->top_field_first = !!ost->top_field_first;
if (in_picture->interlaced_frame) {
if (enc->codec->id == AV_CODEC_ID_MJPEG)
mux_enc->field_order = in_picture->top_field_first ? AV_FIELD_TT:AV_FIELD_BB;
else
mux_enc->field_order = in_picture->top_field_first ? AV_FIELD_TB:AV_FIELD_BT;
} else
mux_enc->field_order = AV_FIELD_PROGRESSIVE;
in_picture->quality = enc->global_quality;
in_picture->pict_type = 0;
pts_time = in_picture->pts != AV_NOPTS_VALUE ?
in_picture->pts * av_q2d(enc->time_base) : NAN;
if (ost->forced_kf_index < ost->forced_kf_count &&
in_picture->pts >= ost->forced_kf_pts[ost->forced_kf_index]) {
ost->forced_kf_index++;
forced_keyframe = 1;
} else if (ost->forced_keyframes_pexpr) {
double res;
ost->forced_keyframes_expr_const_values[FKF_T] = pts_time;
res = av_expr_eval(ost->forced_keyframes_pexpr,
ost->forced_keyframes_expr_const_values, NULL);
ff_dlog(NULL, "force_key_frame: n:%f n_forced:%f prev_forced_n:%f t:%f prev_forced_t:%f -> res:%f\n",
ost->forced_keyframes_expr_const_values[FKF_N],
ost->forced_keyframes_expr_const_values[FKF_N_FORCED],
ost->forced_keyframes_expr_const_values[FKF_PREV_FORCED_N],
ost->forced_keyframes_expr_const_values[FKF_T],
ost->forced_keyframes_expr_const_values[FKF_PREV_FORCED_T],
res);
if (res) {
forced_keyframe = 1;
ost->forced_keyframes_expr_const_values[FKF_PREV_FORCED_N] =
ost->forced_keyframes_expr_const_values[FKF_N];
ost->forced_keyframes_expr_const_values[FKF_PREV_FORCED_T] =
ost->forced_keyframes_expr_const_values[FKF_T];
ost->forced_keyframes_expr_const_values[FKF_N_FORCED] += 1;
}
ost->forced_keyframes_expr_const_values[FKF_N] += 1;
} else if ( ost->forced_keyframes
&& !strncmp(ost->forced_keyframes, "source", 6)
&& in_picture->key_frame==1) {
forced_keyframe = 1;
}
if (forced_keyframe) {
in_picture->pict_type = AV_PICTURE_TYPE_I;
av_log(NULL, AV_LOG_DEBUG, "Forced keyframe at time %f\n", pts_time);
}
update_benchmark(NULL);
if (debug_ts) {
av_log(NULL, AV_LOG_INFO, "encoder <- type:video "
"frame_pts:%s frame_pts_time:%s time_base:%d/%d\n",
av_ts2str(in_picture->pts), av_ts2timestr(in_picture->pts, &enc->time_base),
enc->time_base.num, enc->time_base.den);
}
ost->frames_encoded++;
ret = avcodec_encode_video2(enc, &pkt, in_picture, &got_packet);
update_benchmark("encode_video %d.%d", ost->file_index, ost->index);
if (ret < 0) {
av_log(NULL, AV_LOG_FATAL, "Video encoding failed\n");
exit_program(1);
}
if (got_packet) {
if (debug_ts) {
av_log(NULL, AV_LOG_INFO, "encoder -> type:video "
"pkt_pts:%s pkt_pts_time:%s pkt_dts:%s pkt_dts_time:%s\n",
av_ts2str(pkt.pts), av_ts2timestr(pkt.pts, &enc->time_base),
av_ts2str(pkt.dts), av_ts2timestr(pkt.dts, &enc->time_base));
}
if (pkt.pts == AV_NOPTS_VALUE && !(enc->codec->capabilities & AV_CODEC_CAP_DELAY))
pkt.pts = ost->sync_opts;
av_packet_rescale_ts(&pkt, enc->time_base, ost->st->time_base);
if (debug_ts) {
av_log(NULL, AV_LOG_INFO, "encoder -> type:video "
"pkt_pts:%s pkt_pts_time:%s pkt_dts:%s pkt_dts_time:%s\n",
av_ts2str(pkt.pts), av_ts2timestr(pkt.pts, &ost->st->time_base),
av_ts2str(pkt.dts), av_ts2timestr(pkt.dts, &ost->st->time_base));
}
frame_size = pkt.size;
write_frame(s, &pkt, ost);
/* if two pass, output log */
if (ost->logfile && enc->stats_out) {
fprintf(ost->logfile, "%s", enc->stats_out);
}
}
}
ost->sync_opts++;
/*
* For video, number of frames in == number of packets out.
* But there may be reordering, so we can't throw away frames on encoder
* flush, we need to limit them here, before they go into encoder.
*/
ost->frame_number++;
if (vstats_filename && frame_size)
do_video_stats(ost, frame_size);
}
if (!ost->last_frame)
ost->last_frame = av_frame_alloc();
av_frame_unref(ost->last_frame);
if (next_picture && ost->last_frame)
av_frame_ref(ost->last_frame, next_picture);
else
av_frame_free(&ost->last_frame);
}
| 10,909 |
FFmpeg | 5a3a906ba29b53fa34d3047af78d9f8fd7678256 | 1 | static int vqa_decode_frame(AVCodecContext *avctx,
void *data, int *data_size,
AVPacket *avpkt)
{
const uint8_t *buf = avpkt->data;
int buf_size = avpkt->size;
VqaContext *s = avctx->priv_data;
s->buf = buf;
s->size = buf_size;
if (s->frame.data[0])
avctx->release_buffer(avctx, &s->frame);
if (avctx->get_buffer(avctx, &s->frame)) {
av_log(s->avctx, AV_LOG_ERROR, " VQA Video: get_buffer() failed\n");
return -1;
}
vqa_decode_chunk(s);
/* make the palette available on the way out */
memcpy(s->frame.data[1], s->palette, PALETTE_COUNT * 4);
s->frame.palette_has_changed = 1;
*data_size = sizeof(AVFrame);
*(AVFrame*)data = s->frame;
/* report that the buffer was completely consumed */
return buf_size;
}
| 10,910 |
qemu | 8b33d9eeba91422ee2d73b6936ad57262d18cf5a | 1 | static int check_write_unsafe(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors)
{
/* assume that if the user specifies the format explicitly, then assume
that they will continue to do so and provide no safety net */
if (!bs->probed) {
return 0;
}
if (sector_num == 0 && nb_sectors > 0) {
return check_for_block_signature(bs, buf);
}
return 0;
}
| 10,911 |
FFmpeg | 32be264cea542b4dc721b10092bf1dfe511a28ee | 1 | static void search_for_quantizers_faac(AVCodecContext *avctx, AACEncContext *s,
SingleChannelElement *sce,
const float lambda)
{
int start = 0, i, w, w2, g;
float uplim[128], maxq[128];
int minq, maxsf;
float distfact = ((sce->ics.num_windows > 1) ? 85.80 : 147.84) / lambda;
int last = 0, lastband = 0, curband = 0;
float avg_energy = 0.0;
if (sce->ics.num_windows == 1) {
start = 0;
for (i = 0; i < 1024; i++) {
if (i - start >= sce->ics.swb_sizes[curband]) {
start += sce->ics.swb_sizes[curband];
curband++;
}
if (sce->coeffs[i]) {
avg_energy += sce->coeffs[i] * sce->coeffs[i];
last = i;
lastband = curband;
}
}
} else {
for (w = 0; w < 8; w++) {
const float *coeffs = sce->coeffs + w*128;
curband = start = 0;
for (i = 0; i < 128; i++) {
if (i - start >= sce->ics.swb_sizes[curband]) {
start += sce->ics.swb_sizes[curband];
curband++;
}
if (coeffs[i]) {
avg_energy += coeffs[i] * coeffs[i];
last = FFMAX(last, i);
lastband = FFMAX(lastband, curband);
}
}
}
}
last++;
avg_energy /= last;
if (avg_energy == 0.0f) {
for (i = 0; i < FF_ARRAY_ELEMS(sce->sf_idx); i++)
sce->sf_idx[i] = SCALE_ONE_POS;
return;
}
for (w = 0; w < sce->ics.num_windows; w += sce->ics.group_len[w]) {
start = w*128;
for (g = 0; g < sce->ics.num_swb; g++) {
float *coefs = sce->coeffs + start;
const int size = sce->ics.swb_sizes[g];
int start2 = start, end2 = start + size, peakpos = start;
float maxval = -1, thr = 0.0f, t;
maxq[w*16+g] = 0.0f;
if (g > lastband) {
maxq[w*16+g] = 0.0f;
start += size;
for (w2 = 0; w2 < sce->ics.group_len[w]; w2++)
memset(coefs + w2*128, 0, sizeof(coefs[0])*size);
continue;
}
for (w2 = 0; w2 < sce->ics.group_len[w]; w2++) {
for (i = 0; i < size; i++) {
float t = coefs[w2*128+i]*coefs[w2*128+i];
maxq[w*16+g] = FFMAX(maxq[w*16+g], fabsf(coefs[w2*128 + i]));
thr += t;
if (sce->ics.num_windows == 1 && maxval < t) {
maxval = t;
peakpos = start+i;
}
}
}
if (sce->ics.num_windows == 1) {
start2 = FFMAX(peakpos - 2, start2);
end2 = FFMIN(peakpos + 3, end2);
} else {
start2 -= start;
end2 -= start;
}
start += size;
thr = pow(thr / (avg_energy * (end2 - start2)), 0.3 + 0.1*(lastband - g) / lastband);
t = 1.0 - (1.0 * start2 / last);
uplim[w*16+g] = distfact / (1.4 * thr + t*t*t + 0.075);
}
}
memset(sce->sf_idx, 0, sizeof(sce->sf_idx));
abs_pow34_v(s->scoefs, sce->coeffs, 1024);
for (w = 0; w < sce->ics.num_windows; w += sce->ics.group_len[w]) {
start = w*128;
for (g = 0; g < sce->ics.num_swb; g++) {
const float *coefs = sce->coeffs + start;
const float *scaled = s->scoefs + start;
const int size = sce->ics.swb_sizes[g];
int scf, prev_scf, step;
int min_scf = -1, max_scf = 256;
float curdiff;
if (maxq[w*16+g] < 21.544) {
sce->zeroes[w*16+g] = 1;
start += size;
continue;
}
sce->zeroes[w*16+g] = 0;
scf = prev_scf = av_clip(SCALE_ONE_POS - SCALE_DIV_512 - log2f(1/maxq[w*16+g])*16/3, 60, 218);
for (;;) {
float dist = 0.0f;
int quant_max;
for (w2 = 0; w2 < sce->ics.group_len[w]; w2++) {
int b;
dist += quantize_band_cost(s, coefs + w2*128,
scaled + w2*128,
sce->ics.swb_sizes[g],
scf,
ESC_BT,
lambda,
INFINITY,
&b,
0);
dist -= b;
}
dist *= 1.0f / 512.0f / lambda;
quant_max = quant(maxq[w*16+g], ff_aac_pow2sf_tab[POW_SF2_ZERO - scf + SCALE_ONE_POS - SCALE_DIV_512], ROUND_STANDARD);
if (quant_max >= 8191) { // too much, return to the previous quantizer
sce->sf_idx[w*16+g] = prev_scf;
break;
}
prev_scf = scf;
curdiff = fabsf(dist - uplim[w*16+g]);
if (curdiff <= 1.0f)
step = 0;
else
step = log2f(curdiff);
if (dist > uplim[w*16+g])
step = -step;
scf += step;
scf = av_clip_uint8(scf);
step = scf - prev_scf;
if (FFABS(step) <= 1 || (step > 0 && scf >= max_scf) || (step < 0 && scf <= min_scf)) {
sce->sf_idx[w*16+g] = av_clip(scf, min_scf, max_scf);
break;
}
if (step > 0)
min_scf = prev_scf;
else
max_scf = prev_scf;
}
start += size;
}
}
minq = sce->sf_idx[0] ? sce->sf_idx[0] : INT_MAX;
for (i = 1; i < 128; i++) {
if (!sce->sf_idx[i])
sce->sf_idx[i] = sce->sf_idx[i-1];
else
minq = FFMIN(minq, sce->sf_idx[i]);
}
if (minq == INT_MAX)
minq = 0;
minq = FFMIN(minq, SCALE_MAX_POS);
maxsf = FFMIN(minq + SCALE_MAX_DIFF, SCALE_MAX_POS);
for (i = 126; i >= 0; i--) {
if (!sce->sf_idx[i])
sce->sf_idx[i] = sce->sf_idx[i+1];
sce->sf_idx[i] = av_clip(sce->sf_idx[i], minq, maxsf);
}
}
| 10,913 |
FFmpeg | dcc39ee10e82833ce24aa57926c00ffeb1948198 | 0 | static av_cold int jpg_init(AVCodecContext *avctx, JPGContext *c)
{
int ret;
ret = build_vlc(&c->dc_vlc[0], avpriv_mjpeg_bits_dc_luminance,
avpriv_mjpeg_val_dc, 12, 0);
if (ret)
return ret;
ret = build_vlc(&c->dc_vlc[1], avpriv_mjpeg_bits_dc_chrominance,
avpriv_mjpeg_val_dc, 12, 0);
if (ret)
return ret;
ret = build_vlc(&c->ac_vlc[0], avpriv_mjpeg_bits_ac_luminance,
avpriv_mjpeg_val_ac_luminance, 251, 1);
if (ret)
return ret;
ret = build_vlc(&c->ac_vlc[1], avpriv_mjpeg_bits_ac_chrominance,
avpriv_mjpeg_val_ac_chrominance, 251, 1);
if (ret)
return ret;
ff_blockdsp_init(&c->bdsp, avctx);
ff_idctdsp_init(&c->idsp, avctx);
ff_init_scantable(c->idsp.idct_permutation, &c->scantable,
ff_zigzag_direct);
return 0;
}
| 10,915 |
FFmpeg | a7a85dc4c2e3fa818573ab1adc547758fe95b539 | 0 | static int ffm_read_header(AVFormatContext *s, AVFormatParameters *ap)
{
FFMContext *ffm = s->priv_data;
AVStream *st;
ByteIOContext *pb = s->pb;
AVCodecContext *codec;
int i, nb_streams;
uint32_t tag;
/* header */
tag = get_le32(pb);
if (tag != MKTAG('F', 'F', 'M', '1'))
goto fail;
ffm->packet_size = get_be32(pb);
if (ffm->packet_size != FFM_PACKET_SIZE)
goto fail;
ffm->write_index = get_be64(pb);
/* get also filesize */
if (!url_is_streamed(pb)) {
ffm->file_size = url_fsize(pb);
if (ffm->write_index)
adjust_write_index(s);
} else {
ffm->file_size = (UINT64_C(1) << 63) - 1;
}
nb_streams = get_be32(pb);
get_be32(pb); /* total bitrate */
/* read each stream */
for(i=0;i<nb_streams;i++) {
char rc_eq_buf[128];
st = av_new_stream(s, 0);
if (!st)
goto fail;
av_set_pts_info(st, 64, 1, 1000000);
codec = st->codec;
/* generic info */
codec->codec_id = get_be32(pb);
codec->codec_type = get_byte(pb); /* codec_type */
codec->bit_rate = get_be32(pb);
st->quality = get_be32(pb);
codec->flags = get_be32(pb);
codec->flags2 = get_be32(pb);
codec->debug = get_be32(pb);
/* specific info */
switch(codec->codec_type) {
case CODEC_TYPE_VIDEO:
codec->time_base.num = get_be32(pb);
codec->time_base.den = get_be32(pb);
codec->width = get_be16(pb);
codec->height = get_be16(pb);
codec->gop_size = get_be16(pb);
codec->pix_fmt = get_be32(pb);
codec->qmin = get_byte(pb);
codec->qmax = get_byte(pb);
codec->max_qdiff = get_byte(pb);
codec->qcompress = get_be16(pb) / 10000.0;
codec->qblur = get_be16(pb) / 10000.0;
codec->bit_rate_tolerance = get_be32(pb);
codec->rc_eq = av_strdup(get_strz(pb, rc_eq_buf, sizeof(rc_eq_buf)));
codec->rc_max_rate = get_be32(pb);
codec->rc_min_rate = get_be32(pb);
codec->rc_buffer_size = get_be32(pb);
codec->i_quant_factor = av_int2dbl(get_be64(pb));
codec->b_quant_factor = av_int2dbl(get_be64(pb));
codec->i_quant_offset = av_int2dbl(get_be64(pb));
codec->b_quant_offset = av_int2dbl(get_be64(pb));
codec->dct_algo = get_be32(pb);
codec->strict_std_compliance = get_be32(pb);
codec->max_b_frames = get_be32(pb);
codec->luma_elim_threshold = get_be32(pb);
codec->chroma_elim_threshold = get_be32(pb);
codec->mpeg_quant = get_be32(pb);
codec->intra_dc_precision = get_be32(pb);
codec->me_method = get_be32(pb);
codec->mb_decision = get_be32(pb);
codec->nsse_weight = get_be32(pb);
codec->frame_skip_cmp = get_be32(pb);
codec->rc_buffer_aggressivity = av_int2dbl(get_be64(pb));
codec->codec_tag = get_be32(pb);
codec->thread_count = get_byte(pb);
codec->coder_type = get_be32(pb);
codec->me_cmp = get_be32(pb);
codec->partitions = get_be32(pb);
codec->me_subpel_quality = get_be32(pb);
codec->me_range = get_be32(pb);
codec->keyint_min = get_be32(pb);
codec->scenechange_threshold = get_be32(pb);
codec->b_frame_strategy = get_be32(pb);
codec->qcompress = av_int2dbl(get_be64(pb));
codec->qblur = av_int2dbl(get_be64(pb));
codec->max_qdiff = get_be32(pb);
codec->refs = get_be32(pb);
codec->directpred = get_be32(pb);
break;
case CODEC_TYPE_AUDIO:
codec->sample_rate = get_be32(pb);
codec->channels = get_le16(pb);
codec->frame_size = get_le16(pb);
codec->sample_fmt = get_le16(pb);
break;
default:
goto fail;
}
if (codec->flags & CODEC_FLAG_GLOBAL_HEADER) {
codec->extradata_size = get_be32(pb);
codec->extradata = av_malloc(codec->extradata_size);
if (!codec->extradata)
return AVERROR(ENOMEM);
get_buffer(pb, codec->extradata, codec->extradata_size);
}
}
/* get until end of block reached */
while ((url_ftell(pb) % ffm->packet_size) != 0)
get_byte(pb);
/* init packet demux */
ffm->packet_ptr = ffm->packet;
ffm->packet_end = ffm->packet;
ffm->frame_offset = 0;
ffm->dts = 0;
ffm->read_state = READ_HEADER;
ffm->first_packet = 1;
return 0;
fail:
for(i=0;i<s->nb_streams;i++) {
st = s->streams[i];
if (st) {
av_free(st);
}
}
return -1;
}
| 10,916 |
FFmpeg | 3b199d29cd597a3518136d78860e172060b9e83d | 0 | static av_cold int msvideo1_decode_init(AVCodecContext *avctx)
{
Msvideo1Context *s = avctx->priv_data;
s->avctx = avctx;
/* figure out the colorspace based on the presence of a palette */
if (s->avctx->bits_per_coded_sample == 8) {
s->mode_8bit = 1;
avctx->pix_fmt = AV_PIX_FMT_PAL8;
} else {
s->mode_8bit = 0;
avctx->pix_fmt = AV_PIX_FMT_RGB555;
}
s->frame.data[0] = NULL;
return 0;
}
| 10,917 |
FFmpeg | 2aab7c2dfaca4386c38e5d565cd2bf73096bcc86 | 0 | static void avc_luma_hv_qrt_16w_msa(const uint8_t *src_x, const uint8_t *src_y,
int32_t src_stride, uint8_t *dst,
int32_t dst_stride, int32_t height)
{
uint32_t multiple8_cnt;
for (multiple8_cnt = 2; multiple8_cnt--;) {
avc_luma_hv_qrt_8w_msa(src_x, src_y, src_stride, dst, dst_stride,
height);
src_x += 8;
src_y += 8;
dst += 8;
}
}
| 10,918 |
qemu | 242acf3af4605adce933906bdc053b2414181ec7 | 0 | int udp_output(struct socket *so, struct mbuf *m,
struct sockaddr_in *addr)
{
struct sockaddr_in saddr, daddr;
saddr = *addr;
if ((so->so_faddr.s_addr & htonl(0xffffff00)) == special_addr.s_addr) {
if ((so->so_faddr.s_addr & htonl(0x000000ff)) == htonl(0xff))
saddr.sin_addr.s_addr = alias_addr.s_addr;
else if (addr->sin_addr.s_addr == loopback_addr.s_addr ||
((so->so_faddr.s_addr & htonl(CTL_DNS)) == htonl(CTL_DNS)))
saddr.sin_addr.s_addr = so->so_faddr.s_addr;
}
daddr.sin_addr = so->so_laddr;
daddr.sin_port = so->so_lport;
return udp_output2(so, m, &saddr, &daddr, so->so_iptos);
}
| 10,919 |
qemu | da7d998bbb80f141ed5743418a4dfa5c1409e75f | 0 | void qemu_chr_add_handlers(CharDriverState *s,
IOCanReadHandler *fd_can_read,
IOReadHandler *fd_read,
IOEventHandler *fd_event,
void *opaque)
{
if (!opaque) {
/* chr driver being released. */
++s->avail_connections;
}
s->chr_can_read = fd_can_read;
s->chr_read = fd_read;
s->chr_event = fd_event;
s->handler_opaque = opaque;
if (s->chr_update_read_handler)
s->chr_update_read_handler(s);
/* We're connecting to an already opened device, so let's make sure we
also get the open event */
if (s->opened) {
qemu_chr_generic_open(s);
}
}
| 10,920 |
qemu | f22d85e9e67262db34504f4079745f9843da6a92 | 0 | static void guest_fsfreeze_init(void)
{
guest_fsfreeze_state.status = GUEST_FSFREEZE_STATUS_THAWED;
}
| 10,921 |
qemu | 61007b316cd71ee7333ff7a0a749a8949527575f | 0 | static int bdrv_rw_co(BlockDriverState *bs, int64_t sector_num, uint8_t *buf,
int nb_sectors, bool is_write, BdrvRequestFlags flags)
{
QEMUIOVector qiov;
struct iovec iov = {
.iov_base = (void *)buf,
.iov_len = nb_sectors * BDRV_SECTOR_SIZE,
};
if (nb_sectors < 0 || nb_sectors > BDRV_REQUEST_MAX_SECTORS) {
return -EINVAL;
}
qemu_iovec_init_external(&qiov, &iov, 1);
return bdrv_prwv_co(bs, sector_num << BDRV_SECTOR_BITS,
&qiov, is_write, flags);
}
| 10,922 |
qemu | e3f5ec2b5e92706e3b807059f79b1fb5d936e567 | 0 | static uint32_t stellaris_enet_read(void *opaque, target_phys_addr_t offset)
{
stellaris_enet_state *s = (stellaris_enet_state *)opaque;
uint32_t val;
switch (offset) {
case 0x00: /* RIS */
DPRINTF("IRQ status %02x\n", s->ris);
return s->ris;
case 0x04: /* IM */
return s->im;
case 0x08: /* RCTL */
return s->rctl;
case 0x0c: /* TCTL */
return s->tctl;
case 0x10: /* DATA */
if (s->rx_fifo_len == 0) {
if (s->np == 0) {
BADF("RX underflow\n");
return 0;
}
s->rx_fifo_len = s->rx[s->next_packet].len;
s->rx_fifo = s->rx[s->next_packet].data;
DPRINTF("RX FIFO start packet len=%d\n", s->rx_fifo_len);
}
val = s->rx_fifo[0] | (s->rx_fifo[1] << 8) | (s->rx_fifo[2] << 16)
| (s->rx_fifo[3] << 24);
s->rx_fifo += 4;
s->rx_fifo_len -= 4;
if (s->rx_fifo_len <= 0) {
s->rx_fifo_len = 0;
s->next_packet++;
if (s->next_packet >= 31)
s->next_packet = 0;
s->np--;
DPRINTF("RX done np=%d\n", s->np);
}
return val;
case 0x14: /* IA0 */
return s->macaddr[0] | (s->macaddr[1] << 8)
| (s->macaddr[2] << 16) | (s->macaddr[3] << 24);
case 0x18: /* IA1 */
return s->macaddr[4] | (s->macaddr[5] << 8);
case 0x1c: /* THR */
return s->thr;
case 0x20: /* MCTL */
return s->mctl;
case 0x24: /* MDV */
return s->mdv;
case 0x28: /* MADD */
return 0;
case 0x2c: /* MTXD */
return s->mtxd;
case 0x30: /* MRXD */
return s->mrxd;
case 0x34: /* NP */
return s->np;
case 0x38: /* TR */
return 0;
case 0x3c: /* Undocuented: Timestamp? */
return 0;
default:
hw_error("stellaris_enet_read: Bad offset %x\n", (int)offset);
return 0;
}
}
| 10,923 |
qemu | 41a2b9596c9ed2a827e16e749632752dd2686647 | 0 | static void ide_reset(IDEState *s)
{
if (s->is_cf)
s->mult_sectors = 0;
else
s->mult_sectors = MAX_MULT_SECTORS;
s->cur_drive = s;
s->select = 0xa0;
s->status = READY_STAT;
ide_set_signature(s);
/* init the transfer handler so that 0xffff is returned on data
accesses */
s->end_transfer_func = ide_dummy_transfer_stop;
ide_dummy_transfer_stop(s);
s->media_changed = 0;
}
| 10,924 |
qemu | bcf5d19c59a527c91bc29704f3e4956119c050cf | 0 | int monitor_read_password(Monitor *mon, ReadLineFunc *readline_func,
void *opaque)
{
if (monitor_ctrl_mode(mon)) {
qerror_report(QERR_MISSING_PARAMETER, "password");
return -EINVAL;
} else if (mon->rs) {
readline_start(mon->rs, "Password: ", 1, readline_func, opaque);
/* prompt is printed on return from the command handler */
return 0;
} else {
monitor_printf(mon, "terminal does not support password prompting\n");
return -ENOTTY;
}
}
| 10,925 |
qemu | 13f1c773640171efa8175b1ba6dcd624c1ad68c1 | 0 | static void openrisc_sim_net_init(MemoryRegion *address_space,
hwaddr base,
hwaddr descriptors,
qemu_irq irq, NICInfo *nd)
{
DeviceState *dev;
SysBusDevice *s;
dev = qdev_create(NULL, "open_eth");
qdev_set_nic_properties(dev, nd);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, irq);
memory_region_add_subregion(address_space, base,
sysbus_mmio_get_region(s, 0));
memory_region_add_subregion(address_space, descriptors,
sysbus_mmio_get_region(s, 1));
}
| 10,926 |
qemu | 0e9b9edae7bebfd31fdbead4ccbbce03876a7edd | 0 | build_srat(GArray *table_data, GArray *linker, MachineState *machine)
{
AcpiSystemResourceAffinityTable *srat;
AcpiSratProcessorAffinity *core;
AcpiSratMemoryAffinity *numamem;
int i;
uint64_t curnode;
int srat_start, numa_start, slots;
uint64_t mem_len, mem_base, next_base;
MachineClass *mc = MACHINE_GET_CLASS(machine);
CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
PCMachineState *pcms = PC_MACHINE(machine);
ram_addr_t hotplugabble_address_space_size =
object_property_get_int(OBJECT(pcms), PC_MACHINE_MEMHP_REGION_SIZE,
NULL);
srat_start = table_data->len;
srat = acpi_data_push(table_data, sizeof *srat);
srat->reserved1 = cpu_to_le32(1);
for (i = 0; i < apic_ids->len; i++) {
int apic_id = apic_ids->cpus[i].arch_id;
core = acpi_data_push(table_data, sizeof *core);
core->type = ACPI_SRAT_PROCESSOR_APIC;
core->length = sizeof(*core);
core->local_apic_id = apic_id;
curnode = pcms->node_cpu[apic_id];
core->proximity_lo = curnode;
memset(core->proximity_hi, 0, 3);
core->local_sapic_eid = 0;
core->flags = cpu_to_le32(1);
}
/* the memory map is a bit tricky, it contains at least one hole
* from 640k-1M and possibly another one from 3.5G-4G.
*/
next_base = 0;
numa_start = table_data->len;
numamem = acpi_data_push(table_data, sizeof *numamem);
build_srat_memory(numamem, 0, 640 * 1024, 0, MEM_AFFINITY_ENABLED);
next_base = 1024 * 1024;
for (i = 1; i < pcms->numa_nodes + 1; ++i) {
mem_base = next_base;
mem_len = pcms->node_mem[i - 1];
if (i == 1) {
mem_len -= 1024 * 1024;
}
next_base = mem_base + mem_len;
/* Cut out the ACPI_PCI hole */
if (mem_base <= pcms->below_4g_mem_size &&
next_base > pcms->below_4g_mem_size) {
mem_len -= next_base - pcms->below_4g_mem_size;
if (mem_len > 0) {
numamem = acpi_data_push(table_data, sizeof *numamem);
build_srat_memory(numamem, mem_base, mem_len, i - 1,
MEM_AFFINITY_ENABLED);
}
mem_base = 1ULL << 32;
mem_len = next_base - pcms->below_4g_mem_size;
next_base += (1ULL << 32) - pcms->below_4g_mem_size;
}
numamem = acpi_data_push(table_data, sizeof *numamem);
build_srat_memory(numamem, mem_base, mem_len, i - 1,
MEM_AFFINITY_ENABLED);
}
slots = (table_data->len - numa_start) / sizeof *numamem;
for (; slots < pcms->numa_nodes + 2; slots++) {
numamem = acpi_data_push(table_data, sizeof *numamem);
build_srat_memory(numamem, 0, 0, 0, MEM_AFFINITY_NOFLAGS);
}
/*
* Entry is required for Windows to enable memory hotplug in OS.
* Memory devices may override proximity set by this entry,
* providing _PXM method if necessary.
*/
if (hotplugabble_address_space_size) {
numamem = acpi_data_push(table_data, sizeof *numamem);
build_srat_memory(numamem, pcms->hotplug_memory.base,
hotplugabble_address_space_size, 0,
MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED);
}
build_header(linker, table_data,
(void *)(table_data->data + srat_start),
"SRAT",
table_data->len - srat_start, 1, NULL, NULL);
g_free(apic_ids);
}
| 10,927 |
qemu | a8170e5e97ad17ca169c64ba87ae2f53850dab4c | 0 | static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
{
MaltaFPGAState *s;
s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState));
memory_region_init_io(&s->iomem, &malta_fpga_ops, s,
"malta-fpga", 0x100000);
memory_region_init_alias(&s->iomem_lo, "malta-fpga",
&s->iomem, 0, 0x900);
memory_region_init_alias(&s->iomem_hi, "malta-fpga",
&s->iomem, 0xa00, 0x10000-0xa00);
memory_region_add_subregion(address_space, base, &s->iomem_lo);
memory_region_add_subregion(address_space, base + 0xa00, &s->iomem_hi);
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
s->uart = serial_mm_init(address_space, base + 0x900, 3, uart_irq,
230400, uart_chr, DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
return s;
}
| 10,929 |
qemu | 7dfd8c6aa1d0691d03c5ccc9b0c5a93bcf00f768 | 0 | static void tcg_reg_alloc_start(TCGContext *s)
{
int i;
TCGTemp *ts;
for(i = 0; i < s->nb_globals; i++) {
ts = &s->temps[i];
if (ts->fixed_reg) {
ts->val_type = TEMP_VAL_REG;
} else {
ts->val_type = TEMP_VAL_MEM;
}
}
for(i = s->nb_globals; i < s->nb_temps; i++) {
ts = &s->temps[i];
ts->val_type = TEMP_VAL_DEAD;
ts->mem_allocated = 0;
ts->fixed_reg = 0;
}
for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
s->reg_to_temp[i] = -1;
}
}
| 10,930 |
qemu | 08844473820c93541fc47bdfeae0f2cc88cfab59 | 0 | static int coroutine_fn bdrv_driver_preadv(BlockDriverState *bs,
uint64_t offset, uint64_t bytes,
QEMUIOVector *qiov, int flags)
{
BlockDriver *drv = bs->drv;
int64_t sector_num = offset >> BDRV_SECTOR_BITS;
unsigned int nb_sectors = bytes >> BDRV_SECTOR_BITS;
assert((offset & (BDRV_SECTOR_SIZE - 1)) == 0);
assert((bytes & (BDRV_SECTOR_SIZE - 1)) == 0);
assert((bytes >> BDRV_SECTOR_BITS) <= BDRV_REQUEST_MAX_SECTORS);
return drv->bdrv_co_readv(bs, sector_num, nb_sectors, qiov);
}
| 10,931 |
qemu | 4be746345f13e99e468c60acbd3a355e8183e3ce | 0 | SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockDriverState *bdrv,
int unit, bool removable, int bootindex,
const char *serial, Error **errp)
{
const char *driver;
DeviceState *dev;
Error *err = NULL;
driver = bdrv_is_sg(bdrv) ? "scsi-generic" : "scsi-disk";
dev = qdev_create(&bus->qbus, driver);
qdev_prop_set_uint32(dev, "scsi-id", unit);
if (bootindex >= 0) {
object_property_set_int(OBJECT(dev), bootindex, "bootindex",
&error_abort);
}
if (object_property_find(OBJECT(dev), "removable", NULL)) {
qdev_prop_set_bit(dev, "removable", removable);
}
if (serial && object_property_find(OBJECT(dev), "serial", NULL)) {
qdev_prop_set_string(dev, "serial", serial);
}
if (qdev_prop_set_drive(dev, "drive", bdrv) < 0) {
error_setg(errp, "Setting drive property failed");
object_unparent(OBJECT(dev));
return NULL;
}
object_property_set_bool(OBJECT(dev), true, "realized", &err);
if (err != NULL) {
error_propagate(errp, err);
object_unparent(OBJECT(dev));
return NULL;
}
return SCSI_DEVICE(dev);
}
| 10,933 |
qemu | ffbb1705a33df8e2fb12b24d96663d63b22eaf8b | 0 | static void check_exception(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t token, uint32_t nargs,
target_ulong args,
uint32_t nret, target_ulong rets)
{
uint32_t mask, buf, len, event_len;
uint64_t xinfo;
sPAPREventLogEntry *event;
struct rtas_error_log *hdr;
if ((nargs < 6) || (nargs > 7) || nret != 1) {
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
return;
}
xinfo = rtas_ld(args, 1);
mask = rtas_ld(args, 2);
buf = rtas_ld(args, 4);
len = rtas_ld(args, 5);
if (nargs == 7) {
xinfo |= (uint64_t)rtas_ld(args, 6) << 32;
}
event = rtas_event_log_dequeue(mask, true);
if (!event) {
goto out_no_events;
}
hdr = event->data;
event_len = be32_to_cpu(hdr->extended_length) + sizeof(*hdr);
if (event_len < len) {
len = event_len;
}
cpu_physical_memory_write(buf, event->data, len);
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
g_free(event->data);
g_free(event);
/* according to PAPR+, the IRQ must be left asserted, or re-asserted, if
* there are still pending events to be fetched via check-exception. We
* do the latter here, since our code relies on edge-triggered
* interrupts.
*/
if (rtas_event_log_contains(mask, true)) {
qemu_irq_pulse(xics_get_qirq(spapr->xics, spapr->check_exception_irq));
}
return;
out_no_events:
rtas_st(rets, 0, RTAS_OUT_NO_ERRORS_FOUND);
}
| 10,934 |
qemu | bc7c08a2c375acb7ae4d433054415588b176d34c | 0 | static void test_qemu_strtoull_full_correct(void)
{
const char *str = "18446744073709551614";
uint64_t res = 999;
int err;
err = qemu_strtoull(str, NULL, 0, &res);
g_assert_cmpint(err, ==, 0);
g_assert_cmpint(res, ==, 18446744073709551614LLU);
}
| 10,935 |
qemu | 4e59b545868a5ee5f59b346337f0c44209929334 | 0 | QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque)
{
QEMUBH *bh;
bh = qemu_malloc(sizeof(*bh));
bh->cb = cb;
bh->opaque = opaque;
return bh;
}
| 10,936 |
qemu | a89f364ae8740dfc31b321eed9ee454e996dc3c1 | 0 | static void omap_mcbsp_sink_tick(void *opaque)
{
struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
static const int bps[8] = { 0, 1, 1, 2, 2, 2, -255, -255 };
if (!s->tx_rate)
return;
if (s->tx_req)
printf("%s: Tx FIFO underrun\n", __FUNCTION__);
s->tx_req = s->tx_rate << bps[(s->xcr[0] >> 5) & 7];
omap_mcbsp_tx_newdata(s);
timer_mod(s->sink_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
NANOSECONDS_PER_SECOND);
}
| 10,937 |
FFmpeg | 1acd7d594c15aa491729c837ad3519d3469e620a | 0 | static av_always_inline void hl_decode_mb_idct_luma(H264Context *h, int mb_type,
int is_h264, int simple,
int transform_bypass,
int pixel_shift,
int *block_offset,
int linesize,
uint8_t *dest_y, int p)
{
void (*idct_add)(uint8_t *dst, int16_t *block, int stride);
int i;
block_offset += 16 * p;
if (!IS_INTRA4x4(mb_type)) {
if (is_h264) {
if (IS_INTRA16x16(mb_type)) {
if (transform_bypass) {
if (h->sps.profile_idc == 244 &&
(h->intra16x16_pred_mode == VERT_PRED8x8 ||
h->intra16x16_pred_mode == HOR_PRED8x8)) {
h->hpc.pred16x16_add[h->intra16x16_pred_mode](dest_y, block_offset,
h->mb + (p * 256 << pixel_shift),
linesize);
} else {
for (i = 0; i < 16; i++)
if (h->non_zero_count_cache[scan8[i + p * 16]] ||
dctcoef_get(h->mb, pixel_shift, i * 16 + p * 256))
h->h264dsp.h264_add_pixels4(dest_y + block_offset[i],
h->mb + (i * 16 + p * 256 << pixel_shift),
linesize);
}
} else {
h->h264dsp.h264_idct_add16intra(dest_y, block_offset,
h->mb + (p * 256 << pixel_shift),
linesize,
h->non_zero_count_cache + p * 5 * 8);
}
} else if (h->cbp & 15) {
if (transform_bypass) {
const int di = IS_8x8DCT(mb_type) ? 4 : 1;
idct_add = IS_8x8DCT(mb_type) ? h->h264dsp.h264_add_pixels8
: h->h264dsp.h264_add_pixels4;
for (i = 0; i < 16; i += di)
if (h->non_zero_count_cache[scan8[i + p * 16]])
idct_add(dest_y + block_offset[i],
h->mb + (i * 16 + p * 256 << pixel_shift),
linesize);
} else {
if (IS_8x8DCT(mb_type))
h->h264dsp.h264_idct8_add4(dest_y, block_offset,
h->mb + (p * 256 << pixel_shift),
linesize,
h->non_zero_count_cache + p * 5 * 8);
else
h->h264dsp.h264_idct_add16(dest_y, block_offset,
h->mb + (p * 256 << pixel_shift),
linesize,
h->non_zero_count_cache + p * 5 * 8);
}
}
} else if (CONFIG_SVQ3_DECODER) {
for (i = 0; i < 16; i++)
if (h->non_zero_count_cache[scan8[i + p * 16]] || h->mb[i * 16 + p * 256]) {
// FIXME benchmark weird rule, & below
uint8_t *const ptr = dest_y + block_offset[i];
ff_svq3_add_idct_c(ptr, h->mb + i * 16 + p * 256, linesize,
h->qscale, IS_INTRA(mb_type) ? 1 : 0);
}
}
}
}
| 10,939 |
qemu | a426e122173f36f05ea2cb72dcff77b7408546ce | 0 | int kvm_insert_breakpoint(CPUState *current_env, target_ulong addr,
target_ulong len, int type)
{
struct kvm_sw_breakpoint *bp;
CPUState *env;
int err;
if (type == GDB_BREAKPOINT_SW) {
bp = kvm_find_sw_breakpoint(current_env, addr);
if (bp) {
bp->use_count++;
return 0;
}
bp = qemu_malloc(sizeof(struct kvm_sw_breakpoint));
if (!bp)
return -ENOMEM;
bp->pc = addr;
bp->use_count = 1;
err = kvm_arch_insert_sw_breakpoint(current_env, bp);
if (err) {
free(bp);
return err;
}
QTAILQ_INSERT_HEAD(¤t_env->kvm_state->kvm_sw_breakpoints,
bp, entry);
} else {
err = kvm_arch_insert_hw_breakpoint(addr, len, type);
if (err)
return err;
}
for (env = first_cpu; env != NULL; env = env->next_cpu) {
err = kvm_update_guest_debug(env, 0);
if (err)
return err;
}
return 0;
}
| 10,940 |
qemu | ecf5e8eae8b0b5fa41f00b53d67747b42fd1b8b9 | 0 | static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs)
{
ARMCPU *cpu = s->cpu;
uint32_t val;
switch (offset) {
case 4: /* Interrupt Control Type. */
return ((s->num_irq - NVIC_FIRST_IRQ) / 32) - 1;
case 0xd00: /* CPUID Base. */
return cpu->midr;
case 0xd04: /* Interrupt Control State. */
/* VECTACTIVE */
val = cpu->env.v7m.exception;
/* VECTPENDING */
val |= (s->vectpending & 0xff) << 12;
/* ISRPENDING - set if any external IRQ is pending */
if (nvic_isrpending(s)) {
val |= (1 << 22);
}
/* RETTOBASE - set if only one handler is active */
if (nvic_rettobase(s)) {
val |= (1 << 11);
}
/* PENDSTSET */
if (s->vectors[ARMV7M_EXCP_SYSTICK].pending) {
val |= (1 << 26);
}
/* PENDSVSET */
if (s->vectors[ARMV7M_EXCP_PENDSV].pending) {
val |= (1 << 28);
}
/* NMIPENDSET */
if (s->vectors[ARMV7M_EXCP_NMI].pending) {
val |= (1 << 31);
}
/* ISRPREEMPT not implemented */
return val;
case 0xd08: /* Vector Table Offset. */
return cpu->env.v7m.vecbase[attrs.secure];
case 0xd0c: /* Application Interrupt/Reset Control. */
return 0xfa050000 | (s->prigroup << 8);
case 0xd10: /* System Control. */
/* TODO: Implement SLEEPONEXIT. */
return 0;
case 0xd14: /* Configuration Control. */
return cpu->env.v7m.ccr;
case 0xd24: /* System Handler Status. */
val = 0;
if (s->vectors[ARMV7M_EXCP_MEM].active) {
val |= (1 << 0);
}
if (s->vectors[ARMV7M_EXCP_BUS].active) {
val |= (1 << 1);
}
if (s->vectors[ARMV7M_EXCP_USAGE].active) {
val |= (1 << 3);
}
if (s->vectors[ARMV7M_EXCP_SVC].active) {
val |= (1 << 7);
}
if (s->vectors[ARMV7M_EXCP_DEBUG].active) {
val |= (1 << 8);
}
if (s->vectors[ARMV7M_EXCP_PENDSV].active) {
val |= (1 << 10);
}
if (s->vectors[ARMV7M_EXCP_SYSTICK].active) {
val |= (1 << 11);
}
if (s->vectors[ARMV7M_EXCP_USAGE].pending) {
val |= (1 << 12);
}
if (s->vectors[ARMV7M_EXCP_MEM].pending) {
val |= (1 << 13);
}
if (s->vectors[ARMV7M_EXCP_BUS].pending) {
val |= (1 << 14);
}
if (s->vectors[ARMV7M_EXCP_SVC].pending) {
val |= (1 << 15);
}
if (s->vectors[ARMV7M_EXCP_MEM].enabled) {
val |= (1 << 16);
}
if (s->vectors[ARMV7M_EXCP_BUS].enabled) {
val |= (1 << 17);
}
if (s->vectors[ARMV7M_EXCP_USAGE].enabled) {
val |= (1 << 18);
}
return val;
case 0xd28: /* Configurable Fault Status. */
return cpu->env.v7m.cfsr;
case 0xd2c: /* Hard Fault Status. */
return cpu->env.v7m.hfsr;
case 0xd30: /* Debug Fault Status. */
return cpu->env.v7m.dfsr;
case 0xd34: /* MMFAR MemManage Fault Address */
return cpu->env.v7m.mmfar;
case 0xd38: /* Bus Fault Address. */
return cpu->env.v7m.bfar;
case 0xd3c: /* Aux Fault Status. */
/* TODO: Implement fault status registers. */
qemu_log_mask(LOG_UNIMP,
"Aux Fault status registers unimplemented\n");
return 0;
case 0xd40: /* PFR0. */
return 0x00000030;
case 0xd44: /* PRF1. */
return 0x00000200;
case 0xd48: /* DFR0. */
return 0x00100000;
case 0xd4c: /* AFR0. */
return 0x00000000;
case 0xd50: /* MMFR0. */
return 0x00000030;
case 0xd54: /* MMFR1. */
return 0x00000000;
case 0xd58: /* MMFR2. */
return 0x00000000;
case 0xd5c: /* MMFR3. */
return 0x00000000;
case 0xd60: /* ISAR0. */
return 0x01141110;
case 0xd64: /* ISAR1. */
return 0x02111000;
case 0xd68: /* ISAR2. */
return 0x21112231;
case 0xd6c: /* ISAR3. */
return 0x01111110;
case 0xd70: /* ISAR4. */
return 0x01310102;
/* TODO: Implement debug registers. */
case 0xd90: /* MPU_TYPE */
/* Unified MPU; if the MPU is not present this value is zero */
return cpu->pmsav7_dregion << 8;
break;
case 0xd94: /* MPU_CTRL */
return cpu->env.v7m.mpu_ctrl;
case 0xd98: /* MPU_RNR */
return cpu->env.pmsav7.rnr[attrs.secure];
case 0xd9c: /* MPU_RBAR */
case 0xda4: /* MPU_RBAR_A1 */
case 0xdac: /* MPU_RBAR_A2 */
case 0xdb4: /* MPU_RBAR_A3 */
{
int region = cpu->env.pmsav7.rnr[attrs.secure];
if (arm_feature(&cpu->env, ARM_FEATURE_V8)) {
/* PMSAv8M handling of the aliases is different from v7M:
* aliases A1, A2, A3 override the low two bits of the region
* number in MPU_RNR, and there is no 'region' field in the
* RBAR register.
*/
int aliasno = (offset - 0xd9c) / 8; /* 0..3 */
if (aliasno) {
region = deposit32(region, 0, 2, aliasno);
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return cpu->env.pmsav8.rbar[attrs.secure][region];
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return (cpu->env.pmsav7.drbar[region] & 0x1f) | (region & 0xf);
}
case 0xda0: /* MPU_RASR (v7M), MPU_RLAR (v8M) */
case 0xda8: /* MPU_RASR_A1 (v7M), MPU_RLAR_A1 (v8M) */
case 0xdb0: /* MPU_RASR_A2 (v7M), MPU_RLAR_A2 (v8M) */
case 0xdb8: /* MPU_RASR_A3 (v7M), MPU_RLAR_A3 (v8M) */
{
int region = cpu->env.pmsav7.rnr[attrs.secure];
if (arm_feature(&cpu->env, ARM_FEATURE_V8)) {
/* PMSAv8M handling of the aliases is different from v7M:
* aliases A1, A2, A3 override the low two bits of the region
* number in MPU_RNR.
*/
int aliasno = (offset - 0xda0) / 8; /* 0..3 */
if (aliasno) {
region = deposit32(region, 0, 2, aliasno);
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return cpu->env.pmsav8.rlar[attrs.secure][region];
}
if (region >= cpu->pmsav7_dregion) {
return 0;
}
return ((cpu->env.pmsav7.dracr[region] & 0xffff) << 16) |
(cpu->env.pmsav7.drsr[region] & 0xffff);
}
case 0xdc0: /* MPU_MAIR0 */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
return cpu->env.pmsav8.mair0[attrs.secure];
case 0xdc4: /* MPU_MAIR1 */
if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
goto bad_offset;
}
return cpu->env.pmsav8.mair1[attrs.secure];
default:
bad_offset:
qemu_log_mask(LOG_GUEST_ERROR, "NVIC: Bad read offset 0x%x\n", offset);
return 0;
}
}
| 10,942 |
qemu | d66b969b0d9c8eefdcbff4b48535b0fe1501d139 | 0 | static gboolean vtd_hash_remove_by_page(gpointer key, gpointer value,
gpointer user_data)
{
VTDIOTLBEntry *entry = (VTDIOTLBEntry *)value;
VTDIOTLBPageInvInfo *info = (VTDIOTLBPageInvInfo *)user_data;
uint64_t gfn = info->gfn & info->mask;
return (entry->domain_id == info->domain_id) &&
((entry->gfn & info->mask) == gfn);
}
| 10,943 |
qemu | 85c97ca7a10b93216bc95052e9dabe3a4bb8736a | 0 | int coroutine_fn bdrv_co_pwritev(BdrvChild *child,
int64_t offset, unsigned int bytes, QEMUIOVector *qiov,
BdrvRequestFlags flags)
{
BlockDriverState *bs = child->bs;
BdrvTrackedRequest req;
uint64_t align = bs->bl.request_alignment;
uint8_t *head_buf = NULL;
uint8_t *tail_buf = NULL;
QEMUIOVector local_qiov;
bool use_local_qiov = false;
int ret;
if (!bs->drv) {
return -ENOMEDIUM;
}
if (bs->read_only) {
return -EPERM;
}
assert(!(bs->open_flags & BDRV_O_INACTIVE));
ret = bdrv_check_byte_request(bs, offset, bytes);
if (ret < 0) {
return ret;
}
bdrv_inc_in_flight(bs);
/*
* Align write if necessary by performing a read-modify-write cycle.
* Pad qiov with the read parts and be sure to have a tracked request not
* only for bdrv_aligned_pwritev, but also for the reads of the RMW cycle.
*/
tracked_request_begin(&req, bs, offset, bytes, BDRV_TRACKED_WRITE);
if (!qiov) {
ret = bdrv_co_do_zero_pwritev(bs, offset, bytes, flags, &req);
goto out;
}
if (offset & (align - 1)) {
QEMUIOVector head_qiov;
struct iovec head_iov;
mark_request_serialising(&req, align);
wait_serialising_requests(&req);
head_buf = qemu_blockalign(bs, align);
head_iov = (struct iovec) {
.iov_base = head_buf,
.iov_len = align,
};
qemu_iovec_init_external(&head_qiov, &head_iov, 1);
bdrv_debug_event(bs, BLKDBG_PWRITEV_RMW_HEAD);
ret = bdrv_aligned_preadv(bs, &req, offset & ~(align - 1), align,
align, &head_qiov, 0);
if (ret < 0) {
goto fail;
}
bdrv_debug_event(bs, BLKDBG_PWRITEV_RMW_AFTER_HEAD);
qemu_iovec_init(&local_qiov, qiov->niov + 2);
qemu_iovec_add(&local_qiov, head_buf, offset & (align - 1));
qemu_iovec_concat(&local_qiov, qiov, 0, qiov->size);
use_local_qiov = true;
bytes += offset & (align - 1);
offset = offset & ~(align - 1);
/* We have read the tail already if the request is smaller
* than one aligned block.
*/
if (bytes < align) {
qemu_iovec_add(&local_qiov, head_buf + bytes, align - bytes);
bytes = align;
}
}
if ((offset + bytes) & (align - 1)) {
QEMUIOVector tail_qiov;
struct iovec tail_iov;
size_t tail_bytes;
bool waited;
mark_request_serialising(&req, align);
waited = wait_serialising_requests(&req);
assert(!waited || !use_local_qiov);
tail_buf = qemu_blockalign(bs, align);
tail_iov = (struct iovec) {
.iov_base = tail_buf,
.iov_len = align,
};
qemu_iovec_init_external(&tail_qiov, &tail_iov, 1);
bdrv_debug_event(bs, BLKDBG_PWRITEV_RMW_TAIL);
ret = bdrv_aligned_preadv(bs, &req, (offset + bytes) & ~(align - 1), align,
align, &tail_qiov, 0);
if (ret < 0) {
goto fail;
}
bdrv_debug_event(bs, BLKDBG_PWRITEV_RMW_AFTER_TAIL);
if (!use_local_qiov) {
qemu_iovec_init(&local_qiov, qiov->niov + 1);
qemu_iovec_concat(&local_qiov, qiov, 0, qiov->size);
use_local_qiov = true;
}
tail_bytes = (offset + bytes) & (align - 1);
qemu_iovec_add(&local_qiov, tail_buf + tail_bytes, align - tail_bytes);
bytes = ROUND_UP(bytes, align);
}
ret = bdrv_aligned_pwritev(bs, &req, offset, bytes, align,
use_local_qiov ? &local_qiov : qiov,
flags);
fail:
if (use_local_qiov) {
qemu_iovec_destroy(&local_qiov);
}
qemu_vfree(head_buf);
qemu_vfree(tail_buf);
out:
tracked_request_end(&req);
bdrv_dec_in_flight(bs);
return ret;
}
| 10,944 |
qemu | a426e122173f36f05ea2cb72dcff77b7408546ce | 0 | int kvm_init_vcpu(CPUState *env)
{
KVMState *s = kvm_state;
long mmap_size;
int ret;
DPRINTF("kvm_init_vcpu\n");
ret = kvm_vm_ioctl(s, KVM_CREATE_VCPU, env->cpu_index);
if (ret < 0) {
DPRINTF("kvm_create_vcpu failed\n");
goto err;
}
env->kvm_fd = ret;
env->kvm_state = s;
mmap_size = kvm_ioctl(s, KVM_GET_VCPU_MMAP_SIZE, 0);
if (mmap_size < 0) {
DPRINTF("KVM_GET_VCPU_MMAP_SIZE failed\n");
goto err;
}
env->kvm_run = mmap(NULL, mmap_size, PROT_READ | PROT_WRITE, MAP_SHARED,
env->kvm_fd, 0);
if (env->kvm_run == MAP_FAILED) {
ret = -errno;
DPRINTF("mmap'ing vcpu state failed\n");
goto err;
}
#ifdef KVM_CAP_COALESCED_MMIO
if (s->coalesced_mmio && !s->coalesced_mmio_ring)
s->coalesced_mmio_ring = (void *) env->kvm_run +
s->coalesced_mmio * PAGE_SIZE;
#endif
ret = kvm_arch_init_vcpu(env);
if (ret == 0) {
qemu_register_reset(kvm_reset_vcpu, env);
kvm_arch_reset_vcpu(env);
}
err:
return ret;
}
| 10,945 |
qemu | 61007b316cd71ee7333ff7a0a749a8949527575f | 0 | void bdrv_disable_copy_on_read(BlockDriverState *bs)
{
assert(bs->copy_on_read > 0);
bs->copy_on_read--;
}
| 10,946 |
qemu | 5b08fc106d3146ddc1447d82d4770fc402fc363b | 0 | void sdl_display_init(DisplayState *ds, int full_screen, int no_frame)
{
int flags;
uint8_t data = 0;
#if defined(__APPLE__)
/* always use generic keymaps */
if (!keyboard_layout)
keyboard_layout = "en-us";
#endif
if(keyboard_layout) {
kbd_layout = init_keyboard_layout(keyboard_layout);
if (!kbd_layout)
exit(1);
}
if (no_frame)
gui_noframe = 1;
flags = SDL_INIT_VIDEO | SDL_INIT_NOPARACHUTE;
if (SDL_Init (flags)) {
fprintf(stderr, "Could not initialize SDL - exiting\n");
exit(1);
}
#ifndef _WIN32
/* NOTE: we still want Ctrl-C to work, so we undo the SDL redirections */
signal(SIGINT, SIG_DFL);
signal(SIGQUIT, SIG_DFL);
#endif
ds->dpy_update = sdl_update;
ds->dpy_resize = sdl_resize;
ds->dpy_refresh = sdl_refresh;
ds->dpy_fill = sdl_fill;
ds->mouse_set = sdl_mouse_warp;
ds->cursor_define = sdl_mouse_define;
sdl_resize(ds, 640, 400);
sdl_update_caption();
SDL_EnableKeyRepeat(250, 50);
gui_grab = 0;
sdl_cursor_hidden = SDL_CreateCursor(&data, &data, 8, 1, 0, 0);
sdl_cursor_normal = SDL_GetCursor();
atexit(sdl_cleanup);
if (full_screen) {
gui_fullscreen = 1;
gui_fullscreen_initial_grab = 1;
sdl_grab_start();
}
}
| 10,947 |
qemu | adcf6302de40e50a8010e7f2c79b3dac2eea6e0c | 0 | int nbd_trip(BlockDriverState *bs, int csock, off_t size, uint64_t dev_offset,
off_t *offset, uint32_t nbdflags, uint8_t *data, int data_size)
{
struct nbd_request request;
struct nbd_reply reply;
TRACE("Reading request.");
if (nbd_receive_request(csock, &request) == -1)
return -1;
if (request.len + NBD_REPLY_SIZE > data_size) {
LOG("len (%u) is larger than max len (%u)",
request.len + NBD_REPLY_SIZE, data_size);
errno = EINVAL;
return -1;
}
if ((request.from + request.len) < request.from) {
LOG("integer overflow detected! "
"you're probably being attacked");
errno = EINVAL;
return -1;
}
if ((request.from + request.len) > size) {
LOG("From: %" PRIu64 ", Len: %u, Size: %" PRIu64
", Offset: %" PRIu64 "\n",
request.from, request.len, (uint64_t)size, dev_offset);
LOG("requested operation past EOF--bad client?");
errno = EINVAL;
return -1;
}
TRACE("Decoding type");
reply.handle = request.handle;
reply.error = 0;
switch (request.type) {
case NBD_CMD_READ:
TRACE("Request type is READ");
if (bdrv_read(bs, (request.from + dev_offset) / 512,
data + NBD_REPLY_SIZE,
request.len / 512) == -1) {
LOG("reading from file failed");
errno = EINVAL;
return -1;
}
*offset += request.len;
TRACE("Read %u byte(s)", request.len);
/* Reply
[ 0 .. 3] magic (NBD_REPLY_MAGIC)
[ 4 .. 7] error (0 == no error)
[ 7 .. 15] handle
*/
cpu_to_be32w((uint32_t*)data, NBD_REPLY_MAGIC);
cpu_to_be32w((uint32_t*)(data + 4), reply.error);
cpu_to_be64w((uint64_t*)(data + 8), reply.handle);
TRACE("Sending data to client");
if (write_sync(csock, data,
request.len + NBD_REPLY_SIZE) !=
request.len + NBD_REPLY_SIZE) {
LOG("writing to socket failed");
errno = EINVAL;
return -1;
}
break;
case NBD_CMD_WRITE:
TRACE("Request type is WRITE");
TRACE("Reading %u byte(s)", request.len);
if (read_sync(csock, data, request.len) != request.len) {
LOG("reading from socket failed");
errno = EINVAL;
return -1;
}
if (nbdflags & NBD_FLAG_READ_ONLY) {
TRACE("Server is read-only, return error");
reply.error = 1;
} else {
TRACE("Writing to device");
if (bdrv_write(bs, (request.from + dev_offset) / 512,
data, request.len / 512) == -1) {
LOG("writing to file failed");
errno = EINVAL;
return -1;
}
*offset += request.len;
}
if (nbd_send_reply(csock, &reply) == -1)
return -1;
break;
case NBD_CMD_DISC:
TRACE("Request type is DISCONNECT");
errno = 0;
return 1;
default:
LOG("invalid request type (%u) received", request.type);
errno = EINVAL;
return -1;
}
TRACE("Request/Reply complete");
return 0;
}
| 10,948 |
qemu | eabb7b91b36b202b4dac2df2d59d698e3aff197a | 0 | static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
{
ptrdiff_t offset = target - code_ptr;
assert(offset == sextract64(offset, 0, 19));
*code_ptr = deposit32(*code_ptr, 5, 19, offset);
}
| 10,949 |
qemu | 17b74b98676aee5bc470b173b1e528d2fce2cf18 | 0 | void json_end_object(QJSON *json)
{
qstring_append(json->str, " }");
json->omit_comma = false;
}
| 10,951 |
qemu | c2b38b277a7882a592f4f2ec955084b2b756daaa | 0 | void timerlist_free(QEMUTimerList *timer_list)
{
assert(!timerlist_has_timers(timer_list));
if (timer_list->clock) {
QLIST_REMOVE(timer_list, list);
}
qemu_mutex_destroy(&timer_list->active_timers_lock);
g_free(timer_list);
}
| 10,952 |
qemu | c2b38b277a7882a592f4f2ec955084b2b756daaa | 0 | static AioContext *thread_pool_get_aio_context(BlockAIOCB *acb)
{
ThreadPoolElement *elem = (ThreadPoolElement *)acb;
ThreadPool *pool = elem->pool;
return pool->ctx;
}
| 10,953 |
qemu | 6512a2a7106480c19183d6466a6845bc9bdf6ec0 | 0 | static BlockDriverAIOCB *dma_bdrv_io(
BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num,
BlockDriverCompletionFunc *cb, void *opaque,
int is_write)
{
DMABlockState *dbs = qemu_malloc(sizeof(*dbs));
dbs->bs = bs;
dbs->acb = qemu_aio_get(bs, cb, opaque);
dbs->sg = sg;
dbs->sector_num = sector_num;
dbs->sg_cur_index = 0;
dbs->sg_cur_byte = 0;
dbs->is_write = is_write;
dbs->bh = NULL;
qemu_iovec_init(&dbs->iov, sg->nsg);
dma_bdrv_cb(dbs, 0);
return dbs->acb;
}
| 10,954 |
qemu | a8170e5e97ad17ca169c64ba87ae2f53850dab4c | 0 | static uint64_t watch_mem_read(void *opaque, target_phys_addr_t addr,
unsigned size)
{
check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_READ);
switch (size) {
case 1: return ldub_phys(addr);
case 2: return lduw_phys(addr);
case 4: return ldl_phys(addr);
default: abort();
}
}
| 10,955 |
qemu | 962b289ef35087fcd8764e4e29808d8ac90157f7 | 1 | print_syscall_ret(int num, abi_long ret)
{
int i;
for(i=0;i<nsyscalls;i++)
if( scnames[i].nr == num ) {
if( scnames[i].result != NULL ) {
scnames[i].result(&scnames[i],ret);
} else {
if( ret < 0 ) {
gemu_log(" = -1 errno=" TARGET_ABI_FMT_ld " (%s)\n", -ret, target_strerror(-ret));
} else {
gemu_log(" = " TARGET_ABI_FMT_ld "\n", ret);
}
}
break;
}
}
| 10,957 |
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