We are currently solving the following issue within our repository. Here is the issue text:
--- BEGIN ISSUE ---
[Bug]: assert parts[0] == "base_model" AssertionError
### Your current environment

```text
PyTorch version: 2.3.0+cu121
Is debug build: False
CUDA used to build PyTorch: 12.1
ROCM used to build PyTorch: N/A

OS: Ubuntu 22.04.3 LTS (x86_64)
GCC version: (conda-forge gcc 13.2.0-7) 13.2.0
Clang version: Could not collect
CMake version: version 3.29.3
Libc version: glibc-2.35

Python version: 3.10.14 (main, May  6 2024, 19:42:50) [GCC 11.2.0] (64-bit runtime)
Python platform: Linux-5.15.0-105-generic-x86_64-with-glibc2.35
Is CUDA available: True
CUDA runtime version: 12.1.105
CUDA_MODULE_LOADING set to: LAZY
GPU models and configuration: 
GPU 0: NVIDIA GeForce RTX 3090
GPU 1: NVIDIA GeForce RTX 3090
GPU 2: NVIDIA GeForce RTX 3090
GPU 3: NVIDIA GeForce RTX 3090

Nvidia driver version: 535.171.04
cuDNN version: Probably one of the following:
/usr/lib/x86_64-linux-gnu/libcudnn.so.8.9.0
/usr/lib/x86_64-linux-gnu/libcudnn_adv_infer.so.8.9.0
/usr/lib/x86_64-linux-gnu/libcudnn_adv_train.so.8.9.0
/usr/lib/x86_64-linux-gnu/libcudnn_cnn_infer.so.8.9.0
/usr/lib/x86_64-linux-gnu/libcudnn_cnn_train.so.8.9.0
/usr/lib/x86_64-linux-gnu/libcudnn_ops_infer.so.8.9.0
/usr/lib/x86_64-linux-gnu/libcudnn_ops_train.so.8.9.0
HIP runtime version: N/A
MIOpen runtime version: N/A
Is XNNPACK available: True

CPU:
Architecture:                       x86_64
CPU op-mode(s):                     32-bit, 64-bit
Address sizes:                      46 bits physical, 48 bits virtual
Byte Order:                         Little Endian
CPU(s):                             88
On-line CPU(s) list:                0-87
Vendor ID:                          GenuineIntel
Model name:                         Intel(R) Xeon(R) CPU E5-2696 v4 @ 2.20GHz
CPU family:                         6
Model:                              79
Thread(s) per core:                 2
Core(s) per socket:                 22
Socket(s):                          2
Stepping:                           1
CPU max MHz:                        3700.0000
CPU min MHz:                        1200.0000
BogoMIPS:                           4399.72
Flags:                              fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a rdseed adx smap intel_pt xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts md_clear flush_l1d
Virtualization:                     VT-x
L1d cache:                          1.4 MiB (44 instances)
L1i cache:                          1.4 MiB (44 instances)
L2 cache:                           11 MiB (44 instances)
L3 cache:                           110 MiB (2 instances)
NUMA node(s):                       2
NUMA node0 CPU(s):                  0-21,44-65
NUMA node1 CPU(s):                  22-43,66-87
Vulnerability Gather data sampling: Not affected
Vulnerability Itlb multihit:        KVM: Mitigation: VMX disabled
Vulnerability L1tf:                 Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
Vulnerability Mds:                  Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Meltdown:             Mitigation; PTI
Vulnerability Mmio stale data:      Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Retbleed:             Not affected
Vulnerability Spec rstack overflow: Not affected
Vulnerability Spec store bypass:    Mitigation; Speculative Store Bypass disabled via prctl and seccomp
Vulnerability Spectre v1:           Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2:           Mitigation; Retpolines, IBPB conditional, IBRS_FW, STIBP conditional, RSB filling, PBRSB-eIBRS Not affected
Vulnerability Srbds:                Not affected
Vulnerability Tsx async abort:      Mitigation; Clear CPU buffers; SMT vulnerable

Versions of relevant libraries:
[pip3] numpy==1.26.4
[pip3] nvidia-nccl-cu12==2.20.5
[pip3] torch==2.3.0
[pip3] triton==2.3.0
[pip3] vllm_nccl_cu12==2.18.1.0.4.0
[conda] numpy                     1.26.4                   pypi_0    pypi
[conda] nvidia-nccl-cu12          2.20.5                   pypi_0    pypi
[conda] torch                     2.3.0                    pypi_0    pypi
[conda] triton                    2.3.0                    pypi_0    pypi
[conda] vllm-nccl-cu12            2.18.1.0.4.0             pypi_0    pypiROCM Version: Could not collect
Neuron SDK Version: N/A
vLLM Version: 0.4.2
vLLM Build Flags:
CUDA Archs: Not Set; ROCm: Disabled; Neuron: Disabled
GPU Topology:
GPU0    GPU1    GPU2    GPU3    CPU Affinity    NUMA Affinity   GPU NUMA ID
GPU0     X      PHB     SYS     SYS     0-21,44-65      0               N/A
GPU1    PHB      X      SYS     SYS     0-21,44-65      0               N/A
GPU2    SYS     SYS      X      PHB     22-43,66-87     1               N/A
GPU3    SYS     SYS     PHB      X      22-43,66-87     1               N/A

Legend:

  X    = Self
  SYS  = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI)
  NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node
  PHB  = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU)
  PXB  = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge)
  PIX  = Connection traversing at most a single PCIe bridge
  NV#  = Connection traversing a bonded set of # NVLinks
```


### 🐛 Describe the bug

CUDA_VISIBLE_DEVICES=0,1 python -m vllm.entrypoints.openai.api_server \
    --model /home/greatwall/app/edison/models/Qwen1.5-14B-Chat \
    --trust-remote-code \
    --served-model-name qwen14B \
    --max-model-len 4096 \
    --gpu-memory-utilization 0.9 \
    --enable-lora \
    --lora-modules lora1=/home/greatwall/app/edison/output/qwen1half-14b-chat/v65-20240515-143141/checkpoint-1110 \
    --host 0.0.0.0 \
    --port 8088 \
    --tensor-parallel-size 2 \
    --enforce-eager

--- END ISSUE ---

Below are some code segments, each from a relevant file. One or more of these files may contain bugs.
--- BEGIN FILES ---
Path: `vllm/lora/utils.py`
Content:
```
1 from typing import List, Optional, Set, Tuple, Type
2 
3 from torch import nn
4 from transformers import PretrainedConfig
5 
6 from vllm.config import LoRAConfig
7 from vllm.logger import init_logger
8 from vllm.lora.fully_sharded_layers import (
9     ColumnParallelLinearWithShardedLoRA,
10     MergedColumnParallelLinearWithShardedLoRA,
11     MergedQKVParallelLinearWithShardedLora, RowParallelLinearWithShardedLoRA)
12 # being imported for _all_lora_classes below
13 # yapf conflicts with isort for this block
14 # yapf: disable
15 from vllm.lora.layers import (BaseLayerWithLoRA, ColumnParallelLinearWithLoRA,
16                               LinearScalingRotaryEmbeddingWithLora,
17                               LogitsProcessorWithLoRA,
18                               MergedColumnParallelLinearWithLoRA,
19                               MergedQKVParallelLinearWithLora,
20                               QKVParallelLinearWithLora,
21                               RowParallelLinearWithLoRA,
22                               VocabParallelEmbeddingWithLoRA)
23 # yapf: enable
24 from vllm.model_executor.layers.logits_processor import LogitsProcessor
25 from vllm.model_executor.layers.vocab_parallel_embedding import ParallelLMHead
26 
27 logger = init_logger(__name__)
28 
29 _all_lora_classes: Set[Type[BaseLayerWithLoRA]] = {
30     VocabParallelEmbeddingWithLoRA,
31     ColumnParallelLinearWithLoRA,
32     MergedColumnParallelLinearWithLoRA,
33     QKVParallelLinearWithLora,
34     MergedQKVParallelLinearWithLora,
35     RowParallelLinearWithLoRA,
36     LogitsProcessorWithLoRA,
37     ColumnParallelLinearWithShardedLoRA,
38     MergedColumnParallelLinearWithShardedLoRA,
39     MergedQKVParallelLinearWithShardedLora,
40     RowParallelLinearWithShardedLoRA,
41     LinearScalingRotaryEmbeddingWithLora,
42 }
43 
44 
45 def from_layer(layer: nn.Module,
46                max_loras: int,
47                lora_config: LoRAConfig,
48                packed_modules_list: List,
49                model_config: Optional[PretrainedConfig] = None) -> nn.Module:
50     for lora_cls in _all_lora_classes:
51         # specifying kwargs so they can be easily accessed in decorator
52         if lora_cls.can_replace_layer(source_layer=layer,
53                                       lora_config=lora_config,
54                                       packed_modules_list=packed_modules_list,
55                                       model_config=model_config):
56             ret = lora_cls(layer)
57             ret.create_lora_weights(max_loras, lora_config, model_config)
58             return ret
59     return layer
60 
61 
62 def from_layer_logits_processor(
63     layer: LogitsProcessor,
64     lm_head: ParallelLMHead,
65     max_loras: int,
66     lora_config: LoRAConfig,
67     model_config: Optional[PretrainedConfig] = None,
68 ) -> LogitsProcessorWithLoRA:
69     ret = LogitsProcessorWithLoRA(layer, lm_head.embedding_dim,
70                                   lm_head.weight.dtype, lm_head.weight.device,
71                                   lm_head.get_sharded_to_full_mapping())
72     ret.create_lora_weights(max_loras, lora_config, model_config)
73     return ret
74 
75 
76 def replace_submodule(model: nn.Module, module_name: str,
77                       new_module: nn.Module) -> nn.Module:
78     """Replace a submodule in a model with a new module."""
79     parent = model.get_submodule(".".join(module_name.split(".")[:-1]))
80     target_name = module_name.split(".")[-1]
81     setattr(parent, target_name, new_module)
82     return new_module
83 
84 
85 def parse_fine_tuned_lora_name(name: str) -> Tuple[str, bool]:
86     """Parse the name of lora weights.
87 
88     args:
89         name: the name of the fine-tuned LoRA, e.g.
90             base_model.model.dense1.weight
91     return:
92         Tuple(module_name, is_lora_a):
93             module_name: the name of the module, e.g. model.dense1,
94             is_lora_a whether the tensor is lora_a or lora_b.
95     """
96     parts = name.split(".")
97     assert parts[0] == "base_model"
98     assert parts[1] == "model"
99     if parts[-1] == "weight":
100         assert parts[-2] == "lora_A" or parts[-2] == "lora_B"
101         return ".".join(parts[2:-2]), parts[-2] == "lora_A"
102 
103     if parts[-1] == "lora_embedding_A" or parts[-1] == "lora_embedding_B":
104         return ".".join(parts[2:-1]), parts[-1] == "lora_embedding_A"
105 
106     raise ValueError(f"{name} is unsupported format")
107
```
--- END FILES ---

Please first localize the bug based on the issue statement, and then generate a patch according to the `git diff` format fenced by three backticks.

Here is an example:

```diff
diff --git a/examples/server_async.py b/examples/server_async.py
--- a/examples/server_async.py
+++ b/examples/server_async.py
@@ -313,4 +313,4 @@
 
 
 if __name__ == "__main__":
-    asyncio.run(run_async_server("."), debug=True)
+    asyncio.run(run_async_server(), debug=True)
diff --git a/examples/server_sync.py b/examples/server_sync.py
--- a/examples/server_sync.py
+++ b/examples/server_sync.py
@@ -313,5 +313,5 @@
 
 
 if __name__ == "__main__":
-    server = run_sync_server(".")
+    server = run_sync_server()
     server.shutdown()

```

diff --git a/vllm/lora/utils.py b/vllm/lora/utils.py
--- a/vllm/lora/utils.py
+++ b/vllm/lora/utils.py
@@ -94,13 +94,12 @@
             is_lora_a whether the tensor is lora_a or lora_b.
     """
     parts = name.split(".")
-    assert parts[0] == "base_model"
-    assert parts[1] == "model"
-    if parts[-1] == "weight":
-        assert parts[-2] == "lora_A" or parts[-2] == "lora_B"
-        return ".".join(parts[2:-2]), parts[-2] == "lora_A"
 
-    if parts[-1] == "lora_embedding_A" or parts[-1] == "lora_embedding_B":
-        return ".".join(parts[2:-1]), parts[-1] == "lora_embedding_A"
+    if len(parts) >= 2 and parts[0] == "base_model" and parts[1] == "model":
+        if parts[-1] == "weight":
+            if parts[-2] == "lora_A" or parts[-2] == "lora_B":
+                return ".".join(parts[2:-2]), parts[-2] == "lora_A"
+        elif parts[-1] == "lora_embedding_A" or parts[-1] == "lora_embedding_B":
+            return ".".join(parts[2:-1]), parts[-1] == "lora_embedding_A"
 
-    raise ValueError(f"{name} is unsupported format")
+    raise ValueError(f"{name} is unsupported LoRA weight")

{"golden_diff": "diff --git a/vllm/lora/utils.py b/vllm/lora/utils.py\n--- a/vllm/lora/utils.py\n+++ b/vllm/lora/utils.py\n@@ -94,13 +94,12 @@\n             is_lora_a whether the tensor is lora_a or lora_b.\n     \"\"\"\n     parts = name.split(\".\")\n-    assert parts[0] == \"base_model\"\n-    assert parts[1] == \"model\"\n-    if parts[-1] == \"weight\":\n-        assert parts[-2] == \"lora_A\" or parts[-2] == \"lora_B\"\n-        return \".\".join(parts[2:-2]), parts[-2] == \"lora_A\"\n \n-    if parts[-1] == \"lora_embedding_A\" or parts[-1] == \"lora_embedding_B\":\n-        return \".\".join(parts[2:-1]), parts[-1] == \"lora_embedding_A\"\n+    if len(parts) >= 2 and parts[0] == \"base_model\" and parts[1] == \"model\":\n+        if parts[-1] == \"weight\":\n+            if parts[-2] == \"lora_A\" or parts[-2] == \"lora_B\":\n+                return \".\".join(parts[2:-2]), parts[-2] == \"lora_A\"\n+        elif parts[-1] == \"lora_embedding_A\" or parts[-1] == \"lora_embedding_B\":\n+            return \".\".join(parts[2:-1]), parts[-1] == \"lora_embedding_A\"\n \n-    raise ValueError(f\"{name} is unsupported format\")\n+    raise ValueError(f\"{name} is unsupported LoRA weight\")\n", "issue": "[Bug]: assert parts[0] == \"base_model\" AssertionError\n### Your current environment\n\n```text\r\nPyTorch version: 2.3.0+cu121\r\nIs debug build: False\r\nCUDA used to build PyTorch: 12.1\r\nROCM used to build PyTorch: N/A\r\n\r\nOS: Ubuntu 22.04.3 LTS (x86_64)\r\nGCC version: (conda-forge gcc 13.2.0-7) 13.2.0\r\nClang version: Could not collect\r\nCMake version: version 3.29.3\r\nLibc version: glibc-2.35\r\n\r\nPython version: 3.10.14 (main, May  6 2024, 19:42:50) [GCC 11.2.0] (64-bit runtime)\r\nPython platform: Linux-5.15.0-105-generic-x86_64-with-glibc2.35\r\nIs CUDA available: True\r\nCUDA runtime version: 12.1.105\r\nCUDA_MODULE_LOADING set to: LAZY\r\nGPU models and configuration: \r\nGPU 0: NVIDIA GeForce RTX 3090\r\nGPU 1: NVIDIA GeForce RTX 3090\r\nGPU 2: NVIDIA GeForce RTX 3090\r\nGPU 3: NVIDIA GeForce RTX 3090\r\n\r\nNvidia driver version: 535.171.04\r\ncuDNN version: Probably one of the following:\r\n/usr/lib/x86_64-linux-gnu/libcudnn.so.8.9.0\r\n/usr/lib/x86_64-linux-gnu/libcudnn_adv_infer.so.8.9.0\r\n/usr/lib/x86_64-linux-gnu/libcudnn_adv_train.so.8.9.0\r\n/usr/lib/x86_64-linux-gnu/libcudnn_cnn_infer.so.8.9.0\r\n/usr/lib/x86_64-linux-gnu/libcudnn_cnn_train.so.8.9.0\r\n/usr/lib/x86_64-linux-gnu/libcudnn_ops_infer.so.8.9.0\r\n/usr/lib/x86_64-linux-gnu/libcudnn_ops_train.so.8.9.0\r\nHIP runtime version: N/A\r\nMIOpen runtime version: N/A\r\nIs XNNPACK available: True\r\n\r\nCPU:\r\nArchitecture:                       x86_64\r\nCPU op-mode(s):                     32-bit, 64-bit\r\nAddress sizes:                      46 bits physical, 48 bits virtual\r\nByte Order:                         Little Endian\r\nCPU(s):                             88\r\nOn-line CPU(s) list:                0-87\r\nVendor ID:                          GenuineIntel\r\nModel name:                         Intel(R) Xeon(R) CPU E5-2696 v4 @ 2.20GHz\r\nCPU family:                         6\r\nModel:                              79\r\nThread(s) per core:                 2\r\nCore(s) per socket:                 22\r\nSocket(s):                          2\r\nStepping:                           1\r\nCPU max MHz:                        3700.0000\r\nCPU min MHz:                        1200.0000\r\nBogoMIPS:                           4399.72\r\nFlags:                              fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a rdseed adx smap intel_pt xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts md_clear flush_l1d\r\nVirtualization:                     VT-x\r\nL1d cache:                          1.4 MiB (44 instances)\r\nL1i cache:                          1.4 MiB (44 instances)\r\nL2 cache:                           11 MiB (44 instances)\r\nL3 cache:                           110 MiB (2 instances)\r\nNUMA node(s):                       2\r\nNUMA node0 CPU(s):                  0-21,44-65\r\nNUMA node1 CPU(s):                  22-43,66-87\r\nVulnerability Gather data sampling: Not affected\r\nVulnerability Itlb multihit:        KVM: Mitigation: VMX disabled\r\nVulnerability L1tf:                 Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable\r\nVulnerability Mds:                  Mitigation; Clear CPU buffers; SMT vulnerable\r\nVulnerability Meltdown:             Mitigation; PTI\r\nVulnerability Mmio stale data:      Mitigation; Clear CPU buffers; SMT vulnerable\r\nVulnerability Retbleed:             Not affected\r\nVulnerability Spec rstack overflow: Not affected\r\nVulnerability Spec store bypass:    Mitigation; Speculative Store Bypass disabled via prctl and seccomp\r\nVulnerability Spectre v1:           Mitigation; usercopy/swapgs barriers and __user pointer sanitization\r\nVulnerability Spectre v2:           Mitigation; Retpolines, IBPB conditional, IBRS_FW, STIBP conditional, RSB filling, PBRSB-eIBRS Not affected\r\nVulnerability Srbds:                Not affected\r\nVulnerability Tsx async abort:      Mitigation; Clear CPU buffers; SMT vulnerable\r\n\r\nVersions of relevant libraries:\r\n[pip3] numpy==1.26.4\r\n[pip3] nvidia-nccl-cu12==2.20.5\r\n[pip3] torch==2.3.0\r\n[pip3] triton==2.3.0\r\n[pip3] vllm_nccl_cu12==2.18.1.0.4.0\r\n[conda] numpy                     1.26.4                   pypi_0    pypi\r\n[conda] nvidia-nccl-cu12          2.20.5                   pypi_0    pypi\r\n[conda] torch                     2.3.0                    pypi_0    pypi\r\n[conda] triton                    2.3.0                    pypi_0    pypi\r\n[conda] vllm-nccl-cu12            2.18.1.0.4.0             pypi_0    pypiROCM Version: Could not collect\r\nNeuron SDK Version: N/A\r\nvLLM Version: 0.4.2\r\nvLLM Build Flags:\r\nCUDA Archs: Not Set; ROCm: Disabled; Neuron: Disabled\r\nGPU Topology:\r\nGPU0    GPU1    GPU2    GPU3    CPU Affinity    NUMA Affinity   GPU NUMA ID\r\nGPU0     X      PHB     SYS     SYS     0-21,44-65      0               N/A\r\nGPU1    PHB      X      SYS     SYS     0-21,44-65      0               N/A\r\nGPU2    SYS     SYS      X      PHB     22-43,66-87     1               N/A\r\nGPU3    SYS     SYS     PHB      X      22-43,66-87     1               N/A\r\n\r\nLegend:\r\n\r\n  X    = Self\r\n  SYS  = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI)\r\n  NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node\r\n  PHB  = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU)\r\n  PXB  = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge)\r\n  PIX  = Connection traversing at most a single PCIe bridge\r\n  NV#  = Connection traversing a bonded set of # NVLinks\r\n```\r\n\n\n### \ud83d\udc1b Describe the bug\n\nCUDA_VISIBLE_DEVICES=0,1 python -m vllm.entrypoints.openai.api_server \\\r\n    --model /home/greatwall/app/edison/models/Qwen1.5-14B-Chat \\\r\n    --trust-remote-code \\\r\n    --served-model-name qwen14B \\\r\n    --max-model-len 4096 \\\r\n    --gpu-memory-utilization 0.9 \\\r\n    --enable-lora \\\r\n    --lora-modules lora1=/home/greatwall/app/edison/output/qwen1half-14b-chat/v65-20240515-143141/checkpoint-1110 \\\r\n    --host 0.0.0.0 \\\r\n    --port 8088 \\\r\n    --tensor-parallel-size 2 \\\r\n    --enforce-eager\n", "before_files": [{"content": "from typing import List, Optional, Set, Tuple, Type\n\nfrom torch import nn\nfrom transformers import PretrainedConfig\n\nfrom vllm.config import LoRAConfig\nfrom vllm.logger import init_logger\nfrom vllm.lora.fully_sharded_layers import (\n    ColumnParallelLinearWithShardedLoRA,\n    MergedColumnParallelLinearWithShardedLoRA,\n    MergedQKVParallelLinearWithShardedLora, RowParallelLinearWithShardedLoRA)\n# being imported for _all_lora_classes below\n# yapf conflicts with isort for this block\n# yapf: disable\nfrom vllm.lora.layers import (BaseLayerWithLoRA, ColumnParallelLinearWithLoRA,\n                              LinearScalingRotaryEmbeddingWithLora,\n                              LogitsProcessorWithLoRA,\n                              MergedColumnParallelLinearWithLoRA,\n                              MergedQKVParallelLinearWithLora,\n                              QKVParallelLinearWithLora,\n                              RowParallelLinearWithLoRA,\n                              VocabParallelEmbeddingWithLoRA)\n# yapf: enable\nfrom vllm.model_executor.layers.logits_processor import LogitsProcessor\nfrom vllm.model_executor.layers.vocab_parallel_embedding import ParallelLMHead\n\nlogger = init_logger(__name__)\n\n_all_lora_classes: Set[Type[BaseLayerWithLoRA]] = {\n    VocabParallelEmbeddingWithLoRA,\n    ColumnParallelLinearWithLoRA,\n    MergedColumnParallelLinearWithLoRA,\n    QKVParallelLinearWithLora,\n    MergedQKVParallelLinearWithLora,\n    RowParallelLinearWithLoRA,\n    LogitsProcessorWithLoRA,\n    ColumnParallelLinearWithShardedLoRA,\n    MergedColumnParallelLinearWithShardedLoRA,\n    MergedQKVParallelLinearWithShardedLora,\n    RowParallelLinearWithShardedLoRA,\n    LinearScalingRotaryEmbeddingWithLora,\n}\n\n\ndef from_layer(layer: nn.Module,\n               max_loras: int,\n               lora_config: LoRAConfig,\n               packed_modules_list: List,\n               model_config: Optional[PretrainedConfig] = None) -> nn.Module:\n    for lora_cls in _all_lora_classes:\n        # specifying kwargs so they can be easily accessed in decorator\n        if lora_cls.can_replace_layer(source_layer=layer,\n                                      lora_config=lora_config,\n                                      packed_modules_list=packed_modules_list,\n                                      model_config=model_config):\n            ret = lora_cls(layer)\n            ret.create_lora_weights(max_loras, lora_config, model_config)\n            return ret\n    return layer\n\n\ndef from_layer_logits_processor(\n    layer: LogitsProcessor,\n    lm_head: ParallelLMHead,\n    max_loras: int,\n    lora_config: LoRAConfig,\n    model_config: Optional[PretrainedConfig] = None,\n) -> LogitsProcessorWithLoRA:\n    ret = LogitsProcessorWithLoRA(layer, lm_head.embedding_dim,\n                                  lm_head.weight.dtype, lm_head.weight.device,\n                                  lm_head.get_sharded_to_full_mapping())\n    ret.create_lora_weights(max_loras, lora_config, model_config)\n    return ret\n\n\ndef replace_submodule(model: nn.Module, module_name: str,\n                      new_module: nn.Module) -> nn.Module:\n    \"\"\"Replace a submodule in a model with a new module.\"\"\"\n    parent = model.get_submodule(\".\".join(module_name.split(\".\")[:-1]))\n    target_name = module_name.split(\".\")[-1]\n    setattr(parent, target_name, new_module)\n    return new_module\n\n\ndef parse_fine_tuned_lora_name(name: str) -> Tuple[str, bool]:\n    \"\"\"Parse the name of lora weights.\n\n    args:\n        name: the name of the fine-tuned LoRA, e.g.\n            base_model.model.dense1.weight\n    return:\n        Tuple(module_name, is_lora_a):\n            module_name: the name of the module, e.g. model.dense1,\n            is_lora_a whether the tensor is lora_a or lora_b.\n    \"\"\"\n    parts = name.split(\".\")\n    assert parts[0] == \"base_model\"\n    assert parts[1] == \"model\"\n    if parts[-1] == \"weight\":\n        assert parts[-2] == \"lora_A\" or parts[-2] == \"lora_B\"\n        return \".\".join(parts[2:-2]), parts[-2] == \"lora_A\"\n\n    if parts[-1] == \"lora_embedding_A\" or parts[-1] == \"lora_embedding_B\":\n        return \".\".join(parts[2:-1]), parts[-1] == \"lora_embedding_A\"\n\n    raise ValueError(f\"{name} is unsupported format\")\n", "path": "vllm/lora/utils.py"}], "after_files": [{"content": "from typing import List, Optional, Set, Tuple, Type\n\nfrom torch import nn\nfrom transformers import PretrainedConfig\n\nfrom vllm.config import LoRAConfig\nfrom vllm.logger import init_logger\nfrom vllm.lora.fully_sharded_layers import (\n    ColumnParallelLinearWithShardedLoRA,\n    MergedColumnParallelLinearWithShardedLoRA,\n    MergedQKVParallelLinearWithShardedLora, RowParallelLinearWithShardedLoRA)\n# being imported for _all_lora_classes below\n# yapf conflicts with isort for this block\n# yapf: disable\nfrom vllm.lora.layers import (BaseLayerWithLoRA, ColumnParallelLinearWithLoRA,\n                              LinearScalingRotaryEmbeddingWithLora,\n                              LogitsProcessorWithLoRA,\n                              MergedColumnParallelLinearWithLoRA,\n                              MergedQKVParallelLinearWithLora,\n                              QKVParallelLinearWithLora,\n                              RowParallelLinearWithLoRA,\n                              VocabParallelEmbeddingWithLoRA)\n# yapf: enable\nfrom vllm.model_executor.layers.logits_processor import LogitsProcessor\nfrom vllm.model_executor.layers.vocab_parallel_embedding import ParallelLMHead\n\nlogger = init_logger(__name__)\n\n_all_lora_classes: Set[Type[BaseLayerWithLoRA]] = {\n    VocabParallelEmbeddingWithLoRA,\n    ColumnParallelLinearWithLoRA,\n    MergedColumnParallelLinearWithLoRA,\n    QKVParallelLinearWithLora,\n    MergedQKVParallelLinearWithLora,\n    RowParallelLinearWithLoRA,\n    LogitsProcessorWithLoRA,\n    ColumnParallelLinearWithShardedLoRA,\n    MergedColumnParallelLinearWithShardedLoRA,\n    MergedQKVParallelLinearWithShardedLora,\n    RowParallelLinearWithShardedLoRA,\n    LinearScalingRotaryEmbeddingWithLora,\n}\n\n\ndef from_layer(layer: nn.Module,\n               max_loras: int,\n               lora_config: LoRAConfig,\n               packed_modules_list: List,\n               model_config: Optional[PretrainedConfig] = None) -> nn.Module:\n    for lora_cls in _all_lora_classes:\n        # specifying kwargs so they can be easily accessed in decorator\n        if lora_cls.can_replace_layer(source_layer=layer,\n                                      lora_config=lora_config,\n                                      packed_modules_list=packed_modules_list,\n                                      model_config=model_config):\n            ret = lora_cls(layer)\n            ret.create_lora_weights(max_loras, lora_config, model_config)\n            return ret\n    return layer\n\n\ndef from_layer_logits_processor(\n    layer: LogitsProcessor,\n    lm_head: ParallelLMHead,\n    max_loras: int,\n    lora_config: LoRAConfig,\n    model_config: Optional[PretrainedConfig] = None,\n) -> LogitsProcessorWithLoRA:\n    ret = LogitsProcessorWithLoRA(layer, lm_head.embedding_dim,\n                                  lm_head.weight.dtype, lm_head.weight.device,\n                                  lm_head.get_sharded_to_full_mapping())\n    ret.create_lora_weights(max_loras, lora_config, model_config)\n    return ret\n\n\ndef replace_submodule(model: nn.Module, module_name: str,\n                      new_module: nn.Module) -> nn.Module:\n    \"\"\"Replace a submodule in a model with a new module.\"\"\"\n    parent = model.get_submodule(\".\".join(module_name.split(\".\")[:-1]))\n    target_name = module_name.split(\".\")[-1]\n    setattr(parent, target_name, new_module)\n    return new_module\n\n\ndef parse_fine_tuned_lora_name(name: str) -> Tuple[str, bool]:\n    \"\"\"Parse the name of lora weights.\n\n    args:\n        name: the name of the fine-tuned LoRA, e.g.\n            base_model.model.dense1.weight\n    return:\n        Tuple(module_name, is_lora_a):\n            module_name: the name of the module, e.g. model.dense1,\n            is_lora_a whether the tensor is lora_a or lora_b.\n    \"\"\"\n    parts = name.split(\".\")\n\n    if len(parts) >= 2 and parts[0] == \"base_model\" and parts[1] == \"model\":\n        if parts[-1] == \"weight\":\n            if parts[-2] == \"lora_A\" or parts[-2] == \"lora_B\":\n                return \".\".join(parts[2:-2]), parts[-2] == \"lora_A\"\n        elif parts[-1] == \"lora_embedding_A\" or parts[-1] == \"lora_embedding_B\":\n            return \".\".join(parts[2:-1]), parts[-1] == \"lora_embedding_A\"\n\n    raise ValueError(f\"{name} is unsupported LoRA weight\")\n", "path": "vllm/lora/utils.py"}]}