We are currently solving the following issue within our repository. Here is the issue text:
--- BEGIN ISSUE ---
Error when number of qubits is of type numpy.int64
<!-- ⚠️ If you do not respect this template, your issue will be closed -->
<!-- ⚠️ Make sure to browse the opened and closed issues to confirm this idea does not exist. -->

### What is the expected enhancement?

In `qiskit/validation/base.py`, function `check_types`: currently, if `n_qubits` or `memory_slots` are of type `numpy.int64`, then an error is triggered, because type `int` is expected.

I find it too strict. Especially considering that if the number of qubits is originated in a `numpy` array, then its default type is `numpy.int64`. Terra can allow additional types, or convert the type internally.


--- END ISSUE ---

Below are some code segments, each from a relevant file. One or more of these files may contain bugs.
--- BEGIN FILES ---
Path: `qiskit/circuit/register.py`
Content:
```
1 # -*- coding: utf-8 -*-
2 
3 # This code is part of Qiskit.
4 #
5 # (C) Copyright IBM 2017.
6 #
7 # This code is licensed under the Apache License, Version 2.0. You may
8 # obtain a copy of this license in the LICENSE.txt file in the root directory
9 # of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
10 #
11 # Any modifications or derivative works of this code must retain this
12 # copyright notice, and modified files need to carry a notice indicating
13 # that they have been altered from the originals.
14 
15 """
16 Base register reference object.
17 """
18 import re
19 import logging
20 import itertools
21 
22 from qiskit.exceptions import QiskitError, QiskitIndexError
23 
24 logger = logging.getLogger(__name__)
25 
26 
27 class Register:
28     """Implement a generic register."""
29 
30     # Counter for the number of instances in this class.
31     instances_counter = itertools.count()
32     # Prefix to use for auto naming.
33     prefix = 'reg'
34 
35     def __init__(self, size, name=None):
36         """Create a new generic register.
37         """
38 
39         if name is None:
40             name = '%s%i' % (self.prefix, next(self.instances_counter))
41 
42         if not isinstance(name, str):
43             raise QiskitError("The circuit name should be a string "
44                               "(or None for autogenerate a name).")
45 
46         test = re.compile('[a-z][a-zA-Z0-9_]*')
47         if test.match(name) is None:
48             raise QiskitError("%s is an invalid OPENQASM register name." % name)
49 
50         self.name = name
51         self.size = size
52         if size <= 0:
53             raise QiskitError("register size must be positive")
54 
55     def __repr__(self):
56         """Return the official string representing the register."""
57         return "%s(%d, '%s')" % (self.__class__.__qualname__,
58                                  self.size, self.name)
59 
60     def __len__(self):
61         """Return register size"""
62         return self.size
63 
64     def check_range(self, j):
65         """Check that j is a valid index into self."""
66         if isinstance(j, int):
67             if j < 0 or j >= self.size:
68                 raise QiskitIndexError("register index out of range")
69             elif isinstance(j, slice):
70                 if j.start < 0 or j.stop >= self.size or (j.step is not None and
71                                                           j.step <= 0):
72                     raise QiskitIndexError("register index slice out of range")
73 
74     def __getitem__(self, key):
75         """
76         Arg:
77             key (int|slice|list): index of the bit/qubit to be retrieved.
78 
79         Returns:
80             tuple[Register, int]: a tuple in the form `(self, key)` if key is int.
81                 If key is a slice, return a `list((self,key))`.
82 
83         Raises:
84             QiskitError: if the `key` is not an integer.
85             QiskitIndexError: if the `key` is not in the range
86                 `(0, self.size)`.
87         """
88         if not isinstance(key, (int, slice, list)):
89             raise QiskitError("expected integer or slice index into register")
90         if isinstance(key, int) and key < 0:
91             key = self.size + key
92         self.check_range(key)
93         if isinstance(key, slice):
94             return [(self, ind) for ind in range(*key.indices(len(self)))]
95         elif isinstance(key, list):  # list of qubit indices
96             if max(key) < len(self):
97                 return [(self, ind) for ind in key]
98             else:
99                 raise QiskitError('register index out of range')
100         else:
101             return self, key
102 
103     def __iter__(self):
104         """
105         Returns:
106             iterator: an iterator over the bits/qubits of the register, in the
107                 form `tuple (Register, int)`.
108         """
109         return zip([self]*self.size, range(self.size))
110 
111     def __eq__(self, other):
112         """Two Registers are the same if they are of the same type
113         (i.e. quantum/classical), and have the same name and size.
114 
115         Args:
116             other (Register): other Register
117 
118         Returns:
119             bool: are self and other equal.
120         """
121         res = False
122         if type(self) is type(other) and \
123                 self.name == other.name and \
124                 self.size == other.size:
125             res = True
126         return res
127 
128     def __hash__(self):
129         """Make object hashable, based on the name and size to hash."""
130         return hash((type(self), self.name, self.size))
131
```
--- END FILES ---

Please first localize the bug based on the issue statement, and then generate a patch according to the `git diff` format fenced by three backticks.

Here is an example:

```diff
diff --git a/examples/server_async.py b/examples/server_async.py
--- a/examples/server_async.py
+++ b/examples/server_async.py
@@ -313,4 +313,4 @@
 
 
 if __name__ == "__main__":
-    asyncio.run(run_async_server("."), debug=True)
+    asyncio.run(run_async_server(), debug=True)
diff --git a/examples/server_sync.py b/examples/server_sync.py
--- a/examples/server_sync.py
+++ b/examples/server_sync.py
@@ -313,5 +313,5 @@
 
 
 if __name__ == "__main__":
-    server = run_sync_server(".")
+    server = run_sync_server()
     server.shutdown()

```

diff --git a/qiskit/circuit/register.py b/qiskit/circuit/register.py
--- a/qiskit/circuit/register.py
+++ b/qiskit/circuit/register.py
@@ -36,21 +36,29 @@
         """Create a new generic register.
         """
 
+        # validate (or cast) size
+        try:
+            size = int(size)
+        except Exception:
+            raise QiskitError("size needs to be castable to an int")
+        if size <= 0:
+            raise QiskitError("register size must be positive")
+
+        # validate (or cast) name
         if name is None:
             name = '%s%i' % (self.prefix, next(self.instances_counter))
-
-        if not isinstance(name, str):
-            raise QiskitError("The circuit name should be a string "
-                              "(or None for autogenerate a name).")
-
-        test = re.compile('[a-z][a-zA-Z0-9_]*')
-        if test.match(name) is None:
-            raise QiskitError("%s is an invalid OPENQASM register name." % name)
+        else:
+            try:
+                name = str(name)
+            except Exception:
+                raise QiskitError("The circuit name should be castable to a string "
+                                  "(or None for autogenerate a name).")
+            name_format = re.compile('[a-z][a-zA-Z0-9_]*')
+            if name_format.match(name) is None:
+                raise QiskitError("%s is an invalid OPENQASM register name." % name)
 
         self.name = name
         self.size = size
-        if size <= 0:
-            raise QiskitError("register size must be positive")
 
     def __repr__(self):
         """Return the official string representing the register."""
@@ -106,7 +114,7 @@
             iterator: an iterator over the bits/qubits of the register, in the
                 form `tuple (Register, int)`.
         """
-        return zip([self]*self.size, range(self.size))
+        return zip([self] * self.size, range(self.size))
 
     def __eq__(self, other):
         """Two Registers are the same if they are of the same type

{"golden_diff": "diff --git a/qiskit/circuit/register.py b/qiskit/circuit/register.py\n--- a/qiskit/circuit/register.py\n+++ b/qiskit/circuit/register.py\n@@ -36,21 +36,29 @@\n         \"\"\"Create a new generic register.\n         \"\"\"\n \n+        # validate (or cast) size\n+        try:\n+            size = int(size)\n+        except Exception:\n+            raise QiskitError(\"size needs to be castable to an int\")\n+        if size <= 0:\n+            raise QiskitError(\"register size must be positive\")\n+\n+        # validate (or cast) name\n         if name is None:\n             name = '%s%i' % (self.prefix, next(self.instances_counter))\n-\n-        if not isinstance(name, str):\n-            raise QiskitError(\"The circuit name should be a string \"\n-                              \"(or None for autogenerate a name).\")\n-\n-        test = re.compile('[a-z][a-zA-Z0-9_]*')\n-        if test.match(name) is None:\n-            raise QiskitError(\"%s is an invalid OPENQASM register name.\" % name)\n+        else:\n+            try:\n+                name = str(name)\n+            except Exception:\n+                raise QiskitError(\"The circuit name should be castable to a string \"\n+                                  \"(or None for autogenerate a name).\")\n+            name_format = re.compile('[a-z][a-zA-Z0-9_]*')\n+            if name_format.match(name) is None:\n+                raise QiskitError(\"%s is an invalid OPENQASM register name.\" % name)\n \n         self.name = name\n         self.size = size\n-        if size <= 0:\n-            raise QiskitError(\"register size must be positive\")\n \n     def __repr__(self):\n         \"\"\"Return the official string representing the register.\"\"\"\n@@ -106,7 +114,7 @@\n             iterator: an iterator over the bits/qubits of the register, in the\n                 form `tuple (Register, int)`.\n         \"\"\"\n-        return zip([self]*self.size, range(self.size))\n+        return zip([self] * self.size, range(self.size))\n \n     def __eq__(self, other):\n         \"\"\"Two Registers are the same if they are of the same type\n", "issue": "Error when number of qubits is of type numpy.int64\n<!-- \u26a0\ufe0f If you do not respect this template, your issue will be closed -->\r\n<!-- \u26a0\ufe0f Make sure to browse the opened and closed issues to confirm this idea does not exist. -->\r\n\r\n### What is the expected enhancement?\r\n\r\nIn `qiskit/validation/base.py`, function `check_types`: currently, if `n_qubits` or `memory_slots` are of type `numpy.int64`, then an error is triggered, because type `int` is expected.\r\n\r\nI find it too strict. Especially considering that if the number of qubits is originated in a `numpy` array, then its default type is `numpy.int64`. Terra can allow additional types, or convert the type internally.\r\n\n", "before_files": [{"content": "# -*- coding: utf-8 -*-\n\n# This code is part of Qiskit.\n#\n# (C) Copyright IBM 2017.\n#\n# This code is licensed under the Apache License, Version 2.0. You may\n# obtain a copy of this license in the LICENSE.txt file in the root directory\n# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.\n#\n# Any modifications or derivative works of this code must retain this\n# copyright notice, and modified files need to carry a notice indicating\n# that they have been altered from the originals.\n\n\"\"\"\nBase register reference object.\n\"\"\"\nimport re\nimport logging\nimport itertools\n\nfrom qiskit.exceptions import QiskitError, QiskitIndexError\n\nlogger = logging.getLogger(__name__)\n\n\nclass Register:\n    \"\"\"Implement a generic register.\"\"\"\n\n    # Counter for the number of instances in this class.\n    instances_counter = itertools.count()\n    # Prefix to use for auto naming.\n    prefix = 'reg'\n\n    def __init__(self, size, name=None):\n        \"\"\"Create a new generic register.\n        \"\"\"\n\n        if name is None:\n            name = '%s%i' % (self.prefix, next(self.instances_counter))\n\n        if not isinstance(name, str):\n            raise QiskitError(\"The circuit name should be a string \"\n                              \"(or None for autogenerate a name).\")\n\n        test = re.compile('[a-z][a-zA-Z0-9_]*')\n        if test.match(name) is None:\n            raise QiskitError(\"%s is an invalid OPENQASM register name.\" % name)\n\n        self.name = name\n        self.size = size\n        if size <= 0:\n            raise QiskitError(\"register size must be positive\")\n\n    def __repr__(self):\n        \"\"\"Return the official string representing the register.\"\"\"\n        return \"%s(%d, '%s')\" % (self.__class__.__qualname__,\n                                 self.size, self.name)\n\n    def __len__(self):\n        \"\"\"Return register size\"\"\"\n        return self.size\n\n    def check_range(self, j):\n        \"\"\"Check that j is a valid index into self.\"\"\"\n        if isinstance(j, int):\n            if j < 0 or j >= self.size:\n                raise QiskitIndexError(\"register index out of range\")\n            elif isinstance(j, slice):\n                if j.start < 0 or j.stop >= self.size or (j.step is not None and\n                                                          j.step <= 0):\n                    raise QiskitIndexError(\"register index slice out of range\")\n\n    def __getitem__(self, key):\n        \"\"\"\n        Arg:\n            key (int|slice|list): index of the bit/qubit to be retrieved.\n\n        Returns:\n            tuple[Register, int]: a tuple in the form `(self, key)` if key is int.\n                If key is a slice, return a `list((self,key))`.\n\n        Raises:\n            QiskitError: if the `key` is not an integer.\n            QiskitIndexError: if the `key` is not in the range\n                `(0, self.size)`.\n        \"\"\"\n        if not isinstance(key, (int, slice, list)):\n            raise QiskitError(\"expected integer or slice index into register\")\n        if isinstance(key, int) and key < 0:\n            key = self.size + key\n        self.check_range(key)\n        if isinstance(key, slice):\n            return [(self, ind) for ind in range(*key.indices(len(self)))]\n        elif isinstance(key, list):  # list of qubit indices\n            if max(key) < len(self):\n                return [(self, ind) for ind in key]\n            else:\n                raise QiskitError('register index out of range')\n        else:\n            return self, key\n\n    def __iter__(self):\n        \"\"\"\n        Returns:\n            iterator: an iterator over the bits/qubits of the register, in the\n                form `tuple (Register, int)`.\n        \"\"\"\n        return zip([self]*self.size, range(self.size))\n\n    def __eq__(self, other):\n        \"\"\"Two Registers are the same if they are of the same type\n        (i.e. quantum/classical), and have the same name and size.\n\n        Args:\n            other (Register): other Register\n\n        Returns:\n            bool: are self and other equal.\n        \"\"\"\n        res = False\n        if type(self) is type(other) and \\\n                self.name == other.name and \\\n                self.size == other.size:\n            res = True\n        return res\n\n    def __hash__(self):\n        \"\"\"Make object hashable, based on the name and size to hash.\"\"\"\n        return hash((type(self), self.name, self.size))\n", "path": "qiskit/circuit/register.py"}], "after_files": [{"content": "# -*- coding: utf-8 -*-\n\n# This code is part of Qiskit.\n#\n# (C) Copyright IBM 2017.\n#\n# This code is licensed under the Apache License, Version 2.0. You may\n# obtain a copy of this license in the LICENSE.txt file in the root directory\n# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.\n#\n# Any modifications or derivative works of this code must retain this\n# copyright notice, and modified files need to carry a notice indicating\n# that they have been altered from the originals.\n\n\"\"\"\nBase register reference object.\n\"\"\"\nimport re\nimport logging\nimport itertools\n\nfrom qiskit.exceptions import QiskitError, QiskitIndexError\n\nlogger = logging.getLogger(__name__)\n\n\nclass Register:\n    \"\"\"Implement a generic register.\"\"\"\n\n    # Counter for the number of instances in this class.\n    instances_counter = itertools.count()\n    # Prefix to use for auto naming.\n    prefix = 'reg'\n\n    def __init__(self, size, name=None):\n        \"\"\"Create a new generic register.\n        \"\"\"\n\n        # validate (or cast) size\n        try:\n            size = int(size)\n        except Exception:\n            raise QiskitError(\"size needs to be castable to an int\")\n        if size <= 0:\n            raise QiskitError(\"register size must be positive\")\n\n        # validate (or cast) name\n        if name is None:\n            name = '%s%i' % (self.prefix, next(self.instances_counter))\n        else:\n            try:\n                name = str(name)\n            except Exception:\n                raise QiskitError(\"The circuit name should be castable to a string \"\n                                  \"(or None for autogenerate a name).\")\n            name_format = re.compile('[a-z][a-zA-Z0-9_]*')\n            if name_format.match(name) is None:\n                raise QiskitError(\"%s is an invalid OPENQASM register name.\" % name)\n\n        self.name = name\n        self.size = size\n\n    def __repr__(self):\n        \"\"\"Return the official string representing the register.\"\"\"\n        return \"%s(%d, '%s')\" % (self.__class__.__qualname__,\n                                 self.size, self.name)\n\n    def __len__(self):\n        \"\"\"Return register size\"\"\"\n        return self.size\n\n    def check_range(self, j):\n        \"\"\"Check that j is a valid index into self.\"\"\"\n        if isinstance(j, int):\n            if j < 0 or j >= self.size:\n                raise QiskitIndexError(\"register index out of range\")\n            elif isinstance(j, slice):\n                if j.start < 0 or j.stop >= self.size or (j.step is not None and\n                                                          j.step <= 0):\n                    raise QiskitIndexError(\"register index slice out of range\")\n\n    def __getitem__(self, key):\n        \"\"\"\n        Arg:\n            key (int|slice|list): index of the bit/qubit to be retrieved.\n\n        Returns:\n            tuple[Register, int]: a tuple in the form `(self, key)` if key is int.\n                If key is a slice, return a `list((self,key))`.\n\n        Raises:\n            QiskitError: if the `key` is not an integer.\n            QiskitIndexError: if the `key` is not in the range\n                `(0, self.size)`.\n        \"\"\"\n        if not isinstance(key, (int, slice, list)):\n            raise QiskitError(\"expected integer or slice index into register\")\n        if isinstance(key, int) and key < 0:\n            key = self.size + key\n        self.check_range(key)\n        if isinstance(key, slice):\n            return [(self, ind) for ind in range(*key.indices(len(self)))]\n        elif isinstance(key, list):  # list of qubit indices\n            if max(key) < len(self):\n                return [(self, ind) for ind in key]\n            else:\n                raise QiskitError('register index out of range')\n        else:\n            return self, key\n\n    def __iter__(self):\n        \"\"\"\n        Returns:\n            iterator: an iterator over the bits/qubits of the register, in the\n                form `tuple (Register, int)`.\n        \"\"\"\n        return zip([self] * self.size, range(self.size))\n\n    def __eq__(self, other):\n        \"\"\"Two Registers are the same if they are of the same type\n        (i.e. quantum/classical), and have the same name and size.\n\n        Args:\n            other (Register): other Register\n\n        Returns:\n            bool: are self and other equal.\n        \"\"\"\n        res = False\n        if type(self) is type(other) and \\\n                self.name == other.name and \\\n                self.size == other.size:\n            res = True\n        return res\n\n    def __hash__(self):\n        \"\"\"Make object hashable, based on the name and size to hash.\"\"\"\n        return hash((type(self), self.name, self.size))\n", "path": "qiskit/circuit/register.py"}]}