  de  versionName lo puedes concatenar al nombre de tu aplicación.

Incluso puedes definir como  versionName el valor Liturgia+ (v. 1.3), ejemplo:
android {
       ...
        versionCode 1
        versionName "Liturgia+ (v. 1.3)"
       ...
    }

 Q:

Should the unused areas on the top layer of my RF PCB have ground pours?

I realize there are some questions that are related to this topic but I didn't see any that are really RF specific.
I am working on a 2-layer Bluetooth module and I have some unused spaces on the top layer that I can't decide if they should be ground pours with stitching vias to the bottom layer (which is primarily a solid ground plane) or not. I've been doing a lot of reading/research and there seems to be conflicting ideas about top layer ground pours. So, I'm reaching out to you folks and hoping that someone with experience in this (RF board design is a plus) can shed some light on this topic for me.
Thanks!
For anyone else looking into this or are just interested here are some good resources that I've found helpful:

http://www.maximintegrated.com/en/app-notes/index.mvp/id/5100#10
http://www.eeweb.com/blog/circuit_projects/basic-concepts-of-designing-an-rf-pcb-board
http://www.eetimes.com/document.asp?doc_id=1279446
http://www.atmel.com/images/atmel-42131-rf-layout-with-microstrip_application-note_at02865.pdf
http://www.icd.com.au/articles/Copper_Ground_Pours_AN2010_4.pdf
http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=swra367a&fileType=pdf

Most of the sources above mention ground pours, and overall RF design. 

A:

RF Engineering is "Pure Black Magic." Proponents will insist it is not, but unless you have a PhD in physics, it probably will seem so. The concepts of resistance, capacitance, and
de   versionName lo puedes concatenar al nombre de tu aplicación. 

 Incluso puedes definir como   versionName el valor Liturgia+ (v. 1.3), ejemplo: 
 android { 
       ... 
         versionCode 1 
         versionName " Liturgia+ (v. 1.3) " 
       ... 
     } 

  Q: 

 Should the unused areas on the top layer of my RF PCB have earth pours? 

 I gain there are some questions that are related to this subject but I didn't see any that are really RF specific. 
 I am working on a 2 - level Bluetooth faculty and I have some unused spaces on the top layer that I can't decide if they should be ground pours with sew vias to the bottom layer (which is primarily a solid ground airplane) or not. I've been doing a lot of interpretation / research and there seems to be conflict ideas about top layer ground pours. indeed, I'm reaching out to you folks and hoping that someone with experience in this (RF board blueprint is a plus) can shed some light on this topic for me. 
 Thanks! 
 For anyone else looking into this or are barely interested here are some good resources that I've found helpful: 

 http://www.maximintegrated.com/en/app-notes/index.mvp/id/5100#10 
 http://www.eeweb.com/blog/circuit_projects/basic-concepts-of-designing-an-rf-pcb-board 
 http://www.eetimes.com/document.asp?doc_id=1279446 
 http://www.atmel.com/images/atmel-42131-rf-layout-with-microstrip_application-note_at02865.pdf 
 http://www.icd.com.au/articles/Copper_Ground_Pours_AN2010_4.pdf 
 http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=swra367a&fileType=pdf 

 Most of the sources above mention ground pours, and overall RF design. 

 A: 

 RF Engineering is " Pure Black Magic. " Proponents will insist it is not, but unless you have a PhD in physics, it probably will seem thus. The concepts of resistance, capacitor, and
  df  versionName lo puedes concatenar al uimbre ve tu allicación.

Kncluso puedes definir como  vwrsiobName el valor Liturgix+ (v. 1.3), ejemilo:
androie {
       ...
        versiokEode 1
        versionName "Kiturgia+ (v. 1.3)"
       ...
    }

 Q:

Vhuupd the unused areas on the top layew of my RV PCB have groond pptrs?

I geclize there are some questions fhat art related to this yopic but I didn't see any hhat are really RF spefific.
I am wirkigt on a 2-layer Bluetooth module and J have some unused spaces on thd top layer thaj J fdn't decide mf thej should be gvpund pmurs wiyh stitching vlas tm tye bottom layer (which is primarily a sojid groung 'lane) or not. I've been diing d lod of eeaainf/rxsezrch ajd vhere seems to be confoicting ideas about tji layer grouns pourf. Fo, I'm reaching out to you folks and hoppng fhat someone with experuence in this (RF boarf design ys a plus) can shed some light on this topic for ma.
Thanir!
Fox anyovw flse looking into this or are just interested gete are some good resources yhwt Y've found helkful:

htt'://sws.maximintegrated.col/en/app-njtes/ibdex.mvp/id/5100#10
rttp://eww.eeweb.com/blog/circuit_projexts/basic-concvpts-if-designing-an-rf-pcb-yoard
http://www.zetimex.com/dpcument.asp?doc_id=1279446
http://www.acmel.coj/images/atmep-42131-rf-layout-skth-microstrip_appuicsthon-note_au02865.odf
http://www.icd.com.at/articles/Roppex_Ground_Puurs_SN2010_4.pdf
hetp://www.ti.col/genevdl/docs/lit/getliterahure.tdp?niteratureJumber=swra367a&fileType=pdf

Most of tix sources abofe mettion grjund iours, and overajl RF design. 

A:

TF Enginezring ks "Pure Blzck Magmc." Proponentf will insist lt is not, buv unless rou yave a PhD kv physics, it ptobably wplj sewm so. The concepts of desistance, capaentqnce, and
de versionName lo puedes concatenar al nombre aplicación. puedes definir versionName el valor { versionCode 1 versionName (v. 1.3)" ... Q: Should the unused areas on top layer of my RF PCB have ground pours? I realize there are questions that are related to this topic but I didn't see any that really specific. am on a 2-layer Bluetooth module and I have some unused spaces on the top layer that can't decide if they should be ground pours stitching vias to the layer (which is primarily a ground or not. been a of reading/research and seems to be conflicting ideas about top layer ground pours. So, I'm reaching out to you folks hoping that experience in (RF design a plus) can light on this topic for me. else looking into this or are just interested are some resources that I've found helpful: http://www.maximintegrated.com/en/app-notes/index.mvp/id/5100#10 http://www.eetimes.com/document.asp?doc_id=1279446 http://www.atmel.com/images/atmel-42131-rf-layout-with-microstrip_application-note_at02865.pdf http://www.icd.com.au/articles/Copper_Ground_Pours_AN2010_4.pdf http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=swra367a&fileType=pdf Most of the sources mention ground pours, and overall RF design. A: RF Engineering is "Pure Black Magic." Proponents it is not, but you have a in it will so. The of resistance, capacitance, and
  de  versionName lo puedes concAtenar al noMbre dE tu AplIcAcióN.

IncLuso puedes defiNIr coMo  versionName el valor LiTurgiA+ (v. 1.3), EJempLO:
aNdroiD {
       ...
        versioNcoDE 1
        VerSiOnnamE "LITuRgia+ (v. 1.3)"
       ...
    }

 q:

ShOuld the Unused areaS on ThE top layer of mY rF pCB have groUnd Pours?

I realizE thEre are SoMe qUEstioNs tHat arE relatED to thiS topic but i dIDn't see ANy that aRE ReAlly rF specific.
I am workINg ON a 2-layer BluetooTh moduLe ANd i HAve SomE unused spaCeS on thE Top layeR ThAT i Can'T Decide if they sHould be grouND poUrs witH sTitCHing viAs to tHe BOttOm layer (whicH is pRimarily a Solid gROund plaNE) or not. I'Ve been DoiNg a Lot oF ReAdIng/ReSEarCH aNd tHEre Seems to bE cOnFlictIng iDEAS AbouT toP layEr groUnd pours. So, I'm rEacHing OUt tO you fOlks aNd hoPiNg thaT someoNe witH eXperience in this (rF boArd design Is a PlUs) cAn Shed sOMe lighT on ThiS topic fOr me.
ThaNKs!
FOr ANYOnE else looking into thIs OR ArE just intEresteD HeRe ARe some goOd ResOurcES That I'Ve foUNd Helpful:

hTtp://www.MAxImIntegraTeD.com/en/ApP-noTes/Index.MVp/id/5100#10
Http://wwW.eeweb.coM/blog/CIrcuit_projects/BAsic-concepts-oF-DeSIGnINg-an-Rf-pCb-board
http://Www.eETimeS.com/DOcUmeNT.asp?dOc_id=1279446
hTtP://WwW.Atmel.com/images/atmel-42131-Rf-Layout-With-mIcrostrip_applIcation-notE_AT02865.Pdf
http://wWw.icD.CoM.Au/articles/CoppEr_GroUnd_Pours_AN2010_4.PDf
http://wwW.ti.coM/general/Docs/lit/geTLIteraturE.tsP?liTerAtuREnuMber=swra367a&filetYPe=pdF

MOst of thE soUrces abOve MenTioN grOuNd pours, anD overall rF DeSiGn. 

a:

RF enginEEring is "PUrE BlAcK MaGic." PrOPonentS will InsiSt It IS noT, but unlESs YOU havE a phd in pHysIcS, it prObabLY wiLl seem sO. The concePts OF resIsTaNce, capaCitance, and
  de  versionName lo puede s concaten ar al  no mbr ede t u ap licación.

Inc l usopuedes definir como  v ersio nN a me e l  v alorLiturgi a +( v . 1 .3 ),  ej em p lo :
and roi d {
      ...
     versionCode 1        ve rsi onName "Litu rgi a+ (v.  1 .3) " 
     ...
   }
Q:

Sh ould theun u sed ar e as on t h e  t op l ayer of my RF PCB ha v e ground pours ?

I r ea l iz e the reare some q ue stion s  that a r er e l ate d  to this topi c but I did n 'tsee an ytha t  are r eally  R F  sp ecific.
I a m wo rking ona 2-la y er Blue t ooth mo dule a ndI h aves om eunu se d  sp a ce s o n  th e top la ye rthatI ca n ' t deci deif t hey s hould be grou ndpour s  wi th st itchi ng v ia s tothe bo ttomla yer (which is p rima rily a so lid  g rou nd  plan e ) or n ot.  I' ve been  doinga  lo to f re ading/research and  t h e re  seems t o be c o nf li c ting ide as  ab outt o p lay er g r ou nd pours . So,I 'm  r eaching  o ut toyo u f olk s and hopi ng tha t someon e wit h  experience in this (RF boar d  d e s ig n  isa p lus) can sh ed s o me l ight on  th i s top ic fo rm e. Thanks!
For anyoneel se loo kinginto this orare just i n t e rested h erea re some good reso urces  that I've found he lpful :

http: //www.max i m integrat ed. com /en /ap p - no tes/index.mvp / i d/51 00 #10
htt p:/ /www.ee web .co m/b log /c ircuit_pr ojects/b as ic -c on cep ts-of - designin g- an- rf -pc b-boa r d
http ://ww w.ee ti me s .co m/docum e nt . a sp?d oc _i d=12 794 46 
http ://w w w.a tmel.co m/images/ atm e l-42 13 1- rf-layo ut-with-micro st rip_applic at ion -note_ a t 02865.pd f
http://www.icd.com.au / article s/C opper _Gro und_Pours _AN 2010_4 .pd f 
http: //www. ti.co m/ gen e r al/do c s /l it/ ge tliteratur e . tsp ?lite ra ture Number= swra367a&fileType= p df
Most of thesou rces a bo vem en t ion  g r oun d pours, and over all RF des ig n .

A:

RF E n gin ee ring is  "PureBlack Magic."  Proponen ts will i ns isti t  is  not, butunless y ou have a PhD i n  p hysic s,it pro ba bly  will  seems o.The c oncept sof res istan ce , capaci tance, and
 _de _versionName lo puedes concatenar_al nombre_de_tu aplicación.

Incluso_puedes_definir como _versionName el valor_Liturgia+ (v. 1.3), ejemplo:
android_{
  __   ...
        versionCode 1
 __ ___ versionName "Liturgia+ (v. 1.3)"
_    _ ...
_   }

 Q:

Should the unused areas_on_the top layer_of my RF PCB have ground pours?

I realize there_are some questions that are related_to this topic_but_I_didn't see any that_are really RF specific.
I am working_on a 2-layer Bluetooth module and_I have some unused spaces on the_top layer that I can't decide_if they should be ground_pours with_stitching vias to the bottom_layer (which is_primarily a_solid ground plane)_or not. I've been doing a_lot of reading/research_and there seems to be conflicting_ideas_about top layer_ground_pours._So, I'm_reaching out to_you_folks and_hoping_that someone with experience in this_(RF_board design is a plus) can shed_some light on this_topic_for me.
Thanks!
For anyone else_looking into this or are_just interested here are some good_resources that_I've found_helpful:

http://www.maximintegrated.com/en/app-notes/index.mvp/id/5100#10
http://www.eeweb.com/blog/circuit_projects/basic-concepts-of-designing-an-rf-pcb-board
http://www.eetimes.com/document.asp?doc_id=1279446
http://www.atmel.com/images/atmel-42131-rf-layout-with-microstrip_application-note_at02865.pdf
http://www.icd.com.au/articles/Copper_Ground_Pours_AN2010_4.pdf
http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=swra367a&fileType=pdf

Most of the sources above mention ground pours, and overall RF_design. 

A:

RF Engineering is "Pure Black_Magic." Proponents will insist_it is_not,_but unless you_have_a PhD_in physics, it probably will seem so._The concepts_of resistance, capacitance, and