Simplified process of fabrication of a CMOS inverter on p-type substrate in semiconductor microfabrication. Note: Gate, source and drain contacts are not normally in the same plane in real devices, and the diagram can be scale.
<a href="//commons.wikimedia.org/wiki/User:%D0%94.%D0%98%D0%BB%D1%8C%D0%B8%D0%BD" title="User:Д.Ильин">Д.Ильин</a>: translation
<a href="//commons.wikimedia.org/wiki/File:CMOS_fabrication_process.svg" title="File:CMOS fabrication process.svg">File:CMOS fabrication process.svg</a> by <a href="//commons.wikimedia.org/wiki/User:Cmglee" title="User:Cmglee">Cmglee</a>