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static int ogg_restore(AVFormatContext *s, int discard) { struct ogg *ogg = s->priv_data; AVIOContext *bc = s->pb; struct ogg_state *ost = ogg->state; int i; if (!ost) return 0; ogg->state = ost->next; if (!discard){ for (i = 0; i < ogg->nstreams; i++) av_free (ogg->streams[i].buf); avio_seek (bc, ost->pos, SEEK_SET); ogg->curidx = ost->curidx; ogg->nstreams = ost->nstreams; memcpy(ogg->streams, ost->streams, ost->nstreams * sizeof(*ogg->streams)); } av_free (ost); return 0; }
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rdt_free_context (PayloadContext *rdt) { int i; for (i = 0; i < MAX_STREAMS; i++) if (rdt->rmst[i]) { ff_rm_free_rmstream(rdt->rmst[i]); av_freep(&rdt->rmst[i]); } if (rdt->rmctx) av_close_input_stream(rdt->rmctx); av_freep(&rdt->mlti_data); av_free(rdt); }
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static inline void RENAME(yuvPlanartoyuy2)(const uint8_t *ysrc, const uint8_t *usrc, const uint8_t *vsrc, uint8_t *dst, long width, long height, long lumStride, long chromStride, long dstStride, long vertLumPerChroma) { long y; const long chromWidth= width>>1; for(y=0; y<height; y++) { #ifdef HAVE_MMX //FIXME handle 2 lines a once (fewer prefetch, reuse some chrom, but very likely limited by mem anyway) asm volatile( "xor %%"REG_a", %%"REG_a" \n\t" ASMALIGN(4) "1: \n\t" PREFETCH" 32(%1, %%"REG_a", 2) \n\t" PREFETCH" 32(%2, %%"REG_a") \n\t" PREFETCH" 32(%3, %%"REG_a") \n\t" "movq (%2, %%"REG_a"), %%mm0 \n\t" // U(0) "movq %%mm0, %%mm2 \n\t" // U(0) "movq (%3, %%"REG_a"), %%mm1 \n\t" // V(0) "punpcklbw %%mm1, %%mm0 \n\t" // UVUV UVUV(0) "punpckhbw %%mm1, %%mm2 \n\t" // UVUV UVUV(8) "movq (%1, %%"REG_a",2), %%mm3 \n\t" // Y(0) "movq 8(%1, %%"REG_a",2), %%mm5 \n\t" // Y(8) "movq %%mm3, %%mm4 \n\t" // Y(0) "movq %%mm5, %%mm6 \n\t" // Y(8) "punpcklbw %%mm0, %%mm3 \n\t" // YUYV YUYV(0) "punpckhbw %%mm0, %%mm4 \n\t" // YUYV YUYV(4) "punpcklbw %%mm2, %%mm5 \n\t" // YUYV YUYV(8) "punpckhbw %%mm2, %%mm6 \n\t" // YUYV YUYV(12) MOVNTQ" %%mm3, (%0, %%"REG_a", 4)\n\t" MOVNTQ" %%mm4, 8(%0, %%"REG_a", 4)\n\t" MOVNTQ" %%mm5, 16(%0, %%"REG_a", 4)\n\t" MOVNTQ" %%mm6, 24(%0, %%"REG_a", 4)\n\t" "add $8, %%"REG_a" \n\t" "cmp %4, %%"REG_a" \n\t" " jb 1b \n\t" ::"r"(dst), "r"(ysrc), "r"(usrc), "r"(vsrc), "g" (chromWidth) : "%"REG_a ); #else #if defined ARCH_ALPHA && defined HAVE_MVI #define pl2yuy2(n) \ y1 = yc[n]; \ y2 = yc2[n]; \ u = uc[n]; \ v = vc[n]; \ asm("unpkbw %1, %0" : "=r"(y1) : "r"(y1)); \ asm("unpkbw %1, %0" : "=r"(y2) : "r"(y2)); \ asm("unpkbl %1, %0" : "=r"(u) : "r"(u)); \ asm("unpkbl %1, %0" : "=r"(v) : "r"(v)); \ yuv1 = (u << 8) + (v << 24); \ yuv2 = yuv1 + y2; \ yuv1 += y1; \ qdst[n] = yuv1; \ qdst2[n] = yuv2; int i; uint64_t *qdst = (uint64_t *) dst; uint64_t *qdst2 = (uint64_t *) (dst + dstStride); const uint32_t *yc = (uint32_t *) ysrc; const uint32_t *yc2 = (uint32_t *) (ysrc + lumStride); const uint16_t *uc = (uint16_t*) usrc, *vc = (uint16_t*) vsrc; for(i = 0; i < chromWidth; i += 8){ uint64_t y1, y2, yuv1, yuv2; uint64_t u, v; /* Prefetch */ asm("ldq $31,64(%0)" :: "r"(yc)); asm("ldq $31,64(%0)" :: "r"(yc2)); asm("ldq $31,64(%0)" :: "r"(uc)); asm("ldq $31,64(%0)" :: "r"(vc)); pl2yuy2(0); pl2yuy2(1); pl2yuy2(2); pl2yuy2(3); yc += 4; yc2 += 4; uc += 4; vc += 4; qdst += 4; qdst2 += 4; } y++; ysrc += lumStride; dst += dstStride; #elif __WORDSIZE >= 64 int i; uint64_t *ldst = (uint64_t *) dst; const uint8_t *yc = ysrc, *uc = usrc, *vc = vsrc; for(i = 0; i < chromWidth; i += 2){ uint64_t k, l; k = yc[0] + (uc[0] << 8) + (yc[1] << 16) + (vc[0] << 24); l = yc[2] + (uc[1] << 8) + (yc[3] << 16) + (vc[1] << 24); *ldst++ = k + (l << 32); yc += 4; uc += 2; vc += 2; } #else int i, *idst = (int32_t *) dst; const uint8_t *yc = ysrc, *uc = usrc, *vc = vsrc; for(i = 0; i < chromWidth; i++){ #ifdef WORDS_BIGENDIAN *idst++ = (yc[0] << 24)+ (uc[0] << 16) + (yc[1] << 8) + (vc[0] << 0); #else *idst++ = yc[0] + (uc[0] << 8) + (yc[1] << 16) + (vc[0] << 24); #endif yc += 2; uc++; vc++; } #endif #endif if((y&(vertLumPerChroma-1))==(vertLumPerChroma-1) ) { usrc += chromStride; vsrc += chromStride; } ysrc += lumStride; dst += dstStride; } #ifdef HAVE_MMX asm( EMMS" \n\t" SFENCE" \n\t" :::"memory"); #endif }
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void visit_start_struct(Visitor *v, void **obj, const char *kind, const char *name, size_t size, Error **errp) { if (!error_is_set(errp)) { v->start_struct(v, obj, kind, name, size, errp); } }
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static int encode_nals(AVCodecContext *ctx, uint8_t *buf, int size, x264_nal_t *nals, int nnal, int skip_sei) { X264Context *x4 = ctx->priv_data; uint8_t *p = buf; int i; /* Write the SEI as part of the first frame. */ if (x4->sei_size > 0 && nnal > 0) { if (x4->sei_size > size) { return -1; memcpy(p, x4->sei, x4->sei_size); p += x4->sei_size; x4->sei_size = 0; // why is x4->sei not freed? for (i = 0; i < nnal; i++){ /* Don't put the SEI in extradata. */ if (skip_sei && nals[i].i_type == NAL_SEI) { x4->sei_size = nals[i].i_payload; x4->sei = av_malloc(x4->sei_size); memcpy(x4->sei, nals[i].p_payload, nals[i].i_payload); continue; memcpy(p, nals[i].p_payload, nals[i].i_payload); p += nals[i].i_payload; return p - buf;
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static int copy_stream_props(AVStream *st, AVStream *source_st) { int ret; if (st->codecpar->codec_id || !source_st->codecpar->codec_id) { if (st->codecpar->extradata_size < source_st->codecpar->extradata_size) { if (st->codecpar->extradata) { av_freep(&st->codecpar->extradata); st->codecpar->extradata_size = 0; } ret = ff_alloc_extradata(st->codecpar, source_st->codecpar->extradata_size); if (ret < 0) return ret; } memcpy(st->codecpar->extradata, source_st->codecpar->extradata, source_st->codecpar->extradata_size); return 0; } if ((ret = avcodec_parameters_copy(st->codecpar, source_st->codecpar)) < 0) return ret; st->r_frame_rate = source_st->r_frame_rate; st->avg_frame_rate = source_st->avg_frame_rate; st->time_base = source_st->time_base; st->sample_aspect_ratio = source_st->sample_aspect_ratio; av_dict_copy(&st->metadata, source_st->metadata, 0); return 0; }
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aio_ctx_finalize(GSource *source) { AioContext *ctx = (AioContext *) source; thread_pool_free(ctx->thread_pool); aio_set_event_notifier(ctx, &ctx->notifier, NULL); event_notifier_cleanup(&ctx->notifier); rfifolock_destroy(&ctx->lock); qemu_mutex_destroy(&ctx->bh_lock); timerlistgroup_deinit(&ctx->tlg);
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void gen_intermediate_code_internal(LM32CPU *cpu, TranslationBlock *tb, bool search_pc) { CPUState *cs = CPU(cpu); CPULM32State *env = &cpu->env; struct DisasContext ctx, *dc = &ctx; uint16_t *gen_opc_end; uint32_t pc_start; int j, lj; uint32_t next_page_start; int num_insns; int max_insns; pc_start = tb->pc; dc->env = env; dc->tb = tb; gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = cs->singlestep_enabled; dc->nr_nops = 0; if (pc_start & 3) { cpu_abort(env, "LM32: unaligned PC=%x\n", pc_start); } next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; lj = -1; num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; if (max_insns == 0) { max_insns = CF_COUNT_MASK; } gen_tb_start(); do { check_breakpoint(env, dc); if (search_pc) { j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; if (lj < j) { lj++; while (lj < j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; } } tcg_ctx.gen_opc_pc[lj] = dc->pc; tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } /* Pretty disas. */ LOG_DIS("%8.8x:\t", dc->pc); if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); } decode(dc, cpu_ldl_code(env, dc->pc)); dc->pc += 4; num_insns++; } while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end && !cs->singlestep_enabled && !singlestep && (dc->pc < next_page_start) && num_insns < max_insns); if (tb->cflags & CF_LAST_IO) { gen_io_end(); } if (unlikely(cs->singlestep_enabled)) { if (dc->is_jmp == DISAS_NEXT) { tcg_gen_movi_tl(cpu_pc, dc->pc); } t_gen_raise_exception(dc, EXCP_DEBUG); } else { switch (dc->is_jmp) { case DISAS_NEXT: gen_goto_tb(dc, 1, dc->pc); break; default: case DISAS_JUMP: case DISAS_UPDATE: /* indicate that the hash table must be used to find the next TB */ tcg_gen_exit_tb(0); break; case DISAS_TB_JUMP: /* nothing more to generate */ break; } } gen_tb_end(tb, num_insns); *tcg_ctx.gen_opc_ptr = INDEX_op_end; if (search_pc) { j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; } } else { tb->size = dc->pc - pc_start; tb->icount = num_insns; } #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("\n"); log_target_disas(env, pc_start, dc->pc - pc_start, 0); qemu_log("\nisize=%d osize=%td\n", dc->pc - pc_start, tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf); } #endif }
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static int parse_keyframes_index(AVFormatContext *s, AVIOContext *ioc, AVStream *vstream, int64_t max_pos) { unsigned int arraylen = 0, timeslen = 0, fileposlen = 0, i; double num_val; char str_val[256]; int64_t *times = NULL; int64_t *filepositions = NULL; int ret = AVERROR(ENOSYS); int64_t initial_pos = avio_tell(ioc); AVDictionaryEntry *creator = av_dict_get(s->metadata, "metadatacreator", NULL, 0); if (creator && !strcmp(creator->value, "MEGA")) { /* Files with this metadatacreator tag seem to have filepositions * pointing at the 4 trailer bytes of the previous packet, * which isn't the norm (nor what we expect here, nor what * jwplayer + lighttpd expect, nor what flvtool2 produces). * Just ignore the index in this case, instead of risking trying * to adjust it to something that might or might not work. */ return 0; } while (avio_tell(ioc) < max_pos - 2 && amf_get_string(ioc, str_val, sizeof(str_val)) > 0) { int64_t* current_array; // Expect array object in context if (avio_r8(ioc) != AMF_DATA_TYPE_ARRAY) break; arraylen = avio_rb32(ioc); /* * Expect only 'times' or 'filepositions' sub-arrays in other case refuse to use such metadata * for indexing */ if (!strcmp(KEYFRAMES_TIMESTAMP_TAG, str_val) && !times) { if (!(times = av_mallocz(sizeof(*times) * arraylen))) { ret = AVERROR(ENOMEM); goto finish; } timeslen = arraylen; current_array = times; } else if (!strcmp(KEYFRAMES_BYTEOFFSET_TAG, str_val) && !filepositions) { if (!(filepositions = av_mallocz(sizeof(*filepositions) * arraylen))) { ret = AVERROR(ENOMEM); goto finish; } fileposlen = arraylen; current_array = filepositions; } else // unexpected metatag inside keyframes, will not use such metadata for indexing break; for (i = 0; i < arraylen && avio_tell(ioc) < max_pos - 1; i++) { if (avio_r8(ioc) != AMF_DATA_TYPE_NUMBER) goto finish; num_val = av_int2dbl(avio_rb64(ioc)); current_array[i] = num_val; } if (times && filepositions) { // All done, exiting at a position allowing amf_parse_object // to finish parsing the object ret = 0; break; } } if (timeslen == fileposlen) for(i = 0; i < arraylen; i++) av_add_index_entry(vstream, filepositions[i], times[i]*1000, 0, 0, AVINDEX_KEYFRAME); else av_log(s, AV_LOG_WARNING, "Invalid keyframes object, skipping.\n"); finish: av_freep(&times); av_freep(&filepositions); // If we got unexpected data, but successfully reset back to // the start pos, the caller can continue parsing if (ret < 0 && avio_seek(ioc, initial_pos, SEEK_SET) > 0) return 0; return ret; }
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static void via_ide_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); k->init = vt82c686b_ide_initfn; k->exit = vt82c686b_ide_exitfn; k->vendor_id = PCI_VENDOR_ID_VIA; k->device_id = PCI_DEVICE_ID_VIA_IDE; k->revision = 0x06; k->class_id = PCI_CLASS_STORAGE_IDE; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); dc->no_user = 1; }
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static void vc1_extract_headers(AVCodecParserContext *s, AVCodecContext *avctx, const uint8_t *buf, int buf_size) { VC1ParseContext *vpc = s->priv_data; GetBitContext gb; const uint8_t *start, *end, *next; uint8_t *buf2 = av_mallocz(buf_size + FF_INPUT_BUFFER_PADDING_SIZE); vpc->v.s.avctx = avctx; vpc->v.parse_only = 1; vpc->v.first_pic_header_flag = 1; next = buf; s->repeat_pict = 0; for(start = buf, end = buf + buf_size; next < end; start = next){ int buf2_size, size; next = find_next_marker(start + 4, end); size = next - start - 4; buf2_size = vc1_unescape_buffer(start + 4, size, buf2); init_get_bits(&gb, buf2, buf2_size * 8); if(size <= 0) continue; switch(AV_RB32(start)){ case VC1_CODE_SEQHDR: ff_vc1_decode_sequence_header(avctx, &vpc->v, &gb); break; case VC1_CODE_ENTRYPOINT: ff_vc1_decode_entry_point(avctx, &vpc->v, &gb); break; case VC1_CODE_FRAME: if(vpc->v.profile < PROFILE_ADVANCED) ff_vc1_parse_frame_header (&vpc->v, &gb); else ff_vc1_parse_frame_header_adv(&vpc->v, &gb); /* keep AV_PICTURE_TYPE_BI internal to VC1 */ if (vpc->v.s.pict_type == AV_PICTURE_TYPE_BI) s->pict_type = AV_PICTURE_TYPE_B; else s->pict_type = vpc->v.s.pict_type; if (avctx->ticks_per_frame > 1){ // process pulldown flags s->repeat_pict = 1; // Pulldown flags are only valid when 'broadcast' has been set. // So ticks_per_frame will be 2 if (vpc->v.rff){ // repeat field s->repeat_pict = 2; }else if (vpc->v.rptfrm){ // repeat frames s->repeat_pict = vpc->v.rptfrm * 2 + 1; } } if (vpc->v.broadcast && vpc->v.interlace && !vpc->v.psf) s->field_order = vpc->v.tff ? AV_FIELD_TT : AV_FIELD_BB; else s->field_order = AV_FIELD_PROGRESSIVE; break; } } av_free(buf2); }
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int ff_jpeg2000_init_component(Jpeg2000Component *comp, Jpeg2000CodingStyle *codsty, Jpeg2000QuantStyle *qntsty, int cbps, int dx, int dy, AVCodecContext *avctx) { int reslevelno, bandno, gbandno = 0, ret, i, j; uint32_t csize; if (codsty->nreslevels2decode <= 0) { av_log(avctx, AV_LOG_ERROR, "nreslevels2decode %d invalid or uninitialized\n", codsty->nreslevels2decode); return AVERROR_INVALIDDATA; } if (ret = ff_jpeg2000_dwt_init(&comp->dwt, comp->coord, codsty->nreslevels2decode - 1, codsty->transform)) return ret; if (av_image_check_size(comp->coord[0][1] - comp->coord[0][0], comp->coord[1][1] - comp->coord[1][0], 0, avctx)) return AVERROR_INVALIDDATA; csize = (comp->coord[0][1] - comp->coord[0][0]) * (comp->coord[1][1] - comp->coord[1][0]); if (comp->coord[0][1] - comp->coord[0][0] > 32768 || comp->coord[1][1] - comp->coord[1][0] > 32768) { av_log(avctx, AV_LOG_ERROR, "component size too large\n"); return AVERROR_PATCHWELCOME; } if (codsty->transform == FF_DWT97) { csize += AV_INPUT_BUFFER_PADDING_SIZE / sizeof(*comp->f_data); comp->i_data = NULL; comp->f_data = av_mallocz_array(csize, sizeof(*comp->f_data)); if (!comp->f_data) } else { csize += AV_INPUT_BUFFER_PADDING_SIZE / sizeof(*comp->i_data); comp->f_data = NULL; comp->i_data = av_mallocz_array(csize, sizeof(*comp->i_data)); if (!comp->i_data) } comp->reslevel = av_mallocz_array(codsty->nreslevels, sizeof(*comp->reslevel)); if (!comp->reslevel) /* LOOP on resolution levels */ for (reslevelno = 0; reslevelno < codsty->nreslevels; reslevelno++) { int declvl = codsty->nreslevels - reslevelno; // N_L -r see ISO/IEC 15444-1:2002 B.5 Jpeg2000ResLevel *reslevel = comp->reslevel + reslevelno; /* Compute borders for each resolution level. * Computation of trx_0, trx_1, try_0 and try_1. * see ISO/IEC 15444-1:2002 eq. B.5 and B-14 */ for (i = 0; i < 2; i++) for (j = 0; j < 2; j++) reslevel->coord[i][j] = ff_jpeg2000_ceildivpow2(comp->coord_o[i][j], declvl - 1); // update precincts size: 2^n value reslevel->log2_prec_width = codsty->log2_prec_widths[reslevelno]; reslevel->log2_prec_height = codsty->log2_prec_heights[reslevelno]; if (!reslevel->log2_prec_width || !reslevel->log2_prec_height) { return AVERROR_INVALIDDATA; } /* Number of bands for each resolution level */ if (reslevelno == 0) reslevel->nbands = 1; else reslevel->nbands = 3; /* Number of precincts which span the tile for resolution level reslevelno * see B.6 in ISO/IEC 15444-1:2002 eq. B-16 * num_precincts_x = |- trx_1 / 2 ^ log2_prec_width) -| - (trx_0 / 2 ^ log2_prec_width) * num_precincts_y = |- try_1 / 2 ^ log2_prec_width) -| - (try_0 / 2 ^ log2_prec_width) * for Dcinema profiles in JPEG 2000 * num_precincts_x = |- trx_1 / 2 ^ log2_prec_width) -| * num_precincts_y = |- try_1 / 2 ^ log2_prec_width) -| */ if (reslevel->coord[0][1] == reslevel->coord[0][0]) reslevel->num_precincts_x = 0; else reslevel->num_precincts_x = ff_jpeg2000_ceildivpow2(reslevel->coord[0][1], reslevel->log2_prec_width) - (reslevel->coord[0][0] >> reslevel->log2_prec_width); if (reslevel->coord[1][1] == reslevel->coord[1][0]) reslevel->num_precincts_y = 0; else reslevel->num_precincts_y = ff_jpeg2000_ceildivpow2(reslevel->coord[1][1], reslevel->log2_prec_height) - (reslevel->coord[1][0] >> reslevel->log2_prec_height); reslevel->band = av_mallocz_array(reslevel->nbands, sizeof(*reslevel->band)); if (!reslevel->band) for (bandno = 0; bandno < reslevel->nbands; bandno++, gbandno++) { ret = init_band(avctx, reslevel, comp, codsty, qntsty, bandno, gbandno, reslevelno, cbps, dx, dy); if (ret < 0) return ret; } } return 0; }
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void vhost_dev_cleanup(struct vhost_dev *hdev) { int i; for (i = 0; i < hdev->nvqs; ++i) { vhost_virtqueue_cleanup(hdev->vqs + i); } memory_listener_unregister(&hdev->memory_listener); if (hdev->migration_blocker) { migrate_del_blocker(hdev->migration_blocker); error_free(hdev->migration_blocker); } g_free(hdev->mem); g_free(hdev->mem_sections); hdev->vhost_ops->vhost_backend_cleanup(hdev); }
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static void test_validate_fail_union_flat_no_discrim(TestInputVisitorData *data, const void *unused) { UserDefFlatUnion2 *tmp = NULL; Error *err = NULL; Visitor *v; /* test situation where discriminator field ('enum1' here) is missing */ v = validate_test_init(data, "{ 'integer': 42, 'string': 'c', 'string1': 'd', 'string2': 'e' }"); visit_type_UserDefFlatUnion2(v, &tmp, NULL, &err); g_assert(err); error_free(err); qapi_free_UserDefFlatUnion2(tmp); }
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static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset) { uint8_t pa_features_206[] = { 6, 0, 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 }; uint8_t pa_features_207[] = { 24, 0, 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 }; uint8_t pa_features_300[] = { 66, 0, /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */ /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */ 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */ /* 6: DS207 */ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ /* 16: Vector */ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 18 - 23 */ /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */ 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */ /* 42: PM, 44: PC RA, 46: SC vec'd */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ /* 48: SIMD, 50: QP BFP, 52: String */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */ /* 54: DecFP, 56: DecI, 58: SHA */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */ /* 60: NM atomic, 62: RNG */ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */ }; uint8_t *pa_features; size_t pa_size; switch (POWERPC_MMU_VER(env->mmu_model)) { case POWERPC_MMU_VER_2_06: pa_features = pa_features_206; pa_size = sizeof(pa_features_206); break; case POWERPC_MMU_VER_2_07: pa_features = pa_features_207; pa_size = sizeof(pa_features_207); break; case POWERPC_MMU_VER_3_00: pa_features = pa_features_300; pa_size = sizeof(pa_features_300); break; default: return; } if (env->ci_large_pages) { /* * Note: we keep CI large pages off by default because a 64K capable * guest provisioned with large pages might otherwise try to map a qemu * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages * even if that qemu runs on a 4k host. * We dd this bit back here if we are confident this is not an issue */ pa_features[3] |= 0x20; } if (kvmppc_has_cap_htm() && pa_size > 24) { pa_features[24] |= 0x80; /* Transactional memory support */ } _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size))); }
3,688
1
static void thread_pool_co_cb(void *opaque, int ret) { ThreadPoolCo *co = opaque; co->ret = ret; qemu_coroutine_enter(co->co, NULL); }
3,689
1
static void pc_dimm_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { int slot; HotplugHandlerClass *hhc; Error *local_err = NULL; PCMachineState *pcms = PC_MACHINE(hotplug_dev); MachineState *machine = MACHINE(hotplug_dev); PCDIMMDevice *dimm = PC_DIMM(dev); PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); MemoryRegion *mr = ddc->get_memory_region(dimm); uint64_t addr = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP, &local_err); if (local_err) { addr = pc_dimm_get_free_addr(pcms->hotplug_memory_base, memory_region_size(&pcms->hotplug_memory), !addr ? NULL : &addr, memory_region_size(mr), &local_err); if (local_err) { object_property_set_int(OBJECT(dev), addr, PC_DIMM_ADDR_PROP, &local_err); if (local_err) { trace_mhp_pc_dimm_assigned_address(addr); slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, &local_err); if (local_err) { slot = pc_dimm_get_free_slot(slot == PC_DIMM_UNASSIGNED_SLOT ? NULL : &slot, machine->ram_slots, &local_err); if (local_err) { object_property_set_int(OBJECT(dev), slot, PC_DIMM_SLOT_PROP, &local_err); if (local_err) { trace_mhp_pc_dimm_assigned_slot(slot); if (!pcms->acpi_dev) { error_setg(&local_err, "memory hotplug is not enabled: missing acpi device"); memory_region_add_subregion(&pcms->hotplug_memory, addr - pcms->hotplug_memory_base, mr); vmstate_register_ram(mr, dev); hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); hhc->plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); out: error_propagate(errp, local_err);
3,692
1
int bdrv_aio_multiwrite(BlockDriverState *bs, BlockRequest *reqs, int num_reqs) { BlockDriverAIOCB *acb; MultiwriteCB *mcb; int i; if (num_reqs == 0) { return 0; } // Create MultiwriteCB structure mcb = qemu_mallocz(sizeof(*mcb) + num_reqs * sizeof(*mcb->callbacks)); mcb->num_requests = 0; mcb->num_callbacks = num_reqs; for (i = 0; i < num_reqs; i++) { mcb->callbacks[i].cb = reqs[i].cb; mcb->callbacks[i].opaque = reqs[i].opaque; } // Check for mergable requests num_reqs = multiwrite_merge(bs, reqs, num_reqs, mcb); // Run the aio requests for (i = 0; i < num_reqs; i++) { acb = bdrv_aio_writev(bs, reqs[i].sector, reqs[i].qiov, reqs[i].nb_sectors, multiwrite_cb, mcb); if (acb == NULL) { // We can only fail the whole thing if no request has been // submitted yet. Otherwise we'll wait for the submitted AIOs to // complete and report the error in the callback. if (mcb->num_requests == 0) { reqs[i].error = -EIO; goto fail; } else { mcb->error = -EIO; break; } } else { mcb->num_requests++; } } return 0; fail: free(mcb); return -1; }
3,693
1
static void mov_fix_index(MOVContext *mov, AVStream *st) { MOVStreamContext *msc = st->priv_data; AVIndexEntry *e_old = st->index_entries; int nb_old = st->nb_index_entries; const AVIndexEntry *e_old_end = e_old + nb_old; const AVIndexEntry *current = NULL; MOVStts *ctts_data_old = msc->ctts_data; int64_t ctts_index_old = 0; int64_t ctts_sample_old = 0; int64_t ctts_count_old = msc->ctts_count; int64_t edit_list_media_time = 0; int64_t edit_list_duration = 0; int64_t frame_duration = 0; int64_t edit_list_dts_counter = 0; int64_t edit_list_dts_entry_end = 0; int64_t edit_list_start_ctts_sample = 0; int64_t curr_cts; int64_t curr_ctts = 0; int64_t min_corrected_pts = -1; int64_t empty_edits_sum_duration = 0; int64_t edit_list_index = 0; int64_t index; int flags; int64_t start_dts = 0; int64_t edit_list_start_encountered = 0; int64_t search_timestamp = 0; int64_t* frame_duration_buffer = NULL; int num_discarded_begin = 0; int first_non_zero_audio_edit = -1; int packet_skip_samples = 0; MOVIndexRange *current_index_range; int i; int found_keyframe_after_edit = 0; if (!msc->elst_data || msc->elst_count <= 0 || nb_old <= 0) { return; } // allocate the index ranges array msc->index_ranges = av_malloc((msc->elst_count + 1) * sizeof(msc->index_ranges[0])); if (!msc->index_ranges) { av_log(mov->fc, AV_LOG_ERROR, "Cannot allocate index ranges buffer\n"); return; } msc->current_index_range = msc->index_ranges; current_index_range = msc->index_ranges - 1; // Clean AVStream from traces of old index st->index_entries = NULL; st->index_entries_allocated_size = 0; st->nb_index_entries = 0; // Clean ctts fields of MOVStreamContext msc->ctts_data = NULL; msc->ctts_count = 0; msc->ctts_index = 0; msc->ctts_sample = 0; msc->ctts_allocated_size = 0; // If the dts_shift is positive (in case of negative ctts values in mov), // then negate the DTS by dts_shift if (msc->dts_shift > 0) { edit_list_dts_entry_end -= msc->dts_shift; av_log(mov->fc, AV_LOG_DEBUG, "Shifting DTS by %d because of negative CTTS.\n", msc->dts_shift); } start_dts = edit_list_dts_entry_end; while (get_edit_list_entry(mov, msc, edit_list_index, &edit_list_media_time, &edit_list_duration, mov->time_scale)) { av_log(mov->fc, AV_LOG_DEBUG, "Processing st: %d, edit list %"PRId64" - media time: %"PRId64", duration: %"PRId64"\n", st->index, edit_list_index, edit_list_media_time, edit_list_duration); edit_list_index++; edit_list_dts_counter = edit_list_dts_entry_end; edit_list_dts_entry_end += edit_list_duration; num_discarded_begin = 0; if (edit_list_media_time == -1) { empty_edits_sum_duration += edit_list_duration; continue; } // If we encounter a non-negative edit list reset the skip_samples/start_pad fields and set them // according to the edit list below. if (st->codecpar->codec_type == AVMEDIA_TYPE_AUDIO) { if (first_non_zero_audio_edit < 0) { first_non_zero_audio_edit = 1; } else { first_non_zero_audio_edit = 0; } if (first_non_zero_audio_edit > 0) st->skip_samples = msc->start_pad = 0; } // While reordering frame index according to edit list we must handle properly // the scenario when edit list entry starts from none key frame. // We find closest previous key frame and preserve it and consequent frames in index. // All frames which are outside edit list entry time boundaries will be dropped after decoding. search_timestamp = edit_list_media_time; if (st->codecpar->codec_type == AVMEDIA_TYPE_AUDIO) { // Audio decoders like AAC need need a decoder delay samples previous to the current sample, // to correctly decode this frame. Hence for audio we seek to a frame 1 sec. before the // edit_list_media_time to cover the decoder delay. search_timestamp = FFMAX(search_timestamp - msc->time_scale, e_old[0].timestamp); } if (find_prev_closest_index(st, e_old, nb_old, ctts_data_old, ctts_count_old, search_timestamp, 0, &index, &ctts_index_old, &ctts_sample_old) < 0) { av_log(mov->fc, AV_LOG_WARNING, "st: %d edit list: %"PRId64" Missing key frame while searching for timestamp: %"PRId64"\n", st->index, edit_list_index, search_timestamp); if (find_prev_closest_index(st, e_old, nb_old, ctts_data_old, ctts_count_old, search_timestamp, AVSEEK_FLAG_ANY, &index, &ctts_index_old, &ctts_sample_old) < 0) { av_log(mov->fc, AV_LOG_WARNING, "st: %d edit list %"PRId64" Cannot find an index entry before timestamp: %"PRId64".\n", st->index, edit_list_index, search_timestamp); index = 0; ctts_index_old = 0; ctts_sample_old = 0; } } current = e_old + index; edit_list_start_ctts_sample = ctts_sample_old; // Iterate over index and arrange it according to edit list edit_list_start_encountered = 0; found_keyframe_after_edit = 0; for (; current < e_old_end; current++, index++) { // check if frame outside edit list mark it for discard frame_duration = (current + 1 < e_old_end) ? ((current + 1)->timestamp - current->timestamp) : edit_list_duration; flags = current->flags; // frames (pts) before or after edit list curr_cts = current->timestamp + msc->dts_shift; curr_ctts = 0; if (ctts_data_old && ctts_index_old < ctts_count_old) { curr_ctts = ctts_data_old[ctts_index_old].duration; av_log(mov->fc, AV_LOG_DEBUG, "stts: %"PRId64" ctts: %"PRId64", ctts_index: %"PRId64", ctts_count: %"PRId64"\n", curr_cts, curr_ctts, ctts_index_old, ctts_count_old); curr_cts += curr_ctts; ctts_sample_old++; if (ctts_sample_old == ctts_data_old[ctts_index_old].count) { if (add_ctts_entry(&msc->ctts_data, &msc->ctts_count, &msc->ctts_allocated_size, ctts_data_old[ctts_index_old].count - edit_list_start_ctts_sample, ctts_data_old[ctts_index_old].duration) == -1) { av_log(mov->fc, AV_LOG_ERROR, "Cannot add CTTS entry %"PRId64" - {%"PRId64", %d}\n", ctts_index_old, ctts_data_old[ctts_index_old].count - edit_list_start_ctts_sample, ctts_data_old[ctts_index_old].duration); break; } ctts_index_old++; ctts_sample_old = 0; edit_list_start_ctts_sample = 0; } } if (curr_cts < edit_list_media_time || curr_cts >= (edit_list_duration + edit_list_media_time)) { if (st->codecpar->codec_type == AVMEDIA_TYPE_AUDIO && st->codecpar->codec_id != AV_CODEC_ID_VORBIS && curr_cts < edit_list_media_time && curr_cts + frame_duration > edit_list_media_time && first_non_zero_audio_edit > 0) { packet_skip_samples = edit_list_media_time - curr_cts; st->skip_samples += packet_skip_samples; // Shift the index entry timestamp by packet_skip_samples to be correct. edit_list_dts_counter -= packet_skip_samples; if (edit_list_start_encountered == 0) { edit_list_start_encountered = 1; // Make timestamps strictly monotonically increasing for audio, by rewriting timestamps for // discarded packets. if (frame_duration_buffer) { fix_index_entry_timestamps(st, st->nb_index_entries, edit_list_dts_counter, frame_duration_buffer, num_discarded_begin); } } av_log(mov->fc, AV_LOG_DEBUG, "skip %d audio samples from curr_cts: %"PRId64"\n", packet_skip_samples, curr_cts); } else { flags |= AVINDEX_DISCARD_FRAME; av_log(mov->fc, AV_LOG_DEBUG, "drop a frame at curr_cts: %"PRId64" @ %"PRId64"\n", curr_cts, index); if (st->codecpar->codec_type == AVMEDIA_TYPE_AUDIO && edit_list_start_encountered == 0) { num_discarded_begin++; frame_duration_buffer = av_realloc(frame_duration_buffer, num_discarded_begin * sizeof(int64_t)); if (!frame_duration_buffer) { av_log(mov->fc, AV_LOG_ERROR, "Cannot reallocate frame duration buffer\n"); break; } frame_duration_buffer[num_discarded_begin - 1] = frame_duration; // Increment skip_samples for the first non-zero audio edit list if (first_non_zero_audio_edit > 0 && st->codecpar->codec_id != AV_CODEC_ID_VORBIS) { st->skip_samples += frame_duration; } } } } else { if (min_corrected_pts < 0) { min_corrected_pts = edit_list_dts_counter + curr_ctts + msc->dts_shift; } else { min_corrected_pts = FFMIN(min_corrected_pts, edit_list_dts_counter + curr_ctts + msc->dts_shift); } if (edit_list_start_encountered == 0) { edit_list_start_encountered = 1; // Make timestamps strictly monotonically increasing for audio, by rewriting timestamps for // discarded packets. if (st->codecpar->codec_type == AVMEDIA_TYPE_AUDIO && frame_duration_buffer) { fix_index_entry_timestamps(st, st->nb_index_entries, edit_list_dts_counter, frame_duration_buffer, num_discarded_begin); } } } if (add_index_entry(st, current->pos, edit_list_dts_counter, current->size, current->min_distance, flags) == -1) { av_log(mov->fc, AV_LOG_ERROR, "Cannot add index entry\n"); break; } // Update the index ranges array if (current_index_range < msc->index_ranges || index != current_index_range->end) { current_index_range++; current_index_range->start = index; } current_index_range->end = index + 1; // Only start incrementing DTS in frame_duration amounts, when we encounter a frame in edit list. if (edit_list_start_encountered > 0) { edit_list_dts_counter = edit_list_dts_counter + frame_duration; } // Break when found first key frame after edit entry completion if ((curr_cts + frame_duration >= (edit_list_duration + edit_list_media_time)) && ((flags & AVINDEX_KEYFRAME) || ((st->codecpar->codec_type == AVMEDIA_TYPE_AUDIO)))) { if (ctts_data_old) { // If we have CTTS and this is the the first keyframe after edit elist, // wait for one more, because there might be trailing B-frames after this I-frame // that do belong to the edit. if (st->codecpar->codec_type != AVMEDIA_TYPE_AUDIO && found_keyframe_after_edit == 0) { found_keyframe_after_edit = 1; continue; } if (ctts_sample_old != 0) { if (add_ctts_entry(&msc->ctts_data, &msc->ctts_count, &msc->ctts_allocated_size, ctts_sample_old - edit_list_start_ctts_sample, ctts_data_old[ctts_index_old].duration) == -1) { av_log(mov->fc, AV_LOG_ERROR, "Cannot add CTTS entry %"PRId64" - {%"PRId64", %d}\n", ctts_index_old, ctts_sample_old - edit_list_start_ctts_sample, ctts_data_old[ctts_index_old].duration); break; } } } break; } } } // If there are empty edits, then min_corrected_pts might be positive intentionally. So we subtract the // sum duration of emtpy edits here. min_corrected_pts -= empty_edits_sum_duration; // If the minimum pts turns out to be greater than zero after fixing the index, then we subtract the // dts by that amount to make the first pts zero. if (st->codecpar->codec_type == AVMEDIA_TYPE_VIDEO && min_corrected_pts > 0) { av_log(mov->fc, AV_LOG_DEBUG, "Offset DTS by %"PRId64" to make first pts zero.\n", min_corrected_pts); for (i = 0; i < st->nb_index_entries; ++i) { st->index_entries[i].timestamp -= min_corrected_pts; } } // Update av stream length st->duration = edit_list_dts_entry_end - start_dts; msc->start_pad = st->skip_samples; // Free the old index and the old CTTS structures av_free(e_old); av_free(ctts_data_old); // Null terminate the index ranges array current_index_range++; current_index_range->start = 0; current_index_range->end = 0; msc->current_index = msc->index_ranges[0].start; }
3,694
1
int ff_win32_open(const char *filename_utf8, int oflag, int pmode) { int fd; int num_chars; wchar_t *filename_w; /* convert UTF-8 to wide chars */ num_chars = MultiByteToWideChar(CP_UTF8, 0, filename_utf8, -1, NULL, 0); if (num_chars <= 0) return -1; filename_w = av_mallocz(sizeof(wchar_t) * num_chars); MultiByteToWideChar(CP_UTF8, 0, filename_utf8, -1, filename_w, num_chars); fd = _wsopen(filename_w, oflag, SH_DENYNO, pmode); av_freep(&filename_w); /* filename maybe be in CP_ACP */ if (fd == -1 && !(oflag & O_CREAT)) return _sopen(filename_utf8, oflag, SH_DENYNO, pmode); return fd; }
3,695
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static always_inline target_phys_addr_t get_pgaddr (target_phys_addr_t sdr1, int sdr_sh, target_phys_addr_t hash, target_phys_addr_t mask) { return (sdr1 & ((target_ulong)(-1ULL) << sdr_sh)) | (hash & mask); }
3,696
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static void ahci_init_d2h(AHCIDevice *ad) { IDEState *ide_state = &ad->port.ifs[0]; AHCIPortRegs *pr = &ad->port_regs; if (ad->init_d2h_sent) { return; } if (ahci_write_fis_d2h(ad)) { ad->init_d2h_sent = true; /* We're emulating receiving the first Reg H2D Fis from the device; * Update the SIG register, but otherwise proceed as normal. */ pr->sig = (ide_state->hcyl << 24) | (ide_state->lcyl << 16) | (ide_state->sector << 8) | (ide_state->nsector & 0xFF); } }
3,697
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static void acpi_get_pm_info(AcpiPmInfo *pm) { Object *piix = piix4_pm_find(); Object *lpc = ich9_lpc_find(); Object *obj = NULL; QObject *o; pm->pcihp_io_base = 0; pm->pcihp_io_len = 0; if (piix) { obj = piix; pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; pm->pcihp_io_base = object_property_get_int(obj, ACPI_PCIHP_IO_BASE_PROP, NULL); pm->pcihp_io_len = object_property_get_int(obj, ACPI_PCIHP_IO_LEN_PROP, NULL); } if (lpc) { obj = lpc; pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; } assert(obj); pm->cpu_hp_io_len = ACPI_GPE_PROC_LEN; pm->mem_hp_io_base = ACPI_MEMORY_HOTPLUG_BASE; pm->mem_hp_io_len = ACPI_MEMORY_HOTPLUG_IO_LEN; /* Fill in optional s3/s4 related properties */ o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); if (o) { pm->s3_disabled = qint_get_int(qobject_to_qint(o)); } else { pm->s3_disabled = false; } qobject_decref(o); o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL); if (o) { pm->s4_disabled = qint_get_int(qobject_to_qint(o)); } else { pm->s4_disabled = false; } qobject_decref(o); o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL); if (o) { pm->s4_val = qint_get_int(qobject_to_qint(o)); } else { pm->s4_val = false; } qobject_decref(o); /* Fill in mandatory properties */ pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL); pm->acpi_enable_cmd = object_property_get_int(obj, ACPI_PM_PROP_ACPI_ENABLE_CMD, NULL); pm->acpi_disable_cmd = object_property_get_int(obj, ACPI_PM_PROP_ACPI_DISABLE_CMD, NULL); pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE, NULL); pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK, NULL); pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN, NULL); pm->pcihp_bridge_en = object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support", NULL); }
3,699
1
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, qemu_irq irq, int baudbase, CharDriverState *chr, int ioregister) { SerialState *s; int s_io_memory; s = qemu_mallocz(sizeof(SerialState)); if (!s) return NULL; s->irq = irq; s->base = base; s->it_shift = it_shift; s->baudbase= baudbase; s->tx_timer = qemu_new_timer(vm_clock, serial_tx_done, s); if (!s->tx_timer) return NULL; qemu_register_reset(serial_reset, s); serial_reset(s); register_savevm("serial", base, 2, serial_save, serial_load, s); if (ioregister) { s_io_memory = cpu_register_io_memory(0, serial_mm_read, serial_mm_write, s); cpu_register_physical_memory(base, 8 << it_shift, s_io_memory); } s->chr = chr; qemu_chr_add_handlers(chr, serial_can_receive1, serial_receive1, serial_event, s); return s; }
3,700
1
int qemu_opts_foreach(QemuOptsList *list, qemu_opts_loopfunc func, void *opaque, Error **errp) { Location loc; QemuOpts *opts; int rc; loc_push_none(&loc); QTAILQ_FOREACH(opts, &list->head, next) { loc_restore(&opts->loc); rc = func(opaque, opts, errp); if (rc) { return rc; } assert(!errp || !*errp); } loc_pop(&loc); return 0; }
3,701
1
void bitmap_set_atomic(unsigned long *map, long start, long nr) { unsigned long *p = map + BIT_WORD(start); const long size = start + nr; int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG); unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start); /* First word */ if (nr - bits_to_set > 0) { atomic_or(p, mask_to_set); nr -= bits_to_set; bits_to_set = BITS_PER_LONG; mask_to_set = ~0UL; p++; } /* Full words */ if (bits_to_set == BITS_PER_LONG) { while (nr >= BITS_PER_LONG) { *p = ~0UL; nr -= BITS_PER_LONG; p++; } } /* Last word */ if (nr) { mask_to_set &= BITMAP_LAST_WORD_MASK(size); atomic_or(p, mask_to_set); } else { /* If we avoided the full barrier in atomic_or(), issue a * barrier to account for the assignments in the while loop. */ smp_mb(); } }
3,702
1
static void test_io_channel_ipv4_fd(void) { QIOChannel *ioc; int fd = -1; fd = socket(AF_INET, SOCK_STREAM, 0); g_assert_cmpint(fd, >, -1); ioc = qio_channel_new_fd(fd, &error_abort); g_assert_cmpstr(object_get_typename(OBJECT(ioc)), ==, TYPE_QIO_CHANNEL_SOCKET); object_unref(OBJECT(ioc));
3,703
1
e1000e_io_read(void *opaque, hwaddr addr, unsigned size) { E1000EState *s = opaque; uint32_t idx; uint64_t val; switch (addr) { case E1000_IOADDR: trace_e1000e_io_read_addr(s->ioaddr); return s->ioaddr; case E1000_IODATA: if (e1000e_io_get_reg_index(s, &idx)) { val = e1000e_core_read(&s->core, idx, sizeof(val)); trace_e1000e_io_read_data(idx, val); return val; } return 0; default: trace_e1000e_wrn_io_read_unknown(addr); return 0; } }
3,704
1
static void qemu_mutex_unlock_iothread(void) { qemu_mutex_unlock(&qemu_global_mutex); }
3,705
1
static int s302m_encode2_frame(AVCodecContext *avctx, AVPacket *avpkt, const AVFrame *frame, int *got_packet_ptr) { S302MEncContext *s = avctx->priv_data; const int buf_size = AES3_HEADER_LEN + (frame->nb_samples * avctx->channels * (avctx->bits_per_raw_sample + 4)) / 8; int ret, c, channels; uint8_t *o; PutBitContext pb; if ((ret = ff_alloc_packet2(avctx, avpkt, buf_size)) < 0) return ret; o = avpkt->data; init_put_bits(&pb, o, buf_size * 8); put_bits(&pb, 16, buf_size - AES3_HEADER_LEN); put_bits(&pb, 2, (avctx->channels - 2) >> 1); // number of channels put_bits(&pb, 8, 0); // channel ID put_bits(&pb, 2, (avctx->bits_per_raw_sample - 16) / 4); // bits per samples (0 = 16bit, 1 = 20bit, 2 = 24bit) put_bits(&pb, 4, 0); // alignments flush_put_bits(&pb); o += AES3_HEADER_LEN; if (avctx->bits_per_raw_sample == 24) { const uint32_t *samples = (uint32_t *)frame->data[0]; for (c = 0; c < frame->nb_samples; c++) { uint8_t vucf = s->framing_index == 0 ? 0x10: 0; for (channels = 0; channels < avctx->channels; channels += 2) { o[0] = ff_reverse[(samples[0] & 0x0000FF00) >> 8]; o[1] = ff_reverse[(samples[0] & 0x00FF0000) >> 16]; o[2] = ff_reverse[(samples[0] & 0xFF000000) >> 24]; o[3] = ff_reverse[(samples[1] & 0x00000F00) >> 4] | vucf; o[4] = ff_reverse[(samples[1] & 0x000FF000) >> 12]; o[5] = ff_reverse[(samples[1] & 0x0FF00000) >> 20]; o[6] = ff_reverse[(samples[1] & 0xF0000000) >> 28]; o += 7; samples += 2; } s->framing_index++; if (s->framing_index >= 192) s->framing_index = 0; } } else if (avctx->bits_per_raw_sample == 20) { const uint32_t *samples = (uint32_t *)frame->data[0]; for (c = 0; c < frame->nb_samples; c++) { uint8_t vucf = s->framing_index == 0 ? 0x80: 0; for (channels = 0; channels < avctx->channels; channels += 2) { o[0] = ff_reverse[ (samples[0] & 0x000FF000) >> 12]; o[1] = ff_reverse[ (samples[0] & 0x0FF00000) >> 20]; o[2] = ff_reverse[((samples[0] & 0xF0000000) >> 28) | vucf]; o[3] = ff_reverse[ (samples[1] & 0x000FF000) >> 12]; o[4] = ff_reverse[ (samples[1] & 0x0FF00000) >> 20]; o[5] = ff_reverse[ (samples[1] & 0xF0000000) >> 28]; o += 6; samples += 2; } s->framing_index++; if (s->framing_index >= 192) s->framing_index = 0; } } else if (avctx->bits_per_raw_sample == 16) { const uint16_t *samples = (uint16_t *)frame->data[0]; for (c = 0; c < frame->nb_samples; c++) { uint8_t vucf = s->framing_index == 0 ? 0x10 : 0; for (channels = 0; channels < avctx->channels; channels += 2) { o[0] = ff_reverse[ samples[0] & 0xFF]; o[1] = ff_reverse[(samples[0] & 0xFF00) >> 8]; o[2] = ff_reverse[(samples[1] & 0x0F) << 4] | vucf; o[3] = ff_reverse[(samples[1] & 0x0FF0) >> 4]; o[4] = ff_reverse[(samples[1] & 0xF000) >> 12]; o += 5; samples += 2; } s->framing_index++; if (s->framing_index >= 192) s->framing_index = 0; } } *got_packet_ptr = 1; return 0; }
3,706
1
static int qcow_write(BlockDriverState *bs, int64_t sector_num, const uint8_t *buf, int nb_sectors) { Coroutine *co; AioContext *aio_context = bdrv_get_aio_context(bs); QcowWriteCo data = { .bs = bs, .sector_num = sector_num, .buf = buf, .nb_sectors = nb_sectors, .ret = -EINPROGRESS, }; co = qemu_coroutine_create(qcow_write_co_entry); qemu_coroutine_enter(co, &data); while (data.ret == -EINPROGRESS) { aio_poll(aio_context, true); } return data.ret; }
3,707
0
void dump_format(AVFormatContext *ic, int index, const char *url, int is_output) { int i; uint8_t *printed = av_mallocz(ic->nb_streams); if (ic->nb_streams && !printed) return; av_log(NULL, AV_LOG_INFO, "%s #%d, %s, %s '%s':\n", is_output ? "Output" : "Input", index, is_output ? ic->oformat->name : ic->iformat->name, is_output ? "to" : "from", url); dump_metadata(NULL, ic->metadata, " "); if (!is_output) { av_log(NULL, AV_LOG_INFO, " Duration: "); if (ic->duration != AV_NOPTS_VALUE) { int hours, mins, secs, us; secs = ic->duration / AV_TIME_BASE; us = ic->duration % AV_TIME_BASE; mins = secs / 60; secs %= 60; hours = mins / 60; mins %= 60; av_log(NULL, AV_LOG_INFO, "%02d:%02d:%02d.%02d", hours, mins, secs, (100 * us) / AV_TIME_BASE); } else { av_log(NULL, AV_LOG_INFO, "N/A"); } if (ic->start_time != AV_NOPTS_VALUE) { int secs, us; av_log(NULL, AV_LOG_INFO, ", start: "); secs = ic->start_time / AV_TIME_BASE; us = ic->start_time % AV_TIME_BASE; av_log(NULL, AV_LOG_INFO, "%d.%06d", secs, (int)av_rescale(us, 1000000, AV_TIME_BASE)); } av_log(NULL, AV_LOG_INFO, ", bitrate: "); if (ic->bit_rate) { av_log(NULL, AV_LOG_INFO,"%d kb/s", ic->bit_rate / 1000); } else { av_log(NULL, AV_LOG_INFO, "N/A"); } av_log(NULL, AV_LOG_INFO, "\n"); } for (i = 0; i < ic->nb_chapters; i++) { AVChapter *ch = ic->chapters[i]; av_log(NULL, AV_LOG_INFO, " Chapter #%d.%d: ", index, i); av_log(NULL, AV_LOG_INFO, "start %f, ", ch->start * av_q2d(ch->time_base)); av_log(NULL, AV_LOG_INFO, "end %f\n", ch->end * av_q2d(ch->time_base)); dump_metadata(NULL, ch->metadata, " "); } if(ic->nb_programs) { int j, k, total = 0; for(j=0; j<ic->nb_programs; j++) { AVMetadataTag *name = av_metadata_get(ic->programs[j]->metadata, "name", NULL, 0); av_log(NULL, AV_LOG_INFO, " Program %d %s\n", ic->programs[j]->id, name ? name->value : ""); dump_metadata(NULL, ic->programs[j]->metadata, " "); for(k=0; k<ic->programs[j]->nb_stream_indexes; k++) { dump_stream_format(ic, ic->programs[j]->stream_index[k], index, is_output); printed[ic->programs[j]->stream_index[k]] = 1; } total += ic->programs[j]->nb_stream_indexes; } if (total < ic->nb_streams) av_log(NULL, AV_LOG_INFO, " No Program\n"); } for(i=0;i<ic->nb_streams;i++) if (!printed[i]) dump_stream_format(ic, i, index, is_output); av_free(printed); }
3,708
0
static void bastardized_rice_decompress(ALACContext *alac, int32_t *output_buffer, int output_size, int readsamplesize, int rice_history_mult) { int output_count; unsigned int history = alac->rice_initial_history; int sign_modifier = 0; for (output_count = 0; output_count < output_size; output_count++) { int32_t x; int32_t x_modified; int32_t final_val; /* standard rice encoding */ int k; /* size of extra bits */ /* read k, that is bits as is */ k = av_log2((history >> 9) + 3); x = decode_scalar(&alac->gb, k, alac->rice_limit, readsamplesize); x_modified = sign_modifier + x; final_val = (x_modified + 1) / 2; if (x_modified & 1) final_val *= -1; output_buffer[output_count] = final_val; sign_modifier = 0; /* now update the history */ history += x_modified * rice_history_mult - ((history * rice_history_mult) >> 9); if (x_modified > 0xffff) history = 0xffff; /* special case: there may be compressed blocks of 0 */ if ((history < 128) && (output_count+1 < output_size)) { int k; unsigned int block_size; sign_modifier = 1; k = 7 - av_log2(history) + ((history + 16) >> 6 /* / 64 */); block_size = decode_scalar(&alac->gb, k, alac->rice_limit, 16); if (block_size > 0) { if(block_size >= output_size - output_count){ av_log(alac->avctx, AV_LOG_ERROR, "invalid zero block size of %d %d %d\n", block_size, output_size, output_count); block_size= output_size - output_count - 1; } memset(&output_buffer[output_count+1], 0, block_size * 4); output_count += block_size; } if (block_size > 0xffff) sign_modifier = 0; history = 0; } } }
3,709
0
void MPV_common_end(MpegEncContext *s) { int i; av_freep(&s->mb_type); av_freep(&s->p_mv_table); av_freep(&s->b_forw_mv_table); av_freep(&s->b_back_mv_table); av_freep(&s->b_bidir_forw_mv_table); av_freep(&s->b_bidir_back_mv_table); av_freep(&s->b_direct_mv_table); av_freep(&s->motion_val); av_freep(&s->dc_val[0]); av_freep(&s->ac_val[0]); av_freep(&s->coded_block); av_freep(&s->mbintra_table); av_freep(&s->cbp_table); av_freep(&s->pred_dir_table); av_freep(&s->me.scratchpad); av_freep(&s->me.map); av_freep(&s->me.score_map); av_freep(&s->mbskip_table); av_freep(&s->bitstream_buffer); av_freep(&s->tex_pb_buffer); av_freep(&s->pb2_buffer); av_freep(&s->edge_emu_buffer); av_freep(&s->co_located_type_table); av_freep(&s->field_mv_table); av_freep(&s->field_select_table); av_freep(&s->avctx->stats_out); av_freep(&s->ac_stats); av_freep(&s->error_status_table); for(i=0; i<MAX_PICTURE_COUNT; i++){ free_picture(s, &s->picture[i]); } s->context_initialized = 0; }
3,710
0
static void mpeg_decode_sequence_extension(Mpeg1Context *s1) { MpegEncContext *s = &s1->mpeg_enc_ctx; int horiz_size_ext, vert_size_ext; int bit_rate_ext; skip_bits(&s->gb, 1); /* profile and level esc*/ s->avctx->profile = get_bits(&s->gb, 3); s->avctx->level = get_bits(&s->gb, 4); s->progressive_sequence = get_bits1(&s->gb); /* progressive_sequence */ s->chroma_format = get_bits(&s->gb, 2); /* chroma_format 1=420, 2=422, 3=444 */ horiz_size_ext = get_bits(&s->gb, 2); vert_size_ext = get_bits(&s->gb, 2); s->width |= (horiz_size_ext << 12); s->height |= (vert_size_ext << 12); bit_rate_ext = get_bits(&s->gb, 12); /* XXX: handle it */ s->bit_rate += (bit_rate_ext << 18) * 400; skip_bits1(&s->gb); /* marker */ s->avctx->rc_buffer_size += get_bits(&s->gb, 8) * 1024 * 16 << 10; s->low_delay = get_bits1(&s->gb); if (s->flags & CODEC_FLAG_LOW_DELAY) s->low_delay = 1; s1->frame_rate_ext.num = get_bits(&s->gb, 2) + 1; s1->frame_rate_ext.den = get_bits(&s->gb, 5) + 1; av_dlog(s->avctx, "sequence extension\n"); s->codec_id = s->avctx->codec_id = AV_CODEC_ID_MPEG2VIDEO; if (s->avctx->debug & FF_DEBUG_PICT_INFO) av_log(s->avctx, AV_LOG_DEBUG, "profile: %d, level: %d ps: %d cf:%d vbv buffer: %d, bitrate:%d\n", s->avctx->profile, s->avctx->level, s->progressive_sequence, s->chroma_format, s->avctx->rc_buffer_size, s->bit_rate); }
3,711
1
static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args, TCGOpDef *tcg_op_defs) { int i, nb_ops, op_index, nb_temps, nb_globals, nb_call_args; TCGOpcode op; const TCGOpDef *def; TCGArg *gen_args; TCGArg tmp; /* Array VALS has an element for each temp. If this temp holds a constant then its value is kept in VALS' element. If this temp is a copy of other ones then this equivalence class' representative is kept in VALS' element. If this temp is neither copy nor constant then corresponding VALS' element is unused. */ nb_temps = s->nb_temps; nb_globals = s->nb_globals; memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info)); nb_ops = tcg_opc_ptr - gen_opc_buf; gen_args = args; for (op_index = 0; op_index < nb_ops; op_index++) { op = gen_opc_buf[op_index]; def = &tcg_op_defs[op]; /* Do copy propagation */ if (!(def->flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS))) { assert(op != INDEX_op_call); for (i = def->nb_oargs; i < def->nb_oargs + def->nb_iargs; i++) { if (temps[args[i]].state == TCG_TEMP_COPY) { args[i] = temps[args[i]].val; } } } /* For commutative operations make constant second argument */ switch (op) { CASE_OP_32_64(add): CASE_OP_32_64(mul): CASE_OP_32_64(and): CASE_OP_32_64(or): CASE_OP_32_64(xor): CASE_OP_32_64(eqv): CASE_OP_32_64(nand): CASE_OP_32_64(nor): if (temps[args[1]].state == TCG_TEMP_CONST) { tmp = args[1]; args[1] = args[2]; args[2] = tmp; } break; CASE_OP_32_64(brcond): if (temps[args[0]].state == TCG_TEMP_CONST && temps[args[1]].state != TCG_TEMP_CONST) { tmp = args[0]; args[0] = args[1]; args[1] = tmp; args[2] = tcg_swap_cond(args[2]); } break; CASE_OP_32_64(setcond): if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[2]].state != TCG_TEMP_CONST) { tmp = args[1]; args[1] = args[2]; args[2] = tmp; args[3] = tcg_swap_cond(args[3]); } break; default: break; } /* Simplify expressions for "shift/rot r, 0, a => movi r, 0" */ switch (op) { CASE_OP_32_64(shl): CASE_OP_32_64(shr): CASE_OP_32_64(sar): CASE_OP_32_64(rotl): CASE_OP_32_64(rotr): if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[1]].val == 0) { gen_opc_buf[op_index] = op_to_movi(op); tcg_opt_gen_movi(gen_args, args[0], 0, nb_temps, nb_globals); args += 3; gen_args += 2; continue; } break; default: break; } /* Simplify expression for "op r, a, 0 => mov r, a" cases */ switch (op) { CASE_OP_32_64(add): CASE_OP_32_64(sub): CASE_OP_32_64(shl): CASE_OP_32_64(shr): CASE_OP_32_64(sar): CASE_OP_32_64(rotl): CASE_OP_32_64(rotr): CASE_OP_32_64(or): CASE_OP_32_64(xor): if (temps[args[1]].state == TCG_TEMP_CONST) { /* Proceed with possible constant folding. */ break; } if (temps[args[2]].state == TCG_TEMP_CONST && temps[args[2]].val == 0) { if ((temps[args[0]].state == TCG_TEMP_COPY && temps[args[0]].val == args[1]) || args[0] == args[1]) { gen_opc_buf[op_index] = INDEX_op_nop; } else { gen_opc_buf[op_index] = op_to_mov(op); tcg_opt_gen_mov(gen_args, args[0], args[1], nb_temps, nb_globals); gen_args += 2; } args += 3; continue; } break; default: break; } /* Simplify expression for "op r, a, 0 => movi r, 0" cases */ switch (op) { CASE_OP_32_64(and): CASE_OP_32_64(mul): if ((temps[args[2]].state == TCG_TEMP_CONST && temps[args[2]].val == 0)) { gen_opc_buf[op_index] = op_to_movi(op); tcg_opt_gen_movi(gen_args, args[0], 0, nb_temps, nb_globals); args += 3; gen_args += 2; continue; } break; default: break; } /* Simplify expression for "op r, a, a => mov r, a" cases */ switch (op) { CASE_OP_32_64(or): CASE_OP_32_64(and): if (args[1] == args[2]) { if (args[1] == args[0]) { gen_opc_buf[op_index] = INDEX_op_nop; } else { gen_opc_buf[op_index] = op_to_mov(op); tcg_opt_gen_mov(gen_args, args[0], args[1], nb_temps, nb_globals); gen_args += 2; } args += 3; continue; } break; default: break; } /* Propagate constants through copy operations and do constant folding. Constants will be substituted to arguments by register allocator where needed and possible. Also detect copies. */ switch (op) { CASE_OP_32_64(mov): if ((temps[args[1]].state == TCG_TEMP_COPY && temps[args[1]].val == args[0]) || args[0] == args[1]) { args += 2; gen_opc_buf[op_index] = INDEX_op_nop; break; } if (temps[args[1]].state != TCG_TEMP_CONST) { tcg_opt_gen_mov(gen_args, args[0], args[1], nb_temps, nb_globals); gen_args += 2; args += 2; break; } /* Source argument is constant. Rewrite the operation and let movi case handle it. */ op = op_to_movi(op); gen_opc_buf[op_index] = op; args[1] = temps[args[1]].val; /* fallthrough */ CASE_OP_32_64(movi): tcg_opt_gen_movi(gen_args, args[0], args[1], nb_temps, nb_globals); gen_args += 2; args += 2; break; CASE_OP_32_64(not): CASE_OP_32_64(neg): CASE_OP_32_64(ext8s): CASE_OP_32_64(ext8u): CASE_OP_32_64(ext16s): CASE_OP_32_64(ext16u): case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: if (temps[args[1]].state == TCG_TEMP_CONST) { gen_opc_buf[op_index] = op_to_movi(op); tmp = do_constant_folding(op, temps[args[1]].val, 0); tcg_opt_gen_movi(gen_args, args[0], tmp, nb_temps, nb_globals); } else { reset_temp(args[0], nb_temps, nb_globals); gen_args[0] = args[0]; gen_args[1] = args[1]; } gen_args += 2; args += 2; break; CASE_OP_32_64(add): CASE_OP_32_64(sub): CASE_OP_32_64(mul): CASE_OP_32_64(or): CASE_OP_32_64(and): CASE_OP_32_64(xor): CASE_OP_32_64(shl): CASE_OP_32_64(shr): CASE_OP_32_64(sar): CASE_OP_32_64(rotl): CASE_OP_32_64(rotr): CASE_OP_32_64(andc): CASE_OP_32_64(orc): CASE_OP_32_64(eqv): CASE_OP_32_64(nand): CASE_OP_32_64(nor): if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[2]].state == TCG_TEMP_CONST) { gen_opc_buf[op_index] = op_to_movi(op); tmp = do_constant_folding(op, temps[args[1]].val, temps[args[2]].val); tcg_opt_gen_movi(gen_args, args[0], tmp, nb_temps, nb_globals); gen_args += 2; } else { reset_temp(args[0], nb_temps, nb_globals); gen_args[0] = args[0]; gen_args[1] = args[1]; gen_args[2] = args[2]; gen_args += 3; } args += 3; break; CASE_OP_32_64(setcond): if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[2]].state == TCG_TEMP_CONST) { gen_opc_buf[op_index] = op_to_movi(op); tmp = do_constant_folding_cond(op, temps[args[1]].val, temps[args[2]].val, args[3]); tcg_opt_gen_movi(gen_args, args[0], tmp, nb_temps, nb_globals); gen_args += 2; } else { reset_temp(args[0], nb_temps, nb_globals); gen_args[0] = args[0]; gen_args[1] = args[1]; gen_args[2] = args[2]; gen_args[3] = args[3]; gen_args += 4; } args += 4; break; CASE_OP_32_64(brcond): if (temps[args[0]].state == TCG_TEMP_CONST && temps[args[1]].state == TCG_TEMP_CONST) { if (do_constant_folding_cond(op, temps[args[0]].val, temps[args[1]].val, args[2])) { memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info)); gen_opc_buf[op_index] = INDEX_op_br; gen_args[0] = args[3]; gen_args += 1; } else { gen_opc_buf[op_index] = INDEX_op_nop; } } else { memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info)); reset_temp(args[0], nb_temps, nb_globals); gen_args[0] = args[0]; gen_args[1] = args[1]; gen_args[2] = args[2]; gen_args[3] = args[3]; gen_args += 4; } args += 4; break; case INDEX_op_call: nb_call_args = (args[0] >> 16) + (args[0] & 0xffff); if (!(args[nb_call_args + 1] & (TCG_CALL_CONST | TCG_CALL_PURE))) { for (i = 0; i < nb_globals; i++) { reset_temp(i, nb_temps, nb_globals); } } for (i = 0; i < (args[0] >> 16); i++) { reset_temp(args[i + 1], nb_temps, nb_globals); } i = nb_call_args + 3; while (i) { *gen_args = *args; args++; gen_args++; i--; } break; case INDEX_op_set_label: case INDEX_op_jmp: case INDEX_op_br: memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info)); for (i = 0; i < def->nb_args; i++) { *gen_args = *args; args++; gen_args++; } break; default: /* Default case: we do know nothing about operation so no propagation is done. We only trash output args. */ for (i = 0; i < def->nb_oargs; i++) { reset_temp(args[i], nb_temps, nb_globals); } for (i = 0; i < def->nb_args; i++) { gen_args[i] = args[i]; } args += def->nb_args; gen_args += def->nb_args; break; } } return gen_args; }
3,712
1
long do_rt_sigreturn(CPUPPCState *env) { struct target_rt_sigframe *rt_sf = NULL; target_ulong rt_sf_addr; rt_sf_addr = env->gpr[1] + SIGNAL_FRAMESIZE + 16; if (!lock_user_struct(VERIFY_READ, rt_sf, rt_sf_addr, 1)) goto sigsegv; if (do_setcontext(&rt_sf->uc, env, 1)) goto sigsegv; do_sigaltstack(rt_sf_addr + offsetof(struct target_rt_sigframe, uc.tuc_stack), 0, env->gpr[1]); unlock_user_struct(rt_sf, rt_sf_addr, 1); return -TARGET_QEMU_ESIGRETURN; sigsegv: unlock_user_struct(rt_sf, rt_sf_addr, 1); force_sig(TARGET_SIGSEGV); return 0; }
3,713
1
void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift, qemu_irq irq, void* mem_opaque, void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)) { dp8393xState *s; int io; qemu_check_nic_model(nd, "dp83932"); s = qemu_mallocz(sizeof(dp8393xState)); s->mem_opaque = mem_opaque; s->memory_rw = memory_rw; s->it_shift = it_shift; s->irq = irq; s->watchdog = qemu_new_timer(vm_clock, dp8393x_watchdog, s); s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */ s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name, nic_receive, nic_can_receive, s); qemu_format_nic_info_str(s->vc, nd->macaddr); qemu_register_reset(nic_reset, s); nic_reset(s); io = cpu_register_io_memory(0, dp8393x_read, dp8393x_write, s); cpu_register_physical_memory(base, 0x40 << it_shift, io); }
3,715
1
static void v9fs_readdir(void *opaque) { int32_t fid; V9fsFidState *fidp; ssize_t retval = 0; size_t offset = 7; int64_t initial_offset; int32_t count, max_count; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dqd", &fid, &initial_offset, &max_count); trace_v9fs_readdir(pdu->tag, pdu->id, fid, initial_offset, max_count); fidp = get_fid(pdu, fid); if (fidp == NULL) { retval = -EINVAL; goto out_nofid; } if (!fidp->fs.dir) { retval = -EINVAL; goto out; } if (initial_offset == 0) { v9fs_co_rewinddir(pdu, fidp); } else { v9fs_co_seekdir(pdu, fidp, initial_offset); } count = v9fs_do_readdir(pdu, fidp, max_count); if (count < 0) { retval = count; goto out; } retval = offset; retval += pdu_marshal(pdu, offset, "d", count); retval += count; out: put_fid(pdu, fidp); out_nofid: complete_pdu(s, pdu, retval); }
3,716
1
static int IRQ_get_next(OpenPICState *opp, IRQ_queue_t *q) { if (q->next == -1) { /* XXX: optimize */ IRQ_check(opp, q); } return q->next; }
3,717
1
int ff_h264_queue_decode_slice(H264Context *h, const H2645NAL *nal) { H264SliceContext *sl = h->slice_ctx + h->nb_slice_ctx_queued; int first_slice = sl == h->slice_ctx && !h->current_slice; int ret; sl->gb = nal->gb; ret = h264_slice_header_parse(h, sl, nal); if (ret < 0) return ret; // discard redundant pictures if (sl->redundant_pic_count > 0) return 0; if (sl->first_mb_addr == 0 || !h->current_slice) { if (h->setup_finished) { av_log(h->avctx, AV_LOG_ERROR, "Too many fields\n"); return AVERROR_INVALIDDATA; } } if (sl->first_mb_addr == 0) { // FIXME better field boundary detection if (h->current_slice) { // this slice starts a new field // first decode any pending queued slices if (h->nb_slice_ctx_queued) { H264SliceContext tmp_ctx; ret = ff_h264_execute_decode_slices(h); if (ret < 0 && (h->avctx->err_recognition & AV_EF_EXPLODE)) return ret; memcpy(&tmp_ctx, h->slice_ctx, sizeof(tmp_ctx)); memcpy(h->slice_ctx, sl, sizeof(tmp_ctx)); memcpy(sl, &tmp_ctx, sizeof(tmp_ctx)); sl = h->slice_ctx; } if (h->cur_pic_ptr && FIELD_PICTURE(h) && h->first_field) { ret = ff_h264_field_end(h, h->slice_ctx, 1); if (ret < 0) return ret; } else if (h->cur_pic_ptr && !FIELD_PICTURE(h) && !h->first_field && h->nal_unit_type == H264_NAL_IDR_SLICE) { av_log(h, AV_LOG_WARNING, "Broken frame packetizing\n"); ret = ff_h264_field_end(h, h->slice_ctx, 1); ff_thread_report_progress(&h->cur_pic_ptr->tf, INT_MAX, 0); ff_thread_report_progress(&h->cur_pic_ptr->tf, INT_MAX, 1); h->cur_pic_ptr = NULL; if (ret < 0) return ret; } else return AVERROR_INVALIDDATA; } if (!h->first_field) { if (h->cur_pic_ptr && !h->droppable) { ff_thread_report_progress(&h->cur_pic_ptr->tf, INT_MAX, h->picture_structure == PICT_BOTTOM_FIELD); } h->cur_pic_ptr = NULL; } } if (!h->current_slice) av_assert0(sl == h->slice_ctx); if (h->current_slice == 0 && !h->first_field) { if ( (h->avctx->skip_frame >= AVDISCARD_NONREF && !h->nal_ref_idc) || (h->avctx->skip_frame >= AVDISCARD_BIDIR && sl->slice_type_nos == AV_PICTURE_TYPE_B) || (h->avctx->skip_frame >= AVDISCARD_NONINTRA && sl->slice_type_nos != AV_PICTURE_TYPE_I) || (h->avctx->skip_frame >= AVDISCARD_NONKEY && h->nal_unit_type != H264_NAL_IDR_SLICE && h->sei.recovery_point.recovery_frame_cnt < 0) || h->avctx->skip_frame >= AVDISCARD_ALL) { return 0; } } if (!first_slice) { const PPS *pps = (const PPS*)h->ps.pps_list[sl->pps_id]->data; if (h->ps.pps->sps_id != pps->sps_id || h->ps.pps->transform_8x8_mode != pps->transform_8x8_mode /*|| (h->setup_finished && h->ps.pps != pps)*/) { av_log(h->avctx, AV_LOG_ERROR, "PPS changed between slices\n"); return AVERROR_INVALIDDATA; } if (h->ps.sps != (const SPS*)h->ps.sps_list[h->ps.pps->sps_id]->data) { av_log(h->avctx, AV_LOG_ERROR, "SPS changed in the middle of the frame\n"); return AVERROR_INVALIDDATA; } } if (h->current_slice == 0) { ret = h264_field_start(h, sl, nal, first_slice); if (ret < 0) return ret; } else { if (h->picture_structure != sl->picture_structure || h->droppable != (nal->ref_idc == 0)) { av_log(h->avctx, AV_LOG_ERROR, "Changing field mode (%d -> %d) between slices is not allowed\n", h->picture_structure, sl->picture_structure); return AVERROR_INVALIDDATA; } else if (!h->cur_pic_ptr) { av_log(h->avctx, AV_LOG_ERROR, "unset cur_pic_ptr on slice %d\n", h->current_slice + 1); return AVERROR_INVALIDDATA; } } ret = h264_slice_init(h, sl, nal); if (ret < 0) return ret; h->nb_slice_ctx_queued++; return 0; }
3,718
1
static void end_frame(AVFilterLink *inlink) { GradFunContext *gf = inlink->dst->priv; AVFilterBufferRef *inpic = inlink->cur_buf; AVFilterLink *outlink = inlink->dst->outputs[0]; AVFilterBufferRef *outpic = outlink->out_buf; int p; for (p = 0; p < 4 && inpic->data[p]; p++) { int w = inlink->w; int h = inlink->h; int r = gf->radius; if (p) { w = gf->chroma_w; h = gf->chroma_h; r = gf->chroma_r; } if (FFMIN(w, h) > 2 * r) filter(gf, outpic->data[p], inpic->data[p], w, h, outpic->linesize[p], inpic->linesize[p], r); else if (outpic->data[p] != inpic->data[p]) av_image_copy_plane(outpic->data[p], outpic->linesize[p], inpic->data[p], inpic->linesize[p], w, h); } avfilter_draw_slice(outlink, 0, inlink->h, 1); avfilter_end_frame(outlink); avfilter_unref_buffer(inpic); avfilter_unref_buffer(outpic); }
3,719
1
SCSIRequest *scsi_req_find(SCSIDevice *d, uint32_t tag) { SCSIRequest *req; QTAILQ_FOREACH(req, &d->requests, next) { if (req->tag == tag) { return req; } } return NULL; }
3,720
1
static void vbe_update_vgaregs(VGACommonState *s) { int h, shift_control; if (!vbe_enabled(s)) { /* vbe is turned off -- nothing to do */ return; } /* graphic mode + memory map 1 */ s->gr[VGA_GFX_MISC] = (s->gr[VGA_GFX_MISC] & ~0x0c) | 0x04 | VGA_GR06_GRAPHICS_MODE; s->cr[VGA_CRTC_MODE] |= 3; /* no CGA modes */ s->cr[VGA_CRTC_OFFSET] = s->vbe_line_offset >> 3; /* width */ s->cr[VGA_CRTC_H_DISP] = (s->vbe_regs[VBE_DISPI_INDEX_XRES] >> 3) - 1; /* height (only meaningful if < 1024) */ h = s->vbe_regs[VBE_DISPI_INDEX_YRES] - 1; s->cr[VGA_CRTC_V_DISP_END] = h; s->cr[VGA_CRTC_OVERFLOW] = (s->cr[VGA_CRTC_OVERFLOW] & ~0x42) | ((h >> 7) & 0x02) | ((h >> 3) & 0x40); /* line compare to 1023 */ s->cr[VGA_CRTC_LINE_COMPARE] = 0xff; s->cr[VGA_CRTC_OVERFLOW] |= 0x10; s->cr[VGA_CRTC_MAX_SCAN] |= 0x40; if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) { shift_control = 0; s->sr[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */ } else { shift_control = 2; /* set chain 4 mode */ s->sr[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M; /* activate all planes */ s->sr[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES; } s->gr[VGA_GFX_MODE] = (s->gr[VGA_GFX_MODE] & ~0x60) | (shift_control << 5); s->cr[VGA_CRTC_MAX_SCAN] &= ~0x9f; /* no double scan */ }
3,723
1
static void nvdimm_dsm_set_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in, hwaddr dsm_mem_addr) { NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm); NvdimmFuncSetLabelDataIn *set_label_data; uint32_t status; set_label_data = (NvdimmFuncSetLabelDataIn *)in->arg3; le32_to_cpus(&set_label_data->offset); le32_to_cpus(&set_label_data->length); nvdimm_debug("Write Label Data: offset %#x length %#x.\n", set_label_data->offset, set_label_data->length); status = nvdimm_rw_label_data_check(nvdimm, set_label_data->offset, set_label_data->length); if (status != 0 /* Success */) { nvdimm_dsm_no_payload(status, dsm_mem_addr); return; } assert(sizeof(*in) + sizeof(*set_label_data) + set_label_data->length <= 4096); nvc->write_label_data(nvdimm, set_label_data->in_buf, set_label_data->length, set_label_data->offset); nvdimm_dsm_no_payload(0 /* Success */, dsm_mem_addr); }
3,724
1
static int64_t load_kernel (CPUMIPSState *env) { int64_t kernel_entry, kernel_low, kernel_high; int index = 0; long initrd_size; ram_addr_t initrd_offset; uint32_t *prom_buf; long prom_size; if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low, (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) { fprintf(stderr, "qemu: could not load kernel '%s'\n", loaderparams.kernel_filename); exit(1); } /* load initrd */ initrd_size = 0; initrd_offset = 0; if (loaderparams.initrd_filename) { initrd_size = get_image_size (loaderparams.initrd_filename); if (initrd_size > 0) { initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; if (initrd_offset + initrd_size > ram_size) { fprintf(stderr, "qemu: memory too small for initial ram disk '%s'\n", loaderparams.initrd_filename); exit(1); } initrd_size = load_image_targphys(loaderparams.initrd_filename, initrd_offset, ram_size - initrd_offset); } if (initrd_size == (target_ulong) -1) { fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", loaderparams.initrd_filename); exit(1); } } /* Setup prom parameters. */ prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); prom_buf = g_malloc(prom_size); prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename); if (initrd_size > 0) { prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s", cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size, loaderparams.kernel_cmdline); } else { prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline); } /* Setup minimum environment variables */ prom_set(prom_buf, index++, "busclock=33000000"); prom_set(prom_buf, index++, "cpuclock=100000000"); prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024); prom_set(prom_buf, index++, "modetty0=38400n8r"); prom_set(prom_buf, index++, NULL); rom_add_blob_fixed("prom", prom_buf, prom_size, cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR)); return kernel_entry; }
3,725
1
static inline void decode_subband_slice_buffered(SnowContext *s, SubBand *b, slice_buffer * sb, int start_y, int h, int save_state[1]){ const int w= b->width; int y; const int qlog= av_clip(s->qlog + b->qlog, 0, QROOT*16); int qmul= ff_qexp[qlog&(QROOT-1)]<<(qlog>>QSHIFT); int qadd= (s->qbias*qmul)>>QBIAS_SHIFT; int new_index = 0; if(b->ibuf == s->spatial_idwt_buffer || s->qlog == LOSSLESS_QLOG){ qadd= 0; qmul= 1<<QEXPSHIFT; } /* If we are on the second or later slice, restore our index. */ if (start_y != 0) new_index = save_state[0]; for(y=start_y; y<h; y++){ int x = 0; int v; IDWTELEM * line = slice_buffer_get_line(sb, y * b->stride_line + b->buf_y_offset) + b->buf_x_offset; memset(line, 0, b->width*sizeof(IDWTELEM)); v = b->x_coeff[new_index].coeff; x = b->x_coeff[new_index++].x; while(x < w){ register int t= ( (v>>1)*qmul + qadd)>>QEXPSHIFT; register int u= -(v&1); line[x] = (t^u) - u; v = b->x_coeff[new_index].coeff; x = b->x_coeff[new_index++].x; } } /* Save our variables for the next slice. */ save_state[0] = new_index; return; }
3,726
1
static void coroutine_fn aio_read_response(void *opaque) { SheepdogObjRsp rsp; BDRVSheepdogState *s = opaque; int fd = s->fd; int ret; AIOReq *aio_req = NULL; SheepdogAIOCB *acb; uint64_t idx; /* read a header */ ret = qemu_co_recv(fd, &rsp, sizeof(rsp)); if (ret != sizeof(rsp)) { error_report("failed to get the header, %s", strerror(errno)); goto err; } /* find the right aio_req from the inflight aio list */ QLIST_FOREACH(aio_req, &s->inflight_aio_head, aio_siblings) { if (aio_req->id == rsp.id) { break; } } if (!aio_req) { error_report("cannot find aio_req %x", rsp.id); goto err; } acb = aio_req->aiocb; switch (acb->aiocb_type) { case AIOCB_WRITE_UDATA: /* this coroutine context is no longer suitable for co_recv * because we may send data to update vdi objects */ s->co_recv = NULL; if (!is_data_obj(aio_req->oid)) { break; } idx = data_oid_to_idx(aio_req->oid); if (s->inode.data_vdi_id[idx] != s->inode.vdi_id) { /* * If the object is newly created one, we need to update * the vdi object (metadata object). min_dirty_data_idx * and max_dirty_data_idx are changed to include updated * index between them. */ if (rsp.result == SD_RES_SUCCESS) { s->inode.data_vdi_id[idx] = s->inode.vdi_id; s->max_dirty_data_idx = MAX(idx, s->max_dirty_data_idx); s->min_dirty_data_idx = MIN(idx, s->min_dirty_data_idx); } /* * Some requests may be blocked because simultaneous * create requests are not allowed, so we search the * pending requests here. */ send_pending_req(s, aio_req->oid); } break; case AIOCB_READ_UDATA: ret = qemu_co_recvv(fd, acb->qiov->iov, acb->qiov->niov, aio_req->iov_offset, rsp.data_length); if (ret != rsp.data_length) { error_report("failed to get the data, %s", strerror(errno)); goto err; } break; case AIOCB_FLUSH_CACHE: if (rsp.result == SD_RES_INVALID_PARMS) { DPRINTF("disable cache since the server doesn't support it\n"); s->cache_flags = SD_FLAG_CMD_DIRECT; rsp.result = SD_RES_SUCCESS; } break; case AIOCB_DISCARD_OBJ: switch (rsp.result) { case SD_RES_INVALID_PARMS: error_report("sheep(%s) doesn't support discard command", s->host_spec); rsp.result = SD_RES_SUCCESS; s->discard_supported = false; break; case SD_RES_SUCCESS: idx = data_oid_to_idx(aio_req->oid); s->inode.data_vdi_id[idx] = 0; break; default: break; } } switch (rsp.result) { case SD_RES_SUCCESS: break; case SD_RES_READONLY: if (s->inode.vdi_id == oid_to_vid(aio_req->oid)) { ret = reload_inode(s, 0, ""); if (ret < 0) { goto err; } } if (is_data_obj(aio_req->oid)) { aio_req->oid = vid_to_data_oid(s->inode.vdi_id, data_oid_to_idx(aio_req->oid)); } else { aio_req->oid = vid_to_vdi_oid(s->inode.vdi_id); } resend_aioreq(s, aio_req); goto out; default: acb->ret = -EIO; error_report("%s", sd_strerror(rsp.result)); break; } free_aio_req(s, aio_req); if (!acb->nr_pending) { /* * We've finished all requests which belong to the AIOCB, so * we can switch back to sd_co_readv/writev now. */ acb->aio_done_func(acb); } out: s->co_recv = NULL; return; err: s->co_recv = NULL; reconnect_to_sdog(opaque); }
3,727
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static void dec_rcsr(DisasContext *dc) { LOG_DIS("rcsr r%d, %d\n", dc->r2, dc->csr); switch (dc->csr) { case CSR_IE: tcg_gen_mov_tl(cpu_R[dc->r2], cpu_ie); break; case CSR_IM: gen_helper_rcsr_im(cpu_R[dc->r2], cpu_env); break; case CSR_IP: gen_helper_rcsr_ip(cpu_R[dc->r2], cpu_env); break; case CSR_CC: tcg_gen_mov_tl(cpu_R[dc->r2], cpu_cc); break; case CSR_CFG: tcg_gen_mov_tl(cpu_R[dc->r2], cpu_cfg); break; case CSR_EBA: tcg_gen_mov_tl(cpu_R[dc->r2], cpu_eba); break; case CSR_DC: tcg_gen_mov_tl(cpu_R[dc->r2], cpu_dc); break; case CSR_DEBA: tcg_gen_mov_tl(cpu_R[dc->r2], cpu_deba); break; case CSR_JTX: gen_helper_rcsr_jtx(cpu_R[dc->r2], cpu_env); break; case CSR_JRX: gen_helper_rcsr_jrx(cpu_R[dc->r2], cpu_env); break; case CSR_ICC: case CSR_DCC: case CSR_BP0: case CSR_BP1: case CSR_BP2: case CSR_BP3: case CSR_WP0: case CSR_WP1: case CSR_WP2: case CSR_WP3: cpu_abort(dc->env, "invalid read access csr=%x\n", dc->csr); break; default: cpu_abort(dc->env, "read_csr: unknown csr=%x\n", dc->csr); break; } }
3,728
1
uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2) { int64_t th; uint64_t tl; muls64(&tl, (uint64_t *)&th, arg1, arg2); /* If th != 0 && th != -1, then we had an overflow */ if (likely((uint64_t)(th + 1) <= 1)) { env->ov = 0; } else { env->so = env->ov = 1; } return (int64_t)tl; }
3,729
1
static void pc_init1(MemoryRegion *system_memory, MemoryRegion *system_io, ram_addr_t ram_size, const char *boot_device, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, int pci_enabled, int kvmclock_enabled) { int i; ram_addr_t below_4g_mem_size, above_4g_mem_size; PCIBus *pci_bus; ISABus *isa_bus; PCII440FXState *i440fx_state; int piix3_devfn = -1; qemu_irq *cpu_irq; qemu_irq *gsi; qemu_irq *i8259; qemu_irq *smi_irq; GSIState *gsi_state; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; BusState *idebus[MAX_IDE_BUS]; ISADevice *rtc_state; ISADevice *floppy; MemoryRegion *ram_memory; MemoryRegion *pci_memory; MemoryRegion *rom_memory; DeviceState *icc_bridge; FWCfgState *fw_cfg = NULL; PcGuestInfo *guest_info; if (xen_enabled() && xen_hvm_init() != 0) { fprintf(stderr, "xen hardware virtual machine initialisation failed\n"); exit(1); } icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE); object_property_add_child(qdev_get_machine(), "icc-bridge", OBJECT(icc_bridge), NULL); pc_cpus_init(cpu_model, icc_bridge); pc_acpi_init("acpi-dsdt.aml"); if (kvm_enabled() && kvmclock_enabled) { kvmclock_create(); } if (ram_size >= 0xe0000000 ) { above_4g_mem_size = ram_size - 0xe0000000; below_4g_mem_size = 0xe0000000; } else { above_4g_mem_size = 0; below_4g_mem_size = ram_size; } if (pci_enabled) { pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", INT64_MAX); rom_memory = pci_memory; } else { pci_memory = NULL; rom_memory = system_memory; } guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size); guest_info->has_pci_info = has_pci_info; /* Set PCI window size the way seabios has always done it. */ /* Power of 2 so bios can cover it with a single MTRR */ if (ram_size <= 0x80000000) guest_info->pci_info.w32.begin = 0x80000000; else if (ram_size <= 0xc0000000) guest_info->pci_info.w32.begin = 0xc0000000; else guest_info->pci_info.w32.begin = 0xe0000000; /* allocate ram and load rom/bios */ if (!xen_enabled()) { fw_cfg = pc_memory_init(system_memory, kernel_filename, kernel_cmdline, initrd_filename, below_4g_mem_size, above_4g_mem_size, rom_memory, &ram_memory, guest_info); } gsi_state = g_malloc0(sizeof(*gsi_state)); if (kvm_irqchip_in_kernel()) { kvm_pc_setup_irq_routing(pci_enabled); gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, GSI_NUM_PINS); } else { gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); } if (pci_enabled) { pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi, system_memory, system_io, ram_size, below_4g_mem_size, 0x100000000ULL - below_4g_mem_size, 0x100000000ULL + above_4g_mem_size, (sizeof(hwaddr) == 4 ? 0 : ((uint64_t)1 << 62)), pci_memory, ram_memory); } else { pci_bus = NULL; i440fx_state = NULL; isa_bus = isa_bus_new(NULL, system_io); no_hpet = 1; } isa_bus_irqs(isa_bus, gsi); if (kvm_irqchip_in_kernel()) { i8259 = kvm_i8259_init(isa_bus); } else if (xen_enabled()) { i8259 = xen_interrupt_controller_init(); } else { cpu_irq = pc_allocate_cpu_irq(); i8259 = i8259_init(isa_bus, cpu_irq[0]); } for (i = 0; i < ISA_NUM_IRQS; i++) { gsi_state->i8259_irq[i] = i8259[i]; } if (pci_enabled) { ioapic_init_gsi(gsi_state, "i440fx"); } qdev_init_nofail(icc_bridge); pc_register_ferr_irq(gsi[13]); pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL); /* init basic PC hardware */ pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled()); pc_nic_init(isa_bus, pci_bus); ide_drive_get(hd, MAX_IDE_BUS); if (pci_enabled) { PCIDevice *dev; if (xen_enabled()) { dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); } else { dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); } idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); } else { for(i = 0; i < MAX_IDE_BUS; i++) { ISADevice *dev; dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); idebus[i] = qdev_get_child_bus(DEVICE(dev), "ide.0"); } } pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, floppy, idebus[0], idebus[1], rtc_state); if (pci_enabled && usb_enabled(false)) { pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); } if (pci_enabled && acpi_enabled) { i2c_bus *smbus; smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); /* TODO: Populate SPD eeprom data. */ smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, gsi[9], *smi_irq, kvm_enabled(), fw_cfg); smbus_eeprom_init(smbus, 8, NULL, 0); } if (pci_enabled) { pc_pci_device_init(pci_bus); } if (has_pvpanic) { pvpanic_init(isa_bus); } }
3,730
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static void verify_irqchip_in_kernel(Error **errp) { if (kvm_irqchip_in_kernel()) { return; } error_setg(errp, "pci-assign requires KVM with in-kernel irqchip enabled"); }
3,732
1
static int ogg_write_header(AVFormatContext *s) { OGGContext *ogg = s->priv_data; OGGStreamContext *oggstream = NULL; int i, j; if (ogg->pref_size) av_log(s, AV_LOG_WARNING, "The pagesize option is deprecated\n"); for (i = 0; i < s->nb_streams; i++) { AVStream *st = s->streams[i]; unsigned serial_num = i; if (st->codec->codec_type == AVMEDIA_TYPE_AUDIO) { if (st->codec->codec_id == AV_CODEC_ID_OPUS) /* Opus requires a fixed 48kHz clock */ avpriv_set_pts_info(st, 64, 1, 48000); else avpriv_set_pts_info(st, 64, 1, st->codec->sample_rate); } else if (st->codec->codec_type == AVMEDIA_TYPE_VIDEO) avpriv_set_pts_info(st, 64, st->codec->time_base.num, st->codec->time_base.den); if (st->codec->codec_id != AV_CODEC_ID_VORBIS && st->codec->codec_id != AV_CODEC_ID_THEORA && st->codec->codec_id != AV_CODEC_ID_SPEEX && st->codec->codec_id != AV_CODEC_ID_FLAC && st->codec->codec_id != AV_CODEC_ID_OPUS) { av_log(s, AV_LOG_ERROR, "Unsupported codec id in stream %d\n", i); return -1; } if (!st->codec->extradata || !st->codec->extradata_size) { av_log(s, AV_LOG_ERROR, "No extradata present\n"); return -1; } oggstream = av_mallocz(sizeof(*oggstream)); if (!oggstream) return AVERROR(ENOMEM); oggstream->page.stream_index = i; if (!(s->flags & AVFMT_FLAG_BITEXACT)) do { serial_num = av_get_random_seed(); for (j = 0; j < i; j++) { OGGStreamContext *sc = s->streams[j]->priv_data; if (serial_num == sc->serial_num) break; } } while (j < i); oggstream->serial_num = serial_num; av_dict_copy(&st->metadata, s->metadata, AV_DICT_DONT_OVERWRITE); st->priv_data = oggstream; if (st->codec->codec_id == AV_CODEC_ID_FLAC) { int err = ogg_build_flac_headers(st->codec, oggstream, s->flags & AVFMT_FLAG_BITEXACT, &st->metadata); if (err) { av_log(s, AV_LOG_ERROR, "Error writing FLAC headers\n"); av_freep(&st->priv_data); return err; } } else if (st->codec->codec_id == AV_CODEC_ID_SPEEX) { int err = ogg_build_speex_headers(st->codec, oggstream, s->flags & AVFMT_FLAG_BITEXACT, &st->metadata); if (err) { av_log(s, AV_LOG_ERROR, "Error writing Speex headers\n"); av_freep(&st->priv_data); return err; } } else if (st->codec->codec_id == AV_CODEC_ID_OPUS) { int err = ogg_build_opus_headers(st->codec, oggstream, s->flags & AVFMT_FLAG_BITEXACT, &st->metadata); if (err) { av_log(s, AV_LOG_ERROR, "Error writing Opus headers\n"); av_freep(&st->priv_data); return err; } } else { uint8_t *p; const char *cstr = st->codec->codec_id == AV_CODEC_ID_VORBIS ? "vorbis" : "theora"; int header_type = st->codec->codec_id == AV_CODEC_ID_VORBIS ? 3 : 0x81; int framing_bit = st->codec->codec_id == AV_CODEC_ID_VORBIS ? 1 : 0; if (avpriv_split_xiph_headers(st->codec->extradata, st->codec->extradata_size, st->codec->codec_id == AV_CODEC_ID_VORBIS ? 30 : 42, oggstream->header, oggstream->header_len) < 0) { av_log(s, AV_LOG_ERROR, "Extradata corrupted\n"); av_freep(&st->priv_data); return -1; } p = ogg_write_vorbiscomment(7, s->flags & AVFMT_FLAG_BITEXACT, &oggstream->header_len[1], &st->metadata, framing_bit); oggstream->header[1] = p; if (!p) return AVERROR(ENOMEM); bytestream_put_byte(&p, header_type); bytestream_put_buffer(&p, cstr, 6); if (st->codec->codec_id == AV_CODEC_ID_THEORA) { /** KFGSHIFT is the width of the less significant section of the granule position The less significant section is the frame count since the last keyframe */ oggstream->kfgshift = ((oggstream->header[0][40]&3)<<3)|(oggstream->header[0][41]>>5); oggstream->vrev = oggstream->header[0][9]; av_log(s, AV_LOG_DEBUG, "theora kfgshift %d, vrev %d\n", oggstream->kfgshift, oggstream->vrev); } } } for (j = 0; j < s->nb_streams; j++) { OGGStreamContext *oggstream = s->streams[j]->priv_data; ogg_buffer_data(s, s->streams[j], oggstream->header[0], oggstream->header_len[0], 0, 1); oggstream->page.flags |= 2; // bos ogg_buffer_page(s, oggstream); } for (j = 0; j < s->nb_streams; j++) { AVStream *st = s->streams[j]; OGGStreamContext *oggstream = st->priv_data; for (i = 1; i < 3; i++) { if (oggstream->header_len[i]) ogg_buffer_data(s, st, oggstream->header[i], oggstream->header_len[i], 0, 1); } ogg_buffer_page(s, oggstream); } oggstream->page.start_granule = AV_NOPTS_VALUE; ogg_write_pages(s, 1); return 0; }
3,733
1
static int write_refcount_block(BlockDriverState *bs) { BDRVQcowState *s = bs->opaque; size_t size = s->cluster_size; if (s->refcount_block_cache_offset == 0) { return 0; } BLKDBG_EVENT(bs->file, BLKDBG_REFBLOCK_UPDATE); if (bdrv_pwrite(bs->file, s->refcount_block_cache_offset, s->refcount_block_cache, size) != size) { return -EIO; } return 0; }
3,734
1
static int aiff_read_packet(AVFormatContext *s, AVPacket *pkt) { AVStream *st = s->streams[0]; AIFFInputContext *aiff = s->priv_data; int64_t max_size; int res, size; /* calculate size of remaining data */ max_size = aiff->data_end - avio_tell(s->pb); if (max_size <= 0) return AVERROR_EOF; /* Now for that packet */ if (st->codec->block_align >= 33) // GSM, QCLP, IMA4 size = st->codec->block_align; else size = (MAX_SIZE / st->codec->block_align) * st->codec->block_align; size = FFMIN(max_size, size); res = av_get_packet(s->pb, pkt, size); if (res < 0) return res; /* Only one stream in an AIFF file */ pkt->stream_index = 0; pkt->duration = (res / st->codec->block_align) * aiff->block_duration; return 0; }
3,735
1
static target_long monitor_get_ccr (const struct MonitorDef *md, int val) { CPUArchState *env = mon_get_cpu(); unsigned int u; int i; u = 0; for (i = 0; i < 8; i++) u |= env->crf[i] << (32 - (4 * i)); return u; }
3,736
0
static void yae_clear(ATempoContext *atempo) { atempo->size = 0; atempo->head = 0; atempo->tail = 0; atempo->drift = 0; atempo->nfrag = 0; atempo->state = YAE_LOAD_FRAGMENT; atempo->position[0] = 0; atempo->position[1] = 0; atempo->frag[0].position[0] = 0; atempo->frag[0].position[1] = 0; atempo->frag[0].nsamples = 0; atempo->frag[1].position[0] = 0; atempo->frag[1].position[1] = 0; atempo->frag[1].nsamples = 0; // shift left position of 1st fragment by half a window // so that no re-normalization would be required for // the left half of the 1st fragment: atempo->frag[0].position[0] = -(int64_t)(atempo->window / 2); atempo->frag[0].position[1] = -(int64_t)(atempo->window / 2); av_frame_free(&atempo->dst_buffer); atempo->dst = NULL; atempo->dst_end = NULL; atempo->request_fulfilled = 0; atempo->nsamples_in = 0; atempo->nsamples_out = 0; }
3,737
0
static int jpeg2000_decode_packet(Jpeg2000DecoderContext *s, Jpeg2000CodingStyle *codsty, Jpeg2000ResLevel *rlevel, int precno, int layno, uint8_t *expn, int numgbits) { int bandno, cblkno, ret, nb_code_blocks; if (!(ret = get_bits(s, 1))) { jpeg2000_flush(s); return 0; } else if (ret < 0) return ret; for (bandno = 0; bandno < rlevel->nbands; bandno++) { Jpeg2000Band *band = rlevel->band + bandno; Jpeg2000Prec *prec = band->prec + precno; if (band->coord[0][0] == band->coord[0][1] || band->coord[1][0] == band->coord[1][1]) continue; prec->yi0 = 0; prec->xi0 = 0; nb_code_blocks = prec->nb_codeblocks_height * prec->nb_codeblocks_width; for (cblkno = 0; cblkno < nb_code_blocks; cblkno++) { Jpeg2000Cblk *cblk = prec->cblk + cblkno; int incl, newpasses, llen; if (cblk->npasses) incl = get_bits(s, 1); else incl = tag_tree_decode(s, prec->cblkincl + cblkno, layno + 1) == layno; if (!incl) continue; else if (incl < 0) return incl; if (!cblk->npasses) cblk->nonzerobits = expn[bandno] + numgbits - 1 - tag_tree_decode(s, prec->zerobits + cblkno, 100); if ((newpasses = getnpasses(s)) < 0) return newpasses; if ((llen = getlblockinc(s)) < 0) return llen; cblk->lblock += llen; if ((ret = get_bits(s, av_log2(newpasses) + cblk->lblock)) < 0) return ret; cblk->lengthinc = ret; cblk->npasses += newpasses; } } jpeg2000_flush(s); if (codsty->csty & JPEG2000_CSTY_EPH) { if (bytestream2_peek_be16(&s->g) == JPEG2000_EPH) bytestream2_skip(&s->g, 2); else av_log(s->avctx, AV_LOG_ERROR, "EPH marker not found.\n"); } for (bandno = 0; bandno < rlevel->nbands; bandno++) { Jpeg2000Band *band = rlevel->band + bandno; Jpeg2000Prec *prec = band->prec + precno; nb_code_blocks = prec->nb_codeblocks_height * prec->nb_codeblocks_width; for (cblkno = 0; cblkno < nb_code_blocks; cblkno++) { Jpeg2000Cblk *cblk = prec->cblk + cblkno; if (bytestream2_get_bytes_left(&s->g) < cblk->lengthinc) return AVERROR(EINVAL); /* Code-block data can be empty. In that case initialize data * with 0xFFFF. */ if (cblk->lengthinc > 0) { bytestream2_get_bufferu(&s->g, cblk->data, cblk->lengthinc); } else { cblk->data[0] = 0xFF; cblk->data[1] = 0xFF; } cblk->length += cblk->lengthinc; cblk->lengthinc = 0; } } return 0; }
3,739
0
void ff_celp_lp_synthesis_filterf(float *out, const float *filter_coeffs, const float* in, int buffer_length, int filter_length) { int i,n; #if 0 // Unoptimized code path for improved readability for (n = 0; n < buffer_length; n++) { out[n] = in[n]; for (i = 1; i <= filter_length; i++) out[n] -= filter_coeffs[i-1] * out[n-i]; } #else float out0, out1, out2, out3; float old_out0, old_out1, old_out2, old_out3; float a,b,c; a = filter_coeffs[0]; b = filter_coeffs[1]; c = filter_coeffs[2]; b -= filter_coeffs[0] * filter_coeffs[0]; c -= filter_coeffs[1] * filter_coeffs[0]; c -= filter_coeffs[0] * b; old_out0 = out[-4]; old_out1 = out[-3]; old_out2 = out[-2]; old_out3 = out[-1]; for (n = 0; n <= buffer_length - 4; n+=4) { float tmp0,tmp1,tmp2; float val; out0 = in[0]; out1 = in[1]; out2 = in[2]; out3 = in[3]; out0 -= filter_coeffs[2] * old_out1; out1 -= filter_coeffs[2] * old_out2; out2 -= filter_coeffs[2] * old_out3; out0 -= filter_coeffs[1] * old_out2; out1 -= filter_coeffs[1] * old_out3; out0 -= filter_coeffs[0] * old_out3; val = filter_coeffs[3]; out0 -= val * old_out0; out1 -= val * old_out1; out2 -= val * old_out2; out3 -= val * old_out3; for (i = 5; i <= filter_length; i += 2) { old_out3 = out[-i]; val = filter_coeffs[i-1]; out0 -= val * old_out3; out1 -= val * old_out0; out2 -= val * old_out1; out3 -= val * old_out2; old_out2 = out[-i-1]; val = filter_coeffs[i]; out0 -= val * old_out2; out1 -= val * old_out3; out2 -= val * old_out0; out3 -= val * old_out1; FFSWAP(float, old_out0, old_out2); old_out1 = old_out3; } tmp0 = out0; tmp1 = out1; tmp2 = out2; out3 -= a * tmp2; out2 -= a * tmp1; out1 -= a * tmp0; out3 -= b * tmp1; out2 -= b * tmp0; out3 -= c * tmp0; out[0] = out0; out[1] = out1; out[2] = out2; out[3] = out3; old_out0 = out0; old_out1 = out1; old_out2 = out2; old_out3 = out3; out += 4; in += 4; } out -= n; in -= n; for (; n < buffer_length; n++) { out[n] = in[n]; for (i = 1; i <= filter_length; i++) out[n] -= filter_coeffs[i-1] * out[n-i]; } #endif }
3,740
0
static int decode_b_picture_header(VC9Context *v) { int pqindex; /* Prolog common to all frametypes should be done in caller */ if (v->profile == PROFILE_SIMPLE) { av_log(v, AV_LOG_ERROR, "Found a B frame while in Simple Profile!\n"); return FRAME_SKIPED; } v->bfraction = vc9_bfraction_lut[get_vlc2(&v->gb, vc9_bfraction_vlc.table, VC9_BFRACTION_VLC_BITS, 2)]; if (v->bfraction < -1) { av_log(v, AV_LOG_ERROR, "Invalid BFRaction\n"); return FRAME_SKIPED; } else if (!v->bfraction) { /* We actually have a BI frame */ return decode_bi_picture_header(v); } /* Read the quantization stuff */ pqindex = get_bits(&v->gb, 5); if (v->quantizer_mode == QUANT_FRAME_IMPLICIT) v->pq = pquant_table[0][pqindex]; else { v->pq = pquant_table[v->quantizer_mode-1][pqindex]; } if (pqindex < 9) v->halfpq = get_bits(&v->gb, 1); if (v->quantizer_mode == QUANT_FRAME_EXPLICIT) v->pquantizer = get_bits(&v->gb, 1); /* Read the MV type/mode */ if (v->extended_mv == 1) v->mvrange = get_prefix(&v->gb, 0, 3); v->mv_mode = get_bits(&v->gb, 1); if (v->pq < 13) { if (!v->mv_mode) { v->mv_mode = get_bits(&v->gb, 2); if (v->mv_mode) av_log(v, AV_LOG_ERROR, "mv_mode for lowquant B frame was %i\n", v->mv_mode); } } else { if (!v->mv_mode) { if (get_bits(&v->gb, 1)) av_log(v, AV_LOG_ERROR, "mv_mode for highquant B frame was %i\n", v->mv_mode); } v->mv_mode = 1-v->mv_mode; //To match (pq < 13) mapping } if (v->mv_mode == MV_PMODE_MIXED_MV) { if (bitplane_decoding( v->mv_type_mb_plane, v->width_mb, v->height_mb, v)<0) return -1; } //bitplane bitplane_decoding(v->direct_mb_plane, v->width_mb, v->height_mb, v); bitplane_decoding(v->skip_mb_plane, v->width_mb, v->height_mb, v); /* FIXME: what is actually chosen for B frames ? */ v->mv_diff_vlc = &vc9_mv_diff_vlc[get_bits(&v->gb, 2)]; v->cbpcy_vlc = &vc9_cbpcy_p_vlc[get_bits(&v->gb, 2)]; if (v->dquant) { vop_dquant_decoding(v); } if (v->vstransform) { v->ttmbf = get_bits(&v->gb, 1); if (v->ttmbf) { v->ttfrm = get_bits(&v->gb, 2); av_log(v, AV_LOG_INFO, "Transform used: %ix%i\n", (v->ttfrm & 2) ? 4 : 8, (v->ttfrm & 1) ? 4 : 8); } } /* Epilog should be done in caller */ return 0; }
3,741
0
static int sipr_decode_frame(AVCodecContext *avctx, void *datap, int *data_size, AVPacket *avpkt) { SiprContext *ctx = avctx->priv_data; const uint8_t *buf=avpkt->data; SiprParameters parm; const SiprModeParam *mode_par = &modes[ctx->mode]; GetBitContext gb; float *data = datap; int subframe_size = ctx->mode == MODE_16k ? L_SUBFR_16k : SUBFR_SIZE; int i; ctx->avctx = avctx; if (avpkt->size < (mode_par->bits_per_frame >> 3)) { av_log(avctx, AV_LOG_ERROR, "Error processing packet: packet size (%d) too small\n", avpkt->size); *data_size = 0; return -1; } if (*data_size < subframe_size * mode_par->subframe_count * sizeof(float)) { av_log(avctx, AV_LOG_ERROR, "Error processing packet: output buffer (%d) too small\n", *data_size); *data_size = 0; return -1; } init_get_bits(&gb, buf, mode_par->bits_per_frame); for (i = 0; i < mode_par->frames_per_packet; i++) { decode_parameters(&parm, &gb, mode_par); if (ctx->mode == MODE_16k) ff_sipr_decode_frame_16k(ctx, &parm, data); else decode_frame(ctx, &parm, data); data += subframe_size * mode_par->subframe_count; } *data_size = mode_par->frames_per_packet * subframe_size * mode_par->subframe_count * sizeof(float); return mode_par->bits_per_frame >> 3; }
3,742
0
static void qapi_dealloc_end_list(Visitor *v) { QapiDeallocVisitor *qov = to_qov(v); void *obj = qapi_dealloc_pop(qov); assert(obj == NULL); /* should've been list head tracker with no payload */ }
3,744
0
static int oss_init_in (HWVoiceIn *hw, audsettings_t *as) { OSSVoiceIn *oss = (OSSVoiceIn *) hw; struct oss_params req, obt; int endianness; int err; int fd; audfmt_e effective_fmt; audsettings_t obt_as; oss->fd = -1; req.fmt = aud_to_ossfmt (as->fmt); req.freq = as->freq; req.nchannels = as->nchannels; req.fragsize = conf.fragsize; req.nfrags = conf.nfrags; if (oss_open (1, &req, &obt, &fd)) { return -1; } err = oss_to_audfmt (obt.fmt, &effective_fmt, &endianness); if (err) { oss_anal_close (&fd); return -1; } obt_as.freq = obt.freq; obt_as.nchannels = obt.nchannels; obt_as.fmt = effective_fmt; obt_as.endianness = endianness; audio_pcm_init_info (&hw->info, &obt_as); oss->nfrags = obt.nfrags; oss->fragsize = obt.fragsize; if (obt.nfrags * obt.fragsize & hw->info.align) { dolog ("warning: Misaligned ADC buffer, size %d, alignment %d\n", obt.nfrags * obt.fragsize, hw->info.align + 1); } hw->samples = (obt.nfrags * obt.fragsize) >> hw->info.shift; oss->pcm_buf = audio_calloc (AUDIO_FUNC, hw->samples, 1 << hw->info.shift); if (!oss->pcm_buf) { dolog ("Could not allocate ADC buffer (%d samples, each %d bytes)\n", hw->samples, 1 << hw->info.shift); oss_anal_close (&fd); return -1; } oss->fd = fd; return 0; }
3,745
0
static void gen_lswi(DisasContext *ctx) { TCGv t0; TCGv_i32 t1, t2; int nb = NB(ctx->opcode); int start = rD(ctx->opcode); int ra = rA(ctx->opcode); int nr; if (nb == 0) nb = 32; nr = nb / 4; if (unlikely(((start + nr) > 32 && start <= ra && (start + nr - 32) > ra) || ((start + nr) <= 32 && start <= ra && (start + nr) > ra))) { gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX); return; } gen_set_access_type(ctx, ACCESS_INT); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); t0 = tcg_temp_new(); gen_addr_register(ctx, t0); t1 = tcg_const_i32(nb); t2 = tcg_const_i32(start); gen_helper_lsw(cpu_env, t0, t1, t2); tcg_temp_free(t0); tcg_temp_free_i32(t1); tcg_temp_free_i32(t2); }
3,746
0
static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) { struct vmsvga_state_s *s = opaque; switch (s->index) { case SVGA_REG_ID: if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) s->svgaid = value; break; case SVGA_REG_ENABLE: s->enable = value; s->config &= !!value; s->width = -1; s->height = -1; s->invalidated = 1; s->vga.invalidate(&s->vga); if (s->enable) { s->fb_size = ((s->depth + 7) >> 3) * s->new_width * s->new_height; vga_dirty_log_stop(&s->vga); } else { vga_dirty_log_start(&s->vga); } break; case SVGA_REG_WIDTH: s->new_width = value; s->invalidated = 1; break; case SVGA_REG_HEIGHT: s->new_height = value; s->invalidated = 1; break; case SVGA_REG_DEPTH: case SVGA_REG_BITS_PER_PIXEL: if (value != s->depth) { printf("%s: Bad colour depth: %i bits\n", __FUNCTION__, value); s->config = 0; } break; case SVGA_REG_CONFIG_DONE: if (value) { s->fifo = (uint32_t *) s->fifo_ptr; /* Check range and alignment. */ if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) break; if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) break; if (CMD(max) > SVGA_FIFO_SIZE) break; if (CMD(max) < CMD(min) + 10 * 1024) break; } s->config = !!value; break; case SVGA_REG_SYNC: s->syncing = 1; vmsvga_fifo_run(s); /* Or should we just wait for update_display? */ break; case SVGA_REG_GUEST_ID: s->guest = value; #ifdef VERBOSE if (value >= GUEST_OS_BASE && value < GUEST_OS_BASE + ARRAY_SIZE(vmsvga_guest_id)) printf("%s: guest runs %s.\n", __FUNCTION__, vmsvga_guest_id[value - GUEST_OS_BASE]); #endif break; case SVGA_REG_CURSOR_ID: s->cursor.id = value; break; case SVGA_REG_CURSOR_X: s->cursor.x = value; break; case SVGA_REG_CURSOR_Y: s->cursor.y = value; break; case SVGA_REG_CURSOR_ON: s->cursor.on |= (value == SVGA_CURSOR_ON_SHOW); s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); #ifdef HW_MOUSE_ACCEL if (value <= SVGA_CURSOR_ON_SHOW) { dpy_mouse_set(s->vga.ds, s->cursor.x, s->cursor.y, s->cursor.on); } #endif break; case SVGA_REG_MEM_REGS: case SVGA_REG_NUM_DISPLAYS: case SVGA_REG_PITCHLOCK: case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: break; default: if (s->index >= SVGA_SCRATCH_BASE && s->index < SVGA_SCRATCH_BASE + s->scratch_size) { s->scratch[s->index - SVGA_SCRATCH_BASE] = value; break; } printf("%s: Bad register %02x\n", __FUNCTION__, s->index); } }
3,749
0
static int coroutine_fn backup_do_cow(BackupBlockJob *job, int64_t sector_num, int nb_sectors, bool *error_is_read, bool is_write_notifier) { BlockBackend *blk = job->common.blk; CowRequest cow_request; struct iovec iov; QEMUIOVector bounce_qiov; void *bounce_buffer = NULL; int ret = 0; int64_t sectors_per_cluster = cluster_size_sectors(job); int64_t start, end; int n; qemu_co_rwlock_rdlock(&job->flush_rwlock); start = sector_num / sectors_per_cluster; end = DIV_ROUND_UP(sector_num + nb_sectors, sectors_per_cluster); trace_backup_do_cow_enter(job, start, sector_num, nb_sectors); wait_for_overlapping_requests(job, start, end); cow_request_begin(&cow_request, job, start, end); for (; start < end; start++) { if (test_bit(start, job->done_bitmap)) { trace_backup_do_cow_skip(job, start); continue; /* already copied */ } trace_backup_do_cow_process(job, start); n = MIN(sectors_per_cluster, job->common.len / BDRV_SECTOR_SIZE - start * sectors_per_cluster); if (!bounce_buffer) { bounce_buffer = blk_blockalign(blk, job->cluster_size); } iov.iov_base = bounce_buffer; iov.iov_len = n * BDRV_SECTOR_SIZE; qemu_iovec_init_external(&bounce_qiov, &iov, 1); ret = blk_co_preadv(blk, start * job->cluster_size, bounce_qiov.size, &bounce_qiov, is_write_notifier ? BDRV_REQ_NO_SERIALISING : 0); if (ret < 0) { trace_backup_do_cow_read_fail(job, start, ret); if (error_is_read) { *error_is_read = true; } goto out; } if (buffer_is_zero(iov.iov_base, iov.iov_len)) { ret = blk_co_pwrite_zeroes(job->target, start * job->cluster_size, bounce_qiov.size, BDRV_REQ_MAY_UNMAP); } else { ret = blk_co_pwritev(job->target, start * job->cluster_size, bounce_qiov.size, &bounce_qiov, 0); } if (ret < 0) { trace_backup_do_cow_write_fail(job, start, ret); if (error_is_read) { *error_is_read = false; } goto out; } set_bit(start, job->done_bitmap); /* Publish progress, guest I/O counts as progress too. Note that the * offset field is an opaque progress value, it is not a disk offset. */ job->sectors_read += n; job->common.offset += n * BDRV_SECTOR_SIZE; } out: if (bounce_buffer) { qemu_vfree(bounce_buffer); } cow_request_end(&cow_request); trace_backup_do_cow_return(job, sector_num, nb_sectors, ret); qemu_co_rwlock_unlock(&job->flush_rwlock); return ret; }
3,750
0
static inline int memory_access_size(MemoryRegion *mr, int l, hwaddr addr) { if (l >= 4 && (((addr & 3) == 0 || mr->ops->impl.unaligned))) { return 4; } if (l >= 2 && (((addr & 1) == 0) || mr->ops->impl.unaligned)) { return 2; } return 1; }
3,751
0
static void bonito_spciconf_writew(void *opaque, target_phys_addr_t addr, uint32_t val) { PCIBonitoState *s = opaque; PCIDevice *d = PCI_DEVICE(s); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); uint32_t pciaddr; uint16_t status; DPRINTF("bonito_spciconf_writew "TARGET_FMT_plx" val %x\n", addr, val); assert((addr & 0x1) == 0); pciaddr = bonito_sbridge_pciaddr(s, addr); if (pciaddr == 0xffffffff) { return; } /* set the pci address in s->config_reg */ phb->config_reg = (pciaddr) | (1u << 31); pci_data_write(phb->bus, phb->config_reg, val, 2); /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ status = pci_get_word(d->config + PCI_STATUS); status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); pci_set_word(d->config + PCI_STATUS, status); }
3,752
0
static void i440fx_pcihost_get_pci_hole_start(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { I440FXState *s = I440FX_PCI_HOST_BRIDGE(obj); uint32_t value = s->pci_hole.begin; visit_type_uint32(v, name, &value, errp); }
3,753
0
static void numa_stat_memory_devices(uint64_t node_mem[]) { MemoryDeviceInfoList *info_list = NULL; MemoryDeviceInfoList **prev = &info_list; MemoryDeviceInfoList *info; qmp_pc_dimm_device_list(qdev_get_machine(), &prev); for (info = info_list; info; info = info->next) { MemoryDeviceInfo *value = info->value; if (value) { switch (value->type) { case MEMORY_DEVICE_INFO_KIND_DIMM: node_mem[value->u.dimm->node] += value->u.dimm->size; break; default: break; } } } qapi_free_MemoryDeviceInfoList(info_list); }
3,754
0
static void blkverify_refresh_filename(BlockDriverState *bs) { BDRVBlkverifyState *s = bs->opaque; /* bs->file->bs has already been refreshed */ bdrv_refresh_filename(s->test_file->bs); if (bs->file->bs->full_open_options && s->test_file->bs->full_open_options) { QDict *opts = qdict_new(); qdict_put_obj(opts, "driver", QOBJECT(qstring_from_str("blkverify"))); QINCREF(bs->file->bs->full_open_options); qdict_put_obj(opts, "raw", QOBJECT(bs->file->bs->full_open_options)); QINCREF(s->test_file->bs->full_open_options); qdict_put_obj(opts, "test", QOBJECT(s->test_file->bs->full_open_options)); bs->full_open_options = opts; } if (bs->file->bs->exact_filename[0] && s->test_file->bs->exact_filename[0]) { snprintf(bs->exact_filename, sizeof(bs->exact_filename), "blkverify:%s:%s", bs->file->bs->exact_filename, s->test_file->bs->exact_filename); } }
3,756
0
static int ehci_init_transfer(EHCIQueue *q) { uint32_t cpage, offset, bytes, plen; target_phys_addr_t page; cpage = get_field(q->qh.token, QTD_TOKEN_CPAGE); bytes = get_field(q->qh.token, QTD_TOKEN_TBYTES); offset = q->qh.bufptr[0] & ~QTD_BUFPTR_MASK; qemu_sglist_init(&q->sgl, 5); while (bytes > 0) { if (cpage > 4) { fprintf(stderr, "cpage out of range (%d)\n", cpage); return USB_RET_PROCERR; } page = q->qh.bufptr[cpage] & QTD_BUFPTR_MASK; page += offset; plen = bytes; if (plen > 4096 - offset) { plen = 4096 - offset; offset = 0; cpage++; } qemu_sglist_add(&q->sgl, page, plen); bytes -= plen; } return 0; }
3,758
0
static void allocate_buffers(FLACContext *s){ int i; assert(s->max_blocksize); if(s->max_framesize == 0 && s->max_blocksize){ s->max_framesize= (s->channels * s->bps * s->max_blocksize + 7)/ 8; //FIXME header overhead } for (i = 0; i < s->channels; i++) { s->decoded[i] = av_realloc(s->decoded[i], sizeof(int32_t)*s->max_blocksize); } s->bitstream= av_fast_realloc(s->bitstream, &s->allocated_bitstream_size, s->max_framesize); }
3,759
0
void ff_vp3_idct_add_c(uint8_t *dest/*align 8*/, int line_size, DCTELEM *block/*align 16*/){ idct(dest, line_size, block, 2); }
3,760
0
static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, const char *boot_device, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) { CPUState *env, *envs[MAX_CPUS]; unsigned int i; void *iommu, *espdma, *ledma, *main_esp, *nvram; qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq, *espdma_irq, *ledma_irq; qemu_irq *esp_reset, *le_reset; qemu_irq *fdc_tc; qemu_irq *cpu_halt; ram_addr_t ram_offset, prom_offset, tcx_offset, idreg_offset; unsigned long kernel_size; int ret; char buf[1024]; BlockDriverState *fd[MAX_FD]; int drive_index; void *fw_cfg; /* init CPUs */ if (!cpu_model) cpu_model = hwdef->default_cpu_model; for(i = 0; i < smp_cpus; i++) { env = cpu_init(cpu_model); if (!env) { fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n"); exit(1); } cpu_sparc_set_id(env, i); envs[i] = env; if (i == 0) { qemu_register_reset(main_cpu_reset, env); } else { qemu_register_reset(secondary_cpu_reset, env); env->halted = 1; } cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); env->prom_addr = hwdef->slavio_base; } for (i = smp_cpus; i < MAX_CPUS; i++) cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS); /* allocate RAM */ if ((uint64_t)RAM_size > hwdef->max_mem) { fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n", (unsigned int)(RAM_size / (1024 * 1024)), (unsigned int)(hwdef->max_mem / (1024 * 1024))); exit(1); } ram_offset = qemu_ram_alloc(RAM_size); cpu_register_physical_memory(0, RAM_size, ram_offset); /* load boot prom */ prom_offset = qemu_ram_alloc(PROM_SIZE_MAX); cpu_register_physical_memory(hwdef->slavio_base, (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK, prom_offset | IO_MEM_ROM); if (bios_name == NULL) bios_name = PROM_FILENAME; snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); ret = load_elf(buf, hwdef->slavio_base - PROM_VADDR, NULL, NULL, NULL); if (ret < 0 || ret > PROM_SIZE_MAX) ret = load_image_targphys(buf, hwdef->slavio_base, PROM_SIZE_MAX); if (ret < 0 || ret > PROM_SIZE_MAX) { fprintf(stderr, "qemu: could not load prom '%s'\n", buf); exit(1); } /* set up devices */ slavio_intctl = slavio_intctl_init(hwdef->intctl_base, hwdef->intctl_base + 0x10000ULL, &hwdef->intbit_to_level[0], &slavio_irq, &slavio_cpu_irq, cpu_irqs, hwdef->clock_irq); if (hwdef->idreg_base) { static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 }; idreg_offset = qemu_ram_alloc(sizeof(idreg_data)); cpu_register_physical_memory(hwdef->idreg_base, sizeof(idreg_data), idreg_offset | IO_MEM_ROM); cpu_physical_memory_write_rom(hwdef->idreg_base, idreg_data, sizeof(idreg_data)); } iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version, slavio_irq[hwdef->me_irq]); espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq], iommu, &espdma_irq, &esp_reset); ledma = sparc32_dma_init(hwdef->dma_base + 16ULL, slavio_irq[hwdef->le_irq], iommu, &ledma_irq, &le_reset); if (graphic_depth != 8 && graphic_depth != 24) { fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth); exit (1); } tcx_offset = qemu_ram_alloc(hwdef->vram_size); tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset, hwdef->vram_size, graphic_width, graphic_height, graphic_depth); if (nd_table[0].model == NULL) nd_table[0].model = "lance"; if (strcmp(nd_table[0].model, "lance") == 0) { lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset); } else if (strcmp(nd_table[0].model, "?") == 0) { fprintf(stderr, "qemu: Supported NICs: lance\n"); exit (1); } else { fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model); exit (1); } nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0, hwdef->nvram_size, 8); slavio_timer_init_all(hwdef->counter_base, slavio_irq[hwdef->clock1_irq], slavio_cpu_irq, smp_cpus); slavio_serial_ms_kbd_init(hwdef->ms_kb_base, slavio_irq[hwdef->ms_kb_irq], nographic, ESCC_CLOCK, 1); // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[1], serial_hds[0], ESCC_CLOCK, 1); cpu_halt = qemu_allocate_irqs(cpu_halt_signal, NULL, 1); slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->apc_base, hwdef->aux1_base, hwdef->aux2_base, slavio_irq[hwdef->me_irq], cpu_halt[0], &fdc_tc); if (hwdef->fd_base) { /* there is zero or one floppy drive */ memset(fd, 0, sizeof(fd)); drive_index = drive_get_index(IF_FLOPPY, 0, 0); if (drive_index != -1) fd[0] = drives_table[drive_index].bdrv; sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd, fdc_tc); } if (drive_get_max_bus(IF_SCSI) > 0) { fprintf(stderr, "qemu: too many SCSI bus\n"); exit(1); } main_esp = esp_init(hwdef->esp_base, 2, espdma_memory_read, espdma_memory_write, espdma, *espdma_irq, esp_reset); for (i = 0; i < ESP_MAX_DEVS; i++) { drive_index = drive_get_index(IF_SCSI, 0, i); if (drive_index == -1) continue; esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i); } if (hwdef->cs_base) cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename, RAM_size); nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline, boot_device, RAM_size, kernel_size, graphic_width, graphic_height, graphic_depth, hwdef->nvram_machine_id, "Sun4m"); if (hwdef->ecc_base) ecc_init(hwdef->ecc_base, slavio_irq[hwdef->ecc_irq], hwdef->ecc_version); fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id); fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth); }
3,762
0
static void mptsas_update_interrupt(MPTSASState *s) { PCIDevice *pci = (PCIDevice *) s; uint32_t state = s->intr_status & ~(s->intr_mask | MPI_HIS_IOP_DOORBELL_STATUS); if (s->msi_in_use && msi_enabled(pci)) { if (state) { trace_mptsas_irq_msi(s); msi_notify(pci, 0); } } trace_mptsas_irq_intx(s, !!state); pci_set_irq(pci, !!state); }
3,764
0
static int find_pte64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx, target_ulong eaddr, int h, int rwx, int target_page_bits) { hwaddr pteg_off; target_ulong pte0, pte1; int i, good = -1; int ret; ret = -1; /* No entry found */ pteg_off = (ctx->hash[h] * HASH_PTEG_SIZE_64) & env->htab_mask; for (i = 0; i < HPTES_PER_GROUP; i++) { pte0 = ppc_hash64_load_hpte0(env, pteg_off + i*HASH_PTE_SIZE_64); pte1 = ppc_hash64_load_hpte1(env, pteg_off + i*HASH_PTE_SIZE_64); LOG_MMU("Load pte from %016" HWADDR_PRIx " => " TARGET_FMT_lx " " TARGET_FMT_lx " %d %d %d " TARGET_FMT_lx "\n", pteg_off + (i * 16), pte0, pte1, !!(pte0 & HPTE64_V_VALID), h, !!(pte0 & HPTE64_V_SECONDARY), ctx->ptem); if (pte64_match(pte0, pte1, h, ctx->ptem)) { good = i; break; } } if (good != -1) { ret = pte64_check(ctx, pte0, pte1, rwx); LOG_MMU("found PTE at addr %08" HWADDR_PRIx " prot=%01x ret=%d\n", ctx->raddr, ctx->prot, ret); /* Update page flags */ pte1 = ctx->raddr; if (ppc_hash64_pte_update_flags(ctx, &pte1, ret, rwx) == 1) { ppc_hash64_store_hpte1(env, pteg_off + good * HASH_PTE_SIZE_64, pte1); } } /* We have a TLB that saves 4K pages, so let's * split a huge page to 4k chunks */ if (target_page_bits != TARGET_PAGE_BITS) { ctx->raddr |= (eaddr & ((1 << target_page_bits) - 1)) & TARGET_PAGE_MASK; } return ret; }
3,765
0
static int ds1338_init(I2CSlave *i2c) { return 0; }
3,767
0
static void qbus_print(Monitor *mon, BusState *bus, int indent) { struct DeviceState *dev; qdev_printf("bus: %s\n", bus->name); indent += 2; qdev_printf("type %s\n", bus_type_names[bus->type]); LIST_FOREACH(dev, &bus->children, sibling) { qdev_print(mon, dev, indent); } }
3,768
0
static void mvc_fast_memset(CPUS390XState *env, uint32_t l, uint64_t dest, uint8_t byte) { S390CPU *cpu = s390_env_get_cpu(env); hwaddr dest_phys; hwaddr len = l; void *dest_p; uint64_t asc = env->psw.mask & PSW_MASK_ASC; int flags; if (mmu_translate(env, dest, 1, asc, &dest_phys, &flags)) { cpu_stb_data(env, dest, byte); cpu_abort(CPU(cpu), "should never reach here"); } dest_phys |= dest & ~TARGET_PAGE_MASK; dest_p = cpu_physical_memory_map(dest_phys, &len, 1); memset(dest_p, byte, len); cpu_physical_memory_unmap(dest_p, 1, len, len); }
3,769
0
static ssize_t nbd_receive_request(QIOChannel *ioc, struct nbd_request *request) { uint8_t buf[NBD_REQUEST_SIZE]; uint32_t magic; ssize_t ret; ret = read_sync(ioc, buf, sizeof(buf)); if (ret < 0) { return ret; } if (ret != sizeof(buf)) { LOG("read failed"); return -EINVAL; } /* Request [ 0 .. 3] magic (NBD_REQUEST_MAGIC) [ 4 .. 7] type (0 == READ, 1 == WRITE) [ 8 .. 15] handle [16 .. 23] from [24 .. 27] len */ magic = ldl_be_p(buf); request->type = ldl_be_p(buf + 4); request->handle = ldq_be_p(buf + 8); request->from = ldq_be_p(buf + 16); request->len = ldl_be_p(buf + 24); TRACE("Got request: { magic = 0x%" PRIx32 ", .type = %" PRIx32 ", from = %" PRIu64 " , len = %" PRIu32 " }", magic, request->type, request->from, request->len); if (magic != NBD_REQUEST_MAGIC) { LOG("invalid magic (got 0x%" PRIx32 ")", magic); return -EINVAL; } return 0; }
3,772
0
BlockDriverAIOCB *laio_submit(BlockDriverState *bs, void *aio_ctx, int fd, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque, int type) { struct qemu_laio_state *s = aio_ctx; struct qemu_laiocb *laiocb; struct iocb *iocbs; off_t offset = sector_num * 512; laiocb = qemu_aio_get(&laio_pool, bs, cb, opaque); if (!laiocb) return NULL; laiocb->nbytes = nb_sectors * 512; laiocb->ctx = s; laiocb->ret = -EINPROGRESS; laiocb->async_context_id = get_async_context_id(); iocbs = &laiocb->iocb; switch (type) { case QEMU_AIO_WRITE: io_prep_pwritev(iocbs, fd, qiov->iov, qiov->niov, offset); break; case QEMU_AIO_READ: io_prep_preadv(iocbs, fd, qiov->iov, qiov->niov, offset); break; default: fprintf(stderr, "%s: invalid AIO request type 0x%x.\n", __func__, type); goto out_free_aiocb; } io_set_eventfd(&laiocb->iocb, s->efd); s->count++; if (io_submit(s->ctx, 1, &iocbs) < 0) goto out_dec_count; return &laiocb->common; out_free_aiocb: qemu_aio_release(laiocb); out_dec_count: s->count--; return NULL; }
3,773
0
void helper_cpuid(void) { if (EAX == 0) { EAX = 1; /* max EAX index supported */ EBX = 0x756e6547; ECX = 0x6c65746e; EDX = 0x49656e69; } else { /* EAX = 1 info */ EAX = 0x52b; EBX = 0; ECX = 0; EDX = CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CX8; } }
3,775
0
void ff_vc1_pred_mv_intfr(VC1Context *v, int n, int dmv_x, int dmv_y, int mvn, int r_x, int r_y, uint8_t* is_intra, int dir) { MpegEncContext *s = &v->s; int xy, wrap, off = 0; int A[2], B[2], C[2]; int px, py; int a_valid = 0, b_valid = 0, c_valid = 0; int field_a, field_b, field_c; // 0: same, 1: opposit int total_valid, num_samefield, num_oppfield; int pos_c, pos_b, n_adj; wrap = s->b8_stride; xy = s->block_index[n]; if (s->mb_intra) { s->mv[0][n][0] = s->current_picture.motion_val[0][xy][0] = 0; s->mv[0][n][1] = s->current_picture.motion_val[0][xy][1] = 0; s->current_picture.motion_val[1][xy][0] = 0; s->current_picture.motion_val[1][xy][1] = 0; if (mvn == 1) { /* duplicate motion data for 1-MV block */ s->current_picture.motion_val[0][xy + 1][0] = 0; s->current_picture.motion_val[0][xy + 1][1] = 0; s->current_picture.motion_val[0][xy + wrap][0] = 0; s->current_picture.motion_val[0][xy + wrap][1] = 0; s->current_picture.motion_val[0][xy + wrap + 1][0] = 0; s->current_picture.motion_val[0][xy + wrap + 1][1] = 0; v->luma_mv[s->mb_x][0] = v->luma_mv[s->mb_x][1] = 0; s->current_picture.motion_val[1][xy + 1][0] = 0; s->current_picture.motion_val[1][xy + 1][1] = 0; s->current_picture.motion_val[1][xy + wrap][0] = 0; s->current_picture.motion_val[1][xy + wrap][1] = 0; s->current_picture.motion_val[1][xy + wrap + 1][0] = 0; s->current_picture.motion_val[1][xy + wrap + 1][1] = 0; } return; } off = ((n == 0) || (n == 1)) ? 1 : -1; /* predict A */ if (s->mb_x || (n == 1) || (n == 3)) { if ((v->blk_mv_type[xy]) // current block (MB) has a field MV || (!v->blk_mv_type[xy] && !v->blk_mv_type[xy - 1])) { // or both have frame MV A[0] = s->current_picture.motion_val[dir][xy - 1][0]; A[1] = s->current_picture.motion_val[dir][xy - 1][1]; a_valid = 1; } else { // current block has frame mv and cand. has field MV (so average) A[0] = (s->current_picture.motion_val[dir][xy - 1][0] + s->current_picture.motion_val[dir][xy - 1 + off * wrap][0] + 1) >> 1; A[1] = (s->current_picture.motion_val[dir][xy - 1][1] + s->current_picture.motion_val[dir][xy - 1 + off * wrap][1] + 1) >> 1; a_valid = 1; } if (!(n & 1) && v->is_intra[s->mb_x - 1]) { a_valid = 0; A[0] = A[1] = 0; } } else A[0] = A[1] = 0; /* Predict B and C */ B[0] = B[1] = C[0] = C[1] = 0; if (n == 0 || n == 1 || v->blk_mv_type[xy]) { if (!s->first_slice_line) { if (!v->is_intra[s->mb_x - s->mb_stride]) { b_valid = 1; n_adj = n | 2; pos_b = s->block_index[n_adj] - 2 * wrap; if (v->blk_mv_type[pos_b] && v->blk_mv_type[xy]) { n_adj = (n & 2) | (n & 1); } B[0] = s->current_picture.motion_val[dir][s->block_index[n_adj] - 2 * wrap][0]; B[1] = s->current_picture.motion_val[dir][s->block_index[n_adj] - 2 * wrap][1]; if (v->blk_mv_type[pos_b] && !v->blk_mv_type[xy]) { B[0] = (B[0] + s->current_picture.motion_val[dir][s->block_index[n_adj ^ 2] - 2 * wrap][0] + 1) >> 1; B[1] = (B[1] + s->current_picture.motion_val[dir][s->block_index[n_adj ^ 2] - 2 * wrap][1] + 1) >> 1; } } if (s->mb_width > 1) { if (!v->is_intra[s->mb_x - s->mb_stride + 1]) { c_valid = 1; n_adj = 2; pos_c = s->block_index[2] - 2 * wrap + 2; if (v->blk_mv_type[pos_c] && v->blk_mv_type[xy]) { n_adj = n & 2; } C[0] = s->current_picture.motion_val[dir][s->block_index[n_adj] - 2 * wrap + 2][0]; C[1] = s->current_picture.motion_val[dir][s->block_index[n_adj] - 2 * wrap + 2][1]; if (v->blk_mv_type[pos_c] && !v->blk_mv_type[xy]) { C[0] = (1 + C[0] + (s->current_picture.motion_val[dir][s->block_index[n_adj ^ 2] - 2 * wrap + 2][0])) >> 1; C[1] = (1 + C[1] + (s->current_picture.motion_val[dir][s->block_index[n_adj ^ 2] - 2 * wrap + 2][1])) >> 1; } if (s->mb_x == s->mb_width - 1) { if (!v->is_intra[s->mb_x - s->mb_stride - 1]) { c_valid = 1; n_adj = 3; pos_c = s->block_index[3] - 2 * wrap - 2; if (v->blk_mv_type[pos_c] && v->blk_mv_type[xy]) { n_adj = n | 1; } C[0] = s->current_picture.motion_val[dir][s->block_index[n_adj] - 2 * wrap - 2][0]; C[1] = s->current_picture.motion_val[dir][s->block_index[n_adj] - 2 * wrap - 2][1]; if (v->blk_mv_type[pos_c] && !v->blk_mv_type[xy]) { C[0] = (1 + C[0] + s->current_picture.motion_val[dir][s->block_index[1] - 2 * wrap - 2][0]) >> 1; C[1] = (1 + C[1] + s->current_picture.motion_val[dir][s->block_index[1] - 2 * wrap - 2][1]) >> 1; } } else c_valid = 0; } } } } } else { pos_b = s->block_index[1]; b_valid = 1; B[0] = s->current_picture.motion_val[dir][pos_b][0]; B[1] = s->current_picture.motion_val[dir][pos_b][1]; pos_c = s->block_index[0]; c_valid = 1; C[0] = s->current_picture.motion_val[dir][pos_c][0]; C[1] = s->current_picture.motion_val[dir][pos_c][1]; } total_valid = a_valid + b_valid + c_valid; // check if predictor A is out of bounds if (!s->mb_x && !(n == 1 || n == 3)) { A[0] = A[1] = 0; } // check if predictor B is out of bounds if ((s->first_slice_line && v->blk_mv_type[xy]) || (s->first_slice_line && !(n & 2))) { B[0] = B[1] = C[0] = C[1] = 0; } if (!v->blk_mv_type[xy]) { if (s->mb_width == 1) { px = B[0]; py = B[1]; } else { if (total_valid >= 2) { px = mid_pred(A[0], B[0], C[0]); py = mid_pred(A[1], B[1], C[1]); } else if (total_valid) { if (a_valid) { px = A[0]; py = A[1]; } if (b_valid) { px = B[0]; py = B[1]; } if (c_valid) { px = C[0]; py = C[1]; } } else px = py = 0; } } else { if (a_valid) field_a = (A[1] & 4) ? 1 : 0; else field_a = 0; if (b_valid) field_b = (B[1] & 4) ? 1 : 0; else field_b = 0; if (c_valid) field_c = (C[1] & 4) ? 1 : 0; else field_c = 0; num_oppfield = field_a + field_b + field_c; num_samefield = total_valid - num_oppfield; if (total_valid == 3) { if ((num_samefield == 3) || (num_oppfield == 3)) { px = mid_pred(A[0], B[0], C[0]); py = mid_pred(A[1], B[1], C[1]); } else if (num_samefield >= num_oppfield) { /* take one MV from same field set depending on priority the check for B may not be necessary */ px = !field_a ? A[0] : B[0]; py = !field_a ? A[1] : B[1]; } else { px = field_a ? A[0] : B[0]; py = field_a ? A[1] : B[1]; } } else if (total_valid == 2) { if (num_samefield >= num_oppfield) { if (!field_a && a_valid) { px = A[0]; py = A[1]; } else if (!field_b && b_valid) { px = B[0]; py = B[1]; } else if (c_valid) { px = C[0]; py = C[1]; } } else { if (field_a && a_valid) { px = A[0]; py = A[1]; } else if (field_b && b_valid) { px = B[0]; py = B[1]; } } } else if (total_valid == 1) { px = (a_valid) ? A[0] : ((b_valid) ? B[0] : C[0]); py = (a_valid) ? A[1] : ((b_valid) ? B[1] : C[1]); } else px = py = 0; } /* store MV using signed modulus of MV range defined in 4.11 */ s->mv[dir][n][0] = s->current_picture.motion_val[dir][xy][0] = ((px + dmv_x + r_x) & ((r_x << 1) - 1)) - r_x; s->mv[dir][n][1] = s->current_picture.motion_val[dir][xy][1] = ((py + dmv_y + r_y) & ((r_y << 1) - 1)) - r_y; if (mvn == 1) { /* duplicate motion data for 1-MV block */ s->current_picture.motion_val[dir][xy + 1 ][0] = s->current_picture.motion_val[dir][xy][0]; s->current_picture.motion_val[dir][xy + 1 ][1] = s->current_picture.motion_val[dir][xy][1]; s->current_picture.motion_val[dir][xy + wrap ][0] = s->current_picture.motion_val[dir][xy][0]; s->current_picture.motion_val[dir][xy + wrap ][1] = s->current_picture.motion_val[dir][xy][1]; s->current_picture.motion_val[dir][xy + wrap + 1][0] = s->current_picture.motion_val[dir][xy][0]; s->current_picture.motion_val[dir][xy + wrap + 1][1] = s->current_picture.motion_val[dir][xy][1]; } else if (mvn == 2) { /* duplicate motion data for 2-Field MV block */ s->current_picture.motion_val[dir][xy + 1][0] = s->current_picture.motion_val[dir][xy][0]; s->current_picture.motion_val[dir][xy + 1][1] = s->current_picture.motion_val[dir][xy][1]; s->mv[dir][n + 1][0] = s->mv[dir][n][0]; s->mv[dir][n + 1][1] = s->mv[dir][n][1]; } }
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static inline void gen_stack_update(DisasContext *s, int addend) { #ifdef TARGET_X86_64 if (CODE64(s)) { gen_op_addq_ESP_im(addend); } else #endif if (s->ss32) { gen_op_addl_ESP_im(addend); } else { gen_op_addw_ESP_im(addend); } }
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void ide_exec_cmd(IDEBus *bus, uint32_t val) { uint16_t *identify_data; IDEState *s; int n; #if defined(DEBUG_IDE) printf("ide: CMD=%02x\n", val); #endif s = idebus_active_if(bus); /* ignore commands to non existent slave */ if (s != bus->ifs && !s->bs) return; /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */ if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET) return; if (!ide_cmd_permitted(s, val)) { goto abort_cmd; } if (ide_cmd_table[val].handler != NULL) { bool complete; s->status = READY_STAT | BUSY_STAT; s->error = 0; complete = ide_cmd_table[val].handler(s, val); if (complete) { s->status &= ~BUSY_STAT; assert(!!s->error == !!(s->status & ERR_STAT)); if ((ide_cmd_table[val].flags & SET_DSC) && !s->error) { s->status |= SEEK_STAT; } ide_set_irq(s->bus); } return; } switch(val) { case WIN_CHECKPOWERMODE1: case WIN_CHECKPOWERMODE2: s->error = 0; s->nsector = 0xff; /* device active or idle */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case WIN_SETFEATURES: if (!s->bs) goto abort_cmd; /* XXX: valid for CDROM ? */ switch(s->feature) { case 0x02: /* write cache enable */ bdrv_set_enable_write_cache(s->bs, true); identify_data = (uint16_t *)s->identify_data; put_le16(identify_data + 85, (1 << 14) | (1 << 5) | 1); s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case 0x82: /* write cache disable */ bdrv_set_enable_write_cache(s->bs, false); identify_data = (uint16_t *)s->identify_data; put_le16(identify_data + 85, (1 << 14) | 1); ide_flush_cache(s); break; case 0xcc: /* reverting to power-on defaults enable */ case 0x66: /* reverting to power-on defaults disable */ case 0xaa: /* read look-ahead enable */ case 0x55: /* read look-ahead disable */ case 0x05: /* set advanced power management mode */ case 0x85: /* disable advanced power management mode */ case 0x69: /* NOP */ case 0x67: /* NOP */ case 0x96: /* NOP */ case 0x9a: /* NOP */ case 0x42: /* enable Automatic Acoustic Mode */ case 0xc2: /* disable Automatic Acoustic Mode */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case 0x03: { /* set transfer mode */ uint8_t val = s->nsector & 0x07; identify_data = (uint16_t *)s->identify_data; switch (s->nsector >> 3) { case 0x00: /* pio default */ case 0x01: /* pio mode */ put_le16(identify_data + 62,0x07); put_le16(identify_data + 63,0x07); put_le16(identify_data + 88,0x3f); break; case 0x02: /* sigle word dma mode*/ put_le16(identify_data + 62,0x07 | (1 << (val + 8))); put_le16(identify_data + 63,0x07); put_le16(identify_data + 88,0x3f); break; case 0x04: /* mdma mode */ put_le16(identify_data + 62,0x07); put_le16(identify_data + 63,0x07 | (1 << (val + 8))); put_le16(identify_data + 88,0x3f); break; case 0x08: /* udma mode */ put_le16(identify_data + 62,0x07); put_le16(identify_data + 63,0x07); put_le16(identify_data + 88,0x3f | (1 << (val + 8))); break; default: goto abort_cmd; } s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; } default: goto abort_cmd; } break; case WIN_FLUSH_CACHE: case WIN_FLUSH_CACHE_EXT: ide_flush_cache(s); break; case WIN_SEEK: /* XXX: Check that seek is within bounds */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; /* ATAPI commands */ case WIN_PIDENTIFY: ide_atapi_identify(s); s->status = READY_STAT | SEEK_STAT; ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop); ide_set_irq(s->bus); break; case WIN_DIAGNOSE: ide_set_signature(s); if (s->drive_kind == IDE_CD) s->status = 0; /* ATAPI spec (v6) section 9.10 defines packet * devices to return a clear status register * with READY_STAT *not* set. */ else s->status = READY_STAT | SEEK_STAT; s->error = 0x01; /* Device 0 passed, Device 1 passed or not * present. */ ide_set_irq(s->bus); break; case WIN_DEVICE_RESET: ide_set_signature(s); s->status = 0x00; /* NOTE: READY is _not_ set */ s->error = 0x01; break; case WIN_PACKETCMD: /* overlapping commands not supported */ if (s->feature & 0x02) goto abort_cmd; s->status = READY_STAT | SEEK_STAT; s->atapi_dma = s->feature & 1; s->nsector = 1; ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE, ide_atapi_cmd); break; /* CF-ATA commands */ case CFA_REQ_EXT_ERROR_CODE: s->error = 0x09; /* miscellaneous error */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case CFA_ERASE_SECTORS: case CFA_WEAR_LEVEL: #if 0 /* This one has the same ID as CFA_WEAR_LEVEL and is required for Windows 8 to work with AHCI */ case WIN_SECURITY_FREEZE_LOCK: #endif if (val == CFA_WEAR_LEVEL) s->nsector = 0; if (val == CFA_ERASE_SECTORS) s->media_changed = 1; s->error = 0x00; s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case CFA_TRANSLATE_SECTOR: s->error = 0x00; s->status = READY_STAT | SEEK_STAT; memset(s->io_buffer, 0, 0x200); s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */ s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */ s->io_buffer[0x02] = s->select; /* Head */ s->io_buffer[0x03] = s->sector; /* Sector */ s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */ s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */ s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */ s->io_buffer[0x13] = 0x00; /* Erase flag */ s->io_buffer[0x18] = 0x00; /* Hot count */ s->io_buffer[0x19] = 0x00; /* Hot count */ s->io_buffer[0x1a] = 0x01; /* Hot count */ ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop); ide_set_irq(s->bus); break; case CFA_ACCESS_METADATA_STORAGE: switch (s->feature) { case 0x02: /* Inquiry Metadata Storage */ ide_cfata_metadata_inquiry(s); break; case 0x03: /* Read Metadata Storage */ ide_cfata_metadata_read(s); break; case 0x04: /* Write Metadata Storage */ ide_cfata_metadata_write(s); break; default: goto abort_cmd; } ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop); s->status = 0x00; /* NOTE: READY is _not_ set */ ide_set_irq(s->bus); break; case IBM_SENSE_CONDITION: switch (s->feature) { case 0x01: /* sense temperature in device */ s->nsector = 0x50; /* +20 C */ break; default: goto abort_cmd; } s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case WIN_SMART: if (s->hcyl != 0xc2 || s->lcyl != 0x4f) goto abort_cmd; if (!s->smart_enabled && s->feature != SMART_ENABLE) goto abort_cmd; switch (s->feature) { case SMART_DISABLE: s->smart_enabled = 0; s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case SMART_ENABLE: s->smart_enabled = 1; s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case SMART_ATTR_AUTOSAVE: switch (s->sector) { case 0x00: s->smart_autosave = 0; break; case 0xf1: s->smart_autosave = 1; break; default: goto abort_cmd; } s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case SMART_STATUS: if (!s->smart_errors) { s->hcyl = 0xc2; s->lcyl = 0x4f; } else { s->hcyl = 0x2c; s->lcyl = 0xf4; } s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; case SMART_READ_THRESH: memset(s->io_buffer, 0, 0x200); s->io_buffer[0] = 0x01; /* smart struct version */ for (n = 0; n < ARRAY_SIZE(smart_attributes); n++) { s->io_buffer[2+0+(n*12)] = smart_attributes[n][0]; s->io_buffer[2+1+(n*12)] = smart_attributes[n][11]; } for (n=0; n<511; n++) /* checksum */ s->io_buffer[511] += s->io_buffer[n]; s->io_buffer[511] = 0x100 - s->io_buffer[511]; s->status = READY_STAT | SEEK_STAT; ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop); ide_set_irq(s->bus); break; case SMART_READ_DATA: memset(s->io_buffer, 0, 0x200); s->io_buffer[0] = 0x01; /* smart struct version */ for (n = 0; n < ARRAY_SIZE(smart_attributes); n++) { int i; for(i = 0; i < 11; i++) { s->io_buffer[2+i+(n*12)] = smart_attributes[n][i]; } } s->io_buffer[362] = 0x02 | (s->smart_autosave?0x80:0x00); if (s->smart_selftest_count == 0) { s->io_buffer[363] = 0; } else { s->io_buffer[363] = s->smart_selftest_data[3 + (s->smart_selftest_count - 1) * 24]; } s->io_buffer[364] = 0x20; s->io_buffer[365] = 0x01; /* offline data collection capacity: execute + self-test*/ s->io_buffer[367] = (1<<4 | 1<<3 | 1); s->io_buffer[368] = 0x03; /* smart capability (1) */ s->io_buffer[369] = 0x00; /* smart capability (2) */ s->io_buffer[370] = 0x01; /* error logging supported */ s->io_buffer[372] = 0x02; /* minutes for poll short test */ s->io_buffer[373] = 0x36; /* minutes for poll ext test */ s->io_buffer[374] = 0x01; /* minutes for poll conveyance */ for (n=0; n<511; n++) s->io_buffer[511] += s->io_buffer[n]; s->io_buffer[511] = 0x100 - s->io_buffer[511]; s->status = READY_STAT | SEEK_STAT; ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop); ide_set_irq(s->bus); break; case SMART_READ_LOG: switch (s->sector) { case 0x01: /* summary smart error log */ memset(s->io_buffer, 0, 0x200); s->io_buffer[0] = 0x01; s->io_buffer[1] = 0x00; /* no error entries */ s->io_buffer[452] = s->smart_errors & 0xff; s->io_buffer[453] = (s->smart_errors & 0xff00) >> 8; for (n=0; n<511; n++) s->io_buffer[511] += s->io_buffer[n]; s->io_buffer[511] = 0x100 - s->io_buffer[511]; break; case 0x06: /* smart self test log */ memset(s->io_buffer, 0, 0x200); s->io_buffer[0] = 0x01; if (s->smart_selftest_count == 0) { s->io_buffer[508] = 0; } else { s->io_buffer[508] = s->smart_selftest_count; for (n=2; n<506; n++) s->io_buffer[n] = s->smart_selftest_data[n]; } for (n=0; n<511; n++) s->io_buffer[511] += s->io_buffer[n]; s->io_buffer[511] = 0x100 - s->io_buffer[511]; break; default: goto abort_cmd; } s->status = READY_STAT | SEEK_STAT; ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop); ide_set_irq(s->bus); break; case SMART_EXECUTE_OFFLINE: switch (s->sector) { case 0: /* off-line routine */ case 1: /* short self test */ case 2: /* extended self test */ s->smart_selftest_count++; if(s->smart_selftest_count > 21) s->smart_selftest_count = 0; n = 2 + (s->smart_selftest_count - 1) * 24; s->smart_selftest_data[n] = s->sector; s->smart_selftest_data[n+1] = 0x00; /* OK and finished */ s->smart_selftest_data[n+2] = 0x34; /* hour count lsb */ s->smart_selftest_data[n+3] = 0x12; /* hour count msb */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s->bus); break; default: goto abort_cmd; } break; default: goto abort_cmd; } break; default: /* should not be reachable */ abort_cmd: ide_abort_command(s); ide_set_irq(s->bus); break; } }
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void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, DeviceState *dev, Error **errp) { PCIDevice *pdev = PCI_DEVICE(dev); int slot = PCI_SLOT(pdev->devfn); int bsel = acpi_pcihp_get_bsel(pdev->bus); if (bsel < 0) { error_setg(errp, "Unsupported bus. Bus doesn't have property '" ACPI_PCIHP_PROP_BSEL "' set"); return; } /* Don't send event when device is enabled during qemu machine creation: * it is present on boot, no hotplug event is necessary. We do send an * event when the device is disabled later. */ if (!dev->hotplugged) { return; } s->acpi_pcihp_pci_status[bsel].up |= (1U << slot); acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS); }
3,780
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void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) { GArray *table_offsets; unsigned dsdt, rsdt; VirtAcpiCpuInfo cpuinfo; GArray *tables_blob = tables->table_data; virt_acpi_get_cpu_info(&cpuinfo); table_offsets = g_array_new(false, true /* clear */, sizeof(uint32_t)); bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE, 64, false /* high memory */); /* * The ACPI v5.1 tables for Hardware-reduced ACPI platform are: * RSDP * RSDT * FADT * GTDT * MADT * MCFG * DSDT */ /* DSDT is pointed to by FADT */ dsdt = tables_blob->len; build_dsdt(tables_blob, tables->linker, guest_info); /* FADT MADT GTDT MCFG SPCR pointed to by RSDT */ acpi_add_table(table_offsets, tables_blob); build_fadt(tables_blob, tables->linker, dsdt); acpi_add_table(table_offsets, tables_blob); build_madt(tables_blob, tables->linker, guest_info, &cpuinfo); acpi_add_table(table_offsets, tables_blob); build_gtdt(tables_blob, tables->linker); acpi_add_table(table_offsets, tables_blob); build_mcfg(tables_blob, tables->linker, guest_info); acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, guest_info); /* RSDT is pointed to by RSDP */ rsdt = tables_blob->len; build_rsdt(tables_blob, tables->linker, table_offsets); /* RSDP is in FSEG memory, so allocate it separately */ build_rsdp(tables->rsdp, tables->linker, rsdt); /* Cleanup memory that's no longer used. */ g_array_free(table_offsets, true); }
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static void code_gen_alloc(unsigned long tb_size) { #ifdef USE_STATIC_CODE_GEN_BUFFER code_gen_buffer = static_code_gen_buffer; code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE; map_exec(code_gen_buffer, code_gen_buffer_size); #else code_gen_buffer_size = tb_size; if (code_gen_buffer_size == 0) { #if defined(CONFIG_USER_ONLY) /* in user mode, phys_ram_size is not meaningful */ code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE; #else /* XXX: needs adjustments */ code_gen_buffer_size = (unsigned long)(ram_size / 4); #endif } if (code_gen_buffer_size < MIN_CODE_GEN_BUFFER_SIZE) code_gen_buffer_size = MIN_CODE_GEN_BUFFER_SIZE; /* The code gen buffer location may have constraints depending on the host cpu and OS */ #if defined(__linux__) { int flags; void *start = NULL; flags = MAP_PRIVATE | MAP_ANONYMOUS; #if defined(__x86_64__) flags |= MAP_32BIT; /* Cannot map more than that */ if (code_gen_buffer_size > (800 * 1024 * 1024)) code_gen_buffer_size = (800 * 1024 * 1024); #elif defined(__sparc_v9__) // Map the buffer below 2G, so we can use direct calls and branches flags |= MAP_FIXED; start = (void *) 0x60000000UL; if (code_gen_buffer_size > (512 * 1024 * 1024)) code_gen_buffer_size = (512 * 1024 * 1024); #elif defined(__arm__) /* Map the buffer below 32M, so we can use direct calls and branches */ flags |= MAP_FIXED; start = (void *) 0x01000000UL; if (code_gen_buffer_size > 16 * 1024 * 1024) code_gen_buffer_size = 16 * 1024 * 1024; #elif defined(__s390x__) /* Map the buffer so that we can use direct calls and branches. */ /* We have a +- 4GB range on the branches; leave some slop. */ if (code_gen_buffer_size > (3ul * 1024 * 1024 * 1024)) { code_gen_buffer_size = 3ul * 1024 * 1024 * 1024; } start = (void *)0x90000000UL; #endif code_gen_buffer = mmap(start, code_gen_buffer_size, PROT_WRITE | PROT_READ | PROT_EXEC, flags, -1, 0); if (code_gen_buffer == MAP_FAILED) { fprintf(stderr, "Could not allocate dynamic translator buffer\n"); exit(1); } } #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) \ || defined(__DragonFly__) || defined(__OpenBSD__) { int flags; void *addr = NULL; flags = MAP_PRIVATE | MAP_ANONYMOUS; #if defined(__x86_64__) /* FreeBSD doesn't have MAP_32BIT, use MAP_FIXED and assume * 0x40000000 is free */ flags |= MAP_FIXED; addr = (void *)0x40000000; /* Cannot map more than that */ if (code_gen_buffer_size > (800 * 1024 * 1024)) code_gen_buffer_size = (800 * 1024 * 1024); #elif defined(__sparc_v9__) // Map the buffer below 2G, so we can use direct calls and branches flags |= MAP_FIXED; addr = (void *) 0x60000000UL; if (code_gen_buffer_size > (512 * 1024 * 1024)) { code_gen_buffer_size = (512 * 1024 * 1024); } #endif code_gen_buffer = mmap(addr, code_gen_buffer_size, PROT_WRITE | PROT_READ | PROT_EXEC, flags, -1, 0); if (code_gen_buffer == MAP_FAILED) { fprintf(stderr, "Could not allocate dynamic translator buffer\n"); exit(1); } } #else code_gen_buffer = qemu_malloc(code_gen_buffer_size); map_exec(code_gen_buffer, code_gen_buffer_size); #endif #endif /* !USE_STATIC_CODE_GEN_BUFFER */ map_exec(code_gen_prologue, sizeof(code_gen_prologue)); code_gen_buffer_max_size = code_gen_buffer_size - (TCG_MAX_OP_SIZE * OPC_MAX_SIZE); code_gen_max_blocks = code_gen_buffer_size / CODE_GEN_AVG_BLOCK_SIZE; tbs = qemu_malloc(code_gen_max_blocks * sizeof(TranslationBlock)); }
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static void spapr_cpu_core_register_types(void) { const SPAPRCoreInfo *info = spapr_cores; type_register_static(&spapr_cpu_core_type_info); while (info->name) { spapr_cpu_core_register(info); info++; } }
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void address_space_rw(AddressSpace *as, target_phys_addr_t addr, uint8_t *buf, int len, bool is_write) { AddressSpaceDispatch *d = as->dispatch; int l; uint8_t *ptr; uint32_t val; target_phys_addr_t page; MemoryRegionSection *section; while (len > 0) { page = addr & TARGET_PAGE_MASK; l = (page + TARGET_PAGE_SIZE) - addr; if (l > len) l = len; section = phys_page_find(d, page >> TARGET_PAGE_BITS); if (is_write) { if (!memory_region_is_ram(section->mr)) { target_phys_addr_t addr1; addr1 = memory_region_section_addr(section, addr); /* XXX: could force cpu_single_env to NULL to avoid potential bugs */ if (l >= 4 && ((addr1 & 3) == 0)) { /* 32 bit write access */ val = ldl_p(buf); io_mem_write(section->mr, addr1, val, 4); l = 4; } else if (l >= 2 && ((addr1 & 1) == 0)) { /* 16 bit write access */ val = lduw_p(buf); io_mem_write(section->mr, addr1, val, 2); l = 2; } else { /* 8 bit write access */ val = ldub_p(buf); io_mem_write(section->mr, addr1, val, 1); l = 1; } } else if (!section->readonly) { ram_addr_t addr1; addr1 = memory_region_get_ram_addr(section->mr) + memory_region_section_addr(section, addr); /* RAM case */ ptr = qemu_get_ram_ptr(addr1); memcpy(ptr, buf, l); invalidate_and_set_dirty(addr1, l); qemu_put_ram_ptr(ptr); } } else { if (!(memory_region_is_ram(section->mr) || memory_region_is_romd(section->mr))) { target_phys_addr_t addr1; /* I/O case */ addr1 = memory_region_section_addr(section, addr); if (l >= 4 && ((addr1 & 3) == 0)) { /* 32 bit read access */ val = io_mem_read(section->mr, addr1, 4); stl_p(buf, val); l = 4; } else if (l >= 2 && ((addr1 & 1) == 0)) { /* 16 bit read access */ val = io_mem_read(section->mr, addr1, 2); stw_p(buf, val); l = 2; } else { /* 8 bit read access */ val = io_mem_read(section->mr, addr1, 1); stb_p(buf, val); l = 1; } } else { /* RAM case */ ptr = qemu_get_ram_ptr(section->mr->ram_addr + memory_region_section_addr(section, addr)); memcpy(buf, ptr, l); qemu_put_ram_ptr(ptr); } } len -= l; buf += l; addr += l; } }
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float32 int64_to_float32( int64 a STATUS_PARAM ) { flag zSign; uint64 absA; int8 shiftCount; if ( a == 0 ) return 0; zSign = ( a < 0 ); absA = zSign ? - a : a; shiftCount = countLeadingZeros64( absA ) - 40; if ( 0 <= shiftCount ) { return packFloat32( zSign, 0x95 - shiftCount, absA<<shiftCount ); } else { shiftCount += 7; if ( shiftCount < 0 ) { shift64RightJamming( absA, - shiftCount, &absA ); } else { absA <<= shiftCount; } return roundAndPackFloat32( zSign, 0x9C - shiftCount, absA STATUS_VAR ); } }
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void clear_blocks_dcbz32_ppc(DCTELEM *blocks) { POWERPC_TBL_DECLARE(powerpc_clear_blocks_dcbz32, 1); register int misal = ((unsigned long)blocks & 0x00000010); register int i = 0; POWERPC_TBL_START_COUNT(powerpc_clear_blocks_dcbz32, 1); #if 1 if (misal) { ((unsigned long*)blocks)[0] = 0L; ((unsigned long*)blocks)[1] = 0L; ((unsigned long*)blocks)[2] = 0L; ((unsigned long*)blocks)[3] = 0L; i += 16; } for ( ; i < sizeof(DCTELEM)*6*64 ; i += 32) { asm volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory"); } if (misal) { ((unsigned long*)blocks)[188] = 0L; ((unsigned long*)blocks)[189] = 0L; ((unsigned long*)blocks)[190] = 0L; ((unsigned long*)blocks)[191] = 0L; i += 16; } #else memset(blocks, 0, sizeof(DCTELEM)*6*64); #endif POWERPC_TBL_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1); }
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static uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri) { /* Raw read of a coprocessor register (as needed for migration, etc). */ if (ri->type & ARM_CP_CONST) { return ri->resetvalue; } else if (ri->raw_readfn) { return ri->raw_readfn(env, ri); } else if (ri->readfn) { return ri->readfn(env, ri); } else { return raw_read(env, ri); } }
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static void exec_accept_incoming_migration(void *opaque) { QEMUFile *f = opaque; int ret; ret = qemu_loadvm_state(f); if (ret < 0) { fprintf(stderr, "load of migration failed\n"); goto err; } qemu_announce_self(); DPRINTF("successfully loaded vm state\n"); /* we've successfully migrated, close the fd */ qemu_set_fd_handler2(qemu_stdio_fd(f), NULL, NULL, NULL, NULL); if (autostart) vm_start(); err: qemu_fclose(f); }
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static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, enum mainstone_model_e model, int arm_id) { uint32_t sector_len = 256 * 1024; target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 }; struct pxa2xx_state_s *cpu; qemu_irq *mst_irq; int i, index; if (!cpu_model) cpu_model = "pxa270-c5"; /* Setup CPU & memory */ if (ram_size < MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH + PXA2XX_INTERNAL_SIZE) { fprintf(stderr, "This platform requires %i bytes of memory\n", MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH + PXA2XX_INTERNAL_SIZE); exit(1); } cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model); cpu_register_physical_memory(0, MAINSTONE_ROM, qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM); /* Setup initial (reset) machine state */ cpu->env->regs[15] = mainstone_binfo.loader_start; /* There are two 32MiB flash devices on the board */ for (i = 0; i < 2; i ++) { index = drive_get_index(IF_PFLASH, 0, i); if (index == -1) { fprintf(stderr, "Two flash images must be given with the " "'pflash' parameter\n"); exit(1); } if (!pflash_cfi01_register(mainstone_flash_base[i], qemu_ram_alloc(MAINSTONE_FLASH), drives_table[index].bdrv, sector_len, MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); exit(1); } } mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0); /* setup keypad */ printf("map addr %p\n", &map); pxa27x_register_keypad(cpu->kp, map, 0xe0); /* MMC/SD host */ pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]); smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]); mainstone_binfo.kernel_filename = kernel_filename; mainstone_binfo.kernel_cmdline = kernel_cmdline; mainstone_binfo.initrd_filename = initrd_filename; mainstone_binfo.board_id = arm_id; arm_load_kernel(cpu->env, &mainstone_binfo); }
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static void spapr_msi_setmsg(PCIDevice *pdev, hwaddr addr, bool msix, unsigned req_num) { unsigned i; MSIMessage msg = { .address = addr, .data = 0 }; if (!msix) { msi_set_message(pdev, msg); trace_spapr_pci_msi_setup(pdev->name, 0, msg.address); return; } for (i = 0; i < req_num; ++i) { msg.address = addr | (i << 2); msix_set_message(pdev, i, msg); trace_spapr_pci_msi_setup(pdev->name, i, msg.address); } }
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static SocketAddressLegacy *nbd_build_socket_address(const char *sockpath, const char *bindto, const char *port) { SocketAddressLegacy *saddr; saddr = g_new0(SocketAddressLegacy, 1); if (sockpath) { saddr->type = SOCKET_ADDRESS_LEGACY_KIND_UNIX; saddr->u.q_unix.data = g_new0(UnixSocketAddress, 1); saddr->u.q_unix.data->path = g_strdup(sockpath); } else { InetSocketAddress *inet; saddr->type = SOCKET_ADDRESS_LEGACY_KIND_INET; inet = saddr->u.inet.data = g_new0(InetSocketAddress, 1); inet->host = g_strdup(bindto); if (port) { inet->port = g_strdup(port); } else { inet->port = g_strdup_printf("%d", NBD_DEFAULT_PORT); } } return saddr; }
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static uint16_t blizzard_reg_read(void *opaque, uint8_t reg) { BlizzardState *s = (BlizzardState *) opaque; switch (reg) { case 0x00: /* Revision Code */ return 0xa5; case 0x02: /* Configuration Readback */ return 0x83; /* Macrovision OK, CNF[2:0] = 3 */ case 0x04: /* PLL M-Divider */ return (s->pll - 1) | (1 << 7); case 0x06: /* PLL Lock Range Control */ return s->pll_range; case 0x08: /* PLL Lock Synthesis Control 0 */ return s->pll_ctrl & 0xff; case 0x0a: /* PLL Lock Synthesis Control 1 */ return s->pll_ctrl >> 8; case 0x0c: /* PLL Mode Control 0 */ return s->pll_mode; case 0x0e: /* Clock-Source Select */ return s->clksel; case 0x10: /* Memory Controller Activate */ case 0x14: /* Memory Controller Bank 0 Status Flag */ return s->memenable; case 0x18: /* Auto-Refresh Interval Setting 0 */ return s->memrefresh & 0xff; case 0x1a: /* Auto-Refresh Interval Setting 1 */ return s->memrefresh >> 8; case 0x1c: /* Power-On Sequence Timing Control */ return s->timing[0]; case 0x1e: /* Timing Control 0 */ return s->timing[1]; case 0x20: /* Timing Control 1 */ return s->timing[2]; case 0x24: /* Arbitration Priority Control */ return s->priority; case 0x28: /* LCD Panel Configuration */ return s->lcd_config; case 0x2a: /* LCD Horizontal Display Width */ return s->x >> 3; case 0x2c: /* LCD Horizontal Non-display Period */ return s->hndp; case 0x2e: /* LCD Vertical Display Height 0 */ return s->y & 0xff; case 0x30: /* LCD Vertical Display Height 1 */ return s->y >> 8; case 0x32: /* LCD Vertical Non-display Period */ return s->vndp; case 0x34: /* LCD HS Pulse-width */ return s->hsync; case 0x36: /* LCd HS Pulse Start Position */ return s->skipx >> 3; case 0x38: /* LCD VS Pulse-width */ return s->vsync; case 0x3a: /* LCD VS Pulse Start Position */ return s->skipy; case 0x3c: /* PCLK Polarity */ return s->pclk; case 0x3e: /* High-speed Serial Interface Tx Configuration Port 0 */ return s->hssi_config[0]; case 0x40: /* High-speed Serial Interface Tx Configuration Port 1 */ return s->hssi_config[1]; case 0x42: /* High-speed Serial Interface Tx Mode */ return s->hssi_config[2]; case 0x44: /* TV Display Configuration */ return s->tv_config; case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits */ return s->tv_timing[(reg - 0x46) >> 1]; case 0x4e: /* VBI: Closed Caption / XDS Control / Status */ return s->vbi; case 0x50: /* TV Horizontal Start Position */ return s->tv_x; case 0x52: /* TV Vertical Start Position */ return s->tv_y; case 0x54: /* TV Test Pattern Setting */ return s->tv_test; case 0x56: /* TV Filter Setting */ return s->tv_filter_config; case 0x58: /* TV Filter Coefficient Index */ return s->tv_filter_idx; case 0x5a: /* TV Filter Coefficient Data */ if (s->tv_filter_idx < 0x20) return s->tv_filter_coeff[s->tv_filter_idx ++]; return 0; case 0x60: /* Input YUV/RGB Translate Mode 0 */ return s->yrc[0]; case 0x62: /* Input YUV/RGB Translate Mode 1 */ return s->yrc[1]; case 0x64: /* U Data Fix */ return s->u; case 0x66: /* V Data Fix */ return s->v; case 0x68: /* Display Mode */ return s->mode; case 0x6a: /* Special Effects */ return s->effect; case 0x6c: /* Input Window X Start Position 0 */ return s->ix[0] & 0xff; case 0x6e: /* Input Window X Start Position 1 */ return s->ix[0] >> 3; case 0x70: /* Input Window Y Start Position 0 */ return s->ix[0] & 0xff; case 0x72: /* Input Window Y Start Position 1 */ return s->ix[0] >> 3; case 0x74: /* Input Window X End Position 0 */ return s->ix[1] & 0xff; case 0x76: /* Input Window X End Position 1 */ return s->ix[1] >> 3; case 0x78: /* Input Window Y End Position 0 */ return s->ix[1] & 0xff; case 0x7a: /* Input Window Y End Position 1 */ return s->ix[1] >> 3; case 0x7c: /* Output Window X Start Position 0 */ return s->ox[0] & 0xff; case 0x7e: /* Output Window X Start Position 1 */ return s->ox[0] >> 3; case 0x80: /* Output Window Y Start Position 0 */ return s->oy[0] & 0xff; case 0x82: /* Output Window Y Start Position 1 */ return s->oy[0] >> 3; case 0x84: /* Output Window X End Position 0 */ return s->ox[1] & 0xff; case 0x86: /* Output Window X End Position 1 */ return s->ox[1] >> 3; case 0x88: /* Output Window Y End Position 0 */ return s->oy[1] & 0xff; case 0x8a: /* Output Window Y End Position 1 */ return s->oy[1] >> 3; case 0x8c: /* Input Data Format */ return s->iformat; case 0x8e: /* Data Source Select */ return s->source; case 0x90: /* Display Memory Data Port */ return 0; case 0xa8: /* Border Color 0 */ return s->border_r; case 0xaa: /* Border Color 1 */ return s->border_g; case 0xac: /* Border Color 2 */ return s->border_b; case 0xb4: /* Gamma Correction Enable */ return s->gamma_config; case 0xb6: /* Gamma Correction Table Index */ return s->gamma_idx; case 0xb8: /* Gamma Correction Table Data */ return s->gamma_lut[s->gamma_idx ++]; case 0xba: /* 3x3 Matrix Enable */ return s->matrix_ena; case 0xbc ... 0xde: /* Coefficient Registers */ return s->matrix_coeff[(reg - 0xbc) >> 1]; case 0xe0: /* 3x3 Matrix Red Offset */ return s->matrix_r; case 0xe2: /* 3x3 Matrix Green Offset */ return s->matrix_g; case 0xe4: /* 3x3 Matrix Blue Offset */ return s->matrix_b; case 0xe6: /* Power-save */ return s->pm; case 0xe8: /* Non-display Period Control / Status */ return s->status | (1 << 5); case 0xea: /* RGB Interface Control */ return s->rgbgpio_dir; case 0xec: /* RGB Interface Status */ return s->rgbgpio; case 0xee: /* General-purpose IO Pins Configuration */ return s->gpio_dir; case 0xf0: /* General-purpose IO Pins Status / Control */ return s->gpio; case 0xf2: /* GPIO Positive Edge Interrupt Trigger */ return s->gpio_edge[0]; case 0xf4: /* GPIO Negative Edge Interrupt Trigger */ return s->gpio_edge[1]; case 0xf6: /* GPIO Interrupt Status */ return s->gpio_irq; case 0xf8: /* GPIO Pull-down Control */ return s->gpio_pdown; default: fprintf(stderr, "%s: unknown register %02x\n", __FUNCTION__, reg); return 0; } }
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void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, int label) { if (cond == TCG_COND_ALWAYS) { tcg_gen_br(label); } else if (cond != TCG_COND_NEVER) { tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label); } }
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