repo_name
stringlengths 4
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values |
|---|---|---|---|---|
HuangLS/neo4j
|
community/graph-algo/src/main/java/org/neo4j/graphalgo/impl/centrality/EigenvectorCentralityArnoldi.java
|
7492
|
/*
* Copyright (c) 2002-2018 "Neo Technology,"
* Network Engine for Objects in Lund AB [http://neotechnology.com]
*
* This file is part of Neo4j.
*
* Neo4j is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
package org.neo4j.graphalgo.impl.centrality;
import java.util.ArrayList;
import java.util.Map;
import java.util.Random;
import java.util.Set;
import org.neo4j.graphalgo.CostEvaluator;
import org.neo4j.graphalgo.impl.util.MatrixUtil;
import org.neo4j.graphalgo.impl.util.MatrixUtil.DoubleMatrix;
import org.neo4j.graphalgo.impl.util.MatrixUtil.DoubleVector;
import org.neo4j.graphdb.Direction;
import org.neo4j.graphdb.Node;
import org.neo4j.graphdb.Relationship;
/**
* Computing eigenvector centrality with the "Arnoldi iteration". Convergence is
* dependent of the eigenvalues of the input adjacency matrix (the network). If
* the two largest eigenvalues are u1 and u2, a small factor u2/u1 will give a
* faster convergence (i.e. faster computation). NOTE: Currently only works on
* Doubles.
* @complexity The {@link CostEvaluator} is called once for every relationship
* in each iteration. Assuming this is done in constant time, the
* total time complexity is O(j(n + m + i)) when j internal restarts
* are required and i iterations are done in the internal
* eigenvector solving of the H matrix. Typically j = the number of
* iterations / k, where normally k = 3.
* @author Patrik Larsson
* @author Anton Persson
*/
public class EigenvectorCentralityArnoldi extends EigenvectorCentralityBase
{
/**
* See {@link EigenvectorCentralityBase#EigenvectorCentralityBase(Direction, CostEvaluator, Set, Set, double)}
*/
public EigenvectorCentralityArnoldi( Direction relationDirection,
CostEvaluator<Double> costEvaluator, Set<Node> nodeSet,
Set<Relationship> relationshipSet, double precision )
{
super( relationDirection, costEvaluator, nodeSet, relationshipSet, precision );
}
/**
* This runs the Arnoldi decomposition in a specified number of steps.
*/
@Override
protected int runInternalIteration()
{
int iterations = 3;
// Create a list of the nodes, in order to quickly translate an index
// into a node.
ArrayList<Node> nodes = new ArrayList<>( nodeSet.size() );
for ( Node node : nodeSet )
{
nodes.add( node );
}
DoubleMatrix hMatrix = new DoubleMatrix();
DoubleMatrix qMatrix = new DoubleMatrix();
for ( int i = 0; i < nodes.size(); ++i )
{
qMatrix.set( 0, i, values.get( nodes.get( i ) ) );
}
int localIterations = 1;
// The main arnoldi iteration loop
while ( true )
{
incrementTotalIterations();
Map<Node, Double> newValues = processRelationships();
// Orthogonalize
for ( int j = 0; j < localIterations; ++j )
{
DoubleVector qj = qMatrix.getRow( j );
// vector product
double product = 0;
for ( int i = 0; i < nodes.size(); ++i )
{
Double d1 = newValues.get( nodes.get( i ) );
Double d2 = qj.get( i );
if ( d1 != null && d2 != null )
{
product += d1 * d2;
}
}
hMatrix.set( j, localIterations - 1, product );
if ( product != 0.0 )
{
// vector subtraction
for ( int i = 0; i < nodes.size(); ++i )
{
Node node = nodes.get( i );
Double value = newValues.get( node );
if ( value == null )
{
value = 0.0;
}
Double qValue = qj.get( i );
if ( qValue != null )
{
newValues.put( node, value - product * qValue );
}
}
}
}
double normalizeFactor = normalize( newValues );
values = newValues;
DoubleVector qVector = new DoubleVector();
for ( int i = 0; i < nodes.size(); ++i )
{
Node key = nodes.get( i );
Double value = newValues.get( key );
if ( value != null )
{
qVector.set( i, value );
}
}
qMatrix.setRow( localIterations, qVector );
if ( normalizeFactor == 0.0 || localIterations >= nodeSet.size()
|| localIterations >= iterations )
{
break;
}
hMatrix.set( localIterations, localIterations - 1, normalizeFactor );
++localIterations;
}
// employ the power method to find eigenvector to h
Random random = new Random( System.currentTimeMillis() );
DoubleVector vector = new DoubleVector();
for ( int i = 0; i < nodeSet.size(); ++i )
{
vector.set( i, random.nextDouble() );
}
MatrixUtil.normalize( vector );
boolean powerDone = false;
int its = 0;
double powerPrecision = 0.1;
while ( !powerDone )
{
DoubleVector newVector = MatrixUtil.multiply( hMatrix, vector );
MatrixUtil.normalize( newVector );
powerDone = true;
for ( Integer index : vector.getIndices() )
{
if ( newVector.get( index ) == null )
{
continue;
}
double factor = Math.abs( newVector.get( index )
/ vector.get( index ) );
if ( factor - powerPrecision > 1.0
|| factor + powerPrecision < 1.0 )
{
powerDone = false;
break;
}
}
vector = newVector;
++its;
if ( its > 100 )
{
break;
}
}
// multiply q and vector to get a ritz vector
DoubleVector ritzVector = new DoubleVector();
for ( int r = 0; r < nodeSet.size(); ++r )
{
for ( int c = 0; c < localIterations; ++c )
{
ritzVector.incrementValue( r, vector.get( c )
* qMatrix.get( c, r ) );
}
}
for ( int i = 0; i < nodeSet.size(); ++i )
{
values.put( nodes.get( i ), ritzVector.get( i ) );
}
normalize( values );
return localIterations;
}
}
|
apache-2.0
|
cloudant/sync-android
|
cloudant-sync-datastore-core/src/main/java/com/cloudant/sync/internal/documentstore/callables/GetAllRevisionsOfDocumentCallable.java
|
3855
|
/*
* Copyright © 2016, 2017 IBM Corp. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file
* except in compliance with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software distributed under the
* License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific language governing permissions
* and limitations under the License.
*/
package com.cloudant.sync.internal.documentstore.callables;
import com.cloudant.sync.documentstore.Attachment;
import com.cloudant.sync.documentstore.AttachmentException;
import com.cloudant.sync.internal.documentstore.AttachmentStreamFactory;
import com.cloudant.sync.internal.documentstore.DatabaseImpl;
import com.cloudant.sync.documentstore.DocumentStoreException;
import com.cloudant.sync.internal.documentstore.InternalDocumentRevision;
import com.cloudant.sync.internal.documentstore.DocumentRevisionTree;
import com.cloudant.sync.internal.documentstore.helpers.GetFullRevisionFromCurrentCursor;
import com.cloudant.sync.internal.sqlite.Cursor;
import com.cloudant.sync.internal.sqlite.SQLCallable;
import com.cloudant.sync.internal.sqlite.SQLDatabase;
import com.cloudant.sync.internal.util.DatabaseUtils;
import java.sql.SQLException;
import java.util.Map;
import java.util.logging.Level;
import java.util.logging.Logger;
/**
* Get all Revisions for a given Document ID, in the form of a {@code DocumentRevisionTree}
*
* @see DocumentRevisionTree
*/
public class GetAllRevisionsOfDocumentCallable implements SQLCallable<DocumentRevisionTree> {
private String docId;
private String attachmentsDir;
private AttachmentStreamFactory attachmentStreamFactory;
private static final Logger logger = Logger.getLogger(DatabaseImpl.class.getCanonicalName());
/**
* @param docId The Document ID to get the Document for
* @param attachmentsDir Location of attachments
* @param attachmentStreamFactory Factory to manage access to attachment streams
*/
public GetAllRevisionsOfDocumentCallable(String docId, String attachmentsDir,
AttachmentStreamFactory attachmentStreamFactory) {
this.docId = docId;
this.attachmentsDir = attachmentsDir;
this.attachmentStreamFactory = attachmentStreamFactory;
}
public DocumentRevisionTree call(SQLDatabase db) throws DocumentStoreException, AttachmentException {
String sql = "SELECT " + CallableSQLConstants.FULL_DOCUMENT_COLS + " FROM revs, docs " +
"WHERE docs.docid=? AND revs.doc_id = docs.doc_id ORDER BY sequence ASC";
String[] args = {docId};
Cursor cursor = null;
try {
DocumentRevisionTree tree = new DocumentRevisionTree();
cursor = db.rawQuery(sql, args);
while (cursor.moveToNext()) {
long sequence = cursor.getLong(3);
Map<String, ? extends Attachment> atts = new AttachmentsForRevisionCallable(
this.attachmentsDir, this.attachmentStreamFactory, sequence).call(db);
InternalDocumentRevision rev = GetFullRevisionFromCurrentCursor.get(cursor, atts);
logger.finer("Rev: " + rev);
tree.add(rev);
}
return tree;
} catch (SQLException e) {
logger.log(Level.SEVERE, "Error getting all revisions of document", e);
throw new DocumentStoreException("DocumentRevisionTree not found with id: " + docId, e);
} finally {
DatabaseUtils.closeCursorQuietly(cursor);
}
}
}
|
apache-2.0
|
CognizantQAHub/Cognizant-Intelligent-Test-Scripter
|
QcConnection/src/main/java/com/cognizant/cognizantits/qcconnection/qcupdation/IBug.java
|
1729
|
package com.cognizant.cognizantits.qcconnection.qcupdation;
import com4j.DISPID;
import com4j.DefaultValue;
import com4j.IID;
import com4j.NativeType;
import com4j.Optional;
import com4j.ReturnValue;
import com4j.VTID;
@IID("{2AF970F7-6CCC-4DFB-AA78-08F689481F94}")
public abstract interface IBug
extends IBaseFieldExMail
{
@DISPID(15)
@VTID(24)
public abstract String status();
@DISPID(15)
@VTID(25)
public abstract void status(String paramString);
@DISPID(16)
@VTID(26)
public abstract String project();
@DISPID(16)
@VTID(27)
public abstract void project(String paramString);
@DISPID(17)
@VTID(28)
public abstract String summary();
@DISPID(17)
@VTID(29)
public abstract void summary(String paramString);
@DISPID(18)
@VTID(30)
public abstract String priority();
@DISPID(18)
@VTID(31)
public abstract void priority(String paramString);
@DISPID(19)
@VTID(32)
public abstract String detectedBy();
@DISPID(19)
@VTID(33)
public abstract void detectedBy(String paramString);
@DISPID(20)
@VTID(34)
public abstract String assignedTo();
@DISPID(20)
@VTID(35)
public abstract void assignedTo(String paramString);
@DISPID(21)
@VTID(36)
public abstract IList findSimilarBugs(@Optional @DefaultValue("10") int paramInt);
@DISPID(22)
@VTID(37)
public abstract boolean hasChange();
@DISPID(23)
@VTID(38)
public abstract IList changeLinks();
@VTID(38)
@ReturnValue(type=NativeType.VARIANT, defaultPropertyThrough={IList.class})
public abstract Object changeLinks(int paramInt);
}
/* Location: D:\Prabu\jars\QC.jar
* Qualified Name: qcupdation.IBug
* JD-Core Version: 0.7.0.1
*/
|
apache-2.0
|
Asimov4/elasticsearch
|
src/test/java/org/elasticsearch/common/lucene/LuceneTest.java
|
6332
|
/*
* Licensed to Elasticsearch under one or more contributor
* license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright
* ownership. Elasticsearch licenses this file to you under
* the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
package org.elasticsearch.common.lucene;
import org.apache.lucene.analysis.MockAnalyzer;
import org.apache.lucene.document.Document;
import org.apache.lucene.document.Field;
import org.apache.lucene.document.TextField;
import org.apache.lucene.index.*;
import org.apache.lucene.search.IndexSearcher;
import org.apache.lucene.search.TermQuery;
import org.apache.lucene.store.MockDirectoryWrapper;
import org.apache.lucene.util.Version;
import org.elasticsearch.test.ElasticsearchLuceneTestCase;
import org.junit.Test;
import java.io.IOException;
import java.util.HashSet;
import java.util.Set;
/**
*
*/
public class LuceneTest extends ElasticsearchLuceneTestCase {
/*
* simple test that ensures that we bump the version on Upgrade
*/
@Test
public void testVersion() {
// note this is just a silly sanity check, we test it in lucene, and we point to it this way
assertEquals(Lucene.VERSION, Version.LATEST);
}
public void testPruneUnreferencedFiles() throws IOException {
MockDirectoryWrapper dir = newMockDirectory();
dir.setEnableVirusScanner(false);
IndexWriterConfig iwc = newIndexWriterConfig();
iwc.setIndexDeletionPolicy(NoDeletionPolicy.INSTANCE);
iwc.setMergePolicy(NoMergePolicy.INSTANCE);
iwc.setMaxBufferedDocs(2);
IndexWriter writer = new IndexWriter(dir, iwc);
Document doc = new Document();
doc.add(new TextField("id", "1", random().nextBoolean() ? Field.Store.YES : Field.Store.NO));
writer.addDocument(doc);
writer.commit();
doc = new Document();
doc.add(new TextField("id", "2", random().nextBoolean() ? Field.Store.YES : Field.Store.NO));
writer.addDocument(doc);
doc = new Document();
doc.add(new TextField("id", "3", random().nextBoolean() ? Field.Store.YES : Field.Store.NO));
writer.addDocument(doc);
writer.commit();
SegmentInfos segmentCommitInfos = Lucene.readSegmentInfos(dir);
doc = new Document();
doc.add(new TextField("id", "4", random().nextBoolean() ? Field.Store.YES : Field.Store.NO));
writer.addDocument(doc);
writer.deleteDocuments(new Term("id", "2"));
writer.commit();
DirectoryReader open = DirectoryReader.open(writer, true);
assertEquals(3, open.numDocs());
assertEquals(1, open.numDeletedDocs());
assertEquals(4, open.maxDoc());
open.close();
writer.close();
SegmentInfos si = Lucene.pruneUnreferencedFiles(segmentCommitInfos.getSegmentsFileName(), dir);
assertEquals(si.getSegmentsFileName(), segmentCommitInfos.getSegmentsFileName());
open = DirectoryReader.open(dir);
assertEquals(3, open.numDocs());
assertEquals(0, open.numDeletedDocs());
assertEquals(3, open.maxDoc());
IndexSearcher s = new IndexSearcher(open);
assertEquals(s.search(new TermQuery(new Term("id", "1")), 1).totalHits, 1);
assertEquals(s.search(new TermQuery(new Term("id", "2")), 1).totalHits, 1);
assertEquals(s.search(new TermQuery(new Term("id", "3")), 1).totalHits, 1);
assertEquals(s.search(new TermQuery(new Term("id", "4")), 1).totalHits, 0);
for (String file : dir.listAll()) {
assertFalse("unexpected file: " + file, file.equals("segments_3") || file.startsWith("_2"));
}
open.close();
dir.close();
}
public void testFiles() throws IOException {
MockDirectoryWrapper dir = newMockDirectory();
dir.setEnableVirusScanner(false);
IndexWriterConfig iwc = newIndexWriterConfig(new MockAnalyzer(random()));
iwc.setMergePolicy(NoMergePolicy.INSTANCE);
iwc.setMaxBufferedDocs(2);
iwc.setUseCompoundFile(true);
IndexWriter writer = new IndexWriter(dir, iwc);
Document doc = new Document();
doc.add(new TextField("id", "1", random().nextBoolean() ? Field.Store.YES : Field.Store.NO));
writer.addDocument(doc);
writer.commit();
Set<String> files = new HashSet<>();
for (String f : Lucene.files(Lucene.readSegmentInfos(dir))) {
files.add(f);
}
assertTrue(files.toString(), files.contains("segments_1"));
assertTrue(files.toString(), files.contains("_0.cfs"));
assertTrue(files.toString(), files.contains("_0.cfe"));
assertTrue(files.toString(), files.contains("_0.si"));
doc = new Document();
doc.add(new TextField("id", "2", random().nextBoolean() ? Field.Store.YES : Field.Store.NO));
writer.addDocument(doc);
doc = new Document();
doc.add(new TextField("id", "3", random().nextBoolean() ? Field.Store.YES : Field.Store.NO));
writer.addDocument(doc);
writer.commit();
files.clear();
for (String f : Lucene.files(Lucene.readSegmentInfos(dir))) {
files.add(f);
}
assertFalse(files.toString(), files.contains("segments_1"));
assertTrue(files.toString(), files.contains("segments_2"));
assertTrue(files.toString(), files.contains("_0.cfs"));
assertTrue(files.toString(), files.contains("_0.cfe"));
assertTrue(files.toString(), files.contains("_0.si"));
assertTrue(files.toString(), files.contains("_1.cfs"));
assertTrue(files.toString(), files.contains("_1.cfe"));
assertTrue(files.toString(), files.contains("_1.si"));
writer.close();
dir.close();
}
}
|
apache-2.0
|
drecchia/incrise-swap
|
README.md
|
106
|
# Incrise-swap
Script that runs on background checking for low physical memory and adding swap on demand.
|
apache-2.0
|
scalatest/scalatest-website
|
public/scaladoc/2.0/org/scalatest/matchers/MustMatchers$AnWord.html
|
28148
|
<?xml version='1.0' encoding='UTF-8'?>
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN" "http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
<html>
<head>
<title>AnWord - ScalaTest 2.0 - org.scalatest.matchers.MustMatchers.AnWord</title>
<meta name="description" content="AnWord - ScalaTest 2.0 - org.scalatest.matchers.MustMatchers.AnWord" />
<meta name="keywords" content="AnWord ScalaTest 2.0 org.scalatest.matchers.MustMatchers.AnWord" />
<meta http-equiv="content-type" content="text/html; charset=UTF-8" />
<link href="../../../lib/template.css" media="screen" type="text/css" rel="stylesheet" />
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<p id="owner"><a href="../../package.html" class="extype" name="org">org</a>.<a href="../package.html" class="extype" name="org.scalatest">scalatest</a>.<a href="package.html" class="extype" name="org.scalatest.matchers">matchers</a>.<a href="MustMatchers.html" class="extype" name="org.scalatest.matchers.MustMatchers">MustMatchers</a></p>
<h1>AnWord</h1>
</div>
<h4 id="signature" class="signature">
<span class="modifier_kind">
<span class="modifier">final </span>
<span class="kind">class</span>
</span>
<span class="symbol">
<span class="name">AnWord</span><span class="result"> extends <span class="extype" name="scala.AnyRef">AnyRef</span></span>
</span>
</h4>
<div id="comment" class="fullcommenttop"><div class="comment cmt"><p>This class is part of the ScalaTest matchers DSL. Please see the documentation for <a href="Matchers.html"><code>Matchers</code></a> for an overview of
the matchers DSL.
</p></div><div class="toggleContainer block">
<span class="toggle">Linear Supertypes</span>
<div class="superTypes hiddenContent"><span class="extype" name="scala.AnyRef">AnyRef</span>, <span class="extype" name="scala.Any">Any</span></div>
</div></div>
<div id="mbrsel">
<div id="textfilter"><span class="pre"></span><span class="input"><input id="mbrsel-input" type="text" accesskey="/" /></span><span class="post"></span></div>
<div id="order">
<span class="filtertype">Ordering</span>
<ol>
<li class="alpha in"><span>Alphabetic</span></li>
<li class="inherit out"><span>By inheritance</span></li>
</ol>
</div>
<div id="ancestors">
<span class="filtertype">Inherited<br />
</span>
<ol id="linearization">
<li class="in" name="org.scalatest.matchers.MustMatchers.AnWord"><span>AnWord</span></li><li class="in" name="scala.AnyRef"><span>AnyRef</span></li><li class="in" name="scala.Any"><span>Any</span></li>
</ol>
</div><div id="ancestors">
<span class="filtertype"></span>
<ol>
<li class="hideall out"><span>Hide All</span></li>
<li class="showall in"><span>Show all</span></li>
</ol>
<a href="http://docs.scala-lang.org/overviews/scaladoc/usage.html#members" target="_blank">Learn more about member selection</a>
</div>
<div id="visbl">
<span class="filtertype">Visibility</span>
<ol><li class="public in"><span>Public</span></li><li class="all out"><span>All</span></li></ol>
</div>
</div>
<div id="template">
<div id="allMembers">
<div id="constructors" class="members">
<h3>Instance Constructors</h3>
<ol><li name="org.scalatest.matchers.MustMatchers.AnWord#<init>" visbl="pub" data-isabs="false" fullComment="no" group="Ungrouped">
<a id="<init>():MustMatchers.this.AnWord"></a>
<a id="<init>:AnWord"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier"></span>
<span class="kind">new</span>
</span>
<span class="symbol">
<span class="name">AnWord</span><span class="params">()</span>
</span>
</h4>
</li></ol>
</div>
<div id="values" class="values members">
<h3>Value Members</h3>
<ol><li name="scala.AnyRef#!=" visbl="pub" data-isabs="false" fullComment="yes" group="Ungrouped">
<a id="!=(x$1:AnyRef):Boolean"></a>
<a id="!=(AnyRef):Boolean"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier">final </span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span title="gt4s: $bang$eq" class="name">!=</span><span class="params">(<span name="arg0">arg0: <span class="extype" name="scala.AnyRef">AnyRef</span></span>)</span><span class="result">: <span class="extype" name="scala.Boolean">Boolean</span></span>
</span>
</h4>
<div class="fullcomment"><dl class="attributes block"> <dt>Definition Classes</dt><dd>AnyRef</dd></dl></div>
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<a id="!=(x$1:Any):Boolean"></a>
<a id="!=(Any):Boolean"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier">final </span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span title="gt4s: $bang$eq" class="name">!=</span><span class="params">(<span name="arg0">arg0: <span class="extype" name="scala.Any">Any</span></span>)</span><span class="result">: <span class="extype" name="scala.Boolean">Boolean</span></span>
</span>
</h4>
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<a id="##():Int"></a>
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<h4 class="signature">
<span class="modifier_kind">
<span class="modifier">final </span>
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</span>
<span class="symbol">
<span title="gt4s: $hash$hash" class="name">##</span><span class="params">()</span><span class="result">: <span class="extype" name="scala.Int">Int</span></span>
</span>
</h4>
<div class="fullcomment"><dl class="attributes block"> <dt>Definition Classes</dt><dd>AnyRef → Any</dd></dl></div>
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<a id="==(x$1:AnyRef):Boolean"></a>
<a id="==(AnyRef):Boolean"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier">final </span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span title="gt4s: $eq$eq" class="name">==</span><span class="params">(<span name="arg0">arg0: <span class="extype" name="scala.AnyRef">AnyRef</span></span>)</span><span class="result">: <span class="extype" name="scala.Boolean">Boolean</span></span>
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<a id="==(x$1:Any):Boolean"></a>
<a id="==(Any):Boolean"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier">final </span>
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</span>
<span class="symbol">
<span title="gt4s: $eq$eq" class="name">==</span><span class="params">(<span name="arg0">arg0: <span class="extype" name="scala.Any">Any</span></span>)</span><span class="result">: <span class="extype" name="scala.Boolean">Boolean</span></span>
</span>
</h4>
<div class="fullcomment"><dl class="attributes block"> <dt>Definition Classes</dt><dd>Any</dd></dl></div>
</li><li name="org.scalatest.matchers.MustMatchers.AnWord#apply" visbl="pub" data-isabs="false" fullComment="yes" group="Ungrouped">
<a id="apply[T](anMatcher:org.scalatest.matchers.AnMatcher[T]):org.scalatest.words.ResultOfAnWordToAnMatcherApplication[T]"></a>
<a id="apply[T](AnMatcher[T]):ResultOfAnWordToAnMatcherApplication[T]"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier"></span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span class="name">apply</span><span class="tparams">[<span name="T">T</span>]</span><span class="params">(<span name="anMatcher">anMatcher: <span class="extype" name="org.scalatest.matchers.AnMatcher">AnMatcher</span>[<span class="extype" name="org.scalatest.matchers.MustMatchers.AnWord.apply.T">T</span>]</span>)</span><span class="result">: <a href="../words/ResultOfAnWordToAnMatcherApplication.html" class="extype" name="org.scalatest.words.ResultOfAnWordToAnMatcherApplication">ResultOfAnWordToAnMatcherApplication</a>[<span class="extype" name="org.scalatest.matchers.MustMatchers.AnWord.apply.T">T</span>]</span>
</span>
</h4>
<p class="shortcomment cmt">This method enables the following syntax, where, <code>positiveNumber</code> is an <code>AnMatcher[Book]</code>:</p><div class="fullcomment"><div class="comment cmt"><p>This method enables the following syntax, where, <code>positiveNumber</code> is an <code>AnMatcher[Book]</code>:</p><p><pre class="stHighlighted">
result must not be an (positiveNumber)
^
</pre>
</p></div></div>
</li><li name="org.scalatest.matchers.MustMatchers.AnWord#apply" visbl="pub" data-isabs="false" fullComment="yes" group="Ungrouped">
<a id="apply[T](beTrueMatcher:org.scalatest.matchers.BePropertyMatcher[T]):org.scalatest.words.ResultOfAnWordToBePropertyMatcherApplication[T]"></a>
<a id="apply[T](BePropertyMatcher[T]):ResultOfAnWordToBePropertyMatcherApplication[T]"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier"></span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span class="name">apply</span><span class="tparams">[<span name="T">T</span>]</span><span class="params">(<span name="beTrueMatcher">beTrueMatcher: <a href="BePropertyMatcher.html" class="extype" name="org.scalatest.matchers.BePropertyMatcher">BePropertyMatcher</a>[<span class="extype" name="org.scalatest.matchers.MustMatchers.AnWord.apply.T">T</span>]</span>)</span><span class="result">: <a href="../words/ResultOfAnWordToBePropertyMatcherApplication.html" class="extype" name="org.scalatest.words.ResultOfAnWordToBePropertyMatcherApplication">ResultOfAnWordToBePropertyMatcherApplication</a>[<span class="extype" name="org.scalatest.matchers.MustMatchers.AnWord.apply.T">T</span>]</span>
</span>
</h4>
<p class="shortcomment cmt">This method enables the following syntax, where, for example, <code>badBook</code> is of type <code>Book</code> and <code>excellentRead</code>
is a <code>BePropertyMatcher[Book]</code>:</p><div class="fullcomment"><div class="comment cmt"><p>This method enables the following syntax, where, for example, <code>badBook</code> is of type <code>Book</code> and <code>excellentRead</code>
is a <code>BePropertyMatcher[Book]</code>:</p><p><pre class="stHighlighted">
badBook must not be an (excellentRead)
^
</pre>
</p></div></div>
</li><li name="org.scalatest.matchers.MustMatchers.AnWord#apply" visbl="pub" data-isabs="false" fullComment="yes" group="Ungrouped">
<a id="apply(symbol:Symbol):org.scalatest.words.ResultOfAnWordToSymbolApplication"></a>
<a id="apply(Symbol):ResultOfAnWordToSymbolApplication"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier"></span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span class="name">apply</span><span class="params">(<span name="symbol">symbol: <span class="extype" name="scala.Symbol">Symbol</span></span>)</span><span class="result">: <a href="../words/ResultOfAnWordToSymbolApplication.html" class="extype" name="org.scalatest.words.ResultOfAnWordToSymbolApplication">ResultOfAnWordToSymbolApplication</a></span>
</span>
</h4>
<p class="shortcomment cmt">This method enables the following syntax:</p><div class="fullcomment"><div class="comment cmt"><p>This method enables the following syntax:</p><p><pre class="stHighlighted">
badBook must not be an (<span class="stQuotedString">'excellentRead</span>)
^
</pre>
</p></div></div>
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<span class="name">eq</span><span class="params">(<span name="arg0">arg0: <span class="extype" name="scala.AnyRef">AnyRef</span></span>)</span><span class="result">: <span class="extype" name="scala.Boolean">Boolean</span></span>
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<h4 class="signature">
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</span>
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</span>
<span class="symbol">
<span class="name">isInstanceOf</span><span class="tparams">[<span name="T0">T0</span>]</span><span class="result">: <span class="extype" name="scala.Boolean">Boolean</span></span>
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<span class="symbol">
<span class="name">notify</span><span class="params">()</span><span class="result">: <span class="extype" name="scala.Unit">Unit</span></span>
</span>
</h4>
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<span class="modifier">final </span>
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</span>
<span class="symbol">
<span class="name">notifyAll</span><span class="params">()</span><span class="result">: <span class="extype" name="scala.Unit">Unit</span></span>
</span>
</h4>
<div class="fullcomment"><dl class="attributes block"> <dt>Definition Classes</dt><dd>AnyRef</dd></dl></div>
</li><li name="scala.AnyRef#synchronized" visbl="pub" data-isabs="false" fullComment="yes" group="Ungrouped">
<a id="synchronized[T0](x$1:=>T0):T0"></a>
<a id="synchronized[T0](⇒T0):T0"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier">final </span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span class="name">synchronized</span><span class="tparams">[<span name="T0">T0</span>]</span><span class="params">(<span name="arg0">arg0: ⇒ <span class="extype" name="java.lang.AnyRef.synchronized.T0">T0</span></span>)</span><span class="result">: <span class="extype" name="java.lang.AnyRef.synchronized.T0">T0</span></span>
</span>
</h4>
<div class="fullcomment"><dl class="attributes block"> <dt>Definition Classes</dt><dd>AnyRef</dd></dl></div>
</li><li name="org.scalatest.matchers.MustMatchers.AnWord#toString" visbl="pub" data-isabs="false" fullComment="yes" group="Ungrouped">
<a id="toString():String"></a>
<a id="toString():String"></a>
<h4 class="signature">
<span class="modifier_kind">
<span class="modifier"></span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span class="name">toString</span><span class="params">()</span><span class="result">: <span class="extype" name="scala.Predef.String">String</span></span>
</span>
</h4>
<p class="shortcomment cmt">Overrides to return pretty toString.</p><div class="fullcomment"><div class="comment cmt"><p>Overrides to return pretty toString.
</p></div><dl class="paramcmts block"><dt>returns</dt><dd class="cmt"><p>"an"
</p></dd></dl><dl class="attributes block"> <dt>Definition Classes</dt><dd><a href="" class="extype" name="org.scalatest.matchers.MustMatchers.AnWord">AnWord</a> → AnyRef → Any</dd></dl></div>
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<a id="wait():Unit"></a>
<a id="wait():Unit"></a>
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</span>
<span class="symbol">
<span class="name">wait</span><span class="params">()</span><span class="result">: <span class="extype" name="scala.Unit">Unit</span></span>
</span>
</h4>
<div class="fullcomment"><dl class="attributes block"> <dt>Definition Classes</dt><dd>AnyRef</dd><dt>Annotations</dt><dd>
<span class="name">@throws</span><span class="args">()</span>
</dd></dl></div>
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<a id="wait(x$1:Long,x$2:Int):Unit"></a>
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<span class="modifier">final </span>
<span class="kind">def</span>
</span>
<span class="symbol">
<span class="name">wait</span><span class="params">(<span name="arg0">arg0: <span class="extype" name="scala.Long">Long</span></span>, <span name="arg1">arg1: <span class="extype" name="scala.Int">Int</span></span>)</span><span class="result">: <span class="extype" name="scala.Unit">Unit</span></span>
</span>
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</span>
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|
apache-2.0
|
Jiri-Kremser/hawkular-agent
|
hawkular-agent-core/src/main/java/org/hawkular/agent/monitor/storage/MetricTagPayloadBuilderImpl.java
|
4162
|
/*
* Copyright 2015-2017 Red Hat, Inc. and/or its affiliates
* and other contributors as indicated by the @author tags.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package org.hawkular.agent.monitor.storage;
import java.util.HashMap;
import java.util.Map;
import java.util.TreeMap;
import org.hawkular.agent.monitor.api.MetricTagPayloadBuilder;
import org.hawkular.agent.monitor.util.Util;
import org.hawkular.metrics.client.common.MetricType;
/**
* Allows one to build up payload requests to send to metric storage to add tags.
* After all tags are added to this builder, you can get the payloads in
* JSON format via {@link #toPayload()}.
*/
public class MetricTagPayloadBuilderImpl implements MetricTagPayloadBuilder {
// key is metric ID, value is map of name/value pairs (the actual tags)
private Map<String, Map<String, String>> allGauges = new HashMap<>();
private Map<String, Map<String, String>> allCounters = new HashMap<>();
private Map<String, Map<String, String>> allAvails = new HashMap<>();
// a running count of the number of tags that have been added
private int count = 0;
// if not null, this is the tenant ID to associate all the metrics with (null means used the agent tenant ID)
private String tenantId = null;
@Override
public void addTag(String key, String name, String value, MetricType metricType) {
Map<String, Map<String, String>> map;
switch (metricType) {
case GAUGE: {
map = allGauges;
break;
}
case COUNTER: {
map = allCounters;
break;
}
case AVAILABILITY: {
map = allAvails;
break;
}
default: {
throw new IllegalArgumentException("Unsupported metric type: " + metricType);
}
}
Map<String, String> allTagsForMetric = map.get(key);
if (allTagsForMetric == null) {
// we haven't seen this metric ID before, create a new map of tags
allTagsForMetric = new TreeMap<String, String>(); // use tree map to sort the tags
map.put(key, allTagsForMetric);
}
allTagsForMetric.put(name, value);
count++;
}
@Override
public Map<String, String> toPayload() {
Map<String, Map<String, String>> withMapObject = new HashMap<>();
for (Map.Entry<String, Map<String, String>> gaugeEntry : allGauges.entrySet()) {
withMapObject.put("gauges/" + Util.urlEncode(gaugeEntry.getKey()), gaugeEntry.getValue());
}
for (Map.Entry<String, Map<String, String>> counterEntry : allCounters.entrySet()) {
withMapObject.put("counters/" + Util.urlEncode(counterEntry.getKey()), counterEntry.getValue());
}
for (Map.Entry<String, Map<String, String>> availEntry : allAvails.entrySet()) {
withMapObject.put("availability/" + Util.urlEncode(availEntry.getKey()), availEntry.getValue());
}
// now convert all the maps of tags to json
Map<String, String> withJson = new HashMap<>(withMapObject.size());
for (Map.Entry<String, Map<String, String>> entry : withMapObject.entrySet()) {
withJson.put(entry.getKey(), Util.toJson(entry.getValue()));
}
return withJson;
}
@Override
public int getNumberTags() {
return count;
}
@Override
public void setTenantId(String tenantId) {
this.tenantId = tenantId;
}
@Override
public String getTenantId() {
return this.tenantId;
}
}
|
apache-2.0
|
blentz/cloud-costs
|
budget/scripts/gcp_test.py
|
2730
|
#!/usr/bin/env python
''' Script to ingest GCP billing data into a DB '''
import logging
import os
import re
import sys
from datetime import datetime
from dateutil.relativedelta import relativedelta
from dateutil.parser import parse as parse_date
from httplib2 import Http
import transaction
from apiclient.discovery import build
from oauth2client.service_account import ServiceAccountCredentials
from sqlalchemy import engine_from_config
from sqlalchemy.sql import functions
from pyramid.paster import get_appsettings, setup_logging
from pyramid.scripts.common import parse_vars
from ..models import (DBSession,
GcpLineItem)
from ..util.fileloader import load_json, save_json
COMMIT_THRESHOLD = 10000
LOG = None
def usage(argv):
''' cli usage '''
cmd = os.path.basename(argv[0])
print('usage: %s <config_uri> [rundate=YYYY-MM-DD]\n'
'(example: "%s development.ini")' % (cmd, cmd))
sys.exit(1)
def run(settings, options):
''' do things '''
os.environ['GOOGLE_APPLICATION_CREDENTIALS'] = settings['creds.dir'] + \
"/" + \
settings['creds.gcp.json']
scopes = ['https://www.googleapis.com/auth/cloud-platform']
credentials = ServiceAccountCredentials.from_json_keyfile_name(settings['creds.dir'] + \
"/" + \
settings['creds.gcp.json'], scopes)
http_auth = credentials.authorize(Http())
# The apiclient.discovery.build() function returns an instance of an API service
# object that can be used to make API calls. The object is constructed with
# methods specific to the books API. The arguments provided are:
# name of the API ('cloudbilling')
# version of the API you are using ('v1')
# API key
service = build('cloudbilling', 'v1', http=http_auth,
cache_discovery=False)
request = service.billingAccounts().projects().list(name='billingAccounts/0085BB-6B96B9-89FD9F')
response = request.execute()
LOG.debug(response)
def main(argv):
''' main script entry point '''
if len(argv) < 2:
usage(argv)
config_uri = argv[1]
options = parse_vars(argv[2:])
setup_logging(config_uri)
global LOG
LOG = logging.getLogger(__name__)
settings = get_appsettings(config_uri, options=options)
engine = engine_from_config(settings, 'sqlalchemy.')
DBSession.configure(bind=engine)
run(settings, options)
if '__main__' in __name__:
try:
main(sys.argv)
except KeyboardInterrupt:
print "Ctrl+C detected. Exiting..."
|
apache-2.0
|
diandianxiyu/Yii2-CMS-Template
|
views/role/view.php
|
9248
|
<?php
use yii\helpers\Html;
use yii\widgets\ActiveForm;
?>
<h3 class="page-title">
Authority management <small> Role detail </small>
</h3>
<div class="page-bar">
<ul class="page-breadcrumb">
<li>
<i class="fa fa-home"></i>
<a href="index.html">Home</a>
<i class="fa fa-angle-right"></i>
</li>
<li>
<a href="<?php echo Yii::$app->urlManager->createUrl('role/index') ?>">Authority management</a>
<i class="fa fa-angle-right"></i>
</li>
<li>
<a href="<?php echo Yii::$app->urlManager->createUrl(['role/update', 'name' => $model->name]) ?>">Role detail</a>
</li>
</ul>
<div class="page-toolbar">
<div class="btn-group pull-right">
<button type="button" class="btn btn-fit-height grey-salt dropdown-toggle" data-toggle="dropdown" data-hover="dropdown" data-delay="1000" data-close-others="true">
Actions <i class="fa fa-angle-down"></i>
</button>
<ul class="dropdown-menu pull-right" role="menu">
<li>
<a href="<?php echo Yii::$app->urlManager->createUrl('role/create') ?>">Role add</a>
</li>
</ul>
</div>
</div>
</div>
<div class="row">
<div class="col-md-12 ">
<!-- BEGIN SAMPLE FORM PORTLET-->
<div class="portlet box green">
<div class="portlet-title">
<div class="caption">
<i class="fa fa-gift"></i>
Role detail
</div>
</div>
<div class="portlet-body form">
<!-- BEGIN FORM-->
<?php
$form = ActiveForm::begin([
'id' => 'form_sample_1',
'options' => [
'class' => 'form-horizontal',
'novalidate' => 'novalidate',
],
]);
?>
<div class="form-body">
<div class="alert alert-danger display-hide">
<button class="close" data-close="alert"></button>
You have some form errors. Please check below.
</div>
<div class="alert alert-success display-hide">
<button class="close" data-close="alert"></button>
Your form validation is successful!
</div>
<div class="form-group">
<label class="control-label col-md-3">Role name <span class="required" aria-required="true">
* </span>
</label>
<div class="col-md-4">
<?= $form->field($model, 'name')->textInput([ 'class' => 'form-control', 'placeholder' => 'Please enter the role name', 'disabled' => 'disabled'])->label(false) ?>
</div>
</div>
<div class="form-group">
<label class="control-label col-md-3">Role type <span class="required" aria-required="true">
* </span>
</label>
<div class="col-md-4">
<?= $form->field($model, 'type')->textInput([ 'value' => isset($model->type) ? $model->type : NULL, 'disabled' => 'disabled', 'class' => 'form-control'])->label(false) ?>
</div>
</div>
<div class="form-group">
<label class="control-label col-md-3">Rule name <span class="required" aria-required="true">
</span>
</label>
<div class="col-md-4">
<?= $form->field($model, 'rule_name')->textInput([ 'class' => 'form-control', 'placeholder' => '', 'disabled' => 'disabled'])->label(false) ?>
</div>
</div>
<div class="form-group">
<label class="control-label col-md-3">Description <span class="required" aria-required="true">
</span>
</label>
<div class="col-md-4">
<?= $form->field($model, 'description')->textarea(['rows' => 6, 'cols' => 5, 'disabled' => 'disabled'])->label(false) ?>
</div>
</div>
<div class="form-group">
<label class="control-label col-md-3">Data <span class="required" aria-required="true">
</span>
</label>
<div class="col-md-4">
<?= $form->field($model, 'data')->textarea(['rows' => 6, 'cols' => 5, 'disabled' => 'disabled'])->label(false) ?>
</div>
</div>
<?php if (!empty($childArray)) { ?>
<div class="form-group">
<label class="control-label col-md-3">Permission list <span class="required" aria-required="true">
</span>
</label>
<div class="col-md-4">
<?= $form->field($model, 'child')->checkboxList($childArray, $model->child)->label(false) ?>
</div>
</div>
<?php } ?>
</div>
<div class="form-actions">
<div class="row">
<div class="col-md-offset-3 col-md-9">
<a href="<?php echo Yii::$app->urlManager->createUrl(['role/update', "name" => $model->name]) ?>" class="btn default">Modify </a>
<a href="<?php echo Yii::$app->urlManager->createUrl('role/index') ?>" class="btn default">Return list </a>
</div>
</div>
</div>
<!-- </form> -->
<?php ActiveForm::end(); ?>
<!-- END FORM-->
</div>
</div>
<!-- END SAMPLE FORM PORTLET-->
</div>
</div>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/jquery.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/jquery-migrate.min.js" type="text/javascript"></script>
<!-- IMPORTANT! Load jquery-ui-1.10.3.custom.min.js before bootstrap.min.js to fix bootstrap tooltip conflict with jquery ui tooltip -->
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/jquery-ui/jquery-ui-1.10.3.custom.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/bootstrap/js/bootstrap.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/bootstrap-hover-dropdown/bootstrap-hover-dropdown.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/jquery-slimscroll/jquery.slimscroll.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/jquery.blockui.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/jquery.cokie.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/uniform/jquery.uniform.min.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/plugins/bootstrap-switch/js/bootstrap-switch.min.js" type="text/javascript"></script>
<!-- END CORE PLUGINS -->
<!-- BEGIN PAGE LEVEL PLUGINS -->
<!-- END PAGE LEVEL PLUGINS -->
<!-- BEGIN PAGE LEVEL SCRIPTS -->
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/global/scripts/metronic.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/admin/layout/scripts/layout.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/admin/layout/scripts/quick-sidebar.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/admin/layout/scripts/demo.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/admin/pages/scripts/index.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/admin/pages/scripts/tasks.js" type="text/javascript"></script>
<script src="<?php echo Yii::$app->request->baseUrl ?>/metronic/admin/pages/scripts/components-pickers.js"></script>
<!-- END PAGE LEVEL SCRIPTS -->
<script>
jQuery(document).ready(function () {
// initiate layout and plugins
Metronic.init(); // init metronic core components
Layout.init(); // init current layout
QuickSidebar.init(); // init quick sidebar
Demo.init(); // init demo features
Tasks.initDashboardWidget();
ComponentsPickers.init();
});
</script>
|
apache-2.0
|
resin-io-library/base-images
|
balena-base-images/python/up-board/fedora/33/3.10.0/build/Dockerfile
|
2451
|
# AUTOGENERATED FILE
FROM balenalib/up-board-fedora:33-build
# http://bugs.python.org/issue19846
# > At the moment, setting "LANG=C" on a Linux system *fundamentally breaks Python 3*, and that's not OK.
ENV LANG C.UTF-8
RUN dnf install -y \
python3-pip \
python3-dbus \
&& dnf clean all
# install "virtualenv", since the vast majority of users of this image will want it
RUN pip3 install -U --no-cache-dir --ignore-installed pip setuptools \
&& pip3 install --no-cache-dir virtualenv
RUN [ ! -d /.balena/messages ] && mkdir -p /.balena/messages; echo $'As of January 1st, 2020, Python 2 was end-of-life, we will change the latest tag for Balenalib Python base image to Python 3.x and drop support for Python 2 soon. So after 1st July, 2020, all the balenalib Python latest tag will point to the latest Python 3 version and no changes, or fixes will be made to balenalib Python 2 base image. If you are using Python 2 for your application, please upgrade to Python 3 before 1st July.' > /.balena/messages/python-deprecation-warning
CMD ["echo","'No CMD command was set in Dockerfile! Details about CMD command could be found in Dockerfile Guide section in our Docs. Here's the link: https://balena.io/docs"]
RUN curl -SLO "https://raw.githubusercontent.com/balena-io-library/base-images/8accad6af708fca7271c5c65f18a86782e19f877/scripts/assets/tests/[email protected]" \
&& echo "Running test-stack@python" \
&& chmod +x [email protected] \
&& bash [email protected] \
&& rm -rf [email protected]
RUN [ ! -d /.balena/messages ] && mkdir -p /.balena/messages; echo $'Here are a few details about this Docker image (For more information please visit https://www.balena.io/docs/reference/base-images/base-images/): \nArchitecture: Intel 64-bit (x86-64) \nOS: Fedora 33 \nVariant: build variant \nDefault variable(s): UDEV=off \nThe following software stack is preinstalled: \nPython v3.10.0, Pip v21.2.4, Setuptools v58.0.0 \nExtra features: \n- Easy way to install packages with `install_packages <package-name>` command \n- Run anywhere with cross-build feature (for ARM only) \n- Keep the container idling with `balena-idle` command \n- Show base image details with `balena-info` command' > /.balena/messages/image-info
RUN echo $'#!/bin/sh.real\nbalena-info\nrm -f /bin/sh\ncp /bin/sh.real /bin/sh\n/bin/sh "$@"' > /bin/sh-shim \
&& chmod +x /bin/sh-shim \
&& cp /bin/sh /bin/sh.real \
&& mv /bin/sh-shim /bin/sh
|
apache-2.0
|
mdoering/backbone
|
life/Fungi/Ascomycota/Lecanoromycetes/Lecanorales/Cladoniaceae/Cladonia/Cladonia cariosa/Cladonia cariosa pruiniformis/README.md
|
211
|
# Cladonia cariosa var. pruiniformis Norman VARIETY
#### Status
ACCEPTED
#### According to
Index Fungorum
#### Published in
null
#### Original name
Cladonia cariosa var. pruiniformis Norman
### Remarks
null
|
apache-2.0
|
oehme/analysing-gradle-performance
|
my-app/src/test/java/org/gradle/test/performance/mediummonolithicjavaproject/p127/Test2551.java
|
2111
|
package org.gradle.test.performance.mediummonolithicjavaproject.p127;
import org.junit.Test;
import static org.junit.Assert.*;
public class Test2551 {
Production2551 objectUnderTest = new Production2551();
@Test
public void testProperty0() {
String value = "value";
objectUnderTest.setProperty0(value);
assertEquals(value, objectUnderTest.getProperty0());
}
@Test
public void testProperty1() {
String value = "value";
objectUnderTest.setProperty1(value);
assertEquals(value, objectUnderTest.getProperty1());
}
@Test
public void testProperty2() {
String value = "value";
objectUnderTest.setProperty2(value);
assertEquals(value, objectUnderTest.getProperty2());
}
@Test
public void testProperty3() {
String value = "value";
objectUnderTest.setProperty3(value);
assertEquals(value, objectUnderTest.getProperty3());
}
@Test
public void testProperty4() {
String value = "value";
objectUnderTest.setProperty4(value);
assertEquals(value, objectUnderTest.getProperty4());
}
@Test
public void testProperty5() {
String value = "value";
objectUnderTest.setProperty5(value);
assertEquals(value, objectUnderTest.getProperty5());
}
@Test
public void testProperty6() {
String value = "value";
objectUnderTest.setProperty6(value);
assertEquals(value, objectUnderTest.getProperty6());
}
@Test
public void testProperty7() {
String value = "value";
objectUnderTest.setProperty7(value);
assertEquals(value, objectUnderTest.getProperty7());
}
@Test
public void testProperty8() {
String value = "value";
objectUnderTest.setProperty8(value);
assertEquals(value, objectUnderTest.getProperty8());
}
@Test
public void testProperty9() {
String value = "value";
objectUnderTest.setProperty9(value);
assertEquals(value, objectUnderTest.getProperty9());
}
}
|
apache-2.0
|
oehme/analysing-gradle-performance
|
my-app/src/main/java/org/gradle/test/performance/mediummonolithicjavaproject/p211/Production4230.java
|
1891
|
package org.gradle.test.performance.mediummonolithicjavaproject.p211;
public class Production4230 {
private String property0;
public String getProperty0() {
return property0;
}
public void setProperty0(String value) {
property0 = value;
}
private String property1;
public String getProperty1() {
return property1;
}
public void setProperty1(String value) {
property1 = value;
}
private String property2;
public String getProperty2() {
return property2;
}
public void setProperty2(String value) {
property2 = value;
}
private String property3;
public String getProperty3() {
return property3;
}
public void setProperty3(String value) {
property3 = value;
}
private String property4;
public String getProperty4() {
return property4;
}
public void setProperty4(String value) {
property4 = value;
}
private String property5;
public String getProperty5() {
return property5;
}
public void setProperty5(String value) {
property5 = value;
}
private String property6;
public String getProperty6() {
return property6;
}
public void setProperty6(String value) {
property6 = value;
}
private String property7;
public String getProperty7() {
return property7;
}
public void setProperty7(String value) {
property7 = value;
}
private String property8;
public String getProperty8() {
return property8;
}
public void setProperty8(String value) {
property8 = value;
}
private String property9;
public String getProperty9() {
return property9;
}
public void setProperty9(String value) {
property9 = value;
}
}
|
apache-2.0
|
hsh075623201/hadoop
|
share/doc/hadoop/api/org/apache/hadoop/io/file/tfile/RawComparable.html
|
11255
|
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_45) on Fri Nov 14 23:55:04 UTC 2014 -->
<META http-equiv="Content-Type" content="text/html; charset=UTF-8">
<TITLE>
RawComparable (Apache Hadoop Main 2.5.2 API)
</TITLE>
<META NAME="date" CONTENT="2014-11-14">
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../../../../stylesheet.css" TITLE="Style">
<SCRIPT type="text/javascript">
function windowTitle()
{
if (location.href.indexOf('is-external=true') == -1) {
parent.document.title="RawComparable (Apache Hadoop Main 2.5.2 API)";
}
}
</SCRIPT>
<NOSCRIPT>
</NOSCRIPT>
</HEAD>
<BODY BGCOLOR="white" onload="windowTitle();">
<HR>
<!-- ========= START OF TOP NAVBAR ======= -->
<A NAME="navbar_top"><!-- --></A>
<A HREF="#skip-navbar_top" title="Skip navigation links"></A>
<TABLE BORDER="0" WIDTH="100%" CELLPADDING="1" CELLSPACING="0" SUMMARY="">
<TR>
<TD COLSPAN=2 BGCOLOR="#EEEEFF" CLASS="NavBarCell1">
<A NAME="navbar_top_firstrow"><!-- --></A>
<TABLE BORDER="0" CELLPADDING="0" CELLSPACING="3" SUMMARY="">
<TR ALIGN="center" VALIGN="top">
<TD BGCOLOR="#EEEEFF" CLASS="NavBarCell1"> <A HREF="../../../../../../overview-summary.html"><FONT CLASS="NavBarFont1"><B>Overview</B></FONT></A> </TD>
<TD BGCOLOR="#EEEEFF" CLASS="NavBarCell1"> <A HREF="package-summary.html"><FONT CLASS="NavBarFont1"><B>Package</B></FONT></A> </TD>
<TD BGCOLOR="#FFFFFF" CLASS="NavBarCell1Rev"> <FONT CLASS="NavBarFont1Rev"><B>Class</B></FONT> </TD>
<TD BGCOLOR="#EEEEFF" CLASS="NavBarCell1"> <A HREF="class-use/RawComparable.html"><FONT CLASS="NavBarFont1"><B>Use</B></FONT></A> </TD>
<TD BGCOLOR="#EEEEFF" CLASS="NavBarCell1"> <A HREF="package-tree.html"><FONT CLASS="NavBarFont1"><B>Tree</B></FONT></A> </TD>
<TD BGCOLOR="#EEEEFF" CLASS="NavBarCell1"> <A HREF="../../../../../../deprecated-list.html"><FONT CLASS="NavBarFont1"><B>Deprecated</B></FONT></A> </TD>
<TD BGCOLOR="#EEEEFF" CLASS="NavBarCell1"> <A HREF="../../../../../../index-all.html"><FONT CLASS="NavBarFont1"><B>Index</B></FONT></A> </TD>
<TD BGCOLOR="#EEEEFF" CLASS="NavBarCell1"> <A HREF="../../../../../../help-doc.html"><FONT CLASS="NavBarFont1"><B>Help</B></FONT></A> </TD>
</TR>
</TABLE>
</TD>
<TD ALIGN="right" VALIGN="top" ROWSPAN=3><EM>
</EM>
</TD>
</TR>
<TR>
<TD BGCOLOR="white" CLASS="NavBarCell2"><FONT SIZE="-2">
<A HREF="../../../../../../org/apache/hadoop/io/file/tfile/MetaBlockDoesNotExist.html" title="class in org.apache.hadoop.io.file.tfile"><B>PREV CLASS</B></A>
<A HREF="../../../../../../org/apache/hadoop/io/file/tfile/TFile.html" title="class in org.apache.hadoop.io.file.tfile"><B>NEXT CLASS</B></A></FONT></TD>
<TD BGCOLOR="white" CLASS="NavBarCell2"><FONT SIZE="-2">
<A HREF="../../../../../../index.html?org/apache/hadoop/io/file/tfile/RawComparable.html" target="_top"><B>FRAMES</B></A>
<A HREF="RawComparable.html" target="_top"><B>NO FRAMES</B></A>
<SCRIPT type="text/javascript">
<!--
if(window==top) {
document.writeln('<A HREF="../../../../../../allclasses-noframe.html"><B>All Classes</B></A>');
}
//-->
</SCRIPT>
<NOSCRIPT>
<A HREF="../../../../../../allclasses-noframe.html"><B>All Classes</B></A>
</NOSCRIPT>
</FONT></TD>
</TR>
<TR>
<TD VALIGN="top" CLASS="NavBarCell3"><FONT SIZE="-2">
SUMMARY: NESTED | FIELD | CONSTR | <A HREF="#method_summary">METHOD</A></FONT></TD>
<TD VALIGN="top" CLASS="NavBarCell3"><FONT SIZE="-2">
DETAIL: FIELD | CONSTR | <A HREF="#method_detail">METHOD</A></FONT></TD>
</TR>
</TABLE>
<A NAME="skip-navbar_top"></A>
<!-- ========= END OF TOP NAVBAR ========= -->
<HR>
<!-- ======== START OF CLASS DATA ======== -->
<H2>
<FONT SIZE="-1">
org.apache.hadoop.io.file.tfile</FONT>
<BR>
Interface RawComparable</H2>
<HR>
<DL>
<DT><PRE><FONT SIZE="-1">@InterfaceAudience.Public
@InterfaceStability.Evolving
</FONT>public interface <A HREF="../../../../../../src-html/org/apache/hadoop/io/file/tfile/RawComparable.html#line.40"><B>RawComparable</B></A></DL>
</PRE>
<P>
Interface for objects that can be compared through <A HREF="../../../../../../org/apache/hadoop/io/RawComparator.html" title="interface in org.apache.hadoop.io"><CODE>RawComparator</CODE></A>.
This is useful in places where we need a single object reference to specify a
range of bytes in a byte array, such as <A HREF="http://download.oracle.com/javase/6/docs/api/java/lang/Comparable.html?is-external=true" title="class or interface in java.lang"><CODE>Comparable</CODE></A> or
<A HREF="http://download.oracle.com/javase/6/docs/api/java/util/Collections.html?is-external=true#binarySearch(java.util.List, T, java.util.Comparator)" title="class or interface in java.util"><CODE>Collections.binarySearch(java.util.List, Object, Comparator)</CODE></A>
The actual comparison among RawComparable's requires an external
RawComparator and it is applications' responsibility to ensure two
RawComparable are supposed to be semantically comparable with the same
RawComparator.
<P>
<P>
<HR>
<P>
<!-- ========== METHOD SUMMARY =========== -->
<A NAME="method_summary"><!-- --></A>
<TABLE BORDER="1" WIDTH="100%" CELLPADDING="3" CELLSPACING="0" SUMMARY="">
<TR BGCOLOR="#CCCCFF" CLASS="TableHeadingColor">
<TH ALIGN="left" COLSPAN="2"><FONT SIZE="+2">
<B>Method Summary</B></FONT></TH>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE> byte[]</CODE></FONT></TD>
<TD><CODE><B><A HREF="../../../../../../org/apache/hadoop/io/file/tfile/RawComparable.html#buffer()">buffer</A></B>()</CODE>
<BR>
Get the underlying byte array.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE> int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../../../../../../org/apache/hadoop/io/file/tfile/RawComparable.html#offset()">offset</A></B>()</CODE>
<BR>
Get the offset of the first byte in the byte array.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE> int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../../../../../../org/apache/hadoop/io/file/tfile/RawComparable.html#size()">size</A></B>()</CODE>
<BR>
Get the size of the byte range in the byte array.</TD>
</TR>
</TABLE>
<P>
<!-- ============ METHOD DETAIL ========== -->
<A NAME="method_detail"><!-- --></A>
<TABLE BORDER="1" WIDTH="100%" CELLPADDING="3" CELLSPACING="0" SUMMARY="">
<TR BGCOLOR="#CCCCFF" CLASS="TableHeadingColor">
<TH ALIGN="left" COLSPAN="1"><FONT SIZE="+2">
<B>Method Detail</B></FONT></TH>
</TR>
</TABLE>
<A NAME="buffer()"><!-- --></A><H3>
buffer</H3>
<PRE>
byte[] <A HREF="../../../../../../src-html/org/apache/hadoop/io/file/tfile/RawComparable.html#line.46"><B>buffer</B></A>()</PRE>
<DL>
<DD>Get the underlying byte array.
<P>
<DD><DL>
<DT><B>Returns:</B><DD>The underlying byte array.</DL>
</DD>
</DL>
<HR>
<A NAME="offset()"><!-- --></A><H3>
offset</H3>
<PRE>
int <A HREF="../../../../../../src-html/org/apache/hadoop/io/file/tfile/RawComparable.html#line.53"><B>offset</B></A>()</PRE>
<DL>
<DD>Get the offset of the first byte in the byte array.
<P>
<DD><DL>
<DT><B>Returns:</B><DD>The offset of the first byte in the byte array.</DL>
</DD>
</DL>
<HR>
<A NAME="size()"><!-- --></A><H3>
size</H3>
<PRE>
int <A HREF="../../../../../../src-html/org/apache/hadoop/io/file/tfile/RawComparable.html#line.60"><B>size</B></A>()</PRE>
<DL>
<DD>Get the size of the byte range in the byte array.
<P>
<DD><DL>
<DT><B>Returns:</B><DD>The size of the byte range in the byte array.</DL>
</DD>
</DL>
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|
apache-2.0
|
benjyw/kythe
|
kythe/go/storage/tools/read_entries/read_entries.go
|
5685
|
/*
* Copyright 2014 Google Inc. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
// Binary read_entries scans the entries from a specified GraphStore and emits
// them to stdout as a delimited stream.
package main
import (
"context"
"flag"
"fmt"
"log"
"os"
"sync"
"kythe.io/kythe/go/platform/delimited"
"kythe.io/kythe/go/platform/vfs"
"kythe.io/kythe/go/services/graphstore"
"kythe.io/kythe/go/storage/gsutil"
"kythe.io/kythe/go/util/flagutil"
"kythe.io/kythe/go/util/kytheuri"
spb "kythe.io/kythe/proto/storage_go_proto"
_ "kythe.io/kythe/go/services/graphstore/proxy"
_ "kythe.io/kythe/go/storage/leveldb"
)
var (
gs graphstore.Service
count = flag.Bool("count", false, "Only print the number of entries scanned")
shardsToFiles = flag.String("sharded_file", "", "If given, scan the entire GraphStore, storing each shard in a separate file instead of stdout (requires --shards)")
shardIndex = flag.Int64("shard_index", 0, "Index of a single shard to emit (requires --shards)")
shards = flag.Int64("shards", 0, "Number of shards to split the GraphStore")
edgeKind = flag.String("edge_kind", "", "Edge kind by which to filter a read/scan")
targetTicket = flag.String("target", "", "Ticket of target by which to filter a scan")
factPrefix = flag.String("fact_prefix", "", "Fact prefix by which to filter a scan")
)
func init() {
gsutil.Flag(&gs, "graphstore", "GraphStore to read")
flag.Usage = flagutil.SimpleUsage("Scans/reads the entries from a GraphStore, emitting a delimited entry stream to stdout",
"--graphstore spec [--count] [--shards N [--shard_index I] --sharded_file path] [--edge_kind] ([--fact_prefix str] [--target ticket] | [ticket...])")
}
func main() {
flag.Parse()
if gs == nil {
flagutil.UsageError("missing --graphstore")
} else if *shardsToFiles != "" && *shards <= 0 {
flagutil.UsageError("--sharded_file and --shards must be given together")
} else if *shards > 0 && len(flag.Args()) > 0 {
flagutil.UsageError("--shards and giving tickets for reads are mutually exclusive")
}
ctx := context.Background()
wr := delimited.NewWriter(os.Stdout)
var total int64
if *shards <= 0 {
entryFunc := func(entry *spb.Entry) error {
if *count {
total++
return nil
}
return wr.PutProto(entry)
}
if len(flag.Args()) > 0 {
if *targetTicket != "" || *factPrefix != "" {
log.Fatal("--target and --fact_prefix are unsupported when given tickets")
}
if err := readEntries(ctx, gs, entryFunc, *edgeKind, flag.Args()); err != nil {
log.Fatal(err)
}
} else {
if err := scanEntries(ctx, gs, entryFunc, *edgeKind, *targetTicket, *factPrefix); err != nil {
log.Fatal(err)
}
}
if *count {
fmt.Println(total)
}
return
}
sgs, ok := gs.(graphstore.Sharded)
if !ok {
log.Fatalf("Sharding unsupported for given GraphStore type: %T", gs)
} else if *shardIndex >= *shards {
log.Fatalf("Invalid shard index for %d shards: %d", *shards, *shardIndex)
}
if *count {
cnt, err := sgs.Count(ctx, &spb.CountRequest{Index: *shardIndex, Shards: *shards})
if err != nil {
log.Fatalf("ERROR: %v", err)
}
fmt.Println(cnt)
return
} else if *shardsToFiles != "" {
var wg sync.WaitGroup
wg.Add(int(*shards))
for i := int64(0); i < *shards; i++ {
go func(i int64) {
defer wg.Done()
path := fmt.Sprintf("%s-%.5d-of-%.5d", *shardsToFiles, i, *shards)
f, err := vfs.Create(ctx, path)
if err != nil {
log.Fatalf("Failed to create file %q: %v", path, err)
}
defer f.Close()
wr := delimited.NewWriter(f)
if err := sgs.Shard(ctx, &spb.ShardRequest{
Index: i,
Shards: *shards,
}, func(entry *spb.Entry) error {
return wr.PutProto(entry)
}); err != nil {
log.Fatalf("GraphStore shard scan error: %v", err)
}
}(i)
}
wg.Wait()
return
}
if err := sgs.Shard(ctx, &spb.ShardRequest{
Index: *shardIndex,
Shards: *shards,
}, func(entry *spb.Entry) error {
return wr.PutProto(entry)
}); err != nil {
log.Fatalf("GraphStore shard scan error: %v", err)
}
}
func readEntries(ctx context.Context, gs graphstore.Service, entryFunc graphstore.EntryFunc, edgeKind string, tickets []string) error {
for _, ticket := range tickets {
src, err := kytheuri.ToVName(ticket)
if err != nil {
return fmt.Errorf("error parsing ticket %q: %v", ticket, err)
}
if err := gs.Read(ctx, &spb.ReadRequest{
Source: src,
EdgeKind: edgeKind,
}, entryFunc); err != nil {
return fmt.Errorf("GraphStore Read error for ticket %q: %v", ticket, err)
}
}
return nil
}
func scanEntries(ctx context.Context, gs graphstore.Service, entryFunc graphstore.EntryFunc, edgeKind, targetTicket, factPrefix string) error {
var target *spb.VName
var err error
if targetTicket != "" {
target, err = kytheuri.ToVName(targetTicket)
if err != nil {
return fmt.Errorf("error parsing --target %q: %v", targetTicket, err)
}
}
if err := gs.Scan(ctx, &spb.ScanRequest{
EdgeKind: edgeKind,
FactPrefix: factPrefix,
Target: target,
}, entryFunc); err != nil {
return fmt.Errorf("GraphStore Scan error: %v", err)
}
return nil
}
|
apache-2.0
|
hh/chef_handler
|
recipes/default.rb
|
989
|
#
# Author:: Seth Chisamore (<[email protected]>)
# Cookbook Name:: chef_handlers
# Recipe:: default
#
# Copyright 2011, Opscode, Inc.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
Chef::Log.info("Chef Handlers will be at: #{node['chef_handler']['handler_path']}")
remote_directory node['chef_handler']['handler_path'] do
source 'handlers'
recursive true
action :nothing
if node.os == 'linux'
owner 'root'
group 'root'
mode "0755"
end
end.run_action(:create)
|
apache-2.0
|
Jason0204/jasontek_f103rb-zephyrOS-project
|
ext/hal/st/stm32cube/stm32l4xx/drivers/src/stm32l4xx_hal_nand.c
|
36872
|
/**
******************************************************************************
* @file stm32l4xx_hal_nand.c
* @author MCD Application Team
* @version V1.5.2
* @date 12-September-2016
* @brief NAND HAL module driver.
* This file provides a generic firmware to drive NAND memories mounted
* as external device.
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
This driver is a generic layered driver which contains a set of APIs used to
control NAND flash memories. It uses the FMC layer functions to interface
with NAND devices. This driver is used as follows:
(+) NAND flash memory configuration sequence using the function HAL_NAND_Init()
with control and timing parameters for both common and attribute spaces.
(+) Read NAND flash memory maker and device IDs using the function
HAL_NAND_Read_ID(). The read information is stored in the NAND_ID_TypeDef
structure declared by the function caller.
(+) Access NAND flash memory by read/write operations using the functions
HAL_NAND_Read_Page()/HAL_NAND_Read_SpareArea(), HAL_NAND_Write_Page()/HAL_NAND_Write_SpareArea()
to read/write page(s)/spare area(s). These functions use specific device
information (Block, page size..) predefined by the user in the HAL_NAND_Info_TypeDef
structure. The read/write address information is contained by the Nand_Address_Typedef
structure passed as parameter.
(+) Perform NAND flash Reset chip operation using the function HAL_NAND_Reset().
(+) Perform NAND flash erase block operation using the function HAL_NAND_Erase_Block().
The erase block address information is contained in the Nand_Address_Typedef
structure passed as parameter.
(+) Read the NAND flash status operation using the function HAL_NAND_Read_Status().
(+) You can also control the NAND device by calling the control APIs HAL_NAND_ECC_Enable()/
HAL_NAND_ECC_Disable() to respectively enable/disable the ECC code correction
feature or the function HAL_NAND_GetECC() to get the ECC correction code.
(+) You can monitor the NAND device HAL state by calling the function
HAL_NAND_GetState()
[..]
(@) This driver is a set of generic APIs which handle standard NAND flash operations.
If a NAND flash device contains different operations and/or implementations,
it should be implemented separately.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
#ifdef HAL_NAND_MODULE_ENABLED
/** @defgroup NAND NAND
* @brief NAND HAL module driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup NAND_Private_Constants NAND Private Constants
* @{
*/
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/** @defgroup NAND_Private_Macros NAND Private Macros
* @{
*/
/**
* @}
*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/** @defgroup NAND_Private_Functions NAND Private Functions
* @{
*/
static uint32_t NAND_AddressIncrement(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef* Address);
/**
* @}
*/
/* Exported functions ---------------------------------------------------------*/
/** @defgroup NAND_Exported_Functions NAND Exported Functions
* @{
*/
/** @defgroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
@verbatim
==============================================================================
##### NAND Initialization and de-initialization functions #####
==============================================================================
[..]
This section provides functions allowing to initialize/de-initialize
the NAND memory
@endverbatim
* @{
*/
/**
* @brief Perform NAND memory Initialization sequence.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param ComSpace_Timing: pointer to Common space timing structure
* @param AttSpace_Timing: pointer to Attribute space timing structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
{
/* Check the NAND handle state */
if(hnand == NULL)
{
return HAL_ERROR;
}
if(hnand->State == HAL_NAND_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hnand->Lock = HAL_UNLOCKED;
/* Initialize the low level hardware (MSP) */
HAL_NAND_MspInit(hnand);
}
/* Initialize NAND control Interface */
FMC_NAND_Init(hnand->Instance, &(hnand->Init));
/* Initialize NAND common space timing Interface */
FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank);
/* Initialize NAND attribute space timing Interface */
FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank);
/* Enable the NAND device */
__FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank);
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
return HAL_OK;
}
/**
* @brief Perform NAND memory De-Initialization sequence.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)
{
/* Initialize the low level hardware (MSP) */
HAL_NAND_MspDeInit(hnand);
/* Configure the NAND registers with their reset values */
FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank);
/* Reset the NAND controller state */
hnand->State = HAL_NAND_STATE_RESET;
/* Release Lock */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief Initialize the NAND MSP.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval None
*/
__weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hnand);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_NAND_MspInit could be implemented in the user file
*/
}
/**
* @brief DeInitialize the NAND MSP.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval None
*/
__weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hnand);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_NAND_MspDeInit could be implemented in the user file
*/
}
/**
* @brief This function handles NAND device interrupt request.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand)
{
/* Check NAND interrupt Rising edge flag */
if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE))
{
/* NAND interrupt callback*/
HAL_NAND_ITCallback(hnand);
/* Clear NAND interrupt Rising edge pending bit */
__FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE);
}
/* Check NAND interrupt Level flag */
if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL))
{
/* NAND interrupt callback*/
HAL_NAND_ITCallback(hnand);
/* Clear NAND interrupt Level pending bit */
__FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL);
}
/* Check NAND interrupt Falling edge flag */
if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE))
{
/* NAND interrupt callback*/
HAL_NAND_ITCallback(hnand);
/* Clear NAND interrupt Falling edge pending bit */
__FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE);
}
/* Check NAND interrupt FIFO empty flag */
if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT))
{
/* NAND interrupt callback*/
HAL_NAND_ITCallback(hnand);
/* Clear NAND interrupt FIFO empty pending bit */
__FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT);
}
}
/**
* @brief NAND interrupt feature callback.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval None
*/
__weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hnand);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_NAND_ITCallback could be implemented in the user file
*/
}
/**
* @}
*/
/** @defgroup NAND_Exported_Functions_Group2 Input and Output functions
* @brief Input Output and memory control functions
*
@verbatim
==============================================================================
##### NAND Input and Output functions #####
==============================================================================
[..]
This section provides functions allowing to use and control the NAND
memory
@endverbatim
* @{
*/
/**
* @brief Read the NAND memory electronic signature.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pNAND_ID: NAND ID structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID)
{
__IO uint32_t data = 0;
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnand);
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Send Read ID command sequence */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_READID;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
/* Read the electronic signature from NAND flash */
data = *(__IO uint32_t *)deviceaddress;
/* Return the data read */
pNAND_ID->Maker_Id = ADDR_1ST_CYCLE(data);
pNAND_ID->Device_Id = ADDR_2ND_CYCLE(data);
pNAND_ID->Third_Id = ADDR_3RD_CYCLE(data);
pNAND_ID->Fourth_Id = ADDR_4TH_CYCLE(data);
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief NAND memory reset.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnand);
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Send NAND reset command */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = 0xFF;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief Read Page(s) from NAND memory block.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress: pointer to NAND address structure
* @param pBuffer: pointer to destination read buffer
* @param NumPageToRead: number of pages to read from block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead)
{
__IO uint32_t index = 0;
uint32_t deviceaddress = 0, size = 0, numpagesread = 0, addressstatus = NAND_VALID_ADDRESS;
NAND_AddressTypeDef nandaddress;
uint32_t addressoffset = 0;
/* Process Locked */
__HAL_LOCK(hnand);
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Save the content of pAddress as it will be modified */
nandaddress.Block = pAddress->Block;
nandaddress.Page = pAddress->Page;
nandaddress.Zone = pAddress->Zone;
/* Page(s) read loop */
while((NumPageToRead != 0) && (addressstatus == NAND_VALID_ADDRESS))
{
/* update the buffer size */
size = hnand->Info.PageSize + ((hnand->Info.PageSize) * numpagesread);
/* Get the address offset */
addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
/* Send read page command sequence */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
/* for 512 and 1 GB devices, 4th cycle is required */
if(hnand->Info.BlockNbr >= 1024)
{
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
}
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
/* Get Data into Buffer */
for(; index < size; index++)
{
*(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress;
}
/* Increment read pages number */
numpagesread++;
/* Decrement pages to read */
NumPageToRead--;
/* Increment the NAND address */
addressstatus = NAND_AddressIncrement(hnand, &nandaddress);
}
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief Write Page(s) to NAND memory block.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress: pointer to NAND address structure
* @param pBuffer: pointer to source buffer to write
* @param NumPageToWrite: number of pages to write to block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite)
{
__IO uint32_t index = 0;
uint32_t tickstart = 0;
uint32_t deviceaddress = 0 , size = 0, numpageswritten = 0, addressstatus = NAND_VALID_ADDRESS;
NAND_AddressTypeDef nandaddress;
uint32_t addressoffset = 0;
/* Process Locked */
__HAL_LOCK(hnand);
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Save the content of pAddress as it will be modified */
nandaddress.Block = pAddress->Block;
nandaddress.Page = pAddress->Page;
nandaddress.Zone = pAddress->Zone;
/* Page(s) write loop */
while((NumPageToWrite != 0) && (addressstatus == NAND_VALID_ADDRESS))
{
/* update the buffer size */
size = hnand->Info.PageSize + ((hnand->Info.PageSize) * numpageswritten);
/* Get the address offset */
addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
/* Send write page command sequence */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
/* for 512 and 1 GB devices, 4th cycle is required */
if(hnand->Info.BlockNbr >= 1024)
{
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
}
/* Write data to memory */
for(; index < size; index++)
{
*(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++;
}
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
/* Get tick */
tickstart = HAL_GetTick();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
{
return HAL_TIMEOUT;
}
}
/* Increment written pages number */
numpageswritten++;
/* Decrement pages to write */
NumPageToWrite--;
/* Increment the NAND address */
addressstatus = NAND_AddressIncrement(hnand, &nandaddress);
}
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief Read Spare area(s) from NAND memory.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress: pointer to NAND address structure
* @param pBuffer: pointer to source buffer to write
* @param NumSpareAreaToRead: Number of spare area to read
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead)
{
__IO uint32_t index = 0;
uint32_t deviceaddress = 0, size = 0, num_spare_area_read = 0, addressstatus = NAND_VALID_ADDRESS;
NAND_AddressTypeDef nandaddress;
uint32_t addressoffset = 0;
/* Process Locked */
__HAL_LOCK(hnand);
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Save the content of pAddress as it will be modified */
nandaddress.Block = pAddress->Block;
nandaddress.Page = pAddress->Page;
nandaddress.Zone = pAddress->Zone;
/* Spare area(s) read loop */
while((NumSpareAreaToRead != 0) && (addressstatus == NAND_VALID_ADDRESS))
{
/* update the buffer size */
size = (hnand->Info.SpareAreaSize) + ((hnand->Info.SpareAreaSize) * num_spare_area_read);
/* Get the address offset */
addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
/* Send read spare area command sequence */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
/* for 512 and 1 GB devices, 4th cycle is required */
if(hnand->Info.BlockNbr >= 1024)
{
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
}
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
/* Get Data into Buffer */
for ( ;index < size; index++)
{
*(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress;
}
/* Increment read spare areas number */
num_spare_area_read++;
/* Decrement spare areas to read */
NumSpareAreaToRead--;
/* Increment the NAND address */
addressstatus = NAND_AddressIncrement(hnand, &nandaddress);
}
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief Write Spare area(s) to NAND memory.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress: pointer to NAND address structure
* @param pBuffer: pointer to source buffer to write
* @param NumSpareAreaTowrite: number of spare areas to write to block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
{
__IO uint32_t index = 0;
uint32_t tickstart = 0;
uint32_t deviceaddress = 0, size = 0, num_spare_area_written = 0, addressstatus = NAND_VALID_ADDRESS;
NAND_AddressTypeDef nandaddress;
uint32_t addressoffset = 0;
/* Process Locked */
__HAL_LOCK(hnand);
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Update the FMC_NAND controller state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Save the content of pAddress as it will be modified */
nandaddress.Block = pAddress->Block;
nandaddress.Page = pAddress->Page;
nandaddress.Zone = pAddress->Zone;
/* Spare area(s) write loop */
while((NumSpareAreaTowrite != 0) && (addressstatus == NAND_VALID_ADDRESS))
{
/* update the buffer size */
size = (hnand->Info.SpareAreaSize) + ((hnand->Info.SpareAreaSize) * num_spare_area_written);
/* Get the address offset */
addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
/* Send write Spare area command sequence */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
/* for 512 and 1 GB devices, 4th cycle is required */
if(hnand->Info.BlockNbr >= 1024)
{
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
}
/* Write data to memory */
for(; index < size; index++)
{
*(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++;
}
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
/* Get tick */
tickstart = HAL_GetTick();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
{
return HAL_TIMEOUT;
}
}
/* Increment written spare areas number */
num_spare_area_written++;
/* Decrement spare areas to write */
NumSpareAreaTowrite--;
/* Increment the NAND address */
addressstatus = NAND_AddressIncrement(hnand, &nandaddress);
}
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief NAND memory Block erase.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress: pointer to NAND address structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
{
uint32_t deviceaddress = 0;
uint32_t tickstart = 0;
/* Process Locked */
__HAL_LOCK(hnand);
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Send Erase block command sequence */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE0;
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
/* for 512 and 1 GB devices, 4th cycle is required */
if(hnand->Info.BlockNbr >= 1024)
{
*(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
}
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE1;
/* Update the NAND controller state */
hnand->State = HAL_NAND_STATE_READY;
/* Get tick */
tickstart = HAL_GetTick();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
{
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_TIMEOUT;
}
}
/* Process unlocked */
__HAL_UNLOCK(hnand);
return HAL_OK;
}
/**
* @brief NAND memory read status.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval NAND status
*/
uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand)
{
uint32_t data = 0;
uint32_t deviceaddress = 0;
/* Prevent unused argument(s) compilation warning */
UNUSED(hnand);
/* Identify the device address */
deviceaddress = NAND_DEVICE;
/* Send Read status operation command */
*(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_STATUS;
/* Read status register data */
data = *(__IO uint8_t *)deviceaddress;
/* Return the status */
if((data & NAND_ERROR) == NAND_ERROR)
{
return NAND_ERROR;
}
else if((data & NAND_READY) == NAND_READY)
{
return NAND_READY;
}
return NAND_BUSY;
}
/**
* @brief Increment the NAND memory address.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress: pointer to NAND address structure
* @retval The new status of the increment address operation. It can be:
* - NAND_VALID_ADDRESS: When the new address is valid address
* - NAND_INVALID_ADDRESS: When the new address is invalid address
*/
uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
{
uint32_t status = NAND_VALID_ADDRESS;
/* Increment page address */
pAddress->Page++;
/* Check NAND address is valid */
if(pAddress->Page == hnand->Info.BlockSize)
{
pAddress->Page = 0;
pAddress->Block++;
if(pAddress->Block == hnand->Info.ZoneSize)
{
pAddress->Block = 0;
pAddress->Zone++;
if(pAddress->Zone == (hnand->Info.ZoneSize/ hnand->Info.BlockNbr))
{
status = NAND_INVALID_ADDRESS;
}
}
}
return (status);
}
/**
* @}
*/
/** @defgroup NAND_Exported_Functions_Group3 Peripheral Control functions
* @brief management functions
*
@verbatim
==============================================================================
##### NAND Control functions #####
==============================================================================
[..]
This subsection provides a set of functions allowing to control dynamically
the NAND interface.
@endverbatim
* @{
*/
/**
* @brief Enable dynamically NAND ECC feature.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand)
{
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Update the NAND state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Enable ECC feature */
FMC_NAND_ECC_Enable(hnand->Instance, hnand->Init.NandBank);
/* Update the NAND state */
hnand->State = HAL_NAND_STATE_READY;
return HAL_OK;
}
/**
* @brief Disable dynamically NAND ECC feature.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand)
{
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Update the NAND state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Disable ECC feature */
FMC_NAND_ECC_Disable(hnand->Instance, hnand->Init.NandBank);
/* Update the NAND state */
hnand->State = HAL_NAND_STATE_READY;
return HAL_OK;
}
/**
* @brief Disable dynamically NAND ECC feature.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param ECCval: pointer to ECC value
* @param Timeout: maximum timeout to wait
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout)
{
HAL_StatusTypeDef status = HAL_OK;
/* Check the NAND controller state */
if(hnand->State == HAL_NAND_STATE_BUSY)
{
return HAL_BUSY;
}
/* Update the NAND state */
hnand->State = HAL_NAND_STATE_BUSY;
/* Get NAND ECC value */
status = FMC_NAND_GetECC(hnand->Instance, ECCval, hnand->Init.NandBank, Timeout);
/* Update the NAND state */
hnand->State = HAL_NAND_STATE_READY;
return status;
}
/**
* @}
*/
/** @defgroup NAND_Exported_Functions_Group4 Peripheral State functions
* @brief Peripheral State functions
*
@verbatim
==============================================================================
##### NAND State functions #####
==============================================================================
[..]
This subsection permits to get in run-time the status of the NAND controller
and the data flow.
@endverbatim
* @{
*/
/**
* @brief Return the NAND handle state.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL state
*/
HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand)
{
/* Return NAND handle state */
return hnand->State;
}
/**
* @}
*/
/**
* @}
*/
/** @addtogroup NAND_Private_Functions
* @{
*/
/**
* @brief Increment the NAND memory address.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param Address: address to be incremented.
* @retval The new status of the increment address operation. It can be:
* - NAND_VALID_ADDRESS: When the new address is valid address
* - NAND_INVALID_ADDRESS: When the new address is invalid address
*/
static uint32_t NAND_AddressIncrement(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef* Address)
{
uint32_t status = NAND_VALID_ADDRESS;
Address->Page++;
if(Address->Page == hnand->Info.BlockSize)
{
Address->Page = 0;
Address->Block++;
if(Address->Block == hnand->Info.ZoneSize)
{
Address->Block = 0;
Address->Zone++;
if(Address->Zone == hnand->Info.BlockNbr)
{
status = NAND_INVALID_ADDRESS;
}
}
}
return (status);
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_NAND_MODULE_ENABLED */
/**
* @}
*/
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
apache-2.0
|
wendal/alipay-sdk
|
src/main/java/com/alipay/api/response/AlipayMarketingCampaignActivityOfflineCreateResponse.java
|
860
|
package com.alipay.api.response;
import com.alipay.api.internal.mapping.ApiField;
import com.alipay.api.AlipayResponse;
/**
* ALIPAY API: alipay.marketing.campaign.activity.offline.create response.
*
* @author auto create
* @since 1.0, 2017-04-07 18:22:19
*/
public class AlipayMarketingCampaignActivityOfflineCreateResponse extends AlipayResponse {
private static final long serialVersionUID = 3571851859414371374L;
/**
* 创建成功的活动id
*/
@ApiField("camp_id")
private String campId;
/**
* 创建成功的券模版id
*/
@ApiField("prize_id")
private String prizeId;
public void setCampId(String campId) {
this.campId = campId;
}
public String getCampId( ) {
return this.campId;
}
public void setPrizeId(String prizeId) {
this.prizeId = prizeId;
}
public String getPrizeId( ) {
return this.prizeId;
}
}
|
apache-2.0
|
SillentTroll/rascam_client
|
wsgi/common/constants.py
|
370
|
class Config(object):
SERVER_URL = "BACKEND_SERVER_URL"
CAMERA_NAME = "CAM_NAME"
API_KEY = "API_KEY"
class Backend(object):
URL_PREFIX = "http://"
API_PREFIX = "/api/v1/"
AUTH_URL = "%susers/auth" % API_PREFIX
REGISTER_CAM_URL = "%scam" % API_PREFIX
UPLOAD_URL = "%scam/upload" % API_PREFIX
CHECK_STATE = "%scam/state" % API_PREFIX
|
apache-2.0
|
CarloMicieli/footballdb-starter
|
src/main/java/io/github/carlomicieli/footballdb/starter/domain/games/PassingStatsFormatException.java
|
1290
|
/*
* Copyright 2014 the original author or authors.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package io.github.carlomicieli.footballdb.starter.domain.games;
/**
* @author Carlo Micieli
*/
@SuppressWarnings("serial")
public class PassingStatsFormatException extends IllegalArgumentException {
/**
* Constructs a <em>PassingStatsFormatException</em> with no detail message.
*/
public PassingStatsFormatException() {
this("Invalid format for passing stats. Correct format is [Comp-Att-Yd-TD-INT]");
}
/**
* Constructs a <em>PassingStatsFormatException</em> with the specified detail message.
* @param s the detail message.
*/
public PassingStatsFormatException(String s) {
super(s);
}
}
|
apache-2.0
|
jima80525/audio-book-cde
|
README.md
|
2046
|
audio-book-cde
==============
A simple wrapper around abcde to rip multi-disc audiobooks
This script came out of a personal need and, at this point, is designed entirely
around what my workflow looks like. It was not originally designed to be a
general purpose tool and might not fit your needs perfectly. If not, please
fork and let me know. I'm happy to spend some more time on it.
Here's my use case for the tool. I frequently get audiobooks on CD which I want
to rip to MP3 files. I want an automated system for ripping those discs, ending
with a directory structure that looks like:
author
├── title-Disc-1
│ ├── 1.Track_1.mp3
│ ├── 2.Track_2.mp3
│ └── 3.Track_3.mp3
├── title-Disc-2
│ ├── 1.Track_1.mp3
│ ├── 2.Track_2.mp3
│ └── 3.Track_3.mp3
└── title-Disc-3
└── 1.Track_1.mp3
[etc]
Abcde does quite a lot of this, but getting the multi-disc aspect of it seemed
outside the scope of that product. This script is just a bash shell wrapper
around abcde to generate that format.
Installation
============
Simply copy the script to a location in your PATH and type
audio-book-cde <author> <book-title> <number-of-discs> [abcde conf file]
If you do not specify a conf file for abcde, one will be provided for you. The
contents of this conf file are visible in the script itself, but they basically
tell abcde to not prompt, to not query cddb and to put the files in the desired
directory structure.
*Note* You must have abcde installed with all of the other applications needed
to rip into your desired format.
Compatibility issues
=====================
Note that I wrote and tested this script on linux-mint 17 (Qiana). I make no
promises that this will work on other versions of linux.
The most likely issue you will run into will be with the wait_for_cd function
which seems like it might not be universal.
The rest of it is fairly vanilla bash.
|
apache-2.0
|
wangqi/gameserver
|
server/src/gensrc/java/com/xinqihd/sns/gameserver/proto/XinqiBceForgetPassword.java
|
16953
|
// Generated by the protocol buffer compiler. DO NOT EDIT!
// source: BceForgetPassword.proto
package com.xinqihd.sns.gameserver.proto;
public final class XinqiBceForgetPassword {
private XinqiBceForgetPassword() {}
public static void registerAllExtensions(
com.google.protobuf.ExtensionRegistry registry) {
}
public interface BceForgetPasswordOrBuilder
extends com.google.protobuf.MessageOrBuilder {
// required string roleName = 1;
boolean hasRoleName();
String getRoleName();
}
public static final class BceForgetPassword extends
com.google.protobuf.GeneratedMessage
implements BceForgetPasswordOrBuilder {
// Use BceForgetPassword.newBuilder() to construct.
private BceForgetPassword(Builder builder) {
super(builder);
}
private BceForgetPassword(boolean noInit) {}
private static final BceForgetPassword defaultInstance;
public static BceForgetPassword getDefaultInstance() {
return defaultInstance;
}
public BceForgetPassword getDefaultInstanceForType() {
return defaultInstance;
}
public static final com.google.protobuf.Descriptors.Descriptor
getDescriptor() {
return com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_descriptor;
}
protected com.google.protobuf.GeneratedMessage.FieldAccessorTable
internalGetFieldAccessorTable() {
return com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_fieldAccessorTable;
}
private int bitField0_;
// required string roleName = 1;
public static final int ROLENAME_FIELD_NUMBER = 1;
private java.lang.Object roleName_;
public boolean hasRoleName() {
return ((bitField0_ & 0x00000001) == 0x00000001);
}
public String getRoleName() {
java.lang.Object ref = roleName_;
if (ref instanceof String) {
return (String) ref;
} else {
com.google.protobuf.ByteString bs =
(com.google.protobuf.ByteString) ref;
String s = bs.toStringUtf8();
if (com.google.protobuf.Internal.isValidUtf8(bs)) {
roleName_ = s;
}
return s;
}
}
private com.google.protobuf.ByteString getRoleNameBytes() {
java.lang.Object ref = roleName_;
if (ref instanceof String) {
com.google.protobuf.ByteString b =
com.google.protobuf.ByteString.copyFromUtf8((String) ref);
roleName_ = b;
return b;
} else {
return (com.google.protobuf.ByteString) ref;
}
}
private void initFields() {
roleName_ = "";
}
private byte memoizedIsInitialized = -1;
public final boolean isInitialized() {
byte isInitialized = memoizedIsInitialized;
if (isInitialized != -1) return isInitialized == 1;
if (!hasRoleName()) {
memoizedIsInitialized = 0;
return false;
}
memoizedIsInitialized = 1;
return true;
}
public void writeTo(com.google.protobuf.CodedOutputStream output)
throws java.io.IOException {
getSerializedSize();
if (((bitField0_ & 0x00000001) == 0x00000001)) {
output.writeBytes(1, getRoleNameBytes());
}
getUnknownFields().writeTo(output);
}
private int memoizedSerializedSize = -1;
public int getSerializedSize() {
int size = memoizedSerializedSize;
if (size != -1) return size;
size = 0;
if (((bitField0_ & 0x00000001) == 0x00000001)) {
size += com.google.protobuf.CodedOutputStream
.computeBytesSize(1, getRoleNameBytes());
}
size += getUnknownFields().getSerializedSize();
memoizedSerializedSize = size;
return size;
}
private static final long serialVersionUID = 0L;
@java.lang.Override
protected java.lang.Object writeReplace()
throws java.io.ObjectStreamException {
return super.writeReplace();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(
com.google.protobuf.ByteString data)
throws com.google.protobuf.InvalidProtocolBufferException {
return newBuilder().mergeFrom(data).buildParsed();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(
com.google.protobuf.ByteString data,
com.google.protobuf.ExtensionRegistryLite extensionRegistry)
throws com.google.protobuf.InvalidProtocolBufferException {
return newBuilder().mergeFrom(data, extensionRegistry)
.buildParsed();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(byte[] data)
throws com.google.protobuf.InvalidProtocolBufferException {
return newBuilder().mergeFrom(data).buildParsed();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(
byte[] data,
com.google.protobuf.ExtensionRegistryLite extensionRegistry)
throws com.google.protobuf.InvalidProtocolBufferException {
return newBuilder().mergeFrom(data, extensionRegistry)
.buildParsed();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(java.io.InputStream input)
throws java.io.IOException {
return newBuilder().mergeFrom(input).buildParsed();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(
java.io.InputStream input,
com.google.protobuf.ExtensionRegistryLite extensionRegistry)
throws java.io.IOException {
return newBuilder().mergeFrom(input, extensionRegistry)
.buildParsed();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseDelimitedFrom(java.io.InputStream input)
throws java.io.IOException {
Builder builder = newBuilder();
if (builder.mergeDelimitedFrom(input)) {
return builder.buildParsed();
} else {
return null;
}
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseDelimitedFrom(
java.io.InputStream input,
com.google.protobuf.ExtensionRegistryLite extensionRegistry)
throws java.io.IOException {
Builder builder = newBuilder();
if (builder.mergeDelimitedFrom(input, extensionRegistry)) {
return builder.buildParsed();
} else {
return null;
}
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(
com.google.protobuf.CodedInputStream input)
throws java.io.IOException {
return newBuilder().mergeFrom(input).buildParsed();
}
public static com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword parseFrom(
com.google.protobuf.CodedInputStream input,
com.google.protobuf.ExtensionRegistryLite extensionRegistry)
throws java.io.IOException {
return newBuilder().mergeFrom(input, extensionRegistry)
.buildParsed();
}
public static Builder newBuilder() { return Builder.create(); }
public Builder newBuilderForType() { return newBuilder(); }
public static Builder newBuilder(com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword prototype) {
return newBuilder().mergeFrom(prototype);
}
public Builder toBuilder() { return newBuilder(this); }
@java.lang.Override
protected Builder newBuilderForType(
com.google.protobuf.GeneratedMessage.BuilderParent parent) {
Builder builder = new Builder(parent);
return builder;
}
public static final class Builder extends
com.google.protobuf.GeneratedMessage.Builder<Builder>
implements com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPasswordOrBuilder {
public static final com.google.protobuf.Descriptors.Descriptor
getDescriptor() {
return com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_descriptor;
}
protected com.google.protobuf.GeneratedMessage.FieldAccessorTable
internalGetFieldAccessorTable() {
return com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_fieldAccessorTable;
}
// Construct using com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword.newBuilder()
private Builder() {
maybeForceBuilderInitialization();
}
private Builder(BuilderParent parent) {
super(parent);
maybeForceBuilderInitialization();
}
private void maybeForceBuilderInitialization() {
if (com.google.protobuf.GeneratedMessage.alwaysUseFieldBuilders) {
}
}
private static Builder create() {
return new Builder();
}
public Builder clear() {
super.clear();
roleName_ = "";
bitField0_ = (bitField0_ & ~0x00000001);
return this;
}
public Builder clone() {
return create().mergeFrom(buildPartial());
}
public com.google.protobuf.Descriptors.Descriptor
getDescriptorForType() {
return com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword.getDescriptor();
}
public com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword getDefaultInstanceForType() {
return com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword.getDefaultInstance();
}
public com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword build() {
com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword result = buildPartial();
if (!result.isInitialized()) {
throw newUninitializedMessageException(result);
}
return result;
}
private com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword buildParsed()
throws com.google.protobuf.InvalidProtocolBufferException {
com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword result = buildPartial();
if (!result.isInitialized()) {
throw newUninitializedMessageException(
result).asInvalidProtocolBufferException();
}
return result;
}
public com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword buildPartial() {
com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword result = new com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword(this);
int from_bitField0_ = bitField0_;
int to_bitField0_ = 0;
if (((from_bitField0_ & 0x00000001) == 0x00000001)) {
to_bitField0_ |= 0x00000001;
}
result.roleName_ = roleName_;
result.bitField0_ = to_bitField0_;
onBuilt();
return result;
}
public Builder mergeFrom(com.google.protobuf.Message other) {
if (other instanceof com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword) {
return mergeFrom((com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword)other);
} else {
super.mergeFrom(other);
return this;
}
}
public Builder mergeFrom(com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword other) {
if (other == com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword.getDefaultInstance()) return this;
if (other.hasRoleName()) {
setRoleName(other.getRoleName());
}
this.mergeUnknownFields(other.getUnknownFields());
return this;
}
public final boolean isInitialized() {
if (!hasRoleName()) {
return false;
}
return true;
}
public Builder mergeFrom(
com.google.protobuf.CodedInputStream input,
com.google.protobuf.ExtensionRegistryLite extensionRegistry)
throws java.io.IOException {
com.google.protobuf.UnknownFieldSet.Builder unknownFields =
com.google.protobuf.UnknownFieldSet.newBuilder(
this.getUnknownFields());
while (true) {
int tag = input.readTag();
switch (tag) {
case 0:
this.setUnknownFields(unknownFields.build());
onChanged();
return this;
default: {
if (!parseUnknownField(input, unknownFields,
extensionRegistry, tag)) {
this.setUnknownFields(unknownFields.build());
onChanged();
return this;
}
break;
}
case 10: {
bitField0_ |= 0x00000001;
roleName_ = input.readBytes();
break;
}
}
}
}
private int bitField0_;
// required string roleName = 1;
private java.lang.Object roleName_ = "";
public boolean hasRoleName() {
return ((bitField0_ & 0x00000001) == 0x00000001);
}
public String getRoleName() {
java.lang.Object ref = roleName_;
if (!(ref instanceof String)) {
String s = ((com.google.protobuf.ByteString) ref).toStringUtf8();
roleName_ = s;
return s;
} else {
return (String) ref;
}
}
public Builder setRoleName(String value) {
if (value == null) {
throw new NullPointerException();
}
bitField0_ |= 0x00000001;
roleName_ = value;
onChanged();
return this;
}
public Builder clearRoleName() {
bitField0_ = (bitField0_ & ~0x00000001);
roleName_ = getDefaultInstance().getRoleName();
onChanged();
return this;
}
void setRoleName(com.google.protobuf.ByteString value) {
bitField0_ |= 0x00000001;
roleName_ = value;
onChanged();
}
// @@protoc_insertion_point(builder_scope:com.xinqihd.sns.gameserver.proto.BceForgetPassword)
}
static {
defaultInstance = new BceForgetPassword(true);
defaultInstance.initFields();
}
// @@protoc_insertion_point(class_scope:com.xinqihd.sns.gameserver.proto.BceForgetPassword)
}
private static com.google.protobuf.Descriptors.Descriptor
internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_descriptor;
private static
com.google.protobuf.GeneratedMessage.FieldAccessorTable
internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_fieldAccessorTable;
public static com.google.protobuf.Descriptors.FileDescriptor
getDescriptor() {
return descriptor;
}
private static com.google.protobuf.Descriptors.FileDescriptor
descriptor;
static {
java.lang.String[] descriptorData = {
"\n\027BceForgetPassword.proto\022 com.xinqihd.s" +
"ns.gameserver.proto\"%\n\021BceForgetPassword" +
"\022\020\n\010roleName\030\001 \002(\tB\030B\026XinqiBceForgetPass" +
"word"
};
com.google.protobuf.Descriptors.FileDescriptor.InternalDescriptorAssigner assigner =
new com.google.protobuf.Descriptors.FileDescriptor.InternalDescriptorAssigner() {
public com.google.protobuf.ExtensionRegistry assignDescriptors(
com.google.protobuf.Descriptors.FileDescriptor root) {
descriptor = root;
internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_descriptor =
getDescriptor().getMessageTypes().get(0);
internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_fieldAccessorTable = new
com.google.protobuf.GeneratedMessage.FieldAccessorTable(
internal_static_com_xinqihd_sns_gameserver_proto_BceForgetPassword_descriptor,
new java.lang.String[] { "RoleName", },
com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword.class,
com.xinqihd.sns.gameserver.proto.XinqiBceForgetPassword.BceForgetPassword.Builder.class);
return null;
}
};
com.google.protobuf.Descriptors.FileDescriptor
.internalBuildGeneratedFileFrom(descriptorData,
new com.google.protobuf.Descriptors.FileDescriptor[] {
}, assigner);
}
// @@protoc_insertion_point(outer_class_scope)
}
|
apache-2.0
|
bonds0097/eliteauthority
|
client/app/views/second.html
|
388
|
<p>This is the second view.</p>
<pre>{{ctrl.systemSelected}}</pre>
<input type="text" ng-model="ctrl.systemSelected" placeholder="Enter System Name" typeahead="system for system in ctrl.findSystem($viewValue)" typeahead-loading="loadingSystems" typeahead-min-length="3" typeahead-editable="false" class="form-control">
<i ng-show="loadingSystems" class="glyphicon glyphicon-refresh"></i>
|
apache-2.0
|
mdoering/backbone
|
life/Plantae/Magnoliophyta/Magnoliopsida/Ericales/Actinidiaceae/Actinidia/Actinidia tetramera/README.md
|
221
|
# Actinidia tetramera Maxim. SPECIES
#### Status
ACCEPTED
#### According to
International Plant Names Index
#### Published in
Trudy Imp. S. -Peterburgsk. Bot. Sada 11:35. 1890
#### Original name
null
### Remarks
null
|
apache-2.0
|
zzsoszz/wyyf
|
src/com/lys/ping/PingCharge.java
|
5897
|
package com.lys.ping;
import java.util.ArrayList;
import java.util.HashMap;
import java.util.List;
import java.util.Map;
import com.pingplusplus.Pingpp;
import com.pingplusplus.exception.APIConnectionException;
import com.pingplusplus.exception.APIException;
import com.pingplusplus.exception.AuthenticationException;
import com.pingplusplus.exception.ChannelException;
import com.pingplusplus.exception.InvalidRequestException;
import com.pingplusplus.exception.PingppException;
import com.pingplusplus.model.App;
import com.pingplusplus.model.Charge;
import com.pingplusplus.model.ChargeCollection;
import com.sun.istack.internal.logging.Logger;
/**
* Charge 对象相关示例
* @author sunkai
*
* 该实例程序演示了如何从 ping++ 服务器获得 charge ，查询 charge。
*
* 开发者需要填写 apiKey 和 appId , apiKey 可以在 ping++ 管理平台【应用信息里面查看】
*
* apiKey 有 TestKey 和 LiveKey 两种。
*
* TestKey 模式下不会产生真实的交易。
*/
public class PingCharge {
Logger logger = Logger.getLogger(getClass());
public PingCharge(){
Pingpp.apiKey = apiKey;
}
/**
* pingpp 管理平台对应的 API key
*/
public static String apiKey = "sk_live_zGMmfNLh87sghw4qjeWs4DnP";
/**
* pingpp 管理平台对应的应用 ID
*/
public static String appId = "app_j9S4O4G00GC0jHWj";
public static void main(String[] args) {
Pingpp.apiKey = apiKey;
PingCharge ce = new PingCharge();
System.out.println("---------创建 charge");
//Charge charge = ce.charge();
System.out.println("---------查询 charge");
//ce.retrieve(charge.getId());
System.out.println("---------查询 charge列表");
//ce.all();
}
/**
* 创建 Charge
*
* 创建 Charge 用户需要组装一个 map 对象作为参数传递给 Charge.create();
* map 里面参数的具体说明请参考：https://pingxx.com/document/api#api-c-new
* @return
*/
public Charge charge(String channel,int amount,String Subject,String Body,String OrderId) {
logger.info("channel:"+channel+" amount:"+amount+" Subject:"+Subject+" Body:"+Body+" OrderId:"+OrderId);
Charge charge = null;
Map<String, Object> chargeMap = new HashMap<String, Object>();
chargeMap.put("amount", amount*100);
chargeMap.put("currency", "cny");
chargeMap.put("subject", Subject);
chargeMap.put("body", Body);
chargeMap.put("order_no", OrderId);
chargeMap.put("channel", channel);
chargeMap.put("client_ip", "127.0.0.1");
Map<String,Object> extra =new HashMap<String, Object>();
if(channel.equals("alipay_wap")){
extra.put("success_url", "http://www.wangzhong.com/index/PayMoneyEnd");
}else if(channel.equals("alipay_wap")){
}else if(channel.equals("upacp_wap")||channel.equals("upmp_wap")){
extra.put("result_url", "http://www.wangzhong.com/index/PayMoneyEnd");
}
//extra.put("cancel_url", "http://www.wangzhong.com/");
chargeMap.put("extra", extra);
Map<String, String> app = new HashMap<String, String>();
app.put("id",appId);
chargeMap.put("app", app);
try {
//发起交易请求
charge = Charge.create(chargeMap);
System.out.println(charge);
} catch (PingppException e) {
e.printStackTrace();
}
return charge;
}
/**
* 查询 Charge
*
* 该接口根据 charge Id 查询对应的 charge 。
* 参考文档：https://pingxx.com/document/api#api-c-inquiry
*
* 该接口可以传递一个 expand ， 返回的 charge 中的 app 会变成 app 对象。
* 参考文档： https://pingxx.com/document/api#api-expanding
* @param id
*/
public void retrieve(String id) {
try {
Map<String, Object> param = new HashMap<String, Object>();
List<String> expande = new ArrayList<String>();
expande.add("app");
param.put("expand", expande);
//Charge charge = Charge.retrieve(id);
//Expand app
Charge charge = Charge.retrieve(id, param);
if (charge.getApp() instanceof App) {
//App app = (App) charge.getApp();
// System.out.println("App Object ,appId = " + app.getId());
} else {
// System.out.println("String ,appId = " + charge.getApp());
}
System.out.println(charge);
} catch (PingppException e) {
e.printStackTrace();
}
}
/**
* 分页查询Charge
*
* 该接口为批量查询接口，默认一次查询10条。
* 用户可以通过添加 limit 参数自行设置查询数目，最多一次不能超过 100 条。
*
* 该接口同样可以使用 expand 参数。
* @return
*/
public ChargeCollection all() {
ChargeCollection chargeCollection = null;
Map<String, Object> chargeParams = new HashMap<String, Object>();
chargeParams.put("limit", 3);
//增加此处设施，刻意获取app expande
// List<String> expande = new ArrayList<String>();
// expande.add("app");
// chargeParams.put("expand", expande);
try {
chargeCollection = Charge.all(chargeParams);
System.out.println(chargeCollection);
} catch (AuthenticationException e) {
e.printStackTrace();
} catch (InvalidRequestException e) {
e.printStackTrace();
} catch (APIConnectionException e) {
e.printStackTrace();
} catch (APIException e) {
e.printStackTrace();
} catch (ChannelException e) {
e.printStackTrace();
}
return chargeCollection;
}
}
|
apache-2.0
|
jaor/bigmler
|
bigmler/processing/ensembles.py
|
3944
|
# -*- coding: utf-8 -*-
#
# Copyright 2014-2020 BigML
#
# Licensed under the Apache License, Version 2.0 (the "License"); you may
# not use this file except in compliance with the License. You may obtain
# a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
"""BigMLer - Resources processing: creation, update and retrieval of ensembles
"""
import bigmler.utils as u
import bigmler.resourcesapi.ensembles as r
import bigmler.checkpoint as c
MONTECARLO_FACTOR = 200
def ensemble_processing(datasets, api, args, resume,
fields=None,
session_file=None,
path=None, log=None):
"""Creates an ensemble of models from the input data
"""
ensembles = []
ensemble_ids = []
models = []
model_ids = []
number_of_ensembles = len(datasets)
if resume:
resume, ensemble_ids = c.checkpoint(
c.are_ensembles_created, path, number_of_ensembles,
debug=args.debug)
if args.number_of_models > 1:
_, model_ids = c.checkpoint(c.are_models_created, path, \
number_of_ensembles * args.number_of_models)
models = model_ids
if not resume:
message = u.dated("Found %s ensembles out of %s. Resuming.\n"
% (len(ensemble_ids),
number_of_ensembles))
u.log_message(message, log_file=session_file,
console=args.verbosity)
ensembles = ensemble_ids
number_of_ensembles -= len(ensemble_ids)
if number_of_ensembles > 0:
ensemble_args = r.set_ensemble_args(args, fields=fields)
ensembles, ensemble_ids, models, model_ids = r.create_ensembles(
datasets, ensembles, ensemble_args, args, api=api, path=path,
number_of_ensembles=number_of_ensembles,
session_file=session_file, log=log)
return ensembles, ensemble_ids, models, model_ids, resume
def ensemble_per_label(labels, dataset, api, args, resume, fields=None,
multi_label_data=None,
session_file=None, path=None, log=None):
"""Creates an ensemble per label for multi-label datasets
"""
ensemble_ids = []
ensembles = []
model_ids = []
models = []
number_of_ensembles = len(labels)
if resume:
resume, ensemble_ids = c.checkpoint(
c.are_ensembles_created, path, number_of_ensembles,
debug=args.debug)
ensembles = ensemble_ids
if not resume:
message = u.dated("Found %s ensembles out of %s."
" Resuming.\n"
% (len(ensemble_ids),
number_of_ensembles))
u.log_message(message, log_file=session_file,
console=args.verbosity)
# erase models' info that will be rebuilt
u.log_created_resources("models", path, None,
mode='w')
number_of_ensembles = len(labels) - len(ensemble_ids)
ensemble_args_list = r.set_label_ensemble_args(
args,
labels, multi_label_data, number_of_ensembles,
fields)
# create ensembles changing the input_field to select
# only one label at a time
(ensembles, ensemble_ids,
models, model_ids) = r.create_ensembles(
dataset, ensemble_ids, ensemble_args_list, args,
number_of_ensembles, api,
path, session_file, log)
return ensembles, ensemble_ids, models, model_ids, resume
|
apache-2.0
|
azatoth/buck
|
test/com/facebook/buck/cli/InstallCommandTest.java
|
14471
|
/*
* Copyright 2012-present Facebook, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License. You may obtain
* a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*/
package com.facebook.buck.cli;
import static org.junit.Assert.assertEquals;
import static org.junit.Assert.assertFalse;
import static org.junit.Assert.assertNotNull;
import static org.junit.Assert.assertNull;
import static org.junit.Assert.assertSame;
import static org.junit.Assert.assertTrue;
import com.android.ddmlib.IDevice;
import com.android.ddmlib.IShellOutputReceiver;
import com.android.ddmlib.InstallException;
import com.facebook.buck.rules.ArtifactCache;
import com.facebook.buck.rules.NoopArtifactCache;
import com.facebook.buck.util.Ansi;
import com.facebook.buck.util.ProjectFilesystem;
import com.google.common.io.ByteStreams;
import org.junit.Before;
import org.junit.Test;
import org.kohsuke.args4j.CmdLineException;
import java.io.File;
import java.io.OutputStream;
import java.io.PrintStream;
import java.util.List;
import java.util.concurrent.atomic.AtomicReference;
public class InstallCommandTest {
private BuckConfig buckConfig;
private InstallCommand installCommand;
@Before
public void setUp() {
buckConfig = BuckConfig.emptyConfig();
installCommand = createInstallCommand();
}
private InstallCommandOptions getOptions(String...args) throws CmdLineException {
InstallCommandOptions options = new InstallCommandOptions(buckConfig);
new CmdLineParserAdditionalOptions(options).parseArgument(args);
return options;
}
private TestDevice createRealDevice(String serial, IDevice.DeviceState state) {
TestDevice device = TestDevice.createRealDevice(serial);
device.setState(state);
return device;
}
private TestDevice createEmulator(String serial, IDevice.DeviceState state) {
TestDevice device = TestDevice.createEmulator(serial);
device.setState(state);
return device;
}
private TestDevice createDeviceForShellCommandTest(final String output) {
return new TestDevice() {
@Override
public void executeShellCommand(String cmd, IShellOutputReceiver receiver, int timeout) {
byte[] outputBytes = output.getBytes();
receiver.addOutput(outputBytes, 0, outputBytes.length);
receiver.flush();
}
};
}
private InstallCommand createInstallCommand() {
OutputStream nullOut = ByteStreams.nullOutputStream();
PrintStream out = new PrintStream(nullOut);
Console console = new Console(out, out, new Ansi());
ProjectFilesystem filesystem = new ProjectFilesystem(new File("."));
ArtifactCache artifactCache = new NoopArtifactCache();
return new InstallCommand(console.getStdOut(),
console.getStdErr(),
console,
filesystem,
artifactCache);
}
/**
* Verify that null is returned when no devices are present.
*/
@Test
public void testDeviceFilterNoDevices() throws CmdLineException {
InstallCommandOptions options = getOptions();
IDevice[] devices = new IDevice[] { };
assertNull(installCommand.filterDevices(devices, options.adbOptions()));
}
/**
* Verify that non-online devices will not appear in result list.
*/
@Test
public void testDeviceFilterOnlineOnly() throws CmdLineException {
InstallCommandOptions options = getOptions();
IDevice[] devices = new IDevice[] {
createEmulator("1", IDevice.DeviceState.OFFLINE),
createEmulator("2", IDevice.DeviceState.BOOTLOADER),
createEmulator("3", IDevice.DeviceState.RECOVERY),
createRealDevice("4", IDevice.DeviceState.OFFLINE),
createRealDevice("5", IDevice.DeviceState.BOOTLOADER),
createRealDevice("6", IDevice.DeviceState.RECOVERY),
};
assertNull(installCommand.filterDevices(devices, options.adbOptions()));
}
/**
* Verify that multi-install is not enabled and multiple devices
* pass the filter null is returned. Also verify that if multiple
* devices are passing the filter and multi-install mode is enabled
* they all appear in resulting list.
*/
@Test
public void testDeviceFilterMultipleDevices() throws CmdLineException {
IDevice[] devices = new IDevice[] {
createEmulator("1", IDevice.DeviceState.ONLINE),
createEmulator("2", IDevice.DeviceState.ONLINE),
createRealDevice("4", IDevice.DeviceState.ONLINE),
createRealDevice("5", IDevice.DeviceState.ONLINE)
};
InstallCommandOptions options = getOptions();
assertNull(installCommand.filterDevices(devices, options.adbOptions()));
options = getOptions(AdbOptions.MULTI_INSTALL_MODE_SHORT_ARG);
List<IDevice> filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNotNull(filteredDevices);
assertEquals(devices.length, filteredDevices.size());
}
/**
* Verify that when emulator-only mode is enabled only emulators appear in result.
*/
@Test
public void testDeviceFilterEmulator() throws CmdLineException {
InstallCommandOptions options = getOptions(AdbOptions.EMULATOR_MODE_SHORT_ARG);
IDevice[] devices = new IDevice[] {
createEmulator("1", IDevice.DeviceState.ONLINE),
createRealDevice("2", IDevice.DeviceState.ONLINE),
};
List<IDevice> filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNotNull(filteredDevices);
assertEquals(1, filteredDevices.size());
assertSame(devices[0], filteredDevices.get(0));
}
/**
* Verify that when real-device-only mode is enabled only real devices appear in result.
*/
@Test
public void testDeviceFilterRealDevices() throws CmdLineException {
InstallCommandOptions options = getOptions(AdbOptions.DEVICE_MODE_LONG_ARG);
IDevice[] devices = new IDevice[] {
createRealDevice("1", IDevice.DeviceState.ONLINE),
createEmulator("2", IDevice.DeviceState.ONLINE)
};
List<IDevice> filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNotNull(filteredDevices);
assertEquals(1, filteredDevices.size());
assertSame(devices[0], filteredDevices.get(0));
}
/**
* Verify that filtering by serial number works.
*/
@Test
public void testDeviceFilterBySerial() throws CmdLineException {
IDevice[] devices = new IDevice[] {
createRealDevice("1", IDevice.DeviceState.ONLINE),
createEmulator("2", IDevice.DeviceState.ONLINE),
createRealDevice("3", IDevice.DeviceState.ONLINE),
createEmulator("4", IDevice.DeviceState.ONLINE)
};
for (int i = 0; i < devices.length; i++) {
InstallCommandOptions options = getOptions(
AdbOptions.SERIAL_NUMBER_SHORT_ARG,devices[i].getSerialNumber());
List<IDevice> filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNotNull(filteredDevices);
assertEquals(1, filteredDevices.size());
assertSame(devices[i], filteredDevices.get(0));
}
}
/**
* Verify that if no devices match filters null is returned.
*/
@Test
public void testDeviceFilterNoMatchingDevices() throws CmdLineException {
IDevice[] devices = new IDevice[] {
createRealDevice("1", IDevice.DeviceState.ONLINE),
createEmulator("2", IDevice.DeviceState.ONLINE),
createRealDevice("3", IDevice.DeviceState.ONLINE),
createEmulator("4", IDevice.DeviceState.ONLINE)
};
InstallCommandOptions options = getOptions(
AdbOptions.SERIAL_NUMBER_SHORT_ARG, "invalid-serial");
List<IDevice> filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNull(filteredDevices);
}
/**
* Verify that different combinations of arguments work correctly.
*/
@Test
public void testDeviceFilterCombos() throws CmdLineException {
TestDevice realDevice1 = createRealDevice("1", IDevice.DeviceState.ONLINE);
TestDevice realDevice2 = createRealDevice("2", IDevice.DeviceState.ONLINE);
TestDevice emulator1 = createEmulator("3", IDevice.DeviceState.ONLINE);
TestDevice emulator2 = createEmulator("4", IDevice.DeviceState.ONLINE);
IDevice[] devices = new IDevice[] {
realDevice1,
emulator1,
realDevice2,
emulator2
};
// Filter by serial in "real device" mode with serial number for real device.
InstallCommandOptions options = getOptions(
AdbOptions.SERIAL_NUMBER_SHORT_ARG, realDevice1.getSerialNumber(),
AdbOptions.DEVICE_MODE_LONG_ARG);
List<IDevice> filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNotNull(filteredDevices);
assertEquals(1, filteredDevices.size());
assertSame(realDevice1, filteredDevices.get(0));
// Filter by serial in "real device" mode with serial number for emulator.
options = getOptions(
AdbOptions.SERIAL_NUMBER_SHORT_ARG, emulator1.getSerialNumber(),
AdbOptions.DEVICE_MODE_LONG_ARG);
filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNull(filteredDevices);
// Filter by serial in "emulator" mode with serial number for real device.
options = getOptions(
AdbOptions.SERIAL_NUMBER_SHORT_ARG, realDevice1.getSerialNumber(),
AdbOptions.EMULATOR_MODE_SHORT_ARG);
filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNull(filteredDevices);
// Filter by serial in "real device" mode with serial number for emulator.
options = getOptions(
AdbOptions.SERIAL_NUMBER_SHORT_ARG, emulator1.getSerialNumber(),
AdbOptions.EMULATOR_MODE_SHORT_ARG);
filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNotNull(filteredDevices);
assertEquals(1, filteredDevices.size());
assertSame(emulator1, filteredDevices.get(0));
// Filter in both "real device" mode and "emulator mode".
options = getOptions(
AdbOptions.DEVICE_MODE_LONG_ARG,
AdbOptions.EMULATOR_MODE_SHORT_ARG,
AdbOptions.MULTI_INSTALL_MODE_SHORT_ARG);
filteredDevices = installCommand.filterDevices(devices, options.adbOptions());
assertNotNull(filteredDevices);
assertEquals(devices.length, filteredDevices.size());
for (IDevice device : devices) {
assertTrue(filteredDevices.contains(device));
}
}
/**
* Verify that successful installation on device results in true.
*/
@Test
public void testSuccessfulDeviceInstall() {
File apk = new File("/some/file.apk");
final AtomicReference<String> apkPath = new AtomicReference<String>();
TestDevice device = new TestDevice() {
@Override
public String installPackage(String s, boolean b, String... strings) throws InstallException {
apkPath.set(s);
return null;
}
};
device.setSerialNumber("serial#1");
device.setName("testDevice");
assertTrue(installCommand.installApkOnDevice(device, apk));
assertEquals(apk.getAbsolutePath(), apkPath.get());
}
/**
* Also make sure we're not erroneously parsing "Exception" and "Error".
*/
@Test
public void testDeviceStartActivitySuccess() {
TestDevice device = createDeviceForShellCommandTest(
"Starting: Intent { cmp=com.example.ExceptionErrorActivity }\r\n");
assertNull(installCommand.deviceStartActivity(device, "com.foo/.Activity"));
}
@Test
public void testDeviceStartActivityAmDoesntExist() {
TestDevice device = createDeviceForShellCommandTest("sh: am: not found\r\n");
assertNotNull(installCommand.deviceStartActivity(device, "com.foo/.Activity"));
}
@Test
public void testDeviceStartActivityActivityDoesntExist() {
String errorLine = "Error: Activity class {com.foo/.Activiqy} does not exist.\r\n";
TestDevice device = createDeviceForShellCommandTest(
"Starting: Intent { cmp=com.foo/.Activiqy }\r\n" +
"Error type 3\r\n" +
errorLine);
assertEquals(
errorLine.trim(),
installCommand.deviceStartActivity(device, "com.foo/.Activiy").trim());
}
@Test
public void testDeviceStartActivityException() {
String errorLine = "java.lang.SecurityException: Permission Denial: " +
"starting Intent { flg=0x10000000 cmp=com.foo/.Activity } from null " +
"(pid=27581, uid=2000) not exported from uid 10002\r\n";
TestDevice device = createDeviceForShellCommandTest(
"Starting: Intent { cmp=com.foo/.Activity }\r\n" +
errorLine +
" at android.os.Parcel.readException(Parcel.java:1425)\r\n" +
" at android.os.Parcel.readException(Parcel.java:1379)\r\n" +
// (...)
" at dalvik.system.NativeStart.main(Native Method)\r\n");
assertEquals(
errorLine.trim(),
installCommand.deviceStartActivity(device, "com.foo/.Activity").trim());
}
/**
* Verify that if failure reason is returned, installation is marked as failed.
*/
@Test
public void testFailedDeviceInstallWithReason() {
File apk = new File("/some/file.apk");
TestDevice device = new TestDevice() {
@Override
public String installPackage(String s, boolean b, String... strings) throws InstallException {
return "[SOME_REASON]";
}
};
device.setSerialNumber("serial#1");
device.setName("testDevice");
assertFalse(installCommand.installApkOnDevice(device, apk));
}
/**
* Verify that if exception is thrown during installation, installation is marked as failed.
*/
@Test
public void testFailedDeviceInstallWithException() {
File apk = new File("/some/file.apk");
TestDevice device = new TestDevice() {
@Override
public String installPackage(String s, boolean b, String... strings) throws InstallException {
throw new InstallException("Failed to install on test device.", null);
}
};
device.setSerialNumber("serial#1");
device.setName("testDevice");
assertFalse(installCommand.installApkOnDevice(device, apk));
}
}
|
apache-2.0
|
vespa-engine/vespa
|
searchlib/src/vespa/searchlib/queryeval/isourceselector.cpp
|
483
|
// Copyright Yahoo. Licensed under the terms of the Apache 2.0 license. See LICENSE in the project root.
#include "isourceselector.h"
namespace search::queryeval {
ISourceSelector::ISourceSelector(Source defaultSource) :
_baseId(0),
_defaultSource(defaultSource)
{
assert(defaultSource < SOURCE_LIMIT);
}
void
ISourceSelector::setDefaultSource(Source source)
{
assert(source < SOURCE_LIMIT);
assert(source >= _defaultSource);
_defaultSource = source;
}
}
|
apache-2.0
|
patrickspencer/compass-webapp
|
spec/factories/course_users.rb
|
334
|
# == Schema Information
#
# Table name: course_users
#
# id :integer not null, primary key
# course_id :integer
# user_id :integer
# created_at :datetime
# updated_at :datetime
#
# Read about factories at https://github.com/thoughtbot/factory_girl
FactoryGirl.define do
factory :course_user do
end
end
|
apache-2.0
|
FinishX/coolweather
|
gradle/gradle-2.8/docs/javadoc/org/gradle/tooling/provider/model/package-summary.html
|
6246
|
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<title>org.gradle.tooling.provider.model (Gradle API 2.8)</title>
<meta name="date" content="2015-10-20">
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</head>
<body>
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if (location.href.indexOf('is-external=true') == -1) {
parent.document.title="org.gradle.tooling.provider.model (Gradle API 2.8)";
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<div class="block">Interfaces and classes that allow tooling models to be made available to the tooling API client.</div>
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<div class="block">Responsible for building tooling models.</div>
</td>
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apache-2.0
|
xDevsPro/xStudio
|
Solution/UIs/xStudio.Web/Areas/HelpPage/Controllers/HelpController.cs
|
1892
|
using System;
using System.Web.Http;
using System.Web.Mvc;
using xStudio.Web.Areas.HelpPage.ModelDescriptions;
using xStudio.Web.Areas.HelpPage.Models;
namespace xStudio.Web.Areas.HelpPage.Controllers
{
/// <summary>
/// The controller that will handle requests for the help page.
/// </summary>
public class HelpController : Controller
{
private const string ErrorViewName = "Error";
public HelpController()
: this(GlobalConfiguration.Configuration)
{
}
public HelpController(HttpConfiguration config)
{
Configuration = config;
}
public HttpConfiguration Configuration { get; private set; }
public ActionResult Index()
{
ViewBag.DocumentationProvider = Configuration.Services.GetDocumentationProvider();
return View(Configuration.Services.GetApiExplorer().ApiDescriptions);
}
public ActionResult Api(string apiId)
{
if (!String.IsNullOrEmpty(apiId))
{
HelpPageApiModel apiModel = Configuration.GetHelpPageApiModel(apiId);
if (apiModel != null)
{
return View(apiModel);
}
}
return View(ErrorViewName);
}
public ActionResult ResourceModel(string modelName)
{
if (!String.IsNullOrEmpty(modelName))
{
ModelDescriptionGenerator modelDescriptionGenerator = Configuration.GetModelDescriptionGenerator();
ModelDescription modelDescription;
if (modelDescriptionGenerator.GeneratedModels.TryGetValue(modelName, out modelDescription))
{
return View(modelDescription);
}
}
return View(ErrorViewName);
}
}
}
|
apache-2.0
|
aws/aws-sdk-java
|
aws-java-sdk-iotdeviceadvisor/src/main/java/com/amazonaws/services/iotdeviceadvisor/AWSIoTDeviceAdvisorAsyncClient.java
|
22034
|
/*
* Copyright 2017-2022 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License"). You may not use this file except in compliance with
* the License. A copy of the License is located at
*
* http://aws.amazon.com/apache2.0
*
* or in the "license" file accompanying this file. This file is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions
* and limitations under the License.
*/
package com.amazonaws.services.iotdeviceadvisor;
import javax.annotation.Generated;
import com.amazonaws.services.iotdeviceadvisor.model.*;
import com.amazonaws.client.AwsAsyncClientParams;
import com.amazonaws.annotation.ThreadSafe;
import java.util.concurrent.ExecutorService;
/**
* Client for accessing AWSIoTDeviceAdvisor asynchronously. Each asynchronous method will return a Java Future object
* representing the asynchronous operation; overloads which accept an {@code AsyncHandler} can be used to receive
* notification when an asynchronous operation completes.
* <p>
* <p>
* Amazon Web Services IoT Core Device Advisor is a cloud-based, fully managed test capability for validating IoT
* devices during device software development. Device Advisor provides pre-built tests that you can use to validate IoT
* devices for reliable and secure connectivity with Amazon Web Services IoT Core before deploying devices to
* production. By using Device Advisor, you can confirm that your devices can connect to Amazon Web Services IoT Core,
* follow security best practices and, if applicable, receive software updates from IoT Device Management. You can also
* download signed qualification reports to submit to the Amazon Web Services Partner Network to get your device
* qualified for the Amazon Web Services Partner Device Catalog without the need to send your device in and wait for it
* to be tested.
* </p>
*/
@ThreadSafe
@Generated("com.amazonaws:aws-java-sdk-code-generator")
public class AWSIoTDeviceAdvisorAsyncClient extends AWSIoTDeviceAdvisorClient implements AWSIoTDeviceAdvisorAsync {
private static final int DEFAULT_THREAD_POOL_SIZE = 50;
private final java.util.concurrent.ExecutorService executorService;
public static AWSIoTDeviceAdvisorAsyncClientBuilder asyncBuilder() {
return AWSIoTDeviceAdvisorAsyncClientBuilder.standard();
}
/**
* Constructs a new asynchronous client to invoke service methods on AWSIoTDeviceAdvisor using the specified
* parameters.
*
* @param asyncClientParams
* Object providing client parameters.
*/
AWSIoTDeviceAdvisorAsyncClient(AwsAsyncClientParams asyncClientParams) {
this(asyncClientParams, false);
}
/**
* Constructs a new asynchronous client to invoke service methods on AWSIoTDeviceAdvisor using the specified
* parameters.
*
* @param asyncClientParams
* Object providing client parameters.
* @param endpointDiscoveryEnabled
* true will enable endpoint discovery if the service supports it.
*/
AWSIoTDeviceAdvisorAsyncClient(AwsAsyncClientParams asyncClientParams, boolean endpointDiscoveryEnabled) {
super(asyncClientParams, endpointDiscoveryEnabled);
this.executorService = asyncClientParams.getExecutor();
}
/**
* Returns the executor service used by this client to execute async requests.
*
* @return The executor service used by this client to execute async requests.
*/
public ExecutorService getExecutorService() {
return executorService;
}
@Override
public java.util.concurrent.Future<CreateSuiteDefinitionResult> createSuiteDefinitionAsync(CreateSuiteDefinitionRequest request) {
return createSuiteDefinitionAsync(request, null);
}
@Override
public java.util.concurrent.Future<CreateSuiteDefinitionResult> createSuiteDefinitionAsync(final CreateSuiteDefinitionRequest request,
final com.amazonaws.handlers.AsyncHandler<CreateSuiteDefinitionRequest, CreateSuiteDefinitionResult> asyncHandler) {
final CreateSuiteDefinitionRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<CreateSuiteDefinitionResult>() {
@Override
public CreateSuiteDefinitionResult call() throws Exception {
CreateSuiteDefinitionResult result = null;
try {
result = executeCreateSuiteDefinition(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<DeleteSuiteDefinitionResult> deleteSuiteDefinitionAsync(DeleteSuiteDefinitionRequest request) {
return deleteSuiteDefinitionAsync(request, null);
}
@Override
public java.util.concurrent.Future<DeleteSuiteDefinitionResult> deleteSuiteDefinitionAsync(final DeleteSuiteDefinitionRequest request,
final com.amazonaws.handlers.AsyncHandler<DeleteSuiteDefinitionRequest, DeleteSuiteDefinitionResult> asyncHandler) {
final DeleteSuiteDefinitionRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<DeleteSuiteDefinitionResult>() {
@Override
public DeleteSuiteDefinitionResult call() throws Exception {
DeleteSuiteDefinitionResult result = null;
try {
result = executeDeleteSuiteDefinition(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<GetEndpointResult> getEndpointAsync(GetEndpointRequest request) {
return getEndpointAsync(request, null);
}
@Override
public java.util.concurrent.Future<GetEndpointResult> getEndpointAsync(final GetEndpointRequest request,
final com.amazonaws.handlers.AsyncHandler<GetEndpointRequest, GetEndpointResult> asyncHandler) {
final GetEndpointRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<GetEndpointResult>() {
@Override
public GetEndpointResult call() throws Exception {
GetEndpointResult result = null;
try {
result = executeGetEndpoint(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<GetSuiteDefinitionResult> getSuiteDefinitionAsync(GetSuiteDefinitionRequest request) {
return getSuiteDefinitionAsync(request, null);
}
@Override
public java.util.concurrent.Future<GetSuiteDefinitionResult> getSuiteDefinitionAsync(final GetSuiteDefinitionRequest request,
final com.amazonaws.handlers.AsyncHandler<GetSuiteDefinitionRequest, GetSuiteDefinitionResult> asyncHandler) {
final GetSuiteDefinitionRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<GetSuiteDefinitionResult>() {
@Override
public GetSuiteDefinitionResult call() throws Exception {
GetSuiteDefinitionResult result = null;
try {
result = executeGetSuiteDefinition(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<GetSuiteRunResult> getSuiteRunAsync(GetSuiteRunRequest request) {
return getSuiteRunAsync(request, null);
}
@Override
public java.util.concurrent.Future<GetSuiteRunResult> getSuiteRunAsync(final GetSuiteRunRequest request,
final com.amazonaws.handlers.AsyncHandler<GetSuiteRunRequest, GetSuiteRunResult> asyncHandler) {
final GetSuiteRunRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<GetSuiteRunResult>() {
@Override
public GetSuiteRunResult call() throws Exception {
GetSuiteRunResult result = null;
try {
result = executeGetSuiteRun(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<GetSuiteRunReportResult> getSuiteRunReportAsync(GetSuiteRunReportRequest request) {
return getSuiteRunReportAsync(request, null);
}
@Override
public java.util.concurrent.Future<GetSuiteRunReportResult> getSuiteRunReportAsync(final GetSuiteRunReportRequest request,
final com.amazonaws.handlers.AsyncHandler<GetSuiteRunReportRequest, GetSuiteRunReportResult> asyncHandler) {
final GetSuiteRunReportRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<GetSuiteRunReportResult>() {
@Override
public GetSuiteRunReportResult call() throws Exception {
GetSuiteRunReportResult result = null;
try {
result = executeGetSuiteRunReport(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<ListSuiteDefinitionsResult> listSuiteDefinitionsAsync(ListSuiteDefinitionsRequest request) {
return listSuiteDefinitionsAsync(request, null);
}
@Override
public java.util.concurrent.Future<ListSuiteDefinitionsResult> listSuiteDefinitionsAsync(final ListSuiteDefinitionsRequest request,
final com.amazonaws.handlers.AsyncHandler<ListSuiteDefinitionsRequest, ListSuiteDefinitionsResult> asyncHandler) {
final ListSuiteDefinitionsRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<ListSuiteDefinitionsResult>() {
@Override
public ListSuiteDefinitionsResult call() throws Exception {
ListSuiteDefinitionsResult result = null;
try {
result = executeListSuiteDefinitions(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<ListSuiteRunsResult> listSuiteRunsAsync(ListSuiteRunsRequest request) {
return listSuiteRunsAsync(request, null);
}
@Override
public java.util.concurrent.Future<ListSuiteRunsResult> listSuiteRunsAsync(final ListSuiteRunsRequest request,
final com.amazonaws.handlers.AsyncHandler<ListSuiteRunsRequest, ListSuiteRunsResult> asyncHandler) {
final ListSuiteRunsRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<ListSuiteRunsResult>() {
@Override
public ListSuiteRunsResult call() throws Exception {
ListSuiteRunsResult result = null;
try {
result = executeListSuiteRuns(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<ListTagsForResourceResult> listTagsForResourceAsync(ListTagsForResourceRequest request) {
return listTagsForResourceAsync(request, null);
}
@Override
public java.util.concurrent.Future<ListTagsForResourceResult> listTagsForResourceAsync(final ListTagsForResourceRequest request,
final com.amazonaws.handlers.AsyncHandler<ListTagsForResourceRequest, ListTagsForResourceResult> asyncHandler) {
final ListTagsForResourceRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<ListTagsForResourceResult>() {
@Override
public ListTagsForResourceResult call() throws Exception {
ListTagsForResourceResult result = null;
try {
result = executeListTagsForResource(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<StartSuiteRunResult> startSuiteRunAsync(StartSuiteRunRequest request) {
return startSuiteRunAsync(request, null);
}
@Override
public java.util.concurrent.Future<StartSuiteRunResult> startSuiteRunAsync(final StartSuiteRunRequest request,
final com.amazonaws.handlers.AsyncHandler<StartSuiteRunRequest, StartSuiteRunResult> asyncHandler) {
final StartSuiteRunRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<StartSuiteRunResult>() {
@Override
public StartSuiteRunResult call() throws Exception {
StartSuiteRunResult result = null;
try {
result = executeStartSuiteRun(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<StopSuiteRunResult> stopSuiteRunAsync(StopSuiteRunRequest request) {
return stopSuiteRunAsync(request, null);
}
@Override
public java.util.concurrent.Future<StopSuiteRunResult> stopSuiteRunAsync(final StopSuiteRunRequest request,
final com.amazonaws.handlers.AsyncHandler<StopSuiteRunRequest, StopSuiteRunResult> asyncHandler) {
final StopSuiteRunRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<StopSuiteRunResult>() {
@Override
public StopSuiteRunResult call() throws Exception {
StopSuiteRunResult result = null;
try {
result = executeStopSuiteRun(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<TagResourceResult> tagResourceAsync(TagResourceRequest request) {
return tagResourceAsync(request, null);
}
@Override
public java.util.concurrent.Future<TagResourceResult> tagResourceAsync(final TagResourceRequest request,
final com.amazonaws.handlers.AsyncHandler<TagResourceRequest, TagResourceResult> asyncHandler) {
final TagResourceRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<TagResourceResult>() {
@Override
public TagResourceResult call() throws Exception {
TagResourceResult result = null;
try {
result = executeTagResource(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<UntagResourceResult> untagResourceAsync(UntagResourceRequest request) {
return untagResourceAsync(request, null);
}
@Override
public java.util.concurrent.Future<UntagResourceResult> untagResourceAsync(final UntagResourceRequest request,
final com.amazonaws.handlers.AsyncHandler<UntagResourceRequest, UntagResourceResult> asyncHandler) {
final UntagResourceRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<UntagResourceResult>() {
@Override
public UntagResourceResult call() throws Exception {
UntagResourceResult result = null;
try {
result = executeUntagResource(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
@Override
public java.util.concurrent.Future<UpdateSuiteDefinitionResult> updateSuiteDefinitionAsync(UpdateSuiteDefinitionRequest request) {
return updateSuiteDefinitionAsync(request, null);
}
@Override
public java.util.concurrent.Future<UpdateSuiteDefinitionResult> updateSuiteDefinitionAsync(final UpdateSuiteDefinitionRequest request,
final com.amazonaws.handlers.AsyncHandler<UpdateSuiteDefinitionRequest, UpdateSuiteDefinitionResult> asyncHandler) {
final UpdateSuiteDefinitionRequest finalRequest = beforeClientExecution(request);
return executorService.submit(new java.util.concurrent.Callable<UpdateSuiteDefinitionResult>() {
@Override
public UpdateSuiteDefinitionResult call() throws Exception {
UpdateSuiteDefinitionResult result = null;
try {
result = executeUpdateSuiteDefinition(finalRequest);
} catch (Exception ex) {
if (asyncHandler != null) {
asyncHandler.onError(ex);
}
throw ex;
}
if (asyncHandler != null) {
asyncHandler.onSuccess(finalRequest, result);
}
return result;
}
});
}
/**
* Shuts down the client, releasing all managed resources. This includes forcibly terminating all pending
* asynchronous service calls. Clients who wish to give pending asynchronous service calls time to complete should
* call {@code getExecutorService().shutdown()} followed by {@code getExecutorService().awaitTermination()} prior to
* calling this method.
*/
@Override
public void shutdown() {
super.shutdown();
executorService.shutdownNow();
}
}
|
apache-2.0
|
lifangyu/spring-demo
|
spring-generator/auth-manage/src/main/webapp/static/demo/messager/index.html
|
734
|
<!doctype html>
<html lang="en">
<head>
<meta charset="utf-8">
<title>jQuery UI Demos</title>
</head>
<body>
<table width="100%" border="0">
<tr>
<td width=140px align=left valign=top style="BORDER-RIGHT: #999999 1px dashed"><ol>
<li><a href="basic.html" target="testIframeN">basic</a></li>
<li><a href="alert.html" target="testIframeN">alert</a></li>
<li><a href="interactive.html" target="testIframeN">interactive</a></li>
<li><a href="position.html" target="testIframeN">position</a></li>
</ol>
</td>
<td align=left valign=top><IFRAME ID="testIframeN" Name="testIframeN" FRAMEBORDER=0 SCROLLING=AUTO width=100% height=550px SRC="basic.html"></IFRAME></td>
</tr>
</table>
</body>
</html>
|
apache-2.0
|
google/intellij-protocol-buffer-editor
|
core/src/main/java/com/google/devtools/intellij/protoeditor/ide/documentation/PbDocumentationProvider.java
|
2354
|
/*
* Copyright 2019 Google LLC
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package com.google.devtools.intellij.protoeditor.ide.documentation;
import com.google.devtools.intellij.protoeditor.lang.psi.PbCommentOwner;
import com.google.devtools.intellij.protoeditor.lang.psi.util.PbCommentUtil;
import com.intellij.lang.documentation.AbstractDocumentationProvider;
import com.intellij.openapi.util.text.StringUtil;
import com.intellij.psi.PsiComment;
import com.intellij.psi.PsiElement;
import com.intellij.psi.PsiManager;
import java.util.List;
import org.jetbrains.annotations.Nullable;
/** A {@link com.intellij.lang.documentation.DocumentationProvider} for proto elements. */
public class PbDocumentationProvider extends AbstractDocumentationProvider {
@Nullable
@Override
public String getQuickNavigateInfo(PsiElement element, PsiElement originalElement) {
return null;
}
@Nullable
@Override
public List<String> getUrlFor(PsiElement element, PsiElement originalElement) {
return null;
}
@Nullable
@Override
public String generateDoc(PsiElement element, @Nullable PsiElement originalElement) {
if (!(element instanceof PbCommentOwner)) {
return null;
}
PbCommentOwner owner = (PbCommentOwner) element;
List<PsiComment> comments = owner.getComments();
if (comments.isEmpty()) {
return null;
}
StringBuilder commentBuilder = new StringBuilder("<pre>");
for (String line : PbCommentUtil.extractText(comments)) {
commentBuilder.append(StringUtil.escapeXml(line));
commentBuilder.append("\n");
}
commentBuilder.append("</pre>");
return commentBuilder.toString();
}
@Nullable
@Override
public PsiElement getDocumentationElementForLink(
PsiManager psiManager, String link, PsiElement context) {
return null;
}
}
|
apache-2.0
|
stapetro/mnk_designpatterns
|
dpsamples/src/main/java/com/mnknowledge/dp/behavioral/observer/newsfeed/User.java
|
714
|
package com.mnknowledge.dp.behavioral.observer.newsfeed;
public class User implements Observer {
private String name;
private String article;
private Subject newsFeed;
public User(String name) {
super();
this.name = name;
}
public void subscribe(Subject newsFeed) {
newsFeed.registerObserver(this);
this.newsFeed = newsFeed;
article = "No New Article!";
}
@Override
public void update() {
System.out.println("State change reported by Subject.");
article = (String) newsFeed.getUpdate();
}
public String getArticle() {
return article;
}
public String getName() {
return name;
}
}
|
apache-2.0
|
shaovie/reactor
|
src/ev_handler.h
|
1924
|
// -*- C++ -*-
//========================================================================
/**
* Author : cuisw
* Date : 2012-04-28 01:24
*/
//========================================================================
#ifndef EV_HANDLER_H_
#define EV_HANDLER_H_
#include <cstddef>
// Forward declarations
class reactor;
class time_value;
typedef int reactor_mask;
/**
* @class ev_handler
*
* @brief
*/
class ev_handler
{
public:
enum
{
null_mask = 0,
read_mask = 1L << 1,
write_mask = 1L << 2,
except_mask = 1L << 3,
accept_mask = 1L << 4,
connect_mask = 1L << 5,
timer_mask = 1L << 6,
error_mask = 1L << 7,
dont_call = 1L << 31,
all_events_mask = read_mask | \
write_mask |
except_mask |
accept_mask |
connect_mask |
timer_mask ,
};
public:
virtual ~ev_handler() {}
// the handle_close(int, reactor_mask) will be called if below handle_* return -1.
virtual int handle_input(const int /*handle*/) { return -1; }
virtual int handle_output(const int /*handle*/) { return -1; }
virtual int handle_exception(const int /*handle*/) { return -1; }
virtual int handle_timeout(const time_value &/*now*/) { return -1; }
virtual int handle_close(const int /*handle*/, reactor_mask /*mask*/)
{ return -1; }
virtual int get_handle() const { return -1; }
virtual void set_handle(const int /*handle*/) { }
int timer_id() const { return this->timer_id_; }
void timer_id(const int id) { this->timer_id_ = id; }
void set_reactor(reactor *r) { this->reactor_ = r; }
reactor *get_reactor(void) const { return this->reactor_; }
protected:
ev_handler()
: timer_id_(-1),
reactor_(NULL)
{ }
int timer_id_;
reactor *reactor_;
};
#endif // EV_HANDLER_H_
|
apache-2.0
|
googleads/google-ads-java
|
google-ads-migration-examples/src/main/java/com/google/ads/googleads/migration/campaignmanagement/CreateCompleteCampaignGoogleAdsApiOnly.java
|
27574
|
// Copyright 2019 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
package com.google.ads.googleads.migration.campaignmanagement;
import com.beust.jcommander.Parameter;
import com.google.ads.googleads.lib.GoogleAdsClient;
import com.google.ads.googleads.migration.utils.ArgumentNames;
import com.google.ads.googleads.migration.utils.CodeSampleParams;
import com.google.ads.googleads.v10.common.ExpandedTextAdInfo;
import com.google.ads.googleads.v10.common.KeywordInfo;
import com.google.ads.googleads.v10.common.ManualCpc;
import com.google.ads.googleads.v10.enums.AdGroupAdStatusEnum.AdGroupAdStatus;
import com.google.ads.googleads.v10.enums.AdGroupCriterionStatusEnum.AdGroupCriterionStatus;
import com.google.ads.googleads.v10.enums.AdGroupStatusEnum.AdGroupStatus;
import com.google.ads.googleads.v10.enums.AdGroupTypeEnum.AdGroupType;
import com.google.ads.googleads.v10.enums.AdvertisingChannelTypeEnum.AdvertisingChannelType;
import com.google.ads.googleads.v10.enums.BudgetDeliveryMethodEnum.BudgetDeliveryMethod;
import com.google.ads.googleads.v10.enums.CampaignStatusEnum.CampaignStatus;
import com.google.ads.googleads.v10.enums.KeywordMatchTypeEnum.KeywordMatchType;
import com.google.ads.googleads.v10.errors.GoogleAdsError;
import com.google.ads.googleads.v10.errors.GoogleAdsException;
import com.google.ads.googleads.v10.resources.Ad;
import com.google.ads.googleads.v10.resources.AdGroup;
import com.google.ads.googleads.v10.resources.AdGroupAd;
import com.google.ads.googleads.v10.resources.AdGroupCriterion;
import com.google.ads.googleads.v10.resources.Campaign;
import com.google.ads.googleads.v10.resources.Campaign.NetworkSettings;
import com.google.ads.googleads.v10.resources.CampaignBudget;
import com.google.ads.googleads.v10.services.AdGroupAdOperation;
import com.google.ads.googleads.v10.services.AdGroupAdServiceClient;
import com.google.ads.googleads.v10.services.AdGroupCriterionOperation;
import com.google.ads.googleads.v10.services.AdGroupCriterionServiceClient;
import com.google.ads.googleads.v10.services.AdGroupOperation;
import com.google.ads.googleads.v10.services.AdGroupServiceClient;
import com.google.ads.googleads.v10.services.CampaignBudgetOperation;
import com.google.ads.googleads.v10.services.CampaignBudgetServiceClient;
import com.google.ads.googleads.v10.services.CampaignOperation;
import com.google.ads.googleads.v10.services.CampaignServiceClient;
import com.google.ads.googleads.v10.services.GoogleAdsRow;
import com.google.ads.googleads.v10.services.GoogleAdsServiceClient;
import com.google.ads.googleads.v10.services.GoogleAdsServiceClient.SearchPagedResponse;
import com.google.ads.googleads.v10.services.MutateAdGroupAdResult;
import com.google.ads.googleads.v10.services.MutateAdGroupAdsResponse;
import com.google.ads.googleads.v10.services.MutateAdGroupCriteriaResponse;
import com.google.ads.googleads.v10.services.MutateAdGroupCriterionResult;
import com.google.ads.googleads.v10.services.MutateAdGroupsResponse;
import com.google.ads.googleads.v10.services.MutateCampaignBudgetsResponse;
import com.google.ads.googleads.v10.services.MutateCampaignsResponse;
import com.google.ads.googleads.v10.services.SearchGoogleAdsRequest;
import com.google.ads.googleads.v10.utils.ResourceNames;
import com.google.common.collect.ImmutableList;
import java.io.FileNotFoundException;
import java.io.IOException;
import java.util.ArrayList;
import java.util.Arrays;
import java.util.List;
import java.util.stream.Collectors;
import org.joda.time.DateTime;
/**
* This code example is the last in a series of code examples that shows how to create a Search
* campaign using the AdWords API, and then migrate it to the Google Ads API one functionality at a
* time. See Step0 through Step5 for code examples in various stages of migration.
*
* <p>This code example represents the final state, where all the functionality - create a campaign
* budget, a search campaign, an ad group, keywords, and expanded text ads have all been migrated to
* using the Google Ads API. The AdWords API is not used.
*/
public class CreateCompleteCampaignGoogleAdsApiOnly {
private static final int PAGE_SIZE = 1_000;
private static final int NUMBER_OF_ADS = 5;
private static final List<String> KEYWORDS_TO_ADD = Arrays.asList("mars cruise", "space hotel");
private static class CreateCompleteCampaignGoogleAdsApiOnlyParams extends CodeSampleParams {
@Parameter(names = ArgumentNames.CUSTOMER_ID, required = true)
private Long customerId;
}
public static void main(String[] args) {
CreateCompleteCampaignGoogleAdsApiOnlyParams params =
new CreateCompleteCampaignGoogleAdsApiOnlyParams();
if (!params.parseArguments(args)) {
// Either pass the required parameters for this example on the command line, or insert them
// into the code here. See the parameter class definition above for descriptions.
params.customerId = Long.parseLong("INSERT_CUSTOMER_ID_HERE");
}
// Initializes the Google Ads client.
GoogleAdsClient googleAdsClient;
try {
googleAdsClient = GoogleAdsClient.newBuilder().fromPropertiesFile().build();
} catch (FileNotFoundException fnfe) {
System.err.printf(
"Failed to load GoogleAdsClient configuration from file. Exception: %s%n", fnfe);
return;
} catch (IOException ioe) {
System.err.printf("Failed to create GoogleAdsClient. Exception: %s%n", ioe);
return;
}
try {
new CreateCompleteCampaignGoogleAdsApiOnly().runExample(googleAdsClient, params.customerId);
} catch (GoogleAdsException gae) {
// GoogleAdsException is the base class for most exceptions thrown by an API request.
// Instances of this exception have a message and a GoogleAdsFailure that contains a
// collection of GoogleAdsErrors that indicate the underlying causes of the
// GoogleAdsException.
System.err.printf(
"Request ID %s failed due to GoogleAdsException. Underlying errors:%n",
gae.getRequestId());
int i = 0;
for (GoogleAdsError googleAdsError : gae.getGoogleAdsFailure().getErrorsList()) {
System.err.printf(" Error %d: %s%n", i++, googleAdsError);
}
}
}
/**
* Runs the example.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private void runExample(GoogleAdsClient googleAdsClient, long customerId) {
CampaignBudget budget = createBudget(googleAdsClient, customerId);
Campaign campaign = createCampaign(googleAdsClient, customerId, budget);
AdGroup adGroup = createAdGroup(googleAdsClient, customerId, campaign);
createTextAds(googleAdsClient, customerId, adGroup, NUMBER_OF_ADS);
createKeywords(googleAdsClient, customerId, adGroup, KEYWORDS_TO_ADD);
}
/**
* Creates a budget.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private CampaignBudget createBudget(GoogleAdsClient googleAdsClient, long customerId) {
// Creates the budget.
CampaignBudget budget =
CampaignBudget.newBuilder()
.setName("Interplanetary Cruise Budget #" + System.currentTimeMillis())
.setDeliveryMethod(BudgetDeliveryMethod.STANDARD)
.setAmountMicros(10_000_000)
.build();
// Creates the operation.
CampaignBudgetOperation op = CampaignBudgetOperation.newBuilder().setCreate(budget).build();
// Gets the CampaignBudget service.
try (CampaignBudgetServiceClient campaignBudgetServiceClient =
googleAdsClient.getLatestVersion().createCampaignBudgetServiceClient()) {
// Adds the budget.
MutateCampaignBudgetsResponse response =
campaignBudgetServiceClient.mutateCampaignBudgets(
Long.toString(customerId), ImmutableList.of(op));
String budgetResourceName = response.getResults(0).getResourceName();
// Retrieves the budget.
CampaignBudget newBudget = getBudget(googleAdsClient, customerId, budgetResourceName);
// Displays the results.
System.out.printf(
"Budget with ID %s and name '%s' was created.%n", newBudget.getId(), newBudget.getName());
return newBudget;
}
}
/**
* Retrieves the campaign budget.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param budgetResourceName resource name of the new campaign budget.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private CampaignBudget getBudget(
GoogleAdsClient googleAdsClient, long customerId, String budgetResourceName) {
// Gets the GoogleAdsService.
try (GoogleAdsServiceClient googleAdsServiceClient =
googleAdsClient.getLatestVersion().createGoogleAdsServiceClient()) {
// Creates the request.
SearchGoogleAdsRequest request =
SearchGoogleAdsRequest.newBuilder()
.setCustomerId(Long.toString(customerId))
.setPageSize(PAGE_SIZE)
.setQuery(
String.format(
"SELECT campaign_budget.id, campaign_budget.name, "
+ "campaign_budget.resource_name FROM campaign_budget "
+ "WHERE campaign_budget.resource_name = '%s'",
budgetResourceName))
.build();
// Retrieves the budget.
SearchPagedResponse searchPagedResponse = googleAdsServiceClient.search(request);
return searchPagedResponse.getPage().getResponse().getResults(0).getCampaignBudget();
}
}
/**
* Creates a campaign.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param budget the budget for the campaign.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private Campaign createCampaign(
GoogleAdsClient googleAdsClient, long customerId, CampaignBudget budget) {
String budgetResourceName = ResourceNames.campaignBudget(customerId, budget.getId());
// Configures the campaign network options
NetworkSettings networkSettings =
NetworkSettings.newBuilder()
.setTargetGoogleSearch(true)
.setTargetSearchNetwork(true)
.setTargetContentNetwork(false)
.setTargetPartnerSearchNetwork(false)
.build();
// Creates the campaign.
Campaign campaign =
Campaign.newBuilder()
.setName("Interplanetary Cruise #" + System.currentTimeMillis())
.setAdvertisingChannelType(AdvertisingChannelType.SEARCH)
// Recommendation: Set the campaign to PAUSED when creating it to prevent
// the ads from immediately serving. Set to ENABLED once you've added
// targeting and the ads are ready to serve
.setStatus(CampaignStatus.PAUSED)
// Sets the bidding strategy and budget.
.setManualCpc(ManualCpc.newBuilder().build())
.setCampaignBudget(budgetResourceName)
// Adds the networkSettings configured above.
.setNetworkSettings(networkSettings)
// Optional: sets the start & end dates.
.setStartDate(new DateTime().plusDays(1).toString("yyyyMMdd"))
.setEndDate(new DateTime().plusDays(30).toString("yyyyMMdd"))
.build();
// Creates the operation.
CampaignOperation op = CampaignOperation.newBuilder().setCreate(campaign).build();
// Gets the Campaign service.
try (CampaignServiceClient campaignServiceClient =
googleAdsClient.getLatestVersion().createCampaignServiceClient()) {
// Adds the campaign.
MutateCampaignsResponse response =
campaignServiceClient.mutateCampaigns(Long.toString(customerId), ImmutableList.of(op));
String campaignResourceName = response.getResults(0).getResourceName();
// Retrieves the campaign.
Campaign newCampaign = getCampaign(googleAdsClient, customerId, campaignResourceName);
// Displays the results.
System.out.printf(
"Campaign with ID %s and name '%s' was created.%n",
newCampaign.getId(), newCampaign.getName());
return newCampaign;
}
}
/**
* Retrieves the campaign.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param campaignResourceName resource name of the new campaign.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private Campaign getCampaign(
GoogleAdsClient googleAdsClient, long customerId, String campaignResourceName) {
// Gets the GoogleAdsService.
try (GoogleAdsServiceClient googleAdsServiceClient =
googleAdsClient.getLatestVersion().createGoogleAdsServiceClient()) {
// Creates the request.
SearchGoogleAdsRequest request =
SearchGoogleAdsRequest.newBuilder()
.setCustomerId(Long.toString(customerId))
.setPageSize(PAGE_SIZE)
.setQuery(
String.format(
"SELECT campaign.id, campaign.name, campaign.resource_name "
+ "FROM campaign "
+ "WHERE campaign.resource_name = '%s'",
campaignResourceName))
.build();
// Retrieves the campaign.
SearchPagedResponse searchPagedResponse = googleAdsServiceClient.search(request);
return searchPagedResponse.getPage().getResponse().getResults(0).getCampaign();
}
}
/**
* Creates an ad group.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param campaign the campaign for the ad group.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private AdGroup createAdGroup(
GoogleAdsClient googleAdsClient, long customerId, Campaign campaign) {
String campaignResourceName = ResourceNames.campaign(customerId, campaign.getId());
// Creates the ad group, setting an optional CPC value.
AdGroup adGroup =
AdGroup.newBuilder()
.setName("Earth to Mars Cruises #" + System.currentTimeMillis())
.setStatus(AdGroupStatus.ENABLED)
.setCampaign(campaignResourceName)
.setType(AdGroupType.SEARCH_STANDARD)
.setCpcBidMicros(500_000L)
.build();
// Creates the operation.
AdGroupOperation op = AdGroupOperation.newBuilder().setCreate(adGroup).build();
// Gets the AdGroup Service.
try (AdGroupServiceClient adGroupServiceClient =
googleAdsClient.getLatestVersion().createAdGroupServiceClient()) {
// Adds the AdGroup.
MutateAdGroupsResponse response =
adGroupServiceClient.mutateAdGroups(Long.toString(customerId), ImmutableList.of(op));
String adGroupResourceName = response.getResults(0).getResourceName();
// Retrieves the AdGroup.
AdGroup newAdGroup = getAdGroup(googleAdsClient, customerId, adGroupResourceName);
// Displays the results.
System.out.printf(
"Ad group with ID %s and name '%s' was created.%n",
newAdGroup.getId(), newAdGroup.getName());
return newAdGroup;
}
}
/**
* Retrieves the ad group.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param adGroupResourceName resource name of the new ad group.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private AdGroup getAdGroup(
GoogleAdsClient googleAdsClient, long customerId, String adGroupResourceName) {
// Gets the GoogleAdsService.
try (GoogleAdsServiceClient googleAdsServiceClient =
googleAdsClient.getLatestVersion().createGoogleAdsServiceClient()) {
// Creates the request.
SearchGoogleAdsRequest request =
SearchGoogleAdsRequest.newBuilder()
.setCustomerId(Long.toString(customerId))
.setPageSize(PAGE_SIZE)
.setQuery(
String.format(
"SELECT ad_group.id, ad_group.name, ad_group.resource_name "
+ "FROM ad_group WHERE ad_group.resource_name = '%s'",
adGroupResourceName))
.build();
// Retrieves the AdGroup.
SearchPagedResponse response = googleAdsServiceClient.search(request);
return response.getPage().getResponse().getResults(0).getAdGroup();
}
}
/**
* Creates text ads.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param adGroup the ad group for the text ad.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private List<AdGroupAd> createTextAds(
GoogleAdsClient googleAdsClient, long customerId, AdGroup adGroup, int numberOfAds) {
String adGroupResourceName = ResourceNames.adGroup(customerId, adGroup.getId());
List<AdGroupAdOperation> operations = new ArrayList<>();
for (int i = 0; i < numberOfAds; i++) {
// Creates the text ad
AdGroupAd adgroupAd =
AdGroupAd.newBuilder()
.setAdGroup(adGroupResourceName)
.setStatus(AdGroupAdStatus.PAUSED)
.setAd(
Ad.newBuilder()
.addFinalUrls("http://www.example.com/" + String.valueOf(i))
.setExpandedTextAd(
ExpandedTextAdInfo.newBuilder()
.setDescription("Buy your tickets now!")
.setHeadlinePart1("Cruise #" + i + " to Mars")
.setHeadlinePart2("Best Space Cruise Line")
.setPath1("path1")
.setPath2("path2")
.build()))
.build();
// Creates the operation.
AdGroupAdOperation op = AdGroupAdOperation.newBuilder().setCreate(adgroupAd).build();
operations.add(op);
}
// Gets the AdGroupAd service.
try (AdGroupAdServiceClient adGroupAdServiceClient =
googleAdsClient.getLatestVersion().createAdGroupAdServiceClient()) {
// Adds the text ads.
MutateAdGroupAdsResponse response =
adGroupAdServiceClient.mutateAdGroupAds(Long.toString(customerId), operations);
System.out.printf("Added %d text ads:%n", response.getResultsCount());
// Creates a list of the text ad resource names.
List<String> newAdGroupAdResourceNames = new ArrayList<>();
for (MutateAdGroupAdResult result : response.getResultsList()) {
newAdGroupAdResourceNames.add(result.getResourceName());
}
// Retrieves the expanded text ads.
List<AdGroupAd> newAdGroupAds =
getAdGroupAds(googleAdsClient, customerId, newAdGroupAdResourceNames);
for (AdGroupAd newAdGroupAd : newAdGroupAds) {
Ad ad = newAdGroupAd.getAd();
ExpandedTextAdInfo expandedTextAdInfo = ad.getExpandedTextAd();
// Displays the results.
System.out.printf(
"Expanded text ad with ID %s, status '%s', "
+ "and headline '%s - %s' was created in ad group with ID %s.%n",
ad.getId(),
newAdGroupAd.getStatus(),
expandedTextAdInfo.getHeadlinePart1(),
expandedTextAdInfo.getHeadlinePart2(),
adGroup.getId());
}
return newAdGroupAds;
}
}
/**
* Retrieves the ad group ads.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param newResourceNames resource names of the new ad group ad.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private List<AdGroupAd> getAdGroupAds(
GoogleAdsClient googleAdsClient, long customerId, List<String> newResourceNames) {
// Gets the GoogleAdsService.
try (GoogleAdsServiceClient googleAdsServiceClient =
googleAdsClient.getLatestVersion().createGoogleAdsServiceClient()) {
// Creates the request.
SearchGoogleAdsRequest request =
SearchGoogleAdsRequest.newBuilder()
.setCustomerId(Long.toString(customerId))
.setPageSize(PAGE_SIZE)
.setQuery(
String.format(
"SELECT "
+ "ad_group.id, "
+ "ad_group_ad.ad.id, "
+ "ad_group_ad.ad.expanded_text_ad.headline_part1, "
+ "ad_group_ad.ad.expanded_text_ad.headline_part2, "
+ "ad_group_ad.status, "
+ "ad_group_ad.ad.final_urls, "
+ "ad_group_ad.resource_name "
+ "FROM ad_group_ad "
+ "WHERE ad_group_ad.resource_name IN (%s)",
String.join(
", ",
newResourceNames.stream()
.map(resourceName -> String.format("'%s'", resourceName))
.collect(Collectors.toList()))))
.build();
// Retrieves the ad group ads
SearchPagedResponse response = googleAdsServiceClient.search(request);
// Creates and returns a list of the ad group ads.
List<AdGroupAd> adGroupAds = new ArrayList<>();
for (GoogleAdsRow googleAdsRow : response.iterateAll()) {
adGroupAds.add(googleAdsRow.getAdGroupAd());
}
return adGroupAds;
}
}
/**
* Creates keywords ad group criteria.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param adGroup the ad group for the new criteria.
* @param keywordsToAdd the keywords to add to the text ads.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private List<AdGroupCriterion> createKeywords(
GoogleAdsClient googleAdsClient,
long customerId,
AdGroup adGroup,
List<String> keywordsToAdd) {
String adGroupResourceName = ResourceNames.adGroup(customerId, adGroup.getId());
List<AdGroupCriterionOperation> operations = new ArrayList<>();
for (String keywordText : keywordsToAdd) {
// Creates the keyword criterion
AdGroupCriterion adGroupCriterion =
AdGroupCriterion.newBuilder()
.setAdGroup(adGroupResourceName)
.setStatus(AdGroupCriterionStatus.ENABLED)
.setKeyword(
KeywordInfo.newBuilder()
.setText(keywordText)
.setMatchType(KeywordMatchType.EXACT)
.build())
.build();
// Creates the operation.
AdGroupCriterionOperation op =
AdGroupCriterionOperation.newBuilder().setCreate(adGroupCriterion).build();
operations.add(op);
}
// Gets the AdGroupCriterionService.
try (AdGroupCriterionServiceClient adGroupCriterionServiceClient =
googleAdsClient.getLatestVersion().createAdGroupCriterionServiceClient()) {
// Adds the keywords
MutateAdGroupCriteriaResponse response =
adGroupCriterionServiceClient.mutateAdGroupCriteria(
Long.toString(customerId), operations);
System.out.printf("Added %d keywords:%n", response.getResultsCount());
// Creates a list of new keyword resource names
List<String> newCriteriaResourceNames = new ArrayList<>();
for (MutateAdGroupCriterionResult result : response.getResultsList()) {
newCriteriaResourceNames.add(result.getResourceName());
}
// Retrieves the newly created keywords.
List<AdGroupCriterion> newCriteria =
getKeywords(googleAdsClient, customerId, newCriteriaResourceNames);
// Displays the results.
for (AdGroupCriterion newCriterion : newCriteria) {
System.out.printf(
"Keyword with text '%s', ID %s, and match type '%s' was retrieved for ad group '%s'.%n",
newCriterion.getKeyword().getText(),
newCriterion.getCriterionId(),
newCriterion.getKeyword().getMatchType(),
adGroup.getName());
}
return newCriteria;
}
}
/**
* Retrieves the keyword ad group criteria.
*
* @param googleAdsClient the Google Ads API client.
* @param customerId the client customer ID.
* @param newResourceNames resource names of the new ad group criteria.
* @throws GoogleAdsException if an API request failed with one or more service errors.
*/
private List<AdGroupCriterion> getKeywords(
GoogleAdsClient googleAdsClient, long customerId, List<String> newResourceNames) {
// Gets the GoogleAdsService.
try (GoogleAdsServiceClient googleAdsServiceClient =
googleAdsClient.getLatestVersion().createGoogleAdsServiceClient()) {
// Creates the request.
SearchGoogleAdsRequest request =
SearchGoogleAdsRequest.newBuilder()
.setCustomerId(Long.toString(customerId))
.setPageSize(PAGE_SIZE)
// Creates the search query.
.setQuery(
String.format(
"SELECT "
+ "ad_group.id, "
+ "ad_group.status, "
+ "ad_group_criterion.criterion_id, "
+ "ad_group_criterion.keyword.text, "
+ "ad_group_criterion.keyword.match_type "
+ "FROM ad_group_criterion "
+ "WHERE ad_group_criterion.type = 'KEYWORD' "
+ "AND ad_group.status = 'ENABLED' "
+ "AND ad_group_criterion.status IN ('ENABLED', 'PAUSED') "
+ "AND ad_group_criterion.resource_name IN (%s) ",
String.join(
", ",
newResourceNames.stream()
.map(resourceName -> String.format("'%s'", resourceName))
.collect(Collectors.toList()))))
.build();
// Retrieves the adGroupCriteria.
SearchPagedResponse response = googleAdsServiceClient.search(request);
// Creates and returns a list of adGroupCriteria
List<AdGroupCriterion> adGroupCriteria = new ArrayList<>();
for (GoogleAdsRow googleAdsRow : response.iterateAll()) {
adGroupCriteria.add(googleAdsRow.getAdGroupCriterion());
}
return adGroupCriteria;
}
}
}
|
apache-2.0
|
nextreports/nextreports-server
|
src/ro/nextreports/server/aop/EntitiesRemoveAdvice.java
|
1930
|
/*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The ASF licenses this file to You under the Apache License, Version 2.0
* (the "License"); you may not use this file except in compliance with
* the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package ro.nextreports.server.aop;
import java.util.List;
import org.aspectj.lang.annotation.Pointcut;
/**
* @author Decebal Suiu
*/
public abstract class EntitiesRemoveAdvice {
@Pointcut("target(ro.nextreports.server.service.StorageService)")
public void inStorageService() {
}
@Pointcut("execution(* removeEntity(..))")
public void isRemoveEntity() {
}
@Pointcut("args(path, ..)")
public void withPath(String path) {
}
@Pointcut("inStorageService() && isRemoveEntity() && withPath(path)")
public void removeEntity(String path) {
}
@Pointcut("execution(* removeEntityById(..))")
public void isRemoveEntityById() {
}
@Pointcut("args(id, ..)")
public void withId(String id) {
}
@Pointcut("inStorageService() && isRemoveEntityById() && withId(id)")
public void removeEntityById(String id) {
}
@Pointcut("execution(* removeEntitiesById(..))")
public void isRemoveEntitiesById() {
}
@Pointcut("args(ids, ..)")
public void withIds(List<String> ids) {
}
@Pointcut("inStorageService() && isRemoveEntitiesById() && withIds(ids)")
public void removeEntitiesById(List<String> ids) {
}
}
|
apache-2.0
|
deepfield/ibis
|
ibis/pandas/execution/tests/test_arrays.py
|
6305
|
import operator
import pandas as pd
import pandas.util.testing as tm
import pytest
import ibis
from ibis.common import IbisTypeError
def test_array_length(t, df):
expr = t.projection([
t.array_of_float64.length().name('array_of_float64_length'),
t.array_of_int64.length().name('array_of_int64_length'),
t.array_of_strings.length().name('array_of_strings_length'),
])
result = expr.execute()
expected = pd.DataFrame({
'array_of_float64_length': [2, 1, 0],
'array_of_int64_length': [2, 0, 1],
'array_of_strings_length': [2, 0, 1],
})
tm.assert_frame_equal(result, expected)
def test_array_length_scalar(client):
raw_value = [1, 2, 4]
value = ibis.literal(raw_value)
expr = value.length()
result = client.execute(expr)
expected = len(raw_value)
assert result == expected
def test_array_collect(t, df):
expr = t.group_by(
t.dup_strings
).aggregate(collected=t.float64_with_zeros.collect())
result = expr.execute().sort_values('dup_strings').reset_index(drop=True)
expected = df.groupby(
'dup_strings'
).float64_with_zeros.apply(list).reset_index().rename(
columns={'float64_with_zeros': 'collected'}
)
tm.assert_frame_equal(result, expected)
@pytest.mark.xfail(
raises=TypeError,
reason=(
'Pandas does not implement rolling for functions that do not return '
'numbers'
)
)
def test_array_collect_rolling_partitioned(t, df):
window = ibis.trailing_window(2, order_by=t.plain_int64)
colexpr = t.plain_float64.collect().over(window)
expr = t['dup_strings', 'plain_int64', colexpr.name('collected')]
result = expr.execute()
expected = pd.DataFrame({
'dup_strings': ['d', 'a', 'd'],
'plain_int64': [1, 2, 3],
'collected': [[4.0], [4.0, 5.0], [5.0, 6.0]],
})[expr.columns]
tm.assert_frame_equal(result, expected)
@pytest.mark.xfail(raises=IbisTypeError, reason='Not sure if this should work')
def test_array_collect_scalar(client):
raw_value = 'abcd'
value = ibis.literal(raw_value)
expr = value.collect()
result = client.execute(expr)
expected = [raw_value]
assert result == expected
@pytest.mark.parametrize(
['start', 'stop'],
[
(1, 3),
(1, 1),
(2, 3),
(2, 5),
(None, 3),
(None, None),
(3, None),
# negative slices are not supported
pytest.mark.xfail(
(-3, None),
raises=ValueError,
reason='Negative slicing not supported'
),
pytest.mark.xfail(
(None, -3),
raises=ValueError,
reason='Negative slicing not supported'
),
pytest.mark.xfail(
(-3, -1),
raises=ValueError,
reason='Negative slicing not supported'
),
]
)
def test_array_slice(t, df, start, stop):
expr = t.array_of_strings[start:stop]
result = expr.execute()
slicer = operator.itemgetter(slice(start, stop))
expected = df.array_of_strings.apply(slicer)
tm.assert_series_equal(result, expected)
@pytest.mark.parametrize(
['start', 'stop'],
[
(1, 3),
(1, 1),
(2, 3),
(2, 5),
(None, 3),
(None, None),
(3, None),
# negative slices are not supported
pytest.mark.xfail(
(-3, None),
raises=ValueError,
reason='Negative slicing not supported'
),
pytest.mark.xfail(
(None, -3),
raises=ValueError,
reason='Negative slicing not supported'
),
pytest.mark.xfail(
(-3, -1),
raises=ValueError,
reason='Negative slicing not supported'
),
]
)
def test_array_slice_scalar(client, start, stop):
raw_value = [-11, 42, 10]
value = ibis.literal(raw_value)
expr = value[start:stop]
result = client.execute(expr)
expected = raw_value[start:stop]
assert result == expected
@pytest.mark.parametrize('index', [1, 3, 4, 11, -11])
def test_array_index(t, df, index):
expr = t[t.array_of_float64[index].name('indexed')]
result = expr.execute()
expected = pd.DataFrame({
'indexed': df.array_of_float64.apply(
lambda x: x[index] if -len(x) <= index < len(x) else None
)
})
tm.assert_frame_equal(result, expected)
@pytest.mark.parametrize('index', [1, 3, 4, 11])
def test_array_index_scalar(client, index):
raw_value = [-10, 1, 2, 42]
value = ibis.literal(raw_value)
expr = value[index]
result = client.execute(expr)
expected = raw_value[index] if index < len(raw_value) else None
assert result == expected
@pytest.mark.parametrize('n', [1, 3, 4, 7, -2]) # negative returns empty list
@pytest.mark.parametrize('mul', [lambda x, n: x * n, lambda x, n: n * x])
def test_array_repeat(t, df, n, mul):
expr = t.projection([mul(t.array_of_strings, n).name('repeated')])
result = expr.execute()
expected = pd.DataFrame({'repeated': df.array_of_strings * n})
tm.assert_frame_equal(result, expected)
@pytest.mark.parametrize('n', [1, 3, 4, 7, -2]) # negative returns empty list
@pytest.mark.parametrize('mul', [lambda x, n: x * n, lambda x, n: n * x])
def test_array_repeat_scalar(client, n, mul):
raw_array = [1, 2]
array = ibis.literal(raw_array)
expr = mul(array, n)
result = client.execute(expr)
expected = mul(raw_array, n)
assert result == expected
@pytest.mark.parametrize('op', [lambda x, y: x + y, lambda x, y: y + x])
def test_array_concat(t, df, op):
x = t.array_of_float64.cast('array<string>')
y = t.array_of_strings
expr = op(x, y)
result = expr.execute()
expected = op(
df.array_of_float64.apply(lambda x: list(map(str, x))),
df.array_of_strings
)
tm.assert_series_equal(result, expected)
@pytest.mark.parametrize('op', [lambda x, y: x + y, lambda x, y: y + x])
def test_array_concat_scalar(client, op):
raw_left = [1, 2, 3]
raw_right = [3, 4]
left = ibis.literal(raw_left)
right = ibis.literal(raw_right)
expr = op(left, right)
result = client.execute(expr)
assert result == op(raw_left, raw_right)
|
apache-2.0
|
chunnallu/frontend-tools
|
es6/closure-compiler/build/minified-app.js
|
309
|
var App=function(){};App.prototype.contructor=function(){};App.prototype.init=function(){this.box=$("#box");this.height=this.box.css("height");this.width=this.box.css("width");this.box.css("left","calc(50% - "+this.width+"/2)");this.box.css("top","calc(50% - "+this.height+"/2)")};var app=new App;app.init();
|
apache-2.0
|
hs-jenkins-bot/Singularity
|
SingularityService/src/main/java/com/hubspot/singularity/SingularityAbort.java
|
5463
|
package com.hubspot.singularity;
import ch.qos.logback.classic.LoggerContext;
import com.google.common.collect.ImmutableList;
import com.google.common.collect.ImmutableMap;
import com.google.common.net.HostAndPort;
import com.google.inject.Inject;
import com.google.inject.Injector;
import com.hubspot.mesos.JavaUtils;
import com.hubspot.singularity.config.SMTPConfiguration;
import com.hubspot.singularity.config.SingularityConfiguration;
import com.hubspot.singularity.managed.SingularityLifecycleManaged;
import com.hubspot.singularity.sentry.SingularityExceptionNotifier;
import com.hubspot.singularity.smtp.SingularitySmtpSender;
import java.io.PrintWriter;
import java.io.StringWriter;
import java.util.List;
import java.util.Optional;
import java.util.concurrent.atomic.AtomicBoolean;
import javax.inject.Named;
import javax.inject.Singleton;
import org.eclipse.jetty.server.Server;
import org.slf4j.ILoggerFactory;
import org.slf4j.Logger;
import org.slf4j.LoggerFactory;
@Singleton
public class SingularityAbort {
private static final Logger LOG = LoggerFactory.getLogger(SingularityAbort.class);
private final Optional<SMTPConfiguration> maybeSmtpConfiguration;
private final SingularitySmtpSender smtpSender;
private final HostAndPort hostAndPort;
private final SingularityExceptionNotifier exceptionNotifier;
private final Injector injector;
private final ServerProvider serverProvider;
private final AtomicBoolean aborting = new AtomicBoolean();
@Inject
public SingularityAbort(
SingularitySmtpSender smtpSender,
ServerProvider serverProvider,
SingularityConfiguration configuration,
SingularityExceptionNotifier exceptionNotifier,
Injector injector,
@Named(SingularityMainModule.HTTP_HOST_AND_PORT) HostAndPort hostAndPort
) {
this.maybeSmtpConfiguration = configuration.getSmtpConfigurationOptional();
this.serverProvider = serverProvider;
this.smtpSender = smtpSender;
this.exceptionNotifier = exceptionNotifier;
this.injector = injector;
this.hostAndPort = hostAndPort;
}
public enum AbortReason {
LOST_ZK_CONNECTION,
LOST_LEADERSHIP,
UNRECOVERABLE_ERROR,
ERROR_IN_LEADER_ONLY_POLLER,
TEST_ABORT,
MESOS_ERROR,
LOST_MESOS_CONNECTION,
MANUAL
}
public void abort(AbortReason abortReason, Optional<Throwable> throwable) {
if (!aborting.getAndSet(true)) {
try {
sendAbortNotification(abortReason, throwable);
SingularityLifecycleManaged lifecycle = injector.getInstance(
SingularityLifecycleManaged.class
);
try {
lifecycle.stop();
} catch (Throwable t) {
LOG.error("While shutting down", t);
}
flushLogs();
} finally {
exit();
}
}
}
private void exit() {
Optional<Server> server = serverProvider.get();
if (server.isPresent()) {
try {
server.get().stop();
} catch (Exception e) {
LOG.warn("While aborting server", e);
} finally {
System.exit(1);
}
} else {
LOG.warn("SingularityAbort called before server has fully initialized!");
System.exit(1); // Use the hammer.
}
}
private void sendAbortNotification(
AbortReason abortReason,
Optional<Throwable> throwable
) {
final String message = String.format(
"Singularity on %s is aborting due to %s",
hostAndPort.getHost(),
abortReason
);
LOG.error(message);
sendAbortMail(message, throwable);
if (throwable.isPresent()) {
exceptionNotifier.notify(
message,
throwable.get(),
ImmutableMap.of("abortReason", abortReason.name())
);
} else {
exceptionNotifier.notify(
message,
ImmutableMap.of("abortReason", abortReason.name())
);
}
}
private void sendAbortMail(final String message, final Optional<Throwable> throwable) {
if (!maybeSmtpConfiguration.isPresent()) {
LOG.warn("Couldn't send abort mail because no SMTP configuration is present");
return;
}
final List<SingularityEmailDestination> emailDestination = maybeSmtpConfiguration
.get()
.getEmailConfiguration()
.get(SingularityEmailType.SINGULARITY_ABORTING);
if (
emailDestination.isEmpty() ||
!emailDestination.contains(SingularityEmailDestination.ADMINS)
) {
LOG.info("Not configured to send abort mail");
return;
}
final String body;
if (throwable.isPresent()) {
StringWriter sw = new StringWriter();
PrintWriter pw = new PrintWriter(sw);
throwable.get().printStackTrace(pw);
body = "<pre>\n" + throwable.get().getMessage() + "\n" + sw.toString() + "\n</pre>";
} else {
body = "(no stack trace)";
}
smtpSender.queueMail(
maybeSmtpConfiguration.get().getAdmins(),
ImmutableList.of(),
message,
body
);
}
private void flushLogs() {
final long millisToWait = 100;
LOG.info(
"Attempting to flush logs and wait {} ...",
JavaUtils.durationFromMillis(millisToWait)
);
ILoggerFactory loggerFactory = LoggerFactory.getILoggerFactory();
if (loggerFactory instanceof LoggerContext) {
LoggerContext context = (LoggerContext) loggerFactory;
context.stop();
}
try {
Thread.sleep(millisToWait);
} catch (Exception e) {
LOG.info("While sleeping for log flush", e);
}
}
}
|
apache-2.0
|
genielabs/zuix
|
build/scripts/lint.js
|
2327
|
/*
* Copyright 2015-2018 G-Labs. All Rights Reserved.
* https://zuixjs.github.io/zuix
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
*
* This file is part of
* zUIx, Javascript library for component-based development.
* https://zuixjs.github.io/zuix
*
* @author Generoso Martello <[email protected]>
*/
const baseFolder = process.cwd();
// Commons
const fs = require('fs');
const path = require('path');
const recursive = require('fs-readdir-recursive');
// logging
const tlog = require(path.join(baseFolder, 'src/lib/logger'));
// ESLint
const linter = require('eslint').linter;
const lintConfig = require(path.join(baseFolder, '.eslintrc.json'));
const sourceFolder = path.join(baseFolder, 'src/js/');
const stats = {
error: 0,
warning: 0
};
function lint(callback) {
recursive(sourceFolder).map((f, i) => {
if (f.endsWith('.js')) {
tlog.info('^B%s^R', f);
const code = fs.readFileSync(sourceFolder + f, 'utf8');
const issues = linter.verify(code, lintConfig, sourceFolder + f);
issues.map((m, i)=>{
if (m.fatal || m.severity > 1) {
stats.error++;
tlog.error(' ^RError^: %s ^R(^Y%s^w:^Y%s^R)', m.message, m.line, m.column);
} else {
stats.warning++;
tlog.warn(' ^YWarning^: %s ^R(^Y%s^w:^Y%s^R)', m.message, m.line, m.column);
}
});
if (issues.length === 0) tlog.info(' ^G\u2713^: OK');
tlog.br();
}
});
tlog.info('Linting completed ^G-^: Errors ^R%s^: ^G-^: Warnings ^Y%s^:\n\n', stats.error, stats.warning);
//process.exit(stats.error);
if (callback) callback(stats);
}
module.exports = {
lint: lint
};
|
apache-2.0
|
mlperf/inference_results_v0.5
|
open/Inspur/code/resnet/schedule/src/inference/ssd_Calibration/EntropyCalibrator.h
|
3279
|
#ifndef ENTROPY_CALIBRATOR_H
#define ENTROPY_CALIBRATOR_H
#include "NvInfer.h"
#include "BatchStreamPPM.h"
//! \class EntropyCalibratorImpl
//!
//! \brief Implements common functionality for Entropy calibrators.
//!
class EntropyCalibratorImpl
{
public:
EntropyCalibratorImpl(BatchStream& stream, int firstBatch, std::string networkName, const char* inputBlobName, bool readCache = true)
: mStream(stream)
, mCalibrationTableName("CalibrationTable"+networkName)
, mInputBlobName(inputBlobName)
, mReadCache(readCache)
{
nvinfer1::DimsNCHW dims = mStream.getDims();
mInputCount = samplesCommon::volume(dims);
CHECK(cudaMalloc(&mDeviceInput, mInputCount * sizeof(float)));
mStream.reset(firstBatch);
}
virtual ~EntropyCalibratorImpl()
{
CHECK(cudaFree(mDeviceInput));
}
int getBatchSize() const { return mStream.getBatchSize(); }
bool getBatch(void* bindings[], const char* names[], int nbBindings)
{
if (!mStream.next())
{
return false;
}
CHECK(cudaMemcpy(mDeviceInput, mStream.getBatch(), mInputCount * sizeof(float), cudaMemcpyHostToDevice));
assert(!strcmp(names[0], mInputBlobName));
bindings[0] = mDeviceInput;
return true;
}
const void* readCalibrationCache(size_t& length)
{
mCalibrationCache.clear();
std::ifstream input(mCalibrationTableName, std::ios::binary);
input >> std::noskipws;
if (mReadCache && input.good())
{
std::copy(std::istream_iterator<char>(input), std::istream_iterator<char>(), std::back_inserter(mCalibrationCache));
}
length = mCalibrationCache.size();
return length ? mCalibrationCache.data() : nullptr;
}
void writeCalibrationCache(const void* cache, size_t length)
{
std::ofstream output(mCalibrationTableName, std::ios::binary);
output.write(reinterpret_cast<const char*>(cache), length);
}
private:
BatchStream mStream;
size_t mInputCount;
std::string mCalibrationTableName;
const char* mInputBlobName;
bool mReadCache{true};
void* mDeviceInput{nullptr};
std::vector<char> mCalibrationCache;
};
//! \class Int8EntropyCalibrator2
//!
//! \brief Implements Entropy calibrator 2.
//! CalibrationAlgoType is kENTROPY_CALIBRATION_2.
//!
class Int8EntropyCalibrator2 : public IInt8EntropyCalibrator2
{
public:
Int8EntropyCalibrator2(BatchStream& stream, int firstBatch, const char* networkName, const char* inputBlobName, bool readCache = true)
: mImpl(stream, firstBatch, networkName, inputBlobName, readCache)
{
}
int getBatchSize() const override { return mImpl.getBatchSize(); }
bool getBatch(void* bindings[], const char* names[], int nbBindings) override
{
return mImpl.getBatch(bindings, names, nbBindings);
}
const void* readCalibrationCache(size_t& length) override
{
return mImpl.readCalibrationCache(length);
}
void writeCalibrationCache(const void* cache, size_t length) override
{
mImpl.writeCalibrationCache(cache, length);
}
private:
EntropyCalibratorImpl mImpl;
};
#endif // ENTROPY_CALIBRATOR_H
|
apache-2.0
|
cloudconductor-patterns/vnet_pattern
|
CHANGELOG.md
|
150
|
CHANGELOG
=========
## version 0.1.0 (2015/09/30)
- First release of vnet pattern that provides user with SDN (software defined network) feature.
|
apache-2.0
|
resin-io-library/base-images
|
balena-base-images/openjdk/imx7-var-som/fedora/35/8-jre/run/Dockerfile
|
1318
|
# AUTOGENERATED FILE
FROM balenalib/imx7-var-som-fedora:35-run
RUN dnf -y update \
&& dnf clean all \
&& dnf -y install \
gzip \
java-1.8.0-openjdk \
java-1.8.0-openjdk-devel \
tar \
&& dnf clean all
# set JAVA_HOME
ENV JAVA_HOME /usr/lib/jvm/java-openjdk
CMD ["echo","'No CMD command was set in Dockerfile! Details about CMD command could be found in Dockerfile Guide section in our Docs. Here's the link: https://balena.io/docs"]
RUN [ ! -d /.balena/messages ] && mkdir -p /.balena/messages; echo $'Here are a few details about this Docker image (For more information please visit https://www.balena.io/docs/reference/base-images/base-images/): \nArchitecture: ARM v7 \nOS: Fedora 35 \nVariant: run variant \nDefault variable(s): UDEV=off \nThe following software stack is preinstalled: \nOpenJDK v8-jre \nExtra features: \n- Easy way to install packages with `install_packages <package-name>` command \n- Run anywhere with cross-build feature (for ARM only) \n- Keep the container idling with `balena-idle` command \n- Show base image details with `balena-info` command' > /.balena/messages/image-info
RUN echo $'#!/bin/sh.real\nbalena-info\nrm -f /bin/sh\ncp /bin/sh.real /bin/sh\n/bin/sh "$@"' > /bin/sh-shim \
&& chmod +x /bin/sh-shim \
&& cp /bin/sh /bin/sh.real \
&& mv /bin/sh-shim /bin/sh
|
apache-2.0
|
chef/ruby-dynomite
|
spec/spec_helper.rb
|
106
|
$: << File.join(File.dirname(__FILE__), "/../lib" )
require 'rubygems'
require 'spec'
require 'dynomite'
|
apache-2.0
|
clibois/wss4j
|
ws-security-stax/src/main/java/org/apache/wss4j/stax/validate/UsernameTokenValidatorImpl.java
|
11364
|
/**
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
package org.apache.wss4j.stax.validate;
import org.apache.commons.codec.binary.Base64;
import org.apache.wss4j.binding.wss10.AttributedString;
import org.apache.wss4j.binding.wss10.EncodedString;
import org.apache.wss4j.binding.wss10.PasswordString;
import org.apache.wss4j.binding.wss10.UsernameTokenType;
import org.apache.wss4j.binding.wsu10.AttributedDateTime;
import org.apache.wss4j.common.ext.WSPasswordCallback;
import org.apache.wss4j.common.ext.WSSecurityException;
import org.apache.wss4j.stax.ext.WSSConstants;
import org.apache.wss4j.stax.securityToken.UsernameSecurityToken;
import org.apache.wss4j.stax.securityToken.WSSecurityTokenConstants;
import org.apache.wss4j.stax.utils.WSSUtils;
import org.apache.wss4j.stax.impl.securityToken.UsernameSecurityTokenImpl;
import org.apache.xml.security.stax.ext.XMLSecurityUtils;
import org.apache.xml.security.stax.securityToken.InboundSecurityToken;
public class UsernameTokenValidatorImpl implements UsernameTokenValidator {
private static final transient org.slf4j.Logger LOG = org.slf4j.LoggerFactory.getLogger(UsernameTokenValidatorImpl.class);
@Override
public <T extends UsernameSecurityToken & InboundSecurityToken> T validate(
UsernameTokenType usernameTokenType, TokenContext tokenContext) throws WSSecurityException {
// If the UsernameToken is to be used for key derivation, the (1.1)
// spec says that it cannot contain a password, and it must contain
// an Iteration element
final byte[] salt = XMLSecurityUtils.getQNameType(usernameTokenType.getAny(), WSSConstants.TAG_WSSE11_SALT);
PasswordString passwordType = XMLSecurityUtils.getQNameType(usernameTokenType.getAny(), WSSConstants.TAG_WSSE_PASSWORD);
final Long iteration = XMLSecurityUtils.getQNameType(usernameTokenType.getAny(), WSSConstants.TAG_WSSE11_ITERATION);
if (salt != null && (passwordType != null || iteration == null)) {
throw new WSSecurityException(WSSecurityException.ErrorCode.INVALID_SECURITY_TOKEN, "badTokenType01");
}
boolean handleCustomPasswordTypes = tokenContext.getWssSecurityProperties().getHandleCustomPasswordTypes();
boolean allowUsernameTokenNoPassword =
tokenContext.getWssSecurityProperties().isAllowUsernameTokenNoPassword()
|| Boolean.parseBoolean((String)tokenContext.getWsSecurityContext().get(WSSConstants.PROP_ALLOW_USERNAMETOKEN_NOPASSWORD));
// Check received password type against required type
WSSConstants.UsernameTokenPasswordType requiredPasswordType =
tokenContext.getWssSecurityProperties().getUsernameTokenPasswordType();
if (requiredPasswordType != null) {
if (passwordType == null || passwordType.getType() == null) {
if (LOG.isDebugEnabled()) {
LOG.debug("Authentication failed as the received password type does not "
+ "match the required password type of: " + requiredPasswordType);
}
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
WSSConstants.UsernameTokenPasswordType usernameTokenPasswordType =
WSSConstants.UsernameTokenPasswordType.getUsernameTokenPasswordType(passwordType.getType());
if (requiredPasswordType != usernameTokenPasswordType) {
if (LOG.isDebugEnabled()) {
LOG.debug("Authentication failed as the received password type does not "
+ "match the required password type of: " + requiredPasswordType);
}
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
}
WSSConstants.UsernameTokenPasswordType usernameTokenPasswordType = WSSConstants.UsernameTokenPasswordType.PASSWORD_NONE;
if (passwordType != null && passwordType.getType() != null) {
usernameTokenPasswordType = WSSConstants.UsernameTokenPasswordType.getUsernameTokenPasswordType(passwordType.getType());
}
final AttributedString username = usernameTokenType.getUsername();
if (username == null) {
throw new WSSecurityException(WSSecurityException.ErrorCode.INVALID_SECURITY_TOKEN, "badTokenType01");
}
final EncodedString encodedNonce =
XMLSecurityUtils.getQNameType(usernameTokenType.getAny(), WSSConstants.TAG_WSSE_NONCE);
byte[] nonceVal = null;
if (encodedNonce != null && encodedNonce.getValue() != null) {
nonceVal = Base64.decodeBase64(encodedNonce.getValue());
}
final AttributedDateTime attributedDateTimeCreated =
XMLSecurityUtils.getQNameType(usernameTokenType.getAny(), WSSConstants.TAG_WSU_CREATED);
String created = null;
if (attributedDateTimeCreated != null) {
created = attributedDateTimeCreated.getValue();
}
if (usernameTokenPasswordType == WSSConstants.UsernameTokenPasswordType.PASSWORD_DIGEST) {
if (encodedNonce == null || attributedDateTimeCreated == null) {
throw new WSSecurityException(WSSecurityException.ErrorCode.INVALID_SECURITY_TOKEN, "badTokenType01");
}
if (!WSSConstants.SOAPMESSAGE_NS10_BASE64_ENCODING.equals(encodedNonce.getEncodingType())) {
throw new WSSecurityException(WSSecurityException.ErrorCode.UNSUPPORTED_SECURITY_TOKEN, "badTokenType01");
}
verifyDigestPassword(username.getValue(), passwordType, nonceVal, created, tokenContext);
} else if (usernameTokenPasswordType == WSSConstants.UsernameTokenPasswordType.PASSWORD_TEXT
|| passwordType != null && passwordType.getValue() != null
&& usernameTokenPasswordType == WSSConstants.UsernameTokenPasswordType.PASSWORD_NONE) {
verifyPlaintextPassword(username.getValue(), passwordType, tokenContext);
} else if (passwordType != null && passwordType.getValue() != null) {
if (!handleCustomPasswordTypes) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
verifyCustomPassword(username.getValue(), passwordType, tokenContext);
} else {
if (!allowUsernameTokenNoPassword) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
}
final String password;
if (passwordType != null) {
password = passwordType.getValue();
} else if (salt != null) {
WSPasswordCallback pwCb = new WSPasswordCallback(username.getValue(),
WSPasswordCallback.USERNAME_TOKEN);
try {
WSSUtils.doPasswordCallback(tokenContext.getWssSecurityProperties().getCallbackHandler(), pwCb);
} catch (WSSecurityException e) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION, e);
}
password = pwCb.getPassword();
} else {
password = null;
}
UsernameSecurityTokenImpl usernameSecurityToken = new UsernameSecurityTokenImpl(
usernameTokenPasswordType, username.getValue(), password, created,
nonceVal, salt, iteration,
tokenContext.getWsSecurityContext(), usernameTokenType.getId(),
WSSecurityTokenConstants.KEYIDENTIFIER_SECURITY_TOKEN_DIRECT_REFERENCE);
usernameSecurityToken.setElementPath(tokenContext.getElementPath());
usernameSecurityToken.setXMLSecEvent(tokenContext.getFirstXMLSecEvent());
@SuppressWarnings("unchecked")
T token = (T)usernameSecurityToken;
return token;
}
/**
* Verify a UsernameToken containing a password digest.
*/
protected void verifyDigestPassword(
String username,
PasswordString passwordType,
byte[] nonceVal,
String created,
TokenContext tokenContext
) throws WSSecurityException {
WSPasswordCallback pwCb = new WSPasswordCallback(username,
null,
passwordType.getType(),
WSPasswordCallback.USERNAME_TOKEN);
try {
WSSUtils.doPasswordCallback(tokenContext.getWssSecurityProperties().getCallbackHandler(), pwCb);
} catch (WSSecurityException e) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION, e);
}
if (pwCb.getPassword() == null) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
String passDigest = WSSUtils.doPasswordDigest(nonceVal, created, pwCb.getPassword());
if (!passwordType.getValue().equals(passDigest)) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
passwordType.setValue(pwCb.getPassword());
}
/**
* Verify a UsernameToken containing a plaintext password.
*/
protected void verifyPlaintextPassword(
String username,
PasswordString passwordType,
TokenContext tokenContext
) throws WSSecurityException {
WSPasswordCallback pwCb = new WSPasswordCallback(username,
null,
passwordType.getType(),
WSPasswordCallback.USERNAME_TOKEN);
try {
WSSUtils.doPasswordCallback(tokenContext.getWssSecurityProperties().getCallbackHandler(), pwCb);
} catch (WSSecurityException e) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION, e);
}
if (pwCb.getPassword() == null) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
if (!passwordType.getValue().equals(pwCb.getPassword())) {
throw new WSSecurityException(WSSecurityException.ErrorCode.FAILED_AUTHENTICATION);
}
passwordType.setValue(pwCb.getPassword());
}
/**
* Verify a UsernameToken containing a password of some unknown (but specified) password
* type.
*/
protected void verifyCustomPassword(
String username,
PasswordString passwordType,
TokenContext tokenContext
) throws WSSecurityException {
verifyPlaintextPassword(username, passwordType, tokenContext);
}
}
|
apache-2.0
|
OpenStack-Development/Keystone-hybrid-identity-backend
|
README.md
|
1773
|
# Hybrid (SQL and LDAP) identity backend for OpenStack Keystone
This project implements hybrid identity backend for Keystone.
## The Hybrid Identity Backend
How it works:
- Identities and Assignments are maintained in SQL backend’s
- User authentication tries SQL backend first
- Failed authentication tries LDAP second
- Authentication method in LDAP is simple_bind
- Successful LDAP authentication triggers user synchronization to SQL backend
- The user is assigned default tenant ID based on user_default_project_id_attribute LDAP configuration option
- Tenant is automatically created first if does not exist
- Role is assigned from default_role configuration option
The code has only been tested in the **Icehouse** release of OpenStack Keystone.
* * *
### Installation
The following is typical keystone.conf configuration portion related to hybrid identity backend:
```
driver=keystone.identity.backends.hybrid.Identity
[ldap]
url=ldaps://ldap.example.com:3643
user=uid=ldapadmin,ou=admin,o=example.com
password=secure
user_tree_dn=ou=people,o=example.com
user_id_attribute=uid
user_name_attribute=uid
user_mail_attribute=mail
user_default_project_id_attribute=exampleCostCenter
user_attribute_ignore=userPassword
[hybrid]
default_role=_member_
update_password=True
accept_password_from=admin
```
Copy hybrid.py to /usr/lib/python2.6/site-packages/keystone/identity/backends and restart keystone.
### Configuration options
- **default_role** – this role is assigned to all users synchronized from LDAP
- **update_password** – (True or False) successful LDAP authentication will trigger user password update in SQL backend
- **accept_password_from** – can authenticate users with the password for this account additionally to their own passwords
|
apache-2.0
|
PolymerLabs/project-health
|
src/server/models/hooksModel.ts
|
1305
|
import {firestore} from '../../utils/firestore';
const HOOK_COLLECTION_NAME = 'github-event-deliveries';
export const HOOK_MAX_AGE = 60 * 1000;
class HooksModel {
/**
* This method may be called multiple times in quick succession resulting
* in a the doc already existing.
*/
async logHook(hookDelivery: string): Promise<boolean> {
const hookDocRef =
await firestore().collection(HOOK_COLLECTION_NAME).doc(hookDelivery);
return firestore().runTransaction(async (transaction) => {
const hookDoc = await transaction.get(hookDocRef);
if (hookDoc.exists) {
return false;
}
await transaction.set(
hookDocRef, {received: true, timestamp: Date.now()});
return true;
});
}
async cleanHooks() {
const querySnapshot =
await firestore()
.collection(HOOK_COLLECTION_NAME)
.where('timestamp', '<', Date.now() - HOOK_MAX_AGE)
.get();
const batch = firestore().batch();
querySnapshot.forEach((doc) => {
batch.delete(doc.ref);
});
await batch.commit();
}
async deleteHook(hookDelivery: string) {
await firestore()
.collection(HOOK_COLLECTION_NAME)
.doc(hookDelivery)
.delete();
}
}
export const hooksModel = new HooksModel();
|
apache-2.0
|
mdoering/backbone
|
life/Fungi/Ascomycota/Leotiomycetes/Helotiales/Sclerotiniaceae/Monilia/Monilia albolutea/README.md
|
199
|
# Monilia albolutea Secr. SPECIES
#### Status
ACCEPTED
#### According to
Index Fungorum
#### Published in
Mycogr. Suisse 3: 547 (1833)
#### Original name
Monilia albolutea Secr.
### Remarks
null
|
apache-2.0
|
leopardoooo/cambodia
|
boss-report/src/main/java/com/ycsoft/report/query/daq/DBAcquisition.java
|
1854
|
package com.ycsoft.report.query.daq;
import java.sql.Connection;
import java.sql.ResultSet;
import java.sql.SQLException;
import java.sql.Statement;
import com.ycsoft.commons.exception.ReportException;
import com.ycsoft.commons.helper.LoggerHelper;
import com.ycsoft.report.db.ConnContainer;
/**
* 数据库提取数据
*/
public class DBAcquisition implements DataReader {
private Connection conn = null;
private Statement stmt = null;
private ResultSet rs = null;
private String database =null;
private String sql=null;
public DBAcquisition(String sql,String database){
this.sql=sql;
this.database=database;
}
public void close() throws ReportException {
try {
if (rs != null){
rs.close();
rs=null;
}
} catch (Exception e) {
}
try {
if (stmt != null){
stmt.close();
stmt=null;
}
} catch (Exception e) {
}
try {
if (conn != null){
conn.close();
conn=null;
}
} catch (Exception e) {
}
}
public Object getObject(int i) throws ReportException {
try {
return rs.getObject(i);
} catch (SQLException e) {
throw new ReportException(e);
}
}
public String getString(int i) throws ReportException {
try {
return rs.getString(i);
} catch (SQLException e) {
throw new ReportException(e);
}
}
public boolean next() throws ReportException {
try {
return rs.next();
} catch (SQLException e) {
throw new ReportException(e);
}
}
public void open() throws ReportException {
try {
conn = ConnContainer.getConn(database);
stmt = conn.createStatement();
stmt.setFetchSize(1000);
LoggerHelper.debug(this.getClass(),sql);
rs = stmt.executeQuery(sql);
} catch (SQLException e) {
throw new ReportException(e,e.getSQLState());
}
}
}
|
apache-2.0
|
venkatyum/homeford
|
webapps/univ/module/quizpool/list.html
|
1473
|
<!DOCTYPE html>
<link rel="apple-touch-icon" href="img/iosicon.png"/>
<html class="no-js" lang="en">
<body class="page">
<noscript>
<div id="noscript-warning">
This website works best with JavaScript enabled
</div>
</noscript>
<header id="fluid-nav">
<div id="logo">
<a href=""></a>
</div>
</header>
<div id="quiz-view-modal" class="modal-body view">
<div class="modal-container view">
<header>
<i style="padding-right:10px" class="icon-edit icon-1x "></i>
Quiz Pool List
</header>
<div class="modal-contents">
<table id="quiz-table" class="view-table">
<thead>
<tr>
<th style="display: none">ID</th>
<th>Name<i class="icon-sort-by-attributes icon-1x tablesortcontrol"></i></th>
<th>Description<i class="icon-sort-by-attributes icon-1x tablesortcontrol"></i></th>
<th>No: Of Questions<i class="icon-sort-by-attributes icon-1x tablesortcontrol"></i></th>
</tr>
</thead>
<tbody>
</tbody>
</table>
<div class="noinfo" style="display:none">No Results Available</div>
</div>
<div class="modal_close"></div>
</div>
</div>
<div id="preloader"></div>
<table id="div-template" style="display:none">
<tr id="quiz-template">
<td class="quiz-id" style="display: none"></td>
<td class="quiz-name"></td>
<td class="quiz-desc"></td>
<td class="quiz-strength"></td>
</tr>
</table>
</body>
</html>
|
apache-2.0
|
antonio081014/iOS-No-Interaction-Screen-Blocker
|
Screen Blocker/Screen Blocker/AppDelegate.h
|
293
|
//
// AppDelegate.h
// Screen Blocker
//
// Created by Dev Perfecular on 10/1/13.
// Copyright (c) 2013 Antonio081014.com. All rights reserved.
//
#import <UIKit/UIKit.h>
@interface AppDelegate : UIResponder <UIApplicationDelegate>
@property (strong, nonatomic) UIWindow *window;
@end
|
apache-2.0
|
aws4j/dynamo-mapper
|
src/main/java/org/aws4j/data/dynamo/attribute/converter/JsonConverter.java
|
1500
|
package org.aws4j.data.dynamo.attribute.converter;
import java.lang.reflect.Type;
import java.util.Set;
import org.aws4j.core.exception.NotImplementedException;
import org.aws4j.core.util.JacksonUtil;
import com.amazonaws.services.dynamodbv2.model.AttributeValue;
import com.fasterxml.jackson.core.JsonProcessingException;
import com.fasterxml.jackson.databind.ObjectMapper;
public class JsonConverter<V> implements AttributeValueConverter<V> {
private Type parameterType;
private ObjectMapper mapper;
public JsonConverter(Type parameterType) {
this.parameterType = parameterType;
this.mapper = new ObjectMapper();
};
// TODO Util
private String toJsonString(V value) {
try {
return mapper.writeValueAsString(value);
} catch (JsonProcessingException e) {
throw new IllegalArgumentException(e);
}
}
private V toValue(String json) {
try {
return mapper.readValue(json,
JacksonUtil.getJavaType(parameterType));
} catch (Exception e) {
throw new IllegalArgumentException(e);
}
}
@Override
public AttributeValue convert(V value) {
return new AttributeValue().withS(toJsonString(value));
}
@Override
public AttributeValue convertFromSet(Set<V> values) {
throw new NotImplementedException();
}
@Override
public V deconvert(AttributeValue attrValue) {
// TODO Auto-generated method stub
return toValue(attrValue.getS());
}
@Override
public Set<V> deconvertToSet(AttributeValue attrValue) {
throw new NotImplementedException();
}
}
|
apache-2.0
|
jiss-software/jiss-commons
|
commons-json/src/main/java/ee/jiss/commons/json/convert/LocalDateParser.java
|
935
|
package ee.jiss.commons.json.convert;
import com.fasterxml.jackson.core.JsonParser;
import com.fasterxml.jackson.databind.DeserializationContext;
import com.fasterxml.jackson.databind.deser.std.StdScalarDeserializer;
import org.joda.time.LocalDate;
import org.joda.time.format.DateTimeFormatter;
import java.io.IOException;
import static ee.jiss.commons.lang.CheckUtils.isEmptyString;
import static org.joda.time.format.DateTimeFormat.forPattern;
public class LocalDateParser
extends StdScalarDeserializer<LocalDate> {
private static final DateTimeFormatter FORMATTER = forPattern("dd.MM.yyyy");
public LocalDateParser() {
super(LocalDate.class);
}
@Override
public LocalDate deserialize(final JsonParser jp, final DeserializationContext ctxt) throws IOException {
final String text = jp.getText();
return isEmptyString(text) ? null : FORMATTER.parseLocalDate(text);
}
}
|
apache-2.0
|
hildeth/chapel
|
compiler/main/driver.cpp
|
41155
|
/*
* Copyright 2004-2015 Cray Inc.
* Other additional copyright holders may be indicated within.
*
* The entirety of this work is licensed under the Apache License,
* Version 2.0 (the "License"); you may not use this file except
* in compliance with the License.
*
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define EXTERN
#ifndef __STDC_FORMAT_MACROS
#define __STDC_FORMAT_MACROS
#endif
#include "driver.h"
#include "arg.h"
#include "chpl.h"
#include "commonFlags.h"
#include "config.h"
#include "countTokens.h"
#include "docsDriver.h"
#include "files.h"
#include "ipe.h"
#include "log.h"
#include "misc.h"
#include "mysystem.h"
#include "PhaseTracker.h"
#include "primitive.h"
#include "runpasses.h"
#include "stmt.h"
#include "stringutil.h"
#include "symbol.h"
#include "timer.h"
#include "version.h"
#include <inttypes.h>
#include <string>
#include <sstream>
char CHPL_HOME[FILENAME_MAX+1] = "";
const char* CHPL_HOST_PLATFORM = NULL;
const char* CHPL_HOST_COMPILER = NULL;
const char* CHPL_TARGET_PLATFORM = NULL;
const char* CHPL_TARGET_COMPILER = NULL;
const char* CHPL_TARGET_ARCH = NULL;
const char* CHPL_LOCALE_MODEL = NULL;
const char* CHPL_COMM = NULL;
const char* CHPL_COMM_SUBSTRATE = NULL;
const char* CHPL_GASNET_SEGMENT = NULL;
const char* CHPL_TASKS = NULL;
const char* CHPL_THREADS = NULL;
const char* CHPL_LAUNCHER = NULL;
const char* CHPL_TIMERS = NULL;
const char* CHPL_MEM = NULL;
const char* CHPL_MAKE = NULL;
const char* CHPL_ATOMICS = NULL;
const char* CHPL_NETWORK_ATOMICS = NULL;
const char* CHPL_GMP = NULL;
const char* CHPL_HWLOC = NULL;
const char* CHPL_REGEXP = NULL;
const char* CHPL_WIDE_POINTERS = NULL;
const char* CHPL_LLVM = NULL;
const char* CHPL_AUX_FILESYS = NULL;
// quick and dirty
#define MAX_CHPL_ENV_VARS 50
int num_chpl_env_vars = 0;
const char *chpl_env_vars[MAX_CHPL_ENV_VARS];
const char *chpl_env_var_names[MAX_CHPL_ENV_VARS];
bool widePointersStruct;
static char makeArgument[256] = "";
static char libraryFilename[FILENAME_MAX] = "";
static char incFilename[FILENAME_MAX] = "";
static char moduleSearchPath[FILENAME_MAX] = "";
static char log_flags[512] = "";
bool fLibraryCompile = false;
bool no_codegen = false;
int debugParserLevel = 0;
bool fVerify = false;
bool ignore_errors = false;
bool ignore_errors_for_pass = false;
bool ignore_warnings = false;
int fcg = 0;
static bool fBaseline = false;
bool fCacheRemote = false;
bool fFastFlag = false;
int fConditionalDynamicDispatchLimit = 0;
bool fUseNoinit = true;
bool fNoCopyPropagation = false;
bool fNoDeadCodeElimination = false;
bool fNoRemoveWrapRecords = false;
bool fNoScalarReplacement = false;
bool fNoTupleCopyOpt = false;
bool fNoRemoteValueForwarding = false;
bool fNoRemoveCopyCalls = false;
bool fNoOptimizeLoopIterators = false;
bool fNoVectorize = true;
bool fNoGlobalConstOpt = false;
bool fNoFastFollowers = false;
bool fNoInlineIterators = false;
bool fNoLiveAnalysis = false;
bool fNoBoundsChecks = false;
bool fNoLocalChecks = false;
bool fNoNilChecks = false;
bool fNoStackChecks = false;
bool fNoCastChecks = false;
bool fMungeUserIdents = true;
bool fEnableTaskTracking = false;
bool printPasses = false;
FILE* printPassesFile = NULL;
// flag for llvmWideOpt
bool fLLVMWideOpt = false;
bool fWarnConstLoops = true;
// Enable all extra special warnings
static bool fNoWarnSpecial = true;
static bool fNoWarnDomainLiteral = true;
static bool fNoWarnTupleIteration = true;
bool fNoloopInvariantCodeMotion = false;
bool fNoChecks = false;
bool fNoInline = false;
bool fNoPrivatization = false;
bool fNoOptimizeOnClauses = false;
bool fNoRemoveEmptyRecords = true;
bool fRemoveUnreachableBlocks = true;
bool fMinimalModules = false;
bool fUseIPE = false;
int optimize_on_clause_limit = 20;
int scalar_replace_limit = 8;
int tuple_copy_limit = scalar_replace_limit;
bool fGenIDS = false;
int fLinkStyle = LS_DEFAULT; // use backend compiler's default
bool fLocal; // initialized in setupOrderedGlobals() below
bool fIgnoreLocalClasses = false;
bool fHeterogeneous = false; // re-initialized in setupOrderedGlobals() below
bool fieeefloat = false;
int ffloatOpt = 0; // 0 -> backend default; -1 -> strict; 1 -> opt
bool report_inlining = false;
char fExplainCall[256] = "";
int explainCallID = -1;
int breakOnResolveID = -1;
char fExplainInstantiation[256] = "";
bool fExplainVerbose = false;
bool fPrintCallStackOnError = false;
bool fPrintIDonError = false;
bool fPrintModuleResolution = false;
bool fCLineNumbers = false;
bool fPrintEmittedCodeSize = false;
char fPrintStatistics[256] = "";
bool fPrintDispatch = false;
bool fReportOptimizedLoopIterators = false;
bool fReportOrderIndependentLoops = false;
bool fReportOptimizedOn = false;
bool fReportPromotion = false;
bool fReportScalarReplace = false;
bool fReportDeadBlocks = false;
bool fReportDeadModules = false;
bool printCppLineno = false;
bool userSetCppLineno = false;
int num_constants_per_variable = 1;
char defaultDist[256] = "DefaultDist";
int instantiation_limit = 256;
char mainModuleName[256] = "";
bool printSearchDirs = false;
bool printModuleFiles = false;
bool llvmCodegen = false;
#ifdef HAVE_LLVM
bool externC = true;
#else
bool externC = false;
#endif
char breakOnCodegenCname[256] = "";
bool debugCCode = false;
bool optimizeCCode = false;
bool specializeCCode = false;
bool fNoMemoryFrees = false;
int numGlobalsOnHeap = 0;
bool preserveInlinedLineNumbers = false;
const char* compileCommand = NULL;
char compileVersion[64];
/* Note -- LLVM provides a way to get the path to the executable...
// This function isn't referenced outside its translation unit, but it
// can't use the "static" keyword because its address is used for
// GetMainExecutable (since some platforms don't support taking the
// address of main, and some platforms can't implement GetMainExecutable
// without being given the address of a function in the main executable).
llvm::sys::Path GetExecutablePath(const char *Argv0) {
// This just needs to be some symbol in the binary; C++ doesn't
// allow taking the address of ::main however.
void *MainAddr = (void*) (intptr_t) GetExecutablePath;
return llvm::sys::Path::GetMainExecutable(Argv0, MainAddr);
}
*/
static bool isMaybeChplHome(const char* path)
{
bool ret = false;
char* real = dirHasFile(path, "util/chplenv");
if (real)
ret = true;
free(real);
return ret;
}
static void setupChplHome(const char* argv0) {
const char* chpl_home = getenv("CHPL_HOME");
char* guess = NULL;
// Get the executable path.
guess = findProgramPath(argv0);
if (guess) {
// Determine CHPL_HOME based on the exe path.
// Determined exe path, but don't have a env var set
// Look for ../../../util/chplenv
// Remove the /bin/some-platform/chpl part
// from the path.
if( guess[0] ) {
int j = strlen(guess) - 5; // /bin and '\0'
for( ; j >= 0; j-- ) {
if( guess[j] == '/' &&
guess[j+1] == 'b' &&
guess[j+2] == 'i' &&
guess[j+3] == 'n' ) {
guess[j] = '\0';
break;
}
}
}
if( isMaybeChplHome(guess) ) {
// OK!
} else {
// Maybe we are in e.g. /usr/bin.
free(guess);
guess = NULL;
}
}
if( chpl_home ) {
if( strlen(chpl_home) > FILENAME_MAX )
USR_FATAL("$CHPL_HOME=%s path too long", chpl_home);
if( guess == NULL ) {
// Could not find exe path, but have a env var set
strncpy(CHPL_HOME, chpl_home, FILENAME_MAX);
} else {
// We have env var and found exe path.
// Check that they match and emit a warning if not.
if( ! isSameFile(chpl_home, guess) ) {
// Not the same. Emit warning.
USR_WARN("$CHPL_HOME=%s mismatched with executable home=%s",
chpl_home, guess);
}
// Since we have an enviro var, always use that.
strncpy(CHPL_HOME, chpl_home, FILENAME_MAX);
}
} else {
if( guess == NULL ) {
// Could not find enviro var, and could not
// guess at exe's path name.
USR_FATAL("$CHPL_HOME must be set to run chpl");
} else {
int rc;
if( strlen(guess) > FILENAME_MAX )
USR_FATAL("chpl guessed home %s too long", guess);
// Determined exe path, but don't have a env var set
strncpy(CHPL_HOME, guess, FILENAME_MAX);
// Also need to setenv in this case.
rc = setenv("CHPL_HOME", guess, 0);
if( rc ) USR_FATAL("Could not setenv CHPL_HOME");
}
}
// Check that the resulting path is a Chapel distribution.
if( ! isMaybeChplHome(CHPL_HOME) ) {
// Bad enviro var.
USR_WARN("CHPL_HOME=%s is not a Chapel distribution", CHPL_HOME);
}
if( guess )
free(guess);
parseCmdLineConfig("CHPL_HOME", astr("\"", CHPL_HOME, "\""));
}
static void setupEnvVar(std::istringstream& iss, const char** var, const char* varname) {
std::string line;
std::string value;
std::getline(iss, line);
if (!iss.good() || line.find(varname) == std::string::npos) {
INT_FATAL(astr("Parsing ", varname));
}
value = line.substr(line.find('=')+1, std::string::npos);
*var = astr(value.c_str()); // astr call is to canonicalize
parseCmdLineConfig(varname, astr("\"", *var, "\""));
}
#define SETUP_ENV_VAR(varname) \
INT_ASSERT(num_chpl_env_vars < MAX_CHPL_ENV_VARS); \
setupEnvVar(iss, &varname, #varname); \
chpl_env_var_names[num_chpl_env_vars] = #varname; \
chpl_env_vars[num_chpl_env_vars] = varname; \
num_chpl_env_vars++;
static void setupEnvVars() {
std::string vars = runUtilScript("printchplenv --simple");
std::istringstream iss(vars);
SETUP_ENV_VAR(CHPL_HOST_PLATFORM);
SETUP_ENV_VAR(CHPL_HOST_COMPILER);
SETUP_ENV_VAR(CHPL_TARGET_PLATFORM);
SETUP_ENV_VAR(CHPL_TARGET_COMPILER);
SETUP_ENV_VAR(CHPL_TARGET_ARCH);
SETUP_ENV_VAR(CHPL_LOCALE_MODEL);
SETUP_ENV_VAR(CHPL_COMM);
SETUP_ENV_VAR(CHPL_COMM_SUBSTRATE);
SETUP_ENV_VAR(CHPL_GASNET_SEGMENT);
SETUP_ENV_VAR(CHPL_TASKS);
SETUP_ENV_VAR(CHPL_THREADS);
SETUP_ENV_VAR(CHPL_LAUNCHER);
SETUP_ENV_VAR(CHPL_TIMERS);
SETUP_ENV_VAR(CHPL_MEM);
SETUP_ENV_VAR(CHPL_MAKE);
SETUP_ENV_VAR(CHPL_ATOMICS);
SETUP_ENV_VAR(CHPL_NETWORK_ATOMICS);
SETUP_ENV_VAR(CHPL_GMP);
SETUP_ENV_VAR(CHPL_HWLOC);
SETUP_ENV_VAR(CHPL_REGEXP);
SETUP_ENV_VAR(CHPL_WIDE_POINTERS);
SETUP_ENV_VAR(CHPL_LLVM);
SETUP_ENV_VAR(CHPL_AUX_FILESYS);
}
//
// Can't rely on a variable initialization order for globals, so any
// variables that need to be initialized in a particular order go here
//
static void setupOrderedGlobals(const char* argv0) {
// Set up CHPL_HOME first
setupChplHome(argv0);
// Then CHPL_* variables
setupEnvVars();
// These depend on the environment variables being set
fLocal = !strcmp(CHPL_COMM, "none");
bool gotPGI = !strcmp(CHPL_TARGET_COMPILER, "pgi")
|| !strcmp(CHPL_TARGET_COMPILER, "cray-prgenv-pgi");
// conservatively how much is needed for the current PGI compiler
if (gotPGI) fMaxCIdentLen = 1020;
if( 0 == strcmp(CHPL_WIDE_POINTERS, "struct") ) {
widePointersStruct = true;
} else {
widePointersStruct = false;
}
}
// NOTE: We are leaking memory here by dropping astr() results on the ground.
static void recordCodeGenStrings(int argc, char* argv[]) {
compileCommand = astr("chpl ");
// WARNING: This does not handle arbitrary sequences of escaped characters
// in string arguments
for (int i = 1; i < argc; i++) {
char *arg = argv[i];
// Handle " and \" in strings
while (char *dq = strchr(arg, '"')) {
char targ[strlen(argv[i])+4];
memcpy(targ, arg, dq-arg);
if ((dq==argv[i]) || ((dq!=argv[i]) && (*(dq-1)!='\\'))) {
targ[dq-arg] = '\\';
targ[dq-arg+1] = '"';
targ[dq-arg+2] = '\0';
} else {
targ[dq-arg] = '"';
targ[dq-arg+1] = '\0';
}
arg = dq+1;
compileCommand = astr(compileCommand, targ);
if (arg == NULL) break;
}
if (arg)
compileCommand = astr(compileCommand, arg, " ");
}
get_version(compileVersion);
}
static void setStaticLink(const ArgumentState* state, const char* arg_unused) {
if (strcmp(CHPL_TARGET_PLATFORM, "darwin") == 0) {
USR_WARN("Static compilation is not supported on OS X, ignoring flag.");
fLinkStyle = LS_DEFAULT;
} else {
fLinkStyle = LS_STATIC;
}
}
static void setDynamicLink(const ArgumentState* state, const char* arg_unused) {
fLinkStyle = LS_DYNAMIC;
}
static void setChapelDebug(const ArgumentState* state, const char* arg_unused) {
printCppLineno = true;
}
// In order to handle accumulating ccflags arguments, the argument
// processing calls this function. This function appends the flags
// to the ccflags variable, so that multiple --ccflags arguments
// all end up together in the ccflags variable (and will end up
// being passed to the backend C compiler).
static void setCCFlags(const ArgumentState* state, const char* arg) {
// Append arg to the end of ccflags.
int curlen = strlen(ccflags);
int space = sizeof(ccflags) - curlen - 1 - 1; // room for ' ' and \0
int arglen = strlen(arg);
if( arglen <= space ) {
// add a space if there are already arguments here
if( curlen != 0 ) ccflags[curlen++] = ' ';
memcpy(&ccflags[curlen], arg, arglen);
} else {
USR_FATAL("ccflags argument too long");
}
}
static void handleLibrary(const ArgumentState* state, const char* arg_unused) {
addLibInfo(astr("-l", libraryFilename));
}
static void handleLibPath(const ArgumentState* state, const char* arg_unused) {
addLibInfo(astr("-L", libraryFilename));
}
static void handleMake(const ArgumentState* state, const char* arg_unused) {
CHPL_MAKE = makeArgument;
}
static void handleIncDir(const ArgumentState* state, const char* arg_unused) {
addIncInfo(incFilename);
}
static void runCompilerInGDB(int argc, char* argv[]) {
const char* gdbCommandFilename = createDebuggerFile("gdb", argc, argv);
const char* command = astr("gdb -q ", argv[0]," -x ", gdbCommandFilename);
int status = mysystem(command, "running gdb", false);
clean_exit(status);
}
static void runCompilerInLLDB(int argc, char* argv[]) {
const char* lldbCommandFilename = createDebuggerFile("lldb", argc, argv);
const char* command = astr("lldb -s ", lldbCommandFilename, " ", argv[0]);
int status = mysystem(command, "running lldb", false);
clean_exit(status);
}
static void readConfig(const ArgumentState* state, const char* arg_unused) {
// Expect arg_unused to be a string of either of these forms:
// 1. name=value -- set the config param "name" to "value"
// 2. name -- set the boolean config param "name" to NOT("name")
// if name is not type bool, set it to 0.
char *name = strdup(arg_unused);
char *value;
value = strstr(name, "=");
if (value) {
*value = '\0';
value++;
if (value[0]) {
// arg_unused was name=value
parseCmdLineConfig(name, value);
} else {
// arg_unused was name= <blank>
USR_FATAL("Missing config param value");
}
} else {
// arg_unused was just name
parseCmdLineConfig(name, "");
}
}
static void addModulePath(const ArgumentState* state, const char* newpath) {
addFlagModulePath(newpath);
}
static void noteCppLinesSet(const ArgumentState* state, const char* unused) {
userSetCppLineno = true;
}
static void verifySaveCDir(const ArgumentState* state, const char* unused) {
if (saveCDir[0] == '-') {
USR_FATAL("--savec takes a directory name as its argument\n"
" (you specified '%s', assumed to be another flag)",
saveCDir);
}
}
static void turnOffChecks(const ArgumentState* state, const char* unused) {
fNoNilChecks = true;
fNoBoundsChecks = true;
fNoLocalChecks = true;
fNoStackChecks = true;
fNoCastChecks = true;
}
static void handleStackCheck(const ArgumentState* state, const char* unused) {
if (!fNoStackChecks && strcmp(CHPL_TASKS, "massivethreads") == 0) {
USR_WARN("CHPL_TASKS=%s cannot do stack checks.", CHPL_TASKS);
}
}
static void handleTaskTracking(const ArgumentState* state, const char* unused) {
if (fEnableTaskTracking && strcmp(CHPL_TASKS, "fifo") != 0) {
USR_WARN("Enabling task tracking with CHPL_TASKS=%s has no effect other than to slow down compilation", CHPL_TASKS);
}
}
static void setFastFlag(const ArgumentState* state, const char* unused) {
//
// Enable all compiler optimizations, disable all runtime checks
//
fBaseline = false;
// don't set fieeefloat since it can change program behavior.
// instead, we rely on the backend C compiler to choose
// an appropriate level of optimization.
fNoCopyPropagation = false;
fNoDeadCodeElimination = false;
fNoRemoveWrapRecords = false;
fNoFastFollowers = false;
fNoloopInvariantCodeMotion= false;
fNoInline = false;
fNoInlineIterators = false;
fNoOptimizeLoopIterators = false;
fNoVectorize = false;
fNoLiveAnalysis = false;
fNoRemoteValueForwarding = false;
fNoRemoveCopyCalls = false;
fNoScalarReplacement = false;
fNoTupleCopyOpt = false;
fNoPrivatization = false;
fNoChecks = true;
fNoBoundsChecks = true;
fNoLocalChecks = true;
fIgnoreLocalClasses = false;
fNoNilChecks = true;
fNoStackChecks = true;
fNoCastChecks = true;
fNoOptimizeOnClauses = false;
optimizeCCode = true;
specializeCCode = true;
}
static void setFloatOptFlag(const ArgumentState* state, const char* unused) {
// It would be nicer if arg.cpp could handle
// 3-value variables like this (set to false, set to true, not set)
// But if this is the only such case, having a set function is an OK plan.
// ffloatOpt defaults to 0 -> backend default
if( fieeefloat ) {
// IEEE strict
ffloatOpt = -1;
} else {
// lax IEEE, optimize
ffloatOpt = 1;
}
}
static void setBaselineFlag(const ArgumentState* state, const char* unused) {
//
// disable all chapel compiler optimizations
//
fBaseline = true;
fNoCopyPropagation = true;
fNoDeadCodeElimination = true;
fNoRemoveWrapRecords = true;
fNoFastFollowers = true;
fNoloopInvariantCodeMotion = true;
fNoInline = true;
fNoInlineIterators = true;
fNoLiveAnalysis = true;
fNoOptimizeLoopIterators = true;
fNoVectorize = true;
fNoRemoteValueForwarding = true;
fNoRemoveCopyCalls = true;
fNoScalarReplacement = true;
fNoTupleCopyOpt = true;
fNoPrivatization = true;
fNoOptimizeOnClauses = true;
fIgnoreLocalClasses = true;
fConditionalDynamicDispatchLimit = 0;
}
static void setCacheEnable(const ArgumentState* state, const char* unused) {
const char *val = fCacheRemote ? "true" : "false";
parseCmdLineConfig("CHPL_CACHE_REMOTE", val);
}
static void setHtmlUser(const ArgumentState* state, const char* unused) {
fdump_html = true;
fdump_html_include_system_modules = false;
}
static void setWarnTupleIteration(const ArgumentState* state, const char* unused) {
const char *val = fNoWarnTupleIteration ? "false" : "true";
parseCmdLineConfig("CHPL_WARN_TUPLE_ITERATION", astr("\"", val, "\""));
}
static void setWarnDomainLiteral(const ArgumentState* state, const char* unused) {
const char *val = fNoWarnDomainLiteral ? "false" : "true";
parseCmdLineConfig("CHPL_WARN_DOMAIN_LITERAL", astr("\"", val, "\""));
}
static void setWarnSpecial(const ArgumentState* state, const char* unused) {
fNoWarnSpecial = false;
fNoWarnDomainLiteral = false;
setWarnDomainLiteral(state, unused);
fNoWarnTupleIteration = false;
setWarnTupleIteration(state, unused);
}
static void setPrintPassesFile(const ArgumentState* state, const char* fileName) {
printPassesFile = fopen(fileName, "w");
if(printPassesFile == NULL) {
USR_WARN("Error opening printPassesFile: %s.", fileName);
}
}
/*
Flag types:
I = int
P = path
S = string
D = double
f = set to false
F = set to true
+ = increment
T = toggle
L = int64 (long)
N = --no-... flag, --no version sets to false
n = --no-... flag, --no version sets to true
Record components:
{"long option" (or "" for separators), 'short option', "description of option argument(s), if any", "option description", "option type", &affectedVariable, "environment variable name", setter_function},
*/
static ArgumentDescription arg_desc[] = {
{"", ' ', NULL, "Module Processing Options", NULL, NULL, NULL, NULL},
{"count-tokens", ' ', NULL, "[Don't] count tokens in main modules", "N", &countTokens, "CHPL_COUNT_TOKENS", NULL},
{"main-module", ' ', "<module>", "Specify entry point module", "S256", mainModuleName, NULL, NULL},
{"module-dir", 'M', "<directory>", "Add directory to module search path", "P", moduleSearchPath, NULL, addModulePath},
{"print-code-size", ' ', NULL, "[Don't] print code size of main modules", "N", &printTokens, "CHPL_PRINT_TOKENS", NULL},
{"print-module-files", ' ', NULL, "Print module file locations", "F", &printModuleFiles, NULL, NULL},
{"print-search-dirs", ' ', NULL, "[Don't] print module search path", "N", &printSearchDirs, "CHPL_PRINT_SEARCH_DIRS", NULL},
{"", ' ', NULL, "Parallelism Control Options", NULL, NULL, NULL, NULL},
{"local", ' ', NULL, "Target one [many] locale[s]", "N", &fLocal, "CHPL_LOCAL", NULL},
{"", ' ', NULL, "Optimization Control Options", NULL, NULL, NULL, NULL},
{"baseline", ' ', NULL, "Disable all Chapel optimizations", "F", &fBaseline, "CHPL_BASELINE", setBaselineFlag},
{"cache-remote", ' ', NULL, "Enable cache for remote data (must be enabled specifically)", "F", &fCacheRemote, "CHPL_CACHE_REMOTE", setCacheEnable},
{"conditional-dynamic-dispatch-limit", ' ', "<limit>", "Set limit on # of inline conditionals used for dynamic dispatch", "I", &fConditionalDynamicDispatchLimit, "CHPL_CONDITIONAL_DYNAMIC_DISPATCH_LIMIT", NULL},
{"copy-propagation", ' ', NULL, "Enable [disable] copy propagation", "n", &fNoCopyPropagation, "CHPL_DISABLE_COPY_PROPAGATION", NULL},
{"dead-code-elimination", ' ', NULL, "Enable [disable] dead code elimination", "n", &fNoDeadCodeElimination, "CHPL_DISABLE_DEAD_CODE_ELIMINATION", NULL},
{"fast", ' ', NULL, "Use fast default settings", "F", &fFastFlag, "CHPL_FAST", setFastFlag},
{"fast-followers", ' ', NULL, "Enable [disable] fast followers", "n", &fNoFastFollowers, "CHPL_DISABLE_FAST_FOLLOWERS", NULL},
{"ieee-float", ' ', NULL, "Generate code that is strict [lax] with respect to IEEE compliance", "N", &fieeefloat, "CHPL_IEEE_FLOAT", setFloatOptFlag},
{"ignore-local-classes", ' ', NULL, "Disable [enable] local classes", "N", &fIgnoreLocalClasses, NULL, NULL},
{"inline", ' ', NULL, "Enable [disable] function inlining", "n", &fNoInline, NULL, NULL},
{"inline-iterators", ' ', NULL, "Enable [disable] iterator inlining", "n", &fNoInlineIterators, "CHPL_DISABLE_INLINE_ITERATORS", NULL},
{"live-analysis", ' ', NULL, "Enable [disable] live variable analysis", "n", &fNoLiveAnalysis, "CHPL_DISABLE_LIVE_ANALYSIS", NULL},
{"loop-invariant-code-motion", ' ', NULL, "Enable [disable] loop invariant code motion", "n", &fNoloopInvariantCodeMotion, NULL, NULL},
{"optimize-loop-iterators", ' ', NULL, "Enable [disable] optimization of iterators composed of a single loop", "n", &fNoOptimizeLoopIterators, "CHPL_DISABLE_OPTIMIZE_LOOP_ITERATORS", NULL},
{"optimize-on-clauses", ' ', NULL, "Enable [disable] optimization of on clauses", "n", &fNoOptimizeOnClauses, "CHPL_DISABLE_OPTIMIZE_ON_CLAUSES", NULL},
{"optimize-on-clause-limit", ' ', "<limit>", "Limit recursion depth of on clause optimization search", "I", &optimize_on_clause_limit, "CHPL_OPTIMIZE_ON_CLAUSE_LIMIT", NULL},
{"privatization", ' ', NULL, "Enable [disable] privatization of distributed arrays and domains", "n", &fNoPrivatization, "CHPL_DISABLE_PRIVATIZATION", NULL},
{"remote-value-forwarding", ' ', NULL, "Enable [disable] remote value forwarding", "n", &fNoRemoteValueForwarding, "CHPL_DISABLE_REMOTE_VALUE_FORWARDING", NULL},
{"remove-copy-calls", ' ', NULL, "Enable [disable] remove copy calls", "n", &fNoRemoveCopyCalls, "CHPL_DISABLE_REMOVE_COPY_CALLS", NULL},
{"remove-wrap-records", ' ', NULL, "Enable [disable] wrap record removal", "n", &fNoRemoveWrapRecords, "CHPL_REMOVE_WRAP_RECORDS", NULL},
{"scalar-replacement", ' ', NULL, "Enable [disable] scalar replacement", "n", &fNoScalarReplacement, "CHPL_DISABLE_SCALAR_REPLACEMENT", NULL},
{"scalar-replace-limit", ' ', "<limit>", "Limit on the size of tuples being replaced during scalar replacement", "I", &scalar_replace_limit, "CHPL_SCALAR_REPLACE_TUPLE_LIMIT", NULL},
{"tuple-copy-opt", ' ', NULL, "Enable [disable] tuple (memcpy) optimization", "n", &fNoTupleCopyOpt, "CHPL_DISABLE_TUPLE_COPY_OPT", NULL},
{"tuple-copy-limit", ' ', "<limit>", "Limit on the size of tuples considered for optimization", "I", &tuple_copy_limit, "CHPL_TUPLE_COPY_LIMIT", NULL},
{"use-noinit", ' ', NULL, "Enable [disable] ability to skip default initialization through the keyword noinit", "N", &fUseNoinit, NULL, NULL},
{"vectorize", ' ', NULL, "Enable [disable] generation of vectorization hints", "n", &fNoVectorize, "CHPL_DISABLE_VECTORIZATION", NULL},
{"", ' ', NULL, "Run-time Semantic Check Options", NULL, NULL, NULL, NULL},
{"no-checks", ' ', NULL, "Disable all following run-time checks", "F", &fNoChecks, "CHPL_NO_CHECKS", turnOffChecks},
{"bounds-checks", ' ', NULL, "Enable [disable] bounds checking", "n", &fNoBoundsChecks, "CHPL_NO_BOUNDS_CHECKING", NULL},
{"local-checks", ' ', NULL, "Enable [disable] local block checking", "n", &fNoLocalChecks, NULL, NULL},
{"nil-checks", ' ', NULL, "Enable [disable] nil checking", "n", &fNoNilChecks, "CHPL_NO_NIL_CHECKS", NULL},
{"stack-checks", ' ', NULL, "Enable [disable] stack overflow checking", "n", &fNoStackChecks, "CHPL_STACK_CHECKS", handleStackCheck},
{"cast-checks", ' ', NULL, "Enable [disable] checks in safeCast calls", "n", &fNoCastChecks, NULL, NULL},
{"", ' ', NULL, "C Code Generation Options", NULL, NULL, NULL, NULL},
{"codegen", ' ', NULL, "[Don't] Do code generation", "n", &no_codegen, "CHPL_NO_CODEGEN", NULL},
{"cpp-lines", ' ', NULL, "[Don't] Generate #line annotations", "N", &printCppLineno, "CHPL_CG_CPP_LINES", noteCppLinesSet},
{"max-c-ident-len", ' ', NULL, "Maximum length of identifiers in generated code, 0 for unlimited", "I", &fMaxCIdentLen, "CHPL_MAX_C_IDENT_LEN", NULL},
{"munge-user-idents", ' ', NULL, "[Don't] Munge user identifiers to avoid naming conflicts with external code", "N", &fMungeUserIdents, "CHPL_MUNGE_USER_IDENTS"},
{"savec", ' ', "<directory>", "Save generated C code in directory", "P", saveCDir, "CHPL_SAVEC_DIR", verifySaveCDir},
{"", ' ', NULL, "C Code Compilation Options", NULL, NULL, NULL, NULL},
{"ccflags", ' ', "<flags>", "Back-end C compiler flags", "S", NULL, "CHPL_CC_FLAGS", setCCFlags},
{"debug", 'g', NULL, "[Don't] Support debugging of generated C code", "N", &debugCCode, "CHPL_DEBUG", setChapelDebug},
{"dynamic", ' ', NULL, "Generate a dynamically linked binary", "F", &fLinkStyle, NULL, setDynamicLink},
{"hdr-search-path", 'I', "<directory>", "C header search path", "P", incFilename, NULL, handleIncDir},
{"ldflags", ' ', "<flags>", "Back-end C linker flags", "S256", ldflags, "CHPL_LD_FLAGS", NULL},
{"lib-linkage", 'l', "<library>", "C library linkage", "P", libraryFilename, "CHPL_LIB_NAME", handleLibrary},
{"lib-search-path", 'L', "<directory>", "C library search path", "P", libraryFilename, "CHPL_LIB_PATH", handleLibPath},
{"make", ' ', "<make utility>", "Make utility for generated code", "S256", makeArgument, "CHPL_MAKE", handleMake},
{"optimize", 'O', NULL, "[Don't] Optimize generated C code", "N", &optimizeCCode, "CHPL_OPTIMIZE", NULL},
{"specialize", ' ', NULL, "[Don't] Specialize generated C code for CHPL_TARGET_ARCH", "N", &specializeCCode, "CHPL_SPECIALIZE", NULL},
{"output", 'o', "<filename>", "Name output executable", "P", executableFilename, "CHPL_EXE_NAME", NULL},
{"static", ' ', NULL, "Generate a statically linked binary", "F", &fLinkStyle, NULL, setStaticLink},
{"", ' ', NULL, "LLVM Code Generation Options", NULL, NULL, NULL, NULL},
{"llvm", ' ', NULL, "[Don't] use the LLVM code generator", "N", &llvmCodegen, "CHPL_LLVM_CODEGEN", NULL},
{"llvm-wide-opt", ' ', NULL, "Enable [disable] LLVM wide pointer optimizations", "N", &fLLVMWideOpt, "CHPL_LLVM_WIDE_OPTS", NULL},
{"", ' ', NULL, "Compilation Trace Options", NULL, NULL, NULL, NULL},
{"print-commands", ' ', NULL, "[Don't] print system commands", "N", &printSystemCommands, "CHPL_PRINT_COMMANDS", NULL},
{"print-passes", ' ', NULL, "[Don't] print compiler passes", "N", &printPasses, "CHPL_PRINT_PASSES", NULL},
{"print-passes-file", ' ', "<filename>", "Print compiler passes to <filename>", "S", NULL, "CHPL_PRINT_PASSES_FILE", setPrintPassesFile},
{"", ' ', NULL, "Miscellaneous Options", NULL, NULL, NULL, NULL},
// Support for extern { c-code-here } blocks could be toggled with this
// flag, but instead we just leave it on if the compiler can do it.
// {"extern-c", ' ', NULL, "Enable [disable] extern C block support", "f", &externC, "CHPL_EXTERN_C", NULL},
DRIVER_ARG_DEVELOPER,
{"explain-call", ' ', "<call>[:<module>][:<line>]", "Explain resolution of call", "S256", fExplainCall, NULL, NULL},
{"explain-instantiation", ' ', "<function|type>[:<module>][:<line>]", "Explain instantiation of type", "S256", fExplainInstantiation, NULL, NULL},
{"explain-verbose", ' ', NULL, "Enable [disable] tracing of disambiguation with 'explain' options", "N", &fExplainVerbose, "CHPL_EXPLAIN_VERBOSE", NULL},
{"instantiate-max", ' ', "<max>", "Limit number of instantiations", "I", &instantiation_limit, "CHPL_INSTANTIATION_LIMIT", NULL},
{"print-callstack-on-error", ' ', NULL, "print the Chapel call stack leading to each error or warning", "N", &fPrintCallStackOnError, "CHPL_PRINT_CALLSTACK_ON_ERROR", NULL},
{"set", 's', "<name>[=<value>]", "Set config param value", "S", NULL, NULL, readConfig},
{"task-tracking", ' ', NULL, "Enable [disable] runtime task tracking", "N", &fEnableTaskTracking, "CHPL_TASK_TRACKING", handleTaskTracking},
{"warn-const-loops", ' ', NULL, "Enable [disable] warnings for some 'while' loops with constant conditions", "N", &fWarnConstLoops, "CHPL_WARN_CONST_LOOPS", NULL},
{"warn-special", ' ', NULL, "Enable [disable] special warnings", "n", &fNoWarnSpecial, "CHPL_WARN_SPECIAL", setWarnSpecial},
{"warn-domain-literal", ' ', NULL, "Enable [disable] old domain literal syntax warnings", "n", &fNoWarnDomainLiteral, "CHPL_WARN_DOMAIN_LITERAL", setWarnDomainLiteral},
{"warn-tuple-iteration", ' ', NULL, "Enable [disable] warnings for tuple iteration", "n", &fNoWarnTupleIteration, "CHPL_WARN_TUPLE_ITERATION", setWarnTupleIteration},
{"no-warnings", ' ', NULL, "Disable output of warnings", "F", &ignore_warnings, "CHPL_DISABLE_WARNINGS", NULL},
{"", ' ', NULL, "Compiler Information Options", NULL, NULL, NULL, NULL},
DRIVER_ARG_COPYRIGHT,
DRIVER_ARG_HELP,
DRIVER_ARG_HELP_ENV,
DRIVER_ARG_HELP_SETTINGS,
DRIVER_ARG_LICENSE,
DRIVER_ARG_VERSION,
{"", ' ', NULL, "Developer Flags -- Debug Output", NULL, NULL, NULL, NULL},
{"cc-warnings", ' ', NULL, "[Don't] Give warnings for generated code", "N", &ccwarnings, "CHPL_CC_WARNINGS", NULL},
{"c-line-numbers", ' ', NULL, "Use C code line numbers and filenames", "F", &fCLineNumbers, NULL, NULL},
{"gen-ids", ' ', NULL, "[Don't] pepper generated code with BaseAST::ids", "N", &fGenIDS, "CHPL_GEN_IDS", NULL},
{"html", 't', NULL, "Dump IR in HTML format (toggle)", "T", &fdump_html, "CHPL_HTML", NULL},
{"html-user", ' ', NULL, "Dump IR in HTML for user module(s) only (toggle)", "T", &fdump_html, "CHPL_HTML_USER", setHtmlUser},
{"html-wrap-lines", ' ', NULL, "[Don't] allow wrapping lines in HTML dumps", "N", &fdump_html_wrap_lines, "CHPL_HTML_WRAP_LINES", NULL},
{"html-print-block-ids", ' ', NULL, "[Don't] print block IDs in HTML dumps", "N", &fdump_html_print_block_IDs, "CHPL_HTML_PRINT_BLOCK_IDS", NULL},
{"html-chpl-home", ' ', NULL, "Path to use instead of CHPL_HOME in HTML dumps", "P", fdump_html_chpl_home, "CHPL_HTML_CHPL_HOME", NULL},
{"log", 'd', "<letters>", "Dump IR in text format. See runpasses.cpp for definition of <letters>. Empty argument (\"-d=\" or \"--log=\") means \"log all passes\"", "S512", log_flags, "CHPL_LOG_FLAGS", log_flags_arg},
{"log-dir", ' ', "<path>", "Specify log directory", "P", log_dir, "CHPL_LOG_DIR", NULL},
{"log-ids", ' ', NULL, "[Don't] include BaseAST::ids in log files", "N", &fLogIds, "CHPL_LOG_IDS", NULL},
{"log-module", ' ', "<module-name>", "Restrict IR dump to the named module", "S256", log_module, "CHPL_LOG_MODULE", NULL},
// {"log-symbol", ' ', "<symbol-name>", "Restrict IR dump to the named symbol(s)", "S256", log_symbol, "CHPL_LOG_SYMBOL", NULL}, // This doesn't work yet.
{"verify", ' ', NULL, "Run consistency checks during compilation", "N", &fVerify, "CHPL_VERIFY", NULL},
{"parser-debug", 'D', NULL, "Set parser debug level", "+", &debugParserLevel, "CHPL_PARSER_DEBUG", NULL},
{"debug-short-loc", ' ', NULL, "Display long [short] location in certain debug outputs", "N", &debugShortLoc, "CHPL_DEBUG_SHORT_LOC", NULL},
{"print-emitted-code-size", ' ', NULL, "Print emitted code size", "F", &fPrintEmittedCodeSize, NULL, NULL},
{"print-module-resolution", ' ', NULL, "Print name of module being resolved", "F", &fPrintModuleResolution, "CHPL_PRINT_MODULE_RESOLUTION", NULL},
{"print-dispatch", ' ', NULL, "Print dynamic dispatch table", "F", &fPrintDispatch, NULL, NULL},
{"print-statistics", ' ', "[n|k|t]", "Print AST statistics", "S256", fPrintStatistics, NULL, NULL},
{"report-inlining", ' ', NULL, "Print inlined functions", "F", &report_inlining, NULL, NULL},
{"report-dead-blocks", ' ', NULL, "Print dead block removal stats", "F", &fReportDeadBlocks, NULL, NULL},
{"report-dead-modules", ' ', NULL, "Print dead module removal stats", "F", &fReportDeadModules, NULL, NULL},
{"report-optimized-loop-iterators", ' ', NULL, "Print stats on optimized single loop iterators", "F", &fReportOptimizedLoopIterators, NULL, NULL},
{"report-order-independent-loops", ' ', NULL, "Print stats on order independent loops", "F", &fReportOrderIndependentLoops, NULL, NULL},
{"report-optimized-on", ' ', NULL, "Print information about on clauses that have been optimized for potential fast remote fork operation", "F", &fReportOptimizedOn, NULL, NULL},
{"report-promotion", ' ', NULL, "Print information about scalar promotion", "F", &fReportPromotion, NULL, NULL},
{"report-scalar-replace", ' ', NULL, "Print scalar replacement stats", "F", &fReportScalarReplace, NULL, NULL},
{"", ' ', NULL, "Developer Flags -- Miscellaneous", NULL, NULL, NULL, NULL},
{"break-on-id", ' ', NULL, "Break when AST id is created", "I", &breakOnID, "CHPL_BREAK_ON_ID", NULL},
{"break-on-delete-id", ' ', NULL, "Break when AST id is deleted", "I", &breakOnDeleteID, "CHPL_BREAK_ON_DELETE_ID", NULL},
{"break-on-codegen", ' ', NULL, "Break when function cname is code generated", "S256", &breakOnCodegenCname, "CHPL_BREAK_ON_CODEGEN", NULL},
{"default-dist", ' ', "<distribution>", "Change the default distribution", "S256", defaultDist, "CHPL_DEFAULT_DIST", NULL},
{"explain-call-id", ' ', "<call-id>", "Explain resolution of call by ID", "I", &explainCallID, NULL, NULL},
{"break-on-resolve-id", ' ', NULL, "Break when function call with AST id is resolved", "I", &breakOnResolveID, "CHPL_BREAK_ON_RESOLVE_ID", NULL},
DRIVER_ARG_DEBUGGERS,
{"heterogeneous", ' ', NULL, "Compile for heterogeneous nodes", "F", &fHeterogeneous, "", NULL},
{"ignore-errors", ' ', NULL, "[Don't] attempt to ignore errors", "N", &ignore_errors, "CHPL_IGNORE_ERRORS", NULL},
{"ignore-errors-for-pass", ' ', NULL, "[Don't] attempt to ignore errors until the end of the pass in which they occur", "N", &ignore_errors_for_pass, "CHPL_IGNORE_ERRORS_FOR_PASS", NULL},
{"library", ' ', NULL, "Generate a Chapel library file", "F", &fLibraryCompile, NULL, NULL},
{"localize-global-consts", ' ', NULL, "Enable [disable] optimization of global constants", "n", &fNoGlobalConstOpt, "CHPL_DISABLE_GLOBAL_CONST_OPT", NULL},
{"local-temp-names", ' ', NULL, "[Don't] Generate locally-unique temp names", "N", &localTempNames, "CHPL_LOCAL_TEMP_NAMES", NULL},
{"log-deleted-ids-to", ' ', "<filename>", "Log AST id and memory address of each deleted node to the specified file", "P", deletedIdFilename, "CHPL_DELETED_ID_FILENAME", NULL},
{"memory-frees", ' ', NULL, "Enable [disable] memory frees in the generated code", "n", &fNoMemoryFrees, "CHPL_DISABLE_MEMORY_FREES", NULL},
{"preserve-inlined-line-numbers", ' ', NULL, "[Don't] Preserve file names/line numbers in inlined code", "N", &preserveInlinedLineNumbers, "CHPL_PRESERVE_INLINED_LINE_NUMBERS", NULL},
{"print-id-on-error", ' ', NULL, "[Don't] print AST id in error messages", "N", &fPrintIDonError, "CHPL_PRINT_ID_ON_ERROR", NULL},
{"remove-empty-records", ' ', NULL, "Enable [disable] empty record removal", "n", &fNoRemoveEmptyRecords, "CHPL_DISABLE_REMOVE_EMPTY_RECORDS", NULL},
{"remove-unreachable-blocks", ' ', NULL, "[Don't] remove unreachable blocks after resolution", "N", &fRemoveUnreachableBlocks, "CHPL_REMOVE_UNREACHABLE_BLOCKS", NULL},
{"minimal-modules", ' ', NULL, "Enable [disable] using minimal modules", "N", &fMinimalModules, "CHPL_MINIMAL_MODULES", NULL},
DRIVER_ARG_PRINT_CHPL_HOME,
DRIVER_ARG_LAST
};
static ArgumentState sArgState = {
0,
0,
"program",
"path",
NULL
};
static void setupDependentVars() {
if (developer && !userSetCppLineno) {
printCppLineno = false;
}
#ifndef HAVE_LLVM
if (llvmCodegen)
USR_FATAL("This compiler was built without LLVM support");
#endif
if (specializeCCode && (strcmp(CHPL_TARGET_ARCH, "unknown") == 0)) {
USR_WARN("--specialize was set, but CHPL_TARGET_ARCH is 'unknown'. If "
"you want any specialization to occur please set CHPL_TARGET_ARCH "
"to a proper value.");
}
}
static void printStuff(const char* argv0) {
bool shouldExit = false;
bool printedSomething = false;
if (fPrintVersion) {
fprintf(stdout, "%s Version %s\n", sArgState.program_name, compileVersion);
fPrintCopyright = true;
printedSomething = true;
shouldExit = true;
}
if (fPrintLicense) {
fprintf(stdout,
#include "LICENSE"
);
fPrintCopyright = false;
shouldExit = true;
printedSomething = true;
}
if (fPrintCopyright) {
fprintf(stdout,
#include "COPYRIGHT"
);
printedSomething = true;
}
if( fPrintChplHome ) {
char* guess = findProgramPath(argv0);
printf("%s\t%s\n", CHPL_HOME, guess);
free(guess);
printedSomething = true;
}
if (fPrintHelp || (!printedSomething && sArgState.nfile_arguments < 1)) {
if (printedSomething) printf("\n");
usage(&sArgState, !fPrintHelp, fPrintEnvHelp, fPrintSettingsHelp);
shouldExit = true;
printedSomething = true;
}
if (printedSomething && sArgState.nfile_arguments < 1) {
shouldExit = true;
}
if (shouldExit) {
clean_exit(0);
}
}
int main(int argc, char* argv[]) {
PhaseTracker tracker;
startCatchingSignals();
{
astlocMarker markAstLoc(0, "<internal>");
tracker.StartPhase("init");
init_args(&sArgState, argv[0]);
fDocs = (strcmp(sArgState.program_name, "chpldoc") == 0) ? true : false;
fUseIPE = (strcmp(sArgState.program_name, "chpl-ipe") == 0) ? true : false;
// Initialize the arguments for argument state. If chpldoc, use the docs
// specific arguments. Otherwise, use the regular arguments.
if (fDocs) {
init_arg_desc(&sArgState, docs_arg_desc);
} else {
init_arg_desc(&sArgState, arg_desc);
}
initFlags();
initRootModule();
initPrimitive();
initPrimitiveTypes();
DefExpr* objectClass = defineObjectClass();
initChplProgram(objectClass);
initStringLiteralModule();
setupOrderedGlobals(argv[0]);
process_args(&sArgState, argc, argv);
initCompilerGlobals(); // must follow argument parsing
setupDependentVars();
setupModulePaths();
recordCodeGenStrings(argc, argv);
} // astlocMarker scope
if (fUseIPE == false)
printStuff(argv[0]);
if (fRungdb)
runCompilerInGDB(argc, argv);
if (fRunlldb)
runCompilerInLLDB(argc, argv);
addSourceFiles(sArgState.nfile_arguments, sArgState.file_argument);
if (fUseIPE == false) {
runPasses(tracker, fDocs);
} else {
ipeRun();
}
tracker.StartPhase("driverCleanup");
free_args(&sArgState);
tracker.Stop();
if (printPasses == true || printPassesFile != NULL) {
tracker.ReportPass();
tracker.ReportTotal();
tracker.ReportRollup();
}
if (printPassesFile != NULL) {
fclose(printPassesFile);
}
clean_exit(0);
return 0;
}
|
apache-2.0
|
JingchengDu/hbase
|
hbase-server/src/main/java/org/apache/hadoop/hbase/io/hfile/HFileWriterImpl.java
|
32336
|
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package org.apache.hadoop.hbase.io.hfile;
import java.io.DataOutput;
import java.io.DataOutputStream;
import java.io.IOException;
import java.net.InetSocketAddress;
import java.nio.ByteBuffer;
import java.util.ArrayList;
import java.util.List;
import org.apache.commons.logging.Log;
import org.apache.commons.logging.LogFactory;
import org.apache.hadoop.conf.Configuration;
import org.apache.hadoop.fs.FSDataOutputStream;
import org.apache.hadoop.fs.FileSystem;
import org.apache.hadoop.fs.Path;
import org.apache.hadoop.fs.permission.FsPermission;
import org.apache.hadoop.hbase.ByteBufferCell;
import org.apache.hadoop.hbase.Cell;
import org.apache.hadoop.hbase.CellComparator;
import org.apache.hadoop.hbase.CellUtil;
import org.apache.hadoop.hbase.HConstants;
import org.apache.hadoop.hbase.KeyValueUtil;
import org.apache.hadoop.hbase.CellComparator.MetaCellComparator;
import org.apache.yetus.audience.InterfaceAudience;
import org.apache.hadoop.hbase.io.compress.Compression;
import org.apache.hadoop.hbase.io.crypto.Encryption;
import org.apache.hadoop.hbase.io.encoding.DataBlockEncoding;
import org.apache.hadoop.hbase.io.hfile.HFile.FileInfo;
import org.apache.hadoop.hbase.io.hfile.HFileBlock.BlockWritable;
import org.apache.hadoop.hbase.security.EncryptionUtil;
import org.apache.hadoop.hbase.security.User;
import org.apache.hadoop.hbase.util.BloomFilterWriter;
import org.apache.hadoop.hbase.util.ByteBufferUtils;
import org.apache.hadoop.hbase.util.Bytes;
import org.apache.hadoop.hbase.util.FSUtils;
import org.apache.hadoop.io.Writable;
/**
* Common functionality needed by all versions of {@link HFile} writers.
*/
@InterfaceAudience.Private
public class HFileWriterImpl implements HFile.Writer {
private static final Log LOG = LogFactory.getLog(HFileWriterImpl.class);
private static final long UNSET = -1;
/** if this feature is enabled, preCalculate encoded data size before real encoding happens*/
public static final String UNIFIED_ENCODED_BLOCKSIZE_RATIO = "hbase.writer.unified.encoded.blocksize.ratio";
/** Block size limit after encoding, used to unify encoded block Cache entry size*/
private final int encodedBlockSizeLimit;
/** The Cell previously appended. Becomes the last cell in the file.*/
protected Cell lastCell = null;
/** FileSystem stream to write into. */
protected FSDataOutputStream outputStream;
/** True if we opened the <code>outputStream</code> (and so will close it). */
protected final boolean closeOutputStream;
/** A "file info" block: a key-value map of file-wide metadata. */
protected FileInfo fileInfo = new HFile.FileInfo();
/** Total # of key/value entries, i.e. how many times add() was called. */
protected long entryCount = 0;
/** Used for calculating the average key length. */
protected long totalKeyLength = 0;
/** Used for calculating the average value length. */
protected long totalValueLength = 0;
/** Total uncompressed bytes, maybe calculate a compression ratio later. */
protected long totalUncompressedBytes = 0;
/** Key comparator. Used to ensure we write in order. */
protected final CellComparator comparator;
/** Meta block names. */
protected List<byte[]> metaNames = new ArrayList<>();
/** {@link Writable}s representing meta block data. */
protected List<Writable> metaData = new ArrayList<>();
/**
* First cell in a block.
* This reference should be short-lived since we write hfiles in a burst.
*/
protected Cell firstCellInBlock = null;
/** May be null if we were passed a stream. */
protected final Path path;
/** Cache configuration for caching data on write. */
protected final CacheConfig cacheConf;
/**
* Name for this object used when logging or in toString. Is either
* the result of a toString on stream or else name of passed file Path.
*/
protected final String name;
/**
* The data block encoding which will be used.
* {@link NoOpDataBlockEncoder#INSTANCE} if there is no encoding.
*/
protected final HFileDataBlockEncoder blockEncoder;
protected final HFileContext hFileContext;
private int maxTagsLength = 0;
/** KeyValue version in FileInfo */
public static final byte [] KEY_VALUE_VERSION = Bytes.toBytes("KEY_VALUE_VERSION");
/** Version for KeyValue which includes memstore timestamp */
public static final int KEY_VALUE_VER_WITH_MEMSTORE = 1;
/** Inline block writers for multi-level block index and compound Blooms. */
private List<InlineBlockWriter> inlineBlockWriters = new ArrayList<>();
/** block writer */
protected HFileBlock.Writer blockWriter;
private HFileBlockIndex.BlockIndexWriter dataBlockIndexWriter;
private HFileBlockIndex.BlockIndexWriter metaBlockIndexWriter;
/** The offset of the first data block or -1 if the file is empty. */
private long firstDataBlockOffset = UNSET;
/** The offset of the last data block or 0 if the file is empty. */
protected long lastDataBlockOffset = UNSET;
/**
* The last(stop) Cell of the previous data block.
* This reference should be short-lived since we write hfiles in a burst.
*/
private Cell lastCellOfPreviousBlock = null;
/** Additional data items to be written to the "load-on-open" section. */
private List<BlockWritable> additionalLoadOnOpenData = new ArrayList<>();
protected long maxMemstoreTS = 0;
public HFileWriterImpl(final Configuration conf, CacheConfig cacheConf, Path path,
FSDataOutputStream outputStream,
CellComparator comparator, HFileContext fileContext) {
this.outputStream = outputStream;
this.path = path;
this.name = path != null ? path.getName() : outputStream.toString();
this.hFileContext = fileContext;
DataBlockEncoding encoding = hFileContext.getDataBlockEncoding();
if (encoding != DataBlockEncoding.NONE) {
this.blockEncoder = new HFileDataBlockEncoderImpl(encoding);
} else {
this.blockEncoder = NoOpDataBlockEncoder.INSTANCE;
}
this.comparator = comparator != null? comparator: CellComparator.COMPARATOR;
closeOutputStream = path != null;
this.cacheConf = cacheConf;
float encodeBlockSizeRatio = conf.getFloat(UNIFIED_ENCODED_BLOCKSIZE_RATIO, 1f);
this.encodedBlockSizeLimit = (int)(hFileContext.getBlocksize() * encodeBlockSizeRatio);
finishInit(conf);
if (LOG.isTraceEnabled()) {
LOG.trace("Writer" + (path != null ? " for " + path : "") +
" initialized with cacheConf: " + cacheConf +
" comparator: " + comparator.getClass().getSimpleName() +
" fileContext: " + fileContext);
}
}
/**
* Add to the file info. All added key/value pairs can be obtained using
* {@link HFile.Reader#loadFileInfo()}.
*
* @param k Key
* @param v Value
* @throws IOException in case the key or the value are invalid
*/
@Override
public void appendFileInfo(final byte[] k, final byte[] v)
throws IOException {
fileInfo.append(k, v, true);
}
/**
* Sets the file info offset in the trailer, finishes up populating fields in
* the file info, and writes the file info into the given data output. The
* reason the data output is not always {@link #outputStream} is that we store
* file info as a block in version 2.
*
* @param trailer fixed file trailer
* @param out the data output to write the file info to
* @throws IOException
*/
protected final void writeFileInfo(FixedFileTrailer trailer, DataOutputStream out)
throws IOException {
trailer.setFileInfoOffset(outputStream.getPos());
finishFileInfo();
long startTime = System.currentTimeMillis();
fileInfo.write(out);
HFile.updateWriteLatency(System.currentTimeMillis() - startTime);
}
/**
* Checks that the given Cell's key does not violate the key order.
*
* @param cell Cell whose key to check.
* @return true if the key is duplicate
* @throws IOException if the key or the key order is wrong
*/
protected boolean checkKey(final Cell cell) throws IOException {
boolean isDuplicateKey = false;
if (cell == null) {
throw new IOException("Key cannot be null or empty");
}
if (lastCell != null) {
int keyComp = comparator.compareKeyIgnoresMvcc(lastCell, cell);
if (keyComp > 0) {
throw new IOException("Added a key not lexically larger than"
+ " previous. Current cell = " + cell + ", lastCell = " + lastCell);
} else if (keyComp == 0) {
isDuplicateKey = true;
}
}
return isDuplicateKey;
}
/** Checks the given value for validity. */
protected void checkValue(final byte[] value, final int offset,
final int length) throws IOException {
if (value == null) {
throw new IOException("Value cannot be null");
}
}
/**
* @return Path or null if we were passed a stream rather than a Path.
*/
@Override
public Path getPath() {
return path;
}
@Override
public String toString() {
return "writer=" + (path != null ? path.toString() : null) + ", name="
+ name + ", compression=" + hFileContext.getCompression().getName();
}
public static Compression.Algorithm compressionByName(String algoName) {
if (algoName == null)
return HFile.DEFAULT_COMPRESSION_ALGORITHM;
return Compression.getCompressionAlgorithmByName(algoName);
}
/** A helper method to create HFile output streams in constructors */
protected static FSDataOutputStream createOutputStream(Configuration conf,
FileSystem fs, Path path, InetSocketAddress[] favoredNodes) throws IOException {
FsPermission perms = FSUtils.getFilePermissions(fs, conf,
HConstants.DATA_FILE_UMASK_KEY);
return FSUtils.create(conf, fs, path, perms, favoredNodes);
}
/** Additional initialization steps */
protected void finishInit(final Configuration conf) {
if (blockWriter != null) {
throw new IllegalStateException("finishInit called twice");
}
blockWriter = new HFileBlock.Writer(blockEncoder, hFileContext);
// Data block index writer
boolean cacheIndexesOnWrite = cacheConf.shouldCacheIndexesOnWrite();
dataBlockIndexWriter = new HFileBlockIndex.BlockIndexWriter(blockWriter,
cacheIndexesOnWrite ? cacheConf : null,
cacheIndexesOnWrite ? name : null);
dataBlockIndexWriter.setMaxChunkSize(
HFileBlockIndex.getMaxChunkSize(conf));
dataBlockIndexWriter.setMinIndexNumEntries(
HFileBlockIndex.getMinIndexNumEntries(conf));
inlineBlockWriters.add(dataBlockIndexWriter);
// Meta data block index writer
metaBlockIndexWriter = new HFileBlockIndex.BlockIndexWriter();
if (LOG.isTraceEnabled()) LOG.trace("Initialized with " + cacheConf);
}
/**
* At a block boundary, write all the inline blocks and opens new block.
*
* @throws IOException
*/
protected void checkBlockBoundary() throws IOException {
//for encoder like prefixTree, encoded size is not available, so we have to compare both encoded size
//and unencoded size to blocksize limit.
if (blockWriter.encodedBlockSizeWritten() >= encodedBlockSizeLimit
|| blockWriter.blockSizeWritten() >= hFileContext.getBlocksize()) {
finishBlock();
writeInlineBlocks(false);
newBlock();
}
}
/** Clean up the data block that is currently being written.*/
private void finishBlock() throws IOException {
if (!blockWriter.isWriting() || blockWriter.blockSizeWritten() == 0) return;
// Update the first data block offset if UNSET; used scanning.
if (firstDataBlockOffset == UNSET) {
firstDataBlockOffset = outputStream.getPos();
}
// Update the last data block offset each time through here.
lastDataBlockOffset = outputStream.getPos();
blockWriter.writeHeaderAndData(outputStream);
int onDiskSize = blockWriter.getOnDiskSizeWithHeader();
Cell indexEntry =
getMidpoint(this.comparator, lastCellOfPreviousBlock, firstCellInBlock);
dataBlockIndexWriter.addEntry(CellUtil.getCellKeySerializedAsKeyValueKey(indexEntry),
lastDataBlockOffset, onDiskSize);
totalUncompressedBytes += blockWriter.getUncompressedSizeWithHeader();
if (cacheConf.shouldCacheDataOnWrite()) {
doCacheOnWrite(lastDataBlockOffset);
}
}
/**
* Try to return a Cell that falls between <code>left</code> and
* <code>right</code> but that is shorter; i.e. takes up less space. This
* trick is used building HFile block index. Its an optimization. It does not
* always work. In this case we'll just return the <code>right</code> cell.
*
* @param comparator
* Comparator to use.
* @param left
* @param right
* @return A cell that sorts between <code>left</code> and <code>right</code>.
*/
public static Cell getMidpoint(final CellComparator comparator, final Cell left,
final Cell right) {
// TODO: Redo so only a single pass over the arrays rather than one to
// compare and then a second composing midpoint.
if (right == null) {
throw new IllegalArgumentException("right cell can not be null");
}
if (left == null) {
return right;
}
// If Cells from meta table, don't mess around. meta table Cells have schema
// (table,startrow,hash) so can't be treated as plain byte arrays. Just skip
// out without trying to do this optimization.
if (comparator instanceof MetaCellComparator) {
return right;
}
int diff = comparator.compareRows(left, right);
if (diff > 0) {
throw new IllegalArgumentException("Left row sorts after right row; left="
+ CellUtil.getCellKeyAsString(left) + ", right=" + CellUtil.getCellKeyAsString(right));
}
byte[] midRow;
boolean bufferBacked = left instanceof ByteBufferCell && right instanceof ByteBufferCell;
if (diff < 0) {
// Left row is < right row.
if (bufferBacked) {
midRow = getMinimumMidpointArray(((ByteBufferCell) left).getRowByteBuffer(),
((ByteBufferCell) left).getRowPosition(), left.getRowLength(),
((ByteBufferCell) right).getRowByteBuffer(),
((ByteBufferCell) right).getRowPosition(), right.getRowLength());
} else {
midRow = getMinimumMidpointArray(left.getRowArray(), left.getRowOffset(),
left.getRowLength(), right.getRowArray(), right.getRowOffset(), right.getRowLength());
}
// If midRow is null, just return 'right'. Can't do optimization.
if (midRow == null) return right;
return CellUtil.createFirstOnRow(midRow);
}
// Rows are same. Compare on families.
diff = CellComparator.compareFamilies(left, right);
if (diff > 0) {
throw new IllegalArgumentException("Left family sorts after right family; left="
+ CellUtil.getCellKeyAsString(left) + ", right=" + CellUtil.getCellKeyAsString(right));
}
if (diff < 0) {
if (bufferBacked) {
midRow = getMinimumMidpointArray(((ByteBufferCell) left).getFamilyByteBuffer(),
((ByteBufferCell) left).getFamilyPosition(), left.getFamilyLength(),
((ByteBufferCell) right).getFamilyByteBuffer(),
((ByteBufferCell) right).getFamilyPosition(), right.getFamilyLength());
} else {
midRow = getMinimumMidpointArray(left.getFamilyArray(), left.getFamilyOffset(),
left.getFamilyLength(), right.getFamilyArray(), right.getFamilyOffset(),
right.getFamilyLength());
}
// If midRow is null, just return 'right'. Can't do optimization.
if (midRow == null) return right;
// Return new Cell where we use right row and then a mid sort family.
return CellUtil.createFirstOnRowFamily(right, midRow, 0, midRow.length);
}
// Families are same. Compare on qualifiers.
diff = CellComparator.compareQualifiers(left, right);
if (diff > 0) {
throw new IllegalArgumentException("Left qualifier sorts after right qualifier; left="
+ CellUtil.getCellKeyAsString(left) + ", right=" + CellUtil.getCellKeyAsString(right));
}
if (diff < 0) {
if (bufferBacked) {
midRow = getMinimumMidpointArray(((ByteBufferCell) left).getQualifierByteBuffer(),
((ByteBufferCell) left).getQualifierPosition(), left.getQualifierLength(),
((ByteBufferCell) right).getQualifierByteBuffer(),
((ByteBufferCell) right).getQualifierPosition(), right.getQualifierLength());
} else {
midRow = getMinimumMidpointArray(left.getQualifierArray(), left.getQualifierOffset(),
left.getQualifierLength(), right.getQualifierArray(), right.getQualifierOffset(),
right.getQualifierLength());
}
// If midRow is null, just return 'right'. Can't do optimization.
if (midRow == null) return right;
// Return new Cell where we use right row and family and then a mid sort qualifier.
return CellUtil.createFirstOnRowCol(right, midRow, 0, midRow.length);
}
// No opportunity for optimization. Just return right key.
return right;
}
/**
* @param leftArray
* @param leftOffset
* @param leftLength
* @param rightArray
* @param rightOffset
* @param rightLength
* @return Return a new array that is between left and right and minimally
* sized else just return null as indicator that we could not create a
* mid point.
*/
private static byte[] getMinimumMidpointArray(final byte[] leftArray, final int leftOffset,
final int leftLength, final byte[] rightArray, final int rightOffset, final int rightLength) {
// rows are different
int minLength = leftLength < rightLength ? leftLength : rightLength;
int diffIdx = 0;
while (diffIdx < minLength
&& leftArray[leftOffset + diffIdx] == rightArray[rightOffset + diffIdx]) {
diffIdx++;
}
byte[] minimumMidpointArray = null;
if (diffIdx >= minLength) {
// leftKey's row is prefix of rightKey's.
minimumMidpointArray = new byte[diffIdx + 1];
System.arraycopy(rightArray, rightOffset, minimumMidpointArray, 0, diffIdx + 1);
} else {
int diffByte = leftArray[leftOffset + diffIdx];
if ((0xff & diffByte) < 0xff && (diffByte + 1) < (rightArray[rightOffset + diffIdx] & 0xff)) {
minimumMidpointArray = new byte[diffIdx + 1];
System.arraycopy(leftArray, leftOffset, minimumMidpointArray, 0, diffIdx);
minimumMidpointArray[diffIdx] = (byte) (diffByte + 1);
} else {
minimumMidpointArray = new byte[diffIdx + 1];
System.arraycopy(rightArray, rightOffset, minimumMidpointArray, 0, diffIdx + 1);
}
}
return minimumMidpointArray;
}
private static byte[] getMinimumMidpointArray(ByteBuffer left, int leftOffset, int leftLength,
ByteBuffer right, int rightOffset, int rightLength) {
// rows are different
int minLength = leftLength < rightLength ? leftLength : rightLength;
int diffIdx = 0;
while (diffIdx < minLength && ByteBufferUtils.toByte(left,
leftOffset + diffIdx) == ByteBufferUtils.toByte(right, rightOffset + diffIdx)) {
diffIdx++;
}
byte[] minMidpoint = null;
if (diffIdx >= minLength) {
// leftKey's row is prefix of rightKey's.
minMidpoint = new byte[diffIdx + 1];
ByteBufferUtils.copyFromBufferToArray(minMidpoint, right, rightOffset, 0, diffIdx + 1);
} else {
int diffByte = ByteBufferUtils.toByte(left, leftOffset + diffIdx);
if ((0xff & diffByte) < 0xff
&& (diffByte + 1) < (ByteBufferUtils.toByte(right, rightOffset + diffIdx) & 0xff)) {
minMidpoint = new byte[diffIdx + 1];
ByteBufferUtils.copyFromBufferToArray(minMidpoint, left, leftOffset, 0, diffIdx);
minMidpoint[diffIdx] = (byte) (diffByte + 1);
} else {
minMidpoint = new byte[diffIdx + 1];
ByteBufferUtils.copyFromBufferToArray(minMidpoint, right, rightOffset, 0, diffIdx + 1);
}
}
return minMidpoint;
}
/** Gives inline block writers an opportunity to contribute blocks. */
private void writeInlineBlocks(boolean closing) throws IOException {
for (InlineBlockWriter ibw : inlineBlockWriters) {
while (ibw.shouldWriteBlock(closing)) {
long offset = outputStream.getPos();
boolean cacheThisBlock = ibw.getCacheOnWrite();
ibw.writeInlineBlock(blockWriter.startWriting(
ibw.getInlineBlockType()));
blockWriter.writeHeaderAndData(outputStream);
ibw.blockWritten(offset, blockWriter.getOnDiskSizeWithHeader(),
blockWriter.getUncompressedSizeWithoutHeader());
totalUncompressedBytes += blockWriter.getUncompressedSizeWithHeader();
if (cacheThisBlock) {
doCacheOnWrite(offset);
}
}
}
}
/**
* Caches the last written HFile block.
* @param offset the offset of the block we want to cache. Used to determine
* the cache key.
*/
private void doCacheOnWrite(long offset) {
HFileBlock cacheFormatBlock = blockWriter.getBlockForCaching(cacheConf);
cacheConf.getBlockCache().cacheBlock(
new BlockCacheKey(name, offset, true, cacheFormatBlock.getBlockType()),
cacheFormatBlock);
}
/**
* Ready a new block for writing.
*
* @throws IOException
*/
protected void newBlock() throws IOException {
// This is where the next block begins.
blockWriter.startWriting(BlockType.DATA);
firstCellInBlock = null;
if (lastCell != null) {
lastCellOfPreviousBlock = lastCell;
}
}
/**
* Add a meta block to the end of the file. Call before close(). Metadata
* blocks are expensive. Fill one with a bunch of serialized data rather than
* do a metadata block per metadata instance. If metadata is small, consider
* adding to file info using {@link #appendFileInfo(byte[], byte[])}
*
* @param metaBlockName
* name of the block
* @param content
* will call readFields to get data later (DO NOT REUSE)
*/
@Override
public void appendMetaBlock(String metaBlockName, Writable content) {
byte[] key = Bytes.toBytes(metaBlockName);
int i;
for (i = 0; i < metaNames.size(); ++i) {
// stop when the current key is greater than our own
byte[] cur = metaNames.get(i);
if (Bytes.BYTES_RAWCOMPARATOR.compare(cur, 0, cur.length, key, 0,
key.length) > 0) {
break;
}
}
metaNames.add(i, key);
metaData.add(i, content);
}
@Override
public void close() throws IOException {
if (outputStream == null) {
return;
}
// Save data block encoder metadata in the file info.
blockEncoder.saveMetadata(this);
// Write out the end of the data blocks, then write meta data blocks.
// followed by fileinfo, data block index and meta block index.
finishBlock();
writeInlineBlocks(true);
FixedFileTrailer trailer = new FixedFileTrailer(getMajorVersion(), getMinorVersion());
// Write out the metadata blocks if any.
if (!metaNames.isEmpty()) {
for (int i = 0; i < metaNames.size(); ++i) {
// store the beginning offset
long offset = outputStream.getPos();
// write the metadata content
DataOutputStream dos = blockWriter.startWriting(BlockType.META);
metaData.get(i).write(dos);
blockWriter.writeHeaderAndData(outputStream);
totalUncompressedBytes += blockWriter.getUncompressedSizeWithHeader();
// Add the new meta block to the meta index.
metaBlockIndexWriter.addEntry(metaNames.get(i), offset,
blockWriter.getOnDiskSizeWithHeader());
}
}
// Load-on-open section.
// Data block index.
//
// In version 2, this section of the file starts with the root level data
// block index. We call a function that writes intermediate-level blocks
// first, then root level, and returns the offset of the root level block
// index.
long rootIndexOffset = dataBlockIndexWriter.writeIndexBlocks(outputStream);
trailer.setLoadOnOpenOffset(rootIndexOffset);
// Meta block index.
metaBlockIndexWriter.writeSingleLevelIndex(blockWriter.startWriting(
BlockType.ROOT_INDEX), "meta");
blockWriter.writeHeaderAndData(outputStream);
totalUncompressedBytes += blockWriter.getUncompressedSizeWithHeader();
if (this.hFileContext.isIncludesMvcc()) {
appendFileInfo(MAX_MEMSTORE_TS_KEY, Bytes.toBytes(maxMemstoreTS));
appendFileInfo(KEY_VALUE_VERSION, Bytes.toBytes(KEY_VALUE_VER_WITH_MEMSTORE));
}
// File info
writeFileInfo(trailer, blockWriter.startWriting(BlockType.FILE_INFO));
blockWriter.writeHeaderAndData(outputStream);
totalUncompressedBytes += blockWriter.getUncompressedSizeWithHeader();
// Load-on-open data supplied by higher levels, e.g. Bloom filters.
for (BlockWritable w : additionalLoadOnOpenData){
blockWriter.writeBlock(w, outputStream);
totalUncompressedBytes += blockWriter.getUncompressedSizeWithHeader();
}
// Now finish off the trailer.
trailer.setNumDataIndexLevels(dataBlockIndexWriter.getNumLevels());
trailer.setUncompressedDataIndexSize(
dataBlockIndexWriter.getTotalUncompressedSize());
trailer.setFirstDataBlockOffset(firstDataBlockOffset);
trailer.setLastDataBlockOffset(lastDataBlockOffset);
trailer.setComparatorClass(comparator.getClass());
trailer.setDataIndexCount(dataBlockIndexWriter.getNumRootEntries());
finishClose(trailer);
blockWriter.release();
}
@Override
public void addInlineBlockWriter(InlineBlockWriter ibw) {
inlineBlockWriters.add(ibw);
}
@Override
public void addGeneralBloomFilter(final BloomFilterWriter bfw) {
this.addBloomFilter(bfw, BlockType.GENERAL_BLOOM_META);
}
@Override
public void addDeleteFamilyBloomFilter(final BloomFilterWriter bfw) {
this.addBloomFilter(bfw, BlockType.DELETE_FAMILY_BLOOM_META);
}
private void addBloomFilter(final BloomFilterWriter bfw,
final BlockType blockType) {
if (bfw.getKeyCount() <= 0)
return;
if (blockType != BlockType.GENERAL_BLOOM_META &&
blockType != BlockType.DELETE_FAMILY_BLOOM_META) {
throw new RuntimeException("Block Type: " + blockType.toString() +
"is not supported");
}
additionalLoadOnOpenData.add(new BlockWritable() {
@Override
public BlockType getBlockType() {
return blockType;
}
@Override
public void writeToBlock(DataOutput out) throws IOException {
bfw.getMetaWriter().write(out);
Writable dataWriter = bfw.getDataWriter();
if (dataWriter != null)
dataWriter.write(out);
}
});
}
@Override
public HFileContext getFileContext() {
return hFileContext;
}
/**
* Add key/value to file. Keys must be added in an order that agrees with the
* Comparator passed on construction.
*
* @param cell
* Cell to add. Cannot be empty nor null.
* @throws IOException
*/
@Override
public void append(final Cell cell) throws IOException {
// checkKey uses comparator to check we are writing in order.
boolean dupKey = checkKey(cell);
if (!dupKey) {
checkBlockBoundary();
}
if (!blockWriter.isWriting()) {
newBlock();
}
blockWriter.write(cell);
totalKeyLength += CellUtil.estimatedSerializedSizeOfKey(cell);
totalValueLength += cell.getValueLength();
// Are we the first key in this block?
if (firstCellInBlock == null) {
// If cell is big, block will be closed and this firstCellInBlock reference will only last
// a short while.
firstCellInBlock = cell;
}
// TODO: What if cell is 10MB and we write infrequently? We hold on to cell here indefinitely?
lastCell = cell;
entryCount++;
this.maxMemstoreTS = Math.max(this.maxMemstoreTS, cell.getSequenceId());
int tagsLength = cell.getTagsLength();
if (tagsLength > this.maxTagsLength) {
this.maxTagsLength = tagsLength;
}
}
@Override
public void beforeShipped() throws IOException {
// Add clone methods for every cell
if (this.lastCell != null) {
this.lastCell = KeyValueUtil.toNewKeyCell(this.lastCell);
}
if (this.firstCellInBlock != null) {
this.firstCellInBlock = KeyValueUtil.toNewKeyCell(this.firstCellInBlock);
}
if (this.lastCellOfPreviousBlock != null) {
this.lastCellOfPreviousBlock = KeyValueUtil.toNewKeyCell(this.lastCellOfPreviousBlock);
}
}
protected void finishFileInfo() throws IOException {
if (lastCell != null) {
// Make a copy. The copy is stuffed into our fileinfo map. Needs a clean
// byte buffer. Won't take a tuple.
byte [] lastKey = CellUtil.getCellKeySerializedAsKeyValueKey(this.lastCell);
fileInfo.append(FileInfo.LASTKEY, lastKey, false);
}
// Average key length.
int avgKeyLen =
entryCount == 0 ? 0 : (int) (totalKeyLength / entryCount);
fileInfo.append(FileInfo.AVG_KEY_LEN, Bytes.toBytes(avgKeyLen), false);
fileInfo.append(FileInfo.CREATE_TIME_TS, Bytes.toBytes(hFileContext.getFileCreateTime()),
false);
// Average value length.
int avgValueLen =
entryCount == 0 ? 0 : (int) (totalValueLength / entryCount);
fileInfo.append(FileInfo.AVG_VALUE_LEN, Bytes.toBytes(avgValueLen), false);
if (hFileContext.getDataBlockEncoding() == DataBlockEncoding.PREFIX_TREE) {
// In case of Prefix Tree encoding, we always write tags information into HFiles even if all
// KVs are having no tags.
fileInfo.append(FileInfo.MAX_TAGS_LEN, Bytes.toBytes(this.maxTagsLength), false);
} else if (hFileContext.isIncludesTags()) {
// When tags are not being written in this file, MAX_TAGS_LEN is excluded
// from the FileInfo
fileInfo.append(FileInfo.MAX_TAGS_LEN, Bytes.toBytes(this.maxTagsLength), false);
boolean tagsCompressed = (hFileContext.getDataBlockEncoding() != DataBlockEncoding.NONE)
&& hFileContext.isCompressTags();
fileInfo.append(FileInfo.TAGS_COMPRESSED, Bytes.toBytes(tagsCompressed), false);
}
}
protected int getMajorVersion() {
return 3;
}
protected int getMinorVersion() {
return HFileReaderImpl.MAX_MINOR_VERSION;
}
protected void finishClose(FixedFileTrailer trailer) throws IOException {
// Write out encryption metadata before finalizing if we have a valid crypto context
Encryption.Context cryptoContext = hFileContext.getEncryptionContext();
if (cryptoContext != Encryption.Context.NONE) {
// Wrap the context's key and write it as the encryption metadata, the wrapper includes
// all information needed for decryption
trailer.setEncryptionKey(EncryptionUtil.wrapKey(cryptoContext.getConf(),
cryptoContext.getConf().get(HConstants.CRYPTO_MASTERKEY_NAME_CONF_KEY,
User.getCurrent().getShortName()),
cryptoContext.getKey()));
}
// Now we can finish the close
trailer.setMetaIndexCount(metaNames.size());
trailer.setTotalUncompressedBytes(totalUncompressedBytes+ trailer.getTrailerSize());
trailer.setEntryCount(entryCount);
trailer.setCompressionCodec(hFileContext.getCompression());
long startTime = System.currentTimeMillis();
trailer.serialize(outputStream);
HFile.updateWriteLatency(System.currentTimeMillis() - startTime);
if (closeOutputStream) {
outputStream.close();
outputStream = null;
}
}
}
|
apache-2.0
|
our-city-app/oca-backend
|
embedded-apps/projects/shared/src/lib/dynamic-date/index.ts
|
76
|
export * from './dynamic-date.module';
export * from './dynamic-date.pipe';
|
apache-2.0
|
hilllo/HaloLandsAR
|
HaloLands/Assets/Scripts/EventSystem/Event.cs
|
779
|
using System.Collections;
using System.Collections.Generic;
using UnityEngine;
using UnityEngine.Events;
namespace Game.Event
{
public class Event : MonoBehaviour
{
#region Fields
[SerializeField]
private UnityEvent _startList;
[SerializeField]
private UnityEvent _endList;
#endregion Fields
#region Event
public virtual void StartEvent()
{
Debug.Log(string.Format("Start Event: {0}", this.gameObject.name));
this._startList.Invoke();
}
public virtual void EndEvent()
{
Debug.Log(string.Format("End Event: {0}", this.gameObject.name));
this._endList.Invoke();
}
#endregion Event
}
}
|
apache-2.0
|
hguerrero/jboss-eap-quickstarts
|
greeter/README.md
|
5315
|
greeter: Demonstrates CDI, JPA, JTA, EJB, and JSF
========================
Author: Pete Muir
Level: Beginner
Technologies: CDI, JSF, JPA, EJB, JTA
Summary: The `greeter` quickstart demonstrates the use of *CDI*, *JPA*, *JTA*, *EJB* and *JSF* in JBoss EAP.
Target Product: JBoss EAP
Source: <https://github.com/jboss-developer/jboss-eap-quickstarts/>
What is it?
-----------
The `greeter` quickstart demonstrates the use of *CDI*, *JPA*, *JTA*, *EJB* and *JSF* in Red Hat JBoss Enterprise Application Platform.
When you deploy this example, two users are automatically created for you: `emuster` and `jdoe`. This data is located in the `src/main/resources/import.sql file`.
To test this example:
1. Enter a name in the `username` field and click on `Greet!`.
2. If you enter a username that is not in the database, you get a message `No such user exists!`.
3. If you enter a valid username, you get a message "Hello, " followed by the user's first and last name.
4. To create a new user, click the `Add a new user` link. Enter the username, first name, and last name and then click `Add User`. The user is added and a message displays the new user id number.
5. Click on the `Greet a user!` link to return to the `Greet!` page.
_Note: This quickstart uses the H2 database included with Red Hat JBoss Enterprise Application Platform 7. It is a lightweight, relational example datasource that is used for examples only. It is not robust or scalable, is not supported, and should NOT be used in a production environment!_
_Note: This quickstart uses a `*-ds.xml` datasource configuration file for convenience and ease of database configuration. These files are deprecated in JBoss EAP and should not be used in a production environment. Instead, you should configure the datasource using the Management CLI or Management Console. Datasource configuration is documented in the [Product Documentation](https://access.redhat.com/documentation/en/jboss-enterprise-application-platform/) for Red Hat JBoss Enterprise Application Platform._
System requirements
-------------------
The application this project produces is designed to be run on Red Hat JBoss Enterprise Application Platform 7 or later.
All you need to build this project is Java 8.0 (Java SDK 1.8) or later and Maven 3.1.1 or later. See [Configure Maven for JBoss EAP 7](https://github.com/jboss-developer/jboss-developer-shared-resources/blob/master/guides/CONFIGURE_MAVEN_JBOSS_EAP7.md#configure-maven-to-build-and-deploy-the-quickstarts) to make sure you are configured correctly for testing the quickstarts.
Use of EAP7_HOME
---------------
In the following instructions, replace `EAP7_HOME` with the actual path to your JBoss EAP installation. The installation path is described in detail here: [Use of EAP7_HOME and JBOSS_HOME Variables](https://github.com/jboss-developer/jboss-developer-shared-resources/blob/master/guides/USE_OF_EAP7_HOME.md#use-of-eap_home-and-jboss_home-variables).
Start the JBoss EAP Server
-------------------------
1. Open a command prompt and navigate to the root of the JBoss EAP directory.
2. The following shows the command line to start the server:
For Linux: EAP7_HOME/bin/standalone.sh
For Windows: EAP7_HOME\bin\standalone.bat
Build and Deploy the Quickstart
-------------------------
1. Make sure you have started the JBoss EAP server as described above.
2. Open a command prompt and navigate to the root directory of this quickstart.
3. Type this command to build and deploy the archive:
mvn clean install wildfly:deploy
4. This will deploy `target/jboss-greeter.war` to the running instance of the server.
Access the application
---------------------
The application will be running at the following URL: <http://localhost:8080/jboss-greeter>.
Undeploy the Archive
--------------------
1. Make sure you have started the JBoss EAP server as described above.
2. Open a command prompt and navigate to the root directory of this quickstart.
3. When you are finished testing, type this command to undeploy the archive:
mvn wildfly:undeploy
Server Log: Expected warnings and errors
-----------------------------------
_Note:_ You will see the following warnings in the server log. You can ignore these warnings.
WFLYJCA0091: -ds.xml file deployments are deprecated. Support may be removed in a future version.
HHH000431: Unable to determine H2 database version, certain features may not work
Run the Quickstart in Red Hat JBoss Developer Studio or Eclipse
-------------------------------------
You can also start the server and deploy the quickstarts or run the Arquillian tests from Eclipse using JBoss tools. For general information about how to import a quickstart, add a JBoss EAP server, and build and deploy a quickstart, see [Use JBoss Developer Studio or Eclipse to Run the Quickstarts](https://github.com/jboss-developer/jboss-developer-shared-resources/blob/master/guides/USE_JBDS.md#use-jboss-developer-studio-or-eclipse-to-run-the-quickstarts)
Debug the Application
------------------------------------
If you want to debug the source code of any library in the project, run the following command to pull the source into your local repository. The IDE should then detect it.
mvn dependency:sources
|
apache-2.0
|
lk-architecture/lk-lambda-deploy
|
src/steps/4.deploy.js
|
1817
|
import execSync from "../services/exec-sync";
import log from "../services/logger";
import lambdaExists from "../utils/lambda-exists";
export default function deploy (options) {
const {
awsAccessKeyId,
awsSecretAccessKey,
awsRegion,
lambdaName,
lambdaRole,
sourceDir
} = options;
// Create/update the lambda function
const awsCliEnv = {
AWS_ACCESS_KEY_ID: awsAccessKeyId,
AWS_SECRET_ACCESS_KEY: awsSecretAccessKey,
AWS_DEFAULT_REGION: awsRegion
};
switch (lambdaExists(awsCliEnv, lambdaName)) {
case false:
// Create the function
log.info(`Lambda ${lambdaName} doesn't exist.`);
log.info(`Creating lambda ${lambdaName}`);
execSync([
"aws lambda create-function",
`--function-name ${lambdaName}`,
"--runtime nodejs4.3",
`--role ${lambdaRole}`,
"--handler index.handler",
`--zip-file fileb://${sourceDir}/bundle.zip`
].join(" "), {env: awsCliEnv});
break;
case true:
// Update function code
log.info(`Lambda ${lambdaName} already exists`);
log.info(`Updating function code for lambda ${lambdaName}`);
execSync([
"aws lambda update-function-code",
`--function-name ${lambdaName}`,
`--zip-file fileb://${sourceDir}/bundle.zip`
].join(" "), {env: awsCliEnv});
// Update function configuration (just the role for now)
log.info(`Updating function configuration for lambda ${lambdaName}`);
execSync([
"aws lambda update-function-configuration",
`--function-name ${lambdaName}`,
`--role ${lambdaRole}`
].join(" "), {env: awsCliEnv});
break;
}
}
|
apache-2.0
|
pagi-org/pagijs
|
src/js/schema/index.js
|
193
|
var schema = require("./schema.js");
var xml = require("./xml.js");
module.exports.createBuilder = schema.createBuilder;
module.exports.parse = xml.parse;
module.exports.parseXml = xml.parse;
|
apache-2.0
|
giventocode/azure-mobileservices-search
|
Giventocode.AzureSearch/Global.asax.cs
|
266
|
using System.Web.Http;
using System.Web.Routing;
namespace Giventocode.AzureSearch
{
public class WebApiApplication : System.Web.HttpApplication
{
protected void Application_Start()
{
WebApiConfig.Register();
}
}
}
|
apache-2.0
|
WojcikMike/docs.particular.net
|
Snippets/Snippets_6/RavenDB/Configure.cs
|
3386
|
namespace Snippets6.RavenDB
{
using System.Threading.Tasks;
using NServiceBus;
using NServiceBus.RavenDB;
using Raven.Client;
using Raven.Client.Document;
class RavenDBConfigure
{
public void SharedSessionForSagasAndOutbox()
{
#region ravendb-persistence-shared-session-for-sagas
DocumentStore myDocumentStore = new DocumentStore();
// configure document store properties here
EndpointConfiguration endpointConfiguration = new EndpointConfiguration();
endpointConfiguration.UsePersistence<RavenDBPersistence>().UseSharedAsyncSession(() =>
{
IAsyncDocumentSession session = myDocumentStore.OpenAsyncSession();
// customize the session properties here
return session;
});
#endregion
}
public class MyMessage
{
}
public class MyDocument
{
}
#region ravendb-persistence-shared-session-for-sagas-handler
public class MyMessageHandler : IHandleMessages<MyMessage>
{
public Task Handle(MyMessage message, IMessageHandlerContext context)
{
MyDocument doc = new MyDocument();
IAsyncDocumentSession ravenSession = context.SynchronizedStorageSession.RavenSession();
return ravenSession.StoreAsync(doc);
}
}
#endregion
public void SpecificExternalDocumentStore()
{
#region ravendb-persistence-specific-external-store
DocumentStore myDocumentStore = new DocumentStore();
// configure document store properties here
EndpointConfiguration endpointConfiguration = new EndpointConfiguration();
endpointConfiguration.UsePersistence<RavenDBPersistence>()
.UseDocumentStoreForSubscriptions(myDocumentStore)
.UseDocumentStoreForSagas(myDocumentStore)
.UseDocumentStoreForTimeouts(myDocumentStore);
#endregion
}
public void SpecificDocumentStoreViaConnectionString()
{
//See the config file
}
public void ExternalDocumentStore()
{
#region ravendb-persistence-external-store
DocumentStore myDocumentStore = new DocumentStore();
// configure document store properties here
EndpointConfiguration endpointConfiguration = new EndpointConfiguration();
endpointConfiguration.UsePersistence<RavenDBPersistence>()
.SetDefaultDocumentStore(myDocumentStore);
#endregion
}
public void ExternalConnectionParameters()
{
#region ravendb-persistence-external-connection-params
ConnectionParameters connectionParams = new ConnectionParameters();
// configure connection params (ApiKey, DatabaseName, Url) here
EndpointConfiguration endpointConfiguration = new EndpointConfiguration();
endpointConfiguration.UsePersistence<RavenDBPersistence>()
.SetDefaultDocumentStore(connectionParams);
#endregion
}
public void SharedDocumentStoreViaConnectionString()
{
//See the config file
}
}
}
|
apache-2.0
|
laurentlb/Ctrl-Alt-Test
|
F/data/textures/armchair.cc
|
678
|
#if TEXTURE_EXPOSE == TEXTURE_NAMES
#elif TEXTURE_EXPOSE == TEXTURE_BUILDER_NAME
builArmchair,
#elif TEXTURE_EXPOSE == TEXTURE_FILE
__FILE__,
#elif TEXTURE_EXPOSE == TEXTURE_BUILDER_BODY
void builArmchair()
{
Channel t;
t.Cells(100);
Channel r = t; r.Scale(53.f/255.f, 83.f/255.f);
Channel g = t; g.Scale(32.f/255.f, 54.f/255.f);
Channel b = t; b.Scale(27.f/245.f, 50.f/255.f);
queueTextureRGB(armchair,
r, g, b,
GL_LINEAR_MIPMAP_LINEAR, GL_LINEAR,
true, GL_REPEAT, false);
t.Random();
t.GaussianBlur();
t.Scale(0., 0.25f);
buildAndQueueBumpMapFromHeightMap(armchairBump, t, true);
}
#endif // TEXTURE_EXPOSE
|
apache-2.0
|
ukign/UDSDemo
|
CODE/IO_Map.h
|
733911
|
/** ###################################################################
** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.h
** Project : DiagnosticDemo
** Processor : MC9S12G128VLH
** Component : IO_Map
** Version : Driver 01.08
** Compiler : CodeWarrior HC12 C Compiler
** Date/Time : 2016/10/13, 13:48
** Abstract :
** IO_Map.h - implements an IO device's mapping.
** This module contains symbol definitions of all peripheral
** registers and bits.
** Settings :
**
** Contents :
** No public methods
**
** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved.
**
** http : www.freescale.com
** mail : [email protected]
** ###################################################################*/
#ifndef _IO_MAP_H
#define _IO_MAP_H
/* Linker pragmas */
#pragma LINK_INFO DERIVATIVE "MC9S12G128"
#pragma LINK_INFO OSCFREQUENCY "8000000"
#define REG_BASE 0x00000000 /* Base address for the I/O register block */
/*lint -save -e950 -esym(960,18.4) -e46 Disable MISRA rule (1.1,18.4,6.4) checking. */
/* Based on CPU DB MC9S12G128_64, version 3.00.016 (RegistersPrg V2.32) */
/* DataSheet : MC9S12GRMV1 Rev. 1.02 June 7, 2011 */
#include "PE_Types.h"
#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */
#pragma OPTION ADD V30toV31Compatible "-BfaGapLimitBits4294967295" /*this guarantee correct bitfield positions*/
/*********************************************/
/* */
/* PE I/O map */
/* */
/*********************************************/
/**************** interrupt vector numbers ****************/
#define VectorNumber_Vsi 63U
#define VectorNumber_Vportad 62U
#define VectorNumber_Vatdcompare 61U
#define VectorNumber_VReserved60 60U
#define VectorNumber_Vapi 59U
#define VectorNumber_Vlvi 58U
#define VectorNumber_VReserved57 57U
#define VectorNumber_Vportp 56U
#define VectorNumber_VReserved55 55U
#define VectorNumber_VReserved54 54U
#define VectorNumber_VReserved53 53U
#define VectorNumber_VReserved52 52U
#define VectorNumber_VReserved51 51U
#define VectorNumber_VReserved50 50U
#define VectorNumber_VReserved49 49U
#define VectorNumber_VReserved48 48U
#define VectorNumber_VReserved47 47U
#define VectorNumber_VReserved46 46U
#define VectorNumber_VReserved45 45U
#define VectorNumber_VReserved44 44U
#define VectorNumber_VReserved43 43U
#define VectorNumber_VReserved42 42U
#define VectorNumber_VReserved41 41U
#define VectorNumber_VReserved40 40U
#define VectorNumber_Vcantx 39U
#define VectorNumber_Vcanrx 38U
#define VectorNumber_Vcanerr 37U
#define VectorNumber_Vcanwkup 36U
#define VectorNumber_Vflash 35U
#define VectorNumber_Vflashfd 34U
#define VectorNumber_Vspi2 33U
#define VectorNumber_Vspi1 32U
#define VectorNumber_VReserved31 31U
#define VectorNumber_Vsci2 30U
#define VectorNumber_VReserved29 29U
#define VectorNumber_Vcpmuplllck 28U
#define VectorNumber_Vcpmuocsns 27U
#define VectorNumber_VReserved26 26U
#define VectorNumber_VReserved25 25U
#define VectorNumber_Vportj 24U
#define VectorNumber_VReserved23 23U
#define VectorNumber_Vatd 22U
#define VectorNumber_Vsci1 21U
#define VectorNumber_Vsci0 20U
#define VectorNumber_Vspi0 19U
#define VectorNumber_Vtimpaie 18U
#define VectorNumber_Vtimpaaovf 17U
#define VectorNumber_Vtimovf 16U
#define VectorNumber_Vtimch7 15U
#define VectorNumber_Vtimch6 14U
#define VectorNumber_Vtimch5 13U
#define VectorNumber_Vtimch4 12U
#define VectorNumber_Vtimch3 11U
#define VectorNumber_Vtimch2 10U
#define VectorNumber_Vtimch1 9U
#define VectorNumber_Vtimch0 8U
#define VectorNumber_Vrti 7U
#define VectorNumber_Virq 6U
#define VectorNumber_Vxirq 5U
#define VectorNumber_Vswi 4U
#define VectorNumber_Vtrap 3U
#define VectorNumber_Vcop 2U
#define VectorNumber_Vclkmon 1U
#define VectorNumber_Vreset 0U
/**************** interrupt vector table ****************/
#define Vsi 0xFF80U
#define Vportad 0xFF82U
#define Vatdcompare 0xFF84U
#define VReserved60 0xFF86U
#define Vapi 0xFF88U
#define Vlvi 0xFF8AU
#define VReserved57 0xFF8CU
#define Vportp 0xFF8EU
#define VReserved55 0xFF90U
#define VReserved54 0xFF92U
#define VReserved53 0xFF94U
#define VReserved52 0xFF96U
#define VReserved51 0xFF98U
#define VReserved50 0xFF9AU
#define VReserved49 0xFF9CU
#define VReserved48 0xFF9EU
#define VReserved47 0xFFA0U
#define VReserved46 0xFFA2U
#define VReserved45 0xFFA4U
#define VReserved44 0xFFA6U
#define VReserved43 0xFFA8U
#define VReserved42 0xFFAAU
#define VReserved41 0xFFACU
#define VReserved40 0xFFAEU
#define Vcantx 0xFFB0U
#define Vcanrx 0xFFB2U
#define Vcanerr 0xFFB4U
#define Vcanwkup 0xFFB6U
#define Vflash 0xFFB8U
#define Vflashfd 0xFFBAU
#define Vspi2 0xFFBCU
#define Vspi1 0xFFBEU
#define VReserved31 0xFFC0U
#define Vsci2 0xFFC2U
#define VReserved29 0xFFC4U
#define Vcpmuplllck 0xFFC6U
#define Vcpmuocsns 0xFFC8U
#define VReserved26 0xFFCAU
#define VReserved25 0xFFCCU
#define Vportj 0xFFCEU
#define VReserved23 0xFFD0U
#define Vatd 0xFFD2U
#define Vsci1 0xFFD4U
#define Vsci0 0xFFD6U
#define Vspi0 0xFFD8U
#define Vtimpaie 0xFFDAU
#define Vtimpaaovf 0xFFDCU
#define Vtimovf 0xFFDEU
#define Vtimch7 0xFFE0U
#define Vtimch6 0xFFE2U
#define Vtimch5 0xFFE4U
#define Vtimch4 0xFFE6U
#define Vtimch3 0xFFE8U
#define Vtimch2 0xFFEAU
#define Vtimch1 0xFFECU
#define Vtimch0 0xFFEEU
#define Vrti 0xFFF0U
#define Virq 0xFFF2U
#define Vxirq 0xFFF4U
#define Vswi 0xFFF6U
#define Vtrap 0xFFF8U
#define Vcop 0xFFFAU
#define Vclkmon 0xFFFCU
#define Vreset 0xFFFEU
/**************** registers I/O map ****************/
/*** PORTAB - Port AB Data Register; 0x00000000 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PORTA - Port A Data Register; 0x00000000 ***/
union {
byte Byte;
struct {
byte PA0 :1; /* Port A Bit 0 */
byte PA1 :1; /* Port A Bit 1 */
byte PA2 :1; /* Port A Bit 2 */
byte PA3 :1; /* Port A Bit 3 */
byte PA4 :1; /* Port A Bit 4 */
byte PA5 :1; /* Port A Bit 5 */
byte PA6 :1; /* Port A Bit 6 */
byte PA7 :1; /* Port A Bit 7 */
} Bits;
} PORTASTR;
#define PORTA _PORTAB.Overlap_STR.PORTASTR.Byte
#define PORTA_PA0 _PORTAB.Overlap_STR.PORTASTR.Bits.PA0
#define PORTA_PA1 _PORTAB.Overlap_STR.PORTASTR.Bits.PA1
#define PORTA_PA2 _PORTAB.Overlap_STR.PORTASTR.Bits.PA2
#define PORTA_PA3 _PORTAB.Overlap_STR.PORTASTR.Bits.PA3
#define PORTA_PA4 _PORTAB.Overlap_STR.PORTASTR.Bits.PA4
#define PORTA_PA5 _PORTAB.Overlap_STR.PORTASTR.Bits.PA5
#define PORTA_PA6 _PORTAB.Overlap_STR.PORTASTR.Bits.PA6
#define PORTA_PA7 _PORTAB.Overlap_STR.PORTASTR.Bits.PA7
#define PORTA_PA0_MASK 0x01U
#define PORTA_PA1_MASK 0x02U
#define PORTA_PA2_MASK 0x04U
#define PORTA_PA3_MASK 0x08U
#define PORTA_PA4_MASK 0x10U
#define PORTA_PA5_MASK 0x20U
#define PORTA_PA6_MASK 0x40U
#define PORTA_PA7_MASK 0x80U
/*** PORTB - Port B Data Register; 0x00000001 ***/
union {
byte Byte;
struct {
byte PB0 :1; /* Port B Bit 0 */
byte PB1 :1; /* Port B Bit 1 */
byte PB2 :1; /* Port B Bit 2 */
byte PB3 :1; /* Port B Bit 3 */
byte PB4 :1; /* Port B Bit 4 */
byte PB5 :1; /* Port B Bit 5 */
byte PB6 :1; /* Port B Bit 6 */
byte PB7 :1; /* Port B Bit 7 */
} Bits;
} PORTBSTR;
#define PORTB _PORTAB.Overlap_STR.PORTBSTR.Byte
#define PORTB_PB0 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB0
#define PORTB_PB1 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB1
#define PORTB_PB2 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB2
#define PORTB_PB3 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB3
#define PORTB_PB4 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB4
#define PORTB_PB5 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB5
#define PORTB_PB6 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB6
#define PORTB_PB7 _PORTAB.Overlap_STR.PORTBSTR.Bits.PB7
#define PORTB_PB0_MASK 0x01U
#define PORTB_PB1_MASK 0x02U
#define PORTB_PB2_MASK 0x04U
#define PORTB_PB3_MASK 0x08U
#define PORTB_PB4_MASK 0x10U
#define PORTB_PB5_MASK 0x20U
#define PORTB_PB6_MASK 0x40U
#define PORTB_PB7_MASK 0x80U
} Overlap_STR;
struct {
word PB0 :1; /* Port B Bit 0 */
word PB1 :1; /* Port B Bit 1 */
word PB2 :1; /* Port B Bit 2 */
word PB3 :1; /* Port B Bit 3 */
word PB4 :1; /* Port B Bit 4 */
word PB5 :1; /* Port B Bit 5 */
word PB6 :1; /* Port B Bit 6 */
word PB7 :1; /* Port B Bit 7 */
word PA0 :1; /* Port A Bit 0 */
word PA1 :1; /* Port A Bit 1 */
word PA2 :1; /* Port A Bit 2 */
word PA3 :1; /* Port A Bit 3 */
word PA4 :1; /* Port A Bit 4 */
word PA5 :1; /* Port A Bit 5 */
word PA6 :1; /* Port A Bit 6 */
word PA7 :1; /* Port A Bit 7 */
} Bits;
struct {
word grpPB :8;
word grpPA :8;
} MergedBits;
} PORTABSTR;
extern volatile PORTABSTR _PORTAB @(REG_BASE + 0x00000000UL);
#define PORTAB _PORTAB.Word
#define PORTAB_PB0 _PORTAB.Bits.PB0
#define PORTAB_PB1 _PORTAB.Bits.PB1
#define PORTAB_PB2 _PORTAB.Bits.PB2
#define PORTAB_PB3 _PORTAB.Bits.PB3
#define PORTAB_PB4 _PORTAB.Bits.PB4
#define PORTAB_PB5 _PORTAB.Bits.PB5
#define PORTAB_PB6 _PORTAB.Bits.PB6
#define PORTAB_PB7 _PORTAB.Bits.PB7
#define PORTAB_PA0 _PORTAB.Bits.PA0
#define PORTAB_PA1 _PORTAB.Bits.PA1
#define PORTAB_PA2 _PORTAB.Bits.PA2
#define PORTAB_PA3 _PORTAB.Bits.PA3
#define PORTAB_PA4 _PORTAB.Bits.PA4
#define PORTAB_PA5 _PORTAB.Bits.PA5
#define PORTAB_PA6 _PORTAB.Bits.PA6
#define PORTAB_PA7 _PORTAB.Bits.PA7
#define PORTAB_PB _PORTAB.MergedBits.grpPB
#define PORTAB_PA _PORTAB.MergedBits.grpPA
#define PORTAB_PB0_MASK 0x01U
#define PORTAB_PB1_MASK 0x02U
#define PORTAB_PB2_MASK 0x04U
#define PORTAB_PB3_MASK 0x08U
#define PORTAB_PB4_MASK 0x10U
#define PORTAB_PB5_MASK 0x20U
#define PORTAB_PB6_MASK 0x40U
#define PORTAB_PB7_MASK 0x80U
#define PORTAB_PA0_MASK 0x0100U
#define PORTAB_PA1_MASK 0x0200U
#define PORTAB_PA2_MASK 0x0400U
#define PORTAB_PA3_MASK 0x0800U
#define PORTAB_PA4_MASK 0x1000U
#define PORTAB_PA5_MASK 0x2000U
#define PORTAB_PA6_MASK 0x4000U
#define PORTAB_PA7_MASK 0x8000U
#define PORTAB_PB_MASK 0xFFU
#define PORTAB_PB_BITNUM 0x00U
#define PORTAB_PA_MASK 0xFF00U
#define PORTAB_PA_BITNUM 0x08U
/*** DDRAB - Port AB Data Direction Register; 0x00000002 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** DDRA - Port A Data Direction Register; 0x00000002 ***/
union {
byte Byte;
struct {
byte DDRA0 :1; /* Data Direction Port A Bit 0 */
byte DDRA1 :1; /* Data Direction Port A Bit 1 */
byte DDRA2 :1; /* Data Direction Port A Bit 2 */
byte DDRA3 :1; /* Data Direction Port A Bit 3 */
byte DDRA4 :1; /* Data Direction Port A Bit 4 */
byte DDRA5 :1; /* Data Direction Port A Bit 5 */
byte DDRA6 :1; /* Data Direction Port A Bit 6 */
byte DDRA7 :1; /* Data Direction Port A Bit 7 */
} Bits;
} DDRASTR;
#define DDRA _DDRAB.Overlap_STR.DDRASTR.Byte
#define DDRA_DDRA0 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA0
#define DDRA_DDRA1 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA1
#define DDRA_DDRA2 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA2
#define DDRA_DDRA3 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA3
#define DDRA_DDRA4 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA4
#define DDRA_DDRA5 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA5
#define DDRA_DDRA6 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA6
#define DDRA_DDRA7 _DDRAB.Overlap_STR.DDRASTR.Bits.DDRA7
#define DDRA_DDRA0_MASK 0x01U
#define DDRA_DDRA1_MASK 0x02U
#define DDRA_DDRA2_MASK 0x04U
#define DDRA_DDRA3_MASK 0x08U
#define DDRA_DDRA4_MASK 0x10U
#define DDRA_DDRA5_MASK 0x20U
#define DDRA_DDRA6_MASK 0x40U
#define DDRA_DDRA7_MASK 0x80U
/*** DDRB - Port B Data Direction Register; 0x00000003 ***/
union {
byte Byte;
struct {
byte DDRB0 :1; /* Data Direction Port B Bit 0 */
byte DDRB1 :1; /* Data Direction Port B Bit 1 */
byte DDRB2 :1; /* Data Direction Port B Bit 2 */
byte DDRB3 :1; /* Data Direction Port B Bit 3 */
byte DDRB4 :1; /* Data Direction Port B Bit 4 */
byte DDRB5 :1; /* Data Direction Port B Bit 5 */
byte DDRB6 :1; /* Data Direction Port B Bit 6 */
byte DDRB7 :1; /* Data Direction Port B Bit 7 */
} Bits;
} DDRBSTR;
#define DDRB _DDRAB.Overlap_STR.DDRBSTR.Byte
#define DDRB_DDRB0 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB0
#define DDRB_DDRB1 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB1
#define DDRB_DDRB2 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB2
#define DDRB_DDRB3 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB3
#define DDRB_DDRB4 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB4
#define DDRB_DDRB5 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB5
#define DDRB_DDRB6 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB6
#define DDRB_DDRB7 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB7
#define DDRB_DDRB0_MASK 0x01U
#define DDRB_DDRB1_MASK 0x02U
#define DDRB_DDRB2_MASK 0x04U
#define DDRB_DDRB3_MASK 0x08U
#define DDRB_DDRB4_MASK 0x10U
#define DDRB_DDRB5_MASK 0x20U
#define DDRB_DDRB6_MASK 0x40U
#define DDRB_DDRB7_MASK 0x80U
} Overlap_STR;
struct {
word DDRB0 :1; /* Data Direction Port B Bit 0 */
word DDRB1 :1; /* Data Direction Port B Bit 1 */
word DDRB2 :1; /* Data Direction Port B Bit 2 */
word DDRB3 :1; /* Data Direction Port B Bit 3 */
word DDRB4 :1; /* Data Direction Port B Bit 4 */
word DDRB5 :1; /* Data Direction Port B Bit 5 */
word DDRB6 :1; /* Data Direction Port B Bit 6 */
word DDRB7 :1; /* Data Direction Port B Bit 7 */
word DDRA0 :1; /* Data Direction Port A Bit 0 */
word DDRA1 :1; /* Data Direction Port A Bit 1 */
word DDRA2 :1; /* Data Direction Port A Bit 2 */
word DDRA3 :1; /* Data Direction Port A Bit 3 */
word DDRA4 :1; /* Data Direction Port A Bit 4 */
word DDRA5 :1; /* Data Direction Port A Bit 5 */
word DDRA6 :1; /* Data Direction Port A Bit 6 */
word DDRA7 :1; /* Data Direction Port A Bit 7 */
} Bits;
struct {
word grpDDRB :8;
word grpDDRA :8;
} MergedBits;
} DDRABSTR;
extern volatile DDRABSTR _DDRAB @(REG_BASE + 0x00000002UL);
#define DDRAB _DDRAB.Word
#define DDRAB_DDRB0 _DDRAB.Bits.DDRB0
#define DDRAB_DDRB1 _DDRAB.Bits.DDRB1
#define DDRAB_DDRB2 _DDRAB.Bits.DDRB2
#define DDRAB_DDRB3 _DDRAB.Bits.DDRB3
#define DDRAB_DDRB4 _DDRAB.Bits.DDRB4
#define DDRAB_DDRB5 _DDRAB.Bits.DDRB5
#define DDRAB_DDRB6 _DDRAB.Bits.DDRB6
#define DDRAB_DDRB7 _DDRAB.Bits.DDRB7
#define DDRAB_DDRA0 _DDRAB.Bits.DDRA0
#define DDRAB_DDRA1 _DDRAB.Bits.DDRA1
#define DDRAB_DDRA2 _DDRAB.Bits.DDRA2
#define DDRAB_DDRA3 _DDRAB.Bits.DDRA3
#define DDRAB_DDRA4 _DDRAB.Bits.DDRA4
#define DDRAB_DDRA5 _DDRAB.Bits.DDRA5
#define DDRAB_DDRA6 _DDRAB.Bits.DDRA6
#define DDRAB_DDRA7 _DDRAB.Bits.DDRA7
#define DDRAB_DDRB _DDRAB.MergedBits.grpDDRB
#define DDRAB_DDRA _DDRAB.MergedBits.grpDDRA
#define DDRAB_DDRB0_MASK 0x01U
#define DDRAB_DDRB1_MASK 0x02U
#define DDRAB_DDRB2_MASK 0x04U
#define DDRAB_DDRB3_MASK 0x08U
#define DDRAB_DDRB4_MASK 0x10U
#define DDRAB_DDRB5_MASK 0x20U
#define DDRAB_DDRB6_MASK 0x40U
#define DDRAB_DDRB7_MASK 0x80U
#define DDRAB_DDRA0_MASK 0x0100U
#define DDRAB_DDRA1_MASK 0x0200U
#define DDRAB_DDRA2_MASK 0x0400U
#define DDRAB_DDRA3_MASK 0x0800U
#define DDRAB_DDRA4_MASK 0x1000U
#define DDRAB_DDRA5_MASK 0x2000U
#define DDRAB_DDRA6_MASK 0x4000U
#define DDRAB_DDRA7_MASK 0x8000U
#define DDRAB_DDRB_MASK 0xFFU
#define DDRAB_DDRB_BITNUM 0x00U
#define DDRAB_DDRA_MASK 0xFF00U
#define DDRAB_DDRA_BITNUM 0x08U
/*** PORTCD - Port CD Data Register; 0x00000004 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PORTC - Port C Data Register; 0x00000004 ***/
union {
byte Byte;
struct {
byte PC0 :1; /* Port C Bit 0 */
byte PC1 :1; /* Port C Bit 1 */
byte PC2 :1; /* Port C Bit 2 */
byte PC3 :1; /* Port C Bit 3 */
byte PC4 :1; /* Port C Bit 4 */
byte PC5 :1; /* Port C Bit 5 */
byte PC6 :1; /* Port C Bit 6 */
byte PC7 :1; /* Port C Bit 7 */
} Bits;
} PORTCSTR;
#define PORTC _PORTCD.Overlap_STR.PORTCSTR.Byte
#define PORTC_PC0 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC0
#define PORTC_PC1 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC1
#define PORTC_PC2 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC2
#define PORTC_PC3 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC3
#define PORTC_PC4 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC4
#define PORTC_PC5 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC5
#define PORTC_PC6 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC6
#define PORTC_PC7 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC7
#define PORTC_PC0_MASK 0x01U
#define PORTC_PC1_MASK 0x02U
#define PORTC_PC2_MASK 0x04U
#define PORTC_PC3_MASK 0x08U
#define PORTC_PC4_MASK 0x10U
#define PORTC_PC5_MASK 0x20U
#define PORTC_PC6_MASK 0x40U
#define PORTC_PC7_MASK 0x80U
/*** PORTD - Port D Data Register; 0x00000005 ***/
union {
byte Byte;
struct {
byte PD0 :1; /* Port D Bit 0 */
byte PD1 :1; /* Port D Bit 1 */
byte PD2 :1; /* Port D Bit 2 */
byte PD3 :1; /* Port D Bit 3 */
byte PD4 :1; /* Port D Bit 4 */
byte PD5 :1; /* Port D Bit 5 */
byte PD6 :1; /* Port D Bit 6 */
byte PD7 :1; /* Port D Bit 7 */
} Bits;
} PORTDSTR;
#define PORTD _PORTCD.Overlap_STR.PORTDSTR.Byte
#define PORTD_PD0 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD0
#define PORTD_PD1 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD1
#define PORTD_PD2 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD2
#define PORTD_PD3 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD3
#define PORTD_PD4 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD4
#define PORTD_PD5 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD5
#define PORTD_PD6 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD6
#define PORTD_PD7 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD7
#define PORTD_PD0_MASK 0x01U
#define PORTD_PD1_MASK 0x02U
#define PORTD_PD2_MASK 0x04U
#define PORTD_PD3_MASK 0x08U
#define PORTD_PD4_MASK 0x10U
#define PORTD_PD5_MASK 0x20U
#define PORTD_PD6_MASK 0x40U
#define PORTD_PD7_MASK 0x80U
} Overlap_STR;
struct {
word PD0 :1; /* Port D Bit 0 */
word PD1 :1; /* Port D Bit 1 */
word PD2 :1; /* Port D Bit 2 */
word PD3 :1; /* Port D Bit 3 */
word PD4 :1; /* Port D Bit 4 */
word PD5 :1; /* Port D Bit 5 */
word PD6 :1; /* Port D Bit 6 */
word PD7 :1; /* Port D Bit 7 */
word PC0 :1; /* Port C Bit 0 */
word PC1 :1; /* Port C Bit 1 */
word PC2 :1; /* Port C Bit 2 */
word PC3 :1; /* Port C Bit 3 */
word PC4 :1; /* Port C Bit 4 */
word PC5 :1; /* Port C Bit 5 */
word PC6 :1; /* Port C Bit 6 */
word PC7 :1; /* Port C Bit 7 */
} Bits;
struct {
word grpPD :8;
word grpPC :8;
} MergedBits;
} PORTCDSTR;
extern volatile PORTCDSTR _PORTCD @(REG_BASE + 0x00000004UL);
#define PORTCD _PORTCD.Word
#define PORTCD_PD0 _PORTCD.Bits.PD0
#define PORTCD_PD1 _PORTCD.Bits.PD1
#define PORTCD_PD2 _PORTCD.Bits.PD2
#define PORTCD_PD3 _PORTCD.Bits.PD3
#define PORTCD_PD4 _PORTCD.Bits.PD4
#define PORTCD_PD5 _PORTCD.Bits.PD5
#define PORTCD_PD6 _PORTCD.Bits.PD6
#define PORTCD_PD7 _PORTCD.Bits.PD7
#define PORTCD_PC0 _PORTCD.Bits.PC0
#define PORTCD_PC1 _PORTCD.Bits.PC1
#define PORTCD_PC2 _PORTCD.Bits.PC2
#define PORTCD_PC3 _PORTCD.Bits.PC3
#define PORTCD_PC4 _PORTCD.Bits.PC4
#define PORTCD_PC5 _PORTCD.Bits.PC5
#define PORTCD_PC6 _PORTCD.Bits.PC6
#define PORTCD_PC7 _PORTCD.Bits.PC7
#define PORTCD_PD _PORTCD.MergedBits.grpPD
#define PORTCD_PC _PORTCD.MergedBits.grpPC
#define PORTCD_PD0_MASK 0x01U
#define PORTCD_PD1_MASK 0x02U
#define PORTCD_PD2_MASK 0x04U
#define PORTCD_PD3_MASK 0x08U
#define PORTCD_PD4_MASK 0x10U
#define PORTCD_PD5_MASK 0x20U
#define PORTCD_PD6_MASK 0x40U
#define PORTCD_PD7_MASK 0x80U
#define PORTCD_PC0_MASK 0x0100U
#define PORTCD_PC1_MASK 0x0200U
#define PORTCD_PC2_MASK 0x0400U
#define PORTCD_PC3_MASK 0x0800U
#define PORTCD_PC4_MASK 0x1000U
#define PORTCD_PC5_MASK 0x2000U
#define PORTCD_PC6_MASK 0x4000U
#define PORTCD_PC7_MASK 0x8000U
#define PORTCD_PD_MASK 0xFFU
#define PORTCD_PD_BITNUM 0x00U
#define PORTCD_PC_MASK 0xFF00U
#define PORTCD_PC_BITNUM 0x08U
/*** DDRCD - Port CD Data Direction Register; 0x00000006 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** DDRC - Port C Data Direction Register; 0x00000006 ***/
union {
byte Byte;
struct {
byte DDRC0 :1; /* Data Direction Port C Bit 0 */
byte DDRC1 :1; /* Data Direction Port C Bit 1 */
byte DDRC2 :1; /* Data Direction Port C Bit 2 */
byte DDRC3 :1; /* Data Direction Port C Bit 3 */
byte DDRC4 :1; /* Data Direction Port C Bit 4 */
byte DDRC5 :1; /* Data Direction Port C Bit 5 */
byte DDRC6 :1; /* Data Direction Port C Bit 6 */
byte DDRC7 :1; /* Data Direction Port C Bit 7 */
} Bits;
} DDRCSTR;
#define DDRC _DDRCD.Overlap_STR.DDRCSTR.Byte
#define DDRC_DDRC0 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC0
#define DDRC_DDRC1 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC1
#define DDRC_DDRC2 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC2
#define DDRC_DDRC3 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC3
#define DDRC_DDRC4 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC4
#define DDRC_DDRC5 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC5
#define DDRC_DDRC6 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC6
#define DDRC_DDRC7 _DDRCD.Overlap_STR.DDRCSTR.Bits.DDRC7
#define DDRC_DDRC0_MASK 0x01U
#define DDRC_DDRC1_MASK 0x02U
#define DDRC_DDRC2_MASK 0x04U
#define DDRC_DDRC3_MASK 0x08U
#define DDRC_DDRC4_MASK 0x10U
#define DDRC_DDRC5_MASK 0x20U
#define DDRC_DDRC6_MASK 0x40U
#define DDRC_DDRC7_MASK 0x80U
/*** DDRD - Port D Data Direction Register; 0x00000007 ***/
union {
byte Byte;
struct {
byte DDRD0 :1; /* Data Direction Port D Bit 0 */
byte DDRD1 :1; /* Data Direction Port D Bit 1 */
byte DDRD2 :1; /* Data Direction Port D Bit 2 */
byte DDRD3 :1; /* Data Direction Port D Bit 3 */
byte DDRD4 :1; /* Data Direction Port D Bit 4 */
byte DDRD5 :1; /* Data Direction Port D Bit 5 */
byte DDRD6 :1; /* Data Direction Port D Bit 6 */
byte DDRD7 :1; /* Data Direction Port D Bit 7 */
} Bits;
} DDRDSTR;
#define DDRD _DDRCD.Overlap_STR.DDRDSTR.Byte
#define DDRD_DDRD0 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD0
#define DDRD_DDRD1 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD1
#define DDRD_DDRD2 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD2
#define DDRD_DDRD3 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD3
#define DDRD_DDRD4 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD4
#define DDRD_DDRD5 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD5
#define DDRD_DDRD6 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD6
#define DDRD_DDRD7 _DDRCD.Overlap_STR.DDRDSTR.Bits.DDRD7
#define DDRD_DDRD0_MASK 0x01U
#define DDRD_DDRD1_MASK 0x02U
#define DDRD_DDRD2_MASK 0x04U
#define DDRD_DDRD3_MASK 0x08U
#define DDRD_DDRD4_MASK 0x10U
#define DDRD_DDRD5_MASK 0x20U
#define DDRD_DDRD6_MASK 0x40U
#define DDRD_DDRD7_MASK 0x80U
} Overlap_STR;
struct {
word DDRD0 :1; /* Data Direction Port D Bit 0 */
word DDRD1 :1; /* Data Direction Port D Bit 1 */
word DDRD2 :1; /* Data Direction Port D Bit 2 */
word DDRD3 :1; /* Data Direction Port D Bit 3 */
word DDRD4 :1; /* Data Direction Port D Bit 4 */
word DDRD5 :1; /* Data Direction Port D Bit 5 */
word DDRD6 :1; /* Data Direction Port D Bit 6 */
word DDRD7 :1; /* Data Direction Port D Bit 7 */
word DDRC0 :1; /* Data Direction Port C Bit 0 */
word DDRC1 :1; /* Data Direction Port C Bit 1 */
word DDRC2 :1; /* Data Direction Port C Bit 2 */
word DDRC3 :1; /* Data Direction Port C Bit 3 */
word DDRC4 :1; /* Data Direction Port C Bit 4 */
word DDRC5 :1; /* Data Direction Port C Bit 5 */
word DDRC6 :1; /* Data Direction Port C Bit 6 */
word DDRC7 :1; /* Data Direction Port C Bit 7 */
} Bits;
struct {
word grpDDRD :8;
word grpDDRC :8;
} MergedBits;
} DDRCDSTR;
extern volatile DDRCDSTR _DDRCD @(REG_BASE + 0x00000006UL);
#define DDRCD _DDRCD.Word
#define DDRCD_DDRD0 _DDRCD.Bits.DDRD0
#define DDRCD_DDRD1 _DDRCD.Bits.DDRD1
#define DDRCD_DDRD2 _DDRCD.Bits.DDRD2
#define DDRCD_DDRD3 _DDRCD.Bits.DDRD3
#define DDRCD_DDRD4 _DDRCD.Bits.DDRD4
#define DDRCD_DDRD5 _DDRCD.Bits.DDRD5
#define DDRCD_DDRD6 _DDRCD.Bits.DDRD6
#define DDRCD_DDRD7 _DDRCD.Bits.DDRD7
#define DDRCD_DDRC0 _DDRCD.Bits.DDRC0
#define DDRCD_DDRC1 _DDRCD.Bits.DDRC1
#define DDRCD_DDRC2 _DDRCD.Bits.DDRC2
#define DDRCD_DDRC3 _DDRCD.Bits.DDRC3
#define DDRCD_DDRC4 _DDRCD.Bits.DDRC4
#define DDRCD_DDRC5 _DDRCD.Bits.DDRC5
#define DDRCD_DDRC6 _DDRCD.Bits.DDRC6
#define DDRCD_DDRC7 _DDRCD.Bits.DDRC7
#define DDRCD_DDRD _DDRCD.MergedBits.grpDDRD
#define DDRCD_DDRC _DDRCD.MergedBits.grpDDRC
#define DDRCD_DDRD0_MASK 0x01U
#define DDRCD_DDRD1_MASK 0x02U
#define DDRCD_DDRD2_MASK 0x04U
#define DDRCD_DDRD3_MASK 0x08U
#define DDRCD_DDRD4_MASK 0x10U
#define DDRCD_DDRD5_MASK 0x20U
#define DDRCD_DDRD6_MASK 0x40U
#define DDRCD_DDRD7_MASK 0x80U
#define DDRCD_DDRC0_MASK 0x0100U
#define DDRCD_DDRC1_MASK 0x0200U
#define DDRCD_DDRC2_MASK 0x0400U
#define DDRCD_DDRC3_MASK 0x0800U
#define DDRCD_DDRC4_MASK 0x1000U
#define DDRCD_DDRC5_MASK 0x2000U
#define DDRCD_DDRC6_MASK 0x4000U
#define DDRCD_DDRC7_MASK 0x8000U
#define DDRCD_DDRD_MASK 0xFFU
#define DDRCD_DDRD_BITNUM 0x00U
#define DDRCD_DDRC_MASK 0xFF00U
#define DDRCD_DDRC_BITNUM 0x08U
/*** PORTE - Port E Data Register; 0x00000008 ***/
typedef union {
byte Byte;
struct {
byte PE0 :1; /* Port E Bit 0 */
byte PE1 :1; /* Port E Bit 1 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpPE :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} PORTESTR;
extern volatile PORTESTR _PORTE @(REG_BASE + 0x00000008UL);
#define PORTE _PORTE.Byte
#define PORTE_PE0 _PORTE.Bits.PE0
#define PORTE_PE1 _PORTE.Bits.PE1
#define PORTE_PE _PORTE.MergedBits.grpPE
#define PORTE_PE0_MASK 0x01U
#define PORTE_PE1_MASK 0x02U
#define PORTE_PE_MASK 0x03U
#define PORTE_PE_BITNUM 0x00U
/*** DDRE - Port E Data Direction Register; 0x00000009 ***/
typedef union {
byte Byte;
struct {
byte DDRE0 :1; /* Data Direction Port E Bit 0 */
byte DDRE1 :1; /* Data Direction Port E Bit 1 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpDDRE :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DDRESTR;
extern volatile DDRESTR _DDRE @(REG_BASE + 0x00000009UL);
#define DDRE _DDRE.Byte
#define DDRE_DDRE0 _DDRE.Bits.DDRE0
#define DDRE_DDRE1 _DDRE.Bits.DDRE1
#define DDRE_DDRE _DDRE.MergedBits.grpDDRE
#define DDRE_DDRE0_MASK 0x01U
#define DDRE_DDRE1_MASK 0x02U
#define DDRE_DDRE_MASK 0x03U
#define DDRE_DDRE_BITNUM 0x00U
/*** MODE - Mode Register; 0x0000000B ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte MODC :1; /* Mode Select Bit */
} Bits;
} MODESTR;
extern volatile MODESTR _MODE @(REG_BASE + 0x0000000BUL);
#define MODE _MODE.Byte
#define MODE_MODC _MODE.Bits.MODC
#define MODE_MODC_MASK 0x80U
/*** PUCR - Pull-Up Control Register; 0x0000000C ***/
typedef union {
byte Byte;
struct {
byte PUPAE :1; /* Pull-up Port A Enable */
byte PUPBE :1; /* Pull-up Port B Enable */
byte PUPCE :1; /* Pull-up Port C Enable */
byte PUPDE :1; /* Pull-up Port D Enable */
byte PDPEE :1; /* Pull-up Port E Enable */
byte :1;
byte BKPUE :1; /* BKGD and VREGEN Pin Pull-up Enable */
byte :1;
} Bits;
} PUCRSTR;
extern volatile PUCRSTR _PUCR @(REG_BASE + 0x0000000CUL);
#define PUCR _PUCR.Byte
#define PUCR_PUPAE _PUCR.Bits.PUPAE
#define PUCR_PUPBE _PUCR.Bits.PUPBE
#define PUCR_PUPCE _PUCR.Bits.PUPCE
#define PUCR_PUPDE _PUCR.Bits.PUPDE
#define PUCR_PDPEE _PUCR.Bits.PDPEE
#define PUCR_BKPUE _PUCR.Bits.BKPUE
#define PUCR_PUPAE_MASK 0x01U
#define PUCR_PUPBE_MASK 0x02U
#define PUCR_PUPCE_MASK 0x04U
#define PUCR_PUPDE_MASK 0x08U
#define PUCR_PDPEE_MASK 0x10U
#define PUCR_BKPUE_MASK 0x40U
/*** DIRECT - Direct Page Register; 0x00000011 ***/
typedef union {
byte Byte;
struct {
byte DP8 :1; /* Direct Page Index Bit 8 */
byte DP9 :1; /* Direct Page Index Bit 9 */
byte DP10 :1; /* Direct Page Index Bit 10 */
byte DP11 :1; /* Direct Page Index Bit 11 */
byte DP12 :1; /* Direct Page Index Bit 12 */
byte DP13 :1; /* Direct Page Index Bit 13 */
byte DP14 :1; /* Direct Page Index Bit 14 */
byte DP15 :1; /* Direct Page Index Bit 15 */
} Bits;
} DIRECTSTR;
extern volatile DIRECTSTR _DIRECT @(REG_BASE + 0x00000011UL);
#define DIRECT _DIRECT.Byte
#define DIRECT_DP8 _DIRECT.Bits.DP8
#define DIRECT_DP9 _DIRECT.Bits.DP9
#define DIRECT_DP10 _DIRECT.Bits.DP10
#define DIRECT_DP11 _DIRECT.Bits.DP11
#define DIRECT_DP12 _DIRECT.Bits.DP12
#define DIRECT_DP13 _DIRECT.Bits.DP13
#define DIRECT_DP14 _DIRECT.Bits.DP14
#define DIRECT_DP15 _DIRECT.Bits.DP15
#define DIRECT_DP8_MASK 0x01U
#define DIRECT_DP9_MASK 0x02U
#define DIRECT_DP10_MASK 0x04U
#define DIRECT_DP11_MASK 0x08U
#define DIRECT_DP12_MASK 0x10U
#define DIRECT_DP13_MASK 0x20U
#define DIRECT_DP14_MASK 0x40U
#define DIRECT_DP15_MASK 0x80U
/*** MMCCTL1 - MMC Control Register; 0x00000013 ***/
typedef union {
byte Byte;
struct {
byte NVMRES :1; /* Map internal NVM resources into the global memory map */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} MMCCTL1STR;
extern volatile MMCCTL1STR _MMCCTL1 @(REG_BASE + 0x00000013UL);
#define MMCCTL1 _MMCCTL1.Byte
#define MMCCTL1_NVMRES _MMCCTL1.Bits.NVMRES
#define MMCCTL1_NVMRES_MASK 0x01U
/*** PPAGE - Program Page Index Register; 0x00000015 ***/
typedef union {
byte Byte;
struct {
byte PIX0 :1; /* Program Page Index Bit 0 */
byte PIX1 :1; /* Program Page Index Bit 1 */
byte PIX2 :1; /* Program Page Index Bit 2 */
byte PIX3 :1; /* Program Page Index Bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpPIX :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} PPAGESTR;
extern volatile PPAGESTR _PPAGE @(REG_BASE + 0x00000015UL);
#define PPAGE _PPAGE.Byte
#define PPAGE_PIX0 _PPAGE.Bits.PIX0
#define PPAGE_PIX1 _PPAGE.Bits.PIX1
#define PPAGE_PIX2 _PPAGE.Bits.PIX2
#define PPAGE_PIX3 _PPAGE.Bits.PIX3
#define PPAGE_PIX _PPAGE.MergedBits.grpPIX
#define PPAGE_PIX0_MASK 0x01U
#define PPAGE_PIX1_MASK 0x02U
#define PPAGE_PIX2_MASK 0x04U
#define PPAGE_PIX3_MASK 0x08U
#define PPAGE_PIX_MASK 0x0FU
#define PPAGE_PIX_BITNUM 0x00U
/*** PARTID - Part ID Register; 0x0000001A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PARTIDH - Part ID Register High; 0x0000001A ***/
union {
byte Byte;
struct {
byte ID8 :1; /* Part ID Register Bit 8 */
byte ID9 :1; /* Part ID Register Bit 9 */
byte ID10 :1; /* Part ID Register Bit 10 */
byte ID11 :1; /* Part ID Register Bit 11 */
byte ID12 :1; /* Part ID Register Bit 12 */
byte ID13 :1; /* Part ID Register Bit 13 */
byte ID14 :1; /* Part ID Register Bit 14 */
byte ID15 :1; /* Part ID Register Bit 15 */
} Bits;
} PARTIDHSTR;
#define PARTIDH _PARTID.Overlap_STR.PARTIDHSTR.Byte
#define PARTIDH_ID8 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID8
#define PARTIDH_ID9 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID9
#define PARTIDH_ID10 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID10
#define PARTIDH_ID11 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID11
#define PARTIDH_ID12 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID12
#define PARTIDH_ID13 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID13
#define PARTIDH_ID14 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID14
#define PARTIDH_ID15 _PARTID.Overlap_STR.PARTIDHSTR.Bits.ID15
#define PARTIDH_ID8_MASK 0x01U
#define PARTIDH_ID9_MASK 0x02U
#define PARTIDH_ID10_MASK 0x04U
#define PARTIDH_ID11_MASK 0x08U
#define PARTIDH_ID12_MASK 0x10U
#define PARTIDH_ID13_MASK 0x20U
#define PARTIDH_ID14_MASK 0x40U
#define PARTIDH_ID15_MASK 0x80U
/*** PARTIDL - Part ID Register Low; 0x0000001B ***/
union {
byte Byte;
struct {
byte ID0 :1; /* Part ID Register Bit 0 */
byte ID1 :1; /* Part ID Register Bit 1 */
byte ID2 :1; /* Part ID Register Bit 2 */
byte ID3 :1; /* Part ID Register Bit 3 */
byte ID4 :1; /* Part ID Register Bit 4 */
byte ID5 :1; /* Part ID Register Bit 5 */
byte ID6 :1; /* Part ID Register Bit 6 */
byte ID7 :1; /* Part ID Register Bit 7 */
} Bits;
} PARTIDLSTR;
#define PARTIDL _PARTID.Overlap_STR.PARTIDLSTR.Byte
#define PARTIDL_ID0 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID0
#define PARTIDL_ID1 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID1
#define PARTIDL_ID2 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID2
#define PARTIDL_ID3 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID3
#define PARTIDL_ID4 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID4
#define PARTIDL_ID5 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID5
#define PARTIDL_ID6 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID6
#define PARTIDL_ID7 _PARTID.Overlap_STR.PARTIDLSTR.Bits.ID7
#define PARTIDL_ID0_MASK 0x01U
#define PARTIDL_ID1_MASK 0x02U
#define PARTIDL_ID2_MASK 0x04U
#define PARTIDL_ID3_MASK 0x08U
#define PARTIDL_ID4_MASK 0x10U
#define PARTIDL_ID5_MASK 0x20U
#define PARTIDL_ID6_MASK 0x40U
#define PARTIDL_ID7_MASK 0x80U
} Overlap_STR;
struct {
word ID0 :1; /* Part ID Register Bit 0 */
word ID1 :1; /* Part ID Register Bit 1 */
word ID2 :1; /* Part ID Register Bit 2 */
word ID3 :1; /* Part ID Register Bit 3 */
word ID4 :1; /* Part ID Register Bit 4 */
word ID5 :1; /* Part ID Register Bit 5 */
word ID6 :1; /* Part ID Register Bit 6 */
word ID7 :1; /* Part ID Register Bit 7 */
word ID8 :1; /* Part ID Register Bit 8 */
word ID9 :1; /* Part ID Register Bit 9 */
word ID10 :1; /* Part ID Register Bit 10 */
word ID11 :1; /* Part ID Register Bit 11 */
word ID12 :1; /* Part ID Register Bit 12 */
word ID13 :1; /* Part ID Register Bit 13 */
word ID14 :1; /* Part ID Register Bit 14 */
word ID15 :1; /* Part ID Register Bit 15 */
} Bits;
} PARTIDSTR;
extern volatile PARTIDSTR _PARTID @(REG_BASE + 0x0000001AUL);
#define PARTID _PARTID.Word
#define PARTID_ID0 _PARTID.Bits.ID0
#define PARTID_ID1 _PARTID.Bits.ID1
#define PARTID_ID2 _PARTID.Bits.ID2
#define PARTID_ID3 _PARTID.Bits.ID3
#define PARTID_ID4 _PARTID.Bits.ID4
#define PARTID_ID5 _PARTID.Bits.ID5
#define PARTID_ID6 _PARTID.Bits.ID6
#define PARTID_ID7 _PARTID.Bits.ID7
#define PARTID_ID8 _PARTID.Bits.ID8
#define PARTID_ID9 _PARTID.Bits.ID9
#define PARTID_ID10 _PARTID.Bits.ID10
#define PARTID_ID11 _PARTID.Bits.ID11
#define PARTID_ID12 _PARTID.Bits.ID12
#define PARTID_ID13 _PARTID.Bits.ID13
#define PARTID_ID14 _PARTID.Bits.ID14
#define PARTID_ID15 _PARTID.Bits.ID15
#define PARTID_ID0_MASK 0x01U
#define PARTID_ID1_MASK 0x02U
#define PARTID_ID2_MASK 0x04U
#define PARTID_ID3_MASK 0x08U
#define PARTID_ID4_MASK 0x10U
#define PARTID_ID5_MASK 0x20U
#define PARTID_ID6_MASK 0x40U
#define PARTID_ID7_MASK 0x80U
#define PARTID_ID8_MASK 0x0100U
#define PARTID_ID9_MASK 0x0200U
#define PARTID_ID10_MASK 0x0400U
#define PARTID_ID11_MASK 0x0800U
#define PARTID_ID12_MASK 0x1000U
#define PARTID_ID13_MASK 0x2000U
#define PARTID_ID14_MASK 0x4000U
#define PARTID_ID15_MASK 0x8000U
/*** ECLKCTL - ECLK Control Register; 0x0000001C ***/
typedef union {
byte Byte;
struct {
byte EDIV0 :1; /* Free-running ECLK Divider, bit 0 */
byte EDIV1 :1; /* Free-running ECLK Divider, bit 1 */
byte EDIV2 :1; /* Free-running ECLK Divider, bit 2 */
byte EDIV3 :1; /* Free-running ECLK Divider, bit 3 */
byte EDIV4 :1; /* Free-running ECLK Divider, bit 4 */
byte DIV16 :1; /* Free-running ECLK predivider */
byte NCLKX2 :1; /* No ECLKX2 */
byte NECLK :1; /* No ECLK */
} Bits;
struct {
byte grpEDIV :5;
byte grpDIV_16 :1;
byte grpNCLKX_2 :1;
byte :1;
} MergedBits;
} ECLKCTLSTR;
extern volatile ECLKCTLSTR _ECLKCTL @(REG_BASE + 0x0000001CUL);
#define ECLKCTL _ECLKCTL.Byte
#define ECLKCTL_EDIV0 _ECLKCTL.Bits.EDIV0
#define ECLKCTL_EDIV1 _ECLKCTL.Bits.EDIV1
#define ECLKCTL_EDIV2 _ECLKCTL.Bits.EDIV2
#define ECLKCTL_EDIV3 _ECLKCTL.Bits.EDIV3
#define ECLKCTL_EDIV4 _ECLKCTL.Bits.EDIV4
#define ECLKCTL_DIV16 _ECLKCTL.Bits.DIV16
#define ECLKCTL_NCLKX2 _ECLKCTL.Bits.NCLKX2
#define ECLKCTL_NECLK _ECLKCTL.Bits.NECLK
#define ECLKCTL_EDIV _ECLKCTL.MergedBits.grpEDIV
#define ECLKCTL_EDIV0_MASK 0x01U
#define ECLKCTL_EDIV1_MASK 0x02U
#define ECLKCTL_EDIV2_MASK 0x04U
#define ECLKCTL_EDIV3_MASK 0x08U
#define ECLKCTL_EDIV4_MASK 0x10U
#define ECLKCTL_DIV16_MASK 0x20U
#define ECLKCTL_NCLKX2_MASK 0x40U
#define ECLKCTL_NECLK_MASK 0x80U
#define ECLKCTL_EDIV_MASK 0x1FU
#define ECLKCTL_EDIV_BITNUM 0x00U
/*** IRQCR - Interrupt Control Register; 0x0000001E ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte IRQEN :1; /* External IRQ Enable */
byte IRQE :1; /* IRQ Select Edge Sensitive Only */
} Bits;
} IRQCRSTR;
extern volatile IRQCRSTR _IRQCR @(REG_BASE + 0x0000001EUL);
#define IRQCR _IRQCR.Byte
#define IRQCR_IRQEN _IRQCR.Bits.IRQEN
#define IRQCR_IRQE _IRQCR.Bits.IRQE
#define IRQCR_IRQEN_MASK 0x40U
#define IRQCR_IRQE_MASK 0x80U
/*** DBGC1 - Debug Control Register 1; 0x00000020 ***/
typedef union {
byte Byte;
struct {
byte COMRV0 :1; /* Comparator Register Visibility Bits, bit 0 */
byte COMRV1 :1; /* Comparator Register Visibility Bits, bit 1 */
byte :1;
byte DBGBRK :1; /* S12XDBG Breakpoint Enable Bit 1 */
byte BDM :1; /* Background Debug Mode Enable */
byte :1;
byte TRIG :1; /* Immediate Trigger Request Bit */
byte ARM :1; /* Arm Bit */
} Bits;
struct {
byte grpCOMRV :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DBGC1STR;
extern volatile DBGC1STR _DBGC1 @(REG_BASE + 0x00000020UL);
#define DBGC1 _DBGC1.Byte
#define DBGC1_COMRV0 _DBGC1.Bits.COMRV0
#define DBGC1_COMRV1 _DBGC1.Bits.COMRV1
#define DBGC1_DBGBRK _DBGC1.Bits.DBGBRK
#define DBGC1_BDM _DBGC1.Bits.BDM
#define DBGC1_TRIG _DBGC1.Bits.TRIG
#define DBGC1_ARM _DBGC1.Bits.ARM
#define DBGC1_COMRV _DBGC1.MergedBits.grpCOMRV
#define DBGC1_COMRV0_MASK 0x01U
#define DBGC1_COMRV1_MASK 0x02U
#define DBGC1_DBGBRK_MASK 0x08U
#define DBGC1_BDM_MASK 0x10U
#define DBGC1_TRIG_MASK 0x40U
#define DBGC1_ARM_MASK 0x80U
#define DBGC1_COMRV_MASK 0x03U
#define DBGC1_COMRV_BITNUM 0x00U
/*** DBGSR - Debug Status Register; 0x00000021 ***/
typedef union {
byte Byte;
struct {
byte SSF0 :1; /* State Sequencer Flag Bits */
byte SSF1 :1; /* State Sequencer Flag Bit 1 */
byte SSF2 :1; /* State Sequencer Flag Bit 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte TBF :1; /* Trace Buffer Full */
} Bits;
struct {
byte grpSSF :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DBGSRSTR;
extern volatile DBGSRSTR _DBGSR @(REG_BASE + 0x00000021UL);
#define DBGSR _DBGSR.Byte
#define DBGSR_SSF0 _DBGSR.Bits.SSF0
#define DBGSR_SSF1 _DBGSR.Bits.SSF1
#define DBGSR_SSF2 _DBGSR.Bits.SSF2
#define DBGSR_TBF _DBGSR.Bits.TBF
#define DBGSR_SSF _DBGSR.MergedBits.grpSSF
#define DBGSR_SSF0_MASK 0x01U
#define DBGSR_SSF1_MASK 0x02U
#define DBGSR_SSF2_MASK 0x04U
#define DBGSR_TBF_MASK 0x80U
#define DBGSR_SSF_MASK 0x07U
#define DBGSR_SSF_BITNUM 0x00U
/*** DBGTCR - Debug Trace Control Register; 0x00000022 ***/
typedef union {
byte Byte;
struct {
byte TALIGN :1; /* Trigger Align Bit */
byte :1;
byte TRCMOD0 :1; /* Trace Mode Bits, bit 0 */
byte TRCMOD1 :1; /* Trace Mode Bits, bit 1 */
byte :1;
byte :1;
byte TSOURCE :1; /* Trace Source Control Bits */
byte :1;
} Bits;
struct {
byte :1;
byte :1;
byte grpTRCMOD :2;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DBGTCRSTR;
extern volatile DBGTCRSTR _DBGTCR @(REG_BASE + 0x00000022UL);
#define DBGTCR _DBGTCR.Byte
#define DBGTCR_TALIGN _DBGTCR.Bits.TALIGN
#define DBGTCR_TRCMOD0 _DBGTCR.Bits.TRCMOD0
#define DBGTCR_TRCMOD1 _DBGTCR.Bits.TRCMOD1
#define DBGTCR_TSOURCE _DBGTCR.Bits.TSOURCE
#define DBGTCR_TRCMOD _DBGTCR.MergedBits.grpTRCMOD
#define DBGTCR_TALIGN_MASK 0x01U
#define DBGTCR_TRCMOD0_MASK 0x04U
#define DBGTCR_TRCMOD1_MASK 0x08U
#define DBGTCR_TSOURCE_MASK 0x40U
#define DBGTCR_TRCMOD_MASK 0x0CU
#define DBGTCR_TRCMOD_BITNUM 0x02U
/*** DBGC2 - Debug Control Register 2; 0x00000023 ***/
typedef union {
byte Byte;
struct {
byte ABCM0 :1; /* A and B Comparator Match Control, bit 0 */
byte ABCM1 :1; /* A and B Comparator Match Control, bit 1 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpABCM :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DBGC2STR;
extern volatile DBGC2STR _DBGC2 @(REG_BASE + 0x00000023UL);
#define DBGC2 _DBGC2.Byte
#define DBGC2_ABCM0 _DBGC2.Bits.ABCM0
#define DBGC2_ABCM1 _DBGC2.Bits.ABCM1
#define DBGC2_ABCM _DBGC2.MergedBits.grpABCM
#define DBGC2_ABCM0_MASK 0x01U
#define DBGC2_ABCM1_MASK 0x02U
#define DBGC2_ABCM_MASK 0x03U
#define DBGC2_ABCM_BITNUM 0x00U
/*** DBGTB - Debug Trace Buffer Register; 0x00000024 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** DBGTBH - Debug Trace Buffer Register High; 0x00000024 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Trace Buffer Data Bits */
byte BIT9 :1; /* Trace Buffer Data Bit 9 */
byte BIT10 :1; /* Trace Buffer Data Bit 10 */
byte BIT11 :1; /* Trace Buffer Data Bit 11 */
byte BIT12 :1; /* Trace Buffer Data Bit 12 */
byte BIT13 :1; /* Trace Buffer Data Bit 13 */
byte BIT14 :1; /* Trace Buffer Data Bit 14 */
byte BIT15 :1; /* Trace Buffer Data Bit 15 */
} Bits;
} DBGTBHSTR;
#define DBGTBH _DBGTB.Overlap_STR.DBGTBHSTR.Byte
#define DBGTBH_BIT8 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT8
#define DBGTBH_BIT9 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT9
#define DBGTBH_BIT10 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT10
#define DBGTBH_BIT11 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT11
#define DBGTBH_BIT12 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT12
#define DBGTBH_BIT13 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT13
#define DBGTBH_BIT14 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT14
#define DBGTBH_BIT15 _DBGTB.Overlap_STR.DBGTBHSTR.Bits.BIT15
#define DBGTBH_BIT8_MASK 0x01U
#define DBGTBH_BIT9_MASK 0x02U
#define DBGTBH_BIT10_MASK 0x04U
#define DBGTBH_BIT11_MASK 0x08U
#define DBGTBH_BIT12_MASK 0x10U
#define DBGTBH_BIT13_MASK 0x20U
#define DBGTBH_BIT14_MASK 0x40U
#define DBGTBH_BIT15_MASK 0x80U
/*** DBGTBL - Debug Trace Buffer Register Low; 0x00000025 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Trace Buffer Data Bits */
byte BIT1 :1; /* Trace Buffer Data Bit 1 */
byte BIT2 :1; /* Trace Buffer Data Bit 2 */
byte BIT3 :1; /* Trace Buffer Data Bit 3 */
byte BIT4 :1; /* Trace Buffer Data Bit 4 */
byte BIT5 :1; /* Trace Buffer Data Bit 5 */
byte BIT6 :1; /* Trace Buffer Data Bit 6 */
byte BIT7 :1; /* Trace Buffer Data Bit 7 */
} Bits;
} DBGTBLSTR;
#define DBGTBL _DBGTB.Overlap_STR.DBGTBLSTR.Byte
#define DBGTBL_BIT0 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT0
#define DBGTBL_BIT1 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT1
#define DBGTBL_BIT2 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT2
#define DBGTBL_BIT3 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT3
#define DBGTBL_BIT4 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT4
#define DBGTBL_BIT5 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT5
#define DBGTBL_BIT6 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT6
#define DBGTBL_BIT7 _DBGTB.Overlap_STR.DBGTBLSTR.Bits.BIT7
#define DBGTBL_BIT0_MASK 0x01U
#define DBGTBL_BIT1_MASK 0x02U
#define DBGTBL_BIT2_MASK 0x04U
#define DBGTBL_BIT3_MASK 0x08U
#define DBGTBL_BIT4_MASK 0x10U
#define DBGTBL_BIT5_MASK 0x20U
#define DBGTBL_BIT6_MASK 0x40U
#define DBGTBL_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Trace Buffer Data Bits */
word BIT1 :1; /* Trace Buffer Data Bit 1 */
word BIT2 :1; /* Trace Buffer Data Bit 2 */
word BIT3 :1; /* Trace Buffer Data Bit 3 */
word BIT4 :1; /* Trace Buffer Data Bit 4 */
word BIT5 :1; /* Trace Buffer Data Bit 5 */
word BIT6 :1; /* Trace Buffer Data Bit 6 */
word BIT7 :1; /* Trace Buffer Data Bit 7 */
word BIT8 :1; /* Trace Buffer Data Bit 8 */
word BIT9 :1; /* Trace Buffer Data Bit 9 */
word BIT10 :1; /* Trace Buffer Data Bit 10 */
word BIT11 :1; /* Trace Buffer Data Bit 11 */
word BIT12 :1; /* Trace Buffer Data Bit 12 */
word BIT13 :1; /* Trace Buffer Data Bit 13 */
word BIT14 :1; /* Trace Buffer Data Bit 14 */
word BIT15 :1; /* Trace Buffer Data Bit 15 */
} Bits;
} DBGTBSTR;
extern volatile DBGTBSTR _DBGTB @(REG_BASE + 0x00000024UL);
#define DBGTB _DBGTB.Word
#define DBGTB_BIT0 _DBGTB.Bits.BIT0
#define DBGTB_BIT1 _DBGTB.Bits.BIT1
#define DBGTB_BIT2 _DBGTB.Bits.BIT2
#define DBGTB_BIT3 _DBGTB.Bits.BIT3
#define DBGTB_BIT4 _DBGTB.Bits.BIT4
#define DBGTB_BIT5 _DBGTB.Bits.BIT5
#define DBGTB_BIT6 _DBGTB.Bits.BIT6
#define DBGTB_BIT7 _DBGTB.Bits.BIT7
#define DBGTB_BIT8 _DBGTB.Bits.BIT8
#define DBGTB_BIT9 _DBGTB.Bits.BIT9
#define DBGTB_BIT10 _DBGTB.Bits.BIT10
#define DBGTB_BIT11 _DBGTB.Bits.BIT11
#define DBGTB_BIT12 _DBGTB.Bits.BIT12
#define DBGTB_BIT13 _DBGTB.Bits.BIT13
#define DBGTB_BIT14 _DBGTB.Bits.BIT14
#define DBGTB_BIT15 _DBGTB.Bits.BIT15
#define DBGTB_BIT0_MASK 0x01U
#define DBGTB_BIT1_MASK 0x02U
#define DBGTB_BIT2_MASK 0x04U
#define DBGTB_BIT3_MASK 0x08U
#define DBGTB_BIT4_MASK 0x10U
#define DBGTB_BIT5_MASK 0x20U
#define DBGTB_BIT6_MASK 0x40U
#define DBGTB_BIT7_MASK 0x80U
#define DBGTB_BIT8_MASK 0x0100U
#define DBGTB_BIT9_MASK 0x0200U
#define DBGTB_BIT10_MASK 0x0400U
#define DBGTB_BIT11_MASK 0x0800U
#define DBGTB_BIT12_MASK 0x1000U
#define DBGTB_BIT13_MASK 0x2000U
#define DBGTB_BIT14_MASK 0x4000U
#define DBGTB_BIT15_MASK 0x8000U
/*** DBGCNT - Debug Count Register; 0x00000026 ***/
typedef union {
byte Byte;
struct {
byte CNT0 :1; /* Count Value, bit 0 */
byte CNT1 :1; /* Count Value, bit 1 */
byte CNT2 :1; /* Count Value, bit 2 */
byte CNT3 :1; /* Count Value, bit 3 */
byte CNT4 :1; /* Count Value, bit 4 */
byte CNT5 :1; /* Count Value, bit 5 */
byte :1;
byte TBF :1; /* Trace Buffer Full */
} Bits;
struct {
byte grpCNT :6;
byte :1;
byte :1;
} MergedBits;
} DBGCNTSTR;
extern volatile DBGCNTSTR _DBGCNT @(REG_BASE + 0x00000026UL);
#define DBGCNT _DBGCNT.Byte
#define DBGCNT_CNT0 _DBGCNT.Bits.CNT0
#define DBGCNT_CNT1 _DBGCNT.Bits.CNT1
#define DBGCNT_CNT2 _DBGCNT.Bits.CNT2
#define DBGCNT_CNT3 _DBGCNT.Bits.CNT3
#define DBGCNT_CNT4 _DBGCNT.Bits.CNT4
#define DBGCNT_CNT5 _DBGCNT.Bits.CNT5
#define DBGCNT_TBF _DBGCNT.Bits.TBF
#define DBGCNT_CNT _DBGCNT.MergedBits.grpCNT
#define DBGCNT_CNT0_MASK 0x01U
#define DBGCNT_CNT1_MASK 0x02U
#define DBGCNT_CNT2_MASK 0x04U
#define DBGCNT_CNT3_MASK 0x08U
#define DBGCNT_CNT4_MASK 0x10U
#define DBGCNT_CNT5_MASK 0x20U
#define DBGCNT_TBF_MASK 0x80U
#define DBGCNT_CNT_MASK 0x3FU
#define DBGCNT_CNT_BITNUM 0x00U
/*** DBGSCRX - Debug State Control Register; 0x00000027 ***/
typedef union {
byte Byte;
union { /* Several registers at the same address */
/*** DBGSCRX - Debug State Control Register; Several registers at the same address ***/
union {
struct {
byte SC0 :1; /* State X Sequencer Next State Selection Bit 0 */
byte SC1 :1; /* State X Sequencer Next State Selection Bit 1 */
byte SC2 :1; /* State X Sequencer Next State Selection Bit 2 */
byte SC3 :1; /* State X Sequencer Next State Selection Bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpSC :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DBGSCRXSTR;
#define DBGSCRX _DBGSCRX.Byte
#define DBGSCRX_SC0 _DBGSCRX.SameAddr_STR.DBGSCRXSTR.Bits.SC0
#define DBGSCRX_SC1 _DBGSCRX.SameAddr_STR.DBGSCRXSTR.Bits.SC1
#define DBGSCRX_SC2 _DBGSCRX.SameAddr_STR.DBGSCRXSTR.Bits.SC2
#define DBGSCRX_SC3 _DBGSCRX.SameAddr_STR.DBGSCRXSTR.Bits.SC3
#define DBGSCRX_SC _DBGSCRX.SameAddr_STR.DBGSCRXSTR.MergedBits.grpSC
#define DBGSCRX_SC0_MASK 0x01U
#define DBGSCRX_SC1_MASK 0x02U
#define DBGSCRX_SC2_MASK 0x04U
#define DBGSCRX_SC3_MASK 0x08U
#define DBGSCRX_SC_MASK 0x0FU
#define DBGSCRX_SC_BITNUM 0x00U
/*** DBGMFR - Debug Match Flag Register; Several registers at the same address ***/
union {
struct {
byte MC0 :1; /* Debug Match Flag Bit 0 */
byte MC1 :1; /* Debug Match Flag Bit 1 */
byte MC2 :1; /* Debug Match Flag Bit 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpMC :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DBGMFRSTR;
#define DBGMFR _DBGSCRX.Byte
#define DBGMFR_MC0 _DBGSCRX.SameAddr_STR.DBGMFRSTR.Bits.MC0
#define DBGMFR_MC1 _DBGSCRX.SameAddr_STR.DBGMFRSTR.Bits.MC1
#define DBGMFR_MC2 _DBGSCRX.SameAddr_STR.DBGMFRSTR.Bits.MC2
#define DBGMFR_MC _DBGSCRX.SameAddr_STR.DBGMFRSTR.MergedBits.grpMC
#define DBGMFR_MC0_MASK 0x01U
#define DBGMFR_MC1_MASK 0x02U
#define DBGMFR_MC2_MASK 0x04U
#define DBGMFR_MC_MASK 0x07U
#define DBGMFR_MC_BITNUM 0x00U
} SameAddr_STR; /*Several registers at the same address */
} DBGSCRXSTR;
extern volatile DBGSCRXSTR _DBGSCRX @(REG_BASE + 0x00000027UL);
/*** DBGXCTL - Debug Comparator Control Register; 0x00000028 ***/
typedef union {
byte Byte;
struct {
byte COMPE :1; /* Determines if comparator is enabled */
byte NDB :1; /* Not Data Bus(Comparators A and C), Size Comparator Value Bit(Comparators B and D) */
byte RWE :1; /* Read/Write Enable Bit */
byte RW :1; /* Read/Write Comparator Value Bit */
byte BRK :1; /* Break */
byte TAG :1; /* Tag Select */
byte SZ :1; /* Size Comparator Value Bit */
byte SZE :1; /* Size Comparator Enable Bit */
} Bits;
} DBGXCTLSTR;
extern volatile DBGXCTLSTR _DBGXCTL @(REG_BASE + 0x00000028UL);
#define DBGXCTL _DBGXCTL.Byte
#define DBGXCTL_COMPE _DBGXCTL.Bits.COMPE
#define DBGXCTL_NDB _DBGXCTL.Bits.NDB
#define DBGXCTL_RWE _DBGXCTL.Bits.RWE
#define DBGXCTL_RW _DBGXCTL.Bits.RW
#define DBGXCTL_BRK _DBGXCTL.Bits.BRK
#define DBGXCTL_TAG _DBGXCTL.Bits.TAG
#define DBGXCTL_SZ _DBGXCTL.Bits.SZ
#define DBGXCTL_SZE _DBGXCTL.Bits.SZE
#define DBGXCTL_COMPE_MASK 0x01U
#define DBGXCTL_NDB_MASK 0x02U
#define DBGXCTL_RWE_MASK 0x04U
#define DBGXCTL_RW_MASK 0x08U
#define DBGXCTL_BRK_MASK 0x10U
#define DBGXCTL_TAG_MASK 0x20U
#define DBGXCTL_SZ_MASK 0x40U
#define DBGXCTL_SZE_MASK 0x80U
/*** DBGXAH - Debug Comparator Address High Register; 0x00000029 ***/
typedef union {
byte Byte;
struct {
byte BIT16 :1; /* Comparator Address High Compare Bits */
byte BIT17 :1; /* Comparator Address High Compare Bit 17 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpBIT_16 :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DBGXAHSTR;
extern volatile DBGXAHSTR _DBGXAH @(REG_BASE + 0x00000029UL);
#define DBGXAH _DBGXAH.Byte
#define DBGXAH_BIT16 _DBGXAH.Bits.BIT16
#define DBGXAH_BIT17 _DBGXAH.Bits.BIT17
#define DBGXAH_BIT_16 _DBGXAH.MergedBits.grpBIT_16
#define DBGXAH_BIT DBGXAH_BIT_16
#define DBGXAH_BIT16_MASK 0x01U
#define DBGXAH_BIT17_MASK 0x02U
#define DBGXAH_BIT_16_MASK 0x03U
#define DBGXAH_BIT_16_BITNUM 0x00U
/*** DBGXAM - Debug Comparator Address Mid Register; 0x0000002A ***/
typedef union {
byte Byte;
struct {
byte BIT8 :1; /* Comparator Address Mid Compare Bits */
byte BIT9 :1; /* Comparator Address Mid Compare Bit 9 */
byte BIT10 :1; /* Comparator Address Mid Compare Bit 10 */
byte BIT11 :1; /* Comparator Address Mid Compare Bit 11 */
byte BIT12 :1; /* Comparator Address Mid Compare Bit 12 */
byte BIT13 :1; /* Comparator Address Mid Compare Bit 13 */
byte BIT14 :1; /* Comparator Address Mid Compare Bit 14 */
byte BIT15 :1; /* Comparator Address Mid Compare Bit 15 */
} Bits;
} DBGXAMSTR;
extern volatile DBGXAMSTR _DBGXAM @(REG_BASE + 0x0000002AUL);
#define DBGXAM _DBGXAM.Byte
#define DBGXAM_BIT8 _DBGXAM.Bits.BIT8
#define DBGXAM_BIT9 _DBGXAM.Bits.BIT9
#define DBGXAM_BIT10 _DBGXAM.Bits.BIT10
#define DBGXAM_BIT11 _DBGXAM.Bits.BIT11
#define DBGXAM_BIT12 _DBGXAM.Bits.BIT12
#define DBGXAM_BIT13 _DBGXAM.Bits.BIT13
#define DBGXAM_BIT14 _DBGXAM.Bits.BIT14
#define DBGXAM_BIT15 _DBGXAM.Bits.BIT15
#define DBGXAM_BIT8_MASK 0x01U
#define DBGXAM_BIT9_MASK 0x02U
#define DBGXAM_BIT10_MASK 0x04U
#define DBGXAM_BIT11_MASK 0x08U
#define DBGXAM_BIT12_MASK 0x10U
#define DBGXAM_BIT13_MASK 0x20U
#define DBGXAM_BIT14_MASK 0x40U
#define DBGXAM_BIT15_MASK 0x80U
/*** DBGXAL - Debug Comparator Address Low Register; 0x0000002B ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Comparator Address Low Compare Bits */
byte BIT1 :1; /* Comparator Address Low Compare Bit 1 */
byte BIT2 :1; /* Comparator Address Low Compare Bit 2 */
byte BIT3 :1; /* Comparator Address Low Compare Bit 3 */
byte BIT4 :1; /* Comparator Address Low Compare Bit 4 */
byte BIT5 :1; /* Comparator Address Low Compare Bit 5 */
byte BIT6 :1; /* Comparator Address Low Compare Bit 6 */
byte BIT7 :1; /* Comparator Address Low Compare Bit 7 */
} Bits;
} DBGXALSTR;
extern volatile DBGXALSTR _DBGXAL @(REG_BASE + 0x0000002BUL);
#define DBGXAL _DBGXAL.Byte
#define DBGXAL_BIT0 _DBGXAL.Bits.BIT0
#define DBGXAL_BIT1 _DBGXAL.Bits.BIT1
#define DBGXAL_BIT2 _DBGXAL.Bits.BIT2
#define DBGXAL_BIT3 _DBGXAL.Bits.BIT3
#define DBGXAL_BIT4 _DBGXAL.Bits.BIT4
#define DBGXAL_BIT5 _DBGXAL.Bits.BIT5
#define DBGXAL_BIT6 _DBGXAL.Bits.BIT6
#define DBGXAL_BIT7 _DBGXAL.Bits.BIT7
#define DBGXAL_BIT0_MASK 0x01U
#define DBGXAL_BIT1_MASK 0x02U
#define DBGXAL_BIT2_MASK 0x04U
#define DBGXAL_BIT3_MASK 0x08U
#define DBGXAL_BIT4_MASK 0x10U
#define DBGXAL_BIT5_MASK 0x20U
#define DBGXAL_BIT6_MASK 0x40U
#define DBGXAL_BIT7_MASK 0x80U
/*** DBGADH - Debug Comparator Data High Register; 0x0000002C ***/
typedef union {
byte Byte;
struct {
byte BIT8 :1; /* Comparator Data High Compare Bit 8 */
byte BIT9 :1; /* Comparator Data High Compare Bit 9 */
byte BIT10 :1; /* Comparator Data High Compare Bit 10 */
byte BIT11 :1; /* Comparator Data High Compare Bit 11 */
byte BIT12 :1; /* Comparator Data High Compare Bit 12 */
byte BIT13 :1; /* Comparator Data High Compare Bit 13 */
byte BIT14 :1; /* Comparator Data High Compare Bit 14 */
byte BIT15 :1; /* Comparator Data High Compare Bit 15 */
} Bits;
} DBGADHSTR;
extern volatile DBGADHSTR _DBGADH @(REG_BASE + 0x0000002CUL);
#define DBGADH _DBGADH.Byte
#define DBGADH_BIT8 _DBGADH.Bits.BIT8
#define DBGADH_BIT9 _DBGADH.Bits.BIT9
#define DBGADH_BIT10 _DBGADH.Bits.BIT10
#define DBGADH_BIT11 _DBGADH.Bits.BIT11
#define DBGADH_BIT12 _DBGADH.Bits.BIT12
#define DBGADH_BIT13 _DBGADH.Bits.BIT13
#define DBGADH_BIT14 _DBGADH.Bits.BIT14
#define DBGADH_BIT15 _DBGADH.Bits.BIT15
#define DBGADH_BIT8_MASK 0x01U
#define DBGADH_BIT9_MASK 0x02U
#define DBGADH_BIT10_MASK 0x04U
#define DBGADH_BIT11_MASK 0x08U
#define DBGADH_BIT12_MASK 0x10U
#define DBGADH_BIT13_MASK 0x20U
#define DBGADH_BIT14_MASK 0x40U
#define DBGADH_BIT15_MASK 0x80U
/*** DBGADL - Debug Comparator Data Low Register; 0x0000002D ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Comparator Data Low Compare Bit 0 */
byte BIT1 :1; /* Comparator Data Low Compare Bit 1 */
byte BIT2 :1; /* Comparator Data Low Compare Bit 2 */
byte BIT3 :1; /* Comparator Data Low Compare Bit 3 */
byte BIT4 :1; /* Comparator Data Low Compare Bit 4 */
byte BIT5 :1; /* Comparator Data Low Compare Bit 5 */
byte BIT6 :1; /* Comparator Data Low Compare Bit 6 */
byte BIT7 :1; /* Comparator Data Low Compare Bit 7 */
} Bits;
} DBGADLSTR;
extern volatile DBGADLSTR _DBGADL @(REG_BASE + 0x0000002DUL);
#define DBGADL _DBGADL.Byte
#define DBGADL_BIT0 _DBGADL.Bits.BIT0
#define DBGADL_BIT1 _DBGADL.Bits.BIT1
#define DBGADL_BIT2 _DBGADL.Bits.BIT2
#define DBGADL_BIT3 _DBGADL.Bits.BIT3
#define DBGADL_BIT4 _DBGADL.Bits.BIT4
#define DBGADL_BIT5 _DBGADL.Bits.BIT5
#define DBGADL_BIT6 _DBGADL.Bits.BIT6
#define DBGADL_BIT7 _DBGADL.Bits.BIT7
#define DBGADL_BIT0_MASK 0x01U
#define DBGADL_BIT1_MASK 0x02U
#define DBGADL_BIT2_MASK 0x04U
#define DBGADL_BIT3_MASK 0x08U
#define DBGADL_BIT4_MASK 0x10U
#define DBGADL_BIT5_MASK 0x20U
#define DBGADL_BIT6_MASK 0x40U
#define DBGADL_BIT7_MASK 0x80U
/*** DBGADHM - Debug Comparator Data High Mask Register; 0x0000002E ***/
typedef union {
byte Byte;
struct {
byte BIT8 :1; /* Comparator Data High Mask Bit 8 */
byte BIT9 :1; /* Comparator Data High Mask Bit 9 */
byte BIT10 :1; /* Comparator Data High Mask Bit 10 */
byte BIT11 :1; /* Comparator Data High Mask Bit 11 */
byte BIT12 :1; /* Comparator Data High Mask Bit 12 */
byte BIT13 :1; /* Comparator Data High Mask Bit 13 */
byte BIT14 :1; /* Comparator Data High Mask Bit 14 */
byte BIT15 :1; /* Comparator Data High Mask Bit 15 */
} Bits;
} DBGADHMSTR;
extern volatile DBGADHMSTR _DBGADHM @(REG_BASE + 0x0000002EUL);
#define DBGADHM _DBGADHM.Byte
#define DBGADHM_BIT8 _DBGADHM.Bits.BIT8
#define DBGADHM_BIT9 _DBGADHM.Bits.BIT9
#define DBGADHM_BIT10 _DBGADHM.Bits.BIT10
#define DBGADHM_BIT11 _DBGADHM.Bits.BIT11
#define DBGADHM_BIT12 _DBGADHM.Bits.BIT12
#define DBGADHM_BIT13 _DBGADHM.Bits.BIT13
#define DBGADHM_BIT14 _DBGADHM.Bits.BIT14
#define DBGADHM_BIT15 _DBGADHM.Bits.BIT15
#define DBGADHM_BIT8_MASK 0x01U
#define DBGADHM_BIT9_MASK 0x02U
#define DBGADHM_BIT10_MASK 0x04U
#define DBGADHM_BIT11_MASK 0x08U
#define DBGADHM_BIT12_MASK 0x10U
#define DBGADHM_BIT13_MASK 0x20U
#define DBGADHM_BIT14_MASK 0x40U
#define DBGADHM_BIT15_MASK 0x80U
/*** DBGADLM - Debug Comparator Data Low Mask Register; 0x0000002F ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Comparator Data Low Mask Bit 0 */
byte BIT1 :1; /* Comparator Data Low Mask Bit 1 */
byte BIT2 :1; /* Comparator Data Low Mask Bit 2 */
byte BIT3 :1; /* Comparator Data Low Mask Bit 3 */
byte BIT4 :1; /* Comparator Data Low Mask Bit 4 */
byte BIT5 :1; /* Comparator Data Low Mask Bit 5 */
byte BIT6 :1; /* Comparator Data Low Mask Bit 6 */
byte BIT7 :1; /* Comparator Data Low Mask Bit 7 */
} Bits;
} DBGADLMSTR;
extern volatile DBGADLMSTR _DBGADLM @(REG_BASE + 0x0000002FUL);
#define DBGADLM _DBGADLM.Byte
#define DBGADLM_BIT0 _DBGADLM.Bits.BIT0
#define DBGADLM_BIT1 _DBGADLM.Bits.BIT1
#define DBGADLM_BIT2 _DBGADLM.Bits.BIT2
#define DBGADLM_BIT3 _DBGADLM.Bits.BIT3
#define DBGADLM_BIT4 _DBGADLM.Bits.BIT4
#define DBGADLM_BIT5 _DBGADLM.Bits.BIT5
#define DBGADLM_BIT6 _DBGADLM.Bits.BIT6
#define DBGADLM_BIT7 _DBGADLM.Bits.BIT7
#define DBGADLM_BIT0_MASK 0x01U
#define DBGADLM_BIT1_MASK 0x02U
#define DBGADLM_BIT2_MASK 0x04U
#define DBGADLM_BIT3_MASK 0x08U
#define DBGADLM_BIT4_MASK 0x10U
#define DBGADLM_BIT5_MASK 0x20U
#define DBGADLM_BIT6_MASK 0x40U
#define DBGADLM_BIT7_MASK 0x80U
/*** CPMUSYNR - S12CPMU Synthesizer Register; 0x00000034 ***/
typedef union {
byte Byte;
struct {
byte SYNDIV0 :1; /* Multiplication factor of the IPLL bit 0 */
byte SYNDIV1 :1; /* Multiplication factor of the IPLL bit 1 */
byte SYNDIV2 :1; /* Multiplication factor of the IPLL bit 2 */
byte SYNDIV3 :1; /* Multiplication factor of the IPLL bit 3 */
byte SYNDIV4 :1; /* Multiplication factor of the IPLL bit 4 */
byte SYNDIV5 :1; /* Multiplication factor of the IPLL bit 5 */
byte VCOFRQ0 :1; /* VCO frequency range bit 0 */
byte VCOFRQ1 :1; /* VCO frequency range bit 1 */
} Bits;
struct {
byte grpSYNDIV :6;
byte grpVCOFRQ :2;
} MergedBits;
} CPMUSYNRSTR;
extern volatile CPMUSYNRSTR _CPMUSYNR @(REG_BASE + 0x00000034UL);
#define CPMUSYNR _CPMUSYNR.Byte
#define CPMUSYNR_SYNDIV0 _CPMUSYNR.Bits.SYNDIV0
#define CPMUSYNR_SYNDIV1 _CPMUSYNR.Bits.SYNDIV1
#define CPMUSYNR_SYNDIV2 _CPMUSYNR.Bits.SYNDIV2
#define CPMUSYNR_SYNDIV3 _CPMUSYNR.Bits.SYNDIV3
#define CPMUSYNR_SYNDIV4 _CPMUSYNR.Bits.SYNDIV4
#define CPMUSYNR_SYNDIV5 _CPMUSYNR.Bits.SYNDIV5
#define CPMUSYNR_VCOFRQ0 _CPMUSYNR.Bits.VCOFRQ0
#define CPMUSYNR_VCOFRQ1 _CPMUSYNR.Bits.VCOFRQ1
#define CPMUSYNR_SYNDIV _CPMUSYNR.MergedBits.grpSYNDIV
#define CPMUSYNR_VCOFRQ _CPMUSYNR.MergedBits.grpVCOFRQ
#define CPMUSYNR_SYNDIV0_MASK 0x01U
#define CPMUSYNR_SYNDIV1_MASK 0x02U
#define CPMUSYNR_SYNDIV2_MASK 0x04U
#define CPMUSYNR_SYNDIV3_MASK 0x08U
#define CPMUSYNR_SYNDIV4_MASK 0x10U
#define CPMUSYNR_SYNDIV5_MASK 0x20U
#define CPMUSYNR_VCOFRQ0_MASK 0x40U
#define CPMUSYNR_VCOFRQ1_MASK 0x80U
#define CPMUSYNR_SYNDIV_MASK 0x3FU
#define CPMUSYNR_SYNDIV_BITNUM 0x00U
#define CPMUSYNR_VCOFRQ_MASK 0xC0U
#define CPMUSYNR_VCOFRQ_BITNUM 0x06U
/*** CPMUREFDIV - S12CPMU Reference Divider Register; 0x00000035 ***/
typedef union {
byte Byte;
struct {
byte REFDIV0 :1; /* Finer granularity for the IPLL multiplier steps bit 0 */
byte REFDIV1 :1; /* Finer granularity for the IPLL multiplier steps bit 1 */
byte REFDIV2 :1; /* Finer granularity for the IPLL multiplier steps bit 2 */
byte REFDIV3 :1; /* Finer granularity for the IPLL multiplier steps bit 3 */
byte :1;
byte :1;
byte REFFRQ0 :1; /* IPLL optimal stability and lock time configuration bit 0 */
byte REFFRQ1 :1; /* IPLL optimal stability and lock time configuration bit 1 */
} Bits;
struct {
byte grpREFDIV :4;
byte :1;
byte :1;
byte grpREFFRQ :2;
} MergedBits;
} CPMUREFDIVSTR;
extern volatile CPMUREFDIVSTR _CPMUREFDIV @(REG_BASE + 0x00000035UL);
#define CPMUREFDIV _CPMUREFDIV.Byte
#define CPMUREFDIV_REFDIV0 _CPMUREFDIV.Bits.REFDIV0
#define CPMUREFDIV_REFDIV1 _CPMUREFDIV.Bits.REFDIV1
#define CPMUREFDIV_REFDIV2 _CPMUREFDIV.Bits.REFDIV2
#define CPMUREFDIV_REFDIV3 _CPMUREFDIV.Bits.REFDIV3
#define CPMUREFDIV_REFFRQ0 _CPMUREFDIV.Bits.REFFRQ0
#define CPMUREFDIV_REFFRQ1 _CPMUREFDIV.Bits.REFFRQ1
#define CPMUREFDIV_REFDIV _CPMUREFDIV.MergedBits.grpREFDIV
#define CPMUREFDIV_REFFRQ _CPMUREFDIV.MergedBits.grpREFFRQ
#define CPMUREFDIV_REFDIV0_MASK 0x01U
#define CPMUREFDIV_REFDIV1_MASK 0x02U
#define CPMUREFDIV_REFDIV2_MASK 0x04U
#define CPMUREFDIV_REFDIV3_MASK 0x08U
#define CPMUREFDIV_REFFRQ0_MASK 0x40U
#define CPMUREFDIV_REFFRQ1_MASK 0x80U
#define CPMUREFDIV_REFDIV_MASK 0x0FU
#define CPMUREFDIV_REFDIV_BITNUM 0x00U
#define CPMUREFDIV_REFFRQ_MASK 0xC0U
#define CPMUREFDIV_REFFRQ_BITNUM 0x06U
/*** CPMUPOSTDIV - S12CPMU Post Divider Register; 0x00000036 ***/
typedef union {
byte Byte;
struct {
byte POSTDIV0 :1; /* Frequency ratio between the VCOCLK and PLLCLK control bit 0 */
byte POSTDIV1 :1; /* Frequency ratio between the VCOCLK and PLLCLK control bit 1 */
byte POSTDIV2 :1; /* Frequency ratio between the VCOCLK and PLLCLK control bit 2 */
byte POSTDIV3 :1; /* Frequency ratio between the VCOCLK and PLLCLK control bit 3 */
byte POSTDIV4 :1; /* Frequency ratio between the VCOCLK and PLLCLK control bit 4 */
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpPOSTDIV :5;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CPMUPOSTDIVSTR;
extern volatile CPMUPOSTDIVSTR _CPMUPOSTDIV @(REG_BASE + 0x00000036UL);
#define CPMUPOSTDIV _CPMUPOSTDIV.Byte
#define CPMUPOSTDIV_POSTDIV0 _CPMUPOSTDIV.Bits.POSTDIV0
#define CPMUPOSTDIV_POSTDIV1 _CPMUPOSTDIV.Bits.POSTDIV1
#define CPMUPOSTDIV_POSTDIV2 _CPMUPOSTDIV.Bits.POSTDIV2
#define CPMUPOSTDIV_POSTDIV3 _CPMUPOSTDIV.Bits.POSTDIV3
#define CPMUPOSTDIV_POSTDIV4 _CPMUPOSTDIV.Bits.POSTDIV4
#define CPMUPOSTDIV_POSTDIV _CPMUPOSTDIV.MergedBits.grpPOSTDIV
#define CPMUPOSTDIV_POSTDIV0_MASK 0x01U
#define CPMUPOSTDIV_POSTDIV1_MASK 0x02U
#define CPMUPOSTDIV_POSTDIV2_MASK 0x04U
#define CPMUPOSTDIV_POSTDIV3_MASK 0x08U
#define CPMUPOSTDIV_POSTDIV4_MASK 0x10U
#define CPMUPOSTDIV_POSTDIV_MASK 0x1FU
#define CPMUPOSTDIV_POSTDIV_BITNUM 0x00U
/*** CPMUFLG - S12CPMU Flags Register; 0x00000037 ***/
typedef union {
byte Byte;
struct {
byte UPOSC :1; /* Oscillator Status Bit */
byte OSCIF :1; /* Oscillator Interrupt Flag */
byte ILAF :1; /* Illegal Address Reset Flag */
byte LOCK :1; /* Lock Status Bit */
byte LOCKIF :1; /* IPLL Lock Interrupt Flag */
byte LVRF :1; /* Low Voltage Reset Flag */
byte PORF :1; /* Power on Reset Flag */
byte RTIF :1; /* Real Time Interrupt Flag */
} Bits;
} CPMUFLGSTR;
extern volatile CPMUFLGSTR _CPMUFLG @(REG_BASE + 0x00000037UL);
#define CPMUFLG _CPMUFLG.Byte
#define CPMUFLG_UPOSC _CPMUFLG.Bits.UPOSC
#define CPMUFLG_OSCIF _CPMUFLG.Bits.OSCIF
#define CPMUFLG_ILAF _CPMUFLG.Bits.ILAF
#define CPMUFLG_LOCK _CPMUFLG.Bits.LOCK
#define CPMUFLG_LOCKIF _CPMUFLG.Bits.LOCKIF
#define CPMUFLG_LVRF _CPMUFLG.Bits.LVRF
#define CPMUFLG_PORF _CPMUFLG.Bits.PORF
#define CPMUFLG_RTIF _CPMUFLG.Bits.RTIF
#define CPMUFLG_UPOSC_MASK 0x01U
#define CPMUFLG_OSCIF_MASK 0x02U
#define CPMUFLG_ILAF_MASK 0x04U
#define CPMUFLG_LOCK_MASK 0x08U
#define CPMUFLG_LOCKIF_MASK 0x10U
#define CPMUFLG_LVRF_MASK 0x20U
#define CPMUFLG_PORF_MASK 0x40U
#define CPMUFLG_RTIF_MASK 0x80U
/*** CPMUINT - S12CPMU Interrupt Enable Register; 0x00000038 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte OSCIE :1; /* Oscillator Corrupt Interrupt Enable Bit */
byte :1;
byte :1;
byte LOCKIE :1; /* Lock Interrupt Enable Bit */
byte :1;
byte :1;
byte RTIE :1; /* Real Time Interrupt Enable Bit */
} Bits;
} CPMUINTSTR;
extern volatile CPMUINTSTR _CPMUINT @(REG_BASE + 0x00000038UL);
#define CPMUINT _CPMUINT.Byte
#define CPMUINT_OSCIE _CPMUINT.Bits.OSCIE
#define CPMUINT_LOCKIE _CPMUINT.Bits.LOCKIE
#define CPMUINT_RTIE _CPMUINT.Bits.RTIE
#define CPMUINT_OSCIE_MASK 0x02U
#define CPMUINT_LOCKIE_MASK 0x10U
#define CPMUINT_RTIE_MASK 0x80U
/*** CPMUCLKS - S12CPMU Clock Select Register; 0x00000039 ***/
typedef union {
byte Byte;
struct {
byte COPOSCSEL0 :1; /* COP Clock Select 0 */
byte RTIOSCSEL :1; /* RTI Clock Select */
byte PCE :1; /* COP Enable During Pseudo Stop Bit */
byte PRE :1; /* RTI Enable During Pseudo Stop Bit */
byte COPOSCSEL1 :1; /* COP Clock Select 1 */
byte :1;
byte PSTP :1; /* Pseudo Stop Bit */
byte PLLSEL :1; /* PLL Select Bit */
} Bits;
} CPMUCLKSSTR;
extern volatile CPMUCLKSSTR _CPMUCLKS @(REG_BASE + 0x00000039UL);
#define CPMUCLKS _CPMUCLKS.Byte
#define CPMUCLKS_COPOSCSEL0 _CPMUCLKS.Bits.COPOSCSEL0
#define CPMUCLKS_RTIOSCSEL _CPMUCLKS.Bits.RTIOSCSEL
#define CPMUCLKS_PCE _CPMUCLKS.Bits.PCE
#define CPMUCLKS_PRE _CPMUCLKS.Bits.PRE
#define CPMUCLKS_COPOSCSEL1 _CPMUCLKS.Bits.COPOSCSEL1
#define CPMUCLKS_PSTP _CPMUCLKS.Bits.PSTP
#define CPMUCLKS_PLLSEL _CPMUCLKS.Bits.PLLSEL
#define CPMUCLKS_COPOSCSEL0_MASK 0x01U
#define CPMUCLKS_RTIOSCSEL_MASK 0x02U
#define CPMUCLKS_PCE_MASK 0x04U
#define CPMUCLKS_PRE_MASK 0x08U
#define CPMUCLKS_COPOSCSEL1_MASK 0x10U
#define CPMUCLKS_PSTP_MASK 0x40U
#define CPMUCLKS_PLLSEL_MASK 0x80U
/*** CPMUPLL - S12CPMU PLL Control Register; 0x0000003A ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte FM0 :1; /* PLL Frequency Modulation Enable Bit 0 */
byte FM1 :1; /* PLL Frequency Modulation Enable Bit 1 */
byte :1;
byte :1;
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte grpFM :2;
byte :1;
byte :1;
} MergedBits;
} CPMUPLLSTR;
extern volatile CPMUPLLSTR _CPMUPLL @(REG_BASE + 0x0000003AUL);
#define CPMUPLL _CPMUPLL.Byte
#define CPMUPLL_FM0 _CPMUPLL.Bits.FM0
#define CPMUPLL_FM1 _CPMUPLL.Bits.FM1
#define CPMUPLL_FM _CPMUPLL.MergedBits.grpFM
#define CPMUPLL_FM0_MASK 0x10U
#define CPMUPLL_FM1_MASK 0x20U
#define CPMUPLL_FM_MASK 0x30U
#define CPMUPLL_FM_BITNUM 0x04U
/*** CPMURTI - CPMU RTI Control Register; 0x0000003B ***/
typedef union {
byte Byte;
struct {
byte RTR0 :1; /* Real Time Interrupt Modulus Counter Select Bit 0 */
byte RTR1 :1; /* Real Time Interrupt Modulus Counter Select Bit 1 */
byte RTR2 :1; /* Real Time Interrupt Modulus Counter Select Bit 2 */
byte RTR3 :1; /* Real Time Interrupt Modulus Counter Select Bit 3 */
byte RTR4 :1; /* Real Time Interrupt Prescale Rate Select Bit 4 */
byte RTR5 :1; /* Real Time Interrupt Prescale Rate Select Bit 5 */
byte RTR6 :1; /* Real Time Interrupt Prescale Rate Select Bit 6 */
byte RTDEC :1; /* Decimal or Binary Divider Select Bit */
} Bits;
struct {
byte grpRTR :7;
byte :1;
} MergedBits;
} CPMURTISTR;
extern volatile CPMURTISTR _CPMURTI @(REG_BASE + 0x0000003BUL);
#define CPMURTI _CPMURTI.Byte
#define CPMURTI_RTR0 _CPMURTI.Bits.RTR0
#define CPMURTI_RTR1 _CPMURTI.Bits.RTR1
#define CPMURTI_RTR2 _CPMURTI.Bits.RTR2
#define CPMURTI_RTR3 _CPMURTI.Bits.RTR3
#define CPMURTI_RTR4 _CPMURTI.Bits.RTR4
#define CPMURTI_RTR5 _CPMURTI.Bits.RTR5
#define CPMURTI_RTR6 _CPMURTI.Bits.RTR6
#define CPMURTI_RTDEC _CPMURTI.Bits.RTDEC
#define CPMURTI_RTR _CPMURTI.MergedBits.grpRTR
#define CPMURTI_RTR0_MASK 0x01U
#define CPMURTI_RTR1_MASK 0x02U
#define CPMURTI_RTR2_MASK 0x04U
#define CPMURTI_RTR3_MASK 0x08U
#define CPMURTI_RTR4_MASK 0x10U
#define CPMURTI_RTR5_MASK 0x20U
#define CPMURTI_RTR6_MASK 0x40U
#define CPMURTI_RTDEC_MASK 0x80U
#define CPMURTI_RTR_MASK 0x7FU
#define CPMURTI_RTR_BITNUM 0x00U
/*** CPMUCOP - CPMU COP Control Register; 0x0000003C ***/
typedef union {
byte Byte;
struct {
byte CR0 :1; /* COP Watchdog Timer Rate select Bit 0 */
byte CR1 :1; /* COP Watchdog Timer Rate select Bit 1 */
byte CR2 :1; /* COP Watchdog Timer Rate select Bit 2 */
byte :1;
byte :1;
byte WRTMASK :1; /* Write Mask for WCOP */
byte RSBCK :1; /* COP and RTI stop in Active BDM mode Bit */
byte WCOP :1; /* Window COP mode */
} Bits;
struct {
byte grpCR :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CPMUCOPSTR;
extern volatile CPMUCOPSTR _CPMUCOP @(REG_BASE + 0x0000003CUL);
#define CPMUCOP _CPMUCOP.Byte
#define CPMUCOP_CR0 _CPMUCOP.Bits.CR0
#define CPMUCOP_CR1 _CPMUCOP.Bits.CR1
#define CPMUCOP_CR2 _CPMUCOP.Bits.CR2
#define CPMUCOP_WRTMASK _CPMUCOP.Bits.WRTMASK
#define CPMUCOP_RSBCK _CPMUCOP.Bits.RSBCK
#define CPMUCOP_WCOP _CPMUCOP.Bits.WCOP
#define CPMUCOP_CR _CPMUCOP.MergedBits.grpCR
#define CPMUCOP_CR0_MASK 0x01U
#define CPMUCOP_CR1_MASK 0x02U
#define CPMUCOP_CR2_MASK 0x04U
#define CPMUCOP_WRTMASK_MASK 0x20U
#define CPMUCOP_RSBCK_MASK 0x40U
#define CPMUCOP_WCOP_MASK 0x80U
#define CPMUCOP_CR_MASK 0x07U
#define CPMUCOP_CR_BITNUM 0x00U
/*** CPMUARMCOP - CPMU COP Timer Arm/Reset Register; 0x0000003F ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* CPMU COP Timer Arm/Reset Bit 0 */
byte BIT1 :1; /* CPMU COP Timer Arm/Reset Bit 1 */
byte BIT2 :1; /* CPMU COP Timer Arm/Reset Bit 2 */
byte BIT3 :1; /* CPMU COP Timer Arm/Reset Bit 3 */
byte BIT4 :1; /* CPMU COP Timer Arm/Reset Bit 4 */
byte BIT5 :1; /* CPMU COP Timer Arm/Reset Bit 5 */
byte BIT6 :1; /* CPMU COP Timer Arm/Reset Bit 6 */
byte BIT7 :1; /* CPMU COP Timer Arm/Reset Bit 7 */
} Bits;
} CPMUARMCOPSTR;
extern volatile CPMUARMCOPSTR _CPMUARMCOP @(REG_BASE + 0x0000003FUL);
#define CPMUARMCOP _CPMUARMCOP.Byte
#define CPMUARMCOP_BIT0 _CPMUARMCOP.Bits.BIT0
#define CPMUARMCOP_BIT1 _CPMUARMCOP.Bits.BIT1
#define CPMUARMCOP_BIT2 _CPMUARMCOP.Bits.BIT2
#define CPMUARMCOP_BIT3 _CPMUARMCOP.Bits.BIT3
#define CPMUARMCOP_BIT4 _CPMUARMCOP.Bits.BIT4
#define CPMUARMCOP_BIT5 _CPMUARMCOP.Bits.BIT5
#define CPMUARMCOP_BIT6 _CPMUARMCOP.Bits.BIT6
#define CPMUARMCOP_BIT7 _CPMUARMCOP.Bits.BIT7
#define CPMUARMCOP_BIT0_MASK 0x01U
#define CPMUARMCOP_BIT1_MASK 0x02U
#define CPMUARMCOP_BIT2_MASK 0x04U
#define CPMUARMCOP_BIT3_MASK 0x08U
#define CPMUARMCOP_BIT4_MASK 0x10U
#define CPMUARMCOP_BIT5_MASK 0x20U
#define CPMUARMCOP_BIT6_MASK 0x40U
#define CPMUARMCOP_BIT7_MASK 0x80U
/*** TIOS - Timer Input Capture/Output Compare Select; 0x00000040 ***/
typedef union {
byte Byte;
struct {
byte IOS0 :1; /* Input Capture or Output Compare Channel Configuration Bit 0 */
byte IOS1 :1; /* Input Capture or Output Compare Channel Configuration Bit 1 */
byte IOS2 :1; /* Input Capture or Output Compare Channel Configuration Bit 2 */
byte IOS3 :1; /* Input Capture or Output Compare Channel Configuration Bit 3 */
byte IOS4 :1; /* Input Capture or Output Compare Channel Configuration Bit 4 */
byte IOS5 :1; /* Input Capture or Output Compare Channel Configuration Bit 5 */
byte IOS6 :1; /* Input Capture or Output Compare Channel Configuration Bit 6 */
byte IOS7 :1; /* Input Capture or Output Compare Channel Configuration Bit 7 */
} Bits;
} TIOSSTR;
extern volatile TIOSSTR _TIOS @(REG_BASE + 0x00000040UL);
#define TIOS _TIOS.Byte
#define TIOS_IOS0 _TIOS.Bits.IOS0
#define TIOS_IOS1 _TIOS.Bits.IOS1
#define TIOS_IOS2 _TIOS.Bits.IOS2
#define TIOS_IOS3 _TIOS.Bits.IOS3
#define TIOS_IOS4 _TIOS.Bits.IOS4
#define TIOS_IOS5 _TIOS.Bits.IOS5
#define TIOS_IOS6 _TIOS.Bits.IOS6
#define TIOS_IOS7 _TIOS.Bits.IOS7
#define TIOS_IOS0_MASK 0x01U
#define TIOS_IOS1_MASK 0x02U
#define TIOS_IOS2_MASK 0x04U
#define TIOS_IOS3_MASK 0x08U
#define TIOS_IOS4_MASK 0x10U
#define TIOS_IOS5_MASK 0x20U
#define TIOS_IOS6_MASK 0x40U
#define TIOS_IOS7_MASK 0x80U
/*** CFORC - Timer Compare Force Register; 0x00000041 ***/
typedef union {
byte Byte;
struct {
byte FOC0 :1; /* Force Output Compare Action for Channel 0 */
byte FOC1 :1; /* Force Output Compare Action for Channel 1 */
byte FOC2 :1; /* Force Output Compare Action for Channel 2 */
byte FOC3 :1; /* Force Output Compare Action for Channel 3 */
byte FOC4 :1; /* Force Output Compare Action for Channel 4 */
byte FOC5 :1; /* Force Output Compare Action for Channel 5 */
byte FOC6 :1; /* Force Output Compare Action for Channel 6 */
byte FOC7 :1; /* Force Output Compare Action for Channel 7 */
} Bits;
} CFORCSTR;
extern volatile CFORCSTR _CFORC @(REG_BASE + 0x00000041UL);
#define CFORC _CFORC.Byte
#define CFORC_FOC0 _CFORC.Bits.FOC0
#define CFORC_FOC1 _CFORC.Bits.FOC1
#define CFORC_FOC2 _CFORC.Bits.FOC2
#define CFORC_FOC3 _CFORC.Bits.FOC3
#define CFORC_FOC4 _CFORC.Bits.FOC4
#define CFORC_FOC5 _CFORC.Bits.FOC5
#define CFORC_FOC6 _CFORC.Bits.FOC6
#define CFORC_FOC7 _CFORC.Bits.FOC7
#define CFORC_FOC0_MASK 0x01U
#define CFORC_FOC1_MASK 0x02U
#define CFORC_FOC2_MASK 0x04U
#define CFORC_FOC3_MASK 0x08U
#define CFORC_FOC4_MASK 0x10U
#define CFORC_FOC5_MASK 0x20U
#define CFORC_FOC6_MASK 0x40U
#define CFORC_FOC7_MASK 0x80U
/*** OC7M - Output Compare 7 Mask Register; 0x00000042 ***/
typedef union {
byte Byte;
struct {
byte OC7M0 :1; /* Output Compare 7 Mask Bit 0 */
byte OC7M1 :1; /* Output Compare 7 Mask Bit 1 */
byte OC7M2 :1; /* Output Compare 7 Mask Bit 2 */
byte OC7M3 :1; /* Output Compare 7 Mask Bit 3 */
byte OC7M4 :1; /* Output Compare 7 Mask Bit 4 */
byte OC7M5 :1; /* Output Compare 7 Mask Bit 5 */
byte OC7M6 :1; /* Output Compare 7 Mask Bit 6 */
byte OC7M7 :1; /* Output Compare 7 Mask Bit 7 */
} Bits;
} OC7MSTR;
extern volatile OC7MSTR _OC7M @(REG_BASE + 0x00000042UL);
#define OC7M _OC7M.Byte
#define OC7M_OC7M0 _OC7M.Bits.OC7M0
#define OC7M_OC7M1 _OC7M.Bits.OC7M1
#define OC7M_OC7M2 _OC7M.Bits.OC7M2
#define OC7M_OC7M3 _OC7M.Bits.OC7M3
#define OC7M_OC7M4 _OC7M.Bits.OC7M4
#define OC7M_OC7M5 _OC7M.Bits.OC7M5
#define OC7M_OC7M6 _OC7M.Bits.OC7M6
#define OC7M_OC7M7 _OC7M.Bits.OC7M7
#define OC7M_OC7M0_MASK 0x01U
#define OC7M_OC7M1_MASK 0x02U
#define OC7M_OC7M2_MASK 0x04U
#define OC7M_OC7M3_MASK 0x08U
#define OC7M_OC7M4_MASK 0x10U
#define OC7M_OC7M5_MASK 0x20U
#define OC7M_OC7M6_MASK 0x40U
#define OC7M_OC7M7_MASK 0x80U
/*** OC7D - Output Compare 7 Data Register; 0x00000043 ***/
typedef union {
byte Byte;
struct {
byte OC7D0 :1; /* Output Compare 7 Bit 0 */
byte OC7D1 :1; /* Output Compare 7 Bit 1 */
byte OC7D2 :1; /* Output Compare 7 Bit 2 */
byte OC7D3 :1; /* Output Compare 7 Bit 3 */
byte OC7D4 :1; /* Output Compare 7 Bit 4 */
byte OC7D5 :1; /* Output Compare 7 Bit 5 */
byte OC7D6 :1; /* Output Compare 7 Bit 6 */
byte OC7D7 :1; /* Output Compare 7 Bit 7 */
} Bits;
} OC7DSTR;
extern volatile OC7DSTR _OC7D @(REG_BASE + 0x00000043UL);
#define OC7D _OC7D.Byte
#define OC7D_OC7D0 _OC7D.Bits.OC7D0
#define OC7D_OC7D1 _OC7D.Bits.OC7D1
#define OC7D_OC7D2 _OC7D.Bits.OC7D2
#define OC7D_OC7D3 _OC7D.Bits.OC7D3
#define OC7D_OC7D4 _OC7D.Bits.OC7D4
#define OC7D_OC7D5 _OC7D.Bits.OC7D5
#define OC7D_OC7D6 _OC7D.Bits.OC7D6
#define OC7D_OC7D7 _OC7D.Bits.OC7D7
#define OC7D_OC7D0_MASK 0x01U
#define OC7D_OC7D1_MASK 0x02U
#define OC7D_OC7D2_MASK 0x04U
#define OC7D_OC7D3_MASK 0x08U
#define OC7D_OC7D4_MASK 0x10U
#define OC7D_OC7D5_MASK 0x20U
#define OC7D_OC7D6_MASK 0x40U
#define OC7D_OC7D7_MASK 0x80U
/*** TCNT - Timer Count Register; 0x00000044 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TCNTHi - Timer Count Register High; 0x00000044 ***/
union {
byte Byte;
} TCNTHiSTR;
#define TCNTHi _TCNT.Overlap_STR.TCNTHiSTR.Byte
/*** TCNTLo - Timer Count Register Low; 0x00000045 ***/
union {
byte Byte;
} TCNTLoSTR;
#define TCNTLo _TCNT.Overlap_STR.TCNTLoSTR.Byte
} Overlap_STR;
} TCNTSTR;
extern volatile TCNTSTR _TCNT @(REG_BASE + 0x00000044UL);
#define TCNT _TCNT.Word
/*** TSCR1 - Timer System Control Register1; 0x00000046 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte PRNT :1; /* Precision Timer */
byte TFFCA :1; /* Timer Fast Flag Clear All */
byte TSFRZ :1; /* Timer and Modulus Counter Stop While in Freeze Mode */
byte TSWAI :1; /* Timer Module Stops While in Wait */
byte TEN :1; /* Timer Enable */
} Bits;
} TSCR1STR;
extern volatile TSCR1STR _TSCR1 @(REG_BASE + 0x00000046UL);
#define TSCR1 _TSCR1.Byte
#define TSCR1_PRNT _TSCR1.Bits.PRNT
#define TSCR1_TFFCA _TSCR1.Bits.TFFCA
#define TSCR1_TSFRZ _TSCR1.Bits.TSFRZ
#define TSCR1_TSWAI _TSCR1.Bits.TSWAI
#define TSCR1_TEN _TSCR1.Bits.TEN
#define TSCR1_PRNT_MASK 0x08U
#define TSCR1_TFFCA_MASK 0x10U
#define TSCR1_TSFRZ_MASK 0x20U
#define TSCR1_TSWAI_MASK 0x40U
#define TSCR1_TEN_MASK 0x80U
/*** TTOV - Timer Toggle On Overflow Register; 0x00000047 ***/
typedef union {
byte Byte;
struct {
byte TOV0 :1; /* Toggle On Overflow Bit 0 */
byte TOV1 :1; /* Toggle On Overflow Bit 1 */
byte TOV2 :1; /* Toggle On Overflow Bit 2 */
byte TOV3 :1; /* Toggle On Overflow Bit 3 */
byte TOV4 :1; /* Toggle On Overflow Bit 4 */
byte TOV5 :1; /* Toggle On Overflow Bit 5 */
byte TOV6 :1; /* Toggle On Overflow Bit 6 */
byte TOV7 :1; /* Toggle On Overflow Bit 7 */
} Bits;
} TTOVSTR;
extern volatile TTOVSTR _TTOV @(REG_BASE + 0x00000047UL);
#define TTOV _TTOV.Byte
#define TTOV_TOV0 _TTOV.Bits.TOV0
#define TTOV_TOV1 _TTOV.Bits.TOV1
#define TTOV_TOV2 _TTOV.Bits.TOV2
#define TTOV_TOV3 _TTOV.Bits.TOV3
#define TTOV_TOV4 _TTOV.Bits.TOV4
#define TTOV_TOV5 _TTOV.Bits.TOV5
#define TTOV_TOV6 _TTOV.Bits.TOV6
#define TTOV_TOV7 _TTOV.Bits.TOV7
#define TTOV_TOV0_MASK 0x01U
#define TTOV_TOV1_MASK 0x02U
#define TTOV_TOV2_MASK 0x04U
#define TTOV_TOV3_MASK 0x08U
#define TTOV_TOV4_MASK 0x10U
#define TTOV_TOV5_MASK 0x20U
#define TTOV_TOV6_MASK 0x40U
#define TTOV_TOV7_MASK 0x80U
/*** TCTL1 - Timer Control Register 1; 0x00000048 ***/
typedef union {
byte Byte;
struct {
byte OL4 :1; /* Output Level Bit 4 */
byte OM4 :1; /* Output Mode Bit 4 */
byte OL5 :1; /* Output Level Bit 5 */
byte OM5 :1; /* Output Mode Bit 5 */
byte OL6 :1; /* Output Level Bit 6 */
byte OM6 :1; /* Output Mode Bit 6 */
byte OL7 :1; /* Output Level Bit 7 */
byte OM7 :1; /* Output Mode Bit 7 */
} Bits;
} TCTL1STR;
extern volatile TCTL1STR _TCTL1 @(REG_BASE + 0x00000048UL);
#define TCTL1 _TCTL1.Byte
#define TCTL1_OL4 _TCTL1.Bits.OL4
#define TCTL1_OM4 _TCTL1.Bits.OM4
#define TCTL1_OL5 _TCTL1.Bits.OL5
#define TCTL1_OM5 _TCTL1.Bits.OM5
#define TCTL1_OL6 _TCTL1.Bits.OL6
#define TCTL1_OM6 _TCTL1.Bits.OM6
#define TCTL1_OL7 _TCTL1.Bits.OL7
#define TCTL1_OM7 _TCTL1.Bits.OM7
#define TCTL1_OL4_MASK 0x01U
#define TCTL1_OM4_MASK 0x02U
#define TCTL1_OL5_MASK 0x04U
#define TCTL1_OM5_MASK 0x08U
#define TCTL1_OL6_MASK 0x10U
#define TCTL1_OM6_MASK 0x20U
#define TCTL1_OL7_MASK 0x40U
#define TCTL1_OM7_MASK 0x80U
/*** TCTL2 - Timer Control Register 2; 0x00000049 ***/
typedef union {
byte Byte;
struct {
byte OL0 :1; /* Output Level Bit 0 */
byte OM0 :1; /* Output Mode Bit 0 */
byte OL1 :1; /* Output Lecel Bit 1 */
byte OM1 :1; /* Output Mode Bit 1 */
byte OL2 :1; /* Output Level Bit 2 */
byte OM2 :1; /* Output Mode Bit 2 */
byte OL3 :1; /* Output Level Bit 3 */
byte OM3 :1; /* Output Mode Bit 3 */
} Bits;
} TCTL2STR;
extern volatile TCTL2STR _TCTL2 @(REG_BASE + 0x00000049UL);
#define TCTL2 _TCTL2.Byte
#define TCTL2_OL0 _TCTL2.Bits.OL0
#define TCTL2_OM0 _TCTL2.Bits.OM0
#define TCTL2_OL1 _TCTL2.Bits.OL1
#define TCTL2_OM1 _TCTL2.Bits.OM1
#define TCTL2_OL2 _TCTL2.Bits.OL2
#define TCTL2_OM2 _TCTL2.Bits.OM2
#define TCTL2_OL3 _TCTL2.Bits.OL3
#define TCTL2_OM3 _TCTL2.Bits.OM3
#define TCTL2_OL0_MASK 0x01U
#define TCTL2_OM0_MASK 0x02U
#define TCTL2_OL1_MASK 0x04U
#define TCTL2_OM1_MASK 0x08U
#define TCTL2_OL2_MASK 0x10U
#define TCTL2_OM2_MASK 0x20U
#define TCTL2_OL3_MASK 0x40U
#define TCTL2_OM3_MASK 0x80U
/*** TCTL3 - Timer Control Register 3; 0x0000004A ***/
typedef union {
byte Byte;
struct {
byte EDG4A :1; /* Input Capture Edge Control 4A */
byte EDG4B :1; /* Input Capture Edge Control 4B */
byte EDG5A :1; /* Input Capture Edge Control 5A */
byte EDG5B :1; /* Input Capture Edge Control 5B */
byte EDG6A :1; /* Input Capture Edge Control 6A */
byte EDG6B :1; /* Input Capture Edge Control 6B */
byte EDG7A :1; /* Input Capture Edge Control 7A */
byte EDG7B :1; /* Input Capture Edge Control 7B */
} Bits;
struct {
byte grpEDG4x :2;
byte grpEDG5x :2;
byte grpEDG6x :2;
byte grpEDG7x :2;
} MergedBits;
} TCTL3STR;
extern volatile TCTL3STR _TCTL3 @(REG_BASE + 0x0000004AUL);
#define TCTL3 _TCTL3.Byte
#define TCTL3_EDG4A _TCTL3.Bits.EDG4A
#define TCTL3_EDG4B _TCTL3.Bits.EDG4B
#define TCTL3_EDG5A _TCTL3.Bits.EDG5A
#define TCTL3_EDG5B _TCTL3.Bits.EDG5B
#define TCTL3_EDG6A _TCTL3.Bits.EDG6A
#define TCTL3_EDG6B _TCTL3.Bits.EDG6B
#define TCTL3_EDG7A _TCTL3.Bits.EDG7A
#define TCTL3_EDG7B _TCTL3.Bits.EDG7B
#define TCTL3_EDG4x _TCTL3.MergedBits.grpEDG4x
#define TCTL3_EDG5x _TCTL3.MergedBits.grpEDG5x
#define TCTL3_EDG6x _TCTL3.MergedBits.grpEDG6x
#define TCTL3_EDG7x _TCTL3.MergedBits.grpEDG7x
#define TCTL3_EDG4A_MASK 0x01U
#define TCTL3_EDG4B_MASK 0x02U
#define TCTL3_EDG5A_MASK 0x04U
#define TCTL3_EDG5B_MASK 0x08U
#define TCTL3_EDG6A_MASK 0x10U
#define TCTL3_EDG6B_MASK 0x20U
#define TCTL3_EDG7A_MASK 0x40U
#define TCTL3_EDG7B_MASK 0x80U
#define TCTL3_EDG4x_MASK 0x03U
#define TCTL3_EDG4x_BITNUM 0x00U
#define TCTL3_EDG5x_MASK 0x0CU
#define TCTL3_EDG5x_BITNUM 0x02U
#define TCTL3_EDG6x_MASK 0x30U
#define TCTL3_EDG6x_BITNUM 0x04U
#define TCTL3_EDG7x_MASK 0xC0U
#define TCTL3_EDG7x_BITNUM 0x06U
/*** TCTL4 - Timer Control Register 4; 0x0000004B ***/
typedef union {
byte Byte;
struct {
byte EDG0A :1; /* Input Capture Edge Control 0A */
byte EDG0B :1; /* Input Capture Edge Control 0B */
byte EDG1A :1; /* Input Capture Edge Control 1A */
byte EDG1B :1; /* Input Capture Edge Control 1B */
byte EDG2A :1; /* Input Capture Edge Control 2A */
byte EDG2B :1; /* Input Capture Edge Control 2B */
byte EDG3A :1; /* Input Capture Edge Control 3A */
byte EDG3B :1; /* Input Capture Edge Control 3B */
} Bits;
struct {
byte grpEDG0x :2;
byte grpEDG1x :2;
byte grpEDG2x :2;
byte grpEDG3x :2;
} MergedBits;
} TCTL4STR;
extern volatile TCTL4STR _TCTL4 @(REG_BASE + 0x0000004BUL);
#define TCTL4 _TCTL4.Byte
#define TCTL4_EDG0A _TCTL4.Bits.EDG0A
#define TCTL4_EDG0B _TCTL4.Bits.EDG0B
#define TCTL4_EDG1A _TCTL4.Bits.EDG1A
#define TCTL4_EDG1B _TCTL4.Bits.EDG1B
#define TCTL4_EDG2A _TCTL4.Bits.EDG2A
#define TCTL4_EDG2B _TCTL4.Bits.EDG2B
#define TCTL4_EDG3A _TCTL4.Bits.EDG3A
#define TCTL4_EDG3B _TCTL4.Bits.EDG3B
#define TCTL4_EDG0x _TCTL4.MergedBits.grpEDG0x
#define TCTL4_EDG1x _TCTL4.MergedBits.grpEDG1x
#define TCTL4_EDG2x _TCTL4.MergedBits.grpEDG2x
#define TCTL4_EDG3x _TCTL4.MergedBits.grpEDG3x
#define TCTL4_EDG0A_MASK 0x01U
#define TCTL4_EDG0B_MASK 0x02U
#define TCTL4_EDG1A_MASK 0x04U
#define TCTL4_EDG1B_MASK 0x08U
#define TCTL4_EDG2A_MASK 0x10U
#define TCTL4_EDG2B_MASK 0x20U
#define TCTL4_EDG3A_MASK 0x40U
#define TCTL4_EDG3B_MASK 0x80U
#define TCTL4_EDG0x_MASK 0x03U
#define TCTL4_EDG0x_BITNUM 0x00U
#define TCTL4_EDG1x_MASK 0x0CU
#define TCTL4_EDG1x_BITNUM 0x02U
#define TCTL4_EDG2x_MASK 0x30U
#define TCTL4_EDG2x_BITNUM 0x04U
#define TCTL4_EDG3x_MASK 0xC0U
#define TCTL4_EDG3x_BITNUM 0x06U
/*** TIE - Timer Interrupt Enable Register; 0x0000004C ***/
typedef union {
byte Byte;
struct {
byte C0I :1; /* Input Capture/Output Compare Interrupt Enable Bit 0 */
byte C1I :1; /* Input Capture/Output Compare Interrupt Enable Bit 1 */
byte C2I :1; /* Input Capture/Output Compare Interrupt Enable Bit 2 */
byte C3I :1; /* Input Capture/Output Compare Interrupt Enable Bit 3 */
byte C4I :1; /* Input Capture/Output Compare Interrupt Enable Bit 4 */
byte C5I :1; /* Input Capture/Output Compare Interrupt Enable Bit 5 */
byte C6I :1; /* Input Capture/Output Compare Interrupt Enable Bit 6 */
byte C7I :1; /* Input Capture/Output Compare Interrupt Enable Bit 7 */
} Bits;
} TIESTR;
extern volatile TIESTR _TIE @(REG_BASE + 0x0000004CUL);
#define TIE _TIE.Byte
#define TIE_C0I _TIE.Bits.C0I
#define TIE_C1I _TIE.Bits.C1I
#define TIE_C2I _TIE.Bits.C2I
#define TIE_C3I _TIE.Bits.C3I
#define TIE_C4I _TIE.Bits.C4I
#define TIE_C5I _TIE.Bits.C5I
#define TIE_C6I _TIE.Bits.C6I
#define TIE_C7I _TIE.Bits.C7I
#define TIE_C0I_MASK 0x01U
#define TIE_C1I_MASK 0x02U
#define TIE_C2I_MASK 0x04U
#define TIE_C3I_MASK 0x08U
#define TIE_C4I_MASK 0x10U
#define TIE_C5I_MASK 0x20U
#define TIE_C6I_MASK 0x40U
#define TIE_C7I_MASK 0x80U
/*** TSCR2 - Timer System Control Register 2; 0x0000004D ***/
typedef union {
byte Byte;
struct {
byte PR0 :1; /* Timer Prescaler Select Bit 0 */
byte PR1 :1; /* Timer Prescaler Select Bit 1 */
byte PR2 :1; /* Timer Prescaler Select Bit 2 */
byte TCRE :1; /* Timer Counter Reset Enable */
byte :1;
byte :1;
byte :1;
byte TOI :1; /* Timer Overflow Interrupt Enable */
} Bits;
struct {
byte grpPR :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} TSCR2STR;
extern volatile TSCR2STR _TSCR2 @(REG_BASE + 0x0000004DUL);
#define TSCR2 _TSCR2.Byte
#define TSCR2_PR0 _TSCR2.Bits.PR0
#define TSCR2_PR1 _TSCR2.Bits.PR1
#define TSCR2_PR2 _TSCR2.Bits.PR2
#define TSCR2_TCRE _TSCR2.Bits.TCRE
#define TSCR2_TOI _TSCR2.Bits.TOI
#define TSCR2_PR _TSCR2.MergedBits.grpPR
#define TSCR2_PR0_MASK 0x01U
#define TSCR2_PR1_MASK 0x02U
#define TSCR2_PR2_MASK 0x04U
#define TSCR2_TCRE_MASK 0x08U
#define TSCR2_TOI_MASK 0x80U
#define TSCR2_PR_MASK 0x07U
#define TSCR2_PR_BITNUM 0x00U
/*** TFLG1 - Main Timer Interrupt Flag 1; 0x0000004E ***/
typedef union {
byte Byte;
struct {
byte C0F :1; /* Input Capture/Output Compare Channel Flag 0 */
byte C1F :1; /* Input Capture/Output Compare Channel Flag 1 */
byte C2F :1; /* Input Capture/Output Compare Channel Flag 2 */
byte C3F :1; /* Input Capture/Output Compare Channel Flag 3 */
byte C4F :1; /* Input Capture/Output Compare Channel Flag 4 */
byte C5F :1; /* Input Capture/Output Compare Channel Flag 5 */
byte C6F :1; /* Input Capture/Output Compare Channel Flag 6 */
byte C7F :1; /* Input Capture/Output Compare Channel Flag 7 */
} Bits;
} TFLG1STR;
extern volatile TFLG1STR _TFLG1 @(REG_BASE + 0x0000004EUL);
#define TFLG1 _TFLG1.Byte
#define TFLG1_C0F _TFLG1.Bits.C0F
#define TFLG1_C1F _TFLG1.Bits.C1F
#define TFLG1_C2F _TFLG1.Bits.C2F
#define TFLG1_C3F _TFLG1.Bits.C3F
#define TFLG1_C4F _TFLG1.Bits.C4F
#define TFLG1_C5F _TFLG1.Bits.C5F
#define TFLG1_C6F _TFLG1.Bits.C6F
#define TFLG1_C7F _TFLG1.Bits.C7F
#define TFLG1_C0F_MASK 0x01U
#define TFLG1_C1F_MASK 0x02U
#define TFLG1_C2F_MASK 0x04U
#define TFLG1_C3F_MASK 0x08U
#define TFLG1_C4F_MASK 0x10U
#define TFLG1_C5F_MASK 0x20U
#define TFLG1_C6F_MASK 0x40U
#define TFLG1_C7F_MASK 0x80U
/*** TFLG2 - Main Timer Interrupt Flag 2; 0x0000004F ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte TOF :1; /* Timer Overflow Flag */
} Bits;
} TFLG2STR;
extern volatile TFLG2STR _TFLG2 @(REG_BASE + 0x0000004FUL);
#define TFLG2 _TFLG2.Byte
#define TFLG2_TOF _TFLG2.Bits.TOF
#define TFLG2_TOF_MASK 0x80U
/*** TC0 - Timer Input Capture/Output Compare Register 0; 0x00000050 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC0Hi - Timer Input Capture/Output Compare Register 0 High; 0x00000050 ***/
union {
byte Byte;
} TC0HiSTR;
#define TC0Hi _TC0.Overlap_STR.TC0HiSTR.Byte
/*** TC0Lo - Timer Input Capture/Output Compare Register 0 Low; 0x00000051 ***/
union {
byte Byte;
} TC0LoSTR;
#define TC0Lo _TC0.Overlap_STR.TC0LoSTR.Byte
} Overlap_STR;
} TC0STR;
extern volatile TC0STR _TC0 @(REG_BASE + 0x00000050UL);
#define TC0 _TC0.Word
/* TC_ARR: Access 8 TCx registers in an array */
#define TC_ARR ((volatile word *) &TC0)
/*** TC1 - Timer Input Capture/Output Compare Register 1; 0x00000052 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC1Hi - Timer Input Capture/Output Compare Register 1 High; 0x00000052 ***/
union {
byte Byte;
} TC1HiSTR;
#define TC1Hi _TC1.Overlap_STR.TC1HiSTR.Byte
/*** TC1Lo - Timer Input Capture/Output Compare Register 1 Low; 0x00000053 ***/
union {
byte Byte;
} TC1LoSTR;
#define TC1Lo _TC1.Overlap_STR.TC1LoSTR.Byte
} Overlap_STR;
} TC1STR;
extern volatile TC1STR _TC1 @(REG_BASE + 0x00000052UL);
#define TC1 _TC1.Word
/*** TC2 - Timer Input Capture/Output Compare Register 2; 0x00000054 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC2Hi - Timer Input Capture/Output Compare Register 2 High; 0x00000054 ***/
union {
byte Byte;
} TC2HiSTR;
#define TC2Hi _TC2.Overlap_STR.TC2HiSTR.Byte
/*** TC2Lo - Timer Input Capture/Output Compare Register 2 Low; 0x00000055 ***/
union {
byte Byte;
} TC2LoSTR;
#define TC2Lo _TC2.Overlap_STR.TC2LoSTR.Byte
} Overlap_STR;
} TC2STR;
extern volatile TC2STR _TC2 @(REG_BASE + 0x00000054UL);
#define TC2 _TC2.Word
/*** TC3 - Timer Input Capture/Output Compare Register 3; 0x00000056 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC3Hi - Timer Input Capture/Output Compare Register 3 High; 0x00000056 ***/
union {
byte Byte;
} TC3HiSTR;
#define TC3Hi _TC3.Overlap_STR.TC3HiSTR.Byte
/*** TC3Lo - Timer Input Capture/Output Compare Register 3 Low; 0x00000057 ***/
union {
byte Byte;
} TC3LoSTR;
#define TC3Lo _TC3.Overlap_STR.TC3LoSTR.Byte
} Overlap_STR;
} TC3STR;
extern volatile TC3STR _TC3 @(REG_BASE + 0x00000056UL);
#define TC3 _TC3.Word
/*** TC4 - Timer Input Capture/Output Compare Register 4; 0x00000058 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC4Hi - Timer Input Capture/Output Compare Register 4 High; 0x00000058 ***/
union {
byte Byte;
} TC4HiSTR;
#define TC4Hi _TC4.Overlap_STR.TC4HiSTR.Byte
/*** TC4Lo - Timer Input Capture/Output Compare Register 4 Low; 0x00000059 ***/
union {
byte Byte;
} TC4LoSTR;
#define TC4Lo _TC4.Overlap_STR.TC4LoSTR.Byte
} Overlap_STR;
} TC4STR;
extern volatile TC4STR _TC4 @(REG_BASE + 0x00000058UL);
#define TC4 _TC4.Word
/*** TC5 - Timer Input Capture/Output Compare Register 5; 0x0000005A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC5Hi - Timer Input Capture/Output Compare Register 5 High; 0x0000005A ***/
union {
byte Byte;
} TC5HiSTR;
#define TC5Hi _TC5.Overlap_STR.TC5HiSTR.Byte
/*** TC5Lo - Timer Input Capture/Output Compare Register 5 Low; 0x0000005B ***/
union {
byte Byte;
} TC5LoSTR;
#define TC5Lo _TC5.Overlap_STR.TC5LoSTR.Byte
} Overlap_STR;
} TC5STR;
extern volatile TC5STR _TC5 @(REG_BASE + 0x0000005AUL);
#define TC5 _TC5.Word
/*** TC6 - Timer Input Capture/Output Compare Register 6; 0x0000005C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC6Hi - Timer Input Capture/Output Compare Register 6 High; 0x0000005C ***/
union {
byte Byte;
} TC6HiSTR;
#define TC6Hi _TC6.Overlap_STR.TC6HiSTR.Byte
/*** TC6Lo - Timer Input Capture/Output Compare Register 6 Low; 0x0000005D ***/
union {
byte Byte;
} TC6LoSTR;
#define TC6Lo _TC6.Overlap_STR.TC6LoSTR.Byte
} Overlap_STR;
} TC6STR;
extern volatile TC6STR _TC6 @(REG_BASE + 0x0000005CUL);
#define TC6 _TC6.Word
/*** TC7 - Timer Input Capture/Output Compare Register 7; 0x0000005E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC7Hi - Timer Input Capture/Output Compare Register 7 High; 0x0000005E ***/
union {
byte Byte;
} TC7HiSTR;
#define TC7Hi _TC7.Overlap_STR.TC7HiSTR.Byte
/*** TC7Lo - Timer Input Capture/Output Compare Register 7 Low; 0x0000005F ***/
union {
byte Byte;
} TC7LoSTR;
#define TC7Lo _TC7.Overlap_STR.TC7LoSTR.Byte
} Overlap_STR;
} TC7STR;
extern volatile TC7STR _TC7 @(REG_BASE + 0x0000005EUL);
#define TC7 _TC7.Word
/*** PACTL - 16-Bit Pulse Accumulator A Control Register; 0x00000060 ***/
typedef union {
byte Byte;
struct {
byte PAI :1; /* Pulse Accumulator Input Interrupt enable */
byte PAOVI :1; /* Pulse Accumulator A Overflow Interrupt enable */
byte CLK0 :1; /* Clock Select Bit 0 */
byte CLK1 :1; /* Clock Select Bit 1 */
byte PEDGE :1; /* Pulse Accumulator Edge Control */
byte PAMOD :1; /* Pulse Accumulator Mode */
byte PAEN :1; /* Pulse Accumulator A System Enable */
byte :1;
} Bits;
struct {
byte :1;
byte :1;
byte grpCLK :2;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} PACTLSTR;
extern volatile PACTLSTR _PACTL @(REG_BASE + 0x00000060UL);
#define PACTL _PACTL.Byte
#define PACTL_PAI _PACTL.Bits.PAI
#define PACTL_PAOVI _PACTL.Bits.PAOVI
#define PACTL_CLK0 _PACTL.Bits.CLK0
#define PACTL_CLK1 _PACTL.Bits.CLK1
#define PACTL_PEDGE _PACTL.Bits.PEDGE
#define PACTL_PAMOD _PACTL.Bits.PAMOD
#define PACTL_PAEN _PACTL.Bits.PAEN
#define PACTL_CLK _PACTL.MergedBits.grpCLK
#define PACTL_PAI_MASK 0x01U
#define PACTL_PAOVI_MASK 0x02U
#define PACTL_CLK0_MASK 0x04U
#define PACTL_CLK1_MASK 0x08U
#define PACTL_PEDGE_MASK 0x10U
#define PACTL_PAMOD_MASK 0x20U
#define PACTL_PAEN_MASK 0x40U
#define PACTL_CLK_MASK 0x0CU
#define PACTL_CLK_BITNUM 0x02U
/*** PAFLG - Pulse Accumulator A Flag Register; 0x00000061 ***/
typedef union {
byte Byte;
struct {
byte PAIF :1; /* Pulse Accumulator Input edge Flag */
byte PAOVF :1; /* Pulse Accumulator A Overflow Flag */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} PAFLGSTR;
extern volatile PAFLGSTR _PAFLG @(REG_BASE + 0x00000061UL);
#define PAFLG _PAFLG.Byte
#define PAFLG_PAIF _PAFLG.Bits.PAIF
#define PAFLG_PAOVF _PAFLG.Bits.PAOVF
#define PAFLG_PAIF_MASK 0x01U
#define PAFLG_PAOVF_MASK 0x02U
/*** PACNT - Pulse Accumulators Count Register; 0x00000062 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PACNTH - Pulse Accumulators Count Register High; 0x00000062 ***/
union {
byte Byte;
} PACNTHSTR;
#define PACNTH _PACNT.Overlap_STR.PACNTHSTR.Byte
/*** PACNTL - Pulse Accumulators Count Register Low; 0x00000063 ***/
union {
byte Byte;
} PACNTLSTR;
#define PACNTL _PACNT.Overlap_STR.PACNTLSTR.Byte
} Overlap_STR;
} PACNTSTR;
extern volatile PACNTSTR _PACNT @(REG_BASE + 0x00000062UL);
#define PACNT _PACNT.Word
/*** OCPD - Output Compare Pin Disconnect Register; 0x0000006C ***/
typedef union {
byte Byte;
struct {
byte OCPD0 :1; /* Output Compare Pin Disconnect Bit 0 */
byte OCPD1 :1; /* Output Compare Pin Disconnect Bit 1 */
byte OCPD2 :1; /* Output Compare Pin Disconnect Bit 2 */
byte OCPD3 :1; /* Output Compare Pin Disconnect Bit 3 */
byte OCPD4 :1; /* Output Compare Pin Disconnect Bit 4 */
byte OCPD5 :1; /* Output Compare Pin Disconnect Bit 5 */
byte OCPD6 :1; /* Output Compare Pin Disconnect Bit 6 */
byte OCPD7 :1; /* Output Compare Pin Disconnect Bit 7 */
} Bits;
} OCPDSTR;
extern volatile OCPDSTR _OCPD @(REG_BASE + 0x0000006CUL);
#define OCPD _OCPD.Byte
#define OCPD_OCPD0 _OCPD.Bits.OCPD0
#define OCPD_OCPD1 _OCPD.Bits.OCPD1
#define OCPD_OCPD2 _OCPD.Bits.OCPD2
#define OCPD_OCPD3 _OCPD.Bits.OCPD3
#define OCPD_OCPD4 _OCPD.Bits.OCPD4
#define OCPD_OCPD5 _OCPD.Bits.OCPD5
#define OCPD_OCPD6 _OCPD.Bits.OCPD6
#define OCPD_OCPD7 _OCPD.Bits.OCPD7
#define OCPD_OCPD0_MASK 0x01U
#define OCPD_OCPD1_MASK 0x02U
#define OCPD_OCPD2_MASK 0x04U
#define OCPD_OCPD3_MASK 0x08U
#define OCPD_OCPD4_MASK 0x10U
#define OCPD_OCPD5_MASK 0x20U
#define OCPD_OCPD6_MASK 0x40U
#define OCPD_OCPD7_MASK 0x80U
/*** PTPSR - Precision Timer Prescaler Select Register; 0x0000006E ***/
typedef union {
byte Byte;
struct {
byte PTPS0 :1; /* Precision Timer Prescaler Select Bit 0 */
byte PTPS1 :1; /* Precision Timer Prescaler Select Bit 1 */
byte PTPS2 :1; /* Precision Timer Prescaler Select Bit 2 */
byte PTPS3 :1; /* Precision Timer Prescaler Select Bit 3 */
byte PTPS4 :1; /* Precision Timer Prescaler Select Bit 4 */
byte PTPS5 :1; /* Precision Timer Prescaler Select Bit 5 */
byte PTPS6 :1; /* Precision Timer Prescaler Select Bit 6 */
byte PTPS7 :1; /* Precision Timer Prescaler Select Bit 7 */
} Bits;
} PTPSRSTR;
extern volatile PTPSRSTR _PTPSR @(REG_BASE + 0x0000006EUL);
#define PTPSR _PTPSR.Byte
#define PTPSR_PTPS0 _PTPSR.Bits.PTPS0
#define PTPSR_PTPS1 _PTPSR.Bits.PTPS1
#define PTPSR_PTPS2 _PTPSR.Bits.PTPS2
#define PTPSR_PTPS3 _PTPSR.Bits.PTPS3
#define PTPSR_PTPS4 _PTPSR.Bits.PTPS4
#define PTPSR_PTPS5 _PTPSR.Bits.PTPS5
#define PTPSR_PTPS6 _PTPSR.Bits.PTPS6
#define PTPSR_PTPS7 _PTPSR.Bits.PTPS7
#define PTPSR_PTPS0_MASK 0x01U
#define PTPSR_PTPS1_MASK 0x02U
#define PTPSR_PTPS2_MASK 0x04U
#define PTPSR_PTPS3_MASK 0x08U
#define PTPSR_PTPS4_MASK 0x10U
#define PTPSR_PTPS5_MASK 0x20U
#define PTPSR_PTPS6_MASK 0x40U
#define PTPSR_PTPS7_MASK 0x80U
/*** ATDCTL01 - ATD Control Register 01; 0x00000070 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCTL0 - ATD Control Register 0; 0x00000070 ***/
union {
byte Byte;
struct {
byte WRAP0 :1; /* Wrap Around Channel Select Bit 0 */
byte WRAP1 :1; /* Wrap Around Channel Select Bit 1 */
byte WRAP2 :1; /* Wrap Around Channel Select Bit 2 */
byte WRAP3 :1; /* Wrap Around Channel Select Bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpWRAP :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDCTL0STR;
#define ATDCTL0 _ATDCTL01.Overlap_STR.ATDCTL0STR.Byte
#define ATDCTL0_WRAP0 _ATDCTL01.Overlap_STR.ATDCTL0STR.Bits.WRAP0
#define ATDCTL0_WRAP1 _ATDCTL01.Overlap_STR.ATDCTL0STR.Bits.WRAP1
#define ATDCTL0_WRAP2 _ATDCTL01.Overlap_STR.ATDCTL0STR.Bits.WRAP2
#define ATDCTL0_WRAP3 _ATDCTL01.Overlap_STR.ATDCTL0STR.Bits.WRAP3
/* ATDCTL_ARR: Access 6 ATDCTLx registers in an array */
#define ATDCTL_ARR ((volatile byte *) &ATDCTL0)
#define ATDCTL0_WRAP _ATDCTL01.Overlap_STR.ATDCTL0STR.MergedBits.grpWRAP
#define ATDCTL0_WRAP0_MASK 0x01U
#define ATDCTL0_WRAP1_MASK 0x02U
#define ATDCTL0_WRAP2_MASK 0x04U
#define ATDCTL0_WRAP3_MASK 0x08U
#define ATDCTL0_WRAP_MASK 0x0FU
#define ATDCTL0_WRAP_BITNUM 0x00U
/*** ATDCTL1 - ATD Control Register 1; 0x00000071 ***/
union {
byte Byte;
struct {
byte ETRIGCH0 :1; /* External Trigger Channel Select Bit 0 */
byte ETRIGCH1 :1; /* External Trigger Channel Select Bit 1 */
byte ETRIGCH2 :1; /* External Trigger Channel Select Bit 2 */
byte ETRIGCH3 :1; /* External Trigger Channel Select Bit 3 */
byte SMP_DIS :1; /* Discharge Before Sampling Bit */
byte SRES0 :1; /* A/D Resolution Select Bit 0 */
byte SRES1 :1; /* A/D Resolution Select Bit 1 */
byte ETRIGSEL :1; /* External Trigger Source Select */
} Bits;
struct {
byte grpETRIGCH :4;
byte :1;
byte grpSRES :2;
byte :1;
} MergedBits;
} ATDCTL1STR;
#define ATDCTL1 _ATDCTL01.Overlap_STR.ATDCTL1STR.Byte
#define ATDCTL1_ETRIGCH0 _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.ETRIGCH0
#define ATDCTL1_ETRIGCH1 _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.ETRIGCH1
#define ATDCTL1_ETRIGCH2 _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.ETRIGCH2
#define ATDCTL1_ETRIGCH3 _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.ETRIGCH3
#define ATDCTL1_SMP_DIS _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.SMP_DIS
#define ATDCTL1_SRES0 _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.SRES0
#define ATDCTL1_SRES1 _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.SRES1
#define ATDCTL1_ETRIGSEL _ATDCTL01.Overlap_STR.ATDCTL1STR.Bits.ETRIGSEL
#define ATDCTL1_ETRIGCH _ATDCTL01.Overlap_STR.ATDCTL1STR.MergedBits.grpETRIGCH
#define ATDCTL1_SRES _ATDCTL01.Overlap_STR.ATDCTL1STR.MergedBits.grpSRES
#define ATDCTL1_ETRIGCH0_MASK 0x01U
#define ATDCTL1_ETRIGCH1_MASK 0x02U
#define ATDCTL1_ETRIGCH2_MASK 0x04U
#define ATDCTL1_ETRIGCH3_MASK 0x08U
#define ATDCTL1_SMP_DIS_MASK 0x10U
#define ATDCTL1_SRES0_MASK 0x20U
#define ATDCTL1_SRES1_MASK 0x40U
#define ATDCTL1_ETRIGSEL_MASK 0x80U
#define ATDCTL1_ETRIGCH_MASK 0x0FU
#define ATDCTL1_ETRIGCH_BITNUM 0x00U
#define ATDCTL1_SRES_MASK 0x60U
#define ATDCTL1_SRES_BITNUM 0x05U
} Overlap_STR;
struct {
word ETRIGCH0 :1; /* External Trigger Channel Select Bit 0 */
word ETRIGCH1 :1; /* External Trigger Channel Select Bit 1 */
word ETRIGCH2 :1; /* External Trigger Channel Select Bit 2 */
word ETRIGCH3 :1; /* External Trigger Channel Select Bit 3 */
word SMP_DIS :1; /* Discharge Before Sampling Bit */
word SRES0 :1; /* A/D Resolution Select Bit 0 */
word SRES1 :1; /* A/D Resolution Select Bit 1 */
word ETRIGSEL :1; /* External Trigger Source Select */
word WRAP0 :1; /* Wrap Around Channel Select Bit 0 */
word WRAP1 :1; /* Wrap Around Channel Select Bit 1 */
word WRAP2 :1; /* Wrap Around Channel Select Bit 2 */
word WRAP3 :1; /* Wrap Around Channel Select Bit 3 */
word :1;
word :1;
word :1;
word :1;
} Bits;
struct {
word grpETRIGCH :4;
word :1;
word grpSRES :2;
word :1;
word grpWRAP :4;
word :1;
word :1;
word :1;
word :1;
} MergedBits;
} ATDCTL01STR;
extern volatile ATDCTL01STR _ATDCTL01 @(REG_BASE + 0x00000070UL);
#define ATDCTL01 _ATDCTL01.Word
#define ATDCTL01_ETRIGCH0 _ATDCTL01.Bits.ETRIGCH0
#define ATDCTL01_ETRIGCH1 _ATDCTL01.Bits.ETRIGCH1
#define ATDCTL01_ETRIGCH2 _ATDCTL01.Bits.ETRIGCH2
#define ATDCTL01_ETRIGCH3 _ATDCTL01.Bits.ETRIGCH3
#define ATDCTL01_SMP_DIS _ATDCTL01.Bits.SMP_DIS
#define ATDCTL01_SRES0 _ATDCTL01.Bits.SRES0
#define ATDCTL01_SRES1 _ATDCTL01.Bits.SRES1
#define ATDCTL01_ETRIGSEL _ATDCTL01.Bits.ETRIGSEL
#define ATDCTL01_WRAP0 _ATDCTL01.Bits.WRAP0
#define ATDCTL01_WRAP1 _ATDCTL01.Bits.WRAP1
#define ATDCTL01_WRAP2 _ATDCTL01.Bits.WRAP2
#define ATDCTL01_WRAP3 _ATDCTL01.Bits.WRAP3
#define ATDCTL01_ETRIGCH _ATDCTL01.MergedBits.grpETRIGCH
#define ATDCTL01_SRES _ATDCTL01.MergedBits.grpSRES
#define ATDCTL01_WRAP _ATDCTL01.MergedBits.grpWRAP
#define ATDCTL01_ETRIGCH0_MASK 0x01U
#define ATDCTL01_ETRIGCH1_MASK 0x02U
#define ATDCTL01_ETRIGCH2_MASK 0x04U
#define ATDCTL01_ETRIGCH3_MASK 0x08U
#define ATDCTL01_SMP_DIS_MASK 0x10U
#define ATDCTL01_SRES0_MASK 0x20U
#define ATDCTL01_SRES1_MASK 0x40U
#define ATDCTL01_ETRIGSEL_MASK 0x80U
#define ATDCTL01_WRAP0_MASK 0x0100U
#define ATDCTL01_WRAP1_MASK 0x0200U
#define ATDCTL01_WRAP2_MASK 0x0400U
#define ATDCTL01_WRAP3_MASK 0x0800U
#define ATDCTL01_ETRIGCH_MASK 0x0FU
#define ATDCTL01_ETRIGCH_BITNUM 0x00U
#define ATDCTL01_SRES_MASK 0x60U
#define ATDCTL01_SRES_BITNUM 0x05U
#define ATDCTL01_WRAP_MASK 0x0F00U
#define ATDCTL01_WRAP_BITNUM 0x08U
/*** ATDCTL23 - ATD Control Register 23; 0x00000072 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCTL2 - ATD Control Register 2; 0x00000072 ***/
union {
byte Byte;
struct {
byte ACMPIE :1; /* ATD Compare Interrupt Enable */
byte ASCIE :1; /* ATD Sequence Complete Interrupt Enable */
byte ETRIGE :1; /* External Trigger Mode enable */
byte ETRIGP :1; /* External Trigger Polarity */
byte ETRIGLE :1; /* External Trigger Level/Edge control */
byte :1;
byte AFFC :1; /* ATD Fast Conversion Complete Flag Clear */
byte :1;
} Bits;
} ATDCTL2STR;
#define ATDCTL2 _ATDCTL23.Overlap_STR.ATDCTL2STR.Byte
#define ATDCTL2_ACMPIE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ACMPIE
#define ATDCTL2_ASCIE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ASCIE
#define ATDCTL2_ETRIGE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGE
#define ATDCTL2_ETRIGP _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGP
#define ATDCTL2_ETRIGLE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGLE
#define ATDCTL2_AFFC _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.AFFC
#define ATDCTL2_ACMPIE_MASK 0x01U
#define ATDCTL2_ASCIE_MASK 0x02U
#define ATDCTL2_ETRIGE_MASK 0x04U
#define ATDCTL2_ETRIGP_MASK 0x08U
#define ATDCTL2_ETRIGLE_MASK 0x10U
#define ATDCTL2_AFFC_MASK 0x40U
/*** ATDCTL3 - ATD Control Register 3; 0x00000073 ***/
union {
byte Byte;
struct {
byte FRZ0 :1; /* Background Debug Freeze Enable Bit 0 */
byte FRZ1 :1; /* Background Debug Freeze Enable Bit 1 */
byte FIFO :1; /* Result Register FIFO Mode */
byte S1C :1; /* Conversion Sequence Length 1 */
byte S2C :1; /* Conversion Sequence Length 2 */
byte S4C :1; /* Conversion Sequence Length 4 */
byte S8C :1; /* Conversion Sequence Length 8 */
byte DJM :1; /* Result Register Data Justification */
} Bits;
struct {
byte grpFRZ :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDCTL3STR;
#define ATDCTL3 _ATDCTL23.Overlap_STR.ATDCTL3STR.Byte
#define ATDCTL3_FRZ0 _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FRZ0
#define ATDCTL3_FRZ1 _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FRZ1
#define ATDCTL3_FIFO _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FIFO
#define ATDCTL3_S1C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S1C
#define ATDCTL3_S2C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S2C
#define ATDCTL3_S4C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S4C
#define ATDCTL3_S8C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S8C
#define ATDCTL3_DJM _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.DJM
#define ATDCTL3_FRZ _ATDCTL23.Overlap_STR.ATDCTL3STR.MergedBits.grpFRZ
#define ATDCTL3_FRZ0_MASK 0x01U
#define ATDCTL3_FRZ1_MASK 0x02U
#define ATDCTL3_FIFO_MASK 0x04U
#define ATDCTL3_S1C_MASK 0x08U
#define ATDCTL3_S2C_MASK 0x10U
#define ATDCTL3_S4C_MASK 0x20U
#define ATDCTL3_S8C_MASK 0x40U
#define ATDCTL3_DJM_MASK 0x80U
#define ATDCTL3_FRZ_MASK 0x03U
#define ATDCTL3_FRZ_BITNUM 0x00U
} Overlap_STR;
struct {
word FRZ0 :1; /* Background Debug Freeze Enable Bit 0 */
word FRZ1 :1; /* Background Debug Freeze Enable Bit 1 */
word FIFO :1; /* Result Register FIFO Mode */
word S1C :1; /* Conversion Sequence Length 1 */
word S2C :1; /* Conversion Sequence Length 2 */
word S4C :1; /* Conversion Sequence Length 4 */
word S8C :1; /* Conversion Sequence Length 8 */
word DJM :1; /* Result Register Data Justification */
word ACMPIE :1; /* ATD Compare Interrupt Enable */
word ASCIE :1; /* ATD Sequence Complete Interrupt Enable */
word ETRIGE :1; /* External Trigger Mode enable */
word ETRIGP :1; /* External Trigger Polarity */
word ETRIGLE :1; /* External Trigger Level/Edge control */
word :1;
word AFFC :1; /* ATD Fast Conversion Complete Flag Clear */
word :1;
} Bits;
struct {
word grpFRZ :2;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
} MergedBits;
} ATDCTL23STR;
extern volatile ATDCTL23STR _ATDCTL23 @(REG_BASE + 0x00000072UL);
#define ATDCTL23 _ATDCTL23.Word
#define ATDCTL23_FRZ0 _ATDCTL23.Bits.FRZ0
#define ATDCTL23_FRZ1 _ATDCTL23.Bits.FRZ1
#define ATDCTL23_FIFO _ATDCTL23.Bits.FIFO
#define ATDCTL23_S1C _ATDCTL23.Bits.S1C
#define ATDCTL23_S2C _ATDCTL23.Bits.S2C
#define ATDCTL23_S4C _ATDCTL23.Bits.S4C
#define ATDCTL23_S8C _ATDCTL23.Bits.S8C
#define ATDCTL23_DJM _ATDCTL23.Bits.DJM
#define ATDCTL23_ACMPIE _ATDCTL23.Bits.ACMPIE
#define ATDCTL23_ASCIE _ATDCTL23.Bits.ASCIE
#define ATDCTL23_ETRIGE _ATDCTL23.Bits.ETRIGE
#define ATDCTL23_ETRIGP _ATDCTL23.Bits.ETRIGP
#define ATDCTL23_ETRIGLE _ATDCTL23.Bits.ETRIGLE
#define ATDCTL23_AFFC _ATDCTL23.Bits.AFFC
#define ATDCTL23_FRZ _ATDCTL23.MergedBits.grpFRZ
#define ATDCTL23_FRZ0_MASK 0x01U
#define ATDCTL23_FRZ1_MASK 0x02U
#define ATDCTL23_FIFO_MASK 0x04U
#define ATDCTL23_S1C_MASK 0x08U
#define ATDCTL23_S2C_MASK 0x10U
#define ATDCTL23_S4C_MASK 0x20U
#define ATDCTL23_S8C_MASK 0x40U
#define ATDCTL23_DJM_MASK 0x80U
#define ATDCTL23_ACMPIE_MASK 0x0100U
#define ATDCTL23_ASCIE_MASK 0x0200U
#define ATDCTL23_ETRIGE_MASK 0x0400U
#define ATDCTL23_ETRIGP_MASK 0x0800U
#define ATDCTL23_ETRIGLE_MASK 0x1000U
#define ATDCTL23_AFFC_MASK 0x4000U
#define ATDCTL23_FRZ_MASK 0x03U
#define ATDCTL23_FRZ_BITNUM 0x00U
/*** ATDCTL45 - ATD Control Register 45; 0x00000074 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCTL4 - ATD Control Register 4; 0x00000074 ***/
union {
byte Byte;
struct {
byte PRS0 :1; /* ATD Clock Prescaler 0 */
byte PRS1 :1; /* ATD Clock Prescaler 1 */
byte PRS2 :1; /* ATD Clock Prescaler 2 */
byte PRS3 :1; /* ATD Clock Prescaler 3 */
byte PRS4 :1; /* ATD Clock Prescaler 4 */
byte SMP0 :1; /* Sample Time Select 0 */
byte SMP1 :1; /* Sample Time Select 1 */
byte SMP2 :1; /* Sample Time Select 2 */
} Bits;
struct {
byte grpPRS :5;
byte grpSMP :3;
} MergedBits;
} ATDCTL4STR;
#define ATDCTL4 _ATDCTL45.Overlap_STR.ATDCTL4STR.Byte
#define ATDCTL4_PRS0 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS0
#define ATDCTL4_PRS1 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS1
#define ATDCTL4_PRS2 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS2
#define ATDCTL4_PRS3 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS3
#define ATDCTL4_PRS4 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS4
#define ATDCTL4_SMP0 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.SMP0
#define ATDCTL4_SMP1 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.SMP1
#define ATDCTL4_SMP2 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.SMP2
#define ATDCTL4_PRS _ATDCTL45.Overlap_STR.ATDCTL4STR.MergedBits.grpPRS
#define ATDCTL4_SMP _ATDCTL45.Overlap_STR.ATDCTL4STR.MergedBits.grpSMP
#define ATDCTL4_PRS0_MASK 0x01U
#define ATDCTL4_PRS1_MASK 0x02U
#define ATDCTL4_PRS2_MASK 0x04U
#define ATDCTL4_PRS3_MASK 0x08U
#define ATDCTL4_PRS4_MASK 0x10U
#define ATDCTL4_SMP0_MASK 0x20U
#define ATDCTL4_SMP1_MASK 0x40U
#define ATDCTL4_SMP2_MASK 0x80U
#define ATDCTL4_PRS_MASK 0x1FU
#define ATDCTL4_PRS_BITNUM 0x00U
#define ATDCTL4_SMP_MASK 0xE0U
#define ATDCTL4_SMP_BITNUM 0x05U
/*** ATDCTL5 - ATD Control Register 5; 0x00000075 ***/
union {
byte Byte;
struct {
byte CA :1; /* Analog Input Channel Select Code A */
byte CB :1; /* Analog Input Channel Select Code B */
byte CC :1; /* Analog Input Channel Select Code C */
byte CD :1; /* Analog Input Channel Select Code D */
byte MULT :1; /* Multi-Channel Sample Mode */
byte SCAN :1; /* Continuous Conversion Sequence Mode */
byte SC :1; /* Special Channel Conversion Bit */
byte :1;
} Bits;
struct {
byte grpCx :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDCTL5STR;
#define ATDCTL5 _ATDCTL45.Overlap_STR.ATDCTL5STR.Byte
#define ATDCTL5_CA _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.CA
#define ATDCTL5_CB _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.CB
#define ATDCTL5_CC _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.CC
#define ATDCTL5_CD _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.CD
#define ATDCTL5_MULT _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.MULT
#define ATDCTL5_SCAN _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.SCAN
#define ATDCTL5_SC _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.SC
#define ATDCTL5_Cx _ATDCTL45.Overlap_STR.ATDCTL5STR.MergedBits.grpCx
#define ATDCTL5_CA_MASK 0x01U
#define ATDCTL5_CB_MASK 0x02U
#define ATDCTL5_CC_MASK 0x04U
#define ATDCTL5_CD_MASK 0x08U
#define ATDCTL5_MULT_MASK 0x10U
#define ATDCTL5_SCAN_MASK 0x20U
#define ATDCTL5_SC_MASK 0x40U
#define ATDCTL5_Cx_MASK 0x0FU
#define ATDCTL5_Cx_BITNUM 0x00U
} Overlap_STR;
struct {
word CA :1; /* Analog Input Channel Select Code A */
word CB :1; /* Analog Input Channel Select Code B */
word CC :1; /* Analog Input Channel Select Code C */
word CD :1; /* Analog Input Channel Select Code D */
word MULT :1; /* Multi-Channel Sample Mode */
word SCAN :1; /* Continuous Conversion Sequence Mode */
word SC :1; /* Special Channel Conversion Bit */
word :1;
word PRS0 :1; /* ATD Clock Prescaler 0 */
word PRS1 :1; /* ATD Clock Prescaler 1 */
word PRS2 :1; /* ATD Clock Prescaler 2 */
word PRS3 :1; /* ATD Clock Prescaler 3 */
word PRS4 :1; /* ATD Clock Prescaler 4 */
word SMP0 :1; /* Sample Time Select 0 */
word SMP1 :1; /* Sample Time Select 1 */
word SMP2 :1; /* Sample Time Select 2 */
} Bits;
struct {
word grpCx :4;
word :1;
word :1;
word :1;
word :1;
word grpPRS :5;
word grpSMP :3;
} MergedBits;
} ATDCTL45STR;
extern volatile ATDCTL45STR _ATDCTL45 @(REG_BASE + 0x00000074UL);
#define ATDCTL45 _ATDCTL45.Word
#define ATDCTL45_CA _ATDCTL45.Bits.CA
#define ATDCTL45_CB _ATDCTL45.Bits.CB
#define ATDCTL45_CC _ATDCTL45.Bits.CC
#define ATDCTL45_CD _ATDCTL45.Bits.CD
#define ATDCTL45_MULT _ATDCTL45.Bits.MULT
#define ATDCTL45_SCAN _ATDCTL45.Bits.SCAN
#define ATDCTL45_SC _ATDCTL45.Bits.SC
#define ATDCTL45_PRS0 _ATDCTL45.Bits.PRS0
#define ATDCTL45_PRS1 _ATDCTL45.Bits.PRS1
#define ATDCTL45_PRS2 _ATDCTL45.Bits.PRS2
#define ATDCTL45_PRS3 _ATDCTL45.Bits.PRS3
#define ATDCTL45_PRS4 _ATDCTL45.Bits.PRS4
#define ATDCTL45_SMP0 _ATDCTL45.Bits.SMP0
#define ATDCTL45_SMP1 _ATDCTL45.Bits.SMP1
#define ATDCTL45_SMP2 _ATDCTL45.Bits.SMP2
#define ATDCTL45_Cx _ATDCTL45.MergedBits.grpCx
#define ATDCTL45_PRS _ATDCTL45.MergedBits.grpPRS
#define ATDCTL45_SMP _ATDCTL45.MergedBits.grpSMP
#define ATDCTL45_CA_MASK 0x01U
#define ATDCTL45_CB_MASK 0x02U
#define ATDCTL45_CC_MASK 0x04U
#define ATDCTL45_CD_MASK 0x08U
#define ATDCTL45_MULT_MASK 0x10U
#define ATDCTL45_SCAN_MASK 0x20U
#define ATDCTL45_SC_MASK 0x40U
#define ATDCTL45_PRS0_MASK 0x0100U
#define ATDCTL45_PRS1_MASK 0x0200U
#define ATDCTL45_PRS2_MASK 0x0400U
#define ATDCTL45_PRS3_MASK 0x0800U
#define ATDCTL45_PRS4_MASK 0x1000U
#define ATDCTL45_SMP0_MASK 0x2000U
#define ATDCTL45_SMP1_MASK 0x4000U
#define ATDCTL45_SMP2_MASK 0x8000U
#define ATDCTL45_Cx_MASK 0x0FU
#define ATDCTL45_Cx_BITNUM 0x00U
#define ATDCTL45_PRS_MASK 0x1F00U
#define ATDCTL45_PRS_BITNUM 0x08U
#define ATDCTL45_SMP_MASK 0xE000U
#define ATDCTL45_SMP_BITNUM 0x0DU
/*** ATDSTAT0 - ATD Status Register 0; 0x00000076 ***/
typedef union {
byte Byte;
struct {
byte CC0 :1; /* Conversion Counter 0 */
byte CC1 :1; /* Conversion Counter 1 */
byte CC2 :1; /* Conversion Counter 2 */
byte CC3 :1; /* Conversion Counter 3 */
byte FIFOR :1; /* FIFO Over Run Flag */
byte ETORF :1; /* External Trigger Overrun Flag */
byte :1;
byte SCF :1; /* Sequence Complete Flag */
} Bits;
struct {
byte grpCC :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDSTAT0STR;
extern volatile ATDSTAT0STR _ATDSTAT0 @(REG_BASE + 0x00000076UL);
#define ATDSTAT0 _ATDSTAT0.Byte
#define ATDSTAT0_CC0 _ATDSTAT0.Bits.CC0
#define ATDSTAT0_CC1 _ATDSTAT0.Bits.CC1
#define ATDSTAT0_CC2 _ATDSTAT0.Bits.CC2
#define ATDSTAT0_CC3 _ATDSTAT0.Bits.CC3
#define ATDSTAT0_FIFOR _ATDSTAT0.Bits.FIFOR
#define ATDSTAT0_ETORF _ATDSTAT0.Bits.ETORF
#define ATDSTAT0_SCF _ATDSTAT0.Bits.SCF
#define ATDSTAT0_CC _ATDSTAT0.MergedBits.grpCC
#define ATDSTAT0_CC0_MASK 0x01U
#define ATDSTAT0_CC1_MASK 0x02U
#define ATDSTAT0_CC2_MASK 0x04U
#define ATDSTAT0_CC3_MASK 0x08U
#define ATDSTAT0_FIFOR_MASK 0x10U
#define ATDSTAT0_ETORF_MASK 0x20U
#define ATDSTAT0_SCF_MASK 0x80U
#define ATDSTAT0_CC_MASK 0x0FU
#define ATDSTAT0_CC_BITNUM 0x00U
/*** ATDCMPE - ATD Compare Enable Register; 0x00000078 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCMPEH - ATD Compare Enable Register High; 0x00000078 ***/
union {
byte Byte;
struct {
byte CMPE8 :1; /* Compare Enable for Conversion Number 8 of a Sequence */
byte CMPE9 :1; /* Compare Enable for Conversion Number 9 of a Sequence */
byte CMPE10 :1; /* Compare Enable for Conversion Number 10 of a Sequence */
byte CMPE11 :1; /* Compare Enable for Conversion Number 11 of a Sequence */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpCMPE_8 :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDCMPEHSTR;
#define ATDCMPEH _ATDCMPE.Overlap_STR.ATDCMPEHSTR.Byte
#define ATDCMPEH_CMPE8 _ATDCMPE.Overlap_STR.ATDCMPEHSTR.Bits.CMPE8
#define ATDCMPEH_CMPE9 _ATDCMPE.Overlap_STR.ATDCMPEHSTR.Bits.CMPE9
#define ATDCMPEH_CMPE10 _ATDCMPE.Overlap_STR.ATDCMPEHSTR.Bits.CMPE10
#define ATDCMPEH_CMPE11 _ATDCMPE.Overlap_STR.ATDCMPEHSTR.Bits.CMPE11
#define ATDCMPEH_CMPE_8 _ATDCMPE.Overlap_STR.ATDCMPEHSTR.MergedBits.grpCMPE_8
#define ATDCMPEH_CMPE ATDCMPEH_CMPE_8
#define ATDCMPEH_CMPE8_MASK 0x01U
#define ATDCMPEH_CMPE9_MASK 0x02U
#define ATDCMPEH_CMPE10_MASK 0x04U
#define ATDCMPEH_CMPE11_MASK 0x08U
#define ATDCMPEH_CMPE_8_MASK 0x0FU
#define ATDCMPEH_CMPE_8_BITNUM 0x00U
/*** ATDCMPEL - ATD Compare Enable Register Low; 0x00000079 ***/
union {
byte Byte;
struct {
byte CMPE0 :1; /* Compare Enable for Conversion Number 0 of a Sequence */
byte CMPE1 :1; /* Compare Enable for Conversion Number 1 of a Sequence */
byte CMPE2 :1; /* Compare Enable for Conversion Number 2 of a Sequence */
byte CMPE3 :1; /* Compare Enable for Conversion Number 3 of a Sequence */
byte CMPE4 :1; /* Compare Enable for Conversion Number 4 of a Sequence */
byte CMPE5 :1; /* Compare Enable for Conversion Number 5 of a Sequence */
byte CMPE6 :1; /* Compare Enable for Conversion Number 6 of a Sequence */
byte CMPE7 :1; /* Compare Enable for Conversion Number 7 of a Sequence */
} Bits;
} ATDCMPELSTR;
#define ATDCMPEL _ATDCMPE.Overlap_STR.ATDCMPELSTR.Byte
#define ATDCMPEL_CMPE0 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE0
#define ATDCMPEL_CMPE1 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE1
#define ATDCMPEL_CMPE2 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE2
#define ATDCMPEL_CMPE3 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE3
#define ATDCMPEL_CMPE4 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE4
#define ATDCMPEL_CMPE5 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE5
#define ATDCMPEL_CMPE6 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE6
#define ATDCMPEL_CMPE7 _ATDCMPE.Overlap_STR.ATDCMPELSTR.Bits.CMPE7
#define ATDCMPEL_CMPE0_MASK 0x01U
#define ATDCMPEL_CMPE1_MASK 0x02U
#define ATDCMPEL_CMPE2_MASK 0x04U
#define ATDCMPEL_CMPE3_MASK 0x08U
#define ATDCMPEL_CMPE4_MASK 0x10U
#define ATDCMPEL_CMPE5_MASK 0x20U
#define ATDCMPEL_CMPE6_MASK 0x40U
#define ATDCMPEL_CMPE7_MASK 0x80U
} Overlap_STR;
struct {
word CMPE0 :1; /* Compare Enable for Conversion Number 0 of a Sequence */
word CMPE1 :1; /* Compare Enable for Conversion Number 1 of a Sequence */
word CMPE2 :1; /* Compare Enable for Conversion Number 2 of a Sequence */
word CMPE3 :1; /* Compare Enable for Conversion Number 3 of a Sequence */
word CMPE4 :1; /* Compare Enable for Conversion Number 4 of a Sequence */
word CMPE5 :1; /* Compare Enable for Conversion Number 5 of a Sequence */
word CMPE6 :1; /* Compare Enable for Conversion Number 6 of a Sequence */
word CMPE7 :1; /* Compare Enable for Conversion Number 7 of a Sequence */
word CMPE8 :1; /* Compare Enable for Conversion Number 8 of a Sequence */
word CMPE9 :1; /* Compare Enable for Conversion Number 9 of a Sequence */
word CMPE10 :1; /* Compare Enable for Conversion Number 10 of a Sequence */
word CMPE11 :1; /* Compare Enable for Conversion Number 11 of a Sequence */
word :1;
word :1;
word :1;
word :1;
} Bits;
struct {
word grpCMPE :12;
word :1;
word :1;
word :1;
word :1;
} MergedBits;
} ATDCMPESTR;
extern volatile ATDCMPESTR _ATDCMPE @(REG_BASE + 0x00000078UL);
#define ATDCMPE _ATDCMPE.Word
#define ATDCMPE_CMPE0 _ATDCMPE.Bits.CMPE0
#define ATDCMPE_CMPE1 _ATDCMPE.Bits.CMPE1
#define ATDCMPE_CMPE2 _ATDCMPE.Bits.CMPE2
#define ATDCMPE_CMPE3 _ATDCMPE.Bits.CMPE3
#define ATDCMPE_CMPE4 _ATDCMPE.Bits.CMPE4
#define ATDCMPE_CMPE5 _ATDCMPE.Bits.CMPE5
#define ATDCMPE_CMPE6 _ATDCMPE.Bits.CMPE6
#define ATDCMPE_CMPE7 _ATDCMPE.Bits.CMPE7
#define ATDCMPE_CMPE8 _ATDCMPE.Bits.CMPE8
#define ATDCMPE_CMPE9 _ATDCMPE.Bits.CMPE9
#define ATDCMPE_CMPE10 _ATDCMPE.Bits.CMPE10
#define ATDCMPE_CMPE11 _ATDCMPE.Bits.CMPE11
#define ATDCMPE_CMPE _ATDCMPE.MergedBits.grpCMPE
#define ATDCMPE_CMPE0_MASK 0x01U
#define ATDCMPE_CMPE1_MASK 0x02U
#define ATDCMPE_CMPE2_MASK 0x04U
#define ATDCMPE_CMPE3_MASK 0x08U
#define ATDCMPE_CMPE4_MASK 0x10U
#define ATDCMPE_CMPE5_MASK 0x20U
#define ATDCMPE_CMPE6_MASK 0x40U
#define ATDCMPE_CMPE7_MASK 0x80U
#define ATDCMPE_CMPE8_MASK 0x0100U
#define ATDCMPE_CMPE9_MASK 0x0200U
#define ATDCMPE_CMPE10_MASK 0x0400U
#define ATDCMPE_CMPE11_MASK 0x0800U
#define ATDCMPE_CMPE_MASK 0x0FFFU
#define ATDCMPE_CMPE_BITNUM 0x00U
/*** ATDSTAT2 - ATD Status Register 2; 0x0000007A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDSTAT2H - ATD Status Register 2 High; 0x0000007A ***/
union {
byte Byte;
struct {
byte CCF8 :1; /* Conversion Complete Flag 8 */
byte CCF9 :1; /* Conversion Complete Flag 9 */
byte CCF10 :1; /* Conversion Complete Flag 10 */
byte CCF11 :1; /* Conversion Complete Flag 11 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpCCF_8 :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDSTAT2HSTR;
#define ATDSTAT2H _ATDSTAT2.Overlap_STR.ATDSTAT2HSTR.Byte
#define ATDSTAT2H_CCF8 _ATDSTAT2.Overlap_STR.ATDSTAT2HSTR.Bits.CCF8
#define ATDSTAT2H_CCF9 _ATDSTAT2.Overlap_STR.ATDSTAT2HSTR.Bits.CCF9
#define ATDSTAT2H_CCF10 _ATDSTAT2.Overlap_STR.ATDSTAT2HSTR.Bits.CCF10
#define ATDSTAT2H_CCF11 _ATDSTAT2.Overlap_STR.ATDSTAT2HSTR.Bits.CCF11
#define ATDSTAT2H_CCF_8 _ATDSTAT2.Overlap_STR.ATDSTAT2HSTR.MergedBits.grpCCF_8
#define ATDSTAT2H_CCF ATDSTAT2H_CCF_8
#define ATDSTAT2H_CCF8_MASK 0x01U
#define ATDSTAT2H_CCF9_MASK 0x02U
#define ATDSTAT2H_CCF10_MASK 0x04U
#define ATDSTAT2H_CCF11_MASK 0x08U
#define ATDSTAT2H_CCF_8_MASK 0x0FU
#define ATDSTAT2H_CCF_8_BITNUM 0x00U
/*** ATDSTAT2L - ATD Status Register 2 Low; 0x0000007B ***/
union {
byte Byte;
struct {
byte CCF0 :1; /* Conversion Complete Flag 0 */
byte CCF1 :1; /* Conversion Complete Flag 1 */
byte CCF2 :1; /* Conversion Complete Flag 2 */
byte CCF3 :1; /* Conversion Complete Flag 3 */
byte CCF4 :1; /* Conversion Complete Flag 4 */
byte CCF5 :1; /* Conversion Complete Flag 5 */
byte CCF6 :1; /* Conversion Complete Flag 6 */
byte CCF7 :1; /* Conversion Complete Flag 7 */
} Bits;
} ATDSTAT2LSTR;
#define ATDSTAT2L _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Byte
#define ATDSTAT2L_CCF0 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF0
#define ATDSTAT2L_CCF1 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF1
#define ATDSTAT2L_CCF2 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF2
#define ATDSTAT2L_CCF3 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF3
#define ATDSTAT2L_CCF4 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF4
#define ATDSTAT2L_CCF5 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF5
#define ATDSTAT2L_CCF6 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF6
#define ATDSTAT2L_CCF7 _ATDSTAT2.Overlap_STR.ATDSTAT2LSTR.Bits.CCF7
#define ATDSTAT2L_CCF0_MASK 0x01U
#define ATDSTAT2L_CCF1_MASK 0x02U
#define ATDSTAT2L_CCF2_MASK 0x04U
#define ATDSTAT2L_CCF3_MASK 0x08U
#define ATDSTAT2L_CCF4_MASK 0x10U
#define ATDSTAT2L_CCF5_MASK 0x20U
#define ATDSTAT2L_CCF6_MASK 0x40U
#define ATDSTAT2L_CCF7_MASK 0x80U
} Overlap_STR;
struct {
word CCF0 :1; /* Conversion Complete Flag 0 */
word CCF1 :1; /* Conversion Complete Flag 1 */
word CCF2 :1; /* Conversion Complete Flag 2 */
word CCF3 :1; /* Conversion Complete Flag 3 */
word CCF4 :1; /* Conversion Complete Flag 4 */
word CCF5 :1; /* Conversion Complete Flag 5 */
word CCF6 :1; /* Conversion Complete Flag 6 */
word CCF7 :1; /* Conversion Complete Flag 7 */
word CCF8 :1; /* Conversion Complete Flag 8 */
word CCF9 :1; /* Conversion Complete Flag 9 */
word CCF10 :1; /* Conversion Complete Flag 10 */
word CCF11 :1; /* Conversion Complete Flag 11 */
word :1;
word :1;
word :1;
word :1;
} Bits;
struct {
word grpCCF :12;
word :1;
word :1;
word :1;
word :1;
} MergedBits;
} ATDSTAT2STR;
extern volatile ATDSTAT2STR _ATDSTAT2 @(REG_BASE + 0x0000007AUL);
#define ATDSTAT2 _ATDSTAT2.Word
#define ATDSTAT2_CCF0 _ATDSTAT2.Bits.CCF0
#define ATDSTAT2_CCF1 _ATDSTAT2.Bits.CCF1
#define ATDSTAT2_CCF2 _ATDSTAT2.Bits.CCF2
#define ATDSTAT2_CCF3 _ATDSTAT2.Bits.CCF3
#define ATDSTAT2_CCF4 _ATDSTAT2.Bits.CCF4
#define ATDSTAT2_CCF5 _ATDSTAT2.Bits.CCF5
#define ATDSTAT2_CCF6 _ATDSTAT2.Bits.CCF6
#define ATDSTAT2_CCF7 _ATDSTAT2.Bits.CCF7
#define ATDSTAT2_CCF8 _ATDSTAT2.Bits.CCF8
#define ATDSTAT2_CCF9 _ATDSTAT2.Bits.CCF9
#define ATDSTAT2_CCF10 _ATDSTAT2.Bits.CCF10
#define ATDSTAT2_CCF11 _ATDSTAT2.Bits.CCF11
#define ATDSTAT2_CCF _ATDSTAT2.MergedBits.grpCCF
#define ATDSTAT2_CCF0_MASK 0x01U
#define ATDSTAT2_CCF1_MASK 0x02U
#define ATDSTAT2_CCF2_MASK 0x04U
#define ATDSTAT2_CCF3_MASK 0x08U
#define ATDSTAT2_CCF4_MASK 0x10U
#define ATDSTAT2_CCF5_MASK 0x20U
#define ATDSTAT2_CCF6_MASK 0x40U
#define ATDSTAT2_CCF7_MASK 0x80U
#define ATDSTAT2_CCF8_MASK 0x0100U
#define ATDSTAT2_CCF9_MASK 0x0200U
#define ATDSTAT2_CCF10_MASK 0x0400U
#define ATDSTAT2_CCF11_MASK 0x0800U
#define ATDSTAT2_CCF_MASK 0x0FFFU
#define ATDSTAT2_CCF_BITNUM 0x00U
/*** ATDDIEN - ATD Input Enable Register; 0x0000007C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDIENH - ATD Input Enable Register High; 0x0000007C ***/
union {
byte Byte;
struct {
byte IEN8 :1; /* ATD Digital Input Enable on channel 8 */
byte IEN9 :1; /* ATD Digital Input Enable on channel 9 */
byte IEN10 :1; /* ATD Digital Input Enable on channel 10 */
byte IEN11 :1; /* ATD Digital Input Enable on channel 11 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpIEN_8 :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDDIENHSTR;
#define ATDDIENH _ATDDIEN.Overlap_STR.ATDDIENHSTR.Byte
#define ATDDIENH_IEN8 _ATDDIEN.Overlap_STR.ATDDIENHSTR.Bits.IEN8
#define ATDDIENH_IEN9 _ATDDIEN.Overlap_STR.ATDDIENHSTR.Bits.IEN9
#define ATDDIENH_IEN10 _ATDDIEN.Overlap_STR.ATDDIENHSTR.Bits.IEN10
#define ATDDIENH_IEN11 _ATDDIEN.Overlap_STR.ATDDIENHSTR.Bits.IEN11
#define ATDDIENH_IEN_8 _ATDDIEN.Overlap_STR.ATDDIENHSTR.MergedBits.grpIEN_8
#define ATDDIENH_IEN ATDDIENH_IEN_8
#define ATDDIENH_IEN8_MASK 0x01U
#define ATDDIENH_IEN9_MASK 0x02U
#define ATDDIENH_IEN10_MASK 0x04U
#define ATDDIENH_IEN11_MASK 0x08U
#define ATDDIENH_IEN_8_MASK 0x0FU
#define ATDDIENH_IEN_8_BITNUM 0x00U
/*** ATDDIENL - ATD Input Enable Register Low; 0x0000007D ***/
union {
byte Byte;
struct {
byte IEN0 :1; /* ATD Digital Input Enable on channel 0 */
byte IEN1 :1; /* ATD Digital Input Enable on channel 1 */
byte IEN2 :1; /* ATD Digital Input Enable on channel 2 */
byte IEN3 :1; /* ATD Digital Input Enable on channel 3 */
byte IEN4 :1; /* ATD Digital Input Enable on channel 4 */
byte IEN5 :1; /* ATD Digital Input Enable on channel 5 */
byte IEN6 :1; /* ATD Digital Input Enable on channel 6 */
byte IEN7 :1; /* ATD Digital Input Enable on channel 7 */
} Bits;
} ATDDIENLSTR;
#define ATDDIENL _ATDDIEN.Overlap_STR.ATDDIENLSTR.Byte
#define ATDDIENL_IEN0 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN0
#define ATDDIENL_IEN1 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN1
#define ATDDIENL_IEN2 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN2
#define ATDDIENL_IEN3 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN3
#define ATDDIENL_IEN4 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN4
#define ATDDIENL_IEN5 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN5
#define ATDDIENL_IEN6 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN6
#define ATDDIENL_IEN7 _ATDDIEN.Overlap_STR.ATDDIENLSTR.Bits.IEN7
#define ATDDIENL_IEN0_MASK 0x01U
#define ATDDIENL_IEN1_MASK 0x02U
#define ATDDIENL_IEN2_MASK 0x04U
#define ATDDIENL_IEN3_MASK 0x08U
#define ATDDIENL_IEN4_MASK 0x10U
#define ATDDIENL_IEN5_MASK 0x20U
#define ATDDIENL_IEN6_MASK 0x40U
#define ATDDIENL_IEN7_MASK 0x80U
} Overlap_STR;
struct {
word IEN0 :1; /* ATD Digital Input Enable on channel 0 */
word IEN1 :1; /* ATD Digital Input Enable on channel 1 */
word IEN2 :1; /* ATD Digital Input Enable on channel 2 */
word IEN3 :1; /* ATD Digital Input Enable on channel 3 */
word IEN4 :1; /* ATD Digital Input Enable on channel 4 */
word IEN5 :1; /* ATD Digital Input Enable on channel 5 */
word IEN6 :1; /* ATD Digital Input Enable on channel 6 */
word IEN7 :1; /* ATD Digital Input Enable on channel 7 */
word IEN8 :1; /* ATD Digital Input Enable on channel 8 */
word IEN9 :1; /* ATD Digital Input Enable on channel 9 */
word IEN10 :1; /* ATD Digital Input Enable on channel 10 */
word IEN11 :1; /* ATD Digital Input Enable on channel 11 */
word :1;
word :1;
word :1;
word :1;
} Bits;
struct {
word grpIEN :12;
word :1;
word :1;
word :1;
word :1;
} MergedBits;
} ATDDIENSTR;
extern volatile ATDDIENSTR _ATDDIEN @(REG_BASE + 0x0000007CUL);
#define ATDDIEN _ATDDIEN.Word
#define ATDDIEN_IEN0 _ATDDIEN.Bits.IEN0
#define ATDDIEN_IEN1 _ATDDIEN.Bits.IEN1
#define ATDDIEN_IEN2 _ATDDIEN.Bits.IEN2
#define ATDDIEN_IEN3 _ATDDIEN.Bits.IEN3
#define ATDDIEN_IEN4 _ATDDIEN.Bits.IEN4
#define ATDDIEN_IEN5 _ATDDIEN.Bits.IEN5
#define ATDDIEN_IEN6 _ATDDIEN.Bits.IEN6
#define ATDDIEN_IEN7 _ATDDIEN.Bits.IEN7
#define ATDDIEN_IEN8 _ATDDIEN.Bits.IEN8
#define ATDDIEN_IEN9 _ATDDIEN.Bits.IEN9
#define ATDDIEN_IEN10 _ATDDIEN.Bits.IEN10
#define ATDDIEN_IEN11 _ATDDIEN.Bits.IEN11
#define ATDDIEN_IEN _ATDDIEN.MergedBits.grpIEN
#define ATDDIEN_IEN0_MASK 0x01U
#define ATDDIEN_IEN1_MASK 0x02U
#define ATDDIEN_IEN2_MASK 0x04U
#define ATDDIEN_IEN3_MASK 0x08U
#define ATDDIEN_IEN4_MASK 0x10U
#define ATDDIEN_IEN5_MASK 0x20U
#define ATDDIEN_IEN6_MASK 0x40U
#define ATDDIEN_IEN7_MASK 0x80U
#define ATDDIEN_IEN8_MASK 0x0100U
#define ATDDIEN_IEN9_MASK 0x0200U
#define ATDDIEN_IEN10_MASK 0x0400U
#define ATDDIEN_IEN11_MASK 0x0800U
#define ATDDIEN_IEN_MASK 0x0FFFU
#define ATDDIEN_IEN_BITNUM 0x00U
/*** ATDCMPHT - ATD Compare Higher Than Register; 0x0000007E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCMPHTH - ATD Compare Higher Than Register High; 0x0000007E ***/
union {
byte Byte;
struct {
byte CMPHT8 :1; /* Compare Operation Higher Than Enable for Conversion Number 8 of a Sequence */
byte CMPHT9 :1; /* Compare Operation Higher Than Enable for Conversion Number 9 of a Sequence */
byte CMPHT10 :1; /* Compare Operation Higher Than Enable for Conversion Number 10 of a Sequence */
byte CMPHT11 :1; /* Compare Operation Higher Than Enable for Conversion Number 11 of a Sequence */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpCMPHT_8 :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDCMPHTHSTR;
#define ATDCMPHTH _ATDCMPHT.Overlap_STR.ATDCMPHTHSTR.Byte
#define ATDCMPHTH_CMPHT8 _ATDCMPHT.Overlap_STR.ATDCMPHTHSTR.Bits.CMPHT8
#define ATDCMPHTH_CMPHT9 _ATDCMPHT.Overlap_STR.ATDCMPHTHSTR.Bits.CMPHT9
#define ATDCMPHTH_CMPHT10 _ATDCMPHT.Overlap_STR.ATDCMPHTHSTR.Bits.CMPHT10
#define ATDCMPHTH_CMPHT11 _ATDCMPHT.Overlap_STR.ATDCMPHTHSTR.Bits.CMPHT11
#define ATDCMPHTH_CMPHT_8 _ATDCMPHT.Overlap_STR.ATDCMPHTHSTR.MergedBits.grpCMPHT_8
#define ATDCMPHTH_CMPHT ATDCMPHTH_CMPHT_8
#define ATDCMPHTH_CMPHT8_MASK 0x01U
#define ATDCMPHTH_CMPHT9_MASK 0x02U
#define ATDCMPHTH_CMPHT10_MASK 0x04U
#define ATDCMPHTH_CMPHT11_MASK 0x08U
#define ATDCMPHTH_CMPHT_8_MASK 0x0FU
#define ATDCMPHTH_CMPHT_8_BITNUM 0x00U
/*** ATDCMPHTL - ATD Compare Higher Than Register Low; 0x0000007F ***/
union {
byte Byte;
struct {
byte CMPHT0 :1; /* Compare Operation Higher Than Enable for Conversion Number 0 of a Sequence */
byte CMPHT1 :1; /* Compare Operation Higher Than Enable for Conversion Number 1 of a Sequence */
byte CMPHT2 :1; /* Compare Operation Higher Than Enable for Conversion Number 2 of a Sequence */
byte CMPHT3 :1; /* Compare Operation Higher Than Enable for Conversion Number 3 of a Sequence */
byte CMPHT4 :1; /* Compare Operation Higher Than Enable for Conversion Number 4 of a Sequence */
byte CMPHT5 :1; /* Compare Operation Higher Than Enable for Conversion Number 5 of a Sequence */
byte CMPHT6 :1; /* Compare Operation Higher Than Enable for Conversion Number 6 of a Sequence */
byte CMPHT7 :1; /* Compare Operation Higher Than Enable for Conversion Number 7 of a Sequence */
} Bits;
} ATDCMPHTLSTR;
#define ATDCMPHTL _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Byte
#define ATDCMPHTL_CMPHT0 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT0
#define ATDCMPHTL_CMPHT1 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT1
#define ATDCMPHTL_CMPHT2 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT2
#define ATDCMPHTL_CMPHT3 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT3
#define ATDCMPHTL_CMPHT4 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT4
#define ATDCMPHTL_CMPHT5 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT5
#define ATDCMPHTL_CMPHT6 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT6
#define ATDCMPHTL_CMPHT7 _ATDCMPHT.Overlap_STR.ATDCMPHTLSTR.Bits.CMPHT7
#define ATDCMPHTL_CMPHT0_MASK 0x01U
#define ATDCMPHTL_CMPHT1_MASK 0x02U
#define ATDCMPHTL_CMPHT2_MASK 0x04U
#define ATDCMPHTL_CMPHT3_MASK 0x08U
#define ATDCMPHTL_CMPHT4_MASK 0x10U
#define ATDCMPHTL_CMPHT5_MASK 0x20U
#define ATDCMPHTL_CMPHT6_MASK 0x40U
#define ATDCMPHTL_CMPHT7_MASK 0x80U
} Overlap_STR;
struct {
word CMPHT0 :1; /* Compare Operation Higher Than Enable for Conversion Number 0 of a Sequence */
word CMPHT1 :1; /* Compare Operation Higher Than Enable for Conversion Number 1 of a Sequence */
word CMPHT2 :1; /* Compare Operation Higher Than Enable for Conversion Number 2 of a Sequence */
word CMPHT3 :1; /* Compare Operation Higher Than Enable for Conversion Number 3 of a Sequence */
word CMPHT4 :1; /* Compare Operation Higher Than Enable for Conversion Number 4 of a Sequence */
word CMPHT5 :1; /* Compare Operation Higher Than Enable for Conversion Number 5 of a Sequence */
word CMPHT6 :1; /* Compare Operation Higher Than Enable for Conversion Number 6 of a Sequence */
word CMPHT7 :1; /* Compare Operation Higher Than Enable for Conversion Number 7 of a Sequence */
word CMPHT8 :1; /* Compare Operation Higher Than Enable for Conversion Number 8 of a Sequence */
word CMPHT9 :1; /* Compare Operation Higher Than Enable for Conversion Number 9 of a Sequence */
word CMPHT10 :1; /* Compare Operation Higher Than Enable for Conversion Number 10 of a Sequence */
word CMPHT11 :1; /* Compare Operation Higher Than Enable for Conversion Number 11 of a Sequence */
word :1;
word :1;
word :1;
word :1;
} Bits;
struct {
word grpCMPHT :12;
word :1;
word :1;
word :1;
word :1;
} MergedBits;
} ATDCMPHTSTR;
extern volatile ATDCMPHTSTR _ATDCMPHT @(REG_BASE + 0x0000007EUL);
#define ATDCMPHT _ATDCMPHT.Word
#define ATDCMPHT_CMPHT0 _ATDCMPHT.Bits.CMPHT0
#define ATDCMPHT_CMPHT1 _ATDCMPHT.Bits.CMPHT1
#define ATDCMPHT_CMPHT2 _ATDCMPHT.Bits.CMPHT2
#define ATDCMPHT_CMPHT3 _ATDCMPHT.Bits.CMPHT3
#define ATDCMPHT_CMPHT4 _ATDCMPHT.Bits.CMPHT4
#define ATDCMPHT_CMPHT5 _ATDCMPHT.Bits.CMPHT5
#define ATDCMPHT_CMPHT6 _ATDCMPHT.Bits.CMPHT6
#define ATDCMPHT_CMPHT7 _ATDCMPHT.Bits.CMPHT7
#define ATDCMPHT_CMPHT8 _ATDCMPHT.Bits.CMPHT8
#define ATDCMPHT_CMPHT9 _ATDCMPHT.Bits.CMPHT9
#define ATDCMPHT_CMPHT10 _ATDCMPHT.Bits.CMPHT10
#define ATDCMPHT_CMPHT11 _ATDCMPHT.Bits.CMPHT11
#define ATDCMPHT_CMPHT _ATDCMPHT.MergedBits.grpCMPHT
#define ATDCMPHT_CMPHT0_MASK 0x01U
#define ATDCMPHT_CMPHT1_MASK 0x02U
#define ATDCMPHT_CMPHT2_MASK 0x04U
#define ATDCMPHT_CMPHT3_MASK 0x08U
#define ATDCMPHT_CMPHT4_MASK 0x10U
#define ATDCMPHT_CMPHT5_MASK 0x20U
#define ATDCMPHT_CMPHT6_MASK 0x40U
#define ATDCMPHT_CMPHT7_MASK 0x80U
#define ATDCMPHT_CMPHT8_MASK 0x0100U
#define ATDCMPHT_CMPHT9_MASK 0x0200U
#define ATDCMPHT_CMPHT10_MASK 0x0400U
#define ATDCMPHT_CMPHT11_MASK 0x0800U
#define ATDCMPHT_CMPHT_MASK 0x0FFFU
#define ATDCMPHT_CMPHT_BITNUM 0x00U
/*** ATDDR0 - ATD Conversion Result Register 0; 0x00000080 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR0H - ATD Conversion Result Register 0 High; 0x00000080 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR0HSTR;
#define ATDDR0H _ATDDR0.Overlap_STR.ATDDR0HSTR.Byte
#define ATDDR0H_BIT8 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT8
#define ATDDR0H_BIT9 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT9
#define ATDDR0H_BIT10 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT10
#define ATDDR0H_BIT11 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT11
#define ATDDR0H_BIT12 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT12
#define ATDDR0H_BIT13 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT13
#define ATDDR0H_BIT14 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT14
#define ATDDR0H_BIT15 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT15
#define ATDDR0H_BIT8_MASK 0x01U
#define ATDDR0H_BIT9_MASK 0x02U
#define ATDDR0H_BIT10_MASK 0x04U
#define ATDDR0H_BIT11_MASK 0x08U
#define ATDDR0H_BIT12_MASK 0x10U
#define ATDDR0H_BIT13_MASK 0x20U
#define ATDDR0H_BIT14_MASK 0x40U
#define ATDDR0H_BIT15_MASK 0x80U
/*** ATDDR0L - ATD Conversion Result Register 0 Low; 0x00000081 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR0LSTR;
#define ATDDR0L _ATDDR0.Overlap_STR.ATDDR0LSTR.Byte
#define ATDDR0L_BIT0 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT0
#define ATDDR0L_BIT1 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT1
#define ATDDR0L_BIT2 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT2
#define ATDDR0L_BIT3 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT3
#define ATDDR0L_BIT4 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT4
#define ATDDR0L_BIT5 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT5
#define ATDDR0L_BIT6 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT6
#define ATDDR0L_BIT7 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT7
#define ATDDR0L_BIT0_MASK 0x01U
#define ATDDR0L_BIT1_MASK 0x02U
#define ATDDR0L_BIT2_MASK 0x04U
#define ATDDR0L_BIT3_MASK 0x08U
#define ATDDR0L_BIT4_MASK 0x10U
#define ATDDR0L_BIT5_MASK 0x20U
#define ATDDR0L_BIT6_MASK 0x40U
#define ATDDR0L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR0STR;
extern volatile ATDDR0STR _ATDDR0 @(REG_BASE + 0x00000080UL);
#define ATDDR0 _ATDDR0.Word
#define ATDDR0_BIT0 _ATDDR0.Bits.BIT0
#define ATDDR0_BIT1 _ATDDR0.Bits.BIT1
#define ATDDR0_BIT2 _ATDDR0.Bits.BIT2
#define ATDDR0_BIT3 _ATDDR0.Bits.BIT3
#define ATDDR0_BIT4 _ATDDR0.Bits.BIT4
#define ATDDR0_BIT5 _ATDDR0.Bits.BIT5
#define ATDDR0_BIT6 _ATDDR0.Bits.BIT6
#define ATDDR0_BIT7 _ATDDR0.Bits.BIT7
#define ATDDR0_BIT8 _ATDDR0.Bits.BIT8
#define ATDDR0_BIT9 _ATDDR0.Bits.BIT9
#define ATDDR0_BIT10 _ATDDR0.Bits.BIT10
#define ATDDR0_BIT11 _ATDDR0.Bits.BIT11
#define ATDDR0_BIT12 _ATDDR0.Bits.BIT12
#define ATDDR0_BIT13 _ATDDR0.Bits.BIT13
#define ATDDR0_BIT14 _ATDDR0.Bits.BIT14
#define ATDDR0_BIT15 _ATDDR0.Bits.BIT15
/* ATDDR_ARR: Access 12 ATDDRx registers in an array */
#define ATDDR_ARR ((volatile word *) &ATDDR0)
#define ATDDR0_BIT0_MASK 0x01U
#define ATDDR0_BIT1_MASK 0x02U
#define ATDDR0_BIT2_MASK 0x04U
#define ATDDR0_BIT3_MASK 0x08U
#define ATDDR0_BIT4_MASK 0x10U
#define ATDDR0_BIT5_MASK 0x20U
#define ATDDR0_BIT6_MASK 0x40U
#define ATDDR0_BIT7_MASK 0x80U
#define ATDDR0_BIT8_MASK 0x0100U
#define ATDDR0_BIT9_MASK 0x0200U
#define ATDDR0_BIT10_MASK 0x0400U
#define ATDDR0_BIT11_MASK 0x0800U
#define ATDDR0_BIT12_MASK 0x1000U
#define ATDDR0_BIT13_MASK 0x2000U
#define ATDDR0_BIT14_MASK 0x4000U
#define ATDDR0_BIT15_MASK 0x8000U
/*** ATDDR1 - ATD Conversion Result Register 1; 0x00000082 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR1H - ATD Conversion Result Register 1 High; 0x00000082 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR1HSTR;
#define ATDDR1H _ATDDR1.Overlap_STR.ATDDR1HSTR.Byte
#define ATDDR1H_BIT8 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT8
#define ATDDR1H_BIT9 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT9
#define ATDDR1H_BIT10 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT10
#define ATDDR1H_BIT11 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT11
#define ATDDR1H_BIT12 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT12
#define ATDDR1H_BIT13 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT13
#define ATDDR1H_BIT14 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT14
#define ATDDR1H_BIT15 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT15
#define ATDDR1H_BIT8_MASK 0x01U
#define ATDDR1H_BIT9_MASK 0x02U
#define ATDDR1H_BIT10_MASK 0x04U
#define ATDDR1H_BIT11_MASK 0x08U
#define ATDDR1H_BIT12_MASK 0x10U
#define ATDDR1H_BIT13_MASK 0x20U
#define ATDDR1H_BIT14_MASK 0x40U
#define ATDDR1H_BIT15_MASK 0x80U
/*** ATDDR1L - ATD Conversion Result Register 1 Low; 0x00000083 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR1LSTR;
#define ATDDR1L _ATDDR1.Overlap_STR.ATDDR1LSTR.Byte
#define ATDDR1L_BIT0 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT0
#define ATDDR1L_BIT1 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT1
#define ATDDR1L_BIT2 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT2
#define ATDDR1L_BIT3 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT3
#define ATDDR1L_BIT4 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT4
#define ATDDR1L_BIT5 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT5
#define ATDDR1L_BIT6 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT6
#define ATDDR1L_BIT7 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT7
#define ATDDR1L_BIT0_MASK 0x01U
#define ATDDR1L_BIT1_MASK 0x02U
#define ATDDR1L_BIT2_MASK 0x04U
#define ATDDR1L_BIT3_MASK 0x08U
#define ATDDR1L_BIT4_MASK 0x10U
#define ATDDR1L_BIT5_MASK 0x20U
#define ATDDR1L_BIT6_MASK 0x40U
#define ATDDR1L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR1STR;
extern volatile ATDDR1STR _ATDDR1 @(REG_BASE + 0x00000082UL);
#define ATDDR1 _ATDDR1.Word
#define ATDDR1_BIT0 _ATDDR1.Bits.BIT0
#define ATDDR1_BIT1 _ATDDR1.Bits.BIT1
#define ATDDR1_BIT2 _ATDDR1.Bits.BIT2
#define ATDDR1_BIT3 _ATDDR1.Bits.BIT3
#define ATDDR1_BIT4 _ATDDR1.Bits.BIT4
#define ATDDR1_BIT5 _ATDDR1.Bits.BIT5
#define ATDDR1_BIT6 _ATDDR1.Bits.BIT6
#define ATDDR1_BIT7 _ATDDR1.Bits.BIT7
#define ATDDR1_BIT8 _ATDDR1.Bits.BIT8
#define ATDDR1_BIT9 _ATDDR1.Bits.BIT9
#define ATDDR1_BIT10 _ATDDR1.Bits.BIT10
#define ATDDR1_BIT11 _ATDDR1.Bits.BIT11
#define ATDDR1_BIT12 _ATDDR1.Bits.BIT12
#define ATDDR1_BIT13 _ATDDR1.Bits.BIT13
#define ATDDR1_BIT14 _ATDDR1.Bits.BIT14
#define ATDDR1_BIT15 _ATDDR1.Bits.BIT15
#define ATDDR1_BIT0_MASK 0x01U
#define ATDDR1_BIT1_MASK 0x02U
#define ATDDR1_BIT2_MASK 0x04U
#define ATDDR1_BIT3_MASK 0x08U
#define ATDDR1_BIT4_MASK 0x10U
#define ATDDR1_BIT5_MASK 0x20U
#define ATDDR1_BIT6_MASK 0x40U
#define ATDDR1_BIT7_MASK 0x80U
#define ATDDR1_BIT8_MASK 0x0100U
#define ATDDR1_BIT9_MASK 0x0200U
#define ATDDR1_BIT10_MASK 0x0400U
#define ATDDR1_BIT11_MASK 0x0800U
#define ATDDR1_BIT12_MASK 0x1000U
#define ATDDR1_BIT13_MASK 0x2000U
#define ATDDR1_BIT14_MASK 0x4000U
#define ATDDR1_BIT15_MASK 0x8000U
/*** ATDDR2 - ATD Conversion Result Register 2; 0x00000084 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR2H - ATD Conversion Result Register 2 High; 0x00000084 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR2HSTR;
#define ATDDR2H _ATDDR2.Overlap_STR.ATDDR2HSTR.Byte
#define ATDDR2H_BIT8 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT8
#define ATDDR2H_BIT9 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT9
#define ATDDR2H_BIT10 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT10
#define ATDDR2H_BIT11 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT11
#define ATDDR2H_BIT12 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT12
#define ATDDR2H_BIT13 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT13
#define ATDDR2H_BIT14 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT14
#define ATDDR2H_BIT15 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT15
#define ATDDR2H_BIT8_MASK 0x01U
#define ATDDR2H_BIT9_MASK 0x02U
#define ATDDR2H_BIT10_MASK 0x04U
#define ATDDR2H_BIT11_MASK 0x08U
#define ATDDR2H_BIT12_MASK 0x10U
#define ATDDR2H_BIT13_MASK 0x20U
#define ATDDR2H_BIT14_MASK 0x40U
#define ATDDR2H_BIT15_MASK 0x80U
/*** ATDDR2L - ATD Conversion Result Register 2 Low; 0x00000085 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR2LSTR;
#define ATDDR2L _ATDDR2.Overlap_STR.ATDDR2LSTR.Byte
#define ATDDR2L_BIT0 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT0
#define ATDDR2L_BIT1 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT1
#define ATDDR2L_BIT2 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT2
#define ATDDR2L_BIT3 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT3
#define ATDDR2L_BIT4 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT4
#define ATDDR2L_BIT5 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT5
#define ATDDR2L_BIT6 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT6
#define ATDDR2L_BIT7 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT7
#define ATDDR2L_BIT0_MASK 0x01U
#define ATDDR2L_BIT1_MASK 0x02U
#define ATDDR2L_BIT2_MASK 0x04U
#define ATDDR2L_BIT3_MASK 0x08U
#define ATDDR2L_BIT4_MASK 0x10U
#define ATDDR2L_BIT5_MASK 0x20U
#define ATDDR2L_BIT6_MASK 0x40U
#define ATDDR2L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR2STR;
extern volatile ATDDR2STR _ATDDR2 @(REG_BASE + 0x00000084UL);
#define ATDDR2 _ATDDR2.Word
#define ATDDR2_BIT0 _ATDDR2.Bits.BIT0
#define ATDDR2_BIT1 _ATDDR2.Bits.BIT1
#define ATDDR2_BIT2 _ATDDR2.Bits.BIT2
#define ATDDR2_BIT3 _ATDDR2.Bits.BIT3
#define ATDDR2_BIT4 _ATDDR2.Bits.BIT4
#define ATDDR2_BIT5 _ATDDR2.Bits.BIT5
#define ATDDR2_BIT6 _ATDDR2.Bits.BIT6
#define ATDDR2_BIT7 _ATDDR2.Bits.BIT7
#define ATDDR2_BIT8 _ATDDR2.Bits.BIT8
#define ATDDR2_BIT9 _ATDDR2.Bits.BIT9
#define ATDDR2_BIT10 _ATDDR2.Bits.BIT10
#define ATDDR2_BIT11 _ATDDR2.Bits.BIT11
#define ATDDR2_BIT12 _ATDDR2.Bits.BIT12
#define ATDDR2_BIT13 _ATDDR2.Bits.BIT13
#define ATDDR2_BIT14 _ATDDR2.Bits.BIT14
#define ATDDR2_BIT15 _ATDDR2.Bits.BIT15
#define ATDDR2_BIT0_MASK 0x01U
#define ATDDR2_BIT1_MASK 0x02U
#define ATDDR2_BIT2_MASK 0x04U
#define ATDDR2_BIT3_MASK 0x08U
#define ATDDR2_BIT4_MASK 0x10U
#define ATDDR2_BIT5_MASK 0x20U
#define ATDDR2_BIT6_MASK 0x40U
#define ATDDR2_BIT7_MASK 0x80U
#define ATDDR2_BIT8_MASK 0x0100U
#define ATDDR2_BIT9_MASK 0x0200U
#define ATDDR2_BIT10_MASK 0x0400U
#define ATDDR2_BIT11_MASK 0x0800U
#define ATDDR2_BIT12_MASK 0x1000U
#define ATDDR2_BIT13_MASK 0x2000U
#define ATDDR2_BIT14_MASK 0x4000U
#define ATDDR2_BIT15_MASK 0x8000U
/*** ATDDR3 - ATD Conversion Result Register 3; 0x00000086 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR3H - ATD Conversion Result Register 3 High; 0x00000086 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR3HSTR;
#define ATDDR3H _ATDDR3.Overlap_STR.ATDDR3HSTR.Byte
#define ATDDR3H_BIT8 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT8
#define ATDDR3H_BIT9 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT9
#define ATDDR3H_BIT10 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT10
#define ATDDR3H_BIT11 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT11
#define ATDDR3H_BIT12 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT12
#define ATDDR3H_BIT13 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT13
#define ATDDR3H_BIT14 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT14
#define ATDDR3H_BIT15 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT15
#define ATDDR3H_BIT8_MASK 0x01U
#define ATDDR3H_BIT9_MASK 0x02U
#define ATDDR3H_BIT10_MASK 0x04U
#define ATDDR3H_BIT11_MASK 0x08U
#define ATDDR3H_BIT12_MASK 0x10U
#define ATDDR3H_BIT13_MASK 0x20U
#define ATDDR3H_BIT14_MASK 0x40U
#define ATDDR3H_BIT15_MASK 0x80U
/*** ATDDR3L - ATD Conversion Result Register 3 Low; 0x00000087 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR3LSTR;
#define ATDDR3L _ATDDR3.Overlap_STR.ATDDR3LSTR.Byte
#define ATDDR3L_BIT0 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT0
#define ATDDR3L_BIT1 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT1
#define ATDDR3L_BIT2 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT2
#define ATDDR3L_BIT3 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT3
#define ATDDR3L_BIT4 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT4
#define ATDDR3L_BIT5 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT5
#define ATDDR3L_BIT6 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT6
#define ATDDR3L_BIT7 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT7
#define ATDDR3L_BIT0_MASK 0x01U
#define ATDDR3L_BIT1_MASK 0x02U
#define ATDDR3L_BIT2_MASK 0x04U
#define ATDDR3L_BIT3_MASK 0x08U
#define ATDDR3L_BIT4_MASK 0x10U
#define ATDDR3L_BIT5_MASK 0x20U
#define ATDDR3L_BIT6_MASK 0x40U
#define ATDDR3L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR3STR;
extern volatile ATDDR3STR _ATDDR3 @(REG_BASE + 0x00000086UL);
#define ATDDR3 _ATDDR3.Word
#define ATDDR3_BIT0 _ATDDR3.Bits.BIT0
#define ATDDR3_BIT1 _ATDDR3.Bits.BIT1
#define ATDDR3_BIT2 _ATDDR3.Bits.BIT2
#define ATDDR3_BIT3 _ATDDR3.Bits.BIT3
#define ATDDR3_BIT4 _ATDDR3.Bits.BIT4
#define ATDDR3_BIT5 _ATDDR3.Bits.BIT5
#define ATDDR3_BIT6 _ATDDR3.Bits.BIT6
#define ATDDR3_BIT7 _ATDDR3.Bits.BIT7
#define ATDDR3_BIT8 _ATDDR3.Bits.BIT8
#define ATDDR3_BIT9 _ATDDR3.Bits.BIT9
#define ATDDR3_BIT10 _ATDDR3.Bits.BIT10
#define ATDDR3_BIT11 _ATDDR3.Bits.BIT11
#define ATDDR3_BIT12 _ATDDR3.Bits.BIT12
#define ATDDR3_BIT13 _ATDDR3.Bits.BIT13
#define ATDDR3_BIT14 _ATDDR3.Bits.BIT14
#define ATDDR3_BIT15 _ATDDR3.Bits.BIT15
#define ATDDR3_BIT0_MASK 0x01U
#define ATDDR3_BIT1_MASK 0x02U
#define ATDDR3_BIT2_MASK 0x04U
#define ATDDR3_BIT3_MASK 0x08U
#define ATDDR3_BIT4_MASK 0x10U
#define ATDDR3_BIT5_MASK 0x20U
#define ATDDR3_BIT6_MASK 0x40U
#define ATDDR3_BIT7_MASK 0x80U
#define ATDDR3_BIT8_MASK 0x0100U
#define ATDDR3_BIT9_MASK 0x0200U
#define ATDDR3_BIT10_MASK 0x0400U
#define ATDDR3_BIT11_MASK 0x0800U
#define ATDDR3_BIT12_MASK 0x1000U
#define ATDDR3_BIT13_MASK 0x2000U
#define ATDDR3_BIT14_MASK 0x4000U
#define ATDDR3_BIT15_MASK 0x8000U
/*** ATDDR4 - ATD Conversion Result Register 4; 0x00000088 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR4H - ATD Conversion Result Register 4 High; 0x00000088 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR4HSTR;
#define ATDDR4H _ATDDR4.Overlap_STR.ATDDR4HSTR.Byte
#define ATDDR4H_BIT8 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT8
#define ATDDR4H_BIT9 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT9
#define ATDDR4H_BIT10 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT10
#define ATDDR4H_BIT11 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT11
#define ATDDR4H_BIT12 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT12
#define ATDDR4H_BIT13 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT13
#define ATDDR4H_BIT14 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT14
#define ATDDR4H_BIT15 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT15
#define ATDDR4H_BIT8_MASK 0x01U
#define ATDDR4H_BIT9_MASK 0x02U
#define ATDDR4H_BIT10_MASK 0x04U
#define ATDDR4H_BIT11_MASK 0x08U
#define ATDDR4H_BIT12_MASK 0x10U
#define ATDDR4H_BIT13_MASK 0x20U
#define ATDDR4H_BIT14_MASK 0x40U
#define ATDDR4H_BIT15_MASK 0x80U
/*** ATDDR4L - ATD Conversion Result Register 4 Low; 0x00000089 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR4LSTR;
#define ATDDR4L _ATDDR4.Overlap_STR.ATDDR4LSTR.Byte
#define ATDDR4L_BIT0 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT0
#define ATDDR4L_BIT1 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT1
#define ATDDR4L_BIT2 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT2
#define ATDDR4L_BIT3 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT3
#define ATDDR4L_BIT4 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT4
#define ATDDR4L_BIT5 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT5
#define ATDDR4L_BIT6 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT6
#define ATDDR4L_BIT7 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT7
#define ATDDR4L_BIT0_MASK 0x01U
#define ATDDR4L_BIT1_MASK 0x02U
#define ATDDR4L_BIT2_MASK 0x04U
#define ATDDR4L_BIT3_MASK 0x08U
#define ATDDR4L_BIT4_MASK 0x10U
#define ATDDR4L_BIT5_MASK 0x20U
#define ATDDR4L_BIT6_MASK 0x40U
#define ATDDR4L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR4STR;
extern volatile ATDDR4STR _ATDDR4 @(REG_BASE + 0x00000088UL);
#define ATDDR4 _ATDDR4.Word
#define ATDDR4_BIT0 _ATDDR4.Bits.BIT0
#define ATDDR4_BIT1 _ATDDR4.Bits.BIT1
#define ATDDR4_BIT2 _ATDDR4.Bits.BIT2
#define ATDDR4_BIT3 _ATDDR4.Bits.BIT3
#define ATDDR4_BIT4 _ATDDR4.Bits.BIT4
#define ATDDR4_BIT5 _ATDDR4.Bits.BIT5
#define ATDDR4_BIT6 _ATDDR4.Bits.BIT6
#define ATDDR4_BIT7 _ATDDR4.Bits.BIT7
#define ATDDR4_BIT8 _ATDDR4.Bits.BIT8
#define ATDDR4_BIT9 _ATDDR4.Bits.BIT9
#define ATDDR4_BIT10 _ATDDR4.Bits.BIT10
#define ATDDR4_BIT11 _ATDDR4.Bits.BIT11
#define ATDDR4_BIT12 _ATDDR4.Bits.BIT12
#define ATDDR4_BIT13 _ATDDR4.Bits.BIT13
#define ATDDR4_BIT14 _ATDDR4.Bits.BIT14
#define ATDDR4_BIT15 _ATDDR4.Bits.BIT15
#define ATDDR4_BIT0_MASK 0x01U
#define ATDDR4_BIT1_MASK 0x02U
#define ATDDR4_BIT2_MASK 0x04U
#define ATDDR4_BIT3_MASK 0x08U
#define ATDDR4_BIT4_MASK 0x10U
#define ATDDR4_BIT5_MASK 0x20U
#define ATDDR4_BIT6_MASK 0x40U
#define ATDDR4_BIT7_MASK 0x80U
#define ATDDR4_BIT8_MASK 0x0100U
#define ATDDR4_BIT9_MASK 0x0200U
#define ATDDR4_BIT10_MASK 0x0400U
#define ATDDR4_BIT11_MASK 0x0800U
#define ATDDR4_BIT12_MASK 0x1000U
#define ATDDR4_BIT13_MASK 0x2000U
#define ATDDR4_BIT14_MASK 0x4000U
#define ATDDR4_BIT15_MASK 0x8000U
/*** ATDDR5 - ATD Conversion Result Register 5; 0x0000008A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR5H - ATD Conversion Result Register 5 High; 0x0000008A ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR5HSTR;
#define ATDDR5H _ATDDR5.Overlap_STR.ATDDR5HSTR.Byte
#define ATDDR5H_BIT8 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT8
#define ATDDR5H_BIT9 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT9
#define ATDDR5H_BIT10 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT10
#define ATDDR5H_BIT11 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT11
#define ATDDR5H_BIT12 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT12
#define ATDDR5H_BIT13 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT13
#define ATDDR5H_BIT14 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT14
#define ATDDR5H_BIT15 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT15
#define ATDDR5H_BIT8_MASK 0x01U
#define ATDDR5H_BIT9_MASK 0x02U
#define ATDDR5H_BIT10_MASK 0x04U
#define ATDDR5H_BIT11_MASK 0x08U
#define ATDDR5H_BIT12_MASK 0x10U
#define ATDDR5H_BIT13_MASK 0x20U
#define ATDDR5H_BIT14_MASK 0x40U
#define ATDDR5H_BIT15_MASK 0x80U
/*** ATDDR5L - ATD Conversion Result Register 5 Low; 0x0000008B ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR5LSTR;
#define ATDDR5L _ATDDR5.Overlap_STR.ATDDR5LSTR.Byte
#define ATDDR5L_BIT0 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT0
#define ATDDR5L_BIT1 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT1
#define ATDDR5L_BIT2 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT2
#define ATDDR5L_BIT3 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT3
#define ATDDR5L_BIT4 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT4
#define ATDDR5L_BIT5 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT5
#define ATDDR5L_BIT6 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT6
#define ATDDR5L_BIT7 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT7
#define ATDDR5L_BIT0_MASK 0x01U
#define ATDDR5L_BIT1_MASK 0x02U
#define ATDDR5L_BIT2_MASK 0x04U
#define ATDDR5L_BIT3_MASK 0x08U
#define ATDDR5L_BIT4_MASK 0x10U
#define ATDDR5L_BIT5_MASK 0x20U
#define ATDDR5L_BIT6_MASK 0x40U
#define ATDDR5L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR5STR;
extern volatile ATDDR5STR _ATDDR5 @(REG_BASE + 0x0000008AUL);
#define ATDDR5 _ATDDR5.Word
#define ATDDR5_BIT0 _ATDDR5.Bits.BIT0
#define ATDDR5_BIT1 _ATDDR5.Bits.BIT1
#define ATDDR5_BIT2 _ATDDR5.Bits.BIT2
#define ATDDR5_BIT3 _ATDDR5.Bits.BIT3
#define ATDDR5_BIT4 _ATDDR5.Bits.BIT4
#define ATDDR5_BIT5 _ATDDR5.Bits.BIT5
#define ATDDR5_BIT6 _ATDDR5.Bits.BIT6
#define ATDDR5_BIT7 _ATDDR5.Bits.BIT7
#define ATDDR5_BIT8 _ATDDR5.Bits.BIT8
#define ATDDR5_BIT9 _ATDDR5.Bits.BIT9
#define ATDDR5_BIT10 _ATDDR5.Bits.BIT10
#define ATDDR5_BIT11 _ATDDR5.Bits.BIT11
#define ATDDR5_BIT12 _ATDDR5.Bits.BIT12
#define ATDDR5_BIT13 _ATDDR5.Bits.BIT13
#define ATDDR5_BIT14 _ATDDR5.Bits.BIT14
#define ATDDR5_BIT15 _ATDDR5.Bits.BIT15
#define ATDDR5_BIT0_MASK 0x01U
#define ATDDR5_BIT1_MASK 0x02U
#define ATDDR5_BIT2_MASK 0x04U
#define ATDDR5_BIT3_MASK 0x08U
#define ATDDR5_BIT4_MASK 0x10U
#define ATDDR5_BIT5_MASK 0x20U
#define ATDDR5_BIT6_MASK 0x40U
#define ATDDR5_BIT7_MASK 0x80U
#define ATDDR5_BIT8_MASK 0x0100U
#define ATDDR5_BIT9_MASK 0x0200U
#define ATDDR5_BIT10_MASK 0x0400U
#define ATDDR5_BIT11_MASK 0x0800U
#define ATDDR5_BIT12_MASK 0x1000U
#define ATDDR5_BIT13_MASK 0x2000U
#define ATDDR5_BIT14_MASK 0x4000U
#define ATDDR5_BIT15_MASK 0x8000U
/*** ATDDR6 - ATD Conversion Result Register 6; 0x0000008C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR6H - ATD Conversion Result Register 6 High; 0x0000008C ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR6HSTR;
#define ATDDR6H _ATDDR6.Overlap_STR.ATDDR6HSTR.Byte
#define ATDDR6H_BIT8 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT8
#define ATDDR6H_BIT9 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT9
#define ATDDR6H_BIT10 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT10
#define ATDDR6H_BIT11 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT11
#define ATDDR6H_BIT12 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT12
#define ATDDR6H_BIT13 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT13
#define ATDDR6H_BIT14 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT14
#define ATDDR6H_BIT15 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT15
#define ATDDR6H_BIT8_MASK 0x01U
#define ATDDR6H_BIT9_MASK 0x02U
#define ATDDR6H_BIT10_MASK 0x04U
#define ATDDR6H_BIT11_MASK 0x08U
#define ATDDR6H_BIT12_MASK 0x10U
#define ATDDR6H_BIT13_MASK 0x20U
#define ATDDR6H_BIT14_MASK 0x40U
#define ATDDR6H_BIT15_MASK 0x80U
/*** ATDDR6L - ATD Conversion Result Register 6 Low; 0x0000008D ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR6LSTR;
#define ATDDR6L _ATDDR6.Overlap_STR.ATDDR6LSTR.Byte
#define ATDDR6L_BIT0 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT0
#define ATDDR6L_BIT1 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT1
#define ATDDR6L_BIT2 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT2
#define ATDDR6L_BIT3 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT3
#define ATDDR6L_BIT4 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT4
#define ATDDR6L_BIT5 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT5
#define ATDDR6L_BIT6 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT6
#define ATDDR6L_BIT7 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT7
#define ATDDR6L_BIT0_MASK 0x01U
#define ATDDR6L_BIT1_MASK 0x02U
#define ATDDR6L_BIT2_MASK 0x04U
#define ATDDR6L_BIT3_MASK 0x08U
#define ATDDR6L_BIT4_MASK 0x10U
#define ATDDR6L_BIT5_MASK 0x20U
#define ATDDR6L_BIT6_MASK 0x40U
#define ATDDR6L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR6STR;
extern volatile ATDDR6STR _ATDDR6 @(REG_BASE + 0x0000008CUL);
#define ATDDR6 _ATDDR6.Word
#define ATDDR6_BIT0 _ATDDR6.Bits.BIT0
#define ATDDR6_BIT1 _ATDDR6.Bits.BIT1
#define ATDDR6_BIT2 _ATDDR6.Bits.BIT2
#define ATDDR6_BIT3 _ATDDR6.Bits.BIT3
#define ATDDR6_BIT4 _ATDDR6.Bits.BIT4
#define ATDDR6_BIT5 _ATDDR6.Bits.BIT5
#define ATDDR6_BIT6 _ATDDR6.Bits.BIT6
#define ATDDR6_BIT7 _ATDDR6.Bits.BIT7
#define ATDDR6_BIT8 _ATDDR6.Bits.BIT8
#define ATDDR6_BIT9 _ATDDR6.Bits.BIT9
#define ATDDR6_BIT10 _ATDDR6.Bits.BIT10
#define ATDDR6_BIT11 _ATDDR6.Bits.BIT11
#define ATDDR6_BIT12 _ATDDR6.Bits.BIT12
#define ATDDR6_BIT13 _ATDDR6.Bits.BIT13
#define ATDDR6_BIT14 _ATDDR6.Bits.BIT14
#define ATDDR6_BIT15 _ATDDR6.Bits.BIT15
#define ATDDR6_BIT0_MASK 0x01U
#define ATDDR6_BIT1_MASK 0x02U
#define ATDDR6_BIT2_MASK 0x04U
#define ATDDR6_BIT3_MASK 0x08U
#define ATDDR6_BIT4_MASK 0x10U
#define ATDDR6_BIT5_MASK 0x20U
#define ATDDR6_BIT6_MASK 0x40U
#define ATDDR6_BIT7_MASK 0x80U
#define ATDDR6_BIT8_MASK 0x0100U
#define ATDDR6_BIT9_MASK 0x0200U
#define ATDDR6_BIT10_MASK 0x0400U
#define ATDDR6_BIT11_MASK 0x0800U
#define ATDDR6_BIT12_MASK 0x1000U
#define ATDDR6_BIT13_MASK 0x2000U
#define ATDDR6_BIT14_MASK 0x4000U
#define ATDDR6_BIT15_MASK 0x8000U
/*** ATDDR7 - ATD Conversion Result Register 7; 0x0000008E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR7H - ATD Conversion Result Register 7 High; 0x0000008E ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR7HSTR;
#define ATDDR7H _ATDDR7.Overlap_STR.ATDDR7HSTR.Byte
#define ATDDR7H_BIT8 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT8
#define ATDDR7H_BIT9 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT9
#define ATDDR7H_BIT10 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT10
#define ATDDR7H_BIT11 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT11
#define ATDDR7H_BIT12 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT12
#define ATDDR7H_BIT13 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT13
#define ATDDR7H_BIT14 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT14
#define ATDDR7H_BIT15 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT15
#define ATDDR7H_BIT8_MASK 0x01U
#define ATDDR7H_BIT9_MASK 0x02U
#define ATDDR7H_BIT10_MASK 0x04U
#define ATDDR7H_BIT11_MASK 0x08U
#define ATDDR7H_BIT12_MASK 0x10U
#define ATDDR7H_BIT13_MASK 0x20U
#define ATDDR7H_BIT14_MASK 0x40U
#define ATDDR7H_BIT15_MASK 0x80U
/*** ATDDR7L - ATD Conversion Result Register 7 Low; 0x0000008F ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR7LSTR;
#define ATDDR7L _ATDDR7.Overlap_STR.ATDDR7LSTR.Byte
#define ATDDR7L_BIT0 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT0
#define ATDDR7L_BIT1 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT1
#define ATDDR7L_BIT2 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT2
#define ATDDR7L_BIT3 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT3
#define ATDDR7L_BIT4 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT4
#define ATDDR7L_BIT5 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT5
#define ATDDR7L_BIT6 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT6
#define ATDDR7L_BIT7 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT7
#define ATDDR7L_BIT0_MASK 0x01U
#define ATDDR7L_BIT1_MASK 0x02U
#define ATDDR7L_BIT2_MASK 0x04U
#define ATDDR7L_BIT3_MASK 0x08U
#define ATDDR7L_BIT4_MASK 0x10U
#define ATDDR7L_BIT5_MASK 0x20U
#define ATDDR7L_BIT6_MASK 0x40U
#define ATDDR7L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR7STR;
extern volatile ATDDR7STR _ATDDR7 @(REG_BASE + 0x0000008EUL);
#define ATDDR7 _ATDDR7.Word
#define ATDDR7_BIT0 _ATDDR7.Bits.BIT0
#define ATDDR7_BIT1 _ATDDR7.Bits.BIT1
#define ATDDR7_BIT2 _ATDDR7.Bits.BIT2
#define ATDDR7_BIT3 _ATDDR7.Bits.BIT3
#define ATDDR7_BIT4 _ATDDR7.Bits.BIT4
#define ATDDR7_BIT5 _ATDDR7.Bits.BIT5
#define ATDDR7_BIT6 _ATDDR7.Bits.BIT6
#define ATDDR7_BIT7 _ATDDR7.Bits.BIT7
#define ATDDR7_BIT8 _ATDDR7.Bits.BIT8
#define ATDDR7_BIT9 _ATDDR7.Bits.BIT9
#define ATDDR7_BIT10 _ATDDR7.Bits.BIT10
#define ATDDR7_BIT11 _ATDDR7.Bits.BIT11
#define ATDDR7_BIT12 _ATDDR7.Bits.BIT12
#define ATDDR7_BIT13 _ATDDR7.Bits.BIT13
#define ATDDR7_BIT14 _ATDDR7.Bits.BIT14
#define ATDDR7_BIT15 _ATDDR7.Bits.BIT15
#define ATDDR7_BIT0_MASK 0x01U
#define ATDDR7_BIT1_MASK 0x02U
#define ATDDR7_BIT2_MASK 0x04U
#define ATDDR7_BIT3_MASK 0x08U
#define ATDDR7_BIT4_MASK 0x10U
#define ATDDR7_BIT5_MASK 0x20U
#define ATDDR7_BIT6_MASK 0x40U
#define ATDDR7_BIT7_MASK 0x80U
#define ATDDR7_BIT8_MASK 0x0100U
#define ATDDR7_BIT9_MASK 0x0200U
#define ATDDR7_BIT10_MASK 0x0400U
#define ATDDR7_BIT11_MASK 0x0800U
#define ATDDR7_BIT12_MASK 0x1000U
#define ATDDR7_BIT13_MASK 0x2000U
#define ATDDR7_BIT14_MASK 0x4000U
#define ATDDR7_BIT15_MASK 0x8000U
/*** ATDDR8 - ATD Conversion Result Register 8; 0x00000090 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR8H - ATD Conversion Result Register 8 High; 0x00000090 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR8HSTR;
#define ATDDR8H _ATDDR8.Overlap_STR.ATDDR8HSTR.Byte
#define ATDDR8H_BIT8 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT8
#define ATDDR8H_BIT9 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT9
#define ATDDR8H_BIT10 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT10
#define ATDDR8H_BIT11 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT11
#define ATDDR8H_BIT12 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT12
#define ATDDR8H_BIT13 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT13
#define ATDDR8H_BIT14 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT14
#define ATDDR8H_BIT15 _ATDDR8.Overlap_STR.ATDDR8HSTR.Bits.BIT15
#define ATDDR8H_BIT8_MASK 0x01U
#define ATDDR8H_BIT9_MASK 0x02U
#define ATDDR8H_BIT10_MASK 0x04U
#define ATDDR8H_BIT11_MASK 0x08U
#define ATDDR8H_BIT12_MASK 0x10U
#define ATDDR8H_BIT13_MASK 0x20U
#define ATDDR8H_BIT14_MASK 0x40U
#define ATDDR8H_BIT15_MASK 0x80U
/*** ATDDR8L - ATD Conversion Result Register 8 Low; 0x00000091 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR8LSTR;
#define ATDDR8L _ATDDR8.Overlap_STR.ATDDR8LSTR.Byte
#define ATDDR8L_BIT0 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT0
#define ATDDR8L_BIT1 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT1
#define ATDDR8L_BIT2 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT2
#define ATDDR8L_BIT3 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT3
#define ATDDR8L_BIT4 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT4
#define ATDDR8L_BIT5 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT5
#define ATDDR8L_BIT6 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT6
#define ATDDR8L_BIT7 _ATDDR8.Overlap_STR.ATDDR8LSTR.Bits.BIT7
#define ATDDR8L_BIT0_MASK 0x01U
#define ATDDR8L_BIT1_MASK 0x02U
#define ATDDR8L_BIT2_MASK 0x04U
#define ATDDR8L_BIT3_MASK 0x08U
#define ATDDR8L_BIT4_MASK 0x10U
#define ATDDR8L_BIT5_MASK 0x20U
#define ATDDR8L_BIT6_MASK 0x40U
#define ATDDR8L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR8STR;
extern volatile ATDDR8STR _ATDDR8 @(REG_BASE + 0x00000090UL);
#define ATDDR8 _ATDDR8.Word
#define ATDDR8_BIT0 _ATDDR8.Bits.BIT0
#define ATDDR8_BIT1 _ATDDR8.Bits.BIT1
#define ATDDR8_BIT2 _ATDDR8.Bits.BIT2
#define ATDDR8_BIT3 _ATDDR8.Bits.BIT3
#define ATDDR8_BIT4 _ATDDR8.Bits.BIT4
#define ATDDR8_BIT5 _ATDDR8.Bits.BIT5
#define ATDDR8_BIT6 _ATDDR8.Bits.BIT6
#define ATDDR8_BIT7 _ATDDR8.Bits.BIT7
#define ATDDR8_BIT8 _ATDDR8.Bits.BIT8
#define ATDDR8_BIT9 _ATDDR8.Bits.BIT9
#define ATDDR8_BIT10 _ATDDR8.Bits.BIT10
#define ATDDR8_BIT11 _ATDDR8.Bits.BIT11
#define ATDDR8_BIT12 _ATDDR8.Bits.BIT12
#define ATDDR8_BIT13 _ATDDR8.Bits.BIT13
#define ATDDR8_BIT14 _ATDDR8.Bits.BIT14
#define ATDDR8_BIT15 _ATDDR8.Bits.BIT15
#define ATDDR8_BIT0_MASK 0x01U
#define ATDDR8_BIT1_MASK 0x02U
#define ATDDR8_BIT2_MASK 0x04U
#define ATDDR8_BIT3_MASK 0x08U
#define ATDDR8_BIT4_MASK 0x10U
#define ATDDR8_BIT5_MASK 0x20U
#define ATDDR8_BIT6_MASK 0x40U
#define ATDDR8_BIT7_MASK 0x80U
#define ATDDR8_BIT8_MASK 0x0100U
#define ATDDR8_BIT9_MASK 0x0200U
#define ATDDR8_BIT10_MASK 0x0400U
#define ATDDR8_BIT11_MASK 0x0800U
#define ATDDR8_BIT12_MASK 0x1000U
#define ATDDR8_BIT13_MASK 0x2000U
#define ATDDR8_BIT14_MASK 0x4000U
#define ATDDR8_BIT15_MASK 0x8000U
/*** ATDDR9 - ATD Conversion Result Register 9; 0x00000092 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR9H - ATD Conversion Result Register 9 High; 0x00000092 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR9HSTR;
#define ATDDR9H _ATDDR9.Overlap_STR.ATDDR9HSTR.Byte
#define ATDDR9H_BIT8 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT8
#define ATDDR9H_BIT9 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT9
#define ATDDR9H_BIT10 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT10
#define ATDDR9H_BIT11 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT11
#define ATDDR9H_BIT12 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT12
#define ATDDR9H_BIT13 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT13
#define ATDDR9H_BIT14 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT14
#define ATDDR9H_BIT15 _ATDDR9.Overlap_STR.ATDDR9HSTR.Bits.BIT15
#define ATDDR9H_BIT8_MASK 0x01U
#define ATDDR9H_BIT9_MASK 0x02U
#define ATDDR9H_BIT10_MASK 0x04U
#define ATDDR9H_BIT11_MASK 0x08U
#define ATDDR9H_BIT12_MASK 0x10U
#define ATDDR9H_BIT13_MASK 0x20U
#define ATDDR9H_BIT14_MASK 0x40U
#define ATDDR9H_BIT15_MASK 0x80U
/*** ATDDR9L - ATD Conversion Result Register 9 Low; 0x00000093 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR9LSTR;
#define ATDDR9L _ATDDR9.Overlap_STR.ATDDR9LSTR.Byte
#define ATDDR9L_BIT0 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT0
#define ATDDR9L_BIT1 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT1
#define ATDDR9L_BIT2 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT2
#define ATDDR9L_BIT3 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT3
#define ATDDR9L_BIT4 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT4
#define ATDDR9L_BIT5 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT5
#define ATDDR9L_BIT6 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT6
#define ATDDR9L_BIT7 _ATDDR9.Overlap_STR.ATDDR9LSTR.Bits.BIT7
#define ATDDR9L_BIT0_MASK 0x01U
#define ATDDR9L_BIT1_MASK 0x02U
#define ATDDR9L_BIT2_MASK 0x04U
#define ATDDR9L_BIT3_MASK 0x08U
#define ATDDR9L_BIT4_MASK 0x10U
#define ATDDR9L_BIT5_MASK 0x20U
#define ATDDR9L_BIT6_MASK 0x40U
#define ATDDR9L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR9STR;
extern volatile ATDDR9STR _ATDDR9 @(REG_BASE + 0x00000092UL);
#define ATDDR9 _ATDDR9.Word
#define ATDDR9_BIT0 _ATDDR9.Bits.BIT0
#define ATDDR9_BIT1 _ATDDR9.Bits.BIT1
#define ATDDR9_BIT2 _ATDDR9.Bits.BIT2
#define ATDDR9_BIT3 _ATDDR9.Bits.BIT3
#define ATDDR9_BIT4 _ATDDR9.Bits.BIT4
#define ATDDR9_BIT5 _ATDDR9.Bits.BIT5
#define ATDDR9_BIT6 _ATDDR9.Bits.BIT6
#define ATDDR9_BIT7 _ATDDR9.Bits.BIT7
#define ATDDR9_BIT8 _ATDDR9.Bits.BIT8
#define ATDDR9_BIT9 _ATDDR9.Bits.BIT9
#define ATDDR9_BIT10 _ATDDR9.Bits.BIT10
#define ATDDR9_BIT11 _ATDDR9.Bits.BIT11
#define ATDDR9_BIT12 _ATDDR9.Bits.BIT12
#define ATDDR9_BIT13 _ATDDR9.Bits.BIT13
#define ATDDR9_BIT14 _ATDDR9.Bits.BIT14
#define ATDDR9_BIT15 _ATDDR9.Bits.BIT15
#define ATDDR9_BIT0_MASK 0x01U
#define ATDDR9_BIT1_MASK 0x02U
#define ATDDR9_BIT2_MASK 0x04U
#define ATDDR9_BIT3_MASK 0x08U
#define ATDDR9_BIT4_MASK 0x10U
#define ATDDR9_BIT5_MASK 0x20U
#define ATDDR9_BIT6_MASK 0x40U
#define ATDDR9_BIT7_MASK 0x80U
#define ATDDR9_BIT8_MASK 0x0100U
#define ATDDR9_BIT9_MASK 0x0200U
#define ATDDR9_BIT10_MASK 0x0400U
#define ATDDR9_BIT11_MASK 0x0800U
#define ATDDR9_BIT12_MASK 0x1000U
#define ATDDR9_BIT13_MASK 0x2000U
#define ATDDR9_BIT14_MASK 0x4000U
#define ATDDR9_BIT15_MASK 0x8000U
/*** ATDDR10 - ATD Conversion Result Register 10; 0x00000094 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR10H - ATD Conversion Result Register 10 High; 0x00000094 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR10HSTR;
#define ATDDR10H _ATDDR10.Overlap_STR.ATDDR10HSTR.Byte
#define ATDDR10H_BIT8 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT8
#define ATDDR10H_BIT9 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT9
#define ATDDR10H_BIT10 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT10
#define ATDDR10H_BIT11 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT11
#define ATDDR10H_BIT12 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT12
#define ATDDR10H_BIT13 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT13
#define ATDDR10H_BIT14 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT14
#define ATDDR10H_BIT15 _ATDDR10.Overlap_STR.ATDDR10HSTR.Bits.BIT15
#define ATDDR10H_BIT8_MASK 0x01U
#define ATDDR10H_BIT9_MASK 0x02U
#define ATDDR10H_BIT10_MASK 0x04U
#define ATDDR10H_BIT11_MASK 0x08U
#define ATDDR10H_BIT12_MASK 0x10U
#define ATDDR10H_BIT13_MASK 0x20U
#define ATDDR10H_BIT14_MASK 0x40U
#define ATDDR10H_BIT15_MASK 0x80U
/*** ATDDR10L - ATD Conversion Result Register 10 Low; 0x00000095 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR10LSTR;
#define ATDDR10L _ATDDR10.Overlap_STR.ATDDR10LSTR.Byte
#define ATDDR10L_BIT0 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT0
#define ATDDR10L_BIT1 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT1
#define ATDDR10L_BIT2 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT2
#define ATDDR10L_BIT3 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT3
#define ATDDR10L_BIT4 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT4
#define ATDDR10L_BIT5 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT5
#define ATDDR10L_BIT6 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT6
#define ATDDR10L_BIT7 _ATDDR10.Overlap_STR.ATDDR10LSTR.Bits.BIT7
#define ATDDR10L_BIT0_MASK 0x01U
#define ATDDR10L_BIT1_MASK 0x02U
#define ATDDR10L_BIT2_MASK 0x04U
#define ATDDR10L_BIT3_MASK 0x08U
#define ATDDR10L_BIT4_MASK 0x10U
#define ATDDR10L_BIT5_MASK 0x20U
#define ATDDR10L_BIT6_MASK 0x40U
#define ATDDR10L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR10STR;
extern volatile ATDDR10STR _ATDDR10 @(REG_BASE + 0x00000094UL);
#define ATDDR10 _ATDDR10.Word
#define ATDDR10_BIT0 _ATDDR10.Bits.BIT0
#define ATDDR10_BIT1 _ATDDR10.Bits.BIT1
#define ATDDR10_BIT2 _ATDDR10.Bits.BIT2
#define ATDDR10_BIT3 _ATDDR10.Bits.BIT3
#define ATDDR10_BIT4 _ATDDR10.Bits.BIT4
#define ATDDR10_BIT5 _ATDDR10.Bits.BIT5
#define ATDDR10_BIT6 _ATDDR10.Bits.BIT6
#define ATDDR10_BIT7 _ATDDR10.Bits.BIT7
#define ATDDR10_BIT8 _ATDDR10.Bits.BIT8
#define ATDDR10_BIT9 _ATDDR10.Bits.BIT9
#define ATDDR10_BIT10 _ATDDR10.Bits.BIT10
#define ATDDR10_BIT11 _ATDDR10.Bits.BIT11
#define ATDDR10_BIT12 _ATDDR10.Bits.BIT12
#define ATDDR10_BIT13 _ATDDR10.Bits.BIT13
#define ATDDR10_BIT14 _ATDDR10.Bits.BIT14
#define ATDDR10_BIT15 _ATDDR10.Bits.BIT15
#define ATDDR10_BIT0_MASK 0x01U
#define ATDDR10_BIT1_MASK 0x02U
#define ATDDR10_BIT2_MASK 0x04U
#define ATDDR10_BIT3_MASK 0x08U
#define ATDDR10_BIT4_MASK 0x10U
#define ATDDR10_BIT5_MASK 0x20U
#define ATDDR10_BIT6_MASK 0x40U
#define ATDDR10_BIT7_MASK 0x80U
#define ATDDR10_BIT8_MASK 0x0100U
#define ATDDR10_BIT9_MASK 0x0200U
#define ATDDR10_BIT10_MASK 0x0400U
#define ATDDR10_BIT11_MASK 0x0800U
#define ATDDR10_BIT12_MASK 0x1000U
#define ATDDR10_BIT13_MASK 0x2000U
#define ATDDR10_BIT14_MASK 0x4000U
#define ATDDR10_BIT15_MASK 0x8000U
/*** ATDDR11 - ATD Conversion Result Register 11; 0x00000096 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR11H - ATD Conversion Result Register 11 High; 0x00000096 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR11HSTR;
#define ATDDR11H _ATDDR11.Overlap_STR.ATDDR11HSTR.Byte
#define ATDDR11H_BIT8 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT8
#define ATDDR11H_BIT9 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT9
#define ATDDR11H_BIT10 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT10
#define ATDDR11H_BIT11 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT11
#define ATDDR11H_BIT12 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT12
#define ATDDR11H_BIT13 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT13
#define ATDDR11H_BIT14 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT14
#define ATDDR11H_BIT15 _ATDDR11.Overlap_STR.ATDDR11HSTR.Bits.BIT15
#define ATDDR11H_BIT8_MASK 0x01U
#define ATDDR11H_BIT9_MASK 0x02U
#define ATDDR11H_BIT10_MASK 0x04U
#define ATDDR11H_BIT11_MASK 0x08U
#define ATDDR11H_BIT12_MASK 0x10U
#define ATDDR11H_BIT13_MASK 0x20U
#define ATDDR11H_BIT14_MASK 0x40U
#define ATDDR11H_BIT15_MASK 0x80U
/*** ATDDR11L - ATD Conversion Result Register 11 Low; 0x00000097 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Bit 0 */
byte BIT1 :1; /* Bit 1 */
byte BIT2 :1; /* Bit 2 */
byte BIT3 :1; /* Bit 3 */
byte BIT4 :1; /* Bit 4 */
byte BIT5 :1; /* Bit 5 */
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
} ATDDR11LSTR;
#define ATDDR11L _ATDDR11.Overlap_STR.ATDDR11LSTR.Byte
#define ATDDR11L_BIT0 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT0
#define ATDDR11L_BIT1 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT1
#define ATDDR11L_BIT2 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT2
#define ATDDR11L_BIT3 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT3
#define ATDDR11L_BIT4 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT4
#define ATDDR11L_BIT5 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT5
#define ATDDR11L_BIT6 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT6
#define ATDDR11L_BIT7 _ATDDR11.Overlap_STR.ATDDR11LSTR.Bits.BIT7
#define ATDDR11L_BIT0_MASK 0x01U
#define ATDDR11L_BIT1_MASK 0x02U
#define ATDDR11L_BIT2_MASK 0x04U
#define ATDDR11L_BIT3_MASK 0x08U
#define ATDDR11L_BIT4_MASK 0x10U
#define ATDDR11L_BIT5_MASK 0x20U
#define ATDDR11L_BIT6_MASK 0x40U
#define ATDDR11L_BIT7_MASK 0x80U
} Overlap_STR;
struct {
word BIT0 :1; /* Bit 0 */
word BIT1 :1; /* Bit 1 */
word BIT2 :1; /* Bit 2 */
word BIT3 :1; /* Bit 3 */
word BIT4 :1; /* Bit 4 */
word BIT5 :1; /* Bit 5 */
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
} ATDDR11STR;
extern volatile ATDDR11STR _ATDDR11 @(REG_BASE + 0x00000096UL);
#define ATDDR11 _ATDDR11.Word
#define ATDDR11_BIT0 _ATDDR11.Bits.BIT0
#define ATDDR11_BIT1 _ATDDR11.Bits.BIT1
#define ATDDR11_BIT2 _ATDDR11.Bits.BIT2
#define ATDDR11_BIT3 _ATDDR11.Bits.BIT3
#define ATDDR11_BIT4 _ATDDR11.Bits.BIT4
#define ATDDR11_BIT5 _ATDDR11.Bits.BIT5
#define ATDDR11_BIT6 _ATDDR11.Bits.BIT6
#define ATDDR11_BIT7 _ATDDR11.Bits.BIT7
#define ATDDR11_BIT8 _ATDDR11.Bits.BIT8
#define ATDDR11_BIT9 _ATDDR11.Bits.BIT9
#define ATDDR11_BIT10 _ATDDR11.Bits.BIT10
#define ATDDR11_BIT11 _ATDDR11.Bits.BIT11
#define ATDDR11_BIT12 _ATDDR11.Bits.BIT12
#define ATDDR11_BIT13 _ATDDR11.Bits.BIT13
#define ATDDR11_BIT14 _ATDDR11.Bits.BIT14
#define ATDDR11_BIT15 _ATDDR11.Bits.BIT15
#define ATDDR11_BIT0_MASK 0x01U
#define ATDDR11_BIT1_MASK 0x02U
#define ATDDR11_BIT2_MASK 0x04U
#define ATDDR11_BIT3_MASK 0x08U
#define ATDDR11_BIT4_MASK 0x10U
#define ATDDR11_BIT5_MASK 0x20U
#define ATDDR11_BIT6_MASK 0x40U
#define ATDDR11_BIT7_MASK 0x80U
#define ATDDR11_BIT8_MASK 0x0100U
#define ATDDR11_BIT9_MASK 0x0200U
#define ATDDR11_BIT10_MASK 0x0400U
#define ATDDR11_BIT11_MASK 0x0800U
#define ATDDR11_BIT12_MASK 0x1000U
#define ATDDR11_BIT13_MASK 0x2000U
#define ATDDR11_BIT14_MASK 0x4000U
#define ATDDR11_BIT15_MASK 0x8000U
/*** PWME - PWM Enable Register; 0x000000A0 ***/
typedef union {
byte Byte;
struct {
byte PWME0 :1; /* Pulse Width Channel 0 Enable */
byte PWME1 :1; /* Pulse Width Channel 1 Enable */
byte PWME2 :1; /* Pulse Width Channel 2 Enable */
byte PWME3 :1; /* Pulse Width Channel 3 Enable */
byte PWME4 :1; /* Pulse Width Channel 4 Enable */
byte PWME5 :1; /* Pulse Width Channel 5 Enable */
byte PWME6 :1; /* Pulse Width Channel 6 Enable */
byte PWME7 :1; /* Pulse Width Channel 7 Enable */
} Bits;
} PWMESTR;
extern volatile PWMESTR _PWME @(REG_BASE + 0x000000A0UL);
#define PWME _PWME.Byte
#define PWME_PWME0 _PWME.Bits.PWME0
#define PWME_PWME1 _PWME.Bits.PWME1
#define PWME_PWME2 _PWME.Bits.PWME2
#define PWME_PWME3 _PWME.Bits.PWME3
#define PWME_PWME4 _PWME.Bits.PWME4
#define PWME_PWME5 _PWME.Bits.PWME5
#define PWME_PWME6 _PWME.Bits.PWME6
#define PWME_PWME7 _PWME.Bits.PWME7
#define PWME_PWME0_MASK 0x01U
#define PWME_PWME1_MASK 0x02U
#define PWME_PWME2_MASK 0x04U
#define PWME_PWME3_MASK 0x08U
#define PWME_PWME4_MASK 0x10U
#define PWME_PWME5_MASK 0x20U
#define PWME_PWME6_MASK 0x40U
#define PWME_PWME7_MASK 0x80U
/*** PWMPOL - PWM Polarity Register; 0x000000A1 ***/
typedef union {
byte Byte;
struct {
byte PPOL0 :1; /* Pulse Width Channel 0 Polarity */
byte PPOL1 :1; /* Pulse Width Channel 1 Polarity */
byte PPOL2 :1; /* Pulse Width Channel 2 Polarity */
byte PPOL3 :1; /* Pulse Width Channel 3 Polarity */
byte PPOL4 :1; /* Pulse Width Channel 4 Polarity */
byte PPOL5 :1; /* Pulse Width Channel 5 Polarity */
byte PPOL6 :1; /* Pulse Width Channel 6 Polarity */
byte PPOL7 :1; /* Pulse Width Channel 7 Polarity */
} Bits;
} PWMPOLSTR;
extern volatile PWMPOLSTR _PWMPOL @(REG_BASE + 0x000000A1UL);
#define PWMPOL _PWMPOL.Byte
#define PWMPOL_PPOL0 _PWMPOL.Bits.PPOL0
#define PWMPOL_PPOL1 _PWMPOL.Bits.PPOL1
#define PWMPOL_PPOL2 _PWMPOL.Bits.PPOL2
#define PWMPOL_PPOL3 _PWMPOL.Bits.PPOL3
#define PWMPOL_PPOL4 _PWMPOL.Bits.PPOL4
#define PWMPOL_PPOL5 _PWMPOL.Bits.PPOL5
#define PWMPOL_PPOL6 _PWMPOL.Bits.PPOL6
#define PWMPOL_PPOL7 _PWMPOL.Bits.PPOL7
#define PWMPOL_PPOL0_MASK 0x01U
#define PWMPOL_PPOL1_MASK 0x02U
#define PWMPOL_PPOL2_MASK 0x04U
#define PWMPOL_PPOL3_MASK 0x08U
#define PWMPOL_PPOL4_MASK 0x10U
#define PWMPOL_PPOL5_MASK 0x20U
#define PWMPOL_PPOL6_MASK 0x40U
#define PWMPOL_PPOL7_MASK 0x80U
/*** PWMCLK - PWM Clock Select Register; 0x000000A2 ***/
typedef union {
byte Byte;
struct {
byte PCLK0 :1; /* Pulse Width Channel 0 Clock Select */
byte PCLK1 :1; /* Pulse Width Channel 1 Clock Select */
byte PCLK2 :1; /* Pulse Width Channel 2 Clock Select */
byte PCLK3 :1; /* Pulse Width Channel 3 Clock Select */
byte PCLK4 :1; /* Pulse Width Channel 4 Clock Select */
byte PCLK5 :1; /* Pulse Width Channel 5 Clock Select */
byte PCLK6 :1; /* Pulse Width Channel 6 Clock Select */
byte PCLK7 :1; /* Pulse Width Channel 7 Clock Select */
} Bits;
} PWMCLKSTR;
extern volatile PWMCLKSTR _PWMCLK @(REG_BASE + 0x000000A2UL);
#define PWMCLK _PWMCLK.Byte
#define PWMCLK_PCLK0 _PWMCLK.Bits.PCLK0
#define PWMCLK_PCLK1 _PWMCLK.Bits.PCLK1
#define PWMCLK_PCLK2 _PWMCLK.Bits.PCLK2
#define PWMCLK_PCLK3 _PWMCLK.Bits.PCLK3
#define PWMCLK_PCLK4 _PWMCLK.Bits.PCLK4
#define PWMCLK_PCLK5 _PWMCLK.Bits.PCLK5
#define PWMCLK_PCLK6 _PWMCLK.Bits.PCLK6
#define PWMCLK_PCLK7 _PWMCLK.Bits.PCLK7
#define PWMCLK_PCLK0_MASK 0x01U
#define PWMCLK_PCLK1_MASK 0x02U
#define PWMCLK_PCLK2_MASK 0x04U
#define PWMCLK_PCLK3_MASK 0x08U
#define PWMCLK_PCLK4_MASK 0x10U
#define PWMCLK_PCLK5_MASK 0x20U
#define PWMCLK_PCLK6_MASK 0x40U
#define PWMCLK_PCLK7_MASK 0x80U
/*** PWMPRCLK - PWM Prescale Clock Select Register; 0x000000A3 ***/
typedef union {
byte Byte;
struct {
byte PCKA0 :1; /* Prescaler Select for Clock A 0 */
byte PCKA1 :1; /* Prescaler Select for Clock A 1 */
byte PCKA2 :1; /* Prescaler Select for Clock A 2 */
byte :1;
byte PCKB0 :1; /* Prescaler Select for Clock B 0 */
byte PCKB1 :1; /* Prescaler Select for Clock B 1 */
byte PCKB2 :1; /* Prescaler Select for Clock B 2 */
byte :1;
} Bits;
struct {
byte grpPCKA :3;
byte :1;
byte grpPCKB :3;
byte :1;
} MergedBits;
} PWMPRCLKSTR;
extern volatile PWMPRCLKSTR _PWMPRCLK @(REG_BASE + 0x000000A3UL);
#define PWMPRCLK _PWMPRCLK.Byte
#define PWMPRCLK_PCKA0 _PWMPRCLK.Bits.PCKA0
#define PWMPRCLK_PCKA1 _PWMPRCLK.Bits.PCKA1
#define PWMPRCLK_PCKA2 _PWMPRCLK.Bits.PCKA2
#define PWMPRCLK_PCKB0 _PWMPRCLK.Bits.PCKB0
#define PWMPRCLK_PCKB1 _PWMPRCLK.Bits.PCKB1
#define PWMPRCLK_PCKB2 _PWMPRCLK.Bits.PCKB2
#define PWMPRCLK_PCKA _PWMPRCLK.MergedBits.grpPCKA
#define PWMPRCLK_PCKB _PWMPRCLK.MergedBits.grpPCKB
#define PWMPRCLK_PCKA0_MASK 0x01U
#define PWMPRCLK_PCKA1_MASK 0x02U
#define PWMPRCLK_PCKA2_MASK 0x04U
#define PWMPRCLK_PCKB0_MASK 0x10U
#define PWMPRCLK_PCKB1_MASK 0x20U
#define PWMPRCLK_PCKB2_MASK 0x40U
#define PWMPRCLK_PCKA_MASK 0x07U
#define PWMPRCLK_PCKA_BITNUM 0x00U
#define PWMPRCLK_PCKB_MASK 0x70U
#define PWMPRCLK_PCKB_BITNUM 0x04U
/*** PWMCAE - PWM Center Align Enable Register; 0x000000A4 ***/
typedef union {
byte Byte;
struct {
byte CAE0 :1; /* Center Aligned Output Mode on channel 0 */
byte CAE1 :1; /* Center Aligned Output Mode on channel 1 */
byte CAE2 :1; /* Center Aligned Output Mode on channel 2 */
byte CAE3 :1; /* Center Aligned Output Mode on channel 3 */
byte CAE4 :1; /* Center Aligned Output Mode on channel 4 */
byte CAE5 :1; /* Center Aligned Output Mode on channel 5 */
byte CAE6 :1; /* Center Aligned Output Mode on channel 6 */
byte CAE7 :1; /* Center Aligned Output Mode on channel 7 */
} Bits;
} PWMCAESTR;
extern volatile PWMCAESTR _PWMCAE @(REG_BASE + 0x000000A4UL);
#define PWMCAE _PWMCAE.Byte
#define PWMCAE_CAE0 _PWMCAE.Bits.CAE0
#define PWMCAE_CAE1 _PWMCAE.Bits.CAE1
#define PWMCAE_CAE2 _PWMCAE.Bits.CAE2
#define PWMCAE_CAE3 _PWMCAE.Bits.CAE3
#define PWMCAE_CAE4 _PWMCAE.Bits.CAE4
#define PWMCAE_CAE5 _PWMCAE.Bits.CAE5
#define PWMCAE_CAE6 _PWMCAE.Bits.CAE6
#define PWMCAE_CAE7 _PWMCAE.Bits.CAE7
#define PWMCAE_CAE0_MASK 0x01U
#define PWMCAE_CAE1_MASK 0x02U
#define PWMCAE_CAE2_MASK 0x04U
#define PWMCAE_CAE3_MASK 0x08U
#define PWMCAE_CAE4_MASK 0x10U
#define PWMCAE_CAE5_MASK 0x20U
#define PWMCAE_CAE6_MASK 0x40U
#define PWMCAE_CAE7_MASK 0x80U
/*** PWMCTL - PWM Control Register; 0x000000A5 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte PFRZ :1; /* PWM Counters Stop in Freeze Mode */
byte PSWAI :1; /* PWM Stops in Wait Mode */
byte CON01 :1; /* Concatenate channels 0 and 1 */
byte CON23 :1; /* Concatenate channels 2 and 3 */
byte CON45 :1; /* Concatenate channels 4 and 5 */
byte CON67 :1; /* Concatenate channels 6 and 7 */
} Bits;
} PWMCTLSTR;
extern volatile PWMCTLSTR _PWMCTL @(REG_BASE + 0x000000A5UL);
#define PWMCTL _PWMCTL.Byte
#define PWMCTL_PFRZ _PWMCTL.Bits.PFRZ
#define PWMCTL_PSWAI _PWMCTL.Bits.PSWAI
#define PWMCTL_CON01 _PWMCTL.Bits.CON01
#define PWMCTL_CON23 _PWMCTL.Bits.CON23
#define PWMCTL_CON45 _PWMCTL.Bits.CON45
#define PWMCTL_CON67 _PWMCTL.Bits.CON67
#define PWMCTL_PFRZ_MASK 0x04U
#define PWMCTL_PSWAI_MASK 0x08U
#define PWMCTL_CON01_MASK 0x10U
#define PWMCTL_CON23_MASK 0x20U
#define PWMCTL_CON45_MASK 0x40U
#define PWMCTL_CON67_MASK 0x80U
/*** PWMCLKAB - PWM Clock Select Register; 0x000000A6 ***/
typedef union {
byte Byte;
struct {
byte PCLKAB0 :1; /* Pulse Width Channel 0 Clock A/B Select */
byte PCLKAB1 :1; /* Pulse Width Channel 1 Clock A/B Select */
byte PCLKAB2 :1; /* Pulse Width Channel 2 Clock A/B Select */
byte PCLKAB3 :1; /* Pulse Width Channel 3 Clock A/B Select */
byte PCLKAB4 :1; /* Pulse Width Channel 4 Clock A/B Select */
byte PCLKAB5 :1; /* Pulse Width Channel 5 Clock A/B Select */
byte PCLKAB6 :1; /* Pulse Width Channel 6 Clock A/B Select */
byte PCLKAB7 :1; /* Pulse Width Channel 7 Clock A/B Select */
} Bits;
} PWMCLKABSTR;
extern volatile PWMCLKABSTR _PWMCLKAB @(REG_BASE + 0x000000A6UL);
#define PWMCLKAB _PWMCLKAB.Byte
#define PWMCLKAB_PCLKAB0 _PWMCLKAB.Bits.PCLKAB0
#define PWMCLKAB_PCLKAB1 _PWMCLKAB.Bits.PCLKAB1
#define PWMCLKAB_PCLKAB2 _PWMCLKAB.Bits.PCLKAB2
#define PWMCLKAB_PCLKAB3 _PWMCLKAB.Bits.PCLKAB3
#define PWMCLKAB_PCLKAB4 _PWMCLKAB.Bits.PCLKAB4
#define PWMCLKAB_PCLKAB5 _PWMCLKAB.Bits.PCLKAB5
#define PWMCLKAB_PCLKAB6 _PWMCLKAB.Bits.PCLKAB6
#define PWMCLKAB_PCLKAB7 _PWMCLKAB.Bits.PCLKAB7
#define PWMCLKAB_PCLKAB0_MASK 0x01U
#define PWMCLKAB_PCLKAB1_MASK 0x02U
#define PWMCLKAB_PCLKAB2_MASK 0x04U
#define PWMCLKAB_PCLKAB3_MASK 0x08U
#define PWMCLKAB_PCLKAB4_MASK 0x10U
#define PWMCLKAB_PCLKAB5_MASK 0x20U
#define PWMCLKAB_PCLKAB6_MASK 0x40U
#define PWMCLKAB_PCLKAB7_MASK 0x80U
/*** PWMSCLA - PWM Scale A Register; 0x000000A8 ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* PWM Scale A Bit 0 */
byte BIT1 :1; /* PWM Scale A Bit 1 */
byte BIT2 :1; /* PWM Scale A Bit 2 */
byte BIT3 :1; /* PWM Scale A Bit 3 */
byte BIT4 :1; /* PWM Scale A Bit 4 */
byte BIT5 :1; /* PWM Scale A Bit 5 */
byte BIT6 :1; /* PWM Scale A Bit 6 */
byte BIT7 :1; /* PWM Scale A Bit 7 */
} Bits;
} PWMSCLASTR;
extern volatile PWMSCLASTR _PWMSCLA @(REG_BASE + 0x000000A8UL);
#define PWMSCLA _PWMSCLA.Byte
#define PWMSCLA_BIT0 _PWMSCLA.Bits.BIT0
#define PWMSCLA_BIT1 _PWMSCLA.Bits.BIT1
#define PWMSCLA_BIT2 _PWMSCLA.Bits.BIT2
#define PWMSCLA_BIT3 _PWMSCLA.Bits.BIT3
#define PWMSCLA_BIT4 _PWMSCLA.Bits.BIT4
#define PWMSCLA_BIT5 _PWMSCLA.Bits.BIT5
#define PWMSCLA_BIT6 _PWMSCLA.Bits.BIT6
#define PWMSCLA_BIT7 _PWMSCLA.Bits.BIT7
#define PWMSCLA_BIT0_MASK 0x01U
#define PWMSCLA_BIT1_MASK 0x02U
#define PWMSCLA_BIT2_MASK 0x04U
#define PWMSCLA_BIT3_MASK 0x08U
#define PWMSCLA_BIT4_MASK 0x10U
#define PWMSCLA_BIT5_MASK 0x20U
#define PWMSCLA_BIT6_MASK 0x40U
#define PWMSCLA_BIT7_MASK 0x80U
/*** PWMSCLB - PWM Scale B Register; 0x000000A9 ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* PWM Scale B Bit 0 */
byte BIT1 :1; /* PWM Scale B Bit 1 */
byte BIT2 :1; /* PWM Scale B Bit 2 */
byte BIT3 :1; /* PWM Scale B Bit 3 */
byte BIT4 :1; /* PWM Scale B Bit 4 */
byte BIT5 :1; /* PWM Scale B Bit 5 */
byte BIT6 :1; /* PWM Scale B Bit 6 */
byte BIT7 :1; /* PWM Scale B Bit 7 */
} Bits;
} PWMSCLBSTR;
extern volatile PWMSCLBSTR _PWMSCLB @(REG_BASE + 0x000000A9UL);
#define PWMSCLB _PWMSCLB.Byte
#define PWMSCLB_BIT0 _PWMSCLB.Bits.BIT0
#define PWMSCLB_BIT1 _PWMSCLB.Bits.BIT1
#define PWMSCLB_BIT2 _PWMSCLB.Bits.BIT2
#define PWMSCLB_BIT3 _PWMSCLB.Bits.BIT3
#define PWMSCLB_BIT4 _PWMSCLB.Bits.BIT4
#define PWMSCLB_BIT5 _PWMSCLB.Bits.BIT5
#define PWMSCLB_BIT6 _PWMSCLB.Bits.BIT6
#define PWMSCLB_BIT7 _PWMSCLB.Bits.BIT7
#define PWMSCLB_BIT0_MASK 0x01U
#define PWMSCLB_BIT1_MASK 0x02U
#define PWMSCLB_BIT2_MASK 0x04U
#define PWMSCLB_BIT3_MASK 0x08U
#define PWMSCLB_BIT4_MASK 0x10U
#define PWMSCLB_BIT5_MASK 0x20U
#define PWMSCLB_BIT6_MASK 0x40U
#define PWMSCLB_BIT7_MASK 0x80U
/*** PWMCNT01 - PWM Channel Counter 01 Register; 0x000000AC ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMCNT0 - PWM Channel Counter 0 Register; 0x000000AC ***/
union {
byte Byte;
} PWMCNT0STR;
#define PWMCNT0 _PWMCNT01.Overlap_STR.PWMCNT0STR.Byte
/* PWMCNT_ARR: Access 8 PWMCNTx registers in an array */
#define PWMCNT_ARR ((volatile byte *) &PWMCNT0)
/*** PWMCNT1 - PWM Channel Counter 1 Register; 0x000000AD ***/
union {
byte Byte;
} PWMCNT1STR;
#define PWMCNT1 _PWMCNT01.Overlap_STR.PWMCNT1STR.Byte
} Overlap_STR;
} PWMCNT01STR;
extern volatile PWMCNT01STR _PWMCNT01 @(REG_BASE + 0x000000ACUL);
#define PWMCNT01 _PWMCNT01.Word
/*** PWMCNT23 - PWM Channel Counter 23 Register; 0x000000AE ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMCNT2 - PWM Channel Counter 2 Register; 0x000000AE ***/
union {
byte Byte;
} PWMCNT2STR;
#define PWMCNT2 _PWMCNT23.Overlap_STR.PWMCNT2STR.Byte
/*** PWMCNT3 - PWM Channel Counter 3 Register; 0x000000AF ***/
union {
byte Byte;
} PWMCNT3STR;
#define PWMCNT3 _PWMCNT23.Overlap_STR.PWMCNT3STR.Byte
} Overlap_STR;
} PWMCNT23STR;
extern volatile PWMCNT23STR _PWMCNT23 @(REG_BASE + 0x000000AEUL);
#define PWMCNT23 _PWMCNT23.Word
/*** PWMCNT45 - PWM Channel Counter 45 Register; 0x000000B0 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMCNT4 - PWM Channel Counter 4 Register; 0x000000B0 ***/
union {
byte Byte;
} PWMCNT4STR;
#define PWMCNT4 _PWMCNT45.Overlap_STR.PWMCNT4STR.Byte
/*** PWMCNT5 - PWM Channel Counter 5 Register; 0x000000B1 ***/
union {
byte Byte;
} PWMCNT5STR;
#define PWMCNT5 _PWMCNT45.Overlap_STR.PWMCNT5STR.Byte
} Overlap_STR;
} PWMCNT45STR;
extern volatile PWMCNT45STR _PWMCNT45 @(REG_BASE + 0x000000B0UL);
#define PWMCNT45 _PWMCNT45.Word
/*** PWMCNT67 - PWM Channel Counter 67 Register; 0x000000B2 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMCNT6 - PWM Channel Counter 6 Register; 0x000000B2 ***/
union {
byte Byte;
} PWMCNT6STR;
#define PWMCNT6 _PWMCNT67.Overlap_STR.PWMCNT6STR.Byte
/*** PWMCNT7 - PWM Channel Counter 7 Register; 0x000000B3 ***/
union {
byte Byte;
} PWMCNT7STR;
#define PWMCNT7 _PWMCNT67.Overlap_STR.PWMCNT7STR.Byte
} Overlap_STR;
} PWMCNT67STR;
extern volatile PWMCNT67STR _PWMCNT67 @(REG_BASE + 0x000000B2UL);
#define PWMCNT67 _PWMCNT67.Word
/*** PWMPER01 - PWM Channel Period 01 Register; 0x000000B4 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMPER0 - PWM Channel Period 0 Register; 0x000000B4 ***/
union {
byte Byte;
} PWMPER0STR;
#define PWMPER0 _PWMPER01.Overlap_STR.PWMPER0STR.Byte
/* PWMPER_ARR: Access 8 PWMPERx registers in an array */
#define PWMPER_ARR ((volatile byte *) &PWMPER0)
/*** PWMPER1 - PWM Channel Period 1 Register; 0x000000B5 ***/
union {
byte Byte;
} PWMPER1STR;
#define PWMPER1 _PWMPER01.Overlap_STR.PWMPER1STR.Byte
} Overlap_STR;
} PWMPER01STR;
extern volatile PWMPER01STR _PWMPER01 @(REG_BASE + 0x000000B4UL);
#define PWMPER01 _PWMPER01.Word
/*** PWMPER23 - PWM Channel Period 23 Register; 0x000000B6 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMPER2 - PWM Channel Period 2 Register; 0x000000B6 ***/
union {
byte Byte;
} PWMPER2STR;
#define PWMPER2 _PWMPER23.Overlap_STR.PWMPER2STR.Byte
/*** PWMPER3 - PWM Channel Period 3 Register; 0x000000B7 ***/
union {
byte Byte;
} PWMPER3STR;
#define PWMPER3 _PWMPER23.Overlap_STR.PWMPER3STR.Byte
} Overlap_STR;
} PWMPER23STR;
extern volatile PWMPER23STR _PWMPER23 @(REG_BASE + 0x000000B6UL);
#define PWMPER23 _PWMPER23.Word
/*** PWMPER45 - PWM Channel Period 45 Register; 0x000000B8 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMPER4 - PWM Channel Period 4 Register; 0x000000B8 ***/
union {
byte Byte;
} PWMPER4STR;
#define PWMPER4 _PWMPER45.Overlap_STR.PWMPER4STR.Byte
/*** PWMPER5 - PWM Channel Period 5 Register; 0x000000B9 ***/
union {
byte Byte;
} PWMPER5STR;
#define PWMPER5 _PWMPER45.Overlap_STR.PWMPER5STR.Byte
} Overlap_STR;
} PWMPER45STR;
extern volatile PWMPER45STR _PWMPER45 @(REG_BASE + 0x000000B8UL);
#define PWMPER45 _PWMPER45.Word
/*** PWMPER67 - PWM Channel Period 67 Register; 0x000000BA ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMPER6 - PWM Channel Period 6 Register; 0x000000BA ***/
union {
byte Byte;
} PWMPER6STR;
#define PWMPER6 _PWMPER67.Overlap_STR.PWMPER6STR.Byte
/*** PWMPER7 - PWM Channel Period 7 Register; 0x000000BB ***/
union {
byte Byte;
} PWMPER7STR;
#define PWMPER7 _PWMPER67.Overlap_STR.PWMPER7STR.Byte
} Overlap_STR;
} PWMPER67STR;
extern volatile PWMPER67STR _PWMPER67 @(REG_BASE + 0x000000BAUL);
#define PWMPER67 _PWMPER67.Word
/*** PWMDTY01 - PWM Channel Duty 01 Register; 0x000000BC ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMDTY0 - PWM Channel Duty 0 Register; 0x000000BC ***/
union {
byte Byte;
} PWMDTY0STR;
#define PWMDTY0 _PWMDTY01.Overlap_STR.PWMDTY0STR.Byte
/* PWMDTY_ARR: Access 8 PWMDTYx registers in an array */
#define PWMDTY_ARR ((volatile byte *) &PWMDTY0)
/*** PWMDTY1 - PWM Channel Duty 1 Register; 0x000000BD ***/
union {
byte Byte;
} PWMDTY1STR;
#define PWMDTY1 _PWMDTY01.Overlap_STR.PWMDTY1STR.Byte
} Overlap_STR;
} PWMDTY01STR;
extern volatile PWMDTY01STR _PWMDTY01 @(REG_BASE + 0x000000BCUL);
#define PWMDTY01 _PWMDTY01.Word
/*** PWMDTY23 - PWM Channel Duty 23 Register; 0x000000BE ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMDTY2 - PWM Channel Duty 2 Register; 0x000000BE ***/
union {
byte Byte;
} PWMDTY2STR;
#define PWMDTY2 _PWMDTY23.Overlap_STR.PWMDTY2STR.Byte
/*** PWMDTY3 - PWM Channel Duty 3 Register; 0x000000BF ***/
union {
byte Byte;
} PWMDTY3STR;
#define PWMDTY3 _PWMDTY23.Overlap_STR.PWMDTY3STR.Byte
} Overlap_STR;
} PWMDTY23STR;
extern volatile PWMDTY23STR _PWMDTY23 @(REG_BASE + 0x000000BEUL);
#define PWMDTY23 _PWMDTY23.Word
/*** PWMDTY45 - PWM Channel Duty 45 Register; 0x000000C0 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMDTY4 - PWM Channel Duty 4 Register; 0x000000C0 ***/
union {
byte Byte;
} PWMDTY4STR;
#define PWMDTY4 _PWMDTY45.Overlap_STR.PWMDTY4STR.Byte
/*** PWMDTY5 - PWM Channel Duty 5 Register; 0x000000C1 ***/
union {
byte Byte;
} PWMDTY5STR;
#define PWMDTY5 _PWMDTY45.Overlap_STR.PWMDTY5STR.Byte
} Overlap_STR;
} PWMDTY45STR;
extern volatile PWMDTY45STR _PWMDTY45 @(REG_BASE + 0x000000C0UL);
#define PWMDTY45 _PWMDTY45.Word
/*** PWMDTY67 - PWM Channel Duty 67 Register; 0x000000C2 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMDTY6 - PWM Channel Duty 6 Register; 0x000000C2 ***/
union {
byte Byte;
} PWMDTY6STR;
#define PWMDTY6 _PWMDTY67.Overlap_STR.PWMDTY6STR.Byte
/*** PWMDTY7 - PWM Channel Duty 7 Register; 0x000000C3 ***/
union {
byte Byte;
} PWMDTY7STR;
#define PWMDTY7 _PWMDTY67.Overlap_STR.PWMDTY7STR.Byte
} Overlap_STR;
} PWMDTY67STR;
extern volatile PWMDTY67STR _PWMDTY67 @(REG_BASE + 0x000000C2UL);
#define PWMDTY67 _PWMDTY67.Word
/*** SCI0BD - SCI 0 Baud Rate Register; 0x000000C8 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** SCI0ASR1 - SCI 0 Alternative Status Register 1; 0x000000C8 ***/
union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI0ASR1 - SCI 0 Alternative Status Register 1; Several registers at the same address ***/
union {
struct {
byte BKDIF :1; /* Break Detect Interrupt Flag */
byte BERRIF :1; /* Bit Error Interrupt Flag */
byte BERRV :1; /* Bit Error Value */
byte :1;
byte :1;
byte :1;
byte :1;
byte RXEDGIF :1; /* Receive Input Active Edge Interrupt Flag */
} Bits;
} SCI0ASR1STR;
#define SCI0ASR1 _SCI0BD.Overlap_STR.SCI0ASR1STR.Byte
#define SCI0ASR1_BKDIF _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0ASR1STR.Bits.BKDIF
#define SCI0ASR1_BERRIF _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0ASR1STR.Bits.BERRIF
#define SCI0ASR1_BERRV _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0ASR1STR.Bits.BERRV
#define SCI0ASR1_RXEDGIF _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0ASR1STR.Bits.RXEDGIF
#define SCI0ASR1_BKDIF_MASK 0x01U
#define SCI0ASR1_BERRIF_MASK 0x02U
#define SCI0ASR1_BERRV_MASK 0x04U
#define SCI0ASR1_RXEDGIF_MASK 0x80U
/*** SCI0BDH - SCI 0 Baud Rate Register High; Several registers at the same address ***/
union {
struct {
byte SBR8 :1; /* SCI Baud Rate Bit 8 */
byte SBR9 :1; /* SCI Baud Rate Bit 9 */
byte SBR10 :1; /* SCI Baud Rate Bit 10 */
byte SBR11 :1; /* SCI Baud Rate Bit 11 */
byte SBR12 :1; /* SCI Baud Rate Bit 12 */
byte TNP0 :1; /* Transmitter Narrow Pulse Bit 0 */
byte TNP1 :1; /* Transmitter Narrow Pulse Bit 1 */
byte IREN :1; /* Infrared Enable Bit */
} Bits;
struct {
byte grpSBR_8 :5;
byte grpTNP :2;
byte :1;
} MergedBits;
} SCI0BDHSTR;
#define SCI0BDH _SCI0BD.Overlap_STR.SCI0ASR1STR.Byte
#define SCI0BDH_SBR8 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.SBR8
#define SCI0BDH_SBR9 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.SBR9
#define SCI0BDH_SBR10 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.SBR10
#define SCI0BDH_SBR11 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.SBR11
#define SCI0BDH_SBR12 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.SBR12
#define SCI0BDH_TNP0 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.TNP0
#define SCI0BDH_TNP1 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.TNP1
#define SCI0BDH_IREN _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.Bits.IREN
#define SCI0BDH_SBR_8 _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.MergedBits.grpSBR_8
#define SCI0BDH_TNP _SCI0BD.Overlap_STR.SCI0ASR1STR.SameAddr_STR.SCI0BDHSTR.MergedBits.grpTNP
#define SCI0BDH_SBR SCI0BDH_SBR_8
#define SCI0BDH_SBR8_MASK 0x01U
#define SCI0BDH_SBR9_MASK 0x02U
#define SCI0BDH_SBR10_MASK 0x04U
#define SCI0BDH_SBR11_MASK 0x08U
#define SCI0BDH_SBR12_MASK 0x10U
#define SCI0BDH_TNP0_MASK 0x20U
#define SCI0BDH_TNP1_MASK 0x40U
#define SCI0BDH_IREN_MASK 0x80U
#define SCI0BDH_SBR_8_MASK 0x1FU
#define SCI0BDH_SBR_8_BITNUM 0x00U
#define SCI0BDH_TNP_MASK 0x60U
#define SCI0BDH_TNP_BITNUM 0x05U
} SameAddr_STR; /*Several registers at the same address */
} SCI0ASR1STR;
/*** SCI0ACR1 - SCI 0 Alternative Control Register 1; 0x000000C9 ***/
union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI0ACR1 - SCI 0 Alternative Control Register 1; Several registers at the same address ***/
union {
struct {
byte BKDIE :1; /* Break Detect Interrupt Enable */
byte BERRIE :1; /* Bit Error Interrupt Enable */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte RXEDGIE :1; /* Receive Input Active Edge Interrupt Enable */
} Bits;
} SCI0ACR1STR;
#define SCI0ACR1 _SCI0BD.Overlap_STR.SCI0ACR1STR.Byte
#define SCI0ACR1_BKDIE _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0ACR1STR.Bits.BKDIE
#define SCI0ACR1_BERRIE _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0ACR1STR.Bits.BERRIE
#define SCI0ACR1_RXEDGIE _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0ACR1STR.Bits.RXEDGIE
#define SCI0ACR1_BKDIE_MASK 0x01U
#define SCI0ACR1_BERRIE_MASK 0x02U
#define SCI0ACR1_RXEDGIE_MASK 0x80U
/*** SCI0BDL - SCI 0 Baud Rate Register Low; Several registers at the same address ***/
union {
struct {
byte SBR0 :1; /* SCI Baud Rate Bit 0 */
byte SBR1 :1; /* SCI Baud Rate Bit 1 */
byte SBR2 :1; /* SCI Baud Rate Bit 2 */
byte SBR3 :1; /* SCI Baud Rate Bit 3 */
byte SBR4 :1; /* SCI Baud Rate Bit 4 */
byte SBR5 :1; /* SCI Baud Rate Bit 5 */
byte SBR6 :1; /* SCI Baud Rate Bit 6 */
byte SBR7 :1; /* SCI Baud Rate Bit 7 */
} Bits;
} SCI0BDLSTR;
#define SCI0BDL _SCI0BD.Overlap_STR.SCI0ACR1STR.Byte
#define SCI0BDL_SBR0 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR0
#define SCI0BDL_SBR1 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR1
#define SCI0BDL_SBR2 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR2
#define SCI0BDL_SBR3 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR3
#define SCI0BDL_SBR4 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR4
#define SCI0BDL_SBR5 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR5
#define SCI0BDL_SBR6 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR6
#define SCI0BDL_SBR7 _SCI0BD.Overlap_STR.SCI0ACR1STR.SameAddr_STR.SCI0BDLSTR.Bits.SBR7
#define SCI0BDL_SBR0_MASK 0x01U
#define SCI0BDL_SBR1_MASK 0x02U
#define SCI0BDL_SBR2_MASK 0x04U
#define SCI0BDL_SBR3_MASK 0x08U
#define SCI0BDL_SBR4_MASK 0x10U
#define SCI0BDL_SBR5_MASK 0x20U
#define SCI0BDL_SBR6_MASK 0x40U
#define SCI0BDL_SBR7_MASK 0x80U
} SameAddr_STR; /*Several registers at the same address */
} SCI0ACR1STR;
} Overlap_STR;
struct {
word SBR0 :1; /* SCI Baud Rate Bit 0 */
word SBR1 :1; /* SCI Baud Rate Bit 1 */
word SBR2 :1; /* SCI Baud Rate Bit 2 */
word SBR3 :1; /* SCI Baud Rate Bit 3 */
word SBR4 :1; /* SCI Baud Rate Bit 4 */
word SBR5 :1; /* SCI Baud Rate Bit 5 */
word SBR6 :1; /* SCI Baud Rate Bit 6 */
word SBR7 :1; /* SCI Baud Rate Bit 7 */
word SBR8 :1; /* SCI Baud Rate Bit 8 */
word SBR9 :1; /* SCI Baud Rate Bit 9 */
word SBR10 :1; /* SCI Baud Rate Bit 10 */
word SBR11 :1; /* SCI Baud Rate Bit 11 */
word SBR12 :1; /* SCI Baud Rate Bit 12 */
word TNP0 :1; /* Transmitter Narrow Pulse Bit 0 */
word TNP1 :1; /* Transmitter Narrow Pulse Bit 1 */
word IREN :1; /* Infrared Enable Bit */
} Bits;
struct {
word grpSBR :13;
word grpTNP :2;
word :1;
} MergedBits;
} SCI0BDSTR;
extern volatile SCI0BDSTR _SCI0BD @(REG_BASE + 0x000000C8UL);
#define SCI0BD _SCI0BD.Word
#define SCI0BD_SBR0 _SCI0BD.Bits.SBR0
#define SCI0BD_SBR1 _SCI0BD.Bits.SBR1
#define SCI0BD_SBR2 _SCI0BD.Bits.SBR2
#define SCI0BD_SBR3 _SCI0BD.Bits.SBR3
#define SCI0BD_SBR4 _SCI0BD.Bits.SBR4
#define SCI0BD_SBR5 _SCI0BD.Bits.SBR5
#define SCI0BD_SBR6 _SCI0BD.Bits.SBR6
#define SCI0BD_SBR7 _SCI0BD.Bits.SBR7
#define SCI0BD_SBR8 _SCI0BD.Bits.SBR8
#define SCI0BD_SBR9 _SCI0BD.Bits.SBR9
#define SCI0BD_SBR10 _SCI0BD.Bits.SBR10
#define SCI0BD_SBR11 _SCI0BD.Bits.SBR11
#define SCI0BD_SBR12 _SCI0BD.Bits.SBR12
#define SCI0BD_TNP0 _SCI0BD.Bits.TNP0
#define SCI0BD_TNP1 _SCI0BD.Bits.TNP1
#define SCI0BD_IREN _SCI0BD.Bits.IREN
#define SCI0BD_SBR _SCI0BD.MergedBits.grpSBR
#define SCI0BD_TNP _SCI0BD.MergedBits.grpTNP
#define SCI0BD_SBR0_MASK 0x01U
#define SCI0BD_SBR1_MASK 0x02U
#define SCI0BD_SBR2_MASK 0x04U
#define SCI0BD_SBR3_MASK 0x08U
#define SCI0BD_SBR4_MASK 0x10U
#define SCI0BD_SBR5_MASK 0x20U
#define SCI0BD_SBR6_MASK 0x40U
#define SCI0BD_SBR7_MASK 0x80U
#define SCI0BD_SBR8_MASK 0x0100U
#define SCI0BD_SBR9_MASK 0x0200U
#define SCI0BD_SBR10_MASK 0x0400U
#define SCI0BD_SBR11_MASK 0x0800U
#define SCI0BD_SBR12_MASK 0x1000U
#define SCI0BD_TNP0_MASK 0x2000U
#define SCI0BD_TNP1_MASK 0x4000U
#define SCI0BD_IREN_MASK 0x8000U
#define SCI0BD_SBR_MASK 0x1FFFU
#define SCI0BD_SBR_BITNUM 0x00U
#define SCI0BD_TNP_MASK 0x6000U
#define SCI0BD_TNP_BITNUM 0x0DU
/*** SCI0ACR2 - SCI 0 Alternative Control Register 2; 0x000000CA ***/
typedef union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI0ACR2 - SCI 0 Alternative Control Register 2; Several registers at the same address ***/
union {
struct {
byte BKDFE :1; /* Break Detect Feature Enable */
byte BERRM0 :1; /* Bit Error Mode 0 */
byte BERRM1 :1; /* Bit Error Mode 1 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte :1;
byte grpBERRM :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} SCI0ACR2STR;
#define SCI0ACR2 _SCI0ACR2.Byte
#define SCI0ACR2_BKDFE _SCI0ACR2.SameAddr_STR.SCI0ACR2STR.Bits.BKDFE
#define SCI0ACR2_BERRM0 _SCI0ACR2.SameAddr_STR.SCI0ACR2STR.Bits.BERRM0
#define SCI0ACR2_BERRM1 _SCI0ACR2.SameAddr_STR.SCI0ACR2STR.Bits.BERRM1
#define SCI0ACR2_BERRM _SCI0ACR2.SameAddr_STR.SCI0ACR2STR.MergedBits.grpBERRM
#define SCI0ACR2_BKDFE_MASK 0x01U
#define SCI0ACR2_BERRM0_MASK 0x02U
#define SCI0ACR2_BERRM1_MASK 0x04U
#define SCI0ACR2_BERRM_MASK 0x06U
#define SCI0ACR2_BERRM_BITNUM 0x01U
/*** SCI0CR1 - SCI 0 Control Register 1; Several registers at the same address ***/
union {
struct {
byte PT :1; /* Parity Type Bit */
byte PE :1; /* Parity Enable Bit */
byte ILT :1; /* Idle Line Type Bit */
byte WAKE :1; /* Wakeup Condition Bit */
byte M :1; /* Data Format Mode Bit */
byte RSRC :1; /* Receiver Source Bit */
byte SCISWAI :1; /* SCI Stop in Wait Mode Bit */
byte LOOPS :1; /* Loop Select Bit */
} Bits;
} SCI0CR1STR;
#define SCI0CR1 _SCI0ACR2.Byte
#define SCI0CR1_PT _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.PT
#define SCI0CR1_PE _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.PE
#define SCI0CR1_ILT _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.ILT
#define SCI0CR1_WAKE _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.WAKE
#define SCI0CR1_M _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.M
#define SCI0CR1_RSRC _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.RSRC
#define SCI0CR1_SCISWAI _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.SCISWAI
#define SCI0CR1_LOOPS _SCI0ACR2.SameAddr_STR.SCI0CR1STR.Bits.LOOPS
#define SCI0CR1_PT_MASK 0x01U
#define SCI0CR1_PE_MASK 0x02U
#define SCI0CR1_ILT_MASK 0x04U
#define SCI0CR1_WAKE_MASK 0x08U
#define SCI0CR1_M_MASK 0x10U
#define SCI0CR1_RSRC_MASK 0x20U
#define SCI0CR1_SCISWAI_MASK 0x40U
#define SCI0CR1_LOOPS_MASK 0x80U
} SameAddr_STR; /*Several registers at the same address */
} SCI0ACR2STR;
extern volatile SCI0ACR2STR _SCI0ACR2 @(REG_BASE + 0x000000CAUL);
/*** SCI0CR2 - SCI 0 Control Register 2; 0x000000CB ***/
typedef union {
byte Byte;
struct {
byte SBK :1; /* Send Break Bit */
byte RWU :1; /* Receiver Wakeup Bit */
byte RE :1; /* Receiver Enable Bit */
byte TE :1; /* Transmitter Enable Bit */
byte ILIE :1; /* Idle Line Interrupt Enable Bit */
byte RIE :1; /* Receiver Full Interrupt Enable Bit */
byte TCIE :1; /* Transmission Complete Interrupt Enable Bit */
byte TIE_bit :1; /* Transmitter Interrupt Enable Bit */ /*Warning: bit name is duplicated with register name*/
} Bits;
} SCI0CR2STR;
extern volatile SCI0CR2STR _SCI0CR2 @(REG_BASE + 0x000000CBUL);
#define SCI0CR2 _SCI0CR2.Byte
#define SCI0CR2_SBK _SCI0CR2.Bits.SBK
#define SCI0CR2_RWU _SCI0CR2.Bits.RWU
#define SCI0CR2_RE _SCI0CR2.Bits.RE
#define SCI0CR2_TE _SCI0CR2.Bits.TE
#define SCI0CR2_ILIE _SCI0CR2.Bits.ILIE
#define SCI0CR2_RIE _SCI0CR2.Bits.RIE
#define SCI0CR2_TCIE _SCI0CR2.Bits.TCIE
#define SCI0CR2_TIE _SCI0CR2.Bits.TIE_bit
#define SCI0CR2_SBK_MASK 0x01U
#define SCI0CR2_RWU_MASK 0x02U
#define SCI0CR2_RE_MASK 0x04U
#define SCI0CR2_TE_MASK 0x08U
#define SCI0CR2_ILIE_MASK 0x10U
#define SCI0CR2_RIE_MASK 0x20U
#define SCI0CR2_TCIE_MASK 0x40U
#define SCI0CR2_TIE_MASK 0x80U
/*** SCI0SR1 - SCI 0 Status Register 1; 0x000000CC ***/
typedef union {
byte Byte;
struct {
byte PF :1; /* Parity Error Flag */
byte FE :1; /* Framing Error Flag */
byte NF :1; /* Noise Flag */
byte OR :1; /* Overrun Flag */
byte IDLE :1; /* Idle Line Flag */
byte RDRF :1; /* Receive Data Register Full Flag */
byte TC :1; /* Transmit Complete Flag */
byte TDRE :1; /* Transmit Data Register Empty Flag */
} Bits;
} SCI0SR1STR;
extern volatile SCI0SR1STR _SCI0SR1 @(REG_BASE + 0x000000CCUL);
#define SCI0SR1 _SCI0SR1.Byte
#define SCI0SR1_PF _SCI0SR1.Bits.PF
#define SCI0SR1_FE _SCI0SR1.Bits.FE
#define SCI0SR1_NF _SCI0SR1.Bits.NF
#define SCI0SR1_OR _SCI0SR1.Bits.OR
#define SCI0SR1_IDLE _SCI0SR1.Bits.IDLE
#define SCI0SR1_RDRF _SCI0SR1.Bits.RDRF
#define SCI0SR1_TC _SCI0SR1.Bits.TC
#define SCI0SR1_TDRE _SCI0SR1.Bits.TDRE
#define SCI0SR1_PF_MASK 0x01U
#define SCI0SR1_FE_MASK 0x02U
#define SCI0SR1_NF_MASK 0x04U
#define SCI0SR1_OR_MASK 0x08U
#define SCI0SR1_IDLE_MASK 0x10U
#define SCI0SR1_RDRF_MASK 0x20U
#define SCI0SR1_TC_MASK 0x40U
#define SCI0SR1_TDRE_MASK 0x80U
/*** SCI0SR2 - SCI 0 Status Register 2; 0x000000CD ***/
typedef union {
byte Byte;
struct {
byte RAF :1; /* Receiver Active Flag */
byte TXDIR :1; /* Transmitter pin data direction in Single-Wire mode */
byte BRK13 :1; /* Break Transmit character length */
byte RXPOL :1; /* Receive Polarity */
byte TXPOL :1; /* Transmit Polarity */
byte :1;
byte :1;
byte AMAP :1; /* Alternative Map */
} Bits;
} SCI0SR2STR;
extern volatile SCI0SR2STR _SCI0SR2 @(REG_BASE + 0x000000CDUL);
#define SCI0SR2 _SCI0SR2.Byte
#define SCI0SR2_RAF _SCI0SR2.Bits.RAF
#define SCI0SR2_TXDIR _SCI0SR2.Bits.TXDIR
#define SCI0SR2_BRK13 _SCI0SR2.Bits.BRK13
#define SCI0SR2_RXPOL _SCI0SR2.Bits.RXPOL
#define SCI0SR2_TXPOL _SCI0SR2.Bits.TXPOL
#define SCI0SR2_AMAP _SCI0SR2.Bits.AMAP
#define SCI0SR2_RAF_MASK 0x01U
#define SCI0SR2_TXDIR_MASK 0x02U
#define SCI0SR2_BRK13_MASK 0x04U
#define SCI0SR2_RXPOL_MASK 0x08U
#define SCI0SR2_TXPOL_MASK 0x10U
#define SCI0SR2_AMAP_MASK 0x80U
/*** SCI0DRH - SCI 0 Data Register High; 0x000000CE ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte T8 :1; /* Transmit Bit 8 */
byte R8 :1; /* Received Bit 8 */
} Bits;
} SCI0DRHSTR;
extern volatile SCI0DRHSTR _SCI0DRH @(REG_BASE + 0x000000CEUL);
#define SCI0DRH _SCI0DRH.Byte
#define SCI0DRH_T8 _SCI0DRH.Bits.T8
#define SCI0DRH_R8 _SCI0DRH.Bits.R8
#define SCI0DRH_T8_MASK 0x40U
#define SCI0DRH_R8_MASK 0x80U
/*** SCI0DRL - SCI 0 Data Register Low; 0x000000CF ***/
typedef union {
byte Byte;
struct {
byte R0_T0 :1; /* Received bit 0 or Transmit bit 0 */
byte R1_T1 :1; /* Received bit 1 or Transmit bit 1 */
byte R2_T2 :1; /* Received bit 2 or Transmit bit 2 */
byte R3_T3 :1; /* Received bit 3 or Transmit bit 3 */
byte R4_T4 :1; /* Received bit 4 or Transmit bit 4 */
byte R5_T5 :1; /* Received bit 5 or Transmit bit 5 */
byte R6_T6 :1; /* Received bit 6 or Transmit bit 6 */
byte R7_T7 :1; /* Received bit 7 or Transmit bit 7 */
} Bits;
} SCI0DRLSTR;
extern volatile SCI0DRLSTR _SCI0DRL @(REG_BASE + 0x000000CFUL);
#define SCI0DRL _SCI0DRL.Byte
#define SCI0DRL_R0_T0 _SCI0DRL.Bits.R0_T0
#define SCI0DRL_R1_T1 _SCI0DRL.Bits.R1_T1
#define SCI0DRL_R2_T2 _SCI0DRL.Bits.R2_T2
#define SCI0DRL_R3_T3 _SCI0DRL.Bits.R3_T3
#define SCI0DRL_R4_T4 _SCI0DRL.Bits.R4_T4
#define SCI0DRL_R5_T5 _SCI0DRL.Bits.R5_T5
#define SCI0DRL_R6_T6 _SCI0DRL.Bits.R6_T6
#define SCI0DRL_R7_T7 _SCI0DRL.Bits.R7_T7
#define SCI0DRL_R0_T0_MASK 0x01U
#define SCI0DRL_R1_T1_MASK 0x02U
#define SCI0DRL_R2_T2_MASK 0x04U
#define SCI0DRL_R3_T3_MASK 0x08U
#define SCI0DRL_R4_T4_MASK 0x10U
#define SCI0DRL_R5_T5_MASK 0x20U
#define SCI0DRL_R6_T6_MASK 0x40U
#define SCI0DRL_R7_T7_MASK 0x80U
/*** SCI1BD - SCI 1 Baud Rate Register; 0x000000D0 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** SCI1ASR1 - SCI 1 Alternative Status Register 1; 0x000000D0 ***/
union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI1ASR1 - SCI 1 Alternative Status Register 1; Several registers at the same address ***/
union {
struct {
byte BKDIF :1; /* Break Detect Interrupt Flag */
byte BERRIF :1; /* Bit Error Interrupt Flag */
byte BERRV :1; /* Bit Error Value */
byte :1;
byte :1;
byte :1;
byte :1;
byte RXEDGIF :1; /* Receive Input Active Edge Interrupt Flag */
} Bits;
} SCI1ASR1STR;
#define SCI1ASR1 _SCI1BD.Overlap_STR.SCI1ASR1STR.Byte
#define SCI1ASR1_BKDIF _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1ASR1STR.Bits.BKDIF
#define SCI1ASR1_BERRIF _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1ASR1STR.Bits.BERRIF
#define SCI1ASR1_BERRV _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1ASR1STR.Bits.BERRV
#define SCI1ASR1_RXEDGIF _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1ASR1STR.Bits.RXEDGIF
#define SCI1ASR1_BKDIF_MASK 0x01U
#define SCI1ASR1_BERRIF_MASK 0x02U
#define SCI1ASR1_BERRV_MASK 0x04U
#define SCI1ASR1_RXEDGIF_MASK 0x80U
/*** SCI1BDH - SCI 1 Baud Rate Register High; Several registers at the same address ***/
union {
struct {
byte SBR8 :1; /* SCI Baud Rate Bit 8 */
byte SBR9 :1; /* SCI Baud Rate Bit 9 */
byte SBR10 :1; /* SCI Baud Rate Bit 10 */
byte SBR11 :1; /* SCI Baud Rate Bit 11 */
byte SBR12 :1; /* SCI Baud Rate Bit 12 */
byte TNP0 :1; /* Transmitter Narrow Pulse Bit 0 */
byte TNP1 :1; /* Transmitter Narrow Pulse Bit 1 */
byte IREN :1; /* Infrared Enable Bit */
} Bits;
struct {
byte grpSBR_8 :5;
byte grpTNP :2;
byte :1;
} MergedBits;
} SCI1BDHSTR;
#define SCI1BDH _SCI1BD.Overlap_STR.SCI1ASR1STR.Byte
#define SCI1BDH_SBR8 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.SBR8
#define SCI1BDH_SBR9 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.SBR9
#define SCI1BDH_SBR10 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.SBR10
#define SCI1BDH_SBR11 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.SBR11
#define SCI1BDH_SBR12 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.SBR12
#define SCI1BDH_TNP0 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.TNP0
#define SCI1BDH_TNP1 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.TNP1
#define SCI1BDH_IREN _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.Bits.IREN
#define SCI1BDH_SBR_8 _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.MergedBits.grpSBR_8
#define SCI1BDH_TNP _SCI1BD.Overlap_STR.SCI1ASR1STR.SameAddr_STR.SCI1BDHSTR.MergedBits.grpTNP
#define SCI1BDH_SBR SCI1BDH_SBR_8
#define SCI1BDH_SBR8_MASK 0x01U
#define SCI1BDH_SBR9_MASK 0x02U
#define SCI1BDH_SBR10_MASK 0x04U
#define SCI1BDH_SBR11_MASK 0x08U
#define SCI1BDH_SBR12_MASK 0x10U
#define SCI1BDH_TNP0_MASK 0x20U
#define SCI1BDH_TNP1_MASK 0x40U
#define SCI1BDH_IREN_MASK 0x80U
#define SCI1BDH_SBR_8_MASK 0x1FU
#define SCI1BDH_SBR_8_BITNUM 0x00U
#define SCI1BDH_TNP_MASK 0x60U
#define SCI1BDH_TNP_BITNUM 0x05U
} SameAddr_STR; /*Several registers at the same address */
} SCI1ASR1STR;
/*** SCI1ACR1 - SCI 1 Alternative Control Register 1; 0x000000D1 ***/
union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI1ACR1 - SCI 1 Alternative Control Register 1; Several registers at the same address ***/
union {
struct {
byte BKDIE :1; /* Break Detect Interrupt Enable */
byte BERRIE :1; /* Bit Error Interrupt Enable */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte RXEDGIE :1; /* Receive Input Active Edge Interrupt Enable */
} Bits;
} SCI1ACR1STR;
#define SCI1ACR1 _SCI1BD.Overlap_STR.SCI1ACR1STR.Byte
#define SCI1ACR1_BKDIE _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1ACR1STR.Bits.BKDIE
#define SCI1ACR1_BERRIE _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1ACR1STR.Bits.BERRIE
#define SCI1ACR1_RXEDGIE _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1ACR1STR.Bits.RXEDGIE
#define SCI1ACR1_BKDIE_MASK 0x01U
#define SCI1ACR1_BERRIE_MASK 0x02U
#define SCI1ACR1_RXEDGIE_MASK 0x80U
/*** SCI1BDL - SCI 1 Baud Rate Register Low; Several registers at the same address ***/
union {
struct {
byte SBR0 :1; /* SCI Baud Rate Bit 0 */
byte SBR1 :1; /* SCI Baud Rate Bit 1 */
byte SBR2 :1; /* SCI Baud Rate Bit 2 */
byte SBR3 :1; /* SCI Baud Rate Bit 3 */
byte SBR4 :1; /* SCI Baud Rate Bit 4 */
byte SBR5 :1; /* SCI Baud Rate Bit 5 */
byte SBR6 :1; /* SCI Baud Rate Bit 6 */
byte SBR7 :1; /* SCI Baud Rate Bit 7 */
} Bits;
} SCI1BDLSTR;
#define SCI1BDL _SCI1BD.Overlap_STR.SCI1ACR1STR.Byte
#define SCI1BDL_SBR0 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR0
#define SCI1BDL_SBR1 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR1
#define SCI1BDL_SBR2 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR2
#define SCI1BDL_SBR3 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR3
#define SCI1BDL_SBR4 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR4
#define SCI1BDL_SBR5 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR5
#define SCI1BDL_SBR6 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR6
#define SCI1BDL_SBR7 _SCI1BD.Overlap_STR.SCI1ACR1STR.SameAddr_STR.SCI1BDLSTR.Bits.SBR7
#define SCI1BDL_SBR0_MASK 0x01U
#define SCI1BDL_SBR1_MASK 0x02U
#define SCI1BDL_SBR2_MASK 0x04U
#define SCI1BDL_SBR3_MASK 0x08U
#define SCI1BDL_SBR4_MASK 0x10U
#define SCI1BDL_SBR5_MASK 0x20U
#define SCI1BDL_SBR6_MASK 0x40U
#define SCI1BDL_SBR7_MASK 0x80U
} SameAddr_STR; /*Several registers at the same address */
} SCI1ACR1STR;
} Overlap_STR;
struct {
word SBR0 :1; /* SCI Baud Rate Bit 0 */
word SBR1 :1; /* SCI Baud Rate Bit 1 */
word SBR2 :1; /* SCI Baud Rate Bit 2 */
word SBR3 :1; /* SCI Baud Rate Bit 3 */
word SBR4 :1; /* SCI Baud Rate Bit 4 */
word SBR5 :1; /* SCI Baud Rate Bit 5 */
word SBR6 :1; /* SCI Baud Rate Bit 6 */
word SBR7 :1; /* SCI Baud Rate Bit 7 */
word SBR8 :1; /* SCI Baud Rate Bit 8 */
word SBR9 :1; /* SCI Baud Rate Bit 9 */
word SBR10 :1; /* SCI Baud Rate Bit 10 */
word SBR11 :1; /* SCI Baud Rate Bit 11 */
word SBR12 :1; /* SCI Baud Rate Bit 12 */
word TNP0 :1; /* Transmitter Narrow Pulse Bit 0 */
word TNP1 :1; /* Transmitter Narrow Pulse Bit 1 */
word IREN :1; /* Infrared Enable Bit */
} Bits;
struct {
word grpSBR :13;
word grpTNP :2;
word :1;
} MergedBits;
} SCI1BDSTR;
extern volatile SCI1BDSTR _SCI1BD @(REG_BASE + 0x000000D0UL);
#define SCI1BD _SCI1BD.Word
#define SCI1BD_SBR0 _SCI1BD.Bits.SBR0
#define SCI1BD_SBR1 _SCI1BD.Bits.SBR1
#define SCI1BD_SBR2 _SCI1BD.Bits.SBR2
#define SCI1BD_SBR3 _SCI1BD.Bits.SBR3
#define SCI1BD_SBR4 _SCI1BD.Bits.SBR4
#define SCI1BD_SBR5 _SCI1BD.Bits.SBR5
#define SCI1BD_SBR6 _SCI1BD.Bits.SBR6
#define SCI1BD_SBR7 _SCI1BD.Bits.SBR7
#define SCI1BD_SBR8 _SCI1BD.Bits.SBR8
#define SCI1BD_SBR9 _SCI1BD.Bits.SBR9
#define SCI1BD_SBR10 _SCI1BD.Bits.SBR10
#define SCI1BD_SBR11 _SCI1BD.Bits.SBR11
#define SCI1BD_SBR12 _SCI1BD.Bits.SBR12
#define SCI1BD_TNP0 _SCI1BD.Bits.TNP0
#define SCI1BD_TNP1 _SCI1BD.Bits.TNP1
#define SCI1BD_IREN _SCI1BD.Bits.IREN
#define SCI1BD_SBR _SCI1BD.MergedBits.grpSBR
#define SCI1BD_TNP _SCI1BD.MergedBits.grpTNP
#define SCI1BD_SBR0_MASK 0x01U
#define SCI1BD_SBR1_MASK 0x02U
#define SCI1BD_SBR2_MASK 0x04U
#define SCI1BD_SBR3_MASK 0x08U
#define SCI1BD_SBR4_MASK 0x10U
#define SCI1BD_SBR5_MASK 0x20U
#define SCI1BD_SBR6_MASK 0x40U
#define SCI1BD_SBR7_MASK 0x80U
#define SCI1BD_SBR8_MASK 0x0100U
#define SCI1BD_SBR9_MASK 0x0200U
#define SCI1BD_SBR10_MASK 0x0400U
#define SCI1BD_SBR11_MASK 0x0800U
#define SCI1BD_SBR12_MASK 0x1000U
#define SCI1BD_TNP0_MASK 0x2000U
#define SCI1BD_TNP1_MASK 0x4000U
#define SCI1BD_IREN_MASK 0x8000U
#define SCI1BD_SBR_MASK 0x1FFFU
#define SCI1BD_SBR_BITNUM 0x00U
#define SCI1BD_TNP_MASK 0x6000U
#define SCI1BD_TNP_BITNUM 0x0DU
/*** SCI1ACR2 - SCI 1 Alternative Control Register 2; 0x000000D2 ***/
typedef union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI1ACR2 - SCI 1 Alternative Control Register 2; Several registers at the same address ***/
union {
struct {
byte BKDFE :1; /* Break Detect Feature Enable */
byte BERRM0 :1; /* Bit Error Mode 0 */
byte BERRM1 :1; /* Bit Error Mode 1 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte :1;
byte grpBERRM :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} SCI1ACR2STR;
#define SCI1ACR2 _SCI1ACR2.Byte
#define SCI1ACR2_BKDFE _SCI1ACR2.SameAddr_STR.SCI1ACR2STR.Bits.BKDFE
#define SCI1ACR2_BERRM0 _SCI1ACR2.SameAddr_STR.SCI1ACR2STR.Bits.BERRM0
#define SCI1ACR2_BERRM1 _SCI1ACR2.SameAddr_STR.SCI1ACR2STR.Bits.BERRM1
#define SCI1ACR2_BERRM _SCI1ACR2.SameAddr_STR.SCI1ACR2STR.MergedBits.grpBERRM
#define SCI1ACR2_BKDFE_MASK 0x01U
#define SCI1ACR2_BERRM0_MASK 0x02U
#define SCI1ACR2_BERRM1_MASK 0x04U
#define SCI1ACR2_BERRM_MASK 0x06U
#define SCI1ACR2_BERRM_BITNUM 0x01U
/*** SCI1CR1 - SCI 1 Control Register 1; Several registers at the same address ***/
union {
struct {
byte PT :1; /* Parity Type Bit */
byte PE :1; /* Parity Enable Bit */
byte ILT :1; /* Idle Line Type Bit */
byte WAKE :1; /* Wakeup Condition Bit */
byte M :1; /* Data Format Mode Bit */
byte RSRC :1; /* Receiver Source Bit */
byte SCISWAI :1; /* SCI Stop in Wait Mode Bit */
byte LOOPS :1; /* Loop Select Bit */
} Bits;
} SCI1CR1STR;
#define SCI1CR1 _SCI1ACR2.Byte
#define SCI1CR1_PT _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.PT
#define SCI1CR1_PE _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.PE
#define SCI1CR1_ILT _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.ILT
#define SCI1CR1_WAKE _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.WAKE
#define SCI1CR1_M _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.M
#define SCI1CR1_RSRC _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.RSRC
#define SCI1CR1_SCISWAI _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.SCISWAI
#define SCI1CR1_LOOPS _SCI1ACR2.SameAddr_STR.SCI1CR1STR.Bits.LOOPS
#define SCI1CR1_PT_MASK 0x01U
#define SCI1CR1_PE_MASK 0x02U
#define SCI1CR1_ILT_MASK 0x04U
#define SCI1CR1_WAKE_MASK 0x08U
#define SCI1CR1_M_MASK 0x10U
#define SCI1CR1_RSRC_MASK 0x20U
#define SCI1CR1_SCISWAI_MASK 0x40U
#define SCI1CR1_LOOPS_MASK 0x80U
} SameAddr_STR; /*Several registers at the same address */
} SCI1ACR2STR;
extern volatile SCI1ACR2STR _SCI1ACR2 @(REG_BASE + 0x000000D2UL);
/*** SCI1CR2 - SCI 1 Control Register 2; 0x000000D3 ***/
typedef union {
byte Byte;
struct {
byte SBK :1; /* Send Break Bit */
byte RWU :1; /* Receiver Wakeup Bit */
byte RE :1; /* Receiver Enable Bit */
byte TE :1; /* Transmitter Enable Bit */
byte ILIE :1; /* Idle Line Interrupt Enable Bit */
byte RIE :1; /* Receiver Full Interrupt Enable Bit */
byte TCIE :1; /* Transmission Complete Interrupt Enable Bit */
byte TIE_bit :1; /* Transmitter Interrupt Enable Bit */ /*Warning: bit name is duplicated with register name*/
} Bits;
} SCI1CR2STR;
extern volatile SCI1CR2STR _SCI1CR2 @(REG_BASE + 0x000000D3UL);
#define SCI1CR2 _SCI1CR2.Byte
#define SCI1CR2_SBK _SCI1CR2.Bits.SBK
#define SCI1CR2_RWU _SCI1CR2.Bits.RWU
#define SCI1CR2_RE _SCI1CR2.Bits.RE
#define SCI1CR2_TE _SCI1CR2.Bits.TE
#define SCI1CR2_ILIE _SCI1CR2.Bits.ILIE
#define SCI1CR2_RIE _SCI1CR2.Bits.RIE
#define SCI1CR2_TCIE _SCI1CR2.Bits.TCIE
#define SCI1CR2_TIE _SCI1CR2.Bits.TIE_bit
#define SCI1CR2_SBK_MASK 0x01U
#define SCI1CR2_RWU_MASK 0x02U
#define SCI1CR2_RE_MASK 0x04U
#define SCI1CR2_TE_MASK 0x08U
#define SCI1CR2_ILIE_MASK 0x10U
#define SCI1CR2_RIE_MASK 0x20U
#define SCI1CR2_TCIE_MASK 0x40U
#define SCI1CR2_TIE_MASK 0x80U
/*** SCI1SR1 - SCI 1 Status Register 1; 0x000000D4 ***/
typedef union {
byte Byte;
struct {
byte PF :1; /* Parity Error Flag */
byte FE :1; /* Framing Error Flag */
byte NF :1; /* Noise Flag */
byte OR :1; /* Overrun Flag */
byte IDLE :1; /* Idle Line Flag */
byte RDRF :1; /* Receive Data Register Full Flag */
byte TC :1; /* Transmit Complete Flag */
byte TDRE :1; /* Transmit Data Register Empty Flag */
} Bits;
} SCI1SR1STR;
extern volatile SCI1SR1STR _SCI1SR1 @(REG_BASE + 0x000000D4UL);
#define SCI1SR1 _SCI1SR1.Byte
#define SCI1SR1_PF _SCI1SR1.Bits.PF
#define SCI1SR1_FE _SCI1SR1.Bits.FE
#define SCI1SR1_NF _SCI1SR1.Bits.NF
#define SCI1SR1_OR _SCI1SR1.Bits.OR
#define SCI1SR1_IDLE _SCI1SR1.Bits.IDLE
#define SCI1SR1_RDRF _SCI1SR1.Bits.RDRF
#define SCI1SR1_TC _SCI1SR1.Bits.TC
#define SCI1SR1_TDRE _SCI1SR1.Bits.TDRE
#define SCI1SR1_PF_MASK 0x01U
#define SCI1SR1_FE_MASK 0x02U
#define SCI1SR1_NF_MASK 0x04U
#define SCI1SR1_OR_MASK 0x08U
#define SCI1SR1_IDLE_MASK 0x10U
#define SCI1SR1_RDRF_MASK 0x20U
#define SCI1SR1_TC_MASK 0x40U
#define SCI1SR1_TDRE_MASK 0x80U
/*** SCI1SR2 - SCI 1 Status Register 2; 0x000000D5 ***/
typedef union {
byte Byte;
struct {
byte RAF :1; /* Receiver Active Flag */
byte TXDIR :1; /* Transmitter pin data direction in Single-Wire mode */
byte BRK13 :1; /* Break Transmit character length */
byte RXPOL :1; /* Receive Polarity */
byte TXPOL :1; /* Transmit Polarity */
byte :1;
byte :1;
byte AMAP :1; /* Alternative Map */
} Bits;
} SCI1SR2STR;
extern volatile SCI1SR2STR _SCI1SR2 @(REG_BASE + 0x000000D5UL);
#define SCI1SR2 _SCI1SR2.Byte
#define SCI1SR2_RAF _SCI1SR2.Bits.RAF
#define SCI1SR2_TXDIR _SCI1SR2.Bits.TXDIR
#define SCI1SR2_BRK13 _SCI1SR2.Bits.BRK13
#define SCI1SR2_RXPOL _SCI1SR2.Bits.RXPOL
#define SCI1SR2_TXPOL _SCI1SR2.Bits.TXPOL
#define SCI1SR2_AMAP _SCI1SR2.Bits.AMAP
#define SCI1SR2_RAF_MASK 0x01U
#define SCI1SR2_TXDIR_MASK 0x02U
#define SCI1SR2_BRK13_MASK 0x04U
#define SCI1SR2_RXPOL_MASK 0x08U
#define SCI1SR2_TXPOL_MASK 0x10U
#define SCI1SR2_AMAP_MASK 0x80U
/*** SCI1DRH - SCI 1 Data Register High; 0x000000D6 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte T8 :1; /* Transmit Bit 8 */
byte R8 :1; /* Received Bit 8 */
} Bits;
} SCI1DRHSTR;
extern volatile SCI1DRHSTR _SCI1DRH @(REG_BASE + 0x000000D6UL);
#define SCI1DRH _SCI1DRH.Byte
#define SCI1DRH_T8 _SCI1DRH.Bits.T8
#define SCI1DRH_R8 _SCI1DRH.Bits.R8
#define SCI1DRH_T8_MASK 0x40U
#define SCI1DRH_R8_MASK 0x80U
/*** SCI1DRL - SCI 1 Data Register Low; 0x000000D7 ***/
typedef union {
byte Byte;
struct {
byte R0_T0 :1; /* Received bit 0 or Transmit bit 0 */
byte R1_T1 :1; /* Received bit 1 or Transmit bit 1 */
byte R2_T2 :1; /* Received bit 2 or Transmit bit 2 */
byte R3_T3 :1; /* Received bit 3 or Transmit bit 3 */
byte R4_T4 :1; /* Received bit 4 or Transmit bit 4 */
byte R5_T5 :1; /* Received bit 5 or Transmit bit 5 */
byte R6_T6 :1; /* Received bit 6 or Transmit bit 6 */
byte R7_T7 :1; /* Received bit 7 or Transmit bit 7 */
} Bits;
} SCI1DRLSTR;
extern volatile SCI1DRLSTR _SCI1DRL @(REG_BASE + 0x000000D7UL);
#define SCI1DRL _SCI1DRL.Byte
#define SCI1DRL_R0_T0 _SCI1DRL.Bits.R0_T0
#define SCI1DRL_R1_T1 _SCI1DRL.Bits.R1_T1
#define SCI1DRL_R2_T2 _SCI1DRL.Bits.R2_T2
#define SCI1DRL_R3_T3 _SCI1DRL.Bits.R3_T3
#define SCI1DRL_R4_T4 _SCI1DRL.Bits.R4_T4
#define SCI1DRL_R5_T5 _SCI1DRL.Bits.R5_T5
#define SCI1DRL_R6_T6 _SCI1DRL.Bits.R6_T6
#define SCI1DRL_R7_T7 _SCI1DRL.Bits.R7_T7
#define SCI1DRL_R0_T0_MASK 0x01U
#define SCI1DRL_R1_T1_MASK 0x02U
#define SCI1DRL_R2_T2_MASK 0x04U
#define SCI1DRL_R3_T3_MASK 0x08U
#define SCI1DRL_R4_T4_MASK 0x10U
#define SCI1DRL_R5_T5_MASK 0x20U
#define SCI1DRL_R6_T6_MASK 0x40U
#define SCI1DRL_R7_T7_MASK 0x80U
/*** SPI0CR1 - SPI 0 Control Register 1; 0x000000D8 ***/
typedef union {
byte Byte;
struct {
byte LSBFE :1; /* SPI LSB-First Enable */
byte SSOE :1; /* Slave Select Output Enable */
byte CPHA :1; /* SPI Clock Phase Bit */
byte CPOL :1; /* SPI Clock Polarity Bit */
byte MSTR :1; /* SPI Master/Slave Mode Select Bit */
byte SPTIE :1; /* SPI Transmit Interrupt Enable */
byte SPE :1; /* SPI System Enable Bit */
byte SPIE :1; /* SPI Interrupt Enable Bit */
} Bits;
} SPI0CR1STR;
extern volatile SPI0CR1STR _SPI0CR1 @(REG_BASE + 0x000000D8UL);
#define SPI0CR1 _SPI0CR1.Byte
#define SPI0CR1_LSBFE _SPI0CR1.Bits.LSBFE
#define SPI0CR1_SSOE _SPI0CR1.Bits.SSOE
#define SPI0CR1_CPHA _SPI0CR1.Bits.CPHA
#define SPI0CR1_CPOL _SPI0CR1.Bits.CPOL
#define SPI0CR1_MSTR _SPI0CR1.Bits.MSTR
#define SPI0CR1_SPTIE _SPI0CR1.Bits.SPTIE
#define SPI0CR1_SPE _SPI0CR1.Bits.SPE
#define SPI0CR1_SPIE _SPI0CR1.Bits.SPIE
#define SPI0CR1_LSBFE_MASK 0x01U
#define SPI0CR1_SSOE_MASK 0x02U
#define SPI0CR1_CPHA_MASK 0x04U
#define SPI0CR1_CPOL_MASK 0x08U
#define SPI0CR1_MSTR_MASK 0x10U
#define SPI0CR1_SPTIE_MASK 0x20U
#define SPI0CR1_SPE_MASK 0x40U
#define SPI0CR1_SPIE_MASK 0x80U
/*** SPI0CR2 - SPI 0 Control Register 2; 0x000000D9 ***/
typedef union {
byte Byte;
struct {
byte SPC0 :1; /* Serial Pin Control Bit 0 */
byte SPISWAI :1; /* SPI Stop in Wait Mode Bit */
byte :1;
byte BIDIROE :1; /* Output enable in the Bidirectional mode of operation */
byte MODFEN :1; /* Mode Fault Enable Bit */
byte :1;
byte XFRW :1; /* Transfer Width */
byte :1;
} Bits;
} SPI0CR2STR;
extern volatile SPI0CR2STR _SPI0CR2 @(REG_BASE + 0x000000D9UL);
#define SPI0CR2 _SPI0CR2.Byte
#define SPI0CR2_SPC0 _SPI0CR2.Bits.SPC0
#define SPI0CR2_SPISWAI _SPI0CR2.Bits.SPISWAI
#define SPI0CR2_BIDIROE _SPI0CR2.Bits.BIDIROE
#define SPI0CR2_MODFEN _SPI0CR2.Bits.MODFEN
#define SPI0CR2_XFRW _SPI0CR2.Bits.XFRW
#define SPI0CR2_SPC0_MASK 0x01U
#define SPI0CR2_SPISWAI_MASK 0x02U
#define SPI0CR2_BIDIROE_MASK 0x08U
#define SPI0CR2_MODFEN_MASK 0x10U
#define SPI0CR2_XFRW_MASK 0x40U
/*** SPI0BR - SPI 0 Baud Rate Register; 0x000000DA ***/
typedef union {
byte Byte;
struct {
byte SPR0 :1; /* SPI Baud Rate Selection Bit 0 */
byte SPR1 :1; /* SPI Baud Rate Selection Bit 1 */
byte SPR2 :1; /* SPI Baud Rate Selection Bit 2 */
byte :1;
byte SPPR0 :1; /* SPI Baud Rate Preselection Bits 0 */
byte SPPR1 :1; /* SPI Baud Rate Preselection Bits 1 */
byte SPPR2 :1; /* SPI Baud Rate Preselection Bits 2 */
byte :1;
} Bits;
struct {
byte grpSPR :3;
byte :1;
byte grpSPPR :3;
byte :1;
} MergedBits;
} SPI0BRSTR;
extern volatile SPI0BRSTR _SPI0BR @(REG_BASE + 0x000000DAUL);
#define SPI0BR _SPI0BR.Byte
#define SPI0BR_SPR0 _SPI0BR.Bits.SPR0
#define SPI0BR_SPR1 _SPI0BR.Bits.SPR1
#define SPI0BR_SPR2 _SPI0BR.Bits.SPR2
#define SPI0BR_SPPR0 _SPI0BR.Bits.SPPR0
#define SPI0BR_SPPR1 _SPI0BR.Bits.SPPR1
#define SPI0BR_SPPR2 _SPI0BR.Bits.SPPR2
#define SPI0BR_SPR _SPI0BR.MergedBits.grpSPR
#define SPI0BR_SPPR _SPI0BR.MergedBits.grpSPPR
#define SPI0BR_SPR0_MASK 0x01U
#define SPI0BR_SPR1_MASK 0x02U
#define SPI0BR_SPR2_MASK 0x04U
#define SPI0BR_SPPR0_MASK 0x10U
#define SPI0BR_SPPR1_MASK 0x20U
#define SPI0BR_SPPR2_MASK 0x40U
#define SPI0BR_SPR_MASK 0x07U
#define SPI0BR_SPR_BITNUM 0x00U
#define SPI0BR_SPPR_MASK 0x70U
#define SPI0BR_SPPR_BITNUM 0x04U
/*** SPI0SR - SPI 0 Status Register; 0x000000DB ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte MODF :1; /* Mode Fault Flag */
byte SPTEF :1; /* SPI Transmit Empty Interrupt Flag */
byte :1;
byte SPIF :1; /* SPIF Receive Interrupt Flag */
} Bits;
} SPI0SRSTR;
extern volatile SPI0SRSTR _SPI0SR @(REG_BASE + 0x000000DBUL);
#define SPI0SR _SPI0SR.Byte
#define SPI0SR_MODF _SPI0SR.Bits.MODF
#define SPI0SR_SPTEF _SPI0SR.Bits.SPTEF
#define SPI0SR_SPIF _SPI0SR.Bits.SPIF
#define SPI0SR_MODF_MASK 0x10U
#define SPI0SR_SPTEF_MASK 0x20U
#define SPI0SR_SPIF_MASK 0x80U
/*** SPI0DR - SPI 0 Data Register; 0x000000DC ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** SPI0DRH - SPI 0 Data Register High; 0x000000DC ***/
union {
byte Byte;
struct {
byte R8_T8 :1; /* SPI 0 Data Bit 8 */
byte R9_T9 :1; /* SPI 0 Data Bit 9 */
byte R10_T10 :1; /* SPI 0 Data Bit 10 */
byte R11_T11 :1; /* SPI 0 Data Bit 11 */
byte R12_T12 :1; /* SPI 0 Data Bit 12 */
byte R13_T13 :1; /* SPI 0 Data Bit 13 */
byte R14_T14 :1; /* SPI 0 Data Bit 14 */
byte R15_T15 :1; /* SPI 0 Data Bit 15 */
} Bits;
} SPI0DRHSTR;
#define SPI0DRH _SPI0DR.Overlap_STR.SPI0DRHSTR.Byte
#define SPI0DRH_R8_T8 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R8_T8
#define SPI0DRH_R9_T9 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R9_T9
#define SPI0DRH_R10_T10 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R10_T10
#define SPI0DRH_R11_T11 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R11_T11
#define SPI0DRH_R12_T12 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R12_T12
#define SPI0DRH_R13_T13 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R13_T13
#define SPI0DRH_R14_T14 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R14_T14
#define SPI0DRH_R15_T15 _SPI0DR.Overlap_STR.SPI0DRHSTR.Bits.R15_T15
#define SPI0DRH_R8_T8_MASK 0x01U
#define SPI0DRH_R9_T9_MASK 0x02U
#define SPI0DRH_R10_T10_MASK 0x04U
#define SPI0DRH_R11_T11_MASK 0x08U
#define SPI0DRH_R12_T12_MASK 0x10U
#define SPI0DRH_R13_T13_MASK 0x20U
#define SPI0DRH_R14_T14_MASK 0x40U
#define SPI0DRH_R15_T15_MASK 0x80U
/*** SPI0DRL - SPI 0 Data Register Low; 0x000000DD ***/
union {
byte Byte;
struct {
byte R0_T0 :1; /* SPI 0 Data Bit 0 */
byte R1_T1 :1; /* SPI 0 Data Bit 1 */
byte R2_T2 :1; /* SPI 0 Data Bit 2 */
byte R3_T3 :1; /* SPI 0 Data Bit 3 */
byte R4_T4 :1; /* SPI 0 Data Bit 4 */
byte R5_T5 :1; /* SPI 0 Data Bit 5 */
byte R6_T6 :1; /* SPI 0 Data Bit 6 */
byte R7_T7 :1; /* SPI 0 Data Bit 7 */
} Bits;
} SPI0DRLSTR;
#define SPI0DRL _SPI0DR.Overlap_STR.SPI0DRLSTR.Byte
#define SPI0DRL_R0_T0 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R0_T0
#define SPI0DRL_R1_T1 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R1_T1
#define SPI0DRL_R2_T2 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R2_T2
#define SPI0DRL_R3_T3 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R3_T3
#define SPI0DRL_R4_T4 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R4_T4
#define SPI0DRL_R5_T5 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R5_T5
#define SPI0DRL_R6_T6 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R6_T6
#define SPI0DRL_R7_T7 _SPI0DR.Overlap_STR.SPI0DRLSTR.Bits.R7_T7
#define SPI0DRL_R0_T0_MASK 0x01U
#define SPI0DRL_R1_T1_MASK 0x02U
#define SPI0DRL_R2_T2_MASK 0x04U
#define SPI0DRL_R3_T3_MASK 0x08U
#define SPI0DRL_R4_T4_MASK 0x10U
#define SPI0DRL_R5_T5_MASK 0x20U
#define SPI0DRL_R6_T6_MASK 0x40U
#define SPI0DRL_R7_T7_MASK 0x80U
} Overlap_STR;
struct {
word R0_T0 :1; /* SPI 0 Data Bit 0 */
word R1_T1 :1; /* SPI 0 Data Bit 1 */
word R2_T2 :1; /* SPI 0 Data Bit 2 */
word R3_T3 :1; /* SPI 0 Data Bit 3 */
word R4_T4 :1; /* SPI 0 Data Bit 4 */
word R5_T5 :1; /* SPI 0 Data Bit 5 */
word R6_T6 :1; /* SPI 0 Data Bit 6 */
word R7_T7 :1; /* SPI 0 Data Bit 7 */
word R8_T8 :1; /* SPI 0 Data Bit 8 */
word R9_T9 :1; /* SPI 0 Data Bit 9 */
word R10_T10 :1; /* SPI 0 Data Bit 10 */
word R11_T11 :1; /* SPI 0 Data Bit 11 */
word R12_T12 :1; /* SPI 0 Data Bit 12 */
word R13_T13 :1; /* SPI 0 Data Bit 13 */
word R14_T14 :1; /* SPI 0 Data Bit 14 */
word R15_T15 :1; /* SPI 0 Data Bit 15 */
} Bits;
} SPI0DRSTR;
extern volatile SPI0DRSTR _SPI0DR @(REG_BASE + 0x000000DCUL);
#define SPI0DR _SPI0DR.Word
#define SPI0DR_R0_T0 _SPI0DR.Bits.R0_T0
#define SPI0DR_R1_T1 _SPI0DR.Bits.R1_T1
#define SPI0DR_R2_T2 _SPI0DR.Bits.R2_T2
#define SPI0DR_R3_T3 _SPI0DR.Bits.R3_T3
#define SPI0DR_R4_T4 _SPI0DR.Bits.R4_T4
#define SPI0DR_R5_T5 _SPI0DR.Bits.R5_T5
#define SPI0DR_R6_T6 _SPI0DR.Bits.R6_T6
#define SPI0DR_R7_T7 _SPI0DR.Bits.R7_T7
#define SPI0DR_R8_T8 _SPI0DR.Bits.R8_T8
#define SPI0DR_R9_T9 _SPI0DR.Bits.R9_T9
#define SPI0DR_R10_T10 _SPI0DR.Bits.R10_T10
#define SPI0DR_R11_T11 _SPI0DR.Bits.R11_T11
#define SPI0DR_R12_T12 _SPI0DR.Bits.R12_T12
#define SPI0DR_R13_T13 _SPI0DR.Bits.R13_T13
#define SPI0DR_R14_T14 _SPI0DR.Bits.R14_T14
#define SPI0DR_R15_T15 _SPI0DR.Bits.R15_T15
#define SPI0DR_R0_T0_MASK 0x01U
#define SPI0DR_R1_T1_MASK 0x02U
#define SPI0DR_R2_T2_MASK 0x04U
#define SPI0DR_R3_T3_MASK 0x08U
#define SPI0DR_R4_T4_MASK 0x10U
#define SPI0DR_R5_T5_MASK 0x20U
#define SPI0DR_R6_T6_MASK 0x40U
#define SPI0DR_R7_T7_MASK 0x80U
#define SPI0DR_R8_T8_MASK 0x0100U
#define SPI0DR_R9_T9_MASK 0x0200U
#define SPI0DR_R10_T10_MASK 0x0400U
#define SPI0DR_R11_T11_MASK 0x0800U
#define SPI0DR_R12_T12_MASK 0x1000U
#define SPI0DR_R13_T13_MASK 0x2000U
#define SPI0DR_R14_T14_MASK 0x4000U
#define SPI0DR_R15_T15_MASK 0x8000U
/*** SCI2BD - SCI 2 Baud Rate Register; 0x000000E8 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** SCI2ASR1 - SCI 2 Alternative Status Register 1; 0x000000E8 ***/
union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI2ASR1 - SCI 2 Alternative Status Register 1; Several registers at the same address ***/
union {
struct {
byte BKDIF :1; /* Break Detect Interrupt Flag */
byte BERRIF :1; /* Bit Error Interrupt Flag */
byte BERRV :1; /* Bit Error Value */
byte :1;
byte :1;
byte :1;
byte :1;
byte RXEDGIF :1; /* Receive Input Active Edge Interrupt Flag */
} Bits;
} SCI2ASR1STR;
#define SCI2ASR1 _SCI2BD.Overlap_STR.SCI2ASR1STR.Byte
#define SCI2ASR1_BKDIF _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2ASR1STR.Bits.BKDIF
#define SCI2ASR1_BERRIF _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2ASR1STR.Bits.BERRIF
#define SCI2ASR1_BERRV _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2ASR1STR.Bits.BERRV
#define SCI2ASR1_RXEDGIF _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2ASR1STR.Bits.RXEDGIF
#define SCI2ASR1_BKDIF_MASK 0x01U
#define SCI2ASR1_BERRIF_MASK 0x02U
#define SCI2ASR1_BERRV_MASK 0x04U
#define SCI2ASR1_RXEDGIF_MASK 0x80U
/*** SCI2BDH - SCI 2 Baud Rate Register High; Several registers at the same address ***/
union {
struct {
byte SBR8 :1; /* SCI Baud Rate Bit 8 */
byte SBR9 :1; /* SCI Baud Rate Bit 9 */
byte SBR10 :1; /* SCI Baud Rate Bit 10 */
byte SBR11 :1; /* SCI Baud Rate Bit 11 */
byte SBR12 :1; /* SCI Baud Rate Bit 12 */
byte TNP0 :1; /* Transmitter Narrow Pulse Bit 0 */
byte TNP1 :1; /* Transmitter Narrow Pulse Bit 1 */
byte IREN :1; /* Infrared Enable Bit */
} Bits;
struct {
byte grpSBR_8 :5;
byte grpTNP :2;
byte :1;
} MergedBits;
} SCI2BDHSTR;
#define SCI2BDH _SCI2BD.Overlap_STR.SCI2ASR1STR.Byte
#define SCI2BDH_SBR8 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.SBR8
#define SCI2BDH_SBR9 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.SBR9
#define SCI2BDH_SBR10 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.SBR10
#define SCI2BDH_SBR11 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.SBR11
#define SCI2BDH_SBR12 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.SBR12
#define SCI2BDH_TNP0 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.TNP0
#define SCI2BDH_TNP1 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.TNP1
#define SCI2BDH_IREN _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.Bits.IREN
#define SCI2BDH_SBR_8 _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.MergedBits.grpSBR_8
#define SCI2BDH_TNP _SCI2BD.Overlap_STR.SCI2ASR1STR.SameAddr_STR.SCI2BDHSTR.MergedBits.grpTNP
#define SCI2BDH_SBR SCI2BDH_SBR_8
#define SCI2BDH_SBR8_MASK 0x01U
#define SCI2BDH_SBR9_MASK 0x02U
#define SCI2BDH_SBR10_MASK 0x04U
#define SCI2BDH_SBR11_MASK 0x08U
#define SCI2BDH_SBR12_MASK 0x10U
#define SCI2BDH_TNP0_MASK 0x20U
#define SCI2BDH_TNP1_MASK 0x40U
#define SCI2BDH_IREN_MASK 0x80U
#define SCI2BDH_SBR_8_MASK 0x1FU
#define SCI2BDH_SBR_8_BITNUM 0x00U
#define SCI2BDH_TNP_MASK 0x60U
#define SCI2BDH_TNP_BITNUM 0x05U
} SameAddr_STR; /*Several registers at the same address */
} SCI2ASR1STR;
/*** SCI2ACR1 - SCI 2 Alternative Control Register 1; 0x000000E9 ***/
union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI2ACR1 - SCI 2 Alternative Control Register 1; Several registers at the same address ***/
union {
struct {
byte BKDIE :1; /* Break Detect Interrupt Enable */
byte BERRIE :1; /* Bit Error Interrupt Enable */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte RXEDGIE :1; /* Receive Input Active Edge Interrupt Enable */
} Bits;
} SCI2ACR1STR;
#define SCI2ACR1 _SCI2BD.Overlap_STR.SCI2ACR1STR.Byte
#define SCI2ACR1_BKDIE _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2ACR1STR.Bits.BKDIE
#define SCI2ACR1_BERRIE _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2ACR1STR.Bits.BERRIE
#define SCI2ACR1_RXEDGIE _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2ACR1STR.Bits.RXEDGIE
#define SCI2ACR1_BKDIE_MASK 0x01U
#define SCI2ACR1_BERRIE_MASK 0x02U
#define SCI2ACR1_RXEDGIE_MASK 0x80U
/*** SCI2BDL - SCI 2 Baud Rate Register Low; Several registers at the same address ***/
union {
struct {
byte SBR0 :1; /* SCI Baud Rate Bit 0 */
byte SBR1 :1; /* SCI Baud Rate Bit 1 */
byte SBR2 :1; /* SCI Baud Rate Bit 2 */
byte SBR3 :1; /* SCI Baud Rate Bit 3 */
byte SBR4 :1; /* SCI Baud Rate Bit 4 */
byte SBR5 :1; /* SCI Baud Rate Bit 5 */
byte SBR6 :1; /* SCI Baud Rate Bit 6 */
byte SBR7 :1; /* SCI Baud Rate Bit 7 */
} Bits;
} SCI2BDLSTR;
#define SCI2BDL _SCI2BD.Overlap_STR.SCI2ACR1STR.Byte
#define SCI2BDL_SBR0 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR0
#define SCI2BDL_SBR1 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR1
#define SCI2BDL_SBR2 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR2
#define SCI2BDL_SBR3 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR3
#define SCI2BDL_SBR4 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR4
#define SCI2BDL_SBR5 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR5
#define SCI2BDL_SBR6 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR6
#define SCI2BDL_SBR7 _SCI2BD.Overlap_STR.SCI2ACR1STR.SameAddr_STR.SCI2BDLSTR.Bits.SBR7
#define SCI2BDL_SBR0_MASK 0x01U
#define SCI2BDL_SBR1_MASK 0x02U
#define SCI2BDL_SBR2_MASK 0x04U
#define SCI2BDL_SBR3_MASK 0x08U
#define SCI2BDL_SBR4_MASK 0x10U
#define SCI2BDL_SBR5_MASK 0x20U
#define SCI2BDL_SBR6_MASK 0x40U
#define SCI2BDL_SBR7_MASK 0x80U
} SameAddr_STR; /*Several registers at the same address */
} SCI2ACR1STR;
} Overlap_STR;
struct {
word SBR0 :1; /* SCI Baud Rate Bit 0 */
word SBR1 :1; /* SCI Baud Rate Bit 1 */
word SBR2 :1; /* SCI Baud Rate Bit 2 */
word SBR3 :1; /* SCI Baud Rate Bit 3 */
word SBR4 :1; /* SCI Baud Rate Bit 4 */
word SBR5 :1; /* SCI Baud Rate Bit 5 */
word SBR6 :1; /* SCI Baud Rate Bit 6 */
word SBR7 :1; /* SCI Baud Rate Bit 7 */
word SBR8 :1; /* SCI Baud Rate Bit 8 */
word SBR9 :1; /* SCI Baud Rate Bit 9 */
word SBR10 :1; /* SCI Baud Rate Bit 10 */
word SBR11 :1; /* SCI Baud Rate Bit 11 */
word SBR12 :1; /* SCI Baud Rate Bit 12 */
word TNP0 :1; /* Transmitter Narrow Pulse Bit 0 */
word TNP1 :1; /* Transmitter Narrow Pulse Bit 1 */
word IREN :1; /* Infrared Enable Bit */
} Bits;
struct {
word grpSBR :13;
word grpTNP :2;
word :1;
} MergedBits;
} SCI2BDSTR;
extern volatile SCI2BDSTR _SCI2BD @(REG_BASE + 0x000000E8UL);
#define SCI2BD _SCI2BD.Word
#define SCI2BD_SBR0 _SCI2BD.Bits.SBR0
#define SCI2BD_SBR1 _SCI2BD.Bits.SBR1
#define SCI2BD_SBR2 _SCI2BD.Bits.SBR2
#define SCI2BD_SBR3 _SCI2BD.Bits.SBR3
#define SCI2BD_SBR4 _SCI2BD.Bits.SBR4
#define SCI2BD_SBR5 _SCI2BD.Bits.SBR5
#define SCI2BD_SBR6 _SCI2BD.Bits.SBR6
#define SCI2BD_SBR7 _SCI2BD.Bits.SBR7
#define SCI2BD_SBR8 _SCI2BD.Bits.SBR8
#define SCI2BD_SBR9 _SCI2BD.Bits.SBR9
#define SCI2BD_SBR10 _SCI2BD.Bits.SBR10
#define SCI2BD_SBR11 _SCI2BD.Bits.SBR11
#define SCI2BD_SBR12 _SCI2BD.Bits.SBR12
#define SCI2BD_TNP0 _SCI2BD.Bits.TNP0
#define SCI2BD_TNP1 _SCI2BD.Bits.TNP1
#define SCI2BD_IREN _SCI2BD.Bits.IREN
#define SCI2BD_SBR _SCI2BD.MergedBits.grpSBR
#define SCI2BD_TNP _SCI2BD.MergedBits.grpTNP
#define SCI2BD_SBR0_MASK 0x01U
#define SCI2BD_SBR1_MASK 0x02U
#define SCI2BD_SBR2_MASK 0x04U
#define SCI2BD_SBR3_MASK 0x08U
#define SCI2BD_SBR4_MASK 0x10U
#define SCI2BD_SBR5_MASK 0x20U
#define SCI2BD_SBR6_MASK 0x40U
#define SCI2BD_SBR7_MASK 0x80U
#define SCI2BD_SBR8_MASK 0x0100U
#define SCI2BD_SBR9_MASK 0x0200U
#define SCI2BD_SBR10_MASK 0x0400U
#define SCI2BD_SBR11_MASK 0x0800U
#define SCI2BD_SBR12_MASK 0x1000U
#define SCI2BD_TNP0_MASK 0x2000U
#define SCI2BD_TNP1_MASK 0x4000U
#define SCI2BD_IREN_MASK 0x8000U
#define SCI2BD_SBR_MASK 0x1FFFU
#define SCI2BD_SBR_BITNUM 0x00U
#define SCI2BD_TNP_MASK 0x6000U
#define SCI2BD_TNP_BITNUM 0x0DU
/*** SCI2ACR2 - SCI 2 Alternative Control Register 2; 0x000000EA ***/
typedef union {
byte Byte;
union { /* Several registers at the same address */
/*** SCI2ACR2 - SCI 2 Alternative Control Register 2; Several registers at the same address ***/
union {
struct {
byte BKDFE :1; /* Break Detect Feature Enable */
byte BERRM0 :1; /* Bit Error Mode 0 */
byte BERRM1 :1; /* Bit Error Mode 1 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte :1;
byte grpBERRM :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} SCI2ACR2STR;
#define SCI2ACR2 _SCI2ACR2.Byte
#define SCI2ACR2_BKDFE _SCI2ACR2.SameAddr_STR.SCI2ACR2STR.Bits.BKDFE
#define SCI2ACR2_BERRM0 _SCI2ACR2.SameAddr_STR.SCI2ACR2STR.Bits.BERRM0
#define SCI2ACR2_BERRM1 _SCI2ACR2.SameAddr_STR.SCI2ACR2STR.Bits.BERRM1
#define SCI2ACR2_BERRM _SCI2ACR2.SameAddr_STR.SCI2ACR2STR.MergedBits.grpBERRM
#define SCI2ACR2_BKDFE_MASK 0x01U
#define SCI2ACR2_BERRM0_MASK 0x02U
#define SCI2ACR2_BERRM1_MASK 0x04U
#define SCI2ACR2_BERRM_MASK 0x06U
#define SCI2ACR2_BERRM_BITNUM 0x01U
/*** SCI2CR1 - SCI 2 Control Register 1; Several registers at the same address ***/
union {
struct {
byte PT :1; /* Parity Type Bit */
byte PE :1; /* Parity Enable Bit */
byte ILT :1; /* Idle Line Type Bit */
byte WAKE :1; /* Wakeup Condition Bit */
byte M :1; /* Data Format Mode Bit */
byte RSRC :1; /* Receiver Source Bit */
byte SCISWAI :1; /* SCI Stop in Wait Mode Bit */
byte LOOPS :1; /* Loop Select Bit */
} Bits;
} SCI2CR1STR;
#define SCI2CR1 _SCI2ACR2.Byte
#define SCI2CR1_PT _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.PT
#define SCI2CR1_PE _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.PE
#define SCI2CR1_ILT _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.ILT
#define SCI2CR1_WAKE _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.WAKE
#define SCI2CR1_M _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.M
#define SCI2CR1_RSRC _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.RSRC
#define SCI2CR1_SCISWAI _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.SCISWAI
#define SCI2CR1_LOOPS _SCI2ACR2.SameAddr_STR.SCI2CR1STR.Bits.LOOPS
#define SCI2CR1_PT_MASK 0x01U
#define SCI2CR1_PE_MASK 0x02U
#define SCI2CR1_ILT_MASK 0x04U
#define SCI2CR1_WAKE_MASK 0x08U
#define SCI2CR1_M_MASK 0x10U
#define SCI2CR1_RSRC_MASK 0x20U
#define SCI2CR1_SCISWAI_MASK 0x40U
#define SCI2CR1_LOOPS_MASK 0x80U
} SameAddr_STR; /*Several registers at the same address */
} SCI2ACR2STR;
extern volatile SCI2ACR2STR _SCI2ACR2 @(REG_BASE + 0x000000EAUL);
/*** SCI2CR2 - SCI 2 Control Register 2; 0x000000EB ***/
typedef union {
byte Byte;
struct {
byte SBK :1; /* Send Break Bit */
byte RWU :1; /* Receiver Wakeup Bit */
byte RE :1; /* Receiver Enable Bit */
byte TE :1; /* Transmitter Enable Bit */
byte ILIE :1; /* Idle Line Interrupt Enable Bit */
byte RIE :1; /* Receiver Full Interrupt Enable Bit */
byte TCIE :1; /* Transmission Complete Interrupt Enable Bit */
byte TIE_bit :1; /* Transmitter Interrupt Enable Bit */ /*Warning: bit name is duplicated with register name*/
} Bits;
} SCI2CR2STR;
extern volatile SCI2CR2STR _SCI2CR2 @(REG_BASE + 0x000000EBUL);
#define SCI2CR2 _SCI2CR2.Byte
#define SCI2CR2_SBK _SCI2CR2.Bits.SBK
#define SCI2CR2_RWU _SCI2CR2.Bits.RWU
#define SCI2CR2_RE _SCI2CR2.Bits.RE
#define SCI2CR2_TE _SCI2CR2.Bits.TE
#define SCI2CR2_ILIE _SCI2CR2.Bits.ILIE
#define SCI2CR2_RIE _SCI2CR2.Bits.RIE
#define SCI2CR2_TCIE _SCI2CR2.Bits.TCIE
#define SCI2CR2_TIE _SCI2CR2.Bits.TIE_bit
#define SCI2CR2_SBK_MASK 0x01U
#define SCI2CR2_RWU_MASK 0x02U
#define SCI2CR2_RE_MASK 0x04U
#define SCI2CR2_TE_MASK 0x08U
#define SCI2CR2_ILIE_MASK 0x10U
#define SCI2CR2_RIE_MASK 0x20U
#define SCI2CR2_TCIE_MASK 0x40U
#define SCI2CR2_TIE_MASK 0x80U
/*** SCI2SR1 - SCI 2 Status Register 1; 0x000000EC ***/
typedef union {
byte Byte;
struct {
byte PF :1; /* Parity Error Flag */
byte FE :1; /* Framing Error Flag */
byte NF :1; /* Noise Flag */
byte OR :1; /* Overrun Flag */
byte IDLE :1; /* Idle Line Flag */
byte RDRF :1; /* Receive Data Register Full Flag */
byte TC :1; /* Transmit Complete Flag */
byte TDRE :1; /* Transmit Data Register Empty Flag */
} Bits;
} SCI2SR1STR;
extern volatile SCI2SR1STR _SCI2SR1 @(REG_BASE + 0x000000ECUL);
#define SCI2SR1 _SCI2SR1.Byte
#define SCI2SR1_PF _SCI2SR1.Bits.PF
#define SCI2SR1_FE _SCI2SR1.Bits.FE
#define SCI2SR1_NF _SCI2SR1.Bits.NF
#define SCI2SR1_OR _SCI2SR1.Bits.OR
#define SCI2SR1_IDLE _SCI2SR1.Bits.IDLE
#define SCI2SR1_RDRF _SCI2SR1.Bits.RDRF
#define SCI2SR1_TC _SCI2SR1.Bits.TC
#define SCI2SR1_TDRE _SCI2SR1.Bits.TDRE
#define SCI2SR1_PF_MASK 0x01U
#define SCI2SR1_FE_MASK 0x02U
#define SCI2SR1_NF_MASK 0x04U
#define SCI2SR1_OR_MASK 0x08U
#define SCI2SR1_IDLE_MASK 0x10U
#define SCI2SR1_RDRF_MASK 0x20U
#define SCI2SR1_TC_MASK 0x40U
#define SCI2SR1_TDRE_MASK 0x80U
/*** SCI2SR2 - SCI 2 Status Register 2; 0x000000ED ***/
typedef union {
byte Byte;
struct {
byte RAF :1; /* Receiver Active Flag */
byte TXDIR :1; /* Transmitter pin data direction in Single-Wire mode */
byte BRK13 :1; /* Break Transmit character length */
byte RXPOL :1; /* Receive Polarity */
byte TXPOL :1; /* Transmit Polarity */
byte :1;
byte :1;
byte AMAP :1; /* Alternative Map */
} Bits;
} SCI2SR2STR;
extern volatile SCI2SR2STR _SCI2SR2 @(REG_BASE + 0x000000EDUL);
#define SCI2SR2 _SCI2SR2.Byte
#define SCI2SR2_RAF _SCI2SR2.Bits.RAF
#define SCI2SR2_TXDIR _SCI2SR2.Bits.TXDIR
#define SCI2SR2_BRK13 _SCI2SR2.Bits.BRK13
#define SCI2SR2_RXPOL _SCI2SR2.Bits.RXPOL
#define SCI2SR2_TXPOL _SCI2SR2.Bits.TXPOL
#define SCI2SR2_AMAP _SCI2SR2.Bits.AMAP
#define SCI2SR2_RAF_MASK 0x01U
#define SCI2SR2_TXDIR_MASK 0x02U
#define SCI2SR2_BRK13_MASK 0x04U
#define SCI2SR2_RXPOL_MASK 0x08U
#define SCI2SR2_TXPOL_MASK 0x10U
#define SCI2SR2_AMAP_MASK 0x80U
/*** SCI2DRH - SCI 2 Data Register High; 0x000000EE ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte T8 :1; /* Transmit Bit 8 */
byte R8 :1; /* Received Bit 8 */
} Bits;
} SCI2DRHSTR;
extern volatile SCI2DRHSTR _SCI2DRH @(REG_BASE + 0x000000EEUL);
#define SCI2DRH _SCI2DRH.Byte
#define SCI2DRH_T8 _SCI2DRH.Bits.T8
#define SCI2DRH_R8 _SCI2DRH.Bits.R8
#define SCI2DRH_T8_MASK 0x40U
#define SCI2DRH_R8_MASK 0x80U
/*** SCI2DRL - SCI 2 Data Register Low; 0x000000EF ***/
typedef union {
byte Byte;
struct {
byte R0_T0 :1; /* Received bit 0 or Transmit bit 0 */
byte R1_T1 :1; /* Received bit 1 or Transmit bit 1 */
byte R2_T2 :1; /* Received bit 2 or Transmit bit 2 */
byte R3_T3 :1; /* Received bit 3 or Transmit bit 3 */
byte R4_T4 :1; /* Received bit 4 or Transmit bit 4 */
byte R5_T5 :1; /* Received bit 5 or Transmit bit 5 */
byte R6_T6 :1; /* Received bit 6 or Transmit bit 6 */
byte R7_T7 :1; /* Received bit 7 or Transmit bit 7 */
} Bits;
} SCI2DRLSTR;
extern volatile SCI2DRLSTR _SCI2DRL @(REG_BASE + 0x000000EFUL);
#define SCI2DRL _SCI2DRL.Byte
#define SCI2DRL_R0_T0 _SCI2DRL.Bits.R0_T0
#define SCI2DRL_R1_T1 _SCI2DRL.Bits.R1_T1
#define SCI2DRL_R2_T2 _SCI2DRL.Bits.R2_T2
#define SCI2DRL_R3_T3 _SCI2DRL.Bits.R3_T3
#define SCI2DRL_R4_T4 _SCI2DRL.Bits.R4_T4
#define SCI2DRL_R5_T5 _SCI2DRL.Bits.R5_T5
#define SCI2DRL_R6_T6 _SCI2DRL.Bits.R6_T6
#define SCI2DRL_R7_T7 _SCI2DRL.Bits.R7_T7
#define SCI2DRL_R0_T0_MASK 0x01U
#define SCI2DRL_R1_T1_MASK 0x02U
#define SCI2DRL_R2_T2_MASK 0x04U
#define SCI2DRL_R3_T3_MASK 0x08U
#define SCI2DRL_R4_T4_MASK 0x10U
#define SCI2DRL_R5_T5_MASK 0x20U
#define SCI2DRL_R6_T6_MASK 0x40U
#define SCI2DRL_R7_T7_MASK 0x80U
/*** SPI1CR1 - SPI 1 Control Register 1; 0x000000F0 ***/
typedef union {
byte Byte;
struct {
byte LSBFE :1; /* SPI LSB-First Enable */
byte SSOE :1; /* Slave Select Output Enable */
byte CPHA :1; /* SPI Clock Phase Bit */
byte CPOL :1; /* SPI Clock Polarity Bit */
byte MSTR :1; /* SPI Master/Slave Mode Select Bit */
byte SPTIE :1; /* SPI Transmit Interrupt Enable */
byte SPE :1; /* SPI System Enable Bit */
byte SPIE :1; /* SPI Interrupt Enable Bit */
} Bits;
} SPI1CR1STR;
extern volatile SPI1CR1STR _SPI1CR1 @(REG_BASE + 0x000000F0UL);
#define SPI1CR1 _SPI1CR1.Byte
#define SPI1CR1_LSBFE _SPI1CR1.Bits.LSBFE
#define SPI1CR1_SSOE _SPI1CR1.Bits.SSOE
#define SPI1CR1_CPHA _SPI1CR1.Bits.CPHA
#define SPI1CR1_CPOL _SPI1CR1.Bits.CPOL
#define SPI1CR1_MSTR _SPI1CR1.Bits.MSTR
#define SPI1CR1_SPTIE _SPI1CR1.Bits.SPTIE
#define SPI1CR1_SPE _SPI1CR1.Bits.SPE
#define SPI1CR1_SPIE _SPI1CR1.Bits.SPIE
#define SPI1CR1_LSBFE_MASK 0x01U
#define SPI1CR1_SSOE_MASK 0x02U
#define SPI1CR1_CPHA_MASK 0x04U
#define SPI1CR1_CPOL_MASK 0x08U
#define SPI1CR1_MSTR_MASK 0x10U
#define SPI1CR1_SPTIE_MASK 0x20U
#define SPI1CR1_SPE_MASK 0x40U
#define SPI1CR1_SPIE_MASK 0x80U
/*** SPI1CR2 - SPI 1 Control Register 2; 0x000000F1 ***/
typedef union {
byte Byte;
struct {
byte SPC0 :1; /* Serial Pin Control Bit 0 */
byte SPISWAI :1; /* SPI Stop in Wait Mode Bit */
byte :1;
byte BIDIROE :1; /* Output enable in the Bidirectional mode of operation */
byte MODFEN :1; /* Mode Fault Enable Bit */
byte :1;
byte XFRW :1; /* Transfer Width */
byte :1;
} Bits;
} SPI1CR2STR;
extern volatile SPI1CR2STR _SPI1CR2 @(REG_BASE + 0x000000F1UL);
#define SPI1CR2 _SPI1CR2.Byte
#define SPI1CR2_SPC0 _SPI1CR2.Bits.SPC0
#define SPI1CR2_SPISWAI _SPI1CR2.Bits.SPISWAI
#define SPI1CR2_BIDIROE _SPI1CR2.Bits.BIDIROE
#define SPI1CR2_MODFEN _SPI1CR2.Bits.MODFEN
#define SPI1CR2_XFRW _SPI1CR2.Bits.XFRW
#define SPI1CR2_SPC0_MASK 0x01U
#define SPI1CR2_SPISWAI_MASK 0x02U
#define SPI1CR2_BIDIROE_MASK 0x08U
#define SPI1CR2_MODFEN_MASK 0x10U
#define SPI1CR2_XFRW_MASK 0x40U
/*** SPI1BR - SPI 1 Baud Rate Register; 0x000000F2 ***/
typedef union {
byte Byte;
struct {
byte SPR0 :1; /* SPI Baud Rate Selection Bit 0 */
byte SPR1 :1; /* SPI Baud Rate Selection Bit 1 */
byte SPR2 :1; /* SPI Baud Rate Selection Bit 2 */
byte :1;
byte SPPR0 :1; /* SPI Baud Rate Preselection Bits 0 */
byte SPPR1 :1; /* SPI Baud Rate Preselection Bits 1 */
byte SPPR2 :1; /* SPI Baud Rate Preselection Bits 2 */
byte :1;
} Bits;
struct {
byte grpSPR :3;
byte :1;
byte grpSPPR :3;
byte :1;
} MergedBits;
} SPI1BRSTR;
extern volatile SPI1BRSTR _SPI1BR @(REG_BASE + 0x000000F2UL);
#define SPI1BR _SPI1BR.Byte
#define SPI1BR_SPR0 _SPI1BR.Bits.SPR0
#define SPI1BR_SPR1 _SPI1BR.Bits.SPR1
#define SPI1BR_SPR2 _SPI1BR.Bits.SPR2
#define SPI1BR_SPPR0 _SPI1BR.Bits.SPPR0
#define SPI1BR_SPPR1 _SPI1BR.Bits.SPPR1
#define SPI1BR_SPPR2 _SPI1BR.Bits.SPPR2
#define SPI1BR_SPR _SPI1BR.MergedBits.grpSPR
#define SPI1BR_SPPR _SPI1BR.MergedBits.grpSPPR
#define SPI1BR_SPR0_MASK 0x01U
#define SPI1BR_SPR1_MASK 0x02U
#define SPI1BR_SPR2_MASK 0x04U
#define SPI1BR_SPPR0_MASK 0x10U
#define SPI1BR_SPPR1_MASK 0x20U
#define SPI1BR_SPPR2_MASK 0x40U
#define SPI1BR_SPR_MASK 0x07U
#define SPI1BR_SPR_BITNUM 0x00U
#define SPI1BR_SPPR_MASK 0x70U
#define SPI1BR_SPPR_BITNUM 0x04U
/*** SPI1SR - SPI 1 Status Register; 0x000000F3 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte MODF :1; /* Mode Fault Flag */
byte SPTEF :1; /* SPI Transmit Empty Interrupt Flag */
byte :1;
byte SPIF :1; /* SPIF Receive Interrupt Flag */
} Bits;
} SPI1SRSTR;
extern volatile SPI1SRSTR _SPI1SR @(REG_BASE + 0x000000F3UL);
#define SPI1SR _SPI1SR.Byte
#define SPI1SR_MODF _SPI1SR.Bits.MODF
#define SPI1SR_SPTEF _SPI1SR.Bits.SPTEF
#define SPI1SR_SPIF _SPI1SR.Bits.SPIF
#define SPI1SR_MODF_MASK 0x10U
#define SPI1SR_SPTEF_MASK 0x20U
#define SPI1SR_SPIF_MASK 0x80U
/*** SPI1DR - SPI 1 Data Register; 0x000000F4 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** SPI1DRH - SPI 1 Data Register High; 0x000000F4 ***/
union {
byte Byte;
struct {
byte R8_T8 :1; /* SPI 1 Data Bit 8 */
byte R9_T9 :1; /* SPI 1 Data Bit 9 */
byte R10_T10 :1; /* SPI 1 Data Bit 10 */
byte R11_T11 :1; /* SPI 1 Data Bit 11 */
byte R12_T12 :1; /* SPI 1 Data Bit 12 */
byte R13_T13 :1; /* SPI 1 Data Bit 13 */
byte R14_T14 :1; /* SPI 1 Data Bit 14 */
byte R15_T15 :1; /* SPI 1 Data Bit 15 */
} Bits;
} SPI1DRHSTR;
#define SPI1DRH _SPI1DR.Overlap_STR.SPI1DRHSTR.Byte
#define SPI1DRH_R8_T8 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R8_T8
#define SPI1DRH_R9_T9 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R9_T9
#define SPI1DRH_R10_T10 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R10_T10
#define SPI1DRH_R11_T11 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R11_T11
#define SPI1DRH_R12_T12 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R12_T12
#define SPI1DRH_R13_T13 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R13_T13
#define SPI1DRH_R14_T14 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R14_T14
#define SPI1DRH_R15_T15 _SPI1DR.Overlap_STR.SPI1DRHSTR.Bits.R15_T15
#define SPI1DRH_R8_T8_MASK 0x01U
#define SPI1DRH_R9_T9_MASK 0x02U
#define SPI1DRH_R10_T10_MASK 0x04U
#define SPI1DRH_R11_T11_MASK 0x08U
#define SPI1DRH_R12_T12_MASK 0x10U
#define SPI1DRH_R13_T13_MASK 0x20U
#define SPI1DRH_R14_T14_MASK 0x40U
#define SPI1DRH_R15_T15_MASK 0x80U
/*** SPI1DRL - SPI 1 Data Register Low; 0x000000F5 ***/
union {
byte Byte;
struct {
byte R0_T0 :1; /* SPI 1 Data Bit 0 */
byte R1_T1 :1; /* SPI 1 Data Bit 1 */
byte R2_T2 :1; /* SPI 1 Data Bit 2 */
byte R3_T3 :1; /* SPI 1 Data Bit 3 */
byte R4_T4 :1; /* SPI 1 Data Bit 4 */
byte R5_T5 :1; /* SPI 1 Data Bit 5 */
byte R6_T6 :1; /* SPI 1 Data Bit 6 */
byte R7_T7 :1; /* SPI 1 Data Bit 7 */
} Bits;
} SPI1DRLSTR;
#define SPI1DRL _SPI1DR.Overlap_STR.SPI1DRLSTR.Byte
#define SPI1DRL_R0_T0 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R0_T0
#define SPI1DRL_R1_T1 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R1_T1
#define SPI1DRL_R2_T2 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R2_T2
#define SPI1DRL_R3_T3 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R3_T3
#define SPI1DRL_R4_T4 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R4_T4
#define SPI1DRL_R5_T5 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R5_T5
#define SPI1DRL_R6_T6 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R6_T6
#define SPI1DRL_R7_T7 _SPI1DR.Overlap_STR.SPI1DRLSTR.Bits.R7_T7
#define SPI1DRL_R0_T0_MASK 0x01U
#define SPI1DRL_R1_T1_MASK 0x02U
#define SPI1DRL_R2_T2_MASK 0x04U
#define SPI1DRL_R3_T3_MASK 0x08U
#define SPI1DRL_R4_T4_MASK 0x10U
#define SPI1DRL_R5_T5_MASK 0x20U
#define SPI1DRL_R6_T6_MASK 0x40U
#define SPI1DRL_R7_T7_MASK 0x80U
} Overlap_STR;
struct {
word R0_T0 :1; /* SPI 1 Data Bit 0 */
word R1_T1 :1; /* SPI 1 Data Bit 1 */
word R2_T2 :1; /* SPI 1 Data Bit 2 */
word R3_T3 :1; /* SPI 1 Data Bit 3 */
word R4_T4 :1; /* SPI 1 Data Bit 4 */
word R5_T5 :1; /* SPI 1 Data Bit 5 */
word R6_T6 :1; /* SPI 1 Data Bit 6 */
word R7_T7 :1; /* SPI 1 Data Bit 7 */
word R8_T8 :1; /* SPI 1 Data Bit 8 */
word R9_T9 :1; /* SPI 1 Data Bit 9 */
word R10_T10 :1; /* SPI 1 Data Bit 10 */
word R11_T11 :1; /* SPI 1 Data Bit 11 */
word R12_T12 :1; /* SPI 1 Data Bit 12 */
word R13_T13 :1; /* SPI 1 Data Bit 13 */
word R14_T14 :1; /* SPI 1 Data Bit 14 */
word R15_T15 :1; /* SPI 1 Data Bit 15 */
} Bits;
} SPI1DRSTR;
extern volatile SPI1DRSTR _SPI1DR @(REG_BASE + 0x000000F4UL);
#define SPI1DR _SPI1DR.Word
#define SPI1DR_R0_T0 _SPI1DR.Bits.R0_T0
#define SPI1DR_R1_T1 _SPI1DR.Bits.R1_T1
#define SPI1DR_R2_T2 _SPI1DR.Bits.R2_T2
#define SPI1DR_R3_T3 _SPI1DR.Bits.R3_T3
#define SPI1DR_R4_T4 _SPI1DR.Bits.R4_T4
#define SPI1DR_R5_T5 _SPI1DR.Bits.R5_T5
#define SPI1DR_R6_T6 _SPI1DR.Bits.R6_T6
#define SPI1DR_R7_T7 _SPI1DR.Bits.R7_T7
#define SPI1DR_R8_T8 _SPI1DR.Bits.R8_T8
#define SPI1DR_R9_T9 _SPI1DR.Bits.R9_T9
#define SPI1DR_R10_T10 _SPI1DR.Bits.R10_T10
#define SPI1DR_R11_T11 _SPI1DR.Bits.R11_T11
#define SPI1DR_R12_T12 _SPI1DR.Bits.R12_T12
#define SPI1DR_R13_T13 _SPI1DR.Bits.R13_T13
#define SPI1DR_R14_T14 _SPI1DR.Bits.R14_T14
#define SPI1DR_R15_T15 _SPI1DR.Bits.R15_T15
#define SPI1DR_R0_T0_MASK 0x01U
#define SPI1DR_R1_T1_MASK 0x02U
#define SPI1DR_R2_T2_MASK 0x04U
#define SPI1DR_R3_T3_MASK 0x08U
#define SPI1DR_R4_T4_MASK 0x10U
#define SPI1DR_R5_T5_MASK 0x20U
#define SPI1DR_R6_T6_MASK 0x40U
#define SPI1DR_R7_T7_MASK 0x80U
#define SPI1DR_R8_T8_MASK 0x0100U
#define SPI1DR_R9_T9_MASK 0x0200U
#define SPI1DR_R10_T10_MASK 0x0400U
#define SPI1DR_R11_T11_MASK 0x0800U
#define SPI1DR_R12_T12_MASK 0x1000U
#define SPI1DR_R13_T13_MASK 0x2000U
#define SPI1DR_R14_T14_MASK 0x4000U
#define SPI1DR_R15_T15_MASK 0x8000U
/*** SPI2CR1 - SPI 2 Control Register 1; 0x000000F8 ***/
typedef union {
byte Byte;
struct {
byte LSBFE :1; /* SPI LSB-First Enable */
byte SSOE :1; /* Slave Select Output Enable */
byte CPHA :1; /* SPI Clock Phase Bit */
byte CPOL :1; /* SPI Clock Polarity Bit */
byte MSTR :1; /* SPI Master/Slave Mode Select Bit */
byte SPTIE :1; /* SPI Transmit Interrupt Enable */
byte SPE :1; /* SPI System Enable Bit */
byte SPIE :1; /* SPI Interrupt Enable Bit */
} Bits;
} SPI2CR1STR;
extern volatile SPI2CR1STR _SPI2CR1 @(REG_BASE + 0x000000F8UL);
#define SPI2CR1 _SPI2CR1.Byte
#define SPI2CR1_LSBFE _SPI2CR1.Bits.LSBFE
#define SPI2CR1_SSOE _SPI2CR1.Bits.SSOE
#define SPI2CR1_CPHA _SPI2CR1.Bits.CPHA
#define SPI2CR1_CPOL _SPI2CR1.Bits.CPOL
#define SPI2CR1_MSTR _SPI2CR1.Bits.MSTR
#define SPI2CR1_SPTIE _SPI2CR1.Bits.SPTIE
#define SPI2CR1_SPE _SPI2CR1.Bits.SPE
#define SPI2CR1_SPIE _SPI2CR1.Bits.SPIE
#define SPI2CR1_LSBFE_MASK 0x01U
#define SPI2CR1_SSOE_MASK 0x02U
#define SPI2CR1_CPHA_MASK 0x04U
#define SPI2CR1_CPOL_MASK 0x08U
#define SPI2CR1_MSTR_MASK 0x10U
#define SPI2CR1_SPTIE_MASK 0x20U
#define SPI2CR1_SPE_MASK 0x40U
#define SPI2CR1_SPIE_MASK 0x80U
/*** SPI2CR2 - SPI 2 Control Register 2; 0x000000F9 ***/
typedef union {
byte Byte;
struct {
byte SPC0 :1; /* Serial Pin Control Bit 0 */
byte SPISWAI :1; /* SPI Stop in Wait Mode Bit */
byte :1;
byte BIDIROE :1; /* Output enable in the Bidirectional mode of operation */
byte MODFEN :1; /* Mode Fault Enable Bit */
byte :1;
byte XFRW :1; /* Transfer Width */
byte :1;
} Bits;
} SPI2CR2STR;
extern volatile SPI2CR2STR _SPI2CR2 @(REG_BASE + 0x000000F9UL);
#define SPI2CR2 _SPI2CR2.Byte
#define SPI2CR2_SPC0 _SPI2CR2.Bits.SPC0
#define SPI2CR2_SPISWAI _SPI2CR2.Bits.SPISWAI
#define SPI2CR2_BIDIROE _SPI2CR2.Bits.BIDIROE
#define SPI2CR2_MODFEN _SPI2CR2.Bits.MODFEN
#define SPI2CR2_XFRW _SPI2CR2.Bits.XFRW
#define SPI2CR2_SPC0_MASK 0x01U
#define SPI2CR2_SPISWAI_MASK 0x02U
#define SPI2CR2_BIDIROE_MASK 0x08U
#define SPI2CR2_MODFEN_MASK 0x10U
#define SPI2CR2_XFRW_MASK 0x40U
/*** SPI2BR - SPI 2 Baud Rate Register; 0x000000FA ***/
typedef union {
byte Byte;
struct {
byte SPR0 :1; /* SPI Baud Rate Selection Bit 0 */
byte SPR1 :1; /* SPI Baud Rate Selection Bit 1 */
byte SPR2 :1; /* SPI Baud Rate Selection Bit 2 */
byte :1;
byte SPPR0 :1; /* SPI Baud Rate Preselection Bits 0 */
byte SPPR1 :1; /* SPI Baud Rate Preselection Bits 1 */
byte SPPR2 :1; /* SPI Baud Rate Preselection Bits 2 */
byte :1;
} Bits;
struct {
byte grpSPR :3;
byte :1;
byte grpSPPR :3;
byte :1;
} MergedBits;
} SPI2BRSTR;
extern volatile SPI2BRSTR _SPI2BR @(REG_BASE + 0x000000FAUL);
#define SPI2BR _SPI2BR.Byte
#define SPI2BR_SPR0 _SPI2BR.Bits.SPR0
#define SPI2BR_SPR1 _SPI2BR.Bits.SPR1
#define SPI2BR_SPR2 _SPI2BR.Bits.SPR2
#define SPI2BR_SPPR0 _SPI2BR.Bits.SPPR0
#define SPI2BR_SPPR1 _SPI2BR.Bits.SPPR1
#define SPI2BR_SPPR2 _SPI2BR.Bits.SPPR2
#define SPI2BR_SPR _SPI2BR.MergedBits.grpSPR
#define SPI2BR_SPPR _SPI2BR.MergedBits.grpSPPR
#define SPI2BR_SPR0_MASK 0x01U
#define SPI2BR_SPR1_MASK 0x02U
#define SPI2BR_SPR2_MASK 0x04U
#define SPI2BR_SPPR0_MASK 0x10U
#define SPI2BR_SPPR1_MASK 0x20U
#define SPI2BR_SPPR2_MASK 0x40U
#define SPI2BR_SPR_MASK 0x07U
#define SPI2BR_SPR_BITNUM 0x00U
#define SPI2BR_SPPR_MASK 0x70U
#define SPI2BR_SPPR_BITNUM 0x04U
/*** SPI2SR - SPI 2 Status Register; 0x000000FB ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte MODF :1; /* Mode Fault Flag */
byte SPTEF :1; /* SPI Transmit Empty Interrupt Flag */
byte :1;
byte SPIF :1; /* SPIF Receive Interrupt Flag */
} Bits;
} SPI2SRSTR;
extern volatile SPI2SRSTR _SPI2SR @(REG_BASE + 0x000000FBUL);
#define SPI2SR _SPI2SR.Byte
#define SPI2SR_MODF _SPI2SR.Bits.MODF
#define SPI2SR_SPTEF _SPI2SR.Bits.SPTEF
#define SPI2SR_SPIF _SPI2SR.Bits.SPIF
#define SPI2SR_MODF_MASK 0x10U
#define SPI2SR_SPTEF_MASK 0x20U
#define SPI2SR_SPIF_MASK 0x80U
/*** SPI2DR - SPI 2 Data Register; 0x000000FC ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** SPI2DRH - SPI 2 Data Register High; 0x000000FC ***/
union {
byte Byte;
struct {
byte R8_T8 :1; /* SPI 2 Data Bit 8 */
byte R9_T9 :1; /* SPI 2 Data Bit 9 */
byte R10_T10 :1; /* SPI 2 Data Bit 10 */
byte R11_T11 :1; /* SPI 2 Data Bit 11 */
byte R12_T12 :1; /* SPI 2 Data Bit 12 */
byte R13_T13 :1; /* SPI 2 Data Bit 13 */
byte R14_T14 :1; /* SPI 2 Data Bit 14 */
byte R15_T15 :1; /* SPI 2 Data Bit 15 */
} Bits;
} SPI2DRHSTR;
#define SPI2DRH _SPI2DR.Overlap_STR.SPI2DRHSTR.Byte
#define SPI2DRH_R8_T8 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R8_T8
#define SPI2DRH_R9_T9 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R9_T9
#define SPI2DRH_R10_T10 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R10_T10
#define SPI2DRH_R11_T11 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R11_T11
#define SPI2DRH_R12_T12 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R12_T12
#define SPI2DRH_R13_T13 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R13_T13
#define SPI2DRH_R14_T14 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R14_T14
#define SPI2DRH_R15_T15 _SPI2DR.Overlap_STR.SPI2DRHSTR.Bits.R15_T15
#define SPI2DRH_R8_T8_MASK 0x01U
#define SPI2DRH_R9_T9_MASK 0x02U
#define SPI2DRH_R10_T10_MASK 0x04U
#define SPI2DRH_R11_T11_MASK 0x08U
#define SPI2DRH_R12_T12_MASK 0x10U
#define SPI2DRH_R13_T13_MASK 0x20U
#define SPI2DRH_R14_T14_MASK 0x40U
#define SPI2DRH_R15_T15_MASK 0x80U
/*** SPI2DRL - SPI 2 Data Register Low; 0x000000FD ***/
union {
byte Byte;
struct {
byte R0_T0 :1; /* SPI 2 Data Bit 0 */
byte R1_T1 :1; /* SPI 2 Data Bit 1 */
byte R2_T2 :1; /* SPI 2 Data Bit 2 */
byte R3_T3 :1; /* SPI 2 Data Bit 3 */
byte R4_T4 :1; /* SPI 2 Data Bit 4 */
byte R5_T5 :1; /* SPI 2 Data Bit 5 */
byte R6_T6 :1; /* SPI 2 Data Bit 6 */
byte R7_T7 :1; /* SPI 2 Data Bit 7 */
} Bits;
} SPI2DRLSTR;
#define SPI2DRL _SPI2DR.Overlap_STR.SPI2DRLSTR.Byte
#define SPI2DRL_R0_T0 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R0_T0
#define SPI2DRL_R1_T1 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R1_T1
#define SPI2DRL_R2_T2 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R2_T2
#define SPI2DRL_R3_T3 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R3_T3
#define SPI2DRL_R4_T4 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R4_T4
#define SPI2DRL_R5_T5 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R5_T5
#define SPI2DRL_R6_T6 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R6_T6
#define SPI2DRL_R7_T7 _SPI2DR.Overlap_STR.SPI2DRLSTR.Bits.R7_T7
#define SPI2DRL_R0_T0_MASK 0x01U
#define SPI2DRL_R1_T1_MASK 0x02U
#define SPI2DRL_R2_T2_MASK 0x04U
#define SPI2DRL_R3_T3_MASK 0x08U
#define SPI2DRL_R4_T4_MASK 0x10U
#define SPI2DRL_R5_T5_MASK 0x20U
#define SPI2DRL_R6_T6_MASK 0x40U
#define SPI2DRL_R7_T7_MASK 0x80U
} Overlap_STR;
struct {
word R0_T0 :1; /* SPI 2 Data Bit 0 */
word R1_T1 :1; /* SPI 2 Data Bit 1 */
word R2_T2 :1; /* SPI 2 Data Bit 2 */
word R3_T3 :1; /* SPI 2 Data Bit 3 */
word R4_T4 :1; /* SPI 2 Data Bit 4 */
word R5_T5 :1; /* SPI 2 Data Bit 5 */
word R6_T6 :1; /* SPI 2 Data Bit 6 */
word R7_T7 :1; /* SPI 2 Data Bit 7 */
word R8_T8 :1; /* SPI 2 Data Bit 8 */
word R9_T9 :1; /* SPI 2 Data Bit 9 */
word R10_T10 :1; /* SPI 2 Data Bit 10 */
word R11_T11 :1; /* SPI 2 Data Bit 11 */
word R12_T12 :1; /* SPI 2 Data Bit 12 */
word R13_T13 :1; /* SPI 2 Data Bit 13 */
word R14_T14 :1; /* SPI 2 Data Bit 14 */
word R15_T15 :1; /* SPI 2 Data Bit 15 */
} Bits;
} SPI2DRSTR;
extern volatile SPI2DRSTR _SPI2DR @(REG_BASE + 0x000000FCUL);
#define SPI2DR _SPI2DR.Word
#define SPI2DR_R0_T0 _SPI2DR.Bits.R0_T0
#define SPI2DR_R1_T1 _SPI2DR.Bits.R1_T1
#define SPI2DR_R2_T2 _SPI2DR.Bits.R2_T2
#define SPI2DR_R3_T3 _SPI2DR.Bits.R3_T3
#define SPI2DR_R4_T4 _SPI2DR.Bits.R4_T4
#define SPI2DR_R5_T5 _SPI2DR.Bits.R5_T5
#define SPI2DR_R6_T6 _SPI2DR.Bits.R6_T6
#define SPI2DR_R7_T7 _SPI2DR.Bits.R7_T7
#define SPI2DR_R8_T8 _SPI2DR.Bits.R8_T8
#define SPI2DR_R9_T9 _SPI2DR.Bits.R9_T9
#define SPI2DR_R10_T10 _SPI2DR.Bits.R10_T10
#define SPI2DR_R11_T11 _SPI2DR.Bits.R11_T11
#define SPI2DR_R12_T12 _SPI2DR.Bits.R12_T12
#define SPI2DR_R13_T13 _SPI2DR.Bits.R13_T13
#define SPI2DR_R14_T14 _SPI2DR.Bits.R14_T14
#define SPI2DR_R15_T15 _SPI2DR.Bits.R15_T15
#define SPI2DR_R0_T0_MASK 0x01U
#define SPI2DR_R1_T1_MASK 0x02U
#define SPI2DR_R2_T2_MASK 0x04U
#define SPI2DR_R3_T3_MASK 0x08U
#define SPI2DR_R4_T4_MASK 0x10U
#define SPI2DR_R5_T5_MASK 0x20U
#define SPI2DR_R6_T6_MASK 0x40U
#define SPI2DR_R7_T7_MASK 0x80U
#define SPI2DR_R8_T8_MASK 0x0100U
#define SPI2DR_R9_T9_MASK 0x0200U
#define SPI2DR_R10_T10_MASK 0x0400U
#define SPI2DR_R11_T11_MASK 0x0800U
#define SPI2DR_R12_T12_MASK 0x1000U
#define SPI2DR_R13_T13_MASK 0x2000U
#define SPI2DR_R14_T14_MASK 0x4000U
#define SPI2DR_R15_T15_MASK 0x8000U
/*** FCLKDIV - Flash Clock Divider Register; 0x00000100 ***/
typedef union {
byte Byte;
struct {
byte FDIV0 :1; /* Clock Divider Bit 0 */
byte FDIV1 :1; /* Clock Divider Bit 1 */
byte FDIV2 :1; /* Clock Divider Bit 2 */
byte FDIV3 :1; /* Clock Divider Bit 3 */
byte FDIV4 :1; /* Clock Divider Bit 4 */
byte FDIV5 :1; /* Clock Divider Bit 5 */
byte FDIVLCK :1; /* Clock divider locked */
byte FDIVLD :1; /* Clock Divider Loaded */
} Bits;
struct {
byte grpFDIV :6;
byte :1;
byte :1;
} MergedBits;
} FCLKDIVSTR;
extern volatile FCLKDIVSTR _FCLKDIV @(REG_BASE + 0x00000100UL);
#define FCLKDIV _FCLKDIV.Byte
#define FCLKDIV_FDIV0 _FCLKDIV.Bits.FDIV0
#define FCLKDIV_FDIV1 _FCLKDIV.Bits.FDIV1
#define FCLKDIV_FDIV2 _FCLKDIV.Bits.FDIV2
#define FCLKDIV_FDIV3 _FCLKDIV.Bits.FDIV3
#define FCLKDIV_FDIV4 _FCLKDIV.Bits.FDIV4
#define FCLKDIV_FDIV5 _FCLKDIV.Bits.FDIV5
#define FCLKDIV_FDIVLCK _FCLKDIV.Bits.FDIVLCK
#define FCLKDIV_FDIVLD _FCLKDIV.Bits.FDIVLD
#define FCLKDIV_FDIV _FCLKDIV.MergedBits.grpFDIV
#define FCLKDIV_FDIV0_MASK 0x01U
#define FCLKDIV_FDIV1_MASK 0x02U
#define FCLKDIV_FDIV2_MASK 0x04U
#define FCLKDIV_FDIV3_MASK 0x08U
#define FCLKDIV_FDIV4_MASK 0x10U
#define FCLKDIV_FDIV5_MASK 0x20U
#define FCLKDIV_FDIVLCK_MASK 0x40U
#define FCLKDIV_FDIVLD_MASK 0x80U
#define FCLKDIV_FDIV_MASK 0x3FU
#define FCLKDIV_FDIV_BITNUM 0x00U
/*** FSEC - Flash Security Register; 0x00000101 ***/
typedef union {
byte Byte;
struct {
byte SEC0 :1; /* Flash Security Bit 0 */
byte SEC1 :1; /* Flash Security Bit 1 */
byte RNV2 :1; /* Reserved Nonvolatile Bit 2 */
byte RNV3 :1; /* Reserved Nonvolatile Bit 3 */
byte RNV4 :1; /* Reserved Nonvolatile Bit 4 */
byte RNV5 :1; /* Reserved Nonvolatile Bit 5 */
byte KEYEN0 :1; /* Backdoor Key Security Enable Bit 0 */
byte KEYEN1 :1; /* Backdoor Key Security Enable Bit 1 */
} Bits;
struct {
byte grpSEC :2;
byte grpRNV_2 :4;
byte grpKEYEN :2;
} MergedBits;
} FSECSTR;
extern volatile FSECSTR _FSEC @(REG_BASE + 0x00000101UL);
#define FSEC _FSEC.Byte
#define FSEC_SEC0 _FSEC.Bits.SEC0
#define FSEC_SEC1 _FSEC.Bits.SEC1
#define FSEC_RNV2 _FSEC.Bits.RNV2
#define FSEC_RNV3 _FSEC.Bits.RNV3
#define FSEC_RNV4 _FSEC.Bits.RNV4
#define FSEC_RNV5 _FSEC.Bits.RNV5
#define FSEC_KEYEN0 _FSEC.Bits.KEYEN0
#define FSEC_KEYEN1 _FSEC.Bits.KEYEN1
#define FSEC_SEC _FSEC.MergedBits.grpSEC
#define FSEC_RNV_2 _FSEC.MergedBits.grpRNV_2
#define FSEC_KEYEN _FSEC.MergedBits.grpKEYEN
#define FSEC_RNV FSEC_RNV_2
#define FSEC_SEC0_MASK 0x01U
#define FSEC_SEC1_MASK 0x02U
#define FSEC_RNV2_MASK 0x04U
#define FSEC_RNV3_MASK 0x08U
#define FSEC_RNV4_MASK 0x10U
#define FSEC_RNV5_MASK 0x20U
#define FSEC_KEYEN0_MASK 0x40U
#define FSEC_KEYEN1_MASK 0x80U
#define FSEC_SEC_MASK 0x03U
#define FSEC_SEC_BITNUM 0x00U
#define FSEC_RNV_2_MASK 0x3CU
#define FSEC_RNV_2_BITNUM 0x02U
#define FSEC_KEYEN_MASK 0xC0U
#define FSEC_KEYEN_BITNUM 0x06U
/*** FCCOBIX - Flash CCOB Index Register; 0x00000102 ***/
typedef union {
byte Byte;
struct {
byte CCOBIX0 :1; /* Common Command Register Index Bit 0 */
byte CCOBIX1 :1; /* Common Command Register Index Bit 1 */
byte CCOBIX2 :1; /* Common Command Register Index Bit 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpCCOBIX :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} FCCOBIXSTR;
extern volatile FCCOBIXSTR _FCCOBIX @(REG_BASE + 0x00000102UL);
#define FCCOBIX _FCCOBIX.Byte
#define FCCOBIX_CCOBIX0 _FCCOBIX.Bits.CCOBIX0
#define FCCOBIX_CCOBIX1 _FCCOBIX.Bits.CCOBIX1
#define FCCOBIX_CCOBIX2 _FCCOBIX.Bits.CCOBIX2
#define FCCOBIX_CCOBIX _FCCOBIX.MergedBits.grpCCOBIX
#define FCCOBIX_CCOBIX0_MASK 0x01U
#define FCCOBIX_CCOBIX1_MASK 0x02U
#define FCCOBIX_CCOBIX2_MASK 0x04U
#define FCCOBIX_CCOBIX_MASK 0x07U
#define FCCOBIX_CCOBIX_BITNUM 0x00U
/*** FCNFG - Flash Configuration Register; 0x00000104 ***/
typedef union {
byte Byte;
struct {
byte FSFD :1; /* Force Single Bit Fault Detect */
byte FDFD :1; /* Force Double Bit Fault Detect */
byte :1;
byte :1;
byte IGNSF :1; /* Ignore Single Bit Fault */
byte :1;
byte :1;
byte CCIE :1; /* Command Complete Interrupt Enable */
} Bits;
} FCNFGSTR;
extern volatile FCNFGSTR _FCNFG @(REG_BASE + 0x00000104UL);
#define FCNFG _FCNFG.Byte
#define FCNFG_FSFD _FCNFG.Bits.FSFD
#define FCNFG_FDFD _FCNFG.Bits.FDFD
#define FCNFG_IGNSF _FCNFG.Bits.IGNSF
#define FCNFG_CCIE _FCNFG.Bits.CCIE
#define FCNFG_FSFD_MASK 0x01U
#define FCNFG_FDFD_MASK 0x02U
#define FCNFG_IGNSF_MASK 0x10U
#define FCNFG_CCIE_MASK 0x80U
/*** FERCNFG - Flash Error Configuration Register; 0x00000105 ***/
typedef union {
byte Byte;
struct {
byte SFDIE :1; /* Single Bit Fault Detect Interrupt Enable */
byte DFDIE :1; /* Double Bit Fault Detect Interrupt Enable */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} FERCNFGSTR;
extern volatile FERCNFGSTR _FERCNFG @(REG_BASE + 0x00000105UL);
#define FERCNFG _FERCNFG.Byte
#define FERCNFG_SFDIE _FERCNFG.Bits.SFDIE
#define FERCNFG_DFDIE _FERCNFG.Bits.DFDIE
#define FERCNFG_SFDIE_MASK 0x01U
#define FERCNFG_DFDIE_MASK 0x02U
/*** FSTAT - Flash Status Register; 0x00000106 ***/
typedef union {
byte Byte;
struct {
byte MGSTAT0 :1; /* Memory Controller Command Completion Status Flag 0 */
byte MGSTAT1 :1; /* Memory Controller Command Completion Status Flag 1 */
byte :1;
byte MGBUSY :1; /* Memory Controller Busy Flag */
byte FPVIOL :1; /* Flash Protection Violation Flag */
byte ACCERR :1; /* Flash Access Error Flag */
byte :1;
byte CCIF :1; /* Command Complete Interrupt Flag */
} Bits;
struct {
byte grpMGSTAT :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} FSTATSTR;
extern volatile FSTATSTR _FSTAT @(REG_BASE + 0x00000106UL);
#define FSTAT _FSTAT.Byte
#define FSTAT_MGSTAT0 _FSTAT.Bits.MGSTAT0
#define FSTAT_MGSTAT1 _FSTAT.Bits.MGSTAT1
#define FSTAT_MGBUSY _FSTAT.Bits.MGBUSY
#define FSTAT_FPVIOL _FSTAT.Bits.FPVIOL
#define FSTAT_ACCERR _FSTAT.Bits.ACCERR
#define FSTAT_CCIF _FSTAT.Bits.CCIF
#define FSTAT_MGSTAT _FSTAT.MergedBits.grpMGSTAT
#define FSTAT_MGSTAT0_MASK 0x01U
#define FSTAT_MGSTAT1_MASK 0x02U
#define FSTAT_MGBUSY_MASK 0x08U
#define FSTAT_FPVIOL_MASK 0x10U
#define FSTAT_ACCERR_MASK 0x20U
#define FSTAT_CCIF_MASK 0x80U
#define FSTAT_MGSTAT_MASK 0x03U
#define FSTAT_MGSTAT_BITNUM 0x00U
/*** FERSTAT - Flash Error Status Register; 0x00000107 ***/
typedef union {
byte Byte;
struct {
byte SFDIF :1; /* Single Bit Fault Detect Interrupt Flag */
byte DFDIF :1; /* Double Bit Fault Detect Interrupt Flag */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} FERSTATSTR;
extern volatile FERSTATSTR _FERSTAT @(REG_BASE + 0x00000107UL);
#define FERSTAT _FERSTAT.Byte
#define FERSTAT_SFDIF _FERSTAT.Bits.SFDIF
#define FERSTAT_DFDIF _FERSTAT.Bits.DFDIF
#define FERSTAT_SFDIF_MASK 0x01U
#define FERSTAT_DFDIF_MASK 0x02U
/*** FPROT - P-Flash Protection Register; 0x00000108 ***/
typedef union {
byte Byte;
struct {
byte FPLS0 :1; /* Flash Protection Lower Address Size Bit 0 */
byte FPLS1 :1; /* Flash Protection Lower Address Size Bit 1 */
byte FPLDIS :1; /* Flash Protection Lower Address Range Disable */
byte FPHS0 :1; /* Flash Protection Higher Address Size Bit 0 */
byte FPHS1 :1; /* Flash Protection Higher Address Size Bit 1 */
byte FPHDIS :1; /* Flash Protection Higher Address Range Disable */
byte RNV6 :1; /* Reserved Nonvolatile Bit */
byte FPOPEN :1; /* Flash Protection Operation Enable */
} Bits;
struct {
byte grpFPLS :2;
byte :1;
byte grpFPHS :2;
byte :1;
byte grpRNV_6 :1;
byte :1;
} MergedBits;
} FPROTSTR;
extern volatile FPROTSTR _FPROT @(REG_BASE + 0x00000108UL);
#define FPROT _FPROT.Byte
#define FPROT_FPLS0 _FPROT.Bits.FPLS0
#define FPROT_FPLS1 _FPROT.Bits.FPLS1
#define FPROT_FPLDIS _FPROT.Bits.FPLDIS
#define FPROT_FPHS0 _FPROT.Bits.FPHS0
#define FPROT_FPHS1 _FPROT.Bits.FPHS1
#define FPROT_FPHDIS _FPROT.Bits.FPHDIS
#define FPROT_RNV6 _FPROT.Bits.RNV6
#define FPROT_FPOPEN _FPROT.Bits.FPOPEN
#define FPROT_FPLS _FPROT.MergedBits.grpFPLS
#define FPROT_FPHS _FPROT.MergedBits.grpFPHS
#define FPROT_FPLS0_MASK 0x01U
#define FPROT_FPLS1_MASK 0x02U
#define FPROT_FPLDIS_MASK 0x04U
#define FPROT_FPHS0_MASK 0x08U
#define FPROT_FPHS1_MASK 0x10U
#define FPROT_FPHDIS_MASK 0x20U
#define FPROT_RNV6_MASK 0x40U
#define FPROT_FPOPEN_MASK 0x80U
#define FPROT_FPLS_MASK 0x03U
#define FPROT_FPLS_BITNUM 0x00U
#define FPROT_FPHS_MASK 0x18U
#define FPROT_FPHS_BITNUM 0x03U
/*** DFPROT - D-Flash Protection Register; 0x00000109 ***/
typedef union {
byte Byte;
struct {
byte DPS0 :1; /* D-Flash Protection Size Bit 0 */
byte DPS1 :1; /* D-Flash Protection Size Bit 1 */
byte DPS2 :1; /* D-Flash Protection Size Bit 2 */
byte DPS3 :1; /* D-Flash Protection Size Bit 3 */
byte DPS4 :1; /* D-Flash Protection Size Bit 4 */
byte DPS5 :1; /* D-Flash Protection Size Bit 5 */
byte DPS6 :1; /* D-Flash Protection Size Bit 6 */
byte DPOPEN :1; /* D-Flash Protection Control */
} Bits;
struct {
byte grpDPS :7;
byte :1;
} MergedBits;
} DFPROTSTR;
extern volatile DFPROTSTR _DFPROT @(REG_BASE + 0x00000109UL);
#define DFPROT _DFPROT.Byte
#define DFPROT_DPS0 _DFPROT.Bits.DPS0
#define DFPROT_DPS1 _DFPROT.Bits.DPS1
#define DFPROT_DPS2 _DFPROT.Bits.DPS2
#define DFPROT_DPS3 _DFPROT.Bits.DPS3
#define DFPROT_DPS4 _DFPROT.Bits.DPS4
#define DFPROT_DPS5 _DFPROT.Bits.DPS5
#define DFPROT_DPS6 _DFPROT.Bits.DPS6
#define DFPROT_DPOPEN _DFPROT.Bits.DPOPEN
#define DFPROT_DPS _DFPROT.MergedBits.grpDPS
#define DFPROT_DPS0_MASK 0x01U
#define DFPROT_DPS1_MASK 0x02U
#define DFPROT_DPS2_MASK 0x04U
#define DFPROT_DPS3_MASK 0x08U
#define DFPROT_DPS4_MASK 0x10U
#define DFPROT_DPS5_MASK 0x20U
#define DFPROT_DPS6_MASK 0x40U
#define DFPROT_DPOPEN_MASK 0x80U
#define DFPROT_DPS_MASK 0x7FU
#define DFPROT_DPS_BITNUM 0x00U
/*** FCCOB - Flash Common Command Object Register; 0x0000010A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** FCCOBHI - Flash Common Command Object Register High; 0x0000010A ***/
union {
byte Byte;
struct {
byte CCOB8 :1; /* Flash Common Command Object Bit 8 */
byte CCOB9 :1; /* Flash Common Command Object Bit 9 */
byte CCOB10 :1; /* Flash Common Command Object Bit 10 */
byte CCOB11 :1; /* Flash Common Command Object Bit 11 */
byte CCOB12 :1; /* Flash Common Command Object Bit 12 */
byte CCOB13 :1; /* Flash Common Command Object Bit 13 */
byte CCOB14 :1; /* Flash Common Command Object Bit 14 */
byte CCOB15 :1; /* Flash Common Command Object Bit 15 */
} Bits;
} FCCOBHISTR;
#define FCCOBHI _FCCOB.Overlap_STR.FCCOBHISTR.Byte
#define FCCOBHI_CCOB8 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB8
#define FCCOBHI_CCOB9 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB9
#define FCCOBHI_CCOB10 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB10
#define FCCOBHI_CCOB11 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB11
#define FCCOBHI_CCOB12 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB12
#define FCCOBHI_CCOB13 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB13
#define FCCOBHI_CCOB14 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB14
#define FCCOBHI_CCOB15 _FCCOB.Overlap_STR.FCCOBHISTR.Bits.CCOB15
#define FCCOBHI_CCOB8_MASK 0x01U
#define FCCOBHI_CCOB9_MASK 0x02U
#define FCCOBHI_CCOB10_MASK 0x04U
#define FCCOBHI_CCOB11_MASK 0x08U
#define FCCOBHI_CCOB12_MASK 0x10U
#define FCCOBHI_CCOB13_MASK 0x20U
#define FCCOBHI_CCOB14_MASK 0x40U
#define FCCOBHI_CCOB15_MASK 0x80U
/*** FCCOBLO - Flash Common Command Object Register Low; 0x0000010B ***/
union {
byte Byte;
struct {
byte CCOB0 :1; /* Flash Common Command Object Bit 0 */
byte CCOB1 :1; /* Flash Common Command Object Bit 1 */
byte CCOB2 :1; /* Flash Common Command Object Bit 2 */
byte CCOB3 :1; /* Flash Common Command Object Bit 3 */
byte CCOB4 :1; /* Flash Common Command Object Bit 4 */
byte CCOB5 :1; /* Flash Common Command Object Bit 5 */
byte CCOB6 :1; /* Flash Common Command Object Bit 6 */
byte CCOB7 :1; /* Flash Common Command Object Bit 7 */
} Bits;
} FCCOBLOSTR;
#define FCCOBLO _FCCOB.Overlap_STR.FCCOBLOSTR.Byte
#define FCCOBLO_CCOB0 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB0
#define FCCOBLO_CCOB1 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB1
#define FCCOBLO_CCOB2 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB2
#define FCCOBLO_CCOB3 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB3
#define FCCOBLO_CCOB4 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB4
#define FCCOBLO_CCOB5 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB5
#define FCCOBLO_CCOB6 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB6
#define FCCOBLO_CCOB7 _FCCOB.Overlap_STR.FCCOBLOSTR.Bits.CCOB7
#define FCCOBLO_CCOB0_MASK 0x01U
#define FCCOBLO_CCOB1_MASK 0x02U
#define FCCOBLO_CCOB2_MASK 0x04U
#define FCCOBLO_CCOB3_MASK 0x08U
#define FCCOBLO_CCOB4_MASK 0x10U
#define FCCOBLO_CCOB5_MASK 0x20U
#define FCCOBLO_CCOB6_MASK 0x40U
#define FCCOBLO_CCOB7_MASK 0x80U
} Overlap_STR;
struct {
word CCOB0 :1; /* Flash Common Command Object Bit 0 */
word CCOB1 :1; /* Flash Common Command Object Bit 1 */
word CCOB2 :1; /* Flash Common Command Object Bit 2 */
word CCOB3 :1; /* Flash Common Command Object Bit 3 */
word CCOB4 :1; /* Flash Common Command Object Bit 4 */
word CCOB5 :1; /* Flash Common Command Object Bit 5 */
word CCOB6 :1; /* Flash Common Command Object Bit 6 */
word CCOB7 :1; /* Flash Common Command Object Bit 7 */
word CCOB8 :1; /* Flash Common Command Object Bit 8 */
word CCOB9 :1; /* Flash Common Command Object Bit 9 */
word CCOB10 :1; /* Flash Common Command Object Bit 10 */
word CCOB11 :1; /* Flash Common Command Object Bit 11 */
word CCOB12 :1; /* Flash Common Command Object Bit 12 */
word CCOB13 :1; /* Flash Common Command Object Bit 13 */
word CCOB14 :1; /* Flash Common Command Object Bit 14 */
word CCOB15 :1; /* Flash Common Command Object Bit 15 */
} Bits;
} FCCOBSTR;
extern volatile FCCOBSTR _FCCOB @(REG_BASE + 0x0000010AUL);
#define FCCOB _FCCOB.Word
#define FCCOB_CCOB0 _FCCOB.Bits.CCOB0
#define FCCOB_CCOB1 _FCCOB.Bits.CCOB1
#define FCCOB_CCOB2 _FCCOB.Bits.CCOB2
#define FCCOB_CCOB3 _FCCOB.Bits.CCOB3
#define FCCOB_CCOB4 _FCCOB.Bits.CCOB4
#define FCCOB_CCOB5 _FCCOB.Bits.CCOB5
#define FCCOB_CCOB6 _FCCOB.Bits.CCOB6
#define FCCOB_CCOB7 _FCCOB.Bits.CCOB7
#define FCCOB_CCOB8 _FCCOB.Bits.CCOB8
#define FCCOB_CCOB9 _FCCOB.Bits.CCOB9
#define FCCOB_CCOB10 _FCCOB.Bits.CCOB10
#define FCCOB_CCOB11 _FCCOB.Bits.CCOB11
#define FCCOB_CCOB12 _FCCOB.Bits.CCOB12
#define FCCOB_CCOB13 _FCCOB.Bits.CCOB13
#define FCCOB_CCOB14 _FCCOB.Bits.CCOB14
#define FCCOB_CCOB15 _FCCOB.Bits.CCOB15
#define FCCOB_CCOB0_MASK 0x01U
#define FCCOB_CCOB1_MASK 0x02U
#define FCCOB_CCOB2_MASK 0x04U
#define FCCOB_CCOB3_MASK 0x08U
#define FCCOB_CCOB4_MASK 0x10U
#define FCCOB_CCOB5_MASK 0x20U
#define FCCOB_CCOB6_MASK 0x40U
#define FCCOB_CCOB7_MASK 0x80U
#define FCCOB_CCOB8_MASK 0x0100U
#define FCCOB_CCOB9_MASK 0x0200U
#define FCCOB_CCOB10_MASK 0x0400U
#define FCCOB_CCOB11_MASK 0x0800U
#define FCCOB_CCOB12_MASK 0x1000U
#define FCCOB_CCOB13_MASK 0x2000U
#define FCCOB_CCOB14_MASK 0x4000U
#define FCCOB_CCOB15_MASK 0x8000U
/*** FOPT - Flash Option Register; 0x00000110 ***/
typedef union {
byte Byte;
struct {
byte NV0 :1; /* Nonvolatile Bit 0 */
byte NV1 :1; /* Nonvolatile Bit 1 */
byte NV2 :1; /* Nonvolatile Bit 2 */
byte NV3 :1; /* Nonvolatile Bit 3 */
byte NV4 :1; /* Nonvolatile Bit 4 */
byte NV5 :1; /* Nonvolatile Bit 5 */
byte NV6 :1; /* Nonvolatile Bit 6 */
byte NV7 :1; /* Nonvolatile Bit 7 */
} Bits;
} FOPTSTR;
extern volatile FOPTSTR _FOPT @(REG_BASE + 0x00000110UL);
#define FOPT _FOPT.Byte
#define FOPT_NV0 _FOPT.Bits.NV0
#define FOPT_NV1 _FOPT.Bits.NV1
#define FOPT_NV2 _FOPT.Bits.NV2
#define FOPT_NV3 _FOPT.Bits.NV3
#define FOPT_NV4 _FOPT.Bits.NV4
#define FOPT_NV5 _FOPT.Bits.NV5
#define FOPT_NV6 _FOPT.Bits.NV6
#define FOPT_NV7 _FOPT.Bits.NV7
#define FOPT_NV0_MASK 0x01U
#define FOPT_NV1_MASK 0x02U
#define FOPT_NV2_MASK 0x04U
#define FOPT_NV3_MASK 0x08U
#define FOPT_NV4_MASK 0x10U
#define FOPT_NV5_MASK 0x20U
#define FOPT_NV6_MASK 0x40U
#define FOPT_NV7_MASK 0x80U
/*** IVBR - Interrupt Vector Base Register; 0x00000120 ***/
typedef union {
byte Byte;
struct {
byte IVB_ADDR0 :1; /* Interrupt Vector Base Address Bits, bit 0 */
byte IVB_ADDR1 :1; /* Interrupt Vector Base Address Bits, bit 1 */
byte IVB_ADDR2 :1; /* Interrupt Vector Base Address Bits, bit 2 */
byte IVB_ADDR3 :1; /* Interrupt Vector Base Address Bits, bit 3 */
byte IVB_ADDR4 :1; /* Interrupt Vector Base Address Bits, bit 4 */
byte IVB_ADDR5 :1; /* Interrupt Vector Base Address Bits, bit 5 */
byte IVB_ADDR6 :1; /* Interrupt Vector Base Address Bits, bit 6 */
byte IVB_ADDR7 :1; /* Interrupt Vector Base Address Bits, bit 7 */
} Bits;
} IVBRSTR;
extern volatile IVBRSTR _IVBR @(REG_BASE + 0x00000120UL);
#define IVBR _IVBR.Byte
#define IVBR_IVB_ADDR0 _IVBR.Bits.IVB_ADDR0
#define IVBR_IVB_ADDR1 _IVBR.Bits.IVB_ADDR1
#define IVBR_IVB_ADDR2 _IVBR.Bits.IVB_ADDR2
#define IVBR_IVB_ADDR3 _IVBR.Bits.IVB_ADDR3
#define IVBR_IVB_ADDR4 _IVBR.Bits.IVB_ADDR4
#define IVBR_IVB_ADDR5 _IVBR.Bits.IVB_ADDR5
#define IVBR_IVB_ADDR6 _IVBR.Bits.IVB_ADDR6
#define IVBR_IVB_ADDR7 _IVBR.Bits.IVB_ADDR7
#define IVBR_IVB_ADDR0_MASK 0x01U
#define IVBR_IVB_ADDR1_MASK 0x02U
#define IVBR_IVB_ADDR2_MASK 0x04U
#define IVBR_IVB_ADDR3_MASK 0x08U
#define IVBR_IVB_ADDR4_MASK 0x10U
#define IVBR_IVB_ADDR5_MASK 0x20U
#define IVBR_IVB_ADDR6_MASK 0x40U
#define IVBR_IVB_ADDR7_MASK 0x80U
/*** CANCTL0 - MSCAN Control 0 Register; 0x00000140 ***/
typedef union {
byte Byte;
struct {
byte INITRQ :1; /* Initialization Mode Request */
byte SLPRQ :1; /* Sleep Mode Request */
byte WUPE :1; /* Wake-Up Enable */
byte TIME :1; /* Timer Enable */
byte SYNCH :1; /* Synchronized Status */
byte CSWAI :1; /* CAN Stops in Wait Mode */
byte RXACT :1; /* Receiver Active Status */
byte RXFRM :1; /* Received Frame Flag */
} Bits;
} CANCTL0STR;
extern volatile CANCTL0STR _CANCTL0 @(REG_BASE + 0x00000140UL);
#define CANCTL0 _CANCTL0.Byte
#define CANCTL0_INITRQ _CANCTL0.Bits.INITRQ
#define CANCTL0_SLPRQ _CANCTL0.Bits.SLPRQ
#define CANCTL0_WUPE _CANCTL0.Bits.WUPE
#define CANCTL0_TIME _CANCTL0.Bits.TIME
#define CANCTL0_SYNCH _CANCTL0.Bits.SYNCH
#define CANCTL0_CSWAI _CANCTL0.Bits.CSWAI
#define CANCTL0_RXACT _CANCTL0.Bits.RXACT
#define CANCTL0_RXFRM _CANCTL0.Bits.RXFRM
/* CANCTL_ARR: Access 2 CANCTLx registers in an array */
#define CANCTL_ARR ((volatile byte *) &CANCTL0)
#define CANCTL0_INITRQ_MASK 0x01U
#define CANCTL0_SLPRQ_MASK 0x02U
#define CANCTL0_WUPE_MASK 0x04U
#define CANCTL0_TIME_MASK 0x08U
#define CANCTL0_SYNCH_MASK 0x10U
#define CANCTL0_CSWAI_MASK 0x20U
#define CANCTL0_RXACT_MASK 0x40U
#define CANCTL0_RXFRM_MASK 0x80U
/*** CANCTL1 - MSCAN Control 1 Register; 0x00000141 ***/
typedef union {
byte Byte;
struct {
byte INITAK :1; /* Initialization Mode Acknowledge */
byte SLPAK :1; /* Sleep Mode Acknowledge */
byte WUPM :1; /* Wake-Up Mode */
byte BORM :1; /* Bus-Off Recovery Mode */
byte LISTEN :1; /* Listen Only Mode */
byte LOOPB :1; /* Loop Back Self Test Mode */
byte CLKSRC :1; /* MSCAN Clock Source */
byte CANE :1; /* MSCAN Enable */
} Bits;
} CANCTL1STR;
extern volatile CANCTL1STR _CANCTL1 @(REG_BASE + 0x00000141UL);
#define CANCTL1 _CANCTL1.Byte
#define CANCTL1_INITAK _CANCTL1.Bits.INITAK
#define CANCTL1_SLPAK _CANCTL1.Bits.SLPAK
#define CANCTL1_WUPM _CANCTL1.Bits.WUPM
#define CANCTL1_BORM _CANCTL1.Bits.BORM
#define CANCTL1_LISTEN _CANCTL1.Bits.LISTEN
#define CANCTL1_LOOPB _CANCTL1.Bits.LOOPB
#define CANCTL1_CLKSRC _CANCTL1.Bits.CLKSRC
#define CANCTL1_CANE _CANCTL1.Bits.CANE
#define CANCTL1_INITAK_MASK 0x01U
#define CANCTL1_SLPAK_MASK 0x02U
#define CANCTL1_WUPM_MASK 0x04U
#define CANCTL1_BORM_MASK 0x08U
#define CANCTL1_LISTEN_MASK 0x10U
#define CANCTL1_LOOPB_MASK 0x20U
#define CANCTL1_CLKSRC_MASK 0x40U
#define CANCTL1_CANE_MASK 0x80U
/*** CANBTR0 - MSCAN Bus Timing Register 0; 0x00000142 ***/
typedef union {
byte Byte;
struct {
byte BRP0 :1; /* Baud Rate Prescaler 0 */
byte BRP1 :1; /* Baud Rate Prescaler 1 */
byte BRP2 :1; /* Baud Rate Prescaler 2 */
byte BRP3 :1; /* Baud Rate Prescaler 3 */
byte BRP4 :1; /* Baud Rate Prescaler 4 */
byte BRP5 :1; /* Baud Rate Prescaler 5 */
byte SJW0 :1; /* Synchronization Jump Width 0 */
byte SJW1 :1; /* Synchronization Jump Width 1 */
} Bits;
struct {
byte grpBRP :6;
byte grpSJW :2;
} MergedBits;
} CANBTR0STR;
extern volatile CANBTR0STR _CANBTR0 @(REG_BASE + 0x00000142UL);
#define CANBTR0 _CANBTR0.Byte
#define CANBTR0_BRP0 _CANBTR0.Bits.BRP0
#define CANBTR0_BRP1 _CANBTR0.Bits.BRP1
#define CANBTR0_BRP2 _CANBTR0.Bits.BRP2
#define CANBTR0_BRP3 _CANBTR0.Bits.BRP3
#define CANBTR0_BRP4 _CANBTR0.Bits.BRP4
#define CANBTR0_BRP5 _CANBTR0.Bits.BRP5
#define CANBTR0_SJW0 _CANBTR0.Bits.SJW0
#define CANBTR0_SJW1 _CANBTR0.Bits.SJW1
/* CANBTR_ARR: Access 2 CANBTRx registers in an array */
#define CANBTR_ARR ((volatile byte *) &CANBTR0)
#define CANBTR0_BRP _CANBTR0.MergedBits.grpBRP
#define CANBTR0_SJW _CANBTR0.MergedBits.grpSJW
#define CANBTR0_BRP0_MASK 0x01U
#define CANBTR0_BRP1_MASK 0x02U
#define CANBTR0_BRP2_MASK 0x04U
#define CANBTR0_BRP3_MASK 0x08U
#define CANBTR0_BRP4_MASK 0x10U
#define CANBTR0_BRP5_MASK 0x20U
#define CANBTR0_SJW0_MASK 0x40U
#define CANBTR0_SJW1_MASK 0x80U
#define CANBTR0_BRP_MASK 0x3FU
#define CANBTR0_BRP_BITNUM 0x00U
#define CANBTR0_SJW_MASK 0xC0U
#define CANBTR0_SJW_BITNUM 0x06U
/*** CANBTR1 - MSCAN Bus Timing Register 1; 0x00000143 ***/
typedef union {
byte Byte;
struct {
byte TSEG10 :1; /* Time Segment 10 */
byte TSEG11 :1; /* Time Segment 11 */
byte TSEG12 :1; /* Time Segment 12 */
byte TSEG13 :1; /* Time Segment 13 */
byte TSEG20 :1; /* Time Segment 20 */
byte TSEG21 :1; /* Time Segment 21 */
byte TSEG22 :1; /* Time Segment 22 */
byte SAMP :1; /* Sampling */
} Bits;
struct {
byte grpTSEG_10 :4;
byte grpTSEG_20 :3;
byte :1;
} MergedBits;
} CANBTR1STR;
extern volatile CANBTR1STR _CANBTR1 @(REG_BASE + 0x00000143UL);
#define CANBTR1 _CANBTR1.Byte
#define CANBTR1_TSEG10 _CANBTR1.Bits.TSEG10
#define CANBTR1_TSEG11 _CANBTR1.Bits.TSEG11
#define CANBTR1_TSEG12 _CANBTR1.Bits.TSEG12
#define CANBTR1_TSEG13 _CANBTR1.Bits.TSEG13
#define CANBTR1_TSEG20 _CANBTR1.Bits.TSEG20
#define CANBTR1_TSEG21 _CANBTR1.Bits.TSEG21
#define CANBTR1_TSEG22 _CANBTR1.Bits.TSEG22
#define CANBTR1_SAMP _CANBTR1.Bits.SAMP
#define CANBTR1_TSEG_10 _CANBTR1.MergedBits.grpTSEG_10
#define CANBTR1_TSEG_20 _CANBTR1.MergedBits.grpTSEG_20
#define CANBTR1_TSEG CANBTR1_TSEG_10
#define CANBTR1_TSEG10_MASK 0x01U
#define CANBTR1_TSEG11_MASK 0x02U
#define CANBTR1_TSEG12_MASK 0x04U
#define CANBTR1_TSEG13_MASK 0x08U
#define CANBTR1_TSEG20_MASK 0x10U
#define CANBTR1_TSEG21_MASK 0x20U
#define CANBTR1_TSEG22_MASK 0x40U
#define CANBTR1_SAMP_MASK 0x80U
#define CANBTR1_TSEG_10_MASK 0x0FU
#define CANBTR1_TSEG_10_BITNUM 0x00U
#define CANBTR1_TSEG_20_MASK 0x70U
#define CANBTR1_TSEG_20_BITNUM 0x04U
/*** CANRFLG - MSCAN Receiver Flag Register; 0x00000144 ***/
typedef union {
byte Byte;
struct {
byte RXF :1; /* Receive Buffer Full */
byte OVRIF :1; /* Overrun Interrupt Flag */
byte TSTAT0 :1; /* Transmitter Status Bit 0 */
byte TSTAT1 :1; /* Transmitter Status Bit 1 */
byte RSTAT0 :1; /* Receiver Status Bit 0 */
byte RSTAT1 :1; /* Receiver Status Bit 1 */
byte CSCIF :1; /* CAN Status Change Interrupt Flag */
byte WUPIF :1; /* Wake-up Interrupt Flag */
} Bits;
struct {
byte :1;
byte :1;
byte grpTSTAT :2;
byte grpRSTAT :2;
byte :1;
byte :1;
} MergedBits;
} CANRFLGSTR;
extern volatile CANRFLGSTR _CANRFLG @(REG_BASE + 0x00000144UL);
#define CANRFLG _CANRFLG.Byte
#define CANRFLG_RXF _CANRFLG.Bits.RXF
#define CANRFLG_OVRIF _CANRFLG.Bits.OVRIF
#define CANRFLG_TSTAT0 _CANRFLG.Bits.TSTAT0
#define CANRFLG_TSTAT1 _CANRFLG.Bits.TSTAT1
#define CANRFLG_RSTAT0 _CANRFLG.Bits.RSTAT0
#define CANRFLG_RSTAT1 _CANRFLG.Bits.RSTAT1
#define CANRFLG_CSCIF _CANRFLG.Bits.CSCIF
#define CANRFLG_WUPIF _CANRFLG.Bits.WUPIF
#define CANRFLG_TSTAT _CANRFLG.MergedBits.grpTSTAT
#define CANRFLG_RSTAT _CANRFLG.MergedBits.grpRSTAT
#define CANRFLG_RXF_MASK 0x01U
#define CANRFLG_OVRIF_MASK 0x02U
#define CANRFLG_TSTAT0_MASK 0x04U
#define CANRFLG_TSTAT1_MASK 0x08U
#define CANRFLG_RSTAT0_MASK 0x10U
#define CANRFLG_RSTAT1_MASK 0x20U
#define CANRFLG_CSCIF_MASK 0x40U
#define CANRFLG_WUPIF_MASK 0x80U
#define CANRFLG_TSTAT_MASK 0x0CU
#define CANRFLG_TSTAT_BITNUM 0x02U
#define CANRFLG_RSTAT_MASK 0x30U
#define CANRFLG_RSTAT_BITNUM 0x04U
/*** CANRIER - MSCAN Receiver Interrupt Enable Register; 0x00000145 ***/
typedef union {
byte Byte;
struct {
byte RXFIE :1; /* Receiver Full Interrupt Enable */
byte OVRIE :1; /* Overrun Interrupt Enable */
byte TSTATE0 :1; /* Transmitter Status Change Enable 0 */
byte TSTATE1 :1; /* Transmitter Status Change Enable 1 */
byte RSTATE0 :1; /* Receiver Status Change Enable 0 */
byte RSTATE1 :1; /* Receiver Status Change Enable 1 */
byte CSCIE :1; /* CAN Status Change Interrupt Enable */
byte WUPIE :1; /* Wake-up Interrupt Enable */
} Bits;
struct {
byte :1;
byte :1;
byte grpTSTATE :2;
byte grpRSTATE :2;
byte :1;
byte :1;
} MergedBits;
} CANRIERSTR;
extern volatile CANRIERSTR _CANRIER @(REG_BASE + 0x00000145UL);
#define CANRIER _CANRIER.Byte
#define CANRIER_RXFIE _CANRIER.Bits.RXFIE
#define CANRIER_OVRIE _CANRIER.Bits.OVRIE
#define CANRIER_TSTATE0 _CANRIER.Bits.TSTATE0
#define CANRIER_TSTATE1 _CANRIER.Bits.TSTATE1
#define CANRIER_RSTATE0 _CANRIER.Bits.RSTATE0
#define CANRIER_RSTATE1 _CANRIER.Bits.RSTATE1
#define CANRIER_CSCIE _CANRIER.Bits.CSCIE
#define CANRIER_WUPIE _CANRIER.Bits.WUPIE
#define CANRIER_TSTATE _CANRIER.MergedBits.grpTSTATE
#define CANRIER_RSTATE _CANRIER.MergedBits.grpRSTATE
#define CANRIER_RXFIE_MASK 0x01U
#define CANRIER_OVRIE_MASK 0x02U
#define CANRIER_TSTATE0_MASK 0x04U
#define CANRIER_TSTATE1_MASK 0x08U
#define CANRIER_RSTATE0_MASK 0x10U
#define CANRIER_RSTATE1_MASK 0x20U
#define CANRIER_CSCIE_MASK 0x40U
#define CANRIER_WUPIE_MASK 0x80U
#define CANRIER_TSTATE_MASK 0x0CU
#define CANRIER_TSTATE_BITNUM 0x02U
#define CANRIER_RSTATE_MASK 0x30U
#define CANRIER_RSTATE_BITNUM 0x04U
/*** CANTFLG - MSCAN Transmitter Flag Register; 0x00000146 ***/
typedef union {
byte Byte;
struct {
byte TXE0 :1; /* Transmitter Buffer Empty 0 */
byte TXE1 :1; /* Transmitter Buffer Empty 1 */
byte TXE2 :1; /* Transmitter Buffer Empty 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpTXE :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CANTFLGSTR;
extern volatile CANTFLGSTR _CANTFLG @(REG_BASE + 0x00000146UL);
#define CANTFLG _CANTFLG.Byte
#define CANTFLG_TXE0 _CANTFLG.Bits.TXE0
#define CANTFLG_TXE1 _CANTFLG.Bits.TXE1
#define CANTFLG_TXE2 _CANTFLG.Bits.TXE2
#define CANTFLG_TXE _CANTFLG.MergedBits.grpTXE
#define CANTFLG_TXE0_MASK 0x01U
#define CANTFLG_TXE1_MASK 0x02U
#define CANTFLG_TXE2_MASK 0x04U
#define CANTFLG_TXE_MASK 0x07U
#define CANTFLG_TXE_BITNUM 0x00U
/*** CANTIER - MSCAN Transmitter Interrupt Enable Register; 0x00000147 ***/
typedef union {
byte Byte;
struct {
byte TXEIE0 :1; /* Transmitter Empty Interrupt Enable 0 */
byte TXEIE1 :1; /* Transmitter Empty Interrupt Enable 1 */
byte TXEIE2 :1; /* Transmitter Empty Interrupt Enable 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpTXEIE :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CANTIERSTR;
extern volatile CANTIERSTR _CANTIER @(REG_BASE + 0x00000147UL);
#define CANTIER _CANTIER.Byte
#define CANTIER_TXEIE0 _CANTIER.Bits.TXEIE0
#define CANTIER_TXEIE1 _CANTIER.Bits.TXEIE1
#define CANTIER_TXEIE2 _CANTIER.Bits.TXEIE2
#define CANTIER_TXEIE _CANTIER.MergedBits.grpTXEIE
#define CANTIER_TXEIE0_MASK 0x01U
#define CANTIER_TXEIE1_MASK 0x02U
#define CANTIER_TXEIE2_MASK 0x04U
#define CANTIER_TXEIE_MASK 0x07U
#define CANTIER_TXEIE_BITNUM 0x00U
/*** CANTARQ - MSCAN Transmitter Message Abort Request; 0x00000148 ***/
typedef union {
byte Byte;
struct {
byte ABTRQ0 :1; /* Abort Request 0 */
byte ABTRQ1 :1; /* Abort Request 1 */
byte ABTRQ2 :1; /* Abort Request 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpABTRQ :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CANTARQSTR;
extern volatile CANTARQSTR _CANTARQ @(REG_BASE + 0x00000148UL);
#define CANTARQ _CANTARQ.Byte
#define CANTARQ_ABTRQ0 _CANTARQ.Bits.ABTRQ0
#define CANTARQ_ABTRQ1 _CANTARQ.Bits.ABTRQ1
#define CANTARQ_ABTRQ2 _CANTARQ.Bits.ABTRQ2
#define CANTARQ_ABTRQ _CANTARQ.MergedBits.grpABTRQ
#define CANTARQ_ABTRQ0_MASK 0x01U
#define CANTARQ_ABTRQ1_MASK 0x02U
#define CANTARQ_ABTRQ2_MASK 0x04U
#define CANTARQ_ABTRQ_MASK 0x07U
#define CANTARQ_ABTRQ_BITNUM 0x00U
/*** CANTAAK - MSCAN Transmitter Message Abort Acknowledge; 0x00000149 ***/
typedef union {
byte Byte;
struct {
byte ABTAK0 :1; /* Abort Acknowledge 0 */
byte ABTAK1 :1; /* Abort Acknowledge 1 */
byte ABTAK2 :1; /* Abort Acknowledge 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpABTAK :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CANTAAKSTR;
extern volatile CANTAAKSTR _CANTAAK @(REG_BASE + 0x00000149UL);
#define CANTAAK _CANTAAK.Byte
#define CANTAAK_ABTAK0 _CANTAAK.Bits.ABTAK0
#define CANTAAK_ABTAK1 _CANTAAK.Bits.ABTAK1
#define CANTAAK_ABTAK2 _CANTAAK.Bits.ABTAK2
#define CANTAAK_ABTAK _CANTAAK.MergedBits.grpABTAK
#define CANTAAK_ABTAK0_MASK 0x01U
#define CANTAAK_ABTAK1_MASK 0x02U
#define CANTAAK_ABTAK2_MASK 0x04U
#define CANTAAK_ABTAK_MASK 0x07U
#define CANTAAK_ABTAK_BITNUM 0x00U
/*** CANTBSEL - MSCAN Transmit Buffer Selection; 0x0000014A ***/
typedef union {
byte Byte;
struct {
byte TX0 :1; /* Transmit Buffer Select 0 */
byte TX1 :1; /* Transmit Buffer Select 1 */
byte TX2 :1; /* Transmit Buffer Select 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpTX :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CANTBSELSTR;
extern volatile CANTBSELSTR _CANTBSEL @(REG_BASE + 0x0000014AUL);
#define CANTBSEL _CANTBSEL.Byte
#define CANTBSEL_TX0 _CANTBSEL.Bits.TX0
#define CANTBSEL_TX1 _CANTBSEL.Bits.TX1
#define CANTBSEL_TX2 _CANTBSEL.Bits.TX2
#define CANTBSEL_TX _CANTBSEL.MergedBits.grpTX
#define CANTBSEL_TX0_MASK 0x01U
#define CANTBSEL_TX1_MASK 0x02U
#define CANTBSEL_TX2_MASK 0x04U
#define CANTBSEL_TX_MASK 0x07U
#define CANTBSEL_TX_BITNUM 0x00U
/*** CANIDAC - MSCAN Identifier Acceptance Control Register; 0x0000014B ***/
typedef union {
byte Byte;
struct {
byte IDHIT0 :1; /* Identifier Acceptance Hit Indicator 0 */
byte IDHIT1 :1; /* Identifier Acceptance Hit Indicator 1 */
byte IDHIT2 :1; /* Identifier Acceptance Hit Indicator 2 */
byte :1;
byte IDAM0 :1; /* Identifier Acceptance Mode 0 */
byte IDAM1 :1; /* Identifier Acceptance Mode 1 */
byte :1;
byte :1;
} Bits;
struct {
byte grpIDHIT :3;
byte :1;
byte grpIDAM :2;
byte :1;
byte :1;
} MergedBits;
} CANIDACSTR;
extern volatile CANIDACSTR _CANIDAC @(REG_BASE + 0x0000014BUL);
#define CANIDAC _CANIDAC.Byte
#define CANIDAC_IDHIT0 _CANIDAC.Bits.IDHIT0
#define CANIDAC_IDHIT1 _CANIDAC.Bits.IDHIT1
#define CANIDAC_IDHIT2 _CANIDAC.Bits.IDHIT2
#define CANIDAC_IDAM0 _CANIDAC.Bits.IDAM0
#define CANIDAC_IDAM1 _CANIDAC.Bits.IDAM1
#define CANIDAC_IDHIT _CANIDAC.MergedBits.grpIDHIT
#define CANIDAC_IDAM _CANIDAC.MergedBits.grpIDAM
#define CANIDAC_IDHIT0_MASK 0x01U
#define CANIDAC_IDHIT1_MASK 0x02U
#define CANIDAC_IDHIT2_MASK 0x04U
#define CANIDAC_IDAM0_MASK 0x10U
#define CANIDAC_IDAM1_MASK 0x20U
#define CANIDAC_IDHIT_MASK 0x07U
#define CANIDAC_IDHIT_BITNUM 0x00U
#define CANIDAC_IDAM_MASK 0x30U
#define CANIDAC_IDAM_BITNUM 0x04U
/*** CANMISC - MSCAN Miscellaneous Register; 0x0000014D ***/
typedef union {
byte Byte;
struct {
byte BOHOLD :1; /* Bus-off State Hold Until User Request */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} CANMISCSTR;
extern volatile CANMISCSTR _CANMISC @(REG_BASE + 0x0000014DUL);
#define CANMISC _CANMISC.Byte
#define CANMISC_BOHOLD _CANMISC.Bits.BOHOLD
#define CANMISC_BOHOLD_MASK 0x01U
/*** CANRXERR - MSCAN Receive Error Counter Register; 0x0000014E ***/
typedef union {
byte Byte;
struct {
byte RXERR0 :1; /* Bit 0 */
byte RXERR1 :1; /* Bit 1 */
byte RXERR2 :1; /* Bit 2 */
byte RXERR3 :1; /* Bit 3 */
byte RXERR4 :1; /* Bit 4 */
byte RXERR5 :1; /* Bit 5 */
byte RXERR6 :1; /* Bit 6 */
byte RXERR7 :1; /* Bit 7 */
} Bits;
} CANRXERRSTR;
extern volatile CANRXERRSTR _CANRXERR @(REG_BASE + 0x0000014EUL);
#define CANRXERR _CANRXERR.Byte
#define CANRXERR_RXERR0 _CANRXERR.Bits.RXERR0
#define CANRXERR_RXERR1 _CANRXERR.Bits.RXERR1
#define CANRXERR_RXERR2 _CANRXERR.Bits.RXERR2
#define CANRXERR_RXERR3 _CANRXERR.Bits.RXERR3
#define CANRXERR_RXERR4 _CANRXERR.Bits.RXERR4
#define CANRXERR_RXERR5 _CANRXERR.Bits.RXERR5
#define CANRXERR_RXERR6 _CANRXERR.Bits.RXERR6
#define CANRXERR_RXERR7 _CANRXERR.Bits.RXERR7
#define CANRXERR_RXERR0_MASK 0x01U
#define CANRXERR_RXERR1_MASK 0x02U
#define CANRXERR_RXERR2_MASK 0x04U
#define CANRXERR_RXERR3_MASK 0x08U
#define CANRXERR_RXERR4_MASK 0x10U
#define CANRXERR_RXERR5_MASK 0x20U
#define CANRXERR_RXERR6_MASK 0x40U
#define CANRXERR_RXERR7_MASK 0x80U
/*** CANTXERR - MSCAN Transmit Error Counter Register; 0x0000014F ***/
typedef union {
byte Byte;
struct {
byte TXERR0 :1; /* Bit 0 */
byte TXERR1 :1; /* Bit 1 */
byte TXERR2 :1; /* Bit 2 */
byte TXERR3 :1; /* Bit 3 */
byte TXERR4 :1; /* Bit 4 */
byte TXERR5 :1; /* Bit 5 */
byte TXERR6 :1; /* Bit 6 */
byte TXERR7 :1; /* Bit 7 */
} Bits;
} CANTXERRSTR;
extern volatile CANTXERRSTR _CANTXERR @(REG_BASE + 0x0000014FUL);
#define CANTXERR _CANTXERR.Byte
#define CANTXERR_TXERR0 _CANTXERR.Bits.TXERR0
#define CANTXERR_TXERR1 _CANTXERR.Bits.TXERR1
#define CANTXERR_TXERR2 _CANTXERR.Bits.TXERR2
#define CANTXERR_TXERR3 _CANTXERR.Bits.TXERR3
#define CANTXERR_TXERR4 _CANTXERR.Bits.TXERR4
#define CANTXERR_TXERR5 _CANTXERR.Bits.TXERR5
#define CANTXERR_TXERR6 _CANTXERR.Bits.TXERR6
#define CANTXERR_TXERR7 _CANTXERR.Bits.TXERR7
#define CANTXERR_TXERR0_MASK 0x01U
#define CANTXERR_TXERR1_MASK 0x02U
#define CANTXERR_TXERR2_MASK 0x04U
#define CANTXERR_TXERR3_MASK 0x08U
#define CANTXERR_TXERR4_MASK 0x10U
#define CANTXERR_TXERR5_MASK 0x20U
#define CANTXERR_TXERR6_MASK 0x40U
#define CANTXERR_TXERR7_MASK 0x80U
/*** CANIDAR0 - MSCAN Identifier Acceptance Register 0; 0x00000150 ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR0STR;
extern volatile CANIDAR0STR _CANIDAR0 @(REG_BASE + 0x00000150UL);
#define CANIDAR0 _CANIDAR0.Byte
#define CANIDAR0_AC0 _CANIDAR0.Bits.AC0
#define CANIDAR0_AC1 _CANIDAR0.Bits.AC1
#define CANIDAR0_AC2 _CANIDAR0.Bits.AC2
#define CANIDAR0_AC3 _CANIDAR0.Bits.AC3
#define CANIDAR0_AC4 _CANIDAR0.Bits.AC4
#define CANIDAR0_AC5 _CANIDAR0.Bits.AC5
#define CANIDAR0_AC6 _CANIDAR0.Bits.AC6
#define CANIDAR0_AC7 _CANIDAR0.Bits.AC7
/* CANIDAR_ARR: Access 4 CANIDARx registers in an array */
#define CANIDAR_ARR ((volatile byte *) &CANIDAR0)
#define CANIDAR0_AC0_MASK 0x01U
#define CANIDAR0_AC1_MASK 0x02U
#define CANIDAR0_AC2_MASK 0x04U
#define CANIDAR0_AC3_MASK 0x08U
#define CANIDAR0_AC4_MASK 0x10U
#define CANIDAR0_AC5_MASK 0x20U
#define CANIDAR0_AC6_MASK 0x40U
#define CANIDAR0_AC7_MASK 0x80U
/*** CANIDAR1 - MSCAN Identifier Acceptance Register 1; 0x00000151 ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR1STR;
extern volatile CANIDAR1STR _CANIDAR1 @(REG_BASE + 0x00000151UL);
#define CANIDAR1 _CANIDAR1.Byte
#define CANIDAR1_AC0 _CANIDAR1.Bits.AC0
#define CANIDAR1_AC1 _CANIDAR1.Bits.AC1
#define CANIDAR1_AC2 _CANIDAR1.Bits.AC2
#define CANIDAR1_AC3 _CANIDAR1.Bits.AC3
#define CANIDAR1_AC4 _CANIDAR1.Bits.AC4
#define CANIDAR1_AC5 _CANIDAR1.Bits.AC5
#define CANIDAR1_AC6 _CANIDAR1.Bits.AC6
#define CANIDAR1_AC7 _CANIDAR1.Bits.AC7
#define CANIDAR1_AC0_MASK 0x01U
#define CANIDAR1_AC1_MASK 0x02U
#define CANIDAR1_AC2_MASK 0x04U
#define CANIDAR1_AC3_MASK 0x08U
#define CANIDAR1_AC4_MASK 0x10U
#define CANIDAR1_AC5_MASK 0x20U
#define CANIDAR1_AC6_MASK 0x40U
#define CANIDAR1_AC7_MASK 0x80U
/*** CANIDAR2 - MSCAN Identifier Acceptance Register 2; 0x00000152 ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR2STR;
extern volatile CANIDAR2STR _CANIDAR2 @(REG_BASE + 0x00000152UL);
#define CANIDAR2 _CANIDAR2.Byte
#define CANIDAR2_AC0 _CANIDAR2.Bits.AC0
#define CANIDAR2_AC1 _CANIDAR2.Bits.AC1
#define CANIDAR2_AC2 _CANIDAR2.Bits.AC2
#define CANIDAR2_AC3 _CANIDAR2.Bits.AC3
#define CANIDAR2_AC4 _CANIDAR2.Bits.AC4
#define CANIDAR2_AC5 _CANIDAR2.Bits.AC5
#define CANIDAR2_AC6 _CANIDAR2.Bits.AC6
#define CANIDAR2_AC7 _CANIDAR2.Bits.AC7
#define CANIDAR2_AC0_MASK 0x01U
#define CANIDAR2_AC1_MASK 0x02U
#define CANIDAR2_AC2_MASK 0x04U
#define CANIDAR2_AC3_MASK 0x08U
#define CANIDAR2_AC4_MASK 0x10U
#define CANIDAR2_AC5_MASK 0x20U
#define CANIDAR2_AC6_MASK 0x40U
#define CANIDAR2_AC7_MASK 0x80U
/*** CANIDAR3 - MSCAN Identifier Acceptance Register 3; 0x00000153 ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR3STR;
extern volatile CANIDAR3STR _CANIDAR3 @(REG_BASE + 0x00000153UL);
#define CANIDAR3 _CANIDAR3.Byte
#define CANIDAR3_AC0 _CANIDAR3.Bits.AC0
#define CANIDAR3_AC1 _CANIDAR3.Bits.AC1
#define CANIDAR3_AC2 _CANIDAR3.Bits.AC2
#define CANIDAR3_AC3 _CANIDAR3.Bits.AC3
#define CANIDAR3_AC4 _CANIDAR3.Bits.AC4
#define CANIDAR3_AC5 _CANIDAR3.Bits.AC5
#define CANIDAR3_AC6 _CANIDAR3.Bits.AC6
#define CANIDAR3_AC7 _CANIDAR3.Bits.AC7
#define CANIDAR3_AC0_MASK 0x01U
#define CANIDAR3_AC1_MASK 0x02U
#define CANIDAR3_AC2_MASK 0x04U
#define CANIDAR3_AC3_MASK 0x08U
#define CANIDAR3_AC4_MASK 0x10U
#define CANIDAR3_AC5_MASK 0x20U
#define CANIDAR3_AC6_MASK 0x40U
#define CANIDAR3_AC7_MASK 0x80U
/*** CANIDMR0 - MSCAN Identifier Mask Register 0; 0x00000154 ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR0STR;
extern volatile CANIDMR0STR _CANIDMR0 @(REG_BASE + 0x00000154UL);
#define CANIDMR0 _CANIDMR0.Byte
#define CANIDMR0_AM0 _CANIDMR0.Bits.AM0
#define CANIDMR0_AM1 _CANIDMR0.Bits.AM1
#define CANIDMR0_AM2 _CANIDMR0.Bits.AM2
#define CANIDMR0_AM3 _CANIDMR0.Bits.AM3
#define CANIDMR0_AM4 _CANIDMR0.Bits.AM4
#define CANIDMR0_AM5 _CANIDMR0.Bits.AM5
#define CANIDMR0_AM6 _CANIDMR0.Bits.AM6
#define CANIDMR0_AM7 _CANIDMR0.Bits.AM7
/* CANIDMR_ARR: Access 4 CANIDMRx registers in an array */
#define CANIDMR_ARR ((volatile byte *) &CANIDMR0)
#define CANIDMR0_AM0_MASK 0x01U
#define CANIDMR0_AM1_MASK 0x02U
#define CANIDMR0_AM2_MASK 0x04U
#define CANIDMR0_AM3_MASK 0x08U
#define CANIDMR0_AM4_MASK 0x10U
#define CANIDMR0_AM5_MASK 0x20U
#define CANIDMR0_AM6_MASK 0x40U
#define CANIDMR0_AM7_MASK 0x80U
/*** CANIDMR1 - MSCAN Identifier Mask Register 1; 0x00000155 ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR1STR;
extern volatile CANIDMR1STR _CANIDMR1 @(REG_BASE + 0x00000155UL);
#define CANIDMR1 _CANIDMR1.Byte
#define CANIDMR1_AM0 _CANIDMR1.Bits.AM0
#define CANIDMR1_AM1 _CANIDMR1.Bits.AM1
#define CANIDMR1_AM2 _CANIDMR1.Bits.AM2
#define CANIDMR1_AM3 _CANIDMR1.Bits.AM3
#define CANIDMR1_AM4 _CANIDMR1.Bits.AM4
#define CANIDMR1_AM5 _CANIDMR1.Bits.AM5
#define CANIDMR1_AM6 _CANIDMR1.Bits.AM6
#define CANIDMR1_AM7 _CANIDMR1.Bits.AM7
#define CANIDMR1_AM0_MASK 0x01U
#define CANIDMR1_AM1_MASK 0x02U
#define CANIDMR1_AM2_MASK 0x04U
#define CANIDMR1_AM3_MASK 0x08U
#define CANIDMR1_AM4_MASK 0x10U
#define CANIDMR1_AM5_MASK 0x20U
#define CANIDMR1_AM6_MASK 0x40U
#define CANIDMR1_AM7_MASK 0x80U
/*** CANIDMR2 - MSCAN Identifier Mask Register 2; 0x00000156 ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR2STR;
extern volatile CANIDMR2STR _CANIDMR2 @(REG_BASE + 0x00000156UL);
#define CANIDMR2 _CANIDMR2.Byte
#define CANIDMR2_AM0 _CANIDMR2.Bits.AM0
#define CANIDMR2_AM1 _CANIDMR2.Bits.AM1
#define CANIDMR2_AM2 _CANIDMR2.Bits.AM2
#define CANIDMR2_AM3 _CANIDMR2.Bits.AM3
#define CANIDMR2_AM4 _CANIDMR2.Bits.AM4
#define CANIDMR2_AM5 _CANIDMR2.Bits.AM5
#define CANIDMR2_AM6 _CANIDMR2.Bits.AM6
#define CANIDMR2_AM7 _CANIDMR2.Bits.AM7
#define CANIDMR2_AM0_MASK 0x01U
#define CANIDMR2_AM1_MASK 0x02U
#define CANIDMR2_AM2_MASK 0x04U
#define CANIDMR2_AM3_MASK 0x08U
#define CANIDMR2_AM4_MASK 0x10U
#define CANIDMR2_AM5_MASK 0x20U
#define CANIDMR2_AM6_MASK 0x40U
#define CANIDMR2_AM7_MASK 0x80U
/*** CANIDMR3 - MSCAN Identifier Mask Register 3; 0x00000157 ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR3STR;
extern volatile CANIDMR3STR _CANIDMR3 @(REG_BASE + 0x00000157UL);
#define CANIDMR3 _CANIDMR3.Byte
#define CANIDMR3_AM0 _CANIDMR3.Bits.AM0
#define CANIDMR3_AM1 _CANIDMR3.Bits.AM1
#define CANIDMR3_AM2 _CANIDMR3.Bits.AM2
#define CANIDMR3_AM3 _CANIDMR3.Bits.AM3
#define CANIDMR3_AM4 _CANIDMR3.Bits.AM4
#define CANIDMR3_AM5 _CANIDMR3.Bits.AM5
#define CANIDMR3_AM6 _CANIDMR3.Bits.AM6
#define CANIDMR3_AM7 _CANIDMR3.Bits.AM7
#define CANIDMR3_AM0_MASK 0x01U
#define CANIDMR3_AM1_MASK 0x02U
#define CANIDMR3_AM2_MASK 0x04U
#define CANIDMR3_AM3_MASK 0x08U
#define CANIDMR3_AM4_MASK 0x10U
#define CANIDMR3_AM5_MASK 0x20U
#define CANIDMR3_AM6_MASK 0x40U
#define CANIDMR3_AM7_MASK 0x80U
/*** CANIDAR4 - MSCAN Identifier Acceptance Register 4; 0x00000158 ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR4STR;
extern volatile CANIDAR4STR _CANIDAR4 @(REG_BASE + 0x00000158UL);
#define CANIDAR4 _CANIDAR4.Byte
#define CANIDAR4_AC0 _CANIDAR4.Bits.AC0
#define CANIDAR4_AC1 _CANIDAR4.Bits.AC1
#define CANIDAR4_AC2 _CANIDAR4.Bits.AC2
#define CANIDAR4_AC3 _CANIDAR4.Bits.AC3
#define CANIDAR4_AC4 _CANIDAR4.Bits.AC4
#define CANIDAR4_AC5 _CANIDAR4.Bits.AC5
#define CANIDAR4_AC6 _CANIDAR4.Bits.AC6
#define CANIDAR4_AC7 _CANIDAR4.Bits.AC7
#define CANIDAR4_AC0_MASK 0x01U
#define CANIDAR4_AC1_MASK 0x02U
#define CANIDAR4_AC2_MASK 0x04U
#define CANIDAR4_AC3_MASK 0x08U
#define CANIDAR4_AC4_MASK 0x10U
#define CANIDAR4_AC5_MASK 0x20U
#define CANIDAR4_AC6_MASK 0x40U
#define CANIDAR4_AC7_MASK 0x80U
/*** CANIDAR5 - MSCAN Identifier Acceptance Register 5; 0x00000159 ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR5STR;
extern volatile CANIDAR5STR _CANIDAR5 @(REG_BASE + 0x00000159UL);
#define CANIDAR5 _CANIDAR5.Byte
#define CANIDAR5_AC0 _CANIDAR5.Bits.AC0
#define CANIDAR5_AC1 _CANIDAR5.Bits.AC1
#define CANIDAR5_AC2 _CANIDAR5.Bits.AC2
#define CANIDAR5_AC3 _CANIDAR5.Bits.AC3
#define CANIDAR5_AC4 _CANIDAR5.Bits.AC4
#define CANIDAR5_AC5 _CANIDAR5.Bits.AC5
#define CANIDAR5_AC6 _CANIDAR5.Bits.AC6
#define CANIDAR5_AC7 _CANIDAR5.Bits.AC7
#define CANIDAR5_AC0_MASK 0x01U
#define CANIDAR5_AC1_MASK 0x02U
#define CANIDAR5_AC2_MASK 0x04U
#define CANIDAR5_AC3_MASK 0x08U
#define CANIDAR5_AC4_MASK 0x10U
#define CANIDAR5_AC5_MASK 0x20U
#define CANIDAR5_AC6_MASK 0x40U
#define CANIDAR5_AC7_MASK 0x80U
/*** CANIDAR6 - MSCAN Identifier Acceptance Register 6; 0x0000015A ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR6STR;
extern volatile CANIDAR6STR _CANIDAR6 @(REG_BASE + 0x0000015AUL);
#define CANIDAR6 _CANIDAR6.Byte
#define CANIDAR6_AC0 _CANIDAR6.Bits.AC0
#define CANIDAR6_AC1 _CANIDAR6.Bits.AC1
#define CANIDAR6_AC2 _CANIDAR6.Bits.AC2
#define CANIDAR6_AC3 _CANIDAR6.Bits.AC3
#define CANIDAR6_AC4 _CANIDAR6.Bits.AC4
#define CANIDAR6_AC5 _CANIDAR6.Bits.AC5
#define CANIDAR6_AC6 _CANIDAR6.Bits.AC6
#define CANIDAR6_AC7 _CANIDAR6.Bits.AC7
#define CANIDAR6_AC0_MASK 0x01U
#define CANIDAR6_AC1_MASK 0x02U
#define CANIDAR6_AC2_MASK 0x04U
#define CANIDAR6_AC3_MASK 0x08U
#define CANIDAR6_AC4_MASK 0x10U
#define CANIDAR6_AC5_MASK 0x20U
#define CANIDAR6_AC6_MASK 0x40U
#define CANIDAR6_AC7_MASK 0x80U
/*** CANIDAR7 - MSCAN Identifier Acceptance Register 7; 0x0000015B ***/
typedef union {
byte Byte;
struct {
byte AC0 :1; /* Acceptance Code Bit 0 */
byte AC1 :1; /* Acceptance Code Bit 1 */
byte AC2 :1; /* Acceptance Code Bit 2 */
byte AC3 :1; /* Acceptance Code Bit 3 */
byte AC4 :1; /* Acceptance Code Bit 4 */
byte AC5 :1; /* Acceptance Code Bit 5 */
byte AC6 :1; /* Acceptance Code Bit 6 */
byte AC7 :1; /* Acceptance Code Bit 7 */
} Bits;
} CANIDAR7STR;
extern volatile CANIDAR7STR _CANIDAR7 @(REG_BASE + 0x0000015BUL);
#define CANIDAR7 _CANIDAR7.Byte
#define CANIDAR7_AC0 _CANIDAR7.Bits.AC0
#define CANIDAR7_AC1 _CANIDAR7.Bits.AC1
#define CANIDAR7_AC2 _CANIDAR7.Bits.AC2
#define CANIDAR7_AC3 _CANIDAR7.Bits.AC3
#define CANIDAR7_AC4 _CANIDAR7.Bits.AC4
#define CANIDAR7_AC5 _CANIDAR7.Bits.AC5
#define CANIDAR7_AC6 _CANIDAR7.Bits.AC6
#define CANIDAR7_AC7 _CANIDAR7.Bits.AC7
#define CANIDAR7_AC0_MASK 0x01U
#define CANIDAR7_AC1_MASK 0x02U
#define CANIDAR7_AC2_MASK 0x04U
#define CANIDAR7_AC3_MASK 0x08U
#define CANIDAR7_AC4_MASK 0x10U
#define CANIDAR7_AC5_MASK 0x20U
#define CANIDAR7_AC6_MASK 0x40U
#define CANIDAR7_AC7_MASK 0x80U
/*** CANIDMR4 - MSCAN Identifier Mask Register 4; 0x0000015C ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR4STR;
extern volatile CANIDMR4STR _CANIDMR4 @(REG_BASE + 0x0000015CUL);
#define CANIDMR4 _CANIDMR4.Byte
#define CANIDMR4_AM0 _CANIDMR4.Bits.AM0
#define CANIDMR4_AM1 _CANIDMR4.Bits.AM1
#define CANIDMR4_AM2 _CANIDMR4.Bits.AM2
#define CANIDMR4_AM3 _CANIDMR4.Bits.AM3
#define CANIDMR4_AM4 _CANIDMR4.Bits.AM4
#define CANIDMR4_AM5 _CANIDMR4.Bits.AM5
#define CANIDMR4_AM6 _CANIDMR4.Bits.AM6
#define CANIDMR4_AM7 _CANIDMR4.Bits.AM7
#define CANIDMR4_AM0_MASK 0x01U
#define CANIDMR4_AM1_MASK 0x02U
#define CANIDMR4_AM2_MASK 0x04U
#define CANIDMR4_AM3_MASK 0x08U
#define CANIDMR4_AM4_MASK 0x10U
#define CANIDMR4_AM5_MASK 0x20U
#define CANIDMR4_AM6_MASK 0x40U
#define CANIDMR4_AM7_MASK 0x80U
/*** CANIDMR5 - MSCAN Identifier Mask Register 5; 0x0000015D ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR5STR;
extern volatile CANIDMR5STR _CANIDMR5 @(REG_BASE + 0x0000015DUL);
#define CANIDMR5 _CANIDMR5.Byte
#define CANIDMR5_AM0 _CANIDMR5.Bits.AM0
#define CANIDMR5_AM1 _CANIDMR5.Bits.AM1
#define CANIDMR5_AM2 _CANIDMR5.Bits.AM2
#define CANIDMR5_AM3 _CANIDMR5.Bits.AM3
#define CANIDMR5_AM4 _CANIDMR5.Bits.AM4
#define CANIDMR5_AM5 _CANIDMR5.Bits.AM5
#define CANIDMR5_AM6 _CANIDMR5.Bits.AM6
#define CANIDMR5_AM7 _CANIDMR5.Bits.AM7
#define CANIDMR5_AM0_MASK 0x01U
#define CANIDMR5_AM1_MASK 0x02U
#define CANIDMR5_AM2_MASK 0x04U
#define CANIDMR5_AM3_MASK 0x08U
#define CANIDMR5_AM4_MASK 0x10U
#define CANIDMR5_AM5_MASK 0x20U
#define CANIDMR5_AM6_MASK 0x40U
#define CANIDMR5_AM7_MASK 0x80U
/*** CANIDMR6 - MSCAN Identifier Mask Register 6; 0x0000015E ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR6STR;
extern volatile CANIDMR6STR _CANIDMR6 @(REG_BASE + 0x0000015EUL);
#define CANIDMR6 _CANIDMR6.Byte
#define CANIDMR6_AM0 _CANIDMR6.Bits.AM0
#define CANIDMR6_AM1 _CANIDMR6.Bits.AM1
#define CANIDMR6_AM2 _CANIDMR6.Bits.AM2
#define CANIDMR6_AM3 _CANIDMR6.Bits.AM3
#define CANIDMR6_AM4 _CANIDMR6.Bits.AM4
#define CANIDMR6_AM5 _CANIDMR6.Bits.AM5
#define CANIDMR6_AM6 _CANIDMR6.Bits.AM6
#define CANIDMR6_AM7 _CANIDMR6.Bits.AM7
#define CANIDMR6_AM0_MASK 0x01U
#define CANIDMR6_AM1_MASK 0x02U
#define CANIDMR6_AM2_MASK 0x04U
#define CANIDMR6_AM3_MASK 0x08U
#define CANIDMR6_AM4_MASK 0x10U
#define CANIDMR6_AM5_MASK 0x20U
#define CANIDMR6_AM6_MASK 0x40U
#define CANIDMR6_AM7_MASK 0x80U
/*** CANIDMR7 - MSCAN Identifier Mask Register 7; 0x0000015F ***/
typedef union {
byte Byte;
struct {
byte AM0 :1; /* Acceptance Mask Bit 0 */
byte AM1 :1; /* Acceptance Mask Bit 1 */
byte AM2 :1; /* Acceptance Mask Bit 2 */
byte AM3 :1; /* Acceptance Mask Bit 3 */
byte AM4 :1; /* Acceptance Mask Bit 4 */
byte AM5 :1; /* Acceptance Mask Bit 5 */
byte AM6 :1; /* Acceptance Mask Bit 6 */
byte AM7 :1; /* Acceptance Mask Bit 7 */
} Bits;
} CANIDMR7STR;
extern volatile CANIDMR7STR _CANIDMR7 @(REG_BASE + 0x0000015FUL);
#define CANIDMR7 _CANIDMR7.Byte
#define CANIDMR7_AM0 _CANIDMR7.Bits.AM0
#define CANIDMR7_AM1 _CANIDMR7.Bits.AM1
#define CANIDMR7_AM2 _CANIDMR7.Bits.AM2
#define CANIDMR7_AM3 _CANIDMR7.Bits.AM3
#define CANIDMR7_AM4 _CANIDMR7.Bits.AM4
#define CANIDMR7_AM5 _CANIDMR7.Bits.AM5
#define CANIDMR7_AM6 _CANIDMR7.Bits.AM6
#define CANIDMR7_AM7 _CANIDMR7.Bits.AM7
#define CANIDMR7_AM0_MASK 0x01U
#define CANIDMR7_AM1_MASK 0x02U
#define CANIDMR7_AM2_MASK 0x04U
#define CANIDMR7_AM3_MASK 0x08U
#define CANIDMR7_AM4_MASK 0x10U
#define CANIDMR7_AM5_MASK 0x20U
#define CANIDMR7_AM6_MASK 0x40U
#define CANIDMR7_AM7_MASK 0x80U
/*** CANRXIDR0 - MSCAN Receive Identifier Register 0; 0x00000160 ***/
typedef union {
byte Byte;
struct {
byte ID21 :1; /* Extended format identifier Bit 21 */
byte ID22 :1; /* Extended format identifier Bit 22 */
byte ID23 :1; /* Extended format identifier Bit 23 */
byte ID24 :1; /* Extended format identifier Bit 24 */
byte ID25 :1; /* Extended format identifier Bit 25 */
byte ID26 :1; /* Extended format identifier Bit 26 */
byte ID27 :1; /* Extended format identifier Bit 27 */
byte ID28 :1; /* Extended format identifier Bit 28 */
} Bits;
} CANRXIDR0STR;
extern volatile CANRXIDR0STR _CANRXIDR0 @(REG_BASE + 0x00000160UL);
#define CANRXIDR0 _CANRXIDR0.Byte
#define CANRXIDR0_ID21 _CANRXIDR0.Bits.ID21
#define CANRXIDR0_ID22 _CANRXIDR0.Bits.ID22
#define CANRXIDR0_ID23 _CANRXIDR0.Bits.ID23
#define CANRXIDR0_ID24 _CANRXIDR0.Bits.ID24
#define CANRXIDR0_ID25 _CANRXIDR0.Bits.ID25
#define CANRXIDR0_ID26 _CANRXIDR0.Bits.ID26
#define CANRXIDR0_ID27 _CANRXIDR0.Bits.ID27
#define CANRXIDR0_ID28 _CANRXIDR0.Bits.ID28
/* CANRXIDR_ARR: Access 4 CANRXIDRx registers in an array */
#define CANRXIDR_ARR ((volatile byte *) &CANRXIDR0)
#define CANRXIDR0_ID21_MASK 0x01U
#define CANRXIDR0_ID22_MASK 0x02U
#define CANRXIDR0_ID23_MASK 0x04U
#define CANRXIDR0_ID24_MASK 0x08U
#define CANRXIDR0_ID25_MASK 0x10U
#define CANRXIDR0_ID26_MASK 0x20U
#define CANRXIDR0_ID27_MASK 0x40U
#define CANRXIDR0_ID28_MASK 0x80U
/*** CANRXIDR1 - MSCAN Receive Identifier Register 1; 0x00000161 ***/
typedef union {
byte Byte;
struct {
byte ID15 :1; /* Extended format identifier Bit 15 */
byte ID16 :1; /* Extended format identifier Bit 16 */
byte ID17 :1; /* Extended format identifier Bit 17 */
byte IDE :1; /* ID Extended */
byte SRR :1; /* Substitute Remote Request */
byte ID18 :1; /* Extended format identifier Bit 18 */
byte ID19 :1; /* Extended format identifier Bit 19 */
byte ID20 :1; /* Extended format identifier Bit 20 */
} Bits;
struct {
byte grpID_15 :3;
byte :1;
byte :1;
byte grpID_18 :3;
} MergedBits;
} CANRXIDR1STR;
extern volatile CANRXIDR1STR _CANRXIDR1 @(REG_BASE + 0x00000161UL);
#define CANRXIDR1 _CANRXIDR1.Byte
#define CANRXIDR1_ID15 _CANRXIDR1.Bits.ID15
#define CANRXIDR1_ID16 _CANRXIDR1.Bits.ID16
#define CANRXIDR1_ID17 _CANRXIDR1.Bits.ID17
#define CANRXIDR1_IDE _CANRXIDR1.Bits.IDE
#define CANRXIDR1_SRR _CANRXIDR1.Bits.SRR
#define CANRXIDR1_ID18 _CANRXIDR1.Bits.ID18
#define CANRXIDR1_ID19 _CANRXIDR1.Bits.ID19
#define CANRXIDR1_ID20 _CANRXIDR1.Bits.ID20
#define CANRXIDR1_ID_15 _CANRXIDR1.MergedBits.grpID_15
#define CANRXIDR1_ID_18 _CANRXIDR1.MergedBits.grpID_18
#define CANRXIDR1_ID CANRXIDR1_ID_15
#define CANRXIDR1_ID15_MASK 0x01U
#define CANRXIDR1_ID16_MASK 0x02U
#define CANRXIDR1_ID17_MASK 0x04U
#define CANRXIDR1_IDE_MASK 0x08U
#define CANRXIDR1_SRR_MASK 0x10U
#define CANRXIDR1_ID18_MASK 0x20U
#define CANRXIDR1_ID19_MASK 0x40U
#define CANRXIDR1_ID20_MASK 0x80U
#define CANRXIDR1_ID_15_MASK 0x07U
#define CANRXIDR1_ID_15_BITNUM 0x00U
#define CANRXIDR1_ID_18_MASK 0xE0U
#define CANRXIDR1_ID_18_BITNUM 0x05U
/*** CANRXIDR2 - MSCAN Receive Identifier Register 2; 0x00000162 ***/
typedef union {
byte Byte;
struct {
byte ID7 :1; /* Extended format identifier Bit 7 */
byte ID8 :1; /* Extended format identifier Bit 8 */
byte ID9 :1; /* Extended format identifier Bit 9 */
byte ID10 :1; /* Extended format identifier Bit 10 */
byte ID11 :1; /* Extended format identifier Bit 11 */
byte ID12 :1; /* Extended format identifier Bit 12 */
byte ID13 :1; /* Extended format identifier Bit 13 */
byte ID14 :1; /* Extended format identifier Bit 14 */
} Bits;
} CANRXIDR2STR;
extern volatile CANRXIDR2STR _CANRXIDR2 @(REG_BASE + 0x00000162UL);
#define CANRXIDR2 _CANRXIDR2.Byte
#define CANRXIDR2_ID7 _CANRXIDR2.Bits.ID7
#define CANRXIDR2_ID8 _CANRXIDR2.Bits.ID8
#define CANRXIDR2_ID9 _CANRXIDR2.Bits.ID9
#define CANRXIDR2_ID10 _CANRXIDR2.Bits.ID10
#define CANRXIDR2_ID11 _CANRXIDR2.Bits.ID11
#define CANRXIDR2_ID12 _CANRXIDR2.Bits.ID12
#define CANRXIDR2_ID13 _CANRXIDR2.Bits.ID13
#define CANRXIDR2_ID14 _CANRXIDR2.Bits.ID14
#define CANRXIDR2_ID7_MASK 0x01U
#define CANRXIDR2_ID8_MASK 0x02U
#define CANRXIDR2_ID9_MASK 0x04U
#define CANRXIDR2_ID10_MASK 0x08U
#define CANRXIDR2_ID11_MASK 0x10U
#define CANRXIDR2_ID12_MASK 0x20U
#define CANRXIDR2_ID13_MASK 0x40U
#define CANRXIDR2_ID14_MASK 0x80U
/*** CANRXIDR3 - MSCAN Receive Identifier Register 3; 0x00000163 ***/
typedef union {
byte Byte;
struct {
byte RTR :1; /* Remote Transmission Request */
byte ID0 :1; /* Extended format identifier Bit 0 */
byte ID1 :1; /* Extended format identifier Bit 1 */
byte ID2 :1; /* Extended format identifier Bit 2 */
byte ID3 :1; /* Extended format identifier Bit 3 */
byte ID4 :1; /* Extended format identifier Bit 4 */
byte ID5 :1; /* Extended format identifier Bit 5 */
byte ID6 :1; /* Extended format identifier Bit 6 */
} Bits;
struct {
byte :1;
byte grpID :7;
} MergedBits;
} CANRXIDR3STR;
extern volatile CANRXIDR3STR _CANRXIDR3 @(REG_BASE + 0x00000163UL);
#define CANRXIDR3 _CANRXIDR3.Byte
#define CANRXIDR3_RTR _CANRXIDR3.Bits.RTR
#define CANRXIDR3_ID0 _CANRXIDR3.Bits.ID0
#define CANRXIDR3_ID1 _CANRXIDR3.Bits.ID1
#define CANRXIDR3_ID2 _CANRXIDR3.Bits.ID2
#define CANRXIDR3_ID3 _CANRXIDR3.Bits.ID3
#define CANRXIDR3_ID4 _CANRXIDR3.Bits.ID4
#define CANRXIDR3_ID5 _CANRXIDR3.Bits.ID5
#define CANRXIDR3_ID6 _CANRXIDR3.Bits.ID6
#define CANRXIDR3_ID _CANRXIDR3.MergedBits.grpID
#define CANRXIDR3_RTR_MASK 0x01U
#define CANRXIDR3_ID0_MASK 0x02U
#define CANRXIDR3_ID1_MASK 0x04U
#define CANRXIDR3_ID2_MASK 0x08U
#define CANRXIDR3_ID3_MASK 0x10U
#define CANRXIDR3_ID4_MASK 0x20U
#define CANRXIDR3_ID5_MASK 0x40U
#define CANRXIDR3_ID6_MASK 0x80U
#define CANRXIDR3_ID_MASK 0xFEU
#define CANRXIDR3_ID_BITNUM 0x01U
/*** CANRXDSR0 - MSCAN Receive Data Segment Register 0; 0x00000164 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR0STR;
extern volatile CANRXDSR0STR _CANRXDSR0 @(REG_BASE + 0x00000164UL);
#define CANRXDSR0 _CANRXDSR0.Byte
#define CANRXDSR0_DB0 _CANRXDSR0.Bits.DB0
#define CANRXDSR0_DB1 _CANRXDSR0.Bits.DB1
#define CANRXDSR0_DB2 _CANRXDSR0.Bits.DB2
#define CANRXDSR0_DB3 _CANRXDSR0.Bits.DB3
#define CANRXDSR0_DB4 _CANRXDSR0.Bits.DB4
#define CANRXDSR0_DB5 _CANRXDSR0.Bits.DB5
#define CANRXDSR0_DB6 _CANRXDSR0.Bits.DB6
#define CANRXDSR0_DB7 _CANRXDSR0.Bits.DB7
/* CANRXDSR_ARR: Access 8 CANRXDSRx registers in an array */
#define CANRXDSR_ARR ((volatile byte *) &CANRXDSR0)
#define CANRXDSR0_DB0_MASK 0x01U
#define CANRXDSR0_DB1_MASK 0x02U
#define CANRXDSR0_DB2_MASK 0x04U
#define CANRXDSR0_DB3_MASK 0x08U
#define CANRXDSR0_DB4_MASK 0x10U
#define CANRXDSR0_DB5_MASK 0x20U
#define CANRXDSR0_DB6_MASK 0x40U
#define CANRXDSR0_DB7_MASK 0x80U
/*** CANRXDSR1 - MSCAN Receive Data Segment Register 1; 0x00000165 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR1STR;
extern volatile CANRXDSR1STR _CANRXDSR1 @(REG_BASE + 0x00000165UL);
#define CANRXDSR1 _CANRXDSR1.Byte
#define CANRXDSR1_DB0 _CANRXDSR1.Bits.DB0
#define CANRXDSR1_DB1 _CANRXDSR1.Bits.DB1
#define CANRXDSR1_DB2 _CANRXDSR1.Bits.DB2
#define CANRXDSR1_DB3 _CANRXDSR1.Bits.DB3
#define CANRXDSR1_DB4 _CANRXDSR1.Bits.DB4
#define CANRXDSR1_DB5 _CANRXDSR1.Bits.DB5
#define CANRXDSR1_DB6 _CANRXDSR1.Bits.DB6
#define CANRXDSR1_DB7 _CANRXDSR1.Bits.DB7
#define CANRXDSR1_DB0_MASK 0x01U
#define CANRXDSR1_DB1_MASK 0x02U
#define CANRXDSR1_DB2_MASK 0x04U
#define CANRXDSR1_DB3_MASK 0x08U
#define CANRXDSR1_DB4_MASK 0x10U
#define CANRXDSR1_DB5_MASK 0x20U
#define CANRXDSR1_DB6_MASK 0x40U
#define CANRXDSR1_DB7_MASK 0x80U
/*** CANRXDSR2 - MSCAN Receive Data Segment Register 2; 0x00000166 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR2STR;
extern volatile CANRXDSR2STR _CANRXDSR2 @(REG_BASE + 0x00000166UL);
#define CANRXDSR2 _CANRXDSR2.Byte
#define CANRXDSR2_DB0 _CANRXDSR2.Bits.DB0
#define CANRXDSR2_DB1 _CANRXDSR2.Bits.DB1
#define CANRXDSR2_DB2 _CANRXDSR2.Bits.DB2
#define CANRXDSR2_DB3 _CANRXDSR2.Bits.DB3
#define CANRXDSR2_DB4 _CANRXDSR2.Bits.DB4
#define CANRXDSR2_DB5 _CANRXDSR2.Bits.DB5
#define CANRXDSR2_DB6 _CANRXDSR2.Bits.DB6
#define CANRXDSR2_DB7 _CANRXDSR2.Bits.DB7
#define CANRXDSR2_DB0_MASK 0x01U
#define CANRXDSR2_DB1_MASK 0x02U
#define CANRXDSR2_DB2_MASK 0x04U
#define CANRXDSR2_DB3_MASK 0x08U
#define CANRXDSR2_DB4_MASK 0x10U
#define CANRXDSR2_DB5_MASK 0x20U
#define CANRXDSR2_DB6_MASK 0x40U
#define CANRXDSR2_DB7_MASK 0x80U
/*** CANRXDSR3 - MSCAN Receive Data Segment Register 3; 0x00000167 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR3STR;
extern volatile CANRXDSR3STR _CANRXDSR3 @(REG_BASE + 0x00000167UL);
#define CANRXDSR3 _CANRXDSR3.Byte
#define CANRXDSR3_DB0 _CANRXDSR3.Bits.DB0
#define CANRXDSR3_DB1 _CANRXDSR3.Bits.DB1
#define CANRXDSR3_DB2 _CANRXDSR3.Bits.DB2
#define CANRXDSR3_DB3 _CANRXDSR3.Bits.DB3
#define CANRXDSR3_DB4 _CANRXDSR3.Bits.DB4
#define CANRXDSR3_DB5 _CANRXDSR3.Bits.DB5
#define CANRXDSR3_DB6 _CANRXDSR3.Bits.DB6
#define CANRXDSR3_DB7 _CANRXDSR3.Bits.DB7
#define CANRXDSR3_DB0_MASK 0x01U
#define CANRXDSR3_DB1_MASK 0x02U
#define CANRXDSR3_DB2_MASK 0x04U
#define CANRXDSR3_DB3_MASK 0x08U
#define CANRXDSR3_DB4_MASK 0x10U
#define CANRXDSR3_DB5_MASK 0x20U
#define CANRXDSR3_DB6_MASK 0x40U
#define CANRXDSR3_DB7_MASK 0x80U
/*** CANRXDSR4 - MSCAN Receive Data Segment Register 4; 0x00000168 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR4STR;
extern volatile CANRXDSR4STR _CANRXDSR4 @(REG_BASE + 0x00000168UL);
#define CANRXDSR4 _CANRXDSR4.Byte
#define CANRXDSR4_DB0 _CANRXDSR4.Bits.DB0
#define CANRXDSR4_DB1 _CANRXDSR4.Bits.DB1
#define CANRXDSR4_DB2 _CANRXDSR4.Bits.DB2
#define CANRXDSR4_DB3 _CANRXDSR4.Bits.DB3
#define CANRXDSR4_DB4 _CANRXDSR4.Bits.DB4
#define CANRXDSR4_DB5 _CANRXDSR4.Bits.DB5
#define CANRXDSR4_DB6 _CANRXDSR4.Bits.DB6
#define CANRXDSR4_DB7 _CANRXDSR4.Bits.DB7
#define CANRXDSR4_DB0_MASK 0x01U
#define CANRXDSR4_DB1_MASK 0x02U
#define CANRXDSR4_DB2_MASK 0x04U
#define CANRXDSR4_DB3_MASK 0x08U
#define CANRXDSR4_DB4_MASK 0x10U
#define CANRXDSR4_DB5_MASK 0x20U
#define CANRXDSR4_DB6_MASK 0x40U
#define CANRXDSR4_DB7_MASK 0x80U
/*** CANRXDSR5 - MSCAN Receive Data Segment Register 5; 0x00000169 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR5STR;
extern volatile CANRXDSR5STR _CANRXDSR5 @(REG_BASE + 0x00000169UL);
#define CANRXDSR5 _CANRXDSR5.Byte
#define CANRXDSR5_DB0 _CANRXDSR5.Bits.DB0
#define CANRXDSR5_DB1 _CANRXDSR5.Bits.DB1
#define CANRXDSR5_DB2 _CANRXDSR5.Bits.DB2
#define CANRXDSR5_DB3 _CANRXDSR5.Bits.DB3
#define CANRXDSR5_DB4 _CANRXDSR5.Bits.DB4
#define CANRXDSR5_DB5 _CANRXDSR5.Bits.DB5
#define CANRXDSR5_DB6 _CANRXDSR5.Bits.DB6
#define CANRXDSR5_DB7 _CANRXDSR5.Bits.DB7
#define CANRXDSR5_DB0_MASK 0x01U
#define CANRXDSR5_DB1_MASK 0x02U
#define CANRXDSR5_DB2_MASK 0x04U
#define CANRXDSR5_DB3_MASK 0x08U
#define CANRXDSR5_DB4_MASK 0x10U
#define CANRXDSR5_DB5_MASK 0x20U
#define CANRXDSR5_DB6_MASK 0x40U
#define CANRXDSR5_DB7_MASK 0x80U
/*** CANRXDSR6 - MSCAN Receive Data Segment Register 6; 0x0000016A ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR6STR;
extern volatile CANRXDSR6STR _CANRXDSR6 @(REG_BASE + 0x0000016AUL);
#define CANRXDSR6 _CANRXDSR6.Byte
#define CANRXDSR6_DB0 _CANRXDSR6.Bits.DB0
#define CANRXDSR6_DB1 _CANRXDSR6.Bits.DB1
#define CANRXDSR6_DB2 _CANRXDSR6.Bits.DB2
#define CANRXDSR6_DB3 _CANRXDSR6.Bits.DB3
#define CANRXDSR6_DB4 _CANRXDSR6.Bits.DB4
#define CANRXDSR6_DB5 _CANRXDSR6.Bits.DB5
#define CANRXDSR6_DB6 _CANRXDSR6.Bits.DB6
#define CANRXDSR6_DB7 _CANRXDSR6.Bits.DB7
#define CANRXDSR6_DB0_MASK 0x01U
#define CANRXDSR6_DB1_MASK 0x02U
#define CANRXDSR6_DB2_MASK 0x04U
#define CANRXDSR6_DB3_MASK 0x08U
#define CANRXDSR6_DB4_MASK 0x10U
#define CANRXDSR6_DB5_MASK 0x20U
#define CANRXDSR6_DB6_MASK 0x40U
#define CANRXDSR6_DB7_MASK 0x80U
/*** CANRXDSR7 - MSCAN Receive Data Segment Register 7; 0x0000016B ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANRXDSR7STR;
extern volatile CANRXDSR7STR _CANRXDSR7 @(REG_BASE + 0x0000016BUL);
#define CANRXDSR7 _CANRXDSR7.Byte
#define CANRXDSR7_DB0 _CANRXDSR7.Bits.DB0
#define CANRXDSR7_DB1 _CANRXDSR7.Bits.DB1
#define CANRXDSR7_DB2 _CANRXDSR7.Bits.DB2
#define CANRXDSR7_DB3 _CANRXDSR7.Bits.DB3
#define CANRXDSR7_DB4 _CANRXDSR7.Bits.DB4
#define CANRXDSR7_DB5 _CANRXDSR7.Bits.DB5
#define CANRXDSR7_DB6 _CANRXDSR7.Bits.DB6
#define CANRXDSR7_DB7 _CANRXDSR7.Bits.DB7
#define CANRXDSR7_DB0_MASK 0x01U
#define CANRXDSR7_DB1_MASK 0x02U
#define CANRXDSR7_DB2_MASK 0x04U
#define CANRXDSR7_DB3_MASK 0x08U
#define CANRXDSR7_DB4_MASK 0x10U
#define CANRXDSR7_DB5_MASK 0x20U
#define CANRXDSR7_DB6_MASK 0x40U
#define CANRXDSR7_DB7_MASK 0x80U
/*** CANRXDLR - MSCAN Receive Data Length Register; 0x0000016C ***/
typedef union {
byte Byte;
struct {
byte DLC0 :1; /* Data Length Code Bit 0 */
byte DLC1 :1; /* Data Length Code Bit 1 */
byte DLC2 :1; /* Data Length Code Bit 2 */
byte DLC3 :1; /* Data Length Code Bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpDLC :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CANRXDLRSTR;
extern volatile CANRXDLRSTR _CANRXDLR @(REG_BASE + 0x0000016CUL);
#define CANRXDLR _CANRXDLR.Byte
#define CANRXDLR_DLC0 _CANRXDLR.Bits.DLC0
#define CANRXDLR_DLC1 _CANRXDLR.Bits.DLC1
#define CANRXDLR_DLC2 _CANRXDLR.Bits.DLC2
#define CANRXDLR_DLC3 _CANRXDLR.Bits.DLC3
#define CANRXDLR_DLC _CANRXDLR.MergedBits.grpDLC
#define CANRXDLR_DLC0_MASK 0x01U
#define CANRXDLR_DLC1_MASK 0x02U
#define CANRXDLR_DLC2_MASK 0x04U
#define CANRXDLR_DLC3_MASK 0x08U
#define CANRXDLR_DLC_MASK 0x0FU
#define CANRXDLR_DLC_BITNUM 0x00U
/*** CANRXTSR - MSCAN Receive Time Stamp Register; 0x0000016E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** CANRXTSRH - MSCAN Receive Time Stamp Register High; 0x0000016E ***/
union {
byte Byte;
struct {
byte TSR8 :1; /* Time Stamp Bit 8 */
byte TSR9 :1; /* Time Stamp Bit 9 */
byte TSR10 :1; /* Time Stamp Bit 10 */
byte TSR11 :1; /* Time Stamp Bit 11 */
byte TSR12 :1; /* Time Stamp Bit 12 */
byte TSR13 :1; /* Time Stamp Bit 13 */
byte TSR14 :1; /* Time Stamp Bit 14 */
byte TSR15 :1; /* Time Stamp Bit 15 */
} Bits;
} CANRXTSRHSTR;
#define CANRXTSRH _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Byte
#define CANRXTSRH_TSR8 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR8
#define CANRXTSRH_TSR9 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR9
#define CANRXTSRH_TSR10 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR10
#define CANRXTSRH_TSR11 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR11
#define CANRXTSRH_TSR12 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR12
#define CANRXTSRH_TSR13 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR13
#define CANRXTSRH_TSR14 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR14
#define CANRXTSRH_TSR15 _CANRXTSR.Overlap_STR.CANRXTSRHSTR.Bits.TSR15
#define CANRXTSRH_TSR8_MASK 0x01U
#define CANRXTSRH_TSR9_MASK 0x02U
#define CANRXTSRH_TSR10_MASK 0x04U
#define CANRXTSRH_TSR11_MASK 0x08U
#define CANRXTSRH_TSR12_MASK 0x10U
#define CANRXTSRH_TSR13_MASK 0x20U
#define CANRXTSRH_TSR14_MASK 0x40U
#define CANRXTSRH_TSR15_MASK 0x80U
/*** CANRXTSRL - MSCAN Receive Time Stamp Register Low; 0x0000016F ***/
union {
byte Byte;
struct {
byte TSR0 :1; /* Time Stamp Bit 0 */
byte TSR1 :1; /* Time Stamp Bit 1 */
byte TSR2 :1; /* Time Stamp Bit 2 */
byte TSR3 :1; /* Time Stamp Bit 3 */
byte TSR4 :1; /* Time Stamp Bit 4 */
byte TSR5 :1; /* Time Stamp Bit 5 */
byte TSR6 :1; /* Time Stamp Bit 6 */
byte TSR7 :1; /* Time Stamp Bit 7 */
} Bits;
} CANRXTSRLSTR;
#define CANRXTSRL _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Byte
#define CANRXTSRL_TSR0 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR0
#define CANRXTSRL_TSR1 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR1
#define CANRXTSRL_TSR2 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR2
#define CANRXTSRL_TSR3 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR3
#define CANRXTSRL_TSR4 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR4
#define CANRXTSRL_TSR5 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR5
#define CANRXTSRL_TSR6 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR6
#define CANRXTSRL_TSR7 _CANRXTSR.Overlap_STR.CANRXTSRLSTR.Bits.TSR7
#define CANRXTSRL_TSR0_MASK 0x01U
#define CANRXTSRL_TSR1_MASK 0x02U
#define CANRXTSRL_TSR2_MASK 0x04U
#define CANRXTSRL_TSR3_MASK 0x08U
#define CANRXTSRL_TSR4_MASK 0x10U
#define CANRXTSRL_TSR5_MASK 0x20U
#define CANRXTSRL_TSR6_MASK 0x40U
#define CANRXTSRL_TSR7_MASK 0x80U
} Overlap_STR;
struct {
word TSR0 :1; /* Time Stamp Bit 0 */
word TSR1 :1; /* Time Stamp Bit 1 */
word TSR2 :1; /* Time Stamp Bit 2 */
word TSR3 :1; /* Time Stamp Bit 3 */
word TSR4 :1; /* Time Stamp Bit 4 */
word TSR5 :1; /* Time Stamp Bit 5 */
word TSR6 :1; /* Time Stamp Bit 6 */
word TSR7 :1; /* Time Stamp Bit 7 */
word TSR8 :1; /* Time Stamp Bit 8 */
word TSR9 :1; /* Time Stamp Bit 9 */
word TSR10 :1; /* Time Stamp Bit 10 */
word TSR11 :1; /* Time Stamp Bit 11 */
word TSR12 :1; /* Time Stamp Bit 12 */
word TSR13 :1; /* Time Stamp Bit 13 */
word TSR14 :1; /* Time Stamp Bit 14 */
word TSR15 :1; /* Time Stamp Bit 15 */
} Bits;
} CANRXTSRSTR;
extern volatile CANRXTSRSTR _CANRXTSR @(REG_BASE + 0x0000016EUL);
#define CANRXTSR _CANRXTSR.Word
#define CANRXTSR_TSR0 _CANRXTSR.Bits.TSR0
#define CANRXTSR_TSR1 _CANRXTSR.Bits.TSR1
#define CANRXTSR_TSR2 _CANRXTSR.Bits.TSR2
#define CANRXTSR_TSR3 _CANRXTSR.Bits.TSR3
#define CANRXTSR_TSR4 _CANRXTSR.Bits.TSR4
#define CANRXTSR_TSR5 _CANRXTSR.Bits.TSR5
#define CANRXTSR_TSR6 _CANRXTSR.Bits.TSR6
#define CANRXTSR_TSR7 _CANRXTSR.Bits.TSR7
#define CANRXTSR_TSR8 _CANRXTSR.Bits.TSR8
#define CANRXTSR_TSR9 _CANRXTSR.Bits.TSR9
#define CANRXTSR_TSR10 _CANRXTSR.Bits.TSR10
#define CANRXTSR_TSR11 _CANRXTSR.Bits.TSR11
#define CANRXTSR_TSR12 _CANRXTSR.Bits.TSR12
#define CANRXTSR_TSR13 _CANRXTSR.Bits.TSR13
#define CANRXTSR_TSR14 _CANRXTSR.Bits.TSR14
#define CANRXTSR_TSR15 _CANRXTSR.Bits.TSR15
#define CANRXTSR_TSR0_MASK 0x01U
#define CANRXTSR_TSR1_MASK 0x02U
#define CANRXTSR_TSR2_MASK 0x04U
#define CANRXTSR_TSR3_MASK 0x08U
#define CANRXTSR_TSR4_MASK 0x10U
#define CANRXTSR_TSR5_MASK 0x20U
#define CANRXTSR_TSR6_MASK 0x40U
#define CANRXTSR_TSR7_MASK 0x80U
#define CANRXTSR_TSR8_MASK 0x0100U
#define CANRXTSR_TSR9_MASK 0x0200U
#define CANRXTSR_TSR10_MASK 0x0400U
#define CANRXTSR_TSR11_MASK 0x0800U
#define CANRXTSR_TSR12_MASK 0x1000U
#define CANRXTSR_TSR13_MASK 0x2000U
#define CANRXTSR_TSR14_MASK 0x4000U
#define CANRXTSR_TSR15_MASK 0x8000U
/*** CANTXIDR0 - MSCAN Transmit Identifier Register 0; 0x00000170 ***/
typedef union {
byte Byte;
struct {
byte ID21 :1; /* Extended format identifier Bit 21 */
byte ID22 :1; /* Extended format identifier Bit 22 */
byte ID23 :1; /* Extended format identifier Bit 23 */
byte ID24 :1; /* Extended format identifier Bit 24 */
byte ID25 :1; /* Extended format identifier Bit 25 */
byte ID26 :1; /* Extended format identifier Bit 26 */
byte ID27 :1; /* Extended format identifier Bit 27 */
byte ID28 :1; /* Extended format identifier Bit 28 */
} Bits;
} CANTXIDR0STR;
extern volatile CANTXIDR0STR _CANTXIDR0 @(REG_BASE + 0x00000170UL);
#define CANTXIDR0 _CANTXIDR0.Byte
#define CANTXIDR0_ID21 _CANTXIDR0.Bits.ID21
#define CANTXIDR0_ID22 _CANTXIDR0.Bits.ID22
#define CANTXIDR0_ID23 _CANTXIDR0.Bits.ID23
#define CANTXIDR0_ID24 _CANTXIDR0.Bits.ID24
#define CANTXIDR0_ID25 _CANTXIDR0.Bits.ID25
#define CANTXIDR0_ID26 _CANTXIDR0.Bits.ID26
#define CANTXIDR0_ID27 _CANTXIDR0.Bits.ID27
#define CANTXIDR0_ID28 _CANTXIDR0.Bits.ID28
/* CANTXIDR_ARR: Access 4 CANTXIDRx registers in an array */
#define CANTXIDR_ARR ((volatile byte *) &CANTXIDR0)
#define CANTXIDR0_ID21_MASK 0x01U
#define CANTXIDR0_ID22_MASK 0x02U
#define CANTXIDR0_ID23_MASK 0x04U
#define CANTXIDR0_ID24_MASK 0x08U
#define CANTXIDR0_ID25_MASK 0x10U
#define CANTXIDR0_ID26_MASK 0x20U
#define CANTXIDR0_ID27_MASK 0x40U
#define CANTXIDR0_ID28_MASK 0x80U
/*** CANTXIDR1 - MSCAN Transmit Identifier Register 1; 0x00000171 ***/
typedef union {
byte Byte;
struct {
byte ID15 :1; /* Extended format identifier Bit 15 */
byte ID16 :1; /* Extended format identifier Bit 16 */
byte ID17 :1; /* Extended format identifier Bit 17 */
byte IDE :1; /* ID Extended */
byte SRR :1; /* Substitute Remote Request */
byte ID18 :1; /* Extended format identifier Bit 18 */
byte ID19 :1; /* Extended format identifier Bit 19 */
byte ID20 :1; /* Extended format identifier Bit 20 */
} Bits;
struct {
byte grpID_15 :3;
byte :1;
byte :1;
byte grpID_18 :3;
} MergedBits;
} CANTXIDR1STR;
extern volatile CANTXIDR1STR _CANTXIDR1 @(REG_BASE + 0x00000171UL);
#define CANTXIDR1 _CANTXIDR1.Byte
#define CANTXIDR1_ID15 _CANTXIDR1.Bits.ID15
#define CANTXIDR1_ID16 _CANTXIDR1.Bits.ID16
#define CANTXIDR1_ID17 _CANTXIDR1.Bits.ID17
#define CANTXIDR1_IDE _CANTXIDR1.Bits.IDE
#define CANTXIDR1_SRR _CANTXIDR1.Bits.SRR
#define CANTXIDR1_ID18 _CANTXIDR1.Bits.ID18
#define CANTXIDR1_ID19 _CANTXIDR1.Bits.ID19
#define CANTXIDR1_ID20 _CANTXIDR1.Bits.ID20
#define CANTXIDR1_ID_15 _CANTXIDR1.MergedBits.grpID_15
#define CANTXIDR1_ID_18 _CANTXIDR1.MergedBits.grpID_18
#define CANTXIDR1_ID CANTXIDR1_ID_15
#define CANTXIDR1_ID15_MASK 0x01U
#define CANTXIDR1_ID16_MASK 0x02U
#define CANTXIDR1_ID17_MASK 0x04U
#define CANTXIDR1_IDE_MASK 0x08U
#define CANTXIDR1_SRR_MASK 0x10U
#define CANTXIDR1_ID18_MASK 0x20U
#define CANTXIDR1_ID19_MASK 0x40U
#define CANTXIDR1_ID20_MASK 0x80U
#define CANTXIDR1_ID_15_MASK 0x07U
#define CANTXIDR1_ID_15_BITNUM 0x00U
#define CANTXIDR1_ID_18_MASK 0xE0U
#define CANTXIDR1_ID_18_BITNUM 0x05U
/*** CANTXIDR2 - MSCAN Transmit Identifier Register 2; 0x00000172 ***/
typedef union {
byte Byte;
struct {
byte ID7 :1; /* Extended format identifier Bit 7 */
byte ID8 :1; /* Extended format identifier Bit 8 */
byte ID9 :1; /* Extended format identifier Bit 9 */
byte ID10 :1; /* Extended format identifier Bit 10 */
byte ID11 :1; /* Extended format identifier Bit 11 */
byte ID12 :1; /* Extended format identifier Bit 12 */
byte ID13 :1; /* Extended format identifier Bit 13 */
byte ID14 :1; /* Extended format identifier Bit 14 */
} Bits;
} CANTXIDR2STR;
extern volatile CANTXIDR2STR _CANTXIDR2 @(REG_BASE + 0x00000172UL);
#define CANTXIDR2 _CANTXIDR2.Byte
#define CANTXIDR2_ID7 _CANTXIDR2.Bits.ID7
#define CANTXIDR2_ID8 _CANTXIDR2.Bits.ID8
#define CANTXIDR2_ID9 _CANTXIDR2.Bits.ID9
#define CANTXIDR2_ID10 _CANTXIDR2.Bits.ID10
#define CANTXIDR2_ID11 _CANTXIDR2.Bits.ID11
#define CANTXIDR2_ID12 _CANTXIDR2.Bits.ID12
#define CANTXIDR2_ID13 _CANTXIDR2.Bits.ID13
#define CANTXIDR2_ID14 _CANTXIDR2.Bits.ID14
#define CANTXIDR2_ID7_MASK 0x01U
#define CANTXIDR2_ID8_MASK 0x02U
#define CANTXIDR2_ID9_MASK 0x04U
#define CANTXIDR2_ID10_MASK 0x08U
#define CANTXIDR2_ID11_MASK 0x10U
#define CANTXIDR2_ID12_MASK 0x20U
#define CANTXIDR2_ID13_MASK 0x40U
#define CANTXIDR2_ID14_MASK 0x80U
/*** CANTXIDR3 - MSCAN Transmit Identifier Register 3; 0x00000173 ***/
typedef union {
byte Byte;
struct {
byte RTR :1; /* Remote Transmission Request */
byte ID0 :1; /* Extended format identifier Bit 0 */
byte ID1 :1; /* Extended format identifier Bit 1 */
byte ID2 :1; /* Extended format identifier Bit 2 */
byte ID3 :1; /* Extended format identifier Bit 3 */
byte ID4 :1; /* Extended format identifier Bit 4 */
byte ID5 :1; /* Extended format identifier Bit 5 */
byte ID6 :1; /* Extended format identifier Bit 6 */
} Bits;
struct {
byte :1;
byte grpID :7;
} MergedBits;
} CANTXIDR3STR;
extern volatile CANTXIDR3STR _CANTXIDR3 @(REG_BASE + 0x00000173UL);
#define CANTXIDR3 _CANTXIDR3.Byte
#define CANTXIDR3_RTR _CANTXIDR3.Bits.RTR
#define CANTXIDR3_ID0 _CANTXIDR3.Bits.ID0
#define CANTXIDR3_ID1 _CANTXIDR3.Bits.ID1
#define CANTXIDR3_ID2 _CANTXIDR3.Bits.ID2
#define CANTXIDR3_ID3 _CANTXIDR3.Bits.ID3
#define CANTXIDR3_ID4 _CANTXIDR3.Bits.ID4
#define CANTXIDR3_ID5 _CANTXIDR3.Bits.ID5
#define CANTXIDR3_ID6 _CANTXIDR3.Bits.ID6
#define CANTXIDR3_ID _CANTXIDR3.MergedBits.grpID
#define CANTXIDR3_RTR_MASK 0x01U
#define CANTXIDR3_ID0_MASK 0x02U
#define CANTXIDR3_ID1_MASK 0x04U
#define CANTXIDR3_ID2_MASK 0x08U
#define CANTXIDR3_ID3_MASK 0x10U
#define CANTXIDR3_ID4_MASK 0x20U
#define CANTXIDR3_ID5_MASK 0x40U
#define CANTXIDR3_ID6_MASK 0x80U
#define CANTXIDR3_ID_MASK 0xFEU
#define CANTXIDR3_ID_BITNUM 0x01U
/*** CANTXDSR0 - MSCAN Transmit Data Segment Register 0; 0x00000174 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR0STR;
extern volatile CANTXDSR0STR _CANTXDSR0 @(REG_BASE + 0x00000174UL);
#define CANTXDSR0 _CANTXDSR0.Byte
#define CANTXDSR0_DB0 _CANTXDSR0.Bits.DB0
#define CANTXDSR0_DB1 _CANTXDSR0.Bits.DB1
#define CANTXDSR0_DB2 _CANTXDSR0.Bits.DB2
#define CANTXDSR0_DB3 _CANTXDSR0.Bits.DB3
#define CANTXDSR0_DB4 _CANTXDSR0.Bits.DB4
#define CANTXDSR0_DB5 _CANTXDSR0.Bits.DB5
#define CANTXDSR0_DB6 _CANTXDSR0.Bits.DB6
#define CANTXDSR0_DB7 _CANTXDSR0.Bits.DB7
/* CANTXDSR_ARR: Access 8 CANTXDSRx registers in an array */
#define CANTXDSR_ARR ((volatile byte *) &CANTXDSR0)
#define CANTXDSR0_DB0_MASK 0x01U
#define CANTXDSR0_DB1_MASK 0x02U
#define CANTXDSR0_DB2_MASK 0x04U
#define CANTXDSR0_DB3_MASK 0x08U
#define CANTXDSR0_DB4_MASK 0x10U
#define CANTXDSR0_DB5_MASK 0x20U
#define CANTXDSR0_DB6_MASK 0x40U
#define CANTXDSR0_DB7_MASK 0x80U
/*** CANTXDSR1 - MSCAN Transmit Data Segment Register 1; 0x00000175 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR1STR;
extern volatile CANTXDSR1STR _CANTXDSR1 @(REG_BASE + 0x00000175UL);
#define CANTXDSR1 _CANTXDSR1.Byte
#define CANTXDSR1_DB0 _CANTXDSR1.Bits.DB0
#define CANTXDSR1_DB1 _CANTXDSR1.Bits.DB1
#define CANTXDSR1_DB2 _CANTXDSR1.Bits.DB2
#define CANTXDSR1_DB3 _CANTXDSR1.Bits.DB3
#define CANTXDSR1_DB4 _CANTXDSR1.Bits.DB4
#define CANTXDSR1_DB5 _CANTXDSR1.Bits.DB5
#define CANTXDSR1_DB6 _CANTXDSR1.Bits.DB6
#define CANTXDSR1_DB7 _CANTXDSR1.Bits.DB7
#define CANTXDSR1_DB0_MASK 0x01U
#define CANTXDSR1_DB1_MASK 0x02U
#define CANTXDSR1_DB2_MASK 0x04U
#define CANTXDSR1_DB3_MASK 0x08U
#define CANTXDSR1_DB4_MASK 0x10U
#define CANTXDSR1_DB5_MASK 0x20U
#define CANTXDSR1_DB6_MASK 0x40U
#define CANTXDSR1_DB7_MASK 0x80U
/*** CANTXDSR2 - MSCAN Transmit Data Segment Register 2; 0x00000176 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR2STR;
extern volatile CANTXDSR2STR _CANTXDSR2 @(REG_BASE + 0x00000176UL);
#define CANTXDSR2 _CANTXDSR2.Byte
#define CANTXDSR2_DB0 _CANTXDSR2.Bits.DB0
#define CANTXDSR2_DB1 _CANTXDSR2.Bits.DB1
#define CANTXDSR2_DB2 _CANTXDSR2.Bits.DB2
#define CANTXDSR2_DB3 _CANTXDSR2.Bits.DB3
#define CANTXDSR2_DB4 _CANTXDSR2.Bits.DB4
#define CANTXDSR2_DB5 _CANTXDSR2.Bits.DB5
#define CANTXDSR2_DB6 _CANTXDSR2.Bits.DB6
#define CANTXDSR2_DB7 _CANTXDSR2.Bits.DB7
#define CANTXDSR2_DB0_MASK 0x01U
#define CANTXDSR2_DB1_MASK 0x02U
#define CANTXDSR2_DB2_MASK 0x04U
#define CANTXDSR2_DB3_MASK 0x08U
#define CANTXDSR2_DB4_MASK 0x10U
#define CANTXDSR2_DB5_MASK 0x20U
#define CANTXDSR2_DB6_MASK 0x40U
#define CANTXDSR2_DB7_MASK 0x80U
/*** CANTXDSR3 - MSCAN Transmit Data Segment Register 3; 0x00000177 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR3STR;
extern volatile CANTXDSR3STR _CANTXDSR3 @(REG_BASE + 0x00000177UL);
#define CANTXDSR3 _CANTXDSR3.Byte
#define CANTXDSR3_DB0 _CANTXDSR3.Bits.DB0
#define CANTXDSR3_DB1 _CANTXDSR3.Bits.DB1
#define CANTXDSR3_DB2 _CANTXDSR3.Bits.DB2
#define CANTXDSR3_DB3 _CANTXDSR3.Bits.DB3
#define CANTXDSR3_DB4 _CANTXDSR3.Bits.DB4
#define CANTXDSR3_DB5 _CANTXDSR3.Bits.DB5
#define CANTXDSR3_DB6 _CANTXDSR3.Bits.DB6
#define CANTXDSR3_DB7 _CANTXDSR3.Bits.DB7
#define CANTXDSR3_DB0_MASK 0x01U
#define CANTXDSR3_DB1_MASK 0x02U
#define CANTXDSR3_DB2_MASK 0x04U
#define CANTXDSR3_DB3_MASK 0x08U
#define CANTXDSR3_DB4_MASK 0x10U
#define CANTXDSR3_DB5_MASK 0x20U
#define CANTXDSR3_DB6_MASK 0x40U
#define CANTXDSR3_DB7_MASK 0x80U
/*** CANTXDSR4 - MSCAN Transmit Data Segment Register 4; 0x00000178 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR4STR;
extern volatile CANTXDSR4STR _CANTXDSR4 @(REG_BASE + 0x00000178UL);
#define CANTXDSR4 _CANTXDSR4.Byte
#define CANTXDSR4_DB0 _CANTXDSR4.Bits.DB0
#define CANTXDSR4_DB1 _CANTXDSR4.Bits.DB1
#define CANTXDSR4_DB2 _CANTXDSR4.Bits.DB2
#define CANTXDSR4_DB3 _CANTXDSR4.Bits.DB3
#define CANTXDSR4_DB4 _CANTXDSR4.Bits.DB4
#define CANTXDSR4_DB5 _CANTXDSR4.Bits.DB5
#define CANTXDSR4_DB6 _CANTXDSR4.Bits.DB6
#define CANTXDSR4_DB7 _CANTXDSR4.Bits.DB7
#define CANTXDSR4_DB0_MASK 0x01U
#define CANTXDSR4_DB1_MASK 0x02U
#define CANTXDSR4_DB2_MASK 0x04U
#define CANTXDSR4_DB3_MASK 0x08U
#define CANTXDSR4_DB4_MASK 0x10U
#define CANTXDSR4_DB5_MASK 0x20U
#define CANTXDSR4_DB6_MASK 0x40U
#define CANTXDSR4_DB7_MASK 0x80U
/*** CANTXDSR5 - MSCAN Transmit Data Segment Register 5; 0x00000179 ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR5STR;
extern volatile CANTXDSR5STR _CANTXDSR5 @(REG_BASE + 0x00000179UL);
#define CANTXDSR5 _CANTXDSR5.Byte
#define CANTXDSR5_DB0 _CANTXDSR5.Bits.DB0
#define CANTXDSR5_DB1 _CANTXDSR5.Bits.DB1
#define CANTXDSR5_DB2 _CANTXDSR5.Bits.DB2
#define CANTXDSR5_DB3 _CANTXDSR5.Bits.DB3
#define CANTXDSR5_DB4 _CANTXDSR5.Bits.DB4
#define CANTXDSR5_DB5 _CANTXDSR5.Bits.DB5
#define CANTXDSR5_DB6 _CANTXDSR5.Bits.DB6
#define CANTXDSR5_DB7 _CANTXDSR5.Bits.DB7
#define CANTXDSR5_DB0_MASK 0x01U
#define CANTXDSR5_DB1_MASK 0x02U
#define CANTXDSR5_DB2_MASK 0x04U
#define CANTXDSR5_DB3_MASK 0x08U
#define CANTXDSR5_DB4_MASK 0x10U
#define CANTXDSR5_DB5_MASK 0x20U
#define CANTXDSR5_DB6_MASK 0x40U
#define CANTXDSR5_DB7_MASK 0x80U
/*** CANTXDSR6 - MSCAN Transmit Data Segment Register 6; 0x0000017A ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR6STR;
extern volatile CANTXDSR6STR _CANTXDSR6 @(REG_BASE + 0x0000017AUL);
#define CANTXDSR6 _CANTXDSR6.Byte
#define CANTXDSR6_DB0 _CANTXDSR6.Bits.DB0
#define CANTXDSR6_DB1 _CANTXDSR6.Bits.DB1
#define CANTXDSR6_DB2 _CANTXDSR6.Bits.DB2
#define CANTXDSR6_DB3 _CANTXDSR6.Bits.DB3
#define CANTXDSR6_DB4 _CANTXDSR6.Bits.DB4
#define CANTXDSR6_DB5 _CANTXDSR6.Bits.DB5
#define CANTXDSR6_DB6 _CANTXDSR6.Bits.DB6
#define CANTXDSR6_DB7 _CANTXDSR6.Bits.DB7
#define CANTXDSR6_DB0_MASK 0x01U
#define CANTXDSR6_DB1_MASK 0x02U
#define CANTXDSR6_DB2_MASK 0x04U
#define CANTXDSR6_DB3_MASK 0x08U
#define CANTXDSR6_DB4_MASK 0x10U
#define CANTXDSR6_DB5_MASK 0x20U
#define CANTXDSR6_DB6_MASK 0x40U
#define CANTXDSR6_DB7_MASK 0x80U
/*** CANTXDSR7 - MSCAN Transmit Data Segment Register 7; 0x0000017B ***/
typedef union {
byte Byte;
struct {
byte DB0 :1; /* Data Bit 0 */
byte DB1 :1; /* Data Bit 1 */
byte DB2 :1; /* Data Bit 2 */
byte DB3 :1; /* Data Bit 3 */
byte DB4 :1; /* Data Bit 4 */
byte DB5 :1; /* Data Bit 5 */
byte DB6 :1; /* Data Bit 6 */
byte DB7 :1; /* Data Bit 7 */
} Bits;
} CANTXDSR7STR;
extern volatile CANTXDSR7STR _CANTXDSR7 @(REG_BASE + 0x0000017BUL);
#define CANTXDSR7 _CANTXDSR7.Byte
#define CANTXDSR7_DB0 _CANTXDSR7.Bits.DB0
#define CANTXDSR7_DB1 _CANTXDSR7.Bits.DB1
#define CANTXDSR7_DB2 _CANTXDSR7.Bits.DB2
#define CANTXDSR7_DB3 _CANTXDSR7.Bits.DB3
#define CANTXDSR7_DB4 _CANTXDSR7.Bits.DB4
#define CANTXDSR7_DB5 _CANTXDSR7.Bits.DB5
#define CANTXDSR7_DB6 _CANTXDSR7.Bits.DB6
#define CANTXDSR7_DB7 _CANTXDSR7.Bits.DB7
#define CANTXDSR7_DB0_MASK 0x01U
#define CANTXDSR7_DB1_MASK 0x02U
#define CANTXDSR7_DB2_MASK 0x04U
#define CANTXDSR7_DB3_MASK 0x08U
#define CANTXDSR7_DB4_MASK 0x10U
#define CANTXDSR7_DB5_MASK 0x20U
#define CANTXDSR7_DB6_MASK 0x40U
#define CANTXDSR7_DB7_MASK 0x80U
/*** CANTXDLR - MSCAN Transmit Data Length Register; 0x0000017C ***/
typedef union {
byte Byte;
struct {
byte DLC0 :1; /* Data Length Code Bit 0 */
byte DLC1 :1; /* Data Length Code Bit 1 */
byte DLC2 :1; /* Data Length Code Bit 2 */
byte DLC3 :1; /* Data Length Code Bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpDLC :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} CANTXDLRSTR;
extern volatile CANTXDLRSTR _CANTXDLR @(REG_BASE + 0x0000017CUL);
#define CANTXDLR _CANTXDLR.Byte
#define CANTXDLR_DLC0 _CANTXDLR.Bits.DLC0
#define CANTXDLR_DLC1 _CANTXDLR.Bits.DLC1
#define CANTXDLR_DLC2 _CANTXDLR.Bits.DLC2
#define CANTXDLR_DLC3 _CANTXDLR.Bits.DLC3
#define CANTXDLR_DLC _CANTXDLR.MergedBits.grpDLC
#define CANTXDLR_DLC0_MASK 0x01U
#define CANTXDLR_DLC1_MASK 0x02U
#define CANTXDLR_DLC2_MASK 0x04U
#define CANTXDLR_DLC3_MASK 0x08U
#define CANTXDLR_DLC_MASK 0x0FU
#define CANTXDLR_DLC_BITNUM 0x00U
/*** CANTXTBPR - MSCAN Transmit Buffer Priority; 0x0000017D ***/
typedef union {
byte Byte;
struct {
byte PRIO0 :1; /* Transmit Buffer Priority Bit 0 */
byte PRIO1 :1; /* Transmit Buffer Priority Bit 1 */
byte PRIO2 :1; /* Transmit Buffer Priority Bit 2 */
byte PRIO3 :1; /* Transmit Buffer Priority Bit 3 */
byte PRIO4 :1; /* Transmit Buffer Priority Bit 4 */
byte PRIO5 :1; /* Transmit Buffer Priority Bit 5 */
byte PRIO6 :1; /* Transmit Buffer Priority Bit 6 */
byte PRIO7 :1; /* Transmit Buffer Priority Bit 7 */
} Bits;
} CANTXTBPRSTR;
extern volatile CANTXTBPRSTR _CANTXTBPR @(REG_BASE + 0x0000017DUL);
#define CANTXTBPR _CANTXTBPR.Byte
#define CANTXTBPR_PRIO0 _CANTXTBPR.Bits.PRIO0
#define CANTXTBPR_PRIO1 _CANTXTBPR.Bits.PRIO1
#define CANTXTBPR_PRIO2 _CANTXTBPR.Bits.PRIO2
#define CANTXTBPR_PRIO3 _CANTXTBPR.Bits.PRIO3
#define CANTXTBPR_PRIO4 _CANTXTBPR.Bits.PRIO4
#define CANTXTBPR_PRIO5 _CANTXTBPR.Bits.PRIO5
#define CANTXTBPR_PRIO6 _CANTXTBPR.Bits.PRIO6
#define CANTXTBPR_PRIO7 _CANTXTBPR.Bits.PRIO7
#define CANTXTBPR_PRIO0_MASK 0x01U
#define CANTXTBPR_PRIO1_MASK 0x02U
#define CANTXTBPR_PRIO2_MASK 0x04U
#define CANTXTBPR_PRIO3_MASK 0x08U
#define CANTXTBPR_PRIO4_MASK 0x10U
#define CANTXTBPR_PRIO5_MASK 0x20U
#define CANTXTBPR_PRIO6_MASK 0x40U
#define CANTXTBPR_PRIO7_MASK 0x80U
/*** CANTXTSR - MSCAN Transmit Time Stamp Register; 0x0000017E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** CANTXTSRH - MSCAN Transmit Time Stamp Register High; 0x0000017E ***/
union {
byte Byte;
struct {
byte TSR8 :1; /* Time Stamp Bit 8 */
byte TSR9 :1; /* Time Stamp Bit 9 */
byte TSR10 :1; /* Time Stamp Bit 10 */
byte TSR11 :1; /* Time Stamp Bit 11 */
byte TSR12 :1; /* Time Stamp Bit 12 */
byte TSR13 :1; /* Time Stamp Bit 13 */
byte TSR14 :1; /* Time Stamp Bit 14 */
byte TSR15 :1; /* Time Stamp Bit 15 */
} Bits;
} CANTXTSRHSTR;
#define CANTXTSRH _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Byte
#define CANTXTSRH_TSR8 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR8
#define CANTXTSRH_TSR9 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR9
#define CANTXTSRH_TSR10 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR10
#define CANTXTSRH_TSR11 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR11
#define CANTXTSRH_TSR12 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR12
#define CANTXTSRH_TSR13 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR13
#define CANTXTSRH_TSR14 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR14
#define CANTXTSRH_TSR15 _CANTXTSR.Overlap_STR.CANTXTSRHSTR.Bits.TSR15
#define CANTXTSRH_TSR8_MASK 0x01U
#define CANTXTSRH_TSR9_MASK 0x02U
#define CANTXTSRH_TSR10_MASK 0x04U
#define CANTXTSRH_TSR11_MASK 0x08U
#define CANTXTSRH_TSR12_MASK 0x10U
#define CANTXTSRH_TSR13_MASK 0x20U
#define CANTXTSRH_TSR14_MASK 0x40U
#define CANTXTSRH_TSR15_MASK 0x80U
/*** CANTXTSRL - MSCAN Transmit Time Stamp Register Low; 0x0000017F ***/
union {
byte Byte;
struct {
byte TSR0 :1; /* Time Stamp Bit 0 */
byte TSR1 :1; /* Time Stamp Bit 1 */
byte TSR2 :1; /* Time Stamp Bit 2 */
byte TSR3 :1; /* Time Stamp Bit 3 */
byte TSR4 :1; /* Time Stamp Bit 4 */
byte TSR5 :1; /* Time Stamp Bit 5 */
byte TSR6 :1; /* Time Stamp Bit 6 */
byte TSR7 :1; /* Time Stamp Bit 7 */
} Bits;
} CANTXTSRLSTR;
#define CANTXTSRL _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Byte
#define CANTXTSRL_TSR0 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR0
#define CANTXTSRL_TSR1 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR1
#define CANTXTSRL_TSR2 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR2
#define CANTXTSRL_TSR3 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR3
#define CANTXTSRL_TSR4 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR4
#define CANTXTSRL_TSR5 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR5
#define CANTXTSRL_TSR6 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR6
#define CANTXTSRL_TSR7 _CANTXTSR.Overlap_STR.CANTXTSRLSTR.Bits.TSR7
#define CANTXTSRL_TSR0_MASK 0x01U
#define CANTXTSRL_TSR1_MASK 0x02U
#define CANTXTSRL_TSR2_MASK 0x04U
#define CANTXTSRL_TSR3_MASK 0x08U
#define CANTXTSRL_TSR4_MASK 0x10U
#define CANTXTSRL_TSR5_MASK 0x20U
#define CANTXTSRL_TSR6_MASK 0x40U
#define CANTXTSRL_TSR7_MASK 0x80U
} Overlap_STR;
struct {
word TSR0 :1; /* Time Stamp Bit 0 */
word TSR1 :1; /* Time Stamp Bit 1 */
word TSR2 :1; /* Time Stamp Bit 2 */
word TSR3 :1; /* Time Stamp Bit 3 */
word TSR4 :1; /* Time Stamp Bit 4 */
word TSR5 :1; /* Time Stamp Bit 5 */
word TSR6 :1; /* Time Stamp Bit 6 */
word TSR7 :1; /* Time Stamp Bit 7 */
word TSR8 :1; /* Time Stamp Bit 8 */
word TSR9 :1; /* Time Stamp Bit 9 */
word TSR10 :1; /* Time Stamp Bit 10 */
word TSR11 :1; /* Time Stamp Bit 11 */
word TSR12 :1; /* Time Stamp Bit 12 */
word TSR13 :1; /* Time Stamp Bit 13 */
word TSR14 :1; /* Time Stamp Bit 14 */
word TSR15 :1; /* Time Stamp Bit 15 */
} Bits;
} CANTXTSRSTR;
extern volatile CANTXTSRSTR _CANTXTSR @(REG_BASE + 0x0000017EUL);
#define CANTXTSR _CANTXTSR.Word
#define CANTXTSR_TSR0 _CANTXTSR.Bits.TSR0
#define CANTXTSR_TSR1 _CANTXTSR.Bits.TSR1
#define CANTXTSR_TSR2 _CANTXTSR.Bits.TSR2
#define CANTXTSR_TSR3 _CANTXTSR.Bits.TSR3
#define CANTXTSR_TSR4 _CANTXTSR.Bits.TSR4
#define CANTXTSR_TSR5 _CANTXTSR.Bits.TSR5
#define CANTXTSR_TSR6 _CANTXTSR.Bits.TSR6
#define CANTXTSR_TSR7 _CANTXTSR.Bits.TSR7
#define CANTXTSR_TSR8 _CANTXTSR.Bits.TSR8
#define CANTXTSR_TSR9 _CANTXTSR.Bits.TSR9
#define CANTXTSR_TSR10 _CANTXTSR.Bits.TSR10
#define CANTXTSR_TSR11 _CANTXTSR.Bits.TSR11
#define CANTXTSR_TSR12 _CANTXTSR.Bits.TSR12
#define CANTXTSR_TSR13 _CANTXTSR.Bits.TSR13
#define CANTXTSR_TSR14 _CANTXTSR.Bits.TSR14
#define CANTXTSR_TSR15 _CANTXTSR.Bits.TSR15
#define CANTXTSR_TSR0_MASK 0x01U
#define CANTXTSR_TSR1_MASK 0x02U
#define CANTXTSR_TSR2_MASK 0x04U
#define CANTXTSR_TSR3_MASK 0x08U
#define CANTXTSR_TSR4_MASK 0x10U
#define CANTXTSR_TSR5_MASK 0x20U
#define CANTXTSR_TSR6_MASK 0x40U
#define CANTXTSR_TSR7_MASK 0x80U
#define CANTXTSR_TSR8_MASK 0x0100U
#define CANTXTSR_TSR9_MASK 0x0200U
#define CANTXTSR_TSR10_MASK 0x0400U
#define CANTXTSR_TSR11_MASK 0x0800U
#define CANTXTSR_TSR12_MASK 0x1000U
#define CANTXTSR_TSR13_MASK 0x2000U
#define CANTXTSR_TSR14_MASK 0x4000U
#define CANTXTSR_TSR15_MASK 0x8000U
/*** PTT - Port T Data Register; 0x00000240 ***/
typedef union {
byte Byte;
struct {
byte PTT0 :1; /* Port T general purpose input/output data bit 0 */
byte PTT1 :1; /* Port T general purpose input/output data bit 1 */
byte PTT2 :1; /* Port T general purpose input/output data bit 2 */
byte PTT3 :1; /* Port T general purpose input/output data bit 3 */
byte PTT4 :1; /* Port T general purpose input/output data bit 4 */
byte PTT5 :1; /* Port T general purpose input/output data bit 5 */
byte PTT6 :1; /* Port T general purpose input/output data bit 6 */
byte PTT7 :1; /* Port T general purpose input/output data bit 7 */
} Bits;
} PTTSTR;
extern volatile PTTSTR _PTT @(REG_BASE + 0x00000240UL);
#define PTT _PTT.Byte
#define PTT_PTT0 _PTT.Bits.PTT0
#define PTT_PTT1 _PTT.Bits.PTT1
#define PTT_PTT2 _PTT.Bits.PTT2
#define PTT_PTT3 _PTT.Bits.PTT3
#define PTT_PTT4 _PTT.Bits.PTT4
#define PTT_PTT5 _PTT.Bits.PTT5
#define PTT_PTT6 _PTT.Bits.PTT6
#define PTT_PTT7 _PTT.Bits.PTT7
#define PTT_PTT0_MASK 0x01U
#define PTT_PTT1_MASK 0x02U
#define PTT_PTT2_MASK 0x04U
#define PTT_PTT3_MASK 0x08U
#define PTT_PTT4_MASK 0x10U
#define PTT_PTT5_MASK 0x20U
#define PTT_PTT6_MASK 0x40U
#define PTT_PTT7_MASK 0x80U
/*** PTIT - Port T Input Register; 0x00000241 ***/
typedef union {
byte Byte;
struct {
byte PTIT0 :1; /* Port T input data bit 0 */
byte PTIT1 :1; /* Port T input data bit 1 */
byte PTIT2 :1; /* Port T input data bit 2 */
byte PTIT3 :1; /* Port T input data bit 3 */
byte PTIT4 :1; /* Port T input data bit 4 */
byte PTIT5 :1; /* Port T input data bit 5 */
byte PTIT6 :1; /* Port T input data bit 6 */
byte PTIT7 :1; /* Port T input data bit 7 */
} Bits;
} PTITSTR;
extern volatile PTITSTR _PTIT @(REG_BASE + 0x00000241UL);
#define PTIT _PTIT.Byte
#define PTIT_PTIT0 _PTIT.Bits.PTIT0
#define PTIT_PTIT1 _PTIT.Bits.PTIT1
#define PTIT_PTIT2 _PTIT.Bits.PTIT2
#define PTIT_PTIT3 _PTIT.Bits.PTIT3
#define PTIT_PTIT4 _PTIT.Bits.PTIT4
#define PTIT_PTIT5 _PTIT.Bits.PTIT5
#define PTIT_PTIT6 _PTIT.Bits.PTIT6
#define PTIT_PTIT7 _PTIT.Bits.PTIT7
#define PTIT_PTIT0_MASK 0x01U
#define PTIT_PTIT1_MASK 0x02U
#define PTIT_PTIT2_MASK 0x04U
#define PTIT_PTIT3_MASK 0x08U
#define PTIT_PTIT4_MASK 0x10U
#define PTIT_PTIT5_MASK 0x20U
#define PTIT_PTIT6_MASK 0x40U
#define PTIT_PTIT7_MASK 0x80U
/*** DDRT - Port T Data Direction Register; 0x00000242 ***/
typedef union {
byte Byte;
struct {
byte DDRT0 :1; /* Port T data direction bit 0 */
byte DDRT1 :1; /* Port T data direction bit 1 */
byte DDRT2 :1; /* Port T data direction bit 2 */
byte DDRT3 :1; /* Port T data direction bit 3 */
byte DDRT4 :1; /* Port T data direction bit 4 */
byte DDRT5 :1; /* Port T data direction bit 5 */
byte DDRT6 :1; /* Port T data direction bit 6 */
byte DDRT7 :1; /* Port T data direction bit 7 */
} Bits;
} DDRTSTR;
extern volatile DDRTSTR _DDRT @(REG_BASE + 0x00000242UL);
#define DDRT _DDRT.Byte
#define DDRT_DDRT0 _DDRT.Bits.DDRT0
#define DDRT_DDRT1 _DDRT.Bits.DDRT1
#define DDRT_DDRT2 _DDRT.Bits.DDRT2
#define DDRT_DDRT3 _DDRT.Bits.DDRT3
#define DDRT_DDRT4 _DDRT.Bits.DDRT4
#define DDRT_DDRT5 _DDRT.Bits.DDRT5
#define DDRT_DDRT6 _DDRT.Bits.DDRT6
#define DDRT_DDRT7 _DDRT.Bits.DDRT7
#define DDRT_DDRT0_MASK 0x01U
#define DDRT_DDRT1_MASK 0x02U
#define DDRT_DDRT2_MASK 0x04U
#define DDRT_DDRT3_MASK 0x08U
#define DDRT_DDRT4_MASK 0x10U
#define DDRT_DDRT5_MASK 0x20U
#define DDRT_DDRT6_MASK 0x40U
#define DDRT_DDRT7_MASK 0x80U
/*** PERT - Port T Pull Device Enable Register; 0x00000244 ***/
typedef union {
byte Byte;
struct {
byte PERT0 :1; /* Port T pull device enable bit 0 */
byte PERT1 :1; /* Port T pull device enable bit 1 */
byte PERT2 :1; /* Port T pull device enable bit 2 */
byte PERT3 :1; /* Port T pull device enable bit 3 */
byte PERT4 :1; /* Port T pull device enable bit 4 */
byte PERT5 :1; /* Port T pull device enable bit 5 */
byte PERT6 :1; /* Port T pull device enable bit 6 */
byte PERT7 :1; /* Port T pull device enable bit 7 */
} Bits;
} PERTSTR;
extern volatile PERTSTR _PERT @(REG_BASE + 0x00000244UL);
#define PERT _PERT.Byte
#define PERT_PERT0 _PERT.Bits.PERT0
#define PERT_PERT1 _PERT.Bits.PERT1
#define PERT_PERT2 _PERT.Bits.PERT2
#define PERT_PERT3 _PERT.Bits.PERT3
#define PERT_PERT4 _PERT.Bits.PERT4
#define PERT_PERT5 _PERT.Bits.PERT5
#define PERT_PERT6 _PERT.Bits.PERT6
#define PERT_PERT7 _PERT.Bits.PERT7
#define PERT_PERT0_MASK 0x01U
#define PERT_PERT1_MASK 0x02U
#define PERT_PERT2_MASK 0x04U
#define PERT_PERT3_MASK 0x08U
#define PERT_PERT4_MASK 0x10U
#define PERT_PERT5_MASK 0x20U
#define PERT_PERT6_MASK 0x40U
#define PERT_PERT7_MASK 0x80U
/*** PPST - Port T Polarity Select Register; 0x00000245 ***/
typedef union {
byte Byte;
struct {
byte PPST0 :1; /* Port T pull device select bit 0 */
byte PPST1 :1; /* Port T pull device select bit 1 */
byte PPST2 :1; /* Port T pull device select bit 2 */
byte PPST3 :1; /* Port T pull device select bit 3 */
byte PPST4 :1; /* Port T pull device select bit 4 */
byte PPST5 :1; /* Port T pull device select bit 5 */
byte PPST6 :1; /* Port T pull device select bit 6 */
byte PPST7 :1; /* Port T pull device select bit 7 */
} Bits;
} PPSTSTR;
extern volatile PPSTSTR _PPST @(REG_BASE + 0x00000245UL);
#define PPST _PPST.Byte
#define PPST_PPST0 _PPST.Bits.PPST0
#define PPST_PPST1 _PPST.Bits.PPST1
#define PPST_PPST2 _PPST.Bits.PPST2
#define PPST_PPST3 _PPST.Bits.PPST3
#define PPST_PPST4 _PPST.Bits.PPST4
#define PPST_PPST5 _PPST.Bits.PPST5
#define PPST_PPST6 _PPST.Bits.PPST6
#define PPST_PPST7 _PPST.Bits.PPST7
#define PPST_PPST0_MASK 0x01U
#define PPST_PPST1_MASK 0x02U
#define PPST_PPST2_MASK 0x04U
#define PPST_PPST3_MASK 0x08U
#define PPST_PPST4_MASK 0x10U
#define PPST_PPST5_MASK 0x20U
#define PPST_PPST6_MASK 0x40U
#define PPST_PPST7_MASK 0x80U
/*** PTS - Port S Data Register; 0x00000248 ***/
typedef union {
byte Byte;
struct {
byte PTS0 :1; /* Port S general purpose input/output data bit 0 */
byte PTS1 :1; /* Port S general purpose input/output data bit 1 */
byte PTS2 :1; /* Port S general purpose input/output data bit 2 */
byte PTS3 :1; /* Port S general purpose input/output data bit 3 */
byte PTS4 :1; /* Port S general purpose input/output data bit 4 */
byte PTS5 :1; /* Port S general purpose input/output data bit 5 */
byte PTS6 :1; /* Port S general purpose input/output data bit 6 */
byte PTS7 :1; /* Port S general purpose input/output data bit 7 */
} Bits;
} PTSSTR;
extern volatile PTSSTR _PTS @(REG_BASE + 0x00000248UL);
#define PTS _PTS.Byte
#define PTS_PTS0 _PTS.Bits.PTS0
#define PTS_PTS1 _PTS.Bits.PTS1
#define PTS_PTS2 _PTS.Bits.PTS2
#define PTS_PTS3 _PTS.Bits.PTS3
#define PTS_PTS4 _PTS.Bits.PTS4
#define PTS_PTS5 _PTS.Bits.PTS5
#define PTS_PTS6 _PTS.Bits.PTS6
#define PTS_PTS7 _PTS.Bits.PTS7
#define PTS_PTS0_MASK 0x01U
#define PTS_PTS1_MASK 0x02U
#define PTS_PTS2_MASK 0x04U
#define PTS_PTS3_MASK 0x08U
#define PTS_PTS4_MASK 0x10U
#define PTS_PTS5_MASK 0x20U
#define PTS_PTS6_MASK 0x40U
#define PTS_PTS7_MASK 0x80U
/*** PTIS - Port S Input Register; 0x00000249 ***/
typedef union {
byte Byte;
struct {
byte PTIS0 :1; /* Port S input data bit 0 */
byte PTIS1 :1; /* Port S input data bit 1 */
byte PTIS2 :1; /* Port S input data bit 2 */
byte PTIS3 :1; /* Port S input data bit 3 */
byte PTIS4 :1; /* Port S input data bit 4 */
byte PTIS5 :1; /* Port S input data bit 5 */
byte PTIS6 :1; /* Port S input data bit 6 */
byte PTIS7 :1; /* Port S input data bit 7 */
} Bits;
} PTISSTR;
extern volatile PTISSTR _PTIS @(REG_BASE + 0x00000249UL);
#define PTIS _PTIS.Byte
#define PTIS_PTIS0 _PTIS.Bits.PTIS0
#define PTIS_PTIS1 _PTIS.Bits.PTIS1
#define PTIS_PTIS2 _PTIS.Bits.PTIS2
#define PTIS_PTIS3 _PTIS.Bits.PTIS3
#define PTIS_PTIS4 _PTIS.Bits.PTIS4
#define PTIS_PTIS5 _PTIS.Bits.PTIS5
#define PTIS_PTIS6 _PTIS.Bits.PTIS6
#define PTIS_PTIS7 _PTIS.Bits.PTIS7
#define PTIS_PTIS0_MASK 0x01U
#define PTIS_PTIS1_MASK 0x02U
#define PTIS_PTIS2_MASK 0x04U
#define PTIS_PTIS3_MASK 0x08U
#define PTIS_PTIS4_MASK 0x10U
#define PTIS_PTIS5_MASK 0x20U
#define PTIS_PTIS6_MASK 0x40U
#define PTIS_PTIS7_MASK 0x80U
/*** DDRS - Port S Data Direction Register; 0x0000024A ***/
typedef union {
byte Byte;
struct {
byte DDRS0 :1; /* Port S data direction bit 0 */
byte DDRS1 :1; /* Port S data direction bit 1 */
byte DDRS2 :1; /* Port S data direction bit 2 */
byte DDRS3 :1; /* Port S data direction bit 3 */
byte DDRS4 :1; /* Port S data direction bit 4 */
byte DDRS5 :1; /* Port S data direction bit 5 */
byte DDRS6 :1; /* Port S data direction bit 6 */
byte DDRS7 :1; /* Port S data direction bit 7 */
} Bits;
} DDRSSTR;
extern volatile DDRSSTR _DDRS @(REG_BASE + 0x0000024AUL);
#define DDRS _DDRS.Byte
#define DDRS_DDRS0 _DDRS.Bits.DDRS0
#define DDRS_DDRS1 _DDRS.Bits.DDRS1
#define DDRS_DDRS2 _DDRS.Bits.DDRS2
#define DDRS_DDRS3 _DDRS.Bits.DDRS3
#define DDRS_DDRS4 _DDRS.Bits.DDRS4
#define DDRS_DDRS5 _DDRS.Bits.DDRS5
#define DDRS_DDRS6 _DDRS.Bits.DDRS6
#define DDRS_DDRS7 _DDRS.Bits.DDRS7
#define DDRS_DDRS0_MASK 0x01U
#define DDRS_DDRS1_MASK 0x02U
#define DDRS_DDRS2_MASK 0x04U
#define DDRS_DDRS3_MASK 0x08U
#define DDRS_DDRS4_MASK 0x10U
#define DDRS_DDRS5_MASK 0x20U
#define DDRS_DDRS6_MASK 0x40U
#define DDRS_DDRS7_MASK 0x80U
/*** PERS - Port S Pull Device Enable Register; 0x0000024C ***/
typedef union {
byte Byte;
struct {
byte PERS0 :1; /* Port S pull device enable bit 0 */
byte PERS1 :1; /* Port S pull device enable bit 1 */
byte PERS2 :1; /* Port S pull device enable bit 2 */
byte PERS3 :1; /* Port S pull device enable bit 3 */
byte PERS4 :1; /* Port S pull device enable bit 4 */
byte PERS5 :1; /* Port S pull device enable bit 5 */
byte PERS6 :1; /* Port S pull device enable bit 6 */
byte PERS7 :1; /* Port S pull device enable bit 7 */
} Bits;
} PERSSTR;
extern volatile PERSSTR _PERS @(REG_BASE + 0x0000024CUL);
#define PERS _PERS.Byte
#define PERS_PERS0 _PERS.Bits.PERS0
#define PERS_PERS1 _PERS.Bits.PERS1
#define PERS_PERS2 _PERS.Bits.PERS2
#define PERS_PERS3 _PERS.Bits.PERS3
#define PERS_PERS4 _PERS.Bits.PERS4
#define PERS_PERS5 _PERS.Bits.PERS5
#define PERS_PERS6 _PERS.Bits.PERS6
#define PERS_PERS7 _PERS.Bits.PERS7
#define PERS_PERS0_MASK 0x01U
#define PERS_PERS1_MASK 0x02U
#define PERS_PERS2_MASK 0x04U
#define PERS_PERS3_MASK 0x08U
#define PERS_PERS4_MASK 0x10U
#define PERS_PERS5_MASK 0x20U
#define PERS_PERS6_MASK 0x40U
#define PERS_PERS7_MASK 0x80U
/*** PPSS - Port S Polarity Select Register; 0x0000024D ***/
typedef union {
byte Byte;
struct {
byte PPSS0 :1; /* Port S pull device select bit 0 */
byte PPSS1 :1; /* Port S pull device select bit 1 */
byte PPSS2 :1; /* Port S pull device select bit 2 */
byte PPSS3 :1; /* Port S pull device select bit 3 */
byte PPSS4 :1; /* Port S pull device select bit 4 */
byte PPSS5 :1; /* Port S pull device select bit 5 */
byte PPSS6 :1; /* Port S pull device select bit 6 */
byte PPSS7 :1; /* Port S pull device select bit 7 */
} Bits;
} PPSSSTR;
extern volatile PPSSSTR _PPSS @(REG_BASE + 0x0000024DUL);
#define PPSS _PPSS.Byte
#define PPSS_PPSS0 _PPSS.Bits.PPSS0
#define PPSS_PPSS1 _PPSS.Bits.PPSS1
#define PPSS_PPSS2 _PPSS.Bits.PPSS2
#define PPSS_PPSS3 _PPSS.Bits.PPSS3
#define PPSS_PPSS4 _PPSS.Bits.PPSS4
#define PPSS_PPSS5 _PPSS.Bits.PPSS5
#define PPSS_PPSS6 _PPSS.Bits.PPSS6
#define PPSS_PPSS7 _PPSS.Bits.PPSS7
#define PPSS_PPSS0_MASK 0x01U
#define PPSS_PPSS1_MASK 0x02U
#define PPSS_PPSS2_MASK 0x04U
#define PPSS_PPSS3_MASK 0x08U
#define PPSS_PPSS4_MASK 0x10U
#define PPSS_PPSS5_MASK 0x20U
#define PPSS_PPSS6_MASK 0x40U
#define PPSS_PPSS7_MASK 0x80U
/*** WOMS - Port S Wired-Or Mode Register; 0x0000024E ***/
typedef union {
byte Byte;
struct {
byte WOMS0 :1; /* Port S wired-or mode bit 0 */
byte WOMS1 :1; /* Port S wired-or mode bit 1 */
byte WOMS2 :1; /* Port S wired-or mode bit 2 */
byte WOMS3 :1; /* Port S wired-or mode bit 3 */
byte WOMS4 :1; /* Port S wired-or mode bit 4 */
byte WOMS5 :1; /* Port S wired-or mode bit 5 */
byte WOMS6 :1; /* Port S wired-or mode bit 6 */
byte WOMS7 :1; /* Port S wired-or mode bit 7 */
} Bits;
} WOMSSTR;
extern volatile WOMSSTR _WOMS @(REG_BASE + 0x0000024EUL);
#define WOMS _WOMS.Byte
#define WOMS_WOMS0 _WOMS.Bits.WOMS0
#define WOMS_WOMS1 _WOMS.Bits.WOMS1
#define WOMS_WOMS2 _WOMS.Bits.WOMS2
#define WOMS_WOMS3 _WOMS.Bits.WOMS3
#define WOMS_WOMS4 _WOMS.Bits.WOMS4
#define WOMS_WOMS5 _WOMS.Bits.WOMS5
#define WOMS_WOMS6 _WOMS.Bits.WOMS6
#define WOMS_WOMS7 _WOMS.Bits.WOMS7
#define WOMS_WOMS0_MASK 0x01U
#define WOMS_WOMS1_MASK 0x02U
#define WOMS_WOMS2_MASK 0x04U
#define WOMS_WOMS3_MASK 0x08U
#define WOMS_WOMS4_MASK 0x10U
#define WOMS_WOMS5_MASK 0x20U
#define WOMS_WOMS6_MASK 0x40U
#define WOMS_WOMS7_MASK 0x80U
/*** PRR0 - Pin Routing Register 0; 0x0000024F ***/
typedef union {
byte Byte;
struct {
byte PRR0S0 :1; /* Pin Routing Register Serial Module, bit 0 */
byte PRR0S1 :1; /* Pin Routing Register Serial Module, bit 1 */
byte PRR0T20 :1; /* Pin Routing Register IOC2, bit 0 */
byte PRR0T21 :1; /* Pin Routing Register IOC2, bit 1 */
byte PRR0T30 :1; /* Pin Routing Register IOC3, bit 0 */
byte PRR0T31 :1; /* Pin Routing Register IOC3, bit 1 */
byte PRR0P2 :1; /* Pin Routing Register PWM2 */
byte PRR0P3 :1; /* Pin Routing Register PWM3 */
} Bits;
struct {
byte grpPRR0S :2;
byte grpPRR0T_20 :2;
byte grpPRR0T_30 :2;
byte grpPRR0P_2 :2;
} MergedBits;
} PRR0STR;
extern volatile PRR0STR _PRR0 @(REG_BASE + 0x0000024FUL);
#define PRR0 _PRR0.Byte
#define PRR0_PRR0S0 _PRR0.Bits.PRR0S0
#define PRR0_PRR0S1 _PRR0.Bits.PRR0S1
#define PRR0_PRR0T20 _PRR0.Bits.PRR0T20
#define PRR0_PRR0T21 _PRR0.Bits.PRR0T21
#define PRR0_PRR0T30 _PRR0.Bits.PRR0T30
#define PRR0_PRR0T31 _PRR0.Bits.PRR0T31
#define PRR0_PRR0P2 _PRR0.Bits.PRR0P2
#define PRR0_PRR0P3 _PRR0.Bits.PRR0P3
#define PRR0_PRR0S _PRR0.MergedBits.grpPRR0S
#define PRR0_PRR0T_20 _PRR0.MergedBits.grpPRR0T_20
#define PRR0_PRR0T_30 _PRR0.MergedBits.grpPRR0T_30
#define PRR0_PRR0P_2 _PRR0.MergedBits.grpPRR0P_2
#define PRR0_PRR0T PRR0_PRR0T_20
#define PRR0_PRR0P PRR0_PRR0P_2
#define PRR0_PRR0S0_MASK 0x01U
#define PRR0_PRR0S1_MASK 0x02U
#define PRR0_PRR0T20_MASK 0x04U
#define PRR0_PRR0T21_MASK 0x08U
#define PRR0_PRR0T30_MASK 0x10U
#define PRR0_PRR0T31_MASK 0x20U
#define PRR0_PRR0P2_MASK 0x40U
#define PRR0_PRR0P3_MASK 0x80U
#define PRR0_PRR0S_MASK 0x03U
#define PRR0_PRR0S_BITNUM 0x00U
#define PRR0_PRR0T_20_MASK 0x0CU
#define PRR0_PRR0T_20_BITNUM 0x02U
#define PRR0_PRR0T_30_MASK 0x30U
#define PRR0_PRR0T_30_BITNUM 0x04U
#define PRR0_PRR0P_2_MASK 0xC0U
#define PRR0_PRR0P_2_BITNUM 0x06U
/*** PTM - Port M Data Register; 0x00000250 ***/
typedef union {
byte Byte;
struct {
byte PTM0 :1; /* Port M general purpose input/output data bit 0 */
byte PTM1 :1; /* Port M general purpose input/output data bit 1 */
byte PTM2 :1; /* Port M general purpose input/output data bit 2 */
byte PTM3 :1; /* Port M general purpose input/output data bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpPTM :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} PTMSTR;
extern volatile PTMSTR _PTM @(REG_BASE + 0x00000250UL);
#define PTM _PTM.Byte
#define PTM_PTM0 _PTM.Bits.PTM0
#define PTM_PTM1 _PTM.Bits.PTM1
#define PTM_PTM2 _PTM.Bits.PTM2
#define PTM_PTM3 _PTM.Bits.PTM3
#define PTM_PTM _PTM.MergedBits.grpPTM
#define PTM_PTM0_MASK 0x01U
#define PTM_PTM1_MASK 0x02U
#define PTM_PTM2_MASK 0x04U
#define PTM_PTM3_MASK 0x08U
#define PTM_PTM_MASK 0x0FU
#define PTM_PTM_BITNUM 0x00U
/*** PTIM - Port M Input Register; 0x00000251 ***/
typedef union {
byte Byte;
struct {
byte PTIM0 :1; /* Port M input data bit 0 */
byte PTIM1 :1; /* Port M input data bit 1 */
byte PTIM2 :1; /* Port M input data bit 2 */
byte PTIM3 :1; /* Port M input data bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpPTIM :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} PTIMSTR;
extern volatile PTIMSTR _PTIM @(REG_BASE + 0x00000251UL);
#define PTIM _PTIM.Byte
#define PTIM_PTIM0 _PTIM.Bits.PTIM0
#define PTIM_PTIM1 _PTIM.Bits.PTIM1
#define PTIM_PTIM2 _PTIM.Bits.PTIM2
#define PTIM_PTIM3 _PTIM.Bits.PTIM3
#define PTIM_PTIM _PTIM.MergedBits.grpPTIM
#define PTIM_PTIM0_MASK 0x01U
#define PTIM_PTIM1_MASK 0x02U
#define PTIM_PTIM2_MASK 0x04U
#define PTIM_PTIM3_MASK 0x08U
#define PTIM_PTIM_MASK 0x0FU
#define PTIM_PTIM_BITNUM 0x00U
/*** DDRM - Port M Data Direction Register; 0x00000252 ***/
typedef union {
byte Byte;
struct {
byte DDRM0 :1; /* Port M data direction bit 0 */
byte DDRM1 :1; /* Port M data direction bit 1 */
byte DDRM2 :1; /* Port M data direction bit 2 */
byte DDRM3 :1; /* Port M data direction bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpDDRM :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DDRMSTR;
extern volatile DDRMSTR _DDRM @(REG_BASE + 0x00000252UL);
#define DDRM _DDRM.Byte
#define DDRM_DDRM0 _DDRM.Bits.DDRM0
#define DDRM_DDRM1 _DDRM.Bits.DDRM1
#define DDRM_DDRM2 _DDRM.Bits.DDRM2
#define DDRM_DDRM3 _DDRM.Bits.DDRM3
#define DDRM_DDRM _DDRM.MergedBits.grpDDRM
#define DDRM_DDRM0_MASK 0x01U
#define DDRM_DDRM1_MASK 0x02U
#define DDRM_DDRM2_MASK 0x04U
#define DDRM_DDRM3_MASK 0x08U
#define DDRM_DDRM_MASK 0x0FU
#define DDRM_DDRM_BITNUM 0x00U
/*** PERM - Port M Pull Device Enable Register; 0x00000254 ***/
typedef union {
byte Byte;
struct {
byte PERM0 :1; /* Port M pull device enable bit 0 */
byte PERM1 :1; /* Port M pull device enable bit 1 */
byte PERM2 :1; /* Port M pull device enable bit 2 */
byte PERM3 :1; /* Port M pull device enable bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpPERM :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} PERMSTR;
extern volatile PERMSTR _PERM @(REG_BASE + 0x00000254UL);
#define PERM _PERM.Byte
#define PERM_PERM0 _PERM.Bits.PERM0
#define PERM_PERM1 _PERM.Bits.PERM1
#define PERM_PERM2 _PERM.Bits.PERM2
#define PERM_PERM3 _PERM.Bits.PERM3
#define PERM_PERM _PERM.MergedBits.grpPERM
#define PERM_PERM0_MASK 0x01U
#define PERM_PERM1_MASK 0x02U
#define PERM_PERM2_MASK 0x04U
#define PERM_PERM3_MASK 0x08U
#define PERM_PERM_MASK 0x0FU
#define PERM_PERM_BITNUM 0x00U
/*** PPSM - Port M Polarity Select Register; 0x00000255 ***/
typedef union {
byte Byte;
struct {
byte PPSM0 :1; /* Port M pull device select bit 0 */
byte PPSM1 :1; /* Port M pull device select bit 1 */
byte PPSM2 :1; /* Port M pull device select bit 2 */
byte PPSM3 :1; /* Port M pull device select bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpPPSM :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} PPSMSTR;
extern volatile PPSMSTR _PPSM @(REG_BASE + 0x00000255UL);
#define PPSM _PPSM.Byte
#define PPSM_PPSM0 _PPSM.Bits.PPSM0
#define PPSM_PPSM1 _PPSM.Bits.PPSM1
#define PPSM_PPSM2 _PPSM.Bits.PPSM2
#define PPSM_PPSM3 _PPSM.Bits.PPSM3
#define PPSM_PPSM _PPSM.MergedBits.grpPPSM
#define PPSM_PPSM0_MASK 0x01U
#define PPSM_PPSM1_MASK 0x02U
#define PPSM_PPSM2_MASK 0x04U
#define PPSM_PPSM3_MASK 0x08U
#define PPSM_PPSM_MASK 0x0FU
#define PPSM_PPSM_BITNUM 0x00U
/*** WOMM - Port M Wired-Or Mode Register; 0x00000256 ***/
typedef union {
byte Byte;
struct {
byte WOMM0 :1; /* Port M wired-or mode bit 0 */
byte WOMM1 :1; /* Port M wired-or mode bit 1 */
byte WOMM2 :1; /* Port M wired-or mode bit 2 */
byte WOMM3 :1; /* Port M wired-or mode bit 3 */
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpWOMM :4;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} WOMMSTR;
extern volatile WOMMSTR _WOMM @(REG_BASE + 0x00000256UL);
#define WOMM _WOMM.Byte
#define WOMM_WOMM0 _WOMM.Bits.WOMM0
#define WOMM_WOMM1 _WOMM.Bits.WOMM1
#define WOMM_WOMM2 _WOMM.Bits.WOMM2
#define WOMM_WOMM3 _WOMM.Bits.WOMM3
#define WOMM_WOMM _WOMM.MergedBits.grpWOMM
#define WOMM_WOMM0_MASK 0x01U
#define WOMM_WOMM1_MASK 0x02U
#define WOMM_WOMM2_MASK 0x04U
#define WOMM_WOMM3_MASK 0x08U
#define WOMM_WOMM_MASK 0x0FU
#define WOMM_WOMM_BITNUM 0x00U
/*** PKGCR - Package Code Register; 0x00000257 ***/
typedef union {
byte Byte;
struct {
byte PKGCR0 :1; /* Package Code, bit 0 */
byte PKGCR1 :1; /* Package Code, bit 1 */
byte PKGCR2 :1; /* Package Code, bit 2 */
byte :1;
byte :1;
byte :1;
byte :1;
byte APICLKS7 :1; /* Pin Routing Register API_EXTCLK */
} Bits;
struct {
byte grpPKGCR :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpAPICLKS_7 :1;
} MergedBits;
} PKGCRSTR;
extern volatile PKGCRSTR _PKGCR @(REG_BASE + 0x00000257UL);
#define PKGCR _PKGCR.Byte
#define PKGCR_PKGCR0 _PKGCR.Bits.PKGCR0
#define PKGCR_PKGCR1 _PKGCR.Bits.PKGCR1
#define PKGCR_PKGCR2 _PKGCR.Bits.PKGCR2
#define PKGCR_APICLKS7 _PKGCR.Bits.APICLKS7
#define PKGCR_PKGCR _PKGCR.MergedBits.grpPKGCR
#define PKGCR_PKGCR0_MASK 0x01U
#define PKGCR_PKGCR1_MASK 0x02U
#define PKGCR_PKGCR2_MASK 0x04U
#define PKGCR_APICLKS7_MASK 0x80U
#define PKGCR_PKGCR_MASK 0x07U
#define PKGCR_PKGCR_BITNUM 0x00U
/*** PTP - Port P Data Register; 0x00000258 ***/
typedef union {
byte Byte;
struct {
byte PTP0 :1; /* Port P general purpose input/output data bit 0 */
byte PTP1 :1; /* Port P general purpose input/output data bit 1 */
byte PTP2 :1; /* Port P general purpose input/output data bit 2 */
byte PTP3 :1; /* Port P general purpose input/output data bit 3 */
byte PTP4 :1; /* Port P general purpose input/output data bit 4 */
byte PTP5 :1; /* Port P general purpose input/output data bit 5 */
byte PTP6 :1; /* Port P general purpose input/output data bit 6 */
byte PTP7 :1; /* Port P general purpose input/output data bit 7 */
} Bits;
} PTPSTR;
extern volatile PTPSTR _PTP @(REG_BASE + 0x00000258UL);
#define PTP _PTP.Byte
#define PTP_PTP0 _PTP.Bits.PTP0
#define PTP_PTP1 _PTP.Bits.PTP1
#define PTP_PTP2 _PTP.Bits.PTP2
#define PTP_PTP3 _PTP.Bits.PTP3
#define PTP_PTP4 _PTP.Bits.PTP4
#define PTP_PTP5 _PTP.Bits.PTP5
#define PTP_PTP6 _PTP.Bits.PTP6
#define PTP_PTP7 _PTP.Bits.PTP7
#define PTP_PTP0_MASK 0x01U
#define PTP_PTP1_MASK 0x02U
#define PTP_PTP2_MASK 0x04U
#define PTP_PTP3_MASK 0x08U
#define PTP_PTP4_MASK 0x10U
#define PTP_PTP5_MASK 0x20U
#define PTP_PTP6_MASK 0x40U
#define PTP_PTP7_MASK 0x80U
/*** PTIP - Port P Input Register; 0x00000259 ***/
typedef union {
byte Byte;
struct {
byte PTIP0 :1; /* Port P input data bit 0 */
byte PTIP1 :1; /* Port P input data bit 1 */
byte PTIP2 :1; /* Port P input data bit 2 */
byte PTIP3 :1; /* Port P input data bit 3 */
byte PTIP4 :1; /* Port P input data bit 4 */
byte PTIP5 :1; /* Port P input data bit 5 */
byte PTIP6 :1; /* Port P input data bit 6 */
byte PTIP7 :1; /* Port P input data bit 7 */
} Bits;
} PTIPSTR;
extern volatile PTIPSTR _PTIP @(REG_BASE + 0x00000259UL);
#define PTIP _PTIP.Byte
#define PTIP_PTIP0 _PTIP.Bits.PTIP0
#define PTIP_PTIP1 _PTIP.Bits.PTIP1
#define PTIP_PTIP2 _PTIP.Bits.PTIP2
#define PTIP_PTIP3 _PTIP.Bits.PTIP3
#define PTIP_PTIP4 _PTIP.Bits.PTIP4
#define PTIP_PTIP5 _PTIP.Bits.PTIP5
#define PTIP_PTIP6 _PTIP.Bits.PTIP6
#define PTIP_PTIP7 _PTIP.Bits.PTIP7
#define PTIP_PTIP0_MASK 0x01U
#define PTIP_PTIP1_MASK 0x02U
#define PTIP_PTIP2_MASK 0x04U
#define PTIP_PTIP3_MASK 0x08U
#define PTIP_PTIP4_MASK 0x10U
#define PTIP_PTIP5_MASK 0x20U
#define PTIP_PTIP6_MASK 0x40U
#define PTIP_PTIP7_MASK 0x80U
/*** DDRP - Port P Data Direction Register; 0x0000025A ***/
typedef union {
byte Byte;
struct {
byte DDRP0 :1; /* Port P data direction bit 0 */
byte DDRP1 :1; /* Port P data direction bit 1 */
byte DDRP2 :1; /* Port P data direction bit 2 */
byte DDRP3 :1; /* Port P data direction bit 3 */
byte DDRP4 :1; /* Port P data direction bit 4 */
byte DDRP5 :1; /* Port P data direction bit 5 */
byte DDRP6 :1; /* Port P data direction bit 6 */
byte DDRP7 :1; /* Port P data direction bit 7 */
} Bits;
} DDRPSTR;
extern volatile DDRPSTR _DDRP @(REG_BASE + 0x0000025AUL);
#define DDRP _DDRP.Byte
#define DDRP_DDRP0 _DDRP.Bits.DDRP0
#define DDRP_DDRP1 _DDRP.Bits.DDRP1
#define DDRP_DDRP2 _DDRP.Bits.DDRP2
#define DDRP_DDRP3 _DDRP.Bits.DDRP3
#define DDRP_DDRP4 _DDRP.Bits.DDRP4
#define DDRP_DDRP5 _DDRP.Bits.DDRP5
#define DDRP_DDRP6 _DDRP.Bits.DDRP6
#define DDRP_DDRP7 _DDRP.Bits.DDRP7
#define DDRP_DDRP0_MASK 0x01U
#define DDRP_DDRP1_MASK 0x02U
#define DDRP_DDRP2_MASK 0x04U
#define DDRP_DDRP3_MASK 0x08U
#define DDRP_DDRP4_MASK 0x10U
#define DDRP_DDRP5_MASK 0x20U
#define DDRP_DDRP6_MASK 0x40U
#define DDRP_DDRP7_MASK 0x80U
/*** PERP - Port P Pull Device Enable Register; 0x0000025C ***/
typedef union {
byte Byte;
struct {
byte PERP0 :1; /* Port P pull device enable bit 0 */
byte PERP1 :1; /* Port P pull device enable bit 1 */
byte PERP2 :1; /* Port P pull device enable bit 2 */
byte PERP3 :1; /* Port P pull device enable bit 3 */
byte PERP4 :1; /* Port P pull device enable bit 4 */
byte PERP5 :1; /* Port P pull device enable bit 5 */
byte PERP6 :1; /* Port P pull device enable bit 6 */
byte PERP7 :1; /* Port P pull device enable bit 7 */
} Bits;
} PERPSTR;
extern volatile PERPSTR _PERP @(REG_BASE + 0x0000025CUL);
#define PERP _PERP.Byte
#define PERP_PERP0 _PERP.Bits.PERP0
#define PERP_PERP1 _PERP.Bits.PERP1
#define PERP_PERP2 _PERP.Bits.PERP2
#define PERP_PERP3 _PERP.Bits.PERP3
#define PERP_PERP4 _PERP.Bits.PERP4
#define PERP_PERP5 _PERP.Bits.PERP5
#define PERP_PERP6 _PERP.Bits.PERP6
#define PERP_PERP7 _PERP.Bits.PERP7
#define PERP_PERP0_MASK 0x01U
#define PERP_PERP1_MASK 0x02U
#define PERP_PERP2_MASK 0x04U
#define PERP_PERP3_MASK 0x08U
#define PERP_PERP4_MASK 0x10U
#define PERP_PERP5_MASK 0x20U
#define PERP_PERP6_MASK 0x40U
#define PERP_PERP7_MASK 0x80U
/*** PPSP - Port P Polarity Select Register; 0x0000025D ***/
typedef union {
byte Byte;
struct {
byte PPSP0 :1; /* Port P pull device select bit 0 */
byte PPSP1 :1; /* Port P pull device select bit 1 */
byte PPSP2 :1; /* Port P pull device select bit 2 */
byte PPSP3 :1; /* Port P pull device select bit 3 */
byte PPSP4 :1; /* Port P pull device select bit 4 */
byte PPSP5 :1; /* Port P pull device select bit 5 */
byte PPSP6 :1; /* Port P pull device select bit 6 */
byte PPSP7 :1; /* Port P pull device select bit 7 */
} Bits;
} PPSPSTR;
extern volatile PPSPSTR _PPSP @(REG_BASE + 0x0000025DUL);
#define PPSP _PPSP.Byte
#define PPSP_PPSP0 _PPSP.Bits.PPSP0
#define PPSP_PPSP1 _PPSP.Bits.PPSP1
#define PPSP_PPSP2 _PPSP.Bits.PPSP2
#define PPSP_PPSP3 _PPSP.Bits.PPSP3
#define PPSP_PPSP4 _PPSP.Bits.PPSP4
#define PPSP_PPSP5 _PPSP.Bits.PPSP5
#define PPSP_PPSP6 _PPSP.Bits.PPSP6
#define PPSP_PPSP7 _PPSP.Bits.PPSP7
#define PPSP_PPSP0_MASK 0x01U
#define PPSP_PPSP1_MASK 0x02U
#define PPSP_PPSP2_MASK 0x04U
#define PPSP_PPSP3_MASK 0x08U
#define PPSP_PPSP4_MASK 0x10U
#define PPSP_PPSP5_MASK 0x20U
#define PPSP_PPSP6_MASK 0x40U
#define PPSP_PPSP7_MASK 0x80U
/*** PIEP - Port P Interrupt Enable Register; 0x0000025E ***/
typedef union {
byte Byte;
struct {
byte PIEP0 :1; /* Port P interrupt enable bit 0 */
byte PIEP1 :1; /* Port P interrupt enable bit 1 */
byte PIEP2 :1; /* Port P interrupt enable bit 2 */
byte PIEP3 :1; /* Port P interrupt enable bit 3 */
byte PIEP4 :1; /* Port P interrupt enable bit 4 */
byte PIEP5 :1; /* Port P interrupt enable bit 5 */
byte PIEP6 :1; /* Port P interrupt enable bit 6 */
byte PIEP7 :1; /* Port P interrupt enable bit 7 */
} Bits;
} PIEPSTR;
extern volatile PIEPSTR _PIEP @(REG_BASE + 0x0000025EUL);
#define PIEP _PIEP.Byte
#define PIEP_PIEP0 _PIEP.Bits.PIEP0
#define PIEP_PIEP1 _PIEP.Bits.PIEP1
#define PIEP_PIEP2 _PIEP.Bits.PIEP2
#define PIEP_PIEP3 _PIEP.Bits.PIEP3
#define PIEP_PIEP4 _PIEP.Bits.PIEP4
#define PIEP_PIEP5 _PIEP.Bits.PIEP5
#define PIEP_PIEP6 _PIEP.Bits.PIEP6
#define PIEP_PIEP7 _PIEP.Bits.PIEP7
#define PIEP_PIEP0_MASK 0x01U
#define PIEP_PIEP1_MASK 0x02U
#define PIEP_PIEP2_MASK 0x04U
#define PIEP_PIEP3_MASK 0x08U
#define PIEP_PIEP4_MASK 0x10U
#define PIEP_PIEP5_MASK 0x20U
#define PIEP_PIEP6_MASK 0x40U
#define PIEP_PIEP7_MASK 0x80U
/*** PIFP - Port P Interrupt Flag Register; 0x0000025F ***/
typedef union {
byte Byte;
struct {
byte PIFP0 :1; /* Port P interrupt flag bit 0 */
byte PIFP1 :1; /* Port P interrupt flag bit 1 */
byte PIFP2 :1; /* Port P interrupt flag bit 2 */
byte PIFP3 :1; /* Port P interrupt flag bit 3 */
byte PIFP4 :1; /* Port P interrupt flag bit 4 */
byte PIFP5 :1; /* Port P interrupt flag bit 5 */
byte PIFP6 :1; /* Port P interrupt flag bit 6 */
byte PIFP7 :1; /* Port P interrupt flag bit 7 */
} Bits;
} PIFPSTR;
extern volatile PIFPSTR _PIFP @(REG_BASE + 0x0000025FUL);
#define PIFP _PIFP.Byte
#define PIFP_PIFP0 _PIFP.Bits.PIFP0
#define PIFP_PIFP1 _PIFP.Bits.PIFP1
#define PIFP_PIFP2 _PIFP.Bits.PIFP2
#define PIFP_PIFP3 _PIFP.Bits.PIFP3
#define PIFP_PIFP4 _PIFP.Bits.PIFP4
#define PIFP_PIFP5 _PIFP.Bits.PIFP5
#define PIFP_PIFP6 _PIFP.Bits.PIFP6
#define PIFP_PIFP7 _PIFP.Bits.PIFP7
#define PIFP_PIFP0_MASK 0x01U
#define PIFP_PIFP1_MASK 0x02U
#define PIFP_PIFP2_MASK 0x04U
#define PIFP_PIFP3_MASK 0x08U
#define PIFP_PIFP4_MASK 0x10U
#define PIFP_PIFP5_MASK 0x20U
#define PIFP_PIFP6_MASK 0x40U
#define PIFP_PIFP7_MASK 0x80U
/*** PTJ - Port J Data Register; 0x00000268 ***/
typedef union {
byte Byte;
struct {
byte PTJ0 :1; /* Port J general purpose input/output data bit 0 */
byte PTJ1 :1; /* Port J general purpose input/output data bit 1 */
byte PTJ2 :1; /* Port J general purpose input/output data bit 2 */
byte PTJ3 :1; /* Port J general purpose input/output data bit 3 */
byte PTJ4 :1; /* Port J general purpose input/output data bit 4 */
byte PTJ5 :1; /* Port J general purpose input/output data bit 5 */
byte PTJ6 :1; /* Port J general purpose input/output data bit 6 */
byte PTJ7 :1; /* Port J general purpose input/output data bit 7 */
} Bits;
} PTJSTR;
extern volatile PTJSTR _PTJ @(REG_BASE + 0x00000268UL);
#define PTJ _PTJ.Byte
#define PTJ_PTJ0 _PTJ.Bits.PTJ0
#define PTJ_PTJ1 _PTJ.Bits.PTJ1
#define PTJ_PTJ2 _PTJ.Bits.PTJ2
#define PTJ_PTJ3 _PTJ.Bits.PTJ3
#define PTJ_PTJ4 _PTJ.Bits.PTJ4
#define PTJ_PTJ5 _PTJ.Bits.PTJ5
#define PTJ_PTJ6 _PTJ.Bits.PTJ6
#define PTJ_PTJ7 _PTJ.Bits.PTJ7
#define PTJ_PTJ0_MASK 0x01U
#define PTJ_PTJ1_MASK 0x02U
#define PTJ_PTJ2_MASK 0x04U
#define PTJ_PTJ3_MASK 0x08U
#define PTJ_PTJ4_MASK 0x10U
#define PTJ_PTJ5_MASK 0x20U
#define PTJ_PTJ6_MASK 0x40U
#define PTJ_PTJ7_MASK 0x80U
/*** PTIJ - Port J Input Register; 0x00000269 ***/
typedef union {
byte Byte;
struct {
byte PTIJ0 :1; /* Port J input data bit 0 */
byte PTIJ1 :1; /* Port J input data bit 1 */
byte PTIJ2 :1; /* Port J input data bit 2 */
byte PTIJ3 :1; /* Port J input data bit 3 */
byte PTIJ4 :1; /* Port J input data bit 4 */
byte PTIJ5 :1; /* Port J input data bit 5 */
byte PTIJ6 :1; /* Port J input data bit 6 */
byte PTIJ7 :1; /* Port J input data bit 7 */
} Bits;
} PTIJSTR;
extern volatile PTIJSTR _PTIJ @(REG_BASE + 0x00000269UL);
#define PTIJ _PTIJ.Byte
#define PTIJ_PTIJ0 _PTIJ.Bits.PTIJ0
#define PTIJ_PTIJ1 _PTIJ.Bits.PTIJ1
#define PTIJ_PTIJ2 _PTIJ.Bits.PTIJ2
#define PTIJ_PTIJ3 _PTIJ.Bits.PTIJ3
#define PTIJ_PTIJ4 _PTIJ.Bits.PTIJ4
#define PTIJ_PTIJ5 _PTIJ.Bits.PTIJ5
#define PTIJ_PTIJ6 _PTIJ.Bits.PTIJ6
#define PTIJ_PTIJ7 _PTIJ.Bits.PTIJ7
#define PTIJ_PTIJ0_MASK 0x01U
#define PTIJ_PTIJ1_MASK 0x02U
#define PTIJ_PTIJ2_MASK 0x04U
#define PTIJ_PTIJ3_MASK 0x08U
#define PTIJ_PTIJ4_MASK 0x10U
#define PTIJ_PTIJ5_MASK 0x20U
#define PTIJ_PTIJ6_MASK 0x40U
#define PTIJ_PTIJ7_MASK 0x80U
/*** DDRJ - Port J Data Direction Register; 0x0000026A ***/
typedef union {
byte Byte;
struct {
byte DDRJ0 :1; /* Port J data direction bit 0 */
byte DDRJ1 :1; /* Port J data direction bit 1 */
byte DDRJ2 :1; /* Port J data direction bit 2 */
byte DDRJ3 :1; /* Port J data direction bit 3 */
byte DDRJ4 :1; /* Port J data direction bit 4 */
byte DDRJ5 :1; /* Port J data direction bit 5 */
byte DDRJ6 :1; /* Port J data direction bit 6 */
byte DDRJ7 :1; /* Port J data direction bit 7 */
} Bits;
} DDRJSTR;
extern volatile DDRJSTR _DDRJ @(REG_BASE + 0x0000026AUL);
#define DDRJ _DDRJ.Byte
#define DDRJ_DDRJ0 _DDRJ.Bits.DDRJ0
#define DDRJ_DDRJ1 _DDRJ.Bits.DDRJ1
#define DDRJ_DDRJ2 _DDRJ.Bits.DDRJ2
#define DDRJ_DDRJ3 _DDRJ.Bits.DDRJ3
#define DDRJ_DDRJ4 _DDRJ.Bits.DDRJ4
#define DDRJ_DDRJ5 _DDRJ.Bits.DDRJ5
#define DDRJ_DDRJ6 _DDRJ.Bits.DDRJ6
#define DDRJ_DDRJ7 _DDRJ.Bits.DDRJ7
#define DDRJ_DDRJ0_MASK 0x01U
#define DDRJ_DDRJ1_MASK 0x02U
#define DDRJ_DDRJ2_MASK 0x04U
#define DDRJ_DDRJ3_MASK 0x08U
#define DDRJ_DDRJ4_MASK 0x10U
#define DDRJ_DDRJ5_MASK 0x20U
#define DDRJ_DDRJ6_MASK 0x40U
#define DDRJ_DDRJ7_MASK 0x80U
/*** PERJ - Port J Pull Device Enable Register; 0x0000026C ***/
typedef union {
byte Byte;
struct {
byte PERJ0 :1; /* Port J pull device enable bit 0 */
byte PERJ1 :1; /* Port J pull device enable bit 1 */
byte PERJ2 :1; /* Port J pull device enable bit 2 */
byte PERJ3 :1; /* Port J pull device enable bit 3 */
byte PERJ4 :1; /* Port J pull device enable bit 4 */
byte PERJ5 :1; /* Port J pull device enable bit 5 */
byte PERJ6 :1; /* Port J pull device enable bit 6 */
byte PERJ7 :1; /* Port J pull device enable bit 7 */
} Bits;
} PERJSTR;
extern volatile PERJSTR _PERJ @(REG_BASE + 0x0000026CUL);
#define PERJ _PERJ.Byte
#define PERJ_PERJ0 _PERJ.Bits.PERJ0
#define PERJ_PERJ1 _PERJ.Bits.PERJ1
#define PERJ_PERJ2 _PERJ.Bits.PERJ2
#define PERJ_PERJ3 _PERJ.Bits.PERJ3
#define PERJ_PERJ4 _PERJ.Bits.PERJ4
#define PERJ_PERJ5 _PERJ.Bits.PERJ5
#define PERJ_PERJ6 _PERJ.Bits.PERJ6
#define PERJ_PERJ7 _PERJ.Bits.PERJ7
#define PERJ_PERJ0_MASK 0x01U
#define PERJ_PERJ1_MASK 0x02U
#define PERJ_PERJ2_MASK 0x04U
#define PERJ_PERJ3_MASK 0x08U
#define PERJ_PERJ4_MASK 0x10U
#define PERJ_PERJ5_MASK 0x20U
#define PERJ_PERJ6_MASK 0x40U
#define PERJ_PERJ7_MASK 0x80U
/*** PPSJ - Port J Polarity Select Register; 0x0000026D ***/
typedef union {
byte Byte;
struct {
byte PPSJ0 :1; /* Port J pull device select bit 0 */
byte PPSJ1 :1; /* Port J pull device select bit 1 */
byte PPSJ2 :1; /* Port J pull device select bit 2 */
byte PPSJ3 :1; /* Port J pull device select bit 3 */
byte PPSJ4 :1; /* Port J pull device select bit 4 */
byte PPSJ5 :1; /* Port J pull device select bit 5 */
byte PPSJ6 :1; /* Port J pull device select bit 6 */
byte PPSJ7 :1; /* Port J pull device select bit 7 */
} Bits;
} PPSJSTR;
extern volatile PPSJSTR _PPSJ @(REG_BASE + 0x0000026DUL);
#define PPSJ _PPSJ.Byte
#define PPSJ_PPSJ0 _PPSJ.Bits.PPSJ0
#define PPSJ_PPSJ1 _PPSJ.Bits.PPSJ1
#define PPSJ_PPSJ2 _PPSJ.Bits.PPSJ2
#define PPSJ_PPSJ3 _PPSJ.Bits.PPSJ3
#define PPSJ_PPSJ4 _PPSJ.Bits.PPSJ4
#define PPSJ_PPSJ5 _PPSJ.Bits.PPSJ5
#define PPSJ_PPSJ6 _PPSJ.Bits.PPSJ6
#define PPSJ_PPSJ7 _PPSJ.Bits.PPSJ7
#define PPSJ_PPSJ0_MASK 0x01U
#define PPSJ_PPSJ1_MASK 0x02U
#define PPSJ_PPSJ2_MASK 0x04U
#define PPSJ_PPSJ3_MASK 0x08U
#define PPSJ_PPSJ4_MASK 0x10U
#define PPSJ_PPSJ5_MASK 0x20U
#define PPSJ_PPSJ6_MASK 0x40U
#define PPSJ_PPSJ7_MASK 0x80U
/*** PIEJ - Port J Interrupt Enable Register; 0x0000026E ***/
typedef union {
byte Byte;
struct {
byte PIEJ0 :1; /* Port J interrupt enable bit 0 */
byte PIEJ1 :1; /* Port J interrupt enable bit 1 */
byte PIEJ2 :1; /* Port J interrupt enable bit 2 */
byte PIEJ3 :1; /* Port J interrupt enable bit 3 */
byte PIEJ4 :1; /* Port J interrupt enable bit 4 */
byte PIEJ5 :1; /* Port J interrupt enable bit 5 */
byte PIEJ6 :1; /* Port J interrupt enable bit 6 */
byte PIEJ7 :1; /* Port J interrupt enable bit 7 */
} Bits;
} PIEJSTR;
extern volatile PIEJSTR _PIEJ @(REG_BASE + 0x0000026EUL);
#define PIEJ _PIEJ.Byte
#define PIEJ_PIEJ0 _PIEJ.Bits.PIEJ0
#define PIEJ_PIEJ1 _PIEJ.Bits.PIEJ1
#define PIEJ_PIEJ2 _PIEJ.Bits.PIEJ2
#define PIEJ_PIEJ3 _PIEJ.Bits.PIEJ3
#define PIEJ_PIEJ4 _PIEJ.Bits.PIEJ4
#define PIEJ_PIEJ5 _PIEJ.Bits.PIEJ5
#define PIEJ_PIEJ6 _PIEJ.Bits.PIEJ6
#define PIEJ_PIEJ7 _PIEJ.Bits.PIEJ7
#define PIEJ_PIEJ0_MASK 0x01U
#define PIEJ_PIEJ1_MASK 0x02U
#define PIEJ_PIEJ2_MASK 0x04U
#define PIEJ_PIEJ3_MASK 0x08U
#define PIEJ_PIEJ4_MASK 0x10U
#define PIEJ_PIEJ5_MASK 0x20U
#define PIEJ_PIEJ6_MASK 0x40U
#define PIEJ_PIEJ7_MASK 0x80U
/*** PIFJ - Port J Interrupt Flag Register; 0x0000026F ***/
typedef union {
byte Byte;
struct {
byte PIFJ0 :1; /* Port J interrupt flag bit 0 */
byte PIFJ1 :1; /* Port J interrupt flag bit 1 */
byte PIFJ2 :1; /* Port J interrupt flag bit 2 */
byte PIFJ3 :1; /* Port J interrupt flag bit 3 */
byte PIFJ4 :1; /* Port J interrupt flag bit 4 */
byte PIFJ5 :1; /* Port J interrupt flag bit 5 */
byte PIFJ6 :1; /* Port J interrupt flag bit 6 */
byte PIFJ7 :1; /* Port J interrupt flag bit 7 */
} Bits;
} PIFJSTR;
extern volatile PIFJSTR _PIFJ @(REG_BASE + 0x0000026FUL);
#define PIFJ _PIFJ.Byte
#define PIFJ_PIFJ0 _PIFJ.Bits.PIFJ0
#define PIFJ_PIFJ1 _PIFJ.Bits.PIFJ1
#define PIFJ_PIFJ2 _PIFJ.Bits.PIFJ2
#define PIFJ_PIFJ3 _PIFJ.Bits.PIFJ3
#define PIFJ_PIFJ4 _PIFJ.Bits.PIFJ4
#define PIFJ_PIFJ5 _PIFJ.Bits.PIFJ5
#define PIFJ_PIFJ6 _PIFJ.Bits.PIFJ6
#define PIFJ_PIFJ7 _PIFJ.Bits.PIFJ7
#define PIFJ_PIFJ0_MASK 0x01U
#define PIFJ_PIFJ1_MASK 0x02U
#define PIFJ_PIFJ2_MASK 0x04U
#define PIFJ_PIFJ3_MASK 0x08U
#define PIFJ_PIFJ4_MASK 0x10U
#define PIFJ_PIFJ5_MASK 0x20U
#define PIFJ_PIFJ6_MASK 0x40U
#define PIFJ_PIFJ7_MASK 0x80U
/*** PT01AD - Port AD Data Register; 0x00000270 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PT0AD - Port ADH Data Register; 0x00000270 ***/
union {
byte Byte;
struct {
byte PT0AD0 :1; /* Port AD data bit 0 */
byte PT0AD1 :1; /* Port AD data bit 1 */
byte PT0AD2 :1; /* Port AD data bit 2 */
byte PT0AD3 :1; /* Port AD data bit 3 */
byte PT0AD4 :1; /* Port AD data bit 4 */
byte PT0AD5 :1; /* Port AD data bit 5 */
byte PT0AD6 :1; /* Port AD data bit 6 */
byte PT0AD7 :1; /* Port AD data bit 7 */
} Bits;
} PT0ADSTR;
#define PT0AD _PT01AD.Overlap_STR.PT0ADSTR.Byte
#define PT0AD_PT0AD0 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD0
#define PT0AD_PT0AD1 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD1
#define PT0AD_PT0AD2 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD2
#define PT0AD_PT0AD3 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD3
#define PT0AD_PT0AD4 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD4
#define PT0AD_PT0AD5 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD5
#define PT0AD_PT0AD6 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD6
#define PT0AD_PT0AD7 _PT01AD.Overlap_STR.PT0ADSTR.Bits.PT0AD7
#define PT0AD_PT0AD0_MASK 0x01U
#define PT0AD_PT0AD1_MASK 0x02U
#define PT0AD_PT0AD2_MASK 0x04U
#define PT0AD_PT0AD3_MASK 0x08U
#define PT0AD_PT0AD4_MASK 0x10U
#define PT0AD_PT0AD5_MASK 0x20U
#define PT0AD_PT0AD6_MASK 0x40U
#define PT0AD_PT0AD7_MASK 0x80U
/*** PT1AD - Port ADL Data Register; 0x00000271 ***/
union {
byte Byte;
struct {
byte PT1AD0 :1; /* Port AD data bit 0 */
byte PT1AD1 :1; /* Port AD data bit 1 */
byte PT1AD2 :1; /* Port AD data bit 2 */
byte PT1AD3 :1; /* Port AD data bit 3 */
byte PT1AD4 :1; /* Port AD data bit 4 */
byte PT1AD5 :1; /* Port AD data bit 5 */
byte PT1AD6 :1; /* Port AD data bit 6 */
byte PT1AD7 :1; /* Port AD data bit 7 */
} Bits;
} PT1ADSTR;
#define PT1AD _PT01AD.Overlap_STR.PT1ADSTR.Byte
#define PT1AD_PT1AD0 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD0
#define PT1AD_PT1AD1 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD1
#define PT1AD_PT1AD2 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD2
#define PT1AD_PT1AD3 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD3
#define PT1AD_PT1AD4 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD4
#define PT1AD_PT1AD5 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD5
#define PT1AD_PT1AD6 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD6
#define PT1AD_PT1AD7 _PT01AD.Overlap_STR.PT1ADSTR.Bits.PT1AD7
#define PT1AD_PT1AD0_MASK 0x01U
#define PT1AD_PT1AD1_MASK 0x02U
#define PT1AD_PT1AD2_MASK 0x04U
#define PT1AD_PT1AD3_MASK 0x08U
#define PT1AD_PT1AD4_MASK 0x10U
#define PT1AD_PT1AD5_MASK 0x20U
#define PT1AD_PT1AD6_MASK 0x40U
#define PT1AD_PT1AD7_MASK 0x80U
} Overlap_STR;
struct {
word PT1AD0 :1; /* Port AD data bit 0 */
word PT1AD1 :1; /* Port AD data bit 1 */
word PT1AD2 :1; /* Port AD data bit 2 */
word PT1AD3 :1; /* Port AD data bit 3 */
word PT1AD4 :1; /* Port AD data bit 4 */
word PT1AD5 :1; /* Port AD data bit 5 */
word PT1AD6 :1; /* Port AD data bit 6 */
word PT1AD7 :1; /* Port AD data bit 7 */
word PT0AD0 :1; /* Port AD data bit 8 */
word PT0AD1 :1; /* Port AD data bit 9 */
word PT0AD2 :1; /* Port AD data bit 10 */
word PT0AD3 :1; /* Port AD data bit 11 */
word PT0AD4 :1; /* Port AD data bit 12 */
word PT0AD5 :1; /* Port AD data bit 13 */
word PT0AD6 :1; /* Port AD data bit 14 */
word PT0AD7 :1; /* Port AD data bit 15 */
} Bits;
struct {
word grpPT1AD :8;
word grpPT0AD :8;
} MergedBits;
} PT01ADSTR;
extern volatile PT01ADSTR _PT01AD @(REG_BASE + 0x00000270UL);
#define PT01AD _PT01AD.Word
#define PT01AD_PT1AD0 _PT01AD.Bits.PT1AD0
#define PT01AD_PT1AD1 _PT01AD.Bits.PT1AD1
#define PT01AD_PT1AD2 _PT01AD.Bits.PT1AD2
#define PT01AD_PT1AD3 _PT01AD.Bits.PT1AD3
#define PT01AD_PT1AD4 _PT01AD.Bits.PT1AD4
#define PT01AD_PT1AD5 _PT01AD.Bits.PT1AD5
#define PT01AD_PT1AD6 _PT01AD.Bits.PT1AD6
#define PT01AD_PT1AD7 _PT01AD.Bits.PT1AD7
#define PT01AD_PT0AD0 _PT01AD.Bits.PT0AD0
#define PT01AD_PT0AD1 _PT01AD.Bits.PT0AD1
#define PT01AD_PT0AD2 _PT01AD.Bits.PT0AD2
#define PT01AD_PT0AD3 _PT01AD.Bits.PT0AD3
#define PT01AD_PT0AD4 _PT01AD.Bits.PT0AD4
#define PT01AD_PT0AD5 _PT01AD.Bits.PT0AD5
#define PT01AD_PT0AD6 _PT01AD.Bits.PT0AD6
#define PT01AD_PT0AD7 _PT01AD.Bits.PT0AD7
#define PT01AD_PT1AD _PT01AD.MergedBits.grpPT1AD
#define PT01AD_PT0AD _PT01AD.MergedBits.grpPT0AD
#define PT01AD_PT1AD0_MASK 0x01U
#define PT01AD_PT1AD1_MASK 0x02U
#define PT01AD_PT1AD2_MASK 0x04U
#define PT01AD_PT1AD3_MASK 0x08U
#define PT01AD_PT1AD4_MASK 0x10U
#define PT01AD_PT1AD5_MASK 0x20U
#define PT01AD_PT1AD6_MASK 0x40U
#define PT01AD_PT1AD7_MASK 0x80U
#define PT01AD_PT0AD0_MASK 0x0100U
#define PT01AD_PT0AD1_MASK 0x0200U
#define PT01AD_PT0AD2_MASK 0x0400U
#define PT01AD_PT0AD3_MASK 0x0800U
#define PT01AD_PT0AD4_MASK 0x1000U
#define PT01AD_PT0AD5_MASK 0x2000U
#define PT01AD_PT0AD6_MASK 0x4000U
#define PT01AD_PT0AD7_MASK 0x8000U
#define PT01AD_PT1AD_MASK 0xFFU
#define PT01AD_PT1AD_BITNUM 0x00U
#define PT01AD_PT0AD_MASK 0xFF00U
#define PT01AD_PT0AD_BITNUM 0x08U
/*** PTI01AD - Port AD Input Register; 0x00000272 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PTI0AD - Port ADH Input Register; 0x00000272 ***/
union {
byte Byte;
struct {
byte PTI0AD0 :1; /* Port ADH Bit 0 */
byte PTI0AD1 :1; /* Port ADH Bit 1 */
byte PTI0AD2 :1; /* Port ADH Bit 2 */
byte PTI0AD3 :1; /* Port ADH Bit 3 */
byte PTI0AD4 :1; /* Port ADH Bit 4 */
byte PTI0AD5 :1; /* Port ADH Bit 5 */
byte PTI0AD6 :1; /* Port ADH Bit 6 */
byte PTI0AD7 :1; /* Port ADH Bit 7 */
} Bits;
} PTI0ADSTR;
#define PTI0AD _PTI01AD.Overlap_STR.PTI0ADSTR.Byte
#define PTI0AD_PTI0AD0 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD0
#define PTI0AD_PTI0AD1 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD1
#define PTI0AD_PTI0AD2 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD2
#define PTI0AD_PTI0AD3 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD3
#define PTI0AD_PTI0AD4 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD4
#define PTI0AD_PTI0AD5 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD5
#define PTI0AD_PTI0AD6 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD6
#define PTI0AD_PTI0AD7 _PTI01AD.Overlap_STR.PTI0ADSTR.Bits.PTI0AD7
#define PTI0AD_PTI0AD0_MASK 0x01U
#define PTI0AD_PTI0AD1_MASK 0x02U
#define PTI0AD_PTI0AD2_MASK 0x04U
#define PTI0AD_PTI0AD3_MASK 0x08U
#define PTI0AD_PTI0AD4_MASK 0x10U
#define PTI0AD_PTI0AD5_MASK 0x20U
#define PTI0AD_PTI0AD6_MASK 0x40U
#define PTI0AD_PTI0AD7_MASK 0x80U
/*** PTI1AD - Port ADL Input Register; 0x00000273 ***/
union {
byte Byte;
struct {
byte PTI1AD0 :1; /* Port ADL Bit 0 */
byte PTI1AD1 :1; /* Port ADL Bit 1 */
byte PTI1AD2 :1; /* Port ADL Bit 2 */
byte PTI1AD3 :1; /* Port ADL Bit 3 */
byte PTI1AD4 :1; /* Port ADL Bit 4 */
byte PTI1AD5 :1; /* Port ADL Bit 5 */
byte PTI1AD6 :1; /* Port ADL Bit 6 */
byte PTI1AD7 :1; /* Port ADL Bit 7 */
} Bits;
} PTI1ADSTR;
#define PTI1AD _PTI01AD.Overlap_STR.PTI1ADSTR.Byte
#define PTI1AD_PTI1AD0 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD0
#define PTI1AD_PTI1AD1 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD1
#define PTI1AD_PTI1AD2 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD2
#define PTI1AD_PTI1AD3 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD3
#define PTI1AD_PTI1AD4 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD4
#define PTI1AD_PTI1AD5 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD5
#define PTI1AD_PTI1AD6 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD6
#define PTI1AD_PTI1AD7 _PTI01AD.Overlap_STR.PTI1ADSTR.Bits.PTI1AD7
#define PTI1AD_PTI1AD0_MASK 0x01U
#define PTI1AD_PTI1AD1_MASK 0x02U
#define PTI1AD_PTI1AD2_MASK 0x04U
#define PTI1AD_PTI1AD3_MASK 0x08U
#define PTI1AD_PTI1AD4_MASK 0x10U
#define PTI1AD_PTI1AD5_MASK 0x20U
#define PTI1AD_PTI1AD6_MASK 0x40U
#define PTI1AD_PTI1AD7_MASK 0x80U
} Overlap_STR;
struct {
word PTI1AD0 :1; /* Port AD Bit 0 */
word PTI1AD1 :1; /* Port AD Bit 1 */
word PTI1AD2 :1; /* Port AD Bit 2 */
word PTI1AD3 :1; /* Port AD Bit 3 */
word PTI1AD4 :1; /* Port AD Bit 4 */
word PTI1AD5 :1; /* Port AD Bit 5 */
word PTI1AD6 :1; /* Port AD Bit 6 */
word PTI1AD7 :1; /* Port AD Bit 7 */
word PTI0AD0 :1; /* Port AD Bit 0 */
word PTI0AD1 :1; /* Port AD Bit 1 */
word PTI0AD2 :1; /* Port AD Bit 2 */
word PTI0AD3 :1; /* Port AD Bit 3 */
word PTI0AD4 :1; /* Port AD Bit 4 */
word PTI0AD5 :1; /* Port AD Bit 5 */
word PTI0AD6 :1; /* Port AD Bit 6 */
word PTI0AD7 :1; /* Port AD Bit 7 */
} Bits;
struct {
word grpPTI1AD :8;
word grpPTI0AD :8;
} MergedBits;
} PTI01ADSTR;
extern volatile PTI01ADSTR _PTI01AD @(REG_BASE + 0x00000272UL);
#define PTI01AD _PTI01AD.Word
#define PTI01AD_PTI1AD0 _PTI01AD.Bits.PTI1AD0
#define PTI01AD_PTI1AD1 _PTI01AD.Bits.PTI1AD1
#define PTI01AD_PTI1AD2 _PTI01AD.Bits.PTI1AD2
#define PTI01AD_PTI1AD3 _PTI01AD.Bits.PTI1AD3
#define PTI01AD_PTI1AD4 _PTI01AD.Bits.PTI1AD4
#define PTI01AD_PTI1AD5 _PTI01AD.Bits.PTI1AD5
#define PTI01AD_PTI1AD6 _PTI01AD.Bits.PTI1AD6
#define PTI01AD_PTI1AD7 _PTI01AD.Bits.PTI1AD7
#define PTI01AD_PTI0AD0 _PTI01AD.Bits.PTI0AD0
#define PTI01AD_PTI0AD1 _PTI01AD.Bits.PTI0AD1
#define PTI01AD_PTI0AD2 _PTI01AD.Bits.PTI0AD2
#define PTI01AD_PTI0AD3 _PTI01AD.Bits.PTI0AD3
#define PTI01AD_PTI0AD4 _PTI01AD.Bits.PTI0AD4
#define PTI01AD_PTI0AD5 _PTI01AD.Bits.PTI0AD5
#define PTI01AD_PTI0AD6 _PTI01AD.Bits.PTI0AD6
#define PTI01AD_PTI0AD7 _PTI01AD.Bits.PTI0AD7
#define PTI01AD_PTI1AD _PTI01AD.MergedBits.grpPTI1AD
#define PTI01AD_PTI0AD _PTI01AD.MergedBits.grpPTI0AD
#define PTI01AD_PTI1AD0_MASK 0x01U
#define PTI01AD_PTI1AD1_MASK 0x02U
#define PTI01AD_PTI1AD2_MASK 0x04U
#define PTI01AD_PTI1AD3_MASK 0x08U
#define PTI01AD_PTI1AD4_MASK 0x10U
#define PTI01AD_PTI1AD5_MASK 0x20U
#define PTI01AD_PTI1AD6_MASK 0x40U
#define PTI01AD_PTI1AD7_MASK 0x80U
#define PTI01AD_PTI0AD0_MASK 0x0100U
#define PTI01AD_PTI0AD1_MASK 0x0200U
#define PTI01AD_PTI0AD2_MASK 0x0400U
#define PTI01AD_PTI0AD3_MASK 0x0800U
#define PTI01AD_PTI0AD4_MASK 0x1000U
#define PTI01AD_PTI0AD5_MASK 0x2000U
#define PTI01AD_PTI0AD6_MASK 0x4000U
#define PTI01AD_PTI0AD7_MASK 0x8000U
#define PTI01AD_PTI1AD_MASK 0xFFU
#define PTI01AD_PTI1AD_BITNUM 0x00U
#define PTI01AD_PTI0AD_MASK 0xFF00U
#define PTI01AD_PTI0AD_BITNUM 0x08U
/*** DDR01AD - Port AD Data Direction Register; 0x00000274 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** DDR0AD - Port ADH Data Direction Register; 0x00000274 ***/
union {
byte Byte;
struct {
byte DDR0AD0 :1; /* Port AD data direction bit 0 */
byte DDR0AD1 :1; /* Port AD data direction bit 1 */
byte DDR0AD2 :1; /* Port AD data direction bit 2 */
byte DDR0AD3 :1; /* Port AD data direction bit 3 */
byte DDR0AD4 :1; /* Port AD data direction bit 4 */
byte DDR0AD5 :1; /* Port AD data direction bit 5 */
byte DDR0AD6 :1; /* Port AD data direction bit 6 */
byte DDR0AD7 :1; /* Port AD data direction bit 7 */
} Bits;
} DDR0ADSTR;
#define DDR0AD _DDR01AD.Overlap_STR.DDR0ADSTR.Byte
#define DDR0AD_DDR0AD0 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD0
#define DDR0AD_DDR0AD1 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD1
#define DDR0AD_DDR0AD2 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD2
#define DDR0AD_DDR0AD3 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD3
#define DDR0AD_DDR0AD4 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD4
#define DDR0AD_DDR0AD5 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD5
#define DDR0AD_DDR0AD6 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD6
#define DDR0AD_DDR0AD7 _DDR01AD.Overlap_STR.DDR0ADSTR.Bits.DDR0AD7
#define DDR0AD_DDR0AD0_MASK 0x01U
#define DDR0AD_DDR0AD1_MASK 0x02U
#define DDR0AD_DDR0AD2_MASK 0x04U
#define DDR0AD_DDR0AD3_MASK 0x08U
#define DDR0AD_DDR0AD4_MASK 0x10U
#define DDR0AD_DDR0AD5_MASK 0x20U
#define DDR0AD_DDR0AD6_MASK 0x40U
#define DDR0AD_DDR0AD7_MASK 0x80U
/*** DDR1AD - Port ADL Data Direction Register; 0x00000275 ***/
union {
byte Byte;
struct {
byte DDR1AD0 :1; /* Port AD data direction bit 0 */
byte DDR1AD1 :1; /* Port AD data direction bit 1 */
byte DDR1AD2 :1; /* Port AD data direction bit 2 */
byte DDR1AD3 :1; /* Port AD data direction bit 3 */
byte DDR1AD4 :1; /* Port AD data direction bit 4 */
byte DDR1AD5 :1; /* Port AD data direction bit 5 */
byte DDR1AD6 :1; /* Port AD data direction bit 6 */
byte DDR1AD7 :1; /* Port AD data direction bit 7 */
} Bits;
} DDR1ADSTR;
#define DDR1AD _DDR01AD.Overlap_STR.DDR1ADSTR.Byte
#define DDR1AD_DDR1AD0 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD0
#define DDR1AD_DDR1AD1 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD1
#define DDR1AD_DDR1AD2 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD2
#define DDR1AD_DDR1AD3 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD3
#define DDR1AD_DDR1AD4 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD4
#define DDR1AD_DDR1AD5 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD5
#define DDR1AD_DDR1AD6 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD6
#define DDR1AD_DDR1AD7 _DDR01AD.Overlap_STR.DDR1ADSTR.Bits.DDR1AD7
#define DDR1AD_DDR1AD0_MASK 0x01U
#define DDR1AD_DDR1AD1_MASK 0x02U
#define DDR1AD_DDR1AD2_MASK 0x04U
#define DDR1AD_DDR1AD3_MASK 0x08U
#define DDR1AD_DDR1AD4_MASK 0x10U
#define DDR1AD_DDR1AD5_MASK 0x20U
#define DDR1AD_DDR1AD6_MASK 0x40U
#define DDR1AD_DDR1AD7_MASK 0x80U
} Overlap_STR;
struct {
word DDR1AD0 :1; /* Port AD data direction bit 0 */
word DDR1AD1 :1; /* Port AD data direction bit 1 */
word DDR1AD2 :1; /* Port AD data direction bit 2 */
word DDR1AD3 :1; /* Port AD data direction bit 3 */
word DDR1AD4 :1; /* Port AD data direction bit 4 */
word DDR1AD5 :1; /* Port AD data direction bit 5 */
word DDR1AD6 :1; /* Port AD data direction bit 6 */
word DDR1AD7 :1; /* Port AD data direction bit 7 */
word DDR0AD0 :1; /* Port AD data direction bit 8 */
word DDR0AD1 :1; /* Port AD data direction bit 9 */
word DDR0AD2 :1; /* Port AD data direction bit 10 */
word DDR0AD3 :1; /* Port AD data direction bit 11 */
word DDR0AD4 :1; /* Port AD data direction bit 12 */
word DDR0AD5 :1; /* Port AD data direction bit 13 */
word DDR0AD6 :1; /* Port AD data direction bit 14 */
word DDR0AD7 :1; /* Port AD data direction bit 15 */
} Bits;
struct {
word grpDDR1AD :8;
word grpDDR0AD :8;
} MergedBits;
} DDR01ADSTR;
extern volatile DDR01ADSTR _DDR01AD @(REG_BASE + 0x00000274UL);
#define DDR01AD _DDR01AD.Word
#define DDR01AD_DDR1AD0 _DDR01AD.Bits.DDR1AD0
#define DDR01AD_DDR1AD1 _DDR01AD.Bits.DDR1AD1
#define DDR01AD_DDR1AD2 _DDR01AD.Bits.DDR1AD2
#define DDR01AD_DDR1AD3 _DDR01AD.Bits.DDR1AD3
#define DDR01AD_DDR1AD4 _DDR01AD.Bits.DDR1AD4
#define DDR01AD_DDR1AD5 _DDR01AD.Bits.DDR1AD5
#define DDR01AD_DDR1AD6 _DDR01AD.Bits.DDR1AD6
#define DDR01AD_DDR1AD7 _DDR01AD.Bits.DDR1AD7
#define DDR01AD_DDR0AD0 _DDR01AD.Bits.DDR0AD0
#define DDR01AD_DDR0AD1 _DDR01AD.Bits.DDR0AD1
#define DDR01AD_DDR0AD2 _DDR01AD.Bits.DDR0AD2
#define DDR01AD_DDR0AD3 _DDR01AD.Bits.DDR0AD3
#define DDR01AD_DDR0AD4 _DDR01AD.Bits.DDR0AD4
#define DDR01AD_DDR0AD5 _DDR01AD.Bits.DDR0AD5
#define DDR01AD_DDR0AD6 _DDR01AD.Bits.DDR0AD6
#define DDR01AD_DDR0AD7 _DDR01AD.Bits.DDR0AD7
#define DDR01AD_DDR1AD _DDR01AD.MergedBits.grpDDR1AD
#define DDR01AD_DDR0AD _DDR01AD.MergedBits.grpDDR0AD
#define DDR01AD_DDR1AD0_MASK 0x01U
#define DDR01AD_DDR1AD1_MASK 0x02U
#define DDR01AD_DDR1AD2_MASK 0x04U
#define DDR01AD_DDR1AD3_MASK 0x08U
#define DDR01AD_DDR1AD4_MASK 0x10U
#define DDR01AD_DDR1AD5_MASK 0x20U
#define DDR01AD_DDR1AD6_MASK 0x40U
#define DDR01AD_DDR1AD7_MASK 0x80U
#define DDR01AD_DDR0AD0_MASK 0x0100U
#define DDR01AD_DDR0AD1_MASK 0x0200U
#define DDR01AD_DDR0AD2_MASK 0x0400U
#define DDR01AD_DDR0AD3_MASK 0x0800U
#define DDR01AD_DDR0AD4_MASK 0x1000U
#define DDR01AD_DDR0AD5_MASK 0x2000U
#define DDR01AD_DDR0AD6_MASK 0x4000U
#define DDR01AD_DDR0AD7_MASK 0x8000U
#define DDR01AD_DDR1AD_MASK 0xFFU
#define DDR01AD_DDR1AD_BITNUM 0x00U
#define DDR01AD_DDR0AD_MASK 0xFF00U
#define DDR01AD_DDR0AD_BITNUM 0x08U
/*** PER01AD - Port AD Pull Up Enable Register; 0x00000278 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PER0AD - Port ADH Pull Up Enable Register; 0x00000278 ***/
union {
byte Byte;
struct {
byte PER0AD0 :1; /* Port ADH pull up enable bit 0 */
byte PER0AD1 :1; /* Port ADH pull up enable bit 1 */
byte PER0AD2 :1; /* Port ADH pull up enable bit 2 */
byte PER0AD3 :1; /* Port ADH pull up enable bit 3 */
byte PER0AD4 :1; /* Port ADH pull up enable bit 4 */
byte PER0AD5 :1; /* Port ADH pull up enable bit 5 */
byte PER0AD6 :1; /* Port ADH pull up enable bit 6 */
byte PER0AD7 :1; /* Port ADH pull up enable bit 7 */
} Bits;
} PER0ADSTR;
#define PER0AD _PER01AD.Overlap_STR.PER0ADSTR.Byte
#define PER0AD_PER0AD0 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD0
#define PER0AD_PER0AD1 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD1
#define PER0AD_PER0AD2 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD2
#define PER0AD_PER0AD3 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD3
#define PER0AD_PER0AD4 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD4
#define PER0AD_PER0AD5 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD5
#define PER0AD_PER0AD6 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD6
#define PER0AD_PER0AD7 _PER01AD.Overlap_STR.PER0ADSTR.Bits.PER0AD7
#define PER0AD_PER0AD0_MASK 0x01U
#define PER0AD_PER0AD1_MASK 0x02U
#define PER0AD_PER0AD2_MASK 0x04U
#define PER0AD_PER0AD3_MASK 0x08U
#define PER0AD_PER0AD4_MASK 0x10U
#define PER0AD_PER0AD5_MASK 0x20U
#define PER0AD_PER0AD6_MASK 0x40U
#define PER0AD_PER0AD7_MASK 0x80U
/*** PER1AD - Port ADL Pull Up Enable Register; 0x00000279 ***/
union {
byte Byte;
struct {
byte PER1AD0 :1; /* Port ADL pull up enable bit 0 */
byte PER1AD1 :1; /* Port ADL pull up enable bit 1 */
byte PER1AD2 :1; /* Port ADL pull up enable bit 2 */
byte PER1AD3 :1; /* Port ADL pull up enable bit 3 */
byte PER1AD4 :1; /* Port ADL pull up enable bit 4 */
byte PER1AD5 :1; /* Port ADL pull up enable bit 5 */
byte PER1AD6 :1; /* Port ADL pull up enable bit 6 */
byte PER1AD7 :1; /* Port ADL pull up enable bit 7 */
} Bits;
} PER1ADSTR;
#define PER1AD _PER01AD.Overlap_STR.PER1ADSTR.Byte
#define PER1AD_PER1AD0 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD0
#define PER1AD_PER1AD1 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD1
#define PER1AD_PER1AD2 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD2
#define PER1AD_PER1AD3 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD3
#define PER1AD_PER1AD4 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD4
#define PER1AD_PER1AD5 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD5
#define PER1AD_PER1AD6 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD6
#define PER1AD_PER1AD7 _PER01AD.Overlap_STR.PER1ADSTR.Bits.PER1AD7
#define PER1AD_PER1AD0_MASK 0x01U
#define PER1AD_PER1AD1_MASK 0x02U
#define PER1AD_PER1AD2_MASK 0x04U
#define PER1AD_PER1AD3_MASK 0x08U
#define PER1AD_PER1AD4_MASK 0x10U
#define PER1AD_PER1AD5_MASK 0x20U
#define PER1AD_PER1AD6_MASK 0x40U
#define PER1AD_PER1AD7_MASK 0x80U
} Overlap_STR;
struct {
word PER1AD0 :1; /* Port AD pull up enable bit 0 */
word PER1AD1 :1; /* Port AD pull up enable bit 1 */
word PER1AD2 :1; /* Port AD pull up enable bit 2 */
word PER1AD3 :1; /* Port AD pull up enable bit 3 */
word PER1AD4 :1; /* Port AD pull up enable bit 4 */
word PER1AD5 :1; /* Port AD pull up enable bit 5 */
word PER1AD6 :1; /* Port AD pull up enable bit 6 */
word PER1AD7 :1; /* Port AD pull up enable bit 7 */
word PER0AD0 :1; /* Port AD pull up enable bit 8 */
word PER0AD1 :1; /* Port AD pull up enable bit 9 */
word PER0AD2 :1; /* Port AD pull up enable bit 10 */
word PER0AD3 :1; /* Port AD pull up enable bit 11 */
word PER0AD4 :1; /* Port AD pull up enable bit 12 */
word PER0AD5 :1; /* Port AD pull up enable bit 13 */
word PER0AD6 :1; /* Port AD pull up enable bit 14 */
word PER0AD7 :1; /* Port AD pull up enable bit 15 */
} Bits;
struct {
word grpPER1AD :8;
word grpPER0AD :8;
} MergedBits;
} PER01ADSTR;
extern volatile PER01ADSTR _PER01AD @(REG_BASE + 0x00000278UL);
#define PER01AD _PER01AD.Word
#define PER01AD_PER1AD0 _PER01AD.Bits.PER1AD0
#define PER01AD_PER1AD1 _PER01AD.Bits.PER1AD1
#define PER01AD_PER1AD2 _PER01AD.Bits.PER1AD2
#define PER01AD_PER1AD3 _PER01AD.Bits.PER1AD3
#define PER01AD_PER1AD4 _PER01AD.Bits.PER1AD4
#define PER01AD_PER1AD5 _PER01AD.Bits.PER1AD5
#define PER01AD_PER1AD6 _PER01AD.Bits.PER1AD6
#define PER01AD_PER1AD7 _PER01AD.Bits.PER1AD7
#define PER01AD_PER0AD0 _PER01AD.Bits.PER0AD0
#define PER01AD_PER0AD1 _PER01AD.Bits.PER0AD1
#define PER01AD_PER0AD2 _PER01AD.Bits.PER0AD2
#define PER01AD_PER0AD3 _PER01AD.Bits.PER0AD3
#define PER01AD_PER0AD4 _PER01AD.Bits.PER0AD4
#define PER01AD_PER0AD5 _PER01AD.Bits.PER0AD5
#define PER01AD_PER0AD6 _PER01AD.Bits.PER0AD6
#define PER01AD_PER0AD7 _PER01AD.Bits.PER0AD7
#define PER01AD_PER1AD _PER01AD.MergedBits.grpPER1AD
#define PER01AD_PER0AD _PER01AD.MergedBits.grpPER0AD
#define PER01AD_PER1AD0_MASK 0x01U
#define PER01AD_PER1AD1_MASK 0x02U
#define PER01AD_PER1AD2_MASK 0x04U
#define PER01AD_PER1AD3_MASK 0x08U
#define PER01AD_PER1AD4_MASK 0x10U
#define PER01AD_PER1AD5_MASK 0x20U
#define PER01AD_PER1AD6_MASK 0x40U
#define PER01AD_PER1AD7_MASK 0x80U
#define PER01AD_PER0AD0_MASK 0x0100U
#define PER01AD_PER0AD1_MASK 0x0200U
#define PER01AD_PER0AD2_MASK 0x0400U
#define PER01AD_PER0AD3_MASK 0x0800U
#define PER01AD_PER0AD4_MASK 0x1000U
#define PER01AD_PER0AD5_MASK 0x2000U
#define PER01AD_PER0AD6_MASK 0x4000U
#define PER01AD_PER0AD7_MASK 0x8000U
#define PER01AD_PER1AD_MASK 0xFFU
#define PER01AD_PER1AD_BITNUM 0x00U
#define PER01AD_PER0AD_MASK 0xFF00U
#define PER01AD_PER0AD_BITNUM 0x08U
/*** PPS01AD - Port AD Polarity Select Register; 0x0000027A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PPS0AD - Port ADH Polarity Select Register; 0x0000027A ***/
union {
byte Byte;
struct {
byte PPS0AD0 :1; /* Port ADH Polarity Select Bit 0 */
byte PPS0AD1 :1; /* Port ADH Polarity Select Bit 1 */
byte PPS0AD2 :1; /* Port ADH Polarity Select Bit 2 */
byte PPS0AD3 :1; /* Port ADH Polarity Select Bit 3 */
byte PPS0AD4 :1; /* Port ADH Polarity Select Bit 4 */
byte PPS0AD5 :1; /* Port ADH Polarity Select Bit 5 */
byte PPS0AD6 :1; /* Port ADH Polarity Select Bit 6 */
byte PPS0AD7 :1; /* Port ADH Polarity Select Bit 7 */
} Bits;
} PPS0ADSTR;
#define PPS0AD _PPS01AD.Overlap_STR.PPS0ADSTR.Byte
#define PPS0AD_PPS0AD0 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD0
#define PPS0AD_PPS0AD1 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD1
#define PPS0AD_PPS0AD2 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD2
#define PPS0AD_PPS0AD3 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD3
#define PPS0AD_PPS0AD4 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD4
#define PPS0AD_PPS0AD5 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD5
#define PPS0AD_PPS0AD6 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD6
#define PPS0AD_PPS0AD7 _PPS01AD.Overlap_STR.PPS0ADSTR.Bits.PPS0AD7
#define PPS0AD_PPS0AD0_MASK 0x01U
#define PPS0AD_PPS0AD1_MASK 0x02U
#define PPS0AD_PPS0AD2_MASK 0x04U
#define PPS0AD_PPS0AD3_MASK 0x08U
#define PPS0AD_PPS0AD4_MASK 0x10U
#define PPS0AD_PPS0AD5_MASK 0x20U
#define PPS0AD_PPS0AD6_MASK 0x40U
#define PPS0AD_PPS0AD7_MASK 0x80U
/*** PPS1AD - Port ADL Polarity Select Register; 0x0000027B ***/
union {
byte Byte;
struct {
byte PPS1AD0 :1; /* Port ADL Polarity Select Bit 0 */
byte PPS1AD1 :1; /* Port ADL Polarity Select Bit 1 */
byte PPS1AD2 :1; /* Port ADL Polarity Select Bit 2 */
byte PPS1AD3 :1; /* Port ADL Polarity Select Bit 3 */
byte PPS1AD4 :1; /* Port ADL Polarity Select Bit 4 */
byte PPS1AD5 :1; /* Port ADL Polarity Select Bit 5 */
byte PPS1AD6 :1; /* Port ADL Polarity Select Bit 6 */
byte PPS1AD7 :1; /* Port ADL Polarity Select Bit 7 */
} Bits;
} PPS1ADSTR;
#define PPS1AD _PPS01AD.Overlap_STR.PPS1ADSTR.Byte
#define PPS1AD_PPS1AD0 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD0
#define PPS1AD_PPS1AD1 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD1
#define PPS1AD_PPS1AD2 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD2
#define PPS1AD_PPS1AD3 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD3
#define PPS1AD_PPS1AD4 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD4
#define PPS1AD_PPS1AD5 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD5
#define PPS1AD_PPS1AD6 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD6
#define PPS1AD_PPS1AD7 _PPS01AD.Overlap_STR.PPS1ADSTR.Bits.PPS1AD7
#define PPS1AD_PPS1AD0_MASK 0x01U
#define PPS1AD_PPS1AD1_MASK 0x02U
#define PPS1AD_PPS1AD2_MASK 0x04U
#define PPS1AD_PPS1AD3_MASK 0x08U
#define PPS1AD_PPS1AD4_MASK 0x10U
#define PPS1AD_PPS1AD5_MASK 0x20U
#define PPS1AD_PPS1AD6_MASK 0x40U
#define PPS1AD_PPS1AD7_MASK 0x80U
} Overlap_STR;
struct {
word PPS1AD0 :1; /* Port AD Polarity Select Bit 0 */
word PPS1AD1 :1; /* Port AD Polarity Select Bit 1 */
word PPS1AD2 :1; /* Port AD Polarity Select Bit 2 */
word PPS1AD3 :1; /* Port AD Polarity Select Bit 3 */
word PPS1AD4 :1; /* Port AD Polarity Select Bit 4 */
word PPS1AD5 :1; /* Port AD Polarity Select Bit 5 */
word PPS1AD6 :1; /* Port AD Polarity Select Bit 6 */
word PPS1AD7 :1; /* Port AD Polarity Select Bit 7 */
word PPS0AD0 :1; /* Port AD Polarity Select Bit 0 */
word PPS0AD1 :1; /* Port AD Polarity Select Bit 1 */
word PPS0AD2 :1; /* Port AD Polarity Select Bit 2 */
word PPS0AD3 :1; /* Port AD Polarity Select Bit 3 */
word PPS0AD4 :1; /* Port AD Polarity Select Bit 4 */
word PPS0AD5 :1; /* Port AD Polarity Select Bit 5 */
word PPS0AD6 :1; /* Port AD Polarity Select Bit 6 */
word PPS0AD7 :1; /* Port AD Polarity Select Bit 7 */
} Bits;
struct {
word grpPPS1AD :8;
word grpPPS0AD :8;
} MergedBits;
} PPS01ADSTR;
extern volatile PPS01ADSTR _PPS01AD @(REG_BASE + 0x0000027AUL);
#define PPS01AD _PPS01AD.Word
#define PPS01AD_PPS1AD0 _PPS01AD.Bits.PPS1AD0
#define PPS01AD_PPS1AD1 _PPS01AD.Bits.PPS1AD1
#define PPS01AD_PPS1AD2 _PPS01AD.Bits.PPS1AD2
#define PPS01AD_PPS1AD3 _PPS01AD.Bits.PPS1AD3
#define PPS01AD_PPS1AD4 _PPS01AD.Bits.PPS1AD4
#define PPS01AD_PPS1AD5 _PPS01AD.Bits.PPS1AD5
#define PPS01AD_PPS1AD6 _PPS01AD.Bits.PPS1AD6
#define PPS01AD_PPS1AD7 _PPS01AD.Bits.PPS1AD7
#define PPS01AD_PPS0AD0 _PPS01AD.Bits.PPS0AD0
#define PPS01AD_PPS0AD1 _PPS01AD.Bits.PPS0AD1
#define PPS01AD_PPS0AD2 _PPS01AD.Bits.PPS0AD2
#define PPS01AD_PPS0AD3 _PPS01AD.Bits.PPS0AD3
#define PPS01AD_PPS0AD4 _PPS01AD.Bits.PPS0AD4
#define PPS01AD_PPS0AD5 _PPS01AD.Bits.PPS0AD5
#define PPS01AD_PPS0AD6 _PPS01AD.Bits.PPS0AD6
#define PPS01AD_PPS0AD7 _PPS01AD.Bits.PPS0AD7
#define PPS01AD_PPS1AD _PPS01AD.MergedBits.grpPPS1AD
#define PPS01AD_PPS0AD _PPS01AD.MergedBits.grpPPS0AD
#define PPS01AD_PPS1AD0_MASK 0x01U
#define PPS01AD_PPS1AD1_MASK 0x02U
#define PPS01AD_PPS1AD2_MASK 0x04U
#define PPS01AD_PPS1AD3_MASK 0x08U
#define PPS01AD_PPS1AD4_MASK 0x10U
#define PPS01AD_PPS1AD5_MASK 0x20U
#define PPS01AD_PPS1AD6_MASK 0x40U
#define PPS01AD_PPS1AD7_MASK 0x80U
#define PPS01AD_PPS0AD0_MASK 0x0100U
#define PPS01AD_PPS0AD1_MASK 0x0200U
#define PPS01AD_PPS0AD2_MASK 0x0400U
#define PPS01AD_PPS0AD3_MASK 0x0800U
#define PPS01AD_PPS0AD4_MASK 0x1000U
#define PPS01AD_PPS0AD5_MASK 0x2000U
#define PPS01AD_PPS0AD6_MASK 0x4000U
#define PPS01AD_PPS0AD7_MASK 0x8000U
#define PPS01AD_PPS1AD_MASK 0xFFU
#define PPS01AD_PPS1AD_BITNUM 0x00U
#define PPS01AD_PPS0AD_MASK 0xFF00U
#define PPS01AD_PPS0AD_BITNUM 0x08U
/*** PIE01AD - Port AD Interrupt Enable Register; 0x0000027C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PIE0AD - Port ADH Interrupt Enable Register; 0x0000027C ***/
union {
byte Byte;
struct {
byte PIE0AD0 :1; /* Port ADH Interrupt Enable Bit 0 */
byte PIE0AD1 :1; /* Port ADH Interrupt Enable Bit 1 */
byte PIE0AD2 :1; /* Port ADH Interrupt Enable Bit 2 */
byte PIE0AD3 :1; /* Port ADH Interrupt Enable Bit 3 */
byte PIE0AD4 :1; /* Port ADH Interrupt Enable Bit 4 */
byte PIE0AD5 :1; /* Port ADH Interrupt Enable Bit 5 */
byte PIE0AD6 :1; /* Port ADH Interrupt Enable Bit 6 */
byte PIE0AD7 :1; /* Port ADH Interrupt Enable Bit 7 */
} Bits;
} PIE0ADSTR;
#define PIE0AD _PIE01AD.Overlap_STR.PIE0ADSTR.Byte
#define PIE0AD_PIE0AD0 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD0
#define PIE0AD_PIE0AD1 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD1
#define PIE0AD_PIE0AD2 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD2
#define PIE0AD_PIE0AD3 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD3
#define PIE0AD_PIE0AD4 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD4
#define PIE0AD_PIE0AD5 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD5
#define PIE0AD_PIE0AD6 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD6
#define PIE0AD_PIE0AD7 _PIE01AD.Overlap_STR.PIE0ADSTR.Bits.PIE0AD7
#define PIE0AD_PIE0AD0_MASK 0x01U
#define PIE0AD_PIE0AD1_MASK 0x02U
#define PIE0AD_PIE0AD2_MASK 0x04U
#define PIE0AD_PIE0AD3_MASK 0x08U
#define PIE0AD_PIE0AD4_MASK 0x10U
#define PIE0AD_PIE0AD5_MASK 0x20U
#define PIE0AD_PIE0AD6_MASK 0x40U
#define PIE0AD_PIE0AD7_MASK 0x80U
/*** PIE1AD - Port ADL Interrupt Enable Register; 0x0000027D ***/
union {
byte Byte;
struct {
byte PIE1AD0 :1; /* Port ADL Interrupt Enable Bit 0 */
byte PIE1AD1 :1; /* Port ADL Interrupt Enable Bit 1 */
byte PIE1AD2 :1; /* Port ADL Interrupt Enable Bit 2 */
byte PIE1AD3 :1; /* Port ADL Interrupt Enable Bit 3 */
byte PIE1AD4 :1; /* Port ADL Interrupt Enable Bit 4 */
byte PIE1AD5 :1; /* Port ADL Interrupt Enable Bit 5 */
byte PIE1AD6 :1; /* Port ADL Interrupt Enable Bit 6 */
byte PIE1AD7 :1; /* Port ADL Interrupt Enable Bit 7 */
} Bits;
} PIE1ADSTR;
#define PIE1AD _PIE01AD.Overlap_STR.PIE1ADSTR.Byte
#define PIE1AD_PIE1AD0 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD0
#define PIE1AD_PIE1AD1 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD1
#define PIE1AD_PIE1AD2 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD2
#define PIE1AD_PIE1AD3 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD3
#define PIE1AD_PIE1AD4 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD4
#define PIE1AD_PIE1AD5 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD5
#define PIE1AD_PIE1AD6 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD6
#define PIE1AD_PIE1AD7 _PIE01AD.Overlap_STR.PIE1ADSTR.Bits.PIE1AD7
#define PIE1AD_PIE1AD0_MASK 0x01U
#define PIE1AD_PIE1AD1_MASK 0x02U
#define PIE1AD_PIE1AD2_MASK 0x04U
#define PIE1AD_PIE1AD3_MASK 0x08U
#define PIE1AD_PIE1AD4_MASK 0x10U
#define PIE1AD_PIE1AD5_MASK 0x20U
#define PIE1AD_PIE1AD6_MASK 0x40U
#define PIE1AD_PIE1AD7_MASK 0x80U
} Overlap_STR;
struct {
word PIE1AD0 :1; /* Port AD Interrupt Enable Bit 0 */
word PIE1AD1 :1; /* Port AD Interrupt Enable Bit 1 */
word PIE1AD2 :1; /* Port AD Interrupt Enable Bit 2 */
word PIE1AD3 :1; /* Port AD Interrupt Enable Bit 3 */
word PIE1AD4 :1; /* Port AD Interrupt Enable Bit 4 */
word PIE1AD5 :1; /* Port AD Interrupt Enable Bit 5 */
word PIE1AD6 :1; /* Port AD Interrupt Enable Bit 6 */
word PIE1AD7 :1; /* Port AD Interrupt Enable Bit 7 */
word PIE0AD0 :1; /* Port AD Interrupt Enable Bit 0 */
word PIE0AD1 :1; /* Port AD Interrupt Enable Bit 1 */
word PIE0AD2 :1; /* Port AD Interrupt Enable Bit 2 */
word PIE0AD3 :1; /* Port AD Interrupt Enable Bit 3 */
word PIE0AD4 :1; /* Port AD Interrupt Enable Bit 4 */
word PIE0AD5 :1; /* Port AD Interrupt Enable Bit 5 */
word PIE0AD6 :1; /* Port AD Interrupt Enable Bit 6 */
word PIE0AD7 :1; /* Port AD Interrupt Enable Bit 7 */
} Bits;
struct {
word grpPIE1AD :8;
word grpPIE0AD :8;
} MergedBits;
} PIE01ADSTR;
extern volatile PIE01ADSTR _PIE01AD @(REG_BASE + 0x0000027CUL);
#define PIE01AD _PIE01AD.Word
#define PIE01AD_PIE1AD0 _PIE01AD.Bits.PIE1AD0
#define PIE01AD_PIE1AD1 _PIE01AD.Bits.PIE1AD1
#define PIE01AD_PIE1AD2 _PIE01AD.Bits.PIE1AD2
#define PIE01AD_PIE1AD3 _PIE01AD.Bits.PIE1AD3
#define PIE01AD_PIE1AD4 _PIE01AD.Bits.PIE1AD4
#define PIE01AD_PIE1AD5 _PIE01AD.Bits.PIE1AD5
#define PIE01AD_PIE1AD6 _PIE01AD.Bits.PIE1AD6
#define PIE01AD_PIE1AD7 _PIE01AD.Bits.PIE1AD7
#define PIE01AD_PIE0AD0 _PIE01AD.Bits.PIE0AD0
#define PIE01AD_PIE0AD1 _PIE01AD.Bits.PIE0AD1
#define PIE01AD_PIE0AD2 _PIE01AD.Bits.PIE0AD2
#define PIE01AD_PIE0AD3 _PIE01AD.Bits.PIE0AD3
#define PIE01AD_PIE0AD4 _PIE01AD.Bits.PIE0AD4
#define PIE01AD_PIE0AD5 _PIE01AD.Bits.PIE0AD5
#define PIE01AD_PIE0AD6 _PIE01AD.Bits.PIE0AD6
#define PIE01AD_PIE0AD7 _PIE01AD.Bits.PIE0AD7
#define PIE01AD_PIE1AD _PIE01AD.MergedBits.grpPIE1AD
#define PIE01AD_PIE0AD _PIE01AD.MergedBits.grpPIE0AD
#define PIE01AD_PIE1AD0_MASK 0x01U
#define PIE01AD_PIE1AD1_MASK 0x02U
#define PIE01AD_PIE1AD2_MASK 0x04U
#define PIE01AD_PIE1AD3_MASK 0x08U
#define PIE01AD_PIE1AD4_MASK 0x10U
#define PIE01AD_PIE1AD5_MASK 0x20U
#define PIE01AD_PIE1AD6_MASK 0x40U
#define PIE01AD_PIE1AD7_MASK 0x80U
#define PIE01AD_PIE0AD0_MASK 0x0100U
#define PIE01AD_PIE0AD1_MASK 0x0200U
#define PIE01AD_PIE0AD2_MASK 0x0400U
#define PIE01AD_PIE0AD3_MASK 0x0800U
#define PIE01AD_PIE0AD4_MASK 0x1000U
#define PIE01AD_PIE0AD5_MASK 0x2000U
#define PIE01AD_PIE0AD6_MASK 0x4000U
#define PIE01AD_PIE0AD7_MASK 0x8000U
#define PIE01AD_PIE1AD_MASK 0xFFU
#define PIE01AD_PIE1AD_BITNUM 0x00U
#define PIE01AD_PIE0AD_MASK 0xFF00U
#define PIE01AD_PIE0AD_BITNUM 0x08U
/*** PIF01AD - Port AD Interrupt Flag Register; 0x0000027E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PIF0AD - Port ADH Interrupt Flag Register; 0x0000027E ***/
union {
byte Byte;
struct {
byte PIF0AD0 :1; /* Port ADH Bit 0 */
byte PIF0AD1 :1; /* Port ADH Bit 1 */
byte PIF0AD2 :1; /* Port ADH Bit 2 */
byte PIF0AD3 :1; /* Port ADH Bit 3 */
byte PIF0AD4 :1; /* Port ADH Bit 4 */
byte PIF0AD5 :1; /* Port ADH Bit 5 */
byte PIF0AD6 :1; /* Port ADH Bit 6 */
byte PIF0AD7 :1; /* Port ADH Bit 7 */
} Bits;
} PIF0ADSTR;
#define PIF0AD _PIF01AD.Overlap_STR.PIF0ADSTR.Byte
#define PIF0AD_PIF0AD0 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD0
#define PIF0AD_PIF0AD1 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD1
#define PIF0AD_PIF0AD2 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD2
#define PIF0AD_PIF0AD3 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD3
#define PIF0AD_PIF0AD4 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD4
#define PIF0AD_PIF0AD5 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD5
#define PIF0AD_PIF0AD6 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD6
#define PIF0AD_PIF0AD7 _PIF01AD.Overlap_STR.PIF0ADSTR.Bits.PIF0AD7
#define PIF0AD_PIF0AD0_MASK 0x01U
#define PIF0AD_PIF0AD1_MASK 0x02U
#define PIF0AD_PIF0AD2_MASK 0x04U
#define PIF0AD_PIF0AD3_MASK 0x08U
#define PIF0AD_PIF0AD4_MASK 0x10U
#define PIF0AD_PIF0AD5_MASK 0x20U
#define PIF0AD_PIF0AD6_MASK 0x40U
#define PIF0AD_PIF0AD7_MASK 0x80U
/*** PIF1AD - Port ADL Interrupt Flag Register; 0x0000027F ***/
union {
byte Byte;
struct {
byte PIF1AD0 :1; /* Port ADL Bit 0 */
byte PIF1AD1 :1; /* Port ADL Bit 1 */
byte PIF1AD2 :1; /* Port ADL Bit 2 */
byte PIF1AD3 :1; /* Port ADL Bit 3 */
byte PIF1AD4 :1; /* Port ADL Bit 4 */
byte PIF1AD5 :1; /* Port ADL Bit 5 */
byte PIF1AD6 :1; /* Port ADL Bit 6 */
byte PIF1AD7 :1; /* Port ADL Bit 7 */
} Bits;
} PIF1ADSTR;
#define PIF1AD _PIF01AD.Overlap_STR.PIF1ADSTR.Byte
#define PIF1AD_PIF1AD0 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD0
#define PIF1AD_PIF1AD1 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD1
#define PIF1AD_PIF1AD2 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD2
#define PIF1AD_PIF1AD3 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD3
#define PIF1AD_PIF1AD4 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD4
#define PIF1AD_PIF1AD5 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD5
#define PIF1AD_PIF1AD6 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD6
#define PIF1AD_PIF1AD7 _PIF01AD.Overlap_STR.PIF1ADSTR.Bits.PIF1AD7
#define PIF1AD_PIF1AD0_MASK 0x01U
#define PIF1AD_PIF1AD1_MASK 0x02U
#define PIF1AD_PIF1AD2_MASK 0x04U
#define PIF1AD_PIF1AD3_MASK 0x08U
#define PIF1AD_PIF1AD4_MASK 0x10U
#define PIF1AD_PIF1AD5_MASK 0x20U
#define PIF1AD_PIF1AD6_MASK 0x40U
#define PIF1AD_PIF1AD7_MASK 0x80U
} Overlap_STR;
struct {
word PIF1AD0 :1; /* Port AD Bit 0 */
word PIF1AD1 :1; /* Port AD Bit 1 */
word PIF1AD2 :1; /* Port AD Bit 2 */
word PIF1AD3 :1; /* Port AD Bit 3 */
word PIF1AD4 :1; /* Port AD Bit 4 */
word PIF1AD5 :1; /* Port AD Bit 5 */
word PIF1AD6 :1; /* Port AD Bit 6 */
word PIF1AD7 :1; /* Port AD Bit 7 */
word PIF0AD0 :1; /* Port AD Bit 0 */
word PIF0AD1 :1; /* Port AD Bit 1 */
word PIF0AD2 :1; /* Port AD Bit 2 */
word PIF0AD3 :1; /* Port AD Bit 3 */
word PIF0AD4 :1; /* Port AD Bit 4 */
word PIF0AD5 :1; /* Port AD Bit 5 */
word PIF0AD6 :1; /* Port AD Bit 6 */
word PIF0AD7 :1; /* Port AD Bit 7 */
} Bits;
struct {
word grpPIF1AD :8;
word grpPIF0AD :8;
} MergedBits;
} PIF01ADSTR;
extern volatile PIF01ADSTR _PIF01AD @(REG_BASE + 0x0000027EUL);
#define PIF01AD _PIF01AD.Word
#define PIF01AD_PIF1AD0 _PIF01AD.Bits.PIF1AD0
#define PIF01AD_PIF1AD1 _PIF01AD.Bits.PIF1AD1
#define PIF01AD_PIF1AD2 _PIF01AD.Bits.PIF1AD2
#define PIF01AD_PIF1AD3 _PIF01AD.Bits.PIF1AD3
#define PIF01AD_PIF1AD4 _PIF01AD.Bits.PIF1AD4
#define PIF01AD_PIF1AD5 _PIF01AD.Bits.PIF1AD5
#define PIF01AD_PIF1AD6 _PIF01AD.Bits.PIF1AD6
#define PIF01AD_PIF1AD7 _PIF01AD.Bits.PIF1AD7
#define PIF01AD_PIF0AD0 _PIF01AD.Bits.PIF0AD0
#define PIF01AD_PIF0AD1 _PIF01AD.Bits.PIF0AD1
#define PIF01AD_PIF0AD2 _PIF01AD.Bits.PIF0AD2
#define PIF01AD_PIF0AD3 _PIF01AD.Bits.PIF0AD3
#define PIF01AD_PIF0AD4 _PIF01AD.Bits.PIF0AD4
#define PIF01AD_PIF0AD5 _PIF01AD.Bits.PIF0AD5
#define PIF01AD_PIF0AD6 _PIF01AD.Bits.PIF0AD6
#define PIF01AD_PIF0AD7 _PIF01AD.Bits.PIF0AD7
#define PIF01AD_PIF1AD _PIF01AD.MergedBits.grpPIF1AD
#define PIF01AD_PIF0AD _PIF01AD.MergedBits.grpPIF0AD
#define PIF01AD_PIF1AD0_MASK 0x01U
#define PIF01AD_PIF1AD1_MASK 0x02U
#define PIF01AD_PIF1AD2_MASK 0x04U
#define PIF01AD_PIF1AD3_MASK 0x08U
#define PIF01AD_PIF1AD4_MASK 0x10U
#define PIF01AD_PIF1AD5_MASK 0x20U
#define PIF01AD_PIF1AD6_MASK 0x40U
#define PIF01AD_PIF1AD7_MASK 0x80U
#define PIF01AD_PIF0AD0_MASK 0x0100U
#define PIF01AD_PIF0AD1_MASK 0x0200U
#define PIF01AD_PIF0AD2_MASK 0x0400U
#define PIF01AD_PIF0AD3_MASK 0x0800U
#define PIF01AD_PIF0AD4_MASK 0x1000U
#define PIF01AD_PIF0AD5_MASK 0x2000U
#define PIF01AD_PIF0AD6_MASK 0x4000U
#define PIF01AD_PIF0AD7_MASK 0x8000U
#define PIF01AD_PIF1AD_MASK 0xFFU
#define PIF01AD_PIF1AD_BITNUM 0x00U
#define PIF01AD_PIF0AD_MASK 0xFF00U
#define PIF01AD_PIF0AD_BITNUM 0x08U
/*** CPMULVCTL - Low Voltage Control Register; 0x000002F1 ***/
typedef union {
byte Byte;
struct {
byte LVIF :1; /* Low-Voltage Interrupt Flag */
byte LVIE :1; /* Low-Voltage Interrupt Enable Bit */
byte LVDS :1; /* Low-Voltage Detect Status Bit */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} CPMULVCTLSTR;
extern volatile CPMULVCTLSTR _CPMULVCTL @(REG_BASE + 0x000002F1UL);
#define CPMULVCTL _CPMULVCTL.Byte
#define CPMULVCTL_LVIF _CPMULVCTL.Bits.LVIF
#define CPMULVCTL_LVIE _CPMULVCTL.Bits.LVIE
#define CPMULVCTL_LVDS _CPMULVCTL.Bits.LVDS
#define CPMULVCTL_LVIF_MASK 0x01U
#define CPMULVCTL_LVIE_MASK 0x02U
#define CPMULVCTL_LVDS_MASK 0x04U
/*** CPMUAPICTL - Autonomous Periodical Interrupt Control Register; 0x000002F2 ***/
typedef union {
byte Byte;
struct {
byte APIF :1; /* Autonomous Periodical Interrupt Flag */
byte APIE :1; /* Autonomous Periodical Interrupt Enable Bit */
byte APIFE :1; /* Autonomous Periodical Interrupt Feature Enable Bit */
byte APIEA :1; /* Autonomous Periodical Interrupt External Access Enable Bit */
byte APIES :1; /* Autonomous Periodical Interrupt External Select Bit */
byte :1;
byte :1;
byte APICLK :1; /* Autonomous Periodical Interrupt Clock Select Bit */
} Bits;
} CPMUAPICTLSTR;
extern volatile CPMUAPICTLSTR _CPMUAPICTL @(REG_BASE + 0x000002F2UL);
#define CPMUAPICTL _CPMUAPICTL.Byte
#define CPMUAPICTL_APIF _CPMUAPICTL.Bits.APIF
#define CPMUAPICTL_APIE _CPMUAPICTL.Bits.APIE
#define CPMUAPICTL_APIFE _CPMUAPICTL.Bits.APIFE
#define CPMUAPICTL_APIEA _CPMUAPICTL.Bits.APIEA
#define CPMUAPICTL_APIES _CPMUAPICTL.Bits.APIES
#define CPMUAPICTL_APICLK _CPMUAPICTL.Bits.APICLK
#define CPMUAPICTL_APIF_MASK 0x01U
#define CPMUAPICTL_APIE_MASK 0x02U
#define CPMUAPICTL_APIFE_MASK 0x04U
#define CPMUAPICTL_APIEA_MASK 0x08U
#define CPMUAPICTL_APIES_MASK 0x10U
#define CPMUAPICTL_APICLK_MASK 0x80U
/*** CPMUACLKTR - Autonomous Clock Trimming Register; 0x000002F3 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte ACLKTR0 :1; /* Autonomous Periodical Interrupt Period Trimming Bit 0 */
byte ACLKTR1 :1; /* Autonomous Periodical Interrupt Period Trimming Bit 1 */
byte ACLKTR2 :1; /* Autonomous Periodical Interrupt Period Trimming Bit 2 */
byte ACLKTR3 :1; /* Autonomous Periodical Interrupt Period Trimming Bit 3 */
byte ACLKTR4 :1; /* Autonomous Periodical Interrupt Period Trimming Bit 4 */
byte ACLKTR5 :1; /* Autonomous Periodical Interrupt Period Trimming Bit 5 */
} Bits;
struct {
byte :1;
byte :1;
byte grpACLKTR :6;
} MergedBits;
} CPMUACLKTRSTR;
extern volatile CPMUACLKTRSTR _CPMUACLKTR @(REG_BASE + 0x000002F3UL);
#define CPMUACLKTR _CPMUACLKTR.Byte
#define CPMUACLKTR_ACLKTR0 _CPMUACLKTR.Bits.ACLKTR0
#define CPMUACLKTR_ACLKTR1 _CPMUACLKTR.Bits.ACLKTR1
#define CPMUACLKTR_ACLKTR2 _CPMUACLKTR.Bits.ACLKTR2
#define CPMUACLKTR_ACLKTR3 _CPMUACLKTR.Bits.ACLKTR3
#define CPMUACLKTR_ACLKTR4 _CPMUACLKTR.Bits.ACLKTR4
#define CPMUACLKTR_ACLKTR5 _CPMUACLKTR.Bits.ACLKTR5
#define CPMUACLKTR_ACLKTR _CPMUACLKTR.MergedBits.grpACLKTR
#define CPMUACLKTR_ACLKTR0_MASK 0x04U
#define CPMUACLKTR_ACLKTR1_MASK 0x08U
#define CPMUACLKTR_ACLKTR2_MASK 0x10U
#define CPMUACLKTR_ACLKTR3_MASK 0x20U
#define CPMUACLKTR_ACLKTR4_MASK 0x40U
#define CPMUACLKTR_ACLKTR5_MASK 0x80U
#define CPMUACLKTR_ACLKTR_MASK 0xFCU
#define CPMUACLKTR_ACLKTR_BITNUM 0x02U
/*** CPMUAPIR - Autonomous Periodical Interrupt Rate Register; 0x000002F4 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** CPMUAPIRH - Autonomous Periodical Interrupt Rate Register High; 0x000002F4 ***/
union {
byte Byte;
struct {
byte APIR8 :1; /* Autonomous Periodical Interrupt Rate Bit 8 */
byte APIR9 :1; /* Autonomous Periodical Interrupt Rate Bit 9 */
byte APIR10 :1; /* Autonomous Periodical Interrupt Rate Bit 10 */
byte APIR11 :1; /* Autonomous Periodical Interrupt Rate Bit 11 */
byte APIR12 :1; /* Autonomous Periodical Interrupt Rate Bit 12 */
byte APIR13 :1; /* Autonomous Periodical Interrupt Rate Bit 13 */
byte APIR14 :1; /* Autonomous Periodical Interrupt Rate Bit 14 */
byte APIR15 :1; /* Autonomous Periodical Interrupt Rate Bit 15 */
} Bits;
} CPMUAPIRHSTR;
#define CPMUAPIRH _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Byte
#define CPMUAPIRH_APIR8 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR8
#define CPMUAPIRH_APIR9 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR9
#define CPMUAPIRH_APIR10 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR10
#define CPMUAPIRH_APIR11 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR11
#define CPMUAPIRH_APIR12 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR12
#define CPMUAPIRH_APIR13 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR13
#define CPMUAPIRH_APIR14 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR14
#define CPMUAPIRH_APIR15 _CPMUAPIR.Overlap_STR.CPMUAPIRHSTR.Bits.APIR15
#define CPMUAPIRH_APIR8_MASK 0x01U
#define CPMUAPIRH_APIR9_MASK 0x02U
#define CPMUAPIRH_APIR10_MASK 0x04U
#define CPMUAPIRH_APIR11_MASK 0x08U
#define CPMUAPIRH_APIR12_MASK 0x10U
#define CPMUAPIRH_APIR13_MASK 0x20U
#define CPMUAPIRH_APIR14_MASK 0x40U
#define CPMUAPIRH_APIR15_MASK 0x80U
/*** CPMUAPIRL - Autonomous Periodical Interrupt Rate Register Low; 0x000002F5 ***/
union {
byte Byte;
struct {
byte APIR0 :1; /* Autonomous Periodical Interrupt Rate Bit 0 */
byte APIR1 :1; /* Autonomous Periodical Interrupt Rate Bit 1 */
byte APIR2 :1; /* Autonomous Periodical Interrupt Rate Bit 2 */
byte APIR3 :1; /* Autonomous Periodical Interrupt Rate Bit 3 */
byte APIR4 :1; /* Autonomous Periodical Interrupt Rate Bit 4 */
byte APIR5 :1; /* Autonomous Periodical Interrupt Rate Bit 5 */
byte APIR6 :1; /* Autonomous Periodical Interrupt Rate Bit 6 */
byte APIR7 :1; /* Autonomous Periodical Interrupt Rate Bit 7 */
} Bits;
} CPMUAPIRLSTR;
#define CPMUAPIRL _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Byte
#define CPMUAPIRL_APIR0 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR0
#define CPMUAPIRL_APIR1 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR1
#define CPMUAPIRL_APIR2 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR2
#define CPMUAPIRL_APIR3 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR3
#define CPMUAPIRL_APIR4 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR4
#define CPMUAPIRL_APIR5 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR5
#define CPMUAPIRL_APIR6 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR6
#define CPMUAPIRL_APIR7 _CPMUAPIR.Overlap_STR.CPMUAPIRLSTR.Bits.APIR7
#define CPMUAPIRL_APIR0_MASK 0x01U
#define CPMUAPIRL_APIR1_MASK 0x02U
#define CPMUAPIRL_APIR2_MASK 0x04U
#define CPMUAPIRL_APIR3_MASK 0x08U
#define CPMUAPIRL_APIR4_MASK 0x10U
#define CPMUAPIRL_APIR5_MASK 0x20U
#define CPMUAPIRL_APIR6_MASK 0x40U
#define CPMUAPIRL_APIR7_MASK 0x80U
} Overlap_STR;
struct {
word APIR0 :1; /* Autonomous Periodical Interrupt Rate Bit 0 */
word APIR1 :1; /* Autonomous Periodical Interrupt Rate Bit 1 */
word APIR2 :1; /* Autonomous Periodical Interrupt Rate Bit 2 */
word APIR3 :1; /* Autonomous Periodical Interrupt Rate Bit 3 */
word APIR4 :1; /* Autonomous Periodical Interrupt Rate Bit 4 */
word APIR5 :1; /* Autonomous Periodical Interrupt Rate Bit 5 */
word APIR6 :1; /* Autonomous Periodical Interrupt Rate Bit 6 */
word APIR7 :1; /* Autonomous Periodical Interrupt Rate Bit 7 */
word APIR8 :1; /* Autonomous Periodical Interrupt Rate Bit 8 */
word APIR9 :1; /* Autonomous Periodical Interrupt Rate Bit 9 */
word APIR10 :1; /* Autonomous Periodical Interrupt Rate Bit 10 */
word APIR11 :1; /* Autonomous Periodical Interrupt Rate Bit 11 */
word APIR12 :1; /* Autonomous Periodical Interrupt Rate Bit 12 */
word APIR13 :1; /* Autonomous Periodical Interrupt Rate Bit 13 */
word APIR14 :1; /* Autonomous Periodical Interrupt Rate Bit 14 */
word APIR15 :1; /* Autonomous Periodical Interrupt Rate Bit 15 */
} Bits;
} CPMUAPIRSTR;
extern volatile CPMUAPIRSTR _CPMUAPIR @(REG_BASE + 0x000002F4UL);
#define CPMUAPIR _CPMUAPIR.Word
#define CPMUAPIR_APIR0 _CPMUAPIR.Bits.APIR0
#define CPMUAPIR_APIR1 _CPMUAPIR.Bits.APIR1
#define CPMUAPIR_APIR2 _CPMUAPIR.Bits.APIR2
#define CPMUAPIR_APIR3 _CPMUAPIR.Bits.APIR3
#define CPMUAPIR_APIR4 _CPMUAPIR.Bits.APIR4
#define CPMUAPIR_APIR5 _CPMUAPIR.Bits.APIR5
#define CPMUAPIR_APIR6 _CPMUAPIR.Bits.APIR6
#define CPMUAPIR_APIR7 _CPMUAPIR.Bits.APIR7
#define CPMUAPIR_APIR8 _CPMUAPIR.Bits.APIR8
#define CPMUAPIR_APIR9 _CPMUAPIR.Bits.APIR9
#define CPMUAPIR_APIR10 _CPMUAPIR.Bits.APIR10
#define CPMUAPIR_APIR11 _CPMUAPIR.Bits.APIR11
#define CPMUAPIR_APIR12 _CPMUAPIR.Bits.APIR12
#define CPMUAPIR_APIR13 _CPMUAPIR.Bits.APIR13
#define CPMUAPIR_APIR14 _CPMUAPIR.Bits.APIR14
#define CPMUAPIR_APIR15 _CPMUAPIR.Bits.APIR15
#define CPMUAPIR_APIR0_MASK 0x01U
#define CPMUAPIR_APIR1_MASK 0x02U
#define CPMUAPIR_APIR2_MASK 0x04U
#define CPMUAPIR_APIR3_MASK 0x08U
#define CPMUAPIR_APIR4_MASK 0x10U
#define CPMUAPIR_APIR5_MASK 0x20U
#define CPMUAPIR_APIR6_MASK 0x40U
#define CPMUAPIR_APIR7_MASK 0x80U
#define CPMUAPIR_APIR8_MASK 0x0100U
#define CPMUAPIR_APIR9_MASK 0x0200U
#define CPMUAPIR_APIR10_MASK 0x0400U
#define CPMUAPIR_APIR11_MASK 0x0800U
#define CPMUAPIR_APIR12_MASK 0x1000U
#define CPMUAPIR_APIR13_MASK 0x2000U
#define CPMUAPIR_APIR14_MASK 0x4000U
#define CPMUAPIR_APIR15_MASK 0x8000U
/*** CPMUIRCTRIM - S12CPMU IRC1M Trim Registers; 0x000002F8 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** CPMUIRCTRIMH - S12CPMU IRC1M Trim Registers High; 0x000002F8 ***/
union {
byte Byte;
struct {
byte IRCTRIM8 :1; /* IRC1M Frequency Trim Bit 8 */
byte IRCTRIM9 :1; /* IRC1M Frequency Trim Bit 9 */
byte :1;
byte TCTRIM0 :1; /* IRC1M temperature coeficient Trim Bit 0 */
byte TCTRIM1 :1; /* IRC1M temperature coeficient Trim Bit 1 */
byte TCTRIM2 :1; /* IRC1M temperature coeficient Trim Bit 2 */
byte TCTRIM3 :1; /* IRC1M temperature coeficient Trim Bit 3 */
byte TCTRIM4 :1; /* IRC1M temperature coeficient Trim Bit 4 */
} Bits;
struct {
byte grpIRCTRIM_8 :2;
byte :1;
byte grpTCTRIM :5;
} MergedBits;
} CPMUIRCTRIMHSTR;
#define CPMUIRCTRIMH _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Byte
#define CPMUIRCTRIMH_IRCTRIM8 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Bits.IRCTRIM8
#define CPMUIRCTRIMH_IRCTRIM9 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Bits.IRCTRIM9
#define CPMUIRCTRIMH_TCTRIM0 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Bits.TCTRIM0
#define CPMUIRCTRIMH_TCTRIM1 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Bits.TCTRIM1
#define CPMUIRCTRIMH_TCTRIM2 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Bits.TCTRIM2
#define CPMUIRCTRIMH_TCTRIM3 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Bits.TCTRIM3
#define CPMUIRCTRIMH_TCTRIM4 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.Bits.TCTRIM4
#define CPMUIRCTRIMH_IRCTRIM_8 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.MergedBits.grpIRCTRIM_8
#define CPMUIRCTRIMH_TCTRIM _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMHSTR.MergedBits.grpTCTRIM
#define CPMUIRCTRIMH_IRCTRIM CPMUIRCTRIMH_IRCTRIM_8
#define CPMUIRCTRIMH_IRCTRIM8_MASK 0x01U
#define CPMUIRCTRIMH_IRCTRIM9_MASK 0x02U
#define CPMUIRCTRIMH_TCTRIM0_MASK 0x08U
#define CPMUIRCTRIMH_TCTRIM1_MASK 0x10U
#define CPMUIRCTRIMH_TCTRIM2_MASK 0x20U
#define CPMUIRCTRIMH_TCTRIM3_MASK 0x40U
#define CPMUIRCTRIMH_TCTRIM4_MASK 0x80U
#define CPMUIRCTRIMH_IRCTRIM_8_MASK 0x03U
#define CPMUIRCTRIMH_IRCTRIM_8_BITNUM 0x00U
#define CPMUIRCTRIMH_TCTRIM_MASK 0xF8U
#define CPMUIRCTRIMH_TCTRIM_BITNUM 0x03U
/*** CPMUIRCTRIML - S12CPMU IRC1M Trim Registers Low; 0x000002F9 ***/
union {
byte Byte;
struct {
byte IRCTRIM0 :1; /* IRC1M Frequency Trim Bit 0 */
byte IRCTRIM1 :1; /* IRC1M Frequency Trim Bit 1 */
byte IRCTRIM2 :1; /* IRC1M Frequency Trim Bit 2 */
byte IRCTRIM3 :1; /* IRC1M Frequency Trim Bit 3 */
byte IRCTRIM4 :1; /* IRC1M Frequency Trim Bit 4 */
byte IRCTRIM5 :1; /* IRC1M Frequency Trim Bit 5 */
byte IRCTRIM6 :1; /* IRC1M Frequency Trim Bit 6 */
byte IRCTRIM7 :1; /* IRC1M Frequency Trim Bit 7 */
} Bits;
} CPMUIRCTRIMLSTR;
#define CPMUIRCTRIML _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Byte
#define CPMUIRCTRIML_IRCTRIM0 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM0
#define CPMUIRCTRIML_IRCTRIM1 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM1
#define CPMUIRCTRIML_IRCTRIM2 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM2
#define CPMUIRCTRIML_IRCTRIM3 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM3
#define CPMUIRCTRIML_IRCTRIM4 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM4
#define CPMUIRCTRIML_IRCTRIM5 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM5
#define CPMUIRCTRIML_IRCTRIM6 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM6
#define CPMUIRCTRIML_IRCTRIM7 _CPMUIRCTRIM.Overlap_STR.CPMUIRCTRIMLSTR.Bits.IRCTRIM7
#define CPMUIRCTRIML_IRCTRIM0_MASK 0x01U
#define CPMUIRCTRIML_IRCTRIM1_MASK 0x02U
#define CPMUIRCTRIML_IRCTRIM2_MASK 0x04U
#define CPMUIRCTRIML_IRCTRIM3_MASK 0x08U
#define CPMUIRCTRIML_IRCTRIM4_MASK 0x10U
#define CPMUIRCTRIML_IRCTRIM5_MASK 0x20U
#define CPMUIRCTRIML_IRCTRIM6_MASK 0x40U
#define CPMUIRCTRIML_IRCTRIM7_MASK 0x80U
} Overlap_STR;
struct {
word IRCTRIM0 :1; /* IRC1M Frequency Trim Bit 0 */
word IRCTRIM1 :1; /* IRC1M Frequency Trim Bit 1 */
word IRCTRIM2 :1; /* IRC1M Frequency Trim Bit 2 */
word IRCTRIM3 :1; /* IRC1M Frequency Trim Bit 3 */
word IRCTRIM4 :1; /* IRC1M Frequency Trim Bit 4 */
word IRCTRIM5 :1; /* IRC1M Frequency Trim Bit 5 */
word IRCTRIM6 :1; /* IRC1M Frequency Trim Bit 6 */
word IRCTRIM7 :1; /* IRC1M Frequency Trim Bit 7 */
word IRCTRIM8 :1; /* IRC1M Frequency Trim Bit 8 */
word IRCTRIM9 :1; /* IRC1M Frequency Trim Bit 9 */
word :1;
word TCTRIM0 :1; /* IRC1M temperature coeficient Trim Bit 0 */
word TCTRIM1 :1; /* IRC1M temperature coeficient Trim Bit 1 */
word TCTRIM2 :1; /* IRC1M temperature coeficient Trim Bit 2 */
word TCTRIM3 :1; /* IRC1M temperature coeficient Trim Bit 3 */
word TCTRIM4 :1; /* IRC1M temperature coeficient Trim Bit 4 */
} Bits;
struct {
word grpIRCTRIM :10;
word :1;
word grpTCTRIM :5;
} MergedBits;
} CPMUIRCTRIMSTR;
extern volatile CPMUIRCTRIMSTR _CPMUIRCTRIM @(REG_BASE + 0x000002F8UL);
#define CPMUIRCTRIM _CPMUIRCTRIM.Word
#define CPMUIRCTRIM_IRCTRIM0 _CPMUIRCTRIM.Bits.IRCTRIM0
#define CPMUIRCTRIM_IRCTRIM1 _CPMUIRCTRIM.Bits.IRCTRIM1
#define CPMUIRCTRIM_IRCTRIM2 _CPMUIRCTRIM.Bits.IRCTRIM2
#define CPMUIRCTRIM_IRCTRIM3 _CPMUIRCTRIM.Bits.IRCTRIM3
#define CPMUIRCTRIM_IRCTRIM4 _CPMUIRCTRIM.Bits.IRCTRIM4
#define CPMUIRCTRIM_IRCTRIM5 _CPMUIRCTRIM.Bits.IRCTRIM5
#define CPMUIRCTRIM_IRCTRIM6 _CPMUIRCTRIM.Bits.IRCTRIM6
#define CPMUIRCTRIM_IRCTRIM7 _CPMUIRCTRIM.Bits.IRCTRIM7
#define CPMUIRCTRIM_IRCTRIM8 _CPMUIRCTRIM.Bits.IRCTRIM8
#define CPMUIRCTRIM_IRCTRIM9 _CPMUIRCTRIM.Bits.IRCTRIM9
#define CPMUIRCTRIM_TCTRIM0 _CPMUIRCTRIM.Bits.TCTRIM0
#define CPMUIRCTRIM_TCTRIM1 _CPMUIRCTRIM.Bits.TCTRIM1
#define CPMUIRCTRIM_TCTRIM2 _CPMUIRCTRIM.Bits.TCTRIM2
#define CPMUIRCTRIM_TCTRIM3 _CPMUIRCTRIM.Bits.TCTRIM3
#define CPMUIRCTRIM_TCTRIM4 _CPMUIRCTRIM.Bits.TCTRIM4
#define CPMUIRCTRIM_IRCTRIM _CPMUIRCTRIM.MergedBits.grpIRCTRIM
#define CPMUIRCTRIM_TCTRIM _CPMUIRCTRIM.MergedBits.grpTCTRIM
#define CPMUIRCTRIM_IRCTRIM0_MASK 0x01U
#define CPMUIRCTRIM_IRCTRIM1_MASK 0x02U
#define CPMUIRCTRIM_IRCTRIM2_MASK 0x04U
#define CPMUIRCTRIM_IRCTRIM3_MASK 0x08U
#define CPMUIRCTRIM_IRCTRIM4_MASK 0x10U
#define CPMUIRCTRIM_IRCTRIM5_MASK 0x20U
#define CPMUIRCTRIM_IRCTRIM6_MASK 0x40U
#define CPMUIRCTRIM_IRCTRIM7_MASK 0x80U
#define CPMUIRCTRIM_IRCTRIM8_MASK 0x0100U
#define CPMUIRCTRIM_IRCTRIM9_MASK 0x0200U
#define CPMUIRCTRIM_TCTRIM0_MASK 0x0800U
#define CPMUIRCTRIM_TCTRIM1_MASK 0x1000U
#define CPMUIRCTRIM_TCTRIM2_MASK 0x2000U
#define CPMUIRCTRIM_TCTRIM3_MASK 0x4000U
#define CPMUIRCTRIM_TCTRIM4_MASK 0x8000U
#define CPMUIRCTRIM_IRCTRIM_MASK 0x03FFU
#define CPMUIRCTRIM_IRCTRIM_BITNUM 0x00U
#define CPMUIRCTRIM_TCTRIM_MASK 0xF800U
#define CPMUIRCTRIM_TCTRIM_BITNUM 0x0BU
/*** CPMUOSC - S12CPMU Oscillator Register; 0x000002FA ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte OSCPINS_EN :1; /* Oscillator Pins EXTAL and XTAL Enable Bit */
byte :1;
byte OSCE :1; /* Oscillator Enable Bit */
} Bits;
} CPMUOSCSTR;
extern volatile CPMUOSCSTR _CPMUOSC @(REG_BASE + 0x000002FAUL);
#define CPMUOSC _CPMUOSC.Byte
#define CPMUOSC_OSCPINS_EN _CPMUOSC.Bits.OSCPINS_EN
#define CPMUOSC_OSCE _CPMUOSC.Bits.OSCE
#define CPMUOSC_OSCPINS_EN_MASK 0x20U
#define CPMUOSC_OSCE_MASK 0x80U
/*** CPMUPROT - S12CPMUV1 Protection Register; 0x000002FB ***/
typedef union {
byte Byte;
struct {
byte PROT :1; /* Clock Configuration Registers Protection Bit */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} CPMUPROTSTR;
extern volatile CPMUPROTSTR _CPMUPROT @(REG_BASE + 0x000002FBUL);
#define CPMUPROT _CPMUPROT.Byte
#define CPMUPROT_PROT _CPMUPROT.Bits.PROT
#define CPMUPROT_PROT_MASK 0x01U
/*** BAKEY0 - Backdoor Comparison Key 0; 0x0000FF00 ***/
typedef union {
word Word;
struct {
word KEY0 :1; /* Backdoor Comparison Key Bits, bit 0 */
word KEY1 :1; /* Backdoor Comparison Key Bits, bit 1 */
word KEY2 :1; /* Backdoor Comparison Key Bits, bit 2 */
word KEY3 :1; /* Backdoor Comparison Key Bits, bit 3 */
word KEY4 :1; /* Backdoor Comparison Key Bits, bit 4 */
word KEY5 :1; /* Backdoor Comparison Key Bits, bit 5 */
word KEY6 :1; /* Backdoor Comparison Key Bits, bit 6 */
word KEY7 :1; /* Backdoor Comparison Key Bits, bit 7 */
word KEY8 :1; /* Backdoor Comparison Key Bits, bit 8 */
word KEY9 :1; /* Backdoor Comparison Key Bits, bit 9 */
word KEY10 :1; /* Backdoor Comparison Key Bits, bit 10 */
word KEY11 :1; /* Backdoor Comparison Key Bits, bit 11 */
word KEY12 :1; /* Backdoor Comparison Key Bits, bit 12 */
word KEY13 :1; /* Backdoor Comparison Key Bits, bit 13 */
word KEY14 :1; /* Backdoor Comparison Key Bits, bit 14 */
word KEY15 :1; /* Backdoor Comparison Key Bits, bit 15 */
} Bits;
} BAKEY0STR;
extern volatile BAKEY0STR _BAKEY0 @(0x0000FF00);
#define BAKEY0 _BAKEY0.Word
#define BAKEY0_KEY0 _BAKEY0.Bits.KEY0
#define BAKEY0_KEY1 _BAKEY0.Bits.KEY1
#define BAKEY0_KEY2 _BAKEY0.Bits.KEY2
#define BAKEY0_KEY3 _BAKEY0.Bits.KEY3
#define BAKEY0_KEY4 _BAKEY0.Bits.KEY4
#define BAKEY0_KEY5 _BAKEY0.Bits.KEY5
#define BAKEY0_KEY6 _BAKEY0.Bits.KEY6
#define BAKEY0_KEY7 _BAKEY0.Bits.KEY7
#define BAKEY0_KEY8 _BAKEY0.Bits.KEY8
#define BAKEY0_KEY9 _BAKEY0.Bits.KEY9
#define BAKEY0_KEY10 _BAKEY0.Bits.KEY10
#define BAKEY0_KEY11 _BAKEY0.Bits.KEY11
#define BAKEY0_KEY12 _BAKEY0.Bits.KEY12
#define BAKEY0_KEY13 _BAKEY0.Bits.KEY13
#define BAKEY0_KEY14 _BAKEY0.Bits.KEY14
#define BAKEY0_KEY15 _BAKEY0.Bits.KEY15
/* BAKEY_ARR: Access 4 BAKEYx registers in an array */
#define BAKEY_ARR ((volatile word *) &BAKEY0)
#define BAKEY0_KEY0_MASK 0x01U
#define BAKEY0_KEY1_MASK 0x02U
#define BAKEY0_KEY2_MASK 0x04U
#define BAKEY0_KEY3_MASK 0x08U
#define BAKEY0_KEY4_MASK 0x10U
#define BAKEY0_KEY5_MASK 0x20U
#define BAKEY0_KEY6_MASK 0x40U
#define BAKEY0_KEY7_MASK 0x80U
#define BAKEY0_KEY8_MASK 0x0100U
#define BAKEY0_KEY9_MASK 0x0200U
#define BAKEY0_KEY10_MASK 0x0400U
#define BAKEY0_KEY11_MASK 0x0800U
#define BAKEY0_KEY12_MASK 0x1000U
#define BAKEY0_KEY13_MASK 0x2000U
#define BAKEY0_KEY14_MASK 0x4000U
#define BAKEY0_KEY15_MASK 0x8000U
/*** BAKEY1 - Backdoor Comparison Key 1; 0x0000FF02 ***/
typedef union {
word Word;
struct {
word KEY0 :1; /* Backdoor Comparison Key Bits, bit 0 */
word KEY1 :1; /* Backdoor Comparison Key Bits, bit 1 */
word KEY2 :1; /* Backdoor Comparison Key Bits, bit 2 */
word KEY3 :1; /* Backdoor Comparison Key Bits, bit 3 */
word KEY4 :1; /* Backdoor Comparison Key Bits, bit 4 */
word KEY5 :1; /* Backdoor Comparison Key Bits, bit 5 */
word KEY6 :1; /* Backdoor Comparison Key Bits, bit 6 */
word KEY7 :1; /* Backdoor Comparison Key Bits, bit 7 */
word KEY8 :1; /* Backdoor Comparison Key Bits, bit 8 */
word KEY9 :1; /* Backdoor Comparison Key Bits, bit 9 */
word KEY10 :1; /* Backdoor Comparison Key Bits, bit 10 */
word KEY11 :1; /* Backdoor Comparison Key Bits, bit 11 */
word KEY12 :1; /* Backdoor Comparison Key Bits, bit 12 */
word KEY13 :1; /* Backdoor Comparison Key Bits, bit 13 */
word KEY14 :1; /* Backdoor Comparison Key Bits, bit 14 */
word KEY15 :1; /* Backdoor Comparison Key Bits, bit 15 */
} Bits;
} BAKEY1STR;
extern volatile BAKEY1STR _BAKEY1 @(0x0000FF02);
#define BAKEY1 _BAKEY1.Word
#define BAKEY1_KEY0 _BAKEY1.Bits.KEY0
#define BAKEY1_KEY1 _BAKEY1.Bits.KEY1
#define BAKEY1_KEY2 _BAKEY1.Bits.KEY2
#define BAKEY1_KEY3 _BAKEY1.Bits.KEY3
#define BAKEY1_KEY4 _BAKEY1.Bits.KEY4
#define BAKEY1_KEY5 _BAKEY1.Bits.KEY5
#define BAKEY1_KEY6 _BAKEY1.Bits.KEY6
#define BAKEY1_KEY7 _BAKEY1.Bits.KEY7
#define BAKEY1_KEY8 _BAKEY1.Bits.KEY8
#define BAKEY1_KEY9 _BAKEY1.Bits.KEY9
#define BAKEY1_KEY10 _BAKEY1.Bits.KEY10
#define BAKEY1_KEY11 _BAKEY1.Bits.KEY11
#define BAKEY1_KEY12 _BAKEY1.Bits.KEY12
#define BAKEY1_KEY13 _BAKEY1.Bits.KEY13
#define BAKEY1_KEY14 _BAKEY1.Bits.KEY14
#define BAKEY1_KEY15 _BAKEY1.Bits.KEY15
#define BAKEY1_KEY0_MASK 0x01U
#define BAKEY1_KEY1_MASK 0x02U
#define BAKEY1_KEY2_MASK 0x04U
#define BAKEY1_KEY3_MASK 0x08U
#define BAKEY1_KEY4_MASK 0x10U
#define BAKEY1_KEY5_MASK 0x20U
#define BAKEY1_KEY6_MASK 0x40U
#define BAKEY1_KEY7_MASK 0x80U
#define BAKEY1_KEY8_MASK 0x0100U
#define BAKEY1_KEY9_MASK 0x0200U
#define BAKEY1_KEY10_MASK 0x0400U
#define BAKEY1_KEY11_MASK 0x0800U
#define BAKEY1_KEY12_MASK 0x1000U
#define BAKEY1_KEY13_MASK 0x2000U
#define BAKEY1_KEY14_MASK 0x4000U
#define BAKEY1_KEY15_MASK 0x8000U
/*** BAKEY2 - Backdoor Comparison Key 2; 0x0000FF04 ***/
typedef union {
word Word;
struct {
word KEY0 :1; /* Backdoor Comparison Key Bits, bit 0 */
word KEY1 :1; /* Backdoor Comparison Key Bits, bit 1 */
word KEY2 :1; /* Backdoor Comparison Key Bits, bit 2 */
word KEY3 :1; /* Backdoor Comparison Key Bits, bit 3 */
word KEY4 :1; /* Backdoor Comparison Key Bits, bit 4 */
word KEY5 :1; /* Backdoor Comparison Key Bits, bit 5 */
word KEY6 :1; /* Backdoor Comparison Key Bits, bit 6 */
word KEY7 :1; /* Backdoor Comparison Key Bits, bit 7 */
word KEY8 :1; /* Backdoor Comparison Key Bits, bit 8 */
word KEY9 :1; /* Backdoor Comparison Key Bits, bit 9 */
word KEY10 :1; /* Backdoor Comparison Key Bits, bit 10 */
word KEY11 :1; /* Backdoor Comparison Key Bits, bit 11 */
word KEY12 :1; /* Backdoor Comparison Key Bits, bit 12 */
word KEY13 :1; /* Backdoor Comparison Key Bits, bit 13 */
word KEY14 :1; /* Backdoor Comparison Key Bits, bit 14 */
word KEY15 :1; /* Backdoor Comparison Key Bits, bit 15 */
} Bits;
} BAKEY2STR;
extern volatile BAKEY2STR _BAKEY2 @(0x0000FF04);
#define BAKEY2 _BAKEY2.Word
#define BAKEY2_KEY0 _BAKEY2.Bits.KEY0
#define BAKEY2_KEY1 _BAKEY2.Bits.KEY1
#define BAKEY2_KEY2 _BAKEY2.Bits.KEY2
#define BAKEY2_KEY3 _BAKEY2.Bits.KEY3
#define BAKEY2_KEY4 _BAKEY2.Bits.KEY4
#define BAKEY2_KEY5 _BAKEY2.Bits.KEY5
#define BAKEY2_KEY6 _BAKEY2.Bits.KEY6
#define BAKEY2_KEY7 _BAKEY2.Bits.KEY7
#define BAKEY2_KEY8 _BAKEY2.Bits.KEY8
#define BAKEY2_KEY9 _BAKEY2.Bits.KEY9
#define BAKEY2_KEY10 _BAKEY2.Bits.KEY10
#define BAKEY2_KEY11 _BAKEY2.Bits.KEY11
#define BAKEY2_KEY12 _BAKEY2.Bits.KEY12
#define BAKEY2_KEY13 _BAKEY2.Bits.KEY13
#define BAKEY2_KEY14 _BAKEY2.Bits.KEY14
#define BAKEY2_KEY15 _BAKEY2.Bits.KEY15
#define BAKEY2_KEY0_MASK 0x01U
#define BAKEY2_KEY1_MASK 0x02U
#define BAKEY2_KEY2_MASK 0x04U
#define BAKEY2_KEY3_MASK 0x08U
#define BAKEY2_KEY4_MASK 0x10U
#define BAKEY2_KEY5_MASK 0x20U
#define BAKEY2_KEY6_MASK 0x40U
#define BAKEY2_KEY7_MASK 0x80U
#define BAKEY2_KEY8_MASK 0x0100U
#define BAKEY2_KEY9_MASK 0x0200U
#define BAKEY2_KEY10_MASK 0x0400U
#define BAKEY2_KEY11_MASK 0x0800U
#define BAKEY2_KEY12_MASK 0x1000U
#define BAKEY2_KEY13_MASK 0x2000U
#define BAKEY2_KEY14_MASK 0x4000U
#define BAKEY2_KEY15_MASK 0x8000U
/*** BAKEY3 - Backdoor Comparison Key 3; 0x0000FF06 ***/
typedef union {
word Word;
struct {
word KEY0 :1; /* Backdoor Comparison Key Bits, bit 0 */
word KEY1 :1; /* Backdoor Comparison Key Bits, bit 1 */
word KEY2 :1; /* Backdoor Comparison Key Bits, bit 2 */
word KEY3 :1; /* Backdoor Comparison Key Bits, bit 3 */
word KEY4 :1; /* Backdoor Comparison Key Bits, bit 4 */
word KEY5 :1; /* Backdoor Comparison Key Bits, bit 5 */
word KEY6 :1; /* Backdoor Comparison Key Bits, bit 6 */
word KEY7 :1; /* Backdoor Comparison Key Bits, bit 7 */
word KEY8 :1; /* Backdoor Comparison Key Bits, bit 8 */
word KEY9 :1; /* Backdoor Comparison Key Bits, bit 9 */
word KEY10 :1; /* Backdoor Comparison Key Bits, bit 10 */
word KEY11 :1; /* Backdoor Comparison Key Bits, bit 11 */
word KEY12 :1; /* Backdoor Comparison Key Bits, bit 12 */
word KEY13 :1; /* Backdoor Comparison Key Bits, bit 13 */
word KEY14 :1; /* Backdoor Comparison Key Bits, bit 14 */
word KEY15 :1; /* Backdoor Comparison Key Bits, bit 15 */
} Bits;
} BAKEY3STR;
extern volatile BAKEY3STR _BAKEY3 @(0x0000FF06);
#define BAKEY3 _BAKEY3.Word
#define BAKEY3_KEY0 _BAKEY3.Bits.KEY0
#define BAKEY3_KEY1 _BAKEY3.Bits.KEY1
#define BAKEY3_KEY2 _BAKEY3.Bits.KEY2
#define BAKEY3_KEY3 _BAKEY3.Bits.KEY3
#define BAKEY3_KEY4 _BAKEY3.Bits.KEY4
#define BAKEY3_KEY5 _BAKEY3.Bits.KEY5
#define BAKEY3_KEY6 _BAKEY3.Bits.KEY6
#define BAKEY3_KEY7 _BAKEY3.Bits.KEY7
#define BAKEY3_KEY8 _BAKEY3.Bits.KEY8
#define BAKEY3_KEY9 _BAKEY3.Bits.KEY9
#define BAKEY3_KEY10 _BAKEY3.Bits.KEY10
#define BAKEY3_KEY11 _BAKEY3.Bits.KEY11
#define BAKEY3_KEY12 _BAKEY3.Bits.KEY12
#define BAKEY3_KEY13 _BAKEY3.Bits.KEY13
#define BAKEY3_KEY14 _BAKEY3.Bits.KEY14
#define BAKEY3_KEY15 _BAKEY3.Bits.KEY15
#define BAKEY3_KEY0_MASK 0x01U
#define BAKEY3_KEY1_MASK 0x02U
#define BAKEY3_KEY2_MASK 0x04U
#define BAKEY3_KEY3_MASK 0x08U
#define BAKEY3_KEY4_MASK 0x10U
#define BAKEY3_KEY5_MASK 0x20U
#define BAKEY3_KEY6_MASK 0x40U
#define BAKEY3_KEY7_MASK 0x80U
#define BAKEY3_KEY8_MASK 0x0100U
#define BAKEY3_KEY9_MASK 0x0200U
#define BAKEY3_KEY10_MASK 0x0400U
#define BAKEY3_KEY11_MASK 0x0800U
#define BAKEY3_KEY12_MASK 0x1000U
#define BAKEY3_KEY13_MASK 0x2000U
#define BAKEY3_KEY14_MASK 0x4000U
#define BAKEY3_KEY15_MASK 0x8000U
/*** NVFPROT - Non Volatile P-Flash Protection Register; 0x0000FF0C ***/
typedef union {
byte Byte;
struct {
byte FPLS0 :1; /* Flash Protection Lower Address Size Bit 0 */
byte FPLS1 :1; /* Flash Protection Lower Address Size Bit 1 */
byte FPLDIS :1; /* Flash Protection Lower Address Range Disable */
byte FPHS0 :1; /* Flash Protection Higher Address Size Bit 0 */
byte FPHS1 :1; /* Flash Protection Higher Address Size Bit 1 */
byte FPHDIS :1; /* Flash Protection Higher Address Range Disable */
byte RNV6 :1; /* Reserved Nonvolatile Bit */
byte FPOPEN :1; /* Flash Protection Operation Enable */
} Bits;
struct {
byte grpFPLS :2;
byte :1;
byte grpFPHS :2;
byte :1;
byte grpRNV_6 :1;
byte :1;
} MergedBits;
} NVFPROTSTR;
extern volatile NVFPROTSTR _NVFPROT @(0x0000FF0C);
#define NVFPROT _NVFPROT.Byte
#define NVFPROT_FPLS0 _NVFPROT.Bits.FPLS0
#define NVFPROT_FPLS1 _NVFPROT.Bits.FPLS1
#define NVFPROT_FPLDIS _NVFPROT.Bits.FPLDIS
#define NVFPROT_FPHS0 _NVFPROT.Bits.FPHS0
#define NVFPROT_FPHS1 _NVFPROT.Bits.FPHS1
#define NVFPROT_FPHDIS _NVFPROT.Bits.FPHDIS
#define NVFPROT_RNV6 _NVFPROT.Bits.RNV6
#define NVFPROT_FPOPEN _NVFPROT.Bits.FPOPEN
#define NVFPROT_FPLS _NVFPROT.MergedBits.grpFPLS
#define NVFPROT_FPHS _NVFPROT.MergedBits.grpFPHS
#define NVFPROT_FPLS0_MASK 0x01U
#define NVFPROT_FPLS1_MASK 0x02U
#define NVFPROT_FPLDIS_MASK 0x04U
#define NVFPROT_FPHS0_MASK 0x08U
#define NVFPROT_FPHS1_MASK 0x10U
#define NVFPROT_FPHDIS_MASK 0x20U
#define NVFPROT_RNV6_MASK 0x40U
#define NVFPROT_FPOPEN_MASK 0x80U
#define NVFPROT_FPLS_MASK 0x03U
#define NVFPROT_FPLS_BITNUM 0x00U
#define NVFPROT_FPHS_MASK 0x18U
#define NVFPROT_FPHS_BITNUM 0x03U
/*** NVDFPROT - Non Volatile D-Flash Protection Register; 0x0000FF0D ***/
typedef union {
byte Byte;
struct {
byte DPS0 :1; /* D-Flash Protection Size Bit 0 */
byte DPS1 :1; /* D-Flash Protection Size Bit 1 */
byte DPS2 :1; /* D-Flash Protection Size Bit 2 */
byte DPS3 :1; /* D-Flash Protection Size Bit 3 */
byte DPS4 :1; /* D-Flash Protection Size Bit 4 */
byte DPS5 :1; /* D-Flash Protection Size Bit 5 */
byte DPS6 :1; /* D-Flash Protection Size Bit 6 */
byte DPOPEN :1; /* D-Flash Protection Control */
} Bits;
struct {
byte grpDPS :7;
byte :1;
} MergedBits;
} NVDFPROTSTR;
extern volatile NVDFPROTSTR _NVDFPROT @(0x0000FF0D);
#define NVDFPROT _NVDFPROT.Byte
#define NVDFPROT_DPS0 _NVDFPROT.Bits.DPS0
#define NVDFPROT_DPS1 _NVDFPROT.Bits.DPS1
#define NVDFPROT_DPS2 _NVDFPROT.Bits.DPS2
#define NVDFPROT_DPS3 _NVDFPROT.Bits.DPS3
#define NVDFPROT_DPS4 _NVDFPROT.Bits.DPS4
#define NVDFPROT_DPS5 _NVDFPROT.Bits.DPS5
#define NVDFPROT_DPS6 _NVDFPROT.Bits.DPS6
#define NVDFPROT_DPOPEN _NVDFPROT.Bits.DPOPEN
#define NVDFPROT_DPS _NVDFPROT.MergedBits.grpDPS
#define NVDFPROT_DPS0_MASK 0x01U
#define NVDFPROT_DPS1_MASK 0x02U
#define NVDFPROT_DPS2_MASK 0x04U
#define NVDFPROT_DPS3_MASK 0x08U
#define NVDFPROT_DPS4_MASK 0x10U
#define NVDFPROT_DPS5_MASK 0x20U
#define NVDFPROT_DPS6_MASK 0x40U
#define NVDFPROT_DPOPEN_MASK 0x80U
#define NVDFPROT_DPS_MASK 0x7FU
#define NVDFPROT_DPS_BITNUM 0x00U
/*** NVFOPT - Non Volatile Flash Option Register; 0x0000FF0E ***/
typedef union {
byte Byte;
struct {
byte NV0 :1; /* Nonvolatile Bit 0 */
byte NV1 :1; /* Nonvolatile Bit 1 */
byte NV2 :1; /* Nonvolatile Bit 2 */
byte NV3 :1; /* Nonvolatile Bit 3 */
byte NV4 :1; /* Nonvolatile Bit 4 */
byte NV5 :1; /* Nonvolatile Bit 5 */
byte NV6 :1; /* Nonvolatile Bit 6 */
byte NV7 :1; /* Nonvolatile Bit 7 */
} Bits;
} NVFOPTSTR;
extern volatile NVFOPTSTR _NVFOPT @(0x0000FF0E);
#define NVFOPT _NVFOPT.Byte
#define NVFOPT_NV0 _NVFOPT.Bits.NV0
#define NVFOPT_NV1 _NVFOPT.Bits.NV1
#define NVFOPT_NV2 _NVFOPT.Bits.NV2
#define NVFOPT_NV3 _NVFOPT.Bits.NV3
#define NVFOPT_NV4 _NVFOPT.Bits.NV4
#define NVFOPT_NV5 _NVFOPT.Bits.NV5
#define NVFOPT_NV6 _NVFOPT.Bits.NV6
#define NVFOPT_NV7 _NVFOPT.Bits.NV7
#define NVFOPT_NV0_MASK 0x01U
#define NVFOPT_NV1_MASK 0x02U
#define NVFOPT_NV2_MASK 0x04U
#define NVFOPT_NV3_MASK 0x08U
#define NVFOPT_NV4_MASK 0x10U
#define NVFOPT_NV5_MASK 0x20U
#define NVFOPT_NV6_MASK 0x40U
#define NVFOPT_NV7_MASK 0x80U
/*** NVFSEC - Non Volatile Flash Security Register; 0x0000FF0F ***/
typedef union {
byte Byte;
struct {
byte SEC0 :1; /* Flash Security Bit 0 */
byte SEC1 :1; /* Flash Security Bit 1 */
byte RNV2 :1; /* Reserved Nonvolatile Bit 2 */
byte RNV3 :1; /* Reserved Nonvolatile Bit 3 */
byte RNV4 :1; /* Reserved Nonvolatile Bit 4 */
byte RNV5 :1; /* Reserved Nonvolatile Bit 5 */
byte KEYEN0 :1; /* Backdoor Key Security Enable Bit 0 */
byte KEYEN1 :1; /* Backdoor Key Security Enable Bit 1 */
} Bits;
struct {
byte grpSEC :2;
byte grpRNV_2 :4;
byte grpKEYEN :2;
} MergedBits;
} NVFSECSTR;
extern volatile NVFSECSTR _NVFSEC @(0x0000FF0F);
#define NVFSEC _NVFSEC.Byte
#define NVFSEC_SEC0 _NVFSEC.Bits.SEC0
#define NVFSEC_SEC1 _NVFSEC.Bits.SEC1
#define NVFSEC_RNV2 _NVFSEC.Bits.RNV2
#define NVFSEC_RNV3 _NVFSEC.Bits.RNV3
#define NVFSEC_RNV4 _NVFSEC.Bits.RNV4
#define NVFSEC_RNV5 _NVFSEC.Bits.RNV5
#define NVFSEC_KEYEN0 _NVFSEC.Bits.KEYEN0
#define NVFSEC_KEYEN1 _NVFSEC.Bits.KEYEN1
#define NVFSEC_SEC _NVFSEC.MergedBits.grpSEC
#define NVFSEC_RNV_2 _NVFSEC.MergedBits.grpRNV_2
#define NVFSEC_KEYEN _NVFSEC.MergedBits.grpKEYEN
#define NVFSEC_RNV NVFSEC_RNV_2
#define NVFSEC_SEC0_MASK 0x01U
#define NVFSEC_SEC1_MASK 0x02U
#define NVFSEC_RNV2_MASK 0x04U
#define NVFSEC_RNV3_MASK 0x08U
#define NVFSEC_RNV4_MASK 0x10U
#define NVFSEC_RNV5_MASK 0x20U
#define NVFSEC_KEYEN0_MASK 0x40U
#define NVFSEC_KEYEN1_MASK 0x80U
#define NVFSEC_SEC_MASK 0x03U
#define NVFSEC_SEC_BITNUM 0x00U
#define NVFSEC_RNV_2_MASK 0x3CU
#define NVFSEC_RNV_2_BITNUM 0x02U
#define NVFSEC_KEYEN_MASK 0xC0U
#define NVFSEC_KEYEN_BITNUM 0x06U
/* Watchdog reset macro */
#ifndef __RESET_WATCHDOG
#ifdef _lint
#define __RESET_WATCHDOG() /* empty */
#else
#define __RESET_WATCHDOG() (void)(CPMUARMCOP = 0x55U, CPMUARMCOP = 0xAAU)
#endif
#endif /* __RESET_WATCHDOG */
#ifndef __V30COMPATIBLE__
#pragma OPTION DEL V30toV31Compatible
#endif
/*lint -restore +esym(961,18.4) Enable MISRA rule (1.1,18.4,6.4) checking. */
#endif
/*
** ###################################################################
**
** This file was created by Processor Expert 3.05 [04.46]
** for the Freescale HCS12 series of microcontrollers.
**
** ###################################################################
*/
|
apache-2.0
|
nghiant2710/base-images
|
balena-base-images/golang/jetson-nano-2gb-devkit/fedora/33/1.16.3/build/Dockerfile
|
2005
|
# AUTOGENERATED FILE
FROM balenalib/jetson-nano-2gb-devkit-fedora:33-build
ENV GO_VERSION 1.16.3
RUN mkdir -p /usr/local/go \
&& curl -SLO "https://storage.googleapis.com/golang/go$GO_VERSION.linux-arm64.tar.gz" \
&& echo "f4e96bbcd5d2d1942f5b55d9e4ab19564da4fad192012f6d7b0b9b055ba4208f go$GO_VERSION.linux-arm64.tar.gz" | sha256sum -c - \
&& tar -xzf "go$GO_VERSION.linux-arm64.tar.gz" -C /usr/local/go --strip-components=1 \
&& rm -f go$GO_VERSION.linux-arm64.tar.gz
ENV GOROOT /usr/local/go
ENV GOPATH /go
ENV PATH $GOPATH/bin:/usr/local/go/bin:$PATH
RUN mkdir -p "$GOPATH/src" "$GOPATH/bin" && chmod -R 777 "$GOPATH"
WORKDIR $GOPATH
CMD ["echo","'No CMD command was set in Dockerfile! Details about CMD command could be found in Dockerfile Guide section in our Docs. Here's the link: https://balena.io/docs"]
RUN curl -SLO "https://raw.githubusercontent.com/balena-io-library/base-images/8accad6af708fca7271c5c65f18a86782e19f877/scripts/assets/tests/[email protected]" \
&& echo "Running test-stack@golang" \
&& chmod +x [email protected] \
&& bash [email protected] \
&& rm -rf [email protected]
RUN [ ! -d /.balena/messages ] && mkdir -p /.balena/messages; echo $'Here are a few details about this Docker image (For more information please visit https://www.balena.io/docs/reference/base-images/base-images/): \nArchitecture: ARM v8 \nOS: Fedora 33 \nVariant: build variant \nDefault variable(s): UDEV=off \nThe following software stack is preinstalled: \nGo v1.16.3 \nExtra features: \n- Easy way to install packages with `install_packages <package-name>` command \n- Run anywhere with cross-build feature (for ARM only) \n- Keep the container idling with `balena-idle` command \n- Show base image details with `balena-info` command' > /.balena/messages/image-info
RUN echo $'#!/bin/sh.real\nbalena-info\nrm -f /bin/sh\ncp /bin/sh.real /bin/sh\n/bin/sh "$@"' > /bin/sh-shim \
&& chmod +x /bin/sh-shim \
&& cp /bin/sh /bin/sh.real \
&& mv /bin/sh-shim /bin/sh
|
apache-2.0
|
nghiant2710/base-images
|
balena-base-images/python/surface-pro-6/fedora/31/3.9.1/build/Dockerfile
|
2455
|
# AUTOGENERATED FILE
FROM balenalib/surface-pro-6-fedora:31-build
# http://bugs.python.org/issue19846
# > At the moment, setting "LANG=C" on a Linux system *fundamentally breaks Python 3*, and that's not OK.
ENV LANG C.UTF-8
RUN dnf install -y \
python3-pip \
python3-dbus \
&& dnf clean all
# install "virtualenv", since the vast majority of users of this image will want it
RUN pip3 install -U --no-cache-dir --ignore-installed pip setuptools \
&& pip3 install --no-cache-dir virtualenv
RUN [ ! -d /.balena/messages ] && mkdir -p /.balena/messages; echo $'As of January 1st, 2020, Python 2 was end-of-life, we will change the latest tag for Balenalib Python base image to Python 3.x and drop support for Python 2 soon. So after 1st July, 2020, all the balenalib Python latest tag will point to the latest Python 3 version and no changes, or fixes will be made to balenalib Python 2 base image. If you are using Python 2 for your application, please upgrade to Python 3 before 1st July.' > /.balena/messages/python-deprecation-warning
CMD ["echo","'No CMD command was set in Dockerfile! Details about CMD command could be found in Dockerfile Guide section in our Docs. Here's the link: https://balena.io/docs"]
RUN curl -SLO "https://raw.githubusercontent.com/balena-io-library/base-images/8accad6af708fca7271c5c65f18a86782e19f877/scripts/assets/tests/[email protected]" \
&& echo "Running test-stack@python" \
&& chmod +x [email protected] \
&& bash [email protected] \
&& rm -rf [email protected]
RUN [ ! -d /.balena/messages ] && mkdir -p /.balena/messages; echo $'Here are a few details about this Docker image (For more information please visit https://www.balena.io/docs/reference/base-images/base-images/): \nArchitecture: Intel 64-bit (x86-64) \nOS: Fedora 31 \nVariant: build variant \nDefault variable(s): UDEV=off \nThe following software stack is preinstalled: \nPython v3.9.1, Pip v20.3.1, Setuptools v51.0.0 \nExtra features: \n- Easy way to install packages with `install_packages <package-name>` command \n- Run anywhere with cross-build feature (for ARM only) \n- Keep the container idling with `balena-idle` command \n- Show base image details with `balena-info` command' > /.balena/messages/image-info
RUN echo $'#!/bin/sh.real\nbalena-info\nrm -f /bin/sh\ncp /bin/sh.real /bin/sh\n/bin/sh "$@"' > /bin/sh-shim \
&& chmod +x /bin/sh-shim \
&& cp /bin/sh /bin/sh.real \
&& mv /bin/sh-shim /bin/sh
|
apache-2.0
|
mdoering/backbone
|
life/Plantae/Magnoliophyta/Magnoliopsida/Asterales/Asteraceae/Jacobaea/Jacobaea paludosa/Senecio paludosus paludosus/README.md
|
174
|
# Senecio paludosus var. paludosus VARIETY
#### Status
ACCEPTED
#### According to
NUB Generator [autonym]
#### Published in
null
#### Original name
null
### Remarks
null
|
apache-2.0
|
ArvinDevel/incubator-pulsar
|
site2/docs/getting-started-docker.md
|
4656
|
---
id: standalone-docker
title: Start a standalone cluster with Docker
sidebar_label: Pulsar in Docker
---
For the purposes of local development and testing, you can run Pulsar in standalone
mode on your own machine within a Docker container.
If you don't have Docker installed, you can download the [Community edition](https://www.docker.com/community-edition)
and follow the instructions for your OS.
## Starting Pulsar inside Docker
```shell
$ docker run -it \
-p 6650:6650 \
-p 8080:8080 \
-v $PWD/data:/pulsar/data \
apachepulsar/pulsar:{{pulsar:version}} \
bin/pulsar standalone
```
A few things to note about this command:
* `-v $PWD/data:/pulsar/data`: This will make the process inside the container to store the
data and metadata in the filesystem outside the container, in order to not start "fresh" every
time the container is restarted.
If Pulsar has been successfully started, you should see `INFO`-level log messages like this:
```
2017-08-09 22:34:04,030 - INFO - [main:WebService@213] - Web Service started at http://127.0.0.1:8080
2017-08-09 22:34:04,038 - INFO - [main:PulsarService@335] - messaging service is ready, bootstrap service on port=8080, broker url=pulsar://127.0.0.1:6650, cluster=standalone, configs=org.apache.pulsar.broker.ServiceConfiguration@4db60246
...
```
> #### Automatically created namespace
> When you start a local standalone cluster, Pulsar will automatically create a `public/default`
namespace that you can use for development purposes. All Pulsar topics are managed within namespaces.
For more info, see [Topics](concepts-messaging.md#topics).
## Start publishing and consuming messages
Pulsar currently offers client libraries for [Java](client-libraries-java.md), [Go](client-libraries-go.md), [Python](client-libraries-python.md)
and [C++](client-libraries-cpp.md). If you're running a local standalone cluster, you can
use one of these root URLs for interacting with your cluster:
* `pulsar://localhost:6650`
* `http://localhost:8080`
Here's an example that lets you quickly get started with Pulsar by using the [Python](client-libraries-python.md)
client API.
You can install the Pulsar Python client library directly from [PyPI](https://pypi.org/project/pulsar-client/):
```shell
$ pip install pulsar-client
```
First create a consumer and subscribe to the topic:
```python
import pulsar
client = pulsar.Client('pulsar://localhost:6650')
consumer = client.subscribe('my-topic',
subscription_name='my-sub')
while True:
msg = consumer.receive()
print("Received message: '%s'" % msg.data())
consumer.acknowledge(msg)
client.close()
```
Now we can start a producer to send some test messages:
```python
import pulsar
client = pulsar.Client('pulsar://localhost:6650')
producer = client.create_producer('my-topic')
for i in range(10):
producer.send(('hello-pulsar-%d' % i).encode('utf-8'))
client.close()
```
## Get the topic statistics
In Pulsar you can use REST, Java, or command-line tools to control every aspect of the system.
You can find detailed documentation of all the APIs in the [Admin API Overview](admin-api-overview.md).
In the simplest example, you can use curl to probe the stats for a particular topic:
```shell
$ curl http://localhost:8080/admin/v2/persistent/public/default/my-topic/stats | python -m json.tool
```
The output will be something like this:
```json
{
"averageMsgSize": 0.0,
"msgRateIn": 0.0,
"msgRateOut": 0.0,
"msgThroughputIn": 0.0,
"msgThroughputOut": 0.0,
"publishers": [
{
"address": "/172.17.0.1:35048",
"averageMsgSize": 0.0,
"clientVersion": "1.19.0-incubating",
"connectedSince": "2017-08-09 20:59:34.621+0000",
"msgRateIn": 0.0,
"msgThroughputIn": 0.0,
"producerId": 0,
"producerName": "standalone-0-1"
}
],
"replication": {},
"storageSize": 16,
"subscriptions": {
"my-sub": {
"blockedSubscriptionOnUnackedMsgs": false,
"consumers": [
{
"address": "/172.17.0.1:35064",
"availablePermits": 996,
"blockedConsumerOnUnackedMsgs": false,
"clientVersion": "1.19.0-incubating",
"connectedSince": "2017-08-09 21:05:39.222+0000",
"consumerName": "166111",
"msgRateOut": 0.0,
"msgRateRedeliver": 0.0,
"msgThroughputOut": 0.0,
"unackedMessages": 0
}
],
"msgBacklog": 0,
"msgRateExpired": 0.0,
"msgRateOut": 0.0,
"msgRateRedeliver": 0.0,
"msgThroughputOut": 0.0,
"type": "Exclusive",
"unackedMessages": 0
}
}
}
```
|
apache-2.0
|
muchanem/client-website
|
www/assests/md/example.html
|
480
|
<html><head><link rel="stylesheet" type="text/css" href="assests/css/animsition.min.css"/><link rel="stylesheet" type="text/css" href="assests/css/bootstrap.min.css"/><link rel="stylesheet" type="text/css" href="assests/css/main.css"/><script src="assests/plugins/animsition.min.js"></script><script src="assests/js/bootstrap.min.js"></script><script src="assests/js/jquery.min.js"></script><script src="assests/js/main.js"></script><title>Kagwe</title></head><body></body></html>
|
apache-2.0
|
edgar615/javase-study
|
netty-study/src/main/java/echo/EchoServer.java
|
1712
|
package echo;
import io.netty.bootstrap.ServerBootstrap;
import io.netty.channel.ChannelFuture;
import io.netty.channel.ChannelInitializer;
import io.netty.channel.EventLoopGroup;
import io.netty.channel.nio.NioEventLoopGroup;
import io.netty.channel.socket.SocketChannel;
import io.netty.channel.socket.nio.NioServerSocketChannel;
/**
* Created by Administrator on 2014/12/30.
*/
public class EchoServer {
private int port;
public EchoServer(int port) {
this.port = port;
}
public void run() throws InterruptedException {
EventLoopGroup bossGroup = new NioEventLoopGroup();
EventLoopGroup workerGroup = new NioEventLoopGroup();
try {
ServerBootstrap bootstrap = new ServerBootstrap();
bootstrap.group(bossGroup, workerGroup)
.localAddress(port)
.channel(NioServerSocketChannel.class)
.childHandler(new ChannelInitializer<SocketChannel>() {
@Override
protected void initChannel(SocketChannel ch) throws Exception {
ch.pipeline().addLast(new EchoServerHandler());
}
});
ChannelFuture cf = bootstrap.bind().sync();
cf.channel().closeFuture().sync();
} finally {
workerGroup.shutdownGracefully();
bossGroup.shutdownGracefully();
}
}
public static void main(String[] args) throws Exception {
int port;
if (args.length > 0) {
port = Integer.parseInt(args[0]);
} else {
port = 8080;
}
new EchoServer(port).run();
}
}
|
apache-2.0
|
jpsacheti/limasoftware-java-suporte
|
src/main/java/br/edu/fema/sacheti/intercept/ClienteInfo.java
|
691
|
package br.edu.fema.sacheti.intercept;
import java.io.Serializable;
import javax.enterprise.context.SessionScoped;
import javax.inject.Named;
import br.edu.fema.sacheti.model.Cliente;
import br.edu.fema.sacheti.model.Usuario;
@SessionScoped
@Named
public class ClienteInfo implements Serializable{
private static final long serialVersionUID = 6078821766905465970L;
private Cliente cliente;
private Usuario usuario;
public void login(Cliente cliente){
this.cliente = cliente;
this.usuario = cliente.getUsuario();
}
public void logout(){
this.usuario = null;
}
public Usuario getUsuario() {
return usuario;
}
public Cliente getCliente(){
return cliente;
}
}
|
apache-2.0
|
minthubk/tankz
|
gushiku-common/src/com/gushikustudios/common/TextEntry.java
|
1449
|
package com.gushikustudios.common;
import com.badlogic.gdx.graphics.Color;
import com.badlogic.gdx.scenes.scene2d.ui.Align;
import com.badlogic.gdx.scenes.scene2d.ui.Button;
import com.badlogic.gdx.scenes.scene2d.ui.Label;
import com.badlogic.gdx.scenes.scene2d.ui.Label.LabelStyle;
public class TextEntry extends Button
{
public TextEntry(String string,Color textColor,Color bgColor,boolean center)
{
super(Assets.mSkin.getStyle("default-round-white", ButtonStyle.class));
Label label;
this.touchable = false;
this.color.set(bgColor);
this.add(label = new Label(string,Assets.mSkin.getStyle("default-white",LabelStyle.class))).fill().expandX();
label.setWrap(true);
if (center)
{
label.setAlignment(Align.CENTER);
}
label.setColor(textColor);
}
public TextEntry(String [] string,Color [] textColor,Color bgColor,boolean center)
{
super(Assets.mSkin.getStyle("default-round-white", ButtonStyle.class));
Label label;
this.touchable = false;
this.color.set(bgColor);
for (int j = 0; j < string.length; j++)
{
this.row();
this.add(label = new Label(string[j],Assets.mSkin.getStyle("default-white",LabelStyle.class))).fill().expandX();
label.setWrap(true);
if (center)
{
label.setAlignment(Align.CENTER);
}
label.setColor(textColor[j]);
}
}
}
|
apache-2.0
|
googleapis/python-aiplatform
|
samples/generated_samples/aiplatform_generated_aiplatform_v1_tensorboard_service_update_tensorboard_async.py
|
1730
|
# -*- coding: utf-8 -*-
# Copyright 2020 Google LLC
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# Generated code. DO NOT EDIT!
#
# Snippet for UpdateTensorboard
# NOTE: This snippet has been automatically generated for illustrative purposes only.
# It may require modifications to work in your environment.
# To install the latest published package dependency, execute the following:
# python3 -m pip install google-cloud-aiplatform
# [START aiplatform_generated_aiplatform_v1_TensorboardService_UpdateTensorboard_async]
from google.cloud import aiplatform_v1
async def sample_update_tensorboard():
# Create a client
client = aiplatform_v1.TensorboardServiceAsyncClient()
# Initialize request argument(s)
tensorboard = aiplatform_v1.Tensorboard()
tensorboard.display_name = "display_name_value"
request = aiplatform_v1.UpdateTensorboardRequest(
tensorboard=tensorboard,
)
# Make the request
operation = client.update_tensorboard(request=request)
print("Waiting for operation to complete...")
response = await operation.result()
# Handle the response
print(response)
# [END aiplatform_generated_aiplatform_v1_TensorboardService_UpdateTensorboard_async]
|
apache-2.0
|
ben-ng/swift
|
lib/Basic/DiagnosticConsumer.cpp
|
1355
|
//===--- DiagnosticConsumer.cpp - Diagnostic Consumer Impl ----------------===//
//
// This source file is part of the Swift.org open source project
//
// Copyright (c) 2014 - 2016 Apple Inc. and the Swift project authors
// Licensed under Apache License v2.0 with Runtime Library Exception
//
// See https://swift.org/LICENSE.txt for license information
// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
//
//===----------------------------------------------------------------------===//
//
// This file implements the DiagnosticConsumer class.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "swift-basic"
#include "swift/Basic/DiagnosticConsumer.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
using namespace swift;
DiagnosticConsumer::~DiagnosticConsumer() { }
void NullDiagnosticConsumer::handleDiagnostic(SourceManager &SM,
SourceLoc Loc,
DiagnosticKind Kind,
StringRef Text,
const DiagnosticInfo &Info) {
DEBUG(llvm::dbgs() << "NullDiagnosticConsumer received diagnostic: "
<< Text << "\n");
}
|
apache-2.0
|
peter-mount/departureboards
|
src/contactUs/ContactUs.js
|
1184
|
import React, {Component} from 'react';
import {withRouter} from 'react-router';
import EUCookie from "area51-eucookie";
import Navigation from '../Navigation';
class About extends Component {
render() {
return (<div>
<Navigation page="contactUs"/>
<EUCookie/>
<div className="App-header">
<h1>Contact Us</h1>
</div>
<div className="App-intro">
<p>A contact form will appear here in the near future.</p>
<p>Currently you can contact us via:</p>
<ul>
<li>Twitter:
<ul>
<li><a href="http://twitter.com/TrainWatch">@Trainwatch</a></li>
<li><a href="http://twitter.com/peter_mount">@Peter_Mount</a></li>
</ul>
</li>
</ul>
<p>
Any issues can be reported on <a
href="https://github.com/peter-mount/departureboards/issues">GitHub</a>.
</p>
</div>
</div>);
}
}
export default withRouter(About);
|
apache-2.0
|
drinkjava2/jSQLBox
|
core/src/test/java/com/github/drinkjava2/jsqlbox/function/gtx/GtxShardDbTest.java
|
3818
|
package com.github.drinkjava2.jsqlbox.function.gtx;
import java.util.Random;
import javax.sql.DataSource;
import org.junit.Assert;
import org.junit.Before;
import org.junit.Test;
import com.github.drinkjava2.jdialects.annotation.jdia.ShardDatabase;
import com.github.drinkjava2.jdialects.annotation.jpa.Id;
import com.github.drinkjava2.jsqlbox.ActiveRecord;
import com.github.drinkjava2.jsqlbox.DbContext;
import com.github.drinkjava2.jsqlbox.gtx.GtxConnectionManager;
import com.github.drinkjava2.jsqlbox.gtx.GtxId;
import com.github.drinkjava2.jsqlbox.gtx.GtxLock;
import com.github.drinkjava2.jsqlbox.gtx.GtxTag;
import com.github.drinkjava2.jsqlbox.gtx.GtxUnlockServ;
import com.github.drinkjava2.jtransactions.TxResult;
import com.zaxxer.hikari.HikariDataSource;
/**
* Global TX Test for shard DB(database)
*
* @author Yong Zhu
* @since 2.0.7
*/
public class GtxShardDbTest {
DbContext[] ctx = new DbContext[3];
private static DataSource newTestDataSource() {
HikariDataSource ds = new HikariDataSource();
ds.setDriverClassName("org.h2.Driver");
ds.setJdbcUrl("jdbc:h2:mem:" + new Random().nextLong() // random h2 ds name
+ ";MODE=MYSQL;DB_CLOSE_DELAY=-1;TRACE_LEVEL_SYSTEM_OUT=0");
ds.setUsername("sa");
ds.setPassword("");
return ds;
}
@Before
public void init() {
DbContext.resetGlobalVariants();
DbContext lock = new DbContext(newTestDataSource());
lock.setName("lock");
lock.executeDDL(lock.toCreateDDL(GtxId.class));
lock.executeDDL(lock.toCreateDDL(GtxLock.class));
lock.executeDDL(lock.toCreateGtxLogDDL(DemoUsr.class));
GtxConnectionManager lockCM = new GtxConnectionManager(lock);
for (int i = 0; i < 3; i++) {
ctx[i] = new DbContext(newTestDataSource());
ctx[i].setName("db");
ctx[i].setDbCode(i);
ctx[i].setConnectionManager(lockCM);
ctx[i].setMasters(ctx);
ctx[i].executeDDL(ctx[i].toCreateDDL(GtxTag.class));
ctx[i].executeDDL(ctx[i].toCreateDDL(DemoUsr.class));
}
DbContext.setGlobalDbContext(ctx[0]);// the default ctx
}
@Test
public void commitTest() {
ctx[0].startTrans();
try {
new DemoUsr().setId(0).insert(); // db0
new DemoUsr().setId(1).insert(); // db1
new DemoUsr().setId(4).insert(); // db1
new DemoUsr().setId(2).insert(); // db2
Assert.assertEquals(1, ctx[0].entityCount(DemoUsr.class));
Assert.assertEquals(2, ctx[1].entityCount(DemoUsr.class));
Assert.assertEquals(1, ctx[2].entityCount(DemoUsr.class));
ctx[0].commitTrans();
} catch (Exception e) {
//e.printStackTrace();
ctx[0].rollbackTrans();
}
Assert.assertEquals(1, ctx[0].entityCount(DemoUsr.class));
Assert.assertEquals(2, ctx[1].entityCount(DemoUsr.class));
Assert.assertEquals(1, ctx[2].entityCount(DemoUsr.class));
}
@Test
public void commitFailTest() {
ctx[0].startTrans();
try {
new DemoUsr().setId(0).insert(); // db0
new DemoUsr().setId(1).insert(); // db1
new DemoUsr().setId(4).insert(); // db1
new DemoUsr().setId(2).insert(); // db2
ctx[2].setForceCommitFail(); // force db2 commit fail
ctx[0].commitTrans(); // exception will throw
} catch (Exception e) {
TxResult result = ctx[0].rollbackTrans();
GtxUnlockServ.forceUnlock(ctx[0], result);// Force unlock for unit test only
}
Assert.assertEquals(0, ctx[0].entityCount(DemoUsr.class));
Assert.assertEquals(0, ctx[1].entityCount(DemoUsr.class));
Assert.assertEquals(0, ctx[2].entityCount(DemoUsr.class));
}
public static class DemoUsr extends ActiveRecord<DemoUsr> {
@Id
@ShardDatabase({ "MOD", "3" })
Integer id;
String name;
public Integer getId() {
return id;
}
public DemoUsr setId(Integer id) {
this.id = id;
return this;
}
public String getName() {
return name;
}
public DemoUsr setName(String name) {
this.name = name;
return this;
}
}
}
|
apache-2.0
|
Kunnapat/chowtime
|
quiz2.php
|
4848
|
<?php
session_start();
// include "check-user.php";
include "connection.php";
if (isset($_REQUEST['quiz_id'])) {
$quiz_id = $_REQUEST['quiz_id'];
}else{
$quiz_id = 1;
}
$sql = "SELECT COUNT(*) FROM questions WHERE quiz_id=$quiz_id";
$result = mysqli_query($link, $sql);
if(mysqli_num_rows($result) == 0) {
mysqli_close($link);
exit;
}else{
$amount = 3;
}
?>
<html>
<head>
<meta charset="utf-8">
<meta http-equiv="X-UA-Compatible" content="IE=edge">
<meta name="viewport" content="width=device-width, initial-scale=1">
<meta name="description" content="">
<meta name="author" content="">
<title>Quiz</title>
<!-- Bootstrap Core CSS -->
<link rel="stylesheet" href="css/bootstrap.min.css" type="text/css">
<!--Custom CSS-->
<link rel="stylesheet" href="css/quiz2.css" type="text/css">
</head>
<body>
<div class="container-fluid">
<div class="row top">
<?php
$begin = 1; //แถวเริ่มต้นในการอ่านข้อมูล
if($_GET['begin']) {
$begin = $_GET['begin'];
}
$length = 1; //จำนวนคำถามในการอ่านข้อมูลแต่ละช่วง
if($_GET['length']) {
$length = $_GET['length'];
}
if($begin==1){
$_SESSION[score] = 0;
// echo $_SESSION['score'];
}
$begin--; //ลำดับแถวใน MySQL เริ่มจาก 0
$sql = "SELECT * FROM questions WHERE quiz_id = $quiz_id LIMIT $begin, $length";
$result = mysqli_query($link, $sql);
$num = $begin + 1;
while($data = mysqli_fetch_array($result)) {
$question_text = $data['content'];
$question_id = $data['question_id'];
$sql = "SELECT * FROM choices WHERE question_id = $question_id ORDER BY choice_id ASC";
$r = mysqli_query($link, $sql);
echo "<div class='col-xs-1 col-md-2 header'>Q".$num."/".$amount."</div>";
echo "<div class='col-xs-10 col-md-8' id='question'>".$question_text."</div>";
echo "<div class='col-xs-1 col-md-2 header'>".$_SESSION['score']."</div>";
echo '</div>';
while($ch = mysqli_fetch_array($r)) {
if(isset($_SESSION['user_id'])) {
$user_id = $_SESSION['user_id'];
$sql = "SELECT choice_id FROM choices WHERE question_id = $question_id"; //AND subject_id = $subject_id
$choose = mysqli_query($link, $sql);
$row = mysqli_fetch_array($choose);
$id = $row[0];
}
// echo "<div class=\"choice\">{$ch['content']}</div><br>";
echo "<div class='bottom'><button class='row choice' onclick='nextques({$ch['content']})'>{$ch['content']}</button></div>";
}
$num++;
}
$ansSQL = "SELECT content FROM choices WHERE is_correct=1 AND question_id=$question_id";
$rs3 = mysqli_query($link,$ansSQL);
$correctAns = mysqli_fetch_array($rs3);
?>
<script>
function nextques(selected){
// alert("yay");
var url = "quiz2.php?quiz_id=" + <?php echo $quiz_id; ?>;
var begin = <?php echo $begin; ?>;
begin += 2;
url = url + "&begin=" + begin + "&length=1";
var correct = <?php echo $correctAns[0]; ?>;
var amount = <?php echo $amount; ?>;
var endgame = <?php echo $begin; ?>;
if(selected==correct){
$.ajax({
type: "POST",
url: "updatescore.php",
data: {}
}).done(function( msg ) {
// alert( "Update: " + msg );
// alert(msg);
});
}else{
alert("CORRECT answer is " + correct);
}
if((endgame+1)==amount){
url = "quizresult.php";
}
location.href = url;
}
</script>
<script src="js/jquery.js"></script>
<!-- Bootstrap Core JavaScript -->
<script src="js/bootstrap.min.js"></script>
</body>
</html>
|
apache-2.0
|
umitmertcakmak/PySpyder
|
scrappers/devTest.py
|
31
|
# This file is for dev branch
|
apache-2.0
|
chrishumphreys/provocateur
|
provocateur-thirdparty/src/main/java/org/targettest/org/apache/lucene/index/CheckIndex.java
|
32685
|
package org.targettest.org.apache.lucene.index;
/**
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The ASF licenses this file to You under the Apache License, Version 2.0
* (the "License"); you may not use this file except in compliance with
* the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
import org.targettest.org.apache.lucene.document.AbstractField;
import org.targettest.org.apache.lucene.document.Document;
import org.targettest.org.apache.lucene.store.Directory;
import org.targettest.org.apache.lucene.store.FSDirectory;
import org.targettest.org.apache.lucene.store.IndexInput;
import java.text.NumberFormat;
import java.io.PrintStream;
import java.io.IOException;
import java.io.File;
import java.util.Collection;
import java.util.List;
import java.util.ArrayList;
import java.util.Map;
/**
* Basic tool and API to check the health of an index and
* write a new segments file that removes reference to
* problematic segments.
*
* <p>As this tool checks every byte in the index, on a large
* index it can take quite a long time to run.
*
* <p><b>WARNING</b>: this tool and API is new and
* experimental and is subject to suddenly change in the
* next release. Please make a complete backup of your
* index before using this to fix your index!
*/
public class CheckIndex {
private PrintStream infoStream;
private Directory dir;
/**
* Returned from {@link #checkIndex()} detailing the health and status of the index.
*
* <p><b>WARNING</b>: this API is new and experimental and is
* subject to suddenly change in the next release.
**/
public static class Status {
/** True if no problems were found with the index. */
public boolean clean;
/** True if we were unable to locate and load the segments_N file. */
public boolean missingSegments;
/** True if we were unable to open the segments_N file. */
public boolean cantOpenSegments;
/** True if we were unable to read the version number from segments_N file. */
public boolean missingSegmentVersion;
/** Name of latest segments_N file in the index. */
public String segmentsFileName;
/** Number of segments in the index. */
public int numSegments;
/** String description of the version of the index. */
public String segmentFormat;
/** Empty unless you passed specific segments list to check as optional 3rd argument.
* @see CheckIndex#checkIndex(List) */
public List<String> segmentsChecked = new ArrayList<String>();
/** True if the index was created with a newer version of Lucene than the CheckIndex tool. */
public boolean toolOutOfDate;
/** List of {@link SegmentInfoStatus} instances, detailing status of each segment. */
public List<SegmentInfoStatus> segmentInfos = new ArrayList<SegmentInfoStatus>();
/** Directory index is in. */
public Directory dir;
/**
* SegmentInfos instance containing only segments that
* had no problems (this is used with the {@link CheckIndex#fixIndex}
* method to repair the index.
*/
SegmentInfos newSegments;
/** How many documents will be lost to bad segments. */
public int totLoseDocCount;
/** How many bad segments were found. */
public int numBadSegments;
/** True if we checked only specific segments ({@link
* #checkIndex(List)}) was called with non-null
* argument). */
public boolean partial;
/** Holds the userData of the last commit in the index */
public Map<String, String> userData;
/** Holds the status of each segment in the index.
* See {@link #segmentInfos}.
*
* <p><b>WARNING</b>: this API is new and experimental and is
* subject to suddenly change in the next release.
*/
public static class SegmentInfoStatus {
/** Name of the segment. */
public String name;
/** Document count (does not take deletions into account). */
public int docCount;
/** True if segment is compound file format. */
public boolean compound;
/** Number of files referenced by this segment. */
public int numFiles;
/** Net size (MB) of the files referenced by this
* segment. */
public double sizeMB;
/** Doc store offset, if this segment shares the doc
* store files (stored fields and term vectors) with
* other segments. This is -1 if it does not share. */
public int docStoreOffset = -1;
/** String of the shared doc store segment, or null if
* this segment does not share the doc store files. */
public String docStoreSegment;
/** True if the shared doc store files are compound file
* format. */
public boolean docStoreCompoundFile;
/** True if this segment has pending deletions. */
public boolean hasDeletions;
/** Name of the current deletions file name. */
public String deletionsFileName;
/** Number of deleted documents. */
public int numDeleted;
/** True if we were able to open a SegmentReader on this
* segment. */
public boolean openReaderPassed;
/** Number of fields in this segment. */
int numFields;
/** True if at least one of the fields in this segment
* does not omitTermFreqAndPositions.
* @see AbstractField#setOmitTermFreqAndPositions */
public boolean hasProx;
/** Map that includes certain
* debugging details that IndexWriter records into
* each segment it creates */
public Map<String,String> diagnostics;
/** Status for testing of field norms (null if field norms could not be tested). */
public FieldNormStatus fieldNormStatus;
/** Status for testing of indexed terms (null if indexed terms could not be tested). */
public TermIndexStatus termIndexStatus;
/** Status for testing of stored fields (null if stored fields could not be tested). */
public StoredFieldStatus storedFieldStatus;
/** Status for testing of term vectors (null if term vectors could not be tested). */
public TermVectorStatus termVectorStatus;
}
/**
* Status from testing field norms.
*/
public static final class FieldNormStatus {
/** Number of fields successfully tested */
public long totFields = 0L;
/** Exception thrown during term index test (null on success) */
public Throwable error = null;
}
/**
* Status from testing term index.
*/
public static final class TermIndexStatus {
/** Total term count */
public long termCount = 0L;
/** Total frequency across all terms. */
public long totFreq = 0L;
/** Total number of positions. */
public long totPos = 0L;
/** Exception thrown during term index test (null on success) */
public Throwable error = null;
}
/**
* Status from testing stored fields.
*/
public static final class StoredFieldStatus {
/** Number of documents tested. */
public int docCount = 0;
/** Total number of stored fields tested. */
public long totFields = 0;
/** Exception thrown during stored fields test (null on success) */
public Throwable error = null;
}
/**
* Status from testing stored fields.
*/
public static final class TermVectorStatus {
/** Number of documents tested. */
public int docCount = 0;
/** Total number of term vectors tested. */
public long totVectors = 0;
/** Exception thrown during term vector test (null on success) */
public Throwable error = null;
}
}
/** Create a new CheckIndex on the directory. */
public CheckIndex(Directory dir) {
this.dir = dir;
infoStream = null;
}
/** Set infoStream where messages should go. If null, no
* messages are printed */
public void setInfoStream(PrintStream out) {
infoStream = out;
}
private void msg(String msg) {
if (infoStream != null)
infoStream.println(msg);
}
private static class MySegmentTermDocs extends SegmentTermDocs {
int delCount;
MySegmentTermDocs(SegmentReader p) {
super(p);
}
@Override
public void seek(Term term) throws IOException {
super.seek(term);
delCount = 0;
}
@Override
protected void skippingDoc() throws IOException {
delCount++;
}
}
/** Returns a {@link Status} instance detailing
* the state of the index.
*
* <p>As this method checks every byte in the index, on a large
* index it can take quite a long time to run.
*
* <p><b>WARNING</b>: make sure
* you only call this when the index is not opened by any
* writer. */
public Status checkIndex() throws IOException {
return checkIndex(null);
}
/** Returns a {@link Status} instance detailing
* the state of the index.
*
* @param onlySegments list of specific segment names to check
*
* <p>As this method checks every byte in the specified
* segments, on a large index it can take quite a long
* time to run.
*
* <p><b>WARNING</b>: make sure
* you only call this when the index is not opened by any
* writer. */
public Status checkIndex(List<String> onlySegments) throws IOException {
NumberFormat nf = NumberFormat.getInstance();
SegmentInfos sis = new SegmentInfos();
Status result = new Status();
result.dir = dir;
try {
sis.read(dir);
} catch (Throwable t) {
msg("ERROR: could not read any segments file in directory");
result.missingSegments = true;
if (infoStream != null)
t.printStackTrace(infoStream);
return result;
}
final int numSegments = sis.size();
final String segmentsFileName = sis.getCurrentSegmentFileName();
IndexInput input = null;
try {
input = dir.openInput(segmentsFileName);
} catch (Throwable t) {
msg("ERROR: could not open segments file in directory");
if (infoStream != null)
t.printStackTrace(infoStream);
result.cantOpenSegments = true;
return result;
}
int format = 0;
try {
format = input.readInt();
} catch (Throwable t) {
msg("ERROR: could not read segment file version in directory");
if (infoStream != null)
t.printStackTrace(infoStream);
result.missingSegmentVersion = true;
return result;
} finally {
if (input != null)
input.close();
}
String sFormat = "";
boolean skip = false;
if (format == SegmentInfos.FORMAT)
sFormat = "FORMAT [Lucene Pre-2.1]";
if (format == SegmentInfos.FORMAT_LOCKLESS)
sFormat = "FORMAT_LOCKLESS [Lucene 2.1]";
else if (format == SegmentInfos.FORMAT_SINGLE_NORM_FILE)
sFormat = "FORMAT_SINGLE_NORM_FILE [Lucene 2.2]";
else if (format == SegmentInfos.FORMAT_SHARED_DOC_STORE)
sFormat = "FORMAT_SHARED_DOC_STORE [Lucene 2.3]";
else {
if (format == SegmentInfos.FORMAT_CHECKSUM)
sFormat = "FORMAT_CHECKSUM [Lucene 2.4]";
else if (format == SegmentInfos.FORMAT_DEL_COUNT)
sFormat = "FORMAT_DEL_COUNT [Lucene 2.4]";
else if (format == SegmentInfos.FORMAT_HAS_PROX)
sFormat = "FORMAT_HAS_PROX [Lucene 2.4]";
else if (format == SegmentInfos.FORMAT_USER_DATA)
sFormat = "FORMAT_USER_DATA [Lucene 2.9]";
else if (format == SegmentInfos.FORMAT_DIAGNOSTICS)
sFormat = "FORMAT_DIAGNOSTICS [Lucene 2.9]";
else if (format < SegmentInfos.CURRENT_FORMAT) {
sFormat = "int=" + format + " [newer version of Lucene than this tool]";
skip = true;
} else {
sFormat = format + " [Lucene 1.3 or prior]";
}
}
result.segmentsFileName = segmentsFileName;
result.numSegments = numSegments;
result.segmentFormat = sFormat;
result.userData = sis.getUserData();
String userDataString;
if (sis.getUserData().size() > 0) {
userDataString = " userData=" + sis.getUserData();
} else {
userDataString = "";
}
msg("Segments file=" + segmentsFileName + " numSegments=" + numSegments + " version=" + sFormat + userDataString);
if (onlySegments != null) {
result.partial = true;
if (infoStream != null)
infoStream.print("\nChecking only these segments:");
for (String s : onlySegments) {
if (infoStream != null)
infoStream.print(" " + s);
}
result.segmentsChecked.addAll(onlySegments);
msg(":");
}
if (skip) {
msg("\nERROR: this index appears to be created by a newer version of Lucene than this tool was compiled on; please re-compile this tool on the matching version of Lucene; exiting");
result.toolOutOfDate = true;
return result;
}
result.newSegments = (SegmentInfos) sis.clone();
result.newSegments.clear();
for(int i=0;i<numSegments;i++) {
final SegmentInfo info = sis.info(i);
if (onlySegments != null && !onlySegments.contains(info.name))
continue;
Status.SegmentInfoStatus segInfoStat = new Status.SegmentInfoStatus();
result.segmentInfos.add(segInfoStat);
msg(" " + (1+i) + " of " + numSegments + ": name=" + info.name + " docCount=" + info.docCount);
segInfoStat.name = info.name;
segInfoStat.docCount = info.docCount;
int toLoseDocCount = info.docCount;
SegmentReader reader = null;
try {
msg(" compound=" + info.getUseCompoundFile());
segInfoStat.compound = info.getUseCompoundFile();
msg(" hasProx=" + info.getHasProx());
segInfoStat.hasProx = info.getHasProx();
msg(" numFiles=" + info.files().size());
segInfoStat.numFiles = info.files().size();
msg(" size (MB)=" + nf.format(info.sizeInBytes()/(1024.*1024.)));
segInfoStat.sizeMB = info.sizeInBytes()/(1024.*1024.);
Map<String,String> diagnostics = info.getDiagnostics();
segInfoStat.diagnostics = diagnostics;
if (diagnostics.size() > 0) {
msg(" diagnostics = " + diagnostics);
}
final int docStoreOffset = info.getDocStoreOffset();
if (docStoreOffset != -1) {
msg(" docStoreOffset=" + docStoreOffset);
segInfoStat.docStoreOffset = docStoreOffset;
msg(" docStoreSegment=" + info.getDocStoreSegment());
segInfoStat.docStoreSegment = info.getDocStoreSegment();
msg(" docStoreIsCompoundFile=" + info.getDocStoreIsCompoundFile());
segInfoStat.docStoreCompoundFile = info.getDocStoreIsCompoundFile();
}
final String delFileName = info.getDelFileName();
if (delFileName == null){
msg(" no deletions");
segInfoStat.hasDeletions = false;
}
else{
msg(" has deletions [delFileName=" + delFileName + "]");
segInfoStat.hasDeletions = true;
segInfoStat.deletionsFileName = delFileName;
}
if (infoStream != null)
infoStream.print(" test: open reader.........");
reader = SegmentReader.get(true, info, IndexReader.DEFAULT_TERMS_INDEX_DIVISOR);
segInfoStat.openReaderPassed = true;
final int numDocs = reader.numDocs();
toLoseDocCount = numDocs;
if (reader.hasDeletions()) {
if (reader.deletedDocs.count() != info.getDelCount()) {
throw new RuntimeException("delete count mismatch: info=" + info.getDelCount() + " vs deletedDocs.count()=" + reader.deletedDocs.count());
}
if (reader.deletedDocs.count() > reader.maxDoc()) {
throw new RuntimeException("too many deleted docs: maxDoc()=" + reader.maxDoc() + " vs deletedDocs.count()=" + reader.deletedDocs.count());
}
if (info.docCount - numDocs != info.getDelCount()){
throw new RuntimeException("delete count mismatch: info=" + info.getDelCount() + " vs reader=" + (info.docCount - numDocs));
}
segInfoStat.numDeleted = info.docCount - numDocs;
msg("OK [" + (segInfoStat.numDeleted) + " deleted docs]");
} else {
if (info.getDelCount() != 0) {
throw new RuntimeException("delete count mismatch: info=" + info.getDelCount() + " vs reader=" + (info.docCount - numDocs));
}
msg("OK");
}
if (reader.maxDoc() != info.docCount)
throw new RuntimeException("SegmentReader.maxDoc() " + reader.maxDoc() + " != SegmentInfos.docCount " + info.docCount);
// Test getFieldNames()
if (infoStream != null) {
infoStream.print(" test: fields..............");
}
Collection<String> fieldNames = reader.getFieldNames(IndexReader.FieldOption.ALL);
msg("OK [" + fieldNames.size() + " fields]");
segInfoStat.numFields = fieldNames.size();
// Test Field Norms
segInfoStat.fieldNormStatus = testFieldNorms(fieldNames, reader);
// Test the Term Index
segInfoStat.termIndexStatus = testTermIndex(info, reader);
// Test Stored Fields
segInfoStat.storedFieldStatus = testStoredFields(info, reader, nf);
// Test Term Vectors
segInfoStat.termVectorStatus = testTermVectors(info, reader, nf);
// Rethrow the first exception we encountered
// This will cause stats for failed segments to be incremented properly
if (segInfoStat.fieldNormStatus.error != null) {
throw new RuntimeException("Field Norm test failed");
} else if (segInfoStat.termIndexStatus.error != null) {
throw new RuntimeException("Term Index test failed");
} else if (segInfoStat.storedFieldStatus.error != null) {
throw new RuntimeException("Stored Field test failed");
} else if (segInfoStat.termVectorStatus.error != null) {
throw new RuntimeException("Term Vector test failed");
}
msg("");
} catch (Throwable t) {
msg("FAILED");
String comment;
comment = "fixIndex() would remove reference to this segment";
msg(" WARNING: " + comment + "; full exception:");
if (infoStream != null)
t.printStackTrace(infoStream);
msg("");
result.totLoseDocCount += toLoseDocCount;
result.numBadSegments++;
continue;
} finally {
if (reader != null)
reader.close();
}
// Keeper
result.newSegments.add((SegmentInfo) info.clone());
}
if (0 == result.numBadSegments) {
result.clean = true;
msg("No problems were detected with this index.\n");
} else
msg("WARNING: " + result.numBadSegments + " broken segments (containing " + result.totLoseDocCount + " documents) detected");
return result;
}
/**
* Test field norms.
*/
private Status.FieldNormStatus testFieldNorms(Collection<String> fieldNames, SegmentReader reader) {
final Status.FieldNormStatus status = new Status.FieldNormStatus();
try {
// Test Field Norms
if (infoStream != null) {
infoStream.print(" test: field norms.........");
}
final byte[] b = new byte[reader.maxDoc()];
for (final String fieldName : fieldNames) {
if (reader.hasNorms(fieldName)) {
reader.norms(fieldName, b, 0);
++status.totFields;
}
}
msg("OK [" + status.totFields + " fields]");
} catch (Throwable e) {
msg("ERROR [" + String.valueOf(e.getMessage()) + "]");
status.error = e;
if (infoStream != null) {
e.printStackTrace(infoStream);
}
}
return status;
}
/**
* Test the term index.
*/
private Status.TermIndexStatus testTermIndex(SegmentInfo info, SegmentReader reader) {
final Status.TermIndexStatus status = new Status.TermIndexStatus();
try {
if (infoStream != null) {
infoStream.print(" test: terms, freq, prox...");
}
final TermEnum termEnum = reader.terms();
final TermPositions termPositions = reader.termPositions();
// Used only to count up # deleted docs for this term
final MySegmentTermDocs myTermDocs = new MySegmentTermDocs(reader);
final int maxDoc = reader.maxDoc();
while (termEnum.next()) {
status.termCount++;
final Term term = termEnum.term();
final int docFreq = termEnum.docFreq();
termPositions.seek(term);
int lastDoc = -1;
int freq0 = 0;
status.totFreq += docFreq;
while (termPositions.next()) {
freq0++;
final int doc = termPositions.doc();
final int freq = termPositions.freq();
if (doc <= lastDoc)
throw new RuntimeException("term " + term + ": doc " + doc + " <= lastDoc " + lastDoc);
if (doc >= maxDoc)
throw new RuntimeException("term " + term + ": doc " + doc + " >= maxDoc " + maxDoc);
lastDoc = doc;
if (freq <= 0)
throw new RuntimeException("term " + term + ": doc " + doc + ": freq " + freq + " is out of bounds");
int lastPos = -1;
status.totPos += freq;
for(int j=0;j<freq;j++) {
final int pos = termPositions.nextPosition();
if (pos < -1)
throw new RuntimeException("term " + term + ": doc " + doc + ": pos " + pos + " is out of bounds");
if (pos < lastPos)
throw new RuntimeException("term " + term + ": doc " + doc + ": pos " + pos + " < lastPos " + lastPos);
lastPos = pos;
}
}
// Now count how many deleted docs occurred in
// this term:
final int delCount;
if (reader.hasDeletions()) {
myTermDocs.seek(term);
while(myTermDocs.next()) { }
delCount = myTermDocs.delCount;
} else {
delCount = 0;
}
if (freq0 + delCount != docFreq) {
throw new RuntimeException("term " + term + " docFreq=" +
docFreq + " != num docs seen " + freq0 + " + num docs deleted " + delCount);
}
}
msg("OK [" + status.termCount + " terms; " + status.totFreq + " terms/docs pairs; " + status.totPos + " tokens]");
} catch (Throwable e) {
msg("ERROR [" + String.valueOf(e.getMessage()) + "]");
status.error = e;
if (infoStream != null) {
e.printStackTrace(infoStream);
}
}
return status;
}
/**
* Test stored fields for a segment.
*/
private Status.StoredFieldStatus testStoredFields(SegmentInfo info, SegmentReader reader, NumberFormat format) {
final Status.StoredFieldStatus status = new Status.StoredFieldStatus();
try {
if (infoStream != null) {
infoStream.print(" test: stored fields.......");
}
// Scan stored fields for all documents
for (int j = 0; j < info.docCount; ++j) {
if (!reader.isDeleted(j)) {
status.docCount++;
Document doc = reader.document(j);
status.totFields += doc.getFields().size();
}
}
// Validate docCount
if (status.docCount != reader.numDocs()) {
throw new RuntimeException("docCount=" + status.docCount + " but saw " + status.docCount + " undeleted docs");
}
msg("OK [" + status.totFields + " total field count; avg " +
format.format((((float) status.totFields)/status.docCount)) + " fields per doc]");
} catch (Throwable e) {
msg("ERROR [" + String.valueOf(e.getMessage()) + "]");
status.error = e;
if (infoStream != null) {
e.printStackTrace(infoStream);
}
}
return status;
}
/**
* Test term vectors for a segment.
*/
private Status.TermVectorStatus testTermVectors(SegmentInfo info, SegmentReader reader, NumberFormat format) {
final Status.TermVectorStatus status = new Status.TermVectorStatus();
try {
if (infoStream != null) {
infoStream.print(" test: term vectors........");
}
for (int j = 0; j < info.docCount; ++j) {
if (!reader.isDeleted(j)) {
status.docCount++;
TermFreqVector[] tfv = reader.getTermFreqVectors(j);
if (tfv != null) {
status.totVectors += tfv.length;
}
}
}
msg("OK [" + status.totVectors + " total vector count; avg " +
format.format((((float) status.totVectors) / status.docCount)) + " term/freq vector fields per doc]");
} catch (Throwable e) {
msg("ERROR [" + String.valueOf(e.getMessage()) + "]");
status.error = e;
if (infoStream != null) {
e.printStackTrace(infoStream);
}
}
return status;
}
/** Repairs the index using previously returned result
* from {@link #checkIndex}. Note that this does not
* remove any of the unreferenced files after it's done;
* you must separately open an {@link IndexWriter}, which
* deletes unreferenced files when it's created.
*
* <p><b>WARNING</b>: this writes a
* new segments file into the index, effectively removing
* all documents in broken segments from the index.
* BE CAREFUL.
*
* <p><b>WARNING</b>: Make sure you only call this when the
* index is not opened by any writer. */
public void fixIndex(Status result) throws IOException {
if (result.partial)
throw new IllegalArgumentException("can only fix an index that was fully checked (this status checked a subset of segments)");
result.newSegments.commit(result.dir);
}
private static boolean assertsOn;
private static boolean testAsserts() {
assertsOn = true;
return true;
}
private static boolean assertsOn() {
assert testAsserts();
return assertsOn;
}
/** Command-line interface to check and fix an index.
<p>
Run it like this:
<pre>
java -ea:org.apache.lucene... org.apache.lucene.index.CheckIndex pathToIndex [-fix] [-segment X] [-segment Y]
</pre>
<ul>
<li><code>-fix</code>: actually write a new segments_N file, removing any problematic segments
<li><code>-segment X</code>: only check the specified
segment(s). This can be specified multiple times,
to check more than one segment, eg <code>-segment _2
-segment _a</code>. You can't use this with the -fix
option.
</ul>
<p><b>WARNING</b>: <code>-fix</code> should only be used on an emergency basis as it will cause
documents (perhaps many) to be permanently removed from the index. Always make
a backup copy of your index before running this! Do not run this tool on an index
that is actively being written to. You have been warned!
<p> Run without -fix, this tool will open the index, report version information
and report any exceptions it hits and what action it would take if -fix were
specified. With -fix, this tool will remove any segments that have issues and
write a new segments_N file. This means all documents contained in the affected
segments will be removed.
<p>
This tool exits with exit code 1 if the index cannot be opened or has any
corruption, else 0.
*/
public static void main(String[] args) throws IOException, InterruptedException {
boolean doFix = false;
List<String> onlySegments = new ArrayList<String>();
String indexPath = null;
int i = 0;
while(i < args.length) {
if (args[i].equals("-fix")) {
doFix = true;
i++;
} else if (args[i].equals("-segment")) {
if (i == args.length-1) {
System.out.println("ERROR: missing name for -segment option");
System.exit(1);
}
onlySegments.add(args[i+1]);
i += 2;
} else {
if (indexPath != null) {
System.out.println("ERROR: unexpected extra argument '" + args[i] + "'");
System.exit(1);
}
indexPath = args[i];
i++;
}
}
if (indexPath == null) {
System.out.println("\nERROR: index path not specified");
System.out.println("\nUsage: java org.apache.lucene.index.CheckIndex pathToIndex [-fix] [-segment X] [-segment Y]\n" +
"\n" +
" -fix: actually write a new segments_N file, removing any problematic segments\n" +
" -segment X: only check the specified segments. This can be specified multiple\n" +
" times, to check more than one segment, eg '-segment _2 -segment _a'.\n" +
" You can't use this with the -fix option\n" +
"\n" +
"**WARNING**: -fix should only be used on an emergency basis as it will cause\n" +
"documents (perhaps many) to be permanently removed from the index. Always make\n" +
"a backup copy of your index before running this! Do not run this tool on an index\n" +
"that is actively being written to. You have been warned!\n" +
"\n" +
"Run without -fix, this tool will open the index, report version information\n" +
"and report any exceptions it hits and what action it would take if -fix were\n" +
"specified. With -fix, this tool will remove any segments that have issues and\n" +
"write a new segments_N file. This means all documents contained in the affected\n" +
"segments will be removed.\n" +
"\n" +
"This tool exits with exit code 1 if the index cannot be opened or has any\n" +
"corruption, else 0.\n");
System.exit(1);
}
if (!assertsOn())
System.out.println("\nNOTE: testing will be more thorough if you run java with '-ea:org.apache.lucene...', so assertions are enabled");
if (onlySegments.size() == 0)
onlySegments = null;
else if (doFix) {
System.out.println("ERROR: cannot specify both -fix and -segment");
System.exit(1);
}
System.out.println("\nOpening index @ " + indexPath + "\n");
Directory dir = null;
try {
dir = FSDirectory.open(new File(indexPath));
} catch (Throwable t) {
System.out.println("ERROR: could not open directory \"" + indexPath + "\"; exiting");
t.printStackTrace(System.out);
System.exit(1);
}
CheckIndex checker = new CheckIndex(dir);
checker.setInfoStream(System.out);
Status result = checker.checkIndex(onlySegments);
if (result.missingSegments) {
System.exit(1);
}
if (!result.clean) {
if (!doFix) {
System.out.println("WARNING: would write new segments file, and " + result.totLoseDocCount + " documents would be lost, if -fix were specified\n");
} else {
System.out.println("WARNING: " + result.totLoseDocCount + " documents will be lost\n");
System.out.println("NOTE: will write new segments file in 5 seconds; this will remove " + result.totLoseDocCount + " docs from the index. THIS IS YOUR LAST CHANCE TO CTRL+C!");
for(int s=0;s<5;s++) {
Thread.sleep(1000);
System.out.println(" " + (5-s) + "...");
}
System.out.println("Writing...");
checker.fixIndex(result);
System.out.println("OK");
System.out.println("Wrote new segments file \"" + result.newSegments.getCurrentSegmentFileName() + "\"");
}
}
System.out.println("");
final int exitCode;
if (result != null && result.clean == true)
exitCode = 0;
else
exitCode = 1;
System.exit(exitCode);
}
}
|
apache-2.0
|
reportportal/service-ui
|
app/src/components/widgets/singleLevelWidgets/charts/common/passingRateChart/README.md
|
393
|
## **Passing rate widget**
### Props:
- **intl**: _object_, required
- **widget**: _object_, required
- **container**: _object_, required
- **observer**: _object_, optional, default = {}
- **height**: _number_, optional, default = 0
- **isPreview**: _bool_, optional, default = false
- **filterNameTitle**: _object_, optional, default = {}
- **filterName**: _string_, optional, default = ''
|
apache-2.0
|
shelsonjava/box-java-sdk-v2
|
javadoc/com/box/boxjavalibv2/exceptions/BoxMalformedResponseException.html
|
11573
|
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<h2 title="Class BoxMalformedResponseException" class="title">Class BoxMalformedResponseException</h2>
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<li>java.lang.Object</li>
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<li><a href="../../../../com/box/restclientv2/exceptions/BoxSDKException.html" title="class in com.box.restclientv2.exceptions">com.box.restclientv2.exceptions.BoxSDKException</a></li>
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<pre>public class <span class="strong">BoxMalformedResponseException</span>
extends <a href="../../../../com/box/boxjavalibv2/exceptions/BoxServerException.html" title="class in com.box.boxjavalibv2.exceptions">BoxServerException</a></pre>
<div class="block">Exception for unexpected API response body.</div>
<dl><dt><span class="strong">See Also:</span></dt><dd><a href="../../../../serialized-form.html#com.box.boxjavalibv2.exceptions.BoxMalformedResponseException">Serialized Form</a></dd></dl>
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<td class="colFirst"><code>static java.lang.String</code></td>
<td class="colLast"><code><strong><a href="../../../../com/box/boxjavalibv2/exceptions/BoxMalformedResponseException.html#MALFORM">MALFORM</a></strong></code> </td>
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<td class="colOne"><code><strong><a href="../../../../com/box/boxjavalibv2/exceptions/BoxMalformedResponseException.html#BoxMalformedResponseException(int)">BoxMalformedResponseException</a></strong>(int statusCode)</code> </td>
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<pre>public static final java.lang.String MALFORM</pre>
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<pre>public BoxMalformedResponseException(int statusCode)</pre>
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|
apache-2.0
|
entertailion/Open-Launcher-for-GTV
|
src/com/entertailion/android/launcher/widget/Clock.java
|
2261
|
/*
* Copyright (C) 2012 ENTERTAILION LLC
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package com.entertailion.android.launcher.widget;
import java.util.Timer;
import java.util.TimerTask;
import android.content.Context;
import android.graphics.Typeface;
import android.os.Handler;
import android.text.format.DateUtils;
import android.util.AttributeSet;
import android.widget.LinearLayout;
import android.widget.TextView;
import com.entertailion.android.launcher.R;
/**
* Clock widget. Displays current time with minute accuracy.
*
* @author leon_nicholls
*
*/
public class Clock extends LinearLayout {
private static String LOG_TAG = "Clock";
private Timer timer;
private Handler handler = new Handler();
private TextView timeView;
private String lastTime;
public Clock(Context context, AttributeSet attrs) {
super(context, attrs);
addView(inflate(context, R.layout.clock_widget, null));
timeView = (TextView) findViewById(R.id.time);
if (!isInEditMode()) { // support IDE editor
Typeface typeface = Typeface.createFromAsset(context.getAssets(), "fonts/Roboto-Condensed.ttf");
timeView.setTypeface(typeface);
}
start();
}
/**
* Thread to update clock every second
*/
public void start() {
timer = new Timer();
timer.scheduleAtFixedRate(new TimerTask() {
public void run() {
final String time = DateUtils.formatDateTime(getContext(), System.currentTimeMillis(), DateUtils.FORMAT_SHOW_TIME);
if (!time.equals(lastTime)) {
handler.post(new Runnable() {
public void run() {
timeView.setText(time);
}
});
lastTime = time;
}
}
}, 0, 1000); // every second
}
/**
* Stop the update thread
*/
public void stop() {
timer.cancel();
}
}
|
apache-2.0
|
zhulangen/unity3d-test
|
Assets/Bison/RnM UI for NGUI/Scripts/UI/RnMUI_Tooltip.cs
|
13438
|
using UnityEngine;
using System.Collections;
using System.Collections.Generic;
[AddComponentMenu("RPG and MMO UI/Tooltip/Tooltip")]
public class RnMUI_Tooltip : MonoBehaviour
{
public class AttributeInfo
{
public string value;
public string text;
public bool singleColumnRow;
public RectOffset margin;
}
public enum AnchorPoint : int
{
BottomLeft = 0,
TopLeft = 1,
TopRight = 2,
BottomRight = 3,
}
private static RnMUI_Tooltip mInstance;
public Camera uiCamera;
public UILabel title;
public UILabel description;
public UISprite background;
public UIWidget container;
public float fadeDuration = 0.3f;
public Color attrValueColor = new Color(0.357f, 0.369f, 0.431f, 1f);
public Color attrTextColor = new Color(0.357f, 0.369f, 0.431f, 1f);
public GameObject attributesRowPrefab;
public int attributesMarginTop = 0;
public int attributesMarginBottom = 0;
public RnMUI_TooltipAnchor tooltipAnchor;
private UIWidget anchorPositionTo;
private Vector3 targetPosition;
private List<AttributeInfo> mAttributes = new List<AttributeInfo>();
private List<GameObject> mInstancedAttributesRows = new List<GameObject>();
private bool mIsVisible = false;
public bool IsVisible { get { return this.mIsVisible; } }
/// <summary>
/// Whether the tooltip is currently visible.
/// </summary>
static public bool isVisible { get { return (mInstance != null && mInstance.IsVisible); } }
void Awake()
{
mInstance = this;
}
void OnDestroy()
{
mInstance = null;
}
protected virtual void Start()
{
this.SetAlpha(0f);
if (this.uiCamera == null) this.uiCamera = NGUITools.FindCameraForLayer(this.gameObject.layer);
if (this.uiCamera == null) this.uiCamera = Camera.main;
if (this.uiCamera == null)
{
Debug.LogWarning(this.GetType() + " requires a camera in order to work.", this);
this.enabled = false;
return;
}
if (this.container == null)
{
Debug.LogWarning(this.GetType() + " requires a container to be define in order to work.", this);
this.enabled = false;
return;
}
if (this.background == null)
{
Debug.LogWarning(this.GetType() + " requires a background sprite in order to work.", this);
this.enabled = false;
return;
}
}
protected virtual void Update()
{
if (this.currentAlpha > 0f)
this.UpdatePosition();
}
/// <summary>
/// Updates the position of the tooltip.
/// </summary>
private void UpdatePosition()
{
AnchorPoint anchorPosition = AnchorPoint.BottomLeft;
if (this.anchorPositionTo != null)
{
// Set the world position to the top right corner of the target
this.transform.position = this.anchorPositionTo.worldCorners[(int)AnchorPoint.TopRight];
}
else
{
// Set the world position to the target position
this.transform.position = targetPosition;
}
// Now move the position up based on the background height
this.transform.localPosition = this.transform.localPosition + new Vector3(0f, this.background.height, 0f);
// Check if the tooltip is going outside the viewport to the left
if (this.uiCamera.WorldToScreenPoint(this.background.worldCorners[2]).x > Screen.width)
{
// move to the left
this.transform.localPosition = this.transform.localPosition + new Vector3(-(this.background.width + (this.anchorPositionTo != null ? this.anchorPositionTo.width : 0)), 0f, 0f);
// Update the anchor variable
anchorPosition = AnchorPoint.BottomRight;
}
// Check if the tooltip is going outside the viewport to the top
if (this.uiCamera.WorldToScreenPoint(this.background.worldCorners[1]).y > Screen.height)
{
// move to the bottom
this.transform.localPosition = this.transform.localPosition + new Vector3(0f, -(this.background.height + (this.anchorPositionTo != null ? this.anchorPositionTo.height : 0)), 0f);
// Update the anchor variable
anchorPosition = (anchorPosition == AnchorPoint.BottomLeft) ? AnchorPoint.TopLeft : AnchorPoint.TopRight;
}
if (this.tooltipAnchor != null)
this.tooltipAnchor.SetAnchorPosition(anchorPosition, this.background.width, this.background.height);
}
private void _SetTitle(string tooltipTitle)
{
if (this.title != null)
this.title.text = tooltipTitle;
}
private void _SetDescription(string tooltipDescription)
{
if (this.description != null)
{
if (string.IsNullOrEmpty(tooltipDescription))
this.description.enabled = false;
else
this.description.enabled = true;
this.description.text = tooltipDescription;
}
}
/// <summary>
/// Sets the title of the tooltip.
/// </summary>
/// <param name="tooltipTitle">Tooltip title.</param>
public static void SetTitle(string tooltipTitle)
{
if (mInstance != null)
mInstance._SetTitle(tooltipTitle);
}
/// <summary>
/// Sets the description of the tooltip, the description will be disabled if set to null or empty.
/// </summary>
/// <param name="tooltipDescription">Tooltip description.</param>
public static void SetDescription(string tooltipDescription)
{
if (mInstance != null)
mInstance._SetDescription(tooltipDescription);
}
private void _AddAttribute(string value, string text, bool singleColumnRow, RectOffset margin)
{
// Create new attribute info
AttributeInfo info = new AttributeInfo();
info.value = "[" + NGUIText.EncodeColor(this.attrValueColor) + "]" + value + "[-]";
info.text = "[" + NGUIText.EncodeColor(this.attrTextColor) + "]" + text + "[-]";
info.singleColumnRow = singleColumnRow;
info.margin = margin;
// Add it to the attribute list
this.mAttributes.Add(info);
}
/// <summary>
/// Adds an attribute to the tooltip, the align is auto based on the order of attributes.
/// </summary>
/// <param name="value">Value.</param>
/// <param name="text">Text.</param>
public static void AddAttribute(string value, string text)
{
if (mInstance != null)
mInstance._AddAttribute(value, text, false, new RectOffset());
}
/// <summary>
/// Adds an attribute to the tooltip on a row with a single column.
/// </summary>
/// <param name="value">Value.</param>
/// <param name="text">Text.</param>
public static void AddAttribute_SingleColumn(string value, string text)
{
if (mInstance != null)
mInstance._AddAttribute(value, text, true, new RectOffset());
}
/// <summary>
/// Adds an attribute to the tooltip on a row with a single column.
/// </summary>
/// <param name="value">Value.</param>
/// <param name="text">Text.</param>
/// <param name="margin">Margin.</param>
public static void AddAttribute_SingleColumn(string value, string text, RectOffset margin)
{
if (mInstance != null)
mInstance._AddAttribute(value, text, true, margin);
}
private void _SetPosition(UIWidget target)
{
if (target == null)
return;
// Save the target and make the calculations after the show call
this.anchorPositionTo = target;
}
/// <summary>
/// Sets the position of the tooltip anchored to the given widget.
/// </summary>
/// <param name="target">Target.</param>
public static void SetPosition(UIWidget target)
{
if (mInstance != null)
mInstance._SetPosition(target);
}
private void _Show()
{
// Cleanup any attributes left, if any at all
this.Cleanup();
// Bring the tooltip forward
NGUITools.BringForward(this.gameObject);
// Save the position where the tooltip should appear
this.targetPosition = uiCamera.ScreenToWorldPoint(Input.mousePosition);
// Prepare the attributes
if (this.mAttributes.Count > 0 && this.attributesRowPrefab != null)
{
bool isLeft = true;
RnMUI_Tooltip_AttributeRow lastAttrRow = null;
int lastDepth = this.title.depth;
// Loop the attributes
foreach (AttributeInfo info in this.mAttributes)
{
// Force left column in case it's a signle column row
if (info.singleColumnRow)
isLeft = true;
if (isLeft)
{
// Instantiate a prefab
GameObject obj = (GameObject)Instantiate(this.attributesRowPrefab);
// Apply parent
obj.transform.parent = this.container.transform;
// Fix position and scale
obj.transform.localScale = Vector3.one;
obj.transform.localPosition = Vector3.zero;
obj.transform.localRotation = Quaternion.identity;
// Increase the depth
lastDepth = lastDepth + 1;
// Apply the new depth
UIWidget wgt = obj.GetComponent<UIWidget>();
if (wgt != null)
wgt.depth = lastDepth;
// Get the attribute row script referrence
lastAttrRow = obj.GetComponent<RnMUI_Tooltip_AttributeRow>();
// Make some changes if it's a single column row
if (info.singleColumnRow)
{
// Destroy the right column
NGUITools.Destroy(lastAttrRow.rightLabel.gameObject);
// Double the size of the label
lastAttrRow.leftLabel.width *= 2;
}
// Check if we can set margin to the row
UITable_ItemMargin margins = obj.GetComponent<UITable_ItemMargin>();
// If the row does not have the component add it
if (margins == null)
margins = obj.AddComponent<UITable_ItemMargin>();
if (margins != null)
{
margins.left = info.margin.left;
margins.right = info.margin.right;
margins.top = info.margin.top;
margins.bottom = info.margin.bottom;
// If this is the first or last row, apply the global attr margins
if (this.mInstancedAttributesRows.Count == 0)
margins.top += this.attributesMarginTop;
else if (this.mInstancedAttributesRows.Count == (Mathf.RoundToInt((float)this.mAttributes.Count / 2f) - 1))
margins.bottom += this.attributesMarginBottom;
}
// Add it to the instanced objects list
this.mInstancedAttributesRows.Add(obj);
}
// Check if we have a row object to work with
if (lastAttrRow != null)
{
UILabel label = (isLeft) ? lastAttrRow.leftLabel : lastAttrRow.rightLabel;
// Check if we have the label
if (label != null)
{
// Set the label alpha
label.alpha = 0f;
// Set the label text
label.text = info.value + info.text;
// Flip is left
if (!info.singleColumnRow)
isLeft = !isLeft;
}
// Update the row size and depth
lastAttrRow.UpdateSizeAndDepth();
}
}
// Clear the attributes list, we no longer need it
this.mAttributes.Clear();
// Apply greater depth to the description
if (this.description != null)
this.description.depth = (lastDepth + 1);
}
// Update the tooltip table
if (this.container != null)
{
UITableExtended contTable = this.container.GetComponent<UITableExtended>();
if (contTable != null)
contTable.Reposition();
}
// Fade In
this.StopCoroutine("FadeOut");
this.StartCoroutine("FadeIn");
}
private void _Hide()
{
// Target alpha
this.StopCoroutine("FadeIn");
this.StartCoroutine("FadeOut");
}
private void OnFadeOut()
{
//Destroy the instanced attributes and empty the list
this.Cleanup();
// Clear the anchor to
this.anchorPositionTo = null;
}
private void Cleanup()
{
//Destroy the attributes
foreach (GameObject obj in this.mInstancedAttributesRows)
{
if (obj != null)
DestroyImmediate(obj);
}
// Clear the list
this.mInstancedAttributesRows.Clear();
}
/// <summary>
/// Show the tooltip.
/// </summary>
public static void Show()
{
if (mInstance != null)
mInstance._Show();
}
/// <summary>
/// Hide the tooltip.
/// </summary>
public static void Hide()
{
if (mInstance != null)
mInstance._Hide();
}
/// <summary>
/// Set the alpha of all widgets.
/// </summary>
private void SetAlpha(float val)
{
UIWidget[] widgets = this.GetComponentsInChildren<UIWidget>();
for (int i = 0, imax = widgets.Length; i < imax; ++i)
{
UIWidget w = widgets[i];
Color c = w.color;
c.a = val;
w.color = c;
}
}
private float currentAlpha { get { return this.background.alpha; } }
// Show / Hide fade animation coroutine
private IEnumerator FadeIn()
{
this.mIsVisible = true;
// Get the timestamp
float startTime = Time.time;
// Calculate the time we need to fade in from the current alpha
float internalDuration = (this.fadeDuration * (1f - this.currentAlpha));
// Update the start time
startTime -= (this.fadeDuration - internalDuration);
// Fade In
while (Time.time < (startTime + this.fadeDuration))
{
float RemainingTime = (startTime + this.fadeDuration) - Time.time;
float ElapsedTime = this.fadeDuration - RemainingTime;
// Update the alpha by the percentage of the time elapsed
this.SetAlpha(ElapsedTime / this.fadeDuration);
yield return 0;
}
// Make sure it's 1
this.SetAlpha(1.0f);
}
// Show / Hide fade animation coroutine
private IEnumerator FadeOut()
{
if (!this.IsVisible)
yield break;
// Get the timestamp
float startTime = Time.time;
// Calculate the time we need to fade out from the current alpha
float internalDuration = (this.fadeDuration * this.currentAlpha);
// Update the start time
startTime -= (this.fadeDuration - internalDuration);
// Fade In
while (Time.time < (startTime + this.fadeDuration))
{
float RemainingTime = (startTime + this.fadeDuration) - Time.time;
// Update the alpha by the percentage of the time elapsed
this.SetAlpha(RemainingTime / this.fadeDuration);
yield return 0;
}
// Make sure it's 0
this.SetAlpha(0f);
this.mIsVisible = false;
this.OnFadeOut();
}
}
|
apache-2.0
|
freme-project/Broker
|
src/main/java/eu/freme/broker/tools/RDFELinkSerializationFormats.java
|
1982
|
/**
* Copyright (C) 2015 Agro-Know, Deutsches Forschungszentrum für Künstliche Intelligenz, iMinds,
* Institut für Angewandte Informatik e. V. an der Universität Leipzig,
* Istituto Superiore Mario Boella, Tilde, Vistatec, WRIPL (http://freme-project.eu)
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package eu.freme.broker.tools;
import java.util.HashMap;
import eu.freme.common.conversion.rdf.RDFConstants;
@SuppressWarnings("serial")
public class RDFELinkSerializationFormats extends HashMap<String, RDFConstants.RDFSerialization>{
public RDFELinkSerializationFormats(){
super();
put("text/turtle", RDFConstants.RDFSerialization.TURTLE);
put("application/x-turtle", RDFConstants.RDFSerialization.TURTLE);
put("turtle", RDFConstants.RDFSerialization.TURTLE);
put("application/json+ld",RDFConstants.RDFSerialization.JSON_LD);
put("json-ld", RDFConstants.RDFSerialization.JSON_LD);
put("application/n-triples",RDFConstants.RDFSerialization.N_TRIPLES);
put("ntriples", RDFConstants.RDFSerialization.N_TRIPLES);
put("application/rdf+xml", RDFConstants.RDFSerialization.RDF_XML);
put("rdf-xml", RDFConstants.RDFSerialization.RDF_XML);
put("text/n3",RDFConstants.RDFSerialization.N3);
put("n3",RDFConstants.RDFSerialization.N3);
put("application/json", RDFConstants.RDFSerialization.JSON);
put("json", RDFConstants.RDFSerialization.JSON);
}
}
|
apache-2.0
|
mariotoffia/FluentDocker
|
Ductus.FluentDocker.Tests/FluentDockerTestBase.cs
|
1664
|
using System;
using System.Linq;
using Ductus.FluentDocker.Commands;
using Ductus.FluentDocker.Services;
using Ductus.FluentDocker.Tests.Extensions;
using Microsoft.VisualStudio.TestTools.UnitTesting;
namespace Ductus.FluentDocker.Tests
{
public abstract class FluentDockerTestBase
{
protected IHostService DockerHost;
private bool _createdHost;
[TestInitialize]
public void Initialize()
{
EnsureDockerHost();
}
[TestCleanup]
public void Teardown()
{
if (_createdHost)
{
"test-machine".Delete(true /*force*/);
}
}
private void EnsureDockerHost()
{
if (DockerHost?.State == ServiceRunningState.Running)
{
return;
}
var hosts = new Hosts().Discover();
DockerHost = hosts.FirstOrDefault(x => x.IsNative) ?? hosts.FirstOrDefault(x => x.Name == "default");
if (null != DockerHost)
{
if (DockerHost.State != ServiceRunningState.Running)
{
DockerHost.Start();
DockerHost.Host.LinuxMode(DockerHost.Certificates);
}
return;
}
if (hosts.Count > 0)
{
DockerHost = hosts.First();
}
if (null != DockerHost)
{
return;
}
if (_createdHost)
{
throw new Exception("Failed to initialize the test class, tried to create a docker host but failed");
}
var res = "test-machine".Create(1024, 20000, 1);
Assert.AreEqual(true, res.Success);
var start = "test-machine".Start();
Assert.AreEqual(true, start.Success);
_createdHost = true;
EnsureDockerHost();
}
}
}
|
apache-2.0
|
lesaint/experimenting-annotation-processing
|
experimenting-rounds/massive-count-of-annotated-classes/src/main/java/fr/javatronic/blog/massive/annotation1/sub1/Class_6400.java
|
151
|
package fr.javatronic.blog.massive.annotation1.sub1;
import fr.javatronic.blog.processor.Annotation_001;
@Annotation_001
public class Class_6400 {
}
|
apache-2.0
|
zzsoszz/qdropdownselect
|
1.0.2/demo.html
|
2509
|
<!DOCTYPE html>
<html lang="en">
<head>
<meta name="description" content="延时提示2">
<meta charset="UTF-8">
<title>Document</title>.
<link rel="stylesheet" href="plugin.css">
<script src="jquery-1.10.2.js"></script>
<script src="angular.min.js"></script>
<script src="plugin.js"></script>
<script>
$(document).ready(function(){
/*
$("#username").qdropdownselect({dropDownSelectEle:$(".qdropdownselectTemp")});
$("#username").on("qdropdownselect.change",function(event,val){
$("#username").val(val);
});
$("#username").qdropdownselect("setValue","2");
$("#username2").qdropdownselect({dropDownSelectEle:$(".qdropdownselectTemp")});
$("#username2").on("qdropdownselect.change",function(event,val){
$("#username2").val(val);
});
$("#username2").qdropdownselect("setValue",4);
*/
});
var mainApp=angular.module("mainApp",["qui"]);
mainApp.controller("mainController", function ($rootScope,$http,$location,$scope) {
$scope.username="2";
$scope.password;
$scope.items=[{"name":"北京","sub":[{"name":"东城区"},{"name":"西城区"},{"name":"崇文区"}]},{"name":"北京222","sub":[{"name":"东城区222"},{"name":"西城区22"},{"name":"崇文区222"}]}];
$scope.your={
province:"",
city:""
};
$scope.citys;
$scope.$watch(function(){
var v=$($scope.items).filter(function(index)
{
console.log($scope.your);
if(this.name==$scope.your.province)
{
return true;
}
}).map(function(){
return this.sub;
});
$scope.citys=v.get();
});
});
</script>
<style>
</style>
</head>
<body ng-app="mainApp">
<div ng-controller="mainController" id="mainController">
<input autocomplete="off" qdropdownselect ng-model="your.province" qdropdownselecttemp="#qdropdownselect1" />
<input autocomplete="off" qdropdownselect ng-model="your.city" qdropdownselecttemp="#qdropdownselect2"/>
<div id="qdropdownselect1" class="qdropdownselect" style="display:none">
<div class="qitem" ng-repeat="item in items" data-qvalue="{{item.name}}" >
{{item.name}}
</div>
</div>
<div id="qdropdownselect2" class="qdropdownselect" style="display:none">
<div class="qitem" ng-repeat="item in citys" data-qvalue="{{item.name}}" >
{{item.name}}
</div>
</div>
</div>
</body>
</html>
|
apache-2.0
|
SnowdogApps/AndroidAnnotations-Sample-App
|
app/src/main/java/pl/snowdog/androidannotationstest/bus/OttoBus.java
|
243
|
package pl.snowdog.androidannotationstest.bus;
import com.squareup.otto.Bus;
import org.androidannotations.annotations.EBean;
// Declare the bus as an enhanced bean
@EBean(scope = EBean.Scope.Singleton)
public class OttoBus extends Bus {
}
|
apache-2.0
|
duracloud/management-console
|
resources/sql/schema-3.1.6.sql
|
9751
|
/*!40101 SET @OLD_CHARACTER_SET_CLIENT=@@CHARACTER_SET_CLIENT */;
/*!40101 SET @OLD_CHARACTER_SET_RESULTS=@@CHARACTER_SET_RESULTS */;
/*!40101 SET @OLD_COLLATION_CONNECTION=@@COLLATION_CONNECTION */;
/*!40101 SET NAMES utf8 */;
/*!40103 SET @OLD_TIME_ZONE=@@TIME_ZONE */;
/*!40103 SET TIME_ZONE='+00:00' */;
/*!40014 SET @OLD_UNIQUE_CHECKS=@@UNIQUE_CHECKS, UNIQUE_CHECKS=0 */;
/*!40014 SET @OLD_FOREIGN_KEY_CHECKS=@@FOREIGN_KEY_CHECKS, FOREIGN_KEY_CHECKS=0 */;
/*!40101 SET @OLD_SQL_MODE=@@SQL_MODE, SQL_MODE='NO_AUTO_VALUE_ON_ZERO' */;
/*!40111 SET @OLD_SQL_NOTES=@@SQL_NOTES, SQL_NOTES=0 */;
--
-- Table structure for table `account_info`
--
DROP TABLE IF EXISTS `account_info`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `account_info` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`acct_name` varchar(255) DEFAULT NULL,
`department` varchar(255) DEFAULT NULL,
`org_name` varchar(255) DEFAULT NULL,
`status` varchar(255) DEFAULT NULL,
`subdomain` varchar(255) DEFAULT NULL,
`primary_storage_provider_account_id` bigint(20) NOT NULL,
PRIMARY KEY (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=1084 DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `account_rights`
--
DROP TABLE IF EXISTS `account_rights`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `account_rights` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`account_id` bigint(20) NOT NULL,
`user_id` bigint(20) DEFAULT NULL,
PRIMARY KEY (`id`),
KEY `FK_pqeqe896mkrol3d5fx83xkcwq` (`account_id`),
KEY `FK_rse1vjlmaucfng31iaw1fj7iu` (`user_id`),
CONSTRAINT `FK_pqeqe896mkrol3d5fx83xkcwq` FOREIGN KEY (`account_id`) REFERENCES `account_info` (`id`),
CONSTRAINT `FK_rse1vjlmaucfng31iaw1fj7iu` FOREIGN KEY (`user_id`) REFERENCES `duracloud_user` (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=1430 DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `account_rights_role`
--
DROP TABLE IF EXISTS `account_rights_role`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `account_rights_role` (
`account_rights_id` bigint(20) NOT NULL,
`role` varchar(255) DEFAULT NULL,
KEY `FK_91wx1gbltwqx2ma0w10c798td` (`account_rights_id`),
CONSTRAINT `FK_91wx1gbltwqx2ma0w10c798td` FOREIGN KEY (`account_rights_id`) REFERENCES `account_rights` (`id`)
) ENGINE=InnoDB DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `duracloud_group`
--
DROP TABLE IF EXISTS `duracloud_group`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `duracloud_group` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`name` varchar(255) DEFAULT NULL,
`account_id` bigint(20) NOT NULL,
PRIMARY KEY (`id`),
KEY `FK_7tt58lodlxiqwjhvbyi9ytlyp` (`account_id`),
CONSTRAINT `FK_7tt58lodlxiqwjhvbyi9ytlyp` FOREIGN KEY (`account_id`) REFERENCES `account_info` (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=123 DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `duracloud_mill`
--
DROP TABLE IF EXISTS `duracloud_mill`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `duracloud_mill` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`audit_log_space_id` varchar(255) NOT NULL,
`audit_queue` varchar(255) NOT NULL,
`db_host` varchar(255) NOT NULL,
`db_name` varchar(255) NOT NULL,
`db_password` varchar(255) NOT NULL,
`db_port` int(11) NOT NULL,
`db_username` varchar(255) NOT NULL,
PRIMARY KEY (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=2 DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `duracloud_user`
--
DROP TABLE IF EXISTS `duracloud_user`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `duracloud_user` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`account_non_expired` tinyint(1) NOT NULL,
`account_non_locked` tinyint(1) NOT NULL,
`credentials_non_expired` tinyint(1) NOT NULL,
`email` varchar(255) DEFAULT NULL,
`enabled` tinyint(1) NOT NULL,
`first_name` varchar(255) DEFAULT NULL,
`last_name` varchar(255) DEFAULT NULL,
`password` varchar(255) DEFAULT NULL,
`root` tinyint(1) NOT NULL,
`security_answer` varchar(255) DEFAULT NULL,
`security_question` varchar(255) DEFAULT NULL,
`username` varchar(255) DEFAULT NULL,
`allowableipaddress_range` varchar(255) DEFAULT NULL,
PRIMARY KEY (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=1425 DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `global_properties`
--
DROP TABLE IF EXISTS `global_properties`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `global_properties` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`instance_notification_topic_arn` varchar(255) NOT NULL,
`cloud_front_account_id` varchar(255) NOT NULL DEFAULT 'cloud front account id',
`cloud_front_key_id` varchar(255) NOT NULL DEFAULT 'cloud front key id',
`cloud_front_key_path` varchar(255) NOT NULL DEFAULT 'cloud front key path',
PRIMARY KEY (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=2 DEFAULT CHARSET=utf8;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `group_user`
--
DROP TABLE IF EXISTS `group_user`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `group_user` (
`group_id` bigint(20) NOT NULL,
`user_id` bigint(20) NOT NULL,
PRIMARY KEY (`group_id`,`user_id`),
KEY `FK_ns02np32pqhrbm8cwpifjerp9` (`user_id`),
KEY `FK_dx4jv6mpv63ufnjl3a7pec1vo` (`group_id`),
CONSTRAINT `FK_dx4jv6mpv63ufnjl3a7pec1vo` FOREIGN KEY (`group_id`) REFERENCES `duracloud_group` (`id`),
CONSTRAINT `FK_ns02np32pqhrbm8cwpifjerp9` FOREIGN KEY (`user_id`) REFERENCES `duracloud_user` (`id`)
) ENGINE=InnoDB DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `storage_provider_account`
--
DROP TABLE IF EXISTS `storage_provider_account`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `storage_provider_account` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`password` varchar(255) DEFAULT NULL,
`username` varchar(255) DEFAULT NULL,
`provider_type` varchar(255) DEFAULT NULL,
`storage_limit` int(11) NOT NULL DEFAULT '1',
`account_info_id` bigint(20) DEFAULT NULL,
PRIMARY KEY (`id`),
KEY `FK_STORAGE_PROVIDER_ACCOUNT_INFO` (`account_info_id`),
CONSTRAINT `FK_STORAGE_PROVIDER_ACCOUNT_INFO` FOREIGN KEY (`account_info_id`) REFERENCES `account_info` (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=1133 DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `storage_provider_account_properties`
--
DROP TABLE IF EXISTS `storage_provider_account_properties`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `storage_provider_account_properties` (
`storage_provider_account_id` bigint(20) NOT NULL AUTO_INCREMENT,
`map_value` varchar(255) DEFAULT NULL,
`map_key` varchar(255) NOT NULL,
PRIMARY KEY (`storage_provider_account_id`,`map_key`),
CONSTRAINT `FK_storage_provider_account_id` FOREIGN KEY (`storage_provider_account_id`) REFERENCES `storage_provider_account` (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=1131 DEFAULT CHARSET=utf8;
/*!40101 SET character_set_client = @saved_cs_client */;
--
-- Table structure for table `user_invitation`
--
DROP TABLE IF EXISTS `user_invitation`;
/*!40101 SET @saved_cs_client = @@character_set_client */;
/*!40101 SET character_set_client = utf8 */;
CREATE TABLE `user_invitation` (
`id` bigint(20) NOT NULL AUTO_INCREMENT,
`modified` datetime DEFAULT NULL,
`account_dep` varchar(255) DEFAULT NULL,
`account_name` varchar(255) DEFAULT NULL,
`account_org` varchar(255) DEFAULT NULL,
`account_subdomain` varchar(255) DEFAULT NULL,
`admin_username` varchar(255) DEFAULT NULL,
`creation_date` datetime DEFAULT NULL,
`expiration_date` datetime DEFAULT NULL,
`redemption_code` varchar(255) DEFAULT NULL,
`user_email` varchar(255) DEFAULT NULL,
`account_id` bigint(20) DEFAULT NULL,
PRIMARY KEY (`id`),
KEY `FK_nlwoj3r09ksyu15sp9ob5y8gx` (`account_id`),
CONSTRAINT `FK_nlwoj3r09ksyu15sp9ob5y8gx` FOREIGN KEY (`account_id`) REFERENCES `account_info` (`id`)
) ENGINE=InnoDB AUTO_INCREMENT=267 DEFAULT CHARSET=latin1;
/*!40101 SET character_set_client = @saved_cs_client */;
/*!40103 SET TIME_ZONE=@OLD_TIME_ZONE */;
/*!40101 SET SQL_MODE=@OLD_SQL_MODE */;
/*!40014 SET FOREIGN_KEY_CHECKS=@OLD_FOREIGN_KEY_CHECKS */;
/*!40014 SET UNIQUE_CHECKS=@OLD_UNIQUE_CHECKS */;
/*!40101 SET CHARACTER_SET_CLIENT=@OLD_CHARACTER_SET_CLIENT */;
/*!40101 SET CHARACTER_SET_RESULTS=@OLD_CHARACTER_SET_RESULTS */;
/*!40101 SET COLLATION_CONNECTION=@OLD_COLLATION_CONNECTION */;
/*!40111 SET SQL_NOTES=@OLD_SQL_NOTES */;
-- Dump completed on 2017-09-05 21:17:03
|
apache-2.0
|
cjellick/cattle
|
modules/model/src/main/java/io/cattle/platform/core/addon/metadata/NetworkInfo.java
|
3884
|
package io.cattle.platform.core.addon.metadata;
import io.cattle.platform.core.constants.NetworkConstants;
import io.cattle.platform.core.model.Network;
import io.cattle.platform.object.util.DataAccessor;
import io.github.ibuildthecloud.gdapi.annotation.Field;
import java.util.Map;
public class NetworkInfo implements MetadataObject {
Long id;
String name;
String uuid;
String kind;
String environmentUuid;
boolean hostPorts;
Map<String, Object> metadata;
String defaultPolicyAction;
Object policy;
public NetworkInfo(Network network) {
this.defaultPolicyAction = DataAccessor.fieldString(network, NetworkConstants.FIELD_DEFAULT_POLICY_ACTION);
this.id = network.getId();
this.kind = network.getKind();
this.metadata = DataAccessor.fieldMap(network, NetworkConstants.FIELD_METADATA);
this.name = network.getName();
this.policy = DataAccessor.fieldObject(network, NetworkConstants.FIELD_POLICY);
this.uuid = network.getUuid();
this.hostPorts = DataAccessor.fieldBool(network, NetworkConstants.FIELD_HOST_PORTS);
}
public String getKind() {
return kind;
}
@Field(typeString = "reference[network]")
public Long getInfoTypeId() {
return id;
}
public Long getId() {
return id;
}
@Override
public String getEnvironmentUuid() {
return environmentUuid;
}
@Override
public String getInfoType() {
return "network";
}
@Override
public void setEnvironmentUuid(String environmentUuid) {
this.environmentUuid = environmentUuid;
}
public String getName() {
return name;
}
@Override
public String getUuid() {
return uuid;
}
public boolean isHostPorts() {
return hostPorts;
}
public Map<String, Object> getMetadata() {
return metadata;
}
public String getDefaultPolicyAction() {
return defaultPolicyAction;
}
public Object getPolicy() {
return policy;
}
@Override
public boolean equals(Object o) {
if (this == o) return true;
if (o == null || getClass() != o.getClass()) return false;
NetworkInfo that = (NetworkInfo) o;
if (hostPorts != that.hostPorts) return false;
if (id != null ? !id.equals(that.id) : that.id != null) return false;
if (name != null ? !name.equals(that.name) : that.name != null) return false;
if (uuid != null ? !uuid.equals(that.uuid) : that.uuid != null) return false;
if (kind != null ? !kind.equals(that.kind) : that.kind != null) return false;
if (environmentUuid != null ? !environmentUuid.equals(that.environmentUuid) : that.environmentUuid != null)
return false;
if (metadata != null ? !metadata.equals(that.metadata) : that.metadata != null) return false;
if (defaultPolicyAction != null ? !defaultPolicyAction.equals(that.defaultPolicyAction) : that.defaultPolicyAction != null)
return false;
return policy != null ? policy.equals(that.policy) : that.policy == null;
}
@Override
public int hashCode() {
int result = id != null ? id.hashCode() : 0;
result = 31 * result + (name != null ? name.hashCode() : 0);
result = 31 * result + (uuid != null ? uuid.hashCode() : 0);
result = 31 * result + (kind != null ? kind.hashCode() : 0);
result = 31 * result + (environmentUuid != null ? environmentUuid.hashCode() : 0);
result = 31 * result + (hostPorts ? 1 : 0);
result = 31 * result + (metadata != null ? metadata.hashCode() : 0);
result = 31 * result + (defaultPolicyAction != null ? defaultPolicyAction.hashCode() : 0);
result = 31 * result + (policy != null ? policy.hashCode() : 0);
return result;
}
}
|
apache-2.0
|
mdoering/backbone
|
life/Plantae/Rhodophyta/Florideophyceae/Batrachospermales/Batrachospermaceae/Batrachospermum/Batrachospermum puiggarianum/ Syn. Batrachospermum schwacheanum/README.md
|
193
|
# Batrachospermum schwacheanum Möbius SPECIES
#### Status
SYNONYM
#### According to
The Catalogue of Life, 3rd January 2011
#### Published in
null
#### Original name
null
### Remarks
null
|
apache-2.0
|
mdileep/NFugue
|
tests/NFugue.Tests/Integration/MusicXmlParserTests.cs
|
1134
|
using FluentAssertions;
using NFugue.Integration.MusicXml;
using NFugue.Staccato;
using System.IO;
using Xunit;
namespace NFugue.Tests.Integration
{
public class MusicXmlParserTests
{
private readonly MusicXmlParser xmlParser = new MusicXmlParser();
[Fact]
public void Hello_world_part_wise()
{
ParseMusicXmlFile("Data/HelloWorldPartWise.xml").Should().Be("V0 C4w |");
}
[Fact]
public void Hello_world_time_wise()
{
ParseMusicXmlFile("Data/HelloWorldTimeWise.xml").Should().Be("V0 C4w |");
}
[Fact]
public void Schumann_frage_beginning()
{
ParseMusicXmlFile("Data/Frage.xml").Should().Be(
"V0 KEY:Ebmaj G4q 'Warst | F4q. 'du Eb4i 'nicht, Eb4q 'heil Bb4i 'ger G4i |");
}
private string ParseMusicXmlFile(string path)
{
string xml = File.ReadAllText(path);
var patternBuilder = new StaccatoPatternBuilder(xmlParser);
xmlParser.Parse(xml);
return patternBuilder.Pattern.ToString();
}
}
}
|
apache-2.0
|
google/web-prototyping-tool
|
projects/cd-common/src/lib/components/search-box/search-box.module.ts
|
1186
|
/*
* Copyright 2021 Google LLC
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
import { NgModule } from '@angular/core';
import { FormsModule } from '@angular/forms';
import { SearchBoxComponent } from './search-box.component';
import { IconModule } from '../icon/icon.module';
import { ButtonModule } from '../button/button.module';
import { CommonModule } from '@angular/common';
import { InputResetModule } from '../../directives/input-reset/input-reset.module';
@NgModule({
declarations: [SearchBoxComponent],
imports: [FormsModule, IconModule, ButtonModule, CommonModule, InputResetModule],
exports: [SearchBoxComponent],
})
export class SearchBoxModule {}
|
apache-2.0
|
pascalrobert/aribaweb
|
src/aribaweb/src/main/java/ariba/ui/aribaweb/util/Parameters.java
|
5756
|
/*
Copyright 1996-2008 Ariba, Inc.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
$Id: //ariba/platform/ui/aribaweb/ariba/ui/aribaweb/util/Parameters.java#3 $
*/
package ariba.ui.aribaweb.util;
import java.io.Externalizable;
import java.io.IOException;
import java.io.ObjectInput;
import java.io.ObjectOutput;
import java.util.Hashtable;
import java.util.Iterator;
import java.util.List;
import java.util.Map;
import ariba.util.core.Assert;
import ariba.util.core.DebugState;
import ariba.util.core.ListUtil;
import ariba.util.core.MapUtil;
/**
Servlet style parameters from URL or CGI or RFC822 and friends
The parameter names are case insensitive.
We use the java.util classes because the Servlet API requires it.
@aribaapi private
*/
public class Parameters implements Externalizable, DebugState
{
public static final String ClassName = "ariba.ui.aribaweb.util.Parameters";
/**
List of original case names
*/
private java.util.Vector names = new java.util.Vector();
/**
Mapping from case-insensitive names to values
*/
private Hashtable hashtable = new Hashtable();
/**
Any class that implements Externalizable must have
a constructor with no arguments.
*/
public Parameters()
{
}
public Parameters(Map hashtable)
{
Iterator k = hashtable.keySet().iterator();
Iterator e = hashtable.values().iterator();
while (k.hasNext()) {
putParameter((String)k.next(), (String)e.next());
}
}
private Parameters(Hashtable hashtable)
{
}
public void putParameter (String name, String value)
{
String original = name;
name = name.toUpperCase();
if (hashtable.containsKey(name)) {
List vector = (List)hashtable.get(name);
vector.add(value);
return;
}
List vector = ListUtil.list(value);
hashtable.put(name, vector);
names.add(original);
}
public String getParameter (String name)
{
name = name.toUpperCase();
List vector = (List)hashtable.get(name);
if (vector == null) {
return null;
}
Assert.that(vector.size() == 1,
"asked for a multi-valued parameter %s singularly, %s",
name, vector.toString());
return (String)ListUtil.firstElement(vector);
}
public int getParameterCount ()
{
return hashtable.size();
}
public String[] getParameterValues (String name)
{
name = name.toUpperCase();
List vector = (List)hashtable.get(name);
return VectorToStringArray(vector);
}
public Iterator getParameterValuesIterator (String name)
{
name = name.toUpperCase();
List vector = (List)hashtable.get(name);
if (vector == null) {
return null;
}
return vector.iterator();
}
private String[] VectorToStringArray (List vector)
{
if (vector == null) {
return null;
}
int length = vector.size();
String[] strings = new String[length];
vector.toArray(strings);
return strings;
}
public Iterator getParameterNames ()
{
return names.iterator();
}
public String removeParameter (String name)
{
name = name.toUpperCase();
List vector = (List)hashtable.remove(name);
if (vector == null) {
return null;
}
removeName(name);
return (String)ListUtil.firstElement(vector);
}
public String[] removeParameterValues (String name)
{
name = name.toUpperCase();
List vector = (List)hashtable.remove(name);
removeName(name);
return VectorToStringArray(vector);
}
private void removeName (String name)
{
for (int i = 0, s = names.size(); i < s ; i++) {
String string = (String)names.get(i);
if (string.equalsIgnoreCase(name)) {
names.remove(i);
return;
}
}
}
/**
Convenience method which removes the given parameter if it exists,
then puts the new parameter value. Returns the previous parameter
value.
*/
public String replaceParameter (String name, String value)
{
String result = removeParameter(name);
putParameter(name, value);
return result;
}
/**
Implementation of the Externalizable interface
@aribaapi private
*/
public void writeExternal (ObjectOutput output) throws IOException
{
output.writeObject(hashtable);
}
/**
Implementation of the Externalizable interface
@aribaapi private
*/
public void readExternal (ObjectInput input)
throws IOException, ClassNotFoundException
{
hashtable = (Hashtable)input.readObject();
}
public String toString ()
{
return hashtable.toString();
}
public Object debugState ()
{
return MapUtil.map(hashtable);
}
public void clear ()
{
hashtable.clear();
names.clear();
}
}
|
apache-2.0
|
luotao1/Paddle
|
paddle/fluid/operators/top_k_function_cuda.h
|
18898
|
/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License. */
#pragma once
#include <stdio.h>
#include <cstdio>
#include <vector>
#ifdef __NVCC__
#include "cub/cub.cuh"
#endif
#ifdef __HIPCC__
#include <hipcub/hipcub.hpp>
#endif
#include "paddle/fluid/operators/eigen/eigen_function.h"
#include "paddle/fluid/operators/top_k_op.h"
#include "paddle/fluid/platform/device/gpu/gpu_device_function.h"
#include "paddle/fluid/platform/float16.h"
#ifdef __HIPCC__
namespace rocprim {
namespace detail {
template <>
struct radix_key_codec_base<paddle::platform::float16>
: radix_key_codec_integral<paddle::platform::float16, uint16_t> {};
} // namespace detail
} // namespace rocprim
namespace cub = hipcub;
#else
// set cub base traits in order to handle float16
namespace cub {
template <>
struct NumericTraits<paddle::platform::float16>
: BaseTraits<FLOATING_POINT, true, false, uint16_t,
paddle::platform::float16> {};
} // namespace cub
#endif
namespace paddle {
namespace operators {
using Tensor = framework::Tensor;
struct SegmentOffsetIter {
EIGEN_DEVICE_FUNC
explicit SegmentOffsetIter(int num_cols) : num_cols_(num_cols) {}
EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE int operator()(int idx) const {
return idx * num_cols_;
}
int num_cols_;
};
// Iter using into a column
struct ColumnIndexIter {
explicit ColumnIndexIter(int num_cols) : num_cols_(num_cols) {}
EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE int operator()(
const Eigen::array<int, 1>& ix) const {
return ix[0] % num_cols_;
}
int num_cols_;
};
inline static int GetDesiredBlockDim(int dim) {
if (dim > 128) {
return 256;
} else if (dim > 64) {
return 128;
} else if (dim > 32) {
return 64;
} else {
return 32;
}
}
template <typename T>
__global__ void InitIndex(T* indices, T num_rows, T num_cols) {
int col_id = threadIdx.x;
int row_id = blockIdx.x;
for (int64_t j = row_id; j < num_rows; j += gridDim.x) {
for (int64_t i = col_id; i < num_cols; i += blockDim.x) {
indices[j * num_cols + i] = i;
}
}
}
template <typename T>
struct Pair {
__device__ __forceinline__ Pair() {}
__device__ __forceinline__ Pair(T value, int64_t id) : v(value), id(id) {}
__device__ __forceinline__ void set(T value, int64_t id) {
v = value;
id = id;
}
__device__ __forceinline__ void operator=(const Pair<T>& in) {
v = in.v;
id = in.id;
}
__device__ __forceinline__ bool operator<(const T value) const {
return (v < value);
}
__device__ __forceinline__ bool operator>(const T value) const {
return (v > value);
}
__device__ __forceinline__ bool operator<(const Pair<T>& in) const {
return (v < in.v) || ((v == in.v) && (id > in.id));
}
__device__ __forceinline__ bool operator>(const Pair<T>& in) const {
return (v > in.v) || ((v == in.v) && (id < in.id));
}
T v;
int64_t id;
};
template <typename T>
__device__ __forceinline__ void AddTo(Pair<T> topk[], const Pair<T>& p,
int beam_size, const bool& largest) {
for (int k = beam_size - 2; k >= 0; k--) {
if (largest) {
if (topk[k] < p) {
topk[k + 1] = topk[k];
} else {
topk[k + 1] = p;
return;
}
} else {
if (topk[k] > p) {
topk[k + 1] = topk[k];
} else {
topk[k + 1] = p;
return;
}
}
}
topk[0] = p;
}
template <typename T, int BlockSize>
__device__ __forceinline__ void GetTopK(Pair<T> topk[], const T* src, int idx,
int dim, int beam_size,
const bool& largest) {
while (idx < dim) {
if (largest) {
if (topk[beam_size - 1] < src[idx]) {
Pair<T> tmp(src[idx], idx);
AddTo<T>(topk, tmp, beam_size, largest);
}
} else {
if (topk[beam_size - 1] > src[idx]) {
Pair<T> tmp(src[idx], idx);
AddTo<T>(topk, tmp, beam_size, largest);
}
}
idx += BlockSize;
}
}
template <typename T, int BlockSize>
__device__ __forceinline__ void GetTopK(Pair<T> topk[], const T* src, int idx,
int dim, const Pair<T>& max,
int beam_size, const bool& largest) {
while (idx < dim) {
if (largest) {
if (topk[beam_size - 1] < src[idx]) {
Pair<T> tmp(src[idx], idx);
if (tmp < max) {
AddTo<T>(topk, tmp, beam_size, largest);
}
}
} else {
if (topk[beam_size - 1] > src[idx]) {
Pair<T> tmp(src[idx], idx);
if (tmp > max) {
AddTo<T>(topk, tmp, beam_size, largest);
}
}
}
idx += BlockSize;
}
}
template <typename T, int MaxLength, int BlockSize>
__device__ __forceinline__ void ThreadGetTopK(Pair<T> topk[], int* beam,
int beam_size, const T* src,
bool* firstStep, bool* is_empty,
Pair<T>* max, int dim,
const int tid, bool largest) {
if (*beam > 0) {
int length = (*beam) < beam_size ? *beam : beam_size;
if (*firstStep) {
*firstStep = false;
GetTopK<T, BlockSize>(topk, src, tid, dim, length, largest);
} else {
for (int k = 0; k < MaxLength; k++) {
if (k < MaxLength - (*beam)) {
topk[k] = topk[k + *beam];
} else {
topk[k].set(-static_cast<T>(INFINITY), -1);
}
}
if (!(*is_empty)) {
GetTopK<T, BlockSize>(topk + MaxLength - *beam, src, tid, dim, *max,
length, largest);
}
}
*max = topk[MaxLength - 1];
if ((*max).v == -static_cast<T>(1)) *is_empty = true;
*beam = 0;
}
}
template <typename T, int MaxLength, int BlockSize>
__device__ __forceinline__ void BlockReduce(Pair<T>* sh_topk, int* maxid,
Pair<T> topk[], T** topVal,
int64_t** topIds, int* beam, int* k,
const int tid, const int warp,
const bool& largest) {
while (true) {
__syncthreads();
if (tid < BlockSize / 2) {
if (largest) {
if (sh_topk[tid] < sh_topk[tid + BlockSize / 2]) {
maxid[tid] = tid + BlockSize / 2;
} else {
maxid[tid] = tid;
}
} else {
if (sh_topk[tid] > sh_topk[tid + BlockSize / 2]) {
maxid[tid] = tid + BlockSize / 2;
} else {
maxid[tid] = tid;
}
}
}
__syncthreads();
for (int stride = BlockSize / 4; stride > 0; stride = stride / 2) {
if (tid < stride) {
if (largest) {
if (sh_topk[maxid[tid]] < sh_topk[maxid[tid + stride]]) {
maxid[tid] = maxid[tid + stride];
}
} else {
if (sh_topk[maxid[tid]] > sh_topk[maxid[tid + stride]]) {
maxid[tid] = maxid[tid + stride];
}
}
}
__syncthreads();
}
__syncthreads();
if (tid == 0) {
**topVal = sh_topk[maxid[0]].v;
**topIds = sh_topk[maxid[0]].id;
(*topVal)++;
(*topIds)++;
}
if (tid == maxid[0]) (*beam)++;
if (--(*k) == 0) break;
__syncthreads();
if (tid == maxid[0]) {
if (*beam < MaxLength) {
sh_topk[tid] = topk[*beam];
}
}
// NOTE(zcd): temporary solution
unsigned mask = 0u;
CREATE_SHFL_MASK(mask, true);
if (maxid[0] / 32 == warp) {
if (platform::CudaShuffleSync(mask, *beam, (maxid[0]) % 32, 32) ==
MaxLength)
break;
}
}
}
/**
* Each block compute one sample.
* In a block:
* 1. every thread get top MaxLength value;
* 2. merge to sh_topk, block reduce and get max value;
* 3. go to the second setp, until one thread's topk value is null;
* 4. go to the first setp, until get the topk value.
*/
template <typename T, int MaxLength, int BlockSize>
__global__ void KeMatrixTopK(T* output, int output_stride, int64_t* indices,
const T* src, int lds, int dim, int k,
int grid_dim, int num, bool largest = true) {
__shared__ Pair<T> sh_topk[BlockSize];
const int tid = threadIdx.x;
const int warp = threadIdx.x / 32;
const int bid = blockIdx.x;
for (int i = bid; i < num; i += grid_dim) {
int top_num = k;
__shared__ int maxid[BlockSize / 2];
T* out = output + i * output_stride;
int64_t* inds = indices + i * k;
Pair<T> topk[MaxLength];
int beam = MaxLength;
Pair<T> max;
bool is_empty = false;
bool firststep = true;
for (int j = 0; j < MaxLength; j++) {
if (largest) {
topk[j].set(-static_cast<T>(INFINITY), -1);
} else {
topk[j].set(static_cast<T>(INFINITY), -1);
}
}
while (top_num) {
ThreadGetTopK<T, MaxLength, BlockSize>(topk, &beam, k, src + i * lds,
&firststep, &is_empty, &max, dim,
tid, largest);
sh_topk[tid] = topk[0];
BlockReduce<T, MaxLength, BlockSize>(sh_topk, maxid, topk, &out, &inds,
&beam, &top_num, tid, warp, largest);
}
}
}
template <typename T, int MaxLength, int BlockSize>
__global__ void AssignGrad(T* x_grad, const int64_t* indices, const T* out_grad,
size_t rows, size_t cols, size_t k) {
for (size_t i = 0; i < rows; ++i) {
for (size_t j = 0; j < cols; ++j) {
x_grad[i * cols + j] = 0;
}
__syncthreads();
for (size_t j = 0; j < k; ++j) {
size_t idx = indices[i * k + j];
x_grad[i * cols + idx] = out_grad[i * k + j];
}
}
}
// the grad assign with the axis
template <typename T>
__global__ void AssignGradWithAxis(const T* grad_out, const int64_t* indices,
T* grad_in, int pre, int post,
int raw_height, int k) {
// raw_height is the length of topk axis
for (int i = blockIdx.x; i < pre; i += gridDim.x) {
int base_index = i * post * k;
int base_grad = i * post * raw_height;
for (int j = threadIdx.x; j < raw_height * post; j += blockDim.x) {
grad_in[base_grad + j] = static_cast<T>(0);
}
__syncthreads();
for (int j = threadIdx.x; j < k * post; j += blockDim.x) {
int64_t idx_ij = indices[base_index + j];
int64_t in_ij = base_grad + (idx_ij * post) + (j % post);
grad_in[in_ij] = grad_out[base_index + j];
}
}
}
// use the radix sort for the topk
template <typename T>
bool SortTopk(const platform::CUDADeviceContext& ctx,
const framework::Tensor* input_tensor, const int64_t num_cols,
const int64_t num_rows, const int k,
framework::Tensor* out_tensor, framework::Tensor* indices_tensor,
bool largest = true) {
auto cu_stream = ctx.stream();
Tensor input_indices;
const std::vector<int64_t> dims = {num_rows, num_cols};
auto dim = framework::make_ddim(dims);
input_indices.Resize(dim);
// input_indices.Resize(num_rows*num_cols);
input_indices.mutable_data<int64_t>(ctx.GetPlace());
size_t temp_storage_bytes = -1;
auto ComputeBlockSize = [](int col) {
if (col > 512)
return 1024;
else if (col > 256 && col <= 512)
return 512;
else if (col > 128 && col <= 256)
return 256;
else if (col > 64 && col <= 128)
return 128;
else
return 64;
};
int block_size = ComputeBlockSize(num_cols);
unsigned int maxGridDimX = ctx.GetCUDAMaxGridDimSize().x;
// actually, int num_rows < max_grid_size
unsigned int grid_size = num_rows < maxGridDimX
? static_cast<unsigned int>(num_rows)
: maxGridDimX;
// Init a index array
InitIndex<int64_t><<<grid_size, block_size, 0, cu_stream>>>(
input_indices.data<int64_t>(), num_rows, num_cols);
// create iter for counting input
cub::CountingInputIterator<int64_t> counting_iter(0);
// segment_offset is used for move to next row
cub::TransformInputIterator<int64_t, SegmentOffsetIter,
cub::CountingInputIterator<int64_t>>
segment_offsets_t(counting_iter, SegmentOffsetIter(num_cols));
T* sorted_values_ptr;
int64_t* sorted_indices_ptr;
Tensor temp_values;
Tensor temp_indices;
const T* input = input_tensor->data<T>();
T* values = out_tensor->data<T>();
int64_t* indices = indices_tensor->mutable_data<int64_t>(ctx.GetPlace());
if (k == num_cols) {
// Doing a full sort.
sorted_values_ptr = values;
sorted_indices_ptr = indices;
} else {
temp_values.Resize(dim);
temp_indices.Resize(dim);
sorted_values_ptr = temp_values.mutable_data<T>(ctx.GetPlace());
sorted_indices_ptr = temp_indices.mutable_data<int64_t>(ctx.GetPlace());
}
// Get temp storage buffer size, maybe can allocate a fixed buffer to save
// time.
if (largest) {
auto err = cub::DeviceSegmentedRadixSort::SortPairsDescending(
nullptr, temp_storage_bytes, input, sorted_values_ptr,
input_indices.data<int64_t>(), sorted_indices_ptr, num_cols * num_rows,
num_rows, segment_offsets_t, segment_offsets_t + 1, 0, sizeof(T) * 8,
cu_stream);
#ifdef __HIPCC__
if (err != hipSuccess) {
LOG(ERROR) << "TopKOP failed as could not launch "
"hipcub::DeviceSegmentedRadixSort::SortPairsDescending to "
"calculate "
"temp_storage_bytes, status: "
<< hipGetErrorString(err);
return false;
}
#else
if (err != cudaSuccess) {
LOG(ERROR)
<< "TopKOP failed as could not launch "
"cub::DeviceSegmentedRadixSort::SortPairsDescending to calculate "
"temp_storage_bytes, status: "
<< cudaGetErrorString(err);
return false;
}
#endif
} else {
auto err = cub::DeviceSegmentedRadixSort::SortPairs(
nullptr, temp_storage_bytes, input, sorted_values_ptr,
input_indices.data<int64_t>(), sorted_indices_ptr, num_cols * num_rows,
num_rows, segment_offsets_t, segment_offsets_t + 1, 0, sizeof(T) * 8,
cu_stream);
#ifdef __HIPCC__
if (err != hipSuccess) {
LOG(ERROR) << "TopKOP failed as could not launch "
"hipcub::DeviceSegmentedRadixSort::SortPairs to calculate "
"temp_storage_bytes, status: "
<< hipGetErrorString(err);
return false;
}
#else
if (err != cudaSuccess) {
LOG(ERROR) << "TopKOP failed as could not launch "
"cub::DeviceSegmentedRadixSort::SortPairs to calculate "
"temp_storage_bytes, status: "
<< cudaGetErrorString(err);
return false;
}
#endif
}
Tensor temp_storage;
temp_storage.mutable_data<uint8_t>(ctx.GetPlace(), temp_storage_bytes);
if (largest) {
auto err = cub::DeviceSegmentedRadixSort::SortPairsDescending(
temp_storage.data<uint8_t>(), temp_storage_bytes, input,
sorted_values_ptr, input_indices.data<int64_t>(), sorted_indices_ptr,
num_cols * num_rows, num_rows, segment_offsets_t, segment_offsets_t + 1,
0, sizeof(T) * 8, cu_stream);
#ifdef __HIPCC__
if (err != hipSuccess) {
LOG(ERROR) << "TopKOP failed as could not launch "
"hipcub::DeviceSegmentedRadixSort::SortPairsDescending to "
"sort input, "
"temp_storage_bytes: "
<< temp_storage_bytes
<< ", status: " << hipGetErrorString(err);
return false;
}
#else
if (err != cudaSuccess) {
LOG(ERROR) << "TopKOP failed as could not launch "
"cub::DeviceSegmentedRadixSort::SortPairsDescending to "
"sort input, "
"temp_storage_bytes: "
<< temp_storage_bytes
<< ", status: " << cudaGetErrorString(err);
return false;
}
#endif
} else {
auto err = cub::DeviceSegmentedRadixSort::SortPairs(
temp_storage.data<uint8_t>(), temp_storage_bytes, input,
sorted_values_ptr, input_indices.data<int64_t>(), sorted_indices_ptr,
num_cols * num_rows, num_rows, segment_offsets_t, segment_offsets_t + 1,
0, sizeof(T) * 8, cu_stream);
#ifdef __HIPCC__
if (err != hipSuccess) {
LOG(ERROR) << "TopKOP failed as could not launch "
"hipcub::DeviceSegmentedRadixSort::SortPairs to "
"sort input, "
"temp_storage_bytes: "
<< temp_storage_bytes
<< ", status: " << hipGetErrorString(err);
return false;
}
#else
if (err != cudaSuccess) {
LOG(ERROR) << "TopKOP failed as could not launch "
"cub::DeviceSegmentedRadixSort::SortPairs to "
"sort input, "
"temp_storage_bytes: "
<< temp_storage_bytes
<< ", status: " << cudaGetErrorString(err);
return false;
}
#endif
}
auto& dev = *ctx.eigen_device();
if (k < num_cols) {
// copy sliced data to output.
const Eigen::DSizes<Eigen::DenseIndex, 2> slice_indices{0, 0};
const Eigen::DSizes<Eigen::DenseIndex, 2> slice_sizes{num_rows, k};
auto e_indices =
framework::EigenMatrix<int64_t>::From(*indices_tensor, dim);
auto e_tmp_indices = framework::EigenMatrix<int64_t>::From(
static_cast<const Tensor>(temp_indices));
std::vector<int> odims = {static_cast<int>(num_rows), static_cast<int>(k)};
auto dim = framework::make_ddim(odims);
auto e_values = framework::EigenMatrix<T>::From(*out_tensor, dim);
auto e_tmp_values =
framework::EigenMatrix<T>::From(static_cast<const Tensor>(temp_values));
EigenSlice<std::decay_t<decltype(dev)>, int64_t, 2>::Eval(
dev, e_indices, e_tmp_indices, slice_indices, slice_sizes);
EigenSlice<std::decay_t<decltype(dev)>, T, 2>::Eval(
dev, e_values, e_tmp_values, slice_indices, slice_sizes);
}
return true;
}
} // namespace operators
} // namespace paddle
|
apache-2.0
|
joy-inc/joy-library
|
library-joy/src/main/java/com/joy/library/share/weibo/openapi/legacy/AccountAPI.java
|
4811
|
/*
* Copyright (C) 2010-2013 The SINA WEIBO Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package com.joy.library.share.weibo.openapi.legacy;
import android.content.Context;
import android.text.TextUtils;
import com.sina.weibo.sdk.auth.Oauth2AccessToken;
import com.sina.weibo.sdk.net.RequestListener;
import com.sina.weibo.sdk.net.WeiboParameters;
import com.joy.library.share.weibo.openapi.AbsOpenAPI;
/**
* 此类封装了账号的接口，详情见<a href="http://t.cn/8F1Egjs">账号接口</a>
*
* @author SINA
* @date 2014-03-03
*/
public class AccountAPI extends AbsOpenAPI {
/** 学校类型，1：大学、2：高中、3：中专技校、4：初中、5：小学，默认为1。 */
public static final int SCHOOL_TYPE_COLLEGE = 1;
public static final int SCHOOL_TYPE_SENIOR = 2;
public static final int SCHOOL_TYPE_TECHNICAL = 3;
public static final int SCHOOL_TYPE_JUNIOR = 4;
public static final int SCHOOL_TYPE_PRIMARY = 5;
/** 学校首字母，默认为A。 */
public enum CAPITAL {
A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S, T, U, V, W, X, Y, Z
}
private static final String SERVER_URL_PRIX = API_SERVER + "/account";
public AccountAPI(Context context, String appKey, Oauth2AccessToken accessToken) {
super(context, appKey, accessToken);
}
/**
* 获取当前登录用户的隐私设置。
*
* @param listener 异步请求回调接口
*/
public void getPrivacy(RequestListener listener) {
requestAsync(SERVER_URL_PRIX + "/get_privacy.json", new WeiboParameters(mAppKey), HTTPMETHOD_GET, listener);
}
/**
* 获取所有的学校列表。
* NOTE：参数keyword与capital二者必选其一，且只能选其一 按首字母capital查询时，必须提供province参数
*
* @param province 省份范围，省份ID
* @param city 城市范围，城市ID
* @param area 区域范围，区ID
* @param schoolType 学校类型，可为以下几种： 1：大学，2：高中，3：中专技校，4：初中，5：小学
* <li> {@link #SCHOOL_TYPE_COLLEGE}
* <li> {@link #SCHOOL_TYPE_SENIOR}
* <li> {@link #SCHOOL_TYPE_TECHNICAL}
* <li> {@link #SCHOOL_TYPE_JUNIOR}
* <li> {@link #SCHOOL_TYPE_PRIMARY}
* @param capital 学校首字母，默认为A
* @param keyword 学校名称关键字
* @param count 返回的记录条数，默认为10
* @param listener 异步请求回调接口
*/
public void schoolList(int province, int city, int area, int schoolType, CAPITAL capital, String keyword,
int count, RequestListener listener) {
WeiboParameters params = new WeiboParameters(mAppKey);
params.put("province", province);
params.put("city", city);
params.put("area", area);
params.put("type", schoolType);
if (!TextUtils.isEmpty(capital.name())) {
params.put("capital", capital.name());
} else if (!TextUtils.isEmpty(keyword)) {
params.put("keyword", keyword);
}
params.put("count", count);
requestAsync(SERVER_URL_PRIX + "/profile/school_list.json", params, HTTPMETHOD_GET, listener);
}
/**
* 获取当前登录用户的API访问频率限制情况。
*
* @param listener 异步请求回调接口
*/
public void rateLimitStatus(RequestListener listener) {
requestAsync(SERVER_URL_PRIX + "/rate_limit_status.json", new WeiboParameters(mAppKey), HTTPMETHOD_GET, listener);
}
/**
* OAuth授权之后，获取授权用户的UID。
*
* @param listener 异步请求回调接口
*/
public void getUid(RequestListener listener) {
requestAsync(SERVER_URL_PRIX + "/get_uid.json", new WeiboParameters(mAppKey), HTTPMETHOD_GET, listener);
}
/**
* 退出登录。
*
* @param listener 异步请求回调接口
*/
public void endSession(RequestListener listener) {
requestAsync(SERVER_URL_PRIX + "/end_session.json", new WeiboParameters(mAppKey), HTTPMETHOD_POST, listener);
}
}
|
apache-2.0
|
LMAX-Exchange/elementspec
|
src/test/java/com/lmax/elementspec/CssTokenTest.java
|
4529
|
/*
* Copyright 2015 LMAX Ltd.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package com.lmax.elementspec;
import org.junit.Test;
import static org.hamcrest.CoreMatchers.is;
import static org.junit.Assert.assertThat;
import static com.lmax.elementspec.CssToken.AN_ELEMENT;
public class CssTokenTest
{
@Test
public void shouldBeStarWhenNoOtherConditionsSpecified() throws Exception
{
assertCss(AN_ELEMENT, "*");
}
@Test
public void shouldBeTagNameWhenOnlyTagNameIsSpecified() throws Exception
{
assertCss(AN_ELEMENT.withTagName("input"), "input");
}
@Test
public void shouldCreateSimpleClassSelector() throws Exception
{
assertCss(AN_ELEMENT.withClass("a"), ".a");
}
@Test
public void shouldCreateMultipleClassSelectors() throws Exception
{
assertCss(AN_ELEMENT.withClass("a").withClass("b").withClass("c"), ".a.b.c");
}
@Test
public void shouldCombineTagNameAndSingleClass() throws Exception
{
assertCss(AN_ELEMENT.withTagName("input").withClass("aclass"), "input.aclass");
}
@Test
public void shouldCombineTagNameAndMultipleClasses() throws Exception
{
assertCss(AN_ELEMENT.withTagName("input").withClass("a").withClass("b").withClass("c"), "input.a.b.c");
}
@Test
public void shouldCreateIdSelector() throws Exception
{
assertCss(AN_ELEMENT.withId("myid"), "#myid");
}
@Test
public void shouldCombineTagNameAndId() throws Exception
{
assertCss(AN_ELEMENT.withTagName("input").withId("myid"), "input#myid");
}
@Test
public void shouldCombineTagNameIdAndMultipleClasses() throws Exception
{
assertCss(AN_ELEMENT.withTagName("input").withId("myid").withClass("a").withClass("b").withClass("c"), "input#myid.a.b.c");
}
@Test
public void shouldCreatePseudoClassSelector() throws Exception
{
assertCss(AN_ELEMENT.withPseudoClass(":nth-child(3)"), ":nth-child(3)");
}
@Test
public void shouldCreateMultiplePseudoClassSelector() throws Exception
{
assertCss(AN_ELEMENT.withPseudoClass(":nth-child(3)").withPseudoClass(":checked"), ":nth-child(3):checked");
}
@Test
public void shouldCombineTagNameAndMultiplePseudoClasses() throws Exception
{
assertCss(AN_ELEMENT.withTagName("input").withPseudoClass(":nth-child(3)").withPseudoClass(":checked"), "input:nth-child(3):checked");
}
@Test
public void shouldCombineTagNameIdMultipleClassesAndMultiplePseudoClasses() throws Exception
{
assertCss(AN_ELEMENT.withTagName("input").withId("foo").withClass("a").withClass("b").withPseudoClass(":nth-child(3)").withPseudoClass(":checked"), "input#foo.a.b:nth-child(3):checked");
}
@Test
public void shouldCreateAttributeCondition() throws Exception
{
assertCss(AN_ELEMENT.withAttributeCondition("name"), "*[name]");
}
@Test
public void shouldCreateMultipleAttributeConditions() throws Exception
{
assertCss(AN_ELEMENT.withAttributeCondition("name").withAttributeCondition("x=\"y\""), "*[name][x=\"y\"]");
}
@Test
public void shouldUseRelationshipSelector() throws Exception
{
assertCss(AN_ELEMENT.withRelationship(">"), "> *");
}
@Test
public void shouldCombineEverything() throws Exception
{
assertCss(AN_ELEMENT
.withRelationship("+")
.withTagName("input")
.withId("foo")
.withClass("a").withClass("b")
.withPseudoClass(":nth-child(3)").withPseudoClass(":checked")
.withAttributeCondition("name").withAttributeCondition("x=\"y\""),
"+ input#foo.a.b:nth-child(3):checked[name][x=\"y\"]");
}
private void assertCss(final CssToken token, final String expected)
{
assertThat(token.toString(), is(expected));
}
}
|
apache-2.0
|
SuperMap/Fdo_SuperMap
|
源代码/Thirdparty/UGC/inc/FileParser/UGFileParse.h
|
3139
|
/*!
**************************************************************************************
\file UGFileParse.h
**************************************************************************************
\author °¬¹ú
\brief Îļþ½âÎö»ùÀà
\remarks <br>
----------------------------------------------------------------------------------<br>
Revision History : <br>
2005-04-22 °¬¹ú Initial Version. <br>
<br>
----------------------------------------------------------------------------------<br>
Copyright (c) 1996-2004 SuperMap GIS Technologies,Inc. <br>
----------------------------------------------------------------------------------<br>
**************************************************************************************
*/
#if !defined(AFX_UGFILEPARSE_H__F2ACB033_F582_4263_B9E9_DCA2E56F87DE__INCLUDED_)
#define AFX_UGFILEPARSE_H__F2ACB033_F582_4263_B9E9_DCA2E56F87DE__INCLUDED_
#include "Base/ugexports.h"
#include "Base/UGString.h"
#include "Base/UGVariant.h"
#include "Base/UGArray.h"
#include "Algorithm/UGRect2D.h"
namespace UGC {
class FILEPARSER_API UGFileParse
{
public:
UGFileParse();
virtual ~UGFileParse();
public:
//! \brief ÉèÖÃÁÙʱ·¾¶
virtual void SetTempPath(const UGString& strTempPath);
//! \brief ÉèÖõ¼³öµÄ°æ±¾
virtual void SetImportVersion(UGint nVersion);
//! \brief ÉèÖÃÒ»¸öÆäËûµÄ²ÎÊý£¨¿ÉÒÔÊÇÌØÊâµÄ¸ñʽºÍÓû§×Ô¶¨Òå²ÎÊý£©
virtual void SetOneParam(const UGString& strFileType, const UGString& strName, const UGVariant& varValue);
public:
//////////////////////////////////////////////////////////////////////////
// ¶ÁÈ¡º¯Êý
//////////////////////////////////////////////////////////////////////////
//! \brief ×¼±¸¶ÁÈ¡Ò»¸öÊý¾ÝÎļþ
virtual UGbool OpenForRead(const UGString& strFileName);
//! \brief µÃµ½Í¼²ãµÄÊýÄ¿
virtual UGint GetLayerCount();
//! \brief µÃµ½Ö¸¶¨ÐòºÅµÄͼ²ãÐÅÏ¢¡£
virtual UGbool GetLayerInfo(UGint nIndex, UGString& strLayerName,
UGint& nLayerType, UGString& strSubName);
//////////////////////////////////////////////////////////////////////////
// дÈ뺯Êý
//////////////////////////////////////////////////////////////////////////
//! \brief ×¼±¸Ð´ÈëÒ»¸öÊý¾ÝÎļþ
virtual UGbool OpenForWrite(const UGString& strFileName);
//! \brief ÉèÖÃͼ²ãÊýÁ¿¡£
virtual void SetLayerCount(UGint nCount);
//! \brief ÉèÖÃÖ¸¶¨Í¼²ãÐòºÅµÄͼ²ãÐÅÏ¢¡£
virtual void SetLayerInfo(UGint nIndex,
const UGString& strLayerName, UGint nLayerType,
const UGRect2D& rcBounds,
const UGString& strSubName);
//! \brief ¹Ø±ÕÎļþ
virtual void Close();
protected:
//! \brief ÁÙʱÎļþĿ¼
UGString m_strTempPath;
//! \brief ÉèÖð汾
UGint m_nVersion;
};
} //namespace UGC
#endif // !defined(AFX_UGFILEPARSE_H__F2ACB033_F582_4263_B9E9_DCA2E56F87DE__INCLUDED_)
|
apache-2.0
|
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