python_code
stringlengths 0
1.8M
| repo_name
stringclasses 7
values | file_path
stringlengths 5
99
|
|---|---|---|
// SPDX-License-Identifier: GPL-2.0
/*
* MaxLinear MxL301RF OFDM tuner driver
*
* Copyright (C) 2014 Akihiro Tsukada <[email protected]>
*/
/*
* NOTICE:
* This driver is incomplete and lacks init/config of the chips,
* as the necessary info is not disclosed.
* Other features like get_if_frequency() are missing as well.
* It assumes that users of this driver (such as a PCI bridge of
* DTV receiver cards) properly init and configure the chip
* via I2C *before* calling this driver's init() function.
*
* Currently, PT3 driver is the only one that uses this driver,
* and contains init/config code in its firmware.
* Thus some part of the code might be dependent on PT3 specific config.
*/
#include <linux/kernel.h>
#include "mxl301rf.h"
struct mxl301rf_state {
struct mxl301rf_config cfg;
struct i2c_client *i2c;
};
static struct mxl301rf_state *cfg_to_state(struct mxl301rf_config *c)
{
return container_of(c, struct mxl301rf_state, cfg);
}
static int raw_write(struct mxl301rf_state *state, const u8 *buf, int len)
{
int ret;
ret = i2c_master_send(state->i2c, buf, len);
if (ret >= 0 && ret < len)
ret = -EIO;
return (ret == len) ? 0 : ret;
}
static int reg_write(struct mxl301rf_state *state, u8 reg, u8 val)
{
u8 buf[2] = { reg, val };
return raw_write(state, buf, 2);
}
static int reg_read(struct mxl301rf_state *state, u8 reg, u8 *val)
{
u8 wbuf[2] = { 0xfb, reg };
int ret;
ret = raw_write(state, wbuf, sizeof(wbuf));
if (ret == 0)
ret = i2c_master_recv(state->i2c, val, 1);
if (ret >= 0 && ret < 1)
ret = -EIO;
return (ret == 1) ? 0 : ret;
}
/* tuner_ops */
/* get RSSI and update propery cache, set to *out in % */
static int mxl301rf_get_rf_strength(struct dvb_frontend *fe, u16 *out)
{
struct mxl301rf_state *state;
int ret;
u8 rf_in1, rf_in2, rf_off1, rf_off2;
u16 rf_in, rf_off;
s64 level;
struct dtv_fe_stats *rssi;
rssi = &fe->dtv_property_cache.strength;
rssi->len = 1;
rssi->stat[0].scale = FE_SCALE_NOT_AVAILABLE;
*out = 0;
state = fe->tuner_priv;
ret = reg_write(state, 0x14, 0x01);
if (ret < 0)
return ret;
usleep_range(1000, 2000);
ret = reg_read(state, 0x18, &rf_in1);
if (ret == 0)
ret = reg_read(state, 0x19, &rf_in2);
if (ret == 0)
ret = reg_read(state, 0xd6, &rf_off1);
if (ret == 0)
ret = reg_read(state, 0xd7, &rf_off2);
if (ret != 0)
return ret;
rf_in = (rf_in2 & 0x07) << 8 | rf_in1;
rf_off = (rf_off2 & 0x0f) << 5 | (rf_off1 >> 3);
level = rf_in - rf_off - (113 << 3); /* x8 dBm */
level = level * 1000 / 8;
rssi->stat[0].svalue = level;
rssi->stat[0].scale = FE_SCALE_DECIBEL;
/* *out = (level - min) * 100 / (max - min) */
*out = (rf_in - rf_off + (1 << 9) - 1) * 100 / ((5 << 9) - 2);
return 0;
}
/* spur shift parameters */
struct shf {
u32 freq; /* Channel center frequency */
u32 ofst_th; /* Offset frequency threshold */
u8 shf_val; /* Spur shift value */
u8 shf_dir; /* Spur shift direction */
};
static const struct shf shf_tab[] = {
{ 64500, 500, 0x92, 0x07 },
{ 191500, 300, 0xe2, 0x07 },
{ 205500, 500, 0x2c, 0x04 },
{ 212500, 500, 0x1e, 0x04 },
{ 226500, 500, 0xd4, 0x07 },
{ 99143, 500, 0x9c, 0x07 },
{ 173143, 500, 0xd4, 0x07 },
{ 191143, 300, 0xd4, 0x07 },
{ 207143, 500, 0xce, 0x07 },
{ 225143, 500, 0xce, 0x07 },
{ 243143, 500, 0xd4, 0x07 },
{ 261143, 500, 0xd4, 0x07 },
{ 291143, 500, 0xd4, 0x07 },
{ 339143, 500, 0x2c, 0x04 },
{ 117143, 500, 0x7a, 0x07 },
{ 135143, 300, 0x7a, 0x07 },
{ 153143, 500, 0x01, 0x07 }
};
struct reg_val {
u8 reg;
u8 val;
} __attribute__ ((__packed__));
static const struct reg_val set_idac[] = {
{ 0x0d, 0x00 },
{ 0x0c, 0x67 },
{ 0x6f, 0x89 },
{ 0x70, 0x0c },
{ 0x6f, 0x8a },
{ 0x70, 0x0e },
{ 0x6f, 0x8b },
{ 0x70, 0x1c },
};
static int mxl301rf_set_params(struct dvb_frontend *fe)
{
struct reg_val tune0[] = {
{ 0x13, 0x00 }, /* abort tuning */
{ 0x3b, 0xc0 },
{ 0x3b, 0x80 },
{ 0x10, 0x95 }, /* BW */
{ 0x1a, 0x05 },
{ 0x61, 0x00 }, /* spur shift value (placeholder) */
{ 0x62, 0xa0 } /* spur shift direction (placeholder) */
};
struct reg_val tune1[] = {
{ 0x11, 0x40 }, /* RF frequency L (placeholder) */
{ 0x12, 0x0e }, /* RF frequency H (placeholder) */
{ 0x13, 0x01 } /* start tune */
};
struct mxl301rf_state *state;
u32 freq;
u16 f;
u32 tmp, div;
int i, ret;
state = fe->tuner_priv;
freq = fe->dtv_property_cache.frequency;
/* spur shift function (for analog) */
for (i = 0; i < ARRAY_SIZE(shf_tab); i++) {
if (freq >= (shf_tab[i].freq - shf_tab[i].ofst_th) * 1000 &&
freq <= (shf_tab[i].freq + shf_tab[i].ofst_th) * 1000) {
tune0[5].val = shf_tab[i].shf_val;
tune0[6].val = 0xa0 | shf_tab[i].shf_dir;
break;
}
}
ret = raw_write(state, (u8 *) tune0, sizeof(tune0));
if (ret < 0)
goto failed;
usleep_range(3000, 4000);
/* convert freq to 10.6 fixed point float [MHz] */
f = freq / 1000000;
tmp = freq % 1000000;
div = 1000000;
for (i = 0; i < 6; i++) {
f <<= 1;
div >>= 1;
if (tmp > div) {
tmp -= div;
f |= 1;
}
}
if (tmp > 7812)
f++;
tune1[0].val = f & 0xff;
tune1[1].val = f >> 8;
ret = raw_write(state, (u8 *) tune1, sizeof(tune1));
if (ret < 0)
goto failed;
msleep(31);
ret = reg_write(state, 0x1a, 0x0d);
if (ret < 0)
goto failed;
ret = raw_write(state, (u8 *) set_idac, sizeof(set_idac));
if (ret < 0)
goto failed;
return 0;
failed:
dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
__func__, fe->dvb->num, fe->id);
return ret;
}
static const struct reg_val standby_data[] = {
{ 0x01, 0x00 },
{ 0x13, 0x00 }
};
static int mxl301rf_sleep(struct dvb_frontend *fe)
{
struct mxl301rf_state *state;
int ret;
state = fe->tuner_priv;
ret = raw_write(state, (u8 *)standby_data, sizeof(standby_data));
if (ret < 0)
dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
__func__, fe->dvb->num, fe->id);
return ret;
}
/* init sequence is not public.
* the parent must have init'ed the device.
* just wake up here.
*/
static int mxl301rf_init(struct dvb_frontend *fe)
{
struct mxl301rf_state *state;
int ret;
state = fe->tuner_priv;
ret = reg_write(state, 0x01, 0x01);
if (ret < 0) {
dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
__func__, fe->dvb->num, fe->id);
return ret;
}
return 0;
}
/* I2C driver functions */
static const struct dvb_tuner_ops mxl301rf_ops = {
.info = {
.name = "MaxLinear MxL301RF",
.frequency_min_hz = 93 * MHz,
.frequency_max_hz = 803 * MHz + 142857,
},
.init = mxl301rf_init,
.sleep = mxl301rf_sleep,
.set_params = mxl301rf_set_params,
.get_rf_strength = mxl301rf_get_rf_strength,
};
static int mxl301rf_probe(struct i2c_client *client)
{
struct mxl301rf_state *state;
struct mxl301rf_config *cfg;
struct dvb_frontend *fe;
state = kzalloc(sizeof(*state), GFP_KERNEL);
if (!state)
return -ENOMEM;
state->i2c = client;
cfg = client->dev.platform_data;
memcpy(&state->cfg, cfg, sizeof(state->cfg));
fe = cfg->fe;
fe->tuner_priv = state;
memcpy(&fe->ops.tuner_ops, &mxl301rf_ops, sizeof(mxl301rf_ops));
i2c_set_clientdata(client, &state->cfg);
dev_info(&client->dev, "MaxLinear MxL301RF attached.\n");
return 0;
}
static void mxl301rf_remove(struct i2c_client *client)
{
struct mxl301rf_state *state;
state = cfg_to_state(i2c_get_clientdata(client));
state->cfg.fe->tuner_priv = NULL;
kfree(state);
}
static const struct i2c_device_id mxl301rf_id[] = {
{"mxl301rf", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, mxl301rf_id);
static struct i2c_driver mxl301rf_driver = {
.driver = {
.name = "mxl301rf",
},
.probe = mxl301rf_probe,
.remove = mxl301rf_remove,
.id_table = mxl301rf_id,
};
module_i2c_driver(mxl301rf_driver);
MODULE_DESCRIPTION("MaxLinear MXL301RF tuner");
MODULE_AUTHOR("Akihiro TSUKADA");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/mxl301rf.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Sharp QM1D1C0042 8PSK tuner driver
*
* Copyright (C) 2014 Akihiro Tsukada <[email protected]>
*/
/*
* NOTICE:
* As the disclosed information on the chip is very limited,
* this driver lacks some features, including chip config like IF freq.
* It assumes that users of this driver (such as a PCI bridge of
* DTV receiver cards) know the relevant info and
* configure the chip via I2C if necessary.
*
* Currently, PT3 driver is the only one that uses this driver,
* and contains init/config code in its firmware.
* Thus some part of the code might be dependent on PT3 specific config.
*/
#include <linux/kernel.h>
#include <linux/math64.h>
#include "qm1d1c0042.h"
#define QM1D1C0042_NUM_REGS 0x20
#define QM1D1C0042_NUM_REG_ROWS 2
static const u8
reg_initval[QM1D1C0042_NUM_REG_ROWS][QM1D1C0042_NUM_REGS] = { {
0x48, 0x1c, 0xa0, 0x10, 0xbc, 0xc5, 0x20, 0x33,
0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
0x00, 0xff, 0xf3, 0x00, 0x2a, 0x64, 0xa6, 0x86,
0x8c, 0xcf, 0xb8, 0xf1, 0xa8, 0xf2, 0x89, 0x00
}, {
0x68, 0x1c, 0xc0, 0x10, 0xbc, 0xc1, 0x11, 0x33,
0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
0x00, 0xff, 0xf3, 0x00, 0x3f, 0x25, 0x5c, 0xd6,
0x55, 0xcf, 0x95, 0xf6, 0x36, 0xf2, 0x09, 0x00
}
};
static int reg_index;
static const struct qm1d1c0042_config default_cfg = {
.xtal_freq = 16000,
.lpf = 1,
.fast_srch = 0,
.lpf_wait = 20,
.fast_srch_wait = 4,
.normal_srch_wait = 15,
};
struct qm1d1c0042_state {
struct qm1d1c0042_config cfg;
struct i2c_client *i2c;
u8 regs[QM1D1C0042_NUM_REGS];
};
static struct qm1d1c0042_state *cfg_to_state(struct qm1d1c0042_config *c)
{
return container_of(c, struct qm1d1c0042_state, cfg);
}
static int reg_write(struct qm1d1c0042_state *state, u8 reg, u8 val)
{
u8 wbuf[2] = { reg, val };
int ret;
ret = i2c_master_send(state->i2c, wbuf, sizeof(wbuf));
if (ret >= 0 && ret < sizeof(wbuf))
ret = -EIO;
return (ret == sizeof(wbuf)) ? 0 : ret;
}
static int reg_read(struct qm1d1c0042_state *state, u8 reg, u8 *val)
{
struct i2c_msg msgs[2] = {
{
.addr = state->i2c->addr,
.flags = 0,
.buf = ®,
.len = 1,
},
{
.addr = state->i2c->addr,
.flags = I2C_M_RD,
.buf = val,
.len = 1,
},
};
int ret;
ret = i2c_transfer(state->i2c->adapter, msgs, ARRAY_SIZE(msgs));
if (ret >= 0 && ret < ARRAY_SIZE(msgs))
ret = -EIO;
return (ret == ARRAY_SIZE(msgs)) ? 0 : ret;
}
static int qm1d1c0042_set_srch_mode(struct qm1d1c0042_state *state, bool fast)
{
if (fast)
state->regs[0x03] |= 0x01; /* set fast search mode */
else
state->regs[0x03] &= ~0x01 & 0xff;
return reg_write(state, 0x03, state->regs[0x03]);
}
static int qm1d1c0042_wakeup(struct qm1d1c0042_state *state)
{
int ret;
state->regs[0x01] |= 1 << 3; /* BB_Reg_enable */
state->regs[0x01] &= (~(1 << 0)) & 0xff; /* NORMAL (wake-up) */
state->regs[0x05] &= (~(1 << 3)) & 0xff; /* pfd_rst NORMAL */
ret = reg_write(state, 0x01, state->regs[0x01]);
if (ret == 0)
ret = reg_write(state, 0x05, state->regs[0x05]);
if (ret < 0)
dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
__func__, state->cfg.fe->dvb->num, state->cfg.fe->id);
return ret;
}
/* tuner_ops */
static int qm1d1c0042_set_config(struct dvb_frontend *fe, void *priv_cfg)
{
struct qm1d1c0042_state *state;
struct qm1d1c0042_config *cfg;
state = fe->tuner_priv;
cfg = priv_cfg;
if (cfg->fe)
state->cfg.fe = cfg->fe;
if (cfg->xtal_freq != QM1D1C0042_CFG_XTAL_DFLT)
dev_warn(&state->i2c->dev,
"(%s) changing xtal_freq not supported. ", __func__);
state->cfg.xtal_freq = default_cfg.xtal_freq;
state->cfg.lpf = cfg->lpf;
state->cfg.fast_srch = cfg->fast_srch;
if (cfg->lpf_wait != QM1D1C0042_CFG_WAIT_DFLT)
state->cfg.lpf_wait = cfg->lpf_wait;
else
state->cfg.lpf_wait = default_cfg.lpf_wait;
if (cfg->fast_srch_wait != QM1D1C0042_CFG_WAIT_DFLT)
state->cfg.fast_srch_wait = cfg->fast_srch_wait;
else
state->cfg.fast_srch_wait = default_cfg.fast_srch_wait;
if (cfg->normal_srch_wait != QM1D1C0042_CFG_WAIT_DFLT)
state->cfg.normal_srch_wait = cfg->normal_srch_wait;
else
state->cfg.normal_srch_wait = default_cfg.normal_srch_wait;
return 0;
}
/* divisor, vco_band parameters */
/* {maxfreq, param1(band?), param2(div?) */
static const u32 conv_table[9][3] = {
{ 2151000, 1, 7 },
{ 1950000, 1, 6 },
{ 1800000, 1, 5 },
{ 1600000, 1, 4 },
{ 1450000, 1, 3 },
{ 1250000, 1, 2 },
{ 1200000, 0, 7 },
{ 975000, 0, 6 },
{ 950000, 0, 0 }
};
static int qm1d1c0042_set_params(struct dvb_frontend *fe)
{
struct qm1d1c0042_state *state;
u32 freq;
int i, ret;
u8 val, mask;
u32 a, sd;
s32 b;
state = fe->tuner_priv;
freq = fe->dtv_property_cache.frequency;
state->regs[0x08] &= 0xf0;
state->regs[0x08] |= 0x09;
state->regs[0x13] &= 0x9f;
state->regs[0x13] |= 0x20;
/* div2/vco_band */
val = state->regs[0x02] & 0x0f;
for (i = 0; i < 8; i++)
if (freq < conv_table[i][0] && freq >= conv_table[i + 1][0]) {
val |= conv_table[i][1] << 7;
val |= conv_table[i][2] << 4;
break;
}
ret = reg_write(state, 0x02, val);
if (ret < 0)
return ret;
a = DIV_ROUND_CLOSEST(freq, state->cfg.xtal_freq);
state->regs[0x06] &= 0x40;
state->regs[0x06] |= (a - 12) / 4;
ret = reg_write(state, 0x06, state->regs[0x06]);
if (ret < 0)
return ret;
state->regs[0x07] &= 0xf0;
state->regs[0x07] |= (a - 4 * ((a - 12) / 4 + 1) - 5) & 0x0f;
ret = reg_write(state, 0x07, state->regs[0x07]);
if (ret < 0)
return ret;
/* LPF */
val = state->regs[0x08];
if (state->cfg.lpf) {
/* LPF_CLK, LPF_FC */
val &= 0xf0;
val |= 0x02;
}
ret = reg_write(state, 0x08, val);
if (ret < 0)
return ret;
/*
* b = (freq / state->cfg.xtal_freq - a) << 20;
* sd = b (b >= 0)
* 1<<22 + b (b < 0)
*/
b = (s32)div64_s64(((s64) freq) << 20, state->cfg.xtal_freq)
- (((s64) a) << 20);
if (b >= 0)
sd = b;
else
sd = (1 << 22) + b;
state->regs[0x09] &= 0xc0;
state->regs[0x09] |= (sd >> 16) & 0x3f;
state->regs[0x0a] = (sd >> 8) & 0xff;
state->regs[0x0b] = sd & 0xff;
ret = reg_write(state, 0x09, state->regs[0x09]);
if (ret == 0)
ret = reg_write(state, 0x0a, state->regs[0x0a]);
if (ret == 0)
ret = reg_write(state, 0x0b, state->regs[0x0b]);
if (ret != 0)
return ret;
if (!state->cfg.lpf) {
/* CSEL_Offset */
ret = reg_write(state, 0x13, state->regs[0x13]);
if (ret < 0)
return ret;
}
/* VCO_TM, LPF_TM */
mask = state->cfg.lpf ? 0x3f : 0x7f;
val = state->regs[0x0c] & mask;
ret = reg_write(state, 0x0c, val);
if (ret < 0)
return ret;
usleep_range(2000, 3000);
val = state->regs[0x0c] | ~mask;
ret = reg_write(state, 0x0c, val);
if (ret < 0)
return ret;
if (state->cfg.lpf)
msleep(state->cfg.lpf_wait);
else if (state->regs[0x03] & 0x01)
msleep(state->cfg.fast_srch_wait);
else
msleep(state->cfg.normal_srch_wait);
if (state->cfg.lpf) {
/* LPF_FC */
ret = reg_write(state, 0x08, 0x09);
if (ret < 0)
return ret;
/* CSEL_Offset */
ret = reg_write(state, 0x13, state->regs[0x13]);
if (ret < 0)
return ret;
}
return 0;
}
static int qm1d1c0042_sleep(struct dvb_frontend *fe)
{
struct qm1d1c0042_state *state;
int ret;
state = fe->tuner_priv;
state->regs[0x01] &= (~(1 << 3)) & 0xff; /* BB_Reg_disable */
state->regs[0x01] |= 1 << 0; /* STDBY */
state->regs[0x05] |= 1 << 3; /* pfd_rst STANDBY */
ret = reg_write(state, 0x05, state->regs[0x05]);
if (ret == 0)
ret = reg_write(state, 0x01, state->regs[0x01]);
if (ret < 0)
dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
__func__, fe->dvb->num, fe->id);
return ret;
}
static int qm1d1c0042_init(struct dvb_frontend *fe)
{
struct qm1d1c0042_state *state;
u8 val;
int i, ret;
state = fe->tuner_priv;
reg_write(state, 0x01, 0x0c);
reg_write(state, 0x01, 0x0c);
ret = reg_write(state, 0x01, 0x0c); /* soft reset on */
if (ret < 0)
goto failed;
usleep_range(2000, 3000);
ret = reg_write(state, 0x01, 0x1c); /* soft reset off */
if (ret < 0)
goto failed;
/* check ID and choose initial registers corresponding ID */
ret = reg_read(state, 0x00, &val);
if (ret < 0)
goto failed;
for (reg_index = 0; reg_index < QM1D1C0042_NUM_REG_ROWS;
reg_index++) {
if (val == reg_initval[reg_index][0x00])
break;
}
if (reg_index >= QM1D1C0042_NUM_REG_ROWS) {
ret = -EINVAL;
goto failed;
}
memcpy(state->regs, reg_initval[reg_index], QM1D1C0042_NUM_REGS);
usleep_range(2000, 3000);
state->regs[0x0c] |= 0x40;
ret = reg_write(state, 0x0c, state->regs[0x0c]);
if (ret < 0)
goto failed;
msleep(state->cfg.lpf_wait);
/* set all writable registers */
for (i = 1; i <= 0x0c ; i++) {
ret = reg_write(state, i, state->regs[i]);
if (ret < 0)
goto failed;
}
for (i = 0x11; i < QM1D1C0042_NUM_REGS; i++) {
ret = reg_write(state, i, state->regs[i]);
if (ret < 0)
goto failed;
}
ret = qm1d1c0042_wakeup(state);
if (ret < 0)
goto failed;
ret = qm1d1c0042_set_srch_mode(state, state->cfg.fast_srch);
if (ret < 0)
goto failed;
return ret;
failed:
dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
__func__, fe->dvb->num, fe->id);
return ret;
}
/* I2C driver functions */
static const struct dvb_tuner_ops qm1d1c0042_ops = {
.info = {
.name = "Sharp QM1D1C0042",
.frequency_min_hz = 950 * MHz,
.frequency_max_hz = 2150 * MHz,
},
.init = qm1d1c0042_init,
.sleep = qm1d1c0042_sleep,
.set_config = qm1d1c0042_set_config,
.set_params = qm1d1c0042_set_params,
};
static int qm1d1c0042_probe(struct i2c_client *client)
{
struct qm1d1c0042_state *state;
struct qm1d1c0042_config *cfg;
struct dvb_frontend *fe;
state = kzalloc(sizeof(*state), GFP_KERNEL);
if (!state)
return -ENOMEM;
state->i2c = client;
cfg = client->dev.platform_data;
fe = cfg->fe;
fe->tuner_priv = state;
qm1d1c0042_set_config(fe, cfg);
memcpy(&fe->ops.tuner_ops, &qm1d1c0042_ops, sizeof(qm1d1c0042_ops));
i2c_set_clientdata(client, &state->cfg);
dev_info(&client->dev, "Sharp QM1D1C0042 attached.\n");
return 0;
}
static void qm1d1c0042_remove(struct i2c_client *client)
{
struct qm1d1c0042_state *state;
state = cfg_to_state(i2c_get_clientdata(client));
state->cfg.fe->tuner_priv = NULL;
kfree(state);
}
static const struct i2c_device_id qm1d1c0042_id[] = {
{"qm1d1c0042", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, qm1d1c0042_id);
static struct i2c_driver qm1d1c0042_driver = {
.driver = {
.name = "qm1d1c0042",
},
.probe = qm1d1c0042_probe,
.remove = qm1d1c0042_remove,
.id_table = qm1d1c0042_id,
};
module_i2c_driver(qm1d1c0042_driver);
MODULE_DESCRIPTION("Sharp QM1D1C0042 tuner");
MODULE_AUTHOR("Akihiro TSUKADA");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/qm1d1c0042.c |
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/i2c.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
#include <media/v4l2-common.h>
#include <media/tuner.h>
#include "tuner-i2c.h"
#include "tda9887.h"
/* Chips:
TDA9885 (PAL, NTSC)
TDA9886 (PAL, SECAM, NTSC)
TDA9887 (PAL, SECAM, NTSC, FM Radio)
Used as part of several tuners
*/
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable verbose debug messages");
static DEFINE_MUTEX(tda9887_list_mutex);
static LIST_HEAD(hybrid_tuner_instance_list);
struct tda9887_priv {
struct tuner_i2c_props i2c_props;
struct list_head hybrid_tuner_instance_list;
unsigned char data[4];
unsigned int config;
unsigned int mode;
unsigned int audmode;
v4l2_std_id std;
bool standby;
};
/* ---------------------------------------------------------------------- */
#define UNSET (-1U)
struct tvnorm {
v4l2_std_id std;
char *name;
unsigned char b;
unsigned char c;
unsigned char e;
};
/* ---------------------------------------------------------------------- */
//
// TDA defines
//
//// first reg (b)
#define cVideoTrapBypassOFF 0x00 // bit b0
#define cVideoTrapBypassON 0x01 // bit b0
#define cAutoMuteFmInactive 0x00 // bit b1
#define cAutoMuteFmActive 0x02 // bit b1
#define cIntercarrier 0x00 // bit b2
#define cQSS 0x04 // bit b2
#define cPositiveAmTV 0x00 // bit b3:4
#define cFmRadio 0x08 // bit b3:4
#define cNegativeFmTV 0x10 // bit b3:4
#define cForcedMuteAudioON 0x20 // bit b5
#define cForcedMuteAudioOFF 0x00 // bit b5
#define cOutputPort1Active 0x00 // bit b6
#define cOutputPort1Inactive 0x40 // bit b6
#define cOutputPort2Active 0x00 // bit b7
#define cOutputPort2Inactive 0x80 // bit b7
//// second reg (c)
#define cDeemphasisOFF 0x00 // bit c5
#define cDeemphasisON 0x20 // bit c5
#define cDeemphasis75 0x00 // bit c6
#define cDeemphasis50 0x40 // bit c6
#define cAudioGain0 0x00 // bit c7
#define cAudioGain6 0x80 // bit c7
#define cTopMask 0x1f // bit c0:4
#define cTopDefault 0x10 // bit c0:4
//// third reg (e)
#define cAudioIF_4_5 0x00 // bit e0:1
#define cAudioIF_5_5 0x01 // bit e0:1
#define cAudioIF_6_0 0x02 // bit e0:1
#define cAudioIF_6_5 0x03 // bit e0:1
#define cVideoIFMask 0x1c // bit e2:4
/* Video IF selection in TV Mode (bit B3=0) */
#define cVideoIF_58_75 0x00 // bit e2:4
#define cVideoIF_45_75 0x04 // bit e2:4
#define cVideoIF_38_90 0x08 // bit e2:4
#define cVideoIF_38_00 0x0C // bit e2:4
#define cVideoIF_33_90 0x10 // bit e2:4
#define cVideoIF_33_40 0x14 // bit e2:4
#define cRadioIF_45_75 0x18 // bit e2:4
#define cRadioIF_38_90 0x1C // bit e2:4
/* IF1 selection in Radio Mode (bit B3=1) */
#define cRadioIF_33_30 0x00 // bit e2,4 (also 0x10,0x14)
#define cRadioIF_41_30 0x04 // bit e2,4
/* Output of AFC pin in radio mode when bit E7=1 */
#define cRadioAGC_SIF 0x00 // bit e3
#define cRadioAGC_FM 0x08 // bit e3
#define cTunerGainNormal 0x00 // bit e5
#define cTunerGainLow 0x20 // bit e5
#define cGating_18 0x00 // bit e6
#define cGating_36 0x40 // bit e6
#define cAgcOutON 0x80 // bit e7
#define cAgcOutOFF 0x00 // bit e7
/* ---------------------------------------------------------------------- */
static struct tvnorm tvnorms[] = {
{
.std = V4L2_STD_PAL_BG | V4L2_STD_PAL_H | V4L2_STD_PAL_N,
.name = "PAL-BGHN",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis50 |
cTopDefault),
.e = ( cGating_36 |
cAudioIF_5_5 |
cVideoIF_38_90 ),
},{
.std = V4L2_STD_PAL_I,
.name = "PAL-I",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis50 |
cTopDefault),
.e = ( cGating_36 |
cAudioIF_6_0 |
cVideoIF_38_90 ),
},{
.std = V4L2_STD_PAL_DK,
.name = "PAL-DK",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis50 |
cTopDefault),
.e = ( cGating_36 |
cAudioIF_6_5 |
cVideoIF_38_90 ),
},{
.std = V4L2_STD_PAL_M | V4L2_STD_PAL_Nc,
.name = "PAL-M/Nc",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis75 |
cTopDefault),
.e = ( cGating_36 |
cAudioIF_4_5 |
cVideoIF_45_75 ),
},{
.std = V4L2_STD_SECAM_B | V4L2_STD_SECAM_G | V4L2_STD_SECAM_H,
.name = "SECAM-BGH",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cTopDefault),
.e = ( cAudioIF_5_5 |
cVideoIF_38_90 ),
},{
.std = V4L2_STD_SECAM_L,
.name = "SECAM-L",
.b = ( cPositiveAmTV |
cQSS ),
.c = ( cTopDefault),
.e = ( cGating_36 |
cAudioIF_6_5 |
cVideoIF_38_90 ),
},{
.std = V4L2_STD_SECAM_LC,
.name = "SECAM-L'",
.b = ( cOutputPort2Inactive |
cPositiveAmTV |
cQSS ),
.c = ( cTopDefault),
.e = ( cGating_36 |
cAudioIF_6_5 |
cVideoIF_33_90 ),
},{
.std = V4L2_STD_SECAM_DK,
.name = "SECAM-DK",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis50 |
cTopDefault),
.e = ( cGating_36 |
cAudioIF_6_5 |
cVideoIF_38_90 ),
},{
.std = V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_KR,
.name = "NTSC-M",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis75 |
cTopDefault),
.e = ( cGating_36 |
cAudioIF_4_5 |
cVideoIF_45_75 ),
},{
.std = V4L2_STD_NTSC_M_JP,
.name = "NTSC-M-JP",
.b = ( cNegativeFmTV |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis50 |
cTopDefault),
.e = ( cGating_36 |
cAudioIF_4_5 |
cVideoIF_58_75 ),
}
};
static struct tvnorm radio_stereo = {
.name = "Radio Stereo",
.b = ( cFmRadio |
cQSS ),
.c = ( cDeemphasisOFF |
cAudioGain6 |
cTopDefault),
.e = ( cTunerGainLow |
cAudioIF_5_5 |
cRadioIF_38_90 ),
};
static struct tvnorm radio_mono = {
.name = "Radio Mono",
.b = ( cFmRadio |
cQSS ),
.c = ( cDeemphasisON |
cDeemphasis75 |
cTopDefault),
.e = ( cTunerGainLow |
cAudioIF_5_5 |
cRadioIF_38_90 ),
};
/* ---------------------------------------------------------------------- */
static void dump_read_message(struct dvb_frontend *fe, unsigned char *buf)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
static char *afc[16] = {
"- 12.5 kHz",
"- 37.5 kHz",
"- 62.5 kHz",
"- 87.5 kHz",
"-112.5 kHz",
"-137.5 kHz",
"-162.5 kHz",
"-187.5 kHz [min]",
"+187.5 kHz [max]",
"+162.5 kHz",
"+137.5 kHz",
"+112.5 kHz",
"+ 87.5 kHz",
"+ 62.5 kHz",
"+ 37.5 kHz",
"+ 12.5 kHz",
};
tuner_info("read: 0x%2x\n", buf[0]);
tuner_info(" after power on : %s\n", (buf[0] & 0x01) ? "yes" : "no");
tuner_info(" afc : %s\n", afc[(buf[0] >> 1) & 0x0f]);
tuner_info(" fmif level : %s\n", (buf[0] & 0x20) ? "high" : "low");
tuner_info(" afc window : %s\n", (buf[0] & 0x40) ? "in" : "out");
tuner_info(" vfi level : %s\n", (buf[0] & 0x80) ? "high" : "low");
}
static void dump_write_message(struct dvb_frontend *fe, unsigned char *buf)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
static char *sound[4] = {
"AM/TV",
"FM/radio",
"FM/TV",
"FM/radio"
};
static char *adjust[32] = {
"-16", "-15", "-14", "-13", "-12", "-11", "-10", "-9",
"-8", "-7", "-6", "-5", "-4", "-3", "-2", "-1",
"0", "+1", "+2", "+3", "+4", "+5", "+6", "+7",
"+8", "+9", "+10", "+11", "+12", "+13", "+14", "+15"
};
static char *deemph[4] = {
"no", "no", "75", "50"
};
static char *carrier[4] = {
"4.5 MHz",
"5.5 MHz",
"6.0 MHz",
"6.5 MHz / AM"
};
static char *vif[8] = {
"58.75 MHz",
"45.75 MHz",
"38.9 MHz",
"38.0 MHz",
"33.9 MHz",
"33.4 MHz",
"45.75 MHz + pin13",
"38.9 MHz + pin13",
};
static char *rif[4] = {
"44 MHz",
"52 MHz",
"52 MHz",
"44 MHz",
};
tuner_info("write: byte B 0x%02x\n", buf[1]);
tuner_info(" B0 video mode : %s\n",
(buf[1] & 0x01) ? "video trap" : "sound trap");
tuner_info(" B1 auto mute fm : %s\n",
(buf[1] & 0x02) ? "yes" : "no");
tuner_info(" B2 carrier mode : %s\n",
(buf[1] & 0x04) ? "QSS" : "Intercarrier");
tuner_info(" B3-4 tv sound/radio : %s\n",
sound[(buf[1] & 0x18) >> 3]);
tuner_info(" B5 force mute audio: %s\n",
(buf[1] & 0x20) ? "yes" : "no");
tuner_info(" B6 output port 1 : %s\n",
(buf[1] & 0x40) ? "high (inactive)" : "low (active)");
tuner_info(" B7 output port 2 : %s\n",
(buf[1] & 0x80) ? "high (inactive)" : "low (active)");
tuner_info("write: byte C 0x%02x\n", buf[2]);
tuner_info(" C0-4 top adjustment : %s dB\n",
adjust[buf[2] & 0x1f]);
tuner_info(" C5-6 de-emphasis : %s\n",
deemph[(buf[2] & 0x60) >> 5]);
tuner_info(" C7 audio gain : %s\n",
(buf[2] & 0x80) ? "-6" : "0");
tuner_info("write: byte E 0x%02x\n", buf[3]);
tuner_info(" E0-1 sound carrier : %s\n",
carrier[(buf[3] & 0x03)]);
tuner_info(" E6 l pll gating : %s\n",
(buf[3] & 0x40) ? "36" : "13");
if (buf[1] & 0x08) {
/* radio */
tuner_info(" E2-4 video if : %s\n",
rif[(buf[3] & 0x0c) >> 2]);
tuner_info(" E7 vif agc output : %s\n",
(buf[3] & 0x80)
? ((buf[3] & 0x10) ? "fm-agc radio" :
"sif-agc radio")
: "fm radio carrier afc");
} else {
/* video */
tuner_info(" E2-4 video if : %s\n",
vif[(buf[3] & 0x1c) >> 2]);
tuner_info(" E5 tuner gain : %s\n",
(buf[3] & 0x80)
? ((buf[3] & 0x20) ? "external" : "normal")
: ((buf[3] & 0x20) ? "minimum" : "normal"));
tuner_info(" E7 vif agc output : %s\n",
(buf[3] & 0x80) ? ((buf[3] & 0x20)
? "pin3 port, pin22 vif agc out"
: "pin22 port, pin3 vif acg ext in")
: "pin3+pin22 port");
}
tuner_info("--\n");
}
/* ---------------------------------------------------------------------- */
static int tda9887_set_tvnorm(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
struct tvnorm *norm = NULL;
char *buf = priv->data;
int i;
if (priv->mode == V4L2_TUNER_RADIO) {
if (priv->audmode == V4L2_TUNER_MODE_MONO)
norm = &radio_mono;
else
norm = &radio_stereo;
} else {
for (i = 0; i < ARRAY_SIZE(tvnorms); i++) {
if (tvnorms[i].std & priv->std) {
norm = tvnorms+i;
break;
}
}
}
if (NULL == norm) {
tuner_dbg("Unsupported tvnorm entry - audio muted\n");
return -1;
}
tuner_dbg("configure for: %s\n", norm->name);
buf[1] = norm->b;
buf[2] = norm->c;
buf[3] = norm->e;
return 0;
}
static unsigned int port1 = UNSET;
static unsigned int port2 = UNSET;
static unsigned int qss = UNSET;
static unsigned int adjust = UNSET;
module_param(port1, int, 0644);
module_param(port2, int, 0644);
module_param(qss, int, 0644);
module_param(adjust, int, 0644);
static int tda9887_set_insmod(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
char *buf = priv->data;
if (UNSET != port1) {
if (port1)
buf[1] |= cOutputPort1Inactive;
else
buf[1] &= ~cOutputPort1Inactive;
}
if (UNSET != port2) {
if (port2)
buf[1] |= cOutputPort2Inactive;
else
buf[1] &= ~cOutputPort2Inactive;
}
if (UNSET != qss) {
if (qss)
buf[1] |= cQSS;
else
buf[1] &= ~cQSS;
}
if (adjust < 0x20) {
buf[2] &= ~cTopMask;
buf[2] |= adjust;
}
return 0;
}
static int tda9887_do_config(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
char *buf = priv->data;
if (priv->config & TDA9887_PORT1_ACTIVE)
buf[1] &= ~cOutputPort1Inactive;
if (priv->config & TDA9887_PORT1_INACTIVE)
buf[1] |= cOutputPort1Inactive;
if (priv->config & TDA9887_PORT2_ACTIVE)
buf[1] &= ~cOutputPort2Inactive;
if (priv->config & TDA9887_PORT2_INACTIVE)
buf[1] |= cOutputPort2Inactive;
if (priv->config & TDA9887_QSS)
buf[1] |= cQSS;
if (priv->config & TDA9887_INTERCARRIER)
buf[1] &= ~cQSS;
if (priv->config & TDA9887_AUTOMUTE)
buf[1] |= cAutoMuteFmActive;
if (priv->config & TDA9887_DEEMPHASIS_MASK) {
buf[2] &= ~0x60;
switch (priv->config & TDA9887_DEEMPHASIS_MASK) {
case TDA9887_DEEMPHASIS_NONE:
buf[2] |= cDeemphasisOFF;
break;
case TDA9887_DEEMPHASIS_50:
buf[2] |= cDeemphasisON | cDeemphasis50;
break;
case TDA9887_DEEMPHASIS_75:
buf[2] |= cDeemphasisON | cDeemphasis75;
break;
}
}
if (priv->config & TDA9887_TOP_SET) {
buf[2] &= ~cTopMask;
buf[2] |= (priv->config >> 8) & cTopMask;
}
if ((priv->config & TDA9887_INTERCARRIER_NTSC) &&
(priv->std & V4L2_STD_NTSC))
buf[1] &= ~cQSS;
if (priv->config & TDA9887_GATING_18)
buf[3] &= ~cGating_36;
if (priv->mode == V4L2_TUNER_RADIO) {
if (priv->config & TDA9887_RIF_41_3) {
buf[3] &= ~cVideoIFMask;
buf[3] |= cRadioIF_41_30;
}
if (priv->config & TDA9887_GAIN_NORMAL)
buf[3] &= ~cTunerGainLow;
}
return 0;
}
/* ---------------------------------------------------------------------- */
static int tda9887_status(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
unsigned char buf[1];
int rc;
rc = tuner_i2c_xfer_recv(&priv->i2c_props, buf, 1);
if (rc != 1)
tuner_info("i2c i/o error: rc == %d (should be 1)\n", rc);
dump_read_message(fe, buf);
return 0;
}
static void tda9887_configure(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
int rc;
memset(priv->data,0,sizeof(priv->data));
tda9887_set_tvnorm(fe);
/* A note on the port settings:
These settings tend to depend on the specifics of the board.
By default they are set to inactive (bit value 1) by this driver,
overwriting any changes made by the tvnorm. This means that it
is the responsibility of the module using the tda9887 to set
these values in case of changes in the tvnorm.
In many cases port 2 should be made active (0) when selecting
SECAM-L, and port 2 should remain inactive (1) for SECAM-L'.
For the other standards the tda9887 application note says that
the ports should be set to active (0), but, again, that may
differ depending on the precise hardware configuration.
*/
priv->data[1] |= cOutputPort1Inactive;
priv->data[1] |= cOutputPort2Inactive;
tda9887_do_config(fe);
tda9887_set_insmod(fe);
if (priv->standby)
priv->data[1] |= cForcedMuteAudioON;
tuner_dbg("writing: b=0x%02x c=0x%02x e=0x%02x\n",
priv->data[1], priv->data[2], priv->data[3]);
if (debug > 1)
dump_write_message(fe, priv->data);
if (4 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,priv->data,4)))
tuner_info("i2c i/o error: rc == %d (should be 4)\n", rc);
if (debug > 2) {
msleep_interruptible(1000);
tda9887_status(fe);
}
}
/* ---------------------------------------------------------------------- */
static void tda9887_tuner_status(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
tuner_info("Data bytes: b=0x%02x c=0x%02x e=0x%02x\n",
priv->data[1], priv->data[2], priv->data[3]);
}
static int tda9887_get_afc(struct dvb_frontend *fe, s32 *afc)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
static const int AFC_BITS_2_kHz[] = {
-12500, -37500, -62500, -97500,
-112500, -137500, -162500, -187500,
187500, 162500, 137500, 112500,
97500 , 62500, 37500 , 12500
};
__u8 reg = 0;
if (priv->mode != V4L2_TUNER_RADIO)
return 0;
if (1 == tuner_i2c_xfer_recv(&priv->i2c_props, ®, 1))
*afc = AFC_BITS_2_kHz[(reg >> 1) & 0x0f];
return 0;
}
static void tda9887_standby(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
priv->standby = true;
tda9887_configure(fe);
}
static void tda9887_set_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
priv->standby = false;
priv->mode = params->mode;
priv->audmode = params->audmode;
priv->std = params->std;
tda9887_configure(fe);
}
static int tda9887_set_config(struct dvb_frontend *fe, void *priv_cfg)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
priv->config = *(unsigned int *)priv_cfg;
tda9887_configure(fe);
return 0;
}
static void tda9887_release(struct dvb_frontend *fe)
{
struct tda9887_priv *priv = fe->analog_demod_priv;
mutex_lock(&tda9887_list_mutex);
if (priv)
hybrid_tuner_release_state(priv);
mutex_unlock(&tda9887_list_mutex);
fe->analog_demod_priv = NULL;
}
static const struct analog_demod_ops tda9887_ops = {
.info = {
.name = "tda9887",
},
.set_params = tda9887_set_params,
.standby = tda9887_standby,
.tuner_status = tda9887_tuner_status,
.get_afc = tda9887_get_afc,
.release = tda9887_release,
.set_config = tda9887_set_config,
};
struct dvb_frontend *tda9887_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c_adap,
u8 i2c_addr)
{
struct tda9887_priv *priv = NULL;
int instance;
mutex_lock(&tda9887_list_mutex);
instance = hybrid_tuner_request_state(struct tda9887_priv, priv,
hybrid_tuner_instance_list,
i2c_adap, i2c_addr, "tda9887");
switch (instance) {
case 0:
mutex_unlock(&tda9887_list_mutex);
return NULL;
case 1:
fe->analog_demod_priv = priv;
priv->standby = true;
tuner_info("tda988[5/6/7] found\n");
break;
default:
fe->analog_demod_priv = priv;
break;
}
mutex_unlock(&tda9887_list_mutex);
memcpy(&fe->ops.analog_ops, &tda9887_ops,
sizeof(struct analog_demod_ops));
return fe;
}
EXPORT_SYMBOL_GPL(tda9887_attach);
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tda9887.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
tda18271-common.c - driver for the Philips / NXP TDA18271 silicon tuner
Copyright (C) 2007, 2008 Michael Krufky <[email protected]>
*/
#include "tda18271-priv.h"
static int tda18271_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
struct tda18271_priv *priv = fe->tuner_priv;
enum tda18271_i2c_gate gate;
int ret = 0;
switch (priv->gate) {
case TDA18271_GATE_DIGITAL:
case TDA18271_GATE_ANALOG:
gate = priv->gate;
break;
case TDA18271_GATE_AUTO:
default:
switch (priv->mode) {
case TDA18271_DIGITAL:
gate = TDA18271_GATE_DIGITAL;
break;
case TDA18271_ANALOG:
default:
gate = TDA18271_GATE_ANALOG;
break;
}
}
switch (gate) {
case TDA18271_GATE_ANALOG:
if (fe->ops.analog_ops.i2c_gate_ctrl)
ret = fe->ops.analog_ops.i2c_gate_ctrl(fe, enable);
break;
case TDA18271_GATE_DIGITAL:
if (fe->ops.i2c_gate_ctrl)
ret = fe->ops.i2c_gate_ctrl(fe, enable);
break;
default:
ret = -EINVAL;
break;
}
return ret;
};
/*---------------------------------------------------------------------*/
static void tda18271_dump_regs(struct dvb_frontend *fe, int extended)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
tda_reg("=== TDA18271 REG DUMP ===\n");
tda_reg("ID_BYTE = 0x%02x\n", 0xff & regs[R_ID]);
tda_reg("THERMO_BYTE = 0x%02x\n", 0xff & regs[R_TM]);
tda_reg("POWER_LEVEL_BYTE = 0x%02x\n", 0xff & regs[R_PL]);
tda_reg("EASY_PROG_BYTE_1 = 0x%02x\n", 0xff & regs[R_EP1]);
tda_reg("EASY_PROG_BYTE_2 = 0x%02x\n", 0xff & regs[R_EP2]);
tda_reg("EASY_PROG_BYTE_3 = 0x%02x\n", 0xff & regs[R_EP3]);
tda_reg("EASY_PROG_BYTE_4 = 0x%02x\n", 0xff & regs[R_EP4]);
tda_reg("EASY_PROG_BYTE_5 = 0x%02x\n", 0xff & regs[R_EP5]);
tda_reg("CAL_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_CPD]);
tda_reg("CAL_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_CD1]);
tda_reg("CAL_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_CD2]);
tda_reg("CAL_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_CD3]);
tda_reg("MAIN_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_MPD]);
tda_reg("MAIN_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_MD1]);
tda_reg("MAIN_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_MD2]);
tda_reg("MAIN_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_MD3]);
/* only dump extended regs if DBG_ADV is set */
if (!(tda18271_debug & DBG_ADV))
return;
/* W indicates write-only registers.
* Register dump for write-only registers shows last value written. */
tda_reg("EXTENDED_BYTE_1 = 0x%02x\n", 0xff & regs[R_EB1]);
tda_reg("EXTENDED_BYTE_2 = 0x%02x\n", 0xff & regs[R_EB2]);
tda_reg("EXTENDED_BYTE_3 = 0x%02x\n", 0xff & regs[R_EB3]);
tda_reg("EXTENDED_BYTE_4 = 0x%02x\n", 0xff & regs[R_EB4]);
tda_reg("EXTENDED_BYTE_5 = 0x%02x\n", 0xff & regs[R_EB5]);
tda_reg("EXTENDED_BYTE_6 = 0x%02x\n", 0xff & regs[R_EB6]);
tda_reg("EXTENDED_BYTE_7 = 0x%02x\n", 0xff & regs[R_EB7]);
tda_reg("EXTENDED_BYTE_8 = 0x%02x\n", 0xff & regs[R_EB8]);
tda_reg("EXTENDED_BYTE_9 W = 0x%02x\n", 0xff & regs[R_EB9]);
tda_reg("EXTENDED_BYTE_10 = 0x%02x\n", 0xff & regs[R_EB10]);
tda_reg("EXTENDED_BYTE_11 = 0x%02x\n", 0xff & regs[R_EB11]);
tda_reg("EXTENDED_BYTE_12 = 0x%02x\n", 0xff & regs[R_EB12]);
tda_reg("EXTENDED_BYTE_13 = 0x%02x\n", 0xff & regs[R_EB13]);
tda_reg("EXTENDED_BYTE_14 = 0x%02x\n", 0xff & regs[R_EB14]);
tda_reg("EXTENDED_BYTE_15 = 0x%02x\n", 0xff & regs[R_EB15]);
tda_reg("EXTENDED_BYTE_16 W = 0x%02x\n", 0xff & regs[R_EB16]);
tda_reg("EXTENDED_BYTE_17 W = 0x%02x\n", 0xff & regs[R_EB17]);
tda_reg("EXTENDED_BYTE_18 = 0x%02x\n", 0xff & regs[R_EB18]);
tda_reg("EXTENDED_BYTE_19 W = 0x%02x\n", 0xff & regs[R_EB19]);
tda_reg("EXTENDED_BYTE_20 W = 0x%02x\n", 0xff & regs[R_EB20]);
tda_reg("EXTENDED_BYTE_21 = 0x%02x\n", 0xff & regs[R_EB21]);
tda_reg("EXTENDED_BYTE_22 = 0x%02x\n", 0xff & regs[R_EB22]);
tda_reg("EXTENDED_BYTE_23 = 0x%02x\n", 0xff & regs[R_EB23]);
}
int tda18271_read_regs(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
unsigned char buf = 0x00;
int ret;
struct i2c_msg msg[] = {
{ .addr = priv->i2c_props.addr, .flags = 0,
.buf = &buf, .len = 1 },
{ .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
.buf = regs, .len = 16 }
};
tda18271_i2c_gate_ctrl(fe, 1);
/* read all registers */
ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
tda18271_i2c_gate_ctrl(fe, 0);
if (ret != 2)
tda_err("ERROR: i2c_transfer returned: %d\n", ret);
if (tda18271_debug & DBG_REG)
tda18271_dump_regs(fe, 0);
return (ret == 2 ? 0 : ret);
}
int tda18271_read_extended(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
unsigned char regdump[TDA18271_NUM_REGS];
unsigned char buf = 0x00;
int ret, i;
struct i2c_msg msg[] = {
{ .addr = priv->i2c_props.addr, .flags = 0,
.buf = &buf, .len = 1 },
{ .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
.buf = regdump, .len = TDA18271_NUM_REGS }
};
tda18271_i2c_gate_ctrl(fe, 1);
/* read all registers */
ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
tda18271_i2c_gate_ctrl(fe, 0);
if (ret != 2)
tda_err("ERROR: i2c_transfer returned: %d\n", ret);
for (i = 0; i < TDA18271_NUM_REGS; i++) {
/* don't update write-only registers */
if ((i != R_EB9) &&
(i != R_EB16) &&
(i != R_EB17) &&
(i != R_EB19) &&
(i != R_EB20))
regs[i] = regdump[i];
}
if (tda18271_debug & DBG_REG)
tda18271_dump_regs(fe, 1);
return (ret == 2 ? 0 : ret);
}
static int __tda18271_write_regs(struct dvb_frontend *fe, int idx, int len,
bool lock_i2c)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
unsigned char buf[TDA18271_NUM_REGS + 1];
struct i2c_msg msg = { .addr = priv->i2c_props.addr, .flags = 0,
.buf = buf };
int i, ret = 1, max;
BUG_ON((len == 0) || (idx + len > sizeof(buf)));
switch (priv->small_i2c) {
case TDA18271_03_BYTE_CHUNK_INIT:
max = 3;
break;
case TDA18271_08_BYTE_CHUNK_INIT:
max = 8;
break;
case TDA18271_16_BYTE_CHUNK_INIT:
max = 16;
break;
case TDA18271_39_BYTE_CHUNK_INIT:
default:
max = 39;
}
/*
* If lock_i2c is true, it will take the I2C bus for tda18271 private
* usage during the entire write ops, as otherwise, bad things could
* happen.
* During device init, several write operations will happen. So,
* tda18271_init_regs controls the I2C lock directly,
* disabling lock_i2c here.
*/
if (lock_i2c) {
tda18271_i2c_gate_ctrl(fe, 1);
i2c_lock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
}
while (len) {
if (max > len)
max = len;
buf[0] = idx;
for (i = 1; i <= max; i++)
buf[i] = regs[idx - 1 + i];
msg.len = max + 1;
/* write registers */
ret = __i2c_transfer(priv->i2c_props.adap, &msg, 1);
if (ret != 1)
break;
idx += max;
len -= max;
}
if (lock_i2c) {
i2c_unlock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
tda18271_i2c_gate_ctrl(fe, 0);
}
if (ret != 1)
tda_err("ERROR: idx = 0x%x, len = %d, i2c_transfer returned: %d\n",
idx, max, ret);
return (ret == 1 ? 0 : ret);
}
int tda18271_write_regs(struct dvb_frontend *fe, int idx, int len)
{
return __tda18271_write_regs(fe, idx, len, true);
}
/*---------------------------------------------------------------------*/
static int __tda18271_charge_pump_source(struct dvb_frontend *fe,
enum tda18271_pll pll, int force,
bool lock_i2c)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int r_cp = (pll == TDA18271_CAL_PLL) ? R_EB7 : R_EB4;
regs[r_cp] &= ~0x20;
regs[r_cp] |= ((force & 1) << 5);
return __tda18271_write_regs(fe, r_cp, 1, lock_i2c);
}
int tda18271_charge_pump_source(struct dvb_frontend *fe,
enum tda18271_pll pll, int force)
{
return __tda18271_charge_pump_source(fe, pll, force, true);
}
int tda18271_init_regs(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
tda_dbg("initializing registers for device @ %d-%04x\n",
i2c_adapter_id(priv->i2c_props.adap),
priv->i2c_props.addr);
/*
* Don't let any other I2C transfer to happen at adapter during init,
* as those could cause bad things
*/
tda18271_i2c_gate_ctrl(fe, 1);
i2c_lock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
/* initialize registers */
switch (priv->id) {
case TDA18271HDC1:
regs[R_ID] = 0x83;
break;
case TDA18271HDC2:
regs[R_ID] = 0x84;
break;
}
regs[R_TM] = 0x08;
regs[R_PL] = 0x80;
regs[R_EP1] = 0xc6;
regs[R_EP2] = 0xdf;
regs[R_EP3] = 0x16;
regs[R_EP4] = 0x60;
regs[R_EP5] = 0x80;
regs[R_CPD] = 0x80;
regs[R_CD1] = 0x00;
regs[R_CD2] = 0x00;
regs[R_CD3] = 0x00;
regs[R_MPD] = 0x00;
regs[R_MD1] = 0x00;
regs[R_MD2] = 0x00;
regs[R_MD3] = 0x00;
switch (priv->id) {
case TDA18271HDC1:
regs[R_EB1] = 0xff;
break;
case TDA18271HDC2:
regs[R_EB1] = 0xfc;
break;
}
regs[R_EB2] = 0x01;
regs[R_EB3] = 0x84;
regs[R_EB4] = 0x41;
regs[R_EB5] = 0x01;
regs[R_EB6] = 0x84;
regs[R_EB7] = 0x40;
regs[R_EB8] = 0x07;
regs[R_EB9] = 0x00;
regs[R_EB10] = 0x00;
regs[R_EB11] = 0x96;
switch (priv->id) {
case TDA18271HDC1:
regs[R_EB12] = 0x0f;
break;
case TDA18271HDC2:
regs[R_EB12] = 0x33;
break;
}
regs[R_EB13] = 0xc1;
regs[R_EB14] = 0x00;
regs[R_EB15] = 0x8f;
regs[R_EB16] = 0x00;
regs[R_EB17] = 0x00;
switch (priv->id) {
case TDA18271HDC1:
regs[R_EB18] = 0x00;
break;
case TDA18271HDC2:
regs[R_EB18] = 0x8c;
break;
}
regs[R_EB19] = 0x00;
regs[R_EB20] = 0x20;
switch (priv->id) {
case TDA18271HDC1:
regs[R_EB21] = 0x33;
break;
case TDA18271HDC2:
regs[R_EB21] = 0xb3;
break;
}
regs[R_EB22] = 0x48;
regs[R_EB23] = 0xb0;
__tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS, false);
/* setup agc1 gain */
regs[R_EB17] = 0x00;
__tda18271_write_regs(fe, R_EB17, 1, false);
regs[R_EB17] = 0x03;
__tda18271_write_regs(fe, R_EB17, 1, false);
regs[R_EB17] = 0x43;
__tda18271_write_regs(fe, R_EB17, 1, false);
regs[R_EB17] = 0x4c;
__tda18271_write_regs(fe, R_EB17, 1, false);
/* setup agc2 gain */
if ((priv->id) == TDA18271HDC1) {
regs[R_EB20] = 0xa0;
__tda18271_write_regs(fe, R_EB20, 1, false);
regs[R_EB20] = 0xa7;
__tda18271_write_regs(fe, R_EB20, 1, false);
regs[R_EB20] = 0xe7;
__tda18271_write_regs(fe, R_EB20, 1, false);
regs[R_EB20] = 0xec;
__tda18271_write_regs(fe, R_EB20, 1, false);
}
/* image rejection calibration */
/* low-band */
regs[R_EP3] = 0x1f;
regs[R_EP4] = 0x66;
regs[R_EP5] = 0x81;
regs[R_CPD] = 0xcc;
regs[R_CD1] = 0x6c;
regs[R_CD2] = 0x00;
regs[R_CD3] = 0x00;
regs[R_MPD] = 0xcd;
regs[R_MD1] = 0x77;
regs[R_MD2] = 0x08;
regs[R_MD3] = 0x00;
__tda18271_write_regs(fe, R_EP3, 11, false);
if ((priv->id) == TDA18271HDC2) {
/* main pll cp source on */
__tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1, false);
msleep(1);
/* main pll cp source off */
__tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0, false);
}
msleep(5); /* pll locking */
/* launch detector */
__tda18271_write_regs(fe, R_EP1, 1, false);
msleep(5); /* wanted low measurement */
regs[R_EP5] = 0x85;
regs[R_CPD] = 0xcb;
regs[R_CD1] = 0x66;
regs[R_CD2] = 0x70;
__tda18271_write_regs(fe, R_EP3, 7, false);
msleep(5); /* pll locking */
/* launch optimization algorithm */
__tda18271_write_regs(fe, R_EP2, 1, false);
msleep(30); /* image low optimization completion */
/* mid-band */
regs[R_EP5] = 0x82;
regs[R_CPD] = 0xa8;
regs[R_CD2] = 0x00;
regs[R_MPD] = 0xa9;
regs[R_MD1] = 0x73;
regs[R_MD2] = 0x1a;
__tda18271_write_regs(fe, R_EP3, 11, false);
msleep(5); /* pll locking */
/* launch detector */
__tda18271_write_regs(fe, R_EP1, 1, false);
msleep(5); /* wanted mid measurement */
regs[R_EP5] = 0x86;
regs[R_CPD] = 0xa8;
regs[R_CD1] = 0x66;
regs[R_CD2] = 0xa0;
__tda18271_write_regs(fe, R_EP3, 7, false);
msleep(5); /* pll locking */
/* launch optimization algorithm */
__tda18271_write_regs(fe, R_EP2, 1, false);
msleep(30); /* image mid optimization completion */
/* high-band */
regs[R_EP5] = 0x83;
regs[R_CPD] = 0x98;
regs[R_CD1] = 0x65;
regs[R_CD2] = 0x00;
regs[R_MPD] = 0x99;
regs[R_MD1] = 0x71;
regs[R_MD2] = 0xcd;
__tda18271_write_regs(fe, R_EP3, 11, false);
msleep(5); /* pll locking */
/* launch detector */
__tda18271_write_regs(fe, R_EP1, 1, false);
msleep(5); /* wanted high measurement */
regs[R_EP5] = 0x87;
regs[R_CD1] = 0x65;
regs[R_CD2] = 0x50;
__tda18271_write_regs(fe, R_EP3, 7, false);
msleep(5); /* pll locking */
/* launch optimization algorithm */
__tda18271_write_regs(fe, R_EP2, 1, false);
msleep(30); /* image high optimization completion */
/* return to normal mode */
regs[R_EP4] = 0x64;
__tda18271_write_regs(fe, R_EP4, 1, false);
/* synchronize */
__tda18271_write_regs(fe, R_EP1, 1, false);
i2c_unlock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
tda18271_i2c_gate_ctrl(fe, 0);
return 0;
}
/*---------------------------------------------------------------------*/
/*
* Standby modes, EP3 [7:5]
*
* | SM || SM_LT || SM_XT || mode description
* |=====\\=======\\=======\\====================================
* | 0 || 0 || 0 || normal mode
* |-----||-------||-------||------------------------------------
* | || || || standby mode w/ slave tuner output
* | 1 || 0 || 0 || & loop through & xtal oscillator on
* |-----||-------||-------||------------------------------------
* | 1 || 1 || 0 || standby mode w/ xtal oscillator on
* |-----||-------||-------||------------------------------------
* | 1 || 1 || 1 || power off
*
*/
int tda18271_set_standby_mode(struct dvb_frontend *fe,
int sm, int sm_lt, int sm_xt)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
if (tda18271_debug & DBG_ADV)
tda_dbg("sm = %d, sm_lt = %d, sm_xt = %d\n", sm, sm_lt, sm_xt);
regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
regs[R_EP3] |= (sm ? (1 << 7) : 0) |
(sm_lt ? (1 << 6) : 0) |
(sm_xt ? (1 << 5) : 0);
return tda18271_write_regs(fe, R_EP3, 1);
}
/*---------------------------------------------------------------------*/
int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq)
{
/* sets main post divider & divider bytes, but does not write them */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 d, pd;
u32 div;
int ret = tda18271_lookup_pll_map(fe, MAIN_PLL, &freq, &pd, &d);
if (tda_fail(ret))
goto fail;
regs[R_MPD] = (0x7f & pd);
div = ((d * (freq / 1000)) << 7) / 125;
regs[R_MD1] = 0x7f & (div >> 16);
regs[R_MD2] = 0xff & (div >> 8);
regs[R_MD3] = 0xff & div;
fail:
return ret;
}
int tda18271_calc_cal_pll(struct dvb_frontend *fe, u32 freq)
{
/* sets cal post divider & divider bytes, but does not write them */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 d, pd;
u32 div;
int ret = tda18271_lookup_pll_map(fe, CAL_PLL, &freq, &pd, &d);
if (tda_fail(ret))
goto fail;
regs[R_CPD] = pd;
div = ((d * (freq / 1000)) << 7) / 125;
regs[R_CD1] = 0x7f & (div >> 16);
regs[R_CD2] = 0xff & (div >> 8);
regs[R_CD3] = 0xff & div;
fail:
return ret;
}
/*---------------------------------------------------------------------*/
int tda18271_calc_bp_filter(struct dvb_frontend *fe, u32 *freq)
{
/* sets bp filter bits, but does not write them */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 val;
int ret = tda18271_lookup_map(fe, BP_FILTER, freq, &val);
if (tda_fail(ret))
goto fail;
regs[R_EP1] &= ~0x07; /* clear bp filter bits */
regs[R_EP1] |= (0x07 & val);
fail:
return ret;
}
int tda18271_calc_km(struct dvb_frontend *fe, u32 *freq)
{
/* sets K & M bits, but does not write them */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 val;
int ret = tda18271_lookup_map(fe, RF_CAL_KMCO, freq, &val);
if (tda_fail(ret))
goto fail;
regs[R_EB13] &= ~0x7c; /* clear k & m bits */
regs[R_EB13] |= (0x7c & val);
fail:
return ret;
}
int tda18271_calc_rf_band(struct dvb_frontend *fe, u32 *freq)
{
/* sets rf band bits, but does not write them */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 val;
int ret = tda18271_lookup_map(fe, RF_BAND, freq, &val);
if (tda_fail(ret))
goto fail;
regs[R_EP2] &= ~0xe0; /* clear rf band bits */
regs[R_EP2] |= (0xe0 & (val << 5));
fail:
return ret;
}
int tda18271_calc_gain_taper(struct dvb_frontend *fe, u32 *freq)
{
/* sets gain taper bits, but does not write them */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 val;
int ret = tda18271_lookup_map(fe, GAIN_TAPER, freq, &val);
if (tda_fail(ret))
goto fail;
regs[R_EP2] &= ~0x1f; /* clear gain taper bits */
regs[R_EP2] |= (0x1f & val);
fail:
return ret;
}
int tda18271_calc_ir_measure(struct dvb_frontend *fe, u32 *freq)
{
/* sets IR Meas bits, but does not write them */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 val;
int ret = tda18271_lookup_map(fe, IR_MEASURE, freq, &val);
if (tda_fail(ret))
goto fail;
regs[R_EP5] &= ~0x07;
regs[R_EP5] |= (0x07 & val);
fail:
return ret;
}
int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq)
{
/* sets rf cal byte (RFC_Cprog), but does not write it */
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u8 val;
int ret = tda18271_lookup_map(fe, RF_CAL, freq, &val);
/* The TDA18271HD/C1 rf_cal map lookup is expected to go out of range
* for frequencies above 61.1 MHz. In these cases, the internal RF
* tracking filters calibration mechanism is used.
*
* There is no need to warn the user about this.
*/
if (ret < 0)
goto fail;
regs[R_EB14] = val;
fail:
return ret;
}
void _tda_printk(struct tda18271_priv *state, const char *level,
const char *func, const char *fmt, ...)
{
struct va_format vaf;
va_list args;
va_start(args, fmt);
vaf.fmt = fmt;
vaf.va = &args;
if (state)
printk("%s%s: [%d-%04x|%c] %pV",
level, func, i2c_adapter_id(state->i2c_props.adap),
state->i2c_props.addr,
(state->role == TDA18271_MASTER) ? 'M' : 'S',
&vaf);
else
printk("%s%s: %pV", level, func, &vaf);
va_end(args);
}
| linux-master | drivers/media/tuners/tda18271-common.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for mt2063 Micronas tuner
*
* Copyright (c) 2011 Mauro Carvalho Chehab
*
* This driver came from a driver originally written by:
* Henry Wang <[email protected]>
* Made publicly available by Terratec, at:
* http://linux.terratec.de/files/TERRATEC_H7/20110323_TERRATEC_H7_Linux.tar.gz
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/videodev2.h>
#include <linux/gcd.h>
#include "mt2063.h"
static unsigned int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Set Verbosity level");
#define dprintk(level, fmt, arg...) do { \
if (debug >= level) \
printk(KERN_DEBUG "mt2063 %s: " fmt, __func__, ## arg); \
} while (0)
/* positive error codes used internally */
/* Info: Unavoidable LO-related spur may be present in the output */
#define MT2063_SPUR_PRESENT_ERR (0x00800000)
/* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
#define MT2063_SPUR_CNT_MASK (0x001f0000)
#define MT2063_SPUR_SHIFT (16)
/* Info: Upconverter frequency is out of range (may be reason for MT_UPC_UNLOCK) */
#define MT2063_UPC_RANGE (0x04000000)
/* Info: Downconverter frequency is out of range (may be reason for MT_DPC_UNLOCK) */
#define MT2063_DNC_RANGE (0x08000000)
/*
* Constant defining the version of the following structure
* and therefore the API for this code.
*
* When compiling the tuner driver, the preprocessor will
* check against this version number to make sure that
* it matches the version that the tuner driver knows about.
*/
/* DECT Frequency Avoidance */
#define MT2063_DECT_AVOID_US_FREQS 0x00000001
#define MT2063_DECT_AVOID_EURO_FREQS 0x00000002
#define MT2063_EXCLUDE_US_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_US_FREQS) != 0)
#define MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_EURO_FREQS) != 0)
enum MT2063_DECT_Avoid_Type {
MT2063_NO_DECT_AVOIDANCE = 0, /* Do not create DECT exclusion zones. */
MT2063_AVOID_US_DECT = MT2063_DECT_AVOID_US_FREQS, /* Avoid US DECT frequencies. */
MT2063_AVOID_EURO_DECT = MT2063_DECT_AVOID_EURO_FREQS, /* Avoid European DECT frequencies. */
MT2063_AVOID_BOTH /* Avoid both regions. Not typically used. */
};
#define MT2063_MAX_ZONES 48
struct MT2063_ExclZone_t {
u32 min_;
u32 max_;
struct MT2063_ExclZone_t *next_;
};
/*
* Structure of data needed for Spur Avoidance
*/
struct MT2063_AvoidSpursData_t {
u32 f_ref;
u32 f_in;
u32 f_LO1;
u32 f_if1_Center;
u32 f_if1_Request;
u32 f_if1_bw;
u32 f_LO2;
u32 f_out;
u32 f_out_bw;
u32 f_LO1_Step;
u32 f_LO2_Step;
u32 f_LO1_FracN_Avoid;
u32 f_LO2_FracN_Avoid;
u32 f_zif_bw;
u32 f_min_LO_Separation;
u32 maxH1;
u32 maxH2;
enum MT2063_DECT_Avoid_Type avoidDECT;
u32 bSpurPresent;
u32 bSpurAvoided;
u32 nSpursFound;
u32 nZones;
struct MT2063_ExclZone_t *freeZones;
struct MT2063_ExclZone_t *usedZones;
struct MT2063_ExclZone_t MT2063_ExclZones[MT2063_MAX_ZONES];
};
/*
* Parameter for function MT2063_SetPowerMask that specifies the power down
* of various sections of the MT2063.
*/
enum MT2063_Mask_Bits {
MT2063_REG_SD = 0x0040, /* Shutdown regulator */
MT2063_SRO_SD = 0x0020, /* Shutdown SRO */
MT2063_AFC_SD = 0x0010, /* Shutdown AFC A/D */
MT2063_PD_SD = 0x0002, /* Enable power detector shutdown */
MT2063_PDADC_SD = 0x0001, /* Enable power detector A/D shutdown */
MT2063_VCO_SD = 0x8000, /* Enable VCO shutdown */
MT2063_LTX_SD = 0x4000, /* Enable LTX shutdown */
MT2063_LT1_SD = 0x2000, /* Enable LT1 shutdown */
MT2063_LNA_SD = 0x1000, /* Enable LNA shutdown */
MT2063_UPC_SD = 0x0800, /* Enable upconverter shutdown */
MT2063_DNC_SD = 0x0400, /* Enable downconverter shutdown */
MT2063_VGA_SD = 0x0200, /* Enable VGA shutdown */
MT2063_AMP_SD = 0x0100, /* Enable AMP shutdown */
MT2063_ALL_SD = 0xFF73, /* All shutdown bits for this tuner */
MT2063_NONE_SD = 0x0000 /* No shutdown bits */
};
/*
* Possible values for MT2063_DNC_OUTPUT
*/
enum MT2063_DNC_Output_Enable {
MT2063_DNC_NONE = 0,
MT2063_DNC_1,
MT2063_DNC_2,
MT2063_DNC_BOTH
};
/*
* Two-wire serial bus subaddresses of the tuner registers.
* Also known as the tuner's register addresses.
*/
enum MT2063_Register_Offsets {
MT2063_REG_PART_REV = 0, /* 0x00: Part/Rev Code */
MT2063_REG_LO1CQ_1, /* 0x01: LO1C Queued Byte 1 */
MT2063_REG_LO1CQ_2, /* 0x02: LO1C Queued Byte 2 */
MT2063_REG_LO2CQ_1, /* 0x03: LO2C Queued Byte 1 */
MT2063_REG_LO2CQ_2, /* 0x04: LO2C Queued Byte 2 */
MT2063_REG_LO2CQ_3, /* 0x05: LO2C Queued Byte 3 */
MT2063_REG_RSVD_06, /* 0x06: Reserved */
MT2063_REG_LO_STATUS, /* 0x07: LO Status */
MT2063_REG_FIFFC, /* 0x08: FIFF Center */
MT2063_REG_CLEARTUNE, /* 0x09: ClearTune Filter */
MT2063_REG_ADC_OUT, /* 0x0A: ADC_OUT */
MT2063_REG_LO1C_1, /* 0x0B: LO1C Byte 1 */
MT2063_REG_LO1C_2, /* 0x0C: LO1C Byte 2 */
MT2063_REG_LO2C_1, /* 0x0D: LO2C Byte 1 */
MT2063_REG_LO2C_2, /* 0x0E: LO2C Byte 2 */
MT2063_REG_LO2C_3, /* 0x0F: LO2C Byte 3 */
MT2063_REG_RSVD_10, /* 0x10: Reserved */
MT2063_REG_PWR_1, /* 0x11: PWR Byte 1 */
MT2063_REG_PWR_2, /* 0x12: PWR Byte 2 */
MT2063_REG_TEMP_STATUS, /* 0x13: Temp Status */
MT2063_REG_XO_STATUS, /* 0x14: Crystal Status */
MT2063_REG_RF_STATUS, /* 0x15: RF Attn Status */
MT2063_REG_FIF_STATUS, /* 0x16: FIF Attn Status */
MT2063_REG_LNA_OV, /* 0x17: LNA Attn Override */
MT2063_REG_RF_OV, /* 0x18: RF Attn Override */
MT2063_REG_FIF_OV, /* 0x19: FIF Attn Override */
MT2063_REG_LNA_TGT, /* 0x1A: Reserved */
MT2063_REG_PD1_TGT, /* 0x1B: Pwr Det 1 Target */
MT2063_REG_PD2_TGT, /* 0x1C: Pwr Det 2 Target */
MT2063_REG_RSVD_1D, /* 0x1D: Reserved */
MT2063_REG_RSVD_1E, /* 0x1E: Reserved */
MT2063_REG_RSVD_1F, /* 0x1F: Reserved */
MT2063_REG_RSVD_20, /* 0x20: Reserved */
MT2063_REG_BYP_CTRL, /* 0x21: Bypass Control */
MT2063_REG_RSVD_22, /* 0x22: Reserved */
MT2063_REG_RSVD_23, /* 0x23: Reserved */
MT2063_REG_RSVD_24, /* 0x24: Reserved */
MT2063_REG_RSVD_25, /* 0x25: Reserved */
MT2063_REG_RSVD_26, /* 0x26: Reserved */
MT2063_REG_RSVD_27, /* 0x27: Reserved */
MT2063_REG_FIFF_CTRL, /* 0x28: FIFF Control */
MT2063_REG_FIFF_OFFSET, /* 0x29: FIFF Offset */
MT2063_REG_CTUNE_CTRL, /* 0x2A: Reserved */
MT2063_REG_CTUNE_OV, /* 0x2B: Reserved */
MT2063_REG_CTRL_2C, /* 0x2C: Reserved */
MT2063_REG_FIFF_CTRL2, /* 0x2D: Fiff Control */
MT2063_REG_RSVD_2E, /* 0x2E: Reserved */
MT2063_REG_DNC_GAIN, /* 0x2F: DNC Control */
MT2063_REG_VGA_GAIN, /* 0x30: VGA Gain Ctrl */
MT2063_REG_RSVD_31, /* 0x31: Reserved */
MT2063_REG_TEMP_SEL, /* 0x32: Temperature Selection */
MT2063_REG_RSVD_33, /* 0x33: Reserved */
MT2063_REG_RSVD_34, /* 0x34: Reserved */
MT2063_REG_RSVD_35, /* 0x35: Reserved */
MT2063_REG_RSVD_36, /* 0x36: Reserved */
MT2063_REG_RSVD_37, /* 0x37: Reserved */
MT2063_REG_RSVD_38, /* 0x38: Reserved */
MT2063_REG_RSVD_39, /* 0x39: Reserved */
MT2063_REG_RSVD_3A, /* 0x3A: Reserved */
MT2063_REG_RSVD_3B, /* 0x3B: Reserved */
MT2063_REG_RSVD_3C, /* 0x3C: Reserved */
MT2063_REG_END_REGS
};
struct mt2063_state {
struct i2c_adapter *i2c;
bool init;
const struct mt2063_config *config;
struct dvb_tuner_ops ops;
struct dvb_frontend *frontend;
u32 frequency;
u32 srate;
u32 bandwidth;
u32 reference;
u32 tuner_id;
struct MT2063_AvoidSpursData_t AS_Data;
u32 f_IF1_actual;
u32 rcvr_mode;
u32 ctfilt_sw;
u32 CTFiltMax[31];
u32 num_regs;
u8 reg[MT2063_REG_END_REGS];
};
/*
* mt2063_write - Write data into the I2C bus
*/
static int mt2063_write(struct mt2063_state *state, u8 reg, u8 *data, u32 len)
{
struct dvb_frontend *fe = state->frontend;
int ret;
u8 buf[60];
struct i2c_msg msg = {
.addr = state->config->tuner_address,
.flags = 0,
.buf = buf,
.len = len + 1
};
dprintk(2, "\n");
msg.buf[0] = reg;
memcpy(msg.buf + 1, data, len);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = i2c_transfer(state->i2c, &msg, 1);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (ret < 0)
printk(KERN_ERR "%s error ret=%d\n", __func__, ret);
return ret;
}
/*
* mt2063_write - Write register data into the I2C bus, caching the value
*/
static int mt2063_setreg(struct mt2063_state *state, u8 reg, u8 val)
{
int status;
dprintk(2, "\n");
if (reg >= MT2063_REG_END_REGS)
return -ERANGE;
status = mt2063_write(state, reg, &val, 1);
if (status < 0)
return status;
state->reg[reg] = val;
return 0;
}
/*
* mt2063_read - Read data from the I2C bus
*/
static int mt2063_read(struct mt2063_state *state,
u8 subAddress, u8 *pData, u32 cnt)
{
int status = 0; /* Status to be returned */
struct dvb_frontend *fe = state->frontend;
u32 i = 0;
dprintk(2, "addr 0x%02x, cnt %d\n", subAddress, cnt);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
for (i = 0; i < cnt; i++) {
u8 b0[] = { subAddress + i };
struct i2c_msg msg[] = {
{
.addr = state->config->tuner_address,
.flags = 0,
.buf = b0,
.len = 1
}, {
.addr = state->config->tuner_address,
.flags = I2C_M_RD,
.buf = pData + i,
.len = 1
}
};
status = i2c_transfer(state->i2c, msg, 2);
dprintk(2, "addr 0x%02x, ret = %d, val = 0x%02x\n",
subAddress + i, status, *(pData + i));
if (status < 0)
break;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (status < 0)
printk(KERN_ERR "Can't read from address 0x%02x,\n",
subAddress + i);
return status;
}
/*
* FIXME: Is this really needed?
*/
static int MT2063_Sleep(struct dvb_frontend *fe)
{
/*
* ToDo: Add code here to implement a OS blocking
*/
msleep(100);
return 0;
}
/*
* Microtune spur avoidance
*/
/* Implement ceiling, floor functions. */
#define ceil(n, d) (((n) < 0) ? (-((-(n))/(d))) : (n)/(d) + ((n)%(d) != 0))
#define floor(n, d) (((n) < 0) ? (-((-(n))/(d))) - ((n)%(d) != 0) : (n)/(d))
struct MT2063_FIFZone_t {
s32 min_;
s32 max_;
};
static struct MT2063_ExclZone_t *InsertNode(struct MT2063_AvoidSpursData_t
*pAS_Info,
struct MT2063_ExclZone_t *pPrevNode)
{
struct MT2063_ExclZone_t *pNode;
dprintk(2, "\n");
/* Check for a node in the free list */
if (pAS_Info->freeZones != NULL) {
/* Use one from the free list */
pNode = pAS_Info->freeZones;
pAS_Info->freeZones = pNode->next_;
} else {
/* Grab a node from the array */
pNode = &pAS_Info->MT2063_ExclZones[pAS_Info->nZones];
}
if (pPrevNode != NULL) {
pNode->next_ = pPrevNode->next_;
pPrevNode->next_ = pNode;
} else { /* insert at the beginning of the list */
pNode->next_ = pAS_Info->usedZones;
pAS_Info->usedZones = pNode;
}
pAS_Info->nZones++;
return pNode;
}
static struct MT2063_ExclZone_t *RemoveNode(struct MT2063_AvoidSpursData_t
*pAS_Info,
struct MT2063_ExclZone_t *pPrevNode,
struct MT2063_ExclZone_t
*pNodeToRemove)
{
struct MT2063_ExclZone_t *pNext = pNodeToRemove->next_;
dprintk(2, "\n");
/* Make previous node point to the subsequent node */
if (pPrevNode != NULL)
pPrevNode->next_ = pNext;
/* Add pNodeToRemove to the beginning of the freeZones */
pNodeToRemove->next_ = pAS_Info->freeZones;
pAS_Info->freeZones = pNodeToRemove;
/* Decrement node count */
pAS_Info->nZones--;
return pNext;
}
/*
* MT_AddExclZone()
*
* Add (and merge) an exclusion zone into the list.
* If the range (f_min, f_max) is totally outside the
* 1st IF BW, ignore the entry.
* If the range (f_min, f_max) is negative, ignore the entry.
*/
static void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
u32 f_min, u32 f_max)
{
struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
struct MT2063_ExclZone_t *pPrev = NULL;
struct MT2063_ExclZone_t *pNext = NULL;
dprintk(2, "\n");
/* Check to see if this overlaps the 1st IF filter */
if ((f_max > (pAS_Info->f_if1_Center - (pAS_Info->f_if1_bw / 2)))
&& (f_min < (pAS_Info->f_if1_Center + (pAS_Info->f_if1_bw / 2)))
&& (f_min < f_max)) {
/*
* 1 2 3 4 5 6
*
* New entry: |---| |--| |--| |-| |---| |--|
* or or or or or
* Existing: |--| |--| |--| |---| |-| |--|
*/
/* Check for our place in the list */
while ((pNode != NULL) && (pNode->max_ < f_min)) {
pPrev = pNode;
pNode = pNode->next_;
}
if ((pNode != NULL) && (pNode->min_ < f_max)) {
/* Combine me with pNode */
if (f_min < pNode->min_)
pNode->min_ = f_min;
if (f_max > pNode->max_)
pNode->max_ = f_max;
} else {
pNode = InsertNode(pAS_Info, pPrev);
pNode->min_ = f_min;
pNode->max_ = f_max;
}
/* Look for merging possibilities */
pNext = pNode->next_;
while ((pNext != NULL) && (pNext->min_ < pNode->max_)) {
if (pNext->max_ > pNode->max_)
pNode->max_ = pNext->max_;
/* Remove pNext, return ptr to pNext->next */
pNext = RemoveNode(pAS_Info, pNode, pNext);
}
}
}
/*
* Reset all exclusion zones.
* Add zones to protect the PLL FracN regions near zero
*/
static void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info)
{
u32 center;
dprintk(2, "\n");
pAS_Info->nZones = 0; /* this clears the used list */
pAS_Info->usedZones = NULL; /* reset ptr */
pAS_Info->freeZones = NULL; /* reset ptr */
center =
pAS_Info->f_ref *
((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 +
pAS_Info->f_in) / pAS_Info->f_ref) - pAS_Info->f_in;
while (center <
pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
pAS_Info->f_LO1_FracN_Avoid) {
/* Exclude LO1 FracN */
MT2063_AddExclZone(pAS_Info,
center - pAS_Info->f_LO1_FracN_Avoid,
center - 1);
MT2063_AddExclZone(pAS_Info, center + 1,
center + pAS_Info->f_LO1_FracN_Avoid);
center += pAS_Info->f_ref;
}
center =
pAS_Info->f_ref *
((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 -
pAS_Info->f_out) / pAS_Info->f_ref) + pAS_Info->f_out;
while (center <
pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
pAS_Info->f_LO2_FracN_Avoid) {
/* Exclude LO2 FracN */
MT2063_AddExclZone(pAS_Info,
center - pAS_Info->f_LO2_FracN_Avoid,
center - 1);
MT2063_AddExclZone(pAS_Info, center + 1,
center + pAS_Info->f_LO2_FracN_Avoid);
center += pAS_Info->f_ref;
}
if (MT2063_EXCLUDE_US_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
/* Exclude LO1 values that conflict with DECT channels */
MT2063_AddExclZone(pAS_Info, 1920836000 - pAS_Info->f_in, 1922236000 - pAS_Info->f_in); /* Ctr = 1921.536 */
MT2063_AddExclZone(pAS_Info, 1922564000 - pAS_Info->f_in, 1923964000 - pAS_Info->f_in); /* Ctr = 1923.264 */
MT2063_AddExclZone(pAS_Info, 1924292000 - pAS_Info->f_in, 1925692000 - pAS_Info->f_in); /* Ctr = 1924.992 */
MT2063_AddExclZone(pAS_Info, 1926020000 - pAS_Info->f_in, 1927420000 - pAS_Info->f_in); /* Ctr = 1926.720 */
MT2063_AddExclZone(pAS_Info, 1927748000 - pAS_Info->f_in, 1929148000 - pAS_Info->f_in); /* Ctr = 1928.448 */
}
if (MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
MT2063_AddExclZone(pAS_Info, 1896644000 - pAS_Info->f_in, 1898044000 - pAS_Info->f_in); /* Ctr = 1897.344 */
MT2063_AddExclZone(pAS_Info, 1894916000 - pAS_Info->f_in, 1896316000 - pAS_Info->f_in); /* Ctr = 1895.616 */
MT2063_AddExclZone(pAS_Info, 1893188000 - pAS_Info->f_in, 1894588000 - pAS_Info->f_in); /* Ctr = 1893.888 */
MT2063_AddExclZone(pAS_Info, 1891460000 - pAS_Info->f_in, 1892860000 - pAS_Info->f_in); /* Ctr = 1892.16 */
MT2063_AddExclZone(pAS_Info, 1889732000 - pAS_Info->f_in, 1891132000 - pAS_Info->f_in); /* Ctr = 1890.432 */
MT2063_AddExclZone(pAS_Info, 1888004000 - pAS_Info->f_in, 1889404000 - pAS_Info->f_in); /* Ctr = 1888.704 */
MT2063_AddExclZone(pAS_Info, 1886276000 - pAS_Info->f_in, 1887676000 - pAS_Info->f_in); /* Ctr = 1886.976 */
MT2063_AddExclZone(pAS_Info, 1884548000 - pAS_Info->f_in, 1885948000 - pAS_Info->f_in); /* Ctr = 1885.248 */
MT2063_AddExclZone(pAS_Info, 1882820000 - pAS_Info->f_in, 1884220000 - pAS_Info->f_in); /* Ctr = 1883.52 */
MT2063_AddExclZone(pAS_Info, 1881092000 - pAS_Info->f_in, 1882492000 - pAS_Info->f_in); /* Ctr = 1881.792 */
}
}
/*
* MT_ChooseFirstIF - Choose the best available 1st IF
* If f_Desired is not excluded, choose that first.
* Otherwise, return the value closest to f_Center that is
* not excluded
*/
static u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
{
/*
* Update "f_Desired" to be the nearest "combinational-multiple" of
* "f_LO1_Step".
* The resulting number, F_LO1 must be a multiple of f_LO1_Step.
* And F_LO1 is the arithmetic sum of f_in + f_Center.
* Neither f_in, nor f_Center must be a multiple of f_LO1_Step.
* However, the sum must be.
*/
const u32 f_Desired =
pAS_Info->f_LO1_Step *
((pAS_Info->f_if1_Request + pAS_Info->f_in +
pAS_Info->f_LO1_Step / 2) / pAS_Info->f_LO1_Step) -
pAS_Info->f_in;
const u32 f_Step =
(pAS_Info->f_LO1_Step >
pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info->
f_LO2_Step;
u32 f_Center;
s32 i;
s32 j = 0;
u32 bDesiredExcluded = 0;
u32 bZeroExcluded = 0;
s32 tmpMin, tmpMax;
s32 bestDiff;
struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
struct MT2063_FIFZone_t zones[MT2063_MAX_ZONES];
dprintk(2, "\n");
if (pAS_Info->nZones == 0)
return f_Desired;
/*
* f_Center needs to be an integer multiple of f_Step away
* from f_Desired
*/
if (pAS_Info->f_if1_Center > f_Desired)
f_Center =
f_Desired +
f_Step *
((pAS_Info->f_if1_Center - f_Desired +
f_Step / 2) / f_Step);
else
f_Center =
f_Desired -
f_Step *
((f_Desired - pAS_Info->f_if1_Center +
f_Step / 2) / f_Step);
/*
* Take MT_ExclZones, center around f_Center and change the
* resolution to f_Step
*/
while (pNode != NULL) {
/* floor function */
tmpMin =
floor((s32) (pNode->min_ - f_Center), (s32) f_Step);
/* ceil function */
tmpMax =
ceil((s32) (pNode->max_ - f_Center), (s32) f_Step);
if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired))
bDesiredExcluded = 1;
if ((tmpMin < 0) && (tmpMax > 0))
bZeroExcluded = 1;
/* See if this zone overlaps the previous */
if ((j > 0) && (tmpMin < zones[j - 1].max_))
zones[j - 1].max_ = tmpMax;
else {
/* Add new zone */
zones[j].min_ = tmpMin;
zones[j].max_ = tmpMax;
j++;
}
pNode = pNode->next_;
}
/*
* If the desired is okay, return with it
*/
if (bDesiredExcluded == 0)
return f_Desired;
/*
* If the desired is excluded and the center is okay, return with it
*/
if (bZeroExcluded == 0)
return f_Center;
/* Find the value closest to 0 (f_Center) */
bestDiff = zones[0].min_;
for (i = 0; i < j; i++) {
if (abs(zones[i].min_) < abs(bestDiff))
bestDiff = zones[i].min_;
if (abs(zones[i].max_) < abs(bestDiff))
bestDiff = zones[i].max_;
}
if (bestDiff < 0)
return f_Center - ((u32) (-bestDiff) * f_Step);
return f_Center + (bestDiff * f_Step);
}
/**
* IsSpurInBand() - Checks to see if a spur will be present within the IF's
* bandwidth. (fIFOut +/- fIFBW, -fIFOut +/- fIFBW)
*
* ma mb mc md
* <--+-+-+-------------------+-------------------+-+-+-->
* | ^ 0 ^ |
* ^ b=-fIFOut+fIFBW/2 -b=+fIFOut-fIFBW/2 ^
* a=-fIFOut-fIFBW/2 -a=+fIFOut+fIFBW/2
*
* Note that some equations are doubled to prevent round-off
* problems when calculating fIFBW/2
*
* @pAS_Info: Avoid Spurs information block
* @fm: If spur, amount f_IF1 has to move negative
* @fp: If spur, amount f_IF1 has to move positive
*
* Returns 1 if an LO spur would be present, otherwise 0.
*/
static u32 IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
u32 *fm, u32 * fp)
{
/*
** Calculate LO frequency settings.
*/
u32 n, n0;
const u32 f_LO1 = pAS_Info->f_LO1;
const u32 f_LO2 = pAS_Info->f_LO2;
const u32 d = pAS_Info->f_out + pAS_Info->f_out_bw / 2;
const u32 c = d - pAS_Info->f_out_bw;
const u32 f = pAS_Info->f_zif_bw / 2;
const u32 f_Scale = (f_LO1 / (UINT_MAX / 2 / pAS_Info->maxH1)) + 1;
s32 f_nsLO1, f_nsLO2;
s32 f_Spur;
u32 ma, mb, mc, md, me, mf;
u32 lo_gcd, gd_Scale, gc_Scale, gf_Scale, hgds, hgfs, hgcs;
dprintk(2, "\n");
*fm = 0;
/*
** For each edge (d, c & f), calculate a scale, based on the gcd
** of f_LO1, f_LO2 and the edge value. Use the larger of this
** gcd-based scale factor or f_Scale.
*/
lo_gcd = gcd(f_LO1, f_LO2);
gd_Scale = max((u32) gcd(lo_gcd, d), f_Scale);
hgds = gd_Scale / 2;
gc_Scale = max((u32) gcd(lo_gcd, c), f_Scale);
hgcs = gc_Scale / 2;
gf_Scale = max((u32) gcd(lo_gcd, f), f_Scale);
hgfs = gf_Scale / 2;
n0 = DIV_ROUND_UP(f_LO2 - d, f_LO1 - f_LO2);
/* Check out all multiples of LO1 from n0 to m_maxLOSpurHarmonic */
for (n = n0; n <= pAS_Info->maxH1; ++n) {
md = (n * ((f_LO1 + hgds) / gd_Scale) -
((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);
/* If # fLO2 harmonics > m_maxLOSpurHarmonic, then no spurs present */
if (md >= pAS_Info->maxH1)
break;
ma = (n * ((f_LO1 + hgds) / gd_Scale) +
((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);
/* If no spurs between +/- (f_out + f_IFBW/2), then try next harmonic */
if (md == ma)
continue;
mc = (n * ((f_LO1 + hgcs) / gc_Scale) -
((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
if (mc != md) {
f_nsLO1 = (s32) (n * (f_LO1 / gc_Scale));
f_nsLO2 = (s32) (mc * (f_LO2 / gc_Scale));
f_Spur =
(gc_Scale * (f_nsLO1 - f_nsLO2)) +
n * (f_LO1 % gc_Scale) - mc * (f_LO2 % gc_Scale);
*fp = ((f_Spur - (s32) c) / (mc - n)) + 1;
*fm = (((s32) d - f_Spur) / (mc - n)) + 1;
return 1;
}
/* Location of Zero-IF-spur to be checked */
me = (n * ((f_LO1 + hgfs) / gf_Scale) +
((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
mf = (n * ((f_LO1 + hgfs) / gf_Scale) -
((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
if (me != mf) {
f_nsLO1 = n * (f_LO1 / gf_Scale);
f_nsLO2 = me * (f_LO2 / gf_Scale);
f_Spur =
(gf_Scale * (f_nsLO1 - f_nsLO2)) +
n * (f_LO1 % gf_Scale) - me * (f_LO2 % gf_Scale);
*fp = ((f_Spur + (s32) f) / (me - n)) + 1;
*fm = (((s32) f - f_Spur) / (me - n)) + 1;
return 1;
}
mb = (n * ((f_LO1 + hgcs) / gc_Scale) +
((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
if (ma != mb) {
f_nsLO1 = n * (f_LO1 / gc_Scale);
f_nsLO2 = ma * (f_LO2 / gc_Scale);
f_Spur =
(gc_Scale * (f_nsLO1 - f_nsLO2)) +
n * (f_LO1 % gc_Scale) - ma * (f_LO2 % gc_Scale);
*fp = (((s32) d + f_Spur) / (ma - n)) + 1;
*fm = (-(f_Spur + (s32) c) / (ma - n)) + 1;
return 1;
}
}
/* No spurs found */
return 0;
}
/*
* MT_AvoidSpurs() - Main entry point to avoid spurs.
* Checks for existing spurs in present LO1, LO2 freqs
* and if present, chooses spur-free LO1, LO2 combination
* that tunes the same input/output frequencies.
*/
static u32 MT2063_AvoidSpurs(struct MT2063_AvoidSpursData_t *pAS_Info)
{
int status = 0;
u32 fm, fp; /* restricted range on LO's */
pAS_Info->bSpurAvoided = 0;
pAS_Info->nSpursFound = 0;
dprintk(2, "\n");
if (pAS_Info->maxH1 == 0)
return 0;
/*
* Avoid LO Generated Spurs
*
* Make sure that have no LO-related spurs within the IF output
* bandwidth.
*
* If there is an LO spur in this band, start at the current IF1 frequency
* and work out until we find a spur-free frequency or run up against the
* 1st IF SAW band edge. Use temporary copies of fLO1 and fLO2 so that they
* will be unchanged if a spur-free setting is not found.
*/
pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
if (pAS_Info->bSpurPresent) {
u32 zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in; /* current attempt at a 1st IF */
u32 zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */
u32 zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */
u32 delta_IF1;
u32 new_IF1;
/*
** Spur was found, attempt to find a spur-free 1st IF
*/
do {
pAS_Info->nSpursFound++;
/* Raise f_IF1_upper, if needed */
MT2063_AddExclZone(pAS_Info, zfIF1 - fm, zfIF1 + fp);
/* Choose next IF1 that is closest to f_IF1_CENTER */
new_IF1 = MT2063_ChooseFirstIF(pAS_Info);
if (new_IF1 > zfIF1) {
pAS_Info->f_LO1 += (new_IF1 - zfIF1);
pAS_Info->f_LO2 += (new_IF1 - zfIF1);
} else {
pAS_Info->f_LO1 -= (zfIF1 - new_IF1);
pAS_Info->f_LO2 -= (zfIF1 - new_IF1);
}
zfIF1 = new_IF1;
if (zfIF1 > pAS_Info->f_if1_Center)
delta_IF1 = zfIF1 - pAS_Info->f_if1_Center;
else
delta_IF1 = pAS_Info->f_if1_Center - zfIF1;
pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
/*
* Continue while the new 1st IF is still within the 1st IF bandwidth
* and there is a spur in the band (again)
*/
} while ((2 * delta_IF1 + pAS_Info->f_out_bw <= pAS_Info->f_if1_bw) && pAS_Info->bSpurPresent);
/*
* Use the LO-spur free values found. If the search went all
* the way to the 1st IF band edge and always found spurs, just
* leave the original choice. It's as "good" as any other.
*/
if (pAS_Info->bSpurPresent == 1) {
status |= MT2063_SPUR_PRESENT_ERR;
pAS_Info->f_LO1 = zfLO1;
pAS_Info->f_LO2 = zfLO2;
} else
pAS_Info->bSpurAvoided = 1;
}
status |=
((pAS_Info->
nSpursFound << MT2063_SPUR_SHIFT) & MT2063_SPUR_CNT_MASK);
return status;
}
/*
* Constants used by the tuning algorithm
*/
#define MT2063_REF_FREQ (16000000UL) /* Reference oscillator Frequency (in Hz) */
#define MT2063_IF1_BW (22000000UL) /* The IF1 filter bandwidth (in Hz) */
#define MT2063_TUNE_STEP_SIZE (50000UL) /* Tune in steps of 50 kHz */
#define MT2063_SPUR_STEP_HZ (250000UL) /* Step size (in Hz) to move IF1 when avoiding spurs */
#define MT2063_ZIF_BW (2000000UL) /* Zero-IF spur-free bandwidth (in Hz) */
#define MT2063_MAX_HARMONICS_1 (15UL) /* Highest intra-tuner LO Spur Harmonic to be avoided */
#define MT2063_MAX_HARMONICS_2 (5UL) /* Highest inter-tuner LO Spur Harmonic to be avoided */
#define MT2063_MIN_LO_SEP (1000000UL) /* Minimum inter-tuner LO frequency separation */
#define MT2063_LO1_FRACN_AVOID (0UL) /* LO1 FracN numerator avoid region (in Hz) */
#define MT2063_LO2_FRACN_AVOID (199999UL) /* LO2 FracN numerator avoid region (in Hz) */
#define MT2063_MIN_FIN_FREQ (44000000UL) /* Minimum input frequency (in Hz) */
#define MT2063_MAX_FIN_FREQ (1100000000UL) /* Maximum input frequency (in Hz) */
#define MT2063_MIN_FOUT_FREQ (36000000UL) /* Minimum output frequency (in Hz) */
#define MT2063_MAX_FOUT_FREQ (57000000UL) /* Maximum output frequency (in Hz) */
#define MT2063_MIN_DNC_FREQ (1293000000UL) /* Minimum LO2 frequency (in Hz) */
#define MT2063_MAX_DNC_FREQ (1614000000UL) /* Maximum LO2 frequency (in Hz) */
#define MT2063_MIN_UPC_FREQ (1396000000UL) /* Minimum LO1 frequency (in Hz) */
#define MT2063_MAX_UPC_FREQ (2750000000UL) /* Maximum LO1 frequency (in Hz) */
/*
* Define the supported Part/Rev codes for the MT2063
*/
#define MT2063_B0 (0x9B)
#define MT2063_B1 (0x9C)
#define MT2063_B2 (0x9D)
#define MT2063_B3 (0x9E)
/**
* mt2063_lockStatus - Checks to see if LO1 and LO2 are locked
*
* @state: struct mt2063_state pointer
*
* This function returns 0, if no lock, 1 if locked and a value < 1 if error
*/
static int mt2063_lockStatus(struct mt2063_state *state)
{
const u32 nMaxWait = 100; /* wait a maximum of 100 msec */
const u32 nPollRate = 2; /* poll status bits every 2 ms */
const u32 nMaxLoops = nMaxWait / nPollRate;
const u8 LO1LK = 0x80;
u8 LO2LK = 0x08;
int status;
u32 nDelays = 0;
dprintk(2, "\n");
/* LO2 Lock bit was in a different place for B0 version */
if (state->tuner_id == MT2063_B0)
LO2LK = 0x40;
do {
status = mt2063_read(state, MT2063_REG_LO_STATUS,
&state->reg[MT2063_REG_LO_STATUS], 1);
if (status < 0)
return status;
if ((state->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) ==
(LO1LK | LO2LK)) {
return TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO;
}
msleep(nPollRate); /* Wait between retries */
} while (++nDelays < nMaxLoops);
/*
* Got no lock or partial lock
*/
return 0;
}
/*
* Constants for setting receiver modes.
* (6 modes defined at this time, enumerated by mt2063_delivery_sys)
* (DNC1GC & DNC2GC are the values, which are used, when the specific
* DNC Output is selected, the other is always off)
*
* enum mt2063_delivery_sys
* -------------+----------------------------------------------
* Mode 0 : | MT2063_CABLE_QAM
* Mode 1 : | MT2063_CABLE_ANALOG
* Mode 2 : | MT2063_OFFAIR_COFDM
* Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS
* Mode 4 : | MT2063_OFFAIR_ANALOG
* Mode 5 : | MT2063_OFFAIR_8VSB
* --------------+----------------------------------------------
*
* |<---------- Mode -------------->|
* Reg Field | 0 | 1 | 2 | 3 | 4 | 5 |
* ------------+-----+-----+-----+-----+-----+-----+
* RFAGCen | OFF | OFF | OFF | OFF | OFF | OFF
* LNARin | 0 | 0 | 3 | 3 | 3 | 3
* FIFFQen | 1 | 1 | 1 | 1 | 1 | 1
* FIFFq | 0 | 0 | 0 | 0 | 0 | 0
* DNC1gc | 0 | 0 | 0 | 0 | 0 | 0
* DNC2gc | 0 | 0 | 0 | 0 | 0 | 0
* GCU Auto | 1 | 1 | 1 | 1 | 1 | 1
* LNA max Atn | 31 | 31 | 31 | 31 | 31 | 31
* LNA Target | 44 | 43 | 43 | 43 | 43 | 43
* ign RF Ovl | 0 | 0 | 0 | 0 | 0 | 0
* RF max Atn | 31 | 31 | 31 | 31 | 31 | 31
* PD1 Target | 36 | 36 | 38 | 38 | 36 | 38
* ign FIF Ovl | 0 | 0 | 0 | 0 | 0 | 0
* FIF max Atn | 5 | 5 | 5 | 5 | 5 | 5
* PD2 Target | 40 | 33 | 42 | 42 | 33 | 42
*/
enum mt2063_delivery_sys {
MT2063_CABLE_QAM = 0,
MT2063_CABLE_ANALOG,
MT2063_OFFAIR_COFDM,
MT2063_OFFAIR_COFDM_SAWLESS,
MT2063_OFFAIR_ANALOG,
MT2063_OFFAIR_8VSB,
MT2063_NUM_RCVR_MODES
};
static const char *mt2063_mode_name[] = {
[MT2063_CABLE_QAM] = "digital cable",
[MT2063_CABLE_ANALOG] = "analog cable",
[MT2063_OFFAIR_COFDM] = "digital offair",
[MT2063_OFFAIR_COFDM_SAWLESS] = "digital offair without SAW",
[MT2063_OFFAIR_ANALOG] = "analog offair",
[MT2063_OFFAIR_8VSB] = "analog offair 8vsb",
};
static const u8 RFAGCEN[] = { 0, 0, 0, 0, 0, 0 };
static const u8 LNARIN[] = { 0, 0, 3, 3, 3, 3 };
static const u8 FIFFQEN[] = { 1, 1, 1, 1, 1, 1 };
static const u8 FIFFQ[] = { 0, 0, 0, 0, 0, 0 };
static const u8 DNC1GC[] = { 0, 0, 0, 0, 0, 0 };
static const u8 DNC2GC[] = { 0, 0, 0, 0, 0, 0 };
static const u8 ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 };
static const u8 LNATGT[] = { 44, 43, 43, 43, 43, 43 };
static const u8 RFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
static const u8 ACRFMAX[] = { 31, 31, 31, 31, 31, 31 };
static const u8 PD1TGT[] = { 36, 36, 38, 38, 36, 38 };
static const u8 FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
static const u8 ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 };
static const u8 PD2TGT[] = { 40, 33, 38, 42, 30, 38 };
/*
* mt2063_set_dnc_output_enable()
*/
static u32 mt2063_get_dnc_output_enable(struct mt2063_state *state,
enum MT2063_DNC_Output_Enable *pValue)
{
dprintk(2, "\n");
if ((state->reg[MT2063_REG_DNC_GAIN] & 0x03) == 0x03) { /* if DNC1 is off */
if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
*pValue = MT2063_DNC_NONE;
else
*pValue = MT2063_DNC_2;
} else { /* DNC1 is on */
if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
*pValue = MT2063_DNC_1;
else
*pValue = MT2063_DNC_BOTH;
}
return 0;
}
/*
* mt2063_set_dnc_output_enable()
*/
static u32 mt2063_set_dnc_output_enable(struct mt2063_state *state,
enum MT2063_DNC_Output_Enable nValue)
{
int status = 0; /* Status to be returned */
u8 val = 0;
dprintk(2, "\n");
/* selects, which DNC output is used */
switch (nValue) {
case MT2063_DNC_NONE:
val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03; /* Set DNC1GC=3 */
if (state->reg[MT2063_REG_DNC_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_DNC_GAIN,
val);
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */
if (state->reg[MT2063_REG_VGA_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_VGA_GAIN,
val);
val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */
if (state->reg[MT2063_REG_RSVD_20] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_RSVD_20,
val);
break;
case MT2063_DNC_1:
val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[state->rcvr_mode] & 0x03); /* Set DNC1GC=x */
if (state->reg[MT2063_REG_DNC_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_DNC_GAIN,
val);
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */
if (state->reg[MT2063_REG_VGA_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_VGA_GAIN,
val);
val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */
if (state->reg[MT2063_REG_RSVD_20] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_RSVD_20,
val);
break;
case MT2063_DNC_2:
val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03; /* Set DNC1GC=3 */
if (state->reg[MT2063_REG_DNC_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_DNC_GAIN,
val);
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=x */
if (state->reg[MT2063_REG_VGA_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_VGA_GAIN,
val);
val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */
if (state->reg[MT2063_REG_RSVD_20] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_RSVD_20,
val);
break;
case MT2063_DNC_BOTH:
val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[state->rcvr_mode] & 0x03); /* Set DNC1GC=x */
if (state->reg[MT2063_REG_DNC_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_DNC_GAIN,
val);
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=x */
if (state->reg[MT2063_REG_VGA_GAIN] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_VGA_GAIN,
val);
val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */
if (state->reg[MT2063_REG_RSVD_20] !=
val)
status |=
mt2063_setreg(state,
MT2063_REG_RSVD_20,
val);
break;
default:
break;
}
return status;
}
/*
* MT2063_SetReceiverMode() - Set the MT2063 receiver mode, according with
* the selected enum mt2063_delivery_sys type.
*
* (DNC1GC & DNC2GC are the values, which are used, when the specific
* DNC Output is selected, the other is always off)
*
* @state: ptr to mt2063_state structure
* @Mode: desired receiver delivery system
*
* Note: Register cache must be valid for it to work
*/
static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
enum mt2063_delivery_sys Mode)
{
int status = 0; /* Status to be returned */
u8 val;
u32 longval;
dprintk(2, "\n");
if (Mode >= MT2063_NUM_RCVR_MODES)
status = -ERANGE;
/* RFAGCen */
if (status >= 0) {
val =
(state->
reg[MT2063_REG_PD1_TGT] & ~0x40) | (RFAGCEN[Mode]
? 0x40 :
0x00);
if (state->reg[MT2063_REG_PD1_TGT] != val)
status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
}
/* LNARin */
if (status >= 0) {
u8 val = (state->reg[MT2063_REG_CTRL_2C] & ~0x03) |
(LNARIN[Mode] & 0x03);
if (state->reg[MT2063_REG_CTRL_2C] != val)
status |= mt2063_setreg(state, MT2063_REG_CTRL_2C, val);
}
/* FIFFQEN and FIFFQ */
if (status >= 0) {
val =
(state->
reg[MT2063_REG_FIFF_CTRL2] & ~0xF0) |
(FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4);
if (state->reg[MT2063_REG_FIFF_CTRL2] != val) {
status |=
mt2063_setreg(state, MT2063_REG_FIFF_CTRL2, val);
/* trigger FIFF calibration, needed after changing FIFFQ */
val =
(state->reg[MT2063_REG_FIFF_CTRL] | 0x01);
status |=
mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);
val =
(state->
reg[MT2063_REG_FIFF_CTRL] & ~0x01);
status |=
mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);
}
}
/* DNC1GC & DNC2GC */
status |= mt2063_get_dnc_output_enable(state, &longval);
status |= mt2063_set_dnc_output_enable(state, longval);
/* acLNAmax */
if (status >= 0) {
u8 val = (state->reg[MT2063_REG_LNA_OV] & ~0x1F) |
(ACLNAMAX[Mode] & 0x1F);
if (state->reg[MT2063_REG_LNA_OV] != val)
status |= mt2063_setreg(state, MT2063_REG_LNA_OV, val);
}
/* LNATGT */
if (status >= 0) {
u8 val = (state->reg[MT2063_REG_LNA_TGT] & ~0x3F) |
(LNATGT[Mode] & 0x3F);
if (state->reg[MT2063_REG_LNA_TGT] != val)
status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val);
}
/* ACRF */
if (status >= 0) {
u8 val = (state->reg[MT2063_REG_RF_OV] & ~0x1F) |
(ACRFMAX[Mode] & 0x1F);
if (state->reg[MT2063_REG_RF_OV] != val)
status |= mt2063_setreg(state, MT2063_REG_RF_OV, val);
}
/* PD1TGT */
if (status >= 0) {
u8 val = (state->reg[MT2063_REG_PD1_TGT] & ~0x3F) |
(PD1TGT[Mode] & 0x3F);
if (state->reg[MT2063_REG_PD1_TGT] != val)
status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
}
/* FIFATN */
if (status >= 0) {
u8 val = ACFIFMAX[Mode];
if (state->reg[MT2063_REG_PART_REV] != MT2063_B3 && val > 5)
val = 5;
val = (state->reg[MT2063_REG_FIF_OV] & ~0x1F) |
(val & 0x1F);
if (state->reg[MT2063_REG_FIF_OV] != val)
status |= mt2063_setreg(state, MT2063_REG_FIF_OV, val);
}
/* PD2TGT */
if (status >= 0) {
u8 val = (state->reg[MT2063_REG_PD2_TGT] & ~0x3F) |
(PD2TGT[Mode] & 0x3F);
if (state->reg[MT2063_REG_PD2_TGT] != val)
status |= mt2063_setreg(state, MT2063_REG_PD2_TGT, val);
}
/* Ignore ATN Overload */
if (status >= 0) {
val = (state->reg[MT2063_REG_LNA_TGT] & ~0x80) |
(RFOVDIS[Mode] ? 0x80 : 0x00);
if (state->reg[MT2063_REG_LNA_TGT] != val)
status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val);
}
/* Ignore FIF Overload */
if (status >= 0) {
val = (state->reg[MT2063_REG_PD1_TGT] & ~0x80) |
(FIFOVDIS[Mode] ? 0x80 : 0x00);
if (state->reg[MT2063_REG_PD1_TGT] != val)
status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
}
if (status >= 0) {
state->rcvr_mode = Mode;
dprintk(1, "mt2063 mode changed to %s\n",
mt2063_mode_name[state->rcvr_mode]);
}
return status;
}
/*
* MT2063_ClearPowerMaskBits () - Clears the power-down mask bits for various
* sections of the MT2063
*
* @Bits: Mask bits to be cleared.
*
* See definition of MT2063_Mask_Bits type for description
* of each of the power bits.
*/
static u32 MT2063_ClearPowerMaskBits(struct mt2063_state *state,
enum MT2063_Mask_Bits Bits)
{
int status = 0;
dprintk(2, "\n");
Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */
if ((Bits & 0xFF00) != 0) {
state->reg[MT2063_REG_PWR_2] &= ~(u8) (Bits >> 8);
status |=
mt2063_write(state,
MT2063_REG_PWR_2,
&state->reg[MT2063_REG_PWR_2], 1);
}
if ((Bits & 0xFF) != 0) {
state->reg[MT2063_REG_PWR_1] &= ~(u8) (Bits & 0xFF);
status |=
mt2063_write(state,
MT2063_REG_PWR_1,
&state->reg[MT2063_REG_PWR_1], 1);
}
return status;
}
/*
* MT2063_SoftwareShutdown() - Enables or disables software shutdown function.
* When Shutdown is 1, any section whose power
* mask is set will be shutdown.
*/
static u32 MT2063_SoftwareShutdown(struct mt2063_state *state, u8 Shutdown)
{
int status;
dprintk(2, "\n");
if (Shutdown == 1)
state->reg[MT2063_REG_PWR_1] |= 0x04;
else
state->reg[MT2063_REG_PWR_1] &= ~0x04;
status = mt2063_write(state,
MT2063_REG_PWR_1,
&state->reg[MT2063_REG_PWR_1], 1);
if (Shutdown != 1) {
state->reg[MT2063_REG_BYP_CTRL] =
(state->reg[MT2063_REG_BYP_CTRL] & 0x9F) | 0x40;
status |=
mt2063_write(state,
MT2063_REG_BYP_CTRL,
&state->reg[MT2063_REG_BYP_CTRL],
1);
state->reg[MT2063_REG_BYP_CTRL] =
(state->reg[MT2063_REG_BYP_CTRL] & 0x9F);
status |=
mt2063_write(state,
MT2063_REG_BYP_CTRL,
&state->reg[MT2063_REG_BYP_CTRL],
1);
}
return status;
}
static u32 MT2063_Round_fLO(u32 f_LO, u32 f_LO_Step, u32 f_ref)
{
return f_ref * (f_LO / f_ref)
+ f_LO_Step * (((f_LO % f_ref) + (f_LO_Step / 2)) / f_LO_Step);
}
/**
* MT2063_fLO_FractionalTerm - Calculates the portion contributed by FracN / denom.
* This function preserves maximum precision without
* risk of overflow. It accurately calculates
* f_ref * num / denom to within 1 HZ with fixed math.
*
* @f_ref: SRO frequency.
* @num: Fractional portion of the multiplier
* @denom: denominator portion of the ratio
*
* This calculation handles f_ref as two separate 14-bit fields.
* Therefore, a maximum value of 2^28-1 may safely be used for f_ref.
* This is the genesis of the magic number "14" and the magic mask value of
* 0x03FFF.
*
* This routine successfully handles denom values up to and including 2^18.
* Returns: f_ref * num / denom
*/
static u32 MT2063_fLO_FractionalTerm(u32 f_ref, u32 num, u32 denom)
{
u32 t1 = (f_ref >> 14) * num;
u32 term1 = t1 / denom;
u32 loss = t1 % denom;
u32 term2 =
(((f_ref & 0x00003FFF) * num + (loss << 14)) + (denom / 2)) / denom;
return (term1 << 14) + term2;
}
/*
* MT2063_CalcLO1Mult - Calculates Integer divider value and the numerator
* value for a FracN PLL.
*
* This function assumes that the f_LO and f_Ref are
* evenly divisible by f_LO_Step.
*
* @Div: OUTPUT: Whole number portion of the multiplier
* @FracN: OUTPUT: Fractional portion of the multiplier
* @f_LO: desired LO frequency.
* @f_LO_Step: Minimum step size for the LO (in Hz).
* @f_Ref: SRO frequency.
* @f_Avoid: Range of PLL frequencies to avoid near integer multiples
* of f_Ref (in Hz).
*
* Returns: Recalculated LO frequency.
*/
static u32 MT2063_CalcLO1Mult(u32 *Div,
u32 *FracN,
u32 f_LO,
u32 f_LO_Step, u32 f_Ref)
{
/* Calculate the whole number portion of the divider */
*Div = f_LO / f_Ref;
/* Calculate the numerator value (round to nearest f_LO_Step) */
*FracN =
(64 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) +
(f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);
return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN, 64);
}
/**
* MT2063_CalcLO2Mult - Calculates Integer divider value and the numerator
* value for a FracN PLL.
*
* This function assumes that the f_LO and f_Ref are
* evenly divisible by f_LO_Step.
*
* @Div: OUTPUT: Whole number portion of the multiplier
* @FracN: OUTPUT: Fractional portion of the multiplier
* @f_LO: desired LO frequency.
* @f_LO_Step: Minimum step size for the LO (in Hz).
* @f_Ref: SRO frequency.
*
* Returns: Recalculated LO frequency.
*/
static u32 MT2063_CalcLO2Mult(u32 *Div,
u32 *FracN,
u32 f_LO,
u32 f_LO_Step, u32 f_Ref)
{
/* Calculate the whole number portion of the divider */
*Div = f_LO / f_Ref;
/* Calculate the numerator value (round to nearest f_LO_Step) */
*FracN =
(8191 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) +
(f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);
return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN,
8191);
}
/*
* FindClearTuneFilter() - Calculate the corrrect ClearTune filter to be
* used for a given input frequency.
*
* @state: ptr to tuner data structure
* @f_in: RF input center frequency (in Hz).
*
* Returns: ClearTune filter number (0-31)
*/
static u32 FindClearTuneFilter(struct mt2063_state *state, u32 f_in)
{
u32 RFBand;
u32 idx; /* index loop */
/*
** Find RF Band setting
*/
RFBand = 31; /* def when f_in > all */
for (idx = 0; idx < 31; ++idx) {
if (state->CTFiltMax[idx] >= f_in) {
RFBand = idx;
break;
}
}
return RFBand;
}
/*
* MT2063_Tune() - Change the tuner's tuned frequency to RFin.
*/
static u32 MT2063_Tune(struct mt2063_state *state, u32 f_in)
{ /* RF input center frequency */
int status = 0;
u32 LO1; /* 1st LO register value */
u32 Num1; /* Numerator for LO1 reg. value */
u32 f_IF1; /* 1st IF requested */
u32 LO2; /* 2nd LO register value */
u32 Num2; /* Numerator for LO2 reg. value */
u32 ofLO1, ofLO2; /* last time's LO frequencies */
u8 fiffc = 0x80; /* FIFF center freq from tuner */
u32 fiffof; /* Offset from FIFF center freq */
const u8 LO1LK = 0x80; /* Mask for LO1 Lock bit */
u8 LO2LK = 0x08; /* Mask for LO2 Lock bit */
u8 val;
u32 RFBand;
dprintk(2, "\n");
/* Check the input and output frequency ranges */
if ((f_in < MT2063_MIN_FIN_FREQ) || (f_in > MT2063_MAX_FIN_FREQ))
return -EINVAL;
if ((state->AS_Data.f_out < MT2063_MIN_FOUT_FREQ)
|| (state->AS_Data.f_out > MT2063_MAX_FOUT_FREQ))
return -EINVAL;
/*
* Save original LO1 and LO2 register values
*/
ofLO1 = state->AS_Data.f_LO1;
ofLO2 = state->AS_Data.f_LO2;
/*
* Find and set RF Band setting
*/
if (state->ctfilt_sw == 1) {
val = (state->reg[MT2063_REG_CTUNE_CTRL] | 0x08);
if (state->reg[MT2063_REG_CTUNE_CTRL] != val) {
status |=
mt2063_setreg(state, MT2063_REG_CTUNE_CTRL, val);
}
val = state->reg[MT2063_REG_CTUNE_OV];
RFBand = FindClearTuneFilter(state, f_in);
state->reg[MT2063_REG_CTUNE_OV] =
(u8) ((state->reg[MT2063_REG_CTUNE_OV] & ~0x1F)
| RFBand);
if (state->reg[MT2063_REG_CTUNE_OV] != val) {
status |=
mt2063_setreg(state, MT2063_REG_CTUNE_OV, val);
}
}
/*
* Read the FIFF Center Frequency from the tuner
*/
if (status >= 0) {
status |=
mt2063_read(state,
MT2063_REG_FIFFC,
&state->reg[MT2063_REG_FIFFC], 1);
fiffc = state->reg[MT2063_REG_FIFFC];
}
/*
* Assign in the requested values
*/
state->AS_Data.f_in = f_in;
/* Request a 1st IF such that LO1 is on a step size */
state->AS_Data.f_if1_Request =
MT2063_Round_fLO(state->AS_Data.f_if1_Request + f_in,
state->AS_Data.f_LO1_Step,
state->AS_Data.f_ref) - f_in;
/*
* Calculate frequency settings. f_IF1_FREQ + f_in is the
* desired LO1 frequency
*/
MT2063_ResetExclZones(&state->AS_Data);
f_IF1 = MT2063_ChooseFirstIF(&state->AS_Data);
state->AS_Data.f_LO1 =
MT2063_Round_fLO(f_IF1 + f_in, state->AS_Data.f_LO1_Step,
state->AS_Data.f_ref);
state->AS_Data.f_LO2 =
MT2063_Round_fLO(state->AS_Data.f_LO1 - state->AS_Data.f_out - f_in,
state->AS_Data.f_LO2_Step, state->AS_Data.f_ref);
/*
* Check for any LO spurs in the output bandwidth and adjust
* the LO settings to avoid them if needed
*/
status |= MT2063_AvoidSpurs(&state->AS_Data);
/*
* MT_AvoidSpurs spurs may have changed the LO1 & LO2 values.
* Recalculate the LO frequencies and the values to be placed
* in the tuning registers.
*/
state->AS_Data.f_LO1 =
MT2063_CalcLO1Mult(&LO1, &Num1, state->AS_Data.f_LO1,
state->AS_Data.f_LO1_Step, state->AS_Data.f_ref);
state->AS_Data.f_LO2 =
MT2063_Round_fLO(state->AS_Data.f_LO1 - state->AS_Data.f_out - f_in,
state->AS_Data.f_LO2_Step, state->AS_Data.f_ref);
state->AS_Data.f_LO2 =
MT2063_CalcLO2Mult(&LO2, &Num2, state->AS_Data.f_LO2,
state->AS_Data.f_LO2_Step, state->AS_Data.f_ref);
/*
* Check the upconverter and downconverter frequency ranges
*/
if ((state->AS_Data.f_LO1 < MT2063_MIN_UPC_FREQ)
|| (state->AS_Data.f_LO1 > MT2063_MAX_UPC_FREQ))
status |= MT2063_UPC_RANGE;
if ((state->AS_Data.f_LO2 < MT2063_MIN_DNC_FREQ)
|| (state->AS_Data.f_LO2 > MT2063_MAX_DNC_FREQ))
status |= MT2063_DNC_RANGE;
/* LO2 Lock bit was in a different place for B0 version */
if (state->tuner_id == MT2063_B0)
LO2LK = 0x40;
/*
* If we have the same LO frequencies and we're already locked,
* then skip re-programming the LO registers.
*/
if ((ofLO1 != state->AS_Data.f_LO1)
|| (ofLO2 != state->AS_Data.f_LO2)
|| ((state->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) !=
(LO1LK | LO2LK))) {
/*
* Calculate the FIFFOF register value
*
* IF1_Actual
* FIFFOF = ------------ - 8 * FIFFC - 4992
* f_ref/64
*/
fiffof =
(state->AS_Data.f_LO1 -
f_in) / (state->AS_Data.f_ref / 64) - 8 * (u32) fiffc -
4992;
if (fiffof > 0xFF)
fiffof = 0xFF;
/*
* Place all of the calculated values into the local tuner
* register fields.
*/
if (status >= 0) {
state->reg[MT2063_REG_LO1CQ_1] = (u8) (LO1 & 0xFF); /* DIV1q */
state->reg[MT2063_REG_LO1CQ_2] = (u8) (Num1 & 0x3F); /* NUM1q */
state->reg[MT2063_REG_LO2CQ_1] = (u8) (((LO2 & 0x7F) << 1) /* DIV2q */
|(Num2 >> 12)); /* NUM2q (hi) */
state->reg[MT2063_REG_LO2CQ_2] = (u8) ((Num2 & 0x0FF0) >> 4); /* NUM2q (mid) */
state->reg[MT2063_REG_LO2CQ_3] = (u8) (0xE0 | (Num2 & 0x000F)); /* NUM2q (lo) */
/*
* Now write out the computed register values
* IMPORTANT: There is a required order for writing
* (0x05 must follow all the others).
*/
status |= mt2063_write(state, MT2063_REG_LO1CQ_1, &state->reg[MT2063_REG_LO1CQ_1], 5); /* 0x01 - 0x05 */
if (state->tuner_id == MT2063_B0) {
/* Re-write the one-shot bits to trigger the tune operation */
status |= mt2063_write(state, MT2063_REG_LO2CQ_3, &state->reg[MT2063_REG_LO2CQ_3], 1); /* 0x05 */
}
/* Write out the FIFF offset only if it's changing */
if (state->reg[MT2063_REG_FIFF_OFFSET] !=
(u8) fiffof) {
state->reg[MT2063_REG_FIFF_OFFSET] =
(u8) fiffof;
status |=
mt2063_write(state,
MT2063_REG_FIFF_OFFSET,
&state->
reg[MT2063_REG_FIFF_OFFSET],
1);
}
}
/*
* Check for LO's locking
*/
if (status < 0)
return status;
status = mt2063_lockStatus(state);
if (status < 0)
return status;
if (!status)
return -EINVAL; /* Couldn't lock */
/*
* If we locked OK, assign calculated data to mt2063_state structure
*/
state->f_IF1_actual = state->AS_Data.f_LO1 - f_in;
}
return status;
}
static const u8 MT2063B0_defaults[] = {
/* Reg, Value */
0x19, 0x05,
0x1B, 0x1D,
0x1C, 0x1F,
0x1D, 0x0F,
0x1E, 0x3F,
0x1F, 0x0F,
0x20, 0x3F,
0x22, 0x21,
0x23, 0x3F,
0x24, 0x20,
0x25, 0x3F,
0x27, 0xEE,
0x2C, 0x27, /* bit at 0x20 is cleared below */
0x30, 0x03,
0x2C, 0x07, /* bit at 0x20 is cleared here */
0x2D, 0x87,
0x2E, 0xAA,
0x28, 0xE1, /* Set the FIFCrst bit here */
0x28, 0xE0, /* Clear the FIFCrst bit here */
0x00
};
/* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
static const u8 MT2063B1_defaults[] = {
/* Reg, Value */
0x05, 0xF0,
0x11, 0x10, /* New Enable AFCsd */
0x19, 0x05,
0x1A, 0x6C,
0x1B, 0x24,
0x1C, 0x28,
0x1D, 0x8F,
0x1E, 0x14,
0x1F, 0x8F,
0x20, 0x57,
0x22, 0x21, /* New - ver 1.03 */
0x23, 0x3C, /* New - ver 1.10 */
0x24, 0x20, /* New - ver 1.03 */
0x2C, 0x24, /* bit at 0x20 is cleared below */
0x2D, 0x87, /* FIFFQ=0 */
0x2F, 0xF3,
0x30, 0x0C, /* New - ver 1.11 */
0x31, 0x1B, /* New - ver 1.11 */
0x2C, 0x04, /* bit at 0x20 is cleared here */
0x28, 0xE1, /* Set the FIFCrst bit here */
0x28, 0xE0, /* Clear the FIFCrst bit here */
0x00
};
/* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
static const u8 MT2063B3_defaults[] = {
/* Reg, Value */
0x05, 0xF0,
0x19, 0x3D,
0x2C, 0x24, /* bit at 0x20 is cleared below */
0x2C, 0x04, /* bit at 0x20 is cleared here */
0x28, 0xE1, /* Set the FIFCrst bit here */
0x28, 0xE0, /* Clear the FIFCrst bit here */
0x00
};
static int mt2063_init(struct dvb_frontend *fe)
{
int status;
struct mt2063_state *state = fe->tuner_priv;
u8 all_resets = 0xF0; /* reset/load bits */
const u8 *def = NULL;
char *step;
u32 FCRUN;
s32 maxReads;
u32 fcu_osc;
u32 i;
dprintk(2, "\n");
state->rcvr_mode = MT2063_CABLE_QAM;
/* Read the Part/Rev code from the tuner */
status = mt2063_read(state, MT2063_REG_PART_REV,
&state->reg[MT2063_REG_PART_REV], 1);
if (status < 0) {
printk(KERN_ERR "Can't read mt2063 part ID\n");
return status;
}
/* Check the part/rev code */
switch (state->reg[MT2063_REG_PART_REV]) {
case MT2063_B0:
step = "B0";
break;
case MT2063_B1:
step = "B1";
break;
case MT2063_B2:
step = "B2";
break;
case MT2063_B3:
step = "B3";
break;
default:
printk(KERN_ERR "mt2063: Unknown mt2063 device ID (0x%02x)\n",
state->reg[MT2063_REG_PART_REV]);
return -ENODEV; /* Wrong tuner Part/Rev code */
}
/* Check the 2nd byte of the Part/Rev code from the tuner */
status = mt2063_read(state, MT2063_REG_RSVD_3B,
&state->reg[MT2063_REG_RSVD_3B], 1);
/* b7 != 0 ==> NOT MT2063 */
if (status < 0 || ((state->reg[MT2063_REG_RSVD_3B] & 0x80) != 0x00)) {
printk(KERN_ERR "mt2063: Unknown part ID (0x%02x%02x)\n",
state->reg[MT2063_REG_PART_REV],
state->reg[MT2063_REG_RSVD_3B]);
return -ENODEV; /* Wrong tuner Part/Rev code */
}
printk(KERN_INFO "mt2063: detected a mt2063 %s\n", step);
/* Reset the tuner */
status = mt2063_write(state, MT2063_REG_LO2CQ_3, &all_resets, 1);
if (status < 0)
return status;
/* change all of the default values that vary from the HW reset values */
/* def = (state->reg[PART_REV] == MT2063_B0) ? MT2063B0_defaults : MT2063B1_defaults; */
switch (state->reg[MT2063_REG_PART_REV]) {
case MT2063_B3:
def = MT2063B3_defaults;
break;
case MT2063_B1:
def = MT2063B1_defaults;
break;
case MT2063_B0:
def = MT2063B0_defaults;
break;
default:
return -ENODEV;
}
while (status >= 0 && *def) {
u8 reg = *def++;
u8 val = *def++;
status = mt2063_write(state, reg, &val, 1);
}
if (status < 0)
return status;
/* Wait for FIFF location to complete. */
FCRUN = 1;
maxReads = 10;
while (status >= 0 && (FCRUN != 0) && (maxReads-- > 0)) {
msleep(2);
status = mt2063_read(state,
MT2063_REG_XO_STATUS,
&state->
reg[MT2063_REG_XO_STATUS], 1);
FCRUN = (state->reg[MT2063_REG_XO_STATUS] & 0x40) >> 6;
}
if (FCRUN != 0 || status < 0)
return -ENODEV;
status = mt2063_read(state,
MT2063_REG_FIFFC,
&state->reg[MT2063_REG_FIFFC], 1);
if (status < 0)
return status;
/* Read back all the registers from the tuner */
status = mt2063_read(state,
MT2063_REG_PART_REV,
state->reg, MT2063_REG_END_REGS);
if (status < 0)
return status;
/* Initialize the tuner state. */
state->tuner_id = state->reg[MT2063_REG_PART_REV];
state->AS_Data.f_ref = MT2063_REF_FREQ;
state->AS_Data.f_if1_Center = (state->AS_Data.f_ref / 8) *
((u32) state->reg[MT2063_REG_FIFFC] + 640);
state->AS_Data.f_if1_bw = MT2063_IF1_BW;
state->AS_Data.f_out = 43750000UL;
state->AS_Data.f_out_bw = 6750000UL;
state->AS_Data.f_zif_bw = MT2063_ZIF_BW;
state->AS_Data.f_LO1_Step = state->AS_Data.f_ref / 64;
state->AS_Data.f_LO2_Step = MT2063_TUNE_STEP_SIZE;
state->AS_Data.maxH1 = MT2063_MAX_HARMONICS_1;
state->AS_Data.maxH2 = MT2063_MAX_HARMONICS_2;
state->AS_Data.f_min_LO_Separation = MT2063_MIN_LO_SEP;
state->AS_Data.f_if1_Request = state->AS_Data.f_if1_Center;
state->AS_Data.f_LO1 = 2181000000UL;
state->AS_Data.f_LO2 = 1486249786UL;
state->f_IF1_actual = state->AS_Data.f_if1_Center;
state->AS_Data.f_in = state->AS_Data.f_LO1 - state->f_IF1_actual;
state->AS_Data.f_LO1_FracN_Avoid = MT2063_LO1_FRACN_AVOID;
state->AS_Data.f_LO2_FracN_Avoid = MT2063_LO2_FRACN_AVOID;
state->num_regs = MT2063_REG_END_REGS;
state->AS_Data.avoidDECT = MT2063_AVOID_BOTH;
state->ctfilt_sw = 0;
state->CTFiltMax[0] = 69230000;
state->CTFiltMax[1] = 105770000;
state->CTFiltMax[2] = 140350000;
state->CTFiltMax[3] = 177110000;
state->CTFiltMax[4] = 212860000;
state->CTFiltMax[5] = 241130000;
state->CTFiltMax[6] = 274370000;
state->CTFiltMax[7] = 309820000;
state->CTFiltMax[8] = 342450000;
state->CTFiltMax[9] = 378870000;
state->CTFiltMax[10] = 416210000;
state->CTFiltMax[11] = 456500000;
state->CTFiltMax[12] = 495790000;
state->CTFiltMax[13] = 534530000;
state->CTFiltMax[14] = 572610000;
state->CTFiltMax[15] = 598970000;
state->CTFiltMax[16] = 635910000;
state->CTFiltMax[17] = 672130000;
state->CTFiltMax[18] = 714840000;
state->CTFiltMax[19] = 739660000;
state->CTFiltMax[20] = 770410000;
state->CTFiltMax[21] = 814660000;
state->CTFiltMax[22] = 846950000;
state->CTFiltMax[23] = 867820000;
state->CTFiltMax[24] = 915980000;
state->CTFiltMax[25] = 947450000;
state->CTFiltMax[26] = 983110000;
state->CTFiltMax[27] = 1021630000;
state->CTFiltMax[28] = 1061870000;
state->CTFiltMax[29] = 1098330000;
state->CTFiltMax[30] = 1138990000;
/*
** Fetch the FCU osc value and use it and the fRef value to
** scale all of the Band Max values
*/
state->reg[MT2063_REG_CTUNE_CTRL] = 0x0A;
status = mt2063_write(state, MT2063_REG_CTUNE_CTRL,
&state->reg[MT2063_REG_CTUNE_CTRL], 1);
if (status < 0)
return status;
/* Read the ClearTune filter calibration value */
status = mt2063_read(state, MT2063_REG_FIFFC,
&state->reg[MT2063_REG_FIFFC], 1);
if (status < 0)
return status;
fcu_osc = state->reg[MT2063_REG_FIFFC];
state->reg[MT2063_REG_CTUNE_CTRL] = 0x00;
status = mt2063_write(state, MT2063_REG_CTUNE_CTRL,
&state->reg[MT2063_REG_CTUNE_CTRL], 1);
if (status < 0)
return status;
/* Adjust each of the values in the ClearTune filter cross-over table */
for (i = 0; i < 31; i++)
state->CTFiltMax[i] = (state->CTFiltMax[i] / 768) * (fcu_osc + 640);
status = MT2063_SoftwareShutdown(state, 1);
if (status < 0)
return status;
status = MT2063_ClearPowerMaskBits(state, MT2063_ALL_SD);
if (status < 0)
return status;
state->init = true;
return 0;
}
static int mt2063_get_status(struct dvb_frontend *fe, u32 *tuner_status)
{
struct mt2063_state *state = fe->tuner_priv;
int status;
dprintk(2, "\n");
if (!state->init)
return -ENODEV;
*tuner_status = 0;
status = mt2063_lockStatus(state);
if (status < 0)
return status;
if (status)
*tuner_status = TUNER_STATUS_LOCKED;
dprintk(1, "Tuner status: %d", *tuner_status);
return 0;
}
static void mt2063_release(struct dvb_frontend *fe)
{
struct mt2063_state *state = fe->tuner_priv;
dprintk(2, "\n");
fe->tuner_priv = NULL;
kfree(state);
}
static int mt2063_set_analog_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct mt2063_state *state = fe->tuner_priv;
s32 pict_car;
s32 pict2chanb_vsb;
s32 ch_bw;
s32 if_mid;
s32 rcvr_mode;
int status;
dprintk(2, "\n");
if (!state->init) {
status = mt2063_init(fe);
if (status < 0)
return status;
}
switch (params->mode) {
case V4L2_TUNER_RADIO:
pict_car = 38900000;
ch_bw = 8000000;
pict2chanb_vsb = -(ch_bw / 2);
rcvr_mode = MT2063_OFFAIR_ANALOG;
break;
case V4L2_TUNER_ANALOG_TV:
rcvr_mode = MT2063_CABLE_ANALOG;
if (params->std & ~V4L2_STD_MN) {
pict_car = 38900000;
ch_bw = 6000000;
pict2chanb_vsb = -1250000;
} else if (params->std & V4L2_STD_PAL_G) {
pict_car = 38900000;
ch_bw = 7000000;
pict2chanb_vsb = -1250000;
} else { /* PAL/SECAM standards */
pict_car = 38900000;
ch_bw = 8000000;
pict2chanb_vsb = -1250000;
}
break;
default:
return -EINVAL;
}
if_mid = pict_car - (pict2chanb_vsb + (ch_bw / 2));
state->AS_Data.f_LO2_Step = 125000; /* FIXME: probably 5000 for FM */
state->AS_Data.f_out = if_mid;
state->AS_Data.f_out_bw = ch_bw + 750000;
status = MT2063_SetReceiverMode(state, rcvr_mode);
if (status < 0)
return status;
dprintk(1, "Tuning to frequency: %d, bandwidth %d, foffset %d\n",
params->frequency, ch_bw, pict2chanb_vsb);
status = MT2063_Tune(state, (params->frequency + (pict2chanb_vsb + (ch_bw / 2))));
if (status < 0)
return status;
state->frequency = params->frequency;
return 0;
}
/*
* As defined on EN 300 429, the DVB-C roll-off factor is 0.15.
* So, the amount of the needed bandwidth is given by:
* Bw = Symbol_rate * (1 + 0.15)
* As such, the maximum symbol rate supported by 6 MHz is given by:
* max_symbol_rate = 6 MHz / 1.15 = 5217391 Bauds
*/
#define MAX_SYMBOL_RATE_6MHz 5217391
static int mt2063_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct mt2063_state *state = fe->tuner_priv;
int status;
s32 pict_car;
s32 pict2chanb_vsb;
s32 ch_bw;
s32 if_mid;
s32 rcvr_mode;
if (!state->init) {
status = mt2063_init(fe);
if (status < 0)
return status;
}
dprintk(2, "\n");
if (c->bandwidth_hz == 0)
return -EINVAL;
if (c->bandwidth_hz <= 6000000)
ch_bw = 6000000;
else if (c->bandwidth_hz <= 7000000)
ch_bw = 7000000;
else
ch_bw = 8000000;
switch (c->delivery_system) {
case SYS_DVBT:
rcvr_mode = MT2063_OFFAIR_COFDM;
pict_car = 36125000;
pict2chanb_vsb = -(ch_bw / 2);
break;
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
rcvr_mode = MT2063_CABLE_QAM;
pict_car = 36125000;
pict2chanb_vsb = -(ch_bw / 2);
break;
default:
return -EINVAL;
}
if_mid = pict_car - (pict2chanb_vsb + (ch_bw / 2));
state->AS_Data.f_LO2_Step = 125000; /* FIXME: probably 5000 for FM */
state->AS_Data.f_out = if_mid;
state->AS_Data.f_out_bw = ch_bw + 750000;
status = MT2063_SetReceiverMode(state, rcvr_mode);
if (status < 0)
return status;
dprintk(1, "Tuning to frequency: %d, bandwidth %d, foffset %d\n",
c->frequency, ch_bw, pict2chanb_vsb);
status = MT2063_Tune(state, (c->frequency + (pict2chanb_vsb + (ch_bw / 2))));
if (status < 0)
return status;
state->frequency = c->frequency;
return 0;
}
static int mt2063_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
{
struct mt2063_state *state = fe->tuner_priv;
dprintk(2, "\n");
if (!state->init)
return -ENODEV;
*freq = state->AS_Data.f_out;
dprintk(1, "IF frequency: %d\n", *freq);
return 0;
}
static int mt2063_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
{
struct mt2063_state *state = fe->tuner_priv;
dprintk(2, "\n");
if (!state->init)
return -ENODEV;
*bw = state->AS_Data.f_out_bw - 750000;
dprintk(1, "bandwidth: %d\n", *bw);
return 0;
}
static const struct dvb_tuner_ops mt2063_ops = {
.info = {
.name = "MT2063 Silicon Tuner",
.frequency_min_hz = 45 * MHz,
.frequency_max_hz = 865 * MHz,
},
.init = mt2063_init,
.sleep = MT2063_Sleep,
.get_status = mt2063_get_status,
.set_analog_params = mt2063_set_analog_params,
.set_params = mt2063_set_params,
.get_if_frequency = mt2063_get_if_frequency,
.get_bandwidth = mt2063_get_bandwidth,
.release = mt2063_release,
};
struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,
struct mt2063_config *config,
struct i2c_adapter *i2c)
{
struct mt2063_state *state = NULL;
dprintk(2, "\n");
state = kzalloc(sizeof(struct mt2063_state), GFP_KERNEL);
if (!state)
return NULL;
state->config = config;
state->i2c = i2c;
state->frontend = fe;
state->reference = config->refclock / 1000; /* kHz */
fe->tuner_priv = state;
fe->ops.tuner_ops = mt2063_ops;
printk(KERN_INFO "%s: Attaching MT2063\n", __func__);
return fe;
}
EXPORT_SYMBOL_GPL(mt2063_attach);
#if 0
/*
* Ancillary routines visible outside mt2063
* FIXME: Remove them in favor of using standard tuner callbacks
*/
static int tuner_MT2063_SoftwareShutdown(struct dvb_frontend *fe)
{
struct mt2063_state *state = fe->tuner_priv;
int err = 0;
dprintk(2, "\n");
err = MT2063_SoftwareShutdown(state, 1);
if (err < 0)
printk(KERN_ERR "%s: Couldn't shutdown\n", __func__);
return err;
}
static int tuner_MT2063_ClearPowerMaskBits(struct dvb_frontend *fe)
{
struct mt2063_state *state = fe->tuner_priv;
int err = 0;
dprintk(2, "\n");
err = MT2063_ClearPowerMaskBits(state, MT2063_ALL_SD);
if (err < 0)
printk(KERN_ERR "%s: Invalid parameter\n", __func__);
return err;
}
#endif
MODULE_AUTHOR("Mauro Carvalho Chehab");
MODULE_DESCRIPTION("MT2063 Silicon tuner");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/mt2063.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Fitipower FC0013 tuner driver
*
* Copyright (C) 2012 Hans-Frieder Vogt <[email protected]>
* partially based on driver code from Fitipower
* Copyright (C) 2010 Fitipower Integrated Technology Inc
*/
#include "fc0013.h"
#include "fc0013-priv.h"
static int fc0013_writereg(struct fc0013_priv *priv, u8 reg, u8 val)
{
u8 buf[2] = {reg, val};
struct i2c_msg msg = {
.addr = priv->addr, .flags = 0, .buf = buf, .len = 2
};
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
err("I2C write reg failed, reg: %02x, val: %02x", reg, val);
return -EREMOTEIO;
}
return 0;
}
static int fc0013_readreg(struct fc0013_priv *priv, u8 reg, u8 *val)
{
struct i2c_msg msg[2] = {
{ .addr = priv->addr, .flags = 0, .buf = ®, .len = 1 },
{ .addr = priv->addr, .flags = I2C_M_RD, .buf = val, .len = 1 },
};
if (i2c_transfer(priv->i2c, msg, 2) != 2) {
err("I2C read reg failed, reg: %02x", reg);
return -EREMOTEIO;
}
return 0;
}
static void fc0013_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static int fc0013_init(struct dvb_frontend *fe)
{
struct fc0013_priv *priv = fe->tuner_priv;
int i, ret = 0;
unsigned char reg[] = {
0x00, /* reg. 0x00: dummy */
0x09, /* reg. 0x01 */
0x16, /* reg. 0x02 */
0x00, /* reg. 0x03 */
0x00, /* reg. 0x04 */
0x17, /* reg. 0x05 */
0x02, /* reg. 0x06 */
0x0a, /* reg. 0x07: CHECK */
0xff, /* reg. 0x08: AGC Clock divide by 256, AGC gain 1/256,
Loop Bw 1/8 */
0x6f, /* reg. 0x09: enable LoopThrough */
0xb8, /* reg. 0x0a: Disable LO Test Buffer */
0x82, /* reg. 0x0b: CHECK */
0xfc, /* reg. 0x0c: depending on AGC Up-Down mode, may need 0xf8 */
0x01, /* reg. 0x0d: AGC Not Forcing & LNA Forcing, may need 0x02 */
0x00, /* reg. 0x0e */
0x00, /* reg. 0x0f */
0x00, /* reg. 0x10 */
0x00, /* reg. 0x11 */
0x00, /* reg. 0x12 */
0x00, /* reg. 0x13 */
0x50, /* reg. 0x14: DVB-t High Gain, UHF.
Middle Gain: 0x48, Low Gain: 0x40 */
0x01, /* reg. 0x15 */
};
switch (priv->xtal_freq) {
case FC_XTAL_27_MHZ:
case FC_XTAL_28_8_MHZ:
reg[0x07] |= 0x20;
break;
case FC_XTAL_36_MHZ:
default:
break;
}
if (priv->dual_master)
reg[0x0c] |= 0x02;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
for (i = 1; i < sizeof(reg); i++) {
ret = fc0013_writereg(priv, i, reg[i]);
if (ret)
break;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
err("fc0013_writereg failed: %d", ret);
return ret;
}
static int fc0013_sleep(struct dvb_frontend *fe)
{
/* nothing to do here */
return 0;
}
int fc0013_rc_cal_add(struct dvb_frontend *fe, int rc_val)
{
struct fc0013_priv *priv = fe->tuner_priv;
int ret;
u8 rc_cal;
int val;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
/* push rc_cal value, get rc_cal value */
ret = fc0013_writereg(priv, 0x10, 0x00);
if (ret)
goto error_out;
/* get rc_cal value */
ret = fc0013_readreg(priv, 0x10, &rc_cal);
if (ret)
goto error_out;
rc_cal &= 0x0f;
val = (int)rc_cal + rc_val;
/* forcing rc_cal */
ret = fc0013_writereg(priv, 0x0d, 0x11);
if (ret)
goto error_out;
/* modify rc_cal value */
if (val > 15)
ret = fc0013_writereg(priv, 0x10, 0x0f);
else if (val < 0)
ret = fc0013_writereg(priv, 0x10, 0x00);
else
ret = fc0013_writereg(priv, 0x10, (u8)val);
error_out:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
return ret;
}
EXPORT_SYMBOL(fc0013_rc_cal_add);
int fc0013_rc_cal_reset(struct dvb_frontend *fe)
{
struct fc0013_priv *priv = fe->tuner_priv;
int ret;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
ret = fc0013_writereg(priv, 0x0d, 0x01);
if (!ret)
ret = fc0013_writereg(priv, 0x10, 0x00);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
return ret;
}
EXPORT_SYMBOL(fc0013_rc_cal_reset);
static int fc0013_set_vhf_track(struct fc0013_priv *priv, u32 freq)
{
int ret;
u8 tmp;
ret = fc0013_readreg(priv, 0x1d, &tmp);
if (ret)
goto error_out;
tmp &= 0xe3;
if (freq <= 177500) { /* VHF Track: 7 */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x1c);
} else if (freq <= 184500) { /* VHF Track: 6 */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x18);
} else if (freq <= 191500) { /* VHF Track: 5 */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x14);
} else if (freq <= 198500) { /* VHF Track: 4 */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x10);
} else if (freq <= 205500) { /* VHF Track: 3 */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x0c);
} else if (freq <= 219500) { /* VHF Track: 2 */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x08);
} else if (freq < 300000) { /* VHF Track: 1 */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x04);
} else { /* UHF and GPS */
ret = fc0013_writereg(priv, 0x1d, tmp | 0x1c);
}
error_out:
return ret;
}
static int fc0013_set_params(struct dvb_frontend *fe)
{
struct fc0013_priv *priv = fe->tuner_priv;
int i, ret = 0;
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
u32 freq = p->frequency / 1000;
u32 delsys = p->delivery_system;
unsigned char reg[7], am, pm, multi, tmp;
unsigned long f_vco;
unsigned short xtal_freq_khz_2, xin, xdiv;
bool vco_select = false;
if (fe->callback) {
ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
FC_FE_CALLBACK_VHF_ENABLE, (freq > 300000 ? 0 : 1));
if (ret)
goto exit;
}
switch (priv->xtal_freq) {
case FC_XTAL_27_MHZ:
xtal_freq_khz_2 = 27000 / 2;
break;
case FC_XTAL_36_MHZ:
xtal_freq_khz_2 = 36000 / 2;
break;
case FC_XTAL_28_8_MHZ:
default:
xtal_freq_khz_2 = 28800 / 2;
break;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
/* set VHF track */
ret = fc0013_set_vhf_track(priv, freq);
if (ret)
goto exit;
if (freq < 300000) {
/* enable VHF filter */
ret = fc0013_readreg(priv, 0x07, &tmp);
if (ret)
goto exit;
ret = fc0013_writereg(priv, 0x07, tmp | 0x10);
if (ret)
goto exit;
/* disable UHF & disable GPS */
ret = fc0013_readreg(priv, 0x14, &tmp);
if (ret)
goto exit;
ret = fc0013_writereg(priv, 0x14, tmp & 0x1f);
if (ret)
goto exit;
} else if (freq <= 862000) {
/* disable VHF filter */
ret = fc0013_readreg(priv, 0x07, &tmp);
if (ret)
goto exit;
ret = fc0013_writereg(priv, 0x07, tmp & 0xef);
if (ret)
goto exit;
/* enable UHF & disable GPS */
ret = fc0013_readreg(priv, 0x14, &tmp);
if (ret)
goto exit;
ret = fc0013_writereg(priv, 0x14, (tmp & 0x1f) | 0x40);
if (ret)
goto exit;
} else {
/* disable VHF filter */
ret = fc0013_readreg(priv, 0x07, &tmp);
if (ret)
goto exit;
ret = fc0013_writereg(priv, 0x07, tmp & 0xef);
if (ret)
goto exit;
/* disable UHF & enable GPS */
ret = fc0013_readreg(priv, 0x14, &tmp);
if (ret)
goto exit;
ret = fc0013_writereg(priv, 0x14, (tmp & 0x1f) | 0x20);
if (ret)
goto exit;
}
/* select frequency divider and the frequency of VCO */
if (freq < 37084) { /* freq * 96 < 3560000 */
multi = 96;
reg[5] = 0x82;
reg[6] = 0x00;
} else if (freq < 55625) { /* freq * 64 < 3560000 */
multi = 64;
reg[5] = 0x02;
reg[6] = 0x02;
} else if (freq < 74167) { /* freq * 48 < 3560000 */
multi = 48;
reg[5] = 0x42;
reg[6] = 0x00;
} else if (freq < 111250) { /* freq * 32 < 3560000 */
multi = 32;
reg[5] = 0x82;
reg[6] = 0x02;
} else if (freq < 148334) { /* freq * 24 < 3560000 */
multi = 24;
reg[5] = 0x22;
reg[6] = 0x00;
} else if (freq < 222500) { /* freq * 16 < 3560000 */
multi = 16;
reg[5] = 0x42;
reg[6] = 0x02;
} else if (freq < 296667) { /* freq * 12 < 3560000 */
multi = 12;
reg[5] = 0x12;
reg[6] = 0x00;
} else if (freq < 445000) { /* freq * 8 < 3560000 */
multi = 8;
reg[5] = 0x22;
reg[6] = 0x02;
} else if (freq < 593334) { /* freq * 6 < 3560000 */
multi = 6;
reg[5] = 0x0a;
reg[6] = 0x00;
} else if (freq < 950000) { /* freq * 4 < 3800000 */
multi = 4;
reg[5] = 0x12;
reg[6] = 0x02;
} else {
multi = 2;
reg[5] = 0x0a;
reg[6] = 0x02;
}
f_vco = freq * multi;
if (f_vco >= 3060000) {
reg[6] |= 0x08;
vco_select = true;
}
if (freq >= 45000) {
/* From divided value (XDIV) determined the FA and FP value */
xdiv = (unsigned short)(f_vco / xtal_freq_khz_2);
if ((f_vco - xdiv * xtal_freq_khz_2) >= (xtal_freq_khz_2 / 2))
xdiv++;
pm = (unsigned char)(xdiv / 8);
am = (unsigned char)(xdiv - (8 * pm));
if (am < 2) {
reg[1] = am + 8;
reg[2] = pm - 1;
} else {
reg[1] = am;
reg[2] = pm;
}
} else {
/* fix for frequency less than 45 MHz */
reg[1] = 0x06;
reg[2] = 0x11;
}
/* fix clock out */
reg[6] |= 0x20;
/* From VCO frequency determines the XIN ( fractional part of Delta
Sigma PLL) and divided value (XDIV) */
xin = (unsigned short)(f_vco - (f_vco / xtal_freq_khz_2) * xtal_freq_khz_2);
xin = (xin << 15) / xtal_freq_khz_2;
if (xin >= 16384)
xin += 32768;
reg[3] = xin >> 8;
reg[4] = xin & 0xff;
if (delsys == SYS_DVBT) {
reg[6] &= 0x3f; /* bits 6 and 7 describe the bandwidth */
switch (p->bandwidth_hz) {
case 6000000:
reg[6] |= 0x80;
break;
case 7000000:
reg[6] |= 0x40;
break;
case 8000000:
default:
break;
}
} else {
err("%s: modulation type not supported!", __func__);
return -EINVAL;
}
/* modified for Realtek demod */
reg[5] |= 0x07;
for (i = 1; i <= 6; i++) {
ret = fc0013_writereg(priv, i, reg[i]);
if (ret)
goto exit;
}
ret = fc0013_readreg(priv, 0x11, &tmp);
if (ret)
goto exit;
if (multi == 64)
ret = fc0013_writereg(priv, 0x11, tmp | 0x04);
else
ret = fc0013_writereg(priv, 0x11, tmp & 0xfb);
if (ret)
goto exit;
/* VCO Calibration */
ret = fc0013_writereg(priv, 0x0e, 0x80);
if (!ret)
ret = fc0013_writereg(priv, 0x0e, 0x00);
/* VCO Re-Calibration if needed */
if (!ret)
ret = fc0013_writereg(priv, 0x0e, 0x00);
if (!ret) {
msleep(10);
ret = fc0013_readreg(priv, 0x0e, &tmp);
}
if (ret)
goto exit;
/* vco selection */
tmp &= 0x3f;
if (vco_select) {
if (tmp > 0x3c) {
reg[6] &= ~0x08;
ret = fc0013_writereg(priv, 0x06, reg[6]);
if (!ret)
ret = fc0013_writereg(priv, 0x0e, 0x80);
if (!ret)
ret = fc0013_writereg(priv, 0x0e, 0x00);
}
} else {
if (tmp < 0x02) {
reg[6] |= 0x08;
ret = fc0013_writereg(priv, 0x06, reg[6]);
if (!ret)
ret = fc0013_writereg(priv, 0x0e, 0x80);
if (!ret)
ret = fc0013_writereg(priv, 0x0e, 0x00);
}
}
priv->frequency = p->frequency;
priv->bandwidth = p->bandwidth_hz;
exit:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
warn("%s: failed: %d", __func__, ret);
return ret;
}
static int fc0013_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct fc0013_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int fc0013_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
/* always ? */
*frequency = 0;
return 0;
}
static int fc0013_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct fc0013_priv *priv = fe->tuner_priv;
*bandwidth = priv->bandwidth;
return 0;
}
#define INPUT_ADC_LEVEL -8
static int fc0013_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
{
struct fc0013_priv *priv = fe->tuner_priv;
int ret;
unsigned char tmp;
int int_temp, lna_gain, int_lna, tot_agc_gain, power;
static const int fc0013_lna_gain_table[] = {
/* low gain */
-63, -58, -99, -73,
-63, -65, -54, -60,
/* middle gain */
71, 70, 68, 67,
65, 63, 61, 58,
/* high gain */
197, 191, 188, 186,
184, 182, 181, 179,
};
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
ret = fc0013_writereg(priv, 0x13, 0x00);
if (ret)
goto err;
ret = fc0013_readreg(priv, 0x13, &tmp);
if (ret)
goto err;
int_temp = tmp;
ret = fc0013_readreg(priv, 0x14, &tmp);
if (ret)
goto err;
lna_gain = tmp & 0x1f;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (lna_gain < ARRAY_SIZE(fc0013_lna_gain_table)) {
int_lna = fc0013_lna_gain_table[lna_gain];
tot_agc_gain = (abs((int_temp >> 5) - 7) - 2 +
(int_temp & 0x1f)) * 2;
power = INPUT_ADC_LEVEL - tot_agc_gain - int_lna / 10;
if (power >= 45)
*strength = 255; /* 100% */
else if (power < -95)
*strength = 0;
else
*strength = (power + 95) * 255 / 140;
*strength |= *strength << 8;
} else {
ret = -1;
}
goto exit;
err:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
exit:
if (ret)
warn("%s: failed: %d", __func__, ret);
return ret;
}
static const struct dvb_tuner_ops fc0013_tuner_ops = {
.info = {
.name = "Fitipower FC0013",
.frequency_min_hz = 37 * MHz, /* estimate */
.frequency_max_hz = 1680 * MHz, /* CHECK */
},
.release = fc0013_release,
.init = fc0013_init,
.sleep = fc0013_sleep,
.set_params = fc0013_set_params,
.get_frequency = fc0013_get_frequency,
.get_if_frequency = fc0013_get_if_frequency,
.get_bandwidth = fc0013_get_bandwidth,
.get_rf_strength = fc0013_get_rf_strength,
};
struct dvb_frontend *fc0013_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c, u8 i2c_address, int dual_master,
enum fc001x_xtal_freq xtal_freq)
{
struct fc0013_priv *priv = NULL;
priv = kzalloc(sizeof(struct fc0013_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
priv->i2c = i2c;
priv->dual_master = dual_master;
priv->addr = i2c_address;
priv->xtal_freq = xtal_freq;
info("Fitipower FC0013 successfully attached.");
fe->tuner_priv = priv;
memcpy(&fe->ops.tuner_ops, &fc0013_tuner_ops,
sizeof(struct dvb_tuner_ops));
return fe;
}
EXPORT_SYMBOL_GPL(fc0013_attach);
MODULE_DESCRIPTION("Fitipower FC0013 silicon tuner driver");
MODULE_AUTHOR("Hans-Frieder Vogt <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_VERSION("0.2");
| linux-master | drivers/media/tuners/fc0013.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* NXP TDA18250 silicon tuner driver
*
* Copyright (C) 2017 Olli Salonen <[email protected]>
*/
#include "tda18250_priv.h"
#include <linux/regmap.h>
static const struct dvb_tuner_ops tda18250_ops;
static int tda18250_power_control(struct dvb_frontend *fe,
unsigned int power_state)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
int ret;
unsigned int utmp;
dev_dbg(&client->dev, "power state: %d", power_state);
switch (power_state) {
case TDA18250_POWER_NORMAL:
ret = regmap_write_bits(dev->regmap, R06_POWER2, 0x07, 0x00);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R25_REF, 0xc0, 0xc0);
if (ret)
goto err;
break;
case TDA18250_POWER_STANDBY:
if (dev->loopthrough) {
ret = regmap_write_bits(dev->regmap,
R25_REF, 0xc0, 0x80);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap,
R06_POWER2, 0x07, 0x02);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap,
R10_LT1, 0x80, 0x00);
if (ret)
goto err;
} else {
ret = regmap_write_bits(dev->regmap,
R25_REF, 0xc0, 0x80);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap,
R06_POWER2, 0x07, 0x01);
if (ret)
goto err;
ret = regmap_read(dev->regmap,
R0D_AGC12, &utmp);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap,
R0D_AGC12, 0x03, 0x03);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap,
R10_LT1, 0x80, 0x80);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap,
R0D_AGC12, 0x03, utmp & 0x03);
if (ret)
goto err;
}
break;
default:
ret = -EINVAL;
goto err;
}
return 0;
err:
return ret;
}
static int tda18250_wait_for_irq(struct dvb_frontend *fe,
int maxwait, int step, u8 irq)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
int ret;
unsigned long timeout;
bool triggered;
unsigned int utmp;
triggered = false;
timeout = jiffies + msecs_to_jiffies(maxwait);
while (!time_after(jiffies, timeout)) {
// check for the IRQ
ret = regmap_read(dev->regmap, R08_IRQ1, &utmp);
if (ret)
goto err;
if ((utmp & irq) == irq) {
triggered = true;
break;
}
msleep(step);
}
dev_dbg(&client->dev, "waited IRQ (0x%02x) %d ms, triggered: %s", irq,
jiffies_to_msecs(jiffies) -
(jiffies_to_msecs(timeout) - maxwait),
triggered ? "true" : "false");
if (!triggered)
return -ETIMEDOUT;
return 0;
err:
return ret;
}
static int tda18250_init(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
int ret, i;
/* default values for various regs */
static const u8 init_regs[][2] = {
{ R0C_AGC11, 0xc7 },
{ R0D_AGC12, 0x5d },
{ R0E_AGC13, 0x40 },
{ R0F_AGC14, 0x0e },
{ R10_LT1, 0x47 },
{ R11_LT2, 0x4e },
{ R12_AGC21, 0x26 },
{ R13_AGC22, 0x60 },
{ R18_AGC32, 0x37 },
{ R19_AGC33, 0x09 },
{ R1A_AGCK, 0x00 },
{ R1E_WI_FI, 0x29 },
{ R1F_RF_BPF, 0x06 },
{ R20_IR_MIX, 0xc6 },
{ R21_IF_AGC, 0x00 },
{ R2C_PS1, 0x75 },
{ R2D_PS2, 0x06 },
{ R2E_PS3, 0x07 },
{ R30_RSSI2, 0x0e },
{ R31_IRQ_CTRL, 0x00 },
{ R39_SD5, 0x00 },
{ R3B_REGU, 0x55 },
{ R3C_RCCAL1, 0xa7 },
{ R3F_IRCAL2, 0x85 },
{ R40_IRCAL3, 0x87 },
{ R41_IRCAL4, 0xc0 },
{ R43_PD1, 0x40 },
{ R44_PD2, 0xc0 },
{ R46_CPUMP, 0x0c },
{ R47_LNAPOL, 0x64 },
{ R4B_XTALOSC1, 0x30 },
{ R59_AGC2_UP2, 0x05 },
{ R5B_AGC_AUTO, 0x07 },
{ R5C_AGC_DEBUG, 0x00 },
};
/* crystal related regs depend on frequency */
static const u8 xtal_regs[][5] = {
/* reg: 4d 4e 4f 50 51 */
[TDA18250_XTAL_FREQ_16MHZ] = { 0x3e, 0x80, 0x50, 0x00, 0x20 },
[TDA18250_XTAL_FREQ_24MHZ] = { 0x5d, 0xc0, 0xec, 0x00, 0x18 },
[TDA18250_XTAL_FREQ_25MHZ] = { 0x61, 0xa8, 0xec, 0x80, 0x19 },
[TDA18250_XTAL_FREQ_27MHZ] = { 0x69, 0x78, 0x8d, 0x80, 0x1b },
[TDA18250_XTAL_FREQ_30MHZ] = { 0x75, 0x30, 0x8f, 0x00, 0x1e },
};
dev_dbg(&client->dev, "\n");
ret = tda18250_power_control(fe, TDA18250_POWER_NORMAL);
if (ret)
goto err;
msleep(20);
if (dev->warm)
goto warm;
/* set initial register values */
for (i = 0; i < ARRAY_SIZE(init_regs); i++) {
ret = regmap_write(dev->regmap, init_regs[i][0],
init_regs[i][1]);
if (ret)
goto err;
}
/* set xtal related regs */
ret = regmap_bulk_write(dev->regmap, R4D_XTALFLX1,
xtal_regs[dev->xtal_freq], 5);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R10_LT1, 0x80,
dev->loopthrough ? 0x00 : 0x80);
if (ret)
goto err;
/* clear IRQ */
ret = regmap_write(dev->regmap, R0A_IRQ3, TDA18250_IRQ_HW_INIT);
if (ret)
goto err;
/* start HW init */
ret = regmap_write(dev->regmap, R2A_MSM1, 0x70);
if (ret)
goto err;
ret = regmap_write(dev->regmap, R2B_MSM2, 0x01);
if (ret)
goto err;
ret = tda18250_wait_for_irq(fe, 500, 10, TDA18250_IRQ_HW_INIT);
if (ret)
goto err;
/* tuner calibration */
ret = regmap_write(dev->regmap, R2A_MSM1, 0x02);
if (ret)
goto err;
ret = regmap_write(dev->regmap, R2B_MSM2, 0x01);
if (ret)
goto err;
ret = tda18250_wait_for_irq(fe, 500, 10, TDA18250_IRQ_CAL);
if (ret)
goto err;
dev->warm = true;
warm:
/* power up LNA */
ret = regmap_write_bits(dev->regmap, R0C_AGC11, 0x80, 0x00);
if (ret)
goto err;
return 0;
err:
dev_dbg(&client->dev, "failed=%d", ret);
return ret;
}
static int tda18250_set_agc(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 utmp, utmp2;
dev_dbg(&client->dev, "\n");
ret = regmap_write_bits(dev->regmap, R1F_RF_BPF, 0x87, 0x06);
if (ret)
goto err;
utmp = ((c->frequency < 100000000) &&
((c->delivery_system == SYS_DVBC_ANNEX_A) ||
(c->delivery_system == SYS_DVBC_ANNEX_C)) &&
(c->bandwidth_hz == 6000000)) ? 0x80 : 0x00;
ret = regmap_write(dev->regmap, R5A_H3H5, utmp);
if (ret)
goto err;
/* AGC1 */
switch (c->delivery_system) {
case SYS_ATSC:
case SYS_DVBT:
case SYS_DVBT2:
utmp = 4;
break;
default: /* DVB-C/QAM */
switch (c->bandwidth_hz) {
case 6000000:
utmp = (c->frequency < 800000000) ? 6 : 4;
break;
default: /* 7.935 and 8 MHz */
utmp = (c->frequency < 100000000) ? 2 : 3;
break;
}
break;
}
ret = regmap_write_bits(dev->regmap, R0C_AGC11, 0x07, utmp);
if (ret)
goto err;
/* AGC2 */
switch (c->delivery_system) {
case SYS_ATSC:
case SYS_DVBT:
case SYS_DVBT2:
utmp = (c->frequency < 320000000) ? 20 : 16;
utmp2 = (c->frequency < 320000000) ? 22 : 18;
break;
default: /* DVB-C/QAM */
switch (c->bandwidth_hz) {
case 6000000:
if (c->frequency < 600000000) {
utmp = 18;
utmp2 = 22;
} else if (c->frequency < 800000000) {
utmp = 16;
utmp2 = 20;
} else {
utmp = 14;
utmp2 = 16;
}
break;
default: /* 7.935 and 8 MHz */
utmp = (c->frequency < 320000000) ? 16 : 18;
utmp2 = (c->frequency < 320000000) ? 18 : 20;
break;
}
break;
}
ret = regmap_write_bits(dev->regmap, R58_AGC2_UP1, 0x1f, utmp2+8);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R13_AGC22, 0x1f, utmp);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R14_AGC23, 0x1f, utmp2);
if (ret)
goto err;
switch (c->delivery_system) {
case SYS_ATSC:
case SYS_DVBT:
case SYS_DVBT2:
utmp = 98;
break;
default: /* DVB-C/QAM */
utmp = 90;
break;
}
ret = regmap_write_bits(dev->regmap, R16_AGC25, 0xf8, utmp);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R12_AGC21, 0x60,
(c->frequency > 800000000) ? 0x40 : 0x20);
if (ret)
goto err;
/* AGC3 */
switch (c->delivery_system) {
case SYS_ATSC:
case SYS_DVBT:
case SYS_DVBT2:
utmp = (c->frequency < 320000000) ? 5 : 7;
utmp2 = (c->frequency < 320000000) ? 10 : 12;
break;
default: /* DVB-C/QAM */
utmp = 7;
utmp2 = 12;
break;
}
ret = regmap_write(dev->regmap, R17_AGC31, (utmp << 4) | utmp2);
if (ret)
goto err;
/* S2D */
switch (c->delivery_system) {
case SYS_ATSC:
case SYS_DVBT:
case SYS_DVBT2:
if (c->bandwidth_hz == 8000000)
utmp = 0x04;
else
utmp = (c->frequency < 320000000) ? 0x04 : 0x02;
break;
default: /* DVB-C/QAM */
if (c->bandwidth_hz == 6000000)
utmp = ((c->frequency > 172544000) &&
(c->frequency < 320000000)) ? 0x04 : 0x02;
else /* 7.935 and 8 MHz */
utmp = ((c->frequency > 320000000) &&
(c->frequency < 600000000)) ? 0x02 : 0x04;
break;
}
ret = regmap_write_bits(dev->regmap, R20_IR_MIX, 0x06, utmp);
if (ret)
goto err;
switch (c->delivery_system) {
case SYS_ATSC:
case SYS_DVBT:
case SYS_DVBT2:
utmp = 0;
break;
default: /* DVB-C/QAM */
utmp = (c->frequency < 600000000) ? 0 : 3;
break;
}
ret = regmap_write_bits(dev->regmap, R16_AGC25, 0x03, utmp);
if (ret)
goto err;
utmp = 0x09;
switch (c->delivery_system) {
case SYS_ATSC:
case SYS_DVBT:
case SYS_DVBT2:
if (c->bandwidth_hz == 8000000)
utmp = 0x0c;
break;
default: /* DVB-C/QAM */
utmp = 0x0c;
break;
}
ret = regmap_write_bits(dev->regmap, R0F_AGC14, 0x3f, utmp);
if (ret)
goto err;
return 0;
err:
dev_dbg(&client->dev, "failed=%d", ret);
return ret;
}
static int tda18250_pll_calc(struct dvb_frontend *fe, u8 *rdiv,
u8 *ndiv, u8 *icp)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
unsigned int uval, exp, lopd, scale;
unsigned long fvco;
ret = regmap_read(dev->regmap, R34_MD1, &uval);
if (ret)
goto err;
exp = (uval & 0x70) >> 4;
if (exp > 5)
exp = 0;
lopd = 1 << (exp - 1);
scale = uval & 0x0f;
fvco = lopd * scale * ((c->frequency / 1000) + dev->if_frequency);
switch (dev->xtal_freq) {
case TDA18250_XTAL_FREQ_16MHZ:
*rdiv = 1;
*ndiv = 0;
*icp = (fvco < 6622000) ? 0x05 : 0x02;
break;
case TDA18250_XTAL_FREQ_24MHZ:
case TDA18250_XTAL_FREQ_25MHZ:
*rdiv = 3;
*ndiv = 1;
*icp = (fvco < 6622000) ? 0x05 : 0x02;
break;
case TDA18250_XTAL_FREQ_27MHZ:
if (fvco < 6643000) {
*rdiv = 2;
*ndiv = 0;
*icp = 0x05;
} else if (fvco < 6811000) {
*rdiv = 2;
*ndiv = 0;
*icp = 0x06;
} else {
*rdiv = 3;
*ndiv = 1;
*icp = 0x02;
}
break;
case TDA18250_XTAL_FREQ_30MHZ:
*rdiv = 2;
*ndiv = 0;
*icp = (fvco < 6811000) ? 0x05 : 0x02;
break;
default:
return -EINVAL;
}
dev_dbg(&client->dev,
"lopd=%d scale=%u fvco=%lu, rdiv=%d ndiv=%d icp=%d",
lopd, scale, fvco, *rdiv, *ndiv, *icp);
return 0;
err:
return ret;
}
static int tda18250_set_params(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 if_khz;
int ret;
unsigned int i, j;
u8 utmp;
u8 buf[3];
#define REG 0
#define MASK 1
#define DVBT_6 2
#define DVBT_7 3
#define DVBT_8 4
#define DVBC_6 5
#define DVBC_8 6
#define ATSC 7
static const u8 delsys_params[][16] = {
[REG] = { 0x22, 0x23, 0x24, 0x21, 0x0d, 0x0c, 0x0f, 0x14,
0x0e, 0x12, 0x58, 0x59, 0x1a, 0x19, 0x1e, 0x30 },
[MASK] = { 0x77, 0xff, 0xff, 0x87, 0xf0, 0x78, 0x07, 0xe0,
0x60, 0x0f, 0x60, 0x0f, 0x33, 0x30, 0x80, 0x06 },
[DVBT_6] = { 0x51, 0x03, 0x83, 0x82, 0x40, 0x48, 0x01, 0xe0,
0x60, 0x0f, 0x60, 0x05, 0x03, 0x10, 0x00, 0x04 },
[DVBT_7] = { 0x52, 0x03, 0x85, 0x82, 0x40, 0x48, 0x01, 0xe0,
0x60, 0x0f, 0x60, 0x05, 0x03, 0x10, 0x00, 0x04 },
[DVBT_8] = { 0x53, 0x03, 0x87, 0x82, 0x40, 0x48, 0x06, 0xe0,
0x60, 0x07, 0x60, 0x05, 0x03, 0x10, 0x00, 0x04 },
[DVBC_6] = { 0x32, 0x05, 0x86, 0x82, 0x50, 0x00, 0x06, 0x60,
0x40, 0x0e, 0x60, 0x05, 0x33, 0x10, 0x00, 0x04 },
[DVBC_8] = { 0x53, 0x03, 0x88, 0x82, 0x50, 0x00, 0x06, 0x60,
0x40, 0x0e, 0x60, 0x05, 0x33, 0x10, 0x00, 0x04 },
[ATSC] = { 0x51, 0x03, 0x83, 0x82, 0x40, 0x48, 0x01, 0xe0,
0x40, 0x0e, 0x60, 0x05, 0x03, 0x00, 0x80, 0x04 },
};
dev_dbg(&client->dev,
"delivery_system=%d frequency=%u bandwidth_hz=%u",
c->delivery_system, c->frequency, c->bandwidth_hz);
switch (c->delivery_system) {
case SYS_ATSC:
j = ATSC;
if_khz = dev->if_atsc;
break;
case SYS_DVBT:
case SYS_DVBT2:
if (c->bandwidth_hz == 0) {
ret = -EINVAL;
goto err;
} else if (c->bandwidth_hz <= 6000000) {
j = DVBT_6;
if_khz = dev->if_dvbt_6;
} else if (c->bandwidth_hz <= 7000000) {
j = DVBT_7;
if_khz = dev->if_dvbt_7;
} else if (c->bandwidth_hz <= 8000000) {
j = DVBT_8;
if_khz = dev->if_dvbt_8;
} else {
ret = -EINVAL;
goto err;
}
break;
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
if (c->bandwidth_hz == 0) {
ret = -EINVAL;
goto err;
} else if (c->bandwidth_hz <= 6000000) {
j = DVBC_6;
if_khz = dev->if_dvbc_6;
} else if (c->bandwidth_hz <= 8000000) {
j = DVBC_8;
if_khz = dev->if_dvbc_8;
} else {
ret = -EINVAL;
goto err;
}
break;
default:
ret = -EINVAL;
dev_err(&client->dev, "unsupported delivery system=%d",
c->delivery_system);
goto err;
}
/* set delivery system dependent registers */
for (i = 0; i < 16; i++) {
ret = regmap_write_bits(dev->regmap, delsys_params[REG][i],
delsys_params[MASK][i], delsys_params[j][i]);
if (ret)
goto err;
}
/* set IF if needed */
if (dev->if_frequency != if_khz) {
utmp = DIV_ROUND_CLOSEST(if_khz, 50);
ret = regmap_write(dev->regmap, R26_IF, utmp);
if (ret)
goto err;
dev->if_frequency = if_khz;
dev_dbg(&client->dev, "set IF=%u kHz", if_khz);
}
ret = tda18250_set_agc(fe);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R1A_AGCK, 0x03, 0x01);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R14_AGC23, 0x40, 0x00);
if (ret)
goto err;
/* set frequency */
buf[0] = ((c->frequency / 1000) >> 16) & 0xff;
buf[1] = ((c->frequency / 1000) >> 8) & 0xff;
buf[2] = ((c->frequency / 1000) >> 0) & 0xff;
ret = regmap_bulk_write(dev->regmap, R27_RF1, buf, 3);
if (ret)
goto err;
ret = regmap_write(dev->regmap, R0A_IRQ3, TDA18250_IRQ_TUNE);
if (ret)
goto err;
/* initial tune */
ret = regmap_write(dev->regmap, R2A_MSM1, 0x01);
if (ret)
goto err;
ret = regmap_write(dev->regmap, R2B_MSM2, 0x01);
if (ret)
goto err;
ret = tda18250_wait_for_irq(fe, 500, 10, TDA18250_IRQ_TUNE);
if (ret)
goto err;
/* calc ndiv and rdiv */
ret = tda18250_pll_calc(fe, &buf[0], &buf[1], &buf[2]);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R4F_XTALFLX3, 0xe0,
(buf[0] << 6) | (buf[1] << 5));
if (ret)
goto err;
/* clear IRQ */
ret = regmap_write(dev->regmap, R0A_IRQ3, TDA18250_IRQ_TUNE);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R46_CPUMP, 0x07, 0x00);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R39_SD5, 0x03, 0x00);
if (ret)
goto err;
/* tune again */
ret = regmap_write(dev->regmap, R2A_MSM1, 0x01); /* tune */
if (ret)
goto err;
ret = regmap_write(dev->regmap, R2B_MSM2, 0x01); /* go */
if (ret)
goto err;
ret = tda18250_wait_for_irq(fe, 500, 10, TDA18250_IRQ_TUNE);
if (ret)
goto err;
/* pll locking */
msleep(20);
ret = regmap_write_bits(dev->regmap, R2B_MSM2, 0x04, 0x04);
if (ret)
goto err;
msleep(20);
/* restore AGCK */
ret = regmap_write_bits(dev->regmap, R1A_AGCK, 0x03, 0x03);
if (ret)
goto err;
ret = regmap_write_bits(dev->regmap, R14_AGC23, 0x40, 0x40);
if (ret)
goto err;
/* charge pump */
ret = regmap_write_bits(dev->regmap, R46_CPUMP, 0x07, buf[2]);
return 0;
err:
return ret;
}
static int tda18250_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
*frequency = dev->if_frequency * 1000;
return 0;
}
static int tda18250_sleep(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->tuner_priv;
struct tda18250_dev *dev = i2c_get_clientdata(client);
int ret;
dev_dbg(&client->dev, "\n");
/* power down LNA */
ret = regmap_write_bits(dev->regmap, R0C_AGC11, 0x80, 0x00);
if (ret)
return ret;
/* set if freq to 0 in order to make sure it's set after wake up */
dev->if_frequency = 0;
ret = tda18250_power_control(fe, TDA18250_POWER_STANDBY);
return ret;
}
static const struct dvb_tuner_ops tda18250_ops = {
.info = {
.name = "NXP TDA18250",
.frequency_min_hz = 42 * MHz,
.frequency_max_hz = 870 * MHz,
},
.init = tda18250_init,
.set_params = tda18250_set_params,
.get_if_frequency = tda18250_get_if_frequency,
.sleep = tda18250_sleep,
};
static int tda18250_probe(struct i2c_client *client)
{
struct tda18250_config *cfg = client->dev.platform_data;
struct dvb_frontend *fe = cfg->fe;
struct tda18250_dev *dev;
int ret;
unsigned char chip_id[3];
/* some registers are always read from HW */
static const struct regmap_range tda18250_yes_ranges[] = {
regmap_reg_range(R05_POWER1, R0B_IRQ4),
regmap_reg_range(R21_IF_AGC, R21_IF_AGC),
regmap_reg_range(R2A_MSM1, R2B_MSM2),
regmap_reg_range(R2F_RSSI1, R31_IRQ_CTRL),
};
static const struct regmap_access_table tda18250_volatile_table = {
.yes_ranges = tda18250_yes_ranges,
.n_yes_ranges = ARRAY_SIZE(tda18250_yes_ranges),
};
static const struct regmap_config tda18250_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = TDA18250_NUM_REGS - 1,
.volatile_table = &tda18250_volatile_table,
};
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
goto err;
}
i2c_set_clientdata(client, dev);
dev->fe = cfg->fe;
dev->loopthrough = cfg->loopthrough;
if (cfg->xtal_freq < TDA18250_XTAL_FREQ_MAX) {
dev->xtal_freq = cfg->xtal_freq;
} else {
ret = -EINVAL;
dev_err(&client->dev, "xtal_freq invalid=%d", cfg->xtal_freq);
goto err_kfree;
}
dev->if_dvbt_6 = cfg->if_dvbt_6;
dev->if_dvbt_7 = cfg->if_dvbt_7;
dev->if_dvbt_8 = cfg->if_dvbt_8;
dev->if_dvbc_6 = cfg->if_dvbc_6;
dev->if_dvbc_8 = cfg->if_dvbc_8;
dev->if_atsc = cfg->if_atsc;
dev->if_frequency = 0;
dev->warm = false;
dev->regmap = devm_regmap_init_i2c(client, &tda18250_regmap_config);
if (IS_ERR(dev->regmap)) {
ret = PTR_ERR(dev->regmap);
goto err_kfree;
}
/* read the three chip ID registers */
regmap_bulk_read(dev->regmap, R00_ID1, &chip_id, 3);
dev_dbg(&client->dev, "chip_id=%02x:%02x:%02x",
chip_id[0], chip_id[1], chip_id[2]);
switch (chip_id[0]) {
case 0xc7:
dev->slave = false;
break;
case 0x47:
dev->slave = true;
break;
default:
ret = -ENODEV;
goto err_kfree;
}
if (chip_id[1] != 0x4a) {
ret = -ENODEV;
goto err_kfree;
}
switch (chip_id[2]) {
case 0x20:
dev_info(&client->dev,
"NXP TDA18250AHN/%s successfully identified",
dev->slave ? "S" : "M");
break;
case 0x21:
dev_info(&client->dev,
"NXP TDA18250BHN/%s successfully identified",
dev->slave ? "S" : "M");
break;
default:
ret = -ENODEV;
goto err_kfree;
}
fe->tuner_priv = client;
memcpy(&fe->ops.tuner_ops, &tda18250_ops,
sizeof(struct dvb_tuner_ops));
/* put the tuner in standby */
tda18250_power_control(fe, TDA18250_POWER_STANDBY);
return 0;
err_kfree:
kfree(dev);
err:
dev_dbg(&client->dev, "failed=%d", ret);
return ret;
}
static void tda18250_remove(struct i2c_client *client)
{
struct tda18250_dev *dev = i2c_get_clientdata(client);
struct dvb_frontend *fe = dev->fe;
dev_dbg(&client->dev, "\n");
memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
fe->tuner_priv = NULL;
kfree(dev);
}
static const struct i2c_device_id tda18250_id_table[] = {
{"tda18250", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, tda18250_id_table);
static struct i2c_driver tda18250_driver = {
.driver = {
.name = "tda18250",
},
.probe = tda18250_probe,
.remove = tda18250_remove,
.id_table = tda18250_id_table,
};
module_i2c_driver(tda18250_driver);
MODULE_DESCRIPTION("NXP TDA18250 silicon tuner driver");
MODULE_AUTHOR("Olli Salonen <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tda18250.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* FCI FC2580 silicon tuner driver
*
* Copyright (C) 2012 Antti Palosaari <[email protected]>
*/
#include "fc2580_priv.h"
/*
* TODO:
* I2C write and read works only for one single register. Multiple registers
* could not be accessed using normal register address auto-increment.
* There could be (very likely) register to change that behavior....
*/
/* write single register conditionally only when value differs from 0xff
* XXX: This is special routine meant only for writing fc2580_freq_regs_lut[]
* values. Do not use for the other purposes. */
static int fc2580_wr_reg_ff(struct fc2580_dev *dev, u8 reg, u8 val)
{
if (val == 0xff)
return 0;
else
return regmap_write(dev->regmap, reg, val);
}
static int fc2580_set_params(struct fc2580_dev *dev)
{
struct i2c_client *client = dev->client;
int ret, i;
unsigned int uitmp, div_ref, div_ref_val, div_n, k, k_cw, div_out;
u64 f_vco;
u8 synth_config;
unsigned long timeout;
if (!dev->active) {
dev_dbg(&client->dev, "tuner is sleeping\n");
return 0;
}
/*
* Fractional-N synthesizer
*
* +---------------------------------------+
* v |
* Fref +----+ +----+ +-------+ +----+ +------+ +---+
* ------> | /R | --> | PD | --> | VCO | ------> | /2 | --> | /N.F | <-- | K |
* +----+ +----+ +-------+ +----+ +------+ +---+
* |
* |
* v
* +-------+ Fout
* | /Rout | ------>
* +-------+
*/
for (i = 0; i < ARRAY_SIZE(fc2580_pll_lut); i++) {
if (dev->f_frequency <= fc2580_pll_lut[i].freq)
break;
}
if (i == ARRAY_SIZE(fc2580_pll_lut)) {
ret = -EINVAL;
goto err;
}
#define DIV_PRE_N 2
#define F_REF dev->clk
div_out = fc2580_pll_lut[i].div_out;
f_vco = (u64) dev->f_frequency * div_out;
synth_config = fc2580_pll_lut[i].band;
if (f_vco < 2600000000ULL)
synth_config |= 0x06;
else
synth_config |= 0x0e;
/* select reference divider R (keep PLL div N in valid range) */
#define DIV_N_MIN 76
if (f_vco >= div_u64((u64) DIV_PRE_N * DIV_N_MIN * F_REF, 1)) {
div_ref = 1;
div_ref_val = 0x00;
} else if (f_vco >= div_u64((u64) DIV_PRE_N * DIV_N_MIN * F_REF, 2)) {
div_ref = 2;
div_ref_val = 0x10;
} else {
div_ref = 4;
div_ref_val = 0x20;
}
/* calculate PLL integer and fractional control word */
uitmp = DIV_PRE_N * F_REF / div_ref;
div_n = div_u64_rem(f_vco, uitmp, &k);
k_cw = div_u64((u64) k * 0x100000, uitmp);
dev_dbg(&client->dev,
"frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_ref=%u div_n=%u k=%u div_out=%u k_cw=%0x\n",
dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_ref,
div_n, k, div_out, k_cw);
ret = regmap_write(dev->regmap, 0x02, synth_config);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x18, div_ref_val << 0 | k_cw >> 16);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x1a, (k_cw >> 8) & 0xff);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x1b, (k_cw >> 0) & 0xff);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x1c, div_n);
if (ret)
goto err;
/* registers */
for (i = 0; i < ARRAY_SIZE(fc2580_freq_regs_lut); i++) {
if (dev->f_frequency <= fc2580_freq_regs_lut[i].freq)
break;
}
if (i == ARRAY_SIZE(fc2580_freq_regs_lut)) {
ret = -EINVAL;
goto err;
}
ret = fc2580_wr_reg_ff(dev, 0x25, fc2580_freq_regs_lut[i].r25_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x27, fc2580_freq_regs_lut[i].r27_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x28, fc2580_freq_regs_lut[i].r28_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x29, fc2580_freq_regs_lut[i].r29_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x2b, fc2580_freq_regs_lut[i].r2b_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x2c, fc2580_freq_regs_lut[i].r2c_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x2d, fc2580_freq_regs_lut[i].r2d_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x30, fc2580_freq_regs_lut[i].r30_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x44, fc2580_freq_regs_lut[i].r44_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x50, fc2580_freq_regs_lut[i].r50_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x53, fc2580_freq_regs_lut[i].r53_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x5f, fc2580_freq_regs_lut[i].r5f_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x61, fc2580_freq_regs_lut[i].r61_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x62, fc2580_freq_regs_lut[i].r62_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x63, fc2580_freq_regs_lut[i].r63_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x67, fc2580_freq_regs_lut[i].r67_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x68, fc2580_freq_regs_lut[i].r68_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x69, fc2580_freq_regs_lut[i].r69_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x6a, fc2580_freq_regs_lut[i].r6a_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x6b, fc2580_freq_regs_lut[i].r6b_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x6c, fc2580_freq_regs_lut[i].r6c_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x6d, fc2580_freq_regs_lut[i].r6d_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x6e, fc2580_freq_regs_lut[i].r6e_val);
if (ret)
goto err;
ret = fc2580_wr_reg_ff(dev, 0x6f, fc2580_freq_regs_lut[i].r6f_val);
if (ret)
goto err;
/* IF filters */
for (i = 0; i < ARRAY_SIZE(fc2580_if_filter_lut); i++) {
if (dev->f_bandwidth <= fc2580_if_filter_lut[i].freq)
break;
}
if (i == ARRAY_SIZE(fc2580_if_filter_lut)) {
ret = -EINVAL;
goto err;
}
ret = regmap_write(dev->regmap, 0x36, fc2580_if_filter_lut[i].r36_val);
if (ret)
goto err;
uitmp = (unsigned int) 8058000 - (dev->f_bandwidth * 122 / 100 / 2);
uitmp = div64_u64((u64) dev->clk * uitmp, 1000000000000ULL);
ret = regmap_write(dev->regmap, 0x37, uitmp);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x39, fc2580_if_filter_lut[i].r39_val);
if (ret)
goto err;
timeout = jiffies + msecs_to_jiffies(30);
for (uitmp = ~0xc0; !time_after(jiffies, timeout) && uitmp != 0xc0;) {
/* trigger filter */
ret = regmap_write(dev->regmap, 0x2e, 0x09);
if (ret)
goto err;
/* locked when [7:6] are set (val: d7 6MHz, d5 7MHz, cd 8MHz) */
ret = regmap_read(dev->regmap, 0x2f, &uitmp);
if (ret)
goto err;
uitmp &= 0xc0;
ret = regmap_write(dev->regmap, 0x2e, 0x01);
if (ret)
goto err;
}
if (uitmp != 0xc0)
dev_dbg(&client->dev, "filter did not lock %02x\n", uitmp);
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int fc2580_init(struct fc2580_dev *dev)
{
struct i2c_client *client = dev->client;
int ret, i;
dev_dbg(&client->dev, "\n");
for (i = 0; i < ARRAY_SIZE(fc2580_init_reg_vals); i++) {
ret = regmap_write(dev->regmap, fc2580_init_reg_vals[i].reg,
fc2580_init_reg_vals[i].val);
if (ret)
goto err;
}
dev->active = true;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int fc2580_sleep(struct fc2580_dev *dev)
{
struct i2c_client *client = dev->client;
int ret;
dev_dbg(&client->dev, "\n");
dev->active = false;
ret = regmap_write(dev->regmap, 0x02, 0x0a);
if (ret)
goto err;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
/*
* DVB API
*/
static int fc2580_dvb_set_params(struct dvb_frontend *fe)
{
struct fc2580_dev *dev = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
dev->f_frequency = c->frequency;
dev->f_bandwidth = c->bandwidth_hz;
return fc2580_set_params(dev);
}
static int fc2580_dvb_init(struct dvb_frontend *fe)
{
return fc2580_init(fe->tuner_priv);
}
static int fc2580_dvb_sleep(struct dvb_frontend *fe)
{
return fc2580_sleep(fe->tuner_priv);
}
static int fc2580_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
*frequency = 0; /* Zero-IF */
return 0;
}
static const struct dvb_tuner_ops fc2580_dvb_tuner_ops = {
.info = {
.name = "FCI FC2580",
.frequency_min_hz = 174 * MHz,
.frequency_max_hz = 862 * MHz,
},
.init = fc2580_dvb_init,
.sleep = fc2580_dvb_sleep,
.set_params = fc2580_dvb_set_params,
.get_if_frequency = fc2580_dvb_get_if_frequency,
};
/*
* V4L2 API
*/
#if IS_ENABLED(CONFIG_VIDEO_DEV)
static const struct v4l2_frequency_band bands[] = {
{
.type = V4L2_TUNER_RF,
.index = 0,
.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
.rangelow = 130000000,
.rangehigh = 2000000000,
},
};
static inline struct fc2580_dev *fc2580_subdev_to_dev(struct v4l2_subdev *sd)
{
return container_of(sd, struct fc2580_dev, subdev);
}
static int fc2580_standby(struct v4l2_subdev *sd)
{
struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
int ret;
ret = fc2580_sleep(dev);
if (ret)
return ret;
return fc2580_set_params(dev);
}
static int fc2580_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
{
struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "index=%d\n", v->index);
strscpy(v->name, "FCI FC2580", sizeof(v->name));
v->type = V4L2_TUNER_RF;
v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
v->rangelow = bands[0].rangelow;
v->rangehigh = bands[0].rangehigh;
return 0;
}
static int fc2580_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
{
struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "index=%d\n", v->index);
return 0;
}
static int fc2580_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
{
struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
f->frequency = dev->f_frequency;
return 0;
}
static int fc2580_s_frequency(struct v4l2_subdev *sd,
const struct v4l2_frequency *f)
{
struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
f->tuner, f->type, f->frequency);
dev->f_frequency = clamp_t(unsigned int, f->frequency,
bands[0].rangelow, bands[0].rangehigh);
return fc2580_set_params(dev);
}
static int fc2580_enum_freq_bands(struct v4l2_subdev *sd,
struct v4l2_frequency_band *band)
{
struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
band->tuner, band->type, band->index);
if (band->index >= ARRAY_SIZE(bands))
return -EINVAL;
band->capability = bands[band->index].capability;
band->rangelow = bands[band->index].rangelow;
band->rangehigh = bands[band->index].rangehigh;
return 0;
}
static const struct v4l2_subdev_tuner_ops fc2580_subdev_tuner_ops = {
.standby = fc2580_standby,
.g_tuner = fc2580_g_tuner,
.s_tuner = fc2580_s_tuner,
.g_frequency = fc2580_g_frequency,
.s_frequency = fc2580_s_frequency,
.enum_freq_bands = fc2580_enum_freq_bands,
};
static const struct v4l2_subdev_ops fc2580_subdev_ops = {
.tuner = &fc2580_subdev_tuner_ops,
};
static int fc2580_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct fc2580_dev *dev = container_of(ctrl->handler, struct fc2580_dev, hdl);
struct i2c_client *client = dev->client;
int ret;
dev_dbg(&client->dev, "ctrl: id=%d name=%s cur.val=%d val=%d\n",
ctrl->id, ctrl->name, ctrl->cur.val, ctrl->val);
switch (ctrl->id) {
case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
case V4L2_CID_RF_TUNER_BANDWIDTH:
/*
* TODO: Auto logic does not work 100% correctly as tuner driver
* do not have information to calculate maximum suitable
* bandwidth. Calculating it is responsible of master driver.
*/
dev->f_bandwidth = dev->bandwidth->val;
ret = fc2580_set_params(dev);
break;
default:
dev_dbg(&client->dev, "unknown ctrl");
ret = -EINVAL;
}
return ret;
}
static const struct v4l2_ctrl_ops fc2580_ctrl_ops = {
.s_ctrl = fc2580_s_ctrl,
};
#endif
static struct v4l2_subdev *fc2580_get_v4l2_subdev(struct i2c_client *client)
{
struct fc2580_dev *dev = i2c_get_clientdata(client);
if (dev->subdev.ops)
return &dev->subdev;
else
return NULL;
}
static int fc2580_probe(struct i2c_client *client)
{
struct fc2580_dev *dev;
struct fc2580_platform_data *pdata = client->dev.platform_data;
struct dvb_frontend *fe = pdata->dvb_frontend;
int ret;
unsigned int uitmp;
static const struct regmap_config regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
goto err;
}
if (pdata->clk)
dev->clk = pdata->clk;
else
dev->clk = 16384000; /* internal clock */
dev->client = client;
dev->regmap = devm_regmap_init_i2c(client, ®map_config);
if (IS_ERR(dev->regmap)) {
ret = PTR_ERR(dev->regmap);
goto err_kfree;
}
/* check if the tuner is there */
ret = regmap_read(dev->regmap, 0x01, &uitmp);
if (ret)
goto err_kfree;
dev_dbg(&client->dev, "chip_id=%02x\n", uitmp);
switch (uitmp) {
case 0x56:
case 0x5a:
break;
default:
ret = -ENODEV;
goto err_kfree;
}
#if IS_ENABLED(CONFIG_VIDEO_DEV)
/* Register controls */
v4l2_ctrl_handler_init(&dev->hdl, 2);
dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &fc2580_ctrl_ops,
V4L2_CID_RF_TUNER_BANDWIDTH_AUTO,
0, 1, 1, 1);
dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &fc2580_ctrl_ops,
V4L2_CID_RF_TUNER_BANDWIDTH,
3000, 10000000, 1, 3000);
v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
if (dev->hdl.error) {
ret = dev->hdl.error;
dev_err(&client->dev, "Could not initialize controls\n");
v4l2_ctrl_handler_free(&dev->hdl);
goto err_kfree;
}
dev->subdev.ctrl_handler = &dev->hdl;
dev->f_frequency = bands[0].rangelow;
dev->f_bandwidth = dev->bandwidth->val;
v4l2_i2c_subdev_init(&dev->subdev, client, &fc2580_subdev_ops);
#endif
fe->tuner_priv = dev;
memcpy(&fe->ops.tuner_ops, &fc2580_dvb_tuner_ops,
sizeof(fe->ops.tuner_ops));
pdata->get_v4l2_subdev = fc2580_get_v4l2_subdev;
i2c_set_clientdata(client, dev);
dev_info(&client->dev, "FCI FC2580 successfully identified\n");
return 0;
err_kfree:
kfree(dev);
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static void fc2580_remove(struct i2c_client *client)
{
struct fc2580_dev *dev = i2c_get_clientdata(client);
dev_dbg(&client->dev, "\n");
#if IS_ENABLED(CONFIG_VIDEO_DEV)
v4l2_ctrl_handler_free(&dev->hdl);
#endif
kfree(dev);
}
static const struct i2c_device_id fc2580_id_table[] = {
{"fc2580", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, fc2580_id_table);
static struct i2c_driver fc2580_driver = {
.driver = {
.name = "fc2580",
.suppress_bind_attrs = true,
},
.probe = fc2580_probe,
.remove = fc2580_remove,
.id_table = fc2580_id_table,
};
module_i2c_driver(fc2580_driver);
MODULE_DESCRIPTION("FCI FC2580 silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/fc2580.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Quantek QT1010 silicon tuner
*
* Copyright (C) 2006 Antti Palosaari <[email protected]>
* Aapo Tahkola <[email protected]>
*/
#include "qt1010.h"
#include "qt1010_priv.h"
/* read single register */
static int qt1010_readreg(struct qt1010_priv *priv, u8 reg, u8 *val)
{
struct i2c_msg msg[2] = {
{ .addr = priv->cfg->i2c_address,
.flags = 0, .buf = ®, .len = 1 },
{ .addr = priv->cfg->i2c_address,
.flags = I2C_M_RD, .buf = val, .len = 1 },
};
if (i2c_transfer(priv->i2c, msg, 2) != 2) {
dev_warn(&priv->i2c->dev, "%s: i2c rd failed reg=%02x\n",
KBUILD_MODNAME, reg);
return -EREMOTEIO;
}
return 0;
}
/* write single register */
static int qt1010_writereg(struct qt1010_priv *priv, u8 reg, u8 val)
{
u8 buf[2] = { reg, val };
struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
.flags = 0, .buf = buf, .len = 2 };
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
dev_warn(&priv->i2c->dev, "%s: i2c wr failed reg=%02x\n",
KBUILD_MODNAME, reg);
return -EREMOTEIO;
}
return 0;
}
static int qt1010_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct qt1010_priv *priv;
int err;
u32 freq, div, mod1, mod2;
u8 i, tmpval, reg05;
qt1010_i2c_oper_t rd[48] = {
{ QT1010_WR, 0x01, 0x80 },
{ QT1010_WR, 0x02, 0x3f },
{ QT1010_WR, 0x05, 0xff }, /* 02 c write */
{ QT1010_WR, 0x06, 0x44 },
{ QT1010_WR, 0x07, 0xff }, /* 04 c write */
{ QT1010_WR, 0x08, 0x08 },
{ QT1010_WR, 0x09, 0xff }, /* 06 c write */
{ QT1010_WR, 0x0a, 0xff }, /* 07 c write */
{ QT1010_WR, 0x0b, 0xff }, /* 08 c write */
{ QT1010_WR, 0x0c, 0xe1 },
{ QT1010_WR, 0x1a, 0xff }, /* 10 c write */
{ QT1010_WR, 0x1b, 0x00 },
{ QT1010_WR, 0x1c, 0x89 },
{ QT1010_WR, 0x11, 0xff }, /* 13 c write */
{ QT1010_WR, 0x12, 0xff }, /* 14 c write */
{ QT1010_WR, 0x22, 0xff }, /* 15 c write */
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x1e, 0xd0 },
{ QT1010_RD, 0x22, 0xff }, /* 16 c read */
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_RD, 0x05, 0xff }, /* 20 c read */
{ QT1010_RD, 0x22, 0xff }, /* 21 c read */
{ QT1010_WR, 0x23, 0xd0 },
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x1e, 0xe0 },
{ QT1010_RD, 0x23, 0xff }, /* 25 c read */
{ QT1010_RD, 0x23, 0xff }, /* 26 c read */
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x24, 0xd0 },
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x1e, 0xf0 },
{ QT1010_RD, 0x24, 0xff }, /* 31 c read */
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x14, 0x7f },
{ QT1010_WR, 0x15, 0x7f },
{ QT1010_WR, 0x05, 0xff }, /* 35 c write */
{ QT1010_WR, 0x06, 0x00 },
{ QT1010_WR, 0x15, 0x1f },
{ QT1010_WR, 0x16, 0xff },
{ QT1010_WR, 0x18, 0xff },
{ QT1010_WR, 0x1f, 0xff }, /* 40 c write */
{ QT1010_WR, 0x20, 0xff }, /* 41 c write */
{ QT1010_WR, 0x21, 0x53 },
{ QT1010_WR, 0x25, 0xff }, /* 43 c write */
{ QT1010_WR, 0x26, 0x15 },
{ QT1010_WR, 0x00, 0xff }, /* 45 c write */
{ QT1010_WR, 0x02, 0x00 },
{ QT1010_WR, 0x01, 0x00 }
};
#define FREQ1 32000000 /* 32 MHz */
#define FREQ2 4000000 /* 4 MHz Quartz oscillator in the stick? */
priv = fe->tuner_priv;
freq = c->frequency;
div = (freq + QT1010_OFFSET) / QT1010_STEP;
freq = (div * QT1010_STEP) - QT1010_OFFSET;
mod1 = (freq + QT1010_OFFSET) % FREQ1;
mod2 = (freq + QT1010_OFFSET) % FREQ2;
priv->frequency = freq;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
/* reg 05 base value */
if (freq < 290000000) reg05 = 0x14; /* 290 MHz */
else if (freq < 610000000) reg05 = 0x34; /* 610 MHz */
else if (freq < 802000000) reg05 = 0x54; /* 802 MHz */
else reg05 = 0x74;
/* 0x5 */
rd[2].val = reg05;
/* 07 - set frequency: 32 MHz scale */
rd[4].val = (freq + QT1010_OFFSET) / FREQ1;
/* 09 - changes every 8/24 MHz */
if (mod1 < 8000000) rd[6].val = 0x1d;
else rd[6].val = 0x1c;
/* 0a - set frequency: 4 MHz scale (max 28 MHz) */
if (mod1 < 1*FREQ2) rd[7].val = 0x09; /* +0 MHz */
else if (mod1 < 2*FREQ2) rd[7].val = 0x08; /* +4 MHz */
else if (mod1 < 3*FREQ2) rd[7].val = 0x0f; /* +8 MHz */
else if (mod1 < 4*FREQ2) rd[7].val = 0x0e; /* +12 MHz */
else if (mod1 < 5*FREQ2) rd[7].val = 0x0d; /* +16 MHz */
else if (mod1 < 6*FREQ2) rd[7].val = 0x0c; /* +20 MHz */
else if (mod1 < 7*FREQ2) rd[7].val = 0x0b; /* +24 MHz */
else rd[7].val = 0x0a; /* +28 MHz */
/* 0b - changes every 2/2 MHz */
if (mod2 < 2000000) rd[8].val = 0x45;
else rd[8].val = 0x44;
/* 1a - set frequency: 125 kHz scale (max 3875 kHz)*/
tmpval = 0x78; /* byte, overflows intentionally */
rd[10].val = tmpval-((mod2/QT1010_STEP)*0x08);
/* 11 */
rd[13].val = 0xfd; /* TODO: correct value calculation */
/* 12 */
rd[14].val = 0x91; /* TODO: correct value calculation */
/* 22 */
if (freq < 450000000) rd[15].val = 0xd0; /* 450 MHz */
else if (freq < 482000000) rd[15].val = 0xd1; /* 482 MHz */
else if (freq < 514000000) rd[15].val = 0xd4; /* 514 MHz */
else if (freq < 546000000) rd[15].val = 0xd7; /* 546 MHz */
else if (freq < 610000000) rd[15].val = 0xda; /* 610 MHz */
else rd[15].val = 0xd0;
/* 05 */
rd[35].val = (reg05 & 0xf0);
/* 1f */
if (mod1 < 8000000) tmpval = 0x00;
else if (mod1 < 12000000) tmpval = 0x01;
else if (mod1 < 16000000) tmpval = 0x02;
else if (mod1 < 24000000) tmpval = 0x03;
else if (mod1 < 28000000) tmpval = 0x04;
else tmpval = 0x05;
rd[40].val = (priv->reg1f_init_val + 0x0e + tmpval);
/* 20 */
if (mod1 < 8000000) tmpval = 0x00;
else if (mod1 < 12000000) tmpval = 0x01;
else if (mod1 < 20000000) tmpval = 0x02;
else if (mod1 < 24000000) tmpval = 0x03;
else if (mod1 < 28000000) tmpval = 0x04;
else tmpval = 0x05;
rd[41].val = (priv->reg20_init_val + 0x0d + tmpval);
/* 25 */
rd[43].val = priv->reg25_init_val;
/* 00 */
rd[45].val = 0x92; /* TODO: correct value calculation */
dev_dbg(&priv->i2c->dev,
"%s: freq:%u 05:%02x 07:%02x 09:%02x 0a:%02x 0b:%02x " \
"1a:%02x 11:%02x 12:%02x 22:%02x 05:%02x 1f:%02x " \
"20:%02x 25:%02x 00:%02x\n", __func__, \
freq, rd[2].val, rd[4].val, rd[6].val, rd[7].val, \
rd[8].val, rd[10].val, rd[13].val, rd[14].val, \
rd[15].val, rd[35].val, rd[40].val, rd[41].val, \
rd[43].val, rd[45].val);
for (i = 0; i < ARRAY_SIZE(rd); i++) {
if (rd[i].oper == QT1010_WR) {
err = qt1010_writereg(priv, rd[i].reg, rd[i].val);
} else { /* read is required to proper locking */
err = qt1010_readreg(priv, rd[i].reg, &tmpval);
}
if (err) return err;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
return 0;
}
static int qt1010_init_meas1(struct qt1010_priv *priv,
u8 oper, u8 reg, u8 reg_init_val, u8 *retval)
{
u8 i, val1, val2;
int err;
qt1010_i2c_oper_t i2c_data[] = {
{ QT1010_WR, reg, reg_init_val },
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x1e, oper },
};
for (i = 0; i < ARRAY_SIZE(i2c_data); i++) {
err = qt1010_writereg(priv, i2c_data[i].reg,
i2c_data[i].val);
if (err)
return err;
}
err = qt1010_readreg(priv, reg, &val2);
if (err)
return err;
do {
val1 = val2;
err = qt1010_readreg(priv, reg, &val2);
if (err)
return err;
dev_dbg(&priv->i2c->dev, "%s: compare reg:%02x %02x %02x\n",
__func__, reg, val1, val2);
} while (val1 != val2);
*retval = val1;
return qt1010_writereg(priv, 0x1e, 0x00);
}
static int qt1010_init_meas2(struct qt1010_priv *priv,
u8 reg_init_val, u8 *retval)
{
u8 i, val = 0xff;
int err;
qt1010_i2c_oper_t i2c_data[] = {
{ QT1010_WR, 0x07, reg_init_val },
{ QT1010_WR, 0x22, 0xd0 },
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x1e, 0xd0 },
{ QT1010_RD, 0x22, 0xff },
{ QT1010_WR, 0x1e, 0x00 },
{ QT1010_WR, 0x22, 0xff }
};
for (i = 0; i < ARRAY_SIZE(i2c_data); i++) {
if (i2c_data[i].oper == QT1010_WR) {
err = qt1010_writereg(priv, i2c_data[i].reg,
i2c_data[i].val);
} else {
err = qt1010_readreg(priv, i2c_data[i].reg, &val);
}
if (err)
return err;
}
*retval = val;
return 0;
}
static int qt1010_init(struct dvb_frontend *fe)
{
struct qt1010_priv *priv = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int err = 0;
u8 i, tmpval, *valptr = NULL;
static const qt1010_i2c_oper_t i2c_data[] = {
{ QT1010_WR, 0x01, 0x80 },
{ QT1010_WR, 0x0d, 0x84 },
{ QT1010_WR, 0x0e, 0xb7 },
{ QT1010_WR, 0x2a, 0x23 },
{ QT1010_WR, 0x2c, 0xdc },
{ QT1010_M1, 0x25, 0x40 }, /* get reg 25 init value */
{ QT1010_M1, 0x81, 0xff }, /* get reg 25 init value */
{ QT1010_WR, 0x2b, 0x70 },
{ QT1010_WR, 0x2a, 0x23 },
{ QT1010_M1, 0x26, 0x08 },
{ QT1010_M1, 0x82, 0xff },
{ QT1010_WR, 0x05, 0x14 },
{ QT1010_WR, 0x06, 0x44 },
{ QT1010_WR, 0x07, 0x28 },
{ QT1010_WR, 0x08, 0x0b },
{ QT1010_WR, 0x11, 0xfd },
{ QT1010_M1, 0x22, 0x0d },
{ QT1010_M1, 0xd0, 0xff },
{ QT1010_WR, 0x06, 0x40 },
{ QT1010_WR, 0x16, 0xf0 },
{ QT1010_WR, 0x02, 0x38 },
{ QT1010_WR, 0x03, 0x18 },
{ QT1010_WR, 0x20, 0xe0 },
{ QT1010_M1, 0x1f, 0x20 }, /* get reg 1f init value */
{ QT1010_M1, 0x84, 0xff }, /* get reg 1f init value */
{ QT1010_RD, 0x20, 0x20 }, /* get reg 20 init value */
{ QT1010_WR, 0x03, 0x19 },
{ QT1010_WR, 0x02, 0x3f },
{ QT1010_WR, 0x21, 0x53 },
{ QT1010_RD, 0x21, 0xff },
{ QT1010_WR, 0x11, 0xfd },
{ QT1010_WR, 0x05, 0x34 },
{ QT1010_WR, 0x06, 0x44 },
{ QT1010_WR, 0x08, 0x08 }
};
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
for (i = 0; i < ARRAY_SIZE(i2c_data); i++) {
switch (i2c_data[i].oper) {
case QT1010_WR:
err = qt1010_writereg(priv, i2c_data[i].reg,
i2c_data[i].val);
break;
case QT1010_RD:
if (i2c_data[i].val == 0x20)
valptr = &priv->reg20_init_val;
else
valptr = &tmpval;
err = qt1010_readreg(priv, i2c_data[i].reg, valptr);
break;
case QT1010_M1:
if (i2c_data[i].val == 0x25)
valptr = &priv->reg25_init_val;
else if (i2c_data[i].val == 0x1f)
valptr = &priv->reg1f_init_val;
else
valptr = &tmpval;
if (i >= ARRAY_SIZE(i2c_data) - 1)
err = -EIO;
else
err = qt1010_init_meas1(priv, i2c_data[i + 1].reg,
i2c_data[i].reg,
i2c_data[i].val, valptr);
i++;
break;
}
if (err)
return err;
}
for (i = 0x31; i < 0x3a; i++) /* 0x31 - 0x39 */
if ((err = qt1010_init_meas2(priv, i, &tmpval)))
return err;
if (!c->frequency)
c->frequency = 545000000; /* Sigmatek DVB-110 545000000 */
/* MSI Megasky 580 GL861 533000000 */
return qt1010_set_params(fe);
}
static void qt1010_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static int qt1010_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct qt1010_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int qt1010_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
*frequency = 36125000;
return 0;
}
static const struct dvb_tuner_ops qt1010_tuner_ops = {
.info = {
.name = "Quantek QT1010",
.frequency_min_hz = QT1010_MIN_FREQ,
.frequency_max_hz = QT1010_MAX_FREQ,
.frequency_step_hz = QT1010_STEP,
},
.release = qt1010_release,
.init = qt1010_init,
/* TODO: implement sleep */
.set_params = qt1010_set_params,
.get_frequency = qt1010_get_frequency,
.get_if_frequency = qt1010_get_if_frequency,
};
struct dvb_frontend * qt1010_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
struct qt1010_config *cfg)
{
struct qt1010_priv *priv = NULL;
u8 id;
priv = kzalloc(sizeof(struct qt1010_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
priv->cfg = cfg;
priv->i2c = i2c;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
/* Try to detect tuner chip. Probably this is not correct register. */
if (qt1010_readreg(priv, 0x29, &id) != 0 || (id != 0x39)) {
kfree(priv);
return NULL;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
dev_info(&priv->i2c->dev,
"%s: Quantek QT1010 successfully identified\n",
KBUILD_MODNAME);
memcpy(&fe->ops.tuner_ops, &qt1010_tuner_ops,
sizeof(struct dvb_tuner_ops));
fe->tuner_priv = priv;
return fe;
}
EXPORT_SYMBOL_GPL(qt1010_attach);
MODULE_DESCRIPTION("Quantek QT1010 silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_AUTHOR("Aapo Tahkola <[email protected]>");
MODULE_VERSION("0.1");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/qt1010.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Mirics MSi001 silicon tuner driver
*
* Copyright (C) 2013 Antti Palosaari <[email protected]>
* Copyright (C) 2014 Antti Palosaari <[email protected]>
*/
#include <linux/module.h>
#include <linux/gcd.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
static const struct v4l2_frequency_band bands[] = {
{
.type = V4L2_TUNER_RF,
.index = 0,
.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
.rangelow = 49000000,
.rangehigh = 263000000,
}, {
.type = V4L2_TUNER_RF,
.index = 1,
.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
.rangelow = 390000000,
.rangehigh = 960000000,
},
};
struct msi001_dev {
struct spi_device *spi;
struct v4l2_subdev sd;
/* Controls */
struct v4l2_ctrl_handler hdl;
struct v4l2_ctrl *bandwidth_auto;
struct v4l2_ctrl *bandwidth;
struct v4l2_ctrl *lna_gain;
struct v4l2_ctrl *mixer_gain;
struct v4l2_ctrl *if_gain;
unsigned int f_tuner;
};
static inline struct msi001_dev *sd_to_msi001_dev(struct v4l2_subdev *sd)
{
return container_of(sd, struct msi001_dev, sd);
}
static int msi001_wreg(struct msi001_dev *dev, u32 data)
{
/* Register format: 4 bits addr + 20 bits value */
return spi_write(dev->spi, &data, 3);
};
static int msi001_set_gain(struct msi001_dev *dev, int lna_gain, int mixer_gain,
int if_gain)
{
struct spi_device *spi = dev->spi;
int ret;
u32 reg;
dev_dbg(&spi->dev, "lna=%d mixer=%d if=%d\n",
lna_gain, mixer_gain, if_gain);
reg = 1 << 0;
reg |= (59 - if_gain) << 4;
reg |= 0 << 10;
reg |= (1 - mixer_gain) << 12;
reg |= (1 - lna_gain) << 13;
reg |= 4 << 14;
reg |= 0 << 17;
ret = msi001_wreg(dev, reg);
if (ret)
goto err;
return 0;
err:
dev_dbg(&spi->dev, "failed %d\n", ret);
return ret;
};
static int msi001_set_tuner(struct msi001_dev *dev)
{
struct spi_device *spi = dev->spi;
int ret, i;
unsigned int uitmp, div_n, k, k_thresh, k_frac, div_lo, f_if1;
u32 reg;
u64 f_vco;
u8 mode, filter_mode;
static const struct {
u32 rf;
u8 mode;
u8 div_lo;
} band_lut[] = {
{ 50000000, 0xe1, 16}, /* AM_MODE2, antenna 2 */
{108000000, 0x42, 32}, /* VHF_MODE */
{330000000, 0x44, 16}, /* B3_MODE */
{960000000, 0x48, 4}, /* B45_MODE */
{ ~0U, 0x50, 2}, /* BL_MODE */
};
static const struct {
u32 freq;
u8 filter_mode;
} if_freq_lut[] = {
{ 0, 0x03}, /* Zero IF */
{ 450000, 0x02}, /* 450 kHz IF */
{1620000, 0x01}, /* 1.62 MHz IF */
{2048000, 0x00}, /* 2.048 MHz IF */
};
static const struct {
u32 freq;
u8 val;
} bandwidth_lut[] = {
{ 200000, 0x00}, /* 200 kHz */
{ 300000, 0x01}, /* 300 kHz */
{ 600000, 0x02}, /* 600 kHz */
{1536000, 0x03}, /* 1.536 MHz */
{5000000, 0x04}, /* 5 MHz */
{6000000, 0x05}, /* 6 MHz */
{7000000, 0x06}, /* 7 MHz */
{8000000, 0x07}, /* 8 MHz */
};
unsigned int f_rf = dev->f_tuner;
/*
* bandwidth (Hz)
* 200000, 300000, 600000, 1536000, 5000000, 6000000, 7000000, 8000000
*/
unsigned int bandwidth;
/*
* intermediate frequency (Hz)
* 0, 450000, 1620000, 2048000
*/
unsigned int f_if = 0;
#define F_REF 24000000
#define DIV_PRE_N 4
#define F_VCO_STEP div_lo
dev_dbg(&spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if);
for (i = 0; i < ARRAY_SIZE(band_lut); i++) {
if (f_rf <= band_lut[i].rf) {
mode = band_lut[i].mode;
div_lo = band_lut[i].div_lo;
break;
}
}
if (i == ARRAY_SIZE(band_lut)) {
ret = -EINVAL;
goto err;
}
/* AM_MODE is upconverted */
if ((mode >> 0) & 0x1)
f_if1 = 5 * F_REF;
else
f_if1 = 0;
for (i = 0; i < ARRAY_SIZE(if_freq_lut); i++) {
if (f_if == if_freq_lut[i].freq) {
filter_mode = if_freq_lut[i].filter_mode;
break;
}
}
if (i == ARRAY_SIZE(if_freq_lut)) {
ret = -EINVAL;
goto err;
}
/* filters */
bandwidth = dev->bandwidth->val;
bandwidth = clamp(bandwidth, 200000U, 8000000U);
for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) {
if (bandwidth <= bandwidth_lut[i].freq) {
bandwidth = bandwidth_lut[i].val;
break;
}
}
if (i == ARRAY_SIZE(bandwidth_lut)) {
ret = -EINVAL;
goto err;
}
dev->bandwidth->val = bandwidth_lut[i].freq;
dev_dbg(&spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq);
/*
* Fractional-N synthesizer
*
* +---------------------------------------+
* v |
* Fref +----+ +-------+ +----+ +------+ +---+
* ------> | PD | --> | VCO | ------> | /4 | --> | /N.F | <-- | K |
* +----+ +-------+ +----+ +------+ +---+
* |
* |
* v
* +-------+ Fout
* | /Rout | ------>
* +-------+
*/
/* Calculate PLL integer and fractional control word. */
f_vco = (u64) (f_rf + f_if + f_if1) * div_lo;
div_n = div_u64_rem(f_vco, DIV_PRE_N * F_REF, &k);
k_thresh = (DIV_PRE_N * F_REF) / F_VCO_STEP;
k_frac = div_u64((u64) k * k_thresh, (DIV_PRE_N * F_REF));
/* Find out greatest common divisor and divide to smaller. */
uitmp = gcd(k_thresh, k_frac);
k_thresh /= uitmp;
k_frac /= uitmp;
/* Force divide to reg max. Resolution will be reduced. */
uitmp = DIV_ROUND_UP(k_thresh, 4095);
k_thresh = DIV_ROUND_CLOSEST(k_thresh, uitmp);
k_frac = DIV_ROUND_CLOSEST(k_frac, uitmp);
/* Calculate real RF set. */
uitmp = (unsigned int) F_REF * DIV_PRE_N * div_n;
uitmp += (unsigned int) F_REF * DIV_PRE_N * k_frac / k_thresh;
uitmp /= div_lo;
dev_dbg(&spi->dev,
"f_rf=%u:%u f_vco=%llu div_n=%u k_thresh=%u k_frac=%u div_lo=%u\n",
f_rf, uitmp, f_vco, div_n, k_thresh, k_frac, div_lo);
ret = msi001_wreg(dev, 0x00000e);
if (ret)
goto err;
ret = msi001_wreg(dev, 0x000003);
if (ret)
goto err;
reg = 0 << 0;
reg |= mode << 4;
reg |= filter_mode << 12;
reg |= bandwidth << 14;
reg |= 0x02 << 17;
reg |= 0x00 << 20;
ret = msi001_wreg(dev, reg);
if (ret)
goto err;
reg = 5 << 0;
reg |= k_thresh << 4;
reg |= 1 << 19;
reg |= 1 << 21;
ret = msi001_wreg(dev, reg);
if (ret)
goto err;
reg = 2 << 0;
reg |= k_frac << 4;
reg |= div_n << 16;
ret = msi001_wreg(dev, reg);
if (ret)
goto err;
ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
dev->mixer_gain->cur.val, dev->if_gain->cur.val);
if (ret)
goto err;
reg = 6 << 0;
reg |= 63 << 4;
reg |= 4095 << 10;
ret = msi001_wreg(dev, reg);
if (ret)
goto err;
return 0;
err:
dev_dbg(&spi->dev, "failed %d\n", ret);
return ret;
}
static int msi001_standby(struct v4l2_subdev *sd)
{
struct msi001_dev *dev = sd_to_msi001_dev(sd);
return msi001_wreg(dev, 0x000000);
}
static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
{
struct msi001_dev *dev = sd_to_msi001_dev(sd);
struct spi_device *spi = dev->spi;
dev_dbg(&spi->dev, "index=%d\n", v->index);
strscpy(v->name, "Mirics MSi001", sizeof(v->name));
v->type = V4L2_TUNER_RF;
v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
v->rangelow = 49000000;
v->rangehigh = 960000000;
return 0;
}
static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
{
struct msi001_dev *dev = sd_to_msi001_dev(sd);
struct spi_device *spi = dev->spi;
dev_dbg(&spi->dev, "index=%d\n", v->index);
return 0;
}
static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
{
struct msi001_dev *dev = sd_to_msi001_dev(sd);
struct spi_device *spi = dev->spi;
dev_dbg(&spi->dev, "tuner=%d\n", f->tuner);
f->frequency = dev->f_tuner;
return 0;
}
static int msi001_s_frequency(struct v4l2_subdev *sd,
const struct v4l2_frequency *f)
{
struct msi001_dev *dev = sd_to_msi001_dev(sd);
struct spi_device *spi = dev->spi;
unsigned int band;
dev_dbg(&spi->dev, "tuner=%d type=%d frequency=%u\n",
f->tuner, f->type, f->frequency);
if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2))
band = 0;
else
band = 1;
dev->f_tuner = clamp_t(unsigned int, f->frequency,
bands[band].rangelow, bands[band].rangehigh);
return msi001_set_tuner(dev);
}
static int msi001_enum_freq_bands(struct v4l2_subdev *sd,
struct v4l2_frequency_band *band)
{
struct msi001_dev *dev = sd_to_msi001_dev(sd);
struct spi_device *spi = dev->spi;
dev_dbg(&spi->dev, "tuner=%d type=%d index=%d\n",
band->tuner, band->type, band->index);
if (band->index >= ARRAY_SIZE(bands))
return -EINVAL;
band->capability = bands[band->index].capability;
band->rangelow = bands[band->index].rangelow;
band->rangehigh = bands[band->index].rangehigh;
return 0;
}
static const struct v4l2_subdev_tuner_ops msi001_tuner_ops = {
.standby = msi001_standby,
.g_tuner = msi001_g_tuner,
.s_tuner = msi001_s_tuner,
.g_frequency = msi001_g_frequency,
.s_frequency = msi001_s_frequency,
.enum_freq_bands = msi001_enum_freq_bands,
};
static const struct v4l2_subdev_ops msi001_ops = {
.tuner = &msi001_tuner_ops,
};
static int msi001_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct msi001_dev *dev = container_of(ctrl->handler, struct msi001_dev, hdl);
struct spi_device *spi = dev->spi;
int ret;
dev_dbg(&spi->dev, "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n",
ctrl->id, ctrl->name, ctrl->val, ctrl->minimum, ctrl->maximum,
ctrl->step);
switch (ctrl->id) {
case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
case V4L2_CID_RF_TUNER_BANDWIDTH:
ret = msi001_set_tuner(dev);
break;
case V4L2_CID_RF_TUNER_LNA_GAIN:
ret = msi001_set_gain(dev, dev->lna_gain->val,
dev->mixer_gain->cur.val,
dev->if_gain->cur.val);
break;
case V4L2_CID_RF_TUNER_MIXER_GAIN:
ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
dev->mixer_gain->val,
dev->if_gain->cur.val);
break;
case V4L2_CID_RF_TUNER_IF_GAIN:
ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
dev->mixer_gain->cur.val,
dev->if_gain->val);
break;
default:
dev_dbg(&spi->dev, "unknown control %d\n", ctrl->id);
ret = -EINVAL;
}
return ret;
}
static const struct v4l2_ctrl_ops msi001_ctrl_ops = {
.s_ctrl = msi001_s_ctrl,
};
static int msi001_probe(struct spi_device *spi)
{
struct msi001_dev *dev;
int ret;
dev_dbg(&spi->dev, "\n");
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
goto err;
}
dev->spi = spi;
dev->f_tuner = bands[0].rangelow;
v4l2_spi_subdev_init(&dev->sd, spi, &msi001_ops);
/* Register controls */
v4l2_ctrl_handler_init(&dev->hdl, 5);
dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
V4L2_CID_RF_TUNER_BANDWIDTH, 200000, 8000000, 1, 200000);
if (dev->hdl.error) {
ret = dev->hdl.error;
dev_err(&spi->dev, "Could not initialize controls\n");
/* control init failed, free handler */
goto err_ctrl_handler_free;
}
v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
V4L2_CID_RF_TUNER_LNA_GAIN, 0, 1, 1, 1);
dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
V4L2_CID_RF_TUNER_IF_GAIN, 0, 59, 1, 0);
if (dev->hdl.error) {
ret = dev->hdl.error;
dev_err(&spi->dev, "Could not initialize controls\n");
/* control init failed, free handler */
goto err_ctrl_handler_free;
}
dev->sd.ctrl_handler = &dev->hdl;
return 0;
err_ctrl_handler_free:
v4l2_ctrl_handler_free(&dev->hdl);
kfree(dev);
err:
return ret;
}
static void msi001_remove(struct spi_device *spi)
{
struct v4l2_subdev *sd = spi_get_drvdata(spi);
struct msi001_dev *dev = sd_to_msi001_dev(sd);
dev_dbg(&spi->dev, "\n");
/*
* Registered by v4l2_spi_new_subdev() from master driver, but we must
* unregister it from here. Weird.
*/
v4l2_device_unregister_subdev(&dev->sd);
v4l2_ctrl_handler_free(&dev->hdl);
kfree(dev);
}
static const struct spi_device_id msi001_id_table[] = {
{"msi001", 0},
{}
};
MODULE_DEVICE_TABLE(spi, msi001_id_table);
static struct spi_driver msi001_driver = {
.driver = {
.name = "msi001",
.suppress_bind_attrs = true,
},
.probe = msi001_probe,
.remove = msi001_remove,
.id_table = msi001_id_table,
};
module_spi_driver(msi001_driver);
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_DESCRIPTION("Mirics MSi001");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/msi001.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Infineon TUA9001 silicon tuner driver
*
* Copyright (C) 2009 Antti Palosaari <[email protected]>
*/
#include "tua9001_priv.h"
static int tua9001_init(struct dvb_frontend *fe)
{
struct tua9001_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
int ret, i;
static const struct tua9001_reg_val data[] = {
{0x1e, 0x6512},
{0x25, 0xb888},
{0x39, 0x5460},
{0x3b, 0x00c0},
{0x3a, 0xf000},
{0x08, 0x0000},
{0x32, 0x0030},
{0x41, 0x703a},
{0x40, 0x1c78},
{0x2c, 0x1c00},
{0x36, 0xc013},
{0x37, 0x6f18},
{0x27, 0x0008},
{0x2a, 0x0001},
{0x34, 0x0a40},
};
dev_dbg(&client->dev, "\n");
if (fe->callback) {
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_RESETN, 0);
if (ret)
goto err;
}
for (i = 0; i < ARRAY_SIZE(data); i++) {
ret = regmap_write(dev->regmap, data[i].reg, data[i].val);
if (ret)
goto err;
}
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tua9001_sleep(struct dvb_frontend *fe)
{
struct tua9001_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
int ret;
dev_dbg(&client->dev, "\n");
if (fe->callback) {
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_RESETN, 1);
if (ret)
goto err;
}
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tua9001_set_params(struct dvb_frontend *fe)
{
struct tua9001_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret, i;
u16 val;
struct tua9001_reg_val data[2];
dev_dbg(&client->dev,
"delivery_system=%u frequency=%u bandwidth_hz=%u\n",
c->delivery_system, c->frequency, c->bandwidth_hz);
switch (c->delivery_system) {
case SYS_DVBT:
switch (c->bandwidth_hz) {
case 8000000:
val = 0x0000;
break;
case 7000000:
val = 0x1000;
break;
case 6000000:
val = 0x2000;
break;
case 5000000:
val = 0x3000;
break;
default:
ret = -EINVAL;
goto err;
}
break;
default:
ret = -EINVAL;
goto err;
}
data[0].reg = 0x04;
data[0].val = val;
data[1].reg = 0x1f;
data[1].val = div_u64((u64) (c->frequency - 150000000) * 48, 1000000);
if (fe->callback) {
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_RXEN, 0);
if (ret)
goto err;
}
for (i = 0; i < ARRAY_SIZE(data); i++) {
ret = regmap_write(dev->regmap, data[i].reg, data[i].val);
if (ret)
goto err;
}
if (fe->callback) {
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_RXEN, 1);
if (ret)
goto err;
}
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tua9001_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tua9001_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "\n");
*frequency = 0; /* Zero-IF */
return 0;
}
static const struct dvb_tuner_ops tua9001_tuner_ops = {
.info = {
.name = "Infineon TUA9001",
.frequency_min_hz = 170 * MHz,
.frequency_max_hz = 862 * MHz,
},
.init = tua9001_init,
.sleep = tua9001_sleep,
.set_params = tua9001_set_params,
.get_if_frequency = tua9001_get_if_frequency,
};
static int tua9001_probe(struct i2c_client *client)
{
struct tua9001_dev *dev;
struct tua9001_platform_data *pdata = client->dev.platform_data;
struct dvb_frontend *fe = pdata->dvb_frontend;
int ret;
static const struct regmap_config regmap_config = {
.reg_bits = 8,
.val_bits = 16,
};
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
goto err;
}
dev->fe = pdata->dvb_frontend;
dev->client = client;
dev->regmap = devm_regmap_init_i2c(client, ®map_config);
if (IS_ERR(dev->regmap)) {
ret = PTR_ERR(dev->regmap);
goto err_kfree;
}
if (fe->callback) {
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_CEN, 1);
if (ret)
goto err_kfree;
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_RXEN, 0);
if (ret)
goto err_kfree;
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_RESETN, 1);
if (ret)
goto err_kfree;
}
fe->tuner_priv = dev;
memcpy(&fe->ops.tuner_ops, &tua9001_tuner_ops,
sizeof(struct dvb_tuner_ops));
i2c_set_clientdata(client, dev);
dev_info(&client->dev, "Infineon TUA9001 successfully attached\n");
return 0;
err_kfree:
kfree(dev);
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static void tua9001_remove(struct i2c_client *client)
{
struct tua9001_dev *dev = i2c_get_clientdata(client);
struct dvb_frontend *fe = dev->fe;
int ret;
dev_dbg(&client->dev, "\n");
if (fe->callback) {
ret = fe->callback(client->adapter,
DVB_FRONTEND_COMPONENT_TUNER,
TUA9001_CMD_CEN, 0);
if (ret)
dev_err(&client->dev, "Tuner disable failed (%pe)\n", ERR_PTR(ret));
}
kfree(dev);
}
static const struct i2c_device_id tua9001_id_table[] = {
{"tua9001", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, tua9001_id_table);
static struct i2c_driver tua9001_driver = {
.driver = {
.name = "tua9001",
.suppress_bind_attrs = true,
},
.probe = tua9001_probe,
.remove = tua9001_remove,
.id_table = tua9001_id_table,
};
module_i2c_driver(tua9001_driver);
MODULE_DESCRIPTION("Infineon TUA9001 silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tua9001.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
*
* Copyright (C) 2008, 2009 Michael Krufky <[email protected]>
*/
#include <linux/i2c.h>
#include <linux/types.h>
#include <linux/videodev2.h>
#include "tuner-i2c.h"
#include "mxl5007t.h"
static DEFINE_MUTEX(mxl5007t_list_mutex);
static LIST_HEAD(hybrid_tuner_instance_list);
static int mxl5007t_debug;
module_param_named(debug, mxl5007t_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debug level");
/* ------------------------------------------------------------------------- */
#define mxl_printk(kern, fmt, arg...) \
printk(kern "%s: " fmt "\n", __func__, ##arg)
#define mxl_err(fmt, arg...) \
mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
#define mxl_warn(fmt, arg...) \
mxl_printk(KERN_WARNING, fmt, ##arg)
#define mxl_info(fmt, arg...) \
mxl_printk(KERN_INFO, fmt, ##arg)
#define mxl_debug(fmt, arg...) \
({ \
if (mxl5007t_debug) \
mxl_printk(KERN_DEBUG, fmt, ##arg); \
})
#define mxl_fail(ret) \
({ \
int __ret; \
__ret = (ret < 0); \
if (__ret) \
mxl_printk(KERN_ERR, "error %d on line %d", \
ret, __LINE__); \
__ret; \
})
/* ------------------------------------------------------------------------- */
enum mxl5007t_mode {
MxL_MODE_ISDBT = 0,
MxL_MODE_DVBT = 1,
MxL_MODE_ATSC = 2,
MxL_MODE_CABLE = 0x10,
};
enum mxl5007t_chip_version {
MxL_UNKNOWN_ID = 0x00,
MxL_5007_V1_F1 = 0x11,
MxL_5007_V1_F2 = 0x12,
MxL_5007_V4 = 0x14,
MxL_5007_V2_100_F1 = 0x21,
MxL_5007_V2_100_F2 = 0x22,
MxL_5007_V2_200_F1 = 0x23,
MxL_5007_V2_200_F2 = 0x24,
};
struct reg_pair_t {
u8 reg;
u8 val;
};
/* ------------------------------------------------------------------------- */
static struct reg_pair_t init_tab[] = {
{ 0x02, 0x06 },
{ 0x03, 0x48 },
{ 0x05, 0x04 },
{ 0x06, 0x10 },
{ 0x2e, 0x15 }, /* OVERRIDE */
{ 0x30, 0x10 }, /* OVERRIDE */
{ 0x45, 0x58 }, /* OVERRIDE */
{ 0x48, 0x19 }, /* OVERRIDE */
{ 0x52, 0x03 }, /* OVERRIDE */
{ 0x53, 0x44 }, /* OVERRIDE */
{ 0x6a, 0x4b }, /* OVERRIDE */
{ 0x76, 0x00 }, /* OVERRIDE */
{ 0x78, 0x18 }, /* OVERRIDE */
{ 0x7a, 0x17 }, /* OVERRIDE */
{ 0x85, 0x06 }, /* OVERRIDE */
{ 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
{ 0, 0 }
};
static struct reg_pair_t init_tab_cable[] = {
{ 0x02, 0x06 },
{ 0x03, 0x48 },
{ 0x05, 0x04 },
{ 0x06, 0x10 },
{ 0x09, 0x3f },
{ 0x0a, 0x3f },
{ 0x0b, 0x3f },
{ 0x2e, 0x15 }, /* OVERRIDE */
{ 0x30, 0x10 }, /* OVERRIDE */
{ 0x45, 0x58 }, /* OVERRIDE */
{ 0x48, 0x19 }, /* OVERRIDE */
{ 0x52, 0x03 }, /* OVERRIDE */
{ 0x53, 0x44 }, /* OVERRIDE */
{ 0x6a, 0x4b }, /* OVERRIDE */
{ 0x76, 0x00 }, /* OVERRIDE */
{ 0x78, 0x18 }, /* OVERRIDE */
{ 0x7a, 0x17 }, /* OVERRIDE */
{ 0x85, 0x06 }, /* OVERRIDE */
{ 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
{ 0, 0 }
};
/* ------------------------------------------------------------------------- */
static struct reg_pair_t reg_pair_rftune[] = {
{ 0x0f, 0x00 }, /* abort tune */
{ 0x0c, 0x15 },
{ 0x0d, 0x40 },
{ 0x0e, 0x0e },
{ 0x1f, 0x87 }, /* OVERRIDE */
{ 0x20, 0x1f }, /* OVERRIDE */
{ 0x21, 0x87 }, /* OVERRIDE */
{ 0x22, 0x1f }, /* OVERRIDE */
{ 0x80, 0x01 }, /* freq dependent */
{ 0x0f, 0x01 }, /* start tune */
{ 0, 0 }
};
/* ------------------------------------------------------------------------- */
struct mxl5007t_state {
struct list_head hybrid_tuner_instance_list;
struct tuner_i2c_props i2c_props;
struct mutex lock;
struct mxl5007t_config *config;
enum mxl5007t_chip_version chip_id;
struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];
struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
enum mxl5007t_if_freq if_freq;
u32 frequency;
u32 bandwidth;
};
/* ------------------------------------------------------------------------- */
/* called by _init and _rftun to manipulate the register arrays */
static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
{
unsigned int i = 0;
while (reg_pair[i].reg || reg_pair[i].val) {
if (reg_pair[i].reg == reg) {
reg_pair[i].val &= ~mask;
reg_pair[i].val |= val;
}
i++;
}
}
static void copy_reg_bits(struct reg_pair_t *reg_pair1,
struct reg_pair_t *reg_pair2)
{
unsigned int i, j;
i = j = 0;
while (reg_pair1[i].reg || reg_pair1[i].val) {
while (reg_pair2[j].reg || reg_pair2[j].val) {
if (reg_pair1[i].reg != reg_pair2[j].reg) {
j++;
continue;
}
reg_pair2[j].val = reg_pair1[i].val;
break;
}
i++;
}
}
/* ------------------------------------------------------------------------- */
static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
enum mxl5007t_mode mode,
s32 if_diff_out_level)
{
switch (mode) {
case MxL_MODE_ATSC:
set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
break;
case MxL_MODE_DVBT:
set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
break;
case MxL_MODE_ISDBT:
set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
break;
case MxL_MODE_CABLE:
set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
8 - if_diff_out_level);
set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
break;
default:
mxl_fail(-EINVAL);
}
}
static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
enum mxl5007t_if_freq if_freq,
int invert_if)
{
u8 val;
switch (if_freq) {
case MxL_IF_4_MHZ:
val = 0x00;
break;
case MxL_IF_4_5_MHZ:
val = 0x02;
break;
case MxL_IF_4_57_MHZ:
val = 0x03;
break;
case MxL_IF_5_MHZ:
val = 0x04;
break;
case MxL_IF_5_38_MHZ:
val = 0x05;
break;
case MxL_IF_6_MHZ:
val = 0x06;
break;
case MxL_IF_6_28_MHZ:
val = 0x07;
break;
case MxL_IF_9_1915_MHZ:
val = 0x08;
break;
case MxL_IF_35_25_MHZ:
val = 0x09;
break;
case MxL_IF_36_15_MHZ:
val = 0x0a;
break;
case MxL_IF_44_MHZ:
val = 0x0b;
break;
default:
mxl_fail(-EINVAL);
return;
}
set_reg_bits(state->tab_init, 0x02, 0x0f, val);
/* set inverted IF or normal IF */
set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
state->if_freq = if_freq;
}
static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
enum mxl5007t_xtal_freq xtal_freq)
{
switch (xtal_freq) {
case MxL_XTAL_16_MHZ:
/* select xtal freq & ref freq */
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
break;
case MxL_XTAL_20_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
break;
case MxL_XTAL_20_25_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
break;
case MxL_XTAL_20_48_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
break;
case MxL_XTAL_24_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
break;
case MxL_XTAL_25_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
break;
case MxL_XTAL_25_14_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
break;
case MxL_XTAL_27_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
break;
case MxL_XTAL_28_8_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
break;
case MxL_XTAL_32_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
break;
case MxL_XTAL_40_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
break;
case MxL_XTAL_44_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
break;
case MxL_XTAL_48_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
break;
case MxL_XTAL_49_3811_MHZ:
set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
break;
default:
mxl_fail(-EINVAL);
return;
}
}
static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
enum mxl5007t_mode mode)
{
struct mxl5007t_config *cfg = state->config;
memcpy(&state->tab_init, &init_tab, sizeof(init_tab));
memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));
mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
if (mode >= MxL_MODE_CABLE) {
copy_reg_bits(state->tab_init, state->tab_init_cable);
return state->tab_init_cable;
} else
return state->tab_init;
}
/* ------------------------------------------------------------------------- */
enum mxl5007t_bw_mhz {
MxL_BW_6MHz = 6,
MxL_BW_7MHz = 7,
MxL_BW_8MHz = 8,
};
static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
enum mxl5007t_bw_mhz bw)
{
u8 val;
switch (bw) {
case MxL_BW_6MHz:
val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
* and DIG_MODEINDEX_CSF */
break;
case MxL_BW_7MHz:
val = 0x2a;
break;
case MxL_BW_8MHz:
val = 0x3f;
break;
default:
mxl_fail(-EINVAL);
return;
}
set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
}
static struct
reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
u32 rf_freq, enum mxl5007t_bw_mhz bw)
{
u32 dig_rf_freq = 0;
u32 temp;
u32 frac_divider = 1000000;
unsigned int i;
memcpy(&state->tab_rftune, ®_pair_rftune, sizeof(reg_pair_rftune));
mxl5007t_set_bw_bits(state, bw);
/* Convert RF frequency into 16 bits =>
* 10 bit integer (MHz) + 6 bit fraction */
dig_rf_freq = rf_freq / MHz;
temp = rf_freq % MHz;
for (i = 0; i < 6; i++) {
dig_rf_freq <<= 1;
frac_divider /= 2;
if (temp > frac_divider) {
temp -= frac_divider;
dig_rf_freq++;
}
}
/* add to have shift center point by 7.8124 kHz */
if (temp > 7812)
dig_rf_freq++;
set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
if (rf_freq >= 333000000)
set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
return state->tab_rftune;
}
/* ------------------------------------------------------------------------- */
static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
{
u8 buf[] = { reg, val };
struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
.buf = buf, .len = 2 };
int ret;
ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
if (ret != 1) {
mxl_err("failed!");
return -EREMOTEIO;
}
return 0;
}
static int mxl5007t_write_regs(struct mxl5007t_state *state,
struct reg_pair_t *reg_pair)
{
unsigned int i = 0;
int ret = 0;
while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
ret = mxl5007t_write_reg(state,
reg_pair[i].reg, reg_pair[i].val);
i++;
}
return ret;
}
static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
{
u8 buf[2] = { 0xfb, reg };
struct i2c_msg msg[] = {
{ .addr = state->i2c_props.addr, .flags = 0,
.buf = buf, .len = 2 },
{ .addr = state->i2c_props.addr, .flags = I2C_M_RD,
.buf = val, .len = 1 },
};
int ret;
ret = i2c_transfer(state->i2c_props.adap, msg, 2);
if (ret != 2) {
mxl_err("failed!");
return -EREMOTEIO;
}
return 0;
}
static int mxl5007t_soft_reset(struct mxl5007t_state *state)
{
u8 d = 0xff;
struct i2c_msg msg = {
.addr = state->i2c_props.addr, .flags = 0,
.buf = &d, .len = 1
};
int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
if (ret != 1) {
mxl_err("failed!");
return -EREMOTEIO;
}
return 0;
}
static int mxl5007t_tuner_init(struct mxl5007t_state *state,
enum mxl5007t_mode mode)
{
struct reg_pair_t *init_regs;
int ret;
/* calculate initialization reg array */
init_regs = mxl5007t_calc_init_regs(state, mode);
ret = mxl5007t_write_regs(state, init_regs);
if (mxl_fail(ret))
goto fail;
mdelay(1);
fail:
return ret;
}
static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
enum mxl5007t_bw_mhz bw)
{
struct reg_pair_t *rf_tune_regs;
int ret;
/* calculate channel change reg array */
rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
ret = mxl5007t_write_regs(state, rf_tune_regs);
if (mxl_fail(ret))
goto fail;
msleep(3);
fail:
return ret;
}
/* ------------------------------------------------------------------------- */
static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
int *rf_locked, int *ref_locked)
{
u8 d;
int ret;
*rf_locked = 0;
*ref_locked = 0;
ret = mxl5007t_read_reg(state, 0xd8, &d);
if (mxl_fail(ret))
goto fail;
if ((d & 0x0c) == 0x0c)
*rf_locked = 1;
if ((d & 0x03) == 0x03)
*ref_locked = 1;
fail:
return ret;
}
/* ------------------------------------------------------------------------- */
static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)
{
struct mxl5007t_state *state = fe->tuner_priv;
int rf_locked, ref_locked, ret;
*status = 0;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);
if (mxl_fail(ret))
goto fail;
mxl_debug("%s%s", rf_locked ? "rf locked " : "",
ref_locked ? "ref locked" : "");
if ((rf_locked) || (ref_locked))
*status |= TUNER_STATUS_LOCKED;
fail:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
return ret;
}
/* ------------------------------------------------------------------------- */
static int mxl5007t_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 delsys = c->delivery_system;
struct mxl5007t_state *state = fe->tuner_priv;
enum mxl5007t_bw_mhz bw;
enum mxl5007t_mode mode;
int ret;
u32 freq = c->frequency;
switch (delsys) {
case SYS_ATSC:
mode = MxL_MODE_ATSC;
bw = MxL_BW_6MHz;
break;
case SYS_DVBC_ANNEX_B:
mode = MxL_MODE_CABLE;
bw = MxL_BW_6MHz;
break;
case SYS_DVBT:
case SYS_DVBT2:
mode = MxL_MODE_DVBT;
switch (c->bandwidth_hz) {
case 6000000:
bw = MxL_BW_6MHz;
break;
case 7000000:
bw = MxL_BW_7MHz;
break;
case 8000000:
bw = MxL_BW_8MHz;
break;
default:
return -EINVAL;
}
break;
default:
mxl_err("modulation type not supported!");
return -EINVAL;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
mutex_lock(&state->lock);
ret = mxl5007t_tuner_init(state, mode);
if (mxl_fail(ret))
goto fail;
ret = mxl5007t_tuner_rf_tune(state, freq, bw);
if (mxl_fail(ret))
goto fail;
state->frequency = freq;
state->bandwidth = c->bandwidth_hz;
fail:
mutex_unlock(&state->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
return ret;
}
/* ------------------------------------------------------------------------- */
static int mxl5007t_init(struct dvb_frontend *fe)
{
struct mxl5007t_state *state = fe->tuner_priv;
int ret;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
/* wake from standby */
ret = mxl5007t_write_reg(state, 0x01, 0x01);
mxl_fail(ret);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
return ret;
}
static int mxl5007t_sleep(struct dvb_frontend *fe)
{
struct mxl5007t_state *state = fe->tuner_priv;
int ret;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
/* enter standby mode */
ret = mxl5007t_write_reg(state, 0x01, 0x00);
mxl_fail(ret);
ret = mxl5007t_write_reg(state, 0x0f, 0x00);
mxl_fail(ret);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
return ret;
}
/* ------------------------------------------------------------------------- */
static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct mxl5007t_state *state = fe->tuner_priv;
*frequency = state->frequency;
return 0;
}
static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct mxl5007t_state *state = fe->tuner_priv;
*bandwidth = state->bandwidth;
return 0;
}
static int mxl5007t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct mxl5007t_state *state = fe->tuner_priv;
*frequency = 0;
switch (state->if_freq) {
case MxL_IF_4_MHZ:
*frequency = 4000000;
break;
case MxL_IF_4_5_MHZ:
*frequency = 4500000;
break;
case MxL_IF_4_57_MHZ:
*frequency = 4570000;
break;
case MxL_IF_5_MHZ:
*frequency = 5000000;
break;
case MxL_IF_5_38_MHZ:
*frequency = 5380000;
break;
case MxL_IF_6_MHZ:
*frequency = 6000000;
break;
case MxL_IF_6_28_MHZ:
*frequency = 6280000;
break;
case MxL_IF_9_1915_MHZ:
*frequency = 9191500;
break;
case MxL_IF_35_25_MHZ:
*frequency = 35250000;
break;
case MxL_IF_36_15_MHZ:
*frequency = 36150000;
break;
case MxL_IF_44_MHZ:
*frequency = 44000000;
break;
}
return 0;
}
static void mxl5007t_release(struct dvb_frontend *fe)
{
struct mxl5007t_state *state = fe->tuner_priv;
mutex_lock(&mxl5007t_list_mutex);
if (state)
hybrid_tuner_release_state(state);
mutex_unlock(&mxl5007t_list_mutex);
fe->tuner_priv = NULL;
}
/* ------------------------------------------------------------------------- */
static const struct dvb_tuner_ops mxl5007t_tuner_ops = {
.info = {
.name = "MaxLinear MxL5007T",
},
.init = mxl5007t_init,
.sleep = mxl5007t_sleep,
.set_params = mxl5007t_set_params,
.get_status = mxl5007t_get_status,
.get_frequency = mxl5007t_get_frequency,
.get_bandwidth = mxl5007t_get_bandwidth,
.release = mxl5007t_release,
.get_if_frequency = mxl5007t_get_if_frequency,
};
static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
{
char *name;
int ret;
u8 id;
ret = mxl5007t_read_reg(state, 0xd9, &id);
if (mxl_fail(ret))
goto fail;
switch (id) {
case MxL_5007_V1_F1:
name = "MxL5007.v1.f1";
break;
case MxL_5007_V1_F2:
name = "MxL5007.v1.f2";
break;
case MxL_5007_V2_100_F1:
name = "MxL5007.v2.100.f1";
break;
case MxL_5007_V2_100_F2:
name = "MxL5007.v2.100.f2";
break;
case MxL_5007_V2_200_F1:
name = "MxL5007.v2.200.f1";
break;
case MxL_5007_V2_200_F2:
name = "MxL5007.v2.200.f2";
break;
case MxL_5007_V4:
name = "MxL5007T.v4";
break;
default:
name = "MxL5007T";
printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
id = MxL_UNKNOWN_ID;
}
state->chip_id = id;
mxl_info("%s detected @ %d-%04x", name,
i2c_adapter_id(state->i2c_props.adap),
state->i2c_props.addr);
return 0;
fail:
mxl_warn("unable to identify device @ %d-%04x",
i2c_adapter_id(state->i2c_props.adap),
state->i2c_props.addr);
state->chip_id = MxL_UNKNOWN_ID;
return ret;
}
struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c, u8 addr,
struct mxl5007t_config *cfg)
{
struct mxl5007t_state *state = NULL;
int instance, ret;
mutex_lock(&mxl5007t_list_mutex);
instance = hybrid_tuner_request_state(struct mxl5007t_state, state,
hybrid_tuner_instance_list,
i2c, addr, "mxl5007t");
switch (instance) {
case 0:
goto fail;
case 1:
/* new tuner instance */
state->config = cfg;
mutex_init(&state->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = mxl5007t_get_chip_id(state);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
/* check return value of mxl5007t_get_chip_id */
if (mxl_fail(ret))
goto fail;
break;
default:
/* existing tuner instance */
break;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = mxl5007t_soft_reset(state);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (mxl_fail(ret))
goto fail;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = mxl5007t_write_reg(state, 0x04,
state->config->loop_thru_enable);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (mxl_fail(ret))
goto fail;
fe->tuner_priv = state;
mutex_unlock(&mxl5007t_list_mutex);
memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,
sizeof(struct dvb_tuner_ops));
return fe;
fail:
mutex_unlock(&mxl5007t_list_mutex);
mxl5007t_release(fe);
return NULL;
}
EXPORT_SYMBOL_GPL(mxl5007t_attach);
MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
MODULE_AUTHOR("Michael Krufky <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_VERSION("0.2");
| linux-master | drivers/media/tuners/mxl5007t.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
*
* i2c tv tuner chip device type database.
*
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <media/tuner.h>
#include <media/tuner-types.h>
/* ---------------------------------------------------------------------- */
/*
* The floats in the tuner struct are computed at compile time
* by gcc and cast back to integers. Thus we don't violate the
* "no float in kernel" rule.
*
* A tuner_range may be referenced by multiple tuner_params structs.
* There are many duplicates in here. Reusing tuner_range structs,
* rather than defining new ones for each tuner, will cut down on
* memory usage, and is preferred when possible.
*
* Each tuner_params array may contain one or more elements, one
* for each video standard.
*
* FIXME: tuner_params struct contains an element, tda988x. We must
* set this for all tuners that contain a tda988x chip, and then we
* can remove this setting from the various card structs.
*
* FIXME: Right now, all tuners are using the first tuner_params[]
* array element for analog mode. In the future, we will be merging
* similar tuner definitions together, such that each tuner definition
* will have a tuner_params struct for each available video standard.
* At that point, the tuner_params[] array element will be chosen
* based on the video standard in use.
*/
/* The following was taken from dvb-pll.c: */
/* Set AGC TOP value to 103 dBuV:
* 0x80 = Control Byte
* 0x40 = 250 uA charge pump (irrelevant)
* 0x18 = Aux Byte to follow
* 0x06 = 64.5 kHz divider (irrelevant)
* 0x01 = Disable Vt (aka sleep)
*
* 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA)
* 0x50 = AGC Take over point = 103 dBuV
*/
static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 };
/* 0x04 = 166.67 kHz divider
*
* 0x80 = AGC Time constant 50ms Iagc = 9 uA
* 0x20 = AGC Take over point = 112 dBuV
*/
static u8 tua603x_agc112[] = { 2, 0x80|0x40|0x18|0x04|0x01, 0x80|0x20 };
/* 0-9 */
/* ------------ TUNER_TEMIC_PAL - TEMIC PAL ------------ */
static struct tuner_range tuner_temic_pal_ranges[] = {
{ 16 * 140.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 463.25 /*MHz*/, 0x8e, 0x04, },
{ 16 * 999.99 , 0x8e, 0x01, },
};
static struct tuner_params tuner_temic_pal_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_pal_ranges),
},
};
/* ------------ TUNER_PHILIPS_PAL_I - Philips PAL_I ------------ */
static struct tuner_range tuner_philips_pal_i_ranges[] = {
{ 16 * 140.25 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 463.25 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_philips_pal_i_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_philips_pal_i_ranges,
.count = ARRAY_SIZE(tuner_philips_pal_i_ranges),
},
};
/* ------------ TUNER_PHILIPS_NTSC - Philips NTSC ------------ */
static struct tuner_range tuner_philips_ntsc_ranges[] = {
{ 16 * 157.25 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 451.25 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_philips_ntsc_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_philips_ntsc_ranges,
.count = ARRAY_SIZE(tuner_philips_ntsc_ranges),
.cb_first_if_lower_freq = 1,
},
};
/* ------------ TUNER_PHILIPS_SECAM - Philips SECAM ------------ */
static struct tuner_range tuner_philips_secam_ranges[] = {
{ 16 * 168.25 /*MHz*/, 0x8e, 0xa7, },
{ 16 * 447.25 /*MHz*/, 0x8e, 0x97, },
{ 16 * 999.99 , 0x8e, 0x37, },
};
static struct tuner_params tuner_philips_secam_params[] = {
{
.type = TUNER_PARAM_TYPE_SECAM,
.ranges = tuner_philips_secam_ranges,
.count = ARRAY_SIZE(tuner_philips_secam_ranges),
.cb_first_if_lower_freq = 1,
},
};
/* ------------ TUNER_PHILIPS_PAL - Philips PAL ------------ */
static struct tuner_range tuner_philips_pal_ranges[] = {
{ 16 * 168.25 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 447.25 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_philips_pal_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_philips_pal_ranges,
.count = ARRAY_SIZE(tuner_philips_pal_ranges),
.cb_first_if_lower_freq = 1,
},
};
/* ------------ TUNER_TEMIC_NTSC - TEMIC NTSC ------------ */
static struct tuner_range tuner_temic_ntsc_ranges[] = {
{ 16 * 157.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 463.25 /*MHz*/, 0x8e, 0x04, },
{ 16 * 999.99 , 0x8e, 0x01, },
};
static struct tuner_params tuner_temic_ntsc_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_temic_ntsc_ranges,
.count = ARRAY_SIZE(tuner_temic_ntsc_ranges),
},
};
/* ------------ TUNER_TEMIC_PAL_I - TEMIC PAL_I ------------ */
static struct tuner_range tuner_temic_pal_i_ranges[] = {
{ 16 * 170.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 450.00 /*MHz*/, 0x8e, 0x04, },
{ 16 * 999.99 , 0x8e, 0x01, },
};
static struct tuner_params tuner_temic_pal_i_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_pal_i_ranges,
.count = ARRAY_SIZE(tuner_temic_pal_i_ranges),
},
};
/* ------------ TUNER_TEMIC_4036FY5_NTSC - TEMIC NTSC ------------ */
static struct tuner_range tuner_temic_4036fy5_ntsc_ranges[] = {
{ 16 * 157.25 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 463.25 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_temic_4036fy5_ntsc_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_temic_4036fy5_ntsc_ranges,
.count = ARRAY_SIZE(tuner_temic_4036fy5_ntsc_ranges),
},
};
/* ------------ TUNER_ALPS_TSBH1_NTSC - TEMIC NTSC ------------ */
static struct tuner_range tuner_alps_tsb_1_ranges[] = {
{ 16 * 137.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 385.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_alps_tsbh1_ntsc_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_alps_tsb_1_ranges,
.count = ARRAY_SIZE(tuner_alps_tsb_1_ranges),
},
};
/* 10-19 */
/* ------------ TUNER_ALPS_TSBE1_PAL - TEMIC PAL ------------ */
static struct tuner_params tuner_alps_tsb_1_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_alps_tsb_1_ranges,
.count = ARRAY_SIZE(tuner_alps_tsb_1_ranges),
},
};
/* ------------ TUNER_ALPS_TSBB5_PAL_I - Alps PAL_I ------------ */
static struct tuner_range tuner_alps_tsb_5_pal_ranges[] = {
{ 16 * 133.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 351.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_alps_tsbb5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_alps_tsb_5_pal_ranges,
.count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges),
},
};
/* ------------ TUNER_ALPS_TSBE5_PAL - Alps PAL ------------ */
static struct tuner_params tuner_alps_tsbe5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_alps_tsb_5_pal_ranges,
.count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges),
},
};
/* ------------ TUNER_ALPS_TSBC5_PAL - Alps PAL ------------ */
static struct tuner_params tuner_alps_tsbc5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_alps_tsb_5_pal_ranges,
.count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges),
},
};
/* ------------ TUNER_TEMIC_4006FH5_PAL - TEMIC PAL ------------ */
static struct tuner_range tuner_lg_pal_ranges[] = {
{ 16 * 170.00 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 450.00 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_temic_4006fh5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_pal_ranges,
.count = ARRAY_SIZE(tuner_lg_pal_ranges),
},
};
/* ------------ TUNER_ALPS_TSHC6_NTSC - Alps NTSC ------------ */
static struct tuner_range tuner_alps_tshc6_ntsc_ranges[] = {
{ 16 * 137.25 /*MHz*/, 0x8e, 0x14, },
{ 16 * 385.25 /*MHz*/, 0x8e, 0x12, },
{ 16 * 999.99 , 0x8e, 0x11, },
};
static struct tuner_params tuner_alps_tshc6_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_alps_tshc6_ntsc_ranges,
.count = ARRAY_SIZE(tuner_alps_tshc6_ntsc_ranges),
},
};
/* ------------ TUNER_TEMIC_PAL_DK - TEMIC PAL ------------ */
static struct tuner_range tuner_temic_pal_dk_ranges[] = {
{ 16 * 168.25 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 456.25 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_temic_pal_dk_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_pal_dk_ranges,
.count = ARRAY_SIZE(tuner_temic_pal_dk_ranges),
},
};
/* ------------ TUNER_PHILIPS_NTSC_M - Philips NTSC ------------ */
static struct tuner_range tuner_philips_ntsc_m_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 454.00 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_philips_ntsc_m_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_philips_ntsc_m_ranges,
.count = ARRAY_SIZE(tuner_philips_ntsc_m_ranges),
},
};
/* ------------ TUNER_TEMIC_4066FY5_PAL_I - TEMIC PAL_I ------------ */
static struct tuner_range tuner_temic_40x6f_5_pal_ranges[] = {
{ 16 * 169.00 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 454.00 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_temic_4066fy5_pal_i_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_40x6f_5_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_40x6f_5_pal_ranges),
},
};
/* ------------ TUNER_TEMIC_4006FN5_MULTI_PAL - TEMIC PAL ------------ */
static struct tuner_params tuner_temic_4006fn5_multi_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_40x6f_5_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_40x6f_5_pal_ranges),
},
};
/* 20-29 */
/* ------------ TUNER_TEMIC_4009FR5_PAL - TEMIC PAL ------------ */
static struct tuner_range tuner_temic_4009f_5_pal_ranges[] = {
{ 16 * 141.00 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 464.00 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_temic_4009f_5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_4009f_5_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
},
};
/* ------------ TUNER_TEMIC_4039FR5_NTSC - TEMIC NTSC ------------ */
static struct tuner_range tuner_temic_4x3x_f_5_ntsc_ranges[] = {
{ 16 * 158.00 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 453.00 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_temic_4039fr5_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_temic_4x3x_f_5_ntsc_ranges,
.count = ARRAY_SIZE(tuner_temic_4x3x_f_5_ntsc_ranges),
},
};
/* ------------ TUNER_TEMIC_4046FM5 - TEMIC PAL ------------ */
static struct tuner_params tuner_temic_4046fm5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_40x6f_5_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_40x6f_5_pal_ranges),
},
};
/* ------------ TUNER_PHILIPS_PAL_DK - Philips PAL ------------ */
static struct tuner_params tuner_philips_pal_dk_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_pal_ranges,
.count = ARRAY_SIZE(tuner_lg_pal_ranges),
},
};
/* ------------ TUNER_PHILIPS_FQ1216ME - Philips PAL ------------ */
static struct tuner_params tuner_philips_fq1216me_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_pal_ranges,
.count = ARRAY_SIZE(tuner_lg_pal_ranges),
.has_tda9887 = 1,
.port1_active = 1,
.port2_active = 1,
.port2_invert_for_secam_lc = 1,
},
};
/* ------------ TUNER_LG_PAL_I_FM - LGINNOTEK PAL_I ------------ */
static struct tuner_params tuner_lg_pal_i_fm_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_pal_ranges,
.count = ARRAY_SIZE(tuner_lg_pal_ranges),
},
};
/* ------------ TUNER_LG_PAL_I - LGINNOTEK PAL_I ------------ */
static struct tuner_params tuner_lg_pal_i_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_pal_ranges,
.count = ARRAY_SIZE(tuner_lg_pal_ranges),
},
};
/* ------------ TUNER_LG_NTSC_FM - LGINNOTEK NTSC ------------ */
static struct tuner_range tuner_lg_ntsc_fm_ranges[] = {
{ 16 * 210.00 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 497.00 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_lg_ntsc_fm_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_lg_ntsc_fm_ranges,
.count = ARRAY_SIZE(tuner_lg_ntsc_fm_ranges),
},
};
/* ------------ TUNER_LG_PAL_FM - LGINNOTEK PAL ------------ */
static struct tuner_params tuner_lg_pal_fm_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_pal_ranges,
.count = ARRAY_SIZE(tuner_lg_pal_ranges),
},
};
/* ------------ TUNER_LG_PAL - LGINNOTEK PAL ------------ */
static struct tuner_params tuner_lg_pal_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_pal_ranges,
.count = ARRAY_SIZE(tuner_lg_pal_ranges),
},
};
/* 30-39 */
/* ------------ TUNER_TEMIC_4009FN5_MULTI_PAL_FM - TEMIC PAL ------------ */
static struct tuner_params tuner_temic_4009_fn5_multi_pal_fm_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_4009f_5_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
},
};
/* ------------ TUNER_SHARP_2U5JF5540_NTSC - SHARP NTSC ------------ */
static struct tuner_range tuner_sharp_2u5jf5540_ntsc_ranges[] = {
{ 16 * 137.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 317.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_sharp_2u5jf5540_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_sharp_2u5jf5540_ntsc_ranges,
.count = ARRAY_SIZE(tuner_sharp_2u5jf5540_ntsc_ranges),
},
};
/* ------------ TUNER_Samsung_PAL_TCPM9091PD27 - Samsung PAL ------------ */
static struct tuner_range tuner_samsung_pal_tcpm9091pd27_ranges[] = {
{ 16 * 169 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 464 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_samsung_pal_tcpm9091pd27_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_samsung_pal_tcpm9091pd27_ranges,
.count = ARRAY_SIZE(tuner_samsung_pal_tcpm9091pd27_ranges),
},
};
/* ------------ TUNER_TEMIC_4106FH5 - TEMIC PAL ------------ */
static struct tuner_params tuner_temic_4106fh5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_4009f_5_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
},
};
/* ------------ TUNER_TEMIC_4012FY5 - TEMIC PAL ------------ */
static struct tuner_params tuner_temic_4012fy5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_pal_ranges),
},
};
/* ------------ TUNER_TEMIC_4136FY5 - TEMIC NTSC ------------ */
static struct tuner_params tuner_temic_4136_fy5_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_temic_4x3x_f_5_ntsc_ranges,
.count = ARRAY_SIZE(tuner_temic_4x3x_f_5_ntsc_ranges),
},
};
/* ------------ TUNER_LG_PAL_NEW_TAPC - LGINNOTEK PAL ------------ */
static struct tuner_range tuner_lg_new_tapc_ranges[] = {
{ 16 * 170.00 /*MHz*/, 0x8e, 0x01, },
{ 16 * 450.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_lg_pal_new_tapc_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_new_tapc_ranges,
.count = ARRAY_SIZE(tuner_lg_new_tapc_ranges),
},
};
/* ------------ TUNER_PHILIPS_FM1216ME_MK3 - Philips PAL ------------ */
static struct tuner_range tuner_fm1216me_mk3_pal_ranges[] = {
{ 16 * 158.00 /*MHz*/, 0x8e, 0x01, },
{ 16 * 442.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x04, },
};
static struct tuner_params tuner_fm1216me_mk3_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_fm1216me_mk3_pal_ranges,
.count = ARRAY_SIZE(tuner_fm1216me_mk3_pal_ranges),
.cb_first_if_lower_freq = 1,
.has_tda9887 = 1,
.port1_active = 1,
.port2_active = 1,
.port2_invert_for_secam_lc = 1,
.port1_fm_high_sensitivity = 1,
.default_top_mid = -2,
.default_top_secam_mid = -2,
.default_top_secam_high = -2,
},
};
/* ------------ TUNER_PHILIPS_FM1216MK5 - Philips PAL ------------ */
static struct tuner_range tuner_fm1216mk5_pal_ranges[] = {
{ 16 * 158.00 /*MHz*/, 0xce, 0x01, },
{ 16 * 441.00 /*MHz*/, 0xce, 0x02, },
{ 16 * 864.00 , 0xce, 0x04, },
};
static struct tuner_params tuner_fm1216mk5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_fm1216mk5_pal_ranges,
.count = ARRAY_SIZE(tuner_fm1216mk5_pal_ranges),
.cb_first_if_lower_freq = 1,
.has_tda9887 = 1,
.port1_active = 1,
.port2_active = 1,
.port2_invert_for_secam_lc = 1,
.port1_fm_high_sensitivity = 1,
.default_top_mid = -2,
.default_top_secam_mid = -2,
.default_top_secam_high = -2,
},
};
/* ------------ TUNER_LG_NTSC_NEW_TAPC - LGINNOTEK NTSC ------------ */
static struct tuner_params tuner_lg_ntsc_new_tapc_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_lg_new_tapc_ranges,
.count = ARRAY_SIZE(tuner_lg_new_tapc_ranges),
},
};
/* 40-49 */
/* ------------ TUNER_HITACHI_NTSC - HITACHI NTSC ------------ */
static struct tuner_params tuner_hitachi_ntsc_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_lg_new_tapc_ranges,
.count = ARRAY_SIZE(tuner_lg_new_tapc_ranges),
},
};
/* ------------ TUNER_PHILIPS_PAL_MK - Philips PAL ------------ */
static struct tuner_range tuner_philips_pal_mk_pal_ranges[] = {
{ 16 * 140.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 463.25 /*MHz*/, 0x8e, 0xc2, },
{ 16 * 999.99 , 0x8e, 0xcf, },
};
static struct tuner_params tuner_philips_pal_mk_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_philips_pal_mk_pal_ranges,
.count = ARRAY_SIZE(tuner_philips_pal_mk_pal_ranges),
},
};
/* ---- TUNER_PHILIPS_FCV1236D - Philips FCV1236D (ATSC/NTSC) ---- */
static struct tuner_range tuner_philips_fcv1236d_ntsc_ranges[] = {
{ 16 * 157.25 /*MHz*/, 0x8e, 0xa2, },
{ 16 * 451.25 /*MHz*/, 0x8e, 0x92, },
{ 16 * 999.99 , 0x8e, 0x32, },
};
static struct tuner_range tuner_philips_fcv1236d_atsc_ranges[] = {
{ 16 * 159.00 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 453.00 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_philips_fcv1236d_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_philips_fcv1236d_ntsc_ranges,
.count = ARRAY_SIZE(tuner_philips_fcv1236d_ntsc_ranges),
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_philips_fcv1236d_atsc_ranges,
.count = ARRAY_SIZE(tuner_philips_fcv1236d_atsc_ranges),
.iffreq = 16 * 44.00,
},
};
/* ------------ TUNER_PHILIPS_FM1236_MK3 - Philips NTSC ------------ */
static struct tuner_range tuner_fm1236_mk3_ntsc_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0x8e, 0x01, },
{ 16 * 442.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x04, },
};
static struct tuner_params tuner_fm1236_mk3_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_fm1236_mk3_ntsc_ranges,
.count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
.cb_first_if_lower_freq = 1,
.has_tda9887 = 1,
.port1_active = 1,
.port2_active = 1,
.port1_fm_high_sensitivity = 1,
},
};
/* ------------ TUNER_PHILIPS_4IN1 - Philips NTSC ------------ */
static struct tuner_params tuner_philips_4in1_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_fm1236_mk3_ntsc_ranges,
.count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
},
};
/* ------------ TUNER_MICROTUNE_4049FM5 - Microtune PAL ------------ */
static struct tuner_params tuner_microtune_4049_fm5_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_temic_4009f_5_pal_ranges,
.count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
.has_tda9887 = 1,
.port1_invert_for_secam_lc = 1,
.default_pll_gating_18 = 1,
.fm_gain_normal=1,
.radio_if = 1, /* 33.3 MHz */
},
};
/* ------------ TUNER_PANASONIC_VP27 - Panasonic NTSC ------------ */
static struct tuner_range tuner_panasonic_vp27_ntsc_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0xce, 0x01, },
{ 16 * 454.00 /*MHz*/, 0xce, 0x02, },
{ 16 * 999.99 , 0xce, 0x08, },
};
static struct tuner_params tuner_panasonic_vp27_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_panasonic_vp27_ntsc_ranges,
.count = ARRAY_SIZE(tuner_panasonic_vp27_ntsc_ranges),
.has_tda9887 = 1,
.intercarrier_mode = 1,
.default_top_low = -3,
.default_top_mid = -3,
.default_top_high = -3,
},
};
/* ------------ TUNER_TNF_8831BGFF - Philips PAL ------------ */
static struct tuner_range tuner_tnf_8831bgff_pal_ranges[] = {
{ 16 * 161.25 /*MHz*/, 0x8e, 0xa0, },
{ 16 * 463.25 /*MHz*/, 0x8e, 0x90, },
{ 16 * 999.99 , 0x8e, 0x30, },
};
static struct tuner_params tuner_tnf_8831bgff_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_tnf_8831bgff_pal_ranges,
.count = ARRAY_SIZE(tuner_tnf_8831bgff_pal_ranges),
},
};
/* ------------ TUNER_MICROTUNE_4042FI5 - Microtune NTSC ------------ */
static struct tuner_range tuner_microtune_4042fi5_ntsc_ranges[] = {
{ 16 * 162.00 /*MHz*/, 0x8e, 0xa2, },
{ 16 * 457.00 /*MHz*/, 0x8e, 0x94, },
{ 16 * 999.99 , 0x8e, 0x31, },
};
static struct tuner_range tuner_microtune_4042fi5_atsc_ranges[] = {
{ 16 * 162.00 /*MHz*/, 0x8e, 0xa1, },
{ 16 * 457.00 /*MHz*/, 0x8e, 0x91, },
{ 16 * 999.99 , 0x8e, 0x31, },
};
static struct tuner_params tuner_microtune_4042fi5_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_microtune_4042fi5_ntsc_ranges,
.count = ARRAY_SIZE(tuner_microtune_4042fi5_ntsc_ranges),
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_microtune_4042fi5_atsc_ranges,
.count = ARRAY_SIZE(tuner_microtune_4042fi5_atsc_ranges),
.iffreq = 16 * 44.00 /*MHz*/,
},
};
/* 50-59 */
/* ------------ TUNER_TCL_2002N - TCL NTSC ------------ */
static struct tuner_range tuner_tcl_2002n_ntsc_ranges[] = {
{ 16 * 172.00 /*MHz*/, 0x8e, 0x01, },
{ 16 * 448.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_tcl_2002n_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_tcl_2002n_ntsc_ranges,
.count = ARRAY_SIZE(tuner_tcl_2002n_ntsc_ranges),
.cb_first_if_lower_freq = 1,
},
};
/* ------------ TUNER_PHILIPS_FM1256_IH3 - Philips PAL ------------ */
static struct tuner_params tuner_philips_fm1256_ih3_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_fm1236_mk3_ntsc_ranges,
.count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
.radio_if = 1, /* 33.3 MHz */
},
};
/* ------------ TUNER_THOMSON_DTT7610 - THOMSON ATSC ------------ */
/* single range used for both ntsc and atsc */
static struct tuner_range tuner_thomson_dtt7610_ntsc_ranges[] = {
{ 16 * 157.25 /*MHz*/, 0x8e, 0x39, },
{ 16 * 454.00 /*MHz*/, 0x8e, 0x3a, },
{ 16 * 999.99 , 0x8e, 0x3c, },
};
static struct tuner_params tuner_thomson_dtt7610_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_thomson_dtt7610_ntsc_ranges,
.count = ARRAY_SIZE(tuner_thomson_dtt7610_ntsc_ranges),
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_thomson_dtt7610_ntsc_ranges,
.count = ARRAY_SIZE(tuner_thomson_dtt7610_ntsc_ranges),
.iffreq = 16 * 44.00 /*MHz*/,
},
};
/* ------------ TUNER_PHILIPS_FQ1286 - Philips NTSC ------------ */
static struct tuner_range tuner_philips_fq1286_ntsc_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0x8e, 0x41, },
{ 16 * 454.00 /*MHz*/, 0x8e, 0x42, },
{ 16 * 999.99 , 0x8e, 0x04, },
};
static struct tuner_params tuner_philips_fq1286_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_philips_fq1286_ntsc_ranges,
.count = ARRAY_SIZE(tuner_philips_fq1286_ntsc_ranges),
},
};
/* ------------ TUNER_TCL_2002MB - TCL PAL ------------ */
static struct tuner_range tuner_tcl_2002mb_pal_ranges[] = {
{ 16 * 170.00 /*MHz*/, 0xce, 0x01, },
{ 16 * 450.00 /*MHz*/, 0xce, 0x02, },
{ 16 * 999.99 , 0xce, 0x08, },
};
static struct tuner_params tuner_tcl_2002mb_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_tcl_2002mb_pal_ranges,
.count = ARRAY_SIZE(tuner_tcl_2002mb_pal_ranges),
},
};
/* ------------ TUNER_PHILIPS_FQ1216AME_MK4 - Philips PAL ------------ */
static struct tuner_range tuner_philips_fq12_6a___mk4_pal_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0xce, 0x01, },
{ 16 * 442.00 /*MHz*/, 0xce, 0x02, },
{ 16 * 999.99 , 0xce, 0x04, },
};
static struct tuner_params tuner_philips_fq1216ame_mk4_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_philips_fq12_6a___mk4_pal_ranges,
.count = ARRAY_SIZE(tuner_philips_fq12_6a___mk4_pal_ranges),
.has_tda9887 = 1,
.port1_active = 1,
.port2_invert_for_secam_lc = 1,
.default_top_mid = -2,
.default_top_secam_low = -2,
.default_top_secam_mid = -2,
.default_top_secam_high = -2,
},
};
/* ------------ TUNER_PHILIPS_FQ1236A_MK4 - Philips NTSC ------------ */
static struct tuner_params tuner_philips_fq1236a_mk4_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_fm1236_mk3_ntsc_ranges,
.count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
},
};
/* ------------ TUNER_YMEC_TVF_8531MF - Philips NTSC ------------ */
static struct tuner_params tuner_ymec_tvf_8531mf_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_philips_ntsc_m_ranges,
.count = ARRAY_SIZE(tuner_philips_ntsc_m_ranges),
},
};
/* ------------ TUNER_YMEC_TVF_5533MF - Philips NTSC ------------ */
static struct tuner_range tuner_ymec_tvf_5533mf_ntsc_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0x8e, 0x01, },
{ 16 * 454.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x04, },
};
static struct tuner_params tuner_ymec_tvf_5533mf_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_ymec_tvf_5533mf_ntsc_ranges,
.count = ARRAY_SIZE(tuner_ymec_tvf_5533mf_ntsc_ranges),
},
};
/* 60-69 */
/* ------------ TUNER_THOMSON_DTT761X - THOMSON ATSC ------------ */
/* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
static struct tuner_range tuner_thomson_dtt761x_ntsc_ranges[] = {
{ 16 * 145.25 /*MHz*/, 0x8e, 0x39, },
{ 16 * 415.25 /*MHz*/, 0x8e, 0x3a, },
{ 16 * 999.99 , 0x8e, 0x3c, },
};
static struct tuner_range tuner_thomson_dtt761x_atsc_ranges[] = {
{ 16 * 147.00 /*MHz*/, 0x8e, 0x39, },
{ 16 * 417.00 /*MHz*/, 0x8e, 0x3a, },
{ 16 * 999.99 , 0x8e, 0x3c, },
};
static struct tuner_params tuner_thomson_dtt761x_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_thomson_dtt761x_ntsc_ranges,
.count = ARRAY_SIZE(tuner_thomson_dtt761x_ntsc_ranges),
.has_tda9887 = 1,
.fm_gain_normal = 1,
.radio_if = 2, /* 41.3 MHz */
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_thomson_dtt761x_atsc_ranges,
.count = ARRAY_SIZE(tuner_thomson_dtt761x_atsc_ranges),
.iffreq = 16 * 44.00, /*MHz*/
},
};
/* ------------ TUNER_TENA_9533_DI - Philips PAL ------------ */
static struct tuner_range tuner_tena_9533_di_pal_ranges[] = {
{ 16 * 160.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 464.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x04, },
};
static struct tuner_params tuner_tena_9533_di_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_tena_9533_di_pal_ranges,
.count = ARRAY_SIZE(tuner_tena_9533_di_pal_ranges),
},
};
/* ------------ TUNER_TENA_TNF_5337 - Tena tnf5337MFD STD M/N ------------ */
static struct tuner_range tuner_tena_tnf_5337_ntsc_ranges[] = {
{ 16 * 166.25 /*MHz*/, 0x86, 0x01, },
{ 16 * 466.25 /*MHz*/, 0x86, 0x02, },
{ 16 * 999.99 , 0x86, 0x08, },
};
static struct tuner_params tuner_tena_tnf_5337_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_tena_tnf_5337_ntsc_ranges,
.count = ARRAY_SIZE(tuner_tena_tnf_5337_ntsc_ranges),
},
};
/* ------------ TUNER_PHILIPS_FMD1216ME(X)_MK3 - Philips PAL ------------ */
static struct tuner_range tuner_philips_fmd1216me_mk3_pal_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0x86, 0x51, },
{ 16 * 442.00 /*MHz*/, 0x86, 0x52, },
{ 16 * 999.99 , 0x86, 0x54, },
};
static struct tuner_range tuner_philips_fmd1216me_mk3_dvb_ranges[] = {
{ 16 * 143.87 /*MHz*/, 0xbc, 0x41 },
{ 16 * 158.87 /*MHz*/, 0xf4, 0x41 },
{ 16 * 329.87 /*MHz*/, 0xbc, 0x42 },
{ 16 * 441.87 /*MHz*/, 0xf4, 0x42 },
{ 16 * 625.87 /*MHz*/, 0xbc, 0x44 },
{ 16 * 803.87 /*MHz*/, 0xf4, 0x44 },
{ 16 * 999.99 , 0xfc, 0x44 },
};
static struct tuner_params tuner_philips_fmd1216me_mk3_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_philips_fmd1216me_mk3_pal_ranges,
.count = ARRAY_SIZE(tuner_philips_fmd1216me_mk3_pal_ranges),
.has_tda9887 = 1,
.port1_active = 1,
.port2_active = 1,
.port2_fm_high_sensitivity = 1,
.port2_invert_for_secam_lc = 1,
.port1_set_for_fm_mono = 1,
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_philips_fmd1216me_mk3_dvb_ranges,
.count = ARRAY_SIZE(tuner_philips_fmd1216me_mk3_dvb_ranges),
.iffreq = 16 * 36.125, /*MHz*/
},
};
static struct tuner_params tuner_philips_fmd1216mex_mk3_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_philips_fmd1216me_mk3_pal_ranges,
.count = ARRAY_SIZE(tuner_philips_fmd1216me_mk3_pal_ranges),
.has_tda9887 = 1,
.port1_active = 1,
.port2_active = 1,
.port2_fm_high_sensitivity = 1,
.port2_invert_for_secam_lc = 1,
.port1_set_for_fm_mono = 1,
.radio_if = 1,
.fm_gain_normal = 1,
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_philips_fmd1216me_mk3_dvb_ranges,
.count = ARRAY_SIZE(tuner_philips_fmd1216me_mk3_dvb_ranges),
.iffreq = 16 * 36.125, /*MHz*/
},
};
/* ------ TUNER_LG_TDVS_H06XF - LG INNOTEK / INFINEON ATSC ----- */
static struct tuner_range tuner_tua6034_ntsc_ranges[] = {
{ 16 * 165.00 /*MHz*/, 0x8e, 0x01 },
{ 16 * 450.00 /*MHz*/, 0x8e, 0x02 },
{ 16 * 999.99 , 0x8e, 0x04 },
};
static struct tuner_range tuner_tua6034_atsc_ranges[] = {
{ 16 * 165.00 /*MHz*/, 0xce, 0x01 },
{ 16 * 450.00 /*MHz*/, 0xce, 0x02 },
{ 16 * 999.99 , 0xce, 0x04 },
};
static struct tuner_params tuner_lg_tdvs_h06xf_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_tua6034_ntsc_ranges,
.count = ARRAY_SIZE(tuner_tua6034_ntsc_ranges),
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_tua6034_atsc_ranges,
.count = ARRAY_SIZE(tuner_tua6034_atsc_ranges),
.iffreq = 16 * 44.00,
},
};
/* ------------ TUNER_YMEC_TVF66T5_B_DFF - Philips PAL ------------ */
static struct tuner_range tuner_ymec_tvf66t5_b_dff_pal_ranges[] = {
{ 16 * 160.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 464.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_ymec_tvf66t5_b_dff_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_ymec_tvf66t5_b_dff_pal_ranges,
.count = ARRAY_SIZE(tuner_ymec_tvf66t5_b_dff_pal_ranges),
},
};
/* ------------ TUNER_LG_NTSC_TALN_MINI - LGINNOTEK NTSC ------------ */
static struct tuner_range tuner_lg_taln_ntsc_ranges[] = {
{ 16 * 137.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 373.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_range tuner_lg_taln_pal_secam_ranges[] = {
{ 16 * 150.00 /*MHz*/, 0x8e, 0x01, },
{ 16 * 425.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_lg_taln_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_lg_taln_ntsc_ranges,
.count = ARRAY_SIZE(tuner_lg_taln_ntsc_ranges),
},{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_lg_taln_pal_secam_ranges,
.count = ARRAY_SIZE(tuner_lg_taln_pal_secam_ranges),
},
};
/* ------------ TUNER_PHILIPS_TD1316 - Philips PAL ------------ */
static struct tuner_range tuner_philips_td1316_pal_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0xc8, 0xa1, },
{ 16 * 442.00 /*MHz*/, 0xc8, 0xa2, },
{ 16 * 999.99 , 0xc8, 0xa4, },
};
static struct tuner_range tuner_philips_td1316_dvb_ranges[] = {
{ 16 * 93.834 /*MHz*/, 0xca, 0x60, },
{ 16 * 123.834 /*MHz*/, 0xca, 0xa0, },
{ 16 * 163.834 /*MHz*/, 0xca, 0xc0, },
{ 16 * 253.834 /*MHz*/, 0xca, 0x60, },
{ 16 * 383.834 /*MHz*/, 0xca, 0xa0, },
{ 16 * 443.834 /*MHz*/, 0xca, 0xc0, },
{ 16 * 583.834 /*MHz*/, 0xca, 0x60, },
{ 16 * 793.834 /*MHz*/, 0xca, 0xa0, },
{ 16 * 999.999 , 0xca, 0xe0, },
};
static struct tuner_params tuner_philips_td1316_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_philips_td1316_pal_ranges,
.count = ARRAY_SIZE(tuner_philips_td1316_pal_ranges),
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_philips_td1316_dvb_ranges,
.count = ARRAY_SIZE(tuner_philips_td1316_dvb_ranges),
.iffreq = 16 * 36.166667 /*MHz*/,
},
};
/* ------------ TUNER_PHILIPS_TUV1236D - Philips ATSC ------------ */
static struct tuner_range tuner_tuv1236d_ntsc_ranges[] = {
{ 16 * 157.25 /*MHz*/, 0xce, 0x01, },
{ 16 * 454.00 /*MHz*/, 0xce, 0x02, },
{ 16 * 999.99 , 0xce, 0x04, },
};
static struct tuner_range tuner_tuv1236d_atsc_ranges[] = {
{ 16 * 157.25 /*MHz*/, 0xc6, 0x41, },
{ 16 * 454.00 /*MHz*/, 0xc6, 0x42, },
{ 16 * 999.99 , 0xc6, 0x44, },
};
static struct tuner_params tuner_tuv1236d_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_tuv1236d_ntsc_ranges,
.count = ARRAY_SIZE(tuner_tuv1236d_ntsc_ranges),
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_tuv1236d_atsc_ranges,
.count = ARRAY_SIZE(tuner_tuv1236d_atsc_ranges),
.iffreq = 16 * 44.00,
},
};
/* ------------ TUNER_TNF_xxx5 - Texas Instruments--------- */
/* This is known to work with Tenna TVF58t5-MFF and TVF5835 MFF
* but it is expected to work also with other Tenna/Ymec
* models based on TI SN 761677 chip on both PAL and NTSC
*/
static struct tuner_range tuner_tnf_5335_d_if_pal_ranges[] = {
{ 16 * 168.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 471.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_range tuner_tnf_5335mf_ntsc_ranges[] = {
{ 16 * 169.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 469.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x08, },
};
static struct tuner_params tuner_tnf_5335mf_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_tnf_5335mf_ntsc_ranges,
.count = ARRAY_SIZE(tuner_tnf_5335mf_ntsc_ranges),
},
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_tnf_5335_d_if_pal_ranges,
.count = ARRAY_SIZE(tuner_tnf_5335_d_if_pal_ranges),
},
};
/* 70-79 */
/* ------------ TUNER_SAMSUNG_TCPN_2121P30A - Samsung NTSC ------------ */
/* '+ 4' turns on the Low Noise Amplifier */
static struct tuner_range tuner_samsung_tcpn_2121p30a_ntsc_ranges[] = {
{ 16 * 130.00 /*MHz*/, 0xce, 0x01 + 4, },
{ 16 * 364.50 /*MHz*/, 0xce, 0x02 + 4, },
{ 16 * 999.99 , 0xce, 0x08 + 4, },
};
static struct tuner_params tuner_samsung_tcpn_2121p30a_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_samsung_tcpn_2121p30a_ntsc_ranges,
.count = ARRAY_SIZE(tuner_samsung_tcpn_2121p30a_ntsc_ranges),
},
};
/* ------------ TUNER_THOMSON_FE6600 - DViCO Hybrid PAL ------------ */
static struct tuner_range tuner_thomson_fe6600_pal_ranges[] = {
{ 16 * 160.00 /*MHz*/, 0xfe, 0x11, },
{ 16 * 442.00 /*MHz*/, 0xf6, 0x12, },
{ 16 * 999.99 , 0xf6, 0x18, },
};
static struct tuner_range tuner_thomson_fe6600_dvb_ranges[] = {
{ 16 * 250.00 /*MHz*/, 0xb4, 0x12, },
{ 16 * 455.00 /*MHz*/, 0xfe, 0x11, },
{ 16 * 775.50 /*MHz*/, 0xbc, 0x18, },
{ 16 * 999.99 , 0xf4, 0x18, },
};
static struct tuner_params tuner_thomson_fe6600_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_thomson_fe6600_pal_ranges,
.count = ARRAY_SIZE(tuner_thomson_fe6600_pal_ranges),
},
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_thomson_fe6600_dvb_ranges,
.count = ARRAY_SIZE(tuner_thomson_fe6600_dvb_ranges),
.iffreq = 16 * 36.125 /*MHz*/,
},
};
/* ------------ TUNER_SAMSUNG_TCPG_6121P30A - Samsung PAL ------------ */
/* '+ 4' turns on the Low Noise Amplifier */
static struct tuner_range tuner_samsung_tcpg_6121p30a_pal_ranges[] = {
{ 16 * 146.25 /*MHz*/, 0xce, 0x01 + 4, },
{ 16 * 428.50 /*MHz*/, 0xce, 0x02 + 4, },
{ 16 * 999.99 , 0xce, 0x08 + 4, },
};
static struct tuner_params tuner_samsung_tcpg_6121p30a_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_samsung_tcpg_6121p30a_pal_ranges,
.count = ARRAY_SIZE(tuner_samsung_tcpg_6121p30a_pal_ranges),
.has_tda9887 = 1,
.port1_active = 1,
.port2_active = 1,
.port2_invert_for_secam_lc = 1,
},
};
/* ------------ TUNER_TCL_MF02GIP-5N-E - TCL MF02GIP-5N ------------ */
static struct tuner_range tuner_tcl_mf02gip_5n_ntsc_ranges[] = {
{ 16 * 172.00 /*MHz*/, 0x8e, 0x01, },
{ 16 * 448.00 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x04, },
};
static struct tuner_params tuner_tcl_mf02gip_5n_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_tcl_mf02gip_5n_ntsc_ranges,
.count = ARRAY_SIZE(tuner_tcl_mf02gip_5n_ntsc_ranges),
.cb_first_if_lower_freq = 1,
},
};
/* 80-89 */
/* --------- TUNER_PHILIPS_FQ1216LME_MK3 -- active loopthrough, no FM ------- */
static struct tuner_params tuner_fq1216lme_mk3_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_fm1216me_mk3_pal_ranges,
.count = ARRAY_SIZE(tuner_fm1216me_mk3_pal_ranges),
.cb_first_if_lower_freq = 1, /* not specified, but safe to do */
.has_tda9887 = 1, /* TDA9886 */
.port1_active = 1,
.port2_active = 1,
.port2_invert_for_secam_lc = 1,
.default_top_low = 4,
.default_top_mid = 4,
.default_top_high = 4,
.default_top_secam_low = 4,
.default_top_secam_mid = 4,
.default_top_secam_high = 4,
},
};
/* ----- TUNER_PARTSNIC_PTI_5NF05 - Partsnic (Daewoo) PTI-5NF05 NTSC ----- */
static struct tuner_range tuner_partsnic_pti_5nf05_ranges[] = {
/* The datasheet specified channel ranges and the bandswitch byte */
/* The control byte value of 0x8e is just a guess */
{ 16 * 133.25 /*MHz*/, 0x8e, 0x01, }, /* Channels 2 - B */
{ 16 * 367.25 /*MHz*/, 0x8e, 0x02, }, /* Channels C - W+11 */
{ 16 * 999.99 , 0x8e, 0x08, }, /* Channels W+12 - 69 */
};
static struct tuner_params tuner_partsnic_pti_5nf05_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_partsnic_pti_5nf05_ranges,
.count = ARRAY_SIZE(tuner_partsnic_pti_5nf05_ranges),
.cb_first_if_lower_freq = 1, /* not specified but safe to do */
},
};
/* --------- TUNER_PHILIPS_CU1216L - DVB-C NIM ------------------------- */
static struct tuner_range tuner_cu1216l_ranges[] = {
{ 16 * 160.25 /*MHz*/, 0xce, 0x01 },
{ 16 * 444.25 /*MHz*/, 0xce, 0x02 },
{ 16 * 999.99 , 0xce, 0x04 },
};
static struct tuner_params tuner_philips_cu1216l_params[] = {
{
.type = TUNER_PARAM_TYPE_DIGITAL,
.ranges = tuner_cu1216l_ranges,
.count = ARRAY_SIZE(tuner_cu1216l_ranges),
.iffreq = 16 * 36.125, /*MHz*/
},
};
/* ---------------------- TUNER_SONY_BTF_PXN01Z ------------------------ */
static struct tuner_range tuner_sony_btf_pxn01z_ranges[] = {
{ 16 * 137.25 /*MHz*/, 0x8e, 0x01, },
{ 16 * 367.25 /*MHz*/, 0x8e, 0x02, },
{ 16 * 999.99 , 0x8e, 0x04, },
};
static struct tuner_params tuner_sony_btf_pxn01z_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_sony_btf_pxn01z_ranges,
.count = ARRAY_SIZE(tuner_sony_btf_pxn01z_ranges),
},
};
/* ------------ TUNER_PHILIPS_FQ1236_MK5 - Philips NTSC ------------ */
static struct tuner_params tuner_philips_fq1236_mk5_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_fm1236_mk3_ntsc_ranges,
.count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
.has_tda9887 = 1, /* TDA9885, no FM radio */
},
};
/* --------- Sony BTF-PG472Z PAL/SECAM ------- */
static struct tuner_range tuner_sony_btf_pg472z_ranges[] = {
{ 16 * 144.25 /*MHz*/, 0xc6, 0x01, },
{ 16 * 427.25 /*MHz*/, 0xc6, 0x02, },
{ 16 * 999.99 , 0xc6, 0x04, },
};
static struct tuner_params tuner_sony_btf_pg472z_params[] = {
{
.type = TUNER_PARAM_TYPE_PAL,
.ranges = tuner_sony_btf_pg472z_ranges,
.count = ARRAY_SIZE(tuner_sony_btf_pg472z_ranges),
.has_tda9887 = 1,
.port1_active = 1,
.port2_invert_for_secam_lc = 1,
},
};
/* 90-99 */
/* --------- Sony BTF-PG467Z NTSC-M-JP ------- */
static struct tuner_range tuner_sony_btf_pg467z_ranges[] = {
{ 16 * 220.25 /*MHz*/, 0xc6, 0x01, },
{ 16 * 467.25 /*MHz*/, 0xc6, 0x02, },
{ 16 * 999.99 , 0xc6, 0x04, },
};
static struct tuner_params tuner_sony_btf_pg467z_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_sony_btf_pg467z_ranges,
.count = ARRAY_SIZE(tuner_sony_btf_pg467z_ranges),
},
};
/* --------- Sony BTF-PG463Z NTSC-M ------- */
static struct tuner_range tuner_sony_btf_pg463z_ranges[] = {
{ 16 * 130.25 /*MHz*/, 0xc6, 0x01, },
{ 16 * 364.25 /*MHz*/, 0xc6, 0x02, },
{ 16 * 999.99 , 0xc6, 0x04, },
};
static struct tuner_params tuner_sony_btf_pg463z_params[] = {
{
.type = TUNER_PARAM_TYPE_NTSC,
.ranges = tuner_sony_btf_pg463z_ranges,
.count = ARRAY_SIZE(tuner_sony_btf_pg463z_ranges),
},
};
/* --------------------------------------------------------------------- */
struct tunertype tuners[] = {
/* 0-9 */
[TUNER_TEMIC_PAL] = { /* TEMIC PAL */
.name = "Temic PAL (4002 FH5)",
.params = tuner_temic_pal_params,
.count = ARRAY_SIZE(tuner_temic_pal_params),
},
[TUNER_PHILIPS_PAL_I] = { /* Philips PAL_I */
.name = "Philips PAL_I (FI1246 and compatibles)",
.params = tuner_philips_pal_i_params,
.count = ARRAY_SIZE(tuner_philips_pal_i_params),
},
[TUNER_PHILIPS_NTSC] = { /* Philips NTSC */
.name = "Philips NTSC (FI1236,FM1236 and compatibles)",
.params = tuner_philips_ntsc_params,
.count = ARRAY_SIZE(tuner_philips_ntsc_params),
},
[TUNER_PHILIPS_SECAM] = { /* Philips SECAM */
.name = "Philips (SECAM+PAL_BG) (FI1216MF, FM1216MF, FR1216MF)",
.params = tuner_philips_secam_params,
.count = ARRAY_SIZE(tuner_philips_secam_params),
},
[TUNER_ABSENT] = { /* Tuner Absent */
.name = "NoTuner",
},
[TUNER_PHILIPS_PAL] = { /* Philips PAL */
.name = "Philips PAL_BG (FI1216 and compatibles)",
.params = tuner_philips_pal_params,
.count = ARRAY_SIZE(tuner_philips_pal_params),
},
[TUNER_TEMIC_NTSC] = { /* TEMIC NTSC */
.name = "Temic NTSC (4032 FY5)",
.params = tuner_temic_ntsc_params,
.count = ARRAY_SIZE(tuner_temic_ntsc_params),
},
[TUNER_TEMIC_PAL_I] = { /* TEMIC PAL_I */
.name = "Temic PAL_I (4062 FY5)",
.params = tuner_temic_pal_i_params,
.count = ARRAY_SIZE(tuner_temic_pal_i_params),
},
[TUNER_TEMIC_4036FY5_NTSC] = { /* TEMIC NTSC */
.name = "Temic NTSC (4036 FY5)",
.params = tuner_temic_4036fy5_ntsc_params,
.count = ARRAY_SIZE(tuner_temic_4036fy5_ntsc_params),
},
[TUNER_ALPS_TSBH1_NTSC] = { /* TEMIC NTSC */
.name = "Alps HSBH1",
.params = tuner_alps_tsbh1_ntsc_params,
.count = ARRAY_SIZE(tuner_alps_tsbh1_ntsc_params),
},
/* 10-19 */
[TUNER_ALPS_TSBE1_PAL] = { /* TEMIC PAL */
.name = "Alps TSBE1",
.params = tuner_alps_tsb_1_params,
.count = ARRAY_SIZE(tuner_alps_tsb_1_params),
},
[TUNER_ALPS_TSBB5_PAL_I] = { /* Alps PAL_I */
.name = "Alps TSBB5",
.params = tuner_alps_tsbb5_params,
.count = ARRAY_SIZE(tuner_alps_tsbb5_params),
},
[TUNER_ALPS_TSBE5_PAL] = { /* Alps PAL */
.name = "Alps TSBE5",
.params = tuner_alps_tsbe5_params,
.count = ARRAY_SIZE(tuner_alps_tsbe5_params),
},
[TUNER_ALPS_TSBC5_PAL] = { /* Alps PAL */
.name = "Alps TSBC5",
.params = tuner_alps_tsbc5_params,
.count = ARRAY_SIZE(tuner_alps_tsbc5_params),
},
[TUNER_TEMIC_4006FH5_PAL] = { /* TEMIC PAL */
.name = "Temic PAL_BG (4006FH5)",
.params = tuner_temic_4006fh5_params,
.count = ARRAY_SIZE(tuner_temic_4006fh5_params),
},
[TUNER_ALPS_TSHC6_NTSC] = { /* Alps NTSC */
.name = "Alps TSCH6",
.params = tuner_alps_tshc6_params,
.count = ARRAY_SIZE(tuner_alps_tshc6_params),
},
[TUNER_TEMIC_PAL_DK] = { /* TEMIC PAL */
.name = "Temic PAL_DK (4016 FY5)",
.params = tuner_temic_pal_dk_params,
.count = ARRAY_SIZE(tuner_temic_pal_dk_params),
},
[TUNER_PHILIPS_NTSC_M] = { /* Philips NTSC */
.name = "Philips NTSC_M (MK2)",
.params = tuner_philips_ntsc_m_params,
.count = ARRAY_SIZE(tuner_philips_ntsc_m_params),
},
[TUNER_TEMIC_4066FY5_PAL_I] = { /* TEMIC PAL_I */
.name = "Temic PAL_I (4066 FY5)",
.params = tuner_temic_4066fy5_pal_i_params,
.count = ARRAY_SIZE(tuner_temic_4066fy5_pal_i_params),
},
[TUNER_TEMIC_4006FN5_MULTI_PAL] = { /* TEMIC PAL */
.name = "Temic PAL* auto (4006 FN5)",
.params = tuner_temic_4006fn5_multi_params,
.count = ARRAY_SIZE(tuner_temic_4006fn5_multi_params),
},
/* 20-29 */
[TUNER_TEMIC_4009FR5_PAL] = { /* TEMIC PAL */
.name = "Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5)",
.params = tuner_temic_4009f_5_params,
.count = ARRAY_SIZE(tuner_temic_4009f_5_params),
},
[TUNER_TEMIC_4039FR5_NTSC] = { /* TEMIC NTSC */
.name = "Temic NTSC (4039 FR5)",
.params = tuner_temic_4039fr5_params,
.count = ARRAY_SIZE(tuner_temic_4039fr5_params),
},
[TUNER_TEMIC_4046FM5] = { /* TEMIC PAL */
.name = "Temic PAL/SECAM multi (4046 FM5)",
.params = tuner_temic_4046fm5_params,
.count = ARRAY_SIZE(tuner_temic_4046fm5_params),
},
[TUNER_PHILIPS_PAL_DK] = { /* Philips PAL */
.name = "Philips PAL_DK (FI1256 and compatibles)",
.params = tuner_philips_pal_dk_params,
.count = ARRAY_SIZE(tuner_philips_pal_dk_params),
},
[TUNER_PHILIPS_FQ1216ME] = { /* Philips PAL */
.name = "Philips PAL/SECAM multi (FQ1216ME)",
.params = tuner_philips_fq1216me_params,
.count = ARRAY_SIZE(tuner_philips_fq1216me_params),
},
[TUNER_LG_PAL_I_FM] = { /* LGINNOTEK PAL_I */
.name = "LG PAL_I+FM (TAPC-I001D)",
.params = tuner_lg_pal_i_fm_params,
.count = ARRAY_SIZE(tuner_lg_pal_i_fm_params),
},
[TUNER_LG_PAL_I] = { /* LGINNOTEK PAL_I */
.name = "LG PAL_I (TAPC-I701D)",
.params = tuner_lg_pal_i_params,
.count = ARRAY_SIZE(tuner_lg_pal_i_params),
},
[TUNER_LG_NTSC_FM] = { /* LGINNOTEK NTSC */
.name = "LG NTSC+FM (TPI8NSR01F)",
.params = tuner_lg_ntsc_fm_params,
.count = ARRAY_SIZE(tuner_lg_ntsc_fm_params),
},
[TUNER_LG_PAL_FM] = { /* LGINNOTEK PAL */
.name = "LG PAL_BG+FM (TPI8PSB01D)",
.params = tuner_lg_pal_fm_params,
.count = ARRAY_SIZE(tuner_lg_pal_fm_params),
},
[TUNER_LG_PAL] = { /* LGINNOTEK PAL */
.name = "LG PAL_BG (TPI8PSB11D)",
.params = tuner_lg_pal_params,
.count = ARRAY_SIZE(tuner_lg_pal_params),
},
/* 30-39 */
[TUNER_TEMIC_4009FN5_MULTI_PAL_FM] = { /* TEMIC PAL */
.name = "Temic PAL* auto + FM (4009 FN5)",
.params = tuner_temic_4009_fn5_multi_pal_fm_params,
.count = ARRAY_SIZE(tuner_temic_4009_fn5_multi_pal_fm_params),
},
[TUNER_SHARP_2U5JF5540_NTSC] = { /* SHARP NTSC */
.name = "SHARP NTSC_JP (2U5JF5540)",
.params = tuner_sharp_2u5jf5540_params,
.count = ARRAY_SIZE(tuner_sharp_2u5jf5540_params),
},
[TUNER_Samsung_PAL_TCPM9091PD27] = { /* Samsung PAL */
.name = "Samsung PAL TCPM9091PD27",
.params = tuner_samsung_pal_tcpm9091pd27_params,
.count = ARRAY_SIZE(tuner_samsung_pal_tcpm9091pd27_params),
},
[TUNER_MT2032] = { /* Microtune PAL|NTSC */
.name = "MT20xx universal",
/* see mt20xx.c for details */ },
[TUNER_TEMIC_4106FH5] = { /* TEMIC PAL */
.name = "Temic PAL_BG (4106 FH5)",
.params = tuner_temic_4106fh5_params,
.count = ARRAY_SIZE(tuner_temic_4106fh5_params),
},
[TUNER_TEMIC_4012FY5] = { /* TEMIC PAL */
.name = "Temic PAL_DK/SECAM_L (4012 FY5)",
.params = tuner_temic_4012fy5_params,
.count = ARRAY_SIZE(tuner_temic_4012fy5_params),
},
[TUNER_TEMIC_4136FY5] = { /* TEMIC NTSC */
.name = "Temic NTSC (4136 FY5)",
.params = tuner_temic_4136_fy5_params,
.count = ARRAY_SIZE(tuner_temic_4136_fy5_params),
},
[TUNER_LG_PAL_NEW_TAPC] = { /* LGINNOTEK PAL */
.name = "LG PAL (newer TAPC series)",
.params = tuner_lg_pal_new_tapc_params,
.count = ARRAY_SIZE(tuner_lg_pal_new_tapc_params),
},
[TUNER_PHILIPS_FM1216ME_MK3] = { /* Philips PAL */
.name = "Philips PAL/SECAM multi (FM1216ME MK3)",
.params = tuner_fm1216me_mk3_params,
.count = ARRAY_SIZE(tuner_fm1216me_mk3_params),
},
[TUNER_LG_NTSC_NEW_TAPC] = { /* LGINNOTEK NTSC */
.name = "LG NTSC (newer TAPC series)",
.params = tuner_lg_ntsc_new_tapc_params,
.count = ARRAY_SIZE(tuner_lg_ntsc_new_tapc_params),
},
/* 40-49 */
[TUNER_HITACHI_NTSC] = { /* HITACHI NTSC */
.name = "HITACHI V7-J180AT",
.params = tuner_hitachi_ntsc_params,
.count = ARRAY_SIZE(tuner_hitachi_ntsc_params),
},
[TUNER_PHILIPS_PAL_MK] = { /* Philips PAL */
.name = "Philips PAL_MK (FI1216 MK)",
.params = tuner_philips_pal_mk_params,
.count = ARRAY_SIZE(tuner_philips_pal_mk_params),
},
[TUNER_PHILIPS_FCV1236D] = { /* Philips ATSC */
.name = "Philips FCV1236D ATSC/NTSC dual in",
.params = tuner_philips_fcv1236d_params,
.count = ARRAY_SIZE(tuner_philips_fcv1236d_params),
.min = 16 * 53.00,
.max = 16 * 803.00,
.stepsize = 62500,
},
[TUNER_PHILIPS_FM1236_MK3] = { /* Philips NTSC */
.name = "Philips NTSC MK3 (FM1236MK3 or FM1236/F)",
.params = tuner_fm1236_mk3_params,
.count = ARRAY_SIZE(tuner_fm1236_mk3_params),
},
[TUNER_PHILIPS_4IN1] = { /* Philips NTSC */
.name = "Philips 4 in 1 (ATI TV Wonder Pro/Conexant)",
.params = tuner_philips_4in1_params,
.count = ARRAY_SIZE(tuner_philips_4in1_params),
},
[TUNER_MICROTUNE_4049FM5] = { /* Microtune PAL */
.name = "Microtune 4049 FM5",
.params = tuner_microtune_4049_fm5_params,
.count = ARRAY_SIZE(tuner_microtune_4049_fm5_params),
},
[TUNER_PANASONIC_VP27] = { /* Panasonic NTSC */
.name = "Panasonic VP27s/ENGE4324D",
.params = tuner_panasonic_vp27_params,
.count = ARRAY_SIZE(tuner_panasonic_vp27_params),
},
[TUNER_LG_NTSC_TAPE] = { /* LGINNOTEK NTSC */
.name = "LG NTSC (TAPE series)",
.params = tuner_fm1236_mk3_params,
.count = ARRAY_SIZE(tuner_fm1236_mk3_params),
},
[TUNER_TNF_8831BGFF] = { /* Philips PAL */
.name = "Tenna TNF 8831 BGFF)",
.params = tuner_tnf_8831bgff_params,
.count = ARRAY_SIZE(tuner_tnf_8831bgff_params),
},
[TUNER_MICROTUNE_4042FI5] = { /* Microtune NTSC */
.name = "Microtune 4042 FI5 ATSC/NTSC dual in",
.params = tuner_microtune_4042fi5_params,
.count = ARRAY_SIZE(tuner_microtune_4042fi5_params),
.min = 16 * 57.00,
.max = 16 * 858.00,
.stepsize = 62500,
},
/* 50-59 */
[TUNER_TCL_2002N] = { /* TCL NTSC */
.name = "TCL 2002N",
.params = tuner_tcl_2002n_params,
.count = ARRAY_SIZE(tuner_tcl_2002n_params),
},
[TUNER_PHILIPS_FM1256_IH3] = { /* Philips PAL */
.name = "Philips PAL/SECAM_D (FM 1256 I-H3)",
.params = tuner_philips_fm1256_ih3_params,
.count = ARRAY_SIZE(tuner_philips_fm1256_ih3_params),
},
[TUNER_THOMSON_DTT7610] = { /* THOMSON ATSC */
.name = "Thomson DTT 7610 (ATSC/NTSC)",
.params = tuner_thomson_dtt7610_params,
.count = ARRAY_SIZE(tuner_thomson_dtt7610_params),
.min = 16 * 44.00,
.max = 16 * 958.00,
.stepsize = 62500,
},
[TUNER_PHILIPS_FQ1286] = { /* Philips NTSC */
.name = "Philips FQ1286",
.params = tuner_philips_fq1286_params,
.count = ARRAY_SIZE(tuner_philips_fq1286_params),
},
[TUNER_PHILIPS_TDA8290] = { /* Philips PAL|NTSC */
.name = "Philips/NXP TDA 8290/8295 + 8275/8275A/18271",
/* see tda8290.c for details */ },
[TUNER_TCL_2002MB] = { /* TCL PAL */
.name = "TCL 2002MB",
.params = tuner_tcl_2002mb_params,
.count = ARRAY_SIZE(tuner_tcl_2002mb_params),
},
[TUNER_PHILIPS_FQ1216AME_MK4] = { /* Philips PAL */
.name = "Philips PAL/SECAM multi (FQ1216AME MK4)",
.params = tuner_philips_fq1216ame_mk4_params,
.count = ARRAY_SIZE(tuner_philips_fq1216ame_mk4_params),
},
[TUNER_PHILIPS_FQ1236A_MK4] = { /* Philips NTSC */
.name = "Philips FQ1236A MK4",
.params = tuner_philips_fq1236a_mk4_params,
.count = ARRAY_SIZE(tuner_philips_fq1236a_mk4_params),
},
[TUNER_YMEC_TVF_8531MF] = { /* Philips NTSC */
.name = "Ymec TVision TVF-8531MF/8831MF/8731MF",
.params = tuner_ymec_tvf_8531mf_params,
.count = ARRAY_SIZE(tuner_ymec_tvf_8531mf_params),
},
[TUNER_YMEC_TVF_5533MF] = { /* Philips NTSC */
.name = "Ymec TVision TVF-5533MF",
.params = tuner_ymec_tvf_5533mf_params,
.count = ARRAY_SIZE(tuner_ymec_tvf_5533mf_params),
},
/* 60-69 */
[TUNER_THOMSON_DTT761X] = { /* THOMSON ATSC */
/* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
.name = "Thomson DTT 761X (ATSC/NTSC)",
.params = tuner_thomson_dtt761x_params,
.count = ARRAY_SIZE(tuner_thomson_dtt761x_params),
.min = 16 * 57.00,
.max = 16 * 863.00,
.stepsize = 62500,
.initdata = tua603x_agc103,
},
[TUNER_TENA_9533_DI] = { /* Philips PAL */
.name = "Tena TNF9533-D/IF/TNF9533-B/DF",
.params = tuner_tena_9533_di_params,
.count = ARRAY_SIZE(tuner_tena_9533_di_params),
},
[TUNER_TEA5767] = { /* Philips RADIO */
.name = "Philips TEA5767HN FM Radio",
/* see tea5767.c for details */
},
[TUNER_PHILIPS_FMD1216ME_MK3] = { /* Philips PAL */
.name = "Philips FMD1216ME MK3 Hybrid Tuner",
.params = tuner_philips_fmd1216me_mk3_params,
.count = ARRAY_SIZE(tuner_philips_fmd1216me_mk3_params),
.min = 16 * 50.87,
.max = 16 * 858.00,
.stepsize = 166667,
.initdata = tua603x_agc112,
.sleepdata = (u8[]){ 4, 0x9c, 0x60, 0x85, 0x54 },
},
[TUNER_LG_TDVS_H06XF] = { /* LGINNOTEK ATSC */
.name = "LG TDVS-H06xF", /* H061F, H062F & H064F */
.params = tuner_lg_tdvs_h06xf_params,
.count = ARRAY_SIZE(tuner_lg_tdvs_h06xf_params),
.min = 16 * 54.00,
.max = 16 * 863.00,
.stepsize = 62500,
.initdata = tua603x_agc103,
},
[TUNER_YMEC_TVF66T5_B_DFF] = { /* Philips PAL */
.name = "Ymec TVF66T5-B/DFF",
.params = tuner_ymec_tvf66t5_b_dff_params,
.count = ARRAY_SIZE(tuner_ymec_tvf66t5_b_dff_params),
},
[TUNER_LG_TALN] = { /* LGINNOTEK NTSC / PAL / SECAM */
.name = "LG TALN series",
.params = tuner_lg_taln_params,
.count = ARRAY_SIZE(tuner_lg_taln_params),
},
[TUNER_PHILIPS_TD1316] = { /* Philips PAL */
.name = "Philips TD1316 Hybrid Tuner",
.params = tuner_philips_td1316_params,
.count = ARRAY_SIZE(tuner_philips_td1316_params),
.min = 16 * 87.00,
.max = 16 * 895.00,
.stepsize = 166667,
},
[TUNER_PHILIPS_TUV1236D] = { /* Philips ATSC */
.name = "Philips TUV1236D ATSC/NTSC dual in",
.params = tuner_tuv1236d_params,
.count = ARRAY_SIZE(tuner_tuv1236d_params),
.min = 16 * 54.00,
.max = 16 * 864.00,
.stepsize = 62500,
},
[TUNER_TNF_5335MF] = { /* Tenna PAL/NTSC */
.name = "Tena TNF 5335 and similar models",
.params = tuner_tnf_5335mf_params,
.count = ARRAY_SIZE(tuner_tnf_5335mf_params),
},
/* 70-79 */
[TUNER_SAMSUNG_TCPN_2121P30A] = { /* Samsung NTSC */
.name = "Samsung TCPN 2121P30A",
.params = tuner_samsung_tcpn_2121p30a_params,
.count = ARRAY_SIZE(tuner_samsung_tcpn_2121p30a_params),
},
[TUNER_XC2028] = { /* Xceive 2028 */
.name = "Xceive xc2028/xc3028 tuner",
/* see xc2028.c for details */
},
[TUNER_THOMSON_FE6600] = { /* Thomson PAL / DVB-T */
.name = "Thomson FE6600",
.params = tuner_thomson_fe6600_params,
.count = ARRAY_SIZE(tuner_thomson_fe6600_params),
.min = 16 * 44.25,
.max = 16 * 858.00,
.stepsize = 166667,
},
[TUNER_SAMSUNG_TCPG_6121P30A] = { /* Samsung PAL */
.name = "Samsung TCPG 6121P30A",
.params = tuner_samsung_tcpg_6121p30a_params,
.count = ARRAY_SIZE(tuner_samsung_tcpg_6121p30a_params),
},
[TUNER_TDA9887] = { /* Philips TDA 9887 IF PLL Demodulator.
This chip is part of some modern tuners */
.name = "Philips TDA988[5,6,7] IF PLL Demodulator",
/* see tda9887.c for details */
},
[TUNER_TEA5761] = { /* Philips RADIO */
.name = "Philips TEA5761 FM Radio",
/* see tea5767.c for details */
},
[TUNER_XC5000] = { /* Xceive 5000 */
.name = "Xceive 5000 tuner",
/* see xc5000.c for details */
},
[TUNER_XC4000] = { /* Xceive 4000 */
.name = "Xceive 4000 tuner",
/* see xc4000.c for details */
},
[TUNER_TCL_MF02GIP_5N] = { /* TCL tuner MF02GIP-5N-E */
.name = "TCL tuner MF02GIP-5N-E",
.params = tuner_tcl_mf02gip_5n_params,
.count = ARRAY_SIZE(tuner_tcl_mf02gip_5n_params),
},
[TUNER_PHILIPS_FMD1216MEX_MK3] = { /* Philips PAL */
.name = "Philips FMD1216MEX MK3 Hybrid Tuner",
.params = tuner_philips_fmd1216mex_mk3_params,
.count = ARRAY_SIZE(tuner_philips_fmd1216mex_mk3_params),
.min = 16 * 50.87,
.max = 16 * 858.00,
.stepsize = 166667,
.initdata = tua603x_agc112,
.sleepdata = (u8[]){ 4, 0x9c, 0x60, 0x85, 0x54 },
},
[TUNER_PHILIPS_FM1216MK5] = { /* Philips PAL */
.name = "Philips PAL/SECAM multi (FM1216 MK5)",
.params = tuner_fm1216mk5_params,
.count = ARRAY_SIZE(tuner_fm1216mk5_params),
},
/* 80-89 */
[TUNER_PHILIPS_FQ1216LME_MK3] = { /* PAL/SECAM, Loop-thru, no FM */
.name = "Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough",
.params = tuner_fq1216lme_mk3_params,
.count = ARRAY_SIZE(tuner_fq1216lme_mk3_params),
},
[TUNER_PARTSNIC_PTI_5NF05] = {
.name = "Partsnic (Daewoo) PTI-5NF05",
.params = tuner_partsnic_pti_5nf05_params,
.count = ARRAY_SIZE(tuner_partsnic_pti_5nf05_params),
},
[TUNER_PHILIPS_CU1216L] = {
.name = "Philips CU1216L",
.params = tuner_philips_cu1216l_params,
.count = ARRAY_SIZE(tuner_philips_cu1216l_params),
.stepsize = 62500,
},
[TUNER_NXP_TDA18271] = {
.name = "NXP TDA18271",
/* see tda18271-fe.c for details */
},
[TUNER_SONY_BTF_PXN01Z] = {
.name = "Sony BTF-Pxn01Z",
.params = tuner_sony_btf_pxn01z_params,
.count = ARRAY_SIZE(tuner_sony_btf_pxn01z_params),
},
[TUNER_PHILIPS_FQ1236_MK5] = { /* NTSC, TDA9885, no FM radio */
.name = "Philips FQ1236 MK5",
.params = tuner_philips_fq1236_mk5_params,
.count = ARRAY_SIZE(tuner_philips_fq1236_mk5_params),
},
[TUNER_TENA_TNF_5337] = { /* Tena 5337 MFD */
.name = "Tena TNF5337 MFD",
.params = tuner_tena_tnf_5337_params,
.count = ARRAY_SIZE(tuner_tena_tnf_5337_params),
},
[TUNER_XC5000C] = { /* Xceive 5000C */
.name = "Xceive 5000C tuner",
/* see xc5000.c for details */
},
[TUNER_SONY_BTF_PG472Z] = {
.name = "Sony BTF-PG472Z PAL/SECAM",
.params = tuner_sony_btf_pg472z_params,
.count = ARRAY_SIZE(tuner_sony_btf_pg472z_params),
},
/* 90-99 */
[TUNER_SONY_BTF_PK467Z] = {
.name = "Sony BTF-PK467Z NTSC-M-JP",
.params = tuner_sony_btf_pg467z_params,
.count = ARRAY_SIZE(tuner_sony_btf_pg467z_params),
},
[TUNER_SONY_BTF_PB463Z] = {
.name = "Sony BTF-PB463Z NTSC-M",
.params = tuner_sony_btf_pg463z_params,
.count = ARRAY_SIZE(tuner_sony_btf_pg463z_params),
},
[TUNER_SI2157] = {
.name = "Silicon Labs Si2157 tuner",
/* see si2157.c for details */
},
};
EXPORT_SYMBOL(tuners);
unsigned const int tuner_count = ARRAY_SIZE(tuners);
EXPORT_SYMBOL(tuner_count);
MODULE_DESCRIPTION("Simple tuner device type database");
MODULE_AUTHOR("Ralph Metzler, Gerd Knorr, Gunther Mayer");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tuner-types.c |
// SPDX-License-Identifier: GPL-2.0
// For Philips TEA5767 FM Chip used on some TV Cards like Prolink Pixelview
// I2C address is always 0xC0.
//
// Copyright (c) 2005 Mauro Carvalho Chehab <[email protected]>
//
// tea5767 autodetection thanks to Torsten Seeboth and Atsushi Nakagawa
// from their contributions on DScaler.
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
#include "tuner-i2c.h"
#include "tea5767.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable verbose debug messages");
/*****************************************************************************/
struct tea5767_priv {
struct tuner_i2c_props i2c_props;
u32 frequency;
struct tea5767_ctrl ctrl;
};
/*****************************************************************************/
/******************************
* Write mode register values *
******************************/
/* First register */
#define TEA5767_MUTE 0x80 /* Mutes output */
#define TEA5767_SEARCH 0x40 /* Activates station search */
/* Bits 0-5 for divider MSB */
/* Second register */
/* Bits 0-7 for divider LSB */
/* Third register */
/* Station search from botton to up */
#define TEA5767_SEARCH_UP 0x80
/* Searches with ADC output = 10 */
#define TEA5767_SRCH_HIGH_LVL 0x60
/* Searches with ADC output = 10 */
#define TEA5767_SRCH_MID_LVL 0x40
/* Searches with ADC output = 5 */
#define TEA5767_SRCH_LOW_LVL 0x20
/* if on, div=4*(Frf+Fif)/Fref otherwise, div=4*(Frf-Fif)/Freq) */
#define TEA5767_HIGH_LO_INJECT 0x10
/* Disable stereo */
#define TEA5767_MONO 0x08
/* Disable right channel and turns to mono */
#define TEA5767_MUTE_RIGHT 0x04
/* Disable left channel and turns to mono */
#define TEA5767_MUTE_LEFT 0x02
#define TEA5767_PORT1_HIGH 0x01
/* Fourth register */
#define TEA5767_PORT2_HIGH 0x80
/* Chips stops working. Only I2C bus remains on */
#define TEA5767_STDBY 0x40
/* Japan freq (76-108 MHz. If disabled, 87.5-108 MHz */
#define TEA5767_JAPAN_BAND 0x20
/* Unselected means 32.768 KHz freq as reference. Otherwise Xtal at 13 MHz */
#define TEA5767_XTAL_32768 0x10
/* Cuts weak signals */
#define TEA5767_SOFT_MUTE 0x08
/* Activates high cut control */
#define TEA5767_HIGH_CUT_CTRL 0x04
/* Activates stereo noise control */
#define TEA5767_ST_NOISE_CTL 0x02
/* If activate PORT 1 indicates SEARCH or else it is used as PORT1 */
#define TEA5767_SRCH_IND 0x01
/* Fifth register */
/* By activating, it will use Xtal at 13 MHz as reference for divider */
#define TEA5767_PLLREF_ENABLE 0x80
/* By activating, deemphasis=50, or else, deemphasis of 50us */
#define TEA5767_DEEMPH_75 0X40
/*****************************
* Read mode register values *
*****************************/
/* First register */
#define TEA5767_READY_FLAG_MASK 0x80
#define TEA5767_BAND_LIMIT_MASK 0X40
/* Bits 0-5 for divider MSB after search or preset */
/* Second register */
/* Bits 0-7 for divider LSB after search or preset */
/* Third register */
#define TEA5767_STEREO_MASK 0x80
#define TEA5767_IF_CNTR_MASK 0x7f
/* Fourth register */
#define TEA5767_ADC_LEVEL_MASK 0xf0
/* should be 0 */
#define TEA5767_CHIP_ID_MASK 0x0f
/* Fifth register */
/* Reserved for future extensions */
#define TEA5767_RESERVED_MASK 0xff
/*****************************************************************************/
static void tea5767_status_dump(struct tea5767_priv *priv,
unsigned char *buffer)
{
unsigned int div, frq;
if (TEA5767_READY_FLAG_MASK & buffer[0])
tuner_info("Ready Flag ON\n");
else
tuner_info("Ready Flag OFF\n");
if (TEA5767_BAND_LIMIT_MASK & buffer[0])
tuner_info("Tuner at band limit\n");
else
tuner_info("Tuner not at band limit\n");
div = ((buffer[0] & 0x3f) << 8) | buffer[1];
switch (priv->ctrl.xtal_freq) {
case TEA5767_HIGH_LO_13MHz:
frq = (div * 50000 - 700000 - 225000) / 4; /* Freq in KHz */
break;
case TEA5767_LOW_LO_13MHz:
frq = (div * 50000 + 700000 + 225000) / 4; /* Freq in KHz */
break;
case TEA5767_LOW_LO_32768:
frq = (div * 32768 + 700000 + 225000) / 4; /* Freq in KHz */
break;
case TEA5767_HIGH_LO_32768:
default:
frq = (div * 32768 - 700000 - 225000) / 4; /* Freq in KHz */
break;
}
buffer[0] = (div >> 8) & 0x3f;
buffer[1] = div & 0xff;
tuner_info("Frequency %d.%03d KHz (divider = 0x%04x)\n",
frq / 1000, frq % 1000, div);
if (TEA5767_STEREO_MASK & buffer[2])
tuner_info("Stereo\n");
else
tuner_info("Mono\n");
tuner_info("IF Counter = %d\n", buffer[2] & TEA5767_IF_CNTR_MASK);
tuner_info("ADC Level = %d\n",
(buffer[3] & TEA5767_ADC_LEVEL_MASK) >> 4);
tuner_info("Chip ID = %d\n", (buffer[3] & TEA5767_CHIP_ID_MASK));
tuner_info("Reserved = 0x%02x\n",
(buffer[4] & TEA5767_RESERVED_MASK));
}
/* Freq should be specifyed at 62.5 Hz */
static int set_radio_freq(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tea5767_priv *priv = fe->tuner_priv;
unsigned int frq = params->frequency;
unsigned char buffer[5];
unsigned div;
int rc;
tuner_dbg("radio freq = %d.%03d MHz\n", frq/16000,(frq/16)%1000);
buffer[2] = 0;
if (priv->ctrl.port1)
buffer[2] |= TEA5767_PORT1_HIGH;
if (params->audmode == V4L2_TUNER_MODE_MONO) {
tuner_dbg("TEA5767 set to mono\n");
buffer[2] |= TEA5767_MONO;
} else {
tuner_dbg("TEA5767 set to stereo\n");
}
buffer[3] = 0;
if (priv->ctrl.port2)
buffer[3] |= TEA5767_PORT2_HIGH;
if (priv->ctrl.high_cut)
buffer[3] |= TEA5767_HIGH_CUT_CTRL;
if (priv->ctrl.st_noise)
buffer[3] |= TEA5767_ST_NOISE_CTL;
if (priv->ctrl.soft_mute)
buffer[3] |= TEA5767_SOFT_MUTE;
if (priv->ctrl.japan_band)
buffer[3] |= TEA5767_JAPAN_BAND;
buffer[4] = 0;
if (priv->ctrl.deemph_75)
buffer[4] |= TEA5767_DEEMPH_75;
if (priv->ctrl.pllref)
buffer[4] |= TEA5767_PLLREF_ENABLE;
/* Rounds freq to next decimal value - for 62.5 KHz step */
/* frq = 20*(frq/16)+radio_frq[frq%16]; */
switch (priv->ctrl.xtal_freq) {
case TEA5767_HIGH_LO_13MHz:
tuner_dbg("radio HIGH LO inject xtal @ 13 MHz\n");
buffer[2] |= TEA5767_HIGH_LO_INJECT;
div = (frq * (4000 / 16) + 700000 + 225000 + 25000) / 50000;
break;
case TEA5767_LOW_LO_13MHz:
tuner_dbg("radio LOW LO inject xtal @ 13 MHz\n");
div = (frq * (4000 / 16) - 700000 - 225000 + 25000) / 50000;
break;
case TEA5767_LOW_LO_32768:
tuner_dbg("radio LOW LO inject xtal @ 32,768 MHz\n");
buffer[3] |= TEA5767_XTAL_32768;
/* const 700=4000*175 Khz - to adjust freq to right value */
div = ((frq * (4000 / 16) - 700000 - 225000) + 16384) >> 15;
break;
case TEA5767_HIGH_LO_32768:
default:
tuner_dbg("radio HIGH LO inject xtal @ 32,768 MHz\n");
buffer[2] |= TEA5767_HIGH_LO_INJECT;
buffer[3] |= TEA5767_XTAL_32768;
div = ((frq * (4000 / 16) + 700000 + 225000) + 16384) >> 15;
break;
}
buffer[0] = (div >> 8) & 0x3f;
buffer[1] = div & 0xff;
if (5 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 5)))
tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
if (debug) {
if (5 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 5)))
tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
else
tea5767_status_dump(priv, buffer);
}
priv->frequency = frq * 125 / 2;
return 0;
}
static int tea5767_read_status(struct dvb_frontend *fe, char *buffer)
{
struct tea5767_priv *priv = fe->tuner_priv;
int rc;
memset(buffer, 0, 5);
if (5 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 5))) {
tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
return -EREMOTEIO;
}
return 0;
}
static inline int tea5767_signal(struct dvb_frontend *fe, const char *buffer)
{
struct tea5767_priv *priv = fe->tuner_priv;
int signal = ((buffer[3] & TEA5767_ADC_LEVEL_MASK) << 8);
tuner_dbg("Signal strength: %d\n", signal);
return signal;
}
static inline int tea5767_stereo(struct dvb_frontend *fe, const char *buffer)
{
struct tea5767_priv *priv = fe->tuner_priv;
int stereo = buffer[2] & TEA5767_STEREO_MASK;
tuner_dbg("Radio ST GET = %02x\n", stereo);
return (stereo ? V4L2_TUNER_SUB_STEREO : 0);
}
static int tea5767_get_status(struct dvb_frontend *fe, u32 *status)
{
unsigned char buffer[5];
*status = 0;
if (0 == tea5767_read_status(fe, buffer)) {
if (tea5767_signal(fe, buffer))
*status = TUNER_STATUS_LOCKED;
if (tea5767_stereo(fe, buffer))
*status |= TUNER_STATUS_STEREO;
}
return 0;
}
static int tea5767_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
{
unsigned char buffer[5];
*strength = 0;
if (0 == tea5767_read_status(fe, buffer))
*strength = tea5767_signal(fe, buffer);
return 0;
}
static int tea5767_standby(struct dvb_frontend *fe)
{
unsigned char buffer[5];
struct tea5767_priv *priv = fe->tuner_priv;
unsigned div, rc;
div = (87500 * 4 + 700 + 225 + 25) / 50; /* Set frequency to 87.5 MHz */
buffer[0] = (div >> 8) & 0x3f;
buffer[1] = div & 0xff;
buffer[2] = TEA5767_PORT1_HIGH;
buffer[3] = TEA5767_PORT2_HIGH | TEA5767_HIGH_CUT_CTRL |
TEA5767_ST_NOISE_CTL | TEA5767_JAPAN_BAND | TEA5767_STDBY;
buffer[4] = 0;
if (5 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 5)))
tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
return 0;
}
int tea5767_autodetection(struct i2c_adapter* i2c_adap, u8 i2c_addr)
{
struct tuner_i2c_props i2c = { .adap = i2c_adap, .addr = i2c_addr };
unsigned char buffer[7] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
int rc;
if ((rc = tuner_i2c_xfer_recv(&i2c, buffer, 7))< 5) {
pr_warn("It is not a TEA5767. Received %i bytes.\n", rc);
return -EINVAL;
}
/* If all bytes are the same then it's a TV tuner and not a tea5767 */
if (buffer[0] == buffer[1] && buffer[0] == buffer[2] &&
buffer[0] == buffer[3] && buffer[0] == buffer[4]) {
pr_warn("All bytes are equal. It is not a TEA5767\n");
return -EINVAL;
}
/* Status bytes:
* Byte 4: bit 3:1 : CI (Chip Identification) == 0
* bit 0 : internally set to 0
* Byte 5: bit 7:0 : == 0
*/
if (((buffer[3] & 0x0f) != 0x00) || (buffer[4] != 0x00)) {
pr_warn("Chip ID is not zero. It is not a TEA5767\n");
return -EINVAL;
}
return 0;
}
static void tea5767_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static int tea5767_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tea5767_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int tea5767_set_config (struct dvb_frontend *fe, void *priv_cfg)
{
struct tea5767_priv *priv = fe->tuner_priv;
memcpy(&priv->ctrl, priv_cfg, sizeof(priv->ctrl));
return 0;
}
static const struct dvb_tuner_ops tea5767_tuner_ops = {
.info = {
.name = "tea5767", // Philips TEA5767HN FM Radio
},
.set_analog_params = set_radio_freq,
.set_config = tea5767_set_config,
.sleep = tea5767_standby,
.release = tea5767_release,
.get_frequency = tea5767_get_frequency,
.get_status = tea5767_get_status,
.get_rf_strength = tea5767_get_rf_strength,
};
struct dvb_frontend *tea5767_attach(struct dvb_frontend *fe,
struct i2c_adapter* i2c_adap,
u8 i2c_addr)
{
struct tea5767_priv *priv = NULL;
priv = kzalloc(sizeof(struct tea5767_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
fe->tuner_priv = priv;
priv->i2c_props.addr = i2c_addr;
priv->i2c_props.adap = i2c_adap;
priv->i2c_props.name = "tea5767";
priv->ctrl.xtal_freq = TEA5767_HIGH_LO_32768;
priv->ctrl.port1 = 1;
priv->ctrl.port2 = 1;
priv->ctrl.high_cut = 1;
priv->ctrl.st_noise = 1;
priv->ctrl.japan_band = 1;
memcpy(&fe->ops.tuner_ops, &tea5767_tuner_ops,
sizeof(struct dvb_tuner_ops));
tuner_info("type set to %s\n", "Philips TEA5767HN FM Radio");
return fe;
}
EXPORT_SYMBOL_GPL(tea5767_attach);
EXPORT_SYMBOL_GPL(tea5767_autodetection);
MODULE_DESCRIPTION("Philips TEA5767 FM tuner driver");
MODULE_AUTHOR("Mauro Carvalho Chehab <[email protected]>");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/media/tuners/tea5767.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Elonics E4000 silicon tuner driver
*
* Copyright (C) 2012 Antti Palosaari <[email protected]>
*/
#include "e4000_priv.h"
static int e4000_init(struct e4000_dev *dev)
{
struct i2c_client *client = dev->client;
int ret;
dev_dbg(&client->dev, "\n");
/* reset */
ret = regmap_write(dev->regmap, 0x00, 0x01);
if (ret)
goto err;
/* disable output clock */
ret = regmap_write(dev->regmap, 0x06, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x7a, 0x96);
if (ret)
goto err;
/* configure gains */
ret = regmap_bulk_write(dev->regmap, 0x7e, "\x01\xfe", 2);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x82, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x24, 0x05);
if (ret)
goto err;
ret = regmap_bulk_write(dev->regmap, 0x87, "\x20\x01", 2);
if (ret)
goto err;
ret = regmap_bulk_write(dev->regmap, 0x9f, "\x7f\x07", 2);
if (ret)
goto err;
/* DC offset control */
ret = regmap_write(dev->regmap, 0x2d, 0x1f);
if (ret)
goto err;
ret = regmap_bulk_write(dev->regmap, 0x70, "\x01\x01", 2);
if (ret)
goto err;
/* gain control */
ret = regmap_write(dev->regmap, 0x1a, 0x17);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x1f, 0x1a);
if (ret)
goto err;
dev->active = true;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int e4000_sleep(struct e4000_dev *dev)
{
struct i2c_client *client = dev->client;
int ret;
dev_dbg(&client->dev, "\n");
dev->active = false;
ret = regmap_write(dev->regmap, 0x00, 0x00);
if (ret)
goto err;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int e4000_set_params(struct e4000_dev *dev)
{
struct i2c_client *client = dev->client;
int ret, i;
unsigned int div_n, k, k_cw, div_out;
u64 f_vco;
u8 buf[5], i_data[4], q_data[4];
if (!dev->active) {
dev_dbg(&client->dev, "tuner is sleeping\n");
return 0;
}
/* gain control manual */
ret = regmap_write(dev->regmap, 0x1a, 0x00);
if (ret)
goto err;
/*
* Fractional-N synthesizer
*
* +----------------------------+
* v |
* Fref +----+ +-------+ +------+ +---+
* ------> | PD | --> | VCO | ------> | /N.F | <-- | K |
* +----+ +-------+ +------+ +---+
* |
* |
* v
* +-------+ Fout
* | /Rout | ------>
* +-------+
*/
for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
if (dev->f_frequency <= e4000_pll_lut[i].freq)
break;
}
if (i == ARRAY_SIZE(e4000_pll_lut)) {
ret = -EINVAL;
goto err;
}
#define F_REF dev->clk
div_out = e4000_pll_lut[i].div_out;
f_vco = (u64) dev->f_frequency * div_out;
/* calculate PLL integer and fractional control word */
div_n = div_u64_rem(f_vco, F_REF, &k);
k_cw = div_u64((u64) k * 0x10000, F_REF);
dev_dbg(&client->dev,
"frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_n=%u k=%u k_cw=%04x div_out=%u\n",
dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_n, k,
k_cw, div_out);
buf[0] = div_n;
buf[1] = (k_cw >> 0) & 0xff;
buf[2] = (k_cw >> 8) & 0xff;
buf[3] = 0x00;
buf[4] = e4000_pll_lut[i].div_out_reg;
ret = regmap_bulk_write(dev->regmap, 0x09, buf, 5);
if (ret)
goto err;
/* LNA filter (RF filter) */
for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
if (dev->f_frequency <= e400_lna_filter_lut[i].freq)
break;
}
if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
ret = -EINVAL;
goto err;
}
ret = regmap_write(dev->regmap, 0x10, e400_lna_filter_lut[i].val);
if (ret)
goto err;
/* IF filters */
for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
if (dev->f_bandwidth <= e4000_if_filter_lut[i].freq)
break;
}
if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
ret = -EINVAL;
goto err;
}
buf[0] = e4000_if_filter_lut[i].reg11_val;
buf[1] = e4000_if_filter_lut[i].reg12_val;
ret = regmap_bulk_write(dev->regmap, 0x11, buf, 2);
if (ret)
goto err;
/* frequency band */
for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
if (dev->f_frequency <= e4000_band_lut[i].freq)
break;
}
if (i == ARRAY_SIZE(e4000_band_lut)) {
ret = -EINVAL;
goto err;
}
ret = regmap_write(dev->regmap, 0x07, e4000_band_lut[i].reg07_val);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x78, e4000_band_lut[i].reg78_val);
if (ret)
goto err;
/* DC offset */
for (i = 0; i < 4; i++) {
if (i == 0)
ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7e\x24", 3);
else if (i == 1)
ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7f", 2);
else if (i == 2)
ret = regmap_bulk_write(dev->regmap, 0x15, "\x01", 1);
else
ret = regmap_bulk_write(dev->regmap, 0x16, "\x7e", 1);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x29, 0x01);
if (ret)
goto err;
ret = regmap_bulk_read(dev->regmap, 0x2a, buf, 3);
if (ret)
goto err;
i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
}
swap(q_data[2], q_data[3]);
swap(i_data[2], i_data[3]);
ret = regmap_bulk_write(dev->regmap, 0x50, q_data, 4);
if (ret)
goto err;
ret = regmap_bulk_write(dev->regmap, 0x60, i_data, 4);
if (ret)
goto err;
/* gain control auto */
ret = regmap_write(dev->regmap, 0x1a, 0x17);
if (ret)
goto err;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
/*
* V4L2 API
*/
#if IS_ENABLED(CONFIG_VIDEO_DEV)
static const struct v4l2_frequency_band bands[] = {
{
.type = V4L2_TUNER_RF,
.index = 0,
.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
.rangelow = 59000000,
.rangehigh = 1105000000,
},
{
.type = V4L2_TUNER_RF,
.index = 1,
.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
.rangelow = 1249000000,
.rangehigh = 2208000000UL,
},
};
static inline struct e4000_dev *e4000_subdev_to_dev(struct v4l2_subdev *sd)
{
return container_of(sd, struct e4000_dev, sd);
}
static int e4000_standby(struct v4l2_subdev *sd)
{
struct e4000_dev *dev = e4000_subdev_to_dev(sd);
int ret;
ret = e4000_sleep(dev);
if (ret)
return ret;
return e4000_set_params(dev);
}
static int e4000_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
{
struct e4000_dev *dev = e4000_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "index=%d\n", v->index);
strscpy(v->name, "Elonics E4000", sizeof(v->name));
v->type = V4L2_TUNER_RF;
v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
v->rangelow = bands[0].rangelow;
v->rangehigh = bands[1].rangehigh;
return 0;
}
static int e4000_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
{
struct e4000_dev *dev = e4000_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "index=%d\n", v->index);
return 0;
}
static int e4000_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
{
struct e4000_dev *dev = e4000_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
f->frequency = dev->f_frequency;
return 0;
}
static int e4000_s_frequency(struct v4l2_subdev *sd,
const struct v4l2_frequency *f)
{
struct e4000_dev *dev = e4000_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
f->tuner, f->type, f->frequency);
dev->f_frequency = clamp_t(unsigned int, f->frequency,
bands[0].rangelow, bands[1].rangehigh);
return e4000_set_params(dev);
}
static int e4000_enum_freq_bands(struct v4l2_subdev *sd,
struct v4l2_frequency_band *band)
{
struct e4000_dev *dev = e4000_subdev_to_dev(sd);
struct i2c_client *client = dev->client;
dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
band->tuner, band->type, band->index);
if (band->index >= ARRAY_SIZE(bands))
return -EINVAL;
band->capability = bands[band->index].capability;
band->rangelow = bands[band->index].rangelow;
band->rangehigh = bands[band->index].rangehigh;
return 0;
}
static const struct v4l2_subdev_tuner_ops e4000_subdev_tuner_ops = {
.standby = e4000_standby,
.g_tuner = e4000_g_tuner,
.s_tuner = e4000_s_tuner,
.g_frequency = e4000_g_frequency,
.s_frequency = e4000_s_frequency,
.enum_freq_bands = e4000_enum_freq_bands,
};
static const struct v4l2_subdev_ops e4000_subdev_ops = {
.tuner = &e4000_subdev_tuner_ops,
};
static int e4000_set_lna_gain(struct dvb_frontend *fe)
{
struct e4000_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
int ret;
u8 u8tmp;
dev_dbg(&client->dev, "lna auto=%d->%d val=%d->%d\n",
dev->lna_gain_auto->cur.val, dev->lna_gain_auto->val,
dev->lna_gain->cur.val, dev->lna_gain->val);
if (dev->lna_gain_auto->val && dev->if_gain_auto->cur.val)
u8tmp = 0x17;
else if (dev->lna_gain_auto->val)
u8tmp = 0x19;
else if (dev->if_gain_auto->cur.val)
u8tmp = 0x16;
else
u8tmp = 0x10;
ret = regmap_write(dev->regmap, 0x1a, u8tmp);
if (ret)
goto err;
if (dev->lna_gain_auto->val == false) {
ret = regmap_write(dev->regmap, 0x14, dev->lna_gain->val);
if (ret)
goto err;
}
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int e4000_set_mixer_gain(struct dvb_frontend *fe)
{
struct e4000_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
int ret;
u8 u8tmp;
dev_dbg(&client->dev, "mixer auto=%d->%d val=%d->%d\n",
dev->mixer_gain_auto->cur.val, dev->mixer_gain_auto->val,
dev->mixer_gain->cur.val, dev->mixer_gain->val);
if (dev->mixer_gain_auto->val)
u8tmp = 0x15;
else
u8tmp = 0x14;
ret = regmap_write(dev->regmap, 0x20, u8tmp);
if (ret)
goto err;
if (dev->mixer_gain_auto->val == false) {
ret = regmap_write(dev->regmap, 0x15, dev->mixer_gain->val);
if (ret)
goto err;
}
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int e4000_set_if_gain(struct dvb_frontend *fe)
{
struct e4000_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
int ret;
u8 buf[2];
u8 u8tmp;
dev_dbg(&client->dev, "if auto=%d->%d val=%d->%d\n",
dev->if_gain_auto->cur.val, dev->if_gain_auto->val,
dev->if_gain->cur.val, dev->if_gain->val);
if (dev->if_gain_auto->val && dev->lna_gain_auto->cur.val)
u8tmp = 0x17;
else if (dev->lna_gain_auto->cur.val)
u8tmp = 0x19;
else if (dev->if_gain_auto->val)
u8tmp = 0x16;
else
u8tmp = 0x10;
ret = regmap_write(dev->regmap, 0x1a, u8tmp);
if (ret)
goto err;
if (dev->if_gain_auto->val == false) {
buf[0] = e4000_if_gain_lut[dev->if_gain->val].reg16_val;
buf[1] = e4000_if_gain_lut[dev->if_gain->val].reg17_val;
ret = regmap_bulk_write(dev->regmap, 0x16, buf, 2);
if (ret)
goto err;
}
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int e4000_pll_lock(struct dvb_frontend *fe)
{
struct e4000_dev *dev = fe->tuner_priv;
struct i2c_client *client = dev->client;
int ret;
unsigned int uitmp;
ret = regmap_read(dev->regmap, 0x07, &uitmp);
if (ret)
goto err;
dev->pll_lock->val = (uitmp & 0x01);
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
{
struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
struct i2c_client *client = dev->client;
int ret;
if (!dev->active)
return 0;
switch (ctrl->id) {
case V4L2_CID_RF_TUNER_PLL_LOCK:
ret = e4000_pll_lock(dev->fe);
break;
default:
dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
ctrl->id, ctrl->name);
ret = -EINVAL;
}
return ret;
}
static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
struct i2c_client *client = dev->client;
int ret;
if (!dev->active)
return 0;
switch (ctrl->id) {
case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
case V4L2_CID_RF_TUNER_BANDWIDTH:
/*
* TODO: Auto logic does not work 100% correctly as tuner driver
* do not have information to calculate maximum suitable
* bandwidth. Calculating it is responsible of master driver.
*/
dev->f_bandwidth = dev->bandwidth->val;
ret = e4000_set_params(dev);
break;
case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
case V4L2_CID_RF_TUNER_LNA_GAIN:
ret = e4000_set_lna_gain(dev->fe);
break;
case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
case V4L2_CID_RF_TUNER_MIXER_GAIN:
ret = e4000_set_mixer_gain(dev->fe);
break;
case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
case V4L2_CID_RF_TUNER_IF_GAIN:
ret = e4000_set_if_gain(dev->fe);
break;
default:
dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
ctrl->id, ctrl->name);
ret = -EINVAL;
}
return ret;
}
static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
.g_volatile_ctrl = e4000_g_volatile_ctrl,
.s_ctrl = e4000_s_ctrl,
};
#endif
/*
* DVB API
*/
static int e4000_dvb_set_params(struct dvb_frontend *fe)
{
struct e4000_dev *dev = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
dev->f_frequency = c->frequency;
dev->f_bandwidth = c->bandwidth_hz;
return e4000_set_params(dev);
}
static int e4000_dvb_init(struct dvb_frontend *fe)
{
return e4000_init(fe->tuner_priv);
}
static int e4000_dvb_sleep(struct dvb_frontend *fe)
{
return e4000_sleep(fe->tuner_priv);
}
static int e4000_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
*frequency = 0; /* Zero-IF */
return 0;
}
static const struct dvb_tuner_ops e4000_dvb_tuner_ops = {
.info = {
.name = "Elonics E4000",
.frequency_min_hz = 174 * MHz,
.frequency_max_hz = 862 * MHz,
},
.init = e4000_dvb_init,
.sleep = e4000_dvb_sleep,
.set_params = e4000_dvb_set_params,
.get_if_frequency = e4000_dvb_get_if_frequency,
};
static int e4000_probe(struct i2c_client *client)
{
struct e4000_dev *dev;
struct e4000_config *cfg = client->dev.platform_data;
struct dvb_frontend *fe = cfg->fe;
int ret;
unsigned int uitmp;
static const struct regmap_config regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
goto err;
}
dev->clk = cfg->clock;
dev->client = client;
dev->fe = cfg->fe;
dev->regmap = devm_regmap_init_i2c(client, ®map_config);
if (IS_ERR(dev->regmap)) {
ret = PTR_ERR(dev->regmap);
goto err_kfree;
}
/* check if the tuner is there */
ret = regmap_read(dev->regmap, 0x02, &uitmp);
if (ret)
goto err_kfree;
dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
if (uitmp != 0x40) {
ret = -ENODEV;
goto err_kfree;
}
/* put sleep as chip seems to be in normal mode by default */
ret = regmap_write(dev->regmap, 0x00, 0x00);
if (ret)
goto err_kfree;
#if IS_ENABLED(CONFIG_VIDEO_DEV)
/* Register controls */
v4l2_ctrl_handler_init(&dev->hdl, 9);
dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
dev->lna_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
v4l2_ctrl_auto_cluster(2, &dev->lna_gain_auto, 0, false);
dev->mixer_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
v4l2_ctrl_auto_cluster(2, &dev->mixer_gain_auto, 0, false);
dev->if_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
v4l2_ctrl_auto_cluster(2, &dev->if_gain_auto, 0, false);
dev->pll_lock = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
if (dev->hdl.error) {
ret = dev->hdl.error;
dev_err(&client->dev, "Could not initialize controls\n");
v4l2_ctrl_handler_free(&dev->hdl);
goto err_kfree;
}
dev->sd.ctrl_handler = &dev->hdl;
dev->f_frequency = bands[0].rangelow;
dev->f_bandwidth = dev->bandwidth->val;
v4l2_i2c_subdev_init(&dev->sd, client, &e4000_subdev_ops);
#endif
fe->tuner_priv = dev;
memcpy(&fe->ops.tuner_ops, &e4000_dvb_tuner_ops,
sizeof(fe->ops.tuner_ops));
v4l2_set_subdevdata(&dev->sd, client);
i2c_set_clientdata(client, &dev->sd);
dev_info(&client->dev, "Elonics E4000 successfully identified\n");
return 0;
err_kfree:
kfree(dev);
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static void e4000_remove(struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct e4000_dev *dev = container_of(sd, struct e4000_dev, sd);
dev_dbg(&client->dev, "\n");
#if IS_ENABLED(CONFIG_VIDEO_DEV)
v4l2_ctrl_handler_free(&dev->hdl);
#endif
kfree(dev);
}
static const struct i2c_device_id e4000_id_table[] = {
{"e4000", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, e4000_id_table);
static struct i2c_driver e4000_driver = {
.driver = {
.name = "e4000",
.suppress_bind_attrs = true,
},
.probe = e4000_probe,
.remove = e4000_remove,
.id_table = e4000_id_table,
};
module_i2c_driver(e4000_driver);
MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/e4000.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Fitipower FC0012 tuner driver
*
* Copyright (C) 2012 Hans-Frieder Vogt <[email protected]>
*/
#include "fc0012.h"
#include "fc0012-priv.h"
static int fc0012_writereg(struct fc0012_priv *priv, u8 reg, u8 val)
{
u8 buf[2] = {reg, val};
struct i2c_msg msg = {
.addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2
};
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
dev_err(&priv->i2c->dev,
"%s: I2C write reg failed, reg: %02x, val: %02x\n",
KBUILD_MODNAME, reg, val);
return -EREMOTEIO;
}
return 0;
}
static int fc0012_readreg(struct fc0012_priv *priv, u8 reg, u8 *val)
{
struct i2c_msg msg[2] = {
{ .addr = priv->cfg->i2c_address, .flags = 0,
.buf = ®, .len = 1 },
{ .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
.buf = val, .len = 1 },
};
if (i2c_transfer(priv->i2c, msg, 2) != 2) {
dev_err(&priv->i2c->dev,
"%s: I2C read reg failed, reg: %02x\n",
KBUILD_MODNAME, reg);
return -EREMOTEIO;
}
return 0;
}
static void fc0012_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static int fc0012_init(struct dvb_frontend *fe)
{
struct fc0012_priv *priv = fe->tuner_priv;
int i, ret = 0;
unsigned char reg[] = {
0x00, /* dummy reg. 0 */
0x05, /* reg. 0x01 */
0x10, /* reg. 0x02 */
0x00, /* reg. 0x03 */
0x00, /* reg. 0x04 */
0x0f, /* reg. 0x05: may also be 0x0a */
0x00, /* reg. 0x06: divider 2, VCO slow */
0x00, /* reg. 0x07: may also be 0x0f */
0xff, /* reg. 0x08: AGC Clock divide by 256, AGC gain 1/256,
Loop Bw 1/8 */
0x6e, /* reg. 0x09: Disable LoopThrough, Enable LoopThrough: 0x6f */
0xb8, /* reg. 0x0a: Disable LO Test Buffer */
0x82, /* reg. 0x0b: Output Clock is same as clock frequency,
may also be 0x83 */
0xfc, /* reg. 0x0c: depending on AGC Up-Down mode, may need 0xf8 */
0x02, /* reg. 0x0d: AGC Not Forcing & LNA Forcing, 0x02 for DVB-T */
0x00, /* reg. 0x0e */
0x00, /* reg. 0x0f */
0x00, /* reg. 0x10: may also be 0x0d */
0x00, /* reg. 0x11 */
0x1f, /* reg. 0x12: Set to maximum gain */
0x08, /* reg. 0x13: Set to Middle Gain: 0x08,
Low Gain: 0x00, High Gain: 0x10, enable IX2: 0x80 */
0x00, /* reg. 0x14 */
0x04, /* reg. 0x15: Enable LNA COMPS */
};
switch (priv->cfg->xtal_freq) {
case FC_XTAL_27_MHZ:
case FC_XTAL_28_8_MHZ:
reg[0x07] |= 0x20;
break;
case FC_XTAL_36_MHZ:
default:
break;
}
if (priv->cfg->dual_master)
reg[0x0c] |= 0x02;
if (priv->cfg->loop_through)
reg[0x09] |= 0x01;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
for (i = 1; i < sizeof(reg); i++) {
ret = fc0012_writereg(priv, i, reg[i]);
if (ret)
break;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
dev_err(&priv->i2c->dev, "%s: fc0012_writereg failed: %d\n",
KBUILD_MODNAME, ret);
return ret;
}
static int fc0012_set_params(struct dvb_frontend *fe)
{
struct fc0012_priv *priv = fe->tuner_priv;
int i, ret = 0;
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
u32 freq = p->frequency / 1000;
u32 delsys = p->delivery_system;
unsigned char reg[7], am, pm, multi, tmp;
unsigned long f_vco;
unsigned short xtal_freq_khz_2, xin, xdiv;
bool vco_select = false;
if (fe->callback) {
ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
FC_FE_CALLBACK_VHF_ENABLE, (freq > 300000 ? 0 : 1));
if (ret)
goto exit;
}
switch (priv->cfg->xtal_freq) {
case FC_XTAL_27_MHZ:
xtal_freq_khz_2 = 27000 / 2;
break;
case FC_XTAL_36_MHZ:
xtal_freq_khz_2 = 36000 / 2;
break;
case FC_XTAL_28_8_MHZ:
default:
xtal_freq_khz_2 = 28800 / 2;
break;
}
/* select frequency divider and the frequency of VCO */
if (freq < 37084) { /* freq * 96 < 3560000 */
multi = 96;
reg[5] = 0x82;
reg[6] = 0x00;
} else if (freq < 55625) { /* freq * 64 < 3560000 */
multi = 64;
reg[5] = 0x82;
reg[6] = 0x02;
} else if (freq < 74167) { /* freq * 48 < 3560000 */
multi = 48;
reg[5] = 0x42;
reg[6] = 0x00;
} else if (freq < 111250) { /* freq * 32 < 3560000 */
multi = 32;
reg[5] = 0x42;
reg[6] = 0x02;
} else if (freq < 148334) { /* freq * 24 < 3560000 */
multi = 24;
reg[5] = 0x22;
reg[6] = 0x00;
} else if (freq < 222500) { /* freq * 16 < 3560000 */
multi = 16;
reg[5] = 0x22;
reg[6] = 0x02;
} else if (freq < 296667) { /* freq * 12 < 3560000 */
multi = 12;
reg[5] = 0x12;
reg[6] = 0x00;
} else if (freq < 445000) { /* freq * 8 < 3560000 */
multi = 8;
reg[5] = 0x12;
reg[6] = 0x02;
} else if (freq < 593334) { /* freq * 6 < 3560000 */
multi = 6;
reg[5] = 0x0a;
reg[6] = 0x00;
} else {
multi = 4;
reg[5] = 0x0a;
reg[6] = 0x02;
}
f_vco = freq * multi;
if (f_vco >= 3060000) {
reg[6] |= 0x08;
vco_select = true;
}
if (freq >= 45000) {
/* From divided value (XDIV) determined the FA and FP value */
xdiv = (unsigned short)(f_vco / xtal_freq_khz_2);
if ((f_vco - xdiv * xtal_freq_khz_2) >= (xtal_freq_khz_2 / 2))
xdiv++;
pm = (unsigned char)(xdiv / 8);
am = (unsigned char)(xdiv - (8 * pm));
if (am < 2) {
reg[1] = am + 8;
reg[2] = pm - 1;
} else {
reg[1] = am;
reg[2] = pm;
}
} else {
/* fix for frequency less than 45 MHz */
reg[1] = 0x06;
reg[2] = 0x11;
}
/* fix clock out */
reg[6] |= 0x20;
/* From VCO frequency determines the XIN ( fractional part of Delta
Sigma PLL) and divided value (XDIV) */
xin = (unsigned short)(f_vco - (f_vco / xtal_freq_khz_2) * xtal_freq_khz_2);
xin = (xin << 15) / xtal_freq_khz_2;
if (xin >= 16384)
xin += 32768;
reg[3] = xin >> 8; /* xin with 9 bit resolution */
reg[4] = xin & 0xff;
if (delsys == SYS_DVBT) {
reg[6] &= 0x3f; /* bits 6 and 7 describe the bandwidth */
switch (p->bandwidth_hz) {
case 6000000:
reg[6] |= 0x80;
break;
case 7000000:
reg[6] |= 0x40;
break;
case 8000000:
default:
break;
}
} else {
dev_err(&priv->i2c->dev, "%s: modulation type not supported!\n",
KBUILD_MODNAME);
return -EINVAL;
}
/* modified for Realtek demod */
reg[5] |= 0x07;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
for (i = 1; i <= 6; i++) {
ret = fc0012_writereg(priv, i, reg[i]);
if (ret)
goto exit;
}
/* VCO Calibration */
ret = fc0012_writereg(priv, 0x0e, 0x80);
if (!ret)
ret = fc0012_writereg(priv, 0x0e, 0x00);
/* VCO Re-Calibration if needed */
if (!ret)
ret = fc0012_writereg(priv, 0x0e, 0x00);
if (!ret) {
msleep(10);
ret = fc0012_readreg(priv, 0x0e, &tmp);
}
if (ret)
goto exit;
/* vco selection */
tmp &= 0x3f;
if (vco_select) {
if (tmp > 0x3c) {
reg[6] &= ~0x08;
ret = fc0012_writereg(priv, 0x06, reg[6]);
if (!ret)
ret = fc0012_writereg(priv, 0x0e, 0x80);
if (!ret)
ret = fc0012_writereg(priv, 0x0e, 0x00);
}
} else {
if (tmp < 0x02) {
reg[6] |= 0x08;
ret = fc0012_writereg(priv, 0x06, reg[6]);
if (!ret)
ret = fc0012_writereg(priv, 0x0e, 0x80);
if (!ret)
ret = fc0012_writereg(priv, 0x0e, 0x00);
}
}
priv->frequency = p->frequency;
priv->bandwidth = p->bandwidth_hz;
exit:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
dev_warn(&priv->i2c->dev, "%s: %s failed: %d\n",
KBUILD_MODNAME, __func__, ret);
return ret;
}
static int fc0012_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct fc0012_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int fc0012_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
*frequency = 0; /* Zero-IF */
return 0;
}
static int fc0012_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct fc0012_priv *priv = fe->tuner_priv;
*bandwidth = priv->bandwidth;
return 0;
}
#define INPUT_ADC_LEVEL -8
static int fc0012_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
{
struct fc0012_priv *priv = fe->tuner_priv;
int ret;
unsigned char tmp;
int int_temp, lna_gain, int_lna, tot_agc_gain, power;
static const int fc0012_lna_gain_table[] = {
/* low gain */
-63, -58, -99, -73,
-63, -65, -54, -60,
/* middle gain */
71, 70, 68, 67,
65, 63, 61, 58,
/* high gain */
197, 191, 188, 186,
184, 182, 181, 179,
};
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
ret = fc0012_writereg(priv, 0x12, 0x00);
if (ret)
goto err;
ret = fc0012_readreg(priv, 0x12, &tmp);
if (ret)
goto err;
int_temp = tmp;
ret = fc0012_readreg(priv, 0x13, &tmp);
if (ret)
goto err;
lna_gain = tmp & 0x1f;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (lna_gain < ARRAY_SIZE(fc0012_lna_gain_table)) {
int_lna = fc0012_lna_gain_table[lna_gain];
tot_agc_gain = (abs((int_temp >> 5) - 7) - 2 +
(int_temp & 0x1f)) * 2;
power = INPUT_ADC_LEVEL - tot_agc_gain - int_lna / 10;
if (power >= 45)
*strength = 255; /* 100% */
else if (power < -95)
*strength = 0;
else
*strength = (power + 95) * 255 / 140;
*strength |= *strength << 8;
} else {
ret = -1;
}
goto exit;
err:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
exit:
if (ret)
dev_warn(&priv->i2c->dev, "%s: %s failed: %d\n",
KBUILD_MODNAME, __func__, ret);
return ret;
}
static const struct dvb_tuner_ops fc0012_tuner_ops = {
.info = {
.name = "Fitipower FC0012",
.frequency_min_hz = 37 * MHz, /* estimate */
.frequency_max_hz = 862 * MHz, /* estimate */
},
.release = fc0012_release,
.init = fc0012_init,
.set_params = fc0012_set_params,
.get_frequency = fc0012_get_frequency,
.get_if_frequency = fc0012_get_if_frequency,
.get_bandwidth = fc0012_get_bandwidth,
.get_rf_strength = fc0012_get_rf_strength,
};
struct dvb_frontend *fc0012_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c, const struct fc0012_config *cfg)
{
struct fc0012_priv *priv;
int ret;
u8 chip_id;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
priv = kzalloc(sizeof(struct fc0012_priv), GFP_KERNEL);
if (!priv) {
ret = -ENOMEM;
dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
goto err;
}
priv->cfg = cfg;
priv->i2c = i2c;
/* check if the tuner is there */
ret = fc0012_readreg(priv, 0x00, &chip_id);
if (ret < 0)
goto err;
dev_dbg(&i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
switch (chip_id) {
case 0xa1:
break;
default:
ret = -ENODEV;
goto err;
}
dev_info(&i2c->dev, "%s: Fitipower FC0012 successfully identified\n",
KBUILD_MODNAME);
if (priv->cfg->loop_through) {
ret = fc0012_writereg(priv, 0x09, 0x6f);
if (ret < 0)
goto err;
}
/*
* TODO: Clock out en or div?
* For dual tuner configuration clearing bit [0] is required.
*/
if (priv->cfg->clock_out) {
ret = fc0012_writereg(priv, 0x0b, 0x82);
if (ret < 0)
goto err;
}
fe->tuner_priv = priv;
memcpy(&fe->ops.tuner_ops, &fc0012_tuner_ops,
sizeof(struct dvb_tuner_ops));
err:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (ret) {
dev_dbg(&i2c->dev, "%s: failed: %d\n", __func__, ret);
kfree(priv);
return NULL;
}
return fe;
}
EXPORT_SYMBOL_GPL(fc0012_attach);
MODULE_DESCRIPTION("Fitipower FC0012 silicon tuner driver");
MODULE_AUTHOR("Hans-Frieder Vogt <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_VERSION("0.6");
| linux-master | drivers/media/tuners/fc0012.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
*
* (c) 2005 Hartmut Hackmann
* (c) 2007 Michael Krufky
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <asm/types.h>
#include <linux/dvb/frontend.h>
#include <linux/videodev2.h>
#include "tda827x.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
#define dprintk(args...) \
do { \
if (debug) printk(KERN_DEBUG "tda827x: " args); \
} while (0)
struct tda827x_priv {
int i2c_addr;
struct i2c_adapter *i2c_adap;
struct tda827x_config *cfg;
unsigned int sgIF;
unsigned char lpsel;
u32 frequency;
u32 bandwidth;
};
static void tda827x_set_std(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tda827x_priv *priv = fe->tuner_priv;
char *mode;
priv->lpsel = 0;
if (params->std & V4L2_STD_MN) {
priv->sgIF = 92;
priv->lpsel = 1;
mode = "MN";
} else if (params->std & V4L2_STD_B) {
priv->sgIF = 108;
mode = "B";
} else if (params->std & V4L2_STD_GH) {
priv->sgIF = 124;
mode = "GH";
} else if (params->std & V4L2_STD_PAL_I) {
priv->sgIF = 124;
mode = "I";
} else if (params->std & V4L2_STD_DK) {
priv->sgIF = 124;
mode = "DK";
} else if (params->std & V4L2_STD_SECAM_L) {
priv->sgIF = 124;
mode = "L";
} else if (params->std & V4L2_STD_SECAM_LC) {
priv->sgIF = 20;
mode = "LC";
} else {
priv->sgIF = 124;
mode = "xx";
}
if (params->mode == V4L2_TUNER_RADIO) {
priv->sgIF = 88; /* if frequency is 5.5 MHz */
dprintk("setting tda827x to radio FM\n");
} else
dprintk("setting tda827x to system %s\n", mode);
}
/* ------------------------------------------------------------------ */
struct tda827x_data {
u32 lomax;
u8 spd;
u8 bs;
u8 bp;
u8 cp;
u8 gc3;
u8 div1p5;
};
static const struct tda827x_data tda827x_table[] = {
{ .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
{ .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
{ .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
{ .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
{ .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
{ .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
{ .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
{ .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
{ .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
{ .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
{ .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
{ .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
{ .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
{ .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
{ .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
{ .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
{ .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
{ .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
};
static int tuner_transfer(struct dvb_frontend *fe,
struct i2c_msg *msg,
const int size)
{
int rc;
struct tda827x_priv *priv = fe->tuner_priv;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
rc = i2c_transfer(priv->i2c_adap, msg, size);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (rc >= 0 && rc != size)
return -EIO;
return rc;
}
static int tda827xo_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct tda827x_priv *priv = fe->tuner_priv;
u8 buf[14];
int rc;
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
.buf = buf, .len = sizeof(buf) };
int i, tuner_freq, if_freq;
u32 N;
dprintk("%s:\n", __func__);
if (c->bandwidth_hz == 0) {
if_freq = 5000000;
} else if (c->bandwidth_hz <= 6000000) {
if_freq = 4000000;
} else if (c->bandwidth_hz <= 7000000) {
if_freq = 4500000;
} else { /* 8 MHz */
if_freq = 5000000;
}
tuner_freq = c->frequency;
i = 0;
while (tda827x_table[i].lomax < tuner_freq) {
if (tda827x_table[i + 1].lomax == 0)
break;
i++;
}
tuner_freq += if_freq;
N = ((tuner_freq + 125000) / 250000) << (tda827x_table[i].spd + 2);
buf[0] = 0;
buf[1] = (N>>8) | 0x40;
buf[2] = N & 0xff;
buf[3] = 0;
buf[4] = 0x52;
buf[5] = (tda827x_table[i].spd << 6) + (tda827x_table[i].div1p5 << 5) +
(tda827x_table[i].bs << 3) +
tda827x_table[i].bp;
buf[6] = (tda827x_table[i].gc3 << 4) + 0x8f;
buf[7] = 0xbf;
buf[8] = 0x2a;
buf[9] = 0x05;
buf[10] = 0xff;
buf[11] = 0x00;
buf[12] = 0x00;
buf[13] = 0x40;
msg.len = 14;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
msleep(500);
/* correct CP value */
buf[0] = 0x30;
buf[1] = 0x50 + tda827x_table[i].cp;
msg.len = 2;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
priv->frequency = c->frequency;
priv->bandwidth = c->bandwidth_hz;
return 0;
err:
printk(KERN_ERR "%s: could not write to tuner at addr: 0x%02x\n",
__func__, priv->i2c_addr << 1);
return rc;
}
static int tda827xo_sleep(struct dvb_frontend *fe)
{
struct tda827x_priv *priv = fe->tuner_priv;
static u8 buf[] = { 0x30, 0xd0 };
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
.buf = buf, .len = sizeof(buf) };
dprintk("%s:\n", __func__);
tuner_transfer(fe, &msg, 1);
if (priv->cfg && priv->cfg->sleep)
priv->cfg->sleep(fe);
return 0;
}
/* ------------------------------------------------------------------ */
static int tda827xo_set_analog_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
unsigned char tuner_reg[8];
unsigned char reg2[2];
u32 N;
int i;
struct tda827x_priv *priv = fe->tuner_priv;
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0 };
unsigned int freq = params->frequency;
tda827x_set_std(fe, params);
if (params->mode == V4L2_TUNER_RADIO)
freq = freq / 1000;
N = freq + priv->sgIF;
i = 0;
while (tda827x_table[i].lomax < N * 62500) {
if (tda827x_table[i + 1].lomax == 0)
break;
i++;
}
N = N << tda827x_table[i].spd;
tuner_reg[0] = 0;
tuner_reg[1] = (unsigned char)(N>>8);
tuner_reg[2] = (unsigned char) N;
tuner_reg[3] = 0x40;
tuner_reg[4] = 0x52 + (priv->lpsel << 5);
tuner_reg[5] = (tda827x_table[i].spd << 6) +
(tda827x_table[i].div1p5 << 5) +
(tda827x_table[i].bs << 3) + tda827x_table[i].bp;
tuner_reg[6] = 0x8f + (tda827x_table[i].gc3 << 4);
tuner_reg[7] = 0x8f;
msg.buf = tuner_reg;
msg.len = 8;
tuner_transfer(fe, &msg, 1);
msg.buf = reg2;
msg.len = 2;
reg2[0] = 0x80;
reg2[1] = 0;
tuner_transfer(fe, &msg, 1);
reg2[0] = 0x60;
reg2[1] = 0xbf;
tuner_transfer(fe, &msg, 1);
reg2[0] = 0x30;
reg2[1] = tuner_reg[4] + 0x80;
tuner_transfer(fe, &msg, 1);
msleep(1);
reg2[0] = 0x30;
reg2[1] = tuner_reg[4] + 4;
tuner_transfer(fe, &msg, 1);
msleep(1);
reg2[0] = 0x30;
reg2[1] = tuner_reg[4];
tuner_transfer(fe, &msg, 1);
msleep(550);
reg2[0] = 0x30;
reg2[1] = (tuner_reg[4] & 0xfc) + tda827x_table[i].cp;
tuner_transfer(fe, &msg, 1);
reg2[0] = 0x60;
reg2[1] = 0x3f;
tuner_transfer(fe, &msg, 1);
reg2[0] = 0x80;
reg2[1] = 0x08; /* Vsync en */
tuner_transfer(fe, &msg, 1);
priv->frequency = params->frequency;
return 0;
}
static void tda827xo_agcf(struct dvb_frontend *fe)
{
struct tda827x_priv *priv = fe->tuner_priv;
unsigned char data[] = { 0x80, 0x0c };
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
.buf = data, .len = 2};
tuner_transfer(fe, &msg, 1);
}
/* ------------------------------------------------------------------ */
struct tda827xa_data {
u32 lomax;
u8 svco;
u8 spd;
u8 scr;
u8 sbs;
u8 gc3;
};
static struct tda827xa_data tda827xa_dvbt[] = {
{ .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
{ .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
{ .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
{ .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
{ .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
{ .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
{ .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
{ .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
{ .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
{ .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
{ .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
{ .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
{ .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
{ .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
{ .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
{ .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
{ .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
{ .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
{ .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
{ .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
{ .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
{ .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
};
static struct tda827xa_data tda827xa_dvbc[] = {
{ .lomax = 50125000, .svco = 2, .spd = 4, .scr = 2, .sbs = 0, .gc3 = 3},
{ .lomax = 58500000, .svco = 3, .spd = 4, .scr = 2, .sbs = 0, .gc3 = 3},
{ .lomax = 69250000, .svco = 0, .spd = 3, .scr = 2, .sbs = 0, .gc3 = 3},
{ .lomax = 83625000, .svco = 1, .spd = 3, .scr = 2, .sbs = 0, .gc3 = 3},
{ .lomax = 97500000, .svco = 2, .spd = 3, .scr = 2, .sbs = 0, .gc3 = 3},
{ .lomax = 100250000, .svco = 2, .spd = 3, .scr = 2, .sbs = 1, .gc3 = 1},
{ .lomax = 117000000, .svco = 3, .spd = 3, .scr = 2, .sbs = 1, .gc3 = 1},
{ .lomax = 138500000, .svco = 0, .spd = 2, .scr = 2, .sbs = 1, .gc3 = 1},
{ .lomax = 167250000, .svco = 1, .spd = 2, .scr = 2, .sbs = 1, .gc3 = 1},
{ .lomax = 187000000, .svco = 2, .spd = 2, .scr = 2, .sbs = 1, .gc3 = 1},
{ .lomax = 200500000, .svco = 2, .spd = 2, .scr = 2, .sbs = 2, .gc3 = 1},
{ .lomax = 234000000, .svco = 3, .spd = 2, .scr = 2, .sbs = 2, .gc3 = 3},
{ .lomax = 277000000, .svco = 0, .spd = 1, .scr = 2, .sbs = 2, .gc3 = 3},
{ .lomax = 325000000, .svco = 1, .spd = 1, .scr = 2, .sbs = 2, .gc3 = 1},
{ .lomax = 334500000, .svco = 1, .spd = 1, .scr = 2, .sbs = 3, .gc3 = 3},
{ .lomax = 401000000, .svco = 2, .spd = 1, .scr = 2, .sbs = 3, .gc3 = 3},
{ .lomax = 468000000, .svco = 3, .spd = 1, .scr = 2, .sbs = 3, .gc3 = 1},
{ .lomax = 535000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
{ .lomax = 554000000, .svco = 0, .spd = 0, .scr = 2, .sbs = 3, .gc3 = 1},
{ .lomax = 638000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
{ .lomax = 669000000, .svco = 1, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 1},
{ .lomax = 720000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
{ .lomax = 802000000, .svco = 2, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 1},
{ .lomax = 835000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
{ .lomax = 885000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 1},
{ .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 1},
{ .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
};
static struct tda827xa_data tda827xa_analog[] = {
{ .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 3},
{ .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
{ .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
{ .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
{ .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
{ .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
{ .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 3},
{ .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 3},
{ .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
{ .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 3},
{ .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 3},
{ .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
{ .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
{ .lomax = 554000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
{ .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
{ .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
{ .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
{ .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
{ .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
{ .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
{ .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
{ .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
};
static int tda827xa_sleep(struct dvb_frontend *fe)
{
struct tda827x_priv *priv = fe->tuner_priv;
static u8 buf[] = { 0x30, 0x90 };
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
.buf = buf, .len = sizeof(buf) };
dprintk("%s:\n", __func__);
tuner_transfer(fe, &msg, 1);
if (priv->cfg && priv->cfg->sleep)
priv->cfg->sleep(fe);
return 0;
}
static void tda827xa_lna_gain(struct dvb_frontend *fe, int high,
struct analog_parameters *params)
{
struct tda827x_priv *priv = fe->tuner_priv;
unsigned char buf[] = {0x22, 0x01};
int arg;
int gp_func;
struct i2c_msg msg = { .flags = 0, .buf = buf, .len = sizeof(buf) };
if (NULL == priv->cfg) {
dprintk("tda827x_config not defined, cannot set LNA gain!\n");
return;
}
msg.addr = priv->cfg->switch_addr;
if (priv->cfg->config) {
if (high)
dprintk("setting LNA to high gain\n");
else
dprintk("setting LNA to low gain\n");
}
switch (priv->cfg->config) {
case TDA8290_LNA_OFF: /* no LNA */
break;
case TDA8290_LNA_GP0_HIGH_ON: /* switch is GPIO 0 of tda8290 */
case TDA8290_LNA_GP0_HIGH_OFF:
if (params == NULL) {
gp_func = 0;
arg = 0;
} else {
/* turn Vsync on */
gp_func = 1;
if (params->std & V4L2_STD_MN)
arg = 1;
else
arg = 0;
}
if (fe->callback)
fe->callback(priv->i2c_adap->algo_data,
DVB_FRONTEND_COMPONENT_TUNER,
gp_func, arg);
buf[1] = high ? 0 : 1;
if (priv->cfg->config == TDA8290_LNA_GP0_HIGH_OFF)
buf[1] = high ? 1 : 0;
tuner_transfer(fe, &msg, 1);
break;
case TDA8290_LNA_ON_BRIDGE: /* switch with GPIO of saa713x */
if (fe->callback)
fe->callback(priv->i2c_adap->algo_data,
DVB_FRONTEND_COMPONENT_TUNER, 0, high);
break;
}
}
static int tda827xa_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct tda827x_priv *priv = fe->tuner_priv;
struct tda827xa_data *frequency_map = tda827xa_dvbt;
u8 buf[11];
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
.buf = buf, .len = sizeof(buf) };
int i, tuner_freq, if_freq, rc;
u32 N;
dprintk("%s:\n", __func__);
tda827xa_lna_gain(fe, 1, NULL);
msleep(20);
if (c->bandwidth_hz == 0) {
if_freq = 5000000;
} else if (c->bandwidth_hz <= 6000000) {
if_freq = 4000000;
} else if (c->bandwidth_hz <= 7000000) {
if_freq = 4500000;
} else { /* 8 MHz */
if_freq = 5000000;
}
tuner_freq = c->frequency;
switch (c->delivery_system) {
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
dprintk("%s select tda827xa_dvbc\n", __func__);
frequency_map = tda827xa_dvbc;
break;
default:
break;
}
i = 0;
while (frequency_map[i].lomax < tuner_freq) {
if (frequency_map[i + 1].lomax == 0)
break;
i++;
}
tuner_freq += if_freq;
N = ((tuner_freq + 31250) / 62500) << frequency_map[i].spd;
buf[0] = 0; // subaddress
buf[1] = N >> 8;
buf[2] = N & 0xff;
buf[3] = 0;
buf[4] = 0x16;
buf[5] = (frequency_map[i].spd << 5) + (frequency_map[i].svco << 3) +
frequency_map[i].sbs;
buf[6] = 0x4b + (frequency_map[i].gc3 << 4);
buf[7] = 0x1c;
buf[8] = 0x06;
buf[9] = 0x24;
buf[10] = 0x00;
msg.len = 11;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
buf[0] = 0x90;
buf[1] = 0xff;
buf[2] = 0x60;
buf[3] = 0x00;
buf[4] = 0x59; // lpsel, for 6MHz + 2
msg.len = 5;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
buf[0] = 0xa0;
buf[1] = 0x40;
msg.len = 2;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
msleep(11);
msg.flags = I2C_M_RD;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
msg.flags = 0;
buf[1] >>= 4;
dprintk("tda8275a AGC2 gain is: %d\n", buf[1]);
if ((buf[1]) < 2) {
tda827xa_lna_gain(fe, 0, NULL);
buf[0] = 0x60;
buf[1] = 0x0c;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
}
buf[0] = 0xc0;
buf[1] = 0x99; // lpsel, for 6MHz + 2
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
buf[0] = 0x60;
buf[1] = 0x3c;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
/* correct CP value */
buf[0] = 0x30;
buf[1] = 0x10 + frequency_map[i].scr;
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
msleep(163);
buf[0] = 0xc0;
buf[1] = 0x39; // lpsel, for 6MHz + 2
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
msleep(3);
/* freeze AGC1 */
buf[0] = 0x50;
buf[1] = 0x4f + (frequency_map[i].gc3 << 4);
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0)
goto err;
priv->frequency = c->frequency;
priv->bandwidth = c->bandwidth_hz;
return 0;
err:
printk(KERN_ERR "%s: could not write to tuner at addr: 0x%02x\n",
__func__, priv->i2c_addr << 1);
return rc;
}
static int tda827xa_set_analog_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
unsigned char tuner_reg[11];
u32 N;
int i;
struct tda827x_priv *priv = fe->tuner_priv;
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
.buf = tuner_reg, .len = sizeof(tuner_reg) };
unsigned int freq = params->frequency;
tda827x_set_std(fe, params);
tda827xa_lna_gain(fe, 1, params);
msleep(10);
if (params->mode == V4L2_TUNER_RADIO)
freq = freq / 1000;
N = freq + priv->sgIF;
i = 0;
while (tda827xa_analog[i].lomax < N * 62500) {
if (tda827xa_analog[i + 1].lomax == 0)
break;
i++;
}
N = N << tda827xa_analog[i].spd;
tuner_reg[0] = 0;
tuner_reg[1] = (unsigned char)(N>>8);
tuner_reg[2] = (unsigned char) N;
tuner_reg[3] = 0;
tuner_reg[4] = 0x16;
tuner_reg[5] = (tda827xa_analog[i].spd << 5) +
(tda827xa_analog[i].svco << 3) +
tda827xa_analog[i].sbs;
tuner_reg[6] = 0x8b + (tda827xa_analog[i].gc3 << 4);
tuner_reg[7] = 0x1c;
tuner_reg[8] = 4;
tuner_reg[9] = 0x20;
tuner_reg[10] = 0x00;
msg.len = 11;
tuner_transfer(fe, &msg, 1);
tuner_reg[0] = 0x90;
tuner_reg[1] = 0xff;
tuner_reg[2] = 0xe0;
tuner_reg[3] = 0;
tuner_reg[4] = 0x99 + (priv->lpsel << 1);
msg.len = 5;
tuner_transfer(fe, &msg, 1);
tuner_reg[0] = 0xa0;
tuner_reg[1] = 0xc0;
msg.len = 2;
tuner_transfer(fe, &msg, 1);
tuner_reg[0] = 0x30;
tuner_reg[1] = 0x10 + tda827xa_analog[i].scr;
tuner_transfer(fe, &msg, 1);
msg.flags = I2C_M_RD;
tuner_transfer(fe, &msg, 1);
msg.flags = 0;
tuner_reg[1] >>= 4;
dprintk("AGC2 gain is: %d\n", tuner_reg[1]);
if (tuner_reg[1] < 1)
tda827xa_lna_gain(fe, 0, params);
msleep(100);
tuner_reg[0] = 0x60;
tuner_reg[1] = 0x3c;
tuner_transfer(fe, &msg, 1);
msleep(163);
tuner_reg[0] = 0x50;
tuner_reg[1] = 0x8f + (tda827xa_analog[i].gc3 << 4);
tuner_transfer(fe, &msg, 1);
tuner_reg[0] = 0x80;
tuner_reg[1] = 0x28;
tuner_transfer(fe, &msg, 1);
tuner_reg[0] = 0xb0;
tuner_reg[1] = 0x01;
tuner_transfer(fe, &msg, 1);
tuner_reg[0] = 0xc0;
tuner_reg[1] = 0x19 + (priv->lpsel << 1);
tuner_transfer(fe, &msg, 1);
priv->frequency = params->frequency;
return 0;
}
static void tda827xa_agcf(struct dvb_frontend *fe)
{
struct tda827x_priv *priv = fe->tuner_priv;
unsigned char data[] = {0x80, 0x2c};
struct i2c_msg msg = {.addr = priv->i2c_addr, .flags = 0,
.buf = data, .len = 2};
tuner_transfer(fe, &msg, 1);
}
/* ------------------------------------------------------------------ */
static void tda827x_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static int tda827x_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tda827x_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int tda827x_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct tda827x_priv *priv = fe->tuner_priv;
*bandwidth = priv->bandwidth;
return 0;
}
static int tda827x_init(struct dvb_frontend *fe)
{
struct tda827x_priv *priv = fe->tuner_priv;
dprintk("%s:\n", __func__);
if (priv->cfg && priv->cfg->init)
priv->cfg->init(fe);
return 0;
}
static int tda827x_probe_version(struct dvb_frontend *fe);
static int tda827x_initial_init(struct dvb_frontend *fe)
{
int ret;
ret = tda827x_probe_version(fe);
if (ret)
return ret;
return fe->ops.tuner_ops.init(fe);
}
static int tda827x_initial_sleep(struct dvb_frontend *fe)
{
int ret;
ret = tda827x_probe_version(fe);
if (ret)
return ret;
return fe->ops.tuner_ops.sleep(fe);
}
static const struct dvb_tuner_ops tda827xo_tuner_ops = {
.info = {
.name = "Philips TDA827X",
.frequency_min_hz = 55 * MHz,
.frequency_max_hz = 860 * MHz,
.frequency_step_hz = 250 * kHz
},
.release = tda827x_release,
.init = tda827x_initial_init,
.sleep = tda827x_initial_sleep,
.set_params = tda827xo_set_params,
.set_analog_params = tda827xo_set_analog_params,
.get_frequency = tda827x_get_frequency,
.get_bandwidth = tda827x_get_bandwidth,
};
static const struct dvb_tuner_ops tda827xa_tuner_ops = {
.info = {
.name = "Philips TDA827XA",
.frequency_min_hz = 44 * MHz,
.frequency_max_hz = 906 * MHz,
.frequency_step_hz = 62500
},
.release = tda827x_release,
.init = tda827x_init,
.sleep = tda827xa_sleep,
.set_params = tda827xa_set_params,
.set_analog_params = tda827xa_set_analog_params,
.get_frequency = tda827x_get_frequency,
.get_bandwidth = tda827x_get_bandwidth,
};
static int tda827x_probe_version(struct dvb_frontend *fe)
{
u8 data;
int rc;
struct tda827x_priv *priv = fe->tuner_priv;
struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = I2C_M_RD,
.buf = &data, .len = 1 };
rc = tuner_transfer(fe, &msg, 1);
if (rc < 0) {
printk("%s: could not read from tuner at addr: 0x%02x\n",
__func__, msg.addr << 1);
return rc;
}
if ((data & 0x3c) == 0) {
dprintk("tda827x tuner found\n");
fe->ops.tuner_ops.init = tda827x_init;
fe->ops.tuner_ops.sleep = tda827xo_sleep;
if (priv->cfg)
priv->cfg->agcf = tda827xo_agcf;
} else {
dprintk("tda827xa tuner found\n");
memcpy(&fe->ops.tuner_ops, &tda827xa_tuner_ops, sizeof(struct dvb_tuner_ops));
if (priv->cfg)
priv->cfg->agcf = tda827xa_agcf;
}
return 0;
}
struct dvb_frontend *tda827x_attach(struct dvb_frontend *fe, int addr,
struct i2c_adapter *i2c,
struct tda827x_config *cfg)
{
struct tda827x_priv *priv = NULL;
dprintk("%s:\n", __func__);
priv = kzalloc(sizeof(struct tda827x_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
priv->i2c_addr = addr;
priv->i2c_adap = i2c;
priv->cfg = cfg;
memcpy(&fe->ops.tuner_ops, &tda827xo_tuner_ops, sizeof(struct dvb_tuner_ops));
fe->tuner_priv = priv;
dprintk("type set to %s\n", fe->ops.tuner_ops.info.name);
return fe;
}
EXPORT_SYMBOL_GPL(tda827x_attach);
MODULE_DESCRIPTION("DVB TDA827x driver");
MODULE_AUTHOR("Hartmut Hackmann <[email protected]>");
MODULE_AUTHOR("Michael Krufky <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tda827x.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for the internal tuner of Montage M88RS6000
*
* Copyright (C) 2014 Max nibble <[email protected]>
*/
#include "m88rs6000t.h"
#include <linux/regmap.h>
struct m88rs6000t_dev {
struct m88rs6000t_config cfg;
struct i2c_client *client;
struct regmap *regmap;
u32 frequency_khz;
};
struct m88rs6000t_reg_val {
u8 reg;
u8 val;
};
/* set demod main mclk and ts mclk */
static int m88rs6000t_set_demod_mclk(struct dvb_frontend *fe)
{
struct m88rs6000t_dev *dev = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u8 reg11, reg15, reg16, reg1D, reg1E, reg1F;
u8 N, f0 = 0, f1 = 0, f2 = 0, f3 = 0;
u16 pll_div_fb;
u32 div, ts_mclk;
unsigned int utmp;
int ret;
/* select demod main mclk */
ret = regmap_read(dev->regmap, 0x15, &utmp);
if (ret)
goto err;
reg15 = utmp;
if (c->symbol_rate > 45010000) {
reg11 = 0x0E;
reg15 |= 0x02;
reg16 = 115; /* mclk = 110.25MHz */
} else {
reg11 = 0x0A;
reg15 &= ~0x02;
reg16 = 96; /* mclk = 96MHz */
}
/* set ts mclk */
if (c->delivery_system == SYS_DVBS)
ts_mclk = 96000;
else
ts_mclk = 144000;
pll_div_fb = (reg15 & 0x01) << 8;
pll_div_fb += reg16;
pll_div_fb += 32;
div = 36000 * pll_div_fb;
div /= ts_mclk;
if (div <= 32) {
N = 2;
f0 = 0;
f1 = div / 2;
f2 = div - f1;
f3 = 0;
} else if (div <= 48) {
N = 3;
f0 = div / 3;
f1 = (div - f0) / 2;
f2 = div - f0 - f1;
f3 = 0;
} else if (div <= 64) {
N = 4;
f0 = div / 4;
f1 = (div - f0) / 3;
f2 = (div - f0 - f1) / 2;
f3 = div - f0 - f1 - f2;
} else {
N = 4;
f0 = 16;
f1 = 16;
f2 = 16;
f3 = 16;
}
if (f0 == 16)
f0 = 0;
if (f1 == 16)
f1 = 0;
if (f2 == 16)
f2 = 0;
if (f3 == 16)
f3 = 0;
ret = regmap_read(dev->regmap, 0x1D, &utmp);
if (ret)
goto err;
reg1D = utmp;
reg1D &= ~0x03;
reg1D |= N - 1;
reg1E = ((f3 << 4) + f2) & 0xFF;
reg1F = ((f1 << 4) + f0) & 0xFF;
/* program and recalibrate demod PLL */
ret = regmap_write(dev->regmap, 0x05, 0x40);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x11, 0x08);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x15, reg15);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x16, reg16);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x1D, reg1D);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x1E, reg1E);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x1F, reg1F);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x17, 0xc1);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x17, 0x81);
if (ret)
goto err;
usleep_range(5000, 50000);
ret = regmap_write(dev->regmap, 0x05, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x11, reg11);
if (ret)
goto err;
usleep_range(5000, 50000);
err:
if (ret)
dev_dbg(&dev->client->dev, "failed=%d\n", ret);
return ret;
}
static int m88rs6000t_set_pll_freq(struct m88rs6000t_dev *dev,
u32 tuner_freq_MHz)
{
u32 fcry_KHz, ulNDiv1, ulNDiv2, ulNDiv;
u8 refDiv, ucLoDiv1, ucLomod1, ucLoDiv2, ucLomod2, ucLoDiv, ucLomod;
u8 reg27, reg29, reg42, reg42buf;
unsigned int utmp;
int ret;
fcry_KHz = 27000; /* in kHz */
refDiv = 27;
ret = regmap_write(dev->regmap, 0x36, (refDiv - 8));
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x31, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x2c, 0x02);
if (ret)
goto err;
if (tuner_freq_MHz >= 1550) {
ucLoDiv1 = 2;
ucLomod1 = 0;
ucLoDiv2 = 2;
ucLomod2 = 0;
} else if (tuner_freq_MHz >= 1380) {
ucLoDiv1 = 3;
ucLomod1 = 16;
ucLoDiv2 = 2;
ucLomod2 = 0;
} else if (tuner_freq_MHz >= 1070) {
ucLoDiv1 = 3;
ucLomod1 = 16;
ucLoDiv2 = 3;
ucLomod2 = 16;
} else if (tuner_freq_MHz >= 1000) {
ucLoDiv1 = 3;
ucLomod1 = 16;
ucLoDiv2 = 4;
ucLomod2 = 64;
} else if (tuner_freq_MHz >= 775) {
ucLoDiv1 = 4;
ucLomod1 = 64;
ucLoDiv2 = 4;
ucLomod2 = 64;
} else if (tuner_freq_MHz >= 700) {
ucLoDiv1 = 6;
ucLomod1 = 48;
ucLoDiv2 = 4;
ucLomod2 = 64;
} else if (tuner_freq_MHz >= 520) {
ucLoDiv1 = 6;
ucLomod1 = 48;
ucLoDiv2 = 6;
ucLomod2 = 48;
} else {
ucLoDiv1 = 8;
ucLomod1 = 96;
ucLoDiv2 = 8;
ucLomod2 = 96;
}
ulNDiv1 = ((tuner_freq_MHz * ucLoDiv1 * 1000) * refDiv
/ fcry_KHz - 1024) / 2;
ulNDiv2 = ((tuner_freq_MHz * ucLoDiv2 * 1000) * refDiv
/ fcry_KHz - 1024) / 2;
reg27 = (((ulNDiv1 >> 8) & 0x0F) + ucLomod1) & 0x7F;
ret = regmap_write(dev->regmap, 0x27, reg27);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x28, (u8)(ulNDiv1 & 0xFF));
if (ret)
goto err;
reg29 = (((ulNDiv2 >> 8) & 0x0F) + ucLomod2) & 0x7f;
ret = regmap_write(dev->regmap, 0x29, reg29);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x2a, (u8)(ulNDiv2 & 0xFF));
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x2F, 0xf5);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x30, 0x05);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x08, 0x1f);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x08, 0x3f);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x09, 0x20);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x09, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x3e, 0x11);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x08, 0x2f);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x08, 0x3f);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x09, 0x10);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x09, 0x00);
if (ret)
goto err;
usleep_range(2000, 50000);
ret = regmap_read(dev->regmap, 0x42, &utmp);
if (ret)
goto err;
reg42 = utmp;
ret = regmap_write(dev->regmap, 0x3e, 0x10);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x08, 0x2f);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x08, 0x3f);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x09, 0x10);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x09, 0x00);
if (ret)
goto err;
usleep_range(2000, 50000);
ret = regmap_read(dev->regmap, 0x42, &utmp);
if (ret)
goto err;
reg42buf = utmp;
if (reg42buf < reg42) {
ret = regmap_write(dev->regmap, 0x3e, 0x11);
if (ret)
goto err;
}
usleep_range(5000, 50000);
ret = regmap_read(dev->regmap, 0x2d, &utmp);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x2d, utmp);
if (ret)
goto err;
ret = regmap_read(dev->regmap, 0x2e, &utmp);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x2e, utmp);
if (ret)
goto err;
ret = regmap_read(dev->regmap, 0x27, &utmp);
if (ret)
goto err;
reg27 = utmp & 0x70;
ret = regmap_read(dev->regmap, 0x83, &utmp);
if (ret)
goto err;
if (reg27 == (utmp & 0x70)) {
ucLoDiv = ucLoDiv1;
ulNDiv = ulNDiv1;
ucLomod = ucLomod1 / 16;
} else {
ucLoDiv = ucLoDiv2;
ulNDiv = ulNDiv2;
ucLomod = ucLomod2 / 16;
}
if ((ucLoDiv == 3) || (ucLoDiv == 6)) {
refDiv = 18;
ret = regmap_write(dev->regmap, 0x36, (refDiv - 8));
if (ret)
goto err;
ulNDiv = ((tuner_freq_MHz * ucLoDiv * 1000) * refDiv
/ fcry_KHz - 1024) / 2;
}
reg27 = (0x80 + ((ucLomod << 4) & 0x70)
+ ((ulNDiv >> 8) & 0x0F)) & 0xFF;
ret = regmap_write(dev->regmap, 0x27, reg27);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x28, (u8)(ulNDiv & 0xFF));
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x29, 0x80);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x31, 0x03);
if (ret)
goto err;
if (ucLoDiv == 3)
utmp = 0xCE;
else
utmp = 0x8A;
ret = regmap_write(dev->regmap, 0x3b, utmp);
if (ret)
goto err;
dev->frequency_khz = fcry_KHz * (ulNDiv * 2 + 1024) / refDiv / ucLoDiv;
dev_dbg(&dev->client->dev,
"actual tune frequency=%d\n", dev->frequency_khz);
err:
if (ret)
dev_dbg(&dev->client->dev, "failed=%d\n", ret);
return ret;
}
static int m88rs6000t_set_bb(struct m88rs6000t_dev *dev,
u32 symbol_rate_KSs, s32 lpf_offset_KHz)
{
u32 f3dB;
u8 reg40;
f3dB = symbol_rate_KSs * 9 / 14 + 2000;
f3dB += lpf_offset_KHz;
f3dB = clamp_val(f3dB, 6000U, 43000U);
reg40 = f3dB / 1000;
return regmap_write(dev->regmap, 0x40, reg40);
}
static int m88rs6000t_set_params(struct dvb_frontend *fe)
{
struct m88rs6000t_dev *dev = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
s32 lpf_offset_KHz;
u32 realFreq, freq_MHz;
dev_dbg(&dev->client->dev,
"frequency=%d symbol_rate=%d\n",
c->frequency, c->symbol_rate);
if (c->symbol_rate < 5000000)
lpf_offset_KHz = 3000;
else
lpf_offset_KHz = 0;
realFreq = c->frequency + lpf_offset_KHz;
/* set tuner pll.*/
freq_MHz = (realFreq + 500) / 1000;
ret = m88rs6000t_set_pll_freq(dev, freq_MHz);
if (ret)
goto err;
ret = m88rs6000t_set_bb(dev, c->symbol_rate / 1000, lpf_offset_KHz);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x00, 0x01);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x00, 0x00);
if (ret)
goto err;
/* set demod mlck */
ret = m88rs6000t_set_demod_mclk(fe);
err:
if (ret)
dev_dbg(&dev->client->dev, "failed=%d\n", ret);
return ret;
}
static int m88rs6000t_init(struct dvb_frontend *fe)
{
struct m88rs6000t_dev *dev = fe->tuner_priv;
int ret;
dev_dbg(&dev->client->dev, "%s:\n", __func__);
ret = regmap_update_bits(dev->regmap, 0x11, 0x08, 0x08);
if (ret)
goto err;
usleep_range(5000, 50000);
ret = regmap_update_bits(dev->regmap, 0x10, 0x01, 0x01);
if (ret)
goto err;
usleep_range(10000, 50000);
ret = regmap_write(dev->regmap, 0x07, 0x7d);
err:
if (ret)
dev_dbg(&dev->client->dev, "failed=%d\n", ret);
return ret;
}
static int m88rs6000t_sleep(struct dvb_frontend *fe)
{
struct m88rs6000t_dev *dev = fe->tuner_priv;
int ret;
dev_dbg(&dev->client->dev, "%s:\n", __func__);
ret = regmap_write(dev->regmap, 0x07, 0x6d);
if (ret) {
dev_dbg(&dev->client->dev, "failed=%d\n", ret);
return ret;
}
usleep_range(5000, 10000);
return 0;
}
static int m88rs6000t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct m88rs6000t_dev *dev = fe->tuner_priv;
dev_dbg(&dev->client->dev, "\n");
*frequency = dev->frequency_khz;
return 0;
}
static int m88rs6000t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct m88rs6000t_dev *dev = fe->tuner_priv;
dev_dbg(&dev->client->dev, "\n");
*frequency = 0; /* Zero-IF */
return 0;
}
static int m88rs6000t_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
{
struct m88rs6000t_dev *dev = fe->tuner_priv;
unsigned int val, i;
int ret;
u16 gain;
u32 PGA2_cri_GS = 46, PGA2_crf_GS = 290, TIA_GS = 290;
u32 RF_GC = 1200, IF_GC = 1100, BB_GC = 300;
u32 PGA2_GC = 300, TIA_GC = 300, PGA2_cri = 0, PGA2_crf = 0;
u32 RFG = 0, IFG = 0, BBG = 0, PGA2G = 0, TIAG = 0;
u32 RFGS[13] = {0, 245, 266, 268, 270, 285,
298, 295, 283, 285, 285, 300, 300};
u32 IFGS[12] = {0, 300, 230, 270, 270, 285,
295, 285, 290, 295, 295, 310};
u32 BBGS[14] = {0, 286, 275, 290, 294, 300, 290,
290, 285, 283, 260, 295, 290, 260};
ret = regmap_read(dev->regmap, 0x5A, &val);
if (ret)
goto err;
RF_GC = val & 0x0f;
ret = regmap_read(dev->regmap, 0x5F, &val);
if (ret)
goto err;
IF_GC = val & 0x0f;
ret = regmap_read(dev->regmap, 0x3F, &val);
if (ret)
goto err;
TIA_GC = (val >> 4) & 0x07;
ret = regmap_read(dev->regmap, 0x77, &val);
if (ret)
goto err;
BB_GC = (val >> 4) & 0x0f;
ret = regmap_read(dev->regmap, 0x76, &val);
if (ret)
goto err;
PGA2_GC = val & 0x3f;
PGA2_cri = PGA2_GC >> 2;
PGA2_crf = PGA2_GC & 0x03;
for (i = 0; i <= RF_GC && i < ARRAY_SIZE(RFGS); i++)
RFG += RFGS[i];
if (RF_GC == 0)
RFG += 400;
if (RF_GC == 1)
RFG += 300;
if (RF_GC == 2)
RFG += 200;
if (RF_GC == 3)
RFG += 100;
for (i = 0; i <= IF_GC && i < ARRAY_SIZE(IFGS); i++)
IFG += IFGS[i];
TIAG = TIA_GC * TIA_GS;
for (i = 0; i <= BB_GC && i < ARRAY_SIZE(BBGS); i++)
BBG += BBGS[i];
PGA2G = PGA2_cri * PGA2_cri_GS + PGA2_crf * PGA2_crf_GS;
gain = RFG + IFG - TIAG + BBG + PGA2G;
/* scale value to 0x0000-0xffff */
gain = clamp_val(gain, 1000U, 10500U);
*strength = (10500 - gain) * 0xffff / (10500 - 1000);
err:
if (ret)
dev_dbg(&dev->client->dev, "failed=%d\n", ret);
return ret;
}
static const struct dvb_tuner_ops m88rs6000t_tuner_ops = {
.info = {
.name = "Montage M88RS6000 Internal Tuner",
.frequency_min_hz = 950 * MHz,
.frequency_max_hz = 2150 * MHz,
},
.init = m88rs6000t_init,
.sleep = m88rs6000t_sleep,
.set_params = m88rs6000t_set_params,
.get_frequency = m88rs6000t_get_frequency,
.get_if_frequency = m88rs6000t_get_if_frequency,
.get_rf_strength = m88rs6000t_get_rf_strength,
};
static int m88rs6000t_probe(struct i2c_client *client)
{
struct m88rs6000t_config *cfg = client->dev.platform_data;
struct dvb_frontend *fe = cfg->fe;
struct m88rs6000t_dev *dev;
int ret, i;
unsigned int utmp;
static const struct regmap_config regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static const struct m88rs6000t_reg_val reg_vals[] = {
{0x10, 0xfb},
{0x24, 0x38},
{0x11, 0x0a},
{0x12, 0x00},
{0x2b, 0x1c},
{0x44, 0x48},
{0x54, 0x24},
{0x55, 0x06},
{0x59, 0x00},
{0x5b, 0x4c},
{0x60, 0x8b},
{0x61, 0xf4},
{0x65, 0x07},
{0x6d, 0x6f},
{0x6e, 0x31},
{0x3c, 0xf3},
{0x37, 0x0f},
{0x48, 0x28},
{0x49, 0xd8},
{0x70, 0x66},
{0x71, 0xCF},
{0x72, 0x81},
{0x73, 0xA7},
{0x74, 0x4F},
{0x75, 0xFC},
};
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
dev_err(&client->dev, "kzalloc() failed\n");
goto err;
}
memcpy(&dev->cfg, cfg, sizeof(struct m88rs6000t_config));
dev->client = client;
dev->regmap = devm_regmap_init_i2c(client, ®map_config);
if (IS_ERR(dev->regmap)) {
ret = PTR_ERR(dev->regmap);
goto err;
}
ret = regmap_update_bits(dev->regmap, 0x11, 0x08, 0x08);
if (ret)
goto err;
usleep_range(5000, 50000);
ret = regmap_update_bits(dev->regmap, 0x10, 0x01, 0x01);
if (ret)
goto err;
usleep_range(10000, 50000);
ret = regmap_write(dev->regmap, 0x07, 0x7d);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x04, 0x01);
if (ret)
goto err;
/* check tuner chip id */
ret = regmap_read(dev->regmap, 0x01, &utmp);
if (ret)
goto err;
dev_info(&dev->client->dev, "chip_id=%02x\n", utmp);
if (utmp != 0x64) {
ret = -ENODEV;
goto err;
}
/* tuner init. */
ret = regmap_write(dev->regmap, 0x05, 0x40);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x11, 0x08);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x15, 0x6c);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x17, 0xc1);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x17, 0x81);
if (ret)
goto err;
usleep_range(10000, 50000);
ret = regmap_write(dev->regmap, 0x05, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap, 0x11, 0x0a);
if (ret)
goto err;
for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
ret = regmap_write(dev->regmap,
reg_vals[i].reg, reg_vals[i].val);
if (ret)
goto err;
}
dev_info(&dev->client->dev, "Montage M88RS6000 internal tuner successfully identified\n");
fe->tuner_priv = dev;
memcpy(&fe->ops.tuner_ops, &m88rs6000t_tuner_ops,
sizeof(struct dvb_tuner_ops));
i2c_set_clientdata(client, dev);
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
kfree(dev);
return ret;
}
static void m88rs6000t_remove(struct i2c_client *client)
{
struct m88rs6000t_dev *dev = i2c_get_clientdata(client);
struct dvb_frontend *fe = dev->cfg.fe;
dev_dbg(&client->dev, "\n");
memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
fe->tuner_priv = NULL;
kfree(dev);
}
static const struct i2c_device_id m88rs6000t_id[] = {
{"m88rs6000t", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, m88rs6000t_id);
static struct i2c_driver m88rs6000t_driver = {
.driver = {
.name = "m88rs6000t",
},
.probe = m88rs6000t_probe,
.remove = m88rs6000t_remove,
.id_table = m88rs6000t_id,
};
module_i2c_driver(m88rs6000t_driver);
MODULE_AUTHOR("Max nibble <[email protected]>");
MODULE_DESCRIPTION("Montage M88RS6000 internal tuner driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/m88rs6000t.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Microtune MT2266 "Direct conversion low power broadband tuner"
*
* Copyright (c) 2007 Olivier DANET <[email protected]>
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/dvb/frontend.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <media/dvb_frontend.h>
#include "mt2266.h"
#define I2C_ADDRESS 0x60
#define REG_PART_REV 0
#define REG_TUNE 1
#define REG_BAND 6
#define REG_BANDWIDTH 8
#define REG_LOCK 0x12
#define PART_REV 0x85
struct mt2266_priv {
struct mt2266_config *cfg;
struct i2c_adapter *i2c;
u32 frequency;
u32 bandwidth;
u8 band;
};
#define MT2266_VHF 1
#define MT2266_UHF 0
/* Here, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
#define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2266: " args); printk("\n"); }} while (0)
// Reads a single register
static int mt2266_readreg(struct mt2266_priv *priv, u8 reg, u8 *val)
{
struct i2c_msg msg[2] = {
{ .addr = priv->cfg->i2c_address, .flags = 0, .buf = ®, .len = 1 },
{ .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 },
};
if (i2c_transfer(priv->i2c, msg, 2) != 2) {
printk(KERN_WARNING "MT2266 I2C read failed\n");
return -EREMOTEIO;
}
return 0;
}
// Writes a single register
static int mt2266_writereg(struct mt2266_priv *priv, u8 reg, u8 val)
{
u8 buf[2] = { reg, val };
struct i2c_msg msg = {
.addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2
};
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
printk(KERN_WARNING "MT2266 I2C write failed\n");
return -EREMOTEIO;
}
return 0;
}
// Writes a set of consecutive registers
static int mt2266_writeregs(struct mt2266_priv *priv,u8 *buf, u8 len)
{
struct i2c_msg msg = {
.addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = len
};
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
printk(KERN_WARNING "MT2266 I2C write failed (len=%i)\n",(int)len);
return -EREMOTEIO;
}
return 0;
}
// Initialisation sequences
static u8 mt2266_init1[] = { REG_TUNE, 0x00, 0x00, 0x28,
0x00, 0x52, 0x99, 0x3f };
static u8 mt2266_init2[] = {
0x17, 0x6d, 0x71, 0x61, 0xc0, 0xbf, 0xff, 0xdc, 0x00, 0x0a, 0xd4,
0x03, 0x64, 0x64, 0x64, 0x64, 0x22, 0xaa, 0xf2, 0x1e, 0x80, 0x14,
0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x7f, 0x5e, 0x3f, 0xff, 0xff,
0xff, 0x00, 0x77, 0x0f, 0x2d
};
static u8 mt2266_init_8mhz[] = { REG_BANDWIDTH, 0x22, 0x22, 0x22, 0x22,
0x22, 0x22, 0x22, 0x22 };
static u8 mt2266_init_7mhz[] = { REG_BANDWIDTH, 0x32, 0x32, 0x32, 0x32,
0x32, 0x32, 0x32, 0x32 };
static u8 mt2266_init_6mhz[] = { REG_BANDWIDTH, 0xa7, 0xa7, 0xa7, 0xa7,
0xa7, 0xa7, 0xa7, 0xa7 };
static u8 mt2266_uhf[] = { 0x1d, 0xdc, 0x00, 0x0a, 0xd4, 0x03, 0x64, 0x64,
0x64, 0x64, 0x22, 0xaa, 0xf2, 0x1e, 0x80, 0x14 };
static u8 mt2266_vhf[] = { 0x1d, 0xfe, 0x00, 0x00, 0xb4, 0x03, 0xa5, 0xa5,
0xa5, 0xa5, 0x82, 0xaa, 0xf1, 0x17, 0x80, 0x1f };
#define FREF 30000 // Quartz oscillator 30 MHz
static int mt2266_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct mt2266_priv *priv;
int ret=0;
u32 freq;
u32 tune;
u8 lnaband;
u8 b[10];
int i;
u8 band;
priv = fe->tuner_priv;
freq = priv->frequency / 1000; /* Hz -> kHz */
if (freq < 470000 && freq > 230000)
return -EINVAL; /* Gap between VHF and UHF bands */
priv->frequency = c->frequency;
tune = 2 * freq * (8192/16) / (FREF/16);
band = (freq < 300000) ? MT2266_VHF : MT2266_UHF;
if (band == MT2266_VHF)
tune *= 2;
switch (c->bandwidth_hz) {
case 6000000:
mt2266_writeregs(priv, mt2266_init_6mhz,
sizeof(mt2266_init_6mhz));
break;
case 8000000:
mt2266_writeregs(priv, mt2266_init_8mhz,
sizeof(mt2266_init_8mhz));
break;
case 7000000:
default:
mt2266_writeregs(priv, mt2266_init_7mhz,
sizeof(mt2266_init_7mhz));
break;
}
priv->bandwidth = c->bandwidth_hz;
if (band == MT2266_VHF && priv->band == MT2266_UHF) {
dprintk("Switch from UHF to VHF");
mt2266_writereg(priv, 0x05, 0x04);
mt2266_writereg(priv, 0x19, 0x61);
mt2266_writeregs(priv, mt2266_vhf, sizeof(mt2266_vhf));
} else if (band == MT2266_UHF && priv->band == MT2266_VHF) {
dprintk("Switch from VHF to UHF");
mt2266_writereg(priv, 0x05, 0x52);
mt2266_writereg(priv, 0x19, 0x61);
mt2266_writeregs(priv, mt2266_uhf, sizeof(mt2266_uhf));
}
msleep(10);
if (freq <= 495000)
lnaband = 0xEE;
else if (freq <= 525000)
lnaband = 0xDD;
else if (freq <= 550000)
lnaband = 0xCC;
else if (freq <= 580000)
lnaband = 0xBB;
else if (freq <= 605000)
lnaband = 0xAA;
else if (freq <= 630000)
lnaband = 0x99;
else if (freq <= 655000)
lnaband = 0x88;
else if (freq <= 685000)
lnaband = 0x77;
else if (freq <= 710000)
lnaband = 0x66;
else if (freq <= 735000)
lnaband = 0x55;
else if (freq <= 765000)
lnaband = 0x44;
else if (freq <= 802000)
lnaband = 0x33;
else if (freq <= 840000)
lnaband = 0x22;
else
lnaband = 0x11;
b[0] = REG_TUNE;
b[1] = (tune >> 8) & 0x1F;
b[2] = tune & 0xFF;
b[3] = tune >> 13;
mt2266_writeregs(priv,b,4);
dprintk("set_parms: tune=%d band=%d %s",
(int) tune, (int) lnaband,
(band == MT2266_UHF) ? "UHF" : "VHF");
dprintk("set_parms: [1..3]: %2x %2x %2x",
(int) b[1], (int) b[2], (int)b[3]);
if (band == MT2266_UHF) {
b[0] = 0x05;
b[1] = (priv->band == MT2266_VHF) ? 0x52 : 0x62;
b[2] = lnaband;
mt2266_writeregs(priv, b, 3);
}
/* Wait for pll lock or timeout */
i = 0;
do {
mt2266_readreg(priv,REG_LOCK,b);
if (b[0] & 0x40)
break;
msleep(10);
i++;
} while (i<10);
dprintk("Lock when i=%i",(int)i);
if (band == MT2266_UHF && priv->band == MT2266_VHF)
mt2266_writereg(priv, 0x05, 0x62);
priv->band = band;
return ret;
}
static void mt2266_calibrate(struct mt2266_priv *priv)
{
mt2266_writereg(priv, 0x11, 0x03);
mt2266_writereg(priv, 0x11, 0x01);
mt2266_writeregs(priv, mt2266_init1, sizeof(mt2266_init1));
mt2266_writeregs(priv, mt2266_init2, sizeof(mt2266_init2));
mt2266_writereg(priv, 0x33, 0x5e);
mt2266_writereg(priv, 0x10, 0x10);
mt2266_writereg(priv, 0x10, 0x00);
mt2266_writeregs(priv, mt2266_init_8mhz, sizeof(mt2266_init_8mhz));
msleep(25);
mt2266_writereg(priv, 0x17, 0x6d);
mt2266_writereg(priv, 0x1c, 0x00);
msleep(75);
mt2266_writereg(priv, 0x17, 0x6d);
mt2266_writereg(priv, 0x1c, 0xff);
}
static int mt2266_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct mt2266_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int mt2266_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct mt2266_priv *priv = fe->tuner_priv;
*bandwidth = priv->bandwidth;
return 0;
}
static int mt2266_init(struct dvb_frontend *fe)
{
int ret;
struct mt2266_priv *priv = fe->tuner_priv;
ret = mt2266_writereg(priv, 0x17, 0x6d);
if (ret < 0)
return ret;
ret = mt2266_writereg(priv, 0x1c, 0xff);
if (ret < 0)
return ret;
return 0;
}
static int mt2266_sleep(struct dvb_frontend *fe)
{
struct mt2266_priv *priv = fe->tuner_priv;
mt2266_writereg(priv, 0x17, 0x6d);
mt2266_writereg(priv, 0x1c, 0x00);
return 0;
}
static void mt2266_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static const struct dvb_tuner_ops mt2266_tuner_ops = {
.info = {
.name = "Microtune MT2266",
.frequency_min_hz = 174 * MHz,
.frequency_max_hz = 862 * MHz,
.frequency_step_hz = 50 * kHz,
},
.release = mt2266_release,
.init = mt2266_init,
.sleep = mt2266_sleep,
.set_params = mt2266_set_params,
.get_frequency = mt2266_get_frequency,
.get_bandwidth = mt2266_get_bandwidth
};
struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg)
{
struct mt2266_priv *priv = NULL;
u8 id = 0;
priv = kzalloc(sizeof(struct mt2266_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
priv->cfg = cfg;
priv->i2c = i2c;
priv->band = MT2266_UHF;
if (mt2266_readreg(priv, 0, &id)) {
kfree(priv);
return NULL;
}
if (id != PART_REV) {
kfree(priv);
return NULL;
}
printk(KERN_INFO "MT2266: successfully identified\n");
memcpy(&fe->ops.tuner_ops, &mt2266_tuner_ops, sizeof(struct dvb_tuner_ops));
fe->tuner_priv = priv;
mt2266_calibrate(priv);
return fe;
}
EXPORT_SYMBOL_GPL(mt2266_attach);
MODULE_AUTHOR("Olivier DANET");
MODULE_DESCRIPTION("Microtune MT2266 silicon tuner driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/mt2266.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
*
* Copyright (c) 2007 Xceive Corporation
* Copyright (c) 2007 Steven Toth <[email protected]>
* Copyright (c) 2009 Devin Heitmueller <[email protected]>
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/videodev2.h>
#include <linux/delay.h>
#include <linux/workqueue.h>
#include <linux/dvb/frontend.h>
#include <linux/i2c.h>
#include <media/dvb_frontend.h>
#include "xc5000.h"
#include "tuner-i2c.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
static int no_poweroff;
module_param(no_poweroff, int, 0644);
MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
"\t\t1 keep device energized and with tuner ready all the times.\n"
"\t\tFaster, but consumes more power and keeps the device hotter");
static DEFINE_MUTEX(xc5000_list_mutex);
static LIST_HEAD(hybrid_tuner_instance_list);
#define dprintk(level, fmt, arg...) if (debug >= level) \
printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)
struct xc5000_priv {
struct tuner_i2c_props i2c_props;
struct list_head hybrid_tuner_instance_list;
u32 if_khz;
u16 xtal_khz;
u32 freq_hz, freq_offset;
u32 bandwidth;
u8 video_standard;
unsigned int mode;
u8 rf_mode;
u8 radio_input;
u16 output_amp;
int chip_id;
u16 pll_register_no;
u8 init_status_supported;
u8 fw_checksum_supported;
struct dvb_frontend *fe;
struct delayed_work timer_sleep;
const struct firmware *firmware;
};
/* Misc Defines */
#define MAX_TV_STANDARD 24
#define XC_MAX_I2C_WRITE_LENGTH 64
/* Time to suspend after the .sleep callback is called */
#define XC5000_SLEEP_TIME 5000 /* ms */
/* Signal Types */
#define XC_RF_MODE_AIR 0
#define XC_RF_MODE_CABLE 1
/* Product id */
#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
#define XC_PRODUCT_ID_FW_LOADED 0x1388
/* Registers */
#define XREG_INIT 0x00
#define XREG_VIDEO_MODE 0x01
#define XREG_AUDIO_MODE 0x02
#define XREG_RF_FREQ 0x03
#define XREG_D_CODE 0x04
#define XREG_IF_OUT 0x05
#define XREG_SEEK_MODE 0x07
#define XREG_POWER_DOWN 0x0A /* Obsolete */
/* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */
#define XREG_OUTPUT_AMP 0x0B
#define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */
#define XREG_SMOOTHEDCVBS 0x0E
#define XREG_XTALFREQ 0x0F
#define XREG_FINERFREQ 0x10
#define XREG_DDIMODE 0x11
#define XREG_ADC_ENV 0x00
#define XREG_QUALITY 0x01
#define XREG_FRAME_LINES 0x02
#define XREG_HSYNC_FREQ 0x03
#define XREG_LOCK 0x04
#define XREG_FREQ_ERROR 0x05
#define XREG_SNR 0x06
#define XREG_VERSION 0x07
#define XREG_PRODUCT_ID 0x08
#define XREG_BUSY 0x09
#define XREG_BUILD 0x0D
#define XREG_TOTALGAIN 0x0F
#define XREG_FW_CHECKSUM 0x12
#define XREG_INIT_STATUS 0x13
/*
Basic firmware description. This will remain with
the driver for documentation purposes.
This represents an I2C firmware file encoded as a
string of unsigned char. Format is as follows:
char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
char[1 ]=len0_LSB -> length of first write transaction
char[2 ]=data0 -> first byte to be sent
char[3 ]=data1
char[4 ]=data2
char[ ]=...
char[M ]=dataN -> last byte to be sent
char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
char[M+2]=len1_LSB -> length of second write transaction
char[M+3]=data0
char[M+4]=data1
...
etc.
The [len] value should be interpreted as follows:
len= len_MSB _ len_LSB
len=1111_1111_1111_1111 : End of I2C_SEQUENCE
len=0000_0000_0000_0000 : Reset command: Do hardware reset
len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
For the RESET and WAIT commands, the two following bytes will contain
immediately the length of the following transaction.
*/
struct XC_TV_STANDARD {
char *name;
u16 audio_mode;
u16 video_mode;
};
/* Tuner standards */
#define MN_NTSC_PAL_BTSC 0
#define MN_NTSC_PAL_A2 1
#define MN_NTSC_PAL_EIAJ 2
#define MN_NTSC_PAL_MONO 3
#define BG_PAL_A2 4
#define BG_PAL_NICAM 5
#define BG_PAL_MONO 6
#define I_PAL_NICAM 7
#define I_PAL_NICAM_MONO 8
#define DK_PAL_A2 9
#define DK_PAL_NICAM 10
#define DK_PAL_MONO 11
#define DK_SECAM_A2DK1 12
#define DK_SECAM_A2LDK3 13
#define DK_SECAM_A2MONO 14
#define L_SECAM_NICAM 15
#define LC_SECAM_NICAM 16
#define DTV6 17
#define DTV8 18
#define DTV7_8 19
#define DTV7 20
#define FM_RADIO_INPUT2 21
#define FM_RADIO_INPUT1 22
#define FM_RADIO_INPUT1_MONO 23
static struct XC_TV_STANDARD xc5000_standard[MAX_TV_STANDARD] = {
{"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020},
{"M/N-NTSC/PAL-A2", 0x0600, 0x8020},
{"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020},
{"M/N-NTSC/PAL-Mono", 0x0478, 0x8020},
{"B/G-PAL-A2", 0x0A00, 0x8049},
{"B/G-PAL-NICAM", 0x0C04, 0x8049},
{"B/G-PAL-MONO", 0x0878, 0x8059},
{"I-PAL-NICAM", 0x1080, 0x8009},
{"I-PAL-NICAM-MONO", 0x0E78, 0x8009},
{"D/K-PAL-A2", 0x1600, 0x8009},
{"D/K-PAL-NICAM", 0x0E80, 0x8009},
{"D/K-PAL-MONO", 0x1478, 0x8009},
{"D/K-SECAM-A2 DK1", 0x1200, 0x8009},
{"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009},
{"D/K-SECAM-A2 MONO", 0x1478, 0x8009},
{"L-SECAM-NICAM", 0x8E82, 0x0009},
{"L'-SECAM-NICAM", 0x8E82, 0x4009},
{"DTV6", 0x00C0, 0x8002},
{"DTV8", 0x00C0, 0x800B},
{"DTV7/8", 0x00C0, 0x801B},
{"DTV7", 0x00C0, 0x8007},
{"FM Radio-INPUT2", 0x9802, 0x9002},
{"FM Radio-INPUT1", 0x0208, 0x9002},
{"FM Radio-INPUT1_MONO", 0x0278, 0x9002}
};
struct xc5000_fw_cfg {
char *name;
u16 size;
u16 pll_reg;
u8 init_status_supported;
u8 fw_checksum_supported;
};
#define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw"
static const struct xc5000_fw_cfg xc5000a_1_6_114 = {
.name = XC5000A_FIRMWARE,
.size = 12401,
.pll_reg = 0x806c,
};
#define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw"
static const struct xc5000_fw_cfg xc5000c_41_024_5 = {
.name = XC5000C_FIRMWARE,
.size = 16497,
.pll_reg = 0x13,
.init_status_supported = 1,
.fw_checksum_supported = 1,
};
static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id)
{
switch (chip_id) {
default:
case XC5000A:
return &xc5000a_1_6_114;
case XC5000C:
return &xc5000c_41_024_5;
}
}
static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force);
static int xc5000_is_firmware_loaded(struct dvb_frontend *fe);
static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val);
static int xc5000_tuner_reset(struct dvb_frontend *fe);
static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
{
struct i2c_msg msg = { .addr = priv->i2c_props.addr,
.flags = 0, .buf = buf, .len = len };
if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len);
return -EREMOTEIO;
}
return 0;
}
#if 0
/* This routine is never used because the only time we read data from the
i2c bus is when we read registers, and we want that to be an atomic i2c
transaction in case we are on a multi-master bus */
static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
{
struct i2c_msg msg = { .addr = priv->i2c_props.addr,
.flags = I2C_M_RD, .buf = buf, .len = len };
if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len);
return -EREMOTEIO;
}
return 0;
}
#endif
static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
{
u8 buf[2] = { reg >> 8, reg & 0xff };
u8 bval[2] = { 0, 0 };
struct i2c_msg msg[2] = {
{ .addr = priv->i2c_props.addr,
.flags = 0, .buf = &buf[0], .len = 2 },
{ .addr = priv->i2c_props.addr,
.flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
};
if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
printk(KERN_WARNING "xc5000: I2C read failed\n");
return -EREMOTEIO;
}
*val = (bval[0] << 8) | bval[1];
return 0;
}
static int xc5000_tuner_reset(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret;
dprintk(1, "%s()\n", __func__);
if (fe->callback) {
ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
fe->dvb->priv :
priv->i2c_props.adap->algo_data,
DVB_FRONTEND_COMPONENT_TUNER,
XC5000_TUNER_RESET, 0);
if (ret) {
printk(KERN_ERR "xc5000: reset failed\n");
return ret;
}
} else {
printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");
return -EINVAL;
}
return 0;
}
static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data)
{
u8 buf[4];
int watch_dog_timer = 100;
int result;
buf[0] = (reg_addr >> 8) & 0xFF;
buf[1] = reg_addr & 0xFF;
buf[2] = (i2c_data >> 8) & 0xFF;
buf[3] = i2c_data & 0xFF;
result = xc_send_i2c_data(priv, buf, 4);
if (result == 0) {
/* wait for busy flag to clear */
while ((watch_dog_timer > 0) && (result == 0)) {
result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf);
if (result == 0) {
if ((buf[0] == 0) && (buf[1] == 0)) {
/* busy flag cleared */
break;
} else {
msleep(5); /* wait 5 ms */
watch_dog_timer--;
}
}
}
}
if (watch_dog_timer <= 0)
result = -EREMOTEIO;
return result;
}
static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
{
struct xc5000_priv *priv = fe->tuner_priv;
int i, nbytes_to_send, result;
unsigned int len, pos, index;
u8 buf[XC_MAX_I2C_WRITE_LENGTH];
index = 0;
while ((i2c_sequence[index] != 0xFF) ||
(i2c_sequence[index + 1] != 0xFF)) {
len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
if (len == 0x0000) {
/* RESET command */
result = xc5000_tuner_reset(fe);
index += 2;
if (result != 0)
return result;
} else if (len & 0x8000) {
/* WAIT command */
msleep(len & 0x7FFF);
index += 2;
} else {
/* Send i2c data whilst ensuring individual transactions
* do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
*/
index += 2;
buf[0] = i2c_sequence[index];
buf[1] = i2c_sequence[index + 1];
pos = 2;
while (pos < len) {
if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
nbytes_to_send =
XC_MAX_I2C_WRITE_LENGTH;
else
nbytes_to_send = (len - pos + 2);
for (i = 2; i < nbytes_to_send; i++) {
buf[i] = i2c_sequence[index + pos +
i - 2];
}
result = xc_send_i2c_data(priv, buf,
nbytes_to_send);
if (result != 0)
return result;
pos += nbytes_to_send - 2;
}
index += len;
}
}
return 0;
}
static int xc_initialize(struct xc5000_priv *priv)
{
dprintk(1, "%s()\n", __func__);
return xc_write_reg(priv, XREG_INIT, 0);
}
static int xc_set_tv_standard(struct xc5000_priv *priv,
u16 video_mode, u16 audio_mode, u8 radio_mode)
{
int ret;
dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode);
if (radio_mode) {
dprintk(1, "%s() Standard = %s\n",
__func__,
xc5000_standard[radio_mode].name);
} else {
dprintk(1, "%s() Standard = %s\n",
__func__,
xc5000_standard[priv->video_standard].name);
}
ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode);
if (ret == 0)
ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode);
return ret;
}
static int xc_set_signal_source(struct xc5000_priv *priv, u16 rf_mode)
{
dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
rf_mode = XC_RF_MODE_CABLE;
printk(KERN_ERR
"%s(), Invalid mode, defaulting to CABLE",
__func__);
}
return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
}
static const struct dvb_tuner_ops xc5000_tuner_ops;
static int xc_set_rf_frequency(struct xc5000_priv *priv, u32 freq_hz)
{
u16 freq_code;
dprintk(1, "%s(%u)\n", __func__, freq_hz);
if ((freq_hz > xc5000_tuner_ops.info.frequency_max_hz) ||
(freq_hz < xc5000_tuner_ops.info.frequency_min_hz))
return -EINVAL;
freq_code = (u16)(freq_hz / 15625);
/* Starting in firmware version 1.1.44, Xceive recommends using the
FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
only be used for fast scanning for channel lock) */
return xc_write_reg(priv, XREG_FINERFREQ, freq_code);
}
static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz)
{
u32 freq_code = (freq_khz * 1024)/1000;
dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n",
__func__, freq_khz, freq_code);
return xc_write_reg(priv, XREG_IF_OUT, freq_code);
}
static int xc_get_adc_envelope(struct xc5000_priv *priv, u16 *adc_envelope)
{
return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope);
}
static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz)
{
int result;
u16 reg_data;
u32 tmp;
result = xc5000_readreg(priv, XREG_FREQ_ERROR, ®_data);
if (result != 0)
return result;
tmp = (u32)reg_data;
(*freq_error_hz) = (tmp * 15625) / 1000;
return result;
}
static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status)
{
return xc5000_readreg(priv, XREG_LOCK, lock_status);
}
static int xc_get_version(struct xc5000_priv *priv,
u8 *hw_majorversion, u8 *hw_minorversion,
u8 *fw_majorversion, u8 *fw_minorversion)
{
u16 data;
int result;
result = xc5000_readreg(priv, XREG_VERSION, &data);
if (result != 0)
return result;
(*hw_majorversion) = (data >> 12) & 0x0F;
(*hw_minorversion) = (data >> 8) & 0x0F;
(*fw_majorversion) = (data >> 4) & 0x0F;
(*fw_minorversion) = data & 0x0F;
return 0;
}
static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev)
{
return xc5000_readreg(priv, XREG_BUILD, buildrev);
}
static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz)
{
u16 reg_data;
int result;
result = xc5000_readreg(priv, XREG_HSYNC_FREQ, ®_data);
if (result != 0)
return result;
(*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100;
return result;
}
static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines)
{
return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines);
}
static int xc_get_quality(struct xc5000_priv *priv, u16 *quality)
{
return xc5000_readreg(priv, XREG_QUALITY, quality);
}
static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr)
{
return xc5000_readreg(priv, XREG_SNR, snr);
}
static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain)
{
return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain);
}
#define XC_TUNE_ANALOG 0
#define XC_TUNE_DIGITAL 1
static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode)
{
dprintk(1, "%s(%u)\n", __func__, freq_hz);
if (xc_set_rf_frequency(priv, freq_hz) != 0)
return -EREMOTEIO;
return 0;
}
static int xc_set_xtal(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret = 0;
switch (priv->chip_id) {
default:
case XC5000A:
/* 32.000 MHz xtal is default */
break;
case XC5000C:
switch (priv->xtal_khz) {
default:
case 32000:
/* 32.000 MHz xtal is default */
break;
case 31875:
/* 31.875 MHz xtal configuration */
ret = xc_write_reg(priv, 0x000f, 0x8081);
break;
}
break;
}
return ret;
}
static int xc5000_fwupload(struct dvb_frontend *fe,
const struct xc5000_fw_cfg *desired_fw,
const struct firmware *fw)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret;
/* request the firmware, this will block and timeout */
dprintk(1, "waiting for firmware upload (%s)...\n",
desired_fw->name);
priv->pll_register_no = desired_fw->pll_reg;
priv->init_status_supported = desired_fw->init_status_supported;
priv->fw_checksum_supported = desired_fw->fw_checksum_supported;
dprintk(1, "firmware uploading...\n");
ret = xc_load_i2c_sequence(fe, fw->data);
if (!ret) {
ret = xc_set_xtal(fe);
dprintk(1, "Firmware upload complete...\n");
} else
printk(KERN_ERR "xc5000: firmware upload failed...\n");
return ret;
}
static void xc_debug_dump(struct xc5000_priv *priv)
{
u16 adc_envelope;
u32 freq_error_hz = 0;
u16 lock_status;
u32 hsync_freq_hz = 0;
u16 frame_lines;
u16 quality;
u16 snr;
u16 totalgain;
u8 hw_majorversion = 0, hw_minorversion = 0;
u8 fw_majorversion = 0, fw_minorversion = 0;
u16 fw_buildversion = 0;
u16 regval;
/* Wait for stats to stabilize.
* Frame Lines needs two frame times after initial lock
* before it is valid.
*/
msleep(100);
xc_get_adc_envelope(priv, &adc_envelope);
dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
xc_get_frequency_error(priv, &freq_error_hz);
dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
xc_get_lock_status(priv, &lock_status);
dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
lock_status);
xc_get_version(priv, &hw_majorversion, &hw_minorversion,
&fw_majorversion, &fw_minorversion);
xc_get_buildversion(priv, &fw_buildversion);
dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n",
hw_majorversion, hw_minorversion,
fw_majorversion, fw_minorversion, fw_buildversion);
xc_get_hsync_freq(priv, &hsync_freq_hz);
dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz);
xc_get_frame_lines(priv, &frame_lines);
dprintk(1, "*** Frame lines = %d\n", frame_lines);
xc_get_quality(priv, &quality);
dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07);
xc_get_analogsnr(priv, &snr);
dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f);
xc_get_totalgain(priv, &totalgain);
dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256,
(totalgain % 256) * 100 / 256);
if (priv->pll_register_no) {
if (!xc5000_readreg(priv, priv->pll_register_no, ®val))
dprintk(1, "*** PLL lock status = 0x%04x\n", regval);
}
}
static int xc5000_tune_digital(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret;
u32 bw = fe->dtv_property_cache.bandwidth_hz;
ret = xc_set_signal_source(priv, priv->rf_mode);
if (ret != 0) {
printk(KERN_ERR
"xc5000: xc_set_signal_source(%d) failed\n",
priv->rf_mode);
return -EREMOTEIO;
}
ret = xc_set_tv_standard(priv,
xc5000_standard[priv->video_standard].video_mode,
xc5000_standard[priv->video_standard].audio_mode, 0);
if (ret != 0) {
printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
return -EREMOTEIO;
}
ret = xc_set_IF_frequency(priv, priv->if_khz);
if (ret != 0) {
printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
priv->if_khz);
return -EIO;
}
dprintk(1, "%s() setting OUTPUT_AMP to 0x%x\n",
__func__, priv->output_amp);
xc_write_reg(priv, XREG_OUTPUT_AMP, priv->output_amp);
xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
if (debug)
xc_debug_dump(priv);
priv->bandwidth = bw;
return 0;
}
static int xc5000_set_digital_params(struct dvb_frontend *fe)
{
int b;
struct xc5000_priv *priv = fe->tuner_priv;
u32 bw = fe->dtv_property_cache.bandwidth_hz;
u32 freq = fe->dtv_property_cache.frequency;
u32 delsys = fe->dtv_property_cache.delivery_system;
if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
dprintk(1, "Unable to load firmware and init tuner\n");
return -EINVAL;
}
dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq);
switch (delsys) {
case SYS_ATSC:
dprintk(1, "%s() VSB modulation\n", __func__);
priv->rf_mode = XC_RF_MODE_AIR;
priv->freq_offset = 1750000;
priv->video_standard = DTV6;
break;
case SYS_DVBC_ANNEX_B:
dprintk(1, "%s() QAM modulation\n", __func__);
priv->rf_mode = XC_RF_MODE_CABLE;
priv->freq_offset = 1750000;
priv->video_standard = DTV6;
break;
case SYS_ISDBT:
/* All ISDB-T are currently for 6 MHz bw */
if (!bw)
bw = 6000000;
/* fall to OFDM handling */
fallthrough;
case SYS_DMBTH:
case SYS_DVBT:
case SYS_DVBT2:
dprintk(1, "%s() OFDM\n", __func__);
switch (bw) {
case 6000000:
priv->video_standard = DTV6;
priv->freq_offset = 1750000;
break;
case 7000000:
priv->video_standard = DTV7;
priv->freq_offset = 2250000;
break;
case 8000000:
priv->video_standard = DTV8;
priv->freq_offset = 2750000;
break;
default:
printk(KERN_ERR "xc5000 bandwidth not set!\n");
return -EINVAL;
}
priv->rf_mode = XC_RF_MODE_AIR;
break;
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
dprintk(1, "%s() QAM modulation\n", __func__);
priv->rf_mode = XC_RF_MODE_CABLE;
if (bw <= 6000000) {
priv->video_standard = DTV6;
priv->freq_offset = 1750000;
b = 6;
} else if (bw <= 7000000) {
priv->video_standard = DTV7;
priv->freq_offset = 2250000;
b = 7;
} else {
priv->video_standard = DTV7_8;
priv->freq_offset = 2750000;
b = 8;
}
dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__,
b, bw);
break;
default:
printk(KERN_ERR "xc5000: delivery system is not supported!\n");
return -EINVAL;
}
priv->freq_hz = freq - priv->freq_offset;
priv->mode = V4L2_TUNER_DIGITAL_TV;
dprintk(1, "%s() frequency=%d (compensated to %d)\n",
__func__, freq, priv->freq_hz);
return xc5000_tune_digital(fe);
}
static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret;
u16 id;
ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id);
if (!ret) {
if (id == XC_PRODUCT_ID_FW_NOT_LOADED)
ret = -ENOENT;
else
ret = 0;
dprintk(1, "%s() returns id = 0x%x\n", __func__, id);
} else {
dprintk(1, "%s() returns error %d\n", __func__, ret);
}
return ret;
}
static void xc5000_config_tv(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
__func__, params->frequency);
/* Fix me: it could be air. */
priv->rf_mode = params->mode;
if (params->mode > XC_RF_MODE_CABLE)
priv->rf_mode = XC_RF_MODE_CABLE;
/* params->frequency is in units of 62.5khz */
priv->freq_hz = params->frequency * 62500;
/* FIX ME: Some video standards may have several possible audio
standards. We simply default to one of them here.
*/
if (params->std & V4L2_STD_MN) {
/* default to BTSC audio standard */
priv->video_standard = MN_NTSC_PAL_BTSC;
return;
}
if (params->std & V4L2_STD_PAL_BG) {
/* default to NICAM audio standard */
priv->video_standard = BG_PAL_NICAM;
return;
}
if (params->std & V4L2_STD_PAL_I) {
/* default to NICAM audio standard */
priv->video_standard = I_PAL_NICAM;
return;
}
if (params->std & V4L2_STD_PAL_DK) {
/* default to NICAM audio standard */
priv->video_standard = DK_PAL_NICAM;
return;
}
if (params->std & V4L2_STD_SECAM_DK) {
/* default to A2 DK1 audio standard */
priv->video_standard = DK_SECAM_A2DK1;
return;
}
if (params->std & V4L2_STD_SECAM_L) {
priv->video_standard = L_SECAM_NICAM;
return;
}
if (params->std & V4L2_STD_SECAM_LC) {
priv->video_standard = LC_SECAM_NICAM;
return;
}
}
static int xc5000_set_tv_freq(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
u16 pll_lock_status;
int ret;
tune_channel:
ret = xc_set_signal_source(priv, priv->rf_mode);
if (ret != 0) {
printk(KERN_ERR
"xc5000: xc_set_signal_source(%d) failed\n",
priv->rf_mode);
return -EREMOTEIO;
}
ret = xc_set_tv_standard(priv,
xc5000_standard[priv->video_standard].video_mode,
xc5000_standard[priv->video_standard].audio_mode, 0);
if (ret != 0) {
printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
return -EREMOTEIO;
}
xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
if (debug)
xc_debug_dump(priv);
if (priv->pll_register_no != 0) {
msleep(20);
ret = xc5000_readreg(priv, priv->pll_register_no,
&pll_lock_status);
if (ret)
return ret;
if (pll_lock_status > 63) {
/* PLL is unlocked, force reload of the firmware */
dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n",
pll_lock_status);
if (xc_load_fw_and_init_tuner(fe, 1) != 0) {
printk(KERN_ERR "xc5000: Unable to reload fw\n");
return -EREMOTEIO;
}
goto tune_channel;
}
}
return 0;
}
static int xc5000_config_radio(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s() frequency=%d (in units of khz)\n",
__func__, params->frequency);
if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) {
dprintk(1, "%s() radio input not configured\n", __func__);
return -EINVAL;
}
priv->freq_hz = params->frequency * 125 / 2;
priv->rf_mode = XC_RF_MODE_AIR;
return 0;
}
static int xc5000_set_radio_freq(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret;
u8 radio_input;
if (priv->radio_input == XC5000_RADIO_FM1)
radio_input = FM_RADIO_INPUT1;
else if (priv->radio_input == XC5000_RADIO_FM2)
radio_input = FM_RADIO_INPUT2;
else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
radio_input = FM_RADIO_INPUT1_MONO;
else {
dprintk(1, "%s() unknown radio input %d\n", __func__,
priv->radio_input);
return -EINVAL;
}
ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode,
xc5000_standard[radio_input].audio_mode, radio_input);
if (ret != 0) {
printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
return -EREMOTEIO;
}
ret = xc_set_signal_source(priv, priv->rf_mode);
if (ret != 0) {
printk(KERN_ERR
"xc5000: xc_set_signal_source(%d) failed\n",
priv->rf_mode);
return -EREMOTEIO;
}
if ((priv->radio_input == XC5000_RADIO_FM1) ||
(priv->radio_input == XC5000_RADIO_FM2))
xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06);
xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
return 0;
}
static int xc5000_set_params(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
dprintk(1, "Unable to load firmware and init tuner\n");
return -EINVAL;
}
switch (priv->mode) {
case V4L2_TUNER_RADIO:
return xc5000_set_radio_freq(fe);
case V4L2_TUNER_ANALOG_TV:
return xc5000_set_tv_freq(fe);
case V4L2_TUNER_DIGITAL_TV:
return xc5000_tune_digital(fe);
}
return 0;
}
static int xc5000_set_analog_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret;
if (priv->i2c_props.adap == NULL)
return -EINVAL;
switch (params->mode) {
case V4L2_TUNER_RADIO:
ret = xc5000_config_radio(fe, params);
if (ret)
return ret;
break;
case V4L2_TUNER_ANALOG_TV:
xc5000_config_tv(fe, params);
break;
default:
break;
}
priv->mode = params->mode;
return xc5000_set_params(fe);
}
static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*freq = priv->freq_hz + priv->freq_offset;
return 0;
}
static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*freq = priv->if_khz * 1000;
return 0;
}
static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*bw = priv->bandwidth;
return 0;
}
static int xc5000_get_status(struct dvb_frontend *fe, u32 *status)
{
struct xc5000_priv *priv = fe->tuner_priv;
u16 lock_status = 0;
xc_get_lock_status(priv, &lock_status);
dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status);
*status = lock_status;
return 0;
}
static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force)
{
struct xc5000_priv *priv = fe->tuner_priv;
const struct xc5000_fw_cfg *desired_fw = xc5000_assign_firmware(priv->chip_id);
const struct firmware *fw;
int ret, i;
u16 pll_lock_status;
u16 fw_ck;
cancel_delayed_work(&priv->timer_sleep);
if (!force && xc5000_is_firmware_loaded(fe) == 0)
return 0;
if (!priv->firmware) {
ret = request_firmware(&fw, desired_fw->name,
priv->i2c_props.adap->dev.parent);
if (ret) {
pr_err("xc5000: Upload failed. rc %d\n", ret);
return ret;
}
dprintk(1, "firmware read %zu bytes.\n", fw->size);
if (fw->size != desired_fw->size) {
pr_err("xc5000: Firmware file with incorrect size\n");
release_firmware(fw);
return -EINVAL;
}
priv->firmware = fw;
} else
fw = priv->firmware;
/* Try up to 5 times to load firmware */
for (i = 0; i < 5; i++) {
if (i)
printk(KERN_CONT " - retrying to upload firmware.\n");
ret = xc5000_fwupload(fe, desired_fw, fw);
if (ret != 0)
goto err;
msleep(20);
if (priv->fw_checksum_supported) {
if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)) {
printk(KERN_ERR
"xc5000: FW checksum reading failed.");
continue;
}
if (!fw_ck) {
printk(KERN_ERR
"xc5000: FW checksum failed = 0x%04x.",
fw_ck);
continue;
}
}
/* Start the tuner self-calibration process */
ret = xc_initialize(priv);
if (ret) {
printk(KERN_ERR "xc5000: Can't request self-calibration.");
continue;
}
/* Wait for calibration to complete.
* We could continue but XC5000 will clock stretch subsequent
* I2C transactions until calibration is complete. This way we
* don't have to rely on clock stretching working.
*/
msleep(100);
if (priv->init_status_supported) {
if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck)) {
printk(KERN_ERR
"xc5000: FW failed reading init status.");
continue;
}
if (!fw_ck) {
printk(KERN_ERR
"xc5000: FW init status failed = 0x%04x.",
fw_ck);
continue;
}
}
if (priv->pll_register_no) {
ret = xc5000_readreg(priv, priv->pll_register_no,
&pll_lock_status);
if (ret)
continue;
if (pll_lock_status > 63) {
/* PLL is unlocked, force reload of the firmware */
printk(KERN_ERR
"xc5000: PLL not running after fwload.");
continue;
}
}
/* Default to "CABLE" mode */
ret = xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE);
if (!ret)
break;
printk(KERN_ERR "xc5000: can't set to cable mode.");
}
err:
if (!ret)
printk(KERN_INFO "xc5000: Firmware %s loaded and running.\n",
desired_fw->name);
else
printk(KERN_CONT " - too many retries. Giving up\n");
return ret;
}
static void xc5000_do_timer_sleep(struct work_struct *timer_sleep)
{
struct xc5000_priv *priv =container_of(timer_sleep, struct xc5000_priv,
timer_sleep.work);
struct dvb_frontend *fe = priv->fe;
int ret;
dprintk(1, "%s()\n", __func__);
/* According to Xceive technical support, the "powerdown" register
was removed in newer versions of the firmware. The "supported"
way to sleep the tuner is to pull the reset pin low for 10ms */
ret = xc5000_tuner_reset(fe);
if (ret != 0)
printk(KERN_ERR
"xc5000: %s() unable to shutdown tuner\n",
__func__);
}
static int xc5000_sleep(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
/* Avoid firmware reload on slow devices */
if (no_poweroff)
return 0;
schedule_delayed_work(&priv->timer_sleep,
msecs_to_jiffies(XC5000_SLEEP_TIME));
return 0;
}
static int xc5000_suspend(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
int ret;
dprintk(1, "%s()\n", __func__);
cancel_delayed_work(&priv->timer_sleep);
ret = xc5000_tuner_reset(fe);
if (ret != 0)
printk(KERN_ERR
"xc5000: %s() unable to shutdown tuner\n",
__func__);
return 0;
}
static int xc5000_resume(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
/* suspended before firmware is loaded.
Avoid firmware load in resume path. */
if (!priv->firmware)
return 0;
return xc5000_set_params(fe);
}
static int xc5000_init(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
printk(KERN_ERR "xc5000: Unable to initialise tuner\n");
return -EREMOTEIO;
}
if (debug)
xc_debug_dump(priv);
return 0;
}
static void xc5000_release(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
mutex_lock(&xc5000_list_mutex);
if (priv) {
cancel_delayed_work(&priv->timer_sleep);
if (priv->firmware) {
release_firmware(priv->firmware);
priv->firmware = NULL;
}
hybrid_tuner_release_state(priv);
}
mutex_unlock(&xc5000_list_mutex);
fe->tuner_priv = NULL;
}
static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg)
{
struct xc5000_priv *priv = fe->tuner_priv;
struct xc5000_config *p = priv_cfg;
dprintk(1, "%s()\n", __func__);
if (p->if_khz)
priv->if_khz = p->if_khz;
if (p->radio_input)
priv->radio_input = p->radio_input;
if (p->output_amp)
priv->output_amp = p->output_amp;
return 0;
}
static const struct dvb_tuner_ops xc5000_tuner_ops = {
.info = {
.name = "Xceive XC5000",
.frequency_min_hz = 1 * MHz,
.frequency_max_hz = 1023 * MHz,
.frequency_step_hz = 50 * kHz,
},
.release = xc5000_release,
.init = xc5000_init,
.sleep = xc5000_sleep,
.suspend = xc5000_suspend,
.resume = xc5000_resume,
.set_config = xc5000_set_config,
.set_params = xc5000_set_digital_params,
.set_analog_params = xc5000_set_analog_params,
.get_frequency = xc5000_get_frequency,
.get_if_frequency = xc5000_get_if_frequency,
.get_bandwidth = xc5000_get_bandwidth,
.get_status = xc5000_get_status
};
struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
const struct xc5000_config *cfg)
{
struct xc5000_priv *priv = NULL;
int instance;
u16 id = 0;
dprintk(1, "%s(%d-%04x)\n", __func__,
i2c ? i2c_adapter_id(i2c) : -1,
cfg ? cfg->i2c_address : -1);
mutex_lock(&xc5000_list_mutex);
instance = hybrid_tuner_request_state(struct xc5000_priv, priv,
hybrid_tuner_instance_list,
i2c, cfg->i2c_address, "xc5000");
switch (instance) {
case 0:
goto fail;
case 1:
/* new tuner instance */
priv->bandwidth = 6000000;
fe->tuner_priv = priv;
priv->fe = fe;
INIT_DELAYED_WORK(&priv->timer_sleep, xc5000_do_timer_sleep);
break;
default:
/* existing tuner instance */
fe->tuner_priv = priv;
break;
}
if (priv->if_khz == 0) {
/* If the IF hasn't been set yet, use the value provided by
the caller (occurs in hybrid devices where the analog
call to xc5000_attach occurs before the digital side) */
priv->if_khz = cfg->if_khz;
}
if (priv->xtal_khz == 0)
priv->xtal_khz = cfg->xtal_khz;
if (priv->radio_input == 0)
priv->radio_input = cfg->radio_input;
/* don't override chip id if it's already been set
unless explicitly specified */
if ((priv->chip_id == 0) || (cfg->chip_id))
/* use default chip id if none specified, set to 0 so
it can be overridden if this is a hybrid driver */
priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0;
/* don't override output_amp if it's already been set
unless explicitly specified */
if ((priv->output_amp == 0) || (cfg->output_amp))
/* use default output_amp value if none specified */
priv->output_amp = (cfg->output_amp) ? cfg->output_amp : 0x8a;
/* Check if firmware has been loaded. It is possible that another
instance of the driver has loaded the firmware.
*/
if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0)
goto fail;
switch (id) {
case XC_PRODUCT_ID_FW_LOADED:
printk(KERN_INFO
"xc5000: Successfully identified at address 0x%02x\n",
cfg->i2c_address);
printk(KERN_INFO
"xc5000: Firmware has been loaded previously\n");
break;
case XC_PRODUCT_ID_FW_NOT_LOADED:
printk(KERN_INFO
"xc5000: Successfully identified at address 0x%02x\n",
cfg->i2c_address);
printk(KERN_INFO
"xc5000: Firmware has not been loaded previously\n");
break;
default:
printk(KERN_ERR
"xc5000: Device not found at addr 0x%02x (0x%x)\n",
cfg->i2c_address, id);
goto fail;
}
mutex_unlock(&xc5000_list_mutex);
memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops,
sizeof(struct dvb_tuner_ops));
return fe;
fail:
mutex_unlock(&xc5000_list_mutex);
xc5000_release(fe);
return NULL;
}
EXPORT_SYMBOL_GPL(xc5000_attach);
MODULE_AUTHOR("Steven Toth");
MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver");
MODULE_LICENSE("GPL");
MODULE_FIRMWARE(XC5000A_FIRMWARE);
MODULE_FIRMWARE(XC5000C_FIRMWARE);
| linux-master | drivers/media/tuners/xc5000.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Fitipower FC0011 tuner driver
*
* Copyright (C) 2012 Michael Buesch <[email protected]>
*
* Derived from FC0012 tuner driver:
* Copyright (C) 2012 Hans-Frieder Vogt <[email protected]>
*/
#include "fc0011.h"
/* Tuner registers */
enum {
FC11_REG_0,
FC11_REG_FA, /* FA */
FC11_REG_FP, /* FP */
FC11_REG_XINHI, /* XIN high 8 bit */
FC11_REG_XINLO, /* XIN low 8 bit */
FC11_REG_VCO, /* VCO */
FC11_REG_VCOSEL, /* VCO select */
FC11_REG_7, /* Unknown tuner reg 7 */
FC11_REG_8, /* Unknown tuner reg 8 */
FC11_REG_9,
FC11_REG_10, /* Unknown tuner reg 10 */
FC11_REG_11, /* Unknown tuner reg 11 */
FC11_REG_12,
FC11_REG_RCCAL, /* RC calibrate */
FC11_REG_VCOCAL, /* VCO calibrate */
FC11_REG_15,
FC11_REG_16, /* Unknown tuner reg 16 */
FC11_REG_17,
FC11_NR_REGS, /* Number of registers */
};
enum FC11_REG_VCOSEL_bits {
FC11_VCOSEL_2 = 0x08, /* VCO select 2 */
FC11_VCOSEL_1 = 0x10, /* VCO select 1 */
FC11_VCOSEL_CLKOUT = 0x20, /* Fix clock out */
FC11_VCOSEL_BW7M = 0x40, /* 7MHz bw */
FC11_VCOSEL_BW6M = 0x80, /* 6MHz bw */
};
enum FC11_REG_RCCAL_bits {
FC11_RCCAL_FORCE = 0x10, /* force */
};
enum FC11_REG_VCOCAL_bits {
FC11_VCOCAL_RUN = 0, /* VCO calibration run */
FC11_VCOCAL_VALUEMASK = 0x3F, /* VCO calibration value mask */
FC11_VCOCAL_OK = 0x40, /* VCO calibration Ok */
FC11_VCOCAL_RESET = 0x80, /* VCO calibration reset */
};
struct fc0011_priv {
struct i2c_adapter *i2c;
u8 addr;
u32 frequency;
u32 bandwidth;
};
static int fc0011_writereg(struct fc0011_priv *priv, u8 reg, u8 val)
{
u8 buf[2] = { reg, val };
struct i2c_msg msg = { .addr = priv->addr,
.flags = 0, .buf = buf, .len = 2 };
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
dev_err(&priv->i2c->dev,
"I2C write reg failed, reg: %02x, val: %02x\n",
reg, val);
return -EIO;
}
return 0;
}
static int fc0011_readreg(struct fc0011_priv *priv, u8 reg, u8 *val)
{
u8 dummy;
struct i2c_msg msg[2] = {
{ .addr = priv->addr,
.flags = 0, .buf = ®, .len = 1 },
{ .addr = priv->addr,
.flags = I2C_M_RD, .buf = val ? : &dummy, .len = 1 },
};
if (i2c_transfer(priv->i2c, msg, 2) != 2) {
dev_err(&priv->i2c->dev,
"I2C read failed, reg: %02x\n", reg);
return -EIO;
}
return 0;
}
static void fc0011_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static int fc0011_init(struct dvb_frontend *fe)
{
struct fc0011_priv *priv = fe->tuner_priv;
int err;
if (WARN_ON(!fe->callback))
return -EINVAL;
err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
FC0011_FE_CALLBACK_POWER, priv->addr);
if (err) {
dev_err(&priv->i2c->dev, "Power-on callback failed\n");
return err;
}
err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
FC0011_FE_CALLBACK_RESET, priv->addr);
if (err) {
dev_err(&priv->i2c->dev, "Reset callback failed\n");
return err;
}
return 0;
}
/* Initiate VCO calibration */
static int fc0011_vcocal_trigger(struct fc0011_priv *priv)
{
int err;
err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RESET);
if (err)
return err;
err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN);
if (err)
return err;
return 0;
}
/* Read VCO calibration value */
static int fc0011_vcocal_read(struct fc0011_priv *priv, u8 *value)
{
int err;
err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN);
if (err)
return err;
usleep_range(10000, 20000);
err = fc0011_readreg(priv, FC11_REG_VCOCAL, value);
if (err)
return err;
return 0;
}
static int fc0011_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct fc0011_priv *priv = fe->tuner_priv;
int err;
unsigned int i, vco_retries;
u32 freq = p->frequency / 1000;
u32 bandwidth = p->bandwidth_hz / 1000;
u32 fvco, xin, frac, xdiv, xdivr;
u8 fa, fp, vco_sel, vco_cal;
u8 regs[FC11_NR_REGS] = { };
regs[FC11_REG_7] = 0x0F;
regs[FC11_REG_8] = 0x3E;
regs[FC11_REG_10] = 0xB8;
regs[FC11_REG_11] = 0x80;
regs[FC11_REG_RCCAL] = 0x04;
err = fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]);
err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]);
err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]);
err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]);
err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);
if (err)
return -EIO;
/* Set VCO freq and VCO div */
if (freq < 54000) {
fvco = freq * 64;
regs[FC11_REG_VCO] = 0x82;
} else if (freq < 108000) {
fvco = freq * 32;
regs[FC11_REG_VCO] = 0x42;
} else if (freq < 216000) {
fvco = freq * 16;
regs[FC11_REG_VCO] = 0x22;
} else if (freq < 432000) {
fvco = freq * 8;
regs[FC11_REG_VCO] = 0x12;
} else {
fvco = freq * 4;
regs[FC11_REG_VCO] = 0x0A;
}
/* Calc XIN. The PLL reference frequency is 18 MHz. */
xdiv = fvco / 18000;
WARN_ON(xdiv > 0xFF);
frac = fvco - xdiv * 18000;
frac = (frac << 15) / 18000;
if (frac >= 16384)
frac += 32786;
if (!frac)
xin = 0;
else
xin = clamp_t(u32, frac, 512, 65024);
regs[FC11_REG_XINHI] = xin >> 8;
regs[FC11_REG_XINLO] = xin;
/* Calc FP and FA */
xdivr = xdiv;
if (fvco - xdiv * 18000 >= 9000)
xdivr += 1; /* round */
fp = xdivr / 8;
fa = xdivr - fp * 8;
if (fa < 2) {
fp -= 1;
fa += 8;
}
if (fp > 0x1F) {
fp = 0x1F;
fa = 0xF;
}
if (fa >= fp) {
dev_warn(&priv->i2c->dev,
"fa %02X >= fp %02X, but trying to continue\n",
(unsigned int)(u8)fa, (unsigned int)(u8)fp);
}
regs[FC11_REG_FA] = fa;
regs[FC11_REG_FP] = fp;
/* Select bandwidth */
switch (bandwidth) {
case 8000:
break;
case 7000:
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW7M;
break;
default:
dev_warn(&priv->i2c->dev, "Unsupported bandwidth %u kHz. Using 6000 kHz.\n",
bandwidth);
bandwidth = 6000;
fallthrough;
case 6000:
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW6M;
break;
}
/* Pre VCO select */
if (fvco < 2320000) {
vco_sel = 0;
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
} else if (fvco < 3080000) {
vco_sel = 1;
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
} else {
vco_sel = 2;
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;
}
/* Fix for low freqs */
if (freq < 45000) {
regs[FC11_REG_FA] = 0x6;
regs[FC11_REG_FP] = 0x11;
}
/* Clock out fix */
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_CLKOUT;
/* Write the cached registers */
for (i = FC11_REG_FA; i <= FC11_REG_VCOSEL; i++) {
err = fc0011_writereg(priv, i, regs[i]);
if (err)
return err;
}
/* VCO calibration */
err = fc0011_vcocal_trigger(priv);
if (err)
return err;
err = fc0011_vcocal_read(priv, &vco_cal);
if (err)
return err;
vco_retries = 0;
while (!(vco_cal & FC11_VCOCAL_OK) && vco_retries < 3) {
/* Reset the tuner and try again */
err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
FC0011_FE_CALLBACK_RESET, priv->addr);
if (err) {
dev_err(&priv->i2c->dev, "Failed to reset tuner\n");
return err;
}
/* Reinit tuner config */
err = 0;
for (i = FC11_REG_FA; i <= FC11_REG_VCOSEL; i++)
err |= fc0011_writereg(priv, i, regs[i]);
err |= fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]);
err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]);
err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]);
err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]);
err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);
if (err)
return -EIO;
/* VCO calibration */
err = fc0011_vcocal_trigger(priv);
if (err)
return err;
err = fc0011_vcocal_read(priv, &vco_cal);
if (err)
return err;
vco_retries++;
}
if (!(vco_cal & FC11_VCOCAL_OK)) {
dev_err(&priv->i2c->dev,
"Failed to read VCO calibration value (got %02X)\n",
(unsigned int)vco_cal);
return -EIO;
}
vco_cal &= FC11_VCOCAL_VALUEMASK;
switch (vco_sel) {
default:
WARN_ON(1);
return -EINVAL;
case 0:
if (vco_cal < 8) {
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
err = fc0011_writereg(priv, FC11_REG_VCOSEL,
regs[FC11_REG_VCOSEL]);
if (err)
return err;
err = fc0011_vcocal_trigger(priv);
if (err)
return err;
} else {
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
err = fc0011_writereg(priv, FC11_REG_VCOSEL,
regs[FC11_REG_VCOSEL]);
if (err)
return err;
}
break;
case 1:
if (vco_cal < 5) {
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;
err = fc0011_writereg(priv, FC11_REG_VCOSEL,
regs[FC11_REG_VCOSEL]);
if (err)
return err;
err = fc0011_vcocal_trigger(priv);
if (err)
return err;
} else if (vco_cal <= 48) {
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
err = fc0011_writereg(priv, FC11_REG_VCOSEL,
regs[FC11_REG_VCOSEL]);
if (err)
return err;
} else {
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
err = fc0011_writereg(priv, FC11_REG_VCOSEL,
regs[FC11_REG_VCOSEL]);
if (err)
return err;
err = fc0011_vcocal_trigger(priv);
if (err)
return err;
}
break;
case 2:
if (vco_cal > 53) {
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
err = fc0011_writereg(priv, FC11_REG_VCOSEL,
regs[FC11_REG_VCOSEL]);
if (err)
return err;
err = fc0011_vcocal_trigger(priv);
if (err)
return err;
} else {
regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;
err = fc0011_writereg(priv, FC11_REG_VCOSEL,
regs[FC11_REG_VCOSEL]);
if (err)
return err;
}
break;
}
err = fc0011_vcocal_read(priv, NULL);
if (err)
return err;
usleep_range(10000, 50000);
err = fc0011_readreg(priv, FC11_REG_RCCAL, ®s[FC11_REG_RCCAL]);
if (err)
return err;
regs[FC11_REG_RCCAL] |= FC11_RCCAL_FORCE;
err = fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);
if (err)
return err;
regs[FC11_REG_16] = 0xB;
err = fc0011_writereg(priv, FC11_REG_16, regs[FC11_REG_16]);
if (err)
return err;
dev_dbg(&priv->i2c->dev, "Tuned to fa=%02X fp=%02X xin=%02X%02X vco=%02X vcosel=%02X vcocal=%02X(%u) bw=%u\n",
(unsigned int)regs[FC11_REG_FA],
(unsigned int)regs[FC11_REG_FP],
(unsigned int)regs[FC11_REG_XINHI],
(unsigned int)regs[FC11_REG_XINLO],
(unsigned int)regs[FC11_REG_VCO],
(unsigned int)regs[FC11_REG_VCOSEL],
(unsigned int)vco_cal, vco_retries,
(unsigned int)bandwidth);
priv->frequency = p->frequency;
priv->bandwidth = p->bandwidth_hz;
return 0;
}
static int fc0011_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct fc0011_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int fc0011_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
*frequency = 0;
return 0;
}
static int fc0011_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct fc0011_priv *priv = fe->tuner_priv;
*bandwidth = priv->bandwidth;
return 0;
}
static const struct dvb_tuner_ops fc0011_tuner_ops = {
.info = {
.name = "Fitipower FC0011",
.frequency_min_hz = 45 * MHz,
.frequency_max_hz = 1000 * MHz,
},
.release = fc0011_release,
.init = fc0011_init,
.set_params = fc0011_set_params,
.get_frequency = fc0011_get_frequency,
.get_if_frequency = fc0011_get_if_frequency,
.get_bandwidth = fc0011_get_bandwidth,
};
struct dvb_frontend *fc0011_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
const struct fc0011_config *config)
{
struct fc0011_priv *priv;
priv = kzalloc(sizeof(struct fc0011_priv), GFP_KERNEL);
if (!priv)
return NULL;
priv->i2c = i2c;
priv->addr = config->i2c_address;
fe->tuner_priv = priv;
fe->ops.tuner_ops = fc0011_tuner_ops;
dev_info(&priv->i2c->dev, "Fitipower FC0011 tuner attached\n");
return fe;
}
EXPORT_SYMBOL_GPL(fc0011_attach);
MODULE_DESCRIPTION("Fitipower FC0011 silicon tuner driver");
MODULE_AUTHOR("Michael Buesch <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/fc0011.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
i2c tv tuner chip device driver
controls the philips tda8290+75 tuner chip combo.
This "tda8290" module was split apart from the original "tuner" module.
*/
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
#include "tuner-i2c.h"
#include "tda8290.h"
#include "tda827x.h"
#include "tda18271.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable verbose debug messages");
static int deemphasis_50;
module_param(deemphasis_50, int, 0644);
MODULE_PARM_DESC(deemphasis_50, "0 - 75us deemphasis; 1 - 50us deemphasis");
/* ---------------------------------------------------------------------- */
struct tda8290_priv {
struct tuner_i2c_props i2c_props;
unsigned char tda8290_easy_mode;
unsigned char tda827x_addr;
unsigned char ver;
#define TDA8290 1
#define TDA8295 2
#define TDA8275 4
#define TDA8275A 8
#define TDA18271 16
struct tda827x_config cfg;
struct tda18271_std_map *tda18271_std_map;
};
/*---------------------------------------------------------------------*/
static int tda8290_i2c_bridge(struct dvb_frontend *fe, int close)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
static unsigned char enable[2] = { 0x21, 0xC0 };
static unsigned char disable[2] = { 0x21, 0x00 };
unsigned char *msg;
if (close) {
msg = enable;
tuner_i2c_xfer_send(&priv->i2c_props, msg, 2);
/* let the bridge stabilize */
msleep(20);
} else {
msg = disable;
tuner_i2c_xfer_send(&priv->i2c_props, msg, 2);
}
return 0;
}
static int tda8295_i2c_bridge(struct dvb_frontend *fe, int close)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
static unsigned char enable[2] = { 0x45, 0xc1 };
static unsigned char disable[2] = { 0x46, 0x00 };
static unsigned char buf[3] = { 0x45, 0x01, 0x00 };
unsigned char *msg;
if (close) {
msg = enable;
tuner_i2c_xfer_send(&priv->i2c_props, msg, 2);
/* let the bridge stabilize */
msleep(20);
} else {
msg = disable;
tuner_i2c_xfer_send_recv(&priv->i2c_props, msg, 1, &msg[1], 1);
buf[2] = msg[1];
buf[2] &= ~0x04;
tuner_i2c_xfer_send(&priv->i2c_props, buf, 3);
msleep(5);
msg[1] |= 0x04;
tuner_i2c_xfer_send(&priv->i2c_props, msg, 2);
}
return 0;
}
/*---------------------------------------------------------------------*/
static void set_audio(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
char* mode;
if (params->std & V4L2_STD_MN) {
priv->tda8290_easy_mode = 0x01;
mode = "MN";
} else if (params->std & V4L2_STD_B) {
priv->tda8290_easy_mode = 0x02;
mode = "B";
} else if (params->std & V4L2_STD_GH) {
priv->tda8290_easy_mode = 0x04;
mode = "GH";
} else if (params->std & V4L2_STD_PAL_I) {
priv->tda8290_easy_mode = 0x08;
mode = "I";
} else if (params->std & V4L2_STD_DK) {
priv->tda8290_easy_mode = 0x10;
mode = "DK";
} else if (params->std & V4L2_STD_SECAM_L) {
priv->tda8290_easy_mode = 0x20;
mode = "L";
} else if (params->std & V4L2_STD_SECAM_LC) {
priv->tda8290_easy_mode = 0x40;
mode = "LC";
} else {
priv->tda8290_easy_mode = 0x10;
mode = "xx";
}
if (params->mode == V4L2_TUNER_RADIO) {
/* Set TDA8295 to FM radio; Start TDA8290 with MN values */
priv->tda8290_easy_mode = (priv->ver & TDA8295) ? 0x80 : 0x01;
tuner_dbg("setting to radio FM\n");
} else {
tuner_dbg("setting tda829x to system %s\n", mode);
}
}
static struct {
unsigned char seq[2];
} fm_mode[] = {
{ { 0x01, 0x81} }, /* Put device into expert mode */
{ { 0x03, 0x48} }, /* Disable NOTCH and VIDEO filters */
{ { 0x04, 0x04} }, /* Disable color carrier filter (SSIF) */
{ { 0x05, 0x04} }, /* ADC headroom */
{ { 0x06, 0x10} }, /* group delay flat */
{ { 0x07, 0x00} }, /* use the same radio DTO values as a tda8295 */
{ { 0x08, 0x00} },
{ { 0x09, 0x80} },
{ { 0x0a, 0xda} },
{ { 0x0b, 0x4b} },
{ { 0x0c, 0x68} },
{ { 0x0d, 0x00} }, /* PLL off, no video carrier detect */
{ { 0x14, 0x00} }, /* disable auto mute if no video */
};
static void tda8290_set_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
static unsigned char soft_reset[] = { 0x00, 0x00 };
unsigned char easy_mode[] = { 0x01, priv->tda8290_easy_mode };
static unsigned char expert_mode[] = { 0x01, 0x80 };
static unsigned char agc_out_on[] = { 0x02, 0x00 };
static unsigned char gainset_off[] = { 0x28, 0x14 };
static unsigned char if_agc_spd[] = { 0x0f, 0x88 };
static unsigned char adc_head_6[] = { 0x05, 0x04 };
static unsigned char adc_head_9[] = { 0x05, 0x02 };
static unsigned char adc_head_12[] = { 0x05, 0x01 };
static unsigned char pll_bw_nom[] = { 0x0d, 0x47 };
static unsigned char pll_bw_low[] = { 0x0d, 0x27 };
static unsigned char gainset_2[] = { 0x28, 0x64 };
static unsigned char agc_rst_on[] = { 0x0e, 0x0b };
static unsigned char agc_rst_off[] = { 0x0e, 0x09 };
static unsigned char if_agc_set[] = { 0x0f, 0x81 };
static unsigned char addr_adc_sat = 0x1a;
static unsigned char addr_agc_stat = 0x1d;
static unsigned char addr_pll_stat = 0x1b;
static unsigned char adc_sat = 0, agc_stat = 0,
pll_stat;
int i;
set_audio(fe, params);
if (priv->cfg.config)
tuner_dbg("tda827xa config is 0x%02x\n", priv->cfg.config);
tuner_i2c_xfer_send(&priv->i2c_props, easy_mode, 2);
tuner_i2c_xfer_send(&priv->i2c_props, agc_out_on, 2);
tuner_i2c_xfer_send(&priv->i2c_props, soft_reset, 2);
msleep(1);
if (params->mode == V4L2_TUNER_RADIO) {
unsigned char deemphasis[] = { 0x13, 1 };
/* FIXME: allow using a different deemphasis */
if (deemphasis_50)
deemphasis[1] = 2;
for (i = 0; i < ARRAY_SIZE(fm_mode); i++)
tuner_i2c_xfer_send(&priv->i2c_props, fm_mode[i].seq, 2);
tuner_i2c_xfer_send(&priv->i2c_props, deemphasis, 2);
} else {
expert_mode[1] = priv->tda8290_easy_mode + 0x80;
tuner_i2c_xfer_send(&priv->i2c_props, expert_mode, 2);
tuner_i2c_xfer_send(&priv->i2c_props, gainset_off, 2);
tuner_i2c_xfer_send(&priv->i2c_props, if_agc_spd, 2);
if (priv->tda8290_easy_mode & 0x60)
tuner_i2c_xfer_send(&priv->i2c_props, adc_head_9, 2);
else
tuner_i2c_xfer_send(&priv->i2c_props, adc_head_6, 2);
tuner_i2c_xfer_send(&priv->i2c_props, pll_bw_nom, 2);
}
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 1);
if (fe->ops.tuner_ops.set_analog_params)
fe->ops.tuner_ops.set_analog_params(fe, params);
for (i = 0; i < 3; i++) {
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_pll_stat, 1, &pll_stat, 1);
if (pll_stat & 0x80) {
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_adc_sat, 1,
&adc_sat, 1);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_agc_stat, 1,
&agc_stat, 1);
tuner_dbg("tda8290 is locked, AGC: %d\n", agc_stat);
break;
} else {
tuner_dbg("tda8290 not locked, no signal?\n");
msleep(100);
}
}
/* adjust headroom resp. gain */
if ((agc_stat > 115) || (!(pll_stat & 0x80) && (adc_sat < 20))) {
tuner_dbg("adjust gain, step 1. Agc: %d, ADC stat: %d, lock: %d\n",
agc_stat, adc_sat, pll_stat & 0x80);
tuner_i2c_xfer_send(&priv->i2c_props, gainset_2, 2);
msleep(100);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_agc_stat, 1, &agc_stat, 1);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_pll_stat, 1, &pll_stat, 1);
if ((agc_stat > 115) || !(pll_stat & 0x80)) {
tuner_dbg("adjust gain, step 2. Agc: %d, lock: %d\n",
agc_stat, pll_stat & 0x80);
if (priv->cfg.agcf)
priv->cfg.agcf(fe);
msleep(100);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_agc_stat, 1,
&agc_stat, 1);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_pll_stat, 1,
&pll_stat, 1);
if((agc_stat > 115) || !(pll_stat & 0x80)) {
tuner_dbg("adjust gain, step 3. Agc: %d\n", agc_stat);
tuner_i2c_xfer_send(&priv->i2c_props, adc_head_12, 2);
tuner_i2c_xfer_send(&priv->i2c_props, pll_bw_low, 2);
msleep(100);
}
}
}
/* l/ l' deadlock? */
if(priv->tda8290_easy_mode & 0x60) {
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_adc_sat, 1,
&adc_sat, 1);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&addr_pll_stat, 1,
&pll_stat, 1);
if ((adc_sat > 20) || !(pll_stat & 0x80)) {
tuner_dbg("trying to resolve SECAM L deadlock\n");
tuner_i2c_xfer_send(&priv->i2c_props, agc_rst_on, 2);
msleep(40);
tuner_i2c_xfer_send(&priv->i2c_props, agc_rst_off, 2);
}
}
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 0);
tuner_i2c_xfer_send(&priv->i2c_props, if_agc_set, 2);
}
/*---------------------------------------------------------------------*/
static void tda8295_power(struct dvb_frontend *fe, int enable)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
unsigned char buf[] = { 0x30, 0x00 }; /* clb_stdbt */
tuner_i2c_xfer_send_recv(&priv->i2c_props, &buf[0], 1, &buf[1], 1);
if (enable)
buf[1] = 0x01;
else
buf[1] = 0x03;
tuner_i2c_xfer_send(&priv->i2c_props, buf, 2);
}
static void tda8295_set_easy_mode(struct dvb_frontend *fe, int enable)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
unsigned char buf[] = { 0x01, 0x00 };
tuner_i2c_xfer_send_recv(&priv->i2c_props, &buf[0], 1, &buf[1], 1);
if (enable)
buf[1] = 0x01; /* rising edge sets regs 0x02 - 0x23 */
else
buf[1] = 0x00; /* reset active bit */
tuner_i2c_xfer_send(&priv->i2c_props, buf, 2);
}
static void tda8295_set_video_std(struct dvb_frontend *fe)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
unsigned char buf[] = { 0x00, priv->tda8290_easy_mode };
tuner_i2c_xfer_send(&priv->i2c_props, buf, 2);
tda8295_set_easy_mode(fe, 1);
msleep(20);
tda8295_set_easy_mode(fe, 0);
}
/*---------------------------------------------------------------------*/
static void tda8295_agc1_out(struct dvb_frontend *fe, int enable)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
unsigned char buf[] = { 0x02, 0x00 }; /* DIV_FUNC */
tuner_i2c_xfer_send_recv(&priv->i2c_props, &buf[0], 1, &buf[1], 1);
if (enable)
buf[1] &= ~0x40;
else
buf[1] |= 0x40;
tuner_i2c_xfer_send(&priv->i2c_props, buf, 2);
}
static void tda8295_agc2_out(struct dvb_frontend *fe, int enable)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
unsigned char set_gpio_cf[] = { 0x44, 0x00 };
unsigned char set_gpio_val[] = { 0x46, 0x00 };
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&set_gpio_cf[0], 1, &set_gpio_cf[1], 1);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&set_gpio_val[0], 1, &set_gpio_val[1], 1);
set_gpio_cf[1] &= 0xf0; /* clear GPIO_0 bits 3-0 */
if (enable) {
set_gpio_cf[1] |= 0x01; /* config GPIO_0 as Open Drain Out */
set_gpio_val[1] &= 0xfe; /* set GPIO_0 pin low */
}
tuner_i2c_xfer_send(&priv->i2c_props, set_gpio_cf, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_gpio_val, 2);
}
static int tda8295_has_signal(struct dvb_frontend *fe, u16 *signal)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
unsigned char hvpll_stat = 0x26;
unsigned char ret;
tuner_i2c_xfer_send_recv(&priv->i2c_props, &hvpll_stat, 1, &ret, 1);
*signal = (ret & 0x01) ? 65535 : 0;
return 0;
}
/*---------------------------------------------------------------------*/
static void tda8295_set_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
u16 signal = 0;
unsigned char blanking_mode[] = { 0x1d, 0x00 };
set_audio(fe, params);
tuner_dbg("%s: freq = %d\n", __func__, params->frequency);
tda8295_power(fe, 1);
tda8295_agc1_out(fe, 1);
tuner_i2c_xfer_send_recv(&priv->i2c_props,
&blanking_mode[0], 1, &blanking_mode[1], 1);
tda8295_set_video_std(fe);
blanking_mode[1] = 0x03;
tuner_i2c_xfer_send(&priv->i2c_props, blanking_mode, 2);
msleep(20);
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 1);
if (fe->ops.tuner_ops.set_analog_params)
fe->ops.tuner_ops.set_analog_params(fe, params);
if (priv->cfg.agcf)
priv->cfg.agcf(fe);
tda8295_has_signal(fe, &signal);
if (signal)
tuner_dbg("tda8295 is locked\n");
else
tuner_dbg("tda8295 not locked, no signal?\n");
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 0);
}
/*---------------------------------------------------------------------*/
static int tda8290_has_signal(struct dvb_frontend *fe, u16 *signal)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
unsigned char i2c_get_afc[1] = { 0x1B };
unsigned char afc = 0;
tuner_i2c_xfer_send_recv(&priv->i2c_props,
i2c_get_afc, ARRAY_SIZE(i2c_get_afc), &afc, 1);
*signal = (afc & 0x80) ? 65535 : 0;
return 0;
}
/*---------------------------------------------------------------------*/
static void tda8290_standby(struct dvb_frontend *fe)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
static unsigned char cb1[] = { 0x30, 0xD0 };
static unsigned char tda8290_standby[] = { 0x00, 0x02 };
static unsigned char tda8290_agc_tri[] = { 0x02, 0x20 };
struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags=0, .buf=cb1, .len = 2};
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 1);
if (priv->ver & TDA8275A)
cb1[1] = 0x90;
i2c_transfer(priv->i2c_props.adap, &msg, 1);
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 0);
tuner_i2c_xfer_send(&priv->i2c_props, tda8290_agc_tri, 2);
tuner_i2c_xfer_send(&priv->i2c_props, tda8290_standby, 2);
}
static void tda8295_standby(struct dvb_frontend *fe)
{
tda8295_agc1_out(fe, 0); /* Put AGC in tri-state */
tda8295_power(fe, 0);
}
static void tda8290_init_if(struct dvb_frontend *fe)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
static unsigned char set_VS[] = { 0x30, 0x6F };
static unsigned char set_GP00_CF[] = { 0x20, 0x01 };
static unsigned char set_GP01_CF[] = { 0x20, 0x0B };
if ((priv->cfg.config == TDA8290_LNA_GP0_HIGH_ON) ||
(priv->cfg.config == TDA8290_LNA_GP0_HIGH_OFF))
tuner_i2c_xfer_send(&priv->i2c_props, set_GP00_CF, 2);
else
tuner_i2c_xfer_send(&priv->i2c_props, set_GP01_CF, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_VS, 2);
}
static void tda8295_init_if(struct dvb_frontend *fe)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
static unsigned char set_adc_ctl[] = { 0x33, 0x14 };
static unsigned char set_adc_ctl2[] = { 0x34, 0x00 };
static unsigned char set_pll_reg6[] = { 0x3e, 0x63 };
static unsigned char set_pll_reg0[] = { 0x38, 0x23 };
static unsigned char set_pll_reg7[] = { 0x3f, 0x01 };
static unsigned char set_pll_reg10[] = { 0x42, 0x61 };
static unsigned char set_gpio_reg0[] = { 0x44, 0x0b };
tda8295_power(fe, 1);
tda8295_set_easy_mode(fe, 0);
tda8295_set_video_std(fe);
tuner_i2c_xfer_send(&priv->i2c_props, set_adc_ctl, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_adc_ctl2, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_pll_reg6, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_pll_reg0, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_pll_reg7, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_pll_reg10, 2);
tuner_i2c_xfer_send(&priv->i2c_props, set_gpio_reg0, 2);
tda8295_agc1_out(fe, 0);
tda8295_agc2_out(fe, 0);
}
static void tda8290_init_tuner(struct dvb_frontend *fe)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
static unsigned char tda8275_init[] =
{ 0x00, 0x00, 0x00, 0x40, 0xdC, 0x04, 0xAf,
0x3F, 0x2A, 0x04, 0xFF, 0x00, 0x00, 0x40 };
static unsigned char tda8275a_init[] =
{ 0x00, 0x00, 0x00, 0x00, 0xdC, 0x05, 0x8b,
0x0c, 0x04, 0x20, 0xFF, 0x00, 0x00, 0x4b };
struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags=0,
.buf=tda8275_init, .len = 14};
if (priv->ver & TDA8275A)
msg.buf = tda8275a_init;
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 1);
i2c_transfer(priv->i2c_props.adap, &msg, 1);
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 0);
}
/*---------------------------------------------------------------------*/
static void tda829x_release(struct dvb_frontend *fe)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
/* only try to release the tuner if we've
* attached it from within this module */
if (priv->ver & (TDA18271 | TDA8275 | TDA8275A))
if (fe->ops.tuner_ops.release)
fe->ops.tuner_ops.release(fe);
kfree(fe->analog_demod_priv);
fe->analog_demod_priv = NULL;
}
static struct tda18271_config tda829x_tda18271_config = {
.gate = TDA18271_GATE_ANALOG,
};
static int tda829x_find_tuner(struct dvb_frontend *fe)
{
struct tda8290_priv *priv = fe->analog_demod_priv;
int i, ret, tuners_found;
u32 tuner_addrs;
u8 data;
struct i2c_msg msg = { .flags = I2C_M_RD, .buf = &data, .len = 1 };
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 1);
/* probe for tuner chip */
tuners_found = 0;
tuner_addrs = 0;
for (i = 0x60; i <= 0x63; i++) {
msg.addr = i;
ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
if (ret == 1) {
tuners_found++;
tuner_addrs = (tuner_addrs << 8) + i;
}
}
/* if there is more than one tuner, we expect the right one is
behind the bridge and we choose the highest address that doesn't
give a response now
*/
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 0);
if (tuners_found > 1)
for (i = 0; i < tuners_found; i++) {
msg.addr = tuner_addrs & 0xff;
ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
if (ret == 1)
tuner_addrs = tuner_addrs >> 8;
else
break;
}
if (tuner_addrs == 0) {
tuner_addrs = 0x60;
tuner_info("could not clearly identify tuner address, defaulting to %x\n",
tuner_addrs);
} else {
tuner_addrs = tuner_addrs & 0xff;
tuner_info("setting tuner address to %x\n", tuner_addrs);
}
priv->tda827x_addr = tuner_addrs;
msg.addr = tuner_addrs;
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 1);
ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
if (ret != 1) {
tuner_warn("tuner access failed!\n");
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 0);
return -EREMOTEIO;
}
if ((data == 0x83) || (data == 0x84)) {
priv->ver |= TDA18271;
tda829x_tda18271_config.config = priv->cfg.config;
tda829x_tda18271_config.std_map = priv->tda18271_std_map;
dvb_attach(tda18271_attach, fe, priv->tda827x_addr,
priv->i2c_props.adap, &tda829x_tda18271_config);
} else {
if ((data & 0x3c) == 0)
priv->ver |= TDA8275;
else
priv->ver |= TDA8275A;
dvb_attach(tda827x_attach, fe, priv->tda827x_addr,
priv->i2c_props.adap, &priv->cfg);
priv->cfg.switch_addr = priv->i2c_props.addr;
}
if (fe->ops.tuner_ops.init)
fe->ops.tuner_ops.init(fe);
if (fe->ops.tuner_ops.sleep)
fe->ops.tuner_ops.sleep(fe);
if (fe->ops.analog_ops.i2c_gate_ctrl)
fe->ops.analog_ops.i2c_gate_ctrl(fe, 0);
return 0;
}
static int tda8290_probe(struct tuner_i2c_props *i2c_props)
{
#define TDA8290_ID 0x89
u8 reg = 0x1f, id;
struct i2c_msg msg_read[] = {
{ .addr = i2c_props->addr, .flags = 0, .len = 1, .buf = ® },
{ .addr = i2c_props->addr, .flags = I2C_M_RD, .len = 1, .buf = &id },
};
/* detect tda8290 */
if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
printk(KERN_WARNING "%s: couldn't read register 0x%02x\n",
__func__, reg);
return -ENODEV;
}
if (id == TDA8290_ID) {
if (debug)
printk(KERN_DEBUG "%s: tda8290 detected @ %d-%04x\n",
__func__, i2c_adapter_id(i2c_props->adap),
i2c_props->addr);
return 0;
}
return -ENODEV;
}
static int tda8295_probe(struct tuner_i2c_props *i2c_props)
{
#define TDA8295_ID 0x8a
#define TDA8295C2_ID 0x8b
u8 reg = 0x2f, id;
struct i2c_msg msg_read[] = {
{ .addr = i2c_props->addr, .flags = 0, .len = 1, .buf = ® },
{ .addr = i2c_props->addr, .flags = I2C_M_RD, .len = 1, .buf = &id },
};
/* detect tda8295 */
if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
printk(KERN_WARNING "%s: couldn't read register 0x%02x\n",
__func__, reg);
return -ENODEV;
}
if ((id & 0xfe) == TDA8295_ID) {
if (debug)
printk(KERN_DEBUG "%s: %s detected @ %d-%04x\n",
__func__, (id == TDA8295_ID) ?
"tda8295c1" : "tda8295c2",
i2c_adapter_id(i2c_props->adap),
i2c_props->addr);
return 0;
}
return -ENODEV;
}
static const struct analog_demod_ops tda8290_ops = {
.set_params = tda8290_set_params,
.has_signal = tda8290_has_signal,
.standby = tda8290_standby,
.release = tda829x_release,
.i2c_gate_ctrl = tda8290_i2c_bridge,
};
static const struct analog_demod_ops tda8295_ops = {
.set_params = tda8295_set_params,
.has_signal = tda8295_has_signal,
.standby = tda8295_standby,
.release = tda829x_release,
.i2c_gate_ctrl = tda8295_i2c_bridge,
};
struct dvb_frontend *tda829x_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c_adap, u8 i2c_addr,
struct tda829x_config *cfg)
{
struct tda8290_priv *priv = NULL;
char *name;
priv = kzalloc(sizeof(struct tda8290_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
fe->analog_demod_priv = priv;
priv->i2c_props.addr = i2c_addr;
priv->i2c_props.adap = i2c_adap;
priv->i2c_props.name = "tda829x";
if (cfg) {
priv->cfg.config = cfg->lna_cfg;
priv->tda18271_std_map = cfg->tda18271_std_map;
}
if (tda8290_probe(&priv->i2c_props) == 0) {
priv->ver = TDA8290;
memcpy(&fe->ops.analog_ops, &tda8290_ops,
sizeof(struct analog_demod_ops));
}
if (tda8295_probe(&priv->i2c_props) == 0) {
priv->ver = TDA8295;
memcpy(&fe->ops.analog_ops, &tda8295_ops,
sizeof(struct analog_demod_ops));
}
if (cfg && cfg->no_i2c_gate)
fe->ops.analog_ops.i2c_gate_ctrl = NULL;
if (!(cfg) || (TDA829X_PROBE_TUNER == cfg->probe_tuner)) {
tda8295_power(fe, 1);
if (tda829x_find_tuner(fe) < 0)
goto fail;
}
switch (priv->ver) {
case TDA8290:
name = "tda8290";
break;
case TDA8295:
name = "tda8295";
break;
case TDA8290 | TDA8275:
name = "tda8290+75";
break;
case TDA8295 | TDA8275:
name = "tda8295+75";
break;
case TDA8290 | TDA8275A:
name = "tda8290+75a";
break;
case TDA8295 | TDA8275A:
name = "tda8295+75a";
break;
case TDA8290 | TDA18271:
name = "tda8290+18271";
break;
case TDA8295 | TDA18271:
name = "tda8295+18271";
break;
default:
goto fail;
}
tuner_info("type set to %s\n", name);
fe->ops.analog_ops.info.name = name;
if (priv->ver & TDA8290) {
if (priv->ver & (TDA8275 | TDA8275A))
tda8290_init_tuner(fe);
tda8290_init_if(fe);
} else if (priv->ver & TDA8295)
tda8295_init_if(fe);
return fe;
fail:
memset(&fe->ops.analog_ops, 0, sizeof(struct analog_demod_ops));
tda829x_release(fe);
return NULL;
}
EXPORT_SYMBOL_GPL(tda829x_attach);
int tda829x_probe(struct i2c_adapter *i2c_adap, u8 i2c_addr)
{
struct tuner_i2c_props i2c_props = {
.adap = i2c_adap,
.addr = i2c_addr,
};
static unsigned char soft_reset[] = { 0x00, 0x00 };
static unsigned char easy_mode_b[] = { 0x01, 0x02 };
static unsigned char easy_mode_g[] = { 0x01, 0x04 };
static unsigned char restore_9886[] = { 0x00, 0xd6, 0x30 };
static unsigned char addr_dto_lsb = 0x07;
unsigned char data;
#define PROBE_BUFFER_SIZE 8
unsigned char buf[PROBE_BUFFER_SIZE];
int i;
/* rule out tda9887, which would return the same byte repeatedly */
tuner_i2c_xfer_send_recv(&i2c_props,
soft_reset, 1, buf, PROBE_BUFFER_SIZE);
for (i = 1; i < PROBE_BUFFER_SIZE; i++) {
if (buf[i] != buf[0])
break;
}
/* all bytes are equal, not a tda829x - probably a tda9887 */
if (i == PROBE_BUFFER_SIZE)
return -ENODEV;
if ((tda8290_probe(&i2c_props) == 0) ||
(tda8295_probe(&i2c_props) == 0))
return 0;
/* fall back to old probing method */
tuner_i2c_xfer_send(&i2c_props, easy_mode_b, 2);
tuner_i2c_xfer_send(&i2c_props, soft_reset, 2);
tuner_i2c_xfer_send_recv(&i2c_props, &addr_dto_lsb, 1, &data, 1);
if (data == 0) {
tuner_i2c_xfer_send(&i2c_props, easy_mode_g, 2);
tuner_i2c_xfer_send(&i2c_props, soft_reset, 2);
tuner_i2c_xfer_send_recv(&i2c_props,
&addr_dto_lsb, 1, &data, 1);
if (data == 0x7b) {
return 0;
}
}
tuner_i2c_xfer_send(&i2c_props, restore_9886, 3);
return -ENODEV;
}
EXPORT_SYMBOL_GPL(tda829x_probe);
MODULE_DESCRIPTION("Philips/NXP TDA8290/TDA8295 analog IF demodulator driver");
MODULE_AUTHOR("Gerd Knorr, Hartmut Hackmann, Michael Krufky");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tda8290.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* NXP TDA18218HN silicon tuner driver
*
* Copyright (C) 2010 Antti Palosaari <[email protected]>
*/
#include "tda18218_priv.h"
/* Max transfer size done by I2C transfer functions */
#define MAX_XFER_SIZE 64
/* write multiple registers */
static int tda18218_wr_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
{
int ret = 0, len2, remaining;
u8 buf[MAX_XFER_SIZE];
struct i2c_msg msg[1] = {
{
.addr = priv->cfg->i2c_address,
.flags = 0,
.buf = buf,
}
};
if (1 + len > sizeof(buf)) {
dev_warn(&priv->i2c->dev,
"%s: i2c wr reg=%04x: len=%d is too big!\n",
KBUILD_MODNAME, reg, len);
return -EINVAL;
}
for (remaining = len; remaining > 0;
remaining -= (priv->cfg->i2c_wr_max - 1)) {
len2 = remaining;
if (len2 > (priv->cfg->i2c_wr_max - 1))
len2 = (priv->cfg->i2c_wr_max - 1);
msg[0].len = 1 + len2;
buf[0] = reg + len - remaining;
memcpy(&buf[1], &val[len - remaining], len2);
ret = i2c_transfer(priv->i2c, msg, 1);
if (ret != 1)
break;
}
if (ret == 1) {
ret = 0;
} else {
dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
"len=%d\n", KBUILD_MODNAME, ret, reg, len);
ret = -EREMOTEIO;
}
return ret;
}
/* read multiple registers */
static int tda18218_rd_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
{
int ret;
u8 buf[MAX_XFER_SIZE]; /* we must start read always from reg 0x00 */
struct i2c_msg msg[2] = {
{
.addr = priv->cfg->i2c_address,
.flags = 0,
.len = 1,
.buf = "\x00",
}, {
.addr = priv->cfg->i2c_address,
.flags = I2C_M_RD,
.len = reg + len,
.buf = buf,
}
};
if (reg + len > sizeof(buf)) {
dev_warn(&priv->i2c->dev,
"%s: i2c wr reg=%04x: len=%d is too big!\n",
KBUILD_MODNAME, reg, len);
return -EINVAL;
}
ret = i2c_transfer(priv->i2c, msg, 2);
if (ret == 2) {
memcpy(val, &buf[reg], len);
ret = 0;
} else {
dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
"len=%d\n", KBUILD_MODNAME, ret, reg, len);
ret = -EREMOTEIO;
}
return ret;
}
/* write single register */
static int tda18218_wr_reg(struct tda18218_priv *priv, u8 reg, u8 val)
{
return tda18218_wr_regs(priv, reg, &val, 1);
}
/* read single register */
static int tda18218_rd_reg(struct tda18218_priv *priv, u8 reg, u8 *val)
{
return tda18218_rd_regs(priv, reg, val, 1);
}
static int tda18218_set_params(struct dvb_frontend *fe)
{
struct tda18218_priv *priv = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 bw = c->bandwidth_hz;
int ret;
u8 buf[3], i, BP_Filter, LP_Fc;
u32 LO_Frac;
/* TODO: find out correct AGC algorithm */
u8 agc[][2] = {
{ R20_AGC11, 0x60 },
{ R23_AGC21, 0x02 },
{ R20_AGC11, 0xa0 },
{ R23_AGC21, 0x09 },
{ R20_AGC11, 0xe0 },
{ R23_AGC21, 0x0c },
{ R20_AGC11, 0x40 },
{ R23_AGC21, 0x01 },
{ R20_AGC11, 0x80 },
{ R23_AGC21, 0x08 },
{ R20_AGC11, 0xc0 },
{ R23_AGC21, 0x0b },
{ R24_AGC22, 0x1c },
{ R24_AGC22, 0x0c },
};
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
/* low-pass filter cut-off frequency */
if (bw <= 6000000) {
LP_Fc = 0;
priv->if_frequency = 3000000;
} else if (bw <= 7000000) {
LP_Fc = 1;
priv->if_frequency = 3500000;
} else {
LP_Fc = 2;
priv->if_frequency = 4000000;
}
LO_Frac = c->frequency + priv->if_frequency;
/* band-pass filter */
if (LO_Frac < 188000000)
BP_Filter = 3;
else if (LO_Frac < 253000000)
BP_Filter = 4;
else if (LO_Frac < 343000000)
BP_Filter = 5;
else
BP_Filter = 6;
buf[0] = (priv->regs[R1A_IF1] & ~7) | BP_Filter; /* BP_Filter */
buf[1] = (priv->regs[R1B_IF2] & ~3) | LP_Fc; /* LP_Fc */
buf[2] = priv->regs[R1C_AGC2B];
ret = tda18218_wr_regs(priv, R1A_IF1, buf, 3);
if (ret)
goto error;
buf[0] = (LO_Frac / 1000) >> 12; /* LO_Frac_0 */
buf[1] = (LO_Frac / 1000) >> 4; /* LO_Frac_1 */
buf[2] = (LO_Frac / 1000) << 4 |
(priv->regs[R0C_MD5] & 0x0f); /* LO_Frac_2 */
ret = tda18218_wr_regs(priv, R0A_MD3, buf, 3);
if (ret)
goto error;
buf[0] = priv->regs[R0F_MD8] | (1 << 6); /* Freq_prog_Start */
ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
if (ret)
goto error;
buf[0] = priv->regs[R0F_MD8] & ~(1 << 6); /* Freq_prog_Start */
ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
if (ret)
goto error;
/* trigger AGC */
for (i = 0; i < ARRAY_SIZE(agc); i++) {
ret = tda18218_wr_reg(priv, agc[i][0], agc[i][1]);
if (ret)
goto error;
}
error:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
return ret;
}
static int tda18218_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tda18218_priv *priv = fe->tuner_priv;
*frequency = priv->if_frequency;
dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d\n", __func__, *frequency);
return 0;
}
static int tda18218_sleep(struct dvb_frontend *fe)
{
struct tda18218_priv *priv = fe->tuner_priv;
int ret;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
/* standby */
ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
return ret;
}
static int tda18218_init(struct dvb_frontend *fe)
{
struct tda18218_priv *priv = fe->tuner_priv;
int ret;
/* TODO: calibrations */
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
ret = tda18218_wr_regs(priv, R00_ID, priv->regs, TDA18218_NUM_REGS);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
return ret;
}
static void tda18218_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static const struct dvb_tuner_ops tda18218_tuner_ops = {
.info = {
.name = "NXP TDA18218",
.frequency_min_hz = 174 * MHz,
.frequency_max_hz = 864 * MHz,
.frequency_step_hz = 1 * kHz,
},
.release = tda18218_release,
.init = tda18218_init,
.sleep = tda18218_sleep,
.set_params = tda18218_set_params,
.get_if_frequency = tda18218_get_if_frequency,
};
struct dvb_frontend *tda18218_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c, struct tda18218_config *cfg)
{
struct tda18218_priv *priv = NULL;
u8 val;
int ret;
/* chip default registers values */
static u8 def_regs[] = {
0xc0, 0x88, 0x00, 0x8e, 0x03, 0x00, 0x00, 0xd0, 0x00, 0x40,
0x00, 0x00, 0x07, 0xff, 0x84, 0x09, 0x00, 0x13, 0x00, 0x00,
0x01, 0x84, 0x09, 0xf0, 0x19, 0x0a, 0x8e, 0x69, 0x98, 0x01,
0x00, 0x58, 0x10, 0x40, 0x8c, 0x00, 0x0c, 0x48, 0x85, 0xc9,
0xa7, 0x00, 0x00, 0x00, 0x30, 0x81, 0x80, 0x00, 0x39, 0x00,
0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf6, 0xf6
};
priv = kzalloc(sizeof(struct tda18218_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
priv->cfg = cfg;
priv->i2c = i2c;
fe->tuner_priv = priv;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
/* check if the tuner is there */
ret = tda18218_rd_reg(priv, R00_ID, &val);
if (!ret)
dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, val);
if (ret || val != def_regs[R00_ID]) {
kfree(priv);
return NULL;
}
dev_info(&priv->i2c->dev,
"%s: NXP TDA18218HN successfully identified\n",
KBUILD_MODNAME);
memcpy(&fe->ops.tuner_ops, &tda18218_tuner_ops,
sizeof(struct dvb_tuner_ops));
memcpy(priv->regs, def_regs, sizeof(def_regs));
/* loop-through enabled chip default register values */
if (priv->cfg->loop_through) {
priv->regs[R17_PD1] = 0xb0;
priv->regs[R18_PD2] = 0x59;
}
/* standby */
ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
if (ret)
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
return fe;
}
EXPORT_SYMBOL_GPL(tda18218_attach);
MODULE_DESCRIPTION("NXP TDA18218HN silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tda18218.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Silicon Labs Si2146/2147/2148/2157/2158 silicon tuner driver
*
* Copyright (C) 2014 Antti Palosaari <[email protected]>
*/
#include "si2157_priv.h"
static const struct dvb_tuner_ops si2157_ops;
static int tuner_lock_debug;
module_param(tuner_lock_debug, int, 0644);
MODULE_PARM_DESC(tuner_lock_debug, "if set, signal lock is briefly waited on after setting params");
/* execute firmware command */
static int si2157_cmd_execute(struct i2c_client *client, struct si2157_cmd *cmd)
{
struct si2157_dev *dev = i2c_get_clientdata(client);
int ret;
unsigned long timeout;
mutex_lock(&dev->i2c_mutex);
if (cmd->wlen) {
/* write cmd and args for firmware */
ret = i2c_master_send(client, cmd->args, cmd->wlen);
if (ret < 0) {
goto err_mutex_unlock;
} else if (ret != cmd->wlen) {
ret = -EREMOTEIO;
goto err_mutex_unlock;
}
}
if (cmd->rlen) {
/* wait cmd execution terminate */
#define TIMEOUT 80
timeout = jiffies + msecs_to_jiffies(TIMEOUT);
while (!time_after(jiffies, timeout)) {
ret = i2c_master_recv(client, cmd->args, cmd->rlen);
if (ret < 0) {
goto err_mutex_unlock;
} else if (ret != cmd->rlen) {
ret = -EREMOTEIO;
goto err_mutex_unlock;
}
/* firmware ready? */
if ((cmd->args[0] >> 7) & 0x01)
break;
}
dev_dbg(&client->dev, "cmd execution took %d ms, status=%x\n",
jiffies_to_msecs(jiffies) -
(jiffies_to_msecs(timeout) - TIMEOUT),
cmd->args[0]);
if (!((cmd->args[0] >> 7) & 0x01)) {
ret = -ETIMEDOUT;
goto err_mutex_unlock;
}
/* check error status bit */
if (cmd->args[0] & 0x40) {
ret = -EAGAIN;
goto err_mutex_unlock;
}
}
mutex_unlock(&dev->i2c_mutex);
return 0;
err_mutex_unlock:
mutex_unlock(&dev->i2c_mutex);
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static const struct si2157_tuner_info si2157_tuners[] = {
{ SI2141, 0x60, false, SI2141_60_FIRMWARE, SI2141_A10_FIRMWARE },
{ SI2141, 0x61, false, SI2141_61_FIRMWARE, SI2141_A10_FIRMWARE },
{ SI2146, 0x11, false, SI2146_11_FIRMWARE, NULL },
{ SI2147, 0x50, false, SI2147_50_FIRMWARE, NULL },
{ SI2148, 0x32, true, SI2148_32_FIRMWARE, SI2158_A20_FIRMWARE },
{ SI2148, 0x33, true, SI2148_33_FIRMWARE, SI2158_A20_FIRMWARE },
{ SI2157, 0x50, false, SI2157_50_FIRMWARE, SI2157_A30_FIRMWARE },
{ SI2158, 0x50, false, SI2158_50_FIRMWARE, SI2158_A20_FIRMWARE },
{ SI2158, 0x51, false, SI2158_51_FIRMWARE, SI2158_A20_FIRMWARE },
{ SI2177, 0x50, false, SI2177_50_FIRMWARE, SI2157_A30_FIRMWARE },
};
static int si2157_load_firmware(struct dvb_frontend *fe,
const char *fw_name)
{
struct i2c_client *client = fe->tuner_priv;
const struct firmware *fw;
int ret, len, remaining;
struct si2157_cmd cmd;
/* request the firmware, this will block and timeout */
ret = firmware_request_nowarn(&fw, fw_name, &client->dev);
if (ret)
return ret;
/* firmware should be n chunks of 17 bytes */
if (fw->size % 17 != 0) {
dev_err(&client->dev, "firmware file '%s' is invalid\n",
fw_name);
ret = -EINVAL;
goto err_release_firmware;
}
dev_info(&client->dev, "downloading firmware from file '%s'\n",
fw_name);
for (remaining = fw->size; remaining > 0; remaining -= 17) {
len = fw->data[fw->size - remaining];
if (len > SI2157_ARGLEN) {
dev_err(&client->dev, "Bad firmware length\n");
ret = -EINVAL;
goto err_release_firmware;
}
memcpy(cmd.args, &fw->data[(fw->size - remaining) + 1], len);
cmd.wlen = len;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret) {
dev_err(&client->dev, "firmware download failed %d\n",
ret);
goto err_release_firmware;
}
}
err_release_firmware:
release_firmware(fw);
return ret;
}
static int si2157_find_and_load_firmware(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
const char *fw_alt_name = NULL;
unsigned char part_id, rom_id;
const char *fw_name = NULL;
struct si2157_cmd cmd;
bool required = true;
int ret, i;
if (dev->dont_load_firmware) {
dev_info(&client->dev,
"device is buggy, skipping firmware download\n");
return 0;
}
/* query chip revision */
memcpy(cmd.args, "\x02", 1);
cmd.wlen = 1;
cmd.rlen = 13;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
return ret;
part_id = cmd.args[2];
rom_id = cmd.args[12];
for (i = 0; i < ARRAY_SIZE(si2157_tuners); i++) {
if (si2157_tuners[i].part_id != part_id)
continue;
required = si2157_tuners[i].required;
fw_alt_name = si2157_tuners[i].fw_alt_name;
/* Both part and rom ID match */
if (si2157_tuners[i].rom_id == rom_id) {
fw_name = si2157_tuners[i].fw_name;
break;
}
}
if (required && !fw_name && !fw_alt_name) {
dev_err(&client->dev,
"unknown chip version Si21%d-%c%c%c ROM 0x%02x\n",
part_id, cmd.args[1], cmd.args[3], cmd.args[4], rom_id);
return -EINVAL;
}
/* Update the part id based on device's report */
dev->part_id = part_id;
dev_info(&client->dev,
"found a 'Silicon Labs Si21%d-%c%c%c ROM 0x%02x'\n",
part_id, cmd.args[1], cmd.args[3], cmd.args[4], rom_id);
if (fw_name)
ret = si2157_load_firmware(fe, fw_name);
else
ret = -ENOENT;
/* Try alternate name, if any */
if (ret == -ENOENT && fw_alt_name)
ret = si2157_load_firmware(fe, fw_alt_name);
if (ret == -ENOENT) {
if (!required) {
dev_info(&client->dev, "Using ROM firmware.\n");
return 0;
}
dev_err(&client->dev, "Can't continue without a firmware.\n");
} else if (ret < 0) {
dev_err(&client->dev, "error %d when loading firmware\n", ret);
}
return ret;
}
static int si2157_init(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
unsigned int xtal_trim;
struct si2157_cmd cmd;
int ret;
dev_dbg(&client->dev, "\n");
/* Try to get Xtal trim property, to verify tuner still running */
memcpy(cmd.args, "\x15\x00\x02\x04", 4);
cmd.wlen = 4;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
xtal_trim = cmd.args[2] | (cmd.args[3] << 8);
if (ret == 0 && xtal_trim < 16)
goto warm;
dev->if_frequency = 0; /* we no longer know current tuner state */
/* power up */
if (dev->part_id == SI2146) {
/* clock_mode = XTAL, clock_freq = 24MHz */
memcpy(cmd.args, "\xc0\x05\x01\x00\x00\x0b\x00\x00\x01", 9);
cmd.wlen = 9;
} else if (dev->part_id == SI2141) {
/* clock_mode: XTAL, xout enabled */
memcpy(cmd.args, "\xc0\x00\x0d\x0e\x00\x01\x01\x01\x01\x03", 10);
cmd.wlen = 10;
} else {
memcpy(cmd.args, "\xc0\x00\x0c\x00\x00\x01\x01\x01\x01\x01\x01\x02\x00\x00\x01", 15);
cmd.wlen = 15;
}
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret && (dev->part_id != SI2141 || ret != -EAGAIN))
goto err;
/* Si2141 needs a wake up command */
if (dev->part_id == SI2141) {
memcpy(cmd.args, "\xc0\x08\x01\x02\x00\x00\x01", 7);
cmd.wlen = 7;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
}
/* Try to load the firmware */
ret = si2157_find_and_load_firmware(fe);
if (ret < 0)
goto err;
/* reboot the tuner with new firmware? */
memcpy(cmd.args, "\x01\x01", 2);
cmd.wlen = 2;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* query firmware version */
memcpy(cmd.args, "\x11", 1);
cmd.wlen = 1;
cmd.rlen = 10;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
dev_info(&client->dev, "firmware version: %c.%c.%d\n",
cmd.args[6], cmd.args[7], cmd.args[8]);
/* enable tuner status flags */
memcpy(cmd.args, "\x14\x00\x01\x05\x01\x00", 6);
cmd.wlen = 6;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
memcpy(cmd.args, "\x14\x00\x01\x06\x01\x00", 6);
cmd.wlen = 6;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
memcpy(cmd.args, "\x14\x00\x01\x07\x01\x00", 6);
cmd.wlen = 6;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
warm:
/* init statistics in order signal app which are supported */
c->strength.len = 1;
c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
/* start statistics polling */
schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(1000));
dev->active = true;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int si2157_sleep(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
int ret;
struct si2157_cmd cmd;
dev_dbg(&client->dev, "\n");
dev->active = false;
/* stop statistics polling */
cancel_delayed_work_sync(&dev->stat_work);
/* standby */
memcpy(cmd.args, "\x16\x00", 2);
cmd.wlen = 2;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int si2157_tune_wait(struct i2c_client *client, u8 is_digital)
{
#define TUN_TIMEOUT 40
#define DIG_TIMEOUT 30
#define ANALOG_TIMEOUT 150
struct si2157_dev *dev = i2c_get_clientdata(client);
int ret;
unsigned long timeout;
unsigned long start_time;
u8 wait_status;
u8 tune_lock_mask;
if (is_digital)
tune_lock_mask = 0x04;
else
tune_lock_mask = 0x02;
mutex_lock(&dev->i2c_mutex);
/* wait tuner command complete */
start_time = jiffies;
timeout = start_time + msecs_to_jiffies(TUN_TIMEOUT);
while (1) {
ret = i2c_master_recv(client, &wait_status,
sizeof(wait_status));
if (ret < 0) {
goto err_mutex_unlock;
} else if (ret != sizeof(wait_status)) {
ret = -EREMOTEIO;
goto err_mutex_unlock;
}
if (time_after(jiffies, timeout))
break;
/* tuner done? */
if ((wait_status & 0x81) == 0x81)
break;
usleep_range(5000, 10000);
}
dev_dbg(&client->dev, "tuning took %d ms, status=0x%x\n",
jiffies_to_msecs(jiffies) - jiffies_to_msecs(start_time),
wait_status);
/* if we tuned ok, wait a bit for tuner lock */
if (tuner_lock_debug && (wait_status & 0x81) == 0x81) {
if (is_digital)
timeout = jiffies + msecs_to_jiffies(DIG_TIMEOUT);
else
timeout = jiffies + msecs_to_jiffies(ANALOG_TIMEOUT);
while (!time_after(jiffies, timeout)) {
ret = i2c_master_recv(client, &wait_status,
sizeof(wait_status));
if (ret < 0) {
goto err_mutex_unlock;
} else if (ret != sizeof(wait_status)) {
ret = -EREMOTEIO;
goto err_mutex_unlock;
}
/* tuner locked? */
if (wait_status & tune_lock_mask)
break;
usleep_range(5000, 10000);
}
dev_dbg(&client->dev, "tuning+lock took %d ms, status=0x%x\n",
jiffies_to_msecs(jiffies) - jiffies_to_msecs(start_time),
wait_status);
}
if ((wait_status & 0xc0) != 0x80) {
ret = -ETIMEDOUT;
goto err_mutex_unlock;
}
mutex_unlock(&dev->i2c_mutex);
return 0;
err_mutex_unlock:
mutex_unlock(&dev->i2c_mutex);
dev_err(&client->dev, "failed=%d\n", ret);
return ret;
}
static int si2157_set_params(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
struct si2157_cmd cmd;
u8 bw, delivery_system;
u32 bandwidth;
u32 if_frequency = 5000000;
dev_dbg(&client->dev,
"delivery_system=%d frequency=%u bandwidth_hz=%u\n",
c->delivery_system, c->frequency, c->bandwidth_hz);
if (!dev->active) {
ret = -EAGAIN;
goto err;
}
if (SUPPORTS_1700KHz(dev) && c->bandwidth_hz <= 1700000) {
bandwidth = 1700000;
bw = 9;
} else if (c->bandwidth_hz <= 6000000) {
bandwidth = 6000000;
bw = 6;
} else if (SUPPORTS_1700KHz(dev) && c->bandwidth_hz <= 6100000) {
bandwidth = 6100000;
bw = 10;
} else if (c->bandwidth_hz <= 7000000) {
bandwidth = 7000000;
bw = 7;
} else {
bandwidth = 8000000;
bw = 8;
}
switch (c->delivery_system) {
case SYS_ATSC:
delivery_system = 0x00;
if_frequency = 3250000;
break;
case SYS_DVBC_ANNEX_B:
delivery_system = 0x10;
if_frequency = 4000000;
break;
case SYS_DVBT:
case SYS_DVBT2: /* it seems DVB-T and DVB-T2 both are 0x20 here */
delivery_system = 0x20;
break;
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
delivery_system = 0x30;
break;
case SYS_ISDBT:
delivery_system = 0x40;
break;
case SYS_DTMB:
delivery_system = 0x60;
break;
default:
ret = -EINVAL;
goto err;
}
memcpy(cmd.args, "\x14\x00\x03\x07\x00\x00", 6);
cmd.args[4] = delivery_system | bw;
if (dev->inversion)
cmd.args[5] = 0x01;
cmd.wlen = 6;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* On SI2146, set DTV AGC source to DLIF_AGC_3DB */
if (dev->part_id == SI2146)
memcpy(cmd.args, "\x14\x00\x02\x07\x00\x01", 6);
else
memcpy(cmd.args, "\x14\x00\x02\x07\x00\x00", 6);
cmd.args[4] = dev->if_port;
cmd.wlen = 6;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* set digital if frequency if needed */
if (if_frequency != dev->if_frequency) {
memcpy(cmd.args, "\x14\x00\x06\x07", 4);
cmd.args[4] = (if_frequency / 1000) & 0xff;
cmd.args[5] = ((if_frequency / 1000) >> 8) & 0xff;
cmd.wlen = 6;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
dev->if_frequency = if_frequency;
}
/* set digital frequency */
memcpy(cmd.args, "\x41\x00\x00\x00\x00\x00\x00\x00", 8);
cmd.args[4] = (c->frequency >> 0) & 0xff;
cmd.args[5] = (c->frequency >> 8) & 0xff;
cmd.args[6] = (c->frequency >> 16) & 0xff;
cmd.args[7] = (c->frequency >> 24) & 0xff;
cmd.wlen = 8;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
dev->bandwidth = bandwidth;
dev->frequency = c->frequency;
si2157_tune_wait(client, 1); /* wait to complete, ignore any errors */
return 0;
err:
dev->bandwidth = 0;
dev->frequency = 0;
dev->if_frequency = 0;
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int si2157_set_analog_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
char *std; /* for debugging */
int ret;
struct si2157_cmd cmd;
u32 bandwidth = 0;
u32 if_frequency = 0;
u32 freq = 0;
u64 tmp_lval = 0;
u8 system = 0;
u8 color = 0; /* 0=NTSC/PAL, 0x10=SECAM */
u8 invert_analog = 1; /* analog tuner spectrum; 0=normal, 1=inverted */
if (!SUPPORTS_ATV_IF(dev)) {
dev_info(&client->dev, "Analog tuning not supported yet for Si21%d\n",
dev->part_id);
ret = -EINVAL;
goto err;
}
if (!dev->active)
si2157_init(fe);
if (!dev->active) {
ret = -EAGAIN;
goto err;
}
if (params->mode == V4L2_TUNER_RADIO) {
/*
* std = "fm";
* bandwidth = 1700000; //best can do for FM, AGC will be a mess though
* if_frequency = 1250000; //HVR-225x(saa7164), HVR-12xx(cx23885)
* if_frequency = 6600000; //HVR-9xx(cx231xx)
* if_frequency = 5500000; //HVR-19xx(pvrusb2)
*/
dev_err(&client->dev, "si2157 does not currently support FM radio\n");
ret = -EINVAL;
goto err;
}
tmp_lval = params->frequency * 625LL;
do_div(tmp_lval, 10); /* convert to HZ */
freq = (u32)tmp_lval;
if (freq < 1000000) /* is freq in KHz */
freq = freq * 1000;
dev->frequency = freq;
/* if_frequency values based on tda187271C2 */
if (params->std & (V4L2_STD_B | V4L2_STD_GH)) {
if (freq >= 470000000) {
std = "palGH";
bandwidth = 8000000;
if_frequency = 6000000;
system = 1;
if (params->std &
(V4L2_STD_SECAM_G | V4L2_STD_SECAM_H)) {
std = "secamGH";
color = 0x10;
}
} else {
std = "palB";
bandwidth = 7000000;
if_frequency = 6000000;
system = 0;
if (params->std & V4L2_STD_SECAM_B) {
std = "secamB";
color = 0x10;
}
}
} else if (params->std & V4L2_STD_MN) {
std = "MN";
bandwidth = 6000000;
if_frequency = 5400000;
system = 2;
} else if (params->std & V4L2_STD_PAL_I) {
std = "palI";
bandwidth = 8000000;
if_frequency = 7250000; /* TODO: does not work yet */
system = 4;
} else if (params->std & V4L2_STD_DK) {
std = "palDK";
bandwidth = 8000000;
if_frequency = 6900000; /* TODO: does not work yet */
system = 5;
if (params->std & V4L2_STD_SECAM_DK) {
std = "secamDK";
color = 0x10;
}
} else if (params->std & V4L2_STD_SECAM_L) {
std = "secamL";
bandwidth = 8000000;
if_frequency = 6750000; /* TODO: untested */
system = 6;
color = 0x10;
} else if (params->std & V4L2_STD_SECAM_LC) {
std = "secamL'";
bandwidth = 7000000;
if_frequency = 1250000; /* TODO: untested */
system = 7;
color = 0x10;
} else {
std = "unknown";
}
/* calc channel center freq */
freq = freq - 1250000 + (bandwidth / 2);
dev_dbg(&client->dev,
"mode=%d system=%u std='%s' params->frequency=%u center freq=%u if=%u bandwidth=%u\n",
params->mode, system, std, params->frequency,
freq, if_frequency, bandwidth);
/* set analog IF port */
memcpy(cmd.args, "\x14\x00\x03\x06\x08\x02", 6);
/* in using dev->if_port, we assume analog and digital IF's */
/* are always on different ports */
/* assumes if_port definition is 0 or 1 for digital out */
cmd.args[4] = (dev->if_port == 1) ? 8 : 10;
/* Analog AGC assumed external */
cmd.args[5] = (dev->if_port == 1) ? 2 : 1;
cmd.wlen = 6;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* set analog IF output config */
memcpy(cmd.args, "\x14\x00\x0d\x06\x94\x64", 6);
cmd.wlen = 6;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* make this distinct from a digital IF */
dev->if_frequency = if_frequency | 1;
/* calc and set tuner analog if center frequency */
if_frequency = if_frequency + 1250000 - (bandwidth / 2);
dev_dbg(&client->dev, "IF Ctr freq=%d\n", if_frequency);
memcpy(cmd.args, "\x14\x00\x0C\x06", 4);
cmd.args[4] = (if_frequency / 1000) & 0xff;
cmd.args[5] = ((if_frequency / 1000) >> 8) & 0xff;
cmd.wlen = 6;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* set analog AGC config */
memcpy(cmd.args, "\x14\x00\x07\x06\x32\xc8", 6);
cmd.wlen = 6;
cmd.rlen = 4;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* set analog video mode */
memcpy(cmd.args, "\x14\x00\x04\x06\x00\x00", 6);
cmd.args[4] = system | color;
/* can use dev->inversion if assumed applies to both digital/analog */
if (invert_analog)
cmd.args[5] |= 0x02;
cmd.wlen = 6;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
/* set analog frequency */
memcpy(cmd.args, "\x41\x01\x00\x00\x00\x00\x00\x00", 8);
cmd.args[4] = (freq >> 0) & 0xff;
cmd.args[5] = (freq >> 8) & 0xff;
cmd.args[6] = (freq >> 16) & 0xff;
cmd.args[7] = (freq >> 24) & 0xff;
cmd.wlen = 8;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
dev->bandwidth = bandwidth;
si2157_tune_wait(client, 0); /* wait to complete, ignore any errors */
return 0;
err:
dev->bandwidth = 0;
dev->frequency = 0;
dev->if_frequency = 0;
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int si2157_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
*frequency = dev->frequency;
dev_dbg(&client->dev, "freq=%u\n", dev->frequency);
return 0;
}
static int si2157_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
*bandwidth = dev->bandwidth;
dev_dbg(&client->dev, "bandwidth=%u\n", dev->bandwidth);
return 0;
}
static int si2157_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct i2c_client *client = fe->tuner_priv;
struct si2157_dev *dev = i2c_get_clientdata(client);
*frequency = dev->if_frequency & ~1; /* strip analog IF indicator bit */
dev_dbg(&client->dev, "if_frequency=%u\n", *frequency);
return 0;
}
static int si2157_get_rf_strength(struct dvb_frontend *fe, u16 *rssi)
{
struct i2c_client *client = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct si2157_cmd cmd;
int ret;
int strength;
dev_dbg(&client->dev, "\n");
memcpy(cmd.args, "\x42\x00", 2);
cmd.wlen = 2;
cmd.rlen = 12;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
c->strength.stat[0].scale = FE_SCALE_DECIBEL;
c->strength.stat[0].svalue = (s8)cmd.args[3] * 1000;
/* normalize values based on Silicon Labs reference
* add 100, then anything > 80 is 100% signal
*/
strength = (s8)cmd.args[3] + 100;
strength = clamp_val(strength, 0, 80);
*rssi = (u16)(strength * 0xffff / 80);
dev_dbg(&client->dev, "strength=%d rssi=%u\n",
(s8)cmd.args[3], *rssi);
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static const struct dvb_tuner_ops si2157_ops = {
.info = {
.name = "Silicon Labs Si2141/Si2146/2147/2148/2157/2158",
.frequency_min_hz = 42 * MHz,
.frequency_max_hz = 870 * MHz,
},
.init = si2157_init,
.sleep = si2157_sleep,
.set_params = si2157_set_params,
.set_analog_params = si2157_set_analog_params,
.get_frequency = si2157_get_frequency,
.get_bandwidth = si2157_get_bandwidth,
.get_if_frequency = si2157_get_if_frequency,
.get_rf_strength = si2157_get_rf_strength,
};
static void si2157_stat_work(struct work_struct *work)
{
struct si2157_dev *dev = container_of(work, struct si2157_dev, stat_work.work);
struct dvb_frontend *fe = dev->fe;
struct i2c_client *client = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct si2157_cmd cmd;
int ret;
dev_dbg(&client->dev, "\n");
memcpy(cmd.args, "\x42\x00", 2);
cmd.wlen = 2;
cmd.rlen = 12;
ret = si2157_cmd_execute(client, &cmd);
if (ret)
goto err;
c->strength.stat[0].scale = FE_SCALE_DECIBEL;
c->strength.stat[0].svalue = (s8) cmd.args[3] * 1000;
schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
return;
err:
c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
dev_dbg(&client->dev, "failed=%d\n", ret);
}
static int si2157_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct si2157_config *cfg = client->dev.platform_data;
struct dvb_frontend *fe = cfg->fe;
struct si2157_dev *dev;
struct si2157_cmd cmd;
int ret;
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
dev_err(&client->dev, "kzalloc() failed\n");
goto err;
}
i2c_set_clientdata(client, dev);
dev->fe = cfg->fe;
dev->inversion = cfg->inversion;
dev->dont_load_firmware = cfg->dont_load_firmware;
dev->if_port = cfg->if_port;
dev->part_id = (u8)id->driver_data;
dev->if_frequency = 5000000; /* default value of property 0x0706 */
mutex_init(&dev->i2c_mutex);
INIT_DELAYED_WORK(&dev->stat_work, si2157_stat_work);
/* check if the tuner is there */
cmd.wlen = 0;
cmd.rlen = 1;
ret = si2157_cmd_execute(client, &cmd);
if (ret && ret != -EAGAIN)
goto err_kfree;
memcpy(&fe->ops.tuner_ops, &si2157_ops, sizeof(struct dvb_tuner_ops));
fe->tuner_priv = client;
#ifdef CONFIG_MEDIA_CONTROLLER
if (cfg->mdev) {
dev->mdev = cfg->mdev;
dev->ent.name = KBUILD_MODNAME;
dev->ent.function = MEDIA_ENT_F_TUNER;
dev->pad[SI2157_PAD_RF_INPUT].flags = MEDIA_PAD_FL_SINK;
dev->pad[SI2157_PAD_RF_INPUT].sig_type = PAD_SIGNAL_ANALOG;
dev->pad[SI2157_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;
dev->pad[SI2157_PAD_VID_OUT].sig_type = PAD_SIGNAL_ANALOG;
dev->pad[SI2157_PAD_AUD_OUT].flags = MEDIA_PAD_FL_SOURCE;
dev->pad[SI2157_PAD_AUD_OUT].sig_type = PAD_SIGNAL_AUDIO;
ret = media_entity_pads_init(&dev->ent, SI2157_NUM_PADS,
&dev->pad[0]);
if (ret)
goto err_kfree;
ret = media_device_register_entity(cfg->mdev, &dev->ent);
if (ret) {
media_entity_cleanup(&dev->ent);
goto err_kfree;
}
}
#endif
dev_info(&client->dev, "Silicon Labs Si21%d successfully attached\n",
dev->part_id);
return 0;
err_kfree:
kfree(dev);
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static void si2157_remove(struct i2c_client *client)
{
struct si2157_dev *dev = i2c_get_clientdata(client);
struct dvb_frontend *fe = dev->fe;
dev_dbg(&client->dev, "\n");
/* stop statistics polling */
cancel_delayed_work_sync(&dev->stat_work);
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
if (dev->mdev)
media_device_unregister_entity(&dev->ent);
#endif
memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
fe->tuner_priv = NULL;
kfree(dev);
}
/*
* The part_id used here will only be used on buggy devices that don't
* accept firmware uploads. Non-buggy devices should just use "si2157" for
* all SiLabs TER tuners, as the driver should auto-detect it.
*/
static const struct i2c_device_id si2157_id_table[] = {
{"si2157", SI2157},
{"si2146", SI2146},
{"si2141", SI2141},
{"si2177", SI2177},
{}
};
MODULE_DEVICE_TABLE(i2c, si2157_id_table);
static struct i2c_driver si2157_driver = {
.driver = {
.name = "si2157",
.suppress_bind_attrs = true,
},
.probe = si2157_probe,
.remove = si2157_remove,
.id_table = si2157_id_table,
};
module_i2c_driver(si2157_driver);
MODULE_DESCRIPTION("Silicon Labs Si2141/Si2146/2147/2148/2157/2158 silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_FIRMWARE(SI2158_A20_FIRMWARE);
MODULE_FIRMWARE(SI2141_A10_FIRMWARE);
MODULE_FIRMWARE(SI2157_A30_FIRMWARE);
MODULE_FIRMWARE(SI2141_60_FIRMWARE);
MODULE_FIRMWARE(SI2141_61_FIRMWARE);
MODULE_FIRMWARE(SI2146_11_FIRMWARE);
MODULE_FIRMWARE(SI2147_50_FIRMWARE);
MODULE_FIRMWARE(SI2148_32_FIRMWARE);
MODULE_FIRMWARE(SI2148_33_FIRMWARE);
MODULE_FIRMWARE(SI2157_50_FIRMWARE);
MODULE_FIRMWARE(SI2158_50_FIRMWARE);
MODULE_FIRMWARE(SI2158_51_FIRMWARE);
MODULE_FIRMWARE(SI2177_50_FIRMWARE);
| linux-master | drivers/media/tuners/si2157.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* NXP TDA18212HN silicon tuner driver
*
* Copyright (C) 2011 Antti Palosaari <[email protected]>
*/
#include "tda18212.h"
#include <linux/regmap.h>
struct tda18212_dev {
struct tda18212_config cfg;
struct i2c_client *client;
struct regmap *regmap;
u32 if_frequency;
};
static int tda18212_set_params(struct dvb_frontend *fe)
{
struct tda18212_dev *dev = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret, i;
u32 if_khz;
u8 buf[9];
#define DVBT_6 0
#define DVBT_7 1
#define DVBT_8 2
#define DVBT2_6 3
#define DVBT2_7 4
#define DVBT2_8 5
#define DVBC_6 6
#define DVBC_8 7
#define ATSC_VSB 8
#define ATSC_QAM 9
static const u8 bw_params[][3] = {
/* reg: 0f 13 23 */
[DVBT_6] = { 0xb3, 0x20, 0x03 },
[DVBT_7] = { 0xb3, 0x31, 0x01 },
[DVBT_8] = { 0xb3, 0x22, 0x01 },
[DVBT2_6] = { 0xbc, 0x20, 0x03 },
[DVBT2_7] = { 0xbc, 0x72, 0x03 },
[DVBT2_8] = { 0xbc, 0x22, 0x01 },
[DVBC_6] = { 0x92, 0x50, 0x03 },
[DVBC_8] = { 0x92, 0x53, 0x03 },
[ATSC_VSB] = { 0x7d, 0x20, 0x63 },
[ATSC_QAM] = { 0x7d, 0x20, 0x63 },
};
dev_dbg(&dev->client->dev,
"delivery_system=%d frequency=%d bandwidth_hz=%d\n",
c->delivery_system, c->frequency,
c->bandwidth_hz);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
switch (c->delivery_system) {
case SYS_ATSC:
if_khz = dev->cfg.if_atsc_vsb;
i = ATSC_VSB;
break;
case SYS_DVBC_ANNEX_B:
if_khz = dev->cfg.if_atsc_qam;
i = ATSC_QAM;
break;
case SYS_DVBT:
switch (c->bandwidth_hz) {
case 6000000:
if_khz = dev->cfg.if_dvbt_6;
i = DVBT_6;
break;
case 7000000:
if_khz = dev->cfg.if_dvbt_7;
i = DVBT_7;
break;
case 8000000:
if_khz = dev->cfg.if_dvbt_8;
i = DVBT_8;
break;
default:
ret = -EINVAL;
goto error;
}
break;
case SYS_DVBT2:
switch (c->bandwidth_hz) {
case 6000000:
if_khz = dev->cfg.if_dvbt2_6;
i = DVBT2_6;
break;
case 7000000:
if_khz = dev->cfg.if_dvbt2_7;
i = DVBT2_7;
break;
case 8000000:
if_khz = dev->cfg.if_dvbt2_8;
i = DVBT2_8;
break;
default:
ret = -EINVAL;
goto error;
}
break;
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
if_khz = dev->cfg.if_dvbc;
i = DVBC_8;
break;
default:
ret = -EINVAL;
goto error;
}
ret = regmap_write(dev->regmap, 0x23, bw_params[i][2]);
if (ret)
goto error;
ret = regmap_write(dev->regmap, 0x06, 0x00);
if (ret)
goto error;
ret = regmap_write(dev->regmap, 0x0f, bw_params[i][0]);
if (ret)
goto error;
buf[0] = 0x02;
buf[1] = bw_params[i][1];
buf[2] = 0x03; /* default value */
buf[3] = DIV_ROUND_CLOSEST(if_khz, 50);
buf[4] = ((c->frequency / 1000) >> 16) & 0xff;
buf[5] = ((c->frequency / 1000) >> 8) & 0xff;
buf[6] = ((c->frequency / 1000) >> 0) & 0xff;
buf[7] = 0xc1;
buf[8] = 0x01;
ret = regmap_bulk_write(dev->regmap, 0x12, buf, sizeof(buf));
if (ret)
goto error;
/* actual IF rounded as it is on register */
dev->if_frequency = buf[3] * 50 * 1000;
exit:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
return ret;
error:
dev_dbg(&dev->client->dev, "failed=%d\n", ret);
goto exit;
}
static int tda18212_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tda18212_dev *dev = fe->tuner_priv;
*frequency = dev->if_frequency;
return 0;
}
static const struct dvb_tuner_ops tda18212_tuner_ops = {
.info = {
.name = "NXP TDA18212",
.frequency_min_hz = 48 * MHz,
.frequency_max_hz = 864 * MHz,
.frequency_step_hz = 1 * kHz,
},
.set_params = tda18212_set_params,
.get_if_frequency = tda18212_get_if_frequency,
};
static int tda18212_probe(struct i2c_client *client)
{
struct tda18212_config *cfg = client->dev.platform_data;
struct dvb_frontend *fe = cfg->fe;
struct tda18212_dev *dev;
int ret;
unsigned int chip_id;
char *version;
static const struct regmap_config regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (dev == NULL) {
ret = -ENOMEM;
dev_err(&client->dev, "kzalloc() failed\n");
goto err;
}
memcpy(&dev->cfg, cfg, sizeof(struct tda18212_config));
dev->client = client;
dev->regmap = devm_regmap_init_i2c(client, ®map_config);
if (IS_ERR(dev->regmap)) {
ret = PTR_ERR(dev->regmap);
goto err;
}
/* check if the tuner is there */
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
ret = regmap_read(dev->regmap, 0x00, &chip_id);
dev_dbg(&dev->client->dev, "chip_id=%02x\n", chip_id);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
if (ret)
goto err;
switch (chip_id) {
case 0xc7:
version = "M"; /* master */
break;
case 0x47:
version = "S"; /* slave */
break;
default:
ret = -ENODEV;
goto err;
}
dev_info(&dev->client->dev,
"NXP TDA18212HN/%s successfully identified\n", version);
fe->tuner_priv = dev;
memcpy(&fe->ops.tuner_ops, &tda18212_tuner_ops,
sizeof(struct dvb_tuner_ops));
i2c_set_clientdata(client, dev);
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
kfree(dev);
return ret;
}
static void tda18212_remove(struct i2c_client *client)
{
struct tda18212_dev *dev = i2c_get_clientdata(client);
struct dvb_frontend *fe = dev->cfg.fe;
dev_dbg(&client->dev, "\n");
memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
fe->tuner_priv = NULL;
kfree(dev);
}
static const struct i2c_device_id tda18212_id[] = {
{"tda18212", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, tda18212_id);
static struct i2c_driver tda18212_driver = {
.driver = {
.name = "tda18212",
},
.probe = tda18212_probe,
.remove = tda18212_remove,
.id_table = tda18212_id,
};
module_i2c_driver(tda18212_driver);
MODULE_DESCRIPTION("NXP TDA18212HN silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tda18212.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
tda18271-maps.c - driver for the Philips / NXP TDA18271 silicon tuner
Copyright (C) 2007, 2008 Michael Krufky <[email protected]>
*/
#include "tda18271-priv.h"
struct tda18271_pll_map {
u32 lomax;
u8 pd; /* post div */
u8 d; /* div */
};
struct tda18271_map {
u32 rfmax;
u8 val;
};
/*---------------------------------------------------------------------*/
static struct tda18271_pll_map tda18271c1_main_pll[] = {
{ .lomax = 32000, .pd = 0x5f, .d = 0xf0 },
{ .lomax = 35000, .pd = 0x5e, .d = 0xe0 },
{ .lomax = 37000, .pd = 0x5d, .d = 0xd0 },
{ .lomax = 41000, .pd = 0x5c, .d = 0xc0 },
{ .lomax = 44000, .pd = 0x5b, .d = 0xb0 },
{ .lomax = 49000, .pd = 0x5a, .d = 0xa0 },
{ .lomax = 54000, .pd = 0x59, .d = 0x90 },
{ .lomax = 61000, .pd = 0x58, .d = 0x80 },
{ .lomax = 65000, .pd = 0x4f, .d = 0x78 },
{ .lomax = 70000, .pd = 0x4e, .d = 0x70 },
{ .lomax = 75000, .pd = 0x4d, .d = 0x68 },
{ .lomax = 82000, .pd = 0x4c, .d = 0x60 },
{ .lomax = 89000, .pd = 0x4b, .d = 0x58 },
{ .lomax = 98000, .pd = 0x4a, .d = 0x50 },
{ .lomax = 109000, .pd = 0x49, .d = 0x48 },
{ .lomax = 123000, .pd = 0x48, .d = 0x40 },
{ .lomax = 131000, .pd = 0x3f, .d = 0x3c },
{ .lomax = 141000, .pd = 0x3e, .d = 0x38 },
{ .lomax = 151000, .pd = 0x3d, .d = 0x34 },
{ .lomax = 164000, .pd = 0x3c, .d = 0x30 },
{ .lomax = 179000, .pd = 0x3b, .d = 0x2c },
{ .lomax = 197000, .pd = 0x3a, .d = 0x28 },
{ .lomax = 219000, .pd = 0x39, .d = 0x24 },
{ .lomax = 246000, .pd = 0x38, .d = 0x20 },
{ .lomax = 263000, .pd = 0x2f, .d = 0x1e },
{ .lomax = 282000, .pd = 0x2e, .d = 0x1c },
{ .lomax = 303000, .pd = 0x2d, .d = 0x1a },
{ .lomax = 329000, .pd = 0x2c, .d = 0x18 },
{ .lomax = 359000, .pd = 0x2b, .d = 0x16 },
{ .lomax = 395000, .pd = 0x2a, .d = 0x14 },
{ .lomax = 438000, .pd = 0x29, .d = 0x12 },
{ .lomax = 493000, .pd = 0x28, .d = 0x10 },
{ .lomax = 526000, .pd = 0x1f, .d = 0x0f },
{ .lomax = 564000, .pd = 0x1e, .d = 0x0e },
{ .lomax = 607000, .pd = 0x1d, .d = 0x0d },
{ .lomax = 658000, .pd = 0x1c, .d = 0x0c },
{ .lomax = 718000, .pd = 0x1b, .d = 0x0b },
{ .lomax = 790000, .pd = 0x1a, .d = 0x0a },
{ .lomax = 877000, .pd = 0x19, .d = 0x09 },
{ .lomax = 987000, .pd = 0x18, .d = 0x08 },
{ .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
};
static struct tda18271_pll_map tda18271c2_main_pll[] = {
{ .lomax = 33125, .pd = 0x57, .d = 0xf0 },
{ .lomax = 35500, .pd = 0x56, .d = 0xe0 },
{ .lomax = 38188, .pd = 0x55, .d = 0xd0 },
{ .lomax = 41375, .pd = 0x54, .d = 0xc0 },
{ .lomax = 45125, .pd = 0x53, .d = 0xb0 },
{ .lomax = 49688, .pd = 0x52, .d = 0xa0 },
{ .lomax = 55188, .pd = 0x51, .d = 0x90 },
{ .lomax = 62125, .pd = 0x50, .d = 0x80 },
{ .lomax = 66250, .pd = 0x47, .d = 0x78 },
{ .lomax = 71000, .pd = 0x46, .d = 0x70 },
{ .lomax = 76375, .pd = 0x45, .d = 0x68 },
{ .lomax = 82750, .pd = 0x44, .d = 0x60 },
{ .lomax = 90250, .pd = 0x43, .d = 0x58 },
{ .lomax = 99375, .pd = 0x42, .d = 0x50 },
{ .lomax = 110375, .pd = 0x41, .d = 0x48 },
{ .lomax = 124250, .pd = 0x40, .d = 0x40 },
{ .lomax = 132500, .pd = 0x37, .d = 0x3c },
{ .lomax = 142000, .pd = 0x36, .d = 0x38 },
{ .lomax = 152750, .pd = 0x35, .d = 0x34 },
{ .lomax = 165500, .pd = 0x34, .d = 0x30 },
{ .lomax = 180500, .pd = 0x33, .d = 0x2c },
{ .lomax = 198750, .pd = 0x32, .d = 0x28 },
{ .lomax = 220750, .pd = 0x31, .d = 0x24 },
{ .lomax = 248500, .pd = 0x30, .d = 0x20 },
{ .lomax = 265000, .pd = 0x27, .d = 0x1e },
{ .lomax = 284000, .pd = 0x26, .d = 0x1c },
{ .lomax = 305500, .pd = 0x25, .d = 0x1a },
{ .lomax = 331000, .pd = 0x24, .d = 0x18 },
{ .lomax = 361000, .pd = 0x23, .d = 0x16 },
{ .lomax = 397500, .pd = 0x22, .d = 0x14 },
{ .lomax = 441500, .pd = 0x21, .d = 0x12 },
{ .lomax = 497000, .pd = 0x20, .d = 0x10 },
{ .lomax = 530000, .pd = 0x17, .d = 0x0f },
{ .lomax = 568000, .pd = 0x16, .d = 0x0e },
{ .lomax = 611000, .pd = 0x15, .d = 0x0d },
{ .lomax = 662000, .pd = 0x14, .d = 0x0c },
{ .lomax = 722000, .pd = 0x13, .d = 0x0b },
{ .lomax = 795000, .pd = 0x12, .d = 0x0a },
{ .lomax = 883000, .pd = 0x11, .d = 0x09 },
{ .lomax = 994000, .pd = 0x10, .d = 0x08 },
{ .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
};
static struct tda18271_pll_map tda18271c1_cal_pll[] = {
{ .lomax = 33000, .pd = 0xdd, .d = 0xd0 },
{ .lomax = 36000, .pd = 0xdc, .d = 0xc0 },
{ .lomax = 40000, .pd = 0xdb, .d = 0xb0 },
{ .lomax = 44000, .pd = 0xda, .d = 0xa0 },
{ .lomax = 49000, .pd = 0xd9, .d = 0x90 },
{ .lomax = 55000, .pd = 0xd8, .d = 0x80 },
{ .lomax = 63000, .pd = 0xd3, .d = 0x70 },
{ .lomax = 67000, .pd = 0xcd, .d = 0x68 },
{ .lomax = 73000, .pd = 0xcc, .d = 0x60 },
{ .lomax = 80000, .pd = 0xcb, .d = 0x58 },
{ .lomax = 88000, .pd = 0xca, .d = 0x50 },
{ .lomax = 98000, .pd = 0xc9, .d = 0x48 },
{ .lomax = 110000, .pd = 0xc8, .d = 0x40 },
{ .lomax = 126000, .pd = 0xc3, .d = 0x38 },
{ .lomax = 135000, .pd = 0xbd, .d = 0x34 },
{ .lomax = 147000, .pd = 0xbc, .d = 0x30 },
{ .lomax = 160000, .pd = 0xbb, .d = 0x2c },
{ .lomax = 176000, .pd = 0xba, .d = 0x28 },
{ .lomax = 196000, .pd = 0xb9, .d = 0x24 },
{ .lomax = 220000, .pd = 0xb8, .d = 0x20 },
{ .lomax = 252000, .pd = 0xb3, .d = 0x1c },
{ .lomax = 271000, .pd = 0xad, .d = 0x1a },
{ .lomax = 294000, .pd = 0xac, .d = 0x18 },
{ .lomax = 321000, .pd = 0xab, .d = 0x16 },
{ .lomax = 353000, .pd = 0xaa, .d = 0x14 },
{ .lomax = 392000, .pd = 0xa9, .d = 0x12 },
{ .lomax = 441000, .pd = 0xa8, .d = 0x10 },
{ .lomax = 505000, .pd = 0xa3, .d = 0x0e },
{ .lomax = 543000, .pd = 0x9d, .d = 0x0d },
{ .lomax = 589000, .pd = 0x9c, .d = 0x0c },
{ .lomax = 642000, .pd = 0x9b, .d = 0x0b },
{ .lomax = 707000, .pd = 0x9a, .d = 0x0a },
{ .lomax = 785000, .pd = 0x99, .d = 0x09 },
{ .lomax = 883000, .pd = 0x98, .d = 0x08 },
{ .lomax = 1010000, .pd = 0x93, .d = 0x07 },
{ .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
};
static struct tda18271_pll_map tda18271c2_cal_pll[] = {
{ .lomax = 33813, .pd = 0xdd, .d = 0xd0 },
{ .lomax = 36625, .pd = 0xdc, .d = 0xc0 },
{ .lomax = 39938, .pd = 0xdb, .d = 0xb0 },
{ .lomax = 43938, .pd = 0xda, .d = 0xa0 },
{ .lomax = 48813, .pd = 0xd9, .d = 0x90 },
{ .lomax = 54938, .pd = 0xd8, .d = 0x80 },
{ .lomax = 62813, .pd = 0xd3, .d = 0x70 },
{ .lomax = 67625, .pd = 0xcd, .d = 0x68 },
{ .lomax = 73250, .pd = 0xcc, .d = 0x60 },
{ .lomax = 79875, .pd = 0xcb, .d = 0x58 },
{ .lomax = 87875, .pd = 0xca, .d = 0x50 },
{ .lomax = 97625, .pd = 0xc9, .d = 0x48 },
{ .lomax = 109875, .pd = 0xc8, .d = 0x40 },
{ .lomax = 125625, .pd = 0xc3, .d = 0x38 },
{ .lomax = 135250, .pd = 0xbd, .d = 0x34 },
{ .lomax = 146500, .pd = 0xbc, .d = 0x30 },
{ .lomax = 159750, .pd = 0xbb, .d = 0x2c },
{ .lomax = 175750, .pd = 0xba, .d = 0x28 },
{ .lomax = 195250, .pd = 0xb9, .d = 0x24 },
{ .lomax = 219750, .pd = 0xb8, .d = 0x20 },
{ .lomax = 251250, .pd = 0xb3, .d = 0x1c },
{ .lomax = 270500, .pd = 0xad, .d = 0x1a },
{ .lomax = 293000, .pd = 0xac, .d = 0x18 },
{ .lomax = 319500, .pd = 0xab, .d = 0x16 },
{ .lomax = 351500, .pd = 0xaa, .d = 0x14 },
{ .lomax = 390500, .pd = 0xa9, .d = 0x12 },
{ .lomax = 439500, .pd = 0xa8, .d = 0x10 },
{ .lomax = 502500, .pd = 0xa3, .d = 0x0e },
{ .lomax = 541000, .pd = 0x9d, .d = 0x0d },
{ .lomax = 586000, .pd = 0x9c, .d = 0x0c },
{ .lomax = 639000, .pd = 0x9b, .d = 0x0b },
{ .lomax = 703000, .pd = 0x9a, .d = 0x0a },
{ .lomax = 781000, .pd = 0x99, .d = 0x09 },
{ .lomax = 879000, .pd = 0x98, .d = 0x08 },
{ .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
};
static struct tda18271_map tda18271_bp_filter[] = {
{ .rfmax = 62000, .val = 0x00 },
{ .rfmax = 84000, .val = 0x01 },
{ .rfmax = 100000, .val = 0x02 },
{ .rfmax = 140000, .val = 0x03 },
{ .rfmax = 170000, .val = 0x04 },
{ .rfmax = 180000, .val = 0x05 },
{ .rfmax = 865000, .val = 0x06 },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
static struct tda18271_map tda18271c1_km[] = {
{ .rfmax = 61100, .val = 0x74 },
{ .rfmax = 350000, .val = 0x40 },
{ .rfmax = 720000, .val = 0x30 },
{ .rfmax = 865000, .val = 0x40 },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
static struct tda18271_map tda18271c2_km[] = {
{ .rfmax = 47900, .val = 0x38 },
{ .rfmax = 61100, .val = 0x44 },
{ .rfmax = 350000, .val = 0x30 },
{ .rfmax = 720000, .val = 0x24 },
{ .rfmax = 865000, .val = 0x3c },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
static struct tda18271_map tda18271_rf_band[] = {
{ .rfmax = 47900, .val = 0x00 },
{ .rfmax = 61100, .val = 0x01 },
{ .rfmax = 152600, .val = 0x02 },
{ .rfmax = 164700, .val = 0x03 },
{ .rfmax = 203500, .val = 0x04 },
{ .rfmax = 457800, .val = 0x05 },
{ .rfmax = 865000, .val = 0x06 },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
static struct tda18271_map tda18271_gain_taper[] = {
{ .rfmax = 45400, .val = 0x1f },
{ .rfmax = 45800, .val = 0x1e },
{ .rfmax = 46200, .val = 0x1d },
{ .rfmax = 46700, .val = 0x1c },
{ .rfmax = 47100, .val = 0x1b },
{ .rfmax = 47500, .val = 0x1a },
{ .rfmax = 47900, .val = 0x19 },
{ .rfmax = 49600, .val = 0x17 },
{ .rfmax = 51200, .val = 0x16 },
{ .rfmax = 52900, .val = 0x15 },
{ .rfmax = 54500, .val = 0x14 },
{ .rfmax = 56200, .val = 0x13 },
{ .rfmax = 57800, .val = 0x12 },
{ .rfmax = 59500, .val = 0x11 },
{ .rfmax = 61100, .val = 0x10 },
{ .rfmax = 67600, .val = 0x0d },
{ .rfmax = 74200, .val = 0x0c },
{ .rfmax = 80700, .val = 0x0b },
{ .rfmax = 87200, .val = 0x0a },
{ .rfmax = 93800, .val = 0x09 },
{ .rfmax = 100300, .val = 0x08 },
{ .rfmax = 106900, .val = 0x07 },
{ .rfmax = 113400, .val = 0x06 },
{ .rfmax = 119900, .val = 0x05 },
{ .rfmax = 126500, .val = 0x04 },
{ .rfmax = 133000, .val = 0x03 },
{ .rfmax = 139500, .val = 0x02 },
{ .rfmax = 146100, .val = 0x01 },
{ .rfmax = 152600, .val = 0x00 },
{ .rfmax = 154300, .val = 0x1f },
{ .rfmax = 156100, .val = 0x1e },
{ .rfmax = 157800, .val = 0x1d },
{ .rfmax = 159500, .val = 0x1c },
{ .rfmax = 161200, .val = 0x1b },
{ .rfmax = 163000, .val = 0x1a },
{ .rfmax = 164700, .val = 0x19 },
{ .rfmax = 170200, .val = 0x17 },
{ .rfmax = 175800, .val = 0x16 },
{ .rfmax = 181300, .val = 0x15 },
{ .rfmax = 186900, .val = 0x14 },
{ .rfmax = 192400, .val = 0x13 },
{ .rfmax = 198000, .val = 0x12 },
{ .rfmax = 203500, .val = 0x11 },
{ .rfmax = 216200, .val = 0x14 },
{ .rfmax = 228900, .val = 0x13 },
{ .rfmax = 241600, .val = 0x12 },
{ .rfmax = 254400, .val = 0x11 },
{ .rfmax = 267100, .val = 0x10 },
{ .rfmax = 279800, .val = 0x0f },
{ .rfmax = 292500, .val = 0x0e },
{ .rfmax = 305200, .val = 0x0d },
{ .rfmax = 317900, .val = 0x0c },
{ .rfmax = 330700, .val = 0x0b },
{ .rfmax = 343400, .val = 0x0a },
{ .rfmax = 356100, .val = 0x09 },
{ .rfmax = 368800, .val = 0x08 },
{ .rfmax = 381500, .val = 0x07 },
{ .rfmax = 394200, .val = 0x06 },
{ .rfmax = 406900, .val = 0x05 },
{ .rfmax = 419700, .val = 0x04 },
{ .rfmax = 432400, .val = 0x03 },
{ .rfmax = 445100, .val = 0x02 },
{ .rfmax = 457800, .val = 0x01 },
{ .rfmax = 476300, .val = 0x19 },
{ .rfmax = 494800, .val = 0x18 },
{ .rfmax = 513300, .val = 0x17 },
{ .rfmax = 531800, .val = 0x16 },
{ .rfmax = 550300, .val = 0x15 },
{ .rfmax = 568900, .val = 0x14 },
{ .rfmax = 587400, .val = 0x13 },
{ .rfmax = 605900, .val = 0x12 },
{ .rfmax = 624400, .val = 0x11 },
{ .rfmax = 642900, .val = 0x10 },
{ .rfmax = 661400, .val = 0x0f },
{ .rfmax = 679900, .val = 0x0e },
{ .rfmax = 698400, .val = 0x0d },
{ .rfmax = 716900, .val = 0x0c },
{ .rfmax = 735400, .val = 0x0b },
{ .rfmax = 753900, .val = 0x0a },
{ .rfmax = 772500, .val = 0x09 },
{ .rfmax = 791000, .val = 0x08 },
{ .rfmax = 809500, .val = 0x07 },
{ .rfmax = 828000, .val = 0x06 },
{ .rfmax = 846500, .val = 0x05 },
{ .rfmax = 865000, .val = 0x04 },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
static struct tda18271_map tda18271c1_rf_cal[] = {
{ .rfmax = 41000, .val = 0x1e },
{ .rfmax = 43000, .val = 0x30 },
{ .rfmax = 45000, .val = 0x43 },
{ .rfmax = 46000, .val = 0x4d },
{ .rfmax = 47000, .val = 0x54 },
{ .rfmax = 47900, .val = 0x64 },
{ .rfmax = 49100, .val = 0x20 },
{ .rfmax = 50000, .val = 0x22 },
{ .rfmax = 51000, .val = 0x2a },
{ .rfmax = 53000, .val = 0x32 },
{ .rfmax = 55000, .val = 0x35 },
{ .rfmax = 56000, .val = 0x3c },
{ .rfmax = 57000, .val = 0x3f },
{ .rfmax = 58000, .val = 0x48 },
{ .rfmax = 59000, .val = 0x4d },
{ .rfmax = 60000, .val = 0x58 },
{ .rfmax = 61100, .val = 0x5f },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
static struct tda18271_map tda18271c2_rf_cal[] = {
{ .rfmax = 41000, .val = 0x0f },
{ .rfmax = 43000, .val = 0x1c },
{ .rfmax = 45000, .val = 0x2f },
{ .rfmax = 46000, .val = 0x39 },
{ .rfmax = 47000, .val = 0x40 },
{ .rfmax = 47900, .val = 0x50 },
{ .rfmax = 49100, .val = 0x16 },
{ .rfmax = 50000, .val = 0x18 },
{ .rfmax = 51000, .val = 0x20 },
{ .rfmax = 53000, .val = 0x28 },
{ .rfmax = 55000, .val = 0x2b },
{ .rfmax = 56000, .val = 0x32 },
{ .rfmax = 57000, .val = 0x35 },
{ .rfmax = 58000, .val = 0x3e },
{ .rfmax = 59000, .val = 0x43 },
{ .rfmax = 60000, .val = 0x4e },
{ .rfmax = 61100, .val = 0x55 },
{ .rfmax = 63000, .val = 0x0f },
{ .rfmax = 64000, .val = 0x11 },
{ .rfmax = 65000, .val = 0x12 },
{ .rfmax = 66000, .val = 0x15 },
{ .rfmax = 67000, .val = 0x16 },
{ .rfmax = 68000, .val = 0x17 },
{ .rfmax = 70000, .val = 0x19 },
{ .rfmax = 71000, .val = 0x1c },
{ .rfmax = 72000, .val = 0x1d },
{ .rfmax = 73000, .val = 0x1f },
{ .rfmax = 74000, .val = 0x20 },
{ .rfmax = 75000, .val = 0x21 },
{ .rfmax = 76000, .val = 0x24 },
{ .rfmax = 77000, .val = 0x25 },
{ .rfmax = 78000, .val = 0x27 },
{ .rfmax = 80000, .val = 0x28 },
{ .rfmax = 81000, .val = 0x29 },
{ .rfmax = 82000, .val = 0x2d },
{ .rfmax = 83000, .val = 0x2e },
{ .rfmax = 84000, .val = 0x2f },
{ .rfmax = 85000, .val = 0x31 },
{ .rfmax = 86000, .val = 0x33 },
{ .rfmax = 87000, .val = 0x34 },
{ .rfmax = 88000, .val = 0x35 },
{ .rfmax = 89000, .val = 0x37 },
{ .rfmax = 90000, .val = 0x38 },
{ .rfmax = 91000, .val = 0x39 },
{ .rfmax = 93000, .val = 0x3c },
{ .rfmax = 94000, .val = 0x3e },
{ .rfmax = 95000, .val = 0x3f },
{ .rfmax = 96000, .val = 0x40 },
{ .rfmax = 97000, .val = 0x42 },
{ .rfmax = 99000, .val = 0x45 },
{ .rfmax = 100000, .val = 0x46 },
{ .rfmax = 102000, .val = 0x48 },
{ .rfmax = 103000, .val = 0x4a },
{ .rfmax = 105000, .val = 0x4d },
{ .rfmax = 106000, .val = 0x4e },
{ .rfmax = 107000, .val = 0x50 },
{ .rfmax = 108000, .val = 0x51 },
{ .rfmax = 110000, .val = 0x54 },
{ .rfmax = 111000, .val = 0x56 },
{ .rfmax = 112000, .val = 0x57 },
{ .rfmax = 113000, .val = 0x58 },
{ .rfmax = 114000, .val = 0x59 },
{ .rfmax = 115000, .val = 0x5c },
{ .rfmax = 116000, .val = 0x5d },
{ .rfmax = 117000, .val = 0x5f },
{ .rfmax = 119000, .val = 0x60 },
{ .rfmax = 120000, .val = 0x64 },
{ .rfmax = 121000, .val = 0x65 },
{ .rfmax = 122000, .val = 0x66 },
{ .rfmax = 123000, .val = 0x68 },
{ .rfmax = 124000, .val = 0x69 },
{ .rfmax = 125000, .val = 0x6c },
{ .rfmax = 126000, .val = 0x6d },
{ .rfmax = 127000, .val = 0x6e },
{ .rfmax = 128000, .val = 0x70 },
{ .rfmax = 129000, .val = 0x71 },
{ .rfmax = 130000, .val = 0x75 },
{ .rfmax = 131000, .val = 0x77 },
{ .rfmax = 132000, .val = 0x78 },
{ .rfmax = 133000, .val = 0x7b },
{ .rfmax = 134000, .val = 0x7e },
{ .rfmax = 135000, .val = 0x81 },
{ .rfmax = 136000, .val = 0x82 },
{ .rfmax = 137000, .val = 0x87 },
{ .rfmax = 138000, .val = 0x88 },
{ .rfmax = 139000, .val = 0x8d },
{ .rfmax = 140000, .val = 0x8e },
{ .rfmax = 141000, .val = 0x91 },
{ .rfmax = 142000, .val = 0x95 },
{ .rfmax = 143000, .val = 0x9a },
{ .rfmax = 144000, .val = 0x9d },
{ .rfmax = 145000, .val = 0xa1 },
{ .rfmax = 146000, .val = 0xa2 },
{ .rfmax = 147000, .val = 0xa4 },
{ .rfmax = 148000, .val = 0xa9 },
{ .rfmax = 149000, .val = 0xae },
{ .rfmax = 150000, .val = 0xb0 },
{ .rfmax = 151000, .val = 0xb1 },
{ .rfmax = 152000, .val = 0xb7 },
{ .rfmax = 152600, .val = 0xbd },
{ .rfmax = 154000, .val = 0x20 },
{ .rfmax = 155000, .val = 0x22 },
{ .rfmax = 156000, .val = 0x24 },
{ .rfmax = 157000, .val = 0x25 },
{ .rfmax = 158000, .val = 0x27 },
{ .rfmax = 159000, .val = 0x29 },
{ .rfmax = 160000, .val = 0x2c },
{ .rfmax = 161000, .val = 0x2d },
{ .rfmax = 163000, .val = 0x2e },
{ .rfmax = 164000, .val = 0x2f },
{ .rfmax = 164700, .val = 0x30 },
{ .rfmax = 166000, .val = 0x11 },
{ .rfmax = 167000, .val = 0x12 },
{ .rfmax = 168000, .val = 0x13 },
{ .rfmax = 169000, .val = 0x14 },
{ .rfmax = 170000, .val = 0x15 },
{ .rfmax = 172000, .val = 0x16 },
{ .rfmax = 173000, .val = 0x17 },
{ .rfmax = 174000, .val = 0x18 },
{ .rfmax = 175000, .val = 0x1a },
{ .rfmax = 176000, .val = 0x1b },
{ .rfmax = 178000, .val = 0x1d },
{ .rfmax = 179000, .val = 0x1e },
{ .rfmax = 180000, .val = 0x1f },
{ .rfmax = 181000, .val = 0x20 },
{ .rfmax = 182000, .val = 0x21 },
{ .rfmax = 183000, .val = 0x22 },
{ .rfmax = 184000, .val = 0x24 },
{ .rfmax = 185000, .val = 0x25 },
{ .rfmax = 186000, .val = 0x26 },
{ .rfmax = 187000, .val = 0x27 },
{ .rfmax = 188000, .val = 0x29 },
{ .rfmax = 189000, .val = 0x2a },
{ .rfmax = 190000, .val = 0x2c },
{ .rfmax = 191000, .val = 0x2d },
{ .rfmax = 192000, .val = 0x2e },
{ .rfmax = 193000, .val = 0x2f },
{ .rfmax = 194000, .val = 0x30 },
{ .rfmax = 195000, .val = 0x33 },
{ .rfmax = 196000, .val = 0x35 },
{ .rfmax = 198000, .val = 0x36 },
{ .rfmax = 200000, .val = 0x38 },
{ .rfmax = 201000, .val = 0x3c },
{ .rfmax = 202000, .val = 0x3d },
{ .rfmax = 203500, .val = 0x3e },
{ .rfmax = 206000, .val = 0x0e },
{ .rfmax = 208000, .val = 0x0f },
{ .rfmax = 212000, .val = 0x10 },
{ .rfmax = 216000, .val = 0x11 },
{ .rfmax = 217000, .val = 0x12 },
{ .rfmax = 218000, .val = 0x13 },
{ .rfmax = 220000, .val = 0x14 },
{ .rfmax = 222000, .val = 0x15 },
{ .rfmax = 225000, .val = 0x16 },
{ .rfmax = 228000, .val = 0x17 },
{ .rfmax = 231000, .val = 0x18 },
{ .rfmax = 234000, .val = 0x19 },
{ .rfmax = 235000, .val = 0x1a },
{ .rfmax = 236000, .val = 0x1b },
{ .rfmax = 237000, .val = 0x1c },
{ .rfmax = 240000, .val = 0x1d },
{ .rfmax = 242000, .val = 0x1e },
{ .rfmax = 244000, .val = 0x1f },
{ .rfmax = 247000, .val = 0x20 },
{ .rfmax = 249000, .val = 0x21 },
{ .rfmax = 252000, .val = 0x22 },
{ .rfmax = 253000, .val = 0x23 },
{ .rfmax = 254000, .val = 0x24 },
{ .rfmax = 256000, .val = 0x25 },
{ .rfmax = 259000, .val = 0x26 },
{ .rfmax = 262000, .val = 0x27 },
{ .rfmax = 264000, .val = 0x28 },
{ .rfmax = 267000, .val = 0x29 },
{ .rfmax = 269000, .val = 0x2a },
{ .rfmax = 271000, .val = 0x2b },
{ .rfmax = 273000, .val = 0x2c },
{ .rfmax = 275000, .val = 0x2d },
{ .rfmax = 277000, .val = 0x2e },
{ .rfmax = 279000, .val = 0x2f },
{ .rfmax = 282000, .val = 0x30 },
{ .rfmax = 284000, .val = 0x31 },
{ .rfmax = 286000, .val = 0x32 },
{ .rfmax = 287000, .val = 0x33 },
{ .rfmax = 290000, .val = 0x34 },
{ .rfmax = 293000, .val = 0x35 },
{ .rfmax = 295000, .val = 0x36 },
{ .rfmax = 297000, .val = 0x37 },
{ .rfmax = 300000, .val = 0x38 },
{ .rfmax = 303000, .val = 0x39 },
{ .rfmax = 305000, .val = 0x3a },
{ .rfmax = 306000, .val = 0x3b },
{ .rfmax = 307000, .val = 0x3c },
{ .rfmax = 310000, .val = 0x3d },
{ .rfmax = 312000, .val = 0x3e },
{ .rfmax = 315000, .val = 0x3f },
{ .rfmax = 318000, .val = 0x40 },
{ .rfmax = 320000, .val = 0x41 },
{ .rfmax = 323000, .val = 0x42 },
{ .rfmax = 324000, .val = 0x43 },
{ .rfmax = 325000, .val = 0x44 },
{ .rfmax = 327000, .val = 0x45 },
{ .rfmax = 331000, .val = 0x46 },
{ .rfmax = 334000, .val = 0x47 },
{ .rfmax = 337000, .val = 0x48 },
{ .rfmax = 339000, .val = 0x49 },
{ .rfmax = 340000, .val = 0x4a },
{ .rfmax = 341000, .val = 0x4b },
{ .rfmax = 343000, .val = 0x4c },
{ .rfmax = 345000, .val = 0x4d },
{ .rfmax = 349000, .val = 0x4e },
{ .rfmax = 352000, .val = 0x4f },
{ .rfmax = 353000, .val = 0x50 },
{ .rfmax = 355000, .val = 0x51 },
{ .rfmax = 357000, .val = 0x52 },
{ .rfmax = 359000, .val = 0x53 },
{ .rfmax = 361000, .val = 0x54 },
{ .rfmax = 362000, .val = 0x55 },
{ .rfmax = 364000, .val = 0x56 },
{ .rfmax = 368000, .val = 0x57 },
{ .rfmax = 370000, .val = 0x58 },
{ .rfmax = 372000, .val = 0x59 },
{ .rfmax = 375000, .val = 0x5a },
{ .rfmax = 376000, .val = 0x5b },
{ .rfmax = 377000, .val = 0x5c },
{ .rfmax = 379000, .val = 0x5d },
{ .rfmax = 382000, .val = 0x5e },
{ .rfmax = 384000, .val = 0x5f },
{ .rfmax = 385000, .val = 0x60 },
{ .rfmax = 386000, .val = 0x61 },
{ .rfmax = 388000, .val = 0x62 },
{ .rfmax = 390000, .val = 0x63 },
{ .rfmax = 393000, .val = 0x64 },
{ .rfmax = 394000, .val = 0x65 },
{ .rfmax = 396000, .val = 0x66 },
{ .rfmax = 397000, .val = 0x67 },
{ .rfmax = 398000, .val = 0x68 },
{ .rfmax = 400000, .val = 0x69 },
{ .rfmax = 402000, .val = 0x6a },
{ .rfmax = 403000, .val = 0x6b },
{ .rfmax = 407000, .val = 0x6c },
{ .rfmax = 408000, .val = 0x6d },
{ .rfmax = 409000, .val = 0x6e },
{ .rfmax = 410000, .val = 0x6f },
{ .rfmax = 411000, .val = 0x70 },
{ .rfmax = 412000, .val = 0x71 },
{ .rfmax = 413000, .val = 0x72 },
{ .rfmax = 414000, .val = 0x73 },
{ .rfmax = 417000, .val = 0x74 },
{ .rfmax = 418000, .val = 0x75 },
{ .rfmax = 420000, .val = 0x76 },
{ .rfmax = 422000, .val = 0x77 },
{ .rfmax = 423000, .val = 0x78 },
{ .rfmax = 424000, .val = 0x79 },
{ .rfmax = 427000, .val = 0x7a },
{ .rfmax = 428000, .val = 0x7b },
{ .rfmax = 429000, .val = 0x7d },
{ .rfmax = 432000, .val = 0x7f },
{ .rfmax = 434000, .val = 0x80 },
{ .rfmax = 435000, .val = 0x81 },
{ .rfmax = 436000, .val = 0x83 },
{ .rfmax = 437000, .val = 0x84 },
{ .rfmax = 438000, .val = 0x85 },
{ .rfmax = 439000, .val = 0x86 },
{ .rfmax = 440000, .val = 0x87 },
{ .rfmax = 441000, .val = 0x88 },
{ .rfmax = 442000, .val = 0x89 },
{ .rfmax = 445000, .val = 0x8a },
{ .rfmax = 446000, .val = 0x8b },
{ .rfmax = 447000, .val = 0x8c },
{ .rfmax = 448000, .val = 0x8e },
{ .rfmax = 449000, .val = 0x8f },
{ .rfmax = 450000, .val = 0x90 },
{ .rfmax = 452000, .val = 0x91 },
{ .rfmax = 453000, .val = 0x93 },
{ .rfmax = 454000, .val = 0x94 },
{ .rfmax = 456000, .val = 0x96 },
{ .rfmax = 457800, .val = 0x98 },
{ .rfmax = 461000, .val = 0x11 },
{ .rfmax = 468000, .val = 0x12 },
{ .rfmax = 472000, .val = 0x13 },
{ .rfmax = 473000, .val = 0x14 },
{ .rfmax = 474000, .val = 0x15 },
{ .rfmax = 481000, .val = 0x16 },
{ .rfmax = 486000, .val = 0x17 },
{ .rfmax = 491000, .val = 0x18 },
{ .rfmax = 498000, .val = 0x19 },
{ .rfmax = 499000, .val = 0x1a },
{ .rfmax = 501000, .val = 0x1b },
{ .rfmax = 506000, .val = 0x1c },
{ .rfmax = 511000, .val = 0x1d },
{ .rfmax = 516000, .val = 0x1e },
{ .rfmax = 520000, .val = 0x1f },
{ .rfmax = 521000, .val = 0x20 },
{ .rfmax = 525000, .val = 0x21 },
{ .rfmax = 529000, .val = 0x22 },
{ .rfmax = 533000, .val = 0x23 },
{ .rfmax = 539000, .val = 0x24 },
{ .rfmax = 541000, .val = 0x25 },
{ .rfmax = 547000, .val = 0x26 },
{ .rfmax = 549000, .val = 0x27 },
{ .rfmax = 551000, .val = 0x28 },
{ .rfmax = 556000, .val = 0x29 },
{ .rfmax = 561000, .val = 0x2a },
{ .rfmax = 563000, .val = 0x2b },
{ .rfmax = 565000, .val = 0x2c },
{ .rfmax = 569000, .val = 0x2d },
{ .rfmax = 571000, .val = 0x2e },
{ .rfmax = 577000, .val = 0x2f },
{ .rfmax = 580000, .val = 0x30 },
{ .rfmax = 582000, .val = 0x31 },
{ .rfmax = 584000, .val = 0x32 },
{ .rfmax = 588000, .val = 0x33 },
{ .rfmax = 591000, .val = 0x34 },
{ .rfmax = 596000, .val = 0x35 },
{ .rfmax = 598000, .val = 0x36 },
{ .rfmax = 603000, .val = 0x37 },
{ .rfmax = 604000, .val = 0x38 },
{ .rfmax = 606000, .val = 0x39 },
{ .rfmax = 612000, .val = 0x3a },
{ .rfmax = 615000, .val = 0x3b },
{ .rfmax = 617000, .val = 0x3c },
{ .rfmax = 621000, .val = 0x3d },
{ .rfmax = 622000, .val = 0x3e },
{ .rfmax = 625000, .val = 0x3f },
{ .rfmax = 632000, .val = 0x40 },
{ .rfmax = 633000, .val = 0x41 },
{ .rfmax = 634000, .val = 0x42 },
{ .rfmax = 642000, .val = 0x43 },
{ .rfmax = 643000, .val = 0x44 },
{ .rfmax = 647000, .val = 0x45 },
{ .rfmax = 650000, .val = 0x46 },
{ .rfmax = 652000, .val = 0x47 },
{ .rfmax = 657000, .val = 0x48 },
{ .rfmax = 661000, .val = 0x49 },
{ .rfmax = 662000, .val = 0x4a },
{ .rfmax = 665000, .val = 0x4b },
{ .rfmax = 667000, .val = 0x4c },
{ .rfmax = 670000, .val = 0x4d },
{ .rfmax = 673000, .val = 0x4e },
{ .rfmax = 676000, .val = 0x4f },
{ .rfmax = 677000, .val = 0x50 },
{ .rfmax = 681000, .val = 0x51 },
{ .rfmax = 683000, .val = 0x52 },
{ .rfmax = 686000, .val = 0x53 },
{ .rfmax = 688000, .val = 0x54 },
{ .rfmax = 689000, .val = 0x55 },
{ .rfmax = 691000, .val = 0x56 },
{ .rfmax = 695000, .val = 0x57 },
{ .rfmax = 698000, .val = 0x58 },
{ .rfmax = 703000, .val = 0x59 },
{ .rfmax = 704000, .val = 0x5a },
{ .rfmax = 705000, .val = 0x5b },
{ .rfmax = 707000, .val = 0x5c },
{ .rfmax = 710000, .val = 0x5d },
{ .rfmax = 712000, .val = 0x5e },
{ .rfmax = 717000, .val = 0x5f },
{ .rfmax = 718000, .val = 0x60 },
{ .rfmax = 721000, .val = 0x61 },
{ .rfmax = 722000, .val = 0x62 },
{ .rfmax = 723000, .val = 0x63 },
{ .rfmax = 725000, .val = 0x64 },
{ .rfmax = 727000, .val = 0x65 },
{ .rfmax = 730000, .val = 0x66 },
{ .rfmax = 732000, .val = 0x67 },
{ .rfmax = 735000, .val = 0x68 },
{ .rfmax = 740000, .val = 0x69 },
{ .rfmax = 741000, .val = 0x6a },
{ .rfmax = 742000, .val = 0x6b },
{ .rfmax = 743000, .val = 0x6c },
{ .rfmax = 745000, .val = 0x6d },
{ .rfmax = 747000, .val = 0x6e },
{ .rfmax = 748000, .val = 0x6f },
{ .rfmax = 750000, .val = 0x70 },
{ .rfmax = 752000, .val = 0x71 },
{ .rfmax = 754000, .val = 0x72 },
{ .rfmax = 757000, .val = 0x73 },
{ .rfmax = 758000, .val = 0x74 },
{ .rfmax = 760000, .val = 0x75 },
{ .rfmax = 763000, .val = 0x76 },
{ .rfmax = 764000, .val = 0x77 },
{ .rfmax = 766000, .val = 0x78 },
{ .rfmax = 767000, .val = 0x79 },
{ .rfmax = 768000, .val = 0x7a },
{ .rfmax = 773000, .val = 0x7b },
{ .rfmax = 774000, .val = 0x7c },
{ .rfmax = 776000, .val = 0x7d },
{ .rfmax = 777000, .val = 0x7e },
{ .rfmax = 778000, .val = 0x7f },
{ .rfmax = 779000, .val = 0x80 },
{ .rfmax = 781000, .val = 0x81 },
{ .rfmax = 783000, .val = 0x82 },
{ .rfmax = 784000, .val = 0x83 },
{ .rfmax = 785000, .val = 0x84 },
{ .rfmax = 786000, .val = 0x85 },
{ .rfmax = 793000, .val = 0x86 },
{ .rfmax = 794000, .val = 0x87 },
{ .rfmax = 795000, .val = 0x88 },
{ .rfmax = 797000, .val = 0x89 },
{ .rfmax = 799000, .val = 0x8a },
{ .rfmax = 801000, .val = 0x8b },
{ .rfmax = 802000, .val = 0x8c },
{ .rfmax = 803000, .val = 0x8d },
{ .rfmax = 804000, .val = 0x8e },
{ .rfmax = 810000, .val = 0x90 },
{ .rfmax = 811000, .val = 0x91 },
{ .rfmax = 812000, .val = 0x92 },
{ .rfmax = 814000, .val = 0x93 },
{ .rfmax = 816000, .val = 0x94 },
{ .rfmax = 817000, .val = 0x96 },
{ .rfmax = 818000, .val = 0x97 },
{ .rfmax = 820000, .val = 0x98 },
{ .rfmax = 821000, .val = 0x99 },
{ .rfmax = 822000, .val = 0x9a },
{ .rfmax = 828000, .val = 0x9b },
{ .rfmax = 829000, .val = 0x9d },
{ .rfmax = 830000, .val = 0x9f },
{ .rfmax = 831000, .val = 0xa0 },
{ .rfmax = 833000, .val = 0xa1 },
{ .rfmax = 835000, .val = 0xa2 },
{ .rfmax = 836000, .val = 0xa3 },
{ .rfmax = 837000, .val = 0xa4 },
{ .rfmax = 838000, .val = 0xa6 },
{ .rfmax = 840000, .val = 0xa8 },
{ .rfmax = 842000, .val = 0xa9 },
{ .rfmax = 845000, .val = 0xaa },
{ .rfmax = 846000, .val = 0xab },
{ .rfmax = 847000, .val = 0xad },
{ .rfmax = 848000, .val = 0xae },
{ .rfmax = 852000, .val = 0xaf },
{ .rfmax = 853000, .val = 0xb0 },
{ .rfmax = 858000, .val = 0xb1 },
{ .rfmax = 860000, .val = 0xb2 },
{ .rfmax = 861000, .val = 0xb3 },
{ .rfmax = 862000, .val = 0xb4 },
{ .rfmax = 863000, .val = 0xb6 },
{ .rfmax = 864000, .val = 0xb8 },
{ .rfmax = 865000, .val = 0xb9 },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
static struct tda18271_map tda18271_ir_measure[] = {
{ .rfmax = 30000, .val = 4 },
{ .rfmax = 200000, .val = 5 },
{ .rfmax = 600000, .val = 6 },
{ .rfmax = 865000, .val = 7 },
{ .rfmax = 0, .val = 0 }, /* end */
};
static struct tda18271_map tda18271_rf_cal_dc_over_dt[] = {
{ .rfmax = 47900, .val = 0x00 },
{ .rfmax = 55000, .val = 0x00 },
{ .rfmax = 61100, .val = 0x0a },
{ .rfmax = 64000, .val = 0x0a },
{ .rfmax = 82000, .val = 0x14 },
{ .rfmax = 84000, .val = 0x19 },
{ .rfmax = 119000, .val = 0x1c },
{ .rfmax = 124000, .val = 0x20 },
{ .rfmax = 129000, .val = 0x2a },
{ .rfmax = 134000, .val = 0x32 },
{ .rfmax = 139000, .val = 0x39 },
{ .rfmax = 144000, .val = 0x3e },
{ .rfmax = 149000, .val = 0x3f },
{ .rfmax = 152600, .val = 0x40 },
{ .rfmax = 154000, .val = 0x40 },
{ .rfmax = 164700, .val = 0x41 },
{ .rfmax = 203500, .val = 0x32 },
{ .rfmax = 353000, .val = 0x19 },
{ .rfmax = 356000, .val = 0x1a },
{ .rfmax = 359000, .val = 0x1b },
{ .rfmax = 363000, .val = 0x1c },
{ .rfmax = 366000, .val = 0x1d },
{ .rfmax = 369000, .val = 0x1e },
{ .rfmax = 373000, .val = 0x1f },
{ .rfmax = 376000, .val = 0x20 },
{ .rfmax = 379000, .val = 0x21 },
{ .rfmax = 383000, .val = 0x22 },
{ .rfmax = 386000, .val = 0x23 },
{ .rfmax = 389000, .val = 0x24 },
{ .rfmax = 393000, .val = 0x25 },
{ .rfmax = 396000, .val = 0x26 },
{ .rfmax = 399000, .val = 0x27 },
{ .rfmax = 402000, .val = 0x28 },
{ .rfmax = 404000, .val = 0x29 },
{ .rfmax = 407000, .val = 0x2a },
{ .rfmax = 409000, .val = 0x2b },
{ .rfmax = 412000, .val = 0x2c },
{ .rfmax = 414000, .val = 0x2d },
{ .rfmax = 417000, .val = 0x2e },
{ .rfmax = 419000, .val = 0x2f },
{ .rfmax = 422000, .val = 0x30 },
{ .rfmax = 424000, .val = 0x31 },
{ .rfmax = 427000, .val = 0x32 },
{ .rfmax = 429000, .val = 0x33 },
{ .rfmax = 432000, .val = 0x34 },
{ .rfmax = 434000, .val = 0x35 },
{ .rfmax = 437000, .val = 0x36 },
{ .rfmax = 439000, .val = 0x37 },
{ .rfmax = 442000, .val = 0x38 },
{ .rfmax = 444000, .val = 0x39 },
{ .rfmax = 447000, .val = 0x3a },
{ .rfmax = 449000, .val = 0x3b },
{ .rfmax = 457800, .val = 0x3c },
{ .rfmax = 465000, .val = 0x0f },
{ .rfmax = 477000, .val = 0x12 },
{ .rfmax = 483000, .val = 0x14 },
{ .rfmax = 502000, .val = 0x19 },
{ .rfmax = 508000, .val = 0x1b },
{ .rfmax = 519000, .val = 0x1c },
{ .rfmax = 522000, .val = 0x1d },
{ .rfmax = 524000, .val = 0x1e },
{ .rfmax = 534000, .val = 0x1f },
{ .rfmax = 549000, .val = 0x20 },
{ .rfmax = 554000, .val = 0x22 },
{ .rfmax = 584000, .val = 0x24 },
{ .rfmax = 589000, .val = 0x26 },
{ .rfmax = 658000, .val = 0x27 },
{ .rfmax = 664000, .val = 0x2c },
{ .rfmax = 669000, .val = 0x2d },
{ .rfmax = 699000, .val = 0x2e },
{ .rfmax = 704000, .val = 0x30 },
{ .rfmax = 709000, .val = 0x31 },
{ .rfmax = 714000, .val = 0x32 },
{ .rfmax = 724000, .val = 0x33 },
{ .rfmax = 729000, .val = 0x36 },
{ .rfmax = 739000, .val = 0x38 },
{ .rfmax = 744000, .val = 0x39 },
{ .rfmax = 749000, .val = 0x3b },
{ .rfmax = 754000, .val = 0x3c },
{ .rfmax = 759000, .val = 0x3d },
{ .rfmax = 764000, .val = 0x3e },
{ .rfmax = 769000, .val = 0x3f },
{ .rfmax = 774000, .val = 0x40 },
{ .rfmax = 779000, .val = 0x41 },
{ .rfmax = 784000, .val = 0x43 },
{ .rfmax = 789000, .val = 0x46 },
{ .rfmax = 794000, .val = 0x48 },
{ .rfmax = 799000, .val = 0x4b },
{ .rfmax = 804000, .val = 0x4f },
{ .rfmax = 809000, .val = 0x54 },
{ .rfmax = 814000, .val = 0x59 },
{ .rfmax = 819000, .val = 0x5d },
{ .rfmax = 824000, .val = 0x61 },
{ .rfmax = 829000, .val = 0x68 },
{ .rfmax = 834000, .val = 0x6e },
{ .rfmax = 839000, .val = 0x75 },
{ .rfmax = 844000, .val = 0x7e },
{ .rfmax = 849000, .val = 0x82 },
{ .rfmax = 854000, .val = 0x84 },
{ .rfmax = 859000, .val = 0x8f },
{ .rfmax = 865000, .val = 0x9a },
{ .rfmax = 0, .val = 0x00 }, /* end */
};
/*---------------------------------------------------------------------*/
struct tda18271_thermo_map {
u8 d;
u8 r0;
u8 r1;
};
static struct tda18271_thermo_map tda18271_thermometer[] = {
{ .d = 0x00, .r0 = 60, .r1 = 92 },
{ .d = 0x01, .r0 = 62, .r1 = 94 },
{ .d = 0x02, .r0 = 66, .r1 = 98 },
{ .d = 0x03, .r0 = 64, .r1 = 96 },
{ .d = 0x04, .r0 = 74, .r1 = 106 },
{ .d = 0x05, .r0 = 72, .r1 = 104 },
{ .d = 0x06, .r0 = 68, .r1 = 100 },
{ .d = 0x07, .r0 = 70, .r1 = 102 },
{ .d = 0x08, .r0 = 90, .r1 = 122 },
{ .d = 0x09, .r0 = 88, .r1 = 120 },
{ .d = 0x0a, .r0 = 84, .r1 = 116 },
{ .d = 0x0b, .r0 = 86, .r1 = 118 },
{ .d = 0x0c, .r0 = 76, .r1 = 108 },
{ .d = 0x0d, .r0 = 78, .r1 = 110 },
{ .d = 0x0e, .r0 = 82, .r1 = 114 },
{ .d = 0x0f, .r0 = 80, .r1 = 112 },
{ .d = 0x00, .r0 = 0, .r1 = 0 }, /* end */
};
int tda18271_lookup_thermometer(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int val, i = 0;
while (tda18271_thermometer[i].d < (regs[R_TM] & 0x0f)) {
if (tda18271_thermometer[i + 1].d == 0)
break;
i++;
}
if ((regs[R_TM] & 0x20) == 0x20)
val = tda18271_thermometer[i].r1;
else
val = tda18271_thermometer[i].r0;
tda_map("(%d) tm = %d\n", i, val);
return val;
}
/*---------------------------------------------------------------------*/
struct tda18271_cid_target_map {
u32 rfmax;
u8 target;
u16 limit;
};
static struct tda18271_cid_target_map tda18271_cid_target[] = {
{ .rfmax = 46000, .target = 0x04, .limit = 1800 },
{ .rfmax = 52200, .target = 0x0a, .limit = 1500 },
{ .rfmax = 70100, .target = 0x01, .limit = 4000 },
{ .rfmax = 136800, .target = 0x18, .limit = 4000 },
{ .rfmax = 156700, .target = 0x18, .limit = 4000 },
{ .rfmax = 186250, .target = 0x0a, .limit = 4000 },
{ .rfmax = 230000, .target = 0x0a, .limit = 4000 },
{ .rfmax = 345000, .target = 0x18, .limit = 4000 },
{ .rfmax = 426000, .target = 0x0e, .limit = 4000 },
{ .rfmax = 489500, .target = 0x1e, .limit = 4000 },
{ .rfmax = 697500, .target = 0x32, .limit = 4000 },
{ .rfmax = 842000, .target = 0x3a, .limit = 4000 },
{ .rfmax = 0, .target = 0x00, .limit = 0 }, /* end */
};
int tda18271_lookup_cid_target(struct dvb_frontend *fe,
u32 *freq, u8 *cid_target, u16 *count_limit)
{
struct tda18271_priv *priv = fe->tuner_priv;
int i = 0;
while ((tda18271_cid_target[i].rfmax * 1000) < *freq) {
if (tda18271_cid_target[i + 1].rfmax == 0)
break;
i++;
}
*cid_target = tda18271_cid_target[i].target;
*count_limit = tda18271_cid_target[i].limit;
tda_map("(%d) cid_target = %02x, count_limit = %d\n", i,
tda18271_cid_target[i].target, tda18271_cid_target[i].limit);
return 0;
}
/*---------------------------------------------------------------------*/
static struct tda18271_rf_tracking_filter_cal tda18271_rf_band_template[] = {
{ .rfmax = 47900, .rfband = 0x00,
.rf1_def = 46000, .rf2_def = 0, .rf3_def = 0 },
{ .rfmax = 61100, .rfband = 0x01,
.rf1_def = 52200, .rf2_def = 0, .rf3_def = 0 },
{ .rfmax = 152600, .rfband = 0x02,
.rf1_def = 70100, .rf2_def = 136800, .rf3_def = 0 },
{ .rfmax = 164700, .rfband = 0x03,
.rf1_def = 156700, .rf2_def = 0, .rf3_def = 0 },
{ .rfmax = 203500, .rfband = 0x04,
.rf1_def = 186250, .rf2_def = 0, .rf3_def = 0 },
{ .rfmax = 457800, .rfband = 0x05,
.rf1_def = 230000, .rf2_def = 345000, .rf3_def = 426000 },
{ .rfmax = 865000, .rfband = 0x06,
.rf1_def = 489500, .rf2_def = 697500, .rf3_def = 842000 },
{ .rfmax = 0, .rfband = 0x00,
.rf1_def = 0, .rf2_def = 0, .rf3_def = 0 }, /* end */
};
int tda18271_lookup_rf_band(struct dvb_frontend *fe, u32 *freq, u8 *rf_band)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
int i = 0;
while ((map[i].rfmax * 1000) < *freq) {
if (tda18271_debug & DBG_ADV)
tda_map("(%d) rfmax = %d < freq = %d, rf1_def = %d, rf2_def = %d, rf3_def = %d, rf1 = %d, rf2 = %d, rf3 = %d, rf_a1 = %d, rf_a2 = %d, rf_b1 = %d, rf_b2 = %d\n",
i, map[i].rfmax * 1000, *freq,
map[i].rf1_def, map[i].rf2_def, map[i].rf3_def,
map[i].rf1, map[i].rf2, map[i].rf3,
map[i].rf_a1, map[i].rf_a2,
map[i].rf_b1, map[i].rf_b2);
if (map[i].rfmax == 0)
return -EINVAL;
i++;
}
if (rf_band)
*rf_band = map[i].rfband;
tda_map("(%d) rf_band = %02x\n", i, map[i].rfband);
return i;
}
/*---------------------------------------------------------------------*/
struct tda18271_map_layout {
struct tda18271_pll_map *main_pll;
struct tda18271_pll_map *cal_pll;
struct tda18271_map *rf_cal;
struct tda18271_map *rf_cal_kmco;
struct tda18271_map *rf_cal_dc_over_dt;
struct tda18271_map *bp_filter;
struct tda18271_map *rf_band;
struct tda18271_map *gain_taper;
struct tda18271_map *ir_measure;
};
/*---------------------------------------------------------------------*/
int tda18271_lookup_pll_map(struct dvb_frontend *fe,
enum tda18271_map_type map_type,
u32 *freq, u8 *post_div, u8 *div)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_pll_map *map = NULL;
unsigned int i = 0;
char *map_name;
int ret = 0;
BUG_ON(!priv->maps);
switch (map_type) {
case MAIN_PLL:
map = priv->maps->main_pll;
map_name = "main_pll";
break;
case CAL_PLL:
map = priv->maps->cal_pll;
map_name = "cal_pll";
break;
default:
/* we should never get here */
map_name = "undefined";
break;
}
if (!map) {
tda_warn("%s map is not set!\n", map_name);
ret = -EINVAL;
goto fail;
}
while ((map[i].lomax * 1000) < *freq) {
if (map[i + 1].lomax == 0) {
tda_map("%s: frequency (%d) out of range\n",
map_name, *freq);
ret = -ERANGE;
break;
}
i++;
}
*post_div = map[i].pd;
*div = map[i].d;
tda_map("(%d) %s: post div = 0x%02x, div = 0x%02x\n",
i, map_name, *post_div, *div);
fail:
return ret;
}
int tda18271_lookup_map(struct dvb_frontend *fe,
enum tda18271_map_type map_type,
u32 *freq, u8 *val)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_map *map = NULL;
unsigned int i = 0;
char *map_name;
int ret = 0;
BUG_ON(!priv->maps);
switch (map_type) {
case BP_FILTER:
map = priv->maps->bp_filter;
map_name = "bp_filter";
break;
case RF_CAL_KMCO:
map = priv->maps->rf_cal_kmco;
map_name = "km";
break;
case RF_BAND:
map = priv->maps->rf_band;
map_name = "rf_band";
break;
case GAIN_TAPER:
map = priv->maps->gain_taper;
map_name = "gain_taper";
break;
case RF_CAL:
map = priv->maps->rf_cal;
map_name = "rf_cal";
break;
case IR_MEASURE:
map = priv->maps->ir_measure;
map_name = "ir_measure";
break;
case RF_CAL_DC_OVER_DT:
map = priv->maps->rf_cal_dc_over_dt;
map_name = "rf_cal_dc_over_dt";
break;
default:
/* we should never get here */
map_name = "undefined";
break;
}
if (!map) {
tda_warn("%s map is not set!\n", map_name);
ret = -EINVAL;
goto fail;
}
while ((map[i].rfmax * 1000) < *freq) {
if (map[i + 1].rfmax == 0) {
tda_map("%s: frequency (%d) out of range\n",
map_name, *freq);
ret = -ERANGE;
break;
}
i++;
}
*val = map[i].val;
tda_map("(%d) %s: 0x%02x\n", i, map_name, *val);
fail:
return ret;
}
/*---------------------------------------------------------------------*/
static const struct tda18271_std_map tda18271c1_std_map = {
.fm_radio = { .if_freq = 1250, .fm_rfn = 1, .agc_mode = 3, .std = 0,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x18 */
.atv_b = { .if_freq = 6750, .fm_rfn = 0, .agc_mode = 1, .std = 6,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
.atv_dk = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
.atv_gh = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
.atv_i = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
.atv_l = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
.atv_lc = { .if_freq = 1250, .fm_rfn = 0, .agc_mode = 1, .std = 7,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
.atv_mn = { .if_freq = 5750, .fm_rfn = 0, .agc_mode = 1, .std = 5,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0d */
.atsc_6 = { .if_freq = 3250, .fm_rfn = 0, .agc_mode = 3, .std = 4,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
.dvbt_6 = { .if_freq = 3300, .fm_rfn = 0, .agc_mode = 3, .std = 4,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
.dvbt_7 = { .if_freq = 3800, .fm_rfn = 0, .agc_mode = 3, .std = 5,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
.dvbt_8 = { .if_freq = 4300, .fm_rfn = 0, .agc_mode = 3, .std = 6,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */
.qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
.qam_7 = { .if_freq = 4500, .fm_rfn = 0, .agc_mode = 3, .std = 6,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */
.qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */
};
static const struct tda18271_std_map tda18271c2_std_map = {
.fm_radio = { .if_freq = 1250, .fm_rfn = 1, .agc_mode = 3, .std = 0,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x18 */
.atv_b = { .if_freq = 6000, .fm_rfn = 0, .agc_mode = 1, .std = 5,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0d */
.atv_dk = { .if_freq = 6900, .fm_rfn = 0, .agc_mode = 1, .std = 6,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
.atv_gh = { .if_freq = 7100, .fm_rfn = 0, .agc_mode = 1, .std = 6,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
.atv_i = { .if_freq = 7250, .fm_rfn = 0, .agc_mode = 1, .std = 6,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
.atv_l = { .if_freq = 6900, .fm_rfn = 0, .agc_mode = 1, .std = 6,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
.atv_lc = { .if_freq = 1250, .fm_rfn = 0, .agc_mode = 1, .std = 6,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
.atv_mn = { .if_freq = 5400, .fm_rfn = 0, .agc_mode = 1, .std = 4,
.if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0c */
.atsc_6 = { .if_freq = 3250, .fm_rfn = 0, .agc_mode = 3, .std = 4,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
.dvbt_6 = { .if_freq = 3300, .fm_rfn = 0, .agc_mode = 3, .std = 4,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
.dvbt_7 = { .if_freq = 3500, .fm_rfn = 0, .agc_mode = 3, .std = 4,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
.dvbt_8 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
.qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
.qam_7 = { .if_freq = 4500, .fm_rfn = 0, .agc_mode = 3, .std = 6,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */
.qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7,
.if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */
};
/*---------------------------------------------------------------------*/
static struct tda18271_map_layout tda18271c1_map_layout = {
.main_pll = tda18271c1_main_pll,
.cal_pll = tda18271c1_cal_pll,
.rf_cal = tda18271c1_rf_cal,
.rf_cal_kmco = tda18271c1_km,
.bp_filter = tda18271_bp_filter,
.rf_band = tda18271_rf_band,
.gain_taper = tda18271_gain_taper,
.ir_measure = tda18271_ir_measure,
};
static struct tda18271_map_layout tda18271c2_map_layout = {
.main_pll = tda18271c2_main_pll,
.cal_pll = tda18271c2_cal_pll,
.rf_cal = tda18271c2_rf_cal,
.rf_cal_kmco = tda18271c2_km,
.rf_cal_dc_over_dt = tda18271_rf_cal_dc_over_dt,
.bp_filter = tda18271_bp_filter,
.rf_band = tda18271_rf_band,
.gain_taper = tda18271_gain_taper,
.ir_measure = tda18271_ir_measure,
};
int tda18271_assign_map_layout(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
int ret = 0;
switch (priv->id) {
case TDA18271HDC1:
priv->maps = &tda18271c1_map_layout;
priv->std = tda18271c1_std_map;
break;
case TDA18271HDC2:
priv->maps = &tda18271c2_map_layout;
priv->std = tda18271c2_std_map;
break;
default:
ret = -EINVAL;
break;
}
memcpy(priv->rf_cal_state, &tda18271_rf_band_template,
sizeof(tda18271_rf_band_template));
return ret;
}
| linux-master | drivers/media/tuners/tda18271-maps.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
Copyright (C) 2007, 2008 Michael Krufky <[email protected]>
*/
#include "tda18271-priv.h"
#include "tda8290.h"
#include <linux/delay.h>
#include <linux/videodev2.h>
int tda18271_debug;
module_param_named(debug, tda18271_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debug level (info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
static int tda18271_cal_on_startup = -1;
module_param_named(cal, tda18271_cal_on_startup, int, 0644);
MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
static DEFINE_MUTEX(tda18271_list_mutex);
static LIST_HEAD(hybrid_tuner_instance_list);
/*---------------------------------------------------------------------*/
static int tda18271_toggle_output(struct dvb_frontend *fe, int standby)
{
struct tda18271_priv *priv = fe->tuner_priv;
int ret = tda18271_set_standby_mode(fe, standby ? 1 : 0,
priv->output_opt & TDA18271_OUTPUT_LT_OFF ? 1 : 0,
priv->output_opt & TDA18271_OUTPUT_XT_OFF ? 1 : 0);
if (tda_fail(ret))
goto fail;
tda_dbg("%s mode: xtal oscillator %s, slave tuner loop through %s\n",
standby ? "standby" : "active",
priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on",
priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on");
fail:
return ret;
}
/*---------------------------------------------------------------------*/
static inline int charge_pump_source(struct dvb_frontend *fe, int force)
{
struct tda18271_priv *priv = fe->tuner_priv;
return tda18271_charge_pump_source(fe,
(priv->role == TDA18271_SLAVE) ?
TDA18271_CAL_PLL :
TDA18271_MAIN_PLL, force);
}
static inline void tda18271_set_if_notch(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
switch (priv->mode) {
case TDA18271_ANALOG:
regs[R_MPD] &= ~0x80; /* IF notch = 0 */
break;
case TDA18271_DIGITAL:
regs[R_MPD] |= 0x80; /* IF notch = 1 */
break;
}
}
static int tda18271_channel_configuration(struct dvb_frontend *fe,
struct tda18271_std_map_item *map,
u32 freq, u32 bw)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int ret;
u32 N;
/* update TV broadcast parameters */
/* set standard */
regs[R_EP3] &= ~0x1f; /* clear std bits */
regs[R_EP3] |= (map->agc_mode << 3) | map->std;
if (priv->id == TDA18271HDC2) {
/* set rfagc to high speed mode */
regs[R_EP3] &= ~0x04;
}
/* set cal mode to normal */
regs[R_EP4] &= ~0x03;
/* update IF output level */
regs[R_EP4] &= ~0x1c; /* clear if level bits */
regs[R_EP4] |= (map->if_lvl << 2);
/* update FM_RFn */
regs[R_EP4] &= ~0x80;
regs[R_EP4] |= map->fm_rfn << 7;
/* update rf top / if top */
regs[R_EB22] = 0x00;
regs[R_EB22] |= map->rfagc_top;
ret = tda18271_write_regs(fe, R_EB22, 1);
if (tda_fail(ret))
goto fail;
/* --------------------------------------------------------------- */
/* disable Power Level Indicator */
regs[R_EP1] |= 0x40;
/* make sure thermometer is off */
regs[R_TM] &= ~0x10;
/* frequency dependent parameters */
tda18271_calc_ir_measure(fe, &freq);
tda18271_calc_bp_filter(fe, &freq);
tda18271_calc_rf_band(fe, &freq);
tda18271_calc_gain_taper(fe, &freq);
/* --------------------------------------------------------------- */
/* dual tuner and agc1 extra configuration */
switch (priv->role) {
case TDA18271_MASTER:
regs[R_EB1] |= 0x04; /* main vco */
break;
case TDA18271_SLAVE:
regs[R_EB1] &= ~0x04; /* cal vco */
break;
}
/* agc1 always active */
regs[R_EB1] &= ~0x02;
/* agc1 has priority on agc2 */
regs[R_EB1] &= ~0x01;
ret = tda18271_write_regs(fe, R_EB1, 1);
if (tda_fail(ret))
goto fail;
/* --------------------------------------------------------------- */
N = map->if_freq * 1000 + freq;
switch (priv->role) {
case TDA18271_MASTER:
tda18271_calc_main_pll(fe, N);
tda18271_set_if_notch(fe);
tda18271_write_regs(fe, R_MPD, 4);
break;
case TDA18271_SLAVE:
tda18271_calc_cal_pll(fe, N);
tda18271_write_regs(fe, R_CPD, 4);
regs[R_MPD] = regs[R_CPD] & 0x7f;
tda18271_set_if_notch(fe);
tda18271_write_regs(fe, R_MPD, 1);
break;
}
ret = tda18271_write_regs(fe, R_TM, 7);
if (tda_fail(ret))
goto fail;
/* force charge pump source */
charge_pump_source(fe, 1);
msleep(1);
/* return pll to normal operation */
charge_pump_source(fe, 0);
msleep(20);
if (priv->id == TDA18271HDC2) {
/* set rfagc to normal speed mode */
if (map->fm_rfn)
regs[R_EP3] &= ~0x04;
else
regs[R_EP3] |= 0x04;
ret = tda18271_write_regs(fe, R_EP3, 1);
}
fail:
return ret;
}
static int tda18271_read_thermometer(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int tm;
/* switch thermometer on */
regs[R_TM] |= 0x10;
tda18271_write_regs(fe, R_TM, 1);
/* read thermometer info */
tda18271_read_regs(fe);
if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
(((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
if ((regs[R_TM] & 0x20) == 0x20)
regs[R_TM] &= ~0x20;
else
regs[R_TM] |= 0x20;
tda18271_write_regs(fe, R_TM, 1);
msleep(10); /* temperature sensing */
/* read thermometer info */
tda18271_read_regs(fe);
}
tm = tda18271_lookup_thermometer(fe);
/* switch thermometer off */
regs[R_TM] &= ~0x10;
tda18271_write_regs(fe, R_TM, 1);
/* set CAL mode to normal */
regs[R_EP4] &= ~0x03;
tda18271_write_regs(fe, R_EP4, 1);
return tm;
}
/* ------------------------------------------------------------------ */
static int tda18271c2_rf_tracking_filters_correction(struct dvb_frontend *fe,
u32 freq)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
unsigned char *regs = priv->tda18271_regs;
int i, ret;
u8 tm_current, dc_over_dt, rf_tab;
s32 rfcal_comp, approx;
/* power up */
ret = tda18271_set_standby_mode(fe, 0, 0, 0);
if (tda_fail(ret))
goto fail;
/* read die current temperature */
tm_current = tda18271_read_thermometer(fe);
/* frequency dependent parameters */
tda18271_calc_rf_cal(fe, &freq);
rf_tab = regs[R_EB14];
i = tda18271_lookup_rf_band(fe, &freq, NULL);
if (tda_fail(i))
return i;
if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
approx = map[i].rf_a1 * (s32)(freq / 1000 - map[i].rf1) +
map[i].rf_b1 + rf_tab;
} else {
approx = map[i].rf_a2 * (s32)(freq / 1000 - map[i].rf2) +
map[i].rf_b2 + rf_tab;
}
if (approx < 0)
approx = 0;
if (approx > 255)
approx = 255;
tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
/* calculate temperature compensation */
rfcal_comp = dc_over_dt * (s32)(tm_current - priv->tm_rfcal) / 1000;
regs[R_EB14] = (unsigned char)(approx + rfcal_comp);
ret = tda18271_write_regs(fe, R_EB14, 1);
fail:
return ret;
}
static int tda18271_por(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int ret;
/* power up detector 1 */
regs[R_EB12] &= ~0x20;
ret = tda18271_write_regs(fe, R_EB12, 1);
if (tda_fail(ret))
goto fail;
regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
ret = tda18271_write_regs(fe, R_EB18, 1);
if (tda_fail(ret))
goto fail;
regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
/* POR mode */
ret = tda18271_set_standby_mode(fe, 1, 0, 0);
if (tda_fail(ret))
goto fail;
/* disable 1.5 MHz low pass filter */
regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
ret = tda18271_write_regs(fe, R_EB21, 3);
fail:
return ret;
}
static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
u32 N;
/* set CAL mode to normal */
regs[R_EP4] &= ~0x03;
tda18271_write_regs(fe, R_EP4, 1);
/* switch off agc1 */
regs[R_EP3] |= 0x40; /* sm_lt = 1 */
regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
tda18271_write_regs(fe, R_EB18, 1);
/* frequency dependent parameters */
tda18271_calc_bp_filter(fe, &freq);
tda18271_calc_gain_taper(fe, &freq);
tda18271_calc_rf_band(fe, &freq);
tda18271_calc_km(fe, &freq);
tda18271_write_regs(fe, R_EP1, 3);
tda18271_write_regs(fe, R_EB13, 1);
/* main pll charge pump source */
tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
/* cal pll charge pump source */
tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
/* force dcdc converter to 0 V */
regs[R_EB14] = 0x00;
tda18271_write_regs(fe, R_EB14, 1);
/* disable plls lock */
regs[R_EB20] &= ~0x20;
tda18271_write_regs(fe, R_EB20, 1);
/* set CAL mode to RF tracking filter calibration */
regs[R_EP4] |= 0x03;
tda18271_write_regs(fe, R_EP4, 2);
/* --------------------------------------------------------------- */
/* set the internal calibration signal */
N = freq;
tda18271_calc_cal_pll(fe, N);
tda18271_write_regs(fe, R_CPD, 4);
/* downconvert internal calibration */
N += 1000000;
tda18271_calc_main_pll(fe, N);
tda18271_write_regs(fe, R_MPD, 4);
msleep(5);
tda18271_write_regs(fe, R_EP2, 1);
tda18271_write_regs(fe, R_EP1, 1);
tda18271_write_regs(fe, R_EP2, 1);
tda18271_write_regs(fe, R_EP1, 1);
/* --------------------------------------------------------------- */
/* normal operation for the main pll */
tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
/* normal operation for the cal pll */
tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
msleep(10); /* plls locking */
/* launch the rf tracking filters calibration */
regs[R_EB20] |= 0x20;
tda18271_write_regs(fe, R_EB20, 1);
msleep(60); /* calibration */
/* --------------------------------------------------------------- */
/* set CAL mode to normal */
regs[R_EP4] &= ~0x03;
/* switch on agc1 */
regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
tda18271_write_regs(fe, R_EB18, 1);
tda18271_write_regs(fe, R_EP3, 2);
/* synchronization */
tda18271_write_regs(fe, R_EP1, 1);
/* get calibration result */
tda18271_read_extended(fe);
return regs[R_EB14];
}
static int tda18271_powerscan(struct dvb_frontend *fe,
u32 *freq_in, u32 *freq_out)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int sgn, bcal, count, wait, ret;
u8 cid_target;
u16 count_limit;
u32 freq;
freq = *freq_in;
tda18271_calc_rf_band(fe, &freq);
tda18271_calc_rf_cal(fe, &freq);
tda18271_calc_gain_taper(fe, &freq);
tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
tda18271_write_regs(fe, R_EP2, 1);
tda18271_write_regs(fe, R_EB14, 1);
/* downconvert frequency */
freq += 1000000;
tda18271_calc_main_pll(fe, freq);
tda18271_write_regs(fe, R_MPD, 4);
msleep(5); /* pll locking */
/* detection mode */
regs[R_EP4] &= ~0x03;
regs[R_EP4] |= 0x01;
tda18271_write_regs(fe, R_EP4, 1);
/* launch power detection measurement */
tda18271_write_regs(fe, R_EP2, 1);
/* read power detection info, stored in EB10 */
ret = tda18271_read_extended(fe);
if (tda_fail(ret))
return ret;
/* algorithm initialization */
sgn = 1;
*freq_out = *freq_in;
bcal = 0;
count = 0;
wait = false;
while ((regs[R_EB10] & 0x3f) < cid_target) {
/* downconvert updated freq to 1 MHz */
freq = *freq_in + (sgn * count) + 1000000;
tda18271_calc_main_pll(fe, freq);
tda18271_write_regs(fe, R_MPD, 4);
if (wait) {
msleep(5); /* pll locking */
wait = false;
} else
udelay(100); /* pll locking */
/* launch power detection measurement */
tda18271_write_regs(fe, R_EP2, 1);
/* read power detection info, stored in EB10 */
ret = tda18271_read_extended(fe);
if (tda_fail(ret))
return ret;
count += 200;
if (count <= count_limit)
continue;
if (sgn <= 0)
break;
sgn = -1 * sgn;
count = 200;
wait = true;
}
if ((regs[R_EB10] & 0x3f) >= cid_target) {
bcal = 1;
*freq_out = freq - 1000000;
} else
bcal = 0;
tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
bcal, *freq_in, *freq_out, freq);
return bcal;
}
static int tda18271_powerscan_init(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int ret;
/* set standard to digital */
regs[R_EP3] &= ~0x1f; /* clear std bits */
regs[R_EP3] |= 0x12;
/* set cal mode to normal */
regs[R_EP4] &= ~0x03;
/* update IF output level */
regs[R_EP4] &= ~0x1c; /* clear if level bits */
ret = tda18271_write_regs(fe, R_EP3, 2);
if (tda_fail(ret))
goto fail;
regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
ret = tda18271_write_regs(fe, R_EB18, 1);
if (tda_fail(ret))
goto fail;
regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
/* 1.5 MHz low pass filter */
regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
ret = tda18271_write_regs(fe, R_EB21, 3);
fail:
return ret;
}
static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
unsigned char *regs = priv->tda18271_regs;
int bcal, rf, i;
s32 divisor, dividend;
#define RF1 0
#define RF2 1
#define RF3 2
u32 rf_default[3];
u32 rf_freq[3];
s32 prog_cal[3];
s32 prog_tab[3];
i = tda18271_lookup_rf_band(fe, &freq, NULL);
if (tda_fail(i))
return i;
rf_default[RF1] = 1000 * map[i].rf1_def;
rf_default[RF2] = 1000 * map[i].rf2_def;
rf_default[RF3] = 1000 * map[i].rf3_def;
for (rf = RF1; rf <= RF3; rf++) {
if (0 == rf_default[rf])
return 0;
tda_cal("freq = %d, rf = %d\n", freq, rf);
/* look for optimized calibration frequency */
bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
if (tda_fail(bcal))
return bcal;
tda18271_calc_rf_cal(fe, &rf_freq[rf]);
prog_tab[rf] = (s32)regs[R_EB14];
if (1 == bcal)
prog_cal[rf] =
(s32)tda18271_calibrate_rf(fe, rf_freq[rf]);
else
prog_cal[rf] = prog_tab[rf];
switch (rf) {
case RF1:
map[i].rf_a1 = 0;
map[i].rf_b1 = (prog_cal[RF1] - prog_tab[RF1]);
map[i].rf1 = rf_freq[RF1] / 1000;
break;
case RF2:
dividend = (prog_cal[RF2] - prog_tab[RF2] -
prog_cal[RF1] + prog_tab[RF1]);
divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
map[i].rf_a1 = (dividend / divisor);
map[i].rf2 = rf_freq[RF2] / 1000;
break;
case RF3:
dividend = (prog_cal[RF3] - prog_tab[RF3] -
prog_cal[RF2] + prog_tab[RF2]);
divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
map[i].rf_a2 = (dividend / divisor);
map[i].rf_b2 = (prog_cal[RF2] - prog_tab[RF2]);
map[i].rf3 = rf_freq[RF3] / 1000;
break;
default:
BUG();
}
}
return 0;
}
static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned int i;
int ret;
tda_info("performing RF tracking filter calibration\n");
/* wait for die temperature stabilization */
msleep(200);
ret = tda18271_powerscan_init(fe);
if (tda_fail(ret))
goto fail;
/* rf band calibration */
for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++) {
ret =
tda18271_rf_tracking_filters_init(fe, 1000 *
priv->rf_cal_state[i].rfmax);
if (tda_fail(ret))
goto fail;
}
priv->tm_rfcal = tda18271_read_thermometer(fe);
fail:
return ret;
}
/* ------------------------------------------------------------------ */
static int tda18271c2_rf_cal_init(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int ret;
/* test RF_CAL_OK to see if we need init */
if ((regs[R_EP1] & 0x10) == 0)
priv->cal_initialized = false;
if (priv->cal_initialized)
return 0;
ret = tda18271_calc_rf_filter_curve(fe);
if (tda_fail(ret))
goto fail;
ret = tda18271_por(fe);
if (tda_fail(ret))
goto fail;
tda_info("RF tracking filter calibration complete\n");
priv->cal_initialized = true;
goto end;
fail:
tda_info("RF tracking filter calibration failed!\n");
end:
return ret;
}
static int tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe,
u32 freq, u32 bw)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int ret;
u32 N = 0;
/* calculate bp filter */
tda18271_calc_bp_filter(fe, &freq);
tda18271_write_regs(fe, R_EP1, 1);
regs[R_EB4] &= 0x07;
regs[R_EB4] |= 0x60;
tda18271_write_regs(fe, R_EB4, 1);
regs[R_EB7] = 0x60;
tda18271_write_regs(fe, R_EB7, 1);
regs[R_EB14] = 0x00;
tda18271_write_regs(fe, R_EB14, 1);
regs[R_EB20] = 0xcc;
tda18271_write_regs(fe, R_EB20, 1);
/* set cal mode to RF tracking filter calibration */
regs[R_EP4] |= 0x03;
/* calculate cal pll */
switch (priv->mode) {
case TDA18271_ANALOG:
N = freq - 1250000;
break;
case TDA18271_DIGITAL:
N = freq + bw / 2;
break;
}
tda18271_calc_cal_pll(fe, N);
/* calculate main pll */
switch (priv->mode) {
case TDA18271_ANALOG:
N = freq - 250000;
break;
case TDA18271_DIGITAL:
N = freq + bw / 2 + 1000000;
break;
}
tda18271_calc_main_pll(fe, N);
ret = tda18271_write_regs(fe, R_EP3, 11);
if (tda_fail(ret))
return ret;
msleep(5); /* RF tracking filter calibration initialization */
/* search for K,M,CO for RF calibration */
tda18271_calc_km(fe, &freq);
tda18271_write_regs(fe, R_EB13, 1);
/* search for rf band */
tda18271_calc_rf_band(fe, &freq);
/* search for gain taper */
tda18271_calc_gain_taper(fe, &freq);
tda18271_write_regs(fe, R_EP2, 1);
tda18271_write_regs(fe, R_EP1, 1);
tda18271_write_regs(fe, R_EP2, 1);
tda18271_write_regs(fe, R_EP1, 1);
regs[R_EB4] &= 0x07;
regs[R_EB4] |= 0x40;
tda18271_write_regs(fe, R_EB4, 1);
regs[R_EB7] = 0x40;
tda18271_write_regs(fe, R_EB7, 1);
msleep(10); /* pll locking */
regs[R_EB20] = 0xec;
tda18271_write_regs(fe, R_EB20, 1);
msleep(60); /* RF tracking filter calibration completion */
regs[R_EP4] &= ~0x03; /* set cal mode to normal */
tda18271_write_regs(fe, R_EP4, 1);
tda18271_write_regs(fe, R_EP1, 1);
/* RF tracking filter correction for VHF_Low band */
if (0 == tda18271_calc_rf_cal(fe, &freq))
tda18271_write_regs(fe, R_EB14, 1);
return 0;
}
/* ------------------------------------------------------------------ */
static int tda18271_ir_cal_init(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
int ret;
ret = tda18271_read_regs(fe);
if (tda_fail(ret))
goto fail;
/* test IR_CAL_OK to see if we need init */
if ((regs[R_EP1] & 0x08) == 0)
ret = tda18271_init_regs(fe);
fail:
return ret;
}
static int tda18271_init(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
int ret;
mutex_lock(&priv->lock);
/* full power up */
ret = tda18271_set_standby_mode(fe, 0, 0, 0);
if (tda_fail(ret))
goto fail;
/* initialization */
ret = tda18271_ir_cal_init(fe);
if (tda_fail(ret))
goto fail;
if (priv->id == TDA18271HDC2)
tda18271c2_rf_cal_init(fe);
fail:
mutex_unlock(&priv->lock);
return ret;
}
static int tda18271_sleep(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
int ret;
mutex_lock(&priv->lock);
/* enter standby mode, with required output features enabled */
ret = tda18271_toggle_output(fe, 1);
mutex_unlock(&priv->lock);
return ret;
}
/* ------------------------------------------------------------------ */
static int tda18271_agc(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
int ret = 0;
switch (priv->config) {
case TDA8290_LNA_OFF:
/* no external agc configuration required */
if (tda18271_debug & DBG_ADV)
tda_dbg("no agc configuration provided\n");
break;
case TDA8290_LNA_ON_BRIDGE:
/* switch with GPIO of saa713x */
tda_dbg("invoking callback\n");
if (fe->callback)
ret = fe->callback(priv->i2c_props.adap->algo_data,
DVB_FRONTEND_COMPONENT_TUNER,
TDA18271_CALLBACK_CMD_AGC_ENABLE,
priv->mode);
break;
case TDA8290_LNA_GP0_HIGH_ON:
case TDA8290_LNA_GP0_HIGH_OFF:
default:
/* n/a - currently not supported */
tda_err("unsupported configuration: %d\n", priv->config);
ret = -EINVAL;
break;
}
return ret;
}
static int tda18271_tune(struct dvb_frontend *fe,
struct tda18271_std_map_item *map, u32 freq, u32 bw)
{
struct tda18271_priv *priv = fe->tuner_priv;
int ret;
tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
freq, map->if_freq, bw, map->agc_mode, map->std);
ret = tda18271_agc(fe);
if (tda_fail(ret))
tda_warn("failed to configure agc\n");
ret = tda18271_init(fe);
if (tda_fail(ret))
goto fail;
mutex_lock(&priv->lock);
switch (priv->id) {
case TDA18271HDC1:
tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
break;
case TDA18271HDC2:
tda18271c2_rf_tracking_filters_correction(fe, freq);
break;
}
ret = tda18271_channel_configuration(fe, map, freq, bw);
mutex_unlock(&priv->lock);
fail:
return ret;
}
/* ------------------------------------------------------------------ */
static int tda18271_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 delsys = c->delivery_system;
u32 bw = c->bandwidth_hz;
u32 freq = c->frequency;
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_std_map *std_map = &priv->std;
struct tda18271_std_map_item *map;
int ret;
priv->mode = TDA18271_DIGITAL;
switch (delsys) {
case SYS_ATSC:
map = &std_map->atsc_6;
bw = 6000000;
break;
case SYS_ISDBT:
case SYS_DVBT:
case SYS_DVBT2:
if (bw <= 6000000) {
map = &std_map->dvbt_6;
} else if (bw <= 7000000) {
map = &std_map->dvbt_7;
} else {
map = &std_map->dvbt_8;
}
break;
case SYS_DVBC_ANNEX_B:
bw = 6000000;
fallthrough;
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
if (bw <= 6000000) {
map = &std_map->qam_6;
} else if (bw <= 7000000) {
map = &std_map->qam_7;
} else {
map = &std_map->qam_8;
}
break;
default:
tda_warn("modulation type not supported!\n");
return -EINVAL;
}
/* When tuning digital, the analog demod must be tri-stated */
if (fe->ops.analog_ops.standby)
fe->ops.analog_ops.standby(fe);
ret = tda18271_tune(fe, map, freq, bw);
if (tda_fail(ret))
goto fail;
priv->if_freq = map->if_freq;
priv->frequency = freq;
priv->bandwidth = bw;
fail:
return ret;
}
static int tda18271_set_analog_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_std_map *std_map = &priv->std;
struct tda18271_std_map_item *map;
char *mode;
int ret;
u32 freq = params->frequency * 125 *
((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
priv->mode = TDA18271_ANALOG;
if (params->mode == V4L2_TUNER_RADIO) {
map = &std_map->fm_radio;
mode = "fm";
} else if (params->std & V4L2_STD_MN) {
map = &std_map->atv_mn;
mode = "MN";
} else if (params->std & V4L2_STD_B) {
map = &std_map->atv_b;
mode = "B";
} else if (params->std & V4L2_STD_GH) {
map = &std_map->atv_gh;
mode = "GH";
} else if (params->std & V4L2_STD_PAL_I) {
map = &std_map->atv_i;
mode = "I";
} else if (params->std & V4L2_STD_DK) {
map = &std_map->atv_dk;
mode = "DK";
} else if (params->std & V4L2_STD_SECAM_L) {
map = &std_map->atv_l;
mode = "L";
} else if (params->std & V4L2_STD_SECAM_LC) {
map = &std_map->atv_lc;
mode = "L'";
} else {
map = &std_map->atv_i;
mode = "xx";
}
tda_dbg("setting tda18271 to system %s\n", mode);
ret = tda18271_tune(fe, map, freq, 0);
if (tda_fail(ret))
goto fail;
priv->if_freq = map->if_freq;
priv->frequency = freq;
priv->bandwidth = 0;
fail:
return ret;
}
static void tda18271_release(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
mutex_lock(&tda18271_list_mutex);
if (priv)
hybrid_tuner_release_state(priv);
mutex_unlock(&tda18271_list_mutex);
fe->tuner_priv = NULL;
}
static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tda18271_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct tda18271_priv *priv = fe->tuner_priv;
*bandwidth = priv->bandwidth;
return 0;
}
static int tda18271_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tda18271_priv *priv = fe->tuner_priv;
*frequency = (u32)priv->if_freq * 1000;
return 0;
}
/* ------------------------------------------------------------------ */
#define tda18271_update_std(std_cfg, name) do { \
if (map->std_cfg.if_freq + \
map->std_cfg.agc_mode + map->std_cfg.std + \
map->std_cfg.if_lvl + map->std_cfg.rfagc_top > 0) { \
tda_dbg("Using custom std config for %s\n", name); \
memcpy(&std->std_cfg, &map->std_cfg, \
sizeof(struct tda18271_std_map_item)); \
} } while (0)
#define tda18271_dump_std_item(std_cfg, name) do { \
tda_dbg("(%s) if_freq = %d, agc_mode = %d, std = %d, " \
"if_lvl = %d, rfagc_top = 0x%02x\n", \
name, std->std_cfg.if_freq, \
std->std_cfg.agc_mode, std->std_cfg.std, \
std->std_cfg.if_lvl, std->std_cfg.rfagc_top); \
} while (0)
static int tda18271_dump_std_map(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_std_map *std = &priv->std;
tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
tda18271_dump_std_item(fm_radio, " fm ");
tda18271_dump_std_item(atv_b, "atv b ");
tda18271_dump_std_item(atv_dk, "atv dk");
tda18271_dump_std_item(atv_gh, "atv gh");
tda18271_dump_std_item(atv_i, "atv i ");
tda18271_dump_std_item(atv_l, "atv l ");
tda18271_dump_std_item(atv_lc, "atv l'");
tda18271_dump_std_item(atv_mn, "atv mn");
tda18271_dump_std_item(atsc_6, "atsc 6");
tda18271_dump_std_item(dvbt_6, "dvbt 6");
tda18271_dump_std_item(dvbt_7, "dvbt 7");
tda18271_dump_std_item(dvbt_8, "dvbt 8");
tda18271_dump_std_item(qam_6, "qam 6 ");
tda18271_dump_std_item(qam_7, "qam 7 ");
tda18271_dump_std_item(qam_8, "qam 8 ");
return 0;
}
static int tda18271_update_std_map(struct dvb_frontend *fe,
struct tda18271_std_map *map)
{
struct tda18271_priv *priv = fe->tuner_priv;
struct tda18271_std_map *std = &priv->std;
if (!map)
return -EINVAL;
tda18271_update_std(fm_radio, "fm");
tda18271_update_std(atv_b, "atv b");
tda18271_update_std(atv_dk, "atv dk");
tda18271_update_std(atv_gh, "atv gh");
tda18271_update_std(atv_i, "atv i");
tda18271_update_std(atv_l, "atv l");
tda18271_update_std(atv_lc, "atv l'");
tda18271_update_std(atv_mn, "atv mn");
tda18271_update_std(atsc_6, "atsc 6");
tda18271_update_std(dvbt_6, "dvbt 6");
tda18271_update_std(dvbt_7, "dvbt 7");
tda18271_update_std(dvbt_8, "dvbt 8");
tda18271_update_std(qam_6, "qam 6");
tda18271_update_std(qam_7, "qam 7");
tda18271_update_std(qam_8, "qam 8");
return 0;
}
static int tda18271_get_id(struct dvb_frontend *fe)
{
struct tda18271_priv *priv = fe->tuner_priv;
unsigned char *regs = priv->tda18271_regs;
char *name;
int ret;
mutex_lock(&priv->lock);
ret = tda18271_read_regs(fe);
mutex_unlock(&priv->lock);
if (ret) {
tda_info("Error reading device ID @ %d-%04x, bailing out.\n",
i2c_adapter_id(priv->i2c_props.adap),
priv->i2c_props.addr);
return -EIO;
}
switch (regs[R_ID] & 0x7f) {
case 3:
name = "TDA18271HD/C1";
priv->id = TDA18271HDC1;
break;
case 4:
name = "TDA18271HD/C2";
priv->id = TDA18271HDC2;
break;
default:
tda_info("Unknown device (%i) detected @ %d-%04x, device not supported.\n",
regs[R_ID], i2c_adapter_id(priv->i2c_props.adap),
priv->i2c_props.addr);
return -EINVAL;
}
tda_info("%s detected @ %d-%04x\n", name,
i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr);
return 0;
}
static int tda18271_setup_configuration(struct dvb_frontend *fe,
struct tda18271_config *cfg)
{
struct tda18271_priv *priv = fe->tuner_priv;
priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
priv->role = (cfg) ? cfg->role : TDA18271_MASTER;
priv->config = (cfg) ? cfg->config : 0;
priv->small_i2c = (cfg) ?
cfg->small_i2c : TDA18271_39_BYTE_CHUNK_INIT;
priv->output_opt = (cfg) ?
cfg->output_opt : TDA18271_OUTPUT_LT_XT_ON;
return 0;
}
static inline int tda18271_need_cal_on_startup(struct tda18271_config *cfg)
{
/* tda18271_cal_on_startup == -1 when cal module option is unset */
return ((tda18271_cal_on_startup == -1) ?
/* honor configuration setting */
((cfg) && (cfg->rf_cal_on_startup)) :
/* module option overrides configuration setting */
(tda18271_cal_on_startup)) ? 1 : 0;
}
static int tda18271_set_config(struct dvb_frontend *fe, void *priv_cfg)
{
struct tda18271_config *cfg = (struct tda18271_config *) priv_cfg;
tda18271_setup_configuration(fe, cfg);
if (tda18271_need_cal_on_startup(cfg))
tda18271_init(fe);
/* override default std map with values in config struct */
if ((cfg) && (cfg->std_map))
tda18271_update_std_map(fe, cfg->std_map);
return 0;
}
static const struct dvb_tuner_ops tda18271_tuner_ops = {
.info = {
.name = "NXP TDA18271HD",
.frequency_min_hz = 45 * MHz,
.frequency_max_hz = 864 * MHz,
.frequency_step_hz = 62500
},
.init = tda18271_init,
.sleep = tda18271_sleep,
.set_params = tda18271_set_params,
.set_analog_params = tda18271_set_analog_params,
.release = tda18271_release,
.set_config = tda18271_set_config,
.get_frequency = tda18271_get_frequency,
.get_bandwidth = tda18271_get_bandwidth,
.get_if_frequency = tda18271_get_if_frequency,
};
struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
struct i2c_adapter *i2c,
struct tda18271_config *cfg)
{
struct tda18271_priv *priv = NULL;
int instance, ret;
mutex_lock(&tda18271_list_mutex);
instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
hybrid_tuner_instance_list,
i2c, addr, "tda18271");
switch (instance) {
case 0:
goto fail;
case 1:
/* new tuner instance */
fe->tuner_priv = priv;
tda18271_setup_configuration(fe, cfg);
priv->cal_initialized = false;
mutex_init(&priv->lock);
ret = tda18271_get_id(fe);
if (tda_fail(ret))
goto fail;
ret = tda18271_assign_map_layout(fe);
if (tda_fail(ret))
goto fail;
/* if delay_cal is set, delay IR & RF calibration until init()
* module option 'cal' overrides this delay */
if ((cfg->delay_cal) && (!tda18271_need_cal_on_startup(cfg)))
break;
mutex_lock(&priv->lock);
tda18271_init_regs(fe);
if ((tda18271_need_cal_on_startup(cfg)) &&
(priv->id == TDA18271HDC2))
tda18271c2_rf_cal_init(fe);
/* enter standby mode, with required output features enabled */
ret = tda18271_toggle_output(fe, 1);
tda_fail(ret);
mutex_unlock(&priv->lock);
break;
default:
/* existing tuner instance */
fe->tuner_priv = priv;
/* allow dvb driver to override configuration settings */
if (cfg) {
if (cfg->gate != TDA18271_GATE_ANALOG)
priv->gate = cfg->gate;
if (cfg->role)
priv->role = cfg->role;
if (cfg->config)
priv->config = cfg->config;
if (cfg->small_i2c)
priv->small_i2c = cfg->small_i2c;
if (cfg->output_opt)
priv->output_opt = cfg->output_opt;
if (cfg->std_map)
tda18271_update_std_map(fe, cfg->std_map);
}
if (tda18271_need_cal_on_startup(cfg))
tda18271_init(fe);
break;
}
/* override default std map with values in config struct */
if ((cfg) && (cfg->std_map))
tda18271_update_std_map(fe, cfg->std_map);
mutex_unlock(&tda18271_list_mutex);
memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
sizeof(struct dvb_tuner_ops));
if (tda18271_debug & (DBG_MAP | DBG_ADV))
tda18271_dump_std_map(fe);
return fe;
fail:
mutex_unlock(&tda18271_list_mutex);
tda18271_release(fe);
return NULL;
}
EXPORT_SYMBOL_GPL(tda18271_attach);
MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
MODULE_AUTHOR("Michael Krufky <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_VERSION("0.4");
| linux-master | drivers/media/tuners/tda18271-fe.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* i2c tv tuner chip device driver
* controls all those simple 4-control-bytes style tuners.
*
* This "tuner-simple" module was split apart from the original "tuner" module.
*/
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/videodev2.h>
#include <media/tuner.h>
#include <media/v4l2-common.h>
#include <media/tuner-types.h>
#include "tuner-i2c.h"
#include "tuner-simple.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable verbose debug messages");
#define TUNER_SIMPLE_MAX 64
static unsigned int simple_devcount;
static int offset;
module_param(offset, int, 0664);
MODULE_PARM_DESC(offset, "Allows to specify an offset for tuner");
static unsigned int atv_input[TUNER_SIMPLE_MAX] = \
{ [0 ... (TUNER_SIMPLE_MAX-1)] = 0 };
static unsigned int dtv_input[TUNER_SIMPLE_MAX] = \
{ [0 ... (TUNER_SIMPLE_MAX-1)] = 0 };
module_param_array(atv_input, int, NULL, 0644);
module_param_array(dtv_input, int, NULL, 0644);
MODULE_PARM_DESC(atv_input, "specify atv rf input, 0 for autoselect");
MODULE_PARM_DESC(dtv_input, "specify dtv rf input, 0 for autoselect");
/* ---------------------------------------------------------------------- */
/* tv standard selection for Temic 4046 FM5
this value takes the low bits of control byte 2
from datasheet Rev.01, Feb.00
standard BG I L L2 D
picture IF 38.9 38.9 38.9 33.95 38.9
sound 1 33.4 32.9 32.4 40.45 32.4
sound 2 33.16
NICAM 33.05 32.348 33.05 33.05
*/
#define TEMIC_SET_PAL_I 0x05
#define TEMIC_SET_PAL_DK 0x09
#define TEMIC_SET_PAL_L 0x0a /* SECAM ? */
#define TEMIC_SET_PAL_L2 0x0b /* change IF ! */
#define TEMIC_SET_PAL_BG 0x0c
/* tv tuner system standard selection for Philips FQ1216ME
this value takes the low bits of control byte 2
from datasheet "1999 Nov 16" (supersedes "1999 Mar 23")
standard BG DK I L L`
picture carrier 38.90 38.90 38.90 38.90 33.95
colour 34.47 34.47 34.47 34.47 38.38
sound 1 33.40 32.40 32.90 32.40 40.45
sound 2 33.16 - - - -
NICAM 33.05 33.05 32.35 33.05 39.80
*/
#define PHILIPS_SET_PAL_I 0x01 /* Bit 2 always zero !*/
#define PHILIPS_SET_PAL_BGDK 0x09
#define PHILIPS_SET_PAL_L2 0x0a
#define PHILIPS_SET_PAL_L 0x0b
/* system switching for Philips FI1216MF MK2
from datasheet "1996 Jul 09",
standard BG L L'
picture carrier 38.90 38.90 33.95
colour 34.47 34.37 38.38
sound 1 33.40 32.40 40.45
sound 2 33.16 - -
NICAM 33.05 33.05 39.80
*/
#define PHILIPS_MF_SET_STD_BG 0x01 /* Bit 2 must be zero, Bit 3 is system output */
#define PHILIPS_MF_SET_STD_L 0x03 /* Used on Secam France */
#define PHILIPS_MF_SET_STD_LC 0x02 /* Used on SECAM L' */
/* Control byte */
#define TUNER_RATIO_MASK 0x06 /* Bit cb1:cb2 */
#define TUNER_RATIO_SELECT_50 0x00
#define TUNER_RATIO_SELECT_32 0x02
#define TUNER_RATIO_SELECT_166 0x04
#define TUNER_RATIO_SELECT_62 0x06
#define TUNER_CHARGE_PUMP 0x40 /* Bit cb6 */
/* Status byte */
#define TUNER_POR 0x80
#define TUNER_FL 0x40
#define TUNER_MODE 0x38
#define TUNER_AFC 0x07
#define TUNER_SIGNAL 0x07
#define TUNER_STEREO 0x10
#define TUNER_PLL_LOCKED 0x40
#define TUNER_STEREO_MK3 0x04
static DEFINE_MUTEX(tuner_simple_list_mutex);
static LIST_HEAD(hybrid_tuner_instance_list);
struct tuner_simple_priv {
unsigned int nr;
u16 last_div;
struct tuner_i2c_props i2c_props;
struct list_head hybrid_tuner_instance_list;
unsigned int type;
struct tunertype *tun;
u32 frequency;
u32 bandwidth;
bool radio_mode;
};
/* ---------------------------------------------------------------------- */
static int tuner_read_status(struct dvb_frontend *fe)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
unsigned char byte;
if (1 != tuner_i2c_xfer_recv(&priv->i2c_props, &byte, 1))
return 0;
return byte;
}
static inline int tuner_signal(const int status)
{
return (status & TUNER_SIGNAL) << 13;
}
static inline int tuner_stereo(const int type, const int status)
{
switch (type) {
case TUNER_PHILIPS_FM1216ME_MK3:
case TUNER_PHILIPS_FM1236_MK3:
case TUNER_PHILIPS_FM1256_IH3:
case TUNER_LG_NTSC_TAPE:
case TUNER_TCL_MF02GIP_5N:
return ((status & TUNER_SIGNAL) == TUNER_STEREO_MK3);
case TUNER_PHILIPS_FM1216MK5:
return status | TUNER_STEREO;
default:
return status & TUNER_STEREO;
}
}
static inline int tuner_islocked(const int status)
{
return (status & TUNER_FL);
}
static inline int tuner_afcstatus(const int status)
{
return (status & TUNER_AFC) - 2;
}
static int simple_get_status(struct dvb_frontend *fe, u32 *status)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
int tuner_status;
if (priv->i2c_props.adap == NULL)
return -EINVAL;
tuner_status = tuner_read_status(fe);
*status = 0;
if (tuner_islocked(tuner_status))
*status = TUNER_STATUS_LOCKED;
if (tuner_stereo(priv->type, tuner_status))
*status |= TUNER_STATUS_STEREO;
tuner_dbg("AFC Status: %d\n", tuner_afcstatus(tuner_status));
return 0;
}
static int simple_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
int signal;
if (priv->i2c_props.adap == NULL || !priv->radio_mode)
return -EINVAL;
signal = tuner_signal(tuner_read_status(fe));
*strength = signal;
tuner_dbg("Signal strength: %d\n", signal);
return 0;
}
/* ---------------------------------------------------------------------- */
static inline char *tuner_param_name(enum param_type type)
{
char *name;
switch (type) {
case TUNER_PARAM_TYPE_RADIO:
name = "radio";
break;
case TUNER_PARAM_TYPE_PAL:
name = "pal";
break;
case TUNER_PARAM_TYPE_SECAM:
name = "secam";
break;
case TUNER_PARAM_TYPE_NTSC:
name = "ntsc";
break;
case TUNER_PARAM_TYPE_DIGITAL:
name = "digital";
break;
default:
name = "unknown";
break;
}
return name;
}
static struct tuner_params *simple_tuner_params(struct dvb_frontend *fe,
enum param_type desired_type)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
struct tunertype *tun = priv->tun;
int i;
for (i = 0; i < tun->count; i++)
if (desired_type == tun->params[i].type)
break;
/* use default tuner params if desired_type not available */
if (i == tun->count) {
tuner_dbg("desired params (%s) undefined for tuner %d\n",
tuner_param_name(desired_type), priv->type);
i = 0;
}
tuner_dbg("using tuner params #%d (%s)\n", i,
tuner_param_name(tun->params[i].type));
return &tun->params[i];
}
static int simple_config_lookup(struct dvb_frontend *fe,
struct tuner_params *t_params,
unsigned *frequency, u8 *config, u8 *cb)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
int i;
for (i = 0; i < t_params->count; i++) {
if (*frequency > t_params->ranges[i].limit)
continue;
break;
}
if (i == t_params->count) {
tuner_dbg("frequency out of range (%d > %d)\n",
*frequency, t_params->ranges[i - 1].limit);
*frequency = t_params->ranges[--i].limit;
}
*config = t_params->ranges[i].config;
*cb = t_params->ranges[i].cb;
tuner_dbg("freq = %d.%02d (%d), range = %d, config = 0x%02x, cb = 0x%02x\n",
*frequency / 16, *frequency % 16 * 100 / 16, *frequency,
i, *config, *cb);
return i;
}
/* ---------------------------------------------------------------------- */
static void simple_set_rf_input(struct dvb_frontend *fe,
u8 *config, u8 *cb, unsigned int rf)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
switch (priv->type) {
case TUNER_PHILIPS_TUV1236D:
switch (rf) {
case 1:
*cb |= 0x08;
break;
default:
*cb &= ~0x08;
break;
}
break;
case TUNER_PHILIPS_FCV1236D:
switch (rf) {
case 1:
*cb |= 0x01;
break;
default:
*cb &= ~0x01;
break;
}
break;
default:
break;
}
}
static int simple_std_setup(struct dvb_frontend *fe,
struct analog_parameters *params,
u8 *config, u8 *cb)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
int rc;
/* tv norm specific stuff for multi-norm tuners */
switch (priv->type) {
case TUNER_PHILIPS_SECAM: /* FI1216MF */
/* 0x01 -> ??? no change ??? */
/* 0x02 -> PAL BDGHI / SECAM L */
/* 0x04 -> ??? PAL others / SECAM others ??? */
*cb &= ~0x03;
if (params->std & V4L2_STD_SECAM_L)
/* also valid for V4L2_STD_SECAM */
*cb |= PHILIPS_MF_SET_STD_L;
else if (params->std & V4L2_STD_SECAM_LC)
*cb |= PHILIPS_MF_SET_STD_LC;
else /* V4L2_STD_B|V4L2_STD_GH */
*cb |= PHILIPS_MF_SET_STD_BG;
break;
case TUNER_TEMIC_4046FM5:
*cb &= ~0x0f;
if (params->std & V4L2_STD_PAL_BG) {
*cb |= TEMIC_SET_PAL_BG;
} else if (params->std & V4L2_STD_PAL_I) {
*cb |= TEMIC_SET_PAL_I;
} else if (params->std & V4L2_STD_PAL_DK) {
*cb |= TEMIC_SET_PAL_DK;
} else if (params->std & V4L2_STD_SECAM_L) {
*cb |= TEMIC_SET_PAL_L;
}
break;
case TUNER_PHILIPS_FQ1216ME:
*cb &= ~0x0f;
if (params->std & (V4L2_STD_PAL_BG|V4L2_STD_PAL_DK)) {
*cb |= PHILIPS_SET_PAL_BGDK;
} else if (params->std & V4L2_STD_PAL_I) {
*cb |= PHILIPS_SET_PAL_I;
} else if (params->std & V4L2_STD_SECAM_L) {
*cb |= PHILIPS_SET_PAL_L;
}
break;
case TUNER_PHILIPS_FCV1236D:
/* 0x00 -> ATSC antenna input 1 */
/* 0x01 -> ATSC antenna input 2 */
/* 0x02 -> NTSC antenna input 1 */
/* 0x03 -> NTSC antenna input 2 */
*cb &= ~0x03;
if (!(params->std & V4L2_STD_ATSC))
*cb |= 2;
break;
case TUNER_MICROTUNE_4042FI5:
/* Set the charge pump for fast tuning */
*config |= TUNER_CHARGE_PUMP;
break;
case TUNER_PHILIPS_TUV1236D:
{
struct tuner_i2c_props i2c = priv->i2c_props;
/* 0x40 -> ATSC antenna input 1 */
/* 0x48 -> ATSC antenna input 2 */
/* 0x00 -> NTSC antenna input 1 */
/* 0x08 -> NTSC antenna input 2 */
u8 buffer[4] = { 0x14, 0x00, 0x17, 0x00};
*cb &= ~0x40;
if (params->std & V4L2_STD_ATSC) {
*cb |= 0x40;
buffer[1] = 0x04;
}
/* set to the correct mode (analog or digital) */
i2c.addr = 0x0a;
rc = tuner_i2c_xfer_send(&i2c, &buffer[0], 2);
if (2 != rc)
tuner_warn("i2c i/o error: rc == %d (should be 2)\n",
rc);
rc = tuner_i2c_xfer_send(&i2c, &buffer[2], 2);
if (2 != rc)
tuner_warn("i2c i/o error: rc == %d (should be 2)\n",
rc);
break;
}
}
if (atv_input[priv->nr])
simple_set_rf_input(fe, config, cb, atv_input[priv->nr]);
return 0;
}
static int simple_set_aux_byte(struct dvb_frontend *fe, u8 config, u8 aux)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
int rc;
u8 buffer[2];
buffer[0] = (config & ~0x38) | 0x18;
buffer[1] = aux;
tuner_dbg("setting aux byte: 0x%02x 0x%02x\n", buffer[0], buffer[1]);
rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 2);
if (2 != rc)
tuner_warn("i2c i/o error: rc == %d (should be 2)\n", rc);
return rc == 2 ? 0 : rc;
}
static int simple_post_tune(struct dvb_frontend *fe, u8 *buffer,
u16 div, u8 config, u8 cb)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
int rc;
switch (priv->type) {
case TUNER_LG_TDVS_H06XF:
simple_set_aux_byte(fe, config, 0x20);
break;
case TUNER_PHILIPS_FQ1216LME_MK3:
simple_set_aux_byte(fe, config, 0x60); /* External AGC */
break;
case TUNER_MICROTUNE_4042FI5:
{
/* FIXME - this may also work for other tuners */
unsigned long timeout = jiffies + msecs_to_jiffies(1);
u8 status_byte = 0;
/* Wait until the PLL locks */
for (;;) {
if (time_after(jiffies, timeout))
return 0;
rc = tuner_i2c_xfer_recv(&priv->i2c_props,
&status_byte, 1);
if (1 != rc) {
tuner_warn("i2c i/o read error: rc == %d (should be 1)\n",
rc);
break;
}
if (status_byte & TUNER_PLL_LOCKED)
break;
udelay(10);
}
/* Set the charge pump for optimized phase noise figure */
config &= ~TUNER_CHARGE_PUMP;
buffer[0] = (div>>8) & 0x7f;
buffer[1] = div & 0xff;
buffer[2] = config;
buffer[3] = cb;
tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
buffer[0], buffer[1], buffer[2], buffer[3]);
rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
if (4 != rc)
tuner_warn("i2c i/o error: rc == %d (should be 4)\n",
rc);
break;
}
}
return 0;
}
static int simple_radio_bandswitch(struct dvb_frontend *fe, u8 *buffer)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
switch (priv->type) {
case TUNER_TENA_9533_DI:
case TUNER_YMEC_TVF_5533MF:
tuner_dbg("This tuner doesn't have FM. Most cards have a TEA5767 for FM\n");
return -EINVAL;
case TUNER_PHILIPS_FM1216ME_MK3:
case TUNER_PHILIPS_FM1236_MK3:
case TUNER_PHILIPS_FMD1216ME_MK3:
case TUNER_PHILIPS_FMD1216MEX_MK3:
case TUNER_LG_NTSC_TAPE:
case TUNER_PHILIPS_FM1256_IH3:
case TUNER_TCL_MF02GIP_5N:
buffer[3] = 0x19;
break;
case TUNER_PHILIPS_FM1216MK5:
buffer[2] = 0x88;
buffer[3] = 0x09;
break;
case TUNER_TNF_5335MF:
buffer[3] = 0x11;
break;
case TUNER_LG_PAL_FM:
buffer[3] = 0xa5;
break;
case TUNER_THOMSON_DTT761X:
buffer[3] = 0x39;
break;
case TUNER_PHILIPS_FQ1216LME_MK3:
case TUNER_PHILIPS_FQ1236_MK5:
tuner_err("This tuner doesn't have FM\n");
/* Set the low band for sanity, since it covers 88-108 MHz */
buffer[3] = 0x01;
break;
case TUNER_MICROTUNE_4049FM5:
default:
buffer[3] = 0xa4;
break;
}
return 0;
}
/* ---------------------------------------------------------------------- */
static int simple_set_tv_freq(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
u8 config, cb;
u16 div;
u8 buffer[4];
int rc, IFPCoff, i;
enum param_type desired_type;
struct tuner_params *t_params;
/* IFPCoff = Video Intermediate Frequency - Vif:
940 =16*58.75 NTSC/J (Japan)
732 =16*45.75 M/N STD
704 =16*44 ATSC (at DVB code)
632 =16*39.50 I U.K.
622.4=16*38.90 B/G D/K I, L STD
592 =16*37.00 D China
590 =16.36.875 B Australia
543.2=16*33.95 L' STD
171.2=16*10.70 FM Radio (at set_radio_freq)
*/
if (params->std == V4L2_STD_NTSC_M_JP) {
IFPCoff = 940;
desired_type = TUNER_PARAM_TYPE_NTSC;
} else if ((params->std & V4L2_STD_MN) &&
!(params->std & ~V4L2_STD_MN)) {
IFPCoff = 732;
desired_type = TUNER_PARAM_TYPE_NTSC;
} else if (params->std == V4L2_STD_SECAM_LC) {
IFPCoff = 543;
desired_type = TUNER_PARAM_TYPE_SECAM;
} else {
IFPCoff = 623;
desired_type = TUNER_PARAM_TYPE_PAL;
}
t_params = simple_tuner_params(fe, desired_type);
i = simple_config_lookup(fe, t_params, ¶ms->frequency,
&config, &cb);
div = params->frequency + IFPCoff + offset;
tuner_dbg("Freq= %d.%02d MHz, V_IF=%d.%02d MHz, Offset=%d.%02d MHz, div=%0d\n",
params->frequency / 16, params->frequency % 16 * 100 / 16,
IFPCoff / 16, IFPCoff % 16 * 100 / 16,
offset / 16, offset % 16 * 100 / 16, div);
/* tv norm specific stuff for multi-norm tuners */
simple_std_setup(fe, params, &config, &cb);
if (t_params->cb_first_if_lower_freq && div < priv->last_div) {
buffer[0] = config;
buffer[1] = cb;
buffer[2] = (div>>8) & 0x7f;
buffer[3] = div & 0xff;
} else {
buffer[0] = (div>>8) & 0x7f;
buffer[1] = div & 0xff;
buffer[2] = config;
buffer[3] = cb;
}
priv->last_div = div;
if (t_params->has_tda9887) {
struct v4l2_priv_tun_config tda9887_cfg;
int tda_config = 0;
int is_secam_l = (params->std & (V4L2_STD_SECAM_L |
V4L2_STD_SECAM_LC)) &&
!(params->std & ~(V4L2_STD_SECAM_L |
V4L2_STD_SECAM_LC));
tda9887_cfg.tuner = TUNER_TDA9887;
tda9887_cfg.priv = &tda_config;
if (params->std == V4L2_STD_SECAM_LC) {
if (t_params->port1_active ^ t_params->port1_invert_for_secam_lc)
tda_config |= TDA9887_PORT1_ACTIVE;
if (t_params->port2_active ^ t_params->port2_invert_for_secam_lc)
tda_config |= TDA9887_PORT2_ACTIVE;
} else {
if (t_params->port1_active)
tda_config |= TDA9887_PORT1_ACTIVE;
if (t_params->port2_active)
tda_config |= TDA9887_PORT2_ACTIVE;
}
if (t_params->intercarrier_mode)
tda_config |= TDA9887_INTERCARRIER;
if (is_secam_l) {
if (i == 0 && t_params->default_top_secam_low)
tda_config |= TDA9887_TOP(t_params->default_top_secam_low);
else if (i == 1 && t_params->default_top_secam_mid)
tda_config |= TDA9887_TOP(t_params->default_top_secam_mid);
else if (t_params->default_top_secam_high)
tda_config |= TDA9887_TOP(t_params->default_top_secam_high);
} else {
if (i == 0 && t_params->default_top_low)
tda_config |= TDA9887_TOP(t_params->default_top_low);
else if (i == 1 && t_params->default_top_mid)
tda_config |= TDA9887_TOP(t_params->default_top_mid);
else if (t_params->default_top_high)
tda_config |= TDA9887_TOP(t_params->default_top_high);
}
if (t_params->default_pll_gating_18)
tda_config |= TDA9887_GATING_18;
i2c_clients_command(priv->i2c_props.adap, TUNER_SET_CONFIG,
&tda9887_cfg);
}
tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
buffer[0], buffer[1], buffer[2], buffer[3]);
rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
if (4 != rc)
tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
simple_post_tune(fe, &buffer[0], div, config, cb);
return 0;
}
static int simple_set_radio_freq(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tunertype *tun;
struct tuner_simple_priv *priv = fe->tuner_priv;
u8 buffer[4];
u16 div;
int rc, j;
struct tuner_params *t_params;
unsigned int freq = params->frequency;
bool mono = params->audmode == V4L2_TUNER_MODE_MONO;
tun = priv->tun;
for (j = tun->count-1; j > 0; j--)
if (tun->params[j].type == TUNER_PARAM_TYPE_RADIO)
break;
/* default t_params (j=0) will be used if desired type wasn't found */
t_params = &tun->params[j];
/* Select Radio 1st IF used */
switch (t_params->radio_if) {
case 0: /* 10.7 MHz */
freq += (unsigned int)(10.7*16000);
break;
case 1: /* 33.3 MHz */
freq += (unsigned int)(33.3*16000);
break;
case 2: /* 41.3 MHz */
freq += (unsigned int)(41.3*16000);
break;
default:
tuner_warn("Unsupported radio_if value %d\n",
t_params->radio_if);
return 0;
}
buffer[2] = (t_params->ranges[0].config & ~TUNER_RATIO_MASK) |
TUNER_RATIO_SELECT_50; /* 50 kHz step */
/* Bandswitch byte */
if (simple_radio_bandswitch(fe, &buffer[0]))
return 0;
/* Convert from 1/16 kHz V4L steps to 1/20 MHz (=50 kHz) PLL steps
freq * (1 Mhz / 16000 V4L steps) * (20 PLL steps / 1 MHz) =
freq * (1/800) */
div = (freq + 400) / 800;
if (t_params->cb_first_if_lower_freq && div < priv->last_div) {
buffer[0] = buffer[2];
buffer[1] = buffer[3];
buffer[2] = (div>>8) & 0x7f;
buffer[3] = div & 0xff;
} else {
buffer[0] = (div>>8) & 0x7f;
buffer[1] = div & 0xff;
}
tuner_dbg("radio 0x%02x 0x%02x 0x%02x 0x%02x\n",
buffer[0], buffer[1], buffer[2], buffer[3]);
priv->last_div = div;
if (t_params->has_tda9887) {
int config = 0;
struct v4l2_priv_tun_config tda9887_cfg;
tda9887_cfg.tuner = TUNER_TDA9887;
tda9887_cfg.priv = &config;
if (t_params->port1_active &&
!t_params->port1_fm_high_sensitivity)
config |= TDA9887_PORT1_ACTIVE;
if (t_params->port2_active &&
!t_params->port2_fm_high_sensitivity)
config |= TDA9887_PORT2_ACTIVE;
if (t_params->intercarrier_mode)
config |= TDA9887_INTERCARRIER;
if (t_params->port1_set_for_fm_mono && mono)
config &= ~TDA9887_PORT1_ACTIVE;
if (t_params->fm_gain_normal)
config |= TDA9887_GAIN_NORMAL;
if (t_params->radio_if == 2)
config |= TDA9887_RIF_41_3;
i2c_clients_command(priv->i2c_props.adap, TUNER_SET_CONFIG,
&tda9887_cfg);
}
rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
if (4 != rc)
tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
/* Write AUX byte */
switch (priv->type) {
case TUNER_PHILIPS_FM1216ME_MK3:
buffer[2] = 0x98;
buffer[3] = 0x20; /* set TOP AGC */
rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
if (4 != rc)
tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
break;
}
return 0;
}
static int simple_set_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
int ret = -EINVAL;
if (priv->i2c_props.adap == NULL)
return -EINVAL;
switch (params->mode) {
case V4L2_TUNER_RADIO:
priv->radio_mode = true;
ret = simple_set_radio_freq(fe, params);
priv->frequency = params->frequency * 125 / 2;
break;
case V4L2_TUNER_ANALOG_TV:
case V4L2_TUNER_DIGITAL_TV:
priv->radio_mode = false;
ret = simple_set_tv_freq(fe, params);
priv->frequency = params->frequency * 62500;
break;
}
priv->bandwidth = 0;
return ret;
}
static void simple_set_dvb(struct dvb_frontend *fe, u8 *buf,
const u32 delsys,
const u32 frequency,
const u32 bandwidth)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
switch (priv->type) {
case TUNER_PHILIPS_FMD1216ME_MK3:
case TUNER_PHILIPS_FMD1216MEX_MK3:
if (bandwidth == 8000000 &&
frequency >= 158870000)
buf[3] |= 0x08;
break;
case TUNER_PHILIPS_TD1316:
/* determine band */
buf[3] |= (frequency < 161000000) ? 1 :
(frequency < 444000000) ? 2 : 4;
/* setup PLL filter */
if (bandwidth == 8000000)
buf[3] |= 1 << 3;
break;
case TUNER_PHILIPS_TUV1236D:
case TUNER_PHILIPS_FCV1236D:
{
unsigned int new_rf;
if (dtv_input[priv->nr])
new_rf = dtv_input[priv->nr];
else
switch (delsys) {
case SYS_DVBC_ANNEX_B:
new_rf = 1;
break;
case SYS_ATSC:
default:
new_rf = 0;
break;
}
simple_set_rf_input(fe, &buf[2], &buf[3], new_rf);
break;
}
default:
break;
}
}
static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf,
const u32 delsys,
const u32 freq,
const u32 bw)
{
/* This function returns the tuned frequency on success, 0 on error */
struct tuner_simple_priv *priv = fe->tuner_priv;
struct tunertype *tun = priv->tun;
struct tuner_params *t_params;
u8 config, cb;
u32 div;
int ret;
u32 frequency = freq / 62500;
if (!tun->stepsize) {
/* tuner-core was loaded before the digital tuner was
* configured and somehow picked the wrong tuner type */
tuner_err("attempt to treat tuner %d (%s) as digital tuner without stepsize defined.\n",
priv->type, priv->tun->name);
return 0; /* failure */
}
t_params = simple_tuner_params(fe, TUNER_PARAM_TYPE_DIGITAL);
ret = simple_config_lookup(fe, t_params, &frequency, &config, &cb);
if (ret < 0)
return 0; /* failure */
div = ((frequency + t_params->iffreq) * 62500 + offset +
tun->stepsize/2) / tun->stepsize;
buf[0] = div >> 8;
buf[1] = div & 0xff;
buf[2] = config;
buf[3] = cb;
simple_set_dvb(fe, buf, delsys, freq, bw);
tuner_dbg("%s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
tun->name, div, buf[0], buf[1], buf[2], buf[3]);
/* calculate the frequency we set it to */
return (div * tun->stepsize) - t_params->iffreq;
}
static int simple_dvb_calc_regs(struct dvb_frontend *fe,
u8 *buf, int buf_len)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 delsys = c->delivery_system;
u32 bw = c->bandwidth_hz;
struct tuner_simple_priv *priv = fe->tuner_priv;
u32 frequency;
if (buf_len < 5)
return -EINVAL;
frequency = simple_dvb_configure(fe, buf+1, delsys, c->frequency, bw);
if (frequency == 0)
return -EINVAL;
buf[0] = priv->i2c_props.addr;
priv->frequency = frequency;
priv->bandwidth = c->bandwidth_hz;
return 5;
}
static int simple_dvb_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 delsys = c->delivery_system;
u32 bw = c->bandwidth_hz;
u32 freq = c->frequency;
struct tuner_simple_priv *priv = fe->tuner_priv;
u32 frequency;
u32 prev_freq, prev_bw;
int ret;
u8 buf[5];
if (priv->i2c_props.adap == NULL)
return -EINVAL;
prev_freq = priv->frequency;
prev_bw = priv->bandwidth;
frequency = simple_dvb_configure(fe, buf+1, delsys, freq, bw);
if (frequency == 0)
return -EINVAL;
buf[0] = priv->i2c_props.addr;
priv->frequency = frequency;
priv->bandwidth = bw;
/* put analog demod in standby when tuning digital */
if (fe->ops.analog_ops.standby)
fe->ops.analog_ops.standby(fe);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
/* buf[0] contains the i2c address, but *
* we already have it in i2c_props.addr */
ret = tuner_i2c_xfer_send(&priv->i2c_props, buf+1, 4);
if (ret != 4)
goto fail;
return 0;
fail:
/* calc_regs sets frequency and bandwidth. if we failed, unset them */
priv->frequency = prev_freq;
priv->bandwidth = prev_bw;
return ret;
}
static int simple_init(struct dvb_frontend *fe)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
if (priv->i2c_props.adap == NULL)
return -EINVAL;
if (priv->tun->initdata) {
int ret;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = tuner_i2c_xfer_send(&priv->i2c_props,
priv->tun->initdata + 1,
priv->tun->initdata[0]);
if (ret != priv->tun->initdata[0])
return ret;
}
return 0;
}
static int simple_sleep(struct dvb_frontend *fe)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
if (priv->i2c_props.adap == NULL)
return -EINVAL;
if (priv->tun->sleepdata) {
int ret;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = tuner_i2c_xfer_send(&priv->i2c_props,
priv->tun->sleepdata + 1,
priv->tun->sleepdata[0]);
if (ret != priv->tun->sleepdata[0])
return ret;
}
return 0;
}
static void simple_release(struct dvb_frontend *fe)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
mutex_lock(&tuner_simple_list_mutex);
if (priv)
hybrid_tuner_release_state(priv);
mutex_unlock(&tuner_simple_list_mutex);
fe->tuner_priv = NULL;
}
static int simple_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static int simple_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct tuner_simple_priv *priv = fe->tuner_priv;
*bandwidth = priv->bandwidth;
return 0;
}
static const struct dvb_tuner_ops simple_tuner_ops = {
.init = simple_init,
.sleep = simple_sleep,
.set_analog_params = simple_set_params,
.set_params = simple_dvb_set_params,
.calc_regs = simple_dvb_calc_regs,
.release = simple_release,
.get_frequency = simple_get_frequency,
.get_bandwidth = simple_get_bandwidth,
.get_status = simple_get_status,
.get_rf_strength = simple_get_rf_strength,
};
struct dvb_frontend *simple_tuner_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c_adap,
u8 i2c_addr,
unsigned int type)
{
struct tuner_simple_priv *priv = NULL;
int instance;
if (type >= tuner_count) {
printk(KERN_WARNING "%s: invalid tuner type: %d (max: %d)\n",
__func__, type, tuner_count-1);
return NULL;
}
/* If i2c_adap is set, check that the tuner is at the correct address.
* Otherwise, if i2c_adap is NULL, the tuner will be programmed directly
* by the digital demod via calc_regs.
*/
if (i2c_adap != NULL) {
u8 b[1];
struct i2c_msg msg = {
.addr = i2c_addr, .flags = I2C_M_RD,
.buf = b, .len = 1,
};
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
if (1 != i2c_transfer(i2c_adap, &msg, 1))
printk(KERN_WARNING "tuner-simple %d-%04x: unable to probe %s, proceeding anyway.",
i2c_adapter_id(i2c_adap), i2c_addr,
tuners[type].name);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
}
mutex_lock(&tuner_simple_list_mutex);
instance = hybrid_tuner_request_state(struct tuner_simple_priv, priv,
hybrid_tuner_instance_list,
i2c_adap, i2c_addr,
"tuner-simple");
switch (instance) {
case 0:
mutex_unlock(&tuner_simple_list_mutex);
return NULL;
case 1:
fe->tuner_priv = priv;
priv->type = type;
priv->tun = &tuners[type];
priv->nr = simple_devcount++;
break;
default:
fe->tuner_priv = priv;
break;
}
mutex_unlock(&tuner_simple_list_mutex);
memcpy(&fe->ops.tuner_ops, &simple_tuner_ops,
sizeof(struct dvb_tuner_ops));
if (type != priv->type)
tuner_warn("couldn't set type to %d. Using %d (%s) instead\n",
type, priv->type, priv->tun->name);
else
tuner_info("type set to %d (%s)\n",
priv->type, priv->tun->name);
if ((debug) || ((atv_input[priv->nr] > 0) ||
(dtv_input[priv->nr] > 0))) {
if (0 == atv_input[priv->nr])
tuner_info("tuner %d atv rf input will be autoselected\n",
priv->nr);
else
tuner_info("tuner %d atv rf input will be set to input %d (insmod option)\n",
priv->nr, atv_input[priv->nr]);
if (0 == dtv_input[priv->nr])
tuner_info("tuner %d dtv rf input will be autoselected\n",
priv->nr);
else
tuner_info("tuner %d dtv rf input will be set to input %d (insmod option)\n",
priv->nr, dtv_input[priv->nr]);
}
strscpy(fe->ops.tuner_ops.info.name, priv->tun->name,
sizeof(fe->ops.tuner_ops.info.name));
return fe;
}
EXPORT_SYMBOL_GPL(simple_tuner_attach);
MODULE_DESCRIPTION("Simple 4-control-bytes style tuner driver");
MODULE_AUTHOR("Ralph Metzler, Gerd Knorr, Gunther Mayer");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/tuner-simple.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
*
* Copyright (c) 2006 Steven Toth <[email protected]>
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/dvb/frontend.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <media/dvb_frontend.h>
#include "mt2131.h"
#include "mt2131_priv.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
#define dprintk(level,fmt, arg...) if (debug >= level) \
printk(KERN_INFO "%s: " fmt, "mt2131", ## arg)
static u8 mt2131_config1[] = {
0x01,
0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88,
0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80,
0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00
};
static u8 mt2131_config2[] = {
0x10,
0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
};
static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val)
{
struct i2c_msg msg[2] = {
{ .addr = priv->cfg->i2c_address, .flags = 0,
.buf = ®, .len = 1 },
{ .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
.buf = val, .len = 1 },
};
if (i2c_transfer(priv->i2c, msg, 2) != 2) {
printk(KERN_WARNING "mt2131 I2C read failed\n");
return -EREMOTEIO;
}
return 0;
}
static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val)
{
u8 buf[2] = { reg, val };
struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0,
.buf = buf, .len = 2 };
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
printk(KERN_WARNING "mt2131 I2C write failed\n");
return -EREMOTEIO;
}
return 0;
}
static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
{
struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
.flags = 0, .buf = buf, .len = len };
if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n",
(int)len);
return -EREMOTEIO;
}
return 0;
}
static int mt2131_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct mt2131_priv *priv;
int ret=0, i;
u32 freq;
u8 if_band_center;
u32 f_lo1, f_lo2;
u32 div1, num1, div2, num2;
u8 b[8];
u8 lockval = 0;
priv = fe->tuner_priv;
freq = c->frequency / 1000; /* Hz -> kHz */
dprintk(1, "%s() freq=%d\n", __func__, freq);
f_lo1 = freq + MT2131_IF1 * 1000;
f_lo1 = (f_lo1 / 250) * 250;
f_lo2 = f_lo1 - freq - MT2131_IF2;
priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000;
/* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */
num1 = f_lo1 * 64 / (MT2131_FREF / 128);
div1 = num1 / 8192;
num1 &= 0x1fff;
/* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */
num2 = f_lo2 * 64 / (MT2131_FREF / 128);
div2 = num2 / 8192;
num2 &= 0x1fff;
if (freq <= 82500) if_band_center = 0x00; else
if (freq <= 137500) if_band_center = 0x01; else
if (freq <= 192500) if_band_center = 0x02; else
if (freq <= 247500) if_band_center = 0x03; else
if (freq <= 302500) if_band_center = 0x04; else
if (freq <= 357500) if_band_center = 0x05; else
if (freq <= 412500) if_band_center = 0x06; else
if (freq <= 467500) if_band_center = 0x07; else
if (freq <= 522500) if_band_center = 0x08; else
if (freq <= 577500) if_band_center = 0x09; else
if (freq <= 632500) if_band_center = 0x0A; else
if (freq <= 687500) if_band_center = 0x0B; else
if (freq <= 742500) if_band_center = 0x0C; else
if (freq <= 797500) if_band_center = 0x0D; else
if (freq <= 852500) if_band_center = 0x0E; else
if (freq <= 907500) if_band_center = 0x0F; else
if (freq <= 962500) if_band_center = 0x10; else
if (freq <= 1017500) if_band_center = 0x11; else
if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13;
b[0] = 1;
b[1] = (num1 >> 5) & 0xFF;
b[2] = (num1 & 0x1F);
b[3] = div1;
b[4] = (num2 >> 5) & 0xFF;
b[5] = num2 & 0x1F;
b[6] = div2;
dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2);
dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center);
dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2);
dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n",
(int)div1, (int)num1, (int)div2, (int)num2);
dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n",
(int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5],
(int)b[6]);
ret = mt2131_writeregs(priv,b,7);
if (ret < 0)
return ret;
mt2131_writereg(priv, 0x0b, if_band_center);
/* Wait for lock */
i = 0;
do {
mt2131_readreg(priv, 0x08, &lockval);
if ((lockval & 0x88) == 0x88)
break;
msleep(4);
i++;
} while (i < 10);
return ret;
}
static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct mt2131_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*frequency = priv->frequency;
return 0;
}
static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
{
struct mt2131_priv *priv = fe->tuner_priv;
u8 lock_status = 0;
u8 afc_status = 0;
*status = 0;
mt2131_readreg(priv, 0x08, &lock_status);
if ((lock_status & 0x88) == 0x88)
*status = TUNER_STATUS_LOCKED;
mt2131_readreg(priv, 0x09, &afc_status);
dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n",
__func__, lock_status, afc_status);
return 0;
}
static int mt2131_init(struct dvb_frontend *fe)
{
struct mt2131_priv *priv = fe->tuner_priv;
int ret;
dprintk(1, "%s()\n", __func__);
if ((ret = mt2131_writeregs(priv, mt2131_config1,
sizeof(mt2131_config1))) < 0)
return ret;
mt2131_writereg(priv, 0x0b, 0x09);
mt2131_writereg(priv, 0x15, 0x47);
mt2131_writereg(priv, 0x07, 0xf2);
mt2131_writereg(priv, 0x0b, 0x01);
if ((ret = mt2131_writeregs(priv, mt2131_config2,
sizeof(mt2131_config2))) < 0)
return ret;
return ret;
}
static void mt2131_release(struct dvb_frontend *fe)
{
dprintk(1, "%s()\n", __func__);
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static const struct dvb_tuner_ops mt2131_tuner_ops = {
.info = {
.name = "Microtune MT2131",
.frequency_min_hz = 48 * MHz,
.frequency_max_hz = 860 * MHz,
.frequency_step_hz = 50 * kHz,
},
.release = mt2131_release,
.init = mt2131_init,
.set_params = mt2131_set_params,
.get_frequency = mt2131_get_frequency,
.get_status = mt2131_get_status
};
struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
struct mt2131_config *cfg, u16 if1)
{
struct mt2131_priv *priv = NULL;
u8 id = 0;
dprintk(1, "%s()\n", __func__);
priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
priv->cfg = cfg;
priv->i2c = i2c;
if (mt2131_readreg(priv, 0, &id) != 0) {
kfree(priv);
return NULL;
}
if ( (id != 0x3E) && (id != 0x3F) ) {
printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n",
cfg->i2c_address);
kfree(priv);
return NULL;
}
printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n",
cfg->i2c_address);
memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops,
sizeof(struct dvb_tuner_ops));
fe->tuner_priv = priv;
return fe;
}
EXPORT_SYMBOL_GPL(mt2131_attach);
MODULE_AUTHOR("Steven Toth");
MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/mt2131.c |
// SPDX-License-Identifier: GPL-2.0
/*
* Sharp QM1D1B0004 satellite tuner
*
* Copyright (C) 2014 Akihiro Tsukada <[email protected]>
*
* based on (former) drivers/media/pci/pt1/va1j5jf8007s.c.
*/
/*
* Note:
* Since the data-sheet of this tuner chip is not available,
* this driver lacks some tuner_ops and config options.
* In addition, the implementation might be dependent on the specific use
* in the FE module: VA1J5JF8007S and/or in the product: Earthsoft PT1/PT2.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <media/dvb_frontend.h>
#include "qm1d1b0004.h"
/*
* Tuner I/F (copied from the former va1j5jf8007s.c)
* b[0] I2C addr
* b[1] "0":1, BG:2, divider_quotient[7:3]:5
* b[2] divider_quotient[2:0]:3, divider_remainder:5
* b[3] "111":3, LPF[3:2]:2, TM:1, "0":1, REF:1
* b[4] BANDX, PSC:1, LPF[1:0]:2, DIV:1, "0":1
*
* PLL frequency step :=
* REF == 0 -> PLL XTL frequency(4MHz) / 8
* REF == 1 -> PLL XTL frequency(4MHz) / 4
*
* PreScaler :=
* PSC == 0 -> x32
* PSC == 1 -> x16
*
* divider_quotient := (frequency / PLL frequency step) / PreScaler
* divider_remainder := (frequency / PLL frequency step) % PreScaler
*
* LPF := LPF Frequency / 1000 / 2 - 2
* LPF Frequency @ baudrate=28.86Mbps = 30000
*
* band (1..9)
* band 1 (freq < 986000) -> DIV:1, BANDX:5, PSC:1
* band 2 (freq < 1072000) -> DIV:1, BANDX:6, PSC:1
* band 3 (freq < 1154000) -> DIV:1, BANDX:7, PSC:0
* band 4 (freq < 1291000) -> DIV:0, BANDX:1, PSC:0
* band 5 (freq < 1447000) -> DIV:0, BANDX:2, PSC:0
* band 6 (freq < 1615000) -> DIV:0, BANDX:3, PSC:0
* band 7 (freq < 1791000) -> DIV:0, BANDX:4, PSC:0
* band 8 (freq < 1972000) -> DIV:0, BANDX:5, PSC:0
* band 9 (freq < 2150000) -> DIV:0, BANDX:6, PSC:0
*/
#define QM1D1B0004_PSC_MASK (1 << 4)
#define QM1D1B0004_XTL_FREQ 4000
#define QM1D1B0004_LPF_FALLBACK 30000
#if 0 /* Currently unused */
static const struct qm1d1b0004_config default_cfg = {
.lpf_freq = QM1D1B0004_CFG_LPF_DFLT,
.half_step = false,
};
#endif
struct qm1d1b0004_state {
struct qm1d1b0004_config cfg;
struct i2c_client *i2c;
};
struct qm1d1b0004_cb_map {
u32 frequency;
u8 cb;
};
static const struct qm1d1b0004_cb_map cb_maps[] = {
{ 986000, 0xb2 },
{ 1072000, 0xd2 },
{ 1154000, 0xe2 },
{ 1291000, 0x20 },
{ 1447000, 0x40 },
{ 1615000, 0x60 },
{ 1791000, 0x80 },
{ 1972000, 0xa0 },
};
static u8 lookup_cb(u32 frequency)
{
int i;
const struct qm1d1b0004_cb_map *map;
for (i = 0; i < ARRAY_SIZE(cb_maps); i++) {
map = &cb_maps[i];
if (frequency < map->frequency)
return map->cb;
}
return 0xc0;
}
static int qm1d1b0004_set_params(struct dvb_frontend *fe)
{
struct qm1d1b0004_state *state;
u32 frequency, pll, lpf_freq;
u16 word;
u8 buf[4], cb, lpf;
int ret;
state = fe->tuner_priv;
frequency = fe->dtv_property_cache.frequency;
pll = QM1D1B0004_XTL_FREQ / 4;
if (state->cfg.half_step)
pll /= 2;
word = DIV_ROUND_CLOSEST(frequency, pll);
cb = lookup_cb(frequency);
if (cb & QM1D1B0004_PSC_MASK)
word = (word << 1 & ~0x1f) | (word & 0x0f);
/* step.1: set frequency with BG:2, TM:0(4MHZ), LPF:4MHz */
buf[0] = 0x40 | word >> 8;
buf[1] = word;
/* inconsisnten with the above I/F doc. maybe the doc is wrong */
buf[2] = 0xe0 | state->cfg.half_step;
buf[3] = cb;
ret = i2c_master_send(state->i2c, buf, 4);
if (ret < 0)
return ret;
/* step.2: set TM:1 */
buf[0] = 0xe4 | state->cfg.half_step;
ret = i2c_master_send(state->i2c, buf, 1);
if (ret < 0)
return ret;
msleep(20);
/* step.3: set LPF */
lpf_freq = state->cfg.lpf_freq;
if (lpf_freq == QM1D1B0004_CFG_LPF_DFLT)
lpf_freq = fe->dtv_property_cache.symbol_rate / 1000;
if (lpf_freq == 0)
lpf_freq = QM1D1B0004_LPF_FALLBACK;
lpf = DIV_ROUND_UP(lpf_freq, 2000) - 2;
buf[0] = 0xe4 | ((lpf & 0x0c) << 1) | state->cfg.half_step;
buf[1] = cb | ((lpf & 0x03) << 2);
ret = i2c_master_send(state->i2c, buf, 2);
if (ret < 0)
return ret;
/* step.4: read PLL lock? */
buf[0] = 0;
ret = i2c_master_recv(state->i2c, buf, 1);
if (ret < 0)
return ret;
return 0;
}
static int qm1d1b0004_set_config(struct dvb_frontend *fe, void *priv_cfg)
{
struct qm1d1b0004_state *state;
state = fe->tuner_priv;
memcpy(&state->cfg, priv_cfg, sizeof(state->cfg));
return 0;
}
static int qm1d1b0004_init(struct dvb_frontend *fe)
{
struct qm1d1b0004_state *state;
u8 buf[2] = {0xf8, 0x04};
state = fe->tuner_priv;
if (state->cfg.half_step)
buf[0] |= 0x01;
return i2c_master_send(state->i2c, buf, 2);
}
static const struct dvb_tuner_ops qm1d1b0004_ops = {
.info = {
.name = "Sharp qm1d1b0004",
.frequency_min_hz = 950 * MHz,
.frequency_max_hz = 2150 * MHz,
},
.init = qm1d1b0004_init,
.set_params = qm1d1b0004_set_params,
.set_config = qm1d1b0004_set_config,
};
static int
qm1d1b0004_probe(struct i2c_client *client)
{
struct dvb_frontend *fe;
struct qm1d1b0004_config *cfg;
struct qm1d1b0004_state *state;
int ret;
cfg = client->dev.platform_data;
fe = cfg->fe;
i2c_set_clientdata(client, fe);
fe->tuner_priv = kzalloc(sizeof(struct qm1d1b0004_state), GFP_KERNEL);
if (!fe->tuner_priv) {
ret = -ENOMEM;
goto err_mem;
}
memcpy(&fe->ops.tuner_ops, &qm1d1b0004_ops, sizeof(fe->ops.tuner_ops));
state = fe->tuner_priv;
state->i2c = client;
ret = qm1d1b0004_set_config(fe, cfg);
if (ret != 0)
goto err_priv;
dev_info(&client->dev, "Sharp QM1D1B0004 attached.\n");
return 0;
err_priv:
kfree(fe->tuner_priv);
err_mem:
fe->tuner_priv = NULL;
return ret;
}
static void qm1d1b0004_remove(struct i2c_client *client)
{
struct dvb_frontend *fe;
fe = i2c_get_clientdata(client);
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static const struct i2c_device_id qm1d1b0004_id[] = {
{"qm1d1b0004", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, qm1d1b0004_id);
static struct i2c_driver qm1d1b0004_driver = {
.driver = {
.name = "qm1d1b0004",
},
.probe = qm1d1b0004_probe,
.remove = qm1d1b0004_remove,
.id_table = qm1d1b0004_id,
};
module_i2c_driver(qm1d1b0004_driver);
MODULE_DESCRIPTION("Sharp QM1D1B0004");
MODULE_AUTHOR("Akihiro Tsukada");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/qm1d1b0004.c |
// SPDX-License-Identifier: GPL-2.0
// For Philips TEA5761 FM Chip
// I2C address is always 0x20 (0x10 at 7-bit mode).
//
// Copyright (c) 2005-2007 Mauro Carvalho Chehab <[email protected]>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
#include <media/tuner.h>
#include "tuner-i2c.h"
#include "tea5761.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable verbose debug messages");
struct tea5761_priv {
struct tuner_i2c_props i2c_props;
u32 frequency;
bool standby;
};
/*****************************************************************************/
/***************************
* TEA5761HN I2C registers *
***************************/
/* INTREG - Read: bytes 0 and 1 / Write: byte 0 */
/* first byte for reading */
#define TEA5761_INTREG_IFFLAG 0x10
#define TEA5761_INTREG_LEVFLAG 0x8
#define TEA5761_INTREG_FRRFLAG 0x2
#define TEA5761_INTREG_BLFLAG 0x1
/* second byte for reading / byte for writing */
#define TEA5761_INTREG_IFMSK 0x10
#define TEA5761_INTREG_LEVMSK 0x8
#define TEA5761_INTREG_FRMSK 0x2
#define TEA5761_INTREG_BLMSK 0x1
/* FRQSET - Read: bytes 2 and 3 / Write: byte 1 and 2 */
/* First byte */
#define TEA5761_FRQSET_SEARCH_UP 0x80 /* 1=Station search from botton to up */
#define TEA5761_FRQSET_SEARCH_MODE 0x40 /* 1=Search mode */
/* Bits 0-5 for divider MSB */
/* Second byte */
/* Bits 0-7 for divider LSB */
/* TNCTRL - Read: bytes 4 and 5 / Write: Bytes 3 and 4 */
/* first byte */
#define TEA5761_TNCTRL_PUPD_0 0x40 /* Power UP/Power Down MSB */
#define TEA5761_TNCTRL_BLIM 0X20 /* 1= Japan Frequencies, 0= European frequencies */
#define TEA5761_TNCTRL_SWPM 0x10 /* 1= software port is FRRFLAG */
#define TEA5761_TNCTRL_IFCTC 0x08 /* 1= IF count time 15.02 ms, 0= IF count time 2.02 ms */
#define TEA5761_TNCTRL_AFM 0x04
#define TEA5761_TNCTRL_SMUTE 0x02 /* 1= Soft mute */
#define TEA5761_TNCTRL_SNC 0x01
/* second byte */
#define TEA5761_TNCTRL_MU 0x80 /* 1=Hard mute */
#define TEA5761_TNCTRL_SSL_1 0x40
#define TEA5761_TNCTRL_SSL_0 0x20
#define TEA5761_TNCTRL_HLSI 0x10
#define TEA5761_TNCTRL_MST 0x08 /* 1 = mono */
#define TEA5761_TNCTRL_SWP 0x04
#define TEA5761_TNCTRL_DTC 0x02 /* 1 = deemphasis 50 us, 0 = deemphasis 75 us */
#define TEA5761_TNCTRL_AHLSI 0x01
/* FRQCHECK - Read: bytes 6 and 7 */
/* First byte */
/* Bits 0-5 for divider MSB */
/* Second byte */
/* Bits 0-7 for divider LSB */
/* TUNCHECK - Read: bytes 8 and 9 */
/* First byte */
#define TEA5761_TUNCHECK_IF_MASK 0x7e /* IF count */
#define TEA5761_TUNCHECK_TUNTO 0x01
/* Second byte */
#define TEA5761_TUNCHECK_LEV_MASK 0xf0 /* Level Count */
#define TEA5761_TUNCHECK_LD 0x08
#define TEA5761_TUNCHECK_STEREO 0x04
/* TESTREG - Read: bytes 10 and 11 / Write: bytes 5 and 6 */
/* All zero = no test mode */
/* MANID - Read: bytes 12 and 13 */
/* First byte - should be 0x10 */
#define TEA5767_MANID_VERSION_MASK 0xf0 /* Version = 1 */
#define TEA5767_MANID_ID_MSB_MASK 0x0f /* Manufacurer ID - should be 0 */
/* Second byte - Should be 0x2b */
#define TEA5767_MANID_ID_LSB_MASK 0xfe /* Manufacturer ID - should be 0x15 */
#define TEA5767_MANID_IDAV 0x01 /* 1 = Chip has ID, 0 = Chip has no ID */
/* Chip ID - Read: bytes 14 and 15 */
/* First byte - should be 0x57 */
/* Second byte - should be 0x61 */
/*****************************************************************************/
#define FREQ_OFFSET 0 /* for TEA5767, it is 700 to give the right freq */
static void tea5761_status_dump(unsigned char *buffer)
{
unsigned int div, frq;
div = ((buffer[2] & 0x3f) << 8) | buffer[3];
frq = 1000 * (div * 32768 / 1000 + FREQ_OFFSET + 225) / 4; /* Freq in KHz */
printk(KERN_INFO "tea5761: Frequency %d.%03d KHz (divider = 0x%04x)\n",
frq / 1000, frq % 1000, div);
}
/* Freq should be specifyed at 62.5 Hz */
static int __set_radio_freq(struct dvb_frontend *fe,
unsigned int freq,
bool mono)
{
struct tea5761_priv *priv = fe->tuner_priv;
unsigned int frq = freq;
unsigned char buffer[7] = {0, 0, 0, 0, 0, 0, 0 };
unsigned div;
int rc;
tuner_dbg("radio freq counter %d\n", frq);
if (priv->standby) {
tuner_dbg("TEA5761 set to standby mode\n");
buffer[5] |= TEA5761_TNCTRL_MU;
} else {
buffer[4] |= TEA5761_TNCTRL_PUPD_0;
}
if (mono) {
tuner_dbg("TEA5761 set to mono\n");
buffer[5] |= TEA5761_TNCTRL_MST;
} else {
tuner_dbg("TEA5761 set to stereo\n");
}
div = (1000 * (frq * 4 / 16 + 700 + 225) ) >> 15;
buffer[1] = (div >> 8) & 0x3f;
buffer[2] = div & 0xff;
if (debug)
tea5761_status_dump(buffer);
if (7 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 7)))
tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
priv->frequency = frq * 125 / 2;
return 0;
}
static int set_radio_freq(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct tea5761_priv *priv = fe->analog_demod_priv;
priv->standby = false;
return __set_radio_freq(fe, params->frequency,
params->audmode == V4L2_TUNER_MODE_MONO);
}
static int set_radio_sleep(struct dvb_frontend *fe)
{
struct tea5761_priv *priv = fe->analog_demod_priv;
priv->standby = true;
return __set_radio_freq(fe, priv->frequency, false);
}
static int tea5761_read_status(struct dvb_frontend *fe, char *buffer)
{
struct tea5761_priv *priv = fe->tuner_priv;
int rc;
memset(buffer, 0, 16);
if (16 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 16))) {
tuner_warn("i2c i/o error: rc == %d (should be 16)\n", rc);
return -EREMOTEIO;
}
return 0;
}
static inline int tea5761_signal(struct dvb_frontend *fe, const char *buffer)
{
struct tea5761_priv *priv = fe->tuner_priv;
int signal = ((buffer[9] & TEA5761_TUNCHECK_LEV_MASK) << (13 - 4));
tuner_dbg("Signal strength: %d\n", signal);
return signal;
}
static inline int tea5761_stereo(struct dvb_frontend *fe, const char *buffer)
{
struct tea5761_priv *priv = fe->tuner_priv;
int stereo = buffer[9] & TEA5761_TUNCHECK_STEREO;
tuner_dbg("Radio ST GET = %02x\n", stereo);
return (stereo ? V4L2_TUNER_SUB_STEREO : 0);
}
static int tea5761_get_status(struct dvb_frontend *fe, u32 *status)
{
unsigned char buffer[16];
*status = 0;
if (0 == tea5761_read_status(fe, buffer)) {
if (tea5761_signal(fe, buffer))
*status = TUNER_STATUS_LOCKED;
if (tea5761_stereo(fe, buffer))
*status |= TUNER_STATUS_STEREO;
}
return 0;
}
static int tea5761_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
{
unsigned char buffer[16];
*strength = 0;
if (0 == tea5761_read_status(fe, buffer))
*strength = tea5761_signal(fe, buffer);
return 0;
}
int tea5761_autodetection(struct i2c_adapter* i2c_adap, u8 i2c_addr)
{
unsigned char buffer[16];
int rc;
struct tuner_i2c_props i2c = { .adap = i2c_adap, .addr = i2c_addr };
if (16 != (rc = tuner_i2c_xfer_recv(&i2c, buffer, 16))) {
printk(KERN_WARNING "it is not a TEA5761. Received %i chars.\n", rc);
return -EINVAL;
}
if ((buffer[13] != 0x2b) || (buffer[14] != 0x57) || (buffer[15] != 0x061)) {
printk(KERN_WARNING "Manufacturer ID= 0x%02x, Chip ID = %02x%02x. It is not a TEA5761\n",
buffer[13], buffer[14], buffer[15]);
return -EINVAL;
}
printk(KERN_WARNING "tea5761: TEA%02x%02x detected. Manufacturer ID= 0x%02x\n",
buffer[14], buffer[15], buffer[13]);
return 0;
}
static void tea5761_release(struct dvb_frontend *fe)
{
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static int tea5761_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct tea5761_priv *priv = fe->tuner_priv;
*frequency = priv->frequency;
return 0;
}
static const struct dvb_tuner_ops tea5761_tuner_ops = {
.info = {
.name = "tea5761", // Philips TEA5761HN FM Radio
},
.set_analog_params = set_radio_freq,
.sleep = set_radio_sleep,
.release = tea5761_release,
.get_frequency = tea5761_get_frequency,
.get_status = tea5761_get_status,
.get_rf_strength = tea5761_get_rf_strength,
};
struct dvb_frontend *tea5761_attach(struct dvb_frontend *fe,
struct i2c_adapter* i2c_adap,
u8 i2c_addr)
{
struct tea5761_priv *priv = NULL;
if (tea5761_autodetection(i2c_adap, i2c_addr) != 0)
return NULL;
priv = kzalloc(sizeof(struct tea5761_priv), GFP_KERNEL);
if (priv == NULL)
return NULL;
fe->tuner_priv = priv;
priv->i2c_props.addr = i2c_addr;
priv->i2c_props.adap = i2c_adap;
priv->i2c_props.name = "tea5761";
memcpy(&fe->ops.tuner_ops, &tea5761_tuner_ops,
sizeof(struct dvb_tuner_ops));
tuner_info("type set to %s\n", "Philips TEA5761HN FM Radio");
return fe;
}
EXPORT_SYMBOL_GPL(tea5761_attach);
EXPORT_SYMBOL_GPL(tea5761_autodetection);
MODULE_DESCRIPTION("Philips TEA5761 FM tuner driver");
MODULE_AUTHOR("Mauro Carvalho Chehab <[email protected]>");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/media/tuners/tea5761.c |
// SPDX-License-Identifier: GPL-2.0
// Rafael Micro R820T driver
//
// Copyright (C) 2013 Mauro Carvalho Chehab
//
// This driver was written from scratch, based on an existing driver
// that it is part of rtl-sdr git tree, released under GPLv2:
// https://groups.google.com/forum/#!topic/ultra-cheap-sdr/Y3rBEOFtHug
// https://github.com/n1gp/gr-baz
//
// From what I understood from the threads, the original driver was converted
// to userspace from a Realtek tree. I couldn't find the original tree.
// However, the original driver look awkward on my eyes. So, I decided to
// write a new version from it from the scratch, while trying to reproduce
// everything found there.
//
// TODO:
// After locking, the original driver seems to have some routines to
// improve reception. This was not implemented here yet.
//
// RF Gain set/get is not implemented.
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/videodev2.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/bitrev.h>
#include "tuner-i2c.h"
#include "r820t.h"
/*
* FIXME: I think that there are only 32 registers, but better safe than
* sorry. After finishing the driver, we may review it.
*/
#define REG_SHADOW_START 5
#define NUM_REGS 27
#define NUM_IMR 5
#define IMR_TRIAL 9
#define VER_NUM 49
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable verbose debug messages");
static int no_imr_cal;
module_param(no_imr_cal, int, 0444);
MODULE_PARM_DESC(no_imr_cal, "Disable IMR calibration at module init");
/*
* enums and structures
*/
enum xtal_cap_value {
XTAL_LOW_CAP_30P = 0,
XTAL_LOW_CAP_20P,
XTAL_LOW_CAP_10P,
XTAL_LOW_CAP_0P,
XTAL_HIGH_CAP_0P
};
struct r820t_sect_type {
u8 phase_y;
u8 gain_x;
u16 value;
};
struct r820t_priv {
struct list_head hybrid_tuner_instance_list;
const struct r820t_config *cfg;
struct tuner_i2c_props i2c_props;
struct mutex lock;
u8 regs[NUM_REGS];
u8 buf[NUM_REGS + 1];
enum xtal_cap_value xtal_cap_sel;
u16 pll; /* kHz */
u32 int_freq;
u8 fil_cal_code;
bool imr_done;
bool has_lock;
bool init_done;
struct r820t_sect_type imr_data[NUM_IMR];
/* Store current mode */
u32 delsys;
enum v4l2_tuner_type type;
v4l2_std_id std;
u32 bw; /* in MHz */
};
struct r820t_freq_range {
u32 freq;
u8 open_d;
u8 rf_mux_ploy;
u8 tf_c;
u8 xtal_cap20p;
u8 xtal_cap10p;
u8 xtal_cap0p;
u8 imr_mem; /* Not used, currently */
};
#define VCO_POWER_REF 0x02
#define DIP_FREQ 32000000
/*
* Static constants
*/
static LIST_HEAD(hybrid_tuner_instance_list);
static DEFINE_MUTEX(r820t_list_mutex);
/* Those initial values start from REG_SHADOW_START */
static const u8 r820t_init_array[NUM_REGS] = {
0x83, 0x32, 0x75, /* 05 to 07 */
0xc0, 0x40, 0xd6, 0x6c, /* 08 to 0b */
0xf5, 0x63, 0x75, 0x68, /* 0c to 0f */
0x6c, 0x83, 0x80, 0x00, /* 10 to 13 */
0x0f, 0x00, 0xc0, 0x30, /* 14 to 17 */
0x48, 0xcc, 0x60, 0x00, /* 18 to 1b */
0x54, 0xae, 0x4a, 0xc0 /* 1c to 1f */
};
/* Tuner frequency ranges */
static const struct r820t_freq_range freq_ranges[] = {
{
.freq = 0,
.open_d = 0x08, /* low */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0xdf, /* R27[7:0] band2,band0 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 50, /* Start freq, in MHz */
.open_d = 0x08, /* low */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0xbe, /* R27[7:0] band4,band1 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 55, /* Start freq, in MHz */
.open_d = 0x08, /* low */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x8b, /* R27[7:0] band7,band4 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 60, /* Start freq, in MHz */
.open_d = 0x08, /* low */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x7b, /* R27[7:0] band8,band4 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 65, /* Start freq, in MHz */
.open_d = 0x08, /* low */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x69, /* R27[7:0] band9,band6 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 70, /* Start freq, in MHz */
.open_d = 0x08, /* low */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x58, /* R27[7:0] band10,band7 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 75, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x44, /* R27[7:0] band11,band11 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 80, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x44, /* R27[7:0] band11,band11 */
.xtal_cap20p = 0x02, /* R16[1:0] 20pF (10) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 90, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x34, /* R27[7:0] band12,band11 */
.xtal_cap20p = 0x01, /* R16[1:0] 10pF (01) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 100, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x34, /* R27[7:0] band12,band11 */
.xtal_cap20p = 0x01, /* R16[1:0] 10pF (01) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 0,
}, {
.freq = 110, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x24, /* R27[7:0] band13,band11 */
.xtal_cap20p = 0x01, /* R16[1:0] 10pF (01) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 1,
}, {
.freq = 120, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x24, /* R27[7:0] band13,band11 */
.xtal_cap20p = 0x01, /* R16[1:0] 10pF (01) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 1,
}, {
.freq = 140, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x14, /* R27[7:0] band14,band11 */
.xtal_cap20p = 0x01, /* R16[1:0] 10pF (01) */
.xtal_cap10p = 0x01,
.xtal_cap0p = 0x00,
.imr_mem = 1,
}, {
.freq = 180, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x13, /* R27[7:0] band14,band12 */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 1,
}, {
.freq = 220, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x13, /* R27[7:0] band14,band12 */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 2,
}, {
.freq = 250, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x11, /* R27[7:0] highest,highest */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 2,
}, {
.freq = 280, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
.tf_c = 0x00, /* R27[7:0] highest,highest */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 2,
}, {
.freq = 310, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x41, /* R26[7:6]=1 (bypass) R26[1:0]=1 (middle) */
.tf_c = 0x00, /* R27[7:0] highest,highest */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 2,
}, {
.freq = 450, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x41, /* R26[7:6]=1 (bypass) R26[1:0]=1 (middle) */
.tf_c = 0x00, /* R27[7:0] highest,highest */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 3,
}, {
.freq = 588, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x40, /* R26[7:6]=1 (bypass) R26[1:0]=0 (highest) */
.tf_c = 0x00, /* R27[7:0] highest,highest */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 3,
}, {
.freq = 650, /* Start freq, in MHz */
.open_d = 0x00, /* high */
.rf_mux_ploy = 0x40, /* R26[7:6]=1 (bypass) R26[1:0]=0 (highest) */
.tf_c = 0x00, /* R27[7:0] highest,highest */
.xtal_cap20p = 0x00, /* R16[1:0] 0pF (00) */
.xtal_cap10p = 0x00,
.xtal_cap0p = 0x00,
.imr_mem = 4,
}
};
static int r820t_xtal_capacitor[][2] = {
{ 0x0b, XTAL_LOW_CAP_30P },
{ 0x02, XTAL_LOW_CAP_20P },
{ 0x01, XTAL_LOW_CAP_10P },
{ 0x00, XTAL_LOW_CAP_0P },
{ 0x10, XTAL_HIGH_CAP_0P },
};
static const char *r820t_chip_enum_to_str(enum r820t_chip chip)
{
switch (chip) {
case CHIP_R820T:
return "R820T";
case CHIP_R620D:
return "R620D";
case CHIP_R828D:
return "R828D";
case CHIP_R828:
return "R828";
case CHIP_R828S:
return "R828S";
case CHIP_R820C:
return "R820C";
default:
return "<unknown>";
}
}
/*
* I2C read/write code and shadow registers logic
*/
static void shadow_store(struct r820t_priv *priv, u8 reg, const u8 *val,
int len)
{
int r = reg - REG_SHADOW_START;
if (r < 0) {
len += r;
r = 0;
}
if (len <= 0)
return;
if (len > NUM_REGS - r)
len = NUM_REGS - r;
tuner_dbg("%s: prev reg=%02x len=%d: %*ph\n",
__func__, r + REG_SHADOW_START, len, len, val);
memcpy(&priv->regs[r], val, len);
}
static int r820t_write(struct r820t_priv *priv, u8 reg, const u8 *val,
int len)
{
int rc, size, pos = 0;
/* Store the shadow registers */
shadow_store(priv, reg, val, len);
do {
if (len > priv->cfg->max_i2c_msg_len - 1)
size = priv->cfg->max_i2c_msg_len - 1;
else
size = len;
/* Fill I2C buffer */
priv->buf[0] = reg;
memcpy(&priv->buf[1], &val[pos], size);
rc = tuner_i2c_xfer_send(&priv->i2c_props, priv->buf, size + 1);
if (rc != size + 1) {
tuner_info("%s: i2c wr failed=%d reg=%02x len=%d: %*ph\n",
__func__, rc, reg, size, size, &priv->buf[1]);
if (rc < 0)
return rc;
return -EREMOTEIO;
}
tuner_dbg("%s: i2c wr reg=%02x len=%d: %*ph\n",
__func__, reg, size, size, &priv->buf[1]);
reg += size;
len -= size;
pos += size;
} while (len > 0);
return 0;
}
static inline int r820t_write_reg(struct r820t_priv *priv, u8 reg, u8 val)
{
u8 tmp = val; /* work around GCC PR81715 with asan-stack=1 */
return r820t_write(priv, reg, &tmp, 1);
}
static int r820t_read_cache_reg(struct r820t_priv *priv, int reg)
{
reg -= REG_SHADOW_START;
if (reg >= 0 && reg < NUM_REGS)
return priv->regs[reg];
else
return -EINVAL;
}
static inline int r820t_write_reg_mask(struct r820t_priv *priv, u8 reg, u8 val,
u8 bit_mask)
{
u8 tmp = val;
int rc = r820t_read_cache_reg(priv, reg);
if (rc < 0)
return rc;
tmp = (rc & ~bit_mask) | (tmp & bit_mask);
return r820t_write(priv, reg, &tmp, 1);
}
static int r820t_read(struct r820t_priv *priv, u8 reg, u8 *val, int len)
{
int rc, i;
u8 *p = &priv->buf[1];
priv->buf[0] = reg;
rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, priv->buf, 1, p, len);
if (rc != len) {
tuner_info("%s: i2c rd failed=%d reg=%02x len=%d: %*ph\n",
__func__, rc, reg, len, len, p);
if (rc < 0)
return rc;
return -EREMOTEIO;
}
/* Copy data to the output buffer */
for (i = 0; i < len; i++)
val[i] = bitrev8(p[i]);
tuner_dbg("%s: i2c rd reg=%02x len=%d: %*ph\n",
__func__, reg, len, len, val);
return 0;
}
/*
* r820t tuning logic
*/
static int r820t_set_mux(struct r820t_priv *priv, u32 freq)
{
const struct r820t_freq_range *range;
int i, rc;
u8 val, reg08, reg09;
/* Get the proper frequency range */
freq = freq / 1000000;
for (i = 0; i < ARRAY_SIZE(freq_ranges) - 1; i++) {
if (freq < freq_ranges[i + 1].freq)
break;
}
range = &freq_ranges[i];
tuner_dbg("set r820t range#%d for frequency %d MHz\n", i, freq);
/* Open Drain */
rc = r820t_write_reg_mask(priv, 0x17, range->open_d, 0x08);
if (rc < 0)
return rc;
/* RF_MUX,Polymux */
rc = r820t_write_reg_mask(priv, 0x1a, range->rf_mux_ploy, 0xc3);
if (rc < 0)
return rc;
/* TF BAND */
rc = r820t_write_reg(priv, 0x1b, range->tf_c);
if (rc < 0)
return rc;
/* XTAL CAP & Drive */
switch (priv->xtal_cap_sel) {
case XTAL_LOW_CAP_30P:
case XTAL_LOW_CAP_20P:
val = range->xtal_cap20p | 0x08;
break;
case XTAL_LOW_CAP_10P:
val = range->xtal_cap10p | 0x08;
break;
case XTAL_HIGH_CAP_0P:
val = range->xtal_cap0p | 0x00;
break;
default:
case XTAL_LOW_CAP_0P:
val = range->xtal_cap0p | 0x08;
break;
}
rc = r820t_write_reg_mask(priv, 0x10, val, 0x0b);
if (rc < 0)
return rc;
if (priv->imr_done) {
reg08 = priv->imr_data[range->imr_mem].gain_x;
reg09 = priv->imr_data[range->imr_mem].phase_y;
} else {
reg08 = 0;
reg09 = 0;
}
rc = r820t_write_reg_mask(priv, 0x08, reg08, 0x3f);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x09, reg09, 0x3f);
return rc;
}
static int r820t_set_pll(struct r820t_priv *priv, enum v4l2_tuner_type type,
u32 freq)
{
u32 vco_freq;
int rc, i;
unsigned sleep_time = 10000;
u32 vco_fra; /* VCO contribution by SDM (kHz) */
u32 vco_min = 1770000;
u32 vco_max = vco_min * 2;
u32 pll_ref;
u16 n_sdm = 2;
u16 sdm = 0;
u8 mix_div = 2;
u8 div_buf = 0;
u8 div_num = 0;
u8 refdiv2 = 0;
u8 ni, si, nint, vco_fine_tune, val;
u8 data[5];
/* Frequency in kHz */
freq = freq / 1000;
pll_ref = priv->cfg->xtal / 1000;
#if 0
/* Doesn't exist on rtl-sdk, and on field tests, caused troubles */
if ((priv->cfg->rafael_chip == CHIP_R620D) ||
(priv->cfg->rafael_chip == CHIP_R828D) ||
(priv->cfg->rafael_chip == CHIP_R828)) {
/* ref set refdiv2, reffreq = Xtal/2 on ATV application */
if (type != V4L2_TUNER_DIGITAL_TV) {
pll_ref /= 2;
refdiv2 = 0x10;
sleep_time = 20000;
}
} else {
if (priv->cfg->xtal > 24000000) {
pll_ref /= 2;
refdiv2 = 0x10;
}
}
#endif
rc = r820t_write_reg_mask(priv, 0x10, refdiv2, 0x10);
if (rc < 0)
return rc;
/* set pll autotune = 128kHz */
rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x0c);
if (rc < 0)
return rc;
/* set VCO current = 100 */
rc = r820t_write_reg_mask(priv, 0x12, 0x80, 0xe0);
if (rc < 0)
return rc;
/* Calculate divider */
while (mix_div <= 64) {
if (((freq * mix_div) >= vco_min) &&
((freq * mix_div) < vco_max)) {
div_buf = mix_div;
while (div_buf > 2) {
div_buf = div_buf >> 1;
div_num++;
}
break;
}
mix_div = mix_div << 1;
}
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
vco_fine_tune = (data[4] & 0x30) >> 4;
tuner_dbg("mix_div=%d div_num=%d vco_fine_tune=%d\n",
mix_div, div_num, vco_fine_tune);
/*
* XXX: R828D/16MHz seems to have always vco_fine_tune=1.
* Due to that, this calculation goes wrong.
*/
if (priv->cfg->rafael_chip != CHIP_R828D) {
if (vco_fine_tune > VCO_POWER_REF)
div_num = div_num - 1;
else if (vco_fine_tune < VCO_POWER_REF)
div_num = div_num + 1;
}
rc = r820t_write_reg_mask(priv, 0x10, div_num << 5, 0xe0);
if (rc < 0)
return rc;
vco_freq = freq * mix_div;
nint = vco_freq / (2 * pll_ref);
vco_fra = vco_freq - 2 * pll_ref * nint;
/* boundary spur prevention */
if (vco_fra < pll_ref / 64) {
vco_fra = 0;
} else if (vco_fra > pll_ref * 127 / 64) {
vco_fra = 0;
nint++;
} else if ((vco_fra > pll_ref * 127 / 128) && (vco_fra < pll_ref)) {
vco_fra = pll_ref * 127 / 128;
} else if ((vco_fra > pll_ref) && (vco_fra < pll_ref * 129 / 128)) {
vco_fra = pll_ref * 129 / 128;
}
ni = (nint - 13) / 4;
si = nint - 4 * ni - 13;
rc = r820t_write_reg(priv, 0x14, ni + (si << 6));
if (rc < 0)
return rc;
/* pw_sdm */
if (!vco_fra)
val = 0x08;
else
val = 0x00;
rc = r820t_write_reg_mask(priv, 0x12, val, 0x08);
if (rc < 0)
return rc;
/* sdm calculator */
while (vco_fra > 1) {
if (vco_fra > (2 * pll_ref / n_sdm)) {
sdm = sdm + 32768 / (n_sdm / 2);
vco_fra = vco_fra - 2 * pll_ref / n_sdm;
if (n_sdm >= 0x8000)
break;
}
n_sdm = n_sdm << 1;
}
tuner_dbg("freq %d kHz, pll ref %d%s, sdm=0x%04x\n",
freq, pll_ref, refdiv2 ? " / 2" : "", sdm);
rc = r820t_write_reg(priv, 0x16, sdm >> 8);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x15, sdm & 0xff);
if (rc < 0)
return rc;
for (i = 0; i < 2; i++) {
usleep_range(sleep_time, sleep_time + 1000);
/* Check if PLL has locked */
rc = r820t_read(priv, 0x00, data, 3);
if (rc < 0)
return rc;
if (data[2] & 0x40)
break;
if (!i) {
/* Didn't lock. Increase VCO current */
rc = r820t_write_reg_mask(priv, 0x12, 0x60, 0xe0);
if (rc < 0)
return rc;
}
}
if (!(data[2] & 0x40)) {
priv->has_lock = false;
return 0;
}
priv->has_lock = true;
tuner_dbg("tuner has lock at frequency %d kHz\n", freq);
/* set pll autotune = 8kHz */
rc = r820t_write_reg_mask(priv, 0x1a, 0x08, 0x08);
return rc;
}
static int r820t_sysfreq_sel(struct r820t_priv *priv, u32 freq,
enum v4l2_tuner_type type,
v4l2_std_id std,
u32 delsys)
{
int rc;
u8 mixer_top, lna_top, cp_cur, div_buf_cur, lna_vth_l, mixer_vth_l;
u8 air_cable1_in, cable2_in, pre_dect, lna_discharge, filter_cur;
tuner_dbg("adjusting tuner parameters for the standard\n");
switch (delsys) {
case SYS_DVBT:
if ((freq == 506000000) || (freq == 666000000) ||
(freq == 818000000)) {
mixer_top = 0x14; /* mixer top:14 , top-1, low-discharge */
lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
cp_cur = 0x28; /* 101, 0.2 */
div_buf_cur = 0x20; /* 10, 200u */
} else {
mixer_top = 0x24; /* mixer top:13 , top-1, low-discharge */
lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
cp_cur = 0x38; /* 111, auto */
div_buf_cur = 0x30; /* 11, 150u */
}
lna_vth_l = 0x53; /* lna vth 0.84 , vtl 0.64 */
mixer_vth_l = 0x75; /* mixer vth 1.04, vtl 0.84 */
air_cable1_in = 0x00;
cable2_in = 0x00;
pre_dect = 0x40;
lna_discharge = 14;
filter_cur = 0x40; /* 10, low */
break;
case SYS_DVBT2:
mixer_top = 0x24; /* mixer top:13 , top-1, low-discharge */
lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
lna_vth_l = 0x53; /* lna vth 0.84 , vtl 0.64 */
mixer_vth_l = 0x75; /* mixer vth 1.04, vtl 0.84 */
air_cable1_in = 0x00;
cable2_in = 0x00;
pre_dect = 0x40;
lna_discharge = 14;
cp_cur = 0x38; /* 111, auto */
div_buf_cur = 0x30; /* 11, 150u */
filter_cur = 0x40; /* 10, low */
break;
case SYS_ISDBT:
mixer_top = 0x24; /* mixer top:13 , top-1, low-discharge */
lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
lna_vth_l = 0x75; /* lna vth 1.04 , vtl 0.84 */
mixer_vth_l = 0x75; /* mixer vth 1.04, vtl 0.84 */
air_cable1_in = 0x00;
cable2_in = 0x00;
pre_dect = 0x40;
lna_discharge = 14;
cp_cur = 0x38; /* 111, auto */
div_buf_cur = 0x30; /* 11, 150u */
filter_cur = 0x40; /* 10, low */
break;
case SYS_DVBC_ANNEX_A:
mixer_top = 0x24; /* mixer top:13 , top-1, low-discharge */
lna_top = 0xe5;
lna_vth_l = 0x62;
mixer_vth_l = 0x75;
air_cable1_in = 0x60;
cable2_in = 0x00;
pre_dect = 0x40;
lna_discharge = 14;
cp_cur = 0x38; /* 111, auto */
div_buf_cur = 0x30; /* 11, 150u */
filter_cur = 0x40; /* 10, low */
break;
default: /* DVB-T 8M */
mixer_top = 0x24; /* mixer top:13 , top-1, low-discharge */
lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
lna_vth_l = 0x53; /* lna vth 0.84 , vtl 0.64 */
mixer_vth_l = 0x75; /* mixer vth 1.04, vtl 0.84 */
air_cable1_in = 0x00;
cable2_in = 0x00;
pre_dect = 0x40;
lna_discharge = 14;
cp_cur = 0x38; /* 111, auto */
div_buf_cur = 0x30; /* 11, 150u */
filter_cur = 0x40; /* 10, low */
break;
}
if (priv->cfg->use_diplexer &&
((priv->cfg->rafael_chip == CHIP_R820T) ||
(priv->cfg->rafael_chip == CHIP_R828S) ||
(priv->cfg->rafael_chip == CHIP_R820C))) {
if (freq > DIP_FREQ)
air_cable1_in = 0x00;
else
air_cable1_in = 0x60;
cable2_in = 0x00;
}
if (priv->cfg->use_predetect) {
rc = r820t_write_reg_mask(priv, 0x06, pre_dect, 0x40);
if (rc < 0)
return rc;
}
rc = r820t_write_reg_mask(priv, 0x1d, lna_top, 0xc7);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0xf8);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x0d, lna_vth_l);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x0e, mixer_vth_l);
if (rc < 0)
return rc;
/* Air-IN only for Astrometa */
rc = r820t_write_reg_mask(priv, 0x05, air_cable1_in, 0x60);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x06, cable2_in, 0x08);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x11, cp_cur, 0x38);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x17, div_buf_cur, 0x30);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x0a, filter_cur, 0x60);
if (rc < 0)
return rc;
/*
* Original driver initializes regs 0x05 and 0x06 with the
* same value again on this point. Probably, it is just an
* error there
*/
/*
* Set LNA
*/
tuner_dbg("adjusting LNA parameters\n");
if (type != V4L2_TUNER_ANALOG_TV) {
/* LNA TOP: lowest */
rc = r820t_write_reg_mask(priv, 0x1d, 0, 0x38);
if (rc < 0)
return rc;
/* 0: normal mode */
rc = r820t_write_reg_mask(priv, 0x1c, 0, 0x04);
if (rc < 0)
return rc;
/* 0: PRE_DECT off */
rc = r820t_write_reg_mask(priv, 0x06, 0, 0x40);
if (rc < 0)
return rc;
/* agc clk 250hz */
rc = r820t_write_reg_mask(priv, 0x1a, 0x30, 0x30);
if (rc < 0)
return rc;
msleep(250);
/* write LNA TOP = 3 */
rc = r820t_write_reg_mask(priv, 0x1d, 0x18, 0x38);
if (rc < 0)
return rc;
/*
* write discharge mode
* FIXME: IMHO, the mask here is wrong, but it matches
* what's there at the original driver
*/
rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0x04);
if (rc < 0)
return rc;
/* LNA discharge current */
rc = r820t_write_reg_mask(priv, 0x1e, lna_discharge, 0x1f);
if (rc < 0)
return rc;
/* agc clk 60hz */
rc = r820t_write_reg_mask(priv, 0x1a, 0x20, 0x30);
if (rc < 0)
return rc;
} else {
/* PRE_DECT off */
rc = r820t_write_reg_mask(priv, 0x06, 0, 0x40);
if (rc < 0)
return rc;
/* write LNA TOP */
rc = r820t_write_reg_mask(priv, 0x1d, lna_top, 0x38);
if (rc < 0)
return rc;
/*
* write discharge mode
* FIXME: IMHO, the mask here is wrong, but it matches
* what's there at the original driver
*/
rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0x04);
if (rc < 0)
return rc;
/* LNA discharge current */
rc = r820t_write_reg_mask(priv, 0x1e, lna_discharge, 0x1f);
if (rc < 0)
return rc;
/* agc clk 1Khz, external det1 cap 1u */
rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x30);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x10, 0x00, 0x04);
if (rc < 0)
return rc;
}
return 0;
}
static int r820t_set_tv_standard(struct r820t_priv *priv,
unsigned bw,
enum v4l2_tuner_type type,
v4l2_std_id std, u32 delsys)
{
int rc, i;
u32 if_khz, filt_cal_lo;
u8 data[5], val;
u8 filt_gain, img_r, filt_q, hp_cor, ext_enable, loop_through;
u8 lt_att, flt_ext_widest, polyfil_cur;
bool need_calibration;
tuner_dbg("selecting the delivery system\n");
if (delsys == SYS_ISDBT) {
if_khz = 4063;
filt_cal_lo = 59000;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x6a; /* 1.7m disable, +2cap, 1.25mhz */
ext_enable = 0x40; /* r30[6], ext enable; r30[5]:0 ext at lna max */
loop_through = 0x00; /* r5[7], lt on */
lt_att = 0x00; /* r31[7], lt att enable */
flt_ext_widest = 0x80; /* r15[7]: flt_ext_wide on */
polyfil_cur = 0x60; /* r25[6:5]:min */
} else if (delsys == SYS_DVBC_ANNEX_A) {
if_khz = 5070;
filt_cal_lo = 73500;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x0b; /* 1.7m disable, +0cap, 1.0mhz */
ext_enable = 0x40; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
loop_through = 0x00; /* r5[7], lt on */
lt_att = 0x00; /* r31[7], lt att enable */
flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
polyfil_cur = 0x60; /* r25[6:5]:min */
} else if (delsys == SYS_DVBC_ANNEX_C) {
if_khz = 4063;
filt_cal_lo = 55000;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x6a; /* 1.7m disable, +0cap, 1.0mhz */
ext_enable = 0x40; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
loop_through = 0x00; /* r5[7], lt on */
lt_att = 0x00; /* r31[7], lt att enable */
flt_ext_widest = 0x80; /* r15[7]: flt_ext_wide on */
polyfil_cur = 0x60; /* r25[6:5]:min */
} else {
if (bw <= 6) {
if_khz = 3570;
filt_cal_lo = 56000; /* 52000->56000 */
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x6b; /* 1.7m disable, +2cap, 1.0mhz */
ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
loop_through = 0x00; /* r5[7], lt on */
lt_att = 0x00; /* r31[7], lt att enable */
flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
polyfil_cur = 0x60; /* r25[6:5]:min */
} else if (bw == 7) {
#if 0
/*
* There are two 7 MHz tables defined on the original
* driver, but just the second one seems to be visible
* by rtl2832. Keep this one here commented, as it
* might be needed in the future
*/
if_khz = 4070;
filt_cal_lo = 60000;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x2b; /* 1.7m disable, +1cap, 1.0mhz */
ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
loop_through = 0x00; /* r5[7], lt on */
lt_att = 0x00; /* r31[7], lt att enable */
flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
polyfil_cur = 0x60; /* r25[6:5]:min */
#endif
/* 7 MHz, second table */
if_khz = 4570;
filt_cal_lo = 63000;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x2a; /* 1.7m disable, +1cap, 1.25mhz */
ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
loop_through = 0x00; /* r5[7], lt on */
lt_att = 0x00; /* r31[7], lt att enable */
flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
polyfil_cur = 0x60; /* r25[6:5]:min */
} else {
if_khz = 4570;
filt_cal_lo = 68500;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x0b; /* 1.7m disable, +0cap, 1.0mhz */
ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
loop_through = 0x00; /* r5[7], lt on */
lt_att = 0x00; /* r31[7], lt att enable */
flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
polyfil_cur = 0x60; /* r25[6:5]:min */
}
}
/* Initialize the shadow registers */
memcpy(priv->regs, r820t_init_array, sizeof(r820t_init_array));
/* Init Flag & Xtal_check Result */
if (priv->imr_done)
val = 1 | priv->xtal_cap_sel << 1;
else
val = 0;
rc = r820t_write_reg_mask(priv, 0x0c, val, 0x0f);
if (rc < 0)
return rc;
/* version */
rc = r820t_write_reg_mask(priv, 0x13, VER_NUM, 0x3f);
if (rc < 0)
return rc;
/* for LT Gain test */
if (type != V4L2_TUNER_ANALOG_TV) {
rc = r820t_write_reg_mask(priv, 0x1d, 0x00, 0x38);
if (rc < 0)
return rc;
usleep_range(1000, 2000);
}
priv->int_freq = if_khz * 1000;
/* Check if standard changed. If so, filter calibration is needed */
if (type != priv->type)
need_calibration = true;
else if ((type == V4L2_TUNER_ANALOG_TV) && (std != priv->std))
need_calibration = true;
else if ((type == V4L2_TUNER_DIGITAL_TV) &&
((delsys != priv->delsys) || bw != priv->bw))
need_calibration = true;
else
need_calibration = false;
if (need_calibration) {
tuner_dbg("calibrating the tuner\n");
for (i = 0; i < 2; i++) {
/* Set filt_cap */
rc = r820t_write_reg_mask(priv, 0x0b, hp_cor, 0x60);
if (rc < 0)
return rc;
/* set cali clk =on */
rc = r820t_write_reg_mask(priv, 0x0f, 0x04, 0x04);
if (rc < 0)
return rc;
/* X'tal cap 0pF for PLL */
rc = r820t_write_reg_mask(priv, 0x10, 0x00, 0x03);
if (rc < 0)
return rc;
rc = r820t_set_pll(priv, type, filt_cal_lo * 1000);
if (rc < 0 || !priv->has_lock)
return rc;
/* Start Trigger */
rc = r820t_write_reg_mask(priv, 0x0b, 0x10, 0x10);
if (rc < 0)
return rc;
usleep_range(1000, 2000);
/* Stop Trigger */
rc = r820t_write_reg_mask(priv, 0x0b, 0x00, 0x10);
if (rc < 0)
return rc;
/* set cali clk =off */
rc = r820t_write_reg_mask(priv, 0x0f, 0x00, 0x04);
if (rc < 0)
return rc;
/* Check if calibration worked */
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
priv->fil_cal_code = data[4] & 0x0f;
if (priv->fil_cal_code && priv->fil_cal_code != 0x0f)
break;
}
/* narrowest */
if (priv->fil_cal_code == 0x0f)
priv->fil_cal_code = 0;
}
rc = r820t_write_reg_mask(priv, 0x0a,
filt_q | priv->fil_cal_code, 0x1f);
if (rc < 0)
return rc;
/* Set BW, Filter_gain, & HP corner */
rc = r820t_write_reg_mask(priv, 0x0b, hp_cor, 0xef);
if (rc < 0)
return rc;
/* Set Img_R */
rc = r820t_write_reg_mask(priv, 0x07, img_r, 0x80);
if (rc < 0)
return rc;
/* Set filt_3dB, V6MHz */
rc = r820t_write_reg_mask(priv, 0x06, filt_gain, 0x30);
if (rc < 0)
return rc;
/* channel filter extension */
rc = r820t_write_reg_mask(priv, 0x1e, ext_enable, 0x60);
if (rc < 0)
return rc;
/* Loop through */
rc = r820t_write_reg_mask(priv, 0x05, loop_through, 0x80);
if (rc < 0)
return rc;
/* Loop through attenuation */
rc = r820t_write_reg_mask(priv, 0x1f, lt_att, 0x80);
if (rc < 0)
return rc;
/* filter extension widest */
rc = r820t_write_reg_mask(priv, 0x0f, flt_ext_widest, 0x80);
if (rc < 0)
return rc;
/* RF poly filter current */
rc = r820t_write_reg_mask(priv, 0x19, polyfil_cur, 0x60);
if (rc < 0)
return rc;
/* Store current standard. If it changes, re-calibrate the tuner */
priv->delsys = delsys;
priv->type = type;
priv->std = std;
priv->bw = bw;
return 0;
}
static int r820t_read_gain(struct r820t_priv *priv)
{
u8 data[4];
int rc;
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
return ((data[3] & 0x08) << 1) + ((data[3] & 0xf0) >> 4);
}
#if 0
/* FIXME: This routine requires more testing */
/*
* measured with a Racal 6103E GSM test set at 928 MHz with -60 dBm
* input power, for raw results see:
* http://steve-m.de/projects/rtl-sdr/gain_measurement/r820t/
*/
static const int r820t_lna_gain_steps[] = {
0, 9, 13, 40, 38, 13, 31, 22, 26, 31, 26, 14, 19, 5, 35, 13
};
static const int r820t_mixer_gain_steps[] = {
0, 5, 10, 10, 19, 9, 10, 25, 17, 10, 8, 16, 13, 6, 3, -8
};
static int r820t_set_gain_mode(struct r820t_priv *priv,
bool set_manual_gain,
int gain)
{
int rc;
if (set_manual_gain) {
int i, total_gain = 0;
uint8_t mix_index = 0, lna_index = 0;
u8 data[4];
/* LNA auto off */
rc = r820t_write_reg_mask(priv, 0x05, 0x10, 0x10);
if (rc < 0)
return rc;
/* Mixer auto off */
rc = r820t_write_reg_mask(priv, 0x07, 0, 0x10);
if (rc < 0)
return rc;
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
/* set fixed VGA gain for now (16.3 dB) */
rc = r820t_write_reg_mask(priv, 0x0c, 0x08, 0x9f);
if (rc < 0)
return rc;
for (i = 0; i < 15; i++) {
if (total_gain >= gain)
break;
total_gain += r820t_lna_gain_steps[++lna_index];
if (total_gain >= gain)
break;
total_gain += r820t_mixer_gain_steps[++mix_index];
}
/* set LNA gain */
rc = r820t_write_reg_mask(priv, 0x05, lna_index, 0x0f);
if (rc < 0)
return rc;
/* set Mixer gain */
rc = r820t_write_reg_mask(priv, 0x07, mix_index, 0x0f);
if (rc < 0)
return rc;
} else {
/* LNA */
rc = r820t_write_reg_mask(priv, 0x05, 0, 0x10);
if (rc < 0)
return rc;
/* Mixer */
rc = r820t_write_reg_mask(priv, 0x07, 0x10, 0x10);
if (rc < 0)
return rc;
/* set fixed VGA gain for now (26.5 dB) */
rc = r820t_write_reg_mask(priv, 0x0c, 0x0b, 0x9f);
if (rc < 0)
return rc;
}
return 0;
}
#endif
static int generic_set_freq(struct dvb_frontend *fe,
u32 freq /* in HZ */,
unsigned bw,
enum v4l2_tuner_type type,
v4l2_std_id std, u32 delsys)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc;
u32 lo_freq;
tuner_dbg("should set frequency to %d kHz, bw %d MHz\n",
freq / 1000, bw);
rc = r820t_set_tv_standard(priv, bw, type, std, delsys);
if (rc < 0)
goto err;
if ((type == V4L2_TUNER_ANALOG_TV) && (std == V4L2_STD_SECAM_LC))
lo_freq = freq - priv->int_freq;
else
lo_freq = freq + priv->int_freq;
rc = r820t_set_mux(priv, lo_freq);
if (rc < 0)
goto err;
rc = r820t_set_pll(priv, type, lo_freq);
if (rc < 0 || !priv->has_lock)
goto err;
rc = r820t_sysfreq_sel(priv, freq, type, std, delsys);
if (rc < 0)
goto err;
tuner_dbg("%s: PLL locked on frequency %d Hz, gain=%d\n",
__func__, freq, r820t_read_gain(priv));
err:
if (rc < 0)
tuner_dbg("%s: failed=%d\n", __func__, rc);
return rc;
}
/*
* r820t standby logic
*/
static int r820t_standby(struct r820t_priv *priv)
{
int rc;
/* If device was not initialized yet, don't need to standby */
if (!priv->init_done)
return 0;
rc = r820t_write_reg(priv, 0x06, 0xb1);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x05, 0x03);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x07, 0x3a);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x08, 0x40);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x09, 0xc0);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x0a, 0x36);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x0c, 0x35);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x0f, 0x68);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x11, 0x03);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x17, 0xf4);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x19, 0x0c);
/* Force initial calibration */
priv->type = -1;
return rc;
}
/*
* r820t device init logic
*/
static int r820t_xtal_check(struct r820t_priv *priv)
{
int rc, i;
u8 data[3], val;
/* Initialize the shadow registers */
memcpy(priv->regs, r820t_init_array, sizeof(r820t_init_array));
/* cap 30pF & Drive Low */
rc = r820t_write_reg_mask(priv, 0x10, 0x0b, 0x0b);
if (rc < 0)
return rc;
/* set pll autotune = 128kHz */
rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x0c);
if (rc < 0)
return rc;
/* set manual initial reg = 111111; */
rc = r820t_write_reg_mask(priv, 0x13, 0x7f, 0x7f);
if (rc < 0)
return rc;
/* set auto */
rc = r820t_write_reg_mask(priv, 0x13, 0x00, 0x40);
if (rc < 0)
return rc;
/* Try several xtal capacitor alternatives */
for (i = 0; i < ARRAY_SIZE(r820t_xtal_capacitor); i++) {
rc = r820t_write_reg_mask(priv, 0x10,
r820t_xtal_capacitor[i][0], 0x1b);
if (rc < 0)
return rc;
usleep_range(5000, 6000);
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
if (!(data[2] & 0x40))
continue;
val = data[2] & 0x3f;
if (priv->cfg->xtal == 16000000 && (val > 29 || val < 23))
break;
if (val != 0x3f)
break;
}
if (i == ARRAY_SIZE(r820t_xtal_capacitor))
return -EINVAL;
return r820t_xtal_capacitor[i][1];
}
static int r820t_imr_prepare(struct r820t_priv *priv)
{
int rc;
/* Initialize the shadow registers */
memcpy(priv->regs, r820t_init_array, sizeof(r820t_init_array));
/* lna off (air-in off) */
rc = r820t_write_reg_mask(priv, 0x05, 0x20, 0x20);
if (rc < 0)
return rc;
/* mixer gain mode = manual */
rc = r820t_write_reg_mask(priv, 0x07, 0, 0x10);
if (rc < 0)
return rc;
/* filter corner = lowest */
rc = r820t_write_reg_mask(priv, 0x0a, 0x0f, 0x0f);
if (rc < 0)
return rc;
/* filter bw=+2cap, hp=5M */
rc = r820t_write_reg_mask(priv, 0x0b, 0x60, 0x6f);
if (rc < 0)
return rc;
/* adc=on, vga code mode, gain = 26.5dB */
rc = r820t_write_reg_mask(priv, 0x0c, 0x0b, 0x9f);
if (rc < 0)
return rc;
/* ring clk = on */
rc = r820t_write_reg_mask(priv, 0x0f, 0, 0x08);
if (rc < 0)
return rc;
/* ring power = on */
rc = r820t_write_reg_mask(priv, 0x18, 0x10, 0x10);
if (rc < 0)
return rc;
/* from ring = ring pll in */
rc = r820t_write_reg_mask(priv, 0x1c, 0x02, 0x02);
if (rc < 0)
return rc;
/* sw_pdect = det3 */
rc = r820t_write_reg_mask(priv, 0x1e, 0x80, 0x80);
if (rc < 0)
return rc;
/* Set filt_3dB */
rc = r820t_write_reg_mask(priv, 0x06, 0x20, 0x20);
return rc;
}
static int r820t_multi_read(struct r820t_priv *priv)
{
int rc, i;
u16 sum = 0;
u8 data[2], min = 255, max = 0;
usleep_range(5000, 6000);
for (i = 0; i < 6; i++) {
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
sum += data[1];
if (data[1] < min)
min = data[1];
if (data[1] > max)
max = data[1];
}
rc = sum - max - min;
return rc;
}
static int r820t_imr_cross(struct r820t_priv *priv,
struct r820t_sect_type iq_point[3],
u8 *x_direct)
{
struct r820t_sect_type cross[5]; /* (0,0)(0,Q-1)(0,I-1)(Q-1,0)(I-1,0) */
struct r820t_sect_type tmp;
int i, rc;
u8 reg08, reg09;
reg08 = r820t_read_cache_reg(priv, 8) & 0xc0;
reg09 = r820t_read_cache_reg(priv, 9) & 0xc0;
tmp.gain_x = 0;
tmp.phase_y = 0;
tmp.value = 255;
for (i = 0; i < 5; i++) {
switch (i) {
case 0:
cross[i].gain_x = reg08;
cross[i].phase_y = reg09;
break;
case 1:
cross[i].gain_x = reg08; /* 0 */
cross[i].phase_y = reg09 + 1; /* Q-1 */
break;
case 2:
cross[i].gain_x = reg08; /* 0 */
cross[i].phase_y = (reg09 | 0x20) + 1; /* I-1 */
break;
case 3:
cross[i].gain_x = reg08 + 1; /* Q-1 */
cross[i].phase_y = reg09;
break;
default:
cross[i].gain_x = (reg08 | 0x20) + 1; /* I-1 */
cross[i].phase_y = reg09;
}
rc = r820t_write_reg(priv, 0x08, cross[i].gain_x);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x09, cross[i].phase_y);
if (rc < 0)
return rc;
rc = r820t_multi_read(priv);
if (rc < 0)
return rc;
cross[i].value = rc;
if (cross[i].value < tmp.value)
tmp = cross[i];
}
if ((tmp.phase_y & 0x1f) == 1) { /* y-direction */
*x_direct = 0;
iq_point[0] = cross[0];
iq_point[1] = cross[1];
iq_point[2] = cross[2];
} else { /* (0,0) or x-direction */
*x_direct = 1;
iq_point[0] = cross[0];
iq_point[1] = cross[3];
iq_point[2] = cross[4];
}
return 0;
}
static void r820t_compre_cor(struct r820t_sect_type iq[3])
{
int i;
for (i = 3; i > 0; i--) {
if (iq[0].value > iq[i - 1].value)
swap(iq[0], iq[i - 1]);
}
}
static int r820t_compre_step(struct r820t_priv *priv,
struct r820t_sect_type iq[3], u8 reg)
{
int rc;
struct r820t_sect_type tmp;
/*
* Purpose: if (Gain<9 or Phase<9), Gain+1 or Phase+1 and compare
* with min value:
* new < min => update to min and continue
* new > min => Exit
*/
/* min value already saved in iq[0] */
tmp.phase_y = iq[0].phase_y;
tmp.gain_x = iq[0].gain_x;
while (((tmp.gain_x & 0x1f) < IMR_TRIAL) &&
((tmp.phase_y & 0x1f) < IMR_TRIAL)) {
if (reg == 0x08)
tmp.gain_x++;
else
tmp.phase_y++;
rc = r820t_write_reg(priv, 0x08, tmp.gain_x);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x09, tmp.phase_y);
if (rc < 0)
return rc;
rc = r820t_multi_read(priv);
if (rc < 0)
return rc;
tmp.value = rc;
if (tmp.value <= iq[0].value) {
iq[0].gain_x = tmp.gain_x;
iq[0].phase_y = tmp.phase_y;
iq[0].value = tmp.value;
} else {
return 0;
}
}
return 0;
}
static int r820t_iq_tree(struct r820t_priv *priv,
struct r820t_sect_type iq[3],
u8 fix_val, u8 var_val, u8 fix_reg)
{
int rc, i;
u8 tmp, var_reg;
/*
* record IMC results by input gain/phase location then adjust
* gain or phase positive 1 step and negative 1 step,
* both record results
*/
if (fix_reg == 0x08)
var_reg = 0x09;
else
var_reg = 0x08;
for (i = 0; i < 3; i++) {
rc = r820t_write_reg(priv, fix_reg, fix_val);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, var_reg, var_val);
if (rc < 0)
return rc;
rc = r820t_multi_read(priv);
if (rc < 0)
return rc;
iq[i].value = rc;
if (fix_reg == 0x08) {
iq[i].gain_x = fix_val;
iq[i].phase_y = var_val;
} else {
iq[i].phase_y = fix_val;
iq[i].gain_x = var_val;
}
if (i == 0) { /* try right-side point */
var_val++;
} else if (i == 1) { /* try left-side point */
/* if absolute location is 1, change I/Q direction */
if ((var_val & 0x1f) < 0x02) {
tmp = 2 - (var_val & 0x1f);
/* b[5]:I/Q selection. 0:Q-path, 1:I-path */
if (var_val & 0x20) {
var_val &= 0xc0;
var_val |= tmp;
} else {
var_val |= 0x20 | tmp;
}
} else {
var_val -= 2;
}
}
}
return 0;
}
static int r820t_section(struct r820t_priv *priv,
struct r820t_sect_type *iq_point)
{
int rc;
struct r820t_sect_type compare_iq[3], compare_bet[3];
/* Try X-1 column and save min result to compare_bet[0] */
if (!(iq_point->gain_x & 0x1f))
compare_iq[0].gain_x = ((iq_point->gain_x) & 0xdf) + 1; /* Q-path, Gain=1 */
else
compare_iq[0].gain_x = iq_point->gain_x - 1; /* left point */
compare_iq[0].phase_y = iq_point->phase_y;
/* y-direction */
rc = r820t_iq_tree(priv, compare_iq, compare_iq[0].gain_x,
compare_iq[0].phase_y, 0x08);
if (rc < 0)
return rc;
r820t_compre_cor(compare_iq);
compare_bet[0] = compare_iq[0];
/* Try X column and save min result to compare_bet[1] */
compare_iq[0].gain_x = iq_point->gain_x;
compare_iq[0].phase_y = iq_point->phase_y;
rc = r820t_iq_tree(priv, compare_iq, compare_iq[0].gain_x,
compare_iq[0].phase_y, 0x08);
if (rc < 0)
return rc;
r820t_compre_cor(compare_iq);
compare_bet[1] = compare_iq[0];
/* Try X+1 column and save min result to compare_bet[2] */
if ((iq_point->gain_x & 0x1f) == 0x00)
compare_iq[0].gain_x = ((iq_point->gain_x) | 0x20) + 1; /* I-path, Gain=1 */
else
compare_iq[0].gain_x = iq_point->gain_x + 1;
compare_iq[0].phase_y = iq_point->phase_y;
rc = r820t_iq_tree(priv, compare_iq, compare_iq[0].gain_x,
compare_iq[0].phase_y, 0x08);
if (rc < 0)
return rc;
r820t_compre_cor(compare_iq);
compare_bet[2] = compare_iq[0];
r820t_compre_cor(compare_bet);
*iq_point = compare_bet[0];
return 0;
}
static int r820t_vga_adjust(struct r820t_priv *priv)
{
int rc;
u8 vga_count;
/* increase vga power to let image significant */
for (vga_count = 12; vga_count < 16; vga_count++) {
rc = r820t_write_reg_mask(priv, 0x0c, vga_count, 0x0f);
if (rc < 0)
return rc;
usleep_range(10000, 11000);
rc = r820t_multi_read(priv);
if (rc < 0)
return rc;
if (rc > 40 * 4)
break;
}
return 0;
}
static int r820t_iq(struct r820t_priv *priv, struct r820t_sect_type *iq_pont)
{
struct r820t_sect_type compare_iq[3];
int rc;
u8 x_direction = 0; /* 1:x, 0:y */
u8 dir_reg, other_reg;
r820t_vga_adjust(priv);
rc = r820t_imr_cross(priv, compare_iq, &x_direction);
if (rc < 0)
return rc;
if (x_direction == 1) {
dir_reg = 0x08;
other_reg = 0x09;
} else {
dir_reg = 0x09;
other_reg = 0x08;
}
/* compare and find min of 3 points. determine i/q direction */
r820t_compre_cor(compare_iq);
/* increase step to find min value of this direction */
rc = r820t_compre_step(priv, compare_iq, dir_reg);
if (rc < 0)
return rc;
/* the other direction */
rc = r820t_iq_tree(priv, compare_iq, compare_iq[0].gain_x,
compare_iq[0].phase_y, dir_reg);
if (rc < 0)
return rc;
/* compare and find min of 3 points. determine i/q direction */
r820t_compre_cor(compare_iq);
/* increase step to find min value on this direction */
rc = r820t_compre_step(priv, compare_iq, other_reg);
if (rc < 0)
return rc;
/* check 3 points again */
rc = r820t_iq_tree(priv, compare_iq, compare_iq[0].gain_x,
compare_iq[0].phase_y, other_reg);
if (rc < 0)
return rc;
r820t_compre_cor(compare_iq);
/* section-9 check */
rc = r820t_section(priv, compare_iq);
*iq_pont = compare_iq[0];
/* reset gain/phase control setting */
rc = r820t_write_reg_mask(priv, 0x08, 0, 0x3f);
if (rc < 0)
return rc;
rc = r820t_write_reg_mask(priv, 0x09, 0, 0x3f);
return rc;
}
static int r820t_f_imr(struct r820t_priv *priv, struct r820t_sect_type *iq_pont)
{
int rc;
r820t_vga_adjust(priv);
/*
* search surrounding points from previous point
* try (x-1), (x), (x+1) columns, and find min IMR result point
*/
rc = r820t_section(priv, iq_pont);
if (rc < 0)
return rc;
return 0;
}
static int r820t_imr(struct r820t_priv *priv, unsigned imr_mem, bool im_flag)
{
struct r820t_sect_type imr_point;
int rc;
u32 ring_vco, ring_freq, ring_ref;
u8 n_ring, n;
int reg18, reg19, reg1f;
if (priv->cfg->xtal > 24000000)
ring_ref = priv->cfg->xtal / 2000;
else
ring_ref = priv->cfg->xtal / 1000;
n_ring = 15;
for (n = 0; n < 16; n++) {
if ((16 + n) * 8 * ring_ref >= 3100000) {
n_ring = n;
break;
}
}
reg18 = r820t_read_cache_reg(priv, 0x18);
reg19 = r820t_read_cache_reg(priv, 0x19);
reg1f = r820t_read_cache_reg(priv, 0x1f);
reg18 &= 0xf0; /* set ring[3:0] */
reg18 |= n_ring;
ring_vco = (16 + n_ring) * 8 * ring_ref;
reg18 &= 0xdf; /* clear ring_se23 */
reg19 &= 0xfc; /* clear ring_seldiv */
reg1f &= 0xfc; /* clear ring_att */
switch (imr_mem) {
case 0:
ring_freq = ring_vco / 48;
reg18 |= 0x20; /* ring_se23 = 1 */
reg19 |= 0x03; /* ring_seldiv = 3 */
reg1f |= 0x02; /* ring_att 10 */
break;
case 1:
ring_freq = ring_vco / 16;
reg18 |= 0x00; /* ring_se23 = 0 */
reg19 |= 0x02; /* ring_seldiv = 2 */
reg1f |= 0x00; /* pw_ring 00 */
break;
case 2:
ring_freq = ring_vco / 8;
reg18 |= 0x00; /* ring_se23 = 0 */
reg19 |= 0x01; /* ring_seldiv = 1 */
reg1f |= 0x03; /* pw_ring 11 */
break;
case 3:
ring_freq = ring_vco / 6;
reg18 |= 0x20; /* ring_se23 = 1 */
reg19 |= 0x00; /* ring_seldiv = 0 */
reg1f |= 0x03; /* pw_ring 11 */
break;
case 4:
ring_freq = ring_vco / 4;
reg18 |= 0x00; /* ring_se23 = 0 */
reg19 |= 0x00; /* ring_seldiv = 0 */
reg1f |= 0x01; /* pw_ring 01 */
break;
default:
ring_freq = ring_vco / 4;
reg18 |= 0x00; /* ring_se23 = 0 */
reg19 |= 0x00; /* ring_seldiv = 0 */
reg1f |= 0x01; /* pw_ring 01 */
break;
}
/* write pw_ring, n_ring, ringdiv2 registers */
/* n_ring, ring_se23 */
rc = r820t_write_reg(priv, 0x18, reg18);
if (rc < 0)
return rc;
/* ring_sediv */
rc = r820t_write_reg(priv, 0x19, reg19);
if (rc < 0)
return rc;
/* pw_ring */
rc = r820t_write_reg(priv, 0x1f, reg1f);
if (rc < 0)
return rc;
/* mux input freq ~ rf_in freq */
rc = r820t_set_mux(priv, (ring_freq - 5300) * 1000);
if (rc < 0)
return rc;
rc = r820t_set_pll(priv, V4L2_TUNER_DIGITAL_TV,
(ring_freq - 5300) * 1000);
if (!priv->has_lock)
rc = -EINVAL;
if (rc < 0)
return rc;
if (im_flag) {
rc = r820t_iq(priv, &imr_point);
} else {
imr_point.gain_x = priv->imr_data[3].gain_x;
imr_point.phase_y = priv->imr_data[3].phase_y;
imr_point.value = priv->imr_data[3].value;
rc = r820t_f_imr(priv, &imr_point);
}
if (rc < 0)
return rc;
/* save IMR value */
switch (imr_mem) {
case 0:
priv->imr_data[0].gain_x = imr_point.gain_x;
priv->imr_data[0].phase_y = imr_point.phase_y;
priv->imr_data[0].value = imr_point.value;
break;
case 1:
priv->imr_data[1].gain_x = imr_point.gain_x;
priv->imr_data[1].phase_y = imr_point.phase_y;
priv->imr_data[1].value = imr_point.value;
break;
case 2:
priv->imr_data[2].gain_x = imr_point.gain_x;
priv->imr_data[2].phase_y = imr_point.phase_y;
priv->imr_data[2].value = imr_point.value;
break;
case 3:
priv->imr_data[3].gain_x = imr_point.gain_x;
priv->imr_data[3].phase_y = imr_point.phase_y;
priv->imr_data[3].value = imr_point.value;
break;
case 4:
priv->imr_data[4].gain_x = imr_point.gain_x;
priv->imr_data[4].phase_y = imr_point.phase_y;
priv->imr_data[4].value = imr_point.value;
break;
default:
priv->imr_data[4].gain_x = imr_point.gain_x;
priv->imr_data[4].phase_y = imr_point.phase_y;
priv->imr_data[4].value = imr_point.value;
break;
}
return 0;
}
static int r820t_imr_callibrate(struct r820t_priv *priv)
{
int rc, i;
int xtal_cap = 0;
if (priv->init_done)
return 0;
/* Detect Xtal capacitance */
if ((priv->cfg->rafael_chip == CHIP_R820T) ||
(priv->cfg->rafael_chip == CHIP_R828S) ||
(priv->cfg->rafael_chip == CHIP_R820C)) {
priv->xtal_cap_sel = XTAL_HIGH_CAP_0P;
} else {
/* Initialize registers */
rc = r820t_write(priv, 0x05,
r820t_init_array, sizeof(r820t_init_array));
if (rc < 0)
return rc;
for (i = 0; i < 3; i++) {
rc = r820t_xtal_check(priv);
if (rc < 0)
return rc;
if (!i || rc > xtal_cap)
xtal_cap = rc;
}
priv->xtal_cap_sel = xtal_cap;
}
/*
* Disables IMR calibration. That emulates the same behaviour
* as what is done by rtl-sdr userspace library. Useful for testing
*/
if (no_imr_cal) {
priv->init_done = true;
return 0;
}
/* Initialize registers */
rc = r820t_write(priv, 0x05,
r820t_init_array, sizeof(r820t_init_array));
if (rc < 0)
return rc;
rc = r820t_imr_prepare(priv);
if (rc < 0)
return rc;
rc = r820t_imr(priv, 3, true);
if (rc < 0)
return rc;
rc = r820t_imr(priv, 1, false);
if (rc < 0)
return rc;
rc = r820t_imr(priv, 0, false);
if (rc < 0)
return rc;
rc = r820t_imr(priv, 2, false);
if (rc < 0)
return rc;
rc = r820t_imr(priv, 4, false);
if (rc < 0)
return rc;
priv->init_done = true;
priv->imr_done = true;
return 0;
}
#if 0
/* Not used, for now */
static int r820t_gpio(struct r820t_priv *priv, bool enable)
{
return r820t_write_reg_mask(priv, 0x0f, enable ? 1 : 0, 0x01);
}
#endif
/*
* r820t frontend operations and tuner attach code
*
* All driver locks and i2c control are only in this part of the code
*/
static int r820t_init(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc;
tuner_dbg("%s:\n", __func__);
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
rc = r820t_imr_callibrate(priv);
if (rc < 0)
goto err;
/* Initialize registers */
rc = r820t_write(priv, 0x05,
r820t_init_array, sizeof(r820t_init_array));
err:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
mutex_unlock(&priv->lock);
if (rc < 0)
tuner_dbg("%s: failed=%d\n", __func__, rc);
return rc;
}
static int r820t_sleep(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc;
tuner_dbg("%s:\n", __func__);
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
rc = r820t_standby(priv);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
mutex_unlock(&priv->lock);
tuner_dbg("%s: failed=%d\n", __func__, rc);
return rc;
}
static int r820t_set_analog_freq(struct dvb_frontend *fe,
struct analog_parameters *p)
{
struct r820t_priv *priv = fe->tuner_priv;
unsigned bw;
int rc;
tuner_dbg("%s called\n", __func__);
/* if std is not defined, choose one */
if (!p->std)
p->std = V4L2_STD_MN;
if ((p->std == V4L2_STD_PAL_M) || (p->std == V4L2_STD_NTSC))
bw = 6;
else
bw = 8;
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
rc = generic_set_freq(fe, 62500l * p->frequency, bw,
V4L2_TUNER_ANALOG_TV, p->std, SYS_UNDEFINED);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
mutex_unlock(&priv->lock);
return rc;
}
static int r820t_set_params(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int rc;
unsigned bw;
tuner_dbg("%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n",
__func__, c->delivery_system, c->frequency, c->bandwidth_hz);
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
bw = (c->bandwidth_hz + 500000) / 1000000;
if (!bw)
bw = 8;
rc = generic_set_freq(fe, c->frequency, bw,
V4L2_TUNER_DIGITAL_TV, 0, c->delivery_system);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
mutex_unlock(&priv->lock);
if (rc)
tuner_dbg("%s: failed=%d\n", __func__, rc);
return rc;
}
static int r820t_signal(struct dvb_frontend *fe, u16 *strength)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc = 0;
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
if (priv->has_lock) {
rc = r820t_read_gain(priv);
if (rc < 0)
goto err;
/* A higher gain at LNA means a lower signal strength */
*strength = (45 - rc) << 4 | 0xff;
if (*strength == 0xff)
*strength = 0;
} else {
*strength = 0;
}
err:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
mutex_unlock(&priv->lock);
tuner_dbg("%s: %s, gain=%d strength=%d\n",
__func__,
priv->has_lock ? "PLL locked" : "no signal",
rc, *strength);
return 0;
}
static int r820t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct r820t_priv *priv = fe->tuner_priv;
tuner_dbg("%s:\n", __func__);
*frequency = priv->int_freq;
return 0;
}
static void r820t_release(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
tuner_dbg("%s:\n", __func__);
mutex_lock(&r820t_list_mutex);
if (priv)
hybrid_tuner_release_state(priv);
mutex_unlock(&r820t_list_mutex);
fe->tuner_priv = NULL;
}
static const struct dvb_tuner_ops r820t_tuner_ops = {
.info = {
.name = "Rafael Micro R820T",
.frequency_min_hz = 42 * MHz,
.frequency_max_hz = 1002 * MHz,
},
.init = r820t_init,
.release = r820t_release,
.sleep = r820t_sleep,
.set_params = r820t_set_params,
.set_analog_params = r820t_set_analog_freq,
.get_if_frequency = r820t_get_if_frequency,
.get_rf_strength = r820t_signal,
};
struct dvb_frontend *r820t_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
const struct r820t_config *cfg)
{
struct r820t_priv *priv;
int rc = -ENODEV;
u8 data[5];
int instance;
mutex_lock(&r820t_list_mutex);
instance = hybrid_tuner_request_state(struct r820t_priv, priv,
hybrid_tuner_instance_list,
i2c, cfg->i2c_addr,
"r820t");
switch (instance) {
case 0:
/* memory allocation failure */
goto err_no_gate;
case 1:
/* new tuner instance */
priv->cfg = cfg;
mutex_init(&priv->lock);
fe->tuner_priv = priv;
break;
case 2:
/* existing tuner instance */
fe->tuner_priv = priv;
break;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
/* check if the tuner is there */
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
goto err;
rc = r820t_sleep(fe);
if (rc < 0)
goto err;
tuner_info(
"Rafael Micro r820t successfully identified, chip type: %s\n",
r820t_chip_enum_to_str(cfg->rafael_chip));
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
mutex_unlock(&r820t_list_mutex);
memcpy(&fe->ops.tuner_ops, &r820t_tuner_ops,
sizeof(struct dvb_tuner_ops));
return fe;
err:
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
err_no_gate:
mutex_unlock(&r820t_list_mutex);
pr_info("%s: failed=%d\n", __func__, rc);
r820t_release(fe);
return NULL;
}
EXPORT_SYMBOL_GPL(r820t_attach);
MODULE_DESCRIPTION("Rafael Micro r820t silicon tuner driver");
MODULE_AUTHOR("Mauro Carvalho Chehab");
MODULE_LICENSE("GPL v2");
| linux-master | drivers/media/tuners/r820t.c |
// SPDX-License-Identifier: GPL-2.0
// xc2028
//
// Copyright (c) 2007-2008 Mauro Carvalho Chehab <[email protected]>
//
// Copyright (c) 2007 Michel Ludwig ([email protected])
// - frontend interface
#include <linux/i2c.h>
#include <asm/div64.h>
#include <linux/firmware.h>
#include <linux/videodev2.h>
#include <linux/delay.h>
#include <media/tuner.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <asm/unaligned.h>
#include "tuner-i2c.h"
#include "xc2028.h"
#include "xc2028-types.h"
#include <linux/dvb/frontend.h>
#include <media/dvb_frontend.h>
/* Max transfer size done by I2C transfer functions */
#define MAX_XFER_SIZE 80
/* Registers (Write-only) */
#define XREG_INIT 0x00
#define XREG_RF_FREQ 0x02
#define XREG_POWER_DOWN 0x08
/* Registers (Read-only) */
#define XREG_FREQ_ERROR 0x01
#define XREG_LOCK 0x02
#define XREG_VERSION 0x04
#define XREG_PRODUCT_ID 0x08
#define XREG_HSYNC_FREQ 0x10
#define XREG_FRAME_LINES 0x20
#define XREG_SNR 0x40
#define XREG_ADC_ENV 0x0100
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable verbose debug messages");
static int no_poweroff;
module_param(no_poweroff, int, 0644);
MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
"1 keep device energized and with tuner ready all the times.\n"
" Faster, but consumes more power and keeps the device hotter\n");
static char audio_std[8];
module_param_string(audio_std, audio_std, sizeof(audio_std), 0);
MODULE_PARM_DESC(audio_std,
"Audio standard. XC3028 audio decoder explicitly needs to know what audio\n"
"standard is needed for some video standards with audio A2 or NICAM.\n"
"The valid values are:\n"
"A2\n"
"A2/A\n"
"A2/B\n"
"NICAM\n"
"NICAM/A\n"
"NICAM/B\n");
static char firmware_name[30];
module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
MODULE_PARM_DESC(firmware_name,
"Firmware file name. Allows overriding the default firmware name\n");
static LIST_HEAD(hybrid_tuner_instance_list);
static DEFINE_MUTEX(xc2028_list_mutex);
/* struct for storing firmware table */
struct firmware_description {
unsigned int type;
v4l2_std_id id;
__u16 int_freq;
unsigned char *ptr;
unsigned int size;
};
struct firmware_properties {
unsigned int type;
v4l2_std_id id;
v4l2_std_id std_req;
__u16 int_freq;
unsigned int scode_table;
int scode_nr;
};
enum xc2028_state {
XC2028_NO_FIRMWARE = 0,
XC2028_WAITING_FIRMWARE,
XC2028_ACTIVE,
XC2028_SLEEP,
XC2028_NODEV,
};
struct xc2028_data {
struct list_head hybrid_tuner_instance_list;
struct tuner_i2c_props i2c_props;
__u32 frequency;
enum xc2028_state state;
const char *fname;
struct firmware_description *firm;
int firm_size;
__u16 firm_version;
__u16 hwmodel;
__u16 hwvers;
struct xc2028_ctrl ctrl;
struct firmware_properties cur_fw;
struct mutex lock;
};
#define i2c_send(priv, buf, size) ({ \
int _rc; \
_rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \
if (size != _rc) \
tuner_info("i2c output error: rc = %d (should be %d)\n",\
_rc, (int)size); \
if (priv->ctrl.msleep) \
msleep(priv->ctrl.msleep); \
_rc; \
})
#define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \
int _rc; \
_rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \
ibuf, isize); \
if (isize != _rc) \
tuner_err("i2c input error: rc = %d (should be %d)\n", \
_rc, (int)isize); \
if (priv->ctrl.msleep) \
msleep(priv->ctrl.msleep); \
_rc; \
})
#define send_seq(priv, data...) ({ \
static u8 _val[] = data; \
int _rc; \
if (sizeof(_val) != \
(_rc = tuner_i2c_xfer_send(&priv->i2c_props, \
_val, sizeof(_val)))) { \
tuner_err("Error on line %d: %d\n", __LINE__, _rc); \
} else if (priv->ctrl.msleep) \
msleep(priv->ctrl.msleep); \
_rc; \
})
static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val)
{
unsigned char buf[2];
unsigned char ibuf[2];
tuner_dbg("%s %04x called\n", __func__, reg);
buf[0] = reg >> 8;
buf[1] = (unsigned char) reg;
if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2)
return -EIO;
*val = (ibuf[1]) | (ibuf[0] << 8);
return 0;
}
#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0)
static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
{
if (type & BASE)
printk(KERN_CONT "BASE ");
if (type & INIT1)
printk(KERN_CONT "INIT1 ");
if (type & F8MHZ)
printk(KERN_CONT "F8MHZ ");
if (type & MTS)
printk(KERN_CONT "MTS ");
if (type & D2620)
printk(KERN_CONT "D2620 ");
if (type & D2633)
printk(KERN_CONT "D2633 ");
if (type & DTV6)
printk(KERN_CONT "DTV6 ");
if (type & QAM)
printk(KERN_CONT "QAM ");
if (type & DTV7)
printk(KERN_CONT "DTV7 ");
if (type & DTV78)
printk(KERN_CONT "DTV78 ");
if (type & DTV8)
printk(KERN_CONT "DTV8 ");
if (type & FM)
printk(KERN_CONT "FM ");
if (type & INPUT1)
printk(KERN_CONT "INPUT1 ");
if (type & LCD)
printk(KERN_CONT "LCD ");
if (type & NOGD)
printk(KERN_CONT "NOGD ");
if (type & MONO)
printk(KERN_CONT "MONO ");
if (type & ATSC)
printk(KERN_CONT "ATSC ");
if (type & IF)
printk(KERN_CONT "IF ");
if (type & LG60)
printk(KERN_CONT "LG60 ");
if (type & ATI638)
printk(KERN_CONT "ATI638 ");
if (type & OREN538)
printk(KERN_CONT "OREN538 ");
if (type & OREN36)
printk(KERN_CONT "OREN36 ");
if (type & TOYOTA388)
printk(KERN_CONT "TOYOTA388 ");
if (type & TOYOTA794)
printk(KERN_CONT "TOYOTA794 ");
if (type & DIBCOM52)
printk(KERN_CONT "DIBCOM52 ");
if (type & ZARLINK456)
printk(KERN_CONT "ZARLINK456 ");
if (type & CHINA)
printk(KERN_CONT "CHINA ");
if (type & F6MHZ)
printk(KERN_CONT "F6MHZ ");
if (type & INPUT2)
printk(KERN_CONT "INPUT2 ");
if (type & SCODE)
printk(KERN_CONT "SCODE ");
if (type & HAS_IF)
printk(KERN_CONT "HAS_IF_%d ", int_freq);
}
static v4l2_std_id parse_audio_std_option(void)
{
if (strcasecmp(audio_std, "A2") == 0)
return V4L2_STD_A2;
if (strcasecmp(audio_std, "A2/A") == 0)
return V4L2_STD_A2_A;
if (strcasecmp(audio_std, "A2/B") == 0)
return V4L2_STD_A2_B;
if (strcasecmp(audio_std, "NICAM") == 0)
return V4L2_STD_NICAM;
if (strcasecmp(audio_std, "NICAM/A") == 0)
return V4L2_STD_NICAM_A;
if (strcasecmp(audio_std, "NICAM/B") == 0)
return V4L2_STD_NICAM_B;
return 0;
}
static int check_device_status(struct xc2028_data *priv)
{
switch (priv->state) {
case XC2028_NO_FIRMWARE:
case XC2028_WAITING_FIRMWARE:
return -EAGAIN;
case XC2028_ACTIVE:
return 1;
case XC2028_SLEEP:
return 0;
case XC2028_NODEV:
return -ENODEV;
}
return 0;
}
static void free_firmware(struct xc2028_data *priv)
{
int i;
tuner_dbg("%s called\n", __func__);
/* free allocated f/w string */
if (priv->fname != firmware_name)
kfree(priv->fname);
priv->fname = NULL;
priv->state = XC2028_NO_FIRMWARE;
memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
if (!priv->firm)
return;
for (i = 0; i < priv->firm_size; i++)
kfree(priv->firm[i].ptr);
kfree(priv->firm);
priv->firm = NULL;
priv->firm_size = 0;
}
static int load_all_firmwares(struct dvb_frontend *fe,
const struct firmware *fw)
{
struct xc2028_data *priv = fe->tuner_priv;
const unsigned char *p, *endp;
int rc = 0;
int n, n_array;
char name[33];
tuner_dbg("%s called\n", __func__);
p = fw->data;
endp = p + fw->size;
if (fw->size < sizeof(name) - 1 + 2 + 2) {
tuner_err("Error: firmware file %s has invalid size!\n",
priv->fname);
goto corrupt;
}
memcpy(name, p, sizeof(name) - 1);
name[sizeof(name) - 1] = 0;
p += sizeof(name) - 1;
priv->firm_version = get_unaligned_le16(p);
p += 2;
n_array = get_unaligned_le16(p);
p += 2;
tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n",
n_array, priv->fname, name,
priv->firm_version >> 8, priv->firm_version & 0xff);
priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
if (priv->firm == NULL) {
tuner_err("Not enough memory to load firmware file.\n");
rc = -ENOMEM;
goto err;
}
priv->firm_size = n_array;
n = -1;
while (p < endp) {
__u32 type, size;
v4l2_std_id id;
__u16 int_freq = 0;
n++;
if (n >= n_array) {
tuner_err("More firmware images in file than were expected!\n");
goto corrupt;
}
/* Checks if there's enough bytes to read */
if (endp - p < sizeof(type) + sizeof(id) + sizeof(size))
goto header;
type = get_unaligned_le32(p);
p += sizeof(type);
id = get_unaligned_le64(p);
p += sizeof(id);
if (type & HAS_IF) {
int_freq = get_unaligned_le16(p);
p += sizeof(int_freq);
if (endp - p < sizeof(size))
goto header;
}
size = get_unaligned_le32(p);
p += sizeof(size);
if (!size || size > endp - p) {
tuner_err("Firmware type ");
dump_firm_type(type);
printk(KERN_CONT
"(%x), id %llx is corrupted (size=%zd, expected %d)\n",
type, (unsigned long long)id, (endp - p), size);
goto corrupt;
}
priv->firm[n].ptr = kmemdup(p, size, GFP_KERNEL);
if (priv->firm[n].ptr == NULL) {
tuner_err("Not enough memory to load firmware file.\n");
rc = -ENOMEM;
goto err;
}
tuner_dbg("Reading firmware type ");
if (debug) {
dump_firm_type_and_int_freq(type, int_freq);
printk(KERN_CONT "(%x), id %llx, size=%d.\n",
type, (unsigned long long)id, size);
}
priv->firm[n].type = type;
priv->firm[n].id = id;
priv->firm[n].size = size;
priv->firm[n].int_freq = int_freq;
p += size;
}
if (n + 1 != priv->firm_size) {
tuner_err("Firmware file is incomplete!\n");
goto corrupt;
}
goto done;
header:
tuner_err("Firmware header is incomplete!\n");
corrupt:
rc = -EINVAL;
tuner_err("Error: firmware file is corrupted!\n");
err:
tuner_info("Releasing partially loaded firmware file.\n");
free_firmware(priv);
done:
if (rc == 0)
tuner_dbg("Firmware files loaded.\n");
else
priv->state = XC2028_NODEV;
return rc;
}
static int seek_firmware(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id *id)
{
struct xc2028_data *priv = fe->tuner_priv;
int i, best_i = -1, best_nr_matches = 0;
unsigned int type_mask = 0;
tuner_dbg("%s called, want type=", __func__);
if (debug) {
dump_firm_type(type);
printk(KERN_CONT "(%x), id %016llx.\n",
type, (unsigned long long)*id);
}
if (!priv->firm) {
tuner_err("Error! firmware not loaded\n");
return -EINVAL;
}
if (((type & ~SCODE) == 0) && (*id == 0))
*id = V4L2_STD_PAL;
if (type & BASE)
type_mask = BASE_TYPES;
else if (type & SCODE) {
type &= SCODE_TYPES;
type_mask = SCODE_TYPES & ~HAS_IF;
} else if (type & DTV_TYPES)
type_mask = DTV_TYPES;
else if (type & STD_SPECIFIC_TYPES)
type_mask = STD_SPECIFIC_TYPES;
type &= type_mask;
if (!(type & SCODE))
type_mask = ~0;
/* Seek for exact match */
for (i = 0; i < priv->firm_size; i++) {
if ((type == (priv->firm[i].type & type_mask)) &&
(*id == priv->firm[i].id))
goto found;
}
/* Seek for generic video standard match */
for (i = 0; i < priv->firm_size; i++) {
v4l2_std_id match_mask;
int nr_matches;
if (type != (priv->firm[i].type & type_mask))
continue;
match_mask = *id & priv->firm[i].id;
if (!match_mask)
continue;
if ((*id & match_mask) == *id)
goto found; /* Supports all the requested standards */
nr_matches = hweight64(match_mask);
if (nr_matches > best_nr_matches) {
best_nr_matches = nr_matches;
best_i = i;
}
}
if (best_nr_matches > 0) {
tuner_dbg("Selecting best matching firmware (%d bits) for type=",
best_nr_matches);
dump_firm_type(type);
printk(KERN_CONT
"(%x), id %016llx:\n", type, (unsigned long long)*id);
i = best_i;
goto found;
}
/*FIXME: Would make sense to seek for type "hint" match ? */
i = -ENOENT;
goto ret;
found:
*id = priv->firm[i].id;
ret:
tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found");
if (debug) {
dump_firm_type(type);
printk(KERN_CONT "(%x), id %016llx.\n",
type, (unsigned long long)*id);
}
return i;
}
static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg)
{
struct xc2028_data *priv = fe->tuner_priv;
/* analog side (tuner-core) uses i2c_adap->algo_data.
* digital side is not guaranteed to have algo_data defined.
*
* digital side will always have fe->dvb defined.
* analog side (tuner-core) doesn't (yet) define fe->dvb.
*/
return (!fe->callback) ? -EINVAL :
fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
fe->dvb->priv : priv->i2c_props.adap->algo_data,
DVB_FRONTEND_COMPONENT_TUNER, cmd, arg);
}
static int load_firmware(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id *id)
{
struct xc2028_data *priv = fe->tuner_priv;
int pos, rc;
unsigned char *p, *endp, buf[MAX_XFER_SIZE];
if (priv->ctrl.max_len > sizeof(buf))
priv->ctrl.max_len = sizeof(buf);
tuner_dbg("%s called\n", __func__);
pos = seek_firmware(fe, type, id);
if (pos < 0)
return pos;
tuner_info("Loading firmware for type=");
dump_firm_type(priv->firm[pos].type);
printk(KERN_CONT "(%x), id %016llx.\n",
priv->firm[pos].type, (unsigned long long)*id);
p = priv->firm[pos].ptr;
endp = p + priv->firm[pos].size;
while (p < endp) {
__u16 size;
/* Checks if there's enough bytes to read */
if (p + sizeof(size) > endp) {
tuner_err("Firmware chunk size is wrong\n");
return -EINVAL;
}
size = le16_to_cpu(*(__le16 *) p);
p += sizeof(size);
if (size == 0xffff)
return 0;
if (!size) {
/* Special callback command received */
rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
if (rc < 0) {
tuner_err("Error at RESET code %d\n",
(*p) & 0x7f);
return -EINVAL;
}
continue;
}
if (size >= 0xff00) {
switch (size) {
case 0xff00:
rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0);
if (rc < 0) {
tuner_err("Error at RESET code %d\n",
(*p) & 0x7f);
return -EINVAL;
}
break;
default:
tuner_info("Invalid RESET code %d\n",
size & 0x7f);
return -EINVAL;
}
continue;
}
/* Checks for a sleep command */
if (size & 0x8000) {
msleep(size & 0x7fff);
continue;
}
if ((size + p > endp)) {
tuner_err("missing bytes: need %d, have %zd\n",
size, (endp - p));
return -EINVAL;
}
buf[0] = *p;
p++;
size--;
/* Sends message chunks */
while (size > 0) {
int len = (size < priv->ctrl.max_len - 1) ?
size : priv->ctrl.max_len - 1;
memcpy(buf + 1, p, len);
rc = i2c_send(priv, buf, len + 1);
if (rc < 0) {
tuner_err("%d returned from send\n", rc);
return -EINVAL;
}
p += len;
size -= len;
}
/* silently fail if the frontend doesn't support I2C flush */
rc = do_tuner_callback(fe, XC2028_I2C_FLUSH, 0);
if ((rc < 0) && (rc != -EINVAL)) {
tuner_err("error executing flush: %d\n", rc);
return rc;
}
}
return 0;
}
static int load_scode(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id *id, __u16 int_freq, int scode)
{
struct xc2028_data *priv = fe->tuner_priv;
int pos, rc;
unsigned char *p;
tuner_dbg("%s called\n", __func__);
if (!int_freq) {
pos = seek_firmware(fe, type, id);
if (pos < 0)
return pos;
} else {
for (pos = 0; pos < priv->firm_size; pos++) {
if ((priv->firm[pos].int_freq == int_freq) &&
(priv->firm[pos].type & HAS_IF))
break;
}
if (pos == priv->firm_size)
return -ENOENT;
}
p = priv->firm[pos].ptr;
if (priv->firm[pos].type & HAS_IF) {
if (priv->firm[pos].size != 12 * 16 || scode >= 16)
return -EINVAL;
p += 12 * scode;
} else {
/* 16 SCODE entries per file; each SCODE entry is 12 bytes and
* has a 2-byte size header in the firmware format. */
if (priv->firm[pos].size != 14 * 16 || scode >= 16 ||
le16_to_cpu(*(__le16 *)(p + 14 * scode)) != 12)
return -EINVAL;
p += 14 * scode + 2;
}
tuner_info("Loading SCODE for type=");
dump_firm_type_and_int_freq(priv->firm[pos].type,
priv->firm[pos].int_freq);
printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type,
(unsigned long long)*id);
if (priv->firm_version < 0x0202)
rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00});
else
rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00});
if (rc < 0)
return -EIO;
rc = i2c_send(priv, p, 12);
if (rc < 0)
return -EIO;
rc = send_seq(priv, {0x00, 0x8c});
if (rc < 0)
return -EIO;
return 0;
}
static int xc2028_sleep(struct dvb_frontend *fe);
static int check_firmware(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id std, __u16 int_freq)
{
struct xc2028_data *priv = fe->tuner_priv;
struct firmware_properties new_fw;
int rc, retry_count = 0;
u16 version, hwmodel;
v4l2_std_id std0;
tuner_dbg("%s called\n", __func__);
rc = check_device_status(priv);
if (rc < 0)
return rc;
if (priv->ctrl.mts && !(type & FM))
type |= MTS;
retry:
new_fw.type = type;
new_fw.id = std;
new_fw.std_req = std;
new_fw.scode_table = SCODE | priv->ctrl.scode_table;
new_fw.scode_nr = 0;
new_fw.int_freq = int_freq;
tuner_dbg("checking firmware, user requested type=");
if (debug) {
dump_firm_type(new_fw.type);
printk(KERN_CONT "(%x), id %016llx, ", new_fw.type,
(unsigned long long)new_fw.std_req);
if (!int_freq) {
printk(KERN_CONT "scode_tbl ");
dump_firm_type(priv->ctrl.scode_table);
printk(KERN_CONT "(%x), ", priv->ctrl.scode_table);
} else
printk(KERN_CONT "int_freq %d, ", new_fw.int_freq);
printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr);
}
/*
* No need to reload base firmware if it matches and if the tuner
* is not at sleep mode
*/
if ((priv->state == XC2028_ACTIVE) &&
(((BASE | new_fw.type) & BASE_TYPES) ==
(priv->cur_fw.type & BASE_TYPES))) {
tuner_dbg("BASE firmware not changed.\n");
goto skip_base;
}
/* Updating BASE - forget about all currently loaded firmware */
memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
/* Reset is needed before loading firmware */
rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
if (rc < 0)
goto fail;
/* BASE firmwares are all std0 */
std0 = 0;
rc = load_firmware(fe, BASE | new_fw.type, &std0);
if (rc < 0) {
tuner_err("Error %d while loading base firmware\n",
rc);
goto fail;
}
/* Load INIT1, if needed */
tuner_dbg("Load init1 firmware, if exists\n");
rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0);
if (rc == -ENOENT)
rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ,
&std0);
if (rc < 0 && rc != -ENOENT) {
tuner_err("Error %d while loading init1 firmware\n",
rc);
goto fail;
}
skip_base:
/*
* No need to reload standard specific firmware if base firmware
* was not reloaded and requested video standards have not changed.
*/
if (priv->cur_fw.type == (BASE | new_fw.type) &&
priv->cur_fw.std_req == std) {
tuner_dbg("Std-specific firmware already loaded.\n");
goto skip_std_specific;
}
/* Reloading std-specific firmware forces a SCODE update */
priv->cur_fw.scode_table = 0;
rc = load_firmware(fe, new_fw.type, &new_fw.id);
if (rc == -ENOENT)
rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id);
if (rc < 0)
goto fail;
skip_std_specific:
if (priv->cur_fw.scode_table == new_fw.scode_table &&
priv->cur_fw.scode_nr == new_fw.scode_nr) {
tuner_dbg("SCODE firmware already loaded.\n");
goto check_device;
}
if (new_fw.type & FM)
goto check_device;
/* Load SCODE firmware, if exists */
tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr);
rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id,
new_fw.int_freq, new_fw.scode_nr);
check_device:
if (xc2028_get_reg(priv, 0x0004, &version) < 0 ||
xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) {
tuner_err("Unable to read tuner registers.\n");
goto fail;
}
tuner_dbg("Device is Xceive %d version %d.%d, firmware version %d.%d\n",
hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8,
(version & 0xf0) >> 4, version & 0xf);
if (priv->ctrl.read_not_reliable)
goto read_not_reliable;
/* Check firmware version against what we downloaded. */
if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) {
if (!priv->ctrl.read_not_reliable) {
tuner_err("Incorrect readback of firmware version.\n");
goto fail;
} else {
tuner_err("Returned an incorrect version. However, read is not reliable enough. Ignoring it.\n");
hwmodel = 3028;
}
}
/* Check that the tuner hardware model remains consistent over time. */
if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) {
priv->hwmodel = hwmodel;
priv->hwvers = version & 0xff00;
} else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel ||
priv->hwvers != (version & 0xff00)) {
tuner_err("Read invalid device hardware information - tuner hung?\n");
goto fail;
}
read_not_reliable:
priv->cur_fw = new_fw;
/*
* By setting BASE in cur_fw.type only after successfully loading all
* firmwares, we can:
* 1. Identify that BASE firmware with type=0 has been loaded;
* 2. Tell whether BASE firmware was just changed the next time through.
*/
priv->cur_fw.type |= BASE;
priv->state = XC2028_ACTIVE;
return 0;
fail:
free_firmware(priv);
if (retry_count < 8) {
msleep(50);
retry_count++;
tuner_dbg("Retrying firmware load\n");
goto retry;
}
/* Firmware didn't load. Put the device to sleep */
xc2028_sleep(fe);
if (rc == -ENOENT)
rc = -EINVAL;
return rc;
}
static int xc2028_signal(struct dvb_frontend *fe, u16 *strength)
{
struct xc2028_data *priv = fe->tuner_priv;
u16 frq_lock, signal = 0;
int rc, i;
tuner_dbg("%s called\n", __func__);
rc = check_device_status(priv);
if (rc < 0)
return rc;
/* If the device is sleeping, no channel is tuned */
if (!rc) {
*strength = 0;
return 0;
}
mutex_lock(&priv->lock);
/* Sync Lock Indicator */
for (i = 0; i < 3; i++) {
rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
if (rc < 0)
goto ret;
if (frq_lock)
break;
msleep(6);
}
/* Frequency didn't lock */
if (frq_lock == 2)
goto ret;
/* Get SNR of the video signal */
rc = xc2028_get_reg(priv, XREG_SNR, &signal);
if (rc < 0)
goto ret;
/* Signal level is 3 bits only */
signal = ((1 << 12) - 1) | ((signal & 0x07) << 12);
ret:
mutex_unlock(&priv->lock);
*strength = signal;
tuner_dbg("signal strength is %d\n", signal);
return rc;
}
static int xc2028_get_afc(struct dvb_frontend *fe, s32 *afc)
{
struct xc2028_data *priv = fe->tuner_priv;
int i, rc;
u16 frq_lock = 0;
s16 afc_reg = 0;
rc = check_device_status(priv);
if (rc < 0)
return rc;
/* If the device is sleeping, no channel is tuned */
if (!rc) {
*afc = 0;
return 0;
}
mutex_lock(&priv->lock);
/* Sync Lock Indicator */
for (i = 0; i < 3; i++) {
rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
if (rc < 0)
goto ret;
if (frq_lock)
break;
msleep(6);
}
/* Frequency didn't lock */
if (frq_lock == 2)
goto ret;
/* Get AFC */
rc = xc2028_get_reg(priv, XREG_FREQ_ERROR, &afc_reg);
if (rc < 0)
goto ret;
*afc = afc_reg * 15625; /* Hz */
tuner_dbg("AFC is %d Hz\n", *afc);
ret:
mutex_unlock(&priv->lock);
return rc;
}
#define DIV 15625
static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */,
enum v4l2_tuner_type new_type,
unsigned int type,
v4l2_std_id std,
u16 int_freq)
{
struct xc2028_data *priv = fe->tuner_priv;
int rc = -EINVAL;
unsigned char buf[4];
u32 div, offset = 0;
tuner_dbg("%s called\n", __func__);
mutex_lock(&priv->lock);
tuner_dbg("should set frequency %d kHz\n", freq / 1000);
if (check_firmware(fe, type, std, int_freq) < 0)
goto ret;
/* On some cases xc2028 can disable video output, if
* very weak signals are received. By sending a soft
* reset, this is re-enabled. So, it is better to always
* send a soft reset before changing channels, to be sure
* that xc2028 will be in a safe state.
* Maybe this might also be needed for DTV.
*/
switch (new_type) {
case V4L2_TUNER_ANALOG_TV:
rc = send_seq(priv, {0x00, 0x00});
/* Analog mode requires offset = 0 */
break;
case V4L2_TUNER_RADIO:
/* Radio mode requires offset = 0 */
break;
case V4L2_TUNER_DIGITAL_TV:
/*
* Digital modes require an offset to adjust to the
* proper frequency. The offset depends on what
* firmware version is used.
*/
/*
* Adjust to the center frequency. This is calculated by the
* formula: offset = 1.25MHz - BW/2
* For DTV 7/8, the firmware uses BW = 8000, so it needs a
* further adjustment to get the frequency center on VHF
*/
/*
* The firmware DTV78 used to work fine in UHF band (8 MHz
* bandwidth) but not at all in VHF band (7 MHz bandwidth).
* The real problem was connected to the formula used to
* calculate the center frequency offset in VHF band.
* In fact, removing the 500KHz adjustment fixed the problem.
* This is coherent to what was implemented for the DTV7
* firmware.
* In the end, now the center frequency is the same for all 3
* firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel
* bandwidth.
*/
if (priv->cur_fw.type & DTV6)
offset = 1750000;
else /* DTV7 or DTV8 or DTV78 */
offset = 2750000;
/*
* xc3028 additional "magic"
* Depending on the firmware version, it needs some adjustments
* to properly centralize the frequency. This seems to be
* needed to compensate the SCODE table adjustments made by
* newer firmwares
*/
/*
* The proper adjustment would be to do it at s-code table.
* However, this didn't work, as reported by
* Robert Lowery <[email protected]>
*/
#if 0
/*
* Still need tests for XC3028L (firmware 3.2 or upper)
* So, for now, let's just comment the per-firmware
* version of this change. Reports with xc3028l working
* with and without the lines below are welcome
*/
if (priv->firm_version < 0x0302) {
if (priv->cur_fw.type & DTV7)
offset += 500000;
} else {
if (priv->cur_fw.type & DTV7)
offset -= 300000;
else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */
offset += 200000;
}
#endif
break;
default:
tuner_err("Unsupported tuner type %d.\n", new_type);
break;
}
div = (freq - offset + DIV / 2) / DIV;
/* CMD= Set frequency */
if (priv->firm_version < 0x0202)
rc = send_seq(priv, {0x00, XREG_RF_FREQ, 0x00, 0x00});
else
rc = send_seq(priv, {0x80, XREG_RF_FREQ, 0x00, 0x00});
if (rc < 0)
goto ret;
/* Return code shouldn't be checked.
The reset CLK is needed only with tm6000.
Driver should work fine even if this fails.
*/
if (priv->ctrl.msleep)
msleep(priv->ctrl.msleep);
do_tuner_callback(fe, XC2028_RESET_CLK, 1);
msleep(10);
buf[0] = 0xff & (div >> 24);
buf[1] = 0xff & (div >> 16);
buf[2] = 0xff & (div >> 8);
buf[3] = 0xff & (div);
rc = i2c_send(priv, buf, sizeof(buf));
if (rc < 0)
goto ret;
msleep(100);
priv->frequency = freq;
tuner_dbg("divisor= %*ph (freq=%d.%03d)\n", 4, buf,
freq / 1000000, (freq % 1000000) / 1000);
rc = 0;
ret:
mutex_unlock(&priv->lock);
return rc;
}
static int xc2028_set_analog_freq(struct dvb_frontend *fe,
struct analog_parameters *p)
{
struct xc2028_data *priv = fe->tuner_priv;
unsigned int type=0;
tuner_dbg("%s called\n", __func__);
if (p->mode == V4L2_TUNER_RADIO) {
type |= FM;
if (priv->ctrl.input1)
type |= INPUT1;
return generic_set_freq(fe, (625l * p->frequency) / 10,
V4L2_TUNER_RADIO, type, 0, 0);
}
/* if std is not defined, choose one */
if (!p->std)
p->std = V4L2_STD_MN;
/* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */
if (!(p->std & V4L2_STD_MN))
type |= F8MHZ;
/* Add audio hack to std mask */
p->std |= parse_audio_std_option();
return generic_set_freq(fe, 62500l * p->frequency,
V4L2_TUNER_ANALOG_TV, type, p->std, 0);
}
static int xc2028_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 delsys = c->delivery_system;
u32 bw = c->bandwidth_hz;
struct xc2028_data *priv = fe->tuner_priv;
int rc;
unsigned int type = 0;
u16 demod = 0;
tuner_dbg("%s called\n", __func__);
rc = check_device_status(priv);
if (rc < 0)
return rc;
switch (delsys) {
case SYS_DVBT:
case SYS_DVBT2:
/*
* The only countries with 6MHz seem to be Taiwan/Uruguay.
* Both seem to require QAM firmware for OFDM decoding
* Tested in Taiwan by Terry Wu <[email protected]>
*/
if (bw <= 6000000)
type |= QAM;
switch (priv->ctrl.type) {
case XC2028_D2633:
type |= D2633;
break;
case XC2028_D2620:
type |= D2620;
break;
case XC2028_AUTO:
default:
/* Zarlink seems to need D2633 */
if (priv->ctrl.demod == XC3028_FE_ZARLINK456)
type |= D2633;
else
type |= D2620;
}
break;
case SYS_ATSC:
/* The only ATSC firmware (at least on v2.7) is D2633 */
type |= ATSC | D2633;
break;
/* DVB-S and pure QAM (FE_QAM) are not supported */
default:
return -EINVAL;
}
if (bw <= 6000000) {
type |= DTV6;
priv->ctrl.vhfbw7 = 0;
priv->ctrl.uhfbw8 = 0;
} else if (bw <= 7000000) {
if (c->frequency < 470000000)
priv->ctrl.vhfbw7 = 1;
else
priv->ctrl.uhfbw8 = 0;
type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7;
type |= F8MHZ;
} else {
if (c->frequency < 470000000)
priv->ctrl.vhfbw7 = 0;
else
priv->ctrl.uhfbw8 = 1;
type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8;
type |= F8MHZ;
}
/* All S-code tables need a 200kHz shift */
if (priv->ctrl.demod) {
demod = priv->ctrl.demod;
/*
* Newer firmwares require a 200 kHz offset only for ATSC
*/
if (type == ATSC || priv->firm_version < 0x0302)
demod += 200;
/*
* The DTV7 S-code table needs a 700 kHz shift.
*
* DTV7 is only used in Australia. Germany or Italy may also
* use this firmware after initialization, but a tune to a UHF
* channel should then cause DTV78 to be used.
*
* Unfortunately, on real-field tests, the s-code offset
* didn't work as expected, as reported by
* Robert Lowery <[email protected]>
*/
}
return generic_set_freq(fe, c->frequency,
V4L2_TUNER_DIGITAL_TV, type, 0, demod);
}
static int xc2028_sleep(struct dvb_frontend *fe)
{
struct xc2028_data *priv = fe->tuner_priv;
int rc;
rc = check_device_status(priv);
if (rc < 0)
return rc;
/* Device is already in sleep mode */
if (!rc)
return 0;
/* Avoid firmware reload on slow devices or if PM disabled */
if (no_poweroff || priv->ctrl.disable_power_mgmt)
return 0;
tuner_dbg("Putting xc2028/3028 into poweroff mode.\n");
if (debug > 1) {
tuner_dbg("Printing sleep stack trace:\n");
dump_stack();
}
mutex_lock(&priv->lock);
if (priv->firm_version < 0x0202)
rc = send_seq(priv, {0x00, XREG_POWER_DOWN, 0x00, 0x00});
else
rc = send_seq(priv, {0x80, XREG_POWER_DOWN, 0x00, 0x00});
if (rc >= 0)
priv->state = XC2028_SLEEP;
mutex_unlock(&priv->lock);
return rc;
}
static void xc2028_dvb_release(struct dvb_frontend *fe)
{
struct xc2028_data *priv = fe->tuner_priv;
tuner_dbg("%s called\n", __func__);
mutex_lock(&xc2028_list_mutex);
/* only perform final cleanup if this is the last instance */
if (hybrid_tuner_report_instance_count(priv) == 1)
free_firmware(priv);
if (priv)
hybrid_tuner_release_state(priv);
mutex_unlock(&xc2028_list_mutex);
fe->tuner_priv = NULL;
}
static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct xc2028_data *priv = fe->tuner_priv;
int rc;
tuner_dbg("%s called\n", __func__);
rc = check_device_status(priv);
if (rc < 0)
return rc;
*frequency = priv->frequency;
return 0;
}
static void load_firmware_cb(const struct firmware *fw,
void *context)
{
struct dvb_frontend *fe = context;
struct xc2028_data *priv = fe->tuner_priv;
int rc;
tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error");
if (!fw) {
tuner_err("Could not load firmware %s.\n", priv->fname);
priv->state = XC2028_NODEV;
return;
}
rc = load_all_firmwares(fe, fw);
release_firmware(fw);
if (rc < 0)
return;
priv->state = XC2028_ACTIVE;
}
static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg)
{
struct xc2028_data *priv = fe->tuner_priv;
struct xc2028_ctrl *p = priv_cfg;
int rc = 0;
tuner_dbg("%s called\n", __func__);
mutex_lock(&priv->lock);
/*
* Copy the config data.
*/
memcpy(&priv->ctrl, p, sizeof(priv->ctrl));
/*
* If firmware name changed, frees firmware. As free_firmware will
* reset the status to NO_FIRMWARE, this forces a new request_firmware
*/
if (!firmware_name[0] && p->fname &&
priv->fname && strcmp(p->fname, priv->fname))
free_firmware(priv);
if (priv->ctrl.max_len < 9)
priv->ctrl.max_len = 13;
if (priv->state == XC2028_NO_FIRMWARE) {
if (!firmware_name[0])
priv->fname = kstrdup(p->fname, GFP_KERNEL);
else
priv->fname = firmware_name;
if (!priv->fname) {
rc = -ENOMEM;
goto unlock;
}
rc = request_firmware_nowait(THIS_MODULE, 1,
priv->fname,
priv->i2c_props.adap->dev.parent,
GFP_KERNEL,
fe, load_firmware_cb);
if (rc < 0) {
tuner_err("Failed to request firmware %s\n",
priv->fname);
priv->state = XC2028_NODEV;
} else
priv->state = XC2028_WAITING_FIRMWARE;
}
unlock:
mutex_unlock(&priv->lock);
return rc;
}
static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = {
.info = {
.name = "Xceive XC3028",
.frequency_min_hz = 42 * MHz,
.frequency_max_hz = 864 * MHz,
.frequency_step_hz = 50 * kHz,
},
.set_config = xc2028_set_config,
.set_analog_params = xc2028_set_analog_freq,
.release = xc2028_dvb_release,
.get_frequency = xc2028_get_frequency,
.get_rf_strength = xc2028_signal,
.get_afc = xc2028_get_afc,
.set_params = xc2028_set_params,
.sleep = xc2028_sleep,
};
struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe,
struct xc2028_config *cfg)
{
struct xc2028_data *priv;
int instance;
if (debug)
printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n");
if (NULL == cfg)
return NULL;
if (!fe) {
printk(KERN_ERR "xc2028: No frontend!\n");
return NULL;
}
mutex_lock(&xc2028_list_mutex);
instance = hybrid_tuner_request_state(struct xc2028_data, priv,
hybrid_tuner_instance_list,
cfg->i2c_adap, cfg->i2c_addr,
"xc2028");
switch (instance) {
case 0:
/* memory allocation failure */
goto fail;
case 1:
/* new tuner instance */
priv->ctrl.max_len = 13;
mutex_init(&priv->lock);
fe->tuner_priv = priv;
break;
case 2:
/* existing tuner instance */
fe->tuner_priv = priv;
break;
}
memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops,
sizeof(xc2028_dvb_tuner_ops));
tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner");
if (cfg->ctrl)
xc2028_set_config(fe, cfg->ctrl);
mutex_unlock(&xc2028_list_mutex);
return fe;
fail:
mutex_unlock(&xc2028_list_mutex);
xc2028_dvb_release(fe);
return NULL;
}
EXPORT_SYMBOL_GPL(xc2028_attach);
MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver");
MODULE_AUTHOR("Michel Ludwig <[email protected]>");
MODULE_AUTHOR("Mauro Carvalho Chehab <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE);
MODULE_FIRMWARE(XC3028L_DEFAULT_FIRMWARE);
| linux-master | drivers/media/tuners/xc2028.c |
/*
MaxLinear MXL5005S VSB/QAM/DVBT tuner driver
Copyright (C) 2008 MaxLinear
Copyright (C) 2006 Steven Toth <[email protected]>
Functions:
mxl5005s_reset()
mxl5005s_writereg()
mxl5005s_writeregs()
mxl5005s_init()
mxl5005s_reconfigure()
mxl5005s_AssignTunerMode()
mxl5005s_set_params()
mxl5005s_get_frequency()
mxl5005s_get_bandwidth()
mxl5005s_release()
mxl5005s_attach()
Copyright (C) 2008 Realtek
Copyright (C) 2008 Jan Hoogenraad
Functions:
mxl5005s_SetRfFreqHz()
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
History of this driver (Steven Toth):
I was given a public release of a linux driver that included
support for the MaxLinear MXL5005S silicon tuner. Analysis of
the tuner driver showed clearly three things.
1. The tuner driver didn't support the LinuxTV tuner API
so the code Realtek added had to be removed.
2. A significant amount of the driver is reference driver code
from MaxLinear, I felt it was important to identify and
preserve this.
3. New code has to be added to interface correctly with the
LinuxTV API, as a regular kernel module.
Other than the reference driver enum's, I've clearly marked
sections of the code and retained the copyright of the
respective owners.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <media/dvb_frontend.h>
#include "mxl5005s.h"
static int debug;
#define dprintk(level, arg...) do { \
if (level <= debug) \
printk(arg); \
} while (0)
#define TUNER_REGS_NUM 104
#define INITCTRL_NUM 40
#ifdef _MXL_PRODUCTION
#define CHCTRL_NUM 39
#else
#define CHCTRL_NUM 36
#endif
#define MXLCTRL_NUM 189
#define MASTER_CONTROL_ADDR 9
/* Enumeration of Master Control Register State */
enum master_control_state {
MC_LOAD_START = 1,
MC_POWER_DOWN,
MC_SYNTH_RESET,
MC_SEQ_OFF
};
/* Enumeration of MXL5005 Tuner Modulation Type */
enum {
MXL_DEFAULT_MODULATION = 0,
MXL_DVBT,
MXL_ATSC,
MXL_QAM,
MXL_ANALOG_CABLE,
MXL_ANALOG_OTA
};
/* MXL5005 Tuner Register Struct */
struct TunerReg {
u16 Reg_Num; /* Tuner Register Address */
u16 Reg_Val; /* Current sw programmed value waiting to be written */
};
enum {
/* Initialization Control Names */
DN_IQTN_AMP_CUT = 1, /* 1 */
BB_MODE, /* 2 */
BB_BUF, /* 3 */
BB_BUF_OA, /* 4 */
BB_ALPF_BANDSELECT, /* 5 */
BB_IQSWAP, /* 6 */
BB_DLPF_BANDSEL, /* 7 */
RFSYN_CHP_GAIN, /* 8 */
RFSYN_EN_CHP_HIGAIN, /* 9 */
AGC_IF, /* 10 */
AGC_RF, /* 11 */
IF_DIVVAL, /* 12 */
IF_VCO_BIAS, /* 13 */
CHCAL_INT_MOD_IF, /* 14 */
CHCAL_FRAC_MOD_IF, /* 15 */
DRV_RES_SEL, /* 16 */
I_DRIVER, /* 17 */
EN_AAF, /* 18 */
EN_3P, /* 19 */
EN_AUX_3P, /* 20 */
SEL_AAF_BAND, /* 21 */
SEQ_ENCLK16_CLK_OUT, /* 22 */
SEQ_SEL4_16B, /* 23 */
XTAL_CAPSELECT, /* 24 */
IF_SEL_DBL, /* 25 */
RFSYN_R_DIV, /* 26 */
SEQ_EXTSYNTHCALIF, /* 27 */
SEQ_EXTDCCAL, /* 28 */
AGC_EN_RSSI, /* 29 */
RFA_ENCLKRFAGC, /* 30 */
RFA_RSSI_REFH, /* 31 */
RFA_RSSI_REF, /* 32 */
RFA_RSSI_REFL, /* 33 */
RFA_FLR, /* 34 */
RFA_CEIL, /* 35 */
SEQ_EXTIQFSMPULSE, /* 36 */
OVERRIDE_1, /* 37 */
BB_INITSTATE_DLPF_TUNE, /* 38 */
TG_R_DIV, /* 39 */
EN_CHP_LIN_B, /* 40 */
/* Channel Change Control Names */
DN_POLY = 51, /* 51 */
DN_RFGAIN, /* 52 */
DN_CAP_RFLPF, /* 53 */
DN_EN_VHFUHFBAR, /* 54 */
DN_GAIN_ADJUST, /* 55 */
DN_IQTNBUF_AMP, /* 56 */
DN_IQTNGNBFBIAS_BST, /* 57 */
RFSYN_EN_OUTMUX, /* 58 */
RFSYN_SEL_VCO_OUT, /* 59 */
RFSYN_SEL_VCO_HI, /* 60 */
RFSYN_SEL_DIVM, /* 61 */
RFSYN_RF_DIV_BIAS, /* 62 */
DN_SEL_FREQ, /* 63 */
RFSYN_VCO_BIAS, /* 64 */
CHCAL_INT_MOD_RF, /* 65 */
CHCAL_FRAC_MOD_RF, /* 66 */
RFSYN_LPF_R, /* 67 */
CHCAL_EN_INT_RF, /* 68 */
TG_LO_DIVVAL, /* 69 */
TG_LO_SELVAL, /* 70 */
TG_DIV_VAL, /* 71 */
TG_VCO_BIAS, /* 72 */
SEQ_EXTPOWERUP, /* 73 */
OVERRIDE_2, /* 74 */
OVERRIDE_3, /* 75 */
OVERRIDE_4, /* 76 */
SEQ_FSM_PULSE, /* 77 */
GPIO_4B, /* 78 */
GPIO_3B, /* 79 */
GPIO_4, /* 80 */
GPIO_3, /* 81 */
GPIO_1B, /* 82 */
DAC_A_ENABLE, /* 83 */
DAC_B_ENABLE, /* 84 */
DAC_DIN_A, /* 85 */
DAC_DIN_B, /* 86 */
#ifdef _MXL_PRODUCTION
RFSYN_EN_DIV, /* 87 */
RFSYN_DIVM, /* 88 */
DN_BYPASS_AGC_I2C /* 89 */
#endif
};
/*
* The following context is source code provided by MaxLinear.
* MaxLinear source code - Common_MXL.h (?)
*/
/* Constants */
#define MXL5005S_REG_WRITING_TABLE_LEN_MAX 104
#define MXL5005S_LATCH_BYTE 0xfe
/* Register address, MSB, and LSB */
#define MXL5005S_BB_IQSWAP_ADDR 59
#define MXL5005S_BB_IQSWAP_MSB 0
#define MXL5005S_BB_IQSWAP_LSB 0
#define MXL5005S_BB_DLPF_BANDSEL_ADDR 53
#define MXL5005S_BB_DLPF_BANDSEL_MSB 4
#define MXL5005S_BB_DLPF_BANDSEL_LSB 3
/* Standard modes */
enum {
MXL5005S_STANDARD_DVBT,
MXL5005S_STANDARD_ATSC,
};
#define MXL5005S_STANDARD_MODE_NUM 2
/* Bandwidth modes */
enum {
MXL5005S_BANDWIDTH_6MHZ = 6000000,
MXL5005S_BANDWIDTH_7MHZ = 7000000,
MXL5005S_BANDWIDTH_8MHZ = 8000000,
};
#define MXL5005S_BANDWIDTH_MODE_NUM 3
/* MXL5005 Tuner Control Struct */
struct TunerControl {
u16 Ctrl_Num; /* Control Number */
u16 size; /* Number of bits to represent Value */
u16 addr[25]; /* Array of Tuner Register Address for each bit pos */
u16 bit[25]; /* Array of bit pos in Reg Addr for each bit pos */
u16 val[25]; /* Binary representation of Value */
};
/* MXL5005 Tuner Struct */
struct mxl5005s_state {
u8 Mode; /* 0: Analog Mode ; 1: Digital Mode */
u8 IF_Mode; /* for Analog Mode, 0: zero IF; 1: low IF */
u32 Chan_Bandwidth; /* filter channel bandwidth (6, 7, 8) */
u32 IF_OUT; /* Desired IF Out Frequency */
u16 IF_OUT_LOAD; /* IF Out Load Resistor (200/300 Ohms) */
u32 RF_IN; /* RF Input Frequency */
u32 Fxtal; /* XTAL Frequency */
u8 AGC_Mode; /* AGC Mode 0: Dual AGC; 1: Single AGC */
u16 TOP; /* Value: take over point */
u8 CLOCK_OUT; /* 0: turn off clk out; 1: turn on clock out */
u8 DIV_OUT; /* 4MHz or 16MHz */
u8 CAPSELECT; /* 0: disable On-Chip pulling cap; 1: enable */
u8 EN_RSSI; /* 0: disable RSSI; 1: enable RSSI */
/* Modulation Type; */
/* 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable */
u8 Mod_Type;
/* Tracking Filter Type */
/* 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H */
u8 TF_Type;
/* Calculated Settings */
u32 RF_LO; /* Synth RF LO Frequency */
u32 IF_LO; /* Synth IF LO Frequency */
u32 TG_LO; /* Synth TG_LO Frequency */
/* Pointers to ControlName Arrays */
u16 Init_Ctrl_Num; /* Number of INIT Control Names */
struct TunerControl
Init_Ctrl[INITCTRL_NUM]; /* INIT Control Names Array Pointer */
u16 CH_Ctrl_Num; /* Number of CH Control Names */
struct TunerControl
CH_Ctrl[CHCTRL_NUM]; /* CH Control Name Array Pointer */
u16 MXL_Ctrl_Num; /* Number of MXL Control Names */
struct TunerControl
MXL_Ctrl[MXLCTRL_NUM]; /* MXL Control Name Array Pointer */
/* Pointer to Tuner Register Array */
u16 TunerRegs_Num; /* Number of Tuner Registers */
struct TunerReg
TunerRegs[TUNER_REGS_NUM]; /* Tuner Register Array Pointer */
/* Linux driver framework specific */
struct mxl5005s_config *config;
struct dvb_frontend *frontend;
struct i2c_adapter *i2c;
/* Cache values */
u32 current_mode;
};
static u16 MXL_GetMasterControl(u8 *MasterReg, int state);
static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value);
static u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value);
static void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit,
u8 bitVal);
static u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum,
u8 *RegVal, int *count);
static u32 MXL_Ceiling(u32 value, u32 resolution);
static u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal);
static u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum,
u32 value, u16 controlGroup);
static u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val);
static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum,
u8 *RegVal, int *count);
static u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq);
static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe);
static void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe);
static u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum,
u8 *RegVal, int *count);
static int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable,
u8 *datatable, u8 len);
static u16 MXL_IFSynthInit(struct dvb_frontend *fe);
static int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type,
u32 bandwidth);
static int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type,
u32 bandwidth);
/* ----------------------------------------------------------------
* Begin: Custom code salvaged from the Realtek driver.
* Copyright (C) 2008 Realtek
* Copyright (C) 2008 Jan Hoogenraad
* This code is placed under the terms of the GNU General Public License
*
* Released by Realtek under GPLv2.
* Thanks to Realtek for a lot of support we received !
*
* Revision: 080314 - original version
*/
static int mxl5005s_SetRfFreqHz(struct dvb_frontend *fe, unsigned long RfFreqHz)
{
struct mxl5005s_state *state = fe->tuner_priv;
unsigned char AddrTable[MXL5005S_REG_WRITING_TABLE_LEN_MAX];
unsigned char ByteTable[MXL5005S_REG_WRITING_TABLE_LEN_MAX];
int TableLen;
u32 IfDivval = 0;
unsigned char MasterControlByte;
dprintk(1, "%s() freq=%ld\n", __func__, RfFreqHz);
/* Set MxL5005S tuner RF frequency according to example code. */
/* Tuner RF frequency setting stage 0 */
MXL_GetMasterControl(ByteTable, MC_SYNTH_RESET);
AddrTable[0] = MASTER_CONTROL_ADDR;
ByteTable[0] |= state->config->AgcMasterByte;
mxl5005s_writeregs(fe, AddrTable, ByteTable, 1);
/* Tuner RF frequency setting stage 1 */
MXL_TuneRF(fe, RfFreqHz);
MXL_ControlRead(fe, IF_DIVVAL, &IfDivval);
MXL_ControlWrite(fe, SEQ_FSM_PULSE, 0);
MXL_ControlWrite(fe, SEQ_EXTPOWERUP, 1);
MXL_ControlWrite(fe, IF_DIVVAL, 8);
MXL_GetCHRegister(fe, AddrTable, ByteTable, &TableLen);
MXL_GetMasterControl(&MasterControlByte, MC_LOAD_START);
AddrTable[TableLen] = MASTER_CONTROL_ADDR ;
ByteTable[TableLen] = MasterControlByte |
state->config->AgcMasterByte;
TableLen += 1;
mxl5005s_writeregs(fe, AddrTable, ByteTable, TableLen);
/* Wait 30 ms. */
msleep(150);
/* Tuner RF frequency setting stage 2 */
MXL_ControlWrite(fe, SEQ_FSM_PULSE, 1);
MXL_ControlWrite(fe, IF_DIVVAL, IfDivval);
MXL_GetCHRegister_ZeroIF(fe, AddrTable, ByteTable, &TableLen);
MXL_GetMasterControl(&MasterControlByte, MC_LOAD_START);
AddrTable[TableLen] = MASTER_CONTROL_ADDR ;
ByteTable[TableLen] = MasterControlByte |
state->config->AgcMasterByte ;
TableLen += 1;
mxl5005s_writeregs(fe, AddrTable, ByteTable, TableLen);
msleep(100);
return 0;
}
/* End: Custom code taken from the Realtek driver */
/* ----------------------------------------------------------------
* Begin: Reference driver code found in the Realtek driver.
* Copyright (C) 2008 MaxLinear
*/
static u16 MXL5005_RegisterInit(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
state->TunerRegs_Num = TUNER_REGS_NUM ;
state->TunerRegs[0].Reg_Num = 9 ;
state->TunerRegs[0].Reg_Val = 0x40 ;
state->TunerRegs[1].Reg_Num = 11 ;
state->TunerRegs[1].Reg_Val = 0x19 ;
state->TunerRegs[2].Reg_Num = 12 ;
state->TunerRegs[2].Reg_Val = 0x60 ;
state->TunerRegs[3].Reg_Num = 13 ;
state->TunerRegs[3].Reg_Val = 0x00 ;
state->TunerRegs[4].Reg_Num = 14 ;
state->TunerRegs[4].Reg_Val = 0x00 ;
state->TunerRegs[5].Reg_Num = 15 ;
state->TunerRegs[5].Reg_Val = 0xC0 ;
state->TunerRegs[6].Reg_Num = 16 ;
state->TunerRegs[6].Reg_Val = 0x00 ;
state->TunerRegs[7].Reg_Num = 17 ;
state->TunerRegs[7].Reg_Val = 0x00 ;
state->TunerRegs[8].Reg_Num = 18 ;
state->TunerRegs[8].Reg_Val = 0x00 ;
state->TunerRegs[9].Reg_Num = 19 ;
state->TunerRegs[9].Reg_Val = 0x34 ;
state->TunerRegs[10].Reg_Num = 21 ;
state->TunerRegs[10].Reg_Val = 0x00 ;
state->TunerRegs[11].Reg_Num = 22 ;
state->TunerRegs[11].Reg_Val = 0x6B ;
state->TunerRegs[12].Reg_Num = 23 ;
state->TunerRegs[12].Reg_Val = 0x35 ;
state->TunerRegs[13].Reg_Num = 24 ;
state->TunerRegs[13].Reg_Val = 0x70 ;
state->TunerRegs[14].Reg_Num = 25 ;
state->TunerRegs[14].Reg_Val = 0x3E ;
state->TunerRegs[15].Reg_Num = 26 ;
state->TunerRegs[15].Reg_Val = 0x82 ;
state->TunerRegs[16].Reg_Num = 31 ;
state->TunerRegs[16].Reg_Val = 0x00 ;
state->TunerRegs[17].Reg_Num = 32 ;
state->TunerRegs[17].Reg_Val = 0x40 ;
state->TunerRegs[18].Reg_Num = 33 ;
state->TunerRegs[18].Reg_Val = 0x53 ;
state->TunerRegs[19].Reg_Num = 34 ;
state->TunerRegs[19].Reg_Val = 0x81 ;
state->TunerRegs[20].Reg_Num = 35 ;
state->TunerRegs[20].Reg_Val = 0xC9 ;
state->TunerRegs[21].Reg_Num = 36 ;
state->TunerRegs[21].Reg_Val = 0x01 ;
state->TunerRegs[22].Reg_Num = 37 ;
state->TunerRegs[22].Reg_Val = 0x00 ;
state->TunerRegs[23].Reg_Num = 41 ;
state->TunerRegs[23].Reg_Val = 0x00 ;
state->TunerRegs[24].Reg_Num = 42 ;
state->TunerRegs[24].Reg_Val = 0xF8 ;
state->TunerRegs[25].Reg_Num = 43 ;
state->TunerRegs[25].Reg_Val = 0x43 ;
state->TunerRegs[26].Reg_Num = 44 ;
state->TunerRegs[26].Reg_Val = 0x20 ;
state->TunerRegs[27].Reg_Num = 45 ;
state->TunerRegs[27].Reg_Val = 0x80 ;
state->TunerRegs[28].Reg_Num = 46 ;
state->TunerRegs[28].Reg_Val = 0x88 ;
state->TunerRegs[29].Reg_Num = 47 ;
state->TunerRegs[29].Reg_Val = 0x86 ;
state->TunerRegs[30].Reg_Num = 48 ;
state->TunerRegs[30].Reg_Val = 0x00 ;
state->TunerRegs[31].Reg_Num = 49 ;
state->TunerRegs[31].Reg_Val = 0x00 ;
state->TunerRegs[32].Reg_Num = 53 ;
state->TunerRegs[32].Reg_Val = 0x94 ;
state->TunerRegs[33].Reg_Num = 54 ;
state->TunerRegs[33].Reg_Val = 0xFA ;
state->TunerRegs[34].Reg_Num = 55 ;
state->TunerRegs[34].Reg_Val = 0x92 ;
state->TunerRegs[35].Reg_Num = 56 ;
state->TunerRegs[35].Reg_Val = 0x80 ;
state->TunerRegs[36].Reg_Num = 57 ;
state->TunerRegs[36].Reg_Val = 0x41 ;
state->TunerRegs[37].Reg_Num = 58 ;
state->TunerRegs[37].Reg_Val = 0xDB ;
state->TunerRegs[38].Reg_Num = 59 ;
state->TunerRegs[38].Reg_Val = 0x00 ;
state->TunerRegs[39].Reg_Num = 60 ;
state->TunerRegs[39].Reg_Val = 0x00 ;
state->TunerRegs[40].Reg_Num = 61 ;
state->TunerRegs[40].Reg_Val = 0x00 ;
state->TunerRegs[41].Reg_Num = 62 ;
state->TunerRegs[41].Reg_Val = 0x00 ;
state->TunerRegs[42].Reg_Num = 65 ;
state->TunerRegs[42].Reg_Val = 0xF8 ;
state->TunerRegs[43].Reg_Num = 66 ;
state->TunerRegs[43].Reg_Val = 0xE4 ;
state->TunerRegs[44].Reg_Num = 67 ;
state->TunerRegs[44].Reg_Val = 0x90 ;
state->TunerRegs[45].Reg_Num = 68 ;
state->TunerRegs[45].Reg_Val = 0xC0 ;
state->TunerRegs[46].Reg_Num = 69 ;
state->TunerRegs[46].Reg_Val = 0x01 ;
state->TunerRegs[47].Reg_Num = 70 ;
state->TunerRegs[47].Reg_Val = 0x50 ;
state->TunerRegs[48].Reg_Num = 71 ;
state->TunerRegs[48].Reg_Val = 0x06 ;
state->TunerRegs[49].Reg_Num = 72 ;
state->TunerRegs[49].Reg_Val = 0x00 ;
state->TunerRegs[50].Reg_Num = 73 ;
state->TunerRegs[50].Reg_Val = 0x20 ;
state->TunerRegs[51].Reg_Num = 76 ;
state->TunerRegs[51].Reg_Val = 0xBB ;
state->TunerRegs[52].Reg_Num = 77 ;
state->TunerRegs[52].Reg_Val = 0x13 ;
state->TunerRegs[53].Reg_Num = 81 ;
state->TunerRegs[53].Reg_Val = 0x04 ;
state->TunerRegs[54].Reg_Num = 82 ;
state->TunerRegs[54].Reg_Val = 0x75 ;
state->TunerRegs[55].Reg_Num = 83 ;
state->TunerRegs[55].Reg_Val = 0x00 ;
state->TunerRegs[56].Reg_Num = 84 ;
state->TunerRegs[56].Reg_Val = 0x00 ;
state->TunerRegs[57].Reg_Num = 85 ;
state->TunerRegs[57].Reg_Val = 0x00 ;
state->TunerRegs[58].Reg_Num = 91 ;
state->TunerRegs[58].Reg_Val = 0x70 ;
state->TunerRegs[59].Reg_Num = 92 ;
state->TunerRegs[59].Reg_Val = 0x00 ;
state->TunerRegs[60].Reg_Num = 93 ;
state->TunerRegs[60].Reg_Val = 0x00 ;
state->TunerRegs[61].Reg_Num = 94 ;
state->TunerRegs[61].Reg_Val = 0x00 ;
state->TunerRegs[62].Reg_Num = 95 ;
state->TunerRegs[62].Reg_Val = 0x0C ;
state->TunerRegs[63].Reg_Num = 96 ;
state->TunerRegs[63].Reg_Val = 0x00 ;
state->TunerRegs[64].Reg_Num = 97 ;
state->TunerRegs[64].Reg_Val = 0x00 ;
state->TunerRegs[65].Reg_Num = 98 ;
state->TunerRegs[65].Reg_Val = 0xE2 ;
state->TunerRegs[66].Reg_Num = 99 ;
state->TunerRegs[66].Reg_Val = 0x00 ;
state->TunerRegs[67].Reg_Num = 100 ;
state->TunerRegs[67].Reg_Val = 0x00 ;
state->TunerRegs[68].Reg_Num = 101 ;
state->TunerRegs[68].Reg_Val = 0x12 ;
state->TunerRegs[69].Reg_Num = 102 ;
state->TunerRegs[69].Reg_Val = 0x80 ;
state->TunerRegs[70].Reg_Num = 103 ;
state->TunerRegs[70].Reg_Val = 0x32 ;
state->TunerRegs[71].Reg_Num = 104 ;
state->TunerRegs[71].Reg_Val = 0xB4 ;
state->TunerRegs[72].Reg_Num = 105 ;
state->TunerRegs[72].Reg_Val = 0x60 ;
state->TunerRegs[73].Reg_Num = 106 ;
state->TunerRegs[73].Reg_Val = 0x83 ;
state->TunerRegs[74].Reg_Num = 107 ;
state->TunerRegs[74].Reg_Val = 0x84 ;
state->TunerRegs[75].Reg_Num = 108 ;
state->TunerRegs[75].Reg_Val = 0x9C ;
state->TunerRegs[76].Reg_Num = 109 ;
state->TunerRegs[76].Reg_Val = 0x02 ;
state->TunerRegs[77].Reg_Num = 110 ;
state->TunerRegs[77].Reg_Val = 0x81 ;
state->TunerRegs[78].Reg_Num = 111 ;
state->TunerRegs[78].Reg_Val = 0xC0 ;
state->TunerRegs[79].Reg_Num = 112 ;
state->TunerRegs[79].Reg_Val = 0x10 ;
state->TunerRegs[80].Reg_Num = 131 ;
state->TunerRegs[80].Reg_Val = 0x8A ;
state->TunerRegs[81].Reg_Num = 132 ;
state->TunerRegs[81].Reg_Val = 0x10 ;
state->TunerRegs[82].Reg_Num = 133 ;
state->TunerRegs[82].Reg_Val = 0x24 ;
state->TunerRegs[83].Reg_Num = 134 ;
state->TunerRegs[83].Reg_Val = 0x00 ;
state->TunerRegs[84].Reg_Num = 135 ;
state->TunerRegs[84].Reg_Val = 0x00 ;
state->TunerRegs[85].Reg_Num = 136 ;
state->TunerRegs[85].Reg_Val = 0x7E ;
state->TunerRegs[86].Reg_Num = 137 ;
state->TunerRegs[86].Reg_Val = 0x40 ;
state->TunerRegs[87].Reg_Num = 138 ;
state->TunerRegs[87].Reg_Val = 0x38 ;
state->TunerRegs[88].Reg_Num = 146 ;
state->TunerRegs[88].Reg_Val = 0xF6 ;
state->TunerRegs[89].Reg_Num = 147 ;
state->TunerRegs[89].Reg_Val = 0x1A ;
state->TunerRegs[90].Reg_Num = 148 ;
state->TunerRegs[90].Reg_Val = 0x62 ;
state->TunerRegs[91].Reg_Num = 149 ;
state->TunerRegs[91].Reg_Val = 0x33 ;
state->TunerRegs[92].Reg_Num = 150 ;
state->TunerRegs[92].Reg_Val = 0x80 ;
state->TunerRegs[93].Reg_Num = 156 ;
state->TunerRegs[93].Reg_Val = 0x56 ;
state->TunerRegs[94].Reg_Num = 157 ;
state->TunerRegs[94].Reg_Val = 0x17 ;
state->TunerRegs[95].Reg_Num = 158 ;
state->TunerRegs[95].Reg_Val = 0xA9 ;
state->TunerRegs[96].Reg_Num = 159 ;
state->TunerRegs[96].Reg_Val = 0x00 ;
state->TunerRegs[97].Reg_Num = 160 ;
state->TunerRegs[97].Reg_Val = 0x00 ;
state->TunerRegs[98].Reg_Num = 161 ;
state->TunerRegs[98].Reg_Val = 0x00 ;
state->TunerRegs[99].Reg_Num = 162 ;
state->TunerRegs[99].Reg_Val = 0x40 ;
state->TunerRegs[100].Reg_Num = 166 ;
state->TunerRegs[100].Reg_Val = 0xAE ;
state->TunerRegs[101].Reg_Num = 167 ;
state->TunerRegs[101].Reg_Val = 0x1B ;
state->TunerRegs[102].Reg_Num = 168 ;
state->TunerRegs[102].Reg_Val = 0xF2 ;
state->TunerRegs[103].Reg_Num = 195 ;
state->TunerRegs[103].Reg_Val = 0x00 ;
return 0 ;
}
static u16 MXL5005_ControlInit(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
state->Init_Ctrl_Num = INITCTRL_NUM;
state->Init_Ctrl[0].Ctrl_Num = DN_IQTN_AMP_CUT ;
state->Init_Ctrl[0].size = 1 ;
state->Init_Ctrl[0].addr[0] = 73;
state->Init_Ctrl[0].bit[0] = 7;
state->Init_Ctrl[0].val[0] = 0;
state->Init_Ctrl[1].Ctrl_Num = BB_MODE ;
state->Init_Ctrl[1].size = 1 ;
state->Init_Ctrl[1].addr[0] = 53;
state->Init_Ctrl[1].bit[0] = 2;
state->Init_Ctrl[1].val[0] = 1;
state->Init_Ctrl[2].Ctrl_Num = BB_BUF ;
state->Init_Ctrl[2].size = 2 ;
state->Init_Ctrl[2].addr[0] = 53;
state->Init_Ctrl[2].bit[0] = 1;
state->Init_Ctrl[2].val[0] = 0;
state->Init_Ctrl[2].addr[1] = 57;
state->Init_Ctrl[2].bit[1] = 0;
state->Init_Ctrl[2].val[1] = 1;
state->Init_Ctrl[3].Ctrl_Num = BB_BUF_OA ;
state->Init_Ctrl[3].size = 1 ;
state->Init_Ctrl[3].addr[0] = 53;
state->Init_Ctrl[3].bit[0] = 0;
state->Init_Ctrl[3].val[0] = 0;
state->Init_Ctrl[4].Ctrl_Num = BB_ALPF_BANDSELECT ;
state->Init_Ctrl[4].size = 3 ;
state->Init_Ctrl[4].addr[0] = 53;
state->Init_Ctrl[4].bit[0] = 5;
state->Init_Ctrl[4].val[0] = 0;
state->Init_Ctrl[4].addr[1] = 53;
state->Init_Ctrl[4].bit[1] = 6;
state->Init_Ctrl[4].val[1] = 0;
state->Init_Ctrl[4].addr[2] = 53;
state->Init_Ctrl[4].bit[2] = 7;
state->Init_Ctrl[4].val[2] = 1;
state->Init_Ctrl[5].Ctrl_Num = BB_IQSWAP ;
state->Init_Ctrl[5].size = 1 ;
state->Init_Ctrl[5].addr[0] = 59;
state->Init_Ctrl[5].bit[0] = 0;
state->Init_Ctrl[5].val[0] = 0;
state->Init_Ctrl[6].Ctrl_Num = BB_DLPF_BANDSEL ;
state->Init_Ctrl[6].size = 2 ;
state->Init_Ctrl[6].addr[0] = 53;
state->Init_Ctrl[6].bit[0] = 3;
state->Init_Ctrl[6].val[0] = 0;
state->Init_Ctrl[6].addr[1] = 53;
state->Init_Ctrl[6].bit[1] = 4;
state->Init_Ctrl[6].val[1] = 1;
state->Init_Ctrl[7].Ctrl_Num = RFSYN_CHP_GAIN ;
state->Init_Ctrl[7].size = 4 ;
state->Init_Ctrl[7].addr[0] = 22;
state->Init_Ctrl[7].bit[0] = 4;
state->Init_Ctrl[7].val[0] = 0;
state->Init_Ctrl[7].addr[1] = 22;
state->Init_Ctrl[7].bit[1] = 5;
state->Init_Ctrl[7].val[1] = 1;
state->Init_Ctrl[7].addr[2] = 22;
state->Init_Ctrl[7].bit[2] = 6;
state->Init_Ctrl[7].val[2] = 1;
state->Init_Ctrl[7].addr[3] = 22;
state->Init_Ctrl[7].bit[3] = 7;
state->Init_Ctrl[7].val[3] = 0;
state->Init_Ctrl[8].Ctrl_Num = RFSYN_EN_CHP_HIGAIN ;
state->Init_Ctrl[8].size = 1 ;
state->Init_Ctrl[8].addr[0] = 22;
state->Init_Ctrl[8].bit[0] = 2;
state->Init_Ctrl[8].val[0] = 0;
state->Init_Ctrl[9].Ctrl_Num = AGC_IF ;
state->Init_Ctrl[9].size = 4 ;
state->Init_Ctrl[9].addr[0] = 76;
state->Init_Ctrl[9].bit[0] = 0;
state->Init_Ctrl[9].val[0] = 1;
state->Init_Ctrl[9].addr[1] = 76;
state->Init_Ctrl[9].bit[1] = 1;
state->Init_Ctrl[9].val[1] = 1;
state->Init_Ctrl[9].addr[2] = 76;
state->Init_Ctrl[9].bit[2] = 2;
state->Init_Ctrl[9].val[2] = 0;
state->Init_Ctrl[9].addr[3] = 76;
state->Init_Ctrl[9].bit[3] = 3;
state->Init_Ctrl[9].val[3] = 1;
state->Init_Ctrl[10].Ctrl_Num = AGC_RF ;
state->Init_Ctrl[10].size = 4 ;
state->Init_Ctrl[10].addr[0] = 76;
state->Init_Ctrl[10].bit[0] = 4;
state->Init_Ctrl[10].val[0] = 1;
state->Init_Ctrl[10].addr[1] = 76;
state->Init_Ctrl[10].bit[1] = 5;
state->Init_Ctrl[10].val[1] = 1;
state->Init_Ctrl[10].addr[2] = 76;
state->Init_Ctrl[10].bit[2] = 6;
state->Init_Ctrl[10].val[2] = 0;
state->Init_Ctrl[10].addr[3] = 76;
state->Init_Ctrl[10].bit[3] = 7;
state->Init_Ctrl[10].val[3] = 1;
state->Init_Ctrl[11].Ctrl_Num = IF_DIVVAL ;
state->Init_Ctrl[11].size = 5 ;
state->Init_Ctrl[11].addr[0] = 43;
state->Init_Ctrl[11].bit[0] = 3;
state->Init_Ctrl[11].val[0] = 0;
state->Init_Ctrl[11].addr[1] = 43;
state->Init_Ctrl[11].bit[1] = 4;
state->Init_Ctrl[11].val[1] = 0;
state->Init_Ctrl[11].addr[2] = 43;
state->Init_Ctrl[11].bit[2] = 5;
state->Init_Ctrl[11].val[2] = 0;
state->Init_Ctrl[11].addr[3] = 43;
state->Init_Ctrl[11].bit[3] = 6;
state->Init_Ctrl[11].val[3] = 1;
state->Init_Ctrl[11].addr[4] = 43;
state->Init_Ctrl[11].bit[4] = 7;
state->Init_Ctrl[11].val[4] = 0;
state->Init_Ctrl[12].Ctrl_Num = IF_VCO_BIAS ;
state->Init_Ctrl[12].size = 6 ;
state->Init_Ctrl[12].addr[0] = 44;
state->Init_Ctrl[12].bit[0] = 2;
state->Init_Ctrl[12].val[0] = 0;
state->Init_Ctrl[12].addr[1] = 44;
state->Init_Ctrl[12].bit[1] = 3;
state->Init_Ctrl[12].val[1] = 0;
state->Init_Ctrl[12].addr[2] = 44;
state->Init_Ctrl[12].bit[2] = 4;
state->Init_Ctrl[12].val[2] = 0;
state->Init_Ctrl[12].addr[3] = 44;
state->Init_Ctrl[12].bit[3] = 5;
state->Init_Ctrl[12].val[3] = 1;
state->Init_Ctrl[12].addr[4] = 44;
state->Init_Ctrl[12].bit[4] = 6;
state->Init_Ctrl[12].val[4] = 0;
state->Init_Ctrl[12].addr[5] = 44;
state->Init_Ctrl[12].bit[5] = 7;
state->Init_Ctrl[12].val[5] = 0;
state->Init_Ctrl[13].Ctrl_Num = CHCAL_INT_MOD_IF ;
state->Init_Ctrl[13].size = 7 ;
state->Init_Ctrl[13].addr[0] = 11;
state->Init_Ctrl[13].bit[0] = 0;
state->Init_Ctrl[13].val[0] = 1;
state->Init_Ctrl[13].addr[1] = 11;
state->Init_Ctrl[13].bit[1] = 1;
state->Init_Ctrl[13].val[1] = 0;
state->Init_Ctrl[13].addr[2] = 11;
state->Init_Ctrl[13].bit[2] = 2;
state->Init_Ctrl[13].val[2] = 0;
state->Init_Ctrl[13].addr[3] = 11;
state->Init_Ctrl[13].bit[3] = 3;
state->Init_Ctrl[13].val[3] = 1;
state->Init_Ctrl[13].addr[4] = 11;
state->Init_Ctrl[13].bit[4] = 4;
state->Init_Ctrl[13].val[4] = 1;
state->Init_Ctrl[13].addr[5] = 11;
state->Init_Ctrl[13].bit[5] = 5;
state->Init_Ctrl[13].val[5] = 0;
state->Init_Ctrl[13].addr[6] = 11;
state->Init_Ctrl[13].bit[6] = 6;
state->Init_Ctrl[13].val[6] = 0;
state->Init_Ctrl[14].Ctrl_Num = CHCAL_FRAC_MOD_IF ;
state->Init_Ctrl[14].size = 16 ;
state->Init_Ctrl[14].addr[0] = 13;
state->Init_Ctrl[14].bit[0] = 0;
state->Init_Ctrl[14].val[0] = 0;
state->Init_Ctrl[14].addr[1] = 13;
state->Init_Ctrl[14].bit[1] = 1;
state->Init_Ctrl[14].val[1] = 0;
state->Init_Ctrl[14].addr[2] = 13;
state->Init_Ctrl[14].bit[2] = 2;
state->Init_Ctrl[14].val[2] = 0;
state->Init_Ctrl[14].addr[3] = 13;
state->Init_Ctrl[14].bit[3] = 3;
state->Init_Ctrl[14].val[3] = 0;
state->Init_Ctrl[14].addr[4] = 13;
state->Init_Ctrl[14].bit[4] = 4;
state->Init_Ctrl[14].val[4] = 0;
state->Init_Ctrl[14].addr[5] = 13;
state->Init_Ctrl[14].bit[5] = 5;
state->Init_Ctrl[14].val[5] = 0;
state->Init_Ctrl[14].addr[6] = 13;
state->Init_Ctrl[14].bit[6] = 6;
state->Init_Ctrl[14].val[6] = 0;
state->Init_Ctrl[14].addr[7] = 13;
state->Init_Ctrl[14].bit[7] = 7;
state->Init_Ctrl[14].val[7] = 0;
state->Init_Ctrl[14].addr[8] = 12;
state->Init_Ctrl[14].bit[8] = 0;
state->Init_Ctrl[14].val[8] = 0;
state->Init_Ctrl[14].addr[9] = 12;
state->Init_Ctrl[14].bit[9] = 1;
state->Init_Ctrl[14].val[9] = 0;
state->Init_Ctrl[14].addr[10] = 12;
state->Init_Ctrl[14].bit[10] = 2;
state->Init_Ctrl[14].val[10] = 0;
state->Init_Ctrl[14].addr[11] = 12;
state->Init_Ctrl[14].bit[11] = 3;
state->Init_Ctrl[14].val[11] = 0;
state->Init_Ctrl[14].addr[12] = 12;
state->Init_Ctrl[14].bit[12] = 4;
state->Init_Ctrl[14].val[12] = 0;
state->Init_Ctrl[14].addr[13] = 12;
state->Init_Ctrl[14].bit[13] = 5;
state->Init_Ctrl[14].val[13] = 1;
state->Init_Ctrl[14].addr[14] = 12;
state->Init_Ctrl[14].bit[14] = 6;
state->Init_Ctrl[14].val[14] = 1;
state->Init_Ctrl[14].addr[15] = 12;
state->Init_Ctrl[14].bit[15] = 7;
state->Init_Ctrl[14].val[15] = 0;
state->Init_Ctrl[15].Ctrl_Num = DRV_RES_SEL ;
state->Init_Ctrl[15].size = 3 ;
state->Init_Ctrl[15].addr[0] = 147;
state->Init_Ctrl[15].bit[0] = 2;
state->Init_Ctrl[15].val[0] = 0;
state->Init_Ctrl[15].addr[1] = 147;
state->Init_Ctrl[15].bit[1] = 3;
state->Init_Ctrl[15].val[1] = 1;
state->Init_Ctrl[15].addr[2] = 147;
state->Init_Ctrl[15].bit[2] = 4;
state->Init_Ctrl[15].val[2] = 1;
state->Init_Ctrl[16].Ctrl_Num = I_DRIVER ;
state->Init_Ctrl[16].size = 2 ;
state->Init_Ctrl[16].addr[0] = 147;
state->Init_Ctrl[16].bit[0] = 0;
state->Init_Ctrl[16].val[0] = 0;
state->Init_Ctrl[16].addr[1] = 147;
state->Init_Ctrl[16].bit[1] = 1;
state->Init_Ctrl[16].val[1] = 1;
state->Init_Ctrl[17].Ctrl_Num = EN_AAF ;
state->Init_Ctrl[17].size = 1 ;
state->Init_Ctrl[17].addr[0] = 147;
state->Init_Ctrl[17].bit[0] = 7;
state->Init_Ctrl[17].val[0] = 0;
state->Init_Ctrl[18].Ctrl_Num = EN_3P ;
state->Init_Ctrl[18].size = 1 ;
state->Init_Ctrl[18].addr[0] = 147;
state->Init_Ctrl[18].bit[0] = 6;
state->Init_Ctrl[18].val[0] = 0;
state->Init_Ctrl[19].Ctrl_Num = EN_AUX_3P ;
state->Init_Ctrl[19].size = 1 ;
state->Init_Ctrl[19].addr[0] = 156;
state->Init_Ctrl[19].bit[0] = 0;
state->Init_Ctrl[19].val[0] = 0;
state->Init_Ctrl[20].Ctrl_Num = SEL_AAF_BAND ;
state->Init_Ctrl[20].size = 1 ;
state->Init_Ctrl[20].addr[0] = 147;
state->Init_Ctrl[20].bit[0] = 5;
state->Init_Ctrl[20].val[0] = 0;
state->Init_Ctrl[21].Ctrl_Num = SEQ_ENCLK16_CLK_OUT ;
state->Init_Ctrl[21].size = 1 ;
state->Init_Ctrl[21].addr[0] = 137;
state->Init_Ctrl[21].bit[0] = 4;
state->Init_Ctrl[21].val[0] = 0;
state->Init_Ctrl[22].Ctrl_Num = SEQ_SEL4_16B ;
state->Init_Ctrl[22].size = 1 ;
state->Init_Ctrl[22].addr[0] = 137;
state->Init_Ctrl[22].bit[0] = 7;
state->Init_Ctrl[22].val[0] = 0;
state->Init_Ctrl[23].Ctrl_Num = XTAL_CAPSELECT ;
state->Init_Ctrl[23].size = 1 ;
state->Init_Ctrl[23].addr[0] = 91;
state->Init_Ctrl[23].bit[0] = 5;
state->Init_Ctrl[23].val[0] = 1;
state->Init_Ctrl[24].Ctrl_Num = IF_SEL_DBL ;
state->Init_Ctrl[24].size = 1 ;
state->Init_Ctrl[24].addr[0] = 43;
state->Init_Ctrl[24].bit[0] = 0;
state->Init_Ctrl[24].val[0] = 1;
state->Init_Ctrl[25].Ctrl_Num = RFSYN_R_DIV ;
state->Init_Ctrl[25].size = 2 ;
state->Init_Ctrl[25].addr[0] = 22;
state->Init_Ctrl[25].bit[0] = 0;
state->Init_Ctrl[25].val[0] = 1;
state->Init_Ctrl[25].addr[1] = 22;
state->Init_Ctrl[25].bit[1] = 1;
state->Init_Ctrl[25].val[1] = 1;
state->Init_Ctrl[26].Ctrl_Num = SEQ_EXTSYNTHCALIF ;
state->Init_Ctrl[26].size = 1 ;
state->Init_Ctrl[26].addr[0] = 134;
state->Init_Ctrl[26].bit[0] = 2;
state->Init_Ctrl[26].val[0] = 0;
state->Init_Ctrl[27].Ctrl_Num = SEQ_EXTDCCAL ;
state->Init_Ctrl[27].size = 1 ;
state->Init_Ctrl[27].addr[0] = 137;
state->Init_Ctrl[27].bit[0] = 3;
state->Init_Ctrl[27].val[0] = 0;
state->Init_Ctrl[28].Ctrl_Num = AGC_EN_RSSI ;
state->Init_Ctrl[28].size = 1 ;
state->Init_Ctrl[28].addr[0] = 77;
state->Init_Ctrl[28].bit[0] = 7;
state->Init_Ctrl[28].val[0] = 0;
state->Init_Ctrl[29].Ctrl_Num = RFA_ENCLKRFAGC ;
state->Init_Ctrl[29].size = 1 ;
state->Init_Ctrl[29].addr[0] = 166;
state->Init_Ctrl[29].bit[0] = 7;
state->Init_Ctrl[29].val[0] = 1;
state->Init_Ctrl[30].Ctrl_Num = RFA_RSSI_REFH ;
state->Init_Ctrl[30].size = 3 ;
state->Init_Ctrl[30].addr[0] = 166;
state->Init_Ctrl[30].bit[0] = 0;
state->Init_Ctrl[30].val[0] = 0;
state->Init_Ctrl[30].addr[1] = 166;
state->Init_Ctrl[30].bit[1] = 1;
state->Init_Ctrl[30].val[1] = 1;
state->Init_Ctrl[30].addr[2] = 166;
state->Init_Ctrl[30].bit[2] = 2;
state->Init_Ctrl[30].val[2] = 1;
state->Init_Ctrl[31].Ctrl_Num = RFA_RSSI_REF ;
state->Init_Ctrl[31].size = 3 ;
state->Init_Ctrl[31].addr[0] = 166;
state->Init_Ctrl[31].bit[0] = 3;
state->Init_Ctrl[31].val[0] = 1;
state->Init_Ctrl[31].addr[1] = 166;
state->Init_Ctrl[31].bit[1] = 4;
state->Init_Ctrl[31].val[1] = 0;
state->Init_Ctrl[31].addr[2] = 166;
state->Init_Ctrl[31].bit[2] = 5;
state->Init_Ctrl[31].val[2] = 1;
state->Init_Ctrl[32].Ctrl_Num = RFA_RSSI_REFL ;
state->Init_Ctrl[32].size = 3 ;
state->Init_Ctrl[32].addr[0] = 167;
state->Init_Ctrl[32].bit[0] = 0;
state->Init_Ctrl[32].val[0] = 1;
state->Init_Ctrl[32].addr[1] = 167;
state->Init_Ctrl[32].bit[1] = 1;
state->Init_Ctrl[32].val[1] = 1;
state->Init_Ctrl[32].addr[2] = 167;
state->Init_Ctrl[32].bit[2] = 2;
state->Init_Ctrl[32].val[2] = 0;
state->Init_Ctrl[33].Ctrl_Num = RFA_FLR ;
state->Init_Ctrl[33].size = 4 ;
state->Init_Ctrl[33].addr[0] = 168;
state->Init_Ctrl[33].bit[0] = 0;
state->Init_Ctrl[33].val[0] = 0;
state->Init_Ctrl[33].addr[1] = 168;
state->Init_Ctrl[33].bit[1] = 1;
state->Init_Ctrl[33].val[1] = 1;
state->Init_Ctrl[33].addr[2] = 168;
state->Init_Ctrl[33].bit[2] = 2;
state->Init_Ctrl[33].val[2] = 0;
state->Init_Ctrl[33].addr[3] = 168;
state->Init_Ctrl[33].bit[3] = 3;
state->Init_Ctrl[33].val[3] = 0;
state->Init_Ctrl[34].Ctrl_Num = RFA_CEIL ;
state->Init_Ctrl[34].size = 4 ;
state->Init_Ctrl[34].addr[0] = 168;
state->Init_Ctrl[34].bit[0] = 4;
state->Init_Ctrl[34].val[0] = 1;
state->Init_Ctrl[34].addr[1] = 168;
state->Init_Ctrl[34].bit[1] = 5;
state->Init_Ctrl[34].val[1] = 1;
state->Init_Ctrl[34].addr[2] = 168;
state->Init_Ctrl[34].bit[2] = 6;
state->Init_Ctrl[34].val[2] = 1;
state->Init_Ctrl[34].addr[3] = 168;
state->Init_Ctrl[34].bit[3] = 7;
state->Init_Ctrl[34].val[3] = 1;
state->Init_Ctrl[35].Ctrl_Num = SEQ_EXTIQFSMPULSE ;
state->Init_Ctrl[35].size = 1 ;
state->Init_Ctrl[35].addr[0] = 135;
state->Init_Ctrl[35].bit[0] = 0;
state->Init_Ctrl[35].val[0] = 0;
state->Init_Ctrl[36].Ctrl_Num = OVERRIDE_1 ;
state->Init_Ctrl[36].size = 1 ;
state->Init_Ctrl[36].addr[0] = 56;
state->Init_Ctrl[36].bit[0] = 3;
state->Init_Ctrl[36].val[0] = 0;
state->Init_Ctrl[37].Ctrl_Num = BB_INITSTATE_DLPF_TUNE ;
state->Init_Ctrl[37].size = 7 ;
state->Init_Ctrl[37].addr[0] = 59;
state->Init_Ctrl[37].bit[0] = 1;
state->Init_Ctrl[37].val[0] = 0;
state->Init_Ctrl[37].addr[1] = 59;
state->Init_Ctrl[37].bit[1] = 2;
state->Init_Ctrl[37].val[1] = 0;
state->Init_Ctrl[37].addr[2] = 59;
state->Init_Ctrl[37].bit[2] = 3;
state->Init_Ctrl[37].val[2] = 0;
state->Init_Ctrl[37].addr[3] = 59;
state->Init_Ctrl[37].bit[3] = 4;
state->Init_Ctrl[37].val[3] = 0;
state->Init_Ctrl[37].addr[4] = 59;
state->Init_Ctrl[37].bit[4] = 5;
state->Init_Ctrl[37].val[4] = 0;
state->Init_Ctrl[37].addr[5] = 59;
state->Init_Ctrl[37].bit[5] = 6;
state->Init_Ctrl[37].val[5] = 0;
state->Init_Ctrl[37].addr[6] = 59;
state->Init_Ctrl[37].bit[6] = 7;
state->Init_Ctrl[37].val[6] = 0;
state->Init_Ctrl[38].Ctrl_Num = TG_R_DIV ;
state->Init_Ctrl[38].size = 6 ;
state->Init_Ctrl[38].addr[0] = 32;
state->Init_Ctrl[38].bit[0] = 2;
state->Init_Ctrl[38].val[0] = 0;
state->Init_Ctrl[38].addr[1] = 32;
state->Init_Ctrl[38].bit[1] = 3;
state->Init_Ctrl[38].val[1] = 0;
state->Init_Ctrl[38].addr[2] = 32;
state->Init_Ctrl[38].bit[2] = 4;
state->Init_Ctrl[38].val[2] = 0;
state->Init_Ctrl[38].addr[3] = 32;
state->Init_Ctrl[38].bit[3] = 5;
state->Init_Ctrl[38].val[3] = 0;
state->Init_Ctrl[38].addr[4] = 32;
state->Init_Ctrl[38].bit[4] = 6;
state->Init_Ctrl[38].val[4] = 1;
state->Init_Ctrl[38].addr[5] = 32;
state->Init_Ctrl[38].bit[5] = 7;
state->Init_Ctrl[38].val[5] = 0;
state->Init_Ctrl[39].Ctrl_Num = EN_CHP_LIN_B ;
state->Init_Ctrl[39].size = 1 ;
state->Init_Ctrl[39].addr[0] = 25;
state->Init_Ctrl[39].bit[0] = 3;
state->Init_Ctrl[39].val[0] = 1;
state->CH_Ctrl_Num = CHCTRL_NUM ;
state->CH_Ctrl[0].Ctrl_Num = DN_POLY ;
state->CH_Ctrl[0].size = 2 ;
state->CH_Ctrl[0].addr[0] = 68;
state->CH_Ctrl[0].bit[0] = 6;
state->CH_Ctrl[0].val[0] = 1;
state->CH_Ctrl[0].addr[1] = 68;
state->CH_Ctrl[0].bit[1] = 7;
state->CH_Ctrl[0].val[1] = 1;
state->CH_Ctrl[1].Ctrl_Num = DN_RFGAIN ;
state->CH_Ctrl[1].size = 2 ;
state->CH_Ctrl[1].addr[0] = 70;
state->CH_Ctrl[1].bit[0] = 6;
state->CH_Ctrl[1].val[0] = 1;
state->CH_Ctrl[1].addr[1] = 70;
state->CH_Ctrl[1].bit[1] = 7;
state->CH_Ctrl[1].val[1] = 0;
state->CH_Ctrl[2].Ctrl_Num = DN_CAP_RFLPF ;
state->CH_Ctrl[2].size = 9 ;
state->CH_Ctrl[2].addr[0] = 69;
state->CH_Ctrl[2].bit[0] = 5;
state->CH_Ctrl[2].val[0] = 0;
state->CH_Ctrl[2].addr[1] = 69;
state->CH_Ctrl[2].bit[1] = 6;
state->CH_Ctrl[2].val[1] = 0;
state->CH_Ctrl[2].addr[2] = 69;
state->CH_Ctrl[2].bit[2] = 7;
state->CH_Ctrl[2].val[2] = 0;
state->CH_Ctrl[2].addr[3] = 68;
state->CH_Ctrl[2].bit[3] = 0;
state->CH_Ctrl[2].val[3] = 0;
state->CH_Ctrl[2].addr[4] = 68;
state->CH_Ctrl[2].bit[4] = 1;
state->CH_Ctrl[2].val[4] = 0;
state->CH_Ctrl[2].addr[5] = 68;
state->CH_Ctrl[2].bit[5] = 2;
state->CH_Ctrl[2].val[5] = 0;
state->CH_Ctrl[2].addr[6] = 68;
state->CH_Ctrl[2].bit[6] = 3;
state->CH_Ctrl[2].val[6] = 0;
state->CH_Ctrl[2].addr[7] = 68;
state->CH_Ctrl[2].bit[7] = 4;
state->CH_Ctrl[2].val[7] = 0;
state->CH_Ctrl[2].addr[8] = 68;
state->CH_Ctrl[2].bit[8] = 5;
state->CH_Ctrl[2].val[8] = 0;
state->CH_Ctrl[3].Ctrl_Num = DN_EN_VHFUHFBAR ;
state->CH_Ctrl[3].size = 1 ;
state->CH_Ctrl[3].addr[0] = 70;
state->CH_Ctrl[3].bit[0] = 5;
state->CH_Ctrl[3].val[0] = 0;
state->CH_Ctrl[4].Ctrl_Num = DN_GAIN_ADJUST ;
state->CH_Ctrl[4].size = 3 ;
state->CH_Ctrl[4].addr[0] = 73;
state->CH_Ctrl[4].bit[0] = 4;
state->CH_Ctrl[4].val[0] = 0;
state->CH_Ctrl[4].addr[1] = 73;
state->CH_Ctrl[4].bit[1] = 5;
state->CH_Ctrl[4].val[1] = 1;
state->CH_Ctrl[4].addr[2] = 73;
state->CH_Ctrl[4].bit[2] = 6;
state->CH_Ctrl[4].val[2] = 0;
state->CH_Ctrl[5].Ctrl_Num = DN_IQTNBUF_AMP ;
state->CH_Ctrl[5].size = 4 ;
state->CH_Ctrl[5].addr[0] = 70;
state->CH_Ctrl[5].bit[0] = 0;
state->CH_Ctrl[5].val[0] = 0;
state->CH_Ctrl[5].addr[1] = 70;
state->CH_Ctrl[5].bit[1] = 1;
state->CH_Ctrl[5].val[1] = 0;
state->CH_Ctrl[5].addr[2] = 70;
state->CH_Ctrl[5].bit[2] = 2;
state->CH_Ctrl[5].val[2] = 0;
state->CH_Ctrl[5].addr[3] = 70;
state->CH_Ctrl[5].bit[3] = 3;
state->CH_Ctrl[5].val[3] = 0;
state->CH_Ctrl[6].Ctrl_Num = DN_IQTNGNBFBIAS_BST ;
state->CH_Ctrl[6].size = 1 ;
state->CH_Ctrl[6].addr[0] = 70;
state->CH_Ctrl[6].bit[0] = 4;
state->CH_Ctrl[6].val[0] = 1;
state->CH_Ctrl[7].Ctrl_Num = RFSYN_EN_OUTMUX ;
state->CH_Ctrl[7].size = 1 ;
state->CH_Ctrl[7].addr[0] = 111;
state->CH_Ctrl[7].bit[0] = 4;
state->CH_Ctrl[7].val[0] = 0;
state->CH_Ctrl[8].Ctrl_Num = RFSYN_SEL_VCO_OUT ;
state->CH_Ctrl[8].size = 1 ;
state->CH_Ctrl[8].addr[0] = 111;
state->CH_Ctrl[8].bit[0] = 7;
state->CH_Ctrl[8].val[0] = 1;
state->CH_Ctrl[9].Ctrl_Num = RFSYN_SEL_VCO_HI ;
state->CH_Ctrl[9].size = 1 ;
state->CH_Ctrl[9].addr[0] = 111;
state->CH_Ctrl[9].bit[0] = 6;
state->CH_Ctrl[9].val[0] = 1;
state->CH_Ctrl[10].Ctrl_Num = RFSYN_SEL_DIVM ;
state->CH_Ctrl[10].size = 1 ;
state->CH_Ctrl[10].addr[0] = 111;
state->CH_Ctrl[10].bit[0] = 5;
state->CH_Ctrl[10].val[0] = 0;
state->CH_Ctrl[11].Ctrl_Num = RFSYN_RF_DIV_BIAS ;
state->CH_Ctrl[11].size = 2 ;
state->CH_Ctrl[11].addr[0] = 110;
state->CH_Ctrl[11].bit[0] = 0;
state->CH_Ctrl[11].val[0] = 1;
state->CH_Ctrl[11].addr[1] = 110;
state->CH_Ctrl[11].bit[1] = 1;
state->CH_Ctrl[11].val[1] = 0;
state->CH_Ctrl[12].Ctrl_Num = DN_SEL_FREQ ;
state->CH_Ctrl[12].size = 3 ;
state->CH_Ctrl[12].addr[0] = 69;
state->CH_Ctrl[12].bit[0] = 2;
state->CH_Ctrl[12].val[0] = 0;
state->CH_Ctrl[12].addr[1] = 69;
state->CH_Ctrl[12].bit[1] = 3;
state->CH_Ctrl[12].val[1] = 0;
state->CH_Ctrl[12].addr[2] = 69;
state->CH_Ctrl[12].bit[2] = 4;
state->CH_Ctrl[12].val[2] = 0;
state->CH_Ctrl[13].Ctrl_Num = RFSYN_VCO_BIAS ;
state->CH_Ctrl[13].size = 6 ;
state->CH_Ctrl[13].addr[0] = 110;
state->CH_Ctrl[13].bit[0] = 2;
state->CH_Ctrl[13].val[0] = 0;
state->CH_Ctrl[13].addr[1] = 110;
state->CH_Ctrl[13].bit[1] = 3;
state->CH_Ctrl[13].val[1] = 0;
state->CH_Ctrl[13].addr[2] = 110;
state->CH_Ctrl[13].bit[2] = 4;
state->CH_Ctrl[13].val[2] = 0;
state->CH_Ctrl[13].addr[3] = 110;
state->CH_Ctrl[13].bit[3] = 5;
state->CH_Ctrl[13].val[3] = 0;
state->CH_Ctrl[13].addr[4] = 110;
state->CH_Ctrl[13].bit[4] = 6;
state->CH_Ctrl[13].val[4] = 0;
state->CH_Ctrl[13].addr[5] = 110;
state->CH_Ctrl[13].bit[5] = 7;
state->CH_Ctrl[13].val[5] = 1;
state->CH_Ctrl[14].Ctrl_Num = CHCAL_INT_MOD_RF ;
state->CH_Ctrl[14].size = 7 ;
state->CH_Ctrl[14].addr[0] = 14;
state->CH_Ctrl[14].bit[0] = 0;
state->CH_Ctrl[14].val[0] = 0;
state->CH_Ctrl[14].addr[1] = 14;
state->CH_Ctrl[14].bit[1] = 1;
state->CH_Ctrl[14].val[1] = 0;
state->CH_Ctrl[14].addr[2] = 14;
state->CH_Ctrl[14].bit[2] = 2;
state->CH_Ctrl[14].val[2] = 0;
state->CH_Ctrl[14].addr[3] = 14;
state->CH_Ctrl[14].bit[3] = 3;
state->CH_Ctrl[14].val[3] = 0;
state->CH_Ctrl[14].addr[4] = 14;
state->CH_Ctrl[14].bit[4] = 4;
state->CH_Ctrl[14].val[4] = 0;
state->CH_Ctrl[14].addr[5] = 14;
state->CH_Ctrl[14].bit[5] = 5;
state->CH_Ctrl[14].val[5] = 0;
state->CH_Ctrl[14].addr[6] = 14;
state->CH_Ctrl[14].bit[6] = 6;
state->CH_Ctrl[14].val[6] = 0;
state->CH_Ctrl[15].Ctrl_Num = CHCAL_FRAC_MOD_RF ;
state->CH_Ctrl[15].size = 18 ;
state->CH_Ctrl[15].addr[0] = 17;
state->CH_Ctrl[15].bit[0] = 6;
state->CH_Ctrl[15].val[0] = 0;
state->CH_Ctrl[15].addr[1] = 17;
state->CH_Ctrl[15].bit[1] = 7;
state->CH_Ctrl[15].val[1] = 0;
state->CH_Ctrl[15].addr[2] = 16;
state->CH_Ctrl[15].bit[2] = 0;
state->CH_Ctrl[15].val[2] = 0;
state->CH_Ctrl[15].addr[3] = 16;
state->CH_Ctrl[15].bit[3] = 1;
state->CH_Ctrl[15].val[3] = 0;
state->CH_Ctrl[15].addr[4] = 16;
state->CH_Ctrl[15].bit[4] = 2;
state->CH_Ctrl[15].val[4] = 0;
state->CH_Ctrl[15].addr[5] = 16;
state->CH_Ctrl[15].bit[5] = 3;
state->CH_Ctrl[15].val[5] = 0;
state->CH_Ctrl[15].addr[6] = 16;
state->CH_Ctrl[15].bit[6] = 4;
state->CH_Ctrl[15].val[6] = 0;
state->CH_Ctrl[15].addr[7] = 16;
state->CH_Ctrl[15].bit[7] = 5;
state->CH_Ctrl[15].val[7] = 0;
state->CH_Ctrl[15].addr[8] = 16;
state->CH_Ctrl[15].bit[8] = 6;
state->CH_Ctrl[15].val[8] = 0;
state->CH_Ctrl[15].addr[9] = 16;
state->CH_Ctrl[15].bit[9] = 7;
state->CH_Ctrl[15].val[9] = 0;
state->CH_Ctrl[15].addr[10] = 15;
state->CH_Ctrl[15].bit[10] = 0;
state->CH_Ctrl[15].val[10] = 0;
state->CH_Ctrl[15].addr[11] = 15;
state->CH_Ctrl[15].bit[11] = 1;
state->CH_Ctrl[15].val[11] = 0;
state->CH_Ctrl[15].addr[12] = 15;
state->CH_Ctrl[15].bit[12] = 2;
state->CH_Ctrl[15].val[12] = 0;
state->CH_Ctrl[15].addr[13] = 15;
state->CH_Ctrl[15].bit[13] = 3;
state->CH_Ctrl[15].val[13] = 0;
state->CH_Ctrl[15].addr[14] = 15;
state->CH_Ctrl[15].bit[14] = 4;
state->CH_Ctrl[15].val[14] = 0;
state->CH_Ctrl[15].addr[15] = 15;
state->CH_Ctrl[15].bit[15] = 5;
state->CH_Ctrl[15].val[15] = 0;
state->CH_Ctrl[15].addr[16] = 15;
state->CH_Ctrl[15].bit[16] = 6;
state->CH_Ctrl[15].val[16] = 1;
state->CH_Ctrl[15].addr[17] = 15;
state->CH_Ctrl[15].bit[17] = 7;
state->CH_Ctrl[15].val[17] = 1;
state->CH_Ctrl[16].Ctrl_Num = RFSYN_LPF_R ;
state->CH_Ctrl[16].size = 5 ;
state->CH_Ctrl[16].addr[0] = 112;
state->CH_Ctrl[16].bit[0] = 0;
state->CH_Ctrl[16].val[0] = 0;
state->CH_Ctrl[16].addr[1] = 112;
state->CH_Ctrl[16].bit[1] = 1;
state->CH_Ctrl[16].val[1] = 0;
state->CH_Ctrl[16].addr[2] = 112;
state->CH_Ctrl[16].bit[2] = 2;
state->CH_Ctrl[16].val[2] = 0;
state->CH_Ctrl[16].addr[3] = 112;
state->CH_Ctrl[16].bit[3] = 3;
state->CH_Ctrl[16].val[3] = 0;
state->CH_Ctrl[16].addr[4] = 112;
state->CH_Ctrl[16].bit[4] = 4;
state->CH_Ctrl[16].val[4] = 1;
state->CH_Ctrl[17].Ctrl_Num = CHCAL_EN_INT_RF ;
state->CH_Ctrl[17].size = 1 ;
state->CH_Ctrl[17].addr[0] = 14;
state->CH_Ctrl[17].bit[0] = 7;
state->CH_Ctrl[17].val[0] = 0;
state->CH_Ctrl[18].Ctrl_Num = TG_LO_DIVVAL ;
state->CH_Ctrl[18].size = 4 ;
state->CH_Ctrl[18].addr[0] = 107;
state->CH_Ctrl[18].bit[0] = 3;
state->CH_Ctrl[18].val[0] = 0;
state->CH_Ctrl[18].addr[1] = 107;
state->CH_Ctrl[18].bit[1] = 4;
state->CH_Ctrl[18].val[1] = 0;
state->CH_Ctrl[18].addr[2] = 107;
state->CH_Ctrl[18].bit[2] = 5;
state->CH_Ctrl[18].val[2] = 0;
state->CH_Ctrl[18].addr[3] = 107;
state->CH_Ctrl[18].bit[3] = 6;
state->CH_Ctrl[18].val[3] = 0;
state->CH_Ctrl[19].Ctrl_Num = TG_LO_SELVAL ;
state->CH_Ctrl[19].size = 3 ;
state->CH_Ctrl[19].addr[0] = 107;
state->CH_Ctrl[19].bit[0] = 7;
state->CH_Ctrl[19].val[0] = 1;
state->CH_Ctrl[19].addr[1] = 106;
state->CH_Ctrl[19].bit[1] = 0;
state->CH_Ctrl[19].val[1] = 1;
state->CH_Ctrl[19].addr[2] = 106;
state->CH_Ctrl[19].bit[2] = 1;
state->CH_Ctrl[19].val[2] = 1;
state->CH_Ctrl[20].Ctrl_Num = TG_DIV_VAL ;
state->CH_Ctrl[20].size = 11 ;
state->CH_Ctrl[20].addr[0] = 109;
state->CH_Ctrl[20].bit[0] = 2;
state->CH_Ctrl[20].val[0] = 0;
state->CH_Ctrl[20].addr[1] = 109;
state->CH_Ctrl[20].bit[1] = 3;
state->CH_Ctrl[20].val[1] = 0;
state->CH_Ctrl[20].addr[2] = 109;
state->CH_Ctrl[20].bit[2] = 4;
state->CH_Ctrl[20].val[2] = 0;
state->CH_Ctrl[20].addr[3] = 109;
state->CH_Ctrl[20].bit[3] = 5;
state->CH_Ctrl[20].val[3] = 0;
state->CH_Ctrl[20].addr[4] = 109;
state->CH_Ctrl[20].bit[4] = 6;
state->CH_Ctrl[20].val[4] = 0;
state->CH_Ctrl[20].addr[5] = 109;
state->CH_Ctrl[20].bit[5] = 7;
state->CH_Ctrl[20].val[5] = 0;
state->CH_Ctrl[20].addr[6] = 108;
state->CH_Ctrl[20].bit[6] = 0;
state->CH_Ctrl[20].val[6] = 0;
state->CH_Ctrl[20].addr[7] = 108;
state->CH_Ctrl[20].bit[7] = 1;
state->CH_Ctrl[20].val[7] = 0;
state->CH_Ctrl[20].addr[8] = 108;
state->CH_Ctrl[20].bit[8] = 2;
state->CH_Ctrl[20].val[8] = 1;
state->CH_Ctrl[20].addr[9] = 108;
state->CH_Ctrl[20].bit[9] = 3;
state->CH_Ctrl[20].val[9] = 1;
state->CH_Ctrl[20].addr[10] = 108;
state->CH_Ctrl[20].bit[10] = 4;
state->CH_Ctrl[20].val[10] = 1;
state->CH_Ctrl[21].Ctrl_Num = TG_VCO_BIAS ;
state->CH_Ctrl[21].size = 6 ;
state->CH_Ctrl[21].addr[0] = 106;
state->CH_Ctrl[21].bit[0] = 2;
state->CH_Ctrl[21].val[0] = 0;
state->CH_Ctrl[21].addr[1] = 106;
state->CH_Ctrl[21].bit[1] = 3;
state->CH_Ctrl[21].val[1] = 0;
state->CH_Ctrl[21].addr[2] = 106;
state->CH_Ctrl[21].bit[2] = 4;
state->CH_Ctrl[21].val[2] = 0;
state->CH_Ctrl[21].addr[3] = 106;
state->CH_Ctrl[21].bit[3] = 5;
state->CH_Ctrl[21].val[3] = 0;
state->CH_Ctrl[21].addr[4] = 106;
state->CH_Ctrl[21].bit[4] = 6;
state->CH_Ctrl[21].val[4] = 0;
state->CH_Ctrl[21].addr[5] = 106;
state->CH_Ctrl[21].bit[5] = 7;
state->CH_Ctrl[21].val[5] = 1;
state->CH_Ctrl[22].Ctrl_Num = SEQ_EXTPOWERUP ;
state->CH_Ctrl[22].size = 1 ;
state->CH_Ctrl[22].addr[0] = 138;
state->CH_Ctrl[22].bit[0] = 4;
state->CH_Ctrl[22].val[0] = 1;
state->CH_Ctrl[23].Ctrl_Num = OVERRIDE_2 ;
state->CH_Ctrl[23].size = 1 ;
state->CH_Ctrl[23].addr[0] = 17;
state->CH_Ctrl[23].bit[0] = 5;
state->CH_Ctrl[23].val[0] = 0;
state->CH_Ctrl[24].Ctrl_Num = OVERRIDE_3 ;
state->CH_Ctrl[24].size = 1 ;
state->CH_Ctrl[24].addr[0] = 111;
state->CH_Ctrl[24].bit[0] = 3;
state->CH_Ctrl[24].val[0] = 0;
state->CH_Ctrl[25].Ctrl_Num = OVERRIDE_4 ;
state->CH_Ctrl[25].size = 1 ;
state->CH_Ctrl[25].addr[0] = 112;
state->CH_Ctrl[25].bit[0] = 7;
state->CH_Ctrl[25].val[0] = 0;
state->CH_Ctrl[26].Ctrl_Num = SEQ_FSM_PULSE ;
state->CH_Ctrl[26].size = 1 ;
state->CH_Ctrl[26].addr[0] = 136;
state->CH_Ctrl[26].bit[0] = 7;
state->CH_Ctrl[26].val[0] = 0;
state->CH_Ctrl[27].Ctrl_Num = GPIO_4B ;
state->CH_Ctrl[27].size = 1 ;
state->CH_Ctrl[27].addr[0] = 149;
state->CH_Ctrl[27].bit[0] = 7;
state->CH_Ctrl[27].val[0] = 0;
state->CH_Ctrl[28].Ctrl_Num = GPIO_3B ;
state->CH_Ctrl[28].size = 1 ;
state->CH_Ctrl[28].addr[0] = 149;
state->CH_Ctrl[28].bit[0] = 6;
state->CH_Ctrl[28].val[0] = 0;
state->CH_Ctrl[29].Ctrl_Num = GPIO_4 ;
state->CH_Ctrl[29].size = 1 ;
state->CH_Ctrl[29].addr[0] = 149;
state->CH_Ctrl[29].bit[0] = 5;
state->CH_Ctrl[29].val[0] = 1;
state->CH_Ctrl[30].Ctrl_Num = GPIO_3 ;
state->CH_Ctrl[30].size = 1 ;
state->CH_Ctrl[30].addr[0] = 149;
state->CH_Ctrl[30].bit[0] = 4;
state->CH_Ctrl[30].val[0] = 1;
state->CH_Ctrl[31].Ctrl_Num = GPIO_1B ;
state->CH_Ctrl[31].size = 1 ;
state->CH_Ctrl[31].addr[0] = 149;
state->CH_Ctrl[31].bit[0] = 3;
state->CH_Ctrl[31].val[0] = 0;
state->CH_Ctrl[32].Ctrl_Num = DAC_A_ENABLE ;
state->CH_Ctrl[32].size = 1 ;
state->CH_Ctrl[32].addr[0] = 93;
state->CH_Ctrl[32].bit[0] = 1;
state->CH_Ctrl[32].val[0] = 0;
state->CH_Ctrl[33].Ctrl_Num = DAC_B_ENABLE ;
state->CH_Ctrl[33].size = 1 ;
state->CH_Ctrl[33].addr[0] = 93;
state->CH_Ctrl[33].bit[0] = 0;
state->CH_Ctrl[33].val[0] = 0;
state->CH_Ctrl[34].Ctrl_Num = DAC_DIN_A ;
state->CH_Ctrl[34].size = 6 ;
state->CH_Ctrl[34].addr[0] = 92;
state->CH_Ctrl[34].bit[0] = 2;
state->CH_Ctrl[34].val[0] = 0;
state->CH_Ctrl[34].addr[1] = 92;
state->CH_Ctrl[34].bit[1] = 3;
state->CH_Ctrl[34].val[1] = 0;
state->CH_Ctrl[34].addr[2] = 92;
state->CH_Ctrl[34].bit[2] = 4;
state->CH_Ctrl[34].val[2] = 0;
state->CH_Ctrl[34].addr[3] = 92;
state->CH_Ctrl[34].bit[3] = 5;
state->CH_Ctrl[34].val[3] = 0;
state->CH_Ctrl[34].addr[4] = 92;
state->CH_Ctrl[34].bit[4] = 6;
state->CH_Ctrl[34].val[4] = 0;
state->CH_Ctrl[34].addr[5] = 92;
state->CH_Ctrl[34].bit[5] = 7;
state->CH_Ctrl[34].val[5] = 0;
state->CH_Ctrl[35].Ctrl_Num = DAC_DIN_B ;
state->CH_Ctrl[35].size = 6 ;
state->CH_Ctrl[35].addr[0] = 93;
state->CH_Ctrl[35].bit[0] = 2;
state->CH_Ctrl[35].val[0] = 0;
state->CH_Ctrl[35].addr[1] = 93;
state->CH_Ctrl[35].bit[1] = 3;
state->CH_Ctrl[35].val[1] = 0;
state->CH_Ctrl[35].addr[2] = 93;
state->CH_Ctrl[35].bit[2] = 4;
state->CH_Ctrl[35].val[2] = 0;
state->CH_Ctrl[35].addr[3] = 93;
state->CH_Ctrl[35].bit[3] = 5;
state->CH_Ctrl[35].val[3] = 0;
state->CH_Ctrl[35].addr[4] = 93;
state->CH_Ctrl[35].bit[4] = 6;
state->CH_Ctrl[35].val[4] = 0;
state->CH_Ctrl[35].addr[5] = 93;
state->CH_Ctrl[35].bit[5] = 7;
state->CH_Ctrl[35].val[5] = 0;
#ifdef _MXL_PRODUCTION
state->CH_Ctrl[36].Ctrl_Num = RFSYN_EN_DIV ;
state->CH_Ctrl[36].size = 1 ;
state->CH_Ctrl[36].addr[0] = 109;
state->CH_Ctrl[36].bit[0] = 1;
state->CH_Ctrl[36].val[0] = 1;
state->CH_Ctrl[37].Ctrl_Num = RFSYN_DIVM ;
state->CH_Ctrl[37].size = 2 ;
state->CH_Ctrl[37].addr[0] = 112;
state->CH_Ctrl[37].bit[0] = 5;
state->CH_Ctrl[37].val[0] = 0;
state->CH_Ctrl[37].addr[1] = 112;
state->CH_Ctrl[37].bit[1] = 6;
state->CH_Ctrl[37].val[1] = 0;
state->CH_Ctrl[38].Ctrl_Num = DN_BYPASS_AGC_I2C ;
state->CH_Ctrl[38].size = 1 ;
state->CH_Ctrl[38].addr[0] = 65;
state->CH_Ctrl[38].bit[0] = 1;
state->CH_Ctrl[38].val[0] = 0;
#endif
return 0 ;
}
static void InitTunerControls(struct dvb_frontend *fe)
{
MXL5005_RegisterInit(fe);
MXL5005_ControlInit(fe);
#ifdef _MXL_INTERNAL
MXL5005_MXLControlInit(fe);
#endif
}
static u16 MXL5005_TunerConfig(struct dvb_frontend *fe,
u8 Mode, /* 0: Analog Mode ; 1: Digital Mode */
u8 IF_mode, /* for Analog Mode, 0: zero IF; 1: low IF */
u32 Bandwidth, /* filter channel bandwidth (6, 7, 8) */
u32 IF_out, /* Desired IF Out Frequency */
u32 Fxtal, /* XTAL Frequency */
u8 AGC_Mode, /* AGC Mode - Dual AGC: 0, Single AGC: 1 */
u16 TOP, /* 0: Dual AGC; Value: take over point */
u16 IF_OUT_LOAD, /* IF Out Load Resistor (200 / 300 Ohms) */
u8 CLOCK_OUT, /* 0: turn off clk out; 1: turn on clock out */
u8 DIV_OUT, /* 0: Div-1; 1: Div-4 */
u8 CAPSELECT, /* 0: disable On-Chip pulling cap; 1: enable */
u8 EN_RSSI, /* 0: disable RSSI; 1: enable RSSI */
/* Modulation Type; */
/* 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable */
u8 Mod_Type,
/* Tracking Filter */
/* 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H */
u8 TF_Type
)
{
struct mxl5005s_state *state = fe->tuner_priv;
state->Mode = Mode;
state->IF_Mode = IF_mode;
state->Chan_Bandwidth = Bandwidth;
state->IF_OUT = IF_out;
state->Fxtal = Fxtal;
state->AGC_Mode = AGC_Mode;
state->TOP = TOP;
state->IF_OUT_LOAD = IF_OUT_LOAD;
state->CLOCK_OUT = CLOCK_OUT;
state->DIV_OUT = DIV_OUT;
state->CAPSELECT = CAPSELECT;
state->EN_RSSI = EN_RSSI;
state->Mod_Type = Mod_Type;
state->TF_Type = TF_Type;
/* Initialize all the controls and registers */
InitTunerControls(fe);
/* Synthesizer LO frequency calculation */
MXL_SynthIFLO_Calc(fe);
return 0;
}
static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
if (state->Mode == 1) /* Digital Mode */
state->IF_LO = state->IF_OUT;
else /* Analog Mode */ {
if (state->IF_Mode == 0) /* Analog Zero IF mode */
state->IF_LO = state->IF_OUT + 400000;
else /* Analog Low IF mode */
state->IF_LO = state->IF_OUT + state->Chan_Bandwidth/2;
}
}
static void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
if (state->Mode == 1) /* Digital Mode */ {
/* remove 20.48MHz setting for 2.6.10 */
state->RF_LO = state->RF_IN;
/* change for 2.6.6 */
state->TG_LO = state->RF_IN - 750000;
} else /* Analog Mode */ {
if (state->IF_Mode == 0) /* Analog Zero IF mode */ {
state->RF_LO = state->RF_IN - 400000;
state->TG_LO = state->RF_IN - 1750000;
} else /* Analog Low IF mode */ {
state->RF_LO = state->RF_IN - state->Chan_Bandwidth/2;
state->TG_LO = state->RF_IN -
state->Chan_Bandwidth + 500000;
}
}
}
static u16 MXL_OverwriteICDefault(struct dvb_frontend *fe)
{
u16 status = 0;
status += MXL_ControlWrite(fe, OVERRIDE_1, 1);
status += MXL_ControlWrite(fe, OVERRIDE_2, 1);
status += MXL_ControlWrite(fe, OVERRIDE_3, 1);
status += MXL_ControlWrite(fe, OVERRIDE_4, 1);
return status;
}
static u16 MXL_BlockInit(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
u16 status = 0;
status += MXL_OverwriteICDefault(fe);
/* Downconverter Control Dig Ana */
status += MXL_ControlWrite(fe, DN_IQTN_AMP_CUT, state->Mode ? 1 : 0);
/* Filter Control Dig Ana */
status += MXL_ControlWrite(fe, BB_MODE, state->Mode ? 0 : 1);
status += MXL_ControlWrite(fe, BB_BUF, state->Mode ? 3 : 2);
status += MXL_ControlWrite(fe, BB_BUF_OA, state->Mode ? 1 : 0);
status += MXL_ControlWrite(fe, BB_IQSWAP, state->Mode ? 0 : 1);
status += MXL_ControlWrite(fe, BB_INITSTATE_DLPF_TUNE, 0);
/* Initialize Low-Pass Filter */
if (state->Mode) { /* Digital Mode */
switch (state->Chan_Bandwidth) {
case 8000000:
status += MXL_ControlWrite(fe, BB_DLPF_BANDSEL, 0);
break;
case 7000000:
status += MXL_ControlWrite(fe, BB_DLPF_BANDSEL, 2);
break;
case 6000000:
status += MXL_ControlWrite(fe,
BB_DLPF_BANDSEL, 3);
break;
}
} else { /* Analog Mode */
switch (state->Chan_Bandwidth) {
case 8000000: /* Low Zero */
status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT,
(state->IF_Mode ? 0 : 3));
break;
case 7000000:
status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT,
(state->IF_Mode ? 1 : 4));
break;
case 6000000:
status += MXL_ControlWrite(fe, BB_ALPF_BANDSELECT,
(state->IF_Mode ? 2 : 5));
break;
}
}
/* Charge Pump Control Dig Ana */
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, state->Mode ? 5 : 8);
status += MXL_ControlWrite(fe,
RFSYN_EN_CHP_HIGAIN, state->Mode ? 1 : 1);
status += MXL_ControlWrite(fe, EN_CHP_LIN_B, state->Mode ? 0 : 0);
/* AGC TOP Control */
if (state->AGC_Mode == 0) /* Dual AGC */ {
status += MXL_ControlWrite(fe, AGC_IF, 15);
status += MXL_ControlWrite(fe, AGC_RF, 15);
} else /* Single AGC Mode Dig Ana */
status += MXL_ControlWrite(fe, AGC_RF, state->Mode ? 15 : 12);
if (state->TOP == 55) /* TOP == 5.5 */
status += MXL_ControlWrite(fe, AGC_IF, 0x0);
if (state->TOP == 72) /* TOP == 7.2 */
status += MXL_ControlWrite(fe, AGC_IF, 0x1);
if (state->TOP == 92) /* TOP == 9.2 */
status += MXL_ControlWrite(fe, AGC_IF, 0x2);
if (state->TOP == 110) /* TOP == 11.0 */
status += MXL_ControlWrite(fe, AGC_IF, 0x3);
if (state->TOP == 129) /* TOP == 12.9 */
status += MXL_ControlWrite(fe, AGC_IF, 0x4);
if (state->TOP == 147) /* TOP == 14.7 */
status += MXL_ControlWrite(fe, AGC_IF, 0x5);
if (state->TOP == 168) /* TOP == 16.8 */
status += MXL_ControlWrite(fe, AGC_IF, 0x6);
if (state->TOP == 194) /* TOP == 19.4 */
status += MXL_ControlWrite(fe, AGC_IF, 0x7);
if (state->TOP == 212) /* TOP == 21.2 */
status += MXL_ControlWrite(fe, AGC_IF, 0x9);
if (state->TOP == 232) /* TOP == 23.2 */
status += MXL_ControlWrite(fe, AGC_IF, 0xA);
if (state->TOP == 252) /* TOP == 25.2 */
status += MXL_ControlWrite(fe, AGC_IF, 0xB);
if (state->TOP == 271) /* TOP == 27.1 */
status += MXL_ControlWrite(fe, AGC_IF, 0xC);
if (state->TOP == 292) /* TOP == 29.2 */
status += MXL_ControlWrite(fe, AGC_IF, 0xD);
if (state->TOP == 317) /* TOP == 31.7 */
status += MXL_ControlWrite(fe, AGC_IF, 0xE);
if (state->TOP == 349) /* TOP == 34.9 */
status += MXL_ControlWrite(fe, AGC_IF, 0xF);
/* IF Synthesizer Control */
status += MXL_IFSynthInit(fe);
/* IF UpConverter Control */
if (state->IF_OUT_LOAD == 200) {
status += MXL_ControlWrite(fe, DRV_RES_SEL, 6);
status += MXL_ControlWrite(fe, I_DRIVER, 2);
}
if (state->IF_OUT_LOAD == 300) {
status += MXL_ControlWrite(fe, DRV_RES_SEL, 4);
status += MXL_ControlWrite(fe, I_DRIVER, 1);
}
/* Anti-Alias Filtering Control
* initialise Anti-Aliasing Filter
*/
if (state->Mode) { /* Digital Mode */
if (state->IF_OUT >= 4000000UL && state->IF_OUT <= 6280000UL) {
status += MXL_ControlWrite(fe, EN_AAF, 1);
status += MXL_ControlWrite(fe, EN_3P, 1);
status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0);
}
if ((state->IF_OUT == 36125000UL) ||
(state->IF_OUT == 36150000UL)) {
status += MXL_ControlWrite(fe, EN_AAF, 1);
status += MXL_ControlWrite(fe, EN_3P, 1);
status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
status += MXL_ControlWrite(fe, SEL_AAF_BAND, 1);
}
if (state->IF_OUT > 36150000UL) {
status += MXL_ControlWrite(fe, EN_AAF, 0);
status += MXL_ControlWrite(fe, EN_3P, 1);
status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
status += MXL_ControlWrite(fe, SEL_AAF_BAND, 1);
}
} else { /* Analog Mode */
if (state->IF_OUT >= 4000000UL && state->IF_OUT <= 5000000UL) {
status += MXL_ControlWrite(fe, EN_AAF, 1);
status += MXL_ControlWrite(fe, EN_3P, 1);
status += MXL_ControlWrite(fe, EN_AUX_3P, 1);
status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0);
}
if (state->IF_OUT > 5000000UL) {
status += MXL_ControlWrite(fe, EN_AAF, 0);
status += MXL_ControlWrite(fe, EN_3P, 0);
status += MXL_ControlWrite(fe, EN_AUX_3P, 0);
status += MXL_ControlWrite(fe, SEL_AAF_BAND, 0);
}
}
/* Demod Clock Out */
if (state->CLOCK_OUT)
status += MXL_ControlWrite(fe, SEQ_ENCLK16_CLK_OUT, 1);
else
status += MXL_ControlWrite(fe, SEQ_ENCLK16_CLK_OUT, 0);
if (state->DIV_OUT == 1)
status += MXL_ControlWrite(fe, SEQ_SEL4_16B, 1);
if (state->DIV_OUT == 0)
status += MXL_ControlWrite(fe, SEQ_SEL4_16B, 0);
/* Crystal Control */
if (state->CAPSELECT)
status += MXL_ControlWrite(fe, XTAL_CAPSELECT, 1);
else
status += MXL_ControlWrite(fe, XTAL_CAPSELECT, 0);
if (state->Fxtal >= 12000000UL && state->Fxtal <= 16000000UL)
status += MXL_ControlWrite(fe, IF_SEL_DBL, 1);
if (state->Fxtal > 16000000UL && state->Fxtal <= 32000000UL)
status += MXL_ControlWrite(fe, IF_SEL_DBL, 0);
if (state->Fxtal >= 12000000UL && state->Fxtal <= 22000000UL)
status += MXL_ControlWrite(fe, RFSYN_R_DIV, 3);
if (state->Fxtal > 22000000UL && state->Fxtal <= 32000000UL)
status += MXL_ControlWrite(fe, RFSYN_R_DIV, 0);
/* Misc Controls */
if (state->Mode == 0 && state->IF_Mode == 1) /* Analog LowIF mode */
status += MXL_ControlWrite(fe, SEQ_EXTIQFSMPULSE, 0);
else
status += MXL_ControlWrite(fe, SEQ_EXTIQFSMPULSE, 1);
/* status += MXL_ControlRead(fe, IF_DIVVAL, &IF_DIVVAL_Val); */
/* Set TG_R_DIV */
status += MXL_ControlWrite(fe, TG_R_DIV,
MXL_Ceiling(state->Fxtal, 1000000));
/* Apply Default value to BB_INITSTATE_DLPF_TUNE */
/* RSSI Control */
if (state->EN_RSSI) {
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
/* RSSI reference point */
status += MXL_ControlWrite(fe, RFA_RSSI_REF, 2);
status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 3);
status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1);
/* TOP point */
status += MXL_ControlWrite(fe, RFA_FLR, 0);
status += MXL_ControlWrite(fe, RFA_CEIL, 12);
}
/* Modulation type bit settings
* Override the control values preset
*/
if (state->Mod_Type == MXL_DVBT) /* DVB-T Mode */ {
state->AGC_Mode = 1; /* Single AGC Mode */
/* Enable RSSI */
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
/* RSSI reference point */
status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1);
/* TOP point */
status += MXL_ControlWrite(fe, RFA_FLR, 2);
status += MXL_ControlWrite(fe, RFA_CEIL, 13);
if (state->IF_OUT <= 6280000UL) /* Low IF */
status += MXL_ControlWrite(fe, BB_IQSWAP, 0);
else /* High IF */
status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
}
if (state->Mod_Type == MXL_ATSC) /* ATSC Mode */ {
state->AGC_Mode = 1; /* Single AGC Mode */
/* Enable RSSI */
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
/* RSSI reference point */
status += MXL_ControlWrite(fe, RFA_RSSI_REF, 2);
status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 4);
status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 1);
/* TOP point */
status += MXL_ControlWrite(fe, RFA_FLR, 2);
status += MXL_ControlWrite(fe, RFA_CEIL, 13);
status += MXL_ControlWrite(fe, BB_INITSTATE_DLPF_TUNE, 1);
/* Low Zero */
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 5);
if (state->IF_OUT <= 6280000UL) /* Low IF */
status += MXL_ControlWrite(fe, BB_IQSWAP, 0);
else /* High IF */
status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
}
if (state->Mod_Type == MXL_QAM) /* QAM Mode */ {
state->Mode = MXL_DIGITAL_MODE;
/* state->AGC_Mode = 1; */ /* Single AGC Mode */
/* Disable RSSI */ /* change here for v2.6.5 */
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
/* RSSI reference point */
status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2);
/* change here for v2.6.5 */
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
if (state->IF_OUT <= 6280000UL) /* Low IF */
status += MXL_ControlWrite(fe, BB_IQSWAP, 0);
else /* High IF */
status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 2);
}
if (state->Mod_Type == MXL_ANALOG_CABLE) {
/* Analog Cable Mode */
/* state->Mode = MXL_DIGITAL_MODE; */
state->AGC_Mode = 1; /* Single AGC Mode */
/* Disable RSSI */
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
/* change for 2.6.3 */
status += MXL_ControlWrite(fe, AGC_IF, 1);
status += MXL_ControlWrite(fe, AGC_RF, 15);
status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
}
if (state->Mod_Type == MXL_ANALOG_OTA) {
/* Analog OTA Terrestrial mode add for 2.6.7 */
/* state->Mode = MXL_ANALOG_MODE; */
/* Enable RSSI */
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
/* RSSI reference point */
status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2);
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
status += MXL_ControlWrite(fe, BB_IQSWAP, 1);
}
/* RSSI disable */
if (state->EN_RSSI == 0) {
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
}
return status;
}
static u16 MXL_IFSynthInit(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
u16 status = 0 ;
u32 Fref = 0 ;
u32 Kdbl, intModVal ;
u32 fracModVal ;
Kdbl = 2 ;
if (state->Fxtal >= 12000000UL && state->Fxtal <= 16000000UL)
Kdbl = 2 ;
if (state->Fxtal > 16000000UL && state->Fxtal <= 32000000UL)
Kdbl = 1 ;
/* IF Synthesizer Control */
if (state->Mode == 0 && state->IF_Mode == 1) /* Analog Low IF mode */ {
if (state->IF_LO == 41000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 328000000UL ;
}
if (state->IF_LO == 47000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 376000000UL ;
}
if (state->IF_LO == 54000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 324000000UL ;
}
if (state->IF_LO == 60000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 360000000UL ;
}
if (state->IF_LO == 39250000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 314000000UL ;
}
if (state->IF_LO == 39650000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 317200000UL ;
}
if (state->IF_LO == 40150000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 321200000UL ;
}
if (state->IF_LO == 40650000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 325200000UL ;
}
}
if (state->Mode || (state->Mode == 0 && state->IF_Mode == 0)) {
if (state->IF_LO == 57000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 342000000UL ;
}
if (state->IF_LO == 44000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 352000000UL ;
}
if (state->IF_LO == 43750000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 350000000UL ;
}
if (state->IF_LO == 36650000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 366500000UL ;
}
if (state->IF_LO == 36150000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 361500000UL ;
}
if (state->IF_LO == 36000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 360000000UL ;
}
if (state->IF_LO == 35250000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 352500000UL ;
}
if (state->IF_LO == 34750000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 347500000UL ;
}
if (state->IF_LO == 6280000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 376800000UL ;
}
if (state->IF_LO == 5000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 360000000UL ;
}
if (state->IF_LO == 4500000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 360000000UL ;
}
if (state->IF_LO == 4570000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 365600000UL ;
}
if (state->IF_LO == 4000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x05);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 360000000UL ;
}
if (state->IF_LO == 57400000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 344400000UL ;
}
if (state->IF_LO == 44400000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 355200000UL ;
}
if (state->IF_LO == 44150000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x08);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 353200000UL ;
}
if (state->IF_LO == 37050000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 370500000UL ;
}
if (state->IF_LO == 36550000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 365500000UL ;
}
if (state->IF_LO == 36125000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x04);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 361250000UL ;
}
if (state->IF_LO == 6000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 360000000UL ;
}
if (state->IF_LO == 5400000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 324000000UL ;
}
if (state->IF_LO == 5380000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x07);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x0C);
Fref = 322800000UL ;
}
if (state->IF_LO == 5200000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 374400000UL ;
}
if (state->IF_LO == 4900000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x09);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 352800000UL ;
}
if (state->IF_LO == 4400000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x06);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 352000000UL ;
}
if (state->IF_LO == 4063000UL) /* add for 2.6.8 */ {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x05);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);
Fref = 365670000UL ;
}
}
/* CHCAL_INT_MOD_IF */
/* CHCAL_FRAC_MOD_IF */
intModVal = Fref / (state->Fxtal * Kdbl/2);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_IF, intModVal);
fracModVal = (2<<15)*(Fref/1000 - (state->Fxtal/1000 * Kdbl/2) *
intModVal);
fracModVal = fracModVal / ((state->Fxtal * Kdbl/2)/1000);
status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_IF, fracModVal);
return status ;
}
static u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq)
{
struct mxl5005s_state *state = fe->tuner_priv;
u16 status = 0;
u32 divider_val, E3, E4, E5, E5A;
u32 Fmax, Fmin, FmaxBin, FminBin;
u32 Kdbl_RF = 2;
u32 tg_divval;
u32 tg_lo;
u32 Fref_TG;
u32 Fvco;
state->RF_IN = RF_Freq;
MXL_SynthRFTGLO_Calc(fe);
if (state->Fxtal >= 12000000UL && state->Fxtal <= 22000000UL)
Kdbl_RF = 2;
if (state->Fxtal > 22000000 && state->Fxtal <= 32000000)
Kdbl_RF = 1;
/* Downconverter Controls
* Look-Up Table Implementation for:
* DN_POLY
* DN_RFGAIN
* DN_CAP_RFLPF
* DN_EN_VHFUHFBAR
* DN_GAIN_ADJUST
* Change the boundary reference from RF_IN to RF_LO
*/
if (state->RF_LO < 40000000UL)
return -1;
if (state->RF_LO >= 40000000UL && state->RF_LO <= 75000000UL) {
status += MXL_ControlWrite(fe, DN_POLY, 2);
status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 423);
status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 1);
}
if (state->RF_LO > 75000000UL && state->RF_LO <= 100000000UL) {
status += MXL_ControlWrite(fe, DN_POLY, 3);
status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 222);
status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 1);
}
if (state->RF_LO > 100000000UL && state->RF_LO <= 150000000UL) {
status += MXL_ControlWrite(fe, DN_POLY, 3);
status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 147);
status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 2);
}
if (state->RF_LO > 150000000UL && state->RF_LO <= 200000000UL) {
status += MXL_ControlWrite(fe, DN_POLY, 3);
status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 9);
status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 2);
}
if (state->RF_LO > 200000000UL && state->RF_LO <= 300000000UL) {
status += MXL_ControlWrite(fe, DN_POLY, 3);
status += MXL_ControlWrite(fe, DN_RFGAIN, 3);
status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0);
status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 1);
status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3);
}
if (state->RF_LO > 300000000UL && state->RF_LO <= 650000000UL) {
status += MXL_ControlWrite(fe, DN_POLY, 3);
status += MXL_ControlWrite(fe, DN_RFGAIN, 1);
status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0);
status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 0);
status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3);
}
if (state->RF_LO > 650000000UL && state->RF_LO <= 900000000UL) {
status += MXL_ControlWrite(fe, DN_POLY, 3);
status += MXL_ControlWrite(fe, DN_RFGAIN, 2);
status += MXL_ControlWrite(fe, DN_CAP_RFLPF, 0);
status += MXL_ControlWrite(fe, DN_EN_VHFUHFBAR, 0);
status += MXL_ControlWrite(fe, DN_GAIN_ADJUST, 3);
}
if (state->RF_LO > 900000000UL)
return -1;
/* DN_IQTNBUF_AMP */
/* DN_IQTNGNBFBIAS_BST */
if (state->RF_LO >= 40000000UL && state->RF_LO <= 75000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 75000000UL && state->RF_LO <= 100000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 100000000UL && state->RF_LO <= 150000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 150000000UL && state->RF_LO <= 200000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 200000000UL && state->RF_LO <= 300000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 300000000UL && state->RF_LO <= 400000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 400000000UL && state->RF_LO <= 450000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 450000000UL && state->RF_LO <= 500000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 500000000UL && state->RF_LO <= 550000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 550000000UL && state->RF_LO <= 600000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 600000000UL && state->RF_LO <= 650000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 650000000UL && state->RF_LO <= 700000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 700000000UL && state->RF_LO <= 750000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 750000000UL && state->RF_LO <= 800000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 1);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 0);
}
if (state->RF_LO > 800000000UL && state->RF_LO <= 850000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 10);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 1);
}
if (state->RF_LO > 850000000UL && state->RF_LO <= 900000000UL) {
status += MXL_ControlWrite(fe, DN_IQTNBUF_AMP, 10);
status += MXL_ControlWrite(fe, DN_IQTNGNBFBIAS_BST, 1);
}
/*
* Set RF Synth and LO Path Control
*
* Look-Up table implementation for:
* RFSYN_EN_OUTMUX
* RFSYN_SEL_VCO_OUT
* RFSYN_SEL_VCO_HI
* RFSYN_SEL_DIVM
* RFSYN_RF_DIV_BIAS
* DN_SEL_FREQ
*
* Set divider_val, Fmax, Fmix to use in Equations
*/
FminBin = 28000000UL ;
FmaxBin = 42500000UL ;
if (state->RF_LO >= 40000000UL && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
divider_val = 64 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 42500000UL ;
FmaxBin = 56000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
divider_val = 64 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 56000000UL ;
FmaxBin = 85000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
divider_val = 32 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 85000000UL ;
FmaxBin = 112000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 1);
divider_val = 32 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 112000000UL ;
FmaxBin = 170000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 2);
divider_val = 16 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 170000000UL ;
FmaxBin = 225000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 2);
divider_val = 16 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 225000000UL ;
FmaxBin = 300000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 4);
divider_val = 8 ;
Fmax = 340000000UL ;
Fmin = FminBin ;
}
FminBin = 300000000UL ;
FmaxBin = 340000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
divider_val = 8 ;
Fmax = FmaxBin ;
Fmin = 225000000UL ;
}
FminBin = 340000000UL ;
FmaxBin = 450000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 2);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
divider_val = 8 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 450000000UL ;
FmaxBin = 680000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 1);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
divider_val = 4 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 680000000UL ;
FmaxBin = 900000000UL ;
if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 1);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
divider_val = 4 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
/* CHCAL_INT_MOD_RF
* CHCAL_FRAC_MOD_RF
* RFSYN_LPF_R
* CHCAL_EN_INT_RF
*/
/* Equation E3 RFSYN_VCO_BIAS */
E3 = (((Fmax-state->RF_LO)/1000)*32)/((Fmax-Fmin)/1000) + 8 ;
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, E3);
/* Equation E4 CHCAL_INT_MOD_RF */
E4 = (state->RF_LO*divider_val/1000)/(2*state->Fxtal*Kdbl_RF/1000);
MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, E4);
/* Equation E5 CHCAL_FRAC_MOD_RF CHCAL_EN_INT_RF */
E5 = ((2<<17)*(state->RF_LO/10000*divider_val -
(E4*(2*state->Fxtal*Kdbl_RF)/10000))) /
(2*state->Fxtal*Kdbl_RF/10000);
status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_RF, E5);
/* Equation E5A RFSYN_LPF_R */
E5A = (((Fmax - state->RF_LO)/1000)*4/((Fmax-Fmin)/1000)) + 1 ;
status += MXL_ControlWrite(fe, RFSYN_LPF_R, E5A);
/* Euqation E5B CHCAL_EN_INIT_RF */
status += MXL_ControlWrite(fe, CHCAL_EN_INT_RF, ((E5 == 0) ? 1 : 0));
/*if (E5 == 0)
* status += MXL_ControlWrite(fe, CHCAL_EN_INT_RF, 1);
*else
* status += MXL_ControlWrite(fe, CHCAL_FRAC_MOD_RF, E5);
*/
/*
* Set TG Synth
*
* Look-Up table implementation for:
* TG_LO_DIVVAL
* TG_LO_SELVAL
*
* Set divider_val, Fmax, Fmix to use in Equations
*/
if (state->TG_LO < 33000000UL)
return -1;
FminBin = 33000000UL ;
FmaxBin = 50000000UL ;
if (state->TG_LO >= FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x6);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x0);
divider_val = 36 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 50000000UL ;
FmaxBin = 67000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x1);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x0);
divider_val = 24 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 67000000UL ;
FmaxBin = 100000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0xC);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2);
divider_val = 18 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 100000000UL ;
FmaxBin = 150000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2);
divider_val = 12 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 150000000UL ;
FmaxBin = 200000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x2);
divider_val = 8 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 200000000UL ;
FmaxBin = 300000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x3);
divider_val = 6 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 300000000UL ;
FmaxBin = 400000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x3);
divider_val = 4 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 400000000UL ;
FmaxBin = 600000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x8);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x7);
divider_val = 3 ;
Fmax = FmaxBin ;
Fmin = FminBin ;
}
FminBin = 600000000UL ;
FmaxBin = 900000000UL ;
if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
status += MXL_ControlWrite(fe, TG_LO_DIVVAL, 0x0);
status += MXL_ControlWrite(fe, TG_LO_SELVAL, 0x7);
divider_val = 2 ;
}
/* TG_DIV_VAL */
tg_divval = (state->TG_LO*divider_val/100000) *
(MXL_Ceiling(state->Fxtal, 1000000) * 100) /
(state->Fxtal/1000);
status += MXL_ControlWrite(fe, TG_DIV_VAL, tg_divval);
if (state->TG_LO > 600000000UL)
status += MXL_ControlWrite(fe, TG_DIV_VAL, tg_divval + 1);
Fmax = 1800000000UL ;
Fmin = 1200000000UL ;
/* prevent overflow of 32 bit unsigned integer, use
* following equation. Edit for v2.6.4
*/
/* Fref_TF = Fref_TG * 1000 */
Fref_TG = (state->Fxtal/1000) / MXL_Ceiling(state->Fxtal, 1000000);
/* Fvco = Fvco/10 */
Fvco = (state->TG_LO/10000) * divider_val * Fref_TG;
tg_lo = (((Fmax/10 - Fvco)/100)*32) / ((Fmax-Fmin)/1000)+8;
/* below equation is same as above but much harder to debug.
*
* static u32 MXL_GetXtalInt(u32 Xtal_Freq)
* {
* if ((Xtal_Freq % 1000000) == 0)
* return (Xtal_Freq / 10000);
* else
* return (((Xtal_Freq / 1000000) + 1)*100);
* }
*
* u32 Xtal_Int = MXL_GetXtalInt(state->Fxtal);
* tg_lo = ( ((Fmax/10000 * Xtal_Int)/100) -
* ((state->TG_LO/10000)*divider_val *
* (state->Fxtal/10000)/100) )*32/((Fmax-Fmin)/10000 *
* Xtal_Int/100) + 8;
*/
status += MXL_ControlWrite(fe, TG_VCO_BIAS , tg_lo);
/* add for 2.6.5 Special setting for QAM */
if (state->Mod_Type == MXL_QAM) {
if (state->config->qam_gain != 0)
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN,
state->config->qam_gain);
else if (state->RF_IN < 680000000)
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
else
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 2);
}
/* Off Chip Tracking Filter Control */
if (state->TF_Type == MXL_TF_OFF) {
/* Tracking Filter Off State; turn off all the banks */
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 3, 1); /* Bank1 Off */
status += MXL_SetGPIO(fe, 1, 1); /* Bank2 Off */
status += MXL_SetGPIO(fe, 4, 1); /* Bank3 Off */
}
if (state->TF_Type == MXL_TF_C) /* Tracking Filter type C */ {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_ControlWrite(fe, DAC_DIN_A, 0);
if (state->RF_IN >= 43000000 && state->RF_IN < 150000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
status += MXL_SetGPIO(fe, 3, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 1);
}
if (state->RF_IN >= 150000000 && state->RF_IN < 280000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 4, 1);
}
if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 4, 0);
}
if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 0);
}
if (state->RF_IN >= 560000000 && state->RF_IN < 580000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_ControlWrite(fe, DAC_DIN_B, 29);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 0);
}
if (state->RF_IN >= 580000000 && state->RF_IN < 630000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 0);
}
if (state->RF_IN >= 630000000 && state->RF_IN < 700000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_ControlWrite(fe, DAC_DIN_B, 16);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 1);
}
if (state->RF_IN >= 700000000 && state->RF_IN < 760000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_ControlWrite(fe, DAC_DIN_B, 7);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 1);
}
if (state->RF_IN >= 760000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 1);
}
}
if (state->TF_Type == MXL_TF_C_H) {
/* Tracking Filter type C-H for Hauppauge only */
status += MXL_ControlWrite(fe, DAC_DIN_A, 0);
if (state->RF_IN >= 43000000 && state->RF_IN < 150000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
}
if (state->RF_IN >= 150000000 && state->RF_IN < 280000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 0);
status += MXL_SetGPIO(fe, 1, 1);
}
if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 0);
status += MXL_SetGPIO(fe, 1, 0);
}
if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 0);
}
if (state->RF_IN >= 560000000 && state->RF_IN < 580000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 0);
}
if (state->RF_IN >= 580000000 && state->RF_IN < 630000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 0);
}
if (state->RF_IN >= 630000000 && state->RF_IN < 700000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
}
if (state->RF_IN >= 700000000 && state->RF_IN < 760000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
}
if (state->RF_IN >= 760000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
}
}
if (state->TF_Type == MXL_TF_D) { /* Tracking Filter type D */
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
if (state->RF_IN >= 43000000 && state->RF_IN < 174000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 174000000 && state->RF_IN < 250000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 250000000 && state->RF_IN < 310000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 310000000 && state->RF_IN < 360000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 360000000 && state->RF_IN < 470000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 470000000 && state->RF_IN < 640000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 640000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
}
if (state->TF_Type == MXL_TF_D_L) {
/* Tracking Filter type D-L for Lumanate ONLY change 2.6.3 */
status += MXL_ControlWrite(fe, DAC_DIN_A, 0);
/* if UHF and terrestrial => Turn off Tracking Filter */
if (state->RF_IN >= 471000000 &&
(state->RF_IN - 471000000)%6000000 != 0) {
/* Turn off all the banks */
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_ControlWrite(fe, AGC_IF, 10);
} else {
/* if VHF or cable => Turn on Tracking Filter */
if (state->RF_IN >= 43000000 &&
state->RF_IN < 140000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 140000000 &&
state->RF_IN < 240000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 240000000 &&
state->RF_IN < 340000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 340000000 &&
state->RF_IN < 430000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 430000000 &&
state->RF_IN < 470000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 470000000 &&
state->RF_IN < 570000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 570000000 &&
state->RF_IN < 620000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 620000000 &&
state->RF_IN < 760000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 760000000 &&
state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_A_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
}
}
if (state->TF_Type == MXL_TF_E) /* Tracking Filter type E */ {
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
if (state->RF_IN >= 43000000 && state->RF_IN < 174000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 174000000 && state->RF_IN < 250000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 250000000 && state->RF_IN < 310000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 310000000 && state->RF_IN < 360000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 360000000 && state->RF_IN < 470000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 470000000 && state->RF_IN < 640000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 640000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
}
if (state->TF_Type == MXL_TF_F) {
/* Tracking Filter type F */
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
if (state->RF_IN >= 43000000 && state->RF_IN < 160000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 160000000 && state->RF_IN < 210000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 210000000 && state->RF_IN < 300000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 300000000 && state->RF_IN < 390000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 390000000 && state->RF_IN < 515000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 515000000 && state->RF_IN < 650000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 650000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
}
if (state->TF_Type == MXL_TF_E_2) {
/* Tracking Filter type E_2 */
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
if (state->RF_IN >= 43000000 && state->RF_IN < 174000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 174000000 && state->RF_IN < 250000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 250000000 && state->RF_IN < 350000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 350000000 && state->RF_IN < 400000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 400000000 && state->RF_IN < 570000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 570000000 && state->RF_IN < 770000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 770000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
}
if (state->TF_Type == MXL_TF_G) {
/* Tracking Filter type G add for v2.6.8 */
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
if (state->RF_IN >= 50000000 && state->RF_IN < 190000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 190000000 && state->RF_IN < 280000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 280000000 && state->RF_IN < 350000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 350000000 && state->RF_IN < 400000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 400000000 && state->RF_IN < 470000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 470000000 && state->RF_IN < 640000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 640000000 && state->RF_IN < 820000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 820000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
}
if (state->TF_Type == MXL_TF_E_NA) {
/* Tracking Filter type E-NA for Empia ONLY change for 2.6.8 */
status += MXL_ControlWrite(fe, DAC_DIN_B, 0);
/* if UHF and terrestrial=> Turn off Tracking Filter */
if (state->RF_IN >= 471000000 &&
(state->RF_IN - 471000000)%6000000 != 0) {
/* Turn off all the banks */
status += MXL_SetGPIO(fe, 3, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
/* 2.6.12 Turn on RSSI */
status += MXL_ControlWrite(fe, SEQ_EXTSYNTHCALIF, 1);
status += MXL_ControlWrite(fe, SEQ_EXTDCCAL, 1);
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 1);
status += MXL_ControlWrite(fe, RFA_ENCLKRFAGC, 1);
/* RSSI reference point */
status += MXL_ControlWrite(fe, RFA_RSSI_REFH, 5);
status += MXL_ControlWrite(fe, RFA_RSSI_REF, 3);
status += MXL_ControlWrite(fe, RFA_RSSI_REFL, 2);
/* following parameter is from analog OTA mode,
* can be change to seek better performance */
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 3);
} else {
/* if VHF or Cable => Turn on Tracking Filter */
/* 2.6.12 Turn off RSSI */
status += MXL_ControlWrite(fe, AGC_EN_RSSI, 0);
/* change back from above condition */
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, 5);
if (state->RF_IN >= 43000000 && state->RF_IN < 174000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 174000000 && state->RF_IN < 250000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 0);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 250000000 && state->RF_IN < 350000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 1);
}
if (state->RF_IN >= 350000000 && state->RF_IN < 400000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 0);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 400000000 && state->RF_IN < 570000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 0);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 570000000 && state->RF_IN < 770000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 0);
}
if (state->RF_IN >= 770000000 && state->RF_IN <= 900000000) {
status += MXL_ControlWrite(fe, DAC_B_ENABLE, 1);
status += MXL_SetGPIO(fe, 4, 1);
status += MXL_SetGPIO(fe, 1, 1);
status += MXL_SetGPIO(fe, 3, 1);
}
}
}
return status ;
}
static u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val)
{
u16 status = 0;
if (GPIO_Num == 1)
status += MXL_ControlWrite(fe, GPIO_1B, GPIO_Val ? 0 : 1);
/* GPIO2 is not available */
if (GPIO_Num == 3) {
if (GPIO_Val == 1) {
status += MXL_ControlWrite(fe, GPIO_3, 0);
status += MXL_ControlWrite(fe, GPIO_3B, 0);
}
if (GPIO_Val == 0) {
status += MXL_ControlWrite(fe, GPIO_3, 1);
status += MXL_ControlWrite(fe, GPIO_3B, 1);
}
if (GPIO_Val == 3) { /* tri-state */
status += MXL_ControlWrite(fe, GPIO_3, 0);
status += MXL_ControlWrite(fe, GPIO_3B, 1);
}
}
if (GPIO_Num == 4) {
if (GPIO_Val == 1) {
status += MXL_ControlWrite(fe, GPIO_4, 0);
status += MXL_ControlWrite(fe, GPIO_4B, 0);
}
if (GPIO_Val == 0) {
status += MXL_ControlWrite(fe, GPIO_4, 1);
status += MXL_ControlWrite(fe, GPIO_4B, 1);
}
if (GPIO_Val == 3) { /* tri-state */
status += MXL_ControlWrite(fe, GPIO_4, 0);
status += MXL_ControlWrite(fe, GPIO_4B, 1);
}
}
return status;
}
static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value)
{
u16 status = 0;
/* Will write ALL Matching Control Name */
/* Write Matching INIT Control */
status += MXL_ControlWrite_Group(fe, ControlNum, value, 1);
/* Write Matching CH Control */
status += MXL_ControlWrite_Group(fe, ControlNum, value, 2);
#ifdef _MXL_INTERNAL
/* Write Matching MXL Control */
status += MXL_ControlWrite_Group(fe, ControlNum, value, 3);
#endif
return status;
}
static u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum,
u32 value, u16 controlGroup)
{
struct mxl5005s_state *state = fe->tuner_priv;
u16 i, j;
u32 highLimit;
if (controlGroup == 1) /* Initial Control */ {
for (i = 0; i < state->Init_Ctrl_Num; i++) {
if (controlNum == state->Init_Ctrl[i].Ctrl_Num) {
u16 size = min_t(u16, state->Init_Ctrl[i].size,
ARRAY_SIZE(state->Init_Ctrl[i].val));
highLimit = 1 << size;
if (value < highLimit) {
for (j = 0; j < size; j++) {
state->Init_Ctrl[i].val[j] = (u8)((value >> j) & 0x01);
MXL_RegWriteBit(fe, (u8)(state->Init_Ctrl[i].addr[j]),
(u8)(state->Init_Ctrl[i].bit[j]),
(u8)((value>>j) & 0x01));
}
} else
return -1;
}
}
}
if (controlGroup == 2) /* Chan change Control */ {
for (i = 0; i < state->CH_Ctrl_Num; i++) {
if (controlNum == state->CH_Ctrl[i].Ctrl_Num) {
u16 size = min_t(u16, state->CH_Ctrl[i].size,
ARRAY_SIZE(state->CH_Ctrl[i].val));
highLimit = 1 << size;
if (value < highLimit) {
for (j = 0; j < size; j++) {
state->CH_Ctrl[i].val[j] = (u8)((value >> j) & 0x01);
MXL_RegWriteBit(fe, (u8)(state->CH_Ctrl[i].addr[j]),
(u8)(state->CH_Ctrl[i].bit[j]),
(u8)((value>>j) & 0x01));
}
} else
return -1;
}
}
}
#ifdef _MXL_INTERNAL
if (controlGroup == 3) /* Maxlinear Control */ {
for (i = 0; i < state->MXL_Ctrl_Num; i++) {
if (controlNum == state->MXL_Ctrl[i].Ctrl_Num) {
highLimit = (1 << state->MXL_Ctrl[i].size);
if (value < highLimit) {
for (j = 0; j < state->MXL_Ctrl[i].size; j++) {
state->MXL_Ctrl[i].val[j] = (u8)((value >> j) & 0x01);
MXL_RegWriteBit(fe, (u8)(state->MXL_Ctrl[i].addr[j]),
(u8)(state->MXL_Ctrl[i].bit[j]),
(u8)((value>>j) & 0x01));
}
} else
return -1;
}
}
}
#endif
return 0 ; /* successful return */
}
static u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal)
{
struct mxl5005s_state *state = fe->tuner_priv;
int i ;
for (i = 0; i < 104; i++) {
if (RegNum == state->TunerRegs[i].Reg_Num) {
*RegVal = (u8)(state->TunerRegs[i].Reg_Val);
return 0;
}
}
return 1;
}
static u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value)
{
struct mxl5005s_state *state = fe->tuner_priv;
u32 ctrlVal ;
u16 i, k ;
for (i = 0; i < state->Init_Ctrl_Num ; i++) {
if (controlNum == state->Init_Ctrl[i].Ctrl_Num) {
ctrlVal = 0;
for (k = 0; k < state->Init_Ctrl[i].size; k++)
ctrlVal += state->Init_Ctrl[i].val[k] * (1<<k);
*value = ctrlVal;
return 0;
}
}
for (i = 0; i < state->CH_Ctrl_Num ; i++) {
if (controlNum == state->CH_Ctrl[i].Ctrl_Num) {
ctrlVal = 0;
for (k = 0; k < state->CH_Ctrl[i].size; k++)
ctrlVal += state->CH_Ctrl[i].val[k] * (1 << k);
*value = ctrlVal;
return 0;
}
}
#ifdef _MXL_INTERNAL
for (i = 0; i < state->MXL_Ctrl_Num ; i++) {
if (controlNum == state->MXL_Ctrl[i].Ctrl_Num) {
ctrlVal = 0;
for (k = 0; k < state->MXL_Ctrl[i].size; k++)
ctrlVal += state->MXL_Ctrl[i].val[k] * (1<<k);
*value = ctrlVal;
return 0;
}
}
#endif
return 1;
}
static void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit,
u8 bitVal)
{
struct mxl5005s_state *state = fe->tuner_priv;
int i ;
const u8 AND_MAP[8] = {
0xFE, 0xFD, 0xFB, 0xF7,
0xEF, 0xDF, 0xBF, 0x7F } ;
const u8 OR_MAP[8] = {
0x01, 0x02, 0x04, 0x08,
0x10, 0x20, 0x40, 0x80 } ;
for (i = 0; i < state->TunerRegs_Num; i++) {
if (state->TunerRegs[i].Reg_Num == address) {
if (bitVal)
state->TunerRegs[i].Reg_Val |= OR_MAP[bit];
else
state->TunerRegs[i].Reg_Val &= AND_MAP[bit];
break ;
}
}
}
static u32 MXL_Ceiling(u32 value, u32 resolution)
{
return value / resolution + (value % resolution > 0 ? 1 : 0);
}
/* Retrieve the Initialization Registers */
static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum,
u8 *RegVal, int *count)
{
u16 status = 0;
int i ;
static const u8 RegAddr[] = {
11, 12, 13, 22, 32, 43, 44, 53, 56, 59, 73,
76, 77, 91, 134, 135, 137, 147,
156, 166, 167, 168, 25
};
*count = ARRAY_SIZE(RegAddr);
status += MXL_BlockInit(fe);
for (i = 0 ; i < *count; i++) {
RegNum[i] = RegAddr[i];
status += MXL_RegRead(fe, RegNum[i], &RegVal[i]);
}
return status;
}
static u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal,
int *count)
{
u16 status = 0;
int i ;
/* add 77, 166, 167, 168 register for 2.6.12 */
#ifdef _MXL_PRODUCTION
static const u8 RegAddr[] = {
14, 15, 16, 17, 22, 43, 65, 68, 69, 70, 73, 92, 93, 106,
107, 108, 109, 110, 111, 112, 136, 138, 149, 77, 166, 167, 168
};
#else
static const u8 RegAddr[] = {
14, 15, 16, 17, 22, 43, 68, 69, 70, 73, 92, 93, 106,
107, 108, 109, 110, 111, 112, 136, 138, 149, 77, 166, 167, 168
};
/*
u8 RegAddr[171];
for (i = 0; i <= 170; i++)
RegAddr[i] = i;
*/
#endif
*count = ARRAY_SIZE(RegAddr);
for (i = 0 ; i < *count; i++) {
RegNum[i] = RegAddr[i];
status += MXL_RegRead(fe, RegNum[i], &RegVal[i]);
}
return status;
}
static u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum,
u8 *RegVal, int *count)
{
u16 status = 0;
int i;
static const u8 RegAddr[] = {43, 136};
*count = ARRAY_SIZE(RegAddr);
for (i = 0; i < *count; i++) {
RegNum[i] = RegAddr[i];
status += MXL_RegRead(fe, RegNum[i], &RegVal[i]);
}
return status;
}
static u16 MXL_GetMasterControl(u8 *MasterReg, int state)
{
if (state == 1) /* Load_Start */
*MasterReg = 0xF3;
if (state == 2) /* Power_Down */
*MasterReg = 0x41;
if (state == 3) /* Synth_Reset */
*MasterReg = 0xB1;
if (state == 4) /* Seq_Off */
*MasterReg = 0xF1;
return 0;
}
#ifdef _MXL_PRODUCTION
static u16 MXL_VCORange_Test(struct dvb_frontend *fe, int VCO_Range)
{
struct mxl5005s_state *state = fe->tuner_priv;
u16 status = 0 ;
if (VCO_Range == 1) {
status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
if (state->Mode == 0 && state->IF_Mode == 1) {
/* Analog Low IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 180224);
}
if (state->Mode == 0 && state->IF_Mode == 0) {
/* Analog Zero IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 222822);
}
if (state->Mode == 1) /* Digital Mode */ {
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 56);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 229376);
}
}
if (VCO_Range == 2) {
status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 41);
if (state->Mode == 0 && state->IF_Mode == 1) {
/* Analog Low IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 206438);
}
if (state->Mode == 0 && state->IF_Mode == 0) {
/* Analog Zero IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 206438);
}
if (state->Mode == 1) /* Digital Mode */ {
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 1);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 41);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 16384);
}
}
if (VCO_Range == 3) {
status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
if (state->Mode == 0 && state->IF_Mode == 1) {
/* Analog Low IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 44);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 173670);
}
if (state->Mode == 0 && state->IF_Mode == 0) {
/* Analog Zero IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 44);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 173670);
}
if (state->Mode == 1) /* Digital Mode */ {
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 8);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 42);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 245760);
}
}
if (VCO_Range == 4) {
status += MXL_ControlWrite(fe, RFSYN_EN_DIV, 1);
status += MXL_ControlWrite(fe, RFSYN_EN_OUTMUX, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_DIVM, 0);
status += MXL_ControlWrite(fe, RFSYN_DIVM, 1);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_OUT, 1);
status += MXL_ControlWrite(fe, RFSYN_RF_DIV_BIAS, 1);
status += MXL_ControlWrite(fe, DN_SEL_FREQ, 0);
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
if (state->Mode == 0 && state->IF_Mode == 1) {
/* Analog Low IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 206438);
}
if (state->Mode == 0 && state->IF_Mode == 0) {
/* Analog Zero IF Mode */
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 206438);
}
if (state->Mode == 1) /* Digital Mode */ {
status += MXL_ControlWrite(fe, RFSYN_SEL_VCO_HI, 0);
status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, 40);
status += MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, 27);
status += MXL_ControlWrite(fe,
CHCAL_FRAC_MOD_RF, 212992);
}
}
return status;
}
static u16 MXL_Hystersis_Test(struct dvb_frontend *fe, int Hystersis)
{
struct mxl5005s_state *state = fe->tuner_priv;
u16 status = 0;
if (Hystersis == 1)
status += MXL_ControlWrite(fe, DN_BYPASS_AGC_I2C, 1);
return status;
}
#endif
/* End: Reference driver code found in the Realtek driver that
* is copyright MaxLinear */
/* ----------------------------------------------------------------
* Begin: Everything after here is new code to adapt the
* proprietary Realtek driver into a Linux API tuner.
* Copyright (C) 2008 Steven Toth <[email protected]>
*/
static int mxl5005s_reset(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
int ret = 0;
u8 buf[2] = { 0xff, 0x00 };
struct i2c_msg msg = { .addr = state->config->i2c_address, .flags = 0,
.buf = buf, .len = 2 };
dprintk(2, "%s()\n", __func__);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
if (i2c_transfer(state->i2c, &msg, 1) != 1) {
printk(KERN_WARNING "mxl5005s I2C reset failed\n");
ret = -EREMOTEIO;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
return ret;
}
/* Write a single byte to a single reg, latch the value if required by
* following the transaction with the latch byte.
*/
static int mxl5005s_writereg(struct dvb_frontend *fe, u8 reg, u8 val, int latch)
{
struct mxl5005s_state *state = fe->tuner_priv;
u8 buf[3] = { reg, val, MXL5005S_LATCH_BYTE };
struct i2c_msg msg = { .addr = state->config->i2c_address, .flags = 0,
.buf = buf, .len = 3 };
if (latch == 0)
msg.len = 2;
dprintk(2, "%s(0x%x, 0x%x, 0x%x)\n", __func__, reg, val, msg.addr);
if (i2c_transfer(state->i2c, &msg, 1) != 1) {
printk(KERN_WARNING "mxl5005s I2C write failed\n");
return -EREMOTEIO;
}
return 0;
}
static int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable,
u8 *datatable, u8 len)
{
int ret = 0, i;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
for (i = 0 ; i < len-1; i++) {
ret = mxl5005s_writereg(fe, addrtable[i], datatable[i], 0);
if (ret < 0)
break;
}
ret = mxl5005s_writereg(fe, addrtable[i], datatable[i], 1);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
return ret;
}
static int mxl5005s_init(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
state->current_mode = MXL_QAM;
return mxl5005s_reconfigure(fe, MXL_QAM, MXL5005S_BANDWIDTH_6MHZ);
}
static int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type,
u32 bandwidth)
{
struct mxl5005s_state *state = fe->tuner_priv;
u8 *AddrTable;
u8 *ByteTable;
int TableLen;
dprintk(1, "%s(type=%d, bw=%d)\n", __func__, mod_type, bandwidth);
mxl5005s_reset(fe);
AddrTable = kcalloc(MXL5005S_REG_WRITING_TABLE_LEN_MAX, sizeof(u8),
GFP_KERNEL);
if (!AddrTable)
return -ENOMEM;
ByteTable = kcalloc(MXL5005S_REG_WRITING_TABLE_LEN_MAX, sizeof(u8),
GFP_KERNEL);
if (!ByteTable) {
kfree(AddrTable);
return -ENOMEM;
}
/* Tuner initialization stage 0 */
MXL_GetMasterControl(ByteTable, MC_SYNTH_RESET);
AddrTable[0] = MASTER_CONTROL_ADDR;
ByteTable[0] |= state->config->AgcMasterByte;
mxl5005s_writeregs(fe, AddrTable, ByteTable, 1);
mxl5005s_AssignTunerMode(fe, mod_type, bandwidth);
/* Tuner initialization stage 1 */
MXL_GetInitRegister(fe, AddrTable, ByteTable, &TableLen);
mxl5005s_writeregs(fe, AddrTable, ByteTable, TableLen);
kfree(AddrTable);
kfree(ByteTable);
return 0;
}
static int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type,
u32 bandwidth)
{
struct mxl5005s_state *state = fe->tuner_priv;
struct mxl5005s_config *c = state->config;
InitTunerControls(fe);
/* Set MxL5005S parameters. */
MXL5005_TunerConfig(
fe,
c->mod_mode,
c->if_mode,
bandwidth,
c->if_freq,
c->xtal_freq,
c->agc_mode,
c->top,
c->output_load,
c->clock_out,
c->div_out,
c->cap_select,
c->rssi_enable,
mod_type,
c->tracking_filter);
return 0;
}
static int mxl5005s_set_params(struct dvb_frontend *fe)
{
struct mxl5005s_state *state = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 delsys = c->delivery_system;
u32 bw = c->bandwidth_hz;
u32 req_mode, req_bw = 0;
int ret;
dprintk(1, "%s()\n", __func__);
switch (delsys) {
case SYS_ATSC:
req_mode = MXL_ATSC;
req_bw = MXL5005S_BANDWIDTH_6MHZ;
break;
case SYS_DVBC_ANNEX_B:
req_mode = MXL_QAM;
req_bw = MXL5005S_BANDWIDTH_6MHZ;
break;
default: /* Assume DVB-T */
req_mode = MXL_DVBT;
switch (bw) {
case 6000000:
req_bw = MXL5005S_BANDWIDTH_6MHZ;
break;
case 7000000:
req_bw = MXL5005S_BANDWIDTH_7MHZ;
break;
case 8000000:
case 0:
req_bw = MXL5005S_BANDWIDTH_8MHZ;
break;
default:
return -EINVAL;
}
}
/* Change tuner for new modulation type if reqd */
if (req_mode != state->current_mode ||
req_bw != state->Chan_Bandwidth) {
state->current_mode = req_mode;
ret = mxl5005s_reconfigure(fe, req_mode, req_bw);
} else
ret = 0;
if (ret == 0) {
dprintk(1, "%s() freq=%d\n", __func__, c->frequency);
ret = mxl5005s_SetRfFreqHz(fe, c->frequency);
}
return ret;
}
static int mxl5005s_get_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct mxl5005s_state *state = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*frequency = state->RF_IN;
return 0;
}
static int mxl5005s_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
{
struct mxl5005s_state *state = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*bandwidth = state->Chan_Bandwidth;
return 0;
}
static int mxl5005s_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct mxl5005s_state *state = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*frequency = state->IF_OUT;
return 0;
}
static void mxl5005s_release(struct dvb_frontend *fe)
{
dprintk(1, "%s()\n", __func__);
kfree(fe->tuner_priv);
fe->tuner_priv = NULL;
}
static const struct dvb_tuner_ops mxl5005s_tuner_ops = {
.info = {
.name = "MaxLinear MXL5005S",
.frequency_min_hz = 48 * MHz,
.frequency_max_hz = 860 * MHz,
.frequency_step_hz = 50 * kHz,
},
.release = mxl5005s_release,
.init = mxl5005s_init,
.set_params = mxl5005s_set_params,
.get_frequency = mxl5005s_get_frequency,
.get_bandwidth = mxl5005s_get_bandwidth,
.get_if_frequency = mxl5005s_get_if_frequency,
};
struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
struct mxl5005s_config *config)
{
struct mxl5005s_state *state = NULL;
dprintk(1, "%s()\n", __func__);
state = kzalloc(sizeof(struct mxl5005s_state), GFP_KERNEL);
if (state == NULL)
return NULL;
state->frontend = fe;
state->config = config;
state->i2c = i2c;
printk(KERN_INFO "MXL5005S: Attached at address 0x%02x\n",
config->i2c_address);
memcpy(&fe->ops.tuner_ops, &mxl5005s_tuner_ops,
sizeof(struct dvb_tuner_ops));
fe->tuner_priv = state;
return fe;
}
EXPORT_SYMBOL_GPL(mxl5005s_attach);
MODULE_DESCRIPTION("MaxLinear MXL5005S silicon tuner driver");
MODULE_AUTHOR("Steven Toth");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/tuners/mxl5005s.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Xceive XC4000 "QAM/8VSB single chip tuner"
*
* Copyright (c) 2007 Xceive Corporation
* Copyright (c) 2007 Steven Toth <[email protected]>
* Copyright (c) 2009 Devin Heitmueller <[email protected]>
* Copyright (c) 2009 Davide Ferri <[email protected]>
* Copyright (c) 2010 Istvan Varga <[email protected]>
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/videodev2.h>
#include <linux/delay.h>
#include <linux/dvb/frontend.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <asm/unaligned.h>
#include <media/dvb_frontend.h>
#include "xc4000.h"
#include "tuner-i2c.h"
#include "xc2028-types.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Debugging level (0 to 2, default: 0 (off)).");
static int no_poweroff;
module_param(no_poweroff, int, 0644);
MODULE_PARM_DESC(no_poweroff, "Power management (1: disabled, 2: enabled, 0 (default): use device-specific default mode).");
static int audio_std;
module_param(audio_std, int, 0644);
MODULE_PARM_DESC(audio_std, "Audio standard. XC4000 audio decoder explicitly needs to know what audio standard is needed for some video standards with audio A2 or NICAM. The valid settings are a sum of:\n"
" 1: use NICAM/B or A2/B instead of NICAM/A or A2/A\n"
" 2: use A2 instead of NICAM or BTSC\n"
" 4: use SECAM/K3 instead of K1\n"
" 8: use PAL-D/K audio for SECAM-D/K\n"
"16: use FM radio input 1 instead of input 2\n"
"32: use mono audio (the lower three bits are ignored)");
static char firmware_name[30];
module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the default firmware name.");
static DEFINE_MUTEX(xc4000_list_mutex);
static LIST_HEAD(hybrid_tuner_instance_list);
#define dprintk(level, fmt, arg...) if (debug >= level) \
printk(KERN_INFO "%s: " fmt, "xc4000", ## arg)
/* struct for storing firmware table */
struct firmware_description {
unsigned int type;
v4l2_std_id id;
__u16 int_freq;
unsigned char *ptr;
unsigned int size;
};
struct firmware_properties {
unsigned int type;
v4l2_std_id id;
v4l2_std_id std_req;
__u16 int_freq;
unsigned int scode_table;
int scode_nr;
};
struct xc4000_priv {
struct tuner_i2c_props i2c_props;
struct list_head hybrid_tuner_instance_list;
struct firmware_description *firm;
int firm_size;
u32 if_khz;
u32 freq_hz, freq_offset;
u32 bandwidth;
u8 video_standard;
u8 rf_mode;
u8 default_pm;
u8 dvb_amplitude;
u8 set_smoothedcvbs;
u8 ignore_i2c_write_errors;
__u16 firm_version;
struct firmware_properties cur_fw;
__u16 hwmodel;
__u16 hwvers;
struct mutex lock;
};
#define XC4000_AUDIO_STD_B 1
#define XC4000_AUDIO_STD_A2 2
#define XC4000_AUDIO_STD_K3 4
#define XC4000_AUDIO_STD_L 8
#define XC4000_AUDIO_STD_INPUT1 16
#define XC4000_AUDIO_STD_MONO 32
#define XC4000_DEFAULT_FIRMWARE "dvb-fe-xc4000-1.4.fw"
#define XC4000_DEFAULT_FIRMWARE_NEW "dvb-fe-xc4000-1.4.1.fw"
/* Misc Defines */
#define MAX_TV_STANDARD 24
#define XC_MAX_I2C_WRITE_LENGTH 64
#define XC_POWERED_DOWN 0x80000000U
/* Signal Types */
#define XC_RF_MODE_AIR 0
#define XC_RF_MODE_CABLE 1
/* Product id */
#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
#define XC_PRODUCT_ID_XC4000 0x0FA0
#define XC_PRODUCT_ID_XC4100 0x1004
/* Registers (Write-only) */
#define XREG_INIT 0x00
#define XREG_VIDEO_MODE 0x01
#define XREG_AUDIO_MODE 0x02
#define XREG_RF_FREQ 0x03
#define XREG_D_CODE 0x04
#define XREG_DIRECTSITTING_MODE 0x05
#define XREG_SEEK_MODE 0x06
#define XREG_POWER_DOWN 0x08
#define XREG_SIGNALSOURCE 0x0A
#define XREG_SMOOTHEDCVBS 0x0E
#define XREG_AMPLITUDE 0x10
/* Registers (Read-only) */
#define XREG_ADC_ENV 0x00
#define XREG_QUALITY 0x01
#define XREG_FRAME_LINES 0x02
#define XREG_HSYNC_FREQ 0x03
#define XREG_LOCK 0x04
#define XREG_FREQ_ERROR 0x05
#define XREG_SNR 0x06
#define XREG_VERSION 0x07
#define XREG_PRODUCT_ID 0x08
#define XREG_SIGNAL_LEVEL 0x0A
#define XREG_NOISE_LEVEL 0x0B
/*
Basic firmware description. This will remain with
the driver for documentation purposes.
This represents an I2C firmware file encoded as a
string of unsigned char. Format is as follows:
char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
char[1 ]=len0_LSB -> length of first write transaction
char[2 ]=data0 -> first byte to be sent
char[3 ]=data1
char[4 ]=data2
char[ ]=...
char[M ]=dataN -> last byte to be sent
char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
char[M+2]=len1_LSB -> length of second write transaction
char[M+3]=data0
char[M+4]=data1
...
etc.
The [len] value should be interpreted as follows:
len= len_MSB _ len_LSB
len=1111_1111_1111_1111 : End of I2C_SEQUENCE
len=0000_0000_0000_0000 : Reset command: Do hardware reset
len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
For the RESET and WAIT commands, the two following bytes will contain
immediately the length of the following transaction.
*/
struct XC_TV_STANDARD {
const char *Name;
u16 audio_mode;
u16 video_mode;
u16 int_freq;
};
/* Tuner standards */
#define XC4000_MN_NTSC_PAL_BTSC 0
#define XC4000_MN_NTSC_PAL_A2 1
#define XC4000_MN_NTSC_PAL_EIAJ 2
#define XC4000_MN_NTSC_PAL_Mono 3
#define XC4000_BG_PAL_A2 4
#define XC4000_BG_PAL_NICAM 5
#define XC4000_BG_PAL_MONO 6
#define XC4000_I_PAL_NICAM 7
#define XC4000_I_PAL_NICAM_MONO 8
#define XC4000_DK_PAL_A2 9
#define XC4000_DK_PAL_NICAM 10
#define XC4000_DK_PAL_MONO 11
#define XC4000_DK_SECAM_A2DK1 12
#define XC4000_DK_SECAM_A2LDK3 13
#define XC4000_DK_SECAM_A2MONO 14
#define XC4000_DK_SECAM_NICAM 15
#define XC4000_L_SECAM_NICAM 16
#define XC4000_LC_SECAM_NICAM 17
#define XC4000_DTV6 18
#define XC4000_DTV8 19
#define XC4000_DTV7_8 20
#define XC4000_DTV7 21
#define XC4000_FM_Radio_INPUT2 22
#define XC4000_FM_Radio_INPUT1 23
static struct XC_TV_STANDARD xc4000_standard[MAX_TV_STANDARD] = {
{"M/N-NTSC/PAL-BTSC", 0x0000, 0x80A0, 4500},
{"M/N-NTSC/PAL-A2", 0x0000, 0x80A0, 4600},
{"M/N-NTSC/PAL-EIAJ", 0x0040, 0x80A0, 4500},
{"M/N-NTSC/PAL-Mono", 0x0078, 0x80A0, 4500},
{"B/G-PAL-A2", 0x0000, 0x8159, 5640},
{"B/G-PAL-NICAM", 0x0004, 0x8159, 5740},
{"B/G-PAL-MONO", 0x0078, 0x8159, 5500},
{"I-PAL-NICAM", 0x0080, 0x8049, 6240},
{"I-PAL-NICAM-MONO", 0x0078, 0x8049, 6000},
{"D/K-PAL-A2", 0x0000, 0x8049, 6380},
{"D/K-PAL-NICAM", 0x0080, 0x8049, 6200},
{"D/K-PAL-MONO", 0x0078, 0x8049, 6500},
{"D/K-SECAM-A2 DK1", 0x0000, 0x8049, 6340},
{"D/K-SECAM-A2 L/DK3", 0x0000, 0x8049, 6000},
{"D/K-SECAM-A2 MONO", 0x0078, 0x8049, 6500},
{"D/K-SECAM-NICAM", 0x0080, 0x8049, 6200},
{"L-SECAM-NICAM", 0x8080, 0x0009, 6200},
{"L'-SECAM-NICAM", 0x8080, 0x4009, 6200},
{"DTV6", 0x00C0, 0x8002, 0},
{"DTV8", 0x00C0, 0x800B, 0},
{"DTV7/8", 0x00C0, 0x801B, 0},
{"DTV7", 0x00C0, 0x8007, 0},
{"FM Radio-INPUT2", 0x0008, 0x9800, 10700},
{"FM Radio-INPUT1", 0x0008, 0x9000, 10700}
};
static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val);
static int xc4000_tuner_reset(struct dvb_frontend *fe);
static void xc_debug_dump(struct xc4000_priv *priv);
static int xc_send_i2c_data(struct xc4000_priv *priv, u8 *buf, int len)
{
struct i2c_msg msg = { .addr = priv->i2c_props.addr,
.flags = 0, .buf = buf, .len = len };
if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
if (priv->ignore_i2c_write_errors == 0) {
printk(KERN_ERR "xc4000: I2C write failed (len=%i)\n",
len);
if (len == 4) {
printk(KERN_ERR "bytes %*ph\n", 4, buf);
}
return -EREMOTEIO;
}
}
return 0;
}
static int xc4000_tuner_reset(struct dvb_frontend *fe)
{
struct xc4000_priv *priv = fe->tuner_priv;
int ret;
dprintk(1, "%s()\n", __func__);
if (fe->callback) {
ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
fe->dvb->priv :
priv->i2c_props.adap->algo_data,
DVB_FRONTEND_COMPONENT_TUNER,
XC4000_TUNER_RESET, 0);
if (ret) {
printk(KERN_ERR "xc4000: reset failed\n");
return -EREMOTEIO;
}
} else {
printk(KERN_ERR "xc4000: no tuner reset callback function, fatal\n");
return -EINVAL;
}
return 0;
}
static int xc_write_reg(struct xc4000_priv *priv, u16 regAddr, u16 i2cData)
{
u8 buf[4];
buf[0] = (regAddr >> 8) & 0xFF;
buf[1] = regAddr & 0xFF;
buf[2] = (i2cData >> 8) & 0xFF;
buf[3] = i2cData & 0xFF;
return xc_send_i2c_data(priv, buf, 4);
}
static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
{
struct xc4000_priv *priv = fe->tuner_priv;
int i, nbytes_to_send, result;
unsigned int len, pos, index;
u8 buf[XC_MAX_I2C_WRITE_LENGTH];
index = 0;
while ((i2c_sequence[index] != 0xFF) ||
(i2c_sequence[index + 1] != 0xFF)) {
len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
if (len == 0x0000) {
/* RESET command */
/* NOTE: this is ignored, as the reset callback was */
/* already called by check_firmware() */
index += 2;
} else if (len & 0x8000) {
/* WAIT command */
msleep(len & 0x7FFF);
index += 2;
} else {
/* Send i2c data whilst ensuring individual transactions
* do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
*/
index += 2;
buf[0] = i2c_sequence[index];
buf[1] = i2c_sequence[index + 1];
pos = 2;
while (pos < len) {
if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
nbytes_to_send =
XC_MAX_I2C_WRITE_LENGTH;
else
nbytes_to_send = (len - pos + 2);
for (i = 2; i < nbytes_to_send; i++) {
buf[i] = i2c_sequence[index + pos +
i - 2];
}
result = xc_send_i2c_data(priv, buf,
nbytes_to_send);
if (result != 0)
return result;
pos += nbytes_to_send - 2;
}
index += len;
}
}
return 0;
}
static int xc_set_tv_standard(struct xc4000_priv *priv,
u16 video_mode, u16 audio_mode)
{
int ret;
dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode);
dprintk(1, "%s() Standard = %s\n",
__func__,
xc4000_standard[priv->video_standard].Name);
/* Don't complain when the request fails because of i2c stretching */
priv->ignore_i2c_write_errors = 1;
ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode);
if (ret == 0)
ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode);
priv->ignore_i2c_write_errors = 0;
return ret;
}
static int xc_set_signal_source(struct xc4000_priv *priv, u16 rf_mode)
{
dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
rf_mode = XC_RF_MODE_CABLE;
printk(KERN_ERR
"%s(), Invalid mode, defaulting to CABLE",
__func__);
}
return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
}
static const struct dvb_tuner_ops xc4000_tuner_ops;
static int xc_set_rf_frequency(struct xc4000_priv *priv, u32 freq_hz)
{
u16 freq_code;
dprintk(1, "%s(%u)\n", __func__, freq_hz);
if ((freq_hz > xc4000_tuner_ops.info.frequency_max_hz) ||
(freq_hz < xc4000_tuner_ops.info.frequency_min_hz))
return -EINVAL;
freq_code = (u16)(freq_hz / 15625);
/* WAS: Starting in firmware version 1.1.44, Xceive recommends using the
FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
only be used for fast scanning for channel lock) */
/* WAS: XREG_FINERFREQ */
return xc_write_reg(priv, XREG_RF_FREQ, freq_code);
}
static int xc_get_adc_envelope(struct xc4000_priv *priv, u16 *adc_envelope)
{
return xc4000_readreg(priv, XREG_ADC_ENV, adc_envelope);
}
static int xc_get_frequency_error(struct xc4000_priv *priv, u32 *freq_error_hz)
{
int result;
u16 regData;
u32 tmp;
result = xc4000_readreg(priv, XREG_FREQ_ERROR, ®Data);
if (result != 0)
return result;
tmp = (u32)regData & 0xFFFFU;
tmp = (tmp < 0x8000U ? tmp : 0x10000U - tmp);
(*freq_error_hz) = tmp * 15625;
return result;
}
static int xc_get_lock_status(struct xc4000_priv *priv, u16 *lock_status)
{
return xc4000_readreg(priv, XREG_LOCK, lock_status);
}
static int xc_get_version(struct xc4000_priv *priv,
u8 *hw_majorversion, u8 *hw_minorversion,
u8 *fw_majorversion, u8 *fw_minorversion)
{
u16 data;
int result;
result = xc4000_readreg(priv, XREG_VERSION, &data);
if (result != 0)
return result;
(*hw_majorversion) = (data >> 12) & 0x0F;
(*hw_minorversion) = (data >> 8) & 0x0F;
(*fw_majorversion) = (data >> 4) & 0x0F;
(*fw_minorversion) = data & 0x0F;
return 0;
}
static int xc_get_hsync_freq(struct xc4000_priv *priv, u32 *hsync_freq_hz)
{
u16 regData;
int result;
result = xc4000_readreg(priv, XREG_HSYNC_FREQ, ®Data);
if (result != 0)
return result;
(*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100;
return result;
}
static int xc_get_frame_lines(struct xc4000_priv *priv, u16 *frame_lines)
{
return xc4000_readreg(priv, XREG_FRAME_LINES, frame_lines);
}
static int xc_get_quality(struct xc4000_priv *priv, u16 *quality)
{
return xc4000_readreg(priv, XREG_QUALITY, quality);
}
static int xc_get_signal_level(struct xc4000_priv *priv, u16 *signal)
{
return xc4000_readreg(priv, XREG_SIGNAL_LEVEL, signal);
}
static int xc_get_noise_level(struct xc4000_priv *priv, u16 *noise)
{
return xc4000_readreg(priv, XREG_NOISE_LEVEL, noise);
}
static u16 xc_wait_for_lock(struct xc4000_priv *priv)
{
u16 lock_state = 0;
int watchdog_count = 40;
while ((lock_state == 0) && (watchdog_count > 0)) {
xc_get_lock_status(priv, &lock_state);
if (lock_state != 1) {
msleep(5);
watchdog_count--;
}
}
return lock_state;
}
static int xc_tune_channel(struct xc4000_priv *priv, u32 freq_hz)
{
int found = 1;
int result;
dprintk(1, "%s(%u)\n", __func__, freq_hz);
/* Don't complain when the request fails because of i2c stretching */
priv->ignore_i2c_write_errors = 1;
result = xc_set_rf_frequency(priv, freq_hz);
priv->ignore_i2c_write_errors = 0;
if (result != 0)
return 0;
/* wait for lock only in analog TV mode */
if ((priv->cur_fw.type & (FM | DTV6 | DTV7 | DTV78 | DTV8)) == 0) {
if (xc_wait_for_lock(priv) != 1)
found = 0;
}
/* Wait for stats to stabilize.
* Frame Lines needs two frame times after initial lock
* before it is valid.
*/
msleep(debug ? 100 : 10);
if (debug)
xc_debug_dump(priv);
return found;
}
static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val)
{
u8 buf[2] = { reg >> 8, reg & 0xff };
u8 bval[2] = { 0, 0 };
struct i2c_msg msg[2] = {
{ .addr = priv->i2c_props.addr,
.flags = 0, .buf = &buf[0], .len = 2 },
{ .addr = priv->i2c_props.addr,
.flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
};
if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
printk(KERN_ERR "xc4000: I2C read failed\n");
return -EREMOTEIO;
}
*val = (bval[0] << 8) | bval[1];
return 0;
}
#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0)
static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
{
if (type & BASE)
printk(KERN_CONT "BASE ");
if (type & INIT1)
printk(KERN_CONT "INIT1 ");
if (type & F8MHZ)
printk(KERN_CONT "F8MHZ ");
if (type & MTS)
printk(KERN_CONT "MTS ");
if (type & D2620)
printk(KERN_CONT "D2620 ");
if (type & D2633)
printk(KERN_CONT "D2633 ");
if (type & DTV6)
printk(KERN_CONT "DTV6 ");
if (type & QAM)
printk(KERN_CONT "QAM ");
if (type & DTV7)
printk(KERN_CONT "DTV7 ");
if (type & DTV78)
printk(KERN_CONT "DTV78 ");
if (type & DTV8)
printk(KERN_CONT "DTV8 ");
if (type & FM)
printk(KERN_CONT "FM ");
if (type & INPUT1)
printk(KERN_CONT "INPUT1 ");
if (type & LCD)
printk(KERN_CONT "LCD ");
if (type & NOGD)
printk(KERN_CONT "NOGD ");
if (type & MONO)
printk(KERN_CONT "MONO ");
if (type & ATSC)
printk(KERN_CONT "ATSC ");
if (type & IF)
printk(KERN_CONT "IF ");
if (type & LG60)
printk(KERN_CONT "LG60 ");
if (type & ATI638)
printk(KERN_CONT "ATI638 ");
if (type & OREN538)
printk(KERN_CONT "OREN538 ");
if (type & OREN36)
printk(KERN_CONT "OREN36 ");
if (type & TOYOTA388)
printk(KERN_CONT "TOYOTA388 ");
if (type & TOYOTA794)
printk(KERN_CONT "TOYOTA794 ");
if (type & DIBCOM52)
printk(KERN_CONT "DIBCOM52 ");
if (type & ZARLINK456)
printk(KERN_CONT "ZARLINK456 ");
if (type & CHINA)
printk(KERN_CONT "CHINA ");
if (type & F6MHZ)
printk(KERN_CONT "F6MHZ ");
if (type & INPUT2)
printk(KERN_CONT "INPUT2 ");
if (type & SCODE)
printk(KERN_CONT "SCODE ");
if (type & HAS_IF)
printk(KERN_CONT "HAS_IF_%d ", int_freq);
}
static int seek_firmware(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id *id)
{
struct xc4000_priv *priv = fe->tuner_priv;
int i, best_i = -1;
unsigned int best_nr_diffs = 255U;
if (!priv->firm) {
printk(KERN_ERR "Error! firmware not loaded\n");
return -EINVAL;
}
if (((type & ~SCODE) == 0) && (*id == 0))
*id = V4L2_STD_PAL;
/* Seek for generic video standard match */
for (i = 0; i < priv->firm_size; i++) {
v4l2_std_id id_diff_mask =
(priv->firm[i].id ^ (*id)) & (*id);
unsigned int type_diff_mask =
(priv->firm[i].type ^ type)
& (BASE_TYPES | DTV_TYPES | LCD | NOGD | MONO | SCODE);
unsigned int nr_diffs;
if (type_diff_mask
& (BASE | INIT1 | FM | DTV6 | DTV7 | DTV78 | DTV8 | SCODE))
continue;
nr_diffs = hweight64(id_diff_mask) + hweight32(type_diff_mask);
if (!nr_diffs) /* Supports all the requested standards */
goto found;
if (nr_diffs < best_nr_diffs) {
best_nr_diffs = nr_diffs;
best_i = i;
}
}
/* FIXME: Would make sense to seek for type "hint" match ? */
if (best_i < 0) {
i = -ENOENT;
goto ret;
}
if (best_nr_diffs > 0U) {
printk(KERN_WARNING
"Selecting best matching firmware (%u bits differ) for type=(%x), id %016llx:\n",
best_nr_diffs, type, (unsigned long long)*id);
i = best_i;
}
found:
*id = priv->firm[i].id;
ret:
if (debug) {
printk(KERN_DEBUG "%s firmware for type=",
(i < 0) ? "Can't find" : "Found");
dump_firm_type(type);
printk(KERN_DEBUG "(%x), id %016llx.\n", type, (unsigned long long)*id);
}
return i;
}
static int load_firmware(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id *id)
{
struct xc4000_priv *priv = fe->tuner_priv;
int pos, rc;
unsigned char *p;
pos = seek_firmware(fe, type, id);
if (pos < 0)
return pos;
p = priv->firm[pos].ptr;
/* Don't complain when the request fails because of i2c stretching */
priv->ignore_i2c_write_errors = 1;
rc = xc_load_i2c_sequence(fe, p);
priv->ignore_i2c_write_errors = 0;
return rc;
}
static int xc4000_fwupload(struct dvb_frontend *fe)
{
struct xc4000_priv *priv = fe->tuner_priv;
const struct firmware *fw = NULL;
const unsigned char *p, *endp;
int rc = 0;
int n, n_array;
char name[33];
const char *fname;
if (firmware_name[0] != '\0') {
fname = firmware_name;
dprintk(1, "Reading custom firmware %s\n", fname);
rc = request_firmware(&fw, fname,
priv->i2c_props.adap->dev.parent);
} else {
fname = XC4000_DEFAULT_FIRMWARE_NEW;
dprintk(1, "Trying to read firmware %s\n", fname);
rc = request_firmware(&fw, fname,
priv->i2c_props.adap->dev.parent);
if (rc == -ENOENT) {
fname = XC4000_DEFAULT_FIRMWARE;
dprintk(1, "Trying to read firmware %s\n", fname);
rc = request_firmware(&fw, fname,
priv->i2c_props.adap->dev.parent);
}
}
if (rc < 0) {
if (rc == -ENOENT)
printk(KERN_ERR "Error: firmware %s not found.\n", fname);
else
printk(KERN_ERR "Error %d while requesting firmware %s\n",
rc, fname);
return rc;
}
dprintk(1, "Loading Firmware: %s\n", fname);
p = fw->data;
endp = p + fw->size;
if (fw->size < sizeof(name) - 1 + 2 + 2) {
printk(KERN_ERR "Error: firmware file %s has invalid size!\n",
fname);
goto corrupt;
}
memcpy(name, p, sizeof(name) - 1);
name[sizeof(name) - 1] = '\0';
p += sizeof(name) - 1;
priv->firm_version = get_unaligned_le16(p);
p += 2;
n_array = get_unaligned_le16(p);
p += 2;
dprintk(1, "Loading %d firmware images from %s, type: %s, ver %d.%d\n",
n_array, fname, name,
priv->firm_version >> 8, priv->firm_version & 0xff);
priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
if (priv->firm == NULL) {
printk(KERN_ERR "Not enough memory to load firmware file.\n");
rc = -ENOMEM;
goto done;
}
priv->firm_size = n_array;
n = -1;
while (p < endp) {
__u32 type, size;
v4l2_std_id id;
__u16 int_freq = 0;
n++;
if (n >= n_array) {
printk(KERN_ERR "More firmware images in file than were expected!\n");
goto corrupt;
}
/* Checks if there's enough bytes to read */
if (endp - p < sizeof(type) + sizeof(id) + sizeof(size))
goto header;
type = get_unaligned_le32(p);
p += sizeof(type);
id = get_unaligned_le64(p);
p += sizeof(id);
if (type & HAS_IF) {
int_freq = get_unaligned_le16(p);
p += sizeof(int_freq);
if (endp - p < sizeof(size))
goto header;
}
size = get_unaligned_le32(p);
p += sizeof(size);
if (!size || size > endp - p) {
printk(KERN_ERR "Firmware type (%x), id %llx is corrupted (size=%zd, expected %d)\n",
type, (unsigned long long)id,
endp - p, size);
goto corrupt;
}
priv->firm[n].ptr = kmemdup(p, size, GFP_KERNEL);
if (priv->firm[n].ptr == NULL) {
printk(KERN_ERR "Not enough memory to load firmware file.\n");
rc = -ENOMEM;
goto done;
}
if (debug) {
printk(KERN_DEBUG "Reading firmware type ");
dump_firm_type_and_int_freq(type, int_freq);
printk(KERN_DEBUG "(%x), id %llx, size=%d.\n",
type, (unsigned long long)id, size);
}
priv->firm[n].type = type;
priv->firm[n].id = id;
priv->firm[n].size = size;
priv->firm[n].int_freq = int_freq;
p += size;
}
if (n + 1 != priv->firm_size) {
printk(KERN_ERR "Firmware file is incomplete!\n");
goto corrupt;
}
goto done;
header:
printk(KERN_ERR "Firmware header is incomplete!\n");
corrupt:
rc = -EINVAL;
printk(KERN_ERR "Error: firmware file is corrupted!\n");
done:
release_firmware(fw);
if (rc == 0)
dprintk(1, "Firmware files loaded.\n");
return rc;
}
static int load_scode(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id *id, __u16 int_freq, int scode)
{
struct xc4000_priv *priv = fe->tuner_priv;
int pos, rc;
unsigned char *p;
u8 scode_buf[13];
u8 indirect_mode[5];
dprintk(1, "%s called int_freq=%d\n", __func__, int_freq);
if (!int_freq) {
pos = seek_firmware(fe, type, id);
if (pos < 0)
return pos;
} else {
for (pos = 0; pos < priv->firm_size; pos++) {
if ((priv->firm[pos].int_freq == int_freq) &&
(priv->firm[pos].type & HAS_IF))
break;
}
if (pos == priv->firm_size)
return -ENOENT;
}
p = priv->firm[pos].ptr;
if (priv->firm[pos].size != 12 * 16 || scode >= 16)
return -EINVAL;
p += 12 * scode;
if (debug) {
tuner_info("Loading SCODE for type=");
dump_firm_type_and_int_freq(priv->firm[pos].type,
priv->firm[pos].int_freq);
printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type,
(unsigned long long)*id);
}
scode_buf[0] = 0x00;
memcpy(&scode_buf[1], p, 12);
/* Enter direct-mode */
rc = xc_write_reg(priv, XREG_DIRECTSITTING_MODE, 0);
if (rc < 0) {
printk(KERN_ERR "failed to put device into direct mode!\n");
return -EIO;
}
rc = xc_send_i2c_data(priv, scode_buf, 13);
if (rc != 0) {
/* Even if the send failed, make sure we set back to indirect
mode */
printk(KERN_ERR "Failed to set scode %d\n", rc);
}
/* Switch back to indirect-mode */
memset(indirect_mode, 0, sizeof(indirect_mode));
indirect_mode[4] = 0x88;
xc_send_i2c_data(priv, indirect_mode, sizeof(indirect_mode));
msleep(10);
return 0;
}
static int check_firmware(struct dvb_frontend *fe, unsigned int type,
v4l2_std_id std, __u16 int_freq)
{
struct xc4000_priv *priv = fe->tuner_priv;
struct firmware_properties new_fw;
int rc = 0, is_retry = 0;
u16 hwmodel;
v4l2_std_id std0;
u8 hw_major = 0, hw_minor = 0, fw_major = 0, fw_minor = 0;
dprintk(1, "%s called\n", __func__);
if (!priv->firm) {
rc = xc4000_fwupload(fe);
if (rc < 0)
return rc;
}
retry:
new_fw.type = type;
new_fw.id = std;
new_fw.std_req = std;
new_fw.scode_table = SCODE;
new_fw.scode_nr = 0;
new_fw.int_freq = int_freq;
dprintk(1, "checking firmware, user requested type=");
if (debug) {
dump_firm_type(new_fw.type);
printk(KERN_CONT "(%x), id %016llx, ", new_fw.type,
(unsigned long long)new_fw.std_req);
if (!int_freq)
printk(KERN_CONT "scode_tbl ");
else
printk(KERN_CONT "int_freq %d, ", new_fw.int_freq);
printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr);
}
/* No need to reload base firmware if it matches */
if (priv->cur_fw.type & BASE) {
dprintk(1, "BASE firmware not changed.\n");
goto skip_base;
}
/* Updating BASE - forget about all currently loaded firmware */
memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
/* Reset is needed before loading firmware */
rc = xc4000_tuner_reset(fe);
if (rc < 0)
goto fail;
/* BASE firmwares are all std0 */
std0 = 0;
rc = load_firmware(fe, BASE, &std0);
if (rc < 0) {
printk(KERN_ERR "Error %d while loading base firmware\n", rc);
goto fail;
}
/* Load INIT1, if needed */
dprintk(1, "Load init1 firmware, if exists\n");
rc = load_firmware(fe, BASE | INIT1, &std0);
if (rc == -ENOENT)
rc = load_firmware(fe, BASE | INIT1, &std0);
if (rc < 0 && rc != -ENOENT) {
tuner_err("Error %d while loading init1 firmware\n",
rc);
goto fail;
}
skip_base:
/*
* No need to reload standard specific firmware if base firmware
* was not reloaded and requested video standards have not changed.
*/
if (priv->cur_fw.type == (BASE | new_fw.type) &&
priv->cur_fw.std_req == std) {
dprintk(1, "Std-specific firmware already loaded.\n");
goto skip_std_specific;
}
/* Reloading std-specific firmware forces a SCODE update */
priv->cur_fw.scode_table = 0;
/* Load the standard firmware */
rc = load_firmware(fe, new_fw.type, &new_fw.id);
if (rc < 0)
goto fail;
skip_std_specific:
if (priv->cur_fw.scode_table == new_fw.scode_table &&
priv->cur_fw.scode_nr == new_fw.scode_nr) {
dprintk(1, "SCODE firmware already loaded.\n");
goto check_device;
}
/* Load SCODE firmware, if exists */
rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id,
new_fw.int_freq, new_fw.scode_nr);
if (rc != 0)
dprintk(1, "load scode failed %d\n", rc);
check_device:
if (xc4000_readreg(priv, XREG_PRODUCT_ID, &hwmodel) < 0) {
printk(KERN_ERR "Unable to read tuner registers.\n");
goto fail;
}
if (xc_get_version(priv, &hw_major, &hw_minor, &fw_major,
&fw_minor) != 0) {
printk(KERN_ERR "Unable to read tuner registers.\n");
goto fail;
}
dprintk(1, "Device is Xceive %d version %d.%d, firmware version %d.%d\n",
hwmodel, hw_major, hw_minor, fw_major, fw_minor);
/* Check firmware version against what we downloaded. */
if (priv->firm_version != ((fw_major << 8) | fw_minor)) {
printk(KERN_WARNING
"Incorrect readback of firmware version %d.%d.\n",
fw_major, fw_minor);
goto fail;
}
/* Check that the tuner hardware model remains consistent over time. */
if (priv->hwmodel == 0 &&
(hwmodel == XC_PRODUCT_ID_XC4000 ||
hwmodel == XC_PRODUCT_ID_XC4100)) {
priv->hwmodel = hwmodel;
priv->hwvers = (hw_major << 8) | hw_minor;
} else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel ||
priv->hwvers != ((hw_major << 8) | hw_minor)) {
printk(KERN_WARNING
"Read invalid device hardware information - tuner hung?\n");
goto fail;
}
priv->cur_fw = new_fw;
/*
* By setting BASE in cur_fw.type only after successfully loading all
* firmwares, we can:
* 1. Identify that BASE firmware with type=0 has been loaded;
* 2. Tell whether BASE firmware was just changed the next time through.
*/
priv->cur_fw.type |= BASE;
return 0;
fail:
memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
if (!is_retry) {
msleep(50);
is_retry = 1;
dprintk(1, "Retrying firmware load\n");
goto retry;
}
if (rc == -ENOENT)
rc = -EINVAL;
return rc;
}
static void xc_debug_dump(struct xc4000_priv *priv)
{
u16 adc_envelope;
u32 freq_error_hz = 0;
u16 lock_status;
u32 hsync_freq_hz = 0;
u16 frame_lines;
u16 quality;
u16 signal = 0;
u16 noise = 0;
u8 hw_majorversion = 0, hw_minorversion = 0;
u8 fw_majorversion = 0, fw_minorversion = 0;
xc_get_adc_envelope(priv, &adc_envelope);
dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
xc_get_frequency_error(priv, &freq_error_hz);
dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
xc_get_lock_status(priv, &lock_status);
dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
lock_status);
xc_get_version(priv, &hw_majorversion, &hw_minorversion,
&fw_majorversion, &fw_minorversion);
dprintk(1, "*** HW: V%02x.%02x, FW: V%02x.%02x\n",
hw_majorversion, hw_minorversion,
fw_majorversion, fw_minorversion);
if (priv->video_standard < XC4000_DTV6) {
xc_get_hsync_freq(priv, &hsync_freq_hz);
dprintk(1, "*** Horizontal sync frequency = %d Hz\n",
hsync_freq_hz);
xc_get_frame_lines(priv, &frame_lines);
dprintk(1, "*** Frame lines = %d\n", frame_lines);
}
xc_get_quality(priv, &quality);
dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality);
xc_get_signal_level(priv, &signal);
dprintk(1, "*** Signal level = -%ddB (%d)\n", signal >> 8, signal);
xc_get_noise_level(priv, &noise);
dprintk(1, "*** Noise level = %ddB (%d)\n", noise >> 8, noise);
}
static int xc4000_set_params(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 delsys = c->delivery_system;
u32 bw = c->bandwidth_hz;
struct xc4000_priv *priv = fe->tuner_priv;
unsigned int type;
int ret = -EREMOTEIO;
dprintk(1, "%s() frequency=%d (Hz)\n", __func__, c->frequency);
mutex_lock(&priv->lock);
switch (delsys) {
case SYS_ATSC:
dprintk(1, "%s() VSB modulation\n", __func__);
priv->rf_mode = XC_RF_MODE_AIR;
priv->freq_offset = 1750000;
priv->video_standard = XC4000_DTV6;
type = DTV6;
break;
case SYS_DVBC_ANNEX_B:
dprintk(1, "%s() QAM modulation\n", __func__);
priv->rf_mode = XC_RF_MODE_CABLE;
priv->freq_offset = 1750000;
priv->video_standard = XC4000_DTV6;
type = DTV6;
break;
case SYS_DVBT:
case SYS_DVBT2:
dprintk(1, "%s() OFDM\n", __func__);
if (bw == 0) {
if (c->frequency < 400000000) {
priv->freq_offset = 2250000;
} else {
priv->freq_offset = 2750000;
}
priv->video_standard = XC4000_DTV7_8;
type = DTV78;
} else if (bw <= 6000000) {
priv->video_standard = XC4000_DTV6;
priv->freq_offset = 1750000;
type = DTV6;
} else if (bw <= 7000000) {
priv->video_standard = XC4000_DTV7;
priv->freq_offset = 2250000;
type = DTV7;
} else {
priv->video_standard = XC4000_DTV8;
priv->freq_offset = 2750000;
type = DTV8;
}
priv->rf_mode = XC_RF_MODE_AIR;
break;
default:
printk(KERN_ERR "xc4000 delivery system not supported!\n");
ret = -EINVAL;
goto fail;
}
priv->freq_hz = c->frequency - priv->freq_offset;
dprintk(1, "%s() frequency=%d (compensated)\n",
__func__, priv->freq_hz);
/* Make sure the correct firmware type is loaded */
if (check_firmware(fe, type, 0, priv->if_khz) != 0)
goto fail;
priv->bandwidth = c->bandwidth_hz;
ret = xc_set_signal_source(priv, priv->rf_mode);
if (ret != 0) {
printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n",
priv->rf_mode);
goto fail;
} else {
u16 video_mode, audio_mode;
video_mode = xc4000_standard[priv->video_standard].video_mode;
audio_mode = xc4000_standard[priv->video_standard].audio_mode;
if (type == DTV6 && priv->firm_version != 0x0102)
video_mode |= 0x0001;
ret = xc_set_tv_standard(priv, video_mode, audio_mode);
if (ret != 0) {
printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n");
/* DJH - do not return when it fails... */
/* goto fail; */
}
}
if (xc_write_reg(priv, XREG_D_CODE, 0) == 0)
ret = 0;
if (priv->dvb_amplitude != 0) {
if (xc_write_reg(priv, XREG_AMPLITUDE,
(priv->firm_version != 0x0102 ||
priv->dvb_amplitude != 134 ?
priv->dvb_amplitude : 132)) != 0)
ret = -EREMOTEIO;
}
if (priv->set_smoothedcvbs != 0) {
if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0)
ret = -EREMOTEIO;
}
if (ret != 0) {
printk(KERN_ERR "xc4000: setting registers failed\n");
/* goto fail; */
}
xc_tune_channel(priv, priv->freq_hz);
ret = 0;
fail:
mutex_unlock(&priv->lock);
return ret;
}
static int xc4000_set_analog_params(struct dvb_frontend *fe,
struct analog_parameters *params)
{
struct xc4000_priv *priv = fe->tuner_priv;
unsigned int type = 0;
int ret = -EREMOTEIO;
if (params->mode == V4L2_TUNER_RADIO) {
dprintk(1, "%s() frequency=%d (in units of 62.5Hz)\n",
__func__, params->frequency);
mutex_lock(&priv->lock);
params->std = 0;
priv->freq_hz = params->frequency * 125L / 2;
if (audio_std & XC4000_AUDIO_STD_INPUT1) {
priv->video_standard = XC4000_FM_Radio_INPUT1;
type = FM | INPUT1;
} else {
priv->video_standard = XC4000_FM_Radio_INPUT2;
type = FM | INPUT2;
}
goto tune_channel;
}
dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
__func__, params->frequency);
mutex_lock(&priv->lock);
/* params->frequency is in units of 62.5khz */
priv->freq_hz = params->frequency * 62500;
params->std &= V4L2_STD_ALL;
/* if std is not defined, choose one */
if (!params->std)
params->std = V4L2_STD_PAL_BG;
if (audio_std & XC4000_AUDIO_STD_MONO)
type = MONO;
if (params->std & V4L2_STD_MN) {
params->std = V4L2_STD_MN;
if (audio_std & XC4000_AUDIO_STD_MONO) {
priv->video_standard = XC4000_MN_NTSC_PAL_Mono;
} else if (audio_std & XC4000_AUDIO_STD_A2) {
params->std |= V4L2_STD_A2;
priv->video_standard = XC4000_MN_NTSC_PAL_A2;
} else {
params->std |= V4L2_STD_BTSC;
priv->video_standard = XC4000_MN_NTSC_PAL_BTSC;
}
goto tune_channel;
}
if (params->std & V4L2_STD_PAL_BG) {
params->std = V4L2_STD_PAL_BG;
if (audio_std & XC4000_AUDIO_STD_MONO) {
priv->video_standard = XC4000_BG_PAL_MONO;
} else if (!(audio_std & XC4000_AUDIO_STD_A2)) {
if (!(audio_std & XC4000_AUDIO_STD_B)) {
params->std |= V4L2_STD_NICAM_A;
priv->video_standard = XC4000_BG_PAL_NICAM;
} else {
params->std |= V4L2_STD_NICAM_B;
priv->video_standard = XC4000_BG_PAL_NICAM;
}
} else {
if (!(audio_std & XC4000_AUDIO_STD_B)) {
params->std |= V4L2_STD_A2_A;
priv->video_standard = XC4000_BG_PAL_A2;
} else {
params->std |= V4L2_STD_A2_B;
priv->video_standard = XC4000_BG_PAL_A2;
}
}
goto tune_channel;
}
if (params->std & V4L2_STD_PAL_I) {
/* default to NICAM audio standard */
params->std = V4L2_STD_PAL_I | V4L2_STD_NICAM;
if (audio_std & XC4000_AUDIO_STD_MONO)
priv->video_standard = XC4000_I_PAL_NICAM_MONO;
else
priv->video_standard = XC4000_I_PAL_NICAM;
goto tune_channel;
}
if (params->std & V4L2_STD_PAL_DK) {
params->std = V4L2_STD_PAL_DK;
if (audio_std & XC4000_AUDIO_STD_MONO) {
priv->video_standard = XC4000_DK_PAL_MONO;
} else if (audio_std & XC4000_AUDIO_STD_A2) {
params->std |= V4L2_STD_A2;
priv->video_standard = XC4000_DK_PAL_A2;
} else {
params->std |= V4L2_STD_NICAM;
priv->video_standard = XC4000_DK_PAL_NICAM;
}
goto tune_channel;
}
if (params->std & V4L2_STD_SECAM_DK) {
/* default to A2 audio standard */
params->std = V4L2_STD_SECAM_DK | V4L2_STD_A2;
if (audio_std & XC4000_AUDIO_STD_L) {
type = 0;
priv->video_standard = XC4000_DK_SECAM_NICAM;
} else if (audio_std & XC4000_AUDIO_STD_MONO) {
priv->video_standard = XC4000_DK_SECAM_A2MONO;
} else if (audio_std & XC4000_AUDIO_STD_K3) {
params->std |= V4L2_STD_SECAM_K3;
priv->video_standard = XC4000_DK_SECAM_A2LDK3;
} else {
priv->video_standard = XC4000_DK_SECAM_A2DK1;
}
goto tune_channel;
}
if (params->std & V4L2_STD_SECAM_L) {
/* default to NICAM audio standard */
type = 0;
params->std = V4L2_STD_SECAM_L | V4L2_STD_NICAM;
priv->video_standard = XC4000_L_SECAM_NICAM;
goto tune_channel;
}
if (params->std & V4L2_STD_SECAM_LC) {
/* default to NICAM audio standard */
type = 0;
params->std = V4L2_STD_SECAM_LC | V4L2_STD_NICAM;
priv->video_standard = XC4000_LC_SECAM_NICAM;
goto tune_channel;
}
tune_channel:
/* FIXME: it could be air. */
priv->rf_mode = XC_RF_MODE_CABLE;
if (check_firmware(fe, type, params->std,
xc4000_standard[priv->video_standard].int_freq) != 0)
goto fail;
ret = xc_set_signal_source(priv, priv->rf_mode);
if (ret != 0) {
printk(KERN_ERR
"xc4000: xc_set_signal_source(%d) failed\n",
priv->rf_mode);
goto fail;
} else {
u16 video_mode, audio_mode;
video_mode = xc4000_standard[priv->video_standard].video_mode;
audio_mode = xc4000_standard[priv->video_standard].audio_mode;
if (priv->video_standard < XC4000_BG_PAL_A2) {
if (type & NOGD)
video_mode &= 0xFF7F;
} else if (priv->video_standard < XC4000_I_PAL_NICAM) {
if (priv->firm_version == 0x0102)
video_mode &= 0xFEFF;
if (audio_std & XC4000_AUDIO_STD_B)
video_mode |= 0x0080;
}
ret = xc_set_tv_standard(priv, video_mode, audio_mode);
if (ret != 0) {
printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n");
goto fail;
}
}
if (xc_write_reg(priv, XREG_D_CODE, 0) == 0)
ret = 0;
if (xc_write_reg(priv, XREG_AMPLITUDE, 1) != 0)
ret = -EREMOTEIO;
if (priv->set_smoothedcvbs != 0) {
if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0)
ret = -EREMOTEIO;
}
if (ret != 0) {
printk(KERN_ERR "xc4000: setting registers failed\n");
goto fail;
}
xc_tune_channel(priv, priv->freq_hz);
ret = 0;
fail:
mutex_unlock(&priv->lock);
return ret;
}
static int xc4000_get_signal(struct dvb_frontend *fe, u16 *strength)
{
struct xc4000_priv *priv = fe->tuner_priv;
u16 value = 0;
int rc;
mutex_lock(&priv->lock);
rc = xc4000_readreg(priv, XREG_SIGNAL_LEVEL, &value);
mutex_unlock(&priv->lock);
if (rc < 0)
goto ret;
/* Information from real testing of DVB-T and radio part,
coefficient for one dB is 0xff.
*/
tuner_dbg("Signal strength: -%ddB (%05d)\n", value >> 8, value);
/* all known digital modes */
if ((priv->video_standard == XC4000_DTV6) ||
(priv->video_standard == XC4000_DTV7) ||
(priv->video_standard == XC4000_DTV7_8) ||
(priv->video_standard == XC4000_DTV8))
goto digital;
/* Analog mode has NOISE LEVEL important, signal
depends only on gain of antenna and amplifiers,
but it doesn't tell anything about real quality
of reception.
*/
mutex_lock(&priv->lock);
rc = xc4000_readreg(priv, XREG_NOISE_LEVEL, &value);
mutex_unlock(&priv->lock);
tuner_dbg("Noise level: %ddB (%05d)\n", value >> 8, value);
/* highest noise level: 32dB */
if (value >= 0x2000) {
value = 0;
} else {
value = (~value << 3) & 0xffff;
}
goto ret;
/* Digital mode has SIGNAL LEVEL important and real
noise level is stored in demodulator registers.
*/
digital:
/* best signal: -50dB */
if (value <= 0x3200) {
value = 0xffff;
/* minimum: -114dB - should be 0x7200 but real zero is 0x713A */
} else if (value >= 0x713A) {
value = 0;
} else {
value = ~(value - 0x3200) << 2;
}
ret:
*strength = value;
return rc;
}
static int xc4000_get_frequency(struct dvb_frontend *fe, u32 *freq)
{
struct xc4000_priv *priv = fe->tuner_priv;
*freq = priv->freq_hz + priv->freq_offset;
if (debug) {
mutex_lock(&priv->lock);
if ((priv->cur_fw.type
& (BASE | FM | DTV6 | DTV7 | DTV78 | DTV8)) == BASE) {
u16 snr = 0;
if (xc4000_readreg(priv, XREG_SNR, &snr) == 0) {
mutex_unlock(&priv->lock);
dprintk(1, "%s() freq = %u, SNR = %d\n",
__func__, *freq, snr);
return 0;
}
}
mutex_unlock(&priv->lock);
}
dprintk(1, "%s()\n", __func__);
return 0;
}
static int xc4000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
{
struct xc4000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
*bw = priv->bandwidth;
return 0;
}
static int xc4000_get_status(struct dvb_frontend *fe, u32 *status)
{
struct xc4000_priv *priv = fe->tuner_priv;
u16 lock_status = 0;
mutex_lock(&priv->lock);
if (priv->cur_fw.type & BASE)
xc_get_lock_status(priv, &lock_status);
*status = (lock_status == 1 ?
TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO : 0);
if (priv->cur_fw.type & (DTV6 | DTV7 | DTV78 | DTV8))
*status &= (~TUNER_STATUS_STEREO);
mutex_unlock(&priv->lock);
dprintk(2, "%s() lock_status = %d\n", __func__, lock_status);
return 0;
}
static int xc4000_sleep(struct dvb_frontend *fe)
{
struct xc4000_priv *priv = fe->tuner_priv;
int ret = 0;
dprintk(1, "%s()\n", __func__);
mutex_lock(&priv->lock);
/* Avoid firmware reload on slow devices */
if ((no_poweroff == 2 ||
(no_poweroff == 0 && priv->default_pm != 0)) &&
(priv->cur_fw.type & BASE) != 0) {
/* force reset and firmware reload */
priv->cur_fw.type = XC_POWERED_DOWN;
if (xc_write_reg(priv, XREG_POWER_DOWN, 0) != 0) {
printk(KERN_ERR
"xc4000: %s() unable to shutdown tuner\n",
__func__);
ret = -EREMOTEIO;
}
msleep(20);
}
mutex_unlock(&priv->lock);
return ret;
}
static int xc4000_init(struct dvb_frontend *fe)
{
dprintk(1, "%s()\n", __func__);
return 0;
}
static void xc4000_release(struct dvb_frontend *fe)
{
struct xc4000_priv *priv = fe->tuner_priv;
dprintk(1, "%s()\n", __func__);
mutex_lock(&xc4000_list_mutex);
if (priv)
hybrid_tuner_release_state(priv);
mutex_unlock(&xc4000_list_mutex);
fe->tuner_priv = NULL;
}
static const struct dvb_tuner_ops xc4000_tuner_ops = {
.info = {
.name = "Xceive XC4000",
.frequency_min_hz = 1 * MHz,
.frequency_max_hz = 1023 * MHz,
.frequency_step_hz = 50 * kHz,
},
.release = xc4000_release,
.init = xc4000_init,
.sleep = xc4000_sleep,
.set_params = xc4000_set_params,
.set_analog_params = xc4000_set_analog_params,
.get_frequency = xc4000_get_frequency,
.get_rf_strength = xc4000_get_signal,
.get_bandwidth = xc4000_get_bandwidth,
.get_status = xc4000_get_status
};
struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
struct xc4000_config *cfg)
{
struct xc4000_priv *priv = NULL;
int instance;
u16 id = 0;
dprintk(1, "%s(%d-%04x)\n", __func__,
i2c ? i2c_adapter_id(i2c) : -1,
cfg ? cfg->i2c_address : -1);
mutex_lock(&xc4000_list_mutex);
instance = hybrid_tuner_request_state(struct xc4000_priv, priv,
hybrid_tuner_instance_list,
i2c, cfg->i2c_address, "xc4000");
switch (instance) {
case 0:
goto fail;
case 1:
/* new tuner instance */
priv->bandwidth = 6000000;
/* set default configuration */
priv->if_khz = 4560;
priv->default_pm = 0;
priv->dvb_amplitude = 134;
priv->set_smoothedcvbs = 1;
mutex_init(&priv->lock);
fe->tuner_priv = priv;
break;
default:
/* existing tuner instance */
fe->tuner_priv = priv;
break;
}
if (cfg->if_khz != 0) {
/* copy configuration if provided by the caller */
priv->if_khz = cfg->if_khz;
priv->default_pm = cfg->default_pm;
priv->dvb_amplitude = cfg->dvb_amplitude;
priv->set_smoothedcvbs = cfg->set_smoothedcvbs;
}
/* Check if firmware has been loaded. It is possible that another
instance of the driver has loaded the firmware.
*/
if (instance == 1) {
if (xc4000_readreg(priv, XREG_PRODUCT_ID, &id) != 0)
goto fail;
} else {
id = ((priv->cur_fw.type & BASE) != 0 ?
priv->hwmodel : XC_PRODUCT_ID_FW_NOT_LOADED);
}
switch (id) {
case XC_PRODUCT_ID_XC4000:
case XC_PRODUCT_ID_XC4100:
printk(KERN_INFO
"xc4000: Successfully identified at address 0x%02x\n",
cfg->i2c_address);
printk(KERN_INFO
"xc4000: Firmware has been loaded previously\n");
break;
case XC_PRODUCT_ID_FW_NOT_LOADED:
printk(KERN_INFO
"xc4000: Successfully identified at address 0x%02x\n",
cfg->i2c_address);
printk(KERN_INFO
"xc4000: Firmware has not been loaded previously\n");
break;
default:
printk(KERN_ERR
"xc4000: Device not found at addr 0x%02x (0x%x)\n",
cfg->i2c_address, id);
goto fail;
}
mutex_unlock(&xc4000_list_mutex);
memcpy(&fe->ops.tuner_ops, &xc4000_tuner_ops,
sizeof(struct dvb_tuner_ops));
if (instance == 1) {
int ret;
mutex_lock(&priv->lock);
ret = xc4000_fwupload(fe);
mutex_unlock(&priv->lock);
if (ret != 0)
goto fail2;
}
return fe;
fail:
mutex_unlock(&xc4000_list_mutex);
fail2:
xc4000_release(fe);
return NULL;
}
EXPORT_SYMBOL_GPL(xc4000_attach);
MODULE_AUTHOR("Steven Toth, Davide Ferri");
MODULE_DESCRIPTION("Xceive xc4000 silicon tuner driver");
MODULE_LICENSE("GPL");
MODULE_FIRMWARE(XC4000_DEFAULT_FIRMWARE_NEW);
MODULE_FIRMWARE(XC4000_DEFAULT_FIRMWARE);
| linux-master | drivers/media/tuners/xc4000.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************
Siano Mobile Silicon, Inc.
MDTV receiver kernel modules.
Copyright (C) 2005-2009, Uri Shkolnik, Anatoly Greenblat
****************************************************************/
#include "smscoreapi.h"
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/usb.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <media/media-device.h>
#include "sms-cards.h"
#include "smsendian.h"
#define USB1_BUFFER_SIZE 0x1000
#define USB2_BUFFER_SIZE 0x2000
#define MAX_BUFFERS 50
#define MAX_URBS 10
struct smsusb_device_t;
enum smsusb_state {
SMSUSB_DISCONNECTED,
SMSUSB_SUSPENDED,
SMSUSB_ACTIVE
};
struct smsusb_urb_t {
struct list_head entry;
struct smscore_buffer_t *cb;
struct smsusb_device_t *dev;
struct urb urb;
/* For the bottom half */
struct work_struct wq;
};
struct smsusb_device_t {
struct usb_device *udev;
struct smscore_device_t *coredev;
struct smsusb_urb_t surbs[MAX_URBS];
int response_alignment;
int buffer_size;
unsigned char in_ep;
unsigned char out_ep;
enum smsusb_state state;
};
static int smsusb_submit_urb(struct smsusb_device_t *dev,
struct smsusb_urb_t *surb);
/*
* Completing URB's callback handler - bottom half (process context)
* submits the URB prepared on smsusb_onresponse()
*/
static void do_submit_urb(struct work_struct *work)
{
struct smsusb_urb_t *surb = container_of(work, struct smsusb_urb_t, wq);
struct smsusb_device_t *dev = surb->dev;
smsusb_submit_urb(dev, surb);
}
/*
* Completing URB's callback handler - top half (interrupt context)
* adds completing sms urb to the global surbs list and activtes the worker
* thread the surb
* IMPORTANT - blocking functions must not be called from here !!!
* @param urb pointer to a completing urb object
*/
static void smsusb_onresponse(struct urb *urb)
{
struct smsusb_urb_t *surb = (struct smsusb_urb_t *) urb->context;
struct smsusb_device_t *dev = surb->dev;
if (urb->status == -ESHUTDOWN) {
pr_err("error, urb status %d (-ESHUTDOWN), %d bytes\n",
urb->status, urb->actual_length);
return;
}
if ((urb->actual_length > 0) && (urb->status == 0)) {
struct sms_msg_hdr *phdr = (struct sms_msg_hdr *)surb->cb->p;
smsendian_handle_message_header(phdr);
if (urb->actual_length >= phdr->msg_length) {
surb->cb->size = phdr->msg_length;
if (dev->response_alignment &&
(phdr->msg_flags & MSG_HDR_FLAG_SPLIT_MSG)) {
surb->cb->offset =
dev->response_alignment +
((phdr->msg_flags >> 8) & 3);
/* sanity check */
if (((int) phdr->msg_length +
surb->cb->offset) > urb->actual_length) {
pr_err("invalid response msglen %d offset %d size %d\n",
phdr->msg_length,
surb->cb->offset,
urb->actual_length);
goto exit_and_resubmit;
}
/* move buffer pointer and
* copy header to its new location */
memcpy((char *) phdr + surb->cb->offset,
phdr, sizeof(struct sms_msg_hdr));
} else
surb->cb->offset = 0;
pr_debug("received %s(%d) size: %d\n",
smscore_translate_msg(phdr->msg_type),
phdr->msg_type, phdr->msg_length);
smsendian_handle_rx_message((struct sms_msg_data *) phdr);
smscore_onresponse(dev->coredev, surb->cb);
surb->cb = NULL;
} else {
pr_err("invalid response msglen %d actual %d\n",
phdr->msg_length, urb->actual_length);
}
} else
pr_err("error, urb status %d, %d bytes\n",
urb->status, urb->actual_length);
exit_and_resubmit:
INIT_WORK(&surb->wq, do_submit_urb);
schedule_work(&surb->wq);
}
static int smsusb_submit_urb(struct smsusb_device_t *dev,
struct smsusb_urb_t *surb)
{
if (!surb->cb) {
/* This function can sleep */
surb->cb = smscore_getbuffer(dev->coredev);
if (!surb->cb) {
pr_err("smscore_getbuffer(...) returned NULL\n");
return -ENOMEM;
}
}
usb_fill_bulk_urb(
&surb->urb,
dev->udev,
usb_rcvbulkpipe(dev->udev, dev->in_ep),
surb->cb->p,
dev->buffer_size,
smsusb_onresponse,
surb
);
surb->urb.transfer_flags |= URB_FREE_BUFFER;
return usb_submit_urb(&surb->urb, GFP_ATOMIC);
}
static void smsusb_stop_streaming(struct smsusb_device_t *dev)
{
int i;
for (i = 0; i < MAX_URBS; i++) {
usb_kill_urb(&dev->surbs[i].urb);
if (dev->surbs[i].wq.func)
cancel_work_sync(&dev->surbs[i].wq);
if (dev->surbs[i].cb) {
smscore_putbuffer(dev->coredev, dev->surbs[i].cb);
dev->surbs[i].cb = NULL;
}
}
}
static int smsusb_start_streaming(struct smsusb_device_t *dev)
{
int i, rc;
for (i = 0; i < MAX_URBS; i++) {
rc = smsusb_submit_urb(dev, &dev->surbs[i]);
if (rc < 0) {
pr_err("smsusb_submit_urb(...) failed\n");
smsusb_stop_streaming(dev);
break;
}
}
return rc;
}
static int smsusb_sendrequest(void *context, void *buffer, size_t size)
{
struct smsusb_device_t *dev = (struct smsusb_device_t *) context;
struct sms_msg_hdr *phdr;
int dummy, ret;
if (dev->state != SMSUSB_ACTIVE) {
pr_debug("Device not active yet\n");
return -ENOENT;
}
phdr = kmemdup(buffer, size, GFP_KERNEL);
if (!phdr)
return -ENOMEM;
pr_debug("sending %s(%d) size: %d\n",
smscore_translate_msg(phdr->msg_type), phdr->msg_type,
phdr->msg_length);
smsendian_handle_tx_message((struct sms_msg_data *) phdr);
smsendian_handle_message_header((struct sms_msg_hdr *)phdr);
ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 2),
phdr, size, &dummy, 1000);
kfree(phdr);
return ret;
}
static char *smsusb1_fw_lkup[] = {
"dvbt_stellar_usb.inp",
"dvbh_stellar_usb.inp",
"tdmb_stellar_usb.inp",
"none",
"dvbt_bda_stellar_usb.inp",
};
static inline char *sms_get_fw_name(int mode, int board_id)
{
char **fw = sms_get_board(board_id)->fw;
return (fw && fw[mode]) ? fw[mode] : smsusb1_fw_lkup[mode];
}
static int smsusb1_load_firmware(struct usb_device *udev, int id, int board_id)
{
const struct firmware *fw;
u8 *fw_buffer;
int rc, dummy;
char *fw_filename;
if (id < 0)
id = sms_get_board(board_id)->default_mode;
if (id < DEVICE_MODE_DVBT || id > DEVICE_MODE_DVBT_BDA) {
pr_err("invalid firmware id specified %d\n", id);
return -EINVAL;
}
fw_filename = sms_get_fw_name(id, board_id);
rc = request_firmware(&fw, fw_filename, &udev->dev);
if (rc < 0) {
pr_warn("failed to open '%s' mode %d, trying again with default firmware\n",
fw_filename, id);
fw_filename = smsusb1_fw_lkup[id];
rc = request_firmware(&fw, fw_filename, &udev->dev);
if (rc < 0) {
pr_warn("failed to open '%s' mode %d\n",
fw_filename, id);
return rc;
}
}
fw_buffer = kmalloc(fw->size, GFP_KERNEL);
if (fw_buffer) {
memcpy(fw_buffer, fw->data, fw->size);
rc = usb_bulk_msg(udev, usb_sndbulkpipe(udev, 2),
fw_buffer, fw->size, &dummy, 1000);
pr_debug("sent %zu(%d) bytes, rc %d\n", fw->size, dummy, rc);
kfree(fw_buffer);
} else {
pr_err("failed to allocate firmware buffer\n");
rc = -ENOMEM;
}
pr_debug("read FW %s, size=%zu\n", fw_filename, fw->size);
release_firmware(fw);
return rc;
}
static void smsusb1_detectmode(void *context, int *mode)
{
char *product_string =
((struct smsusb_device_t *) context)->udev->product;
*mode = DEVICE_MODE_NONE;
if (!product_string) {
product_string = "none";
pr_err("product string not found\n");
} else if (strstr(product_string, "DVBH"))
*mode = 1;
else if (strstr(product_string, "BDA"))
*mode = 4;
else if (strstr(product_string, "DVBT"))
*mode = 0;
else if (strstr(product_string, "TDMB"))
*mode = 2;
pr_debug("%d \"%s\"\n", *mode, product_string);
}
static int smsusb1_setmode(void *context, int mode)
{
struct sms_msg_hdr msg = { MSG_SW_RELOAD_REQ, 0, HIF_TASK,
sizeof(struct sms_msg_hdr), 0 };
if (mode < DEVICE_MODE_DVBT || mode > DEVICE_MODE_DVBT_BDA) {
pr_err("invalid firmware id specified %d\n", mode);
return -EINVAL;
}
return smsusb_sendrequest(context, &msg, sizeof(msg));
}
static void smsusb_term_device(struct usb_interface *intf)
{
struct smsusb_device_t *dev = usb_get_intfdata(intf);
if (dev) {
dev->state = SMSUSB_DISCONNECTED;
smsusb_stop_streaming(dev);
/* unregister from smscore */
if (dev->coredev)
smscore_unregister_device(dev->coredev);
pr_debug("device 0x%p destroyed\n", dev);
kfree(dev);
}
usb_set_intfdata(intf, NULL);
}
static void *siano_media_device_register(struct smsusb_device_t *dev,
int board_id)
{
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
struct media_device *mdev;
struct usb_device *udev = dev->udev;
struct sms_board *board = sms_get_board(board_id);
int ret;
mdev = kzalloc(sizeof(*mdev), GFP_KERNEL);
if (!mdev)
return NULL;
media_device_usb_init(mdev, udev, board->name);
ret = media_device_register(mdev);
if (ret) {
media_device_cleanup(mdev);
kfree(mdev);
return NULL;
}
pr_info("media controller created\n");
return mdev;
#else
return NULL;
#endif
}
static int smsusb_init_device(struct usb_interface *intf, int board_id)
{
struct smsdevice_params_t params;
struct smsusb_device_t *dev;
void *mdev;
int i, rc;
int align = 0;
/* create device object */
dev = kzalloc(sizeof(struct smsusb_device_t), GFP_KERNEL);
if (!dev)
return -ENOMEM;
memset(¶ms, 0, sizeof(params));
usb_set_intfdata(intf, dev);
dev->udev = interface_to_usbdev(intf);
dev->state = SMSUSB_DISCONNECTED;
for (i = 0; i < intf->cur_altsetting->desc.bNumEndpoints; i++) {
struct usb_endpoint_descriptor *desc =
&intf->cur_altsetting->endpoint[i].desc;
if (desc->bEndpointAddress & USB_DIR_IN) {
dev->in_ep = desc->bEndpointAddress;
align = usb_endpoint_maxp(desc) - sizeof(struct sms_msg_hdr);
} else {
dev->out_ep = desc->bEndpointAddress;
}
}
pr_debug("in_ep = %02x, out_ep = %02x\n", dev->in_ep, dev->out_ep);
if (!dev->in_ep || !dev->out_ep || align < 0) { /* Missing endpoints? */
smsusb_term_device(intf);
return -ENODEV;
}
params.device_type = sms_get_board(board_id)->type;
switch (params.device_type) {
case SMS_STELLAR:
dev->buffer_size = USB1_BUFFER_SIZE;
params.setmode_handler = smsusb1_setmode;
params.detectmode_handler = smsusb1_detectmode;
break;
case SMS_UNKNOWN_TYPE:
pr_err("Unspecified sms device type!\n");
fallthrough;
default:
dev->buffer_size = USB2_BUFFER_SIZE;
dev->response_alignment = align;
params.flags |= SMS_DEVICE_FAMILY2;
break;
}
params.device = &dev->udev->dev;
params.usb_device = dev->udev;
params.buffer_size = dev->buffer_size;
params.num_buffers = MAX_BUFFERS;
params.sendrequest_handler = smsusb_sendrequest;
params.context = dev;
usb_make_path(dev->udev, params.devpath, sizeof(params.devpath));
mdev = siano_media_device_register(dev, board_id);
/* register in smscore */
rc = smscore_register_device(¶ms, &dev->coredev, 0, mdev);
if (rc < 0) {
pr_err("smscore_register_device(...) failed, rc %d\n", rc);
goto err_unregister_device;
}
smscore_set_board_id(dev->coredev, board_id);
dev->coredev->is_usb_device = true;
/* initialize urbs */
for (i = 0; i < MAX_URBS; i++) {
dev->surbs[i].dev = dev;
usb_init_urb(&dev->surbs[i].urb);
}
pr_debug("smsusb_start_streaming(...).\n");
rc = smsusb_start_streaming(dev);
if (rc < 0) {
pr_err("smsusb_start_streaming(...) failed\n");
goto err_unregister_device;
}
dev->state = SMSUSB_ACTIVE;
rc = smscore_start_device(dev->coredev);
if (rc < 0) {
pr_err("smscore_start_device(...) failed\n");
goto err_unregister_device;
}
pr_debug("device 0x%p created\n", dev);
return rc;
err_unregister_device:
smsusb_term_device(intf);
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
media_device_unregister(mdev);
#endif
kfree(mdev);
return rc;
}
static int smsusb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct usb_device *udev = interface_to_usbdev(intf);
char devpath[32];
int i, rc;
pr_info("board id=%lu, interface number %d\n",
id->driver_info,
intf->cur_altsetting->desc.bInterfaceNumber);
if (sms_get_board(id->driver_info)->intf_num !=
intf->cur_altsetting->desc.bInterfaceNumber) {
pr_debug("interface %d won't be used. Expecting interface %d to popup\n",
intf->cur_altsetting->desc.bInterfaceNumber,
sms_get_board(id->driver_info)->intf_num);
return -ENODEV;
}
if (intf->num_altsetting > 1) {
rc = usb_set_interface(udev,
intf->cur_altsetting->desc.bInterfaceNumber,
0);
if (rc < 0) {
pr_err("usb_set_interface failed, rc %d\n", rc);
return rc;
}
}
pr_debug("smsusb_probe %d\n",
intf->cur_altsetting->desc.bInterfaceNumber);
for (i = 0; i < intf->cur_altsetting->desc.bNumEndpoints; i++) {
pr_debug("endpoint %d %02x %02x %d\n", i,
intf->cur_altsetting->endpoint[i].desc.bEndpointAddress,
intf->cur_altsetting->endpoint[i].desc.bmAttributes,
intf->cur_altsetting->endpoint[i].desc.wMaxPacketSize);
if (intf->cur_altsetting->endpoint[i].desc.bEndpointAddress &
USB_DIR_IN)
rc = usb_clear_halt(udev, usb_rcvbulkpipe(udev,
intf->cur_altsetting->endpoint[i].desc.bEndpointAddress));
else
rc = usb_clear_halt(udev, usb_sndbulkpipe(udev,
intf->cur_altsetting->endpoint[i].desc.bEndpointAddress));
}
if ((udev->actconfig->desc.bNumInterfaces == 2) &&
(intf->cur_altsetting->desc.bInterfaceNumber == 0)) {
pr_debug("rom interface 0 is not used\n");
return -ENODEV;
}
if (id->driver_info == SMS1XXX_BOARD_SIANO_STELLAR_ROM) {
/* Detected a Siano Stellar uninitialized */
snprintf(devpath, sizeof(devpath), "usb\\%d-%s",
udev->bus->busnum, udev->devpath);
pr_info("stellar device in cold state was found at %s.\n",
devpath);
rc = smsusb1_load_firmware(
udev, smscore_registry_getmode(devpath),
id->driver_info);
/* This device will reset and gain another USB ID */
if (!rc)
pr_info("stellar device now in warm state\n");
else
pr_err("Failed to put stellar in warm state. Error: %d\n",
rc);
return rc;
} else {
rc = smsusb_init_device(intf, id->driver_info);
}
pr_info("Device initialized with return code %d\n", rc);
sms_board_load_modules(id->driver_info);
return rc;
}
static void smsusb_disconnect(struct usb_interface *intf)
{
smsusb_term_device(intf);
}
static int smsusb_suspend(struct usb_interface *intf, pm_message_t msg)
{
struct smsusb_device_t *dev = usb_get_intfdata(intf);
printk(KERN_INFO "%s Entering status %d.\n", __func__, msg.event);
dev->state = SMSUSB_SUSPENDED;
/*smscore_set_power_mode(dev, SMS_POWER_MODE_SUSPENDED);*/
smsusb_stop_streaming(dev);
return 0;
}
static int smsusb_resume(struct usb_interface *intf)
{
int rc, i;
struct smsusb_device_t *dev = usb_get_intfdata(intf);
struct usb_device *udev = interface_to_usbdev(intf);
printk(KERN_INFO "%s Entering.\n", __func__);
usb_clear_halt(udev, usb_rcvbulkpipe(udev, dev->in_ep));
usb_clear_halt(udev, usb_sndbulkpipe(udev, dev->out_ep));
for (i = 0; i < intf->cur_altsetting->desc.bNumEndpoints; i++)
printk(KERN_INFO "endpoint %d %02x %02x %d\n", i,
intf->cur_altsetting->endpoint[i].desc.bEndpointAddress,
intf->cur_altsetting->endpoint[i].desc.bmAttributes,
intf->cur_altsetting->endpoint[i].desc.wMaxPacketSize);
if (intf->num_altsetting > 0) {
rc = usb_set_interface(udev,
intf->cur_altsetting->desc.
bInterfaceNumber, 0);
if (rc < 0) {
printk(KERN_INFO "%s usb_set_interface failed, rc %d\n",
__func__, rc);
return rc;
}
}
smsusb_start_streaming(dev);
return 0;
}
static const struct usb_device_id smsusb_id_table[] = {
/* This device is only present before firmware load */
{ USB_DEVICE(0x187f, 0x0010),
.driver_info = SMS1XXX_BOARD_SIANO_STELLAR_ROM },
/* This device pops up after firmware load */
{ USB_DEVICE(0x187f, 0x0100),
.driver_info = SMS1XXX_BOARD_SIANO_STELLAR },
{ USB_DEVICE(0x187f, 0x0200),
.driver_info = SMS1XXX_BOARD_SIANO_NOVA_A },
{ USB_DEVICE(0x187f, 0x0201),
.driver_info = SMS1XXX_BOARD_SIANO_NOVA_B },
{ USB_DEVICE(0x187f, 0x0300),
.driver_info = SMS1XXX_BOARD_SIANO_VEGA },
{ USB_DEVICE(0x2040, 0x1700),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_CATAMOUNT },
{ USB_DEVICE(0x2040, 0x1800),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_OKEMO_A },
{ USB_DEVICE(0x2040, 0x1801),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_OKEMO_B },
{ USB_DEVICE(0x2040, 0x2000),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_TIGER_MINICARD },
{ USB_DEVICE(0x2040, 0x2009),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_TIGER_MINICARD_R2 },
{ USB_DEVICE(0x2040, 0x200a),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_TIGER_MINICARD },
{ USB_DEVICE(0x2040, 0x2010),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_TIGER_MINICARD },
{ USB_DEVICE(0x2040, 0x2011),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_TIGER_MINICARD },
{ USB_DEVICE(0x2040, 0x2019),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_TIGER_MINICARD },
{ USB_DEVICE(0x2040, 0x5500),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0x5510),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0x5520),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0x5530),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0x5580),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0x5590),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xb900),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xb910),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xb980),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xb990),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xc000),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xc010),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xc080),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xc090),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xc0a0),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x2040, 0xf5a0),
.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
{ USB_DEVICE(0x187f, 0x0202),
.driver_info = SMS1XXX_BOARD_SIANO_NICE },
{ USB_DEVICE(0x187f, 0x0301),
.driver_info = SMS1XXX_BOARD_SIANO_VENICE },
{ USB_DEVICE(0x187f, 0x0302),
.driver_info = SMS1XXX_BOARD_SIANO_VENICE },
{ USB_DEVICE(0x187f, 0x0310),
.driver_info = SMS1XXX_BOARD_SIANO_MING },
{ USB_DEVICE(0x187f, 0x0500),
.driver_info = SMS1XXX_BOARD_SIANO_PELE },
{ USB_DEVICE(0x187f, 0x0600),
.driver_info = SMS1XXX_BOARD_SIANO_RIO },
{ USB_DEVICE(0x187f, 0x0700),
.driver_info = SMS1XXX_BOARD_SIANO_DENVER_2160 },
{ USB_DEVICE(0x187f, 0x0800),
.driver_info = SMS1XXX_BOARD_SIANO_DENVER_1530 },
{ USB_DEVICE(0x19D2, 0x0086),
.driver_info = SMS1XXX_BOARD_ZTE_DVB_DATA_CARD },
{ USB_DEVICE(0x19D2, 0x0078),
.driver_info = SMS1XXX_BOARD_ONDA_MDTV_DATA_CARD },
{ USB_DEVICE(0x3275, 0x0080),
.driver_info = SMS1XXX_BOARD_SIANO_RIO },
{ USB_DEVICE(0x2013, 0x0257),
.driver_info = SMS1XXX_BOARD_PCTV_77E },
{ } /* Terminating entry */
};
MODULE_DEVICE_TABLE(usb, smsusb_id_table);
static struct usb_driver smsusb_driver = {
.name = "smsusb",
.probe = smsusb_probe,
.disconnect = smsusb_disconnect,
.id_table = smsusb_id_table,
.suspend = smsusb_suspend,
.resume = smsusb_resume,
};
module_usb_driver(smsusb_driver);
MODULE_DESCRIPTION("Driver for the Siano SMS1xxx USB dongle");
MODULE_AUTHOR("Siano Mobile Silicon, INC. ([email protected])");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/siano/smsusb.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Hauppauge HD PVR USB driver
*
* Copyright (C) 2008 Janne Grunau ([email protected])
*
* IR device registration code is
* Copyright (C) 2010 Andy Walls <[email protected]>
*/
#if IS_ENABLED(CONFIG_I2C)
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/export.h>
#include "hdpvr.h"
#define CTRL_READ_REQUEST 0xb8
#define CTRL_WRITE_REQUEST 0x38
#define REQTYPE_I2C_READ 0xb1
#define REQTYPE_I2C_WRITE 0xb0
#define REQTYPE_I2C_WRITE_STATT 0xd0
#define Z8F0811_IR_TX_I2C_ADDR 0x70
#define Z8F0811_IR_RX_I2C_ADDR 0x71
struct i2c_client *hdpvr_register_ir_i2c(struct hdpvr_device *dev)
{
struct IR_i2c_init_data *init_data = &dev->ir_i2c_init_data;
struct i2c_board_info info = {
I2C_BOARD_INFO("ir_z8f0811_hdpvr", Z8F0811_IR_RX_I2C_ADDR),
};
/* Our default information for ir-kbd-i2c.c to use */
init_data->ir_codes = RC_MAP_HAUPPAUGE;
init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
init_data->type = RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_RC6_6A_32;
init_data->name = "HD-PVR";
init_data->polling_interval = 405; /* ms, duplicated from Windows */
info.platform_data = init_data;
return i2c_new_client_device(&dev->i2c_adapter, &info);
}
static int hdpvr_i2c_read(struct hdpvr_device *dev, int bus,
unsigned char addr, char *wdata, int wlen,
char *data, int len)
{
int ret;
if ((len > sizeof(dev->i2c_buf)) || (wlen > sizeof(dev->i2c_buf)))
return -EINVAL;
if (wlen) {
memcpy(dev->i2c_buf, wdata, wlen);
ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST,
(bus << 8) | addr, 0, dev->i2c_buf,
wlen, 1000);
if (ret < 0)
return ret;
}
ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
REQTYPE_I2C_READ, CTRL_READ_REQUEST,
(bus << 8) | addr, 0, dev->i2c_buf, len, 1000);
if (ret == len) {
memcpy(data, dev->i2c_buf, len);
ret = 0;
} else if (ret >= 0)
ret = -EIO;
return ret;
}
static int hdpvr_i2c_write(struct hdpvr_device *dev, int bus,
unsigned char addr, char *data, int len)
{
int ret;
if (len > sizeof(dev->i2c_buf))
return -EINVAL;
memcpy(dev->i2c_buf, data, len);
ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST,
(bus << 8) | addr, 0, dev->i2c_buf, len, 1000);
if (ret < 0)
return ret;
ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
REQTYPE_I2C_WRITE_STATT, CTRL_READ_REQUEST,
0, 0, dev->i2c_buf, 2, 1000);
if ((ret == 2) && (dev->i2c_buf[1] == (len - 1)))
ret = 0;
else if (ret >= 0)
ret = -EIO;
return ret;
}
static int hdpvr_transfer(struct i2c_adapter *i2c_adapter, struct i2c_msg *msgs,
int num)
{
struct hdpvr_device *dev = i2c_get_adapdata(i2c_adapter);
int retval = 0, addr;
mutex_lock(&dev->i2c_mutex);
addr = msgs[0].addr << 1;
if (num == 1) {
if (msgs[0].flags & I2C_M_RD)
retval = hdpvr_i2c_read(dev, 1, addr, NULL, 0,
msgs[0].buf, msgs[0].len);
else
retval = hdpvr_i2c_write(dev, 1, addr, msgs[0].buf,
msgs[0].len);
} else if (num == 2) {
if (msgs[0].addr != msgs[1].addr) {
v4l2_warn(&dev->v4l2_dev, "refusing 2-phase i2c xfer with conflicting target addresses\n");
retval = -EINVAL;
goto out;
}
if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD)) {
v4l2_warn(&dev->v4l2_dev, "refusing complex xfer with r0=%d, r1=%d\n",
msgs[0].flags & I2C_M_RD,
msgs[1].flags & I2C_M_RD);
retval = -EINVAL;
goto out;
}
/*
* Write followed by atomic read is the only complex xfer that
* we actually support here.
*/
retval = hdpvr_i2c_read(dev, 1, addr, msgs[0].buf, msgs[0].len,
msgs[1].buf, msgs[1].len);
} else {
v4l2_warn(&dev->v4l2_dev, "refusing %d-phase i2c xfer\n", num);
}
out:
mutex_unlock(&dev->i2c_mutex);
return retval ? retval : num;
}
static u32 hdpvr_functionality(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
static const struct i2c_algorithm hdpvr_algo = {
.master_xfer = hdpvr_transfer,
.functionality = hdpvr_functionality,
};
static const struct i2c_adapter hdpvr_i2c_adapter_template = {
.name = "Hauppauge HD PVR I2C",
.owner = THIS_MODULE,
.algo = &hdpvr_algo,
};
static int hdpvr_activate_ir(struct hdpvr_device *dev)
{
char buffer[2];
mutex_lock(&dev->i2c_mutex);
hdpvr_i2c_read(dev, 0, 0x54, NULL, 0, buffer, 1);
buffer[0] = 0;
buffer[1] = 0x8;
hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
buffer[1] = 0x18;
hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
mutex_unlock(&dev->i2c_mutex);
return 0;
}
int hdpvr_register_i2c_adapter(struct hdpvr_device *dev)
{
hdpvr_activate_ir(dev);
dev->i2c_adapter = hdpvr_i2c_adapter_template;
dev->i2c_adapter.dev.parent = &dev->udev->dev;
i2c_set_adapdata(&dev->i2c_adapter, dev);
return i2c_add_adapter(&dev->i2c_adapter);
}
#endif
| linux-master | drivers/media/usb/hdpvr/hdpvr-i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Hauppauge HD PVR USB driver - video 4 linux 2 interface
*
* Copyright (C) 2008 Janne Grunau ([email protected])
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/uaccess.h>
#include <linux/usb.h>
#include <linux/mutex.h>
#include <linux/workqueue.h>
#include <linux/videodev2.h>
#include <linux/v4l2-dv-timings.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-common.h>
#include <media/v4l2-dv-timings.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-event.h>
#include "hdpvr.h"
#define BULK_URB_TIMEOUT 90 /* 0.09 seconds */
#define print_buffer_status() { \
v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev, \
"%s:%d buffer stat: %d free, %d proc\n", \
__func__, __LINE__, \
list_size(&dev->free_buff_list), \
list_size(&dev->rec_buff_list)); }
static const struct v4l2_dv_timings hdpvr_dv_timings[] = {
V4L2_DV_BT_CEA_720X480I59_94,
V4L2_DV_BT_CEA_720X576I50,
V4L2_DV_BT_CEA_720X480P59_94,
V4L2_DV_BT_CEA_720X576P50,
V4L2_DV_BT_CEA_1280X720P50,
V4L2_DV_BT_CEA_1280X720P60,
V4L2_DV_BT_CEA_1920X1080I50,
V4L2_DV_BT_CEA_1920X1080I60,
};
/* Use 480i59 as the default timings */
#define HDPVR_DEF_DV_TIMINGS_IDX (0)
struct hdpvr_fh {
struct v4l2_fh fh;
bool legacy_mode;
};
static uint list_size(struct list_head *list)
{
struct list_head *tmp;
uint count = 0;
list_for_each(tmp, list) {
count++;
}
return count;
}
/*=========================================================================*/
/* urb callback */
static void hdpvr_read_bulk_callback(struct urb *urb)
{
struct hdpvr_buffer *buf = (struct hdpvr_buffer *)urb->context;
struct hdpvr_device *dev = buf->dev;
/* marking buffer as received and wake waiting */
buf->status = BUFSTAT_READY;
wake_up_interruptible(&dev->wait_data);
}
/*=========================================================================*/
/* buffer bits */
/* function expects dev->io_mutex to be hold by caller */
int hdpvr_cancel_queue(struct hdpvr_device *dev)
{
struct hdpvr_buffer *buf;
list_for_each_entry(buf, &dev->rec_buff_list, buff_list) {
usb_kill_urb(buf->urb);
buf->status = BUFSTAT_AVAILABLE;
}
list_splice_init(&dev->rec_buff_list, dev->free_buff_list.prev);
return 0;
}
static int hdpvr_free_queue(struct list_head *q)
{
struct list_head *tmp;
struct list_head *p;
struct hdpvr_buffer *buf;
struct urb *urb;
for (p = q->next; p != q;) {
buf = list_entry(p, struct hdpvr_buffer, buff_list);
urb = buf->urb;
usb_free_coherent(urb->dev, urb->transfer_buffer_length,
urb->transfer_buffer, urb->transfer_dma);
usb_free_urb(urb);
tmp = p->next;
list_del(p);
kfree(buf);
p = tmp;
}
return 0;
}
/* function expects dev->io_mutex to be hold by caller */
int hdpvr_free_buffers(struct hdpvr_device *dev)
{
hdpvr_cancel_queue(dev);
hdpvr_free_queue(&dev->free_buff_list);
hdpvr_free_queue(&dev->rec_buff_list);
return 0;
}
/* function expects dev->io_mutex to be hold by caller */
int hdpvr_alloc_buffers(struct hdpvr_device *dev, uint count)
{
uint i;
int retval = -ENOMEM;
u8 *mem;
struct hdpvr_buffer *buf;
struct urb *urb;
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"allocating %u buffers\n", count);
for (i = 0; i < count; i++) {
buf = kzalloc(sizeof(struct hdpvr_buffer), GFP_KERNEL);
if (!buf) {
v4l2_err(&dev->v4l2_dev, "cannot allocate buffer\n");
goto exit;
}
buf->dev = dev;
urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb)
goto exit_urb;
buf->urb = urb;
mem = usb_alloc_coherent(dev->udev, dev->bulk_in_size, GFP_KERNEL,
&urb->transfer_dma);
if (!mem) {
v4l2_err(&dev->v4l2_dev,
"cannot allocate usb transfer buffer\n");
goto exit_urb_buffer;
}
usb_fill_bulk_urb(buf->urb, dev->udev,
usb_rcvbulkpipe(dev->udev,
dev->bulk_in_endpointAddr),
mem, dev->bulk_in_size,
hdpvr_read_bulk_callback, buf);
buf->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
buf->status = BUFSTAT_AVAILABLE;
list_add_tail(&buf->buff_list, &dev->free_buff_list);
}
return 0;
exit_urb_buffer:
usb_free_urb(urb);
exit_urb:
kfree(buf);
exit:
hdpvr_free_buffers(dev);
return retval;
}
static int hdpvr_submit_buffers(struct hdpvr_device *dev)
{
struct hdpvr_buffer *buf;
struct urb *urb;
int ret = 0, err_count = 0;
mutex_lock(&dev->io_mutex);
while (dev->status == STATUS_STREAMING &&
!list_empty(&dev->free_buff_list)) {
buf = list_entry(dev->free_buff_list.next, struct hdpvr_buffer,
buff_list);
if (buf->status != BUFSTAT_AVAILABLE) {
v4l2_err(&dev->v4l2_dev,
"buffer not marked as available\n");
ret = -EFAULT;
goto err;
}
urb = buf->urb;
urb->status = 0;
urb->actual_length = 0;
ret = usb_submit_urb(urb, GFP_KERNEL);
if (ret) {
v4l2_err(&dev->v4l2_dev,
"usb_submit_urb in %s returned %d\n",
__func__, ret);
if (++err_count > 2)
break;
continue;
}
buf->status = BUFSTAT_INPROGRESS;
list_move_tail(&buf->buff_list, &dev->rec_buff_list);
}
err:
print_buffer_status();
mutex_unlock(&dev->io_mutex);
return ret;
}
static struct hdpvr_buffer *hdpvr_get_next_buffer(struct hdpvr_device *dev)
{
struct hdpvr_buffer *buf;
mutex_lock(&dev->io_mutex);
if (list_empty(&dev->rec_buff_list)) {
mutex_unlock(&dev->io_mutex);
return NULL;
}
buf = list_entry(dev->rec_buff_list.next, struct hdpvr_buffer,
buff_list);
mutex_unlock(&dev->io_mutex);
return buf;
}
static void hdpvr_transmit_buffers(struct work_struct *work)
{
struct hdpvr_device *dev = container_of(work, struct hdpvr_device,
worker);
while (dev->status == STATUS_STREAMING) {
if (hdpvr_submit_buffers(dev)) {
v4l2_err(&dev->v4l2_dev, "couldn't submit buffers\n");
goto error;
}
if (wait_event_interruptible(dev->wait_buffer,
!list_empty(&dev->free_buff_list) ||
dev->status != STATUS_STREAMING))
goto error;
}
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"transmit worker exited\n");
return;
error:
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"transmit buffers errored\n");
dev->status = STATUS_ERROR;
}
/* function expects dev->io_mutex to be hold by caller */
static int hdpvr_start_streaming(struct hdpvr_device *dev)
{
int ret;
struct hdpvr_video_info vidinf;
if (dev->status == STATUS_STREAMING)
return 0;
if (dev->status != STATUS_IDLE)
return -EAGAIN;
ret = get_video_info(dev, &vidinf);
if (ret < 0)
return ret;
if (!vidinf.valid) {
msleep(250);
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"no video signal at input %d\n", dev->options.video_input);
return -EAGAIN;
}
v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev,
"video signal: %dx%d@%dhz\n", vidinf.width,
vidinf.height, vidinf.fps);
/* start streaming 2 request */
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
0xb8, 0x38, 0x1, 0, NULL, 0, 8000);
v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev,
"encoder start control request returned %d\n", ret);
if (ret < 0)
return ret;
ret = hdpvr_config_call(dev, CTRL_START_STREAMING_VALUE, 0x00);
if (ret)
return ret;
dev->status = STATUS_STREAMING;
schedule_work(&dev->worker);
v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev,
"streaming started\n");
return 0;
}
/* function expects dev->io_mutex to be hold by caller */
static int hdpvr_stop_streaming(struct hdpvr_device *dev)
{
int actual_length;
uint c = 0;
u8 *buf;
if (dev->status == STATUS_IDLE)
return 0;
else if (dev->status != STATUS_STREAMING)
return -EAGAIN;
buf = kmalloc(dev->bulk_in_size, GFP_KERNEL);
if (!buf)
v4l2_err(&dev->v4l2_dev, "failed to allocate temporary buffer for emptying the internal device buffer. Next capture start will be slow\n");
dev->status = STATUS_SHUTTING_DOWN;
hdpvr_config_call(dev, CTRL_STOP_STREAMING_VALUE, 0x00);
mutex_unlock(&dev->io_mutex);
wake_up_interruptible(&dev->wait_buffer);
msleep(50);
flush_work(&dev->worker);
mutex_lock(&dev->io_mutex);
/* kill the still outstanding urbs */
hdpvr_cancel_queue(dev);
/* emptying the device buffer beforeshutting it down */
while (buf && ++c < 500 &&
!usb_bulk_msg(dev->udev,
usb_rcvbulkpipe(dev->udev,
dev->bulk_in_endpointAddr),
buf, dev->bulk_in_size, &actual_length,
BULK_URB_TIMEOUT)) {
v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev,
"%2d: got %d bytes\n", c, actual_length);
}
kfree(buf);
v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev,
"used %d urbs to empty device buffers\n", c-1);
msleep(10);
dev->status = STATUS_IDLE;
return 0;
}
/*=======================================================================*/
/*
* video 4 linux 2 file operations
*/
static int hdpvr_open(struct file *file)
{
struct hdpvr_fh *fh = kzalloc(sizeof(*fh), GFP_KERNEL);
if (fh == NULL)
return -ENOMEM;
fh->legacy_mode = true;
v4l2_fh_init(&fh->fh, video_devdata(file));
v4l2_fh_add(&fh->fh);
file->private_data = fh;
return 0;
}
static int hdpvr_release(struct file *file)
{
struct hdpvr_device *dev = video_drvdata(file);
mutex_lock(&dev->io_mutex);
if (file->private_data == dev->owner) {
hdpvr_stop_streaming(dev);
dev->owner = NULL;
}
mutex_unlock(&dev->io_mutex);
return v4l2_fh_release(file);
}
/*
* hdpvr_v4l2_read()
* will allocate buffers when called for the first time
*/
static ssize_t hdpvr_read(struct file *file, char __user *buffer, size_t count,
loff_t *pos)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_buffer *buf = NULL;
struct urb *urb;
int ret = 0;
int rem, cnt;
if (*pos)
return -ESPIPE;
mutex_lock(&dev->io_mutex);
if (dev->status == STATUS_IDLE) {
if (hdpvr_start_streaming(dev)) {
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"start_streaming failed\n");
ret = -EIO;
msleep(200);
dev->status = STATUS_IDLE;
mutex_unlock(&dev->io_mutex);
goto err;
}
dev->owner = file->private_data;
print_buffer_status();
}
mutex_unlock(&dev->io_mutex);
/* wait for the first buffer */
if (!(file->f_flags & O_NONBLOCK)) {
if (wait_event_interruptible(dev->wait_data,
!list_empty_careful(&dev->rec_buff_list)))
return -ERESTARTSYS;
}
buf = hdpvr_get_next_buffer(dev);
while (count > 0 && buf) {
if (buf->status != BUFSTAT_READY &&
dev->status != STATUS_DISCONNECTED) {
int err;
/* return nonblocking */
if (file->f_flags & O_NONBLOCK) {
if (!ret)
ret = -EAGAIN;
goto err;
}
err = wait_event_interruptible_timeout(dev->wait_data,
buf->status == BUFSTAT_READY,
msecs_to_jiffies(1000));
if (err < 0) {
ret = err;
goto err;
}
if (!err) {
v4l2_info(&dev->v4l2_dev,
"timeout: restart streaming\n");
mutex_lock(&dev->io_mutex);
hdpvr_stop_streaming(dev);
mutex_unlock(&dev->io_mutex);
/*
* The FW needs about 4 seconds after streaming
* stopped before it is ready to restart
* streaming.
*/
msleep(4000);
err = hdpvr_start_streaming(dev);
if (err) {
ret = err;
goto err;
}
}
}
if (buf->status != BUFSTAT_READY)
break;
/* set remaining bytes to copy */
urb = buf->urb;
rem = urb->actual_length - buf->pos;
cnt = rem > count ? count : rem;
if (copy_to_user(buffer, urb->transfer_buffer + buf->pos,
cnt)) {
v4l2_err(&dev->v4l2_dev, "read: copy_to_user failed\n");
if (!ret)
ret = -EFAULT;
goto err;
}
buf->pos += cnt;
count -= cnt;
buffer += cnt;
ret += cnt;
/* finished, take next buffer */
if (buf->pos == urb->actual_length) {
mutex_lock(&dev->io_mutex);
buf->pos = 0;
buf->status = BUFSTAT_AVAILABLE;
list_move_tail(&buf->buff_list, &dev->free_buff_list);
print_buffer_status();
mutex_unlock(&dev->io_mutex);
wake_up_interruptible(&dev->wait_buffer);
buf = hdpvr_get_next_buffer(dev);
}
}
err:
if (!ret && !buf)
ret = -EAGAIN;
return ret;
}
static __poll_t hdpvr_poll(struct file *filp, poll_table *wait)
{
__poll_t req_events = poll_requested_events(wait);
struct hdpvr_buffer *buf = NULL;
struct hdpvr_device *dev = video_drvdata(filp);
__poll_t mask = v4l2_ctrl_poll(filp, wait);
if (!(req_events & (EPOLLIN | EPOLLRDNORM)))
return mask;
mutex_lock(&dev->io_mutex);
if (dev->status == STATUS_IDLE) {
if (hdpvr_start_streaming(dev)) {
v4l2_dbg(MSG_BUFFER, hdpvr_debug, &dev->v4l2_dev,
"start_streaming failed\n");
dev->status = STATUS_IDLE;
} else {
dev->owner = filp->private_data;
}
print_buffer_status();
}
mutex_unlock(&dev->io_mutex);
buf = hdpvr_get_next_buffer(dev);
/* only wait if no data is available */
if (!buf || buf->status != BUFSTAT_READY) {
poll_wait(filp, &dev->wait_data, wait);
buf = hdpvr_get_next_buffer(dev);
}
if (buf && buf->status == BUFSTAT_READY)
mask |= EPOLLIN | EPOLLRDNORM;
return mask;
}
static const struct v4l2_file_operations hdpvr_fops = {
.owner = THIS_MODULE,
.open = hdpvr_open,
.release = hdpvr_release,
.read = hdpvr_read,
.poll = hdpvr_poll,
.unlocked_ioctl = video_ioctl2,
};
/*=======================================================================*/
/*
* V4L2 ioctl handling
*/
static int vidioc_querycap(struct file *file, void *priv,
struct v4l2_capability *cap)
{
struct hdpvr_device *dev = video_drvdata(file);
strscpy(cap->driver, "hdpvr", sizeof(cap->driver));
strscpy(cap->card, "Hauppauge HD PVR", sizeof(cap->card));
usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info));
return 0;
}
static int vidioc_s_std(struct file *file, void *_fh,
v4l2_std_id std)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
u8 std_type = 1;
if (!fh->legacy_mode && dev->options.video_input == HDPVR_COMPONENT)
return -ENODATA;
if (dev->status != STATUS_IDLE)
return -EBUSY;
if (std & V4L2_STD_525_60)
std_type = 0;
dev->cur_std = std;
dev->width = 720;
dev->height = std_type ? 576 : 480;
return hdpvr_config_call(dev, CTRL_VIDEO_STD_TYPE, std_type);
}
static int vidioc_g_std(struct file *file, void *_fh,
v4l2_std_id *std)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
if (!fh->legacy_mode && dev->options.video_input == HDPVR_COMPONENT)
return -ENODATA;
*std = dev->cur_std;
return 0;
}
static int vidioc_querystd(struct file *file, void *_fh, v4l2_std_id *a)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_video_info vid_info;
struct hdpvr_fh *fh = _fh;
int ret;
*a = V4L2_STD_UNKNOWN;
if (dev->options.video_input == HDPVR_COMPONENT)
return fh->legacy_mode ? 0 : -ENODATA;
ret = get_video_info(dev, &vid_info);
if (vid_info.valid && vid_info.width == 720 &&
(vid_info.height == 480 || vid_info.height == 576)) {
*a = (vid_info.height == 480) ?
V4L2_STD_525_60 : V4L2_STD_625_50;
}
return ret;
}
static int vidioc_s_dv_timings(struct file *file, void *_fh,
struct v4l2_dv_timings *timings)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
int i;
fh->legacy_mode = false;
if (dev->options.video_input)
return -ENODATA;
if (dev->status != STATUS_IDLE)
return -EBUSY;
for (i = 0; i < ARRAY_SIZE(hdpvr_dv_timings); i++)
if (v4l2_match_dv_timings(timings, hdpvr_dv_timings + i, 0, false))
break;
if (i == ARRAY_SIZE(hdpvr_dv_timings))
return -EINVAL;
dev->cur_dv_timings = hdpvr_dv_timings[i];
dev->width = hdpvr_dv_timings[i].bt.width;
dev->height = hdpvr_dv_timings[i].bt.height;
return 0;
}
static int vidioc_g_dv_timings(struct file *file, void *_fh,
struct v4l2_dv_timings *timings)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
fh->legacy_mode = false;
if (dev->options.video_input)
return -ENODATA;
*timings = dev->cur_dv_timings;
return 0;
}
static int vidioc_query_dv_timings(struct file *file, void *_fh,
struct v4l2_dv_timings *timings)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
struct hdpvr_video_info vid_info;
bool interlaced;
int ret = 0;
int i;
fh->legacy_mode = false;
if (dev->options.video_input)
return -ENODATA;
ret = get_video_info(dev, &vid_info);
if (ret)
return ret;
if (!vid_info.valid)
return -ENOLCK;
interlaced = vid_info.fps <= 30;
for (i = 0; i < ARRAY_SIZE(hdpvr_dv_timings); i++) {
const struct v4l2_bt_timings *bt = &hdpvr_dv_timings[i].bt;
unsigned hsize;
unsigned vsize;
unsigned fps;
hsize = V4L2_DV_BT_FRAME_WIDTH(bt);
vsize = V4L2_DV_BT_FRAME_HEIGHT(bt);
fps = (unsigned)bt->pixelclock / (hsize * vsize);
if (bt->width != vid_info.width ||
bt->height != vid_info.height ||
bt->interlaced != interlaced ||
(fps != vid_info.fps && fps + 1 != vid_info.fps))
continue;
*timings = hdpvr_dv_timings[i];
break;
}
if (i == ARRAY_SIZE(hdpvr_dv_timings))
ret = -ERANGE;
return ret;
}
static int vidioc_enum_dv_timings(struct file *file, void *_fh,
struct v4l2_enum_dv_timings *timings)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
fh->legacy_mode = false;
memset(timings->reserved, 0, sizeof(timings->reserved));
if (dev->options.video_input)
return -ENODATA;
if (timings->index >= ARRAY_SIZE(hdpvr_dv_timings))
return -EINVAL;
timings->timings = hdpvr_dv_timings[timings->index];
return 0;
}
static int vidioc_dv_timings_cap(struct file *file, void *_fh,
struct v4l2_dv_timings_cap *cap)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
fh->legacy_mode = false;
if (dev->options.video_input)
return -ENODATA;
cap->type = V4L2_DV_BT_656_1120;
cap->bt.min_width = 720;
cap->bt.max_width = 1920;
cap->bt.min_height = 480;
cap->bt.max_height = 1080;
cap->bt.min_pixelclock = 27000000;
cap->bt.max_pixelclock = 74250000;
cap->bt.standards = V4L2_DV_BT_STD_CEA861;
cap->bt.capabilities = V4L2_DV_BT_CAP_INTERLACED | V4L2_DV_BT_CAP_PROGRESSIVE;
return 0;
}
static const char *iname[] = {
[HDPVR_COMPONENT] = "Component",
[HDPVR_SVIDEO] = "S-Video",
[HDPVR_COMPOSITE] = "Composite",
};
static int vidioc_enum_input(struct file *file, void *_fh, struct v4l2_input *i)
{
unsigned int n;
n = i->index;
if (n >= HDPVR_VIDEO_INPUTS)
return -EINVAL;
i->type = V4L2_INPUT_TYPE_CAMERA;
strscpy(i->name, iname[n], sizeof(i->name));
i->audioset = 1<<HDPVR_RCA_FRONT | 1<<HDPVR_RCA_BACK | 1<<HDPVR_SPDIF;
i->capabilities = n ? V4L2_IN_CAP_STD : V4L2_IN_CAP_DV_TIMINGS;
i->std = n ? V4L2_STD_ALL : 0;
return 0;
}
static int vidioc_s_input(struct file *file, void *_fh,
unsigned int index)
{
struct hdpvr_device *dev = video_drvdata(file);
int retval;
if (index >= HDPVR_VIDEO_INPUTS)
return -EINVAL;
if (dev->status != STATUS_IDLE)
return -EBUSY;
retval = hdpvr_config_call(dev, CTRL_VIDEO_INPUT_VALUE, index+1);
if (!retval) {
dev->options.video_input = index;
/*
* Unfortunately gstreamer calls ENUMSTD and bails out if it
* won't find any formats, even though component input is
* selected. This means that we have to leave tvnorms at
* V4L2_STD_ALL. We cannot use the 'legacy' trick since
* tvnorms is set at the device node level and not at the
* filehandle level.
*
* Comment this out for now, but if the legacy mode can be
* removed in the future, then this code should be enabled
* again.
dev->video_dev.tvnorms =
(index != HDPVR_COMPONENT) ? V4L2_STD_ALL : 0;
*/
}
return retval;
}
static int vidioc_g_input(struct file *file, void *private_data,
unsigned int *index)
{
struct hdpvr_device *dev = video_drvdata(file);
*index = dev->options.video_input;
return 0;
}
static const char *audio_iname[] = {
[HDPVR_RCA_FRONT] = "RCA front",
[HDPVR_RCA_BACK] = "RCA back",
[HDPVR_SPDIF] = "SPDIF",
};
static int vidioc_enumaudio(struct file *file, void *priv,
struct v4l2_audio *audio)
{
unsigned int n;
n = audio->index;
if (n >= HDPVR_AUDIO_INPUTS)
return -EINVAL;
audio->capability = V4L2_AUDCAP_STEREO;
strscpy(audio->name, audio_iname[n], sizeof(audio->name));
return 0;
}
static int vidioc_s_audio(struct file *file, void *private_data,
const struct v4l2_audio *audio)
{
struct hdpvr_device *dev = video_drvdata(file);
int retval;
if (audio->index >= HDPVR_AUDIO_INPUTS)
return -EINVAL;
if (dev->status != STATUS_IDLE)
return -EBUSY;
retval = hdpvr_set_audio(dev, audio->index+1, dev->options.audio_codec);
if (!retval)
dev->options.audio_input = audio->index;
return retval;
}
static int vidioc_g_audio(struct file *file, void *private_data,
struct v4l2_audio *audio)
{
struct hdpvr_device *dev = video_drvdata(file);
audio->index = dev->options.audio_input;
audio->capability = V4L2_AUDCAP_STEREO;
strscpy(audio->name, audio_iname[audio->index], sizeof(audio->name));
return 0;
}
static int hdpvr_try_ctrl(struct v4l2_ctrl *ctrl)
{
struct hdpvr_device *dev =
container_of(ctrl->handler, struct hdpvr_device, hdl);
switch (ctrl->id) {
case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
if (ctrl->val == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR &&
dev->video_bitrate->val >= dev->video_bitrate_peak->val)
dev->video_bitrate_peak->val =
dev->video_bitrate->val + 100000;
break;
}
return 0;
}
static int hdpvr_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct hdpvr_device *dev =
container_of(ctrl->handler, struct hdpvr_device, hdl);
struct hdpvr_options *opt = &dev->options;
int ret = -EINVAL;
switch (ctrl->id) {
case V4L2_CID_BRIGHTNESS:
ret = hdpvr_config_call(dev, CTRL_BRIGHTNESS, ctrl->val);
if (ret)
break;
dev->options.brightness = ctrl->val;
return 0;
case V4L2_CID_CONTRAST:
ret = hdpvr_config_call(dev, CTRL_CONTRAST, ctrl->val);
if (ret)
break;
dev->options.contrast = ctrl->val;
return 0;
case V4L2_CID_SATURATION:
ret = hdpvr_config_call(dev, CTRL_SATURATION, ctrl->val);
if (ret)
break;
dev->options.saturation = ctrl->val;
return 0;
case V4L2_CID_HUE:
ret = hdpvr_config_call(dev, CTRL_HUE, ctrl->val);
if (ret)
break;
dev->options.hue = ctrl->val;
return 0;
case V4L2_CID_SHARPNESS:
ret = hdpvr_config_call(dev, CTRL_SHARPNESS, ctrl->val);
if (ret)
break;
dev->options.sharpness = ctrl->val;
return 0;
case V4L2_CID_MPEG_AUDIO_ENCODING:
if (dev->flags & HDPVR_FLAG_AC3_CAP) {
opt->audio_codec = ctrl->val;
return hdpvr_set_audio(dev, opt->audio_input + 1,
opt->audio_codec);
}
return 0;
case V4L2_CID_MPEG_VIDEO_ENCODING:
return 0;
/* case V4L2_CID_MPEG_VIDEO_B_FRAMES: */
/* if (ctrl->value == 0 && !(opt->gop_mode & 0x2)) { */
/* opt->gop_mode |= 0x2; */
/* hdpvr_config_call(dev, CTRL_GOP_MODE_VALUE, */
/* opt->gop_mode); */
/* } */
/* if (ctrl->value == 128 && opt->gop_mode & 0x2) { */
/* opt->gop_mode &= ~0x2; */
/* hdpvr_config_call(dev, CTRL_GOP_MODE_VALUE, */
/* opt->gop_mode); */
/* } */
/* break; */
case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: {
uint peak_bitrate = dev->video_bitrate_peak->val / 100000;
uint bitrate = dev->video_bitrate->val / 100000;
if (ctrl->is_new) {
if (ctrl->val == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR)
opt->bitrate_mode = HDPVR_CONSTANT;
else
opt->bitrate_mode = HDPVR_VARIABLE_AVERAGE;
hdpvr_config_call(dev, CTRL_BITRATE_MODE_VALUE,
opt->bitrate_mode);
v4l2_ctrl_activate(dev->video_bitrate_peak,
ctrl->val != V4L2_MPEG_VIDEO_BITRATE_MODE_CBR);
}
if (dev->video_bitrate_peak->is_new ||
dev->video_bitrate->is_new) {
opt->bitrate = bitrate;
opt->peak_bitrate = peak_bitrate;
hdpvr_set_bitrate(dev);
}
return 0;
}
case V4L2_CID_MPEG_STREAM_TYPE:
return 0;
default:
break;
}
return ret;
}
static int vidioc_enum_fmt_vid_cap(struct file *file, void *private_data,
struct v4l2_fmtdesc *f)
{
if (f->index != 0)
return -EINVAL;
f->pixelformat = V4L2_PIX_FMT_MPEG;
return 0;
}
static int vidioc_g_fmt_vid_cap(struct file *file, void *_fh,
struct v4l2_format *f)
{
struct hdpvr_device *dev = video_drvdata(file);
struct hdpvr_fh *fh = _fh;
int ret;
/*
* The original driver would always returns the current detected
* resolution as the format (and EFAULT if it couldn't be detected).
* With the introduction of VIDIOC_QUERY_DV_TIMINGS there is now a
* better way of doing this, but to stay compatible with existing
* applications we assume legacy mode every time an application opens
* the device. Only if one of the new DV_TIMINGS ioctls is called
* will the filehandle go into 'normal' mode where g_fmt returns the
* last set format.
*/
if (fh->legacy_mode) {
struct hdpvr_video_info vid_info;
ret = get_video_info(dev, &vid_info);
if (ret < 0)
return ret;
if (!vid_info.valid)
return -EFAULT;
f->fmt.pix.width = vid_info.width;
f->fmt.pix.height = vid_info.height;
} else {
f->fmt.pix.width = dev->width;
f->fmt.pix.height = dev->height;
}
f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
f->fmt.pix.sizeimage = dev->bulk_in_size;
f->fmt.pix.bytesperline = 0;
if (f->fmt.pix.width == 720) {
/* SDTV formats */
f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
f->fmt.pix.field = V4L2_FIELD_INTERLACED;
} else {
/* HDTV formats */
f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
f->fmt.pix.field = V4L2_FIELD_NONE;
}
return 0;
}
static int vidioc_encoder_cmd(struct file *filp, void *priv,
struct v4l2_encoder_cmd *a)
{
struct hdpvr_device *dev = video_drvdata(filp);
int res = 0;
mutex_lock(&dev->io_mutex);
a->flags = 0;
switch (a->cmd) {
case V4L2_ENC_CMD_START:
if (dev->owner && filp->private_data != dev->owner) {
res = -EBUSY;
break;
}
if (dev->status == STATUS_STREAMING)
break;
res = hdpvr_start_streaming(dev);
if (!res)
dev->owner = filp->private_data;
else
dev->status = STATUS_IDLE;
break;
case V4L2_ENC_CMD_STOP:
if (dev->owner && filp->private_data != dev->owner) {
res = -EBUSY;
break;
}
if (dev->status == STATUS_IDLE)
break;
res = hdpvr_stop_streaming(dev);
if (!res)
dev->owner = NULL;
break;
default:
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"Unsupported encoder cmd %d\n", a->cmd);
res = -EINVAL;
break;
}
mutex_unlock(&dev->io_mutex);
return res;
}
static int vidioc_try_encoder_cmd(struct file *filp, void *priv,
struct v4l2_encoder_cmd *a)
{
a->flags = 0;
switch (a->cmd) {
case V4L2_ENC_CMD_START:
case V4L2_ENC_CMD_STOP:
return 0;
default:
return -EINVAL;
}
}
static const struct v4l2_ioctl_ops hdpvr_ioctl_ops = {
.vidioc_querycap = vidioc_querycap,
.vidioc_s_std = vidioc_s_std,
.vidioc_g_std = vidioc_g_std,
.vidioc_querystd = vidioc_querystd,
.vidioc_s_dv_timings = vidioc_s_dv_timings,
.vidioc_g_dv_timings = vidioc_g_dv_timings,
.vidioc_query_dv_timings= vidioc_query_dv_timings,
.vidioc_enum_dv_timings = vidioc_enum_dv_timings,
.vidioc_dv_timings_cap = vidioc_dv_timings_cap,
.vidioc_enum_input = vidioc_enum_input,
.vidioc_g_input = vidioc_g_input,
.vidioc_s_input = vidioc_s_input,
.vidioc_enumaudio = vidioc_enumaudio,
.vidioc_g_audio = vidioc_g_audio,
.vidioc_s_audio = vidioc_s_audio,
.vidioc_enum_fmt_vid_cap= vidioc_enum_fmt_vid_cap,
.vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = vidioc_g_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = vidioc_g_fmt_vid_cap,
.vidioc_encoder_cmd = vidioc_encoder_cmd,
.vidioc_try_encoder_cmd = vidioc_try_encoder_cmd,
.vidioc_log_status = v4l2_ctrl_log_status,
.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
};
static void hdpvr_device_release(struct video_device *vdev)
{
struct hdpvr_device *dev = video_get_drvdata(vdev);
hdpvr_delete(dev);
flush_work(&dev->worker);
v4l2_device_unregister(&dev->v4l2_dev);
v4l2_ctrl_handler_free(&dev->hdl);
/* deregister I2C adapter */
#if IS_ENABLED(CONFIG_I2C)
mutex_lock(&dev->i2c_mutex);
i2c_del_adapter(&dev->i2c_adapter);
mutex_unlock(&dev->i2c_mutex);
#endif /* CONFIG_I2C */
kfree(dev->usbc_buf);
kfree(dev);
}
static const struct video_device hdpvr_video_template = {
.fops = &hdpvr_fops,
.release = hdpvr_device_release,
.ioctl_ops = &hdpvr_ioctl_ops,
.tvnorms = V4L2_STD_ALL,
.device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_AUDIO |
V4L2_CAP_READWRITE,
};
static const struct v4l2_ctrl_ops hdpvr_ctrl_ops = {
.try_ctrl = hdpvr_try_ctrl,
.s_ctrl = hdpvr_s_ctrl,
};
int hdpvr_register_videodev(struct hdpvr_device *dev, struct device *parent,
int devnum)
{
struct v4l2_ctrl_handler *hdl = &dev->hdl;
bool ac3 = dev->flags & HDPVR_FLAG_AC3_CAP;
int res;
// initialize dev->worker
INIT_WORK(&dev->worker, hdpvr_transmit_buffers);
dev->cur_std = V4L2_STD_525_60;
dev->width = 720;
dev->height = 480;
dev->cur_dv_timings = hdpvr_dv_timings[HDPVR_DEF_DV_TIMINGS_IDX];
v4l2_ctrl_handler_init(hdl, 11);
if (dev->fw_ver > 0x15) {
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_BRIGHTNESS, 0x0, 0xff, 1, 0x80);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_CONTRAST, 0x0, 0xff, 1, 0x40);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_SATURATION, 0x0, 0xff, 1, 0x40);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_HUE, 0x0, 0x1e, 1, 0xf);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_SHARPNESS, 0x0, 0xff, 1, 0x80);
} else {
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_BRIGHTNESS, 0x0, 0xff, 1, 0x86);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_CONTRAST, 0x0, 0xff, 1, 0x80);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_SATURATION, 0x0, 0xff, 1, 0x80);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_HUE, 0x0, 0xff, 1, 0x80);
v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_SHARPNESS, 0x0, 0xff, 1, 0x80);
}
v4l2_ctrl_new_std_menu(hdl, &hdpvr_ctrl_ops,
V4L2_CID_MPEG_STREAM_TYPE,
V4L2_MPEG_STREAM_TYPE_MPEG2_TS,
0x1, V4L2_MPEG_STREAM_TYPE_MPEG2_TS);
v4l2_ctrl_new_std_menu(hdl, &hdpvr_ctrl_ops,
V4L2_CID_MPEG_AUDIO_ENCODING,
ac3 ? V4L2_MPEG_AUDIO_ENCODING_AC3 : V4L2_MPEG_AUDIO_ENCODING_AAC,
0x7, ac3 ? dev->options.audio_codec : V4L2_MPEG_AUDIO_ENCODING_AAC);
v4l2_ctrl_new_std_menu(hdl, &hdpvr_ctrl_ops,
V4L2_CID_MPEG_VIDEO_ENCODING,
V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC, 0x3,
V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC);
dev->video_mode = v4l2_ctrl_new_std_menu(hdl, &hdpvr_ctrl_ops,
V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, 0,
V4L2_MPEG_VIDEO_BITRATE_MODE_CBR);
dev->video_bitrate = v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_MPEG_VIDEO_BITRATE,
1000000, 13500000, 100000, 6500000);
dev->video_bitrate_peak = v4l2_ctrl_new_std(hdl, &hdpvr_ctrl_ops,
V4L2_CID_MPEG_VIDEO_BITRATE_PEAK,
1100000, 20200000, 100000, 9000000);
dev->v4l2_dev.ctrl_handler = hdl;
if (hdl->error) {
res = hdl->error;
v4l2_err(&dev->v4l2_dev, "Could not register controls\n");
goto error;
}
v4l2_ctrl_cluster(3, &dev->video_mode);
res = v4l2_ctrl_handler_setup(hdl);
if (res < 0) {
v4l2_err(&dev->v4l2_dev, "Could not setup controls\n");
goto error;
}
/* setup and register video device */
dev->video_dev = hdpvr_video_template;
strscpy(dev->video_dev.name, "Hauppauge HD PVR",
sizeof(dev->video_dev.name));
dev->video_dev.v4l2_dev = &dev->v4l2_dev;
video_set_drvdata(&dev->video_dev, dev);
res = video_register_device(&dev->video_dev, VFL_TYPE_VIDEO, devnum);
if (res < 0) {
v4l2_err(&dev->v4l2_dev, "video_device registration failed\n");
goto error;
}
return 0;
error:
v4l2_ctrl_handler_free(hdl);
return res;
}
| linux-master | drivers/media/usb/hdpvr/hdpvr-video.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Hauppauge HD PVR USB driver
*
* Copyright (C) 2001-2004 Greg Kroah-Hartman ([email protected])
* Copyright (C) 2008 Janne Grunau ([email protected])
* Copyright (C) 2008 John Poet
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/uaccess.h>
#include <linux/atomic.h>
#include <linux/usb.h>
#include <linux/mutex.h>
#include <linux/i2c.h>
#include <linux/videodev2.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-common.h>
#include "hdpvr.h"
static int video_nr[HDPVR_MAX] = {[0 ... (HDPVR_MAX - 1)] = UNSET};
module_param_array(video_nr, int, NULL, 0);
MODULE_PARM_DESC(video_nr, "video device number (-1=Auto)");
/* holds the number of currently registered devices */
static atomic_t dev_nr = ATOMIC_INIT(-1);
int hdpvr_debug;
module_param(hdpvr_debug, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(hdpvr_debug, "enable debugging output");
static uint default_video_input = HDPVR_VIDEO_INPUTS;
module_param(default_video_input, uint, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(default_video_input, "default video input: 0=Component / 1=S-Video / 2=Composite");
static uint default_audio_input = HDPVR_AUDIO_INPUTS;
module_param(default_audio_input, uint, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(default_audio_input, "default audio input: 0=RCA back / 1=RCA front / 2=S/PDIF");
static bool boost_audio;
module_param(boost_audio, bool, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(boost_audio, "boost the audio signal");
/* table of devices that work with this driver */
static const struct usb_device_id hdpvr_table[] = {
{ USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID) },
{ USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID1) },
{ USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID2) },
{ USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID3) },
{ USB_DEVICE(HD_PVR_VENDOR_ID, HD_PVR_PRODUCT_ID4) },
{ } /* Terminating entry */
};
MODULE_DEVICE_TABLE(usb, hdpvr_table);
void hdpvr_delete(struct hdpvr_device *dev)
{
hdpvr_free_buffers(dev);
usb_put_dev(dev->udev);
}
static void challenge(u8 *bytes)
{
__le64 *i64P;
u64 tmp64;
uint i, idx;
for (idx = 0; idx < 32; ++idx) {
if (idx & 0x3)
bytes[(idx >> 3) + 3] = bytes[(idx >> 2) & 0x3];
switch (idx & 0x3) {
case 0x3:
bytes[2] += bytes[3] * 4 + bytes[4] + bytes[5];
bytes[4] += bytes[(idx & 0x1) * 2] * 9 + 9;
break;
case 0x1:
bytes[0] *= 8;
bytes[0] += 7*idx + 4;
bytes[6] += bytes[3] * 3;
break;
case 0x0:
bytes[3 - (idx >> 3)] = bytes[idx >> 2];
bytes[5] += bytes[6] * 3;
for (i = 0; i < 3; i++)
bytes[3] *= bytes[3] + 1;
break;
case 0x2:
for (i = 0; i < 3; i++)
bytes[1] *= bytes[6] + 1;
for (i = 0; i < 3; i++) {
i64P = (__le64 *)bytes;
tmp64 = le64_to_cpup(i64P);
tmp64 = tmp64 + (tmp64 << (bytes[7] & 0x0f));
*i64P = cpu_to_le64(tmp64);
}
break;
}
}
}
/* try to init the device like the windows driver */
static int device_authorization(struct hdpvr_device *dev)
{
int ret, retval = -ENOMEM;
char request_type = 0x38, rcv_request = 0x81;
char *response;
mutex_lock(&dev->usbc_mutex);
ret = usb_control_msg(dev->udev,
usb_rcvctrlpipe(dev->udev, 0),
rcv_request, 0x80 | request_type,
0x0400, 0x0003,
dev->usbc_buf, 46,
10000);
if (ret != 46) {
v4l2_err(&dev->v4l2_dev,
"unexpected answer of status request, len %d\n", ret);
goto unlock;
}
#ifdef HDPVR_DEBUG
else {
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"Status request returned, len %d: %46ph\n",
ret, dev->usbc_buf);
}
#endif
dev->fw_ver = dev->usbc_buf[1];
dev->usbc_buf[46] = '\0';
v4l2_info(&dev->v4l2_dev, "firmware version 0x%x dated %s\n",
dev->fw_ver, &dev->usbc_buf[2]);
if (dev->fw_ver > 0x15) {
dev->options.brightness = 0x80;
dev->options.contrast = 0x40;
dev->options.hue = 0xf;
dev->options.saturation = 0x40;
dev->options.sharpness = 0x80;
}
switch (dev->fw_ver) {
case HDPVR_FIRMWARE_VERSION:
dev->flags &= ~HDPVR_FLAG_AC3_CAP;
break;
case HDPVR_FIRMWARE_VERSION_AC3:
case HDPVR_FIRMWARE_VERSION_0X12:
case HDPVR_FIRMWARE_VERSION_0X15:
case HDPVR_FIRMWARE_VERSION_0X1E:
dev->flags |= HDPVR_FLAG_AC3_CAP;
break;
default:
v4l2_info(&dev->v4l2_dev, "untested firmware, the driver might not work.\n");
if (dev->fw_ver >= HDPVR_FIRMWARE_VERSION_AC3)
dev->flags |= HDPVR_FLAG_AC3_CAP;
else
dev->flags &= ~HDPVR_FLAG_AC3_CAP;
}
response = dev->usbc_buf+38;
#ifdef HDPVR_DEBUG
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, "challenge: %8ph\n",
response);
#endif
challenge(response);
#ifdef HDPVR_DEBUG
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, " response: %8ph\n",
response);
#endif
msleep(100);
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
0xd1, 0x00 | request_type,
0x0000, 0x0000,
response, 8,
10000);
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"magic request returned %d\n", ret);
retval = ret != 8;
unlock:
mutex_unlock(&dev->usbc_mutex);
return retval;
}
static int hdpvr_device_init(struct hdpvr_device *dev)
{
int ret;
u8 *buf;
if (device_authorization(dev))
return -EACCES;
/* default options for init */
hdpvr_set_options(dev);
/* set filter options */
mutex_lock(&dev->usbc_mutex);
buf = dev->usbc_buf;
buf[0] = 0x03; buf[1] = 0x03; buf[2] = 0x00; buf[3] = 0x00;
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
0x01, 0x38,
CTRL_LOW_PASS_FILTER_VALUE, CTRL_DEFAULT_INDEX,
buf, 4,
1000);
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"control request returned %d\n", ret);
mutex_unlock(&dev->usbc_mutex);
/* enable fan and bling leds */
mutex_lock(&dev->usbc_mutex);
buf[0] = 0x1;
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
0xd4, 0x38, 0, 0, buf, 1,
1000);
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"control request returned %d\n", ret);
/* boost analog audio */
buf[0] = boost_audio;
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
0xd5, 0x38, 0, 0, buf, 1,
1000);
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"control request returned %d\n", ret);
mutex_unlock(&dev->usbc_mutex);
dev->status = STATUS_IDLE;
return 0;
}
static const struct hdpvr_options hdpvr_default_options = {
.video_std = HDPVR_60HZ,
.video_input = HDPVR_COMPONENT,
.audio_input = HDPVR_RCA_BACK,
.bitrate = 65, /* 6 mbps */
.peak_bitrate = 90, /* 9 mbps */
.bitrate_mode = HDPVR_CONSTANT,
.gop_mode = HDPVR_SIMPLE_IDR_GOP,
.audio_codec = V4L2_MPEG_AUDIO_ENCODING_AAC,
/* original picture controls for firmware version <= 0x15 */
/* updated in device_authorization() for newer firmware */
.brightness = 0x86,
.contrast = 0x80,
.hue = 0x80,
.saturation = 0x80,
.sharpness = 0x80,
};
static int hdpvr_probe(struct usb_interface *interface,
const struct usb_device_id *id)
{
struct hdpvr_device *dev;
struct usb_host_interface *iface_desc;
struct usb_endpoint_descriptor *endpoint;
#if IS_ENABLED(CONFIG_I2C)
struct i2c_client *client;
#endif
size_t buffer_size;
int i;
int dev_num;
int retval = -ENOMEM;
/* allocate memory for our device state and initialize it */
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
dev_err(&interface->dev, "Out of memory\n");
goto error;
}
/* init video transfer queues first of all */
/* to prevent oops in hdpvr_delete() on error paths */
INIT_LIST_HEAD(&dev->free_buff_list);
INIT_LIST_HEAD(&dev->rec_buff_list);
/* register v4l2_device early so it can be used for printks */
if (v4l2_device_register(&interface->dev, &dev->v4l2_dev)) {
dev_err(&interface->dev, "v4l2_device_register failed\n");
goto error_free_dev;
}
mutex_init(&dev->io_mutex);
mutex_init(&dev->i2c_mutex);
mutex_init(&dev->usbc_mutex);
dev->usbc_buf = kmalloc(64, GFP_KERNEL);
if (!dev->usbc_buf) {
v4l2_err(&dev->v4l2_dev, "Out of memory\n");
goto error_v4l2_unregister;
}
init_waitqueue_head(&dev->wait_buffer);
init_waitqueue_head(&dev->wait_data);
dev->options = hdpvr_default_options;
if (default_video_input < HDPVR_VIDEO_INPUTS)
dev->options.video_input = default_video_input;
if (default_audio_input < HDPVR_AUDIO_INPUTS) {
dev->options.audio_input = default_audio_input;
if (default_audio_input == HDPVR_SPDIF)
dev->options.audio_codec =
V4L2_MPEG_AUDIO_ENCODING_AC3;
}
dev->udev = usb_get_dev(interface_to_usbdev(interface));
/* set up the endpoint information */
/* use only the first bulk-in and bulk-out endpoints */
iface_desc = interface->cur_altsetting;
for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
endpoint = &iface_desc->endpoint[i].desc;
if (!dev->bulk_in_endpointAddr &&
usb_endpoint_is_bulk_in(endpoint)) {
/* USB interface description is buggy, reported max
* packet size is 512 bytes, windows driver uses 8192 */
buffer_size = 8192;
dev->bulk_in_size = buffer_size;
dev->bulk_in_endpointAddr = endpoint->bEndpointAddress;
}
}
if (!dev->bulk_in_endpointAddr) {
v4l2_err(&dev->v4l2_dev, "Could not find bulk-in endpoint\n");
goto error_put_usb;
}
/* init the device */
if (hdpvr_device_init(dev)) {
v4l2_err(&dev->v4l2_dev, "device init failed\n");
goto error_put_usb;
}
mutex_lock(&dev->io_mutex);
if (hdpvr_alloc_buffers(dev, NUM_BUFFERS)) {
mutex_unlock(&dev->io_mutex);
v4l2_err(&dev->v4l2_dev,
"allocating transfer buffers failed\n");
goto error_put_usb;
}
mutex_unlock(&dev->io_mutex);
#if IS_ENABLED(CONFIG_I2C)
retval = hdpvr_register_i2c_adapter(dev);
if (retval < 0) {
v4l2_err(&dev->v4l2_dev, "i2c adapter register failed\n");
goto error_free_buffers;
}
client = hdpvr_register_ir_i2c(dev);
if (IS_ERR(client)) {
v4l2_err(&dev->v4l2_dev, "i2c IR device register failed\n");
retval = PTR_ERR(client);
goto reg_fail;
}
#endif
dev_num = atomic_inc_return(&dev_nr);
if (dev_num >= HDPVR_MAX) {
v4l2_err(&dev->v4l2_dev,
"max device number reached, device register failed\n");
atomic_dec(&dev_nr);
retval = -ENODEV;
goto reg_fail;
}
retval = hdpvr_register_videodev(dev, &interface->dev,
video_nr[dev_num]);
if (retval < 0) {
v4l2_err(&dev->v4l2_dev, "registering videodev failed\n");
goto reg_fail;
}
/* let the user know what node this device is now attached to */
v4l2_info(&dev->v4l2_dev, "device now attached to %s\n",
video_device_node_name(&dev->video_dev));
return 0;
reg_fail:
#if IS_ENABLED(CONFIG_I2C)
i2c_del_adapter(&dev->i2c_adapter);
error_free_buffers:
#endif
hdpvr_free_buffers(dev);
error_put_usb:
usb_put_dev(dev->udev);
kfree(dev->usbc_buf);
error_v4l2_unregister:
v4l2_device_unregister(&dev->v4l2_dev);
error_free_dev:
kfree(dev);
error:
return retval;
}
static void hdpvr_disconnect(struct usb_interface *interface)
{
struct hdpvr_device *dev = to_hdpvr_dev(usb_get_intfdata(interface));
v4l2_info(&dev->v4l2_dev, "device %s disconnected\n",
video_device_node_name(&dev->video_dev));
/* prevent more I/O from starting and stop any ongoing */
mutex_lock(&dev->io_mutex);
dev->status = STATUS_DISCONNECTED;
wake_up_interruptible(&dev->wait_data);
wake_up_interruptible(&dev->wait_buffer);
mutex_unlock(&dev->io_mutex);
v4l2_device_disconnect(&dev->v4l2_dev);
msleep(100);
flush_work(&dev->worker);
mutex_lock(&dev->io_mutex);
hdpvr_cancel_queue(dev);
mutex_unlock(&dev->io_mutex);
#if IS_ENABLED(CONFIG_I2C)
i2c_del_adapter(&dev->i2c_adapter);
#endif
video_unregister_device(&dev->video_dev);
atomic_dec(&dev_nr);
}
static struct usb_driver hdpvr_usb_driver = {
.name = "hdpvr",
.probe = hdpvr_probe,
.disconnect = hdpvr_disconnect,
.id_table = hdpvr_table,
};
module_usb_driver(hdpvr_usb_driver);
MODULE_LICENSE("GPL");
MODULE_VERSION("0.2.1");
MODULE_AUTHOR("Janne Grunau");
MODULE_DESCRIPTION("Hauppauge HD PVR driver");
| linux-master | drivers/media/usb/hdpvr/hdpvr-core.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* Hauppauge HD PVR USB driver - video 4 linux 2 interface
*
* Copyright (C) 2008 Janne Grunau ([email protected])
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/usb.h>
#include <linux/mutex.h>
#include <linux/videodev2.h>
#include <media/v4l2-common.h>
#include "hdpvr.h"
int hdpvr_config_call(struct hdpvr_device *dev, uint value, u8 valbuf)
{
int ret;
char request_type = 0x38, snd_request = 0x01;
mutex_lock(&dev->usbc_mutex);
dev->usbc_buf[0] = valbuf;
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
snd_request, 0x00 | request_type,
value, CTRL_DEFAULT_INDEX,
dev->usbc_buf, 1, 10000);
mutex_unlock(&dev->usbc_mutex);
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"config call request for value 0x%x returned %d\n", value,
ret);
return ret < 0 ? ret : 0;
}
int get_video_info(struct hdpvr_device *dev, struct hdpvr_video_info *vidinf)
{
int ret;
vidinf->valid = false;
mutex_lock(&dev->usbc_mutex);
ret = usb_control_msg(dev->udev,
usb_rcvctrlpipe(dev->udev, 0),
0x81, 0x80 | 0x38,
0x1400, 0x0003,
dev->usbc_buf, 5,
1000);
#ifdef HDPVR_DEBUG
if (hdpvr_debug & MSG_INFO)
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"get video info returned: %d, %5ph\n", ret,
dev->usbc_buf);
#endif
mutex_unlock(&dev->usbc_mutex);
if (ret < 0)
return ret;
vidinf->width = dev->usbc_buf[1] << 8 | dev->usbc_buf[0];
vidinf->height = dev->usbc_buf[3] << 8 | dev->usbc_buf[2];
vidinf->fps = dev->usbc_buf[4];
vidinf->valid = vidinf->width && vidinf->height && vidinf->fps;
return 0;
}
int get_input_lines_info(struct hdpvr_device *dev)
{
int ret, lines;
mutex_lock(&dev->usbc_mutex);
ret = usb_control_msg(dev->udev,
usb_rcvctrlpipe(dev->udev, 0),
0x81, 0x80 | 0x38,
0x1800, 0x0003,
dev->usbc_buf, 3,
1000);
#ifdef HDPVR_DEBUG
if (hdpvr_debug & MSG_INFO)
v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
"get input lines info returned: %d, %3ph\n", ret,
dev->usbc_buf);
#else
(void)ret; /* suppress compiler warning */
#endif
lines = dev->usbc_buf[1] << 8 | dev->usbc_buf[0];
mutex_unlock(&dev->usbc_mutex);
return lines;
}
int hdpvr_set_bitrate(struct hdpvr_device *dev)
{
int ret;
mutex_lock(&dev->usbc_mutex);
memset(dev->usbc_buf, 0, 4);
dev->usbc_buf[0] = dev->options.bitrate;
dev->usbc_buf[2] = dev->options.peak_bitrate;
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
0x01, 0x38, CTRL_BITRATE_VALUE,
CTRL_DEFAULT_INDEX, dev->usbc_buf, 4, 1000);
mutex_unlock(&dev->usbc_mutex);
return ret;
}
int hdpvr_set_audio(struct hdpvr_device *dev, u8 input,
enum v4l2_mpeg_audio_encoding codec)
{
int ret = 0;
if (dev->flags & HDPVR_FLAG_AC3_CAP) {
mutex_lock(&dev->usbc_mutex);
memset(dev->usbc_buf, 0, 2);
dev->usbc_buf[0] = input;
if (codec == V4L2_MPEG_AUDIO_ENCODING_AAC)
dev->usbc_buf[1] = 0;
else if (codec == V4L2_MPEG_AUDIO_ENCODING_AC3)
dev->usbc_buf[1] = 1;
else {
mutex_unlock(&dev->usbc_mutex);
v4l2_err(&dev->v4l2_dev, "invalid audio codec %d\n",
codec);
ret = -EINVAL;
goto error;
}
ret = usb_control_msg(dev->udev,
usb_sndctrlpipe(dev->udev, 0),
0x01, 0x38, CTRL_AUDIO_INPUT_VALUE,
CTRL_DEFAULT_INDEX, dev->usbc_buf, 2,
1000);
mutex_unlock(&dev->usbc_mutex);
if (ret == 2)
ret = 0;
} else
ret = hdpvr_config_call(dev, CTRL_AUDIO_INPUT_VALUE, input);
error:
return ret;
}
int hdpvr_set_options(struct hdpvr_device *dev)
{
hdpvr_config_call(dev, CTRL_VIDEO_STD_TYPE, dev->options.video_std);
hdpvr_config_call(dev, CTRL_VIDEO_INPUT_VALUE,
dev->options.video_input+1);
hdpvr_set_audio(dev, dev->options.audio_input+1,
dev->options.audio_codec);
hdpvr_set_bitrate(dev);
hdpvr_config_call(dev, CTRL_BITRATE_MODE_VALUE,
dev->options.bitrate_mode);
hdpvr_config_call(dev, CTRL_GOP_MODE_VALUE, dev->options.gop_mode);
hdpvr_config_call(dev, CTRL_BRIGHTNESS, dev->options.brightness);
hdpvr_config_call(dev, CTRL_CONTRAST, dev->options.contrast);
hdpvr_config_call(dev, CTRL_HUE, dev->options.hue);
hdpvr_config_call(dev, CTRL_SATURATION, dev->options.saturation);
hdpvr_config_call(dev, CTRL_SHARPNESS, dev->options.sharpness);
return 0;
}
| linux-master | drivers/media/usb/hdpvr/hdpvr-control.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
DVB device driver for cx231xx
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
Based on em28xx driver
*/
#include "cx231xx.h"
#include <linux/kernel.h>
#include <linux/slab.h>
#include <media/dvbdev.h>
#include <media/dmxdev.h>
#include <media/dvb_demux.h>
#include <media/dvb_net.h>
#include <media/dvb_frontend.h>
#include <media/v4l2-common.h>
#include <media/tuner.h>
#include "xc5000.h"
#include "s5h1432.h"
#include "tda18271.h"
#include "s5h1411.h"
#include "lgdt3305.h"
#include "si2165.h"
#include "si2168.h"
#include "mb86a20s.h"
#include "si2157.h"
#include "lgdt3306a.h"
#include "r820t.h"
#include "mn88473.h"
MODULE_DESCRIPTION("driver for cx231xx based DVB cards");
MODULE_AUTHOR("Srinivasa Deevi <[email protected]>");
MODULE_LICENSE("GPL");
static unsigned int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#define CX231XX_DVB_NUM_BUFS 5
#define CX231XX_DVB_MAX_PACKETSIZE 564
#define CX231XX_DVB_MAX_PACKETS 64
#define CX231XX_DVB_MAX_FRONTENDS 2
struct cx231xx_dvb {
struct dvb_frontend *frontend[CX231XX_DVB_MAX_FRONTENDS];
/* feed count management */
struct mutex lock;
int nfeeds;
/* general boilerplate stuff */
struct dvb_adapter adapter;
struct dvb_demux demux;
struct dmxdev dmxdev;
struct dmx_frontend fe_hw;
struct dmx_frontend fe_mem;
struct dvb_net net;
struct i2c_client *i2c_client_demod[2];
struct i2c_client *i2c_client_tuner;
};
static struct s5h1432_config dvico_s5h1432_config = {
.output_mode = S5H1432_SERIAL_OUTPUT,
.gpio = S5H1432_GPIO_ON,
.qam_if = S5H1432_IF_4000,
.vsb_if = S5H1432_IF_4000,
.inversion = S5H1432_INVERSION_OFF,
.status_mode = S5H1432_DEMODLOCKING,
.mpeg_timing = S5H1432_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
};
static struct tda18271_std_map cnxt_rde253s_tda18271_std_map = {
.dvbt_6 = { .if_freq = 4000, .agc_mode = 3, .std = 4,
.if_lvl = 1, .rfagc_top = 0x37, },
.dvbt_7 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
.if_lvl = 1, .rfagc_top = 0x37, },
.dvbt_8 = { .if_freq = 4000, .agc_mode = 3, .std = 6,
.if_lvl = 1, .rfagc_top = 0x37, },
};
static struct tda18271_std_map mb86a20s_tda18271_config = {
.dvbt_6 = { .if_freq = 4000, .agc_mode = 3, .std = 4,
.if_lvl = 0, .rfagc_top = 0x37, },
};
static struct tda18271_config cnxt_rde253s_tunerconfig = {
.std_map = &cnxt_rde253s_tda18271_std_map,
.gate = TDA18271_GATE_ANALOG,
};
static struct s5h1411_config tda18271_s5h1411_config = {
.output_mode = S5H1411_SERIAL_OUTPUT,
.gpio = S5H1411_GPIO_OFF,
.vsb_if = S5H1411_IF_3250,
.qam_if = S5H1411_IF_4000,
.inversion = S5H1411_INVERSION_ON,
.status_mode = S5H1411_DEMODLOCKING,
.mpeg_timing = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
};
static struct s5h1411_config xc5000_s5h1411_config = {
.output_mode = S5H1411_SERIAL_OUTPUT,
.gpio = S5H1411_GPIO_OFF,
.vsb_if = S5H1411_IF_3250,
.qam_if = S5H1411_IF_3250,
.inversion = S5H1411_INVERSION_OFF,
.status_mode = S5H1411_DEMODLOCKING,
.mpeg_timing = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
};
static struct lgdt3305_config hcw_lgdt3305_config = {
.i2c_addr = 0x0e,
.mpeg_mode = LGDT3305_MPEG_SERIAL,
.tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
.tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
.deny_i2c_rptr = 1,
.spectral_inversion = 1,
.qam_if_khz = 4000,
.vsb_if_khz = 3250,
};
static struct tda18271_std_map hauppauge_tda18271_std_map = {
.atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
.if_lvl = 1, .rfagc_top = 0x58, },
.qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
.if_lvl = 1, .rfagc_top = 0x58, },
};
static struct tda18271_config hcw_tda18271_config = {
.std_map = &hauppauge_tda18271_std_map,
.gate = TDA18271_GATE_DIGITAL,
};
static const struct mb86a20s_config pv_mb86a20s_config = {
.demod_address = 0x10,
.is_serial = true,
};
static struct tda18271_config pv_tda18271_config = {
.std_map = &mb86a20s_tda18271_config,
.gate = TDA18271_GATE_DIGITAL,
.small_i2c = TDA18271_03_BYTE_CHUNK_INIT,
};
static const struct lgdt3306a_config hauppauge_955q_lgdt3306a_config = {
.qam_if_khz = 4000,
.vsb_if_khz = 3250,
.spectral_inversion = 1,
.mpeg_mode = LGDT3306A_MPEG_SERIAL,
.tpclk_edge = LGDT3306A_TPCLK_RISING_EDGE,
.tpvalid_polarity = LGDT3306A_TP_VALID_HIGH,
.xtalMHz = 25,
};
static struct r820t_config astrometa_t2hybrid_r820t_config = {
.i2c_addr = 0x3a, /* 0x74 >> 1 */
.xtal = 16000000,
.rafael_chip = CHIP_R828D,
.max_i2c_msg_len = 2,
};
static inline void print_err_status(struct cx231xx *dev, int packet, int status)
{
char *errmsg = "Unknown";
switch (status) {
case -ENOENT:
errmsg = "unlinked synchronously";
break;
case -ECONNRESET:
errmsg = "unlinked asynchronously";
break;
case -ENOSR:
errmsg = "Buffer error (overrun)";
break;
case -EPIPE:
errmsg = "Stalled (device not responding)";
break;
case -EOVERFLOW:
errmsg = "Babble (bad cable?)";
break;
case -EPROTO:
errmsg = "Bit-stuff error (bad cable?)";
break;
case -EILSEQ:
errmsg = "CRC/Timeout (could be anything)";
break;
case -ETIME:
errmsg = "Device does not respond";
break;
}
if (packet < 0) {
dev_dbg(dev->dev,
"URB status %d [%s].\n", status, errmsg);
} else {
dev_dbg(dev->dev,
"URB packet %d, status %d [%s].\n",
packet, status, errmsg);
}
}
static inline int dvb_isoc_copy(struct cx231xx *dev, struct urb *urb)
{
int i;
if (!dev)
return 0;
if (dev->state & DEV_DISCONNECTED)
return 0;
if (urb->status < 0) {
print_err_status(dev, -1, urb->status);
if (urb->status == -ENOENT)
return 0;
}
for (i = 0; i < urb->number_of_packets; i++) {
int status = urb->iso_frame_desc[i].status;
if (status < 0) {
print_err_status(dev, i, status);
if (urb->iso_frame_desc[i].status != -EPROTO)
continue;
}
dvb_dmx_swfilter(&dev->dvb->demux,
urb->transfer_buffer +
urb->iso_frame_desc[i].offset,
urb->iso_frame_desc[i].actual_length);
}
return 0;
}
static inline int dvb_bulk_copy(struct cx231xx *dev, struct urb *urb)
{
if (!dev)
return 0;
if (dev->state & DEV_DISCONNECTED)
return 0;
if (urb->status < 0) {
print_err_status(dev, -1, urb->status);
if (urb->status == -ENOENT)
return 0;
}
/* Feed the transport payload into the kernel demux */
dvb_dmx_swfilter(&dev->dvb->demux,
urb->transfer_buffer, urb->actual_length);
return 0;
}
static int start_streaming(struct cx231xx_dvb *dvb)
{
int rc;
struct cx231xx *dev = dvb->adapter.priv;
if (dev->USE_ISO) {
dev_dbg(dev->dev, "DVB transfer mode is ISO.\n");
cx231xx_set_alt_setting(dev, INDEX_TS1, 5);
rc = cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);
if (rc < 0)
return rc;
dev->mode_tv = 1;
return cx231xx_init_isoc(dev, CX231XX_DVB_MAX_PACKETS,
CX231XX_DVB_NUM_BUFS,
dev->ts1_mode.max_pkt_size,
dvb_isoc_copy);
} else {
dev_dbg(dev->dev, "DVB transfer mode is BULK.\n");
cx231xx_set_alt_setting(dev, INDEX_TS1, 0);
rc = cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);
if (rc < 0)
return rc;
dev->mode_tv = 1;
return cx231xx_init_bulk(dev, CX231XX_DVB_MAX_PACKETS,
CX231XX_DVB_NUM_BUFS,
dev->ts1_mode.max_pkt_size,
dvb_bulk_copy);
}
}
static int stop_streaming(struct cx231xx_dvb *dvb)
{
struct cx231xx *dev = dvb->adapter.priv;
if (dev->USE_ISO)
cx231xx_uninit_isoc(dev);
else
cx231xx_uninit_bulk(dev);
cx231xx_set_mode(dev, CX231XX_SUSPEND);
return 0;
}
static int start_feed(struct dvb_demux_feed *feed)
{
struct dvb_demux *demux = feed->demux;
struct cx231xx_dvb *dvb = demux->priv;
int rc, ret;
if (!demux->dmx.frontend)
return -EINVAL;
mutex_lock(&dvb->lock);
dvb->nfeeds++;
rc = dvb->nfeeds;
if (dvb->nfeeds == 1) {
ret = start_streaming(dvb);
if (ret < 0)
rc = ret;
}
mutex_unlock(&dvb->lock);
return rc;
}
static int stop_feed(struct dvb_demux_feed *feed)
{
struct dvb_demux *demux = feed->demux;
struct cx231xx_dvb *dvb = demux->priv;
int err = 0;
mutex_lock(&dvb->lock);
dvb->nfeeds--;
if (0 == dvb->nfeeds)
err = stop_streaming(dvb);
mutex_unlock(&dvb->lock);
return err;
}
/* ------------------------------------------------------------------ */
static int cx231xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
{
struct cx231xx *dev = fe->dvb->priv;
if (acquire)
return cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);
else
return cx231xx_set_mode(dev, CX231XX_SUSPEND);
}
/* ------------------------------------------------------------------ */
static struct xc5000_config cnxt_rde250_tunerconfig = {
.i2c_address = 0x61,
.if_khz = 4000,
};
static struct xc5000_config cnxt_rdu250_tunerconfig = {
.i2c_address = 0x61,
.if_khz = 3250,
};
/* ------------------------------------------------------------------ */
#if 0
static int attach_xc5000(u8 addr, struct cx231xx *dev)
{
struct dvb_frontend *fe;
struct xc5000_config cfg;
memset(&cfg, 0, sizeof(cfg));
cfg.i2c_adap = cx231xx_get_i2c_adap(dev, dev->board.tuner_i2c_master);
cfg.i2c_addr = addr;
if (!dev->dvb->frontend[0]) {
dev_err(dev->dev, "%s/2: dvb frontend not attached. Can't attach xc5000\n",
dev->name);
return -EINVAL;
}
fe = dvb_attach(xc5000_attach, dev->dvb->frontend[0], &cfg);
if (!fe) {
dev_err(dev->dev, "%s/2: xc5000 attach failed\n", dev->name);
dvb_frontend_detach(dev->dvb->frontend[0]);
dev->dvb->frontend[0] = NULL;
return -EINVAL;
}
dev_info(dev->dev, "%s/2: xc5000 attached\n", dev->name);
return 0;
}
#endif
int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq)
{
if (dev->dvb && dev->dvb->frontend[0]) {
struct dvb_tuner_ops *dops = &dev->dvb->frontend[0]->ops.tuner_ops;
if (dops->set_analog_params != NULL) {
struct analog_parameters params;
params.frequency = freq;
params.std = dev->norm;
params.mode = 0; /* 0- Air; 1 - cable */
/*params.audmode = ; */
/* Set the analog parameters to set the frequency */
dops->set_analog_params(dev->dvb->frontend[0], ¶ms);
}
}
return 0;
}
int cx231xx_reset_analog_tuner(struct cx231xx *dev)
{
int status = 0;
if (dev->dvb && dev->dvb->frontend[0]) {
struct dvb_tuner_ops *dops = &dev->dvb->frontend[0]->ops.tuner_ops;
if (dops->init != NULL && !dev->xc_fw_load_done) {
dev_dbg(dev->dev,
"Reloading firmware for XC5000\n");
status = dops->init(dev->dvb->frontend[0]);
if (status == 0) {
dev->xc_fw_load_done = 1;
dev_dbg(dev->dev,
"XC5000 firmware download completed\n");
} else {
dev->xc_fw_load_done = 0;
dev_dbg(dev->dev,
"XC5000 firmware download failed !!!\n");
}
}
}
return status;
}
/* ------------------------------------------------------------------ */
static int register_dvb(struct cx231xx_dvb *dvb,
struct module *module,
struct cx231xx *dev, struct device *device)
{
int result;
mutex_init(&dvb->lock);
/* register adapter */
result = dvb_register_adapter(&dvb->adapter, dev->name, module, device,
adapter_nr);
if (result < 0) {
dev_warn(dev->dev,
"%s: dvb_register_adapter failed (errno = %d)\n",
dev->name, result);
goto fail_adapter;
}
dvb_register_media_controller(&dvb->adapter, dev->media_dev);
/* Ensure all frontends negotiate bus access */
dvb->frontend[0]->ops.ts_bus_ctrl = cx231xx_dvb_bus_ctrl;
if (dvb->frontend[1])
dvb->frontend[1]->ops.ts_bus_ctrl = cx231xx_dvb_bus_ctrl;
dvb->adapter.priv = dev;
/* register frontend */
result = dvb_register_frontend(&dvb->adapter, dvb->frontend[0]);
if (result < 0) {
dev_warn(dev->dev,
"%s: dvb_register_frontend failed (errno = %d)\n",
dev->name, result);
goto fail_frontend0;
}
if (dvb->frontend[1]) {
result = dvb_register_frontend(&dvb->adapter, dvb->frontend[1]);
if (result < 0) {
dev_warn(dev->dev,
"%s: 2nd dvb_register_frontend failed (errno = %d)\n",
dev->name, result);
goto fail_frontend1;
}
/* MFE lock */
dvb->adapter.mfe_shared = 1;
}
/* register demux stuff */
dvb->demux.dmx.capabilities =
DMX_TS_FILTERING | DMX_SECTION_FILTERING |
DMX_MEMORY_BASED_FILTERING;
dvb->demux.priv = dvb;
dvb->demux.filternum = 256;
dvb->demux.feednum = 256;
dvb->demux.start_feed = start_feed;
dvb->demux.stop_feed = stop_feed;
result = dvb_dmx_init(&dvb->demux);
if (result < 0) {
dev_warn(dev->dev,
"%s: dvb_dmx_init failed (errno = %d)\n",
dev->name, result);
goto fail_dmx;
}
dvb->dmxdev.filternum = 256;
dvb->dmxdev.demux = &dvb->demux.dmx;
dvb->dmxdev.capabilities = 0;
result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
if (result < 0) {
dev_warn(dev->dev,
"%s: dvb_dmxdev_init failed (errno = %d)\n",
dev->name, result);
goto fail_dmxdev;
}
dvb->fe_hw.source = DMX_FRONTEND_0;
result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
if (result < 0) {
dev_warn(dev->dev,
"%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
dev->name, result);
goto fail_fe_hw;
}
dvb->fe_mem.source = DMX_MEMORY_FE;
result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
if (result < 0) {
dev_warn(dev->dev,
"%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
dev->name, result);
goto fail_fe_mem;
}
result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
if (result < 0) {
dev_warn(dev->dev,
"%s: connect_frontend failed (errno = %d)\n",
dev->name, result);
goto fail_fe_conn;
}
/* register network adapter */
dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
result = dvb_create_media_graph(&dvb->adapter,
dev->tuner_type == TUNER_ABSENT);
if (result < 0)
goto fail_create_graph;
return 0;
fail_create_graph:
dvb_net_release(&dvb->net);
fail_fe_conn:
dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
fail_fe_mem:
dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
fail_fe_hw:
dvb_dmxdev_release(&dvb->dmxdev);
fail_dmxdev:
dvb_dmx_release(&dvb->demux);
fail_dmx:
if (dvb->frontend[1])
dvb_unregister_frontend(dvb->frontend[1]);
dvb_unregister_frontend(dvb->frontend[0]);
fail_frontend1:
if (dvb->frontend[1])
dvb_frontend_detach(dvb->frontend[1]);
fail_frontend0:
dvb_frontend_detach(dvb->frontend[0]);
dvb_unregister_adapter(&dvb->adapter);
fail_adapter:
return result;
}
static void unregister_dvb(struct cx231xx_dvb *dvb)
{
dvb_net_release(&dvb->net);
dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
dvb_dmxdev_release(&dvb->dmxdev);
dvb_dmx_release(&dvb->demux);
if (dvb->frontend[1])
dvb_unregister_frontend(dvb->frontend[1]);
dvb_unregister_frontend(dvb->frontend[0]);
if (dvb->frontend[1])
dvb_frontend_detach(dvb->frontend[1]);
dvb_frontend_detach(dvb->frontend[0]);
dvb_unregister_adapter(&dvb->adapter);
/* remove I2C tuner */
dvb_module_release(dvb->i2c_client_tuner);
dvb->i2c_client_tuner = NULL;
/* remove I2C demod(s) */
dvb_module_release(dvb->i2c_client_demod[1]);
dvb->i2c_client_demod[1] = NULL;
dvb_module_release(dvb->i2c_client_demod[0]);
dvb->i2c_client_demod[0] = NULL;
}
static int dvb_init(struct cx231xx *dev)
{
int result;
struct cx231xx_dvb *dvb;
struct i2c_adapter *tuner_i2c;
struct i2c_adapter *demod_i2c;
struct i2c_client *client;
struct i2c_adapter *adapter;
if (!dev->board.has_dvb) {
/* This device does not support the extension */
return 0;
}
dvb = kzalloc(sizeof(struct cx231xx_dvb), GFP_KERNEL);
if (dvb == NULL) {
dev_info(dev->dev,
"cx231xx_dvb: memory allocation failed\n");
return -ENOMEM;
}
dev->dvb = dvb;
dev->cx231xx_set_analog_freq = cx231xx_set_analog_freq;
dev->cx231xx_reset_analog_tuner = cx231xx_reset_analog_tuner;
tuner_i2c = cx231xx_get_i2c_adap(dev, dev->board.tuner_i2c_master);
demod_i2c = cx231xx_get_i2c_adap(dev, dev->board.demod_i2c_master);
mutex_lock(&dev->lock);
cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);
cx231xx_demod_reset(dev);
/* init frontend */
switch (dev->model) {
case CX231XX_BOARD_CNXT_CARRAERA:
case CX231XX_BOARD_CNXT_RDE_250:
dev->dvb->frontend[0] = dvb_attach(s5h1432_attach,
&dvico_s5h1432_config,
demod_i2c);
if (!dev->dvb->frontend[0]) {
dev_err(dev->dev,
"Failed to attach s5h1432 front end\n");
result = -EINVAL;
goto out_free;
}
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
if (!dvb_attach(xc5000_attach, dev->dvb->frontend[0],
tuner_i2c,
&cnxt_rde250_tunerconfig)) {
result = -EINVAL;
goto out_free;
}
break;
case CX231XX_BOARD_CNXT_SHELBY:
case CX231XX_BOARD_CNXT_RDU_250:
dev->dvb->frontend[0] = dvb_attach(s5h1411_attach,
&xc5000_s5h1411_config,
demod_i2c);
if (!dev->dvb->frontend[0]) {
dev_err(dev->dev,
"Failed to attach s5h1411 front end\n");
result = -EINVAL;
goto out_free;
}
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
if (!dvb_attach(xc5000_attach, dev->dvb->frontend[0],
tuner_i2c,
&cnxt_rdu250_tunerconfig)) {
result = -EINVAL;
goto out_free;
}
break;
case CX231XX_BOARD_CNXT_RDE_253S:
dev->dvb->frontend[0] = dvb_attach(s5h1432_attach,
&dvico_s5h1432_config,
demod_i2c);
if (!dev->dvb->frontend[0]) {
dev_err(dev->dev,
"Failed to attach s5h1432 front end\n");
result = -EINVAL;
goto out_free;
}
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
if (!dvb_attach(tda18271_attach, dev->dvb->frontend[0],
dev->board.tuner_addr, tuner_i2c,
&cnxt_rde253s_tunerconfig)) {
result = -EINVAL;
goto out_free;
}
break;
case CX231XX_BOARD_CNXT_RDU_253S:
case CX231XX_BOARD_KWORLD_UB445_USB_HYBRID:
dev->dvb->frontend[0] = dvb_attach(s5h1411_attach,
&tda18271_s5h1411_config,
demod_i2c);
if (!dev->dvb->frontend[0]) {
dev_err(dev->dev,
"Failed to attach s5h1411 front end\n");
result = -EINVAL;
goto out_free;
}
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
if (!dvb_attach(tda18271_attach, dev->dvb->frontend[0],
dev->board.tuner_addr, tuner_i2c,
&cnxt_rde253s_tunerconfig)) {
result = -EINVAL;
goto out_free;
}
break;
case CX231XX_BOARD_HAUPPAUGE_EXETER:
dev_info(dev->dev,
"%s: looking for tuner / demod on i2c bus: %d\n",
__func__, i2c_adapter_id(tuner_i2c));
dev->dvb->frontend[0] = dvb_attach(lgdt3305_attach,
&hcw_lgdt3305_config,
demod_i2c);
if (!dev->dvb->frontend[0]) {
dev_err(dev->dev,
"Failed to attach LG3305 front end\n");
result = -EINVAL;
goto out_free;
}
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
dvb_attach(tda18271_attach, dev->dvb->frontend[0],
dev->board.tuner_addr, tuner_i2c,
&hcw_tda18271_config);
break;
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
{
struct si2165_platform_data si2165_pdata = {};
/* attach demod */
si2165_pdata.fe = &dev->dvb->frontend[0];
si2165_pdata.chip_mode = SI2165_MODE_PLL_XTAL;
si2165_pdata.ref_freq_hz = 16000000;
/* perform probe/init/attach */
client = dvb_module_probe("si2165", NULL, demod_i2c,
dev->board.demod_addr,
&si2165_pdata);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[0] = client;
dev->dvb->frontend[0]->ops.i2c_gate_ctrl = NULL;
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
dvb_attach(tda18271_attach, dev->dvb->frontend[0],
dev->board.tuner_addr, tuner_i2c,
&hcw_tda18271_config);
dev->cx231xx_reset_analog_tuner = NULL;
break;
}
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
{
struct si2165_platform_data si2165_pdata = {};
struct si2157_config si2157_config = {};
/* attach demod */
si2165_pdata.fe = &dev->dvb->frontend[0];
si2165_pdata.chip_mode = SI2165_MODE_PLL_EXT;
si2165_pdata.ref_freq_hz = 24000000;
/* perform probe/init/attach */
client = dvb_module_probe("si2165", NULL, demod_i2c,
dev->board.demod_addr,
&si2165_pdata);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[0] = client;
dev->dvb->frontend[0]->ops.i2c_gate_ctrl = NULL;
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
/* attach tuner */
si2157_config.fe = dev->dvb->frontend[0];
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
si2157_config.mdev = dev->media_dev;
#endif
si2157_config.if_port = 1;
si2157_config.inversion = true;
/* perform probe/init/attach */
client = dvb_module_probe("si2157", NULL, tuner_i2c,
dev->board.tuner_addr,
&si2157_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dev->cx231xx_reset_analog_tuner = NULL;
dev->dvb->i2c_client_tuner = client;
break;
}
case CX231XX_BOARD_HAUPPAUGE_955Q:
{
struct si2157_config si2157_config = {};
struct lgdt3306a_config lgdt3306a_config = {};
lgdt3306a_config = hauppauge_955q_lgdt3306a_config;
lgdt3306a_config.fe = &dev->dvb->frontend[0];
lgdt3306a_config.i2c_adapter = &adapter;
/* perform probe/init/attach */
client = dvb_module_probe("lgdt3306a", NULL, demod_i2c,
dev->board.demod_addr,
&lgdt3306a_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[0] = client;
dev->dvb->frontend[0]->ops.i2c_gate_ctrl = NULL;
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
/* attach tuner */
si2157_config.fe = dev->dvb->frontend[0];
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
si2157_config.mdev = dev->media_dev;
#endif
si2157_config.if_port = 1;
si2157_config.inversion = true;
/* perform probe/init/attach */
client = dvb_module_probe("si2157", NULL, tuner_i2c,
dev->board.tuner_addr,
&si2157_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dev->cx231xx_reset_analog_tuner = NULL;
dev->dvb->i2c_client_tuner = client;
break;
}
case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
case CX231XX_BOARD_KWORLD_UB430_USB_HYBRID:
dev_info(dev->dev,
"%s: looking for demod on i2c bus: %d\n",
__func__, i2c_adapter_id(tuner_i2c));
dev->dvb->frontend[0] = dvb_attach(mb86a20s_attach,
&pv_mb86a20s_config,
demod_i2c);
if (!dev->dvb->frontend[0]) {
dev_err(dev->dev,
"Failed to attach mb86a20s demod\n");
result = -EINVAL;
goto out_free;
}
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
dvb_attach(tda18271_attach, dev->dvb->frontend[0],
dev->board.tuner_addr, tuner_i2c,
&pv_tda18271_config);
break;
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
{
struct si2157_config si2157_config = {};
struct si2168_config si2168_config = {};
/* attach demodulator chip */
si2168_config.ts_mode = SI2168_TS_SERIAL; /* from *.inf file */
si2168_config.fe = &dev->dvb->frontend[0];
si2168_config.i2c_adapter = &adapter;
si2168_config.ts_clock_inv = true;
/* perform probe/init/attach */
client = dvb_module_probe("si2168", NULL, demod_i2c,
dev->board.demod_addr,
&si2168_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[0] = client;
/* attach tuner chip */
si2157_config.fe = dev->dvb->frontend[0];
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
si2157_config.mdev = dev->media_dev;
#endif
si2157_config.if_port = 1;
si2157_config.inversion = false;
/* perform probe/init/attach */
client = dvb_module_probe("si2157", NULL, tuner_i2c,
dev->board.tuner_addr,
&si2157_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dev->cx231xx_reset_analog_tuner = NULL;
dev->dvb->i2c_client_tuner = client;
break;
}
case CX231XX_BOARD_ASTROMETA_T2HYBRID:
{
struct mn88473_config mn88473_config = {};
/* attach demodulator chip */
mn88473_config.i2c_wr_max = 16;
mn88473_config.xtal = 25000000;
mn88473_config.fe = &dev->dvb->frontend[0];
/* perform probe/init/attach */
client = dvb_module_probe("mn88473", NULL, demod_i2c,
dev->board.demod_addr,
&mn88473_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[0] = client;
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
/* attach tuner chip */
dvb_attach(r820t_attach, dev->dvb->frontend[0],
tuner_i2c,
&astrometa_t2hybrid_r820t_config);
break;
}
case CX231XX_BOARD_HAUPPAUGE_935C:
{
struct si2157_config si2157_config = {};
struct si2168_config si2168_config = {};
/* attach demodulator chip */
si2168_config.ts_mode = SI2168_TS_SERIAL;
si2168_config.fe = &dev->dvb->frontend[0];
si2168_config.i2c_adapter = &adapter;
si2168_config.ts_clock_inv = true;
/* perform probe/init/attach */
client = dvb_module_probe("si2168", NULL, demod_i2c,
dev->board.demod_addr,
&si2168_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[0] = client;
dev->dvb->frontend[0]->ops.i2c_gate_ctrl = NULL;
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
/* attach tuner */
si2157_config.fe = dev->dvb->frontend[0];
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
si2157_config.mdev = dev->media_dev;
#endif
si2157_config.if_port = 1;
si2157_config.inversion = true;
/* perform probe/init/attach */
client = dvb_module_probe("si2157", NULL, tuner_i2c,
dev->board.tuner_addr,
&si2157_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dev->cx231xx_reset_analog_tuner = NULL;
dev->dvb->i2c_client_tuner = client;
break;
}
case CX231XX_BOARD_HAUPPAUGE_975:
{
struct i2c_adapter *adapter2;
struct si2157_config si2157_config = {};
struct lgdt3306a_config lgdt3306a_config = {};
struct si2168_config si2168_config = {};
/* attach first demodulator chip */
lgdt3306a_config = hauppauge_955q_lgdt3306a_config;
lgdt3306a_config.fe = &dev->dvb->frontend[0];
lgdt3306a_config.i2c_adapter = &adapter;
/* perform probe/init/attach */
client = dvb_module_probe("lgdt3306a", NULL, demod_i2c,
dev->board.demod_addr,
&lgdt3306a_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[0] = client;
/* attach second demodulator chip */
si2168_config.ts_mode = SI2168_TS_SERIAL;
si2168_config.fe = &dev->dvb->frontend[1];
si2168_config.i2c_adapter = &adapter2;
si2168_config.ts_clock_inv = true;
/* perform probe/init/attach */
client = dvb_module_probe("si2168", NULL, adapter,
dev->board.demod_addr2,
&si2168_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dvb->i2c_client_demod[1] = client;
dvb->frontend[1]->id = 1;
/* define general-purpose callback pointer */
dvb->frontend[0]->callback = cx231xx_tuner_callback;
dvb->frontend[1]->callback = cx231xx_tuner_callback;
/* attach tuner */
si2157_config.fe = dev->dvb->frontend[0];
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
si2157_config.mdev = dev->media_dev;
#endif
si2157_config.if_port = 1;
si2157_config.inversion = true;
/* perform probe/init/attach */
client = dvb_module_probe("si2157", NULL, adapter,
dev->board.tuner_addr,
&si2157_config);
if (!client) {
result = -ENODEV;
goto out_free;
}
dev->cx231xx_reset_analog_tuner = NULL;
dvb->i2c_client_tuner = client;
dvb->frontend[1]->tuner_priv = dvb->frontend[0]->tuner_priv;
memcpy(&dvb->frontend[1]->ops.tuner_ops,
&dvb->frontend[0]->ops.tuner_ops,
sizeof(struct dvb_tuner_ops));
break;
}
default:
dev_err(dev->dev,
"%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
dev->name);
break;
}
if (!dvb->frontend[0]) {
dev_err(dev->dev,
"%s/2: frontend initialization failed\n", dev->name);
result = -EINVAL;
goto out_free;
}
/* register everything */
result = register_dvb(dvb, THIS_MODULE, dev, dev->dev);
if (result < 0)
goto out_free;
dev_info(dev->dev, "Successfully loaded cx231xx-dvb\n");
ret:
cx231xx_set_mode(dev, CX231XX_SUSPEND);
mutex_unlock(&dev->lock);
return result;
out_free:
/* remove I2C tuner */
dvb_module_release(dvb->i2c_client_tuner);
dvb->i2c_client_tuner = NULL;
/* remove I2C demod(s) */
dvb_module_release(dvb->i2c_client_demod[1]);
dvb->i2c_client_demod[1] = NULL;
dvb_module_release(dvb->i2c_client_demod[0]);
dvb->i2c_client_demod[0] = NULL;
kfree(dvb);
dev->dvb = NULL;
goto ret;
}
static int dvb_fini(struct cx231xx *dev)
{
if (!dev->board.has_dvb) {
/* This device does not support the extension */
return 0;
}
if (dev->dvb) {
unregister_dvb(dev->dvb);
kfree(dev->dvb);
dev->dvb = NULL;
}
return 0;
}
static struct cx231xx_ops dvb_ops = {
.id = CX231XX_DVB,
.name = "Cx231xx dvb Extension",
.init = dvb_init,
.fini = dvb_fini,
};
static int __init cx231xx_dvb_register(void)
{
return cx231xx_register_extension(&dvb_ops);
}
static void __exit cx231xx_dvb_unregister(void)
{
cx231xx_unregister_extension(&dvb_ops);
}
module_init(cx231xx_dvb_register);
module_exit(cx231xx_dvb_unregister);
| linux-master | drivers/media/usb/cx231xx/cx231xx-dvb.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Conexant Cx231xx audio extension
*
* Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
* Based on em28xx driver
*/
#include "cx231xx.h"
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sound.h>
#include <linux/spinlock.h>
#include <linux/soundcard.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/info.h>
#include <sound/initval.h>
#include <sound/control.h>
#include <media/v4l2-common.h>
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "activates debug info");
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static int cx231xx_isoc_audio_deinit(struct cx231xx *dev)
{
int i;
dev_dbg(dev->dev, "Stopping isoc\n");
for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
if (dev->adev.urb[i]) {
if (!irqs_disabled())
usb_kill_urb(dev->adev.urb[i]);
else
usb_unlink_urb(dev->adev.urb[i]);
usb_free_urb(dev->adev.urb[i]);
dev->adev.urb[i] = NULL;
kfree(dev->adev.transfer_buffer[i]);
dev->adev.transfer_buffer[i] = NULL;
}
}
return 0;
}
static int cx231xx_bulk_audio_deinit(struct cx231xx *dev)
{
int i;
dev_dbg(dev->dev, "Stopping bulk\n");
for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
if (dev->adev.urb[i]) {
if (!irqs_disabled())
usb_kill_urb(dev->adev.urb[i]);
else
usb_unlink_urb(dev->adev.urb[i]);
usb_free_urb(dev->adev.urb[i]);
dev->adev.urb[i] = NULL;
kfree(dev->adev.transfer_buffer[i]);
dev->adev.transfer_buffer[i] = NULL;
}
}
return 0;
}
static void cx231xx_audio_isocirq(struct urb *urb)
{
struct cx231xx *dev = urb->context;
int i;
unsigned int oldptr;
int period_elapsed = 0;
int status;
unsigned char *cp;
unsigned int stride;
struct snd_pcm_substream *substream;
struct snd_pcm_runtime *runtime;
if (dev->state & DEV_DISCONNECTED)
return;
switch (urb->status) {
case 0: /* success */
case -ETIMEDOUT: /* NAK */
break;
case -ECONNRESET: /* kill */
case -ENOENT:
case -ESHUTDOWN:
return;
default: /* error */
dev_dbg(dev->dev, "urb completion error %d.\n",
urb->status);
break;
}
if (atomic_read(&dev->stream_started) == 0)
return;
if (dev->adev.capture_pcm_substream) {
substream = dev->adev.capture_pcm_substream;
runtime = substream->runtime;
stride = runtime->frame_bits >> 3;
for (i = 0; i < urb->number_of_packets; i++) {
unsigned long flags;
int length = urb->iso_frame_desc[i].actual_length /
stride;
cp = (unsigned char *)urb->transfer_buffer +
urb->iso_frame_desc[i].offset;
if (!length)
continue;
oldptr = dev->adev.hwptr_done_capture;
if (oldptr + length >= runtime->buffer_size) {
unsigned int cnt;
cnt = runtime->buffer_size - oldptr;
memcpy(runtime->dma_area + oldptr * stride, cp,
cnt * stride);
memcpy(runtime->dma_area, cp + cnt * stride,
length * stride - cnt * stride);
} else {
memcpy(runtime->dma_area + oldptr * stride, cp,
length * stride);
}
snd_pcm_stream_lock_irqsave(substream, flags);
dev->adev.hwptr_done_capture += length;
if (dev->adev.hwptr_done_capture >=
runtime->buffer_size)
dev->adev.hwptr_done_capture -=
runtime->buffer_size;
dev->adev.capture_transfer_done += length;
if (dev->adev.capture_transfer_done >=
runtime->period_size) {
dev->adev.capture_transfer_done -=
runtime->period_size;
period_elapsed = 1;
}
snd_pcm_stream_unlock_irqrestore(substream, flags);
}
if (period_elapsed)
snd_pcm_period_elapsed(substream);
}
urb->status = 0;
status = usb_submit_urb(urb, GFP_ATOMIC);
if (status < 0) {
dev_err(dev->dev,
"resubmit of audio urb failed (error=%i)\n",
status);
}
return;
}
static void cx231xx_audio_bulkirq(struct urb *urb)
{
struct cx231xx *dev = urb->context;
unsigned int oldptr;
int period_elapsed = 0;
int status;
unsigned char *cp;
unsigned int stride;
struct snd_pcm_substream *substream;
struct snd_pcm_runtime *runtime;
if (dev->state & DEV_DISCONNECTED)
return;
switch (urb->status) {
case 0: /* success */
case -ETIMEDOUT: /* NAK */
break;
case -ECONNRESET: /* kill */
case -ENOENT:
case -ESHUTDOWN:
return;
default: /* error */
dev_dbg(dev->dev, "urb completion error %d.\n",
urb->status);
break;
}
if (atomic_read(&dev->stream_started) == 0)
return;
if (dev->adev.capture_pcm_substream) {
substream = dev->adev.capture_pcm_substream;
runtime = substream->runtime;
stride = runtime->frame_bits >> 3;
if (1) {
unsigned long flags;
int length = urb->actual_length /
stride;
cp = (unsigned char *)urb->transfer_buffer;
oldptr = dev->adev.hwptr_done_capture;
if (oldptr + length >= runtime->buffer_size) {
unsigned int cnt;
cnt = runtime->buffer_size - oldptr;
memcpy(runtime->dma_area + oldptr * stride, cp,
cnt * stride);
memcpy(runtime->dma_area, cp + cnt * stride,
length * stride - cnt * stride);
} else {
memcpy(runtime->dma_area + oldptr * stride, cp,
length * stride);
}
snd_pcm_stream_lock_irqsave(substream, flags);
dev->adev.hwptr_done_capture += length;
if (dev->adev.hwptr_done_capture >=
runtime->buffer_size)
dev->adev.hwptr_done_capture -=
runtime->buffer_size;
dev->adev.capture_transfer_done += length;
if (dev->adev.capture_transfer_done >=
runtime->period_size) {
dev->adev.capture_transfer_done -=
runtime->period_size;
period_elapsed = 1;
}
snd_pcm_stream_unlock_irqrestore(substream, flags);
}
if (period_elapsed)
snd_pcm_period_elapsed(substream);
}
urb->status = 0;
status = usb_submit_urb(urb, GFP_ATOMIC);
if (status < 0) {
dev_err(dev->dev,
"resubmit of audio urb failed (error=%i)\n",
status);
}
return;
}
static int cx231xx_init_audio_isoc(struct cx231xx *dev)
{
int i, errCode;
int sb_size;
dev_dbg(dev->dev,
"%s: Starting ISO AUDIO transfers\n", __func__);
if (dev->state & DEV_DISCONNECTED)
return -ENODEV;
sb_size = CX231XX_ISO_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size;
for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
struct urb *urb;
int j, k;
dev->adev.transfer_buffer[i] = kmalloc(sb_size, GFP_ATOMIC);
if (!dev->adev.transfer_buffer[i])
return -ENOMEM;
memset(dev->adev.transfer_buffer[i], 0x80, sb_size);
urb = usb_alloc_urb(CX231XX_ISO_NUM_AUDIO_PACKETS, GFP_ATOMIC);
if (!urb) {
for (j = 0; j < i; j++) {
usb_free_urb(dev->adev.urb[j]);
kfree(dev->adev.transfer_buffer[j]);
}
return -ENOMEM;
}
urb->dev = dev->udev;
urb->context = dev;
urb->pipe = usb_rcvisocpipe(dev->udev,
dev->adev.end_point_addr);
urb->transfer_flags = URB_ISO_ASAP;
urb->transfer_buffer = dev->adev.transfer_buffer[i];
urb->interval = 1;
urb->complete = cx231xx_audio_isocirq;
urb->number_of_packets = CX231XX_ISO_NUM_AUDIO_PACKETS;
urb->transfer_buffer_length = sb_size;
for (j = k = 0; j < CX231XX_ISO_NUM_AUDIO_PACKETS;
j++, k += dev->adev.max_pkt_size) {
urb->iso_frame_desc[j].offset = k;
urb->iso_frame_desc[j].length = dev->adev.max_pkt_size;
}
dev->adev.urb[i] = urb;
}
for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC);
if (errCode < 0) {
cx231xx_isoc_audio_deinit(dev);
return errCode;
}
}
return errCode;
}
static int cx231xx_init_audio_bulk(struct cx231xx *dev)
{
int i, errCode;
int sb_size;
dev_dbg(dev->dev,
"%s: Starting BULK AUDIO transfers\n", __func__);
if (dev->state & DEV_DISCONNECTED)
return -ENODEV;
sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size;
for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
struct urb *urb;
int j;
dev->adev.transfer_buffer[i] = kmalloc(sb_size, GFP_ATOMIC);
if (!dev->adev.transfer_buffer[i])
return -ENOMEM;
memset(dev->adev.transfer_buffer[i], 0x80, sb_size);
urb = usb_alloc_urb(CX231XX_NUM_AUDIO_PACKETS, GFP_ATOMIC);
if (!urb) {
for (j = 0; j < i; j++) {
usb_free_urb(dev->adev.urb[j]);
kfree(dev->adev.transfer_buffer[j]);
}
return -ENOMEM;
}
urb->dev = dev->udev;
urb->context = dev;
urb->pipe = usb_rcvbulkpipe(dev->udev,
dev->adev.end_point_addr);
urb->transfer_flags = 0;
urb->transfer_buffer = dev->adev.transfer_buffer[i];
urb->complete = cx231xx_audio_bulkirq;
urb->transfer_buffer_length = sb_size;
dev->adev.urb[i] = urb;
}
for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC);
if (errCode < 0) {
cx231xx_bulk_audio_deinit(dev);
return errCode;
}
}
return errCode;
}
static const struct snd_pcm_hardware snd_cx231xx_hw_capture = {
.info = SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_MMAP_VALID,
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_KNOT,
.rate_min = 48000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = 62720 * 8, /* just about the value in usbaudio.c */
.period_bytes_min = 64, /* 12544/2, */
.period_bytes_max = 12544,
.periods_min = 2,
.periods_max = 98, /* 12544, */
};
static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
{
struct cx231xx *dev = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int ret = 0;
dev_dbg(dev->dev,
"opening device and trying to acquire exclusive lock\n");
if (dev->state & DEV_DISCONNECTED) {
dev_err(dev->dev,
"Can't open. the device was removed.\n");
return -ENODEV;
}
/* set alternate setting for audio interface */
/* 1 - 48000 samples per sec */
mutex_lock(&dev->lock);
if (dev->USE_ISO)
ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 1);
else
ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0);
mutex_unlock(&dev->lock);
if (ret < 0) {
dev_err(dev->dev,
"failed to set alternate setting !\n");
return ret;
}
runtime->hw = snd_cx231xx_hw_capture;
mutex_lock(&dev->lock);
/* inform hardware to start streaming */
ret = cx231xx_capture_start(dev, 1, Audio);
dev->adev.users++;
mutex_unlock(&dev->lock);
snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
dev->adev.capture_pcm_substream = substream;
runtime->private_data = dev;
return 0;
}
static int snd_cx231xx_pcm_close(struct snd_pcm_substream *substream)
{
int ret;
struct cx231xx *dev = snd_pcm_substream_chip(substream);
dev_dbg(dev->dev, "closing device\n");
/* inform hardware to stop streaming */
mutex_lock(&dev->lock);
ret = cx231xx_capture_start(dev, 0, Audio);
/* set alternate setting for audio interface */
/* 1 - 48000 samples per sec */
ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0);
if (ret < 0) {
dev_err(dev->dev,
"failed to set alternate setting !\n");
mutex_unlock(&dev->lock);
return ret;
}
dev->adev.users--;
mutex_unlock(&dev->lock);
if (dev->adev.users == 0 && dev->adev.shutdown == 1) {
dev_dbg(dev->dev, "audio users: %d\n", dev->adev.users);
dev_dbg(dev->dev, "disabling audio stream!\n");
dev->adev.shutdown = 0;
dev_dbg(dev->dev, "released lock\n");
if (atomic_read(&dev->stream_started) > 0) {
atomic_set(&dev->stream_started, 0);
schedule_work(&dev->wq_trigger);
}
}
return 0;
}
static int snd_cx231xx_prepare(struct snd_pcm_substream *substream)
{
struct cx231xx *dev = snd_pcm_substream_chip(substream);
dev->adev.hwptr_done_capture = 0;
dev->adev.capture_transfer_done = 0;
return 0;
}
static void audio_trigger(struct work_struct *work)
{
struct cx231xx *dev = container_of(work, struct cx231xx, wq_trigger);
if (atomic_read(&dev->stream_started)) {
dev_dbg(dev->dev, "starting capture");
if (is_fw_load(dev) == 0)
cx25840_call(dev, core, load_fw);
if (dev->USE_ISO)
cx231xx_init_audio_isoc(dev);
else
cx231xx_init_audio_bulk(dev);
} else {
dev_dbg(dev->dev, "stopping capture");
cx231xx_isoc_audio_deinit(dev);
}
}
static int snd_cx231xx_capture_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct cx231xx *dev = snd_pcm_substream_chip(substream);
int retval = 0;
if (dev->state & DEV_DISCONNECTED)
return -ENODEV;
spin_lock(&dev->adev.slock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
atomic_set(&dev->stream_started, 1);
break;
case SNDRV_PCM_TRIGGER_STOP:
atomic_set(&dev->stream_started, 0);
break;
default:
retval = -EINVAL;
break;
}
spin_unlock(&dev->adev.slock);
schedule_work(&dev->wq_trigger);
return retval;
}
static snd_pcm_uframes_t snd_cx231xx_capture_pointer(struct snd_pcm_substream
*substream)
{
struct cx231xx *dev;
unsigned long flags;
snd_pcm_uframes_t hwptr_done;
dev = snd_pcm_substream_chip(substream);
spin_lock_irqsave(&dev->adev.slock, flags);
hwptr_done = dev->adev.hwptr_done_capture;
spin_unlock_irqrestore(&dev->adev.slock, flags);
return hwptr_done;
}
static const struct snd_pcm_ops snd_cx231xx_pcm_capture = {
.open = snd_cx231xx_capture_open,
.close = snd_cx231xx_pcm_close,
.prepare = snd_cx231xx_prepare,
.trigger = snd_cx231xx_capture_trigger,
.pointer = snd_cx231xx_capture_pointer,
};
static int cx231xx_audio_init(struct cx231xx *dev)
{
struct cx231xx_audio *adev = &dev->adev;
struct snd_pcm *pcm;
struct snd_card *card;
static int devnr;
int err;
struct usb_interface *uif;
int i, isoc_pipe = 0;
if (dev->has_alsa_audio != 1) {
/* This device does not support the extension (in this case
the device is expecting the snd-usb-audio module or
doesn't have analog audio support at all) */
return 0;
}
dev_dbg(dev->dev,
"probing for cx231xx non standard usbaudio\n");
err = snd_card_new(dev->dev, index[devnr], "Cx231xx Audio",
THIS_MODULE, 0, &card);
if (err < 0)
return err;
spin_lock_init(&adev->slock);
err = snd_pcm_new(card, "Cx231xx Audio", 0, 0, 1, &pcm);
if (err < 0)
goto err_free_card;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
&snd_cx231xx_pcm_capture);
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC, NULL, 0, 0);
pcm->info_flags = 0;
pcm->private_data = dev;
strscpy(pcm->name, "Conexant cx231xx Capture", sizeof(pcm->name));
strscpy(card->driver, "Cx231xx-Audio", sizeof(card->driver));
strscpy(card->shortname, "Cx231xx Audio", sizeof(card->shortname));
strscpy(card->longname, "Conexant cx231xx Audio", sizeof(card->longname));
INIT_WORK(&dev->wq_trigger, audio_trigger);
err = snd_card_register(card);
if (err < 0)
goto err_free_card;
adev->sndcard = card;
adev->udev = dev->udev;
/* compute alternate max packet sizes for Audio */
uif =
dev->udev->actconfig->interface[dev->current_pcb_config.
hs_config_info[0].interface_info.
audio_index + 1];
if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1) {
err = -ENODEV;
goto err_free_card;
}
adev->end_point_addr =
uif->altsetting[0].endpoint[isoc_pipe].desc.
bEndpointAddress;
adev->num_alt = uif->num_altsetting;
dev_info(dev->dev,
"audio EndPoint Addr 0x%x, Alternate settings: %i\n",
adev->end_point_addr, adev->num_alt);
adev->alt_max_pkt_size = kmalloc_array(32, adev->num_alt, GFP_KERNEL);
if (!adev->alt_max_pkt_size) {
err = -ENOMEM;
goto err_free_card;
}
for (i = 0; i < adev->num_alt; i++) {
u16 tmp;
if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1) {
err = -ENODEV;
goto err_free_pkt_size;
}
tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc.
wMaxPacketSize);
adev->alt_max_pkt_size[i] =
(tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
dev_dbg(dev->dev,
"audio alternate setting %i, max size= %i\n", i,
adev->alt_max_pkt_size[i]);
}
return 0;
err_free_pkt_size:
kfree(adev->alt_max_pkt_size);
err_free_card:
snd_card_free(card);
return err;
}
static int cx231xx_audio_fini(struct cx231xx *dev)
{
if (dev == NULL)
return 0;
if (dev->has_alsa_audio != 1) {
/* This device does not support the extension (in this case
the device is expecting the snd-usb-audio module or
doesn't have analog audio support at all) */
return 0;
}
if (dev->adev.sndcard) {
snd_card_free_when_closed(dev->adev.sndcard);
kfree(dev->adev.alt_max_pkt_size);
dev->adev.sndcard = NULL;
}
return 0;
}
static struct cx231xx_ops audio_ops = {
.id = CX231XX_AUDIO,
.name = "Cx231xx Audio Extension",
.init = cx231xx_audio_init,
.fini = cx231xx_audio_fini,
};
static int __init cx231xx_alsa_register(void)
{
return cx231xx_register_extension(&audio_ops);
}
static void __exit cx231xx_alsa_unregister(void)
{
cx231xx_unregister_extension(&audio_ops);
}
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Srinivasa Deevi <[email protected]>");
MODULE_DESCRIPTION("Cx231xx Audio driver");
module_init(cx231xx_alsa_register);
module_exit(cx231xx_alsa_unregister);
| linux-master | drivers/media/usb/cx231xx/cx231xx-audio.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
*
* Support for a cx23417 mpeg encoder via cx231xx host port.
*
* (c) 2004 Jelle Foks <[email protected]>
* (c) 2004 Gerd Knorr <[email protected]>
* (c) 2008 Steven Toth <[email protected]>
* - CX23885/7/8 support
*
* Includes parts from the ivtv driver( http://ivtv.sourceforge.net/),
*/
#include "cx231xx.h"
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-event.h>
#include <media/drv-intf/cx2341x.h>
#include <media/tuner.h>
#define CX231xx_FIRM_IMAGE_SIZE 376836
#define CX231xx_FIRM_IMAGE_NAME "v4l-cx23885-enc.fw"
/* for polaris ITVC */
#define ITVC_WRITE_DIR 0x03FDFC00
#define ITVC_READ_DIR 0x0001FC00
#define MCI_MEMORY_DATA_BYTE0 0x00
#define MCI_MEMORY_DATA_BYTE1 0x08
#define MCI_MEMORY_DATA_BYTE2 0x10
#define MCI_MEMORY_DATA_BYTE3 0x18
#define MCI_MEMORY_ADDRESS_BYTE2 0x20
#define MCI_MEMORY_ADDRESS_BYTE1 0x28
#define MCI_MEMORY_ADDRESS_BYTE0 0x30
#define MCI_REGISTER_DATA_BYTE0 0x40
#define MCI_REGISTER_DATA_BYTE1 0x48
#define MCI_REGISTER_DATA_BYTE2 0x50
#define MCI_REGISTER_DATA_BYTE3 0x58
#define MCI_REGISTER_ADDRESS_BYTE0 0x60
#define MCI_REGISTER_ADDRESS_BYTE1 0x68
#define MCI_REGISTER_MODE 0x70
/* Read and write modes for polaris ITVC */
#define MCI_MODE_REGISTER_READ 0x000
#define MCI_MODE_REGISTER_WRITE 0x100
#define MCI_MODE_MEMORY_READ 0x000
#define MCI_MODE_MEMORY_WRITE 0x4000
static unsigned int mpeglines = 128;
module_param(mpeglines, int, 0644);
MODULE_PARM_DESC(mpeglines, "number of lines in an MPEG buffer, range 2-32");
static unsigned int mpeglinesize = 512;
module_param(mpeglinesize, int, 0644);
MODULE_PARM_DESC(mpeglinesize,
"number of bytes in each line of an MPEG buffer, range 512-1024");
static unsigned int v4l_debug = 1;
module_param(v4l_debug, int, 0644);
MODULE_PARM_DESC(v4l_debug, "enable V4L debug messages");
#define dprintk(level, fmt, arg...) \
do { \
if (v4l_debug >= level) \
printk(KERN_DEBUG pr_fmt(fmt), ## arg); \
} while (0)
static struct cx231xx_tvnorm cx231xx_tvnorms[] = {
{
.name = "NTSC-M",
.id = V4L2_STD_NTSC_M,
}, {
.name = "NTSC-JP",
.id = V4L2_STD_NTSC_M_JP,
}, {
.name = "PAL-BG",
.id = V4L2_STD_PAL_BG,
}, {
.name = "PAL-DK",
.id = V4L2_STD_PAL_DK,
}, {
.name = "PAL-I",
.id = V4L2_STD_PAL_I,
}, {
.name = "PAL-M",
.id = V4L2_STD_PAL_M,
}, {
.name = "PAL-N",
.id = V4L2_STD_PAL_N,
}, {
.name = "PAL-Nc",
.id = V4L2_STD_PAL_Nc,
}, {
.name = "PAL-60",
.id = V4L2_STD_PAL_60,
}, {
.name = "SECAM-L",
.id = V4L2_STD_SECAM_L,
}, {
.name = "SECAM-DK",
.id = V4L2_STD_SECAM_DK,
}
};
/* ------------------------------------------------------------------ */
enum cx231xx_capture_type {
CX231xx_MPEG_CAPTURE,
CX231xx_RAW_CAPTURE,
CX231xx_RAW_PASSTHRU_CAPTURE
};
enum cx231xx_capture_bits {
CX231xx_RAW_BITS_NONE = 0x00,
CX231xx_RAW_BITS_YUV_CAPTURE = 0x01,
CX231xx_RAW_BITS_PCM_CAPTURE = 0x02,
CX231xx_RAW_BITS_VBI_CAPTURE = 0x04,
CX231xx_RAW_BITS_PASSTHRU_CAPTURE = 0x08,
CX231xx_RAW_BITS_TO_HOST_CAPTURE = 0x10
};
enum cx231xx_capture_end {
CX231xx_END_AT_GOP, /* stop at the end of gop, generate irq */
CX231xx_END_NOW, /* stop immediately, no irq */
};
enum cx231xx_framerate {
CX231xx_FRAMERATE_NTSC_30, /* NTSC: 30fps */
CX231xx_FRAMERATE_PAL_25 /* PAL: 25fps */
};
enum cx231xx_stream_port {
CX231xx_OUTPUT_PORT_MEMORY,
CX231xx_OUTPUT_PORT_STREAMING,
CX231xx_OUTPUT_PORT_SERIAL
};
enum cx231xx_data_xfer_status {
CX231xx_MORE_BUFFERS_FOLLOW,
CX231xx_LAST_BUFFER,
};
enum cx231xx_picture_mask {
CX231xx_PICTURE_MASK_NONE,
CX231xx_PICTURE_MASK_I_FRAMES,
CX231xx_PICTURE_MASK_I_P_FRAMES = 0x3,
CX231xx_PICTURE_MASK_ALL_FRAMES = 0x7,
};
enum cx231xx_vbi_mode_bits {
CX231xx_VBI_BITS_SLICED,
CX231xx_VBI_BITS_RAW,
};
enum cx231xx_vbi_insertion_bits {
CX231xx_VBI_BITS_INSERT_IN_XTENSION_USR_DATA,
CX231xx_VBI_BITS_INSERT_IN_PRIVATE_PACKETS = 0x1 << 1,
CX231xx_VBI_BITS_SEPARATE_STREAM = 0x2 << 1,
CX231xx_VBI_BITS_SEPARATE_STREAM_USR_DATA = 0x4 << 1,
CX231xx_VBI_BITS_SEPARATE_STREAM_PRV_DATA = 0x5 << 1,
};
enum cx231xx_dma_unit {
CX231xx_DMA_BYTES,
CX231xx_DMA_FRAMES,
};
enum cx231xx_dma_transfer_status_bits {
CX231xx_DMA_TRANSFER_BITS_DONE = 0x01,
CX231xx_DMA_TRANSFER_BITS_ERROR = 0x04,
CX231xx_DMA_TRANSFER_BITS_LL_ERROR = 0x10,
};
enum cx231xx_pause {
CX231xx_PAUSE_ENCODING,
CX231xx_RESUME_ENCODING,
};
enum cx231xx_copyright {
CX231xx_COPYRIGHT_OFF,
CX231xx_COPYRIGHT_ON,
};
enum cx231xx_notification_type {
CX231xx_NOTIFICATION_REFRESH,
};
enum cx231xx_notification_status {
CX231xx_NOTIFICATION_OFF,
CX231xx_NOTIFICATION_ON,
};
enum cx231xx_notification_mailbox {
CX231xx_NOTIFICATION_NO_MAILBOX = -1,
};
enum cx231xx_field1_lines {
CX231xx_FIELD1_SAA7114 = 0x00EF, /* 239 */
CX231xx_FIELD1_SAA7115 = 0x00F0, /* 240 */
CX231xx_FIELD1_MICRONAS = 0x0105, /* 261 */
};
enum cx231xx_field2_lines {
CX231xx_FIELD2_SAA7114 = 0x00EF, /* 239 */
CX231xx_FIELD2_SAA7115 = 0x00F0, /* 240 */
CX231xx_FIELD2_MICRONAS = 0x0106, /* 262 */
};
enum cx231xx_custom_data_type {
CX231xx_CUSTOM_EXTENSION_USR_DATA,
CX231xx_CUSTOM_PRIVATE_PACKET,
};
enum cx231xx_mute {
CX231xx_UNMUTE,
CX231xx_MUTE,
};
enum cx231xx_mute_video_mask {
CX231xx_MUTE_VIDEO_V_MASK = 0x0000FF00,
CX231xx_MUTE_VIDEO_U_MASK = 0x00FF0000,
CX231xx_MUTE_VIDEO_Y_MASK = 0xFF000000,
};
enum cx231xx_mute_video_shift {
CX231xx_MUTE_VIDEO_V_SHIFT = 8,
CX231xx_MUTE_VIDEO_U_SHIFT = 16,
CX231xx_MUTE_VIDEO_Y_SHIFT = 24,
};
/* defines below are from ivtv-driver.h */
#define IVTV_CMD_HW_BLOCKS_RST 0xFFFFFFFF
/* Firmware API commands */
#define IVTV_API_STD_TIMEOUT 500
/* Registers */
/* IVTV_REG_OFFSET */
#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
#define IVTV_REG_SPU (0x9050)
#define IVTV_REG_HW_BLOCKS (0x9054)
#define IVTV_REG_VPU (0x9058)
#define IVTV_REG_APU (0xA064)
/*
* Bit definitions for MC417_RWD and MC417_OEN registers
*
* bits 31-16
*+-----------+
*| Reserved |
*|+-----------+
*| bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
*|+-------+-------+-------+-------+-------+-------+-------+-------+
*|| MIWR# | MIRD# | MICS# |MIRDY# |MIADDR3|MIADDR2|MIADDR1|MIADDR0|
*|+-------+-------+-------+-------+-------+-------+-------+-------+
*| bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
*|+-------+-------+-------+-------+-------+-------+-------+-------+
*||MIDATA7|MIDATA6|MIDATA5|MIDATA4|MIDATA3|MIDATA2|MIDATA1|MIDATA0|
*|+-------+-------+-------+-------+-------+-------+-------+-------+
*/
#define MC417_MIWR 0x8000
#define MC417_MIRD 0x4000
#define MC417_MICS 0x2000
#define MC417_MIRDY 0x1000
#define MC417_MIADDR 0x0F00
#define MC417_MIDATA 0x00FF
/* Bit definitions for MC417_CTL register ****
*bits 31-6 bits 5-4 bit 3 bits 2-1 Bit 0
*+--------+-------------+--------+--------------+------------+
*|Reserved|MC417_SPD_CTL|Reserved|MC417_GPIO_SEL|UART_GPIO_EN|
*+--------+-------------+--------+--------------+------------+
*/
#define MC417_SPD_CTL(x) (((x) << 4) & 0x00000030)
#define MC417_GPIO_SEL(x) (((x) << 1) & 0x00000006)
#define MC417_UART_GPIO_EN 0x00000001
/* Values for speed control */
#define MC417_SPD_CTL_SLOW 0x1
#define MC417_SPD_CTL_MEDIUM 0x0
#define MC417_SPD_CTL_FAST 0x3 /* b'1x, but we use b'11 */
/* Values for GPIO select */
#define MC417_GPIO_SEL_GPIO3 0x3
#define MC417_GPIO_SEL_GPIO2 0x2
#define MC417_GPIO_SEL_GPIO1 0x1
#define MC417_GPIO_SEL_GPIO0 0x0
#define CX23417_GPIO_MASK 0xFC0003FF
static int set_itvc_reg(struct cx231xx *dev, u32 gpio_direction, u32 value)
{
int status = 0;
u32 _gpio_direction = 0;
_gpio_direction = _gpio_direction & CX23417_GPIO_MASK;
_gpio_direction = _gpio_direction | gpio_direction;
status = cx231xx_send_gpio_cmd(dev, _gpio_direction,
(u8 *)&value, 4, 0, 0);
return status;
}
static int get_itvc_reg(struct cx231xx *dev, u32 gpio_direction, u32 *val_ptr)
{
int status = 0;
u32 _gpio_direction = 0;
_gpio_direction = _gpio_direction & CX23417_GPIO_MASK;
_gpio_direction = _gpio_direction | gpio_direction;
status = cx231xx_send_gpio_cmd(dev, _gpio_direction,
(u8 *)val_ptr, 4, 0, 1);
return status;
}
static int wait_for_mci_complete(struct cx231xx *dev)
{
u32 gpio;
u32 gpio_direction = 0;
u8 count = 0;
get_itvc_reg(dev, gpio_direction, &gpio);
while (!(gpio&0x020000)) {
msleep(10);
get_itvc_reg(dev, gpio_direction, &gpio);
if (count++ > 100) {
dprintk(3, "ERROR: Timeout - gpio=%x\n", gpio);
return -EIO;
}
}
return 0;
}
static int mc417_register_write(struct cx231xx *dev, u16 address, u32 value)
{
u32 temp;
int status = 0;
temp = 0x82 | MCI_REGISTER_DATA_BYTE0 | ((value & 0x000000FF) << 8);
temp = temp << 10;
status = set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
if (status < 0)
return status;
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write data byte 1;*/
temp = 0x82 | MCI_REGISTER_DATA_BYTE1 | (value & 0x0000FF00);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write data byte 2;*/
temp = 0x82 | MCI_REGISTER_DATA_BYTE2 | ((value & 0x00FF0000) >> 8);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write data byte 3;*/
temp = 0x82 | MCI_REGISTER_DATA_BYTE3 | ((value & 0xFF000000) >> 16);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write address byte 0;*/
temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE0 | ((address & 0x000000FF) << 8);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write address byte 1;*/
temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE1 | (address & 0x0000FF00);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*Write that the mode is write.*/
temp = 0x82 | MCI_REGISTER_MODE | MCI_MODE_REGISTER_WRITE;
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
return wait_for_mci_complete(dev);
}
static int mc417_register_read(struct cx231xx *dev, u16 address, u32 *value)
{
/*write address byte 0;*/
u32 temp;
u32 return_value = 0;
int ret = 0;
temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE0 | ((address & 0x00FF) << 8);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | ((0x05) << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write address byte 1;*/
temp = 0x82 | MCI_REGISTER_ADDRESS_BYTE1 | (address & 0xFF00);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | ((0x05) << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write that the mode is read;*/
temp = 0x82 | MCI_REGISTER_MODE | MCI_MODE_REGISTER_READ;
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | ((0x05) << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*wait for the MIRDY line to be asserted ,
signalling that the read is done;*/
ret = wait_for_mci_complete(dev);
/*switch the DATA- GPIO to input mode;*/
/*Read data byte 0;*/
temp = (0x82 | MCI_REGISTER_DATA_BYTE0) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_REGISTER_DATA_BYTE0) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) >> 18);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
/* Read data byte 1;*/
temp = (0x82 | MCI_REGISTER_DATA_BYTE1) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_REGISTER_DATA_BYTE1) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) >> 10);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
/*Read data byte 2;*/
temp = (0x82 | MCI_REGISTER_DATA_BYTE2) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_REGISTER_DATA_BYTE2) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) >> 2);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
/*Read data byte 3;*/
temp = (0x82 | MCI_REGISTER_DATA_BYTE3) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_REGISTER_DATA_BYTE3) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) << 6);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
*value = return_value;
return ret;
}
static int mc417_memory_write(struct cx231xx *dev, u32 address, u32 value)
{
/*write data byte 0;*/
u32 temp;
int ret = 0;
temp = 0x82 | MCI_MEMORY_DATA_BYTE0 | ((value & 0x000000FF) << 8);
temp = temp << 10;
ret = set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
if (ret < 0)
return ret;
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write data byte 1;*/
temp = 0x82 | MCI_MEMORY_DATA_BYTE1 | (value & 0x0000FF00);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write data byte 2;*/
temp = 0x82 | MCI_MEMORY_DATA_BYTE2 | ((value & 0x00FF0000) >> 8);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write data byte 3;*/
temp = 0x82 | MCI_MEMORY_DATA_BYTE3 | ((value & 0xFF000000) >> 16);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/* write address byte 2;*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_WRITE |
((address & 0x003F0000) >> 8);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/* write address byte 1;*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/* write address byte 0;*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*wait for MIRDY line;*/
wait_for_mci_complete(dev);
return 0;
}
static int mc417_memory_read(struct cx231xx *dev, u32 address, u32 *value)
{
u32 temp = 0;
u32 return_value = 0;
int ret = 0;
/*write address byte 2;*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_READ |
((address & 0x003F0000) >> 8);
temp = temp << 10;
ret = set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
if (ret < 0)
return ret;
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write address byte 1*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*write address byte 0*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8);
temp = temp << 10;
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
temp = temp | (0x05 << 10);
set_itvc_reg(dev, ITVC_WRITE_DIR, temp);
/*Wait for MIRDY line*/
ret = wait_for_mci_complete(dev);
/*Read data byte 3;*/
temp = (0x82 | MCI_MEMORY_DATA_BYTE3) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_MEMORY_DATA_BYTE3) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) << 6);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
/*Read data byte 2;*/
temp = (0x82 | MCI_MEMORY_DATA_BYTE2) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_MEMORY_DATA_BYTE2) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) >> 2);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
/* Read data byte 1;*/
temp = (0x82 | MCI_MEMORY_DATA_BYTE1) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_MEMORY_DATA_BYTE1) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) >> 10);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
/*Read data byte 0;*/
temp = (0x82 | MCI_MEMORY_DATA_BYTE0) << 10;
set_itvc_reg(dev, ITVC_READ_DIR, temp);
temp = ((0x81 | MCI_MEMORY_DATA_BYTE0) << 10);
set_itvc_reg(dev, ITVC_READ_DIR, temp);
get_itvc_reg(dev, ITVC_READ_DIR, &temp);
return_value |= ((temp & 0x03FC0000) >> 18);
set_itvc_reg(dev, ITVC_READ_DIR, (0x87 << 10));
*value = return_value;
return ret;
}
/* ------------------------------------------------------------------ */
/* MPEG encoder API */
static char *cmd_to_str(int cmd)
{
switch (cmd) {
case CX2341X_ENC_PING_FW:
return "PING_FW";
case CX2341X_ENC_START_CAPTURE:
return "START_CAPTURE";
case CX2341X_ENC_STOP_CAPTURE:
return "STOP_CAPTURE";
case CX2341X_ENC_SET_AUDIO_ID:
return "SET_AUDIO_ID";
case CX2341X_ENC_SET_VIDEO_ID:
return "SET_VIDEO_ID";
case CX2341X_ENC_SET_PCR_ID:
return "SET_PCR_PID";
case CX2341X_ENC_SET_FRAME_RATE:
return "SET_FRAME_RATE";
case CX2341X_ENC_SET_FRAME_SIZE:
return "SET_FRAME_SIZE";
case CX2341X_ENC_SET_BIT_RATE:
return "SET_BIT_RATE";
case CX2341X_ENC_SET_GOP_PROPERTIES:
return "SET_GOP_PROPERTIES";
case CX2341X_ENC_SET_ASPECT_RATIO:
return "SET_ASPECT_RATIO";
case CX2341X_ENC_SET_DNR_FILTER_MODE:
return "SET_DNR_FILTER_PROPS";
case CX2341X_ENC_SET_DNR_FILTER_PROPS:
return "SET_DNR_FILTER_PROPS";
case CX2341X_ENC_SET_CORING_LEVELS:
return "SET_CORING_LEVELS";
case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE:
return "SET_SPATIAL_FILTER_TYPE";
case CX2341X_ENC_SET_VBI_LINE:
return "SET_VBI_LINE";
case CX2341X_ENC_SET_STREAM_TYPE:
return "SET_STREAM_TYPE";
case CX2341X_ENC_SET_OUTPUT_PORT:
return "SET_OUTPUT_PORT";
case CX2341X_ENC_SET_AUDIO_PROPERTIES:
return "SET_AUDIO_PROPERTIES";
case CX2341X_ENC_HALT_FW:
return "HALT_FW";
case CX2341X_ENC_GET_VERSION:
return "GET_VERSION";
case CX2341X_ENC_SET_GOP_CLOSURE:
return "SET_GOP_CLOSURE";
case CX2341X_ENC_GET_SEQ_END:
return "GET_SEQ_END";
case CX2341X_ENC_SET_PGM_INDEX_INFO:
return "SET_PGM_INDEX_INFO";
case CX2341X_ENC_SET_VBI_CONFIG:
return "SET_VBI_CONFIG";
case CX2341X_ENC_SET_DMA_BLOCK_SIZE:
return "SET_DMA_BLOCK_SIZE";
case CX2341X_ENC_GET_PREV_DMA_INFO_MB_10:
return "GET_PREV_DMA_INFO_MB_10";
case CX2341X_ENC_GET_PREV_DMA_INFO_MB_9:
return "GET_PREV_DMA_INFO_MB_9";
case CX2341X_ENC_SCHED_DMA_TO_HOST:
return "SCHED_DMA_TO_HOST";
case CX2341X_ENC_INITIALIZE_INPUT:
return "INITIALIZE_INPUT";
case CX2341X_ENC_SET_FRAME_DROP_RATE:
return "SET_FRAME_DROP_RATE";
case CX2341X_ENC_PAUSE_ENCODER:
return "PAUSE_ENCODER";
case CX2341X_ENC_REFRESH_INPUT:
return "REFRESH_INPUT";
case CX2341X_ENC_SET_COPYRIGHT:
return "SET_COPYRIGHT";
case CX2341X_ENC_SET_EVENT_NOTIFICATION:
return "SET_EVENT_NOTIFICATION";
case CX2341X_ENC_SET_NUM_VSYNC_LINES:
return "SET_NUM_VSYNC_LINES";
case CX2341X_ENC_SET_PLACEHOLDER:
return "SET_PLACEHOLDER";
case CX2341X_ENC_MUTE_VIDEO:
return "MUTE_VIDEO";
case CX2341X_ENC_MUTE_AUDIO:
return "MUTE_AUDIO";
case CX2341X_ENC_MISC:
return "MISC";
default:
return "UNKNOWN";
}
}
static int cx231xx_mbox_func(void *priv, u32 command, int in, int out,
u32 data[CX2341X_MBOX_MAX_DATA])
{
struct cx231xx *dev = priv;
unsigned long timeout;
u32 value, flag, retval = 0;
int i;
dprintk(3, "%s: command(0x%X) = %s\n", __func__, command,
cmd_to_str(command));
/* this may not be 100% safe if we can't read any memory location
without side effects */
mc417_memory_read(dev, dev->cx23417_mailbox - 4, &value);
if (value != 0x12345678) {
dprintk(3, "Firmware and/or mailbox pointer not initialized or corrupted, signature = 0x%x, cmd = %s\n",
value, cmd_to_str(command));
return -EIO;
}
/* This read looks at 32 bits, but flag is only 8 bits.
* Seems we also bail if CMD or TIMEOUT bytes are set???
*/
mc417_memory_read(dev, dev->cx23417_mailbox, &flag);
if (flag) {
dprintk(3, "ERROR: Mailbox appears to be in use (%x), cmd = %s\n",
flag, cmd_to_str(command));
return -EBUSY;
}
flag |= 1; /* tell 'em we're working on it */
mc417_memory_write(dev, dev->cx23417_mailbox, flag);
/* write command + args + fill remaining with zeros */
/* command code */
mc417_memory_write(dev, dev->cx23417_mailbox + 1, command);
mc417_memory_write(dev, dev->cx23417_mailbox + 3,
IVTV_API_STD_TIMEOUT); /* timeout */
for (i = 0; i < in; i++) {
mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, data[i]);
dprintk(3, "API Input %d = %d\n", i, data[i]);
}
for (; i < CX2341X_MBOX_MAX_DATA; i++)
mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, 0);
flag |= 3; /* tell 'em we're done writing */
mc417_memory_write(dev, dev->cx23417_mailbox, flag);
/* wait for firmware to handle the API command */
timeout = jiffies + msecs_to_jiffies(10);
for (;;) {
mc417_memory_read(dev, dev->cx23417_mailbox, &flag);
if (0 != (flag & 4))
break;
if (time_after(jiffies, timeout)) {
dprintk(3, "ERROR: API Mailbox timeout\n");
return -EIO;
}
udelay(10);
}
/* read output values */
for (i = 0; i < out; i++) {
mc417_memory_read(dev, dev->cx23417_mailbox + 4 + i, data + i);
dprintk(3, "API Output %d = %d\n", i, data[i]);
}
mc417_memory_read(dev, dev->cx23417_mailbox + 2, &retval);
dprintk(3, "API result = %d\n", retval);
flag = 0;
mc417_memory_write(dev, dev->cx23417_mailbox, flag);
return 0;
}
/* We don't need to call the API often, so using just one
* mailbox will probably suffice
*/
static int cx231xx_api_cmd(struct cx231xx *dev, u32 command,
u32 inputcnt, u32 outputcnt, ...)
{
u32 data[CX2341X_MBOX_MAX_DATA];
va_list vargs;
int i, err;
dprintk(3, "%s() cmds = 0x%08x\n", __func__, command);
va_start(vargs, outputcnt);
for (i = 0; i < inputcnt; i++)
data[i] = va_arg(vargs, int);
err = cx231xx_mbox_func(dev, command, inputcnt, outputcnt, data);
for (i = 0; i < outputcnt; i++) {
int *vptr = va_arg(vargs, int *);
*vptr = data[i];
}
va_end(vargs);
return err;
}
static int cx231xx_find_mailbox(struct cx231xx *dev)
{
u32 signature[4] = {
0x12345678, 0x34567812, 0x56781234, 0x78123456
};
int signaturecnt = 0;
u32 value;
int i;
int ret = 0;
dprintk(2, "%s()\n", __func__);
for (i = 0; i < 0x100; i++) {/*CX231xx_FIRM_IMAGE_SIZE*/
ret = mc417_memory_read(dev, i, &value);
if (ret < 0)
return ret;
if (value == signature[signaturecnt])
signaturecnt++;
else
signaturecnt = 0;
if (4 == signaturecnt) {
dprintk(1, "Mailbox signature found at 0x%x\n", i + 1);
return i + 1;
}
}
dprintk(3, "Mailbox signature values not found!\n");
return -EIO;
}
static void mci_write_memory_to_gpio(struct cx231xx *dev, u32 address, u32 value,
u32 *p_fw_image)
{
u32 temp = 0;
int i = 0;
temp = 0x82 | MCI_MEMORY_DATA_BYTE0 | ((value & 0x000000FF) << 8);
temp = temp << 10;
*p_fw_image = temp;
p_fw_image++;
temp = temp | (0x05 << 10);
*p_fw_image = temp;
p_fw_image++;
/*write data byte 1;*/
temp = 0x82 | MCI_MEMORY_DATA_BYTE1 | (value & 0x0000FF00);
temp = temp << 10;
*p_fw_image = temp;
p_fw_image++;
temp = temp | (0x05 << 10);
*p_fw_image = temp;
p_fw_image++;
/*write data byte 2;*/
temp = 0x82 | MCI_MEMORY_DATA_BYTE2 | ((value & 0x00FF0000) >> 8);
temp = temp << 10;
*p_fw_image = temp;
p_fw_image++;
temp = temp | (0x05 << 10);
*p_fw_image = temp;
p_fw_image++;
/*write data byte 3;*/
temp = 0x82 | MCI_MEMORY_DATA_BYTE3 | ((value & 0xFF000000) >> 16);
temp = temp << 10;
*p_fw_image = temp;
p_fw_image++;
temp = temp | (0x05 << 10);
*p_fw_image = temp;
p_fw_image++;
/* write address byte 2;*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE2 | MCI_MODE_MEMORY_WRITE |
((address & 0x003F0000) >> 8);
temp = temp << 10;
*p_fw_image = temp;
p_fw_image++;
temp = temp | (0x05 << 10);
*p_fw_image = temp;
p_fw_image++;
/* write address byte 1;*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE1 | (address & 0xFF00);
temp = temp << 10;
*p_fw_image = temp;
p_fw_image++;
temp = temp | (0x05 << 10);
*p_fw_image = temp;
p_fw_image++;
/* write address byte 0;*/
temp = 0x82 | MCI_MEMORY_ADDRESS_BYTE0 | ((address & 0x00FF) << 8);
temp = temp << 10;
*p_fw_image = temp;
p_fw_image++;
temp = temp | (0x05 << 10);
*p_fw_image = temp;
p_fw_image++;
for (i = 0; i < 6; i++) {
*p_fw_image = 0xFFFFFFFF;
p_fw_image++;
}
}
static int cx231xx_load_firmware(struct cx231xx *dev)
{
static const unsigned char magic[8] = {
0xa7, 0x0d, 0x00, 0x00, 0x66, 0xbb, 0x55, 0xaa
};
const struct firmware *firmware;
int i, retval = 0;
u32 value = 0;
u32 gpio_output = 0;
/*u32 checksum = 0;*/
/*u32 *dataptr;*/
u32 transfer_size = 0;
u32 fw_data = 0;
u32 address = 0;
/*u32 current_fw[800];*/
u32 *p_current_fw, *p_fw;
u32 *p_fw_data;
int frame = 0;
u16 _buffer_size = 4096;
u8 *p_buffer;
p_current_fw = vmalloc(1884180 * 4);
p_fw = p_current_fw;
if (p_current_fw == NULL) {
dprintk(2, "FAIL!!!\n");
return -ENOMEM;
}
p_buffer = vmalloc(4096);
if (p_buffer == NULL) {
dprintk(2, "FAIL!!!\n");
vfree(p_current_fw);
return -ENOMEM;
}
dprintk(2, "%s()\n", __func__);
/* Save GPIO settings before reset of APU */
retval |= mc417_memory_read(dev, 0x9020, &gpio_output);
retval |= mc417_memory_read(dev, 0x900C, &value);
retval = mc417_register_write(dev,
IVTV_REG_VPU, 0xFFFFFFED);
retval |= mc417_register_write(dev,
IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST);
retval |= mc417_register_write(dev,
IVTV_REG_ENC_SDRAM_REFRESH, 0x80000800);
retval |= mc417_register_write(dev,
IVTV_REG_ENC_SDRAM_PRECHARGE, 0x1A);
retval |= mc417_register_write(dev,
IVTV_REG_APU, 0);
if (retval != 0) {
dev_err(dev->dev,
"%s: Error with mc417_register_write\n", __func__);
vfree(p_current_fw);
vfree(p_buffer);
return retval;
}
retval = request_firmware(&firmware, CX231xx_FIRM_IMAGE_NAME,
dev->dev);
if (retval != 0) {
dev_err(dev->dev,
"ERROR: Hotplug firmware request failed (%s).\n",
CX231xx_FIRM_IMAGE_NAME);
dev_err(dev->dev,
"Please fix your hotplug setup, the board will not work without firmware loaded!\n");
vfree(p_current_fw);
vfree(p_buffer);
return retval;
}
if (firmware->size != CX231xx_FIRM_IMAGE_SIZE) {
dev_err(dev->dev,
"ERROR: Firmware size mismatch (have %zd, expected %d)\n",
firmware->size, CX231xx_FIRM_IMAGE_SIZE);
release_firmware(firmware);
vfree(p_current_fw);
vfree(p_buffer);
return -EINVAL;
}
if (0 != memcmp(firmware->data, magic, 8)) {
dev_err(dev->dev,
"ERROR: Firmware magic mismatch, wrong file?\n");
release_firmware(firmware);
vfree(p_current_fw);
vfree(p_buffer);
return -EINVAL;
}
initGPIO(dev);
/* transfer to the chip */
dprintk(2, "Loading firmware to GPIO...\n");
p_fw_data = (u32 *)firmware->data;
dprintk(2, "firmware->size=%zd\n", firmware->size);
for (transfer_size = 0; transfer_size < firmware->size;
transfer_size += 4) {
fw_data = *p_fw_data;
mci_write_memory_to_gpio(dev, address, fw_data, p_current_fw);
address = address + 1;
p_current_fw += 20;
p_fw_data += 1;
}
/*download the firmware by ep5-out*/
for (frame = 0; frame < (int)(CX231xx_FIRM_IMAGE_SIZE*20/_buffer_size);
frame++) {
for (i = 0; i < _buffer_size; i++) {
*(p_buffer + i) = (u8)(*(p_fw + (frame * 128 * 8 + (i / 4))) & 0x000000FF);
i++;
*(p_buffer + i) = (u8)((*(p_fw + (frame * 128 * 8 + (i / 4))) & 0x0000FF00) >> 8);
i++;
*(p_buffer + i) = (u8)((*(p_fw + (frame * 128 * 8 + (i / 4))) & 0x00FF0000) >> 16);
i++;
*(p_buffer + i) = (u8)((*(p_fw + (frame * 128 * 8 + (i / 4))) & 0xFF000000) >> 24);
}
cx231xx_ep5_bulkout(dev, p_buffer, _buffer_size);
}
p_current_fw = p_fw;
vfree(p_current_fw);
p_current_fw = NULL;
vfree(p_buffer);
uninitGPIO(dev);
release_firmware(firmware);
dprintk(1, "Firmware upload successful.\n");
retval |= mc417_register_write(dev, IVTV_REG_HW_BLOCKS,
IVTV_CMD_HW_BLOCKS_RST);
if (retval < 0) {
dev_err(dev->dev,
"%s: Error with mc417_register_write\n",
__func__);
return retval;
}
/* F/W power up disturbs the GPIOs, restore state */
retval |= mc417_register_write(dev, 0x9020, gpio_output);
retval |= mc417_register_write(dev, 0x900C, value);
retval |= mc417_register_read(dev, IVTV_REG_VPU, &value);
retval |= mc417_register_write(dev, IVTV_REG_VPU, value & 0xFFFFFFE8);
if (retval < 0) {
dev_err(dev->dev,
"%s: Error with mc417_register_write\n",
__func__);
return retval;
}
return 0;
}
static void cx231xx_codec_settings(struct cx231xx *dev)
{
dprintk(1, "%s()\n", __func__);
/* assign frame size */
cx231xx_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0,
dev->ts1.height, dev->ts1.width);
dev->mpeg_ctrl_handler.width = dev->ts1.width;
dev->mpeg_ctrl_handler.height = dev->ts1.height;
cx2341x_handler_setup(&dev->mpeg_ctrl_handler);
cx231xx_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 3, 1);
cx231xx_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1);
}
static int cx231xx_initialize_codec(struct cx231xx *dev)
{
int version;
int retval;
u32 i;
u32 val = 0;
dprintk(1, "%s()\n", __func__);
cx231xx_disable656(dev);
retval = cx231xx_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0); /* ping */
if (retval < 0) {
dprintk(2, "%s: PING OK\n", __func__);
retval = cx231xx_load_firmware(dev);
if (retval < 0) {
dev_err(dev->dev,
"%s: f/w load failed\n", __func__);
return retval;
}
retval = cx231xx_find_mailbox(dev);
if (retval < 0) {
dev_err(dev->dev, "%s: mailbox < 0, error\n",
__func__);
return retval;
}
dev->cx23417_mailbox = retval;
retval = cx231xx_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0);
if (retval < 0) {
dev_err(dev->dev,
"ERROR: cx23417 firmware ping failed!\n");
return retval;
}
retval = cx231xx_api_cmd(dev, CX2341X_ENC_GET_VERSION, 0, 1,
&version);
if (retval < 0) {
dev_err(dev->dev,
"ERROR: cx23417 firmware get encoder: version failed!\n");
return retval;
}
dprintk(1, "cx23417 firmware version is 0x%08x\n", version);
msleep(200);
}
for (i = 0; i < 1; i++) {
retval = mc417_register_read(dev, 0x20f8, &val);
dprintk(3, "***before enable656() VIM Capture Lines = %d ***\n",
val);
if (retval < 0)
return retval;
}
cx231xx_enable656(dev);
/* stop mpeg capture */
cx231xx_api_cmd(dev, CX2341X_ENC_STOP_CAPTURE, 3, 0, 1, 3, 4);
cx231xx_codec_settings(dev);
msleep(60);
/* cx231xx_api_cmd(dev, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, 0,
CX231xx_FIELD1_SAA7115, CX231xx_FIELD2_SAA7115);
cx231xx_api_cmd(dev, CX2341X_ENC_SET_PLACEHOLDER, 12, 0,
CX231xx_CUSTOM_EXTENSION_USR_DATA, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0);
*/
#if 0
/* TODO */
u32 data[7];
/* Setup to capture VBI */
data[0] = 0x0001BD00;
data[1] = 1; /* frames per interrupt */
data[2] = 4; /* total bufs */
data[3] = 0x91559155; /* start codes */
data[4] = 0x206080C0; /* stop codes */
data[5] = 6; /* lines */
data[6] = 64; /* BPL */
cx231xx_api_cmd(dev, CX2341X_ENC_SET_VBI_CONFIG, 7, 0, data[0], data[1],
data[2], data[3], data[4], data[5], data[6]);
for (i = 2; i <= 24; i++) {
int valid;
valid = ((i >= 19) && (i <= 21));
cx231xx_api_cmd(dev, CX2341X_ENC_SET_VBI_LINE, 5, 0, i,
valid, 0 , 0, 0);
cx231xx_api_cmd(dev, CX2341X_ENC_SET_VBI_LINE, 5, 0,
i | 0x80000000, valid, 0, 0, 0);
}
#endif
/* cx231xx_api_cmd(dev, CX2341X_ENC_MUTE_AUDIO, 1, 0, CX231xx_UNMUTE);
msleep(60);
*/
/* initialize the video input */
retval = cx231xx_api_cmd(dev, CX2341X_ENC_INITIALIZE_INPUT, 0, 0);
if (retval < 0)
return retval;
msleep(60);
/* Enable VIP style pixel invalidation so we work with scaled mode */
mc417_memory_write(dev, 2120, 0x00000080);
/* start capturing to the host interface */
retval = cx231xx_api_cmd(dev, CX2341X_ENC_START_CAPTURE, 2, 0,
CX231xx_MPEG_CAPTURE, CX231xx_RAW_BITS_NONE);
if (retval < 0)
return retval;
msleep(10);
for (i = 0; i < 1; i++) {
mc417_register_read(dev, 0x20f8, &val);
dprintk(3, "***VIM Capture Lines =%d ***\n", val);
}
return 0;
}
/* ------------------------------------------------------------------ */
static int queue_setup(struct vb2_queue *vq,
unsigned int *nbuffers, unsigned int *nplanes,
unsigned int sizes[], struct device *alloc_devs[])
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
unsigned int size = mpeglinesize * mpeglines;
dev->ts1.ts_packet_size = mpeglinesize;
dev->ts1.ts_packet_count = mpeglines;
if (vq->num_buffers + *nbuffers < CX231XX_MIN_BUF)
*nbuffers = CX231XX_MIN_BUF - vq->num_buffers;
if (*nplanes)
return sizes[0] < size ? -EINVAL : 0;
*nplanes = 1;
sizes[0] = mpeglinesize * mpeglines;
return 0;
}
static void buffer_copy(struct cx231xx *dev, char *data, int len, struct urb *urb,
struct cx231xx_dmaqueue *dma_q)
{
void *vbuf;
struct cx231xx_buffer *buf;
u32 tail_data = 0;
char *p_data;
if (dma_q->mpeg_buffer_done == 0) {
if (list_empty(&dma_q->active))
return;
buf = list_entry(dma_q->active.next,
struct cx231xx_buffer, list);
dev->video_mode.isoc_ctl.buf = buf;
dma_q->mpeg_buffer_done = 1;
}
/* Fill buffer */
buf = dev->video_mode.isoc_ctl.buf;
vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
if ((dma_q->mpeg_buffer_completed+len) <
mpeglines*mpeglinesize) {
if (dma_q->add_ps_package_head ==
CX231XX_NEED_ADD_PS_PACKAGE_HEAD) {
memcpy(vbuf+dma_q->mpeg_buffer_completed,
dma_q->ps_head, 3);
dma_q->mpeg_buffer_completed =
dma_q->mpeg_buffer_completed + 3;
dma_q->add_ps_package_head =
CX231XX_NONEED_PS_PACKAGE_HEAD;
}
memcpy(vbuf+dma_q->mpeg_buffer_completed, data, len);
dma_q->mpeg_buffer_completed =
dma_q->mpeg_buffer_completed + len;
} else {
dma_q->mpeg_buffer_done = 0;
tail_data =
mpeglines*mpeglinesize - dma_q->mpeg_buffer_completed;
memcpy(vbuf+dma_q->mpeg_buffer_completed,
data, tail_data);
buf->vb.vb2_buf.timestamp = ktime_get_ns();
buf->vb.sequence = dma_q->sequence++;
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
dma_q->mpeg_buffer_completed = 0;
if (len - tail_data > 0) {
p_data = data + tail_data;
dma_q->left_data_count = len - tail_data;
memcpy(dma_q->p_left_data,
p_data, len - tail_data);
}
}
}
static void buffer_filled(char *data, int len, struct urb *urb,
struct cx231xx_dmaqueue *dma_q)
{
void *vbuf;
struct cx231xx_buffer *buf;
if (list_empty(&dma_q->active))
return;
buf = list_entry(dma_q->active.next, struct cx231xx_buffer, list);
/* Fill buffer */
vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
memcpy(vbuf, data, len);
buf->vb.sequence = dma_q->sequence++;
buf->vb.vb2_buf.timestamp = ktime_get_ns();
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
}
static int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
unsigned char *p_buffer;
u32 buffer_size = 0;
u32 i = 0;
for (i = 0; i < urb->number_of_packets; i++) {
if (dma_q->left_data_count > 0) {
buffer_copy(dev, dma_q->p_left_data,
dma_q->left_data_count, urb, dma_q);
dma_q->mpeg_buffer_completed = dma_q->left_data_count;
dma_q->left_data_count = 0;
}
p_buffer = urb->transfer_buffer +
urb->iso_frame_desc[i].offset;
buffer_size = urb->iso_frame_desc[i].actual_length;
if (buffer_size > 0)
buffer_copy(dev, p_buffer, buffer_size, urb, dma_q);
}
return 0;
}
static int cx231xx_bulk_copy(struct cx231xx *dev, struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
unsigned char *p_buffer, *buffer;
u32 buffer_size = 0;
p_buffer = urb->transfer_buffer;
buffer_size = urb->actual_length;
buffer = kmalloc(buffer_size, GFP_ATOMIC);
if (!buffer)
return -ENOMEM;
memcpy(buffer, dma_q->ps_head, 3);
memcpy(buffer+3, p_buffer, buffer_size-3);
memcpy(dma_q->ps_head, p_buffer+buffer_size-3, 3);
p_buffer = buffer;
buffer_filled(p_buffer, buffer_size, urb, dma_q);
kfree(buffer);
return 0;
}
static void buffer_queue(struct vb2_buffer *vb)
{
struct cx231xx_buffer *buf =
container_of(vb, struct cx231xx_buffer, vb.vb2_buf);
struct cx231xx *dev = vb2_get_drv_priv(vb->vb2_queue);
struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
unsigned long flags;
spin_lock_irqsave(&dev->video_mode.slock, flags);
list_add_tail(&buf->list, &vidq->active);
spin_unlock_irqrestore(&dev->video_mode.slock, flags);
}
static void return_all_buffers(struct cx231xx *dev,
enum vb2_buffer_state state)
{
struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
struct cx231xx_buffer *buf, *node;
unsigned long flags;
spin_lock_irqsave(&dev->video_mode.slock, flags);
list_for_each_entry_safe(buf, node, &vidq->active, list) {
vb2_buffer_done(&buf->vb.vb2_buf, state);
list_del(&buf->list);
}
spin_unlock_irqrestore(&dev->video_mode.slock, flags);
}
static int start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
int ret = 0;
vidq->sequence = 0;
dev->mode_tv = 1;
cx231xx_set_alt_setting(dev, INDEX_VANC, 1);
cx231xx_set_gpio_value(dev, 2, 0);
cx231xx_initialize_codec(dev);
cx231xx_start_TS1(dev);
cx231xx_set_alt_setting(dev, INDEX_TS1, 0);
cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);
if (dev->USE_ISO)
ret = cx231xx_init_isoc(dev, CX231XX_NUM_PACKETS,
CX231XX_NUM_BUFS,
dev->ts1_mode.max_pkt_size,
cx231xx_isoc_copy);
else
ret = cx231xx_init_bulk(dev, 320, 5,
dev->ts1_mode.max_pkt_size,
cx231xx_bulk_copy);
if (ret)
return_all_buffers(dev, VB2_BUF_STATE_QUEUED);
call_all(dev, video, s_stream, 1);
return ret;
}
static void stop_streaming(struct vb2_queue *vq)
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
unsigned long flags;
call_all(dev, video, s_stream, 0);
cx231xx_stop_TS1(dev);
/* do this before setting alternate! */
if (dev->USE_ISO)
cx231xx_uninit_isoc(dev);
else
cx231xx_uninit_bulk(dev);
cx231xx_set_mode(dev, CX231XX_SUSPEND);
cx231xx_api_cmd(dev, CX2341X_ENC_STOP_CAPTURE, 3, 0,
CX231xx_END_NOW, CX231xx_MPEG_CAPTURE,
CX231xx_RAW_BITS_NONE);
spin_lock_irqsave(&dev->video_mode.slock, flags);
if (dev->USE_ISO)
dev->video_mode.isoc_ctl.buf = NULL;
else
dev->video_mode.bulk_ctl.buf = NULL;
spin_unlock_irqrestore(&dev->video_mode.slock, flags);
return_all_buffers(dev, VB2_BUF_STATE_ERROR);
}
static struct vb2_ops cx231xx_video_qops = {
.queue_setup = queue_setup,
.buf_queue = buffer_queue,
.start_streaming = start_streaming,
.stop_streaming = stop_streaming,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
};
/* ------------------------------------------------------------------ */
static int vidioc_g_pixelaspect(struct file *file, void *priv,
int type, struct v4l2_fract *f)
{
struct cx231xx *dev = video_drvdata(file);
bool is_50hz = dev->encodernorm.id & V4L2_STD_625_50;
if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
f->numerator = is_50hz ? 54 : 11;
f->denominator = is_50hz ? 59 : 10;
return 0;
}
static int vidioc_g_selection(struct file *file, void *priv,
struct v4l2_selection *s)
{
struct cx231xx *dev = video_drvdata(file);
if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
switch (s->target) {
case V4L2_SEL_TGT_CROP_BOUNDS:
case V4L2_SEL_TGT_CROP_DEFAULT:
s->r.left = 0;
s->r.top = 0;
s->r.width = dev->ts1.width;
s->r.height = dev->ts1.height;
break;
default:
return -EINVAL;
}
return 0;
}
static int vidioc_g_std(struct file *file, void *fh0, v4l2_std_id *norm)
{
struct cx231xx *dev = video_drvdata(file);
*norm = dev->encodernorm.id;
return 0;
}
static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id)
{
struct cx231xx *dev = video_drvdata(file);
unsigned int i;
for (i = 0; i < ARRAY_SIZE(cx231xx_tvnorms); i++)
if (id & cx231xx_tvnorms[i].id)
break;
if (i == ARRAY_SIZE(cx231xx_tvnorms))
return -EINVAL;
dev->encodernorm = cx231xx_tvnorms[i];
if (dev->encodernorm.id & 0xb000) {
dprintk(3, "encodernorm set to NTSC\n");
dev->norm = V4L2_STD_NTSC;
dev->ts1.height = 480;
cx2341x_handler_set_50hz(&dev->mpeg_ctrl_handler, false);
} else {
dprintk(3, "encodernorm set to PAL\n");
dev->norm = V4L2_STD_PAL_B;
dev->ts1.height = 576;
cx2341x_handler_set_50hz(&dev->mpeg_ctrl_handler, true);
}
call_all(dev, video, s_std, dev->norm);
/* do mode control overrides */
cx231xx_do_mode_ctrl_overrides(dev);
dprintk(3, "exit vidioc_s_std() i=0x%x\n", i);
return 0;
}
static int vidioc_s_ctrl(struct file *file, void *priv,
struct v4l2_control *ctl)
{
struct cx231xx *dev = video_drvdata(file);
struct v4l2_subdev *sd;
dprintk(3, "enter vidioc_s_ctrl()\n");
/* Update the A/V core */
v4l2_device_for_each_subdev(sd, &dev->v4l2_dev)
v4l2_s_ctrl(NULL, sd->ctrl_handler, ctl);
dprintk(3, "exit vidioc_s_ctrl()\n");
return 0;
}
static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_fmtdesc *f)
{
if (f->index != 0)
return -EINVAL;
f->pixelformat = V4L2_PIX_FMT_MPEG;
return 0;
}
static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct cx231xx *dev = video_drvdata(file);
dprintk(3, "enter vidioc_g_fmt_vid_cap()\n");
f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
f->fmt.pix.bytesperline = 0;
f->fmt.pix.sizeimage = mpeglines * mpeglinesize;
f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
f->fmt.pix.width = dev->ts1.width;
f->fmt.pix.height = dev->ts1.height;
f->fmt.pix.field = V4L2_FIELD_INTERLACED;
dprintk(1, "VIDIOC_G_FMT: w: %d, h: %d\n",
dev->ts1.width, dev->ts1.height);
dprintk(3, "exit vidioc_g_fmt_vid_cap()\n");
return 0;
}
static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct cx231xx *dev = video_drvdata(file);
dprintk(3, "enter vidioc_try_fmt_vid_cap()\n");
f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
f->fmt.pix.bytesperline = 0;
f->fmt.pix.sizeimage = mpeglines * mpeglinesize;
f->fmt.pix.field = V4L2_FIELD_INTERLACED;
f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
dprintk(1, "VIDIOC_TRY_FMT: w: %d, h: %d\n",
dev->ts1.width, dev->ts1.height);
dprintk(3, "exit vidioc_try_fmt_vid_cap()\n");
return 0;
}
static int vidioc_log_status(struct file *file, void *priv)
{
struct cx231xx *dev = video_drvdata(file);
call_all(dev, core, log_status);
return v4l2_ctrl_log_status(file, priv);
}
static const struct v4l2_file_operations mpeg_fops = {
.owner = THIS_MODULE,
.open = v4l2_fh_open,
.release = vb2_fop_release,
.read = vb2_fop_read,
.poll = vb2_fop_poll,
.mmap = vb2_fop_mmap,
.unlocked_ioctl = video_ioctl2,
};
static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
.vidioc_s_std = vidioc_s_std,
.vidioc_g_std = vidioc_g_std,
.vidioc_g_tuner = cx231xx_g_tuner,
.vidioc_s_tuner = cx231xx_s_tuner,
.vidioc_g_frequency = cx231xx_g_frequency,
.vidioc_s_frequency = cx231xx_s_frequency,
.vidioc_enum_input = cx231xx_enum_input,
.vidioc_g_input = cx231xx_g_input,
.vidioc_s_input = cx231xx_s_input,
.vidioc_s_ctrl = vidioc_s_ctrl,
.vidioc_g_pixelaspect = vidioc_g_pixelaspect,
.vidioc_g_selection = vidioc_g_selection,
.vidioc_querycap = cx231xx_querycap,
.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
.vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = vidioc_try_fmt_vid_cap,
.vidioc_reqbufs = vb2_ioctl_reqbufs,
.vidioc_querybuf = vb2_ioctl_querybuf,
.vidioc_qbuf = vb2_ioctl_qbuf,
.vidioc_dqbuf = vb2_ioctl_dqbuf,
.vidioc_streamon = vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff,
.vidioc_log_status = vidioc_log_status,
#ifdef CONFIG_VIDEO_ADV_DEBUG
.vidioc_g_register = cx231xx_g_register,
.vidioc_s_register = cx231xx_s_register,
#endif
.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
};
static struct video_device cx231xx_mpeg_template = {
.name = "cx231xx",
.fops = &mpeg_fops,
.ioctl_ops = &mpeg_ioctl_ops,
.minor = -1,
.tvnorms = V4L2_STD_ALL,
};
void cx231xx_417_unregister(struct cx231xx *dev)
{
dprintk(1, "%s()\n", __func__);
dprintk(3, "%s()\n", __func__);
if (video_is_registered(&dev->v4l_device)) {
video_unregister_device(&dev->v4l_device);
v4l2_ctrl_handler_free(&dev->mpeg_ctrl_handler.hdl);
}
}
static int cx231xx_s_video_encoding(struct cx2341x_handler *cxhdl, u32 val)
{
struct cx231xx *dev = container_of(cxhdl, struct cx231xx, mpeg_ctrl_handler);
int is_mpeg1 = val == V4L2_MPEG_VIDEO_ENCODING_MPEG_1;
struct v4l2_subdev_format format = {
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
};
/* fix videodecoder resolution */
format.format.width = cxhdl->width / (is_mpeg1 ? 2 : 1);
format.format.height = cxhdl->height;
format.format.code = MEDIA_BUS_FMT_FIXED;
v4l2_subdev_call(dev->sd_cx25840, pad, set_fmt, NULL, &format);
return 0;
}
static int cx231xx_s_audio_sampling_freq(struct cx2341x_handler *cxhdl, u32 idx)
{
static const u32 freqs[3] = { 44100, 48000, 32000 };
struct cx231xx *dev = container_of(cxhdl, struct cx231xx, mpeg_ctrl_handler);
/* The audio clock of the digitizer must match the codec sample
rate otherwise you get some very strange effects. */
if (idx < ARRAY_SIZE(freqs))
call_all(dev, audio, s_clock_freq, freqs[idx]);
return 0;
}
static const struct cx2341x_handler_ops cx231xx_ops = {
/* needed for the video clock freq */
.s_audio_sampling_freq = cx231xx_s_audio_sampling_freq,
/* needed for setting up the video resolution */
.s_video_encoding = cx231xx_s_video_encoding,
};
static void cx231xx_video_dev_init(
struct cx231xx *dev,
struct usb_device *usbdev,
struct video_device *vfd,
const struct video_device *template,
const char *type)
{
dprintk(1, "%s()\n", __func__);
*vfd = *template;
snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)", dev->name,
type, cx231xx_boards[dev->model].name);
vfd->v4l2_dev = &dev->v4l2_dev;
vfd->lock = &dev->lock;
vfd->release = video_device_release_empty;
vfd->ctrl_handler = &dev->mpeg_ctrl_handler.hdl;
video_set_drvdata(vfd, dev);
if (dev->tuner_type == TUNER_ABSENT) {
v4l2_disable_ioctl(vfd, VIDIOC_G_FREQUENCY);
v4l2_disable_ioctl(vfd, VIDIOC_S_FREQUENCY);
v4l2_disable_ioctl(vfd, VIDIOC_G_TUNER);
v4l2_disable_ioctl(vfd, VIDIOC_S_TUNER);
}
}
int cx231xx_417_register(struct cx231xx *dev)
{
/* FIXME: Port1 hardcoded here */
int err;
struct cx231xx_tsport *tsport = &dev->ts1;
struct vb2_queue *q;
dprintk(1, "%s()\n", __func__);
/* Set default TV standard */
dev->encodernorm = cx231xx_tvnorms[0];
if (dev->encodernorm.id & V4L2_STD_525_60)
tsport->height = 480;
else
tsport->height = 576;
tsport->width = 720;
err = cx2341x_handler_init(&dev->mpeg_ctrl_handler, 50);
if (err) {
dprintk(3, "%s: can't init cx2341x controls\n", dev->name);
return err;
}
dev->mpeg_ctrl_handler.func = cx231xx_mbox_func;
dev->mpeg_ctrl_handler.priv = dev;
dev->mpeg_ctrl_handler.ops = &cx231xx_ops;
if (dev->sd_cx25840)
v4l2_ctrl_add_handler(&dev->mpeg_ctrl_handler.hdl,
dev->sd_cx25840->ctrl_handler, NULL, false);
if (dev->mpeg_ctrl_handler.hdl.error) {
err = dev->mpeg_ctrl_handler.hdl.error;
dprintk(3, "%s: can't add cx25840 controls\n", dev->name);
v4l2_ctrl_handler_free(&dev->mpeg_ctrl_handler.hdl);
return err;
}
dev->norm = V4L2_STD_NTSC;
dev->mpeg_ctrl_handler.port = CX2341X_PORT_SERIAL;
cx2341x_handler_set_50hz(&dev->mpeg_ctrl_handler, false);
/* Allocate and initialize V4L video device */
cx231xx_video_dev_init(dev, dev->udev,
&dev->v4l_device, &cx231xx_mpeg_template, "mpeg");
q = &dev->mpegq;
q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
q->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF | VB2_READ;
q->drv_priv = dev;
q->buf_struct_size = sizeof(struct cx231xx_buffer);
q->ops = &cx231xx_video_qops;
q->mem_ops = &vb2_vmalloc_memops;
q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
q->min_buffers_needed = 1;
q->lock = &dev->lock;
err = vb2_queue_init(q);
if (err)
return err;
dev->v4l_device.queue = q;
err = video_register_device(&dev->v4l_device,
VFL_TYPE_VIDEO, -1);
if (err < 0) {
dprintk(3, "%s: can't register mpeg device\n", dev->name);
v4l2_ctrl_handler_free(&dev->mpeg_ctrl_handler.hdl);
return err;
}
dprintk(3, "%s: registered device video%d [mpeg]\n",
dev->name, dev->v4l_device.num);
return 0;
}
MODULE_FIRMWARE(CX231xx_FIRM_IMAGE_NAME);
| linux-master | drivers/media/usb/cx231xx/cx231xx-417.c |
// SPDX-License-Identifier: GPL-2.0
// cx231xx IR glue driver
//
// Copyright (c) 2010 Mauro Carvalho Chehab <[email protected]>
//
// Polaris (cx231xx) has its support for IR's with a design close to MCE.
// however, a few designs are using an external I2C chip for IR, instead
// of using the one provided by the chip.
// This driver provides support for those extra devices
#include "cx231xx.h"
#include <linux/slab.h>
#include <linux/bitrev.h>
#define MODULE_NAME "cx231xx-input"
static int get_key_isdbt(struct IR_i2c *ir, enum rc_proto *protocol,
u32 *pscancode, u8 *toggle)
{
int rc;
u8 cmd, scancode;
dev_dbg(&ir->rc->dev, "%s\n", __func__);
/* poll IR chip */
rc = i2c_master_recv(ir->c, &cmd, 1);
if (rc < 0)
return rc;
if (rc != 1)
return -EIO;
/* it seems that 0xFE indicates that a button is still hold
down, while 0xff indicates that no button is hold
down. 0xfe sequences are sometimes interrupted by 0xFF */
if (cmd == 0xff)
return 0;
scancode = bitrev8(cmd);
dev_dbg(&ir->rc->dev, "cmd %02x, scan = %02x\n", cmd, scancode);
*protocol = RC_PROTO_OTHER;
*pscancode = scancode;
*toggle = 0;
return 1;
}
int cx231xx_ir_init(struct cx231xx *dev)
{
struct i2c_board_info info;
u8 ir_i2c_bus;
dev_dbg(dev->dev, "%s\n", __func__);
/* Only initialize if a rc keycode map is defined */
if (!cx231xx_boards[dev->model].rc_map_name)
return -ENODEV;
request_module("ir-kbd-i2c");
memset(&info, 0, sizeof(struct i2c_board_info));
memset(&dev->init_data, 0, sizeof(dev->init_data));
dev->init_data.rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!dev->init_data.rc_dev)
return -ENOMEM;
dev->init_data.name = cx231xx_boards[dev->model].name;
strscpy(info.type, "ir_video", I2C_NAME_SIZE);
info.platform_data = &dev->init_data;
/*
* Board-dependent values
*
* For now, there's just one type of hardware design using
* an i2c device.
*/
dev->init_data.get_key = get_key_isdbt;
dev->init_data.ir_codes = cx231xx_boards[dev->model].rc_map_name;
/* The i2c micro-controller only outputs the cmd part of NEC protocol */
dev->init_data.rc_dev->scancode_mask = 0xff;
dev->init_data.rc_dev->driver_name = "cx231xx";
dev->init_data.type = RC_PROTO_BIT_NEC;
info.addr = 0x30;
/* Load and bind ir-kbd-i2c */
ir_i2c_bus = cx231xx_boards[dev->model].ir_i2c_master;
dev_dbg(dev->dev, "Trying to bind ir at bus %d, addr 0x%02x\n",
ir_i2c_bus, info.addr);
dev->ir_i2c_client = i2c_new_client_device(
cx231xx_get_i2c_adap(dev, ir_i2c_bus), &info);
return 0;
}
void cx231xx_ir_exit(struct cx231xx *dev)
{
i2c_unregister_device(dev->ir_i2c_client);
dev->ir_i2c_client = NULL;
}
| linux-master | drivers/media/usb/cx231xx/cx231xx-input.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
cx231xx-i2c.c - driver for Conexant Cx23100/101/102 USB video capture devices
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
Based on em28xx driver
Based on Cx23885 driver
*/
#include "cx231xx.h"
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <media/v4l2-common.h>
#include <media/tuner.h>
/* ----------------------------------------------------------- */
static unsigned int i2c_scan;
module_param(i2c_scan, int, 0444);
MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
static unsigned int i2c_debug;
module_param(i2c_debug, int, 0644);
MODULE_PARM_DESC(i2c_debug, "enable debug messages [i2c]");
#define dprintk1(lvl, fmt, args...) \
do { \
if (i2c_debug >= lvl) { \
printk(fmt, ##args); \
} \
} while (0)
#define dprintk2(lvl, fmt, args...) \
do { \
if (i2c_debug >= lvl) { \
printk(KERN_DEBUG "%s at %s: " fmt, \
dev->name, __func__ , ##args); \
} \
} while (0)
static inline int get_real_i2c_port(struct cx231xx *dev, int bus_nr)
{
if (bus_nr == 1)
return dev->port_3_switch_enabled ? I2C_1_MUX_3 : I2C_1_MUX_1;
return bus_nr;
}
static inline bool is_tuner(struct cx231xx *dev, struct cx231xx_i2c *bus,
const struct i2c_msg *msg, int tuner_type)
{
int i2c_port = get_real_i2c_port(dev, bus->nr);
if (i2c_port != dev->board.tuner_i2c_master)
return false;
if (msg->addr != dev->board.tuner_addr)
return false;
if (dev->tuner_type != tuner_type)
return false;
return true;
}
/*
* cx231xx_i2c_send_bytes()
*/
static int cx231xx_i2c_send_bytes(struct i2c_adapter *i2c_adap,
const struct i2c_msg *msg)
{
struct cx231xx_i2c *bus = i2c_adap->algo_data;
struct cx231xx *dev = bus->dev;
struct cx231xx_i2c_xfer_data req_data;
int status = 0;
u16 size = 0;
u8 loop = 0;
u8 saddr_len = 1;
u8 *buf_ptr = NULL;
u16 saddr = 0;
u8 need_gpio = 0;
if (is_tuner(dev, bus, msg, TUNER_XC5000)) {
size = msg->len;
if (size == 2) { /* register write sub addr */
/* Just writing sub address will cause problem
* to XC5000. So ignore the request */
return 0;
} else if (size == 4) { /* register write with sub addr */
if (msg->len >= 2)
saddr = msg->buf[0] << 8 | msg->buf[1];
else if (msg->len == 1)
saddr = msg->buf[0];
switch (saddr) {
case 0x0000: /* start tuner calibration mode */
need_gpio = 1;
/* FW Loading is done */
dev->xc_fw_load_done = 1;
break;
case 0x000D: /* Set signal source */
case 0x0001: /* Set TV standard - Video */
case 0x0002: /* Set TV standard - Audio */
case 0x0003: /* Set RF Frequency */
need_gpio = 1;
break;
default:
if (dev->xc_fw_load_done)
need_gpio = 1;
break;
}
if (need_gpio) {
dprintk1(1,
"GPIO WRITE: addr 0x%x, len %d, saddr 0x%x\n",
msg->addr, msg->len, saddr);
return dev->cx231xx_gpio_i2c_write(dev,
msg->addr,
msg->buf,
msg->len);
}
}
/* special case for Xc5000 tuner case */
saddr_len = 1;
/* adjust the length to correct length */
size -= saddr_len;
buf_ptr = (u8 *) (msg->buf + 1);
do {
/* prepare xfer_data struct */
req_data.dev_addr = msg->addr;
req_data.direction = msg->flags;
req_data.saddr_len = saddr_len;
req_data.saddr_dat = msg->buf[0];
req_data.buf_size = size > 16 ? 16 : size;
req_data.p_buffer = (u8 *) (buf_ptr + loop * 16);
bus->i2c_nostop = (size > 16) ? 1 : 0;
bus->i2c_reserve = (loop == 0) ? 0 : 1;
/* usb send command */
status = dev->cx231xx_send_usb_command(bus, &req_data);
loop++;
if (size >= 16)
size -= 16;
else
size = 0;
} while (size > 0);
bus->i2c_nostop = 0;
bus->i2c_reserve = 0;
} else { /* regular case */
/* prepare xfer_data struct */
req_data.dev_addr = msg->addr;
req_data.direction = msg->flags;
req_data.saddr_len = 0;
req_data.saddr_dat = 0;
req_data.buf_size = msg->len;
req_data.p_buffer = msg->buf;
/* usb send command */
status = dev->cx231xx_send_usb_command(bus, &req_data);
}
return status < 0 ? status : 0;
}
/*
* cx231xx_i2c_recv_bytes()
* read a byte from the i2c device
*/
static int cx231xx_i2c_recv_bytes(struct i2c_adapter *i2c_adap,
const struct i2c_msg *msg)
{
struct cx231xx_i2c *bus = i2c_adap->algo_data;
struct cx231xx *dev = bus->dev;
struct cx231xx_i2c_xfer_data req_data;
int status = 0;
u16 saddr = 0;
u8 need_gpio = 0;
if (is_tuner(dev, bus, msg, TUNER_XC5000)) {
if (msg->len == 2)
saddr = msg->buf[0] << 8 | msg->buf[1];
else if (msg->len == 1)
saddr = msg->buf[0];
if (dev->xc_fw_load_done) {
switch (saddr) {
case 0x0009: /* BUSY check */
dprintk1(1,
"GPIO R E A D: Special case BUSY check \n");
/*Try read BUSY register, just set it to zero*/
msg->buf[0] = 0;
if (msg->len == 2)
msg->buf[1] = 0;
return 0;
case 0x0004: /* read Lock status */
need_gpio = 1;
break;
}
if (need_gpio) {
/* this is a special case to handle Xceive tuner
clock stretch issue with gpio based I2C */
dprintk1(1,
"GPIO R E A D: addr 0x%x, len %d, saddr 0x%x\n",
msg->addr, msg->len,
msg->buf[0] << 8 | msg->buf[1]);
status =
dev->cx231xx_gpio_i2c_write(dev, msg->addr,
msg->buf,
msg->len);
status =
dev->cx231xx_gpio_i2c_read(dev, msg->addr,
msg->buf,
msg->len);
return status;
}
}
/* prepare xfer_data struct */
req_data.dev_addr = msg->addr;
req_data.direction = msg->flags;
req_data.saddr_len = msg->len;
req_data.saddr_dat = msg->buf[0] << 8 | msg->buf[1];
req_data.buf_size = msg->len;
req_data.p_buffer = msg->buf;
/* usb send command */
status = dev->cx231xx_send_usb_command(bus, &req_data);
} else {
/* prepare xfer_data struct */
req_data.dev_addr = msg->addr;
req_data.direction = msg->flags;
req_data.saddr_len = 0;
req_data.saddr_dat = 0;
req_data.buf_size = msg->len;
req_data.p_buffer = msg->buf;
/* usb send command */
status = dev->cx231xx_send_usb_command(bus, &req_data);
}
return status < 0 ? status : 0;
}
/*
* cx231xx_i2c_recv_bytes_with_saddr()
* read a byte from the i2c device
*/
static int cx231xx_i2c_recv_bytes_with_saddr(struct i2c_adapter *i2c_adap,
const struct i2c_msg *msg1,
const struct i2c_msg *msg2)
{
struct cx231xx_i2c *bus = i2c_adap->algo_data;
struct cx231xx *dev = bus->dev;
struct cx231xx_i2c_xfer_data req_data;
int status = 0;
u16 saddr = 0;
u8 need_gpio = 0;
if (msg1->len == 2)
saddr = msg1->buf[0] << 8 | msg1->buf[1];
else if (msg1->len == 1)
saddr = msg1->buf[0];
if (is_tuner(dev, bus, msg2, TUNER_XC5000)) {
if ((msg2->len < 16)) {
dprintk1(1,
"i2c_read: addr 0x%x, len %d, saddr 0x%x, len %d\n",
msg2->addr, msg2->len, saddr, msg1->len);
switch (saddr) {
case 0x0008: /* read FW load status */
need_gpio = 1;
break;
case 0x0004: /* read Lock status */
need_gpio = 1;
break;
}
if (need_gpio) {
status =
dev->cx231xx_gpio_i2c_write(dev, msg1->addr,
msg1->buf,
msg1->len);
status =
dev->cx231xx_gpio_i2c_read(dev, msg2->addr,
msg2->buf,
msg2->len);
return status;
}
}
}
/* prepare xfer_data struct */
req_data.dev_addr = msg2->addr;
req_data.direction = msg2->flags;
req_data.saddr_len = msg1->len;
req_data.saddr_dat = saddr;
req_data.buf_size = msg2->len;
req_data.p_buffer = msg2->buf;
/* usb send command */
status = dev->cx231xx_send_usb_command(bus, &req_data);
return status < 0 ? status : 0;
}
/*
* cx231xx_i2c_check_for_device()
* check if there is a i2c_device at the supplied address
*/
static int cx231xx_i2c_check_for_device(struct i2c_adapter *i2c_adap,
const struct i2c_msg *msg)
{
struct cx231xx_i2c *bus = i2c_adap->algo_data;
struct cx231xx *dev = bus->dev;
struct cx231xx_i2c_xfer_data req_data;
int status = 0;
u8 buf[1];
/* prepare xfer_data struct */
req_data.dev_addr = msg->addr;
req_data.direction = I2C_M_RD;
req_data.saddr_len = 0;
req_data.saddr_dat = 0;
req_data.buf_size = 1;
req_data.p_buffer = buf;
/* usb send command */
status = dev->cx231xx_send_usb_command(bus, &req_data);
return status < 0 ? status : 0;
}
/*
* cx231xx_i2c_xfer()
* the main i2c transfer function
*/
static int cx231xx_i2c_xfer(struct i2c_adapter *i2c_adap,
struct i2c_msg msgs[], int num)
{
struct cx231xx_i2c *bus = i2c_adap->algo_data;
struct cx231xx *dev = bus->dev;
int addr, rc, i, byte;
mutex_lock(&dev->i2c_lock);
for (i = 0; i < num; i++) {
addr = msgs[i].addr;
dprintk2(2, "%s %s addr=0x%x len=%d:",
(msgs[i].flags & I2C_M_RD) ? "read" : "write",
i == num - 1 ? "stop" : "nonstop", addr, msgs[i].len);
if (!msgs[i].len) {
/* no len: check only for device presence */
rc = cx231xx_i2c_check_for_device(i2c_adap, &msgs[i]);
if (rc < 0) {
dprintk2(2, " no device\n");
mutex_unlock(&dev->i2c_lock);
return rc;
}
} else if (msgs[i].flags & I2C_M_RD) {
/* read bytes */
rc = cx231xx_i2c_recv_bytes(i2c_adap, &msgs[i]);
if (i2c_debug >= 2) {
for (byte = 0; byte < msgs[i].len; byte++)
printk(KERN_CONT " %02x", msgs[i].buf[byte]);
}
} else if (i + 1 < num && (msgs[i + 1].flags & I2C_M_RD) &&
msgs[i].addr == msgs[i + 1].addr
&& (msgs[i].len <= 2) && (bus->nr < 3)) {
/* write bytes */
if (i2c_debug >= 2) {
for (byte = 0; byte < msgs[i].len; byte++)
printk(KERN_CONT " %02x", msgs[i].buf[byte]);
printk(KERN_CONT "\n");
}
/* read bytes */
dprintk2(2, "plus %s %s addr=0x%x len=%d:",
(msgs[i+1].flags & I2C_M_RD) ? "read" : "write",
i+1 == num - 1 ? "stop" : "nonstop", addr, msgs[i+1].len);
rc = cx231xx_i2c_recv_bytes_with_saddr(i2c_adap,
&msgs[i],
&msgs[i + 1]);
if (i2c_debug >= 2) {
for (byte = 0; byte < msgs[i+1].len; byte++)
printk(KERN_CONT " %02x", msgs[i+1].buf[byte]);
}
i++;
} else {
/* write bytes */
if (i2c_debug >= 2) {
for (byte = 0; byte < msgs[i].len; byte++)
printk(KERN_CONT " %02x", msgs[i].buf[byte]);
}
rc = cx231xx_i2c_send_bytes(i2c_adap, &msgs[i]);
}
if (rc < 0)
goto err;
if (i2c_debug >= 2)
printk(KERN_CONT "\n");
}
mutex_unlock(&dev->i2c_lock);
return num;
err:
dprintk2(2, " ERROR: %i\n", rc);
mutex_unlock(&dev->i2c_lock);
return rc;
}
/* ----------------------------------------------------------- */
/*
* functionality()
*/
static u32 functionality(struct i2c_adapter *adap)
{
return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
}
static const struct i2c_algorithm cx231xx_algo = {
.master_xfer = cx231xx_i2c_xfer,
.functionality = functionality,
};
static const struct i2c_adapter cx231xx_adap_template = {
.owner = THIS_MODULE,
.name = "cx231xx",
.algo = &cx231xx_algo,
};
/* ----------------------------------------------------------- */
/*
* i2c_devs
* incomplete list of known devices
*/
static const char *i2c_devs[128] = {
[0x20 >> 1] = "demod",
[0x60 >> 1] = "colibri",
[0x88 >> 1] = "hammerhead",
[0x8e >> 1] = "CIR",
[0x32 >> 1] = "GeminiIII",
[0x02 >> 1] = "Aquarius",
[0xa0 >> 1] = "eeprom",
[0xc0 >> 1] = "tuner",
[0xc2 >> 1] = "tuner",
};
/*
* cx231xx_do_i2c_scan()
* check i2c address range for devices
*/
void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port)
{
unsigned char buf;
int i, rc;
struct i2c_adapter *adap;
struct i2c_msg msg = {
.flags = I2C_M_RD,
.len = 1,
.buf = &buf,
};
if (!i2c_scan)
return;
/* Don't generate I2C errors during scan */
dev->i2c_scan_running = true;
adap = cx231xx_get_i2c_adap(dev, i2c_port);
for (i = 0; i < 128; i++) {
msg.addr = i;
rc = i2c_transfer(adap, &msg, 1);
if (rc < 0)
continue;
dev_info(dev->dev,
"i2c scan: found device @ port %d addr 0x%x [%s]\n",
i2c_port,
i << 1,
i2c_devs[i] ? i2c_devs[i] : "???");
}
dev->i2c_scan_running = false;
}
/*
* cx231xx_i2c_register()
* register i2c bus
*/
int cx231xx_i2c_register(struct cx231xx_i2c *bus)
{
struct cx231xx *dev = bus->dev;
if (!dev->cx231xx_send_usb_command)
return -EINVAL;
bus->i2c_adap = cx231xx_adap_template;
bus->i2c_adap.dev.parent = dev->dev;
snprintf(bus->i2c_adap.name, sizeof(bus->i2c_adap.name), "%s-%d", bus->dev->name, bus->nr);
bus->i2c_adap.algo_data = bus;
i2c_set_adapdata(&bus->i2c_adap, &dev->v4l2_dev);
bus->i2c_rc = i2c_add_adapter(&bus->i2c_adap);
if (0 != bus->i2c_rc)
dev_warn(dev->dev,
"i2c bus %d register FAILED\n", bus->nr);
return bus->i2c_rc;
}
/*
* cx231xx_i2c_unregister()
* unregister i2c_bus
*/
void cx231xx_i2c_unregister(struct cx231xx_i2c *bus)
{
if (!bus->i2c_rc)
i2c_del_adapter(&bus->i2c_adap);
}
/*
* cx231xx_i2c_mux_select()
* switch i2c master number 1 between port1 and port3
*/
static int cx231xx_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan_id)
{
struct cx231xx *dev = i2c_mux_priv(muxc);
return cx231xx_enable_i2c_port_3(dev, chan_id);
}
int cx231xx_i2c_mux_create(struct cx231xx *dev)
{
dev->muxc = i2c_mux_alloc(&dev->i2c_bus[1].i2c_adap, dev->dev, 2, 0, 0,
cx231xx_i2c_mux_select, NULL);
if (!dev->muxc)
return -ENOMEM;
dev->muxc->priv = dev;
return 0;
}
int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no)
{
return i2c_mux_add_adapter(dev->muxc,
0,
mux_no /* chan_id */,
0 /* class */);
}
void cx231xx_i2c_mux_unregister(struct cx231xx *dev)
{
i2c_mux_del_adapters(dev->muxc);
}
struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port)
{
switch (i2c_port) {
case I2C_0:
return &dev->i2c_bus[0].i2c_adap;
case I2C_1:
return &dev->i2c_bus[1].i2c_adap;
case I2C_2:
return &dev->i2c_bus[2].i2c_adap;
case I2C_1_MUX_1:
return dev->muxc->adapter[0];
case I2C_1_MUX_3:
return dev->muxc->adapter[1];
default:
BUG();
}
}
EXPORT_SYMBOL_GPL(cx231xx_get_i2c_adap);
| linux-master | drivers/media/usb/cx231xx/cx231xx-i2c.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
cx231xx-pcb-config.c - driver for Conexant
Cx23100/101/102 USB video capture devices
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
*/
#include "cx231xx.h"
#include "cx231xx-conf-reg.h"
static unsigned int pcb_debug;
module_param(pcb_debug, int, 0644);
MODULE_PARM_DESC(pcb_debug, "enable pcb config debug messages [video]");
/******************************************************************************/
static struct pcb_config cx231xx_Scenario[] = {
{
INDEX_SELFPOWER_DIGITAL_ONLY, /* index */
USB_SELF_POWER, /* power_type */
0, /* speed , not decide yet */
MOD_DIGITAL, /* mode */
SOURCE_TS_BDA, /* ts1_source, digital tv only */
NOT_SUPPORTED, /* ts2_source */
NOT_SUPPORTED, /* analog source */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
NOT_SUPPORTED, /* AUDIO */
NOT_SUPPORTED, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
,
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
/* full-speed config */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
NOT_SUPPORTED, /* AUDIO */
NOT_SUPPORTED, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_SELFPOWER_DUAL_DIGITAL, /* index */
USB_SELF_POWER, /* power_type */
0, /* speed , not decide yet */
MOD_DIGITAL, /* mode */
SOURCE_TS_BDA, /* ts1_source, digital tv only */
0, /* ts2_source,need update from register */
NOT_SUPPORTED, /* analog source */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
2, /* TS2 index */
NOT_SUPPORTED, /* AUDIO */
NOT_SUPPORTED, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
/* full-speed */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
2, /* TS2 index */
NOT_SUPPORTED, /* AUDIO */
NOT_SUPPORTED, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_SELFPOWER_ANALOG_ONLY, /* index */
USB_SELF_POWER, /* power_type */
0, /* speed , not decide yet */
MOD_ANALOG | MOD_DIF | MOD_EXTERNAL, /* mode ,analog tv only */
NOT_SUPPORTED, /* ts1_source, NOT SUPPORT */
NOT_SUPPORTED, /* ts2_source,NOT SUPPORT */
0, /* analog source, need update */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
NOT_SUPPORTED, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
1, /* AUDIO */
2, /* VIDEO */
3, /* VANC */
4, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
/* full-speed */
{
{
0, /* config index */
{
0, /* interrupt ep index */
NOT_SUPPORTED, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
1, /* AUDIO */
2, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_SELFPOWER_DUAL, /* index */
USB_SELF_POWER, /* power_type */
0, /* speed , not decide yet */
/* mode ,analog tv and digital path */
MOD_ANALOG | MOD_DIF | MOD_DIGITAL | MOD_EXTERNAL,
0, /* ts1_source,will update in register */
NOT_SUPPORTED, /* ts2_source,NOT SUPPORT */
0, /* analog source need update */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
2, /* AUDIO */
3, /* VIDEO */
4, /* VANC */
5, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
/* full-speed */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
2, /* AUDIO */
3, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_SELFPOWER_TRIPLE, /* index */
USB_SELF_POWER, /* power_type */
0, /* speed , not decide yet */
/* mode ,analog tv and digital path */
MOD_ANALOG | MOD_DIF | MOD_DIGITAL | MOD_EXTERNAL,
0, /* ts1_source, update in register */
0, /* ts2_source,update in register */
0, /* analog source, need update */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
2, /* TS2 index */
3, /* AUDIO */
4, /* VIDEO */
5, /* VANC */
6, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
/* full-speed */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
2, /* TS2 index */
3, /* AUDIO */
4, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_SELFPOWER_COMPRESSOR, /* index */
USB_SELF_POWER, /* power_type */
0, /* speed , not decide yet */
/* mode ,analog tv AND DIGITAL path */
MOD_ANALOG | MOD_DIF | MOD_DIGITAL | MOD_EXTERNAL,
NOT_SUPPORTED, /* ts1_source, disable */
SOURCE_TS_BDA, /* ts2_source */
0, /* analog source,need update */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
NOT_SUPPORTED, /* ts1 index */
1, /* TS2 index */
2, /* AUDIO */
3, /* VIDEO */
4, /* VANC */
5, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
/* full-speed */
{
{
0, /* config index */
{
0, /* interrupt ep index */
NOT_SUPPORTED, /* ts1 index */
1, /* TS2 index */
2, /* AUDIO */
3, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_BUSPOWER_DIGITAL_ONLY, /* index */
USB_BUS_POWER, /* power_type */
0, /* speed , not decide yet */
MOD_DIGITAL, /* mode ,analog tv AND DIGITAL path */
SOURCE_TS_BDA, /* ts1_source, disable */
NOT_SUPPORTED, /* ts2_source */
NOT_SUPPORTED, /* analog source */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index = 2 */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
NOT_SUPPORTED, /* AUDIO */
NOT_SUPPORTED, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
/* full-speed */
{
{
0, /* config index */
{
0, /* interrupt ep index = 2 */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
NOT_SUPPORTED, /* AUDIO */
NOT_SUPPORTED, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_BUSPOWER_ANALOG_ONLY, /* index */
USB_BUS_POWER, /* power_type */
0, /* speed , not decide yet */
MOD_ANALOG, /* mode ,analog tv AND DIGITAL path */
NOT_SUPPORTED, /* ts1_source, disable */
NOT_SUPPORTED, /* ts2_source */
SOURCE_ANALOG, /* analog source--analog */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
NOT_SUPPORTED, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
1, /* AUDIO */
2, /* VIDEO */
3, /* VANC */
4, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
{ /* full-speed */
{
0, /* config index */
{
0, /* interrupt ep index */
NOT_SUPPORTED, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
1, /* AUDIO */
2, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
{
INDEX_BUSPOWER_DIF_ONLY, /* index */
USB_BUS_POWER, /* power_type */
0, /* speed , not decide yet */
/* mode ,analog tv AND DIGITAL path */
MOD_DIF | MOD_ANALOG | MOD_DIGITAL | MOD_EXTERNAL,
SOURCE_TS_BDA, /* ts1_source, disable */
NOT_SUPPORTED, /* ts2_source */
SOURCE_DIF | SOURCE_ANALOG | SOURCE_EXTERNAL, /* analog source, dif */
0, /* digital_index */
0, /* analog index */
0, /* dif_index */
0, /* external_index */
1, /* only one configuration */
{
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
2, /* AUDIO */
3, /* VIDEO */
4, /* VANC */
5, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
,
{ /* full speed */
{
0, /* config index */
{
0, /* interrupt ep index */
1, /* ts1 index */
NOT_SUPPORTED, /* TS2 index */
2, /* AUDIO */
3, /* VIDEO */
NOT_SUPPORTED, /* VANC */
NOT_SUPPORTED, /* HANC */
NOT_SUPPORTED /* ir_index */
}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
,
{NOT_SUPPORTED, {NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED, NOT_SUPPORTED, NOT_SUPPORTED,
NOT_SUPPORTED}
}
}
}
,
};
/*****************************************************************/
int initialize_cx231xx(struct cx231xx *dev)
{
int retval;
u32 config_info = 0;
struct pcb_config *p_pcb_info;
u8 usb_speed = 1; /* from register,1--HS, 0--FS */
u8 data[4] = { 0, 0, 0, 0 };
u32 ts1_source = 0;
u32 ts2_source = 0;
u32 analog_source = 0;
u8 _current_scenario_idx = 0xff;
ts1_source = SOURCE_TS_BDA;
ts2_source = SOURCE_TS_BDA;
/* read board config register to find out which
pcb config it is related to */
retval = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,
data, 4);
if (retval < 0)
return retval;
config_info = le32_to_cpu(*((__le32 *)data));
usb_speed = (u8) (config_info & 0x1);
/* Verify this device belongs to Bus power or Self power device */
if (config_info & BUS_POWER) { /* bus-power */
switch (config_info & BUSPOWER_MASK) {
case TS1_PORT | BUS_POWER:
cx231xx_Scenario[INDEX_BUSPOWER_DIGITAL_ONLY].speed =
usb_speed;
p_pcb_info =
&cx231xx_Scenario[INDEX_BUSPOWER_DIGITAL_ONLY];
_current_scenario_idx = INDEX_BUSPOWER_DIGITAL_ONLY;
break;
case AVDEC_ENABLE | BUS_POWER:
cx231xx_Scenario[INDEX_BUSPOWER_ANALOG_ONLY].speed =
usb_speed;
p_pcb_info =
&cx231xx_Scenario[INDEX_BUSPOWER_ANALOG_ONLY];
_current_scenario_idx = INDEX_BUSPOWER_ANALOG_ONLY;
break;
case AVDEC_ENABLE | BUS_POWER | TS1_PORT:
cx231xx_Scenario[INDEX_BUSPOWER_DIF_ONLY].speed =
usb_speed;
p_pcb_info = &cx231xx_Scenario[INDEX_BUSPOWER_DIF_ONLY];
_current_scenario_idx = INDEX_BUSPOWER_DIF_ONLY;
break;
default:
dev_err(dev->dev,
"bad config in buspower!!!!\nconfig_info=%x\n",
config_info & BUSPOWER_MASK);
return 1;
}
} else { /* self-power */
switch (config_info & SELFPOWER_MASK) {
case TS1_PORT | SELF_POWER:
cx231xx_Scenario[INDEX_SELFPOWER_DIGITAL_ONLY].speed =
usb_speed;
p_pcb_info =
&cx231xx_Scenario[INDEX_SELFPOWER_DIGITAL_ONLY];
_current_scenario_idx = INDEX_SELFPOWER_DIGITAL_ONLY;
break;
case TS1_TS2_PORT | SELF_POWER:
cx231xx_Scenario[INDEX_SELFPOWER_DUAL_DIGITAL].speed =
usb_speed;
cx231xx_Scenario[INDEX_SELFPOWER_DUAL_DIGITAL].
ts2_source = ts2_source;
p_pcb_info =
&cx231xx_Scenario[INDEX_SELFPOWER_DUAL_DIGITAL];
_current_scenario_idx = INDEX_SELFPOWER_DUAL_DIGITAL;
break;
case AVDEC_ENABLE | SELF_POWER:
cx231xx_Scenario[INDEX_SELFPOWER_ANALOG_ONLY].speed =
usb_speed;
cx231xx_Scenario[INDEX_SELFPOWER_ANALOG_ONLY].
analog_source = analog_source;
p_pcb_info =
&cx231xx_Scenario[INDEX_SELFPOWER_ANALOG_ONLY];
_current_scenario_idx = INDEX_SELFPOWER_ANALOG_ONLY;
break;
case AVDEC_ENABLE | TS1_PORT | SELF_POWER:
cx231xx_Scenario[INDEX_SELFPOWER_DUAL].speed =
usb_speed;
cx231xx_Scenario[INDEX_SELFPOWER_DUAL].ts1_source =
ts1_source;
cx231xx_Scenario[INDEX_SELFPOWER_DUAL].analog_source =
analog_source;
p_pcb_info = &cx231xx_Scenario[INDEX_SELFPOWER_DUAL];
_current_scenario_idx = INDEX_SELFPOWER_DUAL;
break;
case AVDEC_ENABLE | TS1_TS2_PORT | SELF_POWER:
cx231xx_Scenario[INDEX_SELFPOWER_TRIPLE].speed =
usb_speed;
cx231xx_Scenario[INDEX_SELFPOWER_TRIPLE].ts1_source =
ts1_source;
cx231xx_Scenario[INDEX_SELFPOWER_TRIPLE].ts2_source =
ts2_source;
cx231xx_Scenario[INDEX_SELFPOWER_TRIPLE].analog_source =
analog_source;
p_pcb_info = &cx231xx_Scenario[INDEX_SELFPOWER_TRIPLE];
_current_scenario_idx = INDEX_SELFPOWER_TRIPLE;
break;
case AVDEC_ENABLE | TS1VIP_TS2_PORT | SELF_POWER:
cx231xx_Scenario[INDEX_SELFPOWER_COMPRESSOR].speed =
usb_speed;
cx231xx_Scenario[INDEX_SELFPOWER_COMPRESSOR].
analog_source = analog_source;
p_pcb_info =
&cx231xx_Scenario[INDEX_SELFPOWER_COMPRESSOR];
_current_scenario_idx = INDEX_SELFPOWER_COMPRESSOR;
break;
default:
dev_err(dev->dev,
"bad scenario!!!!!\nconfig_info=%x\n",
config_info & SELFPOWER_MASK);
return -ENODEV;
}
}
dev->current_scenario_idx = _current_scenario_idx;
memcpy(&dev->current_pcb_config, p_pcb_info,
sizeof(struct pcb_config));
if (pcb_debug) {
dev_info(dev->dev,
"SC(0x00) register = 0x%x\n", config_info);
dev_info(dev->dev,
"scenario %d\n",
(dev->current_pcb_config.index) + 1);
dev_info(dev->dev,
"type=%x\n",
dev->current_pcb_config.type);
dev_info(dev->dev,
"mode=%x\n",
dev->current_pcb_config.mode);
dev_info(dev->dev,
"speed=%x\n",
dev->current_pcb_config.speed);
dev_info(dev->dev,
"ts1_source=%x\n",
dev->current_pcb_config.ts1_source);
dev_info(dev->dev,
"ts2_source=%x\n",
dev->current_pcb_config.ts2_source);
dev_info(dev->dev,
"analog_source=%x\n",
dev->current_pcb_config.analog_source);
}
return 0;
}
| linux-master | drivers/media/usb/cx231xx/cx231xx-pcb-cfg.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
cx231xx_vbi.c - driver for Conexant Cx23100/101/102 USB video capture devices
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
Based on cx88 driver
*/
#include "cx231xx.h"
#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/bitmap.h>
#include <linux/i2c.h>
#include <linux/mm.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include <media/drv-intf/msp3400.h>
#include <media/tuner.h>
#include "cx231xx-vbi.h"
static inline void print_err_status(struct cx231xx *dev, int packet, int status)
{
char *errmsg = "Unknown";
switch (status) {
case -ENOENT:
errmsg = "unlinked synchronously";
break;
case -ECONNRESET:
errmsg = "unlinked asynchronously";
break;
case -ENOSR:
errmsg = "Buffer error (overrun)";
break;
case -EPIPE:
errmsg = "Stalled (device not responding)";
break;
case -EOVERFLOW:
errmsg = "Babble (bad cable?)";
break;
case -EPROTO:
errmsg = "Bit-stuff error (bad cable?)";
break;
case -EILSEQ:
errmsg = "CRC/Timeout (could be anything)";
break;
case -ETIME:
errmsg = "Device does not respond";
break;
}
if (packet < 0) {
dev_err(dev->dev,
"URB status %d [%s].\n", status, errmsg);
} else {
dev_err(dev->dev,
"URB packet %d, status %d [%s].\n",
packet, status, errmsg);
}
}
/*
* Controls the isoc copy of each urb packet
*/
static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
int rc = 1;
unsigned char *p_buffer;
u32 bytes_parsed = 0, buffer_size = 0;
u8 sav_eav = 0;
if (!dev)
return 0;
if (dev->state & DEV_DISCONNECTED)
return 0;
if (urb->status < 0) {
print_err_status(dev, -1, urb->status);
if (urb->status == -ENOENT)
return 0;
}
/* get buffer pointer and length */
p_buffer = urb->transfer_buffer;
buffer_size = urb->actual_length;
if (buffer_size > 0) {
bytes_parsed = 0;
if (dma_q->is_partial_line) {
/* Handle the case where we were working on a partial
line */
sav_eav = dma_q->last_sav;
} else {
/* Check for a SAV/EAV overlapping the
buffer boundary */
sav_eav = cx231xx_find_boundary_SAV_EAV(p_buffer,
dma_q->partial_buf,
&bytes_parsed);
}
sav_eav &= 0xF0;
/* Get the first line if we have some portion of an SAV/EAV from
the last buffer or a partial line */
if (sav_eav) {
bytes_parsed += cx231xx_get_vbi_line(dev, dma_q,
sav_eav, /* SAV/EAV */
p_buffer + bytes_parsed, /* p_buffer */
buffer_size - bytes_parsed); /* buffer size */
}
/* Now parse data that is completely in this buffer */
dma_q->is_partial_line = 0;
while (bytes_parsed < buffer_size) {
u32 bytes_used = 0;
sav_eav = cx231xx_find_next_SAV_EAV(
p_buffer + bytes_parsed, /* p_buffer */
buffer_size - bytes_parsed, /* buffer size */
&bytes_used); /* bytes used to get SAV/EAV */
bytes_parsed += bytes_used;
sav_eav &= 0xF0;
if (sav_eav && (bytes_parsed < buffer_size)) {
bytes_parsed += cx231xx_get_vbi_line(dev,
dma_q, sav_eav, /* SAV/EAV */
p_buffer+bytes_parsed, /* p_buffer */
buffer_size-bytes_parsed);/*buf size*/
}
}
/* Save the last four bytes of the buffer so we can
check the buffer boundary condition next time */
memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
bytes_parsed = 0;
}
return rc;
}
/* ------------------------------------------------------------------
Vbi buf operations
------------------------------------------------------------------*/
static int vbi_queue_setup(struct vb2_queue *vq,
unsigned int *nbuffers, unsigned int *nplanes,
unsigned int sizes[], struct device *alloc_devs[])
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
u32 height = 0;
height = ((dev->norm & V4L2_STD_625_50) ?
PAL_VBI_LINES : NTSC_VBI_LINES);
*nplanes = 1;
sizes[0] = (dev->width * height * 2 * 2);
return 0;
}
/* This is called *without* dev->slock held; please keep it that way */
static int vbi_buf_prepare(struct vb2_buffer *vb)
{
struct cx231xx *dev = vb2_get_drv_priv(vb->vb2_queue);
u32 height = 0;
u32 size;
height = ((dev->norm & V4L2_STD_625_50) ?
PAL_VBI_LINES : NTSC_VBI_LINES);
size = ((dev->width << 1) * height * 2);
if (vb2_plane_size(vb, 0) < size)
return -EINVAL;
vb2_set_plane_payload(vb, 0, size);
return 0;
}
static void vbi_buf_queue(struct vb2_buffer *vb)
{
struct cx231xx *dev = vb2_get_drv_priv(vb->vb2_queue);
struct cx231xx_buffer *buf =
container_of(vb, struct cx231xx_buffer, vb.vb2_buf);
struct cx231xx_dmaqueue *vidq = &dev->vbi_mode.vidq;
unsigned long flags;
spin_lock_irqsave(&dev->vbi_mode.slock, flags);
list_add_tail(&buf->list, &vidq->active);
spin_unlock_irqrestore(&dev->vbi_mode.slock, flags);
}
static void return_all_buffers(struct cx231xx *dev,
enum vb2_buffer_state state)
{
struct cx231xx_dmaqueue *vidq = &dev->vbi_mode.vidq;
struct cx231xx_buffer *buf, *node;
unsigned long flags;
spin_lock_irqsave(&dev->vbi_mode.slock, flags);
dev->vbi_mode.bulk_ctl.buf = NULL;
list_for_each_entry_safe(buf, node, &vidq->active, list) {
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, state);
}
spin_unlock_irqrestore(&dev->vbi_mode.slock, flags);
}
static int vbi_start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
struct cx231xx_dmaqueue *vidq = &dev->vbi_mode.vidq;
int ret;
vidq->sequence = 0;
ret = cx231xx_init_vbi_isoc(dev, CX231XX_NUM_VBI_PACKETS,
CX231XX_NUM_VBI_BUFS,
dev->vbi_mode.alt_max_pkt_size[0],
cx231xx_isoc_vbi_copy);
if (ret)
return_all_buffers(dev, VB2_BUF_STATE_QUEUED);
return ret;
}
static void vbi_stop_streaming(struct vb2_queue *vq)
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
return_all_buffers(dev, VB2_BUF_STATE_ERROR);
}
struct vb2_ops cx231xx_vbi_qops = {
.queue_setup = vbi_queue_setup,
.buf_prepare = vbi_buf_prepare,
.buf_queue = vbi_buf_queue,
.start_streaming = vbi_start_streaming,
.stop_streaming = vbi_stop_streaming,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
};
/* ------------------------------------------------------------------
URB control
------------------------------------------------------------------*/
/*
* IRQ callback, called by URB callback
*/
static void cx231xx_irq_vbi_callback(struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
struct cx231xx_video_mode *vmode =
container_of(dma_q, struct cx231xx_video_mode, vidq);
struct cx231xx *dev = container_of(vmode, struct cx231xx, vbi_mode);
unsigned long flags;
switch (urb->status) {
case 0: /* success */
case -ETIMEDOUT: /* NAK */
break;
case -ECONNRESET: /* kill */
case -ENOENT:
case -ESHUTDOWN:
return;
default: /* error */
dev_err(dev->dev,
"urb completion error %d.\n", urb->status);
break;
}
/* Copy data from URB */
spin_lock_irqsave(&dev->vbi_mode.slock, flags);
dev->vbi_mode.bulk_ctl.bulk_copy(dev, urb);
spin_unlock_irqrestore(&dev->vbi_mode.slock, flags);
/* Reset status */
urb->status = 0;
urb->status = usb_submit_urb(urb, GFP_ATOMIC);
if (urb->status) {
dev_err(dev->dev, "urb resubmit failed (error=%i)\n",
urb->status);
}
}
/*
* Stop and Deallocate URBs
*/
void cx231xx_uninit_vbi_isoc(struct cx231xx *dev)
{
struct urb *urb;
int i;
dev_dbg(dev->dev, "called cx231xx_uninit_vbi_isoc\n");
dev->vbi_mode.bulk_ctl.nfields = -1;
for (i = 0; i < dev->vbi_mode.bulk_ctl.num_bufs; i++) {
urb = dev->vbi_mode.bulk_ctl.urb[i];
if (urb) {
if (!irqs_disabled())
usb_kill_urb(urb);
else
usb_unlink_urb(urb);
if (dev->vbi_mode.bulk_ctl.transfer_buffer[i]) {
kfree(dev->vbi_mode.bulk_ctl.
transfer_buffer[i]);
dev->vbi_mode.bulk_ctl.transfer_buffer[i] =
NULL;
}
usb_free_urb(urb);
dev->vbi_mode.bulk_ctl.urb[i] = NULL;
}
dev->vbi_mode.bulk_ctl.transfer_buffer[i] = NULL;
}
kfree(dev->vbi_mode.bulk_ctl.urb);
kfree(dev->vbi_mode.bulk_ctl.transfer_buffer);
dev->vbi_mode.bulk_ctl.urb = NULL;
dev->vbi_mode.bulk_ctl.transfer_buffer = NULL;
dev->vbi_mode.bulk_ctl.num_bufs = 0;
cx231xx_capture_start(dev, 0, Vbi);
}
EXPORT_SYMBOL_GPL(cx231xx_uninit_vbi_isoc);
/*
* Allocate URBs and start IRQ
*/
int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets,
int num_bufs, int max_pkt_size,
int (*bulk_copy) (struct cx231xx *dev,
struct urb *urb))
{
struct cx231xx_dmaqueue *dma_q = &dev->vbi_mode.vidq;
int i;
int sb_size, pipe;
struct urb *urb;
int rc;
dev_dbg(dev->dev, "called cx231xx_vbi_isoc\n");
/* De-allocates all pending stuff */
cx231xx_uninit_vbi_isoc(dev);
/* clear if any halt */
usb_clear_halt(dev->udev,
usb_rcvbulkpipe(dev->udev,
dev->vbi_mode.end_point_addr));
dev->vbi_mode.bulk_ctl.bulk_copy = bulk_copy;
dev->vbi_mode.bulk_ctl.num_bufs = num_bufs;
dma_q->pos = 0;
dma_q->is_partial_line = 0;
dma_q->last_sav = 0;
dma_q->current_field = -1;
dma_q->bytes_left_in_line = dev->width << 1;
dma_q->lines_per_field = ((dev->norm & V4L2_STD_625_50) ?
PAL_VBI_LINES : NTSC_VBI_LINES);
dma_q->lines_completed = 0;
for (i = 0; i < 8; i++)
dma_q->partial_buf[i] = 0;
dev->vbi_mode.bulk_ctl.urb = kcalloc(num_bufs, sizeof(void *),
GFP_KERNEL);
if (!dev->vbi_mode.bulk_ctl.urb) {
dev_err(dev->dev,
"cannot alloc memory for usb buffers\n");
return -ENOMEM;
}
dev->vbi_mode.bulk_ctl.transfer_buffer =
kcalloc(num_bufs, sizeof(void *), GFP_KERNEL);
if (!dev->vbi_mode.bulk_ctl.transfer_buffer) {
dev_err(dev->dev,
"cannot allocate memory for usbtransfer\n");
kfree(dev->vbi_mode.bulk_ctl.urb);
return -ENOMEM;
}
dev->vbi_mode.bulk_ctl.max_pkt_size = max_pkt_size;
dev->vbi_mode.bulk_ctl.buf = NULL;
sb_size = max_packets * dev->vbi_mode.bulk_ctl.max_pkt_size;
/* allocate urbs and transfer buffers */
for (i = 0; i < dev->vbi_mode.bulk_ctl.num_bufs; i++) {
urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb) {
cx231xx_uninit_vbi_isoc(dev);
return -ENOMEM;
}
dev->vbi_mode.bulk_ctl.urb[i] = urb;
urb->transfer_flags = 0;
dev->vbi_mode.bulk_ctl.transfer_buffer[i] =
kzalloc(sb_size, GFP_KERNEL);
if (!dev->vbi_mode.bulk_ctl.transfer_buffer[i]) {
dev_err(dev->dev,
"unable to allocate %i bytes for transfer buffer %i\n",
sb_size, i);
cx231xx_uninit_vbi_isoc(dev);
return -ENOMEM;
}
pipe = usb_rcvbulkpipe(dev->udev, dev->vbi_mode.end_point_addr);
usb_fill_bulk_urb(urb, dev->udev, pipe,
dev->vbi_mode.bulk_ctl.transfer_buffer[i],
sb_size, cx231xx_irq_vbi_callback, dma_q);
}
init_waitqueue_head(&dma_q->wq);
/* submit urbs and enables IRQ */
for (i = 0; i < dev->vbi_mode.bulk_ctl.num_bufs; i++) {
rc = usb_submit_urb(dev->vbi_mode.bulk_ctl.urb[i], GFP_ATOMIC);
if (rc) {
dev_err(dev->dev,
"submit of urb %i failed (error=%i)\n", i, rc);
cx231xx_uninit_vbi_isoc(dev);
return rc;
}
}
cx231xx_capture_start(dev, 1, Vbi);
return 0;
}
EXPORT_SYMBOL_GPL(cx231xx_init_vbi_isoc);
u32 cx231xx_get_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
u8 sav_eav, u8 *p_buffer, u32 buffer_size)
{
u32 bytes_copied = 0;
int current_field = -1;
switch (sav_eav) {
case SAV_VBI_FIELD1:
current_field = 1;
break;
case SAV_VBI_FIELD2:
current_field = 2;
break;
default:
break;
}
if (current_field < 0)
return bytes_copied;
dma_q->last_sav = sav_eav;
bytes_copied =
cx231xx_copy_vbi_line(dev, dma_q, p_buffer, buffer_size,
current_field);
return bytes_copied;
}
/*
* Announces that a buffer were filled and request the next
*/
static inline void vbi_buffer_filled(struct cx231xx *dev,
struct cx231xx_dmaqueue *dma_q,
struct cx231xx_buffer *buf)
{
/* Advice that buffer was filled */
/* dev_dbg(dev->dev, "[%p/%d] wakeup\n", buf, buf->vb.index); */
buf->vb.sequence = dma_q->sequence++;
buf->vb.vb2_buf.timestamp = ktime_get_ns();
dev->vbi_mode.bulk_ctl.buf = NULL;
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
}
u32 cx231xx_copy_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
u8 *p_line, u32 length, int field_number)
{
u32 bytes_to_copy;
struct cx231xx_buffer *buf;
u32 _line_size = dev->width * 2;
if (dma_q->current_field == -1) {
/* Just starting up */
cx231xx_reset_vbi_buffer(dev, dma_q);
}
if (dma_q->current_field != field_number)
dma_q->lines_completed = 0;
/* get the buffer pointer */
buf = dev->vbi_mode.bulk_ctl.buf;
/* Remember the field number for next time */
dma_q->current_field = field_number;
bytes_to_copy = dma_q->bytes_left_in_line;
if (bytes_to_copy > length)
bytes_to_copy = length;
if (dma_q->lines_completed >= dma_q->lines_per_field) {
dma_q->bytes_left_in_line -= bytes_to_copy;
dma_q->is_partial_line =
(dma_q->bytes_left_in_line == 0) ? 0 : 1;
return 0;
}
dma_q->is_partial_line = 1;
/* If we don't have a buffer, just return the number of bytes we would
have copied if we had a buffer. */
if (!buf) {
dma_q->bytes_left_in_line -= bytes_to_copy;
dma_q->is_partial_line =
(dma_q->bytes_left_in_line == 0) ? 0 : 1;
return bytes_to_copy;
}
/* copy the data to video buffer */
cx231xx_do_vbi_copy(dev, dma_q, p_line, bytes_to_copy);
dma_q->pos += bytes_to_copy;
dma_q->bytes_left_in_line -= bytes_to_copy;
if (dma_q->bytes_left_in_line == 0) {
dma_q->bytes_left_in_line = _line_size;
dma_q->lines_completed++;
dma_q->is_partial_line = 0;
if (cx231xx_is_vbi_buffer_done(dev, dma_q) && buf) {
vbi_buffer_filled(dev, dma_q, buf);
dma_q->pos = 0;
dma_q->lines_completed = 0;
cx231xx_reset_vbi_buffer(dev, dma_q);
}
}
return bytes_to_copy;
}
/*
* generic routine to get the next available buffer
*/
static inline void get_next_vbi_buf(struct cx231xx_dmaqueue *dma_q,
struct cx231xx_buffer **buf)
{
struct cx231xx_video_mode *vmode =
container_of(dma_q, struct cx231xx_video_mode, vidq);
struct cx231xx *dev = container_of(vmode, struct cx231xx, vbi_mode);
char *outp;
if (list_empty(&dma_q->active)) {
dev_err(dev->dev, "No active queue to serve\n");
dev->vbi_mode.bulk_ctl.buf = NULL;
*buf = NULL;
return;
}
/* Get the next buffer */
*buf = list_entry(dma_q->active.next, struct cx231xx_buffer, list);
/* Cleans up buffer - Useful for testing for frame/URB loss */
outp = vb2_plane_vaddr(&(*buf)->vb.vb2_buf, 0);
memset(outp, 0, vb2_plane_size(&(*buf)->vb.vb2_buf, 0));
dev->vbi_mode.bulk_ctl.buf = *buf;
return;
}
void cx231xx_reset_vbi_buffer(struct cx231xx *dev,
struct cx231xx_dmaqueue *dma_q)
{
struct cx231xx_buffer *buf;
buf = dev->vbi_mode.bulk_ctl.buf;
if (buf == NULL) {
/* first try to get the buffer */
get_next_vbi_buf(dma_q, &buf);
dma_q->pos = 0;
dma_q->current_field = -1;
}
dma_q->bytes_left_in_line = dev->width << 1;
dma_q->lines_completed = 0;
}
int cx231xx_do_vbi_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
u8 *p_buffer, u32 bytes_to_copy)
{
u8 *p_out_buffer = NULL;
u32 current_line_bytes_copied = 0;
struct cx231xx_buffer *buf;
u32 _line_size = dev->width << 1;
void *startwrite;
int offset, lencopy;
buf = dev->vbi_mode.bulk_ctl.buf;
if (buf == NULL)
return -EINVAL;
p_out_buffer = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
if (dma_q->bytes_left_in_line != _line_size) {
current_line_bytes_copied =
_line_size - dma_q->bytes_left_in_line;
}
offset = (dma_q->lines_completed * _line_size) +
current_line_bytes_copied;
if (dma_q->current_field == 2) {
/* Populate the second half of the frame */
offset += (dev->width * 2 * dma_q->lines_per_field);
}
/* prepare destination address */
startwrite = p_out_buffer + offset;
lencopy = dma_q->bytes_left_in_line > bytes_to_copy ?
bytes_to_copy : dma_q->bytes_left_in_line;
memcpy(startwrite, p_buffer, lencopy);
return 0;
}
u8 cx231xx_is_vbi_buffer_done(struct cx231xx *dev,
struct cx231xx_dmaqueue *dma_q)
{
u32 height = 0;
height = ((dev->norm & V4L2_STD_625_50) ?
PAL_VBI_LINES : NTSC_VBI_LINES);
if (dma_q->lines_completed == height && dma_q->current_field == 2)
return 1;
else
return 0;
}
| linux-master | drivers/media/usb/cx231xx/cx231xx-vbi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
cx231xx-cards.c - driver for Conexant Cx23100/101/102
USB video capture devices
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
Based on em28xx driver
*/
#include "cx231xx.h"
#include <linux/init.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <media/tuner.h>
#include <media/tveeprom.h>
#include <media/v4l2-common.h>
#include <media/drv-intf/cx25840.h>
#include <media/dvb-usb-ids.h>
#include "xc5000.h"
#include "tda18271.h"
static int tuner = -1;
module_param(tuner, int, 0444);
MODULE_PARM_DESC(tuner, "tuner type");
static int transfer_mode = 1;
module_param(transfer_mode, int, 0444);
MODULE_PARM_DESC(transfer_mode, "transfer mode (1-ISO or 0-BULK)");
static unsigned int disable_ir;
module_param(disable_ir, int, 0444);
MODULE_PARM_DESC(disable_ir, "disable infrared remote support");
/* Bitmask marking allocated devices from 0 to CX231XX_MAXBOARDS */
static unsigned long cx231xx_devused;
/*
* Reset sequences for analog/digital modes
*/
static struct cx231xx_reg_seq RDE250_XCV_TUNER[] = {
{0x03, 0x01, 10},
{0x03, 0x00, 30},
{0x03, 0x01, 10},
{-1, -1, -1},
};
/*
* Board definitions
*/
struct cx231xx_board cx231xx_boards[] = {
[CX231XX_BOARD_UNKNOWN] = {
.name = "Unknown CX231xx video grabber",
.tuner_type = TUNER_ABSENT,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_CNXT_CARRAERA] = {
.name = "Conexant Hybrid TV - CARRAERA",
.tuner_type = TUNER_XC5000,
.tuner_addr = 0x61,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x02,
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_CNXT_SHELBY] = {
.name = "Conexant Hybrid TV - SHELBY",
.tuner_type = TUNER_XC5000,
.tuner_addr = 0x61,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x32,
.norm = V4L2_STD_NTSC,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_CNXT_RDE_253S] = {
.name = "Conexant Hybrid TV - RDE253S",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x1c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x02,
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_CNXT_RDU_253S] = {
.name = "Conexant Hybrid TV - RDU253S",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x1c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x02,
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_CNXT_VIDEO_GRABBER] = {
.name = "Conexant VIDEO GRABBER",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x1c,
.gpio_pin_status_mask = 0x4001000,
.norm = V4L2_STD_PAL,
.no_alt_vanc = 1,
.external_av = 1,
/* Actually, it has a 417, but it isn't working correctly.
* So set to 0 for now until someone can manage to get this
* to work reliably. */
.has_417 = 0,
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_CNXT_RDE_250] = {
.name = "Conexant Hybrid TV - rde 250",
.tuner_type = TUNER_XC5000,
.tuner_addr = 0x61,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x02,
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_CNXT_RDU_250] = {
.name = "Conexant Hybrid TV - RDU 250",
.tuner_type = TUNER_XC5000,
.tuner_addr = 0x61,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x32,
.norm = V4L2_STD_NTSC,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_HAUPPAUGE_EXETER] = {
.name = "Hauppauge EXETER",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_1,
.demod_i2c_master = I2C_1_MUX_1,
.has_dvb = 1,
.demod_addr = 0x0e,
.norm = V4L2_STD_NTSC,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_HAUPPAUGE_USBLIVE2] = {
.name = "Hauppauge USB Live 2",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.norm = V4L2_STD_NTSC,
.no_alt_vanc = 1,
.external_av = 1,
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_KWORLD_UB430_USB_HYBRID] = {
.name = "Kworld UB430 USB Hybrid",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x11, /* According with PV cxPolaris.inf file */
.tuner_sif_gpio = -1,
.tuner_scl_gpio = -1,
.tuner_sda_gpio = -1,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_2,
.demod_i2c_master = I2C_1_MUX_3,
.ir_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x10,
.norm = V4L2_STD_PAL_M,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_KWORLD_UB445_USB_HYBRID] = {
.name = "Kworld UB445 USB Hybrid",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x11, /* According with PV cxPolaris.inf file */
.tuner_sif_gpio = -1,
.tuner_scl_gpio = -1,
.tuner_sda_gpio = -1,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_2,
.demod_i2c_master = I2C_1_MUX_3,
.ir_i2c_master = I2C_2,
.has_dvb = 1,
.demod_addr = 0x10,
.norm = V4L2_STD_NTSC_M,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_PV_PLAYTV_USB_HYBRID] = {
.name = "Pixelview PlayTV USB Hybrid",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x1c,
.tuner_sif_gpio = -1,
.tuner_scl_gpio = -1,
.tuner_sda_gpio = -1,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_2,
.demod_i2c_master = I2C_1_MUX_3,
.ir_i2c_master = I2C_2,
.rc_map_name = RC_MAP_PIXELVIEW_002T,
.has_dvb = 1,
.demod_addr = 0x10,
.norm = V4L2_STD_PAL_M,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_PV_XCAPTURE_USB] = {
.name = "Pixelview Xcapture USB",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.norm = V4L2_STD_NTSC,
.no_alt_vanc = 1,
.external_av = 1,
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_ICONBIT_U100] = {
.name = "Iconbit Analog Stick U100 FM",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x1C,
.gpio_pin_status_mask = 0x4001000,
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL] = {
.name = "Hauppauge WinTV USB2 FM (PAL)",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC] = {
.name = "Hauppauge WinTV USB2 FM (NTSC)",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.norm = V4L2_STD_NTSC,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2] = {
.name = "Elgato Video Capture V2",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.norm = V4L2_STD_NTSC,
.no_alt_vanc = 1,
.external_av = 1,
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_OTG102] = {
.name = "Geniatech OTG102",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
/* According with PV CxPlrCAP.inf file */
.gpio_pin_status_mask = 0x4001000,
.norm = V4L2_STD_NTSC,
.no_alt_vanc = 1,
.external_av = 1,
/*.has_417 = 1, */
/* This board is believed to have a hardware encoding chip
* supporting mpeg1/2/4, but as the 417 is apparently not
* working for the reference board it is not here either. */
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}
},
},
[CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx] = {
.name = "Hauppauge WinTV 930C-HD (1113xx) / HVR-900H (111xxx) / PCTV QuatroStick 521e",
.tuner_type = TUNER_NXP_TDA18271,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_1_MUX_3,
.has_dvb = 1,
.demod_addr = 0x64, /* 0xc8 >> 1 */
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx] = {
.name = "Hauppauge WinTV 930C-HD (1114xx) / HVR-901H (1114xx) / PCTV QuatroStick 522e",
.tuner_type = TUNER_ABSENT,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_1_MUX_3,
.has_dvb = 1,
.demod_addr = 0x64, /* 0xc8 >> 1 */
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_HAUPPAUGE_955Q] = {
.name = "Hauppauge WinTV-HVR-955Q (111401)",
.tuner_type = TUNER_ABSENT,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_1_MUX_3,
.has_dvb = 1,
.demod_addr = 0x59, /* 0xb2 >> 1 */
.norm = V4L2_STD_NTSC,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_TERRATEC_GRABBY] = {
.name = "Terratec Grabby",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.norm = V4L2_STD_PAL,
.no_alt_vanc = 1,
.external_av = 1,
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD] = {
.name = "Evromedia USB Full Hybrid Full HD",
.tuner_type = TUNER_ABSENT,
.demod_addr = 0x64, /* 0xc8 >> 1 */
.demod_i2c_master = I2C_1_MUX_3,
.has_dvb = 1,
.decoder = CX231XX_AVDECODER,
.norm = V4L2_STD_PAL,
.output_mode = OUT_MODE_VIP11,
.tuner_addr = 0x60, /* 0xc0 >> 1 */
.tuner_i2c_master = I2C_2,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = 0,
.amux = CX231XX_AMUX_VIDEO,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
} },
},
[CX231XX_BOARD_ASTROMETA_T2HYBRID] = {
.name = "Astrometa T2hybrid",
.tuner_type = TUNER_ABSENT,
.has_dvb = 1,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.agc_analog_digital_select_gpio = 0x01,
.ctl_pin_status_mask = 0xffffffc4,
.demod_addr = 0x18, /* 0x30 >> 1 */
.demod_i2c_master = I2C_1_MUX_1,
.gpio_pin_status_mask = 0xa,
.norm = V4L2_STD_NTSC,
.tuner_addr = 0x3a, /* 0x74 >> 1 */
.tuner_i2c_master = I2C_1_MUX_3,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.tuner_sif_gpio = 0x05,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_1_1,
.amux = CX231XX_AMUX_VIDEO,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
},
},
},
[CX231XX_BOARD_THE_IMAGING_SOURCE_DFG_USB2_PRO] = {
.name = "The Imaging Source DFG/USB2pro",
.tuner_type = TUNER_ABSENT,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.norm = V4L2_STD_PAL,
.no_alt_vanc = 1,
.external_av = 1,
.input = {{
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_1_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_2_1 |
(CX231XX_VIN_2_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_HAUPPAUGE_935C] = {
.name = "Hauppauge WinTV-HVR-935C",
.tuner_type = TUNER_ABSENT,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_1_MUX_3,
.has_dvb = 1,
.demod_addr = 0x64, /* 0xc8 >> 1 */
.norm = V4L2_STD_PAL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
[CX231XX_BOARD_HAUPPAUGE_975] = {
.name = "Hauppauge WinTV-HVR-975",
.tuner_type = TUNER_ABSENT,
.tuner_addr = 0x60,
.tuner_gpio = RDE250_XCV_TUNER,
.tuner_sif_gpio = 0x05,
.tuner_scl_gpio = 0x1a,
.tuner_sda_gpio = 0x1b,
.decoder = CX231XX_AVDECODER,
.output_mode = OUT_MODE_VIP11,
.demod_xfer_mode = 0,
.ctl_pin_status_mask = 0xFFFFFFC4,
.agc_analog_digital_select_gpio = 0x0c,
.gpio_pin_status_mask = 0x4001000,
.tuner_i2c_master = I2C_1_MUX_3,
.demod_i2c_master = I2C_1_MUX_3,
.has_dvb = 1,
.demod_addr = 0x59, /* 0xb2 >> 1 */
.demod_addr2 = 0x64, /* 0xc8 >> 1 */
.norm = V4L2_STD_ALL,
.input = {{
.type = CX231XX_VMUX_TELEVISION,
.vmux = CX231XX_VIN_3_1,
.amux = CX231XX_AMUX_VIDEO,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_COMPOSITE1,
.vmux = CX231XX_VIN_2_1,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
}, {
.type = CX231XX_VMUX_SVIDEO,
.vmux = CX231XX_VIN_1_1 |
(CX231XX_VIN_1_2 << 8) |
CX25840_SVIDEO_ON,
.amux = CX231XX_AMUX_LINE_IN,
.gpio = NULL,
} },
},
};
const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards);
/* table of devices that work with this driver */
struct usb_device_id cx231xx_id_table[] = {
{USB_DEVICE(0x1D19, 0x6109),
.driver_info = CX231XX_BOARD_PV_XCAPTURE_USB},
{USB_DEVICE(0x0572, 0x5A3C),
.driver_info = CX231XX_BOARD_UNKNOWN},
{USB_DEVICE(0x0572, 0x58A2),
.driver_info = CX231XX_BOARD_CNXT_CARRAERA},
{USB_DEVICE(0x0572, 0x58A1),
.driver_info = CX231XX_BOARD_CNXT_SHELBY},
{USB_DEVICE(0x0572, 0x58A4),
.driver_info = CX231XX_BOARD_CNXT_RDE_253S},
{USB_DEVICE(0x0572, 0x58A5),
.driver_info = CX231XX_BOARD_CNXT_RDU_253S},
{USB_DEVICE(0x0572, 0x58A6),
.driver_info = CX231XX_BOARD_CNXT_VIDEO_GRABBER},
{USB_DEVICE(0x0572, 0x589E),
.driver_info = CX231XX_BOARD_CNXT_RDE_250},
{USB_DEVICE(0x0572, 0x58A0),
.driver_info = CX231XX_BOARD_CNXT_RDU_250},
/* AverMedia DVD EZMaker 7 */
{USB_DEVICE(0x07ca, 0xc039),
.driver_info = CX231XX_BOARD_CNXT_VIDEO_GRABBER},
{USB_DEVICE(0x2040, 0xb110),
.driver_info = CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL},
{USB_DEVICE(0x2040, 0xb111),
.driver_info = CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC},
{USB_DEVICE(0x2040, 0xb120),
.driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER},
{USB_DEVICE(0x2040, 0xb123),
.driver_info = CX231XX_BOARD_HAUPPAUGE_955Q},
{USB_DEVICE(0x2040, 0xb124),
.driver_info = CX231XX_BOARD_HAUPPAUGE_955Q},
{USB_DEVICE(0x2040, 0xb151),
.driver_info = CX231XX_BOARD_HAUPPAUGE_935C},
{USB_DEVICE(0x2040, 0xb150),
.driver_info = CX231XX_BOARD_HAUPPAUGE_975},
{USB_DEVICE(0x2040, 0xb130),
.driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
{USB_DEVICE(0x2040, 0xb131),
.driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
/* Hauppauge WinTV-HVR-900-H */
{USB_DEVICE(0x2040, 0xb138),
.driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
/* Hauppauge WinTV-HVR-901-H */
{USB_DEVICE(0x2040, 0xb139),
.driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
{USB_DEVICE(0x2040, 0xb140),
.driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER},
{USB_DEVICE(0x2040, 0xc200),
.driver_info = CX231XX_BOARD_HAUPPAUGE_USBLIVE2},
/* PCTV QuatroStick 521e */
{USB_DEVICE(0x2013, 0x0259),
.driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
/* PCTV QuatroStick 522e */
{USB_DEVICE(0x2013, 0x025e),
.driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
{USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x4000, 0x4001),
.driver_info = CX231XX_BOARD_PV_PLAYTV_USB_HYBRID},
{USB_DEVICE(USB_VID_PIXELVIEW, 0x5014),
.driver_info = CX231XX_BOARD_PV_XCAPTURE_USB},
{USB_DEVICE(0x1b80, 0xe424),
.driver_info = CX231XX_BOARD_KWORLD_UB430_USB_HYBRID},
{USB_DEVICE(0x1b80, 0xe421),
.driver_info = CX231XX_BOARD_KWORLD_UB445_USB_HYBRID},
{USB_DEVICE(0x1f4d, 0x0237),
.driver_info = CX231XX_BOARD_ICONBIT_U100},
{USB_DEVICE(0x0fd9, 0x0037),
.driver_info = CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2},
{USB_DEVICE(0x1f4d, 0x0102),
.driver_info = CX231XX_BOARD_OTG102},
{USB_DEVICE(USB_VID_TERRATEC, 0x00a6),
.driver_info = CX231XX_BOARD_TERRATEC_GRABBY},
{USB_DEVICE(0x1b80, 0xd3b2),
.driver_info = CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD},
{USB_DEVICE(0x15f4, 0x0135),
.driver_info = CX231XX_BOARD_ASTROMETA_T2HYBRID},
{USB_DEVICE(0x199e, 0x8002),
.driver_info = CX231XX_BOARD_THE_IMAGING_SOURCE_DFG_USB2_PRO},
{},
};
MODULE_DEVICE_TABLE(usb, cx231xx_id_table);
/* cx231xx_tuner_callback
* will be used to reset XC5000 tuner using GPIO pin
*/
int cx231xx_tuner_callback(void *ptr, int component, int command, int arg)
{
int rc = 0;
struct cx231xx *dev = ptr;
if (dev->tuner_type == TUNER_XC5000) {
if (command == XC5000_TUNER_RESET) {
dev_dbg(dev->dev,
"Tuner CB: RESET: cmd %d : tuner type %d\n",
command, dev->tuner_type);
cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
1);
msleep(10);
cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
0);
msleep(330);
cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
1);
msleep(10);
}
} else if (dev->tuner_type == TUNER_NXP_TDA18271) {
switch (command) {
case TDA18271_CALLBACK_CMD_AGC_ENABLE:
if (dev->model == CX231XX_BOARD_PV_PLAYTV_USB_HYBRID)
rc = cx231xx_set_agc_analog_digital_mux_select(dev, arg);
break;
default:
rc = -EINVAL;
break;
}
}
return rc;
}
EXPORT_SYMBOL_GPL(cx231xx_tuner_callback);
static void cx231xx_reset_out(struct cx231xx *dev)
{
cx231xx_set_gpio_value(dev, CX23417_RESET, 1);
msleep(200);
cx231xx_set_gpio_value(dev, CX23417_RESET, 0);
msleep(200);
cx231xx_set_gpio_value(dev, CX23417_RESET, 1);
}
static void cx231xx_enable_OSC(struct cx231xx *dev)
{
cx231xx_set_gpio_value(dev, CX23417_OSC_EN, 1);
}
static void cx231xx_sleep_s5h1432(struct cx231xx *dev)
{
cx231xx_set_gpio_value(dev, SLEEP_S5H1432, 0);
}
static inline void cx231xx_set_model(struct cx231xx *dev)
{
dev->board = cx231xx_boards[dev->model];
}
/* Since cx231xx_pre_card_setup() requires a proper dev->model,
* this won't work for boards with generic PCI IDs
*/
void cx231xx_pre_card_setup(struct cx231xx *dev)
{
dev_info(dev->dev, "Identified as %s (card=%d)\n",
dev->board.name, dev->model);
if (CX231XX_BOARD_ASTROMETA_T2HYBRID == dev->model) {
/* turn on demodulator chip */
cx231xx_set_gpio_value(dev, 0x03, 0x01);
}
/* set the direction for GPIO pins */
if (dev->board.tuner_gpio) {
cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
}
if (dev->board.tuner_sif_gpio >= 0)
cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
/* request some modules if any required */
/* set the mode to Analog mode initially */
cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
/* Unlock device */
/* cx231xx_set_mode(dev, CX231XX_SUSPEND); */
}
static void cx231xx_config_tuner(struct cx231xx *dev)
{
struct tuner_setup tun_setup;
struct v4l2_frequency f;
if (dev->tuner_type == TUNER_ABSENT)
return;
tun_setup.mode_mask = T_ANALOG_TV | T_RADIO;
tun_setup.type = dev->tuner_type;
tun_setup.addr = dev->tuner_addr;
tun_setup.tuner_callback = cx231xx_tuner_callback;
tuner_call(dev, tuner, s_type_addr, &tun_setup);
#if 0
if (tun_setup.type == TUNER_XC5000) {
static struct xc2028_ctrl ctrl = {
.fname = XC5000_DEFAULT_FIRMWARE,
.max_len = 64,
.demod = 0;
};
struct v4l2_priv_tun_config cfg = {
.tuner = dev->tuner_type,
.priv = &ctrl,
};
tuner_call(dev, tuner, s_config, &cfg);
}
#endif
/* configure tuner */
f.tuner = 0;
f.type = V4L2_TUNER_ANALOG_TV;
f.frequency = 9076; /* just a magic number */
dev->ctl_freq = f.frequency;
call_all(dev, tuner, s_frequency, &f);
}
static int read_eeprom(struct cx231xx *dev, struct i2c_client *client,
u8 *eedata, int len)
{
int ret;
u8 start_offset = 0;
int len_todo = len;
u8 *eedata_cur = eedata;
int i;
struct i2c_msg msg_write = { .addr = client->addr, .flags = 0,
.buf = &start_offset, .len = 1 };
struct i2c_msg msg_read = { .addr = client->addr, .flags = I2C_M_RD };
/* start reading at offset 0 */
ret = i2c_transfer(client->adapter, &msg_write, 1);
if (ret < 0) {
dev_err(dev->dev, "Can't read eeprom\n");
return ret;
}
while (len_todo > 0) {
msg_read.len = (len_todo > 64) ? 64 : len_todo;
msg_read.buf = eedata_cur;
ret = i2c_transfer(client->adapter, &msg_read, 1);
if (ret < 0) {
dev_err(dev->dev, "Can't read eeprom\n");
return ret;
}
eedata_cur += msg_read.len;
len_todo -= msg_read.len;
}
for (i = 0; i + 15 < len; i += 16)
dev_dbg(dev->dev, "i2c eeprom %02x: %*ph\n",
i, 16, &eedata[i]);
return 0;
}
void cx231xx_card_setup(struct cx231xx *dev)
{
cx231xx_set_model(dev);
dev->tuner_type = cx231xx_boards[dev->model].tuner_type;
if (cx231xx_boards[dev->model].tuner_addr)
dev->tuner_addr = cx231xx_boards[dev->model].tuner_addr;
/* request some modules */
if (dev->board.decoder == CX231XX_AVDECODER) {
dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
cx231xx_get_i2c_adap(dev, I2C_0),
"cx25840", 0x88 >> 1, NULL);
if (dev->sd_cx25840 == NULL)
dev_err(dev->dev,
"cx25840 subdev registration failure\n");
cx25840_call(dev, core, load_fw);
}
/* Initialize the tuner */
if (dev->board.tuner_type != TUNER_ABSENT) {
struct i2c_adapter *tuner_i2c = cx231xx_get_i2c_adap(dev,
dev->board.tuner_i2c_master);
dev->sd_tuner = v4l2_i2c_new_subdev(&dev->v4l2_dev,
tuner_i2c,
"tuner",
dev->tuner_addr, NULL);
if (dev->sd_tuner == NULL)
dev_err(dev->dev,
"tuner subdev registration failure\n");
else
cx231xx_config_tuner(dev);
}
switch (dev->model) {
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_975:
{
struct eeprom {
struct tveeprom tvee;
u8 eeprom[256];
struct i2c_client client;
};
struct eeprom *e = kzalloc(sizeof(*e), GFP_KERNEL);
if (e == NULL) {
dev_err(dev->dev,
"failed to allocate memory to read eeprom\n");
break;
}
e->client.adapter = cx231xx_get_i2c_adap(dev, I2C_1_MUX_1);
e->client.addr = 0xa0 >> 1;
read_eeprom(dev, &e->client, e->eeprom, sizeof(e->eeprom));
tveeprom_hauppauge_analog(&e->tvee, e->eeprom + 0xc0);
kfree(e);
break;
}
}
}
/*
* cx231xx_config()
* inits registers with sane defaults
*/
int cx231xx_config(struct cx231xx *dev)
{
/* TBD need to add cx231xx specific code */
return 0;
}
/*
* cx231xx_config_i2c()
* configure i2c attached devices
*/
void cx231xx_config_i2c(struct cx231xx *dev)
{
/* u32 input = INPUT(dev->video_input)->vmux; */
call_all(dev, video, s_stream, 1);
}
static void cx231xx_unregister_media_device(struct cx231xx *dev)
{
#ifdef CONFIG_MEDIA_CONTROLLER
if (dev->media_dev) {
media_device_unregister(dev->media_dev);
media_device_cleanup(dev->media_dev);
kfree(dev->media_dev);
dev->media_dev = NULL;
}
#endif
}
/*
* cx231xx_realease_resources()
* unregisters the v4l2,i2c and usb devices
* called when the device gets disconnected or at module unload
*/
void cx231xx_release_resources(struct cx231xx *dev)
{
cx231xx_ir_exit(dev);
cx231xx_release_analog_resources(dev);
cx231xx_remove_from_devlist(dev);
/* Release I2C buses */
cx231xx_dev_uninit(dev);
/* delete v4l2 device */
v4l2_device_unregister(&dev->v4l2_dev);
cx231xx_unregister_media_device(dev);
usb_put_dev(dev->udev);
/* Mark device as unused */
clear_bit(dev->devno, &cx231xx_devused);
}
static int cx231xx_media_device_init(struct cx231xx *dev,
struct usb_device *udev)
{
#ifdef CONFIG_MEDIA_CONTROLLER
struct media_device *mdev;
mdev = kzalloc(sizeof(*mdev), GFP_KERNEL);
if (!mdev)
return -ENOMEM;
media_device_usb_init(mdev, udev, dev->board.name);
dev->media_dev = mdev;
#endif
return 0;
}
/*
* cx231xx_init_dev()
* allocates and inits the device structs, registers i2c bus and v4l device
*/
static int cx231xx_init_dev(struct cx231xx *dev, struct usb_device *udev,
int minor)
{
int retval = -ENOMEM;
unsigned int maxh, maxw;
dev->udev = udev;
mutex_init(&dev->lock);
mutex_init(&dev->ctrl_urb_lock);
mutex_init(&dev->gpio_i2c_lock);
mutex_init(&dev->i2c_lock);
spin_lock_init(&dev->video_mode.slock);
spin_lock_init(&dev->vbi_mode.slock);
spin_lock_init(&dev->sliced_cc_mode.slock);
init_waitqueue_head(&dev->open);
init_waitqueue_head(&dev->wait_frame);
init_waitqueue_head(&dev->wait_stream);
dev->cx231xx_read_ctrl_reg = cx231xx_read_ctrl_reg;
dev->cx231xx_write_ctrl_reg = cx231xx_write_ctrl_reg;
dev->cx231xx_send_usb_command = cx231xx_send_usb_command;
dev->cx231xx_gpio_i2c_read = cx231xx_gpio_i2c_read;
dev->cx231xx_gpio_i2c_write = cx231xx_gpio_i2c_write;
/* Query cx231xx to find what pcb config it is related to */
retval = initialize_cx231xx(dev);
if (retval < 0) {
dev_err(dev->dev, "Failed to read PCB config\n");
return retval;
}
/*To workaround error number=-71 on EP0 for VideoGrabber,
need set alt here.*/
if (dev->model == CX231XX_BOARD_CNXT_VIDEO_GRABBER ||
dev->model == CX231XX_BOARD_HAUPPAUGE_USBLIVE2) {
cx231xx_set_alt_setting(dev, INDEX_VIDEO, 3);
cx231xx_set_alt_setting(dev, INDEX_VANC, 1);
}
/* Cx231xx pre card setup */
cx231xx_pre_card_setup(dev);
retval = cx231xx_config(dev);
if (retval) {
dev_err(dev->dev, "error configuring device\n");
return -ENOMEM;
}
/* set default norm */
dev->norm = dev->board.norm;
/* register i2c bus */
retval = cx231xx_dev_init(dev);
if (retval) {
dev_err(dev->dev,
"%s: cx231xx_i2c_register - errCode [%d]!\n",
__func__, retval);
goto err_dev_init;
}
/* Do board specific init */
cx231xx_card_setup(dev);
/* configure the device */
cx231xx_config_i2c(dev);
maxw = norm_maxw(dev);
maxh = norm_maxh(dev);
/* set default image size */
dev->width = maxw;
dev->height = maxh;
dev->interlaced = 0;
dev->video_input = 0;
retval = cx231xx_config(dev);
if (retval) {
dev_err(dev->dev, "%s: cx231xx_config - errCode [%d]!\n",
__func__, retval);
goto err_dev_init;
}
/* init video dma queue */
INIT_LIST_HEAD(&dev->video_mode.vidq.active);
/* init vbi dma queue */
INIT_LIST_HEAD(&dev->vbi_mode.vidq.active);
/* Reset other chips required if they are tied up with GPIO pins */
cx231xx_add_into_devlist(dev);
if (dev->board.has_417) {
dev_info(dev->dev, "attach 417 %d\n", dev->model);
if (cx231xx_417_register(dev) < 0) {
dev_err(dev->dev,
"%s() Failed to register 417 on VID_B\n",
__func__);
}
}
retval = cx231xx_register_analog_devices(dev);
if (retval)
goto err_analog;
cx231xx_ir_init(dev);
cx231xx_init_extension(dev);
return 0;
err_analog:
cx231xx_unregister_media_device(dev);
cx231xx_release_analog_resources(dev);
cx231xx_remove_from_devlist(dev);
err_dev_init:
cx231xx_dev_uninit(dev);
return retval;
}
#if defined(CONFIG_MODULES) && defined(MODULE)
static void request_module_async(struct work_struct *work)
{
struct cx231xx *dev = container_of(work,
struct cx231xx, request_module_wk);
if (dev->has_alsa_audio)
request_module("cx231xx-alsa");
if (dev->board.has_dvb)
request_module("cx231xx-dvb");
}
static void request_modules(struct cx231xx *dev)
{
INIT_WORK(&dev->request_module_wk, request_module_async);
schedule_work(&dev->request_module_wk);
}
static void flush_request_modules(struct cx231xx *dev)
{
flush_work(&dev->request_module_wk);
}
#else
#define request_modules(dev)
#define flush_request_modules(dev)
#endif /* CONFIG_MODULES */
static int cx231xx_init_v4l2(struct cx231xx *dev,
struct usb_device *udev,
struct usb_interface *interface,
int isoc_pipe)
{
struct usb_interface *uif;
int i, idx;
/* Video Init */
/* compute alternate max packet sizes for video */
idx = dev->current_pcb_config.hs_config_info[0].interface_info.video_index + 1;
if (idx >= dev->max_iad_interface_count) {
dev_err(dev->dev,
"Video PCB interface #%d doesn't exist\n", idx);
return -ENODEV;
}
uif = udev->actconfig->interface[idx];
if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1)
return -ENODEV;
dev->video_mode.end_point_addr = uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress;
dev->video_mode.num_alt = uif->num_altsetting;
dev_info(dev->dev,
"video EndPoint Addr 0x%x, Alternate settings: %i\n",
dev->video_mode.end_point_addr,
dev->video_mode.num_alt);
dev->video_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->video_mode.num_alt, GFP_KERNEL);
if (dev->video_mode.alt_max_pkt_size == NULL)
return -ENOMEM;
for (i = 0; i < dev->video_mode.num_alt; i++) {
u16 tmp;
if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1)
return -ENODEV;
tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc.wMaxPacketSize);
dev->video_mode.alt_max_pkt_size[i] = (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
dev_dbg(dev->dev,
"Alternate setting %i, max size= %i\n", i,
dev->video_mode.alt_max_pkt_size[i]);
}
/* VBI Init */
idx = dev->current_pcb_config.hs_config_info[0].interface_info.vanc_index + 1;
if (idx >= dev->max_iad_interface_count) {
dev_err(dev->dev,
"VBI PCB interface #%d doesn't exist\n", idx);
return -ENODEV;
}
uif = udev->actconfig->interface[idx];
if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1)
return -ENODEV;
dev->vbi_mode.end_point_addr =
uif->altsetting[0].endpoint[isoc_pipe].desc.
bEndpointAddress;
dev->vbi_mode.num_alt = uif->num_altsetting;
dev_info(dev->dev,
"VBI EndPoint Addr 0x%x, Alternate settings: %i\n",
dev->vbi_mode.end_point_addr,
dev->vbi_mode.num_alt);
/* compute alternate max packet sizes for vbi */
dev->vbi_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->vbi_mode.num_alt, GFP_KERNEL);
if (dev->vbi_mode.alt_max_pkt_size == NULL)
return -ENOMEM;
for (i = 0; i < dev->vbi_mode.num_alt; i++) {
u16 tmp;
if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1)
return -ENODEV;
tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].
desc.wMaxPacketSize);
dev->vbi_mode.alt_max_pkt_size[i] =
(tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
dev_dbg(dev->dev,
"Alternate setting %i, max size= %i\n", i,
dev->vbi_mode.alt_max_pkt_size[i]);
}
/* Sliced CC VBI init */
/* compute alternate max packet sizes for sliced CC */
idx = dev->current_pcb_config.hs_config_info[0].interface_info.hanc_index + 1;
if (idx >= dev->max_iad_interface_count) {
dev_err(dev->dev,
"Sliced CC PCB interface #%d doesn't exist\n", idx);
return -ENODEV;
}
uif = udev->actconfig->interface[idx];
if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1)
return -ENODEV;
dev->sliced_cc_mode.end_point_addr =
uif->altsetting[0].endpoint[isoc_pipe].desc.
bEndpointAddress;
dev->sliced_cc_mode.num_alt = uif->num_altsetting;
dev_info(dev->dev,
"sliced CC EndPoint Addr 0x%x, Alternate settings: %i\n",
dev->sliced_cc_mode.end_point_addr,
dev->sliced_cc_mode.num_alt);
dev->sliced_cc_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->sliced_cc_mode.num_alt, GFP_KERNEL);
if (dev->sliced_cc_mode.alt_max_pkt_size == NULL)
return -ENOMEM;
for (i = 0; i < dev->sliced_cc_mode.num_alt; i++) {
u16 tmp;
if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1)
return -ENODEV;
tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].
desc.wMaxPacketSize);
dev->sliced_cc_mode.alt_max_pkt_size[i] =
(tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
dev_dbg(dev->dev,
"Alternate setting %i, max size= %i\n", i,
dev->sliced_cc_mode.alt_max_pkt_size[i]);
}
return 0;
}
/*
* cx231xx_usb_probe()
* checks for supported devices
*/
static int cx231xx_usb_probe(struct usb_interface *interface,
const struct usb_device_id *id)
{
struct usb_device *udev;
struct device *d = &interface->dev;
struct usb_interface *uif;
struct cx231xx *dev = NULL;
int retval = -ENODEV;
int nr = 0, ifnum;
int i, isoc_pipe = 0;
char *speed;
u8 idx;
struct usb_interface_assoc_descriptor *assoc_desc;
ifnum = interface->altsetting[0].desc.bInterfaceNumber;
/*
* Interface number 0 - IR interface (handled by mceusb driver)
* Interface number 1 - AV interface (handled by this driver)
*/
if (ifnum != 1)
return -ENODEV;
/* Check to see next free device and mark as used */
do {
nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS);
if (nr >= CX231XX_MAXBOARDS) {
/* No free device slots */
dev_err(d,
"Supports only %i devices.\n",
CX231XX_MAXBOARDS);
return -ENOMEM;
}
} while (test_and_set_bit(nr, &cx231xx_devused));
udev = usb_get_dev(interface_to_usbdev(interface));
/* allocate memory for our device state and initialize it */
dev = devm_kzalloc(&udev->dev, sizeof(*dev), GFP_KERNEL);
if (dev == NULL) {
retval = -ENOMEM;
goto err_if;
}
snprintf(dev->name, 29, "cx231xx #%d", nr);
dev->devno = nr;
dev->model = id->driver_info;
dev->video_mode.alt = -1;
dev->dev = d;
cx231xx_set_model(dev);
dev->interface_count++;
/* reset gpio dir and value */
dev->gpio_dir = 0;
dev->gpio_val = 0;
dev->xc_fw_load_done = 0;
dev->has_alsa_audio = 1;
dev->power_mode = -1;
atomic_set(&dev->devlist_count, 0);
/* 0 - vbi ; 1 -sliced cc mode */
dev->vbi_or_sliced_cc_mode = 0;
/* get maximum no.of IAD interfaces */
dev->max_iad_interface_count = udev->config->desc.bNumInterfaces;
/* init CIR module TBD */
/*mode_tv: digital=1 or analog=0*/
dev->mode_tv = 0;
dev->USE_ISO = transfer_mode;
switch (udev->speed) {
case USB_SPEED_LOW:
speed = "1.5";
break;
case USB_SPEED_UNKNOWN:
case USB_SPEED_FULL:
speed = "12";
break;
case USB_SPEED_HIGH:
speed = "480";
break;
default:
speed = "unknown";
}
dev_info(d,
"New device %s %s @ %s Mbps (%04x:%04x) with %d interfaces\n",
udev->manufacturer ? udev->manufacturer : "",
udev->product ? udev->product : "",
speed,
le16_to_cpu(udev->descriptor.idVendor),
le16_to_cpu(udev->descriptor.idProduct),
dev->max_iad_interface_count);
/* increment interface count */
dev->interface_count++;
/* get device number */
nr = dev->devno;
assoc_desc = udev->actconfig->intf_assoc[0];
if (!assoc_desc || assoc_desc->bFirstInterface != ifnum) {
dev_err(d, "Not found matching IAD interface\n");
retval = -ENODEV;
goto err_if;
}
dev_dbg(d, "registering interface %d\n", ifnum);
/* save our data pointer in this interface device */
usb_set_intfdata(interface, dev);
/* Initialize the media controller */
retval = cx231xx_media_device_init(dev, udev);
if (retval) {
dev_err(d, "cx231xx_media_device_init failed\n");
goto err_media_init;
}
/* Create v4l2 device */
#ifdef CONFIG_MEDIA_CONTROLLER
dev->v4l2_dev.mdev = dev->media_dev;
#endif
retval = v4l2_device_register(&interface->dev, &dev->v4l2_dev);
if (retval) {
dev_err(d, "v4l2_device_register failed\n");
goto err_v4l2;
}
/* allocate device struct */
retval = cx231xx_init_dev(dev, udev, nr);
if (retval)
goto err_init;
retval = cx231xx_init_v4l2(dev, udev, interface, isoc_pipe);
if (retval)
goto err_init;
if (dev->current_pcb_config.ts1_source != 0xff) {
/* compute alternate max packet sizes for TS1 */
idx = dev->current_pcb_config.hs_config_info[0].interface_info.ts1_index + 1;
if (idx >= dev->max_iad_interface_count) {
dev_err(d, "TS1 PCB interface #%d doesn't exist\n",
idx);
retval = -ENODEV;
goto err_video_alt;
}
uif = udev->actconfig->interface[idx];
if (uif->altsetting[0].desc.bNumEndpoints < isoc_pipe + 1) {
retval = -ENODEV;
goto err_video_alt;
}
dev->ts1_mode.end_point_addr =
uif->altsetting[0].endpoint[isoc_pipe].
desc.bEndpointAddress;
dev->ts1_mode.num_alt = uif->num_altsetting;
dev_info(d,
"TS EndPoint Addr 0x%x, Alternate settings: %i\n",
dev->ts1_mode.end_point_addr,
dev->ts1_mode.num_alt);
dev->ts1_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->ts1_mode.num_alt, GFP_KERNEL);
if (dev->ts1_mode.alt_max_pkt_size == NULL) {
retval = -ENOMEM;
goto err_video_alt;
}
for (i = 0; i < dev->ts1_mode.num_alt; i++) {
u16 tmp;
if (uif->altsetting[i].desc.bNumEndpoints < isoc_pipe + 1) {
retval = -ENODEV;
goto err_video_alt;
}
tmp = le16_to_cpu(uif->altsetting[i].
endpoint[isoc_pipe].desc.
wMaxPacketSize);
dev->ts1_mode.alt_max_pkt_size[i] =
(tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
dev_dbg(d, "Alternate setting %i, max size= %i\n",
i, dev->ts1_mode.alt_max_pkt_size[i]);
}
}
if (dev->model == CX231XX_BOARD_CNXT_VIDEO_GRABBER) {
cx231xx_enable_OSC(dev);
cx231xx_reset_out(dev);
cx231xx_set_alt_setting(dev, INDEX_VIDEO, 3);
}
if (dev->model == CX231XX_BOARD_CNXT_RDE_253S)
cx231xx_sleep_s5h1432(dev);
/* load other modules required */
request_modules(dev);
#ifdef CONFIG_MEDIA_CONTROLLER
/* Init entities at the Media Controller */
cx231xx_v4l2_create_entities(dev);
retval = v4l2_mc_create_media_graph(dev->media_dev);
if (!retval)
retval = media_device_register(dev->media_dev);
#endif
if (retval < 0)
cx231xx_release_resources(dev);
return retval;
err_video_alt:
/* cx231xx_uninit_dev: */
cx231xx_close_extension(dev);
cx231xx_ir_exit(dev);
cx231xx_release_analog_resources(dev);
cx231xx_417_unregister(dev);
cx231xx_remove_from_devlist(dev);
cx231xx_dev_uninit(dev);
err_init:
v4l2_device_unregister(&dev->v4l2_dev);
err_v4l2:
cx231xx_unregister_media_device(dev);
err_media_init:
usb_set_intfdata(interface, NULL);
err_if:
usb_put_dev(udev);
clear_bit(nr, &cx231xx_devused);
return retval;
}
/*
* cx231xx_usb_disconnect()
* called when the device gets disconnected
* video device will be unregistered on v4l2_close in case it is still open
*/
static void cx231xx_usb_disconnect(struct usb_interface *interface)
{
struct cx231xx *dev;
dev = usb_get_intfdata(interface);
usb_set_intfdata(interface, NULL);
if (!dev)
return;
if (!dev->udev)
return;
dev->state |= DEV_DISCONNECTED;
flush_request_modules(dev);
/* wait until all current v4l2 io is finished then deallocate
resources */
mutex_lock(&dev->lock);
wake_up_interruptible_all(&dev->open);
if (dev->users) {
dev_warn(dev->dev,
"device %s is open! Deregistration and memory deallocation are deferred on close.\n",
video_device_node_name(&dev->vdev));
/* Even having users, it is safe to remove the RC i2c driver */
cx231xx_ir_exit(dev);
if (dev->USE_ISO)
cx231xx_uninit_isoc(dev);
else
cx231xx_uninit_bulk(dev);
wake_up_interruptible(&dev->wait_frame);
wake_up_interruptible(&dev->wait_stream);
} else {
}
cx231xx_close_extension(dev);
mutex_unlock(&dev->lock);
if (!dev->users)
cx231xx_release_resources(dev);
}
static struct usb_driver cx231xx_usb_driver = {
.name = "cx231xx",
.probe = cx231xx_usb_probe,
.disconnect = cx231xx_usb_disconnect,
.id_table = cx231xx_id_table,
};
module_usb_driver(cx231xx_usb_driver);
| linux-master | drivers/media/usb/cx231xx/cx231xx-cards.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
cx231xx-core.c - driver for Conexant Cx23100/101/102
USB video capture devices
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
Based on em28xx driver
*/
#include "cx231xx.h"
#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <media/v4l2-common.h>
#include <media/tuner.h>
#include "cx231xx-reg.h"
/* #define ENABLE_DEBUG_ISOC_FRAMES */
static unsigned int core_debug;
module_param(core_debug, int, 0644);
MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
#define cx231xx_coredbg(fmt, arg...) do {\
if (core_debug) \
printk(KERN_INFO "%s %s :"fmt, \
dev->name, __func__ , ##arg); } while (0)
static unsigned int reg_debug;
module_param(reg_debug, int, 0644);
MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
static int alt = CX231XX_PINOUT;
module_param(alt, int, 0644);
MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
#define cx231xx_isocdbg(fmt, arg...) do {\
if (core_debug) \
printk(KERN_INFO "%s %s :"fmt, \
dev->name, __func__ , ##arg); } while (0)
/*****************************************************************
* Device control list functions *
******************************************************************/
LIST_HEAD(cx231xx_devlist);
static DEFINE_MUTEX(cx231xx_devlist_mutex);
/*
* cx231xx_realease_resources()
* unregisters the v4l2,i2c and usb devices
* called when the device gets disconnected or at module unload
*/
void cx231xx_remove_from_devlist(struct cx231xx *dev)
{
if (dev == NULL)
return;
if (dev->udev == NULL)
return;
if (atomic_read(&dev->devlist_count) > 0) {
mutex_lock(&cx231xx_devlist_mutex);
list_del(&dev->devlist);
atomic_dec(&dev->devlist_count);
mutex_unlock(&cx231xx_devlist_mutex);
}
};
void cx231xx_add_into_devlist(struct cx231xx *dev)
{
mutex_lock(&cx231xx_devlist_mutex);
list_add_tail(&dev->devlist, &cx231xx_devlist);
atomic_inc(&dev->devlist_count);
mutex_unlock(&cx231xx_devlist_mutex);
};
static LIST_HEAD(cx231xx_extension_devlist);
int cx231xx_register_extension(struct cx231xx_ops *ops)
{
struct cx231xx *dev = NULL;
mutex_lock(&cx231xx_devlist_mutex);
list_add_tail(&ops->next, &cx231xx_extension_devlist);
list_for_each_entry(dev, &cx231xx_devlist, devlist) {
ops->init(dev);
dev_info(dev->dev, "%s initialized\n", ops->name);
}
mutex_unlock(&cx231xx_devlist_mutex);
return 0;
}
EXPORT_SYMBOL(cx231xx_register_extension);
void cx231xx_unregister_extension(struct cx231xx_ops *ops)
{
struct cx231xx *dev = NULL;
mutex_lock(&cx231xx_devlist_mutex);
list_for_each_entry(dev, &cx231xx_devlist, devlist) {
ops->fini(dev);
dev_info(dev->dev, "%s removed\n", ops->name);
}
list_del(&ops->next);
mutex_unlock(&cx231xx_devlist_mutex);
}
EXPORT_SYMBOL(cx231xx_unregister_extension);
void cx231xx_init_extension(struct cx231xx *dev)
{
struct cx231xx_ops *ops = NULL;
mutex_lock(&cx231xx_devlist_mutex);
list_for_each_entry(ops, &cx231xx_extension_devlist, next) {
if (ops->init)
ops->init(dev);
}
mutex_unlock(&cx231xx_devlist_mutex);
}
void cx231xx_close_extension(struct cx231xx *dev)
{
struct cx231xx_ops *ops = NULL;
mutex_lock(&cx231xx_devlist_mutex);
list_for_each_entry(ops, &cx231xx_extension_devlist, next) {
if (ops->fini)
ops->fini(dev);
}
mutex_unlock(&cx231xx_devlist_mutex);
}
/****************************************************************
* U S B related functions *
*****************************************************************/
int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
struct cx231xx_i2c_xfer_data *req_data)
{
int status = 0;
struct cx231xx *dev = i2c_bus->dev;
struct VENDOR_REQUEST_IN ven_req;
u8 saddr_len = 0;
u8 _i2c_period = 0;
u8 _i2c_nostop = 0;
u8 _i2c_reserve = 0;
if (dev->state & DEV_DISCONNECTED)
return -ENODEV;
/* Get the I2C period, nostop and reserve parameters */
_i2c_period = i2c_bus->i2c_period;
_i2c_nostop = i2c_bus->i2c_nostop;
_i2c_reserve = i2c_bus->i2c_reserve;
saddr_len = req_data->saddr_len;
/* Set wValue */
ven_req.wValue = (req_data->dev_addr << 9 | _i2c_period << 4 |
saddr_len << 2 | _i2c_nostop << 1 | I2C_SYNC |
_i2c_reserve << 6);
/* set channel number */
if (req_data->direction & I2C_M_RD) {
/* channel number, for read,spec required channel_num +4 */
ven_req.bRequest = i2c_bus->nr + 4;
} else
ven_req.bRequest = i2c_bus->nr; /* channel number, */
/* set index value */
switch (saddr_len) {
case 0:
ven_req.wIndex = 0; /* need check */
break;
case 1:
ven_req.wIndex = (req_data->saddr_dat & 0xff);
break;
case 2:
ven_req.wIndex = req_data->saddr_dat;
break;
}
/* set wLength value */
ven_req.wLength = req_data->buf_size;
/* set bData value */
ven_req.bData = 0;
/* set the direction */
if (req_data->direction) {
ven_req.direction = USB_DIR_IN;
memset(req_data->p_buffer, 0x00, ven_req.wLength);
} else
ven_req.direction = USB_DIR_OUT;
/* set the buffer for read / write */
ven_req.pBuff = req_data->p_buffer;
/* call common vendor command request */
status = cx231xx_send_vendor_cmd(dev, &ven_req);
if (status < 0 && !dev->i2c_scan_running) {
dev_err(dev->dev, "%s: failed with status -%d\n",
__func__, status);
}
return status;
}
EXPORT_SYMBOL_GPL(cx231xx_send_usb_command);
/*
* Sends/Receives URB control messages, assuring to use a kalloced buffer
* for all operations (dev->urb_buf), to avoid using stacked buffers, as
* they aren't safe for usage with USB, due to DMA restrictions.
* Also implements the debug code for control URB's.
*/
static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe,
__u8 request, __u8 requesttype, __u16 value, __u16 index,
void *data, __u16 size, int timeout)
{
int rc, i;
if (reg_debug) {
printk(KERN_DEBUG "%s: (pipe 0x%08x): %s: %02x %02x %02x %02x %02x %02x %02x %02x ",
dev->name,
pipe,
(requesttype & USB_DIR_IN) ? "IN" : "OUT",
requesttype,
request,
value & 0xff, value >> 8,
index & 0xff, index >> 8,
size & 0xff, size >> 8);
if (!(requesttype & USB_DIR_IN)) {
printk(KERN_CONT ">>>");
for (i = 0; i < size; i++)
printk(KERN_CONT " %02x",
((unsigned char *)data)[i]);
}
}
/* Do the real call to usb_control_msg */
mutex_lock(&dev->ctrl_urb_lock);
if (!(requesttype & USB_DIR_IN) && size)
memcpy(dev->urb_buf, data, size);
rc = usb_control_msg(dev->udev, pipe, request, requesttype, value,
index, dev->urb_buf, size, timeout);
if ((requesttype & USB_DIR_IN) && size)
memcpy(data, dev->urb_buf, size);
mutex_unlock(&dev->ctrl_urb_lock);
if (reg_debug) {
if (unlikely(rc < 0)) {
printk(KERN_CONT "FAILED!\n");
return rc;
}
if ((requesttype & USB_DIR_IN)) {
printk(KERN_CONT "<<<");
for (i = 0; i < size; i++)
printk(KERN_CONT " %02x",
((unsigned char *)data)[i]);
}
printk(KERN_CONT "\n");
}
return rc;
}
/*
* cx231xx_read_ctrl_reg()
* reads data from the usb device specifying bRequest and wValue
*/
int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
char *buf, int len)
{
u8 val = 0;
int ret;
int pipe = usb_rcvctrlpipe(dev->udev, 0);
if (dev->state & DEV_DISCONNECTED)
return -ENODEV;
if (len > URB_MAX_CTRL_SIZE)
return -EINVAL;
switch (len) {
case 1:
val = ENABLE_ONE_BYTE;
break;
case 2:
val = ENABLE_TWE_BYTE;
break;
case 3:
val = ENABLE_THREE_BYTE;
break;
case 4:
val = ENABLE_FOUR_BYTE;
break;
default:
val = 0xFF; /* invalid option */
}
if (val == 0xFF)
return -EINVAL;
ret = __usb_control_msg(dev, pipe, req,
USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
val, reg, buf, len, HZ);
return ret;
}
int cx231xx_send_vendor_cmd(struct cx231xx *dev,
struct VENDOR_REQUEST_IN *ven_req)
{
int ret;
int pipe = 0;
int unsend_size = 0;
u8 *pdata;
if (dev->state & DEV_DISCONNECTED)
return -ENODEV;
if ((ven_req->wLength > URB_MAX_CTRL_SIZE))
return -EINVAL;
if (ven_req->direction)
pipe = usb_rcvctrlpipe(dev->udev, 0);
else
pipe = usb_sndctrlpipe(dev->udev, 0);
/*
* If the cx23102 read more than 4 bytes with i2c bus,
* need chop to 4 byte per request
*/
if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) ||
(ven_req->bRequest == 0x5) ||
(ven_req->bRequest == 0x6) ||
/* Internal Master 3 Bus can send
* and receive only 4 bytes per time
*/
(ven_req->bRequest == 0x2))) {
unsend_size = 0;
pdata = ven_req->pBuff;
unsend_size = ven_req->wLength;
/* the first package */
ven_req->wValue = ven_req->wValue & 0xFFFB;
ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x2;
ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
ven_req->wValue, ven_req->wIndex, pdata,
0x0004, HZ);
unsend_size = unsend_size - 4;
/* the middle package */
ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x42;
while (unsend_size - 4 > 0) {
pdata = pdata + 4;
ret = __usb_control_msg(dev, pipe,
ven_req->bRequest,
ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
ven_req->wValue, ven_req->wIndex, pdata,
0x0004, HZ);
unsend_size = unsend_size - 4;
}
/* the last package */
ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x40;
pdata = pdata + 4;
ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
ven_req->wValue, ven_req->wIndex, pdata,
unsend_size, HZ);
} else {
ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
ven_req->wValue, ven_req->wIndex,
ven_req->pBuff, ven_req->wLength, HZ);
}
return ret;
}
/*
* cx231xx_write_ctrl_reg()
* sends data to the usb device, specifying bRequest
*/
int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf,
int len)
{
u8 val = 0;
int ret;
int pipe = usb_sndctrlpipe(dev->udev, 0);
if (dev->state & DEV_DISCONNECTED)
return -ENODEV;
if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
return -EINVAL;
switch (len) {
case 1:
val = ENABLE_ONE_BYTE;
break;
case 2:
val = ENABLE_TWE_BYTE;
break;
case 3:
val = ENABLE_THREE_BYTE;
break;
case 4:
val = ENABLE_FOUR_BYTE;
break;
default:
val = 0xFF; /* invalid option */
}
if (val == 0xFF)
return -EINVAL;
if (reg_debug) {
int byte;
cx231xx_isocdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
pipe,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
req, 0, val, reg & 0xff,
reg >> 8, len & 0xff, len >> 8);
for (byte = 0; byte < len; byte++)
cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]);
cx231xx_isocdbg("\n");
}
ret = __usb_control_msg(dev, pipe, req,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
val, reg, buf, len, HZ);
return ret;
}
/****************************************************************
* USB Alternate Setting functions *
*****************************************************************/
int cx231xx_set_video_alternate(struct cx231xx *dev)
{
int errCode, prev_alt = dev->video_mode.alt;
unsigned int min_pkt_size = dev->width * 2 + 4;
u32 usb_interface_index = 0;
/* When image size is bigger than a certain value,
the frame size should be increased, otherwise, only
green screen will be received.
*/
if (dev->width * 2 * dev->height > 720 * 240 * 2)
min_pkt_size *= 2;
if (dev->width > 360) {
/* resolutions: 720,704,640 */
dev->video_mode.alt = 3;
} else if (dev->width > 180) {
/* resolutions: 360,352,320,240 */
dev->video_mode.alt = 2;
} else if (dev->width > 0) {
/* resolutions: 180,176,160,128,88 */
dev->video_mode.alt = 1;
} else {
/* Change to alt0 BULK to release USB bandwidth */
dev->video_mode.alt = 0;
}
if (dev->USE_ISO == 0)
dev->video_mode.alt = 0;
cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt);
/* Get the correct video interface Index */
usb_interface_index =
dev->current_pcb_config.hs_config_info[0].interface_info.
video_index + 1;
if (dev->video_mode.alt != prev_alt) {
cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
min_pkt_size, dev->video_mode.alt);
if (dev->video_mode.alt_max_pkt_size != NULL)
dev->video_mode.max_pkt_size =
dev->video_mode.alt_max_pkt_size[dev->video_mode.alt];
cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
dev->video_mode.alt,
dev->video_mode.max_pkt_size);
errCode =
usb_set_interface(dev->udev, usb_interface_index,
dev->video_mode.alt);
if (errCode < 0) {
dev_err(dev->dev,
"cannot change alt number to %d (error=%i)\n",
dev->video_mode.alt, errCode);
return errCode;
}
}
return 0;
}
int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt)
{
int status = 0;
u32 usb_interface_index = 0;
u32 max_pkt_size = 0;
switch (index) {
case INDEX_TS1:
usb_interface_index =
dev->current_pcb_config.hs_config_info[0].interface_info.
ts1_index + 1;
dev->ts1_mode.alt = alt;
if (dev->ts1_mode.alt_max_pkt_size != NULL)
max_pkt_size = dev->ts1_mode.max_pkt_size =
dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt];
break;
case INDEX_TS2:
usb_interface_index =
dev->current_pcb_config.hs_config_info[0].interface_info.
ts2_index + 1;
break;
case INDEX_AUDIO:
usb_interface_index =
dev->current_pcb_config.hs_config_info[0].interface_info.
audio_index + 1;
dev->adev.alt = alt;
if (dev->adev.alt_max_pkt_size != NULL)
max_pkt_size = dev->adev.max_pkt_size =
dev->adev.alt_max_pkt_size[dev->adev.alt];
break;
case INDEX_VIDEO:
usb_interface_index =
dev->current_pcb_config.hs_config_info[0].interface_info.
video_index + 1;
dev->video_mode.alt = alt;
if (dev->video_mode.alt_max_pkt_size != NULL)
max_pkt_size = dev->video_mode.max_pkt_size =
dev->video_mode.alt_max_pkt_size[dev->video_mode.
alt];
break;
case INDEX_VANC:
if (dev->board.no_alt_vanc)
return 0;
usb_interface_index =
dev->current_pcb_config.hs_config_info[0].interface_info.
vanc_index + 1;
dev->vbi_mode.alt = alt;
if (dev->vbi_mode.alt_max_pkt_size != NULL)
max_pkt_size = dev->vbi_mode.max_pkt_size =
dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt];
break;
case INDEX_HANC:
usb_interface_index =
dev->current_pcb_config.hs_config_info[0].interface_info.
hanc_index + 1;
dev->sliced_cc_mode.alt = alt;
if (dev->sliced_cc_mode.alt_max_pkt_size != NULL)
max_pkt_size = dev->sliced_cc_mode.max_pkt_size =
dev->sliced_cc_mode.alt_max_pkt_size[dev->
sliced_cc_mode.
alt];
break;
default:
break;
}
if (alt > 0 && max_pkt_size == 0) {
dev_err(dev->dev,
"can't change interface %d alt no. to %d: Max. Pkt size = 0\n",
usb_interface_index, alt);
/*To workaround error number=-71 on EP0 for videograbber,
need add following codes.*/
if (dev->board.no_alt_vanc)
return -1;
}
cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u,Interface = %d\n",
alt, max_pkt_size,
usb_interface_index);
if (usb_interface_index > 0) {
status = usb_set_interface(dev->udev, usb_interface_index, alt);
if (status < 0) {
dev_err(dev->dev,
"can't change interface %d alt no. to %d (err=%i)\n",
usb_interface_index, alt, status);
return status;
}
}
return status;
}
EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting);
int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio)
{
int rc = 0;
if (!gpio)
return rc;
/* Send GPIO reset sequences specified at board entry */
while (gpio->sleep >= 0) {
rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val);
if (rc < 0)
return rc;
if (gpio->sleep > 0)
msleep(gpio->sleep);
gpio++;
}
return rc;
}
int cx231xx_demod_reset(struct cx231xx *dev)
{
u8 status = 0;
u8 value[4] = { 0, 0, 0, 0 };
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
value, 4);
cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN,
value[0], value[1], value[2], value[3]);
cx231xx_coredbg("Enter cx231xx_demod_reset()\n");
value[1] = (u8) 0x3;
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(10);
value[1] = (u8) 0x0;
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(10);
value[1] = (u8) 0x3;
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(10);
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
value, 4);
cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN,
value[0], value[1], value[2], value[3]);
return status;
}
EXPORT_SYMBOL_GPL(cx231xx_demod_reset);
int is_fw_load(struct cx231xx *dev)
{
return cx231xx_check_fw(dev);
}
EXPORT_SYMBOL_GPL(is_fw_load);
int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode)
{
int errCode = 0;
if (dev->mode == set_mode)
return 0;
if (set_mode == CX231XX_SUSPEND) {
/* Set the chip in power saving mode */
dev->mode = set_mode;
}
/* Resource is locked */
if (dev->mode != CX231XX_SUSPEND)
return -EINVAL;
dev->mode = set_mode;
if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode */ {
/* set AGC mode to Digital */
switch (dev->model) {
case CX231XX_BOARD_CNXT_CARRAERA:
case CX231XX_BOARD_CNXT_RDE_250:
case CX231XX_BOARD_CNXT_SHELBY:
case CX231XX_BOARD_CNXT_RDU_250:
errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
break;
case CX231XX_BOARD_CNXT_RDE_253S:
case CX231XX_BOARD_CNXT_RDU_253S:
case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
break;
case CX231XX_BOARD_HAUPPAUGE_EXETER:
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
errCode = cx231xx_set_power_mode(dev,
POLARIS_AVMODE_DIGITAL);
break;
default:
break;
}
} else/* Set Analog Power mode */ {
/* set AGC mode to Analog */
switch (dev->model) {
case CX231XX_BOARD_CNXT_CARRAERA:
case CX231XX_BOARD_CNXT_RDE_250:
case CX231XX_BOARD_CNXT_SHELBY:
case CX231XX_BOARD_CNXT_RDU_250:
errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
break;
case CX231XX_BOARD_CNXT_RDE_253S:
case CX231XX_BOARD_CNXT_RDU_253S:
case CX231XX_BOARD_HAUPPAUGE_EXETER:
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
break;
default:
break;
}
}
if (errCode < 0) {
dev_err(dev->dev, "Failed to set devmode to %s: error: %i",
dev->mode == CX231XX_DIGITAL_MODE ? "digital" : "analog",
errCode);
return errCode;
}
return 0;
}
EXPORT_SYMBOL_GPL(cx231xx_set_mode);
int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size)
{
int errCode = 0;
int actlen = -1;
int ret = -ENOMEM;
u32 *buffer;
buffer = kzalloc(4096, GFP_KERNEL);
if (buffer == NULL)
return -ENOMEM;
memcpy(&buffer[0], firmware, 4096);
ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5),
buffer, 4096, &actlen, 2000);
if (ret)
dev_err(dev->dev,
"bulk message failed: %d (%d/%d)", ret,
size, actlen);
else {
errCode = actlen != size ? -1 : 0;
}
kfree(buffer);
return errCode;
}
/*****************************************************************
* URB Streaming functions *
******************************************************************/
/*
* IRQ callback, called by URB callback
*/
static void cx231xx_isoc_irq_callback(struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
struct cx231xx_video_mode *vmode =
container_of(dma_q, struct cx231xx_video_mode, vidq);
struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
unsigned long flags;
int i;
switch (urb->status) {
case 0: /* success */
case -ETIMEDOUT: /* NAK */
break;
case -ECONNRESET: /* kill */
case -ENOENT:
case -ESHUTDOWN:
return;
default: /* error */
cx231xx_isocdbg("urb completion error %d.\n", urb->status);
break;
}
/* Copy data from URB */
spin_lock_irqsave(&dev->video_mode.slock, flags);
dev->video_mode.isoc_ctl.isoc_copy(dev, urb);
spin_unlock_irqrestore(&dev->video_mode.slock, flags);
/* Reset urb buffers */
for (i = 0; i < urb->number_of_packets; i++) {
urb->iso_frame_desc[i].status = 0;
urb->iso_frame_desc[i].actual_length = 0;
}
urb->status = usb_submit_urb(urb, GFP_ATOMIC);
if (urb->status) {
cx231xx_isocdbg("urb resubmit failed (error=%i)\n",
urb->status);
}
}
/*****************************************************************
* URB Streaming functions *
******************************************************************/
/*
* IRQ callback, called by URB callback
*/
static void cx231xx_bulk_irq_callback(struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
struct cx231xx_video_mode *vmode =
container_of(dma_q, struct cx231xx_video_mode, vidq);
struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
unsigned long flags;
switch (urb->status) {
case 0: /* success */
case -ETIMEDOUT: /* NAK */
break;
case -ECONNRESET: /* kill */
case -ENOENT:
case -ESHUTDOWN:
return;
case -EPIPE: /* stall */
cx231xx_isocdbg("urb completion error - device is stalled.\n");
return;
default: /* error */
cx231xx_isocdbg("urb completion error %d.\n", urb->status);
break;
}
/* Copy data from URB */
spin_lock_irqsave(&dev->video_mode.slock, flags);
dev->video_mode.bulk_ctl.bulk_copy(dev, urb);
spin_unlock_irqrestore(&dev->video_mode.slock, flags);
/* Reset urb buffers */
urb->status = usb_submit_urb(urb, GFP_ATOMIC);
if (urb->status) {
cx231xx_isocdbg("urb resubmit failed (error=%i)\n",
urb->status);
}
}
/*
* Stop and Deallocate URBs
*/
void cx231xx_uninit_isoc(struct cx231xx *dev)
{
struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
struct urb *urb;
int i;
bool broken_pipe = false;
cx231xx_isocdbg("cx231xx: called cx231xx_uninit_isoc\n");
dev->video_mode.isoc_ctl.nfields = -1;
for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
urb = dev->video_mode.isoc_ctl.urb[i];
if (urb) {
if (!irqs_disabled())
usb_kill_urb(urb);
else
usb_unlink_urb(urb);
if (dev->video_mode.isoc_ctl.transfer_buffer[i]) {
usb_free_coherent(dev->udev,
urb->transfer_buffer_length,
dev->video_mode.isoc_ctl.
transfer_buffer[i],
urb->transfer_dma);
}
if (urb->status == -EPIPE) {
broken_pipe = true;
}
usb_free_urb(urb);
dev->video_mode.isoc_ctl.urb[i] = NULL;
}
dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL;
}
if (broken_pipe) {
cx231xx_isocdbg("Reset endpoint to recover broken pipe.");
usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr);
}
kfree(dev->video_mode.isoc_ctl.urb);
kfree(dev->video_mode.isoc_ctl.transfer_buffer);
kfree(dma_q->p_left_data);
dev->video_mode.isoc_ctl.urb = NULL;
dev->video_mode.isoc_ctl.transfer_buffer = NULL;
dev->video_mode.isoc_ctl.num_bufs = 0;
dma_q->p_left_data = NULL;
if (dev->mode_tv == 0)
cx231xx_capture_start(dev, 0, Raw_Video);
else
cx231xx_capture_start(dev, 0, TS1_serial_mode);
}
EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc);
/*
* Stop and Deallocate URBs
*/
void cx231xx_uninit_bulk(struct cx231xx *dev)
{
struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
struct urb *urb;
int i;
bool broken_pipe = false;
cx231xx_isocdbg("cx231xx: called cx231xx_uninit_bulk\n");
dev->video_mode.bulk_ctl.nfields = -1;
for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
urb = dev->video_mode.bulk_ctl.urb[i];
if (urb) {
if (!irqs_disabled())
usb_kill_urb(urb);
else
usb_unlink_urb(urb);
if (dev->video_mode.bulk_ctl.transfer_buffer[i]) {
usb_free_coherent(dev->udev,
urb->transfer_buffer_length,
dev->video_mode.bulk_ctl.
transfer_buffer[i],
urb->transfer_dma);
}
if (urb->status == -EPIPE) {
broken_pipe = true;
}
usb_free_urb(urb);
dev->video_mode.bulk_ctl.urb[i] = NULL;
}
dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL;
}
if (broken_pipe) {
cx231xx_isocdbg("Reset endpoint to recover broken pipe.");
usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr);
}
kfree(dev->video_mode.bulk_ctl.urb);
kfree(dev->video_mode.bulk_ctl.transfer_buffer);
kfree(dma_q->p_left_data);
dev->video_mode.bulk_ctl.urb = NULL;
dev->video_mode.bulk_ctl.transfer_buffer = NULL;
dev->video_mode.bulk_ctl.num_bufs = 0;
dma_q->p_left_data = NULL;
if (dev->mode_tv == 0)
cx231xx_capture_start(dev, 0, Raw_Video);
else
cx231xx_capture_start(dev, 0, TS1_serial_mode);
}
EXPORT_SYMBOL_GPL(cx231xx_uninit_bulk);
/*
* Allocate URBs and start IRQ
*/
int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
int num_bufs, int max_pkt_size,
int (*isoc_copy) (struct cx231xx *dev, struct urb *urb))
{
struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
int i;
int sb_size, pipe;
struct urb *urb;
int j, k;
int rc;
/* De-allocates all pending stuff */
cx231xx_uninit_isoc(dev);
dma_q->p_left_data = kzalloc(4096, GFP_KERNEL);
if (dma_q->p_left_data == NULL)
return -ENOMEM;
dev->video_mode.isoc_ctl.isoc_copy = isoc_copy;
dev->video_mode.isoc_ctl.num_bufs = num_bufs;
dma_q->pos = 0;
dma_q->is_partial_line = 0;
dma_q->last_sav = 0;
dma_q->current_field = -1;
dma_q->field1_done = 0;
dma_q->lines_per_field = dev->height / 2;
dma_q->bytes_left_in_line = dev->width << 1;
dma_q->lines_completed = 0;
dma_q->mpeg_buffer_done = 0;
dma_q->left_data_count = 0;
dma_q->mpeg_buffer_completed = 0;
dma_q->add_ps_package_head = CX231XX_NEED_ADD_PS_PACKAGE_HEAD;
dma_q->ps_head[0] = 0x00;
dma_q->ps_head[1] = 0x00;
dma_q->ps_head[2] = 0x01;
dma_q->ps_head[3] = 0xBA;
for (i = 0; i < 8; i++)
dma_q->partial_buf[i] = 0;
dev->video_mode.isoc_ctl.urb =
kcalloc(num_bufs, sizeof(void *), GFP_KERNEL);
if (!dev->video_mode.isoc_ctl.urb) {
dev_err(dev->dev,
"cannot alloc memory for usb buffers\n");
return -ENOMEM;
}
dev->video_mode.isoc_ctl.transfer_buffer =
kcalloc(num_bufs, sizeof(void *), GFP_KERNEL);
if (!dev->video_mode.isoc_ctl.transfer_buffer) {
dev_err(dev->dev,
"cannot allocate memory for usbtransfer\n");
kfree(dev->video_mode.isoc_ctl.urb);
return -ENOMEM;
}
dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size;
dev->video_mode.isoc_ctl.buf = NULL;
sb_size = max_packets * dev->video_mode.isoc_ctl.max_pkt_size;
if (dev->mode_tv == 1)
dev->video_mode.end_point_addr = 0x81;
else
dev->video_mode.end_point_addr = 0x84;
/* allocate urbs and transfer buffers */
for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
urb = usb_alloc_urb(max_packets, GFP_KERNEL);
if (!urb) {
cx231xx_uninit_isoc(dev);
return -ENOMEM;
}
dev->video_mode.isoc_ctl.urb[i] = urb;
dev->video_mode.isoc_ctl.transfer_buffer[i] =
usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL,
&urb->transfer_dma);
if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) {
dev_err(dev->dev,
"unable to allocate %i bytes for transfer buffer %i\n",
sb_size, i);
cx231xx_uninit_isoc(dev);
return -ENOMEM;
}
memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size);
pipe =
usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr);
usb_fill_int_urb(urb, dev->udev, pipe,
dev->video_mode.isoc_ctl.transfer_buffer[i],
sb_size, cx231xx_isoc_irq_callback, dma_q, 1);
urb->number_of_packets = max_packets;
urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
k = 0;
for (j = 0; j < max_packets; j++) {
urb->iso_frame_desc[j].offset = k;
urb->iso_frame_desc[j].length =
dev->video_mode.isoc_ctl.max_pkt_size;
k += dev->video_mode.isoc_ctl.max_pkt_size;
}
}
init_waitqueue_head(&dma_q->wq);
/* submit urbs and enables IRQ */
for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i],
GFP_ATOMIC);
if (rc) {
dev_err(dev->dev,
"submit of urb %i failed (error=%i)\n", i,
rc);
cx231xx_uninit_isoc(dev);
return rc;
}
}
if (dev->mode_tv == 0)
cx231xx_capture_start(dev, 1, Raw_Video);
else
cx231xx_capture_start(dev, 1, TS1_serial_mode);
return 0;
}
EXPORT_SYMBOL_GPL(cx231xx_init_isoc);
/*
* Allocate URBs and start IRQ
*/
int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
int num_bufs, int max_pkt_size,
int (*bulk_copy) (struct cx231xx *dev, struct urb *urb))
{
struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
int i;
int sb_size, pipe;
struct urb *urb;
int rc;
dev->video_input = dev->video_input > 2 ? 2 : dev->video_input;
cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input);
video_mux(dev, dev->video_input);
/* De-allocates all pending stuff */
cx231xx_uninit_bulk(dev);
dev->video_mode.bulk_ctl.bulk_copy = bulk_copy;
dev->video_mode.bulk_ctl.num_bufs = num_bufs;
dma_q->pos = 0;
dma_q->is_partial_line = 0;
dma_q->last_sav = 0;
dma_q->current_field = -1;
dma_q->field1_done = 0;
dma_q->lines_per_field = dev->height / 2;
dma_q->bytes_left_in_line = dev->width << 1;
dma_q->lines_completed = 0;
dma_q->mpeg_buffer_done = 0;
dma_q->left_data_count = 0;
dma_q->mpeg_buffer_completed = 0;
dma_q->ps_head[0] = 0x00;
dma_q->ps_head[1] = 0x00;
dma_q->ps_head[2] = 0x01;
dma_q->ps_head[3] = 0xBA;
for (i = 0; i < 8; i++)
dma_q->partial_buf[i] = 0;
dev->video_mode.bulk_ctl.urb =
kcalloc(num_bufs, sizeof(void *), GFP_KERNEL);
if (!dev->video_mode.bulk_ctl.urb) {
dev_err(dev->dev,
"cannot alloc memory for usb buffers\n");
return -ENOMEM;
}
dev->video_mode.bulk_ctl.transfer_buffer =
kcalloc(num_bufs, sizeof(void *), GFP_KERNEL);
if (!dev->video_mode.bulk_ctl.transfer_buffer) {
dev_err(dev->dev,
"cannot allocate memory for usbtransfer\n");
kfree(dev->video_mode.bulk_ctl.urb);
return -ENOMEM;
}
dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size;
dev->video_mode.bulk_ctl.buf = NULL;
sb_size = max_packets * dev->video_mode.bulk_ctl.max_pkt_size;
if (dev->mode_tv == 1)
dev->video_mode.end_point_addr = 0x81;
else
dev->video_mode.end_point_addr = 0x84;
/* allocate urbs and transfer buffers */
for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb) {
cx231xx_uninit_bulk(dev);
return -ENOMEM;
}
dev->video_mode.bulk_ctl.urb[i] = urb;
urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
dev->video_mode.bulk_ctl.transfer_buffer[i] =
usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL,
&urb->transfer_dma);
if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) {
dev_err(dev->dev,
"unable to allocate %i bytes for transfer buffer %i\n",
sb_size, i);
cx231xx_uninit_bulk(dev);
return -ENOMEM;
}
memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size);
pipe = usb_rcvbulkpipe(dev->udev,
dev->video_mode.end_point_addr);
usb_fill_bulk_urb(urb, dev->udev, pipe,
dev->video_mode.bulk_ctl.transfer_buffer[i],
sb_size, cx231xx_bulk_irq_callback, dma_q);
}
/* clear halt */
rc = usb_clear_halt(dev->udev, dev->video_mode.bulk_ctl.urb[0]->pipe);
if (rc < 0) {
dev_err(dev->dev,
"failed to clear USB bulk endpoint stall/halt condition (error=%i)\n",
rc);
cx231xx_uninit_bulk(dev);
return rc;
}
init_waitqueue_head(&dma_q->wq);
/* submit urbs and enables IRQ */
for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i],
GFP_ATOMIC);
if (rc) {
dev_err(dev->dev,
"submit of urb %i failed (error=%i)\n", i, rc);
cx231xx_uninit_bulk(dev);
return rc;
}
}
if (dev->mode_tv == 0)
cx231xx_capture_start(dev, 1, Raw_Video);
else
cx231xx_capture_start(dev, 1, TS1_serial_mode);
return 0;
}
EXPORT_SYMBOL_GPL(cx231xx_init_bulk);
void cx231xx_stop_TS1(struct cx231xx *dev)
{
u8 val[4] = { 0, 0, 0, 0 };
val[0] = 0x00;
val[1] = 0x03;
val[2] = 0x00;
val[3] = 0x00;
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
TS_MODE_REG, val, 4);
val[0] = 0x00;
val[1] = 0x70;
val[2] = 0x04;
val[3] = 0x00;
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
TS1_CFG_REG, val, 4);
}
/* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */
void cx231xx_start_TS1(struct cx231xx *dev)
{
u8 val[4] = { 0, 0, 0, 0 };
val[0] = 0x03;
val[1] = 0x03;
val[2] = 0x00;
val[3] = 0x00;
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
TS_MODE_REG, val, 4);
val[0] = 0x04;
val[1] = 0xA3;
val[2] = 0x3B;
val[3] = 0x00;
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
TS1_CFG_REG, val, 4);
}
/* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */
/*****************************************************************
* Device Init/UnInit functions *
******************************************************************/
int cx231xx_dev_init(struct cx231xx *dev)
{
int errCode = 0;
/* Initialize I2C bus */
/* External Master 1 Bus */
dev->i2c_bus[0].nr = 0;
dev->i2c_bus[0].dev = dev;
dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; /* 100 KHz */
dev->i2c_bus[0].i2c_nostop = 0;
dev->i2c_bus[0].i2c_reserve = 0;
dev->i2c_bus[0].i2c_rc = -ENODEV;
/* External Master 2 Bus */
dev->i2c_bus[1].nr = 1;
dev->i2c_bus[1].dev = dev;
dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; /* 100 KHz */
dev->i2c_bus[1].i2c_nostop = 0;
dev->i2c_bus[1].i2c_reserve = 0;
dev->i2c_bus[1].i2c_rc = -ENODEV;
/* Internal Master 3 Bus */
dev->i2c_bus[2].nr = 2;
dev->i2c_bus[2].dev = dev;
dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; /* 100kHz */
dev->i2c_bus[2].i2c_nostop = 0;
dev->i2c_bus[2].i2c_reserve = 0;
dev->i2c_bus[2].i2c_rc = -ENODEV;
/* register I2C buses */
errCode = cx231xx_i2c_register(&dev->i2c_bus[0]);
if (errCode < 0)
return errCode;
errCode = cx231xx_i2c_register(&dev->i2c_bus[1]);
if (errCode < 0)
return errCode;
errCode = cx231xx_i2c_register(&dev->i2c_bus[2]);
if (errCode < 0)
return errCode;
errCode = cx231xx_i2c_mux_create(dev);
if (errCode < 0) {
dev_err(dev->dev,
"%s: Failed to create I2C mux\n", __func__);
return errCode;
}
errCode = cx231xx_i2c_mux_register(dev, 0);
if (errCode < 0)
return errCode;
errCode = cx231xx_i2c_mux_register(dev, 1);
if (errCode < 0)
return errCode;
/* scan the real bus segments in the order of physical port numbers */
cx231xx_do_i2c_scan(dev, I2C_0);
cx231xx_do_i2c_scan(dev, I2C_1_MUX_1);
cx231xx_do_i2c_scan(dev, I2C_2);
cx231xx_do_i2c_scan(dev, I2C_1_MUX_3);
/* init hardware */
/* Note : with out calling set power mode function,
afe can not be set up correctly */
if (dev->board.external_av) {
errCode = cx231xx_set_power_mode(dev,
POLARIS_AVMODE_ENXTERNAL_AV);
if (errCode < 0) {
dev_err(dev->dev,
"%s: Failed to set Power - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
} else {
errCode = cx231xx_set_power_mode(dev,
POLARIS_AVMODE_ANALOGT_TV);
if (errCode < 0) {
dev_err(dev->dev,
"%s: Failed to set Power - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
}
/* reset the Tuner, if it is a Xceive tuner */
if ((dev->board.tuner_type == TUNER_XC5000) ||
(dev->board.tuner_type == TUNER_XC2028))
cx231xx_gpio_set(dev, dev->board.tuner_gpio);
/* initialize Colibri block */
errCode = cx231xx_afe_init_super_block(dev, 0x23c);
if (errCode < 0) {
dev_err(dev->dev,
"%s: cx231xx_afe init super block - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
errCode = cx231xx_afe_init_channels(dev);
if (errCode < 0) {
dev_err(dev->dev,
"%s: cx231xx_afe init channels - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
/* Set DIF in By pass mode */
errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
if (errCode < 0) {
dev_err(dev->dev,
"%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
/* I2S block related functions */
errCode = cx231xx_i2s_blk_initialize(dev);
if (errCode < 0) {
dev_err(dev->dev,
"%s: cx231xx_i2s block initialize - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
/* init control pins */
errCode = cx231xx_init_ctrl_pin_status(dev);
if (errCode < 0) {
dev_err(dev->dev,
"%s: cx231xx_init ctrl pins - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
/* set AGC mode to Analog */
switch (dev->model) {
case CX231XX_BOARD_CNXT_CARRAERA:
case CX231XX_BOARD_CNXT_RDE_250:
case CX231XX_BOARD_CNXT_SHELBY:
case CX231XX_BOARD_CNXT_RDU_250:
errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
break;
case CX231XX_BOARD_CNXT_RDE_253S:
case CX231XX_BOARD_CNXT_RDU_253S:
case CX231XX_BOARD_HAUPPAUGE_EXETER:
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
break;
default:
break;
}
if (errCode < 0) {
dev_err(dev->dev,
"%s: cx231xx_AGC mode to Analog - errCode [%d]!\n",
__func__, errCode);
return errCode;
}
/* set all alternate settings to zero initially */
cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0);
cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
cx231xx_set_alt_setting(dev, INDEX_HANC, 0);
if (dev->board.has_dvb)
cx231xx_set_alt_setting(dev, INDEX_TS1, 0);
errCode = 0;
return errCode;
}
EXPORT_SYMBOL_GPL(cx231xx_dev_init);
void cx231xx_dev_uninit(struct cx231xx *dev)
{
/* Un Initialize I2C bus */
cx231xx_i2c_mux_unregister(dev);
cx231xx_i2c_unregister(&dev->i2c_bus[2]);
cx231xx_i2c_unregister(&dev->i2c_bus[1]);
cx231xx_i2c_unregister(&dev->i2c_bus[0]);
}
EXPORT_SYMBOL_GPL(cx231xx_dev_uninit);
/*****************************************************************
* G P I O related functions *
******************************************************************/
int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
u8 len, u8 request, u8 direction)
{
int status = 0;
struct VENDOR_REQUEST_IN ven_req;
/* Set wValue */
ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff);
/* set request */
if (!request) {
if (direction)
ven_req.bRequest = VRT_GET_GPIO; /* 0x9 gpio */
else
ven_req.bRequest = VRT_SET_GPIO; /* 0x8 gpio */
} else {
if (direction)
ven_req.bRequest = VRT_GET_GPIE; /* 0xb gpie */
else
ven_req.bRequest = VRT_SET_GPIE; /* 0xa gpie */
}
/* set index value */
ven_req.wIndex = (u16) (gpio_bit & 0xffff);
/* set wLength value */
ven_req.wLength = len;
/* set bData value */
ven_req.bData = 0;
/* set the buffer for read / write */
ven_req.pBuff = gpio_val;
/* set the direction */
if (direction) {
ven_req.direction = USB_DIR_IN;
memset(ven_req.pBuff, 0x00, ven_req.wLength);
} else
ven_req.direction = USB_DIR_OUT;
/* call common vendor command request */
status = cx231xx_send_vendor_cmd(dev, &ven_req);
if (status < 0) {
dev_err(dev->dev, "%s: failed with status -%d\n",
__func__, status);
}
return status;
}
EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd);
/*****************************************************************
* C O N T R O L - Register R E A D / W R I T E functions *
*****************************************************************/
int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode)
{
u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
u32 tmp = 0;
int status = 0;
status =
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4);
if (status < 0)
return status;
tmp = le32_to_cpu(*((__le32 *) value));
tmp |= mode;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status =
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4);
return status;
}
/*****************************************************************
* I 2 C Internal C O N T R O L functions *
*****************************************************************/
int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
u8 saddr_len, u32 *data, u8 data_len, int master)
{
int status = 0;
struct cx231xx_i2c_xfer_data req_data;
u8 value[64] = "0";
if (saddr_len == 0)
saddr = 0;
else if (saddr_len == 1)
saddr &= 0xff;
/* prepare xfer_data struct */
req_data.dev_addr = dev_addr >> 1;
req_data.direction = I2C_M_RD;
req_data.saddr_len = saddr_len;
req_data.saddr_dat = saddr;
req_data.buf_size = data_len;
req_data.p_buffer = (u8 *) value;
/* usb send command */
if (master == 0)
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0],
&req_data);
else if (master == 1)
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1],
&req_data);
else if (master == 2)
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2],
&req_data);
if (status >= 0) {
/* Copy the data read back to main buffer */
if (data_len == 1)
*data = value[0];
else if (data_len == 4)
*data =
value[0] | value[1] << 8 | value[2] << 16 | value[3]
<< 24;
else if (data_len > 4)
*data = value[saddr];
}
return status;
}
int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
u8 saddr_len, u32 data, u8 data_len, int master)
{
int status = 0;
u8 value[4] = { 0, 0, 0, 0 };
struct cx231xx_i2c_xfer_data req_data;
value[0] = (u8) data;
value[1] = (u8) (data >> 8);
value[2] = (u8) (data >> 16);
value[3] = (u8) (data >> 24);
if (saddr_len == 0)
saddr = 0;
else if (saddr_len == 1)
saddr &= 0xff;
/* prepare xfer_data struct */
req_data.dev_addr = dev_addr >> 1;
req_data.direction = 0;
req_data.saddr_len = saddr_len;
req_data.saddr_dat = saddr;
req_data.buf_size = data_len;
req_data.p_buffer = value;
/* usb send command */
if (master == 0)
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0],
&req_data);
else if (master == 1)
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1],
&req_data);
else if (master == 2)
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2],
&req_data);
return status;
}
int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
u8 saddr_len, u32 *data, u8 data_len)
{
int status = 0;
struct cx231xx_i2c_xfer_data req_data;
u8 value[4] = { 0, 0, 0, 0 };
if (saddr_len == 0)
saddr = 0;
else if (saddr_len == 1)
saddr &= 0xff;
/* prepare xfer_data struct */
req_data.dev_addr = dev_addr >> 1;
req_data.direction = I2C_M_RD;
req_data.saddr_len = saddr_len;
req_data.saddr_dat = saddr;
req_data.buf_size = data_len;
req_data.p_buffer = (u8 *) value;
/* usb send command */
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
if (status >= 0) {
/* Copy the data read back to main buffer */
if (data_len == 1)
*data = value[0];
else
*data =
value[0] | value[1] << 8 | value[2] << 16 | value[3]
<< 24;
}
return status;
}
int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
u8 saddr_len, u32 data, u8 data_len)
{
int status = 0;
u8 value[4] = { 0, 0, 0, 0 };
struct cx231xx_i2c_xfer_data req_data;
value[0] = (u8) data;
value[1] = (u8) (data >> 8);
value[2] = (u8) (data >> 16);
value[3] = (u8) (data >> 24);
if (saddr_len == 0)
saddr = 0;
else if (saddr_len == 1)
saddr &= 0xff;
/* prepare xfer_data struct */
req_data.dev_addr = dev_addr >> 1;
req_data.direction = 0;
req_data.saddr_len = saddr_len;
req_data.saddr_dat = saddr;
req_data.buf_size = data_len;
req_data.p_buffer = value;
/* usb send command */
status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
return status;
}
int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
u16 register_address, u8 bit_start, u8 bit_end,
u32 value)
{
int status = 0;
u32 tmp;
u32 mask = 0;
int i;
if (bit_start > (size - 1) || bit_end > (size - 1))
return -1;
if (size == 8) {
status =
cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
&tmp, 1);
} else {
status =
cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
&tmp, 4);
}
if (status < 0)
return status;
mask = 1 << bit_end;
for (i = bit_end; i > bit_start && i > 0; i--)
mask = mask + (1 << (i - 1));
value <<= bit_start;
if (size == 8) {
tmp &= ~mask;
tmp |= value;
tmp &= 0xff;
status =
cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
tmp, 1);
} else {
tmp &= ~mask;
tmp |= value;
status =
cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
tmp, 4);
}
return status;
}
int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
u16 saddr, u32 mask, u32 value)
{
u32 temp;
int status = 0;
status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4);
if (status < 0)
return status;
temp &= ~mask;
temp |= value;
status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4);
return status;
}
u32 cx231xx_set_field(u32 field_mask, u32 data)
{
u32 temp;
for (temp = field_mask; (temp & 1) == 0; temp >>= 1)
data <<= 1;
return data;
}
| linux-master | drivers/media/usb/cx231xx/cx231xx-core.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
cx231xx_avcore.c - driver for Conexant Cx23100/101/102
USB video capture devices
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
This program contains the specific code to control the avdecoder chip and
other related usb control functions for cx231xx based chipset.
*/
#include "cx231xx.h"
#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/bitmap.h>
#include <linux/i2c.h>
#include <linux/mm.h>
#include <linux/mutex.h>
#include <media/tuner.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include "cx231xx-dif.h"
#define TUNER_MODE_FM_RADIO 0
/******************************************************************************
-: BLOCK ARRANGEMENT :-
I2S block ----------------------|
[I2S audio] |
|
Analog Front End --> Direct IF -|-> Cx25840 --> Audio
[video & audio] | [Audio]
|
|-> Cx25840 --> Video
[Video]
*******************************************************************************/
/******************************************************************************
* VERVE REGISTER *
* *
******************************************************************************/
static int verve_write_byte(struct cx231xx *dev, u8 saddr, u8 data)
{
return cx231xx_write_i2c_data(dev, VERVE_I2C_ADDRESS,
saddr, 1, data, 1);
}
static int verve_read_byte(struct cx231xx *dev, u8 saddr, u8 *data)
{
int status;
u32 temp = 0;
status = cx231xx_read_i2c_data(dev, VERVE_I2C_ADDRESS,
saddr, 1, &temp, 1);
*data = (u8) temp;
return status;
}
void initGPIO(struct cx231xx *dev)
{
u32 _gpio_direction = 0;
u32 value = 0;
u8 val = 0;
_gpio_direction = _gpio_direction & 0xFC0003FF;
_gpio_direction = _gpio_direction | 0x03FDFC00;
cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0);
verve_read_byte(dev, 0x07, &val);
dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val);
verve_write_byte(dev, 0x07, 0xF4);
verve_read_byte(dev, 0x07, &val);
dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val);
cx231xx_capture_start(dev, 1, Vbi);
cx231xx_mode_register(dev, EP_MODE_SET, 0x0500FE00);
cx231xx_mode_register(dev, GBULK_BIT_EN, 0xFFFDFFFF);
}
void uninitGPIO(struct cx231xx *dev)
{
u8 value[4] = { 0, 0, 0, 0 };
cx231xx_capture_start(dev, 0, Vbi);
verve_write_byte(dev, 0x07, 0x14);
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
0x68, value, 4);
}
/******************************************************************************
* A F E - B L O C K C O N T R O L functions *
* [ANALOG FRONT END] *
******************************************************************************/
static int afe_write_byte(struct cx231xx *dev, u16 saddr, u8 data)
{
return cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS,
saddr, 2, data, 1);
}
static int afe_read_byte(struct cx231xx *dev, u16 saddr, u8 *data)
{
int status;
u32 temp = 0;
status = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
saddr, 2, &temp, 1);
*data = (u8) temp;
return status;
}
int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count)
{
int status = 0;
u8 temp = 0;
u8 afe_power_status = 0;
int i = 0;
/* super block initialize */
temp = (u8) (ref_count & 0xff);
status = afe_write_byte(dev, SUP_BLK_TUNE2, temp);
if (status < 0)
return status;
status = afe_read_byte(dev, SUP_BLK_TUNE2, &afe_power_status);
if (status < 0)
return status;
temp = (u8) ((ref_count & 0x300) >> 8);
temp |= 0x40;
status = afe_write_byte(dev, SUP_BLK_TUNE1, temp);
if (status < 0)
return status;
status = afe_write_byte(dev, SUP_BLK_PLL2, 0x0f);
if (status < 0)
return status;
/* enable pll */
while (afe_power_status != 0x18) {
status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18);
if (status < 0) {
dev_dbg(dev->dev,
"%s: Init Super Block failed in send cmd\n",
__func__);
break;
}
status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status);
afe_power_status &= 0xff;
if (status < 0) {
dev_dbg(dev->dev,
"%s: Init Super Block failed in receive cmd\n",
__func__);
break;
}
i++;
if (i == 10) {
dev_dbg(dev->dev,
"%s: Init Super Block force break in loop !!!!\n",
__func__);
status = -1;
break;
}
}
if (status < 0)
return status;
/* start tuning filter */
status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x40);
if (status < 0)
return status;
msleep(5);
/* exit tuning */
status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x00);
return status;
}
int cx231xx_afe_init_channels(struct cx231xx *dev)
{
int status = 0;
/* power up all 3 channels, clear pd_buffer */
status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, 0x00);
status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, 0x00);
status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00);
/* Enable quantizer calibration */
status = afe_write_byte(dev, ADC_COM_QUANT, 0x02);
/* channel initialize, force modulator (fb) reset */
status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x17);
status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x17);
status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x17);
/* start quantilizer calibration */
status = afe_write_byte(dev, ADC_CAL_ATEST_CH1, 0x10);
status = afe_write_byte(dev, ADC_CAL_ATEST_CH2, 0x10);
status = afe_write_byte(dev, ADC_CAL_ATEST_CH3, 0x10);
msleep(5);
/* exit modulator (fb) reset */
status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x07);
status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x07);
status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x07);
/* enable the pre_clamp in each channel for single-ended input */
status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH1, 0xf0);
status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH2, 0xf0);
status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, 0xf0);
/* use diode instead of resistor, so set term_en to 0, res_en to 0 */
status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
ADC_QGAIN_RES_TRM_CH1, 3, 7, 0x00);
status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
ADC_QGAIN_RES_TRM_CH2, 3, 7, 0x00);
status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
ADC_QGAIN_RES_TRM_CH3, 3, 7, 0x00);
/* dynamic element matching off */
status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH1, 0x03);
status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH2, 0x03);
status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, 0x03);
return status;
}
int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev)
{
u8 c_value = 0;
int status = 0;
status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH2, &c_value);
c_value &= (~(0x50));
status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, c_value);
return status;
}
/*
The Analog Front End in Cx231xx has 3 channels. These
channels are used to share between different inputs
like tuner, s-video and composite inputs.
channel 1 ----- pin 1 to pin4(in reg is 1-4)
channel 2 ----- pin 5 to pin8(in reg is 5-8)
channel 3 ----- pin 9 to pin 12(in reg is 9-11)
*/
int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux)
{
u8 ch1_setting = (u8) input_mux;
u8 ch2_setting = (u8) (input_mux >> 8);
u8 ch3_setting = (u8) (input_mux >> 16);
int status = 0;
u8 value = 0;
if (ch1_setting != 0) {
status = afe_read_byte(dev, ADC_INPUT_CH1, &value);
value &= ~INPUT_SEL_MASK;
value |= (ch1_setting - 1) << 4;
value &= 0xff;
status = afe_write_byte(dev, ADC_INPUT_CH1, value);
}
if (ch2_setting != 0) {
status = afe_read_byte(dev, ADC_INPUT_CH2, &value);
value &= ~INPUT_SEL_MASK;
value |= (ch2_setting - 1) << 4;
value &= 0xff;
status = afe_write_byte(dev, ADC_INPUT_CH2, value);
}
/* For ch3_setting, the value to put in the register is
7 less than the input number */
if (ch3_setting != 0) {
status = afe_read_byte(dev, ADC_INPUT_CH3, &value);
value &= ~INPUT_SEL_MASK;
value |= (ch3_setting - 1) << 4;
value &= 0xff;
status = afe_write_byte(dev, ADC_INPUT_CH3, value);
}
return status;
}
int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
{
int status = 0;
/*
* FIXME: We need to implement the AFE code for LOW IF and for HI IF.
* Currently, only baseband works.
*/
switch (mode) {
case AFE_MODE_LOW_IF:
cx231xx_Setup_AFE_for_LowIF(dev);
break;
case AFE_MODE_BASEBAND:
status = cx231xx_afe_setup_AFE_for_baseband(dev);
break;
case AFE_MODE_EU_HI_IF:
/* SetupAFEforEuHiIF(); */
break;
case AFE_MODE_US_HI_IF:
/* SetupAFEforUsHiIF(); */
break;
case AFE_MODE_JAPAN_HI_IF:
/* SetupAFEforJapanHiIF(); */
break;
}
if ((mode != dev->afe_mode) &&
(dev->video_input == CX231XX_VMUX_TELEVISION))
status = cx231xx_afe_adjust_ref_count(dev,
CX231XX_VMUX_TELEVISION);
dev->afe_mode = mode;
return status;
}
int cx231xx_afe_update_power_control(struct cx231xx *dev,
enum AV_MODE avmode)
{
u8 afe_power_status = 0;
int status = 0;
switch (dev->model) {
case CX231XX_BOARD_CNXT_CARRAERA:
case CX231XX_BOARD_CNXT_RDE_250:
case CX231XX_BOARD_CNXT_SHELBY:
case CX231XX_BOARD_CNXT_RDU_250:
case CX231XX_BOARD_CNXT_RDE_253S:
case CX231XX_BOARD_CNXT_RDU_253S:
case CX231XX_BOARD_CNXT_VIDEO_GRABBER:
case CX231XX_BOARD_HAUPPAUGE_EXETER:
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
case CX231XX_BOARD_HAUPPAUGE_USBLIVE2:
case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
case CX231XX_BOARD_OTG102:
if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL);
status |= afe_read_byte(dev, SUP_BLK_PWRDN,
&afe_power_status);
if (status < 0)
break;
}
status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
0x00);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
0x00);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
0x00);
} else if (avmode == POLARIS_AVMODE_DIGITAL) {
status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
0x70);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
0x70);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
0x70);
status |= afe_read_byte(dev, SUP_BLK_PWRDN,
&afe_power_status);
afe_power_status |= FLD_PWRDN_PD_BANDGAP |
FLD_PWRDN_PD_BIAS |
FLD_PWRDN_PD_TUNECK;
status |= afe_write_byte(dev, SUP_BLK_PWRDN,
afe_power_status);
} else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL);
status |= afe_read_byte(dev, SUP_BLK_PWRDN,
&afe_power_status);
if (status < 0)
break;
}
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
0x00);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
0x00);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
0x00);
} else {
dev_dbg(dev->dev, "Invalid AV mode input\n");
status = -1;
}
break;
default:
if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL);
status |= afe_read_byte(dev, SUP_BLK_PWRDN,
&afe_power_status);
if (status < 0)
break;
}
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
0x40);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
0x40);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
0x00);
} else if (avmode == POLARIS_AVMODE_DIGITAL) {
status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
0x70);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
0x70);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
0x70);
status |= afe_read_byte(dev, SUP_BLK_PWRDN,
&afe_power_status);
afe_power_status |= FLD_PWRDN_PD_BANDGAP |
FLD_PWRDN_PD_BIAS |
FLD_PWRDN_PD_TUNECK;
status |= afe_write_byte(dev, SUP_BLK_PWRDN,
afe_power_status);
} else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL)) {
status = afe_write_byte(dev, SUP_BLK_PWRDN,
FLD_PWRDN_TUNING_BIAS |
FLD_PWRDN_ENABLE_PLL);
status |= afe_read_byte(dev, SUP_BLK_PWRDN,
&afe_power_status);
if (status < 0)
break;
}
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
0x00);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
0x00);
status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
0x40);
} else {
dev_dbg(dev->dev, "Invalid AV mode input\n");
status = -1;
}
} /* switch */
return status;
}
int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input)
{
u8 input_mode = 0;
u8 ntf_mode = 0;
int status = 0;
dev->video_input = video_input;
if (video_input == CX231XX_VMUX_TELEVISION) {
status = afe_read_byte(dev, ADC_INPUT_CH3, &input_mode);
status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3,
&ntf_mode);
} else {
status = afe_read_byte(dev, ADC_INPUT_CH1, &input_mode);
status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH1,
&ntf_mode);
}
input_mode = (ntf_mode & 0x3) | ((input_mode & 0x6) << 1);
switch (input_mode) {
case SINGLE_ENDED:
dev->afe_ref_count = 0x23C;
break;
case LOW_IF:
dev->afe_ref_count = 0x24C;
break;
case EU_IF:
dev->afe_ref_count = 0x258;
break;
case US_IF:
dev->afe_ref_count = 0x260;
break;
default:
break;
}
status = cx231xx_afe_init_super_block(dev, dev->afe_ref_count);
return status;
}
/******************************************************************************
* V I D E O / A U D I O D E C O D E R C O N T R O L functions *
******************************************************************************/
static int vid_blk_write_byte(struct cx231xx *dev, u16 saddr, u8 data)
{
return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
saddr, 2, data, 1);
}
static int vid_blk_read_byte(struct cx231xx *dev, u16 saddr, u8 *data)
{
int status;
u32 temp = 0;
status = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
saddr, 2, &temp, 1);
*data = (u8) temp;
return status;
}
static int vid_blk_write_word(struct cx231xx *dev, u16 saddr, u32 data)
{
return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
saddr, 2, data, 4);
}
static int vid_blk_read_word(struct cx231xx *dev, u16 saddr, u32 *data)
{
return cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
saddr, 2, data, 4);
}
int cx231xx_check_fw(struct cx231xx *dev)
{
u8 temp = 0;
int status = 0;
status = vid_blk_read_byte(dev, DL_CTL_ADDRESS_LOW, &temp);
if (status < 0)
return status;
else
return temp;
}
int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
{
int status = 0;
switch (INPUT(input)->type) {
case CX231XX_VMUX_COMPOSITE1:
case CX231XX_VMUX_SVIDEO:
if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
(dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) {
/* External AV */
status = cx231xx_set_power_mode(dev,
POLARIS_AVMODE_ENXTERNAL_AV);
if (status < 0) {
dev_err(dev->dev,
"%s: Failed to set Power - errCode [%d]!\n",
__func__, status);
return status;
}
}
status = cx231xx_set_decoder_video_input(dev,
INPUT(input)->type,
INPUT(input)->vmux);
break;
case CX231XX_VMUX_TELEVISION:
case CX231XX_VMUX_CABLE:
if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
(dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) {
/* Tuner */
status = cx231xx_set_power_mode(dev,
POLARIS_AVMODE_ANALOGT_TV);
if (status < 0) {
dev_err(dev->dev,
"%s: Failed to set Power - errCode [%d]!\n",
__func__, status);
return status;
}
}
switch (dev->model) { /* i2c device tuners */
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_975:
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
status = cx231xx_set_decoder_video_input(dev,
CX231XX_VMUX_TELEVISION,
INPUT(input)->vmux);
break;
default:
if (dev->tuner_type == TUNER_NXP_TDA18271)
status = cx231xx_set_decoder_video_input(dev,
CX231XX_VMUX_TELEVISION,
INPUT(input)->vmux);
else
status = cx231xx_set_decoder_video_input(dev,
CX231XX_VMUX_COMPOSITE1,
INPUT(input)->vmux);
break;
}
break;
default:
dev_err(dev->dev, "%s: Unknown Input %d !\n",
__func__, INPUT(input)->type);
break;
}
/* save the selection */
dev->video_input = input;
return status;
}
int cx231xx_set_decoder_video_input(struct cx231xx *dev,
u8 pin_type, u8 input)
{
int status = 0;
u32 value = 0;
if (pin_type != dev->video_input) {
status = cx231xx_afe_adjust_ref_count(dev, pin_type);
if (status < 0) {
dev_err(dev->dev,
"%s: adjust_ref_count :Failed to set AFE input mux - errCode [%d]!\n",
__func__, status);
return status;
}
}
/* call afe block to set video inputs */
status = cx231xx_afe_set_input_mux(dev, input);
if (status < 0) {
dev_err(dev->dev,
"%s: set_input_mux :Failed to set AFE input mux - errCode [%d]!\n",
__func__, status);
return status;
}
switch (pin_type) {
case CX231XX_VMUX_COMPOSITE1:
status = vid_blk_read_word(dev, AFE_CTRL, &value);
value |= (0 << 13) | (1 << 4);
value &= ~(1 << 5);
/* set [24:23] [22:15] to 0 */
value &= (~(0x1ff8000));
/* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
value |= 0x1000000;
status = vid_blk_write_word(dev, AFE_CTRL, value);
status = vid_blk_read_word(dev, OUT_CTRL1, &value);
value |= (1 << 7);
status = vid_blk_write_word(dev, OUT_CTRL1, value);
/* Set output mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
OUT_CTRL1,
FLD_OUT_MODE,
dev->board.output_mode);
/* Tell DIF object to go to baseband mode */
status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
if (status < 0) {
dev_err(dev->dev,
"%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
__func__, status);
return status;
}
/* Read the DFE_CTRL1 register */
status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* enable the VBI_GATE_EN */
value |= FLD_VBI_GATE_EN;
/* Enable the auto-VGA enable */
value |= FLD_VGA_AUTO_EN;
/* Write it back */
status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set CVBS input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
break;
case CX231XX_VMUX_SVIDEO:
/* Disable the use of DIF */
status = vid_blk_read_word(dev, AFE_CTRL, &value);
/* set [24:23] [22:15] to 0 */
value &= (~(0x1ff8000));
/* set FUNC_MODE[24:23] = 2
IF_MOD[22:15] = 0 DCR_BYP_CH2[4:4] = 1; */
value |= 0x1000010;
status = vid_blk_write_word(dev, AFE_CTRL, value);
/* Tell DIF object to go to baseband mode */
status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
if (status < 0) {
dev_err(dev->dev,
"%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
__func__, status);
return status;
}
/* Read the DFE_CTRL1 register */
status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* enable the VBI_GATE_EN */
value |= FLD_VBI_GATE_EN;
/* Enable the auto-VGA enable */
value |= FLD_VGA_AUTO_EN;
/* Write it back */
status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set YC input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL,
FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_YC_1));
/* Chroma to ADC2 */
status = vid_blk_read_word(dev, AFE_CTRL, &value);
value |= FLD_CHROMA_IN_SEL; /* set the chroma in select */
/* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8)
This sets them to use video
rather than audio. Only one of the two will be in use. */
value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3);
status = vid_blk_write_word(dev, AFE_CTRL, value);
status = cx231xx_afe_set_mode(dev, AFE_MODE_BASEBAND);
break;
case CX231XX_VMUX_TELEVISION:
case CX231XX_VMUX_CABLE:
default:
/* TODO: Test if this is also needed for xc2028/xc3028 */
if (dev->board.tuner_type == TUNER_XC5000) {
/* Disable the use of DIF */
status = vid_blk_read_word(dev, AFE_CTRL, &value);
value |= (0 << 13) | (1 << 4);
value &= ~(1 << 5);
/* set [24:23] [22:15] to 0 */
value &= (~(0x1FF8000));
/* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
value |= 0x1000000;
status = vid_blk_write_word(dev, AFE_CTRL, value);
status = vid_blk_read_word(dev, OUT_CTRL1, &value);
value |= (1 << 7);
status = vid_blk_write_word(dev, OUT_CTRL1, value);
/* Set output mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
OUT_CTRL1, FLD_OUT_MODE,
dev->board.output_mode);
/* Tell DIF object to go to baseband mode */
status = cx231xx_dif_set_standard(dev,
DIF_USE_BASEBAND);
if (status < 0) {
dev_err(dev->dev,
"%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
__func__, status);
return status;
}
/* Read the DFE_CTRL1 register */
status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* enable the VBI_GATE_EN */
value |= FLD_VBI_GATE_EN;
/* Enable the auto-VGA enable */
value |= FLD_VGA_AUTO_EN;
/* Write it back */
status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set CVBS input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE,
INPUT_MODE_CVBS_0));
} else {
/* Enable the DIF for the tuner */
/* Reinitialize the DIF */
status = cx231xx_dif_set_standard(dev, dev->norm);
if (status < 0) {
dev_err(dev->dev,
"%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
__func__, status);
return status;
}
/* Make sure bypass is cleared */
status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value);
/* Clear the bypass bit */
value &= ~FLD_DIF_DIF_BYPASS;
/* Enable the use of the DIF block */
status = vid_blk_write_word(dev, DIF_MISC_CTRL, value);
/* Read the DFE_CTRL1 register */
status = vid_blk_read_word(dev, DFE_CTRL1, &value);
/* Disable the VBI_GATE_EN */
value &= ~FLD_VBI_GATE_EN;
/* Enable the auto-VGA enable, AGC, and
set the skip count to 2 */
value |= FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN | 0x00200000;
/* Write it back */
status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Wait until AGC locks up */
msleep(1);
/* Disable the auto-VGA enable AGC */
value &= ~(FLD_VGA_AUTO_EN);
/* Write it back */
status = vid_blk_write_word(dev, DFE_CTRL1, value);
/* Enable Polaris B0 AGC output */
status = vid_blk_read_word(dev, PIN_CTRL, &value);
value |= (FLD_OEF_AGC_RF) |
(FLD_OEF_AGC_IFVGA) |
(FLD_OEF_AGC_IF);
status = vid_blk_write_word(dev, PIN_CTRL, value);
/* Set output mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
OUT_CTRL1, FLD_OUT_MODE,
dev->board.output_mode);
/* Disable auto config of registers */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_ACFG_DIS,
cx231xx_set_field(FLD_ACFG_DIS, 1));
/* Set CVBS input mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
MODE_CTRL, FLD_INPUT_MODE,
cx231xx_set_field(FLD_INPUT_MODE,
INPUT_MODE_CVBS_0));
/* Set some bits in AFE_CTRL so that channel 2 or 3
* is ready to receive audio */
/* Clear clamp for channels 2 and 3 (bit 16-17) */
/* Clear droop comp (bit 19-20) */
/* Set VGA_SEL (for audio control) (bit 7-8) */
status = vid_blk_read_word(dev, AFE_CTRL, &value);
/*Set Func mode:01-DIF 10-baseband 11-YUV*/
value &= (~(FLD_FUNC_MODE));
value |= 0x800000;
value |= FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2;
status = vid_blk_write_word(dev, AFE_CTRL, value);
if (dev->tuner_type == TUNER_NXP_TDA18271) {
status = vid_blk_read_word(dev, PIN_CTRL,
&value);
status = vid_blk_write_word(dev, PIN_CTRL,
(value & 0xFFFFFFEF));
}
break;
}
break;
}
/* Set raw VBI mode */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
OUT_CTRL1, FLD_VBIHACTRAW_EN,
cx231xx_set_field(FLD_VBIHACTRAW_EN, 1));
status = vid_blk_read_word(dev, OUT_CTRL1, &value);
if (value & 0x02) {
value |= (1 << 19);
status = vid_blk_write_word(dev, OUT_CTRL1, value);
}
return status;
}
void cx231xx_enable656(struct cx231xx *dev)
{
u8 temp = 0;
/*enable TS1 data[0:7] as output to export 656*/
vid_blk_write_byte(dev, TS1_PIN_CTL0, 0xFF);
/*enable TS1 clock as output to export 656*/
vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp);
temp = temp|0x04;
vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);
}
EXPORT_SYMBOL_GPL(cx231xx_enable656);
void cx231xx_disable656(struct cx231xx *dev)
{
u8 temp = 0;
vid_blk_write_byte(dev, TS1_PIN_CTL0, 0x00);
vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp);
temp = temp&0xFB;
vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);
}
EXPORT_SYMBOL_GPL(cx231xx_disable656);
/*
* Handle any video-mode specific overrides that are different
* on a per video standards basis after touching the MODE_CTRL
* register which resets many values for autodetect
*/
int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
{
int status = 0;
dev_dbg(dev->dev, "%s: 0x%x\n",
__func__, (unsigned int)dev->norm);
/* Change the DFE_CTRL3 bp_percent to fix flagging */
status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280);
if (dev->norm & (V4L2_STD_NTSC | V4L2_STD_PAL_M)) {
dev_dbg(dev->dev, "%s: NTSC\n", __func__);
/* Move the close caption lines out of active video,
adjust the active video start point */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_VBLANK_CNT, 0x18);
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_VACTIVE_CNT,
0x1E7000);
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_V656BLANK_CNT,
0x1C000000);
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
HORIZ_TIM_CTRL,
FLD_HBLANK_CNT,
cx231xx_set_field
(FLD_HBLANK_CNT, 0x79));
} else if (dev->norm & V4L2_STD_SECAM) {
dev_dbg(dev->dev, "%s: SECAM\n", __func__);
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_VBLANK_CNT, 0x20);
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_VACTIVE_CNT,
cx231xx_set_field
(FLD_VACTIVE_CNT,
0x244));
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_V656BLANK_CNT,
cx231xx_set_field
(FLD_V656BLANK_CNT,
0x24));
/* Adjust the active video horizontal start point */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
HORIZ_TIM_CTRL,
FLD_HBLANK_CNT,
cx231xx_set_field
(FLD_HBLANK_CNT, 0x85));
} else {
dev_dbg(dev->dev, "%s: PAL\n", __func__);
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_VBLANK_CNT, 0x20);
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_VACTIVE_CNT,
cx231xx_set_field
(FLD_VACTIVE_CNT,
0x244));
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
VERT_TIM_CTRL,
FLD_V656BLANK_CNT,
cx231xx_set_field
(FLD_V656BLANK_CNT,
0x24));
/* Adjust the active video horizontal start point */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
HORIZ_TIM_CTRL,
FLD_HBLANK_CNT,
cx231xx_set_field
(FLD_HBLANK_CNT, 0x85));
}
return status;
}
int cx231xx_unmute_audio(struct cx231xx *dev)
{
return vid_blk_write_byte(dev, PATH1_VOL_CTL, 0x24);
}
EXPORT_SYMBOL_GPL(cx231xx_unmute_audio);
static int stopAudioFirmware(struct cx231xx *dev)
{
return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x03);
}
static int restartAudioFirmware(struct cx231xx *dev)
{
return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x13);
}
int cx231xx_set_audio_input(struct cx231xx *dev, u8 input)
{
int status = 0;
enum AUDIO_INPUT ainput = AUDIO_INPUT_LINE;
switch (INPUT(input)->amux) {
case CX231XX_AMUX_VIDEO:
ainput = AUDIO_INPUT_TUNER_TV;
break;
case CX231XX_AMUX_LINE_IN:
status = cx231xx_i2s_blk_set_audio_input(dev, input);
ainput = AUDIO_INPUT_LINE;
break;
default:
break;
}
status = cx231xx_set_audio_decoder_input(dev, ainput);
return status;
}
int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
enum AUDIO_INPUT audio_input)
{
u32 dwval;
int status;
u8 gen_ctrl;
u32 value = 0;
/* Put it in soft reset */
status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl);
gen_ctrl |= 1;
status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl);
switch (audio_input) {
case AUDIO_INPUT_LINE:
/* setup AUD_IO control from Merlin paralle output */
value = cx231xx_set_field(FLD_AUD_CHAN1_SRC,
AUD_CHAN_SRC_PARALLEL);
status = vid_blk_write_word(dev, AUD_IO_CTRL, value);
/* setup input to Merlin, SRC2 connect to AC97
bypass upsample-by-2, slave mode, sony mode, left justify
adr 091c, dat 01000000 */
status = vid_blk_read_word(dev, AC97_CTL, &dwval);
status = vid_blk_write_word(dev, AC97_CTL,
(dwval | FLD_AC97_UP2X_BYPASS));
/* select the parallel1 and SRC3 */
status = vid_blk_write_word(dev, BAND_OUT_SEL,
cx231xx_set_field(FLD_SRC3_IN_SEL, 0x0) |
cx231xx_set_field(FLD_SRC3_CLK_SEL, 0x0) |
cx231xx_set_field(FLD_PARALLEL1_SRC_SEL, 0x0));
/* unmute all, AC97 in, independence mode
adr 08d0, data 0x00063073 */
status = vid_blk_write_word(dev, DL_CTL, 0x3000001);
status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063073);
/* set AVC maximum threshold, adr 08d4, dat ffff0024 */
status = vid_blk_read_word(dev, PATH1_VOL_CTL, &dwval);
status = vid_blk_write_word(dev, PATH1_VOL_CTL,
(dwval | FLD_PATH1_AVC_THRESHOLD));
/* set SC maximum threshold, adr 08ec, dat ffffb3a3 */
status = vid_blk_read_word(dev, PATH1_SC_CTL, &dwval);
status = vid_blk_write_word(dev, PATH1_SC_CTL,
(dwval | FLD_PATH1_SC_THRESHOLD));
break;
case AUDIO_INPUT_TUNER_TV:
default:
status = stopAudioFirmware(dev);
/* Setup SRC sources and clocks */
status = vid_blk_write_word(dev, BAND_OUT_SEL,
cx231xx_set_field(FLD_SRC6_IN_SEL, 0x00) |
cx231xx_set_field(FLD_SRC6_CLK_SEL, 0x01) |
cx231xx_set_field(FLD_SRC5_IN_SEL, 0x00) |
cx231xx_set_field(FLD_SRC5_CLK_SEL, 0x02) |
cx231xx_set_field(FLD_SRC4_IN_SEL, 0x02) |
cx231xx_set_field(FLD_SRC4_CLK_SEL, 0x03) |
cx231xx_set_field(FLD_SRC3_IN_SEL, 0x00) |
cx231xx_set_field(FLD_SRC3_CLK_SEL, 0x00) |
cx231xx_set_field(FLD_BASEBAND_BYPASS_CTL, 0x00) |
cx231xx_set_field(FLD_AC97_SRC_SEL, 0x03) |
cx231xx_set_field(FLD_I2S_SRC_SEL, 0x00) |
cx231xx_set_field(FLD_PARALLEL2_SRC_SEL, 0x02) |
cx231xx_set_field(FLD_PARALLEL1_SRC_SEL, 0x01));
/* Setup the AUD_IO control */
status = vid_blk_write_word(dev, AUD_IO_CTRL,
cx231xx_set_field(FLD_I2S_PORT_DIR, 0x00) |
cx231xx_set_field(FLD_I2S_OUT_SRC, 0x00) |
cx231xx_set_field(FLD_AUD_CHAN3_SRC, 0x00) |
cx231xx_set_field(FLD_AUD_CHAN2_SRC, 0x00) |
cx231xx_set_field(FLD_AUD_CHAN1_SRC, 0x03));
status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F063870);
/* setAudioStandard(_audio_standard); */
status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063870);
status = restartAudioFirmware(dev);
switch (dev->board.tuner_type) {
case TUNER_XC5000:
/* SIF passthrough at 28.6363 MHz sample rate */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
CHIP_CTRL,
FLD_SIF_EN,
cx231xx_set_field(FLD_SIF_EN, 1));
break;
case TUNER_NXP_TDA18271:
/* Normal mode: SIF passthrough at 14.32 MHz */
status = cx231xx_read_modify_write_i2c_dword(dev,
VID_BLK_I2C_ADDRESS,
CHIP_CTRL,
FLD_SIF_EN,
cx231xx_set_field(FLD_SIF_EN, 0));
break;
default:
switch (dev->model) { /* i2c device tuners */
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_975:
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
/* TODO: Normal mode: SIF passthrough at 14.32 MHz?? */
break;
default:
/* This is just a casual suggestion to people adding
new boards in case they use a tuner type we don't
currently know about */
dev_info(dev->dev,
"Unknown tuner type configuring SIF");
break;
}
}
break;
case AUDIO_INPUT_TUNER_FM:
/* use SIF for FM radio
setupFM();
setAudioStandard(_audio_standard);
*/
break;
case AUDIO_INPUT_MUTE:
status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F011012);
break;
}
/* Take it out of soft reset */
status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl);
gen_ctrl &= ~1;
status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl);
return status;
}
/******************************************************************************
* C H I P Specific C O N T R O L functions *
******************************************************************************/
int cx231xx_init_ctrl_pin_status(struct cx231xx *dev)
{
u32 value;
int status = 0;
status = vid_blk_read_word(dev, PIN_CTRL, &value);
value |= (~dev->board.ctl_pin_status_mask);
status = vid_blk_write_word(dev, PIN_CTRL, value);
return status;
}
int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
u8 analog_or_digital)
{
int status;
/* first set the direction to output */
status = cx231xx_set_gpio_direction(dev,
dev->board.
agc_analog_digital_select_gpio, 1);
/* 0 - demod ; 1 - Analog mode */
status = cx231xx_set_gpio_value(dev,
dev->board.agc_analog_digital_select_gpio,
analog_or_digital);
if (status < 0)
return status;
return 0;
}
int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3)
{
u8 value[4] = { 0, 0, 0, 0 };
int status = 0;
bool current_is_port_3;
/*
* Should this code check dev->port_3_switch_enabled first
* to skip unnecessary reading of the register?
* If yes, the flag dev->port_3_switch_enabled must be initialized
* correctly.
*/
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER,
PWR_CTL_EN, value, 4);
if (status < 0)
return status;
current_is_port_3 = value[0] & I2C_DEMOD_EN ? true : false;
/* Just return, if already using the right port */
if (current_is_port_3 == is_port_3)
return 0;
if (is_port_3)
value[0] |= I2C_DEMOD_EN;
else
value[0] &= ~I2C_DEMOD_EN;
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
/* remember status of the switch for usage in is_tuner */
if (status >= 0)
dev->port_3_switch_enabled = is_port_3;
return status;
}
EXPORT_SYMBOL_GPL(cx231xx_enable_i2c_port_3);
void update_HH_register_after_set_DIF(struct cx231xx *dev)
{
/*
u8 status = 0;
u32 value = 0;
vid_blk_write_word(dev, PIN_CTRL, 0xA0FFF82F);
vid_blk_write_word(dev, DIF_MISC_CTRL, 0x0A203F11);
vid_blk_write_word(dev, DIF_SRC_PHASE_INC, 0x1BEFBF06);
status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390);
status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
*/
}
void cx231xx_dump_HH_reg(struct cx231xx *dev)
{
u32 value = 0;
u16 i = 0;
value = 0x45005390;
vid_blk_write_word(dev, 0x104, value);
for (i = 0x100; i < 0x140; i++) {
vid_blk_read_word(dev, i, &value);
dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value);
i = i+3;
}
for (i = 0x300; i < 0x400; i++) {
vid_blk_read_word(dev, i, &value);
dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value);
i = i+3;
}
for (i = 0x400; i < 0x440; i++) {
vid_blk_read_word(dev, i, &value);
dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value);
i = i+3;
}
vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390);
vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
}
#if 0
static void cx231xx_dump_SC_reg(struct cx231xx *dev)
{
u8 value[4] = { 0, 0, 0, 0 };
dev_dbg(dev->dev, "%s!\n", __func__);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0],
value[1], value[2], value[3]);
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
value, 4);
dev_dbg(dev->dev,
"reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0],
value[1], value[2], value[3]);
}
#endif
void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev)
{
u8 value = 0;
afe_read_byte(dev, ADC_STATUS2_CH3, &value);
value = (value & 0xFE)|0x01;
afe_write_byte(dev, ADC_STATUS2_CH3, value);
afe_read_byte(dev, ADC_STATUS2_CH3, &value);
value = (value & 0xFE)|0x00;
afe_write_byte(dev, ADC_STATUS2_CH3, value);
/*
config colibri to lo-if mode
FIXME: ntf_mode = 2'b00 by default. But set 0x1 would reduce
the diff IF input by half,
for low-if agc defect
*/
afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, &value);
value = (value & 0xFC)|0x00;
afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, value);
afe_read_byte(dev, ADC_INPUT_CH3, &value);
value = (value & 0xF9)|0x02;
afe_write_byte(dev, ADC_INPUT_CH3, value);
afe_read_byte(dev, ADC_FB_FRCRST_CH3, &value);
value = (value & 0xFB)|0x04;
afe_write_byte(dev, ADC_FB_FRCRST_CH3, value);
afe_read_byte(dev, ADC_DCSERVO_DEM_CH3, &value);
value = (value & 0xFC)|0x03;
afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, value);
afe_read_byte(dev, ADC_CTRL_DAC1_CH3, &value);
value = (value & 0xFB)|0x04;
afe_write_byte(dev, ADC_CTRL_DAC1_CH3, value);
afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value);
value = (value & 0xF8)|0x06;
afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value);
afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value);
value = (value & 0x8F)|0x40;
afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value);
afe_read_byte(dev, ADC_PWRDN_CLAMP_CH3, &value);
value = (value & 0xDF)|0x20;
afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, value);
}
void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
u8 spectral_invert, u32 mode)
{
u32 colibri_carrier_offset = 0;
u32 func_mode = 0x01; /* Device has a DIF if this function is called */
u32 standard = 0;
u8 value[4] = { 0, 0, 0, 0 };
dev_dbg(dev->dev, "Enter cx231xx_set_Colibri_For_LowIF()\n");
value[0] = (u8) 0x6F;
value[1] = (u8) 0x6F;
value[2] = (u8) 0x6F;
value[3] = (u8) 0x6F;
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
/*Set colibri for low IF*/
cx231xx_afe_set_mode(dev, AFE_MODE_LOW_IF);
/* Set C2HH for low IF operation.*/
standard = dev->norm;
cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode,
func_mode, standard);
/* Get colibri offsets.*/
colibri_carrier_offset = cx231xx_Get_Colibri_CarrierOffset(mode,
standard);
dev_dbg(dev->dev, "colibri_carrier_offset=%d, standard=0x%x\n",
colibri_carrier_offset, standard);
/* Set the band Pass filter for DIF*/
cx231xx_set_DIF_bandpass(dev, (if_freq+colibri_carrier_offset),
spectral_invert, mode);
}
u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd)
{
u32 colibri_carrier_offset = 0;
if (mode == TUNER_MODE_FM_RADIO) {
colibri_carrier_offset = 1100000;
} else if (standerd & (V4L2_STD_MN | V4L2_STD_NTSC_M_JP)) {
colibri_carrier_offset = 4832000; /*4.83MHz */
} else if (standerd & (V4L2_STD_PAL_B | V4L2_STD_PAL_G)) {
colibri_carrier_offset = 2700000; /*2.70MHz */
} else if (standerd & (V4L2_STD_PAL_D | V4L2_STD_PAL_I
| V4L2_STD_SECAM)) {
colibri_carrier_offset = 2100000; /*2.10MHz */
}
return colibri_carrier_offset;
}
void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
u8 spectral_invert, u32 mode)
{
unsigned long pll_freq_word;
u32 dif_misc_ctrl_value = 0;
u64 pll_freq_u64 = 0;
u32 i = 0;
dev_dbg(dev->dev, "if_freq=%d;spectral_invert=0x%x;mode=0x%x\n",
if_freq, spectral_invert, mode);
if (mode == TUNER_MODE_FM_RADIO) {
pll_freq_word = 0x905A1CAC;
vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word);
} else /*KSPROPERTY_TUNER_MODE_TV*/{
/* Calculate the PLL frequency word based on the adjusted if_freq*/
pll_freq_word = if_freq;
pll_freq_u64 = (u64)pll_freq_word << 28L;
do_div(pll_freq_u64, 50000000);
pll_freq_word = (u32)pll_freq_u64;
/*pll_freq_word = 0x3463497;*/
vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word);
if (spectral_invert) {
if_freq -= 400000;
/* Enable Spectral Invert*/
vid_blk_read_word(dev, DIF_MISC_CTRL,
&dif_misc_ctrl_value);
dif_misc_ctrl_value = dif_misc_ctrl_value | 0x00200000;
vid_blk_write_word(dev, DIF_MISC_CTRL,
dif_misc_ctrl_value);
} else {
if_freq += 400000;
/* Disable Spectral Invert*/
vid_blk_read_word(dev, DIF_MISC_CTRL,
&dif_misc_ctrl_value);
dif_misc_ctrl_value = dif_misc_ctrl_value & 0xFFDFFFFF;
vid_blk_write_word(dev, DIF_MISC_CTRL,
dif_misc_ctrl_value);
}
if_freq = (if_freq / 100000) * 100000;
if (if_freq < 3000000)
if_freq = 3000000;
if (if_freq > 16000000)
if_freq = 16000000;
}
dev_dbg(dev->dev, "Enter IF=%zu\n", ARRAY_SIZE(Dif_set_array));
for (i = 0; i < ARRAY_SIZE(Dif_set_array); i++) {
if (Dif_set_array[i].if_freq == if_freq) {
vid_blk_write_word(dev,
Dif_set_array[i].register_address, Dif_set_array[i].value);
}
}
}
/******************************************************************************
* D I F - B L O C K C O N T R O L functions *
******************************************************************************/
int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
u32 function_mode, u32 standard)
{
int status = 0;
if (mode == V4L2_TUNER_RADIO) {
/* C2HH */
/* lo if big signal */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);
/* FUNC_MODE = DIF */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode);
/* IF_MODE */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xFF);
/* no inv */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);
} else if (standard != DIF_USE_BASEBAND) {
if (standard & V4L2_STD_MN) {
/* lo if big signal */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);
/* FUNC_MODE = DIF */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 23, 24,
function_mode);
/* IF_MODE */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xb);
/* no inv */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);
/* 0x124, AUD_CHAN1_SRC = 0x3 */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AUD_IO_CTRL, 0, 31, 0x00000003);
} else if ((standard == V4L2_STD_PAL_I) |
(standard & V4L2_STD_PAL_D) |
(standard & V4L2_STD_SECAM)) {
/* C2HH setup */
/* lo if big signal */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);
/* FUNC_MODE = DIF */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 23, 24,
function_mode);
/* IF_MODE */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xF);
/* no inv */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);
} else {
/* default PAL BG */
/* C2HH setup */
/* lo if big signal */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);
/* FUNC_MODE = DIF */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 23, 24,
function_mode);
/* IF_MODE */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xE);
/* no inv */
status = cx231xx_reg_mask_write(dev,
VID_BLK_I2C_ADDRESS, 32,
AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);
}
}
return status;
}
int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard)
{
int status = 0;
u32 dif_misc_ctrl_value = 0;
u32 func_mode = 0;
dev_dbg(dev->dev, "%s: setStandard to %x\n", __func__, standard);
status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value);
if (standard != DIF_USE_BASEBAND)
dev->norm = standard;
switch (dev->model) {
case CX231XX_BOARD_CNXT_CARRAERA:
case CX231XX_BOARD_CNXT_RDE_250:
case CX231XX_BOARD_CNXT_SHELBY:
case CX231XX_BOARD_CNXT_RDU_250:
case CX231XX_BOARD_CNXT_VIDEO_GRABBER:
case CX231XX_BOARD_HAUPPAUGE_EXETER:
case CX231XX_BOARD_OTG102:
func_mode = 0x03;
break;
case CX231XX_BOARD_CNXT_RDE_253S:
case CX231XX_BOARD_CNXT_RDU_253S:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
func_mode = 0x01;
break;
default:
func_mode = 0x01;
}
status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode,
func_mode, standard);
if (standard == DIF_USE_BASEBAND) { /* base band */
/* There is a different SRC_PHASE_INC value
for baseband vs. DIF */
status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, 0xDF7DF83);
status = vid_blk_read_word(dev, DIF_MISC_CTRL,
&dif_misc_ctrl_value);
dif_misc_ctrl_value |= FLD_DIF_DIF_BYPASS;
status = vid_blk_write_word(dev, DIF_MISC_CTRL,
dif_misc_ctrl_value);
} else if (standard & V4L2_STD_PAL_D) {
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL3, 0, 31, 0x00008800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_REF, 0, 31, 0x444C1380);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_INT_CURRENT, 0, 31,
0x26001700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_RF_CURRENT, 0, 31,
0x00002660);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VIDEO_AGC_CTRL, 0, 31,
0x72500800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VID_AUD_OVERRIDE, 0, 31,
0x27000100);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AV_SEP_CTRL, 0, 31, 0x3F3934EA);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_COMP_FLT_CTRL, 0, 31,
0x00000000);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_PHASE_INC, 0, 31,
0x1befbf06);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_GAIN_CONTROL, 0, 31,
0x000035e8);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_RPT_VARIANCE, 0, 31, 0x00000000);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value |= 0x3a023F11;
} else if (standard & V4L2_STD_PAL_I) {
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL3, 0, 31, 0x00008800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_REF, 0, 31, 0x444C1380);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_INT_CURRENT, 0, 31,
0x26001700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_RF_CURRENT, 0, 31,
0x00002660);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VIDEO_AGC_CTRL, 0, 31,
0x72500800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VID_AUD_OVERRIDE, 0, 31,
0x27000100);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AV_SEP_CTRL, 0, 31, 0x5F39A934);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_COMP_FLT_CTRL, 0, 31,
0x00000000);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_PHASE_INC, 0, 31,
0x1befbf06);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_GAIN_CONTROL, 0, 31,
0x000035e8);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_RPT_VARIANCE, 0, 31, 0x00000000);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value |= 0x3a033F11;
} else if (standard & V4L2_STD_PAL_M) {
/* improved Low Frequency Phase Noise */
status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C);
status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85);
status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a);
status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800);
status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380);
status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT,
0x26001700);
status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT,
0x00002660);
status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL,
0x72500800);
status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE,
0x27000100);
status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x012c405d);
status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL,
0x009f50c1);
status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC,
0x1befbf06);
status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL,
0x000035e8);
status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB,
0x00000000);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value |= 0x3A0A3F10;
} else if (standard & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) {
/* improved Low Frequency Phase Noise */
status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C);
status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85);
status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a);
status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800);
status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380);
status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT,
0x26001700);
status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT,
0x00002660);
status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL,
0x72500800);
status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE,
0x27000100);
status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL,
0x012c405d);
status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL,
0x009f50c1);
status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC,
0x1befbf06);
status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL,
0x000035e8);
status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB,
0x00000000);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value = 0x3A093F10;
} else if (standard &
(V4L2_STD_SECAM_B | V4L2_STD_SECAM_D | V4L2_STD_SECAM_G |
V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1)) {
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL3, 0, 31, 0x00008800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_REF, 0, 31, 0x888C0380);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_INT_CURRENT, 0, 31,
0x26001700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_RF_CURRENT, 0, 31,
0x00002660);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VID_AUD_OVERRIDE, 0, 31,
0x27000100);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_COMP_FLT_CTRL, 0, 31,
0x00000000);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_PHASE_INC, 0, 31,
0x1befbf06);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_GAIN_CONTROL, 0, 31,
0x000035e8);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_RPT_VARIANCE, 0, 31, 0x00000000);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VIDEO_AGC_CTRL, 0, 31,
0xf4000000);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value |= 0x3a023F11;
} else if (standard & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC)) {
/* Is it SECAM_L1? */
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL3, 0, 31, 0x00008800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_REF, 0, 31, 0x888C0380);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_INT_CURRENT, 0, 31,
0x26001700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_RF_CURRENT, 0, 31,
0x00002660);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VID_AUD_OVERRIDE, 0, 31,
0x27000100);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_COMP_FLT_CTRL, 0, 31,
0x00000000);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_PHASE_INC, 0, 31,
0x1befbf06);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_GAIN_CONTROL, 0, 31,
0x000035e8);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_RPT_VARIANCE, 0, 31, 0x00000000);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VIDEO_AGC_CTRL, 0, 31,
0xf2560000);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value |= 0x3a023F11;
} else if (standard & V4L2_STD_NTSC_M) {
/* V4L2_STD_NTSC_M (75 IRE Setup) Or
V4L2_STD_NTSC_M_JP (Japan, 0 IRE Setup) */
/* For NTSC the centre frequency of video coming out of
sidewinder is around 7.1MHz or 3.6MHz depending on the
spectral inversion. so for a non spectrally inverted channel
the pll freq word is 0x03420c49
*/
status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0x6503BC0C);
status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xBD038C85);
status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1DB4640A);
status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800);
status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C0380);
status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT,
0x26001700);
status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT,
0x00002660);
status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL,
0x04000800);
status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE,
0x27000100);
status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x01296e1f);
status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL,
0x009f50c1);
status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC,
0x1befbf06);
status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL,
0x000035e8);
status = vid_blk_write_word(dev, DIF_AGC_CTRL_IF, 0xC2262600);
status = vid_blk_write_word(dev, DIF_AGC_CTRL_INT,
0xC2262600);
status = vid_blk_write_word(dev, DIF_AGC_CTRL_RF, 0xC2262600);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value |= 0x3a003F10;
} else {
/* default PAL BG */
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_PLL_CTRL3, 0, 31, 0x00008800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_REF, 0, 31, 0x444C1380);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_IF_INT_CURRENT, 0, 31,
0x26001700);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AGC_RF_CURRENT, 0, 31,
0x00002660);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VIDEO_AGC_CTRL, 0, 31,
0x72500800);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_VID_AUD_OVERRIDE, 0, 31,
0x27000100);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_AV_SEP_CTRL, 0, 31, 0x3F3530EC);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_COMP_FLT_CTRL, 0, 31,
0x00A653A8);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_PHASE_INC, 0, 31,
0x1befbf06);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_SRC_GAIN_CONTROL, 0, 31,
0x000035e8);
status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32,
DIF_RPT_VARIANCE, 0, 31, 0x00000000);
/* Save the Spec Inversion value */
dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
dif_misc_ctrl_value |= 0x3a013F11;
}
/* The AGC values should be the same for all standards,
AUD_SRC_SEL[19] should always be disabled */
dif_misc_ctrl_value &= ~FLD_DIF_AUD_SRC_SEL;
/* It is still possible to get Set Standard calls even when we
are in FM mode.
This is done to override the value for FM. */
if (dev->active_mode == V4L2_TUNER_RADIO)
dif_misc_ctrl_value = 0x7a080000;
/* Write the calculated value for misc ontrol register */
status = vid_blk_write_word(dev, DIF_MISC_CTRL, dif_misc_ctrl_value);
return status;
}
int cx231xx_tuner_pre_channel_change(struct cx231xx *dev)
{
int status = 0;
u32 dwval;
/* Set the RF and IF k_agc values to 3 */
status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval);
dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF);
dwval |= 0x33000000;
status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval);
return status;
}
int cx231xx_tuner_post_channel_change(struct cx231xx *dev)
{
int status = 0;
u32 dwval;
dev_dbg(dev->dev, "%s: dev->tuner_type =0%d\n",
__func__, dev->tuner_type);
/* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for
* SECAM L/B/D standards */
status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval);
dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF);
if (dev->norm & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_B |
V4L2_STD_SECAM_D)) {
if (dev->tuner_type == TUNER_NXP_TDA18271) {
dwval &= ~FLD_DIF_IF_REF;
dwval |= 0x88000300;
} else
dwval |= 0x88000000;
} else {
if (dev->tuner_type == TUNER_NXP_TDA18271) {
dwval &= ~FLD_DIF_IF_REF;
dwval |= 0xCC000300;
} else
dwval |= 0x44000000;
}
status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval);
return status == sizeof(dwval) ? 0 : -EIO;
}
/******************************************************************************
* I 2 S - B L O C K C O N T R O L functions *
******************************************************************************/
int cx231xx_i2s_blk_initialize(struct cx231xx *dev)
{
int status = 0;
u32 value;
status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL1, 1, &value, 1);
/* enables clock to delta-sigma and decimation filter */
value |= 0x80;
status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL1, 1, value, 1);
/* power up all channel */
status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL2, 1, 0x00, 1);
return status;
}
int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
enum AV_MODE avmode)
{
int status = 0;
u32 value = 0;
if (avmode != POLARIS_AVMODE_ENXTERNAL_AV) {
status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL2, 1, &value, 1);
value |= 0xfe;
status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL2, 1, value, 1);
} else {
status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL2, 1, 0x00, 1);
}
return status;
}
/* set i2s_blk for audio input types */
int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input)
{
int status = 0;
switch (audio_input) {
case CX231XX_AMUX_LINE_IN:
status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL2, 1, 0x00, 1);
status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
CH_PWR_CTRL1, 1, 0x80, 1);
break;
case CX231XX_AMUX_VIDEO:
default:
break;
}
dev->ctl_ainput = audio_input;
return status;
}
/******************************************************************************
* P O W E R C O N T R O L functions *
******************************************************************************/
int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode)
{
u8 value[4] = { 0, 0, 0, 0 };
u32 tmp = 0;
int status = 0;
if (dev->power_mode != mode)
dev->power_mode = mode;
else {
dev_dbg(dev->dev, "%s: mode = %d, No Change req.\n",
__func__, mode);
return 0;
}
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value,
4);
if (status < 0)
return status;
tmp = le32_to_cpu(*((__le32 *) value));
switch (mode) {
case POLARIS_AVMODE_ENXTERNAL_AV:
tmp &= (~PWR_MODE_MASK);
tmp |= PWR_AV_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
tmp |= PWR_ISO_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status =
cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
value, 4);
msleep(PWR_SLEEP_INTERVAL);
tmp |= POLARIS_AVMODE_ENXTERNAL_AV;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
/* reset state of xceive tuner */
dev->xc_fw_load_done = 0;
break;
case POLARIS_AVMODE_ANALOGT_TV:
tmp |= PWR_DEMOD_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
if (!(tmp & PWR_TUNER_EN)) {
tmp |= (PWR_TUNER_EN);
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
if (!(tmp & PWR_AV_EN)) {
tmp |= PWR_AV_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
if (!(tmp & PWR_ISO_EN)) {
tmp |= PWR_ISO_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
if (!(tmp & POLARIS_AVMODE_ANALOGT_TV)) {
tmp |= POLARIS_AVMODE_ANALOGT_TV;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
if (dev->board.tuner_type != TUNER_ABSENT) {
/* reset the Tuner */
if (dev->board.tuner_gpio)
cx231xx_gpio_set(dev, dev->board.tuner_gpio);
if (dev->cx231xx_reset_analog_tuner)
dev->cx231xx_reset_analog_tuner(dev);
}
break;
case POLARIS_AVMODE_DIGITAL:
if (!(tmp & PWR_TUNER_EN)) {
tmp |= (PWR_TUNER_EN);
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
if (!(tmp & PWR_AV_EN)) {
tmp |= PWR_AV_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
if (!(tmp & PWR_ISO_EN)) {
tmp |= PWR_ISO_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
tmp &= (~PWR_AV_MODE);
tmp |= POLARIS_AVMODE_DIGITAL;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
if (!(tmp & PWR_DEMOD_EN)) {
tmp |= PWR_DEMOD_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
if (dev->board.tuner_type != TUNER_ABSENT) {
/* reset the Tuner */
if (dev->board.tuner_gpio)
cx231xx_gpio_set(dev, dev->board.tuner_gpio);
if (dev->cx231xx_reset_analog_tuner)
dev->cx231xx_reset_analog_tuner(dev);
}
break;
default:
break;
}
msleep(PWR_SLEEP_INTERVAL);
/* For power saving, only enable Pwr_resetout_n
when digital TV is selected. */
if (mode == POLARIS_AVMODE_DIGITAL) {
tmp |= PWR_RESETOUT_EN;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
PWR_CTL_EN, value, 4);
msleep(PWR_SLEEP_INTERVAL);
}
/* update power control for afe */
status = cx231xx_afe_update_power_control(dev, mode);
/* update power control for i2s_blk */
status = cx231xx_i2s_blk_update_power_control(dev, mode);
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value,
4);
return status;
}
int cx231xx_power_suspend(struct cx231xx *dev)
{
u8 value[4] = { 0, 0, 0, 0 };
u32 tmp = 0;
int status = 0;
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
value, 4);
if (status > 0)
return status;
tmp = le32_to_cpu(*((__le32 *) value));
tmp &= (~PWR_MODE_MASK);
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
value, 4);
return status;
}
/******************************************************************************
* S T R E A M C O N T R O L functions *
******************************************************************************/
int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask)
{
u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
u32 tmp = 0;
int status = 0;
dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask);
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
value, 4);
if (status < 0)
return status;
tmp = le32_to_cpu(*((__le32 *) value));
tmp |= ep_mask;
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET,
value, 4);
return status;
}
int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask)
{
u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
u32 tmp = 0;
int status = 0;
dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask);
status =
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4);
if (status < 0)
return status;
tmp = le32_to_cpu(*((__le32 *) value));
tmp &= (~ep_mask);
value[0] = (u8) tmp;
value[1] = (u8) (tmp >> 8);
value[2] = (u8) (tmp >> 16);
value[3] = (u8) (tmp >> 24);
status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET,
value, 4);
return status;
}
int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
{
int status = 0;
u32 value = 0;
u8 val[4] = { 0, 0, 0, 0 };
if (dev->udev->speed == USB_SPEED_HIGH) {
switch (media_type) {
case Audio:
dev_dbg(dev->dev,
"%s: Audio enter HANC\n", __func__);
status =
cx231xx_mode_register(dev, TS_MODE_REG, 0x9300);
break;
case Vbi:
dev_dbg(dev->dev,
"%s: set vanc registers\n", __func__);
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
break;
case Sliced_cc:
dev_dbg(dev->dev,
"%s: set hanc registers\n", __func__);
status =
cx231xx_mode_register(dev, TS_MODE_REG, 0x1300);
break;
case Raw_Video:
dev_dbg(dev->dev,
"%s: set video registers\n", __func__);
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
break;
case TS1_serial_mode:
dev_dbg(dev->dev,
"%s: set ts1 registers", __func__);
if (dev->board.has_417) {
dev_dbg(dev->dev,
"%s: MPEG\n", __func__);
value &= 0xFFFFFFFC;
value |= 0x3;
status = cx231xx_mode_register(dev,
TS_MODE_REG, value);
val[0] = 0x04;
val[1] = 0xA3;
val[2] = 0x3B;
val[3] = 0x00;
status = cx231xx_write_ctrl_reg(dev,
VRT_SET_REGISTER,
TS1_CFG_REG, val, 4);
val[0] = 0x00;
val[1] = 0x08;
val[2] = 0x00;
val[3] = 0x08;
status = cx231xx_write_ctrl_reg(dev,
VRT_SET_REGISTER,
TS1_LENGTH_REG, val, 4);
} else {
dev_dbg(dev->dev, "%s: BDA\n", __func__);
status = cx231xx_mode_register(dev,
TS_MODE_REG, 0x101);
status = cx231xx_mode_register(dev,
TS1_CFG_REG, 0x010);
}
break;
case TS1_parallel_mode:
dev_dbg(dev->dev,
"%s: set ts1 parallel mode registers\n",
__func__);
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
break;
}
} else {
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
}
return status;
}
int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type)
{
int rc = -1;
u32 ep_mask = -1;
struct pcb_config *pcb_config;
/* get EP for media type */
pcb_config = (struct pcb_config *)&dev->current_pcb_config;
if (pcb_config->config_num) {
switch (media_type) {
case Raw_Video:
ep_mask = ENABLE_EP4; /* ep4 [00:1000] */
break;
case Audio:
ep_mask = ENABLE_EP3; /* ep3 [00:0100] */
break;
case Vbi:
ep_mask = ENABLE_EP5; /* ep5 [01:0000] */
break;
case Sliced_cc:
ep_mask = ENABLE_EP6; /* ep6 [10:0000] */
break;
case TS1_serial_mode:
case TS1_parallel_mode:
ep_mask = ENABLE_EP1; /* ep1 [00:0001] */
break;
case TS2:
ep_mask = ENABLE_EP2; /* ep2 [00:0010] */
break;
}
}
if (start) {
rc = cx231xx_initialize_stream_xfer(dev, media_type);
if (rc < 0)
return rc;
/* enable video capture */
if (ep_mask > 0)
rc = cx231xx_start_stream(dev, ep_mask);
} else {
/* disable video capture */
if (ep_mask > 0)
rc = cx231xx_stop_stream(dev, ep_mask);
}
return rc;
}
EXPORT_SYMBOL_GPL(cx231xx_capture_start);
/*****************************************************************************
* G P I O B I T control functions *
******************************************************************************/
static int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 gpio_val)
{
int status = 0;
gpio_val = (__force u32)cpu_to_le32(gpio_val);
status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&gpio_val, 4, 0, 0);
return status;
}
static int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 *gpio_val)
{
__le32 tmp;
int status = 0;
status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&tmp, 4, 0, 1);
*gpio_val = le32_to_cpu(tmp);
return status;
}
/*
* cx231xx_set_gpio_direction
* Sets the direction of the GPIO pin to input or output
*
* Parameters :
* pin_number : The GPIO Pin number to program the direction for
* from 0 to 31
* pin_value : The Direction of the GPIO Pin under reference.
* 0 = Input direction
* 1 = Output direction
*/
int cx231xx_set_gpio_direction(struct cx231xx *dev,
int pin_number, int pin_value)
{
int status = 0;
u32 value = 0;
/* Check for valid pin_number - if 32 , bail out */
if (pin_number >= 32)
return -EINVAL;
/* input */
if (pin_value == 0)
value = dev->gpio_dir & (~(1 << pin_number)); /* clear */
else
value = dev->gpio_dir | (1 << pin_number);
status = cx231xx_set_gpio_bit(dev, value, dev->gpio_val);
/* cache the value for future */
dev->gpio_dir = value;
return status;
}
/*
* cx231xx_set_gpio_value
* Sets the value of the GPIO pin to Logic high or low. The Pin under
* reference should ALREADY BE SET IN OUTPUT MODE !!!!!!!!!
*
* Parameters :
* pin_number : The GPIO Pin number to program the direction for
* pin_value : The value of the GPIO Pin under reference.
* 0 = set it to 0
* 1 = set it to 1
*/
int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value)
{
int status = 0;
u32 value = 0;
/* Check for valid pin_number - if 0xFF , bail out */
if (pin_number >= 32)
return -EINVAL;
/* first do a sanity check - if the Pin is not output, make it output */
if ((dev->gpio_dir & (1 << pin_number)) == 0x00) {
/* It was in input mode */
value = dev->gpio_dir | (1 << pin_number);
dev->gpio_dir = value;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
value = 0;
}
if (pin_value == 0)
value = dev->gpio_val & (~(1 << pin_number));
else
value = dev->gpio_val | (1 << pin_number);
/* store the value */
dev->gpio_val = value;
/* toggle bit0 of GP_IO */
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
return status;
}
/*****************************************************************************
* G P I O I2C related functions *
******************************************************************************/
int cx231xx_gpio_i2c_start(struct cx231xx *dev)
{
int status = 0;
/* set SCL to output 1 ; set SDA to output 1 */
dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
dev->gpio_val |= 1 << dev->board.tuner_sda_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
if (status < 0)
return -EINVAL;
/* set SCL to output 1; set SDA to output 0 */
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
if (status < 0)
return -EINVAL;
/* set SCL to output 0; set SDA to output 0 */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
if (status < 0)
return -EINVAL;
return status;
}
int cx231xx_gpio_i2c_end(struct cx231xx *dev)
{
int status = 0;
/* set SCL to output 0; set SDA to output 0 */
dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
if (status < 0)
return -EINVAL;
/* set SCL to output 1; set SDA to output 0 */
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
if (status < 0)
return -EINVAL;
/* set SCL to input ,release SCL cable control
set SDA to input ,release SDA cable control */
dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio);
dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
status =
cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
if (status < 0)
return -EINVAL;
return status;
}
int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data)
{
int status = 0;
u8 i;
/* set SCL to output ; set SDA to output */
dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
for (i = 0; i < 8; i++) {
if (((data << i) & 0x80) == 0) {
/* set SCL to output 0; set SDA to output 0 */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
/* set SCL to output 1; set SDA to output 0 */
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
/* set SCL to output 0; set SDA to output 0 */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
} else {
/* set SCL to output 0; set SDA to output 1 */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
dev->gpio_val |= 1 << dev->board.tuner_sda_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
/* set SCL to output 1; set SDA to output 1 */
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
/* set SCL to output 0; set SDA to output 1 */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
}
}
return status;
}
int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf)
{
u8 value = 0;
int status = 0;
u32 gpio_logic_value = 0;
u8 i;
/* read byte */
for (i = 0; i < 8; i++) { /* send write I2c addr */
/* set SCL to output 0; set SDA to input */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
/* set SCL to output 1; set SDA to input */
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir,
dev->gpio_val);
/* get SDA data bit */
gpio_logic_value = dev->gpio_val;
status = cx231xx_get_gpio_bit(dev, dev->gpio_dir,
&dev->gpio_val);
if ((dev->gpio_val & (1 << dev->board.tuner_sda_gpio)) != 0)
value |= (1 << (8 - i - 1));
dev->gpio_val = gpio_logic_value;
}
/* set SCL to output 0,finish the read latest SCL signal.
!!!set SDA to input, never to modify SDA direction at
the same times */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
/* store the value */
*buf = value & 0xff;
return status;
}
int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev)
{
int status = 0;
u32 gpio_logic_value = 0;
int nCnt = 10;
int nInit = nCnt;
/* clock stretch; set SCL to input; set SDA to input;
get SCL value till SCL = 1 */
dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio);
gpio_logic_value = dev->gpio_val;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
do {
msleep(2);
status = cx231xx_get_gpio_bit(dev, dev->gpio_dir,
&dev->gpio_val);
nCnt--;
} while (((dev->gpio_val &
(1 << dev->board.tuner_scl_gpio)) == 0) &&
(nCnt > 0));
if (nCnt == 0)
dev_dbg(dev->dev,
"No ACK after %d msec -GPIO I2C failed!",
nInit * 10);
/*
* readAck
* through clock stretch, slave has given a SCL signal,
* so the SDA data can be directly read.
*/
status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, &dev->gpio_val);
if ((dev->gpio_val & 1 << dev->board.tuner_sda_gpio) == 0) {
dev->gpio_val = gpio_logic_value;
dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
status = 0;
} else {
dev->gpio_val = gpio_logic_value;
dev->gpio_val |= (1 << dev->board.tuner_sda_gpio);
}
/* read SDA end, set the SCL to output 0, after this operation,
SDA direction can be changed. */
dev->gpio_val = gpio_logic_value;
dev->gpio_dir |= (1 << dev->board.tuner_scl_gpio);
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
return status;
}
int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev)
{
int status = 0;
/* set SDA to output */
dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
/* set SCL = 0 (output); set SDA = 0 (output) */
dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
/* set SCL = 1 (output); set SDA = 0 (output) */
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
/* set SCL = 0 (output); set SDA = 0 (output) */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
/* set SDA to input,and then the slave will read data from SDA. */
dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
return status;
}
int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev)
{
int status = 0;
/* set scl to output ; set sda to input */
dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
/* set scl to output 0; set sda to input */
dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
/* set scl to output 1; set sda to input */
dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val);
return status;
}
/*****************************************************************************
* G P I O I2C related functions *
******************************************************************************/
/* cx231xx_gpio_i2c_read
* Function to read data from gpio based I2C interface
*/
int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len)
{
int status = 0;
int i = 0;
/* get the lock */
mutex_lock(&dev->gpio_i2c_lock);
/* start */
status = cx231xx_gpio_i2c_start(dev);
/* write dev_addr */
status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) + 1);
/* readAck */
status = cx231xx_gpio_i2c_read_ack(dev);
/* read data */
for (i = 0; i < len; i++) {
/* read data */
buf[i] = 0;
status = cx231xx_gpio_i2c_read_byte(dev, &buf[i]);
if ((i + 1) != len) {
/* only do write ack if we more length */
status = cx231xx_gpio_i2c_write_ack(dev);
}
}
/* write NAK - inform reads are complete */
status = cx231xx_gpio_i2c_write_nak(dev);
/* write end */
status = cx231xx_gpio_i2c_end(dev);
/* release the lock */
mutex_unlock(&dev->gpio_i2c_lock);
return status;
}
/* cx231xx_gpio_i2c_write
* Function to write data to gpio based I2C interface
*/
int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len)
{
int i = 0;
/* get the lock */
mutex_lock(&dev->gpio_i2c_lock);
/* start */
cx231xx_gpio_i2c_start(dev);
/* write dev_addr */
cx231xx_gpio_i2c_write_byte(dev, dev_addr << 1);
/* read Ack */
cx231xx_gpio_i2c_read_ack(dev);
for (i = 0; i < len; i++) {
/* Write data */
cx231xx_gpio_i2c_write_byte(dev, buf[i]);
/* read Ack */
cx231xx_gpio_i2c_read_ack(dev);
}
/* write End */
cx231xx_gpio_i2c_end(dev);
/* release the lock */
mutex_unlock(&dev->gpio_i2c_lock);
return 0;
}
| linux-master | drivers/media/usb/cx231xx/cx231xx-avcore.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
cx231xx-video.c - driver for Conexant Cx23100/101/102
USB video capture devices
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
Based on em28xx driver
Based on cx23885 driver
Based on cx88 driver
*/
#include "cx231xx.h"
#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/bitmap.h>
#include <linux/i2c.h>
#include <linux/mm.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-event.h>
#include <media/drv-intf/msp3400.h>
#include <media/tuner.h>
#include <media/dvb_frontend.h>
#include "cx231xx-vbi.h"
#define CX231XX_VERSION "0.0.3"
#define DRIVER_AUTHOR "Srinivasa Deevi <[email protected]>"
#define DRIVER_DESC "Conexant cx231xx based USB video device driver"
#define cx231xx_videodbg(fmt, arg...) do {\
if (video_debug) \
printk(KERN_INFO "%s %s :"fmt, \
dev->name, __func__ , ##arg); } while (0)
static unsigned int isoc_debug;
module_param(isoc_debug, int, 0644);
MODULE_PARM_DESC(isoc_debug, "enable debug messages [isoc transfers]");
#define cx231xx_isocdbg(fmt, arg...) \
do {\
if (isoc_debug) { \
printk(KERN_INFO "%s %s :"fmt, \
dev->name, __func__ , ##arg); \
} \
} while (0)
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
MODULE_VERSION(CX231XX_VERSION);
static unsigned int card[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
static unsigned int video_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
static unsigned int vbi_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
static unsigned int radio_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
module_param_array(card, int, NULL, 0444);
module_param_array(video_nr, int, NULL, 0444);
module_param_array(vbi_nr, int, NULL, 0444);
module_param_array(radio_nr, int, NULL, 0444);
MODULE_PARM_DESC(card, "card type");
MODULE_PARM_DESC(video_nr, "video device numbers");
MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
MODULE_PARM_DESC(radio_nr, "radio device numbers");
static unsigned int video_debug;
module_param(video_debug, int, 0644);
MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
/* supported video standards */
static struct cx231xx_fmt format[] = {
{
.fourcc = V4L2_PIX_FMT_YUYV,
.depth = 16,
.reg = 0,
},
};
static int cx231xx_enable_analog_tuner(struct cx231xx *dev)
{
#ifdef CONFIG_MEDIA_CONTROLLER
struct media_device *mdev = dev->media_dev;
struct media_entity *entity, *decoder = NULL, *source;
struct media_link *link, *found_link = NULL;
int ret, active_links = 0;
if (!mdev)
return 0;
/*
* This will find the tuner that is connected into the decoder.
* Technically, this is not 100% correct, as the device may be
* using an analog input instead of the tuner. However, as we can't
* do DVB streaming while the DMA engine is being used for V4L2,
* this should be enough for the actual needs.
*/
media_device_for_each_entity(entity, mdev) {
if (entity->function == MEDIA_ENT_F_ATV_DECODER) {
decoder = entity;
break;
}
}
if (!decoder)
return 0;
list_for_each_entry(link, &decoder->links, list) {
if (link->sink->entity == decoder) {
found_link = link;
if (link->flags & MEDIA_LNK_FL_ENABLED)
active_links++;
break;
}
}
if (active_links == 1 || !found_link)
return 0;
source = found_link->source->entity;
list_for_each_entry(link, &source->links, list) {
struct media_entity *sink;
int flags = 0;
sink = link->sink->entity;
if (sink == entity)
flags = MEDIA_LNK_FL_ENABLED;
ret = media_entity_setup_link(link, flags);
if (ret) {
dev_err(dev->dev,
"Couldn't change link %s->%s to %s. Error %d\n",
source->name, sink->name,
flags ? "enabled" : "disabled",
ret);
return ret;
} else
dev_dbg(dev->dev,
"link %s->%s was %s\n",
source->name, sink->name,
flags ? "ENABLED" : "disabled");
}
#endif
return 0;
}
/* ------------------------------------------------------------------
Video buffer and parser functions
------------------------------------------------------------------*/
/*
* Announces that a buffer were filled and request the next
*/
static inline void buffer_filled(struct cx231xx *dev,
struct cx231xx_dmaqueue *dma_q,
struct cx231xx_buffer *buf)
{
/* Advice that buffer was filled */
cx231xx_isocdbg("[%p/%d] wakeup\n", buf, buf->vb.vb2_buf.index);
buf->vb.sequence = dma_q->sequence++;
buf->vb.field = V4L2_FIELD_INTERLACED;
buf->vb.vb2_buf.timestamp = ktime_get_ns();
vb2_set_plane_payload(&buf->vb.vb2_buf, 0, dev->size);
if (dev->USE_ISO)
dev->video_mode.isoc_ctl.buf = NULL;
else
dev->video_mode.bulk_ctl.buf = NULL;
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
}
static inline void print_err_status(struct cx231xx *dev, int packet, int status)
{
char *errmsg = "Unknown";
switch (status) {
case -ENOENT:
errmsg = "unlinked synchronously";
break;
case -ECONNRESET:
errmsg = "unlinked asynchronously";
break;
case -ENOSR:
errmsg = "Buffer error (overrun)";
break;
case -EPIPE:
errmsg = "Stalled (device not responding)";
break;
case -EOVERFLOW:
errmsg = "Babble (bad cable?)";
break;
case -EPROTO:
errmsg = "Bit-stuff error (bad cable?)";
break;
case -EILSEQ:
errmsg = "CRC/Timeout (could be anything)";
break;
case -ETIME:
errmsg = "Device does not respond";
break;
}
if (packet < 0) {
cx231xx_isocdbg("URB status %d [%s].\n", status, errmsg);
} else {
cx231xx_isocdbg("URB packet %d, status %d [%s].\n",
packet, status, errmsg);
}
}
/*
* generic routine to get the next available buffer
*/
static inline void get_next_buf(struct cx231xx_dmaqueue *dma_q,
struct cx231xx_buffer **buf)
{
struct cx231xx_video_mode *vmode =
container_of(dma_q, struct cx231xx_video_mode, vidq);
struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
char *outp;
if (list_empty(&dma_q->active)) {
cx231xx_isocdbg("No active queue to serve\n");
if (dev->USE_ISO)
dev->video_mode.isoc_ctl.buf = NULL;
else
dev->video_mode.bulk_ctl.buf = NULL;
*buf = NULL;
return;
}
/* Get the next buffer */
*buf = list_entry(dma_q->active.next, struct cx231xx_buffer, list);
/* Cleans up buffer - Useful for testing for frame/URB loss */
outp = vb2_plane_vaddr(&(*buf)->vb.vb2_buf, 0);
memset(outp, 0, dev->size);
if (dev->USE_ISO)
dev->video_mode.isoc_ctl.buf = *buf;
else
dev->video_mode.bulk_ctl.buf = *buf;
return;
}
/*
* Controls the isoc copy of each urb packet
*/
static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
int i;
unsigned char *p_buffer;
u32 bytes_parsed = 0, buffer_size = 0;
u8 sav_eav = 0;
if (!dev)
return 0;
if (dev->state & DEV_DISCONNECTED)
return 0;
if (urb->status < 0) {
print_err_status(dev, -1, urb->status);
if (urb->status == -ENOENT)
return 0;
}
for (i = 0; i < urb->number_of_packets; i++) {
int status = urb->iso_frame_desc[i].status;
if (status < 0) {
print_err_status(dev, i, status);
if (urb->iso_frame_desc[i].status != -EPROTO)
continue;
}
if (urb->iso_frame_desc[i].actual_length <= 0) {
/* cx231xx_isocdbg("packet %d is empty",i); - spammy */
continue;
}
if (urb->iso_frame_desc[i].actual_length >
dev->video_mode.max_pkt_size) {
cx231xx_isocdbg("packet bigger than packet size");
continue;
}
/* get buffer pointer and length */
p_buffer = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
buffer_size = urb->iso_frame_desc[i].actual_length;
bytes_parsed = 0;
if (dma_q->is_partial_line) {
/* Handle the case of a partial line */
sav_eav = dma_q->last_sav;
} else {
/* Check for a SAV/EAV overlapping
the buffer boundary */
sav_eav =
cx231xx_find_boundary_SAV_EAV(p_buffer,
dma_q->partial_buf,
&bytes_parsed);
}
sav_eav &= 0xF0;
/* Get the first line if we have some portion of an SAV/EAV from
the last buffer or a partial line */
if (sav_eav) {
bytes_parsed += cx231xx_get_video_line(dev, dma_q,
sav_eav, /* SAV/EAV */
p_buffer + bytes_parsed, /* p_buffer */
buffer_size - bytes_parsed);/* buf size */
}
/* Now parse data that is completely in this buffer */
/* dma_q->is_partial_line = 0; */
while (bytes_parsed < buffer_size) {
u32 bytes_used = 0;
sav_eav = cx231xx_find_next_SAV_EAV(
p_buffer + bytes_parsed, /* p_buffer */
buffer_size - bytes_parsed, /* buf size */
&bytes_used);/* bytes used to get SAV/EAV */
bytes_parsed += bytes_used;
sav_eav &= 0xF0;
if (sav_eav && (bytes_parsed < buffer_size)) {
bytes_parsed += cx231xx_get_video_line(dev,
dma_q, sav_eav, /* SAV/EAV */
p_buffer + bytes_parsed,/* p_buffer */
buffer_size - bytes_parsed);/*buf size*/
}
}
/* Save the last four bytes of the buffer so we can check the
buffer boundary condition next time */
memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
bytes_parsed = 0;
}
return 1;
}
static inline int cx231xx_bulk_copy(struct cx231xx *dev, struct urb *urb)
{
struct cx231xx_dmaqueue *dma_q = urb->context;
unsigned char *p_buffer;
u32 bytes_parsed = 0, buffer_size = 0;
u8 sav_eav = 0;
if (!dev)
return 0;
if (dev->state & DEV_DISCONNECTED)
return 0;
if (urb->status < 0) {
print_err_status(dev, -1, urb->status);
if (urb->status == -ENOENT)
return 0;
}
if (1) {
/* get buffer pointer and length */
p_buffer = urb->transfer_buffer;
buffer_size = urb->actual_length;
bytes_parsed = 0;
if (dma_q->is_partial_line) {
/* Handle the case of a partial line */
sav_eav = dma_q->last_sav;
} else {
/* Check for a SAV/EAV overlapping
the buffer boundary */
sav_eav =
cx231xx_find_boundary_SAV_EAV(p_buffer,
dma_q->partial_buf,
&bytes_parsed);
}
sav_eav &= 0xF0;
/* Get the first line if we have some portion of an SAV/EAV from
the last buffer or a partial line */
if (sav_eav) {
bytes_parsed += cx231xx_get_video_line(dev, dma_q,
sav_eav, /* SAV/EAV */
p_buffer + bytes_parsed, /* p_buffer */
buffer_size - bytes_parsed);/* buf size */
}
/* Now parse data that is completely in this buffer */
/* dma_q->is_partial_line = 0; */
while (bytes_parsed < buffer_size) {
u32 bytes_used = 0;
sav_eav = cx231xx_find_next_SAV_EAV(
p_buffer + bytes_parsed, /* p_buffer */
buffer_size - bytes_parsed, /* buf size */
&bytes_used);/* bytes used to get SAV/EAV */
bytes_parsed += bytes_used;
sav_eav &= 0xF0;
if (sav_eav && (bytes_parsed < buffer_size)) {
bytes_parsed += cx231xx_get_video_line(dev,
dma_q, sav_eav, /* SAV/EAV */
p_buffer + bytes_parsed,/* p_buffer */
buffer_size - bytes_parsed);/*buf size*/
}
}
/* Save the last four bytes of the buffer so we can check the
buffer boundary condition next time */
memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
bytes_parsed = 0;
}
return 1;
}
u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
u32 *p_bytes_used)
{
u32 bytes_used;
u8 boundary_bytes[8];
u8 sav_eav = 0;
*p_bytes_used = 0;
/* Create an array of the last 4 bytes of the last buffer and the first
4 bytes of the current buffer. */
memcpy(boundary_bytes, partial_buf, 4);
memcpy(boundary_bytes + 4, p_buffer, 4);
/* Check for the SAV/EAV in the boundary buffer */
sav_eav = cx231xx_find_next_SAV_EAV((u8 *)&boundary_bytes, 8,
&bytes_used);
if (sav_eav) {
/* found a boundary SAV/EAV. Updates the bytes used to reflect
only those used in the new buffer */
*p_bytes_used = bytes_used - 4;
}
return sav_eav;
}
u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, u32 *p_bytes_used)
{
u32 i;
u8 sav_eav = 0;
/*
* Don't search if the buffer size is less than 4. It causes a page
* fault since buffer_size - 4 evaluates to a large number in that
* case.
*/
if (buffer_size < 4) {
*p_bytes_used = buffer_size;
return 0;
}
for (i = 0; i < (buffer_size - 3); i++) {
if ((p_buffer[i] == 0xFF) &&
(p_buffer[i + 1] == 0x00) && (p_buffer[i + 2] == 0x00)) {
*p_bytes_used = i + 4;
sav_eav = p_buffer[i + 3];
return sav_eav;
}
}
*p_bytes_used = buffer_size;
return 0;
}
u32 cx231xx_get_video_line(struct cx231xx *dev,
struct cx231xx_dmaqueue *dma_q, u8 sav_eav,
u8 *p_buffer, u32 buffer_size)
{
u32 bytes_copied = 0;
int current_field = -1;
switch (sav_eav) {
case SAV_ACTIVE_VIDEO_FIELD1:
/* looking for skipped line which occurred in PAL 720x480 mode.
In this case, there will be no active data contained
between the SAV and EAV */
if ((buffer_size > 3) && (p_buffer[0] == 0xFF) &&
(p_buffer[1] == 0x00) && (p_buffer[2] == 0x00) &&
((p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1) ||
(p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2) ||
(p_buffer[3] == EAV_VBLANK_FIELD1) ||
(p_buffer[3] == EAV_VBLANK_FIELD2)))
return bytes_copied;
current_field = 1;
break;
case SAV_ACTIVE_VIDEO_FIELD2:
/* looking for skipped line which occurred in PAL 720x480 mode.
In this case, there will be no active data contained between
the SAV and EAV */
if ((buffer_size > 3) && (p_buffer[0] == 0xFF) &&
(p_buffer[1] == 0x00) && (p_buffer[2] == 0x00) &&
((p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1) ||
(p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2) ||
(p_buffer[3] == EAV_VBLANK_FIELD1) ||
(p_buffer[3] == EAV_VBLANK_FIELD2)))
return bytes_copied;
current_field = 2;
break;
}
dma_q->last_sav = sav_eav;
bytes_copied = cx231xx_copy_video_line(dev, dma_q, p_buffer,
buffer_size, current_field);
return bytes_copied;
}
u32 cx231xx_copy_video_line(struct cx231xx *dev,
struct cx231xx_dmaqueue *dma_q, u8 *p_line,
u32 length, int field_number)
{
u32 bytes_to_copy;
struct cx231xx_buffer *buf;
u32 _line_size = dev->width * 2;
if (dma_q->current_field != field_number)
cx231xx_reset_video_buffer(dev, dma_q);
/* get the buffer pointer */
if (dev->USE_ISO)
buf = dev->video_mode.isoc_ctl.buf;
else
buf = dev->video_mode.bulk_ctl.buf;
/* Remember the field number for next time */
dma_q->current_field = field_number;
bytes_to_copy = dma_q->bytes_left_in_line;
if (bytes_to_copy > length)
bytes_to_copy = length;
if (dma_q->lines_completed >= dma_q->lines_per_field) {
dma_q->bytes_left_in_line -= bytes_to_copy;
dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0) ?
0 : 1;
return 0;
}
dma_q->is_partial_line = 1;
/* If we don't have a buffer, just return the number of bytes we would
have copied if we had a buffer. */
if (!buf) {
dma_q->bytes_left_in_line -= bytes_to_copy;
dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0)
? 0 : 1;
return bytes_to_copy;
}
/* copy the data to video buffer */
cx231xx_do_copy(dev, dma_q, p_line, bytes_to_copy);
dma_q->pos += bytes_to_copy;
dma_q->bytes_left_in_line -= bytes_to_copy;
if (dma_q->bytes_left_in_line == 0) {
dma_q->bytes_left_in_line = _line_size;
dma_q->lines_completed++;
dma_q->is_partial_line = 0;
if (cx231xx_is_buffer_done(dev, dma_q) && buf) {
buffer_filled(dev, dma_q, buf);
dma_q->pos = 0;
buf = NULL;
dma_q->lines_completed = 0;
}
}
return bytes_to_copy;
}
void cx231xx_reset_video_buffer(struct cx231xx *dev,
struct cx231xx_dmaqueue *dma_q)
{
struct cx231xx_buffer *buf;
/* handle the switch from field 1 to field 2 */
if (dma_q->current_field == 1) {
if (dma_q->lines_completed >= dma_q->lines_per_field)
dma_q->field1_done = 1;
else
dma_q->field1_done = 0;
}
if (dev->USE_ISO)
buf = dev->video_mode.isoc_ctl.buf;
else
buf = dev->video_mode.bulk_ctl.buf;
if (buf == NULL) {
/* first try to get the buffer */
get_next_buf(dma_q, &buf);
dma_q->pos = 0;
dma_q->field1_done = 0;
dma_q->current_field = -1;
}
/* reset the counters */
dma_q->bytes_left_in_line = dev->width << 1;
dma_q->lines_completed = 0;
}
int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
u8 *p_buffer, u32 bytes_to_copy)
{
u8 *p_out_buffer = NULL;
u32 current_line_bytes_copied = 0;
struct cx231xx_buffer *buf;
u32 _line_size = dev->width << 1;
void *startwrite;
int offset, lencopy;
if (dev->USE_ISO)
buf = dev->video_mode.isoc_ctl.buf;
else
buf = dev->video_mode.bulk_ctl.buf;
if (buf == NULL)
return -1;
p_out_buffer = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
current_line_bytes_copied = _line_size - dma_q->bytes_left_in_line;
/* Offset field 2 one line from the top of the buffer */
offset = (dma_q->current_field == 1) ? 0 : _line_size;
/* Offset for field 2 */
startwrite = p_out_buffer + offset;
/* lines already completed in the current field */
startwrite += (dma_q->lines_completed * _line_size * 2);
/* bytes already completed in the current line */
startwrite += current_line_bytes_copied;
lencopy = dma_q->bytes_left_in_line > bytes_to_copy ?
bytes_to_copy : dma_q->bytes_left_in_line;
if ((u8 *)(startwrite + lencopy) > (u8 *)(p_out_buffer + dev->size))
return 0;
/* The below copies the UYVY data straight into video buffer */
cx231xx_swab((u16 *) p_buffer, (u16 *) startwrite, (u16) lencopy);
return 0;
}
void cx231xx_swab(u16 *from, u16 *to, u16 len)
{
u16 i;
if (len <= 0)
return;
for (i = 0; i < len / 2; i++)
to[i] = (from[i] << 8) | (from[i] >> 8);
}
u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q)
{
u8 buffer_complete = 0;
/* Dual field stream */
buffer_complete = ((dma_q->current_field == 2) &&
(dma_q->lines_completed >= dma_q->lines_per_field) &&
dma_q->field1_done);
return buffer_complete;
}
/* ------------------------------------------------------------------
Videobuf operations
------------------------------------------------------------------*/
static int queue_setup(struct vb2_queue *vq,
unsigned int *nbuffers, unsigned int *nplanes,
unsigned int sizes[], struct device *alloc_devs[])
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
dev->size = (dev->width * dev->height * dev->format->depth + 7) >> 3;
if (vq->num_buffers + *nbuffers < CX231XX_MIN_BUF)
*nbuffers = CX231XX_MIN_BUF - vq->num_buffers;
if (*nplanes)
return sizes[0] < dev->size ? -EINVAL : 0;
*nplanes = 1;
sizes[0] = dev->size;
return 0;
}
static void buffer_queue(struct vb2_buffer *vb)
{
struct cx231xx_buffer *buf =
container_of(vb, struct cx231xx_buffer, vb.vb2_buf);
struct cx231xx *dev = vb2_get_drv_priv(vb->vb2_queue);
struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
unsigned long flags;
spin_lock_irqsave(&dev->video_mode.slock, flags);
list_add_tail(&buf->list, &vidq->active);
spin_unlock_irqrestore(&dev->video_mode.slock, flags);
}
static void return_all_buffers(struct cx231xx *dev,
enum vb2_buffer_state state)
{
struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
struct cx231xx_buffer *buf, *node;
unsigned long flags;
spin_lock_irqsave(&dev->video_mode.slock, flags);
if (dev->USE_ISO)
dev->video_mode.isoc_ctl.buf = NULL;
else
dev->video_mode.bulk_ctl.buf = NULL;
list_for_each_entry_safe(buf, node, &vidq->active, list) {
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, state);
}
spin_unlock_irqrestore(&dev->video_mode.slock, flags);
}
static int start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
int ret = 0;
vidq->sequence = 0;
dev->mode_tv = 0;
cx231xx_enable_analog_tuner(dev);
if (dev->USE_ISO)
ret = cx231xx_init_isoc(dev, CX231XX_NUM_PACKETS,
CX231XX_NUM_BUFS,
dev->video_mode.max_pkt_size,
cx231xx_isoc_copy);
else
ret = cx231xx_init_bulk(dev, CX231XX_NUM_PACKETS,
CX231XX_NUM_BUFS,
dev->video_mode.max_pkt_size,
cx231xx_bulk_copy);
if (ret)
return_all_buffers(dev, VB2_BUF_STATE_QUEUED);
call_all(dev, video, s_stream, 1);
return ret;
}
static void stop_streaming(struct vb2_queue *vq)
{
struct cx231xx *dev = vb2_get_drv_priv(vq);
call_all(dev, video, s_stream, 0);
return_all_buffers(dev, VB2_BUF_STATE_ERROR);
}
static struct vb2_ops cx231xx_video_qops = {
.queue_setup = queue_setup,
.buf_queue = buffer_queue,
.start_streaming = start_streaming,
.stop_streaming = stop_streaming,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
};
/********************* v4l2 interface **************************************/
void video_mux(struct cx231xx *dev, int index)
{
dev->video_input = index;
dev->ctl_ainput = INPUT(index)->amux;
cx231xx_set_video_input_mux(dev, index);
cx25840_call(dev, video, s_routing, INPUT(index)->vmux, 0, 0);
cx231xx_set_audio_input(dev, dev->ctl_ainput);
dev_dbg(dev->dev, "video_mux : %d\n", index);
/* do mode control overrides if required */
cx231xx_do_mode_ctrl_overrides(dev);
}
/* ------------------------------------------------------------------
IOCTL vidioc handling
------------------------------------------------------------------*/
static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct cx231xx *dev = video_drvdata(file);
f->fmt.pix.width = dev->width;
f->fmt.pix.height = dev->height;
f->fmt.pix.pixelformat = dev->format->fourcc;
f->fmt.pix.bytesperline = (dev->width * dev->format->depth + 7) >> 3;
f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * dev->height;
f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
f->fmt.pix.field = V4L2_FIELD_INTERLACED;
return 0;
}
static struct cx231xx_fmt *format_by_fourcc(unsigned int fourcc)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE(format); i++)
if (format[i].fourcc == fourcc)
return &format[i];
return NULL;
}
static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct cx231xx *dev = video_drvdata(file);
unsigned int width = f->fmt.pix.width;
unsigned int height = f->fmt.pix.height;
unsigned int maxw = norm_maxw(dev);
unsigned int maxh = norm_maxh(dev);
struct cx231xx_fmt *fmt;
fmt = format_by_fourcc(f->fmt.pix.pixelformat);
if (!fmt) {
cx231xx_videodbg("Fourcc format (%08x) invalid.\n",
f->fmt.pix.pixelformat);
return -EINVAL;
}
/* width must even because of the YUYV format
height must be even because of interlacing */
v4l_bound_align_image(&width, 48, maxw, 1, &height, 32, maxh, 1, 0);
f->fmt.pix.width = width;
f->fmt.pix.height = height;
f->fmt.pix.pixelformat = fmt->fourcc;
f->fmt.pix.bytesperline = (width * fmt->depth + 7) >> 3;
f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * height;
f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
f->fmt.pix.field = V4L2_FIELD_INTERLACED;
return 0;
}
static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct cx231xx *dev = video_drvdata(file);
struct v4l2_subdev_format format = {
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
};
int rc;
rc = vidioc_try_fmt_vid_cap(file, priv, f);
if (rc)
return rc;
if (vb2_is_busy(&dev->vidq)) {
dev_err(dev->dev, "%s: queue busy\n", __func__);
return -EBUSY;
}
/* set new image size */
dev->width = f->fmt.pix.width;
dev->height = f->fmt.pix.height;
dev->format = format_by_fourcc(f->fmt.pix.pixelformat);
v4l2_fill_mbus_format(&format.format, &f->fmt.pix, MEDIA_BUS_FMT_FIXED);
call_all(dev, pad, set_fmt, NULL, &format);
v4l2_fill_pix_format(&f->fmt.pix, &format.format);
return rc;
}
static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
{
struct cx231xx *dev = video_drvdata(file);
*id = dev->norm;
return 0;
}
static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id norm)
{
struct cx231xx *dev = video_drvdata(file);
struct v4l2_subdev_format format = {
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
};
if (dev->norm == norm)
return 0;
if (vb2_is_busy(&dev->vidq))
return -EBUSY;
dev->norm = norm;
/* Adjusts width/height, if needed */
dev->width = 720;
dev->height = (dev->norm & V4L2_STD_625_50) ? 576 : 480;
call_all(dev, video, s_std, dev->norm);
/* We need to reset basic properties in the decoder related to
resolution (since a standard change effects things like the number
of lines in VACT, etc) */
format.format.code = MEDIA_BUS_FMT_FIXED;
format.format.width = dev->width;
format.format.height = dev->height;
call_all(dev, pad, set_fmt, NULL, &format);
/* do mode control overrides */
cx231xx_do_mode_ctrl_overrides(dev);
return 0;
}
static const char *iname[] = {
[CX231XX_VMUX_COMPOSITE1] = "Composite1",
[CX231XX_VMUX_SVIDEO] = "S-Video",
[CX231XX_VMUX_TELEVISION] = "Television",
[CX231XX_VMUX_CABLE] = "Cable TV",
[CX231XX_VMUX_DVB] = "DVB",
};
void cx231xx_v4l2_create_entities(struct cx231xx *dev)
{
#if defined(CONFIG_MEDIA_CONTROLLER)
int ret, i;
/* Create entities for each input connector */
for (i = 0; i < MAX_CX231XX_INPUT; i++) {
struct media_entity *ent = &dev->input_ent[i];
if (!INPUT(i)->type)
break;
ent->name = iname[INPUT(i)->type];
ent->flags = MEDIA_ENT_FL_CONNECTOR;
dev->input_pad[i].flags = MEDIA_PAD_FL_SOURCE;
switch (INPUT(i)->type) {
case CX231XX_VMUX_COMPOSITE1:
ent->function = MEDIA_ENT_F_CONN_COMPOSITE;
break;
case CX231XX_VMUX_SVIDEO:
ent->function = MEDIA_ENT_F_CONN_SVIDEO;
break;
case CX231XX_VMUX_TELEVISION:
case CX231XX_VMUX_CABLE:
case CX231XX_VMUX_DVB:
/* The DVB core will handle it */
if (dev->tuner_type == TUNER_ABSENT)
continue;
fallthrough;
default: /* just to shut up a gcc warning */
ent->function = MEDIA_ENT_F_CONN_RF;
break;
}
ret = media_entity_pads_init(ent, 1, &dev->input_pad[i]);
if (ret < 0)
pr_err("failed to initialize input pad[%d]!\n", i);
ret = media_device_register_entity(dev->media_dev, ent);
if (ret < 0)
pr_err("failed to register input entity %d!\n", i);
}
#endif
}
int cx231xx_enum_input(struct file *file, void *priv,
struct v4l2_input *i)
{
struct cx231xx *dev = video_drvdata(file);
u32 gen_stat;
unsigned int n;
int ret;
n = i->index;
if (n >= MAX_CX231XX_INPUT)
return -EINVAL;
if (0 == INPUT(n)->type)
return -EINVAL;
i->index = n;
i->type = V4L2_INPUT_TYPE_CAMERA;
strscpy(i->name, iname[INPUT(n)->type], sizeof(i->name));
if ((CX231XX_VMUX_TELEVISION == INPUT(n)->type) ||
(CX231XX_VMUX_CABLE == INPUT(n)->type))
i->type = V4L2_INPUT_TYPE_TUNER;
i->std = dev->vdev.tvnorms;
/* If they are asking about the active input, read signal status */
if (n == dev->video_input) {
ret = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
GEN_STAT, 2, &gen_stat, 4);
if (ret > 0) {
if ((gen_stat & FLD_VPRES) == 0x00)
i->status |= V4L2_IN_ST_NO_SIGNAL;
if ((gen_stat & FLD_HLOCK) == 0x00)
i->status |= V4L2_IN_ST_NO_H_LOCK;
}
}
return 0;
}
int cx231xx_g_input(struct file *file, void *priv, unsigned int *i)
{
struct cx231xx *dev = video_drvdata(file);
*i = dev->video_input;
return 0;
}
int cx231xx_s_input(struct file *file, void *priv, unsigned int i)
{
struct cx231xx *dev = video_drvdata(file);
dev->mode_tv = 0;
if (i >= MAX_CX231XX_INPUT)
return -EINVAL;
if (0 == INPUT(i)->type)
return -EINVAL;
video_mux(dev, i);
if (INPUT(i)->type == CX231XX_VMUX_TELEVISION ||
INPUT(i)->type == CX231XX_VMUX_CABLE) {
/* There's a tuner, so reset the standard and put it on the
last known frequency (since it was probably powered down
until now */
call_all(dev, video, s_std, dev->norm);
}
return 0;
}
int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
{
struct cx231xx *dev = video_drvdata(file);
if (0 != t->index)
return -EINVAL;
strscpy(t->name, "Tuner", sizeof(t->name));
t->type = V4L2_TUNER_ANALOG_TV;
t->capability = V4L2_TUNER_CAP_NORM;
t->rangehigh = 0xffffffffUL;
t->signal = 0xffff; /* LOCKED */
call_all(dev, tuner, g_tuner, t);
return 0;
}
int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t)
{
if (0 != t->index)
return -EINVAL;
return 0;
}
int cx231xx_g_frequency(struct file *file, void *priv,
struct v4l2_frequency *f)
{
struct cx231xx *dev = video_drvdata(file);
if (f->tuner)
return -EINVAL;
f->frequency = dev->ctl_freq;
return 0;
}
int cx231xx_s_frequency(struct file *file, void *priv,
const struct v4l2_frequency *f)
{
struct cx231xx *dev = video_drvdata(file);
struct v4l2_frequency new_freq = *f;
int rc, need_if_freq = 0;
u32 if_frequency = 5400000;
dev_dbg(dev->dev,
"Enter vidioc_s_frequency()f->frequency=%d;f->type=%d\n",
f->frequency, f->type);
if (0 != f->tuner)
return -EINVAL;
/* set pre channel change settings in DIF first */
rc = cx231xx_tuner_pre_channel_change(dev);
switch (dev->model) { /* i2c device tuners */
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_975:
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
if (dev->cx231xx_set_analog_freq)
dev->cx231xx_set_analog_freq(dev, f->frequency);
dev->ctl_freq = f->frequency;
need_if_freq = 1;
break;
default:
call_all(dev, tuner, s_frequency, f);
call_all(dev, tuner, g_frequency, &new_freq);
dev->ctl_freq = new_freq.frequency;
break;
}
pr_debug("%s() %u : %u\n", __func__, f->frequency, dev->ctl_freq);
/* set post channel change settings in DIF first */
rc = cx231xx_tuner_post_channel_change(dev);
if (need_if_freq || dev->tuner_type == TUNER_NXP_TDA18271) {
if (dev->norm & (V4L2_STD_MN | V4L2_STD_NTSC_443))
if_frequency = 5400000; /*5.4MHz */
else if (dev->norm & V4L2_STD_B)
if_frequency = 6000000; /*6.0MHz */
else if (dev->norm & (V4L2_STD_PAL_DK | V4L2_STD_SECAM_DK))
if_frequency = 6900000; /*6.9MHz */
else if (dev->norm & V4L2_STD_GH)
if_frequency = 7100000; /*7.1MHz */
else if (dev->norm & V4L2_STD_PAL_I)
if_frequency = 7250000; /*7.25MHz */
else if (dev->norm & V4L2_STD_SECAM_L)
if_frequency = 6900000; /*6.9MHz */
else if (dev->norm & V4L2_STD_SECAM_LC)
if_frequency = 1250000; /*1.25MHz */
dev_dbg(dev->dev,
"if_frequency is set to %d\n", if_frequency);
cx231xx_set_Colibri_For_LowIF(dev, if_frequency, 1, 1);
update_HH_register_after_set_DIF(dev);
}
dev_dbg(dev->dev, "Set New FREQUENCY to %d\n", f->frequency);
return rc;
}
#ifdef CONFIG_VIDEO_ADV_DEBUG
int cx231xx_g_chip_info(struct file *file, void *fh,
struct v4l2_dbg_chip_info *chip)
{
switch (chip->match.addr) {
case 0: /* Cx231xx - internal registers */
return 0;
case 1: /* AFE - read byte */
strscpy(chip->name, "AFE (byte)", sizeof(chip->name));
return 0;
case 2: /* Video Block - read byte */
strscpy(chip->name, "Video (byte)", sizeof(chip->name));
return 0;
case 3: /* I2S block - read byte */
strscpy(chip->name, "I2S (byte)", sizeof(chip->name));
return 0;
case 4: /* AFE - read dword */
strscpy(chip->name, "AFE (dword)", sizeof(chip->name));
return 0;
case 5: /* Video Block - read dword */
strscpy(chip->name, "Video (dword)", sizeof(chip->name));
return 0;
case 6: /* I2S Block - read dword */
strscpy(chip->name, "I2S (dword)", sizeof(chip->name));
return 0;
}
return -EINVAL;
}
int cx231xx_g_register(struct file *file, void *priv,
struct v4l2_dbg_register *reg)
{
struct cx231xx *dev = video_drvdata(file);
int ret;
u8 value[4] = { 0, 0, 0, 0 };
u32 data = 0;
switch (reg->match.addr) {
case 0: /* Cx231xx - internal registers */
ret = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER,
(u16)reg->reg, value, 4);
reg->val = value[0] | value[1] << 8 |
value[2] << 16 | (u32)value[3] << 24;
reg->size = 4;
break;
case 1: /* AFE - read byte */
ret = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
(u16)reg->reg, 2, &data, 1);
reg->val = data;
reg->size = 1;
break;
case 2: /* Video Block - read byte */
ret = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
(u16)reg->reg, 2, &data, 1);
reg->val = data;
reg->size = 1;
break;
case 3: /* I2S block - read byte */
ret = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
(u16)reg->reg, 1, &data, 1);
reg->val = data;
reg->size = 1;
break;
case 4: /* AFE - read dword */
ret = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
(u16)reg->reg, 2, &data, 4);
reg->val = data;
reg->size = 4;
break;
case 5: /* Video Block - read dword */
ret = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
(u16)reg->reg, 2, &data, 4);
reg->val = data;
reg->size = 4;
break;
case 6: /* I2S Block - read dword */
ret = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
(u16)reg->reg, 1, &data, 4);
reg->val = data;
reg->size = 4;
break;
default:
return -EINVAL;
}
return ret < 0 ? ret : 0;
}
int cx231xx_s_register(struct file *file, void *priv,
const struct v4l2_dbg_register *reg)
{
struct cx231xx *dev = video_drvdata(file);
int ret;
u8 data[4] = { 0, 0, 0, 0 };
switch (reg->match.addr) {
case 0: /* cx231xx internal registers */
data[0] = (u8) reg->val;
data[1] = (u8) (reg->val >> 8);
data[2] = (u8) (reg->val >> 16);
data[3] = (u8) (reg->val >> 24);
ret = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
(u16)reg->reg, data, 4);
break;
case 1: /* AFE - write byte */
ret = cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS,
(u16)reg->reg, 2, reg->val, 1);
break;
case 2: /* Video Block - write byte */
ret = cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
(u16)reg->reg, 2, reg->val, 1);
break;
case 3: /* I2S block - write byte */
ret = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
(u16)reg->reg, 1, reg->val, 1);
break;
case 4: /* AFE - write dword */
ret = cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS,
(u16)reg->reg, 2, reg->val, 4);
break;
case 5: /* Video Block - write dword */
ret = cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
(u16)reg->reg, 2, reg->val, 4);
break;
case 6: /* I2S block - write dword */
ret = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
(u16)reg->reg, 1, reg->val, 4);
break;
default:
return -EINVAL;
}
return ret < 0 ? ret : 0;
}
#endif
static int vidioc_g_pixelaspect(struct file *file, void *priv,
int type, struct v4l2_fract *f)
{
struct cx231xx *dev = video_drvdata(file);
bool is_50hz = dev->norm & V4L2_STD_625_50;
if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
f->numerator = is_50hz ? 54 : 11;
f->denominator = is_50hz ? 59 : 10;
return 0;
}
static int vidioc_g_selection(struct file *file, void *priv,
struct v4l2_selection *s)
{
struct cx231xx *dev = video_drvdata(file);
if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
switch (s->target) {
case V4L2_SEL_TGT_CROP_BOUNDS:
case V4L2_SEL_TGT_CROP_DEFAULT:
s->r.left = 0;
s->r.top = 0;
s->r.width = dev->width;
s->r.height = dev->height;
break;
default:
return -EINVAL;
}
return 0;
}
int cx231xx_querycap(struct file *file, void *priv,
struct v4l2_capability *cap)
{
struct cx231xx *dev = video_drvdata(file);
strscpy(cap->driver, "cx231xx", sizeof(cap->driver));
strscpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card));
usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info));
cap->capabilities = V4L2_CAP_READWRITE |
V4L2_CAP_VBI_CAPTURE | V4L2_CAP_VIDEO_CAPTURE |
V4L2_CAP_STREAMING | V4L2_CAP_DEVICE_CAPS;
if (video_is_registered(&dev->radio_dev))
cap->capabilities |= V4L2_CAP_RADIO;
switch (dev->model) {
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_975:
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
cap->capabilities |= V4L2_CAP_TUNER;
break;
default:
if (dev->tuner_type != TUNER_ABSENT)
cap->capabilities |= V4L2_CAP_TUNER;
break;
}
return 0;
}
static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_fmtdesc *f)
{
if (unlikely(f->index >= ARRAY_SIZE(format)))
return -EINVAL;
f->pixelformat = format[f->index].fourcc;
return 0;
}
/* RAW VBI ioctls */
static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct cx231xx *dev = video_drvdata(file);
f->fmt.vbi.sampling_rate = 6750000 * 4;
f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
f->fmt.vbi.offset = 0;
f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ?
PAL_VBI_START_LINE : NTSC_VBI_START_LINE;
f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ?
PAL_VBI_LINES : NTSC_VBI_LINES;
f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ?
PAL_VBI_START_LINE + 312 : NTSC_VBI_START_LINE + 263;
f->fmt.vbi.count[1] = f->fmt.vbi.count[0];
memset(f->fmt.vbi.reserved, 0, sizeof(f->fmt.vbi.reserved));
return 0;
}
static int vidioc_try_fmt_vbi_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct cx231xx *dev = video_drvdata(file);
f->fmt.vbi.sampling_rate = 6750000 * 4;
f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
f->fmt.vbi.offset = 0;
f->fmt.vbi.flags = 0;
f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ?
PAL_VBI_START_LINE : NTSC_VBI_START_LINE;
f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ?
PAL_VBI_LINES : NTSC_VBI_LINES;
f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ?
PAL_VBI_START_LINE + 312 : NTSC_VBI_START_LINE + 263;
f->fmt.vbi.count[1] = f->fmt.vbi.count[0];
memset(f->fmt.vbi.reserved, 0, sizeof(f->fmt.vbi.reserved));
return 0;
}
static int vidioc_s_fmt_vbi_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
return vidioc_try_fmt_vbi_cap(file, priv, f);
}
/* ----------------------------------------------------------- */
/* RADIO ESPECIFIC IOCTLS */
/* ----------------------------------------------------------- */
static int radio_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
{
struct cx231xx *dev = video_drvdata(file);
if (t->index)
return -EINVAL;
strscpy(t->name, "Radio", sizeof(t->name));
call_all(dev, tuner, g_tuner, t);
return 0;
}
static int radio_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t)
{
struct cx231xx *dev = video_drvdata(file);
if (t->index)
return -EINVAL;
call_all(dev, tuner, s_tuner, t);
return 0;
}
/*
* cx231xx_v4l2_open()
* inits the device and starts isoc transfer
*/
static int cx231xx_v4l2_open(struct file *filp)
{
struct video_device *vdev = video_devdata(filp);
struct cx231xx *dev = video_drvdata(filp);
int ret;
if (mutex_lock_interruptible(&dev->lock))
return -ERESTARTSYS;
ret = v4l2_fh_open(filp);
if (ret) {
mutex_unlock(&dev->lock);
return ret;
}
if (dev->users++ == 0) {
/* Power up in Analog TV mode */
if (dev->board.external_av)
cx231xx_set_power_mode(dev,
POLARIS_AVMODE_ENXTERNAL_AV);
else
cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV);
/* set video alternate setting */
cx231xx_set_video_alternate(dev);
/* Needed, since GPIO might have disabled power of
some i2c device */
cx231xx_config_i2c(dev);
/* device needs to be initialized before isoc transfer */
dev->video_input = dev->video_input > 2 ? 2 : dev->video_input;
}
if (vdev->vfl_type == VFL_TYPE_RADIO) {
cx231xx_videodbg("video_open: setting radio device\n");
/* cx231xx_start_radio(dev); */
call_all(dev, tuner, s_radio);
}
if (vdev->vfl_type == VFL_TYPE_VBI) {
/* Set the required alternate setting VBI interface works in
Bulk mode only */
cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
}
mutex_unlock(&dev->lock);
return 0;
}
/*
* cx231xx_realease_resources()
* unregisters the v4l2,i2c and usb devices
* called when the device gets disconnected or at module unload
*/
void cx231xx_release_analog_resources(struct cx231xx *dev)
{
/*FIXME: I2C IR should be disconnected */
if (video_is_registered(&dev->radio_dev))
video_unregister_device(&dev->radio_dev);
if (video_is_registered(&dev->vbi_dev)) {
dev_info(dev->dev, "V4L2 device %s deregistered\n",
video_device_node_name(&dev->vbi_dev));
video_unregister_device(&dev->vbi_dev);
}
if (video_is_registered(&dev->vdev)) {
dev_info(dev->dev, "V4L2 device %s deregistered\n",
video_device_node_name(&dev->vdev));
if (dev->board.has_417)
cx231xx_417_unregister(dev);
video_unregister_device(&dev->vdev);
}
v4l2_ctrl_handler_free(&dev->ctrl_handler);
v4l2_ctrl_handler_free(&dev->radio_ctrl_handler);
}
/*
* cx231xx_close()
* stops streaming and deallocates all resources allocated by the v4l2
* calls and ioctls
*/
static int cx231xx_close(struct file *filp)
{
struct cx231xx *dev = video_drvdata(filp);
struct video_device *vdev = video_devdata(filp);
_vb2_fop_release(filp, NULL);
if (--dev->users == 0) {
/* Save some power by putting tuner to sleep */
call_all(dev, tuner, standby);
/* do this before setting alternate! */
if (dev->USE_ISO)
cx231xx_uninit_isoc(dev);
else
cx231xx_uninit_bulk(dev);
cx231xx_set_mode(dev, CX231XX_SUSPEND);
}
/*
* To workaround error number=-71 on EP0 for VideoGrabber,
* need exclude following.
* FIXME: It is probably safe to remove most of these, as we're
* now avoiding the alternate setting for INDEX_VANC
*/
if (!dev->board.no_alt_vanc && vdev->vfl_type == VFL_TYPE_VBI) {
/* do this before setting alternate! */
cx231xx_uninit_vbi_isoc(dev);
/* set alternate 0 */
if (!dev->vbi_or_sliced_cc_mode)
cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
else
cx231xx_set_alt_setting(dev, INDEX_HANC, 0);
wake_up_interruptible_nr(&dev->open, 1);
return 0;
}
if (dev->users == 0) {
/* set alternate 0 */
cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0);
}
wake_up_interruptible(&dev->open);
return 0;
}
static int cx231xx_v4l2_close(struct file *filp)
{
struct cx231xx *dev = video_drvdata(filp);
int rc;
mutex_lock(&dev->lock);
rc = cx231xx_close(filp);
mutex_unlock(&dev->lock);
return rc;
}
static const struct v4l2_file_operations cx231xx_v4l_fops = {
.owner = THIS_MODULE,
.open = cx231xx_v4l2_open,
.release = cx231xx_v4l2_close,
.read = vb2_fop_read,
.poll = vb2_fop_poll,
.mmap = vb2_fop_mmap,
.unlocked_ioctl = video_ioctl2,
};
static const struct v4l2_ioctl_ops video_ioctl_ops = {
.vidioc_querycap = cx231xx_querycap,
.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
.vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
.vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
.vidioc_try_fmt_vbi_cap = vidioc_try_fmt_vbi_cap,
.vidioc_s_fmt_vbi_cap = vidioc_s_fmt_vbi_cap,
.vidioc_g_pixelaspect = vidioc_g_pixelaspect,
.vidioc_g_selection = vidioc_g_selection,
.vidioc_reqbufs = vb2_ioctl_reqbufs,
.vidioc_querybuf = vb2_ioctl_querybuf,
.vidioc_qbuf = vb2_ioctl_qbuf,
.vidioc_dqbuf = vb2_ioctl_dqbuf,
.vidioc_s_std = vidioc_s_std,
.vidioc_g_std = vidioc_g_std,
.vidioc_enum_input = cx231xx_enum_input,
.vidioc_g_input = cx231xx_g_input,
.vidioc_s_input = cx231xx_s_input,
.vidioc_streamon = vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff,
.vidioc_g_tuner = cx231xx_g_tuner,
.vidioc_s_tuner = cx231xx_s_tuner,
.vidioc_g_frequency = cx231xx_g_frequency,
.vidioc_s_frequency = cx231xx_s_frequency,
#ifdef CONFIG_VIDEO_ADV_DEBUG
.vidioc_g_chip_info = cx231xx_g_chip_info,
.vidioc_g_register = cx231xx_g_register,
.vidioc_s_register = cx231xx_s_register,
#endif
.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
};
static struct video_device cx231xx_vbi_template;
static const struct video_device cx231xx_video_template = {
.fops = &cx231xx_v4l_fops,
.release = video_device_release_empty,
.ioctl_ops = &video_ioctl_ops,
.tvnorms = V4L2_STD_ALL,
};
static const struct v4l2_file_operations radio_fops = {
.owner = THIS_MODULE,
.open = cx231xx_v4l2_open,
.release = cx231xx_v4l2_close,
.poll = v4l2_ctrl_poll,
.unlocked_ioctl = video_ioctl2,
};
static const struct v4l2_ioctl_ops radio_ioctl_ops = {
.vidioc_querycap = cx231xx_querycap,
.vidioc_g_tuner = radio_g_tuner,
.vidioc_s_tuner = radio_s_tuner,
.vidioc_g_frequency = cx231xx_g_frequency,
.vidioc_s_frequency = cx231xx_s_frequency,
#ifdef CONFIG_VIDEO_ADV_DEBUG
.vidioc_g_chip_info = cx231xx_g_chip_info,
.vidioc_g_register = cx231xx_g_register,
.vidioc_s_register = cx231xx_s_register,
#endif
.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
};
static struct video_device cx231xx_radio_template = {
.name = "cx231xx-radio",
.fops = &radio_fops,
.ioctl_ops = &radio_ioctl_ops,
};
/******************************** usb interface ******************************/
static void cx231xx_vdev_init(struct cx231xx *dev,
struct video_device *vfd,
const struct video_device *template,
const char *type_name)
{
*vfd = *template;
vfd->v4l2_dev = &dev->v4l2_dev;
vfd->release = video_device_release_empty;
vfd->lock = &dev->lock;
snprintf(vfd->name, sizeof(vfd->name), "%s %s", dev->name, type_name);
video_set_drvdata(vfd, dev);
if (dev->tuner_type == TUNER_ABSENT) {
switch (dev->model) {
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_975:
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
break;
default:
v4l2_disable_ioctl(vfd, VIDIOC_G_FREQUENCY);
v4l2_disable_ioctl(vfd, VIDIOC_S_FREQUENCY);
v4l2_disable_ioctl(vfd, VIDIOC_G_TUNER);
v4l2_disable_ioctl(vfd, VIDIOC_S_TUNER);
break;
}
}
}
int cx231xx_register_analog_devices(struct cx231xx *dev)
{
struct vb2_queue *q;
int ret;
dev_info(dev->dev, "v4l2 driver version %s\n", CX231XX_VERSION);
/* set default norm */
dev->norm = V4L2_STD_PAL;
dev->width = norm_maxw(dev);
dev->height = norm_maxh(dev);
dev->interlaced = 0;
/* Analog specific initialization */
dev->format = &format[0];
/* Set the initial input */
video_mux(dev, dev->video_input);
call_all(dev, video, s_std, dev->norm);
v4l2_ctrl_handler_init(&dev->ctrl_handler, 10);
v4l2_ctrl_handler_init(&dev->radio_ctrl_handler, 5);
if (dev->sd_cx25840) {
v4l2_ctrl_add_handler(&dev->ctrl_handler,
dev->sd_cx25840->ctrl_handler, NULL, true);
v4l2_ctrl_add_handler(&dev->radio_ctrl_handler,
dev->sd_cx25840->ctrl_handler,
v4l2_ctrl_radio_filter, true);
}
if (dev->ctrl_handler.error)
return dev->ctrl_handler.error;
if (dev->radio_ctrl_handler.error)
return dev->radio_ctrl_handler.error;
/* enable vbi capturing */
/* write code here... */
/* allocate and fill video video_device struct */
cx231xx_vdev_init(dev, &dev->vdev, &cx231xx_video_template, "video");
#if defined(CONFIG_MEDIA_CONTROLLER)
dev->video_pad.flags = MEDIA_PAD_FL_SINK;
ret = media_entity_pads_init(&dev->vdev.entity, 1, &dev->video_pad);
if (ret < 0)
dev_err(dev->dev, "failed to initialize video media entity!\n");
#endif
dev->vdev.ctrl_handler = &dev->ctrl_handler;
q = &dev->vidq;
q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
q->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF | VB2_READ;
q->drv_priv = dev;
q->buf_struct_size = sizeof(struct cx231xx_buffer);
q->ops = &cx231xx_video_qops;
q->mem_ops = &vb2_vmalloc_memops;
q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
q->min_buffers_needed = 1;
q->lock = &dev->lock;
ret = vb2_queue_init(q);
if (ret)
return ret;
dev->vdev.queue = q;
dev->vdev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
V4L2_CAP_VIDEO_CAPTURE;
switch (dev->model) { /* i2c device tuners */
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_975:
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
dev->vdev.device_caps |= V4L2_CAP_TUNER;
break;
default:
if (dev->tuner_type != TUNER_ABSENT)
dev->vdev.device_caps |= V4L2_CAP_TUNER;
break;
}
/* register v4l2 video video_device */
ret = video_register_device(&dev->vdev, VFL_TYPE_VIDEO,
video_nr[dev->devno]);
if (ret) {
dev_err(dev->dev,
"unable to register video device (error=%i).\n",
ret);
return ret;
}
dev_info(dev->dev, "Registered video device %s [v4l2]\n",
video_device_node_name(&dev->vdev));
/* Initialize VBI template */
cx231xx_vbi_template = cx231xx_video_template;
strscpy(cx231xx_vbi_template.name, "cx231xx-vbi",
sizeof(cx231xx_vbi_template.name));
/* Allocate and fill vbi video_device struct */
cx231xx_vdev_init(dev, &dev->vbi_dev, &cx231xx_vbi_template, "vbi");
#if defined(CONFIG_MEDIA_CONTROLLER)
dev->vbi_pad.flags = MEDIA_PAD_FL_SINK;
ret = media_entity_pads_init(&dev->vbi_dev.entity, 1, &dev->vbi_pad);
if (ret < 0)
dev_err(dev->dev, "failed to initialize vbi media entity!\n");
#endif
dev->vbi_dev.ctrl_handler = &dev->ctrl_handler;
q = &dev->vbiq;
q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
q->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF | VB2_READ;
q->drv_priv = dev;
q->buf_struct_size = sizeof(struct cx231xx_buffer);
q->ops = &cx231xx_vbi_qops;
q->mem_ops = &vb2_vmalloc_memops;
q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
q->min_buffers_needed = 1;
q->lock = &dev->lock;
ret = vb2_queue_init(q);
if (ret)
return ret;
dev->vbi_dev.queue = q;
dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
V4L2_CAP_VBI_CAPTURE;
switch (dev->model) { /* i2c device tuners */
case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
case CX231XX_BOARD_HAUPPAUGE_935C:
case CX231XX_BOARD_HAUPPAUGE_955Q:
case CX231XX_BOARD_HAUPPAUGE_975:
case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
break;
default:
if (dev->tuner_type != TUNER_ABSENT)
dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
}
/* register v4l2 vbi video_device */
ret = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
vbi_nr[dev->devno]);
if (ret < 0) {
dev_err(dev->dev, "unable to register vbi device\n");
return ret;
}
dev_info(dev->dev, "Registered VBI device %s\n",
video_device_node_name(&dev->vbi_dev));
if (cx231xx_boards[dev->model].radio.type == CX231XX_RADIO) {
cx231xx_vdev_init(dev, &dev->radio_dev,
&cx231xx_radio_template, "radio");
dev->radio_dev.ctrl_handler = &dev->radio_ctrl_handler;
dev->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
ret = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
radio_nr[dev->devno]);
if (ret < 0) {
dev_err(dev->dev,
"can't register radio device\n");
return ret;
}
dev_info(dev->dev, "Registered radio device as %s\n",
video_device_node_name(&dev->radio_dev));
}
return 0;
}
| linux-master | drivers/media/usb/cx231xx/cx231xx-video.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_entity.c -- USB Video Class driver
*
* Copyright (C) 2005-2011
* Laurent Pinchart ([email protected])
*/
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/videodev2.h>
#include <media/v4l2-common.h>
#include "uvcvideo.h"
static int uvc_mc_create_links(struct uvc_video_chain *chain,
struct uvc_entity *entity)
{
const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE;
struct media_entity *sink;
unsigned int i;
int ret;
sink = (UVC_ENTITY_TYPE(entity) == UVC_TT_STREAMING)
? (entity->vdev ? &entity->vdev->entity : NULL)
: &entity->subdev.entity;
if (sink == NULL)
return 0;
for (i = 0; i < entity->num_pads; ++i) {
struct media_entity *source;
struct uvc_entity *remote;
u8 remote_pad;
if (!(entity->pads[i].flags & MEDIA_PAD_FL_SINK))
continue;
remote = uvc_entity_by_id(chain->dev, entity->baSourceID[i]);
if (remote == NULL || remote->num_pads == 0)
return -EINVAL;
source = (UVC_ENTITY_TYPE(remote) == UVC_TT_STREAMING)
? (remote->vdev ? &remote->vdev->entity : NULL)
: &remote->subdev.entity;
if (source == NULL)
continue;
remote_pad = remote->num_pads - 1;
ret = media_create_pad_link(source, remote_pad,
sink, i, flags);
if (ret < 0)
return ret;
}
return 0;
}
static const struct v4l2_subdev_ops uvc_subdev_ops = {
};
void uvc_mc_cleanup_entity(struct uvc_entity *entity)
{
if (UVC_ENTITY_TYPE(entity) != UVC_TT_STREAMING)
media_entity_cleanup(&entity->subdev.entity);
else if (entity->vdev != NULL)
media_entity_cleanup(&entity->vdev->entity);
}
static int uvc_mc_init_entity(struct uvc_video_chain *chain,
struct uvc_entity *entity)
{
int ret;
if (UVC_ENTITY_TYPE(entity) != UVC_TT_STREAMING) {
u32 function;
v4l2_subdev_init(&entity->subdev, &uvc_subdev_ops);
strscpy(entity->subdev.name, entity->name,
sizeof(entity->subdev.name));
switch (UVC_ENTITY_TYPE(entity)) {
case UVC_VC_SELECTOR_UNIT:
function = MEDIA_ENT_F_VID_MUX;
break;
case UVC_VC_PROCESSING_UNIT:
case UVC_VC_EXTENSION_UNIT:
/* For lack of a better option. */
function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
break;
case UVC_COMPOSITE_CONNECTOR:
case UVC_COMPONENT_CONNECTOR:
function = MEDIA_ENT_F_CONN_COMPOSITE;
break;
case UVC_SVIDEO_CONNECTOR:
function = MEDIA_ENT_F_CONN_SVIDEO;
break;
case UVC_ITT_CAMERA:
function = MEDIA_ENT_F_CAM_SENSOR;
break;
case UVC_TT_VENDOR_SPECIFIC:
case UVC_ITT_VENDOR_SPECIFIC:
case UVC_ITT_MEDIA_TRANSPORT_INPUT:
case UVC_OTT_VENDOR_SPECIFIC:
case UVC_OTT_DISPLAY:
case UVC_OTT_MEDIA_TRANSPORT_OUTPUT:
case UVC_EXTERNAL_VENDOR_SPECIFIC:
case UVC_EXT_GPIO_UNIT:
default:
function = MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN;
break;
}
entity->subdev.entity.function = function;
ret = media_entity_pads_init(&entity->subdev.entity,
entity->num_pads, entity->pads);
if (ret < 0)
return ret;
ret = v4l2_device_register_subdev(&chain->dev->vdev,
&entity->subdev);
} else if (entity->vdev != NULL) {
ret = media_entity_pads_init(&entity->vdev->entity,
entity->num_pads, entity->pads);
if (entity->flags & UVC_ENTITY_FLAG_DEFAULT)
entity->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT;
} else
ret = 0;
return ret;
}
int uvc_mc_register_entities(struct uvc_video_chain *chain)
{
struct uvc_entity *entity;
int ret;
list_for_each_entry(entity, &chain->entities, chain) {
ret = uvc_mc_init_entity(chain, entity);
if (ret < 0) {
dev_info(&chain->dev->udev->dev,
"Failed to initialize entity for entity %u\n",
entity->id);
return ret;
}
}
list_for_each_entry(entity, &chain->entities, chain) {
ret = uvc_mc_create_links(chain, entity);
if (ret < 0) {
dev_info(&chain->dev->udev->dev,
"Failed to create links for entity %u\n",
entity->id);
return ret;
}
}
return 0;
}
| linux-master | drivers/media/usb/uvc/uvc_entity.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_isight.c -- USB Video Class driver - iSight support
*
* Copyright (C) 2006-2007
* Ivan N. Zlatev <[email protected]>
* Copyright (C) 2008-2009
* Laurent Pinchart <[email protected]>
*/
#include <linux/usb.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include "uvcvideo.h"
/*
* Built-in iSight webcams implements most of UVC 1.0 except a
* different packet format. Instead of sending a header at the
* beginning of each isochronous transfer payload, the webcam sends a
* single header per image (on its own in a packet), followed by
* packets containing data only.
*
* Offset Size (bytes) Description
* ------------------------------------------------------------------
* 0x00 1 Header length
* 0x01 1 Flags (UVC-compliant)
* 0x02 4 Always equal to '11223344'
* 0x06 8 Always equal to 'deadbeefdeadface'
* 0x0e 16 Unknown
*
* The header can be prefixed by an optional, unknown-purpose byte.
*/
static int isight_decode(struct uvc_video_queue *queue, struct uvc_buffer *buf,
const u8 *data, unsigned int len)
{
static const u8 hdr[] = {
0x11, 0x22, 0x33, 0x44,
0xde, 0xad, 0xbe, 0xef,
0xde, 0xad, 0xfa, 0xce
};
struct uvc_streaming *stream = uvc_queue_to_stream(queue);
unsigned int maxlen, nbytes;
u8 *mem;
int is_header = 0;
if (buf == NULL)
return 0;
if ((len >= 14 && memcmp(&data[2], hdr, 12) == 0) ||
(len >= 15 && memcmp(&data[3], hdr, 12) == 0)) {
uvc_dbg(stream->dev, FRAME, "iSight header found\n");
is_header = 1;
}
/* Synchronize to the input stream by waiting for a header packet. */
if (buf->state != UVC_BUF_STATE_ACTIVE) {
if (!is_header) {
uvc_dbg(stream->dev, FRAME,
"Dropping packet (out of sync)\n");
return 0;
}
buf->state = UVC_BUF_STATE_ACTIVE;
}
/*
* Mark the buffer as done if we're at the beginning of a new frame.
*
* Empty buffers (bytesused == 0) don't trigger end of frame detection
* as it doesn't make sense to return an empty buffer.
*/
if (is_header && buf->bytesused != 0) {
buf->state = UVC_BUF_STATE_DONE;
return -EAGAIN;
}
/*
* Copy the video data to the buffer. Skip header packets, as they
* contain no data.
*/
if (!is_header) {
maxlen = buf->length - buf->bytesused;
mem = buf->mem + buf->bytesused;
nbytes = min(len, maxlen);
memcpy(mem, data, nbytes);
buf->bytesused += nbytes;
if (len > maxlen || buf->bytesused == buf->length) {
uvc_dbg(stream->dev, FRAME,
"Frame complete (overflow)\n");
buf->state = UVC_BUF_STATE_DONE;
}
}
return 0;
}
void uvc_video_decode_isight(struct uvc_urb *uvc_urb, struct uvc_buffer *buf,
struct uvc_buffer *meta_buf)
{
struct urb *urb = uvc_urb->urb;
struct uvc_streaming *stream = uvc_urb->stream;
int ret, i;
for (i = 0; i < urb->number_of_packets; ++i) {
if (urb->iso_frame_desc[i].status < 0) {
uvc_dbg(stream->dev, FRAME,
"USB isochronous frame lost (%d)\n",
urb->iso_frame_desc[i].status);
}
/*
* Decode the payload packet.
*
* uvc_video_decode is entered twice when a frame transition
* has been detected because the end of frame can only be
* reliably detected when the first packet of the new frame
* is processed. The first pass detects the transition and
* closes the previous frame's buffer, the second pass
* processes the data of the first payload of the new frame.
*/
do {
ret = isight_decode(&stream->queue, buf,
urb->transfer_buffer +
urb->iso_frame_desc[i].offset,
urb->iso_frame_desc[i].actual_length);
if (buf == NULL)
break;
if (buf->state == UVC_BUF_STATE_DONE ||
buf->state == UVC_BUF_STATE_ERROR)
buf = uvc_queue_next_buffer(&stream->queue,
buf);
} while (ret == -EAGAIN);
}
}
| linux-master | drivers/media/usb/uvc/uvc_isight.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_ctrl.c -- USB Video Class driver - Controls
*
* Copyright (C) 2005-2010
* Laurent Pinchart ([email protected])
*/
#include <asm/barrier.h>
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/usb.h>
#include <linux/usb/uvc.h>
#include <linux/videodev2.h>
#include <linux/vmalloc.h>
#include <linux/wait.h>
#include <linux/workqueue.h>
#include <linux/atomic.h>
#include <media/v4l2-ctrls.h>
#include "uvcvideo.h"
#define UVC_CTRL_DATA_CURRENT 0
#define UVC_CTRL_DATA_BACKUP 1
#define UVC_CTRL_DATA_MIN 2
#define UVC_CTRL_DATA_MAX 3
#define UVC_CTRL_DATA_RES 4
#define UVC_CTRL_DATA_DEF 5
#define UVC_CTRL_DATA_LAST 6
/* ------------------------------------------------------------------------
* Controls
*/
static const struct uvc_control_info uvc_ctrls[] = {
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_BRIGHTNESS_CONTROL,
.index = 0,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_CONTRAST_CONTROL,
.index = 1,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_HUE_CONTROL,
.index = 2,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_SATURATION_CONTROL,
.index = 3,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_SHARPNESS_CONTROL,
.index = 4,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_GAMMA_CONTROL,
.index = 5,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_TEMPERATURE_CONTROL,
.index = 6,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_COMPONENT_CONTROL,
.index = 7,
.size = 4,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_BACKLIGHT_COMPENSATION_CONTROL,
.index = 8,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_GAIN_CONTROL,
.index = 9,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_POWER_LINE_FREQUENCY_CONTROL,
.index = 10,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_HUE_AUTO_CONTROL,
.index = 11,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL,
.index = 12,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL,
.index = 13,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_DIGITAL_MULTIPLIER_CONTROL,
.index = 14,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL,
.index = 15,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_ANALOG_VIDEO_STANDARD_CONTROL,
.index = 16,
.size = 1,
.flags = UVC_CTRL_FLAG_GET_CUR,
},
{
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_ANALOG_LOCK_STATUS_CONTROL,
.index = 17,
.size = 1,
.flags = UVC_CTRL_FLAG_GET_CUR,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_SCANNING_MODE_CONTROL,
.index = 0,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_AE_MODE_CONTROL,
.index = 1,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_GET_RES
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_AE_PRIORITY_CONTROL,
.index = 2,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL,
.index = 3,
.size = 4,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_EXPOSURE_TIME_RELATIVE_CONTROL,
.index = 4,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_FOCUS_ABSOLUTE_CONTROL,
.index = 5,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_FOCUS_RELATIVE_CONTROL,
.index = 6,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_MIN
| UVC_CTRL_FLAG_GET_MAX | UVC_CTRL_FLAG_GET_RES
| UVC_CTRL_FLAG_GET_DEF
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_IRIS_ABSOLUTE_CONTROL,
.index = 7,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_IRIS_RELATIVE_CONTROL,
.index = 8,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_ZOOM_ABSOLUTE_CONTROL,
.index = 9,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_ZOOM_RELATIVE_CONTROL,
.index = 10,
.size = 3,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_MIN
| UVC_CTRL_FLAG_GET_MAX | UVC_CTRL_FLAG_GET_RES
| UVC_CTRL_FLAG_GET_DEF
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PANTILT_ABSOLUTE_CONTROL,
.index = 11,
.size = 8,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PANTILT_RELATIVE_CONTROL,
.index = 12,
.size = 4,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_ROLL_ABSOLUTE_CONTROL,
.index = 13,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR
| UVC_CTRL_FLAG_GET_RANGE
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_ROLL_RELATIVE_CONTROL,
.index = 14,
.size = 2,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_MIN
| UVC_CTRL_FLAG_GET_MAX | UVC_CTRL_FLAG_GET_RES
| UVC_CTRL_FLAG_GET_DEF
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_FOCUS_AUTO_CONTROL,
.index = 17,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_RESTORE,
},
{
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PRIVACY_CONTROL,
.index = 18,
.size = 1,
.flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_RESTORE
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
{
.entity = UVC_GUID_EXT_GPIO_CONTROLLER,
.selector = UVC_CT_PRIVACY_CONTROL,
.index = 0,
.size = 1,
.flags = UVC_CTRL_FLAG_GET_CUR
| UVC_CTRL_FLAG_AUTO_UPDATE,
},
};
static const u32 uvc_control_classes[] = {
V4L2_CID_CAMERA_CLASS,
V4L2_CID_USER_CLASS,
};
static const int exposure_auto_mapping[] = { 2, 1, 4, 8 };
/*
* This function translates the V4L2 menu index @idx, as exposed to userspace as
* the V4L2 control value, to the corresponding UVC control value used by the
* device. The custom menu_mapping in the control @mapping is used when
* available, otherwise the function assumes that the V4L2 and UVC values are
* identical.
*
* For controls of type UVC_CTRL_DATA_TYPE_BITMASK, the UVC control value is
* expressed as a bitmask and is thus guaranteed to have a single bit set.
*
* The function returns -EINVAL if the V4L2 menu index @idx isn't valid for the
* control, which includes all controls whose type isn't UVC_CTRL_DATA_TYPE_ENUM
* or UVC_CTRL_DATA_TYPE_BITMASK.
*/
static int uvc_mapping_get_menu_value(const struct uvc_control_mapping *mapping,
u32 idx)
{
if (!test_bit(idx, &mapping->menu_mask))
return -EINVAL;
if (mapping->menu_mapping)
return mapping->menu_mapping[idx];
return idx;
}
static const char *
uvc_mapping_get_menu_name(const struct uvc_control_mapping *mapping, u32 idx)
{
if (!test_bit(idx, &mapping->menu_mask))
return NULL;
if (mapping->menu_names)
return mapping->menu_names[idx];
return v4l2_ctrl_get_menu(mapping->id)[idx];
}
static s32 uvc_ctrl_get_zoom(struct uvc_control_mapping *mapping,
u8 query, const u8 *data)
{
s8 zoom = (s8)data[0];
switch (query) {
case UVC_GET_CUR:
return (zoom == 0) ? 0 : (zoom > 0 ? data[2] : -data[2]);
case UVC_GET_MIN:
case UVC_GET_MAX:
case UVC_GET_RES:
case UVC_GET_DEF:
default:
return data[2];
}
}
static void uvc_ctrl_set_zoom(struct uvc_control_mapping *mapping,
s32 value, u8 *data)
{
data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff;
data[2] = min((int)abs(value), 0xff);
}
static s32 uvc_ctrl_get_rel_speed(struct uvc_control_mapping *mapping,
u8 query, const u8 *data)
{
unsigned int first = mapping->offset / 8;
s8 rel = (s8)data[first];
switch (query) {
case UVC_GET_CUR:
return (rel == 0) ? 0 : (rel > 0 ? data[first+1]
: -data[first+1]);
case UVC_GET_MIN:
return -data[first+1];
case UVC_GET_MAX:
case UVC_GET_RES:
case UVC_GET_DEF:
default:
return data[first+1];
}
}
static void uvc_ctrl_set_rel_speed(struct uvc_control_mapping *mapping,
s32 value, u8 *data)
{
unsigned int first = mapping->offset / 8;
data[first] = value == 0 ? 0 : (value > 0) ? 1 : 0xff;
data[first+1] = min_t(int, abs(value), 0xff);
}
static const struct uvc_control_mapping uvc_ctrl_mappings[] = {
{
.id = V4L2_CID_BRIGHTNESS,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_BRIGHTNESS_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
},
{
.id = V4L2_CID_CONTRAST,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_CONTRAST_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_HUE,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_HUE_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
.master_id = V4L2_CID_HUE_AUTO,
.master_manual = 0,
},
{
.id = V4L2_CID_SATURATION,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_SATURATION_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_SHARPNESS,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_SHARPNESS_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_GAMMA,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_GAMMA_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_BACKLIGHT_COMPENSATION,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_BACKLIGHT_COMPENSATION_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_GAIN,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_GAIN_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_HUE_AUTO,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_HUE_AUTO_CONTROL,
.size = 1,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_BOOLEAN,
.data_type = UVC_CTRL_DATA_TYPE_BOOLEAN,
.slave_ids = { V4L2_CID_HUE, },
},
{
.id = V4L2_CID_EXPOSURE_AUTO,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_AE_MODE_CONTROL,
.size = 4,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_MENU,
.data_type = UVC_CTRL_DATA_TYPE_BITMASK,
.menu_mapping = exposure_auto_mapping,
.menu_mask = GENMASK(V4L2_EXPOSURE_APERTURE_PRIORITY,
V4L2_EXPOSURE_AUTO),
.slave_ids = { V4L2_CID_EXPOSURE_ABSOLUTE, },
},
{
.id = V4L2_CID_EXPOSURE_AUTO_PRIORITY,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_AE_PRIORITY_CONTROL,
.size = 1,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_BOOLEAN,
.data_type = UVC_CTRL_DATA_TYPE_BOOLEAN,
},
{
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL,
.size = 32,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
.master_id = V4L2_CID_EXPOSURE_AUTO,
.master_manual = V4L2_EXPOSURE_MANUAL,
},
{
.id = V4L2_CID_AUTO_WHITE_BALANCE,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL,
.size = 1,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_BOOLEAN,
.data_type = UVC_CTRL_DATA_TYPE_BOOLEAN,
.slave_ids = { V4L2_CID_WHITE_BALANCE_TEMPERATURE, },
},
{
.id = V4L2_CID_WHITE_BALANCE_TEMPERATURE,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_TEMPERATURE_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
.master_id = V4L2_CID_AUTO_WHITE_BALANCE,
.master_manual = 0,
},
{
.id = V4L2_CID_AUTO_WHITE_BALANCE,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL,
.size = 1,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_BOOLEAN,
.data_type = UVC_CTRL_DATA_TYPE_BOOLEAN,
.slave_ids = { V4L2_CID_BLUE_BALANCE,
V4L2_CID_RED_BALANCE },
},
{
.id = V4L2_CID_BLUE_BALANCE,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_COMPONENT_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
.master_id = V4L2_CID_AUTO_WHITE_BALANCE,
.master_manual = 0,
},
{
.id = V4L2_CID_RED_BALANCE,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_WHITE_BALANCE_COMPONENT_CONTROL,
.size = 16,
.offset = 16,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
.master_id = V4L2_CID_AUTO_WHITE_BALANCE,
.master_manual = 0,
},
{
.id = V4L2_CID_FOCUS_ABSOLUTE,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_FOCUS_ABSOLUTE_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
.master_id = V4L2_CID_FOCUS_AUTO,
.master_manual = 0,
},
{
.id = V4L2_CID_FOCUS_AUTO,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_FOCUS_AUTO_CONTROL,
.size = 1,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_BOOLEAN,
.data_type = UVC_CTRL_DATA_TYPE_BOOLEAN,
.slave_ids = { V4L2_CID_FOCUS_ABSOLUTE, },
},
{
.id = V4L2_CID_IRIS_ABSOLUTE,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_IRIS_ABSOLUTE_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_IRIS_RELATIVE,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_IRIS_RELATIVE_CONTROL,
.size = 8,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
},
{
.id = V4L2_CID_ZOOM_ABSOLUTE,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_ZOOM_ABSOLUTE_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_UNSIGNED,
},
{
.id = V4L2_CID_ZOOM_CONTINUOUS,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_ZOOM_RELATIVE_CONTROL,
.size = 0,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
.get = uvc_ctrl_get_zoom,
.set = uvc_ctrl_set_zoom,
},
{
.id = V4L2_CID_PAN_ABSOLUTE,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PANTILT_ABSOLUTE_CONTROL,
.size = 32,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
},
{
.id = V4L2_CID_TILT_ABSOLUTE,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PANTILT_ABSOLUTE_CONTROL,
.size = 32,
.offset = 32,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
},
{
.id = V4L2_CID_PAN_SPEED,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PANTILT_RELATIVE_CONTROL,
.size = 16,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
.get = uvc_ctrl_get_rel_speed,
.set = uvc_ctrl_set_rel_speed,
},
{
.id = V4L2_CID_TILT_SPEED,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PANTILT_RELATIVE_CONTROL,
.size = 16,
.offset = 16,
.v4l2_type = V4L2_CTRL_TYPE_INTEGER,
.data_type = UVC_CTRL_DATA_TYPE_SIGNED,
.get = uvc_ctrl_get_rel_speed,
.set = uvc_ctrl_set_rel_speed,
},
{
.id = V4L2_CID_PRIVACY,
.entity = UVC_GUID_UVC_CAMERA,
.selector = UVC_CT_PRIVACY_CONTROL,
.size = 1,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_BOOLEAN,
.data_type = UVC_CTRL_DATA_TYPE_BOOLEAN,
},
{
.id = V4L2_CID_PRIVACY,
.entity = UVC_GUID_EXT_GPIO_CONTROLLER,
.selector = UVC_CT_PRIVACY_CONTROL,
.size = 1,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_BOOLEAN,
.data_type = UVC_CTRL_DATA_TYPE_BOOLEAN,
},
};
const struct uvc_control_mapping uvc_ctrl_power_line_mapping_limited = {
.id = V4L2_CID_POWER_LINE_FREQUENCY,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_POWER_LINE_FREQUENCY_CONTROL,
.size = 2,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_MENU,
.data_type = UVC_CTRL_DATA_TYPE_ENUM,
.menu_mask = GENMASK(V4L2_CID_POWER_LINE_FREQUENCY_60HZ,
V4L2_CID_POWER_LINE_FREQUENCY_50HZ),
};
const struct uvc_control_mapping uvc_ctrl_power_line_mapping_uvc11 = {
.id = V4L2_CID_POWER_LINE_FREQUENCY,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_POWER_LINE_FREQUENCY_CONTROL,
.size = 2,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_MENU,
.data_type = UVC_CTRL_DATA_TYPE_ENUM,
.menu_mask = GENMASK(V4L2_CID_POWER_LINE_FREQUENCY_60HZ,
V4L2_CID_POWER_LINE_FREQUENCY_DISABLED),
};
static const struct uvc_control_mapping *uvc_ctrl_mappings_uvc11[] = {
&uvc_ctrl_power_line_mapping_uvc11,
NULL, /* Sentinel */
};
static const struct uvc_control_mapping uvc_ctrl_power_line_mapping_uvc15 = {
.id = V4L2_CID_POWER_LINE_FREQUENCY,
.entity = UVC_GUID_UVC_PROCESSING,
.selector = UVC_PU_POWER_LINE_FREQUENCY_CONTROL,
.size = 2,
.offset = 0,
.v4l2_type = V4L2_CTRL_TYPE_MENU,
.data_type = UVC_CTRL_DATA_TYPE_ENUM,
.menu_mask = GENMASK(V4L2_CID_POWER_LINE_FREQUENCY_AUTO,
V4L2_CID_POWER_LINE_FREQUENCY_DISABLED),
};
static const struct uvc_control_mapping *uvc_ctrl_mappings_uvc15[] = {
&uvc_ctrl_power_line_mapping_uvc15,
NULL, /* Sentinel */
};
/* ------------------------------------------------------------------------
* Utility functions
*/
static inline u8 *uvc_ctrl_data(struct uvc_control *ctrl, int id)
{
return ctrl->uvc_data + id * ctrl->info.size;
}
static inline int uvc_test_bit(const u8 *data, int bit)
{
return (data[bit >> 3] >> (bit & 7)) & 1;
}
static inline void uvc_clear_bit(u8 *data, int bit)
{
data[bit >> 3] &= ~(1 << (bit & 7));
}
/*
* Extract the bit string specified by mapping->offset and mapping->size
* from the little-endian data stored at 'data' and return the result as
* a signed 32bit integer. Sign extension will be performed if the mapping
* references a signed data type.
*/
static s32 uvc_get_le_value(struct uvc_control_mapping *mapping,
u8 query, const u8 *data)
{
int bits = mapping->size;
int offset = mapping->offset;
s32 value = 0;
u8 mask;
data += offset / 8;
offset &= 7;
mask = ((1LL << bits) - 1) << offset;
while (1) {
u8 byte = *data & mask;
value |= offset > 0 ? (byte >> offset) : (byte << (-offset));
bits -= 8 - (offset > 0 ? offset : 0);
if (bits <= 0)
break;
offset -= 8;
mask = (1 << bits) - 1;
data++;
}
/* Sign-extend the value if needed. */
if (mapping->data_type == UVC_CTRL_DATA_TYPE_SIGNED)
value |= -(value & (1 << (mapping->size - 1)));
return value;
}
/*
* Set the bit string specified by mapping->offset and mapping->size
* in the little-endian data stored at 'data' to the value 'value'.
*/
static void uvc_set_le_value(struct uvc_control_mapping *mapping,
s32 value, u8 *data)
{
int bits = mapping->size;
int offset = mapping->offset;
u8 mask;
/*
* According to the v4l2 spec, writing any value to a button control
* should result in the action belonging to the button control being
* triggered. UVC devices however want to see a 1 written -> override
* value.
*/
if (mapping->v4l2_type == V4L2_CTRL_TYPE_BUTTON)
value = -1;
data += offset / 8;
offset &= 7;
for (; bits > 0; data++) {
mask = ((1LL << bits) - 1) << offset;
*data = (*data & ~mask) | ((value << offset) & mask);
value >>= offset ? offset : 8;
bits -= 8 - offset;
offset = 0;
}
}
/* ------------------------------------------------------------------------
* Terminal and unit management
*/
static int uvc_entity_match_guid(const struct uvc_entity *entity,
const u8 guid[16])
{
return memcmp(entity->guid, guid, sizeof(entity->guid)) == 0;
}
/* ------------------------------------------------------------------------
* UVC Controls
*/
static void __uvc_find_control(struct uvc_entity *entity, u32 v4l2_id,
struct uvc_control_mapping **mapping, struct uvc_control **control,
int next)
{
struct uvc_control *ctrl;
struct uvc_control_mapping *map;
unsigned int i;
if (entity == NULL)
return;
for (i = 0; i < entity->ncontrols; ++i) {
ctrl = &entity->controls[i];
if (!ctrl->initialized)
continue;
list_for_each_entry(map, &ctrl->info.mappings, list) {
if ((map->id == v4l2_id) && !next) {
*control = ctrl;
*mapping = map;
return;
}
if ((*mapping == NULL || (*mapping)->id > map->id) &&
(map->id > v4l2_id) && next) {
*control = ctrl;
*mapping = map;
}
}
}
}
static struct uvc_control *uvc_find_control(struct uvc_video_chain *chain,
u32 v4l2_id, struct uvc_control_mapping **mapping)
{
struct uvc_control *ctrl = NULL;
struct uvc_entity *entity;
int next = v4l2_id & V4L2_CTRL_FLAG_NEXT_CTRL;
*mapping = NULL;
/* Mask the query flags. */
v4l2_id &= V4L2_CTRL_ID_MASK;
/* Find the control. */
list_for_each_entry(entity, &chain->entities, chain) {
__uvc_find_control(entity, v4l2_id, mapping, &ctrl, next);
if (ctrl && !next)
return ctrl;
}
if (ctrl == NULL && !next)
uvc_dbg(chain->dev, CONTROL, "Control 0x%08x not found\n",
v4l2_id);
return ctrl;
}
static int uvc_ctrl_populate_cache(struct uvc_video_chain *chain,
struct uvc_control *ctrl)
{
int ret;
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_DEF) {
ret = uvc_query_ctrl(chain->dev, UVC_GET_DEF, ctrl->entity->id,
chain->dev->intfnum, ctrl->info.selector,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_DEF),
ctrl->info.size);
if (ret < 0)
return ret;
}
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_MIN) {
ret = uvc_query_ctrl(chain->dev, UVC_GET_MIN, ctrl->entity->id,
chain->dev->intfnum, ctrl->info.selector,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MIN),
ctrl->info.size);
if (ret < 0)
return ret;
}
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_MAX) {
ret = uvc_query_ctrl(chain->dev, UVC_GET_MAX, ctrl->entity->id,
chain->dev->intfnum, ctrl->info.selector,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MAX),
ctrl->info.size);
if (ret < 0)
return ret;
}
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_RES) {
ret = uvc_query_ctrl(chain->dev, UVC_GET_RES, ctrl->entity->id,
chain->dev->intfnum, ctrl->info.selector,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES),
ctrl->info.size);
if (ret < 0) {
if (UVC_ENTITY_TYPE(ctrl->entity) !=
UVC_VC_EXTENSION_UNIT)
return ret;
/*
* GET_RES is mandatory for XU controls, but some
* cameras still choke on it. Ignore errors and set the
* resolution value to zero.
*/
uvc_warn_once(chain->dev, UVC_WARN_XU_GET_RES,
"UVC non compliance - GET_RES failed on "
"an XU control. Enabling workaround.\n");
memset(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES), 0,
ctrl->info.size);
}
}
ctrl->cached = 1;
return 0;
}
static s32 __uvc_ctrl_get_value(struct uvc_control_mapping *mapping,
const u8 *data)
{
s32 value = mapping->get(mapping, UVC_GET_CUR, data);
if (mapping->v4l2_type == V4L2_CTRL_TYPE_MENU) {
unsigned int i;
for (i = 0; BIT(i) <= mapping->menu_mask; ++i) {
u32 menu_value;
if (!test_bit(i, &mapping->menu_mask))
continue;
menu_value = uvc_mapping_get_menu_value(mapping, i);
if (menu_value == value) {
value = i;
break;
}
}
}
return value;
}
static int __uvc_ctrl_load_cur(struct uvc_video_chain *chain,
struct uvc_control *ctrl)
{
u8 *data;
int ret;
if (ctrl->loaded)
return 0;
data = uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT);
if ((ctrl->info.flags & UVC_CTRL_FLAG_GET_CUR) == 0) {
memset(data, 0, ctrl->info.size);
ctrl->loaded = 1;
return 0;
}
if (ctrl->entity->get_cur)
ret = ctrl->entity->get_cur(chain->dev, ctrl->entity,
ctrl->info.selector, data,
ctrl->info.size);
else
ret = uvc_query_ctrl(chain->dev, UVC_GET_CUR,
ctrl->entity->id, chain->dev->intfnum,
ctrl->info.selector, data,
ctrl->info.size);
if (ret < 0)
return ret;
ctrl->loaded = 1;
return ret;
}
static int __uvc_ctrl_get(struct uvc_video_chain *chain,
struct uvc_control *ctrl,
struct uvc_control_mapping *mapping,
s32 *value)
{
int ret;
if ((ctrl->info.flags & UVC_CTRL_FLAG_GET_CUR) == 0)
return -EACCES;
ret = __uvc_ctrl_load_cur(chain, ctrl);
if (ret < 0)
return ret;
*value = __uvc_ctrl_get_value(mapping,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT));
return 0;
}
static int __uvc_query_v4l2_class(struct uvc_video_chain *chain, u32 req_id,
u32 found_id)
{
bool find_next = req_id & V4L2_CTRL_FLAG_NEXT_CTRL;
unsigned int i;
req_id &= V4L2_CTRL_ID_MASK;
for (i = 0; i < ARRAY_SIZE(uvc_control_classes); i++) {
if (!(chain->ctrl_class_bitmap & BIT(i)))
continue;
if (!find_next) {
if (uvc_control_classes[i] == req_id)
return i;
continue;
}
if (uvc_control_classes[i] > req_id &&
uvc_control_classes[i] < found_id)
return i;
}
return -ENODEV;
}
static int uvc_query_v4l2_class(struct uvc_video_chain *chain, u32 req_id,
u32 found_id, struct v4l2_queryctrl *v4l2_ctrl)
{
int idx;
idx = __uvc_query_v4l2_class(chain, req_id, found_id);
if (idx < 0)
return -ENODEV;
memset(v4l2_ctrl, 0, sizeof(*v4l2_ctrl));
v4l2_ctrl->id = uvc_control_classes[idx];
strscpy(v4l2_ctrl->name, v4l2_ctrl_get_name(v4l2_ctrl->id),
sizeof(v4l2_ctrl->name));
v4l2_ctrl->type = V4L2_CTRL_TYPE_CTRL_CLASS;
v4l2_ctrl->flags = V4L2_CTRL_FLAG_WRITE_ONLY
| V4L2_CTRL_FLAG_READ_ONLY;
return 0;
}
/*
* Check if control @v4l2_id can be accessed by the given control @ioctl
* (VIDIOC_G_EXT_CTRLS, VIDIOC_TRY_EXT_CTRLS or VIDIOC_S_EXT_CTRLS).
*
* For set operations on slave controls, check if the master's value is set to
* manual, either in the others controls set in the same ioctl call, or from
* the master's current value. This catches VIDIOC_S_EXT_CTRLS calls that set
* both the master and slave control, such as for instance setting
* auto_exposure=1, exposure_time_absolute=251.
*/
int uvc_ctrl_is_accessible(struct uvc_video_chain *chain, u32 v4l2_id,
const struct v4l2_ext_controls *ctrls,
unsigned long ioctl)
{
struct uvc_control_mapping *master_map = NULL;
struct uvc_control *master_ctrl = NULL;
struct uvc_control_mapping *mapping;
struct uvc_control *ctrl;
bool read = ioctl == VIDIOC_G_EXT_CTRLS;
s32 val;
int ret;
int i;
if (__uvc_query_v4l2_class(chain, v4l2_id, 0) >= 0)
return -EACCES;
ctrl = uvc_find_control(chain, v4l2_id, &mapping);
if (!ctrl)
return -EINVAL;
if (!(ctrl->info.flags & UVC_CTRL_FLAG_GET_CUR) && read)
return -EACCES;
if (!(ctrl->info.flags & UVC_CTRL_FLAG_SET_CUR) && !read)
return -EACCES;
if (ioctl != VIDIOC_S_EXT_CTRLS || !mapping->master_id)
return 0;
/*
* Iterate backwards in cases where the master control is accessed
* multiple times in the same ioctl. We want the last value.
*/
for (i = ctrls->count - 1; i >= 0; i--) {
if (ctrls->controls[i].id == mapping->master_id)
return ctrls->controls[i].value ==
mapping->master_manual ? 0 : -EACCES;
}
__uvc_find_control(ctrl->entity, mapping->master_id, &master_map,
&master_ctrl, 0);
if (!master_ctrl || !(master_ctrl->info.flags & UVC_CTRL_FLAG_GET_CUR))
return 0;
ret = __uvc_ctrl_get(chain, master_ctrl, master_map, &val);
if (ret >= 0 && val != mapping->master_manual)
return -EACCES;
return 0;
}
static const char *uvc_map_get_name(const struct uvc_control_mapping *map)
{
const char *name;
if (map->name)
return map->name;
name = v4l2_ctrl_get_name(map->id);
if (name)
return name;
return "Unknown Control";
}
static u32 uvc_get_ctrl_bitmap(struct uvc_control *ctrl,
struct uvc_control_mapping *mapping)
{
/*
* Some controls, like CT_AE_MODE_CONTROL, use GET_RES to represent
* the number of bits supported. Those controls do not list GET_MAX
* as supported.
*/
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_RES)
return mapping->get(mapping, UVC_GET_RES,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES));
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_MAX)
return mapping->get(mapping, UVC_GET_MAX,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MAX));
return ~0;
}
static int __uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
struct uvc_control *ctrl,
struct uvc_control_mapping *mapping,
struct v4l2_queryctrl *v4l2_ctrl)
{
struct uvc_control_mapping *master_map = NULL;
struct uvc_control *master_ctrl = NULL;
unsigned int i;
memset(v4l2_ctrl, 0, sizeof(*v4l2_ctrl));
v4l2_ctrl->id = mapping->id;
v4l2_ctrl->type = mapping->v4l2_type;
strscpy(v4l2_ctrl->name, uvc_map_get_name(mapping),
sizeof(v4l2_ctrl->name));
v4l2_ctrl->flags = 0;
if (!(ctrl->info.flags & UVC_CTRL_FLAG_GET_CUR))
v4l2_ctrl->flags |= V4L2_CTRL_FLAG_WRITE_ONLY;
if (!(ctrl->info.flags & UVC_CTRL_FLAG_SET_CUR))
v4l2_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
if (mapping->master_id)
__uvc_find_control(ctrl->entity, mapping->master_id,
&master_map, &master_ctrl, 0);
if (master_ctrl && (master_ctrl->info.flags & UVC_CTRL_FLAG_GET_CUR)) {
s32 val;
int ret = __uvc_ctrl_get(chain, master_ctrl, master_map, &val);
if (ret < 0)
return ret;
if (val != mapping->master_manual)
v4l2_ctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
}
if (!ctrl->cached) {
int ret = uvc_ctrl_populate_cache(chain, ctrl);
if (ret < 0)
return ret;
}
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_DEF) {
v4l2_ctrl->default_value = mapping->get(mapping, UVC_GET_DEF,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_DEF));
}
switch (mapping->v4l2_type) {
case V4L2_CTRL_TYPE_MENU:
v4l2_ctrl->minimum = ffs(mapping->menu_mask) - 1;
v4l2_ctrl->maximum = fls(mapping->menu_mask) - 1;
v4l2_ctrl->step = 1;
for (i = 0; BIT(i) <= mapping->menu_mask; ++i) {
u32 menu_value;
if (!test_bit(i, &mapping->menu_mask))
continue;
menu_value = uvc_mapping_get_menu_value(mapping, i);
if (menu_value == v4l2_ctrl->default_value) {
v4l2_ctrl->default_value = i;
break;
}
}
return 0;
case V4L2_CTRL_TYPE_BOOLEAN:
v4l2_ctrl->minimum = 0;
v4l2_ctrl->maximum = 1;
v4l2_ctrl->step = 1;
return 0;
case V4L2_CTRL_TYPE_BUTTON:
v4l2_ctrl->minimum = 0;
v4l2_ctrl->maximum = 0;
v4l2_ctrl->step = 0;
return 0;
case V4L2_CTRL_TYPE_BITMASK:
v4l2_ctrl->minimum = 0;
v4l2_ctrl->maximum = uvc_get_ctrl_bitmap(ctrl, mapping);
v4l2_ctrl->step = 0;
return 0;
default:
break;
}
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_MIN)
v4l2_ctrl->minimum = mapping->get(mapping, UVC_GET_MIN,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MIN));
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_MAX)
v4l2_ctrl->maximum = mapping->get(mapping, UVC_GET_MAX,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MAX));
if (ctrl->info.flags & UVC_CTRL_FLAG_GET_RES)
v4l2_ctrl->step = mapping->get(mapping, UVC_GET_RES,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES));
return 0;
}
int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
struct v4l2_queryctrl *v4l2_ctrl)
{
struct uvc_control *ctrl;
struct uvc_control_mapping *mapping;
int ret;
ret = mutex_lock_interruptible(&chain->ctrl_mutex);
if (ret < 0)
return -ERESTARTSYS;
/* Check if the ctrl is a know class */
if (!(v4l2_ctrl->id & V4L2_CTRL_FLAG_NEXT_CTRL)) {
ret = uvc_query_v4l2_class(chain, v4l2_ctrl->id, 0, v4l2_ctrl);
if (!ret)
goto done;
}
ctrl = uvc_find_control(chain, v4l2_ctrl->id, &mapping);
if (ctrl == NULL) {
ret = -EINVAL;
goto done;
}
/*
* If we're enumerating control with V4L2_CTRL_FLAG_NEXT_CTRL, check if
* a class should be inserted between the previous control and the one
* we have just found.
*/
if (v4l2_ctrl->id & V4L2_CTRL_FLAG_NEXT_CTRL) {
ret = uvc_query_v4l2_class(chain, v4l2_ctrl->id, mapping->id,
v4l2_ctrl);
if (!ret)
goto done;
}
ret = __uvc_query_v4l2_ctrl(chain, ctrl, mapping, v4l2_ctrl);
done:
mutex_unlock(&chain->ctrl_mutex);
return ret;
}
/*
* Mapping V4L2 controls to UVC controls can be straightforward if done well.
* Most of the UVC controls exist in V4L2, and can be mapped directly. Some
* must be grouped (for instance the Red Balance, Blue Balance and Do White
* Balance V4L2 controls use the White Balance Component UVC control) or
* otherwise translated. The approach we take here is to use a translation
* table for the controls that can be mapped directly, and handle the others
* manually.
*/
int uvc_query_v4l2_menu(struct uvc_video_chain *chain,
struct v4l2_querymenu *query_menu)
{
struct uvc_control_mapping *mapping;
struct uvc_control *ctrl;
u32 index = query_menu->index;
u32 id = query_menu->id;
const char *name;
int ret;
memset(query_menu, 0, sizeof(*query_menu));
query_menu->id = id;
query_menu->index = index;
if (index >= BITS_PER_TYPE(mapping->menu_mask))
return -EINVAL;
ret = mutex_lock_interruptible(&chain->ctrl_mutex);
if (ret < 0)
return -ERESTARTSYS;
ctrl = uvc_find_control(chain, query_menu->id, &mapping);
if (ctrl == NULL || mapping->v4l2_type != V4L2_CTRL_TYPE_MENU) {
ret = -EINVAL;
goto done;
}
if (!test_bit(query_menu->index, &mapping->menu_mask)) {
ret = -EINVAL;
goto done;
}
if (mapping->data_type == UVC_CTRL_DATA_TYPE_BITMASK) {
int mask;
if (!ctrl->cached) {
ret = uvc_ctrl_populate_cache(chain, ctrl);
if (ret < 0)
goto done;
}
mask = uvc_mapping_get_menu_value(mapping, query_menu->index);
if (mask < 0) {
ret = mask;
goto done;
}
if (!(uvc_get_ctrl_bitmap(ctrl, mapping) & mask)) {
ret = -EINVAL;
goto done;
}
}
name = uvc_mapping_get_menu_name(mapping, query_menu->index);
if (!name) {
ret = -EINVAL;
goto done;
}
strscpy(query_menu->name, name, sizeof(query_menu->name));
done:
mutex_unlock(&chain->ctrl_mutex);
return ret;
}
/* --------------------------------------------------------------------------
* Ctrl event handling
*/
static void uvc_ctrl_fill_event(struct uvc_video_chain *chain,
struct v4l2_event *ev,
struct uvc_control *ctrl,
struct uvc_control_mapping *mapping,
s32 value, u32 changes)
{
struct v4l2_queryctrl v4l2_ctrl;
__uvc_query_v4l2_ctrl(chain, ctrl, mapping, &v4l2_ctrl);
memset(ev, 0, sizeof(*ev));
ev->type = V4L2_EVENT_CTRL;
ev->id = v4l2_ctrl.id;
ev->u.ctrl.value = value;
ev->u.ctrl.changes = changes;
ev->u.ctrl.type = v4l2_ctrl.type;
ev->u.ctrl.flags = v4l2_ctrl.flags;
ev->u.ctrl.minimum = v4l2_ctrl.minimum;
ev->u.ctrl.maximum = v4l2_ctrl.maximum;
ev->u.ctrl.step = v4l2_ctrl.step;
ev->u.ctrl.default_value = v4l2_ctrl.default_value;
}
/*
* Send control change events to all subscribers for the @ctrl control. By
* default the subscriber that generated the event, as identified by @handle,
* is not notified unless it has set the V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK flag.
* @handle can be NULL for asynchronous events related to auto-update controls,
* in which case all subscribers are notified.
*/
static void uvc_ctrl_send_event(struct uvc_video_chain *chain,
struct uvc_fh *handle, struct uvc_control *ctrl,
struct uvc_control_mapping *mapping, s32 value, u32 changes)
{
struct v4l2_fh *originator = handle ? &handle->vfh : NULL;
struct v4l2_subscribed_event *sev;
struct v4l2_event ev;
if (list_empty(&mapping->ev_subs))
return;
uvc_ctrl_fill_event(chain, &ev, ctrl, mapping, value, changes);
list_for_each_entry(sev, &mapping->ev_subs, node) {
if (sev->fh != originator ||
(sev->flags & V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK) ||
(changes & V4L2_EVENT_CTRL_CH_FLAGS))
v4l2_event_queue_fh(sev->fh, &ev);
}
}
/*
* Send control change events for the slave of the @master control identified
* by the V4L2 ID @slave_id. The @handle identifies the event subscriber that
* generated the event and may be NULL for auto-update events.
*/
static void uvc_ctrl_send_slave_event(struct uvc_video_chain *chain,
struct uvc_fh *handle, struct uvc_control *master, u32 slave_id)
{
struct uvc_control_mapping *mapping = NULL;
struct uvc_control *ctrl = NULL;
u32 changes = V4L2_EVENT_CTRL_CH_FLAGS;
s32 val = 0;
__uvc_find_control(master->entity, slave_id, &mapping, &ctrl, 0);
if (ctrl == NULL)
return;
if (__uvc_ctrl_get(chain, ctrl, mapping, &val) == 0)
changes |= V4L2_EVENT_CTRL_CH_VALUE;
uvc_ctrl_send_event(chain, handle, ctrl, mapping, val, changes);
}
void uvc_ctrl_status_event(struct uvc_video_chain *chain,
struct uvc_control *ctrl, const u8 *data)
{
struct uvc_control_mapping *mapping;
struct uvc_fh *handle;
unsigned int i;
mutex_lock(&chain->ctrl_mutex);
handle = ctrl->handle;
ctrl->handle = NULL;
list_for_each_entry(mapping, &ctrl->info.mappings, list) {
s32 value = __uvc_ctrl_get_value(mapping, data);
/*
* handle may be NULL here if the device sends auto-update
* events without a prior related control set from userspace.
*/
for (i = 0; i < ARRAY_SIZE(mapping->slave_ids); ++i) {
if (!mapping->slave_ids[i])
break;
uvc_ctrl_send_slave_event(chain, handle, ctrl,
mapping->slave_ids[i]);
}
uvc_ctrl_send_event(chain, handle, ctrl, mapping, value,
V4L2_EVENT_CTRL_CH_VALUE);
}
mutex_unlock(&chain->ctrl_mutex);
}
static void uvc_ctrl_status_event_work(struct work_struct *work)
{
struct uvc_device *dev = container_of(work, struct uvc_device,
async_ctrl.work);
struct uvc_ctrl_work *w = &dev->async_ctrl;
int ret;
uvc_ctrl_status_event(w->chain, w->ctrl, w->data);
/* The barrier is needed to synchronize with uvc_status_stop(). */
if (smp_load_acquire(&dev->flush_status))
return;
/* Resubmit the URB. */
w->urb->interval = dev->int_ep->desc.bInterval;
ret = usb_submit_urb(w->urb, GFP_KERNEL);
if (ret < 0)
dev_err(&dev->udev->dev,
"Failed to resubmit status URB (%d).\n", ret);
}
bool uvc_ctrl_status_event_async(struct urb *urb, struct uvc_video_chain *chain,
struct uvc_control *ctrl, const u8 *data)
{
struct uvc_device *dev = chain->dev;
struct uvc_ctrl_work *w = &dev->async_ctrl;
if (list_empty(&ctrl->info.mappings)) {
ctrl->handle = NULL;
return false;
}
w->data = data;
w->urb = urb;
w->chain = chain;
w->ctrl = ctrl;
schedule_work(&w->work);
return true;
}
static bool uvc_ctrl_xctrls_has_control(const struct v4l2_ext_control *xctrls,
unsigned int xctrls_count, u32 id)
{
unsigned int i;
for (i = 0; i < xctrls_count; ++i) {
if (xctrls[i].id == id)
return true;
}
return false;
}
static void uvc_ctrl_send_events(struct uvc_fh *handle,
const struct v4l2_ext_control *xctrls, unsigned int xctrls_count)
{
struct uvc_control_mapping *mapping;
struct uvc_control *ctrl;
u32 changes = V4L2_EVENT_CTRL_CH_VALUE;
unsigned int i;
unsigned int j;
for (i = 0; i < xctrls_count; ++i) {
ctrl = uvc_find_control(handle->chain, xctrls[i].id, &mapping);
if (ctrl->info.flags & UVC_CTRL_FLAG_ASYNCHRONOUS)
/* Notification will be sent from an Interrupt event. */
continue;
for (j = 0; j < ARRAY_SIZE(mapping->slave_ids); ++j) {
u32 slave_id = mapping->slave_ids[j];
if (!slave_id)
break;
/*
* We can skip sending an event for the slave if the
* slave is being modified in the same transaction.
*/
if (uvc_ctrl_xctrls_has_control(xctrls, xctrls_count,
slave_id))
continue;
uvc_ctrl_send_slave_event(handle->chain, handle, ctrl,
slave_id);
}
/*
* If the master is being modified in the same transaction
* flags may change too.
*/
if (mapping->master_id &&
uvc_ctrl_xctrls_has_control(xctrls, xctrls_count,
mapping->master_id))
changes |= V4L2_EVENT_CTRL_CH_FLAGS;
uvc_ctrl_send_event(handle->chain, handle, ctrl, mapping,
xctrls[i].value, changes);
}
}
static int uvc_ctrl_add_event(struct v4l2_subscribed_event *sev, unsigned elems)
{
struct uvc_fh *handle = container_of(sev->fh, struct uvc_fh, vfh);
struct uvc_control_mapping *mapping;
struct uvc_control *ctrl;
int ret;
ret = mutex_lock_interruptible(&handle->chain->ctrl_mutex);
if (ret < 0)
return -ERESTARTSYS;
if (__uvc_query_v4l2_class(handle->chain, sev->id, 0) >= 0) {
ret = 0;
goto done;
}
ctrl = uvc_find_control(handle->chain, sev->id, &mapping);
if (ctrl == NULL) {
ret = -EINVAL;
goto done;
}
list_add_tail(&sev->node, &mapping->ev_subs);
if (sev->flags & V4L2_EVENT_SUB_FL_SEND_INITIAL) {
struct v4l2_event ev;
u32 changes = V4L2_EVENT_CTRL_CH_FLAGS;
s32 val = 0;
if (__uvc_ctrl_get(handle->chain, ctrl, mapping, &val) == 0)
changes |= V4L2_EVENT_CTRL_CH_VALUE;
uvc_ctrl_fill_event(handle->chain, &ev, ctrl, mapping, val,
changes);
/*
* Mark the queue as active, allowing this initial event to be
* accepted.
*/
sev->elems = elems;
v4l2_event_queue_fh(sev->fh, &ev);
}
done:
mutex_unlock(&handle->chain->ctrl_mutex);
return ret;
}
static void uvc_ctrl_del_event(struct v4l2_subscribed_event *sev)
{
struct uvc_fh *handle = container_of(sev->fh, struct uvc_fh, vfh);
mutex_lock(&handle->chain->ctrl_mutex);
if (__uvc_query_v4l2_class(handle->chain, sev->id, 0) >= 0)
goto done;
list_del(&sev->node);
done:
mutex_unlock(&handle->chain->ctrl_mutex);
}
const struct v4l2_subscribed_event_ops uvc_ctrl_sub_ev_ops = {
.add = uvc_ctrl_add_event,
.del = uvc_ctrl_del_event,
.replace = v4l2_ctrl_replace,
.merge = v4l2_ctrl_merge,
};
/* --------------------------------------------------------------------------
* Control transactions
*
* To make extended set operations as atomic as the hardware allows, controls
* are handled using begin/commit/rollback operations.
*
* At the beginning of a set request, uvc_ctrl_begin should be called to
* initialize the request. This function acquires the control lock.
*
* When setting a control, the new value is stored in the control data field
* at position UVC_CTRL_DATA_CURRENT. The control is then marked as dirty for
* later processing. If the UVC and V4L2 control sizes differ, the current
* value is loaded from the hardware before storing the new value in the data
* field.
*
* After processing all controls in the transaction, uvc_ctrl_commit or
* uvc_ctrl_rollback must be called to apply the pending changes to the
* hardware or revert them. When applying changes, all controls marked as
* dirty will be modified in the UVC device, and the dirty flag will be
* cleared. When reverting controls, the control data field
* UVC_CTRL_DATA_CURRENT is reverted to its previous value
* (UVC_CTRL_DATA_BACKUP) for all dirty controls. Both functions release the
* control lock.
*/
int uvc_ctrl_begin(struct uvc_video_chain *chain)
{
return mutex_lock_interruptible(&chain->ctrl_mutex) ? -ERESTARTSYS : 0;
}
static int uvc_ctrl_commit_entity(struct uvc_device *dev,
struct uvc_entity *entity, int rollback, struct uvc_control **err_ctrl)
{
struct uvc_control *ctrl;
unsigned int i;
int ret;
if (entity == NULL)
return 0;
for (i = 0; i < entity->ncontrols; ++i) {
ctrl = &entity->controls[i];
if (!ctrl->initialized)
continue;
/*
* Reset the loaded flag for auto-update controls that were
* marked as loaded in uvc_ctrl_get/uvc_ctrl_set to prevent
* uvc_ctrl_get from using the cached value, and for write-only
* controls to prevent uvc_ctrl_set from setting bits not
* explicitly set by the user.
*/
if (ctrl->info.flags & UVC_CTRL_FLAG_AUTO_UPDATE ||
!(ctrl->info.flags & UVC_CTRL_FLAG_GET_CUR))
ctrl->loaded = 0;
if (!ctrl->dirty)
continue;
if (!rollback)
ret = uvc_query_ctrl(dev, UVC_SET_CUR, ctrl->entity->id,
dev->intfnum, ctrl->info.selector,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT),
ctrl->info.size);
else
ret = 0;
if (rollback || ret < 0)
memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT),
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP),
ctrl->info.size);
ctrl->dirty = 0;
if (ret < 0) {
if (err_ctrl)
*err_ctrl = ctrl;
return ret;
}
}
return 0;
}
static int uvc_ctrl_find_ctrl_idx(struct uvc_entity *entity,
struct v4l2_ext_controls *ctrls,
struct uvc_control *uvc_control)
{
struct uvc_control_mapping *mapping = NULL;
struct uvc_control *ctrl_found = NULL;
unsigned int i;
if (!entity)
return ctrls->count;
for (i = 0; i < ctrls->count; i++) {
__uvc_find_control(entity, ctrls->controls[i].id, &mapping,
&ctrl_found, 0);
if (uvc_control == ctrl_found)
return i;
}
return ctrls->count;
}
int __uvc_ctrl_commit(struct uvc_fh *handle, int rollback,
struct v4l2_ext_controls *ctrls)
{
struct uvc_video_chain *chain = handle->chain;
struct uvc_control *err_ctrl;
struct uvc_entity *entity;
int ret = 0;
/* Find the control. */
list_for_each_entry(entity, &chain->entities, chain) {
ret = uvc_ctrl_commit_entity(chain->dev, entity, rollback,
&err_ctrl);
if (ret < 0)
goto done;
}
if (!rollback)
uvc_ctrl_send_events(handle, ctrls->controls, ctrls->count);
done:
if (ret < 0 && ctrls)
ctrls->error_idx = uvc_ctrl_find_ctrl_idx(entity, ctrls,
err_ctrl);
mutex_unlock(&chain->ctrl_mutex);
return ret;
}
int uvc_ctrl_get(struct uvc_video_chain *chain,
struct v4l2_ext_control *xctrl)
{
struct uvc_control *ctrl;
struct uvc_control_mapping *mapping;
if (__uvc_query_v4l2_class(chain, xctrl->id, 0) >= 0)
return -EACCES;
ctrl = uvc_find_control(chain, xctrl->id, &mapping);
if (ctrl == NULL)
return -EINVAL;
return __uvc_ctrl_get(chain, ctrl, mapping, &xctrl->value);
}
int uvc_ctrl_set(struct uvc_fh *handle,
struct v4l2_ext_control *xctrl)
{
struct uvc_video_chain *chain = handle->chain;
struct uvc_control *ctrl;
struct uvc_control_mapping *mapping;
s32 value;
u32 step;
s32 min;
s32 max;
int ret;
if (__uvc_query_v4l2_class(chain, xctrl->id, 0) >= 0)
return -EACCES;
ctrl = uvc_find_control(chain, xctrl->id, &mapping);
if (ctrl == NULL)
return -EINVAL;
if (!(ctrl->info.flags & UVC_CTRL_FLAG_SET_CUR))
return -EACCES;
/* Clamp out of range values. */
switch (mapping->v4l2_type) {
case V4L2_CTRL_TYPE_INTEGER:
if (!ctrl->cached) {
ret = uvc_ctrl_populate_cache(chain, ctrl);
if (ret < 0)
return ret;
}
min = mapping->get(mapping, UVC_GET_MIN,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MIN));
max = mapping->get(mapping, UVC_GET_MAX,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_MAX));
step = mapping->get(mapping, UVC_GET_RES,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES));
if (step == 0)
step = 1;
xctrl->value = min + DIV_ROUND_CLOSEST((u32)(xctrl->value - min),
step) * step;
if (mapping->data_type == UVC_CTRL_DATA_TYPE_SIGNED)
xctrl->value = clamp(xctrl->value, min, max);
else
xctrl->value = clamp_t(u32, xctrl->value, min, max);
value = xctrl->value;
break;
case V4L2_CTRL_TYPE_BITMASK:
if (!ctrl->cached) {
ret = uvc_ctrl_populate_cache(chain, ctrl);
if (ret < 0)
return ret;
}
xctrl->value &= uvc_get_ctrl_bitmap(ctrl, mapping);
value = xctrl->value;
break;
case V4L2_CTRL_TYPE_BOOLEAN:
xctrl->value = clamp(xctrl->value, 0, 1);
value = xctrl->value;
break;
case V4L2_CTRL_TYPE_MENU:
if (xctrl->value < (ffs(mapping->menu_mask) - 1) ||
xctrl->value > (fls(mapping->menu_mask) - 1))
return -ERANGE;
if (!test_bit(xctrl->value, &mapping->menu_mask))
return -EINVAL;
value = uvc_mapping_get_menu_value(mapping, xctrl->value);
/*
* Valid menu indices are reported by the GET_RES request for
* UVC controls that support it.
*/
if (mapping->data_type == UVC_CTRL_DATA_TYPE_BITMASK) {
if (!ctrl->cached) {
ret = uvc_ctrl_populate_cache(chain, ctrl);
if (ret < 0)
return ret;
}
if (!(uvc_get_ctrl_bitmap(ctrl, mapping) & value))
return -EINVAL;
}
break;
default:
value = xctrl->value;
break;
}
/*
* If the mapping doesn't span the whole UVC control, the current value
* needs to be loaded from the device to perform the read-modify-write
* operation.
*/
if ((ctrl->info.size * 8) != mapping->size) {
ret = __uvc_ctrl_load_cur(chain, ctrl);
if (ret < 0)
return ret;
}
/* Backup the current value in case we need to rollback later. */
if (!ctrl->dirty) {
memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP),
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT),
ctrl->info.size);
}
mapping->set(mapping, value,
uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT));
if (ctrl->info.flags & UVC_CTRL_FLAG_ASYNCHRONOUS)
ctrl->handle = handle;
ctrl->dirty = 1;
ctrl->modified = 1;
return 0;
}
/* --------------------------------------------------------------------------
* Dynamic controls
*/
/*
* Retrieve flags for a given control
*/
static int uvc_ctrl_get_flags(struct uvc_device *dev,
const struct uvc_control *ctrl,
struct uvc_control_info *info)
{
u8 *data;
int ret;
data = kmalloc(1, GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
if (ctrl->entity->get_info)
ret = ctrl->entity->get_info(dev, ctrl->entity,
ctrl->info.selector, data);
else
ret = uvc_query_ctrl(dev, UVC_GET_INFO, ctrl->entity->id,
dev->intfnum, info->selector, data, 1);
if (!ret)
info->flags |= (data[0] & UVC_CONTROL_CAP_GET ?
UVC_CTRL_FLAG_GET_CUR : 0)
| (data[0] & UVC_CONTROL_CAP_SET ?
UVC_CTRL_FLAG_SET_CUR : 0)
| (data[0] & UVC_CONTROL_CAP_AUTOUPDATE ?
UVC_CTRL_FLAG_AUTO_UPDATE : 0)
| (data[0] & UVC_CONTROL_CAP_ASYNCHRONOUS ?
UVC_CTRL_FLAG_ASYNCHRONOUS : 0);
kfree(data);
return ret;
}
static void uvc_ctrl_fixup_xu_info(struct uvc_device *dev,
const struct uvc_control *ctrl, struct uvc_control_info *info)
{
struct uvc_ctrl_fixup {
struct usb_device_id id;
u8 entity;
u8 selector;
u8 flags;
};
static const struct uvc_ctrl_fixup fixups[] = {
{ { USB_DEVICE(0x046d, 0x08c2) }, 9, 1,
UVC_CTRL_FLAG_GET_MIN | UVC_CTRL_FLAG_GET_MAX |
UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_SET_CUR |
UVC_CTRL_FLAG_AUTO_UPDATE },
{ { USB_DEVICE(0x046d, 0x08cc) }, 9, 1,
UVC_CTRL_FLAG_GET_MIN | UVC_CTRL_FLAG_GET_MAX |
UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_SET_CUR |
UVC_CTRL_FLAG_AUTO_UPDATE },
{ { USB_DEVICE(0x046d, 0x0994) }, 9, 1,
UVC_CTRL_FLAG_GET_MIN | UVC_CTRL_FLAG_GET_MAX |
UVC_CTRL_FLAG_GET_DEF | UVC_CTRL_FLAG_SET_CUR |
UVC_CTRL_FLAG_AUTO_UPDATE },
};
unsigned int i;
for (i = 0; i < ARRAY_SIZE(fixups); ++i) {
if (!usb_match_one_id(dev->intf, &fixups[i].id))
continue;
if (fixups[i].entity == ctrl->entity->id &&
fixups[i].selector == info->selector) {
info->flags = fixups[i].flags;
return;
}
}
}
/*
* Query control information (size and flags) for XU controls.
*/
static int uvc_ctrl_fill_xu_info(struct uvc_device *dev,
const struct uvc_control *ctrl, struct uvc_control_info *info)
{
u8 *data;
int ret;
data = kmalloc(2, GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
memcpy(info->entity, ctrl->entity->guid, sizeof(info->entity));
info->index = ctrl->index;
info->selector = ctrl->index + 1;
/* Query and verify the control length (GET_LEN) */
ret = uvc_query_ctrl(dev, UVC_GET_LEN, ctrl->entity->id, dev->intfnum,
info->selector, data, 2);
if (ret < 0) {
uvc_dbg(dev, CONTROL,
"GET_LEN failed on control %pUl/%u (%d)\n",
info->entity, info->selector, ret);
goto done;
}
info->size = le16_to_cpup((__le16 *)data);
info->flags = UVC_CTRL_FLAG_GET_MIN | UVC_CTRL_FLAG_GET_MAX
| UVC_CTRL_FLAG_GET_RES | UVC_CTRL_FLAG_GET_DEF;
ret = uvc_ctrl_get_flags(dev, ctrl, info);
if (ret < 0) {
uvc_dbg(dev, CONTROL,
"Failed to get flags for control %pUl/%u (%d)\n",
info->entity, info->selector, ret);
goto done;
}
uvc_ctrl_fixup_xu_info(dev, ctrl, info);
uvc_dbg(dev, CONTROL,
"XU control %pUl/%u queried: len %u, flags { get %u set %u auto %u }\n",
info->entity, info->selector, info->size,
(info->flags & UVC_CTRL_FLAG_GET_CUR) ? 1 : 0,
(info->flags & UVC_CTRL_FLAG_SET_CUR) ? 1 : 0,
(info->flags & UVC_CTRL_FLAG_AUTO_UPDATE) ? 1 : 0);
done:
kfree(data);
return ret;
}
static int uvc_ctrl_add_info(struct uvc_device *dev, struct uvc_control *ctrl,
const struct uvc_control_info *info);
static int uvc_ctrl_init_xu_ctrl(struct uvc_device *dev,
struct uvc_control *ctrl)
{
struct uvc_control_info info;
int ret;
if (ctrl->initialized)
return 0;
ret = uvc_ctrl_fill_xu_info(dev, ctrl, &info);
if (ret < 0)
return ret;
ret = uvc_ctrl_add_info(dev, ctrl, &info);
if (ret < 0)
uvc_dbg(dev, CONTROL,
"Failed to initialize control %pUl/%u on device %s entity %u\n",
info.entity, info.selector, dev->udev->devpath,
ctrl->entity->id);
return ret;
}
int uvc_xu_ctrl_query(struct uvc_video_chain *chain,
struct uvc_xu_control_query *xqry)
{
struct uvc_entity *entity;
struct uvc_control *ctrl;
unsigned int i;
bool found;
u32 reqflags;
u16 size;
u8 *data = NULL;
int ret;
/* Find the extension unit. */
found = false;
list_for_each_entry(entity, &chain->entities, chain) {
if (UVC_ENTITY_TYPE(entity) == UVC_VC_EXTENSION_UNIT &&
entity->id == xqry->unit) {
found = true;
break;
}
}
if (!found) {
uvc_dbg(chain->dev, CONTROL, "Extension unit %u not found\n",
xqry->unit);
return -ENOENT;
}
/* Find the control and perform delayed initialization if needed. */
found = false;
for (i = 0; i < entity->ncontrols; ++i) {
ctrl = &entity->controls[i];
if (ctrl->index == xqry->selector - 1) {
found = true;
break;
}
}
if (!found) {
uvc_dbg(chain->dev, CONTROL, "Control %pUl/%u not found\n",
entity->guid, xqry->selector);
return -ENOENT;
}
if (mutex_lock_interruptible(&chain->ctrl_mutex))
return -ERESTARTSYS;
ret = uvc_ctrl_init_xu_ctrl(chain->dev, ctrl);
if (ret < 0) {
ret = -ENOENT;
goto done;
}
/* Validate the required buffer size and flags for the request */
reqflags = 0;
size = ctrl->info.size;
switch (xqry->query) {
case UVC_GET_CUR:
reqflags = UVC_CTRL_FLAG_GET_CUR;
break;
case UVC_GET_MIN:
reqflags = UVC_CTRL_FLAG_GET_MIN;
break;
case UVC_GET_MAX:
reqflags = UVC_CTRL_FLAG_GET_MAX;
break;
case UVC_GET_DEF:
reqflags = UVC_CTRL_FLAG_GET_DEF;
break;
case UVC_GET_RES:
reqflags = UVC_CTRL_FLAG_GET_RES;
break;
case UVC_SET_CUR:
reqflags = UVC_CTRL_FLAG_SET_CUR;
break;
case UVC_GET_LEN:
size = 2;
break;
case UVC_GET_INFO:
size = 1;
break;
default:
ret = -EINVAL;
goto done;
}
if (size != xqry->size) {
ret = -ENOBUFS;
goto done;
}
if (reqflags && !(ctrl->info.flags & reqflags)) {
ret = -EBADRQC;
goto done;
}
data = kmalloc(size, GFP_KERNEL);
if (data == NULL) {
ret = -ENOMEM;
goto done;
}
if (xqry->query == UVC_SET_CUR &&
copy_from_user(data, xqry->data, size)) {
ret = -EFAULT;
goto done;
}
ret = uvc_query_ctrl(chain->dev, xqry->query, xqry->unit,
chain->dev->intfnum, xqry->selector, data, size);
if (ret < 0)
goto done;
if (xqry->query != UVC_SET_CUR &&
copy_to_user(xqry->data, data, size))
ret = -EFAULT;
done:
kfree(data);
mutex_unlock(&chain->ctrl_mutex);
return ret;
}
/* --------------------------------------------------------------------------
* Suspend/resume
*/
/*
* Restore control values after resume, skipping controls that haven't been
* changed.
*
* TODO
* - Don't restore modified controls that are back to their default value.
* - Handle restore order (Auto-Exposure Mode should be restored before
* Exposure Time).
*/
int uvc_ctrl_restore_values(struct uvc_device *dev)
{
struct uvc_control *ctrl;
struct uvc_entity *entity;
unsigned int i;
int ret;
/* Walk the entities list and restore controls when possible. */
list_for_each_entry(entity, &dev->entities, list) {
for (i = 0; i < entity->ncontrols; ++i) {
ctrl = &entity->controls[i];
if (!ctrl->initialized || !ctrl->modified ||
(ctrl->info.flags & UVC_CTRL_FLAG_RESTORE) == 0)
continue;
dev_dbg(&dev->udev->dev,
"restoring control %pUl/%u/%u\n",
ctrl->info.entity, ctrl->info.index,
ctrl->info.selector);
ctrl->dirty = 1;
}
ret = uvc_ctrl_commit_entity(dev, entity, 0, NULL);
if (ret < 0)
return ret;
}
return 0;
}
/* --------------------------------------------------------------------------
* Control and mapping handling
*/
/*
* Add control information to a given control.
*/
static int uvc_ctrl_add_info(struct uvc_device *dev, struct uvc_control *ctrl,
const struct uvc_control_info *info)
{
ctrl->info = *info;
INIT_LIST_HEAD(&ctrl->info.mappings);
/* Allocate an array to save control values (cur, def, max, etc.) */
ctrl->uvc_data = kzalloc(ctrl->info.size * UVC_CTRL_DATA_LAST + 1,
GFP_KERNEL);
if (!ctrl->uvc_data)
return -ENOMEM;
ctrl->initialized = 1;
uvc_dbg(dev, CONTROL, "Added control %pUl/%u to device %s entity %u\n",
ctrl->info.entity, ctrl->info.selector, dev->udev->devpath,
ctrl->entity->id);
return 0;
}
/*
* Add a control mapping to a given control.
*/
static int __uvc_ctrl_add_mapping(struct uvc_video_chain *chain,
struct uvc_control *ctrl, const struct uvc_control_mapping *mapping)
{
struct uvc_control_mapping *map;
unsigned int size;
unsigned int i;
/*
* Most mappings come from static kernel data, and need to be duplicated.
* Mappings that come from userspace will be unnecessarily duplicated,
* this could be optimized.
*/
map = kmemdup(mapping, sizeof(*mapping), GFP_KERNEL);
if (!map)
return -ENOMEM;
map->name = NULL;
map->menu_names = NULL;
map->menu_mapping = NULL;
/* For UVCIOC_CTRL_MAP custom control */
if (mapping->name) {
map->name = kstrdup(mapping->name, GFP_KERNEL);
if (!map->name)
goto err_nomem;
}
INIT_LIST_HEAD(&map->ev_subs);
if (mapping->menu_mapping && mapping->menu_mask) {
size = sizeof(mapping->menu_mapping[0])
* fls(mapping->menu_mask);
map->menu_mapping = kmemdup(mapping->menu_mapping, size,
GFP_KERNEL);
if (!map->menu_mapping)
goto err_nomem;
}
if (mapping->menu_names && mapping->menu_mask) {
size = sizeof(mapping->menu_names[0])
* fls(mapping->menu_mask);
map->menu_names = kmemdup(mapping->menu_names, size,
GFP_KERNEL);
if (!map->menu_names)
goto err_nomem;
}
if (map->get == NULL)
map->get = uvc_get_le_value;
if (map->set == NULL)
map->set = uvc_set_le_value;
for (i = 0; i < ARRAY_SIZE(uvc_control_classes); i++) {
if (V4L2_CTRL_ID2WHICH(uvc_control_classes[i]) ==
V4L2_CTRL_ID2WHICH(map->id)) {
chain->ctrl_class_bitmap |= BIT(i);
break;
}
}
list_add_tail(&map->list, &ctrl->info.mappings);
uvc_dbg(chain->dev, CONTROL, "Adding mapping '%s' to control %pUl/%u\n",
uvc_map_get_name(map), ctrl->info.entity,
ctrl->info.selector);
return 0;
err_nomem:
kfree(map->menu_names);
kfree(map->menu_mapping);
kfree(map->name);
kfree(map);
return -ENOMEM;
}
int uvc_ctrl_add_mapping(struct uvc_video_chain *chain,
const struct uvc_control_mapping *mapping)
{
struct uvc_device *dev = chain->dev;
struct uvc_control_mapping *map;
struct uvc_entity *entity;
struct uvc_control *ctrl;
int found = 0;
int ret;
if (mapping->id & ~V4L2_CTRL_ID_MASK) {
uvc_dbg(dev, CONTROL,
"Can't add mapping '%s', control id 0x%08x is invalid\n",
uvc_map_get_name(mapping), mapping->id);
return -EINVAL;
}
/* Search for the matching (GUID/CS) control on the current chain */
list_for_each_entry(entity, &chain->entities, chain) {
unsigned int i;
if (UVC_ENTITY_TYPE(entity) != UVC_VC_EXTENSION_UNIT ||
!uvc_entity_match_guid(entity, mapping->entity))
continue;
for (i = 0; i < entity->ncontrols; ++i) {
ctrl = &entity->controls[i];
if (ctrl->index == mapping->selector - 1) {
found = 1;
break;
}
}
if (found)
break;
}
if (!found)
return -ENOENT;
if (mutex_lock_interruptible(&chain->ctrl_mutex))
return -ERESTARTSYS;
/* Perform delayed initialization of XU controls */
ret = uvc_ctrl_init_xu_ctrl(dev, ctrl);
if (ret < 0) {
ret = -ENOENT;
goto done;
}
/* Validate the user-provided bit-size and offset */
if (mapping->size > 32 ||
mapping->offset + mapping->size > ctrl->info.size * 8) {
ret = -EINVAL;
goto done;
}
list_for_each_entry(map, &ctrl->info.mappings, list) {
if (mapping->id == map->id) {
uvc_dbg(dev, CONTROL,
"Can't add mapping '%s', control id 0x%08x already exists\n",
uvc_map_get_name(mapping), mapping->id);
ret = -EEXIST;
goto done;
}
}
/* Prevent excess memory consumption */
if (atomic_inc_return(&dev->nmappings) > UVC_MAX_CONTROL_MAPPINGS) {
atomic_dec(&dev->nmappings);
uvc_dbg(dev, CONTROL,
"Can't add mapping '%s', maximum mappings count (%u) exceeded\n",
uvc_map_get_name(mapping), UVC_MAX_CONTROL_MAPPINGS);
ret = -ENOMEM;
goto done;
}
ret = __uvc_ctrl_add_mapping(chain, ctrl, mapping);
if (ret < 0)
atomic_dec(&dev->nmappings);
done:
mutex_unlock(&chain->ctrl_mutex);
return ret;
}
/*
* Prune an entity of its bogus controls using a blacklist. Bogus controls
* are currently the ones that crash the camera or unconditionally return an
* error when queried.
*/
static void uvc_ctrl_prune_entity(struct uvc_device *dev,
struct uvc_entity *entity)
{
struct uvc_ctrl_blacklist {
struct usb_device_id id;
u8 index;
};
static const struct uvc_ctrl_blacklist processing_blacklist[] = {
{ { USB_DEVICE(0x13d3, 0x509b) }, 9 }, /* Gain */
{ { USB_DEVICE(0x1c4f, 0x3000) }, 6 }, /* WB Temperature */
{ { USB_DEVICE(0x5986, 0x0241) }, 2 }, /* Hue */
};
static const struct uvc_ctrl_blacklist camera_blacklist[] = {
{ { USB_DEVICE(0x06f8, 0x3005) }, 9 }, /* Zoom, Absolute */
};
const struct uvc_ctrl_blacklist *blacklist;
unsigned int size;
unsigned int count;
unsigned int i;
u8 *controls;
switch (UVC_ENTITY_TYPE(entity)) {
case UVC_VC_PROCESSING_UNIT:
blacklist = processing_blacklist;
count = ARRAY_SIZE(processing_blacklist);
controls = entity->processing.bmControls;
size = entity->processing.bControlSize;
break;
case UVC_ITT_CAMERA:
blacklist = camera_blacklist;
count = ARRAY_SIZE(camera_blacklist);
controls = entity->camera.bmControls;
size = entity->camera.bControlSize;
break;
default:
return;
}
for (i = 0; i < count; ++i) {
if (!usb_match_one_id(dev->intf, &blacklist[i].id))
continue;
if (blacklist[i].index >= 8 * size ||
!uvc_test_bit(controls, blacklist[i].index))
continue;
uvc_dbg(dev, CONTROL,
"%u/%u control is black listed, removing it\n",
entity->id, blacklist[i].index);
uvc_clear_bit(controls, blacklist[i].index);
}
}
/*
* Add control information and hardcoded stock control mappings to the given
* device.
*/
static void uvc_ctrl_init_ctrl(struct uvc_video_chain *chain,
struct uvc_control *ctrl)
{
const struct uvc_control_mapping **mappings;
unsigned int i;
/*
* XU controls initialization requires querying the device for control
* information. As some buggy UVC devices will crash when queried
* repeatedly in a tight loop, delay XU controls initialization until
* first use.
*/
if (UVC_ENTITY_TYPE(ctrl->entity) == UVC_VC_EXTENSION_UNIT)
return;
for (i = 0; i < ARRAY_SIZE(uvc_ctrls); ++i) {
const struct uvc_control_info *info = &uvc_ctrls[i];
if (uvc_entity_match_guid(ctrl->entity, info->entity) &&
ctrl->index == info->index) {
uvc_ctrl_add_info(chain->dev, ctrl, info);
/*
* Retrieve control flags from the device. Ignore errors
* and work with default flag values from the uvc_ctrl
* array when the device doesn't properly implement
* GET_INFO on standard controls.
*/
uvc_ctrl_get_flags(chain->dev, ctrl, &ctrl->info);
break;
}
}
if (!ctrl->initialized)
return;
/*
* First check if the device provides a custom mapping for this control,
* used to override standard mappings for non-conformant devices. Don't
* process standard mappings if a custom mapping is found. This
* mechanism doesn't support combining standard and custom mappings for
* a single control.
*/
if (chain->dev->info->mappings) {
bool custom = false;
for (i = 0; chain->dev->info->mappings[i]; ++i) {
const struct uvc_control_mapping *mapping =
chain->dev->info->mappings[i];
if (uvc_entity_match_guid(ctrl->entity, mapping->entity) &&
ctrl->info.selector == mapping->selector) {
__uvc_ctrl_add_mapping(chain, ctrl, mapping);
custom = true;
}
}
if (custom)
return;
}
/* Process common mappings next. */
for (i = 0; i < ARRAY_SIZE(uvc_ctrl_mappings); ++i) {
const struct uvc_control_mapping *mapping = &uvc_ctrl_mappings[i];
if (uvc_entity_match_guid(ctrl->entity, mapping->entity) &&
ctrl->info.selector == mapping->selector)
__uvc_ctrl_add_mapping(chain, ctrl, mapping);
}
/* Finally process version-specific mappings. */
mappings = chain->dev->uvc_version < 0x0150
? uvc_ctrl_mappings_uvc11 : uvc_ctrl_mappings_uvc15;
for (i = 0; mappings[i]; ++i) {
const struct uvc_control_mapping *mapping = mappings[i];
if (uvc_entity_match_guid(ctrl->entity, mapping->entity) &&
ctrl->info.selector == mapping->selector)
__uvc_ctrl_add_mapping(chain, ctrl, mapping);
}
}
/*
* Initialize device controls.
*/
static int uvc_ctrl_init_chain(struct uvc_video_chain *chain)
{
struct uvc_entity *entity;
unsigned int i;
/* Walk the entities list and instantiate controls */
list_for_each_entry(entity, &chain->entities, chain) {
struct uvc_control *ctrl;
unsigned int bControlSize = 0, ncontrols;
u8 *bmControls = NULL;
if (UVC_ENTITY_TYPE(entity) == UVC_VC_EXTENSION_UNIT) {
bmControls = entity->extension.bmControls;
bControlSize = entity->extension.bControlSize;
} else if (UVC_ENTITY_TYPE(entity) == UVC_VC_PROCESSING_UNIT) {
bmControls = entity->processing.bmControls;
bControlSize = entity->processing.bControlSize;
} else if (UVC_ENTITY_TYPE(entity) == UVC_ITT_CAMERA) {
bmControls = entity->camera.bmControls;
bControlSize = entity->camera.bControlSize;
} else if (UVC_ENTITY_TYPE(entity) == UVC_EXT_GPIO_UNIT) {
bmControls = entity->gpio.bmControls;
bControlSize = entity->gpio.bControlSize;
}
/* Remove bogus/blacklisted controls */
uvc_ctrl_prune_entity(chain->dev, entity);
/* Count supported controls and allocate the controls array */
ncontrols = memweight(bmControls, bControlSize);
if (ncontrols == 0)
continue;
entity->controls = kcalloc(ncontrols, sizeof(*ctrl),
GFP_KERNEL);
if (entity->controls == NULL)
return -ENOMEM;
entity->ncontrols = ncontrols;
/* Initialize all supported controls */
ctrl = entity->controls;
for (i = 0; i < bControlSize * 8; ++i) {
if (uvc_test_bit(bmControls, i) == 0)
continue;
ctrl->entity = entity;
ctrl->index = i;
uvc_ctrl_init_ctrl(chain, ctrl);
ctrl++;
}
}
return 0;
}
int uvc_ctrl_init_device(struct uvc_device *dev)
{
struct uvc_video_chain *chain;
int ret;
INIT_WORK(&dev->async_ctrl.work, uvc_ctrl_status_event_work);
list_for_each_entry(chain, &dev->chains, list) {
ret = uvc_ctrl_init_chain(chain);
if (ret)
return ret;
}
return 0;
}
/*
* Cleanup device controls.
*/
static void uvc_ctrl_cleanup_mappings(struct uvc_device *dev,
struct uvc_control *ctrl)
{
struct uvc_control_mapping *mapping, *nm;
list_for_each_entry_safe(mapping, nm, &ctrl->info.mappings, list) {
list_del(&mapping->list);
kfree(mapping->menu_names);
kfree(mapping->menu_mapping);
kfree(mapping->name);
kfree(mapping);
}
}
void uvc_ctrl_cleanup_device(struct uvc_device *dev)
{
struct uvc_entity *entity;
unsigned int i;
/* Can be uninitialized if we are aborting on probe error. */
if (dev->async_ctrl.work.func)
cancel_work_sync(&dev->async_ctrl.work);
/* Free controls and control mappings for all entities. */
list_for_each_entry(entity, &dev->entities, list) {
for (i = 0; i < entity->ncontrols; ++i) {
struct uvc_control *ctrl = &entity->controls[i];
if (!ctrl->initialized)
continue;
uvc_ctrl_cleanup_mappings(dev, ctrl);
kfree(ctrl->uvc_data);
}
kfree(entity->controls);
}
}
| linux-master | drivers/media/usb/uvc/uvc_ctrl.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_metadata.c -- USB Video Class driver - Metadata handling
*
* Copyright (C) 2016
* Guennadi Liakhovetski ([email protected])
*/
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/usb.h>
#include <linux/videodev2.h>
#include <media/v4l2-ioctl.h>
#include <media/videobuf2-v4l2.h>
#include <media/videobuf2-vmalloc.h>
#include "uvcvideo.h"
/* -----------------------------------------------------------------------------
* V4L2 ioctls
*/
static int uvc_meta_v4l2_querycap(struct file *file, void *fh,
struct v4l2_capability *cap)
{
struct v4l2_fh *vfh = file->private_data;
struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
struct uvc_video_chain *chain = stream->chain;
strscpy(cap->driver, "uvcvideo", sizeof(cap->driver));
strscpy(cap->card, stream->dev->name, sizeof(cap->card));
usb_make_path(stream->dev->udev, cap->bus_info, sizeof(cap->bus_info));
cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING
| chain->caps;
return 0;
}
static int uvc_meta_v4l2_get_format(struct file *file, void *fh,
struct v4l2_format *format)
{
struct v4l2_fh *vfh = file->private_data;
struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
struct v4l2_meta_format *fmt = &format->fmt.meta;
if (format->type != vfh->vdev->queue->type)
return -EINVAL;
memset(fmt, 0, sizeof(*fmt));
fmt->dataformat = stream->meta.format;
fmt->buffersize = UVC_METADATA_BUF_SIZE;
return 0;
}
static int uvc_meta_v4l2_try_format(struct file *file, void *fh,
struct v4l2_format *format)
{
struct v4l2_fh *vfh = file->private_data;
struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
struct uvc_device *dev = stream->dev;
struct v4l2_meta_format *fmt = &format->fmt.meta;
u32 fmeta = fmt->dataformat;
if (format->type != vfh->vdev->queue->type)
return -EINVAL;
memset(fmt, 0, sizeof(*fmt));
fmt->dataformat = fmeta == dev->info->meta_format
? fmeta : V4L2_META_FMT_UVC;
fmt->buffersize = UVC_METADATA_BUF_SIZE;
return 0;
}
static int uvc_meta_v4l2_set_format(struct file *file, void *fh,
struct v4l2_format *format)
{
struct v4l2_fh *vfh = file->private_data;
struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
struct v4l2_meta_format *fmt = &format->fmt.meta;
int ret;
ret = uvc_meta_v4l2_try_format(file, fh, format);
if (ret < 0)
return ret;
/*
* We could in principle switch at any time, also during streaming.
* Metadata buffers would still be perfectly parseable, but it's more
* consistent and cleaner to disallow that.
*/
mutex_lock(&stream->mutex);
if (uvc_queue_allocated(&stream->queue))
ret = -EBUSY;
else
stream->meta.format = fmt->dataformat;
mutex_unlock(&stream->mutex);
return ret;
}
static int uvc_meta_v4l2_enum_formats(struct file *file, void *fh,
struct v4l2_fmtdesc *fdesc)
{
struct v4l2_fh *vfh = file->private_data;
struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
struct uvc_device *dev = stream->dev;
u32 index = fdesc->index;
if (fdesc->type != vfh->vdev->queue->type ||
index > 1U || (index && !dev->info->meta_format))
return -EINVAL;
memset(fdesc, 0, sizeof(*fdesc));
fdesc->type = vfh->vdev->queue->type;
fdesc->index = index;
fdesc->pixelformat = index ? dev->info->meta_format : V4L2_META_FMT_UVC;
return 0;
}
static const struct v4l2_ioctl_ops uvc_meta_ioctl_ops = {
.vidioc_querycap = uvc_meta_v4l2_querycap,
.vidioc_g_fmt_meta_cap = uvc_meta_v4l2_get_format,
.vidioc_s_fmt_meta_cap = uvc_meta_v4l2_set_format,
.vidioc_try_fmt_meta_cap = uvc_meta_v4l2_try_format,
.vidioc_enum_fmt_meta_cap = uvc_meta_v4l2_enum_formats,
.vidioc_reqbufs = vb2_ioctl_reqbufs,
.vidioc_querybuf = vb2_ioctl_querybuf,
.vidioc_qbuf = vb2_ioctl_qbuf,
.vidioc_dqbuf = vb2_ioctl_dqbuf,
.vidioc_create_bufs = vb2_ioctl_create_bufs,
.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
.vidioc_streamon = vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff,
};
/* -----------------------------------------------------------------------------
* V4L2 File Operations
*/
static const struct v4l2_file_operations uvc_meta_fops = {
.owner = THIS_MODULE,
.unlocked_ioctl = video_ioctl2,
.open = v4l2_fh_open,
.release = vb2_fop_release,
.poll = vb2_fop_poll,
.mmap = vb2_fop_mmap,
};
int uvc_meta_register(struct uvc_streaming *stream)
{
struct uvc_device *dev = stream->dev;
struct video_device *vdev = &stream->meta.vdev;
struct uvc_video_queue *queue = &stream->meta.queue;
stream->meta.format = V4L2_META_FMT_UVC;
/*
* The video interface queue uses manual locking and thus does not set
* the queue pointer. Set it manually here.
*/
vdev->queue = &queue->queue;
return uvc_register_video_device(dev, stream, vdev, queue,
V4L2_BUF_TYPE_META_CAPTURE,
&uvc_meta_fops, &uvc_meta_ioctl_ops);
}
| linux-master | drivers/media/usb/uvc/uvc_metadata.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_status.c -- USB Video Class driver - Status endpoint
*
* Copyright (C) 2005-2009
* Laurent Pinchart ([email protected])
*/
#include <asm/barrier.h>
#include <linux/kernel.h>
#include <linux/input.h>
#include <linux/slab.h>
#include <linux/usb.h>
#include <linux/usb/input.h>
#include "uvcvideo.h"
/* --------------------------------------------------------------------------
* Input device
*/
#ifdef CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV
static bool uvc_input_has_button(struct uvc_device *dev)
{
struct uvc_streaming *stream;
/*
* The device has button events if both bTriggerSupport and
* bTriggerUsage are one. Otherwise the camera button does not
* exist or is handled automatically by the camera without host
* driver or client application intervention.
*/
list_for_each_entry(stream, &dev->streams, list) {
if (stream->header.bTriggerSupport == 1 &&
stream->header.bTriggerUsage == 1)
return true;
}
return false;
}
static int uvc_input_init(struct uvc_device *dev)
{
struct input_dev *input;
int ret;
if (!uvc_input_has_button(dev))
return 0;
input = input_allocate_device();
if (input == NULL)
return -ENOMEM;
usb_make_path(dev->udev, dev->input_phys, sizeof(dev->input_phys));
strlcat(dev->input_phys, "/button", sizeof(dev->input_phys));
input->name = dev->name;
input->phys = dev->input_phys;
usb_to_input_id(dev->udev, &input->id);
input->dev.parent = &dev->intf->dev;
__set_bit(EV_KEY, input->evbit);
__set_bit(KEY_CAMERA, input->keybit);
if ((ret = input_register_device(input)) < 0)
goto error;
dev->input = input;
return 0;
error:
input_free_device(input);
return ret;
}
static void uvc_input_unregister(struct uvc_device *dev)
{
if (dev->input)
input_unregister_device(dev->input);
}
static void uvc_input_report_key(struct uvc_device *dev, unsigned int code,
int value)
{
if (dev->input) {
input_report_key(dev->input, code, value);
input_sync(dev->input);
}
}
#else
#define uvc_input_init(dev)
#define uvc_input_unregister(dev)
#define uvc_input_report_key(dev, code, value)
#endif /* CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV */
/* --------------------------------------------------------------------------
* Status interrupt endpoint
*/
static void uvc_event_streaming(struct uvc_device *dev,
struct uvc_status *status, int len)
{
if (len <= offsetof(struct uvc_status, bEvent)) {
uvc_dbg(dev, STATUS,
"Invalid streaming status event received\n");
return;
}
if (status->bEvent == 0) {
if (len <= offsetof(struct uvc_status, streaming))
return;
uvc_dbg(dev, STATUS, "Button (intf %u) %s len %d\n",
status->bOriginator,
status->streaming.button ? "pressed" : "released", len);
uvc_input_report_key(dev, KEY_CAMERA, status->streaming.button);
} else {
uvc_dbg(dev, STATUS, "Stream %u error event %02x len %d\n",
status->bOriginator, status->bEvent, len);
}
}
#define UVC_CTRL_VALUE_CHANGE 0
#define UVC_CTRL_INFO_CHANGE 1
#define UVC_CTRL_FAILURE_CHANGE 2
#define UVC_CTRL_MIN_CHANGE 3
#define UVC_CTRL_MAX_CHANGE 4
static struct uvc_control *uvc_event_entity_find_ctrl(struct uvc_entity *entity,
u8 selector)
{
struct uvc_control *ctrl;
unsigned int i;
for (i = 0, ctrl = entity->controls; i < entity->ncontrols; i++, ctrl++)
if (ctrl->info.selector == selector)
return ctrl;
return NULL;
}
static struct uvc_control *uvc_event_find_ctrl(struct uvc_device *dev,
const struct uvc_status *status,
struct uvc_video_chain **chain)
{
list_for_each_entry((*chain), &dev->chains, list) {
struct uvc_entity *entity;
struct uvc_control *ctrl;
list_for_each_entry(entity, &(*chain)->entities, chain) {
if (entity->id != status->bOriginator)
continue;
ctrl = uvc_event_entity_find_ctrl(entity,
status->control.bSelector);
if (ctrl)
return ctrl;
}
}
return NULL;
}
static bool uvc_event_control(struct urb *urb,
const struct uvc_status *status, int len)
{
static const char *attrs[] = { "value", "info", "failure", "min", "max" };
struct uvc_device *dev = urb->context;
struct uvc_video_chain *chain;
struct uvc_control *ctrl;
if (len < 6 || status->bEvent != 0 ||
status->control.bAttribute >= ARRAY_SIZE(attrs)) {
uvc_dbg(dev, STATUS, "Invalid control status event received\n");
return false;
}
uvc_dbg(dev, STATUS, "Control %u/%u %s change len %d\n",
status->bOriginator, status->control.bSelector,
attrs[status->control.bAttribute], len);
/* Find the control. */
ctrl = uvc_event_find_ctrl(dev, status, &chain);
if (!ctrl)
return false;
switch (status->control.bAttribute) {
case UVC_CTRL_VALUE_CHANGE:
return uvc_ctrl_status_event_async(urb, chain, ctrl,
status->control.bValue);
case UVC_CTRL_INFO_CHANGE:
case UVC_CTRL_FAILURE_CHANGE:
case UVC_CTRL_MIN_CHANGE:
case UVC_CTRL_MAX_CHANGE:
break;
}
return false;
}
static void uvc_status_complete(struct urb *urb)
{
struct uvc_device *dev = urb->context;
int len, ret;
switch (urb->status) {
case 0:
break;
case -ENOENT: /* usb_kill_urb() called. */
case -ECONNRESET: /* usb_unlink_urb() called. */
case -ESHUTDOWN: /* The endpoint is being disabled. */
case -EPROTO: /* Device is disconnected (reported by some host controllers). */
return;
default:
dev_warn(&dev->udev->dev,
"Non-zero status (%d) in status completion handler.\n",
urb->status);
return;
}
len = urb->actual_length;
if (len > 0) {
switch (dev->status->bStatusType & 0x0f) {
case UVC_STATUS_TYPE_CONTROL: {
if (uvc_event_control(urb, dev->status, len))
/* The URB will be resubmitted in work context. */
return;
break;
}
case UVC_STATUS_TYPE_STREAMING: {
uvc_event_streaming(dev, dev->status, len);
break;
}
default:
uvc_dbg(dev, STATUS, "Unknown status event type %u\n",
dev->status->bStatusType);
break;
}
}
/* Resubmit the URB. */
urb->interval = dev->int_ep->desc.bInterval;
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0)
dev_err(&dev->udev->dev,
"Failed to resubmit status URB (%d).\n", ret);
}
int uvc_status_init(struct uvc_device *dev)
{
struct usb_host_endpoint *ep = dev->int_ep;
unsigned int pipe;
int interval;
if (ep == NULL)
return 0;
uvc_input_init(dev);
dev->status = kzalloc(sizeof(*dev->status), GFP_KERNEL);
if (!dev->status)
return -ENOMEM;
dev->int_urb = usb_alloc_urb(0, GFP_KERNEL);
if (!dev->int_urb) {
kfree(dev->status);
return -ENOMEM;
}
pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress);
/*
* For high-speed interrupt endpoints, the bInterval value is used as
* an exponent of two. Some developers forgot about it.
*/
interval = ep->desc.bInterval;
if (interval > 16 && dev->udev->speed == USB_SPEED_HIGH &&
(dev->quirks & UVC_QUIRK_STATUS_INTERVAL))
interval = fls(interval) - 1;
usb_fill_int_urb(dev->int_urb, dev->udev, pipe,
dev->status, sizeof(*dev->status), uvc_status_complete,
dev, interval);
return 0;
}
void uvc_status_unregister(struct uvc_device *dev)
{
usb_kill_urb(dev->int_urb);
uvc_input_unregister(dev);
}
void uvc_status_cleanup(struct uvc_device *dev)
{
usb_free_urb(dev->int_urb);
kfree(dev->status);
}
int uvc_status_start(struct uvc_device *dev, gfp_t flags)
{
if (dev->int_urb == NULL)
return 0;
return usb_submit_urb(dev->int_urb, flags);
}
void uvc_status_stop(struct uvc_device *dev)
{
struct uvc_ctrl_work *w = &dev->async_ctrl;
/*
* Prevent the asynchronous control handler from requeing the URB. The
* barrier is needed so the flush_status change is visible to other
* CPUs running the asynchronous handler before usb_kill_urb() is
* called below.
*/
smp_store_release(&dev->flush_status, true);
/*
* Cancel any pending asynchronous work. If any status event was queued,
* process it synchronously.
*/
if (cancel_work_sync(&w->work))
uvc_ctrl_status_event(w->chain, w->ctrl, w->data);
/* Kill the urb. */
usb_kill_urb(dev->int_urb);
/*
* The URB completion handler may have queued asynchronous work. This
* won't resubmit the URB as flush_status is set, but it needs to be
* cancelled before returning or it could then race with a future
* uvc_status_start() call.
*/
if (cancel_work_sync(&w->work))
uvc_ctrl_status_event(w->chain, w->ctrl, w->data);
/*
* From this point, there are no events on the queue and the status URB
* is dead. No events will be queued until uvc_status_start() is called.
* The barrier is needed to make sure that flush_status is visible to
* uvc_ctrl_status_event_work() when uvc_status_start() will be called
* again.
*/
smp_store_release(&dev->flush_status, false);
}
| linux-master | drivers/media/usb/uvc/uvc_status.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_queue.c -- USB Video Class driver - Buffers management
*
* Copyright (C) 2005-2010
* Laurent Pinchart ([email protected])
*/
#include <linux/atomic.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/usb.h>
#include <linux/videodev2.h>
#include <linux/vmalloc.h>
#include <linux/wait.h>
#include <media/videobuf2-v4l2.h>
#include <media/videobuf2-vmalloc.h>
#include "uvcvideo.h"
/* ------------------------------------------------------------------------
* Video buffers queue management.
*
* Video queues is initialized by uvc_queue_init(). The function performs
* basic initialization of the uvc_video_queue struct and never fails.
*
* Video buffers are managed by videobuf2. The driver uses a mutex to protect
* the videobuf2 queue operations by serializing calls to videobuf2 and a
* spinlock to protect the IRQ queue that holds the buffers to be processed by
* the driver.
*/
static inline struct uvc_buffer *uvc_vbuf_to_buffer(struct vb2_v4l2_buffer *buf)
{
return container_of(buf, struct uvc_buffer, buf);
}
/*
* Return all queued buffers to videobuf2 in the requested state.
*
* This function must be called with the queue spinlock held.
*/
static void uvc_queue_return_buffers(struct uvc_video_queue *queue,
enum uvc_buffer_state state)
{
enum vb2_buffer_state vb2_state = state == UVC_BUF_STATE_ERROR
? VB2_BUF_STATE_ERROR
: VB2_BUF_STATE_QUEUED;
while (!list_empty(&queue->irqqueue)) {
struct uvc_buffer *buf = list_first_entry(&queue->irqqueue,
struct uvc_buffer,
queue);
list_del(&buf->queue);
buf->state = state;
vb2_buffer_done(&buf->buf.vb2_buf, vb2_state);
}
}
/* -----------------------------------------------------------------------------
* videobuf2 queue operations
*/
static int uvc_queue_setup(struct vb2_queue *vq,
unsigned int *nbuffers, unsigned int *nplanes,
unsigned int sizes[], struct device *alloc_devs[])
{
struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
struct uvc_streaming *stream;
unsigned int size;
switch (vq->type) {
case V4L2_BUF_TYPE_META_CAPTURE:
size = UVC_METADATA_BUF_SIZE;
break;
default:
stream = uvc_queue_to_stream(queue);
size = stream->ctrl.dwMaxVideoFrameSize;
break;
}
/*
* When called with plane sizes, validate them. The driver supports
* single planar formats only, and requires buffers to be large enough
* to store a complete frame.
*/
if (*nplanes)
return *nplanes != 1 || sizes[0] < size ? -EINVAL : 0;
*nplanes = 1;
sizes[0] = size;
return 0;
}
static int uvc_buffer_prepare(struct vb2_buffer *vb)
{
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
struct uvc_buffer *buf = uvc_vbuf_to_buffer(vbuf);
if (vb->type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0)) {
uvc_dbg(uvc_queue_to_stream(queue)->dev, CAPTURE,
"[E] Bytes used out of bounds\n");
return -EINVAL;
}
if (unlikely(queue->flags & UVC_QUEUE_DISCONNECTED))
return -ENODEV;
buf->state = UVC_BUF_STATE_QUEUED;
buf->error = 0;
buf->mem = vb2_plane_vaddr(vb, 0);
buf->length = vb2_plane_size(vb, 0);
if (vb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
buf->bytesused = 0;
else
buf->bytesused = vb2_get_plane_payload(vb, 0);
return 0;
}
static void uvc_buffer_queue(struct vb2_buffer *vb)
{
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
struct uvc_buffer *buf = uvc_vbuf_to_buffer(vbuf);
unsigned long flags;
spin_lock_irqsave(&queue->irqlock, flags);
if (likely(!(queue->flags & UVC_QUEUE_DISCONNECTED))) {
kref_init(&buf->ref);
list_add_tail(&buf->queue, &queue->irqqueue);
} else {
/*
* If the device is disconnected return the buffer to userspace
* directly. The next QBUF call will fail with -ENODEV.
*/
buf->state = UVC_BUF_STATE_ERROR;
vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
}
spin_unlock_irqrestore(&queue->irqlock, flags);
}
static void uvc_buffer_finish(struct vb2_buffer *vb)
{
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
struct uvc_streaming *stream = uvc_queue_to_stream(queue);
struct uvc_buffer *buf = uvc_vbuf_to_buffer(vbuf);
if (vb->state == VB2_BUF_STATE_DONE)
uvc_video_clock_update(stream, vbuf, buf);
}
static int uvc_start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
struct uvc_streaming *stream = uvc_queue_to_stream(queue);
int ret;
lockdep_assert_irqs_enabled();
queue->buf_used = 0;
ret = uvc_video_start_streaming(stream);
if (ret == 0)
return 0;
spin_lock_irq(&queue->irqlock);
uvc_queue_return_buffers(queue, UVC_BUF_STATE_QUEUED);
spin_unlock_irq(&queue->irqlock);
return ret;
}
static void uvc_stop_streaming(struct vb2_queue *vq)
{
struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
lockdep_assert_irqs_enabled();
if (vq->type != V4L2_BUF_TYPE_META_CAPTURE)
uvc_video_stop_streaming(uvc_queue_to_stream(queue));
spin_lock_irq(&queue->irqlock);
uvc_queue_return_buffers(queue, UVC_BUF_STATE_ERROR);
spin_unlock_irq(&queue->irqlock);
}
static const struct vb2_ops uvc_queue_qops = {
.queue_setup = uvc_queue_setup,
.buf_prepare = uvc_buffer_prepare,
.buf_queue = uvc_buffer_queue,
.buf_finish = uvc_buffer_finish,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
.start_streaming = uvc_start_streaming,
.stop_streaming = uvc_stop_streaming,
};
static const struct vb2_ops uvc_meta_queue_qops = {
.queue_setup = uvc_queue_setup,
.buf_prepare = uvc_buffer_prepare,
.buf_queue = uvc_buffer_queue,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
.stop_streaming = uvc_stop_streaming,
};
int uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type,
int drop_corrupted)
{
int ret;
queue->queue.type = type;
queue->queue.io_modes = VB2_MMAP | VB2_USERPTR;
queue->queue.drv_priv = queue;
queue->queue.buf_struct_size = sizeof(struct uvc_buffer);
queue->queue.mem_ops = &vb2_vmalloc_memops;
queue->queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC
| V4L2_BUF_FLAG_TSTAMP_SRC_SOE;
queue->queue.lock = &queue->mutex;
switch (type) {
case V4L2_BUF_TYPE_META_CAPTURE:
queue->queue.ops = &uvc_meta_queue_qops;
break;
default:
queue->queue.io_modes |= VB2_DMABUF;
queue->queue.ops = &uvc_queue_qops;
break;
}
ret = vb2_queue_init(&queue->queue);
if (ret)
return ret;
mutex_init(&queue->mutex);
spin_lock_init(&queue->irqlock);
INIT_LIST_HEAD(&queue->irqqueue);
queue->flags = drop_corrupted ? UVC_QUEUE_DROP_CORRUPTED : 0;
return 0;
}
void uvc_queue_release(struct uvc_video_queue *queue)
{
mutex_lock(&queue->mutex);
vb2_queue_release(&queue->queue);
mutex_unlock(&queue->mutex);
}
/* -----------------------------------------------------------------------------
* V4L2 queue operations
*/
int uvc_request_buffers(struct uvc_video_queue *queue,
struct v4l2_requestbuffers *rb)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_reqbufs(&queue->queue, rb);
mutex_unlock(&queue->mutex);
return ret ? ret : rb->count;
}
int uvc_query_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *buf)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_querybuf(&queue->queue, buf);
mutex_unlock(&queue->mutex);
return ret;
}
int uvc_create_buffers(struct uvc_video_queue *queue,
struct v4l2_create_buffers *cb)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_create_bufs(&queue->queue, cb);
mutex_unlock(&queue->mutex);
return ret;
}
int uvc_queue_buffer(struct uvc_video_queue *queue,
struct media_device *mdev, struct v4l2_buffer *buf)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_qbuf(&queue->queue, mdev, buf);
mutex_unlock(&queue->mutex);
return ret;
}
int uvc_export_buffer(struct uvc_video_queue *queue,
struct v4l2_exportbuffer *exp)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_expbuf(&queue->queue, exp);
mutex_unlock(&queue->mutex);
return ret;
}
int uvc_dequeue_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *buf,
int nonblocking)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_dqbuf(&queue->queue, buf, nonblocking);
mutex_unlock(&queue->mutex);
return ret;
}
int uvc_queue_streamon(struct uvc_video_queue *queue, enum v4l2_buf_type type)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_streamon(&queue->queue, type);
mutex_unlock(&queue->mutex);
return ret;
}
int uvc_queue_streamoff(struct uvc_video_queue *queue, enum v4l2_buf_type type)
{
int ret;
mutex_lock(&queue->mutex);
ret = vb2_streamoff(&queue->queue, type);
mutex_unlock(&queue->mutex);
return ret;
}
int uvc_queue_mmap(struct uvc_video_queue *queue, struct vm_area_struct *vma)
{
return vb2_mmap(&queue->queue, vma);
}
#ifndef CONFIG_MMU
unsigned long uvc_queue_get_unmapped_area(struct uvc_video_queue *queue,
unsigned long pgoff)
{
return vb2_get_unmapped_area(&queue->queue, 0, 0, pgoff, 0);
}
#endif
__poll_t uvc_queue_poll(struct uvc_video_queue *queue, struct file *file,
poll_table *wait)
{
__poll_t ret;
mutex_lock(&queue->mutex);
ret = vb2_poll(&queue->queue, file, wait);
mutex_unlock(&queue->mutex);
return ret;
}
/* -----------------------------------------------------------------------------
*
*/
/*
* Check if buffers have been allocated.
*/
int uvc_queue_allocated(struct uvc_video_queue *queue)
{
int allocated;
mutex_lock(&queue->mutex);
allocated = vb2_is_busy(&queue->queue);
mutex_unlock(&queue->mutex);
return allocated;
}
/*
* Cancel the video buffers queue.
*
* Cancelling the queue marks all buffers on the irq queue as erroneous,
* wakes them up and removes them from the queue.
*
* If the disconnect parameter is set, further calls to uvc_queue_buffer will
* fail with -ENODEV.
*
* This function acquires the irq spinlock and can be called from interrupt
* context.
*/
void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect)
{
unsigned long flags;
spin_lock_irqsave(&queue->irqlock, flags);
uvc_queue_return_buffers(queue, UVC_BUF_STATE_ERROR);
/*
* This must be protected by the irqlock spinlock to avoid race
* conditions between uvc_buffer_queue and the disconnection event that
* could result in an interruptible wait in uvc_dequeue_buffer. Do not
* blindly replace this logic by checking for the UVC_QUEUE_DISCONNECTED
* state outside the queue code.
*/
if (disconnect)
queue->flags |= UVC_QUEUE_DISCONNECTED;
spin_unlock_irqrestore(&queue->irqlock, flags);
}
/*
* uvc_queue_get_current_buffer: Obtain the current working output buffer
*
* Buffers may span multiple packets, and even URBs, therefore the active buffer
* remains on the queue until the EOF marker.
*/
static struct uvc_buffer *
__uvc_queue_get_current_buffer(struct uvc_video_queue *queue)
{
if (list_empty(&queue->irqqueue))
return NULL;
return list_first_entry(&queue->irqqueue, struct uvc_buffer, queue);
}
struct uvc_buffer *uvc_queue_get_current_buffer(struct uvc_video_queue *queue)
{
struct uvc_buffer *nextbuf;
unsigned long flags;
spin_lock_irqsave(&queue->irqlock, flags);
nextbuf = __uvc_queue_get_current_buffer(queue);
spin_unlock_irqrestore(&queue->irqlock, flags);
return nextbuf;
}
/*
* uvc_queue_buffer_requeue: Requeue a buffer on our internal irqqueue
*
* Reuse a buffer through our internal queue without the need to 'prepare'.
* The buffer will be returned to userspace through the uvc_buffer_queue call if
* the device has been disconnected.
*/
static void uvc_queue_buffer_requeue(struct uvc_video_queue *queue,
struct uvc_buffer *buf)
{
buf->error = 0;
buf->state = UVC_BUF_STATE_QUEUED;
buf->bytesused = 0;
vb2_set_plane_payload(&buf->buf.vb2_buf, 0, 0);
uvc_buffer_queue(&buf->buf.vb2_buf);
}
static void uvc_queue_buffer_complete(struct kref *ref)
{
struct uvc_buffer *buf = container_of(ref, struct uvc_buffer, ref);
struct vb2_buffer *vb = &buf->buf.vb2_buf;
struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
if ((queue->flags & UVC_QUEUE_DROP_CORRUPTED) && buf->error) {
uvc_queue_buffer_requeue(queue, buf);
return;
}
buf->state = buf->error ? UVC_BUF_STATE_ERROR : UVC_BUF_STATE_DONE;
vb2_set_plane_payload(&buf->buf.vb2_buf, 0, buf->bytesused);
vb2_buffer_done(&buf->buf.vb2_buf, VB2_BUF_STATE_DONE);
}
/*
* Release a reference on the buffer. Complete the buffer when the last
* reference is released.
*/
void uvc_queue_buffer_release(struct uvc_buffer *buf)
{
kref_put(&buf->ref, uvc_queue_buffer_complete);
}
/*
* Remove this buffer from the queue. Lifetime will persist while async actions
* are still running (if any), and uvc_queue_buffer_release will give the buffer
* back to VB2 when all users have completed.
*/
struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
struct uvc_buffer *buf)
{
struct uvc_buffer *nextbuf;
unsigned long flags;
spin_lock_irqsave(&queue->irqlock, flags);
list_del(&buf->queue);
nextbuf = __uvc_queue_get_current_buffer(queue);
spin_unlock_irqrestore(&queue->irqlock, flags);
uvc_queue_buffer_release(buf);
return nextbuf;
}
| linux-master | drivers/media/usb/uvc/uvc_queue.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_debugfs.c -- USB Video Class driver - Debugging support
*
* Copyright (C) 2011
* Laurent Pinchart ([email protected])
*/
#include <linux/module.h>
#include <linux/debugfs.h>
#include <linux/slab.h>
#include <linux/usb.h>
#include "uvcvideo.h"
/* -----------------------------------------------------------------------------
* Statistics
*/
#define UVC_DEBUGFS_BUF_SIZE 1024
struct uvc_debugfs_buffer {
size_t count;
char data[UVC_DEBUGFS_BUF_SIZE];
};
static int uvc_debugfs_stats_open(struct inode *inode, struct file *file)
{
struct uvc_streaming *stream = inode->i_private;
struct uvc_debugfs_buffer *buf;
buf = kmalloc(sizeof(*buf), GFP_KERNEL);
if (buf == NULL)
return -ENOMEM;
buf->count = uvc_video_stats_dump(stream, buf->data, sizeof(buf->data));
file->private_data = buf;
return 0;
}
static ssize_t uvc_debugfs_stats_read(struct file *file, char __user *user_buf,
size_t nbytes, loff_t *ppos)
{
struct uvc_debugfs_buffer *buf = file->private_data;
return simple_read_from_buffer(user_buf, nbytes, ppos, buf->data,
buf->count);
}
static int uvc_debugfs_stats_release(struct inode *inode, struct file *file)
{
kfree(file->private_data);
file->private_data = NULL;
return 0;
}
static const struct file_operations uvc_debugfs_stats_fops = {
.owner = THIS_MODULE,
.open = uvc_debugfs_stats_open,
.llseek = no_llseek,
.read = uvc_debugfs_stats_read,
.release = uvc_debugfs_stats_release,
};
/* -----------------------------------------------------------------------------
* Global and stream initialization/cleanup
*/
static struct dentry *uvc_debugfs_root_dir;
void uvc_debugfs_init_stream(struct uvc_streaming *stream)
{
struct usb_device *udev = stream->dev->udev;
char dir_name[33];
if (uvc_debugfs_root_dir == NULL)
return;
snprintf(dir_name, sizeof(dir_name), "%u-%u-%u", udev->bus->busnum,
udev->devnum, stream->intfnum);
stream->debugfs_dir = debugfs_create_dir(dir_name,
uvc_debugfs_root_dir);
debugfs_create_file("stats", 0444, stream->debugfs_dir, stream,
&uvc_debugfs_stats_fops);
}
void uvc_debugfs_cleanup_stream(struct uvc_streaming *stream)
{
debugfs_remove_recursive(stream->debugfs_dir);
stream->debugfs_dir = NULL;
}
void uvc_debugfs_init(void)
{
uvc_debugfs_root_dir = debugfs_create_dir("uvcvideo", usb_debug_root);
}
void uvc_debugfs_cleanup(void)
{
debugfs_remove_recursive(uvc_debugfs_root_dir);
}
| linux-master | drivers/media/usb/uvc/uvc_debugfs.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_v4l2.c -- USB Video Class driver - V4L2 API
*
* Copyright (C) 2005-2010
* Laurent Pinchart ([email protected])
*/
#include <linux/bits.h>
#include <linux/compat.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/usb.h>
#include <linux/videodev2.h>
#include <linux/vmalloc.h>
#include <linux/mm.h>
#include <linux/wait.h>
#include <linux/atomic.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-event.h>
#include <media/v4l2-ioctl.h>
#include "uvcvideo.h"
static int uvc_control_add_xu_mapping(struct uvc_video_chain *chain,
struct uvc_control_mapping *map,
const struct uvc_xu_control_mapping *xmap)
{
unsigned int i;
size_t size;
int ret;
/*
* Prevent excessive memory consumption, as well as integer
* overflows.
*/
if (xmap->menu_count == 0 ||
xmap->menu_count > UVC_MAX_CONTROL_MENU_ENTRIES)
return -EINVAL;
map->menu_names = NULL;
map->menu_mapping = NULL;
map->menu_mask = GENMASK(xmap->menu_count - 1, 0);
size = xmap->menu_count * sizeof(*map->menu_mapping);
map->menu_mapping = kzalloc(size, GFP_KERNEL);
if (!map->menu_mapping) {
ret = -ENOMEM;
goto done;
}
for (i = 0; i < xmap->menu_count ; i++) {
if (copy_from_user((u32 *)&map->menu_mapping[i],
&xmap->menu_info[i].value,
sizeof(map->menu_mapping[i]))) {
ret = -EACCES;
goto done;
}
}
/*
* Always use the standard naming if available, otherwise copy the
* names supplied by userspace.
*/
if (!v4l2_ctrl_get_menu(map->id)) {
size = xmap->menu_count * sizeof(map->menu_names[0]);
map->menu_names = kzalloc(size, GFP_KERNEL);
if (!map->menu_names) {
ret = -ENOMEM;
goto done;
}
for (i = 0; i < xmap->menu_count ; i++) {
/* sizeof(names[i]) - 1: to take care of \0 */
if (copy_from_user((char *)map->menu_names[i],
xmap->menu_info[i].name,
sizeof(map->menu_names[i]) - 1)) {
ret = -EACCES;
goto done;
}
}
}
ret = uvc_ctrl_add_mapping(chain, map);
done:
kfree(map->menu_names);
map->menu_names = NULL;
kfree(map->menu_mapping);
map->menu_mapping = NULL;
return ret;
}
/* ------------------------------------------------------------------------
* UVC ioctls
*/
static int uvc_ioctl_xu_ctrl_map(struct uvc_video_chain *chain,
struct uvc_xu_control_mapping *xmap)
{
struct uvc_control_mapping *map;
int ret;
map = kzalloc(sizeof(*map), GFP_KERNEL);
if (map == NULL)
return -ENOMEM;
map->id = xmap->id;
/* Non standard control id. */
if (v4l2_ctrl_get_name(map->id) == NULL) {
if (xmap->name[0] == '\0') {
ret = -EINVAL;
goto free_map;
}
xmap->name[sizeof(xmap->name) - 1] = '\0';
map->name = xmap->name;
}
memcpy(map->entity, xmap->entity, sizeof(map->entity));
map->selector = xmap->selector;
map->size = xmap->size;
map->offset = xmap->offset;
map->v4l2_type = xmap->v4l2_type;
map->data_type = xmap->data_type;
switch (xmap->v4l2_type) {
case V4L2_CTRL_TYPE_INTEGER:
case V4L2_CTRL_TYPE_BOOLEAN:
case V4L2_CTRL_TYPE_BUTTON:
ret = uvc_ctrl_add_mapping(chain, map);
break;
case V4L2_CTRL_TYPE_MENU:
ret = uvc_control_add_xu_mapping(chain, map, xmap);
break;
default:
uvc_dbg(chain->dev, CONTROL,
"Unsupported V4L2 control type %u\n", xmap->v4l2_type);
ret = -ENOTTY;
break;
}
free_map:
kfree(map);
return ret;
}
/* ------------------------------------------------------------------------
* V4L2 interface
*/
/*
* Find the frame interval closest to the requested frame interval for the
* given frame format and size. This should be done by the device as part of
* the Video Probe and Commit negotiation, but some hardware don't implement
* that feature.
*/
static u32 uvc_try_frame_interval(const struct uvc_frame *frame, u32 interval)
{
unsigned int i;
if (frame->bFrameIntervalType) {
u32 best = -1, dist;
for (i = 0; i < frame->bFrameIntervalType; ++i) {
dist = interval > frame->dwFrameInterval[i]
? interval - frame->dwFrameInterval[i]
: frame->dwFrameInterval[i] - interval;
if (dist > best)
break;
best = dist;
}
interval = frame->dwFrameInterval[i-1];
} else {
const u32 min = frame->dwFrameInterval[0];
const u32 max = frame->dwFrameInterval[1];
const u32 step = frame->dwFrameInterval[2];
interval = min + (interval - min + step/2) / step * step;
if (interval > max)
interval = max;
}
return interval;
}
static u32 uvc_v4l2_get_bytesperline(const struct uvc_format *format,
const struct uvc_frame *frame)
{
switch (format->fcc) {
case V4L2_PIX_FMT_NV12:
case V4L2_PIX_FMT_YVU420:
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_M420:
return frame->wWidth;
default:
return format->bpp * frame->wWidth / 8;
}
}
static int uvc_v4l2_try_format(struct uvc_streaming *stream,
struct v4l2_format *fmt, struct uvc_streaming_control *probe,
const struct uvc_format **uvc_format,
const struct uvc_frame **uvc_frame)
{
const struct uvc_format *format = NULL;
const struct uvc_frame *frame = NULL;
u16 rw, rh;
unsigned int d, maxd;
unsigned int i;
u32 interval;
int ret = 0;
u8 *fcc;
if (fmt->type != stream->type)
return -EINVAL;
fcc = (u8 *)&fmt->fmt.pix.pixelformat;
uvc_dbg(stream->dev, FORMAT, "Trying format 0x%08x (%c%c%c%c): %ux%u\n",
fmt->fmt.pix.pixelformat,
fcc[0], fcc[1], fcc[2], fcc[3],
fmt->fmt.pix.width, fmt->fmt.pix.height);
/*
* Check if the hardware supports the requested format, use the default
* format otherwise.
*/
for (i = 0; i < stream->nformats; ++i) {
format = &stream->formats[i];
if (format->fcc == fmt->fmt.pix.pixelformat)
break;
}
if (i == stream->nformats) {
format = stream->def_format;
fmt->fmt.pix.pixelformat = format->fcc;
}
/*
* Find the closest image size. The distance between image sizes is
* the size in pixels of the non-overlapping regions between the
* requested size and the frame-specified size.
*/
rw = fmt->fmt.pix.width;
rh = fmt->fmt.pix.height;
maxd = (unsigned int)-1;
for (i = 0; i < format->nframes; ++i) {
u16 w = format->frames[i].wWidth;
u16 h = format->frames[i].wHeight;
d = min(w, rw) * min(h, rh);
d = w*h + rw*rh - 2*d;
if (d < maxd) {
maxd = d;
frame = &format->frames[i];
}
if (maxd == 0)
break;
}
if (frame == NULL) {
uvc_dbg(stream->dev, FORMAT, "Unsupported size %ux%u\n",
fmt->fmt.pix.width, fmt->fmt.pix.height);
return -EINVAL;
}
/* Use the default frame interval. */
interval = frame->dwDefaultFrameInterval;
uvc_dbg(stream->dev, FORMAT,
"Using default frame interval %u.%u us (%u.%u fps)\n",
interval / 10, interval % 10, 10000000 / interval,
(100000000 / interval) % 10);
/* Set the format index, frame index and frame interval. */
memset(probe, 0, sizeof(*probe));
probe->bmHint = 1; /* dwFrameInterval */
probe->bFormatIndex = format->index;
probe->bFrameIndex = frame->bFrameIndex;
probe->dwFrameInterval = uvc_try_frame_interval(frame, interval);
/*
* Some webcams stall the probe control set request when the
* dwMaxVideoFrameSize field is set to zero. The UVC specification
* clearly states that the field is read-only from the host, so this
* is a webcam bug. Set dwMaxVideoFrameSize to the value reported by
* the webcam to work around the problem.
*
* The workaround could probably be enabled for all webcams, so the
* quirk can be removed if needed. It's currently useful to detect
* webcam bugs and fix them before they hit the market (providing
* developers test their webcams with the Linux driver as well as with
* the Windows driver).
*/
mutex_lock(&stream->mutex);
if (stream->dev->quirks & UVC_QUIRK_PROBE_EXTRAFIELDS)
probe->dwMaxVideoFrameSize =
stream->ctrl.dwMaxVideoFrameSize;
/* Probe the device. */
ret = uvc_probe_video(stream, probe);
mutex_unlock(&stream->mutex);
if (ret < 0)
return ret;
/*
* After the probe, update fmt with the values returned from
* negotiation with the device. Some devices return invalid bFormatIndex
* and bFrameIndex values, in which case we can only assume they have
* accepted the requested format as-is.
*/
for (i = 0; i < stream->nformats; ++i) {
if (probe->bFormatIndex == stream->formats[i].index) {
format = &stream->formats[i];
break;
}
}
if (i == stream->nformats)
uvc_dbg(stream->dev, FORMAT,
"Unknown bFormatIndex %u, using default\n",
probe->bFormatIndex);
for (i = 0; i < format->nframes; ++i) {
if (probe->bFrameIndex == format->frames[i].bFrameIndex) {
frame = &format->frames[i];
break;
}
}
if (i == format->nframes)
uvc_dbg(stream->dev, FORMAT,
"Unknown bFrameIndex %u, using default\n",
probe->bFrameIndex);
fmt->fmt.pix.width = frame->wWidth;
fmt->fmt.pix.height = frame->wHeight;
fmt->fmt.pix.field = V4L2_FIELD_NONE;
fmt->fmt.pix.bytesperline = uvc_v4l2_get_bytesperline(format, frame);
fmt->fmt.pix.sizeimage = probe->dwMaxVideoFrameSize;
fmt->fmt.pix.pixelformat = format->fcc;
fmt->fmt.pix.colorspace = format->colorspace;
fmt->fmt.pix.xfer_func = format->xfer_func;
fmt->fmt.pix.ycbcr_enc = format->ycbcr_enc;
if (uvc_format != NULL)
*uvc_format = format;
if (uvc_frame != NULL)
*uvc_frame = frame;
return ret;
}
static int uvc_v4l2_get_format(struct uvc_streaming *stream,
struct v4l2_format *fmt)
{
const struct uvc_format *format;
const struct uvc_frame *frame;
int ret = 0;
if (fmt->type != stream->type)
return -EINVAL;
mutex_lock(&stream->mutex);
format = stream->cur_format;
frame = stream->cur_frame;
if (format == NULL || frame == NULL) {
ret = -EINVAL;
goto done;
}
fmt->fmt.pix.pixelformat = format->fcc;
fmt->fmt.pix.width = frame->wWidth;
fmt->fmt.pix.height = frame->wHeight;
fmt->fmt.pix.field = V4L2_FIELD_NONE;
fmt->fmt.pix.bytesperline = uvc_v4l2_get_bytesperline(format, frame);
fmt->fmt.pix.sizeimage = stream->ctrl.dwMaxVideoFrameSize;
fmt->fmt.pix.colorspace = format->colorspace;
fmt->fmt.pix.xfer_func = format->xfer_func;
fmt->fmt.pix.ycbcr_enc = format->ycbcr_enc;
done:
mutex_unlock(&stream->mutex);
return ret;
}
static int uvc_v4l2_set_format(struct uvc_streaming *stream,
struct v4l2_format *fmt)
{
struct uvc_streaming_control probe;
const struct uvc_format *format;
const struct uvc_frame *frame;
int ret;
if (fmt->type != stream->type)
return -EINVAL;
ret = uvc_v4l2_try_format(stream, fmt, &probe, &format, &frame);
if (ret < 0)
return ret;
mutex_lock(&stream->mutex);
if (uvc_queue_allocated(&stream->queue)) {
ret = -EBUSY;
goto done;
}
stream->ctrl = probe;
stream->cur_format = format;
stream->cur_frame = frame;
done:
mutex_unlock(&stream->mutex);
return ret;
}
static int uvc_v4l2_get_streamparm(struct uvc_streaming *stream,
struct v4l2_streamparm *parm)
{
u32 numerator, denominator;
if (parm->type != stream->type)
return -EINVAL;
mutex_lock(&stream->mutex);
numerator = stream->ctrl.dwFrameInterval;
mutex_unlock(&stream->mutex);
denominator = 10000000;
v4l2_simplify_fraction(&numerator, &denominator, 8, 333);
memset(parm, 0, sizeof(*parm));
parm->type = stream->type;
if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
parm->parm.capture.capturemode = 0;
parm->parm.capture.timeperframe.numerator = numerator;
parm->parm.capture.timeperframe.denominator = denominator;
parm->parm.capture.extendedmode = 0;
parm->parm.capture.readbuffers = 0;
} else {
parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME;
parm->parm.output.outputmode = 0;
parm->parm.output.timeperframe.numerator = numerator;
parm->parm.output.timeperframe.denominator = denominator;
}
return 0;
}
static int uvc_v4l2_set_streamparm(struct uvc_streaming *stream,
struct v4l2_streamparm *parm)
{
struct uvc_streaming_control probe;
struct v4l2_fract timeperframe;
const struct uvc_format *format;
const struct uvc_frame *frame;
u32 interval, maxd;
unsigned int i;
int ret;
if (parm->type != stream->type)
return -EINVAL;
if (parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
timeperframe = parm->parm.capture.timeperframe;
else
timeperframe = parm->parm.output.timeperframe;
interval = v4l2_fraction_to_interval(timeperframe.numerator,
timeperframe.denominator);
uvc_dbg(stream->dev, FORMAT, "Setting frame interval to %u/%u (%u)\n",
timeperframe.numerator, timeperframe.denominator, interval);
mutex_lock(&stream->mutex);
if (uvc_queue_streaming(&stream->queue)) {
mutex_unlock(&stream->mutex);
return -EBUSY;
}
format = stream->cur_format;
frame = stream->cur_frame;
probe = stream->ctrl;
probe.dwFrameInterval = uvc_try_frame_interval(frame, interval);
maxd = abs((s32)probe.dwFrameInterval - interval);
/* Try frames with matching size to find the best frame interval. */
for (i = 0; i < format->nframes && maxd != 0; i++) {
u32 d, ival;
if (&format->frames[i] == stream->cur_frame)
continue;
if (format->frames[i].wWidth != stream->cur_frame->wWidth ||
format->frames[i].wHeight != stream->cur_frame->wHeight)
continue;
ival = uvc_try_frame_interval(&format->frames[i], interval);
d = abs((s32)ival - interval);
if (d >= maxd)
continue;
frame = &format->frames[i];
probe.bFrameIndex = frame->bFrameIndex;
probe.dwFrameInterval = ival;
maxd = d;
}
/* Probe the device with the new settings. */
ret = uvc_probe_video(stream, &probe);
if (ret < 0) {
mutex_unlock(&stream->mutex);
return ret;
}
stream->ctrl = probe;
stream->cur_frame = frame;
mutex_unlock(&stream->mutex);
/* Return the actual frame period. */
timeperframe.numerator = probe.dwFrameInterval;
timeperframe.denominator = 10000000;
v4l2_simplify_fraction(&timeperframe.numerator,
&timeperframe.denominator, 8, 333);
if (parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
parm->parm.capture.timeperframe = timeperframe;
parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
} else {
parm->parm.output.timeperframe = timeperframe;
parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME;
}
return 0;
}
/* ------------------------------------------------------------------------
* Privilege management
*/
/*
* Privilege management is the multiple-open implementation basis. The current
* implementation is completely transparent for the end-user and doesn't
* require explicit use of the VIDIOC_G_PRIORITY and VIDIOC_S_PRIORITY ioctls.
* Those ioctls enable finer control on the device (by making possible for a
* user to request exclusive access to a device), but are not mature yet.
* Switching to the V4L2 priority mechanism might be considered in the future
* if this situation changes.
*
* Each open instance of a UVC device can either be in a privileged or
* unprivileged state. Only a single instance can be in a privileged state at
* a given time. Trying to perform an operation that requires privileges will
* automatically acquire the required privileges if possible, or return -EBUSY
* otherwise. Privileges are dismissed when closing the instance or when
* freeing the video buffers using VIDIOC_REQBUFS.
*
* Operations that require privileges are:
*
* - VIDIOC_S_INPUT
* - VIDIOC_S_PARM
* - VIDIOC_S_FMT
* - VIDIOC_REQBUFS
*/
static int uvc_acquire_privileges(struct uvc_fh *handle)
{
/* Always succeed if the handle is already privileged. */
if (handle->state == UVC_HANDLE_ACTIVE)
return 0;
/* Check if the device already has a privileged handle. */
if (atomic_inc_return(&handle->stream->active) != 1) {
atomic_dec(&handle->stream->active);
return -EBUSY;
}
handle->state = UVC_HANDLE_ACTIVE;
return 0;
}
static void uvc_dismiss_privileges(struct uvc_fh *handle)
{
if (handle->state == UVC_HANDLE_ACTIVE)
atomic_dec(&handle->stream->active);
handle->state = UVC_HANDLE_PASSIVE;
}
static int uvc_has_privileges(struct uvc_fh *handle)
{
return handle->state == UVC_HANDLE_ACTIVE;
}
/* ------------------------------------------------------------------------
* V4L2 file operations
*/
static int uvc_v4l2_open(struct file *file)
{
struct uvc_streaming *stream;
struct uvc_fh *handle;
int ret = 0;
stream = video_drvdata(file);
uvc_dbg(stream->dev, CALLS, "%s\n", __func__);
ret = usb_autopm_get_interface(stream->dev->intf);
if (ret < 0)
return ret;
/* Create the device handle. */
handle = kzalloc(sizeof(*handle), GFP_KERNEL);
if (handle == NULL) {
usb_autopm_put_interface(stream->dev->intf);
return -ENOMEM;
}
mutex_lock(&stream->dev->lock);
if (stream->dev->users == 0) {
ret = uvc_status_start(stream->dev, GFP_KERNEL);
if (ret < 0) {
mutex_unlock(&stream->dev->lock);
usb_autopm_put_interface(stream->dev->intf);
kfree(handle);
return ret;
}
}
stream->dev->users++;
mutex_unlock(&stream->dev->lock);
v4l2_fh_init(&handle->vfh, &stream->vdev);
v4l2_fh_add(&handle->vfh);
handle->chain = stream->chain;
handle->stream = stream;
handle->state = UVC_HANDLE_PASSIVE;
file->private_data = handle;
return 0;
}
static int uvc_v4l2_release(struct file *file)
{
struct uvc_fh *handle = file->private_data;
struct uvc_streaming *stream = handle->stream;
uvc_dbg(stream->dev, CALLS, "%s\n", __func__);
/* Only free resources if this is a privileged handle. */
if (uvc_has_privileges(handle))
uvc_queue_release(&stream->queue);
/* Release the file handle. */
uvc_dismiss_privileges(handle);
v4l2_fh_del(&handle->vfh);
v4l2_fh_exit(&handle->vfh);
kfree(handle);
file->private_data = NULL;
mutex_lock(&stream->dev->lock);
if (--stream->dev->users == 0)
uvc_status_stop(stream->dev);
mutex_unlock(&stream->dev->lock);
usb_autopm_put_interface(stream->dev->intf);
return 0;
}
static int uvc_ioctl_querycap(struct file *file, void *fh,
struct v4l2_capability *cap)
{
struct uvc_fh *handle = file->private_data;
struct uvc_video_chain *chain = handle->chain;
struct uvc_streaming *stream = handle->stream;
strscpy(cap->driver, "uvcvideo", sizeof(cap->driver));
strscpy(cap->card, handle->stream->dev->name, sizeof(cap->card));
usb_make_path(stream->dev->udev, cap->bus_info, sizeof(cap->bus_info));
cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING
| chain->caps;
return 0;
}
static int uvc_ioctl_enum_fmt(struct uvc_streaming *stream,
struct v4l2_fmtdesc *fmt)
{
const struct uvc_format *format;
enum v4l2_buf_type type = fmt->type;
u32 index = fmt->index;
if (fmt->type != stream->type || fmt->index >= stream->nformats)
return -EINVAL;
memset(fmt, 0, sizeof(*fmt));
fmt->index = index;
fmt->type = type;
format = &stream->formats[fmt->index];
fmt->flags = 0;
if (format->flags & UVC_FMT_FLAG_COMPRESSED)
fmt->flags |= V4L2_FMT_FLAG_COMPRESSED;
fmt->pixelformat = format->fcc;
return 0;
}
static int uvc_ioctl_enum_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_fmtdesc *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
return uvc_ioctl_enum_fmt(stream, fmt);
}
static int uvc_ioctl_enum_fmt_vid_out(struct file *file, void *fh,
struct v4l2_fmtdesc *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
return uvc_ioctl_enum_fmt(stream, fmt);
}
static int uvc_ioctl_g_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_format *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
return uvc_v4l2_get_format(stream, fmt);
}
static int uvc_ioctl_g_fmt_vid_out(struct file *file, void *fh,
struct v4l2_format *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
return uvc_v4l2_get_format(stream, fmt);
}
static int uvc_ioctl_s_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_format *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
int ret;
ret = uvc_acquire_privileges(handle);
if (ret < 0)
return ret;
return uvc_v4l2_set_format(stream, fmt);
}
static int uvc_ioctl_s_fmt_vid_out(struct file *file, void *fh,
struct v4l2_format *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
int ret;
ret = uvc_acquire_privileges(handle);
if (ret < 0)
return ret;
return uvc_v4l2_set_format(stream, fmt);
}
static int uvc_ioctl_try_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_format *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
struct uvc_streaming_control probe;
return uvc_v4l2_try_format(stream, fmt, &probe, NULL, NULL);
}
static int uvc_ioctl_try_fmt_vid_out(struct file *file, void *fh,
struct v4l2_format *fmt)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
struct uvc_streaming_control probe;
return uvc_v4l2_try_format(stream, fmt, &probe, NULL, NULL);
}
static int uvc_ioctl_reqbufs(struct file *file, void *fh,
struct v4l2_requestbuffers *rb)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
int ret;
ret = uvc_acquire_privileges(handle);
if (ret < 0)
return ret;
mutex_lock(&stream->mutex);
ret = uvc_request_buffers(&stream->queue, rb);
mutex_unlock(&stream->mutex);
if (ret < 0)
return ret;
if (ret == 0)
uvc_dismiss_privileges(handle);
return 0;
}
static int uvc_ioctl_querybuf(struct file *file, void *fh,
struct v4l2_buffer *buf)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
if (!uvc_has_privileges(handle))
return -EBUSY;
return uvc_query_buffer(&stream->queue, buf);
}
static int uvc_ioctl_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
if (!uvc_has_privileges(handle))
return -EBUSY;
return uvc_queue_buffer(&stream->queue,
stream->vdev.v4l2_dev->mdev, buf);
}
static int uvc_ioctl_expbuf(struct file *file, void *fh,
struct v4l2_exportbuffer *exp)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
if (!uvc_has_privileges(handle))
return -EBUSY;
return uvc_export_buffer(&stream->queue, exp);
}
static int uvc_ioctl_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
if (!uvc_has_privileges(handle))
return -EBUSY;
return uvc_dequeue_buffer(&stream->queue, buf,
file->f_flags & O_NONBLOCK);
}
static int uvc_ioctl_create_bufs(struct file *file, void *fh,
struct v4l2_create_buffers *cb)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
int ret;
ret = uvc_acquire_privileges(handle);
if (ret < 0)
return ret;
return uvc_create_buffers(&stream->queue, cb);
}
static int uvc_ioctl_streamon(struct file *file, void *fh,
enum v4l2_buf_type type)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
int ret;
if (!uvc_has_privileges(handle))
return -EBUSY;
mutex_lock(&stream->mutex);
ret = uvc_queue_streamon(&stream->queue, type);
mutex_unlock(&stream->mutex);
return ret;
}
static int uvc_ioctl_streamoff(struct file *file, void *fh,
enum v4l2_buf_type type)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
if (!uvc_has_privileges(handle))
return -EBUSY;
mutex_lock(&stream->mutex);
uvc_queue_streamoff(&stream->queue, type);
mutex_unlock(&stream->mutex);
return 0;
}
static int uvc_ioctl_enum_input(struct file *file, void *fh,
struct v4l2_input *input)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
const struct uvc_entity *selector = chain->selector;
struct uvc_entity *iterm = NULL;
struct uvc_entity *it;
u32 index = input->index;
if (selector == NULL ||
(chain->dev->quirks & UVC_QUIRK_IGNORE_SELECTOR_UNIT)) {
if (index != 0)
return -EINVAL;
list_for_each_entry(it, &chain->entities, chain) {
if (UVC_ENTITY_IS_ITERM(it)) {
iterm = it;
break;
}
}
} else if (index < selector->bNrInPins) {
list_for_each_entry(it, &chain->entities, chain) {
if (!UVC_ENTITY_IS_ITERM(it))
continue;
if (it->id == selector->baSourceID[index]) {
iterm = it;
break;
}
}
}
if (iterm == NULL)
return -EINVAL;
memset(input, 0, sizeof(*input));
input->index = index;
strscpy(input->name, iterm->name, sizeof(input->name));
if (UVC_ENTITY_TYPE(iterm) == UVC_ITT_CAMERA)
input->type = V4L2_INPUT_TYPE_CAMERA;
return 0;
}
static int uvc_ioctl_g_input(struct file *file, void *fh, unsigned int *input)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
u8 *buf;
int ret;
if (chain->selector == NULL ||
(chain->dev->quirks & UVC_QUIRK_IGNORE_SELECTOR_UNIT)) {
*input = 0;
return 0;
}
buf = kmalloc(1, GFP_KERNEL);
if (!buf)
return -ENOMEM;
ret = uvc_query_ctrl(chain->dev, UVC_GET_CUR, chain->selector->id,
chain->dev->intfnum, UVC_SU_INPUT_SELECT_CONTROL,
buf, 1);
if (!ret)
*input = *buf - 1;
kfree(buf);
return ret;
}
static int uvc_ioctl_s_input(struct file *file, void *fh, unsigned int input)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
u8 *buf;
int ret;
ret = uvc_acquire_privileges(handle);
if (ret < 0)
return ret;
if (chain->selector == NULL ||
(chain->dev->quirks & UVC_QUIRK_IGNORE_SELECTOR_UNIT)) {
if (input)
return -EINVAL;
return 0;
}
if (input >= chain->selector->bNrInPins)
return -EINVAL;
buf = kmalloc(1, GFP_KERNEL);
if (!buf)
return -ENOMEM;
*buf = input + 1;
ret = uvc_query_ctrl(chain->dev, UVC_SET_CUR, chain->selector->id,
chain->dev->intfnum, UVC_SU_INPUT_SELECT_CONTROL,
buf, 1);
kfree(buf);
return ret;
}
static int uvc_ioctl_queryctrl(struct file *file, void *fh,
struct v4l2_queryctrl *qc)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
return uvc_query_v4l2_ctrl(chain, qc);
}
static int uvc_ioctl_query_ext_ctrl(struct file *file, void *fh,
struct v4l2_query_ext_ctrl *qec)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
struct v4l2_queryctrl qc = { qec->id };
int ret;
ret = uvc_query_v4l2_ctrl(chain, &qc);
if (ret)
return ret;
qec->id = qc.id;
qec->type = qc.type;
strscpy(qec->name, qc.name, sizeof(qec->name));
qec->minimum = qc.minimum;
qec->maximum = qc.maximum;
qec->step = qc.step;
qec->default_value = qc.default_value;
qec->flags = qc.flags;
qec->elem_size = 4;
qec->elems = 1;
qec->nr_of_dims = 0;
memset(qec->dims, 0, sizeof(qec->dims));
memset(qec->reserved, 0, sizeof(qec->reserved));
return 0;
}
static int uvc_ctrl_check_access(struct uvc_video_chain *chain,
struct v4l2_ext_controls *ctrls,
unsigned long ioctl)
{
struct v4l2_ext_control *ctrl = ctrls->controls;
unsigned int i;
int ret = 0;
for (i = 0; i < ctrls->count; ++ctrl, ++i) {
ret = uvc_ctrl_is_accessible(chain, ctrl->id, ctrls, ioctl);
if (ret)
break;
}
ctrls->error_idx = ioctl == VIDIOC_TRY_EXT_CTRLS ? i : ctrls->count;
return ret;
}
static int uvc_ioctl_g_ext_ctrls(struct file *file, void *fh,
struct v4l2_ext_controls *ctrls)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
struct v4l2_ext_control *ctrl = ctrls->controls;
unsigned int i;
int ret;
ret = uvc_ctrl_check_access(chain, ctrls, VIDIOC_G_EXT_CTRLS);
if (ret < 0)
return ret;
if (ctrls->which == V4L2_CTRL_WHICH_DEF_VAL) {
for (i = 0; i < ctrls->count; ++ctrl, ++i) {
struct v4l2_queryctrl qc = { .id = ctrl->id };
ret = uvc_query_v4l2_ctrl(chain, &qc);
if (ret < 0) {
ctrls->error_idx = i;
return ret;
}
ctrl->value = qc.default_value;
}
return 0;
}
ret = uvc_ctrl_begin(chain);
if (ret < 0)
return ret;
for (i = 0; i < ctrls->count; ++ctrl, ++i) {
ret = uvc_ctrl_get(chain, ctrl);
if (ret < 0) {
uvc_ctrl_rollback(handle);
ctrls->error_idx = i;
return ret;
}
}
ctrls->error_idx = 0;
return uvc_ctrl_rollback(handle);
}
static int uvc_ioctl_s_try_ext_ctrls(struct uvc_fh *handle,
struct v4l2_ext_controls *ctrls,
unsigned long ioctl)
{
struct v4l2_ext_control *ctrl = ctrls->controls;
struct uvc_video_chain *chain = handle->chain;
unsigned int i;
int ret;
ret = uvc_ctrl_check_access(chain, ctrls, ioctl);
if (ret < 0)
return ret;
ret = uvc_ctrl_begin(chain);
if (ret < 0)
return ret;
for (i = 0; i < ctrls->count; ++ctrl, ++i) {
ret = uvc_ctrl_set(handle, ctrl);
if (ret < 0) {
uvc_ctrl_rollback(handle);
ctrls->error_idx = ioctl == VIDIOC_S_EXT_CTRLS ?
ctrls->count : i;
return ret;
}
}
ctrls->error_idx = 0;
if (ioctl == VIDIOC_S_EXT_CTRLS)
return uvc_ctrl_commit(handle, ctrls);
else
return uvc_ctrl_rollback(handle);
}
static int uvc_ioctl_s_ext_ctrls(struct file *file, void *fh,
struct v4l2_ext_controls *ctrls)
{
struct uvc_fh *handle = fh;
return uvc_ioctl_s_try_ext_ctrls(handle, ctrls, VIDIOC_S_EXT_CTRLS);
}
static int uvc_ioctl_try_ext_ctrls(struct file *file, void *fh,
struct v4l2_ext_controls *ctrls)
{
struct uvc_fh *handle = fh;
return uvc_ioctl_s_try_ext_ctrls(handle, ctrls, VIDIOC_TRY_EXT_CTRLS);
}
static int uvc_ioctl_querymenu(struct file *file, void *fh,
struct v4l2_querymenu *qm)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
return uvc_query_v4l2_menu(chain, qm);
}
static int uvc_ioctl_g_selection(struct file *file, void *fh,
struct v4l2_selection *sel)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
if (sel->type != stream->type)
return -EINVAL;
switch (sel->target) {
case V4L2_SEL_TGT_CROP_DEFAULT:
case V4L2_SEL_TGT_CROP_BOUNDS:
if (stream->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
break;
case V4L2_SEL_TGT_COMPOSE_DEFAULT:
case V4L2_SEL_TGT_COMPOSE_BOUNDS:
if (stream->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
return -EINVAL;
break;
default:
return -EINVAL;
}
sel->r.left = 0;
sel->r.top = 0;
mutex_lock(&stream->mutex);
sel->r.width = stream->cur_frame->wWidth;
sel->r.height = stream->cur_frame->wHeight;
mutex_unlock(&stream->mutex);
return 0;
}
static int uvc_ioctl_g_parm(struct file *file, void *fh,
struct v4l2_streamparm *parm)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
return uvc_v4l2_get_streamparm(stream, parm);
}
static int uvc_ioctl_s_parm(struct file *file, void *fh,
struct v4l2_streamparm *parm)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
int ret;
ret = uvc_acquire_privileges(handle);
if (ret < 0)
return ret;
return uvc_v4l2_set_streamparm(stream, parm);
}
static int uvc_ioctl_enum_framesizes(struct file *file, void *fh,
struct v4l2_frmsizeenum *fsize)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
const struct uvc_format *format = NULL;
const struct uvc_frame *frame = NULL;
unsigned int index;
unsigned int i;
/* Look for the given pixel format */
for (i = 0; i < stream->nformats; i++) {
if (stream->formats[i].fcc == fsize->pixel_format) {
format = &stream->formats[i];
break;
}
}
if (format == NULL)
return -EINVAL;
/* Skip duplicate frame sizes */
for (i = 0, index = 0; i < format->nframes; i++) {
if (frame && frame->wWidth == format->frames[i].wWidth &&
frame->wHeight == format->frames[i].wHeight)
continue;
frame = &format->frames[i];
if (index == fsize->index)
break;
index++;
}
if (i == format->nframes)
return -EINVAL;
fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
fsize->discrete.width = frame->wWidth;
fsize->discrete.height = frame->wHeight;
return 0;
}
static int uvc_ioctl_enum_frameintervals(struct file *file, void *fh,
struct v4l2_frmivalenum *fival)
{
struct uvc_fh *handle = fh;
struct uvc_streaming *stream = handle->stream;
const struct uvc_format *format = NULL;
const struct uvc_frame *frame = NULL;
unsigned int nintervals;
unsigned int index;
unsigned int i;
/* Look for the given pixel format and frame size */
for (i = 0; i < stream->nformats; i++) {
if (stream->formats[i].fcc == fival->pixel_format) {
format = &stream->formats[i];
break;
}
}
if (format == NULL)
return -EINVAL;
index = fival->index;
for (i = 0; i < format->nframes; i++) {
if (format->frames[i].wWidth == fival->width &&
format->frames[i].wHeight == fival->height) {
frame = &format->frames[i];
nintervals = frame->bFrameIntervalType ?: 1;
if (index < nintervals)
break;
index -= nintervals;
}
}
if (i == format->nframes)
return -EINVAL;
if (frame->bFrameIntervalType) {
fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
fival->discrete.numerator =
frame->dwFrameInterval[index];
fival->discrete.denominator = 10000000;
v4l2_simplify_fraction(&fival->discrete.numerator,
&fival->discrete.denominator, 8, 333);
} else {
fival->type = V4L2_FRMIVAL_TYPE_STEPWISE;
fival->stepwise.min.numerator = frame->dwFrameInterval[0];
fival->stepwise.min.denominator = 10000000;
fival->stepwise.max.numerator = frame->dwFrameInterval[1];
fival->stepwise.max.denominator = 10000000;
fival->stepwise.step.numerator = frame->dwFrameInterval[2];
fival->stepwise.step.denominator = 10000000;
v4l2_simplify_fraction(&fival->stepwise.min.numerator,
&fival->stepwise.min.denominator, 8, 333);
v4l2_simplify_fraction(&fival->stepwise.max.numerator,
&fival->stepwise.max.denominator, 8, 333);
v4l2_simplify_fraction(&fival->stepwise.step.numerator,
&fival->stepwise.step.denominator, 8, 333);
}
return 0;
}
static int uvc_ioctl_subscribe_event(struct v4l2_fh *fh,
const struct v4l2_event_subscription *sub)
{
switch (sub->type) {
case V4L2_EVENT_CTRL:
return v4l2_event_subscribe(fh, sub, 0, &uvc_ctrl_sub_ev_ops);
default:
return -EINVAL;
}
}
static long uvc_ioctl_default(struct file *file, void *fh, bool valid_prio,
unsigned int cmd, void *arg)
{
struct uvc_fh *handle = fh;
struct uvc_video_chain *chain = handle->chain;
switch (cmd) {
/* Dynamic controls. */
case UVCIOC_CTRL_MAP:
return uvc_ioctl_xu_ctrl_map(chain, arg);
case UVCIOC_CTRL_QUERY:
return uvc_xu_ctrl_query(chain, arg);
default:
return -ENOTTY;
}
}
#ifdef CONFIG_COMPAT
struct uvc_xu_control_mapping32 {
u32 id;
u8 name[32];
u8 entity[16];
u8 selector;
u8 size;
u8 offset;
u32 v4l2_type;
u32 data_type;
compat_caddr_t menu_info;
u32 menu_count;
u32 reserved[4];
};
static int uvc_v4l2_get_xu_mapping(struct uvc_xu_control_mapping *kp,
const struct uvc_xu_control_mapping32 __user *up)
{
struct uvc_xu_control_mapping32 *p = (void *)kp;
compat_caddr_t info;
u32 count;
if (copy_from_user(p, up, sizeof(*p)))
return -EFAULT;
count = p->menu_count;
info = p->menu_info;
memset(kp->reserved, 0, sizeof(kp->reserved));
kp->menu_info = count ? compat_ptr(info) : NULL;
kp->menu_count = count;
return 0;
}
static int uvc_v4l2_put_xu_mapping(const struct uvc_xu_control_mapping *kp,
struct uvc_xu_control_mapping32 __user *up)
{
if (copy_to_user(up, kp, offsetof(typeof(*up), menu_info)) ||
put_user(kp->menu_count, &up->menu_count))
return -EFAULT;
if (clear_user(up->reserved, sizeof(up->reserved)))
return -EFAULT;
return 0;
}
struct uvc_xu_control_query32 {
u8 unit;
u8 selector;
u8 query;
u16 size;
compat_caddr_t data;
};
static int uvc_v4l2_get_xu_query(struct uvc_xu_control_query *kp,
const struct uvc_xu_control_query32 __user *up)
{
struct uvc_xu_control_query32 v;
if (copy_from_user(&v, up, sizeof(v)))
return -EFAULT;
*kp = (struct uvc_xu_control_query){
.unit = v.unit,
.selector = v.selector,
.query = v.query,
.size = v.size,
.data = v.size ? compat_ptr(v.data) : NULL
};
return 0;
}
static int uvc_v4l2_put_xu_query(const struct uvc_xu_control_query *kp,
struct uvc_xu_control_query32 __user *up)
{
if (copy_to_user(up, kp, offsetof(typeof(*up), data)))
return -EFAULT;
return 0;
}
#define UVCIOC_CTRL_MAP32 _IOWR('u', 0x20, struct uvc_xu_control_mapping32)
#define UVCIOC_CTRL_QUERY32 _IOWR('u', 0x21, struct uvc_xu_control_query32)
static long uvc_v4l2_compat_ioctl32(struct file *file,
unsigned int cmd, unsigned long arg)
{
struct uvc_fh *handle = file->private_data;
union {
struct uvc_xu_control_mapping xmap;
struct uvc_xu_control_query xqry;
} karg;
void __user *up = compat_ptr(arg);
long ret;
switch (cmd) {
case UVCIOC_CTRL_MAP32:
ret = uvc_v4l2_get_xu_mapping(&karg.xmap, up);
if (ret)
return ret;
ret = uvc_ioctl_xu_ctrl_map(handle->chain, &karg.xmap);
if (ret)
return ret;
ret = uvc_v4l2_put_xu_mapping(&karg.xmap, up);
if (ret)
return ret;
break;
case UVCIOC_CTRL_QUERY32:
ret = uvc_v4l2_get_xu_query(&karg.xqry, up);
if (ret)
return ret;
ret = uvc_xu_ctrl_query(handle->chain, &karg.xqry);
if (ret)
return ret;
ret = uvc_v4l2_put_xu_query(&karg.xqry, up);
if (ret)
return ret;
break;
default:
return -ENOIOCTLCMD;
}
return ret;
}
#endif
static ssize_t uvc_v4l2_read(struct file *file, char __user *data,
size_t count, loff_t *ppos)
{
struct uvc_fh *handle = file->private_data;
struct uvc_streaming *stream = handle->stream;
uvc_dbg(stream->dev, CALLS, "%s: not implemented\n", __func__);
return -EINVAL;
}
static int uvc_v4l2_mmap(struct file *file, struct vm_area_struct *vma)
{
struct uvc_fh *handle = file->private_data;
struct uvc_streaming *stream = handle->stream;
uvc_dbg(stream->dev, CALLS, "%s\n", __func__);
return uvc_queue_mmap(&stream->queue, vma);
}
static __poll_t uvc_v4l2_poll(struct file *file, poll_table *wait)
{
struct uvc_fh *handle = file->private_data;
struct uvc_streaming *stream = handle->stream;
uvc_dbg(stream->dev, CALLS, "%s\n", __func__);
return uvc_queue_poll(&stream->queue, file, wait);
}
#ifndef CONFIG_MMU
static unsigned long uvc_v4l2_get_unmapped_area(struct file *file,
unsigned long addr, unsigned long len, unsigned long pgoff,
unsigned long flags)
{
struct uvc_fh *handle = file->private_data;
struct uvc_streaming *stream = handle->stream;
uvc_dbg(stream->dev, CALLS, "%s\n", __func__);
return uvc_queue_get_unmapped_area(&stream->queue, pgoff);
}
#endif
const struct v4l2_ioctl_ops uvc_ioctl_ops = {
.vidioc_querycap = uvc_ioctl_querycap,
.vidioc_enum_fmt_vid_cap = uvc_ioctl_enum_fmt_vid_cap,
.vidioc_enum_fmt_vid_out = uvc_ioctl_enum_fmt_vid_out,
.vidioc_g_fmt_vid_cap = uvc_ioctl_g_fmt_vid_cap,
.vidioc_g_fmt_vid_out = uvc_ioctl_g_fmt_vid_out,
.vidioc_s_fmt_vid_cap = uvc_ioctl_s_fmt_vid_cap,
.vidioc_s_fmt_vid_out = uvc_ioctl_s_fmt_vid_out,
.vidioc_try_fmt_vid_cap = uvc_ioctl_try_fmt_vid_cap,
.vidioc_try_fmt_vid_out = uvc_ioctl_try_fmt_vid_out,
.vidioc_reqbufs = uvc_ioctl_reqbufs,
.vidioc_querybuf = uvc_ioctl_querybuf,
.vidioc_qbuf = uvc_ioctl_qbuf,
.vidioc_expbuf = uvc_ioctl_expbuf,
.vidioc_dqbuf = uvc_ioctl_dqbuf,
.vidioc_create_bufs = uvc_ioctl_create_bufs,
.vidioc_streamon = uvc_ioctl_streamon,
.vidioc_streamoff = uvc_ioctl_streamoff,
.vidioc_enum_input = uvc_ioctl_enum_input,
.vidioc_g_input = uvc_ioctl_g_input,
.vidioc_s_input = uvc_ioctl_s_input,
.vidioc_queryctrl = uvc_ioctl_queryctrl,
.vidioc_query_ext_ctrl = uvc_ioctl_query_ext_ctrl,
.vidioc_g_ext_ctrls = uvc_ioctl_g_ext_ctrls,
.vidioc_s_ext_ctrls = uvc_ioctl_s_ext_ctrls,
.vidioc_try_ext_ctrls = uvc_ioctl_try_ext_ctrls,
.vidioc_querymenu = uvc_ioctl_querymenu,
.vidioc_g_selection = uvc_ioctl_g_selection,
.vidioc_g_parm = uvc_ioctl_g_parm,
.vidioc_s_parm = uvc_ioctl_s_parm,
.vidioc_enum_framesizes = uvc_ioctl_enum_framesizes,
.vidioc_enum_frameintervals = uvc_ioctl_enum_frameintervals,
.vidioc_subscribe_event = uvc_ioctl_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
.vidioc_default = uvc_ioctl_default,
};
const struct v4l2_file_operations uvc_fops = {
.owner = THIS_MODULE,
.open = uvc_v4l2_open,
.release = uvc_v4l2_release,
.unlocked_ioctl = video_ioctl2,
#ifdef CONFIG_COMPAT
.compat_ioctl32 = uvc_v4l2_compat_ioctl32,
#endif
.read = uvc_v4l2_read,
.mmap = uvc_v4l2_mmap,
.poll = uvc_v4l2_poll,
#ifndef CONFIG_MMU
.get_unmapped_area = uvc_v4l2_get_unmapped_area,
#endif
};
| linux-master | drivers/media/usb/uvc/uvc_v4l2.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_driver.c -- USB Video Class driver
*
* Copyright (C) 2005-2010
* Laurent Pinchart ([email protected])
*/
#include <linux/atomic.h>
#include <linux/bits.h>
#include <linux/gpio/consumer.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/usb.h>
#include <linux/usb/uvc.h>
#include <linux/videodev2.h>
#include <linux/vmalloc.h>
#include <linux/wait.h>
#include <asm/unaligned.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include "uvcvideo.h"
#define DRIVER_AUTHOR "Laurent Pinchart " \
"<[email protected]>"
#define DRIVER_DESC "USB Video Class driver"
unsigned int uvc_clock_param = CLOCK_MONOTONIC;
unsigned int uvc_hw_timestamps_param;
unsigned int uvc_no_drop_param;
static unsigned int uvc_quirks_param = -1;
unsigned int uvc_dbg_param;
unsigned int uvc_timeout_param = UVC_CTRL_STREAMING_TIMEOUT;
/* ------------------------------------------------------------------------
* Utility functions
*/
struct usb_host_endpoint *uvc_find_endpoint(struct usb_host_interface *alts,
u8 epaddr)
{
struct usb_host_endpoint *ep;
unsigned int i;
for (i = 0; i < alts->desc.bNumEndpoints; ++i) {
ep = &alts->endpoint[i];
if (ep->desc.bEndpointAddress == epaddr)
return ep;
}
return NULL;
}
static enum v4l2_colorspace uvc_colorspace(const u8 primaries)
{
static const enum v4l2_colorspace colorprimaries[] = {
V4L2_COLORSPACE_SRGB, /* Unspecified */
V4L2_COLORSPACE_SRGB,
V4L2_COLORSPACE_470_SYSTEM_M,
V4L2_COLORSPACE_470_SYSTEM_BG,
V4L2_COLORSPACE_SMPTE170M,
V4L2_COLORSPACE_SMPTE240M,
};
if (primaries < ARRAY_SIZE(colorprimaries))
return colorprimaries[primaries];
return V4L2_COLORSPACE_SRGB; /* Reserved */
}
static enum v4l2_xfer_func uvc_xfer_func(const u8 transfer_characteristics)
{
/*
* V4L2 does not currently have definitions for all possible values of
* UVC transfer characteristics. If v4l2_xfer_func is extended with new
* values, the mapping below should be updated.
*
* Substitutions are taken from the mapping given for
* V4L2_XFER_FUNC_DEFAULT documented in videodev2.h.
*/
static const enum v4l2_xfer_func xfer_funcs[] = {
V4L2_XFER_FUNC_DEFAULT, /* Unspecified */
V4L2_XFER_FUNC_709,
V4L2_XFER_FUNC_709, /* Substitution for BT.470-2 M */
V4L2_XFER_FUNC_709, /* Substitution for BT.470-2 B, G */
V4L2_XFER_FUNC_709, /* Substitution for SMPTE 170M */
V4L2_XFER_FUNC_SMPTE240M,
V4L2_XFER_FUNC_NONE,
V4L2_XFER_FUNC_SRGB,
};
if (transfer_characteristics < ARRAY_SIZE(xfer_funcs))
return xfer_funcs[transfer_characteristics];
return V4L2_XFER_FUNC_DEFAULT; /* Reserved */
}
static enum v4l2_ycbcr_encoding uvc_ycbcr_enc(const u8 matrix_coefficients)
{
/*
* V4L2 does not currently have definitions for all possible values of
* UVC matrix coefficients. If v4l2_ycbcr_encoding is extended with new
* values, the mapping below should be updated.
*
* Substitutions are taken from the mapping given for
* V4L2_YCBCR_ENC_DEFAULT documented in videodev2.h.
*
* FCC is assumed to be close enough to 601.
*/
static const enum v4l2_ycbcr_encoding ycbcr_encs[] = {
V4L2_YCBCR_ENC_DEFAULT, /* Unspecified */
V4L2_YCBCR_ENC_709,
V4L2_YCBCR_ENC_601, /* Substitution for FCC */
V4L2_YCBCR_ENC_601, /* Substitution for BT.470-2 B, G */
V4L2_YCBCR_ENC_601,
V4L2_YCBCR_ENC_SMPTE240M,
};
if (matrix_coefficients < ARRAY_SIZE(ycbcr_encs))
return ycbcr_encs[matrix_coefficients];
return V4L2_YCBCR_ENC_DEFAULT; /* Reserved */
}
/* ------------------------------------------------------------------------
* Terminal and unit management
*/
struct uvc_entity *uvc_entity_by_id(struct uvc_device *dev, int id)
{
struct uvc_entity *entity;
list_for_each_entry(entity, &dev->entities, list) {
if (entity->id == id)
return entity;
}
return NULL;
}
static struct uvc_entity *uvc_entity_by_reference(struct uvc_device *dev,
int id, struct uvc_entity *entity)
{
unsigned int i;
if (entity == NULL)
entity = list_entry(&dev->entities, struct uvc_entity, list);
list_for_each_entry_continue(entity, &dev->entities, list) {
for (i = 0; i < entity->bNrInPins; ++i)
if (entity->baSourceID[i] == id)
return entity;
}
return NULL;
}
static struct uvc_streaming *uvc_stream_by_id(struct uvc_device *dev, int id)
{
struct uvc_streaming *stream;
list_for_each_entry(stream, &dev->streams, list) {
if (stream->header.bTerminalLink == id)
return stream;
}
return NULL;
}
/* ------------------------------------------------------------------------
* Streaming Object Management
*/
static void uvc_stream_delete(struct uvc_streaming *stream)
{
if (stream->async_wq)
destroy_workqueue(stream->async_wq);
mutex_destroy(&stream->mutex);
usb_put_intf(stream->intf);
kfree(stream->formats);
kfree(stream->header.bmaControls);
kfree(stream);
}
static struct uvc_streaming *uvc_stream_new(struct uvc_device *dev,
struct usb_interface *intf)
{
struct uvc_streaming *stream;
stream = kzalloc(sizeof(*stream), GFP_KERNEL);
if (stream == NULL)
return NULL;
mutex_init(&stream->mutex);
stream->dev = dev;
stream->intf = usb_get_intf(intf);
stream->intfnum = intf->cur_altsetting->desc.bInterfaceNumber;
/* Allocate a stream specific work queue for asynchronous tasks. */
stream->async_wq = alloc_workqueue("uvcvideo", WQ_UNBOUND | WQ_HIGHPRI,
0);
if (!stream->async_wq) {
uvc_stream_delete(stream);
return NULL;
}
return stream;
}
/* ------------------------------------------------------------------------
* Descriptors parsing
*/
static int uvc_parse_format(struct uvc_device *dev,
struct uvc_streaming *streaming, struct uvc_format *format,
struct uvc_frame *frames, u32 **intervals, const unsigned char *buffer,
int buflen)
{
struct usb_interface *intf = streaming->intf;
struct usb_host_interface *alts = intf->cur_altsetting;
const struct uvc_format_desc *fmtdesc;
struct uvc_frame *frame;
const unsigned char *start = buffer;
unsigned int width_multiplier = 1;
unsigned int interval;
unsigned int i, n;
u8 ftype;
format->type = buffer[2];
format->index = buffer[3];
format->frames = frames;
switch (buffer[2]) {
case UVC_VS_FORMAT_UNCOMPRESSED:
case UVC_VS_FORMAT_FRAME_BASED:
n = buffer[2] == UVC_VS_FORMAT_UNCOMPRESSED ? 27 : 28;
if (buflen < n) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d FORMAT error\n",
dev->udev->devnum,
alts->desc.bInterfaceNumber);
return -EINVAL;
}
/* Find the format descriptor from its GUID. */
fmtdesc = uvc_format_by_guid(&buffer[5]);
if (!fmtdesc) {
/*
* Unknown video formats are not fatal errors, the
* caller will skip this descriptor.
*/
dev_info(&streaming->intf->dev,
"Unknown video format %pUl\n", &buffer[5]);
return 0;
}
format->fcc = fmtdesc->fcc;
format->bpp = buffer[21];
/*
* Some devices report a format that doesn't match what they
* really send.
*/
if (dev->quirks & UVC_QUIRK_FORCE_Y8) {
if (format->fcc == V4L2_PIX_FMT_YUYV) {
format->fcc = V4L2_PIX_FMT_GREY;
format->bpp = 8;
width_multiplier = 2;
}
}
/* Some devices report bpp that doesn't match the format. */
if (dev->quirks & UVC_QUIRK_FORCE_BPP) {
const struct v4l2_format_info *info =
v4l2_format_info(format->fcc);
if (info) {
unsigned int div = info->hdiv * info->vdiv;
n = info->bpp[0] * div;
for (i = 1; i < info->comp_planes; i++)
n += info->bpp[i];
format->bpp = DIV_ROUND_UP(8 * n, div);
}
}
if (buffer[2] == UVC_VS_FORMAT_UNCOMPRESSED) {
ftype = UVC_VS_FRAME_UNCOMPRESSED;
} else {
ftype = UVC_VS_FRAME_FRAME_BASED;
if (buffer[27])
format->flags = UVC_FMT_FLAG_COMPRESSED;
}
break;
case UVC_VS_FORMAT_MJPEG:
if (buflen < 11) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d FORMAT error\n",
dev->udev->devnum,
alts->desc.bInterfaceNumber);
return -EINVAL;
}
format->fcc = V4L2_PIX_FMT_MJPEG;
format->flags = UVC_FMT_FLAG_COMPRESSED;
format->bpp = 0;
ftype = UVC_VS_FRAME_MJPEG;
break;
case UVC_VS_FORMAT_DV:
if (buflen < 9) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d FORMAT error\n",
dev->udev->devnum,
alts->desc.bInterfaceNumber);
return -EINVAL;
}
if ((buffer[8] & 0x7f) > 2) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d: unknown DV format %u\n",
dev->udev->devnum,
alts->desc.bInterfaceNumber, buffer[8]);
return -EINVAL;
}
format->fcc = V4L2_PIX_FMT_DV;
format->flags = UVC_FMT_FLAG_COMPRESSED | UVC_FMT_FLAG_STREAM;
format->bpp = 0;
ftype = 0;
/* Create a dummy frame descriptor. */
frame = &frames[0];
memset(frame, 0, sizeof(*frame));
frame->bFrameIntervalType = 1;
frame->dwDefaultFrameInterval = 1;
frame->dwFrameInterval = *intervals;
*(*intervals)++ = 1;
format->nframes = 1;
break;
case UVC_VS_FORMAT_MPEG2TS:
case UVC_VS_FORMAT_STREAM_BASED:
/* Not supported yet. */
default:
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d unsupported format %u\n",
dev->udev->devnum, alts->desc.bInterfaceNumber,
buffer[2]);
return -EINVAL;
}
uvc_dbg(dev, DESCR, "Found format %p4cc", &format->fcc);
buflen -= buffer[0];
buffer += buffer[0];
/*
* Parse the frame descriptors. Only uncompressed, MJPEG and frame
* based formats have frame descriptors.
*/
while (buflen > 2 && buffer[1] == USB_DT_CS_INTERFACE &&
buffer[2] == ftype) {
unsigned int maxIntervalIndex;
frame = &frames[format->nframes];
if (ftype != UVC_VS_FRAME_FRAME_BASED)
n = buflen > 25 ? buffer[25] : 0;
else
n = buflen > 21 ? buffer[21] : 0;
n = n ? n : 3;
if (buflen < 26 + 4*n) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d FRAME error\n",
dev->udev->devnum,
alts->desc.bInterfaceNumber);
return -EINVAL;
}
frame->bFrameIndex = buffer[3];
frame->bmCapabilities = buffer[4];
frame->wWidth = get_unaligned_le16(&buffer[5])
* width_multiplier;
frame->wHeight = get_unaligned_le16(&buffer[7]);
frame->dwMinBitRate = get_unaligned_le32(&buffer[9]);
frame->dwMaxBitRate = get_unaligned_le32(&buffer[13]);
if (ftype != UVC_VS_FRAME_FRAME_BASED) {
frame->dwMaxVideoFrameBufferSize =
get_unaligned_le32(&buffer[17]);
frame->dwDefaultFrameInterval =
get_unaligned_le32(&buffer[21]);
frame->bFrameIntervalType = buffer[25];
} else {
frame->dwMaxVideoFrameBufferSize = 0;
frame->dwDefaultFrameInterval =
get_unaligned_le32(&buffer[17]);
frame->bFrameIntervalType = buffer[21];
}
/*
* Copy the frame intervals.
*
* Some bogus devices report dwMinFrameInterval equal to
* dwMaxFrameInterval and have dwFrameIntervalStep set to
* zero. Setting all null intervals to 1 fixes the problem and
* some other divisions by zero that could happen.
*/
frame->dwFrameInterval = *intervals;
for (i = 0; i < n; ++i) {
interval = get_unaligned_le32(&buffer[26+4*i]);
(*intervals)[i] = interval ? interval : 1;
}
/*
* Apply more fixes, quirks and workarounds to handle incorrect
* or broken descriptors.
*/
/*
* Several UVC chipsets screw up dwMaxVideoFrameBufferSize
* completely. Observed behaviours range from setting the
* value to 1.1x the actual frame size to hardwiring the
* 16 low bits to 0. This results in a higher than necessary
* memory usage as well as a wrong image size information. For
* uncompressed formats this can be fixed by computing the
* value from the frame size.
*/
if (!(format->flags & UVC_FMT_FLAG_COMPRESSED))
frame->dwMaxVideoFrameBufferSize = format->bpp
* frame->wWidth * frame->wHeight / 8;
/*
* Clamp the default frame interval to the boundaries. A zero
* bFrameIntervalType value indicates a continuous frame
* interval range, with dwFrameInterval[0] storing the minimum
* value and dwFrameInterval[1] storing the maximum value.
*/
maxIntervalIndex = frame->bFrameIntervalType ? n - 1 : 1;
frame->dwDefaultFrameInterval =
clamp(frame->dwDefaultFrameInterval,
frame->dwFrameInterval[0],
frame->dwFrameInterval[maxIntervalIndex]);
/*
* Some devices report frame intervals that are not functional.
* If the corresponding quirk is set, restrict operation to the
* first interval only.
*/
if (dev->quirks & UVC_QUIRK_RESTRICT_FRAME_RATE) {
frame->bFrameIntervalType = 1;
(*intervals)[0] = frame->dwDefaultFrameInterval;
}
uvc_dbg(dev, DESCR, "- %ux%u (%u.%u fps)\n",
frame->wWidth, frame->wHeight,
10000000 / frame->dwDefaultFrameInterval,
(100000000 / frame->dwDefaultFrameInterval) % 10);
format->nframes++;
*intervals += n;
buflen -= buffer[0];
buffer += buffer[0];
}
if (buflen > 2 && buffer[1] == USB_DT_CS_INTERFACE &&
buffer[2] == UVC_VS_STILL_IMAGE_FRAME) {
buflen -= buffer[0];
buffer += buffer[0];
}
if (buflen > 2 && buffer[1] == USB_DT_CS_INTERFACE &&
buffer[2] == UVC_VS_COLORFORMAT) {
if (buflen < 6) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d COLORFORMAT error\n",
dev->udev->devnum,
alts->desc.bInterfaceNumber);
return -EINVAL;
}
format->colorspace = uvc_colorspace(buffer[3]);
format->xfer_func = uvc_xfer_func(buffer[4]);
format->ycbcr_enc = uvc_ycbcr_enc(buffer[5]);
buflen -= buffer[0];
buffer += buffer[0];
} else {
format->colorspace = V4L2_COLORSPACE_SRGB;
}
return buffer - start;
}
static int uvc_parse_streaming(struct uvc_device *dev,
struct usb_interface *intf)
{
struct uvc_streaming *streaming = NULL;
struct uvc_format *format;
struct uvc_frame *frame;
struct usb_host_interface *alts = &intf->altsetting[0];
const unsigned char *_buffer, *buffer = alts->extra;
int _buflen, buflen = alts->extralen;
unsigned int nformats = 0, nframes = 0, nintervals = 0;
unsigned int size, i, n, p;
u32 *interval;
u16 psize;
int ret = -EINVAL;
if (intf->cur_altsetting->desc.bInterfaceSubClass
!= UVC_SC_VIDEOSTREAMING) {
uvc_dbg(dev, DESCR,
"device %d interface %d isn't a video streaming interface\n",
dev->udev->devnum,
intf->altsetting[0].desc.bInterfaceNumber);
return -EINVAL;
}
if (usb_driver_claim_interface(&uvc_driver.driver, intf, dev)) {
uvc_dbg(dev, DESCR,
"device %d interface %d is already claimed\n",
dev->udev->devnum,
intf->altsetting[0].desc.bInterfaceNumber);
return -EINVAL;
}
streaming = uvc_stream_new(dev, intf);
if (streaming == NULL) {
usb_driver_release_interface(&uvc_driver.driver, intf);
return -ENOMEM;
}
/*
* The Pico iMage webcam has its class-specific interface descriptors
* after the endpoint descriptors.
*/
if (buflen == 0) {
for (i = 0; i < alts->desc.bNumEndpoints; ++i) {
struct usb_host_endpoint *ep = &alts->endpoint[i];
if (ep->extralen == 0)
continue;
if (ep->extralen > 2 &&
ep->extra[1] == USB_DT_CS_INTERFACE) {
uvc_dbg(dev, DESCR,
"trying extra data from endpoint %u\n",
i);
buffer = alts->endpoint[i].extra;
buflen = alts->endpoint[i].extralen;
break;
}
}
}
/* Skip the standard interface descriptors. */
while (buflen > 2 && buffer[1] != USB_DT_CS_INTERFACE) {
buflen -= buffer[0];
buffer += buffer[0];
}
if (buflen <= 2) {
uvc_dbg(dev, DESCR,
"no class-specific streaming interface descriptors found\n");
goto error;
}
/* Parse the header descriptor. */
switch (buffer[2]) {
case UVC_VS_OUTPUT_HEADER:
streaming->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
size = 9;
break;
case UVC_VS_INPUT_HEADER:
streaming->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
size = 13;
break;
default:
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d HEADER descriptor not found\n",
dev->udev->devnum, alts->desc.bInterfaceNumber);
goto error;
}
p = buflen >= 4 ? buffer[3] : 0;
n = buflen >= size ? buffer[size-1] : 0;
if (buflen < size + p*n) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d HEADER descriptor is invalid\n",
dev->udev->devnum, alts->desc.bInterfaceNumber);
goto error;
}
streaming->header.bNumFormats = p;
streaming->header.bEndpointAddress = buffer[6];
if (buffer[2] == UVC_VS_INPUT_HEADER) {
streaming->header.bmInfo = buffer[7];
streaming->header.bTerminalLink = buffer[8];
streaming->header.bStillCaptureMethod = buffer[9];
streaming->header.bTriggerSupport = buffer[10];
streaming->header.bTriggerUsage = buffer[11];
} else {
streaming->header.bTerminalLink = buffer[7];
}
streaming->header.bControlSize = n;
streaming->header.bmaControls = kmemdup(&buffer[size], p * n,
GFP_KERNEL);
if (streaming->header.bmaControls == NULL) {
ret = -ENOMEM;
goto error;
}
buflen -= buffer[0];
buffer += buffer[0];
_buffer = buffer;
_buflen = buflen;
/* Count the format and frame descriptors. */
while (_buflen > 2 && _buffer[1] == USB_DT_CS_INTERFACE) {
switch (_buffer[2]) {
case UVC_VS_FORMAT_UNCOMPRESSED:
case UVC_VS_FORMAT_MJPEG:
case UVC_VS_FORMAT_FRAME_BASED:
nformats++;
break;
case UVC_VS_FORMAT_DV:
/*
* DV format has no frame descriptor. We will create a
* dummy frame descriptor with a dummy frame interval.
*/
nformats++;
nframes++;
nintervals++;
break;
case UVC_VS_FORMAT_MPEG2TS:
case UVC_VS_FORMAT_STREAM_BASED:
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d FORMAT %u is not supported\n",
dev->udev->devnum,
alts->desc.bInterfaceNumber, _buffer[2]);
break;
case UVC_VS_FRAME_UNCOMPRESSED:
case UVC_VS_FRAME_MJPEG:
nframes++;
if (_buflen > 25)
nintervals += _buffer[25] ? _buffer[25] : 3;
break;
case UVC_VS_FRAME_FRAME_BASED:
nframes++;
if (_buflen > 21)
nintervals += _buffer[21] ? _buffer[21] : 3;
break;
}
_buflen -= _buffer[0];
_buffer += _buffer[0];
}
if (nformats == 0) {
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d has no supported formats defined\n",
dev->udev->devnum, alts->desc.bInterfaceNumber);
goto error;
}
size = nformats * sizeof(*format) + nframes * sizeof(*frame)
+ nintervals * sizeof(*interval);
format = kzalloc(size, GFP_KERNEL);
if (format == NULL) {
ret = -ENOMEM;
goto error;
}
frame = (struct uvc_frame *)&format[nformats];
interval = (u32 *)&frame[nframes];
streaming->formats = format;
streaming->nformats = 0;
/* Parse the format descriptors. */
while (buflen > 2 && buffer[1] == USB_DT_CS_INTERFACE) {
switch (buffer[2]) {
case UVC_VS_FORMAT_UNCOMPRESSED:
case UVC_VS_FORMAT_MJPEG:
case UVC_VS_FORMAT_DV:
case UVC_VS_FORMAT_FRAME_BASED:
ret = uvc_parse_format(dev, streaming, format, frame,
&interval, buffer, buflen);
if (ret < 0)
goto error;
if (!ret)
break;
streaming->nformats++;
frame += format->nframes;
format++;
buflen -= ret;
buffer += ret;
continue;
default:
break;
}
buflen -= buffer[0];
buffer += buffer[0];
}
if (buflen)
uvc_dbg(dev, DESCR,
"device %d videostreaming interface %d has %u bytes of trailing descriptor garbage\n",
dev->udev->devnum, alts->desc.bInterfaceNumber, buflen);
/* Parse the alternate settings to find the maximum bandwidth. */
for (i = 0; i < intf->num_altsetting; ++i) {
struct usb_host_endpoint *ep;
alts = &intf->altsetting[i];
ep = uvc_find_endpoint(alts,
streaming->header.bEndpointAddress);
if (ep == NULL)
continue;
psize = uvc_endpoint_max_bpi(dev->udev, ep);
if (psize > streaming->maxpsize)
streaming->maxpsize = psize;
}
list_add_tail(&streaming->list, &dev->streams);
return 0;
error:
usb_driver_release_interface(&uvc_driver.driver, intf);
uvc_stream_delete(streaming);
return ret;
}
static const u8 uvc_camera_guid[16] = UVC_GUID_UVC_CAMERA;
static const u8 uvc_gpio_guid[16] = UVC_GUID_EXT_GPIO_CONTROLLER;
static const u8 uvc_media_transport_input_guid[16] =
UVC_GUID_UVC_MEDIA_TRANSPORT_INPUT;
static const u8 uvc_processing_guid[16] = UVC_GUID_UVC_PROCESSING;
static struct uvc_entity *uvc_alloc_entity(u16 type, u16 id,
unsigned int num_pads, unsigned int extra_size)
{
struct uvc_entity *entity;
unsigned int num_inputs;
unsigned int size;
unsigned int i;
extra_size = roundup(extra_size, sizeof(*entity->pads));
if (num_pads)
num_inputs = type & UVC_TERM_OUTPUT ? num_pads : num_pads - 1;
else
num_inputs = 0;
size = sizeof(*entity) + extra_size + sizeof(*entity->pads) * num_pads
+ num_inputs;
entity = kzalloc(size, GFP_KERNEL);
if (entity == NULL)
return NULL;
entity->id = id;
entity->type = type;
/*
* Set the GUID for standard entity types. For extension units, the GUID
* is initialized by the caller.
*/
switch (type) {
case UVC_EXT_GPIO_UNIT:
memcpy(entity->guid, uvc_gpio_guid, 16);
break;
case UVC_ITT_CAMERA:
memcpy(entity->guid, uvc_camera_guid, 16);
break;
case UVC_ITT_MEDIA_TRANSPORT_INPUT:
memcpy(entity->guid, uvc_media_transport_input_guid, 16);
break;
case UVC_VC_PROCESSING_UNIT:
memcpy(entity->guid, uvc_processing_guid, 16);
break;
}
entity->num_links = 0;
entity->num_pads = num_pads;
entity->pads = ((void *)(entity + 1)) + extra_size;
for (i = 0; i < num_inputs; ++i)
entity->pads[i].flags = MEDIA_PAD_FL_SINK;
if (!UVC_ENTITY_IS_OTERM(entity) && num_pads)
entity->pads[num_pads-1].flags = MEDIA_PAD_FL_SOURCE;
entity->bNrInPins = num_inputs;
entity->baSourceID = (u8 *)(&entity->pads[num_pads]);
return entity;
}
static void uvc_entity_set_name(struct uvc_device *dev, struct uvc_entity *entity,
const char *type_name, u8 string_id)
{
int ret;
/*
* First attempt to read the entity name from the device. If the entity
* has no associated string, or if reading the string fails (most
* likely due to a buggy firmware), fall back to default names based on
* the entity type.
*/
if (string_id) {
ret = usb_string(dev->udev, string_id, entity->name,
sizeof(entity->name));
if (!ret)
return;
}
sprintf(entity->name, "%s %u", type_name, entity->id);
}
/* Parse vendor-specific extensions. */
static int uvc_parse_vendor_control(struct uvc_device *dev,
const unsigned char *buffer, int buflen)
{
struct usb_device *udev = dev->udev;
struct usb_host_interface *alts = dev->intf->cur_altsetting;
struct uvc_entity *unit;
unsigned int n, p;
int handled = 0;
switch (le16_to_cpu(dev->udev->descriptor.idVendor)) {
case 0x046d: /* Logitech */
if (buffer[1] != 0x41 || buffer[2] != 0x01)
break;
/*
* Logitech implements several vendor specific functions
* through vendor specific extension units (LXU).
*
* The LXU descriptors are similar to XU descriptors
* (see "USB Device Video Class for Video Devices", section
* 3.7.2.6 "Extension Unit Descriptor") with the following
* differences:
*
* ----------------------------------------------------------
* 0 bLength 1 Number
* Size of this descriptor, in bytes: 24+p+n*2
* ----------------------------------------------------------
* 23+p+n bmControlsType N Bitmap
* Individual bits in the set are defined:
* 0: Absolute
* 1: Relative
*
* This bitset is mapped exactly the same as bmControls.
* ----------------------------------------------------------
* 23+p+n*2 bReserved 1 Boolean
* ----------------------------------------------------------
* 24+p+n*2 iExtension 1 Index
* Index of a string descriptor that describes this
* extension unit.
* ----------------------------------------------------------
*/
p = buflen >= 22 ? buffer[21] : 0;
n = buflen >= 25 + p ? buffer[22+p] : 0;
if (buflen < 25 + p + 2*n) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d EXTENSION_UNIT error\n",
udev->devnum, alts->desc.bInterfaceNumber);
break;
}
unit = uvc_alloc_entity(UVC_VC_EXTENSION_UNIT, buffer[3],
p + 1, 2*n);
if (unit == NULL)
return -ENOMEM;
memcpy(unit->guid, &buffer[4], 16);
unit->extension.bNumControls = buffer[20];
memcpy(unit->baSourceID, &buffer[22], p);
unit->extension.bControlSize = buffer[22+p];
unit->extension.bmControls = (u8 *)unit + sizeof(*unit);
unit->extension.bmControlsType = (u8 *)unit + sizeof(*unit)
+ n;
memcpy(unit->extension.bmControls, &buffer[23+p], 2*n);
uvc_entity_set_name(dev, unit, "Extension", buffer[24+p+2*n]);
list_add_tail(&unit->list, &dev->entities);
handled = 1;
break;
}
return handled;
}
static int uvc_parse_standard_control(struct uvc_device *dev,
const unsigned char *buffer, int buflen)
{
struct usb_device *udev = dev->udev;
struct uvc_entity *unit, *term;
struct usb_interface *intf;
struct usb_host_interface *alts = dev->intf->cur_altsetting;
unsigned int i, n, p, len;
const char *type_name;
u16 type;
switch (buffer[2]) {
case UVC_VC_HEADER:
n = buflen >= 12 ? buffer[11] : 0;
if (buflen < 12 + n) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d HEADER error\n",
udev->devnum, alts->desc.bInterfaceNumber);
return -EINVAL;
}
dev->uvc_version = get_unaligned_le16(&buffer[3]);
dev->clock_frequency = get_unaligned_le32(&buffer[7]);
/* Parse all USB Video Streaming interfaces. */
for (i = 0; i < n; ++i) {
intf = usb_ifnum_to_if(udev, buffer[12+i]);
if (intf == NULL) {
uvc_dbg(dev, DESCR,
"device %d interface %d doesn't exists\n",
udev->devnum, i);
continue;
}
uvc_parse_streaming(dev, intf);
}
break;
case UVC_VC_INPUT_TERMINAL:
if (buflen < 8) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d INPUT_TERMINAL error\n",
udev->devnum, alts->desc.bInterfaceNumber);
return -EINVAL;
}
/*
* Reject invalid terminal types that would cause issues:
*
* - The high byte must be non-zero, otherwise it would be
* confused with a unit.
*
* - Bit 15 must be 0, as we use it internally as a terminal
* direction flag.
*
* Other unknown types are accepted.
*/
type = get_unaligned_le16(&buffer[4]);
if ((type & 0x7f00) == 0 || (type & 0x8000) != 0) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d INPUT_TERMINAL %d has invalid type 0x%04x, skipping\n",
udev->devnum, alts->desc.bInterfaceNumber,
buffer[3], type);
return 0;
}
n = 0;
p = 0;
len = 8;
if (type == UVC_ITT_CAMERA) {
n = buflen >= 15 ? buffer[14] : 0;
len = 15;
} else if (type == UVC_ITT_MEDIA_TRANSPORT_INPUT) {
n = buflen >= 9 ? buffer[8] : 0;
p = buflen >= 10 + n ? buffer[9+n] : 0;
len = 10;
}
if (buflen < len + n + p) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d INPUT_TERMINAL error\n",
udev->devnum, alts->desc.bInterfaceNumber);
return -EINVAL;
}
term = uvc_alloc_entity(type | UVC_TERM_INPUT, buffer[3],
1, n + p);
if (term == NULL)
return -ENOMEM;
if (UVC_ENTITY_TYPE(term) == UVC_ITT_CAMERA) {
term->camera.bControlSize = n;
term->camera.bmControls = (u8 *)term + sizeof(*term);
term->camera.wObjectiveFocalLengthMin =
get_unaligned_le16(&buffer[8]);
term->camera.wObjectiveFocalLengthMax =
get_unaligned_le16(&buffer[10]);
term->camera.wOcularFocalLength =
get_unaligned_le16(&buffer[12]);
memcpy(term->camera.bmControls, &buffer[15], n);
} else if (UVC_ENTITY_TYPE(term) ==
UVC_ITT_MEDIA_TRANSPORT_INPUT) {
term->media.bControlSize = n;
term->media.bmControls = (u8 *)term + sizeof(*term);
term->media.bTransportModeSize = p;
term->media.bmTransportModes = (u8 *)term
+ sizeof(*term) + n;
memcpy(term->media.bmControls, &buffer[9], n);
memcpy(term->media.bmTransportModes, &buffer[10+n], p);
}
if (UVC_ENTITY_TYPE(term) == UVC_ITT_CAMERA)
type_name = "Camera";
else if (UVC_ENTITY_TYPE(term) == UVC_ITT_MEDIA_TRANSPORT_INPUT)
type_name = "Media";
else
type_name = "Input";
uvc_entity_set_name(dev, term, type_name, buffer[7]);
list_add_tail(&term->list, &dev->entities);
break;
case UVC_VC_OUTPUT_TERMINAL:
if (buflen < 9) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d OUTPUT_TERMINAL error\n",
udev->devnum, alts->desc.bInterfaceNumber);
return -EINVAL;
}
/*
* Make sure the terminal type MSB is not null, otherwise it
* could be confused with a unit.
*/
type = get_unaligned_le16(&buffer[4]);
if ((type & 0xff00) == 0) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d OUTPUT_TERMINAL %d has invalid type 0x%04x, skipping\n",
udev->devnum, alts->desc.bInterfaceNumber,
buffer[3], type);
return 0;
}
term = uvc_alloc_entity(type | UVC_TERM_OUTPUT, buffer[3],
1, 0);
if (term == NULL)
return -ENOMEM;
memcpy(term->baSourceID, &buffer[7], 1);
uvc_entity_set_name(dev, term, "Output", buffer[8]);
list_add_tail(&term->list, &dev->entities);
break;
case UVC_VC_SELECTOR_UNIT:
p = buflen >= 5 ? buffer[4] : 0;
if (buflen < 5 || buflen < 6 + p) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d SELECTOR_UNIT error\n",
udev->devnum, alts->desc.bInterfaceNumber);
return -EINVAL;
}
unit = uvc_alloc_entity(buffer[2], buffer[3], p + 1, 0);
if (unit == NULL)
return -ENOMEM;
memcpy(unit->baSourceID, &buffer[5], p);
uvc_entity_set_name(dev, unit, "Selector", buffer[5+p]);
list_add_tail(&unit->list, &dev->entities);
break;
case UVC_VC_PROCESSING_UNIT:
n = buflen >= 8 ? buffer[7] : 0;
p = dev->uvc_version >= 0x0110 ? 10 : 9;
if (buflen < p + n) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d PROCESSING_UNIT error\n",
udev->devnum, alts->desc.bInterfaceNumber);
return -EINVAL;
}
unit = uvc_alloc_entity(buffer[2], buffer[3], 2, n);
if (unit == NULL)
return -ENOMEM;
memcpy(unit->baSourceID, &buffer[4], 1);
unit->processing.wMaxMultiplier =
get_unaligned_le16(&buffer[5]);
unit->processing.bControlSize = buffer[7];
unit->processing.bmControls = (u8 *)unit + sizeof(*unit);
memcpy(unit->processing.bmControls, &buffer[8], n);
if (dev->uvc_version >= 0x0110)
unit->processing.bmVideoStandards = buffer[9+n];
uvc_entity_set_name(dev, unit, "Processing", buffer[8+n]);
list_add_tail(&unit->list, &dev->entities);
break;
case UVC_VC_EXTENSION_UNIT:
p = buflen >= 22 ? buffer[21] : 0;
n = buflen >= 24 + p ? buffer[22+p] : 0;
if (buflen < 24 + p + n) {
uvc_dbg(dev, DESCR,
"device %d videocontrol interface %d EXTENSION_UNIT error\n",
udev->devnum, alts->desc.bInterfaceNumber);
return -EINVAL;
}
unit = uvc_alloc_entity(buffer[2], buffer[3], p + 1, n);
if (unit == NULL)
return -ENOMEM;
memcpy(unit->guid, &buffer[4], 16);
unit->extension.bNumControls = buffer[20];
memcpy(unit->baSourceID, &buffer[22], p);
unit->extension.bControlSize = buffer[22+p];
unit->extension.bmControls = (u8 *)unit + sizeof(*unit);
memcpy(unit->extension.bmControls, &buffer[23+p], n);
uvc_entity_set_name(dev, unit, "Extension", buffer[23+p+n]);
list_add_tail(&unit->list, &dev->entities);
break;
default:
uvc_dbg(dev, DESCR,
"Found an unknown CS_INTERFACE descriptor (%u)\n",
buffer[2]);
break;
}
return 0;
}
static int uvc_parse_control(struct uvc_device *dev)
{
struct usb_host_interface *alts = dev->intf->cur_altsetting;
const unsigned char *buffer = alts->extra;
int buflen = alts->extralen;
int ret;
/*
* Parse the default alternate setting only, as the UVC specification
* defines a single alternate setting, the default alternate setting
* zero.
*/
while (buflen > 2) {
if (uvc_parse_vendor_control(dev, buffer, buflen) ||
buffer[1] != USB_DT_CS_INTERFACE)
goto next_descriptor;
ret = uvc_parse_standard_control(dev, buffer, buflen);
if (ret < 0)
return ret;
next_descriptor:
buflen -= buffer[0];
buffer += buffer[0];
}
/*
* Check if the optional status endpoint is present. Built-in iSight
* webcams have an interrupt endpoint but spit proprietary data that
* don't conform to the UVC status endpoint messages. Don't try to
* handle the interrupt endpoint for those cameras.
*/
if (alts->desc.bNumEndpoints == 1 &&
!(dev->quirks & UVC_QUIRK_BUILTIN_ISIGHT)) {
struct usb_host_endpoint *ep = &alts->endpoint[0];
struct usb_endpoint_descriptor *desc = &ep->desc;
if (usb_endpoint_is_int_in(desc) &&
le16_to_cpu(desc->wMaxPacketSize) >= 8 &&
desc->bInterval != 0) {
uvc_dbg(dev, DESCR,
"Found a Status endpoint (addr %02x)\n",
desc->bEndpointAddress);
dev->int_ep = ep;
}
}
return 0;
}
/* -----------------------------------------------------------------------------
* Privacy GPIO
*/
static void uvc_gpio_event(struct uvc_device *dev)
{
struct uvc_entity *unit = dev->gpio_unit;
struct uvc_video_chain *chain;
u8 new_val;
if (!unit)
return;
new_val = gpiod_get_value_cansleep(unit->gpio.gpio_privacy);
/* GPIO entities are always on the first chain. */
chain = list_first_entry(&dev->chains, struct uvc_video_chain, list);
uvc_ctrl_status_event(chain, unit->controls, &new_val);
}
static int uvc_gpio_get_cur(struct uvc_device *dev, struct uvc_entity *entity,
u8 cs, void *data, u16 size)
{
if (cs != UVC_CT_PRIVACY_CONTROL || size < 1)
return -EINVAL;
*(u8 *)data = gpiod_get_value_cansleep(entity->gpio.gpio_privacy);
return 0;
}
static int uvc_gpio_get_info(struct uvc_device *dev, struct uvc_entity *entity,
u8 cs, u8 *caps)
{
if (cs != UVC_CT_PRIVACY_CONTROL)
return -EINVAL;
*caps = UVC_CONTROL_CAP_GET | UVC_CONTROL_CAP_AUTOUPDATE;
return 0;
}
static irqreturn_t uvc_gpio_irq(int irq, void *data)
{
struct uvc_device *dev = data;
uvc_gpio_event(dev);
return IRQ_HANDLED;
}
static int uvc_gpio_parse(struct uvc_device *dev)
{
struct uvc_entity *unit;
struct gpio_desc *gpio_privacy;
int irq;
gpio_privacy = devm_gpiod_get_optional(&dev->udev->dev, "privacy",
GPIOD_IN);
if (IS_ERR_OR_NULL(gpio_privacy))
return PTR_ERR_OR_ZERO(gpio_privacy);
irq = gpiod_to_irq(gpio_privacy);
if (irq < 0)
return dev_err_probe(&dev->udev->dev, irq,
"No IRQ for privacy GPIO\n");
unit = uvc_alloc_entity(UVC_EXT_GPIO_UNIT, UVC_EXT_GPIO_UNIT_ID, 0, 1);
if (!unit)
return -ENOMEM;
unit->gpio.gpio_privacy = gpio_privacy;
unit->gpio.irq = irq;
unit->gpio.bControlSize = 1;
unit->gpio.bmControls = (u8 *)unit + sizeof(*unit);
unit->gpio.bmControls[0] = 1;
unit->get_cur = uvc_gpio_get_cur;
unit->get_info = uvc_gpio_get_info;
strscpy(unit->name, "GPIO", sizeof(unit->name));
list_add_tail(&unit->list, &dev->entities);
dev->gpio_unit = unit;
return 0;
}
static int uvc_gpio_init_irq(struct uvc_device *dev)
{
struct uvc_entity *unit = dev->gpio_unit;
if (!unit || unit->gpio.irq < 0)
return 0;
return devm_request_threaded_irq(&dev->udev->dev, unit->gpio.irq, NULL,
uvc_gpio_irq,
IRQF_ONESHOT | IRQF_TRIGGER_FALLING |
IRQF_TRIGGER_RISING,
"uvc_privacy_gpio", dev);
}
/* ------------------------------------------------------------------------
* UVC device scan
*/
/*
* Scan the UVC descriptors to locate a chain starting at an Output Terminal
* and containing the following units:
*
* - one or more Output Terminals (USB Streaming or Display)
* - zero or one Processing Unit
* - zero, one or more single-input Selector Units
* - zero or one multiple-input Selector Units, provided all inputs are
* connected to input terminals
* - zero, one or mode single-input Extension Units
* - one or more Input Terminals (Camera, External or USB Streaming)
*
* The terminal and units must match on of the following structures:
*
* ITT_*(0) -> +---------+ +---------+ +---------+ -> TT_STREAMING(0)
* ... | SU{0,1} | -> | PU{0,1} | -> | XU{0,n} | ...
* ITT_*(n) -> +---------+ +---------+ +---------+ -> TT_STREAMING(n)
*
* +---------+ +---------+ -> OTT_*(0)
* TT_STREAMING -> | PU{0,1} | -> | XU{0,n} | ...
* +---------+ +---------+ -> OTT_*(n)
*
* The Processing Unit and Extension Units can be in any order. Additional
* Extension Units connected to the main chain as single-unit branches are
* also supported. Single-input Selector Units are ignored.
*/
static int uvc_scan_chain_entity(struct uvc_video_chain *chain,
struct uvc_entity *entity)
{
switch (UVC_ENTITY_TYPE(entity)) {
case UVC_VC_EXTENSION_UNIT:
uvc_dbg_cont(PROBE, " <- XU %d", entity->id);
if (entity->bNrInPins != 1) {
uvc_dbg(chain->dev, DESCR,
"Extension unit %d has more than 1 input pin\n",
entity->id);
return -1;
}
break;
case UVC_VC_PROCESSING_UNIT:
uvc_dbg_cont(PROBE, " <- PU %d", entity->id);
if (chain->processing != NULL) {
uvc_dbg(chain->dev, DESCR,
"Found multiple Processing Units in chain\n");
return -1;
}
chain->processing = entity;
break;
case UVC_VC_SELECTOR_UNIT:
uvc_dbg_cont(PROBE, " <- SU %d", entity->id);
/* Single-input selector units are ignored. */
if (entity->bNrInPins == 1)
break;
if (chain->selector != NULL) {
uvc_dbg(chain->dev, DESCR,
"Found multiple Selector Units in chain\n");
return -1;
}
chain->selector = entity;
break;
case UVC_ITT_VENDOR_SPECIFIC:
case UVC_ITT_CAMERA:
case UVC_ITT_MEDIA_TRANSPORT_INPUT:
uvc_dbg_cont(PROBE, " <- IT %d\n", entity->id);
break;
case UVC_OTT_VENDOR_SPECIFIC:
case UVC_OTT_DISPLAY:
case UVC_OTT_MEDIA_TRANSPORT_OUTPUT:
uvc_dbg_cont(PROBE, " OT %d", entity->id);
break;
case UVC_TT_STREAMING:
if (UVC_ENTITY_IS_ITERM(entity))
uvc_dbg_cont(PROBE, " <- IT %d\n", entity->id);
else
uvc_dbg_cont(PROBE, " OT %d", entity->id);
break;
default:
uvc_dbg(chain->dev, DESCR,
"Unsupported entity type 0x%04x found in chain\n",
UVC_ENTITY_TYPE(entity));
return -1;
}
list_add_tail(&entity->chain, &chain->entities);
return 0;
}
static int uvc_scan_chain_forward(struct uvc_video_chain *chain,
struct uvc_entity *entity, struct uvc_entity *prev)
{
struct uvc_entity *forward;
int found;
/* Forward scan */
forward = NULL;
found = 0;
while (1) {
forward = uvc_entity_by_reference(chain->dev, entity->id,
forward);
if (forward == NULL)
break;
if (forward == prev)
continue;
if (forward->chain.next || forward->chain.prev) {
uvc_dbg(chain->dev, DESCR,
"Found reference to entity %d already in chain\n",
forward->id);
return -EINVAL;
}
switch (UVC_ENTITY_TYPE(forward)) {
case UVC_VC_EXTENSION_UNIT:
if (forward->bNrInPins != 1) {
uvc_dbg(chain->dev, DESCR,
"Extension unit %d has more than 1 input pin\n",
forward->id);
return -EINVAL;
}
/*
* Some devices reference an output terminal as the
* source of extension units. This is incorrect, as
* output terminals only have an input pin, and thus
* can't be connected to any entity in the forward
* direction. The resulting topology would cause issues
* when registering the media controller graph. To
* avoid this problem, connect the extension unit to
* the source of the output terminal instead.
*/
if (UVC_ENTITY_IS_OTERM(entity)) {
struct uvc_entity *source;
source = uvc_entity_by_id(chain->dev,
entity->baSourceID[0]);
if (!source) {
uvc_dbg(chain->dev, DESCR,
"Can't connect extension unit %u in chain\n",
forward->id);
break;
}
forward->baSourceID[0] = source->id;
}
list_add_tail(&forward->chain, &chain->entities);
if (!found)
uvc_dbg_cont(PROBE, " (->");
uvc_dbg_cont(PROBE, " XU %d", forward->id);
found = 1;
break;
case UVC_OTT_VENDOR_SPECIFIC:
case UVC_OTT_DISPLAY:
case UVC_OTT_MEDIA_TRANSPORT_OUTPUT:
case UVC_TT_STREAMING:
if (UVC_ENTITY_IS_ITERM(forward)) {
uvc_dbg(chain->dev, DESCR,
"Unsupported input terminal %u\n",
forward->id);
return -EINVAL;
}
if (UVC_ENTITY_IS_OTERM(entity)) {
uvc_dbg(chain->dev, DESCR,
"Unsupported connection between output terminals %u and %u\n",
entity->id, forward->id);
break;
}
list_add_tail(&forward->chain, &chain->entities);
if (!found)
uvc_dbg_cont(PROBE, " (->");
uvc_dbg_cont(PROBE, " OT %d", forward->id);
found = 1;
break;
}
}
if (found)
uvc_dbg_cont(PROBE, ")");
return 0;
}
static int uvc_scan_chain_backward(struct uvc_video_chain *chain,
struct uvc_entity **_entity)
{
struct uvc_entity *entity = *_entity;
struct uvc_entity *term;
int id = -EINVAL, i;
switch (UVC_ENTITY_TYPE(entity)) {
case UVC_VC_EXTENSION_UNIT:
case UVC_VC_PROCESSING_UNIT:
id = entity->baSourceID[0];
break;
case UVC_VC_SELECTOR_UNIT:
/* Single-input selector units are ignored. */
if (entity->bNrInPins == 1) {
id = entity->baSourceID[0];
break;
}
uvc_dbg_cont(PROBE, " <- IT");
chain->selector = entity;
for (i = 0; i < entity->bNrInPins; ++i) {
id = entity->baSourceID[i];
term = uvc_entity_by_id(chain->dev, id);
if (term == NULL || !UVC_ENTITY_IS_ITERM(term)) {
uvc_dbg(chain->dev, DESCR,
"Selector unit %d input %d isn't connected to an input terminal\n",
entity->id, i);
return -1;
}
if (term->chain.next || term->chain.prev) {
uvc_dbg(chain->dev, DESCR,
"Found reference to entity %d already in chain\n",
term->id);
return -EINVAL;
}
uvc_dbg_cont(PROBE, " %d", term->id);
list_add_tail(&term->chain, &chain->entities);
uvc_scan_chain_forward(chain, term, entity);
}
uvc_dbg_cont(PROBE, "\n");
id = 0;
break;
case UVC_ITT_VENDOR_SPECIFIC:
case UVC_ITT_CAMERA:
case UVC_ITT_MEDIA_TRANSPORT_INPUT:
case UVC_OTT_VENDOR_SPECIFIC:
case UVC_OTT_DISPLAY:
case UVC_OTT_MEDIA_TRANSPORT_OUTPUT:
case UVC_TT_STREAMING:
id = UVC_ENTITY_IS_OTERM(entity) ? entity->baSourceID[0] : 0;
break;
}
if (id <= 0) {
*_entity = NULL;
return id;
}
entity = uvc_entity_by_id(chain->dev, id);
if (entity == NULL) {
uvc_dbg(chain->dev, DESCR,
"Found reference to unknown entity %d\n", id);
return -EINVAL;
}
*_entity = entity;
return 0;
}
static int uvc_scan_chain(struct uvc_video_chain *chain,
struct uvc_entity *term)
{
struct uvc_entity *entity, *prev;
uvc_dbg(chain->dev, PROBE, "Scanning UVC chain:");
entity = term;
prev = NULL;
while (entity != NULL) {
/* Entity must not be part of an existing chain */
if (entity->chain.next || entity->chain.prev) {
uvc_dbg(chain->dev, DESCR,
"Found reference to entity %d already in chain\n",
entity->id);
return -EINVAL;
}
/* Process entity */
if (uvc_scan_chain_entity(chain, entity) < 0)
return -EINVAL;
/* Forward scan */
if (uvc_scan_chain_forward(chain, entity, prev) < 0)
return -EINVAL;
/* Backward scan */
prev = entity;
if (uvc_scan_chain_backward(chain, &entity) < 0)
return -EINVAL;
}
return 0;
}
static unsigned int uvc_print_terms(struct list_head *terms, u16 dir,
char *buffer)
{
struct uvc_entity *term;
unsigned int nterms = 0;
char *p = buffer;
list_for_each_entry(term, terms, chain) {
if (!UVC_ENTITY_IS_TERM(term) ||
UVC_TERM_DIRECTION(term) != dir)
continue;
if (nterms)
p += sprintf(p, ",");
if (++nterms >= 4) {
p += sprintf(p, "...");
break;
}
p += sprintf(p, "%u", term->id);
}
return p - buffer;
}
static const char *uvc_print_chain(struct uvc_video_chain *chain)
{
static char buffer[43];
char *p = buffer;
p += uvc_print_terms(&chain->entities, UVC_TERM_INPUT, p);
p += sprintf(p, " -> ");
uvc_print_terms(&chain->entities, UVC_TERM_OUTPUT, p);
return buffer;
}
static struct uvc_video_chain *uvc_alloc_chain(struct uvc_device *dev)
{
struct uvc_video_chain *chain;
chain = kzalloc(sizeof(*chain), GFP_KERNEL);
if (chain == NULL)
return NULL;
INIT_LIST_HEAD(&chain->entities);
mutex_init(&chain->ctrl_mutex);
chain->dev = dev;
v4l2_prio_init(&chain->prio);
return chain;
}
/*
* Fallback heuristic for devices that don't connect units and terminals in a
* valid chain.
*
* Some devices have invalid baSourceID references, causing uvc_scan_chain()
* to fail, but if we just take the entities we can find and put them together
* in the most sensible chain we can think of, turns out they do work anyway.
* Note: This heuristic assumes there is a single chain.
*
* At the time of writing, devices known to have such a broken chain are
* - Acer Integrated Camera (5986:055a)
* - Realtek rtl157a7 (0bda:57a7)
*/
static int uvc_scan_fallback(struct uvc_device *dev)
{
struct uvc_video_chain *chain;
struct uvc_entity *iterm = NULL;
struct uvc_entity *oterm = NULL;
struct uvc_entity *entity;
struct uvc_entity *prev;
/*
* Start by locating the input and output terminals. We only support
* devices with exactly one of each for now.
*/
list_for_each_entry(entity, &dev->entities, list) {
if (UVC_ENTITY_IS_ITERM(entity)) {
if (iterm)
return -EINVAL;
iterm = entity;
}
if (UVC_ENTITY_IS_OTERM(entity)) {
if (oterm)
return -EINVAL;
oterm = entity;
}
}
if (iterm == NULL || oterm == NULL)
return -EINVAL;
/* Allocate the chain and fill it. */
chain = uvc_alloc_chain(dev);
if (chain == NULL)
return -ENOMEM;
if (uvc_scan_chain_entity(chain, oterm) < 0)
goto error;
prev = oterm;
/*
* Add all Processing and Extension Units with two pads. The order
* doesn't matter much, use reverse list traversal to connect units in
* UVC descriptor order as we build the chain from output to input. This
* leads to units appearing in the order meant by the manufacturer for
* the cameras known to require this heuristic.
*/
list_for_each_entry_reverse(entity, &dev->entities, list) {
if (entity->type != UVC_VC_PROCESSING_UNIT &&
entity->type != UVC_VC_EXTENSION_UNIT)
continue;
if (entity->num_pads != 2)
continue;
if (uvc_scan_chain_entity(chain, entity) < 0)
goto error;
prev->baSourceID[0] = entity->id;
prev = entity;
}
if (uvc_scan_chain_entity(chain, iterm) < 0)
goto error;
prev->baSourceID[0] = iterm->id;
list_add_tail(&chain->list, &dev->chains);
uvc_dbg(dev, PROBE, "Found a video chain by fallback heuristic (%s)\n",
uvc_print_chain(chain));
return 0;
error:
kfree(chain);
return -EINVAL;
}
/*
* Scan the device for video chains and register video devices.
*
* Chains are scanned starting at their output terminals and walked backwards.
*/
static int uvc_scan_device(struct uvc_device *dev)
{
struct uvc_video_chain *chain;
struct uvc_entity *term;
list_for_each_entry(term, &dev->entities, list) {
if (!UVC_ENTITY_IS_OTERM(term))
continue;
/*
* If the terminal is already included in a chain, skip it.
* This can happen for chains that have multiple output
* terminals, where all output terminals beside the first one
* will be inserted in the chain in forward scans.
*/
if (term->chain.next || term->chain.prev)
continue;
chain = uvc_alloc_chain(dev);
if (chain == NULL)
return -ENOMEM;
term->flags |= UVC_ENTITY_FLAG_DEFAULT;
if (uvc_scan_chain(chain, term) < 0) {
kfree(chain);
continue;
}
uvc_dbg(dev, PROBE, "Found a valid video chain (%s)\n",
uvc_print_chain(chain));
list_add_tail(&chain->list, &dev->chains);
}
if (list_empty(&dev->chains))
uvc_scan_fallback(dev);
if (list_empty(&dev->chains)) {
dev_info(&dev->udev->dev, "No valid video chain found.\n");
return -1;
}
/* Add GPIO entity to the first chain. */
if (dev->gpio_unit) {
chain = list_first_entry(&dev->chains,
struct uvc_video_chain, list);
list_add_tail(&dev->gpio_unit->chain, &chain->entities);
}
return 0;
}
/* ------------------------------------------------------------------------
* Video device registration and unregistration
*/
/*
* Delete the UVC device.
*
* Called by the kernel when the last reference to the uvc_device structure
* is released.
*
* As this function is called after or during disconnect(), all URBs have
* already been cancelled by the USB core. There is no need to kill the
* interrupt URB manually.
*/
static void uvc_delete(struct kref *kref)
{
struct uvc_device *dev = container_of(kref, struct uvc_device, ref);
struct list_head *p, *n;
uvc_status_cleanup(dev);
uvc_ctrl_cleanup_device(dev);
usb_put_intf(dev->intf);
usb_put_dev(dev->udev);
#ifdef CONFIG_MEDIA_CONTROLLER
media_device_cleanup(&dev->mdev);
#endif
list_for_each_safe(p, n, &dev->chains) {
struct uvc_video_chain *chain;
chain = list_entry(p, struct uvc_video_chain, list);
kfree(chain);
}
list_for_each_safe(p, n, &dev->entities) {
struct uvc_entity *entity;
entity = list_entry(p, struct uvc_entity, list);
#ifdef CONFIG_MEDIA_CONTROLLER
uvc_mc_cleanup_entity(entity);
#endif
kfree(entity);
}
list_for_each_safe(p, n, &dev->streams) {
struct uvc_streaming *streaming;
streaming = list_entry(p, struct uvc_streaming, list);
usb_driver_release_interface(&uvc_driver.driver,
streaming->intf);
uvc_stream_delete(streaming);
}
kfree(dev);
}
static void uvc_release(struct video_device *vdev)
{
struct uvc_streaming *stream = video_get_drvdata(vdev);
struct uvc_device *dev = stream->dev;
kref_put(&dev->ref, uvc_delete);
}
/*
* Unregister the video devices.
*/
static void uvc_unregister_video(struct uvc_device *dev)
{
struct uvc_streaming *stream;
list_for_each_entry(stream, &dev->streams, list) {
if (!video_is_registered(&stream->vdev))
continue;
video_unregister_device(&stream->vdev);
video_unregister_device(&stream->meta.vdev);
uvc_debugfs_cleanup_stream(stream);
}
uvc_status_unregister(dev);
if (dev->vdev.dev)
v4l2_device_unregister(&dev->vdev);
#ifdef CONFIG_MEDIA_CONTROLLER
if (media_devnode_is_registered(dev->mdev.devnode))
media_device_unregister(&dev->mdev);
#endif
}
int uvc_register_video_device(struct uvc_device *dev,
struct uvc_streaming *stream,
struct video_device *vdev,
struct uvc_video_queue *queue,
enum v4l2_buf_type type,
const struct v4l2_file_operations *fops,
const struct v4l2_ioctl_ops *ioctl_ops)
{
int ret;
/* Initialize the video buffers queue. */
ret = uvc_queue_init(queue, type, !uvc_no_drop_param);
if (ret)
return ret;
/* Register the device with V4L. */
/*
* We already hold a reference to dev->udev. The video device will be
* unregistered before the reference is released, so we don't need to
* get another one.
*/
vdev->v4l2_dev = &dev->vdev;
vdev->fops = fops;
vdev->ioctl_ops = ioctl_ops;
vdev->release = uvc_release;
vdev->prio = &stream->chain->prio;
if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
vdev->vfl_dir = VFL_DIR_TX;
else
vdev->vfl_dir = VFL_DIR_RX;
switch (type) {
case V4L2_BUF_TYPE_VIDEO_CAPTURE:
default:
vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
break;
case V4L2_BUF_TYPE_VIDEO_OUTPUT:
vdev->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING;
break;
case V4L2_BUF_TYPE_META_CAPTURE:
vdev->device_caps = V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING;
break;
}
strscpy(vdev->name, dev->name, sizeof(vdev->name));
/*
* Set the driver data before calling video_register_device, otherwise
* the file open() handler might race us.
*/
video_set_drvdata(vdev, stream);
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret < 0) {
dev_err(&stream->intf->dev,
"Failed to register %s device (%d).\n",
v4l2_type_names[type], ret);
return ret;
}
kref_get(&dev->ref);
return 0;
}
static int uvc_register_video(struct uvc_device *dev,
struct uvc_streaming *stream)
{
int ret;
/* Initialize the streaming interface with default parameters. */
ret = uvc_video_init(stream);
if (ret < 0) {
dev_err(&stream->intf->dev,
"Failed to initialize the device (%d).\n", ret);
return ret;
}
if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
stream->chain->caps |= V4L2_CAP_VIDEO_CAPTURE
| V4L2_CAP_META_CAPTURE;
else
stream->chain->caps |= V4L2_CAP_VIDEO_OUTPUT;
uvc_debugfs_init_stream(stream);
/* Register the device with V4L. */
return uvc_register_video_device(dev, stream, &stream->vdev,
&stream->queue, stream->type,
&uvc_fops, &uvc_ioctl_ops);
}
/*
* Register all video devices in all chains.
*/
static int uvc_register_terms(struct uvc_device *dev,
struct uvc_video_chain *chain)
{
struct uvc_streaming *stream;
struct uvc_entity *term;
int ret;
list_for_each_entry(term, &chain->entities, chain) {
if (UVC_ENTITY_TYPE(term) != UVC_TT_STREAMING)
continue;
stream = uvc_stream_by_id(dev, term->id);
if (stream == NULL) {
dev_info(&dev->udev->dev,
"No streaming interface found for terminal %u.",
term->id);
continue;
}
stream->chain = chain;
ret = uvc_register_video(dev, stream);
if (ret < 0)
return ret;
/*
* Register a metadata node, but ignore a possible failure,
* complete registration of video nodes anyway.
*/
uvc_meta_register(stream);
term->vdev = &stream->vdev;
}
return 0;
}
static int uvc_register_chains(struct uvc_device *dev)
{
struct uvc_video_chain *chain;
int ret;
list_for_each_entry(chain, &dev->chains, list) {
ret = uvc_register_terms(dev, chain);
if (ret < 0)
return ret;
#ifdef CONFIG_MEDIA_CONTROLLER
ret = uvc_mc_register_entities(chain);
if (ret < 0)
dev_info(&dev->udev->dev,
"Failed to register entities (%d).\n", ret);
#endif
}
return 0;
}
/* ------------------------------------------------------------------------
* USB probe, disconnect, suspend and resume
*/
static const struct uvc_device_info uvc_quirk_none = { 0 };
static int uvc_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct usb_device *udev = interface_to_usbdev(intf);
struct uvc_device *dev;
const struct uvc_device_info *info =
(const struct uvc_device_info *)id->driver_info;
int function;
int ret;
/* Allocate memory for the device and initialize it. */
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (dev == NULL)
return -ENOMEM;
INIT_LIST_HEAD(&dev->entities);
INIT_LIST_HEAD(&dev->chains);
INIT_LIST_HEAD(&dev->streams);
kref_init(&dev->ref);
atomic_set(&dev->nmappings, 0);
mutex_init(&dev->lock);
dev->udev = usb_get_dev(udev);
dev->intf = usb_get_intf(intf);
dev->intfnum = intf->cur_altsetting->desc.bInterfaceNumber;
dev->info = info ? info : &uvc_quirk_none;
dev->quirks = uvc_quirks_param == -1
? dev->info->quirks : uvc_quirks_param;
if (id->idVendor && id->idProduct)
uvc_dbg(dev, PROBE, "Probing known UVC device %s (%04x:%04x)\n",
udev->devpath, id->idVendor, id->idProduct);
else
uvc_dbg(dev, PROBE, "Probing generic UVC device %s\n",
udev->devpath);
if (udev->product != NULL)
strscpy(dev->name, udev->product, sizeof(dev->name));
else
snprintf(dev->name, sizeof(dev->name),
"UVC Camera (%04x:%04x)",
le16_to_cpu(udev->descriptor.idVendor),
le16_to_cpu(udev->descriptor.idProduct));
/*
* Add iFunction or iInterface to names when available as additional
* distinguishers between interfaces. iFunction is prioritized over
* iInterface which matches Windows behavior at the point of writing.
*/
if (intf->intf_assoc && intf->intf_assoc->iFunction != 0)
function = intf->intf_assoc->iFunction;
else
function = intf->cur_altsetting->desc.iInterface;
if (function != 0) {
size_t len;
strlcat(dev->name, ": ", sizeof(dev->name));
len = strlen(dev->name);
usb_string(udev, function, dev->name + len,
sizeof(dev->name) - len);
}
/* Initialize the media device. */
#ifdef CONFIG_MEDIA_CONTROLLER
dev->mdev.dev = &intf->dev;
strscpy(dev->mdev.model, dev->name, sizeof(dev->mdev.model));
if (udev->serial)
strscpy(dev->mdev.serial, udev->serial,
sizeof(dev->mdev.serial));
usb_make_path(udev, dev->mdev.bus_info, sizeof(dev->mdev.bus_info));
dev->mdev.hw_revision = le16_to_cpu(udev->descriptor.bcdDevice);
media_device_init(&dev->mdev);
dev->vdev.mdev = &dev->mdev;
#endif
/* Parse the Video Class control descriptor. */
if (uvc_parse_control(dev) < 0) {
uvc_dbg(dev, PROBE, "Unable to parse UVC descriptors\n");
goto error;
}
/* Parse the associated GPIOs. */
if (uvc_gpio_parse(dev) < 0) {
uvc_dbg(dev, PROBE, "Unable to parse UVC GPIOs\n");
goto error;
}
dev_info(&dev->udev->dev, "Found UVC %u.%02x device %s (%04x:%04x)\n",
dev->uvc_version >> 8, dev->uvc_version & 0xff,
udev->product ? udev->product : "<unnamed>",
le16_to_cpu(udev->descriptor.idVendor),
le16_to_cpu(udev->descriptor.idProduct));
if (dev->quirks != dev->info->quirks) {
dev_info(&dev->udev->dev,
"Forcing device quirks to 0x%x by module parameter for testing purpose.\n",
dev->quirks);
dev_info(&dev->udev->dev,
"Please report required quirks to the linux-media mailing list.\n");
}
if (dev->info->uvc_version) {
dev->uvc_version = dev->info->uvc_version;
dev_info(&dev->udev->dev, "Forcing UVC version to %u.%02x\n",
dev->uvc_version >> 8, dev->uvc_version & 0xff);
}
/* Register the V4L2 device. */
if (v4l2_device_register(&intf->dev, &dev->vdev) < 0)
goto error;
/* Scan the device for video chains. */
if (uvc_scan_device(dev) < 0)
goto error;
/* Initialize controls. */
if (uvc_ctrl_init_device(dev) < 0)
goto error;
/* Register video device nodes. */
if (uvc_register_chains(dev) < 0)
goto error;
#ifdef CONFIG_MEDIA_CONTROLLER
/* Register the media device node */
if (media_device_register(&dev->mdev) < 0)
goto error;
#endif
/* Save our data pointer in the interface data. */
usb_set_intfdata(intf, dev);
/* Initialize the interrupt URB. */
ret = uvc_status_init(dev);
if (ret < 0) {
dev_info(&dev->udev->dev,
"Unable to initialize the status endpoint (%d), status interrupt will not be supported.\n",
ret);
}
ret = uvc_gpio_init_irq(dev);
if (ret < 0) {
dev_err(&dev->udev->dev,
"Unable to request privacy GPIO IRQ (%d)\n", ret);
goto error;
}
uvc_dbg(dev, PROBE, "UVC device initialized\n");
usb_enable_autosuspend(udev);
return 0;
error:
uvc_unregister_video(dev);
kref_put(&dev->ref, uvc_delete);
return -ENODEV;
}
static void uvc_disconnect(struct usb_interface *intf)
{
struct uvc_device *dev = usb_get_intfdata(intf);
/*
* Set the USB interface data to NULL. This can be done outside the
* lock, as there's no other reader.
*/
usb_set_intfdata(intf, NULL);
if (intf->cur_altsetting->desc.bInterfaceSubClass ==
UVC_SC_VIDEOSTREAMING)
return;
uvc_unregister_video(dev);
kref_put(&dev->ref, uvc_delete);
}
static int uvc_suspend(struct usb_interface *intf, pm_message_t message)
{
struct uvc_device *dev = usb_get_intfdata(intf);
struct uvc_streaming *stream;
uvc_dbg(dev, SUSPEND, "Suspending interface %u\n",
intf->cur_altsetting->desc.bInterfaceNumber);
/* Controls are cached on the fly so they don't need to be saved. */
if (intf->cur_altsetting->desc.bInterfaceSubClass ==
UVC_SC_VIDEOCONTROL) {
mutex_lock(&dev->lock);
if (dev->users)
uvc_status_stop(dev);
mutex_unlock(&dev->lock);
return 0;
}
list_for_each_entry(stream, &dev->streams, list) {
if (stream->intf == intf)
return uvc_video_suspend(stream);
}
uvc_dbg(dev, SUSPEND,
"Suspend: video streaming USB interface mismatch\n");
return -EINVAL;
}
static int __uvc_resume(struct usb_interface *intf, int reset)
{
struct uvc_device *dev = usb_get_intfdata(intf);
struct uvc_streaming *stream;
int ret = 0;
uvc_dbg(dev, SUSPEND, "Resuming interface %u\n",
intf->cur_altsetting->desc.bInterfaceNumber);
if (intf->cur_altsetting->desc.bInterfaceSubClass ==
UVC_SC_VIDEOCONTROL) {
if (reset) {
ret = uvc_ctrl_restore_values(dev);
if (ret < 0)
return ret;
}
mutex_lock(&dev->lock);
if (dev->users)
ret = uvc_status_start(dev, GFP_NOIO);
mutex_unlock(&dev->lock);
return ret;
}
list_for_each_entry(stream, &dev->streams, list) {
if (stream->intf == intf) {
ret = uvc_video_resume(stream, reset);
if (ret < 0)
uvc_queue_streamoff(&stream->queue,
stream->queue.queue.type);
return ret;
}
}
uvc_dbg(dev, SUSPEND,
"Resume: video streaming USB interface mismatch\n");
return -EINVAL;
}
static int uvc_resume(struct usb_interface *intf)
{
return __uvc_resume(intf, 0);
}
static int uvc_reset_resume(struct usb_interface *intf)
{
return __uvc_resume(intf, 1);
}
/* ------------------------------------------------------------------------
* Module parameters
*/
static int uvc_clock_param_get(char *buffer, const struct kernel_param *kp)
{
if (uvc_clock_param == CLOCK_MONOTONIC)
return sprintf(buffer, "CLOCK_MONOTONIC");
else
return sprintf(buffer, "CLOCK_REALTIME");
}
static int uvc_clock_param_set(const char *val, const struct kernel_param *kp)
{
if (strncasecmp(val, "clock_", strlen("clock_")) == 0)
val += strlen("clock_");
if (strcasecmp(val, "monotonic") == 0)
uvc_clock_param = CLOCK_MONOTONIC;
else if (strcasecmp(val, "realtime") == 0)
uvc_clock_param = CLOCK_REALTIME;
else
return -EINVAL;
return 0;
}
module_param_call(clock, uvc_clock_param_set, uvc_clock_param_get,
&uvc_clock_param, 0644);
MODULE_PARM_DESC(clock, "Video buffers timestamp clock");
module_param_named(hwtimestamps, uvc_hw_timestamps_param, uint, 0644);
MODULE_PARM_DESC(hwtimestamps, "Use hardware timestamps");
module_param_named(nodrop, uvc_no_drop_param, uint, 0644);
MODULE_PARM_DESC(nodrop, "Don't drop incomplete frames");
module_param_named(quirks, uvc_quirks_param, uint, 0644);
MODULE_PARM_DESC(quirks, "Forced device quirks");
module_param_named(trace, uvc_dbg_param, uint, 0644);
MODULE_PARM_DESC(trace, "Trace level bitmask");
module_param_named(timeout, uvc_timeout_param, uint, 0644);
MODULE_PARM_DESC(timeout, "Streaming control requests timeout");
/* ------------------------------------------------------------------------
* Driver initialization and cleanup
*/
static const struct uvc_device_info uvc_ctrl_power_line_limited = {
.mappings = (const struct uvc_control_mapping *[]) {
&uvc_ctrl_power_line_mapping_limited,
NULL, /* Sentinel */
},
};
static const struct uvc_device_info uvc_ctrl_power_line_uvc11 = {
.mappings = (const struct uvc_control_mapping *[]) {
&uvc_ctrl_power_line_mapping_uvc11,
NULL, /* Sentinel */
},
};
static const struct uvc_device_info uvc_quirk_probe_minmax = {
.quirks = UVC_QUIRK_PROBE_MINMAX,
};
static const struct uvc_device_info uvc_quirk_fix_bandwidth = {
.quirks = UVC_QUIRK_FIX_BANDWIDTH,
};
static const struct uvc_device_info uvc_quirk_probe_def = {
.quirks = UVC_QUIRK_PROBE_DEF,
};
static const struct uvc_device_info uvc_quirk_stream_no_fid = {
.quirks = UVC_QUIRK_STREAM_NO_FID,
};
static const struct uvc_device_info uvc_quirk_force_y8 = {
.quirks = UVC_QUIRK_FORCE_Y8,
};
#define UVC_INFO_QUIRK(q) (kernel_ulong_t)&(struct uvc_device_info){.quirks = q}
#define UVC_INFO_META(m) (kernel_ulong_t)&(struct uvc_device_info) \
{.meta_format = m}
/*
* The Logitech cameras listed below have their interface class set to
* VENDOR_SPEC because they don't announce themselves as UVC devices, even
* though they are compliant.
*/
static const struct usb_device_id uvc_ids[] = {
/* Quanta USB2.0 HD UVC Webcam */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0408,
.idProduct = 0x3090,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Quanta USB2.0 HD UVC Webcam */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0408,
.idProduct = 0x4030,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Quanta USB2.0 HD UVC Webcam */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0408,
.idProduct = 0x4034,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = UVC_PC_PROTOCOL_15,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* LogiLink Wireless Webcam */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0416,
.idProduct = 0xa91a,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Genius eFace 2025 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0458,
.idProduct = 0x706e,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Microsoft Lifecam NX-6000 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x045e,
.idProduct = 0x00f8,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Microsoft Lifecam NX-3000 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x045e,
.idProduct = 0x0721,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Microsoft Lifecam VX-7000 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x045e,
.idProduct = 0x0723,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Logitech, Webcam C910 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x0821,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_WAKE_AUTOSUSPEND)},
/* Logitech, Webcam B910 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x0823,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_WAKE_AUTOSUSPEND)},
/* Logitech Quickcam Fusion */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x08c1,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Logitech Quickcam Orbit MP */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x08c2,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Logitech Quickcam Pro for Notebook */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x08c3,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Logitech Quickcam Pro 5000 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x08c5,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Logitech Quickcam OEM Dell Notebook */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x08c6,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Logitech Quickcam OEM Cisco VT Camera II */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x08c7,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Logitech HD Pro Webcam C920 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x046d,
.idProduct = 0x082d,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_RESTORE_CTRLS_ON_INIT) },
/* Chicony CNF7129 (Asus EEE 100HE) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x04f2,
.idProduct = 0xb071,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_RESTRICT_FRAME_RATE) },
/* Chicony EasyCamera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x04f2,
.idProduct = 0xb5eb,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Chicony EasyCamera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x04f2,
.idProduct = 0xb6ba,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Chicony EasyCamera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x04f2,
.idProduct = 0xb746,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Alcor Micro AU3820 (Future Boy PC USB Webcam) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x058f,
.idProduct = 0x3820,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Dell XPS m1530 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05a9,
.idProduct = 0x2640,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Dell SP2008WFP Monitor */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05a9,
.idProduct = 0x2641,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Dell Alienware X51 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05a9,
.idProduct = 0x2643,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Dell Studio Hybrid 140g (OmniVision webcam) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05a9,
.idProduct = 0x264a,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Dell XPS M1330 (OmniVision OV7670 webcam) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05a9,
.idProduct = 0x7670,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Apple Built-In iSight */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05ac,
.idProduct = 0x8501,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_PROBE_MINMAX
| UVC_QUIRK_BUILTIN_ISIGHT) },
/* Apple FaceTime HD Camera (Built-In) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05ac,
.idProduct = 0x8514,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Apple Built-In iSight via iBridge */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05ac,
.idProduct = 0x8600,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* Foxlink ("HP Webcam" on HP Mini 5103) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05c8,
.idProduct = 0x0403,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
/* Genesys Logic USB 2.0 PC Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x05e3,
.idProduct = 0x0505,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Hercules Classic Silver */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x06f8,
.idProduct = 0x300c,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
/* ViMicro Vega */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0ac8,
.idProduct = 0x332d,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
/* ViMicro - Minoru3D */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0ac8,
.idProduct = 0x3410,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
/* ViMicro Venus - Minoru3D */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0ac8,
.idProduct = 0x3420,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
/* Ophir Optronics - SPCAM 620U */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0bd3,
.idProduct = 0x0555,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* MT6227 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x0e8d,
.idProduct = 0x0004,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_PROBE_MINMAX
| UVC_QUIRK_PROBE_DEF) },
/* IMC Networks (Medion Akoya) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x13d3,
.idProduct = 0x5103,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* JMicron USB2.0 XGA WebCam */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x152d,
.idProduct = 0x0310,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Syntek (HP Spartan) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x174f,
.idProduct = 0x5212,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Syntek (Samsung Q310) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x174f,
.idProduct = 0x5931,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Syntek (Packard Bell EasyNote MX52 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x174f,
.idProduct = 0x8a12,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Syntek (Asus F9SG) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x174f,
.idProduct = 0x8a31,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Syntek (Asus U3S) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x174f,
.idProduct = 0x8a33,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Syntek (JAOtech Smart Terminal) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x174f,
.idProduct = 0x8a34,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Miricle 307K */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x17dc,
.idProduct = 0x0202,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Lenovo Thinkpad SL400/SL500 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x17ef,
.idProduct = 0x480b,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_stream_no_fid },
/* Aveo Technology USB 2.0 Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x1871,
.idProduct = 0x0306,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_PROBE_MINMAX
| UVC_QUIRK_PROBE_EXTRAFIELDS) },
/* Aveo Technology USB 2.0 Camera (Tasco USB Microscope) */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x1871,
.idProduct = 0x0516,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Ecamm Pico iMage */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x18cd,
.idProduct = 0xcafe,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_PROBE_EXTRAFIELDS) },
/* Manta MM-353 Plako */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x18ec,
.idProduct = 0x3188,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* FSC WebCam V30S */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x18ec,
.idProduct = 0x3288,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Arkmicro unbranded */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x18ec,
.idProduct = 0x3290,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_def },
/* The Imaging Source USB CCD cameras */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x199e,
.idProduct = 0x8102,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0 },
/* Bodelin ProScopeHR */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_DEV_HI
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x19ab,
.idProduct = 0x1000,
.bcdDevice_hi = 0x0126,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_STATUS_INTERVAL) },
/* MSI StarCam 370i */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x1b3b,
.idProduct = 0x2951,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Generalplus Technology Inc. 808 Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x1b3f,
.idProduct = 0x2002,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax },
/* Shenzhen Aoni Electronic Co.,Ltd 2K FHD camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x1bcf,
.idProduct = 0x0b40,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&(const struct uvc_device_info){
.uvc_version = 0x010a,
} },
/* SiGma Micro USB Web Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x1c4f,
.idProduct = 0x3000,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_PROBE_MINMAX
| UVC_QUIRK_IGNORE_SELECTOR_UNIT) },
/* Oculus VR Positional Tracker DK2 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x2833,
.idProduct = 0x0201,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_force_y8 },
/* Oculus VR Rift Sensor */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x2833,
.idProduct = 0x0211,
.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_quirk_force_y8 },
/* GEO Semiconductor GC6500 */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x29fe,
.idProduct = 0x4d53,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_QUIRK(UVC_QUIRK_FORCE_BPP) },
/* Lenovo Integrated Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x30c9,
.idProduct = 0x0093,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = UVC_PC_PROTOCOL_15,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_uvc11 },
/* Sonix Technology USB 2.0 Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x3277,
.idProduct = 0x0072,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Acer EasyCamera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x5986,
.idProduct = 0x1172,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Acer EasyCamera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x5986,
.idProduct = 0x1180,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_limited },
/* Intel D410/ASR depth camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0ad2,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Intel D415/ASRC depth camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0ad3,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Intel D430/AWG depth camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0ad4,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Intel RealSense D4M */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0b03,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Intel D435/AWGC depth camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0b07,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Intel D435i depth camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0b3a,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Intel D405 Depth Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0b5b,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Intel D455 Depth Camera */
{ .match_flags = USB_DEVICE_ID_MATCH_DEVICE
| USB_DEVICE_ID_MATCH_INT_INFO,
.idVendor = 0x8086,
.idProduct = 0x0b5c,
.bInterfaceClass = USB_CLASS_VIDEO,
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
/* Generic USB Video Class */
{ USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_UNDEFINED) },
{ USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_15) },
{}
};
MODULE_DEVICE_TABLE(usb, uvc_ids);
struct uvc_driver uvc_driver = {
.driver = {
.name = "uvcvideo",
.probe = uvc_probe,
.disconnect = uvc_disconnect,
.suspend = uvc_suspend,
.resume = uvc_resume,
.reset_resume = uvc_reset_resume,
.id_table = uvc_ids,
.supports_autosuspend = 1,
},
};
static int __init uvc_init(void)
{
int ret;
uvc_debugfs_init();
ret = usb_register(&uvc_driver.driver);
if (ret < 0) {
uvc_debugfs_cleanup();
return ret;
}
return 0;
}
static void __exit uvc_cleanup(void)
{
usb_deregister(&uvc_driver.driver);
uvc_debugfs_cleanup();
}
module_init(uvc_init);
module_exit(uvc_cleanup);
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
MODULE_VERSION(DRIVER_VERSION);
| linux-master | drivers/media/usb/uvc/uvc_driver.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uvc_video.c -- USB Video Class driver - Video handling
*
* Copyright (C) 2005-2010
* Laurent Pinchart ([email protected])
*/
#include <linux/dma-mapping.h>
#include <linux/highmem.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/videodev2.h>
#include <linux/vmalloc.h>
#include <linux/wait.h>
#include <linux/atomic.h>
#include <asm/unaligned.h>
#include <media/v4l2-common.h>
#include "uvcvideo.h"
/* ------------------------------------------------------------------------
* UVC Controls
*/
static int __uvc_query_ctrl(struct uvc_device *dev, u8 query, u8 unit,
u8 intfnum, u8 cs, void *data, u16 size,
int timeout)
{
u8 type = USB_TYPE_CLASS | USB_RECIP_INTERFACE;
unsigned int pipe;
pipe = (query & 0x80) ? usb_rcvctrlpipe(dev->udev, 0)
: usb_sndctrlpipe(dev->udev, 0);
type |= (query & 0x80) ? USB_DIR_IN : USB_DIR_OUT;
return usb_control_msg(dev->udev, pipe, query, type, cs << 8,
unit << 8 | intfnum, data, size, timeout);
}
static const char *uvc_query_name(u8 query)
{
switch (query) {
case UVC_SET_CUR:
return "SET_CUR";
case UVC_GET_CUR:
return "GET_CUR";
case UVC_GET_MIN:
return "GET_MIN";
case UVC_GET_MAX:
return "GET_MAX";
case UVC_GET_RES:
return "GET_RES";
case UVC_GET_LEN:
return "GET_LEN";
case UVC_GET_INFO:
return "GET_INFO";
case UVC_GET_DEF:
return "GET_DEF";
default:
return "<invalid>";
}
}
int uvc_query_ctrl(struct uvc_device *dev, u8 query, u8 unit,
u8 intfnum, u8 cs, void *data, u16 size)
{
int ret;
u8 error;
u8 tmp;
ret = __uvc_query_ctrl(dev, query, unit, intfnum, cs, data, size,
UVC_CTRL_CONTROL_TIMEOUT);
if (likely(ret == size))
return 0;
if (ret != -EPIPE) {
dev_err(&dev->udev->dev,
"Failed to query (%s) UVC control %u on unit %u: %d (exp. %u).\n",
uvc_query_name(query), cs, unit, ret, size);
return ret < 0 ? ret : -EPIPE;
}
/* Reuse data[0] to request the error code. */
tmp = *(u8 *)data;
ret = __uvc_query_ctrl(dev, UVC_GET_CUR, 0, intfnum,
UVC_VC_REQUEST_ERROR_CODE_CONTROL, data, 1,
UVC_CTRL_CONTROL_TIMEOUT);
error = *(u8 *)data;
*(u8 *)data = tmp;
if (ret != 1)
return ret < 0 ? ret : -EPIPE;
uvc_dbg(dev, CONTROL, "Control error %u\n", error);
switch (error) {
case 0:
/* Cannot happen - we received a STALL */
return -EPIPE;
case 1: /* Not ready */
return -EBUSY;
case 2: /* Wrong state */
return -EACCES;
case 3: /* Power */
return -EREMOTE;
case 4: /* Out of range */
return -ERANGE;
case 5: /* Invalid unit */
case 6: /* Invalid control */
case 7: /* Invalid Request */
/*
* The firmware has not properly implemented
* the control or there has been a HW error.
*/
return -EIO;
case 8: /* Invalid value within range */
return -EINVAL;
default: /* reserved or unknown */
break;
}
return -EPIPE;
}
static const struct usb_device_id elgato_cam_link_4k = {
USB_DEVICE(0x0fd9, 0x0066)
};
static void uvc_fixup_video_ctrl(struct uvc_streaming *stream,
struct uvc_streaming_control *ctrl)
{
const struct uvc_format *format = NULL;
const struct uvc_frame *frame = NULL;
unsigned int i;
/*
* The response of the Elgato Cam Link 4K is incorrect: The second byte
* contains bFormatIndex (instead of being the second byte of bmHint).
* The first byte is always zero. The third byte is always 1.
*
* The UVC 1.5 class specification defines the first five bits in the
* bmHint bitfield. The remaining bits are reserved and should be zero.
* Therefore a valid bmHint will be less than 32.
*
* Latest Elgato Cam Link 4K firmware as of 2021-03-23 needs this fix.
* MCU: 20.02.19, FPGA: 67
*/
if (usb_match_one_id(stream->dev->intf, &elgato_cam_link_4k) &&
ctrl->bmHint > 255) {
u8 corrected_format_index = ctrl->bmHint >> 8;
uvc_dbg(stream->dev, VIDEO,
"Correct USB video probe response from {bmHint: 0x%04x, bFormatIndex: %u} to {bmHint: 0x%04x, bFormatIndex: %u}\n",
ctrl->bmHint, ctrl->bFormatIndex,
1, corrected_format_index);
ctrl->bmHint = 1;
ctrl->bFormatIndex = corrected_format_index;
}
for (i = 0; i < stream->nformats; ++i) {
if (stream->formats[i].index == ctrl->bFormatIndex) {
format = &stream->formats[i];
break;
}
}
if (format == NULL)
return;
for (i = 0; i < format->nframes; ++i) {
if (format->frames[i].bFrameIndex == ctrl->bFrameIndex) {
frame = &format->frames[i];
break;
}
}
if (frame == NULL)
return;
if (!(format->flags & UVC_FMT_FLAG_COMPRESSED) ||
(ctrl->dwMaxVideoFrameSize == 0 &&
stream->dev->uvc_version < 0x0110))
ctrl->dwMaxVideoFrameSize =
frame->dwMaxVideoFrameBufferSize;
/*
* The "TOSHIBA Web Camera - 5M" Chicony device (04f2:b50b) seems to
* compute the bandwidth on 16 bits and erroneously sign-extend it to
* 32 bits, resulting in a huge bandwidth value. Detect and fix that
* condition by setting the 16 MSBs to 0 when they're all equal to 1.
*/
if ((ctrl->dwMaxPayloadTransferSize & 0xffff0000) == 0xffff0000)
ctrl->dwMaxPayloadTransferSize &= ~0xffff0000;
if (!(format->flags & UVC_FMT_FLAG_COMPRESSED) &&
stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH &&
stream->intf->num_altsetting > 1) {
u32 interval;
u32 bandwidth;
interval = (ctrl->dwFrameInterval > 100000)
? ctrl->dwFrameInterval
: frame->dwFrameInterval[0];
/*
* Compute a bandwidth estimation by multiplying the frame
* size by the number of video frames per second, divide the
* result by the number of USB frames (or micro-frames for
* high-speed devices) per second and add the UVC header size
* (assumed to be 12 bytes long).
*/
bandwidth = frame->wWidth * frame->wHeight / 8 * format->bpp;
bandwidth *= 10000000 / interval + 1;
bandwidth /= 1000;
if (stream->dev->udev->speed == USB_SPEED_HIGH)
bandwidth /= 8;
bandwidth += 12;
/*
* The bandwidth estimate is too low for many cameras. Don't use
* maximum packet sizes lower than 1024 bytes to try and work
* around the problem. According to measurements done on two
* different camera models, the value is high enough to get most
* resolutions working while not preventing two simultaneous
* VGA streams at 15 fps.
*/
bandwidth = max_t(u32, bandwidth, 1024);
ctrl->dwMaxPayloadTransferSize = bandwidth;
}
}
static size_t uvc_video_ctrl_size(struct uvc_streaming *stream)
{
/*
* Return the size of the video probe and commit controls, which depends
* on the protocol version.
*/
if (stream->dev->uvc_version < 0x0110)
return 26;
else if (stream->dev->uvc_version < 0x0150)
return 34;
else
return 48;
}
static int uvc_get_video_ctrl(struct uvc_streaming *stream,
struct uvc_streaming_control *ctrl, int probe, u8 query)
{
u16 size = uvc_video_ctrl_size(stream);
u8 *data;
int ret;
if ((stream->dev->quirks & UVC_QUIRK_PROBE_DEF) &&
query == UVC_GET_DEF)
return -EIO;
data = kmalloc(size, GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
ret = __uvc_query_ctrl(stream->dev, query, 0, stream->intfnum,
probe ? UVC_VS_PROBE_CONTROL : UVC_VS_COMMIT_CONTROL, data,
size, uvc_timeout_param);
if ((query == UVC_GET_MIN || query == UVC_GET_MAX) && ret == 2) {
/*
* Some cameras, mostly based on Bison Electronics chipsets,
* answer a GET_MIN or GET_MAX request with the wCompQuality
* field only.
*/
uvc_warn_once(stream->dev, UVC_WARN_MINMAX, "UVC non "
"compliance - GET_MIN/MAX(PROBE) incorrectly "
"supported. Enabling workaround.\n");
memset(ctrl, 0, sizeof(*ctrl));
ctrl->wCompQuality = le16_to_cpup((__le16 *)data);
ret = 0;
goto out;
} else if (query == UVC_GET_DEF && probe == 1 && ret != size) {
/*
* Many cameras don't support the GET_DEF request on their
* video probe control. Warn once and return, the caller will
* fall back to GET_CUR.
*/
uvc_warn_once(stream->dev, UVC_WARN_PROBE_DEF, "UVC non "
"compliance - GET_DEF(PROBE) not supported. "
"Enabling workaround.\n");
ret = -EIO;
goto out;
} else if (ret != size) {
dev_err(&stream->intf->dev,
"Failed to query (%u) UVC %s control : %d (exp. %u).\n",
query, probe ? "probe" : "commit", ret, size);
ret = (ret == -EPROTO) ? -EPROTO : -EIO;
goto out;
}
ctrl->bmHint = le16_to_cpup((__le16 *)&data[0]);
ctrl->bFormatIndex = data[2];
ctrl->bFrameIndex = data[3];
ctrl->dwFrameInterval = le32_to_cpup((__le32 *)&data[4]);
ctrl->wKeyFrameRate = le16_to_cpup((__le16 *)&data[8]);
ctrl->wPFrameRate = le16_to_cpup((__le16 *)&data[10]);
ctrl->wCompQuality = le16_to_cpup((__le16 *)&data[12]);
ctrl->wCompWindowSize = le16_to_cpup((__le16 *)&data[14]);
ctrl->wDelay = le16_to_cpup((__le16 *)&data[16]);
ctrl->dwMaxVideoFrameSize = get_unaligned_le32(&data[18]);
ctrl->dwMaxPayloadTransferSize = get_unaligned_le32(&data[22]);
if (size >= 34) {
ctrl->dwClockFrequency = get_unaligned_le32(&data[26]);
ctrl->bmFramingInfo = data[30];
ctrl->bPreferedVersion = data[31];
ctrl->bMinVersion = data[32];
ctrl->bMaxVersion = data[33];
} else {
ctrl->dwClockFrequency = stream->dev->clock_frequency;
ctrl->bmFramingInfo = 0;
ctrl->bPreferedVersion = 0;
ctrl->bMinVersion = 0;
ctrl->bMaxVersion = 0;
}
/*
* Some broken devices return null or wrong dwMaxVideoFrameSize and
* dwMaxPayloadTransferSize fields. Try to get the value from the
* format and frame descriptors.
*/
uvc_fixup_video_ctrl(stream, ctrl);
ret = 0;
out:
kfree(data);
return ret;
}
static int uvc_set_video_ctrl(struct uvc_streaming *stream,
struct uvc_streaming_control *ctrl, int probe)
{
u16 size = uvc_video_ctrl_size(stream);
u8 *data;
int ret;
data = kzalloc(size, GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
*(__le16 *)&data[0] = cpu_to_le16(ctrl->bmHint);
data[2] = ctrl->bFormatIndex;
data[3] = ctrl->bFrameIndex;
*(__le32 *)&data[4] = cpu_to_le32(ctrl->dwFrameInterval);
*(__le16 *)&data[8] = cpu_to_le16(ctrl->wKeyFrameRate);
*(__le16 *)&data[10] = cpu_to_le16(ctrl->wPFrameRate);
*(__le16 *)&data[12] = cpu_to_le16(ctrl->wCompQuality);
*(__le16 *)&data[14] = cpu_to_le16(ctrl->wCompWindowSize);
*(__le16 *)&data[16] = cpu_to_le16(ctrl->wDelay);
put_unaligned_le32(ctrl->dwMaxVideoFrameSize, &data[18]);
put_unaligned_le32(ctrl->dwMaxPayloadTransferSize, &data[22]);
if (size >= 34) {
put_unaligned_le32(ctrl->dwClockFrequency, &data[26]);
data[30] = ctrl->bmFramingInfo;
data[31] = ctrl->bPreferedVersion;
data[32] = ctrl->bMinVersion;
data[33] = ctrl->bMaxVersion;
}
ret = __uvc_query_ctrl(stream->dev, UVC_SET_CUR, 0, stream->intfnum,
probe ? UVC_VS_PROBE_CONTROL : UVC_VS_COMMIT_CONTROL, data,
size, uvc_timeout_param);
if (ret != size) {
dev_err(&stream->intf->dev,
"Failed to set UVC %s control : %d (exp. %u).\n",
probe ? "probe" : "commit", ret, size);
ret = -EIO;
}
kfree(data);
return ret;
}
int uvc_probe_video(struct uvc_streaming *stream,
struct uvc_streaming_control *probe)
{
struct uvc_streaming_control probe_min, probe_max;
unsigned int i;
int ret;
/*
* Perform probing. The device should adjust the requested values
* according to its capabilities. However, some devices, namely the
* first generation UVC Logitech webcams, don't implement the Video
* Probe control properly, and just return the needed bandwidth. For
* that reason, if the needed bandwidth exceeds the maximum available
* bandwidth, try to lower the quality.
*/
ret = uvc_set_video_ctrl(stream, probe, 1);
if (ret < 0)
goto done;
/* Get the minimum and maximum values for compression settings. */
if (!(stream->dev->quirks & UVC_QUIRK_PROBE_MINMAX)) {
ret = uvc_get_video_ctrl(stream, &probe_min, 1, UVC_GET_MIN);
if (ret < 0)
goto done;
ret = uvc_get_video_ctrl(stream, &probe_max, 1, UVC_GET_MAX);
if (ret < 0)
goto done;
probe->wCompQuality = probe_max.wCompQuality;
}
for (i = 0; i < 2; ++i) {
ret = uvc_set_video_ctrl(stream, probe, 1);
if (ret < 0)
goto done;
ret = uvc_get_video_ctrl(stream, probe, 1, UVC_GET_CUR);
if (ret < 0)
goto done;
if (stream->intf->num_altsetting == 1)
break;
if (probe->dwMaxPayloadTransferSize <= stream->maxpsize)
break;
if (stream->dev->quirks & UVC_QUIRK_PROBE_MINMAX) {
ret = -ENOSPC;
goto done;
}
/* TODO: negotiate compression parameters */
probe->wKeyFrameRate = probe_min.wKeyFrameRate;
probe->wPFrameRate = probe_min.wPFrameRate;
probe->wCompQuality = probe_max.wCompQuality;
probe->wCompWindowSize = probe_min.wCompWindowSize;
}
done:
return ret;
}
static int uvc_commit_video(struct uvc_streaming *stream,
struct uvc_streaming_control *probe)
{
return uvc_set_video_ctrl(stream, probe, 0);
}
/* -----------------------------------------------------------------------------
* Clocks and timestamps
*/
static inline ktime_t uvc_video_get_time(void)
{
if (uvc_clock_param == CLOCK_MONOTONIC)
return ktime_get();
else
return ktime_get_real();
}
static void
uvc_video_clock_decode(struct uvc_streaming *stream, struct uvc_buffer *buf,
const u8 *data, int len)
{
struct uvc_clock_sample *sample;
unsigned int header_size;
bool has_pts = false;
bool has_scr = false;
unsigned long flags;
ktime_t time;
u16 host_sof;
u16 dev_sof;
switch (data[1] & (UVC_STREAM_PTS | UVC_STREAM_SCR)) {
case UVC_STREAM_PTS | UVC_STREAM_SCR:
header_size = 12;
has_pts = true;
has_scr = true;
break;
case UVC_STREAM_PTS:
header_size = 6;
has_pts = true;
break;
case UVC_STREAM_SCR:
header_size = 8;
has_scr = true;
break;
default:
header_size = 2;
break;
}
/* Check for invalid headers. */
if (len < header_size)
return;
/*
* Extract the timestamps:
*
* - store the frame PTS in the buffer structure
* - if the SCR field is present, retrieve the host SOF counter and
* kernel timestamps and store them with the SCR STC and SOF fields
* in the ring buffer
*/
if (has_pts && buf != NULL)
buf->pts = get_unaligned_le32(&data[2]);
if (!has_scr)
return;
/*
* To limit the amount of data, drop SCRs with an SOF identical to the
* previous one. This filtering is also needed to support UVC 1.5, where
* all the data packets of the same frame contains the same SOF. In that
* case only the first one will match the host_sof.
*/
dev_sof = get_unaligned_le16(&data[header_size - 2]);
if (dev_sof == stream->clock.last_sof)
return;
stream->clock.last_sof = dev_sof;
host_sof = usb_get_current_frame_number(stream->dev->udev);
time = uvc_video_get_time();
/*
* The UVC specification allows device implementations that can't obtain
* the USB frame number to keep their own frame counters as long as they
* match the size and frequency of the frame number associated with USB
* SOF tokens. The SOF values sent by such devices differ from the USB
* SOF tokens by a fixed offset that needs to be estimated and accounted
* for to make timestamp recovery as accurate as possible.
*
* The offset is estimated the first time a device SOF value is received
* as the difference between the host and device SOF values. As the two
* SOF values can differ slightly due to transmission delays, consider
* that the offset is null if the difference is not higher than 10 ms
* (negative differences can not happen and are thus considered as an
* offset). The video commit control wDelay field should be used to
* compute a dynamic threshold instead of using a fixed 10 ms value, but
* devices don't report reliable wDelay values.
*
* See uvc_video_clock_host_sof() for an explanation regarding why only
* the 8 LSBs of the delta are kept.
*/
if (stream->clock.sof_offset == (u16)-1) {
u16 delta_sof = (host_sof - dev_sof) & 255;
if (delta_sof >= 10)
stream->clock.sof_offset = delta_sof;
else
stream->clock.sof_offset = 0;
}
dev_sof = (dev_sof + stream->clock.sof_offset) & 2047;
spin_lock_irqsave(&stream->clock.lock, flags);
sample = &stream->clock.samples[stream->clock.head];
sample->dev_stc = get_unaligned_le32(&data[header_size - 6]);
sample->dev_sof = dev_sof;
sample->host_sof = host_sof;
sample->host_time = time;
/* Update the sliding window head and count. */
stream->clock.head = (stream->clock.head + 1) % stream->clock.size;
if (stream->clock.count < stream->clock.size)
stream->clock.count++;
spin_unlock_irqrestore(&stream->clock.lock, flags);
}
static void uvc_video_clock_reset(struct uvc_streaming *stream)
{
struct uvc_clock *clock = &stream->clock;
clock->head = 0;
clock->count = 0;
clock->last_sof = -1;
clock->sof_offset = -1;
}
static int uvc_video_clock_init(struct uvc_streaming *stream)
{
struct uvc_clock *clock = &stream->clock;
spin_lock_init(&clock->lock);
clock->size = 32;
clock->samples = kmalloc_array(clock->size, sizeof(*clock->samples),
GFP_KERNEL);
if (clock->samples == NULL)
return -ENOMEM;
uvc_video_clock_reset(stream);
return 0;
}
static void uvc_video_clock_cleanup(struct uvc_streaming *stream)
{
kfree(stream->clock.samples);
stream->clock.samples = NULL;
}
/*
* uvc_video_clock_host_sof - Return the host SOF value for a clock sample
*
* Host SOF counters reported by usb_get_current_frame_number() usually don't
* cover the whole 11-bits SOF range (0-2047) but are limited to the HCI frame
* schedule window. They can be limited to 8, 9 or 10 bits depending on the host
* controller and its configuration.
*
* We thus need to recover the SOF value corresponding to the host frame number.
* As the device and host frame numbers are sampled in a short interval, the
* difference between their values should be equal to a small delta plus an
* integer multiple of 256 caused by the host frame number limited precision.
*
* To obtain the recovered host SOF value, compute the small delta by masking
* the high bits of the host frame counter and device SOF difference and add it
* to the device SOF value.
*/
static u16 uvc_video_clock_host_sof(const struct uvc_clock_sample *sample)
{
/* The delta value can be negative. */
s8 delta_sof;
delta_sof = (sample->host_sof - sample->dev_sof) & 255;
return (sample->dev_sof + delta_sof) & 2047;
}
/*
* uvc_video_clock_update - Update the buffer timestamp
*
* This function converts the buffer PTS timestamp to the host clock domain by
* going through the USB SOF clock domain and stores the result in the V4L2
* buffer timestamp field.
*
* The relationship between the device clock and the host clock isn't known.
* However, the device and the host share the common USB SOF clock which can be
* used to recover that relationship.
*
* The relationship between the device clock and the USB SOF clock is considered
* to be linear over the clock samples sliding window and is given by
*
* SOF = m * PTS + p
*
* Several methods to compute the slope (m) and intercept (p) can be used. As
* the clock drift should be small compared to the sliding window size, we
* assume that the line that goes through the points at both ends of the window
* is a good approximation. Naming those points P1 and P2, we get
*
* SOF = (SOF2 - SOF1) / (STC2 - STC1) * PTS
* + (SOF1 * STC2 - SOF2 * STC1) / (STC2 - STC1)
*
* or
*
* SOF = ((SOF2 - SOF1) * PTS + SOF1 * STC2 - SOF2 * STC1) / (STC2 - STC1) (1)
*
* to avoid losing precision in the division. Similarly, the host timestamp is
* computed with
*
* TS = ((TS2 - TS1) * SOF + TS1 * SOF2 - TS2 * SOF1) / (SOF2 - SOF1) (2)
*
* SOF values are coded on 11 bits by USB. We extend their precision with 16
* decimal bits, leading to a 11.16 coding.
*
* TODO: To avoid surprises with device clock values, PTS/STC timestamps should
* be normalized using the nominal device clock frequency reported through the
* UVC descriptors.
*
* Both the PTS/STC and SOF counters roll over, after a fixed but device
* specific amount of time for PTS/STC and after 2048ms for SOF. As long as the
* sliding window size is smaller than the rollover period, differences computed
* on unsigned integers will produce the correct result. However, the p term in
* the linear relations will be miscomputed.
*
* To fix the issue, we subtract a constant from the PTS and STC values to bring
* PTS to half the 32 bit STC range. The sliding window STC values then fit into
* the 32 bit range without any rollover.
*
* Similarly, we add 2048 to the device SOF values to make sure that the SOF
* computed by (1) will never be smaller than 0. This offset is then compensated
* by adding 2048 to the SOF values used in (2). However, this doesn't prevent
* rollovers between (1) and (2): the SOF value computed by (1) can be slightly
* lower than 4096, and the host SOF counters can have rolled over to 2048. This
* case is handled by subtracting 2048 from the SOF value if it exceeds the host
* SOF value at the end of the sliding window.
*
* Finally we subtract a constant from the host timestamps to bring the first
* timestamp of the sliding window to 1s.
*/
void uvc_video_clock_update(struct uvc_streaming *stream,
struct vb2_v4l2_buffer *vbuf,
struct uvc_buffer *buf)
{
struct uvc_clock *clock = &stream->clock;
struct uvc_clock_sample *first;
struct uvc_clock_sample *last;
unsigned long flags;
u64 timestamp;
u32 delta_stc;
u32 y1, y2;
u32 x1, x2;
u32 mean;
u32 sof;
u64 y;
if (!uvc_hw_timestamps_param)
return;
/*
* We will get called from __vb2_queue_cancel() if there are buffers
* done but not dequeued by the user, but the sample array has already
* been released at that time. Just bail out in that case.
*/
if (!clock->samples)
return;
spin_lock_irqsave(&clock->lock, flags);
if (clock->count < clock->size)
goto done;
first = &clock->samples[clock->head];
last = &clock->samples[(clock->head - 1) % clock->size];
/* First step, PTS to SOF conversion. */
delta_stc = buf->pts - (1UL << 31);
x1 = first->dev_stc - delta_stc;
x2 = last->dev_stc - delta_stc;
if (x1 == x2)
goto done;
y1 = (first->dev_sof + 2048) << 16;
y2 = (last->dev_sof + 2048) << 16;
if (y2 < y1)
y2 += 2048 << 16;
y = (u64)(y2 - y1) * (1ULL << 31) + (u64)y1 * (u64)x2
- (u64)y2 * (u64)x1;
y = div_u64(y, x2 - x1);
sof = y;
uvc_dbg(stream->dev, CLOCK,
"%s: PTS %u y %llu.%06llu SOF %u.%06llu (x1 %u x2 %u y1 %u y2 %u SOF offset %u)\n",
stream->dev->name, buf->pts,
y >> 16, div_u64((y & 0xffff) * 1000000, 65536),
sof >> 16, div_u64(((u64)sof & 0xffff) * 1000000LLU, 65536),
x1, x2, y1, y2, clock->sof_offset);
/* Second step, SOF to host clock conversion. */
x1 = (uvc_video_clock_host_sof(first) + 2048) << 16;
x2 = (uvc_video_clock_host_sof(last) + 2048) << 16;
if (x2 < x1)
x2 += 2048 << 16;
if (x1 == x2)
goto done;
y1 = NSEC_PER_SEC;
y2 = (u32)ktime_to_ns(ktime_sub(last->host_time, first->host_time)) + y1;
/*
* Interpolated and host SOF timestamps can wrap around at slightly
* different times. Handle this by adding or removing 2048 to or from
* the computed SOF value to keep it close to the SOF samples mean
* value.
*/
mean = (x1 + x2) / 2;
if (mean - (1024 << 16) > sof)
sof += 2048 << 16;
else if (sof > mean + (1024 << 16))
sof -= 2048 << 16;
y = (u64)(y2 - y1) * (u64)sof + (u64)y1 * (u64)x2
- (u64)y2 * (u64)x1;
y = div_u64(y, x2 - x1);
timestamp = ktime_to_ns(first->host_time) + y - y1;
uvc_dbg(stream->dev, CLOCK,
"%s: SOF %u.%06llu y %llu ts %llu buf ts %llu (x1 %u/%u/%u x2 %u/%u/%u y1 %u y2 %u)\n",
stream->dev->name,
sof >> 16, div_u64(((u64)sof & 0xffff) * 1000000LLU, 65536),
y, timestamp, vbuf->vb2_buf.timestamp,
x1, first->host_sof, first->dev_sof,
x2, last->host_sof, last->dev_sof, y1, y2);
/* Update the V4L2 buffer. */
vbuf->vb2_buf.timestamp = timestamp;
done:
spin_unlock_irqrestore(&clock->lock, flags);
}
/* ------------------------------------------------------------------------
* Stream statistics
*/
static void uvc_video_stats_decode(struct uvc_streaming *stream,
const u8 *data, int len)
{
unsigned int header_size;
bool has_pts = false;
bool has_scr = false;
u16 scr_sof;
u32 scr_stc;
u32 pts;
if (stream->stats.stream.nb_frames == 0 &&
stream->stats.frame.nb_packets == 0)
stream->stats.stream.start_ts = ktime_get();
switch (data[1] & (UVC_STREAM_PTS | UVC_STREAM_SCR)) {
case UVC_STREAM_PTS | UVC_STREAM_SCR:
header_size = 12;
has_pts = true;
has_scr = true;
break;
case UVC_STREAM_PTS:
header_size = 6;
has_pts = true;
break;
case UVC_STREAM_SCR:
header_size = 8;
has_scr = true;
break;
default:
header_size = 2;
break;
}
/* Check for invalid headers. */
if (len < header_size || data[0] < header_size) {
stream->stats.frame.nb_invalid++;
return;
}
/* Extract the timestamps. */
if (has_pts)
pts = get_unaligned_le32(&data[2]);
if (has_scr) {
scr_stc = get_unaligned_le32(&data[header_size - 6]);
scr_sof = get_unaligned_le16(&data[header_size - 2]);
}
/* Is PTS constant through the whole frame ? */
if (has_pts && stream->stats.frame.nb_pts) {
if (stream->stats.frame.pts != pts) {
stream->stats.frame.nb_pts_diffs++;
stream->stats.frame.last_pts_diff =
stream->stats.frame.nb_packets;
}
}
if (has_pts) {
stream->stats.frame.nb_pts++;
stream->stats.frame.pts = pts;
}
/*
* Do all frames have a PTS in their first non-empty packet, or before
* their first empty packet ?
*/
if (stream->stats.frame.size == 0) {
if (len > header_size)
stream->stats.frame.has_initial_pts = has_pts;
if (len == header_size && has_pts)
stream->stats.frame.has_early_pts = true;
}
/* Do the SCR.STC and SCR.SOF fields vary through the frame ? */
if (has_scr && stream->stats.frame.nb_scr) {
if (stream->stats.frame.scr_stc != scr_stc)
stream->stats.frame.nb_scr_diffs++;
}
if (has_scr) {
/* Expand the SOF counter to 32 bits and store its value. */
if (stream->stats.stream.nb_frames > 0 ||
stream->stats.frame.nb_scr > 0)
stream->stats.stream.scr_sof_count +=
(scr_sof - stream->stats.stream.scr_sof) % 2048;
stream->stats.stream.scr_sof = scr_sof;
stream->stats.frame.nb_scr++;
stream->stats.frame.scr_stc = scr_stc;
stream->stats.frame.scr_sof = scr_sof;
if (scr_sof < stream->stats.stream.min_sof)
stream->stats.stream.min_sof = scr_sof;
if (scr_sof > stream->stats.stream.max_sof)
stream->stats.stream.max_sof = scr_sof;
}
/* Record the first non-empty packet number. */
if (stream->stats.frame.size == 0 && len > header_size)
stream->stats.frame.first_data = stream->stats.frame.nb_packets;
/* Update the frame size. */
stream->stats.frame.size += len - header_size;
/* Update the packets counters. */
stream->stats.frame.nb_packets++;
if (len <= header_size)
stream->stats.frame.nb_empty++;
if (data[1] & UVC_STREAM_ERR)
stream->stats.frame.nb_errors++;
}
static void uvc_video_stats_update(struct uvc_streaming *stream)
{
struct uvc_stats_frame *frame = &stream->stats.frame;
uvc_dbg(stream->dev, STATS,
"frame %u stats: %u/%u/%u packets, %u/%u/%u pts (%searly %sinitial), %u/%u scr, last pts/stc/sof %u/%u/%u\n",
stream->sequence, frame->first_data,
frame->nb_packets - frame->nb_empty, frame->nb_packets,
frame->nb_pts_diffs, frame->last_pts_diff, frame->nb_pts,
frame->has_early_pts ? "" : "!",
frame->has_initial_pts ? "" : "!",
frame->nb_scr_diffs, frame->nb_scr,
frame->pts, frame->scr_stc, frame->scr_sof);
stream->stats.stream.nb_frames++;
stream->stats.stream.nb_packets += stream->stats.frame.nb_packets;
stream->stats.stream.nb_empty += stream->stats.frame.nb_empty;
stream->stats.stream.nb_errors += stream->stats.frame.nb_errors;
stream->stats.stream.nb_invalid += stream->stats.frame.nb_invalid;
if (frame->has_early_pts)
stream->stats.stream.nb_pts_early++;
if (frame->has_initial_pts)
stream->stats.stream.nb_pts_initial++;
if (frame->last_pts_diff <= frame->first_data)
stream->stats.stream.nb_pts_constant++;
if (frame->nb_scr >= frame->nb_packets - frame->nb_empty)
stream->stats.stream.nb_scr_count_ok++;
if (frame->nb_scr_diffs + 1 == frame->nb_scr)
stream->stats.stream.nb_scr_diffs_ok++;
memset(&stream->stats.frame, 0, sizeof(stream->stats.frame));
}
size_t uvc_video_stats_dump(struct uvc_streaming *stream, char *buf,
size_t size)
{
unsigned int scr_sof_freq;
unsigned int duration;
size_t count = 0;
/*
* Compute the SCR.SOF frequency estimate. At the nominal 1kHz SOF
* frequency this will not overflow before more than 1h.
*/
duration = ktime_ms_delta(stream->stats.stream.stop_ts,
stream->stats.stream.start_ts);
if (duration != 0)
scr_sof_freq = stream->stats.stream.scr_sof_count * 1000
/ duration;
else
scr_sof_freq = 0;
count += scnprintf(buf + count, size - count,
"frames: %u\npackets: %u\nempty: %u\n"
"errors: %u\ninvalid: %u\n",
stream->stats.stream.nb_frames,
stream->stats.stream.nb_packets,
stream->stats.stream.nb_empty,
stream->stats.stream.nb_errors,
stream->stats.stream.nb_invalid);
count += scnprintf(buf + count, size - count,
"pts: %u early, %u initial, %u ok\n",
stream->stats.stream.nb_pts_early,
stream->stats.stream.nb_pts_initial,
stream->stats.stream.nb_pts_constant);
count += scnprintf(buf + count, size - count,
"scr: %u count ok, %u diff ok\n",
stream->stats.stream.nb_scr_count_ok,
stream->stats.stream.nb_scr_diffs_ok);
count += scnprintf(buf + count, size - count,
"sof: %u <= sof <= %u, freq %u.%03u kHz\n",
stream->stats.stream.min_sof,
stream->stats.stream.max_sof,
scr_sof_freq / 1000, scr_sof_freq % 1000);
return count;
}
static void uvc_video_stats_start(struct uvc_streaming *stream)
{
memset(&stream->stats, 0, sizeof(stream->stats));
stream->stats.stream.min_sof = 2048;
}
static void uvc_video_stats_stop(struct uvc_streaming *stream)
{
stream->stats.stream.stop_ts = ktime_get();
}
/* ------------------------------------------------------------------------
* Video codecs
*/
/*
* Video payload decoding is handled by uvc_video_decode_start(),
* uvc_video_decode_data() and uvc_video_decode_end().
*
* uvc_video_decode_start is called with URB data at the start of a bulk or
* isochronous payload. It processes header data and returns the header size
* in bytes if successful. If an error occurs, it returns a negative error
* code. The following error codes have special meanings.
*
* - EAGAIN informs the caller that the current video buffer should be marked
* as done, and that the function should be called again with the same data
* and a new video buffer. This is used when end of frame conditions can be
* reliably detected at the beginning of the next frame only.
*
* If an error other than -EAGAIN is returned, the caller will drop the current
* payload. No call to uvc_video_decode_data and uvc_video_decode_end will be
* made until the next payload. -ENODATA can be used to drop the current
* payload if no other error code is appropriate.
*
* uvc_video_decode_data is called for every URB with URB data. It copies the
* data to the video buffer.
*
* uvc_video_decode_end is called with header data at the end of a bulk or
* isochronous payload. It performs any additional header data processing and
* returns 0 or a negative error code if an error occurred. As header data have
* already been processed by uvc_video_decode_start, this functions isn't
* required to perform sanity checks a second time.
*
* For isochronous transfers where a payload is always transferred in a single
* URB, the three functions will be called in a row.
*
* To let the decoder process header data and update its internal state even
* when no video buffer is available, uvc_video_decode_start must be prepared
* to be called with a NULL buf parameter. uvc_video_decode_data and
* uvc_video_decode_end will never be called with a NULL buffer.
*/
static int uvc_video_decode_start(struct uvc_streaming *stream,
struct uvc_buffer *buf, const u8 *data, int len)
{
u8 fid;
/*
* Sanity checks:
* - packet must be at least 2 bytes long
* - bHeaderLength value must be at least 2 bytes (see above)
* - bHeaderLength value can't be larger than the packet size.
*/
if (len < 2 || data[0] < 2 || data[0] > len) {
stream->stats.frame.nb_invalid++;
return -EINVAL;
}
fid = data[1] & UVC_STREAM_FID;
/*
* Increase the sequence number regardless of any buffer states, so
* that discontinuous sequence numbers always indicate lost frames.
*/
if (stream->last_fid != fid) {
stream->sequence++;
if (stream->sequence)
uvc_video_stats_update(stream);
}
uvc_video_clock_decode(stream, buf, data, len);
uvc_video_stats_decode(stream, data, len);
/*
* Store the payload FID bit and return immediately when the buffer is
* NULL.
*/
if (buf == NULL) {
stream->last_fid = fid;
return -ENODATA;
}
/* Mark the buffer as bad if the error bit is set. */
if (data[1] & UVC_STREAM_ERR) {
uvc_dbg(stream->dev, FRAME,
"Marking buffer as bad (error bit set)\n");
buf->error = 1;
}
/*
* Synchronize to the input stream by waiting for the FID bit to be
* toggled when the buffer state is not UVC_BUF_STATE_ACTIVE.
* stream->last_fid is initialized to -1, so the first isochronous
* frame will always be in sync.
*
* If the device doesn't toggle the FID bit, invert stream->last_fid
* when the EOF bit is set to force synchronisation on the next packet.
*/
if (buf->state != UVC_BUF_STATE_ACTIVE) {
if (fid == stream->last_fid) {
uvc_dbg(stream->dev, FRAME,
"Dropping payload (out of sync)\n");
if ((stream->dev->quirks & UVC_QUIRK_STREAM_NO_FID) &&
(data[1] & UVC_STREAM_EOF))
stream->last_fid ^= UVC_STREAM_FID;
return -ENODATA;
}
buf->buf.field = V4L2_FIELD_NONE;
buf->buf.sequence = stream->sequence;
buf->buf.vb2_buf.timestamp = ktime_to_ns(uvc_video_get_time());
/* TODO: Handle PTS and SCR. */
buf->state = UVC_BUF_STATE_ACTIVE;
}
/*
* Mark the buffer as done if we're at the beginning of a new frame.
* End of frame detection is better implemented by checking the EOF
* bit (FID bit toggling is delayed by one frame compared to the EOF
* bit), but some devices don't set the bit at end of frame (and the
* last payload can be lost anyway). We thus must check if the FID has
* been toggled.
*
* stream->last_fid is initialized to -1, so the first isochronous
* frame will never trigger an end of frame detection.
*
* Empty buffers (bytesused == 0) don't trigger end of frame detection
* as it doesn't make sense to return an empty buffer. This also
* avoids detecting end of frame conditions at FID toggling if the
* previous payload had the EOF bit set.
*/
if (fid != stream->last_fid && buf->bytesused != 0) {
uvc_dbg(stream->dev, FRAME,
"Frame complete (FID bit toggled)\n");
buf->state = UVC_BUF_STATE_READY;
return -EAGAIN;
}
stream->last_fid = fid;
return data[0];
}
static inline enum dma_data_direction uvc_stream_dir(
struct uvc_streaming *stream)
{
if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
return DMA_FROM_DEVICE;
else
return DMA_TO_DEVICE;
}
static inline struct device *uvc_stream_to_dmadev(struct uvc_streaming *stream)
{
return bus_to_hcd(stream->dev->udev->bus)->self.sysdev;
}
static int uvc_submit_urb(struct uvc_urb *uvc_urb, gfp_t mem_flags)
{
/* Sync DMA. */
dma_sync_sgtable_for_device(uvc_stream_to_dmadev(uvc_urb->stream),
uvc_urb->sgt,
uvc_stream_dir(uvc_urb->stream));
return usb_submit_urb(uvc_urb->urb, mem_flags);
}
/*
* uvc_video_decode_data_work: Asynchronous memcpy processing
*
* Copy URB data to video buffers in process context, releasing buffer
* references and requeuing the URB when done.
*/
static void uvc_video_copy_data_work(struct work_struct *work)
{
struct uvc_urb *uvc_urb = container_of(work, struct uvc_urb, work);
unsigned int i;
int ret;
for (i = 0; i < uvc_urb->async_operations; i++) {
struct uvc_copy_op *op = &uvc_urb->copy_operations[i];
memcpy(op->dst, op->src, op->len);
/* Release reference taken on this buffer. */
uvc_queue_buffer_release(op->buf);
}
ret = uvc_submit_urb(uvc_urb, GFP_KERNEL);
if (ret < 0)
dev_err(&uvc_urb->stream->intf->dev,
"Failed to resubmit video URB (%d).\n", ret);
}
static void uvc_video_decode_data(struct uvc_urb *uvc_urb,
struct uvc_buffer *buf, const u8 *data, int len)
{
unsigned int active_op = uvc_urb->async_operations;
struct uvc_copy_op *op = &uvc_urb->copy_operations[active_op];
unsigned int maxlen;
if (len <= 0)
return;
maxlen = buf->length - buf->bytesused;
/* Take a buffer reference for async work. */
kref_get(&buf->ref);
op->buf = buf;
op->src = data;
op->dst = buf->mem + buf->bytesused;
op->len = min_t(unsigned int, len, maxlen);
buf->bytesused += op->len;
/* Complete the current frame if the buffer size was exceeded. */
if (len > maxlen) {
uvc_dbg(uvc_urb->stream->dev, FRAME,
"Frame complete (overflow)\n");
buf->error = 1;
buf->state = UVC_BUF_STATE_READY;
}
uvc_urb->async_operations++;
}
static void uvc_video_decode_end(struct uvc_streaming *stream,
struct uvc_buffer *buf, const u8 *data, int len)
{
/* Mark the buffer as done if the EOF marker is set. */
if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) {
uvc_dbg(stream->dev, FRAME, "Frame complete (EOF found)\n");
if (data[0] == len)
uvc_dbg(stream->dev, FRAME, "EOF in empty payload\n");
buf->state = UVC_BUF_STATE_READY;
if (stream->dev->quirks & UVC_QUIRK_STREAM_NO_FID)
stream->last_fid ^= UVC_STREAM_FID;
}
}
/*
* Video payload encoding is handled by uvc_video_encode_header() and
* uvc_video_encode_data(). Only bulk transfers are currently supported.
*
* uvc_video_encode_header is called at the start of a payload. It adds header
* data to the transfer buffer and returns the header size. As the only known
* UVC output device transfers a whole frame in a single payload, the EOF bit
* is always set in the header.
*
* uvc_video_encode_data is called for every URB and copies the data from the
* video buffer to the transfer buffer.
*/
static int uvc_video_encode_header(struct uvc_streaming *stream,
struct uvc_buffer *buf, u8 *data, int len)
{
data[0] = 2; /* Header length */
data[1] = UVC_STREAM_EOH | UVC_STREAM_EOF
| (stream->last_fid & UVC_STREAM_FID);
return 2;
}
static int uvc_video_encode_data(struct uvc_streaming *stream,
struct uvc_buffer *buf, u8 *data, int len)
{
struct uvc_video_queue *queue = &stream->queue;
unsigned int nbytes;
void *mem;
/* Copy video data to the URB buffer. */
mem = buf->mem + queue->buf_used;
nbytes = min((unsigned int)len, buf->bytesused - queue->buf_used);
nbytes = min(stream->bulk.max_payload_size - stream->bulk.payload_size,
nbytes);
memcpy(data, mem, nbytes);
queue->buf_used += nbytes;
return nbytes;
}
/* ------------------------------------------------------------------------
* Metadata
*/
/*
* Additionally to the payload headers we also want to provide the user with USB
* Frame Numbers and system time values. The resulting buffer is thus composed
* of blocks, containing a 64-bit timestamp in nanoseconds, a 16-bit USB Frame
* Number, and a copy of the payload header.
*
* Ideally we want to capture all payload headers for each frame. However, their
* number is unknown and unbound. We thus drop headers that contain no vendor
* data and that either contain no SCR value or an SCR value identical to the
* previous header.
*/
static void uvc_video_decode_meta(struct uvc_streaming *stream,
struct uvc_buffer *meta_buf,
const u8 *mem, unsigned int length)
{
struct uvc_meta_buf *meta;
size_t len_std = 2;
bool has_pts, has_scr;
unsigned long flags;
unsigned int sof;
ktime_t time;
const u8 *scr;
if (!meta_buf || length == 2)
return;
if (meta_buf->length - meta_buf->bytesused <
length + sizeof(meta->ns) + sizeof(meta->sof)) {
meta_buf->error = 1;
return;
}
has_pts = mem[1] & UVC_STREAM_PTS;
has_scr = mem[1] & UVC_STREAM_SCR;
if (has_pts) {
len_std += 4;
scr = mem + 6;
} else {
scr = mem + 2;
}
if (has_scr)
len_std += 6;
if (stream->meta.format == V4L2_META_FMT_UVC)
length = len_std;
if (length == len_std && (!has_scr ||
!memcmp(scr, stream->clock.last_scr, 6)))
return;
meta = (struct uvc_meta_buf *)((u8 *)meta_buf->mem + meta_buf->bytesused);
local_irq_save(flags);
time = uvc_video_get_time();
sof = usb_get_current_frame_number(stream->dev->udev);
local_irq_restore(flags);
put_unaligned(ktime_to_ns(time), &meta->ns);
put_unaligned(sof, &meta->sof);
if (has_scr)
memcpy(stream->clock.last_scr, scr, 6);
meta->length = mem[0];
meta->flags = mem[1];
memcpy(meta->buf, &mem[2], length - 2);
meta_buf->bytesused += length + sizeof(meta->ns) + sizeof(meta->sof);
uvc_dbg(stream->dev, FRAME,
"%s(): t-sys %lluns, SOF %u, len %u, flags 0x%x, PTS %u, STC %u frame SOF %u\n",
__func__, ktime_to_ns(time), meta->sof, meta->length,
meta->flags,
has_pts ? *(u32 *)meta->buf : 0,
has_scr ? *(u32 *)scr : 0,
has_scr ? *(u32 *)(scr + 4) & 0x7ff : 0);
}
/* ------------------------------------------------------------------------
* URB handling
*/
/*
* Set error flag for incomplete buffer.
*/
static void uvc_video_validate_buffer(const struct uvc_streaming *stream,
struct uvc_buffer *buf)
{
if (stream->ctrl.dwMaxVideoFrameSize != buf->bytesused &&
!(stream->cur_format->flags & UVC_FMT_FLAG_COMPRESSED))
buf->error = 1;
}
/*
* Completion handler for video URBs.
*/
static void uvc_video_next_buffers(struct uvc_streaming *stream,
struct uvc_buffer **video_buf, struct uvc_buffer **meta_buf)
{
uvc_video_validate_buffer(stream, *video_buf);
if (*meta_buf) {
struct vb2_v4l2_buffer *vb2_meta = &(*meta_buf)->buf;
const struct vb2_v4l2_buffer *vb2_video = &(*video_buf)->buf;
vb2_meta->sequence = vb2_video->sequence;
vb2_meta->field = vb2_video->field;
vb2_meta->vb2_buf.timestamp = vb2_video->vb2_buf.timestamp;
(*meta_buf)->state = UVC_BUF_STATE_READY;
if (!(*meta_buf)->error)
(*meta_buf)->error = (*video_buf)->error;
*meta_buf = uvc_queue_next_buffer(&stream->meta.queue,
*meta_buf);
}
*video_buf = uvc_queue_next_buffer(&stream->queue, *video_buf);
}
static void uvc_video_decode_isoc(struct uvc_urb *uvc_urb,
struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
{
struct urb *urb = uvc_urb->urb;
struct uvc_streaming *stream = uvc_urb->stream;
u8 *mem;
int ret, i;
for (i = 0; i < urb->number_of_packets; ++i) {
if (urb->iso_frame_desc[i].status < 0) {
uvc_dbg(stream->dev, FRAME,
"USB isochronous frame lost (%d)\n",
urb->iso_frame_desc[i].status);
/* Mark the buffer as faulty. */
if (buf != NULL)
buf->error = 1;
continue;
}
/* Decode the payload header. */
mem = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
do {
ret = uvc_video_decode_start(stream, buf, mem,
urb->iso_frame_desc[i].actual_length);
if (ret == -EAGAIN)
uvc_video_next_buffers(stream, &buf, &meta_buf);
} while (ret == -EAGAIN);
if (ret < 0)
continue;
uvc_video_decode_meta(stream, meta_buf, mem, ret);
/* Decode the payload data. */
uvc_video_decode_data(uvc_urb, buf, mem + ret,
urb->iso_frame_desc[i].actual_length - ret);
/* Process the header again. */
uvc_video_decode_end(stream, buf, mem,
urb->iso_frame_desc[i].actual_length);
if (buf->state == UVC_BUF_STATE_READY)
uvc_video_next_buffers(stream, &buf, &meta_buf);
}
}
static void uvc_video_decode_bulk(struct uvc_urb *uvc_urb,
struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
{
struct urb *urb = uvc_urb->urb;
struct uvc_streaming *stream = uvc_urb->stream;
u8 *mem;
int len, ret;
/*
* Ignore ZLPs if they're not part of a frame, otherwise process them
* to trigger the end of payload detection.
*/
if (urb->actual_length == 0 && stream->bulk.header_size == 0)
return;
mem = urb->transfer_buffer;
len = urb->actual_length;
stream->bulk.payload_size += len;
/*
* If the URB is the first of its payload, decode and save the
* header.
*/
if (stream->bulk.header_size == 0 && !stream->bulk.skip_payload) {
do {
ret = uvc_video_decode_start(stream, buf, mem, len);
if (ret == -EAGAIN)
uvc_video_next_buffers(stream, &buf, &meta_buf);
} while (ret == -EAGAIN);
/* If an error occurred skip the rest of the payload. */
if (ret < 0 || buf == NULL) {
stream->bulk.skip_payload = 1;
} else {
memcpy(stream->bulk.header, mem, ret);
stream->bulk.header_size = ret;
uvc_video_decode_meta(stream, meta_buf, mem, ret);
mem += ret;
len -= ret;
}
}
/*
* The buffer queue might have been cancelled while a bulk transfer
* was in progress, so we can reach here with buf equal to NULL. Make
* sure buf is never dereferenced if NULL.
*/
/* Prepare video data for processing. */
if (!stream->bulk.skip_payload && buf != NULL)
uvc_video_decode_data(uvc_urb, buf, mem, len);
/*
* Detect the payload end by a URB smaller than the maximum size (or
* a payload size equal to the maximum) and process the header again.
*/
if (urb->actual_length < urb->transfer_buffer_length ||
stream->bulk.payload_size >= stream->bulk.max_payload_size) {
if (!stream->bulk.skip_payload && buf != NULL) {
uvc_video_decode_end(stream, buf, stream->bulk.header,
stream->bulk.payload_size);
if (buf->state == UVC_BUF_STATE_READY)
uvc_video_next_buffers(stream, &buf, &meta_buf);
}
stream->bulk.header_size = 0;
stream->bulk.skip_payload = 0;
stream->bulk.payload_size = 0;
}
}
static void uvc_video_encode_bulk(struct uvc_urb *uvc_urb,
struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
{
struct urb *urb = uvc_urb->urb;
struct uvc_streaming *stream = uvc_urb->stream;
u8 *mem = urb->transfer_buffer;
int len = stream->urb_size, ret;
if (buf == NULL) {
urb->transfer_buffer_length = 0;
return;
}
/* If the URB is the first of its payload, add the header. */
if (stream->bulk.header_size == 0) {
ret = uvc_video_encode_header(stream, buf, mem, len);
stream->bulk.header_size = ret;
stream->bulk.payload_size += ret;
mem += ret;
len -= ret;
}
/* Process video data. */
ret = uvc_video_encode_data(stream, buf, mem, len);
stream->bulk.payload_size += ret;
len -= ret;
if (buf->bytesused == stream->queue.buf_used ||
stream->bulk.payload_size == stream->bulk.max_payload_size) {
if (buf->bytesused == stream->queue.buf_used) {
stream->queue.buf_used = 0;
buf->state = UVC_BUF_STATE_READY;
buf->buf.sequence = ++stream->sequence;
uvc_queue_next_buffer(&stream->queue, buf);
stream->last_fid ^= UVC_STREAM_FID;
}
stream->bulk.header_size = 0;
stream->bulk.payload_size = 0;
}
urb->transfer_buffer_length = stream->urb_size - len;
}
static void uvc_video_complete(struct urb *urb)
{
struct uvc_urb *uvc_urb = urb->context;
struct uvc_streaming *stream = uvc_urb->stream;
struct uvc_video_queue *queue = &stream->queue;
struct uvc_video_queue *qmeta = &stream->meta.queue;
struct vb2_queue *vb2_qmeta = stream->meta.vdev.queue;
struct uvc_buffer *buf = NULL;
struct uvc_buffer *buf_meta = NULL;
unsigned long flags;
int ret;
switch (urb->status) {
case 0:
break;
default:
dev_warn(&stream->intf->dev,
"Non-zero status (%d) in video completion handler.\n",
urb->status);
fallthrough;
case -ENOENT: /* usb_poison_urb() called. */
if (stream->frozen)
return;
fallthrough;
case -ECONNRESET: /* usb_unlink_urb() called. */
case -ESHUTDOWN: /* The endpoint is being disabled. */
uvc_queue_cancel(queue, urb->status == -ESHUTDOWN);
if (vb2_qmeta)
uvc_queue_cancel(qmeta, urb->status == -ESHUTDOWN);
return;
}
buf = uvc_queue_get_current_buffer(queue);
if (vb2_qmeta) {
spin_lock_irqsave(&qmeta->irqlock, flags);
if (!list_empty(&qmeta->irqqueue))
buf_meta = list_first_entry(&qmeta->irqqueue,
struct uvc_buffer, queue);
spin_unlock_irqrestore(&qmeta->irqlock, flags);
}
/* Re-initialise the URB async work. */
uvc_urb->async_operations = 0;
/* Sync DMA and invalidate vmap range. */
dma_sync_sgtable_for_cpu(uvc_stream_to_dmadev(uvc_urb->stream),
uvc_urb->sgt, uvc_stream_dir(stream));
invalidate_kernel_vmap_range(uvc_urb->buffer,
uvc_urb->stream->urb_size);
/*
* Process the URB headers, and optionally queue expensive memcpy tasks
* to be deferred to a work queue.
*/
stream->decode(uvc_urb, buf, buf_meta);
/* If no async work is needed, resubmit the URB immediately. */
if (!uvc_urb->async_operations) {
ret = uvc_submit_urb(uvc_urb, GFP_ATOMIC);
if (ret < 0)
dev_err(&stream->intf->dev,
"Failed to resubmit video URB (%d).\n", ret);
return;
}
queue_work(stream->async_wq, &uvc_urb->work);
}
/*
* Free transfer buffers.
*/
static void uvc_free_urb_buffers(struct uvc_streaming *stream)
{
struct device *dma_dev = uvc_stream_to_dmadev(stream);
struct uvc_urb *uvc_urb;
for_each_uvc_urb(uvc_urb, stream) {
if (!uvc_urb->buffer)
continue;
dma_vunmap_noncontiguous(dma_dev, uvc_urb->buffer);
dma_free_noncontiguous(dma_dev, stream->urb_size, uvc_urb->sgt,
uvc_stream_dir(stream));
uvc_urb->buffer = NULL;
uvc_urb->sgt = NULL;
}
stream->urb_size = 0;
}
static bool uvc_alloc_urb_buffer(struct uvc_streaming *stream,
struct uvc_urb *uvc_urb, gfp_t gfp_flags)
{
struct device *dma_dev = uvc_stream_to_dmadev(stream);
uvc_urb->sgt = dma_alloc_noncontiguous(dma_dev, stream->urb_size,
uvc_stream_dir(stream),
gfp_flags, 0);
if (!uvc_urb->sgt)
return false;
uvc_urb->dma = uvc_urb->sgt->sgl->dma_address;
uvc_urb->buffer = dma_vmap_noncontiguous(dma_dev, stream->urb_size,
uvc_urb->sgt);
if (!uvc_urb->buffer) {
dma_free_noncontiguous(dma_dev, stream->urb_size,
uvc_urb->sgt,
uvc_stream_dir(stream));
uvc_urb->sgt = NULL;
return false;
}
return true;
}
/*
* Allocate transfer buffers. This function can be called with buffers
* already allocated when resuming from suspend, in which case it will
* return without touching the buffers.
*
* Limit the buffer size to UVC_MAX_PACKETS bulk/isochronous packets. If the
* system is too low on memory try successively smaller numbers of packets
* until allocation succeeds.
*
* Return the number of allocated packets on success or 0 when out of memory.
*/
static int uvc_alloc_urb_buffers(struct uvc_streaming *stream,
unsigned int size, unsigned int psize, gfp_t gfp_flags)
{
unsigned int npackets;
unsigned int i;
/* Buffers are already allocated, bail out. */
if (stream->urb_size)
return stream->urb_size / psize;
/*
* Compute the number of packets. Bulk endpoints might transfer UVC
* payloads across multiple URBs.
*/
npackets = DIV_ROUND_UP(size, psize);
if (npackets > UVC_MAX_PACKETS)
npackets = UVC_MAX_PACKETS;
/* Retry allocations until one succeed. */
for (; npackets > 1; npackets /= 2) {
stream->urb_size = psize * npackets;
for (i = 0; i < UVC_URBS; ++i) {
struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
if (!uvc_alloc_urb_buffer(stream, uvc_urb, gfp_flags)) {
uvc_free_urb_buffers(stream);
break;
}
uvc_urb->stream = stream;
}
if (i == UVC_URBS) {
uvc_dbg(stream->dev, VIDEO,
"Allocated %u URB buffers of %ux%u bytes each\n",
UVC_URBS, npackets, psize);
return npackets;
}
}
uvc_dbg(stream->dev, VIDEO,
"Failed to allocate URB buffers (%u bytes per packet)\n",
psize);
return 0;
}
/*
* Uninitialize isochronous/bulk URBs and free transfer buffers.
*/
static void uvc_video_stop_transfer(struct uvc_streaming *stream,
int free_buffers)
{
struct uvc_urb *uvc_urb;
uvc_video_stats_stop(stream);
/*
* We must poison the URBs rather than kill them to ensure that even
* after the completion handler returns, any asynchronous workqueues
* will be prevented from resubmitting the URBs.
*/
for_each_uvc_urb(uvc_urb, stream)
usb_poison_urb(uvc_urb->urb);
flush_workqueue(stream->async_wq);
for_each_uvc_urb(uvc_urb, stream) {
usb_free_urb(uvc_urb->urb);
uvc_urb->urb = NULL;
}
if (free_buffers)
uvc_free_urb_buffers(stream);
}
/*
* Compute the maximum number of bytes per interval for an endpoint.
*/
u16 uvc_endpoint_max_bpi(struct usb_device *dev, struct usb_host_endpoint *ep)
{
u16 psize;
switch (dev->speed) {
case USB_SPEED_SUPER:
case USB_SPEED_SUPER_PLUS:
return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
default:
psize = usb_endpoint_maxp(&ep->desc);
psize *= usb_endpoint_maxp_mult(&ep->desc);
return psize;
}
}
/*
* Initialize isochronous URBs and allocate transfer buffers. The packet size
* is given by the endpoint.
*/
static int uvc_init_video_isoc(struct uvc_streaming *stream,
struct usb_host_endpoint *ep, gfp_t gfp_flags)
{
struct urb *urb;
struct uvc_urb *uvc_urb;
unsigned int npackets, i;
u16 psize;
u32 size;
psize = uvc_endpoint_max_bpi(stream->dev->udev, ep);
size = stream->ctrl.dwMaxVideoFrameSize;
npackets = uvc_alloc_urb_buffers(stream, size, psize, gfp_flags);
if (npackets == 0)
return -ENOMEM;
size = npackets * psize;
for_each_uvc_urb(uvc_urb, stream) {
urb = usb_alloc_urb(npackets, gfp_flags);
if (urb == NULL) {
uvc_video_stop_transfer(stream, 1);
return -ENOMEM;
}
urb->dev = stream->dev->udev;
urb->context = uvc_urb;
urb->pipe = usb_rcvisocpipe(stream->dev->udev,
ep->desc.bEndpointAddress);
urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
urb->transfer_dma = uvc_urb->dma;
urb->interval = ep->desc.bInterval;
urb->transfer_buffer = uvc_urb->buffer;
urb->complete = uvc_video_complete;
urb->number_of_packets = npackets;
urb->transfer_buffer_length = size;
for (i = 0; i < npackets; ++i) {
urb->iso_frame_desc[i].offset = i * psize;
urb->iso_frame_desc[i].length = psize;
}
uvc_urb->urb = urb;
}
return 0;
}
/*
* Initialize bulk URBs and allocate transfer buffers. The packet size is
* given by the endpoint.
*/
static int uvc_init_video_bulk(struct uvc_streaming *stream,
struct usb_host_endpoint *ep, gfp_t gfp_flags)
{
struct urb *urb;
struct uvc_urb *uvc_urb;
unsigned int npackets, pipe;
u16 psize;
u32 size;
psize = usb_endpoint_maxp(&ep->desc);
size = stream->ctrl.dwMaxPayloadTransferSize;
stream->bulk.max_payload_size = size;
npackets = uvc_alloc_urb_buffers(stream, size, psize, gfp_flags);
if (npackets == 0)
return -ENOMEM;
size = npackets * psize;
if (usb_endpoint_dir_in(&ep->desc))
pipe = usb_rcvbulkpipe(stream->dev->udev,
ep->desc.bEndpointAddress);
else
pipe = usb_sndbulkpipe(stream->dev->udev,
ep->desc.bEndpointAddress);
if (stream->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
size = 0;
for_each_uvc_urb(uvc_urb, stream) {
urb = usb_alloc_urb(0, gfp_flags);
if (urb == NULL) {
uvc_video_stop_transfer(stream, 1);
return -ENOMEM;
}
usb_fill_bulk_urb(urb, stream->dev->udev, pipe, uvc_urb->buffer,
size, uvc_video_complete, uvc_urb);
urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
urb->transfer_dma = uvc_urb->dma;
uvc_urb->urb = urb;
}
return 0;
}
/*
* Initialize isochronous/bulk URBs and allocate transfer buffers.
*/
static int uvc_video_start_transfer(struct uvc_streaming *stream,
gfp_t gfp_flags)
{
struct usb_interface *intf = stream->intf;
struct usb_host_endpoint *ep;
struct uvc_urb *uvc_urb;
unsigned int i;
int ret;
stream->sequence = -1;
stream->last_fid = -1;
stream->bulk.header_size = 0;
stream->bulk.skip_payload = 0;
stream->bulk.payload_size = 0;
uvc_video_stats_start(stream);
if (intf->num_altsetting > 1) {
struct usb_host_endpoint *best_ep = NULL;
unsigned int best_psize = UINT_MAX;
unsigned int bandwidth;
unsigned int altsetting;
int intfnum = stream->intfnum;
/* Isochronous endpoint, select the alternate setting. */
bandwidth = stream->ctrl.dwMaxPayloadTransferSize;
if (bandwidth == 0) {
uvc_dbg(stream->dev, VIDEO,
"Device requested null bandwidth, defaulting to lowest\n");
bandwidth = 1;
} else {
uvc_dbg(stream->dev, VIDEO,
"Device requested %u B/frame bandwidth\n",
bandwidth);
}
for (i = 0; i < intf->num_altsetting; ++i) {
struct usb_host_interface *alts;
unsigned int psize;
alts = &intf->altsetting[i];
ep = uvc_find_endpoint(alts,
stream->header.bEndpointAddress);
if (ep == NULL)
continue;
/* Check if the bandwidth is high enough. */
psize = uvc_endpoint_max_bpi(stream->dev->udev, ep);
if (psize >= bandwidth && psize <= best_psize) {
altsetting = alts->desc.bAlternateSetting;
best_psize = psize;
best_ep = ep;
}
}
if (best_ep == NULL) {
uvc_dbg(stream->dev, VIDEO,
"No fast enough alt setting for requested bandwidth\n");
return -EIO;
}
uvc_dbg(stream->dev, VIDEO,
"Selecting alternate setting %u (%u B/frame bandwidth)\n",
altsetting, best_psize);
/*
* Some devices, namely the Logitech C910 and B910, are unable
* to recover from a USB autosuspend, unless the alternate
* setting of the streaming interface is toggled.
*/
if (stream->dev->quirks & UVC_QUIRK_WAKE_AUTOSUSPEND) {
usb_set_interface(stream->dev->udev, intfnum,
altsetting);
usb_set_interface(stream->dev->udev, intfnum, 0);
}
ret = usb_set_interface(stream->dev->udev, intfnum, altsetting);
if (ret < 0)
return ret;
ret = uvc_init_video_isoc(stream, best_ep, gfp_flags);
} else {
/* Bulk endpoint, proceed to URB initialization. */
ep = uvc_find_endpoint(&intf->altsetting[0],
stream->header.bEndpointAddress);
if (ep == NULL)
return -EIO;
/* Reject broken descriptors. */
if (usb_endpoint_maxp(&ep->desc) == 0)
return -EIO;
ret = uvc_init_video_bulk(stream, ep, gfp_flags);
}
if (ret < 0)
return ret;
/* Submit the URBs. */
for_each_uvc_urb(uvc_urb, stream) {
ret = uvc_submit_urb(uvc_urb, gfp_flags);
if (ret < 0) {
dev_err(&stream->intf->dev,
"Failed to submit URB %u (%d).\n",
uvc_urb_index(uvc_urb), ret);
uvc_video_stop_transfer(stream, 1);
return ret;
}
}
/*
* The Logitech C920 temporarily forgets that it should not be adjusting
* Exposure Absolute during init so restore controls to stored values.
*/
if (stream->dev->quirks & UVC_QUIRK_RESTORE_CTRLS_ON_INIT)
uvc_ctrl_restore_values(stream->dev);
return 0;
}
/* --------------------------------------------------------------------------
* Suspend/resume
*/
/*
* Stop streaming without disabling the video queue.
*
* To let userspace applications resume without trouble, we must not touch the
* video buffers in any way. We mark the device as frozen to make sure the URB
* completion handler won't try to cancel the queue when we kill the URBs.
*/
int uvc_video_suspend(struct uvc_streaming *stream)
{
if (!uvc_queue_streaming(&stream->queue))
return 0;
stream->frozen = 1;
uvc_video_stop_transfer(stream, 0);
usb_set_interface(stream->dev->udev, stream->intfnum, 0);
return 0;
}
/*
* Reconfigure the video interface and restart streaming if it was enabled
* before suspend.
*
* If an error occurs, disable the video queue. This will wake all pending
* buffers, making sure userspace applications are notified of the problem
* instead of waiting forever.
*/
int uvc_video_resume(struct uvc_streaming *stream, int reset)
{
int ret;
/*
* If the bus has been reset on resume, set the alternate setting to 0.
* This should be the default value, but some devices crash or otherwise
* misbehave if they don't receive a SET_INTERFACE request before any
* other video control request.
*/
if (reset)
usb_set_interface(stream->dev->udev, stream->intfnum, 0);
stream->frozen = 0;
uvc_video_clock_reset(stream);
if (!uvc_queue_streaming(&stream->queue))
return 0;
ret = uvc_commit_video(stream, &stream->ctrl);
if (ret < 0)
return ret;
return uvc_video_start_transfer(stream, GFP_NOIO);
}
/* ------------------------------------------------------------------------
* Video device
*/
/*
* Initialize the UVC video device by switching to alternate setting 0 and
* retrieve the default format.
*
* Some cameras (namely the Fuji Finepix) set the format and frame
* indexes to zero. The UVC standard doesn't clearly make this a spec
* violation, so try to silently fix the values if possible.
*
* This function is called before registering the device with V4L.
*/
int uvc_video_init(struct uvc_streaming *stream)
{
struct uvc_streaming_control *probe = &stream->ctrl;
const struct uvc_format *format = NULL;
const struct uvc_frame *frame = NULL;
struct uvc_urb *uvc_urb;
unsigned int i;
int ret;
if (stream->nformats == 0) {
dev_info(&stream->intf->dev,
"No supported video formats found.\n");
return -EINVAL;
}
atomic_set(&stream->active, 0);
/*
* Alternate setting 0 should be the default, yet the XBox Live Vision
* Cam (and possibly other devices) crash or otherwise misbehave if
* they don't receive a SET_INTERFACE request before any other video
* control request.
*/
usb_set_interface(stream->dev->udev, stream->intfnum, 0);
/*
* Set the streaming probe control with default streaming parameters
* retrieved from the device. Webcams that don't support GET_DEF
* requests on the probe control will just keep their current streaming
* parameters.
*/
if (uvc_get_video_ctrl(stream, probe, 1, UVC_GET_DEF) == 0)
uvc_set_video_ctrl(stream, probe, 1);
/*
* Initialize the streaming parameters with the probe control current
* value. This makes sure SET_CUR requests on the streaming commit
* control will always use values retrieved from a successful GET_CUR
* request on the probe control, as required by the UVC specification.
*/
ret = uvc_get_video_ctrl(stream, probe, 1, UVC_GET_CUR);
/*
* Elgato Cam Link 4k can be in a stalled state if the resolution of
* the external source has changed while the firmware initializes.
* Once in this state, the device is useless until it receives a
* USB reset. It has even been observed that the stalled state will
* continue even after unplugging the device.
*/
if (ret == -EPROTO &&
usb_match_one_id(stream->dev->intf, &elgato_cam_link_4k)) {
dev_err(&stream->intf->dev, "Elgato Cam Link 4K firmware crash detected\n");
dev_err(&stream->intf->dev, "Resetting the device, unplug and replug to recover\n");
usb_reset_device(stream->dev->udev);
}
if (ret < 0)
return ret;
/*
* Check if the default format descriptor exists. Use the first
* available format otherwise.
*/
for (i = stream->nformats; i > 0; --i) {
format = &stream->formats[i-1];
if (format->index == probe->bFormatIndex)
break;
}
if (format->nframes == 0) {
dev_info(&stream->intf->dev,
"No frame descriptor found for the default format.\n");
return -EINVAL;
}
/*
* Zero bFrameIndex might be correct. Stream-based formats (including
* MPEG-2 TS and DV) do not support frames but have a dummy frame
* descriptor with bFrameIndex set to zero. If the default frame
* descriptor is not found, use the first available frame.
*/
for (i = format->nframes; i > 0; --i) {
frame = &format->frames[i-1];
if (frame->bFrameIndex == probe->bFrameIndex)
break;
}
probe->bFormatIndex = format->index;
probe->bFrameIndex = frame->bFrameIndex;
stream->def_format = format;
stream->cur_format = format;
stream->cur_frame = frame;
/* Select the video decoding function */
if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
if (stream->dev->quirks & UVC_QUIRK_BUILTIN_ISIGHT)
stream->decode = uvc_video_decode_isight;
else if (stream->intf->num_altsetting > 1)
stream->decode = uvc_video_decode_isoc;
else
stream->decode = uvc_video_decode_bulk;
} else {
if (stream->intf->num_altsetting == 1)
stream->decode = uvc_video_encode_bulk;
else {
dev_info(&stream->intf->dev,
"Isochronous endpoints are not supported for video output devices.\n");
return -EINVAL;
}
}
/* Prepare asynchronous work items. */
for_each_uvc_urb(uvc_urb, stream)
INIT_WORK(&uvc_urb->work, uvc_video_copy_data_work);
return 0;
}
int uvc_video_start_streaming(struct uvc_streaming *stream)
{
int ret;
ret = uvc_video_clock_init(stream);
if (ret < 0)
return ret;
/* Commit the streaming parameters. */
ret = uvc_commit_video(stream, &stream->ctrl);
if (ret < 0)
goto error_commit;
ret = uvc_video_start_transfer(stream, GFP_KERNEL);
if (ret < 0)
goto error_video;
return 0;
error_video:
usb_set_interface(stream->dev->udev, stream->intfnum, 0);
error_commit:
uvc_video_clock_cleanup(stream);
return ret;
}
void uvc_video_stop_streaming(struct uvc_streaming *stream)
{
uvc_video_stop_transfer(stream, 1);
if (stream->intf->num_altsetting > 1) {
usb_set_interface(stream->dev->udev, stream->intfnum, 0);
} else {
/*
* UVC doesn't specify how to inform a bulk-based device
* when the video stream is stopped. Windows sends a
* CLEAR_FEATURE(HALT) request to the video streaming
* bulk endpoint, mimic the same behaviour.
*/
unsigned int epnum = stream->header.bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK;
unsigned int dir = stream->header.bEndpointAddress
& USB_ENDPOINT_DIR_MASK;
unsigned int pipe;
pipe = usb_sndbulkpipe(stream->dev->udev, epnum) | dir;
usb_clear_halt(stream->dev->udev, pipe);
}
uvc_video_clock_cleanup(stream);
}
| linux-master | drivers/media/usb/uvc/uvc_video.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
(C) 2004-2006 Luc Saillard ([email protected])
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
/* This tables contains entries for the 730/740/750 (Kiara) camera, with
4 different qualities (no compression, low, medium, high).
It lists the bandwidth requirements for said mode by its alternate interface
number. An alternate of 0 means that the mode is unavailable.
There are 6 * 4 * 4 entries:
6 different resolutions subqcif, qsif, qcif, sif, cif, vga
6 framerates: 5, 10, 15, 20, 25, 30
4 compression modi: none, low, medium, high
When an uncompressed mode is not available, the next available compressed mode
will be chosen (unless the decompressor is absent). Sometimes there are only
1 or 2 compressed modes available; in that case entries are duplicated.
*/
#include "pwc-kiara.h"
const unsigned int Kiara_fps_vector[PWC_FPS_MAX_KIARA] = { 5, 10, 15, 20, 25, 30 };
const struct Kiara_table_entry Kiara_table[PSZ_MAX][6][4] =
{
/* SQCIF */
{
/* 5 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 10 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 15 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 20 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 25 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 30 fps */
{
{0, },
{0, },
{0, },
{0, },
},
},
/* QSIF */
{
/* 5 fps */
{
{1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
{1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
{1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
{1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
},
/* 10 fps */
{
{2, 291, 0, {0x1C, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x23, 0x01, 0x80}},
{1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
{1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
{1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
},
/* 15 fps */
{
{3, 437, 0, {0x1B, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xB5, 0x01, 0x80}},
{2, 292, 640, {0x13, 0xF4, 0x30, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x20, 0x24, 0x01, 0x80}},
{2, 292, 640, {0x13, 0xF4, 0x30, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x20, 0x24, 0x01, 0x80}},
{1, 192, 420, {0x13, 0xF4, 0x30, 0x0D, 0x1B, 0x0C, 0x53, 0x1E, 0x18, 0xC0, 0x00, 0x80}},
},
/* 20 fps */
{
{4, 589, 0, {0x1A, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x4D, 0x02, 0x80}},
{3, 448, 730, {0x12, 0xF4, 0x30, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x18, 0xC0, 0x01, 0x80}},
{2, 292, 476, {0x12, 0xF4, 0x30, 0x0E, 0xD8, 0x0E, 0x10, 0x19, 0x18, 0x24, 0x01, 0x80}},
{1, 192, 312, {0x12, 0xF4, 0x50, 0x09, 0xB3, 0x08, 0xEB, 0x1E, 0x18, 0xC0, 0x00, 0x80}},
},
/* 25 fps */
{
{5, 703, 0, {0x19, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xBF, 0x02, 0x80}},
{3, 447, 610, {0x11, 0xF4, 0x30, 0x13, 0x0B, 0x12, 0x43, 0x14, 0x28, 0xBF, 0x01, 0x80}},
{2, 292, 398, {0x11, 0xF4, 0x50, 0x0C, 0x6C, 0x0B, 0xA4, 0x1E, 0x28, 0x24, 0x01, 0x80}},
{1, 193, 262, {0x11, 0xF4, 0x50, 0x08, 0x23, 0x07, 0x5B, 0x1E, 0x28, 0xC1, 0x00, 0x80}},
},
/* 30 fps */
{
{8, 874, 0, {0x18, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x6A, 0x03, 0x80}},
{5, 704, 730, {0x10, 0xF4, 0x30, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x28, 0xC0, 0x02, 0x80}},
{3, 448, 492, {0x10, 0xF4, 0x30, 0x0F, 0x5D, 0x0E, 0x95, 0x15, 0x28, 0xC0, 0x01, 0x80}},
{2, 292, 320, {0x10, 0xF4, 0x50, 0x09, 0xFB, 0x09, 0x33, 0x1E, 0x28, 0x24, 0x01, 0x80}},
},
},
/* QCIF */
{
/* 5 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 10 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 15 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 20 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 25 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 30 fps */
{
{0, },
{0, },
{0, },
{0, },
},
},
/* SIF */
{
/* 5 fps */
{
{4, 582, 0, {0x0D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x46, 0x02, 0x80}},
{3, 387, 1276, {0x05, 0xF4, 0x30, 0x27, 0xD8, 0x26, 0x48, 0x03, 0x10, 0x83, 0x01, 0x80}},
{2, 291, 960, {0x05, 0xF4, 0x30, 0x1D, 0xF2, 0x1C, 0x62, 0x04, 0x10, 0x23, 0x01, 0x80}},
{1, 191, 630, {0x05, 0xF4, 0x50, 0x13, 0xA9, 0x12, 0x19, 0x05, 0x18, 0xBF, 0x00, 0x80}},
},
/* 10 fps */
{
{0, },
{6, 775, 1278, {0x04, 0xF4, 0x30, 0x27, 0xE8, 0x26, 0x58, 0x05, 0x30, 0x07, 0x03, 0x80}},
{3, 447, 736, {0x04, 0xF4, 0x30, 0x16, 0xFB, 0x15, 0x6B, 0x05, 0x28, 0xBF, 0x01, 0x80}},
{2, 292, 480, {0x04, 0xF4, 0x70, 0x0E, 0xF9, 0x0D, 0x69, 0x09, 0x28, 0x24, 0x01, 0x80}},
},
/* 15 fps */
{
{0, },
{9, 955, 1050, {0x03, 0xF4, 0x30, 0x20, 0xCF, 0x1F, 0x3F, 0x06, 0x48, 0xBB, 0x03, 0x80}},
{4, 592, 650, {0x03, 0xF4, 0x30, 0x14, 0x44, 0x12, 0xB4, 0x08, 0x30, 0x50, 0x02, 0x80}},
{3, 448, 492, {0x03, 0xF4, 0x50, 0x0F, 0x52, 0x0D, 0xC2, 0x09, 0x38, 0xC0, 0x01, 0x80}},
},
/* 20 fps */
{
{0, },
{9, 958, 782, {0x02, 0xF4, 0x30, 0x18, 0x6A, 0x16, 0xDA, 0x0B, 0x58, 0xBE, 0x03, 0x80}},
{5, 703, 574, {0x02, 0xF4, 0x50, 0x11, 0xE7, 0x10, 0x57, 0x0B, 0x40, 0xBF, 0x02, 0x80}},
{3, 446, 364, {0x02, 0xF4, 0x90, 0x0B, 0x5C, 0x09, 0xCC, 0x0E, 0x38, 0xBE, 0x01, 0x80}},
},
/* 25 fps */
{
{0, },
{9, 958, 654, {0x01, 0xF4, 0x30, 0x14, 0x66, 0x12, 0xD6, 0x0B, 0x50, 0xBE, 0x03, 0x80}},
{6, 776, 530, {0x01, 0xF4, 0x50, 0x10, 0x8C, 0x0E, 0xFC, 0x0C, 0x48, 0x08, 0x03, 0x80}},
{4, 592, 404, {0x01, 0xF4, 0x70, 0x0C, 0x96, 0x0B, 0x06, 0x0B, 0x48, 0x50, 0x02, 0x80}},
},
/* 30 fps */
{
{0, },
{9, 957, 526, {0x00, 0xF4, 0x50, 0x10, 0x68, 0x0E, 0xD8, 0x0D, 0x58, 0xBD, 0x03, 0x80}},
{6, 775, 426, {0x00, 0xF4, 0x70, 0x0D, 0x48, 0x0B, 0xB8, 0x0F, 0x50, 0x07, 0x03, 0x80}},
{4, 590, 324, {0x00, 0x7A, 0x88, 0x0A, 0x1C, 0x08, 0xB4, 0x0E, 0x50, 0x4E, 0x02, 0x80}},
},
},
/* CIF */
{
/* 5 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 10 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 15 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 20 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 25 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 30 fps */
{
{0, },
{0, },
{0, },
{0, },
},
},
/* VGA */
{
/* 5 fps */
{
{0, },
{6, 773, 1272, {0x25, 0xF4, 0x30, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x03, 0x80}},
{4, 592, 976, {0x25, 0xF4, 0x50, 0x1E, 0x78, 0x1B, 0x58, 0x03, 0x30, 0x50, 0x02, 0x80}},
{3, 448, 738, {0x25, 0xF4, 0x90, 0x17, 0x0C, 0x13, 0xEC, 0x04, 0x30, 0xC0, 0x01, 0x80}},
},
/* 10 fps */
{
{0, },
{9, 956, 788, {0x24, 0xF4, 0x70, 0x18, 0x9C, 0x15, 0x7C, 0x03, 0x48, 0xBC, 0x03, 0x80}},
{6, 776, 640, {0x24, 0xF4, 0xB0, 0x13, 0xFC, 0x11, 0x2C, 0x04, 0x48, 0x08, 0x03, 0x80}},
{4, 592, 488, {0x24, 0x7A, 0xE8, 0x0F, 0x3C, 0x0C, 0x6C, 0x06, 0x48, 0x50, 0x02, 0x80}},
},
/* 15 fps */
{
{0, },
{9, 957, 526, {0x23, 0x7A, 0xE8, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x03, 0x80}},
{9, 957, 526, {0x23, 0x7A, 0xE8, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x03, 0x80}},
{8, 895, 492, {0x23, 0x7A, 0xE8, 0x0F, 0x5D, 0x0C, 0x8D, 0x06, 0x58, 0x7F, 0x03, 0x80}},
},
/* 20 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 25 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 30 fps */
{
{0, },
{0, },
{0, },
{0, },
},
},
};
/*
* Rom table for kiara chips
*
* 32 roms tables (one for each resolution ?)
* 2 tables per roms (one for each passes) (Y, and U&V)
* 128 bytes per passes
*/
const unsigned int KiaraRomTable [8][2][16][8] =
{
{ /* version 0 */
{ /* version 0, passes 0 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000001,0x00000001},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000009,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000249,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000249,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x0000124a,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x0000124a,0x00009252,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00009252,0x00009292,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009292,0x00009292,0x00009493,0x000124db},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x0000a493,0x000124db,0x000124db,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x000124db,0x000126dc,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000124db,0x000136e4,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 0, passes 1 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000001,0x00000009,
0x00000009,0x00000009,0x00000009,0x00000001},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000249,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00001252},
{0x00000000,0x00000000,0x00000049,0x00001249,
0x0000124a,0x0000124a,0x00001252,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009252,0x00009292,0x00009493},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009292,0x00009292,0x00009292,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00009292,
0x00009492,0x00009493,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009252,0x00009493,
0x000126dc,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000136e4,0x000136e4,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 1 */
{ /* version 1, passes 0 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000001},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00001252},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009252,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009252,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009292,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00009252,
0x00009492,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x000124db,0x000124db,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000126dc,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 1, passes 1 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000009,
0x00000049,0x00000009,0x00000001,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000000},
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000249,0x00000049,0x0000024a,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x0000024a,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x0000024a,0x00000009},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009252,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009292,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009292,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009292,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x0000924a,0x0000924a,
0x00009492,0x00009493,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 2 */
{ /* version 2, passes 0 */
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x00009252,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009493,0x00009493,0x0000a49b},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009292,0x00009493,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x000124db,0x000124db,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x00009252,0x000124db,
0x000126dc,0x0001b724,0x0001b725,0x0001b925},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 2, passes 1 */
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00000249,
0x0000124a,0x0000124a,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00009292,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x0000a49b,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00009252,0x0000a49b,
0x0001249b,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 3 */
{ /* version 3, passes 0 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000136e4,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x0001b725,0x0001b925},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x000136e4,0x0001b925,0x00025bb6,0x00024b77},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 3, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00000249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x00009493,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x000126dc,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000136e4,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 4 */
{ /* version 4, passes 0 */
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000249,0x00000249,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x00009252,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009292,0x00009493,0x00009493,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0001249b,0x000126dc,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00009252,0x00009493,
0x000124db,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009252,0x0000a49b,
0x000124db,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000126dc,0x0001b724,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 4, passes 1 */
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000009,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000049,0x00000049,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00000249,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x0000124a,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009252,0x0000124a,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x00009252,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x00009292,0x00009292,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009292,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009493,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000124db,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009252,0x000124db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 5 */
{ /* version 5, passes 0 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x000124db,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001b725,0x000136e4},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x0001c96e,0x0001b925},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 5, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009252,0x00009252,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x00009292,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000124db,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000124db,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000126dc,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 6 */
{ /* version 6, passes 0 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001b725,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
{0x00000000,0x00000000,0x00012492,0x000126db,
0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 6, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x00009252,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009292,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000124db,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000126dc,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 7 */
{ /* version 7, passes 0 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x00001249,0x0000a49b,
0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x0001b725,0x000124db},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000136e4,0x0001b724,0x0001b725,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000136e4,0x0001b724,0x0001b725,0x000126dc},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b724,0x0001c96e,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b924,0x0001c92d,0x00024b76,0x0002496e},
{0x00000000,0x00000000,0x00012492,0x000136db,
0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 7, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x00009492,0x00009292,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000124db,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000136db,
0x0001b724,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000136db,
0x0001b724,0x000126dc,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00009292,0x000136db,
0x0001b724,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001b724,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00012492,0x0001b6db,
0x0001c924,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
}
};
| linux-master | drivers/media/usb/pwc/pwc-kiara.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
USB and Video4Linux interface part.
(C) 1999-2004 Nemosoft Unv.
(C) 2004-2006 Luc Saillard ([email protected])
(C) 2011 Hans de Goede <[email protected]>
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
/*
This code forms the interface between the USB layers and the Philips
specific stuff. Some adanved stuff of the driver falls under an
NDA, signed between me and Philips B.V., Eindhoven, the Netherlands, and
is thus not distributed in source form. The binary pwcx.o module
contains the code that falls under the NDA.
In case you're wondering: 'pwc' stands for "Philips WebCam", but
I really didn't want to type 'philips_web_cam' every time (I'm lazy as
any Linux kernel hacker, but I don't like uncomprehensible abbreviations
without explanation).
Oh yes, convention: to disctinguish between all the various pointers to
device-structures, I use these names for the pointer variables:
udev: struct usb_device *
vdev: struct video_device (member of pwc_dev)
pdev: struct pwc_devive *
*/
/* Contributors:
- Alvarado: adding whitebalance code
- Alistar Moire: QuickCam 3000 Pro device/product ID
- Tony Hoyle: Creative Labs Webcam 5 device/product ID
- Mark Burazin: solving hang in VIDIOCSYNC when camera gets unplugged
- Jk Fang: Sotec Afina Eye ID
- Xavier Roche: QuickCam Pro 4000 ID
- Jens Knudsen: QuickCam Zoom ID
- J. Debert: QuickCam for Notebooks ID
- Pham Thanh Nam: webcam snapshot button as an event input device
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/poll.h>
#include <linux/slab.h>
#ifdef CONFIG_USB_PWC_INPUT_EVDEV
#include <linux/usb/input.h>
#endif
#include <linux/vmalloc.h>
#include <asm/io.h>
#include <linux/kernel.h> /* simple_strtol() */
#include "pwc.h"
#include "pwc-kiara.h"
#include "pwc-timon.h"
#include "pwc-dec23.h"
#include "pwc-dec1.h"
#define CREATE_TRACE_POINTS
#include <trace/events/pwc.h>
/* Function prototypes and driver templates */
/* hotplug device table support */
static const struct usb_device_id pwc_device_table [] = {
{ USB_DEVICE(0x041E, 0x400C) }, /* Creative Webcam 5 */
{ USB_DEVICE(0x041E, 0x4011) }, /* Creative Webcam Pro Ex */
{ USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam 3000 Pro */
{ USB_DEVICE(0x046D, 0x08B1) }, /* Logitech QuickCam Notebook Pro */
{ USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam 4000 Pro */
{ USB_DEVICE(0x046D, 0x08B3) }, /* Logitech QuickCam Zoom (old model) */
{ USB_DEVICE(0x046D, 0x08B4) }, /* Logitech QuickCam Zoom (new model) */
{ USB_DEVICE(0x046D, 0x08B5) }, /* Logitech QuickCam Orbit/Sphere */
{ USB_DEVICE(0x046D, 0x08B6) }, /* Logitech/Cisco VT Camera */
{ USB_DEVICE(0x046D, 0x08B7) }, /* Logitech ViewPort AV 100 */
{ USB_DEVICE(0x046D, 0x08B8) }, /* Logitech QuickCam */
{ USB_DEVICE(0x0471, 0x0302) }, /* Philips PCA645VC */
{ USB_DEVICE(0x0471, 0x0303) }, /* Philips PCA646VC */
{ USB_DEVICE(0x0471, 0x0304) }, /* Askey VC010 type 2 */
{ USB_DEVICE(0x0471, 0x0307) }, /* Philips PCVC675K (Vesta) */
{ USB_DEVICE(0x0471, 0x0308) }, /* Philips PCVC680K (Vesta Pro) */
{ USB_DEVICE(0x0471, 0x030C) }, /* Philips PCVC690K (Vesta Pro Scan) */
{ USB_DEVICE(0x0471, 0x0310) }, /* Philips PCVC730K (ToUCam Fun)/PCVC830 (ToUCam II) */
{ USB_DEVICE(0x0471, 0x0311) }, /* Philips PCVC740K (ToUCam Pro)/PCVC840 (ToUCam II) */
{ USB_DEVICE(0x0471, 0x0312) }, /* Philips PCVC750K (ToUCam Pro Scan) */
{ USB_DEVICE(0x0471, 0x0313) }, /* Philips PCVC720K/40 (ToUCam XS) */
{ USB_DEVICE(0x0471, 0x0329) }, /* Philips SPC 900NC webcam */
{ USB_DEVICE(0x0471, 0x032C) }, /* Philips SPC 880NC webcam */
{ USB_DEVICE(0x04CC, 0x8116) }, /* Sotec Afina Eye */
{ USB_DEVICE(0x055D, 0x9000) }, /* Samsung MPC-C10 */
{ USB_DEVICE(0x055D, 0x9001) }, /* Samsung MPC-C30 */
{ USB_DEVICE(0x055D, 0x9002) }, /* Samsung SNC-35E (Ver3.0) */
{ USB_DEVICE(0x069A, 0x0001) }, /* Askey VC010 type 1 */
{ USB_DEVICE(0x06BE, 0x8116) }, /* AME Co. Afina Eye */
{ USB_DEVICE(0x0d81, 0x1900) }, /* Visionite VCS-UC300 */
{ USB_DEVICE(0x0d81, 0x1910) }, /* Visionite VCS-UM100 */
{ }
};
MODULE_DEVICE_TABLE(usb, pwc_device_table);
static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id);
static void usb_pwc_disconnect(struct usb_interface *intf);
static void pwc_isoc_cleanup(struct pwc_device *pdev);
static struct usb_driver pwc_driver = {
.name = "Philips webcam", /* name */
.id_table = pwc_device_table,
.probe = usb_pwc_probe, /* probe() */
.disconnect = usb_pwc_disconnect, /* disconnect() */
};
#define MAX_DEV_HINTS 20
#define MAX_ISOC_ERRORS 20
#ifdef CONFIG_USB_PWC_DEBUG
int pwc_trace = PWC_DEBUG_LEVEL;
#endif
static int power_save = -1;
static int leds[2] = { 100, 0 };
/***/
static const struct v4l2_file_operations pwc_fops = {
.owner = THIS_MODULE,
.open = v4l2_fh_open,
.release = vb2_fop_release,
.read = vb2_fop_read,
.poll = vb2_fop_poll,
.mmap = vb2_fop_mmap,
.unlocked_ioctl = video_ioctl2,
};
static const struct video_device pwc_template = {
.name = "Philips Webcam", /* Filled in later */
.release = video_device_release_empty,
.fops = &pwc_fops,
.ioctl_ops = &pwc_ioctl_ops,
};
/***************************************************************************/
/* Private functions */
static void *pwc_alloc_urb_buffer(struct usb_device *dev,
size_t size, dma_addr_t *dma_handle)
{
struct device *dmadev = dev->bus->sysdev;
void *buffer = kmalloc(size, GFP_KERNEL);
if (!buffer)
return NULL;
*dma_handle = dma_map_single(dmadev, buffer, size, DMA_FROM_DEVICE);
if (dma_mapping_error(dmadev, *dma_handle)) {
kfree(buffer);
return NULL;
}
return buffer;
}
static void pwc_free_urb_buffer(struct usb_device *dev,
size_t size,
void *buffer,
dma_addr_t dma_handle)
{
struct device *dmadev = dev->bus->sysdev;
dma_unmap_single(dmadev, dma_handle, size, DMA_FROM_DEVICE);
kfree(buffer);
}
static struct pwc_frame_buf *pwc_get_next_fill_buf(struct pwc_device *pdev)
{
unsigned long flags = 0;
struct pwc_frame_buf *buf = NULL;
spin_lock_irqsave(&pdev->queued_bufs_lock, flags);
if (list_empty(&pdev->queued_bufs))
goto leave;
buf = list_entry(pdev->queued_bufs.next, struct pwc_frame_buf, list);
list_del(&buf->list);
leave:
spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags);
return buf;
}
static void pwc_snapshot_button(struct pwc_device *pdev, int down)
{
if (down) {
PWC_TRACE("Snapshot button pressed.\n");
} else {
PWC_TRACE("Snapshot button released.\n");
}
#ifdef CONFIG_USB_PWC_INPUT_EVDEV
if (pdev->button_dev) {
input_report_key(pdev->button_dev, KEY_CAMERA, down);
input_sync(pdev->button_dev);
}
#endif
}
static void pwc_frame_complete(struct pwc_device *pdev)
{
struct pwc_frame_buf *fbuf = pdev->fill_buf;
/* The ToUCam Fun CMOS sensor causes the firmware to send 2 or 3 bogus
frames on the USB wire after an exposure change. This conditition is
however detected in the cam and a bit is set in the header.
*/
if (pdev->type == 730) {
unsigned char *ptr = (unsigned char *)fbuf->data;
if (ptr[1] == 1 && ptr[0] & 0x10) {
PWC_TRACE("Hyundai CMOS sensor bug. Dropping frame.\n");
pdev->drop_frames += 2;
}
if ((ptr[0] ^ pdev->vmirror) & 0x01) {
pwc_snapshot_button(pdev, ptr[0] & 0x01);
}
if ((ptr[0] ^ pdev->vmirror) & 0x02) {
if (ptr[0] & 0x02)
PWC_TRACE("Image is mirrored.\n");
else
PWC_TRACE("Image is normal.\n");
}
pdev->vmirror = ptr[0] & 0x03;
/* Sometimes the trailer of the 730 is still sent as a 4 byte packet
after a short frame; this condition is filtered out specifically. A 4 byte
frame doesn't make sense anyway.
So we get either this sequence:
drop_bit set -> 4 byte frame -> short frame -> good frame
Or this one:
drop_bit set -> short frame -> good frame
So we drop either 3 or 2 frames in all!
*/
if (fbuf->filled == 4)
pdev->drop_frames++;
} else if (pdev->type == 740 || pdev->type == 720) {
unsigned char *ptr = (unsigned char *)fbuf->data;
if ((ptr[0] ^ pdev->vmirror) & 0x01) {
pwc_snapshot_button(pdev, ptr[0] & 0x01);
}
pdev->vmirror = ptr[0] & 0x03;
}
/* In case we were instructed to drop the frame, do so silently. */
if (pdev->drop_frames > 0) {
pdev->drop_frames--;
} else {
/* Check for underflow first */
if (fbuf->filled < pdev->frame_total_size) {
PWC_DEBUG_FLOW("Frame buffer underflow (%d bytes); discarded.\n",
fbuf->filled);
} else {
fbuf->vb.field = V4L2_FIELD_NONE;
fbuf->vb.sequence = pdev->vframe_count;
vb2_buffer_done(&fbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
pdev->fill_buf = NULL;
pdev->vsync = 0;
}
} /* !drop_frames */
pdev->vframe_count++;
}
/* This gets called for the Isochronous pipe (video). This is done in
* interrupt time, so it has to be fast, not crash, and not stall. Neat.
*/
static void pwc_isoc_handler(struct urb *urb)
{
struct pwc_device *pdev = (struct pwc_device *)urb->context;
struct device *dmadev = urb->dev->bus->sysdev;
int i, fst, flen;
unsigned char *iso_buf = NULL;
trace_pwc_handler_enter(urb, pdev);
if (urb->status == -ENOENT || urb->status == -ECONNRESET ||
urb->status == -ESHUTDOWN) {
PWC_DEBUG_OPEN("URB (%p) unlinked %ssynchronously.\n",
urb, urb->status == -ENOENT ? "" : "a");
return;
}
if (pdev->fill_buf == NULL)
pdev->fill_buf = pwc_get_next_fill_buf(pdev);
if (urb->status != 0) {
const char *errmsg;
errmsg = "Unknown";
switch(urb->status) {
case -ENOSR: errmsg = "Buffer error (overrun)"; break;
case -EPIPE: errmsg = "Stalled (device not responding)"; break;
case -EOVERFLOW: errmsg = "Babble (bad cable?)"; break;
case -EPROTO: errmsg = "Bit-stuff error (bad cable?)"; break;
case -EILSEQ: errmsg = "CRC/Timeout (could be anything)"; break;
case -ETIME: errmsg = "Device does not respond"; break;
}
PWC_ERROR("pwc_isoc_handler() called with status %d [%s].\n",
urb->status, errmsg);
/* Give up after a number of contiguous errors */
if (++pdev->visoc_errors > MAX_ISOC_ERRORS)
{
PWC_ERROR("Too many ISOC errors, bailing out.\n");
if (pdev->fill_buf) {
vb2_buffer_done(&pdev->fill_buf->vb.vb2_buf,
VB2_BUF_STATE_ERROR);
pdev->fill_buf = NULL;
}
}
pdev->vsync = 0; /* Drop the current frame */
goto handler_end;
}
/* Reset ISOC error counter. We did get here, after all. */
pdev->visoc_errors = 0;
dma_sync_single_for_cpu(dmadev,
urb->transfer_dma,
urb->transfer_buffer_length,
DMA_FROM_DEVICE);
/* vsync: 0 = don't copy data
1 = sync-hunt
2 = synched
*/
/* Compact data */
for (i = 0; i < urb->number_of_packets; i++) {
fst = urb->iso_frame_desc[i].status;
flen = urb->iso_frame_desc[i].actual_length;
iso_buf = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
if (fst != 0) {
PWC_ERROR("Iso frame %d has error %d\n", i, fst);
continue;
}
if (flen > 0 && pdev->vsync) {
struct pwc_frame_buf *fbuf = pdev->fill_buf;
if (pdev->vsync == 1) {
fbuf->vb.vb2_buf.timestamp = ktime_get_ns();
pdev->vsync = 2;
}
if (flen + fbuf->filled > pdev->frame_total_size) {
PWC_ERROR("Frame overflow (%d > %d)\n",
flen + fbuf->filled,
pdev->frame_total_size);
pdev->vsync = 0; /* Let's wait for an EOF */
} else {
memcpy(fbuf->data + fbuf->filled, iso_buf,
flen);
fbuf->filled += flen;
}
}
if (flen < pdev->vlast_packet_size) {
/* Shorter packet... end of frame */
if (pdev->vsync == 2)
pwc_frame_complete(pdev);
if (pdev->fill_buf == NULL)
pdev->fill_buf = pwc_get_next_fill_buf(pdev);
if (pdev->fill_buf) {
pdev->fill_buf->filled = 0;
pdev->vsync = 1;
}
}
pdev->vlast_packet_size = flen;
}
dma_sync_single_for_device(dmadev,
urb->transfer_dma,
urb->transfer_buffer_length,
DMA_FROM_DEVICE);
handler_end:
trace_pwc_handler_exit(urb, pdev);
i = usb_submit_urb(urb, GFP_ATOMIC);
if (i != 0)
PWC_ERROR("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i);
}
/* Both v4l2_lock and vb_queue_lock should be locked when calling this */
static int pwc_isoc_init(struct pwc_device *pdev)
{
struct usb_device *udev;
struct urb *urb;
int i, j, ret;
struct usb_interface *intf;
struct usb_host_interface *idesc = NULL;
int compression = 0; /* 0..3 = uncompressed..high */
pdev->vsync = 0;
pdev->vlast_packet_size = 0;
pdev->fill_buf = NULL;
pdev->vframe_count = 0;
pdev->visoc_errors = 0;
udev = pdev->udev;
retry:
/* We first try with low compression and then retry with a higher
compression setting if there is not enough bandwidth. */
ret = pwc_set_video_mode(pdev, pdev->width, pdev->height, pdev->pixfmt,
pdev->vframes, &compression, 1);
/* Get the current alternate interface, adjust packet size */
intf = usb_ifnum_to_if(udev, 0);
if (intf)
idesc = usb_altnum_to_altsetting(intf, pdev->valternate);
if (!idesc)
return -EIO;
/* Search video endpoint */
pdev->vmax_packet_size = -1;
for (i = 0; i < idesc->desc.bNumEndpoints; i++) {
if ((idesc->endpoint[i].desc.bEndpointAddress & 0xF) == pdev->vendpoint) {
pdev->vmax_packet_size = le16_to_cpu(idesc->endpoint[i].desc.wMaxPacketSize);
break;
}
}
if (pdev->vmax_packet_size < 0 || pdev->vmax_packet_size > ISO_MAX_FRAME_SIZE) {
PWC_ERROR("Failed to find packet size for video endpoint in current alternate setting.\n");
return -ENFILE; /* Odd error, that should be noticeable */
}
/* Set alternate interface */
PWC_DEBUG_OPEN("Setting alternate interface %d\n", pdev->valternate);
ret = usb_set_interface(pdev->udev, 0, pdev->valternate);
if (ret == -ENOSPC && compression < 3) {
compression++;
goto retry;
}
if (ret < 0)
return ret;
/* Allocate and init Isochronuous urbs */
for (i = 0; i < MAX_ISO_BUFS; i++) {
urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL);
if (urb == NULL) {
pwc_isoc_cleanup(pdev);
return -ENOMEM;
}
pdev->urbs[i] = urb;
PWC_DEBUG_MEMORY("Allocated URB at 0x%p\n", urb);
urb->interval = 1; // devik
urb->dev = udev;
urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint);
urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
urb->transfer_buffer_length = ISO_BUFFER_SIZE;
urb->transfer_buffer = pwc_alloc_urb_buffer(udev,
urb->transfer_buffer_length,
&urb->transfer_dma);
if (urb->transfer_buffer == NULL) {
PWC_ERROR("Failed to allocate urb buffer %d\n", i);
pwc_isoc_cleanup(pdev);
return -ENOMEM;
}
urb->complete = pwc_isoc_handler;
urb->context = pdev;
urb->start_frame = 0;
urb->number_of_packets = ISO_FRAMES_PER_DESC;
for (j = 0; j < ISO_FRAMES_PER_DESC; j++) {
urb->iso_frame_desc[j].offset = j * ISO_MAX_FRAME_SIZE;
urb->iso_frame_desc[j].length = pdev->vmax_packet_size;
}
}
/* link */
for (i = 0; i < MAX_ISO_BUFS; i++) {
ret = usb_submit_urb(pdev->urbs[i], GFP_KERNEL);
if (ret == -ENOSPC && compression < 3) {
compression++;
pwc_isoc_cleanup(pdev);
goto retry;
}
if (ret) {
PWC_ERROR("isoc_init() submit_urb %d failed with error %d\n", i, ret);
pwc_isoc_cleanup(pdev);
return ret;
}
PWC_DEBUG_MEMORY("URB 0x%p submitted.\n", pdev->urbs[i]);
}
/* All is done... */
PWC_DEBUG_OPEN("<< pwc_isoc_init()\n");
return 0;
}
static void pwc_iso_stop(struct pwc_device *pdev)
{
int i;
/* Unlinking ISOC buffers one by one */
for (i = 0; i < MAX_ISO_BUFS; i++) {
if (pdev->urbs[i]) {
PWC_DEBUG_MEMORY("Unlinking URB %p\n", pdev->urbs[i]);
usb_kill_urb(pdev->urbs[i]);
}
}
}
static void pwc_iso_free(struct pwc_device *pdev)
{
int i;
/* Freeing ISOC buffers one by one */
for (i = 0; i < MAX_ISO_BUFS; i++) {
struct urb *urb = pdev->urbs[i];
if (urb) {
PWC_DEBUG_MEMORY("Freeing URB\n");
if (urb->transfer_buffer)
pwc_free_urb_buffer(urb->dev,
urb->transfer_buffer_length,
urb->transfer_buffer,
urb->transfer_dma);
usb_free_urb(urb);
pdev->urbs[i] = NULL;
}
}
}
/* Both v4l2_lock and vb_queue_lock should be locked when calling this */
static void pwc_isoc_cleanup(struct pwc_device *pdev)
{
PWC_DEBUG_OPEN(">> pwc_isoc_cleanup()\n");
pwc_iso_stop(pdev);
pwc_iso_free(pdev);
usb_set_interface(pdev->udev, 0, 0);
PWC_DEBUG_OPEN("<< pwc_isoc_cleanup()\n");
}
/* Must be called with vb_queue_lock hold */
static void pwc_cleanup_queued_bufs(struct pwc_device *pdev,
enum vb2_buffer_state state)
{
unsigned long flags = 0;
spin_lock_irqsave(&pdev->queued_bufs_lock, flags);
while (!list_empty(&pdev->queued_bufs)) {
struct pwc_frame_buf *buf;
buf = list_entry(pdev->queued_bufs.next, struct pwc_frame_buf,
list);
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, state);
}
spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags);
}
#ifdef CONFIG_USB_PWC_DEBUG
static const char *pwc_sensor_type_to_string(unsigned int sensor_type)
{
switch(sensor_type) {
case 0x00:
return "Hyundai CMOS sensor";
case 0x20:
return "Sony CCD sensor + TDA8787";
case 0x2E:
return "Sony CCD sensor + Exas 98L59";
case 0x2F:
return "Sony CCD sensor + ADI 9804";
case 0x30:
return "Sharp CCD sensor + TDA8787";
case 0x3E:
return "Sharp CCD sensor + Exas 98L59";
case 0x3F:
return "Sharp CCD sensor + ADI 9804";
case 0x40:
return "UPA 1021 sensor";
case 0x100:
return "VGA sensor";
case 0x101:
return "PAL MR sensor";
default:
return "unknown type of sensor";
}
}
#endif
/***************************************************************************/
/* Video4Linux functions */
static void pwc_video_release(struct v4l2_device *v)
{
struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev);
v4l2_ctrl_handler_free(&pdev->ctrl_handler);
v4l2_device_unregister(&pdev->v4l2_dev);
kfree(pdev->ctrl_buf);
kfree(pdev);
}
/***************************************************************************/
/* Videobuf2 operations */
static int queue_setup(struct vb2_queue *vq,
unsigned int *nbuffers, unsigned int *nplanes,
unsigned int sizes[], struct device *alloc_devs[])
{
struct pwc_device *pdev = vb2_get_drv_priv(vq);
int size;
if (*nbuffers < MIN_FRAMES)
*nbuffers = MIN_FRAMES;
else if (*nbuffers > MAX_FRAMES)
*nbuffers = MAX_FRAMES;
*nplanes = 1;
size = pwc_get_size(pdev, MAX_WIDTH, MAX_HEIGHT);
sizes[0] = PAGE_ALIGN(pwc_image_sizes[size][0] *
pwc_image_sizes[size][1] * 3 / 2);
return 0;
}
static int buffer_init(struct vb2_buffer *vb)
{
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct pwc_frame_buf *buf =
container_of(vbuf, struct pwc_frame_buf, vb);
/* need vmalloc since frame buffer > 128K */
buf->data = vzalloc(PWC_FRAME_SIZE);
if (buf->data == NULL)
return -ENOMEM;
return 0;
}
static int buffer_prepare(struct vb2_buffer *vb)
{
struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue);
/* Don't allow queueing new buffers after device disconnection */
if (!pdev->udev)
return -ENODEV;
return 0;
}
static void buffer_finish(struct vb2_buffer *vb)
{
struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue);
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct pwc_frame_buf *buf =
container_of(vbuf, struct pwc_frame_buf, vb);
if (vb->state == VB2_BUF_STATE_DONE) {
/*
* Application has called dqbuf and is getting back a buffer
* we've filled, take the pwc data we've stored in buf->data
* and decompress it into a usable format, storing the result
* in the vb2_buffer.
*/
pwc_decompress(pdev, buf);
}
}
static void buffer_cleanup(struct vb2_buffer *vb)
{
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct pwc_frame_buf *buf =
container_of(vbuf, struct pwc_frame_buf, vb);
vfree(buf->data);
}
static void buffer_queue(struct vb2_buffer *vb)
{
struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue);
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct pwc_frame_buf *buf =
container_of(vbuf, struct pwc_frame_buf, vb);
unsigned long flags = 0;
/* Check the device has not disconnected between prep and queuing */
if (!pdev->udev) {
vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
return;
}
spin_lock_irqsave(&pdev->queued_bufs_lock, flags);
list_add_tail(&buf->list, &pdev->queued_bufs);
spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags);
}
static int start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct pwc_device *pdev = vb2_get_drv_priv(vq);
int r;
if (!pdev->udev)
return -ENODEV;
if (mutex_lock_interruptible(&pdev->v4l2_lock))
return -ERESTARTSYS;
/* Turn on camera and set LEDS on */
pwc_camera_power(pdev, 1);
pwc_set_leds(pdev, leds[0], leds[1]);
r = pwc_isoc_init(pdev);
if (r) {
/* If we failed turn camera and LEDS back off */
pwc_set_leds(pdev, 0, 0);
pwc_camera_power(pdev, 0);
/* And cleanup any queued bufs!! */
pwc_cleanup_queued_bufs(pdev, VB2_BUF_STATE_QUEUED);
}
mutex_unlock(&pdev->v4l2_lock);
return r;
}
static void stop_streaming(struct vb2_queue *vq)
{
struct pwc_device *pdev = vb2_get_drv_priv(vq);
mutex_lock(&pdev->v4l2_lock);
if (pdev->udev) {
pwc_set_leds(pdev, 0, 0);
pwc_camera_power(pdev, 0);
pwc_isoc_cleanup(pdev);
}
pwc_cleanup_queued_bufs(pdev, VB2_BUF_STATE_ERROR);
if (pdev->fill_buf)
vb2_buffer_done(&pdev->fill_buf->vb.vb2_buf,
VB2_BUF_STATE_ERROR);
mutex_unlock(&pdev->v4l2_lock);
}
static const struct vb2_ops pwc_vb_queue_ops = {
.queue_setup = queue_setup,
.buf_init = buffer_init,
.buf_prepare = buffer_prepare,
.buf_finish = buffer_finish,
.buf_cleanup = buffer_cleanup,
.buf_queue = buffer_queue,
.start_streaming = start_streaming,
.stop_streaming = stop_streaming,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
};
/***************************************************************************/
/* USB functions */
/* This function gets called when a new device is plugged in or the usb core
* is loaded.
*/
static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id)
{
struct usb_device *udev = interface_to_usbdev(intf);
struct pwc_device *pdev = NULL;
int vendor_id, product_id, type_id;
int rc;
int features = 0;
int compression = 0;
int my_power_save = power_save;
char serial_number[30], *name;
vendor_id = le16_to_cpu(udev->descriptor.idVendor);
product_id = le16_to_cpu(udev->descriptor.idProduct);
/* Check if we can handle this device */
PWC_DEBUG_PROBE("probe() called [%04X %04X], if %d\n",
vendor_id, product_id,
intf->altsetting->desc.bInterfaceNumber);
/* the interfaces are probed one by one. We are only interested in the
video interface (0) now.
Interface 1 is the Audio Control, and interface 2 Audio itself.
*/
if (intf->altsetting->desc.bInterfaceNumber > 0)
return -ENODEV;
if (vendor_id == 0x0471) {
switch (product_id) {
case 0x0302:
PWC_INFO("Philips PCA645VC USB webcam detected.\n");
name = "Philips 645 webcam";
type_id = 645;
break;
case 0x0303:
PWC_INFO("Philips PCA646VC USB webcam detected.\n");
name = "Philips 646 webcam";
type_id = 646;
break;
case 0x0304:
PWC_INFO("Askey VC010 type 2 USB webcam detected.\n");
name = "Askey VC010 webcam";
type_id = 646;
break;
case 0x0307:
PWC_INFO("Philips PCVC675K (Vesta) USB webcam detected.\n");
name = "Philips 675 webcam";
type_id = 675;
break;
case 0x0308:
PWC_INFO("Philips PCVC680K (Vesta Pro) USB webcam detected.\n");
name = "Philips 680 webcam";
type_id = 680;
break;
case 0x030C:
PWC_INFO("Philips PCVC690K (Vesta Pro Scan) USB webcam detected.\n");
name = "Philips 690 webcam";
type_id = 690;
break;
case 0x0310:
PWC_INFO("Philips PCVC730K (ToUCam Fun)/PCVC830 (ToUCam II) USB webcam detected.\n");
name = "Philips 730 webcam";
type_id = 730;
break;
case 0x0311:
PWC_INFO("Philips PCVC740K (ToUCam Pro)/PCVC840 (ToUCam II) USB webcam detected.\n");
name = "Philips 740 webcam";
type_id = 740;
break;
case 0x0312:
PWC_INFO("Philips PCVC750K (ToUCam Pro Scan) USB webcam detected.\n");
name = "Philips 750 webcam";
type_id = 750;
break;
case 0x0313:
PWC_INFO("Philips PCVC720K/40 (ToUCam XS) USB webcam detected.\n");
name = "Philips 720K/40 webcam";
type_id = 720;
break;
case 0x0329:
PWC_INFO("Philips SPC 900NC USB webcam detected.\n");
name = "Philips SPC 900NC webcam";
type_id = 740;
break;
case 0x032C:
PWC_INFO("Philips SPC 880NC USB webcam detected.\n");
name = "Philips SPC 880NC webcam";
type_id = 740;
break;
default:
return -ENODEV;
}
}
else if (vendor_id == 0x069A) {
switch(product_id) {
case 0x0001:
PWC_INFO("Askey VC010 type 1 USB webcam detected.\n");
name = "Askey VC010 webcam";
type_id = 645;
break;
default:
return -ENODEV;
}
}
else if (vendor_id == 0x046d) {
switch(product_id) {
case 0x08b0:
PWC_INFO("Logitech QuickCam Pro 3000 USB webcam detected.\n");
name = "Logitech QuickCam Pro 3000";
type_id = 740; /* CCD sensor */
break;
case 0x08b1:
PWC_INFO("Logitech QuickCam Notebook Pro USB webcam detected.\n");
name = "Logitech QuickCam Notebook Pro";
type_id = 740; /* CCD sensor */
break;
case 0x08b2:
PWC_INFO("Logitech QuickCam 4000 Pro USB webcam detected.\n");
name = "Logitech QuickCam Pro 4000";
type_id = 740; /* CCD sensor */
if (my_power_save == -1)
my_power_save = 1;
break;
case 0x08b3:
PWC_INFO("Logitech QuickCam Zoom USB webcam detected.\n");
name = "Logitech QuickCam Zoom";
type_id = 740; /* CCD sensor */
break;
case 0x08B4:
PWC_INFO("Logitech QuickCam Zoom (new model) USB webcam detected.\n");
name = "Logitech QuickCam Zoom";
type_id = 740; /* CCD sensor */
if (my_power_save == -1)
my_power_save = 1;
break;
case 0x08b5:
PWC_INFO("Logitech QuickCam Orbit/Sphere USB webcam detected.\n");
name = "Logitech QuickCam Orbit";
type_id = 740; /* CCD sensor */
if (my_power_save == -1)
my_power_save = 1;
features |= FEATURE_MOTOR_PANTILT;
break;
case 0x08b6:
PWC_INFO("Logitech/Cisco VT Camera webcam detected.\n");
name = "Cisco VT Camera";
type_id = 740; /* CCD sensor */
break;
case 0x08b7:
PWC_INFO("Logitech ViewPort AV 100 webcam detected.\n");
name = "Logitech ViewPort AV 100";
type_id = 740; /* CCD sensor */
break;
case 0x08b8: /* Where this released? */
PWC_INFO("Logitech QuickCam detected (reserved ID).\n");
name = "Logitech QuickCam (res.)";
type_id = 730; /* Assuming CMOS */
break;
default:
return -ENODEV;
}
}
else if (vendor_id == 0x055d) {
/* I don't know the difference between the C10 and the C30;
I suppose the difference is the sensor, but both cameras
work equally well with a type_id of 675
*/
switch(product_id) {
case 0x9000:
PWC_INFO("Samsung MPC-C10 USB webcam detected.\n");
name = "Samsung MPC-C10";
type_id = 675;
break;
case 0x9001:
PWC_INFO("Samsung MPC-C30 USB webcam detected.\n");
name = "Samsung MPC-C30";
type_id = 675;
break;
case 0x9002:
PWC_INFO("Samsung SNC-35E (v3.0) USB webcam detected.\n");
name = "Samsung MPC-C30";
type_id = 740;
break;
default:
return -ENODEV;
}
}
else if (vendor_id == 0x041e) {
switch(product_id) {
case 0x400c:
PWC_INFO("Creative Labs Webcam 5 detected.\n");
name = "Creative Labs Webcam 5";
type_id = 730;
if (my_power_save == -1)
my_power_save = 1;
break;
case 0x4011:
PWC_INFO("Creative Labs Webcam Pro Ex detected.\n");
name = "Creative Labs Webcam Pro Ex";
type_id = 740;
break;
default:
return -ENODEV;
}
}
else if (vendor_id == 0x04cc) {
switch(product_id) {
case 0x8116:
PWC_INFO("Sotec Afina Eye USB webcam detected.\n");
name = "Sotec Afina Eye";
type_id = 730;
break;
default:
return -ENODEV;
}
}
else if (vendor_id == 0x06be) {
switch(product_id) {
case 0x8116:
/* This is essentially the same cam as the Sotec Afina Eye */
PWC_INFO("AME Co. Afina Eye USB webcam detected.\n");
name = "AME Co. Afina Eye";
type_id = 750;
break;
default:
return -ENODEV;
}
}
else if (vendor_id == 0x0d81) {
switch(product_id) {
case 0x1900:
PWC_INFO("Visionite VCS-UC300 USB webcam detected.\n");
name = "Visionite VCS-UC300";
type_id = 740; /* CCD sensor */
break;
case 0x1910:
PWC_INFO("Visionite VCS-UM100 USB webcam detected.\n");
name = "Visionite VCS-UM100";
type_id = 730; /* CMOS sensor */
break;
default:
return -ENODEV;
}
}
else
return -ENODEV; /* Not any of the know types; but the list keeps growing. */
if (my_power_save == -1)
my_power_save = 0;
memset(serial_number, 0, 30);
usb_string(udev, udev->descriptor.iSerialNumber, serial_number, 29);
PWC_DEBUG_PROBE("Device serial number is %s\n", serial_number);
if (udev->descriptor.bNumConfigurations > 1)
PWC_WARNING("Warning: more than 1 configuration available.\n");
/* Allocate structure, initialize pointers, mutexes, etc. and link it to the usb_device */
pdev = kzalloc(sizeof(struct pwc_device), GFP_KERNEL);
if (pdev == NULL) {
PWC_ERROR("Oops, could not allocate memory for pwc_device.\n");
return -ENOMEM;
}
pdev->type = type_id;
pdev->features = features;
pwc_construct(pdev); /* set min/max sizes correct */
mutex_init(&pdev->v4l2_lock);
mutex_init(&pdev->vb_queue_lock);
spin_lock_init(&pdev->queued_bufs_lock);
INIT_LIST_HEAD(&pdev->queued_bufs);
pdev->udev = udev;
pdev->power_save = my_power_save;
/* Init videobuf2 queue structure */
pdev->vb_queue.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
pdev->vb_queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ;
pdev->vb_queue.drv_priv = pdev;
pdev->vb_queue.buf_struct_size = sizeof(struct pwc_frame_buf);
pdev->vb_queue.ops = &pwc_vb_queue_ops;
pdev->vb_queue.mem_ops = &vb2_vmalloc_memops;
pdev->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
rc = vb2_queue_init(&pdev->vb_queue);
if (rc < 0) {
PWC_ERROR("Oops, could not initialize vb2 queue.\n");
goto err_free_mem;
}
/* Init video_device structure */
pdev->vdev = pwc_template;
strscpy(pdev->vdev.name, name, sizeof(pdev->vdev.name));
pdev->vdev.queue = &pdev->vb_queue;
pdev->vdev.queue->lock = &pdev->vb_queue_lock;
video_set_drvdata(&pdev->vdev, pdev);
pdev->release = le16_to_cpu(udev->descriptor.bcdDevice);
PWC_DEBUG_PROBE("Release: %04x\n", pdev->release);
/* Allocate USB command buffers */
pdev->ctrl_buf = kmalloc(sizeof(pdev->cmd_buf), GFP_KERNEL);
if (!pdev->ctrl_buf) {
PWC_ERROR("Oops, could not allocate memory for pwc_device.\n");
rc = -ENOMEM;
goto err_free_mem;
}
#ifdef CONFIG_USB_PWC_DEBUG
/* Query sensor type */
if (pwc_get_cmos_sensor(pdev, &rc) >= 0) {
PWC_DEBUG_OPEN("This %s camera is equipped with a %s (%d).\n",
pdev->vdev.name,
pwc_sensor_type_to_string(rc), rc);
}
#endif
/* Set the leds off */
pwc_set_leds(pdev, 0, 0);
/* Setup initial videomode */
rc = pwc_set_video_mode(pdev, MAX_WIDTH, MAX_HEIGHT,
V4L2_PIX_FMT_YUV420, 30, &compression, 1);
if (rc)
goto err_free_mem;
/* Register controls (and read default values from camera */
rc = pwc_init_controls(pdev);
if (rc) {
PWC_ERROR("Failed to register v4l2 controls (%d).\n", rc);
goto err_free_mem;
}
/* And powerdown the camera until streaming starts */
pwc_camera_power(pdev, 0);
/* Register the v4l2_device structure */
pdev->v4l2_dev.release = pwc_video_release;
rc = v4l2_device_register(&intf->dev, &pdev->v4l2_dev);
if (rc) {
PWC_ERROR("Failed to register v4l2-device (%d).\n", rc);
goto err_free_controls;
}
pdev->v4l2_dev.ctrl_handler = &pdev->ctrl_handler;
pdev->vdev.v4l2_dev = &pdev->v4l2_dev;
pdev->vdev.lock = &pdev->v4l2_lock;
pdev->vdev.device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
V4L2_CAP_READWRITE;
rc = video_register_device(&pdev->vdev, VFL_TYPE_VIDEO, -1);
if (rc < 0) {
PWC_ERROR("Failed to register as video device (%d).\n", rc);
goto err_unregister_v4l2_dev;
}
PWC_INFO("Registered as %s.\n", video_device_node_name(&pdev->vdev));
#ifdef CONFIG_USB_PWC_INPUT_EVDEV
/* register webcam snapshot button input device */
pdev->button_dev = input_allocate_device();
if (!pdev->button_dev) {
rc = -ENOMEM;
goto err_video_unreg;
}
usb_make_path(udev, pdev->button_phys, sizeof(pdev->button_phys));
strlcat(pdev->button_phys, "/input0", sizeof(pdev->button_phys));
pdev->button_dev->name = "PWC snapshot button";
pdev->button_dev->phys = pdev->button_phys;
usb_to_input_id(pdev->udev, &pdev->button_dev->id);
pdev->button_dev->dev.parent = &pdev->udev->dev;
pdev->button_dev->evbit[0] = BIT_MASK(EV_KEY);
pdev->button_dev->keybit[BIT_WORD(KEY_CAMERA)] = BIT_MASK(KEY_CAMERA);
rc = input_register_device(pdev->button_dev);
if (rc) {
input_free_device(pdev->button_dev);
pdev->button_dev = NULL;
goto err_video_unreg;
}
#endif
return 0;
#ifdef CONFIG_USB_PWC_INPUT_EVDEV
err_video_unreg:
video_unregister_device(&pdev->vdev);
#endif
err_unregister_v4l2_dev:
v4l2_device_unregister(&pdev->v4l2_dev);
err_free_controls:
v4l2_ctrl_handler_free(&pdev->ctrl_handler);
err_free_mem:
kfree(pdev->ctrl_buf);
kfree(pdev);
return rc;
}
/* The user yanked out the cable... */
static void usb_pwc_disconnect(struct usb_interface *intf)
{
struct v4l2_device *v = usb_get_intfdata(intf);
struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev);
mutex_lock(&pdev->vb_queue_lock);
mutex_lock(&pdev->v4l2_lock);
/* No need to keep the urbs around after disconnection */
if (pdev->vb_queue.streaming)
pwc_isoc_cleanup(pdev);
pdev->udev = NULL;
v4l2_device_disconnect(&pdev->v4l2_dev);
video_unregister_device(&pdev->vdev);
mutex_unlock(&pdev->v4l2_lock);
mutex_unlock(&pdev->vb_queue_lock);
#ifdef CONFIG_USB_PWC_INPUT_EVDEV
if (pdev->button_dev)
input_unregister_device(pdev->button_dev);
#endif
v4l2_device_put(&pdev->v4l2_dev);
}
/*
* Initialization code & module stuff
*/
static unsigned int leds_nargs;
#ifdef CONFIG_USB_PWC_DEBUG
module_param_named(trace, pwc_trace, int, 0644);
#endif
module_param(power_save, int, 0644);
module_param_array(leds, int, &leds_nargs, 0444);
#ifdef CONFIG_USB_PWC_DEBUG
MODULE_PARM_DESC(trace, "For debugging purposes");
#endif
MODULE_PARM_DESC(power_save, "Turn power saving for new cameras on or off");
MODULE_PARM_DESC(leds, "LED on,off time in milliseconds");
MODULE_DESCRIPTION("Philips & OEM USB webcam driver");
MODULE_AUTHOR("Luc Saillard <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("pwcx");
MODULE_VERSION( PWC_VERSION );
module_usb_driver(pwc_driver);
| linux-master | drivers/media/usb/pwc/pwc-if.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
(C) 2004-2006 Luc Saillard ([email protected])
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
/* This tables contains entries for the 675/680/690 (Timon) camera, with
4 different qualities (no compression, low, medium, high).
It lists the bandwidth requirements for said mode by its alternate interface
number. An alternate of 0 means that the mode is unavailable.
There are 6 * 4 * 4 entries:
6 different resolutions subqcif, qsif, qcif, sif, cif, vga
6 framerates: 5, 10, 15, 20, 25, 30
4 compression modi: none, low, medium, high
When an uncompressed mode is not available, the next available compressed mode
will be chosen (unless the decompressor is absent). Sometimes there are only
1 or 2 compressed modes available; in that case entries are duplicated.
*/
#include "pwc-timon.h"
const unsigned int Timon_fps_vector[PWC_FPS_MAX_TIMON] = { 5, 10, 15, 20, 25, 30 };
const struct Timon_table_entry Timon_table[PSZ_MAX][PWC_FPS_MAX_TIMON][4] =
{
/* SQCIF */
{
/* 5 fps */
{
{1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
{1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
{1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
{1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
},
/* 10 fps */
{
{2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
{2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
{2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
{2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
},
/* 15 fps */
{
{3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
{3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
{3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
{3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
},
/* 20 fps */
{
{4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
{4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
{4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
{4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
},
/* 25 fps */
{
{5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
{5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
{5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
{5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
},
/* 30 fps */
{
{7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
{7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
{7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
{7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
},
},
/* QSIF */
{
/* 5 fps */
{
{1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
{1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
{1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
{1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
},
/* 10 fps */
{
{2, 291, 0, {0x2C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x23, 0xA1, 0xC0, 0x02}},
{1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
{1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
{1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
},
/* 15 fps */
{
{3, 437, 0, {0x2B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xB5, 0x6D, 0xC0, 0x02}},
{2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
{2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
{1, 191, 420, {0x2B, 0xF4, 0x0D, 0x0D, 0x1B, 0x0C, 0x53, 0x1E, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
},
/* 20 fps */
{
{4, 588, 0, {0x2A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x4C, 0x52, 0xC0, 0x02}},
{3, 447, 730, {0x2A, 0xF4, 0x05, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
{2, 292, 476, {0x2A, 0xF4, 0x0D, 0x0E, 0xD8, 0x0E, 0x10, 0x19, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
{1, 192, 312, {0x2A, 0xF4, 0x1D, 0x09, 0xB3, 0x08, 0xEB, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}},
},
/* 25 fps */
{
{5, 703, 0, {0x29, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xBF, 0x42, 0xC0, 0x02}},
{3, 447, 610, {0x29, 0xF4, 0x05, 0x13, 0x0B, 0x12, 0x43, 0x14, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
{2, 292, 398, {0x29, 0xF4, 0x0D, 0x0C, 0x6C, 0x0B, 0xA4, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
{1, 192, 262, {0x29, 0xF4, 0x25, 0x08, 0x23, 0x07, 0x5B, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}},
},
/* 30 fps */
{
{8, 873, 0, {0x28, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x69, 0x37, 0xC0, 0x02}},
{5, 704, 774, {0x28, 0xF4, 0x05, 0x18, 0x21, 0x17, 0x59, 0x0F, 0x18, 0xC0, 0x42, 0xC0, 0x02}},
{3, 448, 492, {0x28, 0xF4, 0x05, 0x0F, 0x5D, 0x0E, 0x95, 0x15, 0x18, 0xC0, 0x69, 0xC0, 0x02}},
{2, 291, 320, {0x28, 0xF4, 0x1D, 0x09, 0xFB, 0x09, 0x33, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}},
},
},
/* QCIF */
{
/* 5 fps */
{
{1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
{1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
{1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
{1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
},
/* 10 fps */
{
{3, 385, 0, {0x0C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x81, 0x79, 0xC0, 0x02}},
{2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
{2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
{1, 194, 532, {0x0C, 0xF4, 0x05, 0x10, 0x9A, 0x0F, 0xBE, 0x1B, 0x08, 0xC2, 0xF0, 0xC0, 0x02}},
},
/* 15 fps */
{
{4, 577, 0, {0x0B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x41, 0x52, 0xC0, 0x02}},
{3, 447, 818, {0x0B, 0xF4, 0x05, 0x19, 0x89, 0x18, 0xAD, 0x0F, 0x10, 0xBF, 0x69, 0xC0, 0x02}},
{2, 292, 534, {0x0B, 0xF4, 0x05, 0x10, 0xA3, 0x0F, 0xC7, 0x19, 0x10, 0x24, 0xA1, 0xC0, 0x02}},
{1, 195, 356, {0x0B, 0xF4, 0x15, 0x0B, 0x11, 0x0A, 0x35, 0x1E, 0x10, 0xC3, 0xF0, 0xC0, 0x02}},
},
/* 20 fps */
{
{6, 776, 0, {0x0A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x08, 0x3F, 0xC0, 0x02}},
{4, 591, 804, {0x0A, 0xF4, 0x05, 0x19, 0x1E, 0x18, 0x42, 0x0F, 0x18, 0x4F, 0x4E, 0xC0, 0x02}},
{3, 447, 608, {0x0A, 0xF4, 0x05, 0x12, 0xFD, 0x12, 0x21, 0x15, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
{2, 291, 396, {0x0A, 0xF4, 0x15, 0x0C, 0x5E, 0x0B, 0x82, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}},
},
/* 25 fps */
{
{9, 928, 0, {0x09, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xA0, 0x33, 0xC0, 0x02}},
{5, 703, 800, {0x09, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x10, 0x18, 0xBF, 0x42, 0xC0, 0x02}},
{3, 447, 508, {0x09, 0xF4, 0x0D, 0x0F, 0xD2, 0x0E, 0xF6, 0x1B, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
{2, 292, 332, {0x09, 0xF4, 0x1D, 0x0A, 0x5A, 0x09, 0x7E, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
},
/* 30 fps */
{
{0, },
{9, 956, 876, {0x08, 0xF4, 0x05, 0x1B, 0x58, 0x1A, 0x7C, 0x0E, 0x20, 0xBC, 0x33, 0x10, 0x02}},
{4, 592, 542, {0x08, 0xF4, 0x05, 0x10, 0xE4, 0x10, 0x08, 0x17, 0x20, 0x50, 0x4E, 0x10, 0x02}},
{2, 291, 266, {0x08, 0xF4, 0x25, 0x08, 0x48, 0x07, 0x6C, 0x1E, 0x20, 0x23, 0xA1, 0x10, 0x02}},
},
},
/* SIF */
{
/* 5 fps */
{
{4, 582, 0, {0x35, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x46, 0x52, 0x60, 0x02}},
{3, 387, 1276, {0x35, 0xF4, 0x05, 0x27, 0xD8, 0x26, 0x48, 0x03, 0x10, 0x83, 0x79, 0x60, 0x02}},
{2, 291, 960, {0x35, 0xF4, 0x0D, 0x1D, 0xF2, 0x1C, 0x62, 0x04, 0x10, 0x23, 0xA1, 0x60, 0x02}},
{1, 191, 630, {0x35, 0xF4, 0x1D, 0x13, 0xA9, 0x12, 0x19, 0x05, 0x08, 0xBF, 0xF4, 0x60, 0x02}},
},
/* 10 fps */
{
{0, },
{6, 775, 1278, {0x34, 0xF4, 0x05, 0x27, 0xE8, 0x26, 0x58, 0x05, 0x30, 0x07, 0x3F, 0x10, 0x02}},
{3, 447, 736, {0x34, 0xF4, 0x15, 0x16, 0xFB, 0x15, 0x6B, 0x05, 0x18, 0xBF, 0x69, 0x10, 0x02}},
{2, 291, 480, {0x34, 0xF4, 0x2D, 0x0E, 0xF9, 0x0D, 0x69, 0x09, 0x18, 0x23, 0xA1, 0x10, 0x02}},
},
/* 15 fps */
{
{0, },
{9, 955, 1050, {0x33, 0xF4, 0x05, 0x20, 0xCF, 0x1F, 0x3F, 0x06, 0x48, 0xBB, 0x33, 0x10, 0x02}},
{4, 591, 650, {0x33, 0xF4, 0x15, 0x14, 0x44, 0x12, 0xB4, 0x08, 0x30, 0x4F, 0x4E, 0x10, 0x02}},
{3, 448, 492, {0x33, 0xF4, 0x25, 0x0F, 0x52, 0x0D, 0xC2, 0x09, 0x28, 0xC0, 0x69, 0x10, 0x02}},
},
/* 20 fps */
{
{0, },
{9, 958, 782, {0x32, 0xF4, 0x0D, 0x18, 0x6A, 0x16, 0xDA, 0x0B, 0x58, 0xBE, 0x33, 0xD0, 0x02}},
{5, 703, 574, {0x32, 0xF4, 0x1D, 0x11, 0xE7, 0x10, 0x57, 0x0B, 0x40, 0xBF, 0x42, 0xD0, 0x02}},
{3, 446, 364, {0x32, 0xF4, 0x3D, 0x0B, 0x5C, 0x09, 0xCC, 0x0E, 0x30, 0xBE, 0x69, 0xD0, 0x02}},
},
/* 25 fps */
{
{0, },
{9, 958, 654, {0x31, 0xF4, 0x15, 0x14, 0x66, 0x12, 0xD6, 0x0B, 0x50, 0xBE, 0x33, 0x90, 0x02}},
{6, 776, 530, {0x31, 0xF4, 0x25, 0x10, 0x8C, 0x0E, 0xFC, 0x0C, 0x48, 0x08, 0x3F, 0x90, 0x02}},
{4, 592, 404, {0x31, 0xF4, 0x35, 0x0C, 0x96, 0x0B, 0x06, 0x0B, 0x38, 0x50, 0x4E, 0x90, 0x02}},
},
/* 30 fps */
{
{0, },
{9, 957, 526, {0x30, 0xF4, 0x25, 0x10, 0x68, 0x0E, 0xD8, 0x0D, 0x58, 0xBD, 0x33, 0x60, 0x02}},
{6, 775, 426, {0x30, 0xF4, 0x35, 0x0D, 0x48, 0x0B, 0xB8, 0x0F, 0x50, 0x07, 0x3F, 0x60, 0x02}},
{4, 590, 324, {0x30, 0x7A, 0x4B, 0x0A, 0x1C, 0x08, 0xB4, 0x0E, 0x40, 0x4E, 0x52, 0x60, 0x02}},
},
},
/* CIF */
{
/* 5 fps */
{
{6, 771, 0, {0x15, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x3F, 0x80, 0x02}},
{4, 465, 1278, {0x15, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x03, 0x18, 0xD1, 0x65, 0x80, 0x02}},
{2, 291, 800, {0x15, 0xF4, 0x15, 0x18, 0xF4, 0x17, 0x3C, 0x05, 0x18, 0x23, 0xA1, 0x80, 0x02}},
{1, 193, 528, {0x15, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x18, 0xC1, 0xF4, 0x80, 0x02}},
},
/* 10 fps */
{
{0, },
{9, 932, 1278, {0x14, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x04, 0x30, 0xA4, 0x33, 0x10, 0x02}},
{4, 591, 812, {0x14, 0xF4, 0x15, 0x19, 0x56, 0x17, 0x9E, 0x06, 0x28, 0x4F, 0x4E, 0x10, 0x02}},
{2, 291, 400, {0x14, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x28, 0x23, 0xA1, 0x10, 0x02}},
},
/* 15 fps */
{
{0, },
{9, 956, 876, {0x13, 0xF4, 0x0D, 0x1B, 0x58, 0x19, 0xA0, 0x05, 0x38, 0xBC, 0x33, 0x60, 0x02}},
{5, 703, 644, {0x13, 0xF4, 0x1D, 0x14, 0x1C, 0x12, 0x64, 0x08, 0x38, 0xBF, 0x42, 0x60, 0x02}},
{3, 448, 410, {0x13, 0xF4, 0x3D, 0x0C, 0xC4, 0x0B, 0x0C, 0x0E, 0x38, 0xC0, 0x69, 0x60, 0x02}},
},
/* 20 fps */
{
{0, },
{9, 956, 650, {0x12, 0xF4, 0x1D, 0x14, 0x4A, 0x12, 0x92, 0x09, 0x48, 0xBC, 0x33, 0x10, 0x03}},
{6, 776, 528, {0x12, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x40, 0x08, 0x3F, 0x10, 0x03}},
{4, 591, 402, {0x12, 0xF4, 0x3D, 0x0C, 0x8F, 0x0A, 0xD7, 0x0E, 0x40, 0x4F, 0x4E, 0x10, 0x03}},
},
/* 25 fps */
{
{0, },
{9, 956, 544, {0x11, 0xF4, 0x25, 0x10, 0xF4, 0x0F, 0x3C, 0x0A, 0x48, 0xBC, 0x33, 0xC0, 0x02}},
{7, 840, 478, {0x11, 0xF4, 0x2D, 0x0E, 0xEB, 0x0D, 0x33, 0x0B, 0x48, 0x48, 0x3B, 0xC0, 0x02}},
{5, 703, 400, {0x11, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x48, 0xBF, 0x42, 0xC0, 0x02}},
},
/* 30 fps */
{
{0, },
{9, 956, 438, {0x10, 0xF4, 0x35, 0x0D, 0xAC, 0x0B, 0xF4, 0x0D, 0x50, 0xBC, 0x33, 0x10, 0x02}},
{7, 838, 384, {0x10, 0xF4, 0x45, 0x0B, 0xFD, 0x0A, 0x45, 0x0F, 0x50, 0x46, 0x3B, 0x10, 0x02}},
{6, 773, 354, {0x10, 0x7A, 0x4B, 0x0B, 0x0C, 0x09, 0x80, 0x10, 0x50, 0x05, 0x3F, 0x10, 0x02}},
},
},
/* VGA */
{
/* 5 fps */
{
{0, },
{6, 773, 1272, {0x1D, 0xF4, 0x15, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x3F, 0x10, 0x02}},
{4, 592, 976, {0x1D, 0xF4, 0x25, 0x1E, 0x78, 0x1B, 0x58, 0x03, 0x30, 0x50, 0x4E, 0x10, 0x02}},
{3, 448, 738, {0x1D, 0xF4, 0x3D, 0x17, 0x0C, 0x13, 0xEC, 0x04, 0x30, 0xC0, 0x69, 0x10, 0x02}},
},
/* 10 fps */
{
{0, },
{9, 956, 788, {0x1C, 0xF4, 0x35, 0x18, 0x9C, 0x15, 0x7C, 0x03, 0x48, 0xBC, 0x33, 0x10, 0x02}},
{6, 776, 640, {0x1C, 0x7A, 0x53, 0x13, 0xFC, 0x11, 0x2C, 0x04, 0x48, 0x08, 0x3F, 0x10, 0x02}},
{4, 592, 488, {0x1C, 0x7A, 0x6B, 0x0F, 0x3C, 0x0C, 0x6C, 0x06, 0x48, 0x50, 0x4E, 0x10, 0x02}},
},
/* 15 fps */
{
{0, },
{9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}},
{9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}},
{8, 895, 492, {0x1B, 0x7A, 0x6B, 0x0F, 0x5D, 0x0C, 0x8D, 0x06, 0x58, 0x7F, 0x37, 0x80, 0x02}},
},
/* 20 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 25 fps */
{
{0, },
{0, },
{0, },
{0, },
},
/* 30 fps */
{
{0, },
{0, },
{0, },
{0, },
},
},
};
/*
* 16 versions:
* 2 tables (one for Y, and one for U&V)
* 16 levels of details per tables
* 8 blocs
*/
const unsigned int TimonRomTable [16][2][16][8] =
{
{ /* version 0 */
{ /* version 0, passes 0 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000001},
{0x00000000,0x00000000,0x00000001,0x00000001,
0x00000001,0x00000001,0x00000001,0x00000001},
{0x00000000,0x00000000,0x00000001,0x00000001,
0x00000001,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000009,0x00000001,
0x00000009,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000049,0x00000009},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000009,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000249,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000249,0x00000249,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000249,0x0000124a,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x0000124a,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009252,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 0, passes 1 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000001,0x00000001,
0x00000001,0x00000001,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000009,0x00000001,
0x00000001,0x00000009,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000001,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000009,
0x00000009,0x00000049,0x00000001,0x00000001},
{0x00000000,0x00000000,0x00000049,0x00000009,
0x00000009,0x00000049,0x00000001,0x00000001},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000009,0x00000001},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000009,0x00000001},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000009,0x00000001},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000249,0x00000049,0x00000009},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000249,0x00000049,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000249,0x00000249,0x00000049,0x00000009},
{0x00000000,0x00000000,0x00001249,0x00000249,
0x0000124a,0x0000124a,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 1 */
{ /* version 1, passes 0 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000001},
{0x00000000,0x00000000,0x00000001,0x00000001,
0x00000001,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000009,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000249,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00001252},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009252,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009252,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009292,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 1, passes 1 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000001,0x00000001,0x00000000},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000001,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000009,0x00000001,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000001,0x00000001},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000009,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000049,0x00000249,0x00000009,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000249,0x00000249,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x00000049,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00000049,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00000049,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009252,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 2 */
{ /* version 2, passes 0 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000001},
{0x00000000,0x00000000,0x00000009,0x00000009,
0x00000009,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00001252},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009252,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009252,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009292,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00009252,
0x00009492,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x000124db,0x000124db,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000126dc,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 2, passes 1 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000009,
0x00000049,0x00000009,0x00000001,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000000},
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000249,0x00000049,0x0000024a,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x0000024a,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x0000024a,0x00000009},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009252,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009292,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009292,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009292,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x0000924a,0x0000924a,
0x00009492,0x00009493,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 3 */
{ /* version 3, passes 0 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000001},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000049,0x00000249,
0x00000249,0x00000249,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x00009252,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009292,0x00009292,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009292,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00009252,
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009292,0x0000a49b,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x000124db,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x0000a49b,0x000124db,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x0001b725,0x000136e4},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 3, passes 1 */
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000},
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000001,0x00000000},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x00000049,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00000001},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x00001252,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009252,0x00009292,0x00000009},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009252,0x00009292,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009252,0x00009292,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009493,0x00009292,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009493,0x00009292,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009493,0x00009493,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009292,0x00009493,0x00009493,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x00009493,0x00009493,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009292,
0x0000a493,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 4 */
{ /* version 4, passes 0 */
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x00009252,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009493,0x00009493,0x0000a49b},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009292,0x00009493,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x000124db,0x000124db,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x00009252,0x000124db,
0x000126dc,0x0001b724,0x0001b725,0x0001b925},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 4, passes 1 */
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00000249,
0x0000124a,0x0000124a,0x00001252,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00009292,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x0000a49b,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00009252,0x0000a49b,
0x0001249b,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 5 */
{ /* version 5, passes 0 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x0000124a,0x00001252,0x00009292},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x0000124a,0x00009292,0x00009292,0x00009493},
{0x00000000,0x00000000,0x00000249,0x0000924a,
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x000124db,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x000124db,0x000124db,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0001249b,0x000126dc,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000126dc,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b724,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 5, passes 1 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x00009493,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x00009493,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x00009493,0x000124db,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x00009493,0x000124db,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x000124db,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x000124db,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009252,0x000124db,
0x000126dc,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 6 */
{ /* version 6, passes 0 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x0000124a,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000136e4,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x0001b725,0x0001b925},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x000136e4,0x0001b925,0x00025bb6,0x00024b77},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 6, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00000249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x00009493,0x0000a49b,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x000126dc,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000136e4,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 7 */
{ /* version 7, passes 0 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x0000a49b,0x000124db,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0001249b,0x000126dc,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x0001b725,0x0001b925},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x0001b724,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b724,0x0001c96e,0x0002496e},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x000136e4,0x0001b925,0x0001c96e,0x0002496e},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x0002496d,0x00025bb6,0x00025bbf},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 7, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00009292},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x00009493,0x00009493,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x000136e4,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x000136e4,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000124db,0x000136e4,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x000136e4,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00012492,0x000126db,
0x0001b724,0x0001b925,0x0001b725,0x000136e4},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 8 */
{ /* version 8, passes 0 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009292,0x00009493,0x0000a49b,0x000124db},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x000124db,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000136e4},
{0x00000000,0x00000000,0x00001249,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000136e4,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x0001b725,0x0001b925},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
{0x00000000,0x00000000,0x00009252,0x000124db,
0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000126dc,0x0001b925,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x00024b76,0x00024b77},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x000136e4,0x0001b925,0x00024b76,0x00025bbf},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x000136e4,0x0001c92d,0x00024b76,0x00025bbf},
{0x00000000,0x00000000,0x00012492,0x000136db,
0x0001b724,0x00024b6d,0x0002ddb6,0x0002efff},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 8, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000126dc,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000136e4,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000136e4,0x0001b724,0x0001b725,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x000136e4,0x0001b925,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x000136e4,0x0001b925,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x0002496d,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 9 */
{ /* version 9, passes 0 */
{0x00000000,0x00000000,0x00000049,0x00000049,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000249,0x00000249,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x0000124a,0x00009252,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009292,0x00009493,0x00009493,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000124db,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0001249b,0x000126dc,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00009252,0x00009493,
0x000124db,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009252,0x0000a49b,
0x000124db,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000126dc,0x0001b724,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 9, passes 1 */
{0x00000000,0x00000000,0x00000249,0x00000049,
0x00000009,0x00000009,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000049,0x00000049,0x00000009,0x00000009},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00000249,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x0000124a,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009252,0x0000124a,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x00009252,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x00009292,0x00009292,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009292,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009493,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000124db,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009252,0x000124db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 10 */
{ /* version 10, passes 0 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00000249,0x00001249,
0x00009252,0x00009292,0x00009292,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x00009493,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x000124db,0x000124db,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000124db,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0001249b,0x000126dc,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000126dc,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009252,0x0000a49b,
0x000124db,0x000136e4,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000126dc,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000126dc,0x0001b925,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x000136e4,0x0002496d,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 10, passes 1 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000049,0x00000049,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00000249,0x00000049,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x00009252,0x0000024a,0x00000049},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009493,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00009252,
0x00009492,0x00009493,0x00001252,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x00009493,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x00009492,0x00009493,0x00009292,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009493,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009252,0x000126db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 11 */
{ /* version 11, passes 0 */
{0x00000000,0x00000000,0x00000249,0x00000249,
0x00000249,0x00000249,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009292,0x00001252},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009492,0x0000a49b,0x0000a49b,0x00009292},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x000124db,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001b725,0x000136e4},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x0001c96e,0x0001b925},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 11, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00000249,
0x00000249,0x00000249,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009252,0x00009252,0x0000024a,0x0000024a},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x0000a49b,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x0000a49b,0x00009292,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000124db,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000124db,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000126dc,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 12 */
{ /* version 12, passes 0 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000126dc,0x0001b724,0x0001b725,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x0000a49b,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
{0x00000000,0x00000000,0x00012492,0x000126db,
0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 12, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x00001249,0x00009292,
0x00009492,0x00009252,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009292,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000124db,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000124db,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000126dc,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x000136e4,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00009492,0x000126db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 13 */
{ /* version 13, passes 0 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x00009252,0x00009292,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x000124db,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x00001249,0x0000a49b,
0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x000136e4,0x0001b725,0x000124db},
{0x00000000,0x00000000,0x00009292,0x0000a49b,
0x000136e4,0x0001b724,0x0001b725,0x000126dc},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000136e4,0x0001b724,0x0001b725,0x000126dc},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b724,0x0001c96e,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b924,0x0001c92d,0x00024b76,0x0002496e},
{0x00000000,0x00000000,0x00012492,0x000136db,
0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 13, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x00009492,0x00009292,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x0000a49b,0x00009493,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000124db,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000136db,
0x0001b724,0x000124db,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000136db,
0x0001b724,0x000126dc,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00009292,0x000136db,
0x0001b724,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001b724,0x000126dc,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00012492,0x0001b6db,
0x0001c924,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 14 */
{ /* version 14, passes 0 */
{0x00000000,0x00000000,0x00001249,0x0000924a,
0x00009292,0x00009493,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00001249,0x0000a49b,
0x0000a493,0x000124db,0x000126dc,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x000136e4,0x0001b725,0x000124db},
{0x00000000,0x00000000,0x00009292,0x000124db,
0x000126dc,0x0001b724,0x0001b92d,0x000126dc},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b724,0x0001b92d,0x000126dc},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001c92d,0x0001c96e,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x00024b76,0x0001b925},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b924,0x0002496d,0x00024b76,0x00024b77},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b924,0x00024b6d,0x0002ddb6,0x00025bbf},
{0x00000000,0x00000000,0x00012492,0x0001b6db,
0x00024924,0x0002db6d,0x00036db6,0x0002efff},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 14, passes 1 */
{0x00000000,0x00000000,0x00001249,0x00001249,
0x0000124a,0x0000124a,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x00009493,
0x0000a493,0x00009292,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x0000a49b,0x00001252,0x00001252},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000136e4,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000136e4,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x000136e4,0x00009493,0x00009292},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001b724,0x000136e4,0x00009493,0x00009493},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001b724,0x000136e4,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001b724,0x000136e4,0x0000a49b,0x00009493},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001b724,0x000136e4,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000124db,0x0000a49b},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b724,0x000136e4,0x000126dc,0x000124db},
{0x00000000,0x00000000,0x00012492,0x0001b6db,
0x0001c924,0x0001b724,0x000136e4,0x000126dc},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
},
{ /* version 15 */
{ /* version 15, passes 0 */
{0x00000000,0x00000000,0x00001249,0x00009493,
0x0000a493,0x0000a49b,0x000124db,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0001249b,0x000126dc,0x000136e4,0x000124db},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x000126dc,0x0001b724,0x0001b725,0x000126dc},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x0001b724,0x0001b92d,0x000126dc},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x000136e4,0x0001b925,0x0001c96e,0x000136e4},
{0x00000000,0x00000000,0x00009492,0x000124db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000124db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
{0x00000000,0x00000000,0x0000a492,0x000126db,
0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001b924,0x0002496d,0x00024b76,0x0002496e},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x00024b6d,0x00025bb6,0x00024b77},
{0x00000000,0x00000000,0x00012492,0x000136db,
0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
{0x00000000,0x00000000,0x00012492,0x0001b6db,
0x00024924,0x0002db6d,0x00036db6,0x0002efff},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
},
{ /* version 15, passes 1 */
{0x00000000,0x00000000,0x0000924a,0x0000924a,
0x00009292,0x00009292,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x0000a49b,
0x0000a493,0x000124db,0x00009292,0x00009292},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000124db,0x0001b724,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000126dc,0x0001b724,0x00009493,0x00009493},
{0x00000000,0x00000000,0x0000924a,0x000124db,
0x000136e4,0x0001b724,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00009292,0x000136db,
0x0001b724,0x0001b724,0x0000a49b,0x0000a49b},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001c924,0x0001b724,0x000124db,0x000124db},
{0x00000000,0x00000000,0x00009492,0x000136db,
0x0001c924,0x0001b724,0x000124db,0x000124db},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0001b724,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0001b925,0x000126dc,0x000126dc},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0001b925,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0001b925,0x000136e4,0x000136e4},
{0x00000000,0x00000000,0x0000a492,0x000136db,
0x0001c924,0x0001b925,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x00012492,0x000136db,
0x0001c924,0x0001b925,0x0001b725,0x0001b724},
{0x00000000,0x00000000,0x00012492,0x0001b6db,
0x00024924,0x0002496d,0x0001b92d,0x0001b925},
{0x00000000,0x00000000,0x00000000,0x00000000,
0x00000000,0x00000000,0x00000000,0x00000000}
}
}
};
| linux-master | drivers/media/usb/pwc/pwc-timon.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
Decompression frontend.
(C) 1999-2003 Nemosoft Unv.
(C) 2004-2006 Luc Saillard ([email protected])
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
#include <asm/current.h>
#include <asm/types.h>
#include "pwc.h"
#include "pwc-dec1.h"
#include "pwc-dec23.h"
int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf)
{
int n, line, col;
void *yuv, *image;
u16 *src;
u16 *dsty, *dstu, *dstv;
image = vb2_plane_vaddr(&fbuf->vb.vb2_buf, 0);
yuv = fbuf->data + pdev->frame_header_size; /* Skip header */
/* Raw format; that's easy... */
if (pdev->pixfmt != V4L2_PIX_FMT_YUV420)
{
struct pwc_raw_frame *raw_frame = image;
raw_frame->type = cpu_to_le16(pdev->type);
raw_frame->vbandlength = cpu_to_le16(pdev->vbandlength);
/* cmd_buf is always 4 bytes, but sometimes, only the
* first 3 bytes is filled (Nala case). We can
* determine this using the type of the webcam */
memcpy(raw_frame->cmd, pdev->cmd_buf, 4);
memcpy(raw_frame->rawframe, yuv, pdev->frame_size);
vb2_set_plane_payload(&fbuf->vb.vb2_buf, 0,
struct_size(raw_frame, rawframe, pdev->frame_size));
return 0;
}
vb2_set_plane_payload(&fbuf->vb.vb2_buf, 0,
pdev->width * pdev->height * 3 / 2);
if (pdev->vbandlength == 0) {
/* Uncompressed mode.
*
* We do some byte shuffling here to go from the
* native format to YUV420P.
*/
src = (u16 *)yuv;
n = pdev->width * pdev->height;
dsty = (u16 *)(image);
dstu = (u16 *)(image + n);
dstv = (u16 *)(image + n + n / 4);
for (line = 0; line < pdev->height; line++) {
for (col = 0; col < pdev->width; col += 4) {
*dsty++ = *src++;
*dsty++ = *src++;
if (line & 1)
*dstv++ = *src++;
else
*dstu++ = *src++;
}
}
return 0;
}
/*
* Compressed;
* the decompressor routines will write the data in planar format
* immediately.
*/
if (DEVICE_USE_CODEC1(pdev->type)) {
/* TODO & FIXME */
PWC_ERROR("This chipset is not supported for now\n");
return -ENXIO; /* No such device or address: missing decompressor */
} else {
pwc_dec23_decompress(pdev, yuv, image);
}
return 0;
}
| linux-master | drivers/media/usb/pwc/pwc-uncompress.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
Decompression for chipset version 2 et 3
(C) 2004-2006 Luc Saillard ([email protected])
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
#include "pwc-timon.h"
#include "pwc-kiara.h"
#include "pwc-dec23.h"
#include <linux/string.h>
#include <linux/slab.h>
/*
* USE_LOOKUP_TABLE_TO_CLAMP
* 0: use a C version of this tests: { a<0?0:(a>255?255:a) }
* 1: use a faster lookup table for cpu with a big cache (intel)
*/
#define USE_LOOKUP_TABLE_TO_CLAMP 1
/*
* UNROLL_LOOP_FOR_COPYING_BLOCK
* 0: use a loop for a smaller code (but little slower)
* 1: when unrolling the loop, gcc produces some faster code (perhaps only
* valid for intel processor class). Activating this option, automatically
* activate USE_LOOKUP_TABLE_TO_CLAMP
*/
#define UNROLL_LOOP_FOR_COPY 1
#if UNROLL_LOOP_FOR_COPY
# undef USE_LOOKUP_TABLE_TO_CLAMP
# define USE_LOOKUP_TABLE_TO_CLAMP 1
#endif
static void build_subblock_pattern(struct pwc_dec23_private *pdec)
{
static const unsigned int initial_values[12] = {
-0x526500, -0x221200, 0x221200, 0x526500,
-0x3de200, 0x3de200,
-0x6db480, -0x2d5d00, 0x2d5d00, 0x6db480,
-0x12c200, 0x12c200
};
static const unsigned int values_derivated[12] = {
0xa4ca, 0x4424, -0x4424, -0xa4ca,
0x7bc4, -0x7bc4,
0xdb69, 0x5aba, -0x5aba, -0xdb69,
0x2584, -0x2584
};
unsigned int temp_values[12];
int i, j;
memcpy(temp_values, initial_values, sizeof(initial_values));
for (i = 0; i < 256; i++) {
for (j = 0; j < 12; j++) {
pdec->table_subblock[i][j] = temp_values[j];
temp_values[j] += values_derivated[j];
}
}
}
static void build_bit_powermask_table(struct pwc_dec23_private *pdec)
{
unsigned char *p;
unsigned int bit, byte, mask, val;
unsigned int bitpower = 1;
for (bit = 0; bit < 8; bit++) {
mask = bitpower - 1;
p = pdec->table_bitpowermask[bit];
for (byte = 0; byte < 256; byte++) {
val = (byte & mask);
if (byte & bitpower)
val = -val;
*p++ = val;
}
bitpower<<=1;
}
}
static void build_table_color(const unsigned int romtable[16][8],
unsigned char p0004[16][1024],
unsigned char p8004[16][256])
{
int compression_mode, j, k, bit, pw;
unsigned char *p0, *p8;
const unsigned int *r;
/* We have 16 compressions tables */
for (compression_mode = 0; compression_mode < 16; compression_mode++) {
p0 = p0004[compression_mode];
p8 = p8004[compression_mode];
r = romtable[compression_mode];
for (j = 0; j < 8; j++, r++, p0 += 128) {
for (k = 0; k < 16; k++) {
if (k == 0)
bit = 1;
else if (k >= 1 && k < 3)
bit = (r[0] >> 15) & 7;
else if (k >= 3 && k < 6)
bit = (r[0] >> 12) & 7;
else if (k >= 6 && k < 10)
bit = (r[0] >> 9) & 7;
else if (k >= 10 && k < 13)
bit = (r[0] >> 6) & 7;
else if (k >= 13 && k < 15)
bit = (r[0] >> 3) & 7;
else
bit = (r[0]) & 7;
if (k == 0)
*p8++ = 8;
else
*p8++ = j - bit;
*p8++ = bit;
pw = 1 << bit;
p0[k + 0x00] = (1 * pw) + 0x80;
p0[k + 0x10] = (2 * pw) + 0x80;
p0[k + 0x20] = (3 * pw) + 0x80;
p0[k + 0x30] = (4 * pw) + 0x80;
p0[k + 0x40] = (-1 * pw) + 0x80;
p0[k + 0x50] = (-2 * pw) + 0x80;
p0[k + 0x60] = (-3 * pw) + 0x80;
p0[k + 0x70] = (-4 * pw) + 0x80;
} /* end of for (k=0; k<16; k++, p8++) */
} /* end of for (j=0; j<8; j++ , table++) */
} /* end of foreach compression_mode */
}
/*
*
*/
static void fill_table_dc00_d800(struct pwc_dec23_private *pdec)
{
#define SCALEBITS 15
#define ONE_HALF (1UL << (SCALEBITS - 1))
int i;
unsigned int offset1 = ONE_HALF;
unsigned int offset2 = 0x0000;
for (i=0; i<256; i++) {
pdec->table_dc00[i] = offset1 & ~(ONE_HALF);
pdec->table_d800[i] = offset2;
offset1 += 0x7bc4;
offset2 += 0x7bc4;
}
}
/*
* To decode the stream:
* if look_bits(2) == 0: # op == 2 in the lookup table
* skip_bits(2)
* end of the stream
* elif look_bits(3) == 7: # op == 1 in the lookup table
* skip_bits(3)
* yyyy = get_bits(4)
* xxxx = get_bits(8)
* else: # op == 0 in the lookup table
* skip_bits(x)
*
* For speedup processing, we build a lookup table and we takes the first 6 bits.
*
* struct {
* unsigned char op; // operation to execute
* unsigned char bits; // bits use to perform operation
* unsigned char offset1; // offset to add to access in the table_0004 % 16
* unsigned char offset2; // offset to add to access in the table_0004
* }
*
* How to build this table ?
* op == 2 when (i%4)==0
* op == 1 when (i%8)==7
* op == 0 otherwise
*
*/
static const unsigned char hash_table_ops[64*4] = {
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x10,
0x00, 0x06, 0x01, 0x30,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x01, 0x20,
0x01, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x50,
0x00, 0x05, 0x02, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x03, 0x00,
0x01, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x10,
0x00, 0x06, 0x02, 0x10,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x01, 0x60,
0x01, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x50,
0x00, 0x05, 0x02, 0x40,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x03, 0x40,
0x01, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x10,
0x00, 0x06, 0x01, 0x70,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x01, 0x20,
0x01, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x50,
0x00, 0x05, 0x02, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x03, 0x00,
0x01, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x10,
0x00, 0x06, 0x02, 0x50,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x01, 0x60,
0x01, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x00,
0x00, 0x04, 0x01, 0x50,
0x00, 0x05, 0x02, 0x40,
0x02, 0x00, 0x00, 0x00,
0x00, 0x03, 0x01, 0x40,
0x00, 0x05, 0x03, 0x40,
0x01, 0x00, 0x00, 0x00
};
/*
*
*/
static const unsigned int MulIdx[16][16] = {
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,},
{0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3,},
{0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3,},
{4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4,},
{6, 7, 8, 9, 7, 10, 11, 8, 8, 11, 10, 7, 9, 8, 7, 6,},
{4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4,},
{1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2,},
{0, 3, 3, 0, 1, 2, 2, 1, 2, 1, 1, 2, 3, 0, 0, 3,},
{0, 1, 2, 3, 3, 2, 1, 0, 3, 2, 1, 0, 0, 1, 2, 3,},
{1, 1, 1, 1, 3, 3, 3, 3, 0, 0, 0, 0, 2, 2, 2, 2,},
{7, 10, 11, 8, 9, 8, 7, 6, 6, 7, 8, 9, 8, 11, 10, 7,},
{4, 5, 5, 4, 5, 4, 4, 5, 5, 4, 4, 5, 4, 5, 5, 4,},
{7, 9, 6, 8, 10, 8, 7, 11, 11, 7, 8, 10, 8, 6, 9, 7,},
{1, 3, 0, 2, 2, 0, 3, 1, 2, 0, 3, 1, 1, 3, 0, 2,},
{1, 2, 2, 1, 3, 0, 0, 3, 0, 3, 3, 0, 2, 1, 1, 2,},
{10, 8, 7, 11, 8, 6, 9, 7, 7, 9, 6, 8, 11, 7, 8, 10}
};
#if USE_LOOKUP_TABLE_TO_CLAMP
#define MAX_OUTER_CROP_VALUE (512)
static unsigned char pwc_crop_table[256 + 2*MAX_OUTER_CROP_VALUE];
#define CLAMP(x) (pwc_crop_table[MAX_OUTER_CROP_VALUE+(x)])
#else
#define CLAMP(x) ((x)>255?255:((x)<0?0:x))
#endif
/* If the type or the command change, we rebuild the lookup table */
void pwc_dec23_init(struct pwc_device *pdev, const unsigned char *cmd)
{
int flags, version, shift, i;
struct pwc_dec23_private *pdec = &pdev->dec23;
mutex_init(&pdec->lock);
if (pdec->last_cmd_valid && pdec->last_cmd == cmd[2])
return;
if (DEVICE_USE_CODEC3(pdev->type)) {
flags = cmd[2] & 0x18;
if (flags == 8)
pdec->nbits = 7; /* More bits, mean more bits to encode the stream, but better quality */
else if (flags == 0x10)
pdec->nbits = 8;
else
pdec->nbits = 6;
version = cmd[2] >> 5;
build_table_color(KiaraRomTable[version][0], pdec->table_0004_pass1, pdec->table_8004_pass1);
build_table_color(KiaraRomTable[version][1], pdec->table_0004_pass2, pdec->table_8004_pass2);
} else {
flags = cmd[2] & 6;
if (flags == 2)
pdec->nbits = 7;
else if (flags == 4)
pdec->nbits = 8;
else
pdec->nbits = 6;
version = cmd[2] >> 3;
build_table_color(TimonRomTable[version][0], pdec->table_0004_pass1, pdec->table_8004_pass1);
build_table_color(TimonRomTable[version][1], pdec->table_0004_pass2, pdec->table_8004_pass2);
}
/* Information can be coded on a variable number of bits but never less than 8 */
shift = 8 - pdec->nbits;
pdec->scalebits = SCALEBITS - shift;
pdec->nbitsmask = 0xFF >> shift;
fill_table_dc00_d800(pdec);
build_subblock_pattern(pdec);
build_bit_powermask_table(pdec);
#if USE_LOOKUP_TABLE_TO_CLAMP
/* Build the static table to clamp value [0-255] */
for (i=0;i<MAX_OUTER_CROP_VALUE;i++)
pwc_crop_table[i] = 0;
for (i=0; i<256; i++)
pwc_crop_table[MAX_OUTER_CROP_VALUE+i] = i;
for (i=0; i<MAX_OUTER_CROP_VALUE; i++)
pwc_crop_table[MAX_OUTER_CROP_VALUE+256+i] = 255;
#endif
pdec->last_cmd = cmd[2];
pdec->last_cmd_valid = 1;
}
/*
* Copy the 4x4 image block to Y plane buffer
*/
static void copy_image_block_Y(const int *src, unsigned char *dst, unsigned int bytes_per_line, unsigned int scalebits)
{
#if UNROLL_LOOP_FOR_COPY
const unsigned char *cm = pwc_crop_table+MAX_OUTER_CROP_VALUE;
const int *c = src;
unsigned char *d = dst;
*d++ = cm[c[0] >> scalebits];
*d++ = cm[c[1] >> scalebits];
*d++ = cm[c[2] >> scalebits];
*d++ = cm[c[3] >> scalebits];
d = dst + bytes_per_line;
*d++ = cm[c[4] >> scalebits];
*d++ = cm[c[5] >> scalebits];
*d++ = cm[c[6] >> scalebits];
*d++ = cm[c[7] >> scalebits];
d = dst + bytes_per_line*2;
*d++ = cm[c[8] >> scalebits];
*d++ = cm[c[9] >> scalebits];
*d++ = cm[c[10] >> scalebits];
*d++ = cm[c[11] >> scalebits];
d = dst + bytes_per_line*3;
*d++ = cm[c[12] >> scalebits];
*d++ = cm[c[13] >> scalebits];
*d++ = cm[c[14] >> scalebits];
*d++ = cm[c[15] >> scalebits];
#else
int i;
const int *c = src;
unsigned char *d = dst;
for (i = 0; i < 4; i++, c++)
*d++ = CLAMP((*c) >> scalebits);
d = dst + bytes_per_line;
for (i = 0; i < 4; i++, c++)
*d++ = CLAMP((*c) >> scalebits);
d = dst + bytes_per_line*2;
for (i = 0; i < 4; i++, c++)
*d++ = CLAMP((*c) >> scalebits);
d = dst + bytes_per_line*3;
for (i = 0; i < 4; i++, c++)
*d++ = CLAMP((*c) >> scalebits);
#endif
}
/*
* Copy the 4x4 image block to a CrCb plane buffer
*
*/
static void copy_image_block_CrCb(const int *src, unsigned char *dst, unsigned int bytes_per_line, unsigned int scalebits)
{
#if UNROLL_LOOP_FOR_COPY
/* Unroll all loops */
const unsigned char *cm = pwc_crop_table+MAX_OUTER_CROP_VALUE;
const int *c = src;
unsigned char *d = dst;
*d++ = cm[c[0] >> scalebits];
*d++ = cm[c[4] >> scalebits];
*d++ = cm[c[1] >> scalebits];
*d++ = cm[c[5] >> scalebits];
*d++ = cm[c[2] >> scalebits];
*d++ = cm[c[6] >> scalebits];
*d++ = cm[c[3] >> scalebits];
*d++ = cm[c[7] >> scalebits];
d = dst + bytes_per_line;
*d++ = cm[c[12] >> scalebits];
*d++ = cm[c[8] >> scalebits];
*d++ = cm[c[13] >> scalebits];
*d++ = cm[c[9] >> scalebits];
*d++ = cm[c[14] >> scalebits];
*d++ = cm[c[10] >> scalebits];
*d++ = cm[c[15] >> scalebits];
*d++ = cm[c[11] >> scalebits];
#else
int i;
const int *c1 = src;
const int *c2 = src + 4;
unsigned char *d = dst;
for (i = 0; i < 4; i++, c1++, c2++) {
*d++ = CLAMP((*c1) >> scalebits);
*d++ = CLAMP((*c2) >> scalebits);
}
c1 = src + 12;
d = dst + bytes_per_line;
for (i = 0; i < 4; i++, c1++, c2++) {
*d++ = CLAMP((*c1) >> scalebits);
*d++ = CLAMP((*c2) >> scalebits);
}
#endif
}
/*
* To manage the stream, we keep bits in a 32 bits register.
* fill_nbits(n): fill the reservoir with at least n bits
* skip_bits(n): discard n bits from the reservoir
* get_bits(n): fill the reservoir, returns the first n bits and discard the
* bits from the reservoir.
* __get_nbits(n): faster version of get_bits(n), but asumes that the reservoir
* contains at least n bits. bits returned is discarded.
*/
#define fill_nbits(pdec, nbits_wanted) do { \
while (pdec->nbits_in_reservoir<(nbits_wanted)) \
{ \
pdec->reservoir |= (*(pdec->stream)++) << (pdec->nbits_in_reservoir); \
pdec->nbits_in_reservoir += 8; \
} \
} while(0);
#define skip_nbits(pdec, nbits_to_skip) do { \
pdec->reservoir >>= (nbits_to_skip); \
pdec->nbits_in_reservoir -= (nbits_to_skip); \
} while(0);
#define get_nbits(pdec, nbits_wanted, result) do { \
fill_nbits(pdec, nbits_wanted); \
result = (pdec->reservoir) & ((1U<<(nbits_wanted))-1); \
skip_nbits(pdec, nbits_wanted); \
} while(0);
#define __get_nbits(pdec, nbits_wanted, result) do { \
result = (pdec->reservoir) & ((1U<<(nbits_wanted))-1); \
skip_nbits(pdec, nbits_wanted); \
} while(0);
#define look_nbits(pdec, nbits_wanted) \
((pdec->reservoir) & ((1U<<(nbits_wanted))-1))
/*
* Decode a 4x4 pixel block
*/
static void decode_block(struct pwc_dec23_private *pdec,
const unsigned char *ptable0004,
const unsigned char *ptable8004)
{
unsigned int primary_color;
unsigned int channel_v, offset1, op;
int i;
fill_nbits(pdec, 16);
__get_nbits(pdec, pdec->nbits, primary_color);
if (look_nbits(pdec,2) == 0) {
skip_nbits(pdec, 2);
/* Very simple, the color is the same for all pixels of the square */
for (i = 0; i < 16; i++)
pdec->temp_colors[i] = pdec->table_dc00[primary_color];
return;
}
/* This block is encoded with small pattern */
for (i = 0; i < 16; i++)
pdec->temp_colors[i] = pdec->table_d800[primary_color];
__get_nbits(pdec, 3, channel_v);
channel_v = ((channel_v & 1) << 2) | (channel_v & 2) | ((channel_v & 4) >> 2);
ptable0004 += (channel_v * 128);
ptable8004 += (channel_v * 32);
offset1 = 0;
do
{
unsigned int htable_idx, rows = 0;
const unsigned int *block;
/* [ zzzz y x x ]
* xx == 00 :=> end of the block def, remove the two bits from the stream
* yxx == 111
* yxx == any other value
*
*/
fill_nbits(pdec, 16);
htable_idx = look_nbits(pdec, 6);
op = hash_table_ops[htable_idx * 4];
if (op == 2) {
skip_nbits(pdec, 2);
} else if (op == 1) {
/* 15bits [ xxxx xxxx yyyy 111 ]
* yyy => offset in the table8004
* xxx => offset in the tabled004 (tree)
*/
unsigned int mask, shift;
unsigned int nbits, col1;
unsigned int yyyy;
skip_nbits(pdec, 3);
/* offset1 += yyyy */
__get_nbits(pdec, 4, yyyy);
offset1 += 1 + yyyy;
offset1 &= 0x0F;
nbits = ptable8004[offset1 * 2];
/* col1 = xxxx xxxx */
__get_nbits(pdec, nbits+1, col1);
/* Bit mask table */
mask = pdec->table_bitpowermask[nbits][col1];
shift = ptable8004[offset1 * 2 + 1];
rows = ((mask << shift) + 0x80) & 0xFF;
block = pdec->table_subblock[rows];
for (i = 0; i < 16; i++)
pdec->temp_colors[i] += block[MulIdx[offset1][i]];
} else {
/* op == 0
* offset1 is coded on 3 bits
*/
unsigned int shift;
offset1 += hash_table_ops [htable_idx * 4 + 2];
offset1 &= 0x0F;
rows = ptable0004[offset1 + hash_table_ops [htable_idx * 4 + 3]];
block = pdec->table_subblock[rows];
for (i = 0; i < 16; i++)
pdec->temp_colors[i] += block[MulIdx[offset1][i]];
shift = hash_table_ops[htable_idx * 4 + 1];
skip_nbits(pdec, shift);
}
} while (op != 2);
}
static void DecompressBand23(struct pwc_dec23_private *pdec,
const unsigned char *rawyuv,
unsigned char *planar_y,
unsigned char *planar_u,
unsigned char *planar_v,
unsigned int compressed_image_width,
unsigned int real_image_width)
{
int compression_index, nblocks;
const unsigned char *ptable0004;
const unsigned char *ptable8004;
pdec->reservoir = 0;
pdec->nbits_in_reservoir = 0;
pdec->stream = rawyuv + 1; /* The first byte of the stream is skipped */
get_nbits(pdec, 4, compression_index);
/* pass 1: uncompress Y component */
nblocks = compressed_image_width / 4;
ptable0004 = pdec->table_0004_pass1[compression_index];
ptable8004 = pdec->table_8004_pass1[compression_index];
/* Each block decode a square of 4x4 */
while (nblocks) {
decode_block(pdec, ptable0004, ptable8004);
copy_image_block_Y(pdec->temp_colors, planar_y, real_image_width, pdec->scalebits);
planar_y += 4;
nblocks--;
}
/* pass 2: uncompress UV component */
nblocks = compressed_image_width / 8;
ptable0004 = pdec->table_0004_pass2[compression_index];
ptable8004 = pdec->table_8004_pass2[compression_index];
/* Each block decode a square of 4x4 */
while (nblocks) {
decode_block(pdec, ptable0004, ptable8004);
copy_image_block_CrCb(pdec->temp_colors, planar_u, real_image_width/2, pdec->scalebits);
decode_block(pdec, ptable0004, ptable8004);
copy_image_block_CrCb(pdec->temp_colors, planar_v, real_image_width/2, pdec->scalebits);
planar_v += 8;
planar_u += 8;
nblocks -= 2;
}
}
/**
* pwc_dec23_decompress - Uncompress a pwc23 buffer.
* @pdev: pointer to pwc device's internal struct
* @src: raw data
* @dst: image output
*/
void pwc_dec23_decompress(struct pwc_device *pdev,
const void *src,
void *dst)
{
int bandlines_left, bytes_per_block;
struct pwc_dec23_private *pdec = &pdev->dec23;
/* YUV420P image format */
unsigned char *pout_planar_y;
unsigned char *pout_planar_u;
unsigned char *pout_planar_v;
unsigned int plane_size;
mutex_lock(&pdec->lock);
bandlines_left = pdev->height / 4;
bytes_per_block = pdev->width * 4;
plane_size = pdev->height * pdev->width;
pout_planar_y = dst;
pout_planar_u = dst + plane_size;
pout_planar_v = dst + plane_size + plane_size / 4;
while (bandlines_left--) {
DecompressBand23(pdec, src,
pout_planar_y, pout_planar_u, pout_planar_v,
pdev->width, pdev->width);
src += pdev->vbandlength;
pout_planar_y += bytes_per_block;
pout_planar_u += pdev->width;
pout_planar_v += pdev->width;
}
mutex_unlock(&pdec->lock);
}
| linux-master | drivers/media/usb/pwc/pwc-dec23.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Driver for Philips webcam
Functions that send various control messages to the webcam, including
video modes.
(C) 1999-2003 Nemosoft Unv.
(C) 2004-2006 Luc Saillard ([email protected])
(C) 2011 Hans de Goede <[email protected]>
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
/*
Changes
2001/08/03 Alvarado Added methods for changing white balance and
red/green gains
*/
/* Control functions for the cam; brightness, contrast, video mode, etc. */
#ifdef __KERNEL__
#include <linux/uaccess.h>
#endif
#include <asm/errno.h>
#include "pwc.h"
#include "pwc-kiara.h"
#include "pwc-timon.h"
#include "pwc-dec1.h"
#include "pwc-dec23.h"
/* Selectors for status controls used only in this file */
#define GET_STATUS_B00 0x0B00
#define SENSOR_TYPE_FORMATTER1 0x0C00
#define GET_STATUS_3000 0x3000
#define READ_RAW_Y_MEAN_FORMATTER 0x3100
#define SET_POWER_SAVE_MODE_FORMATTER 0x3200
#define MIRROR_IMAGE_FORMATTER 0x3300
#define LED_FORMATTER 0x3400
#define LOWLIGHT 0x3500
#define GET_STATUS_3600 0x3600
#define SENSOR_TYPE_FORMATTER2 0x3700
#define GET_STATUS_3800 0x3800
#define GET_STATUS_4000 0x4000
#define GET_STATUS_4100 0x4100 /* Get */
#define CTL_STATUS_4200 0x4200 /* [GS] 1 */
/* Formatters for the Video Endpoint controls [GS]ET_EP_STREAM_CTL */
#define VIDEO_OUTPUT_CONTROL_FORMATTER 0x0100
static const char *size2name[PSZ_MAX] =
{
"subQCIF",
"QSIF",
"QCIF",
"SIF",
"CIF",
"VGA",
};
/********/
/* Entries for the Nala (645/646) camera; the Nala doesn't have compression
preferences, so you either get compressed or non-compressed streams.
An alternate value of 0 means this mode is not available at all.
*/
#define PWC_FPS_MAX_NALA 8
struct Nala_table_entry {
char alternate; /* USB alternate setting */
int compressed; /* Compressed yes/no */
unsigned char mode[3]; /* precomputed mode table */
};
static unsigned int Nala_fps_vector[PWC_FPS_MAX_NALA] = { 4, 5, 7, 10, 12, 15, 20, 24 };
static struct Nala_table_entry Nala_table[PSZ_MAX][PWC_FPS_MAX_NALA] =
{
#include "pwc-nala.h"
};
/****************************************************************************/
static int recv_control_msg(struct pwc_device *pdev,
u8 request, u16 value, int recv_count)
{
int rc;
rc = usb_control_msg(pdev->udev, usb_rcvctrlpipe(pdev->udev, 0),
request,
USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
value, pdev->vcinterface,
pdev->ctrl_buf, recv_count, USB_CTRL_GET_TIMEOUT);
if (rc < 0)
PWC_ERROR("recv_control_msg error %d req %02x val %04x\n",
rc, request, value);
return rc;
}
static inline int send_video_command(struct pwc_device *pdev,
int index, const unsigned char *buf, int buflen)
{
int rc;
memcpy(pdev->ctrl_buf, buf, buflen);
rc = usb_control_msg(pdev->udev, usb_sndctrlpipe(pdev->udev, 0),
SET_EP_STREAM_CTL,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
VIDEO_OUTPUT_CONTROL_FORMATTER, index,
pdev->ctrl_buf, buflen, USB_CTRL_SET_TIMEOUT);
if (rc >= 0)
memcpy(pdev->cmd_buf, buf, buflen);
else
PWC_ERROR("send_video_command error %d\n", rc);
return rc;
}
int send_control_msg(struct pwc_device *pdev,
u8 request, u16 value, void *buf, int buflen)
{
return usb_control_msg(pdev->udev, usb_sndctrlpipe(pdev->udev, 0),
request,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
value, pdev->vcinterface,
buf, buflen, USB_CTRL_SET_TIMEOUT);
}
static int set_video_mode_Nala(struct pwc_device *pdev, int size, int pixfmt,
int frames, int *compression, int send_to_cam)
{
int fps, ret = 0;
struct Nala_table_entry *pEntry;
int frames2frames[31] =
{ /* closest match of framerate */
0, 0, 0, 0, 4, /* 0-4 */
5, 5, 7, 7, 10, /* 5-9 */
10, 10, 12, 12, 15, /* 10-14 */
15, 15, 15, 20, 20, /* 15-19 */
20, 20, 20, 24, 24, /* 20-24 */
24, 24, 24, 24, 24, /* 25-29 */
24 /* 30 */
};
int frames2table[31] =
{ 0, 0, 0, 0, 0, /* 0-4 */
1, 1, 1, 2, 2, /* 5-9 */
3, 3, 4, 4, 4, /* 10-14 */
5, 5, 5, 5, 5, /* 15-19 */
6, 6, 6, 6, 7, /* 20-24 */
7, 7, 7, 7, 7, /* 25-29 */
7 /* 30 */
};
if (size < 0 || size > PSZ_CIF)
return -EINVAL;
if (frames < 4)
frames = 4;
else if (size > PSZ_QCIF && frames > 15)
frames = 15;
else if (frames > 25)
frames = 25;
frames = frames2frames[frames];
fps = frames2table[frames];
pEntry = &Nala_table[size][fps];
if (pEntry->alternate == 0)
return -EINVAL;
if (send_to_cam)
ret = send_video_command(pdev, pdev->vendpoint,
pEntry->mode, 3);
if (ret < 0)
return ret;
if (pEntry->compressed && pixfmt == V4L2_PIX_FMT_YUV420)
pwc_dec1_init(pdev, pEntry->mode);
/* Set various parameters */
pdev->pixfmt = pixfmt;
pdev->vframes = frames;
pdev->valternate = pEntry->alternate;
pdev->width = pwc_image_sizes[size][0];
pdev->height = pwc_image_sizes[size][1];
pdev->frame_size = (pdev->width * pdev->height * 3) / 2;
if (pEntry->compressed) {
if (pdev->release < 5) { /* 4 fold compression */
pdev->vbandlength = 528;
pdev->frame_size /= 4;
}
else {
pdev->vbandlength = 704;
pdev->frame_size /= 3;
}
}
else
pdev->vbandlength = 0;
/* Let pwc-if.c:isoc_init know we don't support higher compression */
*compression = 3;
return 0;
}
static int set_video_mode_Timon(struct pwc_device *pdev, int size, int pixfmt,
int frames, int *compression, int send_to_cam)
{
const struct Timon_table_entry *pChoose;
int fps, ret = 0;
if (size >= PSZ_MAX || *compression < 0 || *compression > 3)
return -EINVAL;
if (frames < 5)
frames = 5;
else if (size == PSZ_VGA && frames > 15)
frames = 15;
else if (frames > 30)
frames = 30;
fps = (frames / 5) - 1;
/* Find a supported framerate with progressively higher compression */
do {
pChoose = &Timon_table[size][fps][*compression];
if (pChoose->alternate != 0)
break;
(*compression)++;
} while (*compression <= 3);
if (pChoose->alternate == 0)
return -ENOENT; /* Not supported. */
if (send_to_cam)
ret = send_video_command(pdev, pdev->vendpoint,
pChoose->mode, 13);
if (ret < 0)
return ret;
if (pChoose->bandlength > 0 && pixfmt == V4L2_PIX_FMT_YUV420)
pwc_dec23_init(pdev, pChoose->mode);
/* Set various parameters */
pdev->pixfmt = pixfmt;
pdev->vframes = (fps + 1) * 5;
pdev->valternate = pChoose->alternate;
pdev->width = pwc_image_sizes[size][0];
pdev->height = pwc_image_sizes[size][1];
pdev->vbandlength = pChoose->bandlength;
if (pChoose->bandlength > 0)
pdev->frame_size = (pChoose->bandlength * pdev->height) / 4;
else
pdev->frame_size = (pdev->width * pdev->height * 12) / 8;
return 0;
}
static int set_video_mode_Kiara(struct pwc_device *pdev, int size, int pixfmt,
int frames, int *compression, int send_to_cam)
{
const struct Kiara_table_entry *pChoose;
int fps, ret = 0;
if (size >= PSZ_MAX || *compression < 0 || *compression > 3)
return -EINVAL;
if (frames < 5)
frames = 5;
else if (size == PSZ_VGA && frames > 15)
frames = 15;
else if (frames > 30)
frames = 30;
fps = (frames / 5) - 1;
/* Find a supported framerate with progressively higher compression */
do {
pChoose = &Kiara_table[size][fps][*compression];
if (pChoose->alternate != 0)
break;
(*compression)++;
} while (*compression <= 3);
if (pChoose->alternate == 0)
return -ENOENT; /* Not supported. */
/* Firmware bug: video endpoint is 5, but commands are sent to endpoint 4 */
if (send_to_cam)
ret = send_video_command(pdev, 4, pChoose->mode, 12);
if (ret < 0)
return ret;
if (pChoose->bandlength > 0 && pixfmt == V4L2_PIX_FMT_YUV420)
pwc_dec23_init(pdev, pChoose->mode);
/* All set and go */
pdev->pixfmt = pixfmt;
pdev->vframes = (fps + 1) * 5;
pdev->valternate = pChoose->alternate;
pdev->width = pwc_image_sizes[size][0];
pdev->height = pwc_image_sizes[size][1];
pdev->vbandlength = pChoose->bandlength;
if (pdev->vbandlength > 0)
pdev->frame_size = (pdev->vbandlength * pdev->height) / 4;
else
pdev->frame_size = (pdev->width * pdev->height * 12) / 8;
PWC_TRACE("frame_size=%d, vframes=%d, vsize=%d, vbandlength=%d\n",
pdev->frame_size, pdev->vframes, size, pdev->vbandlength);
return 0;
}
int pwc_set_video_mode(struct pwc_device *pdev, int width, int height,
int pixfmt, int frames, int *compression, int send_to_cam)
{
int ret, size;
PWC_DEBUG_FLOW("set_video_mode(%dx%d @ %d, pixfmt %08x).\n",
width, height, frames, pixfmt);
size = pwc_get_size(pdev, width, height);
PWC_TRACE("decode_size = %d.\n", size);
if (DEVICE_USE_CODEC1(pdev->type)) {
ret = set_video_mode_Nala(pdev, size, pixfmt, frames,
compression, send_to_cam);
} else if (DEVICE_USE_CODEC3(pdev->type)) {
ret = set_video_mode_Kiara(pdev, size, pixfmt, frames,
compression, send_to_cam);
} else {
ret = set_video_mode_Timon(pdev, size, pixfmt, frames,
compression, send_to_cam);
}
if (ret < 0) {
PWC_ERROR("Failed to set video mode %s@%d fps; return code = %d\n", size2name[size], frames, ret);
return ret;
}
pdev->frame_total_size = pdev->frame_size + pdev->frame_header_size + pdev->frame_trailer_size;
PWC_DEBUG_SIZE("Set resolution to %dx%d\n", pdev->width, pdev->height);
return 0;
}
static unsigned int pwc_get_fps_Nala(struct pwc_device *pdev, unsigned int index, unsigned int size)
{
unsigned int i;
for (i = 0; i < PWC_FPS_MAX_NALA; i++) {
if (Nala_table[size][i].alternate) {
if (index--==0) return Nala_fps_vector[i];
}
}
return 0;
}
static unsigned int pwc_get_fps_Kiara(struct pwc_device *pdev, unsigned int index, unsigned int size)
{
unsigned int i;
for (i = 0; i < PWC_FPS_MAX_KIARA; i++) {
if (Kiara_table[size][i][3].alternate) {
if (index--==0) return Kiara_fps_vector[i];
}
}
return 0;
}
static unsigned int pwc_get_fps_Timon(struct pwc_device *pdev, unsigned int index, unsigned int size)
{
unsigned int i;
for (i=0; i < PWC_FPS_MAX_TIMON; i++) {
if (Timon_table[size][i][3].alternate) {
if (index--==0) return Timon_fps_vector[i];
}
}
return 0;
}
unsigned int pwc_get_fps(struct pwc_device *pdev, unsigned int index, unsigned int size)
{
unsigned int ret;
if (DEVICE_USE_CODEC1(pdev->type)) {
ret = pwc_get_fps_Nala(pdev, index, size);
} else if (DEVICE_USE_CODEC3(pdev->type)) {
ret = pwc_get_fps_Kiara(pdev, index, size);
} else {
ret = pwc_get_fps_Timon(pdev, index, size);
}
return ret;
}
int pwc_get_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data)
{
int ret;
ret = recv_control_msg(pdev, request, value, 1);
if (ret < 0)
return ret;
*data = pdev->ctrl_buf[0];
return 0;
}
int pwc_set_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, u8 data)
{
int ret;
pdev->ctrl_buf[0] = data;
ret = send_control_msg(pdev, request, value, pdev->ctrl_buf, 1);
if (ret < 0)
return ret;
return 0;
}
int pwc_get_s8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data)
{
int ret;
ret = recv_control_msg(pdev, request, value, 1);
if (ret < 0)
return ret;
*data = ((s8 *)pdev->ctrl_buf)[0];
return 0;
}
int pwc_get_u16_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data)
{
int ret;
ret = recv_control_msg(pdev, request, value, 2);
if (ret < 0)
return ret;
*data = (pdev->ctrl_buf[1] << 8) | pdev->ctrl_buf[0];
return 0;
}
int pwc_set_u16_ctrl(struct pwc_device *pdev, u8 request, u16 value, u16 data)
{
int ret;
pdev->ctrl_buf[0] = data & 0xff;
pdev->ctrl_buf[1] = data >> 8;
ret = send_control_msg(pdev, request, value, pdev->ctrl_buf, 2);
if (ret < 0)
return ret;
return 0;
}
int pwc_button_ctrl(struct pwc_device *pdev, u16 value)
{
int ret;
ret = send_control_msg(pdev, SET_STATUS_CTL, value, NULL, 0);
if (ret < 0)
return ret;
return 0;
}
/* POWER */
void pwc_camera_power(struct pwc_device *pdev, int power)
{
int r;
if (!pdev->power_save)
return;
if (pdev->type < 675 || (pdev->type < 730 && pdev->release < 6))
return; /* Not supported by Nala or Timon < release 6 */
if (power)
pdev->ctrl_buf[0] = 0x00; /* active */
else
pdev->ctrl_buf[0] = 0xFF; /* power save */
r = send_control_msg(pdev, SET_STATUS_CTL,
SET_POWER_SAVE_MODE_FORMATTER, pdev->ctrl_buf, 1);
if (r < 0)
PWC_ERROR("Failed to power %s camera (%d)\n",
power ? "on" : "off", r);
}
int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value)
{
int r;
if (pdev->type < 730)
return 0;
on_value /= 100;
off_value /= 100;
if (on_value < 0)
on_value = 0;
if (on_value > 0xff)
on_value = 0xff;
if (off_value < 0)
off_value = 0;
if (off_value > 0xff)
off_value = 0xff;
pdev->ctrl_buf[0] = on_value;
pdev->ctrl_buf[1] = off_value;
r = send_control_msg(pdev,
SET_STATUS_CTL, LED_FORMATTER, pdev->ctrl_buf, 2);
if (r < 0)
PWC_ERROR("Failed to set LED on/off time (%d)\n", r);
return r;
}
#ifdef CONFIG_USB_PWC_DEBUG
int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor)
{
int ret, request;
if (pdev->type < 675)
request = SENSOR_TYPE_FORMATTER1;
else if (pdev->type < 730)
return -1; /* The Vesta series doesn't have this call */
else
request = SENSOR_TYPE_FORMATTER2;
ret = recv_control_msg(pdev, GET_STATUS_CTL, request, 1);
if (ret < 0)
return ret;
if (pdev->type < 675)
*sensor = pdev->ctrl_buf[0] | 0x100;
else
*sensor = pdev->ctrl_buf[0];
return 0;
}
#endif
| linux-master | drivers/media/usb/pwc/pwc-ctrl.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
Various miscellaneous functions and tables.
(C) 1999-2003 Nemosoft Unv.
(C) 2004-2006 Luc Saillard ([email protected])
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
#include "pwc.h"
const int pwc_image_sizes[PSZ_MAX][2] =
{
{ 128, 96 }, /* sqcif */
{ 160, 120 }, /* qsif */
{ 176, 144 }, /* qcif */
{ 320, 240 }, /* sif */
{ 352, 288 }, /* cif */
{ 640, 480 }, /* vga */
};
/* x,y -> PSZ_ */
int pwc_get_size(struct pwc_device *pdev, int width, int height)
{
int i;
/* Find the largest size supported by the camera that fits into the
requested size. */
for (i = PSZ_MAX - 1; i >= 0; i--) {
if (!(pdev->image_mask & (1 << i)))
continue;
if (pwc_image_sizes[i][0] <= width &&
pwc_image_sizes[i][1] <= height)
return i;
}
/* No mode found, return the smallest mode we have */
for (i = 0; i < PSZ_MAX; i++) {
if (pdev->image_mask & (1 << i))
return i;
}
/* Never reached there always is at least one supported mode */
return 0;
}
/* initialize variables depending on type and decompressor */
void pwc_construct(struct pwc_device *pdev)
{
if (DEVICE_USE_CODEC1(pdev->type)) {
pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QCIF | 1 << PSZ_CIF;
pdev->vcinterface = 2;
pdev->vendpoint = 4;
pdev->frame_header_size = 0;
pdev->frame_trailer_size = 0;
} else if (DEVICE_USE_CODEC3(pdev->type)) {
pdev->image_mask = 1 << PSZ_QSIF | 1 << PSZ_SIF | 1 << PSZ_VGA;
pdev->vcinterface = 3;
pdev->vendpoint = 5;
pdev->frame_header_size = TOUCAM_HEADER_SIZE;
pdev->frame_trailer_size = TOUCAM_TRAILER_SIZE;
} else /* if (DEVICE_USE_CODEC2(pdev->type)) */ {
pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QSIF | 1 << PSZ_QCIF | 1 << PSZ_SIF | 1 << PSZ_CIF | 1 << PSZ_VGA;
pdev->vcinterface = 3;
pdev->vendpoint = 4;
pdev->frame_header_size = 0;
pdev->frame_trailer_size = 0;
}
}
| linux-master | drivers/media/usb/pwc/pwc-misc.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
Decompression for chipset version 1
(C) 2004-2006 Luc Saillard ([email protected])
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
#include "pwc.h"
void pwc_dec1_init(struct pwc_device *pdev, const unsigned char *cmd)
{
struct pwc_dec1_private *pdec = &pdev->dec1;
pdec->version = pdev->release;
}
| linux-master | drivers/media/usb/pwc/pwc-dec1.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* Linux driver for Philips webcam
USB and Video4Linux interface part.
(C) 1999-2004 Nemosoft Unv.
(C) 2004-2006 Luc Saillard ([email protected])
(C) 2011 Hans de Goede <[email protected]>
NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
driver and thus may have bugs that are not present in the original version.
Please send bug reports and support requests to <[email protected]>.
The decompression routines have been implemented by reverse-engineering the
Nemosoft binary pwcx module. Caveat emptor.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/poll.h>
#include <linux/vmalloc.h>
#include <linux/jiffies.h>
#include <asm/io.h>
#include "pwc.h"
#define PWC_CID_CUSTOM(ctrl) ((V4L2_CID_USER_BASE | 0xf000) + custom_ ## ctrl)
static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl);
static int pwc_s_ctrl(struct v4l2_ctrl *ctrl);
static const struct v4l2_ctrl_ops pwc_ctrl_ops = {
.g_volatile_ctrl = pwc_g_volatile_ctrl,
.s_ctrl = pwc_s_ctrl,
};
enum { awb_indoor, awb_outdoor, awb_fl, awb_manual, awb_auto };
enum { custom_autocontour, custom_contour, custom_noise_reduction,
custom_awb_speed, custom_awb_delay,
custom_save_user, custom_restore_user, custom_restore_factory };
static const char * const pwc_auto_whitebal_qmenu[] = {
"Indoor (Incandescant Lighting) Mode",
"Outdoor (Sunlight) Mode",
"Indoor (Fluorescent Lighting) Mode",
"Manual Mode",
"Auto Mode",
NULL
};
static const struct v4l2_ctrl_config pwc_auto_white_balance_cfg = {
.ops = &pwc_ctrl_ops,
.id = V4L2_CID_AUTO_WHITE_BALANCE,
.type = V4L2_CTRL_TYPE_MENU,
.max = awb_auto,
.qmenu = pwc_auto_whitebal_qmenu,
};
static const struct v4l2_ctrl_config pwc_autocontour_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(autocontour),
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Auto contour",
.min = 0,
.max = 1,
.step = 1,
};
static const struct v4l2_ctrl_config pwc_contour_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(contour),
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Contour",
.flags = V4L2_CTRL_FLAG_SLIDER,
.min = 0,
.max = 63,
.step = 1,
};
static const struct v4l2_ctrl_config pwc_backlight_cfg = {
.ops = &pwc_ctrl_ops,
.id = V4L2_CID_BACKLIGHT_COMPENSATION,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.min = 0,
.max = 1,
.step = 1,
};
static const struct v4l2_ctrl_config pwc_flicker_cfg = {
.ops = &pwc_ctrl_ops,
.id = V4L2_CID_BAND_STOP_FILTER,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.min = 0,
.max = 1,
.step = 1,
};
static const struct v4l2_ctrl_config pwc_noise_reduction_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(noise_reduction),
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Dynamic Noise Reduction",
.min = 0,
.max = 3,
.step = 1,
};
static const struct v4l2_ctrl_config pwc_save_user_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(save_user),
.type = V4L2_CTRL_TYPE_BUTTON,
.name = "Save User Settings",
};
static const struct v4l2_ctrl_config pwc_restore_user_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(restore_user),
.type = V4L2_CTRL_TYPE_BUTTON,
.name = "Restore User Settings",
};
static const struct v4l2_ctrl_config pwc_restore_factory_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(restore_factory),
.type = V4L2_CTRL_TYPE_BUTTON,
.name = "Restore Factory Settings",
};
static const struct v4l2_ctrl_config pwc_awb_speed_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(awb_speed),
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Auto White Balance Speed",
.min = 1,
.max = 32,
.step = 1,
};
static const struct v4l2_ctrl_config pwc_awb_delay_cfg = {
.ops = &pwc_ctrl_ops,
.id = PWC_CID_CUSTOM(awb_delay),
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Auto White Balance Delay",
.min = 0,
.max = 63,
.step = 1,
};
int pwc_init_controls(struct pwc_device *pdev)
{
struct v4l2_ctrl_handler *hdl;
struct v4l2_ctrl_config cfg;
int r, def;
hdl = &pdev->ctrl_handler;
r = v4l2_ctrl_handler_init(hdl, 20);
if (r)
return r;
/* Brightness, contrast, saturation, gamma */
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, BRIGHTNESS_FORMATTER, &def);
if (r || def > 127)
def = 63;
pdev->brightness = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_BRIGHTNESS, 0, 127, 1, def);
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, CONTRAST_FORMATTER, &def);
if (r || def > 63)
def = 31;
pdev->contrast = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_CONTRAST, 0, 63, 1, def);
if (pdev->type >= 675) {
if (pdev->type < 730)
pdev->saturation_fmt = SATURATION_MODE_FORMATTER2;
else
pdev->saturation_fmt = SATURATION_MODE_FORMATTER1;
r = pwc_get_s8_ctrl(pdev, GET_CHROM_CTL, pdev->saturation_fmt,
&def);
if (r || def < -100 || def > 100)
def = 0;
pdev->saturation = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_SATURATION, -100, 100, 1, def);
}
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, GAMMA_FORMATTER, &def);
if (r || def > 31)
def = 15;
pdev->gamma = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_GAMMA, 0, 31, 1, def);
/* auto white balance, red gain, blue gain */
r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL, WB_MODE_FORMATTER, &def);
if (r || def > awb_auto)
def = awb_auto;
cfg = pwc_auto_white_balance_cfg;
cfg.name = v4l2_ctrl_get_name(cfg.id);
cfg.def = def;
pdev->auto_white_balance = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
/* check auto controls to avoid NULL deref in v4l2_ctrl_auto_cluster */
if (!pdev->auto_white_balance)
return hdl->error;
r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL,
PRESET_MANUAL_RED_GAIN_FORMATTER, &def);
if (r)
def = 127;
pdev->red_balance = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_RED_BALANCE, 0, 255, 1, def);
r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL,
PRESET_MANUAL_BLUE_GAIN_FORMATTER, &def);
if (r)
def = 127;
pdev->blue_balance = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_BLUE_BALANCE, 0, 255, 1, def);
v4l2_ctrl_auto_cluster(3, &pdev->auto_white_balance, awb_manual, true);
/* autogain, gain */
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, AGC_MODE_FORMATTER, &def);
if (r || (def != 0 && def != 0xff))
def = 0;
/* Note a register value if 0 means auto gain is on */
pdev->autogain = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_AUTOGAIN, 0, 1, 1, def == 0);
if (!pdev->autogain)
return hdl->error;
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, PRESET_AGC_FORMATTER, &def);
if (r || def > 63)
def = 31;
pdev->gain = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_GAIN, 0, 63, 1, def);
/* auto exposure, exposure */
if (DEVICE_USE_CODEC2(pdev->type)) {
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, SHUTTER_MODE_FORMATTER,
&def);
if (r || (def != 0 && def != 0xff))
def = 0;
/*
* def = 0 auto, def = ff manual
* menu idx 0 = auto, idx 1 = manual
*/
pdev->exposure_auto = v4l2_ctrl_new_std_menu(hdl,
&pwc_ctrl_ops,
V4L2_CID_EXPOSURE_AUTO,
1, 0, def != 0);
if (!pdev->exposure_auto)
return hdl->error;
/* GET_LUM_CTL, PRESET_SHUTTER_FORMATTER is unreliable */
r = pwc_get_u16_ctrl(pdev, GET_STATUS_CTL,
READ_SHUTTER_FORMATTER, &def);
if (r || def > 655)
def = 655;
pdev->exposure = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_EXPOSURE, 0, 655, 1, def);
/* CODEC2: separate auto gain & auto exposure */
v4l2_ctrl_auto_cluster(2, &pdev->autogain, 0, true);
v4l2_ctrl_auto_cluster(2, &pdev->exposure_auto,
V4L2_EXPOSURE_MANUAL, true);
} else if (DEVICE_USE_CODEC3(pdev->type)) {
/* GET_LUM_CTL, PRESET_SHUTTER_FORMATTER is unreliable */
r = pwc_get_u16_ctrl(pdev, GET_STATUS_CTL,
READ_SHUTTER_FORMATTER, &def);
if (r || def > 255)
def = 255;
pdev->exposure = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_EXPOSURE, 0, 255, 1, def);
/* CODEC3: both gain and exposure controlled by autogain */
pdev->autogain_expo_cluster[0] = pdev->autogain;
pdev->autogain_expo_cluster[1] = pdev->gain;
pdev->autogain_expo_cluster[2] = pdev->exposure;
v4l2_ctrl_auto_cluster(3, pdev->autogain_expo_cluster,
0, true);
}
/* color / bw setting */
r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL, COLOUR_MODE_FORMATTER,
&def);
if (r || (def != 0 && def != 0xff))
def = 0xff;
/* def = 0 bw, def = ff color, menu idx 0 = color, idx 1 = bw */
pdev->colorfx = v4l2_ctrl_new_std_menu(hdl, &pwc_ctrl_ops,
V4L2_CID_COLORFX, 1, 0, def == 0);
/* autocontour, contour */
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, AUTO_CONTOUR_FORMATTER, &def);
if (r || (def != 0 && def != 0xff))
def = 0;
cfg = pwc_autocontour_cfg;
cfg.def = def == 0;
pdev->autocontour = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
if (!pdev->autocontour)
return hdl->error;
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, PRESET_CONTOUR_FORMATTER, &def);
if (r || def > 63)
def = 31;
cfg = pwc_contour_cfg;
cfg.def = def;
pdev->contour = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
v4l2_ctrl_auto_cluster(2, &pdev->autocontour, 0, false);
/* backlight */
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL,
BACK_LIGHT_COMPENSATION_FORMATTER, &def);
if (r || (def != 0 && def != 0xff))
def = 0;
cfg = pwc_backlight_cfg;
cfg.name = v4l2_ctrl_get_name(cfg.id);
cfg.def = def == 0;
pdev->backlight = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
/* flikker rediction */
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL,
FLICKERLESS_MODE_FORMATTER, &def);
if (r || (def != 0 && def != 0xff))
def = 0;
cfg = pwc_flicker_cfg;
cfg.name = v4l2_ctrl_get_name(cfg.id);
cfg.def = def == 0;
pdev->flicker = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
/* Dynamic noise reduction */
r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL,
DYNAMIC_NOISE_CONTROL_FORMATTER, &def);
if (r || def > 3)
def = 2;
cfg = pwc_noise_reduction_cfg;
cfg.def = def;
pdev->noise_reduction = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
/* Save / Restore User / Factory Settings */
pdev->save_user = v4l2_ctrl_new_custom(hdl, &pwc_save_user_cfg, NULL);
pdev->restore_user = v4l2_ctrl_new_custom(hdl, &pwc_restore_user_cfg,
NULL);
if (pdev->restore_user)
pdev->restore_user->flags |= V4L2_CTRL_FLAG_UPDATE;
pdev->restore_factory = v4l2_ctrl_new_custom(hdl,
&pwc_restore_factory_cfg,
NULL);
if (pdev->restore_factory)
pdev->restore_factory->flags |= V4L2_CTRL_FLAG_UPDATE;
/* Auto White Balance speed & delay */
r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL,
AWB_CONTROL_SPEED_FORMATTER, &def);
if (r || def < 1 || def > 32)
def = 1;
cfg = pwc_awb_speed_cfg;
cfg.def = def;
pdev->awb_speed = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL,
AWB_CONTROL_DELAY_FORMATTER, &def);
if (r || def > 63)
def = 0;
cfg = pwc_awb_delay_cfg;
cfg.def = def;
pdev->awb_delay = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
if (!(pdev->features & FEATURE_MOTOR_PANTILT))
return hdl->error;
/* Motor pan / tilt / reset */
pdev->motor_pan = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_PAN_RELATIVE, -4480, 4480, 64, 0);
if (!pdev->motor_pan)
return hdl->error;
pdev->motor_tilt = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_TILT_RELATIVE, -1920, 1920, 64, 0);
pdev->motor_pan_reset = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_PAN_RESET, 0, 0, 0, 0);
pdev->motor_tilt_reset = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops,
V4L2_CID_TILT_RESET, 0, 0, 0, 0);
v4l2_ctrl_cluster(4, &pdev->motor_pan);
return hdl->error;
}
static void pwc_vidioc_fill_fmt(struct v4l2_format *f,
int width, int height, u32 pixfmt)
{
memset(&f->fmt.pix, 0, sizeof(struct v4l2_pix_format));
f->fmt.pix.width = width;
f->fmt.pix.height = height;
f->fmt.pix.field = V4L2_FIELD_NONE;
f->fmt.pix.pixelformat = pixfmt;
f->fmt.pix.bytesperline = f->fmt.pix.width;
f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.width * 3 / 2;
f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
PWC_DEBUG_IOCTL("pwc_vidioc_fill_fmt() width=%d, height=%d, bytesperline=%d, sizeimage=%d, pixelformat=%c%c%c%c\n",
f->fmt.pix.width,
f->fmt.pix.height,
f->fmt.pix.bytesperline,
f->fmt.pix.sizeimage,
(f->fmt.pix.pixelformat)&255,
(f->fmt.pix.pixelformat>>8)&255,
(f->fmt.pix.pixelformat>>16)&255,
(f->fmt.pix.pixelformat>>24)&255);
}
/* ioctl(VIDIOC_TRY_FMT) */
static int pwc_vidioc_try_fmt(struct pwc_device *pdev, struct v4l2_format *f)
{
int size;
if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {
PWC_DEBUG_IOCTL("Bad video type must be V4L2_BUF_TYPE_VIDEO_CAPTURE\n");
return -EINVAL;
}
switch (f->fmt.pix.pixelformat) {
case V4L2_PIX_FMT_YUV420:
break;
case V4L2_PIX_FMT_PWC1:
if (DEVICE_USE_CODEC23(pdev->type)) {
PWC_DEBUG_IOCTL("codec1 is only supported for old pwc webcam\n");
f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
}
break;
case V4L2_PIX_FMT_PWC2:
if (DEVICE_USE_CODEC1(pdev->type)) {
PWC_DEBUG_IOCTL("codec23 is only supported for new pwc webcam\n");
f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
}
break;
default:
PWC_DEBUG_IOCTL("Unsupported pixel format\n");
f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
}
size = pwc_get_size(pdev, f->fmt.pix.width, f->fmt.pix.height);
pwc_vidioc_fill_fmt(f,
pwc_image_sizes[size][0],
pwc_image_sizes[size][1],
f->fmt.pix.pixelformat);
return 0;
}
/* ioctl(VIDIOC_SET_FMT) */
static int pwc_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)
{
struct pwc_device *pdev = video_drvdata(file);
int ret, pixelformat, compression = 0;
ret = pwc_vidioc_try_fmt(pdev, f);
if (ret < 0)
return ret;
if (vb2_is_busy(&pdev->vb_queue))
return -EBUSY;
pixelformat = f->fmt.pix.pixelformat;
PWC_DEBUG_IOCTL("Trying to set format to: width=%d height=%d fps=%d format=%c%c%c%c\n",
f->fmt.pix.width, f->fmt.pix.height, pdev->vframes,
(pixelformat)&255,
(pixelformat>>8)&255,
(pixelformat>>16)&255,
(pixelformat>>24)&255);
ret = pwc_set_video_mode(pdev, f->fmt.pix.width, f->fmt.pix.height,
pixelformat, 30, &compression, 0);
PWC_DEBUG_IOCTL("pwc_set_video_mode(), return=%d\n", ret);
pwc_vidioc_fill_fmt(f, pdev->width, pdev->height, pdev->pixfmt);
return ret;
}
static int pwc_querycap(struct file *file, void *fh, struct v4l2_capability *cap)
{
struct pwc_device *pdev = video_drvdata(file);
strscpy(cap->driver, PWC_NAME, sizeof(cap->driver));
strscpy(cap->card, pdev->vdev.name, sizeof(cap->card));
usb_make_path(pdev->udev, cap->bus_info, sizeof(cap->bus_info));
return 0;
}
static int pwc_enum_input(struct file *file, void *fh, struct v4l2_input *i)
{
if (i->index) /* Only one INPUT is supported */
return -EINVAL;
strscpy(i->name, "Camera", sizeof(i->name));
i->type = V4L2_INPUT_TYPE_CAMERA;
return 0;
}
static int pwc_g_input(struct file *file, void *fh, unsigned int *i)
{
*i = 0;
return 0;
}
static int pwc_s_input(struct file *file, void *fh, unsigned int i)
{
return i ? -EINVAL : 0;
}
static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
{
struct pwc_device *pdev =
container_of(ctrl->handler, struct pwc_device, ctrl_handler);
int ret = 0;
switch (ctrl->id) {
case V4L2_CID_AUTO_WHITE_BALANCE:
if (pdev->color_bal_valid &&
(pdev->auto_white_balance->val != awb_auto ||
time_before(jiffies,
pdev->last_color_bal_update + HZ / 4))) {
pdev->red_balance->val = pdev->last_red_balance;
pdev->blue_balance->val = pdev->last_blue_balance;
break;
}
ret = pwc_get_u8_ctrl(pdev, GET_STATUS_CTL,
READ_RED_GAIN_FORMATTER,
&pdev->red_balance->val);
if (ret)
break;
ret = pwc_get_u8_ctrl(pdev, GET_STATUS_CTL,
READ_BLUE_GAIN_FORMATTER,
&pdev->blue_balance->val);
if (ret)
break;
pdev->last_red_balance = pdev->red_balance->val;
pdev->last_blue_balance = pdev->blue_balance->val;
pdev->last_color_bal_update = jiffies;
pdev->color_bal_valid = true;
break;
case V4L2_CID_AUTOGAIN:
if (pdev->gain_valid && time_before(jiffies,
pdev->last_gain_update + HZ / 4)) {
pdev->gain->val = pdev->last_gain;
break;
}
ret = pwc_get_u8_ctrl(pdev, GET_STATUS_CTL,
READ_AGC_FORMATTER, &pdev->gain->val);
if (ret)
break;
pdev->last_gain = pdev->gain->val;
pdev->last_gain_update = jiffies;
pdev->gain_valid = true;
if (!DEVICE_USE_CODEC3(pdev->type))
break;
/* For CODEC3 where autogain also controls expo */
fallthrough;
case V4L2_CID_EXPOSURE_AUTO:
if (pdev->exposure_valid && time_before(jiffies,
pdev->last_exposure_update + HZ / 4)) {
pdev->exposure->val = pdev->last_exposure;
break;
}
ret = pwc_get_u16_ctrl(pdev, GET_STATUS_CTL,
READ_SHUTTER_FORMATTER,
&pdev->exposure->val);
if (ret)
break;
pdev->last_exposure = pdev->exposure->val;
pdev->last_exposure_update = jiffies;
pdev->exposure_valid = true;
break;
default:
ret = -EINVAL;
}
if (ret)
PWC_ERROR("g_ctrl %s error %d\n", ctrl->name, ret);
return ret;
}
static int pwc_set_awb(struct pwc_device *pdev)
{
int ret;
if (pdev->auto_white_balance->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
WB_MODE_FORMATTER,
pdev->auto_white_balance->val);
if (ret)
return ret;
if (pdev->auto_white_balance->val != awb_manual)
pdev->color_bal_valid = false; /* Force cache update */
/*
* If this is a preset, update our red / blue balance values
* so that events get generated for the new preset values
*/
if (pdev->auto_white_balance->val == awb_indoor ||
pdev->auto_white_balance->val == awb_outdoor ||
pdev->auto_white_balance->val == awb_fl)
pwc_g_volatile_ctrl(pdev->auto_white_balance);
}
if (pdev->auto_white_balance->val != awb_manual)
return 0;
if (pdev->red_balance->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
PRESET_MANUAL_RED_GAIN_FORMATTER,
pdev->red_balance->val);
if (ret)
return ret;
}
if (pdev->blue_balance->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
PRESET_MANUAL_BLUE_GAIN_FORMATTER,
pdev->blue_balance->val);
if (ret)
return ret;
}
return 0;
}
/* For CODEC2 models which have separate autogain and auto exposure */
static int pwc_set_autogain(struct pwc_device *pdev)
{
int ret;
if (pdev->autogain->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
AGC_MODE_FORMATTER,
pdev->autogain->val ? 0 : 0xff);
if (ret)
return ret;
if (pdev->autogain->val)
pdev->gain_valid = false; /* Force cache update */
}
if (pdev->autogain->val)
return 0;
if (pdev->gain->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
PRESET_AGC_FORMATTER,
pdev->gain->val);
if (ret)
return ret;
}
return 0;
}
/* For CODEC2 models which have separate autogain and auto exposure */
static int pwc_set_exposure_auto(struct pwc_device *pdev)
{
int ret;
int is_auto = pdev->exposure_auto->val == V4L2_EXPOSURE_AUTO;
if (pdev->exposure_auto->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
SHUTTER_MODE_FORMATTER,
is_auto ? 0 : 0xff);
if (ret)
return ret;
if (is_auto)
pdev->exposure_valid = false; /* Force cache update */
}
if (is_auto)
return 0;
if (pdev->exposure->is_new) {
ret = pwc_set_u16_ctrl(pdev, SET_LUM_CTL,
PRESET_SHUTTER_FORMATTER,
pdev->exposure->val);
if (ret)
return ret;
}
return 0;
}
/* For CODEC3 models which have autogain controlling both gain and exposure */
static int pwc_set_autogain_expo(struct pwc_device *pdev)
{
int ret;
if (pdev->autogain->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
AGC_MODE_FORMATTER,
pdev->autogain->val ? 0 : 0xff);
if (ret)
return ret;
if (pdev->autogain->val) {
pdev->gain_valid = false; /* Force cache update */
pdev->exposure_valid = false; /* Force cache update */
}
}
if (pdev->autogain->val)
return 0;
if (pdev->gain->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
PRESET_AGC_FORMATTER,
pdev->gain->val);
if (ret)
return ret;
}
if (pdev->exposure->is_new) {
ret = pwc_set_u16_ctrl(pdev, SET_LUM_CTL,
PRESET_SHUTTER_FORMATTER,
pdev->exposure->val);
if (ret)
return ret;
}
return 0;
}
static int pwc_set_motor(struct pwc_device *pdev)
{
int ret;
pdev->ctrl_buf[0] = 0;
if (pdev->motor_pan_reset->is_new)
pdev->ctrl_buf[0] |= 0x01;
if (pdev->motor_tilt_reset->is_new)
pdev->ctrl_buf[0] |= 0x02;
if (pdev->motor_pan_reset->is_new || pdev->motor_tilt_reset->is_new) {
ret = send_control_msg(pdev, SET_MPT_CTL,
PT_RESET_CONTROL_FORMATTER,
pdev->ctrl_buf, 1);
if (ret < 0)
return ret;
}
memset(pdev->ctrl_buf, 0, 4);
if (pdev->motor_pan->is_new) {
pdev->ctrl_buf[0] = pdev->motor_pan->val & 0xFF;
pdev->ctrl_buf[1] = (pdev->motor_pan->val >> 8);
}
if (pdev->motor_tilt->is_new) {
pdev->ctrl_buf[2] = pdev->motor_tilt->val & 0xFF;
pdev->ctrl_buf[3] = (pdev->motor_tilt->val >> 8);
}
if (pdev->motor_pan->is_new || pdev->motor_tilt->is_new) {
ret = send_control_msg(pdev, SET_MPT_CTL,
PT_RELATIVE_CONTROL_FORMATTER,
pdev->ctrl_buf, 4);
if (ret < 0)
return ret;
}
return 0;
}
static int pwc_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct pwc_device *pdev =
container_of(ctrl->handler, struct pwc_device, ctrl_handler);
int ret = 0;
switch (ctrl->id) {
case V4L2_CID_BRIGHTNESS:
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
BRIGHTNESS_FORMATTER, ctrl->val);
break;
case V4L2_CID_CONTRAST:
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
CONTRAST_FORMATTER, ctrl->val);
break;
case V4L2_CID_SATURATION:
ret = pwc_set_s8_ctrl(pdev, SET_CHROM_CTL,
pdev->saturation_fmt, ctrl->val);
break;
case V4L2_CID_GAMMA:
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
GAMMA_FORMATTER, ctrl->val);
break;
case V4L2_CID_AUTO_WHITE_BALANCE:
ret = pwc_set_awb(pdev);
break;
case V4L2_CID_AUTOGAIN:
if (DEVICE_USE_CODEC2(pdev->type))
ret = pwc_set_autogain(pdev);
else if (DEVICE_USE_CODEC3(pdev->type))
ret = pwc_set_autogain_expo(pdev);
else
ret = -EINVAL;
break;
case V4L2_CID_EXPOSURE_AUTO:
if (DEVICE_USE_CODEC2(pdev->type))
ret = pwc_set_exposure_auto(pdev);
else
ret = -EINVAL;
break;
case V4L2_CID_COLORFX:
ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
COLOUR_MODE_FORMATTER,
ctrl->val ? 0 : 0xff);
break;
case PWC_CID_CUSTOM(autocontour):
if (pdev->autocontour->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
AUTO_CONTOUR_FORMATTER,
pdev->autocontour->val ? 0 : 0xff);
}
if (ret == 0 && pdev->contour->is_new) {
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
PRESET_CONTOUR_FORMATTER,
pdev->contour->val);
}
break;
case V4L2_CID_BACKLIGHT_COMPENSATION:
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
BACK_LIGHT_COMPENSATION_FORMATTER,
ctrl->val ? 0 : 0xff);
break;
case V4L2_CID_BAND_STOP_FILTER:
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
FLICKERLESS_MODE_FORMATTER,
ctrl->val ? 0 : 0xff);
break;
case PWC_CID_CUSTOM(noise_reduction):
ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,
DYNAMIC_NOISE_CONTROL_FORMATTER,
ctrl->val);
break;
case PWC_CID_CUSTOM(save_user):
ret = pwc_button_ctrl(pdev, SAVE_USER_DEFAULTS_FORMATTER);
break;
case PWC_CID_CUSTOM(restore_user):
ret = pwc_button_ctrl(pdev, RESTORE_USER_DEFAULTS_FORMATTER);
break;
case PWC_CID_CUSTOM(restore_factory):
ret = pwc_button_ctrl(pdev,
RESTORE_FACTORY_DEFAULTS_FORMATTER);
break;
case PWC_CID_CUSTOM(awb_speed):
ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
AWB_CONTROL_SPEED_FORMATTER,
ctrl->val);
break;
case PWC_CID_CUSTOM(awb_delay):
ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
AWB_CONTROL_DELAY_FORMATTER,
ctrl->val);
break;
case V4L2_CID_PAN_RELATIVE:
ret = pwc_set_motor(pdev);
break;
default:
ret = -EINVAL;
}
if (ret)
PWC_ERROR("s_ctrl %s error %d\n", ctrl->name, ret);
return ret;
}
static int pwc_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f)
{
struct pwc_device *pdev = video_drvdata(file);
/* We only support two format: the raw format, and YUV */
switch (f->index) {
case 0:
/* RAW format */
f->pixelformat = pdev->type <= 646 ? V4L2_PIX_FMT_PWC1 : V4L2_PIX_FMT_PWC2;
break;
case 1:
f->pixelformat = V4L2_PIX_FMT_YUV420;
break;
default:
return -EINVAL;
}
return 0;
}
static int pwc_g_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)
{
struct pwc_device *pdev = video_drvdata(file);
if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
PWC_DEBUG_IOCTL("ioctl(VIDIOC_G_FMT) return size %dx%d\n",
pdev->width, pdev->height);
pwc_vidioc_fill_fmt(f, pdev->width, pdev->height, pdev->pixfmt);
return 0;
}
static int pwc_try_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)
{
struct pwc_device *pdev = video_drvdata(file);
return pwc_vidioc_try_fmt(pdev, f);
}
static int pwc_enum_framesizes(struct file *file, void *fh,
struct v4l2_frmsizeenum *fsize)
{
struct pwc_device *pdev = video_drvdata(file);
unsigned int i = 0, index = fsize->index;
if (fsize->pixel_format == V4L2_PIX_FMT_YUV420 ||
(fsize->pixel_format == V4L2_PIX_FMT_PWC1 &&
DEVICE_USE_CODEC1(pdev->type)) ||
(fsize->pixel_format == V4L2_PIX_FMT_PWC2 &&
DEVICE_USE_CODEC23(pdev->type))) {
for (i = 0; i < PSZ_MAX; i++) {
if (!(pdev->image_mask & (1UL << i)))
continue;
if (!index--) {
fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
fsize->discrete.width = pwc_image_sizes[i][0];
fsize->discrete.height = pwc_image_sizes[i][1];
return 0;
}
}
}
return -EINVAL;
}
static int pwc_enum_frameintervals(struct file *file, void *fh,
struct v4l2_frmivalenum *fival)
{
struct pwc_device *pdev = video_drvdata(file);
int size = -1;
unsigned int i;
for (i = 0; i < PSZ_MAX; i++) {
if (pwc_image_sizes[i][0] == fival->width &&
pwc_image_sizes[i][1] == fival->height) {
size = i;
break;
}
}
/* TODO: Support raw format */
if (size < 0 || fival->pixel_format != V4L2_PIX_FMT_YUV420)
return -EINVAL;
i = pwc_get_fps(pdev, fival->index, size);
if (!i)
return -EINVAL;
fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
fival->discrete.numerator = 1;
fival->discrete.denominator = i;
return 0;
}
static int pwc_g_parm(struct file *file, void *fh,
struct v4l2_streamparm *parm)
{
struct pwc_device *pdev = video_drvdata(file);
if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
memset(parm, 0, sizeof(*parm));
parm->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
parm->parm.capture.readbuffers = MIN_FRAMES;
parm->parm.capture.capability |= V4L2_CAP_TIMEPERFRAME;
parm->parm.capture.timeperframe.denominator = pdev->vframes;
parm->parm.capture.timeperframe.numerator = 1;
return 0;
}
static int pwc_s_parm(struct file *file, void *fh,
struct v4l2_streamparm *parm)
{
struct pwc_device *pdev = video_drvdata(file);
int compression = 0;
int ret, fps;
if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
return -EINVAL;
/* If timeperframe == 0, then reset the framerate to the nominal value.
We pick a high framerate here, and let pwc_set_video_mode() figure
out the best match. */
if (parm->parm.capture.timeperframe.numerator == 0 ||
parm->parm.capture.timeperframe.denominator == 0)
fps = 30;
else
fps = parm->parm.capture.timeperframe.denominator /
parm->parm.capture.timeperframe.numerator;
if (vb2_is_busy(&pdev->vb_queue))
return -EBUSY;
ret = pwc_set_video_mode(pdev, pdev->width, pdev->height, pdev->pixfmt,
fps, &compression, 0);
pwc_g_parm(file, fh, parm);
return ret;
}
const struct v4l2_ioctl_ops pwc_ioctl_ops = {
.vidioc_querycap = pwc_querycap,
.vidioc_enum_input = pwc_enum_input,
.vidioc_g_input = pwc_g_input,
.vidioc_s_input = pwc_s_input,
.vidioc_enum_fmt_vid_cap = pwc_enum_fmt_vid_cap,
.vidioc_g_fmt_vid_cap = pwc_g_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = pwc_s_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = pwc_try_fmt_vid_cap,
.vidioc_reqbufs = vb2_ioctl_reqbufs,
.vidioc_querybuf = vb2_ioctl_querybuf,
.vidioc_qbuf = vb2_ioctl_qbuf,
.vidioc_dqbuf = vb2_ioctl_dqbuf,
.vidioc_streamon = vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff,
.vidioc_log_status = v4l2_ctrl_log_status,
.vidioc_enum_framesizes = pwc_enum_framesizes,
.vidioc_enum_frameintervals = pwc_enum_frameintervals,
.vidioc_g_parm = pwc_g_parm,
.vidioc_s_parm = pwc_s_parm,
.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
};
| linux-master | drivers/media/usb/pwc/pwc-v4l.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Mirics MSi2500 driver
* Mirics MSi3101 SDR Dongle driver
*
* Copyright (C) 2013 Antti Palosaari <[email protected]>
*
* That driver is somehow based of pwc driver:
* (C) 1999-2004 Nemosoft Unv.
* (C) 2004-2006 Luc Saillard ([email protected])
* (C) 2011 Hans de Goede <[email protected]>
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <asm/div64.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-event.h>
#include <linux/usb.h>
#include <media/videobuf2-v4l2.h>
#include <media/videobuf2-vmalloc.h>
#include <linux/spi/spi.h>
static bool msi2500_emulated_fmt;
module_param_named(emulated_formats, msi2500_emulated_fmt, bool, 0644);
MODULE_PARM_DESC(emulated_formats, "enable emulated formats (disappears in future)");
/*
* iConfiguration 0
* bInterfaceNumber 0
* bAlternateSetting 1
* bNumEndpoints 1
* bEndpointAddress 0x81 EP 1 IN
* bmAttributes 1
* Transfer Type Isochronous
* wMaxPacketSize 0x1400 3x 1024 bytes
* bInterval 1
*/
#define MAX_ISO_BUFS (8)
#define ISO_FRAMES_PER_DESC (8)
#define ISO_MAX_FRAME_SIZE (3 * 1024)
#define ISO_BUFFER_SIZE (ISO_FRAMES_PER_DESC * ISO_MAX_FRAME_SIZE)
#define MAX_ISOC_ERRORS 20
/*
* TODO: These formats should be moved to V4L2 API. Formats are currently
* disabled from formats[] table, not visible to userspace.
*/
/* signed 12-bit */
#define MSI2500_PIX_FMT_SDR_S12 v4l2_fourcc('D', 'S', '1', '2')
/* Mirics MSi2500 format 384 */
#define MSI2500_PIX_FMT_SDR_MSI2500_384 v4l2_fourcc('M', '3', '8', '4')
static const struct v4l2_frequency_band bands[] = {
{
.tuner = 0,
.type = V4L2_TUNER_ADC,
.index = 0,
.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
.rangelow = 1200000,
.rangehigh = 15000000,
},
};
/* stream formats */
struct msi2500_format {
u32 pixelformat;
u32 buffersize;
};
/* format descriptions for capture and preview */
static struct msi2500_format formats[] = {
{
.pixelformat = V4L2_SDR_FMT_CS8,
.buffersize = 3 * 1008,
#if 0
}, {
.pixelformat = MSI2500_PIX_FMT_SDR_MSI2500_384,
}, {
.pixelformat = MSI2500_PIX_FMT_SDR_S12,
#endif
}, {
.pixelformat = V4L2_SDR_FMT_CS14LE,
.buffersize = 3 * 1008,
}, {
.pixelformat = V4L2_SDR_FMT_CU8,
.buffersize = 3 * 1008,
}, {
.pixelformat = V4L2_SDR_FMT_CU16LE,
.buffersize = 3 * 1008,
},
};
static const unsigned int NUM_FORMATS = ARRAY_SIZE(formats);
/* intermediate buffers with raw data from the USB device */
struct msi2500_frame_buf {
/* common v4l buffer stuff -- must be first */
struct vb2_v4l2_buffer vb;
struct list_head list;
};
struct msi2500_dev {
struct device *dev;
struct video_device vdev;
struct v4l2_device v4l2_dev;
struct v4l2_subdev *v4l2_subdev;
struct spi_master *master;
/* videobuf2 queue and queued buffers list */
struct vb2_queue vb_queue;
struct list_head queued_bufs;
spinlock_t queued_bufs_lock; /* Protects queued_bufs */
/* Note if taking both locks v4l2_lock must always be locked first! */
struct mutex v4l2_lock; /* Protects everything else */
struct mutex vb_queue_lock; /* Protects vb_queue and capt_file */
/* Pointer to our usb_device, will be NULL after unplug */
struct usb_device *udev; /* Both mutexes most be hold when setting! */
unsigned int f_adc;
u32 pixelformat;
u32 buffersize;
unsigned int num_formats;
unsigned int isoc_errors; /* number of contiguous ISOC errors */
unsigned int vb_full; /* vb is full and packets dropped */
struct urb *urbs[MAX_ISO_BUFS];
/* Controls */
struct v4l2_ctrl_handler hdl;
u32 next_sample; /* for track lost packets */
u32 sample; /* for sample rate calc */
unsigned long jiffies_next;
};
/* Private functions */
static struct msi2500_frame_buf *msi2500_get_next_fill_buf(
struct msi2500_dev *dev)
{
unsigned long flags;
struct msi2500_frame_buf *buf = NULL;
spin_lock_irqsave(&dev->queued_bufs_lock, flags);
if (list_empty(&dev->queued_bufs))
goto leave;
buf = list_entry(dev->queued_bufs.next, struct msi2500_frame_buf, list);
list_del(&buf->list);
leave:
spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
return buf;
}
/*
* +===========================================================================
* | 00-1023 | USB packet type '504'
* +===========================================================================
* | 00- 03 | sequence number of first sample in that USB packet
* +---------------------------------------------------------------------------
* | 04- 15 | garbage
* +---------------------------------------------------------------------------
* | 16-1023 | samples
* +---------------------------------------------------------------------------
* signed 8-bit sample
* 504 * 2 = 1008 samples
*
*
* +===========================================================================
* | 00-1023 | USB packet type '384'
* +===========================================================================
* | 00- 03 | sequence number of first sample in that USB packet
* +---------------------------------------------------------------------------
* | 04- 15 | garbage
* +---------------------------------------------------------------------------
* | 16- 175 | samples
* +---------------------------------------------------------------------------
* | 176- 179 | control bits for previous samples
* +---------------------------------------------------------------------------
* | 180- 339 | samples
* +---------------------------------------------------------------------------
* | 340- 343 | control bits for previous samples
* +---------------------------------------------------------------------------
* | 344- 503 | samples
* +---------------------------------------------------------------------------
* | 504- 507 | control bits for previous samples
* +---------------------------------------------------------------------------
* | 508- 667 | samples
* +---------------------------------------------------------------------------
* | 668- 671 | control bits for previous samples
* +---------------------------------------------------------------------------
* | 672- 831 | samples
* +---------------------------------------------------------------------------
* | 832- 835 | control bits for previous samples
* +---------------------------------------------------------------------------
* | 836- 995 | samples
* +---------------------------------------------------------------------------
* | 996- 999 | control bits for previous samples
* +---------------------------------------------------------------------------
* | 1000-1023 | garbage
* +---------------------------------------------------------------------------
*
* Bytes 4 - 7 could have some meaning?
*
* Control bits for previous samples is 32-bit field, containing 16 x 2-bit
* numbers. This results one 2-bit number for 8 samples. It is likely used for
* bit shifting sample by given bits, increasing actual sampling resolution.
* Number 2 (0b10) was never seen.
*
* 6 * 16 * 2 * 4 = 768 samples. 768 * 4 = 3072 bytes
*
*
* +===========================================================================
* | 00-1023 | USB packet type '336'
* +===========================================================================
* | 00- 03 | sequence number of first sample in that USB packet
* +---------------------------------------------------------------------------
* | 04- 15 | garbage
* +---------------------------------------------------------------------------
* | 16-1023 | samples
* +---------------------------------------------------------------------------
* signed 12-bit sample
*
*
* +===========================================================================
* | 00-1023 | USB packet type '252'
* +===========================================================================
* | 00- 03 | sequence number of first sample in that USB packet
* +---------------------------------------------------------------------------
* | 04- 15 | garbage
* +---------------------------------------------------------------------------
* | 16-1023 | samples
* +---------------------------------------------------------------------------
* signed 14-bit sample
*/
static int msi2500_convert_stream(struct msi2500_dev *dev, u8 *dst, u8 *src,
unsigned int src_len)
{
unsigned int i, j, transactions, dst_len = 0;
u32 sample[3];
/* There could be 1-3 1024 byte transactions per packet */
transactions = src_len / 1024;
for (i = 0; i < transactions; i++) {
sample[i] = src[3] << 24 | src[2] << 16 | src[1] << 8 |
src[0] << 0;
if (i == 0 && dev->next_sample != sample[0]) {
dev_dbg_ratelimited(dev->dev,
"%d samples lost, %d %08x:%08x\n",
sample[0] - dev->next_sample,
src_len, dev->next_sample,
sample[0]);
}
/*
* Dump all unknown 'garbage' data - maybe we will discover
* someday if there is something rational...
*/
dev_dbg_ratelimited(dev->dev, "%*ph\n", 12, &src[4]);
src += 16; /* skip header */
switch (dev->pixelformat) {
case V4L2_SDR_FMT_CU8: /* 504 x IQ samples */
{
s8 *s8src = (s8 *)src;
u8 *u8dst = (u8 *)dst;
for (j = 0; j < 1008; j++)
*u8dst++ = *s8src++ + 128;
src += 1008;
dst += 1008;
dst_len += 1008;
dev->next_sample = sample[i] + 504;
break;
}
case V4L2_SDR_FMT_CU16LE: /* 252 x IQ samples */
{
s16 *s16src = (s16 *)src;
u16 *u16dst = (u16 *)dst;
struct {signed int x:14; } se; /* sign extension */
unsigned int utmp;
for (j = 0; j < 1008; j += 2) {
/* sign extension from 14-bit to signed int */
se.x = *s16src++;
/* from signed int to unsigned int */
utmp = se.x + 8192;
/* from 14-bit to 16-bit */
*u16dst++ = utmp << 2 | utmp >> 12;
}
src += 1008;
dst += 1008;
dst_len += 1008;
dev->next_sample = sample[i] + 252;
break;
}
case MSI2500_PIX_FMT_SDR_MSI2500_384: /* 384 x IQ samples */
/* Dump unknown 'garbage' data */
dev_dbg_ratelimited(dev->dev, "%*ph\n", 24, &src[1000]);
memcpy(dst, src, 984);
src += 984 + 24;
dst += 984;
dst_len += 984;
dev->next_sample = sample[i] + 384;
break;
case V4L2_SDR_FMT_CS8: /* 504 x IQ samples */
memcpy(dst, src, 1008);
src += 1008;
dst += 1008;
dst_len += 1008;
dev->next_sample = sample[i] + 504;
break;
case MSI2500_PIX_FMT_SDR_S12: /* 336 x IQ samples */
memcpy(dst, src, 1008);
src += 1008;
dst += 1008;
dst_len += 1008;
dev->next_sample = sample[i] + 336;
break;
case V4L2_SDR_FMT_CS14LE: /* 252 x IQ samples */
memcpy(dst, src, 1008);
src += 1008;
dst += 1008;
dst_len += 1008;
dev->next_sample = sample[i] + 252;
break;
default:
break;
}
}
/* calculate sample rate and output it in 10 seconds intervals */
if (unlikely(time_is_before_jiffies(dev->jiffies_next))) {
#define MSECS 10000UL
unsigned int msecs = jiffies_to_msecs(jiffies -
dev->jiffies_next + msecs_to_jiffies(MSECS));
unsigned int samples = dev->next_sample - dev->sample;
dev->jiffies_next = jiffies + msecs_to_jiffies(MSECS);
dev->sample = dev->next_sample;
dev_dbg(dev->dev, "size=%u samples=%u msecs=%u sample rate=%lu\n",
src_len, samples, msecs,
samples * 1000UL / msecs);
}
return dst_len;
}
/*
* This gets called for the Isochronous pipe (stream). This is done in interrupt
* time, so it has to be fast, not crash, and not stall. Neat.
*/
static void msi2500_isoc_handler(struct urb *urb)
{
struct msi2500_dev *dev = (struct msi2500_dev *)urb->context;
int i, flen, fstatus;
unsigned char *iso_buf = NULL;
struct msi2500_frame_buf *fbuf;
if (unlikely(urb->status == -ENOENT ||
urb->status == -ECONNRESET ||
urb->status == -ESHUTDOWN)) {
dev_dbg(dev->dev, "URB (%p) unlinked %ssynchronously\n",
urb, urb->status == -ENOENT ? "" : "a");
return;
}
if (unlikely(urb->status != 0)) {
dev_dbg(dev->dev, "called with status %d\n", urb->status);
/* Give up after a number of contiguous errors */
if (++dev->isoc_errors > MAX_ISOC_ERRORS)
dev_dbg(dev->dev, "Too many ISOC errors, bailing out\n");
goto handler_end;
} else {
/* Reset ISOC error counter. We did get here, after all. */
dev->isoc_errors = 0;
}
/* Compact data */
for (i = 0; i < urb->number_of_packets; i++) {
void *ptr;
/* Check frame error */
fstatus = urb->iso_frame_desc[i].status;
if (unlikely(fstatus)) {
dev_dbg_ratelimited(dev->dev,
"frame=%d/%d has error %d skipping\n",
i, urb->number_of_packets, fstatus);
continue;
}
/* Check if that frame contains data */
flen = urb->iso_frame_desc[i].actual_length;
if (unlikely(flen == 0))
continue;
iso_buf = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
/* Get free framebuffer */
fbuf = msi2500_get_next_fill_buf(dev);
if (unlikely(fbuf == NULL)) {
dev->vb_full++;
dev_dbg_ratelimited(dev->dev,
"video buffer is full, %d packets dropped\n",
dev->vb_full);
continue;
}
/* fill framebuffer */
ptr = vb2_plane_vaddr(&fbuf->vb.vb2_buf, 0);
flen = msi2500_convert_stream(dev, ptr, iso_buf, flen);
vb2_set_plane_payload(&fbuf->vb.vb2_buf, 0, flen);
vb2_buffer_done(&fbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
}
handler_end:
i = usb_submit_urb(urb, GFP_ATOMIC);
if (unlikely(i != 0))
dev_dbg(dev->dev, "Error (%d) re-submitting urb\n", i);
}
static void msi2500_iso_stop(struct msi2500_dev *dev)
{
int i;
dev_dbg(dev->dev, "\n");
/* Unlinking ISOC buffers one by one */
for (i = 0; i < MAX_ISO_BUFS; i++) {
if (dev->urbs[i]) {
dev_dbg(dev->dev, "Unlinking URB %p\n", dev->urbs[i]);
usb_kill_urb(dev->urbs[i]);
}
}
}
static void msi2500_iso_free(struct msi2500_dev *dev)
{
int i;
dev_dbg(dev->dev, "\n");
/* Freeing ISOC buffers one by one */
for (i = 0; i < MAX_ISO_BUFS; i++) {
if (dev->urbs[i]) {
dev_dbg(dev->dev, "Freeing URB\n");
if (dev->urbs[i]->transfer_buffer) {
usb_free_coherent(dev->udev,
dev->urbs[i]->transfer_buffer_length,
dev->urbs[i]->transfer_buffer,
dev->urbs[i]->transfer_dma);
}
usb_free_urb(dev->urbs[i]);
dev->urbs[i] = NULL;
}
}
}
/* Both v4l2_lock and vb_queue_lock should be locked when calling this */
static void msi2500_isoc_cleanup(struct msi2500_dev *dev)
{
dev_dbg(dev->dev, "\n");
msi2500_iso_stop(dev);
msi2500_iso_free(dev);
}
/* Both v4l2_lock and vb_queue_lock should be locked when calling this */
static int msi2500_isoc_init(struct msi2500_dev *dev)
{
struct urb *urb;
int i, j, ret;
dev_dbg(dev->dev, "\n");
dev->isoc_errors = 0;
ret = usb_set_interface(dev->udev, 0, 1);
if (ret)
return ret;
/* Allocate and init Isochronuous urbs */
for (i = 0; i < MAX_ISO_BUFS; i++) {
urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL);
if (urb == NULL) {
msi2500_isoc_cleanup(dev);
return -ENOMEM;
}
dev->urbs[i] = urb;
dev_dbg(dev->dev, "Allocated URB at 0x%p\n", urb);
urb->interval = 1;
urb->dev = dev->udev;
urb->pipe = usb_rcvisocpipe(dev->udev, 0x81);
urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
urb->transfer_buffer = usb_alloc_coherent(dev->udev,
ISO_BUFFER_SIZE,
GFP_KERNEL, &urb->transfer_dma);
if (urb->transfer_buffer == NULL) {
dev_err(dev->dev,
"Failed to allocate urb buffer %d\n", i);
msi2500_isoc_cleanup(dev);
return -ENOMEM;
}
urb->transfer_buffer_length = ISO_BUFFER_SIZE;
urb->complete = msi2500_isoc_handler;
urb->context = dev;
urb->start_frame = 0;
urb->number_of_packets = ISO_FRAMES_PER_DESC;
for (j = 0; j < ISO_FRAMES_PER_DESC; j++) {
urb->iso_frame_desc[j].offset = j * ISO_MAX_FRAME_SIZE;
urb->iso_frame_desc[j].length = ISO_MAX_FRAME_SIZE;
}
}
/* link */
for (i = 0; i < MAX_ISO_BUFS; i++) {
ret = usb_submit_urb(dev->urbs[i], GFP_KERNEL);
if (ret) {
dev_err(dev->dev,
"usb_submit_urb %d failed with error %d\n",
i, ret);
msi2500_isoc_cleanup(dev);
return ret;
}
dev_dbg(dev->dev, "URB 0x%p submitted.\n", dev->urbs[i]);
}
/* All is done... */
return 0;
}
/* Must be called with vb_queue_lock hold */
static void msi2500_cleanup_queued_bufs(struct msi2500_dev *dev)
{
unsigned long flags;
dev_dbg(dev->dev, "\n");
spin_lock_irqsave(&dev->queued_bufs_lock, flags);
while (!list_empty(&dev->queued_bufs)) {
struct msi2500_frame_buf *buf;
buf = list_entry(dev->queued_bufs.next,
struct msi2500_frame_buf, list);
list_del(&buf->list);
vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
}
spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
}
/* The user yanked out the cable... */
static void msi2500_disconnect(struct usb_interface *intf)
{
struct v4l2_device *v = usb_get_intfdata(intf);
struct msi2500_dev *dev =
container_of(v, struct msi2500_dev, v4l2_dev);
dev_dbg(dev->dev, "\n");
mutex_lock(&dev->vb_queue_lock);
mutex_lock(&dev->v4l2_lock);
/* No need to keep the urbs around after disconnection */
dev->udev = NULL;
v4l2_device_disconnect(&dev->v4l2_dev);
video_unregister_device(&dev->vdev);
spi_unregister_master(dev->master);
mutex_unlock(&dev->v4l2_lock);
mutex_unlock(&dev->vb_queue_lock);
v4l2_device_put(&dev->v4l2_dev);
}
static int msi2500_querycap(struct file *file, void *fh,
struct v4l2_capability *cap)
{
struct msi2500_dev *dev = video_drvdata(file);
dev_dbg(dev->dev, "\n");
strscpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
strscpy(cap->card, dev->vdev.name, sizeof(cap->card));
usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info));
return 0;
}
/* Videobuf2 operations */
static int msi2500_queue_setup(struct vb2_queue *vq,
unsigned int *nbuffers,
unsigned int *nplanes, unsigned int sizes[],
struct device *alloc_devs[])
{
struct msi2500_dev *dev = vb2_get_drv_priv(vq);
dev_dbg(dev->dev, "nbuffers=%d\n", *nbuffers);
/* Absolute min and max number of buffers available for mmap() */
*nbuffers = clamp_t(unsigned int, *nbuffers, 8, 32);
*nplanes = 1;
sizes[0] = PAGE_ALIGN(dev->buffersize);
dev_dbg(dev->dev, "nbuffers=%d sizes[0]=%d\n", *nbuffers, sizes[0]);
return 0;
}
static void msi2500_buf_queue(struct vb2_buffer *vb)
{
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
struct msi2500_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
struct msi2500_frame_buf *buf = container_of(vbuf,
struct msi2500_frame_buf,
vb);
unsigned long flags;
/* Check the device has not disconnected between prep and queuing */
if (unlikely(!dev->udev)) {
vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
return;
}
spin_lock_irqsave(&dev->queued_bufs_lock, flags);
list_add_tail(&buf->list, &dev->queued_bufs);
spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
}
#define CMD_WREG 0x41
#define CMD_START_STREAMING 0x43
#define CMD_STOP_STREAMING 0x45
#define CMD_READ_UNKNOWN 0x48
#define msi2500_dbg_usb_control_msg(_dev, _r, _t, _v, _i, _b, _l) { \
char *_direction; \
if (_t & USB_DIR_IN) \
_direction = "<<<"; \
else \
_direction = ">>>"; \
dev_dbg(_dev, "%02x %02x %02x %02x %02x %02x %02x %02x %s %*ph\n", \
_t, _r, _v & 0xff, _v >> 8, _i & 0xff, _i >> 8, \
_l & 0xff, _l >> 8, _direction, _l, _b); \
}
static int msi2500_ctrl_msg(struct msi2500_dev *dev, u8 cmd, u32 data)
{
int ret;
u8 request = cmd;
u8 requesttype = USB_DIR_OUT | USB_TYPE_VENDOR;
u16 value = (data >> 0) & 0xffff;
u16 index = (data >> 16) & 0xffff;
msi2500_dbg_usb_control_msg(dev->dev, request, requesttype,
value, index, NULL, 0);
ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), request,
requesttype, value, index, NULL, 0, 2000);
if (ret)
dev_err(dev->dev, "failed %d, cmd %02x, data %04x\n",
ret, cmd, data);
return ret;
}
static int msi2500_set_usb_adc(struct msi2500_dev *dev)
{
int ret;
unsigned int f_vco, f_sr, div_n, k, k_cw, div_out;
u32 reg3, reg4, reg7;
struct v4l2_ctrl *bandwidth_auto;
struct v4l2_ctrl *bandwidth;
f_sr = dev->f_adc;
/* set tuner, subdev, filters according to sampling rate */
bandwidth_auto = v4l2_ctrl_find(&dev->hdl,
V4L2_CID_RF_TUNER_BANDWIDTH_AUTO);
if (v4l2_ctrl_g_ctrl(bandwidth_auto)) {
bandwidth = v4l2_ctrl_find(&dev->hdl,
V4L2_CID_RF_TUNER_BANDWIDTH);
v4l2_ctrl_s_ctrl(bandwidth, dev->f_adc);
}
/* select stream format */
switch (dev->pixelformat) {
case V4L2_SDR_FMT_CU8:
reg7 = 0x000c9407; /* 504 */
break;
case V4L2_SDR_FMT_CU16LE:
reg7 = 0x00009407; /* 252 */
break;
case V4L2_SDR_FMT_CS8:
reg7 = 0x000c9407; /* 504 */
break;
case MSI2500_PIX_FMT_SDR_MSI2500_384:
reg7 = 0x0000a507; /* 384 */
break;
case MSI2500_PIX_FMT_SDR_S12:
reg7 = 0x00008507; /* 336 */
break;
case V4L2_SDR_FMT_CS14LE:
reg7 = 0x00009407; /* 252 */
break;
default:
reg7 = 0x000c9407; /* 504 */
break;
}
/*
* Fractional-N synthesizer
*
* +----------------------------------------+
* v |
* Fref +----+ +-------+ +-----+ +------+ +---+
* ------> | PD | --> | VCO | --> | /2 | ------> | /N.F | <-- | K |
* +----+ +-------+ +-----+ +------+ +---+
* |
* |
* v
* +-------+ +-----+ Fout
* | /Rout | --> | /12 | ------>
* +-------+ +-----+
*/
/*
* Synthesizer config is just a educated guess...
*
* [7:0] 0x03, register address
* [8] 1, power control
* [9] ?, power control
* [12:10] output divider
* [13] 0 ?
* [14] 0 ?
* [15] fractional MSB, bit 20
* [16:19] N
* [23:20] ?
* [24:31] 0x01
*
* output divider
* val div
* 0 - (invalid)
* 1 4
* 2 6
* 3 8
* 4 10
* 5 12
* 6 14
* 7 16
*
* VCO 202000000 - 720000000++
*/
#define F_REF 24000000
#define DIV_PRE_N 2
#define DIV_LO_OUT 12
reg3 = 0x01000303;
reg4 = 0x00000004;
/* XXX: Filters? AGC? VCO band? */
if (f_sr < 6000000)
reg3 |= 0x1 << 20;
else if (f_sr < 7000000)
reg3 |= 0x5 << 20;
else if (f_sr < 8500000)
reg3 |= 0x9 << 20;
else
reg3 |= 0xd << 20;
for (div_out = 4; div_out < 16; div_out += 2) {
f_vco = f_sr * div_out * DIV_LO_OUT;
dev_dbg(dev->dev, "div_out=%u f_vco=%u\n", div_out, f_vco);
if (f_vco >= 202000000)
break;
}
/* Calculate PLL integer and fractional control word. */
div_n = div_u64_rem(f_vco, DIV_PRE_N * F_REF, &k);
k_cw = div_u64((u64) k * 0x200000, DIV_PRE_N * F_REF);
reg3 |= div_n << 16;
reg3 |= (div_out / 2 - 1) << 10;
reg3 |= ((k_cw >> 20) & 0x000001) << 15; /* [20] */
reg4 |= ((k_cw >> 0) & 0x0fffff) << 8; /* [19:0] */
dev_dbg(dev->dev,
"f_sr=%u f_vco=%u div_n=%u k=%u div_out=%u reg3=%08x reg4=%08x\n",
f_sr, f_vco, div_n, k, div_out, reg3, reg4);
ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00608008);
if (ret)
goto err;
ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00000c05);
if (ret)
goto err;
ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00020000);
if (ret)
goto err;
ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00480102);
if (ret)
goto err;
ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00f38008);
if (ret)
goto err;
ret = msi2500_ctrl_msg(dev, CMD_WREG, reg7);
if (ret)
goto err;
ret = msi2500_ctrl_msg(dev, CMD_WREG, reg4);
if (ret)
goto err;
ret = msi2500_ctrl_msg(dev, CMD_WREG, reg3);
err:
return ret;
}
static int msi2500_start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct msi2500_dev *dev = vb2_get_drv_priv(vq);
int ret;
dev_dbg(dev->dev, "\n");
if (!dev->udev)
return -ENODEV;
if (mutex_lock_interruptible(&dev->v4l2_lock))
return -ERESTARTSYS;
/* wake-up tuner */
v4l2_subdev_call(dev->v4l2_subdev, core, s_power, 1);
ret = msi2500_set_usb_adc(dev);
ret = msi2500_isoc_init(dev);
if (ret)
msi2500_cleanup_queued_bufs(dev);
ret = msi2500_ctrl_msg(dev, CMD_START_STREAMING, 0);
mutex_unlock(&dev->v4l2_lock);
return ret;
}
static void msi2500_stop_streaming(struct vb2_queue *vq)
{
struct msi2500_dev *dev = vb2_get_drv_priv(vq);
dev_dbg(dev->dev, "\n");
mutex_lock(&dev->v4l2_lock);
if (dev->udev)
msi2500_isoc_cleanup(dev);
msi2500_cleanup_queued_bufs(dev);
/* according to tests, at least 700us delay is required */
msleep(20);
if (dev->udev && !msi2500_ctrl_msg(dev, CMD_STOP_STREAMING, 0)) {
/* sleep USB IF / ADC */
msi2500_ctrl_msg(dev, CMD_WREG, 0x01000003);
}
/* sleep tuner */
v4l2_subdev_call(dev->v4l2_subdev, core, s_power, 0);
mutex_unlock(&dev->v4l2_lock);
}
static const struct vb2_ops msi2500_vb2_ops = {
.queue_setup = msi2500_queue_setup,
.buf_queue = msi2500_buf_queue,
.start_streaming = msi2500_start_streaming,
.stop_streaming = msi2500_stop_streaming,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
};
static int msi2500_enum_fmt_sdr_cap(struct file *file, void *priv,
struct v4l2_fmtdesc *f)
{
struct msi2500_dev *dev = video_drvdata(file);
dev_dbg(dev->dev, "index=%d\n", f->index);
if (f->index >= dev->num_formats)
return -EINVAL;
f->pixelformat = formats[f->index].pixelformat;
return 0;
}
static int msi2500_g_fmt_sdr_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct msi2500_dev *dev = video_drvdata(file);
dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
(char *)&dev->pixelformat);
f->fmt.sdr.pixelformat = dev->pixelformat;
f->fmt.sdr.buffersize = dev->buffersize;
return 0;
}
static int msi2500_s_fmt_sdr_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct msi2500_dev *dev = video_drvdata(file);
struct vb2_queue *q = &dev->vb_queue;
int i;
dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
(char *)&f->fmt.sdr.pixelformat);
if (vb2_is_busy(q))
return -EBUSY;
for (i = 0; i < dev->num_formats; i++) {
if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
dev->pixelformat = formats[i].pixelformat;
dev->buffersize = formats[i].buffersize;
f->fmt.sdr.buffersize = formats[i].buffersize;
return 0;
}
}
dev->pixelformat = formats[0].pixelformat;
dev->buffersize = formats[0].buffersize;
f->fmt.sdr.pixelformat = formats[0].pixelformat;
f->fmt.sdr.buffersize = formats[0].buffersize;
return 0;
}
static int msi2500_try_fmt_sdr_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct msi2500_dev *dev = video_drvdata(file);
int i;
dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
(char *)&f->fmt.sdr.pixelformat);
for (i = 0; i < dev->num_formats; i++) {
if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
f->fmt.sdr.buffersize = formats[i].buffersize;
return 0;
}
}
f->fmt.sdr.pixelformat = formats[0].pixelformat;
f->fmt.sdr.buffersize = formats[0].buffersize;
return 0;
}
static int msi2500_s_tuner(struct file *file, void *priv,
const struct v4l2_tuner *v)
{
struct msi2500_dev *dev = video_drvdata(file);
int ret;
dev_dbg(dev->dev, "index=%d\n", v->index);
if (v->index == 0)
ret = 0;
else if (v->index == 1)
ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, s_tuner, v);
else
ret = -EINVAL;
return ret;
}
static int msi2500_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v)
{
struct msi2500_dev *dev = video_drvdata(file);
int ret;
dev_dbg(dev->dev, "index=%d\n", v->index);
if (v->index == 0) {
strscpy(v->name, "Mirics MSi2500", sizeof(v->name));
v->type = V4L2_TUNER_ADC;
v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
v->rangelow = 1200000;
v->rangehigh = 15000000;
ret = 0;
} else if (v->index == 1) {
ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, g_tuner, v);
} else {
ret = -EINVAL;
}
return ret;
}
static int msi2500_g_frequency(struct file *file, void *priv,
struct v4l2_frequency *f)
{
struct msi2500_dev *dev = video_drvdata(file);
int ret = 0;
dev_dbg(dev->dev, "tuner=%d type=%d\n", f->tuner, f->type);
if (f->tuner == 0) {
f->frequency = dev->f_adc;
ret = 0;
} else if (f->tuner == 1) {
f->type = V4L2_TUNER_RF;
ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, g_frequency, f);
} else {
ret = -EINVAL;
}
return ret;
}
static int msi2500_s_frequency(struct file *file, void *priv,
const struct v4l2_frequency *f)
{
struct msi2500_dev *dev = video_drvdata(file);
int ret;
dev_dbg(dev->dev, "tuner=%d type=%d frequency=%u\n",
f->tuner, f->type, f->frequency);
if (f->tuner == 0) {
dev->f_adc = clamp_t(unsigned int, f->frequency,
bands[0].rangelow,
bands[0].rangehigh);
dev_dbg(dev->dev, "ADC frequency=%u Hz\n", dev->f_adc);
ret = msi2500_set_usb_adc(dev);
} else if (f->tuner == 1) {
ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, s_frequency, f);
} else {
ret = -EINVAL;
}
return ret;
}
static int msi2500_enum_freq_bands(struct file *file, void *priv,
struct v4l2_frequency_band *band)
{
struct msi2500_dev *dev = video_drvdata(file);
int ret;
dev_dbg(dev->dev, "tuner=%d type=%d index=%d\n",
band->tuner, band->type, band->index);
if (band->tuner == 0) {
if (band->index >= ARRAY_SIZE(bands)) {
ret = -EINVAL;
} else {
*band = bands[band->index];
ret = 0;
}
} else if (band->tuner == 1) {
ret = v4l2_subdev_call(dev->v4l2_subdev, tuner,
enum_freq_bands, band);
} else {
ret = -EINVAL;
}
return ret;
}
static const struct v4l2_ioctl_ops msi2500_ioctl_ops = {
.vidioc_querycap = msi2500_querycap,
.vidioc_enum_fmt_sdr_cap = msi2500_enum_fmt_sdr_cap,
.vidioc_g_fmt_sdr_cap = msi2500_g_fmt_sdr_cap,
.vidioc_s_fmt_sdr_cap = msi2500_s_fmt_sdr_cap,
.vidioc_try_fmt_sdr_cap = msi2500_try_fmt_sdr_cap,
.vidioc_reqbufs = vb2_ioctl_reqbufs,
.vidioc_create_bufs = vb2_ioctl_create_bufs,
.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
.vidioc_querybuf = vb2_ioctl_querybuf,
.vidioc_qbuf = vb2_ioctl_qbuf,
.vidioc_dqbuf = vb2_ioctl_dqbuf,
.vidioc_streamon = vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff,
.vidioc_g_tuner = msi2500_g_tuner,
.vidioc_s_tuner = msi2500_s_tuner,
.vidioc_g_frequency = msi2500_g_frequency,
.vidioc_s_frequency = msi2500_s_frequency,
.vidioc_enum_freq_bands = msi2500_enum_freq_bands,
.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
.vidioc_log_status = v4l2_ctrl_log_status,
};
static const struct v4l2_file_operations msi2500_fops = {
.owner = THIS_MODULE,
.open = v4l2_fh_open,
.release = vb2_fop_release,
.read = vb2_fop_read,
.poll = vb2_fop_poll,
.mmap = vb2_fop_mmap,
.unlocked_ioctl = video_ioctl2,
};
static const struct video_device msi2500_template = {
.name = "Mirics MSi3101 SDR Dongle",
.release = video_device_release_empty,
.fops = &msi2500_fops,
.ioctl_ops = &msi2500_ioctl_ops,
};
static void msi2500_video_release(struct v4l2_device *v)
{
struct msi2500_dev *dev = container_of(v, struct msi2500_dev, v4l2_dev);
v4l2_ctrl_handler_free(&dev->hdl);
v4l2_device_unregister(&dev->v4l2_dev);
kfree(dev);
}
static int msi2500_transfer_one_message(struct spi_master *master,
struct spi_message *m)
{
struct msi2500_dev *dev = spi_master_get_devdata(master);
struct spi_transfer *t;
int ret = 0;
u32 data;
list_for_each_entry(t, &m->transfers, transfer_list) {
dev_dbg(dev->dev, "msg=%*ph\n", t->len, t->tx_buf);
data = 0x09; /* reg 9 is SPI adapter */
data |= ((u8 *)t->tx_buf)[0] << 8;
data |= ((u8 *)t->tx_buf)[1] << 16;
data |= ((u8 *)t->tx_buf)[2] << 24;
ret = msi2500_ctrl_msg(dev, CMD_WREG, data);
}
m->status = ret;
spi_finalize_current_message(master);
return ret;
}
static int msi2500_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct msi2500_dev *dev;
struct v4l2_subdev *sd;
struct spi_master *master;
int ret;
static struct spi_board_info board_info = {
.modalias = "msi001",
.bus_num = 0,
.chip_select = 0,
.max_speed_hz = 12000000,
};
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
ret = -ENOMEM;
goto err;
}
mutex_init(&dev->v4l2_lock);
mutex_init(&dev->vb_queue_lock);
spin_lock_init(&dev->queued_bufs_lock);
INIT_LIST_HEAD(&dev->queued_bufs);
dev->dev = &intf->dev;
dev->udev = interface_to_usbdev(intf);
dev->f_adc = bands[0].rangelow;
dev->pixelformat = formats[0].pixelformat;
dev->buffersize = formats[0].buffersize;
dev->num_formats = NUM_FORMATS;
if (!msi2500_emulated_fmt)
dev->num_formats -= 2;
/* Init videobuf2 queue structure */
dev->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE;
dev->vb_queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ;
dev->vb_queue.drv_priv = dev;
dev->vb_queue.buf_struct_size = sizeof(struct msi2500_frame_buf);
dev->vb_queue.ops = &msi2500_vb2_ops;
dev->vb_queue.mem_ops = &vb2_vmalloc_memops;
dev->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
ret = vb2_queue_init(&dev->vb_queue);
if (ret) {
dev_err(dev->dev, "Could not initialize vb2 queue\n");
goto err_free_mem;
}
/* Init video_device structure */
dev->vdev = msi2500_template;
dev->vdev.queue = &dev->vb_queue;
dev->vdev.queue->lock = &dev->vb_queue_lock;
video_set_drvdata(&dev->vdev, dev);
/* Register the v4l2_device structure */
dev->v4l2_dev.release = msi2500_video_release;
ret = v4l2_device_register(&intf->dev, &dev->v4l2_dev);
if (ret) {
dev_err(dev->dev, "Failed to register v4l2-device (%d)\n", ret);
goto err_free_mem;
}
/* SPI master adapter */
master = spi_alloc_master(dev->dev, 0);
if (master == NULL) {
ret = -ENOMEM;
goto err_unregister_v4l2_dev;
}
dev->master = master;
master->bus_num = -1;
master->num_chipselect = 1;
master->transfer_one_message = msi2500_transfer_one_message;
spi_master_set_devdata(master, dev);
ret = spi_register_master(master);
if (ret) {
spi_master_put(master);
goto err_unregister_v4l2_dev;
}
/* load v4l2 subdevice */
sd = v4l2_spi_new_subdev(&dev->v4l2_dev, master, &board_info);
dev->v4l2_subdev = sd;
if (sd == NULL) {
dev_err(dev->dev, "cannot get v4l2 subdevice\n");
ret = -ENODEV;
goto err_unregister_master;
}
/* Register controls */
v4l2_ctrl_handler_init(&dev->hdl, 0);
if (dev->hdl.error) {
ret = dev->hdl.error;
dev_err(dev->dev, "Could not initialize controls\n");
goto err_free_controls;
}
/* currently all controls are from subdev */
v4l2_ctrl_add_handler(&dev->hdl, sd->ctrl_handler, NULL, true);
dev->v4l2_dev.ctrl_handler = &dev->hdl;
dev->vdev.v4l2_dev = &dev->v4l2_dev;
dev->vdev.lock = &dev->v4l2_lock;
dev->vdev.device_caps = V4L2_CAP_SDR_CAPTURE | V4L2_CAP_STREAMING |
V4L2_CAP_READWRITE | V4L2_CAP_TUNER;
ret = video_register_device(&dev->vdev, VFL_TYPE_SDR, -1);
if (ret) {
dev_err(dev->dev,
"Failed to register as video device (%d)\n", ret);
goto err_unregister_v4l2_dev;
}
dev_info(dev->dev, "Registered as %s\n",
video_device_node_name(&dev->vdev));
dev_notice(dev->dev,
"SDR API is still slightly experimental and functionality changes may follow\n");
return 0;
err_free_controls:
v4l2_ctrl_handler_free(&dev->hdl);
err_unregister_master:
spi_unregister_master(dev->master);
err_unregister_v4l2_dev:
v4l2_device_unregister(&dev->v4l2_dev);
err_free_mem:
kfree(dev);
err:
return ret;
}
/* USB device ID list */
static const struct usb_device_id msi2500_id_table[] = {
{USB_DEVICE(0x1df7, 0x2500)}, /* Mirics MSi3101 SDR Dongle */
{USB_DEVICE(0x2040, 0xd300)}, /* Hauppauge WinTV 133559 LF */
{}
};
MODULE_DEVICE_TABLE(usb, msi2500_id_table);
/* USB subsystem interface */
static struct usb_driver msi2500_driver = {
.name = KBUILD_MODNAME,
.probe = msi2500_probe,
.disconnect = msi2500_disconnect,
.id_table = msi2500_id_table,
};
module_usb_driver(msi2500_driver);
MODULE_AUTHOR("Antti Palosaari <[email protected]>");
MODULE_DESCRIPTION("Mirics MSi3101 SDR Dongle");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/msi2500/msi2500.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB library compliant Linux driver for the WideView/ Yakumo/ Hama/
* Typhoon/ Yuan/ Miglia DVB-T USB2.0 receiver.
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* Thanks to Steve Chang from WideView for providing support for the WT-220U.
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dtt200u.h"
/* debug */
int dvb_usb_dtt200u_debug;
module_param_named(debug,dvb_usb_dtt200u_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2 (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
struct dtt200u_state {
unsigned char data[80];
};
static int dtt200u_power_ctrl(struct dvb_usb_device *d, int onoff)
{
struct dtt200u_state *st = d->priv;
int ret = 0;
mutex_lock(&d->data_mutex);
st->data[0] = SET_INIT;
if (onoff)
ret = dvb_usb_generic_write(d, st->data, 2);
mutex_unlock(&d->data_mutex);
return ret;
}
static int dtt200u_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
struct dvb_usb_device *d = adap->dev;
struct dtt200u_state *st = d->priv;
int ret;
mutex_lock(&d->data_mutex);
st->data[0] = SET_STREAMING;
st->data[1] = onoff;
ret = dvb_usb_generic_write(adap->dev, st->data, 2);
if (ret < 0)
goto ret;
if (onoff)
goto ret;
st->data[0] = RESET_PID_FILTER;
ret = dvb_usb_generic_write(adap->dev, st->data, 1);
ret:
mutex_unlock(&d->data_mutex);
return ret;
}
static int dtt200u_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid, int onoff)
{
struct dvb_usb_device *d = adap->dev;
struct dtt200u_state *st = d->priv;
int ret;
pid = onoff ? pid : 0;
mutex_lock(&d->data_mutex);
st->data[0] = SET_PID_FILTER;
st->data[1] = index;
st->data[2] = pid & 0xff;
st->data[3] = (pid >> 8) & 0x1f;
ret = dvb_usb_generic_write(adap->dev, st->data, 4);
mutex_unlock(&d->data_mutex);
return ret;
}
static int dtt200u_rc_query(struct dvb_usb_device *d)
{
struct dtt200u_state *st = d->priv;
u32 scancode;
int ret;
mutex_lock(&d->data_mutex);
st->data[0] = GET_RC_CODE;
ret = dvb_usb_generic_rw(d, st->data, 1, st->data, 5, 0);
if (ret < 0)
goto ret;
if (st->data[0] == 1) {
enum rc_proto proto = RC_PROTO_NEC;
scancode = st->data[1];
if ((u8) ~st->data[1] != st->data[2]) {
/* Extended NEC */
scancode = scancode << 8;
scancode |= st->data[2];
proto = RC_PROTO_NECX;
}
scancode = scancode << 8;
scancode |= st->data[3];
/* Check command checksum is ok */
if ((u8) ~st->data[3] == st->data[4])
rc_keydown(d->rc_dev, proto, scancode, 0);
else
rc_keyup(d->rc_dev);
} else if (st->data[0] == 2) {
rc_repeat(d->rc_dev);
} else {
rc_keyup(d->rc_dev);
}
if (st->data[0] != 0)
deb_info("st->data: %*ph\n", 5, st->data);
ret:
mutex_unlock(&d->data_mutex);
return ret;
}
static int dtt200u_frontend_attach(struct dvb_usb_adapter *adap)
{
adap->fe_adap[0].fe = dtt200u_fe_attach(adap->dev);
return 0;
}
static struct dvb_usb_device_properties dtt200u_properties;
static struct dvb_usb_device_properties wt220u_fc_properties;
static struct dvb_usb_device_properties wt220u_properties;
static struct dvb_usb_device_properties wt220u_zl0353_properties;
static struct dvb_usb_device_properties wt220u_miglia_properties;
static int dtt200u_usb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
if (0 == dvb_usb_device_init(intf, &dtt200u_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &wt220u_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &wt220u_fc_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &wt220u_zl0353_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &wt220u_miglia_properties,
THIS_MODULE, NULL, adapter_nr))
return 0;
return -ENODEV;
}
enum {
WIDEVIEW_DTT200U_COLD,
WIDEVIEW_DTT200U_WARM,
WIDEVIEW_WT220U_COLD,
WIDEVIEW_WT220U_WARM,
WIDEVIEW_WT220U_ZL0353_COLD,
WIDEVIEW_WT220U_ZL0353_WARM,
WIDEVIEW_WT220U_FC_COLD,
WIDEVIEW_WT220U_FC_WARM,
WIDEVIEW_WT220U_ZAP250_COLD,
MIGLIA_WT220U_ZAP250_COLD,
};
static struct usb_device_id dtt200u_usb_table[] = {
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_DTT200U_COLD),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_DTT200U_WARM),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_WT220U_COLD),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_WT220U_WARM),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_WT220U_ZL0353_COLD),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_WT220U_ZL0353_WARM),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_WT220U_FC_COLD),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_WT220U_FC_WARM),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_WT220U_ZAP250_COLD),
DVB_USB_DEV(MIGLIA, MIGLIA_WT220U_ZAP250_COLD),
{ }
};
MODULE_DEVICE_TABLE(usb, dtt200u_usb_table);
static struct dvb_usb_device_properties dtt200u_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-dtt200u-01.fw",
.size_of_priv = sizeof(struct dtt200u_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
.pid_filter_count = 15,
.streaming_ctrl = dtt200u_streaming_ctrl,
.pid_filter = dtt200u_pid_filter,
.frontend_attach = dtt200u_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
.power_ctrl = dtt200u_power_ctrl,
.rc.core = {
.rc_interval = 300,
.rc_codes = RC_MAP_DTT200U,
.rc_query = dtt200u_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ .name = "WideView/Yuan/Yakumo/Hama/Typhoon DVB-T USB2.0 (WT-200U)",
.cold_ids = { &dtt200u_usb_table[WIDEVIEW_DTT200U_COLD], NULL },
.warm_ids = { &dtt200u_usb_table[WIDEVIEW_DTT200U_WARM], NULL },
},
{ NULL },
}
};
static struct dvb_usb_device_properties wt220u_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-wt220u-02.fw",
.size_of_priv = sizeof(struct dtt200u_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
.pid_filter_count = 15,
.streaming_ctrl = dtt200u_streaming_ctrl,
.pid_filter = dtt200u_pid_filter,
.frontend_attach = dtt200u_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
.power_ctrl = dtt200u_power_ctrl,
.rc.core = {
.rc_interval = 300,
.rc_codes = RC_MAP_DTT200U,
.rc_query = dtt200u_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ .name = "WideView WT-220U PenType Receiver (Typhoon/Freecom)",
.cold_ids = { &dtt200u_usb_table[WIDEVIEW_WT220U_COLD], &dtt200u_usb_table[WIDEVIEW_WT220U_ZAP250_COLD], NULL },
.warm_ids = { &dtt200u_usb_table[WIDEVIEW_WT220U_WARM], NULL },
},
{ NULL },
}
};
static struct dvb_usb_device_properties wt220u_fc_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-wt220u-fc03.fw",
.size_of_priv = sizeof(struct dtt200u_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
.pid_filter_count = 15,
.streaming_ctrl = dtt200u_streaming_ctrl,
.pid_filter = dtt200u_pid_filter,
.frontend_attach = dtt200u_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x06,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
.power_ctrl = dtt200u_power_ctrl,
.rc.core = {
.rc_interval = 300,
.rc_codes = RC_MAP_DTT200U,
.rc_query = dtt200u_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ .name = "WideView WT-220U PenType Receiver (Typhoon/Freecom)",
.cold_ids = { &dtt200u_usb_table[WIDEVIEW_WT220U_FC_COLD], NULL },
.warm_ids = { &dtt200u_usb_table[WIDEVIEW_WT220U_FC_WARM], NULL },
},
{ NULL },
}
};
static struct dvb_usb_device_properties wt220u_zl0353_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-wt220u-zl0353-01.fw",
.size_of_priv = sizeof(struct dtt200u_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
.pid_filter_count = 15,
.streaming_ctrl = dtt200u_streaming_ctrl,
.pid_filter = dtt200u_pid_filter,
.frontend_attach = dtt200u_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
.power_ctrl = dtt200u_power_ctrl,
.rc.core = {
.rc_interval = 300,
.rc_codes = RC_MAP_DTT200U,
.rc_query = dtt200u_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ .name = "WideView WT-220U PenType Receiver (based on ZL353)",
.cold_ids = { &dtt200u_usb_table[WIDEVIEW_WT220U_ZL0353_COLD], NULL },
.warm_ids = { &dtt200u_usb_table[WIDEVIEW_WT220U_ZL0353_WARM], NULL },
},
{ NULL },
}
};
static struct dvb_usb_device_properties wt220u_miglia_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-wt220u-miglia-01.fw",
.size_of_priv = sizeof(struct dtt200u_state),
.num_adapters = 1,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ .name = "WideView WT-220U PenType Receiver (Miglia)",
.cold_ids = { &dtt200u_usb_table[MIGLIA_WT220U_ZAP250_COLD], NULL },
/* This device turns into WT220U_ZL0353_WARM when fw
has been uploaded */
.warm_ids = { NULL },
},
{ NULL },
}
};
/* usb specific object needed to register this driver with the usb subsystem */
static struct usb_driver dtt200u_usb_driver = {
.name = "dvb_usb_dtt200u",
.probe = dtt200u_usb_probe,
.disconnect = dvb_usb_device_exit,
.id_table = dtt200u_usb_table,
};
module_usb_driver(dtt200u_usb_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for the WideView/Yakumo/Hama/Typhoon/Club3D/Miglia DVB-T USB2.0 devices");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/dtt200u.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB framework compliant Linux driver for the AVerMedia AverTV DVB-T
* USB2.0 (A800) DVB-T receiver.
*
* Copyright (C) 2005 Patrick Boettcher ([email protected])
*
* Thanks to
* - AVerMedia who kindly provided information and
* - Glen Harris who suffered from my mistakes during development.
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dibusb.h"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (rc=1 (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#define deb_rc(args...) dprintk(debug,0x01,args)
static int a800_power_ctrl(struct dvb_usb_device *d, int onoff)
{
/* do nothing for the AVerMedia */
return 0;
}
/* assure to put cold to 0 for iManufacturer == 1 */
static int a800_identify_state(struct usb_device *udev,
const struct dvb_usb_device_properties *props,
const struct dvb_usb_device_description **desc,
int *cold)
{
*cold = udev->descriptor.iManufacturer != 1;
return 0;
}
static int a800_rc_query(struct dvb_usb_device *d)
{
int ret = 0;
u8 *key = kmalloc(5, GFP_KERNEL);
if (!key)
return -ENOMEM;
if (usb_control_msg(d->udev,usb_rcvctrlpipe(d->udev,0),
0x04, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, key, 5,
2000) != 5) {
ret = -ENODEV;
goto out;
}
/* Note that extended nec and nec32 are dropped */
if (key[0] == 1)
rc_keydown(d->rc_dev, RC_PROTO_NEC,
RC_SCANCODE_NEC(key[1], key[3]), 0);
else if (key[0] == 2)
rc_repeat(d->rc_dev);
out:
kfree(key);
return ret;
}
/* USB Driver stuff */
static struct dvb_usb_device_properties a800_properties;
static int a800_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
return dvb_usb_device_init(intf, &a800_properties,
THIS_MODULE, NULL, adapter_nr);
}
/* do not change the order of the ID table */
enum {
AVERMEDIA_DVBT_USB2_COLD,
AVERMEDIA_DVBT_USB2_WARM,
};
static struct usb_device_id a800_table[] = {
DVB_USB_DEV(AVERMEDIA, AVERMEDIA_DVBT_USB2_COLD),
DVB_USB_DEV(AVERMEDIA, AVERMEDIA_DVBT_USB2_WARM),
{ }
};
MODULE_DEVICE_TABLE (usb, a800_table);
static struct dvb_usb_device_properties a800_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-avertv-a800-02.fw",
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.streaming_ctrl = dibusb2_0_streaming_ctrl,
.pid_filter = dibusb_pid_filter,
.pid_filter_ctrl = dibusb_pid_filter_ctrl,
.frontend_attach = dibusb_dib3000mc_frontend_attach,
.tuner_attach = dibusb_dib3000mc_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x06,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
.size_of_priv = sizeof(struct dibusb_state),
},
},
.power_ctrl = a800_power_ctrl,
.identify_state = a800_identify_state,
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_AVERMEDIA_M135A,
.module_name = KBUILD_MODNAME,
.rc_query = a800_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.i2c_algo = &dibusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "AVerMedia AverTV DVB-T USB 2.0 (A800)",
{ &a800_table[AVERMEDIA_DVBT_USB2_COLD], NULL },
{ &a800_table[AVERMEDIA_DVBT_USB2_WARM], NULL },
},
}
};
static struct usb_driver a800_driver = {
.name = "dvb_usb_a800",
.probe = a800_probe,
.disconnect = dvb_usb_device_exit,
.id_table = a800_table,
};
module_usb_driver(a800_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("AVerMedia AverTV DVB-T USB 2.0 (A800)");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/a800.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant Linux driver for the
* - TwinhanDTV Alpha/MagicBoxII USB2.0 DVB-T receiver
* - DigitalNow TinyUSB2 DVB-t receiver
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* Thanks to Twinhan who kindly provided hardware and information.
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "vp7045.h"
/* debug */
static int dvb_usb_vp7045_debug;
module_param_named(debug,dvb_usb_vp7045_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,rc=4 (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#define deb_info(args...) dprintk(dvb_usb_vp7045_debug,0x01,args)
#define deb_xfer(args...) dprintk(dvb_usb_vp7045_debug,0x02,args)
#define deb_rc(args...) dprintk(dvb_usb_vp7045_debug,0x04,args)
int vp7045_usb_op(struct dvb_usb_device *d, u8 cmd, u8 *out, int outlen, u8 *in, int inlen, int msec)
{
int ret = 0;
u8 *buf = d->priv;
buf[0] = cmd;
if (outlen > 19)
outlen = 19;
if (inlen > 11)
inlen = 11;
ret = mutex_lock_interruptible(&d->usb_mutex);
if (ret)
return ret;
if (out != NULL && outlen > 0)
memcpy(&buf[1], out, outlen);
deb_xfer("out buffer: ");
debug_dump(buf, outlen+1, deb_xfer);
if (usb_control_msg(d->udev,
usb_sndctrlpipe(d->udev,0),
TH_COMMAND_OUT, USB_TYPE_VENDOR | USB_DIR_OUT, 0, 0,
buf, 20, 2000) != 20) {
err("USB control message 'out' went wrong.");
ret = -EIO;
goto unlock;
}
msleep(msec);
if (usb_control_msg(d->udev,
usb_rcvctrlpipe(d->udev,0),
TH_COMMAND_IN, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
buf, 12, 2000) != 12) {
err("USB control message 'in' went wrong.");
ret = -EIO;
goto unlock;
}
deb_xfer("in buffer: ");
debug_dump(buf, 12, deb_xfer);
if (in != NULL && inlen > 0)
memcpy(in, &buf[1], inlen);
unlock:
mutex_unlock(&d->usb_mutex);
return ret;
}
u8 vp7045_read_reg(struct dvb_usb_device *d, u8 reg)
{
u8 obuf[2] = { 0 },v;
obuf[1] = reg;
vp7045_usb_op(d,TUNER_REG_READ,obuf,2,&v,1,30);
return v;
}
static int vp7045_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 v = onoff;
return vp7045_usb_op(d,SET_TUNER_POWER,&v,1,NULL,0,150);
}
static int vp7045_rc_query(struct dvb_usb_device *d)
{
int ret;
u8 key;
ret = vp7045_usb_op(d, RC_VAL_READ, NULL, 0, &key, 1, 20);
if (ret)
return ret;
deb_rc("remote query key: %x\n", key);
if (key != 0x44) {
/*
* The 8 bit address isn't available, but since the remote uses
* address 0 we'll use that. nec repeats are ignored too, even
* though the remote sends them.
*/
rc_keydown(d->rc_dev, RC_PROTO_NEC, RC_SCANCODE_NEC(0, key), 0);
}
return 0;
}
static int vp7045_read_eeprom(struct dvb_usb_device *d,u8 *buf, int len, int offset)
{
int i, ret;
u8 v, br[2];
for (i=0; i < len; i++) {
v = offset + i;
ret = vp7045_usb_op(d, GET_EE_VALUE, &v, 1, br, 2, 5);
if (ret)
return ret;
buf[i] = br[1];
}
deb_info("VP7045 EEPROM read (offs: %d, len: %d) : ", offset, i);
debug_dump(buf, i, deb_info);
return 0;
}
static int vp7045_read_mac_addr(struct dvb_usb_device *d,u8 mac[6])
{
return vp7045_read_eeprom(d,mac, 6, MAC_0_ADDR);
}
static int vp7045_frontend_attach(struct dvb_usb_adapter *adap)
{
u8 buf[255] = { 0 };
vp7045_usb_op(adap->dev,VENDOR_STRING_READ,NULL,0,buf,20,0);
buf[10] = '\0';
deb_info("firmware says: %s ",buf);
vp7045_usb_op(adap->dev,PRODUCT_STRING_READ,NULL,0,buf,20,0);
buf[10] = '\0';
deb_info("%s ",buf);
vp7045_usb_op(adap->dev,FW_VERSION_READ,NULL,0,buf,20,0);
buf[10] = '\0';
deb_info("v%s\n",buf);
/* Dump the EEPROM */
/* vp7045_read_eeprom(d,buf, 255, FX2_ID_ADDR); */
adap->fe_adap[0].fe = vp7045_fe_attach(adap->dev);
return 0;
}
static struct dvb_usb_device_properties vp7045_properties;
static int vp7045_usb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
return dvb_usb_device_init(intf, &vp7045_properties,
THIS_MODULE, NULL, adapter_nr);
}
enum {
VISIONPLUS_VP7045_COLD,
VISIONPLUS_VP7045_WARM,
VISIONPLUS_TINYUSB2_COLD,
VISIONPLUS_TINYUSB2_WARM,
};
static struct usb_device_id vp7045_usb_table[] = {
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_VP7045_COLD),
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_VP7045_WARM),
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_TINYUSB2_COLD),
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_TINYUSB2_WARM),
{ }
};
MODULE_DEVICE_TABLE(usb, vp7045_usb_table);
static struct dvb_usb_device_properties vp7045_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-vp7045-01.fw",
.size_of_priv = 20,
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.frontend_attach = vp7045_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
.power_ctrl = vp7045_power_ctrl,
.read_mac_address = vp7045_read_mac_addr,
.rc.core = {
.rc_interval = 400,
.rc_codes = RC_MAP_TWINHAN_VP1027_DVBS,
.module_name = KBUILD_MODNAME,
.rc_query = vp7045_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
.scancode_mask = 0xff,
},
.num_device_descs = 2,
.devices = {
{ .name = "Twinhan USB2.0 DVB-T receiver (TwinhanDTV Alpha/MagicBox II)",
.cold_ids = { &vp7045_usb_table[VISIONPLUS_VP7045_COLD], NULL },
.warm_ids = { &vp7045_usb_table[VISIONPLUS_VP7045_WARM], NULL },
},
{ .name = "DigitalNow TinyUSB 2 DVB-t Receiver",
.cold_ids = { &vp7045_usb_table[VISIONPLUS_TINYUSB2_COLD], NULL },
.warm_ids = { &vp7045_usb_table[VISIONPLUS_TINYUSB2_WARM], NULL },
},
{ NULL },
}
};
/* usb specific object needed to register this driver with the usb subsystem */
static struct usb_driver vp7045_usb_driver = {
.name = "dvb_usb_vp7045",
.probe = vp7045_usb_probe,
.disconnect = dvb_usb_device_exit,
.id_table = vp7045_usb_table,
};
module_usb_driver(vp7045_usb_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for Twinhan MagicBox/Alpha and DNTV tinyUSB2 DVB-T USB2.0");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/vp7045.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* DVB USB Linux driver for AME DTV-5100 USB2.0 DVB-T
*
* Copyright (C) 2008 Antoine Jacquet <[email protected]>
* http://royale.zerezo.com/dtv5100/
*
* Inspired by gl861.c and au6610.c drivers
*/
#include "dtv5100.h"
#include "zl10353.h"
#include "qt1010.h"
/* debug */
static int dvb_usb_dtv5100_debug;
module_param_named(debug, dvb_usb_dtv5100_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level" DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
struct dtv5100_state {
unsigned char data[80];
};
static int dtv5100_i2c_msg(struct dvb_usb_device *d, u8 addr,
u8 *wbuf, u16 wlen, u8 *rbuf, u16 rlen)
{
struct dtv5100_state *st = d->priv;
unsigned int pipe;
u8 request;
u8 type;
u16 value;
u16 index;
switch (wlen) {
case 1:
/* write { reg }, read { value } */
pipe = usb_rcvctrlpipe(d->udev, 0);
request = (addr == DTV5100_DEMOD_ADDR ? DTV5100_DEMOD_READ :
DTV5100_TUNER_READ);
type = USB_TYPE_VENDOR | USB_DIR_IN;
value = 0;
break;
case 2:
/* write { reg, value } */
pipe = usb_sndctrlpipe(d->udev, 0);
request = (addr == DTV5100_DEMOD_ADDR ? DTV5100_DEMOD_WRITE :
DTV5100_TUNER_WRITE);
type = USB_TYPE_VENDOR | USB_DIR_OUT;
value = wbuf[1];
break;
default:
warn("wlen = %x, aborting.", wlen);
return -EINVAL;
}
index = (addr << 8) + wbuf[0];
memcpy(st->data, rbuf, rlen);
msleep(1); /* avoid I2C errors */
return usb_control_msg(d->udev, pipe, request,
type, value, index, st->data, rlen,
DTV5100_USB_TIMEOUT);
}
/* I2C */
static int dtv5100_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
int i;
if (num > 2)
return -EINVAL;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EAGAIN;
for (i = 0; i < num; i++) {
/* write/read request */
if (i+1 < num && (msg[i+1].flags & I2C_M_RD)) {
if (dtv5100_i2c_msg(d, msg[i].addr, msg[i].buf,
msg[i].len, msg[i+1].buf,
msg[i+1].len) < 0)
break;
i++;
} else if (dtv5100_i2c_msg(d, msg[i].addr, msg[i].buf,
msg[i].len, NULL, 0) < 0)
break;
}
mutex_unlock(&d->i2c_mutex);
return i;
}
static u32 dtv5100_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
static struct i2c_algorithm dtv5100_i2c_algo = {
.master_xfer = dtv5100_i2c_xfer,
.functionality = dtv5100_i2c_func,
};
/* Callbacks for DVB USB */
static struct zl10353_config dtv5100_zl10353_config = {
.demod_address = DTV5100_DEMOD_ADDR,
.no_tuner = 1,
.parallel_ts = 1,
};
static int dtv5100_frontend_attach(struct dvb_usb_adapter *adap)
{
adap->fe_adap[0].fe = dvb_attach(zl10353_attach, &dtv5100_zl10353_config,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe == NULL)
return -EIO;
/* disable i2c gate, or it won't work... is this safe? */
adap->fe_adap[0].fe->ops.i2c_gate_ctrl = NULL;
return 0;
}
static struct qt1010_config dtv5100_qt1010_config = {
.i2c_address = DTV5100_TUNER_ADDR
};
static int dtv5100_tuner_attach(struct dvb_usb_adapter *adap)
{
return dvb_attach(qt1010_attach,
adap->fe_adap[0].fe, &adap->dev->i2c_adap,
&dtv5100_qt1010_config) == NULL ? -ENODEV : 0;
}
/* DVB USB Driver stuff */
static struct dvb_usb_device_properties dtv5100_properties;
static int dtv5100_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
int i, ret;
struct usb_device *udev = interface_to_usbdev(intf);
/* initialize non qt1010/zl10353 part? */
for (i = 0; dtv5100_init[i].request; i++) {
ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
dtv5100_init[i].request,
USB_TYPE_VENDOR | USB_DIR_OUT,
dtv5100_init[i].value,
dtv5100_init[i].index, NULL, 0,
DTV5100_USB_TIMEOUT);
if (ret)
return ret;
}
ret = dvb_usb_device_init(intf, &dtv5100_properties,
THIS_MODULE, NULL, adapter_nr);
if (ret)
return ret;
return 0;
}
enum {
AME_DTV5100,
};
static struct usb_device_id dtv5100_table[] = {
DVB_USB_DEV(AME, AME_DTV5100),
{ }
};
MODULE_DEVICE_TABLE(usb, dtv5100_table);
static struct dvb_usb_device_properties dtv5100_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.size_of_priv = sizeof(struct dtv5100_state),
.num_adapters = 1,
.adapter = {{
.num_frontends = 1,
.fe = {{
.frontend_attach = dtv5100_frontend_attach,
.tuner_attach = dtv5100_tuner_attach,
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x82,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
} },
.i2c_algo = &dtv5100_i2c_algo,
.num_device_descs = 1,
.devices = {
{
.name = "AME DTV-5100 USB2.0 DVB-T",
.cold_ids = { NULL },
.warm_ids = { &dtv5100_table[AME_DTV5100], NULL },
},
}
};
static struct usb_driver dtv5100_driver = {
.name = "dvb_usb_dtv5100",
.probe = dtv5100_probe,
.disconnect = dvb_usb_device_exit,
.id_table = dtv5100_table,
};
module_usb_driver(dtv5100_driver);
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/dtv5100.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant Linux driver for the TwinhanDTV StarBox USB2.0 DVB-S
* receiver.
*
* Copyright (C) 2005 Ralph Metzler <[email protected]>
* Metzler Brothers Systementwicklung GbR
*
* Copyright (C) 2005 Patrick Boettcher <[email protected]>
*
* Thanks to Twinhan who kindly provided hardware and information.
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "vp702x.h"
#include <linux/mutex.h>
/* debug */
int dvb_usb_vp702x_debug;
module_param_named(debug,dvb_usb_vp702x_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,rc=4 (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
struct vp702x_adapter_state {
int pid_filter_count;
int pid_filter_can_bypass;
u8 pid_filter_state;
};
static int vp702x_usb_in_op_unlocked(struct dvb_usb_device *d, u8 req,
u16 value, u16 index, u8 *b, int blen)
{
int ret;
ret = usb_control_msg(d->udev,
usb_rcvctrlpipe(d->udev, 0),
req,
USB_TYPE_VENDOR | USB_DIR_IN,
value, index, b, blen,
2000);
if (ret < 0) {
warn("usb in operation failed. (%d)", ret);
ret = -EIO;
} else
ret = 0;
deb_xfer("in: req. %02x, val: %04x, ind: %04x, buffer: ",req,value,index);
debug_dump(b,blen,deb_xfer);
return ret;
}
int vp702x_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value,
u16 index, u8 *b, int blen)
{
int ret;
mutex_lock(&d->usb_mutex);
ret = vp702x_usb_in_op_unlocked(d, req, value, index, b, blen);
mutex_unlock(&d->usb_mutex);
return ret;
}
static int vp702x_usb_out_op_unlocked(struct dvb_usb_device *d, u8 req,
u16 value, u16 index, u8 *b, int blen)
{
int ret;
deb_xfer("out: req. %02x, val: %04x, ind: %04x, buffer: ",req,value,index);
debug_dump(b,blen,deb_xfer);
if ((ret = usb_control_msg(d->udev,
usb_sndctrlpipe(d->udev,0),
req,
USB_TYPE_VENDOR | USB_DIR_OUT,
value,index,b,blen,
2000)) != blen) {
warn("usb out operation failed. (%d)",ret);
return -EIO;
} else
return 0;
}
static int vp702x_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value,
u16 index, u8 *b, int blen)
{
int ret;
mutex_lock(&d->usb_mutex);
ret = vp702x_usb_out_op_unlocked(d, req, value, index, b, blen);
mutex_unlock(&d->usb_mutex);
return ret;
}
int vp702x_usb_inout_op(struct dvb_usb_device *d, u8 *o, int olen, u8 *i, int ilen, int msec)
{
int ret;
if ((ret = mutex_lock_interruptible(&d->usb_mutex)))
return ret;
ret = vp702x_usb_out_op_unlocked(d, REQUEST_OUT, 0, 0, o, olen);
msleep(msec);
ret = vp702x_usb_in_op_unlocked(d, REQUEST_IN, 0, 0, i, ilen);
mutex_unlock(&d->usb_mutex);
return ret;
}
static int vp702x_usb_inout_cmd(struct dvb_usb_device *d, u8 cmd, u8 *o,
int olen, u8 *i, int ilen, int msec)
{
struct vp702x_device_state *st = d->priv;
int ret = 0;
u8 *buf;
int buflen = max(olen + 2, ilen + 1);
ret = mutex_lock_interruptible(&st->buf_mutex);
if (ret < 0)
return ret;
if (buflen > st->buf_len) {
buf = kmalloc(buflen, GFP_KERNEL);
if (!buf) {
mutex_unlock(&st->buf_mutex);
return -ENOMEM;
}
info("successfully reallocated a bigger buffer");
kfree(st->buf);
st->buf = buf;
st->buf_len = buflen;
} else {
buf = st->buf;
}
buf[0] = 0x00;
buf[1] = cmd;
memcpy(&buf[2], o, olen);
ret = vp702x_usb_inout_op(d, buf, olen+2, buf, ilen+1, msec);
if (ret == 0)
memcpy(i, &buf[1], ilen);
mutex_unlock(&st->buf_mutex);
return ret;
}
static int vp702x_set_pld_mode(struct dvb_usb_adapter *adap, u8 bypass)
{
int ret;
struct vp702x_device_state *st = adap->dev->priv;
u8 *buf;
mutex_lock(&st->buf_mutex);
buf = st->buf;
memset(buf, 0, 16);
ret = vp702x_usb_in_op(adap->dev, 0xe0, (bypass << 8) | 0x0e,
0, buf, 16);
mutex_unlock(&st->buf_mutex);
return ret;
}
static int vp702x_set_pld_state(struct dvb_usb_adapter *adap, u8 state)
{
int ret;
struct vp702x_device_state *st = adap->dev->priv;
u8 *buf;
mutex_lock(&st->buf_mutex);
buf = st->buf;
memset(buf, 0, 16);
ret = vp702x_usb_in_op(adap->dev, 0xe0, (state << 8) | 0x0f,
0, buf, 16);
mutex_unlock(&st->buf_mutex);
return ret;
}
static int vp702x_set_pid(struct dvb_usb_adapter *adap, u16 pid, u8 id, int onoff)
{
struct vp702x_adapter_state *st = adap->priv;
struct vp702x_device_state *dst = adap->dev->priv;
u8 *buf;
if (onoff)
st->pid_filter_state |= (1 << id);
else {
st->pid_filter_state &= ~(1 << id);
pid = 0xffff;
}
id = 0x10 + id*2;
vp702x_set_pld_state(adap, st->pid_filter_state);
mutex_lock(&dst->buf_mutex);
buf = dst->buf;
memset(buf, 0, 16);
vp702x_usb_in_op(adap->dev, 0xe0, (((pid >> 8) & 0xff) << 8) | (id), 0, buf, 16);
vp702x_usb_in_op(adap->dev, 0xe0, (((pid ) & 0xff) << 8) | (id+1), 0, buf, 16);
mutex_unlock(&dst->buf_mutex);
return 0;
}
static int vp702x_init_pid_filter(struct dvb_usb_adapter *adap)
{
struct vp702x_adapter_state *st = adap->priv;
struct vp702x_device_state *dst = adap->dev->priv;
int i;
u8 *b;
st->pid_filter_count = 8;
st->pid_filter_can_bypass = 1;
st->pid_filter_state = 0x00;
vp702x_set_pld_mode(adap, 1); /* bypass */
for (i = 0; i < st->pid_filter_count; i++)
vp702x_set_pid(adap, 0xffff, i, 1);
mutex_lock(&dst->buf_mutex);
b = dst->buf;
memset(b, 0, 10);
vp702x_usb_in_op(adap->dev, 0xb5, 3, 0, b, 10);
vp702x_usb_in_op(adap->dev, 0xb5, 0, 0, b, 10);
vp702x_usb_in_op(adap->dev, 0xb5, 1, 0, b, 10);
mutex_unlock(&dst->buf_mutex);
/*vp702x_set_pld_mode(d, 0); // filter */
return 0;
}
static int vp702x_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
return 0;
}
/* keys for the enclosed remote control */
static struct rc_map_table rc_map_vp702x_table[] = {
{ 0x0001, KEY_1 },
{ 0x0002, KEY_2 },
};
/* remote control stuff (does not work with my box) */
static int vp702x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
{
/* remove the following return to enabled remote querying */
#if 0
u8 *key;
int i;
key = kmalloc(10, GFP_KERNEL);
if (!key)
return -ENOMEM;
vp702x_usb_in_op(d,READ_REMOTE_REQ,0,0,key,10);
deb_rc("remote query key: %x %d\n",key[1],key[1]);
if (key[1] == 0x44) {
*state = REMOTE_NO_KEY_PRESSED;
kfree(key);
return 0;
}
for (i = 0; i < ARRAY_SIZE(rc_map_vp702x_table); i++)
if (rc5_custom(&rc_map_vp702x_table[i]) == key[1]) {
*state = REMOTE_KEY_PRESSED;
*event = rc_map_vp702x_table[i].keycode;
break;
}
kfree(key);
#endif
return 0;
}
static int vp702x_read_mac_addr(struct dvb_usb_device *d,u8 mac[6])
{
u8 i, *buf;
int ret;
struct vp702x_device_state *st = d->priv;
mutex_lock(&st->buf_mutex);
buf = st->buf;
for (i = 6; i < 12; i++) {
ret = vp702x_usb_in_op(d, READ_EEPROM_REQ, i, 1,
&buf[i - 6], 1);
if (ret < 0)
goto err;
}
memcpy(mac, buf, 6);
err:
mutex_unlock(&st->buf_mutex);
return ret;
}
static int vp702x_frontend_attach(struct dvb_usb_adapter *adap)
{
u8 buf[10] = { 0 };
vp702x_usb_out_op(adap->dev, SET_TUNER_POWER_REQ, 0, 7, NULL, 0);
if (vp702x_usb_inout_cmd(adap->dev, GET_SYSTEM_STRING, NULL, 0,
buf, 10, 10))
return -EIO;
buf[9] = '\0';
info("system string: %s",&buf[1]);
vp702x_init_pid_filter(adap);
adap->fe_adap[0].fe = vp702x_fe_attach(adap->dev);
vp702x_usb_out_op(adap->dev, SET_TUNER_POWER_REQ, 1, 7, NULL, 0);
return 0;
}
static struct dvb_usb_device_properties vp702x_properties;
static int vp702x_usb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct dvb_usb_device *d;
struct vp702x_device_state *st;
int ret;
ret = dvb_usb_device_init(intf, &vp702x_properties,
THIS_MODULE, &d, adapter_nr);
if (ret)
goto out;
st = d->priv;
st->buf_len = 16;
st->buf = kmalloc(st->buf_len, GFP_KERNEL);
if (!st->buf) {
ret = -ENOMEM;
dvb_usb_device_exit(intf);
goto out;
}
mutex_init(&st->buf_mutex);
out:
return ret;
}
static void vp702x_usb_disconnect(struct usb_interface *intf)
{
struct dvb_usb_device *d = usb_get_intfdata(intf);
struct vp702x_device_state *st = d->priv;
mutex_lock(&st->buf_mutex);
kfree(st->buf);
mutex_unlock(&st->buf_mutex);
dvb_usb_device_exit(intf);
}
enum {
VISIONPLUS_VP7021_COLD,
VISIONPLUS_VP7020_COLD,
VISIONPLUS_VP7020_WARM,
};
static struct usb_device_id vp702x_usb_table[] = {
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_VP7021_COLD),
// DVB_USB_DEV(VISIONPLUS, VISIONPLUS_VP7020_COLD),
// DVB_USB_DEV(VISIONPLUS, VISIONPLUS_VP7020_WARM),
{ }
};
MODULE_DEVICE_TABLE(usb, vp702x_usb_table);
static struct dvb_usb_device_properties vp702x_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-vp702x-02.fw",
.no_reconnect = 1,
.size_of_priv = sizeof(struct vp702x_device_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_RECEIVES_204_BYTE_TS,
.streaming_ctrl = vp702x_streaming_ctrl,
.frontend_attach = vp702x_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 10,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
.size_of_priv = sizeof(struct vp702x_adapter_state),
}
},
.read_mac_address = vp702x_read_mac_addr,
.rc.legacy = {
.rc_map_table = rc_map_vp702x_table,
.rc_map_size = ARRAY_SIZE(rc_map_vp702x_table),
.rc_interval = 400,
.rc_query = vp702x_rc_query,
},
.num_device_descs = 1,
.devices = {
{ .name = "TwinhanDTV StarBox DVB-S USB2.0 (VP7021)",
.cold_ids = { &vp702x_usb_table[VISIONPLUS_VP7021_COLD], NULL },
.warm_ids = { NULL },
},
/* { .name = "TwinhanDTV StarBox DVB-S USB2.0 (VP7020)",
.cold_ids = { &vp702x_usb_table[VISIONPLUS_VP7020_COLD], NULL },
.warm_ids = { &vp702x_usb_table[VISIONPLUS_VP7020_WARM], NULL },
},
*/ { NULL },
}
};
/* usb specific object needed to register this driver with the usb subsystem */
static struct usb_driver vp702x_usb_driver = {
.name = "dvb_usb_vp702x",
.probe = vp702x_usb_probe,
.disconnect = vp702x_usb_disconnect,
.id_table = vp702x_usb_table,
};
module_usb_driver(vp702x_usb_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for Twinhan StarBox DVB-S USB2.0 and clones");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/vp702x.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant Linux driver for the AZUREWAVE DVB-S/S2 USB2.0 (AZ6027)
* receiver.
*
* Copyright (C) 2009 Adams.Xu <[email protected]>
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "az6027.h"
#include "stb0899_drv.h"
#include "stb0899_reg.h"
#include "stb0899_cfg.h"
#include "stb6100.h"
#include "stb6100_cfg.h"
#include <media/dvb_ca_en50221.h>
int dvb_usb_az6027_debug;
module_param_named(debug, dvb_usb_az6027_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,rc=4 (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
struct az6027_device_state {
struct dvb_ca_en50221 ca;
struct mutex ca_mutex;
u8 power_state;
};
static const struct stb0899_s1_reg az6027_stb0899_s1_init_1[] = {
/* 0x0000000b, SYSREG */
{ STB0899_DEV_ID , 0x30 },
{ STB0899_DISCNTRL1 , 0x32 },
{ STB0899_DISCNTRL2 , 0x80 },
{ STB0899_DISRX_ST0 , 0x04 },
{ STB0899_DISRX_ST1 , 0x00 },
{ STB0899_DISPARITY , 0x00 },
{ STB0899_DISSTATUS , 0x20 },
{ STB0899_DISF22 , 0x99 },
{ STB0899_DISF22RX , 0xa8 },
/* SYSREG ? */
{ STB0899_ACRPRESC , 0x11 },
{ STB0899_ACRDIV1 , 0x0a },
{ STB0899_ACRDIV2 , 0x05 },
{ STB0899_DACR1 , 0x00 },
{ STB0899_DACR2 , 0x00 },
{ STB0899_OUTCFG , 0x00 },
{ STB0899_MODECFG , 0x00 },
{ STB0899_IRQSTATUS_3 , 0xfe },
{ STB0899_IRQSTATUS_2 , 0x03 },
{ STB0899_IRQSTATUS_1 , 0x7c },
{ STB0899_IRQSTATUS_0 , 0xf4 },
{ STB0899_IRQMSK_3 , 0xf3 },
{ STB0899_IRQMSK_2 , 0xfc },
{ STB0899_IRQMSK_1 , 0xff },
{ STB0899_IRQMSK_0 , 0xff },
{ STB0899_IRQCFG , 0x00 },
{ STB0899_I2CCFG , 0x88 },
{ STB0899_I2CRPT , 0x58 },
{ STB0899_IOPVALUE5 , 0x00 },
{ STB0899_IOPVALUE4 , 0x33 },
{ STB0899_IOPVALUE3 , 0x6d },
{ STB0899_IOPVALUE2 , 0x90 },
{ STB0899_IOPVALUE1 , 0x60 },
{ STB0899_IOPVALUE0 , 0x00 },
{ STB0899_GPIO00CFG , 0x82 },
{ STB0899_GPIO01CFG , 0x82 },
{ STB0899_GPIO02CFG , 0x82 },
{ STB0899_GPIO03CFG , 0x82 },
{ STB0899_GPIO04CFG , 0x82 },
{ STB0899_GPIO05CFG , 0x82 },
{ STB0899_GPIO06CFG , 0x82 },
{ STB0899_GPIO07CFG , 0x82 },
{ STB0899_GPIO08CFG , 0x82 },
{ STB0899_GPIO09CFG , 0x82 },
{ STB0899_GPIO10CFG , 0x82 },
{ STB0899_GPIO11CFG , 0x82 },
{ STB0899_GPIO12CFG , 0x82 },
{ STB0899_GPIO13CFG , 0x82 },
{ STB0899_GPIO14CFG , 0x82 },
{ STB0899_GPIO15CFG , 0x82 },
{ STB0899_GPIO16CFG , 0x82 },
{ STB0899_GPIO17CFG , 0x82 },
{ STB0899_GPIO18CFG , 0x82 },
{ STB0899_GPIO19CFG , 0x82 },
{ STB0899_GPIO20CFG , 0x82 },
{ STB0899_SDATCFG , 0xb8 },
{ STB0899_SCLTCFG , 0xba },
{ STB0899_AGCRFCFG , 0x1c }, /* 0x11 */
{ STB0899_GPIO22 , 0x82 }, /* AGCBB2CFG */
{ STB0899_GPIO21 , 0x91 }, /* AGCBB1CFG */
{ STB0899_DIRCLKCFG , 0x82 },
{ STB0899_CLKOUT27CFG , 0x7e },
{ STB0899_STDBYCFG , 0x82 },
{ STB0899_CS0CFG , 0x82 },
{ STB0899_CS1CFG , 0x82 },
{ STB0899_DISEQCOCFG , 0x20 },
{ STB0899_GPIO32CFG , 0x82 },
{ STB0899_GPIO33CFG , 0x82 },
{ STB0899_GPIO34CFG , 0x82 },
{ STB0899_GPIO35CFG , 0x82 },
{ STB0899_GPIO36CFG , 0x82 },
{ STB0899_GPIO37CFG , 0x82 },
{ STB0899_GPIO38CFG , 0x82 },
{ STB0899_GPIO39CFG , 0x82 },
{ STB0899_NCOARSE , 0x17 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */
{ STB0899_SYNTCTRL , 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */
{ STB0899_FILTCTRL , 0x00 },
{ STB0899_SYSCTRL , 0x01 },
{ STB0899_STOPCLK1 , 0x20 },
{ STB0899_STOPCLK2 , 0x00 },
{ STB0899_INTBUFSTATUS , 0x00 },
{ STB0899_INTBUFCTRL , 0x0a },
{ 0xffff , 0xff },
};
static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
{ STB0899_DEMOD , 0x00 },
{ STB0899_RCOMPC , 0xc9 },
{ STB0899_AGC1CN , 0x01 },
{ STB0899_AGC1REF , 0x10 },
{ STB0899_RTC , 0x23 },
{ STB0899_TMGCFG , 0x4e },
{ STB0899_AGC2REF , 0x34 },
{ STB0899_TLSR , 0x84 },
{ STB0899_CFD , 0xf7 },
{ STB0899_ACLC , 0x87 },
{ STB0899_BCLC , 0x94 },
{ STB0899_EQON , 0x41 },
{ STB0899_LDT , 0xf1 },
{ STB0899_LDT2 , 0xe3 },
{ STB0899_EQUALREF , 0xb4 },
{ STB0899_TMGRAMP , 0x10 },
{ STB0899_TMGTHD , 0x30 },
{ STB0899_IDCCOMP , 0xfd },
{ STB0899_QDCCOMP , 0xff },
{ STB0899_POWERI , 0x0c },
{ STB0899_POWERQ , 0x0f },
{ STB0899_RCOMP , 0x6c },
{ STB0899_AGCIQIN , 0x80 },
{ STB0899_AGC2I1 , 0x06 },
{ STB0899_AGC2I2 , 0x00 },
{ STB0899_TLIR , 0x30 },
{ STB0899_RTF , 0x7f },
{ STB0899_DSTATUS , 0x00 },
{ STB0899_LDI , 0xbc },
{ STB0899_CFRM , 0xea },
{ STB0899_CFRL , 0x31 },
{ STB0899_NIRM , 0x2b },
{ STB0899_NIRL , 0x80 },
{ STB0899_ISYMB , 0x1d },
{ STB0899_QSYMB , 0xa6 },
{ STB0899_SFRH , 0x2f },
{ STB0899_SFRM , 0x68 },
{ STB0899_SFRL , 0x40 },
{ STB0899_SFRUPH , 0x2f },
{ STB0899_SFRUPM , 0x68 },
{ STB0899_SFRUPL , 0x40 },
{ STB0899_EQUAI1 , 0x02 },
{ STB0899_EQUAQ1 , 0xff },
{ STB0899_EQUAI2 , 0x04 },
{ STB0899_EQUAQ2 , 0x05 },
{ STB0899_EQUAI3 , 0x02 },
{ STB0899_EQUAQ3 , 0xfd },
{ STB0899_EQUAI4 , 0x03 },
{ STB0899_EQUAQ4 , 0x07 },
{ STB0899_EQUAI5 , 0x08 },
{ STB0899_EQUAQ5 , 0xf5 },
{ STB0899_DSTATUS2 , 0x00 },
{ STB0899_VSTATUS , 0x00 },
{ STB0899_VERROR , 0x86 },
{ STB0899_IQSWAP , 0x2a },
{ STB0899_ECNT1M , 0x00 },
{ STB0899_ECNT1L , 0x00 },
{ STB0899_ECNT2M , 0x00 },
{ STB0899_ECNT2L , 0x00 },
{ STB0899_ECNT3M , 0x0a },
{ STB0899_ECNT3L , 0xad },
{ STB0899_FECAUTO1 , 0x06 },
{ STB0899_FECM , 0x01 },
{ STB0899_VTH12 , 0xb0 },
{ STB0899_VTH23 , 0x7a },
{ STB0899_VTH34 , 0x58 },
{ STB0899_VTH56 , 0x38 },
{ STB0899_VTH67 , 0x34 },
{ STB0899_VTH78 , 0x24 },
{ STB0899_PRVIT , 0xff },
{ STB0899_VITSYNC , 0x19 },
{ STB0899_RSULC , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
{ STB0899_TSULC , 0x42 },
{ STB0899_RSLLC , 0x41 },
{ STB0899_TSLPL , 0x12 },
{ STB0899_TSCFGH , 0x0c },
{ STB0899_TSCFGM , 0x00 },
{ STB0899_TSCFGL , 0x00 },
{ STB0899_TSOUT , 0x69 }, /* 0x0d for CAM */
{ STB0899_RSSYNCDEL , 0x00 },
{ STB0899_TSINHDELH , 0x02 },
{ STB0899_TSINHDELM , 0x00 },
{ STB0899_TSINHDELL , 0x00 },
{ STB0899_TSLLSTKM , 0x1b },
{ STB0899_TSLLSTKL , 0xb3 },
{ STB0899_TSULSTKM , 0x00 },
{ STB0899_TSULSTKL , 0x00 },
{ STB0899_PCKLENUL , 0xbc },
{ STB0899_PCKLENLL , 0xcc },
{ STB0899_RSPCKLEN , 0xbd },
{ STB0899_TSSTATUS , 0x90 },
{ STB0899_ERRCTRL1 , 0xb6 },
{ STB0899_ERRCTRL2 , 0x95 },
{ STB0899_ERRCTRL3 , 0x8d },
{ STB0899_DMONMSK1 , 0x27 },
{ STB0899_DMONMSK0 , 0x03 },
{ STB0899_DEMAPVIT , 0x5c },
{ STB0899_PLPARM , 0x19 },
{ STB0899_PDELCTRL , 0x48 },
{ STB0899_PDELCTRL2 , 0x00 },
{ STB0899_BBHCTRL1 , 0x00 },
{ STB0899_BBHCTRL2 , 0x00 },
{ STB0899_HYSTTHRESH , 0x77 },
{ STB0899_MATCSTM , 0x00 },
{ STB0899_MATCSTL , 0x00 },
{ STB0899_UPLCSTM , 0x00 },
{ STB0899_UPLCSTL , 0x00 },
{ STB0899_DFLCSTM , 0x00 },
{ STB0899_DFLCSTL , 0x00 },
{ STB0899_SYNCCST , 0x00 },
{ STB0899_SYNCDCSTM , 0x00 },
{ STB0899_SYNCDCSTL , 0x00 },
{ STB0899_ISI_ENTRY , 0x00 },
{ STB0899_ISI_BIT_EN , 0x00 },
{ STB0899_MATSTRM , 0xf0 },
{ STB0899_MATSTRL , 0x02 },
{ STB0899_UPLSTRM , 0x45 },
{ STB0899_UPLSTRL , 0x60 },
{ STB0899_DFLSTRM , 0xe3 },
{ STB0899_DFLSTRL , 0x00 },
{ STB0899_SYNCSTR , 0x47 },
{ STB0899_SYNCDSTRM , 0x05 },
{ STB0899_SYNCDSTRL , 0x18 },
{ STB0899_CFGPDELSTATUS1 , 0x19 },
{ STB0899_CFGPDELSTATUS2 , 0x2b },
{ STB0899_BBFERRORM , 0x00 },
{ STB0899_BBFERRORL , 0x01 },
{ STB0899_UPKTERRORM , 0x00 },
{ STB0899_UPKTERRORL , 0x00 },
{ 0xffff , 0xff },
};
static struct stb0899_config az6027_stb0899_config = {
.init_dev = az6027_stb0899_s1_init_1,
.init_s2_demod = stb0899_s2_init_2,
.init_s1_demod = az6027_stb0899_s1_init_3,
.init_s2_fec = stb0899_s2_init_4,
.init_tst = stb0899_s1_init_5,
.demod_address = 0xd0, /* 0x68, 0xd0 >> 1 */
.xtal_freq = 27000000,
.inversion = IQ_SWAP_ON,
.lo_clk = 76500000,
.hi_clk = 99000000,
.esno_ave = STB0899_DVBS2_ESNO_AVE,
.esno_quant = STB0899_DVBS2_ESNO_QUANT,
.avframes_coarse = STB0899_DVBS2_AVFRAMES_COARSE,
.avframes_fine = STB0899_DVBS2_AVFRAMES_FINE,
.miss_threshold = STB0899_DVBS2_MISS_THRESHOLD,
.uwp_threshold_acq = STB0899_DVBS2_UWP_THRESHOLD_ACQ,
.uwp_threshold_track = STB0899_DVBS2_UWP_THRESHOLD_TRACK,
.uwp_threshold_sof = STB0899_DVBS2_UWP_THRESHOLD_SOF,
.sof_search_timeout = STB0899_DVBS2_SOF_SEARCH_TIMEOUT,
.btr_nco_bits = STB0899_DVBS2_BTR_NCO_BITS,
.btr_gain_shift_offset = STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET,
.crl_nco_bits = STB0899_DVBS2_CRL_NCO_BITS,
.ldpc_max_iter = STB0899_DVBS2_LDPC_MAX_ITER,
.tuner_get_frequency = stb6100_get_frequency,
.tuner_set_frequency = stb6100_set_frequency,
.tuner_set_bandwidth = stb6100_set_bandwidth,
.tuner_get_bandwidth = stb6100_get_bandwidth,
.tuner_set_rfsiggain = NULL,
};
static struct stb6100_config az6027_stb6100_config = {
.tuner_address = 0xc0,
.refclock = 27000000,
};
/* check for mutex FIXME */
static int az6027_usb_in_op(struct dvb_usb_device *d, u8 req,
u16 value, u16 index, u8 *b, int blen)
{
int ret = -1;
if (mutex_lock_interruptible(&d->usb_mutex))
return -EAGAIN;
ret = usb_control_msg(d->udev,
usb_rcvctrlpipe(d->udev, 0),
req,
USB_TYPE_VENDOR | USB_DIR_IN,
value,
index,
b,
blen,
2000);
if (ret < 0) {
warn("usb in operation failed. (%d)", ret);
ret = -EIO;
} else
ret = 0;
deb_xfer("in: req. %02x, val: %04x, ind: %04x, buffer: ", req, value, index);
debug_dump(b, blen, deb_xfer);
mutex_unlock(&d->usb_mutex);
return ret;
}
static int az6027_usb_out_op(struct dvb_usb_device *d,
u8 req,
u16 value,
u16 index,
u8 *b,
int blen)
{
int ret;
deb_xfer("out: req. %02x, val: %04x, ind: %04x, buffer: ", req, value, index);
debug_dump(b, blen, deb_xfer);
if (mutex_lock_interruptible(&d->usb_mutex))
return -EAGAIN;
ret = usb_control_msg(d->udev,
usb_sndctrlpipe(d->udev, 0),
req,
USB_TYPE_VENDOR | USB_DIR_OUT,
value,
index,
b,
blen,
2000);
if (ret != blen) {
warn("usb out operation failed. (%d)", ret);
mutex_unlock(&d->usb_mutex);
return -EIO;
} else{
mutex_unlock(&d->usb_mutex);
return 0;
}
}
static int az6027_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
int ret;
u8 req;
u16 value;
u16 index;
int blen;
deb_info("%s %d", __func__, onoff);
req = 0xBC;
value = onoff;
index = 0;
blen = 0;
ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
if (ret != 0)
warn("usb out operation failed. (%d)", ret);
return ret;
}
/* keys for the enclosed remote control */
static struct rc_map_table rc_map_az6027_table[] = {
{ 0x01, KEY_1 },
{ 0x02, KEY_2 },
};
/* remote control stuff (does not work with my box) */
static int az6027_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
{
*state = REMOTE_NO_KEY_PRESSED;
return 0;
}
/*
int az6027_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 v = onoff;
return az6027_usb_out_op(d,0xBC,v,3,NULL,1);
}
*/
static int az6027_ci_read_attribute_mem(struct dvb_ca_en50221 *ca,
int slot,
int address)
{
struct dvb_usb_device *d = ca->data;
struct az6027_device_state *state = d->priv;
int ret;
u8 req;
u16 value;
u16 index;
int blen;
u8 *b;
if (slot != 0)
return -EINVAL;
b = kmalloc(12, GFP_KERNEL);
if (!b)
return -ENOMEM;
mutex_lock(&state->ca_mutex);
req = 0xC1;
value = address;
index = 0;
blen = 1;
ret = az6027_usb_in_op(d, req, value, index, b, blen);
if (ret < 0) {
warn("usb in operation failed. (%d)", ret);
ret = -EINVAL;
} else {
ret = b[0];
}
mutex_unlock(&state->ca_mutex);
kfree(b);
return ret;
}
static int az6027_ci_write_attribute_mem(struct dvb_ca_en50221 *ca,
int slot,
int address,
u8 value)
{
struct dvb_usb_device *d = ca->data;
struct az6027_device_state *state = d->priv;
int ret;
u8 req;
u16 value1;
u16 index;
int blen;
deb_info("%s %d", __func__, slot);
if (slot != 0)
return -EINVAL;
mutex_lock(&state->ca_mutex);
req = 0xC2;
value1 = address;
index = value;
blen = 0;
ret = az6027_usb_out_op(d, req, value1, index, NULL, blen);
if (ret != 0)
warn("usb out operation failed. (%d)", ret);
mutex_unlock(&state->ca_mutex);
return ret;
}
static int az6027_ci_read_cam_control(struct dvb_ca_en50221 *ca,
int slot,
u8 address)
{
struct dvb_usb_device *d = ca->data;
struct az6027_device_state *state = d->priv;
int ret;
u8 req;
u16 value;
u16 index;
int blen;
u8 *b;
if (slot != 0)
return -EINVAL;
b = kmalloc(12, GFP_KERNEL);
if (!b)
return -ENOMEM;
mutex_lock(&state->ca_mutex);
req = 0xC3;
value = address;
index = 0;
blen = 2;
ret = az6027_usb_in_op(d, req, value, index, b, blen);
if (ret < 0) {
warn("usb in operation failed. (%d)", ret);
ret = -EINVAL;
} else {
if (b[0] == 0)
warn("Read CI IO error");
ret = b[1];
deb_info("read cam data = %x from 0x%x", b[1], value);
}
mutex_unlock(&state->ca_mutex);
kfree(b);
return ret;
}
static int az6027_ci_write_cam_control(struct dvb_ca_en50221 *ca,
int slot,
u8 address,
u8 value)
{
struct dvb_usb_device *d = ca->data;
struct az6027_device_state *state = d->priv;
int ret;
u8 req;
u16 value1;
u16 index;
int blen;
if (slot != 0)
return -EINVAL;
mutex_lock(&state->ca_mutex);
req = 0xC4;
value1 = address;
index = value;
blen = 0;
ret = az6027_usb_out_op(d, req, value1, index, NULL, blen);
if (ret != 0) {
warn("usb out operation failed. (%d)", ret);
goto failed;
}
failed:
mutex_unlock(&state->ca_mutex);
return ret;
}
static int CI_CamReady(struct dvb_ca_en50221 *ca, int slot)
{
struct dvb_usb_device *d = ca->data;
int ret;
u8 req;
u16 value;
u16 index;
int blen;
u8 *b;
b = kmalloc(12, GFP_KERNEL);
if (!b)
return -ENOMEM;
req = 0xC8;
value = 0;
index = 0;
blen = 1;
ret = az6027_usb_in_op(d, req, value, index, b, blen);
if (ret < 0) {
warn("usb in operation failed. (%d)", ret);
ret = -EIO;
} else{
ret = b[0];
}
kfree(b);
return ret;
}
static int az6027_ci_slot_reset(struct dvb_ca_en50221 *ca, int slot)
{
struct dvb_usb_device *d = ca->data;
struct az6027_device_state *state = d->priv;
int ret, i;
u8 req;
u16 value;
u16 index;
int blen;
mutex_lock(&state->ca_mutex);
req = 0xC6;
value = 1;
index = 0;
blen = 0;
ret = az6027_usb_out_op(d, req, value, index, NULL, blen);
if (ret != 0) {
warn("usb out operation failed. (%d)", ret);
goto failed;
}
msleep(500);
req = 0xC6;
value = 0;
index = 0;
blen = 0;
ret = az6027_usb_out_op(d, req, value, index, NULL, blen);
if (ret != 0) {
warn("usb out operation failed. (%d)", ret);
goto failed;
}
for (i = 0; i < 15; i++) {
msleep(100);
if (CI_CamReady(ca, slot)) {
deb_info("CAM Ready");
break;
}
}
msleep(5000);
failed:
mutex_unlock(&state->ca_mutex);
return ret;
}
static int az6027_ci_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
{
return 0;
}
static int az6027_ci_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
{
struct dvb_usb_device *d = ca->data;
struct az6027_device_state *state = d->priv;
int ret;
u8 req;
u16 value;
u16 index;
int blen;
deb_info("%s", __func__);
mutex_lock(&state->ca_mutex);
req = 0xC7;
value = 1;
index = 0;
blen = 0;
ret = az6027_usb_out_op(d, req, value, index, NULL, blen);
if (ret != 0) {
warn("usb out operation failed. (%d)", ret);
goto failed;
}
failed:
mutex_unlock(&state->ca_mutex);
return ret;
}
static int az6027_ci_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
{
struct dvb_usb_device *d = ca->data;
struct az6027_device_state *state = d->priv;
int ret;
u8 req;
u16 value;
u16 index;
int blen;
u8 *b;
b = kmalloc(12, GFP_KERNEL);
if (!b)
return -ENOMEM;
mutex_lock(&state->ca_mutex);
req = 0xC5;
value = 0;
index = 0;
blen = 1;
ret = az6027_usb_in_op(d, req, value, index, b, blen);
if (ret < 0) {
warn("usb in operation failed. (%d)", ret);
ret = -EIO;
} else
ret = 0;
if (!ret && b[0] == 1) {
ret = DVB_CA_EN50221_POLL_CAM_PRESENT |
DVB_CA_EN50221_POLL_CAM_READY;
}
mutex_unlock(&state->ca_mutex);
kfree(b);
return ret;
}
static void az6027_ci_uninit(struct dvb_usb_device *d)
{
struct az6027_device_state *state;
deb_info("%s", __func__);
if (NULL == d)
return;
state = d->priv;
if (NULL == state)
return;
if (NULL == state->ca.data)
return;
dvb_ca_en50221_release(&state->ca);
memset(&state->ca, 0, sizeof(state->ca));
}
static int az6027_ci_init(struct dvb_usb_adapter *a)
{
struct dvb_usb_device *d = a->dev;
struct az6027_device_state *state = d->priv;
int ret;
deb_info("%s", __func__);
mutex_init(&state->ca_mutex);
state->ca.owner = THIS_MODULE;
state->ca.read_attribute_mem = az6027_ci_read_attribute_mem;
state->ca.write_attribute_mem = az6027_ci_write_attribute_mem;
state->ca.read_cam_control = az6027_ci_read_cam_control;
state->ca.write_cam_control = az6027_ci_write_cam_control;
state->ca.slot_reset = az6027_ci_slot_reset;
state->ca.slot_shutdown = az6027_ci_slot_shutdown;
state->ca.slot_ts_enable = az6027_ci_slot_ts_enable;
state->ca.poll_slot_status = az6027_ci_poll_slot_status;
state->ca.data = d;
ret = dvb_ca_en50221_init(&a->dvb_adap,
&state->ca,
0, /* flags */
1);/* n_slots */
if (ret != 0) {
err("Cannot initialize CI: Error %d.", ret);
memset(&state->ca, 0, sizeof(state->ca));
return ret;
}
deb_info("CI initialized.");
return 0;
}
/*
static int az6027_read_mac_addr(struct dvb_usb_device *d, u8 mac[6])
{
az6027_usb_in_op(d, 0xb7, 6, 0, &mac[0], 6);
return 0;
}
*/
static int az6027_set_voltage(struct dvb_frontend *fe,
enum fe_sec_voltage voltage)
{
u8 buf;
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct i2c_msg i2c_msg = {
.addr = 0x99,
.flags = 0,
.buf = &buf,
.len = 1
};
/*
* 2 --18v
* 1 --13v
* 0 --off
*/
switch (voltage) {
case SEC_VOLTAGE_13:
buf = 1;
i2c_transfer(&adap->dev->i2c_adap, &i2c_msg, 1);
break;
case SEC_VOLTAGE_18:
buf = 2;
i2c_transfer(&adap->dev->i2c_adap, &i2c_msg, 1);
break;
case SEC_VOLTAGE_OFF:
buf = 0;
i2c_transfer(&adap->dev->i2c_adap, &i2c_msg, 1);
break;
default:
return -EINVAL;
}
return 0;
}
static int az6027_frontend_poweron(struct dvb_usb_adapter *adap)
{
int ret;
u8 req;
u16 value;
u16 index;
int blen;
req = 0xBC;
value = 1; /* power on */
index = 3;
blen = 0;
ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
if (ret != 0)
return -EIO;
return 0;
}
static int az6027_frontend_reset(struct dvb_usb_adapter *adap)
{
int ret;
u8 req;
u16 value;
u16 index;
int blen;
/* reset demodulator */
req = 0xC0;
value = 1; /* high */
index = 3;
blen = 0;
ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
if (ret != 0)
return -EIO;
req = 0xC0;
value = 0; /* low */
index = 3;
blen = 0;
msleep_interruptible(200);
ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
if (ret != 0)
return -EIO;
msleep_interruptible(200);
req = 0xC0;
value = 1; /*high */
index = 3;
blen = 0;
ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
if (ret != 0)
return -EIO;
msleep_interruptible(200);
return 0;
}
static int az6027_frontend_tsbypass(struct dvb_usb_adapter *adap, int onoff)
{
int ret;
u8 req;
u16 value;
u16 index;
int blen;
/* TS passthrough */
req = 0xC7;
value = onoff;
index = 0;
blen = 0;
ret = az6027_usb_out_op(adap->dev, req, value, index, NULL, blen);
if (ret != 0)
return -EIO;
return 0;
}
static int az6027_frontend_attach(struct dvb_usb_adapter *adap)
{
az6027_frontend_poweron(adap);
az6027_frontend_reset(adap);
deb_info("adap = %p, dev = %p\n", adap, adap->dev);
adap->fe_adap[0].fe = stb0899_attach(&az6027_stb0899_config, &adap->dev->i2c_adap);
if (adap->fe_adap[0].fe) {
deb_info("found STB0899 DVB-S/DVB-S2 frontend @0x%02x", az6027_stb0899_config.demod_address);
if (stb6100_attach(adap->fe_adap[0].fe, &az6027_stb6100_config, &adap->dev->i2c_adap)) {
deb_info("found STB6100 DVB-S/DVB-S2 frontend @0x%02x", az6027_stb6100_config.tuner_address);
adap->fe_adap[0].fe->ops.set_voltage = az6027_set_voltage;
az6027_ci_init(adap);
} else {
adap->fe_adap[0].fe = NULL;
}
} else
warn("no front-end attached\n");
az6027_frontend_tsbypass(adap, 0);
return 0;
}
static struct dvb_usb_device_properties az6027_properties;
static void az6027_usb_disconnect(struct usb_interface *intf)
{
struct dvb_usb_device *d = usb_get_intfdata(intf);
az6027_ci_uninit(d);
dvb_usb_device_exit(intf);
}
static int az6027_usb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
return dvb_usb_device_init(intf,
&az6027_properties,
THIS_MODULE,
NULL,
adapter_nr);
}
/* I2C */
static int az6027_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[], int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
int i = 0, j = 0, len = 0;
u16 index;
u16 value;
int length;
u8 req;
u8 *data;
data = kmalloc(256, GFP_KERNEL);
if (!data)
return -ENOMEM;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0) {
kfree(data);
return -EAGAIN;
}
if (num > 2)
warn("more than 2 i2c messages at a time is not handled yet. TODO.");
for (i = 0; i < num; i++) {
if (msg[i].addr == 0x99) {
req = 0xBE;
index = 0;
if (msg[i].len < 1) {
i = -EOPNOTSUPP;
break;
}
value = msg[i].buf[0] & 0x00ff;
length = 1;
az6027_usb_out_op(d, req, value, index, data, length);
}
if (msg[i].addr == 0xd0) {
/* write/read request */
if (i + 1 < num && (msg[i + 1].flags & I2C_M_RD)) {
req = 0xB9;
if (msg[i].len < 1) {
i = -EOPNOTSUPP;
break;
}
index = (((msg[i].buf[0] << 8) & 0xff00) | (msg[i].buf[1] & 0x00ff));
value = msg[i].addr + (msg[i].len << 8);
length = msg[i + 1].len + 6;
az6027_usb_in_op(d, req, value, index, data, length);
len = msg[i + 1].len;
for (j = 0; j < len; j++)
msg[i + 1].buf[j] = data[j + 5];
i++;
} else {
/* demod 16bit addr */
req = 0xBD;
if (msg[i].len < 1) {
i = -EOPNOTSUPP;
break;
}
index = (((msg[i].buf[0] << 8) & 0xff00) | (msg[i].buf[1] & 0x00ff));
value = msg[i].addr + (2 << 8);
length = msg[i].len - 2;
len = msg[i].len - 2;
for (j = 0; j < len; j++)
data[j] = msg[i].buf[j + 2];
az6027_usb_out_op(d, req, value, index, data, length);
}
}
if (msg[i].addr == 0xc0) {
if (msg[i].flags & I2C_M_RD) {
req = 0xB9;
index = 0x0;
value = msg[i].addr;
length = msg[i].len + 6;
az6027_usb_in_op(d, req, value, index, data, length);
len = msg[i].len;
for (j = 0; j < len; j++)
msg[i].buf[j] = data[j + 5];
} else {
req = 0xBD;
if (msg[i].len < 1) {
i = -EOPNOTSUPP;
break;
}
index = msg[i].buf[0] & 0x00FF;
value = msg[i].addr + (1 << 8);
length = msg[i].len - 1;
len = msg[i].len - 1;
for (j = 0; j < len; j++)
data[j] = msg[i].buf[j + 1];
az6027_usb_out_op(d, req, value, index, data, length);
}
}
}
mutex_unlock(&d->i2c_mutex);
kfree(data);
return i;
}
static u32 az6027_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
static struct i2c_algorithm az6027_i2c_algo = {
.master_xfer = az6027_i2c_xfer,
.functionality = az6027_i2c_func,
};
static int az6027_identify_state(struct usb_device *udev,
const struct dvb_usb_device_properties *props,
const struct dvb_usb_device_description **desc,
int *cold)
{
u8 *b;
s16 ret;
b = kmalloc(16, GFP_KERNEL);
if (!b)
return -ENOMEM;
ret = usb_control_msg(udev,
usb_rcvctrlpipe(udev, 0),
0xb7,
USB_TYPE_VENDOR | USB_DIR_IN,
6,
0,
b,
6,
USB_CTRL_GET_TIMEOUT);
*cold = ret <= 0;
kfree(b);
deb_info("cold: %d\n", *cold);
return 0;
}
enum {
AZUREWAVE_AZ6027,
TERRATEC_DVBS2CI_V1,
TERRATEC_DVBS2CI_V2,
TECHNISAT_USB2_HDCI_V1,
TECHNISAT_USB2_HDCI_V2,
ELGATO_EYETV_SAT,
ELGATO_EYETV_SAT_V2,
ELGATO_EYETV_SAT_V3,
};
static struct usb_device_id az6027_usb_table[] = {
DVB_USB_DEV(AZUREWAVE, AZUREWAVE_AZ6027),
DVB_USB_DEV(TERRATEC, TERRATEC_DVBS2CI_V1),
DVB_USB_DEV(TERRATEC, TERRATEC_DVBS2CI_V2),
DVB_USB_DEV(TECHNISAT, TECHNISAT_USB2_HDCI_V1),
DVB_USB_DEV(TECHNISAT, TECHNISAT_USB2_HDCI_V2),
DVB_USB_DEV(ELGATO, ELGATO_EYETV_SAT),
DVB_USB_DEV(ELGATO, ELGATO_EYETV_SAT_V2),
DVB_USB_DEV(ELGATO, ELGATO_EYETV_SAT_V3),
{ }
};
MODULE_DEVICE_TABLE(usb, az6027_usb_table);
static struct dvb_usb_device_properties az6027_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-az6027-03.fw",
.no_reconnect = 1,
.size_of_priv = sizeof(struct az6027_device_state),
.identify_state = az6027_identify_state,
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = az6027_streaming_ctrl,
.frontend_attach = az6027_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 10,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
/*
.power_ctrl = az6027_power_ctrl,
.read_mac_address = az6027_read_mac_addr,
*/
.rc.legacy = {
.rc_map_table = rc_map_az6027_table,
.rc_map_size = ARRAY_SIZE(rc_map_az6027_table),
.rc_interval = 400,
.rc_query = az6027_rc_query,
},
.i2c_algo = &az6027_i2c_algo,
.num_device_descs = 8,
.devices = {
{
.name = "AZUREWAVE DVB-S/S2 USB2.0 (AZ6027)",
.cold_ids = { &az6027_usb_table[AZUREWAVE_AZ6027], NULL },
.warm_ids = { NULL },
}, {
.name = "TERRATEC S7",
.cold_ids = { &az6027_usb_table[TERRATEC_DVBS2CI_V1], NULL },
.warm_ids = { NULL },
}, {
.name = "TERRATEC S7 MKII",
.cold_ids = { &az6027_usb_table[TERRATEC_DVBS2CI_V2], NULL },
.warm_ids = { NULL },
}, {
.name = "Technisat SkyStar USB 2 HD CI",
.cold_ids = { &az6027_usb_table[TECHNISAT_USB2_HDCI_V1], NULL },
.warm_ids = { NULL },
}, {
.name = "Technisat SkyStar USB 2 HD CI",
.cold_ids = { &az6027_usb_table[TECHNISAT_USB2_HDCI_V2], NULL },
.warm_ids = { NULL },
}, {
.name = "Elgato EyeTV Sat",
.cold_ids = { &az6027_usb_table[ELGATO_EYETV_SAT], NULL },
.warm_ids = { NULL },
}, {
.name = "Elgato EyeTV Sat",
.cold_ids = { &az6027_usb_table[ELGATO_EYETV_SAT_V2], NULL },
.warm_ids = { NULL },
}, {
.name = "Elgato EyeTV Sat",
.cold_ids = { &az6027_usb_table[ELGATO_EYETV_SAT_V3], NULL },
.warm_ids = { NULL },
},
{ NULL },
}
};
/* usb specific object needed to register this driver with the usb subsystem */
static struct usb_driver az6027_usb_driver = {
.name = "dvb_usb_az6027",
.probe = az6027_usb_probe,
.disconnect = az6027_usb_disconnect,
.id_table = az6027_usb_table,
};
module_usb_driver(az6027_usb_driver);
MODULE_AUTHOR("Adams Xu <[email protected]>");
MODULE_DESCRIPTION("Driver for AZUREWAVE DVB-S/S2 USB2.0 (AZ6027)");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/az6027.c |
// SPDX-License-Identifier: GPL-2.0
/* dvb-usb-remote.c is part of the DVB USB library.
*
* Copyright (C) 2004-6 Patrick Boettcher ([email protected])
* see dvb-usb-init.c for copyright information.
*
* This file contains functions for initializing the input-device and for handling remote-control-queries.
*/
#include "dvb-usb-common.h"
#include <linux/usb/input.h>
static unsigned int
legacy_dvb_usb_get_keymap_index(const struct input_keymap_entry *ke,
struct rc_map_table *keymap,
unsigned int keymap_size)
{
unsigned int index;
unsigned int scancode;
if (ke->flags & INPUT_KEYMAP_BY_INDEX) {
index = ke->index;
} else {
if (input_scancode_to_scalar(ke, &scancode))
return keymap_size;
/* See if we can match the raw key code. */
for (index = 0; index < keymap_size; index++)
if (keymap[index].scancode == scancode)
break;
/* See if there is an unused hole in the map */
if (index >= keymap_size) {
for (index = 0; index < keymap_size; index++) {
if (keymap[index].keycode == KEY_RESERVED ||
keymap[index].keycode == KEY_UNKNOWN) {
break;
}
}
}
}
return index;
}
static int legacy_dvb_usb_getkeycode(struct input_dev *dev,
struct input_keymap_entry *ke)
{
struct dvb_usb_device *d = input_get_drvdata(dev);
struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
unsigned int keymap_size = d->props.rc.legacy.rc_map_size;
unsigned int index;
index = legacy_dvb_usb_get_keymap_index(ke, keymap, keymap_size);
if (index >= keymap_size)
return -EINVAL;
ke->keycode = keymap[index].keycode;
if (ke->keycode == KEY_UNKNOWN)
ke->keycode = KEY_RESERVED;
ke->len = sizeof(keymap[index].scancode);
memcpy(&ke->scancode, &keymap[index].scancode, ke->len);
ke->index = index;
return 0;
}
static int legacy_dvb_usb_setkeycode(struct input_dev *dev,
const struct input_keymap_entry *ke,
unsigned int *old_keycode)
{
struct dvb_usb_device *d = input_get_drvdata(dev);
struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
unsigned int keymap_size = d->props.rc.legacy.rc_map_size;
unsigned int index;
index = legacy_dvb_usb_get_keymap_index(ke, keymap, keymap_size);
/*
* FIXME: Currently, it is not possible to increase the size of
* scancode table. For it to happen, one possibility
* would be to allocate a table with key_map_size + 1,
* copying data, appending the new key on it, and freeing
* the old one - or maybe just allocating some spare space
*/
if (index >= keymap_size)
return -EINVAL;
*old_keycode = keymap[index].keycode;
keymap->keycode = ke->keycode;
__set_bit(ke->keycode, dev->keybit);
if (*old_keycode != KEY_RESERVED) {
__clear_bit(*old_keycode, dev->keybit);
for (index = 0; index < keymap_size; index++) {
if (keymap[index].keycode == *old_keycode) {
__set_bit(*old_keycode, dev->keybit);
break;
}
}
}
return 0;
}
/* Remote-control poll function - called every dib->rc_query_interval ms to see
* whether the remote control has received anything.
*
* TODO: Fix the repeat rate of the input device.
*/
static void legacy_dvb_usb_read_remote_control(struct work_struct *work)
{
struct dvb_usb_device *d =
container_of(work, struct dvb_usb_device, rc_query_work.work);
u32 event;
int state;
/* TODO: need a lock here. We can simply skip checking for the remote control
if we're busy. */
/* when the parameter has been set to 1 via sysfs while the driver was running */
if (dvb_usb_disable_rc_polling)
return;
if (d->props.rc.legacy.rc_query(d,&event,&state)) {
err("error while querying for an remote control event.");
goto schedule;
}
switch (state) {
case REMOTE_NO_KEY_PRESSED:
break;
case REMOTE_KEY_PRESSED:
deb_rc("key pressed\n");
d->last_event = event;
input_event(d->input_dev, EV_KEY, event, 1);
input_sync(d->input_dev);
input_event(d->input_dev, EV_KEY, d->last_event, 0);
input_sync(d->input_dev);
break;
case REMOTE_KEY_REPEAT:
deb_rc("key repeated\n");
input_event(d->input_dev, EV_KEY, event, 1);
input_sync(d->input_dev);
input_event(d->input_dev, EV_KEY, d->last_event, 0);
input_sync(d->input_dev);
break;
default:
break;
}
/* improved repeat handling ???
switch (state) {
case REMOTE_NO_KEY_PRESSED:
deb_rc("NO KEY PRESSED\n");
if (d->last_state != REMOTE_NO_KEY_PRESSED) {
deb_rc("releasing event %d\n",d->last_event);
input_event(d->rc_input_dev, EV_KEY, d->last_event, 0);
input_sync(d->rc_input_dev);
}
d->last_state = REMOTE_NO_KEY_PRESSED;
d->last_event = 0;
break;
case REMOTE_KEY_PRESSED:
deb_rc("KEY PRESSED\n");
deb_rc("pressing event %d\n",event);
input_event(d->rc_input_dev, EV_KEY, event, 1);
input_sync(d->rc_input_dev);
d->last_event = event;
d->last_state = REMOTE_KEY_PRESSED;
break;
case REMOTE_KEY_REPEAT:
deb_rc("KEY_REPEAT\n");
if (d->last_state != REMOTE_NO_KEY_PRESSED) {
deb_rc("repeating event %d\n",d->last_event);
input_event(d->rc_input_dev, EV_KEY, d->last_event, 2);
input_sync(d->rc_input_dev);
d->last_state = REMOTE_KEY_REPEAT;
}
default:
break;
}
*/
schedule:
schedule_delayed_work(&d->rc_query_work,msecs_to_jiffies(d->props.rc.legacy.rc_interval));
}
static int legacy_dvb_usb_remote_init(struct dvb_usb_device *d)
{
int i, err, rc_interval;
struct input_dev *input_dev;
input_dev = input_allocate_device();
if (!input_dev)
return -ENOMEM;
input_dev->evbit[0] = BIT_MASK(EV_KEY);
input_dev->name = "IR-receiver inside an USB DVB receiver";
input_dev->phys = d->rc_phys;
usb_to_input_id(d->udev, &input_dev->id);
input_dev->dev.parent = &d->udev->dev;
d->input_dev = input_dev;
d->rc_dev = NULL;
input_dev->getkeycode = legacy_dvb_usb_getkeycode;
input_dev->setkeycode = legacy_dvb_usb_setkeycode;
/* set the bits for the keys */
deb_rc("key map size: %d\n", d->props.rc.legacy.rc_map_size);
for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) {
deb_rc("setting bit for event %d item %d\n",
d->props.rc.legacy.rc_map_table[i].keycode, i);
set_bit(d->props.rc.legacy.rc_map_table[i].keycode, input_dev->keybit);
}
/* setting these two values to non-zero, we have to manage key repeats */
input_dev->rep[REP_PERIOD] = d->props.rc.legacy.rc_interval;
input_dev->rep[REP_DELAY] = d->props.rc.legacy.rc_interval + 150;
input_set_drvdata(input_dev, d);
err = input_register_device(input_dev);
if (err)
input_free_device(input_dev);
rc_interval = d->props.rc.legacy.rc_interval;
INIT_DELAYED_WORK(&d->rc_query_work, legacy_dvb_usb_read_remote_control);
info("schedule remote query interval to %d msecs.", rc_interval);
schedule_delayed_work(&d->rc_query_work,
msecs_to_jiffies(rc_interval));
d->state |= DVB_USB_STATE_REMOTE;
return err;
}
/* Remote-control poll function - called every dib->rc_query_interval ms to see
* whether the remote control has received anything.
*
* TODO: Fix the repeat rate of the input device.
*/
static void dvb_usb_read_remote_control(struct work_struct *work)
{
struct dvb_usb_device *d =
container_of(work, struct dvb_usb_device, rc_query_work.work);
int err;
/* TODO: need a lock here. We can simply skip checking for the remote control
if we're busy. */
/* when the parameter has been set to 1 via sysfs while the
* driver was running, or when bulk mode is enabled after IR init
*/
if (dvb_usb_disable_rc_polling || d->props.rc.core.bulk_mode)
return;
err = d->props.rc.core.rc_query(d);
if (err)
err("error %d while querying for an remote control event.", err);
schedule_delayed_work(&d->rc_query_work,
msecs_to_jiffies(d->props.rc.core.rc_interval));
}
static int rc_core_dvb_usb_remote_init(struct dvb_usb_device *d)
{
int err, rc_interval;
struct rc_dev *dev;
dev = rc_allocate_device(d->props.rc.core.driver_type);
if (!dev)
return -ENOMEM;
dev->driver_name = d->props.rc.core.module_name;
dev->map_name = d->props.rc.core.rc_codes;
dev->change_protocol = d->props.rc.core.change_protocol;
dev->allowed_protocols = d->props.rc.core.allowed_protos;
usb_to_input_id(d->udev, &dev->input_id);
dev->device_name = d->desc->name;
dev->input_phys = d->rc_phys;
dev->dev.parent = &d->udev->dev;
dev->priv = d;
dev->scancode_mask = d->props.rc.core.scancode_mask;
err = rc_register_device(dev);
if (err < 0) {
rc_free_device(dev);
return err;
}
d->input_dev = NULL;
d->rc_dev = dev;
if (!d->props.rc.core.rc_query || d->props.rc.core.bulk_mode)
return 0;
/* Polling mode - initialize a work queue for handling it */
INIT_DELAYED_WORK(&d->rc_query_work, dvb_usb_read_remote_control);
rc_interval = d->props.rc.core.rc_interval;
info("schedule remote query interval to %d msecs.", rc_interval);
schedule_delayed_work(&d->rc_query_work,
msecs_to_jiffies(rc_interval));
return 0;
}
int dvb_usb_remote_init(struct dvb_usb_device *d)
{
int err;
if (dvb_usb_disable_rc_polling)
return 0;
if (d->props.rc.legacy.rc_map_table && d->props.rc.legacy.rc_query)
d->props.rc.mode = DVB_RC_LEGACY;
else if (d->props.rc.core.rc_codes)
d->props.rc.mode = DVB_RC_CORE;
else
return 0;
usb_make_path(d->udev, d->rc_phys, sizeof(d->rc_phys));
strlcat(d->rc_phys, "/ir0", sizeof(d->rc_phys));
/* Start the remote-control polling. */
if (d->props.rc.legacy.rc_interval < 40)
d->props.rc.legacy.rc_interval = 100; /* default */
if (d->props.rc.mode == DVB_RC_LEGACY)
err = legacy_dvb_usb_remote_init(d);
else
err = rc_core_dvb_usb_remote_init(d);
if (err)
return err;
d->state |= DVB_USB_STATE_REMOTE;
return 0;
}
int dvb_usb_remote_exit(struct dvb_usb_device *d)
{
if (d->state & DVB_USB_STATE_REMOTE) {
cancel_delayed_work_sync(&d->rc_query_work);
if (d->props.rc.mode == DVB_RC_LEGACY)
input_unregister_device(d->input_dev);
else
rc_unregister_device(d->rc_dev);
}
d->state &= ~DVB_USB_STATE_REMOTE;
return 0;
}
#define DVB_USB_RC_NEC_EMPTY 0x00
#define DVB_USB_RC_NEC_KEY_PRESSED 0x01
#define DVB_USB_RC_NEC_KEY_REPEATED 0x02
int dvb_usb_nec_rc_key_to_event(struct dvb_usb_device *d,
u8 keybuf[5], u32 *event, int *state)
{
int i;
struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
*event = 0;
*state = REMOTE_NO_KEY_PRESSED;
switch (keybuf[0]) {
case DVB_USB_RC_NEC_EMPTY:
break;
case DVB_USB_RC_NEC_KEY_PRESSED:
if ((u8) ~keybuf[1] != keybuf[2] ||
(u8) ~keybuf[3] != keybuf[4]) {
deb_err("remote control checksum failed.\n");
break;
}
/* See if we can match the raw key code. */
for (i = 0; i < d->props.rc.legacy.rc_map_size; i++)
if (rc5_custom(&keymap[i]) == keybuf[1] &&
rc5_data(&keymap[i]) == keybuf[3]) {
*event = keymap[i].keycode;
*state = REMOTE_KEY_PRESSED;
return 0;
}
deb_err("key mapping failed - no appropriate key found in keymapping\n");
break;
case DVB_USB_RC_NEC_KEY_REPEATED:
*state = REMOTE_KEY_REPEAT;
break;
default:
deb_err("unknown type of remote status: %d\n",keybuf[0]);
break;
}
return 0;
}
EXPORT_SYMBOL(dvb_usb_nec_rc_key_to_event);
| linux-master | drivers/media/usb/dvb-usb/dvb-usb-remote.c |
// SPDX-License-Identifier: GPL-2.0-only
/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
*
* Copyright (C) 2005-6 DiBcom, SA
*/
#include "dib0700.h"
/* debug */
int dvb_usb_dib0700_debug;
module_param_named(debug,dvb_usb_dib0700_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info,2=fw,4=fwdata,8=data (or-able))." DVB_USB_DEBUG_STATUS);
static int nb_packet_buffer_size = 21;
module_param(nb_packet_buffer_size, int, 0644);
MODULE_PARM_DESC(nb_packet_buffer_size,
"Set the dib0700 driver data buffer size. This parameter corresponds to the number of TS packets. The actual size of the data buffer corresponds to this parameter multiplied by 188 (default: 21)");
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion,
u32 *romversion, u32 *ramversion, u32 *fwtype)
{
struct dib0700_state *st = d->priv;
int ret;
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
return -EINTR;
}
ret = usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0),
REQUEST_GET_VERSION,
USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
st->buf, 16, USB_CTRL_GET_TIMEOUT);
if (hwversion != NULL)
*hwversion = (st->buf[0] << 24) | (st->buf[1] << 16) |
(st->buf[2] << 8) | st->buf[3];
if (romversion != NULL)
*romversion = (st->buf[4] << 24) | (st->buf[5] << 16) |
(st->buf[6] << 8) | st->buf[7];
if (ramversion != NULL)
*ramversion = (st->buf[8] << 24) | (st->buf[9] << 16) |
(st->buf[10] << 8) | st->buf[11];
if (fwtype != NULL)
*fwtype = (st->buf[12] << 24) | (st->buf[13] << 16) |
(st->buf[14] << 8) | st->buf[15];
mutex_unlock(&d->usb_mutex);
return ret;
}
/* expecting rx buffer: request data[0] data[1] ... data[2] */
static int dib0700_ctrl_wr(struct dvb_usb_device *d, u8 *tx, u8 txlen)
{
int status;
deb_data(">>> ");
debug_dump(tx, txlen, deb_data);
status = usb_control_msg(d->udev, usb_sndctrlpipe(d->udev,0),
tx[0], USB_TYPE_VENDOR | USB_DIR_OUT, 0, 0, tx, txlen,
USB_CTRL_GET_TIMEOUT);
if (status != txlen)
deb_data("ep 0 write error (status = %d, len: %d)\n",status,txlen);
return status < 0 ? status : 0;
}
/* expecting tx buffer: request data[0] ... data[n] (n <= 4) */
int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen)
{
u16 index, value;
int status;
if (txlen < 2) {
err("tx buffer length is smaller than 2. Makes no sense.");
return -EINVAL;
}
if (txlen > 4) {
err("tx buffer length is larger than 4. Not supported.");
return -EINVAL;
}
deb_data(">>> ");
debug_dump(tx,txlen,deb_data);
value = ((txlen - 2) << 8) | tx[1];
index = 0;
if (txlen > 2)
index |= (tx[2] << 8);
if (txlen > 3)
index |= tx[3];
status = usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev,0), tx[0],
USB_TYPE_VENDOR | USB_DIR_IN, value, index, rx, rxlen,
USB_CTRL_GET_TIMEOUT);
if (status < 0)
deb_info("ep 0 read error (status = %d)\n",status);
deb_data("<<< ");
debug_dump(rx, rxlen, deb_data);
return status; /* length in case of success */
}
int dib0700_set_gpio(struct dvb_usb_device *d, enum dib07x0_gpios gpio, u8 gpio_dir, u8 gpio_val)
{
struct dib0700_state *st = d->priv;
int ret;
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
return -EINTR;
}
st->buf[0] = REQUEST_SET_GPIO;
st->buf[1] = gpio;
st->buf[2] = ((gpio_dir & 0x01) << 7) | ((gpio_val & 0x01) << 6);
ret = dib0700_ctrl_wr(d, st->buf, 3);
mutex_unlock(&d->usb_mutex);
return ret;
}
static int dib0700_set_usb_xfer_len(struct dvb_usb_device *d, u16 nb_ts_packets)
{
struct dib0700_state *st = d->priv;
int ret;
if (st->fw_version >= 0x10201) {
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
return -EINTR;
}
st->buf[0] = REQUEST_SET_USB_XFER_LEN;
st->buf[1] = (nb_ts_packets >> 8) & 0xff;
st->buf[2] = nb_ts_packets & 0xff;
deb_info("set the USB xfer len to %i Ts packet\n", nb_ts_packets);
ret = dib0700_ctrl_wr(d, st->buf, 3);
mutex_unlock(&d->usb_mutex);
} else {
deb_info("this firmware does not allow to change the USB xfer len\n");
ret = -EIO;
}
return ret;
}
/*
* I2C master xfer function (supported in 1.20 firmware)
*/
static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,
int num)
{
/* The new i2c firmware messages are more reliable and in particular
properly support i2c read calls not preceded by a write */
struct dvb_usb_device *d = i2c_get_adapdata(adap);
struct dib0700_state *st = d->priv;
uint8_t bus_mode = 1; /* 0=eeprom bus, 1=frontend bus */
uint8_t gen_mode = 0; /* 0=master i2c, 1=gpio i2c */
uint8_t en_start = 0;
uint8_t en_stop = 0;
int result, i;
/* Ensure nobody else hits the i2c bus while we're sending our
sequence of messages, (such as the remote control thread) */
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EINTR;
for (i = 0; i < num; i++) {
if (i == 0) {
/* First message in the transaction */
en_start = 1;
} else if (!(msg[i].flags & I2C_M_NOSTART)) {
/* Device supports repeated-start */
en_start = 1;
} else {
/* Not the first packet and device doesn't support
repeated start */
en_start = 0;
}
if (i == (num - 1)) {
/* Last message in the transaction */
en_stop = 1;
}
if (msg[i].flags & I2C_M_RD) {
/* Read request */
u16 index, value;
uint8_t i2c_dest;
i2c_dest = (msg[i].addr << 1);
value = ((en_start << 7) | (en_stop << 6) |
(msg[i].len & 0x3F)) << 8 | i2c_dest;
/* I2C ctrl + FE bus; */
index = ((gen_mode << 6) & 0xC0) |
((bus_mode << 4) & 0x30);
result = usb_control_msg(d->udev,
usb_rcvctrlpipe(d->udev, 0),
REQUEST_NEW_I2C_READ,
USB_TYPE_VENDOR | USB_DIR_IN,
value, index, st->buf,
msg[i].len,
USB_CTRL_GET_TIMEOUT);
if (result < 0) {
deb_info("i2c read error (status = %d)\n", result);
goto unlock;
}
if (msg[i].len > sizeof(st->buf)) {
deb_info("buffer too small to fit %d bytes\n",
msg[i].len);
result = -EIO;
goto unlock;
}
memcpy(msg[i].buf, st->buf, msg[i].len);
deb_data("<<< ");
debug_dump(msg[i].buf, msg[i].len, deb_data);
} else {
/* Write request */
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
result = -EINTR;
goto unlock;
}
st->buf[0] = REQUEST_NEW_I2C_WRITE;
st->buf[1] = msg[i].addr << 1;
st->buf[2] = (en_start << 7) | (en_stop << 6) |
(msg[i].len & 0x3F);
/* I2C ctrl + FE bus; */
st->buf[3] = ((gen_mode << 6) & 0xC0) |
((bus_mode << 4) & 0x30);
if (msg[i].len > sizeof(st->buf) - 4) {
deb_info("i2c message to big: %d\n",
msg[i].len);
mutex_unlock(&d->usb_mutex);
result = -EIO;
goto unlock;
}
/* The Actual i2c payload */
memcpy(&st->buf[4], msg[i].buf, msg[i].len);
deb_data(">>> ");
debug_dump(st->buf, msg[i].len + 4, deb_data);
result = usb_control_msg(d->udev,
usb_sndctrlpipe(d->udev, 0),
REQUEST_NEW_I2C_WRITE,
USB_TYPE_VENDOR | USB_DIR_OUT,
0, 0, st->buf, msg[i].len + 4,
USB_CTRL_GET_TIMEOUT);
mutex_unlock(&d->usb_mutex);
if (result < 0) {
deb_info("i2c write error (status = %d)\n", result);
break;
}
}
}
result = i;
unlock:
mutex_unlock(&d->i2c_mutex);
return result;
}
/*
* I2C master xfer function (pre-1.20 firmware)
*/
static int dib0700_i2c_xfer_legacy(struct i2c_adapter *adap,
struct i2c_msg *msg, int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
struct dib0700_state *st = d->priv;
int i, len, result;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EINTR;
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
mutex_unlock(&d->i2c_mutex);
return -EINTR;
}
for (i = 0; i < num; i++) {
/* fill in the address */
st->buf[1] = msg[i].addr << 1;
/* fill the buffer */
if (msg[i].len > sizeof(st->buf) - 2) {
deb_info("i2c xfer to big: %d\n",
msg[i].len);
result = -EIO;
goto unlock;
}
memcpy(&st->buf[2], msg[i].buf, msg[i].len);
/* write/read request */
if (i+1 < num && (msg[i+1].flags & I2C_M_RD)) {
st->buf[0] = REQUEST_I2C_READ;
st->buf[1] |= 1;
/* special thing in the current firmware: when length is zero the read-failed */
len = dib0700_ctrl_rd(d, st->buf, msg[i].len + 2,
st->buf, msg[i + 1].len);
if (len <= 0) {
deb_info("I2C read failed on address 0x%02x\n",
msg[i].addr);
result = -EIO;
goto unlock;
}
if (msg[i + 1].len > sizeof(st->buf)) {
deb_info("i2c xfer buffer to small for %d\n",
msg[i].len);
result = -EIO;
goto unlock;
}
memcpy(msg[i + 1].buf, st->buf, msg[i + 1].len);
msg[i+1].len = len;
i++;
} else {
st->buf[0] = REQUEST_I2C_WRITE;
result = dib0700_ctrl_wr(d, st->buf, msg[i].len + 2);
if (result < 0)
goto unlock;
}
}
result = i;
unlock:
mutex_unlock(&d->usb_mutex);
mutex_unlock(&d->i2c_mutex);
return result;
}
static int dib0700_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
struct dib0700_state *st = d->priv;
if (st->fw_use_new_i2c_api == 1) {
/* User running at least fw 1.20 */
return dib0700_i2c_xfer_new(adap, msg, num);
} else {
/* Use legacy calls */
return dib0700_i2c_xfer_legacy(adap, msg, num);
}
}
static u32 dib0700_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
struct i2c_algorithm dib0700_i2c_algo = {
.master_xfer = dib0700_i2c_xfer,
.functionality = dib0700_i2c_func,
};
int dib0700_identify_state(struct usb_device *udev,
const struct dvb_usb_device_properties *props,
const struct dvb_usb_device_description **desc,
int *cold)
{
s16 ret;
u8 *b;
b = kmalloc(16, GFP_KERNEL);
if (!b)
return -ENOMEM;
ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
REQUEST_GET_VERSION, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, b, 16, USB_CTRL_GET_TIMEOUT);
deb_info("FW GET_VERSION length: %d\n",ret);
*cold = ret <= 0;
deb_info("cold: %d\n", *cold);
kfree(b);
return 0;
}
static int dib0700_set_clock(struct dvb_usb_device *d, u8 en_pll,
u8 pll_src, u8 pll_range, u8 clock_gpio3, u16 pll_prediv,
u16 pll_loopdiv, u16 free_div, u16 dsuScaler)
{
struct dib0700_state *st = d->priv;
int ret;
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
return -EINTR;
}
st->buf[0] = REQUEST_SET_CLOCK;
st->buf[1] = (en_pll << 7) | (pll_src << 6) |
(pll_range << 5) | (clock_gpio3 << 4);
st->buf[2] = (pll_prediv >> 8) & 0xff; /* MSB */
st->buf[3] = pll_prediv & 0xff; /* LSB */
st->buf[4] = (pll_loopdiv >> 8) & 0xff; /* MSB */
st->buf[5] = pll_loopdiv & 0xff; /* LSB */
st->buf[6] = (free_div >> 8) & 0xff; /* MSB */
st->buf[7] = free_div & 0xff; /* LSB */
st->buf[8] = (dsuScaler >> 8) & 0xff; /* MSB */
st->buf[9] = dsuScaler & 0xff; /* LSB */
ret = dib0700_ctrl_wr(d, st->buf, 10);
mutex_unlock(&d->usb_mutex);
return ret;
}
int dib0700_set_i2c_speed(struct dvb_usb_device *d, u16 scl_kHz)
{
struct dib0700_state *st = d->priv;
u16 divider;
int ret;
if (scl_kHz == 0)
return -EINVAL;
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
return -EINTR;
}
st->buf[0] = REQUEST_SET_I2C_PARAM;
divider = (u16) (30000 / scl_kHz);
st->buf[1] = 0;
st->buf[2] = (u8) (divider >> 8);
st->buf[3] = (u8) (divider & 0xff);
divider = (u16) (72000 / scl_kHz);
st->buf[4] = (u8) (divider >> 8);
st->buf[5] = (u8) (divider & 0xff);
divider = (u16) (72000 / scl_kHz); /* clock: 72MHz */
st->buf[6] = (u8) (divider >> 8);
st->buf[7] = (u8) (divider & 0xff);
deb_info("setting I2C speed: %04x %04x %04x (%d kHz).",
(st->buf[2] << 8) | (st->buf[3]), (st->buf[4] << 8) |
st->buf[5], (st->buf[6] << 8) | st->buf[7], scl_kHz);
ret = dib0700_ctrl_wr(d, st->buf, 8);
mutex_unlock(&d->usb_mutex);
return ret;
}
int dib0700_ctrl_clock(struct dvb_usb_device *d, u32 clk_MHz, u8 clock_out_gp3)
{
switch (clk_MHz) {
case 72: dib0700_set_clock(d, 1, 0, 1, clock_out_gp3, 2, 24, 0, 0x4c); break;
default: return -EINVAL;
}
return 0;
}
static int dib0700_jumpram(struct usb_device *udev, u32 address)
{
int ret = 0, actlen;
u8 *buf;
buf = kmalloc(8, GFP_KERNEL);
if (!buf)
return -ENOMEM;
buf[0] = REQUEST_JUMPRAM;
buf[1] = 0;
buf[2] = 0;
buf[3] = 0;
buf[4] = (address >> 24) & 0xff;
buf[5] = (address >> 16) & 0xff;
buf[6] = (address >> 8) & 0xff;
buf[7] = address & 0xff;
if ((ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, 0x01),buf,8,&actlen,1000)) < 0) {
deb_fw("jumpram to 0x%x failed\n",address);
goto out;
}
if (actlen != 8) {
deb_fw("jumpram to 0x%x failed\n",address);
ret = -EIO;
goto out;
}
out:
kfree(buf);
return ret;
}
int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw)
{
struct hexline hx;
int pos = 0, ret, act_len, i, adap_num;
u8 *buf;
u32 fw_version;
buf = kmalloc(260, GFP_KERNEL);
if (!buf)
return -ENOMEM;
while ((ret = dvb_usb_get_hexline(fw, &hx, &pos)) > 0) {
deb_fwdata("writing to address 0x%08x (buffer: 0x%02x %02x)\n",
hx.addr, hx.len, hx.chk);
buf[0] = hx.len;
buf[1] = (hx.addr >> 8) & 0xff;
buf[2] = hx.addr & 0xff;
buf[3] = hx.type;
memcpy(&buf[4],hx.data,hx.len);
buf[4+hx.len] = hx.chk;
ret = usb_bulk_msg(udev,
usb_sndbulkpipe(udev, 0x01),
buf,
hx.len + 5,
&act_len,
1000);
if (ret < 0) {
err("firmware download failed at %d with %d",pos,ret);
goto out;
}
}
if (ret == 0) {
/* start the firmware */
if ((ret = dib0700_jumpram(udev, 0x70000000)) == 0) {
info("firmware started successfully.");
msleep(500);
}
} else
ret = -EIO;
/* the number of ts packet has to be at least 1 */
if (nb_packet_buffer_size < 1)
nb_packet_buffer_size = 1;
/* get the firmware version */
usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
REQUEST_GET_VERSION,
USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
buf, 16, USB_CTRL_GET_TIMEOUT);
fw_version = (buf[8] << 24) | (buf[9] << 16) | (buf[10] << 8) | buf[11];
/* set the buffer size - DVB-USB is allocating URB buffers
* only after the firwmare download was successful */
for (i = 0; i < dib0700_device_count; i++) {
for (adap_num = 0; adap_num < dib0700_devices[i].num_adapters;
adap_num++) {
if (fw_version >= 0x10201) {
dib0700_devices[i].adapter[adap_num].fe[0].stream.u.bulk.buffersize = 188*nb_packet_buffer_size;
} else {
/* for fw version older than 1.20.1,
* the buffersize has to be n times 512 */
dib0700_devices[i].adapter[adap_num].fe[0].stream.u.bulk.buffersize = ((188*nb_packet_buffer_size+188/2)/512)*512;
if (dib0700_devices[i].adapter[adap_num].fe[0].stream.u.bulk.buffersize < 512)
dib0700_devices[i].adapter[adap_num].fe[0].stream.u.bulk.buffersize = 512;
}
}
}
out:
kfree(buf);
return ret;
}
int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
struct dib0700_state *st = adap->dev->priv;
int ret, adapt_nr;
if ((onoff != 0) && (st->fw_version >= 0x10201)) {
/* for firmware later than 1.20.1,
* the USB xfer length can be set */
ret = dib0700_set_usb_xfer_len(adap->dev,
st->nb_packet_buffer_size);
if (ret < 0) {
deb_info("can not set the USB xfer len\n");
return ret;
}
}
mutex_lock(&adap->dev->usb_mutex);
st->buf[0] = REQUEST_ENABLE_VIDEO;
/* this bit gives a kind of command,
* rather than enabling something or not */
st->buf[1] = (onoff << 4) | 0x00;
if (st->disable_streaming_master_mode == 1)
st->buf[2] = 0x00;
else
st->buf[2] = 0x01 << 4; /* Master mode */
st->buf[3] = 0x00;
if ((adap->fe_adap[0].stream.props.endpoint != 2)
&& (adap->fe_adap[0].stream.props.endpoint != 3)) {
deb_info("the endpoint number (%i) is not correct, use the adapter id instead\n",
adap->fe_adap[0].stream.props.endpoint);
adapt_nr = adap->id;
} else {
adapt_nr = adap->fe_adap[0].stream.props.endpoint - 2;
}
if (onoff)
st->channel_state |= 1 << adapt_nr;
else
st->channel_state &= ~(1 << adapt_nr);
st->buf[2] |= st->channel_state;
deb_info("adapter %d, streaming %s: %*ph\n",
adapt_nr, onoff ? "ON" : "OFF", 3, st->buf);
ret = dib0700_ctrl_wr(adap->dev, st->buf, 4);
mutex_unlock(&adap->dev->usb_mutex);
return ret;
}
int dib0700_change_protocol(struct rc_dev *rc, u64 *rc_proto)
{
struct dvb_usb_device *d = rc->priv;
struct dib0700_state *st = d->priv;
int new_proto, ret;
if (mutex_lock_interruptible(&d->usb_mutex) < 0) {
err("could not acquire lock");
return -EINTR;
}
st->buf[0] = REQUEST_SET_RC;
st->buf[1] = 0;
st->buf[2] = 0;
/* Set the IR mode */
if (*rc_proto & RC_PROTO_BIT_RC5) {
new_proto = 1;
*rc_proto = RC_PROTO_BIT_RC5;
} else if (*rc_proto & RC_PROTO_BIT_NEC) {
new_proto = 0;
*rc_proto = RC_PROTO_BIT_NEC;
} else if (*rc_proto & RC_PROTO_BIT_RC6_MCE) {
if (st->fw_version < 0x10200) {
ret = -EINVAL;
goto out;
}
new_proto = 2;
*rc_proto = RC_PROTO_BIT_RC6_MCE;
} else {
ret = -EINVAL;
goto out;
}
st->buf[1] = new_proto;
ret = dib0700_ctrl_wr(d, st->buf, 3);
if (ret < 0) {
err("ir protocol setup failed");
goto out;
}
d->props.rc.core.protocol = *rc_proto;
out:
mutex_unlock(&d->usb_mutex);
return ret;
}
/* This is the structure of the RC response packet starting in firmware 1.20 */
struct dib0700_rc_response {
u8 report_id;
u8 data_state;
union {
struct {
u8 system;
u8 not_system;
u8 data;
u8 not_data;
} nec;
struct {
u8 not_used;
u8 system;
u8 data;
u8 not_data;
} rc5;
};
};
#define RC_MSG_SIZE_V1_20 6
static void dib0700_rc_urb_completion(struct urb *purb)
{
struct dvb_usb_device *d = purb->context;
struct dib0700_rc_response *poll_reply;
enum rc_proto protocol;
u32 keycode;
u8 toggle;
deb_info("%s()\n", __func__);
if (d->rc_dev == NULL) {
/* This will occur if disable_rc_polling=1 */
kfree(purb->transfer_buffer);
usb_free_urb(purb);
return;
}
poll_reply = purb->transfer_buffer;
if (purb->status < 0) {
deb_info("discontinuing polling\n");
kfree(purb->transfer_buffer);
usb_free_urb(purb);
return;
}
if (purb->actual_length != RC_MSG_SIZE_V1_20) {
deb_info("malformed rc msg size=%d\n", purb->actual_length);
goto resubmit;
}
deb_data("IR ID = %02X state = %02X System = %02X %02X Cmd = %02X %02X (len %d)\n",
poll_reply->report_id, poll_reply->data_state,
poll_reply->nec.system, poll_reply->nec.not_system,
poll_reply->nec.data, poll_reply->nec.not_data,
purb->actual_length);
switch (d->props.rc.core.protocol) {
case RC_PROTO_BIT_NEC:
toggle = 0;
/* NEC protocol sends repeat code as 0 0 0 FF */
if (poll_reply->nec.system == 0x00 &&
poll_reply->nec.not_system == 0x00 &&
poll_reply->nec.data == 0x00 &&
poll_reply->nec.not_data == 0xff) {
poll_reply->data_state = 2;
rc_repeat(d->rc_dev);
goto resubmit;
}
if ((poll_reply->nec.data ^ poll_reply->nec.not_data) != 0xff) {
deb_data("NEC32 protocol\n");
keycode = RC_SCANCODE_NEC32(poll_reply->nec.system << 24 |
poll_reply->nec.not_system << 16 |
poll_reply->nec.data << 8 |
poll_reply->nec.not_data);
protocol = RC_PROTO_NEC32;
} else if ((poll_reply->nec.system ^ poll_reply->nec.not_system) != 0xff) {
deb_data("NEC extended protocol\n");
keycode = RC_SCANCODE_NECX(poll_reply->nec.system << 8 |
poll_reply->nec.not_system,
poll_reply->nec.data);
protocol = RC_PROTO_NECX;
} else {
deb_data("NEC normal protocol\n");
keycode = RC_SCANCODE_NEC(poll_reply->nec.system,
poll_reply->nec.data);
protocol = RC_PROTO_NEC;
}
break;
default:
deb_data("RC5 protocol\n");
protocol = RC_PROTO_RC5;
toggle = poll_reply->report_id;
keycode = RC_SCANCODE_RC5(poll_reply->rc5.system, poll_reply->rc5.data);
if ((poll_reply->rc5.data ^ poll_reply->rc5.not_data) != 0xff) {
/* Key failed integrity check */
err("key failed integrity check: %02x %02x %02x %02x",
poll_reply->rc5.not_used, poll_reply->rc5.system,
poll_reply->rc5.data, poll_reply->rc5.not_data);
goto resubmit;
}
break;
}
rc_keydown(d->rc_dev, protocol, keycode, toggle);
resubmit:
/* Clean the buffer before we requeue */
memset(purb->transfer_buffer, 0, RC_MSG_SIZE_V1_20);
/* Requeue URB */
usb_submit_urb(purb, GFP_ATOMIC);
}
int dib0700_rc_setup(struct dvb_usb_device *d, struct usb_interface *intf)
{
struct dib0700_state *st = d->priv;
struct urb *purb;
const struct usb_endpoint_descriptor *e;
int ret, rc_ep = 1;
unsigned int pipe = 0;
/* Poll-based. Don't initialize bulk mode */
if (st->fw_version < 0x10200 || !intf)
return 0;
/* Starting in firmware 1.20, the RC info is provided on a bulk pipe */
if (intf->cur_altsetting->desc.bNumEndpoints < rc_ep + 1)
return -ENODEV;
purb = usb_alloc_urb(0, GFP_KERNEL);
if (purb == NULL)
return -ENOMEM;
purb->transfer_buffer = kzalloc(RC_MSG_SIZE_V1_20, GFP_KERNEL);
if (purb->transfer_buffer == NULL) {
err("rc kzalloc failed");
usb_free_urb(purb);
return -ENOMEM;
}
purb->status = -EINPROGRESS;
/*
* Some devices like the Hauppauge NovaTD model 52009 use an interrupt
* endpoint, while others use a bulk one.
*/
e = &intf->cur_altsetting->endpoint[rc_ep].desc;
if (usb_endpoint_dir_in(e)) {
if (usb_endpoint_xfer_bulk(e)) {
pipe = usb_rcvbulkpipe(d->udev, rc_ep);
usb_fill_bulk_urb(purb, d->udev, pipe,
purb->transfer_buffer,
RC_MSG_SIZE_V1_20,
dib0700_rc_urb_completion, d);
} else if (usb_endpoint_xfer_int(e)) {
pipe = usb_rcvintpipe(d->udev, rc_ep);
usb_fill_int_urb(purb, d->udev, pipe,
purb->transfer_buffer,
RC_MSG_SIZE_V1_20,
dib0700_rc_urb_completion, d, 1);
}
}
if (!pipe) {
err("There's no endpoint for remote controller");
kfree(purb->transfer_buffer);
usb_free_urb(purb);
return 0;
}
ret = usb_submit_urb(purb, GFP_ATOMIC);
if (ret) {
err("rc submit urb failed");
kfree(purb->transfer_buffer);
usb_free_urb(purb);
}
return ret;
}
static int dib0700_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
int i;
struct dvb_usb_device *dev;
for (i = 0; i < dib0700_device_count; i++)
if (dvb_usb_device_init(intf, &dib0700_devices[i], THIS_MODULE,
&dev, adapter_nr) == 0) {
struct dib0700_state *st = dev->priv;
u32 hwversion, romversion, fw_version, fwtype;
dib0700_get_version(dev, &hwversion, &romversion,
&fw_version, &fwtype);
deb_info("Firmware version: %x, %d, 0x%x, %d\n",
hwversion, romversion, fw_version, fwtype);
st->fw_version = fw_version;
st->nb_packet_buffer_size = (u32)nb_packet_buffer_size;
/* Disable polling mode on newer firmwares */
if (st->fw_version >= 0x10200)
dev->props.rc.core.bulk_mode = true;
else
dev->props.rc.core.bulk_mode = false;
dib0700_rc_setup(dev, intf);
return 0;
}
return -ENODEV;
}
static void dib0700_disconnect(struct usb_interface *intf)
{
struct dvb_usb_device *d = usb_get_intfdata(intf);
struct dib0700_state *st = d->priv;
struct i2c_client *client;
/* remove I2C client for tuner */
client = st->i2c_client_tuner;
if (client) {
module_put(client->dev.driver->owner);
i2c_unregister_device(client);
}
/* remove I2C client for demodulator */
client = st->i2c_client_demod;
if (client) {
module_put(client->dev.driver->owner);
i2c_unregister_device(client);
}
dvb_usb_device_exit(intf);
}
static struct usb_driver dib0700_driver = {
.name = "dvb_usb_dib0700",
.probe = dib0700_probe,
.disconnect = dib0700_disconnect,
.id_table = dib0700_usb_id_table,
};
module_usb_driver(dib0700_driver);
MODULE_FIRMWARE("dvb-usb-dib0700-1.20.fw");
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for devices based on DiBcom DiB0700 - USB bridge");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/dib0700_core.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant linux driver for Technotrend DVB USB boxes and clones
* (e.g. Pinnacle 400e DVB-S USB2.0).
*
* The Pinnacle 400e uses the same protocol as the Technotrend USB1.1 boxes.
*
* TDA8263 + TDA10086
*
* I2C addresses:
* 0x08 - LNBP21PD - LNB power supply
* 0x0e - TDA10086 - Demodulator
* 0x50 - FX2 eeprom
* 0x60 - TDA8263 - Tuner
* 0x78 ???
*
* Copyright (c) 2002 Holger Waechtler <[email protected]>
* Copyright (c) 2003 Felix Domke <[email protected]>
* Copyright (C) 2005-6 Patrick Boettcher <[email protected]>
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#define DVB_USB_LOG_PREFIX "ttusb2"
#include "dvb-usb.h"
#include "ttusb2.h"
#include "tda826x.h"
#include "tda10086.h"
#include "tda1002x.h"
#include "tda10048.h"
#include "tda827x.h"
#include "lnbp21.h"
/* CA */
#include <media/dvb_ca_en50221.h>
/* debug */
static int dvb_usb_ttusb2_debug;
#define deb_info(args...) dprintk(dvb_usb_ttusb2_debug,0x01,args)
module_param_named(debug,dvb_usb_ttusb2_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able))." DVB_USB_DEBUG_STATUS);
static int dvb_usb_ttusb2_debug_ci;
module_param_named(debug_ci,dvb_usb_ttusb2_debug_ci, int, 0644);
MODULE_PARM_DESC(debug_ci, "set debugging ci." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#define ci_dbg(format, arg...) \
do { \
if (dvb_usb_ttusb2_debug_ci) \
printk(KERN_DEBUG DVB_USB_LOG_PREFIX \
": %s " format "\n" , __func__, ## arg); \
} while (0)
enum {
TT3650_CMD_CI_TEST = 0x40,
TT3650_CMD_CI_RD_CTRL,
TT3650_CMD_CI_WR_CTRL,
TT3650_CMD_CI_RD_ATTR,
TT3650_CMD_CI_WR_ATTR,
TT3650_CMD_CI_RESET,
TT3650_CMD_CI_SET_VIDEO_PORT
};
struct ttusb2_state {
struct dvb_ca_en50221 ca;
struct mutex ca_mutex;
u8 id;
u16 last_rc_key;
};
static int ttusb2_msg(struct dvb_usb_device *d, u8 cmd,
u8 *wbuf, int wlen, u8 *rbuf, int rlen)
{
struct ttusb2_state *st = d->priv;
u8 *s, *r = NULL;
int ret = 0;
if (4 + rlen > 64)
return -EIO;
s = kzalloc(wlen+4, GFP_KERNEL);
if (!s)
return -ENOMEM;
r = kzalloc(64, GFP_KERNEL);
if (!r) {
kfree(s);
return -ENOMEM;
}
s[0] = 0xaa;
s[1] = ++st->id;
s[2] = cmd;
s[3] = wlen;
memcpy(&s[4],wbuf,wlen);
ret = dvb_usb_generic_rw(d, s, wlen+4, r, 64, 0);
if (ret != 0 ||
r[0] != 0x55 ||
r[1] != s[1] ||
r[2] != cmd ||
(rlen > 0 && r[3] != rlen)) {
warn("there might have been an error during control message transfer. (rlen = %d, was %d)",rlen,r[3]);
kfree(s);
kfree(r);
return -EIO;
}
if (rlen > 0)
memcpy(rbuf, &r[4], rlen);
kfree(s);
kfree(r);
return 0;
}
/* ci */
static int tt3650_ci_msg(struct dvb_usb_device *d, u8 cmd, u8 *data, unsigned int write_len, unsigned int read_len)
{
int ret;
u8 rx[60];/* (64 -4) */
ret = ttusb2_msg(d, cmd, data, write_len, rx, read_len);
if (!ret)
memcpy(data, rx, read_len);
return ret;
}
static int tt3650_ci_msg_locked(struct dvb_ca_en50221 *ca, u8 cmd, u8 *data, unsigned int write_len, unsigned int read_len)
{
struct dvb_usb_device *d = ca->data;
struct ttusb2_state *state = d->priv;
int ret;
mutex_lock(&state->ca_mutex);
ret = tt3650_ci_msg(d, cmd, data, write_len, read_len);
mutex_unlock(&state->ca_mutex);
return ret;
}
static int tt3650_ci_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
{
u8 buf[3];
int ret = 0;
if (slot)
return -EINVAL;
buf[0] = (address >> 8) & 0x0F;
buf[1] = address;
ret = tt3650_ci_msg_locked(ca, TT3650_CMD_CI_RD_ATTR, buf, 2, 3);
ci_dbg("%04x -> %d 0x%02x", address, ret, buf[2]);
if (ret < 0)
return ret;
return buf[2];
}
static int tt3650_ci_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
{
u8 buf[3];
ci_dbg("%d 0x%04x 0x%02x", slot, address, value);
if (slot)
return -EINVAL;
buf[0] = (address >> 8) & 0x0F;
buf[1] = address;
buf[2] = value;
return tt3650_ci_msg_locked(ca, TT3650_CMD_CI_WR_ATTR, buf, 3, 3);
}
static int tt3650_ci_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
{
u8 buf[2];
int ret;
if (slot)
return -EINVAL;
buf[0] = address & 3;
ret = tt3650_ci_msg_locked(ca, TT3650_CMD_CI_RD_CTRL, buf, 1, 2);
ci_dbg("0x%02x -> %d 0x%02x", address, ret, buf[1]);
if (ret < 0)
return ret;
return buf[1];
}
static int tt3650_ci_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
{
u8 buf[2];
ci_dbg("%d 0x%02x 0x%02x", slot, address, value);
if (slot)
return -EINVAL;
buf[0] = address;
buf[1] = value;
return tt3650_ci_msg_locked(ca, TT3650_CMD_CI_WR_CTRL, buf, 2, 2);
}
static int tt3650_ci_set_video_port(struct dvb_ca_en50221 *ca, int slot, int enable)
{
u8 buf[1];
int ret;
ci_dbg("%d %d", slot, enable);
if (slot)
return -EINVAL;
buf[0] = enable;
ret = tt3650_ci_msg_locked(ca, TT3650_CMD_CI_SET_VIDEO_PORT, buf, 1, 1);
if (ret < 0)
return ret;
if (enable != buf[0]) {
err("CI not %sabled.", enable ? "en" : "dis");
return -EIO;
}
return 0;
}
static int tt3650_ci_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
{
return tt3650_ci_set_video_port(ca, slot, 0);
}
static int tt3650_ci_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
{
return tt3650_ci_set_video_port(ca, slot, 1);
}
static int tt3650_ci_slot_reset(struct dvb_ca_en50221 *ca, int slot)
{
struct dvb_usb_device *d = ca->data;
struct ttusb2_state *state = d->priv;
u8 buf[1];
int ret;
ci_dbg("%d", slot);
if (slot)
return -EINVAL;
buf[0] = 0;
mutex_lock(&state->ca_mutex);
ret = tt3650_ci_msg(d, TT3650_CMD_CI_RESET, buf, 1, 1);
if (ret)
goto failed;
msleep(500);
buf[0] = 1;
ret = tt3650_ci_msg(d, TT3650_CMD_CI_RESET, buf, 1, 1);
if (ret)
goto failed;
msleep(500);
buf[0] = 0; /* FTA */
ret = tt3650_ci_msg(d, TT3650_CMD_CI_SET_VIDEO_PORT, buf, 1, 1);
msleep(1100);
failed:
mutex_unlock(&state->ca_mutex);
return ret;
}
static int tt3650_ci_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
{
u8 buf[1];
int ret;
if (slot)
return -EINVAL;
ret = tt3650_ci_msg_locked(ca, TT3650_CMD_CI_TEST, buf, 0, 1);
if (ret)
return ret;
if (1 == buf[0]) {
return DVB_CA_EN50221_POLL_CAM_PRESENT |
DVB_CA_EN50221_POLL_CAM_READY;
}
return 0;
}
static void tt3650_ci_uninit(struct dvb_usb_device *d)
{
struct ttusb2_state *state;
ci_dbg("");
if (NULL == d)
return;
state = d->priv;
if (NULL == state)
return;
if (NULL == state->ca.data)
return;
dvb_ca_en50221_release(&state->ca);
memset(&state->ca, 0, sizeof(state->ca));
}
static int tt3650_ci_init(struct dvb_usb_adapter *a)
{
struct dvb_usb_device *d = a->dev;
struct ttusb2_state *state = d->priv;
int ret;
ci_dbg("");
mutex_init(&state->ca_mutex);
state->ca.owner = THIS_MODULE;
state->ca.read_attribute_mem = tt3650_ci_read_attribute_mem;
state->ca.write_attribute_mem = tt3650_ci_write_attribute_mem;
state->ca.read_cam_control = tt3650_ci_read_cam_control;
state->ca.write_cam_control = tt3650_ci_write_cam_control;
state->ca.slot_reset = tt3650_ci_slot_reset;
state->ca.slot_shutdown = tt3650_ci_slot_shutdown;
state->ca.slot_ts_enable = tt3650_ci_slot_ts_enable;
state->ca.poll_slot_status = tt3650_ci_poll_slot_status;
state->ca.data = d;
ret = dvb_ca_en50221_init(&a->dvb_adap,
&state->ca,
/* flags */ 0,
/* n_slots */ 1);
if (ret) {
err("Cannot initialize CI: Error %d.", ret);
memset(&state->ca, 0, sizeof(state->ca));
return ret;
}
info("CI initialized.");
return 0;
}
static int ttusb2_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
static u8 obuf[60], ibuf[60];
int i, write_read, read;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EAGAIN;
if (num > 2)
warn("more than 2 i2c messages at a time is not handled yet. TODO.");
for (i = 0; i < num; i++) {
write_read = i+1 < num && (msg[i+1].flags & I2C_M_RD);
read = msg[i].flags & I2C_M_RD;
if (3 + msg[i].len > sizeof(obuf)) {
err("i2c wr len=%d too high", msg[i].len);
break;
}
if (write_read) {
if (3 + msg[i+1].len > sizeof(ibuf)) {
err("i2c rd len=%d too high", msg[i+1].len);
break;
}
} else if (read) {
if (3 + msg[i].len > sizeof(ibuf)) {
err("i2c rd len=%d too high", msg[i].len);
break;
}
}
obuf[0] = (msg[i].addr << 1) | (write_read | read);
if (read)
obuf[1] = 0;
else
obuf[1] = msg[i].len;
/* read request */
if (write_read)
obuf[2] = msg[i+1].len;
else if (read)
obuf[2] = msg[i].len;
else
obuf[2] = 0;
memcpy(&obuf[3], msg[i].buf, msg[i].len);
if (ttusb2_msg(d, CMD_I2C_XFER, obuf, obuf[1]+3, ibuf, obuf[2] + 3) < 0) {
err("i2c transfer failed.");
break;
}
if (write_read) {
memcpy(msg[i+1].buf, &ibuf[3], msg[i+1].len);
i++;
} else if (read)
memcpy(msg[i].buf, &ibuf[3], msg[i].len);
}
mutex_unlock(&d->i2c_mutex);
return i;
}
static u32 ttusb2_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
static struct i2c_algorithm ttusb2_i2c_algo = {
.master_xfer = ttusb2_i2c_xfer,
.functionality = ttusb2_i2c_func,
};
/* command to poll IR receiver (copied from pctv452e.c) */
#define CMD_GET_IR_CODE 0x1b
/* IR */
static int tt3650_rc_query(struct dvb_usb_device *d)
{
int ret;
u8 rx[9]; /* A CMD_GET_IR_CODE reply is 9 bytes long */
struct ttusb2_state *st = d->priv;
ret = ttusb2_msg(d, CMD_GET_IR_CODE, NULL, 0, rx, sizeof(rx));
if (ret != 0)
return ret;
if (rx[8] & 0x01) {
/* got a "press" event */
st->last_rc_key = RC_SCANCODE_RC5(rx[3], rx[2]);
deb_info("%s: cmd=0x%02x sys=0x%02x\n", __func__, rx[2], rx[3]);
rc_keydown(d->rc_dev, RC_PROTO_RC5, st->last_rc_key, rx[1]);
} else if (st->last_rc_key) {
rc_keyup(d->rc_dev);
st->last_rc_key = 0;
}
return 0;
}
/* Callbacks for DVB USB */
static int ttusb2_identify_state(struct usb_device *udev,
const struct dvb_usb_device_properties *props,
const struct dvb_usb_device_description **desc,
int *cold)
{
*cold = udev->descriptor.iManufacturer == 0 && udev->descriptor.iProduct == 0;
return 0;
}
static int ttusb2_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 b = onoff;
ttusb2_msg(d, CMD_POWER, &b, 0, NULL, 0);
return ttusb2_msg(d, CMD_POWER, &b, 1, NULL, 0);
}
static struct tda10086_config tda10086_config = {
.demod_address = 0x0e,
.invert = 0,
.diseqc_tone = 1,
.xtal_freq = TDA10086_XTAL_16M,
};
static struct tda10023_config tda10023_config = {
.demod_address = 0x0c,
.invert = 0,
.xtal = 16000000,
.pll_m = 11,
.pll_p = 3,
.pll_n = 1,
.deltaf = 0xa511,
};
static struct tda10048_config tda10048_config = {
.demod_address = 0x10 >> 1,
.output_mode = TDA10048_PARALLEL_OUTPUT,
.inversion = TDA10048_INVERSION_ON,
.dtv6_if_freq_khz = TDA10048_IF_4000,
.dtv7_if_freq_khz = TDA10048_IF_4500,
.dtv8_if_freq_khz = TDA10048_IF_5000,
.clk_freq_khz = TDA10048_CLK_16000,
.no_firmware = 1,
.set_pll = true ,
.pll_m = 5,
.pll_n = 3,
.pll_p = 0,
};
static struct tda827x_config tda827x_config = {
.config = 0,
};
static int ttusb2_frontend_tda10086_attach(struct dvb_usb_adapter *adap)
{
if (usb_set_interface(adap->dev->udev,0,3) < 0)
err("set interface to alts=3 failed");
if ((adap->fe_adap[0].fe = dvb_attach(tda10086_attach, &tda10086_config, &adap->dev->i2c_adap)) == NULL) {
deb_info("TDA10086 attach failed\n");
return -ENODEV;
}
return 0;
}
static int ttusb2_ct3650_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
return adap->fe_adap[0].fe->ops.i2c_gate_ctrl(adap->fe_adap[0].fe, enable);
}
static int ttusb2_frontend_tda10023_attach(struct dvb_usb_adapter *adap)
{
if (usb_set_interface(adap->dev->udev, 0, 3) < 0)
err("set interface to alts=3 failed");
if (adap->fe_adap[0].fe == NULL) {
/* FE 0 DVB-C */
adap->fe_adap[0].fe = dvb_attach(tda10023_attach,
&tda10023_config, &adap->dev->i2c_adap, 0x48);
if (adap->fe_adap[0].fe == NULL) {
deb_info("TDA10023 attach failed\n");
return -ENODEV;
}
tt3650_ci_init(adap);
} else {
adap->fe_adap[1].fe = dvb_attach(tda10048_attach,
&tda10048_config, &adap->dev->i2c_adap);
if (adap->fe_adap[1].fe == NULL) {
deb_info("TDA10048 attach failed\n");
return -ENODEV;
}
/* tuner is behind TDA10023 I2C-gate */
adap->fe_adap[1].fe->ops.i2c_gate_ctrl = ttusb2_ct3650_i2c_gate_ctrl;
}
return 0;
}
static int ttusb2_tuner_tda827x_attach(struct dvb_usb_adapter *adap)
{
struct dvb_frontend *fe;
/* MFE: select correct FE to attach tuner since that's called twice */
if (adap->fe_adap[1].fe == NULL)
fe = adap->fe_adap[0].fe;
else
fe = adap->fe_adap[1].fe;
/* attach tuner */
if (dvb_attach(tda827x_attach, fe, 0x61, &adap->dev->i2c_adap, &tda827x_config) == NULL) {
printk(KERN_ERR "%s: No tda827x found!\n", __func__);
return -ENODEV;
}
return 0;
}
static int ttusb2_tuner_tda826x_attach(struct dvb_usb_adapter *adap)
{
if (dvb_attach(tda826x_attach, adap->fe_adap[0].fe, 0x60, &adap->dev->i2c_adap, 0) == NULL) {
deb_info("TDA8263 attach failed\n");
return -ENODEV;
}
if (dvb_attach(lnbp21_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap, 0, 0) == NULL) {
deb_info("LNBP21 attach failed\n");
return -ENODEV;
}
return 0;
}
/* DVB USB Driver stuff */
static struct dvb_usb_device_properties ttusb2_properties;
static struct dvb_usb_device_properties ttusb2_properties_s2400;
static struct dvb_usb_device_properties ttusb2_properties_ct3650;
static void ttusb2_usb_disconnect(struct usb_interface *intf)
{
struct dvb_usb_device *d = usb_get_intfdata(intf);
tt3650_ci_uninit(d);
dvb_usb_device_exit(intf);
}
static int ttusb2_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
if (0 == dvb_usb_device_init(intf, &ttusb2_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &ttusb2_properties_s2400,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &ttusb2_properties_ct3650,
THIS_MODULE, NULL, adapter_nr))
return 0;
return -ENODEV;
}
enum {
PINNACLE_PCTV_400E,
PINNACLE_PCTV_450E,
TECHNOTREND_CONNECT_S2400,
TECHNOTREND_CONNECT_CT3650,
TECHNOTREND_CONNECT_S2400_8KEEPROM,
};
static struct usb_device_id ttusb2_table[] = {
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_400E),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_450E),
DVB_USB_DEV(TECHNOTREND, TECHNOTREND_CONNECT_S2400),
DVB_USB_DEV(TECHNOTREND, TECHNOTREND_CONNECT_CT3650),
DVB_USB_DEV(TECHNOTREND, TECHNOTREND_CONNECT_S2400_8KEEPROM),
{ }
};
MODULE_DEVICE_TABLE (usb, ttusb2_table);
static struct dvb_usb_device_properties ttusb2_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-pctv-400e-01.fw",
.size_of_priv = sizeof(struct ttusb2_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = NULL, // ttusb2_streaming_ctrl,
.frontend_attach = ttusb2_frontend_tda10086_attach,
.tuner_attach = ttusb2_tuner_tda826x_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_ISOC,
.count = 5,
.endpoint = 0x02,
.u = {
.isoc = {
.framesperurb = 4,
.framesize = 940,
.interval = 1,
}
}
}
}},
}
},
.power_ctrl = ttusb2_power_ctrl,
.identify_state = ttusb2_identify_state,
.i2c_algo = &ttusb2_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 2,
.devices = {
{ "Pinnacle 400e DVB-S USB2.0",
{ &ttusb2_table[PINNACLE_PCTV_400E], NULL },
{ NULL },
},
{ "Pinnacle 450e DVB-S USB2.0",
{ &ttusb2_table[PINNACLE_PCTV_450E], NULL },
{ NULL },
},
}
};
static struct dvb_usb_device_properties ttusb2_properties_s2400 = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-tt-s2400-01.fw",
.size_of_priv = sizeof(struct ttusb2_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = NULL,
.frontend_attach = ttusb2_frontend_tda10086_attach,
.tuner_attach = ttusb2_tuner_tda826x_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_ISOC,
.count = 5,
.endpoint = 0x02,
.u = {
.isoc = {
.framesperurb = 4,
.framesize = 940,
.interval = 1,
}
}
}
}},
}
},
.power_ctrl = ttusb2_power_ctrl,
.identify_state = ttusb2_identify_state,
.i2c_algo = &ttusb2_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 2,
.devices = {
{ "Technotrend TT-connect S-2400",
{ &ttusb2_table[TECHNOTREND_CONNECT_S2400], NULL },
{ NULL },
},
{ "Technotrend TT-connect S-2400 (8kB EEPROM)",
{ &ttusb2_table[TECHNOTREND_CONNECT_S2400_8KEEPROM], NULL },
{ NULL },
},
}
};
static struct dvb_usb_device_properties ttusb2_properties_ct3650 = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.size_of_priv = sizeof(struct ttusb2_state),
.rc.core = {
.rc_interval = 150, /* Less than IR_KEYPRESS_TIMEOUT */
.rc_codes = RC_MAP_TT_1500,
.rc_query = tt3650_rc_query,
.allowed_protos = RC_PROTO_BIT_RC5,
},
.num_adapters = 1,
.adapter = {
{
.num_frontends = 2,
.fe = {{
.streaming_ctrl = NULL,
.frontend_attach = ttusb2_frontend_tda10023_attach,
.tuner_attach = ttusb2_tuner_tda827x_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_ISOC,
.count = 5,
.endpoint = 0x02,
.u = {
.isoc = {
.framesperurb = 4,
.framesize = 940,
.interval = 1,
}
}
}
}, {
.streaming_ctrl = NULL,
.frontend_attach = ttusb2_frontend_tda10023_attach,
.tuner_attach = ttusb2_tuner_tda827x_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_ISOC,
.count = 5,
.endpoint = 0x02,
.u = {
.isoc = {
.framesperurb = 4,
.framesize = 940,
.interval = 1,
}
}
}
}},
},
},
.power_ctrl = ttusb2_power_ctrl,
.identify_state = ttusb2_identify_state,
.i2c_algo = &ttusb2_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "Technotrend TT-connect CT-3650",
.warm_ids = { &ttusb2_table[TECHNOTREND_CONNECT_CT3650], NULL },
},
}
};
static struct usb_driver ttusb2_driver = {
.name = "dvb_usb_ttusb2",
.probe = ttusb2_probe,
.disconnect = ttusb2_usb_disconnect,
.id_table = ttusb2_table,
};
module_usb_driver(ttusb2_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for Pinnacle PCTV 400e DVB-S USB2.0");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/ttusb2.c |
// SPDX-License-Identifier: GPL-2.0-only
/* Common methods for dibusb-based-receivers.
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dibusb.h"
MODULE_LICENSE("GPL");
/* 3000MC/P stuff */
// Config Adjacent channels Perf -cal22
static struct dibx000_agc_config dib3000p_mt2060_agc_config = {
.band_caps = BAND_VHF | BAND_UHF,
.setup = (1 << 8) | (5 << 5) | (1 << 4) | (1 << 3) | (0 << 2) | (2 << 0),
.agc1_max = 48497,
.agc1_min = 23593,
.agc2_max = 46531,
.agc2_min = 24904,
.agc1_pt1 = 0x65,
.agc1_pt2 = 0x69,
.agc1_slope1 = 0x51,
.agc1_slope2 = 0x27,
.agc2_pt1 = 0,
.agc2_pt2 = 0x33,
.agc2_slope1 = 0x35,
.agc2_slope2 = 0x37,
};
static struct dib3000mc_config stk3000p_dib3000p_config = {
&dib3000p_mt2060_agc_config,
.max_time = 0x196,
.ln_adc_level = 0x1cc7,
.output_mpeg2_in_188_bytes = 1,
.agc_command1 = 1,
.agc_command2 = 1,
};
static struct dibx000_agc_config dib3000p_panasonic_agc_config = {
.band_caps = BAND_VHF | BAND_UHF,
.setup = (1 << 8) | (5 << 5) | (1 << 4) | (1 << 3) | (0 << 2) | (2 << 0),
.agc1_max = 56361,
.agc1_min = 22282,
.agc2_max = 47841,
.agc2_min = 36045,
.agc1_pt1 = 0x3b,
.agc1_pt2 = 0x6b,
.agc1_slope1 = 0x55,
.agc1_slope2 = 0x1d,
.agc2_pt1 = 0,
.agc2_pt2 = 0x0a,
.agc2_slope1 = 0x95,
.agc2_slope2 = 0x1e,
};
static struct dib3000mc_config mod3000p_dib3000p_config = {
&dib3000p_panasonic_agc_config,
.max_time = 0x51,
.ln_adc_level = 0x1cc7,
.output_mpeg2_in_188_bytes = 1,
.agc_command1 = 1,
.agc_command2 = 1,
};
int dibusb_dib3000mc_frontend_attach(struct dvb_usb_adapter *adap)
{
if (le16_to_cpu(adap->dev->udev->descriptor.idVendor) == USB_VID_LITEON &&
le16_to_cpu(adap->dev->udev->descriptor.idProduct) ==
USB_PID_LITEON_DVB_T_WARM) {
msleep(1000);
}
adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach,
&adap->dev->i2c_adap,
DEFAULT_DIB3000P_I2C_ADDRESS,
&mod3000p_dib3000p_config);
if ((adap->fe_adap[0].fe) == NULL)
adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach,
&adap->dev->i2c_adap,
DEFAULT_DIB3000MC_I2C_ADDRESS,
&mod3000p_dib3000p_config);
if ((adap->fe_adap[0].fe) != NULL) {
if (adap->priv != NULL) {
struct dibusb_state *st = adap->priv;
st->ops.pid_parse = dib3000mc_pid_parse;
st->ops.pid_ctrl = dib3000mc_pid_control;
}
return 0;
}
return -ENODEV;
}
EXPORT_SYMBOL(dibusb_dib3000mc_frontend_attach);
static struct mt2060_config stk3000p_mt2060_config = {
0x60
};
int dibusb_dib3000mc_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dibusb_state *st = adap->priv;
u8 a,b;
u16 if1 = 1220;
struct i2c_adapter *tun_i2c;
// First IF calibration for Liteon Sticks
if (le16_to_cpu(adap->dev->udev->descriptor.idVendor) == USB_VID_LITEON &&
le16_to_cpu(adap->dev->udev->descriptor.idProduct) == USB_PID_LITEON_DVB_T_WARM) {
dibusb_read_eeprom_byte(adap->dev,0x7E,&a);
dibusb_read_eeprom_byte(adap->dev,0x7F,&b);
if (a == 0x00)
if1 += b;
else if (a == 0x80)
if1 -= b;
else
warn("LITE-ON DVB-T: Strange IF1 calibration :%2X %2X\n", a, b);
} else if (le16_to_cpu(adap->dev->udev->descriptor.idVendor) == USB_VID_DIBCOM &&
le16_to_cpu(adap->dev->udev->descriptor.idProduct) == USB_PID_DIBCOM_MOD3001_WARM) {
u8 desc;
dibusb_read_eeprom_byte(adap->dev, 7, &desc);
if (desc == 2) {
a = 127;
do {
dibusb_read_eeprom_byte(adap->dev, a, &desc);
a--;
} while (a > 7 && (desc == 0xff || desc == 0x00));
if (desc & 0x80)
if1 -= (0xff - desc);
else
if1 += desc;
}
}
tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
if (dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk3000p_mt2060_config, if1) == NULL) {
/* not found - use panasonic pll parameters */
if (dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x60, tun_i2c, DVB_PLL_ENV57H1XD5) == NULL)
return -ENOMEM;
} else {
st->mt2060_present = 1;
/* set the correct parameters for the dib3000p */
dib3000mc_set_config(adap->fe_adap[0].fe, &stk3000p_dib3000p_config);
}
return 0;
}
EXPORT_SYMBOL(dibusb_dib3000mc_tuner_attach);
| linux-master | drivers/media/usb/dvb-usb/dibusb-mc-common.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant linux driver for Nebula Electronics uDigiTV DVB-T USB2.0
* receiver
*
* Copyright (C) 2005 Patrick Boettcher ([email protected])
*
* partly based on the SDK published by Nebula Electronics
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "digitv.h"
#include "mt352.h"
#include "nxt6000.h"
/* debug */
static int dvb_usb_digitv_debug;
module_param_named(debug,dvb_usb_digitv_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=rc (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#define deb_rc(args...) dprintk(dvb_usb_digitv_debug,0x01,args)
static int digitv_ctrl_msg(struct dvb_usb_device *d,
u8 cmd, u8 vv, u8 *wbuf, int wlen, u8 *rbuf, int rlen)
{
struct digitv_state *st = d->priv;
int ret, wo;
wo = (rbuf == NULL || rlen == 0); /* write-only */
if (wlen > 4 || rlen > 4)
return -EIO;
memset(st->sndbuf, 0, 7);
memset(st->rcvbuf, 0, 7);
st->sndbuf[0] = cmd;
st->sndbuf[1] = vv;
st->sndbuf[2] = wo ? wlen : rlen;
if (wo) {
memcpy(&st->sndbuf[3], wbuf, wlen);
ret = dvb_usb_generic_write(d, st->sndbuf, 7);
} else {
ret = dvb_usb_generic_rw(d, st->sndbuf, 7, st->rcvbuf, 7, 10);
memcpy(rbuf, &st->rcvbuf[3], rlen);
}
return ret;
}
/* I2C */
static int digitv_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
int i;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EAGAIN;
if (num > 2)
warn("more than 2 i2c messages at a time is not handled yet. TODO.");
for (i = 0; i < num; i++) {
if (msg[i].len < 1) {
i = -EOPNOTSUPP;
break;
}
/* write/read request */
if (i+1 < num && (msg[i+1].flags & I2C_M_RD)) {
if (digitv_ctrl_msg(d, USB_READ_COFDM, msg[i].buf[0], NULL, 0,
msg[i+1].buf,msg[i+1].len) < 0)
break;
i++;
} else
if (digitv_ctrl_msg(d,USB_WRITE_COFDM, msg[i].buf[0],
&msg[i].buf[1],msg[i].len-1,NULL,0) < 0)
break;
}
mutex_unlock(&d->i2c_mutex);
return i;
}
static u32 digitv_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
static struct i2c_algorithm digitv_i2c_algo = {
.master_xfer = digitv_i2c_xfer,
.functionality = digitv_i2c_func,
};
/* Callbacks for DVB USB */
static int digitv_identify_state(struct usb_device *udev,
const struct dvb_usb_device_properties *props,
const struct dvb_usb_device_description **desc,
int *cold)
{
*cold = udev->descriptor.iManufacturer == 0 && udev->descriptor.iProduct == 0;
return 0;
}
static int digitv_mt352_demod_init(struct dvb_frontend *fe)
{
static u8 reset_buf[] = { 0x89, 0x38, 0x8a, 0x2d, 0x50, 0x80 };
static u8 init_buf[] = { 0x68, 0xa0, 0x8e, 0x40, 0x53, 0x50,
0x67, 0x20, 0x7d, 0x01, 0x7c, 0x00, 0x7a, 0x00,
0x79, 0x20, 0x57, 0x05, 0x56, 0x31, 0x88, 0x0f,
0x75, 0x32 };
int i;
for (i = 0; i < ARRAY_SIZE(reset_buf); i += 2)
mt352_write(fe, &reset_buf[i], 2);
msleep(1);
for (i = 0; i < ARRAY_SIZE(init_buf); i += 2)
mt352_write(fe, &init_buf[i], 2);
return 0;
}
static struct mt352_config digitv_mt352_config = {
.demod_init = digitv_mt352_demod_init,
};
static int digitv_nxt6000_tuner_set_params(struct dvb_frontend *fe)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
u8 b[5];
fe->ops.tuner_ops.calc_regs(fe, b, sizeof(b));
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
return digitv_ctrl_msg(adap->dev, USB_WRITE_TUNER, 0, &b[1], 4, NULL, 0);
}
static struct nxt6000_config digitv_nxt6000_config = {
.clock_inversion = 1,
};
static int digitv_frontend_attach(struct dvb_usb_adapter *adap)
{
struct digitv_state *st = adap->dev->priv;
adap->fe_adap[0].fe = dvb_attach(mt352_attach, &digitv_mt352_config,
&adap->dev->i2c_adap);
if ((adap->fe_adap[0].fe) != NULL) {
st->is_nxt6000 = 0;
return 0;
}
adap->fe_adap[0].fe = dvb_attach(nxt6000_attach,
&digitv_nxt6000_config,
&adap->dev->i2c_adap);
if ((adap->fe_adap[0].fe) != NULL) {
st->is_nxt6000 = 1;
return 0;
}
return -EIO;
}
static int digitv_tuner_attach(struct dvb_usb_adapter *adap)
{
struct digitv_state *st = adap->dev->priv;
if (!dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x60, NULL, DVB_PLL_TDED4))
return -ENODEV;
if (st->is_nxt6000)
adap->fe_adap[0].fe->ops.tuner_ops.set_params = digitv_nxt6000_tuner_set_params;
return 0;
}
static struct rc_map_table rc_map_digitv_table[] = {
{ 0x5f55, KEY_0 },
{ 0x6f55, KEY_1 },
{ 0x9f55, KEY_2 },
{ 0xaf55, KEY_3 },
{ 0x5f56, KEY_4 },
{ 0x6f56, KEY_5 },
{ 0x9f56, KEY_6 },
{ 0xaf56, KEY_7 },
{ 0x5f59, KEY_8 },
{ 0x6f59, KEY_9 },
{ 0x9f59, KEY_TV },
{ 0xaf59, KEY_AUX },
{ 0x5f5a, KEY_DVD },
{ 0x6f5a, KEY_POWER },
{ 0x9f5a, KEY_CAMERA }, /* labelled 'Picture' */
{ 0xaf5a, KEY_AUDIO },
{ 0x5f65, KEY_INFO },
{ 0x6f65, KEY_F13 }, /* 16:9 */
{ 0x9f65, KEY_F14 }, /* 14:9 */
{ 0xaf65, KEY_EPG },
{ 0x5f66, KEY_EXIT },
{ 0x6f66, KEY_MENU },
{ 0x9f66, KEY_UP },
{ 0xaf66, KEY_DOWN },
{ 0x5f69, KEY_LEFT },
{ 0x6f69, KEY_RIGHT },
{ 0x9f69, KEY_ENTER },
{ 0xaf69, KEY_CHANNELUP },
{ 0x5f6a, KEY_CHANNELDOWN },
{ 0x6f6a, KEY_VOLUMEUP },
{ 0x9f6a, KEY_VOLUMEDOWN },
{ 0xaf6a, KEY_RED },
{ 0x5f95, KEY_GREEN },
{ 0x6f95, KEY_YELLOW },
{ 0x9f95, KEY_BLUE },
{ 0xaf95, KEY_SUBTITLE },
{ 0x5f96, KEY_F15 }, /* AD */
{ 0x6f96, KEY_TEXT },
{ 0x9f96, KEY_MUTE },
{ 0xaf96, KEY_REWIND },
{ 0x5f99, KEY_STOP },
{ 0x6f99, KEY_PLAY },
{ 0x9f99, KEY_FASTFORWARD },
{ 0xaf99, KEY_F16 }, /* chapter */
{ 0x5f9a, KEY_PAUSE },
{ 0x6f9a, KEY_PLAY },
{ 0x9f9a, KEY_RECORD },
{ 0xaf9a, KEY_F17 }, /* picture in picture */
{ 0x5fa5, KEY_KPPLUS }, /* zoom in */
{ 0x6fa5, KEY_KPMINUS }, /* zoom out */
{ 0x9fa5, KEY_F18 }, /* capture */
{ 0xafa5, KEY_F19 }, /* web */
{ 0x5fa6, KEY_EMAIL },
{ 0x6fa6, KEY_PHONE },
{ 0x9fa6, KEY_PC },
};
static int digitv_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
{
struct rc_map_table *entry;
int ret, i;
u8 key[4];
u8 b[4] = { 0 };
*event = 0;
*state = REMOTE_NO_KEY_PRESSED;
ret = digitv_ctrl_msg(d, USB_READ_REMOTE, 0, NULL, 0, key, 4);
if (ret)
return ret;
/* Tell the device we've read the remote. Not sure how necessary
this is, but the Nebula SDK does it. */
ret = digitv_ctrl_msg(d, USB_WRITE_REMOTE, 0, b, 4, NULL, 0);
if (ret)
return ret;
/* if something is inside the buffer, simulate key press */
if (key[0] != 0) {
for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) {
entry = &d->props.rc.legacy.rc_map_table[i];
if (rc5_custom(entry) == key[0] &&
rc5_data(entry) == key[1]) {
*event = entry->keycode;
*state = REMOTE_KEY_PRESSED;
return 0;
}
}
deb_rc("key: %*ph\n", 4, key);
}
return 0;
}
/* DVB USB Driver stuff */
static struct dvb_usb_device_properties digitv_properties;
static int digitv_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct dvb_usb_device *d;
int ret = dvb_usb_device_init(intf, &digitv_properties, THIS_MODULE, &d,
adapter_nr);
if (ret == 0) {
u8 b[4] = { 0 };
if (d != NULL) { /* do that only when the firmware is loaded */
b[0] = 1;
digitv_ctrl_msg(d,USB_WRITE_REMOTE_TYPE,0,b,4,NULL,0);
b[0] = 0;
digitv_ctrl_msg(d,USB_WRITE_REMOTE,0,b,4,NULL,0);
}
}
return ret;
}
enum {
ANCHOR_NEBULA_DIGITV,
};
static struct usb_device_id digitv_table[] = {
DVB_USB_DEV(ANCHOR, ANCHOR_NEBULA_DIGITV),
{ }
};
MODULE_DEVICE_TABLE (usb, digitv_table);
static struct dvb_usb_device_properties digitv_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-digitv-02.fw",
.size_of_priv = sizeof(struct digitv_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.frontend_attach = digitv_frontend_attach,
.tuner_attach = digitv_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
.identify_state = digitv_identify_state,
.rc.legacy = {
.rc_interval = 1000,
.rc_map_table = rc_map_digitv_table,
.rc_map_size = ARRAY_SIZE(rc_map_digitv_table),
.rc_query = digitv_rc_query,
},
.i2c_algo = &digitv_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "Nebula Electronics uDigiTV DVB-T USB2.0)",
{ &digitv_table[ANCHOR_NEBULA_DIGITV], NULL },
{ NULL },
},
{ NULL },
}
};
static struct usb_driver digitv_driver = {
.name = "dvb_usb_digitv",
.probe = digitv_probe,
.disconnect = dvb_usb_device_exit,
.id_table = digitv_table,
};
module_usb_driver(digitv_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for Nebula Electronics uDigiTV DVB-T USB2.0");
MODULE_VERSION("1.0-alpha");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/digitv.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* TerraTec Cinergy T2/qanu USB2 DVB-T adapter.
*
* Copyright (C) 2007 Tomi Orava ([email protected])
*
* Based on the dvb-usb-framework code and the
* original Terratec Cinergy T2 driver by:
*
* Copyright (C) 2004 Daniel Mack <[email protected]> and
* Holger Waechtler <[email protected]>
*
* Protocol Spec published on http://qanu.de/specs/terratec_cinergyT2.pdf
*/
#include "cinergyT2.h"
/* debug */
int dvb_usb_cinergyt2_debug;
module_param_named(debug, dvb_usb_cinergyt2_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info, xfer=2, rc=4 (or-able)).");
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
struct cinergyt2_state {
u8 rc_counter;
unsigned char data[64];
};
/* Forward declaration */
static const struct dvb_usb_device_properties cinergyt2_properties;
static int cinergyt2_streaming_ctrl(struct dvb_usb_adapter *adap, int enable)
{
struct dvb_usb_device *d = adap->dev;
struct cinergyt2_state *st = d->priv;
int ret;
mutex_lock(&d->data_mutex);
st->data[0] = CINERGYT2_EP1_CONTROL_STREAM_TRANSFER;
st->data[1] = enable ? 1 : 0;
ret = dvb_usb_generic_rw(d, st->data, 2, st->data, 64, 0);
mutex_unlock(&d->data_mutex);
return ret;
}
static int cinergyt2_power_ctrl(struct dvb_usb_device *d, int enable)
{
struct cinergyt2_state *st = d->priv;
int ret;
mutex_lock(&d->data_mutex);
st->data[0] = CINERGYT2_EP1_SLEEP_MODE;
st->data[1] = enable ? 0 : 1;
ret = dvb_usb_generic_rw(d, st->data, 2, st->data, 3, 0);
mutex_unlock(&d->data_mutex);
return ret;
}
static int cinergyt2_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dvb_usb_device *d = adap->dev;
struct cinergyt2_state *st = d->priv;
int ret;
adap->fe_adap[0].fe = cinergyt2_fe_attach(adap->dev);
mutex_lock(&d->data_mutex);
st->data[0] = CINERGYT2_EP1_GET_FIRMWARE_VERSION;
ret = dvb_usb_generic_rw(d, st->data, 1, st->data, 3, 0);
if (ret < 0) {
if (adap->fe_adap[0].fe)
adap->fe_adap[0].fe->ops.release(adap->fe_adap[0].fe);
deb_rc("cinergyt2_power_ctrl() Failed to retrieve sleep state info\n");
}
mutex_unlock(&d->data_mutex);
return ret;
}
static struct rc_map_table rc_map_cinergyt2_table[] = {
{ 0x0401, KEY_POWER },
{ 0x0402, KEY_1 },
{ 0x0403, KEY_2 },
{ 0x0404, KEY_3 },
{ 0x0405, KEY_4 },
{ 0x0406, KEY_5 },
{ 0x0407, KEY_6 },
{ 0x0408, KEY_7 },
{ 0x0409, KEY_8 },
{ 0x040a, KEY_9 },
{ 0x040c, KEY_0 },
{ 0x040b, KEY_VIDEO },
{ 0x040d, KEY_REFRESH },
{ 0x040e, KEY_SELECT },
{ 0x040f, KEY_EPG },
{ 0x0410, KEY_UP },
{ 0x0414, KEY_DOWN },
{ 0x0411, KEY_LEFT },
{ 0x0413, KEY_RIGHT },
{ 0x0412, KEY_OK },
{ 0x0415, KEY_TEXT },
{ 0x0416, KEY_INFO },
{ 0x0417, KEY_RED },
{ 0x0418, KEY_GREEN },
{ 0x0419, KEY_YELLOW },
{ 0x041a, KEY_BLUE },
{ 0x041c, KEY_VOLUMEUP },
{ 0x041e, KEY_VOLUMEDOWN },
{ 0x041d, KEY_MUTE },
{ 0x041b, KEY_CHANNELUP },
{ 0x041f, KEY_CHANNELDOWN },
{ 0x0440, KEY_PAUSE },
{ 0x044c, KEY_PLAY },
{ 0x0458, KEY_RECORD },
{ 0x0454, KEY_PREVIOUS },
{ 0x0448, KEY_STOP },
{ 0x045c, KEY_NEXT }
};
/* Number of keypresses to ignore before detect repeating */
#define RC_REPEAT_DELAY 3
static int repeatable_keys[] = {
KEY_UP,
KEY_DOWN,
KEY_LEFT,
KEY_RIGHT,
KEY_VOLUMEUP,
KEY_VOLUMEDOWN,
KEY_CHANNELUP,
KEY_CHANNELDOWN
};
static int cinergyt2_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
{
struct cinergyt2_state *st = d->priv;
int i, ret;
*state = REMOTE_NO_KEY_PRESSED;
mutex_lock(&d->data_mutex);
st->data[0] = CINERGYT2_EP1_GET_RC_EVENTS;
ret = dvb_usb_generic_rw(d, st->data, 1, st->data, 5, 0);
if (ret < 0)
goto ret;
if (st->data[4] == 0xff) {
/* key repeat */
st->rc_counter++;
if (st->rc_counter > RC_REPEAT_DELAY) {
for (i = 0; i < ARRAY_SIZE(repeatable_keys); i++) {
if (d->last_event == repeatable_keys[i]) {
*state = REMOTE_KEY_REPEAT;
*event = d->last_event;
deb_rc("repeat key, event %x\n",
*event);
goto ret;
}
}
deb_rc("repeated key (non repeatable)\n");
}
goto ret;
}
/* hack to pass checksum on the custom field */
st->data[2] = ~st->data[1];
dvb_usb_nec_rc_key_to_event(d, st->data, event, state);
if (st->data[0] != 0) {
if (*event != d->last_event)
st->rc_counter = 0;
deb_rc("key: %*ph\n", 5, st->data);
}
ret:
mutex_unlock(&d->data_mutex);
return ret;
}
static int cinergyt2_usb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
return dvb_usb_device_init(intf, &cinergyt2_properties,
THIS_MODULE, NULL, adapter_nr);
}
enum {
TERRATEC_CINERGY_T2,
};
static struct usb_device_id cinergyt2_usb_table[] = {
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T2),
{ }
};
MODULE_DEVICE_TABLE(usb, cinergyt2_usb_table);
static const struct dvb_usb_device_properties cinergyt2_properties = {
.size_of_priv = sizeof(struct cinergyt2_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cinergyt2_streaming_ctrl,
.frontend_attach = cinergyt2_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 512,
}
}
},
}},
}
},
.power_ctrl = cinergyt2_power_ctrl,
.rc.legacy = {
.rc_interval = 50,
.rc_map_table = rc_map_cinergyt2_table,
.rc_map_size = ARRAY_SIZE(rc_map_cinergyt2_table),
.rc_query = cinergyt2_rc_query,
},
.generic_bulk_ctrl_endpoint = 1,
.num_device_descs = 1,
.devices = {
{ .name = "TerraTec/qanu USB2.0 Highspeed DVB-T Receiver",
.cold_ids = {NULL},
.warm_ids = { &cinergyt2_usb_table[TERRATEC_CINERGY_T2], NULL },
},
{ NULL },
}
};
static struct usb_driver cinergyt2_driver = {
.name = "cinergyT2",
.probe = cinergyt2_usb_probe,
.disconnect = dvb_usb_device_exit,
.id_table = cinergyt2_usb_table
};
module_usb_driver(cinergyt2_driver);
MODULE_DESCRIPTION("Terratec Cinergy T2 DVB-T driver");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Tomi Orava");
| linux-master | drivers/media/usb/dvb-usb/cinergyT2-core.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant linux driver for MSI Mega Sky 580 DVB-T USB2.0 receiver
*
* Copyright (C) 2006 Aapo Tahkola ([email protected])
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "m920x.h"
#include "mt352.h"
#include "mt352_priv.h"
#include "qt1010.h"
#include "tda1004x.h"
#include "tda827x.h"
#include "mt2060.h"
#include <media/tuner.h>
#include "tuner-simple.h"
#include <asm/unaligned.h>
/* debug */
static int dvb_usb_m920x_debug;
module_param_named(debug,dvb_usb_m920x_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=rc (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
static int m920x_set_filter(struct dvb_usb_device *d, int type, int idx, int pid);
static inline int m920x_read(struct usb_device *udev, u8 request, u16 value,
u16 index, void *data, int size)
{
int ret;
ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
request, USB_TYPE_VENDOR | USB_DIR_IN,
value, index, data, size, 2000);
if (ret < 0) {
printk(KERN_INFO "m920x_read = error: %d\n", ret);
return ret;
}
if (ret != size) {
deb("m920x_read = no data\n");
return -EIO;
}
return 0;
}
static inline int m920x_write(struct usb_device *udev, u8 request,
u16 value, u16 index)
{
return usb_control_msg(udev, usb_sndctrlpipe(udev, 0), request,
USB_TYPE_VENDOR | USB_DIR_OUT, value, index,
NULL, 0, 2000);
}
static inline int m920x_write_seq(struct usb_device *udev, u8 request,
struct m920x_inits *seq)
{
int ret;
do {
ret = m920x_write(udev, request, seq->data, seq->address);
if (ret != 0)
return ret;
seq++;
} while (seq->address);
return 0;
}
static int m920x_init(struct dvb_usb_device *d, struct m920x_inits *rc_seq)
{
int ret, i, epi, flags = 0;
int adap_enabled[M9206_MAX_ADAPTERS] = { 0 };
/* Remote controller init. */
if (d->props.rc.legacy.rc_query || d->props.rc.core.rc_query) {
deb("Initialising remote control\n");
ret = m920x_write_seq(d->udev, M9206_CORE, rc_seq);
if (ret != 0) {
deb("Initialising remote control failed\n");
return ret;
}
deb("Initialising remote control success\n");
}
for (i = 0; i < d->props.num_adapters; i++)
flags |= d->adapter[i].props.fe[0].caps;
/* Some devices(Dposh) might crash if we attempt touch at all. */
if (flags & DVB_USB_ADAP_HAS_PID_FILTER) {
for (i = 0; i < d->props.num_adapters; i++) {
epi = d->adapter[i].props.fe[0].stream.endpoint - 0x81;
if (epi < 0 || epi >= M9206_MAX_ADAPTERS) {
printk(KERN_INFO "m920x: Unexpected adapter endpoint!\n");
return -EINVAL;
}
adap_enabled[epi] = 1;
}
for (i = 0; i < M9206_MAX_ADAPTERS; i++) {
if (adap_enabled[i])
continue;
if ((ret = m920x_set_filter(d, 0x81 + i, 0, 0x0)) != 0)
return ret;
if ((ret = m920x_set_filter(d, 0x81 + i, 0, 0x02f5)) != 0)
return ret;
}
}
return 0;
}
static int m920x_init_ep(struct usb_interface *intf)
{
struct usb_device *udev = interface_to_usbdev(intf);
struct usb_host_interface *alt;
if ((alt = usb_altnum_to_altsetting(intf, 1)) == NULL) {
deb("No alt found!\n");
return -ENODEV;
}
return usb_set_interface(udev, alt->desc.bInterfaceNumber,
alt->desc.bAlternateSetting);
}
static inline void m920x_parse_rc_state(struct dvb_usb_device *d, u8 rc_state,
int *state)
{
struct m920x_state *m = d->priv;
switch (rc_state) {
case 0x80:
*state = REMOTE_NO_KEY_PRESSED;
break;
case 0x88: /* framing error or "invalid code" */
case 0x99:
case 0xc0:
case 0xd8:
*state = REMOTE_NO_KEY_PRESSED;
m->rep_count = 0;
break;
case 0x93:
case 0x92:
case 0x83: /* pinnacle PCTV310e */
case 0x82:
m->rep_count = 0;
*state = REMOTE_KEY_PRESSED;
break;
case 0x91:
case 0x81: /* pinnacle PCTV310e */
/* prevent immediate auto-repeat */
if (++m->rep_count > 2)
*state = REMOTE_KEY_REPEAT;
else
*state = REMOTE_NO_KEY_PRESSED;
break;
default:
deb("Unexpected rc state %02x\n", rc_state);
*state = REMOTE_NO_KEY_PRESSED;
break;
}
}
static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
{
int i, ret = 0;
u8 *rc_state;
rc_state = kmalloc(2, GFP_KERNEL);
if (!rc_state)
return -ENOMEM;
ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_STATE,
rc_state, 1);
if (ret != 0)
goto out;
ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_KEY,
rc_state + 1, 1);
if (ret != 0)
goto out;
m920x_parse_rc_state(d, rc_state[0], state);
for (i = 0; i < d->props.rc.legacy.rc_map_size; i++)
if (rc5_data(&d->props.rc.legacy.rc_map_table[i]) == rc_state[1]) {
*event = d->props.rc.legacy.rc_map_table[i].keycode;
goto out;
}
if (rc_state[1] != 0)
deb("Unknown rc key %02x\n", rc_state[1]);
*state = REMOTE_NO_KEY_PRESSED;
out:
kfree(rc_state);
return ret;
}
static int m920x_rc_core_query(struct dvb_usb_device *d)
{
int ret = 0;
u8 *rc_state;
int state;
rc_state = kmalloc(2, GFP_KERNEL);
if (!rc_state)
return -ENOMEM;
if ((ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_STATE, &rc_state[0], 1)) != 0)
goto out;
if ((ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_KEY, &rc_state[1], 1)) != 0)
goto out;
deb("state=0x%02x keycode=0x%02x\n", rc_state[0], rc_state[1]);
m920x_parse_rc_state(d, rc_state[0], &state);
if (state == REMOTE_NO_KEY_PRESSED)
rc_keyup(d->rc_dev);
else if (state == REMOTE_KEY_REPEAT)
rc_repeat(d->rc_dev);
else
rc_keydown(d->rc_dev, RC_PROTO_UNKNOWN, rc_state[1], 0);
out:
kfree(rc_state);
return ret;
}
/* I2C */
static int m920x_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[], int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
int i, j;
int ret = 0;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EAGAIN;
for (i = 0; i < num; i++) {
if (msg[i].flags & (I2C_M_NO_RD_ACK | I2C_M_IGNORE_NAK | I2C_M_TEN) || msg[i].len == 0) {
/* For a 0 byte message, I think sending the address
* to index 0x80|0x40 would be the correct thing to
* do. However, zero byte messages are only used for
* probing, and since we don't know how to get the
* slave's ack, we can't probe. */
ret = -ENOTSUPP;
goto unlock;
}
/* Send START & address/RW bit */
if (!(msg[i].flags & I2C_M_NOSTART)) {
if ((ret = m920x_write(d->udev, M9206_I2C,
(msg[i].addr << 1) |
(msg[i].flags & I2C_M_RD ? 0x01 : 0), 0x80)) != 0)
goto unlock;
/* Should check for ack here, if we knew how. */
}
if (msg[i].flags & I2C_M_RD) {
char *read = kmalloc(1, GFP_KERNEL);
if (!read) {
ret = -ENOMEM;
goto unlock;
}
for (j = 0; j < msg[i].len; j++) {
/* Last byte of transaction?
* Send STOP, otherwise send ACK. */
int stop = (i+1 == num && j+1 == msg[i].len) ? 0x40 : 0x01;
if ((ret = m920x_read(d->udev, M9206_I2C, 0x0,
0x20 | stop,
read, 1)) != 0) {
kfree(read);
goto unlock;
}
msg[i].buf[j] = read[0];
}
kfree(read);
} else {
for (j = 0; j < msg[i].len; j++) {
/* Last byte of transaction? Then send STOP. */
int stop = (i+1 == num && j+1 == msg[i].len) ? 0x40 : 0x00;
if ((ret = m920x_write(d->udev, M9206_I2C, msg[i].buf[j], stop)) != 0)
goto unlock;
/* Should check for ack here too. */
}
}
}
ret = num;
unlock:
mutex_unlock(&d->i2c_mutex);
return ret;
}
static u32 m920x_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
static struct i2c_algorithm m920x_i2c_algo = {
.master_xfer = m920x_i2c_xfer,
.functionality = m920x_i2c_func,
};
/* pid filter */
static int m920x_set_filter(struct dvb_usb_device *d, int type, int idx, int pid)
{
int ret = 0;
if (pid >= 0x8000)
return -EINVAL;
pid |= 0x8000;
if ((ret = m920x_write(d->udev, M9206_FILTER, pid, (type << 8) | (idx * 4) )) != 0)
return ret;
if ((ret = m920x_write(d->udev, M9206_FILTER, 0, (type << 8) | (idx * 4) )) != 0)
return ret;
return ret;
}
static int m920x_update_filters(struct dvb_usb_adapter *adap)
{
struct m920x_state *m = adap->dev->priv;
int enabled = m->filtering_enabled[adap->id];
int i, ret = 0, filter = 0;
int ep = adap->props.fe[0].stream.endpoint;
for (i = 0; i < M9206_MAX_FILTERS; i++)
if (m->filters[adap->id][i] == 8192)
enabled = 0;
/* Disable all filters */
if ((ret = m920x_set_filter(adap->dev, ep, 1, enabled)) != 0)
return ret;
for (i = 0; i < M9206_MAX_FILTERS; i++)
if ((ret = m920x_set_filter(adap->dev, ep, i + 2, 0)) != 0)
return ret;
/* Set */
if (enabled) {
for (i = 0; i < M9206_MAX_FILTERS; i++) {
if (m->filters[adap->id][i] == 0)
continue;
if ((ret = m920x_set_filter(adap->dev, ep, filter + 2, m->filters[adap->id][i])) != 0)
return ret;
filter++;
}
}
return ret;
}
static int m920x_pid_filter_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
struct m920x_state *m = adap->dev->priv;
m->filtering_enabled[adap->id] = onoff ? 1 : 0;
return m920x_update_filters(adap);
}
static int m920x_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid, int onoff)
{
struct m920x_state *m = adap->dev->priv;
m->filters[adap->id][index] = onoff ? pid : 0;
return m920x_update_filters(adap);
}
static int m920x_firmware_download(struct usb_device *udev, const struct firmware *fw)
{
u16 value, index, size;
u8 *read, *buff;
int i, pass, ret = 0;
buff = kmalloc(65536, GFP_KERNEL);
if (buff == NULL)
return -ENOMEM;
read = kmalloc(4, GFP_KERNEL);
if (!read) {
kfree(buff);
return -ENOMEM;
}
if ((ret = m920x_read(udev, M9206_FILTER, 0x0, 0x8000, read, 4)) != 0)
goto done;
deb("%*ph\n", 4, read);
if ((ret = m920x_read(udev, M9206_FW, 0x0, 0x0, read, 1)) != 0)
goto done;
deb("%x\n", read[0]);
for (pass = 0; pass < 2; pass++) {
for (i = 0; i + (sizeof(u16) * 3) < fw->size;) {
value = get_unaligned_le16(fw->data + i);
i += sizeof(u16);
index = get_unaligned_le16(fw->data + i);
i += sizeof(u16);
size = get_unaligned_le16(fw->data + i);
i += sizeof(u16);
if (pass == 1) {
/* Will stall if using fw->data ... */
memcpy(buff, fw->data + i, size);
ret = usb_control_msg(udev, usb_sndctrlpipe(udev,0),
M9206_FW,
USB_TYPE_VENDOR | USB_DIR_OUT,
value, index, buff, size, 20);
if (ret != size) {
deb("error while uploading fw!\n");
ret = -EIO;
goto done;
}
msleep(3);
}
i += size;
}
if (i != fw->size) {
deb("bad firmware file!\n");
ret = -EINVAL;
goto done;
}
}
msleep(36);
/* m920x will disconnect itself from the bus after this. */
(void) m920x_write(udev, M9206_CORE, 0x01, M9206_FW_GO);
deb("firmware uploaded!\n");
done:
kfree(read);
kfree(buff);
return ret;
}
/* Callbacks for DVB USB */
static int m920x_identify_state(struct usb_device *udev,
const struct dvb_usb_device_properties *props,
const struct dvb_usb_device_description **desc,
int *cold)
{
struct usb_host_interface *alt;
alt = usb_altnum_to_altsetting(usb_ifnum_to_if(udev, 0), 1);
*cold = (alt == NULL) ? 1 : 0;
return 0;
}
/* demod configurations */
static int m920x_mt352_demod_init(struct dvb_frontend *fe)
{
int ret;
static const u8 config[] = { CONFIG, 0x3d };
static const u8 clock[] = { CLOCK_CTL, 0x30 };
static const u8 reset[] = { RESET, 0x80 };
static const u8 adc_ctl[] = { ADC_CTL_1, 0x40 };
static const u8 agc[] = { AGC_TARGET, 0x1c, 0x20 };
static const u8 sec_agc[] = { 0x69, 0x00, 0xff, 0xff, 0x40, 0xff, 0x00, 0x40, 0x40 };
static const u8 unk1[] = { 0x93, 0x1a };
static const u8 unk2[] = { 0xb5, 0x7a };
deb("Demod init!\n");
if ((ret = mt352_write(fe, config, ARRAY_SIZE(config))) != 0)
return ret;
if ((ret = mt352_write(fe, clock, ARRAY_SIZE(clock))) != 0)
return ret;
if ((ret = mt352_write(fe, reset, ARRAY_SIZE(reset))) != 0)
return ret;
if ((ret = mt352_write(fe, adc_ctl, ARRAY_SIZE(adc_ctl))) != 0)
return ret;
if ((ret = mt352_write(fe, agc, ARRAY_SIZE(agc))) != 0)
return ret;
if ((ret = mt352_write(fe, sec_agc, ARRAY_SIZE(sec_agc))) != 0)
return ret;
if ((ret = mt352_write(fe, unk1, ARRAY_SIZE(unk1))) != 0)
return ret;
if ((ret = mt352_write(fe, unk2, ARRAY_SIZE(unk2))) != 0)
return ret;
return 0;
}
static struct mt352_config m920x_mt352_config = {
.demod_address = 0x0f,
.no_tuner = 1,
.demod_init = m920x_mt352_demod_init,
};
static struct tda1004x_config m920x_tda10046_08_config = {
.demod_address = 0x08,
.invert = 0,
.invert_oclk = 0,
.ts_mode = TDA10046_TS_SERIAL,
.xtal_freq = TDA10046_XTAL_16M,
.if_freq = TDA10046_FREQ_045,
.agc_config = TDA10046_AGC_TDA827X,
.gpio_config = TDA10046_GPTRI,
.request_firmware = NULL,
};
static struct tda1004x_config m920x_tda10046_0b_config = {
.demod_address = 0x0b,
.invert = 0,
.invert_oclk = 0,
.ts_mode = TDA10046_TS_SERIAL,
.xtal_freq = TDA10046_XTAL_16M,
.if_freq = TDA10046_FREQ_045,
.agc_config = TDA10046_AGC_TDA827X,
.gpio_config = TDA10046_GPTRI,
.request_firmware = NULL, /* uses firmware EEPROM */
};
/* tuner configurations */
static struct qt1010_config m920x_qt1010_config = {
.i2c_address = 0x62
};
static struct mt2060_config m920x_mt2060_config = {
.i2c_address = 0x60, /* 0xc0 */
.clock_out = 0,
};
/* Callbacks for DVB USB */
static int m920x_mt352_frontend_attach(struct dvb_usb_adapter *adap)
{
deb("%s\n",__func__);
adap->fe_adap[0].fe = dvb_attach(mt352_attach,
&m920x_mt352_config,
&adap->dev->i2c_adap);
if ((adap->fe_adap[0].fe) == NULL)
return -EIO;
return 0;
}
static int m920x_mt352_frontend_attach_vp7049(struct dvb_usb_adapter *adap)
{
struct m920x_inits vp7049_fe_init_seq[] = {
/* XXX without these commands the frontend cannot be detected,
* they must be sent BEFORE the frontend is attached */
{ 0xff28, 0x00 },
{ 0xff23, 0x00 },
{ 0xff28, 0x00 },
{ 0xff23, 0x00 },
{ 0xff21, 0x20 },
{ 0xff21, 0x60 },
{ 0xff28, 0x00 },
{ 0xff22, 0x00 },
{ 0xff20, 0x30 },
{ 0xff20, 0x20 },
{ 0xff20, 0x30 },
{ } /* terminating entry */
};
int ret;
deb("%s\n", __func__);
ret = m920x_write_seq(adap->dev->udev, M9206_CORE, vp7049_fe_init_seq);
if (ret != 0) {
deb("Initialization of vp7049 frontend failed.");
return ret;
}
return m920x_mt352_frontend_attach(adap);
}
static int m920x_tda10046_08_frontend_attach(struct dvb_usb_adapter *adap)
{
deb("%s\n",__func__);
adap->fe_adap[0].fe = dvb_attach(tda10046_attach,
&m920x_tda10046_08_config,
&adap->dev->i2c_adap);
if ((adap->fe_adap[0].fe) == NULL)
return -EIO;
return 0;
}
static int m920x_tda10046_0b_frontend_attach(struct dvb_usb_adapter *adap)
{
deb("%s\n",__func__);
adap->fe_adap[0].fe = dvb_attach(tda10046_attach,
&m920x_tda10046_0b_config,
&adap->dev->i2c_adap);
if ((adap->fe_adap[0].fe) == NULL)
return -EIO;
return 0;
}
static int m920x_qt1010_tuner_attach(struct dvb_usb_adapter *adap)
{
deb("%s\n",__func__);
if (dvb_attach(qt1010_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap, &m920x_qt1010_config) == NULL)
return -ENODEV;
return 0;
}
static int m920x_tda8275_60_tuner_attach(struct dvb_usb_adapter *adap)
{
deb("%s\n",__func__);
if (dvb_attach(tda827x_attach, adap->fe_adap[0].fe, 0x60, &adap->dev->i2c_adap, NULL) == NULL)
return -ENODEV;
return 0;
}
static int m920x_tda8275_61_tuner_attach(struct dvb_usb_adapter *adap)
{
deb("%s\n",__func__);
if (dvb_attach(tda827x_attach, adap->fe_adap[0].fe, 0x61, &adap->dev->i2c_adap, NULL) == NULL)
return -ENODEV;
return 0;
}
static int m920x_fmd1216me_tuner_attach(struct dvb_usb_adapter *adap)
{
dvb_attach(simple_tuner_attach, adap->fe_adap[0].fe,
&adap->dev->i2c_adap, 0x61,
TUNER_PHILIPS_FMD1216ME_MK3);
return 0;
}
static int m920x_mt2060_tuner_attach(struct dvb_usb_adapter *adap)
{
deb("%s\n", __func__);
if (dvb_attach(mt2060_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
&m920x_mt2060_config, 1220) == NULL)
return -ENODEV;
return 0;
}
/* device-specific initialization */
static struct m920x_inits megasky_rc_init [] = {
{ M9206_RC_INIT2, 0xa8 },
{ M9206_RC_INIT1, 0x51 },
{ } /* terminating entry */
};
static struct m920x_inits tvwalkertwin_rc_init [] = {
{ M9206_RC_INIT2, 0x00 },
{ M9206_RC_INIT1, 0xef },
{ 0xff28, 0x00 },
{ 0xff23, 0x00 },
{ 0xff21, 0x30 },
{ } /* terminating entry */
};
static struct m920x_inits pinnacle310e_init[] = {
/* without these the tuner doesn't work */
{ 0xff20, 0x9b },
{ 0xff22, 0x70 },
/* rc settings */
{ 0xff50, 0x80 },
{ M9206_RC_INIT1, 0x00 },
{ M9206_RC_INIT2, 0xff },
{ } /* terminating entry */
};
static struct m920x_inits vp7049_rc_init[] = {
{ 0xff28, 0x00 },
{ 0xff23, 0x00 },
{ 0xff21, 0x70 },
{ M9206_RC_INIT2, 0x00 },
{ M9206_RC_INIT1, 0xff },
{ } /* terminating entry */
};
/* ir keymaps */
static struct rc_map_table rc_map_megasky_table[] = {
{ 0x0012, KEY_POWER },
{ 0x001e, KEY_CYCLEWINDOWS }, /* min/max */
{ 0x0002, KEY_CHANNELUP },
{ 0x0005, KEY_CHANNELDOWN },
{ 0x0003, KEY_VOLUMEUP },
{ 0x0006, KEY_VOLUMEDOWN },
{ 0x0004, KEY_MUTE },
{ 0x0007, KEY_OK }, /* TS */
{ 0x0008, KEY_STOP },
{ 0x0009, KEY_MENU }, /* swap */
{ 0x000a, KEY_REWIND },
{ 0x001b, KEY_PAUSE },
{ 0x001f, KEY_FASTFORWARD },
{ 0x000c, KEY_RECORD },
{ 0x000d, KEY_CAMERA }, /* screenshot */
{ 0x000e, KEY_COFFEE }, /* "MTS" */
};
static struct rc_map_table rc_map_tvwalkertwin_table[] = {
{ 0x0001, KEY_ZOOM }, /* Full Screen */
{ 0x0002, KEY_CAMERA }, /* snapshot */
{ 0x0003, KEY_MUTE },
{ 0x0004, KEY_REWIND },
{ 0x0005, KEY_PLAYPAUSE }, /* Play/Pause */
{ 0x0006, KEY_FASTFORWARD },
{ 0x0007, KEY_RECORD },
{ 0x0008, KEY_STOP },
{ 0x0009, KEY_TIME }, /* Timeshift */
{ 0x000c, KEY_COFFEE }, /* Recall */
{ 0x000e, KEY_CHANNELUP },
{ 0x0012, KEY_POWER },
{ 0x0015, KEY_MENU }, /* source */
{ 0x0018, KEY_CYCLEWINDOWS }, /* TWIN PIP */
{ 0x001a, KEY_CHANNELDOWN },
{ 0x001b, KEY_VOLUMEDOWN },
{ 0x001e, KEY_VOLUMEUP },
};
static struct rc_map_table rc_map_pinnacle310e_table[] = {
{ 0x16, KEY_POWER },
{ 0x17, KEY_FAVORITES },
{ 0x0f, KEY_TEXT },
{ 0x48, KEY_PROGRAM }, /* preview */
{ 0x1c, KEY_EPG },
{ 0x04, KEY_LIST }, /* record list */
{ 0x03, KEY_1 },
{ 0x01, KEY_2 },
{ 0x06, KEY_3 },
{ 0x09, KEY_4 },
{ 0x1d, KEY_5 },
{ 0x1f, KEY_6 },
{ 0x0d, KEY_7 },
{ 0x19, KEY_8 },
{ 0x1b, KEY_9 },
{ 0x15, KEY_0 },
{ 0x0c, KEY_CANCEL },
{ 0x4a, KEY_CLEAR },
{ 0x13, KEY_BACK },
{ 0x00, KEY_TAB },
{ 0x4b, KEY_UP },
{ 0x4e, KEY_LEFT },
{ 0x52, KEY_RIGHT },
{ 0x51, KEY_DOWN },
{ 0x4f, KEY_ENTER }, /* could also be KEY_OK */
{ 0x1e, KEY_VOLUMEUP },
{ 0x0a, KEY_VOLUMEDOWN },
{ 0x05, KEY_CHANNELUP },
{ 0x02, KEY_CHANNELDOWN },
{ 0x11, KEY_RECORD },
{ 0x14, KEY_PLAY },
{ 0x4c, KEY_PAUSE },
{ 0x1a, KEY_STOP },
{ 0x40, KEY_REWIND },
{ 0x12, KEY_FASTFORWARD },
{ 0x41, KEY_PREVIOUSSONG }, /* Replay */
{ 0x42, KEY_NEXTSONG }, /* Skip */
{ 0x54, KEY_CAMERA }, /* Capture */
/* { 0x50, KEY_SAP }, */ /* Sap */
{ 0x47, KEY_CYCLEWINDOWS }, /* Pip */
{ 0x4d, KEY_SCREEN }, /* FullScreen */
{ 0x08, KEY_SUBTITLE },
{ 0x0e, KEY_MUTE },
/* { 0x49, KEY_LR }, */ /* L/R */
{ 0x07, KEY_SLEEP }, /* Hibernate */
{ 0x08, KEY_VIDEO }, /* A/V */
{ 0x0e, KEY_MENU }, /* Recall */
{ 0x45, KEY_ZOOMIN },
{ 0x46, KEY_ZOOMOUT },
{ 0x18, KEY_RED }, /* Red */
{ 0x53, KEY_GREEN }, /* Green */
{ 0x5e, KEY_YELLOW }, /* Yellow */
{ 0x5f, KEY_BLUE }, /* Blue */
};
/* DVB USB Driver stuff */
static struct dvb_usb_device_properties megasky_properties;
static struct dvb_usb_device_properties digivox_mini_ii_properties;
static struct dvb_usb_device_properties tvwalkertwin_properties;
static struct dvb_usb_device_properties dposh_properties;
static struct dvb_usb_device_properties pinnacle_pctv310e_properties;
static struct dvb_usb_device_properties vp7049_properties;
static int m920x_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct dvb_usb_device *d = NULL;
int ret;
struct m920x_inits *rc_init_seq = NULL;
int bInterfaceNumber = intf->cur_altsetting->desc.bInterfaceNumber;
deb("Probing for m920x device at interface %d\n", bInterfaceNumber);
if (bInterfaceNumber == 0) {
/* Single-tuner device, or first interface on
* multi-tuner device
*/
ret = dvb_usb_device_init(intf, &megasky_properties,
THIS_MODULE, &d, adapter_nr);
if (ret == 0) {
rc_init_seq = megasky_rc_init;
goto found;
}
ret = dvb_usb_device_init(intf, &digivox_mini_ii_properties,
THIS_MODULE, &d, adapter_nr);
if (ret == 0) {
/* No remote control, so no rc_init_seq */
goto found;
}
/* This configures both tuners on the TV Walker Twin */
ret = dvb_usb_device_init(intf, &tvwalkertwin_properties,
THIS_MODULE, &d, adapter_nr);
if (ret == 0) {
rc_init_seq = tvwalkertwin_rc_init;
goto found;
}
ret = dvb_usb_device_init(intf, &dposh_properties,
THIS_MODULE, &d, adapter_nr);
if (ret == 0) {
/* Remote controller not supported yet. */
goto found;
}
ret = dvb_usb_device_init(intf, &pinnacle_pctv310e_properties,
THIS_MODULE, &d, adapter_nr);
if (ret == 0) {
rc_init_seq = pinnacle310e_init;
goto found;
}
ret = dvb_usb_device_init(intf, &vp7049_properties,
THIS_MODULE, &d, adapter_nr);
if (ret == 0) {
rc_init_seq = vp7049_rc_init;
goto found;
}
return ret;
} else {
/* Another interface on a multi-tuner device */
/* The LifeView TV Walker Twin gets here, but struct
* tvwalkertwin_properties already configured both
* tuners, so there is nothing for us to do here
*/
}
found:
if ((ret = m920x_init_ep(intf)) < 0)
return ret;
if (d && (ret = m920x_init(d, rc_init_seq)) != 0)
return ret;
return ret;
}
enum {
MSI_MEGASKY580,
ANUBIS_MSI_DIGI_VOX_MINI_II,
ANUBIS_LIFEVIEW_TV_WALKER_TWIN_COLD,
ANUBIS_LIFEVIEW_TV_WALKER_TWIN_WARM,
DPOSH_M9206_COLD,
DPOSH_M9206_WARM,
VISIONPLUS_PINNACLE_PCTV310E,
AZUREWAVE_TWINHAN_VP7049,
};
static struct usb_device_id m920x_table[] = {
DVB_USB_DEV(MSI, MSI_MEGASKY580),
DVB_USB_DEV(ANUBIS_ELECTRONIC, ANUBIS_MSI_DIGI_VOX_MINI_II),
DVB_USB_DEV(ANUBIS_ELECTRONIC, ANUBIS_LIFEVIEW_TV_WALKER_TWIN_COLD),
DVB_USB_DEV(ANUBIS_ELECTRONIC, ANUBIS_LIFEVIEW_TV_WALKER_TWIN_WARM),
DVB_USB_DEV(DPOSH, DPOSH_M9206_COLD),
DVB_USB_DEV(DPOSH, DPOSH_M9206_WARM),
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_PINNACLE_PCTV310E),
DVB_USB_DEV(AZUREWAVE, AZUREWAVE_TWINHAN_VP7049),
{ }
};
MODULE_DEVICE_TABLE (usb, m920x_table);
static struct dvb_usb_device_properties megasky_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-megasky-02.fw",
.download_firmware = m920x_firmware_download,
.rc.legacy = {
.rc_interval = 100,
.rc_map_table = rc_map_megasky_table,
.rc_map_size = ARRAY_SIZE(rc_map_megasky_table),
.rc_query = m920x_rc_query,
},
.size_of_priv = sizeof(struct m920x_state),
.identify_state = m920x_identify_state,
.num_adapters = 1,
.adapter = {{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 8,
.pid_filter = m920x_pid_filter,
.pid_filter_ctrl = m920x_pid_filter_ctrl,
.frontend_attach = m920x_mt352_frontend_attach,
.tuner_attach = m920x_qt1010_tuner_attach,
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x81,
.u = {
.bulk = {
.buffersize = 512,
}
}
},
}},
}},
.i2c_algo = &m920x_i2c_algo,
.num_device_descs = 1,
.devices = {
{ "MSI Mega Sky 580 DVB-T USB2.0",
{ &m920x_table[MSI_MEGASKY580], NULL },
{ NULL },
}
}
};
static struct dvb_usb_device_properties digivox_mini_ii_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-digivox-02.fw",
.download_firmware = m920x_firmware_download,
.size_of_priv = sizeof(struct m920x_state),
.identify_state = m920x_identify_state,
.num_adapters = 1,
.adapter = {{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 8,
.pid_filter = m920x_pid_filter,
.pid_filter_ctrl = m920x_pid_filter_ctrl,
.frontend_attach = m920x_tda10046_08_frontend_attach,
.tuner_attach = m920x_tda8275_60_tuner_attach,
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x81,
.u = {
.bulk = {
.buffersize = 0x4000,
}
}
},
}},
}},
.i2c_algo = &m920x_i2c_algo,
.num_device_descs = 1,
.devices = {
{ "MSI DIGI VOX mini II DVB-T USB2.0",
{ &m920x_table[ANUBIS_MSI_DIGI_VOX_MINI_II], NULL },
{ NULL },
},
}
};
/* LifeView TV Walker Twin support by Nick Andrew <[email protected]>
*
* LifeView TV Walker Twin has 1 x M9206, 2 x TDA10046, 2 x TDA8275A
* TDA10046 #0 is located at i2c address 0x08
* TDA10046 #1 is located at i2c address 0x0b
* TDA8275A #0 is located at i2c address 0x60
* TDA8275A #1 is located at i2c address 0x61
*/
static struct dvb_usb_device_properties tvwalkertwin_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-tvwalkert.fw",
.download_firmware = m920x_firmware_download,
.rc.legacy = {
.rc_interval = 100,
.rc_map_table = rc_map_tvwalkertwin_table,
.rc_map_size = ARRAY_SIZE(rc_map_tvwalkertwin_table),
.rc_query = m920x_rc_query,
},
.size_of_priv = sizeof(struct m920x_state),
.identify_state = m920x_identify_state,
.num_adapters = 2,
.adapter = {{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 8,
.pid_filter = m920x_pid_filter,
.pid_filter_ctrl = m920x_pid_filter_ctrl,
.frontend_attach = m920x_tda10046_08_frontend_attach,
.tuner_attach = m920x_tda8275_60_tuner_attach,
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x81,
.u = {
.bulk = {
.buffersize = 512,
}
}
}},
}},{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 8,
.pid_filter = m920x_pid_filter,
.pid_filter_ctrl = m920x_pid_filter_ctrl,
.frontend_attach = m920x_tda10046_0b_frontend_attach,
.tuner_attach = m920x_tda8275_61_tuner_attach,
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x82,
.u = {
.bulk = {
.buffersize = 512,
}
}
}},
},
}},
.i2c_algo = &m920x_i2c_algo,
.num_device_descs = 1,
.devices = {
{ .name = "LifeView TV Walker Twin DVB-T USB2.0",
.cold_ids = { &m920x_table[ANUBIS_LIFEVIEW_TV_WALKER_TWIN_COLD], NULL },
.warm_ids = { &m920x_table[ANUBIS_LIFEVIEW_TV_WALKER_TWIN_WARM], NULL },
},
}
};
static struct dvb_usb_device_properties dposh_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-dposh-01.fw",
.download_firmware = m920x_firmware_download,
.size_of_priv = sizeof(struct m920x_state),
.identify_state = m920x_identify_state,
.num_adapters = 1,
.adapter = {{
.num_frontends = 1,
.fe = {{
/* Hardware pid filters don't work with this device/firmware */
.frontend_attach = m920x_mt352_frontend_attach,
.tuner_attach = m920x_qt1010_tuner_attach,
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x81,
.u = {
.bulk = {
.buffersize = 512,
}
}
},
}},
}},
.i2c_algo = &m920x_i2c_algo,
.num_device_descs = 1,
.devices = {
{ .name = "Dposh DVB-T USB2.0",
.cold_ids = { &m920x_table[DPOSH_M9206_COLD], NULL },
.warm_ids = { &m920x_table[DPOSH_M9206_WARM], NULL },
},
}
};
static struct dvb_usb_device_properties pinnacle_pctv310e_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.download_firmware = NULL,
.rc.legacy = {
.rc_interval = 100,
.rc_map_table = rc_map_pinnacle310e_table,
.rc_map_size = ARRAY_SIZE(rc_map_pinnacle310e_table),
.rc_query = m920x_rc_query,
},
.size_of_priv = sizeof(struct m920x_state),
.identify_state = m920x_identify_state,
.num_adapters = 1,
.adapter = {{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 8,
.pid_filter = m920x_pid_filter,
.pid_filter_ctrl = m920x_pid_filter_ctrl,
.frontend_attach = m920x_mt352_frontend_attach,
.tuner_attach = m920x_fmd1216me_tuner_attach,
.stream = {
.type = USB_ISOC,
.count = 5,
.endpoint = 0x84,
.u = {
.isoc = {
.framesperurb = 128,
.framesize = 564,
.interval = 1,
}
}
},
}},
} },
.i2c_algo = &m920x_i2c_algo,
.num_device_descs = 1,
.devices = {
{ "Pinnacle PCTV 310e",
{ &m920x_table[VISIONPLUS_PINNACLE_PCTV310E], NULL },
{ NULL },
}
}
};
static struct dvb_usb_device_properties vp7049_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-vp7049-0.95.fw",
.download_firmware = m920x_firmware_download,
.rc.core = {
.rc_interval = 150,
.rc_codes = RC_MAP_TWINHAN_VP1027_DVBS,
.rc_query = m920x_rc_core_query,
.allowed_protos = RC_PROTO_BIT_UNKNOWN,
},
.size_of_priv = sizeof(struct m920x_state),
.identify_state = m920x_identify_state,
.num_adapters = 1,
.adapter = {{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 8,
.pid_filter = m920x_pid_filter,
.pid_filter_ctrl = m920x_pid_filter_ctrl,
.frontend_attach = m920x_mt352_frontend_attach_vp7049,
.tuner_attach = m920x_mt2060_tuner_attach,
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x81,
.u = {
.bulk = {
.buffersize = 512,
}
}
},
} },
} },
.i2c_algo = &m920x_i2c_algo,
.num_device_descs = 1,
.devices = {
{ "DTV-DVB UDTT7049",
{ &m920x_table[AZUREWAVE_TWINHAN_VP7049], NULL },
{ NULL },
}
}
};
static struct usb_driver m920x_driver = {
.name = "dvb_usb_m920x",
.probe = m920x_probe,
.disconnect = dvb_usb_device_exit,
.id_table = m920x_table,
};
module_usb_driver(m920x_driver);
MODULE_AUTHOR("Aapo Tahkola <[email protected]>");
MODULE_DESCRIPTION("DVB Driver for ULI M920x");
MODULE_VERSION("0.1");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/m920x.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB frontend part of the Linux driver for TwinhanDTV Alpha/MagicBoxII USB2.0
* DVB-T receiver.
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* Thanks to Twinhan who kindly provided hardware and information.
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "vp7045.h"
/* It is a Zarlink MT352 within a Samsung Tuner (DNOS404ZH102A) - 040929 - AAT
*
* Programming is hidden inside the firmware, so set_frontend is very easy.
* Even though there is a Firmware command that one can use to access the demod
* via its registers. This is used for status information.
*/
struct vp7045_fe_state {
struct dvb_frontend fe;
struct dvb_usb_device *d;
};
static int vp7045_fe_read_status(struct dvb_frontend *fe,
enum fe_status *status)
{
struct vp7045_fe_state *state = fe->demodulator_priv;
u8 s0 = vp7045_read_reg(state->d,0x00),
s1 = vp7045_read_reg(state->d,0x01),
s3 = vp7045_read_reg(state->d,0x03);
*status = 0;
if (s0 & (1 << 4))
*status |= FE_HAS_CARRIER;
if (s0 & (1 << 1))
*status |= FE_HAS_VITERBI;
if (s0 & (1 << 5))
*status |= FE_HAS_LOCK;
if (s1 & (1 << 1))
*status |= FE_HAS_SYNC;
if (s3 & (1 << 6))
*status |= FE_HAS_SIGNAL;
if ((*status & (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)) !=
(FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC))
*status &= ~FE_HAS_LOCK;
return 0;
}
static int vp7045_fe_read_ber(struct dvb_frontend* fe, u32 *ber)
{
struct vp7045_fe_state *state = fe->demodulator_priv;
*ber = (vp7045_read_reg(state->d, 0x0D) << 16) |
(vp7045_read_reg(state->d, 0x0E) << 8) |
vp7045_read_reg(state->d, 0x0F);
return 0;
}
static int vp7045_fe_read_unc_blocks(struct dvb_frontend* fe, u32 *unc)
{
struct vp7045_fe_state *state = fe->demodulator_priv;
*unc = (vp7045_read_reg(state->d, 0x10) << 8) |
vp7045_read_reg(state->d, 0x11);
return 0;
}
static int vp7045_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength)
{
struct vp7045_fe_state *state = fe->demodulator_priv;
u16 signal = (vp7045_read_reg(state->d, 0x14) << 8) |
vp7045_read_reg(state->d, 0x15);
*strength = ~signal;
return 0;
}
static int vp7045_fe_read_snr(struct dvb_frontend* fe, u16 *snr)
{
struct vp7045_fe_state *state = fe->demodulator_priv;
u8 _snr = vp7045_read_reg(state->d, 0x09);
*snr = (_snr << 8) | _snr;
return 0;
}
static int vp7045_fe_init(struct dvb_frontend* fe)
{
return 0;
}
static int vp7045_fe_sleep(struct dvb_frontend* fe)
{
return 0;
}
static int vp7045_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
{
tune->min_delay_ms = 800;
return 0;
}
static int vp7045_fe_set_frontend(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
struct vp7045_fe_state *state = fe->demodulator_priv;
u8 buf[5];
u32 freq = fep->frequency / 1000;
buf[0] = (freq >> 16) & 0xff;
buf[1] = (freq >> 8) & 0xff;
buf[2] = freq & 0xff;
buf[3] = 0;
switch (fep->bandwidth_hz) {
case 8000000:
buf[4] = 8;
break;
case 7000000:
buf[4] = 7;
break;
case 6000000:
buf[4] = 6;
break;
default:
return -EINVAL;
}
vp7045_usb_op(state->d,LOCK_TUNER_COMMAND,buf,5,NULL,0,200);
return 0;
}
static void vp7045_fe_release(struct dvb_frontend* fe)
{
struct vp7045_fe_state *state = fe->demodulator_priv;
kfree(state);
}
static const struct dvb_frontend_ops vp7045_fe_ops;
struct dvb_frontend * vp7045_fe_attach(struct dvb_usb_device *d)
{
struct vp7045_fe_state *s = kzalloc(sizeof(struct vp7045_fe_state), GFP_KERNEL);
if (s == NULL)
goto error;
s->d = d;
memcpy(&s->fe.ops, &vp7045_fe_ops, sizeof(struct dvb_frontend_ops));
s->fe.demodulator_priv = s;
return &s->fe;
error:
return NULL;
}
static const struct dvb_frontend_ops vp7045_fe_ops = {
.delsys = { SYS_DVBT },
.info = {
.name = "Twinhan VP7045/46 USB DVB-T",
.frequency_min_hz = 44250 * kHz,
.frequency_max_hz = 867250 * kHz,
.frequency_stepsize_hz = 1 * kHz,
.caps = FE_CAN_INVERSION_AUTO |
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
FE_CAN_TRANSMISSION_MODE_AUTO |
FE_CAN_GUARD_INTERVAL_AUTO |
FE_CAN_RECOVER |
FE_CAN_HIERARCHY_AUTO,
},
.release = vp7045_fe_release,
.init = vp7045_fe_init,
.sleep = vp7045_fe_sleep,
.set_frontend = vp7045_fe_set_frontend,
.get_tune_settings = vp7045_fe_get_tune_settings,
.read_status = vp7045_fe_read_status,
.read_ber = vp7045_fe_read_ber,
.read_signal_strength = vp7045_fe_read_signal_strength,
.read_snr = vp7045_fe_read_snr,
.read_ucblocks = vp7045_fe_read_unc_blocks,
};
| linux-master | drivers/media/usb/dvb-usb/vp7045-fe.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/* DVB USB compliant Linux driver for the Afatech 9005
* USB1.1 DVB-T receiver.
*
* Standard remote decode function
*
* Copyright (C) 2007 Luca Olivetti ([email protected])
*
* Thanks to Afatech who kindly provided information.
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "af9005.h"
/* debug */
static int dvb_usb_af9005_remote_debug;
module_param_named(debug, dvb_usb_af9005_remote_debug, int, 0644);
MODULE_PARM_DESC(debug,
"enable (1) or disable (0) debug messages."
DVB_USB_DEBUG_STATUS);
#define deb_decode(args...) dprintk(dvb_usb_af9005_remote_debug,0x01,args)
struct rc_map_table rc_map_af9005_table[] = {
{0x01b7, KEY_POWER},
{0x01a7, KEY_VOLUMEUP},
{0x0187, KEY_CHANNELUP},
{0x017f, KEY_MUTE},
{0x01bf, KEY_VOLUMEDOWN},
{0x013f, KEY_CHANNELDOWN},
{0x01df, KEY_1},
{0x015f, KEY_2},
{0x019f, KEY_3},
{0x011f, KEY_4},
{0x01ef, KEY_5},
{0x016f, KEY_6},
{0x01af, KEY_7},
{0x0127, KEY_8},
{0x0107, KEY_9},
{0x01cf, KEY_ZOOM},
{0x014f, KEY_0},
{0x018f, KEY_GOTO}, /* marked jump on the remote */
{0x00bd, KEY_POWER},
{0x007d, KEY_VOLUMEUP},
{0x00fd, KEY_CHANNELUP},
{0x009d, KEY_MUTE},
{0x005d, KEY_VOLUMEDOWN},
{0x00dd, KEY_CHANNELDOWN},
{0x00ad, KEY_1},
{0x006d, KEY_2},
{0x00ed, KEY_3},
{0x008d, KEY_4},
{0x004d, KEY_5},
{0x00cd, KEY_6},
{0x00b5, KEY_7},
{0x0075, KEY_8},
{0x00f5, KEY_9},
{0x0095, KEY_ZOOM},
{0x0055, KEY_0},
{0x00d5, KEY_GOTO}, /* marked jump on the remote */
};
int rc_map_af9005_table_size = ARRAY_SIZE(rc_map_af9005_table);
static int repeatable_keys[] = {
KEY_VOLUMEUP,
KEY_VOLUMEDOWN,
KEY_CHANNELUP,
KEY_CHANNELDOWN
};
int af9005_rc_decode(struct dvb_usb_device *d, u8 * data, int len, u32 * event,
int *state)
{
u16 mark, space;
u32 result;
u8 cust, dat, invdat;
int i;
if (len >= 6) {
mark = (u16) (data[0] << 8) + data[1];
space = (u16) (data[2] << 8) + data[3];
if (space * 3 < mark) {
for (i = 0; i < ARRAY_SIZE(repeatable_keys); i++) {
if (d->last_event == repeatable_keys[i]) {
*state = REMOTE_KEY_REPEAT;
*event = d->last_event;
deb_decode("repeat key, event %x\n",
*event);
return 0;
}
}
deb_decode("repeated key ignored (non repeatable)\n");
return 0;
} else if (len >= 33 * 4) { /*32 bits + start code */
result = 0;
for (i = 4; i < 4 + 32 * 4; i += 4) {
result <<= 1;
mark = (u16) (data[i] << 8) + data[i + 1];
mark >>= 1;
space = (u16) (data[i + 2] << 8) + data[i + 3];
space >>= 1;
if (mark * 2 > space)
result += 1;
}
deb_decode("key pressed, raw value %x\n", result);
if ((result & 0xff000000) != 0xfe000000) {
deb_decode
("doesn't start with 0xfe, ignored\n");
return 0;
}
cust = (result >> 16) & 0xff;
dat = (result >> 8) & 0xff;
invdat = (~result) & 0xff;
if (dat != invdat) {
deb_decode("code != inverted code\n");
return 0;
}
for (i = 0; i < rc_map_af9005_table_size; i++) {
if (rc5_custom(&rc_map_af9005_table[i]) == cust
&& rc5_data(&rc_map_af9005_table[i]) == dat) {
*event = rc_map_af9005_table[i].keycode;
*state = REMOTE_KEY_PRESSED;
deb_decode
("key pressed, event %x\n", *event);
return 0;
}
}
deb_decode("not found in table\n");
}
}
return 0;
}
EXPORT_SYMBOL(rc_map_af9005_table);
EXPORT_SYMBOL(rc_map_af9005_table_size);
EXPORT_SYMBOL(af9005_rc_decode);
MODULE_AUTHOR("Luca Olivetti <[email protected]>");
MODULE_DESCRIPTION
("Standard remote control decoder for Afatech 9005 DVB-T USB1.1 stick");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/af9005-remote.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant linux driver for mobile DVB-T USB devices based on
* reference designs made by DiBcom (http://www.dibcom.fr/) (DiB3000M-B)
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* based on GPL code from DiBcom, which has
* Copyright (C) 2004 Amaury Demol for DiBcom
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dibusb.h"
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
static int dib3000mb_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dibusb_state *st = adap->priv;
return st->ops.tuner_pass_ctrl(fe, enable, st->tuner_addr);
}
static int dibusb_dib3000mb_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib3000_config demod_cfg;
struct dibusb_state *st = adap->priv;
demod_cfg.demod_address = 0x8;
adap->fe_adap[0].fe = dvb_attach(dib3000mb_attach, &demod_cfg,
&adap->dev->i2c_adap, &st->ops);
if ((adap->fe_adap[0].fe) == NULL)
return -ENODEV;
adap->fe_adap[0].fe->ops.i2c_gate_ctrl = dib3000mb_i2c_gate_ctrl;
return 0;
}
static int dibusb_thomson_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dibusb_state *st = adap->priv;
st->tuner_addr = 0x61;
dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x61, &adap->dev->i2c_adap,
DVB_PLL_TUA6010XS);
return 0;
}
static int dibusb_panasonic_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dibusb_state *st = adap->priv;
st->tuner_addr = 0x60;
dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x60, &adap->dev->i2c_adap,
DVB_PLL_TDA665X);
return 0;
}
/* Some of the Artec 1.1 device aren't equipped with the default tuner
* (Thomson Cable), but with a Panasonic ENV77H11D5. This function figures
* this out. */
static int dibusb_tuner_probe_and_attach(struct dvb_usb_adapter *adap)
{
u8 b[2] = { 0,0 }, b2[1];
int ret = 0;
struct i2c_msg msg[2] = {
{ .flags = 0, .buf = b, .len = 2 },
{ .flags = I2C_M_RD, .buf = b2, .len = 1 },
};
struct dibusb_state *st = adap->priv;
/* the Panasonic sits on I2C addrass 0x60, the Thomson on 0x61 */
msg[0].addr = msg[1].addr = st->tuner_addr = 0x60;
if (adap->fe_adap[0].fe->ops.i2c_gate_ctrl)
adap->fe_adap[0].fe->ops.i2c_gate_ctrl(adap->fe_adap[0].fe, 1);
if (i2c_transfer(&adap->dev->i2c_adap, msg, 2) != 2) {
err("tuner i2c write failed.");
return -EREMOTEIO;
}
if (adap->fe_adap[0].fe->ops.i2c_gate_ctrl)
adap->fe_adap[0].fe->ops.i2c_gate_ctrl(adap->fe_adap[0].fe, 0);
if (b2[0] == 0xfe) {
info("This device has the Thomson Cable onboard. Which is default.");
ret = dibusb_thomson_tuner_attach(adap);
} else {
info("This device has the Panasonic ENV77H11D5 onboard.");
ret = dibusb_panasonic_tuner_attach(adap);
}
return ret;
}
/* USB Driver stuff */
static struct dvb_usb_device_properties dibusb1_1_properties;
static struct dvb_usb_device_properties dibusb1_1_an2235_properties;
static struct dvb_usb_device_properties dibusb2_0b_properties;
static struct dvb_usb_device_properties artec_t1_usb2_properties;
static int dibusb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
if (0 == dvb_usb_device_init(intf, &dibusb1_1_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &dibusb1_1_an2235_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &dibusb2_0b_properties,
THIS_MODULE, NULL, adapter_nr) ||
0 == dvb_usb_device_init(intf, &artec_t1_usb2_properties,
THIS_MODULE, NULL, adapter_nr))
return 0;
return -EINVAL;
}
/* do not change the order of the ID table */
enum {
WIDEVIEW_DVBT_USB_COLD,
WIDEVIEW_DVBT_USB_WARM,
COMPRO_DVBU2000_COLD,
COMPRO_DVBU2000_WARM,
COMPRO_DVBU2000_UNK_COLD,
DIBCOM_MOD3000_COLD,
DIBCOM_MOD3000_WARM,
EMPIA_VSTREAM_COLD,
EMPIA_VSTREAM_WARM,
GRANDTEC_DVBT_USB_COLD,
GRANDTEC_DVBT_USB_WARM,
GRANDTEC_MOD3000_COLD,
GRANDTEC_MOD3000_WARM,
UNK_HYPER_PALTEK_COLD,
UNK_HYPER_PALTEK_WARM,
VISIONPLUS_VP7041_COLD,
VISIONPLUS_VP7041_WARM,
TWINHAN_VP7041_COLD,
TWINHAN_VP7041_WARM,
ULTIMA_TVBOX_COLD,
ULTIMA_TVBOX_WARM,
ULTIMA_TVBOX_AN2235_COLD,
ULTIMA_TVBOX_AN2235_WARM,
ADSTECH_USB2_COLD,
ADSTECH_USB2_WARM,
KYE_DVB_T_COLD,
KYE_DVB_T_WARM,
KWORLD_VSTREAM_COLD,
ULTIMA_TVBOX_USB2_COLD,
ULTIMA_TVBOX_USB2_WARM,
ULTIMA_TVBOX_ANCHOR_COLD,
};
static struct usb_device_id dibusb_dib3000mb_table[] = {
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_DVBT_USB_COLD),
DVB_USB_DEV(WIDEVIEW, WIDEVIEW_DVBT_USB_WARM),
DVB_USB_DEV(COMPRO, COMPRO_DVBU2000_COLD),
DVB_USB_DEV(COMPRO, COMPRO_DVBU2000_WARM),
DVB_USB_DEV(COMPRO_UNK, COMPRO_DVBU2000_UNK_COLD),
DVB_USB_DEV(DIBCOM, DIBCOM_MOD3000_COLD),
DVB_USB_DEV(DIBCOM, DIBCOM_MOD3000_WARM),
DVB_USB_DEV(EMPIA, EMPIA_VSTREAM_COLD),
DVB_USB_DEV(EMPIA, EMPIA_VSTREAM_WARM),
DVB_USB_DEV(GRANDTEC, GRANDTEC_DVBT_USB_COLD),
DVB_USB_DEV(GRANDTEC, GRANDTEC_DVBT_USB_WARM),
DVB_USB_DEV(GRANDTEC, GRANDTEC_MOD3000_COLD),
DVB_USB_DEV(GRANDTEC, GRANDTEC_MOD3000_WARM),
DVB_USB_DEV(HYPER_PALTEK, UNK_HYPER_PALTEK_COLD),
DVB_USB_DEV(HYPER_PALTEK, UNK_HYPER_PALTEK_WARM),
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_VP7041_COLD),
DVB_USB_DEV(VISIONPLUS, VISIONPLUS_VP7041_WARM),
DVB_USB_DEV(TWINHAN, TWINHAN_VP7041_COLD),
DVB_USB_DEV(TWINHAN, TWINHAN_VP7041_WARM),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_COLD),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_WARM),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_AN2235_COLD),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_AN2235_WARM),
DVB_USB_DEV(ADSTECH, ADSTECH_USB2_COLD),
DVB_USB_DEV(ADSTECH, ADSTECH_USB2_WARM),
DVB_USB_DEV(KYE, KYE_DVB_T_COLD),
DVB_USB_DEV(KYE, KYE_DVB_T_WARM),
DVB_USB_DEV(KWORLD, KWORLD_VSTREAM_COLD),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_USB2_COLD),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_USB2_WARM),
#ifdef CONFIG_DVB_USB_DIBUSB_MB_FAULTY
DVB_USB_DEV(ANCHOR, ULTIMA_TVBOX_ANCHOR_COLD),
#endif
{ }
};
MODULE_DEVICE_TABLE (usb, dibusb_dib3000mb_table);
static struct dvb_usb_device_properties dibusb1_1_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_AN2135,
.firmware = "dvb-usb-dibusb-5.0.0.11.fw",
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 16,
.streaming_ctrl = dibusb_streaming_ctrl,
.pid_filter = dibusb_pid_filter,
.pid_filter_ctrl = dibusb_pid_filter_ctrl,
.frontend_attach = dibusb_dib3000mb_frontend_attach,
.tuner_attach = dibusb_tuner_probe_and_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
.size_of_priv = sizeof(struct dibusb_state),
}
},
.power_ctrl = dibusb_power_ctrl,
.rc.legacy = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_map_table = rc_map_dibusb_table,
.rc_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
.rc_query = dibusb_rc_query,
},
.i2c_algo = &dibusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 9,
.devices = {
{ "AVerMedia AverTV DVBT USB1.1",
{ &dibusb_dib3000mb_table[WIDEVIEW_DVBT_USB_COLD], NULL },
{ &dibusb_dib3000mb_table[WIDEVIEW_DVBT_USB_WARM], NULL },
},
{ "Compro Videomate DVB-U2000 - DVB-T USB1.1 (please confirm to linux-dvb)",
{ &dibusb_dib3000mb_table[COMPRO_DVBU2000_COLD], &dibusb_dib3000mb_table[COMPRO_DVBU2000_UNK_COLD], NULL},
{ &dibusb_dib3000mb_table[COMPRO_DVBU2000_WARM], NULL },
},
{ "DiBcom USB1.1 DVB-T reference design (MOD3000)",
{ &dibusb_dib3000mb_table[DIBCOM_MOD3000_COLD], NULL },
{ &dibusb_dib3000mb_table[DIBCOM_MOD3000_WARM], NULL },
},
{ "KWorld V-Stream XPERT DTV - DVB-T USB1.1",
{ &dibusb_dib3000mb_table[EMPIA_VSTREAM_COLD], NULL },
{ &dibusb_dib3000mb_table[EMPIA_VSTREAM_WARM], NULL },
},
{ "Grandtec USB1.1 DVB-T",
{ &dibusb_dib3000mb_table[GRANDTEC_DVBT_USB_COLD], &dibusb_dib3000mb_table[GRANDTEC_MOD3000_COLD], NULL },
{ &dibusb_dib3000mb_table[GRANDTEC_DVBT_USB_WARM], &dibusb_dib3000mb_table[GRANDTEC_MOD3000_WARM], NULL },
},
{ "Unknown USB1.1 DVB-T device ???? please report the name to the author",
{ &dibusb_dib3000mb_table[UNK_HYPER_PALTEK_COLD], NULL },
{ &dibusb_dib3000mb_table[UNK_HYPER_PALTEK_WARM], NULL },
},
{ "TwinhanDTV USB-Ter USB1.1 / Magic Box I / HAMA USB1.1 DVB-T device",
{ &dibusb_dib3000mb_table[VISIONPLUS_VP7041_COLD], &dibusb_dib3000mb_table[TWINHAN_VP7041_COLD], NULL},
{ &dibusb_dib3000mb_table[VISIONPLUS_VP7041_WARM], &dibusb_dib3000mb_table[TWINHAN_VP7041_WARM], NULL},
},
{ "Artec T1 USB1.1 TVBOX with AN2135",
{ &dibusb_dib3000mb_table[ULTIMA_TVBOX_COLD], NULL },
{ &dibusb_dib3000mb_table[ULTIMA_TVBOX_WARM], NULL },
},
{ "VideoWalker DVB-T USB",
{ &dibusb_dib3000mb_table[KYE_DVB_T_COLD], NULL },
{ &dibusb_dib3000mb_table[KYE_DVB_T_WARM], NULL },
},
}
};
static struct dvb_usb_device_properties dibusb1_1_an2235_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_AN2235,
.firmware = "dvb-usb-dibusb-an2235-01.fw",
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF | DVB_USB_ADAP_HAS_PID_FILTER,
.pid_filter_count = 16,
.streaming_ctrl = dibusb_streaming_ctrl,
.pid_filter = dibusb_pid_filter,
.pid_filter_ctrl = dibusb_pid_filter_ctrl,
.frontend_attach = dibusb_dib3000mb_frontend_attach,
.tuner_attach = dibusb_tuner_probe_and_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
.size_of_priv = sizeof(struct dibusb_state),
},
},
.power_ctrl = dibusb_power_ctrl,
.rc.legacy = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_map_table = rc_map_dibusb_table,
.rc_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
.rc_query = dibusb_rc_query,
},
.i2c_algo = &dibusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
#ifdef CONFIG_DVB_USB_DIBUSB_MB_FAULTY
.num_device_descs = 2,
#else
.num_device_descs = 1,
#endif
.devices = {
{ "Artec T1 USB1.1 TVBOX with AN2235",
{ &dibusb_dib3000mb_table[ULTIMA_TVBOX_AN2235_COLD], NULL },
{ &dibusb_dib3000mb_table[ULTIMA_TVBOX_AN2235_WARM], NULL },
},
#ifdef CONFIG_DVB_USB_DIBUSB_MB_FAULTY
{ "Artec T1 USB1.1 TVBOX with AN2235 (faulty USB IDs)",
{ &dibusb_dib3000mb_table[ULTIMA_TVBOX_ANCHOR_COLD], NULL },
{ NULL },
},
{ NULL },
#endif
}
};
static struct dvb_usb_device_properties dibusb2_0b_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-adstech-usb2-02.fw",
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 16,
.streaming_ctrl = dibusb2_0_streaming_ctrl,
.pid_filter = dibusb_pid_filter,
.pid_filter_ctrl = dibusb_pid_filter_ctrl,
.frontend_attach = dibusb_dib3000mb_frontend_attach,
.tuner_attach = dibusb_thomson_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x06,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
.size_of_priv = sizeof(struct dibusb_state),
}
},
.power_ctrl = dibusb2_0_power_ctrl,
.rc.legacy = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_map_table = rc_map_dibusb_table,
.rc_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
.rc_query = dibusb_rc_query,
},
.i2c_algo = &dibusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 2,
.devices = {
{ "KWorld/ADSTech Instant DVB-T USB2.0",
{ &dibusb_dib3000mb_table[ADSTECH_USB2_COLD], NULL },
{ &dibusb_dib3000mb_table[ADSTECH_USB2_WARM], NULL },
},
{ "KWorld Xpert DVB-T USB2.0",
{ &dibusb_dib3000mb_table[KWORLD_VSTREAM_COLD], NULL },
{ NULL }
},
{ NULL },
}
};
static struct dvb_usb_device_properties artec_t1_usb2_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-dibusb-6.0.0.8.fw",
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 16,
.streaming_ctrl = dibusb2_0_streaming_ctrl,
.pid_filter = dibusb_pid_filter,
.pid_filter_ctrl = dibusb_pid_filter_ctrl,
.frontend_attach = dibusb_dib3000mb_frontend_attach,
.tuner_attach = dibusb_tuner_probe_and_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x06,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
.size_of_priv = sizeof(struct dibusb_state),
}
},
.power_ctrl = dibusb2_0_power_ctrl,
.rc.legacy = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_map_table = rc_map_dibusb_table,
.rc_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
.rc_query = dibusb_rc_query,
},
.i2c_algo = &dibusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "Artec T1 USB2.0",
{ &dibusb_dib3000mb_table[ULTIMA_TVBOX_USB2_COLD], NULL },
{ &dibusb_dib3000mb_table[ULTIMA_TVBOX_USB2_WARM], NULL },
},
{ NULL },
}
};
static struct usb_driver dibusb_driver = {
.name = "dvb_usb_dibusb_mb",
.probe = dibusb_probe,
.disconnect = dvb_usb_device_exit,
.id_table = dibusb_dib3000mb_table,
};
module_usb_driver(dibusb_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for DiBcom USB DVB-T devices (DiB3000M-B based)");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/dibusb-mb.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant linux driver for Conexant USB reference design.
*
* The Conexant reference design I saw on their website was only for analogue
* capturing (using the cx25842). The box I took to write this driver (reverse
* engineered) is the one labeled Medion MD95700. In addition to the cx25842
* for analogue capturing it also has a cx22702 DVB-T demodulator on the main
* board. Besides it has a atiremote (X10) and a USB2.0 hub onboard.
*
* Maybe it is a little bit premature to call this driver cxusb, but I assume
* the USB protocol is identical or at least inherited from the reference
* design, so it can be reused for the "analogue-only" device (if it will
* appear at all).
*
*
* Copyright (C) 2005 Patrick Boettcher ([email protected])
* Copyright (C) 2006 Michael Krufky ([email protected])
* Copyright (C) 2006, 2007 Chris Pascoe ([email protected])
* Copyright (C) 2011, 2017 Maciej S. Szmigiero ([email protected])
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include <media/tuner.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/vmalloc.h>
#include "cxusb.h"
#include "cx22702.h"
#include "lgdt330x.h"
#include "mt352.h"
#include "mt352_priv.h"
#include "zl10353.h"
#include "xc2028.h"
#include "tuner-simple.h"
#include "mxl5005s.h"
#include "max2165.h"
#include "dib7000p.h"
#include "dib0070.h"
#include "lgs8gxx.h"
#include "atbm8830.h"
#include "si2168.h"
#include "si2157.h"
/* debug */
int dvb_usb_cxusb_debug;
module_param_named(debug, dvb_usb_cxusb_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (see cxusb.h)."
DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
enum cxusb_table_index {
MEDION_MD95700,
DVICO_BLUEBIRD_LG064F_COLD,
DVICO_BLUEBIRD_LG064F_WARM,
DVICO_BLUEBIRD_DUAL_1_COLD,
DVICO_BLUEBIRD_DUAL_1_WARM,
DVICO_BLUEBIRD_LGZ201_COLD,
DVICO_BLUEBIRD_LGZ201_WARM,
DVICO_BLUEBIRD_TH7579_COLD,
DVICO_BLUEBIRD_TH7579_WARM,
DIGITALNOW_BLUEBIRD_DUAL_1_COLD,
DIGITALNOW_BLUEBIRD_DUAL_1_WARM,
DVICO_BLUEBIRD_DUAL_2_COLD,
DVICO_BLUEBIRD_DUAL_2_WARM,
DVICO_BLUEBIRD_DUAL_4,
DVICO_BLUEBIRD_DVB_T_NANO_2,
DVICO_BLUEBIRD_DVB_T_NANO_2_NFW_WARM,
AVERMEDIA_VOLAR_A868R,
DVICO_BLUEBIRD_DUAL_4_REV_2,
CONEXANT_D680_DMB,
MYGICA_D689,
NR__cxusb_table_index
};
static struct usb_device_id cxusb_table[];
int cxusb_ctrl_msg(struct dvb_usb_device *d,
u8 cmd, const u8 *wbuf, int wlen, u8 *rbuf, int rlen)
{
struct cxusb_state *st = d->priv;
int ret;
if (1 + wlen > MAX_XFER_SIZE) {
warn("i2c wr: len=%d is too big!\n", wlen);
return -EOPNOTSUPP;
}
if (rlen > MAX_XFER_SIZE) {
warn("i2c rd: len=%d is too big!\n", rlen);
return -EOPNOTSUPP;
}
mutex_lock(&d->data_mutex);
st->data[0] = cmd;
memcpy(&st->data[1], wbuf, wlen);
ret = dvb_usb_generic_rw(d, st->data, 1 + wlen, st->data, rlen, 0);
if (!ret && rbuf && rlen)
memcpy(rbuf, st->data, rlen);
mutex_unlock(&d->data_mutex);
return ret;
}
/* GPIO */
static void cxusb_gpio_tuner(struct dvb_usb_device *d, int onoff)
{
struct cxusb_state *st = d->priv;
u8 o[2], i;
if (st->gpio_write_state[GPIO_TUNER] == onoff &&
!st->gpio_write_refresh[GPIO_TUNER])
return;
o[0] = GPIO_TUNER;
o[1] = onoff;
cxusb_ctrl_msg(d, CMD_GPIO_WRITE, o, 2, &i, 1);
if (i != 0x01)
dev_info(&d->udev->dev, "gpio_write failed.\n");
st->gpio_write_state[GPIO_TUNER] = onoff;
st->gpio_write_refresh[GPIO_TUNER] = false;
}
static int cxusb_bluebird_gpio_rw(struct dvb_usb_device *d, u8 changemask,
u8 newval)
{
u8 o[2], gpio_state;
int rc;
o[0] = 0xff & ~changemask; /* mask of bits to keep */
o[1] = newval & changemask; /* new values for bits */
rc = cxusb_ctrl_msg(d, CMD_BLUEBIRD_GPIO_RW, o, 2, &gpio_state, 1);
if (rc < 0 || (gpio_state & changemask) != (newval & changemask))
dev_info(&d->udev->dev, "bluebird_gpio_write failed.\n");
return rc < 0 ? rc : gpio_state;
}
static void cxusb_bluebird_gpio_pulse(struct dvb_usb_device *d, u8 pin, int low)
{
cxusb_bluebird_gpio_rw(d, pin, low ? 0 : pin);
msleep(5);
cxusb_bluebird_gpio_rw(d, pin, low ? pin : 0);
}
static void cxusb_nano2_led(struct dvb_usb_device *d, int onoff)
{
cxusb_bluebird_gpio_rw(d, 0x40, onoff ? 0 : 0x40);
}
static int cxusb_d680_dmb_gpio_tuner(struct dvb_usb_device *d,
u8 addr, int onoff)
{
u8 o[2] = {addr, onoff};
u8 i;
int rc;
rc = cxusb_ctrl_msg(d, CMD_GPIO_WRITE, o, 2, &i, 1);
if (rc < 0)
return rc;
if (i == 0x01)
return 0;
dev_info(&d->udev->dev, "gpio_write failed.\n");
return -EIO;
}
/* I2C */
static int cxusb_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
int ret;
int i;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EAGAIN;
for (i = 0; i < num; i++) {
if (le16_to_cpu(d->udev->descriptor.idVendor) == USB_VID_MEDION)
switch (msg[i].addr) {
case 0x63:
cxusb_gpio_tuner(d, 0);
break;
default:
cxusb_gpio_tuner(d, 1);
break;
}
if (msg[i].flags & I2C_M_RD) {
/* read only */
u8 obuf[3], ibuf[MAX_XFER_SIZE];
if (1 + msg[i].len > sizeof(ibuf)) {
warn("i2c rd: len=%d is too big!\n",
msg[i].len);
ret = -EOPNOTSUPP;
goto unlock;
}
obuf[0] = 0;
obuf[1] = msg[i].len;
obuf[2] = msg[i].addr;
if (cxusb_ctrl_msg(d, CMD_I2C_READ,
obuf, 3,
ibuf, 1 + msg[i].len) < 0) {
warn("i2c read failed");
break;
}
memcpy(msg[i].buf, &ibuf[1], msg[i].len);
} else if (i + 1 < num && (msg[i + 1].flags & I2C_M_RD) &&
msg[i].addr == msg[i + 1].addr) {
/* write to then read from same address */
u8 obuf[MAX_XFER_SIZE], ibuf[MAX_XFER_SIZE];
if (3 + msg[i].len > sizeof(obuf)) {
warn("i2c wr: len=%d is too big!\n",
msg[i].len);
ret = -EOPNOTSUPP;
goto unlock;
}
if (1 + msg[i + 1].len > sizeof(ibuf)) {
warn("i2c rd: len=%d is too big!\n",
msg[i + 1].len);
ret = -EOPNOTSUPP;
goto unlock;
}
obuf[0] = msg[i].len;
obuf[1] = msg[i + 1].len;
obuf[2] = msg[i].addr;
memcpy(&obuf[3], msg[i].buf, msg[i].len);
if (cxusb_ctrl_msg(d, CMD_I2C_READ,
obuf, 3 + msg[i].len,
ibuf, 1 + msg[i + 1].len) < 0)
break;
if (ibuf[0] != 0x08)
dev_info(&d->udev->dev, "i2c read may have failed\n");
memcpy(msg[i + 1].buf, &ibuf[1], msg[i + 1].len);
i++;
} else {
/* write only */
u8 obuf[MAX_XFER_SIZE], ibuf;
if (2 + msg[i].len > sizeof(obuf)) {
warn("i2c wr: len=%d is too big!\n",
msg[i].len);
ret = -EOPNOTSUPP;
goto unlock;
}
obuf[0] = msg[i].addr;
obuf[1] = msg[i].len;
memcpy(&obuf[2], msg[i].buf, msg[i].len);
if (cxusb_ctrl_msg(d, CMD_I2C_WRITE, obuf,
2 + msg[i].len, &ibuf, 1) < 0)
break;
if (ibuf != 0x08)
dev_info(&d->udev->dev, "i2c write may have failed\n");
}
}
if (i == num)
ret = num;
else
ret = -EREMOTEIO;
unlock:
mutex_unlock(&d->i2c_mutex);
return ret;
}
static u32 cxusb_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
static struct i2c_algorithm cxusb_i2c_algo = {
.master_xfer = cxusb_i2c_xfer,
.functionality = cxusb_i2c_func,
};
static int _cxusb_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 b = 0;
dev_info(&d->udev->dev, "setting power %s\n", onoff ? "ON" : "OFF");
if (onoff)
return cxusb_ctrl_msg(d, CMD_POWER_ON, &b, 1, NULL, 0);
else
return cxusb_ctrl_msg(d, CMD_POWER_OFF, &b, 1, NULL, 0);
}
static int cxusb_power_ctrl(struct dvb_usb_device *d, int onoff)
{
bool is_medion = d->props.devices[0].warm_ids[0] == &cxusb_table[MEDION_MD95700];
int ret;
if (is_medion && !onoff) {
struct cxusb_medion_dev *cxdev = d->priv;
mutex_lock(&cxdev->open_lock);
if (cxdev->open_type == CXUSB_OPEN_ANALOG) {
dev_info(&d->udev->dev, "preventing DVB core from setting power OFF while we are in analog mode\n");
ret = -EBUSY;
goto ret_unlock;
}
}
ret = _cxusb_power_ctrl(d, onoff);
ret_unlock:
if (is_medion && !onoff) {
struct cxusb_medion_dev *cxdev = d->priv;
mutex_unlock(&cxdev->open_lock);
}
return ret;
}
static int cxusb_aver_power_ctrl(struct dvb_usb_device *d, int onoff)
{
int ret;
if (!onoff)
return cxusb_ctrl_msg(d, CMD_POWER_OFF, NULL, 0, NULL, 0);
if (d->state == DVB_USB_STATE_INIT &&
usb_set_interface(d->udev, 0, 0) < 0)
err("set interface failed");
do {
/* Nothing */
} while (!(ret = cxusb_ctrl_msg(d, CMD_POWER_ON, NULL, 0, NULL, 0)) &&
!(ret = cxusb_ctrl_msg(d, 0x15, NULL, 0, NULL, 0)) &&
!(ret = cxusb_ctrl_msg(d, 0x17, NULL, 0, NULL, 0)) && 0);
if (!ret) {
/*
* FIXME: We don't know why, but we need to configure the
* lgdt3303 with the register settings below on resume
*/
int i;
u8 buf;
static const u8 bufs[] = {
0x0e, 0x2, 0x00, 0x7f,
0x0e, 0x2, 0x02, 0xfe,
0x0e, 0x2, 0x02, 0x01,
0x0e, 0x2, 0x00, 0x03,
0x0e, 0x2, 0x0d, 0x40,
0x0e, 0x2, 0x0e, 0x87,
0x0e, 0x2, 0x0f, 0x8e,
0x0e, 0x2, 0x10, 0x01,
0x0e, 0x2, 0x14, 0xd7,
0x0e, 0x2, 0x47, 0x88,
};
msleep(20);
for (i = 0; i < ARRAY_SIZE(bufs); i += 4 / sizeof(u8)) {
ret = cxusb_ctrl_msg(d, CMD_I2C_WRITE,
bufs + i, 4, &buf, 1);
if (ret)
break;
if (buf != 0x8)
return -EREMOTEIO;
}
}
return ret;
}
static int cxusb_bluebird_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 b = 0;
if (onoff)
return cxusb_ctrl_msg(d, CMD_POWER_ON, &b, 1, NULL, 0);
else
return 0;
}
static int cxusb_nano2_power_ctrl(struct dvb_usb_device *d, int onoff)
{
int rc = 0;
rc = cxusb_power_ctrl(d, onoff);
if (!onoff)
cxusb_nano2_led(d, 0);
return rc;
}
static int cxusb_d680_dmb_power_ctrl(struct dvb_usb_device *d, int onoff)
{
int ret;
u8 b;
ret = cxusb_power_ctrl(d, onoff);
if (!onoff)
return ret;
msleep(128);
cxusb_ctrl_msg(d, CMD_DIGITAL, NULL, 0, &b, 1);
msleep(100);
return ret;
}
static int cxusb_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
struct dvb_usb_device *dvbdev = adap->dev;
bool is_medion = dvbdev->props.devices[0].warm_ids[0] ==
&cxusb_table[MEDION_MD95700];
u8 buf[2] = { 0x03, 0x00 };
if (is_medion && onoff) {
int ret;
ret = cxusb_medion_get(dvbdev, CXUSB_OPEN_DIGITAL);
if (ret != 0)
return ret;
}
if (onoff)
cxusb_ctrl_msg(dvbdev, CMD_STREAMING_ON, buf, 2, NULL, 0);
else
cxusb_ctrl_msg(dvbdev, CMD_STREAMING_OFF, NULL, 0, NULL, 0);
if (is_medion && !onoff)
cxusb_medion_put(dvbdev);
return 0;
}
static int cxusb_aver_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
if (onoff)
cxusb_ctrl_msg(adap->dev, CMD_AVER_STREAM_ON, NULL, 0, NULL, 0);
else
cxusb_ctrl_msg(adap->dev, CMD_AVER_STREAM_OFF,
NULL, 0, NULL, 0);
return 0;
}
static void cxusb_d680_dmb_drain_message(struct dvb_usb_device *d)
{
int ep = d->props.generic_bulk_ctrl_endpoint;
const int timeout = 100;
const int junk_len = 32;
u8 *junk;
int rd_count;
/* Discard remaining data in video pipe */
junk = kmalloc(junk_len, GFP_KERNEL);
if (!junk)
return;
while (1) {
if (usb_bulk_msg(d->udev,
usb_rcvbulkpipe(d->udev, ep),
junk, junk_len, &rd_count, timeout) < 0)
break;
if (!rd_count)
break;
}
kfree(junk);
}
static void cxusb_d680_dmb_drain_video(struct dvb_usb_device *d)
{
struct usb_data_stream_properties *p = &d->props.adapter[0].fe[0].stream;
const int timeout = 100;
const int junk_len = p->u.bulk.buffersize;
u8 *junk;
int rd_count;
/* Discard remaining data in video pipe */
junk = kmalloc(junk_len, GFP_KERNEL);
if (!junk)
return;
while (1) {
if (usb_bulk_msg(d->udev,
usb_rcvbulkpipe(d->udev, p->endpoint),
junk, junk_len, &rd_count, timeout) < 0)
break;
if (!rd_count)
break;
}
kfree(junk);
}
static int cxusb_d680_dmb_streaming_ctrl(struct dvb_usb_adapter *adap,
int onoff)
{
if (onoff) {
u8 buf[2] = { 0x03, 0x00 };
cxusb_d680_dmb_drain_video(adap->dev);
return cxusb_ctrl_msg(adap->dev, CMD_STREAMING_ON,
buf, sizeof(buf), NULL, 0);
} else {
int ret = cxusb_ctrl_msg(adap->dev,
CMD_STREAMING_OFF, NULL, 0, NULL, 0);
return ret;
}
}
static int cxusb_rc_query(struct dvb_usb_device *d)
{
u8 ircode[4];
if (cxusb_ctrl_msg(d, CMD_GET_IR_CODE, NULL, 0, ircode, 4) < 0)
return 0;
if (ircode[2] || ircode[3])
rc_keydown(d->rc_dev, RC_PROTO_NEC,
RC_SCANCODE_NEC(~ircode[2] & 0xff, ircode[3]), 0);
return 0;
}
static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d)
{
u8 ircode[4];
struct i2c_msg msg = {
.addr = 0x6b,
.flags = I2C_M_RD,
.buf = ircode,
.len = 4
};
if (cxusb_i2c_xfer(&d->i2c_adap, &msg, 1) != 1)
return 0;
if (ircode[1] || ircode[2])
rc_keydown(d->rc_dev, RC_PROTO_NEC,
RC_SCANCODE_NEC(~ircode[1] & 0xff, ircode[2]), 0);
return 0;
}
static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d)
{
u8 ircode[2];
if (cxusb_ctrl_msg(d, 0x10, NULL, 0, ircode, 2) < 0)
return 0;
if (ircode[0] || ircode[1])
rc_keydown(d->rc_dev, RC_PROTO_UNKNOWN,
RC_SCANCODE_RC5(ircode[0], ircode[1]), 0);
return 0;
}
static int cxusb_dee1601_demod_init(struct dvb_frontend *fe)
{
static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x28 };
static u8 reset[] = { RESET, 0x80 };
static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 };
static u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
mt352_write(fe, clock_config, sizeof(clock_config));
udelay(200);
mt352_write(fe, reset, sizeof(reset));
mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
mt352_write(fe, agc_cfg, sizeof(agc_cfg));
mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
return 0;
}
static int cxusb_mt352_demod_init(struct dvb_frontend *fe)
{
/* used in both lgz201 and th7579 */
static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x29 };
static u8 reset[] = { RESET, 0x80 };
static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
static u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 };
static u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
mt352_write(fe, clock_config, sizeof(clock_config));
udelay(200);
mt352_write(fe, reset, sizeof(reset));
mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
mt352_write(fe, agc_cfg, sizeof(agc_cfg));
mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
return 0;
}
static struct cx22702_config cxusb_cx22702_config = {
.demod_address = 0x63,
.output_mode = CX22702_PARALLEL_OUTPUT,
};
static struct lgdt330x_config cxusb_lgdt3303_config = {
.demod_chip = LGDT3303,
};
static struct lgdt330x_config cxusb_aver_lgdt3303_config = {
.demod_chip = LGDT3303,
.clock_polarity_flip = 2,
};
static struct mt352_config cxusb_dee1601_config = {
.demod_address = 0x0f,
.demod_init = cxusb_dee1601_demod_init,
};
static struct zl10353_config cxusb_zl10353_dee1601_config = {
.demod_address = 0x0f,
.parallel_ts = 1,
};
static struct mt352_config cxusb_mt352_config = {
/* used in both lgz201 and th7579 */
.demod_address = 0x0f,
.demod_init = cxusb_mt352_demod_init,
};
static struct zl10353_config cxusb_zl10353_xc3028_config = {
.demod_address = 0x0f,
.if2 = 45600,
.no_tuner = 1,
.parallel_ts = 1,
};
static struct zl10353_config cxusb_zl10353_xc3028_config_no_i2c_gate = {
.demod_address = 0x0f,
.if2 = 45600,
.no_tuner = 1,
.parallel_ts = 1,
.disable_i2c_gate_ctrl = 1,
};
static struct mt352_config cxusb_mt352_xc3028_config = {
.demod_address = 0x0f,
.if2 = 4560,
.no_tuner = 1,
.demod_init = cxusb_mt352_demod_init,
};
/* FIXME: needs tweaking */
static struct mxl5005s_config aver_a868r_tuner = {
.i2c_address = 0x63,
.if_freq = 6000000UL,
.xtal_freq = CRYSTAL_FREQ_16000000HZ,
.agc_mode = MXL_SINGLE_AGC,
.tracking_filter = MXL_TF_C,
.rssi_enable = MXL_RSSI_ENABLE,
.cap_select = MXL_CAP_SEL_ENABLE,
.div_out = MXL_DIV_OUT_4,
.clock_out = MXL_CLOCK_OUT_DISABLE,
.output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM,
.top = MXL5005S_TOP_25P2,
.mod_mode = MXL_DIGITAL_MODE,
.if_mode = MXL_ZERO_IF,
.AgcMasterByte = 0x00,
};
/* FIXME: needs tweaking */
static struct mxl5005s_config d680_dmb_tuner = {
.i2c_address = 0x63,
.if_freq = 36125000UL,
.xtal_freq = CRYSTAL_FREQ_16000000HZ,
.agc_mode = MXL_SINGLE_AGC,
.tracking_filter = MXL_TF_C,
.rssi_enable = MXL_RSSI_ENABLE,
.cap_select = MXL_CAP_SEL_ENABLE,
.div_out = MXL_DIV_OUT_4,
.clock_out = MXL_CLOCK_OUT_DISABLE,
.output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM,
.top = MXL5005S_TOP_25P2,
.mod_mode = MXL_DIGITAL_MODE,
.if_mode = MXL_ZERO_IF,
.AgcMasterByte = 0x00,
};
static struct max2165_config mygica_d689_max2165_cfg = {
.i2c_address = 0x60,
.osc_clk = 20
};
/* Callbacks for DVB USB */
static int cxusb_fmd1216me_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dvb_usb_device *dvbdev = adap->dev;
bool is_medion = dvbdev->props.devices[0].warm_ids[0] ==
&cxusb_table[MEDION_MD95700];
dvb_attach(simple_tuner_attach, adap->fe_adap[0].fe,
&dvbdev->i2c_adap, 0x61,
TUNER_PHILIPS_FMD1216ME_MK3);
if (is_medion && adap->fe_adap[0].fe)
/*
* make sure that DVB core won't put to sleep (reset, really)
* tuner when we might be open in analog mode
*/
adap->fe_adap[0].fe->ops.tuner_ops.sleep = NULL;
return 0;
}
static int cxusb_dee1601_tuner_attach(struct dvb_usb_adapter *adap)
{
dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x61,
NULL, DVB_PLL_THOMSON_DTT7579);
return 0;
}
static int cxusb_lgz201_tuner_attach(struct dvb_usb_adapter *adap)
{
dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x61,
NULL, DVB_PLL_LG_Z201);
return 0;
}
static int cxusb_dtt7579_tuner_attach(struct dvb_usb_adapter *adap)
{
dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x60,
NULL, DVB_PLL_THOMSON_DTT7579);
return 0;
}
static int cxusb_lgh064f_tuner_attach(struct dvb_usb_adapter *adap)
{
dvb_attach(simple_tuner_attach, adap->fe_adap[0].fe,
&adap->dev->i2c_adap, 0x61, TUNER_LG_TDVS_H06XF);
return 0;
}
static int dvico_bluebird_xc2028_callback(void *ptr, int component,
int command, int arg)
{
struct dvb_usb_adapter *adap = ptr;
struct dvb_usb_device *d = adap->dev;
switch (command) {
case XC2028_TUNER_RESET:
dev_info(&d->udev->dev, "XC2028_TUNER_RESET %d\n", arg);
cxusb_bluebird_gpio_pulse(d, 0x01, 1);
break;
case XC2028_RESET_CLK:
dev_info(&d->udev->dev, "XC2028_RESET_CLK %d\n", arg);
break;
case XC2028_I2C_FLUSH:
break;
default:
dev_info(&d->udev->dev, "unknown command %d, arg %d\n",
command, arg);
return -EINVAL;
}
return 0;
}
static int cxusb_dvico_xc3028_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dvb_frontend *fe;
struct xc2028_config cfg = {
.i2c_adap = &adap->dev->i2c_adap,
.i2c_addr = 0x61,
};
static struct xc2028_ctrl ctl = {
.fname = XC2028_DEFAULT_FIRMWARE,
.max_len = 64,
.demod = XC3028_FE_ZARLINK456,
};
/* FIXME: generalize & move to common area */
adap->fe_adap[0].fe->callback = dvico_bluebird_xc2028_callback;
fe = dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &cfg);
if (!fe || !fe->ops.tuner_ops.set_config)
return -EIO;
fe->ops.tuner_ops.set_config(fe, &ctl);
return 0;
}
static int cxusb_mxl5003s_tuner_attach(struct dvb_usb_adapter *adap)
{
dvb_attach(mxl5005s_attach, adap->fe_adap[0].fe,
&adap->dev->i2c_adap, &aver_a868r_tuner);
return 0;
}
static int cxusb_d680_dmb_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dvb_frontend *fe;
fe = dvb_attach(mxl5005s_attach, adap->fe_adap[0].fe,
&adap->dev->i2c_adap, &d680_dmb_tuner);
return (!fe) ? -EIO : 0;
}
static int cxusb_mygica_d689_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dvb_frontend *fe;
fe = dvb_attach(max2165_attach, adap->fe_adap[0].fe,
&adap->dev->i2c_adap, &mygica_d689_max2165_cfg);
return (!fe) ? -EIO : 0;
}
static int cxusb_medion_fe_ts_bus_ctrl(struct dvb_frontend *fe, int acquire)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dvb_usb_device *dvbdev = adap->dev;
if (acquire)
return cxusb_medion_get(dvbdev, CXUSB_OPEN_DIGITAL);
cxusb_medion_put(dvbdev);
return 0;
}
static int cxusb_medion_set_mode(struct dvb_usb_device *dvbdev, bool digital)
{
struct cxusb_state *st = dvbdev->priv;
int ret;
u8 b;
unsigned int i;
/*
* switching mode while doing an I2C transaction often causes
* the device to crash
*/
mutex_lock(&dvbdev->i2c_mutex);
if (digital) {
ret = usb_set_interface(dvbdev->udev, 0, 6);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"digital interface selection failed (%d)\n",
ret);
goto ret_unlock;
}
} else {
ret = usb_set_interface(dvbdev->udev, 0, 1);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"analog interface selection failed (%d)\n",
ret);
goto ret_unlock;
}
}
/* pipes need to be cleared after setting interface */
ret = usb_clear_halt(dvbdev->udev, usb_rcvbulkpipe(dvbdev->udev, 1));
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"clear halt on IN pipe failed (%d)\n",
ret);
ret = usb_clear_halt(dvbdev->udev, usb_sndbulkpipe(dvbdev->udev, 1));
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"clear halt on OUT pipe failed (%d)\n",
ret);
ret = cxusb_ctrl_msg(dvbdev, digital ? CMD_DIGITAL : CMD_ANALOG,
NULL, 0, &b, 1);
if (ret != 0) {
dev_err(&dvbdev->udev->dev, "mode switch failed (%d)\n",
ret);
goto ret_unlock;
}
/* mode switch seems to reset GPIO states */
for (i = 0; i < ARRAY_SIZE(st->gpio_write_refresh); i++)
st->gpio_write_refresh[i] = true;
ret_unlock:
mutex_unlock(&dvbdev->i2c_mutex);
return ret;
}
static int cxusb_cx22702_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dvb_usb_device *dvbdev = adap->dev;
bool is_medion = dvbdev->props.devices[0].warm_ids[0] ==
&cxusb_table[MEDION_MD95700];
if (is_medion) {
int ret;
ret = cxusb_medion_set_mode(dvbdev, true);
if (ret)
return ret;
}
adap->fe_adap[0].fe = dvb_attach(cx22702_attach, &cxusb_cx22702_config,
&dvbdev->i2c_adap);
if (!adap->fe_adap[0].fe)
return -EIO;
if (is_medion)
adap->fe_adap[0].fe->ops.ts_bus_ctrl =
cxusb_medion_fe_ts_bus_ctrl;
return 0;
}
static int cxusb_lgdt3303_frontend_attach(struct dvb_usb_adapter *adap)
{
if (usb_set_interface(adap->dev->udev, 0, 7) < 0)
err("set interface failed");
cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0);
adap->fe_adap[0].fe = dvb_attach(lgdt330x_attach,
&cxusb_lgdt3303_config,
0x0e,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe)
return 0;
return -EIO;
}
static int cxusb_aver_lgdt3303_frontend_attach(struct dvb_usb_adapter *adap)
{
adap->fe_adap[0].fe = dvb_attach(lgdt330x_attach,
&cxusb_aver_lgdt3303_config,
0x0e,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe)
return 0;
return -EIO;
}
static int cxusb_mt352_frontend_attach(struct dvb_usb_adapter *adap)
{
/* used in both lgz201 and th7579 */
if (usb_set_interface(adap->dev->udev, 0, 0) < 0)
err("set interface failed");
cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0);
adap->fe_adap[0].fe = dvb_attach(mt352_attach, &cxusb_mt352_config,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe)
return 0;
return -EIO;
}
static int cxusb_dee1601_frontend_attach(struct dvb_usb_adapter *adap)
{
if (usb_set_interface(adap->dev->udev, 0, 0) < 0)
err("set interface failed");
cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0);
adap->fe_adap[0].fe = dvb_attach(mt352_attach, &cxusb_dee1601_config,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe)
return 0;
adap->fe_adap[0].fe = dvb_attach(zl10353_attach,
&cxusb_zl10353_dee1601_config,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe)
return 0;
return -EIO;
}
static int cxusb_dualdig4_frontend_attach(struct dvb_usb_adapter *adap)
{
u8 ircode[4];
int i;
struct i2c_msg msg = {
.addr = 0x6b,
.flags = I2C_M_RD,
.buf = ircode,
.len = 4
};
if (usb_set_interface(adap->dev->udev, 0, 1) < 0)
err("set interface failed");
cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0);
/* reset the tuner and demodulator */
cxusb_bluebird_gpio_rw(adap->dev, 0x04, 0);
cxusb_bluebird_gpio_pulse(adap->dev, 0x01, 1);
cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1);
adap->fe_adap[0].fe =
dvb_attach(zl10353_attach,
&cxusb_zl10353_xc3028_config_no_i2c_gate,
&adap->dev->i2c_adap);
if (!adap->fe_adap[0].fe)
return -EIO;
/* try to determine if there is no IR decoder on the I2C bus */
for (i = 0; adap->dev->props.rc.core.rc_codes && i < 5; i++) {
msleep(20);
if (cxusb_i2c_xfer(&adap->dev->i2c_adap, &msg, 1) != 1)
goto no_IR;
if (ircode[0] == 0 && ircode[1] == 0)
continue;
if (ircode[2] + ircode[3] != 0xff) {
no_IR:
adap->dev->props.rc.core.rc_codes = NULL;
info("No IR receiver detected on this device.");
break;
}
}
return 0;
}
static struct dibx000_agc_config dib7070_agc_config = {
.band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
/*
* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
* P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
*/
.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 600,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 3530,
.wbd_sel = 1,
.wbd_alpha = 5,
.agc1_max = 65535,
.agc1_min = 0,
.agc2_max = 65535,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 40,
.agc1_pt3 = 183,
.agc1_slope1 = 206,
.agc1_slope2 = 255,
.agc2_pt1 = 72,
.agc2_pt2 = 152,
.agc2_slope1 = 88,
.agc2_slope2 = 90,
.alpha_mant = 17,
.alpha_exp = 27,
.beta_mant = 23,
.beta_exp = 51,
.perform_agc_softsplit = 0,
};
static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
.internal = 60000,
.sampling = 15000,
.pll_prediv = 1,
.pll_ratio = 20,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 2,
/* refsel, sel, freq_15k */
.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
.ifreq = (0 << 25) | 0,
.timf = 20452225,
.xtal_hz = 12000000,
};
static struct dib7000p_config cxusb_dualdig4_rev2_config = {
.output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 1,
.agc = &dib7070_agc_config,
.bw = &dib7070_bw_config_12_mhz,
.tuner_is_baseband = 1,
.spur_protect = 1,
.gpio_dir = 0xfcef,
.gpio_val = 0x0110,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
};
struct dib0700_adapter_state {
int (*set_param_save)(struct dvb_frontend *fe);
struct dib7000p_ops dib7000p_ops;
};
static int cxusb_dualdig4_rev2_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (usb_set_interface(adap->dev->udev, 0, 1) < 0)
err("set interface failed");
cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0);
cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1);
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
&cxusb_dualdig4_rev2_config) < 0) {
pr_warn("Unable to enumerate dib7000p\n");
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
0x80,
&cxusb_dualdig4_rev2_config);
if (!adap->fe_adap[0].fe)
return -EIO;
return 0;
}
static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
}
static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
{
return 0;
}
static struct dib0070_config dib7070p_dib0070_config = {
.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
.reset = dib7070_tuner_reset,
.sleep = dib7070_tuner_sleep,
.clock_khz = 12000,
};
static int dib7070_set_param_override(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
u16 offset;
u8 band = BAND_OF_FREQUENCY(p->frequency / 1000);
switch (band) {
case BAND_VHF:
offset = 950;
break;
default:
case BAND_UHF:
offset = 550;
break;
}
state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
return state->set_param_save(fe);
}
static int cxusb_dualdig4_rev2_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c;
/*
* No need to call dvb7000p_attach here, as it was called
* already, as frontend_attach method is called first, and
* tuner_attach is only called on success.
*/
tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
DIBX000_I2C_INTERFACE_TUNER, 1);
if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
&dib7070p_dib0070_config) == NULL)
return -ENODEV;
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
return 0;
}
static int cxusb_nano2_frontend_attach(struct dvb_usb_adapter *adap)
{
if (usb_set_interface(adap->dev->udev, 0, 1) < 0)
err("set interface failed");
cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0);
/* reset the tuner and demodulator */
cxusb_bluebird_gpio_rw(adap->dev, 0x04, 0);
cxusb_bluebird_gpio_pulse(adap->dev, 0x01, 1);
cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1);
adap->fe_adap[0].fe = dvb_attach(zl10353_attach,
&cxusb_zl10353_xc3028_config,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe)
return 0;
adap->fe_adap[0].fe = dvb_attach(mt352_attach,
&cxusb_mt352_xc3028_config,
&adap->dev->i2c_adap);
if (adap->fe_adap[0].fe)
return 0;
return -EIO;
}
static struct lgs8gxx_config d680_lgs8gl5_cfg = {
.prod = LGS8GXX_PROD_LGS8GL5,
.demod_address = 0x19,
.serial_ts = 0,
.ts_clk_pol = 0,
.ts_clk_gated = 1,
.if_clk_freq = 30400, /* 30.4 MHz */
.if_freq = 5725, /* 5.725 MHz */
.if_neg_center = 0,
.ext_adc = 0,
.adc_signed = 0,
.if_neg_edge = 0,
};
static int cxusb_d680_dmb_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dvb_usb_device *d = adap->dev;
int n;
/* Select required USB configuration */
if (usb_set_interface(d->udev, 0, 0) < 0)
err("set interface failed");
/* Unblock all USB pipes */
usb_clear_halt(d->udev,
usb_sndbulkpipe(d->udev,
d->props.generic_bulk_ctrl_endpoint));
usb_clear_halt(d->udev,
usb_rcvbulkpipe(d->udev,
d->props.generic_bulk_ctrl_endpoint));
usb_clear_halt(d->udev,
usb_rcvbulkpipe(d->udev,
d->props.adapter[0].fe[0].stream.endpoint));
/* Drain USB pipes to avoid hang after reboot */
for (n = 0; n < 5; n++) {
cxusb_d680_dmb_drain_message(d);
cxusb_d680_dmb_drain_video(d);
msleep(200);
}
/* Reset the tuner */
if (cxusb_d680_dmb_gpio_tuner(d, 0x07, 0) < 0) {
err("clear tuner gpio failed");
return -EIO;
}
msleep(100);
if (cxusb_d680_dmb_gpio_tuner(d, 0x07, 1) < 0) {
err("set tuner gpio failed");
return -EIO;
}
msleep(100);
/* Attach frontend */
adap->fe_adap[0].fe = dvb_attach(lgs8gxx_attach,
&d680_lgs8gl5_cfg, &d->i2c_adap);
if (!adap->fe_adap[0].fe)
return -EIO;
return 0;
}
static struct atbm8830_config mygica_d689_atbm8830_cfg = {
.prod = ATBM8830_PROD_8830,
.demod_address = 0x40,
.serial_ts = 0,
.ts_sampling_edge = 1,
.ts_clk_gated = 0,
.osc_clk_freq = 30400, /* in kHz */
.if_freq = 0, /* zero IF */
.zif_swap_iq = 1,
.agc_min = 0x2E,
.agc_max = 0x90,
.agc_hold_loop = 0,
};
static int cxusb_mygica_d689_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dvb_usb_device *d = adap->dev;
/* Select required USB configuration */
if (usb_set_interface(d->udev, 0, 0) < 0)
err("set interface failed");
/* Unblock all USB pipes */
usb_clear_halt(d->udev,
usb_sndbulkpipe(d->udev,
d->props.generic_bulk_ctrl_endpoint));
usb_clear_halt(d->udev,
usb_rcvbulkpipe(d->udev,
d->props.generic_bulk_ctrl_endpoint));
usb_clear_halt(d->udev,
usb_rcvbulkpipe(d->udev,
d->props.adapter[0].fe[0].stream.endpoint));
/* Reset the tuner */
if (cxusb_d680_dmb_gpio_tuner(d, 0x07, 0) < 0) {
err("clear tuner gpio failed");
return -EIO;
}
msleep(100);
if (cxusb_d680_dmb_gpio_tuner(d, 0x07, 1) < 0) {
err("set tuner gpio failed");
return -EIO;
}
msleep(100);
/* Attach frontend */
adap->fe_adap[0].fe = dvb_attach(atbm8830_attach,
&mygica_d689_atbm8830_cfg,
&d->i2c_adap);
if (!adap->fe_adap[0].fe)
return -EIO;
return 0;
}
/*
* DViCO has shipped two devices with the same USB ID, but only one of them
* needs a firmware download. Check the device class details to see if they
* have non-default values to decide whether the device is actually cold or
* not, and forget a match if it turns out we selected the wrong device.
*/
static int bluebird_fx2_identify_state(struct usb_device *udev,
const struct dvb_usb_device_properties *props,
const struct dvb_usb_device_description **desc,
int *cold)
{
int wascold = *cold;
*cold = udev->descriptor.bDeviceClass == 0xff &&
udev->descriptor.bDeviceSubClass == 0xff &&
udev->descriptor.bDeviceProtocol == 0xff;
if (*cold && !wascold)
*desc = NULL;
return 0;
}
/*
* DViCO bluebird firmware needs the "warm" product ID to be patched into the
* firmware file before download.
*/
static const int dvico_firmware_id_offsets[] = { 6638, 3204 };
static int bluebird_patch_dvico_firmware_download(struct usb_device *udev,
const struct firmware *fw)
{
int pos;
for (pos = 0; pos < ARRAY_SIZE(dvico_firmware_id_offsets); pos++) {
int idoff = dvico_firmware_id_offsets[pos];
if (fw->size < idoff + 4)
continue;
if (fw->data[idoff] == (USB_VID_DVICO & 0xff) &&
fw->data[idoff + 1] == USB_VID_DVICO >> 8) {
struct firmware new_fw;
u8 *new_fw_data = vmalloc(fw->size);
int ret;
if (!new_fw_data)
return -ENOMEM;
memcpy(new_fw_data, fw->data, fw->size);
new_fw.size = fw->size;
new_fw.data = new_fw_data;
new_fw_data[idoff + 2] =
le16_to_cpu(udev->descriptor.idProduct) + 1;
new_fw_data[idoff + 3] =
le16_to_cpu(udev->descriptor.idProduct) >> 8;
ret = usb_cypress_load_firmware(udev, &new_fw,
CYPRESS_FX2);
vfree(new_fw_data);
return ret;
}
}
return -EINVAL;
}
int cxusb_medion_get(struct dvb_usb_device *dvbdev,
enum cxusb_open_type open_type)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
int ret = 0;
mutex_lock(&cxdev->open_lock);
if (WARN_ON((cxdev->open_type == CXUSB_OPEN_INIT ||
cxdev->open_type == CXUSB_OPEN_NONE) &&
cxdev->open_ctr != 0)) {
ret = -EINVAL;
goto ret_unlock;
}
if (cxdev->open_type == CXUSB_OPEN_INIT) {
ret = -EAGAIN;
goto ret_unlock;
}
if (cxdev->open_ctr == 0) {
if (cxdev->open_type != open_type) {
dev_info(&dvbdev->udev->dev, "will acquire and switch to %s\n",
open_type == CXUSB_OPEN_ANALOG ?
"analog" : "digital");
if (open_type == CXUSB_OPEN_ANALOG) {
ret = _cxusb_power_ctrl(dvbdev, 1);
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"powerup for analog switch failed (%d)\n",
ret);
ret = cxusb_medion_set_mode(dvbdev, false);
if (ret != 0)
goto ret_unlock;
ret = cxusb_medion_analog_init(dvbdev);
if (ret != 0)
goto ret_unlock;
} else { /* digital */
ret = _cxusb_power_ctrl(dvbdev, 1);
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"powerup for digital switch failed (%d)\n",
ret);
ret = cxusb_medion_set_mode(dvbdev, true);
if (ret != 0)
goto ret_unlock;
}
cxdev->open_type = open_type;
} else {
dev_info(&dvbdev->udev->dev, "reacquired idle %s\n",
open_type == CXUSB_OPEN_ANALOG ?
"analog" : "digital");
}
cxdev->open_ctr = 1;
} else if (cxdev->open_type == open_type) {
cxdev->open_ctr++;
dev_info(&dvbdev->udev->dev, "acquired %s\n",
open_type == CXUSB_OPEN_ANALOG ? "analog" : "digital");
} else {
ret = -EBUSY;
}
ret_unlock:
mutex_unlock(&cxdev->open_lock);
return ret;
}
void cxusb_medion_put(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
mutex_lock(&cxdev->open_lock);
if (cxdev->open_type == CXUSB_OPEN_INIT) {
WARN_ON(cxdev->open_ctr != 0);
cxdev->open_type = CXUSB_OPEN_NONE;
goto unlock;
}
if (!WARN_ON(cxdev->open_ctr < 1)) {
cxdev->open_ctr--;
dev_info(&dvbdev->udev->dev, "release %s\n",
cxdev->open_type == CXUSB_OPEN_ANALOG ?
"analog" : "digital");
}
unlock:
mutex_unlock(&cxdev->open_lock);
}
/* DVB USB Driver stuff */
static struct dvb_usb_device_properties cxusb_medion_properties;
static struct dvb_usb_device_properties cxusb_bluebird_lgh064f_properties;
static struct dvb_usb_device_properties cxusb_bluebird_dee1601_properties;
static struct dvb_usb_device_properties cxusb_bluebird_lgz201_properties;
static struct dvb_usb_device_properties cxusb_bluebird_dtt7579_properties;
static struct dvb_usb_device_properties cxusb_bluebird_dualdig4_properties;
static struct dvb_usb_device_properties cxusb_bluebird_dualdig4_rev2_properties;
static struct dvb_usb_device_properties cxusb_bluebird_nano2_properties;
static struct dvb_usb_device_properties cxusb_bluebird_nano2_needsfirmware_properties;
static struct dvb_usb_device_properties cxusb_aver_a868r_properties;
static struct dvb_usb_device_properties cxusb_d680_dmb_properties;
static struct dvb_usb_device_properties cxusb_mygica_d689_properties;
static int cxusb_medion_priv_init(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
cxdev->dvbdev = dvbdev;
cxdev->open_type = CXUSB_OPEN_INIT;
mutex_init(&cxdev->open_lock);
return 0;
}
static void cxusb_medion_priv_destroy(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
mutex_destroy(&cxdev->open_lock);
}
static bool cxusb_medion_check_altsetting(struct usb_host_interface *as)
{
unsigned int ctr;
for (ctr = 0; ctr < as->desc.bNumEndpoints; ctr++) {
if ((as->endpoint[ctr].desc.bEndpointAddress &
USB_ENDPOINT_NUMBER_MASK) != 2)
continue;
if (as->endpoint[ctr].desc.bEndpointAddress & USB_DIR_IN &&
((as->endpoint[ctr].desc.bmAttributes &
USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_ISOC))
return true;
break;
}
return false;
}
static bool cxusb_medion_check_intf(struct usb_interface *intf)
{
unsigned int ctr;
if (intf->num_altsetting < 2) {
dev_err(intf->usb_dev, "no alternate interface");
return false;
}
for (ctr = 0; ctr < intf->num_altsetting; ctr++) {
if (intf->altsetting[ctr].desc.bAlternateSetting != 1)
continue;
if (cxusb_medion_check_altsetting(&intf->altsetting[ctr]))
return true;
break;
}
dev_err(intf->usb_dev, "no iso interface");
return false;
}
static int cxusb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct dvb_usb_device *dvbdev;
int ret;
/* Medion 95700 */
if (!dvb_usb_device_init(intf, &cxusb_medion_properties,
THIS_MODULE, &dvbdev, adapter_nr)) {
if (!cxusb_medion_check_intf(intf)) {
ret = -ENODEV;
goto ret_uninit;
}
_cxusb_power_ctrl(dvbdev, 1);
ret = cxusb_medion_set_mode(dvbdev, false);
if (ret)
goto ret_uninit;
ret = cxusb_medion_register_analog(dvbdev);
cxusb_medion_set_mode(dvbdev, true);
_cxusb_power_ctrl(dvbdev, 0);
if (ret != 0)
goto ret_uninit;
/* release device from INIT mode to normal operation */
cxusb_medion_put(dvbdev);
return 0;
} else if (!dvb_usb_device_init(intf,
&cxusb_bluebird_lgh064f_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf,
&cxusb_bluebird_dee1601_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf,
&cxusb_bluebird_lgz201_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf,
&cxusb_bluebird_dtt7579_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf,
&cxusb_bluebird_dualdig4_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf,
&cxusb_bluebird_nano2_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf,
&cxusb_bluebird_nano2_needsfirmware_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf, &cxusb_aver_a868r_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf,
&cxusb_bluebird_dualdig4_rev2_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf, &cxusb_d680_dmb_properties,
THIS_MODULE, NULL, adapter_nr) ||
!dvb_usb_device_init(intf, &cxusb_mygica_d689_properties,
THIS_MODULE, NULL, adapter_nr) ||
0)
return 0;
return -EINVAL;
ret_uninit:
dvb_usb_device_exit(intf);
return ret;
}
static void cxusb_disconnect(struct usb_interface *intf)
{
struct dvb_usb_device *d = usb_get_intfdata(intf);
struct cxusb_state *st = d->priv;
struct i2c_client *client;
if (d->props.devices[0].warm_ids[0] == &cxusb_table[MEDION_MD95700])
cxusb_medion_unregister_analog(d);
/* remove I2C client for tuner */
client = st->i2c_client_tuner;
if (client) {
module_put(client->dev.driver->owner);
i2c_unregister_device(client);
}
/* remove I2C client for demodulator */
client = st->i2c_client_demod;
if (client) {
module_put(client->dev.driver->owner);
i2c_unregister_device(client);
}
dvb_usb_device_exit(intf);
}
static struct usb_device_id cxusb_table[] = {
DVB_USB_DEV(MEDION, MEDION_MD95700),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_LG064F_COLD),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_LG064F_WARM),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DUAL_1_COLD),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DUAL_1_WARM),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_LGZ201_COLD),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_LGZ201_WARM),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_TH7579_COLD),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_TH7579_WARM),
DVB_USB_DEV(DVICO, DIGITALNOW_BLUEBIRD_DUAL_1_COLD),
DVB_USB_DEV(DVICO, DIGITALNOW_BLUEBIRD_DUAL_1_WARM),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DUAL_2_COLD),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DUAL_2_WARM),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DUAL_4),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DVB_T_NANO_2),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DVB_T_NANO_2_NFW_WARM),
DVB_USB_DEV(AVERMEDIA, AVERMEDIA_VOLAR_A868R),
DVB_USB_DEV(DVICO, DVICO_BLUEBIRD_DUAL_4_REV_2),
DVB_USB_DEV(CONEXANT, CONEXANT_D680_DMB),
DVB_USB_DEV(CONEXANT, MYGICA_D689),
{ }
};
MODULE_DEVICE_TABLE(usb, cxusb_table);
static struct dvb_usb_device_properties cxusb_medion_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.size_of_priv = sizeof(struct cxusb_medion_dev),
.priv_init = cxusb_medion_priv_init,
.priv_destroy = cxusb_medion_priv_destroy,
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_cx22702_frontend_attach,
.tuner_attach = cxusb_fmd1216me_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{
"Medion MD95700 (MDUSBTV-HYBRID)",
{ NULL },
{ &cxusb_table[MEDION_MD95700], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_bluebird_lgh064f_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-bluebird-01.fw",
.download_firmware = bluebird_patch_dvico_firmware_download,
/*
* use usb alt setting 0 for EP4 transfer (dvb-t),
* use usb alt setting 7 for EP2 transfer (atsc)
*/
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_lgdt3303_frontend_attach,
.tuner_attach = cxusb_lgh064f_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_bluebird_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_PORTABLE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "DViCO FusionHDTV5 USB Gold",
{ &cxusb_table[DVICO_BLUEBIRD_LG064F_COLD], NULL },
{ &cxusb_table[DVICO_BLUEBIRD_LG064F_WARM], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_bluebird_dee1601_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-bluebird-01.fw",
.download_firmware = bluebird_patch_dvico_firmware_download,
/*
* use usb alt setting 0 for EP4 transfer (dvb-t),
* use usb alt setting 7 for EP2 transfer (atsc)
*/
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_dee1601_frontend_attach,
.tuner_attach = cxusb_dee1601_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x04,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_bluebird_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_MCE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 3,
.devices = {
{ "DViCO FusionHDTV DVB-T Dual USB",
{ &cxusb_table[DVICO_BLUEBIRD_DUAL_1_COLD], NULL },
{ &cxusb_table[DVICO_BLUEBIRD_DUAL_1_WARM], NULL },
},
{ "DigitalNow DVB-T Dual USB",
{ &cxusb_table[DIGITALNOW_BLUEBIRD_DUAL_1_COLD], NULL },
{ &cxusb_table[DIGITALNOW_BLUEBIRD_DUAL_1_WARM], NULL },
},
{ "DViCO FusionHDTV DVB-T Dual Digital 2",
{ &cxusb_table[DVICO_BLUEBIRD_DUAL_2_COLD], NULL },
{ &cxusb_table[DVICO_BLUEBIRD_DUAL_2_WARM], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_bluebird_lgz201_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-bluebird-01.fw",
.download_firmware = bluebird_patch_dvico_firmware_download,
/*
* use usb alt setting 0 for EP4 transfer (dvb-t),
* use usb alt setting 7 for EP2 transfer (atsc)
*/
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_mt352_frontend_attach,
.tuner_attach = cxusb_lgz201_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x04,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_bluebird_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_PORTABLE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "DViCO FusionHDTV DVB-T USB (LGZ201)",
{ &cxusb_table[DVICO_BLUEBIRD_LGZ201_COLD], NULL },
{ &cxusb_table[DVICO_BLUEBIRD_LGZ201_WARM], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_bluebird_dtt7579_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-bluebird-01.fw",
.download_firmware = bluebird_patch_dvico_firmware_download,
/*
* use usb alt setting 0 for EP4 transfer (dvb-t),
* use usb alt setting 7 for EP2 transfer (atsc)
*/
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_mt352_frontend_attach,
.tuner_attach = cxusb_dtt7579_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x04,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_bluebird_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_PORTABLE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "DViCO FusionHDTV DVB-T USB (TH7579)",
{ &cxusb_table[DVICO_BLUEBIRD_TH7579_COLD], NULL },
{ &cxusb_table[DVICO_BLUEBIRD_TH7579_WARM], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_bluebird_dualdig4_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_dualdig4_frontend_attach,
.tuner_attach = cxusb_dvico_xc3028_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_MCE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_bluebird2_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.num_device_descs = 1,
.devices = {
{ "DViCO FusionHDTV DVB-T Dual Digital 4",
{ NULL },
{ &cxusb_table[DVICO_BLUEBIRD_DUAL_4], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_bluebird_nano2_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.identify_state = bluebird_fx2_identify_state,
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_nano2_frontend_attach,
.tuner_attach = cxusb_dvico_xc3028_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_nano2_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_PORTABLE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_bluebird2_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.num_device_descs = 1,
.devices = {
{ "DViCO FusionHDTV DVB-T NANO2",
{ NULL },
{ &cxusb_table[DVICO_BLUEBIRD_DVB_T_NANO_2], NULL },
},
}
};
static struct dvb_usb_device_properties
cxusb_bluebird_nano2_needsfirmware_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = DEVICE_SPECIFIC,
.firmware = "dvb-usb-bluebird-02.fw",
.download_firmware = bluebird_patch_dvico_firmware_download,
.identify_state = bluebird_fx2_identify_state,
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_nano2_frontend_attach,
.tuner_attach = cxusb_dvico_xc3028_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_nano2_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_PORTABLE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.num_device_descs = 1,
.devices = { {
"DViCO FusionHDTV DVB-T NANO2 w/o firmware",
{ &cxusb_table[DVICO_BLUEBIRD_DVB_T_NANO_2], NULL },
{ &cxusb_table[DVICO_BLUEBIRD_DVB_T_NANO_2_NFW_WARM],
NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_aver_a868r_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_aver_streaming_ctrl,
.frontend_attach = cxusb_aver_lgdt3303_frontend_attach,
.tuner_attach = cxusb_mxl5003s_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x04,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_aver_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "AVerMedia AVerTVHD Volar (A868R)",
{ NULL },
{ &cxusb_table[AVERMEDIA_VOLAR_A868R], NULL },
},
}
};
static
struct dvb_usb_device_properties cxusb_bluebird_dualdig4_rev2_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.size_of_priv = sizeof(struct dib0700_adapter_state),
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_streaming_ctrl,
.frontend_attach = cxusb_dualdig4_rev2_frontend_attach,
.tuner_attach = cxusb_dualdig4_rev2_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
} },
},
},
.power_ctrl = cxusb_bluebird_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_DVICO_MCE,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_rc_query,
.allowed_protos = RC_PROTO_BIT_NEC,
},
.num_device_descs = 1,
.devices = {
{ "DViCO FusionHDTV DVB-T Dual Digital 4 (rev 2)",
{ NULL },
{ &cxusb_table[DVICO_BLUEBIRD_DUAL_4_REV_2], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_d680_dmb_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_d680_dmb_streaming_ctrl,
.frontend_attach = cxusb_d680_dmb_frontend_attach,
.tuner_attach = cxusb_d680_dmb_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_d680_dmb_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_TOTAL_MEDIA_IN_HAND_02,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_d680_dmb_rc_query,
.allowed_protos = RC_PROTO_BIT_UNKNOWN,
},
.num_device_descs = 1,
.devices = {
{
"Conexant DMB-TH Stick",
{ NULL },
{ &cxusb_table[CONEXANT_D680_DMB], NULL },
},
}
};
static struct dvb_usb_device_properties cxusb_mygica_d689_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.size_of_priv = sizeof(struct cxusb_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = cxusb_d680_dmb_streaming_ctrl,
.frontend_attach = cxusb_mygica_d689_frontend_attach,
.tuner_attach = cxusb_mygica_d689_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 5,
.endpoint = 0x02,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
} },
},
},
.power_ctrl = cxusb_d680_dmb_power_ctrl,
.i2c_algo = &cxusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.rc.core = {
.rc_interval = 100,
.rc_codes = RC_MAP_D680_DMB,
.module_name = KBUILD_MODNAME,
.rc_query = cxusb_d680_dmb_rc_query,
.allowed_protos = RC_PROTO_BIT_UNKNOWN,
},
.num_device_descs = 1,
.devices = {
{
"Mygica D689 DMB-TH",
{ NULL },
{ &cxusb_table[MYGICA_D689], NULL },
},
}
};
static struct usb_driver cxusb_driver = {
.name = "dvb_usb_cxusb",
.probe = cxusb_probe,
.disconnect = cxusb_disconnect,
.id_table = cxusb_table,
};
module_usb_driver(cxusb_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_AUTHOR("Michael Krufky <[email protected]>");
MODULE_AUTHOR("Chris Pascoe <[email protected]>");
MODULE_AUTHOR("Maciej S. Szmigiero <[email protected]>");
MODULE_DESCRIPTION("Driver for Conexant USB2.0 hybrid reference design");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/cxusb.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB framework compliant Linux driver for the HanfTek UMT-010 USB2.0
* DVB-T receiver.
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dibusb.h"
#include "mt352.h"
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
static int umt_mt352_demod_init(struct dvb_frontend *fe)
{
static u8 mt352_clock_config[] = { 0x89, 0xb8, 0x2d };
static u8 mt352_reset[] = { 0x50, 0x80 };
static u8 mt352_mclk_ratio[] = { 0x8b, 0x00 };
static u8 mt352_adc_ctl_1_cfg[] = { 0x8E, 0x40 };
static u8 mt352_agc_cfg[] = { 0x67, 0x10, 0xa0 };
static u8 mt352_sec_agc_cfg1[] = { 0x6a, 0xff };
static u8 mt352_sec_agc_cfg2[] = { 0x6d, 0xff };
static u8 mt352_sec_agc_cfg3[] = { 0x70, 0x40 };
static u8 mt352_sec_agc_cfg4[] = { 0x7b, 0x03 };
static u8 mt352_sec_agc_cfg5[] = { 0x7d, 0x0f };
static u8 mt352_acq_ctl[] = { 0x53, 0x50 };
static u8 mt352_input_freq_1[] = { 0x56, 0x31, 0x06 };
mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
udelay(2000);
mt352_write(fe, mt352_reset, sizeof(mt352_reset));
mt352_write(fe, mt352_mclk_ratio, sizeof(mt352_mclk_ratio));
mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg));
mt352_write(fe, mt352_sec_agc_cfg1, sizeof(mt352_sec_agc_cfg1));
mt352_write(fe, mt352_sec_agc_cfg2, sizeof(mt352_sec_agc_cfg2));
mt352_write(fe, mt352_sec_agc_cfg3, sizeof(mt352_sec_agc_cfg3));
mt352_write(fe, mt352_sec_agc_cfg4, sizeof(mt352_sec_agc_cfg4));
mt352_write(fe, mt352_sec_agc_cfg5, sizeof(mt352_sec_agc_cfg5));
mt352_write(fe, mt352_acq_ctl, sizeof(mt352_acq_ctl));
mt352_write(fe, mt352_input_freq_1, sizeof(mt352_input_freq_1));
return 0;
}
static int umt_mt352_frontend_attach(struct dvb_usb_adapter *adap)
{
struct mt352_config umt_config;
memset(&umt_config,0,sizeof(struct mt352_config));
umt_config.demod_init = umt_mt352_demod_init;
umt_config.demod_address = 0xf;
adap->fe_adap[0].fe = dvb_attach(mt352_attach, &umt_config, &adap->dev->i2c_adap);
return 0;
}
static int umt_tuner_attach (struct dvb_usb_adapter *adap)
{
dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x61, NULL, DVB_PLL_TUA6034);
return 0;
}
/* USB Driver stuff */
static struct dvb_usb_device_properties umt_properties;
static int umt_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
if (0 == dvb_usb_device_init(intf, &umt_properties,
THIS_MODULE, NULL, adapter_nr))
return 0;
return -EINVAL;
}
/* do not change the order of the ID table */
enum {
HANFTEK_UMT_010_COLD,
HANFTEK_UMT_010_WARM,
};
static struct usb_device_id umt_table[] = {
DVB_USB_DEV(HANFTEK, HANFTEK_UMT_010_COLD),
DVB_USB_DEV(HANFTEK, HANFTEK_UMT_010_WARM),
{ }
};
MODULE_DEVICE_TABLE (usb, umt_table);
static struct dvb_usb_device_properties umt_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-umt-010-02.fw",
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = dibusb2_0_streaming_ctrl,
.frontend_attach = umt_mt352_frontend_attach,
.tuner_attach = umt_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = MAX_NO_URBS_FOR_DATA_STREAM,
.endpoint = 0x06,
.u = {
.bulk = {
.buffersize = 512,
}
}
},
}},
.size_of_priv = sizeof(struct dibusb_state),
}
},
.power_ctrl = dibusb_power_ctrl,
.i2c_algo = &dibusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 1,
.devices = {
{ "Hanftek UMT-010 DVB-T USB2.0",
{ &umt_table[HANFTEK_UMT_010_COLD], NULL },
{ &umt_table[HANFTEK_UMT_010_WARM], NULL },
},
}
};
static struct usb_driver umt_driver = {
.name = "dvb_usb_umt_010",
.probe = umt_probe,
.disconnect = dvb_usb_device_exit,
.id_table = umt_table,
};
module_usb_driver(umt_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for HanfTek UMT 010 USB2.0 DVB-T device");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/umt-010.c |
// SPDX-License-Identifier: GPL-2.0-only
/* Frontend part of the Linux driver for the WideView/ Yakumo/ Hama/
* Typhoon/ Yuan DVB-T USB2.0 receiver.
*
* Copyright (C) 2005 Patrick Boettcher <[email protected]>
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dtt200u.h"
struct dtt200u_fe_state {
struct dvb_usb_device *d;
enum fe_status stat;
struct dtv_frontend_properties fep;
struct dvb_frontend frontend;
unsigned char data[80];
struct mutex data_mutex;
};
static int dtt200u_fe_read_status(struct dvb_frontend *fe,
enum fe_status *stat)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
int ret;
mutex_lock(&state->data_mutex);
state->data[0] = GET_TUNE_STATUS;
ret = dvb_usb_generic_rw(state->d, state->data, 1, state->data, 3, 0);
if (ret < 0) {
*stat = 0;
mutex_unlock(&state->data_mutex);
return ret;
}
switch (state->data[0]) {
case 0x01:
*stat = FE_HAS_SIGNAL | FE_HAS_CARRIER |
FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
break;
case 0x00: /* pending */
*stat = FE_TIMEDOUT; /* during set_frontend */
break;
default:
case 0x02: /* failed */
*stat = 0;
break;
}
mutex_unlock(&state->data_mutex);
return 0;
}
static int dtt200u_fe_read_ber(struct dvb_frontend* fe, u32 *ber)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
int ret;
mutex_lock(&state->data_mutex);
state->data[0] = GET_VIT_ERR_CNT;
ret = dvb_usb_generic_rw(state->d, state->data, 1, state->data, 3, 0);
if (ret >= 0)
*ber = (state->data[0] << 16) | (state->data[1] << 8) | state->data[2];
mutex_unlock(&state->data_mutex);
return ret;
}
static int dtt200u_fe_read_unc_blocks(struct dvb_frontend* fe, u32 *unc)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
int ret;
mutex_lock(&state->data_mutex);
state->data[0] = GET_RS_UNCOR_BLK_CNT;
ret = dvb_usb_generic_rw(state->d, state->data, 1, state->data, 2, 0);
if (ret >= 0)
*unc = (state->data[0] << 8) | state->data[1];
mutex_unlock(&state->data_mutex);
return ret;
}
static int dtt200u_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
int ret;
mutex_lock(&state->data_mutex);
state->data[0] = GET_AGC;
ret = dvb_usb_generic_rw(state->d, state->data, 1, state->data, 1, 0);
if (ret >= 0)
*strength = (state->data[0] << 8) | state->data[0];
mutex_unlock(&state->data_mutex);
return ret;
}
static int dtt200u_fe_read_snr(struct dvb_frontend* fe, u16 *snr)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
int ret;
mutex_lock(&state->data_mutex);
state->data[0] = GET_SNR;
ret = dvb_usb_generic_rw(state->d, state->data, 1, state->data, 1, 0);
if (ret >= 0)
*snr = ~((state->data[0] << 8) | state->data[0]);
mutex_unlock(&state->data_mutex);
return ret;
}
static int dtt200u_fe_init(struct dvb_frontend* fe)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
int ret;
mutex_lock(&state->data_mutex);
state->data[0] = SET_INIT;
ret = dvb_usb_generic_write(state->d, state->data, 1);
mutex_unlock(&state->data_mutex);
return ret;
}
static int dtt200u_fe_sleep(struct dvb_frontend* fe)
{
return dtt200u_fe_init(fe);
}
static int dtt200u_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
{
tune->min_delay_ms = 1500;
tune->step_size = 0;
tune->max_drift = 0;
return 0;
}
static int dtt200u_fe_set_frontend(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
struct dtt200u_fe_state *state = fe->demodulator_priv;
int ret;
u16 freq = fep->frequency / 250000;
mutex_lock(&state->data_mutex);
state->data[0] = SET_BANDWIDTH;
switch (fep->bandwidth_hz) {
case 8000000:
state->data[1] = 8;
break;
case 7000000:
state->data[1] = 7;
break;
case 6000000:
state->data[1] = 6;
break;
default:
ret = -EINVAL;
goto ret;
}
ret = dvb_usb_generic_write(state->d, state->data, 2);
if (ret < 0)
goto ret;
state->data[0] = SET_RF_FREQ;
state->data[1] = freq & 0xff;
state->data[2] = (freq >> 8) & 0xff;
ret = dvb_usb_generic_write(state->d, state->data, 3);
if (ret < 0)
goto ret;
ret:
mutex_unlock(&state->data_mutex);
return ret;
}
static int dtt200u_fe_get_frontend(struct dvb_frontend* fe,
struct dtv_frontend_properties *fep)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
memcpy(fep, &state->fep, sizeof(struct dtv_frontend_properties));
return 0;
}
static void dtt200u_fe_release(struct dvb_frontend* fe)
{
struct dtt200u_fe_state *state = fe->demodulator_priv;
kfree(state);
}
static const struct dvb_frontend_ops dtt200u_fe_ops;
struct dvb_frontend* dtt200u_fe_attach(struct dvb_usb_device *d)
{
struct dtt200u_fe_state* state = NULL;
/* allocate memory for the internal state */
state = kzalloc(sizeof(struct dtt200u_fe_state), GFP_KERNEL);
if (state == NULL)
goto error;
deb_info("attaching frontend dtt200u\n");
state->d = d;
mutex_init(&state->data_mutex);
memcpy(&state->frontend.ops,&dtt200u_fe_ops,sizeof(struct dvb_frontend_ops));
state->frontend.demodulator_priv = state;
return &state->frontend;
error:
return NULL;
}
static const struct dvb_frontend_ops dtt200u_fe_ops = {
.delsys = { SYS_DVBT },
.info = {
.name = "WideView USB DVB-T",
.frequency_min_hz = 44250 * kHz,
.frequency_max_hz = 867250 * kHz,
.frequency_stepsize_hz = 250 * kHz,
.caps = FE_CAN_INVERSION_AUTO |
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
FE_CAN_TRANSMISSION_MODE_AUTO |
FE_CAN_GUARD_INTERVAL_AUTO |
FE_CAN_RECOVER |
FE_CAN_HIERARCHY_AUTO,
},
.release = dtt200u_fe_release,
.init = dtt200u_fe_init,
.sleep = dtt200u_fe_sleep,
.set_frontend = dtt200u_fe_set_frontend,
.get_frontend = dtt200u_fe_get_frontend,
.get_tune_settings = dtt200u_fe_get_tune_settings,
.read_status = dtt200u_fe_read_status,
.read_ber = dtt200u_fe_read_ber,
.read_signal_strength = dtt200u_fe_read_signal_strength,
.read_snr = dtt200u_fe_read_snr,
.read_ucblocks = dtt200u_fe_read_unc_blocks,
};
| linux-master | drivers/media/usb/dvb-usb/dtt200u-fe.c |
// SPDX-License-Identifier: GPL-2.0
/* dvb-usb-firmware.c is part of the DVB USB library.
*
* Copyright (C) 2004-6 Patrick Boettcher ([email protected])
* see dvb-usb-init.c for copyright information.
*
* This file contains functions for downloading the firmware to Cypress FX 1 and 2 based devices.
*
* FIXME: This part does actually not belong to dvb-usb, but to the usb-subsystem.
*/
#include "dvb-usb-common.h"
#include <linux/usb.h>
struct usb_cypress_controller {
int id;
const char *name; /* name of the usb controller */
u16 cpu_cs_register; /* needs to be restarted, when the firmware has been downloaded. */
};
static struct usb_cypress_controller cypress[] = {
{ .id = DEVICE_SPECIFIC, .name = "Device specific", .cpu_cs_register = 0 },
{ .id = CYPRESS_AN2135, .name = "Cypress AN2135", .cpu_cs_register = 0x7f92 },
{ .id = CYPRESS_AN2235, .name = "Cypress AN2235", .cpu_cs_register = 0x7f92 },
{ .id = CYPRESS_FX2, .name = "Cypress FX2", .cpu_cs_register = 0xe600 },
};
/*
* load a firmware packet to the device
*/
static int usb_cypress_writemem(struct usb_device *udev,u16 addr,u8 *data, u8 len)
{
return usb_control_msg(udev, usb_sndctrlpipe(udev,0),
0xa0, USB_TYPE_VENDOR, addr, 0x00, data, len, 5000);
}
int usb_cypress_load_firmware(struct usb_device *udev, const struct firmware *fw, int type)
{
struct hexline *hx;
u8 *buf;
int ret, pos = 0;
u16 cpu_cs_register = cypress[type].cpu_cs_register;
buf = kmalloc(sizeof(*hx), GFP_KERNEL);
if (!buf)
return -ENOMEM;
hx = (struct hexline *)buf;
/* stop the CPU */
buf[0] = 1;
if (usb_cypress_writemem(udev, cpu_cs_register, buf, 1) != 1)
err("could not stop the USB controller CPU.");
while ((ret = dvb_usb_get_hexline(fw, hx, &pos)) > 0) {
deb_fw("writing to address 0x%04x (buffer: 0x%02x %02x)\n", hx->addr, hx->len, hx->chk);
ret = usb_cypress_writemem(udev, hx->addr, hx->data, hx->len);
if (ret != hx->len) {
err("error while transferring firmware (transferred size: %d, block size: %d)",
ret, hx->len);
ret = -EINVAL;
break;
}
}
if (ret < 0) {
err("firmware download failed at %d with %d",pos,ret);
kfree(buf);
return ret;
}
if (ret == 0) {
/* restart the CPU */
buf[0] = 0;
if (usb_cypress_writemem(udev, cpu_cs_register, buf, 1) != 1) {
err("could not restart the USB controller CPU.");
ret = -EINVAL;
}
} else
ret = -EIO;
kfree(buf);
return ret;
}
EXPORT_SYMBOL(usb_cypress_load_firmware);
int dvb_usb_download_firmware(struct usb_device *udev,
const struct dvb_usb_device_properties *props)
{
int ret;
const struct firmware *fw = NULL;
if ((ret = request_firmware(&fw, props->firmware, &udev->dev)) != 0) {
err("did not find the firmware file '%s' (status %d). You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware",
props->firmware,ret);
return ret;
}
info("downloading firmware from file '%s'",props->firmware);
switch (props->usb_ctrl) {
case CYPRESS_AN2135:
case CYPRESS_AN2235:
case CYPRESS_FX2:
ret = usb_cypress_load_firmware(udev, fw, props->usb_ctrl);
break;
case DEVICE_SPECIFIC:
if (props->download_firmware)
ret = props->download_firmware(udev,fw);
else {
err("BUG: driver didn't specified a download_firmware-callback, although it claims to have a DEVICE_SPECIFIC one.");
ret = -EINVAL;
}
break;
default:
ret = -EINVAL;
break;
}
release_firmware(fw);
return ret;
}
int dvb_usb_get_hexline(const struct firmware *fw, struct hexline *hx,
int *pos)
{
u8 *b = (u8 *) &fw->data[*pos];
int data_offs = 4;
if (*pos >= fw->size)
return 0;
memset(hx,0,sizeof(struct hexline));
hx->len = b[0];
if ((*pos + hx->len + 4) >= fw->size)
return -EINVAL;
hx->addr = b[1] | (b[2] << 8);
hx->type = b[3];
if (hx->type == 0x04) {
/* b[4] and b[5] are the Extended linear address record data field */
hx->addr |= (b[4] << 24) | (b[5] << 16);
/* hx->len -= 2;
data_offs += 2; */
}
memcpy(hx->data,&b[data_offs],hx->len);
hx->chk = b[hx->len + data_offs];
*pos += hx->len + 5;
return *pos;
}
EXPORT_SYMBOL(dvb_usb_get_hexline);
| linux-master | drivers/media/usb/dvb-usb/dvb-usb-firmware.c |
// SPDX-License-Identifier: GPL-2.0+
//
// DVB USB compliant linux driver for Conexant USB reference design -
// (analog part).
//
// Copyright (C) 2011, 2017, 2018
// Maciej S. Szmigiero ([email protected])
//
// In case there are new analog / DVB-T hybrid devices released in the market
// using the same general design as Medion MD95700: a CX25840 video decoder
// outputting a BT.656 stream to a USB bridge chip which then forwards it to
// the host in isochronous USB packets this code should be made generic, with
// board specific bits implemented via separate card structures.
//
// This is, however, unlikely as the Medion model was released
// years ago (in 2005).
//
// TODO:
// * audio support,
// * finish radio support (requires audio of course),
// * VBI support,
// * controls support
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/ktime.h>
#include <linux/vmalloc.h>
#include <media/drv-intf/cx25840.h>
#include <media/tuner.h>
#include <media/v4l2-fh.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-subdev.h>
#include <media/videobuf2-vmalloc.h>
#include "cxusb.h"
static int cxusb_medion_v_queue_setup(struct vb2_queue *q,
unsigned int *num_buffers,
unsigned int *num_planes,
unsigned int sizes[],
struct device *alloc_devs[])
{
struct dvb_usb_device *dvbdev = vb2_get_drv_priv(q);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
unsigned int size = cxdev->width * cxdev->height * 2;
if (*num_planes > 0) {
if (*num_planes != 1)
return -EINVAL;
if (sizes[0] < size)
return -EINVAL;
} else {
*num_planes = 1;
sizes[0] = size;
}
return 0;
}
static int cxusb_medion_v_buf_init(struct vb2_buffer *vb)
{
struct dvb_usb_device *dvbdev = vb2_get_drv_priv(vb->vb2_queue);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
cxusb_vprintk(dvbdev, OPS, "buffer init\n");
if (vb2_plane_size(vb, 0) < cxdev->width * cxdev->height * 2)
return -ENOMEM;
cxusb_vprintk(dvbdev, OPS, "buffer OK\n");
return 0;
}
static void cxusb_auxbuf_init(struct dvb_usb_device *dvbdev,
struct cxusb_medion_auxbuf *auxbuf,
u8 *buf, unsigned int len)
{
cxusb_vprintk(dvbdev, AUXB, "initializing auxbuf of len %u\n", len);
auxbuf->buf = buf;
auxbuf->len = len;
auxbuf->paylen = 0;
}
static void cxusb_auxbuf_head_trim(struct dvb_usb_device *dvbdev,
struct cxusb_medion_auxbuf *auxbuf,
unsigned int pos)
{
if (pos == 0)
return;
if (WARN_ON(pos > auxbuf->paylen))
return;
cxusb_vprintk(dvbdev, AUXB,
"trimming auxbuf len by %u to %u\n",
pos, auxbuf->paylen - pos);
memmove(auxbuf->buf, auxbuf->buf + pos, auxbuf->paylen - pos);
auxbuf->paylen -= pos;
}
static unsigned int cxusb_auxbuf_paylen(struct cxusb_medion_auxbuf *auxbuf)
{
return auxbuf->paylen;
}
static bool cxusb_auxbuf_make_space(struct dvb_usb_device *dvbdev,
struct cxusb_medion_auxbuf *auxbuf,
unsigned int howmuch)
{
unsigned int freespace;
if (WARN_ON(howmuch >= auxbuf->len))
howmuch = auxbuf->len - 1;
freespace = auxbuf->len - cxusb_auxbuf_paylen(auxbuf);
cxusb_vprintk(dvbdev, AUXB, "freespace is %u\n", freespace);
if (freespace >= howmuch)
return true;
howmuch -= freespace;
cxusb_vprintk(dvbdev, AUXB, "will overwrite %u bytes of buffer\n",
howmuch);
cxusb_auxbuf_head_trim(dvbdev, auxbuf, howmuch);
return false;
}
/* returns false if some data was overwritten */
static bool cxusb_auxbuf_append_urb(struct dvb_usb_device *dvbdev,
struct cxusb_medion_auxbuf *auxbuf,
struct urb *urb)
{
unsigned long len;
int i;
bool ret;
for (i = 0, len = 0; i < urb->number_of_packets; i++)
len += urb->iso_frame_desc[i].actual_length;
ret = cxusb_auxbuf_make_space(dvbdev, auxbuf, len);
for (i = 0; i < urb->number_of_packets; i++) {
unsigned int to_copy;
to_copy = urb->iso_frame_desc[i].actual_length;
memcpy(auxbuf->buf + auxbuf->paylen, urb->transfer_buffer +
urb->iso_frame_desc[i].offset, to_copy);
auxbuf->paylen += to_copy;
}
return ret;
}
static bool cxusb_auxbuf_copy(struct cxusb_medion_auxbuf *auxbuf,
unsigned int pos, unsigned char *dest,
unsigned int len)
{
if (pos + len > auxbuf->paylen)
return false;
memcpy(dest, auxbuf->buf + pos, len);
return true;
}
static bool cxusb_medion_cf_refc_fld_chg(struct dvb_usb_device *dvbdev,
struct cxusb_bt656_params *bt656,
bool firstfield,
unsigned int maxlines,
unsigned int maxlinesamples,
unsigned char buf[4])
{
bool firstfield_code = (buf[3] & CXUSB_BT656_FIELD_MASK) ==
CXUSB_BT656_FIELD_1;
unsigned int remlines;
if (bt656->line == 0 || firstfield == firstfield_code)
return false;
if (bt656->fmode == LINE_SAMPLES) {
unsigned int remsamples = maxlinesamples -
bt656->linesamples;
cxusb_vprintk(dvbdev, BT656,
"field %c after line %u field change\n",
firstfield ? '1' : '2', bt656->line);
if (bt656->buf && remsamples > 0) {
memset(bt656->buf, 0, remsamples);
bt656->buf += remsamples;
cxusb_vprintk(dvbdev, BT656,
"field %c line %u %u samples still remaining (of %u)\n",
firstfield ? '1' : '2',
bt656->line, remsamples,
maxlinesamples);
}
bt656->line++;
}
remlines = maxlines - bt656->line;
if (bt656->buf && remlines > 0) {
memset(bt656->buf, 0, remlines * maxlinesamples);
bt656->buf += remlines * maxlinesamples;
cxusb_vprintk(dvbdev, BT656,
"field %c %u lines still remaining (of %u)\n",
firstfield ? '1' : '2', remlines,
maxlines);
}
return true;
}
static void cxusb_medion_cf_refc_start_sch(struct dvb_usb_device *dvbdev,
struct cxusb_bt656_params *bt656,
bool firstfield,
unsigned char buf[4])
{
bool firstfield_code = (buf[3] & CXUSB_BT656_FIELD_MASK) ==
CXUSB_BT656_FIELD_1;
bool sav_code = (buf[3] & CXUSB_BT656_SEAV_MASK) ==
CXUSB_BT656_SEAV_SAV;
bool vbi_code = (buf[3] & CXUSB_BT656_VBI_MASK) ==
CXUSB_BT656_VBI_ON;
if (!sav_code || firstfield != firstfield_code)
return;
if (!vbi_code) {
cxusb_vprintk(dvbdev, BT656, "line start @ pos %u\n",
bt656->pos);
bt656->linesamples = 0;
bt656->fmode = LINE_SAMPLES;
} else {
cxusb_vprintk(dvbdev, BT656, "VBI start @ pos %u\n",
bt656->pos);
bt656->fmode = VBI_SAMPLES;
}
}
static void cxusb_medion_cf_refc_line_smpl(struct dvb_usb_device *dvbdev,
struct cxusb_bt656_params *bt656,
bool firstfield,
unsigned int maxlinesamples,
unsigned char buf[4])
{
bool sav_code = (buf[3] & CXUSB_BT656_SEAV_MASK) ==
CXUSB_BT656_SEAV_SAV;
unsigned int remsamples;
if (sav_code)
cxusb_vprintk(dvbdev, BT656,
"SAV in line samples @ line %u, pos %u\n",
bt656->line, bt656->pos);
remsamples = maxlinesamples - bt656->linesamples;
if (bt656->buf && remsamples > 0) {
memset(bt656->buf, 0, remsamples);
bt656->buf += remsamples;
cxusb_vprintk(dvbdev, BT656,
"field %c line %u %u samples still remaining (of %u)\n",
firstfield ? '1' : '2', bt656->line, remsamples,
maxlinesamples);
}
bt656->fmode = START_SEARCH;
bt656->line++;
}
static void cxusb_medion_cf_refc_vbi_smpl(struct dvb_usb_device *dvbdev,
struct cxusb_bt656_params *bt656,
unsigned char buf[4])
{
bool sav_code = (buf[3] & CXUSB_BT656_SEAV_MASK) ==
CXUSB_BT656_SEAV_SAV;
if (sav_code)
cxusb_vprintk(dvbdev, BT656, "SAV in VBI samples @ pos %u\n",
bt656->pos);
bt656->fmode = START_SEARCH;
}
/* returns whether the whole 4-byte code should be skipped in the buffer */
static bool cxusb_medion_cf_ref_code(struct dvb_usb_device *dvbdev,
struct cxusb_bt656_params *bt656,
bool firstfield,
unsigned int maxlines,
unsigned int maxlinesamples,
unsigned char buf[4])
{
if (bt656->fmode == START_SEARCH) {
cxusb_medion_cf_refc_start_sch(dvbdev, bt656, firstfield, buf);
} else if (bt656->fmode == LINE_SAMPLES) {
cxusb_medion_cf_refc_line_smpl(dvbdev, bt656, firstfield,
maxlinesamples, buf);
return false;
} else if (bt656->fmode == VBI_SAMPLES) {
cxusb_medion_cf_refc_vbi_smpl(dvbdev, bt656, buf);
return false;
}
return true;
}
static bool cxusb_medion_cs_start_sch(struct dvb_usb_device *dvbdev,
struct cxusb_medion_auxbuf *auxbuf,
struct cxusb_bt656_params *bt656,
unsigned int maxlinesamples)
{
unsigned char buf[64];
unsigned int idx;
unsigned int tocheck = clamp_t(size_t, maxlinesamples / 4, 3,
sizeof(buf));
if (!cxusb_auxbuf_copy(auxbuf, bt656->pos + 1, buf, tocheck))
return false;
for (idx = 0; idx <= tocheck - 3; idx++)
if (memcmp(buf + idx, CXUSB_BT656_PREAMBLE, 3) == 0) {
bt656->pos += (1 + idx);
return true;
}
cxusb_vprintk(dvbdev, BT656, "line %u early start, pos %u\n",
bt656->line, bt656->pos);
bt656->linesamples = 0;
bt656->fmode = LINE_SAMPLES;
return true;
}
static void cxusb_medion_cs_line_smpl(struct cxusb_bt656_params *bt656,
unsigned int maxlinesamples,
unsigned char val)
{
if (bt656->buf)
*(bt656->buf++) = val;
bt656->linesamples++;
bt656->pos++;
if (bt656->linesamples >= maxlinesamples) {
bt656->fmode = START_SEARCH;
bt656->line++;
}
}
static bool cxusb_medion_copy_samples(struct dvb_usb_device *dvbdev,
struct cxusb_medion_auxbuf *auxbuf,
struct cxusb_bt656_params *bt656,
unsigned int maxlinesamples,
unsigned char val)
{
if (bt656->fmode == START_SEARCH && bt656->line > 0)
return cxusb_medion_cs_start_sch(dvbdev, auxbuf, bt656,
maxlinesamples);
else if (bt656->fmode == LINE_SAMPLES)
cxusb_medion_cs_line_smpl(bt656, maxlinesamples, val);
else /* TODO: copy VBI samples */
bt656->pos++;
return true;
}
static bool cxusb_medion_copy_field(struct dvb_usb_device *dvbdev,
struct cxusb_medion_auxbuf *auxbuf,
struct cxusb_bt656_params *bt656,
bool firstfield,
unsigned int maxlines,
unsigned int maxlinesmpls)
{
while (bt656->line < maxlines) {
unsigned char val;
if (!cxusb_auxbuf_copy(auxbuf, bt656->pos, &val, 1))
break;
if (val == CXUSB_BT656_PREAMBLE[0]) {
unsigned char buf[4];
buf[0] = val;
if (!cxusb_auxbuf_copy(auxbuf, bt656->pos + 1,
buf + 1, 3))
break;
if (buf[1] == CXUSB_BT656_PREAMBLE[1] &&
buf[2] == CXUSB_BT656_PREAMBLE[2]) {
/*
* is this a field change?
* if so, terminate copying the current field
*/
if (cxusb_medion_cf_refc_fld_chg(dvbdev,
bt656,
firstfield,
maxlines,
maxlinesmpls,
buf))
return true;
if (cxusb_medion_cf_ref_code(dvbdev, bt656,
firstfield,
maxlines,
maxlinesmpls,
buf))
bt656->pos += 4;
continue;
}
}
if (!cxusb_medion_copy_samples(dvbdev, auxbuf, bt656,
maxlinesmpls, val))
break;
}
if (bt656->line < maxlines) {
cxusb_vprintk(dvbdev, BT656,
"end of buffer pos = %u, line = %u\n",
bt656->pos, bt656->line);
return false;
}
return true;
}
static bool cxusb_medion_v_process_auxbuf(struct cxusb_medion_dev *cxdev,
bool reset)
{
struct dvb_usb_device *dvbdev = cxdev->dvbdev;
struct cxusb_bt656_params *bt656 = &cxdev->bt656;
/*
* if this is a new frame
* fetch a buffer from list
*/
if (bt656->mode == NEW_FRAME) {
if (!list_empty(&cxdev->buflist)) {
cxdev->vbuf =
list_first_entry(&cxdev->buflist,
struct cxusb_medion_vbuffer,
list);
list_del(&cxdev->vbuf->list);
} else {
dev_warn(&dvbdev->udev->dev, "no free buffers\n");
}
}
if (bt656->mode == NEW_FRAME || reset) {
cxusb_vprintk(dvbdev, URB, "will copy field 1\n");
bt656->pos = 0;
bt656->mode = FIRST_FIELD;
bt656->fmode = START_SEARCH;
bt656->line = 0;
if (cxdev->vbuf) {
cxdev->vbuf->vb2.vb2_buf.timestamp = ktime_get_ns();
bt656->buf = vb2_plane_vaddr(&cxdev->vbuf->vb2.vb2_buf,
0);
}
}
if (bt656->mode == FIRST_FIELD) {
if (!cxusb_medion_copy_field(dvbdev, &cxdev->auxbuf, bt656,
true, cxdev->height / 2,
cxdev->width * 2))
return false;
/*
* do not trim buffer there in case
* we need to reset the search later
*/
cxusb_vprintk(dvbdev, URB, "will copy field 2\n");
bt656->mode = SECOND_FIELD;
bt656->fmode = START_SEARCH;
bt656->line = 0;
}
if (bt656->mode == SECOND_FIELD) {
if (!cxusb_medion_copy_field(dvbdev, &cxdev->auxbuf, bt656,
false, cxdev->height / 2,
cxdev->width * 2))
return false;
cxusb_auxbuf_head_trim(dvbdev, &cxdev->auxbuf, bt656->pos);
bt656->mode = NEW_FRAME;
if (cxdev->vbuf) {
vb2_set_plane_payload(&cxdev->vbuf->vb2.vb2_buf, 0,
cxdev->width * cxdev->height * 2);
cxdev->vbuf->vb2.field = cxdev->field_order;
cxdev->vbuf->vb2.sequence = cxdev->vbuf_sequence++;
vb2_buffer_done(&cxdev->vbuf->vb2.vb2_buf,
VB2_BUF_STATE_DONE);
cxdev->vbuf = NULL;
cxdev->bt656.buf = NULL;
cxusb_vprintk(dvbdev, URB, "frame done\n");
} else {
cxusb_vprintk(dvbdev, URB, "frame skipped\n");
cxdev->vbuf_sequence++;
}
}
return true;
}
static bool cxusb_medion_v_complete_handle_urb(struct cxusb_medion_dev *cxdev,
bool *auxbuf_reset)
{
struct dvb_usb_device *dvbdev = cxdev->dvbdev;
unsigned int urbn;
struct urb *urb;
int ret;
*auxbuf_reset = false;
urbn = cxdev->nexturb;
if (!test_bit(urbn, &cxdev->urbcomplete))
return false;
clear_bit(urbn, &cxdev->urbcomplete);
do {
cxdev->nexturb++;
cxdev->nexturb %= CXUSB_VIDEO_URBS;
urb = cxdev->streamurbs[cxdev->nexturb];
} while (!urb);
urb = cxdev->streamurbs[urbn];
cxusb_vprintk(dvbdev, URB, "URB %u status = %d\n", urbn, urb->status);
if (urb->status == 0 || urb->status == -EXDEV) {
int i;
unsigned long len;
for (i = 0, len = 0; i < urb->number_of_packets; i++)
len += urb->iso_frame_desc[i].actual_length;
cxusb_vprintk(dvbdev, URB, "URB %u data len = %lu\n", urbn,
len);
if (len > 0) {
cxusb_vprintk(dvbdev, URB, "appending URB\n");
/*
* append new data to auxbuf while
* overwriting old data if necessary
*
* if any overwrite happens then we can no
* longer rely on consistency of the whole
* data so let's start again the current
* auxbuf frame assembling process from
* the beginning
*/
*auxbuf_reset =
!cxusb_auxbuf_append_urb(dvbdev,
&cxdev->auxbuf,
urb);
}
}
cxusb_vprintk(dvbdev, URB, "URB %u resubmit\n", urbn);
ret = usb_submit_urb(urb, GFP_KERNEL);
if (ret != 0)
dev_err(&dvbdev->udev->dev,
"unable to resubmit URB %u (%d), you'll have to restart streaming\n",
urbn, ret);
/* next URB is complete already? reschedule us then to handle it */
return test_bit(cxdev->nexturb, &cxdev->urbcomplete);
}
static void cxusb_medion_v_complete_work(struct work_struct *work)
{
struct cxusb_medion_dev *cxdev = container_of(work,
struct cxusb_medion_dev,
urbwork);
struct dvb_usb_device *dvbdev = cxdev->dvbdev;
bool auxbuf_reset;
bool reschedule;
mutex_lock(cxdev->videodev->lock);
cxusb_vprintk(dvbdev, URB, "worker called, stop_streaming = %d\n",
(int)cxdev->stop_streaming);
if (cxdev->stop_streaming)
goto unlock;
reschedule = cxusb_medion_v_complete_handle_urb(cxdev, &auxbuf_reset);
if (cxusb_medion_v_process_auxbuf(cxdev, auxbuf_reset))
/* reschedule us until auxbuf no longer can produce any frame */
reschedule = true;
if (reschedule) {
cxusb_vprintk(dvbdev, URB, "rescheduling worker\n");
schedule_work(&cxdev->urbwork);
}
unlock:
mutex_unlock(cxdev->videodev->lock);
}
static void cxusb_medion_v_complete(struct urb *u)
{
struct dvb_usb_device *dvbdev = u->context;
struct cxusb_medion_dev *cxdev = dvbdev->priv;
unsigned int i;
for (i = 0; i < CXUSB_VIDEO_URBS; i++)
if (cxdev->streamurbs[i] == u)
break;
if (i >= CXUSB_VIDEO_URBS) {
dev_err(&dvbdev->udev->dev,
"complete on unknown URB\n");
return;
}
cxusb_vprintk(dvbdev, URB, "URB %u complete\n", i);
set_bit(i, &cxdev->urbcomplete);
schedule_work(&cxdev->urbwork);
}
static void cxusb_medion_urbs_free(struct cxusb_medion_dev *cxdev)
{
unsigned int i;
for (i = 0; i < CXUSB_VIDEO_URBS; i++)
if (cxdev->streamurbs[i]) {
kfree(cxdev->streamurbs[i]->transfer_buffer);
usb_free_urb(cxdev->streamurbs[i]);
cxdev->streamurbs[i] = NULL;
}
}
static void cxusb_medion_return_buffers(struct cxusb_medion_dev *cxdev,
bool requeue)
{
struct cxusb_medion_vbuffer *vbuf, *vbuf_tmp;
list_for_each_entry_safe(vbuf, vbuf_tmp, &cxdev->buflist,
list) {
list_del(&vbuf->list);
vb2_buffer_done(&vbuf->vb2.vb2_buf,
requeue ? VB2_BUF_STATE_QUEUED :
VB2_BUF_STATE_ERROR);
}
if (cxdev->vbuf) {
vb2_buffer_done(&cxdev->vbuf->vb2.vb2_buf,
requeue ? VB2_BUF_STATE_QUEUED :
VB2_BUF_STATE_ERROR);
cxdev->vbuf = NULL;
cxdev->bt656.buf = NULL;
}
}
static int cxusb_medion_v_ss_auxbuf_alloc(struct cxusb_medion_dev *cxdev,
int *npackets)
{
struct dvb_usb_device *dvbdev = cxdev->dvbdev;
u8 *buf;
unsigned int framelen, urblen, auxbuflen;
framelen = (cxdev->width * 2 + 4 + 4) *
(cxdev->height + 50 /* VBI lines */);
/*
* try to fit a whole frame into each URB, as long as doing so
* does not require very high order memory allocations
*/
BUILD_BUG_ON(CXUSB_VIDEO_URB_MAX_SIZE / CXUSB_VIDEO_PKT_SIZE >
CXUSB_VIDEO_MAX_FRAME_PKTS);
*npackets = min_t(int, (framelen + CXUSB_VIDEO_PKT_SIZE - 1) /
CXUSB_VIDEO_PKT_SIZE,
CXUSB_VIDEO_URB_MAX_SIZE / CXUSB_VIDEO_PKT_SIZE);
urblen = *npackets * CXUSB_VIDEO_PKT_SIZE;
cxusb_vprintk(dvbdev, URB,
"each URB will have %d packets for total of %u bytes (%u x %u @ %u)\n",
*npackets, urblen, (unsigned int)cxdev->width,
(unsigned int)cxdev->height, framelen);
auxbuflen = framelen + urblen;
buf = vmalloc(auxbuflen);
if (!buf)
return -ENOMEM;
cxusb_auxbuf_init(dvbdev, &cxdev->auxbuf, buf, auxbuflen);
return 0;
}
static u32 cxusb_medion_norm2field_order(v4l2_std_id norm)
{
bool is625 = norm & V4L2_STD_625_50;
bool is525 = norm & V4L2_STD_525_60;
if (!is625 && !is525)
return V4L2_FIELD_NONE;
if (is625 && is525)
return V4L2_FIELD_NONE;
if (is625)
return V4L2_FIELD_SEQ_TB;
else /* is525 */
return V4L2_FIELD_SEQ_BT;
}
static u32 cxusb_medion_field_order(struct cxusb_medion_dev *cxdev)
{
struct dvb_usb_device *dvbdev = cxdev->dvbdev;
u32 field;
int ret;
v4l2_std_id norm;
/* TV tuner is PAL-only so it is always TB */
if (cxdev->input == 0)
return V4L2_FIELD_SEQ_TB;
field = cxusb_medion_norm2field_order(cxdev->norm);
if (field != V4L2_FIELD_NONE)
return field;
ret = v4l2_subdev_call(cxdev->cx25840, video, g_std, &norm);
if (ret != 0) {
cxusb_vprintk(dvbdev, OPS,
"cannot get current standard for input %u\n",
(unsigned int)cxdev->input);
} else {
field = cxusb_medion_norm2field_order(norm);
if (field != V4L2_FIELD_NONE)
return field;
}
dev_warn(&dvbdev->udev->dev,
"cannot determine field order for the current standard setup and received signal, using TB\n");
return V4L2_FIELD_SEQ_TB;
}
static int cxusb_medion_v_start_streaming(struct vb2_queue *q,
unsigned int count)
{
struct dvb_usb_device *dvbdev = vb2_get_drv_priv(q);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
u8 streamon_params[2] = { 0x03, 0x00 };
int npackets, i;
int ret;
cxusb_vprintk(dvbdev, OPS, "should start streaming\n");
if (cxdev->stop_streaming) {
/* stream is being stopped */
ret = -EBUSY;
goto ret_retbufs;
}
cxdev->field_order = cxusb_medion_field_order(cxdev);
ret = v4l2_subdev_call(cxdev->cx25840, video, s_stream, 1);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"unable to start stream (%d)\n", ret);
goto ret_retbufs;
}
ret = cxusb_ctrl_msg(dvbdev, CMD_STREAMING_ON, streamon_params, 2,
NULL, 0);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"unable to start streaming (%d)\n", ret);
goto ret_unstream_cx;
}
ret = cxusb_medion_v_ss_auxbuf_alloc(cxdev, &npackets);
if (ret != 0)
goto ret_unstream_md;
for (i = 0; i < CXUSB_VIDEO_URBS; i++) {
int framen;
u8 *streambuf;
struct urb *surb;
/*
* TODO: change this to an array of single pages to avoid
* doing a large continuous allocation when (if)
* s-g isochronous USB transfers are supported
*/
streambuf = kmalloc(npackets * CXUSB_VIDEO_PKT_SIZE,
GFP_KERNEL);
if (!streambuf) {
if (i < 2) {
ret = -ENOMEM;
goto ret_freeab;
}
break;
}
surb = usb_alloc_urb(npackets, GFP_KERNEL);
if (!surb) {
kfree(streambuf);
ret = -ENOMEM;
goto ret_freeu;
}
cxdev->streamurbs[i] = surb;
surb->dev = dvbdev->udev;
surb->context = dvbdev;
surb->pipe = usb_rcvisocpipe(dvbdev->udev, 2);
surb->interval = 1;
surb->transfer_flags = URB_ISO_ASAP;
surb->transfer_buffer = streambuf;
surb->complete = cxusb_medion_v_complete;
surb->number_of_packets = npackets;
surb->transfer_buffer_length = npackets * CXUSB_VIDEO_PKT_SIZE;
for (framen = 0; framen < npackets; framen++) {
surb->iso_frame_desc[framen].offset =
CXUSB_VIDEO_PKT_SIZE * framen;
surb->iso_frame_desc[framen].length =
CXUSB_VIDEO_PKT_SIZE;
}
}
cxdev->urbcomplete = 0;
cxdev->nexturb = 0;
cxdev->vbuf_sequence = 0;
cxdev->vbuf = NULL;
cxdev->bt656.mode = NEW_FRAME;
cxdev->bt656.buf = NULL;
for (i = 0; i < CXUSB_VIDEO_URBS; i++)
if (cxdev->streamurbs[i]) {
ret = usb_submit_urb(cxdev->streamurbs[i],
GFP_KERNEL);
if (ret != 0)
dev_err(&dvbdev->udev->dev,
"URB %d submission failed (%d)\n", i,
ret);
}
return 0;
ret_freeu:
cxusb_medion_urbs_free(cxdev);
ret_freeab:
vfree(cxdev->auxbuf.buf);
ret_unstream_md:
cxusb_ctrl_msg(dvbdev, CMD_STREAMING_OFF, NULL, 0, NULL, 0);
ret_unstream_cx:
v4l2_subdev_call(cxdev->cx25840, video, s_stream, 0);
ret_retbufs:
cxusb_medion_return_buffers(cxdev, true);
return ret;
}
static void cxusb_medion_v_stop_streaming(struct vb2_queue *q)
{
struct dvb_usb_device *dvbdev = vb2_get_drv_priv(q);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
int ret;
unsigned int i;
cxusb_vprintk(dvbdev, OPS, "should stop streaming\n");
if (WARN_ON(cxdev->stop_streaming))
return;
cxdev->stop_streaming = true;
cxusb_ctrl_msg(dvbdev, CMD_STREAMING_OFF, NULL, 0, NULL, 0);
ret = v4l2_subdev_call(cxdev->cx25840, video, s_stream, 0);
if (ret != 0)
dev_err(&dvbdev->udev->dev, "unable to stop stream (%d)\n",
ret);
/* let URB completion run */
mutex_unlock(cxdev->videodev->lock);
for (i = 0; i < CXUSB_VIDEO_URBS; i++)
if (cxdev->streamurbs[i])
usb_kill_urb(cxdev->streamurbs[i]);
flush_work(&cxdev->urbwork);
mutex_lock(cxdev->videodev->lock);
/* free transfer buffer and URB */
vfree(cxdev->auxbuf.buf);
cxusb_medion_urbs_free(cxdev);
cxusb_medion_return_buffers(cxdev, false);
cxdev->stop_streaming = false;
}
static void cxusub_medion_v_buf_queue(struct vb2_buffer *vb)
{
struct vb2_v4l2_buffer *v4l2buf = to_vb2_v4l2_buffer(vb);
struct cxusb_medion_vbuffer *vbuf =
container_of(v4l2buf, struct cxusb_medion_vbuffer, vb2);
struct dvb_usb_device *dvbdev = vb2_get_drv_priv(vb->vb2_queue);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
/* cxusb_vprintk(dvbdev, OPS, "mmmm.. a fresh buffer...\n"); */
list_add_tail(&vbuf->list, &cxdev->buflist);
}
static const struct vb2_ops cxdev_video_qops = {
.queue_setup = cxusb_medion_v_queue_setup,
.buf_init = cxusb_medion_v_buf_init,
.start_streaming = cxusb_medion_v_start_streaming,
.stop_streaming = cxusb_medion_v_stop_streaming,
.buf_queue = cxusub_medion_v_buf_queue,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish
};
static const __u32 videocaps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER |
V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
static const __u32 radiocaps = V4L2_CAP_TUNER | V4L2_CAP_RADIO;
static int cxusb_medion_v_querycap(struct file *file, void *fh,
struct v4l2_capability *cap)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
strscpy(cap->driver, dvbdev->udev->dev.driver->name,
sizeof(cap->driver));
strscpy(cap->card, "Medion 95700", sizeof(cap->card));
usb_make_path(dvbdev->udev, cap->bus_info, sizeof(cap->bus_info));
cap->capabilities = videocaps | radiocaps | V4L2_CAP_DEVICE_CAPS;
return 0;
}
static int cxusb_medion_v_enum_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_fmtdesc *f)
{
if (f->index != 0)
return -EINVAL;
f->pixelformat = V4L2_PIX_FMT_UYVY;
return 0;
}
static int cxusb_medion_g_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_format *f)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
f->fmt.pix.width = cxdev->width;
f->fmt.pix.height = cxdev->height;
f->fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
f->fmt.pix.field = vb2_start_streaming_called(&cxdev->videoqueue) ?
cxdev->field_order : cxusb_medion_field_order(cxdev);
f->fmt.pix.bytesperline = cxdev->width * 2;
f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * f->fmt.pix.height;
return 0;
}
static int cxusb_medion_try_s_fmt_vid_cap(struct file *file,
struct v4l2_format *f,
bool isset)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
struct v4l2_subdev_format subfmt = {
.which = isset ? V4L2_SUBDEV_FORMAT_ACTIVE :
V4L2_SUBDEV_FORMAT_TRY,
};
u32 field;
int ret;
if (isset && vb2_is_busy(&cxdev->videoqueue))
return -EBUSY;
field = vb2_start_streaming_called(&cxdev->videoqueue) ?
cxdev->field_order : cxusb_medion_field_order(cxdev);
subfmt.format.width = f->fmt.pix.width & ~1;
subfmt.format.height = f->fmt.pix.height & ~1;
subfmt.format.code = MEDIA_BUS_FMT_FIXED;
subfmt.format.field = field;
subfmt.format.colorspace = V4L2_COLORSPACE_SMPTE170M;
ret = v4l2_subdev_call(cxdev->cx25840, pad, set_fmt, NULL, &subfmt);
if (ret != 0)
return ret;
f->fmt.pix.width = subfmt.format.width;
f->fmt.pix.height = subfmt.format.height;
f->fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
f->fmt.pix.field = field;
f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * f->fmt.pix.height;
f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
if (isset) {
cxdev->width = f->fmt.pix.width;
cxdev->height = f->fmt.pix.height;
}
return 0;
}
static int cxusb_medion_try_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_format *f)
{
return cxusb_medion_try_s_fmt_vid_cap(file, f, false);
}
static int cxusb_medion_s_fmt_vid_cap(struct file *file, void *fh,
struct v4l2_format *f)
{
return cxusb_medion_try_s_fmt_vid_cap(file, f, true);
}
static const struct {
struct v4l2_input input;
u32 inputcfg;
} cxusb_medion_inputs[] = {
{ .input = { .name = "TV tuner", .type = V4L2_INPUT_TYPE_TUNER,
.tuner = 0, .std = V4L2_STD_PAL },
.inputcfg = CX25840_COMPOSITE2, },
{ .input = { .name = "Composite", .type = V4L2_INPUT_TYPE_CAMERA,
.std = V4L2_STD_ALL },
.inputcfg = CX25840_COMPOSITE1, },
{ .input = { .name = "S-Video", .type = V4L2_INPUT_TYPE_CAMERA,
.std = V4L2_STD_ALL },
.inputcfg = CX25840_SVIDEO_LUMA3 | CX25840_SVIDEO_CHROMA4 }
};
#define CXUSB_INPUT_CNT ARRAY_SIZE(cxusb_medion_inputs)
static int cxusb_medion_enum_input(struct file *file, void *fh,
struct v4l2_input *inp)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
u32 index = inp->index;
if (index >= CXUSB_INPUT_CNT)
return -EINVAL;
*inp = cxusb_medion_inputs[index].input;
inp->index = index;
inp->capabilities |= V4L2_IN_CAP_STD;
if (index == cxdev->input) {
int ret;
u32 status = 0;
ret = v4l2_subdev_call(cxdev->cx25840, video, g_input_status,
&status);
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"cx25840 input status query failed (%d)\n",
ret);
else
inp->status = status;
}
return 0;
}
static int cxusb_medion_g_input(struct file *file, void *fh,
unsigned int *i)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
*i = cxdev->input;
return 0;
}
static int cxusb_medion_set_norm(struct cxusb_medion_dev *cxdev,
v4l2_std_id norm)
{
struct dvb_usb_device *dvbdev = cxdev->dvbdev;
int ret;
cxusb_vprintk(dvbdev, OPS,
"trying to set standard for input %u to %lx\n",
(unsigned int)cxdev->input,
(unsigned long)norm);
/* no autodetection support */
if (norm == V4L2_STD_UNKNOWN)
return -EINVAL;
/* on composite or S-Video any std is acceptable */
if (cxdev->input != 0) {
ret = v4l2_subdev_call(cxdev->cx25840, video, s_std, norm);
if (ret)
return ret;
goto ret_savenorm;
}
/* TV tuner is only able to demodulate PAL */
if ((norm & ~V4L2_STD_PAL) != 0)
return -EINVAL;
ret = v4l2_subdev_call(cxdev->tda9887, video, s_std, norm);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"tda9887 norm setup failed (%d)\n",
ret);
return ret;
}
ret = v4l2_subdev_call(cxdev->tuner, video, s_std, norm);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"tuner norm setup failed (%d)\n",
ret);
return ret;
}
ret = v4l2_subdev_call(cxdev->cx25840, video, s_std, norm);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"cx25840 norm setup failed (%d)\n",
ret);
return ret;
}
ret_savenorm:
cxdev->norm = norm;
return 0;
}
static int cxusb_medion_s_input(struct file *file, void *fh,
unsigned int i)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
int ret;
v4l2_std_id norm;
if (i >= CXUSB_INPUT_CNT)
return -EINVAL;
ret = v4l2_subdev_call(cxdev->cx25840, video, s_routing,
cxusb_medion_inputs[i].inputcfg, 0, 0);
if (ret != 0)
return ret;
cxdev->input = i;
cxdev->videodev->tvnorms = cxusb_medion_inputs[i].input.std;
norm = cxdev->norm & cxusb_medion_inputs[i].input.std;
if (norm == 0)
norm = cxusb_medion_inputs[i].input.std;
cxusb_medion_set_norm(cxdev, norm);
return 0;
}
static int cxusb_medion_g_tuner(struct file *file, void *fh,
struct v4l2_tuner *tuner)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
struct video_device *vdev = video_devdata(file);
int ret;
if (tuner->index != 0)
return -EINVAL;
if (vdev->vfl_type == VFL_TYPE_VIDEO)
tuner->type = V4L2_TUNER_ANALOG_TV;
else
tuner->type = V4L2_TUNER_RADIO;
tuner->capability = 0;
tuner->afc = 0;
/*
* fills:
* always: capability (static), rangelow (static), rangehigh (static)
* radio mode: afc (may fail silently), rxsubchans (static), audmode
*/
ret = v4l2_subdev_call(cxdev->tda9887, tuner, g_tuner, tuner);
if (ret != 0)
return ret;
/*
* fills:
* always: capability (static), rangelow (static), rangehigh (static)
* radio mode: rxsubchans (always stereo), audmode,
* signal (might be wrong)
*/
ret = v4l2_subdev_call(cxdev->tuner, tuner, g_tuner, tuner);
if (ret != 0)
return ret;
tuner->signal = 0;
/*
* fills: TV mode: capability, rxsubchans, audmode, signal
*/
ret = v4l2_subdev_call(cxdev->cx25840, tuner, g_tuner, tuner);
if (ret != 0)
return ret;
if (vdev->vfl_type == VFL_TYPE_VIDEO)
strscpy(tuner->name, "TV tuner", sizeof(tuner->name));
else
strscpy(tuner->name, "Radio tuner", sizeof(tuner->name));
memset(tuner->reserved, 0, sizeof(tuner->reserved));
return 0;
}
static int cxusb_medion_s_tuner(struct file *file, void *fh,
const struct v4l2_tuner *tuner)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
struct video_device *vdev = video_devdata(file);
int ret;
if (tuner->index != 0)
return -EINVAL;
ret = v4l2_subdev_call(cxdev->tda9887, tuner, s_tuner, tuner);
if (ret != 0)
return ret;
ret = v4l2_subdev_call(cxdev->tuner, tuner, s_tuner, tuner);
if (ret != 0)
return ret;
/*
* make sure that cx25840 is in a correct TV / radio mode,
* since calls above may have changed it for tuner / IF demod
*/
if (vdev->vfl_type == VFL_TYPE_VIDEO)
v4l2_subdev_call(cxdev->cx25840, video, s_std, cxdev->norm);
else
v4l2_subdev_call(cxdev->cx25840, tuner, s_radio);
return v4l2_subdev_call(cxdev->cx25840, tuner, s_tuner, tuner);
}
static int cxusb_medion_g_frequency(struct file *file, void *fh,
struct v4l2_frequency *freq)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
if (freq->tuner != 0)
return -EINVAL;
return v4l2_subdev_call(cxdev->tuner, tuner, g_frequency, freq);
}
static int cxusb_medion_s_frequency(struct file *file, void *fh,
const struct v4l2_frequency *freq)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
struct video_device *vdev = video_devdata(file);
int ret;
if (freq->tuner != 0)
return -EINVAL;
ret = v4l2_subdev_call(cxdev->tda9887, tuner, s_frequency, freq);
if (ret != 0)
return ret;
ret = v4l2_subdev_call(cxdev->tuner, tuner, s_frequency, freq);
if (ret != 0)
return ret;
/*
* make sure that cx25840 is in a correct TV / radio mode,
* since calls above may have changed it for tuner / IF demod
*/
if (vdev->vfl_type == VFL_TYPE_VIDEO)
v4l2_subdev_call(cxdev->cx25840, video, s_std, cxdev->norm);
else
v4l2_subdev_call(cxdev->cx25840, tuner, s_radio);
return v4l2_subdev_call(cxdev->cx25840, tuner, s_frequency, freq);
}
static int cxusb_medion_g_std(struct file *file, void *fh,
v4l2_std_id *norm)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
*norm = cxdev->norm;
if (*norm == V4L2_STD_UNKNOWN)
return -ENODATA;
return 0;
}
static int cxusb_medion_s_std(struct file *file, void *fh,
v4l2_std_id norm)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
return cxusb_medion_set_norm(cxdev, norm);
}
static int cxusb_medion_querystd(struct file *file, void *fh,
v4l2_std_id *norm)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
v4l2_std_id norm_mask;
int ret;
/*
* make sure we don't have improper std bits set for the TV tuner
* (could happen when no signal was present yet after reset)
*/
if (cxdev->input == 0)
norm_mask = V4L2_STD_PAL;
else
norm_mask = V4L2_STD_ALL;
ret = v4l2_subdev_call(cxdev->cx25840, video, querystd, norm);
if (ret != 0) {
cxusb_vprintk(dvbdev, OPS,
"cannot get detected standard for input %u\n",
(unsigned int)cxdev->input);
return ret;
}
cxusb_vprintk(dvbdev, OPS, "input %u detected standard is %lx\n",
(unsigned int)cxdev->input, (unsigned long)*norm);
*norm &= norm_mask;
return 0;
}
static int cxusb_medion_log_status(struct file *file, void *fh)
{
struct dvb_usb_device *dvbdev = video_drvdata(file);
struct cxusb_medion_dev *cxdev = dvbdev->priv;
v4l2_device_call_all(&cxdev->v4l2dev, 0, core, log_status);
return 0;
}
static const struct v4l2_ioctl_ops cxusb_video_ioctl = {
.vidioc_querycap = cxusb_medion_v_querycap,
.vidioc_enum_fmt_vid_cap = cxusb_medion_v_enum_fmt_vid_cap,
.vidioc_g_fmt_vid_cap = cxusb_medion_g_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = cxusb_medion_s_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = cxusb_medion_try_fmt_vid_cap,
.vidioc_enum_input = cxusb_medion_enum_input,
.vidioc_g_input = cxusb_medion_g_input,
.vidioc_s_input = cxusb_medion_s_input,
.vidioc_g_tuner = cxusb_medion_g_tuner,
.vidioc_s_tuner = cxusb_medion_s_tuner,
.vidioc_g_frequency = cxusb_medion_g_frequency,
.vidioc_s_frequency = cxusb_medion_s_frequency,
.vidioc_g_std = cxusb_medion_g_std,
.vidioc_s_std = cxusb_medion_s_std,
.vidioc_querystd = cxusb_medion_querystd,
.vidioc_log_status = cxusb_medion_log_status,
.vidioc_reqbufs = vb2_ioctl_reqbufs,
.vidioc_querybuf = vb2_ioctl_querybuf,
.vidioc_qbuf = vb2_ioctl_qbuf,
.vidioc_dqbuf = vb2_ioctl_dqbuf,
.vidioc_create_bufs = vb2_ioctl_create_bufs,
.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
.vidioc_streamon = vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff
};
static const struct v4l2_ioctl_ops cxusb_radio_ioctl = {
.vidioc_querycap = cxusb_medion_v_querycap,
.vidioc_g_tuner = cxusb_medion_g_tuner,
.vidioc_s_tuner = cxusb_medion_s_tuner,
.vidioc_g_frequency = cxusb_medion_g_frequency,
.vidioc_s_frequency = cxusb_medion_s_frequency,
.vidioc_log_status = cxusb_medion_log_status
};
/*
* in principle, this should be const, but s_io_pin_config is declared
* to take non-const, and gcc complains
*/
static struct v4l2_subdev_io_pin_config cxusub_medion_pin_config[] = {
{ .pin = CX25840_PIN_DVALID_PRGM0, .function = CX25840_PAD_DEFAULT,
.strength = CX25840_PIN_DRIVE_MEDIUM },
{ .pin = CX25840_PIN_PLL_CLK_PRGM7, .function = CX25840_PAD_AUX_PLL },
{ .pin = CX25840_PIN_HRESET_PRGM2, .function = CX25840_PAD_ACTIVE,
.strength = CX25840_PIN_DRIVE_MEDIUM }
};
int cxusb_medion_analog_init(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
u8 tuner_analog_msg_data[] = { 0x9c, 0x60, 0x85, 0x54 };
struct i2c_msg tuner_analog_msg = { .addr = 0x61, .flags = 0,
.buf = tuner_analog_msg_data,
.len =
sizeof(tuner_analog_msg_data) };
struct v4l2_subdev_format subfmt = {
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
};
int ret;
/* switch tuner to analog mode so IF demod will become accessible */
ret = i2c_transfer(&dvbdev->i2c_adap, &tuner_analog_msg, 1);
if (ret != 1)
dev_warn(&dvbdev->udev->dev,
"tuner analog switch failed (%d)\n", ret);
/*
* cx25840 might have lost power during mode switching so we need
* to set it again
*/
ret = v4l2_subdev_call(cxdev->cx25840, core, reset, 0);
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"cx25840 reset failed (%d)\n", ret);
ret = v4l2_subdev_call(cxdev->cx25840, video, s_routing,
CX25840_COMPOSITE1, 0, 0);
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"cx25840 initial input setting failed (%d)\n", ret);
/* composite */
cxdev->input = 1;
cxdev->videodev->tvnorms = V4L2_STD_ALL;
cxdev->norm = V4L2_STD_PAL;
/* TODO: setup audio samples insertion */
ret = v4l2_subdev_call(cxdev->cx25840, core, s_io_pin_config,
ARRAY_SIZE(cxusub_medion_pin_config),
cxusub_medion_pin_config);
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"cx25840 pin config failed (%d)\n", ret);
/* make sure that we aren't in radio mode */
v4l2_subdev_call(cxdev->tda9887, video, s_std, cxdev->norm);
v4l2_subdev_call(cxdev->tuner, video, s_std, cxdev->norm);
v4l2_subdev_call(cxdev->cx25840, video, s_std, cxdev->norm);
subfmt.format.width = cxdev->width;
subfmt.format.height = cxdev->height;
subfmt.format.code = MEDIA_BUS_FMT_FIXED;
subfmt.format.field = V4L2_FIELD_SEQ_TB;
subfmt.format.colorspace = V4L2_COLORSPACE_SMPTE170M;
ret = v4l2_subdev_call(cxdev->cx25840, pad, set_fmt, NULL, &subfmt);
if (ret != 0)
dev_warn(&dvbdev->udev->dev,
"cx25840 format set failed (%d)\n", ret);
if (ret == 0) {
cxdev->width = subfmt.format.width;
cxdev->height = subfmt.format.height;
}
return 0;
}
static int cxusb_videoradio_open(struct file *f)
{
struct dvb_usb_device *dvbdev = video_drvdata(f);
int ret;
/*
* no locking needed since this call only modifies analog
* state if there are no other analog handles currenly
* opened so ops done via them cannot create a conflict
*/
ret = cxusb_medion_get(dvbdev, CXUSB_OPEN_ANALOG);
if (ret != 0)
return ret;
ret = v4l2_fh_open(f);
if (ret != 0)
goto ret_release;
cxusb_vprintk(dvbdev, OPS, "got open\n");
return 0;
ret_release:
cxusb_medion_put(dvbdev);
return ret;
}
static int cxusb_videoradio_release(struct file *f)
{
struct video_device *vdev = video_devdata(f);
struct dvb_usb_device *dvbdev = video_drvdata(f);
int ret;
cxusb_vprintk(dvbdev, OPS, "got release\n");
if (vdev->vfl_type == VFL_TYPE_VIDEO)
ret = vb2_fop_release(f);
else
ret = v4l2_fh_release(f);
cxusb_medion_put(dvbdev);
return ret;
}
static const struct v4l2_file_operations cxusb_video_fops = {
.owner = THIS_MODULE,
.read = vb2_fop_read,
.poll = vb2_fop_poll,
.unlocked_ioctl = video_ioctl2,
.mmap = vb2_fop_mmap,
.open = cxusb_videoradio_open,
.release = cxusb_videoradio_release
};
static const struct v4l2_file_operations cxusb_radio_fops = {
.owner = THIS_MODULE,
.unlocked_ioctl = video_ioctl2,
.open = cxusb_videoradio_open,
.release = cxusb_videoradio_release
};
static void cxusb_medion_v4l2_release(struct v4l2_device *v4l2_dev)
{
struct cxusb_medion_dev *cxdev =
container_of(v4l2_dev, struct cxusb_medion_dev, v4l2dev);
struct dvb_usb_device *dvbdev = cxdev->dvbdev;
cxusb_vprintk(dvbdev, OPS, "v4l2 device release\n");
v4l2_device_unregister(&cxdev->v4l2dev);
mutex_destroy(&cxdev->dev_lock);
while (completion_done(&cxdev->v4l2_release))
schedule();
complete(&cxdev->v4l2_release);
}
static void cxusb_medion_videodev_release(struct video_device *vdev)
{
struct dvb_usb_device *dvbdev = video_get_drvdata(vdev);
cxusb_vprintk(dvbdev, OPS, "video device release\n");
video_device_release(vdev);
}
static int cxusb_medion_register_analog_video(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
int ret;
cxdev->videoqueue.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
cxdev->videoqueue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ |
VB2_DMABUF;
cxdev->videoqueue.ops = &cxdev_video_qops;
cxdev->videoqueue.mem_ops = &vb2_vmalloc_memops;
cxdev->videoqueue.drv_priv = dvbdev;
cxdev->videoqueue.buf_struct_size =
sizeof(struct cxusb_medion_vbuffer);
cxdev->videoqueue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
cxdev->videoqueue.min_buffers_needed = 6;
cxdev->videoqueue.lock = &cxdev->dev_lock;
ret = vb2_queue_init(&cxdev->videoqueue);
if (ret) {
dev_err(&dvbdev->udev->dev,
"video queue init failed, ret = %d\n", ret);
return ret;
}
cxdev->videodev = video_device_alloc();
if (!cxdev->videodev) {
dev_err(&dvbdev->udev->dev, "video device alloc failed\n");
return -ENOMEM;
}
cxdev->videodev->device_caps = videocaps;
cxdev->videodev->fops = &cxusb_video_fops;
cxdev->videodev->v4l2_dev = &cxdev->v4l2dev;
cxdev->videodev->queue = &cxdev->videoqueue;
strscpy(cxdev->videodev->name, "cxusb", sizeof(cxdev->videodev->name));
cxdev->videodev->vfl_dir = VFL_DIR_RX;
cxdev->videodev->ioctl_ops = &cxusb_video_ioctl;
cxdev->videodev->tvnorms = V4L2_STD_ALL;
cxdev->videodev->release = cxusb_medion_videodev_release;
cxdev->videodev->lock = &cxdev->dev_lock;
video_set_drvdata(cxdev->videodev, dvbdev);
ret = video_register_device(cxdev->videodev, VFL_TYPE_VIDEO, -1);
if (ret) {
dev_err(&dvbdev->udev->dev,
"video device register failed, ret = %d\n", ret);
goto ret_vrelease;
}
return 0;
ret_vrelease:
video_device_release(cxdev->videodev);
return ret;
}
static int cxusb_medion_register_analog_radio(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
int ret;
cxdev->radiodev = video_device_alloc();
if (!cxdev->radiodev) {
dev_err(&dvbdev->udev->dev, "radio device alloc failed\n");
return -ENOMEM;
}
cxdev->radiodev->device_caps = radiocaps;
cxdev->radiodev->fops = &cxusb_radio_fops;
cxdev->radiodev->v4l2_dev = &cxdev->v4l2dev;
strscpy(cxdev->radiodev->name, "cxusb", sizeof(cxdev->radiodev->name));
cxdev->radiodev->vfl_dir = VFL_DIR_RX;
cxdev->radiodev->ioctl_ops = &cxusb_radio_ioctl;
cxdev->radiodev->release = video_device_release;
cxdev->radiodev->lock = &cxdev->dev_lock;
video_set_drvdata(cxdev->radiodev, dvbdev);
ret = video_register_device(cxdev->radiodev, VFL_TYPE_RADIO, -1);
if (ret) {
dev_err(&dvbdev->udev->dev,
"radio device register failed, ret = %d\n", ret);
video_device_release(cxdev->radiodev);
return ret;
}
return 0;
}
static int cxusb_medion_register_analog_subdevs(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
int ret;
struct tuner_setup tun_setup;
/* attach cx25840 capture chip */
cxdev->cx25840 = v4l2_i2c_new_subdev(&cxdev->v4l2dev,
&dvbdev->i2c_adap,
"cx25840", 0x44, NULL);
if (!cxdev->cx25840) {
dev_err(&dvbdev->udev->dev, "cx25840 not found\n");
return -ENODEV;
}
/*
* Initialize cx25840 chip by calling its subdevice init core op.
*
* This switches it into the generic mode that disables some of
* ivtv-related hacks in the cx25840 driver while allowing setting
* of the chip video output configuration (passed in the call below
* as the last argument).
*/
ret = v4l2_subdev_call(cxdev->cx25840, core, init,
CX25840_VCONFIG_FMT_BT656 |
CX25840_VCONFIG_RES_8BIT |
CX25840_VCONFIG_VBIRAW_DISABLED |
CX25840_VCONFIG_ANCDATA_DISABLED |
CX25840_VCONFIG_ACTIVE_COMPOSITE |
CX25840_VCONFIG_VALID_ANDACTIVE |
CX25840_VCONFIG_HRESETW_NORMAL |
CX25840_VCONFIG_CLKGATE_NONE |
CX25840_VCONFIG_DCMODE_DWORDS);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"cx25840 init failed (%d)\n", ret);
return ret;
}
/* attach analog tuner */
cxdev->tuner = v4l2_i2c_new_subdev(&cxdev->v4l2dev,
&dvbdev->i2c_adap,
"tuner", 0x61, NULL);
if (!cxdev->tuner) {
dev_err(&dvbdev->udev->dev, "tuner not found\n");
return -ENODEV;
}
/* configure it */
memset(&tun_setup, 0, sizeof(tun_setup));
tun_setup.addr = 0x61;
tun_setup.type = TUNER_PHILIPS_FMD1216ME_MK3;
tun_setup.mode_mask = T_RADIO | T_ANALOG_TV;
v4l2_subdev_call(cxdev->tuner, tuner, s_type_addr, &tun_setup);
/* attach IF demod */
cxdev->tda9887 = v4l2_i2c_new_subdev(&cxdev->v4l2dev,
&dvbdev->i2c_adap,
"tuner", 0x43, NULL);
if (!cxdev->tda9887) {
dev_err(&dvbdev->udev->dev, "tda9887 not found\n");
return -ENODEV;
}
return 0;
}
int cxusb_medion_register_analog(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
int ret;
mutex_init(&cxdev->dev_lock);
init_completion(&cxdev->v4l2_release);
cxdev->v4l2dev.release = cxusb_medion_v4l2_release;
ret = v4l2_device_register(&dvbdev->udev->dev, &cxdev->v4l2dev);
if (ret != 0) {
dev_err(&dvbdev->udev->dev,
"V4L2 device registration failed, ret = %d\n", ret);
mutex_destroy(&cxdev->dev_lock);
return ret;
}
ret = cxusb_medion_register_analog_subdevs(dvbdev);
if (ret)
goto ret_unregister;
INIT_WORK(&cxdev->urbwork, cxusb_medion_v_complete_work);
INIT_LIST_HEAD(&cxdev->buflist);
cxdev->width = 320;
cxdev->height = 240;
ret = cxusb_medion_register_analog_video(dvbdev);
if (ret)
goto ret_unregister;
ret = cxusb_medion_register_analog_radio(dvbdev);
if (ret)
goto ret_vunreg;
return 0;
ret_vunreg:
vb2_video_unregister_device(cxdev->videodev);
ret_unregister:
v4l2_device_put(&cxdev->v4l2dev);
wait_for_completion(&cxdev->v4l2_release);
return ret;
}
void cxusb_medion_unregister_analog(struct dvb_usb_device *dvbdev)
{
struct cxusb_medion_dev *cxdev = dvbdev->priv;
cxusb_vprintk(dvbdev, OPS, "unregistering analog\n");
video_unregister_device(cxdev->radiodev);
vb2_video_unregister_device(cxdev->videodev);
v4l2_device_put(&cxdev->v4l2dev);
wait_for_completion(&cxdev->v4l2_release);
cxusb_vprintk(dvbdev, OPS, "analog unregistered\n");
}
| linux-master | drivers/media/usb/dvb-usb/cxusb-analog.c |
// SPDX-License-Identifier: GPL-2.0-only
/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
*
* Copyright (C) 2005-9 DiBcom, SA et al
*/
#include "dib0700.h"
#include "dib3000mc.h"
#include "dib7000m.h"
#include "dib7000p.h"
#include "dib8000.h"
#include "dib9000.h"
#include "mt2060.h"
#include "mt2266.h"
#include "xc2028.h"
#include "xc5000.h"
#include "xc4000.h"
#include "s5h1411.h"
#include "dib0070.h"
#include "dib0090.h"
#include "lgdt3305.h"
#include "mxl5007t.h"
#include "mn88472.h"
#include "tda18250.h"
static int force_lna_activation;
module_param(force_lna_activation, int, 0644);
MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifier(s) (LNA), if applicable for the device (default: 0=automatic/off).");
struct dib0700_adapter_state {
int (*set_param_save) (struct dvb_frontend *);
const struct firmware *frontend_firmware;
struct dib7000p_ops dib7000p_ops;
struct dib8000_ops dib8000_ops;
};
/* Hauppauge Nova-T 500 (aka Bristol)
* has a LNA on GPIO0 which is enabled by setting 1 */
static struct mt2060_config bristol_mt2060_config[2] = {
{
.i2c_address = 0x60,
.clock_out = 3,
}, {
.i2c_address = 0x61,
}
};
static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
.band_caps = BAND_VHF | BAND_UHF,
.setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
.agc1_max = 42598,
.agc1_min = 17694,
.agc2_max = 45875,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 59,
.agc1_slope1 = 0,
.agc1_slope2 = 69,
.agc2_pt1 = 0,
.agc2_pt2 = 59,
.agc2_slope1 = 111,
.agc2_slope2 = 28,
};
static struct dib3000mc_config bristol_dib3000mc_config[2] = {
{ .agc = &bristol_dib3000p_mt2060_agc_config,
.max_time = 0x196,
.ln_adc_level = 0x1cc7,
.output_mpeg2_in_188_bytes = 1,
},
{ .agc = &bristol_dib3000p_mt2060_agc_config,
.max_time = 0x196,
.ln_adc_level = 0x1cc7,
.output_mpeg2_in_188_bytes = 1,
}
};
static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
if (adap->id == 0) {
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
if (force_lna_activation)
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
else
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
return -ENODEV;
}
}
st->mt2060_if1[adap->id] = 1220;
return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
(10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
}
static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
{
struct i2c_msg msg[2] = {
{ .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
{ .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
};
if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
return 0;
}
static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
{
struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
s8 a;
int if1=1220;
if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
}
return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
&bristol_mt2060_config[adap->id], if1) == NULL ?
-ENODEV : 0;
}
/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
/* MT226x */
static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
{
BAND_UHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
(0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
| (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1130,
21,
0,
118,
0,
3530,
1,
0,
65535,
33770,
65535,
23592,
0,
62,
255,
64,
64,
132,
192,
80,
80,
17,
27,
23,
51,
1,
}, {
BAND_VHF | BAND_LBAND,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
(0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
| (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
2372,
21,
0,
118,
0,
3530,
1,
0,
65535,
0,
65535,
23592,
0,
128,
128,
128,
0,
128,
253,
81,
0,
17,
27,
23,
51,
1,
}
};
static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
.internal = 60000,
.sampling = 30000,
.pll_prediv = 1,
.pll_ratio = 8,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 2,
.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
.ifreq = 0,
.timf = 20452225,
};
static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
{ .output_mpeg2_in_188_bytes = 1,
.hostbus_diversity = 1,
.tuner_is_baseband = 1,
.agc_config_count = 2,
.agc = stk7700d_7000p_mt2266_agc_config,
.bw = &stk7700d_mt2266_pll_config,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
},
{ .output_mpeg2_in_188_bytes = 1,
.hostbus_diversity = 1,
.tuner_is_baseband = 1,
.agc_config_count = 2,
.agc = stk7700d_7000p_mt2266_agc_config,
.bw = &stk7700d_mt2266_pll_config,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
}
};
static struct mt2266_config stk7700d_mt2266_config[2] = {
{ .i2c_address = 0x60
},
{ .i2c_address = 0x60
}
};
static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
if (adap->id == 0) {
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(10);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
stk7700d_dib7000p_mt2266_config)
!= 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
0x80 + (adap->id << 1),
&stk7700d_dib7000p_mt2266_config[adap->id]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
if (adap->id == 0) {
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
stk7700d_dib7000p_mt2266_config)
!= 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
0x80 + (adap->id << 1),
&stk7700d_dib7000p_mt2266_config[adap->id]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
{
struct i2c_adapter *tun_i2c;
struct dib0700_adapter_state *state = adap->priv;
tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
DIBX000_I2C_INTERFACE_TUNER, 1);
return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
&stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
}
/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
static struct dibx000_agc_config xc3028_agc_config = {
.band_caps = BAND_VHF | BAND_UHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
* P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
.inv_gain = 712,
.time_stabiliz = 21,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 2867,
.wbd_sel = 0,
.wbd_alpha = 2,
.agc1_max = 0,
.agc1_min = 0,
.agc2_max = 39718,
.agc2_min = 9930,
.agc1_pt1 = 0,
.agc1_pt2 = 0,
.agc1_pt3 = 0,
.agc1_slope1 = 0,
.agc1_slope2 = 0,
.agc2_pt1 = 0,
.agc2_pt2 = 128,
.agc2_slope1 = 29,
.agc2_slope2 = 29,
.alpha_mant = 17,
.alpha_exp = 27,
.beta_mant = 23,
.beta_exp = 51,
.perform_agc_softsplit = 1,
};
/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
static struct dibx000_bandwidth_config xc3028_bw_config = {
.internal = 60000,
.sampling = 30000,
.pll_prediv = 1,
.pll_ratio = 8,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 0,
.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
.ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
.timf = 20452225,
.xtal_hz = 30000000,
};
static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
.output_mpeg2_in_188_bytes = 1,
.tuner_is_baseband = 1,
.agc_config_count = 1,
.agc = &xc3028_agc_config,
.bw = &xc3028_bw_config,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
};
static int stk7700ph_xc3028_callback(void *ptr, int component,
int command, int arg)
{
struct dvb_usb_adapter *adap = ptr;
struct dib0700_adapter_state *state = adap->priv;
switch (command) {
case XC2028_TUNER_RESET:
/* Send the tuner in then out of reset */
state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
msleep(10);
state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
break;
case XC2028_RESET_CLK:
case XC2028_I2C_FLUSH:
break;
default:
err("%s: unknown command %d, arg %d\n", __func__,
command, arg);
return -EINVAL;
}
return 0;
}
static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
.fname = XC2028_DEFAULT_FIRMWARE,
.max_len = 64,
.demod = XC3028_FE_DIBCOM52,
};
static struct xc2028_config stk7700ph_xc3028_config = {
.i2c_addr = 0x61,
.ctrl = &stk7700ph_xc3028_ctrl,
};
static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
{
struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
else
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
msleep(10);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
&stk7700ph_dib7700_xc3028_config) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
__func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
&stk7700ph_dib7700_xc3028_config);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
{
struct i2c_adapter *tun_i2c;
struct dib0700_adapter_state *state = adap->priv;
tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
DIBX000_I2C_INTERFACE_TUNER, 1);
stk7700ph_xc3028_config.i2c_adap = tun_i2c;
/* FIXME: generalize & move to common area */
adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
== NULL ? -ENODEV : 0;
}
#define DEFAULT_RC_INTERVAL 50
/*
* This function is used only when firmware is < 1.20 version. Newer
* firmwares use bulk mode, with functions implemented at dib0700_core,
* at dib0700_rc_urb_completion()
*/
static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
{
enum rc_proto protocol;
u32 scancode;
u8 toggle;
int i;
struct dib0700_state *st = d->priv;
if (st->fw_version >= 0x10200) {
/* For 1.20 firmware , We need to keep the RC polling
callback so we can reuse the input device setup in
dvb-usb-remote.c. However, the actual work is being done
in the bulk URB completion handler. */
return 0;
}
st->buf[0] = REQUEST_POLL_RC;
st->buf[1] = 0;
i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4);
if (i <= 0) {
err("RC Query Failed");
return -EIO;
}
/* losing half of KEY_0 events from Philipps rc5 remotes.. */
if (st->buf[0] == 0 && st->buf[1] == 0
&& st->buf[2] == 0 && st->buf[3] == 0)
return 0;
/* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */
dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
switch (d->props.rc.core.protocol) {
case RC_PROTO_BIT_NEC:
/* NEC protocol sends repeat code as 0 0 0 FF */
if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) &&
(st->buf[3] == 0xff)) {
rc_repeat(d->rc_dev);
return 0;
}
protocol = RC_PROTO_NEC;
scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]);
toggle = 0;
break;
default:
/* RC-5 protocol changes toggle bit on new keypress */
protocol = RC_PROTO_RC5;
scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]);
toggle = st->buf[3 - 1];
break;
}
rc_keydown(d->rc_dev, protocol, scancode, toggle);
return 0;
}
/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
BAND_UHF | BAND_VHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
(0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
| (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
712,
41,
0,
118,
0,
4095,
0,
0,
42598,
17694,
45875,
2621,
0,
76,
139,
52,
59,
107,
172,
57,
70,
21,
25,
28,
48,
1,
{ 0,
107,
51800,
24700
},
};
static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
.band_caps = BAND_UHF | BAND_VHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
.inv_gain = 712,
.time_stabiliz = 41,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 4095,
.wbd_sel = 0,
.wbd_alpha = 0,
.agc1_max = 42598,
.agc1_min = 16384,
.agc2_max = 42598,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 137,
.agc1_pt3 = 255,
.agc1_slope1 = 0,
.agc1_slope2 = 255,
.agc2_pt1 = 0,
.agc2_pt2 = 0,
.agc2_slope1 = 0,
.agc2_slope2 = 41,
.alpha_mant = 15,
.alpha_exp = 25,
.beta_mant = 28,
.beta_exp = 48,
.perform_agc_softsplit = 0,
};
static struct dibx000_bandwidth_config stk7700p_pll_config = {
.internal = 60000,
.sampling = 30000,
.pll_prediv = 1,
.pll_ratio = 8,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 0,
.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
.ifreq = 60258167,
.timf = 20452225,
.xtal_hz = 30000000,
};
static struct dib7000m_config stk7700p_dib7000m_config = {
.dvbt_mode = 1,
.output_mpeg2_in_188_bytes = 1,
.quartz_direct = 1,
.agc_config_count = 1,
.agc = &stk7700p_7000m_mt2060_agc_config,
.bw = &stk7700p_pll_config,
.gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
};
static struct dib7000p_config stk7700p_dib7000p_config = {
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 1,
.agc = &stk7700p_7000p_mt2060_agc_config,
.bw = &stk7700p_pll_config,
.gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
};
static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
/* unless there is no real power management in DVB - we leave the device on GPIO6 */
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
dib0700_ctrl_clock(adap->dev, 72, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
st->mt2060_if1[0] = 1220;
if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
st->is_dib7000pc = 1;
} else {
memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
}
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static struct mt2060_config stk7700p_mt2060_config = {
0x60
};
static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
{
struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
struct dib0700_state *st = adap->dev->priv;
struct i2c_adapter *tun_i2c;
struct dib0700_adapter_state *state = adap->priv;
s8 a;
int if1=1220;
if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
}
if (st->is_dib7000pc)
tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
else
tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
if1) == NULL ? -ENODEV : 0;
}
/* DIB7070 generic */
static struct dibx000_agc_config dib7070_agc_config = {
.band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 600,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 3530,
.wbd_sel = 1,
.wbd_alpha = 5,
.agc1_max = 65535,
.agc1_min = 0,
.agc2_max = 65535,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 40,
.agc1_pt3 = 183,
.agc1_slope1 = 206,
.agc1_slope2 = 255,
.agc2_pt1 = 72,
.agc2_pt2 = 152,
.agc2_slope1 = 88,
.agc2_slope2 = 90,
.alpha_mant = 17,
.alpha_exp = 27,
.beta_mant = 23,
.beta_exp = 51,
.perform_agc_softsplit = 0,
};
static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
deb_info("reset: %d", onoff);
return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
}
static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
deb_info("sleep: %d", onoff);
return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
}
static struct dib0070_config dib7070p_dib0070_config[2] = {
{
.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
.reset = dib7070_tuner_reset,
.sleep = dib7070_tuner_sleep,
.clock_khz = 12000,
.clock_pad_drive = 4,
.charge_pump = 2,
}, {
.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
.reset = dib7070_tuner_reset,
.sleep = dib7070_tuner_sleep,
.clock_khz = 12000,
.charge_pump = 2,
}
};
static struct dib0070_config dib7770p_dib0070_config = {
.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
.reset = dib7070_tuner_reset,
.sleep = dib7070_tuner_sleep,
.clock_khz = 12000,
.clock_pad_drive = 0,
.flip_chip = 1,
.charge_pump = 2,
};
static int dib7070_set_param_override(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
u16 offset;
u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
switch (band) {
case BAND_VHF: offset = 950; break;
case BAND_UHF:
default: offset = 550; break;
}
deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
return state->set_param_save(fe);
}
static int dib7770_set_param_override(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
u16 offset;
u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
switch (band) {
case BAND_VHF:
state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
offset = 850;
break;
case BAND_UHF:
default:
state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
offset = 250;
break;
}
deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
return state->set_param_save(fe);
}
static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
DIBX000_I2C_INTERFACE_TUNER, 1);
if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
&dib7770p_dib0070_config) == NULL)
return -ENODEV;
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
return 0;
}
static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
if (adap->id == 0) {
if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
return -ENODEV;
} else {
if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
return -ENODEV;
}
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
return 0;
}
static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
u16 pid, int onoff)
{
struct dib0700_adapter_state *state = adapter->priv;
struct dib0700_state *st = adapter->dev->priv;
if (st->is_dib7000pc)
return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
}
static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
{
struct dib0700_state *st = adapter->dev->priv;
struct dib0700_adapter_state *state = adapter->priv;
if (st->is_dib7000pc)
return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
}
static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
{
struct dib0700_adapter_state *state = adapter->priv;
return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
}
static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
{
struct dib0700_adapter_state *state = adapter->priv;
return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
}
static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
.internal = 60000,
.sampling = 15000,
.pll_prediv = 1,
.pll_ratio = 20,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 2,
.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
.ifreq = (0 << 25) | 0,
.timf = 20452225,
.xtal_hz = 12000000,
};
static struct dib7000p_config dib7070p_dib7000p_config = {
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 1,
.agc = &dib7070_agc_config,
.bw = &dib7070_bw_config_12_mhz,
.tuner_is_baseband = 1,
.spur_protect = 1,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
};
/* STK7070P */
static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
{
struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
else
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
&dib7070p_dib7000p_config) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
__func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
&dib7070p_dib7000p_config);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
/* STK7770P */
static struct dib7000p_config dib7770p_dib7000p_config = {
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 1,
.agc = &dib7070_agc_config,
.bw = &dib7070_bw_config_12_mhz,
.tuner_is_baseband = 1,
.spur_protect = 1,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
.enable_current_mirror = 1,
.disable_sample_and_hold = 0,
};
static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
{
struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
else
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
&dib7770p_dib7000p_config) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
__func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
&dib7770p_dib7000p_config);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
/* DIB807x generic */
static struct dibx000_agc_config dib807x_agc_config[2] = {
{
BAND_VHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
* P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
* P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
* P_agc_write=0 */
(0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
(0 << 0), /* setup*/
600, /* inv_gain*/
10, /* time_stabiliz*/
0, /* alpha_level*/
118, /* thlock*/
0, /* wbd_inv*/
3530, /* wbd_ref*/
1, /* wbd_sel*/
5, /* wbd_alpha*/
65535, /* agc1_max*/
0, /* agc1_min*/
65535, /* agc2_max*/
0, /* agc2_min*/
0, /* agc1_pt1*/
40, /* agc1_pt2*/
183, /* agc1_pt3*/
206, /* agc1_slope1*/
255, /* agc1_slope2*/
72, /* agc2_pt1*/
152, /* agc2_pt2*/
88, /* agc2_slope1*/
90, /* agc2_slope2*/
17, /* alpha_mant*/
27, /* alpha_exp*/
23, /* beta_mant*/
51, /* beta_exp*/
0, /* perform_agc_softsplit*/
}, {
BAND_UHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
* P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
* P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
* P_agc_write=0 */
(0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
(0 << 0), /* setup */
600, /* inv_gain*/
10, /* time_stabiliz*/
0, /* alpha_level*/
118, /* thlock*/
0, /* wbd_inv*/
3530, /* wbd_ref*/
1, /* wbd_sel*/
5, /* wbd_alpha*/
65535, /* agc1_max*/
0, /* agc1_min*/
65535, /* agc2_max*/
0, /* agc2_min*/
0, /* agc1_pt1*/
40, /* agc1_pt2*/
183, /* agc1_pt3*/
206, /* agc1_slope1*/
255, /* agc1_slope2*/
72, /* agc2_pt1*/
152, /* agc2_pt2*/
88, /* agc2_slope1*/
90, /* agc2_slope2*/
17, /* alpha_mant*/
27, /* alpha_exp*/
23, /* beta_mant*/
51, /* beta_exp*/
0, /* perform_agc_softsplit*/
}
};
static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
.internal = 60000,
.sampling = 15000,
.pll_prediv = 1,
.pll_ratio = 20,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 2,
.sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
.ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
.timf = 18179755,
.xtal_hz = 12000000,
};
static struct dib8000_config dib807x_dib8000_config[2] = {
{
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 2,
.agc = dib807x_agc_config,
.pll = &dib807x_bw_config_12_mhz,
.tuner_is_baseband = 1,
.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
.div_cfg = 1,
.agc_control = &dib0070_ctrl_agc_filter,
.output_mode = OUTMODE_MPEG2_FIFO,
.drives = 0x2d98,
}, {
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 2,
.agc = dib807x_agc_config,
.pll = &dib807x_bw_config_12_mhz,
.tuner_is_baseband = 1,
.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
.agc_control = &dib0070_ctrl_agc_filter,
.output_mode = OUTMODE_MPEG2_FIFO,
.drives = 0x2d98,
}
};
static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
}
static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
}
static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
{ 240, 7},
{ 0xffff, 6},
};
static struct dib0070_config dib807x_dib0070_config[2] = {
{
.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
.reset = dib80xx_tuner_reset,
.sleep = dib80xx_tuner_sleep,
.clock_khz = 12000,
.clock_pad_drive = 4,
.vga_filter = 1,
.force_crystal_mode = 1,
.enable_third_order_filter = 1,
.charge_pump = 0,
.wbd_gain = dib8070_wbd_gain_cfg,
.osc_buffer_state = 0,
.freq_offset_khz_uhf = -100,
.freq_offset_khz_vhf = -100,
}, {
.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
.reset = dib80xx_tuner_reset,
.sleep = dib80xx_tuner_sleep,
.clock_khz = 12000,
.clock_pad_drive = 2,
.vga_filter = 1,
.force_crystal_mode = 1,
.enable_third_order_filter = 1,
.charge_pump = 0,
.wbd_gain = dib8070_wbd_gain_cfg,
.osc_buffer_state = 0,
.freq_offset_khz_uhf = -25,
.freq_offset_khz_vhf = -25,
}
};
static int dib807x_set_param_override(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
u16 offset = dib0070_wbd_offset(fe);
u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
switch (band) {
case BAND_VHF:
offset += 750;
break;
case BAND_UHF: /* fall-thru wanted */
default:
offset += 250; break;
}
deb_info("WBD for DiB8000: %d\n", offset);
state->dib8000_ops.set_wbd_ref(fe, offset);
return state->set_param_save(fe);
}
static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
DIBX000_I2C_INTERFACE_TUNER, 1);
if (adap->id == 0) {
if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
&dib807x_dib0070_config[0]) == NULL)
return -ENODEV;
} else {
if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
&dib807x_dib0070_config[1]) == NULL)
return -ENODEV;
}
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
return 0;
}
static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
u16 pid, int onoff)
{
struct dib0700_adapter_state *state = adapter->priv;
return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
}
static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
int onoff)
{
struct dib0700_adapter_state *state = adapter->priv;
return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
}
/* STK807x */
static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0x80, 0);
adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
&dib807x_dib8000_config[0]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
/* STK807xPVR */
static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(500);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
/* initialize IC 0 */
state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
&dib807x_dib8000_config[0]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
/* initialize IC 1 */
state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
&dib807x_dib8000_config[1]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
/* STK8096GP */
static struct dibx000_agc_config dib8090_agc_config[2] = {
{
.band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
* P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
| (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 787,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 3530,
.wbd_sel = 1,
.wbd_alpha = 5,
.agc1_max = 65535,
.agc1_min = 0,
.agc2_max = 65535,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 32,
.agc1_pt3 = 114,
.agc1_slope1 = 143,
.agc1_slope2 = 144,
.agc2_pt1 = 114,
.agc2_pt2 = 227,
.agc2_slope1 = 116,
.agc2_slope2 = 117,
.alpha_mant = 28,
.alpha_exp = 26,
.beta_mant = 31,
.beta_exp = 51,
.perform_agc_softsplit = 0,
},
{
.band_caps = BAND_CBAND,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
* P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
| (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 787,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 3530,
.wbd_sel = 1,
.wbd_alpha = 5,
.agc1_max = 0,
.agc1_min = 0,
.agc2_max = 65535,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 32,
.agc1_pt3 = 114,
.agc1_slope1 = 143,
.agc1_slope2 = 144,
.agc2_pt1 = 114,
.agc2_pt2 = 227,
.agc2_slope1 = 116,
.agc2_slope2 = 117,
.alpha_mant = 28,
.alpha_exp = 26,
.beta_mant = 31,
.beta_exp = 51,
.perform_agc_softsplit = 0,
}
};
static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
.internal = 54000,
.sampling = 13500,
.pll_prediv = 1,
.pll_ratio = 18,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 2,
.sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
.ifreq = (0 << 25) | 0,
.timf = 20199727,
.xtal_hz = 12000000,
};
static int dib8090_get_adc_power(struct dvb_frontend *fe)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
return state->dib8000_ops.get_adc_power(fe, 1);
}
static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
{
deb_info("AGC control callback: %i\n", restart);
dib0090_dcc_freq(fe, restart);
if (restart == 0) /* before AGC startup */
dib0090_set_dc_servo(fe, 1);
}
static struct dib8000_config dib809x_dib8000_config[2] = {
{
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 2,
.agc = dib8090_agc_config,
.agc_control = dib8090_agc_control,
.pll = &dib8090_pll_config_12mhz,
.tuner_is_baseband = 1,
.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
.div_cfg = 0x31,
.output_mode = OUTMODE_MPEG2_FIFO,
.drives = 0x2d98,
.diversity_delay = 48,
.refclksel = 3,
}, {
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 2,
.agc = dib8090_agc_config,
.agc_control = dib8090_agc_control,
.pll = &dib8090_pll_config_12mhz,
.tuner_is_baseband = 1,
.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
.div_cfg = 0x31,
.output_mode = OUTMODE_DIVERSITY,
.drives = 0x2d08,
.diversity_delay = 1,
.refclksel = 3,
}
};
static struct dib0090_wbd_slope dib8090_wbd_table[] = {
/* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
{ 120, 0, 500, 0, 500, 4 }, /* CBAND */
{ 170, 0, 450, 0, 450, 4 }, /* CBAND */
{ 380, 48, 373, 28, 259, 6 }, /* VHF */
{ 860, 34, 700, 36, 616, 6 }, /* high UHF */
{ 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
};
static struct dib0090_config dib809x_dib0090_config = {
.io.pll_bypass = 1,
.io.pll_range = 1,
.io.pll_prediv = 1,
.io.pll_loopdiv = 20,
.io.adc_clock_ratio = 8,
.io.pll_int_loop_filt = 0,
.io.clock_khz = 12000,
.reset = dib80xx_tuner_reset,
.sleep = dib80xx_tuner_sleep,
.clkouttobamse = 1,
.analog_output = 1,
.i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
.use_pwm_agc = 1,
.clkoutdrive = 1,
.get_adc_power = dib8090_get_adc_power,
.freq_offset_khz_uhf = -63,
.freq_offset_khz_vhf = -143,
.wbd = dib8090_wbd_table,
.fref_clock_ratio = 6,
};
static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
{
u8 optimal_pll_ratio = 20;
u32 freq_adc, ratio, rest, max = 0;
u8 pll_ratio;
for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
freq_adc = 12 * pll_ratio * (1 << 8) / 16;
ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
if (rest > freq_adc / 2)
rest = freq_adc - rest;
deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
if ((rest > max) && (rest > 717)) {
optimal_pll_ratio = pll_ratio;
max = rest;
}
}
deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
return optimal_pll_ratio;
}
static int dib8096_set_param_override(struct dvb_frontend *fe)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
u16 target, ltgain, rf_gain_limit;
u32 timf;
int ret = 0;
enum frontend_tune_state tune_state = CT_SHUTDOWN;
switch (band) {
default:
deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
fallthrough;
case BAND_VHF:
state->dib8000_ops.set_gpio(fe, 3, 0, 1);
break;
case BAND_UHF:
state->dib8000_ops.set_gpio(fe, 3, 0, 0);
break;
}
ret = state->set_param_save(fe);
if (ret < 0)
return ret;
if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
deb_info("only 6MHz bandwidth is supported\n");
return -EINVAL;
}
/* Update PLL if needed ratio */
state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
/* Get optimize PLL ratio to remove spurious */
pll_ratio = dib8090_compute_pll_parameters(fe);
if (pll_ratio == 17)
timf = 21387946;
else if (pll_ratio == 18)
timf = 20199727;
else if (pll_ratio == 19)
timf = 19136583;
else
timf = 18179756;
/* Update ratio */
state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
if (band != BAND_CBAND) {
/* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
state->dib8000_ops.set_wbd_ref(fe, target);
}
if (band == BAND_CBAND) {
deb_info("tuning in CBAND - soft-AGC startup\n");
dib0090_set_tune_state(fe, CT_AGC_START);
do {
ret = dib0090_gain_control(fe);
msleep(ret);
tune_state = dib0090_get_tune_state(fe);
if (tune_state == CT_AGC_STEP_0)
state->dib8000_ops.set_gpio(fe, 6, 0, 1);
else if (tune_state == CT_AGC_STEP_1) {
dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, <gain);
if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
state->dib8000_ops.set_gpio(fe, 6, 0, 0);
}
} while (tune_state < CT_AGC_STOP);
deb_info("switching to PWM AGC\n");
dib0090_pwm_gain_reset(fe);
state->dib8000_ops.pwm_agc_reset(fe);
state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
} else {
/* for everything else than CBAND we are using standard AGC */
deb_info("not tuning in CBAND - standard AGC startup\n");
dib0090_pwm_gain_reset(fe);
}
return 0;
}
static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
/* FIXME: if adap->id != 0, check if it is fe_adap[1] */
if (!dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config))
return -ENODEV;
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
return 0;
}
static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c;
struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
if (fe_slave) {
tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
return -ENODEV;
fe_slave->dvb = adap->fe_adap[0].fe->dvb;
fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
}
tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
return -ENODEV;
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
return 0;
}
static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dvb_frontend *fe_slave;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(1000);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
if (adap->fe_adap[0].fe == NULL)
return -ENODEV;
/* Needed to increment refcount */
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
return fe_slave == NULL ? -ENODEV : 0;
}
/* TFE8096P */
static struct dibx000_agc_config dib8096p_agc_config[2] = {
{
.band_caps = BAND_UHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11)
| (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
| (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 684,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 1200,
.wbd_sel = 3,
.wbd_alpha = 5,
.agc1_max = 65535,
.agc1_min = 0,
.agc2_max = 32767,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 0,
.agc1_pt3 = 105,
.agc1_slope1 = 0,
.agc1_slope2 = 156,
.agc2_pt1 = 105,
.agc2_pt2 = 255,
.agc2_slope1 = 54,
.agc2_slope2 = 0,
.alpha_mant = 28,
.alpha_exp = 26,
.beta_mant = 31,
.beta_exp = 51,
.perform_agc_softsplit = 0,
} , {
.band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11)
| (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
| (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 732,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 1200,
.wbd_sel = 3,
.wbd_alpha = 5,
.agc1_max = 65535,
.agc1_min = 0,
.agc2_max = 32767,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 0,
.agc1_pt3 = 98,
.agc1_slope1 = 0,
.agc1_slope2 = 167,
.agc2_pt1 = 98,
.agc2_pt2 = 255,
.agc2_slope1 = 52,
.agc2_slope2 = 0,
.alpha_mant = 28,
.alpha_exp = 26,
.beta_mant = 31,
.beta_exp = 51,
.perform_agc_softsplit = 0,
}
};
static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
.internal = 108000,
.sampling = 13500,
.pll_prediv = 1,
.pll_ratio = 9,
.pll_range = 1,
.pll_reset = 0,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 0,
.ADClkSrc = 0,
.modulo = 2,
.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
.ifreq = (0 << 25) | 0,
.timf = 20199729,
.xtal_hz = 12000000,
};
static struct dib8000_config tfe8096p_dib8000_config = {
.output_mpeg2_in_188_bytes = 1,
.hostbus_diversity = 1,
.update_lna = NULL,
.agc_config_count = 2,
.agc = dib8096p_agc_config,
.pll = &dib8096p_clock_config_12_mhz,
.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
.agc_control = NULL,
.diversity_delay = 48,
.output_mode = OUTMODE_MPEG2_FIFO,
.enMpegOutput = 1,
};
static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
{ 380, 81, 850, 64, 540, 4},
{ 860, 51, 866, 21, 375, 4},
{1700, 0, 250, 0, 100, 6},
{2600, 0, 250, 0, 100, 6},
{ 0xFFFF, 0, 0, 0, 0, 0},
};
static struct dib0090_config tfe8096p_dib0090_config = {
.io.clock_khz = 12000,
.io.pll_bypass = 0,
.io.pll_range = 0,
.io.pll_prediv = 3,
.io.pll_loopdiv = 6,
.io.adc_clock_ratio = 0,
.io.pll_int_loop_filt = 0,
.freq_offset_khz_uhf = -143,
.freq_offset_khz_vhf = -143,
.get_adc_power = dib8090_get_adc_power,
.clkouttobamse = 1,
.analog_output = 0,
.wbd_vhf_offset = 0,
.wbd_cband_offset = 0,
.use_pwm_agc = 1,
.clkoutdrive = 0,
.fref_clock_ratio = 1,
.ls_cfg_pad_drv = 0,
.data_tx_drv = 0,
.low_if = NULL,
.in_soc = 1,
.force_cband_input = 0,
};
struct dibx090p_best_adc {
u32 timf;
u32 pll_loopdiv;
u32 pll_prediv;
};
static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
{
u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
u16 xtal = 12000;
u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
u32 fdem_min = 66000;
u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
u32 harmonic_id = 0;
adc->timf = 0;
adc->pll_loopdiv = loopdiv;
adc->pll_prediv = prediv;
deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
/* Find Min and Max prediv */
while ((xtal / max_prediv) >= fcp_min)
max_prediv++;
max_prediv--;
min_prediv = max_prediv;
while ((xtal / min_prediv) <= fcp_max) {
min_prediv--;
if (min_prediv == 1)
break;
}
deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
min_prediv = 1;
for (prediv = min_prediv; prediv < max_prediv; prediv++) {
fcp = xtal / prediv;
if (fcp > fcp_min && fcp < fcp_max) {
for (loopdiv = 1; loopdiv < 64; loopdiv++) {
fmem = ((xtal/prediv) * loopdiv);
fdem = fmem / 2;
fs = fdem / 4;
/* test min/max system restrictions */
if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
spur = 0;
/* test fs harmonics positions */
for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
spur = 1;
break;
}
}
if (!spur) {
adc->pll_loopdiv = loopdiv;
adc->pll_prediv = prediv;
adc->timf = (4260880253U / fdem) * (1 << 8);
adc->timf += ((4260880253U % fdem) << 8) / fdem;
deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
break;
}
}
}
}
if (!spur)
break;
}
if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
return -EINVAL;
return 0;
}
static int dib8096p_agc_startup(struct dvb_frontend *fe)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
struct dibx000_bandwidth_config pll;
struct dibx090p_best_adc adc;
u16 target;
int ret;
ret = state->set_param_save(fe);
if (ret < 0)
return ret;
memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
dib0090_pwm_gain_reset(fe);
/* dib0090_get_wbd_target is returning any possible
temperature compensated wbd-target */
target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
state->dib8000_ops.set_wbd_ref(fe, target);
if (dib8096p_get_best_sampling(fe, &adc) == 0) {
pll.pll_ratio = adc.pll_loopdiv;
pll.pll_prediv = adc.pll_prediv;
dib0700_set_i2c_speed(adap->dev, 200);
state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
dib0700_set_i2c_speed(adap->dev, 1000);
}
return 0;
}
static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
u32 fw_version;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
return -ENODEV;
dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
if (fw_version >= 0x10200)
st->fw_use_new_i2c_api = 1;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
0x80, &tfe8096p_dib8000_config);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
&tfe8096p_dib0090_config) == NULL)
return -ENODEV;
st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
return 0;
}
/* STK9090M */
static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
{
return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
}
static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
{
return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
}
static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
{
return dib9000_set_gpio(fe, 5, 0, !onoff);
}
static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
{
return dib9000_set_gpio(fe, 0, 0, onoff);
}
static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
{
u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
u8 rb[2];
struct i2c_msg msg[2] = {
{.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
{.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
};
u8 index_data;
dibx000_i2c_set_speed(i2c, 250);
if (i2c_transfer(i2c, msg, 2) != 2)
return -EIO;
switch (rb[0] << 8 | rb[1]) {
case 0:
deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
return -EIO;
case 1:
deb_info("Found DiB0170 rev2");
break;
case 2:
deb_info("Found DiB0190 rev2");
break;
default:
deb_info("DiB01x0 not found");
return -EIO;
}
for (index_data = 0; index_data < len; index_data += 2) {
wb[2] = (data[index_data + 1] >> 8) & 0xff;
wb[3] = (data[index_data + 1]) & 0xff;
if (data[index_data] == 0) {
wb[0] = (data[index_data] >> 8) & 0xff;
wb[1] = (data[index_data]) & 0xff;
msg[0].len = 2;
if (i2c_transfer(i2c, msg, 2) != 2)
return -EIO;
wb[2] |= rb[0];
wb[3] |= rb[1] & ~(3 << 4);
}
wb[0] = (data[index_data] >> 8)&0xff;
wb[1] = (data[index_data])&0xff;
msg[0].len = 4;
if (i2c_transfer(i2c, &msg[0], 1) != 1)
return -EIO;
}
return 0;
}
static struct dib9000_config stk9090m_config = {
.output_mpeg2_in_188_bytes = 1,
.output_mode = OUTMODE_MPEG2_FIFO,
.vcxo_timer = 279620,
.timing_frequency = 20452225,
.demod_clock_khz = 60000,
.xtal_clock_khz = 30000,
.if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
.subband = {
2,
{
{ 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
{ 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
{ 0 },
},
},
.gpio_function = {
{ .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
{ .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
},
};
static struct dib9000_config nim9090md_config[2] = {
{
.output_mpeg2_in_188_bytes = 1,
.output_mode = OUTMODE_MPEG2_FIFO,
.vcxo_timer = 279620,
.timing_frequency = 20452225,
.demod_clock_khz = 60000,
.xtal_clock_khz = 30000,
.if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
}, {
.output_mpeg2_in_188_bytes = 1,
.output_mode = OUTMODE_DIVERSITY,
.vcxo_timer = 279620,
.timing_frequency = 20452225,
.demod_clock_khz = 60000,
.xtal_clock_khz = 30000,
.if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
.subband = {
2,
{
{ 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
{ 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
{ 0 },
},
},
.gpio_function = {
{ .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
{ .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
},
}
};
static struct dib0090_config dib9090_dib0090_config = {
.io.pll_bypass = 0,
.io.pll_range = 1,
.io.pll_prediv = 1,
.io.pll_loopdiv = 8,
.io.adc_clock_ratio = 8,
.io.pll_int_loop_filt = 0,
.io.clock_khz = 30000,
.reset = dib90x0_tuner_reset,
.sleep = dib90x0_tuner_sleep,
.clkouttobamse = 0,
.analog_output = 0,
.use_pwm_agc = 0,
.clkoutdrive = 0,
.freq_offset_khz_uhf = 0,
.freq_offset_khz_vhf = 0,
};
static struct dib0090_config nim9090md_dib0090_config[2] = {
{
.io.pll_bypass = 0,
.io.pll_range = 1,
.io.pll_prediv = 1,
.io.pll_loopdiv = 8,
.io.adc_clock_ratio = 8,
.io.pll_int_loop_filt = 0,
.io.clock_khz = 30000,
.reset = dib90x0_tuner_reset,
.sleep = dib90x0_tuner_sleep,
.clkouttobamse = 1,
.analog_output = 0,
.use_pwm_agc = 0,
.clkoutdrive = 0,
.freq_offset_khz_uhf = 0,
.freq_offset_khz_vhf = 0,
}, {
.io.pll_bypass = 0,
.io.pll_range = 1,
.io.pll_prediv = 1,
.io.pll_loopdiv = 8,
.io.adc_clock_ratio = 8,
.io.pll_int_loop_filt = 0,
.io.clock_khz = 30000,
.reset = dib90x0_tuner_reset,
.sleep = dib90x0_tuner_sleep,
.clkouttobamse = 0,
.analog_output = 0,
.use_pwm_agc = 0,
.clkoutdrive = 0,
.freq_offset_khz_uhf = 0,
.freq_offset_khz_vhf = 0,
}
};
static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
struct dib0700_state *st = adap->dev->priv;
u32 fw_version;
/* Make use of the new i2c functions from FW 1.20 */
dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
if (fw_version >= 0x10200)
st->fw_use_new_i2c_api = 1;
dib0700_set_i2c_speed(adap->dev, 340);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
deb_info("%s: Upload failed. (file not found?)\n", __func__);
return -ENODEV;
} else {
deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
}
stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
u16 data_dib190[10] = {
1, 0x1374,
2, 0x01a2,
7, 0x0020,
0, 0x00ef,
8, 0x0486,
};
if (!IS_ENABLED(CONFIG_DVB_DIB9000))
return -ENODEV;
if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
return -ENODEV;
i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
if (!i2c)
return -ENODEV;
if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
return -ENODEV;
dib0700_set_i2c_speed(adap->dev, 1500);
if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
return -ENODEV;
release_firmware(state->frontend_firmware);
return 0;
}
static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
struct dib0700_state *st = adap->dev->priv;
struct i2c_adapter *i2c;
struct dvb_frontend *fe_slave;
u32 fw_version;
/* Make use of the new i2c functions from FW 1.20 */
dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
if (fw_version >= 0x10200)
st->fw_use_new_i2c_api = 1;
dib0700_set_i2c_speed(adap->dev, 340);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
deb_info("%s: Upload failed. (file not found?)\n", __func__);
return -EIO;
} else {
deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
}
nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
if (adap->fe_adap[0].fe == NULL)
return -ENODEV;
i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
return fe_slave == NULL ? -ENODEV : 0;
}
static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
struct i2c_adapter *i2c;
struct dvb_frontend *fe_slave;
u16 data_dib190[10] = {
1, 0x5374,
2, 0x01ae,
7, 0x0020,
0, 0x00ef,
8, 0x0406,
};
if (!IS_ENABLED(CONFIG_DVB_DIB9000))
return -ENODEV;
i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
return -ENODEV;
i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
if (!i2c)
return -ENODEV;
if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
return -ENODEV;
dib0700_set_i2c_speed(adap->dev, 1500);
if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
return -ENODEV;
fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
if (fe_slave != NULL) {
i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
dib9000_set_i2c_adapter(fe_slave, i2c);
i2c = dib9000_get_tuner_interface(fe_slave);
if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
return -ENODEV;
fe_slave->dvb = adap->fe_adap[0].fe->dvb;
dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
if (dib9000_firmware_post_pll_init(fe_slave) < 0)
return -ENODEV;
}
release_firmware(state->frontend_firmware);
return 0;
}
/* NIM7090 */
static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
{
u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
u16 xtal = 12000;
u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
u32 fdem_max = 76000;
u32 fdem_min = 69500;
u32 fcp = 0, fs = 0, fdem = 0;
u32 harmonic_id = 0;
adc->pll_loopdiv = loopdiv;
adc->pll_prediv = prediv;
adc->timf = 0;
deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
/* Find Min and Max prediv */
while ((xtal/max_prediv) >= fcp_min)
max_prediv++;
max_prediv--;
min_prediv = max_prediv;
while ((xtal/min_prediv) <= fcp_max) {
min_prediv--;
if (min_prediv == 1)
break;
}
deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
min_prediv = 2;
for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
fcp = xtal / prediv;
if (fcp > fcp_min && fcp < fcp_max) {
for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
fdem = ((xtal/prediv) * loopdiv);
fs = fdem / 4;
/* test min/max system restrictions */
if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
spur = 0;
/* test fs harmonics positions */
for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
spur = 1;
break;
}
}
if (!spur) {
adc->pll_loopdiv = loopdiv;
adc->pll_prediv = prediv;
adc->timf = 2396745143UL/fdem*(1 << 9);
adc->timf += ((2396745143UL%fdem) << 9)/fdem;
deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
break;
}
}
}
}
if (!spur)
break;
}
if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
return -EINVAL;
else
return 0;
}
static int dib7090_agc_startup(struct dvb_frontend *fe)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
struct dibx000_bandwidth_config pll;
u16 target;
struct dibx090p_best_adc adc;
int ret;
ret = state->set_param_save(fe);
if (ret < 0)
return ret;
memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
dib0090_pwm_gain_reset(fe);
target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
state->dib7000p_ops.set_wbd_ref(fe, target);
if (dib7090p_get_best_sampling(fe, &adc) == 0) {
pll.pll_ratio = adc.pll_loopdiv;
pll.pll_prediv = adc.pll_prediv;
state->dib7000p_ops.update_pll(fe, &pll);
state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
}
return 0;
}
static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
{
deb_info("AGC restart callback: %d", restart);
if (restart == 0) /* before AGC startup */
dib0090_set_dc_servo(fe, 1);
return 0;
}
static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
deb_info("update LNA: agc global=%i", agc_global);
if (agc_global < 25000) {
state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
state->dib7000p_ops.set_agc1_min(fe, 0);
} else {
state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
state->dib7000p_ops.set_agc1_min(fe, 32768);
}
return 0;
}
static struct dib0090_wbd_slope dib7090_wbd_table[] = {
{ 380, 81, 850, 64, 540, 4},
{ 860, 51, 866, 21, 375, 4},
{1700, 0, 250, 0, 100, 6},
{2600, 0, 250, 0, 100, 6},
{ 0xFFFF, 0, 0, 0, 0, 0},
};
static struct dibx000_agc_config dib7090_agc_config[2] = {
{
.band_caps = BAND_UHF,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 687,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 1200,
.wbd_sel = 3,
.wbd_alpha = 5,
.agc1_max = 65535,
.agc1_min = 32768,
.agc2_max = 65535,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 32,
.agc1_pt3 = 114,
.agc1_slope1 = 143,
.agc1_slope2 = 144,
.agc2_pt1 = 114,
.agc2_pt2 = 227,
.agc2_slope1 = 116,
.agc2_slope2 = 117,
.alpha_mant = 18,
.alpha_exp = 0,
.beta_mant = 20,
.beta_exp = 59,
.perform_agc_softsplit = 0,
} , {
.band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
.inv_gain = 732,
.time_stabiliz = 10,
.alpha_level = 0,
.thlock = 118,
.wbd_inv = 0,
.wbd_ref = 1200,
.wbd_sel = 3,
.wbd_alpha = 5,
.agc1_max = 65535,
.agc1_min = 0,
.agc2_max = 65535,
.agc2_min = 0,
.agc1_pt1 = 0,
.agc1_pt2 = 0,
.agc1_pt3 = 98,
.agc1_slope1 = 0,
.agc1_slope2 = 167,
.agc2_pt1 = 98,
.agc2_pt2 = 255,
.agc2_slope1 = 104,
.agc2_slope2 = 0,
.alpha_mant = 18,
.alpha_exp = 0,
.beta_mant = 20,
.beta_exp = 59,
.perform_agc_softsplit = 0,
}
};
static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
.internal = 60000,
.sampling = 15000,
.pll_prediv = 1,
.pll_ratio = 5,
.pll_range = 0,
.pll_reset = 0,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 2,
.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
.ifreq = (0 << 25) | 0,
.timf = 20452225,
.xtal_hz = 15000000,
};
static struct dib7000p_config nim7090_dib7000p_config = {
.output_mpeg2_in_188_bytes = 1,
.hostbus_diversity = 1,
.tuner_is_baseband = 1,
.update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
.agc_config_count = 2,
.agc = dib7090_agc_config,
.bw = &dib7090_clock_config_12_mhz,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.pwm_freq_div = 0,
.agc_control = dib7090_agc_restart,
.spur_protect = 0,
.disable_sample_and_hold = 0,
.enable_current_mirror = 0,
.diversity_delay = 0,
.output_mode = OUTMODE_MPEG2_FIFO,
.enMpegOutput = 1,
};
static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dib0700_adapter_state *state = adap->priv;
deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
if (agc_global < 25000) {
state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
state->dib7000p_ops.set_agc1_min(fe, 0);
} else {
state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
state->dib7000p_ops.set_agc1_min(fe, 32768);
}
return 0;
}
static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
{
.output_mpeg2_in_188_bytes = 1,
.hostbus_diversity = 1,
.tuner_is_baseband = 1,
.update_lna = tfe7090p_pvr_update_lna,
.agc_config_count = 2,
.agc = dib7090_agc_config,
.bw = &dib7090_clock_config_12_mhz,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.pwm_freq_div = 0,
.agc_control = dib7090_agc_restart,
.spur_protect = 0,
.disable_sample_and_hold = 0,
.enable_current_mirror = 0,
.diversity_delay = 0,
.output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
.default_i2c_addr = 0x90,
.enMpegOutput = 1,
}, {
.output_mpeg2_in_188_bytes = 1,
.hostbus_diversity = 1,
.tuner_is_baseband = 1,
.update_lna = tfe7090p_pvr_update_lna,
.agc_config_count = 2,
.agc = dib7090_agc_config,
.bw = &dib7090_clock_config_12_mhz,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.pwm_freq_div = 0,
.agc_control = dib7090_agc_restart,
.spur_protect = 0,
.disable_sample_and_hold = 0,
.enable_current_mirror = 0,
.diversity_delay = 0,
.output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
.default_i2c_addr = 0x92,
.enMpegOutput = 0,
}
};
static struct dib0090_config nim7090_dib0090_config = {
.io.clock_khz = 12000,
.io.pll_bypass = 0,
.io.pll_range = 0,
.io.pll_prediv = 3,
.io.pll_loopdiv = 6,
.io.adc_clock_ratio = 0,
.io.pll_int_loop_filt = 0,
.freq_offset_khz_uhf = 0,
.freq_offset_khz_vhf = 0,
.clkouttobamse = 1,
.analog_output = 0,
.wbd_vhf_offset = 0,
.wbd_cband_offset = 0,
.use_pwm_agc = 1,
.clkoutdrive = 0,
.fref_clock_ratio = 0,
.wbd = dib7090_wbd_table,
.ls_cfg_pad_drv = 0,
.data_tx_drv = 0,
.low_if = NULL,
.in_soc = 1,
};
static struct dib7000p_config tfe7790p_dib7000p_config = {
.output_mpeg2_in_188_bytes = 1,
.hostbus_diversity = 1,
.tuner_is_baseband = 1,
.update_lna = tfe7790p_update_lna,
.agc_config_count = 2,
.agc = dib7090_agc_config,
.bw = &dib7090_clock_config_12_mhz,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.pwm_freq_div = 0,
.agc_control = dib7090_agc_restart,
.spur_protect = 0,
.disable_sample_and_hold = 0,
.enable_current_mirror = 0,
.diversity_delay = 0,
.output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
.enMpegOutput = 1,
};
static struct dib0090_config tfe7790p_dib0090_config = {
.io.clock_khz = 12000,
.io.pll_bypass = 0,
.io.pll_range = 0,
.io.pll_prediv = 3,
.io.pll_loopdiv = 6,
.io.adc_clock_ratio = 0,
.io.pll_int_loop_filt = 0,
.freq_offset_khz_uhf = 0,
.freq_offset_khz_vhf = 0,
.clkouttobamse = 1,
.analog_output = 0,
.wbd_vhf_offset = 0,
.wbd_cband_offset = 0,
.use_pwm_agc = 1,
.clkoutdrive = 0,
.fref_clock_ratio = 0,
.wbd = dib7090_wbd_table,
.ls_cfg_pad_drv = 0,
.data_tx_drv = 0,
.low_if = NULL,
.in_soc = 1,
.force_cband_input = 0,
.is_dib7090e = 0,
.force_crystal_mode = 1,
};
static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
{
.io.clock_khz = 12000,
.io.pll_bypass = 0,
.io.pll_range = 0,
.io.pll_prediv = 3,
.io.pll_loopdiv = 6,
.io.adc_clock_ratio = 0,
.io.pll_int_loop_filt = 0,
.freq_offset_khz_uhf = 50,
.freq_offset_khz_vhf = 70,
.clkouttobamse = 1,
.analog_output = 0,
.wbd_vhf_offset = 0,
.wbd_cband_offset = 0,
.use_pwm_agc = 1,
.clkoutdrive = 0,
.fref_clock_ratio = 0,
.wbd = dib7090_wbd_table,
.ls_cfg_pad_drv = 0,
.data_tx_drv = 0,
.low_if = NULL,
.in_soc = 1,
}, {
.io.clock_khz = 12000,
.io.pll_bypass = 0,
.io.pll_range = 0,
.io.pll_prediv = 3,
.io.pll_loopdiv = 6,
.io.adc_clock_ratio = 0,
.io.pll_int_loop_filt = 0,
.freq_offset_khz_uhf = -50,
.freq_offset_khz_vhf = -70,
.clkouttobamse = 1,
.analog_output = 0,
.wbd_vhf_offset = 0,
.wbd_cband_offset = 0,
.use_pwm_agc = 1,
.clkoutdrive = 0,
.fref_clock_ratio = 0,
.wbd = dib7090_wbd_table,
.ls_cfg_pad_drv = 0,
.data_tx_drv = 0,
.low_if = NULL,
.in_soc = 1,
}
};
static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
return -ENODEV;
st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
return 0;
}
static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
/* The TFE7090 requires the dib0700 to not be in master mode */
st->disable_streaming_master_mode = 1;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
/* initialize IC 0 */
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
dib0700_set_i2c_speed(adap->dev, 340);
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
if (adap->fe_adap[0].fe == NULL)
return -ENODEV;
state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
return 0;
}
static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
{
struct i2c_adapter *i2c;
struct dib0700_adapter_state *state = adap->priv;
if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
err("the master dib7090 has to be initialized first");
return -ENODEV; /* the master device has not been initialized */
}
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
dib0700_set_i2c_speed(adap->dev, 200);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
return -ENODEV;
st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
return 0;
}
static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
return -ENODEV;
st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
return 0;
}
static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
/* The TFE7790P requires the dib0700 to not be in master mode */
st->disable_streaming_master_mode = 1;
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(20);
dib0700_ctrl_clock(adap->dev, 72, 1);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(20);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
1, 0x10, &tfe7790p_dib7000p_config) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
__func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
0x80, &tfe7790p_dib7000p_config);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *st = adap->priv;
struct i2c_adapter *tun_i2c =
st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
&tfe7790p_dib0090_config) == NULL)
return -ENODEV;
st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
return 0;
}
/* STK7070PD */
static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
{
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 1,
.agc = &dib7070_agc_config,
.bw = &dib7070_bw_config_12_mhz,
.tuner_is_baseband = 1,
.spur_protect = 1,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
}, {
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 1,
.agc = &dib7070_agc_config,
.bw = &dib7070_bw_config_12_mhz,
.tuner_is_baseband = 1,
.spur_protect = 1,
.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
.hostbus_diversity = 1,
}
};
static void stk7070pd_init(struct dvb_usb_device *dev)
{
dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
msleep(10);
dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
dib0700_ctrl_clock(dev, 72, 1);
msleep(10);
dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
}
static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
stk7070pd_init(adap->dev);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
stk7070pd_dib7000p_config) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
__func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
{
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int novatd_read_status_override(struct dvb_frontend *fe,
enum fe_status *stat)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dvb_usb_device *dev = adap->dev;
struct dib0700_state *state = dev->priv;
int ret;
ret = state->read_status(fe, stat);
if (!ret)
dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
!!(*stat & FE_HAS_LOCK));
return ret;
}
static int novatd_sleep_override(struct dvb_frontend* fe)
{
struct dvb_usb_adapter *adap = fe->dvb->priv;
struct dvb_usb_device *dev = adap->dev;
struct dib0700_state *state = dev->priv;
/* turn off LED */
dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
return state->sleep(fe);
}
/*
* novatd_frontend_attach - Nova-TD specific attach
*
* Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
* information purposes.
*/
static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dvb_usb_device *dev = adap->dev;
struct dib0700_state *st = dev->priv;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
if (adap->id == 0) {
stk7070pd_init(dev);
/* turn the power LED on, the other two off (just in case) */
dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
stk7070pd_dib7000p_config) != 0) {
err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
__func__);
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
adap->id == 0 ? 0x80 : 0x82,
&stk7070pd_dib7000p_config[adap->id]);
if (adap->fe_adap[0].fe == NULL)
return -ENODEV;
st->read_status = adap->fe_adap[0].fe->ops.read_status;
adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
st->sleep = adap->fe_adap[0].fe->ops.sleep;
adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
return 0;
}
/* S5H1411 */
static struct s5h1411_config pinnacle_801e_config = {
.output_mode = S5H1411_PARALLEL_OUTPUT,
.gpio = S5H1411_GPIO_OFF,
.mpeg_timing = S5H1411_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK,
.qam_if = S5H1411_IF_44000,
.vsb_if = S5H1411_IF_44000,
.inversion = S5H1411_INVERSION_OFF,
.status_mode = S5H1411_DEMODLOCKING
};
/* Pinnacle PCTV HD Pro 801e GPIOs map:
GPIO0 - currently unknown
GPIO1 - xc5000 tuner reset
GPIO2 - CX25843 sleep
GPIO3 - currently unknown
GPIO4 - currently unknown
GPIO6 - currently unknown
GPIO7 - currently unknown
GPIO9 - currently unknown
GPIO10 - CX25843 reset
*/
static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
/* Make use of the new i2c functions from FW 1.20 */
st->fw_use_new_i2c_api = 1;
/* The s5h1411 requires the dib0700 to not be in master mode */
st->disable_streaming_master_mode = 1;
/* All msleep values taken from Windows USB trace */
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(400);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(60);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
msleep(30);
/* Put the CX25843 to sleep for now since we're in digital mode */
dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
/* GPIOs are initialized, do the attach */
adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
&adap->dev->i2c_adap);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int dib0700_xc5000_tuner_callback(void *priv, int component,
int command, int arg)
{
struct dvb_usb_adapter *adap = priv;
if (command == XC5000_TUNER_RESET) {
/* Reset the tuner */
dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
msleep(10);
dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
msleep(10);
} else {
err("xc5000: unknown tuner callback command: %d\n", command);
return -EINVAL;
}
return 0;
}
static struct xc5000_config s5h1411_xc5000_tunerconfig = {
.i2c_address = 0x64,
.if_khz = 5380,
};
static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
{
/* FIXME: generalize & move to common area */
adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
&s5h1411_xc5000_tunerconfig)
== NULL ? -ENODEV : 0;
}
static int dib0700_xc4000_tuner_callback(void *priv, int component,
int command, int arg)
{
struct dvb_usb_adapter *adap = priv;
struct dib0700_adapter_state *state = adap->priv;
if (command == XC4000_TUNER_RESET) {
/* Reset the tuner */
state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
msleep(10);
state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
} else {
err("xc4000: unknown tuner callback command: %d\n", command);
return -EINVAL;
}
return 0;
}
static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
.band_caps = BAND_UHF | BAND_VHF,
.setup = 0x64,
.inv_gain = 0x02c8,
.time_stabiliz = 0x15,
.alpha_level = 0x00,
.thlock = 0x76,
.wbd_inv = 0x01,
.wbd_ref = 0x0b33,
.wbd_sel = 0x00,
.wbd_alpha = 0x02,
.agc1_max = 0x00,
.agc1_min = 0x00,
.agc2_max = 0x9b26,
.agc2_min = 0x26ca,
.agc1_pt1 = 0x00,
.agc1_pt2 = 0x00,
.agc1_pt3 = 0x00,
.agc1_slope1 = 0x00,
.agc1_slope2 = 0x00,
.agc2_pt1 = 0x00,
.agc2_pt2 = 0x80,
.agc2_slope1 = 0x1d,
.agc2_slope2 = 0x1d,
.alpha_mant = 0x11,
.alpha_exp = 0x1b,
.beta_mant = 0x17,
.beta_exp = 0x33,
.perform_agc_softsplit = 0x00,
};
static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
.internal = 60000,
.sampling = 30000,
.pll_prediv = 1,
.pll_ratio = 8,
.pll_range = 3,
.pll_reset = 1,
.pll_bypass = 0,
.enable_refdiv = 0,
.bypclk_div = 0,
.IO_CLK_en_core = 1,
.ADClkSrc = 1,
.modulo = 0,
.sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
.ifreq = 39370534,
.timf = 20452225,
.xtal_hz = 30000000
};
/* FIXME: none of these inputs are validated yet */
static struct dib7000p_config pctv_340e_config = {
.output_mpeg2_in_188_bytes = 1,
.agc_config_count = 1,
.agc = &stk7700p_7000p_xc4000_agc_config,
.bw = &stk7700p_xc4000_pll_config,
.gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
.gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
.gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
};
/* PCTV 340e GPIOs map:
dib0700:
GPIO2 - CX25843 sleep
GPIO3 - CS5340 reset
GPIO5 - IRD
GPIO6 - Power Supply
GPIO8 - LNA (1=off 0=on)
GPIO10 - CX25843 reset
dib7000:
GPIO8 - xc4000 reset
*/
static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
struct dib0700_adapter_state *state = adap->priv;
if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
return -ENODEV;
/* Power Supply on */
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
msleep(50);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(100); /* Allow power supply to settle before probing */
/* cx25843 reset */
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(1); /* cx25843 datasheet say 350us required */
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
/* LNA off for now */
dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
/* Put the CX25843 to sleep for now since we're in digital mode */
dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
/* FIXME: not verified yet */
dib0700_ctrl_clock(adap->dev, 72, 1);
msleep(500);
if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
/* Demodulator not found for some reason? */
dvb_detach(state->dib7000p_ops.set_wbd_ref);
return -ENODEV;
}
adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
&pctv_340e_config);
st->is_dib7000pc = 1;
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static struct xc4000_config dib7000p_xc4000_tunerconfig = {
.i2c_address = 0x61,
.default_pm = 1,
.dvb_amplitude = 0,
.set_smoothedcvbs = 0,
.if_khz = 5400
};
static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
{
struct i2c_adapter *tun_i2c;
struct dib0700_adapter_state *state = adap->priv;
/* The xc4000 is not on the main i2c bus */
tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
DIBX000_I2C_INTERFACE_TUNER, 1);
if (tun_i2c == NULL) {
printk(KERN_ERR "Could not reach tuner i2c bus\n");
return 0;
}
/* Setup the reset callback */
adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
&dib7000p_xc4000_tunerconfig)
== NULL ? -ENODEV : 0;
}
static struct lgdt3305_config hcw_lgdt3305_config = {
.i2c_addr = 0x0e,
.mpeg_mode = LGDT3305_MPEG_PARALLEL,
.tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
.tpvalid_polarity = LGDT3305_TP_VALID_LOW,
.deny_i2c_rptr = 0,
.spectral_inversion = 1,
.qam_if_khz = 6000,
.vsb_if_khz = 6000,
.usref_8vsb = 0x0500,
};
static struct mxl5007t_config hcw_mxl5007t_config = {
.xtal_freq_hz = MxL_XTAL_25_MHZ,
.if_freq_hz = MxL_IF_6_MHZ,
.invert_if = 1,
};
/* TIGER-ATSC map:
GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
GPIO1 - ANT_SEL (H: VPA, L: MCX)
GPIO4 - SCL2
GPIO6 - EN_TUNER
GPIO7 - SDA2
GPIO10 - DEM_RST
MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
*/
static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
/* Make use of the new i2c functions from FW 1.20 */
st->fw_use_new_i2c_api = 1;
st->disable_streaming_master_mode = 1;
/* fe power enable */
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(30);
/* demod reset */
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(30);
adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
&hcw_lgdt3305_config,
&adap->dev->i2c_adap);
return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
}
static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
{
return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
&adap->dev->i2c_adap, 0x60,
&hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
}
static int xbox_one_attach(struct dvb_usb_adapter *adap)
{
struct dib0700_state *st = adap->dev->priv;
struct i2c_client *client_demod, *client_tuner;
struct dvb_usb_device *d = adap->dev;
struct mn88472_config mn88472_config = { };
struct tda18250_config tda18250_config;
struct i2c_board_info info;
st->fw_use_new_i2c_api = 1;
st->disable_streaming_master_mode = 1;
/* fe power enable */
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
msleep(30);
/* demod reset */
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
msleep(30);
dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
msleep(30);
/* attach demod */
mn88472_config.fe = &adap->fe_adap[0].fe;
mn88472_config.i2c_wr_max = 22;
mn88472_config.xtal = 20500000;
mn88472_config.ts_mode = PARALLEL_TS_MODE;
mn88472_config.ts_clock = FIXED_TS_CLOCK;
memset(&info, 0, sizeof(struct i2c_board_info));
strscpy(info.type, "mn88472", I2C_NAME_SIZE);
info.addr = 0x18;
info.platform_data = &mn88472_config;
request_module(info.type);
client_demod = i2c_new_client_device(&d->i2c_adap, &info);
if (!i2c_client_has_driver(client_demod))
goto fail_demod_device;
if (!try_module_get(client_demod->dev.driver->owner))
goto fail_demod_module;
st->i2c_client_demod = client_demod;
adap->fe_adap[0].fe = mn88472_config.get_dvb_frontend(client_demod);
/* attach tuner */
memset(&tda18250_config, 0, sizeof(tda18250_config));
tda18250_config.if_dvbt_6 = 3950;
tda18250_config.if_dvbt_7 = 4450;
tda18250_config.if_dvbt_8 = 4950;
tda18250_config.if_dvbc_6 = 4950;
tda18250_config.if_dvbc_8 = 4950;
tda18250_config.if_atsc = 4079;
tda18250_config.loopthrough = true;
tda18250_config.xtal_freq = TDA18250_XTAL_FREQ_27MHZ;
tda18250_config.fe = adap->fe_adap[0].fe;
memset(&info, 0, sizeof(struct i2c_board_info));
strscpy(info.type, "tda18250", I2C_NAME_SIZE);
info.addr = 0x60;
info.platform_data = &tda18250_config;
request_module(info.type);
client_tuner = i2c_new_client_device(&adap->dev->i2c_adap, &info);
if (!i2c_client_has_driver(client_tuner))
goto fail_tuner_device;
if (!try_module_get(client_tuner->dev.driver->owner))
goto fail_tuner_module;
st->i2c_client_tuner = client_tuner;
return 0;
fail_tuner_module:
i2c_unregister_device(client_tuner);
fail_tuner_device:
module_put(client_demod->dev.driver->owner);
fail_demod_module:
i2c_unregister_device(client_demod);
fail_demod_device:
return -ENODEV;
}
/* DVB-USB and USB stuff follows */
enum {
DIBCOM_STK7700P,
DIBCOM_STK7700P_PC,
HAUPPAUGE_NOVA_T_500,
HAUPPAUGE_NOVA_T_500_2,
HAUPPAUGE_NOVA_T_STICK,
AVERMEDIA_VOLAR,
COMPRO_VIDEOMATE_U500,
UNIWILL_STK7700P,
LEADTEK_WINFAST_DTV_DONGLE_STK7700P,
HAUPPAUGE_NOVA_T_STICK_2,
AVERMEDIA_VOLAR_2,
PINNACLE_PCTV2000E,
TERRATEC_CINERGY_DT_XS_DIVERSITY,
HAUPPAUGE_NOVA_TD_STICK,
DIBCOM_STK7700D,
DIBCOM_STK7070P,
PINNACLE_PCTV_DVB_T_FLASH,
DIBCOM_STK7070PD,
PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T,
COMPRO_VIDEOMATE_U500_PC,
AVERMEDIA_EXPRESS,
GIGABYTE_U7000,
ULTIMA_ARTEC_T14BR,
ASUS_U3000,
ASUS_U3100,
HAUPPAUGE_NOVA_T_STICK_3,
HAUPPAUGE_MYTV_T,
TERRATEC_CINERGY_HT_USB_XE,
PINNACLE_EXPRESSCARD_320CX,
PINNACLE_PCTV72E,
PINNACLE_PCTV73E,
YUAN_EC372S,
TERRATEC_CINERGY_HT_EXPRESS,
TERRATEC_CINERGY_T_XXS,
LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2,
HAUPPAUGE_NOVA_TD_STICK_52009,
HAUPPAUGE_NOVA_T_500_3,
GIGABYTE_U8000,
YUAN_STK7700PH,
ASUS_U3000H,
PINNACLE_PCTV801E,
PINNACLE_PCTV801E_SE,
TERRATEC_CINERGY_T_EXPRESS,
TERRATEC_CINERGY_DT_XS_DIVERSITY_2,
SONY_PLAYTV,
YUAN_PD378S,
HAUPPAUGE_TIGER_ATSC,
HAUPPAUGE_TIGER_ATSC_B210,
YUAN_MC770,
ELGATO_EYETV_DTT,
ELGATO_EYETV_DTT_Dlx,
LEADTEK_WINFAST_DTV_DONGLE_H,
TERRATEC_T3,
TERRATEC_T5,
YUAN_STK7700D,
YUAN_STK7700D_2,
PINNACLE_PCTV73A,
PCTV_PINNACLE_PCTV73ESE,
PCTV_PINNACLE_PCTV282E,
DIBCOM_STK7770P,
TERRATEC_CINERGY_T_XXS_2,
DIBCOM_STK807XPVR,
DIBCOM_STK807XP,
PIXELVIEW_SBTVD,
EVOLUTEPC_TVWAY_PLUS,
PINNACLE_PCTV73ESE,
PINNACLE_PCTV282E,
DIBCOM_STK8096GP,
ELGATO_EYETV_DIVERSITY,
DIBCOM_NIM9090M,
DIBCOM_NIM8096MD,
DIBCOM_NIM9090MD,
DIBCOM_NIM7090,
DIBCOM_TFE7090PVR,
TECHNISAT_AIRSTAR_TELESTICK_2,
MEDION_CREATIX_CTX1921,
PINNACLE_PCTV340E,
PINNACLE_PCTV340E_SE,
DIBCOM_TFE7790P,
DIBCOM_TFE8096P,
ELGATO_EYETV_DTT_2,
PCTV_2002E,
PCTV_2002E_SE,
PCTV_DIBCOM_STK8096PVR,
DIBCOM_STK8096PVR,
HAMA_DVBT_HYBRID,
MICROSOFT_XBOX_ONE_TUNER,
};
struct usb_device_id dib0700_usb_id_table[] = {
DVB_USB_DEV(DIBCOM, DIBCOM_STK7700P),
DVB_USB_DEV(DIBCOM, DIBCOM_STK7700P_PC),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500_2),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK),
DVB_USB_DEV(AVERMEDIA, AVERMEDIA_VOLAR),
DVB_USB_DEV(COMPRO, COMPRO_VIDEOMATE_U500),
DVB_USB_DEV(UNIWILL, UNIWILL_STK7700P),
DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_STK7700P),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK_2),
DVB_USB_DEV(AVERMEDIA, AVERMEDIA_VOLAR_2),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV2000E),
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_DT_XS_DIVERSITY),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_TD_STICK),
DVB_USB_DEV(DIBCOM, DIBCOM_STK7700D),
DVB_USB_DEV(DIBCOM, DIBCOM_STK7070P),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_DVB_T_FLASH),
DVB_USB_DEV(DIBCOM, DIBCOM_STK7070PD),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T),
DVB_USB_DEV(COMPRO, COMPRO_VIDEOMATE_U500_PC),
DVB_USB_DEV(AVERMEDIA, AVERMEDIA_EXPRESS),
DVB_USB_DEV(GIGABYTE, GIGABYTE_U7000),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_ARTEC_T14BR),
DVB_USB_DEV(ASUS, ASUS_U3000),
DVB_USB_DEV(ASUS, ASUS_U3100),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK_3),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_MYTV_T),
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_HT_USB_XE),
DVB_USB_DEV(PINNACLE, PINNACLE_EXPRESSCARD_320CX),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV72E),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73E),
DVB_USB_DEV(YUAN, YUAN_EC372S),
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_HT_EXPRESS),
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_XXS),
DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_TD_STICK_52009),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500_3),
DVB_USB_DEV(GIGABYTE, GIGABYTE_U8000),
DVB_USB_DEV(YUAN, YUAN_STK7700PH),
DVB_USB_DEV(ASUS, ASUS_U3000H),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV801E),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV801E_SE),
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_EXPRESS),
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_DT_XS_DIVERSITY_2),
DVB_USB_DEV(SONY, SONY_PLAYTV),
DVB_USB_DEV(YUAN, YUAN_PD378S),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_TIGER_ATSC),
DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_TIGER_ATSC_B210),
DVB_USB_DEV(YUAN, YUAN_MC770),
DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT),
DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT_Dlx),
DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_H),
DVB_USB_DEV(TERRATEC, TERRATEC_T3),
DVB_USB_DEV(TERRATEC, TERRATEC_T5),
DVB_USB_DEV(YUAN, YUAN_STK7700D),
DVB_USB_DEV(YUAN, YUAN_STK7700D_2),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73A),
DVB_USB_DEV(PCTV, PCTV_PINNACLE_PCTV73ESE),
DVB_USB_DEV(PCTV, PCTV_PINNACLE_PCTV282E),
DVB_USB_DEV(DIBCOM, DIBCOM_STK7770P),
DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_XXS_2),
DVB_USB_DEV(DIBCOM, DIBCOM_STK807XPVR),
DVB_USB_DEV(DIBCOM, DIBCOM_STK807XP),
DVB_USB_DEV_VER(PIXELVIEW, PIXELVIEW_SBTVD, 0x000, 0x3f00),
DVB_USB_DEV(EVOLUTEPC, EVOLUTEPC_TVWAY_PLUS),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73ESE),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV282E),
DVB_USB_DEV(DIBCOM, DIBCOM_STK8096GP),
DVB_USB_DEV(ELGATO, ELGATO_EYETV_DIVERSITY),
DVB_USB_DEV(DIBCOM, DIBCOM_NIM9090M),
DVB_USB_DEV(DIBCOM, DIBCOM_NIM8096MD),
DVB_USB_DEV(DIBCOM, DIBCOM_NIM9090MD),
DVB_USB_DEV(DIBCOM, DIBCOM_NIM7090),
DVB_USB_DEV(DIBCOM, DIBCOM_TFE7090PVR),
DVB_USB_DEV(TECHNISAT, TECHNISAT_AIRSTAR_TELESTICK_2),
DVB_USB_DEV(MEDION, MEDION_CREATIX_CTX1921),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV340E),
DVB_USB_DEV(PINNACLE, PINNACLE_PCTV340E_SE),
DVB_USB_DEV(DIBCOM, DIBCOM_TFE7790P),
DVB_USB_DEV(DIBCOM, DIBCOM_TFE8096P),
DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT_2),
DVB_USB_DEV(PCTV, PCTV_2002E),
DVB_USB_DEV(PCTV, PCTV_2002E_SE),
DVB_USB_DEV(PCTV, PCTV_DIBCOM_STK8096PVR),
DVB_USB_DEV(DIBCOM, DIBCOM_STK8096PVR),
DVB_USB_DEV(HAMA, HAMA_DVBT_HYBRID),
DVB_USB_DEV(MICROSOFT, MICROSOFT_XBOX_ONE_TUNER),
{ }
};
MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
.caps = DVB_USB_IS_AN_I2C_ADAPTER, \
.usb_ctrl = DEVICE_SPECIFIC, \
.firmware = "dvb-usb-dib0700-1.20.fw", \
.download_firmware = dib0700_download_firmware, \
.no_reconnect = 1, \
.size_of_priv = sizeof(struct dib0700_state), \
.i2c_algo = &dib0700_i2c_algo, \
.identify_state = dib0700_identify_state
#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
.streaming_ctrl = dib0700_streaming_ctrl, \
.stream = { \
.type = USB_BULK, \
.count = 4, \
.endpoint = ep, \
.u = { \
.bulk = { \
.buffersize = 39480, \
} \
} \
}
#define DIB0700_NUM_FRONTENDS(n) \
.num_frontends = n, \
.size_of_priv = sizeof(struct dib0700_adapter_state)
struct dvb_usb_device_properties dib0700_devices[] = {
{
DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk7700p_pid_filter,
.pid_filter_ctrl = stk7700p_pid_filter_ctrl,
.frontend_attach = stk7700p_frontend_attach,
.tuner_attach = stk7700p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 8,
.devices = {
{ "DiBcom STK7700P reference design",
{ &dib0700_usb_id_table[DIBCOM_STK7700P], &dib0700_usb_id_table[DIBCOM_STK7700P_PC] },
{ NULL },
},
{ "Hauppauge Nova-T Stick",
{ &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK], &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK_2], NULL },
{ NULL },
},
{ "AVerMedia AVerTV DVB-T Volar",
{ &dib0700_usb_id_table[AVERMEDIA_VOLAR], &dib0700_usb_id_table[AVERMEDIA_VOLAR_2] },
{ NULL },
},
{ "Compro Videomate U500",
{ &dib0700_usb_id_table[COMPRO_VIDEOMATE_U500], &dib0700_usb_id_table[COMPRO_VIDEOMATE_U500_PC] },
{ NULL },
},
{ "Uniwill STK7700P based (Hama and others)",
{ &dib0700_usb_id_table[UNIWILL_STK7700P], NULL },
{ NULL },
},
{ "Leadtek Winfast DTV Dongle (STK7700P based)",
{ &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_STK7700P], &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2] },
{ NULL },
},
{ "AVerMedia AVerTV DVB-T Express",
{ &dib0700_usb_id_table[AVERMEDIA_EXPRESS] },
{ NULL },
},
{ "Gigabyte U7000",
{ &dib0700_usb_id_table[GIGABYTE_U7000], NULL },
{ NULL },
}
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.frontend_attach = bristol_frontend_attach,
.tuner_attach = bristol_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
}, {
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.frontend_attach = bristol_frontend_attach,
.tuner_attach = bristol_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
}},
}
},
.num_device_descs = 1,
.devices = {
{ "Hauppauge Nova-T 500 Dual DVB-T",
{ &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500], &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500_2], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7700d_frontend_attach,
.tuner_attach = stk7700d_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
}, {
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7700d_frontend_attach,
.tuner_attach = stk7700d_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
}},
}
},
.num_device_descs = 5,
.devices = {
{ "Pinnacle PCTV 2000e",
{ &dib0700_usb_id_table[PINNACLE_PCTV2000E], NULL },
{ NULL },
},
{ "Terratec Cinergy DT XS Diversity",
{ &dib0700_usb_id_table[TERRATEC_CINERGY_DT_XS_DIVERSITY], NULL },
{ NULL },
},
{ "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
{ &dib0700_usb_id_table[HAUPPAUGE_NOVA_TD_STICK], NULL },
{ NULL },
},
{ "DiBcom STK7700D reference design",
{ &dib0700_usb_id_table[DIBCOM_STK7700D], NULL },
{ NULL },
},
{ "YUAN High-Tech DiBcom STK7700D",
{ &dib0700_usb_id_table[YUAN_STK7700D_2], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7700P2_frontend_attach,
.tuner_attach = stk7700d_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 3,
.devices = {
{ "ASUS My Cinema U3000 Mini DVBT Tuner",
{ &dib0700_usb_id_table[ASUS_U3000], NULL },
{ NULL },
},
{ "Yuan EC372S",
{ &dib0700_usb_id_table[YUAN_EC372S], NULL },
{ NULL },
},
{ "Terratec Cinergy T Express",
{ &dib0700_usb_id_table[TERRATEC_CINERGY_T_EXPRESS], NULL },
{ NULL },
}
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7070p_frontend_attach,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 12,
.devices = {
{ "DiBcom STK7070P reference design",
{ &dib0700_usb_id_table[DIBCOM_STK7070P], NULL },
{ NULL },
},
{ "Pinnacle PCTV DVB-T Flash Stick",
{ &dib0700_usb_id_table[PINNACLE_PCTV_DVB_T_FLASH], NULL },
{ NULL },
},
{ "Artec T14BR DVB-T",
{ &dib0700_usb_id_table[ULTIMA_ARTEC_T14BR], NULL },
{ NULL },
},
{ "ASUS My Cinema U3100 Mini DVBT Tuner",
{ &dib0700_usb_id_table[ASUS_U3100], NULL },
{ NULL },
},
{ "Hauppauge Nova-T Stick",
{ &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK_3], NULL },
{ NULL },
},
{ "Hauppauge Nova-T MyTV.t",
{ &dib0700_usb_id_table[HAUPPAUGE_MYTV_T], NULL },
{ NULL },
},
{ "Pinnacle PCTV 72e",
{ &dib0700_usb_id_table[PINNACLE_PCTV72E], NULL },
{ NULL },
},
{ "Pinnacle PCTV 73e",
{ &dib0700_usb_id_table[PINNACLE_PCTV73E], NULL },
{ NULL },
},
{ "Elgato EyeTV DTT",
{ &dib0700_usb_id_table[ELGATO_EYETV_DTT], NULL },
{ NULL },
},
{ "Yuan PD378S",
{ &dib0700_usb_id_table[YUAN_PD378S], NULL },
{ NULL },
},
{ "Elgato EyeTV Dtt Dlx PD378S",
{ &dib0700_usb_id_table[ELGATO_EYETV_DTT_Dlx], NULL },
{ NULL },
},
{ "Elgato EyeTV DTT rev. 2",
{ &dib0700_usb_id_table[ELGATO_EYETV_DTT_2], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7070p_frontend_attach,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 3,
.devices = {
{ "Pinnacle PCTV 73A",
{ &dib0700_usb_id_table[PINNACLE_PCTV73A], NULL },
{ NULL },
},
{ "Pinnacle PCTV 73e SE",
{ &dib0700_usb_id_table[PCTV_PINNACLE_PCTV73ESE], &dib0700_usb_id_table[PINNACLE_PCTV73ESE], NULL },
{ NULL },
},
{ "Pinnacle PCTV 282e",
{ &dib0700_usb_id_table[PCTV_PINNACLE_PCTV282E], &dib0700_usb_id_table[PINNACLE_PCTV282E], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = novatd_frontend_attach,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
}, {
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = novatd_frontend_attach,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
}},
}
},
.num_device_descs = 3,
.devices = {
{ "Hauppauge Nova-TD Stick (52009)",
{ &dib0700_usb_id_table[HAUPPAUGE_NOVA_TD_STICK_52009], NULL },
{ NULL },
},
{ "PCTV 2002e",
{ &dib0700_usb_id_table[PCTV_2002E], NULL },
{ NULL },
},
{ "PCTV 2002e SE",
{ &dib0700_usb_id_table[PCTV_2002E_SE], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7070pd_frontend_attach0,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
}, {
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7070pd_frontend_attach1,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
}},
}
},
.num_device_descs = 5,
.devices = {
{ "DiBcom STK7070PD reference design",
{ &dib0700_usb_id_table[DIBCOM_STK7070PD], NULL },
{ NULL },
},
{ "Pinnacle PCTV Dual DVB-T Diversity Stick",
{ &dib0700_usb_id_table[PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T], NULL },
{ NULL },
},
{ "Hauppauge Nova-TD-500 (84xxx)",
{ &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500_3], NULL },
{ NULL },
},
{ "Terratec Cinergy DT USB XS Diversity/ T5",
{ &dib0700_usb_id_table[TERRATEC_CINERGY_DT_XS_DIVERSITY_2],
&dib0700_usb_id_table[TERRATEC_T5], NULL},
{ NULL },
},
{ "Sony PlayTV",
{ &dib0700_usb_id_table[SONY_PLAYTV], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7070pd_frontend_attach0,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
}, {
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7070pd_frontend_attach1,
.tuner_attach = dib7070p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
}},
}
},
.num_device_descs = 1,
.devices = {
{ "Elgato EyeTV Diversity",
{ &dib0700_usb_id_table[ELGATO_EYETV_DIVERSITY], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_NEC_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7700ph_frontend_attach,
.tuner_attach = stk7700ph_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 10,
.devices = {
{ "Terratec Cinergy HT USB XE",
{ &dib0700_usb_id_table[TERRATEC_CINERGY_HT_USB_XE], NULL },
{ NULL },
},
{ "Pinnacle Expresscard 320cx",
{ &dib0700_usb_id_table[PINNACLE_EXPRESSCARD_320CX], NULL },
{ NULL },
},
{ "Terratec Cinergy HT Express",
{ &dib0700_usb_id_table[TERRATEC_CINERGY_HT_EXPRESS], NULL },
{ NULL },
},
{ "Gigabyte U8000-RH",
{ &dib0700_usb_id_table[GIGABYTE_U8000], NULL },
{ NULL },
},
{ "YUAN High-Tech STK7700PH",
{ &dib0700_usb_id_table[YUAN_STK7700PH], NULL },
{ NULL },
},
{ "Asus My Cinema-U3000Hybrid",
{ &dib0700_usb_id_table[ASUS_U3000H], NULL },
{ NULL },
},
{ "YUAN High-Tech MC770",
{ &dib0700_usb_id_table[YUAN_MC770], NULL },
{ NULL },
},
{ "Leadtek WinFast DTV Dongle H",
{ &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_H], NULL },
{ NULL },
},
{ "YUAN High-Tech STK7700D",
{ &dib0700_usb_id_table[YUAN_STK7700D], NULL },
{ NULL },
},
{ "Hama DVB=T Hybrid USB Stick",
{ &dib0700_usb_id_table[HAMA_DVBT_HYBRID], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.frontend_attach = s5h1411_frontend_attach,
.tuner_attach = xc5000_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 2,
.devices = {
{ "Pinnacle PCTV HD Pro USB Stick",
{ &dib0700_usb_id_table[PINNACLE_PCTV801E], NULL },
{ NULL },
},
{ "Pinnacle PCTV HD USB Stick",
{ &dib0700_usb_id_table[PINNACLE_PCTV801E_SE], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.frontend_attach = lgdt3305_frontend_attach,
.tuner_attach = mxl5007t_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 2,
.devices = {
{ "Hauppauge ATSC MiniCard (B200)",
{ &dib0700_usb_id_table[HAUPPAUGE_TIGER_ATSC], NULL },
{ NULL },
},
{ "Hauppauge ATSC MiniCard (B210)",
{ &dib0700_usb_id_table[HAUPPAUGE_TIGER_ATSC_B210], NULL },
{ NULL },
},
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = stk7770p_frontend_attach,
.tuner_attach = dib7770p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 4,
.devices = {
{ "DiBcom STK7770P reference design",
{ &dib0700_usb_id_table[DIBCOM_STK7770P], NULL },
{ NULL },
},
{ "Terratec Cinergy T USB XXS (HD)/ T3",
{ &dib0700_usb_id_table[TERRATEC_CINERGY_T_XXS],
&dib0700_usb_id_table[TERRATEC_T3],
&dib0700_usb_id_table[TERRATEC_CINERGY_T_XXS_2], NULL},
{ NULL },
},
{ "TechniSat AirStar TeleStick 2",
{ &dib0700_usb_id_table[TECHNISAT_AIRSTAR_TELESTICK_2], NULL },
{ NULL },
},
{ "Medion CTX1921 DVB-T USB",
{ &dib0700_usb_id_table[MEDION_CREATIX_CTX1921], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = stk807x_frontend_attach,
.tuner_attach = dib807x_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 3,
.devices = {
{ "DiBcom STK807xP reference design",
{ &dib0700_usb_id_table[DIBCOM_STK807XP], NULL },
{ NULL },
},
{ "Prolink Pixelview SBTVD",
{ &dib0700_usb_id_table[PIXELVIEW_SBTVD], NULL },
{ NULL },
},
{ "EvolutePC TVWay+",
{ &dib0700_usb_id_table[EVOLUTEPC_TVWAY_PLUS], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_NEC_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = stk807xpvr_frontend_attach0,
.tuner_attach = dib807x_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = stk807xpvr_frontend_attach1,
.tuner_attach = dib807x_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
}},
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom STK807xPVR reference design",
{ &dib0700_usb_id_table[DIBCOM_STK807XPVR], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = stk809x_frontend_attach,
.tuner_attach = dib809x_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom STK8096GP reference design",
{ &dib0700_usb_id_table[DIBCOM_STK8096GP], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = dib90x0_pid_filter,
.pid_filter_ctrl = dib90x0_pid_filter_ctrl,
.frontend_attach = stk9090m_frontend_attach,
.tuner_attach = dib9090_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom STK9090M reference design",
{ &dib0700_usb_id_table[DIBCOM_NIM9090M], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = nim8096md_frontend_attach,
.tuner_attach = nim8096md_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom NIM8096MD reference design",
{ &dib0700_usb_id_table[DIBCOM_NIM8096MD], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = dib90x0_pid_filter,
.pid_filter_ctrl = dib90x0_pid_filter_ctrl,
.frontend_attach = nim9090md_frontend_attach,
.tuner_attach = nim9090md_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom NIM9090MD reference design",
{ &dib0700_usb_id_table[DIBCOM_NIM9090MD], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = nim7090_frontend_attach,
.tuner_attach = nim7090_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom NIM7090 reference design",
{ &dib0700_usb_id_table[DIBCOM_NIM7090], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = tfe7090pvr_frontend0_attach,
.tuner_attach = tfe7090pvr_tuner0_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
}},
},
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = tfe7090pvr_frontend1_attach,
.tuner_attach = tfe7090pvr_tuner1_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom TFE7090PVR reference design",
{ &dib0700_usb_id_table[DIBCOM_TFE7090PVR], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.frontend_attach = pctv340e_frontend_attach,
.tuner_attach = xc4000_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
}},
},
},
.num_device_descs = 2,
.devices = {
{ "Pinnacle PCTV 340e HD Pro USB Stick",
{ &dib0700_usb_id_table[PINNACLE_PCTV340E], NULL },
{ NULL },
},
{ "Pinnacle PCTV Hybrid Stick Solo",
{ &dib0700_usb_id_table[PINNACLE_PCTV340E_SE], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk70x0p_pid_filter,
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
.frontend_attach = tfe7790p_frontend_attach,
.tuner_attach = tfe7790p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
} },
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom TFE7790P reference design",
{ &dib0700_usb_id_table[DIBCOM_TFE7790P], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = tfe8096p_frontend_attach,
.tuner_attach = tfe8096p_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
} },
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom TFE8096P reference design",
{ &dib0700_usb_id_table[DIBCOM_TFE8096P], NULL },
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 2,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = stk809x_frontend_attach,
.tuner_attach = dib809x_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
} },
.size_of_priv =
sizeof(struct dib0700_adapter_state),
}, {
.num_frontends = 1,
.fe = { {
.caps = DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.pid_filter = stk80xx_pid_filter,
.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
.frontend_attach = stk809x_frontend1_attach,
.tuner_attach = dib809x_tuner_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
} },
.size_of_priv =
sizeof(struct dib0700_adapter_state),
},
},
.num_device_descs = 1,
.devices = {
{ "DiBcom STK8096-PVR reference design",
{ &dib0700_usb_id_table[PCTV_DIBCOM_STK8096PVR],
&dib0700_usb_id_table[DIBCOM_STK8096PVR], NULL},
{ NULL },
},
},
.rc.core = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
.module_name = "dib0700",
.rc_query = dib0700_rc_query_old_firmware,
.allowed_protos = RC_PROTO_BIT_RC5 |
RC_PROTO_BIT_RC6_MCE |
RC_PROTO_BIT_NEC,
.change_protocol = dib0700_change_protocol,
},
}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
.num_adapters = 1,
.adapter = {
{
DIB0700_NUM_FRONTENDS(1),
.fe = {{
.frontend_attach = xbox_one_attach,
DIB0700_DEFAULT_STREAMING_CONFIG(0x82),
} },
},
},
.num_device_descs = 1,
.devices = {
{ "Microsoft Xbox One Digital TV Tuner",
{ &dib0700_usb_id_table[MICROSOFT_XBOX_ONE_TUNER], NULL },
{ NULL },
},
},
},
};
int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
| linux-master | drivers/media/usb/dvb-usb/dib0700_devices.c |
// SPDX-License-Identifier: GPL-2.0-only
/* Common methods for dibusb-based-receivers.
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dibusb.h"
/* Max transfer size done by I2C transfer functions */
#define MAX_XFER_SIZE 64
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info (|-able))." DVB_USB_DEBUG_STATUS);
MODULE_LICENSE("GPL");
#define deb_info(args...) dprintk(debug,0x01,args)
/* common stuff used by the different dibusb modules */
int dibusb_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
if (adap->priv != NULL) {
struct dibusb_state *st = adap->priv;
if (st->ops.fifo_ctrl != NULL)
if (st->ops.fifo_ctrl(adap->fe_adap[0].fe, onoff)) {
err("error while controlling the fifo of the demod.");
return -ENODEV;
}
}
return 0;
}
EXPORT_SYMBOL(dibusb_streaming_ctrl);
int dibusb_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid, int onoff)
{
if (adap->priv != NULL) {
struct dibusb_state *st = adap->priv;
if (st->ops.pid_ctrl != NULL)
st->ops.pid_ctrl(adap->fe_adap[0].fe,
index, pid, onoff);
}
return 0;
}
EXPORT_SYMBOL(dibusb_pid_filter);
int dibusb_pid_filter_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
if (adap->priv != NULL) {
struct dibusb_state *st = adap->priv;
if (st->ops.pid_parse != NULL)
if (st->ops.pid_parse(adap->fe_adap[0].fe, onoff) < 0)
err("could not handle pid_parser");
}
return 0;
}
EXPORT_SYMBOL(dibusb_pid_filter_ctrl);
int dibusb_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 *b;
int ret;
b = kmalloc(3, GFP_KERNEL);
if (!b)
return -ENOMEM;
b[0] = DIBUSB_REQ_SET_IOCTL;
b[1] = DIBUSB_IOCTL_CMD_POWER_MODE;
b[2] = onoff ? DIBUSB_IOCTL_POWER_WAKEUP : DIBUSB_IOCTL_POWER_SLEEP;
ret = dvb_usb_generic_write(d, b, 3);
kfree(b);
msleep(10);
return ret;
}
EXPORT_SYMBOL(dibusb_power_ctrl);
int dibusb2_0_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
int ret;
u8 *b;
b = kmalloc(3, GFP_KERNEL);
if (!b)
return -ENOMEM;
if ((ret = dibusb_streaming_ctrl(adap,onoff)) < 0)
goto ret;
if (onoff) {
b[0] = DIBUSB_REQ_SET_STREAMING_MODE;
b[1] = 0x00;
ret = dvb_usb_generic_write(adap->dev, b, 2);
if (ret < 0)
goto ret;
}
b[0] = DIBUSB_REQ_SET_IOCTL;
b[1] = onoff ? DIBUSB_IOCTL_CMD_ENABLE_STREAM : DIBUSB_IOCTL_CMD_DISABLE_STREAM;
ret = dvb_usb_generic_write(adap->dev, b, 3);
ret:
kfree(b);
return ret;
}
EXPORT_SYMBOL(dibusb2_0_streaming_ctrl);
int dibusb2_0_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 *b;
int ret;
if (!onoff)
return 0;
b = kmalloc(3, GFP_KERNEL);
if (!b)
return -ENOMEM;
b[0] = DIBUSB_REQ_SET_IOCTL;
b[1] = DIBUSB_IOCTL_CMD_POWER_MODE;
b[2] = DIBUSB_IOCTL_POWER_WAKEUP;
ret = dvb_usb_generic_write(d, b, 3);
kfree(b);
return ret;
}
EXPORT_SYMBOL(dibusb2_0_power_ctrl);
static int dibusb_i2c_msg(struct dvb_usb_device *d, u8 addr,
u8 *wbuf, u16 wlen, u8 *rbuf, u16 rlen)
{
u8 *sndbuf;
int ret, wo, len;
/* write only ? */
wo = (rbuf == NULL || rlen == 0);
len = 2 + wlen + (wo ? 0 : 2);
sndbuf = kmalloc(MAX_XFER_SIZE, GFP_KERNEL);
if (!sndbuf)
return -ENOMEM;
if (4 + wlen > MAX_XFER_SIZE) {
warn("i2c wr: len=%d is too big!\n", wlen);
ret = -EOPNOTSUPP;
goto ret;
}
sndbuf[0] = wo ? DIBUSB_REQ_I2C_WRITE : DIBUSB_REQ_I2C_READ;
sndbuf[1] = (addr << 1) | (wo ? 0 : 1);
memcpy(&sndbuf[2], wbuf, wlen);
if (!wo) {
sndbuf[wlen + 2] = (rlen >> 8) & 0xff;
sndbuf[wlen + 3] = rlen & 0xff;
}
ret = dvb_usb_generic_rw(d, sndbuf, len, rbuf, rlen, 0);
ret:
kfree(sndbuf);
return ret;
}
/*
* I2C master xfer function
*/
static int dibusb_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
int i;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EAGAIN;
for (i = 0; i < num; i++) {
/* write/read request */
if (i+1 < num && (msg[i].flags & I2C_M_RD) == 0
&& (msg[i+1].flags & I2C_M_RD)) {
if (dibusb_i2c_msg(d, msg[i].addr, msg[i].buf,msg[i].len,
msg[i+1].buf,msg[i+1].len) < 0)
break;
i++;
} else if ((msg[i].flags & I2C_M_RD) == 0) {
if (dibusb_i2c_msg(d, msg[i].addr, msg[i].buf,msg[i].len,NULL,0) < 0)
break;
} else if (msg[i].addr != 0x50) {
/* 0x50 is the address of the eeprom - we need to protect it
* from dibusb's bad i2c implementation: reads without
* writing the offset before are forbidden */
if (dibusb_i2c_msg(d, msg[i].addr, NULL, 0, msg[i].buf, msg[i].len) < 0)
break;
}
}
mutex_unlock(&d->i2c_mutex);
return i;
}
static u32 dibusb_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
struct i2c_algorithm dibusb_i2c_algo = {
.master_xfer = dibusb_i2c_xfer,
.functionality = dibusb_i2c_func,
};
EXPORT_SYMBOL(dibusb_i2c_algo);
int dibusb_read_eeprom_byte(struct dvb_usb_device *d, u8 offs, u8 *val)
{
u8 *buf;
int rc;
buf = kzalloc(2, GFP_KERNEL);
if (!buf)
return -ENOMEM;
buf[0] = offs;
rc = dibusb_i2c_msg(d, 0x50, &buf[0], 1, &buf[1], 1);
*val = buf[1];
kfree(buf);
return rc;
}
EXPORT_SYMBOL(dibusb_read_eeprom_byte);
/*
* common remote control stuff
*/
struct rc_map_table rc_map_dibusb_table[] = {
/* Key codes for the little Artec T1/Twinhan/HAMA/ remote. */
{ 0x0016, KEY_POWER },
{ 0x0010, KEY_MUTE },
{ 0x0003, KEY_1 },
{ 0x0001, KEY_2 },
{ 0x0006, KEY_3 },
{ 0x0009, KEY_4 },
{ 0x001d, KEY_5 },
{ 0x001f, KEY_6 },
{ 0x000d, KEY_7 },
{ 0x0019, KEY_8 },
{ 0x001b, KEY_9 },
{ 0x0015, KEY_0 },
{ 0x0005, KEY_CHANNELUP },
{ 0x0002, KEY_CHANNELDOWN },
{ 0x001e, KEY_VOLUMEUP },
{ 0x000a, KEY_VOLUMEDOWN },
{ 0x0011, KEY_RECORD },
{ 0x0017, KEY_FAVORITES }, /* Heart symbol - Channel list. */
{ 0x0014, KEY_PLAY },
{ 0x001a, KEY_STOP },
{ 0x0040, KEY_REWIND },
{ 0x0012, KEY_FASTFORWARD },
{ 0x000e, KEY_PREVIOUS }, /* Recall - Previous channel. */
{ 0x004c, KEY_PAUSE },
{ 0x004d, KEY_SCREEN }, /* Full screen mode. */
{ 0x0054, KEY_AUDIO }, /* MTS - Switch to secondary audio. */
/* additional keys TwinHan VisionPlus, the Artec seemingly not have */
{ 0x000c, KEY_CANCEL }, /* Cancel */
{ 0x001c, KEY_EPG }, /* EPG */
{ 0x0000, KEY_TAB }, /* Tab */
{ 0x0048, KEY_INFO }, /* Preview */
{ 0x0004, KEY_LIST }, /* RecordList */
{ 0x000f, KEY_TEXT }, /* Teletext */
/* Key codes for the KWorld/ADSTech/JetWay remote. */
{ 0x8612, KEY_POWER },
{ 0x860f, KEY_SELECT }, /* source */
{ 0x860c, KEY_UNKNOWN }, /* scan */
{ 0x860b, KEY_EPG },
{ 0x8610, KEY_MUTE },
{ 0x8601, KEY_1 },
{ 0x8602, KEY_2 },
{ 0x8603, KEY_3 },
{ 0x8604, KEY_4 },
{ 0x8605, KEY_5 },
{ 0x8606, KEY_6 },
{ 0x8607, KEY_7 },
{ 0x8608, KEY_8 },
{ 0x8609, KEY_9 },
{ 0x860a, KEY_0 },
{ 0x8618, KEY_ZOOM },
{ 0x861c, KEY_UNKNOWN }, /* preview */
{ 0x8613, KEY_UNKNOWN }, /* snap */
{ 0x8600, KEY_UNDO },
{ 0x861d, KEY_RECORD },
{ 0x860d, KEY_STOP },
{ 0x860e, KEY_PAUSE },
{ 0x8616, KEY_PLAY },
{ 0x8611, KEY_BACK },
{ 0x8619, KEY_FORWARD },
{ 0x8614, KEY_UNKNOWN }, /* pip */
{ 0x8615, KEY_ESC },
{ 0x861a, KEY_UP },
{ 0x861e, KEY_DOWN },
{ 0x861f, KEY_LEFT },
{ 0x861b, KEY_RIGHT },
/* Key codes for the DiBcom MOD3000 remote. */
{ 0x8000, KEY_MUTE },
{ 0x8001, KEY_TEXT },
{ 0x8002, KEY_HOME },
{ 0x8003, KEY_POWER },
{ 0x8004, KEY_RED },
{ 0x8005, KEY_GREEN },
{ 0x8006, KEY_YELLOW },
{ 0x8007, KEY_BLUE },
{ 0x8008, KEY_DVD },
{ 0x8009, KEY_AUDIO },
{ 0x800a, KEY_IMAGES }, /* Pictures */
{ 0x800b, KEY_VIDEO },
{ 0x800c, KEY_BACK },
{ 0x800d, KEY_UP },
{ 0x800e, KEY_RADIO },
{ 0x800f, KEY_EPG },
{ 0x8010, KEY_LEFT },
{ 0x8011, KEY_OK },
{ 0x8012, KEY_RIGHT },
{ 0x8013, KEY_UNKNOWN }, /* SAP */
{ 0x8014, KEY_TV },
{ 0x8015, KEY_DOWN },
{ 0x8016, KEY_MENU }, /* DVD Menu */
{ 0x8017, KEY_LAST },
{ 0x8018, KEY_RECORD },
{ 0x8019, KEY_STOP },
{ 0x801a, KEY_PAUSE },
{ 0x801b, KEY_PLAY },
{ 0x801c, KEY_PREVIOUS },
{ 0x801d, KEY_REWIND },
{ 0x801e, KEY_FASTFORWARD },
{ 0x801f, KEY_NEXT},
{ 0x8040, KEY_1 },
{ 0x8041, KEY_2 },
{ 0x8042, KEY_3 },
{ 0x8043, KEY_CHANNELUP },
{ 0x8044, KEY_4 },
{ 0x8045, KEY_5 },
{ 0x8046, KEY_6 },
{ 0x8047, KEY_CHANNELDOWN },
{ 0x8048, KEY_7 },
{ 0x8049, KEY_8 },
{ 0x804a, KEY_9 },
{ 0x804b, KEY_VOLUMEUP },
{ 0x804c, KEY_CLEAR },
{ 0x804d, KEY_0 },
{ 0x804e, KEY_ENTER },
{ 0x804f, KEY_VOLUMEDOWN },
};
EXPORT_SYMBOL(rc_map_dibusb_table);
int dibusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
{
u8 *buf;
int ret;
buf = kmalloc(5, GFP_KERNEL);
if (!buf)
return -ENOMEM;
buf[0] = DIBUSB_REQ_POLL_REMOTE;
ret = dvb_usb_generic_rw(d, buf, 1, buf, 5, 0);
if (ret < 0)
goto ret;
dvb_usb_nec_rc_key_to_event(d, buf, event, state);
if (buf[0] != 0)
deb_info("key: %*ph\n", 5, buf);
ret:
kfree(buf);
return ret;
}
EXPORT_SYMBOL(dibusb_rc_query);
| linux-master | drivers/media/usb/dvb-usb/dibusb-common.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant Linux driver for the
* - GENPIX 8pks/qpsk/DCII USB2.0 DVB-S module
*
* Copyright (C) 2006,2007 Alan Nisota ([email protected])
* Copyright (C) 2006,2007 Genpix Electronics ([email protected])
*
* Thanks to GENPIX for the sample code used to implement this module.
*
* This module is based off the vp7045 and vp702x modules
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "gp8psk.h"
#include "gp8psk-fe.h"
/* debug */
static char bcm4500_firmware[] = "dvb-usb-gp8psk-02.fw";
int dvb_usb_gp8psk_debug;
module_param_named(debug,dvb_usb_gp8psk_debug, int, 0644);
MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,rc=4 (or-able))." DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
struct gp8psk_state {
unsigned char data[80];
};
static int gp8psk_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value,
u16 index, u8 *b, int blen)
{
struct gp8psk_state *st = d->priv;
int ret = 0,try = 0;
if (blen > sizeof(st->data))
return -EIO;
if ((ret = mutex_lock_interruptible(&d->usb_mutex)))
return ret;
while (ret >= 0 && ret != blen && try < 3) {
ret = usb_control_msg(d->udev,
usb_rcvctrlpipe(d->udev,0),
req,
USB_TYPE_VENDOR | USB_DIR_IN,
value, index, st->data, blen,
2000);
deb_info("reading number %d (ret: %d)\n",try,ret);
try++;
}
if (ret < 0 || ret != blen) {
warn("usb in %d operation failed.", req);
ret = -EIO;
} else {
ret = 0;
memcpy(b, st->data, blen);
}
deb_xfer("in: req. %x, val: %x, ind: %x, buffer: ",req,value,index);
debug_dump(b,blen,deb_xfer);
mutex_unlock(&d->usb_mutex);
return ret;
}
static int gp8psk_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value,
u16 index, u8 *b, int blen)
{
struct gp8psk_state *st = d->priv;
int ret;
deb_xfer("out: req. %x, val: %x, ind: %x, buffer: ",req,value,index);
debug_dump(b,blen,deb_xfer);
if (blen > sizeof(st->data))
return -EIO;
if ((ret = mutex_lock_interruptible(&d->usb_mutex)))
return ret;
memcpy(st->data, b, blen);
if (usb_control_msg(d->udev,
usb_sndctrlpipe(d->udev,0),
req,
USB_TYPE_VENDOR | USB_DIR_OUT,
value, index, st->data, blen,
2000) != blen) {
warn("usb out operation failed.");
ret = -EIO;
} else
ret = 0;
mutex_unlock(&d->usb_mutex);
return ret;
}
static int gp8psk_get_fw_version(struct dvb_usb_device *d, u8 *fw_vers)
{
return gp8psk_usb_in_op(d, GET_FW_VERS, 0, 0, fw_vers, 6);
}
static int gp8psk_get_fpga_version(struct dvb_usb_device *d, u8 *fpga_vers)
{
return gp8psk_usb_in_op(d, GET_FPGA_VERS, 0, 0, fpga_vers, 1);
}
static void gp8psk_info(struct dvb_usb_device *d)
{
u8 fpga_vers, fw_vers[6];
if (!gp8psk_get_fw_version(d, fw_vers))
info("FW Version = %i.%02i.%i (0x%x) Build %4i/%02i/%02i",
fw_vers[2], fw_vers[1], fw_vers[0], GP8PSK_FW_VERS(fw_vers),
2000 + fw_vers[5], fw_vers[4], fw_vers[3]);
else
info("failed to get FW version");
if (!gp8psk_get_fpga_version(d, &fpga_vers))
info("FPGA Version = %i", fpga_vers);
else
info("failed to get FPGA version");
}
static int gp8psk_load_bcm4500fw(struct dvb_usb_device *d)
{
int ret;
const struct firmware *fw = NULL;
const u8 *ptr;
u8 *buf;
if ((ret = request_firmware(&fw, bcm4500_firmware,
&d->udev->dev)) != 0) {
err("did not find the bcm4500 firmware file '%s' (status %d). You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware",
bcm4500_firmware,ret);
return ret;
}
ret = -EINVAL;
if (gp8psk_usb_out_op(d, LOAD_BCM4500,1,0,NULL, 0))
goto out_rel_fw;
info("downloading bcm4500 firmware from file '%s'",bcm4500_firmware);
ptr = fw->data;
buf = kmalloc(64, GFP_KERNEL);
if (!buf) {
ret = -ENOMEM;
goto out_rel_fw;
}
while (ptr[0] != 0xff) {
u16 buflen = ptr[0] + 4;
if (ptr + buflen >= fw->data + fw->size) {
err("failed to load bcm4500 firmware.");
goto out_free;
}
if (buflen > 64) {
err("firmware chunk size bigger than 64 bytes.");
goto out_free;
}
memcpy(buf, ptr, buflen);
if (dvb_usb_generic_write(d, buf, buflen)) {
err("failed to load bcm4500 firmware.");
goto out_free;
}
ptr += buflen;
}
ret = 0;
out_free:
kfree(buf);
out_rel_fw:
release_firmware(fw);
return ret;
}
static int gp8psk_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 status = 0, buf;
int gp_product_id = le16_to_cpu(d->udev->descriptor.idProduct);
if (onoff) {
gp8psk_usb_in_op(d, GET_8PSK_CONFIG,0,0,&status,1);
if (! (status & bm8pskStarted)) { /* started */
if(gp_product_id == USB_PID_GENPIX_SKYWALKER_CW3K)
gp8psk_usb_out_op(d, CW3K_INIT, 1, 0, NULL, 0);
if (gp8psk_usb_in_op(d, BOOT_8PSK, 1, 0, &buf, 1))
return -EINVAL;
gp8psk_info(d);
}
if (gp_product_id == USB_PID_GENPIX_8PSK_REV_1_WARM)
if (! (status & bm8pskFW_Loaded)) /* BCM4500 firmware loaded */
if(gp8psk_load_bcm4500fw(d))
return -EINVAL;
if (! (status & bmIntersilOn)) /* LNB Power */
if (gp8psk_usb_in_op(d, START_INTERSIL, 1, 0,
&buf, 1))
return -EINVAL;
/* Set DVB mode to 1 */
if (gp_product_id == USB_PID_GENPIX_8PSK_REV_1_WARM)
if (gp8psk_usb_out_op(d, SET_DVB_MODE, 1, 0, NULL, 0))
return -EINVAL;
/* Abort possible TS (if previous tune crashed) */
if (gp8psk_usb_out_op(d, ARM_TRANSFER, 0, 0, NULL, 0))
return -EINVAL;
} else {
/* Turn off LNB power */
if (gp8psk_usb_in_op(d, START_INTERSIL, 0, 0, &buf, 1))
return -EINVAL;
/* Turn off 8psk power */
if (gp8psk_usb_in_op(d, BOOT_8PSK, 0, 0, &buf, 1))
return -EINVAL;
if(gp_product_id == USB_PID_GENPIX_SKYWALKER_CW3K)
gp8psk_usb_out_op(d, CW3K_INIT, 0, 0, NULL, 0);
}
return 0;
}
static int gp8psk_bcm4500_reload(struct dvb_usb_device *d)
{
u8 buf;
int gp_product_id = le16_to_cpu(d->udev->descriptor.idProduct);
deb_xfer("reloading firmware\n");
/* Turn off 8psk power */
if (gp8psk_usb_in_op(d, BOOT_8PSK, 0, 0, &buf, 1))
return -EINVAL;
/* Turn On 8psk power */
if (gp8psk_usb_in_op(d, BOOT_8PSK, 1, 0, &buf, 1))
return -EINVAL;
/* load BCM4500 firmware */
if (gp_product_id == USB_PID_GENPIX_8PSK_REV_1_WARM)
if (gp8psk_load_bcm4500fw(d))
return -EINVAL;
return 0;
}
static int gp8psk_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
return gp8psk_usb_out_op(adap->dev, ARM_TRANSFER, onoff, 0 , NULL, 0);
}
/* Callbacks for gp8psk-fe.c */
static int gp8psk_fe_in(void *priv, u8 req, u16 value,
u16 index, u8 *b, int blen)
{
struct dvb_usb_device *d = priv;
return gp8psk_usb_in_op(d, req, value, index, b, blen);
}
static int gp8psk_fe_out(void *priv, u8 req, u16 value,
u16 index, u8 *b, int blen)
{
struct dvb_usb_device *d = priv;
return gp8psk_usb_out_op(d, req, value, index, b, blen);
}
static int gp8psk_fe_reload(void *priv)
{
struct dvb_usb_device *d = priv;
return gp8psk_bcm4500_reload(d);
}
static const struct gp8psk_fe_ops gp8psk_fe_ops = {
.in = gp8psk_fe_in,
.out = gp8psk_fe_out,
.reload = gp8psk_fe_reload,
};
static int gp8psk_frontend_attach(struct dvb_usb_adapter *adap)
{
struct dvb_usb_device *d = adap->dev;
int id = le16_to_cpu(d->udev->descriptor.idProduct);
int is_rev1;
is_rev1 = (id == USB_PID_GENPIX_8PSK_REV_1_WARM) ? true : false;
adap->fe_adap[0].fe = dvb_attach(gp8psk_fe_attach,
&gp8psk_fe_ops, d, is_rev1);
return 0;
}
static struct dvb_usb_device_properties gp8psk_properties;
static int gp8psk_usb_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
int ret;
struct usb_device *udev = interface_to_usbdev(intf);
ret = dvb_usb_device_init(intf, &gp8psk_properties,
THIS_MODULE, NULL, adapter_nr);
if (ret == 0) {
info("found Genpix USB device pID = %x (hex)",
le16_to_cpu(udev->descriptor.idProduct));
}
return ret;
}
enum {
GENPIX_8PSK_REV_1_COLD,
GENPIX_8PSK_REV_1_WARM,
GENPIX_8PSK_REV_2,
GENPIX_SKYWALKER_1,
GENPIX_SKYWALKER_2,
GENPIX_SKYWALKER_CW3K,
};
static struct usb_device_id gp8psk_usb_table[] = {
DVB_USB_DEV(GENPIX, GENPIX_8PSK_REV_1_COLD),
DVB_USB_DEV(GENPIX, GENPIX_8PSK_REV_1_WARM),
DVB_USB_DEV(GENPIX, GENPIX_8PSK_REV_2),
DVB_USB_DEV(GENPIX, GENPIX_SKYWALKER_1),
DVB_USB_DEV(GENPIX, GENPIX_SKYWALKER_2),
DVB_USB_DEV(GENPIX, GENPIX_SKYWALKER_CW3K),
{ }
};
MODULE_DEVICE_TABLE(usb, gp8psk_usb_table);
static struct dvb_usb_device_properties gp8psk_properties = {
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-gp8psk-01.fw",
.size_of_priv = sizeof(struct gp8psk_state),
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.streaming_ctrl = gp8psk_streaming_ctrl,
.frontend_attach = gp8psk_frontend_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 7,
.endpoint = 0x82,
.u = {
.bulk = {
.buffersize = 8192,
}
}
},
}},
}
},
.power_ctrl = gp8psk_power_ctrl,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 4,
.devices = {
{ .name = "Genpix 8PSK-to-USB2 Rev.1 DVB-S receiver",
.cold_ids = { &gp8psk_usb_table[GENPIX_8PSK_REV_1_COLD], NULL },
.warm_ids = { &gp8psk_usb_table[GENPIX_8PSK_REV_1_WARM], NULL },
},
{ .name = "Genpix 8PSK-to-USB2 Rev.2 DVB-S receiver",
.cold_ids = { NULL },
.warm_ids = { &gp8psk_usb_table[GENPIX_8PSK_REV_2], NULL },
},
{ .name = "Genpix SkyWalker-1 DVB-S receiver",
.cold_ids = { NULL },
.warm_ids = { &gp8psk_usb_table[GENPIX_SKYWALKER_1], NULL },
},
{ .name = "Genpix SkyWalker-2 DVB-S receiver",
.cold_ids = { NULL },
.warm_ids = { &gp8psk_usb_table[GENPIX_SKYWALKER_2], NULL },
},
{ NULL },
}
};
/* usb specific object needed to register this driver with the usb subsystem */
static struct usb_driver gp8psk_usb_driver = {
.name = "dvb_usb_gp8psk",
.probe = gp8psk_usb_probe,
.disconnect = dvb_usb_device_exit,
.id_table = gp8psk_usb_table,
};
module_usb_driver(gp8psk_usb_driver);
MODULE_AUTHOR("Alan Nisota <[email protected]>");
MODULE_DESCRIPTION("Driver for Genpix DVB-S");
MODULE_VERSION("1.1");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/gp8psk.c |
// SPDX-License-Identifier: GPL-2.0
/* usb-urb.c is part of the DVB USB library.
*
* Copyright (C) 2004-6 Patrick Boettcher ([email protected])
* see dvb-usb-init.c for copyright information.
*
* This file keeps functions for initializing and handling the
* BULK and ISOC USB data transfers in a generic way.
* Can be used for DVB-only and also, that's the plan, for
* Hybrid USB devices (analog and DVB).
*/
#include "dvb-usb-common.h"
/* URB stuff for streaming */
static void usb_urb_complete(struct urb *urb)
{
struct usb_data_stream *stream = urb->context;
int ptype = usb_pipetype(urb->pipe);
int i;
u8 *b;
deb_uxfer("'%s' urb completed. status: %d, length: %d/%d, pack_num: %d, errors: %d\n",
ptype == PIPE_ISOCHRONOUS ? "isoc" : "bulk",
urb->status,urb->actual_length,urb->transfer_buffer_length,
urb->number_of_packets,urb->error_count);
switch (urb->status) {
case 0: /* success */
case -ETIMEDOUT: /* NAK */
break;
case -ECONNRESET: /* kill */
case -ENOENT:
case -ESHUTDOWN:
return;
default: /* error */
deb_ts("urb completion error %d.\n", urb->status);
break;
}
b = (u8 *) urb->transfer_buffer;
switch (ptype) {
case PIPE_ISOCHRONOUS:
for (i = 0; i < urb->number_of_packets; i++) {
if (urb->iso_frame_desc[i].status != 0)
deb_ts("iso frame descriptor has an error: %d\n",urb->iso_frame_desc[i].status);
else if (urb->iso_frame_desc[i].actual_length > 0)
stream->complete(stream, b + urb->iso_frame_desc[i].offset, urb->iso_frame_desc[i].actual_length);
urb->iso_frame_desc[i].status = 0;
urb->iso_frame_desc[i].actual_length = 0;
}
debug_dump(b,20,deb_uxfer);
break;
case PIPE_BULK:
if (urb->actual_length > 0)
stream->complete(stream, b, urb->actual_length);
break;
default:
err("unknown endpoint type in completion handler.");
return;
}
usb_submit_urb(urb,GFP_ATOMIC);
}
int usb_urb_kill(struct usb_data_stream *stream)
{
int i;
for (i = 0; i < stream->urbs_submitted; i++) {
deb_ts("killing URB no. %d.\n",i);
/* stop the URB */
usb_kill_urb(stream->urb_list[i]);
}
stream->urbs_submitted = 0;
return 0;
}
int usb_urb_submit(struct usb_data_stream *stream)
{
int i,ret;
for (i = 0; i < stream->urbs_initialized; i++) {
deb_ts("submitting URB no. %d\n",i);
if ((ret = usb_submit_urb(stream->urb_list[i],GFP_ATOMIC))) {
err("could not submit URB no. %d - get them all back",i);
usb_urb_kill(stream);
return ret;
}
stream->urbs_submitted++;
}
return 0;
}
static int usb_free_stream_buffers(struct usb_data_stream *stream)
{
if (stream->state & USB_STATE_URB_BUF) {
while (stream->buf_num) {
stream->buf_num--;
deb_mem("freeing buffer %d\n",stream->buf_num);
usb_free_coherent(stream->udev, stream->buf_size,
stream->buf_list[stream->buf_num],
stream->dma_addr[stream->buf_num]);
}
}
stream->state &= ~USB_STATE_URB_BUF;
return 0;
}
static int usb_allocate_stream_buffers(struct usb_data_stream *stream, int num, unsigned long size)
{
stream->buf_num = 0;
stream->buf_size = size;
deb_mem("all in all I will use %lu bytes for streaming\n",num*size);
for (stream->buf_num = 0; stream->buf_num < num; stream->buf_num++) {
deb_mem("allocating buffer %d\n",stream->buf_num);
if (( stream->buf_list[stream->buf_num] =
usb_alloc_coherent(stream->udev, size, GFP_KERNEL,
&stream->dma_addr[stream->buf_num]) ) == NULL) {
deb_mem("not enough memory for urb-buffer allocation.\n");
usb_free_stream_buffers(stream);
return -ENOMEM;
}
deb_mem("buffer %d: %p (dma: %Lu)\n",
stream->buf_num,
stream->buf_list[stream->buf_num], (long long)stream->dma_addr[stream->buf_num]);
memset(stream->buf_list[stream->buf_num],0,size);
stream->state |= USB_STATE_URB_BUF;
}
deb_mem("allocation successful\n");
return 0;
}
static int usb_bulk_urb_init(struct usb_data_stream *stream)
{
int i, j;
if ((i = usb_allocate_stream_buffers(stream,stream->props.count,
stream->props.u.bulk.buffersize)) < 0)
return i;
/* allocate the URBs */
for (i = 0; i < stream->props.count; i++) {
stream->urb_list[i] = usb_alloc_urb(0, GFP_KERNEL);
if (!stream->urb_list[i]) {
deb_mem("not enough memory for urb_alloc_urb!.\n");
for (j = 0; j < i; j++)
usb_free_urb(stream->urb_list[j]);
return -ENOMEM;
}
usb_fill_bulk_urb( stream->urb_list[i], stream->udev,
usb_rcvbulkpipe(stream->udev,stream->props.endpoint),
stream->buf_list[i],
stream->props.u.bulk.buffersize,
usb_urb_complete, stream);
stream->urb_list[i]->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
stream->urb_list[i]->transfer_dma = stream->dma_addr[i];
stream->urbs_initialized++;
}
return 0;
}
static int usb_isoc_urb_init(struct usb_data_stream *stream)
{
int i,j;
if ((i = usb_allocate_stream_buffers(stream,stream->props.count,
stream->props.u.isoc.framesize*stream->props.u.isoc.framesperurb)) < 0)
return i;
/* allocate the URBs */
for (i = 0; i < stream->props.count; i++) {
struct urb *urb;
int frame_offset = 0;
stream->urb_list[i] = usb_alloc_urb(stream->props.u.isoc.framesperurb, GFP_KERNEL);
if (!stream->urb_list[i]) {
deb_mem("not enough memory for urb_alloc_urb!\n");
for (j = 0; j < i; j++)
usb_free_urb(stream->urb_list[j]);
return -ENOMEM;
}
urb = stream->urb_list[i];
urb->dev = stream->udev;
urb->context = stream;
urb->complete = usb_urb_complete;
urb->pipe = usb_rcvisocpipe(stream->udev,stream->props.endpoint);
urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
urb->interval = stream->props.u.isoc.interval;
urb->number_of_packets = stream->props.u.isoc.framesperurb;
urb->transfer_buffer_length = stream->buf_size;
urb->transfer_buffer = stream->buf_list[i];
urb->transfer_dma = stream->dma_addr[i];
for (j = 0; j < stream->props.u.isoc.framesperurb; j++) {
urb->iso_frame_desc[j].offset = frame_offset;
urb->iso_frame_desc[j].length = stream->props.u.isoc.framesize;
frame_offset += stream->props.u.isoc.framesize;
}
stream->urbs_initialized++;
}
return 0;
}
int usb_urb_init(struct usb_data_stream *stream, struct usb_data_stream_properties *props)
{
if (stream == NULL || props == NULL)
return -EINVAL;
memcpy(&stream->props, props, sizeof(*props));
usb_clear_halt(stream->udev,usb_rcvbulkpipe(stream->udev,stream->props.endpoint));
if (stream->complete == NULL) {
err("there is no data callback - this doesn't make sense.");
return -EINVAL;
}
switch (stream->props.type) {
case USB_BULK:
return usb_bulk_urb_init(stream);
case USB_ISOC:
return usb_isoc_urb_init(stream);
default:
err("unknown URB-type for data transfer.");
return -EINVAL;
}
}
int usb_urb_exit(struct usb_data_stream *stream)
{
int i;
usb_urb_kill(stream);
for (i = 0; i < stream->urbs_initialized; i++) {
if (stream->urb_list[i] != NULL) {
deb_mem("freeing URB no. %d.\n",i);
/* free the URBs */
usb_free_urb(stream->urb_list[i]);
}
}
stream->urbs_initialized = 0;
usb_free_stream_buffers(stream);
return 0;
}
| linux-master | drivers/media/usb/dvb-usb/usb-urb.c |
// SPDX-License-Identifier: GPL-2.0
/* dvb-usb-i2c.c is part of the DVB USB library.
*
* Copyright (C) 2004-6 Patrick Boettcher ([email protected])
* see dvb-usb-init.c for copyright information.
*
* This file contains functions for (de-)initializing an I2C adapter.
*/
#include "dvb-usb-common.h"
int dvb_usb_i2c_init(struct dvb_usb_device *d)
{
int ret = 0;
if (!(d->props.caps & DVB_USB_IS_AN_I2C_ADAPTER))
return 0;
if (d->props.i2c_algo == NULL) {
err("no i2c algorithm specified");
ret = -EINVAL;
goto err;
}
strscpy(d->i2c_adap.name, d->desc->name, sizeof(d->i2c_adap.name));
d->i2c_adap.algo = d->props.i2c_algo;
d->i2c_adap.algo_data = NULL;
d->i2c_adap.dev.parent = &d->udev->dev;
i2c_set_adapdata(&d->i2c_adap, d);
ret = i2c_add_adapter(&d->i2c_adap);
if (ret < 0) {
err("could not add i2c adapter");
goto err;
}
d->state |= DVB_USB_STATE_I2C;
err:
return ret;
}
int dvb_usb_i2c_exit(struct dvb_usb_device *d)
{
if (d->state & DVB_USB_STATE_I2C)
i2c_del_adapter(&d->i2c_adap);
d->state &= ~DVB_USB_STATE_I2C;
return 0;
}
| linux-master | drivers/media/usb/dvb-usb/dvb-usb-i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB compliant linux driver for mobile DVB-T USB devices based on
* reference designs made by DiBcom (http://www.dibcom.fr/) (DiB3000M-C/P)
*
* Copyright (C) 2004-5 Patrick Boettcher ([email protected])
*
* based on GPL code from DiBcom, which has
* Copyright (C) 2004 Amaury Demol for DiBcom
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "dibusb.h"
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
/* USB Driver stuff */
static struct dvb_usb_device_properties dibusb_mc_properties;
static int dibusb_mc_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
return dvb_usb_device_init(intf, &dibusb_mc_properties, THIS_MODULE,
NULL, adapter_nr);
}
/* do not change the order of the ID table */
enum {
DIBCOM_MOD3001_COLD,
DIBCOM_MOD3001_WARM,
ULTIMA_TVBOX_USB2_COLD,
ULTIMA_TVBOX_USB2_WARM,
LITEON_DVB_T_COLD,
LITEON_DVB_T_WARM,
EMPIA_DIGIVOX_MINI_SL_COLD,
EMPIA_DIGIVOX_MINI_SL_WARM,
GRANDTEC_DVBT_USB2_COLD,
GRANDTEC_DVBT_USB2_WARM,
ULTIMA_ARTEC_T14_COLD,
ULTIMA_ARTEC_T14_WARM,
LEADTEK_WINFAST_DTV_DONGLE_COLD,
LEADTEK_WINFAST_DTV_DONGLE_WARM,
HUMAX_DVB_T_STICK_HIGH_SPEED_COLD,
HUMAX_DVB_T_STICK_HIGH_SPEED_WARM,
};
static struct usb_device_id dibusb_dib3000mc_table[] = {
DVB_USB_DEV(DIBCOM, DIBCOM_MOD3001_COLD),
DVB_USB_DEV(DIBCOM, DIBCOM_MOD3001_WARM),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_USB2_COLD),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_TVBOX_USB2_WARM),
DVB_USB_DEV(LITEON, LITEON_DVB_T_COLD),
DVB_USB_DEV(LITEON, LITEON_DVB_T_WARM),
DVB_USB_DEV(EMPIA, EMPIA_DIGIVOX_MINI_SL_COLD),
DVB_USB_DEV(EMPIA, EMPIA_DIGIVOX_MINI_SL_WARM),
DVB_USB_DEV(GRANDTEC, GRANDTEC_DVBT_USB2_COLD),
DVB_USB_DEV(GRANDTEC, GRANDTEC_DVBT_USB2_WARM),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_ARTEC_T14_COLD),
DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_ARTEC_T14_WARM),
DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_COLD),
DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_WARM),
DVB_USB_DEV(HUMAX_COEX, HUMAX_DVB_T_STICK_HIGH_SPEED_COLD),
DVB_USB_DEV(HUMAX_COEX, HUMAX_DVB_T_STICK_HIGH_SPEED_WARM),
{ }
};
MODULE_DEVICE_TABLE (usb, dibusb_dib3000mc_table);
static struct dvb_usb_device_properties dibusb_mc_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-dibusb-6.0.0.8.fw",
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter_count = 32,
.streaming_ctrl = dibusb2_0_streaming_ctrl,
.pid_filter = dibusb_pid_filter,
.pid_filter_ctrl = dibusb_pid_filter_ctrl,
.frontend_attach = dibusb_dib3000mc_frontend_attach,
.tuner_attach = dibusb_dib3000mc_tuner_attach,
/* parameter for the MPEG2-data transfer */
.stream = {
.type = USB_BULK,
.count = 8,
.endpoint = 0x06,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
.size_of_priv = sizeof(struct dibusb_state),
}
},
.power_ctrl = dibusb2_0_power_ctrl,
.rc.legacy = {
.rc_interval = DEFAULT_RC_INTERVAL,
.rc_map_table = rc_map_dibusb_table,
.rc_map_size = 111, /* FIXME */
.rc_query = dibusb_rc_query,
},
.i2c_algo = &dibusb_i2c_algo,
.generic_bulk_ctrl_endpoint = 0x01,
.num_device_descs = 8,
.devices = {
{ "DiBcom USB2.0 DVB-T reference design (MOD3000P)",
{ &dibusb_dib3000mc_table[DIBCOM_MOD3001_COLD], NULL },
{ &dibusb_dib3000mc_table[DIBCOM_MOD3001_WARM], NULL },
},
{ "Artec T1 USB2.0 TVBOX (please check the warm ID)",
{ &dibusb_dib3000mc_table[ULTIMA_TVBOX_USB2_COLD], NULL },
{ &dibusb_dib3000mc_table[ULTIMA_TVBOX_USB2_WARM], NULL },
},
{ "LITE-ON USB2.0 DVB-T Tuner",
/* Also rebranded as Intuix S800, Toshiba */
{ &dibusb_dib3000mc_table[LITEON_DVB_T_COLD], NULL },
{ &dibusb_dib3000mc_table[LITEON_DVB_T_WARM], NULL },
},
{ "MSI Digivox Mini SL",
{ &dibusb_dib3000mc_table[EMPIA_DIGIVOX_MINI_SL_COLD], NULL },
{ &dibusb_dib3000mc_table[EMPIA_DIGIVOX_MINI_SL_WARM], NULL },
},
{ "GRAND - USB2.0 DVB-T adapter",
{ &dibusb_dib3000mc_table[GRANDTEC_DVBT_USB2_COLD], NULL },
{ &dibusb_dib3000mc_table[GRANDTEC_DVBT_USB2_WARM], NULL },
},
{ "Artec T14 - USB2.0 DVB-T",
{ &dibusb_dib3000mc_table[ULTIMA_ARTEC_T14_COLD], NULL },
{ &dibusb_dib3000mc_table[ULTIMA_ARTEC_T14_WARM], NULL },
},
{ "Leadtek - USB2.0 Winfast DTV dongle",
{ &dibusb_dib3000mc_table[LEADTEK_WINFAST_DTV_DONGLE_COLD], NULL },
{ &dibusb_dib3000mc_table[LEADTEK_WINFAST_DTV_DONGLE_WARM], NULL },
},
{ "Humax/Coex DVB-T USB Stick 2.0 High Speed",
{ &dibusb_dib3000mc_table[HUMAX_DVB_T_STICK_HIGH_SPEED_COLD], NULL },
{ &dibusb_dib3000mc_table[HUMAX_DVB_T_STICK_HIGH_SPEED_WARM], NULL },
},
{ NULL },
}
};
static struct usb_driver dibusb_mc_driver = {
.name = "dvb_usb_dibusb_mc",
.probe = dibusb_mc_probe,
.disconnect = dvb_usb_device_exit,
.id_table = dibusb_dib3000mc_table,
};
module_usb_driver(dibusb_mc_driver);
MODULE_AUTHOR("Patrick Boettcher <[email protected]>");
MODULE_DESCRIPTION("Driver for DiBcom USB2.0 DVB-T (DiB3000M-C/P based) devices");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/dibusb-mc.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB frontend part of the Linux driver for the TwinhanDTV StarBox USB2.0
* DVB-S receiver.
*
* Copyright (C) 2005 Ralph Metzler <[email protected]>
* Metzler Brothers Systementwicklung GbR
*
* Copyright (C) 2005 Patrick Boettcher <[email protected]>
*
* Thanks to Twinhan who kindly provided hardware and information.
*
* This file can be removed soon, after the DST-driver is rewritten to provice
* the frontend-controlling separately.
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#include "vp702x.h"
struct vp702x_fe_state {
struct dvb_frontend fe;
struct dvb_usb_device *d;
struct dvb_frontend_ops ops;
enum fe_sec_voltage voltage;
enum fe_sec_tone_mode tone_mode;
u8 lnb_buf[8];
u8 lock;
u8 sig;
u8 snr;
unsigned long next_status_check;
unsigned long status_check_interval;
};
static int vp702x_fe_refresh_state(struct vp702x_fe_state *st)
{
struct vp702x_device_state *dst = st->d->priv;
u8 *buf;
if (time_after(jiffies, st->next_status_check)) {
mutex_lock(&dst->buf_mutex);
buf = dst->buf;
vp702x_usb_in_op(st->d, READ_STATUS, 0, 0, buf, 10);
st->lock = buf[4];
vp702x_usb_in_op(st->d, READ_TUNER_REG_REQ, 0x11, 0, buf, 1);
st->snr = buf[0];
vp702x_usb_in_op(st->d, READ_TUNER_REG_REQ, 0x15, 0, buf, 1);
st->sig = buf[0];
mutex_unlock(&dst->buf_mutex);
st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
}
return 0;
}
static u8 vp702x_chksum(u8 *buf,int f, int count)
{
u8 s = 0;
int i;
for (i = f; i < f+count; i++)
s += buf[i];
return ~s+1;
}
static int vp702x_fe_read_status(struct dvb_frontend *fe,
enum fe_status *status)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
vp702x_fe_refresh_state(st);
deb_fe("%s\n",__func__);
if (st->lock == 0)
*status = FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_SIGNAL | FE_HAS_CARRIER;
else
*status = 0;
if (*status & FE_HAS_LOCK)
st->status_check_interval = 1000;
else
st->status_check_interval = 250;
return 0;
}
/* not supported by this Frontend */
static int vp702x_fe_read_ber(struct dvb_frontend* fe, u32 *ber)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
vp702x_fe_refresh_state(st);
*ber = 0;
return 0;
}
/* not supported by this Frontend */
static int vp702x_fe_read_unc_blocks(struct dvb_frontend* fe, u32 *unc)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
vp702x_fe_refresh_state(st);
*unc = 0;
return 0;
}
static int vp702x_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
vp702x_fe_refresh_state(st);
*strength = (st->sig << 8) | st->sig;
return 0;
}
static int vp702x_fe_read_snr(struct dvb_frontend* fe, u16 *snr)
{
u8 _snr;
struct vp702x_fe_state *st = fe->demodulator_priv;
vp702x_fe_refresh_state(st);
_snr = (st->snr & 0x1f) * 0xff / 0x1f;
*snr = (_snr << 8) | _snr;
return 0;
}
static int vp702x_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
{
deb_fe("%s\n",__func__);
tune->min_delay_ms = 2000;
return 0;
}
static int vp702x_fe_set_frontend(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
struct vp702x_fe_state *st = fe->demodulator_priv;
struct vp702x_device_state *dst = st->d->priv;
u32 freq = fep->frequency/1000;
/*CalFrequency*/
/* u16 frequencyRef[16] = { 2, 4, 8, 16, 32, 64, 128, 256, 24, 5, 10, 20, 40, 80, 160, 320 }; */
u64 sr;
u8 *cmd;
mutex_lock(&dst->buf_mutex);
cmd = dst->buf;
memset(cmd, 0, 10);
cmd[0] = (freq >> 8) & 0x7f;
cmd[1] = freq & 0xff;
cmd[2] = 1; /* divrate == 4 -> frequencyRef[1] -> 1 here */
sr = (u64) (fep->symbol_rate/1000) << 20;
do_div(sr,88000);
cmd[3] = (sr >> 12) & 0xff;
cmd[4] = (sr >> 4) & 0xff;
cmd[5] = (sr << 4) & 0xf0;
deb_fe("setting frontend to: %u -> %u (%x) LNB-based GHz, symbolrate: %d -> %lu (%lx)\n",
fep->frequency, freq, freq, fep->symbol_rate,
(unsigned long) sr, (unsigned long) sr);
/* if (fep->inversion == INVERSION_ON)
cmd[6] |= 0x80; */
if (st->voltage == SEC_VOLTAGE_18)
cmd[6] |= 0x40;
/* if (fep->symbol_rate > 8000000)
cmd[6] |= 0x20;
if (fep->frequency < 1531000)
cmd[6] |= 0x04;
if (st->tone_mode == SEC_TONE_ON)
cmd[6] |= 0x01;*/
cmd[7] = vp702x_chksum(cmd,0,7);
st->status_check_interval = 250;
st->next_status_check = jiffies;
vp702x_usb_inout_op(st->d, cmd, 8, cmd, 10, 100);
if (cmd[2] == 0 && cmd[3] == 0)
deb_fe("tuning failed.\n");
else
deb_fe("tuning succeeded.\n");
mutex_unlock(&dst->buf_mutex);
return 0;
}
static int vp702x_fe_init(struct dvb_frontend *fe)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
deb_fe("%s\n",__func__);
vp702x_usb_in_op(st->d, RESET_TUNER, 0, 0, NULL, 0);
return 0;
}
static int vp702x_fe_sleep(struct dvb_frontend *fe)
{
deb_fe("%s\n",__func__);
return 0;
}
static int vp702x_fe_send_diseqc_msg (struct dvb_frontend* fe,
struct dvb_diseqc_master_cmd *m)
{
u8 *cmd;
struct vp702x_fe_state *st = fe->demodulator_priv;
struct vp702x_device_state *dst = st->d->priv;
deb_fe("%s\n",__func__);
if (m->msg_len > 4)
return -EINVAL;
mutex_lock(&dst->buf_mutex);
cmd = dst->buf;
cmd[1] = SET_DISEQC_CMD;
cmd[2] = m->msg_len;
memcpy(&cmd[3], m->msg, m->msg_len);
cmd[7] = vp702x_chksum(cmd, 0, 7);
vp702x_usb_inout_op(st->d, cmd, 8, cmd, 10, 100);
if (cmd[2] == 0 && cmd[3] == 0)
deb_fe("diseqc cmd failed.\n");
else
deb_fe("diseqc cmd succeeded.\n");
mutex_unlock(&dst->buf_mutex);
return 0;
}
static int vp702x_fe_send_diseqc_burst(struct dvb_frontend *fe,
enum fe_sec_mini_cmd burst)
{
deb_fe("%s\n",__func__);
return 0;
}
static int vp702x_fe_set_tone(struct dvb_frontend *fe,
enum fe_sec_tone_mode tone)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
struct vp702x_device_state *dst = st->d->priv;
u8 *buf;
deb_fe("%s\n",__func__);
st->tone_mode = tone;
if (tone == SEC_TONE_ON)
st->lnb_buf[2] = 0x02;
else
st->lnb_buf[2] = 0x00;
st->lnb_buf[7] = vp702x_chksum(st->lnb_buf, 0, 7);
mutex_lock(&dst->buf_mutex);
buf = dst->buf;
memcpy(buf, st->lnb_buf, 8);
vp702x_usb_inout_op(st->d, buf, 8, buf, 10, 100);
if (buf[2] == 0 && buf[3] == 0)
deb_fe("set_tone cmd failed.\n");
else
deb_fe("set_tone cmd succeeded.\n");
mutex_unlock(&dst->buf_mutex);
return 0;
}
static int vp702x_fe_set_voltage(struct dvb_frontend *fe,
enum fe_sec_voltage voltage)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
struct vp702x_device_state *dst = st->d->priv;
u8 *buf;
deb_fe("%s\n",__func__);
st->voltage = voltage;
if (voltage != SEC_VOLTAGE_OFF)
st->lnb_buf[4] = 0x01;
else
st->lnb_buf[4] = 0x00;
st->lnb_buf[7] = vp702x_chksum(st->lnb_buf, 0, 7);
mutex_lock(&dst->buf_mutex);
buf = dst->buf;
memcpy(buf, st->lnb_buf, 8);
vp702x_usb_inout_op(st->d, buf, 8, buf, 10, 100);
if (buf[2] == 0 && buf[3] == 0)
deb_fe("set_voltage cmd failed.\n");
else
deb_fe("set_voltage cmd succeeded.\n");
mutex_unlock(&dst->buf_mutex);
return 0;
}
static void vp702x_fe_release(struct dvb_frontend* fe)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
kfree(st);
}
static const struct dvb_frontend_ops vp702x_fe_ops;
struct dvb_frontend * vp702x_fe_attach(struct dvb_usb_device *d)
{
struct vp702x_fe_state *s = kzalloc(sizeof(struct vp702x_fe_state), GFP_KERNEL);
if (s == NULL)
goto error;
s->d = d;
memcpy(&s->fe.ops,&vp702x_fe_ops,sizeof(struct dvb_frontend_ops));
s->fe.demodulator_priv = s;
s->lnb_buf[1] = SET_LNB_POWER;
s->lnb_buf[3] = 0xff; /* 0=tone burst, 2=data burst, ff=off */
return &s->fe;
error:
return NULL;
}
static const struct dvb_frontend_ops vp702x_fe_ops = {
.delsys = { SYS_DVBS },
.info = {
.name = "Twinhan DST-like frontend (VP7021/VP7020) DVB-S",
.frequency_min_hz = 950 * MHz,
.frequency_max_hz = 2150 * MHz,
.frequency_stepsize_hz = 1 * MHz,
.symbol_rate_min = 1000000,
.symbol_rate_max = 45000000,
.symbol_rate_tolerance = 500, /* ppm */
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
FE_CAN_QPSK |
FE_CAN_FEC_AUTO
},
.release = vp702x_fe_release,
.init = vp702x_fe_init,
.sleep = vp702x_fe_sleep,
.set_frontend = vp702x_fe_set_frontend,
.get_tune_settings = vp702x_fe_get_tune_settings,
.read_status = vp702x_fe_read_status,
.read_ber = vp702x_fe_read_ber,
.read_signal_strength = vp702x_fe_read_signal_strength,
.read_snr = vp702x_fe_read_snr,
.read_ucblocks = vp702x_fe_read_unc_blocks,
.diseqc_send_master_cmd = vp702x_fe_send_diseqc_msg,
.diseqc_send_burst = vp702x_fe_send_diseqc_burst,
.set_tone = vp702x_fe_set_tone,
.set_voltage = vp702x_fe_set_voltage,
};
| linux-master | drivers/media/usb/dvb-usb/vp702x-fe.c |
// SPDX-License-Identifier: GPL-2.0-only
/* DVB USB framework compliant Linux driver for the Opera1 DVB-S Card
*
* Copyright (C) 2006 Mario Hlawitschka ([email protected])
* Copyright (C) 2006 Marco Gittler ([email protected])
*
* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
*/
#define DVB_USB_LOG_PREFIX "opera"
#include "dvb-usb.h"
#include "stv0299.h"
#define OPERA_READ_MSG 0
#define OPERA_WRITE_MSG 1
#define OPERA_I2C_TUNER 0xd1
#define READ_FX2_REG_REQ 0xba
#define READ_MAC_ADDR 0x08
#define OPERA_WRITE_FX2 0xbb
#define OPERA_TUNER_REQ 0xb1
#define REG_1F_SYMBOLRATE_BYTE0 0x1f
#define REG_20_SYMBOLRATE_BYTE1 0x20
#define REG_21_SYMBOLRATE_BYTE2 0x21
#define ADDR_B600_VOLTAGE_13V (0x02)
#define ADDR_B601_VOLTAGE_18V (0x03)
#define ADDR_B1A6_STREAM_CTRL (0x04)
#define ADDR_B880_READ_REMOTE (0x05)
struct opera1_state {
u32 last_key_pressed;
};
struct rc_map_opera_table {
u32 keycode;
u32 event;
};
static int dvb_usb_opera1_debug;
module_param_named(debug, dvb_usb_opera1_debug, int, 0644);
MODULE_PARM_DESC(debug,
"set debugging level (1=info,xfer=2,pll=4,ts=8,err=16,rc=32,fw=64 (or-able))."
DVB_USB_DEBUG_STATUS);
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
static int opera1_xilinx_rw(struct usb_device *dev, u8 request, u16 value,
u8 * data, u16 len, int flags)
{
int ret;
u8 tmp;
u8 *buf;
unsigned int pipe = (flags == OPERA_READ_MSG) ?
usb_rcvctrlpipe(dev,0) : usb_sndctrlpipe(dev, 0);
u8 request_type = (flags == OPERA_READ_MSG) ? USB_DIR_IN : USB_DIR_OUT;
buf = kmalloc(len, GFP_KERNEL);
if (!buf)
return -ENOMEM;
if (flags == OPERA_WRITE_MSG)
memcpy(buf, data, len);
ret = usb_control_msg(dev, pipe, request,
request_type | USB_TYPE_VENDOR, value, 0x0,
buf, len, 2000);
if (request == OPERA_TUNER_REQ) {
tmp = buf[0];
if (usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
OPERA_TUNER_REQ, USB_DIR_IN | USB_TYPE_VENDOR,
0x01, 0x0, buf, 1, 2000) < 1 || buf[0] != 0x08) {
ret = 0;
goto out;
}
buf[0] = tmp;
}
if (flags == OPERA_READ_MSG)
memcpy(data, buf, len);
out:
kfree(buf);
return ret;
}
/* I2C */
static int opera1_usb_i2c_msgxfer(struct dvb_usb_device *dev, u16 addr,
u8 * buf, u16 len)
{
int ret = 0;
u8 request;
u16 value;
if (!dev) {
info("no usb_device");
return -EINVAL;
}
if (mutex_lock_interruptible(&dev->usb_mutex) < 0)
return -EAGAIN;
switch (addr>>1){
case ADDR_B600_VOLTAGE_13V:
request=0xb6;
value=0x00;
break;
case ADDR_B601_VOLTAGE_18V:
request=0xb6;
value=0x01;
break;
case ADDR_B1A6_STREAM_CTRL:
request=0xb1;
value=0xa6;
break;
case ADDR_B880_READ_REMOTE:
request=0xb8;
value=0x80;
break;
default:
request=0xb1;
value=addr;
}
ret = opera1_xilinx_rw(dev->udev, request,
value, buf, len,
addr&0x01?OPERA_READ_MSG:OPERA_WRITE_MSG);
mutex_unlock(&dev->usb_mutex);
return ret;
}
static int opera1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
int num)
{
struct dvb_usb_device *d = i2c_get_adapdata(adap);
int i = 0, tmp = 0;
if (!d)
return -ENODEV;
if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
return -EAGAIN;
for (i = 0; i < num; i++) {
if ((tmp = opera1_usb_i2c_msgxfer(d,
(msg[i].addr<<1)|(msg[i].flags&I2C_M_RD?0x01:0),
msg[i].buf,
msg[i].len
)) != msg[i].len) {
break;
}
if (dvb_usb_opera1_debug & 0x10)
info("sending i2c message %d %d", tmp, msg[i].len);
}
mutex_unlock(&d->i2c_mutex);
return num;
}
static u32 opera1_i2c_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C;
}
static struct i2c_algorithm opera1_i2c_algo = {
.master_xfer = opera1_i2c_xfer,
.functionality = opera1_i2c_func,
};
static int opera1_set_voltage(struct dvb_frontend *fe,
enum fe_sec_voltage voltage)
{
static u8 command_13v[1]={0x00};
static u8 command_18v[1]={0x01};
struct i2c_msg msg[] = {
{.addr = ADDR_B600_VOLTAGE_13V,.flags = 0,.buf = command_13v,.len = 1},
};
struct dvb_usb_adapter *udev_adap = fe->dvb->priv;
if (voltage == SEC_VOLTAGE_18) {
msg[0].addr = ADDR_B601_VOLTAGE_18V;
msg[0].buf = command_18v;
}
i2c_transfer(&udev_adap->dev->i2c_adap, msg, 1);
return 0;
}
static int opera1_stv0299_set_symbol_rate(struct dvb_frontend *fe, u32 srate,
u32 ratio)
{
stv0299_writereg(fe, 0x13, 0x98);
stv0299_writereg(fe, 0x14, 0x95);
stv0299_writereg(fe, REG_1F_SYMBOLRATE_BYTE0, (ratio >> 16) & 0xff);
stv0299_writereg(fe, REG_20_SYMBOLRATE_BYTE1, (ratio >> 8) & 0xff);
stv0299_writereg(fe, REG_21_SYMBOLRATE_BYTE2, (ratio) & 0xf0);
return 0;
}
static u8 opera1_inittab[] = {
0x00, 0xa1,
0x01, 0x15,
0x02, 0x30,
0x03, 0x00,
0x04, 0x7d,
0x05, 0x05,
0x06, 0x02,
0x07, 0x00,
0x0b, 0x00,
0x0c, 0x01,
0x0d, 0x81,
0x0e, 0x44,
0x0f, 0x19,
0x10, 0x3f,
0x11, 0x84,
0x12, 0xda,
0x13, 0x98,
0x14, 0x95,
0x15, 0xc9,
0x16, 0xeb,
0x17, 0x00,
0x18, 0x19,
0x19, 0x8b,
0x1a, 0x00,
0x1b, 0x82,
0x1c, 0x7f,
0x1d, 0x00,
0x1e, 0x00,
REG_1F_SYMBOLRATE_BYTE0, 0x06,
REG_20_SYMBOLRATE_BYTE1, 0x50,
REG_21_SYMBOLRATE_BYTE2, 0x10,
0x22, 0x00,
0x23, 0x00,
0x24, 0x37,
0x25, 0xbc,
0x26, 0x00,
0x27, 0x00,
0x28, 0x00,
0x29, 0x1e,
0x2a, 0x14,
0x2b, 0x1f,
0x2c, 0x09,
0x2d, 0x0a,
0x2e, 0x00,
0x2f, 0x00,
0x30, 0x00,
0x31, 0x1f,
0x32, 0x19,
0x33, 0xfc,
0x34, 0x13,
0xff, 0xff,
};
static struct stv0299_config opera1_stv0299_config = {
.demod_address = 0xd0>>1,
.min_delay_ms = 100,
.mclk = 88000000UL,
.invert = 1,
.skip_reinit = 0,
.lock_output = STV0299_LOCKOUTPUT_0,
.volt13_op0_op1 = STV0299_VOLT13_OP0,
.inittab = opera1_inittab,
.set_symbol_rate = opera1_stv0299_set_symbol_rate,
};
static int opera1_frontend_attach(struct dvb_usb_adapter *d)
{
d->fe_adap[0].fe = dvb_attach(stv0299_attach, &opera1_stv0299_config,
&d->dev->i2c_adap);
if ((d->fe_adap[0].fe) != NULL) {
d->fe_adap[0].fe->ops.set_voltage = opera1_set_voltage;
return 0;
}
info("not attached stv0299");
return -EIO;
}
static int opera1_tuner_attach(struct dvb_usb_adapter *adap)
{
dvb_attach(
dvb_pll_attach, adap->fe_adap[0].fe, 0xc0>>1,
&adap->dev->i2c_adap, DVB_PLL_OPERA1
);
return 0;
}
static int opera1_power_ctrl(struct dvb_usb_device *d, int onoff)
{
u8 val = onoff ? 0x01 : 0x00;
if (dvb_usb_opera1_debug)
info("power %s", onoff ? "on" : "off");
return opera1_xilinx_rw(d->udev, 0xb7, val,
&val, 1, OPERA_WRITE_MSG);
}
static int opera1_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
{
static u8 buf_start[2] = { 0xff, 0x03 };
static u8 buf_stop[2] = { 0xff, 0x00 };
struct i2c_msg start_tuner[] = {
{.addr = ADDR_B1A6_STREAM_CTRL,.buf = onoff ? buf_start : buf_stop,.len = 2},
};
if (dvb_usb_opera1_debug)
info("streaming %s", onoff ? "on" : "off");
i2c_transfer(&adap->dev->i2c_adap, start_tuner, 1);
return 0;
}
static int opera1_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid,
int onoff)
{
u8 b_pid[3];
struct i2c_msg msg[] = {
{.addr = ADDR_B1A6_STREAM_CTRL,.buf = b_pid,.len = 3},
};
if (dvb_usb_opera1_debug)
info("pidfilter index: %d pid: %d %s", index, pid,
onoff ? "on" : "off");
b_pid[0] = (2 * index) + 4;
b_pid[1] = onoff ? (pid & 0xff) : (0x00);
b_pid[2] = onoff ? ((pid >> 8) & 0xff) : (0x00);
i2c_transfer(&adap->dev->i2c_adap, msg, 1);
return 0;
}
static int opera1_pid_filter_control(struct dvb_usb_adapter *adap, int onoff)
{
int u = 0x04;
u8 b_pid[3];
struct i2c_msg msg[] = {
{.addr = ADDR_B1A6_STREAM_CTRL,.buf = b_pid,.len = 3},
};
if (dvb_usb_opera1_debug)
info("%s hw-pidfilter", onoff ? "enable" : "disable");
for (; u < 0x7e; u += 2) {
b_pid[0] = u;
b_pid[1] = 0;
b_pid[2] = 0x80;
i2c_transfer(&adap->dev->i2c_adap, msg, 1);
}
return 0;
}
static struct rc_map_table rc_map_opera1_table[] = {
{0x5fa0, KEY_1},
{0x51af, KEY_2},
{0x5da2, KEY_3},
{0x41be, KEY_4},
{0x0bf5, KEY_5},
{0x43bd, KEY_6},
{0x47b8, KEY_7},
{0x49b6, KEY_8},
{0x05fa, KEY_9},
{0x45ba, KEY_0},
{0x09f6, KEY_CHANNELUP}, /*chanup */
{0x1be5, KEY_CHANNELDOWN}, /*chandown */
{0x5da3, KEY_VOLUMEDOWN}, /*voldown */
{0x5fa1, KEY_VOLUMEUP}, /*volup */
{0x07f8, KEY_SPACE}, /*tab */
{0x1fe1, KEY_OK}, /*play ok */
{0x1be4, KEY_ZOOM}, /*zoom */
{0x59a6, KEY_MUTE}, /*mute */
{0x5ba5, KEY_RADIO}, /*tv/f */
{0x19e7, KEY_RECORD}, /*rec */
{0x01fe, KEY_STOP}, /*Stop */
{0x03fd, KEY_PAUSE}, /*pause */
{0x03fc, KEY_SCREEN}, /*<- -> */
{0x07f9, KEY_CAMERA}, /*capture */
{0x47b9, KEY_ESC}, /*exit */
{0x43bc, KEY_POWER2}, /*power */
};
static int opera1_rc_query(struct dvb_usb_device *dev, u32 * event, int *state)
{
struct opera1_state *opst = dev->priv;
u8 rcbuffer[32];
const u16 startmarker1 = 0x10ed;
const u16 startmarker2 = 0x11ec;
struct i2c_msg read_remote[] = {
{.addr = ADDR_B880_READ_REMOTE,.buf = rcbuffer,.flags = I2C_M_RD,.len = 32},
};
int i = 0;
u32 send_key = 0;
if (i2c_transfer(&dev->i2c_adap, read_remote, 1) == 1) {
for (i = 0; i < 32; i++) {
if (rcbuffer[i])
send_key |= 1;
if (i < 31)
send_key = send_key << 1;
}
if (send_key & 0x8000)
send_key = (send_key << 1) | (send_key >> 15 & 0x01);
if (send_key == 0xffff && opst->last_key_pressed != 0) {
*state = REMOTE_KEY_REPEAT;
*event = opst->last_key_pressed;
return 0;
}
for (; send_key != 0;) {
if (send_key >> 16 == startmarker2) {
break;
} else if (send_key >> 16 == startmarker1) {
send_key =
(send_key & 0xfffeffff) | (startmarker1 << 16);
break;
} else
send_key >>= 1;
}
if (send_key == 0)
return 0;
send_key = (send_key & 0xffff) | 0x0100;
for (i = 0; i < ARRAY_SIZE(rc_map_opera1_table); i++) {
if (rc5_scan(&rc_map_opera1_table[i]) == (send_key & 0xffff)) {
*state = REMOTE_KEY_PRESSED;
*event = rc_map_opera1_table[i].keycode;
opst->last_key_pressed =
rc_map_opera1_table[i].keycode;
break;
}
opst->last_key_pressed = 0;
}
} else
*state = REMOTE_NO_KEY_PRESSED;
return 0;
}
enum {
CYPRESS_OPERA1_COLD,
OPERA1_WARM,
};
static struct usb_device_id opera1_table[] = {
DVB_USB_DEV(CYPRESS, CYPRESS_OPERA1_COLD),
DVB_USB_DEV(OPERA1, OPERA1_WARM),
{ }
};
MODULE_DEVICE_TABLE(usb, opera1_table);
static int opera1_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
{
int ret;
u8 command[] = { READ_MAC_ADDR };
ret = opera1_xilinx_rw(d->udev, 0xb1, 0xa0, command, 1, OPERA_WRITE_MSG);
if (ret)
return ret;
ret = opera1_xilinx_rw(d->udev, 0xb1, 0xa1, mac, 6, OPERA_READ_MSG);
if (ret)
return ret;
return 0;
}
static int opera1_xilinx_load_firmware(struct usb_device *dev,
const char *filename)
{
const struct firmware *fw = NULL;
u8 *b, *p;
int ret = 0, i,fpgasize=40;
u8 testval;
info("start downloading fpga firmware %s",filename);
if ((ret = request_firmware(&fw, filename, &dev->dev)) != 0) {
err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware",
filename);
return ret;
} else {
p = kmalloc(fw->size, GFP_KERNEL);
opera1_xilinx_rw(dev, 0xbc, 0x00, &testval, 1, OPERA_READ_MSG);
if (p != NULL && testval != 0x67) {
u8 reset = 0, fpga_command = 0;
memcpy(p, fw->data, fw->size);
/* clear fpga ? */
opera1_xilinx_rw(dev, 0xbc, 0xaa, &fpga_command, 1,
OPERA_WRITE_MSG);
for (i = 0; i < fw->size;) {
if ( (fw->size - i) <fpgasize){
fpgasize=fw->size-i;
}
b = (u8 *) p + i;
if (opera1_xilinx_rw
(dev, OPERA_WRITE_FX2, 0x0, b , fpgasize,
OPERA_WRITE_MSG) != fpgasize
) {
err("error while transferring firmware");
ret = -EINVAL;
break;
}
i = i + fpgasize;
}
/* restart the CPU */
if (ret || opera1_xilinx_rw
(dev, 0xa0, 0xe600, &reset, 1,
OPERA_WRITE_MSG) != 1) {
err("could not restart the USB controller CPU.");
ret = -EINVAL;
}
}
}
kfree(p);
release_firmware(fw);
return ret;
}
static struct dvb_usb_device_properties opera1_properties = {
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
.usb_ctrl = CYPRESS_FX2,
.firmware = "dvb-usb-opera-01.fw",
.size_of_priv = sizeof(struct opera1_state),
.power_ctrl = opera1_power_ctrl,
.i2c_algo = &opera1_i2c_algo,
.rc.legacy = {
.rc_map_table = rc_map_opera1_table,
.rc_map_size = ARRAY_SIZE(rc_map_opera1_table),
.rc_interval = 200,
.rc_query = opera1_rc_query,
},
.read_mac_address = opera1_read_mac_address,
.generic_bulk_ctrl_endpoint = 0x00,
/* parameter for the MPEG2-data transfer */
.num_adapters = 1,
.adapter = {
{
.num_frontends = 1,
.fe = {{
.frontend_attach = opera1_frontend_attach,
.streaming_ctrl = opera1_streaming_ctrl,
.tuner_attach = opera1_tuner_attach,
.caps =
DVB_USB_ADAP_HAS_PID_FILTER |
DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
.pid_filter = opera1_pid_filter,
.pid_filter_ctrl = opera1_pid_filter_control,
.pid_filter_count = 252,
.stream = {
.type = USB_BULK,
.count = 10,
.endpoint = 0x82,
.u = {
.bulk = {
.buffersize = 4096,
}
}
},
}},
}
},
.num_device_descs = 1,
.devices = {
{"Opera1 DVB-S USB2.0",
{&opera1_table[CYPRESS_OPERA1_COLD], NULL},
{&opera1_table[OPERA1_WARM], NULL},
},
}
};
static int opera1_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct usb_device *udev = interface_to_usbdev(intf);
if (le16_to_cpu(udev->descriptor.idProduct) == USB_PID_OPERA1_WARM &&
le16_to_cpu(udev->descriptor.idVendor) == USB_VID_OPERA1 &&
opera1_xilinx_load_firmware(udev, "dvb-usb-opera1-fpga-01.fw") != 0
) {
return -EINVAL;
}
if (0 != dvb_usb_device_init(intf, &opera1_properties,
THIS_MODULE, NULL, adapter_nr))
return -EINVAL;
return 0;
}
static struct usb_driver opera1_driver = {
.name = "opera1",
.probe = opera1_probe,
.disconnect = dvb_usb_device_exit,
.id_table = opera1_table,
};
module_usb_driver(opera1_driver);
MODULE_AUTHOR("Mario Hlawitschka (c) [email protected]");
MODULE_AUTHOR("Marco Gittler (c) [email protected]");
MODULE_DESCRIPTION("Driver for Opera1 DVB-S device");
MODULE_VERSION("0.1");
MODULE_LICENSE("GPL");
| linux-master | drivers/media/usb/dvb-usb/opera1.c |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.