anchor.diff:  -export_type([mvreg/0, mvreg_op/0]).
   
   %% TODO: make opaque
  +-type actor() :: term().
  +-type ts()    :: non_neg_integer().
   -type mvreg() :: [{term(), riak_dt_vclock:vclock()}].
   
  --type mvreg_op() :: {assign, term(), non_neg_integer()}
  +-type mvreg_op() :: {assign, term(), ts()}
                     | {assign, term()}
  -                  | {propagate, term(), term()}.
  +                  | {propagate, term(), ts()}.
   
   -type mv_q() :: timestamp.
   
  
positive.code: %% since there can be diverged value in this register.
  -spec value(mvreg()) -> [term()].
  value(MVReg) ->
      [Val || {Val, _TS} <- MVReg].
  
  %% @doc query for this `mvreg()' of its timestamp.
  %% `timestamp' is the only query option.
  -spec value(mv_q(), mvreg()) -> [term()].
  value(timestamp, MVReg) ->
      [TS || {_Val, TS} <- MVReg].
  
  %% @doc Assign `Value' to this register. The vector clock of this
  %% register will be incremented by one for the corresponding `Actor'.
  
negative.code:     {V2, TS2} = H2,
      VEqual = V1 =:= V2,
      TSEqual = riak_dt_vclock:equal(TS1, TS2),
      case VEqual andalso TSEqual of
  	true ->
              eq(T1, T2);
          false ->
              false
      end;
  eq(_, _) ->
  