anchor.diff:  -define(V1_VERS, 1).
   
   %% @doc Encode an effecient binary representation of an `mvreg()'
  +%% Not working yet...
   -spec to_binary(mvreg()) -> binary().
   to_binary(MVReg) ->
       <<?TAG:8/integer, ?V1_VERS:8/integer, (riak_dt:to_binary(MVReg))/binary>>.
  
positive.code:             {ok, MVReg}
      end;
  
  %% @doc Assign the value without providing timestamp. The vector clock
  %% of the register will be incremented by one for the corresponding actor.
  update({assign, Value}, Actor, MVReg) ->
      VV = incVV(MVReg, Actor),
      NewMVReg = [{Value, VV}],
      {ok, NewMVReg};
  
  %% @doc Propagate is used in case of non-linealizable update. The update
  %% provides the value and the vector clock for this update. The vector clock
  %% is supposed to be a single clock instead of a list, since update will combine
  %% all vector clocks into a single one. All compatible vector clocks (descendent) will be merged;
  %% non-compatible vector clocks will be kept in a list.
  update({propagate, Value, TS}, _, MVReg ) ->
      case is_dominated(value(timestamp, MVReg), TS) of 
          true ->
              {ok, MVReg};
          false ->
  
negative.code: 
  %% @doc
  %% An Multi-Value Register CRDT.
  %% There are two kinds of updates: assign and propagate.
  %% Assign is used for a single replica of MVReg where updates are linealizable.
  %% Propagate is used to propagate update from a replica to other replicas. It is similar to the 'merge' operation
  %% of the state-based specifiction of MVReg.
  %% Detailed usage is explained later. 
  %% @reference Marc Shapiro, Nuno Preguiça, Carlos Baquero, Marek Zawirski (2011) A comprehensive study of
  %% Convergent and Commutative Replicated Data Types. http://hal.upmc.fr/inria-00555588/
  %%
  