anchor.diff:      [I|move_allocates(Is)];
   move_allocates([]) -> [].
   
  +move_allocates_1([{'%def',_}|Is], Acc) ->
  +    move_allocates_1(Is, Acc);
   move_allocates_1([I|Is], [{set,[],[],{alloc,Live0,Info}}|Acc]=Acc0) ->
  -    case {alloc_may_pass(I),alloc_live_regs(I, Live0)} of
  -	{false,_} ->
  -	    move_allocates_1(Is, [I|Acc0]);
  -	{true,not_possible} ->
  -	    move_allocates_1(Is, [I|Acc0]);
  -	{true,Live} when is_integer(Live) ->
  -	    A = {set,[],[],{alloc,Live,Info}},
  -	    move_allocates_1(Is, [A,I|Acc])
  +    case alloc_may_pass(I) of
  +        false ->
  +            move_allocates_1(Is, [I|Acc0]);
  +        true ->
  +            case alloc_live_regs(I, Is, Live0) of
  +                not_possible ->
  +                    move_allocates_1(Is, [I|Acc0]);
  +                Live when is_integer(Live) ->
  +                    A = {set,[],[],{alloc,Live,Info}},
  +                    move_allocates_1(Is, [A,I|Acc])
  +            end
       end;
   move_allocates_1([I|Is], Acc) ->
       move_allocates_1(Is, [I|Acc]);
  
positive.code: %% Calculate the new number of live registers when we move an allocate
  %% instruction upwards, passing a 'set' instruction.
  
  alloc_live_regs({set,Ds,Ss,_}, Regs0) ->
      Rset = x_live(Ss, x_dead(Ds, (1 bsl Regs0)-1)),
      live_regs(0, Rset).
  
  live_regs(N, 0) ->
      N;
  live_regs(N, Regs) when Regs band 1 =:= 1 ->
      live_regs(N+1, Regs bsr 1);
  live_regs(_, _) ->
      not_possible.
  
  x_dead([{x,N}|Rs], Regs) -> x_dead(Rs, Regs band (bnot (1 bsl N)));
  x_dead([_|Rs], Regs) -> x_dead(Rs, Regs);
  
negative.code: x_live([{x,N}|Rs], Regs) -> x_live(Rs, Regs bor (1 bsl N));
  x_live([_|Rs], Regs) -> x_live(Rs, Regs);
  x_live([], Regs) -> Regs.
  
  %% defined_regs(ReversedInstructions) -> RegBitmap.
  %%  Given a reversed instruction stream, determine the
  %%  the registers that are defined.
  
  defined_regs([{'%def',Def}|_], Regs) ->
      Def bor Regs;
  defined_regs([{set,Ds,_,{alloc,Live,_}}|_], Regs) ->
      x_live(Ds, Regs bor ((1 bsl Live) - 1));
  defined_regs([{set,Ds,_,_}|Is], Regs) ->
      defined_regs(Is, x_live(Ds, Regs)).
  