anchor.diff:  %    ?assertEqual({new_value, 4}, merge(LWW1, LWW2)),
   %    ?assertEqual({new_value, 4}, merge(LWW2, LWW1)).
   
  -equal_test() ->
  -    VC0 = riak_dt_vclock:fresh(),
  -    VC1 = riak_dt_vclock:increment(actor0, VC0),
  -    VC2 = riak_dt_vclock:increment(actor0, VC1),
  -    MVR1 = [{value1, VC1}],
  -    MVR2 = [{value1, VC1}],
  -    MVR3 = [{value1, VC2}],
  -    MVR4 = [{value2, VC1}],
  -    ?assertNot(equal(MVR1, MVR3)),
  -    ?assert(equal(MVR1, MVR2)),
  -    ?assertNot(equal(MVR4, MVR1)).
  -
  +
  +%%Somehow to_binary does not work
   roundtrip_bin_test() ->
   %    LWW = new(),
   %    {ok, LWW1} = update({assign, 2}, a1, LWW),
  
positive.code: parent_clock(_Clock, Reg) ->
      Reg.
  
  %% @doc The values of a `gcounter()'.
  -spec value(mvreg()) -> term().
  value(MVReg) ->
      [Val || {Val, _TS} <- MVReg].
  
negative.code: value(timestamp, MVReg) ->
      [TS || {_Val, TS} <- MVReg].
  
  
  %% @doc Assign `Value' to this register. The vector clock
  %% of this register will be incremented by one for the corresponding `Actor'.
  %% In case the register has multiple diverged values, firstly a vector clock that dominates 
  %% all of them is calculated, then incrementation for `Actor' is applied. 
  %% 
  %% This kind of update is supposed to be
  %% linealizable so the operation issuer does not need to provide the
  %% vector clock it has observed.
  -spec update(mvreg_op(), term(), mvreg()) ->
                      {ok, mvreg()}.
  update({assign, Value}, Actor, MVReg) ->
      VV = incVV(MVReg, Actor),
      NewMVReg = [{Value, VV}],
      {ok, NewMVReg};
  
  %% @doc Assign a `Value' to the `mvreg()'
  %% associating the update with time `TS', if `TS' is larger than the current timestamp for 
  %% `Actor'.
  update({assign, Value, TS}, Actor, MVReg) ->
      case larger_than(TS, Actor, MVReg) of 
          true ->
              VV = incVV(MVReg, Actor),
              NewMVReg = [{Value, VV}],
  