id
int32 0
27.3k
| func
stringlengths 26
142k
| target
bool 2
classes | project
stringclasses 2
values | commit_id
stringlengths 40
40
|
|---|---|---|---|---|
5,572 | static void virtio_net_tx_bh(void *opaque)
{
VirtIONetQueue *q = opaque;
VirtIONet *n = q->n;
VirtIODevice *vdev = VIRTIO_DEVICE(n);
int32_t ret;
assert(vdev->vm_running);
q->tx_waiting = 0;
/* Just in case the driver is not ready on more */
if (unlikely(!(vdev->status & VIRTIO_CONFIG_S_DRIVER_OK))) {
return;
}
ret = virtio_net_flush_tx(q);
if (ret == -EBUSY) {
return; /* Notification re-enable handled by tx_complete */
}
/* If we flush a full burst of packets, assume there are
* more coming and immediately reschedule */
if (ret >= n->tx_burst) {
qemu_bh_schedule(q->tx_bh);
q->tx_waiting = 1;
return;
}
/* If less than a full burst, re-enable notification and flush
* anything that may have come in while we weren't looking. If
* we find something, assume the guest is still active and reschedule */
virtio_queue_set_notification(q->tx_vq, 1);
if (virtio_net_flush_tx(q) > 0) {
virtio_queue_set_notification(q->tx_vq, 0);
qemu_bh_schedule(q->tx_bh);
q->tx_waiting = 1;
}
}
| false | qemu | 0187c7989a5cedd4f88bba76839cc9c44fb3fc81 |
5,574 | static int sclp_parse(const char *devname)
{
QemuOptsList *device = qemu_find_opts("device");
static int index = 0;
char label[32];
QemuOpts *dev_opts;
if (strcmp(devname, "none") == 0) {
return 0;
}
if (index == MAX_SCLP_CONSOLES) {
fprintf(stderr, "qemu: too many sclp consoles\n");
exit(1);
}
assert(arch_type == QEMU_ARCH_S390X);
dev_opts = qemu_opts_create(device, NULL, 0, NULL);
qemu_opt_set(dev_opts, "driver", "sclpconsole", &error_abort);
snprintf(label, sizeof(label), "sclpcon%d", index);
sclp_hds[index] = qemu_chr_new(label, devname, NULL);
if (!sclp_hds[index]) {
fprintf(stderr, "qemu: could not connect sclp console"
" to character backend '%s'\n", devname);
return -1;
}
qemu_opt_set(dev_opts, "chardev", label, &error_abort);
index++;
return 0;
}
| false | qemu | f61eddcb2bb5cbbdd1d911b7e937db9affc29028 |
5,575 | void arm_gen_test_cc(int cc, int label)
{
TCGv_i32 tmp;
int inv;
switch (cc) {
case 0: /* eq: Z */
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_ZF, 0, label);
break;
case 1: /* ne: !Z */
tcg_gen_brcondi_i32(TCG_COND_NE, cpu_ZF, 0, label);
break;
case 2: /* cs: C */
tcg_gen_brcondi_i32(TCG_COND_NE, cpu_CF, 0, label);
break;
case 3: /* cc: !C */
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_CF, 0, label);
break;
case 4: /* mi: N */
tcg_gen_brcondi_i32(TCG_COND_LT, cpu_NF, 0, label);
break;
case 5: /* pl: !N */
tcg_gen_brcondi_i32(TCG_COND_GE, cpu_NF, 0, label);
break;
case 6: /* vs: V */
tcg_gen_brcondi_i32(TCG_COND_LT, cpu_VF, 0, label);
break;
case 7: /* vc: !V */
tcg_gen_brcondi_i32(TCG_COND_GE, cpu_VF, 0, label);
break;
case 8: /* hi: C && !Z */
inv = gen_new_label();
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_CF, 0, inv);
tcg_gen_brcondi_i32(TCG_COND_NE, cpu_ZF, 0, label);
gen_set_label(inv);
break;
case 9: /* ls: !C || Z */
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_CF, 0, label);
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_ZF, 0, label);
break;
case 10: /* ge: N == V -> N ^ V == 0 */
tmp = tcg_temp_new_i32();
tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF);
tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
tcg_temp_free_i32(tmp);
break;
case 11: /* lt: N != V -> N ^ V != 0 */
tmp = tcg_temp_new_i32();
tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF);
tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
tcg_temp_free_i32(tmp);
break;
case 12: /* gt: !Z && N == V */
inv = gen_new_label();
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_ZF, 0, inv);
tmp = tcg_temp_new_i32();
tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF);
tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
tcg_temp_free_i32(tmp);
gen_set_label(inv);
break;
case 13: /* le: Z || N != V */
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_ZF, 0, label);
tmp = tcg_temp_new_i32();
tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF);
tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
tcg_temp_free_i32(tmp);
break;
default:
fprintf(stderr, "Bad condition code 0x%x\n", cc);
abort();
}
}
| false | qemu | 42a268c241183877192c376d03bd9b6d527407c7 |
5,576 | void ide_init_drive(IDEState *s, DriveInfo *dinfo, const char *version)
{
int cylinders, heads, secs;
uint64_t nb_sectors;
if (dinfo && dinfo->bdrv) {
s->bs = dinfo->bdrv;
bdrv_get_geometry(s->bs, &nb_sectors);
bdrv_guess_geometry(s->bs, &cylinders, &heads, &secs);
s->cylinders = cylinders;
s->heads = heads;
s->sectors = secs;
s->nb_sectors = nb_sectors;
/* The SMART values should be preserved across power cycles
but they aren't. */
s->smart_enabled = 1;
s->smart_autosave = 1;
s->smart_errors = 0;
s->smart_selftest_count = 0;
if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
s->is_cdrom = 1;
bdrv_set_change_cb(s->bs, cdrom_change_cb, s);
}
strncpy(s->drive_serial_str, drive_get_serial(s->bs),
sizeof(s->drive_serial_str));
}
if (strlen(s->drive_serial_str) == 0)
snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
"QM%05d", s->drive_serial);
if (version) {
pstrcpy(s->version, sizeof(s->version), version);
} else {
pstrcpy(s->version, sizeof(s->version), QEMU_VERSION);
}
ide_reset(s);
}
| false | qemu | 870111c8ed95df62a101eae0acd08c84233a6341 |
5,577 | static void ppc_heathrow_init(QEMUMachineInitArgs *args)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_device;
MemoryRegion *sysmem = get_system_memory();
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;
char *filename;
qemu_irq *pic, **heathrow_irqs;
int linux_boot, i;
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1);
MemoryRegion *isa = g_new(MemoryRegion, 1);
uint32_t kernel_base, initrd_base, cmdline_base = 0;
int32_t kernel_size, initrd_size;
PCIBus *pci_bus;
PCIDevice *macio;
MACIOIDEState *macio_ide;
DeviceState *dev;
BusState *adb_bus;
int bios_size;
MemoryRegion *pic_mem;
MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1);
uint16_t ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
linux_boot = (kernel_filename != NULL);
/* init CPUs */
if (cpu_model == NULL)
cpu_model = "G3";
for (i = 0; i < smp_cpus; i++) {
cpu = cpu_ppc_init(cpu_model);
if (cpu == NULL) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
env = &cpu->env;
/* Set time-base frequency to 16.6 Mhz */
cpu_ppc_tb_init(env, TBFREQ);
qemu_register_reset(ppc_heathrow_reset, cpu);
}
/* allocate RAM */
if (ram_size > (2047 << 20)) {
fprintf(stderr,
"qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
memory_region_init_ram(ram, NULL, "ppc_heathrow.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(sysmem, PROM_ADDR, bios);
/* Load OpenBIOS (ELF) */
if (filename) {
bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
1, ELF_MACHINE, 0);
g_free(filename);
} else {
bios_size = -1;
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
exit(1);
}
if (linux_boot) {
uint64_t lowaddr = 0;
int bswap_needed;
#ifdef BSWAP_NEEDED
bswap_needed = 1;
#else
bswap_needed = 0;
#endif
kernel_base = KERNEL_LOAD_ADDR;
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, kernel_base,
ram_size - kernel_base, bswap_needed,
TARGET_PAGE_SIZE);
if (kernel_size < 0)
kernel_size = load_image_targphys(kernel_filename,
kernel_base,
ram_size - kernel_base);
if (kernel_size < 0) {
hw_error("qemu: could not load kernel '%s'\n",
kernel_filename);
exit(1);
}
/* load initrd */
if (initrd_filename) {
initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
hw_error("qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
cmdline_base = round_page(initrd_base + initrd_size);
} else {
initrd_base = 0;
initrd_size = 0;
cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
}
ppc_boot_device = 'm';
} else {
kernel_base = 0;
kernel_size = 0;
initrd_base = 0;
initrd_size = 0;
ppc_boot_device = '\0';
for (i = 0; boot_device[i] != '\0'; i++) {
/* TOFIX: for now, the second IDE channel is not properly
* used by OHW. The Mac floppy disk are not emulated.
* For now, OHW cannot boot from the network.
*/
#if 0
if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
ppc_boot_device = boot_device[i];
break;
}
#else
if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
ppc_boot_device = boot_device[i];
break;
}
#endif
}
if (ppc_boot_device == '\0') {
fprintf(stderr, "No valid boot device for G3 Beige machine\n");
exit(1);
}
}
/* Register 2 MB of ISA IO space */
memory_region_init_alias(isa, NULL, "isa_mmio",
get_system_io(), 0, 0x00200000);
memory_region_add_subregion(sysmem, 0xfe000000, isa);
/* XXX: we register only 1 output pin for heathrow PIC */
heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
heathrow_irqs[0] =
g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
/* Connect the heathrow PIC outputs to the 6xx bus */
for (i = 0; i < smp_cpus; i++) {
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
heathrow_irqs[i][0] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
break;
default:
hw_error("Bus model not supported on OldWorld Mac machine\n");
}
}
/* init basic PC hardware */
if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
hw_error("Only 6xx bus is supported on heathrow machine\n");
}
pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
pci_bus = pci_grackle_init(0xfec00000, pic,
get_system_memory(),
get_system_io());
pci_vga_init(pci_bus);
escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 4);
memory_region_init_alias(escc_bar, NULL, "escc-bar",
escc_mem, 0, memory_region_size(escc_mem));
for(i = 0; i < nb_nics; i++)
pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
ide_drive_get(hd, MAX_IDE_BUS);
macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
dev = DEVICE(macio);
qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */
qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE-0 */
qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE-0 DMA */
qdev_connect_gpio_out(dev, 3, pic[0x0E]); /* IDE-1 */
qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE-1 DMA */
macio_init(macio, pic_mem, escc_bar);
macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
"ide[0]"));
macio_ide_init_drives(macio_ide, hd);
macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
"ide[1]"));
macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
adb_bus = qdev_get_child_bus(dev, "adb.0");
dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
qdev_init_nofail(dev);
dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
qdev_init_nofail(dev);
if (usb_enabled(false)) {
pci_create_simple(pci_bus, -1, "pci-ohci");
}
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
graphic_depth = 15;
/* No PCI init: the BIOS will do it */
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
if (kvm_enabled()) {
#ifdef CONFIG_KVM
uint8_t *hypercall;
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
hypercall = g_malloc(16);
kvmppc_get_hypercall(env, hypercall, 16);
fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
#endif
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, TBFREQ);
}
/* Mac OS X requires a "known good" clock-frequency value; pass it one. */
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, 266000000);
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
| false | qemu | c16547326988cc321c9bff43ed91cbe753e52892 |
5,578 | static void synthfilt_build_sb_samples(QDM2Context *q, GetBitContext *gb,
int length, int sb_min, int sb_max)
{
int sb, j, k, n, ch, run, channels;
int joined_stereo, zero_encoding, chs;
int type34_first;
float type34_div = 0;
float type34_predictor;
float samples[10], sign_bits[16];
if (length == 0) {
// If no data use noise
for (sb=sb_min; sb < sb_max; sb++)
build_sb_samples_from_noise (q, sb);
return;
}
for (sb = sb_min; sb < sb_max; sb++) {
FIX_NOISE_IDX(q->noise_idx);
channels = q->nb_channels;
if (q->nb_channels <= 1 || sb < 12)
joined_stereo = 0;
else if (sb >= 24)
joined_stereo = 1;
else
joined_stereo = (get_bits_left(gb) >= 1) ? get_bits1 (gb) : 0;
if (joined_stereo) {
if (get_bits_left(gb) >= 16)
for (j = 0; j < 16; j++)
sign_bits[j] = get_bits1 (gb);
for (j = 0; j < 64; j++)
if (q->coding_method[1][sb][j] > q->coding_method[0][sb][j])
q->coding_method[0][sb][j] = q->coding_method[1][sb][j];
fix_coding_method_array(sb, q->nb_channels, q->coding_method);
channels = 1;
}
for (ch = 0; ch < channels; ch++) {
zero_encoding = (get_bits_left(gb) >= 1) ? get_bits1(gb) : 0;
type34_predictor = 0.0;
type34_first = 1;
for (j = 0; j < 128; ) {
switch (q->coding_method[ch][sb][j / 2]) {
case 8:
if (get_bits_left(gb) >= 10) {
if (zero_encoding) {
for (k = 0; k < 5; k++) {
if ((j + 2 * k) >= 128)
break;
samples[2 * k] = get_bits1(gb) ? dequant_1bit[joined_stereo][2 * get_bits1(gb)] : 0;
}
} else {
n = get_bits(gb, 8);
for (k = 0; k < 5; k++)
samples[2 * k] = dequant_1bit[joined_stereo][random_dequant_index[n][k]];
}
for (k = 0; k < 5; k++)
samples[2 * k + 1] = SB_DITHERING_NOISE(sb,q->noise_idx);
} else {
for (k = 0; k < 10; k++)
samples[k] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 10;
break;
case 10:
if (get_bits_left(gb) >= 1) {
float f = 0.81;
if (get_bits1(gb))
f = -f;
f -= noise_samples[((sb + 1) * (j +5 * ch + 1)) & 127] * 9.0 / 40.0;
samples[0] = f;
} else {
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 1;
break;
case 16:
if (get_bits_left(gb) >= 10) {
if (zero_encoding) {
for (k = 0; k < 5; k++) {
if ((j + k) >= 128)
break;
samples[k] = (get_bits1(gb) == 0) ? 0 : dequant_1bit[joined_stereo][2 * get_bits1(gb)];
}
} else {
n = get_bits (gb, 8);
for (k = 0; k < 5; k++)
samples[k] = dequant_1bit[joined_stereo][random_dequant_index[n][k]];
}
} else {
for (k = 0; k < 5; k++)
samples[k] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 5;
break;
case 24:
if (get_bits_left(gb) >= 7) {
n = get_bits(gb, 7);
for (k = 0; k < 3; k++)
samples[k] = (random_dequant_type24[n][k] - 2.0) * 0.5;
} else {
for (k = 0; k < 3; k++)
samples[k] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 3;
break;
case 30:
if (get_bits_left(gb) >= 4) {
unsigned index = qdm2_get_vlc(gb, &vlc_tab_type30, 0, 1);
if (index < FF_ARRAY_ELEMS(type30_dequant)) {
samples[0] = type30_dequant[index];
} else
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
} else
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
run = 1;
break;
case 34:
if (get_bits_left(gb) >= 7) {
if (type34_first) {
type34_div = (float)(1 << get_bits(gb, 2));
samples[0] = ((float)get_bits(gb, 5) - 16.0) / 15.0;
type34_predictor = samples[0];
type34_first = 0;
} else {
unsigned index = qdm2_get_vlc(gb, &vlc_tab_type34, 0, 1);
if (index < FF_ARRAY_ELEMS(type34_delta)) {
samples[0] = type34_delta[index] / type34_div + type34_predictor;
type34_predictor = samples[0];
} else
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
} else {
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 1;
break;
default:
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
run = 1;
break;
}
if (joined_stereo) {
float tmp[10][MPA_MAX_CHANNELS];
for (k = 0; k < run; k++) {
tmp[k][0] = samples[k];
tmp[k][1] = (sign_bits[(j + k) / 8]) ? -samples[k] : samples[k];
}
for (chs = 0; chs < q->nb_channels; chs++)
for (k = 0; k < run; k++)
if ((j + k) < 128)
q->sb_samples[chs][j + k][sb] = q->tone_level[chs][sb][((j + k)/2)] * tmp[k][chs];
} else {
for (k = 0; k < run; k++)
if ((j + k) < 128)
q->sb_samples[ch][j + k][sb] = q->tone_level[ch][sb][(j + k)/2] * samples[k];
}
j += run;
} // j loop
} // channel loop
} // subband loop
}
| false | FFmpeg | 744a11c996641888d477a3981d609e79eeb69ea9 |
5,579 | void usb_desc_create_serial(USBDevice *dev)
{
DeviceState *hcd = dev->qdev.parent_bus->parent;
const USBDesc *desc = usb_device_get_usb_desc(dev);
int index = desc->id.iSerialNumber;
char serial[64];
char *path;
int dst;
if (dev->serial) {
/* 'serial' usb bus property has priority if present */
usb_desc_set_string(dev, index, dev->serial);
return;
}
assert(index != 0 && desc->str[index] != NULL);
dst = snprintf(serial, sizeof(serial), "%s", desc->str[index]);
path = qdev_get_dev_path(hcd);
if (path) {
dst += snprintf(serial+dst, sizeof(serial)-dst, "-%s", path);
}
dst += snprintf(serial+dst, sizeof(serial)-dst, "-%s", dev->port->path);
usb_desc_set_string(dev, index, serial);
g_free(path);
}
| false | qemu | 0136464d10f1fd9393a8125f2c552ef24f3e592c |
5,580 | static void xics_kvm_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
{
CPUState *cs;
ICPState *ss;
KVMXICSState *xicskvm = XICS_SPAPR_KVM(xics);
cs = CPU(cpu);
ss = &xics->ss[cs->cpu_index];
assert(cs->cpu_index < xics->nr_servers);
if (xicskvm->kernel_xics_fd == -1) {
abort();
}
/*
* If we are reusing a parked vCPU fd corresponding to the CPU
* which was hot-removed earlier we don't have to renable
* KVM_CAP_IRQ_XICS capability again.
*/
if (ss->cap_irq_xics_enabled) {
return;
}
if (xicskvm->kernel_xics_fd != -1) {
int ret;
ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
xicskvm->kernel_xics_fd,
kvm_arch_vcpu_id(cs));
if (ret < 0) {
error_report("Unable to connect CPU%ld to kernel XICS: %s",
kvm_arch_vcpu_id(cs), strerror(errno));
exit(1);
}
ss->cap_irq_xics_enabled = true;
}
}
| false | qemu | 1b1746a4368c960652ca7e4a36aea8a65fa9f319 |
5,583 | static inline void tcg_out_ldst(TCGContext *s, int ret, int addr,
int offset, int op)
{
if (check_fit_tl(offset, 13)) {
tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
INSN_IMM13(offset));
} else {
tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, offset);
tcg_out_ldst_rr(s, ret, addr, TCG_REG_T1, op);
}
}
| false | qemu | 425532d71d5d295cc9c649500e4969ac621ce51d |
5,584 | void smbios_entry_add(QemuOpts *opts)
{
Error *local_err = NULL;
const char *val;
assert(!smbios_immutable);
val = qemu_opt_get(opts, "file");
if (val) {
struct smbios_structure_header *header;
struct smbios_table *table;
int size;
qemu_opts_validate(opts, qemu_smbios_file_opts, &local_err);
if (local_err) {
error_report("%s", error_get_pretty(local_err));
exit(1);
}
size = get_image_size(val);
if (size == -1 || size < sizeof(struct smbios_structure_header)) {
error_report("Cannot read SMBIOS file %s", val);
exit(1);
}
if (!smbios_entries) {
smbios_entries_len = sizeof(uint16_t);
smbios_entries = g_malloc0(smbios_entries_len);
}
smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
sizeof(*table) + size);
table = (struct smbios_table *)(smbios_entries + smbios_entries_len);
table->header.type = SMBIOS_TABLE_ENTRY;
table->header.length = cpu_to_le16(sizeof(*table) + size);
if (load_image(val, table->data) != size) {
error_report("Failed to load SMBIOS file %s", val);
exit(1);
}
header = (struct smbios_structure_header *)(table->data);
if (test_bit(header->type, have_fields_bitmap)) {
error_report("can't load type %d struct, fields already specified!",
header->type);
exit(1);
}
set_bit(header->type, have_binfile_bitmap);
if (header->type == 4) {
smbios_type4_count++;
}
smbios_entries_len += sizeof(*table) + size;
(*(uint16_t *)smbios_entries) =
cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
return;
}
val = qemu_opt_get(opts, "type");
if (val) {
unsigned long type = strtoul(val, NULL, 0);
if (type > SMBIOS_MAX_TYPE) {
error_report("out of range!");
exit(1);
}
if (test_bit(type, have_binfile_bitmap)) {
error_report("can't add fields, binary file already loaded!");
exit(1);
}
set_bit(type, have_fields_bitmap);
switch (type) {
case 0:
qemu_opts_validate(opts, qemu_smbios_type0_opts, &local_err);
if (local_err) {
error_report("%s", error_get_pretty(local_err));
exit(1);
}
save_opt(&type0.vendor, opts, "vendor");
save_opt(&type0.version, opts, "version");
save_opt(&type0.date, opts, "date");
val = qemu_opt_get(opts, "release");
if (val) {
if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) {
error_report("Invalid release");
exit(1);
}
type0.have_major_minor = true;
}
return;
case 1:
qemu_opts_validate(opts, qemu_smbios_type1_opts, &local_err);
if (local_err) {
error_report("%s", error_get_pretty(local_err));
exit(1);
}
save_opt(&type1.manufacturer, opts, "manufacturer");
save_opt(&type1.product, opts, "product");
save_opt(&type1.version, opts, "version");
save_opt(&type1.serial, opts, "serial");
save_opt(&type1.sku, opts, "sku");
save_opt(&type1.family, opts, "family");
val = qemu_opt_get(opts, "uuid");
if (val) {
if (qemu_uuid_parse(val, qemu_uuid) != 0) {
error_report("Invalid UUID");
exit(1);
}
qemu_uuid_set = true;
}
return;
default:
error_report("Don't know how to build fields for SMBIOS type %ld",
type);
exit(1);
}
}
error_report("Must specify type= or file=");
exit(1);
}
| false | qemu | c97294ec1b9e36887e119589d456557d72ab37b5 |
5,585 | static void guest_fsfreeze_cleanup(void)
{
int64_t ret;
Error *err = NULL;
if (guest_fsfreeze_state.status == GUEST_FSFREEZE_STATUS_FROZEN) {
ret = qmp_guest_fsfreeze_thaw(&err);
if (ret < 0 || err) {
slog("failed to clean up frozen filesystems");
}
}
}
| false | qemu | f22d85e9e67262db34504f4079745f9843da6a92 |
5,586 | static int qesd_init_in (HWVoiceIn *hw, audsettings_t *as)
{
ESDVoiceIn *esd = (ESDVoiceIn *) hw;
audsettings_t obt_as = *as;
int esdfmt = ESD_STREAM | ESD_RECORD;
int err;
sigset_t set, old_set;
sigfillset (&set);
esdfmt |= (as->nchannels == 2) ? ESD_STEREO : ESD_MONO;
switch (as->fmt) {
case AUD_FMT_S8:
case AUD_FMT_U8:
esdfmt |= ESD_BITS8;
obt_as.fmt = AUD_FMT_U8;
break;
case AUD_FMT_S16:
case AUD_FMT_U16:
esdfmt |= ESD_BITS16;
obt_as.fmt = AUD_FMT_S16;
break;
case AUD_FMT_S32:
case AUD_FMT_U32:
dolog ("Will use 16 instead of 32 bit samples\n");
esdfmt |= ESD_BITS16;
obt_as.fmt = AUD_FMT_S16;
break;
}
obt_as.endianness = AUDIO_HOST_ENDIANNESS;
audio_pcm_init_info (&hw->info, &obt_as);
hw->samples = conf.samples;
esd->pcm_buf = audio_calloc (AUDIO_FUNC, hw->samples, 1 << hw->info.shift);
if (!esd->pcm_buf) {
dolog ("Could not allocate buffer (%d bytes)\n",
hw->samples << hw->info.shift);
return -1;
}
esd->fd = -1;
err = pthread_sigmask (SIG_BLOCK, &set, &old_set);
if (err) {
qesd_logerr (err, "pthread_sigmask failed\n");
goto fail1;
}
esd->fd = esd_record_stream (esdfmt, as->freq, conf.adc_host, NULL);
if (esd->fd < 0) {
qesd_logerr (errno, "esd_record_stream failed\n");
goto fail2;
}
if (audio_pt_init (&esd->pt, qesd_thread_in, esd, AUDIO_CAP, AUDIO_FUNC)) {
goto fail3;
}
err = pthread_sigmask (SIG_SETMASK, &old_set, NULL);
if (err) {
qesd_logerr (err, "pthread_sigmask(restore) failed\n");
}
return 0;
fail3:
if (close (esd->fd)) {
qesd_logerr (errno, "%s: close on esd socket(%d) failed\n",
AUDIO_FUNC, esd->fd);
}
esd->fd = -1;
fail2:
err = pthread_sigmask (SIG_SETMASK, &old_set, NULL);
if (err) {
qesd_logerr (err, "pthread_sigmask(restore) failed\n");
}
fail1:
qemu_free (esd->pcm_buf);
esd->pcm_buf = NULL;
return -1;
}
| false | qemu | 1ea879e5580f63414693655fcf0328559cdce138 |
5,588 | static int latm_write_packet(AVFormatContext *s, AVPacket *pkt)
{
LATMContext *ctx = s->priv_data;
AVIOContext *pb = s->pb;
PutBitContext bs;
int i, len;
uint8_t loas_header[] = "\x56\xe0\x00";
if (s->streams[0]->codecpar->codec_id == AV_CODEC_ID_AAC_LATM)
return ff_raw_write_packet(s, pkt);
if (!s->streams[0]->codecpar->extradata) {
if(pkt->size > 2 && pkt->data[0] == 0x56 && (pkt->data[1] >> 4) == 0xe &&
(AV_RB16(pkt->data + 1) & 0x1FFF) + 3 == pkt->size)
return ff_raw_write_packet(s, pkt);
else
return AVERROR_INVALIDDATA;
}
if (pkt->size > 0x1fff)
goto too_large;
init_put_bits(&bs, ctx->buffer, pkt->size+1024+MAX_EXTRADATA_SIZE);
latm_write_frame_header(s, &bs);
/* PayloadLengthInfo() */
for (i = 0; i <= pkt->size-255; i+=255)
put_bits(&bs, 8, 255);
put_bits(&bs, 8, pkt->size-i);
/* The LATM payload is written unaligned */
/* PayloadMux() */
if (pkt->size && (pkt->data[0] & 0xe1) == 0x81) {
// Convert byte-aligned DSE to non-aligned.
// Due to the input format encoding we know that
// it is naturally byte-aligned in the input stream,
// so there are no padding bits to account for.
// To avoid having to add padding bits and rearrange
// the whole stream we just remove the byte-align flag.
// This allows us to remux our FATE AAC samples into latm
// files that are still playable with minimal effort.
put_bits(&bs, 8, pkt->data[0] & 0xfe);
avpriv_copy_bits(&bs, pkt->data + 1, 8*pkt->size - 8);
} else
avpriv_copy_bits(&bs, pkt->data, 8*pkt->size);
avpriv_align_put_bits(&bs);
flush_put_bits(&bs);
len = put_bits_count(&bs) >> 3;
if (len > 0x1fff)
goto too_large;
loas_header[1] |= (len >> 8) & 0x1f;
loas_header[2] |= len & 0xff;
avio_write(pb, loas_header, 3);
avio_write(pb, ctx->buffer, len);
return 0;
too_large:
av_log(s, AV_LOG_ERROR, "LATM packet size larger than maximum size 0x1fff\n");
return AVERROR_INVALIDDATA;
}
| false | FFmpeg | 8b3ec51de8a04f4442297f2f835e925cab7b0597 |
5,589 | static void end_ebml_master_crc32(AVIOContext *pb, AVIOContext **dyn_cp, MatroskaMuxContext *mkv,
ebml_master master)
{
uint8_t *buf, crc[4];
int size;
if (pb->seekable) {
size = avio_close_dyn_buf(*dyn_cp, &buf);
if (mkv->write_crc && mkv->mode != MODE_WEBM) {
AV_WL32(crc, av_crc(av_crc_get_table(AV_CRC_32_IEEE_LE), UINT32_MAX, buf, size) ^ UINT32_MAX);
put_ebml_binary(pb, EBML_ID_CRC32, crc, sizeof(crc));
}
avio_write(pb, buf, size);
end_ebml_master(pb, master);
} else {
end_ebml_master(*dyn_cp, master);
size = avio_close_dyn_buf(*dyn_cp, &buf);
avio_write(pb, buf, size);
}
av_free(buf);
*dyn_cp = NULL;
}
| false | FFmpeg | eabbc64728c2fdb74f565aededec2ab023d20699 |
5,590 | void ff_h264_direct_ref_list_init(const H264Context *const h, H264SliceContext *sl)
{
H264Ref *const ref1 = &sl->ref_list[1][0];
H264Picture *const cur = h->cur_pic_ptr;
int list, j, field;
int sidx = (h->picture_structure & 1) ^ 1;
int ref1sidx = (ref1->reference & 1) ^ 1;
for (list = 0; list < sl->list_count; list++) {
cur->ref_count[sidx][list] = sl->ref_count[list];
for (j = 0; j < sl->ref_count[list]; j++)
cur->ref_poc[sidx][list][j] = 4 * sl->ref_list[list][j].parent->frame_num +
(sl->ref_list[list][j].reference & 3);
}
if (h->picture_structure == PICT_FRAME) {
memcpy(cur->ref_count[1], cur->ref_count[0], sizeof(cur->ref_count[0]));
memcpy(cur->ref_poc[1], cur->ref_poc[0], sizeof(cur->ref_poc[0]));
}
cur->mbaff = FRAME_MBAFF(h);
sl->col_fieldoff = 0;
if (sl->list_count != 2 || !sl->ref_count[1])
return;
if (h->picture_structure == PICT_FRAME) {
int cur_poc = h->cur_pic_ptr->poc;
int *col_poc = sl->ref_list[1][0].parent->field_poc;
if (col_poc[0] == INT_MAX && col_poc[1] == INT_MAX) {
av_log(h->avctx, AV_LOG_ERROR, "co located POCs unavailable\n");
sl->col_parity = 1;
} else
sl->col_parity = (FFABS(col_poc[0] - cur_poc) >=
FFABS(col_poc[1] - cur_poc));
ref1sidx =
sidx = sl->col_parity;
// FL -> FL & differ parity
} else if (!(h->picture_structure & sl->ref_list[1][0].reference) &&
!sl->ref_list[1][0].parent->mbaff) {
sl->col_fieldoff = 2 * sl->ref_list[1][0].reference - 3;
}
if (sl->slice_type_nos != AV_PICTURE_TYPE_B || sl->direct_spatial_mv_pred)
return;
for (list = 0; list < 2; list++) {
fill_colmap(h, sl, sl->map_col_to_list0, list, sidx, ref1sidx, 0);
if (FRAME_MBAFF(h))
for (field = 0; field < 2; field++)
fill_colmap(h, sl, sl->map_col_to_list0_field[field], list, field,
field, 1);
}
}
| false | FFmpeg | 1ddc37051f11bd4bbadbcd17ea49b76a965d6a47 |
5,591 | static av_cold int xvid_encode_init(AVCodecContext *avctx)
{
int xerr, i;
int xvid_flags = avctx->flags;
struct xvid_context *x = avctx->priv_data;
uint16_t *intra, *inter;
int fd;
xvid_plugin_single_t single = { 0 };
struct xvid_ff_pass1 rc2pass1 = { 0 };
xvid_plugin_2pass2_t rc2pass2 = { 0 };
xvid_plugin_lumimasking_t masking_l = { 0 }; /* For lumi masking */
xvid_plugin_lumimasking_t masking_v = { 0 }; /* For variance AQ */
xvid_plugin_ssim_t ssim = { 0 };
xvid_gbl_init_t xvid_gbl_init = { 0 };
xvid_enc_create_t xvid_enc_create = { 0 };
xvid_enc_plugin_t plugins[7];
/* Bring in VOP flags from avconv command-line */
x->vop_flags = XVID_VOP_HALFPEL; /* Bare minimum quality */
if (xvid_flags & CODEC_FLAG_4MV)
x->vop_flags |= XVID_VOP_INTER4V; /* Level 3 */
if (avctx->trellis)
x->vop_flags |= XVID_VOP_TRELLISQUANT; /* Level 5 */
if (xvid_flags & CODEC_FLAG_AC_PRED)
x->vop_flags |= XVID_VOP_HQACPRED; /* Level 6 */
if (xvid_flags & CODEC_FLAG_GRAY)
x->vop_flags |= XVID_VOP_GREYSCALE;
/* Decide which ME quality setting to use */
x->me_flags = 0;
switch (avctx->me_method) {
case ME_FULL: /* Quality 6 */
x->me_flags |= XVID_ME_EXTSEARCH16 |
XVID_ME_EXTSEARCH8;
case ME_EPZS: /* Quality 4 */
x->me_flags |= XVID_ME_ADVANCEDDIAMOND8 |
XVID_ME_HALFPELREFINE8 |
XVID_ME_CHROMA_PVOP |
XVID_ME_CHROMA_BVOP;
case ME_LOG: /* Quality 2 */
case ME_PHODS:
case ME_X1:
x->me_flags |= XVID_ME_ADVANCEDDIAMOND16 |
XVID_ME_HALFPELREFINE16;
case ME_ZERO: /* Quality 0 */
default:
break;
}
/* Decide how we should decide blocks */
switch (avctx->mb_decision) {
case 2:
x->vop_flags |= XVID_VOP_MODEDECISION_RD;
x->me_flags |= XVID_ME_HALFPELREFINE8_RD |
XVID_ME_QUARTERPELREFINE8_RD |
XVID_ME_EXTSEARCH_RD |
XVID_ME_CHECKPREDICTION_RD;
case 1:
if (!(x->vop_flags & XVID_VOP_MODEDECISION_RD))
x->vop_flags |= XVID_VOP_FAST_MODEDECISION_RD;
x->me_flags |= XVID_ME_HALFPELREFINE16_RD |
XVID_ME_QUARTERPELREFINE16_RD;
default:
break;
}
/* Bring in VOL flags from avconv command-line */
#if FF_API_GMC
if (avctx->flags & CODEC_FLAG_GMC)
x->gmc = 1;
#endif
x->vol_flags = 0;
if (x->gmc) {
x->vol_flags |= XVID_VOL_GMC;
x->me_flags |= XVID_ME_GME_REFINE;
}
if (xvid_flags & CODEC_FLAG_QPEL) {
x->vol_flags |= XVID_VOL_QUARTERPEL;
x->me_flags |= XVID_ME_QUARTERPELREFINE16;
if (x->vop_flags & XVID_VOP_INTER4V)
x->me_flags |= XVID_ME_QUARTERPELREFINE8;
}
xvid_gbl_init.version = XVID_VERSION;
xvid_gbl_init.debug = 0;
xvid_gbl_init.cpu_flags = 0;
/* Initialize */
xvid_global(NULL, XVID_GBL_INIT, &xvid_gbl_init, NULL);
/* Create the encoder reference */
xvid_enc_create.version = XVID_VERSION;
/* Store the desired frame size */
xvid_enc_create.width =
x->xsize = avctx->width;
xvid_enc_create.height =
x->ysize = avctx->height;
/* Xvid can determine the proper profile to use */
/* xvid_enc_create.profile = XVID_PROFILE_S_L3; */
/* We don't use zones */
xvid_enc_create.zones = NULL;
xvid_enc_create.num_zones = 0;
xvid_enc_create.num_threads = avctx->thread_count;
xvid_enc_create.plugins = plugins;
xvid_enc_create.num_plugins = 0;
/* Initialize Buffers */
x->twopassbuffer = NULL;
x->old_twopassbuffer = NULL;
x->twopassfile = NULL;
if (xvid_flags & CODEC_FLAG_PASS1) {
rc2pass1.version = XVID_VERSION;
rc2pass1.context = x;
x->twopassbuffer = av_malloc(BUFFER_SIZE);
x->old_twopassbuffer = av_malloc(BUFFER_SIZE);
if (!x->twopassbuffer || !x->old_twopassbuffer) {
av_log(avctx, AV_LOG_ERROR,
"Xvid: Cannot allocate 2-pass log buffers\n");
return AVERROR(ENOMEM);
}
x->twopassbuffer[0] =
x->old_twopassbuffer[0] = 0;
plugins[xvid_enc_create.num_plugins].func = xvid_ff_2pass;
plugins[xvid_enc_create.num_plugins].param = &rc2pass1;
xvid_enc_create.num_plugins++;
} else if (xvid_flags & CODEC_FLAG_PASS2) {
rc2pass2.version = XVID_VERSION;
rc2pass2.bitrate = avctx->bit_rate;
fd = ff_tempfile("xvidff.", &x->twopassfile);
if (fd < 0) {
av_log(avctx, AV_LOG_ERROR, "Xvid: Cannot write 2-pass pipe\n");
return fd;
}
if (!avctx->stats_in) {
av_log(avctx, AV_LOG_ERROR,
"Xvid: No 2-pass information loaded for second pass\n");
return AVERROR_INVALIDDATA;
}
if (strlen(avctx->stats_in) >
write(fd, avctx->stats_in, strlen(avctx->stats_in))) {
close(fd);
av_log(avctx, AV_LOG_ERROR, "Xvid: Cannot write to 2-pass pipe\n");
return AVERROR(EIO);
}
close(fd);
rc2pass2.filename = x->twopassfile;
plugins[xvid_enc_create.num_plugins].func = xvid_plugin_2pass2;
plugins[xvid_enc_create.num_plugins].param = &rc2pass2;
xvid_enc_create.num_plugins++;
} else if (!(xvid_flags & CODEC_FLAG_QSCALE)) {
/* Single Pass Bitrate Control! */
single.version = XVID_VERSION;
single.bitrate = avctx->bit_rate;
plugins[xvid_enc_create.num_plugins].func = xvid_plugin_single;
plugins[xvid_enc_create.num_plugins].param = &single;
xvid_enc_create.num_plugins++;
}
if (avctx->lumi_masking != 0.0)
x->lumi_aq = 1;
if (x->lumi_aq && x->variance_aq) {
x->variance_aq = 0;
av_log(avctx, AV_LOG_WARNING,
"variance_aq is ignored when lumi_aq is set.\n");
}
/* Luminance Masking */
if (x->lumi_aq) {
masking_l.method = 0;
plugins[xvid_enc_create.num_plugins].func = xvid_plugin_lumimasking;
/* The old behavior is that when avctx->lumi_masking is specified,
* plugins[...].param = NULL. Trying to keep the old behavior here. */
plugins[xvid_enc_create.num_plugins].param =
avctx->lumi_masking ? NULL : &masking_l;
xvid_enc_create.num_plugins++;
}
/* Variance AQ */
if (x->variance_aq) {
masking_v.method = 1;
plugins[xvid_enc_create.num_plugins].func = xvid_plugin_lumimasking;
plugins[xvid_enc_create.num_plugins].param = &masking_v;
xvid_enc_create.num_plugins++;
}
/* SSIM */
if (x->ssim) {
plugins[xvid_enc_create.num_plugins].func = xvid_plugin_ssim;
ssim.b_printstat = x->ssim == 2;
ssim.acc = x->ssim_acc;
ssim.cpu_flags = xvid_gbl_init.cpu_flags;
ssim.b_visualize = 0;
plugins[xvid_enc_create.num_plugins].param = &ssim;
xvid_enc_create.num_plugins++;
}
/* Frame Rate and Key Frames */
xvid_correct_framerate(avctx);
xvid_enc_create.fincr = avctx->time_base.num;
xvid_enc_create.fbase = avctx->time_base.den;
if (avctx->gop_size > 0)
xvid_enc_create.max_key_interval = avctx->gop_size;
else
xvid_enc_create.max_key_interval = 240; /* Xvid's best default */
/* Quants */
if (xvid_flags & CODEC_FLAG_QSCALE)
x->qscale = 1;
else
x->qscale = 0;
xvid_enc_create.min_quant[0] = avctx->qmin;
xvid_enc_create.min_quant[1] = avctx->qmin;
xvid_enc_create.min_quant[2] = avctx->qmin;
xvid_enc_create.max_quant[0] = avctx->qmax;
xvid_enc_create.max_quant[1] = avctx->qmax;
xvid_enc_create.max_quant[2] = avctx->qmax;
/* Quant Matrices */
x->intra_matrix =
x->inter_matrix = NULL;
if (avctx->mpeg_quant)
x->vol_flags |= XVID_VOL_MPEGQUANT;
if ((avctx->intra_matrix || avctx->inter_matrix)) {
x->vol_flags |= XVID_VOL_MPEGQUANT;
if (avctx->intra_matrix) {
intra = avctx->intra_matrix;
x->intra_matrix = av_malloc(sizeof(unsigned char) * 64);
if (!x->intra_matrix)
return AVERROR(ENOMEM);
} else
intra = NULL;
if (avctx->inter_matrix) {
inter = avctx->inter_matrix;
x->inter_matrix = av_malloc(sizeof(unsigned char) * 64);
if (!x->inter_matrix)
return AVERROR(ENOMEM);
} else
inter = NULL;
for (i = 0; i < 64; i++) {
if (intra)
x->intra_matrix[i] = (unsigned char) intra[i];
if (inter)
x->inter_matrix[i] = (unsigned char) inter[i];
}
}
/* Misc Settings */
xvid_enc_create.frame_drop_ratio = 0;
xvid_enc_create.global = 0;
if (xvid_flags & CODEC_FLAG_CLOSED_GOP)
xvid_enc_create.global |= XVID_GLOBAL_CLOSED_GOP;
/* Determines which codec mode we are operating in */
avctx->extradata = NULL;
avctx->extradata_size = 0;
if (xvid_flags & CODEC_FLAG_GLOBAL_HEADER) {
/* In this case, we are claiming to be MPEG4 */
x->quicktime_format = 1;
avctx->codec_id = AV_CODEC_ID_MPEG4;
} else {
/* We are claiming to be Xvid */
x->quicktime_format = 0;
if (!avctx->codec_tag)
avctx->codec_tag = AV_RL32("xvid");
}
/* Bframes */
xvid_enc_create.max_bframes = avctx->max_b_frames;
xvid_enc_create.bquant_offset = 100 * avctx->b_quant_offset;
xvid_enc_create.bquant_ratio = 100 * avctx->b_quant_factor;
if (avctx->max_b_frames > 0 && !x->quicktime_format)
xvid_enc_create.global |= XVID_GLOBAL_PACKED;
/* Create encoder context */
xerr = xvid_encore(NULL, XVID_ENC_CREATE, &xvid_enc_create, NULL);
if (xerr) {
av_log(avctx, AV_LOG_ERROR, "Xvid: Could not create encoder reference\n");
return -1;
}
x->encoder_handle = xvid_enc_create.handle;
avctx->coded_frame = av_frame_alloc();
if (!avctx->coded_frame)
return AVERROR(ENOMEM);
return 0;
}
| false | FFmpeg | d6604b29ef544793479d7fb4e05ef6622bb3e534 |
5,592 | static inline void RENAME(yuv2packedX)(SwsContext *c, const int16_t *lumFilter, const int16_t **lumSrc, int lumFilterSize,
const int16_t *chrFilter, const int16_t **chrSrc, int chrFilterSize,
const int16_t **alpSrc, uint8_t *dest, long dstW, long dstY)
{
#if COMPILE_TEMPLATE_MMX
x86_reg dummy=0;
x86_reg dstW_reg = dstW;
if(!(c->flags & SWS_BITEXACT)) {
if (c->flags & SWS_ACCURATE_RND) {
switch(c->dstFormat) {
case PIX_FMT_RGB32:
if (CONFIG_SWSCALE_ALPHA && c->alpPixBuf) {
YSCALEYUV2PACKEDX_ACCURATE
YSCALEYUV2RGBX
"movq %%mm2, "U_TEMP"(%0) \n\t"
"movq %%mm4, "V_TEMP"(%0) \n\t"
"movq %%mm5, "Y_TEMP"(%0) \n\t"
YSCALEYUV2PACKEDX_ACCURATE_YA(ALP_MMX_FILTER_OFFSET)
"movq "Y_TEMP"(%0), %%mm5 \n\t"
"psraw $3, %%mm1 \n\t"
"psraw $3, %%mm7 \n\t"
"packuswb %%mm7, %%mm1 \n\t"
WRITEBGR32(%4, %5, %%REGa, %%mm3, %%mm4, %%mm5, %%mm1, %%mm0, %%mm7, %%mm2, %%mm6)
YSCALEYUV2PACKEDX_END
} else {
YSCALEYUV2PACKEDX_ACCURATE
YSCALEYUV2RGBX
"pcmpeqd %%mm7, %%mm7 \n\t"
WRITEBGR32(%4, %5, %%REGa, %%mm2, %%mm4, %%mm5, %%mm7, %%mm0, %%mm1, %%mm3, %%mm6)
YSCALEYUV2PACKEDX_END
}
return;
case PIX_FMT_BGR24:
YSCALEYUV2PACKEDX_ACCURATE
YSCALEYUV2RGBX
"pxor %%mm7, %%mm7 \n\t"
"lea (%%"REG_a", %%"REG_a", 2), %%"REG_c"\n\t" //FIXME optimize
"add %4, %%"REG_c" \n\t"
WRITEBGR24(%%REGc, %5, %%REGa)
:: "r" (&c->redDither),
"m" (dummy), "m" (dummy), "m" (dummy),
"r" (dest), "m" (dstW_reg)
: "%"REG_a, "%"REG_c, "%"REG_d, "%"REG_S
);
return;
case PIX_FMT_RGB555:
YSCALEYUV2PACKEDX_ACCURATE
YSCALEYUV2RGBX
"pxor %%mm7, %%mm7 \n\t"
/* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
#ifdef DITHER1XBPP
"paddusb "BLUE_DITHER"(%0), %%mm2\n\t"
"paddusb "GREEN_DITHER"(%0), %%mm4\n\t"
"paddusb "RED_DITHER"(%0), %%mm5\n\t"
#endif
WRITERGB15(%4, %5, %%REGa)
YSCALEYUV2PACKEDX_END
return;
case PIX_FMT_RGB565:
YSCALEYUV2PACKEDX_ACCURATE
YSCALEYUV2RGBX
"pxor %%mm7, %%mm7 \n\t"
/* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
#ifdef DITHER1XBPP
"paddusb "BLUE_DITHER"(%0), %%mm2\n\t"
"paddusb "GREEN_DITHER"(%0), %%mm4\n\t"
"paddusb "RED_DITHER"(%0), %%mm5\n\t"
#endif
WRITERGB16(%4, %5, %%REGa)
YSCALEYUV2PACKEDX_END
return;
case PIX_FMT_YUYV422:
YSCALEYUV2PACKEDX_ACCURATE
/* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
"psraw $3, %%mm3 \n\t"
"psraw $3, %%mm4 \n\t"
"psraw $3, %%mm1 \n\t"
"psraw $3, %%mm7 \n\t"
WRITEYUY2(%4, %5, %%REGa)
YSCALEYUV2PACKEDX_END
return;
}
} else {
switch(c->dstFormat) {
case PIX_FMT_RGB32:
if (CONFIG_SWSCALE_ALPHA && c->alpPixBuf) {
YSCALEYUV2PACKEDX
YSCALEYUV2RGBX
YSCALEYUV2PACKEDX_YA(ALP_MMX_FILTER_OFFSET, %%mm0, %%mm3, %%mm6, %%mm1, %%mm7)
"psraw $3, %%mm1 \n\t"
"psraw $3, %%mm7 \n\t"
"packuswb %%mm7, %%mm1 \n\t"
WRITEBGR32(%4, %5, %%REGa, %%mm2, %%mm4, %%mm5, %%mm1, %%mm0, %%mm7, %%mm3, %%mm6)
YSCALEYUV2PACKEDX_END
} else {
YSCALEYUV2PACKEDX
YSCALEYUV2RGBX
"pcmpeqd %%mm7, %%mm7 \n\t"
WRITEBGR32(%4, %5, %%REGa, %%mm2, %%mm4, %%mm5, %%mm7, %%mm0, %%mm1, %%mm3, %%mm6)
YSCALEYUV2PACKEDX_END
}
return;
case PIX_FMT_BGR24:
YSCALEYUV2PACKEDX
YSCALEYUV2RGBX
"pxor %%mm7, %%mm7 \n\t"
"lea (%%"REG_a", %%"REG_a", 2), %%"REG_c" \n\t" //FIXME optimize
"add %4, %%"REG_c" \n\t"
WRITEBGR24(%%REGc, %5, %%REGa)
:: "r" (&c->redDither),
"m" (dummy), "m" (dummy), "m" (dummy),
"r" (dest), "m" (dstW_reg)
: "%"REG_a, "%"REG_c, "%"REG_d, "%"REG_S
);
return;
case PIX_FMT_RGB555:
YSCALEYUV2PACKEDX
YSCALEYUV2RGBX
"pxor %%mm7, %%mm7 \n\t"
/* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
#ifdef DITHER1XBPP
"paddusb "BLUE_DITHER"(%0), %%mm2 \n\t"
"paddusb "GREEN_DITHER"(%0), %%mm4 \n\t"
"paddusb "RED_DITHER"(%0), %%mm5 \n\t"
#endif
WRITERGB15(%4, %5, %%REGa)
YSCALEYUV2PACKEDX_END
return;
case PIX_FMT_RGB565:
YSCALEYUV2PACKEDX
YSCALEYUV2RGBX
"pxor %%mm7, %%mm7 \n\t"
/* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
#ifdef DITHER1XBPP
"paddusb "BLUE_DITHER"(%0), %%mm2 \n\t"
"paddusb "GREEN_DITHER"(%0), %%mm4 \n\t"
"paddusb "RED_DITHER"(%0), %%mm5 \n\t"
#endif
WRITERGB16(%4, %5, %%REGa)
YSCALEYUV2PACKEDX_END
return;
case PIX_FMT_YUYV422:
YSCALEYUV2PACKEDX
/* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
"psraw $3, %%mm3 \n\t"
"psraw $3, %%mm4 \n\t"
"psraw $3, %%mm1 \n\t"
"psraw $3, %%mm7 \n\t"
WRITEYUY2(%4, %5, %%REGa)
YSCALEYUV2PACKEDX_END
return;
}
}
}
#endif /* COMPILE_TEMPLATE_MMX */
#if COMPILE_TEMPLATE_ALTIVEC
/* The following list of supported dstFormat values should
match what's found in the body of ff_yuv2packedX_altivec() */
if (!(c->flags & SWS_BITEXACT) && !c->alpPixBuf &&
(c->dstFormat==PIX_FMT_ABGR || c->dstFormat==PIX_FMT_BGRA ||
c->dstFormat==PIX_FMT_BGR24 || c->dstFormat==PIX_FMT_RGB24 ||
c->dstFormat==PIX_FMT_RGBA || c->dstFormat==PIX_FMT_ARGB))
ff_yuv2packedX_altivec(c, lumFilter, lumSrc, lumFilterSize,
chrFilter, chrSrc, chrFilterSize,
dest, dstW, dstY);
else
#endif
yuv2packedXinC(c, lumFilter, lumSrc, lumFilterSize,
chrFilter, chrSrc, chrFilterSize,
alpSrc, dest, dstW, dstY);
}
| false | FFmpeg | d1adad3cca407f493c3637e20ecd4f7124e69212 |
5,593 | static inline int media_present(IDEState *s)
{
return (s->nb_sectors > 0);
}
| true | qemu | a1aff5bf6786e6e8478373e4ada869a4ef2a7fc4 |
5,594 | static void do_audio_out(AVFormatContext *s,
AVOutputStream *ost,
AVInputStream *ist,
unsigned char *buf, int size)
{
uint8_t *buftmp;
static uint8_t *audio_buf = NULL;
static uint8_t *audio_out = NULL;
const int audio_out_size= 4*MAX_AUDIO_PACKET_SIZE;
int size_out, frame_bytes, ret;
AVCodecContext *enc= ost->st->codec;
AVCodecContext *dec= ist->st->codec;
/* SC: dynamic allocation of buffers */
if (!audio_buf)
audio_buf = av_malloc(2*MAX_AUDIO_PACKET_SIZE);
if (!audio_out)
audio_out = av_malloc(audio_out_size);
if (!audio_buf || !audio_out)
return; /* Should signal an error ! */
if (enc->channels != dec->channels)
ost->audio_resample = 1;
if (ost->audio_resample && !ost->resample) {
ost->resample = audio_resample_init(enc->channels, dec->channels,
enc->sample_rate, dec->sample_rate);
if (!ost->resample) {
fprintf(stderr, "Can not resample %d channels @ %d Hz to %d channels @ %d Hz\n",
dec->channels, dec->sample_rate,
enc->channels, enc->sample_rate);
av_exit(1);
}
}
if(audio_sync_method){
double delta = get_sync_ipts(ost) * enc->sample_rate - ost->sync_opts
- av_fifo_size(&ost->fifo)/(ost->st->codec->channels * 2);
double idelta= delta*ist->st->codec->sample_rate / enc->sample_rate;
int byte_delta= ((int)idelta)*2*ist->st->codec->channels;
//FIXME resample delay
if(fabs(delta) > 50){
if(ist->is_start || fabs(delta) > audio_drift_threshold*enc->sample_rate){
if(byte_delta < 0){
byte_delta= FFMAX(byte_delta, -size);
size += byte_delta;
buf -= byte_delta;
if(verbose > 2)
fprintf(stderr, "discarding %d audio samples\n", (int)-delta);
if(!size)
return;
ist->is_start=0;
}else{
static uint8_t *input_tmp= NULL;
input_tmp= av_realloc(input_tmp, byte_delta + size);
if(byte_delta + size <= MAX_AUDIO_PACKET_SIZE)
ist->is_start=0;
else
byte_delta= MAX_AUDIO_PACKET_SIZE - size;
memset(input_tmp, 0, byte_delta);
memcpy(input_tmp + byte_delta, buf, size);
buf= input_tmp;
size += byte_delta;
if(verbose > 2)
fprintf(stderr, "adding %d audio samples of silence\n", (int)delta);
}
}else if(audio_sync_method>1){
int comp= av_clip(delta, -audio_sync_method, audio_sync_method);
assert(ost->audio_resample);
if(verbose > 2)
fprintf(stderr, "compensating audio timestamp drift:%f compensation:%d in:%d\n", delta, comp, enc->sample_rate);
// fprintf(stderr, "drift:%f len:%d opts:%"PRId64" ipts:%"PRId64" fifo:%d\n", delta, -1, ost->sync_opts, (int64_t)(get_sync_ipts(ost) * enc->sample_rate), av_fifo_size(&ost->fifo)/(ost->st->codec->channels * 2));
av_resample_compensate(*(struct AVResampleContext**)ost->resample, comp, enc->sample_rate);
}
}
}else
ost->sync_opts= lrintf(get_sync_ipts(ost) * enc->sample_rate)
- av_fifo_size(&ost->fifo)/(ost->st->codec->channels * 2); //FIXME wrong
if (ost->audio_resample) {
buftmp = audio_buf;
size_out = audio_resample(ost->resample,
(short *)buftmp, (short *)buf,
size / (ist->st->codec->channels * 2));
size_out = size_out * enc->channels * 2;
} else {
buftmp = buf;
size_out = size;
}
/* now encode as many frames as possible */
if (enc->frame_size > 1) {
/* output resampled raw samples */
av_fifo_realloc(&ost->fifo, av_fifo_size(&ost->fifo) + size_out + 1);
av_fifo_write(&ost->fifo, buftmp, size_out);
frame_bytes = enc->frame_size * 2 * enc->channels;
while (av_fifo_read(&ost->fifo, audio_buf, frame_bytes) == 0) {
AVPacket pkt;
av_init_packet(&pkt);
//FIXME pass ost->sync_opts as AVFrame.pts in avcodec_encode_audio()
ret = avcodec_encode_audio(enc, audio_out, audio_out_size,
(short *)audio_buf);
audio_size += ret;
pkt.stream_index= ost->index;
pkt.data= audio_out;
pkt.size= ret;
if(enc->coded_frame && enc->coded_frame->pts != AV_NOPTS_VALUE)
pkt.pts= av_rescale_q(enc->coded_frame->pts, enc->time_base, ost->st->time_base);
pkt.flags |= PKT_FLAG_KEY;
write_frame(s, &pkt, ost->st->codec, bitstream_filters[ost->file_index][pkt.stream_index]);
ost->sync_opts += enc->frame_size;
}
} else {
AVPacket pkt;
av_init_packet(&pkt);
ost->sync_opts += size_out / (2 * enc->channels);
/* output a pcm frame */
/* XXX: change encoding codec API to avoid this ? */
switch(enc->codec->id) {
case CODEC_ID_PCM_S32LE:
case CODEC_ID_PCM_S32BE:
case CODEC_ID_PCM_U32LE:
case CODEC_ID_PCM_U32BE:
size_out = size_out << 1;
break;
case CODEC_ID_PCM_S24LE:
case CODEC_ID_PCM_S24BE:
case CODEC_ID_PCM_U24LE:
case CODEC_ID_PCM_U24BE:
case CODEC_ID_PCM_S24DAUD:
size_out = size_out / 2 * 3;
break;
case CODEC_ID_PCM_S16LE:
case CODEC_ID_PCM_S16BE:
case CODEC_ID_PCM_U16LE:
case CODEC_ID_PCM_U16BE:
break;
default:
size_out = size_out >> 1;
break;
}
//FIXME pass ost->sync_opts as AVFrame.pts in avcodec_encode_audio()
ret = avcodec_encode_audio(enc, audio_out, size_out,
(short *)buftmp);
audio_size += ret;
pkt.stream_index= ost->index;
pkt.data= audio_out;
pkt.size= ret;
if(enc->coded_frame && enc->coded_frame->pts != AV_NOPTS_VALUE)
pkt.pts= av_rescale_q(enc->coded_frame->pts, enc->time_base, ost->st->time_base);
pkt.flags |= PKT_FLAG_KEY;
write_frame(s, &pkt, ost->st->codec, bitstream_filters[ost->file_index][pkt.stream_index]);
}
}
| true | FFmpeg | 0871ae1a930122f7124358a0ce3caf81876913a9 |
5,595 | int qemu_thread_is_self(QemuThread *thread)
{
QemuThread *this_thread = TlsGetValue(qemu_thread_tls_index);
return this_thread->thread == thread->thread;
}
| true | qemu | 403e633126b7a781ecd48a29e3355770d46bbf1a |
5,597 | static void tcx_realizefn(DeviceState *dev, Error **errp)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
TCXState *s = TCX(dev);
ram_addr_t vram_offset = 0;
int size, ret;
uint8_t *vram_base;
char *fcode_filename;
memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
s->vram_size * (1 + 4 + 4), &error_abort);
vmstate_register_ram_global(&s->vram_mem);
memory_region_set_log(&s->vram_mem, true, DIRTY_MEMORY_VGA);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
/* 10/ROM : FCode ROM */
vmstate_register_ram_global(&s->rom);
fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE);
if (fcode_filename) {
ret = load_image_targphys(fcode_filename, s->prom_addr,
FCODE_MAX_ROM_SIZE);
g_free(fcode_filename);
if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
error_report("tcx: could not load prom '%s'", TCX_ROM_FILE);
}
}
/* 0/DFB8 : 8-bit plane */
s->vram = vram_base;
size = s->vram_size;
memory_region_init_alias(&s->vram_8bit, OBJECT(s), "tcx.vram.8bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(sbd, &s->vram_8bit);
vram_offset += size;
vram_base += size;
/* 1/DFB24 : 24bit plane */
size = s->vram_size * 4;
s->vram24 = (uint32_t *)vram_base;
s->vram24_offset = vram_offset;
memory_region_init_alias(&s->vram_24bit, OBJECT(s), "tcx.vram.24bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(sbd, &s->vram_24bit);
vram_offset += size;
vram_base += size;
/* 4/RDFB32 : Raw Framebuffer */
size = s->vram_size * 4;
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
memory_region_init_alias(&s->vram_cplane, OBJECT(s), "tcx.vram.cplane",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(sbd, &s->vram_cplane);
/* 9/THC24bits : NetBSD writes here even with 8-bit display: dummy */
if (s->depth == 8) {
memory_region_init_io(&s->thc24, OBJECT(s), &tcx_dummy_ops, s,
"tcx.thc24", TCX_THC_NREGS);
sysbus_init_mmio(sbd, &s->thc24);
}
sysbus_init_irq(sbd, &s->irq);
if (s->depth == 8) {
s->con = graphic_console_init(DEVICE(dev), 0, &tcx_ops, s);
} else {
s->con = graphic_console_init(DEVICE(dev), 0, &tcx24_ops, s);
}
s->thcmisc = 0;
qemu_console_resize(s->con, s->width, s->height);
}
| true | qemu | f8ed85ac992c48814d916d5df4d44f9a971c5de4 |
5,598 | static int mace3_decode_frame(AVCodecContext *avctx,
void *data, int *data_size,
const uint8_t *buf, int buf_size)
{
int16_t *samples = data;
MACEContext *ctx = avctx->priv_data;
int i, j, k;
for(i = 0; i < avctx->channels; i++) {
int16_t *output = samples + i;
for (j=0; j < buf_size / 2 / avctx->channels; j++)
for (k=0; k < 2; k++) {
uint8_t pkt = buf[i*2 + j*2*avctx->channels + k];
chomp3(&ctx->chd[i], output, pkt &7, MACEtab1, MACEtab2,
8, avctx->channels);
output += avctx->channels;
chomp3(&ctx->chd[i], output,(pkt >> 3) &3, MACEtab3, MACEtab4,
4, avctx->channels);
output += avctx->channels;
chomp3(&ctx->chd[i], output, pkt >> 5 , MACEtab1, MACEtab2,
8, avctx->channels);
output += avctx->channels;
}
}
*data_size = 2 * 3 * buf_size;
return buf_size;
}
| true | FFmpeg | f36aec3b5e18c4c167612d0051a6d5b6144b3552 |
5,599 | static void query_facilities(void)
{
struct sigaction sa_old, sa_new;
register int r0 __asm__("0");
register void *r1 __asm__("1");
int fail;
memset(&sa_new, 0, sizeof(sa_new));
sa_new.sa_handler = sigill_handler;
sigaction(SIGILL, &sa_new, &sa_old);
/* First, try STORE FACILITY LIST EXTENDED. If this is present, then
we need not do any more probing. Unfortunately, this itself is an
extension and the original STORE FACILITY LIST instruction is
kernel-only, storing its results at absolute address 200. */
/* stfle 0(%r1) */
r1 = &facilities;
asm volatile(".word 0xb2b0,0x1000"
: "=r"(r0) : "0"(0), "r"(r1) : "memory", "cc");
if (got_sigill) {
/* STORE FACILITY EXTENDED is not available. Probe for one of each
kind of instruction that we're interested in. */
/* ??? Possibly some of these are in practice never present unless
the store-facility-extended facility is also present. But since
that isn't documented it's just better to probe for each. */
/* Test for z/Architecture. Required even in 31-bit mode. */
got_sigill = 0;
/* agr %r0,%r0 */
asm volatile(".word 0xb908,0x0000" : "=r"(r0) : : "cc");
if (!got_sigill) {
facilities |= FACILITY_ZARCH_ACTIVE;
}
/* Test for long displacement. */
got_sigill = 0;
/* ly %r0,0(%r1) */
r1 = &facilities;
asm volatile(".word 0xe300,0x1000,0x0058"
: "=r"(r0) : "r"(r1) : "cc");
if (!got_sigill) {
facilities |= FACILITY_LONG_DISP;
}
/* Test for extended immediates. */
got_sigill = 0;
/* afi %r0,0 */
asm volatile(".word 0xc209,0x0000,0x0000" : : : "cc");
if (!got_sigill) {
facilities |= FACILITY_EXT_IMM;
}
/* Test for general-instructions-extension. */
got_sigill = 0;
/* msfi %r0,1 */
asm volatile(".word 0xc201,0x0000,0x0001");
if (!got_sigill) {
facilities |= FACILITY_GEN_INST_EXT;
}
}
sigaction(SIGILL, &sa_old, NULL);
/* The translator currently uses these extensions unconditionally.
Pruning this back to the base ESA/390 architecture doesn't seem
worthwhile, since even the KVM target requires z/Arch. */
fail = 0;
if ((facilities & FACILITY_ZARCH_ACTIVE) == 0) {
fprintf(stderr, "TCG: z/Arch facility is required.\n");
fprintf(stderr, "TCG: Boot with a 64-bit enabled kernel.\n");
fail = 1;
}
if ((facilities & FACILITY_LONG_DISP) == 0) {
fprintf(stderr, "TCG: long-displacement facility is required.\n");
fail = 1;
}
/* So far there's just enough support for 31-bit mode to let the
compile succeed. This is good enough to run QEMU with KVM. */
if (sizeof(void *) != 8) {
fprintf(stderr, "TCG: 31-bit mode is not supported.\n");
fail = 1;
}
if (fail) {
exit(-1);
}
}
| true | qemu | c9baa30f42a87f61627391698f63fa4d1566d9d8 |
5,600 | static int nut_read_header(AVFormatContext *s, AVFormatParameters *ap)
{
NUTContext *nut = s->priv_data;
ByteIOContext *bc = &s->pb;
int64_t pos;
int inited_stream_count;
nut->avf= s;
/* main header */
pos=0;
for(;;){
pos= find_startcode(bc, MAIN_STARTCODE, pos)+1;
if (pos<0){
av_log(s, AV_LOG_ERROR, "no main startcode found\n");
return -1;
}
if(decode_main_header(nut) >= 0)
break;
}
s->bit_rate = 0;
nut->stream = av_malloc(sizeof(StreamContext)*nut->stream_count);
/* stream headers */
pos=0;
for(inited_stream_count=0; inited_stream_count < nut->stream_count;){
pos= find_startcode(bc, STREAM_STARTCODE, pos)+1;
if (pos<0){
av_log(s, AV_LOG_ERROR, "not all stream headers found\n");
return -1;
}
if(decode_stream_header(nut) >= 0)
inited_stream_count++;
}
/* info headers */
pos=0;
for(;;){
uint64_t startcode= find_any_startcode(bc, pos);
pos= url_ftell(bc);
if(startcode==0){
av_log(s, AV_LOG_ERROR, "EOF before video frames\n");
return -1;
}else if(startcode == KEYFRAME_STARTCODE){
nut->next_startcode= startcode;
break;
}else if(startcode != INFO_STARTCODE){
continue;
}
decode_info_header(nut);
}
return 0;
}
| true | FFmpeg | 01bd1ed2db53fa90a0512d65ad6c08170061dfdf |
5,602 | int av_interleaved_write_frame(AVFormatContext *s, AVPacket *pkt)
{
int ret, flush = 0;
ret = check_packet(s, pkt);
if (ret < 0)
goto fail;
if (pkt) {
AVStream *st = s->streams[pkt->stream_index];
//FIXME/XXX/HACK drop zero sized packets
if (st->codec->codec_type == AVMEDIA_TYPE_AUDIO && pkt->size == 0) {
ret = 0;
goto fail;
}
av_dlog(s, "av_interleaved_write_frame size:%d dts:%" PRId64 " pts:%" PRId64 "\n",
pkt->size, pkt->dts, pkt->pts);
if ((ret = compute_pkt_fields2(s, st, pkt)) < 0 && !(s->oformat->flags & AVFMT_NOTIMESTAMPS))
goto fail;
if (pkt->dts == AV_NOPTS_VALUE && !(s->oformat->flags & AVFMT_NOTIMESTAMPS)) {
ret = AVERROR(EINVAL);
goto fail;
}
} else {
av_dlog(s, "av_interleaved_write_frame FLUSH\n");
flush = 1;
}
for (;; ) {
AVPacket opkt;
int ret = interleave_packet(s, &opkt, pkt, flush);
if (pkt) {
memset(pkt, 0, sizeof(*pkt));
av_init_packet(pkt);
pkt = NULL;
}
if (ret <= 0) //FIXME cleanup needed for ret<0 ?
return ret;
ret = write_packet(s, &opkt);
if (ret >= 0)
s->streams[opkt.stream_index]->nb_frames++;
av_free_packet(&opkt);
if (ret < 0)
return ret;
}
fail:
av_packet_unref(pkt);
return ret;
}
| false | FFmpeg | c9281a01b78cc3f09e36300a0ca3f5824d1c74cf |
5,603 | static av_noinline void FUNC(hl_decode_mb_444)(H264Context *h, H264SliceContext *sl)
{
const int mb_x = h->mb_x;
const int mb_y = h->mb_y;
const int mb_xy = h->mb_xy;
const int mb_type = h->cur_pic.mb_type[mb_xy];
uint8_t *dest[3];
int linesize;
int i, j, p;
int *block_offset = &h->block_offset[0];
const int transform_bypass = !SIMPLE && (sl->qscale == 0 && h->sps.transform_bypass);
const int plane_count = (SIMPLE || !CONFIG_GRAY || !(h->flags & CODEC_FLAG_GRAY)) ? 3 : 1;
for (p = 0; p < plane_count; p++) {
dest[p] = h->cur_pic.f.data[p] +
((mb_x << PIXEL_SHIFT) + mb_y * h->linesize) * 16;
h->vdsp.prefetch(dest[p] + (h->mb_x & 3) * 4 * h->linesize + (64 << PIXEL_SHIFT),
h->linesize, 4);
}
h->list_counts[mb_xy] = sl->list_count;
if (!SIMPLE && MB_FIELD(h)) {
linesize = sl->mb_linesize = sl->mb_uvlinesize = h->linesize * 2;
block_offset = &h->block_offset[48];
if (mb_y & 1) // FIXME move out of this function?
for (p = 0; p < 3; p++)
dest[p] -= h->linesize * 15;
if (FRAME_MBAFF(h)) {
int list;
for (list = 0; list < sl->list_count; list++) {
if (!USES_LIST(mb_type, list))
continue;
if (IS_16X16(mb_type)) {
int8_t *ref = &sl->ref_cache[list][scan8[0]];
fill_rectangle(ref, 4, 4, 8, (16 + *ref) ^ (h->mb_y & 1), 1);
} else {
for (i = 0; i < 16; i += 4) {
int ref = sl->ref_cache[list][scan8[i]];
if (ref >= 0)
fill_rectangle(&sl->ref_cache[list][scan8[i]], 2, 2,
8, (16 + ref) ^ (h->mb_y & 1), 1);
}
}
}
}
} else {
linesize = sl->mb_linesize = sl->mb_uvlinesize = h->linesize;
}
if (!SIMPLE && IS_INTRA_PCM(mb_type)) {
if (PIXEL_SHIFT) {
const int bit_depth = h->sps.bit_depth_luma;
GetBitContext gb;
init_get_bits(&gb, sl->intra_pcm_ptr, 768 * bit_depth);
for (p = 0; p < plane_count; p++)
for (i = 0; i < 16; i++) {
uint16_t *tmp = (uint16_t *)(dest[p] + i * linesize);
for (j = 0; j < 16; j++)
tmp[j] = get_bits(&gb, bit_depth);
}
} else {
for (p = 0; p < plane_count; p++)
for (i = 0; i < 16; i++)
memcpy(dest[p] + i * linesize,
sl->intra_pcm_ptr + p * 256 + i * 16, 16);
}
} else {
if (IS_INTRA(mb_type)) {
if (h->deblocking_filter)
xchg_mb_border(h, sl, dest[0], dest[1], dest[2], linesize,
linesize, 1, 1, SIMPLE, PIXEL_SHIFT);
for (p = 0; p < plane_count; p++)
hl_decode_mb_predict_luma(h, sl, mb_type, 1, SIMPLE,
transform_bypass, PIXEL_SHIFT,
block_offset, linesize, dest[p], p);
if (h->deblocking_filter)
xchg_mb_border(h, sl, dest[0], dest[1], dest[2], linesize,
linesize, 0, 1, SIMPLE, PIXEL_SHIFT);
} else {
FUNC(hl_motion_444)(h, sl, dest[0], dest[1], dest[2],
h->qpel_put, h->h264chroma.put_h264_chroma_pixels_tab,
h->qpel_avg, h->h264chroma.avg_h264_chroma_pixels_tab,
h->h264dsp.weight_h264_pixels_tab,
h->h264dsp.biweight_h264_pixels_tab);
}
for (p = 0; p < plane_count; p++)
hl_decode_mb_idct_luma(h, sl, mb_type, 1, SIMPLE, transform_bypass,
PIXEL_SHIFT, block_offset, linesize,
dest[p], p);
}
}
| false | FFmpeg | e6c90ce94f1b07f50cea2babf7471af455cca0ff |
5,604 | static int synthfilt_build_sb_samples(QDM2Context *q, GetBitContext *gb,
int length, int sb_min, int sb_max)
{
int sb, j, k, n, ch, run, channels;
int joined_stereo, zero_encoding;
int type34_first;
float type34_div = 0;
float type34_predictor;
float samples[10];
int sign_bits[16];
if (length == 0) {
// If no data use noise
for (sb=sb_min; sb < sb_max; sb++)
build_sb_samples_from_noise (q, sb);
return 0;
}
for (sb = sb_min; sb < sb_max; sb++) {
channels = q->nb_channels;
if (q->nb_channels <= 1 || sb < 12)
joined_stereo = 0;
else if (sb >= 24)
joined_stereo = 1;
else
joined_stereo = (get_bits_left(gb) >= 1) ? get_bits1 (gb) : 0;
if (joined_stereo) {
if (get_bits_left(gb) >= 16)
for (j = 0; j < 16; j++)
sign_bits[j] = get_bits1 (gb);
for (j = 0; j < 64; j++)
if (q->coding_method[1][sb][j] > q->coding_method[0][sb][j])
q->coding_method[0][sb][j] = q->coding_method[1][sb][j];
if (fix_coding_method_array(sb, q->nb_channels,
q->coding_method)) {
av_log(NULL, AV_LOG_ERROR, "coding method invalid\n");
build_sb_samples_from_noise(q, sb);
continue;
}
channels = 1;
}
for (ch = 0; ch < channels; ch++) {
FIX_NOISE_IDX(q->noise_idx);
zero_encoding = (get_bits_left(gb) >= 1) ? get_bits1(gb) : 0;
type34_predictor = 0.0;
type34_first = 1;
for (j = 0; j < 128; ) {
switch (q->coding_method[ch][sb][j / 2]) {
case 8:
if (get_bits_left(gb) >= 10) {
if (zero_encoding) {
for (k = 0; k < 5; k++) {
if ((j + 2 * k) >= 128)
break;
samples[2 * k] = get_bits1(gb) ? dequant_1bit[joined_stereo][2 * get_bits1(gb)] : 0;
}
} else {
n = get_bits(gb, 8);
if (n >= 243) {
av_log(NULL, AV_LOG_ERROR, "Invalid 8bit codeword\n");
return AVERROR_INVALIDDATA;
}
for (k = 0; k < 5; k++)
samples[2 * k] = dequant_1bit[joined_stereo][random_dequant_index[n][k]];
}
for (k = 0; k < 5; k++)
samples[2 * k + 1] = SB_DITHERING_NOISE(sb,q->noise_idx);
} else {
for (k = 0; k < 10; k++)
samples[k] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 10;
break;
case 10:
if (get_bits_left(gb) >= 1) {
float f = 0.81;
if (get_bits1(gb))
f = -f;
f -= noise_samples[((sb + 1) * (j +5 * ch + 1)) & 127] * 9.0 / 40.0;
samples[0] = f;
} else {
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 1;
break;
case 16:
if (get_bits_left(gb) >= 10) {
if (zero_encoding) {
for (k = 0; k < 5; k++) {
if ((j + k) >= 128)
break;
samples[k] = (get_bits1(gb) == 0) ? 0 : dequant_1bit[joined_stereo][2 * get_bits1(gb)];
}
} else {
n = get_bits (gb, 8);
if (n >= 243) {
av_log(NULL, AV_LOG_ERROR, "Invalid 8bit codeword\n");
return AVERROR_INVALIDDATA;
}
for (k = 0; k < 5; k++)
samples[k] = dequant_1bit[joined_stereo][random_dequant_index[n][k]];
}
} else {
for (k = 0; k < 5; k++)
samples[k] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 5;
break;
case 24:
if (get_bits_left(gb) >= 7) {
n = get_bits(gb, 7);
if (n >= 125) {
av_log(NULL, AV_LOG_ERROR, "Invalid 7bit codeword\n");
return AVERROR_INVALIDDATA;
}
for (k = 0; k < 3; k++)
samples[k] = (random_dequant_type24[n][k] - 2.0) * 0.5;
} else {
for (k = 0; k < 3; k++)
samples[k] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 3;
break;
case 30:
if (get_bits_left(gb) >= 4) {
unsigned index = qdm2_get_vlc(gb, &vlc_tab_type30, 0, 1);
if (index >= FF_ARRAY_ELEMS(type30_dequant)) {
av_log(NULL, AV_LOG_ERROR, "index %d out of type30_dequant array\n", index);
return AVERROR_INVALIDDATA;
}
samples[0] = type30_dequant[index];
} else
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
run = 1;
break;
case 34:
if (get_bits_left(gb) >= 7) {
if (type34_first) {
type34_div = (float)(1 << get_bits(gb, 2));
samples[0] = ((float)get_bits(gb, 5) - 16.0) / 15.0;
type34_predictor = samples[0];
type34_first = 0;
} else {
unsigned index = qdm2_get_vlc(gb, &vlc_tab_type34, 0, 1);
if (index >= FF_ARRAY_ELEMS(type34_delta)) {
av_log(NULL, AV_LOG_ERROR, "index %d out of type34_delta array\n", index);
return AVERROR_INVALIDDATA;
}
samples[0] = type34_delta[index] / type34_div + type34_predictor;
type34_predictor = samples[0];
}
} else {
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
}
run = 1;
break;
default:
samples[0] = SB_DITHERING_NOISE(sb,q->noise_idx);
run = 1;
break;
}
if (joined_stereo) {
for (k = 0; k < run && j + k < 128; k++) {
q->sb_samples[0][j + k][sb] =
q->tone_level[0][sb][(j + k) / 2] * samples[k];
if (q->nb_channels == 2) {
if (sign_bits[(j + k) / 8])
q->sb_samples[1][j + k][sb] =
q->tone_level[1][sb][(j + k) / 2] * -samples[k];
else
q->sb_samples[1][j + k][sb] =
q->tone_level[1][sb][(j + k) / 2] * samples[k];
}
}
} else {
for (k = 0; k < run; k++)
if ((j + k) < 128)
q->sb_samples[ch][j + k][sb] = q->tone_level[ch][sb][(j + k)/2] * samples[k];
}
j += run;
} // j loop
} // channel loop
} // subband loop
return 0;
}
| false | FFmpeg | 8f09957194b8d7a3ea909647e22eaf1389b6f5c4 |
5,605 | static IsoBcSection *find_iso_bc_entry(void)
{
IsoBcEntry *e = (IsoBcEntry *)sec;
uint32_t offset = find_iso_bc();
int i;
if (!offset) {
return NULL;
}
read_iso_sector(offset, sec, "Failed to read El Torito boot catalog");
if (!is_iso_bc_valid(e)) {
/* The validation entry is mandatory */
virtio_panic("No valid boot catalog found!\n");
return NULL;
}
/*
* Each entry has 32 bytes size, so one sector cannot contain > 64 entries.
* We consider only boot catalogs with no more than 64 entries.
*/
for (i = 1; i < ISO_BC_ENTRY_PER_SECTOR; i++) {
if (e[i].id == ISO_BC_BOOTABLE_SECTION) {
if (is_iso_bc_entry_compatible(&e[i].body.sect)) {
return &e[i].body.sect;
}
}
}
virtio_panic("No suitable boot entry found on ISO-9660 media!\n");
return NULL;
}
| true | qemu | c9262e8a84a29f22fbb5edde5d17f4f6166d5ae1 |
5,606 | static int ogg_new_stream(AVFormatContext *s, uint32_t serial, int new_avstream)
{
struct ogg *ogg = s->priv_data;
int idx = ogg->nstreams++;
AVStream *st;
struct ogg_stream *os;
ogg->streams = av_realloc (ogg->streams,
ogg->nstreams * sizeof (*ogg->streams));
memset (ogg->streams + idx, 0, sizeof (*ogg->streams));
os = ogg->streams + idx;
os->serial = serial;
os->bufsize = DECODER_BUFFER_SIZE;
os->buf = av_malloc(os->bufsize);
os->header = -1;
if (new_avstream) {
st = avformat_new_stream(s, NULL);
if (!st)
return AVERROR(ENOMEM);
st->id = idx;
avpriv_set_pts_info(st, 64, 1, 1000000);
}
return idx;
}
| true | FFmpeg | ef0d779706c77ca9007527bd8d41e9400682f4e4 |
5,608 | void gdb_exit(CPUArchState *env, int code)
{
GDBState *s;
char buf[4];
s = gdbserver_state;
if (!s) {
return;
}
#ifdef CONFIG_USER_ONLY
if (gdbserver_fd < 0 || s->fd < 0) {
return;
}
#endif
snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
put_packet(s, buf);
#ifndef CONFIG_USER_ONLY
if (s->chr) {
qemu_chr_delete(s->chr);
}
#endif
}
| true | qemu | 3d0f44189178aab3a21a33ecf6a113b9abaea2bc |
5,609 | SCSIRequest *scsi_req_alloc(size_t size, SCSIDevice *d, uint32_t tag, uint32_t lun)
{
SCSIRequest *req;
req = qemu_mallocz(size);
/* Two references: one is passed back to the HBA, one is in d->requests. */
req->refcount = 2;
req->bus = scsi_bus_from_device(d);
req->dev = d;
req->tag = tag;
req->lun = lun;
req->status = -1;
req->enqueued = true;
trace_scsi_req_alloc(req->dev->id, req->lun, req->tag);
QTAILQ_INSERT_TAIL(&d->requests, req, next);
return req;
}
| true | qemu | 5c6c0e513600ba57c3e73b7151d3c0664438f7b5 |
5,610 | static void detach(sPAPRDRConnector *drc, DeviceState *d,
spapr_drc_detach_cb *detach_cb,
void *detach_cb_opaque, Error **errp)
{
DPRINTFN("drc: %x, detach", get_index(drc));
drc->detach_cb = detach_cb;
drc->detach_cb_opaque = detach_cb_opaque;
/* if we've signalled device presence to the guest, or if the guest
* has gone ahead and configured the device (via manually-executed
* device add via drmgr in guest, namely), we need to wait
* for the guest to quiesce the device before completing detach.
* Otherwise, we can assume the guest hasn't seen it and complete the
* detach immediately. Note that there is a small race window
* just before, or during, configuration, which is this context
* refers mainly to fetching the device tree via RTAS.
* During this window the device access will be arbitrated by
* associated DRC, which will simply fail the RTAS calls as invalid.
* This is recoverable within guest and current implementations of
* drmgr should be able to cope.
*/
if (!drc->signalled && !drc->configured) {
/* if the guest hasn't seen the device we can't rely on it to
* set it back to an isolated state via RTAS, so do it here manually
*/
drc->isolation_state = SPAPR_DR_ISOLATION_STATE_ISOLATED;
if (drc->isolation_state != SPAPR_DR_ISOLATION_STATE_ISOLATED) {
DPRINTFN("awaiting transition to isolated state before removal");
if (drc->type != SPAPR_DR_CONNECTOR_TYPE_PCI &&
drc->allocation_state != SPAPR_DR_ALLOCATION_STATE_UNUSABLE) {
DPRINTFN("awaiting transition to unusable state before removal");
drc->indicator_state = SPAPR_DR_INDICATOR_STATE_INACTIVE;
if (drc->detach_cb) {
drc->detach_cb(drc->dev, drc->detach_cb_opaque);
drc->awaiting_release = false;
g_free(drc->fdt);
drc->fdt = NULL;
drc->fdt_start_offset = 0;
object_property_del(OBJECT(drc), "device", NULL);
drc->dev = NULL;
drc->detach_cb = NULL;
drc->detach_cb_opaque = NULL; | true | qemu | aab99135b63522267c6fdae04712cb2f02c8c7de |
5,612 | void xen_invalidate_map_cache_entry(uint8_t *buffer)
{
MapCacheEntry *entry = NULL, *pentry = NULL;
MapCacheRev *reventry;
target_phys_addr_t paddr_index;
target_phys_addr_t size;
int found = 0;
if (mapcache->last_address_vaddr == buffer) {
mapcache->last_address_index = -1;
}
QTAILQ_FOREACH(reventry, &mapcache->locked_entries, next) {
if (reventry->vaddr_req == buffer) {
paddr_index = reventry->paddr_index;
size = reventry->size;
found = 1;
break;
}
}
if (!found) {
DPRINTF("%s, could not find %p\n", __func__, buffer);
QTAILQ_FOREACH(reventry, &mapcache->locked_entries, next) {
DPRINTF(" "TARGET_FMT_plx" -> %p is present\n", reventry->paddr_index, reventry->vaddr_req);
}
return;
}
QTAILQ_REMOVE(&mapcache->locked_entries, reventry, next);
g_free(reventry);
entry = &mapcache->entry[paddr_index % mapcache->nr_buckets];
while (entry && (entry->paddr_index != paddr_index || entry->size != size)) {
pentry = entry;
entry = entry->next;
}
if (!entry) {
DPRINTF("Trying to unmap address %p that is not in the mapcache!\n", buffer);
return;
}
entry->lock--;
if (entry->lock > 0 || pentry == NULL) {
return;
}
pentry->next = entry->next;
if (munmap(entry->vaddr_base, entry->size) != 0) {
perror("unmap fails");
exit(-1);
}
g_free(entry->valid_mapping);
g_free(entry);
}
| true | qemu | 27b7652ef515bb4c694f79d657d2052c72b19536 |
5,613 | static void adx_decode_stereo(short *out,const unsigned char *in,PREV *prev)
{
short tmp[32*2];
int i;
adx_decode(tmp ,in ,prev);
adx_decode(tmp+32,in+18,prev+1);
for(i=0;i<32;i++) {
out[i*2] = tmp[i];
out[i*2+1] = tmp[i+32];
}
}
| true | FFmpeg | f19af812a32c1398d48c3550d11dbc6aafbb2bfc |
5,614 | void unregister_savevm(DeviceState *dev, const char *idstr, void *opaque)
{
SaveStateEntry *se, *new_se;
char id[256] = "";
if (dev && dev->parent_bus && dev->parent_bus->info->get_dev_path) {
char *path = dev->parent_bus->info->get_dev_path(dev);
if (path) {
pstrcpy(id, sizeof(id), path);
pstrcat(id, sizeof(id), "/");
qemu_free(path);
pstrcat(id, sizeof(id), idstr);
QTAILQ_FOREACH_SAFE(se, &savevm_handlers, entry, new_se) {
if (strcmp(se->idstr, id) == 0 && se->opaque == opaque) {
QTAILQ_REMOVE(&savevm_handlers, se, entry);
qemu_free(se);
| true | qemu | 69e58af92cf90a1a0551c73880928afa6753fa5f |
5,615 | static void fsl_imx25_realize(DeviceState *dev, Error **errp)
{
FslIMX25State *s = FSL_IMX25(dev);
uint8_t i;
Error *err = NULL;
object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
object_property_set_bool(OBJECT(&s->avic), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX25_AVIC_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 0,
qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1,
qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX25_CCM_ADDR);
/* Initialize all UARTs */
for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {
static const struct {
hwaddr addr;
unsigned int irq;
} serial_table[FSL_IMX25_NUM_UARTS] = {
{ FSL_IMX25_UART1_ADDR, FSL_IMX25_UART1_IRQ },
{ FSL_IMX25_UART2_ADDR, FSL_IMX25_UART2_IRQ },
{ FSL_IMX25_UART3_ADDR, FSL_IMX25_UART3_IRQ },
{ FSL_IMX25_UART4_ADDR, FSL_IMX25_UART4_IRQ },
{ FSL_IMX25_UART5_ADDR, FSL_IMX25_UART5_IRQ }
};
if (i < MAX_SERIAL_PORTS) {
Chardev *chr;
chr = serial_hds[i];
if (!chr) {
char label[20];
snprintf(label, sizeof(label), "imx31.uart%d", i);
chr = qemu_chr_new(label, "null");
}
qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", chr);
}
object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
qdev_get_gpio_in(DEVICE(&s->avic),
serial_table[i].irq));
}
/* Initialize all GPT timers */
for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
static const struct {
hwaddr addr;
unsigned int irq;
} gpt_table[FSL_IMX25_NUM_GPTS] = {
{ FSL_IMX25_GPT1_ADDR, FSL_IMX25_GPT1_IRQ },
{ FSL_IMX25_GPT2_ADDR, FSL_IMX25_GPT2_IRQ },
{ FSL_IMX25_GPT3_ADDR, FSL_IMX25_GPT3_IRQ },
{ FSL_IMX25_GPT4_ADDR, FSL_IMX25_GPT4_IRQ }
};
s->gpt[i].ccm = IMX_CCM(&s->ccm);
object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, gpt_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
qdev_get_gpio_in(DEVICE(&s->avic),
gpt_table[i].irq));
}
/* Initialize all EPIT timers */
for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) {
static const struct {
hwaddr addr;
unsigned int irq;
} epit_table[FSL_IMX25_NUM_EPITS] = {
{ FSL_IMX25_EPIT1_ADDR, FSL_IMX25_EPIT1_IRQ },
{ FSL_IMX25_EPIT2_ADDR, FSL_IMX25_EPIT2_IRQ }
};
s->epit[i].ccm = IMX_CCM(&s->ccm);
object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
qdev_get_gpio_in(DEVICE(&s->avic),
epit_table[i].irq));
}
qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
object_property_set_bool(OBJECT(&s->fec), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->fec), 0, FSL_IMX25_FEC_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fec), 0,
qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_FEC_IRQ));
/* Initialize all I2C */
for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
static const struct {
hwaddr addr;
unsigned int irq;
} i2c_table[FSL_IMX25_NUM_I2CS] = {
{ FSL_IMX25_I2C1_ADDR, FSL_IMX25_I2C1_IRQ },
{ FSL_IMX25_I2C2_ADDR, FSL_IMX25_I2C2_IRQ },
{ FSL_IMX25_I2C3_ADDR, FSL_IMX25_I2C3_IRQ }
};
object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
qdev_get_gpio_in(DEVICE(&s->avic),
i2c_table[i].irq));
}
/* Initialize all GPIOs */
for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
static const struct {
hwaddr addr;
unsigned int irq;
} gpio_table[FSL_IMX25_NUM_GPIOS] = {
{ FSL_IMX25_GPIO1_ADDR, FSL_IMX25_GPIO1_IRQ },
{ FSL_IMX25_GPIO2_ADDR, FSL_IMX25_GPIO2_IRQ },
{ FSL_IMX25_GPIO3_ADDR, FSL_IMX25_GPIO3_IRQ },
{ FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ }
};
object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
/* Connect GPIO IRQ to PIC */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
qdev_get_gpio_in(DEVICE(&s->avic),
gpio_table[i].irq));
}
/* initialize 2 x 16 KB ROM */
memory_region_init_rom_nomigrate(&s->rom[0], NULL,
"imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
if (err) {
error_propagate(errp, err);
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR,
&s->rom[0]);
memory_region_init_rom_nomigrate(&s->rom[1], NULL,
"imx25.rom1", FSL_IMX25_ROM1_SIZE, &err);
if (err) {
error_propagate(errp, err);
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM1_ADDR,
&s->rom[1]);
/* initialize internal RAM (128 KB) */
memory_region_init_ram(&s->iram, NULL, "imx25.iram", FSL_IMX25_IRAM_SIZE,
&err);
if (err) {
error_propagate(errp, err);
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ADDR,
&s->iram);
/* internal RAM (128 KB) is aliased over 128 MB - 128 KB */
memory_region_init_alias(&s->iram_alias, NULL, "imx25.iram_alias",
&s->iram, 0, FSL_IMX25_IRAM_ALIAS_SIZE);
memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ALIAS_ADDR,
&s->iram_alias);
}
| true | qemu | eda40cc1686162dcd92a97debcbb0df74269651f |
5,616 | int add_av_stream(FFStream *feed,
AVStream *st)
{
AVStream *fst;
AVCodecContext *av, *av1;
int i;
av = &st->codec;
for(i=0;i<feed->nb_streams;i++) {
st = feed->streams[i];
av1 = &st->codec;
if (av1->codec_id == av->codec_id &&
av1->codec_type == av->codec_type &&
av1->bit_rate == av->bit_rate) {
switch(av->codec_type) {
case CODEC_TYPE_AUDIO:
if (av1->channels == av->channels &&
av1->sample_rate == av->sample_rate)
goto found;
break;
case CODEC_TYPE_VIDEO:
if (av1->width == av->width &&
av1->height == av->height &&
av1->frame_rate == av->frame_rate &&
av1->gop_size == av->gop_size)
goto found;
break;
default:
abort();
}
}
}
fst = av_mallocz(sizeof(AVStream));
if (!fst)
return -1;
fst->priv_data = av_mallocz(sizeof(FeedData));
memcpy(&fst->codec, av, sizeof(AVCodecContext));
feed->streams[feed->nb_streams++] = fst;
return feed->nb_streams - 1;
found:
return i;
}
| true | FFmpeg | ec3b22326dc07fb8300a577bd6b17c19a0f1bcf7 |
5,618 | static void mov_text_new_line_cb(void *priv, int forced)
{
MovTextContext *s = priv;
av_strlcpy(s->ptr, "\n", FFMIN(s->end - s->ptr, 2));
s->ptr++;
}
| false | FFmpeg | b0635e2fcf80717dd618ef75d3317d62ed85c300 |
5,619 | static void pulse_get_output_timestamp(AVFormatContext *h, int stream, int64_t *dts, int64_t *wall)
{
PulseData *s = h->priv_data;
pa_usec_t latency;
int neg;
pa_threaded_mainloop_lock(s->mainloop);
pa_stream_get_latency(s->stream, &latency, &neg);
pa_threaded_mainloop_unlock(s->mainloop);
*wall = av_gettime();
*dts = s->timestamp - (neg ? -latency : latency);
}
| false | FFmpeg | a1e5be5c1a0c98206a1ae034d278702f5c8ef2a3 |
5,620 | static int update_packetheader(NUTContext *nut, ByteIOContext *bc, int additional_size){
int64_t start= nut->packet_start;
int64_t cur= url_ftell(bc);
int size= cur - start + additional_size;
if(size != nut->written_packet_size){
int i;
assert( size <= nut->written_packet_size );
url_fseek(bc, nut->packet_size_pos, SEEK_SET);
for(i=get_length(size); i < get_length(nut->written_packet_size); i+=7)
put_byte(bc, 0x80);
put_v(bc, size);
url_fseek(bc, cur, SEEK_SET);
nut->written_packet_size= size; //FIXME may fail if multiple updates with differing sizes, as get_length may differ
}
return 0;
}
| false | FFmpeg | ee9f36a88eb3e2706ea659acb0ca80c414fa5d8a |
5,622 | static int build_huff(const uint8_t *src, VLC *vlc)
{
int i;
HuffEntry he[256];
int last;
uint32_t codes[256];
uint8_t bits[256];
uint8_t syms[256];
uint32_t code;
for (i = 0; i < 256; i++) {
he[i].sym = i;
he[i].len = *src++;
}
qsort(he, 256, sizeof(*he), huff_cmp);
if (!he[0].len || he[0].len > 32)
return -1;
last = 255;
while (he[last].len == 255 && last)
last--;
code = 1;
for (i = last; i >= 0; i--) {
codes[i] = code >> (32 - he[i].len);
bits[i] = he[i].len;
syms[i] = he[i].sym;
code += 0x80000000u >> (he[i].len - 1);
}
return init_vlc_sparse(vlc, FFMIN(he[last].len, 9), last + 1,
bits, sizeof(*bits), sizeof(*bits),
codes, sizeof(*codes), sizeof(*codes),
syms, sizeof(*syms), sizeof(*syms), 0);
}
| false | FFmpeg | 46e1af3b0f2c28936dfa88063cc5a35f466f5ac3 |
5,623 | static void qemu_thread_set_name(QemuThread *thread, const char *name)
{
#ifdef CONFIG_PTHREAD_SETNAME_NP
pthread_setname_np(thread->thread, name);
#endif
}
| true | qemu | 68a9398261ca38979bbc2b7c89ed5bb044ccc9e6 |
5,625 | int ff_jpeg2000_init_component(Jpeg2000Component *comp,
Jpeg2000CodingStyle *codsty,
Jpeg2000QuantStyle *qntsty,
int cbps, int dx, int dy,
AVCodecContext *avctx)
{
uint8_t log2_band_prec_width, log2_band_prec_height;
int reslevelno, bandno, gbandno = 0, ret, i, j;
uint32_t csize = 1;
if (!codsty->nreslevels2decode) {
av_log(avctx, AV_LOG_ERROR, "nreslevels2decode uninitialized\n");
return AVERROR_INVALIDDATA;
}
if (ret = ff_jpeg2000_dwt_init(&comp->dwt, comp->coord,
codsty->nreslevels2decode - 1,
codsty->transform))
return ret;
// component size comp->coord is uint16_t so ir cannot overflow
csize = (comp->coord[0][1] - comp->coord[0][0]) *
(comp->coord[1][1] - comp->coord[1][0]);
comp->data = av_malloc_array(csize, sizeof(*comp->data));
if (!comp->data)
return AVERROR(ENOMEM);
comp->reslevel = av_malloc_array(codsty->nreslevels, sizeof(*comp->reslevel));
if (!comp->reslevel)
return AVERROR(ENOMEM);
/* LOOP on resolution levels */
for (reslevelno = 0; reslevelno < codsty->nreslevels; reslevelno++) {
int declvl = codsty->nreslevels - reslevelno; // N_L -r see ISO/IEC 15444-1:2002 B.5
Jpeg2000ResLevel *reslevel = comp->reslevel + reslevelno;
/* Compute borders for each resolution level.
* Computation of trx_0, trx_1, try_0 and try_1.
* see ISO/IEC 15444-1:2002 eq. B.5 and B-14 */
for (i = 0; i < 2; i++)
for (j = 0; j < 2; j++)
reslevel->coord[i][j] =
ff_jpeg2000_ceildivpow2(comp->coord_o[i][j], declvl - 1);
// update precincts size: 2^n value
reslevel->log2_prec_width = codsty->log2_prec_widths[reslevelno];
reslevel->log2_prec_height = codsty->log2_prec_heights[reslevelno];
/* Number of bands for each resolution level */
if (reslevelno == 0)
reslevel->nbands = 1;
else
reslevel->nbands = 3;
/* Number of precincts wich span the tile for resolution level reslevelno
* see B.6 in ISO/IEC 15444-1:2002 eq. B-16
* num_precincts_x = |- trx_1 / 2 ^ log2_prec_width) -| - (trx_0 / 2 ^ log2_prec_width)
* num_precincts_y = |- try_1 / 2 ^ log2_prec_width) -| - (try_0 / 2 ^ log2_prec_width)
* for Dcinema profiles in JPEG 2000
* num_precincts_x = |- trx_1 / 2 ^ log2_prec_width) -|
* num_precincts_y = |- try_1 / 2 ^ log2_prec_width) -| */
if (reslevel->coord[0][1] == reslevel->coord[0][0])
reslevel->num_precincts_x = 0;
else
reslevel->num_precincts_x =
ff_jpeg2000_ceildivpow2(reslevel->coord[0][1],
reslevel->log2_prec_width) -
(reslevel->coord[0][0] >> reslevel->log2_prec_width);
if (reslevel->coord[1][1] == reslevel->coord[1][0])
reslevel->num_precincts_y = 0;
else
reslevel->num_precincts_y =
ff_jpeg2000_ceildivpow2(reslevel->coord[1][1],
reslevel->log2_prec_height) -
(reslevel->coord[1][0] >> reslevel->log2_prec_height);
reslevel->band = av_malloc_array(reslevel->nbands, sizeof(*reslevel->band));
if (!reslevel->band)
return AVERROR(ENOMEM);
for (bandno = 0; bandno < reslevel->nbands; bandno++, gbandno++) {
Jpeg2000Band *band = reslevel->band + bandno;
int cblkno, precno;
int nb_precincts;
/* TODO: Implementation of quantization step not finished,
* see ISO/IEC 15444-1:2002 E.1 and A.6.4. */
switch (qntsty->quantsty) {
uint8_t gain;
int numbps;
case JPEG2000_QSTY_NONE:
/* TODO: to verify. No quantization in this case */
numbps = cbps +
lut_gain[codsty->transform][bandno + reslevelno > 0];
band->stepsize = (float)SHL(2048 + qntsty->mant[gbandno],
2 + numbps - qntsty->expn[gbandno]);
break;
case JPEG2000_QSTY_SI:
/*TODO: Compute formula to implement. */
band->stepsize = (float) (1 << 13);
break;
case JPEG2000_QSTY_SE:
/* Exponent quantization step.
* Formula:
* delta_b = 2 ^ (R_b - expn_b) * (1 + (mant_b / 2 ^ 11))
* R_b = R_I + log2 (gain_b )
* see ISO/IEC 15444-1:2002 E.1.1 eqn. E-3 and E-4 */
/* TODO/WARN: value of log2 (gain_b ) not taken into account
* but it works (compared to OpenJPEG). Why?
* Further investigation needed. */
gain = cbps;
band->stepsize = pow(2.0, gain - qntsty->expn[gbandno]);
band->stepsize *= (float)qntsty->mant[gbandno] / 2048.0 + 1.0;
/* FIXME: In openjepg code stespize = stepsize * 0.5. Why?
* If not set output of entropic decoder is not correct. */
band->stepsize *= 0.5;
break;
default:
band->stepsize = 0;
av_log(avctx, AV_LOG_ERROR, "Unknown quantization format\n");
break;
}
/* BITEXACT computing case --> convert to int */
if (avctx->flags & CODEC_FLAG_BITEXACT)
band->stepsize = (int32_t)(band->stepsize * (1 << 16));
/* computation of tbx_0, tbx_1, tby_0, tby_1
* see ISO/IEC 15444-1:2002 B.5 eq. B-15 and tbl B.1
* codeblock width and height is computed for
* DCI JPEG 2000 codeblock_width = codeblock_width = 32 = 2 ^ 5 */
if (reslevelno == 0) {
/* for reslevelno = 0, only one band, x0_b = y0_b = 0 */
for (i = 0; i < 2; i++)
for (j = 0; j < 2; j++)
band->coord[i][j] =
ff_jpeg2000_ceildivpow2(comp->coord_o[i][j],
declvl - 1);
log2_band_prec_width = reslevel->log2_prec_width;
log2_band_prec_height = reslevel->log2_prec_height;
/* see ISO/IEC 15444-1:2002 eq. B-17 and eq. B-15 */
band->log2_cblk_width = FFMIN(codsty->log2_cblk_width,
reslevel->log2_prec_width);
band->log2_cblk_height = FFMIN(codsty->log2_cblk_height,
reslevel->log2_prec_height);
} else {
/* 3 bands x0_b = 1 y0_b = 0; x0_b = 0 y0_b = 1; x0_b = y0_b = 1 */
/* x0_b and y0_b are computed with ((bandno + 1 >> i) & 1) */
for (i = 0; i < 2; i++)
for (j = 0; j < 2; j++)
/* Formula example for tbx_0 = ceildiv((tcx_0 - 2 ^ (declvl - 1) * x0_b) / declvl) */
band->coord[i][j] =
ff_jpeg2000_ceildivpow2(comp->coord_o[i][j] -
(((bandno + 1 >> i) & 1) << declvl - 1),
declvl);
/* TODO: Manage case of 3 band offsets here or
* in coding/decoding function? */
/* see ISO/IEC 15444-1:2002 eq. B-17 and eq. B-15 */
band->log2_cblk_width = FFMIN(codsty->log2_cblk_width,
reslevel->log2_prec_width - 1);
band->log2_cblk_height = FFMIN(codsty->log2_cblk_height,
reslevel->log2_prec_height - 1);
log2_band_prec_width = reslevel->log2_prec_width - 1;
log2_band_prec_height = reslevel->log2_prec_height - 1;
}
band->prec = av_malloc_array(reslevel->num_precincts_x *
reslevel->num_precincts_y,
sizeof(*band->prec));
if (!band->prec)
return AVERROR(ENOMEM);
nb_precincts = reslevel->num_precincts_x * reslevel->num_precincts_y;
for (precno = 0; precno < nb_precincts; precno++) {
Jpeg2000Prec *prec = band->prec + precno;
/* TODO: Explain formula for JPEG200 DCINEMA. */
/* TODO: Verify with previous count of codeblocks per band */
/* Compute P_x0 */
prec->coord[0][0] = (precno % reslevel->num_precincts_x) *
(1 << log2_band_prec_width);
prec->coord[0][0] = FFMAX(prec->coord[0][0], band->coord[0][0]);
/* Compute P_y0 */
prec->coord[1][0] = (precno / reslevel->num_precincts_x) *
(1 << log2_band_prec_height);
prec->coord[1][0] = FFMAX(prec->coord[1][0], band->coord[1][0]);
/* Compute P_x1 */
prec->coord[0][1] = prec->coord[0][0] +
(1 << log2_band_prec_width);
prec->coord[0][1] = FFMIN(prec->coord[0][1], band->coord[0][1]);
/* Compute P_y1 */
prec->coord[1][1] = prec->coord[1][0] +
(1 << log2_band_prec_height);
prec->coord[1][1] = FFMIN(prec->coord[1][1], band->coord[1][1]);
prec->nb_codeblocks_width =
ff_jpeg2000_ceildivpow2(prec->coord[0][1] -
prec->coord[0][0],
band->log2_cblk_width);
prec->nb_codeblocks_height =
ff_jpeg2000_ceildivpow2(prec->coord[1][1] -
prec->coord[1][0],
band->log2_cblk_height);
/* Tag trees initialization */
prec->cblkincl =
ff_jpeg2000_tag_tree_init(prec->nb_codeblocks_width,
prec->nb_codeblocks_height);
if (!prec->cblkincl)
return AVERROR(ENOMEM);
prec->zerobits =
ff_jpeg2000_tag_tree_init(prec->nb_codeblocks_width,
prec->nb_codeblocks_height);
if (!prec->zerobits)
return AVERROR(ENOMEM);
prec->cblk = av_malloc_array(prec->nb_codeblocks_width *
prec->nb_codeblocks_height,
sizeof(*prec->cblk));
if (!prec->cblk)
return AVERROR(ENOMEM);
for (cblkno = 0; cblkno < prec->nb_codeblocks_width * prec->nb_codeblocks_height; cblkno++) {
Jpeg2000Cblk *cblk = prec->cblk + cblkno;
uint16_t Cx0, Cy0;
/* Compute coordinates of codeblocks */
/* Compute Cx0*/
Cx0 = (prec->coord[0][0] >> band->log2_cblk_width) << band->log2_cblk_width;
Cx0 = Cx0 + ((cblkno % prec->nb_codeblocks_width) << band->log2_cblk_width);
cblk->coord[0][0] = FFMAX(Cx0, prec->coord[0][0]);
/* Compute Cy0*/
Cy0 = (prec->coord[1][0] >> band->log2_cblk_height) << band->log2_cblk_height;
Cy0 = Cy0 + ((cblkno / prec->nb_codeblocks_width) << band->log2_cblk_height);
cblk->coord[1][0] = FFMAX(Cy0, prec->coord[1][0]);
/* Compute Cx1 */
cblk->coord[0][1] = FFMIN(Cx0 + (1 << band->log2_cblk_width),
prec->coord[0][1]);
/* Compute Cy1 */
cblk->coord[1][1] = FFMIN(Cy0 + (1 << band->log2_cblk_height),
prec->coord[1][1]);
cblk->zero = 0;
cblk->lblock = 3;
cblk->length = 0;
cblk->lengthinc = 0;
cblk->npasses = 0;
}
}
}
}
return 0;
}
| true | FFmpeg | b44925ae6b4bb7b9409053265005d9acada82057 |
5,626 | static void icp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_icp_server;
dc->realize = icp_realize;
} | true | qemu | 62f94fc94f98095173146e753a1f03d7c2cc7ba3 |
5,627 | static void balloon_stats_poll_cb(void *opaque)
{
VirtIOBalloon *s = opaque;
VirtIODevice *vdev = VIRTIO_DEVICE(s);
if (!balloon_stats_supported(s)) {
/* re-schedule */
balloon_stats_change_timer(s, s->stats_poll_interval);
return;
}
virtqueue_push(s->svq, s->stats_vq_elem, s->stats_vq_offset);
virtio_notify(vdev, s->svq);
g_free(s->stats_vq_elem);
s->stats_vq_elem = NULL;
}
| true | qemu | 4eae2a657d1ff5ada56eb9b4966eae0eff333b0b |
5,628 | void virtio_setup_block(struct subchannel_id schid)
{
struct vq_info_block info;
struct vq_config_block config = {};
blk_cfg.blk_size = 0; /* mark "illegal" - setup started... */
guessed_disk_nature = false;
virtio_reset(schid);
/*
* Skipping CCW_CMD_READ_FEAT. We're not doing anything fancy, and
* we'll just stop dead anyway if anything does not work like we
* expect it.
*/
config.index = 0;
if (run_ccw(schid, CCW_CMD_READ_VQ_CONF, &config, sizeof(config))) {
virtio_panic("Could not get block device VQ configuration\n");
}
if (run_ccw(schid, CCW_CMD_READ_CONF, &blk_cfg, sizeof(blk_cfg))) {
virtio_panic("Could not get block device configuration\n");
}
vring_init(&block, config.num, ring_area,
KVM_S390_VIRTIO_RING_ALIGN);
info.queue = (unsigned long long) ring_area;
info.align = KVM_S390_VIRTIO_RING_ALIGN;
info.index = 0;
info.num = config.num;
block.schid = schid;
if (!run_ccw(schid, CCW_CMD_SET_VQ, &info, sizeof(info))) {
virtio_set_status(schid, VIRTIO_CONFIG_S_DRIVER_OK);
}
if (!virtio_ipl_disk_is_valid()) {
/* make sure all getters but blocksize return 0 for invalid IPL disk */
memset(&blk_cfg, 0, sizeof(blk_cfg));
virtio_assume_scsi();
}
}
| true | qemu | c9262e8a84a29f22fbb5edde5d17f4f6166d5ae1 |
5,629 | static void test_tco1_control_bits(void)
{
TestData d;
uint16_t val;
d.args = NULL;
d.noreboot = true;
test_init(&d);
val = TCO_LOCK;
qpci_io_writew(d.dev, d.tco_io_base + TCO1_CNT, val);
val &= ~TCO_LOCK;
qpci_io_writew(d.dev, d.tco_io_base + TCO1_CNT, val);
g_assert_cmpint(qpci_io_readw(d.dev, d.tco_io_base + TCO1_CNT), ==,
TCO_LOCK);
qtest_end();
}
| true | qemu | b4ba67d9a702507793c2724e56f98e9b0f7be02b |
5,631 | static void update_pam(PCII440FXState *d, uint32_t start, uint32_t end, int r,
PAMMemoryRegion *mem)
{
if (mem->initialized) {
memory_region_del_subregion(d->system_memory, &mem->mem);
memory_region_destroy(&mem->mem);
}
// printf("ISA mapping %08x-0x%08x: %d\n", start, end, r);
switch(r) {
case 3:
/* RAM */
memory_region_init_alias(&mem->mem, "pam-ram", d->ram_memory,
start, end - start);
break;
case 1:
/* ROM (XXX: not quite correct) */
memory_region_init_alias(&mem->mem, "pam-rom", d->ram_memory,
start, end - start);
memory_region_set_readonly(&mem->mem, true);
break;
case 2:
case 0:
/* XXX: should distinguish read/write cases */
memory_region_init_alias(&mem->mem, "pam-pci", d->pci_address_space,
start, end - start);
break;
}
memory_region_add_subregion_overlap(d->system_memory,
start, &mem->mem, 1);
mem->initialized = true;
}
| true | qemu | 2725aec70114cf1bee00443aeb47a305f9b0c665 |
5,632 | static int copy_cell(Indeo3DecodeContext *ctx, Plane *plane, Cell *cell)
{
int h, w, mv_x, mv_y, offset, offset_dst;
uint8_t *src, *dst;
/* setup output and reference pointers */
offset_dst = (cell->ypos << 2) * plane->pitch + (cell->xpos << 2);
dst = plane->pixels[ctx->buf_sel] + offset_dst;
mv_y = cell->mv_ptr[0];
mv_x = cell->mv_ptr[1];
/* -1 because there is an extra line on top for prediction */
if ((cell->ypos << 2) + mv_y < -1 || (cell->xpos << 2) + mv_x < 0 ||
((cell->ypos + cell->height) << 2) + mv_y > plane->height ||
((cell->xpos + cell->width) << 2) + mv_x > plane->width) {
av_log(ctx->avctx, AV_LOG_ERROR,
"Motion vectors point out of the frame.\n");
return AVERROR_INVALIDDATA;
}
offset = offset_dst + mv_y * plane->pitch + mv_x;
src = plane->pixels[ctx->buf_sel ^ 1] + offset;
h = cell->height << 2;
for (w = cell->width; w > 0;) {
/* copy using 16xH blocks */
if (!((cell->xpos << 2) & 15) && w >= 4) {
for (; w >= 4; src += 16, dst += 16, w -= 4)
ctx->hdsp.put_pixels_tab[0][0](dst, src, plane->pitch, h);
}
/* copy using 8xH blocks */
if (!((cell->xpos << 2) & 7) && w >= 2) {
ctx->hdsp.put_pixels_tab[1][0](dst, src, plane->pitch, h);
w -= 2;
src += 8;
dst += 8;
}
if (w >= 1) {
ctx->hdsp.put_pixels_tab[2][0](dst, src, plane->pitch, h);
w--;
src += 4;
dst += 4;
}
}
return 0;
}
| false | FFmpeg | 94235f2ba2eb8be014b6dbc2b2aed494c169cef1 |
5,633 | int av_expr_parse(AVExpr **expr, const char *s,
const char * const *const_names,
const char * const *func1_names, double (* const *funcs1)(void *, double),
const char * const *func2_names, double (* const *funcs2)(void *, double, double),
int log_offset, void *log_ctx)
{
Parser p;
AVExpr *e = NULL;
char *w = av_malloc(strlen(s) + 1);
char *wp = w;
const char *s0 = s;
int ret = 0;
if (!w)
return AVERROR(ENOMEM);
while (*s)
if (!isspace(*s++)) *wp++ = s[-1];
*wp++ = 0;
p.class = &class;
p.stack_index=100;
p.s= w;
p.const_names = const_names;
p.funcs1 = funcs1;
p.func1_names = func1_names;
p.funcs2 = funcs2;
p.func2_names = func2_names;
p.log_offset = log_offset;
p.log_ctx = log_ctx;
if ((ret = parse_expr(&e, &p)) < 0)
goto end;
if (*p.s) {
av_log(&p, AV_LOG_ERROR, "Invalid chars '%s' at the end of expression '%s'\n", p.s, s0);
ret = AVERROR(EINVAL);
goto end;
}
if (!verify_expr(e)) {
av_expr_free(e);
ret = AVERROR(EINVAL);
goto end;
}
*expr = e;
end:
av_free(w);
return ret;
}
| false | FFmpeg | 94350ab986dfce1c93fa720baf28b548c60a9879 |
5,635 | static int disas_vfp_insn(DisasContext *s, uint32_t insn)
{
uint32_t rd, rn, rm, op, i, n, offset, delta_d, delta_m, bank_mask;
int dp, veclen;
TCGv_i32 addr;
TCGv_i32 tmp;
TCGv_i32 tmp2;
if (!arm_dc_feature(s, ARM_FEATURE_VFP)) {
return 1;
}
/* FIXME: this access check should not take precedence over UNDEF
* for invalid encodings; we will generate incorrect syndrome information
* for attempts to execute invalid vfp/neon encodings with FP disabled.
*/
if (!s->cpacr_fpen) {
gen_exception_insn(s, 4, EXCP_UDEF,
syn_fp_access_trap(1, 0xe, s->thumb),
default_exception_el(s));
return 0;
}
if (!s->vfp_enabled) {
/* VFP disabled. Only allow fmxr/fmrx to/from some control regs. */
if ((insn & 0x0fe00fff) != 0x0ee00a10)
return 1;
rn = (insn >> 16) & 0xf;
if (rn != ARM_VFP_FPSID && rn != ARM_VFP_FPEXC && rn != ARM_VFP_MVFR2
&& rn != ARM_VFP_MVFR1 && rn != ARM_VFP_MVFR0) {
return 1;
}
}
if (extract32(insn, 28, 4) == 0xf) {
/* Encodings with T=1 (Thumb) or unconditional (ARM):
* only used in v8 and above.
*/
return disas_vfp_v8_insn(s, insn);
}
dp = ((insn & 0xf00) == 0xb00);
switch ((insn >> 24) & 0xf) {
case 0xe:
if (insn & (1 << 4)) {
/* single register transfer */
rd = (insn >> 12) & 0xf;
if (dp) {
int size;
int pass;
VFP_DREG_N(rn, insn);
if (insn & 0xf)
return 1;
if (insn & 0x00c00060
&& !arm_dc_feature(s, ARM_FEATURE_NEON)) {
return 1;
}
pass = (insn >> 21) & 1;
if (insn & (1 << 22)) {
size = 0;
offset = ((insn >> 5) & 3) * 8;
} else if (insn & (1 << 5)) {
size = 1;
offset = (insn & (1 << 6)) ? 16 : 0;
} else {
size = 2;
offset = 0;
}
if (insn & ARM_CP_RW_BIT) {
/* vfp->arm */
tmp = neon_load_reg(rn, pass);
switch (size) {
case 0:
if (offset)
tcg_gen_shri_i32(tmp, tmp, offset);
if (insn & (1 << 23))
gen_uxtb(tmp);
else
gen_sxtb(tmp);
break;
case 1:
if (insn & (1 << 23)) {
if (offset) {
tcg_gen_shri_i32(tmp, tmp, 16);
} else {
gen_uxth(tmp);
}
} else {
if (offset) {
tcg_gen_sari_i32(tmp, tmp, 16);
} else {
gen_sxth(tmp);
}
}
break;
case 2:
break;
}
store_reg(s, rd, tmp);
} else {
/* arm->vfp */
tmp = load_reg(s, rd);
if (insn & (1 << 23)) {
/* VDUP */
if (size == 0) {
gen_neon_dup_u8(tmp, 0);
} else if (size == 1) {
gen_neon_dup_low16(tmp);
}
for (n = 0; n <= pass * 2; n++) {
tmp2 = tcg_temp_new_i32();
tcg_gen_mov_i32(tmp2, tmp);
neon_store_reg(rn, n, tmp2);
}
neon_store_reg(rn, n, tmp);
} else {
/* VMOV */
switch (size) {
case 0:
tmp2 = neon_load_reg(rn, pass);
tcg_gen_deposit_i32(tmp, tmp2, tmp, offset, 8);
tcg_temp_free_i32(tmp2);
break;
case 1:
tmp2 = neon_load_reg(rn, pass);
tcg_gen_deposit_i32(tmp, tmp2, tmp, offset, 16);
tcg_temp_free_i32(tmp2);
break;
case 2:
break;
}
neon_store_reg(rn, pass, tmp);
}
}
} else { /* !dp */
if ((insn & 0x6f) != 0x00)
return 1;
rn = VFP_SREG_N(insn);
if (insn & ARM_CP_RW_BIT) {
/* vfp->arm */
if (insn & (1 << 21)) {
/* system register */
rn >>= 1;
switch (rn) {
case ARM_VFP_FPSID:
/* VFP2 allows access to FSID from userspace.
VFP3 restricts all id registers to privileged
accesses. */
if (IS_USER(s)
&& arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
tmp = load_cpu_field(vfp.xregs[rn]);
break;
case ARM_VFP_FPEXC:
if (IS_USER(s))
return 1;
tmp = load_cpu_field(vfp.xregs[rn]);
break;
case ARM_VFP_FPINST:
case ARM_VFP_FPINST2:
/* Not present in VFP3. */
if (IS_USER(s)
|| arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
tmp = load_cpu_field(vfp.xregs[rn]);
break;
case ARM_VFP_FPSCR:
if (rd == 15) {
tmp = load_cpu_field(vfp.xregs[ARM_VFP_FPSCR]);
tcg_gen_andi_i32(tmp, tmp, 0xf0000000);
} else {
tmp = tcg_temp_new_i32();
gen_helper_vfp_get_fpscr(tmp, cpu_env);
}
break;
case ARM_VFP_MVFR2:
if (!arm_dc_feature(s, ARM_FEATURE_V8)) {
return 1;
}
/* fall through */
case ARM_VFP_MVFR0:
case ARM_VFP_MVFR1:
if (IS_USER(s)
|| !arm_dc_feature(s, ARM_FEATURE_MVFR)) {
return 1;
}
tmp = load_cpu_field(vfp.xregs[rn]);
break;
default:
return 1;
}
} else {
gen_mov_F0_vreg(0, rn);
tmp = gen_vfp_mrs();
}
if (rd == 15) {
/* Set the 4 flag bits in the CPSR. */
gen_set_nzcv(tmp);
tcg_temp_free_i32(tmp);
} else {
store_reg(s, rd, tmp);
}
} else {
/* arm->vfp */
if (insn & (1 << 21)) {
rn >>= 1;
/* system register */
switch (rn) {
case ARM_VFP_FPSID:
case ARM_VFP_MVFR0:
case ARM_VFP_MVFR1:
/* Writes are ignored. */
break;
case ARM_VFP_FPSCR:
tmp = load_reg(s, rd);
gen_helper_vfp_set_fpscr(cpu_env, tmp);
tcg_temp_free_i32(tmp);
gen_lookup_tb(s);
break;
case ARM_VFP_FPEXC:
if (IS_USER(s))
return 1;
/* TODO: VFP subarchitecture support.
* For now, keep the EN bit only */
tmp = load_reg(s, rd);
tcg_gen_andi_i32(tmp, tmp, 1 << 30);
store_cpu_field(tmp, vfp.xregs[rn]);
gen_lookup_tb(s);
break;
case ARM_VFP_FPINST:
case ARM_VFP_FPINST2:
if (IS_USER(s)) {
return 1;
}
tmp = load_reg(s, rd);
store_cpu_field(tmp, vfp.xregs[rn]);
break;
default:
return 1;
}
} else {
tmp = load_reg(s, rd);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rn);
}
}
}
} else {
/* data processing */
/* The opcode is in bits 23, 21, 20 and 6. */
op = ((insn >> 20) & 8) | ((insn >> 19) & 6) | ((insn >> 6) & 1);
if (dp) {
if (op == 15) {
/* rn is opcode */
rn = ((insn >> 15) & 0x1e) | ((insn >> 7) & 1);
} else {
/* rn is register number */
VFP_DREG_N(rn, insn);
}
if (op == 15 && (rn == 15 || ((rn & 0x1c) == 0x18) ||
((rn & 0x1e) == 0x6))) {
/* Integer or single/half precision destination. */
rd = VFP_SREG_D(insn);
} else {
VFP_DREG_D(rd, insn);
}
if (op == 15 &&
(((rn & 0x1c) == 0x10) || ((rn & 0x14) == 0x14) ||
((rn & 0x1e) == 0x4))) {
/* VCVT from int or half precision is always from S reg
* regardless of dp bit. VCVT with immediate frac_bits
* has same format as SREG_M.
*/
rm = VFP_SREG_M(insn);
} else {
VFP_DREG_M(rm, insn);
}
} else {
rn = VFP_SREG_N(insn);
if (op == 15 && rn == 15) {
/* Double precision destination. */
VFP_DREG_D(rd, insn);
} else {
rd = VFP_SREG_D(insn);
}
/* NB that we implicitly rely on the encoding for the frac_bits
* in VCVT of fixed to float being the same as that of an SREG_M
*/
rm = VFP_SREG_M(insn);
}
veclen = s->vec_len;
if (op == 15 && rn > 3)
veclen = 0;
/* Shut up compiler warnings. */
delta_m = 0;
delta_d = 0;
bank_mask = 0;
if (veclen > 0) {
if (dp)
bank_mask = 0xc;
else
bank_mask = 0x18;
/* Figure out what type of vector operation this is. */
if ((rd & bank_mask) == 0) {
/* scalar */
veclen = 0;
} else {
if (dp)
delta_d = (s->vec_stride >> 1) + 1;
else
delta_d = s->vec_stride + 1;
if ((rm & bank_mask) == 0) {
/* mixed scalar/vector */
delta_m = 0;
} else {
/* vector */
delta_m = delta_d;
}
}
}
/* Load the initial operands. */
if (op == 15) {
switch (rn) {
case 16:
case 17:
/* Integer source */
gen_mov_F0_vreg(0, rm);
break;
case 8:
case 9:
/* Compare */
gen_mov_F0_vreg(dp, rd);
gen_mov_F1_vreg(dp, rm);
break;
case 10:
case 11:
/* Compare with zero */
gen_mov_F0_vreg(dp, rd);
gen_vfp_F1_ld0(dp);
break;
case 20:
case 21:
case 22:
case 23:
case 28:
case 29:
case 30:
case 31:
/* Source and destination the same. */
gen_mov_F0_vreg(dp, rd);
break;
case 4:
case 5:
case 6:
case 7:
/* VCVTB, VCVTT: only present with the halfprec extension
* UNPREDICTABLE if bit 8 is set prior to ARMv8
* (we choose to UNDEF)
*/
if ((dp && !arm_dc_feature(s, ARM_FEATURE_V8)) ||
!arm_dc_feature(s, ARM_FEATURE_VFP_FP16)) {
return 1;
}
if (!extract32(rn, 1, 1)) {
/* Half precision source. */
gen_mov_F0_vreg(0, rm);
break;
}
/* Otherwise fall through */
default:
/* One source operand. */
gen_mov_F0_vreg(dp, rm);
break;
}
} else {
/* Two source operands. */
gen_mov_F0_vreg(dp, rn);
gen_mov_F1_vreg(dp, rm);
}
for (;;) {
/* Perform the calculation. */
switch (op) {
case 0: /* VMLA: fd + (fn * fm) */
/* Note that order of inputs to the add matters for NaNs */
gen_vfp_F1_mul(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_add(dp);
break;
case 1: /* VMLS: fd + -(fn * fm) */
gen_vfp_mul(dp);
gen_vfp_F1_neg(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_add(dp);
break;
case 2: /* VNMLS: -fd + (fn * fm) */
/* Note that it isn't valid to replace (-A + B) with (B - A)
* or similar plausible looking simplifications
* because this will give wrong results for NaNs.
*/
gen_vfp_F1_mul(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_neg(dp);
gen_vfp_add(dp);
break;
case 3: /* VNMLA: -fd + -(fn * fm) */
gen_vfp_mul(dp);
gen_vfp_F1_neg(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_neg(dp);
gen_vfp_add(dp);
break;
case 4: /* mul: fn * fm */
gen_vfp_mul(dp);
break;
case 5: /* nmul: -(fn * fm) */
gen_vfp_mul(dp);
gen_vfp_neg(dp);
break;
case 6: /* add: fn + fm */
gen_vfp_add(dp);
break;
case 7: /* sub: fn - fm */
gen_vfp_sub(dp);
break;
case 8: /* div: fn / fm */
gen_vfp_div(dp);
break;
case 10: /* VFNMA : fd = muladd(-fd, fn, fm) */
case 11: /* VFNMS : fd = muladd(-fd, -fn, fm) */
case 12: /* VFMA : fd = muladd( fd, fn, fm) */
case 13: /* VFMS : fd = muladd( fd, -fn, fm) */
/* These are fused multiply-add, and must be done as one
* floating point operation with no rounding between the
* multiplication and addition steps.
* NB that doing the negations here as separate steps is
* correct : an input NaN should come out with its sign bit
* flipped if it is a negated-input.
*/
if (!arm_dc_feature(s, ARM_FEATURE_VFP4)) {
return 1;
}
if (dp) {
TCGv_ptr fpst;
TCGv_i64 frd;
if (op & 1) {
/* VFNMS, VFMS */
gen_helper_vfp_negd(cpu_F0d, cpu_F0d);
}
frd = tcg_temp_new_i64();
tcg_gen_ld_f64(frd, cpu_env, vfp_reg_offset(dp, rd));
if (op & 2) {
/* VFNMA, VFNMS */
gen_helper_vfp_negd(frd, frd);
}
fpst = get_fpstatus_ptr(0);
gen_helper_vfp_muladdd(cpu_F0d, cpu_F0d,
cpu_F1d, frd, fpst);
tcg_temp_free_ptr(fpst);
tcg_temp_free_i64(frd);
} else {
TCGv_ptr fpst;
TCGv_i32 frd;
if (op & 1) {
/* VFNMS, VFMS */
gen_helper_vfp_negs(cpu_F0s, cpu_F0s);
}
frd = tcg_temp_new_i32();
tcg_gen_ld_f32(frd, cpu_env, vfp_reg_offset(dp, rd));
if (op & 2) {
gen_helper_vfp_negs(frd, frd);
}
fpst = get_fpstatus_ptr(0);
gen_helper_vfp_muladds(cpu_F0s, cpu_F0s,
cpu_F1s, frd, fpst);
tcg_temp_free_ptr(fpst);
tcg_temp_free_i32(frd);
}
break;
case 14: /* fconst */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
n = (insn << 12) & 0x80000000;
i = ((insn >> 12) & 0x70) | (insn & 0xf);
if (dp) {
if (i & 0x40)
i |= 0x3f80;
else
i |= 0x4000;
n |= i << 16;
tcg_gen_movi_i64(cpu_F0d, ((uint64_t)n) << 32);
} else {
if (i & 0x40)
i |= 0x780;
else
i |= 0x800;
n |= i << 19;
tcg_gen_movi_i32(cpu_F0s, n);
}
break;
case 15: /* extension space */
switch (rn) {
case 0: /* cpy */
/* no-op */
break;
case 1: /* abs */
gen_vfp_abs(dp);
break;
case 2: /* neg */
gen_vfp_neg(dp);
break;
case 3: /* sqrt */
gen_vfp_sqrt(dp);
break;
case 4: /* vcvtb.f32.f16, vcvtb.f64.f16 */
tmp = gen_vfp_mrs();
tcg_gen_ext16u_i32(tmp, tmp);
if (dp) {
gen_helper_vfp_fcvt_f16_to_f64(cpu_F0d, tmp,
cpu_env);
} else {
gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp,
cpu_env);
}
tcg_temp_free_i32(tmp);
break;
case 5: /* vcvtt.f32.f16, vcvtt.f64.f16 */
tmp = gen_vfp_mrs();
tcg_gen_shri_i32(tmp, tmp, 16);
if (dp) {
gen_helper_vfp_fcvt_f16_to_f64(cpu_F0d, tmp,
cpu_env);
} else {
gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp,
cpu_env);
}
tcg_temp_free_i32(tmp);
break;
case 6: /* vcvtb.f16.f32, vcvtb.f16.f64 */
tmp = tcg_temp_new_i32();
if (dp) {
gen_helper_vfp_fcvt_f64_to_f16(tmp, cpu_F0d,
cpu_env);
} else {
gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s,
cpu_env);
}
gen_mov_F0_vreg(0, rd);
tmp2 = gen_vfp_mrs();
tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000);
tcg_gen_or_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
gen_vfp_msr(tmp);
break;
case 7: /* vcvtt.f16.f32, vcvtt.f16.f64 */
tmp = tcg_temp_new_i32();
if (dp) {
gen_helper_vfp_fcvt_f64_to_f16(tmp, cpu_F0d,
cpu_env);
} else {
gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s,
cpu_env);
}
tcg_gen_shli_i32(tmp, tmp, 16);
gen_mov_F0_vreg(0, rd);
tmp2 = gen_vfp_mrs();
tcg_gen_ext16u_i32(tmp2, tmp2);
tcg_gen_or_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
gen_vfp_msr(tmp);
break;
case 8: /* cmp */
gen_vfp_cmp(dp);
break;
case 9: /* cmpe */
gen_vfp_cmpe(dp);
break;
case 10: /* cmpz */
gen_vfp_cmp(dp);
break;
case 11: /* cmpez */
gen_vfp_F1_ld0(dp);
gen_vfp_cmpe(dp);
break;
case 12: /* vrintr */
{
TCGv_ptr fpst = get_fpstatus_ptr(0);
if (dp) {
gen_helper_rintd(cpu_F0d, cpu_F0d, fpst);
} else {
gen_helper_rints(cpu_F0s, cpu_F0s, fpst);
}
tcg_temp_free_ptr(fpst);
break;
}
case 13: /* vrintz */
{
TCGv_ptr fpst = get_fpstatus_ptr(0);
TCGv_i32 tcg_rmode;
tcg_rmode = tcg_const_i32(float_round_to_zero);
gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
if (dp) {
gen_helper_rintd(cpu_F0d, cpu_F0d, fpst);
} else {
gen_helper_rints(cpu_F0s, cpu_F0s, fpst);
}
gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
tcg_temp_free_i32(tcg_rmode);
tcg_temp_free_ptr(fpst);
break;
}
case 14: /* vrintx */
{
TCGv_ptr fpst = get_fpstatus_ptr(0);
if (dp) {
gen_helper_rintd_exact(cpu_F0d, cpu_F0d, fpst);
} else {
gen_helper_rints_exact(cpu_F0s, cpu_F0s, fpst);
}
tcg_temp_free_ptr(fpst);
break;
}
case 15: /* single<->double conversion */
if (dp)
gen_helper_vfp_fcvtsd(cpu_F0s, cpu_F0d, cpu_env);
else
gen_helper_vfp_fcvtds(cpu_F0d, cpu_F0s, cpu_env);
break;
case 16: /* fuito */
gen_vfp_uito(dp, 0);
break;
case 17: /* fsito */
gen_vfp_sito(dp, 0);
break;
case 20: /* fshto */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_shto(dp, 16 - rm, 0);
break;
case 21: /* fslto */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_slto(dp, 32 - rm, 0);
break;
case 22: /* fuhto */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_uhto(dp, 16 - rm, 0);
break;
case 23: /* fulto */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_ulto(dp, 32 - rm, 0);
break;
case 24: /* ftoui */
gen_vfp_toui(dp, 0);
break;
case 25: /* ftouiz */
gen_vfp_touiz(dp, 0);
break;
case 26: /* ftosi */
gen_vfp_tosi(dp, 0);
break;
case 27: /* ftosiz */
gen_vfp_tosiz(dp, 0);
break;
case 28: /* ftosh */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_tosh(dp, 16 - rm, 0);
break;
case 29: /* ftosl */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_tosl(dp, 32 - rm, 0);
break;
case 30: /* ftouh */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_touh(dp, 16 - rm, 0);
break;
case 31: /* ftoul */
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return 1;
}
gen_vfp_toul(dp, 32 - rm, 0);
break;
default: /* undefined */
return 1;
}
break;
default: /* undefined */
return 1;
}
/* Write back the result. */
if (op == 15 && (rn >= 8 && rn <= 11)) {
/* Comparison, do nothing. */
} else if (op == 15 && dp && ((rn & 0x1c) == 0x18 ||
(rn & 0x1e) == 0x6)) {
/* VCVT double to int: always integer result.
* VCVT double to half precision is always a single
* precision result.
*/
gen_mov_vreg_F0(0, rd);
} else if (op == 15 && rn == 15) {
/* conversion */
gen_mov_vreg_F0(!dp, rd);
} else {
gen_mov_vreg_F0(dp, rd);
}
/* break out of the loop if we have finished */
if (veclen == 0)
break;
if (op == 15 && delta_m == 0) {
/* single source one-many */
while (veclen--) {
rd = ((rd + delta_d) & (bank_mask - 1))
| (rd & bank_mask);
gen_mov_vreg_F0(dp, rd);
}
break;
}
/* Setup the next operands. */
veclen--;
rd = ((rd + delta_d) & (bank_mask - 1))
| (rd & bank_mask);
if (op == 15) {
/* One source operand. */
rm = ((rm + delta_m) & (bank_mask - 1))
| (rm & bank_mask);
gen_mov_F0_vreg(dp, rm);
} else {
/* Two source operands. */
rn = ((rn + delta_d) & (bank_mask - 1))
| (rn & bank_mask);
gen_mov_F0_vreg(dp, rn);
if (delta_m) {
rm = ((rm + delta_m) & (bank_mask - 1))
| (rm & bank_mask);
gen_mov_F1_vreg(dp, rm);
}
}
}
}
break;
case 0xc:
case 0xd:
if ((insn & 0x03e00000) == 0x00400000) {
/* two-register transfer */
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
if (dp) {
VFP_DREG_M(rm, insn);
} else {
rm = VFP_SREG_M(insn);
}
if (insn & ARM_CP_RW_BIT) {
/* vfp->arm */
if (dp) {
gen_mov_F0_vreg(0, rm * 2);
tmp = gen_vfp_mrs();
store_reg(s, rd, tmp);
gen_mov_F0_vreg(0, rm * 2 + 1);
tmp = gen_vfp_mrs();
store_reg(s, rn, tmp);
} else {
gen_mov_F0_vreg(0, rm);
tmp = gen_vfp_mrs();
store_reg(s, rd, tmp);
gen_mov_F0_vreg(0, rm + 1);
tmp = gen_vfp_mrs();
store_reg(s, rn, tmp);
}
} else {
/* arm->vfp */
if (dp) {
tmp = load_reg(s, rd);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm * 2);
tmp = load_reg(s, rn);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm * 2 + 1);
} else {
tmp = load_reg(s, rd);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm);
tmp = load_reg(s, rn);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm + 1);
}
}
} else {
/* Load/store */
rn = (insn >> 16) & 0xf;
if (dp)
VFP_DREG_D(rd, insn);
else
rd = VFP_SREG_D(insn);
if ((insn & 0x01200000) == 0x01000000) {
/* Single load/store */
offset = (insn & 0xff) << 2;
if ((insn & (1 << 23)) == 0)
offset = -offset;
if (s->thumb && rn == 15) {
/* This is actually UNPREDICTABLE */
addr = tcg_temp_new_i32();
tcg_gen_movi_i32(addr, s->pc & ~2);
} else {
addr = load_reg(s, rn);
}
tcg_gen_addi_i32(addr, addr, offset);
if (insn & (1 << 20)) {
gen_vfp_ld(s, dp, addr);
gen_mov_vreg_F0(dp, rd);
} else {
gen_mov_F0_vreg(dp, rd);
gen_vfp_st(s, dp, addr);
}
tcg_temp_free_i32(addr);
} else {
/* load/store multiple */
int w = insn & (1 << 21);
if (dp)
n = (insn >> 1) & 0x7f;
else
n = insn & 0xff;
if (w && !(((insn >> 23) ^ (insn >> 24)) & 1)) {
/* P == U , W == 1 => UNDEF */
return 1;
}
if (n == 0 || (rd + n) > 32 || (dp && n > 16)) {
/* UNPREDICTABLE cases for bad immediates: we choose to
* UNDEF to avoid generating huge numbers of TCG ops
*/
return 1;
}
if (rn == 15 && w) {
/* writeback to PC is UNPREDICTABLE, we choose to UNDEF */
return 1;
}
if (s->thumb && rn == 15) {
/* This is actually UNPREDICTABLE */
addr = tcg_temp_new_i32();
tcg_gen_movi_i32(addr, s->pc & ~2);
} else {
addr = load_reg(s, rn);
}
if (insn & (1 << 24)) /* pre-decrement */
tcg_gen_addi_i32(addr, addr, -((insn & 0xff) << 2));
if (dp)
offset = 8;
else
offset = 4;
for (i = 0; i < n; i++) {
if (insn & ARM_CP_RW_BIT) {
/* load */
gen_vfp_ld(s, dp, addr);
gen_mov_vreg_F0(dp, rd + i);
} else {
/* store */
gen_mov_F0_vreg(dp, rd + i);
gen_vfp_st(s, dp, addr);
}
tcg_gen_addi_i32(addr, addr, offset);
}
if (w) {
/* writeback */
if (insn & (1 << 24))
offset = -offset * n;
else if (dp && (insn & 1))
offset = 4;
else
offset = 0;
if (offset != 0)
tcg_gen_addi_i32(addr, addr, offset);
store_reg(s, rn, addr);
} else {
tcg_temp_free_i32(addr);
}
}
}
break;
default:
/* Should never happen. */
return 1;
}
return 0;
}
| false | qemu | 9dbbc748d671c70599101836cd1c2719d92f3017 |
5,636 | uint32_t cpu_mips_get_random (CPUMIPSState *env)
{
static uint32_t seed = 1;
static uint32_t prev_idx = 0;
uint32_t idx;
/* Don't return same value twice, so get another value */
do {
/* Use a simple algorithm of Linear Congruential Generator
* from ISO/IEC 9899 standard. */
seed = 1103515245 * seed + 12345;
idx = (seed >> 16) % (env->tlb->nb_tlb - env->CP0_Wired) +
env->CP0_Wired;
} while (idx == prev_idx);
prev_idx = idx;
return idx;
}
| false | qemu | 3adafef2f35d9061b56a09071b2589b9e0b36f76 |
5,637 | void ppc_hash64_store_hpte(PowerPCCPU *cpu,
target_ulong pte_index,
target_ulong pte0, target_ulong pte1)
{
CPUPPCState *env = &cpu->env;
if (env->external_htab == MMU_HASH64_KVM_MANAGED_HPT) {
kvmppc_hash64_write_pte(env, pte_index, pte0, pte1);
return;
}
pte_index *= HASH_PTE_SIZE_64;
if (env->external_htab) {
stq_p(env->external_htab + pte_index, pte0);
stq_p(env->external_htab + pte_index + HASH_PTE_SIZE_64 / 2, pte1);
} else {
stq_phys(CPU(cpu)->as, env->htab_base + pte_index, pte0);
stq_phys(CPU(cpu)->as,
env->htab_base + pte_index + HASH_PTE_SIZE_64 / 2, pte1);
}
}
| false | qemu | 1ad9f0a464fe78d30ee60b3629f7a825cf2fab13 |
5,639 | static uint64_t softusb_read(void *opaque, target_phys_addr_t addr,
unsigned size)
{
MilkymistSoftUsbState *s = opaque;
uint32_t r = 0;
addr >>= 2;
switch (addr) {
case R_CTRL:
r = s->regs[addr];
break;
default:
error_report("milkymist_softusb: read access to unknown register 0x"
TARGET_FMT_plx, addr << 2);
break;
}
trace_milkymist_softusb_memory_read(addr << 2, r);
return r;
}
| false | qemu | a8170e5e97ad17ca169c64ba87ae2f53850dab4c |
5,641 | GuestExec *qmp_guest_exec(const char *path,
bool has_arg, strList *arg,
bool has_env, strList *env,
bool has_input_data, const char *input_data,
bool has_capture_output, bool capture_output,
Error **err)
{
GPid pid;
GuestExec *ge = NULL;
GuestExecInfo *gei;
char **argv, **envp;
strList arglist;
gboolean ret;
GError *gerr = NULL;
gint in_fd, out_fd, err_fd;
GIOChannel *in_ch, *out_ch, *err_ch;
GSpawnFlags flags;
bool has_output = (has_capture_output && capture_output);
arglist.value = (char *)path;
arglist.next = has_arg ? arg : NULL;
argv = guest_exec_get_args(&arglist, true);
envp = has_env ? guest_exec_get_args(env, false) : NULL;
flags = G_SPAWN_SEARCH_PATH | G_SPAWN_DO_NOT_REAP_CHILD;
#if GLIB_CHECK_VERSION(2, 33, 2)
flags |= G_SPAWN_SEARCH_PATH_FROM_ENVP;
#endif
if (!has_output) {
flags |= G_SPAWN_STDOUT_TO_DEV_NULL | G_SPAWN_STDERR_TO_DEV_NULL;
}
ret = g_spawn_async_with_pipes(NULL, argv, envp, flags,
guest_exec_task_setup, NULL, &pid, has_input_data ? &in_fd : NULL,
has_output ? &out_fd : NULL, has_output ? &err_fd : NULL, &gerr);
if (!ret) {
error_setg(err, QERR_QGA_COMMAND_FAILED, gerr->message);
g_error_free(gerr);
goto done;
}
ge = g_new0(GuestExec, 1);
ge->pid = gpid_to_int64(pid);
gei = guest_exec_info_add(pid);
gei->has_output = has_output;
g_child_watch_add(pid, guest_exec_child_watch, gei);
if (has_input_data) {
gei->in.data = g_base64_decode(input_data, &gei->in.size);
#ifdef G_OS_WIN32
in_ch = g_io_channel_win32_new_fd(in_fd);
#else
in_ch = g_io_channel_unix_new(in_fd);
#endif
g_io_channel_set_encoding(in_ch, NULL, NULL);
g_io_channel_set_buffered(in_ch, false);
g_io_channel_set_flags(in_ch, G_IO_FLAG_NONBLOCK, NULL);
g_io_add_watch(in_ch, G_IO_OUT, guest_exec_input_watch, &gei->in);
}
if (has_output) {
#ifdef G_OS_WIN32
out_ch = g_io_channel_win32_new_fd(out_fd);
err_ch = g_io_channel_win32_new_fd(err_fd);
#else
out_ch = g_io_channel_unix_new(out_fd);
err_ch = g_io_channel_unix_new(err_fd);
#endif
g_io_channel_set_encoding(out_ch, NULL, NULL);
g_io_channel_set_encoding(err_ch, NULL, NULL);
g_io_channel_set_buffered(out_ch, false);
g_io_channel_set_buffered(err_ch, false);
g_io_add_watch(out_ch, G_IO_IN | G_IO_HUP,
guest_exec_output_watch, &gei->out);
g_io_add_watch(err_ch, G_IO_IN | G_IO_HUP,
guest_exec_output_watch, &gei->err);
}
done:
g_free(argv);
g_free(envp);
return ge;
}
| false | qemu | 920639cab0fe28d003c90b53bd8b66e8fb333bdd |
5,642 | static uint32_t cuda_readb(void *opaque, target_phys_addr_t addr)
{
CUDAState *s = opaque;
uint32_t val;
addr = (addr >> 9) & 0xf;
switch(addr) {
case 0:
val = s->b;
break;
case 1:
val = s->a;
break;
case 2:
val = s->dirb;
break;
case 3:
val = s->dira;
break;
case 4:
val = get_counter(&s->timers[0]) & 0xff;
s->ifr &= ~T1_INT;
cuda_update_irq(s);
break;
case 5:
val = get_counter(&s->timers[0]) >> 8;
cuda_update_irq(s);
break;
case 6:
val = s->timers[0].latch & 0xff;
break;
case 7:
/* XXX: check this */
val = (s->timers[0].latch >> 8) & 0xff;
break;
case 8:
val = get_counter(&s->timers[1]) & 0xff;
s->ifr &= ~T2_INT;
break;
case 9:
val = get_counter(&s->timers[1]) >> 8;
break;
case 10:
val = s->sr;
s->ifr &= ~SR_INT;
cuda_update_irq(s);
break;
case 11:
val = s->acr;
break;
case 12:
val = s->pcr;
break;
case 13:
val = s->ifr;
if (s->ifr & s->ier)
val |= 0x80;
break;
case 14:
val = s->ier | 0x80;
break;
default:
case 15:
val = s->anh;
break;
}
if (addr != 13 || val != 0) {
CUDA_DPRINTF("read: reg=0x%x val=%02x\n", (int)addr, val);
}
return val;
}
| false | qemu | a8170e5e97ad17ca169c64ba87ae2f53850dab4c |
5,643 | assigned_dev_msix_mmio_read(void *opaque, target_phys_addr_t addr,
unsigned size)
{
AssignedDevice *adev = opaque;
uint64_t val;
memcpy(&val, (void *)((uint8_t *)adev->msix_table + addr), size);
return val;
}
| false | qemu | a8170e5e97ad17ca169c64ba87ae2f53850dab4c |
5,644 | void ff_jpegls_init_state(JLSState *state){
int i;
state->twonear = state->near * 2 + 1;
state->range = ((state->maxval + state->twonear - 1) / state->twonear) + 1;
// QBPP = ceil(log2(RANGE))
for(state->qbpp = 0; (1 << state->qbpp) < state->range; state->qbpp++);
if(state->bpp < 8)
state->limit = 16 + 2 * state->bpp - state->qbpp;
else
state->limit = (4 * state->bpp) - state->qbpp;
for(i = 0; i < 367; i++) {
state->A[i] = FFMAX((state->range + 32) >> 6, 2);
state->N[i] = 1;
}
}
| false | FFmpeg | 387783749faca39c98571d139c32866923ab5653 |
5,645 | static int rtl8139_can_receive(void *opaque)
{
RTL8139State *s = opaque;
int avail;
/* Receive (drop) packets if card is disabled. */
if (!s->clock_enabled)
return 1;
if (!rtl8139_receiver_enabled(s))
return 1;
if (rtl8139_cp_receiver_enabled(s)) {
/* ??? Flow control not implemented in c+ mode.
This is a hack to work around slirp deficiencies anyway. */
return 1;
} else {
avail = MOD2(s->RxBufferSize + s->RxBufPtr - s->RxBufAddr,
s->RxBufferSize);
return (avail == 0 || avail >= 1514);
}
}
| false | qemu | e3f5ec2b5e92706e3b807059f79b1fb5d936e567 |
5,647 | TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
{
TC6393xbState *s;
DriveInfo *nand;
static const MemoryRegionOps tc6393xb_ops = {
.read = tc6393xb_readb,
.write = tc6393xb_writeb,
.endianness = DEVICE_NATIVE_ENDIAN,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
},
};
s = (TC6393xbState *) g_malloc0(sizeof(TC6393xbState));
s->irq = irq;
s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS);
s->l3v = *qemu_allocate_irqs(tc6393xb_l3v, s, 1);
s->blanked = 1;
s->sub_irqs = qemu_allocate_irqs(tc6393xb_sub_irq, s, TC6393XB_NR_IRQS);
nand = drive_get(IF_MTD, 0, 0);
s->flash = nand_init(nand ? blk_bs(blk_by_legacy_dinfo(nand)) : NULL,
NAND_MFR_TOSHIBA, 0x76);
memory_region_init_io(&s->iomem, NULL, &tc6393xb_ops, s, "tc6393xb", 0x10000);
memory_region_add_subregion(sysmem, base, &s->iomem);
memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000,
&error_abort);
vmstate_register_ram_global(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
memory_region_add_subregion(sysmem, base + 0x100000, &s->vram);
s->scr_width = 480;
s->scr_height = 640;
s->con = graphic_console_init(NULL, 0, &tc6393xb_gfx_ops, s);
return s;
}
| false | qemu | 4be746345f13e99e468c60acbd3a355e8183e3ce |
5,649 | int coroutine_fn bdrv_co_copy_on_readv(BlockDriverState *bs,
int64_t sector_num, int nb_sectors, QEMUIOVector *qiov)
{
trace_bdrv_co_copy_on_readv(bs, sector_num, nb_sectors);
return bdrv_co_do_readv(bs, sector_num, nb_sectors, qiov,
BDRV_REQ_COPY_ON_READ);
}
| false | qemu | 61007b316cd71ee7333ff7a0a749a8949527575f |
5,650 | static void v9fs_lcreate(void *opaque)
{
int32_t dfid, flags, mode;
gid_t gid;
ssize_t err = 0;
ssize_t offset = 7;
V9fsString name;
V9fsFidState *fidp;
struct stat stbuf;
V9fsQID qid;
int32_t iounit;
V9fsPDU *pdu = opaque;
pdu_unmarshal(pdu, offset, "dsddd", &dfid, &name, &flags,
&mode, &gid);
trace_v9fs_lcreate(pdu->tag, pdu->id, dfid, flags, mode, gid);
fidp = get_fid(pdu, dfid);
if (fidp == NULL) {
err = -ENOENT;
goto out_nofid;
}
flags = get_dotl_openflags(pdu->s, flags);
err = v9fs_co_open2(pdu, fidp, &name, gid,
flags | O_CREAT, mode, &stbuf);
if (err < 0) {
goto out;
}
fidp->fid_type = P9_FID_FILE;
fidp->open_flags = flags;
if (flags & O_EXCL) {
/*
* We let the host file system do O_EXCL check
* We should not reclaim such fd
*/
fidp->flags |= FID_NON_RECLAIMABLE;
}
iounit = get_iounit(pdu, &fidp->path);
stat_to_qid(&stbuf, &qid);
offset += pdu_marshal(pdu, offset, "Qd", &qid, iounit);
err = offset;
trace_v9fs_lcreate_return(pdu->tag, pdu->id,
qid.type, qid.version, qid.path, iounit);
out:
put_fid(pdu, fidp);
out_nofid:
complete_pdu(pdu->s, pdu, err);
v9fs_string_free(&name);
}
| false | qemu | ddca7f86ac022289840e0200fd4050b2b58e9176 |
5,651 | void s390_virtio_irq(S390CPU *cpu, int config_change, uint64_t token)
{
if (kvm_enabled()) {
kvm_s390_virtio_irq(cpu, config_change, token);
} else {
cpu_inject_ext(cpu, EXT_VIRTIO, config_change, token);
}
}
| false | qemu | de13d2161473d02ae97ec0f8e4503147554892dd |
5,652 | static int aiocb_needs_copy(struct qemu_paiocb *aiocb)
{
if (aiocb->aio_flags & QEMU_AIO_SECTOR_ALIGNED) {
int i;
for (i = 0; i < aiocb->aio_niov; i++)
if ((uintptr_t) aiocb->aio_iov[i].iov_base % 512)
return 1;
}
return 0;
}
| false | qemu | 9ef91a677110ec200d7b2904fc4bcae5a77329ad |
5,653 | static void virtio_net_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->init = virtio_net_init_pci;
k->exit = virtio_net_exit_pci;
k->romfile = "pxe-virtio.rom";
k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
k->device_id = PCI_DEVICE_ID_VIRTIO_NET;
k->revision = VIRTIO_PCI_ABI_VERSION;
k->class_id = PCI_CLASS_NETWORK_ETHERNET;
dc->alias = "virtio-net";
dc->reset = virtio_pci_reset;
dc->props = virtio_net_properties;
}
| false | qemu | 6acbe4c6f18e7de00481ff30574262b58526de45 |
5,654 | static int jpg_decode_data(JPGContext *c, int width, int height,
const uint8_t *src, int src_size,
uint8_t *dst, int dst_stride,
const uint8_t *mask, int mask_stride, int num_mbs,
int swapuv)
{
GetBitContext gb;
int mb_w, mb_h, mb_x, mb_y, i, j;
int bx, by;
int unesc_size;
int ret;
if ((ret = av_reallocp(&c->buf,
src_size + FF_INPUT_BUFFER_PADDING_SIZE)) < 0)
return ret;
jpg_unescape(src, src_size, c->buf, &unesc_size);
memset(c->buf + unesc_size, 0, FF_INPUT_BUFFER_PADDING_SIZE);
init_get_bits8(&gb, c->buf, unesc_size);
width = FFALIGN(width, 16);
mb_w = width >> 4;
mb_h = (height + 15) >> 4;
if (!num_mbs)
num_mbs = mb_w * mb_h * 4;
for (i = 0; i < 3; i++)
c->prev_dc[i] = 1024;
bx =
by = 0;
c->bdsp.clear_blocks(c->block[0]);
for (mb_y = 0; mb_y < mb_h; mb_y++) {
for (mb_x = 0; mb_x < mb_w; mb_x++) {
if (mask && !mask[mb_x * 2] && !mask[mb_x * 2 + 1] &&
!mask[mb_x * 2 + mask_stride] &&
!mask[mb_x * 2 + 1 + mask_stride]) {
bx += 16;
continue;
}
for (j = 0; j < 2; j++) {
for (i = 0; i < 2; i++) {
if (mask && !mask[mb_x * 2 + i + j * mask_stride])
continue;
num_mbs--;
if ((ret = jpg_decode_block(c, &gb, 0,
c->block[i + j * 2])) != 0)
return ret;
c->idsp.idct(c->block[i + j * 2]);
}
}
for (i = 1; i < 3; i++) {
if ((ret = jpg_decode_block(c, &gb, i, c->block[i + 3])) != 0)
return ret;
c->idsp.idct(c->block[i + 3]);
}
for (j = 0; j < 16; j++) {
uint8_t *out = dst + bx * 3 + (by + j) * dst_stride;
for (i = 0; i < 16; i++) {
int Y, U, V;
Y = c->block[(j >> 3) * 2 + (i >> 3)][(i & 7) + (j & 7) * 8];
U = c->block[4 ^ swapuv][(i >> 1) + (j >> 1) * 8] - 128;
V = c->block[5 ^ swapuv][(i >> 1) + (j >> 1) * 8] - 128;
yuv2rgb(out + i * 3, Y, U, V);
}
}
if (!num_mbs)
return 0;
bx += 16;
}
bx = 0;
by += 16;
if (mask)
mask += mask_stride * 2;
}
return 0;
}
| false | FFmpeg | b1b0baa3d6a30942b258dddfdd04b4b24c713879 |
5,655 | static inline void upmix_mono_to_stereo(AC3DecodeContext *ctx)
{
int i;
float (*output)[256] = ctx->audio_block.block_output;
for (i = 0; i < 256; i++)
output[2][i] = output[1][i];
}
| false | FFmpeg | 486637af8ef29ec215e0e0b7ecd3b5470f0e04e5 |
5,656 | static void gen_flt3_arith (DisasContext *ctx, uint32_t opc, int fd,
int fr, int fs, int ft)
{
const char *opn = "flt3_arith";
/* All of those work only on 64bit FPUs. */
gen_op_cp1_64bitmode();
switch (opc) {
case OPC_ALNV_PS:
GEN_LOAD_REG_TN(T0, fr);
GEN_LOAD_FREG_FTN(DT0, fs);
GEN_LOAD_FREG_FTN(DT1, ft);
gen_op_float_alnv_ps();
GEN_STORE_FTN_FREG(fd, DT2);
opn = "alnv.ps";
break;
case OPC_MADD_S:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
gen_op_float_muladd_s();
GEN_STORE_FTN_FREG(fd, WT2);
opn = "madd.s";
break;
case OPC_MADD_D:
GEN_LOAD_FREG_FTN(DT0, fs);
GEN_LOAD_FREG_FTN(DT1, ft);
GEN_LOAD_FREG_FTN(DT2, fr);
gen_op_float_muladd_d();
GEN_STORE_FTN_FREG(fd, DT2);
opn = "madd.d";
break;
case OPC_MADD_PS:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WTH0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WTH1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
GEN_LOAD_FREG_FTN(WTH2, fr);
gen_op_float_muladd_ps();
GEN_STORE_FTN_FREG(fd, WT2);
GEN_STORE_FTN_FREG(fd, WTH2);
opn = "madd.ps";
break;
case OPC_MSUB_S:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
gen_op_float_mulsub_s();
GEN_STORE_FTN_FREG(fd, WT2);
opn = "msub.s";
break;
case OPC_MSUB_D:
GEN_LOAD_FREG_FTN(DT0, fs);
GEN_LOAD_FREG_FTN(DT1, ft);
GEN_LOAD_FREG_FTN(DT2, fr);
gen_op_float_mulsub_d();
GEN_STORE_FTN_FREG(fd, DT2);
opn = "msub.d";
break;
case OPC_MSUB_PS:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WTH0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WTH1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
GEN_LOAD_FREG_FTN(WTH2, fr);
gen_op_float_mulsub_ps();
GEN_STORE_FTN_FREG(fd, WT2);
GEN_STORE_FTN_FREG(fd, WTH2);
opn = "msub.ps";
break;
case OPC_NMADD_S:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
gen_op_float_nmuladd_s();
GEN_STORE_FTN_FREG(fd, WT2);
opn = "nmadd.s";
break;
case OPC_NMADD_D:
GEN_LOAD_FREG_FTN(DT0, fs);
GEN_LOAD_FREG_FTN(DT1, ft);
GEN_LOAD_FREG_FTN(DT2, fr);
gen_op_float_nmuladd_d();
GEN_STORE_FTN_FREG(fd, DT2);
opn = "nmadd.d";
break;
case OPC_NMADD_PS:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WTH0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WTH1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
GEN_LOAD_FREG_FTN(WTH2, fr);
gen_op_float_nmuladd_ps();
GEN_STORE_FTN_FREG(fd, WT2);
GEN_STORE_FTN_FREG(fd, WTH2);
opn = "nmadd.ps";
break;
case OPC_NMSUB_S:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
gen_op_float_nmulsub_s();
GEN_STORE_FTN_FREG(fd, WT2);
opn = "nmsub.s";
break;
case OPC_NMSUB_D:
GEN_LOAD_FREG_FTN(DT0, fs);
GEN_LOAD_FREG_FTN(DT1, ft);
GEN_LOAD_FREG_FTN(DT2, fr);
gen_op_float_nmulsub_d();
GEN_STORE_FTN_FREG(fd, DT2);
opn = "nmsub.d";
break;
case OPC_NMSUB_PS:
GEN_LOAD_FREG_FTN(WT0, fs);
GEN_LOAD_FREG_FTN(WTH0, fs);
GEN_LOAD_FREG_FTN(WT1, ft);
GEN_LOAD_FREG_FTN(WTH1, ft);
GEN_LOAD_FREG_FTN(WT2, fr);
GEN_LOAD_FREG_FTN(WTH2, fr);
gen_op_float_nmulsub_ps();
GEN_STORE_FTN_FREG(fd, WT2);
GEN_STORE_FTN_FREG(fd, WTH2);
opn = "nmsub.ps";
break;
default:
MIPS_INVAL(opn);
generate_exception (ctx, EXCP_RI);
return;
}
MIPS_DEBUG("%s %s, %s, %s, %s", opn, fregnames[fd], fregnames[fr],
fregnames[fs], fregnames[ft]);
}
| false | qemu | 5e755519ac9d867f7da13f58a9d0c262db82e14c |
5,657 | static int v9fs_do_lstat(V9fsState *s, V9fsString *path, struct stat *stbuf)
{
return s->ops->lstat(&s->ctx, path->data, stbuf);
}
| false | qemu | 758e8e38eb582e3dc87fd55a1d234c25108a7b7f |
5,658 | static void test_source_timer_schedule(void)
{
TimerTestData data = { .n = 0, .ctx = ctx, .ns = SCALE_MS * 750LL,
.max = 2,
.clock_type = QEMU_CLOCK_VIRTUAL };
int pipefd[2];
int64_t expiry;
/* aio_poll will not block to wait for timers to complete unless it has
* an fd to wait on. Fixing this breaks other tests. So create a dummy one.
*/
g_assert(!qemu_pipe(pipefd));
qemu_set_nonblock(pipefd[0]);
qemu_set_nonblock(pipefd[1]);
aio_set_fd_handler(ctx, pipefd[0],
dummy_io_handler_read, NULL, NULL);
do {} while (g_main_context_iteration(NULL, false));
aio_timer_init(ctx, &data.timer, data.clock_type,
SCALE_NS, timer_test_cb, &data);
expiry = qemu_clock_get_ns(data.clock_type) +
data.ns;
timer_mod(&data.timer, expiry);
g_assert_cmpint(data.n, ==, 0);
g_usleep(1 * G_USEC_PER_SEC);
g_assert_cmpint(data.n, ==, 0);
g_assert(g_main_context_iteration(NULL, false));
g_assert_cmpint(data.n, ==, 1);
/* The comment above was not kidding when it said this wakes up itself */
do {
g_assert(g_main_context_iteration(NULL, true));
} while (qemu_clock_get_ns(data.clock_type) <= expiry);
g_usleep(1 * G_USEC_PER_SEC);
g_main_context_iteration(NULL, false);
g_assert_cmpint(data.n, ==, 2);
aio_set_fd_handler(ctx, pipefd[0], NULL, NULL, NULL);
close(pipefd[0]);
close(pipefd[1]);
timer_del(&data.timer);
}
| false | qemu | ef508f427b348c7f0ef2bfe7c080fe5fcaee9f6b |
5,659 | static void xenfv_machine_options(MachineClass *m)
{
pc_common_machine_options(m);
m->desc = "Xen Fully-virtualized PC";
m->max_cpus = HVM_MAX_VCPUS;
m->default_machine_opts = "accel=xen";
m->hot_add_cpu = pc_hot_add_cpu;
}
| false | qemu | 41742767bfa8127954b6f57b39b590adcde3ac6c |
5,661 | static CharDriverState *qemu_chr_open_socket(QemuOpts *opts)
{
CharDriverState *chr = NULL;
TCPCharDriver *s = NULL;
int fd = -1;
int is_listen;
int is_waitconnect;
int do_nodelay;
int is_unix;
int is_telnet;
is_listen = qemu_opt_get_bool(opts, "server", 0);
is_waitconnect = qemu_opt_get_bool(opts, "wait", 1);
is_telnet = qemu_opt_get_bool(opts, "telnet", 0);
do_nodelay = !qemu_opt_get_bool(opts, "delay", 1);
is_unix = qemu_opt_get(opts, "path") != NULL;
if (!is_listen)
is_waitconnect = 0;
chr = g_malloc0(sizeof(CharDriverState));
s = g_malloc0(sizeof(TCPCharDriver));
if (is_unix) {
if (is_listen) {
fd = unix_listen_opts(opts);
} else {
fd = unix_connect_opts(opts);
}
} else {
if (is_listen) {
fd = inet_listen_opts(opts, 0, NULL);
} else {
fd = inet_connect_opts(opts, NULL);
}
}
if (fd < 0) {
goto fail;
}
if (!is_waitconnect)
socket_set_nonblock(fd);
s->connected = 0;
s->fd = -1;
s->listen_fd = -1;
s->msgfd = -1;
s->is_unix = is_unix;
s->do_nodelay = do_nodelay && !is_unix;
chr->opaque = s;
chr->chr_write = tcp_chr_write;
chr->chr_close = tcp_chr_close;
chr->get_msgfd = tcp_get_msgfd;
chr->chr_add_client = tcp_chr_add_client;
if (is_listen) {
s->listen_fd = fd;
qemu_set_fd_handler2(s->listen_fd, NULL, tcp_chr_accept, NULL, chr);
if (is_telnet)
s->do_telnetopt = 1;
} else {
s->connected = 1;
s->fd = fd;
socket_set_nodelay(fd);
tcp_chr_connect(chr);
}
/* for "info chardev" monitor command */
chr->filename = g_malloc(256);
if (is_unix) {
snprintf(chr->filename, 256, "unix:%s%s",
qemu_opt_get(opts, "path"),
qemu_opt_get_bool(opts, "server", 0) ? ",server" : "");
} else if (is_telnet) {
snprintf(chr->filename, 256, "telnet:%s:%s%s",
qemu_opt_get(opts, "host"), qemu_opt_get(opts, "port"),
qemu_opt_get_bool(opts, "server", 0) ? ",server" : "");
} else {
snprintf(chr->filename, 256, "tcp:%s:%s%s",
qemu_opt_get(opts, "host"), qemu_opt_get(opts, "port"),
qemu_opt_get_bool(opts, "server", 0) ? ",server" : "");
}
if (is_listen && is_waitconnect) {
printf("QEMU waiting for connection on: %s\n",
chr->filename);
tcp_chr_accept(chr);
socket_set_nonblock(s->listen_fd);
}
return chr;
fail:
if (fd >= 0)
closesocket(fd);
g_free(s);
g_free(chr);
return NULL;
}
| false | qemu | 02a08fef079469c005d48fe2d181f0e0eb5752ae |
5,662 | static void vfio_enable_intx_kvm(VFIODevice *vdev)
{
#ifdef CONFIG_KVM
struct kvm_irqfd irqfd = {
.fd = event_notifier_get_fd(&vdev->intx.interrupt),
.gsi = vdev->intx.route.irq,
.flags = KVM_IRQFD_FLAG_RESAMPLE,
};
struct vfio_irq_set *irq_set;
int ret, argsz;
int32_t *pfd;
if (!kvm_irqfds_enabled() ||
vdev->intx.route.mode != PCI_INTX_ENABLED ||
!kvm_check_extension(kvm_state, KVM_CAP_IRQFD_RESAMPLE)) {
return;
}
/* Get to a known interrupt state */
qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev);
vfio_mask_intx(vdev);
vdev->intx.pending = false;
qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
/* Get an eventfd for resample/unmask */
if (event_notifier_init(&vdev->intx.unmask, 0)) {
error_report("vfio: Error: event_notifier_init failed eoi");
goto fail;
}
/* KVM triggers it, VFIO listens for it */
irqfd.resamplefd = event_notifier_get_fd(&vdev->intx.unmask);
if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
error_report("vfio: Error: Failed to setup resample irqfd: %m");
goto fail_irqfd;
}
argsz = sizeof(*irq_set) + sizeof(*pfd);
irq_set = g_malloc0(argsz);
irq_set->argsz = argsz;
irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_UNMASK;
irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
irq_set->start = 0;
irq_set->count = 1;
pfd = (int32_t *)&irq_set->data;
*pfd = irqfd.resamplefd;
ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
g_free(irq_set);
if (ret) {
error_report("vfio: Error: Failed to setup INTx unmask fd: %m");
goto fail_vfio;
}
/* Let'em rip */
vfio_unmask_intx(vdev);
vdev->intx.kvm_accel = true;
DPRINTF("%s(%04x:%02x:%02x.%x) KVM INTx accel enabled\n",
__func__, vdev->host.domain, vdev->host.bus,
vdev->host.slot, vdev->host.function);
return;
fail_vfio:
irqfd.flags = KVM_IRQFD_FLAG_DEASSIGN;
kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd);
fail_irqfd:
event_notifier_cleanup(&vdev->intx.unmask);
fail:
qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
vfio_unmask_intx(vdev);
#endif
}
| false | qemu | 82ca891283a08cddd659b534592fe00f2159bc74 |
5,663 | static inline void tcg_out_rld(TCGContext *s, int op, TCGReg ra, TCGReg rs,
int sh, int mb)
{
assert(TCG_TARGET_REG_BITS == 64);
sh = SH(sh & 0x1f) | (((sh >> 5) & 1) << 1);
mb = MB64((mb >> 5) | ((mb << 1) & 0x3f));
tcg_out32(s, op | RA(ra) | RS(rs) | sh | mb);
}
| false | qemu | eabb7b91b36b202b4dac2df2d59d698e3aff197a |
5,664 | static int opt_list(void *obj, void *av_log_obj, char *unit)
{
AVOption *opt=NULL;
while((opt= av_next_option(obj, opt))){
if(!(opt->flags & (AV_OPT_FLAG_ENCODING_PARAM|AV_OPT_FLAG_DECODING_PARAM)))
continue;
/* Don't print CONST's on level one.
* Don't print anything but CONST's on level two.
* Only print items from the requested unit.
*/
if (!unit && opt->type==FF_OPT_TYPE_CONST)
continue;
else if (unit && opt->type!=FF_OPT_TYPE_CONST)
continue;
else if (unit && opt->type==FF_OPT_TYPE_CONST && strcmp(unit, opt->unit))
continue;
else if (unit && opt->type == FF_OPT_TYPE_CONST)
av_log(av_log_obj, AV_LOG_INFO, " %-15s ", opt->name);
else
av_log(av_log_obj, AV_LOG_INFO, "-%-17s ", opt->name);
switch( opt->type )
{
case FF_OPT_TYPE_FLAGS:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "<flags>" );
break;
case FF_OPT_TYPE_INT:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "<int>" );
break;
case FF_OPT_TYPE_INT64:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "<int64>" );
break;
case FF_OPT_TYPE_DOUBLE:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "<double>" );
break;
case FF_OPT_TYPE_FLOAT:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "<float>" );
break;
case FF_OPT_TYPE_STRING:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "<string>" );
break;
case FF_OPT_TYPE_RATIONAL:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "<rational>" );
break;
case FF_OPT_TYPE_CONST:
default:
av_log( av_log_obj, AV_LOG_INFO, "%-7s ", "" );
break;
}
av_log(av_log_obj, AV_LOG_INFO, "%c", (opt->flags & AV_OPT_FLAG_ENCODING_PARAM) ? 'E' : '.');
av_log(av_log_obj, AV_LOG_INFO, "%c", (opt->flags & AV_OPT_FLAG_DECODING_PARAM) ? 'D' : '.');
av_log(av_log_obj, AV_LOG_INFO, "%c", (opt->flags & AV_OPT_FLAG_VIDEO_PARAM ) ? 'V' : '.');
av_log(av_log_obj, AV_LOG_INFO, "%c", (opt->flags & AV_OPT_FLAG_AUDIO_PARAM ) ? 'A' : '.');
av_log(av_log_obj, AV_LOG_INFO, "%c", (opt->flags & AV_OPT_FLAG_SUBTITLE_PARAM) ? 'S' : '.');
if(opt->help)
av_log(av_log_obj, AV_LOG_INFO, " %s", opt->help);
av_log(av_log_obj, AV_LOG_INFO, "\n");
if (opt->unit && opt->type != FF_OPT_TYPE_CONST) {
opt_list(obj, av_log_obj, opt->unit);
}
}
}
| false | FFmpeg | a10c779f76fb5aa6d437c3cd69ac88ad17a30308 |
5,665 | static int set_dirty_tracking(void)
{
BlkMigDevState *bmds;
int ret;
QSIMPLEQ_FOREACH(bmds, &block_mig_state.bmds_list, entry) {
bmds->dirty_bitmap = bdrv_create_dirty_bitmap(bmds->bs, BLOCK_SIZE,
NULL);
if (!bmds->dirty_bitmap) {
ret = -errno;
goto fail;
}
}
return 0;
fail:
QSIMPLEQ_FOREACH(bmds, &block_mig_state.bmds_list, entry) {
if (bmds->dirty_bitmap) {
bdrv_release_dirty_bitmap(bmds->bs, bmds->dirty_bitmap);
}
}
return ret;
}
| false | qemu | 0db6e54a8a2c6e16780356422da671b71f862341 |
5,667 | static void cmd_prevent_allow_medium_removal(IDEState *s, uint8_t* buf)
{
s->tray_locked = buf[4] & 1;
bdrv_lock_medium(s->bs, buf[4] & 1);
ide_atapi_cmd_ok(s);
}
| false | qemu | 4be746345f13e99e468c60acbd3a355e8183e3ce |
5,668 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size)
{
int l;
while (size > 0) {
l = IO_BUF_SIZE - f->buf_index;
if (l > size)
l = size;
memcpy(f->buf + f->buf_index, buf, l);
f->buf_index += l;
buf += l;
size -= l;
if (f->buf_index >= IO_BUF_SIZE)
qemu_fflush(f);
}
}
| false | qemu | 871d2f079661323a7645b388eb5ae8d7eeb3117c |
5,669 | void cpu_exec_init_all(void)
{
#if !defined(CONFIG_USER_ONLY)
qemu_mutex_init(&ram_list.mutex);
memory_map_init();
io_mem_init();
#endif
}
| false | qemu | 38e047b50d2bfd1df99fbbca884c9f1db0785ff4 |
5,671 | static void create_fw_cfg(const VirtBoardInfo *vbi, AddressSpace *as)
{
hwaddr base = vbi->memmap[VIRT_FW_CFG].base;
hwaddr size = vbi->memmap[VIRT_FW_CFG].size;
char *nodename;
fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as);
nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);
qemu_fdt_add_subnode(vbi->fdt, nodename);
qemu_fdt_setprop_string(vbi->fdt, nodename,
"compatible", "qemu,fw-cfg-mmio");
qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
2, base, 2, size);
g_free(nodename);
}
| false | qemu | 5836d16812cda6b93380632802d56411972e3148 |
5,675 | int av_file_map(const char *filename, uint8_t **bufptr, size_t *size,
int log_offset, void *log_ctx)
{
FileLogContext file_log_ctx = { &file_log_ctx_class, log_offset, log_ctx };
int err, fd = open(filename, O_RDONLY);
struct stat st;
av_unused void *ptr;
off_t off_size;
char errbuf[128];
*bufptr = NULL;
if (fd < 0) {
err = AVERROR(errno);
av_strerror(err, errbuf, sizeof(errbuf));
av_log(&file_log_ctx, AV_LOG_ERROR, "Cannot read file '%s': %s\n", filename, errbuf);
return err;
}
if (fstat(fd, &st) < 0) {
err = AVERROR(errno);
av_strerror(err, errbuf, sizeof(errbuf));
av_log(&file_log_ctx, AV_LOG_ERROR, "Error occurred in fstat(): %s\n", errbuf);
close(fd);
return err;
}
off_size = st.st_size;
if (off_size > SIZE_MAX) {
av_log(&file_log_ctx, AV_LOG_ERROR,
"File size for file '%s' is too big\n", filename);
close(fd);
return AVERROR(EINVAL);
}
*size = off_size;
#if HAVE_MMAP
ptr = mmap(NULL, *size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
if ((int)(ptr) == -1) {
err = AVERROR(errno);
av_strerror(err, errbuf, sizeof(errbuf));
av_log(&file_log_ctx, AV_LOG_ERROR, "Error occurred in mmap(): %s\n", errbuf);
close(fd);
return err;
}
*bufptr = ptr;
#elif HAVE_MAPVIEWOFFILE
{
HANDLE mh, fh = (HANDLE)_get_osfhandle(fd);
mh = CreateFileMapping(fh, NULL, PAGE_READONLY, 0, 0, NULL);
if (!mh) {
av_log(&file_log_ctx, AV_LOG_ERROR, "Error occurred in CreateFileMapping()\n");
close(fd);
return -1;
}
ptr = MapViewOfFile(mh, FILE_MAP_READ, 0, 0, *size);
CloseHandle(mh);
if (!ptr) {
av_log(&file_log_ctx, AV_LOG_ERROR, "Error occurred in MapViewOfFile()\n");
close(fd);
return -1;
}
*bufptr = ptr;
}
#else
*bufptr = av_malloc(*size);
if (!*bufptr) {
av_log(&file_log_ctx, AV_LOG_ERROR, "Memory allocation error occurred\n");
close(fd);
return AVERROR(ENOMEM);
}
read(fd, *bufptr, *size);
#endif
close(fd);
return 0;
}
| false | FFmpeg | 10ff2967ea8d17f7e46599497214280a21ca409a |
5,677 | static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGReg arg1,
int32_t arg2, int const_arg2, int label)
{
tcg_out_cmp(s, arg1, arg2, const_arg2);
tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_ICC | BPCC_PT, label);
tcg_out_nop(s);
}
| false | qemu | bec1631100323fac0900aea71043d5c4e22fc2fa |
5,678 | static void test_flush(void)
{
AHCIQState *ahci;
ahci = ahci_boot_and_enable();
ahci_test_flush(ahci);
ahci_shutdown(ahci);
}
| false | qemu | debaaa114a8877a939533ba846e64168fb287b7b |
5,679 | static void xtensa_lx200_init(MachineState *machine)
{
static const LxBoardDesc lx200_board = {
.flash_base = 0xf8000000,
.flash_size = 0x01000000,
.flash_sector_size = 0x20000,
.sram_size = 0x2000000,
};
lx_init(&lx200_board, machine);
}
| false | qemu | 68931a4082812f56657b39168e815c48f0ab0a8c |
5,680 | static inline TCGv *compute_ldst_addr(DisasContext *dc, TCGv *t)
{
unsigned int extimm = dc->tb_flags & IMM_FLAG;
/* Should be set to one if r1 is used by loadstores. */
int stackprot = 0;
/* All load/stores use ra. */
if (dc->ra == 1) {
stackprot = 1;
}
/* Treat the common cases first. */
if (!dc->type_b) {
/* If any of the regs is r0, return a ptr to the other. */
if (dc->ra == 0) {
return &cpu_R[dc->rb];
} else if (dc->rb == 0) {
return &cpu_R[dc->ra];
}
if (dc->rb == 1) {
stackprot = 1;
}
*t = tcg_temp_new();
tcg_gen_add_tl(*t, cpu_R[dc->ra], cpu_R[dc->rb]);
if (stackprot) {
gen_helper_stackprot(cpu_env, *t);
}
return t;
}
/* Immediate. */
if (!extimm) {
if (dc->imm == 0) {
return &cpu_R[dc->ra];
}
*t = tcg_temp_new();
tcg_gen_movi_tl(*t, (int32_t)((int16_t)dc->imm));
tcg_gen_add_tl(*t, cpu_R[dc->ra], *t);
} else {
*t = tcg_temp_new();
tcg_gen_add_tl(*t, cpu_R[dc->ra], *(dec_alu_op_b(dc)));
}
if (stackprot) {
gen_helper_stackprot(cpu_env, *t);
}
return t;
}
| false | qemu | 9aaaa181949e4a23ca298fb7006e2d8bac842e92 |
5,681 | static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx)
{
int op1;
int32_t r1, r2, r3;
int32_t address, const16;
int8_t b, const4;
int32_t bpos;
TCGv temp, temp2, temp3;
op1 = MASK_OP_MAJOR(ctx->opcode);
/* handle JNZ.T opcode only being 6 bit long */
if (unlikely((op1 & 0x3f) == OPCM_32_BRN_JTT)) {
op1 = OPCM_32_BRN_JTT;
}
switch (op1) {
/* ABS-format */
case OPCM_32_ABS_LDW:
decode_abs_ldw(env, ctx);
break;
case OPCM_32_ABS_LDB:
decode_abs_ldb(env, ctx);
break;
case OPCM_32_ABS_LDMST_SWAP:
decode_abs_ldst_swap(env, ctx);
break;
case OPCM_32_ABS_LDST_CONTEXT:
decode_abs_ldst_context(env, ctx);
break;
case OPCM_32_ABS_STORE:
decode_abs_store(env, ctx);
break;
case OPCM_32_ABS_STOREB_H:
decode_abs_storeb_h(env, ctx);
break;
case OPC1_32_ABS_STOREQ:
address = MASK_OP_ABS_OFF18(ctx->opcode);
r1 = MASK_OP_ABS_S1D(ctx->opcode);
temp = tcg_const_i32(EA_ABS_FORMAT(address));
temp2 = tcg_temp_new();
tcg_gen_shri_tl(temp2, cpu_gpr_d[r1], 16);
tcg_gen_qemu_st_tl(temp2, temp, ctx->mem_idx, MO_LEUW);
tcg_temp_free(temp2);
tcg_temp_free(temp);
break;
case OPC1_32_ABS_LD_Q:
address = MASK_OP_ABS_OFF18(ctx->opcode);
r1 = MASK_OP_ABS_S1D(ctx->opcode);
temp = tcg_const_i32(EA_ABS_FORMAT(address));
tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], temp, ctx->mem_idx, MO_LEUW);
tcg_gen_shli_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], 16);
tcg_temp_free(temp);
break;
case OPC1_32_ABS_LEA:
address = MASK_OP_ABS_OFF18(ctx->opcode);
r1 = MASK_OP_ABS_S1D(ctx->opcode);
tcg_gen_movi_tl(cpu_gpr_a[r1], EA_ABS_FORMAT(address));
break;
/* ABSB-format */
case OPC1_32_ABSB_ST_T:
address = MASK_OP_ABS_OFF18(ctx->opcode);
b = MASK_OP_ABSB_B(ctx->opcode);
bpos = MASK_OP_ABSB_BPOS(ctx->opcode);
temp = tcg_const_i32(EA_ABS_FORMAT(address));
temp2 = tcg_temp_new();
tcg_gen_qemu_ld_tl(temp2, temp, ctx->mem_idx, MO_UB);
tcg_gen_andi_tl(temp2, temp2, ~(0x1u << bpos));
tcg_gen_ori_tl(temp2, temp2, (b << bpos));
tcg_gen_qemu_st_tl(temp2, temp, ctx->mem_idx, MO_UB);
tcg_temp_free(temp);
tcg_temp_free(temp2);
break;
/* B-format */
case OPC1_32_B_CALL:
case OPC1_32_B_CALLA:
case OPC1_32_B_J:
case OPC1_32_B_JA:
case OPC1_32_B_JL:
case OPC1_32_B_JLA:
address = MASK_OP_B_DISP24(ctx->opcode);
gen_compute_branch(ctx, op1, 0, 0, 0, address);
break;
/* Bit-format */
case OPCM_32_BIT_ANDACC:
decode_bit_andacc(env, ctx);
break;
case OPCM_32_BIT_LOGICAL_T1:
decode_bit_logical_t(env, ctx);
break;
case OPCM_32_BIT_INSERT:
decode_bit_insert(env, ctx);
break;
case OPCM_32_BIT_LOGICAL_T2:
decode_bit_logical_t2(env, ctx);
break;
case OPCM_32_BIT_ORAND:
decode_bit_orand(env, ctx);
break;
case OPCM_32_BIT_SH_LOGIC1:
decode_bit_sh_logic1(env, ctx);
break;
case OPCM_32_BIT_SH_LOGIC2:
decode_bit_sh_logic2(env, ctx);
break;
/* BO Format */
case OPCM_32_BO_ADDRMODE_POST_PRE_BASE:
decode_bo_addrmode_post_pre_base(env, ctx);
break;
case OPCM_32_BO_ADDRMODE_BITREVERSE_CIRCULAR:
decode_bo_addrmode_bitreverse_circular(env, ctx);
break;
case OPCM_32_BO_ADDRMODE_LD_POST_PRE_BASE:
decode_bo_addrmode_ld_post_pre_base(env, ctx);
break;
case OPCM_32_BO_ADDRMODE_LD_BITREVERSE_CIRCULAR:
decode_bo_addrmode_ld_bitreverse_circular(env, ctx);
break;
case OPCM_32_BO_ADDRMODE_STCTX_POST_PRE_BASE:
decode_bo_addrmode_stctx_post_pre_base(env, ctx);
break;
case OPCM_32_BO_ADDRMODE_LDMST_BITREVERSE_CIRCULAR:
decode_bo_addrmode_ldmst_bitreverse_circular(env, ctx);
break;
/* BOL-format */
case OPC1_32_BOL_LD_A_LONGOFF:
case OPC1_32_BOL_LD_W_LONGOFF:
case OPC1_32_BOL_LEA_LONGOFF:
case OPC1_32_BOL_ST_W_LONGOFF:
case OPC1_32_BOL_ST_A_LONGOFF:
decode_bol_opc(env, ctx, op1);
break;
/* BRC Format */
case OPCM_32_BRC_EQ_NEQ:
case OPCM_32_BRC_GE:
case OPCM_32_BRC_JLT:
case OPCM_32_BRC_JNE:
const4 = MASK_OP_BRC_CONST4_SEXT(ctx->opcode);
address = MASK_OP_BRC_DISP15_SEXT(ctx->opcode);
r1 = MASK_OP_BRC_S1(ctx->opcode);
gen_compute_branch(ctx, op1, r1, 0, const4, address);
break;
/* BRN Format */
case OPCM_32_BRN_JTT:
address = MASK_OP_BRN_DISP15_SEXT(ctx->opcode);
r1 = MASK_OP_BRN_S1(ctx->opcode);
gen_compute_branch(ctx, op1, r1, 0, 0, address);
break;
/* BRR Format */
case OPCM_32_BRR_EQ_NEQ:
case OPCM_32_BRR_ADDR_EQ_NEQ:
case OPCM_32_BRR_GE:
case OPCM_32_BRR_JLT:
case OPCM_32_BRR_JNE:
case OPCM_32_BRR_JNZ:
case OPCM_32_BRR_LOOP:
address = MASK_OP_BRR_DISP15_SEXT(ctx->opcode);
r2 = MASK_OP_BRR_S2(ctx->opcode);
r1 = MASK_OP_BRR_S1(ctx->opcode);
gen_compute_branch(ctx, op1, r1, r2, 0, address);
break;
/* RC Format */
case OPCM_32_RC_LOGICAL_SHIFT:
decode_rc_logical_shift(env, ctx);
break;
case OPCM_32_RC_ACCUMULATOR:
decode_rc_accumulator(env, ctx);
break;
case OPCM_32_RC_SERVICEROUTINE:
decode_rc_serviceroutine(env, ctx);
break;
case OPCM_32_RC_MUL:
decode_rc_mul(env, ctx);
break;
/* RCPW Format */
case OPCM_32_RCPW_MASK_INSERT:
decode_rcpw_insert(env, ctx);
break;
/* RCRR Format */
case OPC1_32_RCRR_INSERT:
r1 = MASK_OP_RCRR_S1(ctx->opcode);
r2 = MASK_OP_RCRR_S3(ctx->opcode);
r3 = MASK_OP_RCRR_D(ctx->opcode);
const16 = MASK_OP_RCRR_CONST4(ctx->opcode);
temp = tcg_const_i32(const16);
temp2 = tcg_temp_new(); /* width*/
temp3 = tcg_temp_new(); /* pos */
tcg_gen_andi_tl(temp2, cpu_gpr_d[r3+1], 0x1f);
tcg_gen_andi_tl(temp3, cpu_gpr_d[r3], 0x1f);
gen_insert(cpu_gpr_d[r2], cpu_gpr_d[r1], temp, temp2, temp3);
tcg_temp_free(temp);
tcg_temp_free(temp2);
tcg_temp_free(temp3);
break;
/* RCRW Format */
case OPCM_32_RCRW_MASK_INSERT:
decode_rcrw_insert(env, ctx);
break;
/* RCR Format */
case OPCM_32_RCR_COND_SELECT:
decode_rcr_cond_select(env, ctx);
break;
case OPCM_32_RCR_MADD:
decode_rcr_madd(env, ctx);
break;
case OPCM_32_RCR_MSUB:
decode_rcr_msub(env, ctx);
break;
/* RLC Format */
case OPC1_32_RLC_ADDI:
case OPC1_32_RLC_ADDIH:
case OPC1_32_RLC_ADDIH_A:
case OPC1_32_RLC_MFCR:
case OPC1_32_RLC_MOV:
case OPC1_32_RLC_MOV_64:
case OPC1_32_RLC_MOV_U:
case OPC1_32_RLC_MOV_H:
case OPC1_32_RLC_MOVH_A:
case OPC1_32_RLC_MTCR:
decode_rlc_opc(env, ctx, op1);
break;
}
}
| false | qemu | 7f13420ec000ad7644b65ea1a32b5674ad0cd204 |
5,683 | static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
intptr_t arg2)
{
uint8_t *old_code_ptr = s->code_ptr;
if (type == TCG_TYPE_I32) {
tcg_out_op_t(s, INDEX_op_ld_i32);
tcg_out_r(s, ret);
tcg_out_r(s, arg1);
tcg_out32(s, arg2);
} else {
assert(type == TCG_TYPE_I64);
#if TCG_TARGET_REG_BITS == 64
tcg_out_op_t(s, INDEX_op_ld_i64);
tcg_out_r(s, ret);
tcg_out_r(s, arg1);
assert(arg2 == (int32_t)arg2);
tcg_out32(s, arg2);
#else
TODO();
#endif
}
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
| false | qemu | eabb7b91b36b202b4dac2df2d59d698e3aff197a |
5,684 | static bool s390_cpu_has_work(CPUState *cs)
{
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->psw.mask & PSW_MASK_EXT);
}
| false | qemu | 8417f904bad50021b432dfea12613345d9fb1f68 |
5,685 | static ssize_t qemu_enqueue_packet_iov(VLANClientState *sender,
const struct iovec *iov, int iovcnt,
NetPacketSent *sent_cb)
{
VLANPacket *packet;
size_t max_len = 0;
int i;
max_len = calc_iov_length(iov, iovcnt);
packet = qemu_malloc(sizeof(VLANPacket) + max_len);
packet->sender = sender;
packet->sent_cb = sent_cb;
packet->size = 0;
for (i = 0; i < iovcnt; i++) {
size_t len = iov[i].iov_len;
memcpy(packet->data + packet->size, iov[i].iov_base, len);
packet->size += len;
}
TAILQ_INSERT_TAIL(&sender->vlan->send_queue, packet, entry);
return packet->size;
}
| false | qemu | 72cf2d4f0e181d0d3a3122e04129c58a95da713e |
5,686 | static void sm501_palette_write(void *opaque,
target_phys_addr_t addr, uint32_t value)
{
SM501State * s = (SM501State *)opaque;
SM501_DPRINTF("sm501 palette write addr=%x, val=%x\n",
(int)addr, value);
/* TODO : consider BYTE/WORD access */
/* TODO : consider endian */
assert(0 <= addr && addr < 0x400 * 3);
*(uint32_t*)&s->dc_palette[addr] = value;
}
| false | qemu | 45416789e8ccced568a4984af61974adfbfa0f62 |
5,687 | static int qemu_gluster_open(BlockDriverState *bs, QDict *options,
int bdrv_flags, Error **errp)
{
BDRVGlusterState *s = bs->opaque;
int open_flags = O_BINARY;
int ret = 0;
GlusterConf *gconf = g_malloc0(sizeof(GlusterConf));
QemuOpts *opts;
Error *local_err = NULL;
const char *filename;
opts = qemu_opts_create(&runtime_opts, NULL, 0, &error_abort);
qemu_opts_absorb_qdict(opts, options, &local_err);
if (local_err) {
error_propagate(errp, local_err);
ret = -EINVAL;
goto out;
}
filename = qemu_opt_get(opts, "filename");
s->glfs = qemu_gluster_init(gconf, filename, errp);
if (!s->glfs) {
ret = -errno;
goto out;
}
if (bdrv_flags & BDRV_O_RDWR) {
open_flags |= O_RDWR;
} else {
open_flags |= O_RDONLY;
}
if ((bdrv_flags & BDRV_O_NOCACHE)) {
open_flags |= O_DIRECT;
}
s->fd = glfs_open(s->glfs, gconf->image, open_flags);
if (!s->fd) {
ret = -errno;
}
out:
qemu_opts_del(opts);
qemu_gluster_gconf_free(gconf);
if (!ret) {
return ret;
}
if (s->fd) {
glfs_close(s->fd);
}
if (s->glfs) {
glfs_fini(s->glfs);
}
return ret;
}
| false | qemu | 1b37b3442f78a77844fdaf7f53e5f04e4ce8f1d6 |
5,688 | static int draw_slice(AVFilterLink *inlink, int y, int h, int slice_dir)
{
AVFilterContext *ctx = inlink->dst;
TileContext *tile = ctx->priv;
AVFilterLink *outlink = ctx->outputs[0];
unsigned x0, y0;
get_current_tile_pos(ctx, &x0, &y0);
ff_copy_rectangle2(&tile->draw,
outlink->out_buf->data, outlink->out_buf->linesize,
inlink ->cur_buf->data, inlink ->cur_buf->linesize,
x0, y0 + y, 0, y, inlink->cur_buf->video->w, h);
/* TODO if tile->w == 1 && slice_dir is always 1, we could draw_slice
* immediately. */
return 0;
}
| false | FFmpeg | 6f3d2fb18bb6225c27e22a95846c42f2093dc3b7 |
5,689 | static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn)
{
uint32_t rd, rn, rm, op, i, n, offset, delta_d, delta_m, bank_mask;
int dp, veclen;
TCGv addr;
TCGv tmp;
TCGv tmp2;
if (!arm_feature(env, ARM_FEATURE_VFP))
return 1;
if (!s->vfp_enabled) {
/* VFP disabled. Only allow fmxr/fmrx to/from some control regs. */
if ((insn & 0x0fe00fff) != 0x0ee00a10)
return 1;
rn = (insn >> 16) & 0xf;
if (rn != ARM_VFP_FPSID && rn != ARM_VFP_FPEXC
&& rn != ARM_VFP_MVFR1 && rn != ARM_VFP_MVFR0)
return 1;
}
dp = ((insn & 0xf00) == 0xb00);
switch ((insn >> 24) & 0xf) {
case 0xe:
if (insn & (1 << 4)) {
/* single register transfer */
rd = (insn >> 12) & 0xf;
if (dp) {
int size;
int pass;
VFP_DREG_N(rn, insn);
if (insn & 0xf)
return 1;
if (insn & 0x00c00060
&& !arm_feature(env, ARM_FEATURE_NEON))
return 1;
pass = (insn >> 21) & 1;
if (insn & (1 << 22)) {
size = 0;
offset = ((insn >> 5) & 3) * 8;
} else if (insn & (1 << 5)) {
size = 1;
offset = (insn & (1 << 6)) ? 16 : 0;
} else {
size = 2;
offset = 0;
}
if (insn & ARM_CP_RW_BIT) {
/* vfp->arm */
tmp = neon_load_reg(rn, pass);
switch (size) {
case 0:
if (offset)
tcg_gen_shri_i32(tmp, tmp, offset);
if (insn & (1 << 23))
gen_uxtb(tmp);
else
gen_sxtb(tmp);
break;
case 1:
if (insn & (1 << 23)) {
if (offset) {
tcg_gen_shri_i32(tmp, tmp, 16);
} else {
gen_uxth(tmp);
}
} else {
if (offset) {
tcg_gen_sari_i32(tmp, tmp, 16);
} else {
gen_sxth(tmp);
}
}
break;
case 2:
break;
}
store_reg(s, rd, tmp);
} else {
/* arm->vfp */
tmp = load_reg(s, rd);
if (insn & (1 << 23)) {
/* VDUP */
if (size == 0) {
gen_neon_dup_u8(tmp, 0);
} else if (size == 1) {
gen_neon_dup_low16(tmp);
}
for (n = 0; n <= pass * 2; n++) {
tmp2 = tcg_temp_new_i32();
tcg_gen_mov_i32(tmp2, tmp);
neon_store_reg(rn, n, tmp2);
}
neon_store_reg(rn, n, tmp);
} else {
/* VMOV */
switch (size) {
case 0:
tmp2 = neon_load_reg(rn, pass);
gen_bfi(tmp, tmp2, tmp, offset, 0xff);
tcg_temp_free_i32(tmp2);
break;
case 1:
tmp2 = neon_load_reg(rn, pass);
gen_bfi(tmp, tmp2, tmp, offset, 0xffff);
tcg_temp_free_i32(tmp2);
break;
case 2:
break;
}
neon_store_reg(rn, pass, tmp);
}
}
} else { /* !dp */
if ((insn & 0x6f) != 0x00)
return 1;
rn = VFP_SREG_N(insn);
if (insn & ARM_CP_RW_BIT) {
/* vfp->arm */
if (insn & (1 << 21)) {
/* system register */
rn >>= 1;
switch (rn) {
case ARM_VFP_FPSID:
/* VFP2 allows access to FSID from userspace.
VFP3 restricts all id registers to privileged
accesses. */
if (IS_USER(s)
&& arm_feature(env, ARM_FEATURE_VFP3))
return 1;
tmp = load_cpu_field(vfp.xregs[rn]);
break;
case ARM_VFP_FPEXC:
if (IS_USER(s))
return 1;
tmp = load_cpu_field(vfp.xregs[rn]);
break;
case ARM_VFP_FPINST:
case ARM_VFP_FPINST2:
/* Not present in VFP3. */
if (IS_USER(s)
|| arm_feature(env, ARM_FEATURE_VFP3))
return 1;
tmp = load_cpu_field(vfp.xregs[rn]);
break;
case ARM_VFP_FPSCR:
if (rd == 15) {
tmp = load_cpu_field(vfp.xregs[ARM_VFP_FPSCR]);
tcg_gen_andi_i32(tmp, tmp, 0xf0000000);
} else {
tmp = tcg_temp_new_i32();
gen_helper_vfp_get_fpscr(tmp, cpu_env);
}
break;
case ARM_VFP_MVFR0:
case ARM_VFP_MVFR1:
if (IS_USER(s)
|| !arm_feature(env, ARM_FEATURE_VFP3))
return 1;
tmp = load_cpu_field(vfp.xregs[rn]);
break;
default:
return 1;
}
} else {
gen_mov_F0_vreg(0, rn);
tmp = gen_vfp_mrs();
}
if (rd == 15) {
/* Set the 4 flag bits in the CPSR. */
gen_set_nzcv(tmp);
tcg_temp_free_i32(tmp);
} else {
store_reg(s, rd, tmp);
}
} else {
/* arm->vfp */
tmp = load_reg(s, rd);
if (insn & (1 << 21)) {
rn >>= 1;
/* system register */
switch (rn) {
case ARM_VFP_FPSID:
case ARM_VFP_MVFR0:
case ARM_VFP_MVFR1:
/* Writes are ignored. */
break;
case ARM_VFP_FPSCR:
gen_helper_vfp_set_fpscr(cpu_env, tmp);
tcg_temp_free_i32(tmp);
gen_lookup_tb(s);
break;
case ARM_VFP_FPEXC:
if (IS_USER(s))
return 1;
/* TODO: VFP subarchitecture support.
* For now, keep the EN bit only */
tcg_gen_andi_i32(tmp, tmp, 1 << 30);
store_cpu_field(tmp, vfp.xregs[rn]);
gen_lookup_tb(s);
break;
case ARM_VFP_FPINST:
case ARM_VFP_FPINST2:
store_cpu_field(tmp, vfp.xregs[rn]);
break;
default:
return 1;
}
} else {
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rn);
}
}
}
} else {
/* data processing */
/* The opcode is in bits 23, 21, 20 and 6. */
op = ((insn >> 20) & 8) | ((insn >> 19) & 6) | ((insn >> 6) & 1);
if (dp) {
if (op == 15) {
/* rn is opcode */
rn = ((insn >> 15) & 0x1e) | ((insn >> 7) & 1);
} else {
/* rn is register number */
VFP_DREG_N(rn, insn);
}
if (op == 15 && (rn == 15 || ((rn & 0x1c) == 0x18))) {
/* Integer or single precision destination. */
rd = VFP_SREG_D(insn);
} else {
VFP_DREG_D(rd, insn);
}
if (op == 15 &&
(((rn & 0x1c) == 0x10) || ((rn & 0x14) == 0x14))) {
/* VCVT from int is always from S reg regardless of dp bit.
* VCVT with immediate frac_bits has same format as SREG_M
*/
rm = VFP_SREG_M(insn);
} else {
VFP_DREG_M(rm, insn);
}
} else {
rn = VFP_SREG_N(insn);
if (op == 15 && rn == 15) {
/* Double precision destination. */
VFP_DREG_D(rd, insn);
} else {
rd = VFP_SREG_D(insn);
}
/* NB that we implicitly rely on the encoding for the frac_bits
* in VCVT of fixed to float being the same as that of an SREG_M
*/
rm = VFP_SREG_M(insn);
}
veclen = s->vec_len;
if (op == 15 && rn > 3)
veclen = 0;
/* Shut up compiler warnings. */
delta_m = 0;
delta_d = 0;
bank_mask = 0;
if (veclen > 0) {
if (dp)
bank_mask = 0xc;
else
bank_mask = 0x18;
/* Figure out what type of vector operation this is. */
if ((rd & bank_mask) == 0) {
/* scalar */
veclen = 0;
} else {
if (dp)
delta_d = (s->vec_stride >> 1) + 1;
else
delta_d = s->vec_stride + 1;
if ((rm & bank_mask) == 0) {
/* mixed scalar/vector */
delta_m = 0;
} else {
/* vector */
delta_m = delta_d;
}
}
}
/* Load the initial operands. */
if (op == 15) {
switch (rn) {
case 16:
case 17:
/* Integer source */
gen_mov_F0_vreg(0, rm);
break;
case 8:
case 9:
/* Compare */
gen_mov_F0_vreg(dp, rd);
gen_mov_F1_vreg(dp, rm);
break;
case 10:
case 11:
/* Compare with zero */
gen_mov_F0_vreg(dp, rd);
gen_vfp_F1_ld0(dp);
break;
case 20:
case 21:
case 22:
case 23:
case 28:
case 29:
case 30:
case 31:
/* Source and destination the same. */
gen_mov_F0_vreg(dp, rd);
break;
default:
/* One source operand. */
gen_mov_F0_vreg(dp, rm);
break;
}
} else {
/* Two source operands. */
gen_mov_F0_vreg(dp, rn);
gen_mov_F1_vreg(dp, rm);
}
for (;;) {
/* Perform the calculation. */
switch (op) {
case 0: /* VMLA: fd + (fn * fm) */
/* Note that order of inputs to the add matters for NaNs */
gen_vfp_F1_mul(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_add(dp);
break;
case 1: /* VMLS: fd + -(fn * fm) */
gen_vfp_mul(dp);
gen_vfp_F1_neg(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_add(dp);
break;
case 2: /* VNMLS: -fd + (fn * fm) */
/* Note that it isn't valid to replace (-A + B) with (B - A)
* or similar plausible looking simplifications
* because this will give wrong results for NaNs.
*/
gen_vfp_F1_mul(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_neg(dp);
gen_vfp_add(dp);
break;
case 3: /* VNMLA: -fd + -(fn * fm) */
gen_vfp_mul(dp);
gen_vfp_F1_neg(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_neg(dp);
gen_vfp_add(dp);
break;
case 4: /* mul: fn * fm */
gen_vfp_mul(dp);
break;
case 5: /* nmul: -(fn * fm) */
gen_vfp_mul(dp);
gen_vfp_neg(dp);
break;
case 6: /* add: fn + fm */
gen_vfp_add(dp);
break;
case 7: /* sub: fn - fm */
gen_vfp_sub(dp);
break;
case 8: /* div: fn / fm */
gen_vfp_div(dp);
break;
case 14: /* fconst */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
n = (insn << 12) & 0x80000000;
i = ((insn >> 12) & 0x70) | (insn & 0xf);
if (dp) {
if (i & 0x40)
i |= 0x3f80;
else
i |= 0x4000;
n |= i << 16;
tcg_gen_movi_i64(cpu_F0d, ((uint64_t)n) << 32);
} else {
if (i & 0x40)
i |= 0x780;
else
i |= 0x800;
n |= i << 19;
tcg_gen_movi_i32(cpu_F0s, n);
}
break;
case 15: /* extension space */
switch (rn) {
case 0: /* cpy */
/* no-op */
break;
case 1: /* abs */
gen_vfp_abs(dp);
break;
case 2: /* neg */
gen_vfp_neg(dp);
break;
case 3: /* sqrt */
gen_vfp_sqrt(dp);
break;
case 4: /* vcvtb.f32.f16 */
if (!arm_feature(env, ARM_FEATURE_VFP_FP16))
return 1;
tmp = gen_vfp_mrs();
tcg_gen_ext16u_i32(tmp, tmp);
gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp, cpu_env);
tcg_temp_free_i32(tmp);
break;
case 5: /* vcvtt.f32.f16 */
if (!arm_feature(env, ARM_FEATURE_VFP_FP16))
return 1;
tmp = gen_vfp_mrs();
tcg_gen_shri_i32(tmp, tmp, 16);
gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp, cpu_env);
tcg_temp_free_i32(tmp);
break;
case 6: /* vcvtb.f16.f32 */
if (!arm_feature(env, ARM_FEATURE_VFP_FP16))
return 1;
tmp = tcg_temp_new_i32();
gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s, cpu_env);
gen_mov_F0_vreg(0, rd);
tmp2 = gen_vfp_mrs();
tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000);
tcg_gen_or_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
gen_vfp_msr(tmp);
break;
case 7: /* vcvtt.f16.f32 */
if (!arm_feature(env, ARM_FEATURE_VFP_FP16))
return 1;
tmp = tcg_temp_new_i32();
gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s, cpu_env);
tcg_gen_shli_i32(tmp, tmp, 16);
gen_mov_F0_vreg(0, rd);
tmp2 = gen_vfp_mrs();
tcg_gen_ext16u_i32(tmp2, tmp2);
tcg_gen_or_i32(tmp, tmp, tmp2);
tcg_temp_free_i32(tmp2);
gen_vfp_msr(tmp);
break;
case 8: /* cmp */
gen_vfp_cmp(dp);
break;
case 9: /* cmpe */
gen_vfp_cmpe(dp);
break;
case 10: /* cmpz */
gen_vfp_cmp(dp);
break;
case 11: /* cmpez */
gen_vfp_F1_ld0(dp);
gen_vfp_cmpe(dp);
break;
case 15: /* single<->double conversion */
if (dp)
gen_helper_vfp_fcvtsd(cpu_F0s, cpu_F0d, cpu_env);
else
gen_helper_vfp_fcvtds(cpu_F0d, cpu_F0s, cpu_env);
break;
case 16: /* fuito */
gen_vfp_uito(dp, 0);
break;
case 17: /* fsito */
gen_vfp_sito(dp, 0);
break;
case 20: /* fshto */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_shto(dp, 16 - rm, 0);
break;
case 21: /* fslto */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_slto(dp, 32 - rm, 0);
break;
case 22: /* fuhto */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_uhto(dp, 16 - rm, 0);
break;
case 23: /* fulto */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_ulto(dp, 32 - rm, 0);
break;
case 24: /* ftoui */
gen_vfp_toui(dp, 0);
break;
case 25: /* ftouiz */
gen_vfp_touiz(dp, 0);
break;
case 26: /* ftosi */
gen_vfp_tosi(dp, 0);
break;
case 27: /* ftosiz */
gen_vfp_tosiz(dp, 0);
break;
case 28: /* ftosh */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_tosh(dp, 16 - rm, 0);
break;
case 29: /* ftosl */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_tosl(dp, 32 - rm, 0);
break;
case 30: /* ftouh */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_touh(dp, 16 - rm, 0);
break;
case 31: /* ftoul */
if (!arm_feature(env, ARM_FEATURE_VFP3))
return 1;
gen_vfp_toul(dp, 32 - rm, 0);
break;
default: /* undefined */
printf ("rn:%d\n", rn);
return 1;
}
break;
default: /* undefined */
printf ("op:%d\n", op);
return 1;
}
/* Write back the result. */
if (op == 15 && (rn >= 8 && rn <= 11))
; /* Comparison, do nothing. */
else if (op == 15 && dp && ((rn & 0x1c) == 0x18))
/* VCVT double to int: always integer result. */
gen_mov_vreg_F0(0, rd);
else if (op == 15 && rn == 15)
/* conversion */
gen_mov_vreg_F0(!dp, rd);
else
gen_mov_vreg_F0(dp, rd);
/* break out of the loop if we have finished */
if (veclen == 0)
break;
if (op == 15 && delta_m == 0) {
/* single source one-many */
while (veclen--) {
rd = ((rd + delta_d) & (bank_mask - 1))
| (rd & bank_mask);
gen_mov_vreg_F0(dp, rd);
}
break;
}
/* Setup the next operands. */
veclen--;
rd = ((rd + delta_d) & (bank_mask - 1))
| (rd & bank_mask);
if (op == 15) {
/* One source operand. */
rm = ((rm + delta_m) & (bank_mask - 1))
| (rm & bank_mask);
gen_mov_F0_vreg(dp, rm);
} else {
/* Two source operands. */
rn = ((rn + delta_d) & (bank_mask - 1))
| (rn & bank_mask);
gen_mov_F0_vreg(dp, rn);
if (delta_m) {
rm = ((rm + delta_m) & (bank_mask - 1))
| (rm & bank_mask);
gen_mov_F1_vreg(dp, rm);
}
}
}
}
break;
case 0xc:
case 0xd:
if ((insn & 0x03e00000) == 0x00400000) {
/* two-register transfer */
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
if (dp) {
VFP_DREG_M(rm, insn);
} else {
rm = VFP_SREG_M(insn);
}
if (insn & ARM_CP_RW_BIT) {
/* vfp->arm */
if (dp) {
gen_mov_F0_vreg(0, rm * 2);
tmp = gen_vfp_mrs();
store_reg(s, rd, tmp);
gen_mov_F0_vreg(0, rm * 2 + 1);
tmp = gen_vfp_mrs();
store_reg(s, rn, tmp);
} else {
gen_mov_F0_vreg(0, rm);
tmp = gen_vfp_mrs();
store_reg(s, rd, tmp);
gen_mov_F0_vreg(0, rm + 1);
tmp = gen_vfp_mrs();
store_reg(s, rn, tmp);
}
} else {
/* arm->vfp */
if (dp) {
tmp = load_reg(s, rd);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm * 2);
tmp = load_reg(s, rn);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm * 2 + 1);
} else {
tmp = load_reg(s, rd);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm);
tmp = load_reg(s, rn);
gen_vfp_msr(tmp);
gen_mov_vreg_F0(0, rm + 1);
}
}
} else {
/* Load/store */
rn = (insn >> 16) & 0xf;
if (dp)
VFP_DREG_D(rd, insn);
else
rd = VFP_SREG_D(insn);
if ((insn & 0x01200000) == 0x01000000) {
/* Single load/store */
offset = (insn & 0xff) << 2;
if ((insn & (1 << 23)) == 0)
offset = -offset;
if (s->thumb && rn == 15) {
/* This is actually UNPREDICTABLE */
addr = tcg_temp_new_i32();
tcg_gen_movi_i32(addr, s->pc & ~2);
} else {
addr = load_reg(s, rn);
}
tcg_gen_addi_i32(addr, addr, offset);
if (insn & (1 << 20)) {
gen_vfp_ld(s, dp, addr);
gen_mov_vreg_F0(dp, rd);
} else {
gen_mov_F0_vreg(dp, rd);
gen_vfp_st(s, dp, addr);
}
tcg_temp_free_i32(addr);
} else {
/* load/store multiple */
int w = insn & (1 << 21);
if (dp)
n = (insn >> 1) & 0x7f;
else
n = insn & 0xff;
if (w && !(((insn >> 23) ^ (insn >> 24)) & 1)) {
/* P == U , W == 1 => UNDEF */
return 1;
}
if (n == 0 || (rd + n) > 32 || (dp && n > 16)) {
/* UNPREDICTABLE cases for bad immediates: we choose to
* UNDEF to avoid generating huge numbers of TCG ops
*/
return 1;
}
if (rn == 15 && w) {
/* writeback to PC is UNPREDICTABLE, we choose to UNDEF */
return 1;
}
if (s->thumb && rn == 15) {
/* This is actually UNPREDICTABLE */
addr = tcg_temp_new_i32();
tcg_gen_movi_i32(addr, s->pc & ~2);
} else {
addr = load_reg(s, rn);
}
if (insn & (1 << 24)) /* pre-decrement */
tcg_gen_addi_i32(addr, addr, -((insn & 0xff) << 2));
if (dp)
offset = 8;
else
offset = 4;
for (i = 0; i < n; i++) {
if (insn & ARM_CP_RW_BIT) {
/* load */
gen_vfp_ld(s, dp, addr);
gen_mov_vreg_F0(dp, rd + i);
} else {
/* store */
gen_mov_F0_vreg(dp, rd + i);
gen_vfp_st(s, dp, addr);
}
tcg_gen_addi_i32(addr, addr, offset);
}
if (w) {
/* writeback */
if (insn & (1 << 24))
offset = -offset * n;
else if (dp && (insn & 1))
offset = 4;
else
offset = 0;
if (offset != 0)
tcg_gen_addi_i32(addr, addr, offset);
store_reg(s, rn, addr);
} else {
tcg_temp_free_i32(addr);
}
}
}
break;
default:
/* Should never happen. */
return 1;
}
return 0;
}
| false | qemu | 6e0c0ed185227c301f643281220603fcaf217b31 |
5,690 | void cpu_check_irqs(CPUState *env)
{
uint32_t pil = env->pil_in | (env->softint & ~SOFTINT_TIMER) |
((env->softint & SOFTINT_TIMER) << 14);
if (pil && (env->interrupt_index == 0 ||
(env->interrupt_index & ~15) == TT_EXTINT)) {
unsigned int i;
for (i = 15; i > 0; i--) {
if (pil & (1 << i)) {
int old_interrupt = env->interrupt_index;
env->interrupt_index = TT_EXTINT | i;
if (old_interrupt != env->interrupt_index) {
CPUIRQ_DPRINTF("Set CPU IRQ %d\n", i);
cpu_interrupt(env, CPU_INTERRUPT_HARD);
}
break;
}
}
} else if (!pil && (env->interrupt_index & ~15) == TT_EXTINT) {
CPUIRQ_DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15);
env->interrupt_index = 0;
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
}
}
| false | qemu | d532b26c9dee0fb5b2186572f921b1e413963ec2 |
5,691 | static int default_fdset_dup_fd_find(int dup_fd)
{
return -1;
}
| false | qemu | 1f001dc7bc9e435bf231a5b0edcad1c7c2bd6214 |
5,692 | static void t_gen_muls(TCGv d, TCGv d2, TCGv a, TCGv b)
{
TCGv t0, t1;
t0 = tcg_temp_new(TCG_TYPE_I64);
t1 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext32s_i64(t0, a);
tcg_gen_ext32s_i64(t1, b);
tcg_gen_mul_i64(t0, t0, t1);
tcg_gen_trunc_i64_i32(d, t0);
tcg_gen_shri_i64(t0, t0, 32);
tcg_gen_trunc_i64_i32(d2, t0);
tcg_temp_free(t0);
tcg_temp_free(t1);
}
| false | qemu | a7812ae412311d7d47f8aa85656faadac9d64b56 |
5,693 | static void vnc_client_write(void *opaque)
{
long ret;
VncState *vs = opaque;
#ifdef CONFIG_VNC_TLS
if (vs->tls_session) {
ret = gnutls_write(vs->tls_session, vs->output.buffer, vs->output.offset);
if (ret < 0) {
if (ret == GNUTLS_E_AGAIN)
errno = EAGAIN;
else
errno = EIO;
ret = -1;
}
} else
#endif /* CONFIG_VNC_TLS */
ret = send(vs->csock, vs->output.buffer, vs->output.offset, 0);
ret = vnc_client_io_error(vs, ret, socket_error());
if (!ret)
return;
memmove(vs->output.buffer, vs->output.buffer + ret, (vs->output.offset - ret));
vs->output.offset -= ret;
if (vs->output.offset == 0) {
qemu_set_fd_handler2(vs->csock, NULL, vnc_client_read, NULL, vs);
}
}
| false | qemu | 5fb6c7a8b26eab1a22207d24b4784bd2b39ab54b |
5,695 | static void test_drive_del_device_del(void)
{
/* Start with a drive used by a device that unplugs instantaneously */
qtest_start("-drive if=none,id=drive0,file=null-co://,format=raw"
" -device virtio-scsi-pci"
" -device scsi-hd,drive=drive0,id=dev0");
/*
* Delete the drive, and then the device
* Doing it in this order takes notoriously tricky special paths
*/
drive_del();
device_del();
qtest_end();
}
| false | qemu | 2f84a92ec631f5907207990705a22afb9aad3eef |
5,696 | static void omap_uwire_write(void *opaque, target_phys_addr_t addr,
uint64_t value, unsigned size)
{
struct omap_uwire_s *s = (struct omap_uwire_s *) opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
return omap_badwidth_write16(opaque, addr, value);
}
switch (offset) {
case 0x00: /* TDR */
s->txbuf = value; /* TD */
if ((s->setup[4] & (1 << 2)) && /* AUTO_TX_EN */
((s->setup[4] & (1 << 3)) || /* CS_TOGGLE_TX_EN */
(s->control & (1 << 12)))) { /* CS_CMD */
s->control |= 1 << 14; /* CSRB */
omap_uwire_transfer_start(s);
}
break;
case 0x04: /* CSR */
s->control = value & 0x1fff;
if (value & (1 << 13)) /* START */
omap_uwire_transfer_start(s);
break;
case 0x08: /* SR1 */
s->setup[0] = value & 0x003f;
break;
case 0x0c: /* SR2 */
s->setup[1] = value & 0x0fc0;
break;
case 0x10: /* SR3 */
s->setup[2] = value & 0x0003;
break;
case 0x14: /* SR4 */
s->setup[3] = value & 0x0001;
break;
case 0x18: /* SR5 */
s->setup[4] = value & 0x000f;
break;
default:
OMAP_BAD_REG(addr);
return;
}
}
| false | qemu | a8170e5e97ad17ca169c64ba87ae2f53850dab4c |
5,697 | static inline void _t_gen_mov_env_TN(int offset, TCGv tn)
{
if (offset > sizeof(CPUCRISState)) {
fprintf(stderr, "wrong store to env at off=%d\n", offset);
}
tcg_gen_st_tl(tn, cpu_env, offset);
}
| false | qemu | 37654d9e6af84003982f8b9a5d59a4aef28e0a79 |
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