I have to build a makefile for a project that has the following folder structure:

1) all the headers are in /include

2) some .o compiled implementations are provided (without the .c) in /provided\_objects

3) the source codes I create must be in /src

4) the .o files generated by my C codes must be in /built\_objects

5) the executable is in the root

My original purpose is to replace some of the implementations in /provided\_objects by my implementations, keeping in mind that my implementations can use the functions defined by the headers that I didnt implement.Theres already a default makefile that contains (among smaller details):

```
LD        = gcc
LDFLAGS   = -lm
OBJDIR    = provided_objects
OBJECTS = $(OBJDIR)/obj1.o    \    /$(OBJDIR)/obj2.o ...
MY_OBJECTS = 
quiet-command = $(if $(VERB),$1,$(if $(2),@echo $2 && $1, @$1))

all     : $(OBJDIR) $(PROG)

$(PROG) : $(OBJECTS) $(MY_OBJECTS)
    $(call quiet-command, $(LD) $^ -o $@, "  LD       $@" $(LDFLAGS))

$(OBJDIR):
    $(call quiet-command, mkdir -p $(OBJDIR),)

```

Im supposed to delete the entries that I implemented that are named in OBJECTS and reference them in MY\_OBJECTS. My question is, how should I do this? Im not very experienced in makefiles and the links I found researching didnt address my constraints.

Thanks in advance!