My intention is to drive a MOSFET (say, a IRF840 or some logic-level) from a low-current (<10mA) SoC output pin.

Using appropriate resistors from gate to pin and ground, this works... but the gate voltage change could be faster.

So I considered putting a NPN (to VCC) & PNP (to GND) BJT between the pin and FET 

![schematic](https://i.stack.imgur.com/zI4IF.png)

[simulate this circuit](/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fzI4IF.png) – Schematic created using [CircuitLab](https://www.circuitlab.com/)

and at that point I thought I'd ask if that setup has a name and/or any known problems to avoid (feedback, etc).