Studying pipelined processors, and they make mention of predicting a branch being taken or not taken, inserting salient instructions in the sort of "interim" before we decide if the branch is taken or not, but then "squashing" them if we guess wrong.

How do we squash them? Do we just not write back? How many instructions can we insert in the interim between figuring out it's a branch and figure out if taken or not taken. I guess just one, right - because we figure out IT IS a branch in ID, and then figure out if taken or not in EX? So just one squashable instr.?

IF->ID->EX->MEM->WB