Is it possible to build a atomic "release-and-acquire" operation in riscv so one could release a lock then immediately acquire another one atomically?

I found that most of riscv locking mechanism is implemented using atomic swap `amoswap.w.aq`, however it does not appear to support swapping between two memory location, only between a memory location and a register.

I'm also aware of the existence of LR/SC (load-reserved/store-conditional) instructions in riscv, but it doesn't seems to support such transactional memory scheme between multiple memory addresses.