If I have the following rule in a makefile:

```
$(OBJ)/%.o: $(SRC)/%.c
    $(CC) -c -o $@ $< $(CFLAGS)

```

Every file matching the prefix `./obj/` and sufix `.o` will have its stem passed to `%`, so I can provide some dependencies based on its name.

But, suppose I have this kind of rule, which I specify one by one the targets I want:

```
OBJECTS=abc.o bca.o cba.o
$(OBJECTS): $(SRC)/%.c
    $(CC) -c -o $@ $< $(CFLAGS)

```

How do I make the `%` stem actually work for the current target name *make* is executing? Just using `%` doesn't work, neither `$@`.

Note that I'm trying to write the actual target name to its own dependency. For example, when *make* is executing the rule for `abc.o`, it would include `$(SRC)/abc.c` and just it (something like `$(patsubst %.o, $(SRC)/%.c, MAGIC_TARGET_NAME_VARIABLE)`).