With software, when we compile the project for first time it may take a while but afterwards, it does not take so long anymore. If we change a single file in the project, everything does not need to be compiled again.

This does not seem to hold true for compiling FPGA designs.

Now I have used Intel Quartus Prime Standard with MAX 10 and Cyclone IV & V and Microsemi Libero SoC with IGLOO2 and SmartFusion2. With both programs and all the FPGAs I mentioned, it always takes the same amount of time for the project to compile. I want to know, why? Am I doing something wrong? It should take less time to compile after the first time isn't it? How should this be fixed?