I have simple [Verilog](http://en.wikipedia.org/wiki/Verilog) code and a test bench for which I have to pass the test cases using Perl. I have to write a Perl script of test cases which will receive random input. When I execute the Perl script, it will ask for input and whatever I input it will show "the test case has passed".

I tried using [Verilog-Perl](http://www.veripool.org/wiki/verilog-perl) but it has many `.pm` files and it is somewhat difficult to utilize them. Can anyone give me hints for this?