include
=======

```
#include<linux/module.h>
#include<linux/init.h>

int my_init(void){
        printk("<1> Angus : Module Insertion is successful!");
        return 0;
}

void my_cleanup(void){
        printk("<1> Angus : Module unloading successful!");
}

module_init(my_init);
module_cleanup(my_cleanup);

```

Makefile :

```
obj-m:=simple.o
aoll:
        make -C /usr/src/linux-headers-3.2.0-25-generic-pae/ M=$(PWD) modules
clean:

        make -C /usr/src/linux-headers-3.2.0-25-generic-pae/ M=$(PWD) clean

```

make -C => will change to the directory before doing a make,
In this path /usr/src/linux-headers-3.2.0-25-generic-pae/ I have Makefile ,
why is the M=$(PWD) needed ? what does it do, where I can check for $PWD ? 
The Makefile inside the /usr/src/linux-headers-3.2.0-25-generic-pae/ has the target all:modules and target modules and has the target clean.
What is obj-m ?