I have the following structure 

```
home
|-- Makefile
|-- H1
|   |-- Makefile
|   `-- h1.c
|-- H2
|   |-- Makefile
|   `-- h2.c
|-- main.c

```

**H1/Makefile**

```
h1.o:h1.c
        gcc -c h1.c

```

**H2/Makefile**

```
h2.o:h2.c
        gcc -c h2.c

```

**home/Makefile**

```
DIR = h1 h2
main.out:main.o
        for i in $(DIR);\
        do (cd $$i; make);\ //1.why () used here to encolose 2 commands and $$ before the i
        done
        gcc -o main.out main.o ./h1/h1.o ./h1/h1.o

main.o:main.c
        gcc -c main.c

```

The above works fine and giving me the out file but,i have doubt that is this the efficient way of doing this compilation or any other way to do this.

My questions are mentioned on the comments of the code and also follows

```
I have tried like 
do(cd $i;make;)//this showing error
also do(cd $$i;)make;//this also sowing error

```

,kindly give me some idea.what is going here.
I gone through some books,I found that $$ means the current process Id ,but what is the use of this here before the i.

Also what is the mening of using `()`,to enclose two commands[`cd` and `make`].

Kindly give me some answer for my doubts.