I've briefly flirted with FPGA development in Verilog, and its admittedly somewhat slower than writing the same program on an MCU (defining pins, and their behaviour, no modules available, etc). I've therefore been on the lookout for a software that can help me design using block diagrams or something more visual. I've heard of Mathworks Simulink, and the FPGA/ASIC line of tools from Synopsys, Cadence, Mentor Graphics, etc, but since I've never had a chance to get my hands on these I don't really know how intelligent or visual they are. Have you ever heard of such a software with such a feature set? and would block diagrams have any advantages over designing textually in Verilog?