I'm trying to use `Makefile` to manage few tasks around my project (for example packaging it for distribution). However I cannot find a way to depend on specific file name instead of some auto-magic. See example:

```
+   $ cat Makefile
dist: ctl
        echo "package it here"

+   $ tree
.
├── ctl
└── Makefile

0 directories, 2 files

+   $ make
echo "package it here"
package it here

```

As you can see, this works fine. But it stops working the moment when I create files `ctl.h` and `ctl.c`:

```
+   $ touch ctl.{h,c}

+   $ make
cc     ctl.c   -o ctl
/usr/bin/ld: /usr/lib/gcc/x86_64-pc-linux-gnu/8.2.1/../../../../lib/Scrt1.o: in function `_start':
(.text+0x24): undefined reference to `main'
collect2: error: ld returned 1 exit status
make: *** [<builtin>: ctl] Error 1

+   $ tree
.
├── ctl.c
├── ctl.h
└── Makefile

0 directories, 3 files

```

My assumption is that `make` is trying to be smart and considers `ctl` to be program compiled from `ctl.c`. Which is not such a case. How can I suppress this behaviour?