I have a problem with a generate statement. I'm generating a pipeline architecture, the basic problem is that I need another counter or variable besides the for index:

```
architecture behav of blockPipelineCordic is
    constant total: integer := stepNumber + stepNumber/pipeStep;
    signal signVector: std_logic_vector( (stepNumber - 1) downto 0);
    signal lx: std_logic_vector( ((total + 1)*dataSize - 1) downto 0);
    signal ly: std_logic_vector( ((total + 1)*dataSize - 1) downto 0);
    signal signCounter: integer := stepNumber - 1;
begin

stepGen:
for i in (total - 1) downto 0 generate
    begin

      signCounter <= signCounter - 1 when ((total - i) mod (pipeStep + 1) /= 0) else signCounter;

        stepGen0: if( (total - i) mod (pipeStep + 1) /= 0 ) generate
        begin U1: entity work.cordicStep(behav)
        generic map ((totalStepNumber - 1) - i,dataSize)
        port map(signVector(signCounter),lx(((i+2)*dataSize-1) downto (i+1)*dataSize),ly(((i+2)*dataSize-1) downto (i+1)*dataSize),lx(((i+1)*dataSize-1) downto i*dataSize),ly(((i+1)*dataSize-1) downto i*dataSize));
        end generate stepGen0;

        stepGen1: if( (total - i) mod (pipeStep + 1) = 0 ) generate
        begin U2: entity work.registerModule(behav)
        generic map (dataSize)
        port map(clk,lx(((i+2)*dataSize-1) downto (i+1)*dataSize),lx(((i+1)*dataSize-1) downto i*dataSize));
        end generate stepGen1;

        stepGen2: if( (total - i) mod (pipeStep + 1) = 0 ) generate
        begin U3: entity work.registerModule(behav)
        generic map (dataSize)
        port map(clk,ly(((i+2)*dataSize-1) downto (i+1)*dataSize),ly(((i+1)*dataSize-1) downto i*dataSize));
        end generate stepGen2;

end generate stepGen;
. . .

```

In the generation of the first structure I need to use a different index to signVector, I created a signal to be used as a counter (port map(signVector(signCounter),lx(((i+2)\*dataSize-1) downto ) but it cannot be used as an index the error is: "Actual (indexed name) for formal "sub" is not a static signal name."

Any help would be appreciated :), ty