homepage: https://github.com/cocreature/riscv-isa#readme
changelog-type: markdown
hash: b6a5fba636fb34c4e9e4492009372c925e97fcf6c72b7b67a133a24cfbe0cd99
test-bench-deps: {}
maintainer: value
synopsis: Haskell representation of the RISC-V instruction set architecture
changelog: ! '# 0.0.1.0

  Initial release

'
basic-deps:
  base: ! '>=4.7 && <5'
all-versions:
- '0.0.1.0'
author: Moritz Kiefer
latest: '0.0.1.0'
description-type: markdown
description: ! '# Haskell representation of the RISC-V instruction set architecture


  [![Build Status](https://travis-ci.com/cocreature/riscv-isa.svg?token=k5tv9VjJ9pj7ynzqQyjR&branch=master)](https://travis-ci.com/cocreature/riscv-isa)

'
license-name: BSD3

homepage: https://github.com/cocreature/riscv-isa#readme
changelog-type: markdown
hash: aff1d553604b24fb0b194bed5405ab7c4545067fe05ada8079be1ff5e448da1b
test-bench-deps: {}
maintainer: value
synopsis: Haskell representation of the RISC-V instruction set architecture
changelog: ! '# 0.0.2.0

  * Fix various errors in the Haskell ISA representation

  * Add serialization support


  # 0.0.1.0

  Initial release

'
basic-deps:
  base: ! '>=4.7 && <5'
all-versions:
- '0.0.1.0'
- '0.0.2.0'
author: Moritz Kiefer
latest: '0.0.2.0'
description-type: markdown
description: ! '# Haskell representation of the RISC-V instruction set architecture


  [![Build Status](https://travis-ci.com/cocreature/riscv-isa.svg?token=k5tv9VjJ9pj7ynzqQyjR&branch=master)](https://travis-ci.com/cocreature/riscv-isa)

'
license-name: BSD3

Update from Hackage at 2016-12-10T20:15:10Z
Update from Hackage at 2016-12-10T20:15:10Z
