dma: fix cache clean size
@@ -75,9 +75,7 @@ const dma_stream_def_t dma_stream_defs[DMA_DEVICE_MAX] = {DMA_STREAMS};
void dma_prepare_tx_memory(void *addr, uint32_t size) {
#if defined(STM32F7) || defined(STM32H7)
if (!WITHIN_DTCM_RAM(addr)) {
- SCB_CleanDCache_by_Addr(
- (uint32_t *)((uint32_t)addr & ~CACHE_LINE_MASK),
- (((uint32_t)addr & CACHE_LINE_MASK) + size - 1 + CACHE_LINE_SIZE) & ~CACHE_LINE_MASK);
+ SCB_CleanDCache_by_Addr((uint32_t *)((uint32_t)addr & ~CACHE_LINE_MASK), (size + CACHE_LINE_SIZE) & ~CACHE_LINE_MASK);
}
#endif
}
@@ -85,9 +83,7 @@ void dma_prepare_tx_memory(void *addr, uint32_t size) {
void dma_prepare_rx_memory(void *addr, uint32_t size) {
#if defined(STM32F7) || defined(STM32H7)
if (!WITHIN_DTCM_RAM(addr)) {
- SCB_CleanInvalidateDCache_by_Addr(
- (uint32_t *)((uint32_t)addr & ~CACHE_LINE_MASK),
- (((uint32_t)addr & CACHE_LINE_MASK) + size - 1 + CACHE_LINE_SIZE) & ~CACHE_LINE_MASK);
+ SCB_CleanInvalidateDCache_by_Addr((uint32_t *)((uint32_t)addr & ~CACHE_LINE_MASK), (size + CACHE_LINE_SIZE) & ~CACHE_LINE_MASK);
}
#endif
}
