hv: vlapic: minor fix about APICv inject interrupt
When VID is enabeld, we should always inejct the pending interrupts when vm enter.
@@ -468,6 +468,20 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
arch->inject_event_pending = false;
} else {
+ /* SDM Vol 3 - table 6-2, inject high priority exception before
+ * maskable hardware interrupt */
+ if (vcpu_inject_hi_exception(vcpu) == 0) {
+ /* inject NMI before maskable hardware interrupt */
+ if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
+ /* Inject NMI vector = 2 */
+ exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
+ VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8U) | IDT_NMI);
+ } else {
+ ret = acrn_inject_pending_vector(vcpu, pending_req_bits);
+ }
+ }
+ }
+
/*
* From SDM Vol3 26.3.2.5:
* Once the virtual interrupt is recognized, it will be delivered
@@ -487,20 +501,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
vlapic_apicv_inject_pir(vlapic);
}
- /* SDM Vol 3 - table 6-2, inject high priority exception before
- * maskable hardware interrupt */
- if (vcpu_inject_hi_exception(vcpu) == 0) {
- /* inject NMI before maskable hardware interrupt */
- if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
- /* Inject NMI vector = 2 */
- exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
- VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8U) | IDT_NMI);
- } else {
- ret = acrn_inject_pending_vector(vcpu, pending_req_bits);
- }
- }
- }
-
/*
* If "virtual-interrupt delivered" is enabled, CPU will evaluate
* and automatic inject the virtual interrupts in appropriate time.
