chip/mec1322/lfw/ec_lfw.c: Format with clang-format
BRANCH=none
TEST=none
@@ -42,7 +42,6 @@ const struct spi_device_t spi_devices[] = {
};
const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
-
void timer_init()
{
uint32_t val = 0;
@@ -71,17 +70,13 @@ void timer_init()
/* Start counting in timer 0 */
MEC1322_TMR32_CTL(0) |= BIT(5);
-
}
-static int spi_flash_readloc(uint8_t *buf_usr,
- unsigned int offset,
+static int spi_flash_readloc(uint8_t *buf_usr, unsigned int offset,
unsigned int bytes)
{
- uint8_t cmd[4] = {SPI_FLASH_READ,
- (offset >> 16) & 0xFF,
- (offset >> 8) & 0xFF,
- offset & 0xFF};
+ uint8_t cmd[4] = { SPI_FLASH_READ, (offset >> 16) & 0xFF,
+ (offset >> 8) & 0xFF, offset & 0xFF };
if (offset + bytes > CONFIG_FLASH_SIZE_BYTES)
return EC_ERROR_INVAL;
@@ -91,8 +86,8 @@ static int spi_flash_readloc(uint8_t *buf_usr,
int spi_image_load(uint32_t offset)
{
- uint8_t *buf = (uint8_t *) (CONFIG_RW_MEM_OFF +
- CONFIG_PROGRAM_MEMORY_BASE);
+ uint8_t *buf =
+ (uint8_t *)(CONFIG_RW_MEM_OFF + CONFIG_PROGRAM_MEMORY_BASE);
uint32_t i;
BUILD_ASSERT(CONFIG_RO_SIZE == CONFIG_RW_SIZE);
@@ -102,7 +97,6 @@ int spi_image_load(uint32_t offset)
spi_flash_readloc(&buf[i], offset + i, SPI_CHUNK_SIZE);
return 0;
-
}
void udelay(unsigned us)
@@ -129,7 +123,6 @@ int timestamp_expired(timestamp_t deadline, const timestamp_t *now)
return now->le.lo >= deadline.le.lo;
}
-
timestamp_t get_time(void)
{
timestamp_t ts;
@@ -169,7 +162,6 @@ void fault_handler(void)
MEC1322_WDG_CTL |= 1;
while (1)
;
-
}
void jump_to_image(uintptr_t init_addr)
@@ -212,10 +204,8 @@ void uart_init(void)
void system_init(void)
{
-
uint32_t wdt_sts = MEC1322_VBAT_STS & MEC1322_VBAT_STS_WDT;
- uint32_t rst_sts = MEC1322_PCR_CHIP_PWR_RST &
- MEC1322_PWR_RST_STS_VCC1;
+ uint32_t rst_sts = MEC1322_PCR_CHIP_PWR_RST & MEC1322_PWR_RST_STS_VCC1;
if (rst_sts || wdt_sts)
MEC1322_VBAT_RAM(MEC1322_IMAGETYPE_IDX) = EC_IMAGE_RO;
@@ -228,7 +218,6 @@ enum ec_image system_get_image_copy(void)
void lfw_main()
{
-
uintptr_t init_addr;
/* install vector table */
