Modified HardFault_Handler.c.
Using an asm handler that can get LR for gcc, and a simpler handler
for armcc.
Common function with main functionality that uses CMSIS intrinsics to
get other core registers.
Made _fault_handler symbol global so HardFault_Handler() can see it.
Fixed hard fault handler for armcc.
* @brief Entry point for interface program logic
*
* DAPLink Interface Firmware
- * Copyright (c) 2009-2018, ARM Limited, All Rights Reserved
+ * Copyright (c) 2009-2019, ARM Limited, All Rights Reserved
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
#include "util.h"
#include "cortex_m.h"
-register unsigned int _psp __asm("psp");
-register unsigned int _msp __asm("msp");
-register unsigned int _lr __asm("lr");
-register unsigned int _control __asm("control");
-void HardFault_Handler()
-{
+
//hexdump logic on hardfault
+__NO_RETURN void _fault_handler(uint32_t _lr)
+{
uint32_t stk_ptr;
- uint32_t * stack = (uint32_t *)_msp;
+ uint32_t * stack = (uint32_t *)__get_MSP();
if ((_lr & 0xF) == 0xD) { //process stack
- stack = (uint32_t *)_psp;
+ stack = (uint32_t *)__get_PSP();
}
//calculate stack ptr before fault
@@ -48,31 +45,43 @@ void HardFault_Handler()
}
config_ram_add_hexdump(_lr); //EXC_RETURN
- config_ram_add_hexdump(_psp);
- config_ram_add_hexdump(_msp);
- config_ram_add_hexdump(_control);
+ config_ram_add_hexdump(__get_PSP());
+ config_ram_add_hexdump(__get_MSP());
+ config_ram_add_hexdump(__get_CONTROL());
config_ram_add_hexdump(stk_ptr); //SP
config_ram_add_hexdump(stack[5]); //LR
config_ram_add_hexdump(stack[6]); //PC
config_ram_add_hexdump(stack[7]); //xPSR
-#ifndef __CORTEX_M
-#error __CORTEX_M not defined!!
-#else
-
-#if (__CORTEX_M > 0x00)
+#if !defined(__CORTEX_M)
+#error "__CORTEX_M not defined!!"
+#elif (__CORTEX_M > 0x00)
config_ram_add_hexdump(SCB->HFSR);
config_ram_add_hexdump(SCB->CFSR);
config_ram_add_hexdump(SCB->DFSR);
config_ram_add_hexdump(SCB->AFSR);
config_ram_add_hexdump(SCB->MMFAR);
config_ram_add_hexdump(SCB->BFAR);
-#endif
-
-#endif //#ifndef __CORTEX_M
+#endif // __CORTEX_M
util_assert(0);
SystemReset();
while (1); // Wait for reset
}
+
+#if defined(__CC_ARM)
+void HardFault_Handler()
+{
+ register unsigned int _lr __asm("lr");
+ _fault_handler(_lr);
+}
+#else
+void HardFault_Handler()
+{
+ asm volatile (
+ " mov r0, lr \n\t"
+ " bl _fault_handler \n\t"
+ );
+}
+#endif
