power/icelake.c: Format with clang-format
BRANCH=none
TEST=none
#define GPIO_SET_LEVEL(signal, value) \
gpio_set_level_verbose(CC_CHIPSET, signal, value)
#else
-#define GPIO_SET_LEVEL(signal, value) \
- gpio_set_level(signal, value)
+#define GPIO_SET_LEVEL(signal, value) gpio_set_level(signal, value)
#endif
/* The wait time is ~150 msec, allow for safety margin. */
@@ -171,7 +170,6 @@ static void enable_pp5000_rail(void)
power_5v_enable(task_get_current(), 1);
else
GPIO_SET_LEVEL(GPIO_EN_PP5000, 1);
-
}
static void dsw_pwrok_pass_thru(void)
@@ -180,8 +178,8 @@ static void dsw_pwrok_pass_thru(void)
/* Pass-through DSW_PWROK to ICL. */
if (dswpwrok_in != gpio_get_level(GPIO_PCH_DSW_PWROK)) {
- if (IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE)
- && dswpwrok_in) {
+ if (IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) &&
+ dswpwrok_in) {
/*
* Once DSW_PWROK is high, reconfigure SLP_S3_L back to
* an input after a short delay.
@@ -257,7 +255,6 @@ enum power_state power_handle_state(enum power_state state)
common_intel_x86_handle_rsmrst(state);
switch (state) {
-
case POWER_G3S5:
if (IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE)) {
/*
@@ -297,7 +294,8 @@ enum power_state power_handle_state(enum power_state state)
* signal doesn't go high within 250 msec then go back to G3.
*/
if (power_wait_signals_timeout(IN_PCH_SLP_SUS_DEASSERTED,
- IN_PCH_SLP_SUS_WAIT_TIME_USEC) != EC_SUCCESS) {
+ IN_PCH_SLP_SUS_WAIT_TIME_USEC) !=
+ EC_SUCCESS) {
CPRINTS("SLP_SUS_L didn't go high! Going back to G3.");
return POWER_S5G3;
}
