[hardware] Update mempool to latest version of `snitch_axi_adapter`
@@ -682,6 +682,9 @@ module mempool_tile
axi_tile_resp_t axi_mst_resp;
snitch_axi_adapter #(
+ .addr_t (snitch_pkg::addr_t),
+ .data_t (snitch_pkg::data_t),
+ .strb_t (snitch_pkg::strb_t),
.axi_mst_req_t (axi_core_req_t ),
.axi_mst_resp_t (axi_core_resp_t )
) i_snitch_core_axi_adapter (
@@ -691,6 +694,7 @@ module mempool_tile
.slv_qwrite_i(soc_req_o.write ),
.slv_qamo_i (soc_req_o.amo ),
.slv_qdata_i (soc_req_o.data ),
+ .slv_qsize_i (3'b010 ),
.slv_qstrb_i (soc_req_o.strb ),
.slv_qrlen_i ('0 ),
.slv_qvalid_i(soc_qvalid ),
@@ -705,11 +709,10 @@ module mempool_tile
);
// TODO: Add demux for the case where we have many intruction caches
- initial begin
- assert(NumCaches == 1) else $fatal("NumCaches > 1 is not supported!");
- end
-
snitch_axi_adapter #(
+ .addr_t (snitch_pkg::addr_t),
+ .data_t (snitch_pkg::data_t),
+ .strb_t (snitch_pkg::strb_t),
.axi_mst_req_t (axi_core_req_t ),
.axi_mst_resp_t (axi_core_resp_t )
) i_snitch_cache_axi_adapter (
@@ -719,6 +722,7 @@ module mempool_tile
.slv_qwrite_i('0 ),
.slv_qamo_i ('0 ),
.slv_qdata_i ('0 ),
+ .slv_qsize_i (3'($clog2(AxiDataWidth/8))),
.slv_qstrb_i ('0 ),
.slv_qrlen_i (refill_qlen[0] ),
.slv_qvalid_i(refill_qvalid[0] ),
@@ -794,6 +798,12 @@ module mempool_tile
if (NumBanksPerTile < 1)
$fatal(1, "[mempool_tile] The number of banks per tile must be larger than one");
+ if (NumCaches != 1)
+ $error("NumCaches > 1 is not supported!");
+
+ if (DataWidth < AxiDataWidth)
+ $error("AxiDataWidth needs to be larger than DataWidth!");
+
endmodule : mempool_tile
/*****************
