lowercase readme
# RISC-V Project Template
-**THIS BRANCH IS UNDER DEVELOPMENT**
-**IT CURRENTLY HAS MANY SUBMODULES**
-**PLEASE RUN ./scripts/init-submodules-no-riscv-tools.sh TO UPDATE SUBMODULES, UNLESS YOU WANT TO SPEND A LONG TIME WAITING FOR SUBMODULE TO CLONE**
+**This branch is under development**
+**It currently has many submodules**
+**Please run ./scripts/init-submodules-no-riscv-tools.sh to update submodules, unless you want to spend a long time waiting for submodule to clone**
This is a starter template for your custom RISC-V project. It will allow you
to leverage the Chisel HDL and RocketChip SoC generator to produce a
