chip/mchp/system.c: Format with clang-format
BRANCH=none
TEST=none
@@ -59,7 +59,6 @@ static void vtr3_voltage_select(int use18v)
}
#endif
-
/*
* The current logic will set EC_RESET_FLAG_RESET_PIN flag
* even if the reset was caused by WDT. MEC170x/MEC152x HW RESET_SYS
@@ -76,8 +75,7 @@ static void check_reset_cause(void)
uint32_t status = MCHP_VBAT_STS;
uint32_t flags = 0;
uint32_t rst_sts = MCHP_PCR_PWR_RST_STS &
- (MCHP_PWR_RST_STS_SYS |
- MCHP_PWR_RST_STS_VBAT);
+ (MCHP_PWR_RST_STS_SYS | MCHP_PWR_RST_STS_VBAT);
/* Clear the reset causes now that we've read them */
MCHP_VBAT_STS |= status;
@@ -92,12 +90,11 @@ static void check_reset_cause(void)
if (rst_sts & MCHP_PWR_RST_STS_SYS)
flags |= EC_RESET_FLAG_RESET_PIN;
-
flags |= chip_read_reset_flags();
chip_save_reset_flags(0);
- if ((status & MCHP_VBAT_STS_WDT) && !(flags & (EC_RESET_FLAG_SOFT |
- EC_RESET_FLAG_HARD |
+ if ((status & MCHP_VBAT_STS_WDT) &&
+ !(flags & (EC_RESET_FLAG_SOFT | EC_RESET_FLAG_HARD |
EC_RESET_FLAG_HIBERNATE)))
flags |= EC_RESET_FLAG_WATCHDOG;
@@ -441,7 +438,6 @@ static void disable_host_ifc_clocks(void)
}
#endif
-
/*
* Called when hibernation timer is not used in deep sleep.
* Switch 32 KHz clock logic from external 32KHz input to
@@ -450,7 +446,9 @@ static void disable_host_ifc_clocks(void)
* oscillator.
*/
#ifdef CHIP_FAMILY_MEC172X
-static void switch_32k_pin2sil(void) {}
+static void switch_32k_pin2sil(void)
+{
+}
#else
static void switch_32k_pin2sil(void)
{
@@ -585,6 +583,6 @@ uint32_t system_get_lfw_address(void)
void system_set_image_copy(enum ec_image copy)
{
- MCHP_VBAT_RAM(MCHP_IMAGETYPE_IDX) = (copy == EC_IMAGE_RW) ?
- EC_IMAGE_RW : EC_IMAGE_RO;
+ MCHP_VBAT_RAM(MCHP_IMAGETYPE_IDX) =
+ (copy == EC_IMAGE_RW) ? EC_IMAGE_RW : EC_IMAGE_RO;
}
