stm32h7: Cleanup reset reg constants
This brings no change in functionality.
BRANCH=nocturne,hatch
TEST=make buildall -j
/* Reset causes definitions */
#define STM32_RCC_RESET_CAUSE STM32_RCC_RSR
-#define RESET_CAUSE_WDG 0x14000000
-#define RESET_CAUSE_SFT 0x01000000
-#define RESET_CAUSE_POR 0x00800000
-#define RESET_CAUSE_PIN 0x00400000
-#define RESET_CAUSE_OTHER 0xfffe0000
-#define RESET_CAUSE_RMVF 0x00010000
+#define RESET_CAUSE_WDG (BIT(28)|BIT(26))
+#define RESET_CAUSE_SFT BIT(24)
+#define RESET_CAUSE_POR BIT(23)
+#define RESET_CAUSE_PIN BIT(22)
+#define RESET_CAUSE_OTHER (BIT(31)|BIT(30)|BIT(29)|BIT(28)| \
+ BIT(27)|BIT(26)|BIT(25)|BIT(24)| \
+ BIT(23)|BIT(22)|BIT(21)|BIT(20)| \
+ BIT(19)|BIT(18)|BIT(17))
+#define RESET_CAUSE_RMVF BIT(16)
+
/* Power cause in PWR CPUCR register (Standby&Stop modes) */
#define STM32_PWR_RESET_CAUSE STM32_PWR_CPUCR
#define STM32_PWR_RESET_CAUSE_CLR STM32_PWR_CPUCR
-#define RESET_CAUSE_SBF 0x00000040
-#define RESET_CAUSE_SBF_CLR 0x00000200
+#define RESET_CAUSE_SBF BIT(6)
+#define RESET_CAUSE_SBF_CLR BIT(9)
/* --- Watchdogs --- */
