zephyr: MTL power sequencing
MTL doesn't have DSW_PWROK signal.
BRANCH=none
TEST=zmake build mtlrvpp_npcx --clobber; MTL RVP boots to S0.
POWER_SIGNAL_MASK(PWR_ALL_SYS_PWRGD))
#define MASK_VW_POWER \
- (POWER_SIGNAL_MASK(PWR_RSMRST) | \
- POWER_SIGNAL_MASK(PWR_DSW_PWROK))
+ POWER_SIGNAL_MASK(PWR_RSMRST)
#define VALUE_VW_POWER \
- (POWER_SIGNAL_MASK(PWR_RSMRST) | \
- POWER_SIGNAL_MASK(PWR_DSW_PWROK))
+ POWER_SIGNAL_MASK(PWR_RSMRST)
#define MASK_S0 \
(MASK_ALL_POWER_GOOD | \
#define MASK_S5 \
(POWER_SIGNAL_MASK(PWR_RSMRST) | \
- POWER_SIGNAL_MASK(PWR_DSW_PWROK) | \
POWER_SIGNAL_MASK(PWR_SLP_S3) | \
POWER_SIGNAL_MASK(PWR_SLP_S4) | \
POWER_SIGNAL_MASK(PWR_SLP_S5))
