hv: vlapic: minor fix for update_msr_bitmap_x2apic_apicv
Shouldn't trap TPR since we always enable "Use TPR shadow"
@@ -640,10 +640,11 @@ void update_msr_bitmap_x2apic_apicv(const struct acrn_vcpu *vcpu)
* writes to them are virtualized with Register Virtualization
* Refer to Section 29.1 in Intel SDM Vol. 3
*/
- enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_TPR, INTERCEPT_DISABLE);
enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_EOI, INTERCEPT_READ);
enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_SELF_IPI, INTERCEPT_READ);
}
+
+ enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_TPR, INTERCEPT_DISABLE);
}
/*
