NVMe doc update
# NVMe Usage
-When SNAP is built for the FGT card with NVMe support enabled, the SNAP framework provides an easy to use interface to initiate NVMe writes and reads to and from the onboard main memory. Before the NVMe sub-system can be used, it needs to be initialized. The **"snap_nvme_init"** utility program in the software/tools directory can be used to perform the initalization.
+When SNAP is built for the FGT card with NVMe support enabled, the SNAP framework provides an easy to use interface to initiate data transfers between the NVMe drives and the onboard SDRAM. Before the NVMe sub-system can be used, it needs to be initialized. The **"snap_nvme_init"** utility program in the software/tools directory can be used to perform the initalization.
Once initalization is done, SNAP actions must use the NVMe action interface (AXI MM write burst) to initiate transfers. The following registers must be programmed to do so.
@@ -14,14 +14,14 @@ offset (write only registers)
0x14: command register (initiates the read or write transfer)
command register bits:
- 3:0 0x0 -> NVMe read command; 0x1 -> NVMe write command
+ 3:0 0x0 -> NVMe read command (NVMe to SDRAM) ; 0x1 -> NVMe write command (SDRAM to NVMe)
7:4 0x1 -> NVMe drive 0 ; 0x3 -> NVMe drive 1
31:8 all zeros (0x0000_00)
```
The NVMe subsystem can handle up to 218 read or write requests per drive. If the submission queue is full, the write request to the NVMe action register is blocked until the oldest occupied queue entry is freed. The user action must poll the NVMe Action Track Register to read and clear the command completion bit.
-For the NVMe subsystem the onboard DRAM starts at offset 0x2_0000_0000. This offset must always be added to desired DRAM address.
+For the NVMe subsystem the onboard DRAM starts at offset 0x2_0000_0000. This offset must always be added to desired SDRAM address.
## NVMe Action Track Register (read only)
```
@@ -33,10 +33,10 @@ The user action must poll for completion for each submitted read or write comman
## Pseudo code example
```
- ; write 16 x 512 byte blocks from DRAM address 0x1_0700_0000 to block address 0x1000 at SSD0
+ ; write 16 x 512 byte blocks from SDRAM address 0x1_0700_0000 to block address 0x1000 at SSD0
write 0x0: 0x0700_0000, 0x000_0003, 0x0000_1000, 0x0000_0000, 0xf, 0x11
- ; read 17 x 512 byte blocks from SSD1 block address 0 to DRAM address 0x0800_0000
+ ; read 17 x 512 byte blocks from SSD1 block address 0 to SDRAM address 0x0800_0000
write 0x0: 0x0800_0000, 0x000_0002, 0x0000_0000, 0x0000_0000, 0x10, 0x30
; check for command completion
