chip/npcx/gpio_chip-npcx5.h: Format with clang-format
BRANCH=none
TEST=none
#define NPCX_ALT_GPIO_A_7
#endif
-#define NPCX_ALT_TABLE { \
+#define NPCX_ALT_TABLE \
+ { \
NPCX_ALT_GPIO_0_3 /* KSO16 */ \
NPCX_ALT_GPIO_0_4 /* KSO13 */ \
NPCX_ALT_GPIO_0_5 /* KSO12 */ \
NPCX_ALT_GPIO_0_6 /* KSO11 */ \
NPCX_ALT_GPIO_0_7 /* KSO10 */ \
- NPCX_ALT_GPIO_1_0 /* KSO09 & CR_SOUT */ \
+ NPCX_ALT_GPIO_1_0 /* KSO09 \
+ & CR_SOUT */ \
NPCX_ALT_GPIO_1_1 /* KSO08 & CR_SIN */ \
NPCX_ALT_GPIO_1_2 /* KSO07 */ \
NPCX_ALT_GPIO_1_3 /* KSO06 */ \
#define NPCX_LVOL_CTRL_3_7 NPCX_GPIO(C, 5)
/* 4 Low-Voltage Control Groups on npcx5 */
-#define NPCX_LVOL_TABLE { { NPCX_LVOL_CTRL_ITEMS(0), }, \
- { NPCX_LVOL_CTRL_ITEMS(1), }, \
- { NPCX_LVOL_CTRL_ITEMS(2), }, \
- { NPCX_LVOL_CTRL_ITEMS(3), }, }
+#define NPCX_LVOL_TABLE \
+ { \
+ { \
+ NPCX_LVOL_CTRL_ITEMS(0), \
+ }, \
+ { \
+ NPCX_LVOL_CTRL_ITEMS(1), \
+ }, \
+ { \
+ NPCX_LVOL_CTRL_ITEMS(2), \
+ }, \
+ { \
+ NPCX_LVOL_CTRL_ITEMS(3), \
+ }, \
+ }
#endif /* __CROS_EC_GPIO_CHIP_NPCX5_H */
