sse2: add NEON implementation of simde_mm_div_{sd,pd}
Fixes
@@ -2917,6 +2917,8 @@ simde_mm_div_pd (simde__m128d a, simde__m128d b) {
#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
r_.f64 = a_.f64 / b_.f64;
+ #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+ r_.neon_f64 = vdivq_f64(a_.neon_f64, b_.neon_f64);
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
r_.wasm_v128 = wasm_f64x2_div(a_.wasm_v128, b_.wasm_v128);
#else
@@ -2946,8 +2948,13 @@ simde_mm_div_sd (simde__m128d a, simde__m128d b) {
a_ = simde__m128d_to_private(a),
b_ = simde__m128d_to_private(b);
+ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+ float64x2_t temp = vdivq_f64(a_.neon_f64, b_.neon_f64);
+ r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1);
+ #else
r_.f64[0] = a_.f64[0] / b_.f64[0];
r_.f64[1] = a_.f64[1];
+ #endif
return simde__m128d_from_private(r_);
#endif
@@ -3859,6 +3866,8 @@ simde_mm_mul_pd (simde__m128d a, simde__m128d b) {
#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
r_.f64 = a_.f64 * b_.f64;
+ #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+ r_.neon_f64 = vmulq_f64(a_.neon_f64, b_.neon_f64);
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
r_.wasm_v128 = wasm_f64x2_mul(a_.wasm_v128, b_.wasm_v128);
#else
@@ -3888,8 +3897,13 @@ simde_mm_mul_sd (simde__m128d a, simde__m128d b) {
a_ = simde__m128d_to_private(a),
b_ = simde__m128d_to_private(b);
+ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+ float64x2_t temp = vmulq_f64(a_.neon_f64, b_.neon_f64);
+ r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1);
+ #else
r_.f64[0] = a_.f64[0] * b_.f64[0];
r_.f64[1] = a_.f64[1];
+ #endif
return simde__m128d_from_private(r_);
#endif
