don't tell users to use deprecated setResource
Accessing Scala Resources
===============================
-A simple way to copy over a source file to the build directory to be used for a simulation compile or VLSI flow is to use the ``setResource`` or ``addResource`` functions given by FIRRTL.
-They can be used in the following way:
+A simple way to copy over a source file to the build directory to be used for a simulation compile or VLSI flow is to use the ``addResource`` functions given by FIRRTL.
+It can be used in the following way:
.. code-block:: scala
@@ -14,13 +14,13 @@ They can be used in the following way:
val exit = Output(Bool())
})
- setResource("/testchipip/vsrc/SimSerial.v")
- setResource("/testchipip/csrc/SimSerial.cc")
+ addResource("/testchipip/vsrc/SimSerial.v")
+ addResource("/testchipip/csrc/SimSerial.cc")
}
In this example, the ``SimSerial`` files will be copied from a specific folder (in this case the ``path/to/testchipip/src/main/resources/testchipip/...``) to the build folder.
-The ``set/addResource`` path retrieves resources from the ``src/main/resources`` directory.
-So to get an item at ``src/main/resources/fileA.v`` you can use ``setResource("/fileA.v")``.
+The ``addResource`` path retrieves resources from the ``src/main/resources`` directory.
+So to get an item at ``src/main/resources/fileA.v`` you can use ``addResource("/fileA.v")``.
However, one caveat of this approach is that to retrieve the file during the FIRRTL compile, you must have that project in the FIRRTL compiler's classpath.
Thus, you need to add the SBT project as a dependency to the FIRRTL compiler in the Chipyard ``build.sbt``, which in Chipyards case is the ``tapeout`` project.
For example, you added a new project called ``myAwesomeAccel`` in the Chipyard ``build.sbt``.
