Deleting blanks in the line end
@@ -100,7 +100,6 @@ void fill_vnode_array(snapu32_t vex_num, VexNode * vex_array, snapu64_t address
{
xfer_bytes = read_bulk(src_mem, address + address_xfer_offset, left_bytes, block_buf);
-
ap_uint<VEX_WIDTH> iii, jjj;
for(iii = 0; iii < xfer_bytes/sizeof(VexNode); iii++)
@@ -118,7 +117,6 @@ void fill_vnode_array(snapu32_t vex_num, VexNode * vex_array, snapu64_t address
}
index ++;
}
-
left_bytes -= xfer_bytes;
address_xfer_offset += MAX_NB_OF_BYTES_READ;
}
@@ -160,14 +158,11 @@ void hls_action(snap_membus_t *din_gmem, snap_membus_t *dout_gmem,
ap_uint<VEX_WIDTH> i,j, root, current, vex_num;
ap_uint<VEX_WIDTH> vnode_cnt;
ap_uint<VEX_WIDTH> adjvex;
-
snapu32_t vnode_idx;
snapu64_t edgelink_ptr;
-
snap_membus_t edge_node;
snapu32_t buf_out[32]; //To fill a cacheline and write to output_traverse.
-
/* Required Action Type Detection */
switch (Action_Register->Control.flags) {
case 0:
@@ -208,19 +203,16 @@ void hls_action(snap_membus_t *din_gmem, snap_membus_t *dout_gmem,
//Enqueue
Q.write(root); //Need several actions to fill the internal until empty() takes effect.
-
for (i = 0; i < vex_num; i ++)
{
#pragma HLS UNROLL factor=128
visited[i] = 0;
}
-
// First fill
buf_out[0] = root;
vnode_cnt = 1;
vnode_idx = 1;
visited[root]=1;
-
while (!Q.empty())
{
current = Q.read();
@@ -263,10 +255,8 @@ void hls_action(snap_membus_t *din_gmem, snap_membus_t *dout_gmem,
//Last node
buf_out[vnode_idx] = 0xFF000000 + vnode_cnt; //0xFF is a mark of END.
write_out_buf(dout_gmem, commit_address, buf_out);
-
vnode_idx = 0;
commit_address += BPERCL; //One cacheline
-
//Update register
Action_Register->Data.status_pos = commit_address(31,0);
Action_Register->Data.status_vex = root;
