core/cortex-m0/panic.c: Format with clang-format
BRANCH=none
TEST=none
/* Whether bus fault is ignored */
static int bus_fault_ignored;
-
/* Panic data goes at the end of RAM. */
static struct panic_data *const pdata_ptr = PANIC_DATA_PTR;
@@ -128,8 +127,7 @@ void __keep report_panic(void)
pdata->cm.regs[CORTEX_PANIC_REGISTER_MSP] :
pdata->cm.regs[CORTEX_PANIC_REGISTER_PSP];
/* If stack is valid, copy exception frame to pdata */
- if ((sp & 3) == 0 &&
- sp >= CONFIG_RAM_BASE &&
+ if ((sp & 3) == 0 && sp >= CONFIG_RAM_BASE &&
sp <= CONFIG_RAM_BASE + CONFIG_RAM_SIZE - 8 * sizeof(uint32_t)) {
const uint32_t *sregs = (const uint32_t *)sp;
int i;
@@ -162,9 +160,10 @@ void exception_panic(void)
"mov r5, lr\n"
"stmia %[pregs]!, {r1-r5}\n"
"mov sp, %[pstack]\n"
- "bl report_panic\n" : :
- [pregs] "r" (pdata_ptr->cm.regs),
- [pstack] "r" (pstack_addr) :
+ "bl report_panic\n"
+ :
+ : [pregs] "r"(pdata_ptr->cm.regs), [pstack] "r"(pstack_addr)
+ :
/* Constraints protecting these from being clobbered.
* Gcc should be using r0 & r12 for pregs and pstack. */
"r1", "r2", "r3", "r4", "r5", "r6",
@@ -177,17 +176,19 @@ void exception_panic(void)
#ifndef __clang__
"r7",
#endif
- "r8", "r9", "r10", "r11", "cc", "memory"
- );
+ "r8", "r9", "r10", "r11", "cc", "memory");
}
#ifdef CONFIG_SOFTWARE_PANIC
void software_panic(uint32_t reason, uint32_t info)
{
- __asm__("mov " STRINGIFY(SOFTWARE_PANIC_INFO_REG) ", %0\n"
- "mov " STRINGIFY(SOFTWARE_PANIC_REASON_REG) ", %1\n"
+ __asm__("mov " STRINGIFY(
+ SOFTWARE_PANIC_INFO_REG) ", %0\n"
+ "mov " STRINGIFY(
+ SOFTWARE_PANIC_REASON_REG) ", %1\n"
"bl exception_panic\n"
- : : "r"(info), "r"(reason));
+ :
+ : "r"(info), "r"(reason));
__builtin_unreachable();
}
