chip/stm32/i2c_ite_flash_support.c: Format with clang-format
BRANCH=none
TEST=none
@@ -97,16 +97,15 @@ static int ite_i2c_read_register(uint8_t register_offset, uint8_t *output)
int ret;
/* Tell the ITE EC which register we want to read. */
ret = i2c_xfer_unlocked(ite_dfu_config.i2c_port,
- ITE_DFU_I2C_CMD_ADDR_FLAGS,
- &register_offset, sizeof(register_offset),
- NULL, 0, I2C_XFER_SINGLE);
+ ITE_DFU_I2C_CMD_ADDR_FLAGS, &register_offset,
+ sizeof(register_offset), NULL, 0,
+ I2C_XFER_SINGLE);
if (ret != EC_SUCCESS)
return ret;
/* Read in the 1 byte register value. */
ret = i2c_xfer_unlocked(ite_dfu_config.i2c_port,
- ITE_DFU_I2C_DATA_ADDR_FLAGS,
- NULL, 0,
- output, sizeof(*output), I2C_XFER_SINGLE);
+ ITE_DFU_I2C_DATA_ADDR_FLAGS, NULL, 0, output,
+ sizeof(*output), I2C_XFER_SINGLE);
return ret;
}
@@ -236,8 +235,8 @@ static int command_enable_ite_dfu(int argc, char **argv)
return EC_ERROR_ACCESS_DENIED;
/* Enable peripheral clocks. */
- STM32_RCC_APB2ENR |=
- STM32_RCC_APB2ENR_TIM16EN | STM32_RCC_APB2ENR_TIM17EN;
+ STM32_RCC_APB2ENR |= STM32_RCC_APB2ENR_TIM16EN |
+ STM32_RCC_APB2ENR_TIM17EN;
/* Reset timer registers which are not otherwise set below. */
STM32_TIM_CR2(16) = 0x0000;
@@ -265,10 +264,10 @@ static int command_enable_ite_dfu(int argc, char **argv)
STM32_TIM_ARR(17) = (MHz / SMDAT_WAVEFORM_PERIOD_HZ) - 1;
/* Set output compare 1 mode to PWM mode 1 and enable preload. */
- STM32_TIM_CCMR1(16) =
- STM32_TIM_CCMR1_OC1M_PWM_MODE_1 | STM32_TIM_CCMR1_OC1PE;
- STM32_TIM_CCMR1(17) =
- STM32_TIM_CCMR1_OC1M_PWM_MODE_1 | STM32_TIM_CCMR1_OC1PE;
+ STM32_TIM_CCMR1(16) = STM32_TIM_CCMR1_OC1M_PWM_MODE_1 |
+ STM32_TIM_CCMR1_OC1PE;
+ STM32_TIM_CCMR1(17) = STM32_TIM_CCMR1_OC1M_PWM_MODE_1 |
+ STM32_TIM_CCMR1_OC1PE;
/*
* Enable output compare 1 (or its N counterpart). Note that if only
@@ -335,8 +334,7 @@ static int command_enable_ite_dfu(int argc, char **argv)
return cprint_ite_chip_id();
}
-DECLARE_CONSOLE_COMMAND(
- enable_ite_dfu, command_enable_ite_dfu, "",
+DECLARE_CONSOLE_COMMAND(enable_ite_dfu, command_enable_ite_dfu, "",
"Enable ITE Direct Firmware Update (DFU) mode");
/* Read ITE chip ID. Can be used to verify ITE DFU mode. */
