hv: pci: minor fix of coding style about pci_read_cap
There's no need to check which capability we care at the very beginning. We could
do it later step by step.
Acked-by: Eddie Dong
@@ -414,24 +414,21 @@ static inline uint32_t pci_pdev_get_nr_bars(uint8_t hdr_type)
*/
static void pci_read_cap(struct pci_pdev *pdev)
{
- uint8_t ptr, cap;
+ uint8_t pos, cap;
uint32_t msgctrl;
- uint32_t len, offset, idx;
+ uint32_t len, idx;
uint32_t table_info;
uint32_t pcie_devcap, val;
- ptr = (uint8_t)pci_pdev_read_cfg(pdev->bdf, PCIR_CAP_PTR, 1U);
+ pos = (uint8_t)pci_pdev_read_cfg(pdev->bdf, PCIR_CAP_PTR, 1U);
- while ((ptr != 0U) && (ptr != 0xFFU)) {
- cap = (uint8_t)pci_pdev_read_cfg(pdev->bdf, ptr + PCICAP_ID, 1U);
+ while ((pos != 0U) && (pos != 0xFFU)) {
+ cap = (uint8_t)pci_pdev_read_cfg(pdev->bdf, pos + PCICAP_ID, 1U);
- /* Ignore all other Capability IDs for now */
- if ((cap == PCIY_MSI) || (cap == PCIY_MSIX) || (cap == PCIY_PCIE) || (cap == PCIY_AF)) {
- offset = ptr;
if (cap == PCIY_MSI) {
- pdev->msi_capoff = offset;
+ pdev->msi_capoff = pos;
} else if (cap == PCIY_MSIX) {
- pdev->msix.capoff = offset;
+ pdev->msix.capoff = pos;
pdev->msix.caplen = MSIX_CAPLEN;
len = pdev->msix.caplen;
@@ -449,22 +446,21 @@ static void pci_read_cap(struct pci_pdev *pdev)
/* Copy MSIX capability struct into buffer */
for (idx = 0U; idx < len; idx++) {
- pdev->msix.cap[idx] = (uint8_t)pci_pdev_read_cfg(pdev->bdf, offset + idx, 1U);
+ pdev->msix.cap[idx] = (uint8_t)pci_pdev_read_cfg(pdev->bdf, (uint32_t)pos + idx, 1U);
}
} else if (cap == PCIY_PCIE) {
- /* PCI Express Capability */
- pdev->pcie_capoff = offset;
- pcie_devcap = pci_pdev_read_cfg(pdev->bdf, offset + PCIR_PCIE_DEVCAP, 4U);
+ pdev->pcie_capoff = pos;
+ pcie_devcap = pci_pdev_read_cfg(pdev->bdf, pos + PCIR_PCIE_DEVCAP, 4U);
pdev->has_flr = ((pcie_devcap & PCIM_PCIE_FLRCAP) != 0U) ? true : false;
- } else {
- /* Conventional PCI Advanced Features Capability */
- pdev->af_capoff = offset;
- val = pci_pdev_read_cfg(pdev->bdf, offset, 4U);
+ } else if (cap == PCIY_AF) {
+ pdev->af_capoff = pos;
+ val = pci_pdev_read_cfg(pdev->bdf, pos, 4U);
pdev->has_af_flr = ((val & PCIM_AF_FLR_CAP) != 0U) ? true : false;
- }
+ } else {
+ /* Ignore all other Capability IDs for now */
}
- ptr = (uint8_t)pci_pdev_read_cfg(pdev->bdf, ptr + PCICAP_NEXTPTR, 1U);
+ pos = (uint8_t)pci_pdev_read_cfg(pdev->bdf, pos + PCICAP_NEXTPTR, 1U);
}
}
