Add portenta clock config.
// FB Heap Block Size
#define OMV_UMM_BLOCK_SIZE 16
+//PLL1 480MHz/48MHz for USB, SDMMC and FDCAN
+#define OMV_OSC_PLL1M (9)
+#define OMV_OSC_PLL1N (320)
+#define OMV_OSC_PLL1P (2)
+#define OMV_OSC_PLL1Q (20)
+#define OMV_OSC_PLL1R (2)
+#define OMV_OSC_PLL1VCI (RCC_PLL1VCIRANGE_2)
+#define OMV_OSC_PLL1VCO (RCC_PLL1VCOWIDE)
+#define OMV_OSC_PLL1FRAC (0)
+
+// PLL2 180MHz for FMC and QSPI.
+#define OMV_OSC_PLL2M (3)
+#define OMV_OSC_PLL2N (40)
+#define OMV_OSC_PLL2P (2)
+#define OMV_OSC_PLL2Q (2)
+#define OMV_OSC_PLL2R (2)
+#define OMV_OSC_PLL2VCI (RCC_PLL2VCIRANGE_2)
+#define OMV_OSC_PLL2VCO (RCC_PLL2VCOWIDE)
+#define OMV_OSC_PLL2FRAC (0)
+
+// PLL3 160MHz for ADC and SPI123
+#define OMV_OSC_PLL3M (9)
+#define OMV_OSC_PLL3N (320)
+#define OMV_OSC_PLL3P (2)
+#define OMV_OSC_PLL3Q (6)
+#define OMV_OSC_PLL3R (2)
+#define OMV_OSC_PLL3VCI (RCC_PLL3VCIRANGE_2)
+#define OMV_OSC_PLL3VCO (RCC_PLL3VCOWIDE)
+#define OMV_OSC_PLL3FRAC (0)
+
+#define OMV_FLASH_LATENCY (FLASH_LATENCY_2)
+
// Linker script constants (see the linker script template stm32fxxx.ld.S).
// Note: fb_alloc is a stack-based, dynamically allocated memory on FB.
// The maximum available fb_alloc memory = FB_ALLOC_SIZE + FB_SIZE - (w*h*bpp).
