kernel/os - deal with extended frames when calculating
sp for corefile.
@@ -93,15 +93,27 @@ trap_to_coredump(struct trap_frame *tf, struct coredump_regs *regs)
/*
* SP just before exception for the coredump.
* See ARMv7-M Architecture Ref Manual, sections B1.5.6 - B1.5.8
- * SP is adjusted by 0x20.
- * If SCB->CCR.STKALIGN is set, SP is aligned to 8-byte boundary on
- * exception entry.
+ * If floating point registers were pushed to stack, SP is adjusted
+ * by 0x68.
+ * Otherwise, SP is adjusted by 0x20.
+ * If SCB->CCR.STKALIGN is set, or fpu is active, SP is aligned to
+ * 8-byte boundary on exception entry.
* If this alignment adjustment happened, xPSR will have bit 9 set.
*/
+ if ((tf->lr & 0x10) == 0) {
+ /*
+ * Extended frame
+ */
+ regs->sp = ((uint32_t)tf->ef) + 0x68;
+ if (tf->ef->psr & (1 << 9)) {
+ regs->sp += 4;
+ }
+ } else {
regs->sp = ((uint32_t)tf->ef) + 0x20;
if ((SCB->CCR & SCB_CCR_STKALIGN_Msk) & tf->ef->psr & (1 << 9)) {
regs->sp += 4;
}
+ }
regs->lr = tf->ef->lr;
regs->pc = tf->ef->pc;
regs->psr = tf->ef->psr;
