System: fix RTCFAST section alignment
This bugfix contains 3 fixes:
1. .rtc_dummy section is removed (not needed for C3)
2. .rtc_text section is padded with 16B for possible CPU prefetch
3. .rtc_text section is aligned to 4B boundary to comply with PMS Memprot requirements
@@ -16,26 +16,20 @@ SECTIONS
.rtc.text :
{
. = ALIGN(4);
+ _rtc_fast_start = ABSOLUTE(.);
mapping[rtc_text]
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
*(.rtc_text_end_test)
+
+ /* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */
+ . += _esp_memprot_prefetch_pad_size;
+ . = ALIGN(4);
+
_rtc_text_end = ABSOLUTE(.);
} > rtc_iram_seg
- /**
- * This section is required to skip rtc.text area because rtc_iram_seg and
- * rtc_data_seg are reflect the same address space on different buses.
- */
- .rtc.dummy :
- {
- _rtc_dummy_start = ABSOLUTE(.);
- _rtc_fast_start = ABSOLUTE(.);
- . = SIZEOF(.rtc.text);
- _rtc_dummy_end = ABSOLUTE(.);
- } > rtc_data_seg
-
/**
* This section located in RTC FAST Memory area.
* It holds data marked with RTC_FAST_ATTR attribute.
@@ -375,11 +369,11 @@ SECTIONS
/* Marks the end of IRAM code segment */
.iram0.text_end (NOLOAD) :
{
+ /* iram_end_test section exists for use by Memprot unit tests only */
+ *(.iram_end_test)
/* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
. += _esp_memprot_prefetch_pad_size;
. = ALIGN(_esp_memprot_align_size);
- /* iram_end_test section exists for use by Memprot unit tests only */
- *(.iram_end_test)
_iram_text_end = ABSOLUTE(.);
} > iram0_0_seg
