Rework SWO output
#error "ITM port is not available on Cortex-M0(+) cores. Need to set CMake option SWO_OUTPUT to OFF."
#else
+// number of attempts to write to the ITM port before quit
+#define ITM_WRITE_ATTEMPTS 10
+
extern "C" void SwoInit()
{
// set SWO pin (PB3) to alternate mode (0 == the status after RESET)
@@ -57,7 +60,30 @@ extern "C" void SwoInit()
extern "C" void SwoPrintChar(char c)
{
- ITM_SendChar(c);
+ ASSERT((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL);
+ ASSERT((ITM->TER & 1UL ) != 0UL);
+
+ uint32_t retryCounter = ITM_WRITE_ATTEMPTS;
+ bool okToTx = ITM->PORT[0U].u32 == 0UL;
+
+ // wait (with timeout) until ITM port TX buffer is available
+ while( !okToTx &&
+ (retryCounter > 0) )
+ {
+ // do... nothing
+ __NOP();
+
+ // decrease retry counter
+ retryCounter--;
+
+ // check again
+ okToTx = (ITM->PORT[0U].u32 == 0UL);
+ }
+
+ if(okToTx)
+ {
+ ITM->PORT[0U].u8 = (uint8_t)c;
+ }
}
extern "C" void SwoPrintString(const char *s)
@@ -75,26 +101,40 @@ __STATIC_INLINE uint32_t GenericPort_Write_CMSIS(int portNum, const char* data,
{
(void)portNum;
+ ASSERT((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL);
+ ASSERT((ITM->TER & 1UL ) != 0UL);
+
char* p = (char*)data;
uint32_t counter = 0;
+ uint32_t retryCounter;
+ bool okToTx = ITM->PORT[0U].u32 == 0UL;
- // check if ITM port is enabled before start sending
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while(*p != '\0' || counter < size)
+ while( *p != '\0' &&
+ counter < size )
{
- // wait until TX buffer is available
- while (ITM->PORT[0U].u32 == 0UL)
+ retryCounter = ITM_WRITE_ATTEMPTS;
+
+ // wait (with timeout) until ITM port TX buffer is available
+ while( !okToTx &&
+ (retryCounter > 0) )
{
+ // do... nothing
__NOP();
+
+ // decrease retry counter
+ retryCounter--;
+
+ // check again
+ okToTx = (ITM->PORT[0U].u32 == 0UL);
}
+ if(okToTx)
+ {
ITM->PORT[0U].u8 = (uint8_t)*p++;
+ }
counter++;
}
- }
return counter;
}
