chip/npcx/uartn.c: Format with clang-format
BRANCH=none
TEST=none
* (i.e. FIFO is not empty or last byte in TSFT (Transmit Shift register)
* is not sent)
*/
-#define NPCX_UART_TX_IN_XMIT(n) \
- (!IS_BIT_SET(NPCX_UFTSTS(n), NPCX_UFTSTS_NXMIP))
+#define NPCX_UART_TX_IN_XMIT(n) (!IS_BIT_SET(NPCX_UFTSTS(n), NPCX_UFTSTS_NXMIP))
/*
* Enable to generate interrupt when there is at least one byte
* in the receive FIFO
*/
-#define NPCX_UART_RX_INT_EN(n) \
- (SET_BIT(NPCX_UFRCTL(n), NPCX_UFRCTL_RNEMPTY_EN))
+#define NPCX_UART_RX_INT_EN(n) (SET_BIT(NPCX_UFRCTL(n), NPCX_UFRCTL_RNEMPTY_EN))
/* True if at least one byte is in the receive FIFO */
#define NPCX_UART_RX_IS_AVAILABLE(n) \
(IS_BIT_SET(NPCX_UFRSTS(n), NPCX_UFRSTS_RFIFO_NEMPTY_STS))
@@ -211,8 +209,8 @@ static void uartn_set_fifo_mode(uint8_t uart_num)
/* Enable the UART FIFO mode */
SET_BIT(NPCX_UMDSL(uart_num), NPCX_UMDSL_FIFO_MD);
/* Disable all Tx interrupts */
- NPCX_UFTCTL(uart_num) &= ~(BIT(NPCX_UFTCTL_TEMPTY_LVL_EN) |
- BIT(NPCX_UFTCTL_TEMPTY_EN) |
+ NPCX_UFTCTL(uart_num) &=
+ ~(BIT(NPCX_UFTCTL_TEMPTY_LVL_EN) | BIT(NPCX_UFTCTL_TEMPTY_EN) |
BIT(NPCX_UFTCTL_NXMIPEN));
}
