chip/npcx/gpio_chip.h: Format with clang-format
BRANCH=none
TEST=none
@@ -14,32 +14,35 @@ struct npcx_wui {
/* Macros to initialize the MIWU mapping table. */
#define NPCX_WUI_GPIO_PIN(port, index) NPCX_WUI_GPIO_##port##_##index
-#define WUI(tbl, grp, idx) ((struct npcx_wui) { .table = tbl, .group = grp, \
- .bit = idx })
+#define WUI(tbl, grp, idx) \
+ ((struct npcx_wui){ .table = tbl, .group = grp, .bit = idx })
#define WUI_INT(tbl, grp) WUI(tbl, grp, 0)
-#define WUI_NONE ((struct npcx_wui) { .table = MIWU_TABLE_COUNT, .group = 0, \
- .bit = 0 })
+#define WUI_NONE \
+ ((struct npcx_wui){ .table = MIWU_TABLE_COUNT, .group = 0, .bit = 0 })
/* Macros to initialize the alternative and low voltage mapping table. */
#define NPCX_GPIO_NONE ((struct npcx_gpio){ .port = 0, .bit = 0, .valid = 0 })
-#define NPCX_GPIO(grp, pin) ((struct npcx_gpio) {.port = GPIO_PORT_##grp, \
- .bit = pin, .valid = 1})
+#define NPCX_GPIO(grp, pin) \
+ ((struct npcx_gpio){ .port = GPIO_PORT_##grp, .bit = pin, .valid = 1 })
-#define NPCX_ALT(grp, pin) ((struct npcx_alt) {.group = ALT_GROUP_##grp, \
- .bit = NPCX_DEVALT##grp##_##pin, .inverted = 0 })
-#define NPCX_ALT_INV(grp, pin) ((struct npcx_alt) {.group = ALT_GROUP_##grp, \
- .bit = NPCX_DEVALT##grp##_##pin, .inverted = 1 })
-#define ALT(port, index, _alt) { .gpio = NPCX_GPIO(port, index), \
- .alt = (_alt) },
+#define NPCX_ALT(grp, pin) \
+ ((struct npcx_alt){ .group = ALT_GROUP_##grp, \
+ .bit = NPCX_DEVALT##grp##_##pin, \
+ .inverted = 0 })
+#define NPCX_ALT_INV(grp, pin) \
+ ((struct npcx_alt){ .group = ALT_GROUP_##grp, \
+ .bit = NPCX_DEVALT##grp##_##pin, \
+ .inverted = 1 })
+#define ALT(port, index, _alt) \
+ { .gpio = NPCX_GPIO(port, index), .alt = (_alt) },
-#define NPCX_LVOL_CTRL_ITEMS(ctrl) { NPCX_LVOL_CTRL_##ctrl##_0, \
- NPCX_LVOL_CTRL_##ctrl##_1, \
- NPCX_LVOL_CTRL_##ctrl##_2, \
- NPCX_LVOL_CTRL_##ctrl##_3, \
- NPCX_LVOL_CTRL_##ctrl##_4, \
- NPCX_LVOL_CTRL_##ctrl##_5, \
- NPCX_LVOL_CTRL_##ctrl##_6, \
- NPCX_LVOL_CTRL_##ctrl##_7, }
+#define NPCX_LVOL_CTRL_ITEMS(ctrl) \
+ { \
+ NPCX_LVOL_CTRL_##ctrl##_0, NPCX_LVOL_CTRL_##ctrl##_1, \
+ NPCX_LVOL_CTRL_##ctrl##_2, NPCX_LVOL_CTRL_##ctrl##_3, \
+ NPCX_LVOL_CTRL_##ctrl##_4, NPCX_LVOL_CTRL_##ctrl##_5, \
+ NPCX_LVOL_CTRL_##ctrl##_6, NPCX_LVOL_CTRL_##ctrl##_7, \
+ }
/**
* Switch NPCX UART pins back to normal GPIOs.
