HW: Changing dual port RAM for MMIO registers
@@ -47,25 +47,31 @@ ENTITY mmio_register_2w2r IS
END mmio_register_2w2r;
ARCHITECTURE mmio_register_2w2r OF mmio_register_2w2r IS
- TYPE mem_t IS ARRAY (SIZE-1 DOWNTO 0) OF std_ulogic_vector(WIDTH-1 DOWNTO 0);
+ TYPE ram_t IS ARRAY (SIZE-1 DOWNTO 0) OF std_ulogic_vector(WIDTH-1 DOWNTO 0);
- SIGNAL mem : mem_t;
+ SHARED VARIABLE ram_v : ram_t;
BEGIN
- mmio_register_2w2r: PROCESS (clk)
+ mmio_register_2w2r_b: PROCESS (clk)
BEGIN -- PROCESS mmio_register
IF (rising_edge(clk)) THEN
IF (we_b = '1') THEN
- mem(to_integer(unsigned(addr_b))) <= din_b;
+ ram_v(to_integer(unsigned(addr_b))) := din_b;
+ END IF;
+ dout_b <= ram_v(to_integer(unsigned(addr_b)));
END IF;
+ END PROCESS mmio_register_2w2r_b;
+
+ mmio_register_2w2r_a: PROCESS (clk)
+ BEGIN -- PROCESS mmio_register
+ IF (rising_edge(clk)) THEN
IF (we_a = '1') THEN
- mem(to_integer(unsigned(addr_a))) <= din_a;
+ ram_v(to_integer(unsigned(addr_a))) := din_a;
END IF;
- dout_b <= mem(to_integer(unsigned(addr_b)));
- dout_a <= mem(to_integer(unsigned(addr_a)));
+ dout_a <= ram_v(to_integer(unsigned(addr_a)));
END IF;
- END PROCESS mmio_register_2w2r;
+ END PROCESS mmio_register_2w2r_a;
END ARCHITECTURE;
