disable TREADY for FIR filters in sdr_transceiver_hpsdr/rx.tcl
@@ -197,7 +197,6 @@ cell xilinx.com:ip:fir_compiler:7.2 fir_0 {
CLOCK_FREQUENCY 125
OUTPUT_ROUNDING_MODE Convergent_Rounding_to_Even
OUTPUT_WIDTH 25
- M_DATA_HAS_TREADY true
HAS_ARESETN true
} {
S_AXIS_DATA conv_0/M_AXIS
@@ -236,7 +235,6 @@ cell xilinx.com:ip:fir_compiler:7.2 fir_1 {
CLOCK_FREQUENCY 125
OUTPUT_ROUNDING_MODE Convergent_Rounding_to_Even
OUTPUT_WIDTH 25
- M_DATA_HAS_TREADY true
HAS_ARESETN true
} {
S_AXIS_DATA subset_0/M_AXIS
@@ -273,7 +271,6 @@ cell xilinx.com:ip:fir_compiler:7.2 fir_2 {
CLOCK_FREQUENCY 125
OUTPUT_ROUNDING_MODE Convergent_Rounding_to_Even
OUTPUT_WIDTH 26
- M_DATA_HAS_TREADY true
HAS_ARESETN true
} {
S_AXIS_DATA subset_1/M_AXIS
