chip/ish/uart.c: Format with clang-format
BRANCH=none
TEST=none
#define CPRINTF(format, args...) cprintf(CC_LPC, format, ##args)
static const uint32_t baud_conf[][BAUD_TABLE_MAX] = {
- {B9600, 9600},
- {B57600, 57600},
- {B115200, 115200},
- {B921600, 921600},
- {B2000000, 2000000},
- {B3000000, 3000000},
- {B3250000, 3250000},
- {B3500000, 3500000},
- {B4000000, 4000000},
+ { B9600, 9600 }, { B57600, 57600 }, { B115200, 115200 },
+ { B921600, 921600 }, { B2000000, 2000000 }, { B3000000, 3000000 },
+ { B3250000, 3250000 }, { B3500000, 3500000 }, { B4000000, 4000000 },
{ B19200, 19200 },
};
@@ -156,7 +150,8 @@ static void uart_hw_init(enum UART_PORT id)
divisor = (ctx->input_freq / ctx->baud_rate) >> 4;
if (IS_ENABLED(CONFIG_ISH_DW_UART)) {
/* calculate the fractional part */
- fraction = ceil_for(ctx->input_freq, ctx->baud_rate) - (divisor << 4);
+ fraction = ceil_for(ctx->input_freq, ctx->baud_rate) -
+ (divisor << 4);
} else {
MUL(ctx->id) = (divisor * ctx->baud_rate);
DIV(ctx->id) = (ctx->input_freq / 16);
@@ -189,8 +184,7 @@ static void uart_hw_init(enum UART_PORT id)
fcr = FCR_FIFO_SIZE_64 | FCR_ITL_FIFO_64_BYTES_1;
/* configure FIFOs */
- FCR(ctx->id) = (fcr | FCR_FIFO_ENABLE
- | FCR_RESET_RX | FCR_RESET_TX);
+ FCR(ctx->id) = (fcr | FCR_FIFO_ENABLE | FCR_RESET_RX | FCR_RESET_TX);
if (!IS_ENABLED(CONFIG_ISH_DW_UART))
/* enable UART unit */
@@ -282,8 +276,8 @@ static void uart_drv_init(void)
/* Enable HSU global interrupts (DMA/U0/U1) and set PMEN bit
* to allow PMU to clock gate ISH
*/
- HSU_REG_GIEN = (GIEN_DMA_EN | GIEN_UART0_EN
- | GIEN_UART1_EN | GIEN_PWR_MGMT);
+ HSU_REG_GIEN = (GIEN_DMA_EN | GIEN_UART0_EN | GIEN_UART1_EN |
+ GIEN_PWR_MGMT);
task_enable_irq(ISH_DEBUG_UART_IRQ);
}
