fixed typo in create_ip: set BLOCK_RAM depth to 8192
@@ -76,7 +76,7 @@ if { $ddr3_used == TRUE } {
if { $bram_used == TRUE } {
#create BlockRAM
create_ip -name blk_mem_gen -vendor xilinx.com -library ip -version 8.3 -module_name block_RAM -dir $ip_dir
- set_property -dict [list CONFIG.Interface_Type {AXI4} CONFIG.Write_Width_A {256} CONFIG.AXI_ID_Width $axi_id_width CONFIG.Write_Depth_A {8129} CONFIG.Use_AXI_ID {true} CONFIG.Memory_Type {Simple_Dual_Port_RAM} CONFIG.Use_Byte_Write_Enable {true} CONFIG.Byte_Size {8} CONFIG.Assume_Synchronous_Clk {true} CONFIG.Read_Width_A {256} CONFIG.Operating_Mode_A {READ_FIRST} CONFIG.Write_Width_B {256} CONFIG.Read_Width_B {256} CONFIG.Operating_Mode_B {READ_FIRST} CONFIG.Enable_B {Use_ENB_Pin} CONFIG.Register_PortA_Output_of_Memory_Primitives {false} CONFIG.Use_RSTB_Pin {true} CONFIG.Reset_Type {ASYNC} CONFIG.Port_B_Clock {100} CONFIG.Port_B_Enable_Rate {100}] [get_ips block_RAM]
+ set_property -dict [list CONFIG.Interface_Type {AXI4} CONFIG.Write_Width_A {256} CONFIG.AXI_ID_Width $axi_id_width CONFIG.Write_Depth_A {8192} CONFIG.Use_AXI_ID {true} CONFIG.Memory_Type {Simple_Dual_Port_RAM} CONFIG.Use_Byte_Write_Enable {true} CONFIG.Byte_Size {8} CONFIG.Assume_Synchronous_Clk {true} CONFIG.Read_Width_A {256} CONFIG.Operating_Mode_A {READ_FIRST} CONFIG.Write_Width_B {256} CONFIG.Read_Width_B {256} CONFIG.Operating_Mode_B {READ_FIRST} CONFIG.Enable_B {Use_ENB_Pin} CONFIG.Register_PortA_Output_of_Memory_Primitives {false} CONFIG.Use_RSTB_Pin {true} CONFIG.Reset_Type {ASYNC} CONFIG.Port_B_Clock {100} CONFIG.Port_B_Enable_Rate {100}] [get_ips block_RAM]
set_property generate_synth_checkpoint false [get_files $ip_dir/block_RAM/block_RAM.xci]
generate_target {instantiation_template} [get_files $ip_dir/block_RAM/block_RAM.xci]
generate_target all [get_files $ip_dir/block_RAM/block_RAM.xci]
