[hardware] Disable `sram` reset for Verilator
Verilator cannot handle delayed assignments in for-loops unless it
unrolls them. This is not really an option here, so we can just
deactivate the sram's reset.
@@ -124,9 +124,11 @@ module tc_sram #(
// write memory array
always_ff @(posedge clk_i or negedge rst_ni) begin
if (!rst_ni) begin
+ `ifndef VERILATOR
for (int unsigned i = 0; i < NumWords; i++) begin
sram[i] <= init_val[i];
end
+ `endif
for (int i = 0; i < NumPorts; i++) begin
r_addr_q[i] <= {AddrWidth{1'b0}};
// initialize the read output register for each port
