[hardware] Update global interconnect register location
@@ -154,9 +154,8 @@ module mempool #(
.DataWidth (DataWidth ),
.AddrMemWidth (TCDMAddrMemWidth + $clog2(NumBanksPerTile)),
.Topology (tcdm_interconnect_pkg::BFLY4 ),
- // One spill register every two levels of arbitration
- .SpillRegisterReq ({32{2'b01}} ),
- .SpillRegisterResp({32{2'b01}} )
+ .SpillRegisterReq (64'b0110 ),
+ .SpillRegisterResp(64'b0110 )
) i_interco (
.clk_i (clk_i ),
.rst_ni (rst_ni ),
