message: ToVerilog2005Expr: tweak whitespaces and braces
diff: @@ -52,9 +52,6 @@ class ToVerilog2005Expr(ToHdlCommon):
  HdlBuiltinFn.TYPE_OF: 2,
  HdlBuiltinFn.PARAMETRIZATION: 2,
  - HdlBuiltinFn.DOWNTO: 2,
  - HdlBuiltinFn.TO: 2,
  -
  **{k: 3 for k in [
  HdlBuiltinFn.NEG,
  HdlBuiltinFn.NEG_LOG,
  @@ -119,7 +116,8 @@ class ToVerilog2005Expr(ToHdlCommon):
  HdlBuiltinFn.ARITH_SHIFT_LEFT_ASSIGN,
  HdlBuiltinFn.ARITH_SHIFT_RIGHT_ASSIGN,
  ]},
  -
  + HdlBuiltinFn.DOWNTO: 16,
  + HdlBuiltinFn.TO: 16,
  }
  GENERIC_UNARY_OPS = {
  HdlBuiltinFn.NEG_LOG: "!",
  @@ -213,7 +211,7 @@ class ToVerilog2005Expr(ToHdlCommon):
  return
  elif op == HdlBuiltinFn.TERNARY:
  cond, v0, v1 = o.ops
  - self._visit_operand(cond, 0, o, False, False)
  + self._visit_operand(cond, 0, o, True, False)
  w(" ? ")
  self._visit_operand(v0, 1, o, False, False)
  w(" : ")
  