message: VerilogConversionTC: run all if run as main file
diff: @@ -128,8 +128,8 @@ class VerilogConversionTC(BasicTC):
  if __name__ == "__main__":
  suite = unittest.TestSuite()
  - suite.addTest(VerilogConversionTC('test_uart'))
  - # suite.addTest(unittest.makeSuite(VerilogConversionTC))
  + # suite.addTest(VerilogConversionTC('test_uart'))
  + suite.addTest(unittest.makeSuite(VerilogConversionTC))
  runner = unittest.TextTestRunner(verbosity=3)
  runner.run(suite)
  