svlog: codegen: Fix inst type derived for wrong param env
Fix an issue in code generation where during instance emission, the
`inst_details` would be called with the outer `env`, but the
corresponding `type_of_inst` with `inst.inner_env`. This internally
leads to port mappings being derived for envs `(inner, outer)` and
`(inner, inner)`.
@@ -764,7 +764,7 @@ where
// Compute the array dimensions for the signals.
// let mut dims = vec![];
- let inst_ty = self.type_of_inst(Ref(inst.hir), inst.inner_env);
+ let inst_ty = self.type_of_inst(Ref(inst.hir), env);
let intf_ty = match inst_ty.resolve_full().core.get_interface() {
Some(x) => x,
None => continue,
