Updating tracing to support M4 architectures
@@ -149,7 +149,8 @@ pub(crate) fn setup_tracing(
}
TraceSink::Swo(config) => {
- let mut swo = Swo::new(interface, find_component(components, PeripheralType::Swo)?);
+ if let Ok(peripheral) = find_component(components, PeripheralType::Swo) {
+ let mut swo = Swo::new(interface, peripheral);
swo.unlock()?;
let prescaler = (config.tpiu_clk() / config.baud()) - 1;
@@ -159,6 +160,29 @@ pub(crate) fn setup_tracing(
SwoMode::Manchester => swo.set_pin_protocol(1)?,
SwoMode::Uart => swo.set_pin_protocol(2)?,
}
+ } else {
+ // For Cortex-M4, the SWO and the TPIU are combined. If we don't find a SWO
+ // peripheral, use the TPIU instead.
+ let mut tpiu =
+ Tpiu::new(interface, find_component(components, PeripheralType::Tpiu)?);
+
+ tpiu.set_port_size(1)?;
+ let prescaler = (config.tpiu_clk() / config.baud()) - 1;
+ tpiu.set_prescaler(prescaler)?;
+ match config.mode() {
+ SwoMode::Manchester => tpiu.set_pin_protocol(1)?,
+ SwoMode::Uart => tpiu.set_pin_protocol(2)?,
+ }
+
+ // Formatter: TrigIn enabled, bypass optional
+ if config.tpiu_continuous_formatting() {
+ // Set EnFCont for continuous formatting even over SWO.
+ tpiu.set_formatter(0x102)?;
+ } else {
+ // Clear EnFCont to only pass through raw ITM/DWT data.
+ tpiu.set_formatter(0x100)?;
+ }
+ }
}
TraceSink::TraceMemory => {
