Change serial irq to rising edge.
Use the device tree clock node definition (apb_pclk).
@@ -450,12 +450,13 @@ fn create_serial_node<T: DeviceInfoForFDT + Clone + Debug>(
dev_info: T,
) -> Result<()> {
let serial_reg_prop = generate_prop64(&[dev_info.addr(), dev_info.length()]);
- let irq = generate_prop32(&[GIC_FDT_IRQ_TYPE_SPI, dev_info.irq(), IRQ_TYPE_LEVEL_HI]);
+ let irq = generate_prop32(&[GIC_FDT_IRQ_TYPE_SPI, dev_info.irq(), IRQ_TYPE_EDGE_RISING]);
append_begin_node(fdt, &format!("uart@{:x}", dev_info.addr()))?;
append_property_string(fdt, "compatible", "ns16550a")?;
append_property(fdt, "reg", &serial_reg_prop)?;
- append_property_u32(fdt, "clock-frequency", 3686400)?;
+ append_property_u32(fdt, "clocks", CLOCK_PHANDLE)?;
+ append_property_string(fdt, "clock-names", "apb_pclk")?;
append_property(fdt, "interrupts", &irq)?;
append_end_node(fdt)?;
