Update nrf52-hal-common/src/uicr.rs
@@ -20,7 +20,7 @@ impl Uicr {
/// Erase the UICR registers. UICR registers can only be set to `0` bits, additional
/// overrides back to `1` can only be performed by erasing the UICR registers.
- /// - Sets all registers to 0xFFFFu32
+ /// - Sets all registers to 0xFFFF_FFFFu32
pub fn erase(&mut self, nvmc: &mut NVMC) {
assert!(nvmc.config.read().wen().is_wen() == false); // write + erase is forbidden!
