svlog: update common test utils
Format and extend the common utilities used for testing.
// Copyright (c) 2017 Fabian Schuiki
+#![allow(dead_code)]
+
+//! Utilities for verilog tests.
+
+pub extern crate llhd;
pub extern crate moore_common;
pub extern crate moore_svlog;
-use self::moore_svlog::*;
+
use self::moore_common::source::get_source_manager;
use self::moore_common::Session;
+use self::moore_svlog::*;
pub fn parse(input: &str) -> Vec<ast::Root> {
use std::cell::Cell;
@@ -40,7 +46,14 @@ pub fn compile_to_hir(mut asts: Vec<ast::Root>) -> hir::Root {
hir::lower(&session, &nameres, top, asts).expect("lowering to hir failed")
}
-pub fn unwrap_single_module(hir: &hir::Root) -> &hir::Module {
+pub(crate) fn unwrap_single_module(hir: &hir::Root) -> &hir::Module {
assert_eq!(hir.mods.len(), 1);
hir.mods.iter().nth(0).unwrap().1
}
+
+pub(crate) fn module_to_string(module: &llhd::Module) -> String {
+ use llhd::{assembly::writer::Writer, visit::Visitor};
+ let mut out = Vec::<u8>::new();
+ Writer::new(&mut out).visit_module(&module);
+ String::from_utf8(out).unwrap()
+}
