Add workaround for STM32H7
@@ -219,7 +219,12 @@ fn main() {
}
"spi" => {
if let Some(clock) = &p.clock {
- let reg = clock.to_ascii_lowercase();
+ // Workaround for APB1 register being split on some chip families
+ let reg = if chip.family == "STM32H7" && clock == "APB1" {
+ format!("{}l", clock.to_ascii_lowercase())
+ } else {
+ clock.to_ascii_lowercase()
+ };
let field = name.to_ascii_lowercase();
peripheral_rcc_table.push(vec![
name.clone(),
