add CFI and size info
+ .cfi_sections .debug_frame
+
# LLD requires that the section flags are explicitly set here
.section .HardFaultTrampoline, "ax"
.global HardFaultTrampoline
# get set and an invalid vector table is generated
.type HardFaultTrampoline,%function
.thumb_func
+ .cfi_startproc
HardFaultTrampoline:
# depending on the stack mode in EXC_RETURN, fetch stack pointer from
# PSP or MSP
@@ -17,6 +20,8 @@ HardFaultTrampoline:
0:
mrs r0, PSP
b HardFault
+ .cfi_endproc
+ .size HardFaultTrampoline, . - HardFaultTrampoline
.section .text.FpuTrampoline, "ax"
.global FpuTrampoline
@@ -24,6 +29,7 @@ HardFaultTrampoline:
# get set and an invalid vector table is generated
.type FpuTrampoline,%function
.thumb_func
+ .cfi_startproc
# This enables the FPU and jumps to the main function.
FpuTrampoline:
# Address of SCB.CPACR.
@@ -40,6 +46,8 @@ FpuTrampoline:
# Hand execution over to `main`.
bl main
# Note: `main` must not return. `bl` is used only because it has a wider range than `b`.
+ .cfi_endproc
+ .size FpuTrampoline, . - FpuTrampoline
# ARMv6-M leaves LR in an unknown state on Reset
# this trampoline sets LR before it's pushed onto the stack by Reset
@@ -49,8 +57,11 @@ FpuTrampoline:
# get set and an invalid vector table is generated
.type PreResetTrampoline,%function
.thumb_func
+ .cfi_startproc
PreResetTrampoline:
# set LR to the initial value used by the ARMv7-M (0xFFFF_FFFF)
ldr r0,=0xffffffff
mov lr,r0
b Reset
+ .cfi_endproc
+ .size PreResetTrampoline, . - PreResetTrampoline
