dac tx: different work around
@@ -349,11 +349,9 @@ fn main() -> ! {
.mssi().bits(0) // master SS idle
});
spi2.cr2.modify(|_, w| unsafe {
- w.tsize().bits(0) // infinite
+ w.tsize().bits(1)
});
spi2.cr1.write(|w| w.spe().set_bit());
- // at least one SCK between EOT and CSTART
- spi2.cr1.modify(|r, w| unsafe { w.bits(r.bits() | (1 << 9)) });
loop {
#[cfg(feature = "bkpt")]
@@ -363,14 +361,22 @@ fn main() -> ! {
spi1.cr1.modify(|r, w| unsafe { w.bits(r.bits() | (1 << 9)) });
while spi1.sr.read().eot().bit_is_clear() {}
spi1.ifcr.write(|w| w.eotc().set_bit());
- while spi1.sr.read().rxp().bit_is_clear() {}
+ if spi1.sr.read().rxp().bit_is_clear() {
+ continue;
+ }
let a = spi1.rxdr.read().rxdr().bits() as i16;
let d = (a as u16) ^ 0x8000;
- while spi2.sr.read().txp().bit_is_clear() {}
+ if spi2.sr.read().txp().bit_is_clear() {
+ continue;
+ }
let txdr = &spi2.txdr as *const _ as *mut u16;
unsafe { ptr::write_volatile(txdr, d) };
+ // at least one SCK between EOT and CSTART
+ spi2.cr1.modify(|r, w| unsafe { w.bits(r.bits() | (1 << 9)) });
while spi2.sr.read().txc().bit_is_clear() {}
+ while spi2.sr.read().eot().bit_is_clear() {}
+ spi1.ifcr.write(|w| w.eotc().set_bit());
#[cfg(feature = "bkpt")]
cortex_m::asm::bkpt();
