message: Remove redundant target from Makefile
  "$(OBJDIR)%.o: %.cpp" rule is defined twice.
  This change fixes
diff: @@ -315,9 +315,6 @@ $(OBJDIR)%.o: %.cc
  $(OBJDIR)%.o: %.c
  @mkdir -p $(dir $@)
  $(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@
  -$(OBJDIR)%.o: %.cpp
  - @mkdir -p $(dir $@)
  - $(CXX) $(CXXFLAGS) $(INCLUDES) -c $< -o $@
  # The target that's compiled if there's no command-line arguments.
  all: $(LIB_PATH) $(MINIMAL_BINARY) $(BENCHMARK_BINARY) $(BENCHMARK_PERF_OPTIONS_BINARY)
  