message: [ROCm] Fixing gpu_unrolling_test filecheck string
diff: @@ -154,12 +154,21 @@ TEST_F(GpuUnrollingTest, DisabledUnrollUnfusedSine) {
  auto hlo_module =
  ParseAndReturnVerifiedModule(kUnfusedAddModule, config).ValueOrDie();
  - CompileAndVerifyIr(std::move(hlo_module),
  - R"(
  + // Note: On ROCm side, we do bare minimal to make the test pass.
  + // "sine" function is in different code generation path from nvptx: on
  + // ROCm platform, it get pulled in from ROCm-Device-Libs, whereas in
  + // Cuda, generated llvm IR is compiled PTX.
  + auto expected_ir = is_built_with_rocm_ ? R"(
  +; CHECK: __ocml_sin_f32
  +; CHECK-NOT: load float
  +)"
  + : R"(
  ; CHECK: load float
  ; CHECK-NOT: load float
  }
  - )",
  +)";
  +
  + CompileAndVerifyIr(std::move(hlo_module), expected_ir,
  /*match_optimized_ir=*/true);
  }
  @@ -179,12 +188,21 @@ TEST_F(GpuUnrollingTest, DisabledUnrollUnfusedCosine) {
  auto hlo_module =
  ParseAndReturnVerifiedModule(kUnfusedAddModule, config).ValueOrDie();
  - CompileAndVerifyIr(std::move(hlo_module),
  - R"(
  + // Note: On ROCm side, we do bare minimal to make the test pass.
  + // "cosine" function is in different code generation path from nvptx: on
  + // ROCm platform, it get pulled in from ROCm-Device-Libs, whereas in
  + // Cuda, generated llvm IR is compiled PTX.
  + auto expected_ir = is_built_with_rocm_ ? R"(
  +; CHECK: __ocml_cos_f32
  +; CHECK-NOT: load float
  +)"
  + : R"(
  ; CHECK: load float
  ; CHECK-NOT: load float
  }
  - )",
  +)";
  +
  + CompileAndVerifyIr(std::move(hlo_module), expected_ir,
  /*match_optimized_ir=*/true);
  }
  