message: Fixed SIMD CF when condition with logic op is used
diff: @@ -1764,8 +1764,13 @@ llvm::Value *lEmitLogicalOp(BinaryExpr::Op op, Expr *arg0, Expr *arg1, FunctionE
  llvm::Value *equalsMask = ctx->CmpInst(llvm::Instruction::ICmp, llvm::CmpInst::ICMP_EQ, value0AndMask,
  oldFullMask, "value0&mask==mask");
  equalsMask = ctx->I1VecToBoolVec(equalsMask);
  + if (!g->target->isGenXTarget()) {
  llvm::Value *allMatch = ctx->All(equalsMask);
  ctx->BranchInst(bbSkipEvalValue1, bbEvalValue1, allMatch);
  + } else {
  + // If uniform CF is emulated, pass vector value to BranchInst
  + ctx->BranchInst(bbSkipEvalValue1, bbEvalValue1, equalsMask);
  + }
  // value0 is true for all running lanes, so it can be used for
  // the final result
  @@ -1808,8 +1813,13 @@ llvm::Value *lEmitLogicalOp(BinaryExpr::Op op, Expr *arg0, Expr *arg1, FunctionE
  llvm::Value *equalsMask = ctx->CmpInst(llvm::Instruction::ICmp, llvm::CmpInst::ICMP_EQ, notValue0AndMask,
  oldFullMask, "not_value0&mask==mask");
  equalsMask = ctx->I1VecToBoolVec(equalsMask);
  + if (!g->target->isGenXTarget()) {
  llvm::Value *allMatch = ctx->All(equalsMask);
  ctx->BranchInst(bbSkipEvalValue1, bbEvalValue1, allMatch);
  + } else {
  + // If uniform CF is emulated, pass vector value to BranchInst
  + ctx->BranchInst(bbSkipEvalValue1, bbEvalValue1, equalsMask);
  + }
  // value0 was false for all running lanes, so use its value as
  // the overall result.
  