message: More clang foolishness
diff: @@ -80,8 +80,7 @@ typedef volatile uint8_t BREG;
  // Reset & clock controller
  #define RCC_BASE 0x40021000
  -struct RCC_Regs
  -{
  +struct RCC_Regs {
  REG clkCtrl; // 0x00 clock control register (RCC_CR)
  REG clkCal; // 0x04 Internal clock sources calibration register (RCC_ICSCR)
  REG clkCfg; // 0x08 clock configuration register (RCC_CFGR)
  @@ -95,12 +94,14 @@ struct RCC_Regs
  REG periphReset[8]; // 0x28 peripheral reset registers
  REG periphClkEna[8]; // 0x48 peripheral clock registers
  REG sleepClkEna[8]; // 0x68 Clock enable in sleep
  - REG indClkCfg; // 0x88 Peripherals independent clock configuration register (RCC_CCIPR)
  + REG indClkCfg; // 0x88 Peripherals independent clock configuration register
  + // (RCC_CCIPR)
  REG rsvd3;
  REG backup; // 0x90 Backup domain control register (RCC_BDCR)
  REG status; // 0x94 control & status register (RCC_CSR)
  REG recovery; // 0x98 Clock recovery RC register (RCC_CRRCR)
  - REG indClkCfg2; // 0x9C Peripherals independent clock configuration register (RCC_CCIPR2)
  + REG indClkCfg2; // 0x9C Peripherals independent clock configuration register
  + // (RCC_CCIPR2)
  };
  // System control registers
  