def METHOD_NAME(device_type: dace.dtypes.DeviceType):
    '''
    Runs conv2d_bias for the given device
    :return: the SDFG
    '''
    # Initialize data (npbench small size)
    N, C_in, C_out, K, H, W = 8, 3, 16, 2, 32, 32
    input, weight, bias = initialize(C_in, C_out, H, K, N, W)
    if device_type in {dace.dtypes.DeviceType.CPU, dace.dtypes.DeviceType.GPU}:
        # Parse the SDFG and apply auto-opt
        sdfg = conv2d_bias_kernel.to_sdfg()
        sdfg = auto_optimize(sdfg, device_type)
        out = sdfg(input, weight, bias, C_in=C_in, C_out=C_out, H=H, K=K, N=N, W=W)
    elif device_type == dace.dtypes.DeviceType.FPGA:
        # Parse SDFG and apply FPGA friendly optimization
        sdfg = conv2d_bias_kernel.to_sdfg(simplify=True)
        applied = sdfg.apply_transformations([FPGATransformSDFG])
        assert applied == 1
        # Use FPGA Expansion for lib nodes, and expand them to enable further optimizations
        from dace.libraries.standard import Reduce
        Reduce.default_implementation = "FPGAPartialReduction"
        sdfg.expand_library_nodes()
        sdfg.apply_transformations_repeated([InlineSDFG], print_report=True)
        sdfg.specialize(dict(C_in=C_in, C_out=C_out, H=H, K=K, N=N, W=W))
        out = sdfg(input, weight, bias)
    # Compute ground truth and validate
    out_ref = conv2d_bias_np(input, weight, bias)
    assert np.allclose(out, out_ref)
    return sdfg