Change incorrect "5-stage..." -> "6-stage..." label for dual issue processor model
MODIFY
src/processors/RISC-V/rv6s_dual/rv6s_dual_extended_layout.json
src/processors/RISC-V/rv6s_dual/rv6s_dual_extended_layout.json
"Italic": false,
"PtSize": 18,
"Text": {
- "str": "5-Stage dual-issue RISC-V processor"
+ "str": "6-Stage dual-issue RISC-V processor"
},
"Pos": {
"x": 977.4390827081518,

Change incorrect "5-stage..." -> "6-stage..." label for dual issue processor model