Add default ISA extensions
MODIFY
src/isa/isainfo.h
src/isa/isainfo.h
@@ -97,6 +97,7 @@ protected:
struct ProcessorISAInfo {
std::shared_ptr<ISAInfoBase> isa;
QStringList supportedExtensions;
+ QStringList defaultExtensions;
};
template <ISA isa>

MODIFY
src/processors/RISC-V/rv5s/rv5s.h
src/processors/RISC-V/rv5s/rv5s.h
@@ -495,7 +495,7 @@ public:
}
static ProcessorISAInfo supportsISA() {
- return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}};
+ return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}, {"M"}};
}
const ISAInfoBase* implementsISA() const override { return m_enabledISA.get(); }

MODIFY
src/processors/RISC-V/rv5s_no_fw/rv5s_no_fw.h
src/processors/RISC-V/rv5s_no_fw/rv5s_no_fw.h
@@ -471,7 +471,7 @@ public:
}
static ProcessorISAInfo supportsISA() {
- return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}};
+ return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}, {"M"}};
}
const ISAInfoBase* implementsISA() const override { return m_enabledISA.get(); }

MODIFY
src/processors/RISC-V/rv5s_no_fw_hz/rv5s_no_fw_hz.h
src/processors/RISC-V/rv5s_no_fw_hz/rv5s_no_fw_hz.h
@@ -421,7 +421,7 @@ public:
}
static ProcessorISAInfo supportsISA() {
- return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}};
+ return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}, {"M"}};
}
const ISAInfoBase* implementsISA() const override { return m_enabledISA.get(); };

MODIFY
src/processors/RISC-V/rv5s_no_hz/rv5s_no_hz.h
src/processors/RISC-V/rv5s_no_hz/rv5s_no_hz.h
@@ -454,7 +454,7 @@ public:
}
static ProcessorISAInfo supportsISA() {
- return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}};
+ return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}, {"M"}};
}
const ISAInfoBase* implementsISA() const override { return m_enabledISA.get(); };

MODIFY
src/processors/RISC-V/rv6s_dual/rv6s_dual.h
src/processors/RISC-V/rv6s_dual/rv6s_dual.h
@@ -835,7 +835,7 @@ public:
}
static ProcessorISAInfo supportsISA() {
- return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}};
+ return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}, {"M"}};
}
const ISAInfoBase* implementsISA() const override { return m_enabledISA.get(); };

MODIFY
src/processors/RISC-V/rvss/rvss.h
src/processors/RISC-V/rvss/rvss.h
@@ -220,7 +220,7 @@ public:
}
static ProcessorISAInfo supportsISA() {
- return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}};
+ return ProcessorISAInfo{std::make_shared<ISAInfo<XLenToRVISA<XLEN>()>>(QStringList()), {"M", "C"}, {"M"}};
}
const ISAInfoBase* implementsISA() const override { return m_enabledISA.get(); }
const std::set<RegisterFileType> registerFiles() const override {

MODIFY
src/processorselectiondialog.cpp
src/processorselectiondialog.cpp
@@ -69,7 +69,7 @@ ProcessorSelectionDialog::ProcessorSelectionDialog(QWidget* parent)
// Initialize extensions for processors; default to all available extensions
for (const auto& desc : ProcessorRegistry::getAvailableProcessors()) {
- m_selectedExtensionsForID[desc.second->id] = desc.second->isaInfo().supportedExtensions;
+ m_selectedExtensionsForID[desc.second->id] = desc.second->isaInfo().defaultExtensions;
}
m_selectedExtensionsForID[ProcessorHandler::getID()] = ProcessorHandler::currentISA()->enabledExtensions();

Add default ISA extensions