[Assembler] Add beq to assembler test
MODIFY
test/tst_assembler.cpp
test/tst_assembler.cpp
@@ -22,10 +22,10 @@ void tst_Assembler::tst_matcher() {
auto matcher = AssemblerTmp::Matcher<RVISA>(createInstructions());
std::vector<std::pair<QString, unsigned>> toMatch = {
- {"addi", 0b00000000000100010000000100010011}, {"slti", 0b00000000000100010010000100010011},
- {"xori", 0b00000000000100010100000100010011}, {"slli", 0b00000000000100010001000100010011},
- {"srai", 0b01000000000100010101000100010011}, {"add", 0b00000000001000010000000100110011},
- {"sub", 0b01000000001000010000000100110011}};
+ {"beq", 0b11111100000000000000101011100011}, {"addi", 0b00000111101100010000000010010011},
+ {"slti", 0b00000000000100010010000100010011}, {"xori", 0b00000000000100010100000100010011},
+ {"slli", 0b00000000000100010001000100010011}, {"srai", 0b01000000000100010101000100010011},
+ {"add", 0b00000000001000010000000100110011}, {"sub", 0b01000000001000010000000100110011}};
for (const auto& iter : toMatch) {
auto match = matcher.matchInstruction(iter.second);
@@ -55,25 +55,47 @@ void tst_Assembler::tst_matcher() {
std::vector<std::shared_ptr<Instruction<RVISA>>> tst_Assembler::createInstructions() {
auto addi = std::shared_ptr<Instruction<RVISA>>(
- new Instruction<RVISA>(Opcode<RVISA>("addi", {OpPart(0b0010011, 0, 6), OpPart(0b000, 12, 14)}), {}));
+ new Instruction<RVISA>(Opcode<RVISA>("addi", {OpPart(0b0010011, 0, 6), OpPart(0b000, 12, 14)}),
+ {std::make_shared<Reg<RVISA>>(1, 7, 11), std::make_shared<Reg<RVISA>>(2, 15, 19),
+ std::make_shared<Imm<RVISA>>(3, 12, std::vector{ImmPart(0, 20, 31)})}));
+
auto slti = std::shared_ptr<Instruction<RVISA>>(
- new Instruction<RVISA>(Opcode<RVISA>("slti", {OpPart(0b0010011, 0, 6), OpPart(0b010, 12, 14)}), {}));
+ new Instruction<RVISA>(Opcode<RVISA>("slti", {OpPart(0b0010011, 0, 6), OpPart(0b010, 12, 14)}),
+ {std::make_shared<Reg<RVISA>>(1, 7, 11), std::make_shared<Reg<RVISA>>(2, 15, 19),
+ std::make_shared<Imm<RVISA>>(3, 12, std::vector{ImmPart(0, 20, 31)})}));
+
auto xori = std::shared_ptr<Instruction<RVISA>>(
- new Instruction<RVISA>(Opcode<RVISA>("xori", {OpPart(0b0010011, 0, 6), OpPart(0b100, 12, 14)}), {}));
+ new Instruction<RVISA>(Opcode<RVISA>("xori", {OpPart(0b0010011, 0, 6), OpPart(0b100, 12, 14)}),
+ {std::make_shared<Reg<RVISA>>(1, 7, 11), std::make_shared<Reg<RVISA>>(2, 15, 19),
+ std::make_shared<Imm<RVISA>>(3, 12, std::vector{ImmPart(0, 20, 31)})}));
+
auto slli = std::shared_ptr<Instruction<RVISA>>(new Instruction<RVISA>(
- Opcode<RVISA>("slli", {OpPart(0b0010011, 0, 6), OpPart(0b001, 12, 14), OpPart(0b0000000, 25, 31)}), {}));
+ Opcode<RVISA>("slli", {OpPart(0b0010011, 0, 6), OpPart(0b001, 12, 14), OpPart(0b0000000, 25, 31)}),
+ {std::make_shared<Reg<RVISA>>(1, 7, 11), std::make_shared<Reg<RVISA>>(2, 15, 19),
+ std::make_shared<Imm<RVISA>>(3, 5, std::vector{ImmPart(0, 20, 24)})}));
+
auto srai = std::shared_ptr<Instruction<RVISA>>(new Instruction<RVISA>(
- Opcode<RVISA>("srai", {OpPart(0b0010011, 0, 6), OpPart(0b101, 12, 14), OpPart(0b0100000, 25, 31)}), {}));
+ Opcode<RVISA>("srai", {OpPart(0b0010011, 0, 6), OpPart(0b101, 12, 14), OpPart(0b0100000, 25, 31)}),
+ {std::make_shared<Reg<RVISA>>(1, 7, 11), std::make_shared<Reg<RVISA>>(2, 15, 19),
+ std::make_shared<Imm<RVISA>>(3, 5, std::vector{ImmPart(0, 20, 24)})}));
+
auto add = std::shared_ptr<Instruction<RVISA>>(new Instruction<RVISA>(
Opcode<RVISA>("add", {OpPart(0b0110011, 0, 6), OpPart(0b000, 12, 14), OpPart(0b0000000, 25, 31)}),
{std::make_shared<Reg<RVISA>>(1, 7, 11), std::make_shared<Reg<RVISA>>(2, 15, 19),
std::make_shared<Reg<RVISA>>(3, 20, 24)}));
+
auto sub = std::shared_ptr<Instruction<RVISA>>(new Instruction<RVISA>(
Opcode<RVISA>("sub", {OpPart(0b0110011, 0, 6), OpPart(0b000, 12, 14), OpPart(0b0100000, 25, 31)}),
{std::make_shared<Reg<RVISA>>(1, 7, 11), std::make_shared<Reg<RVISA>>(2, 15, 19),
std::make_shared<Reg<RVISA>>(3, 20, 24)}));
- return {addi, slti, xori, slli, srai, add, sub};
+ auto beq = std::shared_ptr<Instruction<RVISA>>(new Instruction<RVISA>(
+ Opcode<RVISA>("beq", {OpPart(0b1100011, 0, 6), OpPart(0b000, 12, 14)}),
+ {std::make_shared<Reg<RVISA>>(1, 15, 19), std::make_shared<Reg<RVISA>>(2, 20, 24),
+ std::make_shared<Imm<RVISA>>(
+ 3, 5, std::vector{ImmPart(12, 31, 31), ImmPart(11, 7, 7), ImmPart(5, 25, 30), ImmPart(1, 8, 11)})}));
+
+ return {addi, slti, xori, slli, srai, add, sub, beq};
}
QTEST_APPLESS_MAIN(tst_Assembler)

[Assembler] Add beq to assembler test