Remove getArchRegisters from RipesProcessor interface
MODIFY
src/processorhandler.cpp
src/processorhandler.cpp
namespace Ripes {
ProcessorHandler::ProcessorHandler() {
+ m_constructing = true;
+
// Contruct the default processor
if (RipesSettings::value(RIPES_SETTING_PROCESSOR_ID).isNull()) {
m_currentID = ProcessorID::RV32_5S;
@@ -50,10 +52,16 @@ ProcessorHandler::ProcessorHandler() {
// Connect relevant settings changes to VSRTL
connect(RipesSettings::getObserver(RIPES_SETTING_REWINDSTACKSIZE), &SettingObserver::modified,
[=](const auto& size) { m_currentProcessor->setMaxReverseCycles(size.toUInt()); });
+
// Update VSRTL reverse stack size to reflect current settings
m_currentProcessor->setMaxReverseCycles(RipesSettings::value(RIPES_SETTING_REWINDSTACKSIZE).toUInt());
+ // Reset request handling
+ connect(RipesSettings::getObserver(RIPES_GLOBALSIGNAL_REQRESET), &SettingObserver::modified, this,
+ &ProcessorHandler::_reset);
+
m_syscallManager = std::make_unique<RISCVSyscallManager>();
+ m_constructing = false;
}
void ProcessorHandler::_loadProgram(const std::shared_ptr<Program>& p) {
@@ -101,10 +109,6 @@ vsrtl::core::AddressSpaceMM& ProcessorHandler::_getMemory() {
return m_currentProcessor->getMemory();
}
-const vsrtl::core::AddressSpace& ProcessorHandler::_getRegisters() const {
- return m_currentProcessor->getArchRegisters();
-}
-
void ProcessorHandler::_triggerProcStateChangeTimer() {
m_enqueueStateChangeLock.lock();
if (!m_procStateChangeTimer.isActive()) {
@@ -195,9 +199,26 @@ void ProcessorHandler::createAssemblerForCurrentISA() {
}
}
+void ProcessorHandler::_reset() {
+ if (m_constructing) {
+ return;
+ }
+
+ getProcessorNonConst()->resetProcessor();
+
+ // Rewrite register initializations
+ for (const auto& kv : m_currentRegInits) {
+ _setRegisterValue(RegisterFileType::GPR, kv.first, kv.second);
+ }
+ // Forcing memory values doesn't necessarily mean that the processor will notify that its state changed. Manually
+ // trigger a state change signal, to ensure this.
+ emit procStateChangedNonRun();
+}
+
void ProcessorHandler::_selectProcessor(const ProcessorID& id, const QStringList& extensions,
RegisterInitialization setup) {
m_currentID = id;
+ m_currentRegInits = setup;
RipesSettings::setValue(RIPES_SETTING_PROCESSOR_ID, id);
// Keep current program if the ISA between the two processors are identical
@@ -211,25 +232,6 @@ void ProcessorHandler::_selectProcessor(const ProcessorID& id, const QStringList
// Syscall handling initialization
m_currentProcessor->handleSysCall = [=] { syscallTrap(); };
- // Reset request handling
- connect(RipesSettings::getObserver(RIPES_GLOBALSIGNAL_REQRESET), &SettingObserver::modified,
- [=] { ProcessorHandler::get()->getProcessorNonConst()->resetProcessor(); });
-
- // Register initializations
- auto& regs = m_currentProcessor->getArchRegisters();
- regs.clearInitializationMemories();
- for (const auto& kv : setup) {
- // Memories are initialized through pointers to byte arrays, so we have to transform the intitial pointer
- // address to the compatible format.
- QByteArray ptrValueBytes;
- auto ptrValue = kv.second;
- for (unsigned i = 0; i < m_currentProcessor->implementsISA()->bytes(); i++) {
- ptrValueBytes.push_back(static_cast<char>(ptrValue & 0xFF));
- ptrValue >>= CHAR_BIT;
- }
- regs.addInitializationMemory(kv.first * 4, ptrValueBytes.data(), m_currentProcessor->implementsISA()->bytes());
- }
-
m_currentProcessor->postConstruct();
createAssemblerForCurrentISA();
@@ -273,6 +275,9 @@ void ProcessorHandler::_selectProcessor(const ProcessorID& id, const QStringList
m_currentProcessor->processorWasReversed)));
emit processorChanged();
+
+ // Finally, reset the processor
+ RipesSettings::getObserver(RIPES_GLOBALSIGNAL_REQRESET)->trigger();
}
int ProcessorHandler::_getCurrentProgramSize() const {

MODIFY
src/processorhandler.h
src/processorhandler.h
@@ -90,11 +90,10 @@ public:
static QString disassembleInstr(const AInt address) { return get()->_disassembleInstr(address); }
/**
- * @brief getMemory & getRegisters
- * returns const-wrapped references to the current process memory elements
+ * @brief getMemory
+ * returns const-wrapped references to the current process memory
*/
static vsrtl::core::AddressSpaceMM& getMemory() { return get()->_getMemory(); }
- static const vsrtl::core::AddressSpace& getRegisters() { return get()->_getRegisters(); }
/**
* @brief setRegisterValue
@@ -219,6 +218,7 @@ private:
void _checkProcessorFinished();
bool _isRunning();
void _run();
+ void _reset();
void _stopRun();
void _triggerProcStateChangeTimer();
@@ -226,7 +226,11 @@ private:
void setStopRunFlag();
ProcessorHandler();
+ // Flag used during construction to avoid calling ProcessorHandler::get() to retrieve the singleton while it is
+ // being constructed.
+ bool m_constructing = false;
ProcessorID m_currentID;
+ RegisterInitialization m_currentRegInits;
std::unique_ptr<RipesProcessor> m_currentProcessor;
std::unique_ptr<SyscallManager> m_syscallManager;
std::shared_ptr<Assembler::AssemblerBase> m_currentAssembler;

MODIFY
src/processors/RISC-V/rv5s/rv5s.h
src/processors/RISC-V/rv5s/rv5s.h
@@ -421,7 +421,6 @@ public:
void setPCInitialValue(AInt address) override { pc_reg->setInitValue(address); }
AddressSpaceMM& getMemory() override { return *m_memory; }
VInt getRegister(RegisterFileType, unsigned i) const override { return registerFile->getRegister(i); }
- AddressSpace& getArchRegisters() override { return *m_regMem; }
void finalize(const unsigned& fr) override {
if ((fr & FinalizeReason::exitSyscall) && !ecallChecker->isSysCallExiting()) {
// An exit system call was executed. Record the cycle of the execution, and enable the ecallChecker's system

MODIFY
src/processors/RISC-V/rv5s_no_fw/rv5s_no_fw.h
src/processors/RISC-V/rv5s_no_fw/rv5s_no_fw.h
@@ -397,7 +397,6 @@ public:
void setPCInitialValue(AInt address) override { pc_reg->setInitValue(address); }
AddressSpaceMM& getMemory() override { return *m_memory; }
VInt getRegister(RegisterFileType, unsigned i) const override { return registerFile->getRegister(i); }
- AddressSpace& getArchRegisters() override { return *m_regMem; }
void finalize(const unsigned& fr) override {
if ((fr & FinalizeReason::exitSyscall) && !ecallChecker->isSysCallExiting()) {
// An exit system call was executed. Record the cycle of the execution, and enable the ecallChecker's system

MODIFY
src/processors/RISC-V/rv5s_no_fw_hz/rv5s_no_fw_hz.h
src/processors/RISC-V/rv5s_no_fw_hz/rv5s_no_fw_hz.h
@@ -348,7 +348,6 @@ public:
void setPCInitialValue(AInt address) override { pc_reg->setInitValue(address); }
AddressSpaceMM& getMemory() override { return *m_memory; }
VInt getRegister(RegisterFileType, unsigned i) const override { return registerFile->getRegister(i); }
- AddressSpace& getArchRegisters() override { return *m_regMem; }
void finalize(const unsigned& fr) override {
if ((fr & FinalizeReason::exitSyscall) && !ecallChecker->isSysCallExiting()) {
// An exit system call was executed. Record the cycle of the execution, and enable the ecallChecker's system

MODIFY
src/processors/RISC-V/rv5s_no_hz/rv5s_no_hz.h
src/processors/RISC-V/rv5s_no_hz/rv5s_no_hz.h
@@ -381,7 +381,6 @@ public:
void setPCInitialValue(AInt address) override { pc_reg->setInitValue(address); }
AddressSpaceMM& getMemory() override { return *m_memory; }
VInt getRegister(RegisterFileType, unsigned i) const override { return registerFile->getRegister(i); }
- AddressSpace& getArchRegisters() override { return *m_regMem; }
void finalize(const unsigned& fr) override {
if ((fr & FinalizeReason::exitSyscall) && !ecallChecker->isSysCallExiting()) {
// An exit system call was executed. Record the cycle of the execution, and enable the ecallChecker's system

MODIFY
src/processors/RISC-V/rv6s_dual/rv6s_dual.h
src/processors/RISC-V/rv6s_dual/rv6s_dual.h
@@ -727,7 +727,6 @@ public:
void setPCInitialValue(AInt address) override { pc_reg->setInitValue(address); }
AddressSpaceMM& getMemory() override { return *m_memory; }
VInt getRegister(RegisterFileType, unsigned i) const override { return registerFile->getRegister(i); }
- AddressSpace& getArchRegisters() override { return *m_regMem; }
void finalize(const unsigned& fr) override {
if ((fr & FinalizeReason::exitSyscall) && !ecallChecker->isSysCallExiting()) {
// An exit system call was executed. Record the cycle of the execution, and enable the ecallChecker's

MODIFY
src/processors/RISC-V/rvss/rvss.h
src/processors/RISC-V/rvss/rvss.h
@@ -167,7 +167,6 @@ public:
void setPCInitialValue(AInt address) override { pc_reg->setInitValue(address); }
AddressSpaceMM& getMemory() override { return *m_memory; }
VInt getRegister(RegisterFileType, unsigned i) const override { return registerFile->getRegister(i); }
- AddressSpace& getArchRegisters() override { return *m_regMem; }
void finalize(const unsigned& fr) override {
if (fr) {
// Allow one additional clock cycle to clear the current instruction

MODIFY
src/processors/interface/ripesprocessor.h
src/processors/interface/ripesprocessor.h
@@ -148,12 +148,6 @@ public:
*/
virtual VInt getRegister(RegisterFileType rfid, unsigned i) const = 0;
- /**
- * @brief getArchRegisters
- * @return reference to the register address space utilized by the implementing processor
- */
- virtual vsrtl::core::AddressSpace& getArchRegisters() = 0;
-
/**
* @brief setRegister
* @param rfid: register file identifier

MODIFY
src/processortab.cpp
src/processortab.cpp
@@ -348,7 +348,6 @@ void ProcessorTab::processorSelection() {
}
loadProcessorToWidget(diag.getSelectedLayout());
- m_vsrtlWidget->reset();
updateInstructionModel();
// Retrigger value display action if enabled

Remove getArchRegisters from RipesProcessor interface