[Assembler] Use aliasses for RVReg and RVInstr in RV32I assembler
MODIFY
src/assembler/rv32i_assembler.cpp
src/assembler/rv32i_assembler.cpp
@@ -39,70 +39,61 @@ RV32I_Assembler::initInstructions(const std::set<Extensions>& extensions) const
}
#define BType(name, funct3) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
- Opcode(name, {OpPart(0b1100011, 0, 6), OpPart(funct3, 12, 14)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 15, 19), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(2, 20, 24), \
- std::make_shared<Imm>( \
- 3, 13, Imm::Repr::Signed, \
- std::vector{ImmPart(12, 31, 31), ImmPart(11, 7, 7), ImmPart(5, 25, 30), ImmPart(1, 8, 11)}, \
+ std::shared_ptr<RVInstr>(new RVInstr(Opcode(name, {OpPart(0b1100011, 0, 6), OpPart(funct3, 12, 14)}), \
+ {std::make_shared<RVReg>(1, 15, 19), std::make_shared<RVReg>(2, 20, 24), \
+ std::make_shared<Imm>(3, 13, Imm::Repr::Signed, \
+ std::vector{ImmPart(12, 31, 31), ImmPart(11, 7, 7), \
+ ImmPart(5, 25, 30), ImmPart(1, 8, 11)}, \
Imm::SymbolType::Relative)}))
#define IType(name, funct3) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
- Opcode(name, {OpPart(0b0010011, 0, 6), OpPart(funct3, 12, 14)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 7, 11), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(2, 15, 19), \
+ std::shared_ptr<RVInstr>( \
+ new RVInstr(Opcode(name, {OpPart(0b0010011, 0, 6), OpPart(funct3, 12, 14)}), \
+ {std::make_shared<RVReg>(1, 7, 11), std::make_shared<RVReg>(2, 15, 19), \
std::make_shared<Imm>(3, 12, Imm::Repr::Signed, std::vector{ImmPart(0, 20, 31)})}))
#define LoadType(name, funct3) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
- Opcode(name, {OpPart(0b0000011, 0, 6), OpPart(funct3, 12, 14)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 7, 11), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(3, 15, 19), \
+ std::shared_ptr<RVInstr>( \
+ new RVInstr(Opcode(name, {OpPart(0b0000011, 0, 6), OpPart(funct3, 12, 14)}), \
+ {std::make_shared<RVReg>(1, 7, 11), std::make_shared<RVReg>(3, 15, 19), \
std::make_shared<Imm>(2, 12, Imm::Repr::Signed, std::vector{ImmPart(0, 20, 31)})}))
#define IShiftType(name, funct3, funct7) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
- Opcode(name, {OpPart(0b0010011, 0, 6), OpPart(funct3, 12, 14), OpPart(funct7, 25, 31)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 7, 11), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(2, 15, 19), \
+ std::shared_ptr<RVInstr>( \
+ new RVInstr(Opcode(name, {OpPart(0b0010011, 0, 6), OpPart(funct3, 12, 14), OpPart(funct7, 25, 31)}), \
+ {std::make_shared<RVReg>(1, 7, 11), std::make_shared<RVReg>(2, 15, 19), \
std::make_shared<Imm>(3, 5, Imm::Repr::Unsigned, std::vector{ImmPart(0, 20, 24)})}))
#define RType(name, funct3, funct7) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
+ std::shared_ptr<RVInstr>(new RVInstr( \
Opcode(name, {OpPart(0b0110011, 0, 6), OpPart(funct3, 12, 14), OpPart(funct7, 25, 31)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 7, 11), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(2, 15, 19), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(3, 20, 24)}))
+ {std::make_shared<RVReg>(1, 7, 11), std::make_shared<RVReg>(2, 15, 19), std::make_shared<RVReg>(3, 20, 24)}))
#define SType(name, funct3) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
+ std::shared_ptr<RVInstr>(new RVInstr( \
Opcode(name, {OpPart(0b0100011, 0, 6), OpPart(funct3, 12, 14)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(3, 15, 19), \
+ {std::make_shared<RVReg>(3, 15, 19), \
std::make_shared<Imm>(2, 12, Imm::Repr::Signed, std::vector{ImmPart(5, 25, 31), ImmPart(0, 7, 11)}), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 20, 24)}))
+ std::make_shared<RVReg>(1, 20, 24)}))
#define UType(name, opcode) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
- Opcode(name, {OpPart(opcode, 0, 6)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 7, 11), \
+ std::shared_ptr<RVInstr>( \
+ new RVInstr(Opcode(name, {OpPart(opcode, 0, 6)}), \
+ {std::make_shared<RVReg>(1, 7, 11), \
std::make_shared<Imm>(2, 32, Imm::Repr::Hex, std::vector{ImmPart(0, 12, 31)})}))
#define JType(name, opcode) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
- Opcode(name, {OpPart(opcode, 0, 6)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 7, 11), \
- std::make_shared<Imm>( \
- 2, 21, Imm::Repr::Hex, \
- std::vector{ImmPart(20, 31, 31), ImmPart(12, 12, 19), ImmPart(11, 20, 20), ImmPart(1, 21, 30)}, \
+ std::shared_ptr<RVInstr>(new RVInstr(Opcode(name, {OpPart(opcode, 0, 6)}), \
+ {std::make_shared<RVReg>(1, 7, 11), \
+ std::make_shared<Imm>(2, 21, Imm::Repr::Hex, \
+ std::vector{ImmPart(20, 31, 31), ImmPart(12, 12, 19), \
+ ImmPart(11, 20, 20), ImmPart(1, 21, 30)}, \
Imm::SymbolType::Relative)}))
#define JALRType(name) \
- std::shared_ptr<Instruction<ISAInfo<ISA::RV32IM>>>(new Instruction<ISAInfo<ISA::RV32IM>>( \
- Opcode(name, {OpPart(0b1100111, 0, 6), OpPart(0b000, 12, 14)}), \
- {std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(1, 7, 11), \
- std::make_shared<Reg<ISAInfo<ISA::RV32IM>>>(2, 15, 19), \
+ std::shared_ptr<RVInstr>( \
+ new RVInstr(Opcode(name, {OpPart(0b1100111, 0, 6), OpPart(0b000, 12, 14)}), \
+ {std::make_shared<RVReg>(1, 7, 11), std::make_shared<RVReg>(2, 15, 19), \
std::make_shared<Imm>(3, 12, Imm::Repr::Signed, std::vector{ImmPart(0, 20, 31)})}))
void RV32I_Assembler::enableExtI(RVInstrVec& instructions, RVPseudoInstrVec& pseudoInstructions) const {

MODIFY
src/assembler/rv32i_assembler.h
src/assembler/rv32i_assembler.h
@@ -13,6 +13,7 @@ private:
using RVInstrVec = std::vector<std::shared_ptr<RVInstr>>;
using RVPseudoInstr = PseudoInstruction<ISAInfo<ISA::RV32IM>>;
using RVPseudoInstrVec = std::vector<std::shared_ptr<RVPseudoInstr>>;
+ using RVReg = Reg<ISAInfo<ISA::RV32IM>>;
public:
enum class Extensions { M, F };

[Assembler] Use aliasses for RVReg and RVInstr in RV32I assembler