Move ISA info to separate directory and split base & ISA specific stuff
MODIFY
src/CMakeLists.txt
src/CMakeLists.txt
@@ -4,6 +4,7 @@ set(CMAKE_CXX_STANDARD_REQUIRED ON)
file(GLOB LIB_SOURCES
*.cpp
+ isa/*.cpp
cachesim/*.cpp
editor/*.cpp
syscall/*.cpp
@@ -11,6 +12,7 @@ file(GLOB LIB_SOURCES
assembler/*.cpp)
file(GLOB LIB_HEADERS
*.h
+ isa/*.h
cachesim/*.h
editor/*.h
syscall/*.h

MODIFY
src/assembler/assembler.h
src/assembler/assembler.h
#include "directive.h"
#include "expreval.h"
#include "instruction.h"
-#include "isainfo.h"
+#include "isa/isainfo.h"
#include "matcher.h"
#include "parserutilities.h"
#include "pseudoinstruction.h"

MODIFY
src/assembler/instruction.h
src/assembler/instruction.h
#include <type_traits>
#include <vector>
#include "binutils.h"
-#include "isainfo.h"
+#include "isa/isainfo.h"
#include "math.h"
namespace Ripes {

ADD
src/isa/isainfo.h
+#pragma once
+
+#include <QMap>
+#include <QString>
+#include <set>
+
+#include "elfio/elf_types.hpp"
+
+namespace Ripes {
+
+/// List of currently supported ISAs
+enum class ISA { RV32I };
+const static std::map<ISA, QString> ISAFamilyNames = {{ISA::RV32I, "RISC-V"}};
+
+class ISAInfoBase {
+public:
+ virtual QString name() const = 0;
+ virtual ISA isaID() const = 0;
+
+ virtual unsigned regCnt() const = 0;
+ virtual QString regName(unsigned i) const = 0;
+ virtual unsigned regNumber(const QString& regName, bool& success) const = 0;
+ virtual QString regAlias(unsigned i) const = 0;
+ virtual QString regInfo(unsigned i) const = 0;
+ virtual bool regIsReadOnly(unsigned i) const = 0;
+ virtual unsigned bits() const = 0;
+ unsigned bytes() const { return bits() / CHAR_BIT; }
+ virtual int spReg() const { return -1; } // Stack pointer
+ virtual int gpReg() const { return -1; } // Global pointer
+ virtual int syscallReg() const { return -1; } // Syscall function register
+
+ // GCC Compile command architecture and ABI specification strings
+ virtual QString CCmarch() const = 0;
+ virtual QString CCmabi() const = 0;
+
+ virtual unsigned elfMachineId() const = 0;
+
+ /**
+ * @brief elfSupportsFlags
+ * The instructcion set should determine whether the provided @p flags, as retrieved from an ELF file, are valid
+ * flags for the instruction set. If a mismatch is found, an error message describing the
+ * mismatch is returned. Else, returns an empty QString(), validating the flags.
+ */
+ virtual QString elfSupportsFlags(unsigned flags) const = 0;
+
+ /**
+ * @brief supportedExtensions/enabledExtensions
+ * An ISA may have a set of (optional) extensions which may be enabled/disabled for a given processor.
+ * SupportedExtensions can be used when ie. instantiating a processor and enabledExtensions when instantiating an
+ * assembler for a given processor.
+ */
+ virtual const QStringList& supportedExtensions() const = 0;
+ virtual const QStringList& enabledExtensions() const = 0;
+
+protected:
+ ISAInfoBase() {}
+};
+
+template <ISA isa>
+class ISAInfo : public ISAInfoBase {};
+
+} // namespace Ripes

RENAME
src/isainfo.h
src/isa/rv32isainfo.h
#pragma once
-#include <QMap>
-#include <QString>
-#include <set>
-
-#include "elfio/elf_types.hpp"
+#include "isainfo.h"
namespace Ripes {
-/// Currently supported ISAs
-enum class ISA { RV32I };
-const static std::map<ISA, QString> ISAFamilyNames = {{ISA::RV32I, "RISC-V"}};
-
-class ISAInfoBase {
-public:
- virtual QString name() const = 0;
- virtual ISA isaID() const = 0;
-
- virtual unsigned regCnt() const = 0;
- virtual QString regName(unsigned i) const = 0;
- virtual unsigned regNumber(const QString& regName, bool& success) const = 0;
- virtual QString regAlias(unsigned i) const = 0;
- virtual QString regInfo(unsigned i) const = 0;
- virtual bool regIsReadOnly(unsigned i) const = 0;
- virtual unsigned bits() const = 0;
- unsigned bytes() const { return bits() / CHAR_BIT; }
- virtual int spReg() const { return -1; } // Stack pointer
- virtual int gpReg() const { return -1; } // Global pointer
- virtual int syscallReg() const { return -1; } // Syscall function register
-
- // GCC Compile command architecture and ABI specification strings
- virtual QString CCmarch() const = 0;
- virtual QString CCmabi() const = 0;
-
- virtual unsigned elfMachineId() const = 0;
-
- /**
- * @brief elfSupportsFlags
- * The instructcion set should determine whether the provided @p flags, as retrieved from an ELF file, are valid
- * flags for the instruction set. If a mismatch is found, an error message describing the
- * mismatch is returned. Else, returns an empty QString(), validating the flags.
- */
- virtual QString elfSupportsFlags(unsigned flags) const = 0;
-
- virtual const QStringList& supportedExtensions() const = 0;
- virtual const QStringList& enabledExtensions() const = 0;
-
-protected:
- ISAInfoBase() {}
-};
-
-template <ISA isa>
-class ISAInfo : public ISAInfoBase {};
-
-// ==================================== RISCV ====================================
namespace {
// clang-format off
const static QStringList RVRegAliases = QStringList() << "zero"

MODIFY
src/processorregistry.h
src/processorregistry.h
#include <map>
#include <memory>
-#include "isainfo.h"
+#include "isa/isainfo.h"
#include "processors/ripesprocessor.h"
#include "processors/RISC-V/rv5s/rv5s.h"

MODIFY
src/processors/RISC-V/riscv.h
src/processors/RISC-V/riscv.h
#pragma once
#include <functional>
+#include "../../isa/rv32isainfo.h"
#include "VSRTL/core/vsrtl_enum.h"
#include "VSRTL/interface/vsrtl.h"
#include "VSRTL/interface/vsrtl_binutils.h"

MODIFY
src/processors/ripesprocessor.h
src/processors/ripesprocessor.h
#include "Signals/Signal.h"
#include "VSRTL/core/vsrtl_design.h"
-#include "../isainfo.h"
+#include "../isa/isainfo.h"
namespace Ripes {

MODIFY
test/tst_assembler.cpp
test/tst_assembler.cpp
#include "assembler/instruction.h"
#include "assembler/matcher.h"
-#include "isainfo.h"
+#include "isa/isainfo.h"
+#include "isa/rv32isainfo.h"
#include "assembler/rv32i_assembler.h"

Move ISA info to separate directory and split base & ISA specific stuff