Added Test for new riscv processor w/o fw
MODIFY
test/tst_riscv.cpp
test/tst_riscv.cpp
@@ -66,6 +66,7 @@ private slots:
void testRVSingleCycle() { runTests(ProcessorID::RVSS); }
void testRV5StagePipeline() { runTests(ProcessorID::RV5S); }
+ void testRV5StagePipelineNOFW() { runTests(ProcessorID::RV5S_NO_FW); }
void cleanupTestCase();
};

Added Test for new riscv processor w/o fw