Add illustration of cache indexing bits
MODIFY
src/cacheconfigwidget.h
src/cacheconfigwidget.h
@@ -21,8 +21,10 @@ public:
public slots:
void setHitRate(double hitrate);
void setCacheSize(unsigned);
+ void configChanged();
private:
+ void updateIndexingText();
void setupPresets();
void showSizeBreakdown();
CacheSim* m_cache;

MODIFY
src/cacheconfigwidget.ui
src/cacheconfigwidget.ui
<rect>
<x>0</x>
<y>0</y>
- <width>661</width>
- <height>247</height>
+ <width>799</width>
+ <height>415</height>
</rect>
</property>
<property name="windowTitle">
<string>Cache configuration:</string>
</property>
<layout class="QGridLayout" name="gridLayout_3">
- <item row="0" column="0">
- <layout class="QGridLayout" name="gridLayout">
- <item row="4" column="0">
- <widget class="QLabel" name="label_8">
+ <item row="1" column="0">
+ <layout class="QVBoxLayout" name="verticalLayout">
+ <item>
+ <layout class="QHBoxLayout" name="horizontalLayout_2">
+ <item>
+ <widget class="QLabel" name="label">
<property name="text">
- <string>Repl. policy:</string>
+ <string>Preset:</string>
</property>
</widget>
</item>
- <item row="4" column="1">
- <widget class="QComboBox" name="replacementPolicy"/>
- </item>
- <item row="0" column="1">
+ <item>
<widget class="QComboBox" name="presets"/>
</item>
- <item row="3" column="1">
- <widget class="QSpinBox" name="lines">
+ </layout>
+ </item>
+ <item>
+ <layout class="QGridLayout" name="gridLayout">
+ <item row="1" column="2">
+ <widget class="QLabel" name="label_3">
+ <property name="text">
+ <string>Blocks</string>
+ </property>
+ </widget>
+ </item>
+ <item row="5" column="0">
+ <widget class="QCheckBox" name="writeback">
+ <property name="toolTip">
+ <string>Setting the valid bit implies a write-back cache</string>
+ </property>
+ <property name="text">
+ <string>Writeback</string>
+ </property>
+ </widget>
+ </item>
+ <item row="1" column="1">
+ <widget class="QSpinBox" name="ways">
<property name="maximum">
<number>10</number>
</property>
</widget>
</item>
- <item row="2" column="1">
- <widget class="QSpinBox" name="blocks">
+ <item row="3" column="1">
+ <widget class="QSpinBox" name="lines">
<property name="maximum">
<number>10</number>
</property>
</widget>
</item>
- <item row="3" column="0">
- <widget class="QLabel" name="label_4">
+ <item row="1" column="0">
+ <widget class="QLabel" name="label_2">
<property name="text">
- <string>Lines</string>
+ <string>Ways</string>
</property>
</widget>
</item>
- <item row="2" column="0">
- <widget class="QLabel" name="label_3">
+ <item row="3" column="0">
+ <widget class="QLabel" name="label_4">
<property name="text">
- <string>Blocks</string>
+ <string>Lines</string>
</property>
</widget>
</item>
- <item row="1" column="1">
- <widget class="QSpinBox" name="ways">
+ <item row="1" column="3">
+ <widget class="QSpinBox" name="blocks">
<property name="maximum">
<number>10</number>
</property>
</widget>
</item>
- <item row="1" column="0">
- <widget class="QLabel" name="label_2">
+ <item row="3" column="2">
+ <widget class="QLabel" name="label_8">
<property name="text">
- <string>Ways</string>
+ <string>Repl. policy:</string>
</property>
</widget>
</item>
- <item row="0" column="0">
- <widget class="QLabel" name="label">
+ <item row="3" column="3">
+ <widget class="QComboBox" name="replacementPolicy"/>
+ </item>
+ </layout>
+ </item>
+ <item>
+ <layout class="QVBoxLayout" name="verticalLayout_2">
+ <item>
+ <layout class="QHBoxLayout" name="horizontalLayout_4">
+ <item>
+ <widget class="QLabel" name="indexingText">
<property name="text">
- <string>Preset:</string>
+ <string/>
</property>
</widget>
</item>
- <item row="5" column="0">
- <widget class="QCheckBox" name="writeback">
- <property name="toolTip">
- <string>Setting the valid bit implies a write-back cache</string>
- </property>
+ </layout>
+ </item>
+ <item>
+ <layout class="QHBoxLayout" name="horizontalLayout_5">
+ <item>
+ <widget class="QLabel" name="indexingKey">
<property name="text">
- <string>Writeback</string>
+ <string>#=tag</string>
</property>
</widget>
</item>
</layout>
</item>
</layout>
+ </item>
+ </layout>
+ </item>
+ </layout>
</widget>
</item>
<item>

RENAME
src/cachebase.cpp
src/cachesim.cpp
-#include "cachebase.h"
+#include "cachesim.h"
#include "binutils.h"
#include <random>
namespace Ripes {
-void CacheBase::updateCacheLineLRU(CacheLine& line, unsigned lruIdx) {
+void CacheSim::updateCacheLineLRU(CacheLine& line, unsigned lruIdx) {
// Find previous LRU value for the updated index
const unsigned preLRU = line[lruIdx].lru;
@@ -20,7 +20,7 @@ void CacheBase::updateCacheLineLRU(CacheLine& line, unsigned lruIdx) {
line[lruIdx].lru = 0;
}
-CacheSize CacheBase::getCacheSize() const {
+CacheSize CacheSim::getCacheSize() const {
CacheSize size;
const int entries = getLines() * getWays();
@@ -50,7 +50,7 @@ CacheSize CacheBase::getCacheSize() const {
return size;
}
-void CacheBase::updateCacheValue(uint32_t address) {
+void CacheSim::updateCacheValue(uint32_t address) {
const unsigned lineIdx = getAccessLineIdx();
const unsigned blockIdx = getAccessBlockIdx();
@@ -107,7 +107,7 @@ void CacheBase::updateCacheValue(uint32_t address) {
}
}
-void CacheBase::updateHitRate() {
+void CacheSim::updateHitRate() {
if (m_accessTrace.size() == 0) {
m_hitrate = 0;
} else {
@@ -116,7 +116,7 @@ void CacheBase::updateHitRate() {
}
}
-void CacheBase::analyzeCacheAccess() {
+void CacheSim::analyzeCacheAccess() {
const unsigned lineIdx = getAccessLineIdx();
m_currentAccessLine = &m_cacheLines[lineIdx];
@@ -147,7 +147,7 @@ void CacheBase::analyzeCacheAccess() {
return;
}
-void CacheBase::read(uint32_t address) {
+void CacheSim::read(uint32_t address) {
m_currentAccessAddress = address;
analyzeCacheAccess();
if (!m_currentAccessIsHit) {
@@ -155,35 +155,35 @@ void CacheBase::read(uint32_t address) {
}
emit dataChanged(m_currentAccessAddress);
}
-void CacheBase::write(uint32_t address) {
+void CacheSim::write(uint32_t address) {
m_currentAccessAddress = address;
emit accessChanged(m_currentAccessAddress);
}
-void CacheBase::undo() {}
+void CacheSim::undo() {}
-unsigned CacheBase::getAccessLineIdx() const {
+unsigned CacheSim::getAccessLineIdx() const {
uint32_t maskedAddress = m_currentAccessAddress & m_lineMask;
maskedAddress >>= 2 + getBlockBits();
return maskedAddress;
}
-unsigned CacheBase::getAccessWayIdx() const {
+unsigned CacheSim::getAccessWayIdx() const {
return m_currentWayIdx;
}
-unsigned CacheBase::getAccessTag() const {
+unsigned CacheSim::getAccessTag() const {
uint32_t maskedAddress = m_currentAccessAddress & m_tagMask;
maskedAddress >>= 2 + getBlockBits() + getLineBits();
return maskedAddress;
}
-unsigned CacheBase::getAccessBlockIdx() const {
+unsigned CacheSim::getAccessBlockIdx() const {
uint32_t maskedAddress = m_currentAccessAddress & m_blockMask;
maskedAddress >>= 2;
return maskedAddress;
}
-void CacheBase::updateConfiguration() {
+void CacheSim::updateConfiguration() {
// Cache configuration changes shall enforce a full reset of the computing system
m_cacheLines.clear();
m_accessTrace.clear();
@@ -203,4 +203,24 @@ void CacheBase::updateConfiguration() {
emit configurationChanged();
}
+void CacheSim::setBlocks(unsigned blocks) {
+ m_blocks = blocks;
+ updateConfiguration();
+}
+void CacheSim::setLines(unsigned lines) {
+ m_lines = lines;
+ updateConfiguration();
+}
+void CacheSim::setWays(unsigned ways) {
+ m_ways = ways;
+ updateConfiguration();
+}
+
+void CacheSim::setPreset(const CachePreset& preset) {
+ m_blocks = preset.blocks;
+ m_ways = preset.ways;
+ m_lines = preset.lines;
+ updateConfiguration();
+}
+
} // namespace Ripes

RENAME
src/cachebase.h
src/cachesim.h
namespace Ripes {
enum class CacheReplPlcy { Random, LRU };
-static std::map<CacheReplPlcy, QString> CachePolicyStrings{{CacheReplPlcy::Random, "Random"},
+static std::map<CacheReplPlcy, QString> s_cachePolicyStrings{{CacheReplPlcy::Random, "Random"},
{CacheReplPlcy::LRU, "LRU"}};
struct CacheSize {
@@ -17,10 +17,16 @@ struct CacheSize {
std::vector<QString> components;
};
-class CacheBase : public QObject {
+struct CachePreset {
+ int blocks;
+ int lines;
+ int ways;
+};
+
+class CacheSim : public QObject {
Q_OBJECT
public:
- CacheBase(QObject* parent) : QObject(parent) {}
+ CacheSim(QObject* parent) : QObject(parent) {}
void setReplacementPolicy(CacheReplPlcy policy) {
m_policy = policy;
@@ -39,6 +45,7 @@ public:
int getBlockBits() const { return m_blocks; }
int getWaysBits() const { return m_ways; }
int getLineBits() const { return m_lines; }
+ int getTagBits() const { return 32 - 2 /*byte offset*/ - getBlockBits() - getLineBits(); }
int getBlocks() const { return static_cast<int>(std::pow(2, m_blocks)); }
int getWays() const { return static_cast<int>(std::pow(2, m_ways)); }
@@ -52,18 +59,10 @@ public:
bool isCacheHit() const { return m_currentAccessIsHit; }
public slots:
- void setBlocks(unsigned blocks) {
- m_blocks = blocks;
- updateConfiguration();
- }
- void setLines(unsigned lines) {
- m_lines = lines;
- updateConfiguration();
- }
- void setWays(unsigned ways) {
- m_ways = ways;
- updateConfiguration();
- }
+ void setBlocks(unsigned blocks);
+ void setLines(unsigned lines);
+ void setWays(unsigned ways);
+ void setPreset(const CachePreset& preset);
signals:
void configurationChanged();

Add illustration of cache indexing bits