PR #9531: Fp8 matmul support on AMD MI300
PR #9531: Fp8 matmul support on AMD MI300

Imported from GitHub PR https://github.com/openxla/xla/pull/9531

This PR enables support of fp8 matmul (with fp8e4m3fnuz and fp8e5m2fnuz) on MI300.
It is based off this previous PR to fix build break on ROCm (which is still open): https://github.com/openxla/xla/pull/9367

Some of the GEMM pattern rewrites were changed to accommodate current limitations in hipblasLt:
- hipblasLt currently does not support fp8 matmul with fp8 output. Therefore, it is rewritten to custom call of fp8 matmul with fp32 output, and HLO instructions are used to convert fp32 output to fp8.
- hipblasLt currently does not support fp8 matmul with bf16 output. Therefore, it is rewritten to custom call of fp8 matmul with fp32 output, and HLO instructions are used to convert fp32 output to bf16.

Copybara import of the project:

--
a4423f9136072f090494baff91bd87d3ab4d4069 by Wen Chen <Wen.Chen@amd.com>:

[ROCM] Initial support of fp8 Matmul via hipBlasLt.

[ROCM] Code refactoring of initial hipBlasLt fp8 Matmul support

 - Clean up unnecessary code, particularly regarding output types of fp8

 - Override methods in ParameterizedFp8GemmRewriteTest to replace the
   patterns for CUDA and ROCm respectively for HLO checks.

 - Explicitly set c_scale and d_scale to nullptr as hipblasLt currently
   does not support them.

Merging this change closes #9531

FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/9531 from ROCm:ci_fp8_gemm_support a4423f9136072f090494baff91bd87d3ab4d4069
