def _process_block_arch_specific(self, addr, irsb, func_addr):  # pylint: disable=unused-argument
        """
        According to arch types ['ARMEL', 'ARMHF', 'MIPS32'] does different
        fixes

        For ARM deals with link register on the stack
        (see _arm_track_lr_on_stack)
        For MIPS32 simulates a new state where the global pointer is 0xffffffff
        from current address after three steps if the first successor does not
        adjust this value updates this function address (in function manager)
        to use a conrete global pointer

        :param int addr: irsb address
        :param pyvex.IRSB irsb: irsb
        :param func_addr: function address
        :return: None
        """
        if is_arm_arch(self.project.arch):
            if self._arch_options.ret_jumpkind_heuristics:
                if addr == func_addr:
                    self._arm_track_lr_on_stack(addr, irsb, self.functions[func_addr])

                elif 'lr_saved_on_stack' in self.functions[func_addr].info and \
                        self.functions[func_addr].info['lr_saved_on_stack'] and \
                        irsb.jumpkind == 'Ijk_Boring' and \
                        irsb.next is not None and \
                        isinstance(irsb.next, pyvex.IRExpr.RdTmp):
                    # do a bunch of checks to avoid unnecessary simulation from happening
                    self._arm_track_read_lr_from_stack(irsb, self.functions[func_addr])

        elif self.project.arch.name == "MIPS32":
            function = self.kb.functions.function(func_addr)
            if addr >= func_addr and addr - func_addr < 15 * 4 and 'gp' not in function.info:
                # check if gp is being written to
                last_gp_setting_insn_id = None
                insn_ctr = 0

                if not irsb.statements:
                    # Get an IRSB with statements

                    irsb = self.project.factory.block(irsb.addr, size=irsb.size).vex

                for stmt in irsb.statements:
                    if isinstance(stmt, pyvex.IRStmt.IMark):
                        insn_ctr += 1
                        if insn_ctr >= 10:
                            break
                    elif isinstance(stmt, pyvex.IRStmt.Put) and stmt.offset == self.project.arch.registers['gp'][0]:
                        last_gp_setting_insn_id = insn_ctr
                        break

                if last_gp_setting_insn_id is None:
                    return

                # Prudently search for $gp values
                state = self.project.factory.blank_state(addr=addr, mode="fastpath",
                                                         remove_options={o.OPTIMIZE_IR}
                                                         )
                state.regs.t9 = func_addr
                state.regs.gp = 0xffffffff
                succ = self.project.factory.successors(state, num_inst=last_gp_setting_insn_id + 1)

                if not succ.flat_successors:
                    return

                state = succ.flat_successors[0]
                if not state.regs.gp.symbolic and state.solver.is_false(state.regs.gp == 0xffffffff):
                    function.info['gp'] = state.regs.gp._model_concrete.value
According to arch types ['ARMEL', 'ARMHF', 'MIPS32'] does different
        fixes

        For ARM deals with link register on the stack
        (see _arm_track_lr_on_stack)
        For MIPS32 simulates a new state where the global pointer is 0xffffffff
        from current address after three steps if the first successor does not
        adjust this value updates this function address (in function manager)
        to use a conrete global pointer

        :param int addr: irsb address
        :param pyvex.IRSB irsb: irsb
        :param func_addr: function address
        :return: None