
/*** Register 1: Receiver Gain Control ***/

/* reg1: 4:9 (BBGAIN0 - BBGAIN5) */
#define MIRISDR_BASEBAND_GAIN_REDUCTION_MIN             0
#define MIRISDR_BASEBAND_GAIN_REDUCTION_MAX             0x3B

/* reg1: 10:11 (MIXBU0, MIXBU1) - AM port 1 */
#define MIRISDR_AM_PORT1_BLOCKUP_CONVERT_GAIN_REDUCTION_0DB  0
#define MIRISDR_AM_PORT1_BLOCKUP_CONVERT_GAIN_REDUCTION_6DB  1
#define MIRISDR_AM_PORT1_BLOCKUP_CONVERT_GAIN_REDUCTION_12DB 2
#define MIRISDR_AM_PORT1_BLOCKUP_CONVERT_GAIN_REDUCTION_18DB 3

/* reg1: 10:11 (MIXBU0, MIXBU1) - AM port 2 */
#define MIRISDR_AM_PORT2_BLOCKUP_CONVERT_GAIN_REDUCTION_0DB  0
#define MIRISDR_AM_PORT2_BLOCKUP_CONVERT_GAIN_REDUCTION_24DB 3

/* reg1: 12 (MIXL) */
#define MIRISDR_LNA_GAIN_REDUCTION_OFF                  0
#define MIRISDR_LNA_GAIN_REDUCTION_ON                   1

/* reg1: 13 (LNAGR) */
#define MIRISDR_MIXER_GAIN_REDUCTION_OFF                0
#define MIRISDR_MIXER_GAIN_REDUCTION_ON                 1

/* reg1: 14:16 (DCCAL0 - DCCAL2) */
#define MIRISDR_DC_OFFSET_CALIBRATION_STATIC            0
#define MIRISDR_DC_OFFSET_CALIBRATION_PERIODIC1         1
#define MIRISDR_DC_OFFSET_CALIBRATION_PERIODIC2         2
#define MIRISDR_DC_OFFSET_CALIBRATION_PERIODIC3         3
#define MIRISDR_DC_OFFSET_CALIBRATION_ONE_SHOT          4
#define MIRISDR_DC_OFFSET_CALIBRATION_CONTINUOUS        5

/* reg1: 17 (DCCAL_SPEEDUP) */
#define MIRISDR_DC_OFFSET_CALIBRATION_SPEEDUP_OFF       0
#define MIRISDR_DC_OFFSET_CALIBRATION_SPEEDUP_ON        1

/*** Register 6: DC Offset Calibration setup ***/

/* reg6: 4:7 (DCTRK_TIM0 - DCTRK_TIM3) */

/* reg6: 8:21 (DCRATE_TIM0 - DCRATE_TIM11) */
