Abstract
GaN-based vertical-cavity surface-emitting lasers (VCSELs) have drawn interest in recent years for their potential applications in data storage, laser printing, solid-state lighting, optical communications, sensing, and displays. Several research groups have demonstrated electrically injected GaN-based VCSELs utilizing different growth and fabrication techniques to address the many challenges associated with III-nitride materials. One such challenge is fabrication of highquality conductive epitaxial distributed Bragg reflectors (DBRs). A relatively new approach that yields high-index-contrast lattice-matched epitaxial DBRs is to introduce subwavelength air-voids (nanopores) in alternating layers of doped/undoped GaN. These nanoporous layers can be achieved by the controlled anodic electrochemical etching of highly doped n-type GaN in acids. The selective formation of the nanopores in the doped layers effectively lowers the refractive index compared to the adjacent undoped GaN layers, resulting in a refractive index difference of ~0.83, allowing high reflectance (>99%) with only ~16 pairs. Here, we will present electrically injected nonpolar m-plane GaN-based VCSELs with lattice-matched nanoporous GaN bottom DBRs and top dielectric DBRs. Lasing under pulsed operation at room temperature was observed at 409 nm with a linewidth of ~0.6 nm and a maximum output power of ~1.5 mW. The nonpolar m-plane orientation offers low transparency, high material gain, and anisotropic gain characteristics. The VCSELs were linearly polarized with a polarization ratio of ~0.94 and polarization-pinned emission along the a-direction. The mode profiles, thermal properties, and lasing yield of the VCSELs are also discussed.
INTRODUCTION
With the commercialization of light emitting diodes (LEDs) and edge-emitting lasers diodes (LDs) in the violet-blue spectral region, group III-nitride based optoelectronic devices have undergone significant advancements in terms of device performance and reliability. As such, many lighting, communication, data storage, display, and sensing applications now utilize GaN-based light emitters. 1 Among these light emitters, vertical-cavity surface-emitting lasers (VCSELs) have garnered much attention in recent years due to their inherent advantages over edge-emitting lasers. The significantly shorter cavity lengths in VCSELs often allow for single-longitudinal-mode operation, while a small aperture diameter also enables single-transverse-mode operation in some cases. Furthermore, the small device size allows the fabrication of high-density 2D arrays, thereby dramatically reducing the development cost per device. Unlike edge-emitters, the emission of VCSELs is normal to the device surface and has a circular beam profile with low divergence angle, thus VCSELs are highly efficient for fiber coupling and on-wafer testing. Similarly, the small cavity volume results in fundamentally low threshold current and high modulation bandwidth at low bias currents. 2 III-nitride VCSELs are typically fabricated on the polar c-plane orientation that suffers from polarization-related electric fields in the active region and low per-pass gain. [3] [4] [5] [6] However, the nonpolar m-plane orientation eliminates internal electric fields, causing the uniform overlap of the electron and hole wave functions. [7] [8] [9] Additionally, the in-plane gain anisotropy in the nonpolar orientation also enables polarization-pinned emission along the a-direction, which is often desired in applications such as atomic clocks.
INTRODUCTION
the layers is only ~0.2, requiring more than 40-pairs to obtain a peak reflectance >99.9%. 6, 13 Thus, very long growth times in metal organic chemical vapor deposition (MOCVD) are necessary (~8 hours for 40-pairs) and maintaining the proper ternary alloy composition in the group-III elements is very difficult. Dielectric DBRs are often used in III-nitride VCSELs as a substitute for epitaxial DBRs due to the wide variety of materials available permitting high index contrast and ease of deposition processes. However, the use of dielectric DBRs involves complex fabrication techniques to access the backside of the cavity and device yield per wafer may be low. The non-conductive nature of dielectric materials also causes poor thermal and electrical performance of the VCSELs. 24 Alternatively, incorporating subwavelength air-voids or nanopores in alternating layers of the same material enables the formation of high-refractive-index-contrast lattice-matched epitaxial DBRs. The nanoporous layers are created by the anodic electrochemical (EC) etching of highly doped n-type GaN in certain acids. 25 The selectivity of the nanopores in the n-type doped layers effectively lowers the refractive index compared to the adjacent undoped bulk GaN layers. Using this technique, we have previously studied the pore evolution and their optical characteristics as a function of the layer doping concentration and etch bias voltage, and demonstrated a high reflectance (>98%) DBR with only 15 pairs. 26 Soon after, we developed an optically pumped 2-λ hybrid VCSEL that exhibited a single longitudinal lasing mode at 462 nm with a threshold power density of ~5 kW/cm 2 and a FWHM of ~0.12 nm. 27, 28 Finally, extending the work further, we demonstrated the first electrically injected nonpolar m-plane GaN-based VCSELs using lattice-matched nanoporous bottom DBRs. Lasing under pulsed operation at room temperature was observed near 409 nm with a linewidth of ~0.6 nm and a maximum output power of ~1.5 mW. All tested devices were linearly polarized and polarization-locked in the adirection with a polarization ratio of 0.94. 29 This manuscript describes the work in further detail and we also study the thermal properties of the nanoporous VCSELs through time-domain thermo-reflectance (TDTR) and finite-element method (FEM) modeling. In addition, the filamentary emission across the aperture is investigated through a core-cladding model to understand the high threshold current density (~20 kA/cm 2 ) and lateral mode confinement. Lastly, the high yield of lasing devices provides details of the device performance for the various aperture diameters.
VCSEL ARCHITECTURE
The VCSEL architecture is the same as described in our previous publication, 29 however in this section we will discuss the motivation behind the design in more detail. As is well known, the gain in the active region of an LD must equal the total losses in the cavity for the laser to reach threshold. In addition, the quantum wells (QWs) be must located at a standingwave peak with the total active region thickness kept at a minimum to maximize the overlap with the electric field to increase Γ ℎ . 30 Thus, the QW GaN barriers were set to 2 nm, which is close to the controllable thickness limit of our MOCVD reactor. We used a three-parameter gain curve to determine the number of QWs for the active region to minimize the threshold current density for a given threshold modal gain. 31 In principle, the slope of the gain curves (modal gain vs. current density) increases with increasing number of QWs while increasing the transparency current density (x-intercept of gain curves) as more carriers are required to fill up the QWs. 30, 32 Thorough analysis of the material gain vs. current density has been performed by Farrell et al. using m-plane GaN edge-emitting LDs of various cavity lengths. 31, 33 This type of study is difficult in VCSELs as devices of different cavity lengths (or mirror reflectances) cannot be easily fabricated on the same chip. We simply adopt the model provided by Farrell et al. and modify it to suit our transmission matrix method (TMM) simulation of the nanoporous VCSEL cavity. 
VCSEL ARCHITECTURE
is the number of QWs, Γ is the average confinement factor per well, 0 is the empirical gain coefficient, is the transparency current density per well, and is a linearity fitting parameter. 31 The standing-wave and the refractive index profile of the cavity with an effective optical thickness of 8-(Leff × neff ≈ 1453 nm × 2.26) is illustrated in Figure  1 (b), with the QWs positioned at a longitudinal mode peak and the ITO at a null to maximize gain and minimize loss. The threshold modal gain of the cavity obtained from the TMM simulation was ~8.4 cm -1 . Overlaying this value on top of Figure 1 (a), we see that the lowest current density for this modal gain can be achieved with 6 QWs, highlighted in red. It is important to keep in mind that the TMM analysis relies on literature reported estimates for most of the cavity loss parameters. The actual internal loss of the layers may be much higher and a larger number of QWs may be favorable for lowering the threshold current density. At the same time, injection of carriers may be an issue for active regions consisting of several QWs. Increasing the number of QWs increases the probability of having one or more QWs operating below the transparency carrier density. These QWs will possess a negative gain and act as highly absorbing layers since the bandgap energy is the same as those QWs with positive gain. Hence, 6 QWs were considered for this initial demonstration. The electron blocking layer (EBL) consisted of a 5 nm p-doped Al0.2Ga0.8N layer similar to previously reported m-plane VCSELs. [34] [35] [36] A thorough study on the EBL material composition and thickness may be essential for understanding the carrier injection dynamics in the active region of these devices. ) layers with thicknesses of 42 nm/62 nm for the bottom DBR, 495 nm of UID GaN for thermal spreading, a 200 nm n+GaN contact layer, a 200 nm n-GaN cladding layer, a sixpair In0.1Ga0.9N/GaN active region with thicknesses of 4 nm/2 nm emitting at ~407 nm, a 5 nm p-Al0.2Ga0.8N electron blocking layer, a 63 nm p-GaN cladding layer, and a 14 nm p+GaN contact layer. The spontaneous emission EL spectrum and spontaneous emission L-I-V characteristics of the sample were collected after growth and before fabrication and are plotted in Figure 2 (a) and (b), respectively. The actual peak emission wavelength was 410 nm. Although this blue-shift is concerning, it can be beneficial in terms of reducing the temperature sensitivity of the VCSEL. Intentional detuning of the emission wavelength and/or the cavity has been studied in early VCSELs to attain stable temperature operation. 37, 38 The device turn-on was around 4.5 V with a series resistance of ~10 Ω. These values were slightly higher compared to our optimized m-plane LEDs, but the output power was much greater, signifying higher quality epilayers. Both the turn-on voltage and series resistance can be improved with the optimization of the EBL and p-GaN layers. Following the growth, the sample was fabricated according the to the process flow depicted in Figure 3 . 29 First, a mesa was etched (Mesa 1) using ICP etching to expose the n+GaN contact layer. Next, the sample was patterned with a Ti/Au hard mask to define the current apertures and sent to Leonard Kroko Inc. for Al-ion implantation. The implant process turn-around time is approximately 3 days. Aperture diameters of 5 µm, 10 µm, 15 µm, and 20 µm were defined in this step. After implantation, the Ti/Au hard mask was removed in aqua regia. A second mesa with a depth of 400 nm was ICP etched (Mesa 2) and followed by a blanket e-beam deposition of 150 nm SiO2 to protect the active region and contact layers during the porosification step of the nanoporous DBRs. Next, deep trenches aligned along the c-direction were etched to expose the sidewalls of the DBR stack. Following this, the DBRs were EC etched for 14 hours to selectively porosify the highly doped n-type DBR layers using a bias voltage of 5 V at 100 rpm stirring. Complete porosification was confirmed when the two lateral etch fronts along the a-direction met at the center of the trench. Next, the blanket SiO2 was stripped in buffered HF and a patterned layer of SiNx was deposited across Mesa 1 and the trench to passivate the sidewalls of the active region and the nanoporous DBRs. Passivation of the DBR sidewalls was required to prevent the build-up of undeveloped PR from the subsequent steps. 50 nm of ITO was e-beam deposited and annealed under nitrogen ambient at 550˚C for 15 minutes, after which the p-metal and n-metal were deposited and consisted of Ti/Au (20 nm/300 nm) and Ti/Al/Ni/Au (20 nm/100 nm/50 nm/300 nm), respectively. Finally, a 30-nm-thick SiNx cavity spacer and the top dielectric DBR were blanket deposited using PECVD then patterned and etched down using RIE. The top DBR consists of 25 pairs of alternating ¼-SiO2 and SiNx. SEM images of the completed VCSEL structure and a representative nanoporous bottom DBR are illustrated in Figure 4 . Overall, the entire fabrication process is relatively straightforward and utilizes standard micro-fabrication techniques. As will be established in the next section, this process results in a high yield of lasing devices. 
SUMMARY OF PREVIOUS VCSEL RESULTS
The full lasing characteristics of the nanoporous VCSELs are reported in our previous manuscript 29 and summarized here for the reader. Figure 5(a) shows the light-current density-voltage (L-J-V) characteristics of a VCSEL with a 20 µm diameter aperture. The threshold current density is ~20 kA/cm 2 and the maximum output power is 1.5 mW. Figure 5 (b) shows the lasing spectrum for the same device, with a peak wavelength of 408.7 nm and a FWHM of 0.6 nm. The inset images show the intensity from the aperture area at various bias currents. The polarization characteristics of the VCSEL are shown in Figure 6 (a). A plot of the normalized output power as a function of polarizer angle reveals that the emission is polarization pinned along the a-direction of the crystal. Such polarization pinning is atypical for VCSELs with isotropic in-plane gain but has been previously reported for m-plane GaN-based VCSELs with anisotropic in-plane gain. All tested devices showed polarization pinning along the a-direction. 
THERMAL SIMULATIONS
As described in our previous report, the nanoporous VCSELs were characterized under pulsed conditions with a pulse width of 50 ns and a duty cycle of anthony86@example.org. Such narrow pulse widths are essential for driving devices at very high current densities without catastrophically damaging the VCSELs via internal heating. High current density operation is often required in VCSELs, particularly for first demonstrations, where the threshold current density may be substantially large. When attempting to drive the nanoporous VCSELs under CW operation at RT, it was observed that the devices broke down when the duty cycle was raised beyond 3%. To determine the root cause of this breakdown, thermal properties of the nanoporous VCSEL structure were studied. Obviously, the air voids in the nanoporous layers will significantly reduce the thermal conductivity of GaN, but the presence of stacked layers of bulk and porous layers in the DBR should provide good thermal conductivity. The actual thermal conductivity of the nanoporous layers was obtained using TDTR. [39] [40] [41] First, a wafer was grown consisting of a 1-μm-thick n-GaN layer followed by a thin 50 nm undoped GaN cap and cleaved into two pieces. One of the samples remained unetched and was used as a bulk GaN reference (sample A), while the other was etched to porosify the doped layer to a ~66% porosity similar to that of the VCSEL DBR (sample B). In TDTR, the sample is heated with a modulated laser source while another laser measures the changes in reflectance to calculate the thermal conductivity of the material. TDTR calculations can also estimate the changes in thermal conductivity for different layer porosities, however, the validity of such extrapolation is questionable given that it was based on only two data points. Figure 7 (a) plots the trend in thermal conductivity as a function of the porosity and also contains the SEM cross-sections of the two measurement samples. Here, the measured thermal conductivity of sample A and sample B were 170 W/mK and 2.9 W/mK, respectively. The bulk GaN thermal conductivity was similar to those reported in literature 42, 43 but the value decreased dramatically for the porous sample. 44 Figure 7 (a) also plots the changes in index contrast as function of the porosity. At a porosity of 66%, ∆ at 409 nm is ~0.84 indicating that the thermal conductivity can still be improved to some degree without sacrificing too much refractive index contrast. Doing so, however, will required more DBR pairs to maintain the same reflectance value. The data in Fig. 5(a) can be converted to simulate the 16-pair DBR structure used in the nanoporous VCSELs. Note that modeling the thermal conductivities of stacked layers requires extra attention as multilayer stacks experience enhanced scattering by interface phonons due to the thermal boundary resistance at each interface. 45 As a result, stacked layer geometries can have lowered anisotropic thermal conductivity values compared to the same bulk materials. To accurately model these layers, an effective thermal conductivity was used, with the lateral ( ) and vertical ( ) anisotropic thermal conductivities given by, Here, 1 , 2 and 1 , 2 are the thermal conductivities and the thicknesses of the alternating DBR layers, respectively. The changes in and with respect to porosity is shown in Figure 7 (b). At 0% porosity when the DBR can be considered bulk GaN, the thermal conductivity is isotropic with a value of 170 W/mK. At the device porosity of 66%, is 69.7 W/mK and is 4.78 W/mK, implying that most of the heat will dissipate laterally as opposed to vertically. This is understandable since phonons travelling vertically will experience more interfaces and insulating layers in the vertical direction. Figure 7 (b) also plots the peak reflectance of the DBR versus the layer porosity showing that at the device porosity of 66%, the reflectance is almost 100%. The porosity can be reduced to 50% while still maintaining a reflectance >99.9% to help improve , though there is not much change in . With the thermal conductivity of the nanoporous DBR known, we model the entire VCSEL structure to estimate the thermal resistance . Measuring experimentally was not possible since CW operation could not be achieved. Hence, thermal analysis was carried out using a steady-state heat dissipation model to generate the thermal profile within the VCSEL structure. Due to the symmetry of the aperture of the device, a 2-D axisymmetric model was used to reduce the computation time, while still representing the lateral heat transfer within the device layers accurately. A single small device was examined in a considerably large domain size of 500 µm by 300 µm to prevent erroneous data, since FEM simulations in COMSOL TM typically depend strongly on the simulation domain. 48 The resistive component of the heat generated from the epilayers is negligible compared to the nonradiative recombination component as the wall-plug efficiencies of the devices were quite low. Thus, joule heating was neglected and an apertured non-radiative heat source within the active region was assumed with uniform current spreading. The heat is predominately transferred by conduction so a heat diffusion model for conduction was used. Figure 8(a) shows the temperature profile of the simulated nanoporous VCSEL operating at the power density for the highest observed output power. It shows that the heat generated in the active region is mostly trapped on the p-side due to the poor thermal conductivity of the top dielectric DBR. Assessing the heat flow (given by proportional white arrows shown in the inset), we see that heat is concentrated on the p-side and disperses in the lateral direction as predicted in Figure 8(b) . Heating of the p-side explains why at 3% duty cycle, the p-metal contact incurs catastrophic damage before any visible damage to the epilayers could be observed (inset). Furthermore, the internal temperature rise Δ for the nanoporous VCSELs is >300°C, whereas reported CW VCSELs operate within Δ ~160°C, explaining why CW operation was not possible. 6 (p), 17, 49 The modeled thermal resistance is given by = Δ Δ , where Δ is the change in internal temperature of the device given in K and Δ is the dissipated power of the laser in mW. as a function of the cavity length for various aperture sizes is shown in Figure 8(b) . The cavity length was changed by increasing the thickness of the n-GaN layer below the active region. No significant changes were observed when the cavity length was increased from the p-side. As a general trend, a larger cavity volume aids in dissipating the heat more efficiently, resulting in a decreased . 24 Also, overlaid on Figure 8 (b) are the thermal resistance of three reported CW-RT VCSELs with different architectures and aperture sizes. 6, 17, 49 Given our 8-cavity design with a 20-μm-diameter aperture, 29 the estimated thermal resistance is ~516 K/W which is lower than the reported CW devices. Even though the thermal resistance of our design is based on simulations, the semi-empirical study validates that the nanoporous VCSELs should have thermal resistance at least in the same order of magnitude as CW devices reported in literature. 6, 17, 49 Thus, CW operation at RT should be possible from the nanoporous VCSELs without any drastic alterations to the device design, provided the threshold current density is decreased by at least a factor of 2 to lower the internal temperature. 
APERTURE STUDY
The high threshold current density might be due to the poor lateral confinement of the mode within the aperture. Four different aperture sizes of 5 μm, 10 μm, 15 μm, and 20 μm were implemented during the fabrication of the VCSELs. The present ion implanted aperture design only changes the refractive index of GaN by ~2% between the non-implanted and implanted regions. 35 Correlating this to calculate the effective modal index of the core (aperture) and cladding region (Al implant) in the cavity using TMM results in an index change ∆ ⁄ of ~0.1%. Such low ∆ ⁄ suggests a very weak lateral mode confinement in the nanoporous VCSELs, essentially making them gain-guided as opposed to index-guided. Poor optical guiding in the apertures can be the cause of the high threshold current density so it is important to evaluate the degree of lateral confinement. Hence, a simple 2-D core-cladding model was developed using Lumerical TM , a FEM-based mode solver, to simulate the lateral (transverse) modes inside a 5 μm and 20 μm diameter aperture. Figure 9 shows a schematic of the model with a constant of 2.25692 (obtained from TMM simulation) and an infinitely large cladding region, where is varied to change ∆ ⁄ . For ∆ ⁄ of 0.25%, the resulting , mode profiles inside the 20 μm aperture are also shown in Figure 9 for 8-azimuthal modes and 4-radial modes. Note that the mode profiles for the 5 μm aperture (not shown in Figure 9 ) were identical to the 20 μm aperture but the total number of modes were fewer in number. Based on first-order approximation, the total number of confined modes in the core-cladding structure for the 5 μm and 20 μm aperture were ~8 and ~112, respectively. 2, 50 The order of the lateral modes is determined by the imaginary part of the effective refractive index obtained from the simulation. The profiles of higher-order modes reside near the edges of the core region resulting in mode leakage and a decrease in the confinement. Consequently, higher-order modes appear later as the imaginary part of the effective refractive index that the mode sees is higher than the lower-order modes. This modal behavior can be visually represented in the array of Figure 9 . Generally, increasing the effective index contrast between the core and the cladding regions will tightly confine the mode inside the core, allowing higher order modes to be easily supported in the VCSEL. 51, 52 Conversely, a large abrupt change in ∆ can also increase scattering and diffraction losses in the cavity, so typically ∆ / is maintained below 2%. 51, 53, 54 Figure 9: Lumerical TM mode solver simulation of the lateral , modes for a 20 μm aperture with ∆ / of 0.25%.
APERTURE STUDY
The lateral confinement for the 5 μm and 20 μm aperture sizes as a function of ∆ ⁄ are plotted in Figure 10 (a) and (b), respectively. For simplicity, only eight of the first order radial modes are considered in Figure 10 . The confinement is more than 90% for both aperture sizes when ∆ ⁄ is greater than 1%, indicating that the core remains index-guided. Decreasing ∆ ⁄ further, the confinement exponentially declines for the 5 μm aperture due to mode leakage from the limited area. The drop is more noticeable particularly for higher-order modes that have peaks near the edges of the aperture. As a result, some high-order mode, like the 8,1 , do not even appear in the simulation for ∆ ⁄ < 1%. Contrary to the 5 μm aperture, the large area in the 20 μm diameter maintains a high confinement down to 0.25%. However, it is expected to drop drastically below 0.25% since the simulation did not converge to any valid anthony86@example.org%, concluding that the nanoporous VCSELs are indeed gain-guided. The ion implanted apertures provide adequate current confinement but very negligible lateral optical confinement. Future designs should adopt planar dielectric apertures where ∆ can be controlled by changing the dielectric/p-GaN etch depth while avoiding anti-guiding. Unfortunately, none of the conventional mode profiles illustrated in Figure 9 could be observed in the nanoporous VCSELs due to their filamentary emission. The random nature of the filamentation coupled with the distinct divide across the aperture by the nanoporous etch fronts ( Figure 11 ) strongly hinted that the filamentation may originate from the nonuniformity in the cavity resonance. This was verified by simulating a similar core-cladding model but with the addition of nanoscale regions with slightly higher refractive index scattered randomly throughout the core region. The small index change was calculated using ∆ = ∆ , where ∆ is the difference in wavelength obtained from the two peaks observed in our previous optical pumped VCSEL with being the dominant peak. 29 Figure 9 depicts two such near-field mode profiles from a 20-μm-diameter aperture VCSEL. In both images, the emission seems to begin from the edges of the aperture. This is likely the result of non-uniform current spreading by the ITO commonly seen in large apertures where the current is concentrated near the edges. 56 Although the simulated profiles conform well to the near-field images, the exact mode numbers are hard to determine because of their irregular shape. The mode is probably a high-order mode that reached a balance between the preferred high-order mode due to non-uniform current spreading and the suppression of high-order modes due to poor lateral confinement. Nevertheless, almost all previously reported GaN-based VCSELs have exhibited filamentary emission to some degree even without the use of random porous layers in the structure. 3, [34] [35] [36] [57] [58] [59] [60] [61] [62] A few instances of uniform Gaussian profiles have been reported with the use of backside curved mirrors in long cavity VCSELs with aperture diameters less than 10 μm. 53, 63, 64 The reports claim that decreasing the diffraction and scattering losses in the cavity is essential for obtaining uniform profiles. However, broadening of the beam waist becomes an issue when long VCSELs cavities are considered. Generally, diffraction losses are negligible in short cavity (8-) VCSELs but can increase for multiple-pass devices (low ) . Similar arguments can be made regarding scattering loss since designs without any step profiles also exhibit filamentation. Furthermore, it is difficult to assess the root cause of filamentation in small apertures since it eliminates spatial variations in growth non-uniformity and cavity lengths. Filamentation in the nanoporous approach might be reduced by forming even more densely packed smaller pores by increasing n-type doping in the DBR and etching at a lower bias. Further in-depth analysis is required for understanding filamentation in III-nitride VCSELs. 
YEILD ANALYSIS
One of the biggest advantages of the nonpolar VCSELs with nanoporous DBRs is the ease of fabrication that resulted in a high yield of devices. Out of the 50 or so devices tested, almost 90% of the VCSELs lased at some wavelength depending on the location of the device on the wafer. This variation in emission wavelength was due to the gradual changes in effective cavity resonance relative to the gain bandwidth as the porosity varied across the wafer. The changes in the porosity in the DBR was caused by the spatial variation in current flow during EC etching. The DBRs closer to the indium contact (surface of solution) had smaller pores due to lower currents than the DBRs at the opposite end of the wafer ( Figure  12 ). Since this was a first demonstration for electrically injected devices with a brand-new architecture, the changes in the effective cavity length was a welcomed discrepancy to allow on-chip tunability of the cavity resonance. We note that this variation in porosity could be avoided on a larger wafer where most of the wafer would be submerged in the etchant. Patterning noble metal contacts near the periphery of the DBRs should also help with the uniformity during the EC etching process. The high yield also allows us to perform statistical analysis on the devices to gain an understanding of some of the fundamental limitations of the nanoporous VCSEL. Figure 13 plots the (a) output power/intensity, (b) slope efficiency, (c) threshold current/current density, and (d) differential resistance as a function of the aperture size. The data points represent the average value of all the devices tested for that particular aperture diameter with error bars. In Figure 13 (a), the total output power increases almost linearly with increasing aperture sizes because of the enlarged emission areas. However, the emission intensity remained reasonably constant for the 10 μm and 15 μm but dropped for the 20 μm aperture. Given the filamentary nature of emission observed in the VCSELs, the average output power is expected to drop due to specular non-uniform emission from large apertures. The lower intensity of the 5 μm aperture may be due to the lasing spot being in close proximity to the non-ideal etch front divide in the nanoporous DBRs. We see similar trends for the slope efficiency in Figure 13 (b), which correlates with the output power. The drop in slope efficiency for the 20 μm is likely a result of nonuniform current spreading in the ITO. More current is required near the center of the aperture to obtain the same power of stimulated emission occurring at the edge. The current spreading in the p-side can be significantly improved by replacing the ITO with a GaN-based TJ, which will also help reduce the layer absorption loss. Now for the threshold current, increasing the aperture size generally means an increased ℎ as more current is needed to inject across a larger area to reach the same threshold current density. However, in Figure 13 (c), the current density drastically changes from ~60 kA/cm 2 for the 5 μm to ~15 kA/cm 2 for the 10 μm aperture. This is primarily due to poor lateral confinement in the 5 μm apertures, in addition to the lasing spot being at a non-ideal location near where the EC etch fronts meet. As previous explained for Figure 10 (a), a limited confinement implies that the active region must be pumped harder to reach the threshold modal gain (Γ ℎ ). Since Γ is small, the threshold material gain ℎ must be large, which correlates to high current densities. 31 Beyond 10 μm apertures where the confinement is more or less steady, the threshold current density remains fairly constant. Figure 13 (d) plots the differential resistance against the aperture size, where it drops gradually from ~100 Ω to ~34 Ω. All the VCSELs had the same device dimensions apart from the aperture diameters, meaning that the current flow was restricted in the axial direction for the smaller apertures resulting in the high differential resistance. The larger aperture sizes allow the flow of current at lower voltages. Overall, the trends in Figure 13 highlight the importance of choosing the proper aperture diameters. Small apertures suffer from weak confinement, while large apertures suffer from filamentation and non-uniform current spreading. It appears that for the current design, 10 μm and 15 μm apertures are the most optimized. Addressing some of these issues in future designs will improve the device characteristic in other aperture sizes as well. 
SUMMARY
To summarize, this manuscript further reports on the results obtained from our previous work on electrically injected GaNbased VCSELs using nanoporous bottom DBRs. Though the results were promising for a first demonstration, there is still room for much improvement. Namely, reducing the threshold current density and operating voltage to enable CW operation is to be expected with the integration of a tunnel junction current spreading layer instead of ITO. Increasing the cavity length will benefit from the increased overlap of multiple cavity modes with the gain spectrum along with reduced thermal resistance. Furthermore, the performance of the VCSELs is expected to improve significantly by enhancing the lateral mode confinement by replacing the ion implanted apertures with a planar dielectric-step aperture. Regardless, the nanoporous epitaxial DBRs offers a viable approach for electrically injected GaN-based VCSELs to mitigate some issues currently affecting III-nitride VCSELs.

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