Abstract
Abstract -
I. INTRODUCTION
VCO is a necessary component when it comes to implementing a single-chip radio in a communication system [1] [2] [3] [4] [5] [6] [7] . However, CMOS VCOs have the limitation of a low quality factor (Q-factor) using on-chip passive components [1] [2] [3] [4] [5] [6] [7] [8] . Thus, a transformer feedback technique is used to increase the output voltage swing, and the inductor of the LC oscillator based on transmission line theory enhances high frequency performance [2] [3] 6] . A high output power results in correct data transfer but deterioration of the phase noise performance. It is difficult to obtain high output power for the VCO operating at the U-band [1] [2] [3] 8] . The VCO gain (K VCO ) is also important factor in the VCO and a low K VCO could improve the phase noise performance [7] . The change of the capacitance in the LC resonator determines the tuning range of the VCO, so the proposed VCO uses two varactor banks for the fine tuning range.
I. INTRODUCTION
The remainder of this paper is organized as follows. In Section ІІ, the proposed transformer VCO topology and circuit design are presented. The circuit implementation is described in Section ІІІ while post-simulation results and experimental results of the VCO are provided in Section ІV. Finally, the conclusion is given in Section V.
II. VCO ARCHITECTURE AND CIRCUIT DESIGN
The architecture of the proposed VCO is an NMOS cross-coupled pair differential LC type and the transformer inductors are spiraled by L P1 , L P2 and L S1 , L S2 as shown in Fig. 1 . The transformer inductors can provide drain-to-source feedback and voltage swing below ground level. The two varactor banks-C B1 and C B2 -are used to widen the tuning range of the VCO. The value of C VAR1 is twice that of C VAR3 .
II. VCO ARCHITECTURE AND CIRCUIT DESIGN
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II. VCO ARCHITECTURE AND CIRCUIT DESIGN
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II. VCO ARCHITECTURE AND CIRCUIT DESIGN
. . The resonant frequency of LC VCO is determined by the inductance, capacitance and parasitic resistance of an inductor and capacitor. R VDD reduces output swing variation by preventing noise influx from the power supply to the VCO. In addition, R VDD increases the resonant frequency because the capacitance of the varactor is decreased by lowering the DC voltage level of the varactor on the anode side-OSCM and OSCP. The output buffers, MN3 and MN4, are added to isolate the output of the VCO from other blocks but the output swing is reduced according to R buff . If we use the inductor instead of the resistor, the output swing could increase and the power consumption could be reduced but the chip area will increase significantly. Moreover, the output buffer supports the 50Ω matching network.
II. VCO ARCHITECTURE AND CIRCUIT DESIGN
The cross-coupled pair of MN1 and MN2 ensures the differential mode operation and compensates for the loss caused by the passive components. The size of MN1 and MN2 is selected to guarantee sufficient gain to maintain the oscillating condition and better phase noise performance. The negative resistance of the cross-coupled pair cancels out the positive resistance of the LC tank for oscillation. The NMOS core is suitable for operating at high frequency, because the current driving capability of NMOS is better that of PMOS.
III. CIRCUIT IMPLEMENTATION
The designed the VCO was implemented using a 65 nm CMOS process and verified by CADENCE Spectre RF simulator and measurement. In post-simulation, we used the PSN (Power Supply Network) model [9] to correctly predict the variation due to external supply in the measurement environment, as shown in Fig. 2 .
III. CIRCUIT IMPLEMENTATION
When the PSN model was used, we could confirm that the variation of the VCO output swing was about 4.9 times larger than without the PSN model, as shown in Fig.  3 . This means that the prediction of VCO operation using the PSN model was close to the measurement values. We simulated the performance of the VCO considering the effect of external supply using the PSN model. We considered various operating conditions before implementation. The simulation results considering the R VDD in PVT (Process, Supply voltage, and Temperature) variation are summarized in Table І and shown in Fig. 4 . In these simulations, V CTRL1 and V CTRL2 were 0.6-V and the offset frequency of the phase noise simulation was 10MHz. From the simulation results, the VCO including R VDD showed small variation in output swing and operated at a higher frequency. The minimum output swing ratio was 4.9 times when the temperature was 85 °C, and the maximum ratio was 50.5 times when the temperature was 0°C. In phase noise performance analysis, R VDD typically degenerates the performance because the noise of the R VDD is added. However, in temperature simulation, when the variation of power supply is large, using the R VDD show better phase noise characteristics. Therefore, if the power supply exhibits variation of DC voltage in the measurement, the R VDD could improve the phase noise characteristics. As a result, we were able to determine that the VCO with R VDD showed better performance in stability and that the operating frequency was increased about 4.1%. The drawback of using a resistor is that the inherent thermal noise of R VDD worsens the phase noise characteristics, but the phase noise degeneration could be reduced to below 1 dBc/Hz if R VDD were less than 10 Ω.
III. CIRCUIT IMPLEMENTATION
The VCO chip microphotograph is shown in Fig. 5 . Eight pads were placed for probing. Four pads at the bottom side were used for GSSG probing, while the other pads for VDD, VSS, V CTRL1 , and V CTRL2 were placed on the other sides for DC biasing. The four inductors were implemented using a transmission line and L P1 (or L P2 ) was placed close to L S1 (or L S2 ) to obtain high mutual inductance. To determine the size of the inductor with high Q-factor, we used an HFSS electromagnetic field simulator, Fig.6 show the simulation structures used to evaluate the proposed inductor. In Fig. 6(a) , the thickness of the substrate and passivation are the same as the PDK parameter for process, and the vacuum plays a role in the radiation boundary. We used simulations to confirm the self-inductance (L self ) and mutual-inductance (M). The pattern used to obtain L self is shown in Fig. 6(b) and the pattern considering the M is shown in Fig. 6(c) . The L P1 and L P2 presented by L R were designed with a center-tapped structure connected with the VDD in the middle of the inductor and the inductance of L R determined resonant frequency with the capacitance of the varactors. L S1 and L S2 have a semicircle shape and Port 4 and Port 6 are connected with ground in Fig. 1 . A simple unified form of the inductance of planar spirals is shown in Eq. (1)- (2) and Table ІІ shows the geometric values of the proposed inductor [10] : In Eq. (1)- (2), n is the number of turns, d avg is the arithmetic mean of the inner and outer diameters, d out is the outer diameter, d in is the inner diameter, and ρ is the fill factor. Furthermore, c 1 -c 4 are the coefficients for the current-sheet inductance and they are shown in Table ІІІ [10] . Thus, the calculated inductance of L R from Eq. (1) is 0.192 nH. Figure 7 is the simulation result of Fig. 6(b) : we designed the operation frequency of the proposed VCO to be 53 GHz. In Fig. 7(a) , the inductance of the designed inductor is 0.195 nH at 53 GHz, and this value is almost the same as the value calculated Eq. (1). Thus, we were able to verify the design of L R .
III. CIRCUIT IMPLEMENTATION
The Q-factor of the inductor is one of the most important factors to affecting the performance of the VCO [1] [2] [3] [4] [5] [6] [7] [8] , and is calculated from [Im(Y 11 )/Re(Y 11 )] [8] . Figure  7(b) shows the simulation result of the Q-factor, but the maximum value is not evident at 53 GHz. Rather, the maximum Q-factor was 31.5 at 31 GHz, while the Qfactor of the target frequency was 26.3. This is because L S1 and L S2 were laid out on the inside of the L P1 and L P2 in the transformer structure, and then the Q-factor was changed by the electric field. Thus, we developed the second simulation to match the Q-factor and oscillation frequency as shown in Fig. 6(c) . Figure 8 depicts the simulation result of Fig. 6(c) , and shows that we could obtain the maximum Q-factor at the operating frequency via the several modifications in the structure. In Fig. 8(b) , the Q-factor of L R is 17.18 and the Q-factor of L S1 is 28.44. The Q-factor and inductance of L S2 were the same as those of L S1 . The inductance and capacitance of the proposed VCO to determine the oscillation frequency should be small due to the U-band operation. If the capacitance is too small, the operation range of the VCO will become narrow, so a design method that reduces the inductance is desirable. In the transformer structure, M is between two inductor, and the relationship between M and L self is shown in Eq. (3) [10]:
III. CIRCUIT IMPLEMENTATION
Here, L T is the inductance of the L R of Fig. 6(c) , and M can be added and subtracted depending on the current direction flowing in the two inductors [10] . In the proposed structure, L P1 -L P2 and L S1 -L S2 are laid out as the current direction is reversed because the VCO can operate at high frequency if the inductance is reduced. From the simulation result, it was found that the inductance of L R decreased from 0.195 nH to 0.125 nH (36%) : this is shown in Fig 8(a) .
III. CIRCUIT IMPLEMENTATION
One of the important factors affecting the performance of VCO is the Q-factor of the varactor. In this paper, we focused on the analysis of the transformer inductor, so we used an NMOS structure in design. The corner simulation result of the Q-factor at 53 GHz versus V CTRL1 and V CTRL2 are shown Fig. 9 . From the simulation result, we confirmed that the Q-factor value of the varactor used was less than the value of the previous modified varactor [5] . We were able to obtain the an advantage in terms of area via inductor coupling; the area of the proposed VCO including the output buffer was only 0.16× 0.16 mm 2 . We optimized the width and length of the inductor to maximize the output power as much as possible. If coupling coefficient k is 1, the output swing can be calculated using Eq. (4) [6] . The source connected to the inductor could go below ground. If the value of inductor is too large, the oscillation is not maintained.
IV. EXPERIMENTAL RESULTS
In the measurement, on-wafer probing was carried out using a probe station, N9010A spectrum analyzer, 11970V external mixer, N9029AE13 diplexer, and dual power supply. Figure 10 shows the experimental environment. The Infinity Probe could measure the output of the proposed VCO, while GSSG signifies groundsignal-signal-ground. The input of the mixer is a waveguide, so the adapter converts SMA to waveguide. The N9010A spectrum analyzer was able to measure the frequency upto 32 GHz but the diplexer changed the measurement frequency, so the U-band operation could be measured. Figure 11 shows the measured frequency tuning range; the proposed VCO operated from 51.55 to 54.18 GHz. The capacitance of C B1 was greater than that of C B2 , so the tuning range from V CTRL1 was wider than from V CTRL2 . The reason for the narrowness of the operating range compared with previous works was that the capacitance of the VCO was small for fine tuning at the U-band [1] [2] [3] . The maximum K VCO of the V CTRL1 was 1.52 GHz/V and the maximum K VCO of the V CTRL2 was 0.67 GHz/V. Figure 12 shows the power consumption, including the output buffer, in V CTRL1 and V CTRL2 ; the average value was 33.4 mW with a power supply of 1.2-V. The power consumption showed little change, but decreased even if the output frequency increased. The VCO core operated rapidly when the output frequency increased, so the power consumption of the VCO core also increased. On the other hand, the power consumption of the output buffer decreased due to the decrease in the output swing. The reason for the high power consumption compared with the previous works is that the output buffer had a 50Ω resistor for impedance matching between OUTP or OUTM and the cable dissipated a large amount of power. The measured output power was -14.96 dBm when V CTRL1 and V CTRL2 were 1-V as shown in Fig. 13 . Table IV , which incorporates information from datasheets. We compensated the losses of the probe, adapter, cable (three 5061-5458 cable and one 124-605 cable), and diplexer from the measured output power. The loss of the mixer was automatically compensated for by a spectrum analyzer according to the frequency. Finally, the compensated output power was -0.11 dBm, representing a very large value in the millimeter wave data transfer system. The measured phase noises were -51.53 dBc/Hz, -91.84 dBc/Hz, and -101.07 dBc/Hz at offset frequencies of 10 kHz, 1 MHz, and 10 MHz, respectively, when the VCO was amandamcdowell@example.org GHz (Fig. 14) .
Fig. 14. Measured phase noise versus offset frequency
The proposed VCO was compared to other works to verify its performance by using measured values. FOM P was used for the evaluation and is defined in Eq. (5) [8] :
Fig. 14. Measured phase noise versus offset frequency
Here, L(Δf) is the phase noise, Δf is the offset frequency, f 0 is the oscillation frequency, P RF is the RF output power, and η is the dc-to-RF efficiency, defined as:
Fig. 14. Measured phase noise versus offset frequency
In Eq. (6), P DC is the DC power consumption. The proposed VCO showed superior performance compared with existing VCO's using the same process technologies. 
V. CONCLUSIONS
A stable VCO in the U-band using a 65 nm CMOS with high output power and excellent FOM P was designed in this work. The VCO topology was the NMOS crosscoupled pair differential LC type using a transmission line and a drain-to-source feedback structure for high output swing. A resistor was added to the VCO to obtain stable output swing. The inductors are located close to each other to obtain a high Q-factor and large inductance. This structure has an advantage in area, and the area of proposed VCO was 0.16× 0.16 mm 2 . Two varactor banks were used to widen the tuning range and the measured operating frequency range was from 51.55 to 54.18 GHz. The measured output power was -0.11 dBm and the phase noises were -51.53 dBc/Hz, -91.84 dBc/Hz, and -101.07 dBc/Hz at offset frequency of 10 kHz, 1 MHz, and 10 MHz, respectively. The power consumption was 33.4 mW with a power supply of 1.2-V and the FOM P was -190.8 dBc/Hz, which showed better performance than previous works.
V. CONCLUSIONS
In this research, the proposed VCO was found to be feasible for application in millimeter wave data transfer systems and so on.
V. CONCLUSIONS
CAD tool and MPW were supported by IDEC.

{'paper_id': '62029389', 'title': 'A stable U-band VCO in 65 nm CMOS with -0.11 dBm high output power', 's2_url': 'https://api.semanticscholar.org/CorpusID:62029389', 'source': 'S2ORC'}