<s> void applyFixup ( const MCAssembler & Asm , const MCFixup & Fixup , const MCValue & Target , MutableArrayRef < char > Data , uint64_t Value , bool IsResolved , const MCSubtargetInfo * STI ) const override { unsigned Size = 0 ; switch ( ( unsigned ) Fixup . getKind ( ) ) { case FK_Data_1 : Size = 1 ; break ; case FK_Data_2 : Size = 2 ; break ; case FK_Data_4 : Size = 4 ; break ; case FK_Data_8 : Size = 8 ; break ; default : return ; } for ( unsigned i = 0 ; i < Size ; ++ i ) { Data [ i + Fixup . getOffset ( ) ] |= static_cast < uint8_t > ( Value >> ( i * 8 ) ) ; } return ; } </s>

Apply the Value for given Fixup into the provided data fragment , at the offset specified by the fixup and following the fixup kind as appropriate .


"Cannot relax short instruction fixups!"

Simple predicate for targets where ! Resolved implies requiring relaxation .


<s>
const
MCFixupKindInfo
&
getFixupKindInfo
(
MCFixupKind
Kind
)
const
override
{
const
static
MCFixupKindInfo
Infos
[
AAP
::
NumTargetFixupKinds
]
=
{
{
"fixup_AAP_NONE"
,
0
,
16
,
0
}
,
{
"fixup_AAP_BR16"
,
0
,
9
,
0
}
,
{
"fixup_AAP_BR32"
,
0
,
9
,
0
}
,
{
"fixup_AAP_BRCC16"
,
6
,
3
,
0
}
,
{
"fixup_AAP_BRCC32"
,
6
,
3
,
0
}
,
{
"fixup_AAP_BAL16"
,
0
,
3
,
0
}
,
{
"fixup_AAP_BAL32"
,
0
,
3
,
0
}
,
{
"fixup_AAP_ABS6"
,
0
,
3
,
0
}
,
{
"fixup_AAP_ABS9"
,
0
,
3
,
0
}
,
{
"fixup_AAP_ABS10"
,
0
,
3
,
0
}
,
{
"fixup_AAP_ABS12"
,
0
,
6
,
0
}
,
{
"fixup_AAP_ABS16"
,
0
,
6
,
0
}
,
{
"fixup_AAP_SHIFT6"
,
0
,
3
,
0
}
,
{
"fixup_AAP_OFF10"
,
0
,
3
,
0
}
}
;
if
(
Kind
<
FirstTargetFixupKind
)
return
MCAsmBackend
::
getFixupKindInfo
(
Kind
)
;
assert
(
unsigned
(
Kind
FirstTargetFixupKind
)
<
getNumFixupKinds
(
)
&&
"Invalid kind!"
)
;
return
Infos
[
Kind
FirstTargetFixupKind
]
;
}
</s>


<s> unsigned getNumFixupKinds ( ) const override { return 14 ; } </s>

Get the number of target specific fixup kinds .


<s> bool mayNeedRelaxation ( MCInst const & Inst , MCSubtargetInfo const & STI ) const override { return false ; } </s>

Check whether the given instruction may need relaxation .


"Unexpected short instruction with fixup"

Relax the instruction in the given fragment to the next wider instruction .


<s> bool writeNopData ( raw_ostream & OS , uint64_t Count ) const override { if ( ( Count % 2 ) != 0 ) { return false ; } for ( uint64_t i = 0 ; i < Count ; i += 2 ) { OS . write ( 0x00 ) ; OS . write ( 0x01 ) ; } return true ; } </s>

Write an ( optimal ) nop sequence of Count bytes to the given output .


<s> void addExpr ( MCInst & Inst , const MCExpr * Expr ) const { if ( Expr == 0 ) Inst . addOperand ( MCOperand :: createImm ( 0 ) ) ; else if ( const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( Expr ) ) Inst . addOperand ( MCOperand :: createImm ( CE -> getValue ( ) ) ) ; else Inst . addOperand ( MCOperand :: createExpr ( Expr ) ) ; } </s>


<s> unsigned checkTargetMatchPredicate ( MCInst & Inst ) override { const MCRegisterClass & MRC = MRI -> getRegClass ( AAP :: GR8RegClassID ) ; switch ( Inst . getOpcode ( ) ) { default : return Match_Success ; case AAP :: LDB_short : case AAP :: LDW_short : case AAP :: LDB_postinc_short : case AAP :: LDW_postinc_short : case AAP :: LDB_predec_short : case AAP :: LDW_predec_short : case AAP :: STB_short : case AAP :: STW_short : case AAP :: STB_postinc_short : case AAP :: STW_postinc_short : case AAP :: STB_predec_short : case AAP :: STW_predec_short : break ; } for ( MCInst :: iterator I = Inst . begin ( ) ; I != Inst . end ( ) ; ++ I ) { if ( I -> isReg ( ) && ! MRC . contains ( I -> getReg ( ) ) ) { return Match_InvalidOperand ; } } return Match_Success ; } </s>

checkTargetMatchPredicate - Validate the instruction match against any complex target predicates not expressible via match classes .


<s> static std :: unique_ptr < AAPOperand > CreateReg ( unsigned RegNo , SMLoc S , SMLoc E ) { auto Op = make_unique < AAPOperand > ( Register ) ; Op -> Reg . RegNum = RegNo ; Op -> StartLoc = S ; Op -> EndLoc = E ; return Op ; } </s>

CreateReg - Allocate a single virtual register for the given type .


<s> SMLoc getEndLoc ( ) const { return EndLoc ; } </s>

getEndLoc - Get the location of the last token of this operand .


<s>
unsigned
getReg
(
)
const
{
assert
(
Kind
==
Register
&&
"Invalid type access!"
)
;
return
Reg
.
RegNum
;
}
</s>

Returns the register associated with this edge .


<s> SMLoc getStartLoc ( ) const { return StartLoc ; } </s>

getStartLoc - Get the location of the first token of this operand .


<s> bool isImm ( ) const { return Kind == Immediate ; } </s>


<s> bool isMem ( ) const { return false ; } </s>


<s> bool isReg ( ) const { return Kind == Register ; } </s>


<s> bool isToken ( ) const { return Kind == Token ; } </s>


<s>
bool
AAPAsmParser
::
MatchAndEmitInstruction
(
SMLoc
IDLoc
,
unsigned
&
Opcode
,
OperandVector
&
Operands
,
MCStreamer
&
Out
,
uint64_t
&
ErrorInfo
,
bool
matchingInlineAsm
)
{
MCInst
Inst
;
SMLoc
ErrorLoc
;
switch
(
MatchInstructionImpl
(
Operands
,
Inst
,
ErrorInfo
,
matchingInlineAsm
)
)
{
default
:
break
;
case
Match_Success
:
Out
.
EmitInstruction
(
Inst
,
getSTI
(
)
)
;
return
false
;
case
Match_MissingFeature
:
{
assert
(
ErrorInfo
&&
"Unknown missing feature!"
)
;
std
::
string
Msg
=
"Use of this instruction requires:"
;
unsigned
Mask
=
1
;
for
(
unsigned
i
=
0
;
i
<
(
sizeof
(
ErrorInfo
)
*
8
1
)
;
++
i
)
{
if
(
ErrorInfo
&
Mask
)
{
Msg
+=
" "
;
Msg
+=
getSubtargetFeatureName
(
ErrorInfo
&
Mask
)
;
}
Mask
<<=
1
;
}
return
Error
(
IDLoc
,
Msg
)
;
}
case
Match_MnemonicFail
:
return
Error
(
IDLoc
,
"Unrecognized instruction mnemonic"
)
;
case
Match_InvalidOperand
:
ErrorLoc
=
IDLoc
;
if
(
ErrorInfo
!=
~
0U
)
{
if
(
ErrorInfo
>=
Operands
.
size
(
)
)
return
Error
(
IDLoc
,
"Too few operands for instruction"
)
;
ErrorLoc
=
(
(
AAPOperand
&
)
*
Operands
[
ErrorInfo
]
)
.
getStartLoc
(
)
;
if
(
ErrorLoc
==
SMLoc
(
)
)
ErrorLoc
=
IDLoc
;
}
return
Error
(
IDLoc
,
"Invalid operand for instruction"
)
;
}
llvm_unreachable
(
"Unknown match type detected!"
)
;
}
</s>

MatchAndEmitInstruction - Recognize a series of operands of a parsed instruction as an actual MCInst and emit it to the specified MCStreamer .


<s> bool AAPAsmParser :: ParseDirective ( AsmToken DirectiveID ) { return true ; } </s>

ParseDirective - Parse a target specific assembler directive This method is deprecated , use 'parseDirective ' instead .


<s> bool AAPAsmParser :: ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , SMLoc NameLoc , OperandVector & Operands ) { Operands . push_back ( AAPOperand :: CreateToken ( Name , NameLoc ) ) ; if ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) return false ; if ( ParseOperand ( Operands ) ) return true ; while ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) && getLexer ( ) . is ( AsmToken :: Comma ) ) { getLexer ( ) . Lex ( ) ; if ( ParseOperand ( Operands ) ) return true ; } return false ; } </s>

ParseInstruction - Parse one assembly instruction .


<s> void print ( raw_ostream & OS ) const { } </s>

print - Print a debug representation of the operand to the given stream .


<s> void AAPAsmPrinter :: EmitInstruction ( const MachineInstr * MI ) { if ( emitPseudoExpansionLowering ( * OutStreamer , MI ) ) return ; AAPMCInstLower MCInstLowering ( OutContext , * this ) ; MCInst TmpInst ; MCInstLowering . Lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; } </s>

EmitInstruction - This callback is invoked when an instruction is emitted , to advance the hazard state .


<s>
StringRef
getPassName
(
)
const
override
{
return
"AAP Assembly Printer"
;
}
</s>

getPassName - Return a nice clean name for a pass .


<s> bool AAPAsmPrinter :: lowerOperand ( const MachineOperand & MO , MCOperand & MCOp ) { AAPMCInstLower MCInstLowering ( OutContext , * this ) ; return MCInstLowering . LowerMachineOperand ( MO , MCOp ) ; } </s>

Wrapper for MCInstLowering.lowerOperand ( ) for the tblgen'erated pseudo lowering .


<s> bool AAPAsmPrinter :: PrintAsmMemoryOperand ( const MachineInstr * MI , unsigned OpNo , unsigned AsmVariant , const char * ExtraCode , raw_ostream & O ) { printMemOffOperand ( MI , OpNo , O ) ; return false ; } </s>

Print the specified operand of MI , an INLINEASM instruction , using the specified assembler variant as an address .


<s> bool AAPAsmPrinter :: PrintAsmOperand ( const MachineInstr * MI , unsigned OpNo , unsigned AsmVariant , const char * ExtraCode , raw_ostream & O ) { printOperand ( MI , OpNo , O ) ; return false ; } </s>

PrintAsmOperand - Print out an operand for an inline asm expression .


<s> DecodeStatus AAPDisassembler :: getInstruction ( MCInst & MI , uint64_t & Size , ArrayRef < uint8_t > Bytes , uint64_t Address , raw_ostream & os , raw_ostream & cs ) const { uint32_t Insn ; DecodeStatus Result ; if ( Bytes . size ( ) < 2 ) { Size = 0 ; return MCDisassembler :: Fail ; } Insn = ( Bytes [ 1 ] << 8 ) | ( Bytes [ 0 ] << 0 ) ; Result = decodeInstruction ( DecoderTable16 , MI , Insn , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = 2 ; return Result ; } if ( Bytes . size ( ) < 4 ) { Size = 0 ; return MCDisassembler :: Fail ; } Insn = ( Bytes [ 3 ] << 24 ) | ( Bytes [ 2 ] << 16 ) | ( Bytes [ 1 ] << 8 ) | ( Bytes [ 0 ] << 0 ) ; Result = decodeInstruction ( DecoderTable32 , MI , Insn , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = 4 ; return Result ; } Size = 2 ; return MCDisassembler :: Fail ; } </s>

Returns the disassembly of a single instruction .


<s>
MachineBasicBlock
::
iterator
AAPFrameLowering
::
eliminateCallFramePseudoInstr
(
MachineFunction
&
MF
,
MachineBasicBlock
&
MBB
,
MachineBasicBlock
::
iterator
I
)
const
{
assert
(
!
hasFP
(
MF
)
&&
"Frame pointer unsupported!"
)
;
return
MBB
.
erase
(
I
)
;
}
</s>

This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy pseudo instructions ( but only if the Target is using them ) .


"Epilogue can only be inserted in returning blocks"


<s>
void
AAPFrameLowering
::
emitPrologue
(
MachineFunction
&
MF
,
MachineBasicBlock
&
MBB
)
const
{
MachineFrameInfo
&
MFrameInfo
=
MF
.
getFrameInfo
(
)
;
AAPMachineFunctionInfo
*
MFuncInfo
=
MF
.
getInfo
<
AAPMachineFunctionInfo
>
(
)
;
const
AAPInstrInfo
&
TII
=
*
static_cast
<
const
AAPInstrInfo
*
>
(
MF
.
getSubtarget
(
)
.
getInstrInfo
(
)
)
;
auto
MBBI
=
MBB
.
begin
(
)
;
DebugLoc
DL
=
MBBI
!=
MBB
.
end
(
)
MBBI
->
getDebugLoc
(
)
:
DebugLoc
(
)
;
const
uint64_t
StackSize
=
MFrameInfo
.
getStackSize
(
)
;
assert
(
!
hasFP
(
MF
)
&&
"Frame pointer unsupported!"
)
;
uint64_t
NumBytes
=
StackSize
MFuncInfo
->
getCalleeSavedFrameSize
(
)
;
const
unsigned
SP
=
AAPRegisterInfo
::
getStackPtrRegister
(
)
;
if
(
NumBytes
)
{
const
uint64_t
Addend
=
NumBytes
%
1023
;
const
uint64_t
NumChunks
=
NumBytes
/
1023
;
for
(
uint64_t
i
=
0
;
i
<
NumChunks
;
++
i
)
{
BuildMI
(
MBB
,
MBBI
,
DL
,
TII
.
get
(
AAP
::
SUBI_i10
)
,
SP
)
.
addReg
(
SP
)
.
addImm
(
1023
)
;
}
if
(
Addend
)
{
BuildMI
(
MBB
,
MBBI
,
DL
,
TII
.
get
(
AAP
::
SUBI_i10
)
,
SP
)
.
addReg
(
SP
)
.
addImm
(
Addend
)
;
}
}
}
</s>

emitProlog/emitEpilog - These methods insert prolog and epilog code into the function .


<s> bool AAPFrameLowering :: hasFP ( const MachineFunction & MF ) const { return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MF . getFrameInfo ( ) . hasVarSizedObjects ( ) ; } </s>

hasFP - Return true if the specified function should have a dedicated frame pointer register .


<s> void AAPFrameLowering :: processFunctionBeforeFrameFinalized ( MachineFunction & MF , RegScavenger * RS ) const { } </s>

processFunctionBeforeFrameFinalized - This method is called immediately before the specified function 's frame layout ( MF.getFrameInfo ( ) ) is finalized .


<s> void AAPInstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot , const MCSubtargetInfo & STI ) { printInstruction ( MI , O ) ; printAnnotation ( O , Annot ) ; } </s>

Print the specified MCInst to the specified raw_ostream .


<s>
void
AAPInstrInfo
::
copyPhysReg
(
MachineBasicBlock
&
MBB
,
MachineBasicBlock
::
iterator
I
,
const
DebugLoc
&
DL
,
unsigned
DestReg
,
unsigned
SrcReg
,
bool
KillSrc
)
const
{
assert
(
AAP
::
GR64RegClass
.
contains
(
DestReg
)
&&
AAP
::
GR64RegClass
.
contains
(
DestReg
)
&&
"Impossible register-register copy"
)
;
BuildMI
(
MBB
,
I
,
DL
,
get
(
AAP
::
MOV_r
)
,
DestReg
)
.
addReg
(
SrcReg
,
getKillRegState
(
KillSrc
)
)
;
}
</s>


<s> unsigned AAPInstrInfo :: getInstSizeInBytes ( const MachineInstr & MI ) const { switch ( MI . getOpcode ( ) ) { default : return MI . getDesc ( ) . getSize ( ) ; case TargetOpcode :: EH_LABEL : case TargetOpcode :: IMPLICIT_DEF : case TargetOpcode :: KILL : case TargetOpcode :: DBG_VALUE : return 0 ; case TargetOpcode :: INLINEASM : { const MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; const auto & TM = static_cast < const AAPTargetMachine & > ( MF . getTarget ( ) ) ; return getInlineAsmLength ( MI . getOperand ( 0 ) . getSymbolName ( ) , * TM . getMCAsmInfo ( ) ) ; } } } </s>

Returns the size in bytes of the specified MachineInstr , or ~0U when this function is not implemented by a target .


<s> const TargetRegisterInfo & getRegisterInfo ( ) const { return TRI ; } </s>

getRegisterInfo - TargetInstrInfo is a superset of MRegister info .


"InsertBranch cannot insert a fallthrough"

"Unconditional branch cannot have multiple successors"

Insert branch code into the end of the specified MachineBasicBlock .


<s> unsigned AAPInstrInfo :: insertIndirectBranch ( MachineBasicBlock & MBB , MachineBasicBlock & DestBB , const DebugLoc & DL , int64_t BrOffset , RegScavenger * RS ) const { auto & MI = * BuildMI ( & MBB , DL , get ( AAP :: BRA ) ) . addMBB ( & DestBB ) ; return getInstSizeInBytes ( MI ) ; } </s>

Insert an unconditional indirect branch at the end of MBB to NewDestBB .


<s>
bool
AAPInstrInfo
::
isBranchOffsetInRange
(
unsigned
BranchOpc
,
int64_t
BrOffset
)
const
{
switch
(
BranchOpc
)
{
default
:
llvm_unreachable
(
"Invalid opcode"
)
;
case
AAP
::
BRA
:
return
AAP
::
isOff22
(
BrOffset
)
;
case
AAP
::
BEQ_
:
case
AAP
::
BNE_
:
case
AAP
::
BLTS_
:
case
AAP
::
BLES_
:
case
AAP
::
BLTU_
:
case
AAP
::
BLEU_
:
return
AAP
::
isOff10
(
BrOffset
)
;
}
}
</s>

Determine if the branch target is in range .


<s> unsigned AAPInstrInfo :: isLoadFromStackSlot ( const MachineInstr & MI , int & FrameIndex ) const { switch ( MI . getOpcode ( ) ) { default : return 0 ; case AAP :: LDB : case AAP :: LDW : case AAP :: LDB_postinc : case AAP :: LDW_postinc : case AAP :: LDB_predec : case AAP :: LDW_predec : break ; } if ( MI . getOperand ( 1 ) . isFI ( ) && MI . getOperand ( 2 ) . isImm ( ) && MI . getOperand ( 2 ) . getImm ( ) == 0 ) { FrameIndex = MI . getOperand ( 1 ) . getIndex ( ) ; return MI . getOperand ( 0 ) . getReg ( ) ; } return 0 ; } </s>

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot , return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot .


<s> unsigned AAPInstrInfo :: isStoreToStackSlot ( const MachineInstr & MI , int & FrameIndex ) const { switch ( MI . getOpcode ( ) ) { default : return 0 ; case AAP :: STB : case AAP :: STW : case AAP :: STB_postinc : case AAP :: STW_postinc : case AAP :: STB_predec : case AAP :: STW_predec : break ; } if ( MI . getOperand ( 0 ) . isFI ( ) && MI . getOperand ( 1 ) . isImm ( ) && MI . getOperand ( 1 ) . getImm ( ) == 0 ) { FrameIndex = MI . getOperand ( 0 ) . getIndex ( ) ; return MI . getOperand ( 2 ) . getReg ( ) ; } return 0 ; } </s>

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot , return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot .


"Unknown register class to store to stack slot"

Load the specified register of the given register class from the specified stack frame index .


<s> unsigned AAPInstrInfo :: removeBranch ( MachineBasicBlock & MBB , int * BytesRemoved ) const { unsigned Count = 0 ; auto I = MBB . end ( ) ; while ( I != MBB . begin ( ) ) { -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( ! I -> isBranch ( ) ) break ; I -> eraseFromParent ( ) ; if ( BytesRemoved ) * BytesRemoved += getInstSizeInBytes ( * I ) ; I = MBB . end ( ) ; ++ Count ; } return Count ; } </s>

Remove the branching code at the end of the specific MBB .


<s>
bool
AAPInstrInfo
::
reverseBranchCondition
(
SmallVectorImpl
<
MachineOperand
>
&
Cond
)
const
{
assert
(
Cond
.
size
(
)
==
3
&&
"Invalid branch"
)
;
AAPCC
::
CondCode
RCC
=
reverseCondCode
(
(
AAPCC
::
CondCode
)
Cond
[
0
]
.
getImm
(
)
)
;
if
(
RCC
==
AAPCC
::
COND_INVALID
)
return
true
;
Cond
[
0
]
.
setImm
(
RCC
)
;
return
false
;
}
</s>

Reverses the branch condition of the specified condition list , returning false on success and true if it can not be reversed .


Store the specified register of the given register class to the specified stack frame index .


"AAP DAG->DAG Pattern Instruction Selection"

getPassName - Return a nice clean name for a pass .


<s> const AAPTargetMachine & getTargetMachine ( ) { return static_cast < const AAPTargetMachine & > ( TM ) ; } </s>

Return the target machine ( if available ) .


<s>
void
AAPDAGToDAGISel
::
Select
(
SDNode
*
Node
)
{
unsigned
Opcode
=
Node
->
getOpcode
(
)
;
SDLoc
dl
(
Node
)
;
LLVM_DEBUG
(
errs
(
)
<<
"Selecting: "
;
Node
->
dump
(
CurDAG
)
;
errs
(
)
<<
"\n"
)
;
if
(
Node
->
isMachineOpcode
(
)
)
{
LLVM_DEBUG
(
errs
(
)
<<
"== "
;
Node
->
dump
(
CurDAG
)
;
errs
(
)
<<
"\n"
)
;
return
;
}
switch
(
Opcode
)
{
case
ISD
::
FrameIndex
:
{
assert
(
Node
->
getValueType
(
0
)
==
MVT
::
i16
)
;
int
FI
=
cast
<
FrameIndexSDNode
>
(
Node
)
->
getIndex
(
)
;
SDValue
TFI
=
CurDAG
->
getTargetFrameIndex
(
FI
,
MVT
::
i16
)
;
SDNode
*
N
=
CurDAG
->
getMachineNode
(
AAP
::
LEA
,
dl
,
MVT
::
i16
,
TFI
,
CurDAG
->
getTargetConstant
(
0
,
dl
,
MVT
::
i16
)
)
;
ReplaceNode
(
Node
,
N
)
;
return
;
}
default
:
break
;
}
SelectCode
(
Node
)
;
}
</s>

Main hook for targets to transform nodes into machine nodes .


<s> bool AAPDAGToDAGISel :: SelectInlineAsmMemoryOperand ( const SDValue & Op , unsigned ConstraintID , std :: vector < SDValue > & OutOps ) { switch ( ConstraintID ) { default : return true ; case InlineAsm :: Constraint_i : case InlineAsm :: Constraint_m : SDLoc DL ( Op ) ; SDValue RC = CurDAG -> getTargetConstant ( AAP :: GR64RegClass . getID ( ) , DL , MVT :: i16 ) ; SDNode * N = CurDAG -> getMachineNode ( TargetOpcode :: COPY_TO_REGCLASS , DL , Op . getValueType ( ) , Op , RC ) ; SDValue Zero = CurDAG -> getTargetConstant ( 0 , DL , MVT :: i16 ) ; OutOps . push_back ( SDValue ( N , 0 ) ) ; OutOps . push_back ( Zero ) ; break ; } return false ; } </s>

SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode , according to the specified constraint .


<s> bool AAPTargetLowering :: CanLowerReturn ( CallingConv :: ID CallConv , MachineFunction & MF , bool isVarArg , const SmallVectorImpl < ISD :: OutputArg > & Outs , LLVMContext & Context ) const { SmallVector < CCValAssign , 16 > RVLocs ; CCState CCInfo ( CallConv , isVarArg , MF , RVLocs , Context ) ; return CCInfo . CheckReturn ( Outs , RetCC_AAP ) ; } </s>

This hook should be implemented to check whether the return values described by the Outs array can fit into the return registers .


"Unexpected instruction for custom insertion"

This method should be implemented by targets that mark instructions with the 'usesCustomInserter ' flag .


<s> MVT :: SimpleValueType getCmpLibcallReturnType ( ) const override { return MVT :: i16 ; } </s>

Return the ValueType for comparison libcalls .


<s> TargetLowering :: ConstraintType AAPTargetLowering :: getConstraintType ( StringRef Constraint ) const { if ( Constraint . size ( ) == 1 ) { switch ( Constraint [ 0 ] ) { default : break ; case 'r' : return C_RegisterClass ; } } return TargetLowering :: getConstraintType ( Constraint ) ; } </s>

Given a constraint letter , return the type of constraint for this target .


<s> std :: pair < unsigned , const TargetRegisterClass * > AAPTargetLowering :: getRegForInlineAsmConstraint ( const TargetRegisterInfo * TRI , StringRef Constraint , MVT VT ) const { if ( Constraint . size ( ) == 1 ) { switch ( Constraint [ 0 ] ) { default : break ; case 'r' : return std :: make_pair ( 0U , & AAP :: GR64RegClass ) ; } } return TargetLowering :: getRegForInlineAsmConstraint ( TRI , Constraint , VT ) ; } </s>

Given a physical register constraint ( e.g .


<s> EVT AAPTargetLowering :: getSetCCResultType ( const DataLayout & DL , LLVMContext & Context , EVT VT ) const { if ( ! VT . isVector ( ) ) { return MVT :: i16 ; } return VT . changeVectorElementTypeToInteger ( ) ; } </s>

Return the value type to use for ISD : :SETCC .


<s> const char * AAPTargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { default : return nullptr ; case AAPISD :: RET_FLAG : return "AAPISD::RET_FLAG" ; case AAPISD :: CALL : return "AAPISD::CALL" ; case AAPISD :: Wrapper : return "AAPISD::Wrapper" ; case AAPISD :: SELECT_CC : return "AAPISD::SELECT_CC" ; } } </s>

getTargetNodeName - This method returns the name of a target specific


<s>
SDValue
AAPTargetLowering
::
LowerCall
(
TargetLowering
::
CallLoweringInfo
&
CLI
,
SmallVectorImpl
<
SDValue
>
&
InVals
)
const
{
SelectionDAG
&
DAG
=
CLI
.
DAG
;
SDLoc
&
DL
=
CLI
.
DL
;
SmallVectorImpl
<
ISD
::
OutputArg
>
&
Outs
=
CLI
.
Outs
;
SmallVectorImpl
<
SDValue
>
&
OutVals
=
CLI
.
OutVals
;
SmallVectorImpl
<
ISD
::
InputArg
>
&
Ins
=
CLI
.
Ins
;
SDValue
Chain
=
CLI
.
Chain
;
SDValue
Callee
=
CLI
.
Callee
;
bool
&
isTailCall
=
CLI
.
IsTailCall
;
CallingConv
::
ID
CallConv
=
CLI
.
CallConv
;
bool
isVarArg
=
CLI
.
IsVarArg
;
isTailCall
=
false
;
switch
(
CallConv
)
{
default
:
llvm_unreachable
(
"Unsupported calling convention"
)
;
case
CallingConv
::
Fast
:
case
CallingConv
::
C
:
return
LowerCCCCallTo
(
Chain
,
Callee
,
CallConv
,
isVarArg
,
isTailCall
,
Outs
,
OutVals
,
Ins
,
DL
,
DAG
,
InVals
)
;
}
}
</s>

This hook must be implemented to lower calls into the specified DAG .

AAP
AAP
ISD::OutputArg
ISD::InputArg
"Unsupported calling convention"


<s> SDValue AAPTargetLowering :: LowerCallResult ( SDValue Chain , SDValue InFlag , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < ISD :: InputArg > & Ins , const SDLoc & DL , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals , uint32_t * RegMask ) const { SmallVector < CCValAssign , 16 > RVLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_AAP ) ; for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , DL , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( 1 ) ; InFlag = Chain . getValue ( 2 ) ; InVals . push_back ( Chain . getValue ( 0 ) ) ; } for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) { unsigned Reg = RVLocs [ i ] . getLocReg ( ) ; RegMask [ Reg / 32 ] &= ~ ( 1u << ( Reg & 32 ) ) ; } return Chain ; } </s>

LowerCallResult - Lower the result values of an ISD : :CALL into the appropriate copies out of appropriate physical registers .


<s>
SDValue
AAPTargetLowering
::
LowerFormalArguments
(
SDValue
Chain
,
CallingConv
::
ID
CallConv
,
bool
isVarArg
,
const
SmallVectorImpl
<
ISD
::
InputArg
>
&
Ins
,
const
SDLoc
&
DL
,
SelectionDAG
&
DAG
,
SmallVectorImpl
<
SDValue
>
&
InVals
)
const
{
switch
(
CallConv
)
{
default
:
llvm_unreachable
(
"Unsupported calling convention"
)
;
case
CallingConv
::
C
:
case
CallingConv
::
Fast
:
return
LowerCCCArguments
(
Chain
,
CallConv
,
isVarArg
,
Ins
,
DL
,
DAG
,
InVals
)
;
}
}
</s>

This hook must be implemented to lower the incoming ( formal ) arguments , described by the Ins array , into the specified DAG .

AAP
AAP
ISD::InputArg
"Unsupported calling convention"


<s>
SDValue
AAPTargetLowering
::
LowerOperation
(
SDValue
Op
,
SelectionDAG
&
DAG
)
const
{
switch
(
Op
.
getOpcode
(
)
)
{
case
ISD
::
GlobalAddress
:
return
LowerGlobalAddress
(
Op
,
DAG
)
;
case
ISD
::
ExternalSymbol
:
return
LowerExternalSymbol
(
Op
,
DAG
)
;
case
ISD
::
BlockAddress
:
return
LowerBlockAddress
(
Op
,
DAG
)
;
case
ISD
::
BR_CC
:
return
LowerBR_CC
(
Op
,
DAG
)
;
case
ISD
::
SELECT_CC
:
return
LowerSELECT_CC
(
Op
,
DAG
)
;
case
ISD
::
VASTART
:
return
LowerVASTART
(
Op
,
DAG
)
;
case
ISD
::
RETURNADDR
:
return
LowerRETURNADDR
(
Op
,
DAG
)
;
}
llvm_unreachable
(
"unimplemented operand"
)
;
}
</s>

LowerOperation - Provide custom lowering hooks for some operations .

AAP
AAP
ISD::GlobalAddress
ISD::ExternalSymbol
ISD::BlockAddress
ISD::BR_CC
ISD::SELECT_CC
ISD::VASTART
ISD::RETURNADDR
"unimplemented operand"


<s>
SDValue
AAPTargetLowering
::
LowerReturn
(
SDValue
Chain
,
CallingConv
::
ID
CallConv
,
bool
isVarArg
,
const
SmallVectorImpl
<
ISD
::
OutputArg
>
&
Outs
,
const
SmallVectorImpl
<
SDValue
>
&
OutVals
,
const
SDLoc
&
DL
,
SelectionDAG
&
DAG
)
const
{
SmallVector
<
CCValAssign
,
16
>
RVLocs
;
CCState
CCInfo
(
CallConv
,
isVarArg
,
DAG
.
getMachineFunction
(
)
,
RVLocs
,
*
DAG
.
getContext
(
)
)
;
CCInfo
.
AnalyzeReturn
(
Outs
,
RetCC_AAP
)
;
SDValue
Flag
;
SmallVector
<
SDValue
,
4
>
RetOps
(
1
,
Chain
)
;
RetOps
.
push_back
(
DAG
.
getRegister
(
AAPRegisterInfo
::
getLinkRegister
(
)
,
MVT
::
i16
)
)
;
MachineRegisterInfo
&
MRI
=
DAG
.
getMachineFunction
(
)
.
getRegInfo
(
)
;
for
(
unsigned
i
=
0
;
i
!=
RVLocs
.
size
(
)
;
++
i
)
{
MRI
.
disableCalleeSavedRegister
(
RVLocs
[
i
]
.
getLocReg
(
)
)
;
}
for
(
unsigned
i
=
0
;
i
!=
RVLocs
.
size
(
)
;
++
i
)
{
CCValAssign
&
VA
=
RVLocs
[
i
]
;
assert
(
VA
.
isRegLoc
(
)
&&
"Can only return in registers!"
)
;
Chain
=
DAG
.
getCopyToReg
(
Chain
,
DL
,
VA
.
getLocReg
(
)
,
OutVals
[
i
]
,
Flag
)
;
Flag
=
Chain
.
getValue
(
1
)
;
RetOps
.
push_back
(
DAG
.
getRegister
(
VA
.
getLocReg
(
)
,
VA
.
getLocVT
(
)
)
)
;
}
RetOps
[
0
]
=
Chain
;
if
(
Flag
.
getNode
(
)
)
RetOps
.
push_back
(
Flag
)
;
return
DAG
.
getNode
(
AAPISD
::
RET_FLAG
,
DL
,
{
MVT
::
Other
,
MVT
::
i16
}
,
RetOps
)
;
}
</s>

This hook must be implemented to lower outgoing return values , described by the Outs array , into the specified DAG .


<s> SDValue AAPTargetLowering :: PerformDAGCombine ( SDNode * N , DAGCombinerInfo & DCI ) const { switch ( N -> getOpcode ( ) ) { case ISD :: ADD : return PerformADDCombine ( N , DCI ) ; default : break ; } return SDValue ( ) ; } </s>

This method will be invoked for all target nodes and for any target-independent nodes that the target has registered with invoke it for .


<s>
void
AAPTargetLowering
::
ReplaceNodeResults
(
SDNode
*
N
,
SmallVectorImpl
<
SDValue
>
&
Results
,
SelectionDAG
&
DAG
)
const
{
switch
(
N
->
getOpcode
(
)
)
{
case
ISD
::
FLT_ROUNDS_
:
Results
.
push_back
(
DAG
.
getTargetConstant
(
1
,
SDLoc
(
N
)
,
MVT
::
i32
)
)
;
break
;
default
:
llvm_unreachable
(
"Unhandled node in ReplaceNodeResults"
)
;
}
}
</s>

ReplaceNodeResults - Replace the results of node with an illegal result type with new values built out of custom code .


<s> unsigned AAPMachineFunctionInfo :: getGlobalBaseReg ( ) { if ( GlobalBaseReg ) return GlobalBaseReg ; return GlobalBaseReg = MF . getRegInfo ( ) . createVirtualRegister ( & AAP :: GR64RegClass ) ; } </s>

getGlobalBaseReg - Return a virtual register initialized with the the global base register value .


<s> void AAPMCCodeEmitter :: encodeInstruction ( MCInst const & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , MCSubtargetInfo const & STI ) const { const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; uint64_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ; emitLittleEndian ( Binary , OS , Desc . getSize ( ) ) ; ++ MCNumEmitted ; } </s>

Encode the given Inst to bytes and append to CB .


"Currently only symbol operands are supported"

"Unhandled MCInst for getMachineOpValue"

getMachineOpValue - Return binary encoding of operand .


<s>
MCSymbol
*
AAPMCInstLower
::
GetBlockAddressSymbol
(
const
MachineOperand
&
MO
)
const
{
switch
(
MO
.
getTargetFlags
(
)
)
{
default
:
llvm_unreachable
(
"Unknown target flag on GV operand"
)
;
case
0
:
break
;
}
return
Printer
.
GetBlockAddressSymbol
(
MO
.
getBlockAddress
(
)
)
;
}
</s>

Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block .

AAP
AAP
"Unknown target flag on GV operand"
0


<s>
MCSymbol
*
AAPMCInstLower
::
GetExternalSymbolSymbol
(
const
MachineOperand
&
MO
)
const
{
switch
(
MO
.
getTargetFlags
(
)
)
{
default
:
llvm_unreachable
(
"Unknown target flag on GV operand"
)
;
case
0
:
break
;
}
return
Printer
.
GetExternalSymbolSymbol
(
MO
.
getSymbolName
(
)
)
;
}
</s>

Return the MCSymbol for the specified ExternalSymbol .


"Instr does not have a Frame Index operand!"

"Currently LEA immediates must be in the range [-1023, 1023]"

This method must be overriden to eliminate abstract frame indices from instructions which may use them .


<s> const MCPhysReg * AAPRegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { return CSR_SaveList ; } </s>


<s> const uint32_t * AAPRegisterInfo :: getCallPreservedMask ( const MachineFunction & MF , CallingConv :: ID ) const { return CSR_RegMask ; } </s>

Return a mask of call-preserved registers for the given calling convention on the current function .


<s> unsigned AAPRegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; return TFI -> hasFP ( MF ) ? getFramePtrRegister ( ) : getStackPtrRegister ( ) ; } </s>


<s> BitVector AAPRegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; Reserved . set ( getLinkRegister ( ) ) ; Reserved . set ( getStackPtrRegister ( ) ) ; if ( TFI -> hasFP ( MF ) ) { Reserved . set ( getFramePtrRegister ( ) ) ; } return Reserved ; } </s>

getReservedRegs - Returns a bitset indexed by physical register number indicating if a register is a special register that has particular uses and should be considered unavailable at all times , e.g .


<s> bool AAPRegisterInfo :: requiresRegisterScavenging ( const MachineFunction & MF ) const { return false ; } </s>

Returns true if the target requires ( and can make use of ) the register scavenger .


<s> bool AAPRegisterInfo :: trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const { return true ; } </s>

Returns true if the live-ins should be tracked after register allocation .


<s>
StringRef
getPassName
(
)
const
override
{
return
"AAP Short Instruction Peephole"
;
}
</s>

getPassName - Return a nice clean name for a pass .


<s> bool ShortInstrPeephole :: runOnMachineFunction ( MachineFunction & MF ) { bool Changed = false ; for ( MachineBasicBlock & MBB : MF ) { for ( MachineInstr & MI : MBB ) { Changed |= runOnInstruction ( MI ) ; } } return Changed ; } </s>

runOnMachineFunction - Emit the function body .


<s> const AAPInstrInfo * getInstrInfo ( ) const override { return & InstrInfo ; } </s>


<s> const TargetRegisterInfo * getRegisterInfo ( ) const override { return & InstrInfo . getRegisterInfo ( ) ; } </s>

getRegisterInfo - TargetInstrInfo is a superset of MRegister info .


<s> bool AAPPassConfig :: addInstSelector ( ) { addPass ( createAAPISelDag ( getAAPTargetMachine ( ) , getOptLevel ( ) ) ) ; return false ; } </s>

addInstSelector - This method should install an instruction selector pass , which converts from LLVM code to machine instructions .


<s> void AAPPassConfig :: addPreEmitPass ( ) { addPass ( & BranchRelaxationPassID ) ; addPass ( createAAPShortInstrPeepholePass ( getAAPTargetMachine ( ) ) , false ) ; } </s>

This pass may be implemented by targets that want to run passes immediately before machine code is emitted .


<s> TargetPassConfig * AAPTargetMachine :: createPassConfig ( PassManagerBase & PM ) { return new AAPPassConfig ( * this , PM ) ; } </s>

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes .


<s> TargetLoweringObjectFile * getObjFileLowering ( ) const override { return TLOF . get ( ) ; } </s>

Return information about object file lowering .


<s> const AAPSubtarget * getSubtargetImpl ( const Function & F ) const override { return & Subtarget ; } </s>

Virtual method implemented by subclasses that returns a reference to that target 's TargetSubtargetInfo-derived member variable .